- Alsa-devel - mailman.alsa-project.org

[alsa-devel] [PATCH 0/2] ASoC: mediatek: add power-domain ctrl for 2701
by Garlic Tseng 16 Feb '17

16 Feb '17

add power-domain get/put ctrl for 2701 and add relative node description in binding doc. Garlic Tseng (2): ASoC: mediatek: add power-domain get/put ctrl for mt2701 ASoC: mediatek: add power-domains for mt2701-afe-pcm.txt Documentation/devicetree/bindings/sound/mt2701-afe-pcm.txt | 2 ++ sound/soc/mediatek/mt2701/mt2701-afe-pcm.c | 2 ++ 2 files changed, 4 insertions(+) -- 1.9.1

2 5

[alsa-devel] [PATCH 0/4] ASoC: Intel: Skylake: Enable Geminilake support
by Subhransu S. Prusty 16 Feb '17

16 Feb '17

Geminilake is next gen SoC, enable audio for Geminilake. Geminilake has two different devices connected to the same SSP, so use device_type check to get correct device configuration. Senthilnathan Veppur (1): ASoC: Intel: Skylake: Check device type to get endpoint configuration Vinod Koul (3): ASoC: rt298: Add DMI match for Geminilake reference platform ASoC: Intel: Skylake: Add Geminlake IDs ASoC: hdac_hdmi: Add device id for Geminilake sound/soc/codecs/hdac_hdmi.c | 1 + sound/soc/codecs/rt298.c | 7 +++++++ sound/soc/intel/skylake/skl-messages.c | 7 +++++++ sound/soc/intel/skylake/skl-nhlt.c | 16 ++++++++++------ sound/soc/intel/skylake/skl-topology.c | 32 ++++++++++++++++++++++++++++++-- sound/soc/intel/skylake/skl.c | 7 +++++++ sound/soc/intel/skylake/skl.h | 3 ++- 7 files changed, 64 insertions(+), 9 deletions(-) -- 1.9.1

2 8

[alsa-devel] [PATCH] ALSA: x86: Fix spinlock usage in the trigger callback
by ville.syrjala＠linux.intel.com 16 Feb '17

16 Feb '17

From: Ville Syrjälä <ville.syrjala(a)linux.intel.com> Simply doing 'xset dpms force off' while playback is active seems sufficient to anger lockdep [1]. And it's of course correct that it's not safe to use regular spin_lock() outside the irq handler when the irq handler also wants to acquire the same lock. I believe the trigger callback can get called from both irq and non-irq context, so we need to to use spin_lock_irqsave() & co. here. The whole locking here looks somewhat suspicious, but I don't feel like digging into further, so here's just the minimal fix. [1] [ 168.303913] [drm:ilk_audio_codec_disable [i915]] Disable audio codec on port B, pipe B [ 168.306245] ================================= [ 168.311110] [ INFO: inconsistent lock state ] [ 168.315975] 4.10.0-rc8-ffrd+ #698 Tainted: G W [ 168.322198] --------------------------------- [ 168.327062] inconsistent {IN-HARDIRQ-W} -> {HARDIRQ-ON-W} usage. [ 168.333773] kworker/2:1/44 [HC0[0]:SC0[0]:HE1:SE1] takes: [ 168.339802] (&(&ctx->had_spinlock)->rlock){?.-...}, at: [<ffffffffa02c67e0>] had_pcm_trigger+0x60/0x160 [snd_hdmi_lpe_audio] [ 168.352449] {IN-HARDIRQ-W} state was registered at: [ 168.357901] __lock_acquire+0x7b2/0x16c0 [ 168.362378] lock_acquire+0xba/0x220 [ 168.366468] _raw_spin_lock_irqsave+0x47/0x60 [ 168.371431] had_substream_get+0x23/0x50 [snd_hdmi_lpe_audio] [ 168.377950] display_pipe_interrupt_handler+0x78/0x1a0 [snd_hdmi_lpe_audio] [ 168.385828] __handle_irq_event_percpu+0x3f/0x3a0 [ 168.391180] handle_irq_event_percpu+0x24/0x60 [ 168.396239] handle_irq_event+0x3a/0x60 [ 168.400619] handle_simple_irq+0x79/0xa0 [ 168.405096] generic_handle_irq+0x22/0x30 [ 168.409718] intel_lpe_audio_irq_handler+0x24/0x80 [i915] [ 168.415878] valleyview_irq_handler+0x1da/0x230 [i915] [ 168.421715] __handle_irq_event_percpu+0x3f/0x3a0 [ 168.427067] handle_irq_event_percpu+0x24/0x60 [ 168.432126] handle_irq_event+0x3a/0x60 [ 168.436505] handle_edge_irq+0x94/0x150 [ 168.440886] handle_irq+0xb3/0x190 [ 168.444781] do_IRQ+0x69/0x130 [ 168.448287] ret_from_intr+0x0/0x19 [ 168.452280] cpuidle_enter_state+0xdb/0x360 [ 168.457047] cpuidle_enter+0x17/0x20 [ 168.461136] call_cpuidle+0x23/0x40 [ 168.465126] do_idle+0x18a/0x200 [ 168.468826] cpu_startup_entry+0x1d/0x30 [ 168.473303] rest_init+0x12c/0x140 [ 168.477200] start_kernel+0x402/0x40f [ 168.481385] x86_64_start_reservations+0x2a/0x2c [ 168.486640] x86_64_start_kernel+0xea/0xed [ 168.491313] verify_cpu+0x0/0xfc [ 168.495012] irq event stamp: 28481 [ 168.498810] hardirqs last enabled at (28481): [<ffffffff8167feac>] _raw_spin_unlock_irq+0x2c/0x60 [ 168.508824] hardirqs last disabled at (28480): [<ffffffff8167fcc8>] _raw_spin_lock_irq+0x18/0x60 [ 168.518645] softirqs last enabled at (28442): [<ffffffff815d6cf9>] neigh_periodic_work+0x219/0x320 [ 168.528755] softirqs last disabled at (28438): [<ffffffff815d6b19>] neigh_periodic_work+0x39/0x320 [ 168.538767] other info that might help us debug this: [ 168.546052] Possible unsafe locking scenario: [ 168.552664] CPU0 [ 168.555390] ---- [ 168.558116] lock(&(&ctx->had_spinlock)->rlock); [ 168.563371] <Interrupt> [ 168.566291] lock(&(&ctx->had_spinlock)->rlock); [ 168.571741] *** DEADLOCK *** [ 168.578355] 3 locks held by kworker/2:1/44: [ 168.583025] #0: ("events"){.+.+.+}, at: [<ffffffff810a467f>] process_one_work+0x15f/0x6e0 [ 168.592357] #1: ((&ctx->hdmi_audio_wq)){+.+.+.}, at: [<ffffffff810a467f>] process_one_work+0x15f/0x6e0 [ 168.602959] #2: (&ctx->mutex){+.+.+.}, at: [<ffffffffa02c6ee8>] had_audio_wq+0x48/0x6de [snd_hdmi_lpe_audio] [ 168.614145] stack backtrace: [ 168.619011] CPU: 2 PID: 44 Comm: kworker/2:1 Tainted: G W 4.10.0-rc8-ffrd+ #698 [ 168.628441] Hardware name: Intel Corp. VALLEYVIEW C0 PLATFORM/BYT-T FFD8, BIOS BLAKFF81.X64.0088.R10.1403240443 FFD8_X64_R_2014_13_1_00 03/24/2014 [ 168.643111] Workqueue: events had_audio_wq [snd_hdmi_lpe_audio] [ 168.649725] Call Trace: [ 168.652448] dump_stack+0x67/0x90 [ 168.656149] print_usage_bug+0x20b/0x210 [ 168.660530] mark_lock+0x648/0x6c0 [ 168.664328] ? print_shortest_lock_dependencies+0x1d0/0x1d0 [ 168.670553] __lock_acquire+0x638/0x16c0 [ 168.674935] lock_acquire+0xba/0x220 [ 168.678929] ? had_pcm_trigger+0x60/0x160 [snd_hdmi_lpe_audio] [ 168.685447] _raw_spin_lock+0x3f/0x50 [ 168.689536] ? had_pcm_trigger+0x60/0x160 [snd_hdmi_lpe_audio] [ 168.696054] had_pcm_trigger+0x60/0x160 [snd_hdmi_lpe_audio] [ 168.702383] snd_pcm_do_stop+0x45/0x50 [snd_pcm] [ 168.707545] snd_pcm_action_single+0x32/0x80 [snd_pcm] [ 168.713289] snd_pcm_action+0x118/0x120 [snd_pcm] [ 168.718549] snd_pcm_stop+0x1a/0x20 [snd_pcm] [ 168.723415] had_audio_wq+0x35e/0x6de [snd_hdmi_lpe_audio] [ 168.729545] process_one_work+0x1eb/0x6e0 [ 168.734022] ? process_one_work+0x15f/0x6e0 [ 168.738693] worker_thread+0x4f/0x4a0 [ 168.742781] ? schedule+0x4a/0x90 [ 168.746483] ? preempt_count_sub+0xa6/0x110 [ 168.751154] kthread+0x10e/0x150 [ 168.754757] ? apply_wqattrs_commit+0x90/0x90 [ 168.759621] ? kthread_create_on_node+0x40/0x40 [ 168.764681] ? umh_complete+0x30/0x30 [ 168.768770] ? call_usermodehelper_exec_async+0x13a/0x150 [ 168.774802] ret_from_fork+0x2e/0x40 [ 168.779412] [drm:intel_disable_pipe [i915]] disabling pipe B Cc: Takashi Iwai <tiwai(a)suse.de> Cc: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala(a)linux.intel.com> --- sound/x86/intel_hdmi_audio.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/sound/x86/intel_hdmi_audio.c b/sound/x86/intel_hdmi_audio.c index c0a080e5d1f4..2748766b3f25 100644 --- a/sound/x86/intel_hdmi_audio.c +++ b/sound/x86/intel_hdmi_audio.c @@ -1154,6 +1154,7 @@ static int had_pcm_hw_free(struct snd_pcm_substream *substream) static int had_pcm_trigger(struct snd_pcm_substream *substream, int cmd) { int retval = 0; + unsigned long flags; struct snd_intelhad *intelhaddata; intelhaddata = snd_pcm_substream_chip(substream); @@ -1180,12 +1181,12 @@ static int had_pcm_trigger(struct snd_pcm_substream *substream, int cmd) case SNDRV_PCM_TRIGGER_STOP: case SNDRV_PCM_TRIGGER_PAUSE_PUSH: case SNDRV_PCM_TRIGGER_SUSPEND: - spin_lock(&intelhaddata->had_spinlock); + spin_lock_irqsave(&intelhaddata->had_spinlock, flags); /* Stop reporting BUFFER_DONE/UNDERRUN to above layers */ intelhaddata->stream_info.running = false; - spin_unlock(&intelhaddata->had_spinlock); + spin_unlock_irqrestore(&intelhaddata->had_spinlock, flags); /* Disable Audio */ had_enable_audio(intelhaddata, false); /* Reset buffer pointers */ -- 2.10.2

4 4

[alsa-devel] [PATCH v2 0/6] Move dell-led to drivers/platform/x86
by Michał Kępień 16 Feb '17

16 Feb '17

This patch series moves the dell-led driver from the LED subsystem to the x86 platform driver subsystem. The original motivation behind this effort was to move all code using the dell-smbios module to the x86 platform driver subsystem. While I was investigating the possibilities to do that, it quickly emerged that dell-led can and in fact should be moved to the x86 platform driver subsystem in its entirety. dell-led consists of two major parts: - the part exposing a microphone mute LED interface, introduced in db6d8cc00773 ("dell-led: add mic mute led interface"); this interface is used by sound/pci/hda/dell_wmi_helper.c; while the original implementation used a WMI interface, it was changed to use dell-smbios in cf0d7ea33596 ("dell-led: use dell_smbios_find_token() for finding mic DMI tokens") and 0c41a08e131d ("dell-led: use dell_smbios_send_request() for performing SMBIOS calls"), - the part handling an activity LED present in Dell Latitude 2100 netbooks, introduced in 72dcd8d08aca ("leds: Add Dell Business Class Netbook LED driver"); it binds to a specific WMI GUID and then registers a LED device which is controlled using WMI (i.e. it is essentially a WMI driver). Patches 1 and 2 clean up the microphone mute LED interface to minimize the amount of code moved around. Patch 3 updates a variable name in sound/pci/hda/dell_wmi_helper.c so that it better matches that variable's role. Patch 4 moves the microphone mute LED interface to drivers/platform/x86/dell-laptop.c, effectively causing sound/pci/hda/dell_wmi_helper.c to depend on CONFIG_DELL_LAPTOP instead of CONFIG_LEDS_DELL_NETBOOKS. Patch 5 reverts dell-led to the state it was in after its initial commit 72dcd8d08aca ("leds: Add Dell Business Class Netbook LED driver") by removing all remnants of the microphone mute LED handling code. Patch 6 moves all that is left of dell-led (i.e. the activity LED part, as originally implemented), to a new module which is placed in drivers/platform/x86/dell-wmi-led.c. As all patches except patch 3 in this series affect the LED subsystem, the series is based on linux-leds/for-4.11. Anthony, I would be grateful if you could test this patch series on the Dell machines you have access to that were previously supported by dell-led as Jacek needs a Tested-by from someone to sign off on these changes. Please note the Kconfig option rename done by the last patch. Thanks! Changes from v1: - Squash patches 2-4 from v1 into a single patch (#2 in v2). - Add patch 3. - Fix subject pattern in patch 4. - Slight commit message adjustments, including fixing a typo ("COFIG_LEDS_DELL_NETBOOKS") in patch 6. - Remove the name of the module's source file from the header comment in drivers/platform/x86/dell-wmi-led.c to avoid the need to update it in the future. drivers/leds/Kconfig | 9 --- drivers/leds/Makefile | 1 - drivers/platform/x86/Kconfig | 8 +++ drivers/platform/x86/Makefile | 1 + drivers/platform/x86/dell-laptop.c | 28 ++++++++ .../dell-led.c => platform/x86/dell-wmi-led.c} | 75 ++-------------------- include/linux/dell-led.h | 6 +- sound/pci/hda/dell_wmi_helper.c | 30 ++++----- 8 files changed, 60 insertions(+), 98 deletions(-) rename drivers/{leds/dell-led.c => platform/x86/dell-wmi-led.c} (73%) -- 2.11.0

7 30

[alsa-devel] [PATCH] ASoC: nau8825: automatic BCLK and LRC divde in master mode
by John Hsu 16 Feb '17

16 Feb '17

Provide the automatic configurable LRC and BCLK divide. The driver will make configurations of LRC and BCLK automatically according to BCLK and FS information in master mode. Signed-off-by: John Hsu <KCHSU0(a)nuvoton.com> --- sound/soc/codecs/nau8825.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/nau8825.c b/sound/soc/codecs/nau8825.c index 4576f98..97fbeba 100644 --- a/sound/soc/codecs/nau8825.c +++ b/sound/soc/codecs/nau8825.c @@ -1231,7 +1231,7 @@ static int nau8825_hw_params(struct snd_pcm_substream *substream, { struct snd_soc_codec *codec = dai->codec; struct nau8825 *nau8825 = snd_soc_codec_get_drvdata(codec); - unsigned int val_len = 0, osr; + unsigned int val_len = 0, osr, ctrl_val, bclk_fs, bclk_div; nau8825_sema_acquire(nau8825, 3 * HZ); @@ -1261,6 +1261,24 @@ static int nau8825_hw_params(struct snd_pcm_substream *substream, osr_adc_sel[osr].clk_src << NAU8825_CLK_ADC_SRC_SFT); } + /* make BCLK and LRC divde configuration if the codec as master. */ + regmap_read(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2, &ctrl_val); + if (ctrl_val & NAU8825_I2S_MS_MASTER) { + /* get the bclk and fs ratio */ + bclk_fs = snd_soc_params_to_bclk(params) / params_rate(params); + if (bclk_fs <= 32) + bclk_div = 2; + else if (bclk_fs <= 64) + bclk_div = 1; + else if (bclk_fs <= 128) + bclk_div = 0; + else + return -EINVAL; + regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2, + NAU8825_I2S_LRC_DIV_MASK | NAU8825_I2S_BLK_DIV_MASK, + ((bclk_div + 1) << NAU8825_I2S_LRC_DIV_SFT) | bclk_div); + } + switch (params_width(params)) { case 16: val_len |= NAU8825_I2S_DL_16; -- 2.6.4 =========================================================================================== The privileged confidential information contained in this email is intended for use only by the addressees as indicated by the original sender of this email. If you are not the addressee indicated in this email or are not responsible for delivery of the email to such a person, please kindly reply to the sender indicating this fact and delete all copies of it from your computer and network server immediately. Your cooperation is highly appreciated. It is advised that any unauthorized use of confidential information of Nuvoton is strictly prohibited; and any information in this email irrelevant to the official business of Nuvoton shall be deemed as neither given nor endorsed by Nuvoton.

2 3

[alsa-devel] [PATCH v8 1/1] ALSA: Tascam US-16x08 DSP mixer quirk
by OnkelDead 16 Feb '17

16 Feb '17

Remove superfluous code Add mixer quirk for Tascam US-16x08 usb interface. Even that this an usb compliant device, the input channels and DSP functions (EQ/Compressor) arn't accessible by default. Signed-off-by: Detlef Urban <onkel(a)paraair.de> --- sound/usb/Makefile | 1 + sound/usb/mixer_quirks.c | 5 + sound/usb/mixer_us16x08.c | 1422 +++++++++++++++++++++++++++++++++++++++++++++ sound/usb/mixer_us16x08.h | 122 ++++ 4 files changed, 1550 insertions(+) create mode 100644 sound/usb/mixer_us16x08.c create mode 100644 sound/usb/mixer_us16x08.h diff --git a/sound/usb/Makefile b/sound/usb/Makefile index 2d2d122..42cb33b 100644 --- a/sound/usb/Makefile +++ b/sound/usb/Makefile @@ -10,6 +10,7 @@ snd-usb-audio-objs := card.o \ mixer.o \ mixer_quirks.o \ mixer_scarlett.o \ + mixer_us16x08.o \ pcm.o \ proc.o \ quirks.o \ diff --git a/sound/usb/mixer_quirks.c b/sound/usb/mixer_quirks.c index 04991b0..4fa0053 100644 --- a/sound/usb/mixer_quirks.c +++ b/sound/usb/mixer_quirks.c @@ -43,6 +43,7 @@ #include "mixer.h" #include "mixer_quirks.h" #include "mixer_scarlett.h" +#include "mixer_us16x08.h" #include "helper.h" extern struct snd_kcontrol_new *snd_usb_feature_unit_ctl; @@ -1729,6 +1730,10 @@ int snd_usb_mixer_apply_create_quirk(struct usb_mixer_interface *mixer) return err; switch (mixer->chip->usb_id) { + /* Tascam US-16x08 */ + case USB_ID(0x0644, 0x8047): + err = snd_us16x08_controls_create(mixer); + break; case USB_ID(0x041e, 0x3020): case USB_ID(0x041e, 0x3040): case USB_ID(0x041e, 0x3042): diff --git a/sound/usb/mixer_us16x08.c b/sound/usb/mixer_us16x08.c new file mode 100644 index 0000000..4f6f93a --- /dev/null +++ b/sound/usb/mixer_us16x08.c @@ -0,0 +1,1422 @@ +/* + * Tascam US-16x08 ALSA driver + * + * Copyright (c) 2016 by Detlef Urban (onkel(a)paraair.de) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <linux/slab.h> +#include <linux/usb.h> +#include <linux/usb/audio-v2.h> + +#include <sound/core.h> +#include <sound/control.h> + +#include "usbaudio.h" +#include "mixer.h" +#include "helper.h" + +#include "mixer_us16x08.h" + +/* USB control message templates */ +static char route_msg[] = { + 0x61, + 0x02, + 0x03, /* input from master (0x02) or input from computer bus (0x03) */ + 0x62, + 0x02, + 0x01, /* input index (0x01/0x02 eq. left/right) or bus (0x01-0x08) */ + 0x41, + 0x01, + 0x61, + 0x02, + 0x01, + 0x62, + 0x02, + 0x01, /* output index (0x01-0x08) */ + 0x42, + 0x01, + 0x43, + 0x01, + 0x00, + 0x00 +}; + +static char mix_init_msg1[] = { + 0x71, 0x01, 0x00, 0x00 +}; + +static char mix_init_msg2[] = { + 0x62, 0x02, 0x00, 0x61, 0x02, 0x04, 0xb1, 0x01, 0x00, 0x00 +}; + +static char mix_msg_in[] = { + /* default message head, equal to all mixers */ + 0x61, 0x02, 0x04, 0x62, 0x02, 0x01, + 0x81, /* 0x06: Controller ID */ + 0x02, /* 0x07: */ + 0x00, /* 0x08: Value of common mixer */ + 0x00, + 0x00 +}; + +static char mix_msg_out[] = { + /* default message head, equal to all mixers */ + 0x61, 0x02, 0x02, 0x62, 0x02, 0x01, + 0x81, /* 0x06: Controller ID */ + 0x02, /* 0x07: */ + 0x00, /* 0x08: Value of common mixer */ + 0x00, + 0x00 +}; + +static char bypass_msg_out[] = { + 0x45, + 0x02, + 0x01, /* on/off flag */ + 0x00, + 0x00 +}; + +static char bus_msg_out[] = { + 0x44, + 0x02, + 0x01, /* on/off flag */ + 0x00, + 0x00 +}; + +static char comp_msg[] = { + /* default message head, equal to all mixers */ + 0x61, 0x02, 0x04, 0x62, 0x02, 0x01, + 0x91, + 0x02, + 0xf0, /* 0x08: Threshold db (8) (e0 ... 00) (+-0dB -- -32dB) x-32 */ + 0x92, + 0x02, + 0x0a, /* 0x0b: Ratio (0a,0b,0d,0f,11,14,19,1e,23,28,32,3c,50,a0,ff) */ + 0x93, + 0x02, + 0x02, /* 0x0e: Attack (0x02 ... 0xc0) (2ms ... 200ms) */ + 0x94, + 0x02, + 0x01, /* 0x11: Release (0x01 ... 0x64) (10ms ... 1000ms) x*10 */ + 0x95, + 0x02, + 0x03, /* 0x14: gain (0 ... 20) (0dB .. 20dB) */ + 0x96, + 0x02, + 0x01, + 0x97, + 0x02, + 0x01, /* 0x1a: main Comp switch (0 ... 1) (off ... on)) */ + 0x00, + 0x00 +}; + +static char eqs_msq[] = { + /* default message head, equal to all mixers */ + 0x61, 0x02, 0x04, 0x62, 0x02, 0x01, + 0x51, /* 0x06: Controller ID */ + 0x02, + 0x04, /* 0x08: EQ set num (0x01..0x04) (LOW, LOWMID, HIGHMID, HIGH)) */ + 0x52, + 0x02, + 0x0c, /* 0x0b: value dB (0 ... 12) (-12db .. +12db) x-6 */ + 0x53, + 0x02, + 0x0f, /* 0x0e: value freq (32-47) (1.7kHz..18kHz) */ + 0x54, + 0x02, + 0x02, /* 0x11: band width (0-6) (Q16-Q0.25) 2^x/4 (EQ xxMID only) */ + 0x55, + 0x02, + 0x01, /* 0x14: main EQ switch (0 ... 1) (off ... on)) */ + 0x00, + 0x00 +}; + +/* compressor ratio map */ +static char ratio_map[] = { + 0x0a, 0x0b, 0x0d, 0x0f, 0x11, 0x14, 0x19, 0x1e, + 0x23, 0x28, 0x32, 0x3c, 0x50, 0xa0, 0xff +}; + +/* route enumeration names */ +const char *route_names[] = { + "Master Left", "Master Right", "Output 1", "Output 2", "Output 3", + "Output 4", "Output 5", "Output 6", "Output 7", "Output 8", +}; + +static int snd_us16x08_recv_urb(struct snd_usb_audio *chip, + unsigned char *buf, int size) +{ + + mutex_lock(&chip->mutex); + snd_usb_ctl_msg(chip->dev, + usb_rcvctrlpipe(chip->dev, 0), + SND_US16X08_URB_METER_REQUEST, + SND_US16X08_URB_METER_REQUESTTYPE, 0, 0, buf, size); + mutex_unlock(&chip->mutex); + return 0; +} + +/* wrapper function to send prepared URB buffer to usb device. Return an error + * code if something went wrong + */ +static int snd_us16x08_send_urb(struct snd_usb_audio *chip, char *buf, int size) +{ + int err = 0; + + if (chip) { + err = snd_usb_ctl_msg(chip->dev, usb_sndctrlpipe(chip->dev, 0), + SND_US16X08_URB_REQUEST, SND_US16X08_URB_REQUESTTYPE, + 0, 0, buf, size); + } + + return err; +} + +static int snd_us16x08_route_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + return snd_ctl_enum_info(uinfo, 1, 10, route_names); +} + +static int snd_us16x08_route_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + int index = ucontrol->id.index; + + /* route has no bias */ + ucontrol->value.integer.value[0] = elem->cache_val[index]; + + return 0; +} + +static int snd_us16x08_route_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + int index = ucontrol->id.index; + char buf[sizeof(route_msg)]; + int val, val_org, err = 0; + + /* prepare the message buffer from template */ + memcpy(buf, route_msg, sizeof(route_msg)); + + /* get the new value (no bias for routes) */ + val = ucontrol->value.integer.value[0]; + if (val < 2) { + /* input comes from a master channel */ + val_org = val; + buf[2] = 0x02; + } else { + /* input comes from a computer channel */ + buf[2] = 0x03; + val_org = val - 2; + } + + /* place new route selection in URB message */ + buf[5] = (unsigned char) (val_org & 0x0f) + 1; + /* place route selector in URB message */ + buf[13] = index + 1; + + err = snd_us16x08_send_urb(chip, buf, sizeof(route_msg)); + + if (err > 0) { + elem->cached |= 1 << index; + elem->cache_val[index] = val; + } else { + usb_audio_dbg(chip, "Failed to set routing, err:%d\n", err); + } + + return err > 0 ? 1 : 0; +} + +static int snd_us16x08_master_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->count = 1; + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->value.integer.max = SND_US16X08_KCMAX(kcontrol); + uinfo->value.integer.min = SND_US16X08_KCMIN(kcontrol); + uinfo->value.integer.step = SND_US16X08_KCSTEP(kcontrol); + return 0; +} + +static int snd_us16x08_master_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + int index = ucontrol->id.index; + + ucontrol->value.integer.value[0] = elem->cache_val[index]; + + return 0; +} + +static int snd_us16x08_master_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + char buf[sizeof(mix_msg_out)]; + int val, err = 0; + int index = ucontrol->id.index; + + /* prepare the message buffer from template */ + memcpy(buf, mix_msg_out, sizeof(mix_msg_out)); + + /* new control value incl. bias*/ + val = ucontrol->value.integer.value[0]; + + buf[8] = val - SND_US16X08_KCBIAS(kcontrol); + buf[6] = elem->head.id; + + /* place channel selector in URB message */ + buf[5] = index + 1; + err = snd_us16x08_send_urb(chip, buf, sizeof(mix_msg_out)); + + if (err > 0) { + elem->cached |= 1 << index; + elem->cache_val[index] = val; + } else { + usb_audio_dbg(chip, "Failed to set master, err:%d\n", err); + } + + return err > 0 ? 1 : 0; +} + +static int snd_us16x08_bus_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + char buf[sizeof(mix_msg_out)]; + int val, err = 0; + + val = ucontrol->value.integer.value[0]; + + /* prepare the message buffer from template */ + switch (elem->head.id) { + case SND_US16X08_ID_BYPASS: + memcpy(buf, bypass_msg_out, sizeof(bypass_msg_out)); + buf[2] = val; + err = snd_us16x08_send_urb(chip, buf, sizeof(bypass_msg_out)); + break; + case SND_US16X08_ID_BUSS_OUT: + memcpy(buf, bus_msg_out, sizeof(bus_msg_out)); + buf[2] = val; + err = snd_us16x08_send_urb(chip, buf, sizeof(bus_msg_out)); + break; + case SND_US16X08_ID_MUTE: + memcpy(buf, mix_msg_out, sizeof(mix_msg_out)); + buf[8] = val; + buf[6] = elem->head.id; + buf[5] = 1; + err = snd_us16x08_send_urb(chip, buf, sizeof(mix_msg_out)); + break; + } + + if (err > 0) { + elem->cached |= 1; + elem->cache_val[0] = val; + } else { + usb_audio_dbg(chip, "Failed to set buss param, err:%d\n", err); + } + + return err > 0 ? 1 : 0; +} + +static int snd_us16x08_bus_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + + switch (elem->head.id) { + case SND_US16X08_ID_BUSS_OUT: + ucontrol->value.integer.value[0] = elem->cache_val[0]; + break; + case SND_US16X08_ID_BYPASS: + ucontrol->value.integer.value[0] = elem->cache_val[0]; + break; + case SND_US16X08_ID_MUTE: + ucontrol->value.integer.value[0] = elem->cache_val[0]; + break; + } + + return 0; +} + +/* gets a current mixer value from common store */ +static int snd_us16x08_channel_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + int index = ucontrol->id.index; + + ucontrol->value.integer.value[0] = elem->cache_val[index]; + + return 0; +} + +static int snd_us16x08_channel_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + char buf[sizeof(mix_msg_in)]; + int val, err; + int index = ucontrol->id.index; + + /* prepare URB message from template */ + memcpy(buf, mix_msg_in, sizeof(mix_msg_in)); + + val = ucontrol->value.integer.value[0]; + + /* add the bias to the new value */ + buf[8] = val - SND_US16X08_KCBIAS(kcontrol); + buf[6] = elem->head.id; + buf[5] = index + 1; + + err = snd_us16x08_send_urb(chip, buf, sizeof(mix_msg_in)); + + if (err > 0) { + elem->cached |= 1 << index; + elem->cache_val[index] = val; + } else { + usb_audio_dbg(chip, "Failed to set channel, err:%d\n", err); + } + + return err > 0 ? 1 : 0; +} + +static int snd_us16x08_mix_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->count = 1; + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->value.integer.max = SND_US16X08_KCMAX(kcontrol); + uinfo->value.integer.min = SND_US16X08_KCMIN(kcontrol); + uinfo->value.integer.step = SND_US16X08_KCSTEP(kcontrol); + return 0; +} + +static int snd_us16x08_comp_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_us16x08_comp_store *store = + ((struct snd_us16x08_comp_store *) elem->private_data); + int index = ucontrol->id.index; + int val_idx = COMP_STORE_IDX(elem->head.id); + + ucontrol->value.integer.value[0] = store->val[val_idx][index]; + + return 0; +} + +static int snd_us16x08_comp_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_comp_store *store = + ((struct snd_us16x08_comp_store *) elem->private_data); + int index = ucontrol->id.index; + char buf[sizeof(comp_msg)]; + int val_idx, val; + int err = 0; + + /* prepare compressor URB message from template */ + memcpy(buf, comp_msg, sizeof(comp_msg)); + + /* new control value incl. bias*/ + val_idx = elem->head.id - SND_US16X08_ID_COMP_BASE; + + val = ucontrol->value.integer.value[0]; + store->val[val_idx][index] = ucontrol->value.integer.value[0]; + + /* place comp values in message buffer watch bias! */ + buf[8] = store->val[ + COMP_STORE_IDX(SND_US16X08_ID_COMP_THRESHOLD)][index] + - SND_US16X08_COMP_THRESHOLD_BIAS; + buf[11] = ratio_map[store->val[ + COMP_STORE_IDX(SND_US16X08_ID_COMP_RATIO)][index]]; + buf[14] = store->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_ATTACK)][index] + + SND_US16X08_COMP_ATTACK_BIAS; + buf[17] = store->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_RELEASE)][index] + + SND_US16X08_COMP_RELEASE_BIAS; + buf[20] = store->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_GAIN)][index]; + buf[26] = store->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_SWITCH)][index]; + + /* place channel selector in message buffer */ + buf[5] = index + 1; + + err = snd_us16x08_send_urb(chip, buf, sizeof(comp_msg)); + + if (err > 0) { + elem->cached |= 1 << index; + elem->cache_val[index] = val; + } else { + usb_audio_dbg(chip, "Failed to set compressor, err:%d\n", err); + } + + return 1; +} + +static int snd_us16x08_eqswitch_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int val = 0; + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_us16x08_eq_store *store = + ((struct snd_us16x08_eq_store *) elem->private_data); + int index = ucontrol->id.index; + + /* get low switch from cache is enough, cause all bands are together */ + val = store->val[EQ_STORE_BAND_IDX(elem->head.id)] + [EQ_STORE_PARAM_IDX(elem->head.id)][index]; + ucontrol->value.integer.value[0] = val; + + return 0; +} + +static int snd_us16x08_eqswitch_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_eq_store *store = + ((struct snd_us16x08_eq_store *) elem->private_data); + int index = ucontrol->id.index; + + char buf[sizeof(eqs_msq)]; + int val, err = 0; + int b_idx; + + /* new control value incl. bias*/ + val = ucontrol->value.integer.value[0] + SND_US16X08_KCBIAS(kcontrol); + + /* prepare URB message from EQ template */ + memcpy(buf, eqs_msq, sizeof(eqs_msq)); + + /* place channel index in URB message */ + buf[5] = index + 1; + for (b_idx = 0; b_idx < SND_US16X08_ID_EQ_BAND_COUNT; b_idx++) { + /* all four EQ bands have to be enabled/disabled in once */ + buf[20] = val; + buf[17] = store->val[b_idx][2][index]; + buf[14] = store->val[b_idx][1][index]; + buf[11] = store->val[b_idx][0][index]; + buf[8] = b_idx + 1; + err = snd_us16x08_send_urb(chip, buf, sizeof(eqs_msq)); + if (err < 0) + break; + store->val[b_idx][3][index] = val; + msleep(15); + } + + if (err > 0) { + elem->cached |= 1 << index; + elem->cache_val[index] = val; + } else { + usb_audio_dbg(chip, "Failed to set eq switch, err:%d\n", err); + } + + return 1; +} + +static int snd_us16x08_eq_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int val = 0; + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_us16x08_eq_store *store = + ((struct snd_us16x08_eq_store *) elem->private_data); + int index = ucontrol->id.index; + int b_idx = EQ_STORE_BAND_IDX(elem->head.id) - 1; + int p_idx = EQ_STORE_PARAM_IDX(elem->head.id); + + val = store->val[b_idx][p_idx][index]; + + ucontrol->value.integer.value[0] = val; + + return 0; +} + +static int snd_us16x08_eq_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_eq_store *store = + ((struct snd_us16x08_eq_store *) elem->private_data); + int index = ucontrol->id.index; + char buf[sizeof(eqs_msq)]; + int val, err = 0; + int b_idx = EQ_STORE_BAND_IDX(elem->head.id) - 1; + int p_idx = EQ_STORE_PARAM_IDX(elem->head.id); + + /* copy URB buffer from EQ template */ + memcpy(buf, eqs_msq, sizeof(eqs_msq)); + + val = ucontrol->value.integer.value[0]; + + store->val[b_idx][p_idx][index] = val; + buf[20] = store->val[b_idx][3][index]; + buf[17] = store->val[b_idx][2][index]; + buf[14] = store->val[b_idx][1][index]; + buf[11] = store->val[b_idx][0][index]; + + /* place channel index in URB buffer */ + buf[5] = index + 1; + + /* place EQ band in URB buffer */ + buf[8] = b_idx + 1; + + err = snd_us16x08_send_urb(chip, buf, sizeof(eqs_msq)); + + if (err > 0) { + /* store new value in EQ band cache */ + elem->cached |= 1 << index; + elem->cache_val[index] = val; + } else { + usb_audio_dbg(chip, "Failed to set eq param, err:%d\n", err); + } + + return 1; +} + +static int snd_us16x08_meter_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->count = 1; + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->value.integer.max = 0x7FFF; + uinfo->value.integer.min = 0; + + return 0; +} + +/* calculate compressor index for reduction level request */ +static int snd_get_meter_comp_index(struct snd_us16x08_meter_store *store) +{ + int ret; + + /* any channel active */ + if (store->comp_active_index) { + /* check for stereo link */ + if (store->comp_active_index & 0x20) { + /* reset comp_index to left channel*/ + if (store->comp_index - + store->comp_active_index > 1) + store->comp_index = + store->comp_active_index; + + ret = store->comp_index++ & 0x1F; + } else { + /* no stereo link */ + ret = store->comp_active_index; + } + } else { + /* skip channels with no compressor active */ + while (!store->comp_store->val[ + COMP_STORE_IDX(SND_US16X08_ID_COMP_SWITCH)] + [store->comp_index - 1] + && store->comp_index <= SND_US16X08_MAX_CHANNELS) { + store->comp_index++; + } + ret = store->comp_index++; + if (store->comp_index > SND_US16X08_MAX_CHANNELS) + store->comp_index = 1; + } + return ret; +} + +/* retrieve the meter level values from URB message */ +static void get_meter_levels_from_urb(int s, + struct snd_us16x08_meter_store *store, + u8 *meter_urb) +{ + int val = MUC2(meter_urb, s) + (MUC3(meter_urb, s) << 8); + + if (MUA0(meter_urb, s) == 0x61 && MUA1(meter_urb, s) == 0x02 && + MUA2(meter_urb, s) == 0x04 && MUB0(meter_urb, s) == 0x62) { + if (MUC0(meter_urb, s) == 0x72) + store->meter_level[MUB2(meter_urb, s) - 1] = val; + if (MUC0(meter_urb, s) == 0xb2) + store->comp_level[MUB2(meter_urb, s) - 1] = val; + } + if (MUA0(meter_urb, s) == 0x61 && MUA1(meter_urb, s) == 0x02 && + MUA2(meter_urb, s) == 0x02 && MUB0(meter_urb, s) == 0x62) + store->master_level[MUB2(meter_urb, s) - 1] = val; +} + +/* Function to retrieve current meter values from the device. + * + * The device needs to be polled for meter values with an initial + * requests. It will return with a sequence of different meter value + * packages. The first request (case 0:) initiate this meter response sequence. + * After the third response, an additional request can be placed, + * to retrieve compressor reduction level value for given channel. This round + * trip channel selector will skip all inactive compressors. + * A mixer can interrupt this round-trip by selecting one ore two (stereo-link) + * specific channels. + */ +static int snd_us16x08_meter_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int i, set; + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_meter_store *store = elem->private_data; + u8 meter_urb[64]; + + + if (elem) { + store = (struct snd_us16x08_meter_store *) elem->private_data; + chip = elem->head.mixer->chip; + } else + return 0; + + switch (kcontrol->private_value) { + case 0: + snd_us16x08_send_urb(chip, mix_init_msg1, 4); + snd_us16x08_recv_urb(chip, meter_urb, + sizeof(meter_urb)); + kcontrol->private_value++; + break; + case 1: + snd_us16x08_recv_urb(chip, meter_urb, + sizeof(meter_urb)); + kcontrol->private_value++; + break; + case 2: + snd_us16x08_recv_urb(chip, meter_urb, + sizeof(meter_urb)); + kcontrol->private_value++; + break; + case 3: + mix_init_msg2[2] = snd_get_meter_comp_index(store); + snd_us16x08_send_urb(chip, mix_init_msg2, 10); + snd_us16x08_recv_urb(chip, meter_urb, + sizeof(meter_urb)); + kcontrol->private_value = 0; + break; + } + + for (set = 0; set < 6; set++) + get_meter_levels_from_urb(set, store, meter_urb); + + for (i = 0; i < SND_US16X08_MAX_CHANNELS; i++) { + ucontrol->value.integer.value[i] = + store ? store->meter_level[i] : 0; + } + + ucontrol->value.integer.value[i++] = store ? store->master_level[0] : 0; + ucontrol->value.integer.value[i++] = store ? store->master_level[1] : 0; + + for (i = 2; i < SND_US16X08_MAX_CHANNELS + 2; i++) + ucontrol->value.integer.value[i + SND_US16X08_MAX_CHANNELS] = + store ? store->comp_level[i - 2] : 0; + + return 1; +} + +static int snd_us16x08_meter_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_us16x08_meter_store *store = elem->private_data; + int val; + + val = ucontrol->value.integer.value[0]; + store->comp_active_index = val; + store->comp_index = val; + + return 1; +} + +static struct snd_kcontrol_new snd_us16x08_ch_boolean_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_switch_info, + .get = snd_us16x08_channel_get, + .put = snd_us16x08_channel_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 1) +}; + +static struct snd_kcontrol_new snd_us16x08_ch_int_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_channel_get, + .put = snd_us16x08_channel_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_FADER_BIAS, 1, 0, 133) +}; + +static struct snd_kcontrol_new snd_us16x08_master_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 1, + .info = snd_us16x08_master_info, + .get = snd_us16x08_master_get, + .put = snd_us16x08_master_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_FADER_BIAS, 1, 0, 133) +}; + +static struct snd_kcontrol_new snd_us16x08_route_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 8, + .info = snd_us16x08_route_info, + .get = snd_us16x08_route_get, + .put = snd_us16x08_route_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 9) +}; + +static struct snd_kcontrol_new snd_us16x08_bus_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 1, + .info = snd_us16x08_switch_info, + .get = snd_us16x08_bus_get, + .put = snd_us16x08_bus_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 1) +}; + +static struct snd_kcontrol_new snd_us16x08_compswitch_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_switch_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 1) +}; + +static struct snd_kcontrol_new snd_us16x08_comp_threshold_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_COMP_THRESHOLD_BIAS, 1, + 0, 0x20) +}; + +static struct snd_kcontrol_new snd_us16x08_comp_ratio_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, + sizeof(ratio_map) - 1), /*max*/ +}; + +static struct snd_kcontrol_new snd_us16x08_comp_gain_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 0x14) +}; + +static struct snd_kcontrol_new snd_us16x08_comp_attack_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = + SND_US16X08_KCSET(SND_US16X08_COMP_ATTACK_BIAS, 1, 0, 0xc6), +}; + +static struct snd_kcontrol_new snd_us16x08_comp_release_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = + SND_US16X08_KCSET(SND_US16X08_COMP_RELEASE_BIAS, 1, 0, 0x63), +}; + +static struct snd_kcontrol_new snd_us16x08_eq_gain_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 24), +}; + +static struct snd_kcontrol_new snd_us16x08_eq_low_freq_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 0x1F), +}; + +static struct snd_kcontrol_new snd_us16x08_eq_mid_freq_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 0x3F) +}; + +static struct snd_kcontrol_new snd_us16x08_eq_mid_width_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 0x06) +}; + +static struct snd_kcontrol_new snd_us16x08_eq_high_freq_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = + SND_US16X08_KCSET(SND_US16X08_EQ_HIGHFREQ_BIAS, 1, 0, 0x1F) +}; + +static struct snd_kcontrol_new snd_us16x08_eq_switch_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_switch_info, + .get = snd_us16x08_eqswitch_get, + .put = snd_us16x08_eqswitch_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 1) +}; + +static struct snd_kcontrol_new snd_us16x08_meter_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 1, + .info = snd_us16x08_meter_info, + .get = snd_us16x08_meter_get, + .put = snd_us16x08_meter_put +}; + +/* control store preparation */ + +/* setup compressor store and assign default value */ +static struct snd_us16x08_comp_store *snd_us16x08_create_comp_store(void) +{ + int i = 0; + struct snd_us16x08_comp_store *tmp = + kmalloc(sizeof(struct snd_us16x08_comp_store), GFP_KERNEL); + + if (tmp == NULL) + return NULL; + + for (i = 0; i < SND_US16X08_MAX_CHANNELS; i++) { + tmp->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_THRESHOLD)][i] + = 0x20; + tmp->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_RATIO)][i] = 0x00; + tmp->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_GAIN)][i] = 0x00; + tmp->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_SWITCH)][i] = 0x00; + tmp->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_ATTACK)][i] = 0x00; + tmp->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_RELEASE)][i] = 0x00; + } + return tmp; +} + +/* setup EQ store and assign default values */ +static struct snd_us16x08_eq_store *snd_us16x08_create_eq_store(void) +{ + int i, b_idx; + struct snd_us16x08_eq_store *tmp = + kmalloc(sizeof(struct snd_us16x08_eq_store), GFP_KERNEL); + + if (tmp == NULL) + return NULL; + + for (i = 0; i < SND_US16X08_MAX_CHANNELS; i++) { + for (b_idx = 0; b_idx < SND_US16X08_ID_EQ_BAND_COUNT; b_idx++) { + tmp->val[b_idx][0][i] = 0x0c; + tmp->val[b_idx][3][i] = 0x00; + switch (b_idx) { + case 0: /* EQ Low */ + tmp->val[b_idx][1][i] = 0x05; + tmp->val[b_idx][2][i] = 0xff; + break; + case 1: /* EQ Mid low */ + tmp->val[b_idx][1][i] = 0x0e; + tmp->val[b_idx][2][i] = 0x02; + break; + case 2: /* EQ Mid High */ + tmp->val[b_idx][1][i] = 0x1b; + tmp->val[b_idx][2][i] = 0x02; + break; + case 3: /* EQ High */ + tmp->val[b_idx][1][i] = 0x2f + - SND_US16X08_EQ_HIGHFREQ_BIAS; + tmp->val[b_idx][2][i] = 0xff; + break; + } + } + } + return tmp; +} + +struct snd_us16x08_meter_store *snd_us16x08_create_meter_store(void) +{ + struct snd_us16x08_meter_store *tmp = + kzalloc(sizeof(struct snd_us16x08_meter_store), GFP_KERNEL); + + if (!tmp) + return NULL; + tmp->comp_index = 1; + tmp->comp_active_index = 0; + return tmp; + +} + +static int add_new_ctl(struct usb_mixer_interface *mixer, + const struct snd_kcontrol_new *ncontrol, + int index, int val_type, int channels, + const char *name, const void *opt, + void (*freeer)(struct snd_kcontrol *kctl), + struct usb_mixer_elem_info **elem_ret) +{ + struct snd_kcontrol *kctl; + struct usb_mixer_elem_info *elem; + int err; + + usb_audio_dbg(mixer->chip, "us16x08 add mixer %s\n", name); + + elem = kzalloc(sizeof(*elem), GFP_KERNEL); + if (!elem) + return -ENOMEM; + + elem->head.mixer = mixer; + elem->head.resume = NULL; + elem->control = 0; + elem->idx_off = 0; + elem->head.id = index; + elem->val_type = val_type; + elem->channels = channels; + elem->private_data = (void *) opt; + + kctl = snd_ctl_new1(ncontrol, elem); + if (!kctl) { + kfree(elem); + return -ENOMEM; + } + + kctl->private_free = freeer; + + strlcpy(kctl->id.name, name, sizeof(kctl->id.name)); + + err = snd_usb_mixer_add_control(&elem->head, kctl); + if (err < 0) + return err; + + if (elem_ret) + *elem_ret = elem; + + return 0; +} + +static struct snd_us16x08_control_params control_params; + +/* table of EQ controls */ +static struct snd_us16x08_control_params eq_controls[] = { + { /* EQ switch */ + .kcontrol_new = &snd_us16x08_eq_switch_ctl, + .control_id = SND_US16X08_ID_EQENABLE, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "EQ Switch", + .freeer = snd_usb_mixer_elem_free + }, + { /* EQ low gain */ + .kcontrol_new = &snd_us16x08_eq_gain_ctl, + .control_id = SND_US16X08_ID_EQLOWLEVEL, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ Low Volume", + .freeer = snd_usb_mixer_elem_free + }, + { /* EQ low freq */ + .kcontrol_new = &snd_us16x08_eq_low_freq_ctl, + .control_id = SND_US16X08_ID_EQLOWFREQ, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ Low Frequence", + .freeer = NULL + }, + { /* EQ mid low gain */ + .kcontrol_new = &snd_us16x08_eq_gain_ctl, + .control_id = SND_US16X08_ID_EQLOWMIDLEVEL, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ MidLow Volume", + .freeer = snd_usb_mixer_elem_free + }, + { /* EQ mid low freq */ + .kcontrol_new = &snd_us16x08_eq_mid_freq_ctl, + .control_id = SND_US16X08_ID_EQLOWMIDFREQ, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ MidLow Frequence", + .freeer = NULL + }, + { /* EQ mid low Q */ + .kcontrol_new = &snd_us16x08_eq_mid_width_ctl, + .control_id = SND_US16X08_ID_EQLOWMIDWIDTH, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ MidQLow Q", + .freeer = NULL + }, + { /* EQ mid high gain */ + .kcontrol_new = &snd_us16x08_eq_gain_ctl, + .control_id = SND_US16X08_ID_EQHIGHMIDLEVEL, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ MidHigh Volume", + .freeer = snd_usb_mixer_elem_free + }, + { /* EQ mid high freq */ + .kcontrol_new = &snd_us16x08_eq_mid_freq_ctl, + .control_id = SND_US16X08_ID_EQHIGHMIDFREQ, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ MidHigh Frequence", + .freeer = NULL + }, + { /* EQ mid high Q */ + .kcontrol_new = &snd_us16x08_eq_mid_width_ctl, + .control_id = SND_US16X08_ID_EQHIGHMIDWIDTH, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ MidHigh Q", + .freeer = NULL + }, + { /* EQ high gain */ + .kcontrol_new = &snd_us16x08_eq_gain_ctl, + .control_id = SND_US16X08_ID_EQHIGHLEVEL, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ High Volume", + .freeer = snd_usb_mixer_elem_free + }, + { /* EQ low freq */ + .kcontrol_new = &snd_us16x08_eq_high_freq_ctl, + .control_id = SND_US16X08_ID_EQHIGHFREQ, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ High Frequence", + .freeer = NULL + }, +}; + +/* table of compressor controls */ +static struct snd_us16x08_control_params comp_controls[] = { + { /* Comp enable */ + .kcontrol_new = &snd_us16x08_compswitch_ctl, + .control_id = SND_US16X08_ID_COMP_SWITCH, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "Compressor Switch", + .freeer = snd_usb_mixer_elem_free + }, + { /* Comp threshold */ + .kcontrol_new = &snd_us16x08_comp_threshold_ctl, + .control_id = SND_US16X08_ID_COMP_THRESHOLD, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Compressor Threshold Volume", + .freeer = NULL + }, + { /* Comp ratio */ + .kcontrol_new = &snd_us16x08_comp_ratio_ctl, + .control_id = SND_US16X08_ID_COMP_RATIO, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Compressor Ratio", + .freeer = NULL + }, + { /* Comp attack */ + .kcontrol_new = &snd_us16x08_comp_attack_ctl, + .control_id = SND_US16X08_ID_COMP_ATTACK, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Compressor Attack", + .freeer = NULL + }, + { /* Comp release */ + .kcontrol_new = &snd_us16x08_comp_release_ctl, + .control_id = SND_US16X08_ID_COMP_RELEASE, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Compressor Release", + .freeer = NULL + }, + { /* Comp gain */ + .kcontrol_new = &snd_us16x08_comp_gain_ctl, + .control_id = SND_US16X08_ID_COMP_GAIN, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Compressor Volume", + .freeer = NULL + }, +}; + +/* table of channel controls */ +static struct snd_us16x08_control_params channel_controls[] = { + { /* Phase */ + .kcontrol_new = &snd_us16x08_ch_boolean_ctl, + .control_id = SND_US16X08_ID_PHASE, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "Phase Switch", + .freeer = snd_usb_mixer_elem_free, + .default_val = 0 + }, + { /* Fader */ + .kcontrol_new = &snd_us16x08_ch_int_ctl, + .control_id = SND_US16X08_ID_FADER, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Line Volume", + .freeer = NULL, + .default_val = 127 + }, + { /* Mute */ + .kcontrol_new = &snd_us16x08_ch_boolean_ctl, + .control_id = SND_US16X08_ID_MUTE, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "Mute Switch", + .freeer = NULL, + .default_val = 0 + }, + { /* Pan */ + .kcontrol_new = &snd_us16x08_ch_int_ctl, + .control_id = SND_US16X08_ID_PAN, + .type = USB_MIXER_U16, + .num_channels = 16, + .name = "Pan Left-Right Volume", + .freeer = NULL, + .default_val = 127 + }, +}; + +/* table of master controls */ +static struct snd_us16x08_control_params master_controls[] = { + { /* Master */ + .kcontrol_new = &snd_us16x08_master_ctl, + .control_id = SND_US16X08_ID_FADER, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Master Volume", + .freeer = NULL, + .default_val = 127 + }, + { /* Bypass */ + .kcontrol_new = &snd_us16x08_bus_ctl, + .control_id = SND_US16X08_ID_BYPASS, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "DSP Bypass Switch", + .freeer = NULL, + .default_val = 0 + }, + { /* Buss out */ + .kcontrol_new = &snd_us16x08_bus_ctl, + .control_id = SND_US16X08_ID_BUSS_OUT, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "Buss Out Switch", + .freeer = NULL, + .default_val = 0 + }, + { /* Master mute */ + .kcontrol_new = &snd_us16x08_bus_ctl, + .control_id = SND_US16X08_ID_MUTE, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "Master Mute Switch", + .freeer = NULL, + .default_val = 0 + }, + +}; + +int snd_us16x08_controls_create(struct usb_mixer_interface *mixer) +{ + int i, j; + int err; + struct usb_mixer_elem_info *elem; + struct snd_us16x08_comp_store *comp_store; + struct snd_us16x08_meter_store *meter_store; + struct snd_us16x08_eq_store *eq_store; + + /* just check for non-MIDI interface */ + if (mixer->hostif->desc.bInterfaceNumber == 3) { + + /* create compressor mixer elements */ + comp_store = snd_us16x08_create_comp_store(); + if (comp_store == NULL) + return -ENOMEM; + + /* create eq store */ + eq_store = snd_us16x08_create_eq_store(); + if (eq_store == NULL) { + kfree(comp_store); + return -ENOMEM; + } + + /* create meters store */ + meter_store = snd_us16x08_create_meter_store(); + if (meter_store == NULL) { + kfree(comp_store); + kfree(eq_store); + return -ENOMEM; + } + + /* add routing control */ + err = add_new_ctl(mixer, &snd_us16x08_route_ctl, + SND_US16X08_ID_ROUTE, USB_MIXER_U8, 8, "Line Out Route", + NULL, NULL, &elem); + if (err < 0) { + usb_audio_dbg(mixer->chip, + "Failed to create route control, err:%d\n", + err); + return err; + } + for (i = 0; i < 8; i++) + elem->cache_val[i] = i < 2 ? i : i + 2; + elem->cached = 0xff; + + /* add master controls */ + for (i = 0; + i < sizeof(master_controls) + / sizeof(control_params); + i++) { + + err = add_new_ctl(mixer, + master_controls[i].kcontrol_new, + master_controls[i].control_id, + master_controls[i].type, + master_controls[i].num_channels, + master_controls[i].name, + comp_store, + master_controls[i].freeer, &elem); + if (err < 0) + return err; + elem->cache_val[0] = master_controls[i].default_val; + elem->cached = 1; + } + + /* add channel controls */ + for (i = 0; + i < sizeof(channel_controls) + / sizeof(control_params); + i++) { + + err = add_new_ctl(mixer, + channel_controls[i].kcontrol_new, + channel_controls[i].control_id, + channel_controls[i].type, + channel_controls[i].num_channels, + channel_controls[i].name, + comp_store, + channel_controls[i].freeer, &elem); + if (err < 0) + return err; + for (j = 0; j < SND_US16X08_MAX_CHANNELS; j++) { + elem->cache_val[j] = + channel_controls[i].default_val; + } + elem->cached = 0xffff; + } + + /* add EQ controls */ + for (i = 0; i < sizeof(eq_controls) / + sizeof(control_params); i++) { + + err = add_new_ctl(mixer, + eq_controls[i].kcontrol_new, + eq_controls[i].control_id, + eq_controls[i].type, + eq_controls[i].num_channels, + eq_controls[i].name, + eq_store, + eq_controls[i].freeer, NULL); + if (err < 0) + return err; + } + + /* add compressor controls */ + for (i = 0; + i < sizeof(comp_controls) + / sizeof(control_params); + i++) { + + err = add_new_ctl(mixer, + comp_controls[i].kcontrol_new, + comp_controls[i].control_id, + comp_controls[i].type, + comp_controls[i].num_channels, + comp_controls[i].name, + comp_store, + comp_controls[i].freeer, NULL); + if (err < 0) + return err; + } + + /* meter function 'get' must access to compressor store + * so place a reference here + */ + meter_store->comp_store = comp_store; + err = add_new_ctl(mixer, &snd_us16x08_meter_ctl, + SND_US16X08_ID_METER, USB_MIXER_U16, 0, "Level Meter", + (void *) meter_store, snd_usb_mixer_elem_free, NULL); + if (err < 0) + return err; + } + + return 0; +} + diff --git a/sound/usb/mixer_us16x08.h b/sound/usb/mixer_us16x08.h new file mode 100644 index 0000000..64f89b5 --- /dev/null +++ b/sound/usb/mixer_us16x08.h @@ -0,0 +1,122 @@ +#ifndef __USB_MIXER_US16X08_H +#define __USB_MIXER_US16X08_H + +#define SND_US16X08_MAX_CHANNELS 16 + +/* define some bias, cause some alsa-mixers wont work with + * negative ranges or if mixer-min != 0 + */ +#define SND_US16X08_NO_BIAS 0 +#define SND_US16X08_FADER_BIAS 127 +#define SND_US16X08_EQ_HIGHFREQ_BIAS 0x20 +#define SND_US16X08_COMP_THRESHOLD_BIAS 0x20 +#define SND_US16X08_COMP_ATTACK_BIAS 2 +#define SND_US16X08_COMP_RELEASE_BIAS 1 + +/* get macro for components of kcontrol private_value */ +#define SND_US16X08_KCBIAS(x) (((x)->private_value >> 24) & 0xff) +#define SND_US16X08_KCSTEP(x) (((x)->private_value >> 16) & 0xff) +#define SND_US16X08_KCMIN(x) (((x)->private_value >> 8) & 0xff) +#define SND_US16X08_KCMAX(x) (((x)->private_value >> 0) & 0xff) +/* set macro for kcontrol private_value */ +#define SND_US16X08_KCSET(bias, step, min, max) \ + (((bias) << 24) | ((step) << 16) | ((min) << 8) | (max)) + +/* the URB request/type to control Tascam mixers */ +#define SND_US16X08_URB_REQUEST 0x1D +#define SND_US16X08_URB_REQUESTTYPE 0x40 + +/* the URB params to retrieve meter ranges */ +#define SND_US16X08_URB_METER_REQUEST 0x1e +#define SND_US16X08_URB_METER_REQUESTTYPE 0xc0 + +#define MUA0(x, y) ((x)[(y) * 10 + 4]) +#define MUA1(x, y) ((x)[(y) * 10 + 5]) +#define MUA2(x, y) ((x)[(y) * 10 + 6]) +#define MUB0(x, y) ((x)[(y) * 10 + 7]) +#define MUB1(x, y) ((x)[(y) * 10 + 8]) +#define MUB2(x, y) ((x)[(y) * 10 + 9]) +#define MUC0(x, y) ((x)[(y) * 10 + 10]) +#define MUC1(x, y) ((x)[(y) * 10 + 11]) +#define MUC2(x, y) ((x)[(y) * 10 + 12]) +#define MUC3(x, y) ((x)[(y) * 10 + 13]) + +/* Common Channel control IDs */ +#define SND_US16X08_ID_BYPASS 0x45 +#define SND_US16X08_ID_BUSS_OUT 0x44 +#define SND_US16X08_ID_PHASE 0x85 +#define SND_US16X08_ID_MUTE 0x83 +#define SND_US16X08_ID_FADER 0x81 +#define SND_US16X08_ID_PAN 0x82 +#define SND_US16X08_ID_METER 0xB1 + +#define SND_US16X08_ID_EQ_BAND_COUNT 4 +#define SND_US16X08_ID_EQ_PARAM_COUNT 4 + +/* EQ level IDs */ +#define SND_US16X08_ID_EQLOWLEVEL 0x01 +#define SND_US16X08_ID_EQLOWMIDLEVEL 0x02 +#define SND_US16X08_ID_EQHIGHMIDLEVEL 0x03 +#define SND_US16X08_ID_EQHIGHLEVEL 0x04 + +/* EQ frequence IDs */ +#define SND_US16X08_ID_EQLOWFREQ 0x11 +#define SND_US16X08_ID_EQLOWMIDFREQ 0x12 +#define SND_US16X08_ID_EQHIGHMIDFREQ 0x13 +#define SND_US16X08_ID_EQHIGHFREQ 0x14 + +/* EQ width IDs */ +#define SND_US16X08_ID_EQLOWMIDWIDTH 0x22 +#define SND_US16X08_ID_EQHIGHMIDWIDTH 0x23 + +#define SND_US16X08_ID_EQENABLE 0x30 + +#define EQ_STORE_BAND_IDX(x) ((x) & 0xf) +#define EQ_STORE_PARAM_IDX(x) (((x) & 0xf0) >> 4) + +#define SND_US16X08_ID_ROUTE 0x00 + +/* Compressor Ids */ +#define SND_US16X08_ID_COMP_BASE 0x32 +#define SND_US16X08_ID_COMP_THRESHOLD SND_US16X08_ID_COMP_BASE +#define SND_US16X08_ID_COMP_RATIO (SND_US16X08_ID_COMP_BASE + 1) +#define SND_US16X08_ID_COMP_ATTACK (SND_US16X08_ID_COMP_BASE + 2) +#define SND_US16X08_ID_COMP_RELEASE (SND_US16X08_ID_COMP_BASE + 3) +#define SND_US16X08_ID_COMP_GAIN (SND_US16X08_ID_COMP_BASE + 4) +#define SND_US16X08_ID_COMP_SWITCH (SND_US16X08_ID_COMP_BASE + 5) +#define SND_US16X08_ID_COMP_COUNT 6 + +#define COMP_STORE_IDX(x) ((x) - SND_US16X08_ID_COMP_BASE) + +struct snd_us16x08_eq_store { + u8 val[SND_US16X08_ID_EQ_BAND_COUNT][SND_US16X08_ID_EQ_PARAM_COUNT] + [SND_US16X08_MAX_CHANNELS]; +}; + +struct snd_us16x08_comp_store { + u8 val[SND_US16X08_ID_COMP_COUNT][SND_US16X08_MAX_CHANNELS]; +}; + +struct snd_us16x08_meter_store { + int meter_level[SND_US16X08_MAX_CHANNELS]; + int master_level[2]; /* level of meter for master output */ + int comp_index; /* round trip channel selector */ + int comp_active_index; /* channel select from user space mixer */ + int comp_level[16]; /* compressor reduction level */ + struct snd_us16x08_comp_store *comp_store; +}; + +struct snd_us16x08_control_params { + struct snd_kcontrol_new *kcontrol_new; + int control_id; + int type; + int num_channels; + const char *name; + void (*freeer)(struct snd_kcontrol *kctl); + int default_val; +}; + +#define snd_us16x08_switch_info snd_ctl_boolean_mono_info + +int snd_us16x08_controls_create(struct usb_mixer_interface *mixer); +#endif /* __USB_MIXER_US16X08_H */ -- 2.7.4

3 2

[alsa-devel] [PATCH] clk: x86: add "mclk" alias for Baytrail/Cherrytrail
by Pierre-Louis Bossart 16 Feb '17

16 Feb '17

Due to timing requirements, TI and Conexant manage the audio reference clock from their ASoC codec drivers using the "mclk" string. This patch adds a default alias to "pmc_plt_clk_3" to avoid Intel-specific tests in those codec drivers and use code as-is. "pmc_plt_clk_3" is used exclusively for audio on all known Baytrail/CherryTrail designs and is e.g. routed on the MCLK (pin 26) of the MinnowBoardMAX Turbot LSE connector. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> --- Notes: This patch only applies on top of linux-next or clk-next, the previous clk-related patches are not yet merged in the audio trees drivers/clk/x86/clk-pmc-atom.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/clk/x86/clk-pmc-atom.c b/drivers/clk/x86/clk-pmc-atom.c index 2b60577..ba00d27 100644 --- a/drivers/clk/x86/clk-pmc-atom.c +++ b/drivers/clk/x86/clk-pmc-atom.c @@ -340,6 +340,8 @@ static int plt_clk_probe(struct platform_device *pdev) plt_clk_free_parent_names_loop(parent_names, data->nparents); + clk_add_alias("mclk", dev_name(&pdev->dev), "pmc_plt_clk_3", NULL); + platform_set_drvdata(pdev, data); return 0; -- 2.7.4

4 5

[alsa-devel] [PATCH v7 1/1] ALSA: Tascam US-16x08 DSP mixer quirk
by OnkelDead 16 Feb '17

16 Feb '17

Fixed route control enumeration values. Add mixer quirk for Tascam US-16x08 usb interface. Even that this an usb compliant device, the input channels and DSP functions (EQ/Compressor) arn't accessible by default. Signed-off-by: Detlef Urban <onkel(a)paraair.de> --- sound/usb/Makefile | 1 + sound/usb/mixer_quirks.c | 5 + sound/usb/mixer_us16x08.c | 1426 +++++++++++++++++++++++++++++++++++++++++++++ sound/usb/mixer_us16x08.h | 122 ++++ 4 files changed, 1554 insertions(+) create mode 100644 sound/usb/mixer_us16x08.c create mode 100644 sound/usb/mixer_us16x08.h diff --git a/sound/usb/Makefile b/sound/usb/Makefile index 2d2d122..42cb33b 100644 --- a/sound/usb/Makefile +++ b/sound/usb/Makefile @@ -10,6 +10,7 @@ snd-usb-audio-objs := card.o \ mixer.o \ mixer_quirks.o \ mixer_scarlett.o \ + mixer_us16x08.o \ pcm.o \ proc.o \ quirks.o \ diff --git a/sound/usb/mixer_quirks.c b/sound/usb/mixer_quirks.c index 04991b0..4fa0053 100644 --- a/sound/usb/mixer_quirks.c +++ b/sound/usb/mixer_quirks.c @@ -43,6 +43,7 @@ #include "mixer.h" #include "mixer_quirks.h" #include "mixer_scarlett.h" +#include "mixer_us16x08.h" #include "helper.h" extern struct snd_kcontrol_new *snd_usb_feature_unit_ctl; @@ -1729,6 +1730,10 @@ int snd_usb_mixer_apply_create_quirk(struct usb_mixer_interface *mixer) return err; switch (mixer->chip->usb_id) { + /* Tascam US-16x08 */ + case USB_ID(0x0644, 0x8047): + err = snd_us16x08_controls_create(mixer); + break; case USB_ID(0x041e, 0x3020): case USB_ID(0x041e, 0x3040): case USB_ID(0x041e, 0x3042): diff --git a/sound/usb/mixer_us16x08.c b/sound/usb/mixer_us16x08.c new file mode 100644 index 0000000..67de72d --- /dev/null +++ b/sound/usb/mixer_us16x08.c @@ -0,0 +1,1426 @@ +/* + * Tascam US-16x08 ALSA driver + * + * Copyright (c) 2016 by Detlef Urban (onkel(a)paraair.de) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <linux/slab.h> +#include <linux/usb.h> +#include <linux/usb/audio-v2.h> + +#include <sound/core.h> +#include <sound/control.h> + +#include "usbaudio.h" +#include "mixer.h" +#include "helper.h" + +#include "mixer_us16x08.h" + +/* USB control message templates */ +static char route_msg[] = { + 0x61, + 0x02, + 0x03, /* input from master (0x02) or input from computer bus (0x03) */ + 0x62, + 0x02, + 0x01, /* input index (0x01/0x02 eq. left/right) or bus (0x01-0x08) */ + 0x41, + 0x01, + 0x61, + 0x02, + 0x01, + 0x62, + 0x02, + 0x01, /* output index (0x01-0x08) */ + 0x42, + 0x01, + 0x43, + 0x01, + 0x00, + 0x00 +}; + +static char mix_init_msg1[] = { + 0x71, 0x01, 0x00, 0x00 +}; + +static char mix_init_msg2[] = { + 0x62, 0x02, 0x00, 0x61, 0x02, 0x04, 0xb1, 0x01, 0x00, 0x00 +}; + +static char mix_msg_in[] = { + /* default message head, equal to all mixers */ + 0x61, 0x02, 0x04, 0x62, 0x02, 0x01, + 0x81, /* 0x06: Controller ID */ + 0x02, /* 0x07: */ + 0x00, /* 0x08: Value of common mixer */ + 0x00, + 0x00 +}; + +static char mix_msg_out[] = { + /* default message head, equal to all mixers */ + 0x61, 0x02, 0x02, 0x62, 0x02, 0x01, + 0x81, /* 0x06: Controller ID */ + 0x02, /* 0x07: */ + 0x00, /* 0x08: Value of common mixer */ + 0x00, + 0x00 +}; + +static char bypass_msg_out[] = { + 0x45, + 0x02, + 0x01, /* on/off flag */ + 0x00, + 0x00 +}; + +static char bus_msg_out[] = { + 0x44, + 0x02, + 0x01, /* on/off flag */ + 0x00, + 0x00 +}; + +static char comp_msg[] = { + /* default message head, equal to all mixers */ + 0x61, 0x02, 0x04, 0x62, 0x02, 0x01, + 0x91, + 0x02, + 0xf0, /* 0x08: Threshold db (8) (e0 ... 00) (+-0dB -- -32dB) x-32 */ + 0x92, + 0x02, + 0x0a, /* 0x0b: Ratio (0a,0b,0d,0f,11,14,19,1e,23,28,32,3c,50,a0,ff) */ + 0x93, + 0x02, + 0x02, /* 0x0e: Attack (0x02 ... 0xc0) (2ms ... 200ms) */ + 0x94, + 0x02, + 0x01, /* 0x11: Release (0x01 ... 0x64) (10ms ... 1000ms) x*10 */ + 0x95, + 0x02, + 0x03, /* 0x14: gain (0 ... 20) (0dB .. 20dB) */ + 0x96, + 0x02, + 0x01, + 0x97, + 0x02, + 0x01, /* 0x1a: main Comp switch (0 ... 1) (off ... on)) */ + 0x00, + 0x00 +}; + +static char eqs_msq[] = { + /* default message head, equal to all mixers */ + 0x61, 0x02, 0x04, 0x62, 0x02, 0x01, + 0x51, /* 0x06: Controller ID */ + 0x02, + 0x04, /* 0x08: EQ set num (0x01..0x04) (LOW, LOWMID, HIGHMID, HIGH)) */ + 0x52, + 0x02, + 0x0c, /* 0x0b: value dB (0 ... 12) (-12db .. +12db) x-6 */ + 0x53, + 0x02, + 0x0f, /* 0x0e: value freq (32-47) (1.7kHz..18kHz) */ + 0x54, + 0x02, + 0x02, /* 0x11: band width (0-6) (Q16-Q0.25) 2^x/4 (EQ xxMID only) */ + 0x55, + 0x02, + 0x01, /* 0x14: main EQ switch (0 ... 1) (off ... on)) */ + 0x00, + 0x00 +}; + +/* compressor ratio map */ +static char ratio_map[] = { + 0x0a, 0x0b, 0x0d, 0x0f, 0x11, 0x14, 0x19, 0x1e, + 0x23, 0x28, 0x32, 0x3c, 0x50, 0xa0, 0xff +}; + +/* route enumeration names */ +const char *route_names[] = { + "Master Left", "Master Right", "Output 1", "Output 2", "Output 3", + "Output 4", "Output 5", "Output 6", "Output 7", "Output 8", +}; + +static int snd_us16x08_recv_urb(struct snd_usb_audio *chip, + unsigned char *buf, int size) +{ + + mutex_lock(&chip->mutex); + snd_usb_ctl_msg(chip->dev, + usb_rcvctrlpipe(chip->dev, 0), + SND_US16X08_URB_METER_REQUEST, + SND_US16X08_URB_METER_REQUESTTYPE, 0, 0, buf, size); + mutex_unlock(&chip->mutex); + return 0; +} + +/* wrapper function to send prepared URB buffer to usb device. Return an error + * code if something went wrong + */ +static int snd_us16x08_send_urb(struct snd_usb_audio *chip, char *buf, int size) +{ + int err = 0; + + if (chip) { + err = snd_usb_ctl_msg(chip->dev, usb_sndctrlpipe(chip->dev, 0), + SND_US16X08_URB_REQUEST, SND_US16X08_URB_REQUESTTYPE, + 0, 0, buf, size); + } + + return err; +} + +static int snd_us16x08_route_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + int i; + + return snd_ctl_enum_info(uinfo, 1, 10, route_names); + + return 0; +} + +static int snd_us16x08_route_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + int index = ucontrol->id.index; + + /* route has no bias */ + ucontrol->value.integer.value[0] = elem->cache_val[index]; + + return 0; +} + +static int snd_us16x08_route_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + int index = ucontrol->id.index; + char buf[sizeof(route_msg)]; + int val, val_org, err = 0; + + /* prepare the message buffer from template */ + memcpy(buf, route_msg, sizeof(route_msg)); + + /* get the new value (no bias for routes) */ + val = ucontrol->value.integer.value[0]; + if (val < 2) { + /* input comes from a master channel */ + val_org = val; + buf[2] = 0x02; + } else { + /* input comes from a computer channel */ + buf[2] = 0x03; + val_org = val - 2; + } + + /* place new route selection in URB message */ + buf[5] = (unsigned char) (val_org & 0x0f) + 1; + /* place route selector in URB message */ + buf[13] = index + 1; + + err = snd_us16x08_send_urb(chip, buf, sizeof(route_msg)); + + if (err > 0) { + elem->cached |= 1 << index; + elem->cache_val[index] = val; + } else { + usb_audio_dbg(chip, "Failed to set routing, err:%d\n", err); + } + + return err > 0 ? 1 : 0; +} + +static int snd_us16x08_master_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->count = 1; + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->value.integer.max = SND_US16X08_KCMAX(kcontrol); + uinfo->value.integer.min = SND_US16X08_KCMIN(kcontrol); + uinfo->value.integer.step = SND_US16X08_KCSTEP(kcontrol); + return 0; +} + +static int snd_us16x08_master_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + int index = ucontrol->id.index; + + ucontrol->value.integer.value[0] = elem->cache_val[index]; + + return 0; +} + +static int snd_us16x08_master_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + char buf[sizeof(mix_msg_out)]; + int val, err = 0; + int index = ucontrol->id.index; + + /* prepare the message buffer from template */ + memcpy(buf, mix_msg_out, sizeof(mix_msg_out)); + + /* new control value incl. bias*/ + val = ucontrol->value.integer.value[0]; + + buf[8] = val - SND_US16X08_KCBIAS(kcontrol); + buf[6] = elem->head.id; + + /* place channel selector in URB message */ + buf[5] = index + 1; + err = snd_us16x08_send_urb(chip, buf, sizeof(mix_msg_out)); + + if (err > 0) { + elem->cached |= 1 << index; + elem->cache_val[index] = val; + } else { + usb_audio_dbg(chip, "Failed to set master, err:%d\n", err); + } + + return err > 0 ? 1 : 0; +} + +static int snd_us16x08_bus_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + char buf[sizeof(mix_msg_out)]; + int val, err = 0; + + val = ucontrol->value.integer.value[0]; + + /* prepare the message buffer from template */ + switch (elem->head.id) { + case SND_US16X08_ID_BYPASS: + memcpy(buf, bypass_msg_out, sizeof(bypass_msg_out)); + buf[2] = val; + err = snd_us16x08_send_urb(chip, buf, sizeof(bypass_msg_out)); + break; + case SND_US16X08_ID_BUSS_OUT: + memcpy(buf, bus_msg_out, sizeof(bus_msg_out)); + buf[2] = val; + err = snd_us16x08_send_urb(chip, buf, sizeof(bus_msg_out)); + break; + case SND_US16X08_ID_MUTE: + memcpy(buf, mix_msg_out, sizeof(mix_msg_out)); + buf[8] = val; + buf[6] = elem->head.id; + buf[5] = 1; + err = snd_us16x08_send_urb(chip, buf, sizeof(mix_msg_out)); + break; + } + + if (err > 0) { + elem->cached |= 1; + elem->cache_val[0] = val; + } else { + usb_audio_dbg(chip, "Failed to set buss param, err:%d\n", err); + } + + return err > 0 ? 1 : 0; +} + +static int snd_us16x08_bus_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + + switch (elem->head.id) { + case SND_US16X08_ID_BUSS_OUT: + ucontrol->value.integer.value[0] = elem->cache_val[0]; + break; + case SND_US16X08_ID_BYPASS: + ucontrol->value.integer.value[0] = elem->cache_val[0]; + break; + case SND_US16X08_ID_MUTE: + ucontrol->value.integer.value[0] = elem->cache_val[0]; + break; + } + + return 0; +} + +/* gets a current mixer value from common store */ +static int snd_us16x08_channel_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + int index = ucontrol->id.index; + + ucontrol->value.integer.value[0] = elem->cache_val[index]; + + return 0; +} + +static int snd_us16x08_channel_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + char buf[sizeof(mix_msg_in)]; + int val, err; + int index = ucontrol->id.index; + + /* prepare URB message from template */ + memcpy(buf, mix_msg_in, sizeof(mix_msg_in)); + + val = ucontrol->value.integer.value[0]; + + /* add the bias to the new value */ + buf[8] = val - SND_US16X08_KCBIAS(kcontrol); + buf[6] = elem->head.id; + buf[5] = index + 1; + + err = snd_us16x08_send_urb(chip, buf, sizeof(mix_msg_in)); + + if (err > 0) { + elem->cached |= 1 << index; + elem->cache_val[index] = val; + } else { + usb_audio_dbg(chip, "Failed to set channel, err:%d\n", err); + } + + return err > 0 ? 1 : 0; +} + +static int snd_us16x08_mix_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->count = 1; + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->value.integer.max = SND_US16X08_KCMAX(kcontrol); + uinfo->value.integer.min = SND_US16X08_KCMIN(kcontrol); + uinfo->value.integer.step = SND_US16X08_KCSTEP(kcontrol); + return 0; +} + +static int snd_us16x08_comp_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_us16x08_comp_store *store = + ((struct snd_us16x08_comp_store *) elem->private_data); + int index = ucontrol->id.index; + int val_idx = COMP_STORE_IDX(elem->head.id); + + ucontrol->value.integer.value[0] = store->val[val_idx][index]; + + return 0; +} + +static int snd_us16x08_comp_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_comp_store *store = + ((struct snd_us16x08_comp_store *) elem->private_data); + int index = ucontrol->id.index; + char buf[sizeof(comp_msg)]; + int val_idx, val; + int err = 0; + + /* prepare compressor URB message from template */ + memcpy(buf, comp_msg, sizeof(comp_msg)); + + /* new control value incl. bias*/ + val_idx = elem->head.id - SND_US16X08_ID_COMP_BASE; + + val = ucontrol->value.integer.value[0]; + store->val[val_idx][index] = ucontrol->value.integer.value[0]; + + /* place comp values in message buffer watch bias! */ + buf[8] = store->val[ + COMP_STORE_IDX(SND_US16X08_ID_COMP_THRESHOLD)][index] + - SND_US16X08_COMP_THRESHOLD_BIAS; + buf[11] = ratio_map[store->val[ + COMP_STORE_IDX(SND_US16X08_ID_COMP_RATIO)][index]]; + buf[14] = store->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_ATTACK)][index] + + SND_US16X08_COMP_ATTACK_BIAS; + buf[17] = store->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_RELEASE)][index] + + SND_US16X08_COMP_RELEASE_BIAS; + buf[20] = store->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_GAIN)][index]; + buf[26] = store->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_SWITCH)][index]; + + /* place channel selector in message buffer */ + buf[5] = index + 1; + + err = snd_us16x08_send_urb(chip, buf, sizeof(comp_msg)); + + if (err > 0) { + elem->cached |= 1 << index; + elem->cache_val[index] = val; + } else { + usb_audio_dbg(chip, "Failed to set compressor, err:%d\n", err); + } + + return 1; +} + +static int snd_us16x08_eqswitch_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int val = 0; + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_us16x08_eq_store *store = + ((struct snd_us16x08_eq_store *) elem->private_data); + int index = ucontrol->id.index; + + /* get low switch from cache is enough, cause all bands are together */ + val = store->val[EQ_STORE_BAND_IDX(elem->head.id)] + [EQ_STORE_PARAM_IDX(elem->head.id)][index]; + ucontrol->value.integer.value[0] = val; + + return 0; +} + +static int snd_us16x08_eqswitch_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_eq_store *store = + ((struct snd_us16x08_eq_store *) elem->private_data); + int index = ucontrol->id.index; + + char buf[sizeof(eqs_msq)]; + int val, err = 0; + int b_idx; + + /* new control value incl. bias*/ + val = ucontrol->value.integer.value[0] + SND_US16X08_KCBIAS(kcontrol); + + /* prepare URB message from EQ template */ + memcpy(buf, eqs_msq, sizeof(eqs_msq)); + + /* place channel index in URB message */ + buf[5] = index + 1; + for (b_idx = 0; b_idx < SND_US16X08_ID_EQ_BAND_COUNT; b_idx++) { + /* all four EQ bands have to be enabled/disabled in once */ + buf[20] = val; + buf[17] = store->val[b_idx][2][index]; + buf[14] = store->val[b_idx][1][index]; + buf[11] = store->val[b_idx][0][index]; + buf[8] = b_idx + 1; + err = snd_us16x08_send_urb(chip, buf, sizeof(eqs_msq)); + if (err < 0) + break; + store->val[b_idx][3][index] = val; + msleep(15); + } + + if (err > 0) { + elem->cached |= 1 << index; + elem->cache_val[index] = val; + } else { + usb_audio_dbg(chip, "Failed to set eq switch, err:%d\n", err); + } + + return 1; +} + +static int snd_us16x08_eq_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int val = 0; + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_us16x08_eq_store *store = + ((struct snd_us16x08_eq_store *) elem->private_data); + int index = ucontrol->id.index; + int b_idx = EQ_STORE_BAND_IDX(elem->head.id) - 1; + int p_idx = EQ_STORE_PARAM_IDX(elem->head.id); + + val = store->val[b_idx][p_idx][index]; + + ucontrol->value.integer.value[0] = val; + + return 0; +} + +static int snd_us16x08_eq_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_eq_store *store = + ((struct snd_us16x08_eq_store *) elem->private_data); + int index = ucontrol->id.index; + char buf[sizeof(eqs_msq)]; + int val, err = 0; + int b_idx = EQ_STORE_BAND_IDX(elem->head.id) - 1; + int p_idx = EQ_STORE_PARAM_IDX(elem->head.id); + + /* copy URB buffer from EQ template */ + memcpy(buf, eqs_msq, sizeof(eqs_msq)); + + val = ucontrol->value.integer.value[0]; + + store->val[b_idx][p_idx][index] = val; + buf[20] = store->val[b_idx][3][index]; + buf[17] = store->val[b_idx][2][index]; + buf[14] = store->val[b_idx][1][index]; + buf[11] = store->val[b_idx][0][index]; + + /* place channel index in URB buffer */ + buf[5] = index + 1; + + /* place EQ band in URB buffer */ + buf[8] = b_idx + 1; + + err = snd_us16x08_send_urb(chip, buf, sizeof(eqs_msq)); + + if (err > 0) { + /* store new value in EQ band cache */ + elem->cached |= 1 << index; + elem->cache_val[index] = val; + } else { + usb_audio_dbg(chip, "Failed to set eq param, err:%d\n", err); + } + + return 1; +} + +static int snd_us16x08_meter_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->count = 1; + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->value.integer.max = 0x7FFF; + uinfo->value.integer.min = 0; + + return 0; +} + +/* calculate compressor index for reduction level request */ +static int snd_get_meter_comp_index(struct snd_us16x08_meter_store *store) +{ + int ret; + + /* any channel active */ + if (store->comp_active_index) { + /* check for stereo link */ + if (store->comp_active_index & 0x20) { + /* reset comp_index to left channel*/ + if (store->comp_index - + store->comp_active_index > 1) + store->comp_index = + store->comp_active_index; + + ret = store->comp_index++ & 0x1F; + } else { + /* no stereo link */ + ret = store->comp_active_index; + } + } else { + /* skip channels with no compressor active */ + while (!store->comp_store->val[ + COMP_STORE_IDX(SND_US16X08_ID_COMP_SWITCH)] + [store->comp_index - 1] + && store->comp_index <= SND_US16X08_MAX_CHANNELS) { + store->comp_index++; + } + ret = store->comp_index++; + if (store->comp_index > SND_US16X08_MAX_CHANNELS) + store->comp_index = 1; + } + return ret; +} + +/* retrieve the meter level values from URB message */ +static void get_meter_levels_from_urb(int s, + struct snd_us16x08_meter_store *store, + u8 *meter_urb) +{ + int val = MUC2(meter_urb, s) + (MUC3(meter_urb, s) << 8); + + if (MUA0(meter_urb, s) == 0x61 && MUA1(meter_urb, s) == 0x02 && + MUA2(meter_urb, s) == 0x04 && MUB0(meter_urb, s) == 0x62) { + if (MUC0(meter_urb, s) == 0x72) + store->meter_level[MUB2(meter_urb, s) - 1] = val; + if (MUC0(meter_urb, s) == 0xb2) + store->comp_level[MUB2(meter_urb, s) - 1] = val; + } + if (MUA0(meter_urb, s) == 0x61 && MUA1(meter_urb, s) == 0x02 && + MUA2(meter_urb, s) == 0x02 && MUB0(meter_urb, s) == 0x62) + store->master_level[MUB2(meter_urb, s) - 1] = val; +} + +/* Function to retrieve current meter values from the device. + * + * The device needs to be polled for meter values with an initial + * requests. It will return with a sequence of different meter value + * packages. The first request (case 0:) initiate this meter response sequence. + * After the third response, an additional request can be placed, + * to retrieve compressor reduction level value for given channel. This round + * trip channel selector will skip all inactive compressors. + * A mixer can interrupt this round-trip by selecting one ore two (stereo-link) + * specific channels. + */ +static int snd_us16x08_meter_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int i, set; + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_meter_store *store = elem->private_data; + u8 meter_urb[64]; + + + if (elem) { + store = (struct snd_us16x08_meter_store *) elem->private_data; + chip = elem->head.mixer->chip; + } else + return 0; + + switch (kcontrol->private_value) { + case 0: + snd_us16x08_send_urb(chip, mix_init_msg1, 4); + snd_us16x08_recv_urb(chip, meter_urb, + sizeof(meter_urb)); + kcontrol->private_value++; + break; + case 1: + snd_us16x08_recv_urb(chip, meter_urb, + sizeof(meter_urb)); + kcontrol->private_value++; + break; + case 2: + snd_us16x08_recv_urb(chip, meter_urb, + sizeof(meter_urb)); + kcontrol->private_value++; + break; + case 3: + mix_init_msg2[2] = snd_get_meter_comp_index(store); + snd_us16x08_send_urb(chip, mix_init_msg2, 10); + snd_us16x08_recv_urb(chip, meter_urb, + sizeof(meter_urb)); + kcontrol->private_value = 0; + break; + } + + for (set = 0; set < 6; set++) + get_meter_levels_from_urb(set, store, meter_urb); + + for (i = 0; i < SND_US16X08_MAX_CHANNELS; i++) { + ucontrol->value.integer.value[i] = + store ? store->meter_level[i] : 0; + } + + ucontrol->value.integer.value[i++] = store ? store->master_level[0] : 0; + ucontrol->value.integer.value[i++] = store ? store->master_level[1] : 0; + + for (i = 2; i < SND_US16X08_MAX_CHANNELS + 2; i++) + ucontrol->value.integer.value[i + SND_US16X08_MAX_CHANNELS] = + store ? store->comp_level[i - 2] : 0; + + return 1; +} + +static int snd_us16x08_meter_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_us16x08_meter_store *store = elem->private_data; + int val; + + val = ucontrol->value.integer.value[0]; + store->comp_active_index = val; + store->comp_index = val; + + return 1; +} + +static struct snd_kcontrol_new snd_us16x08_ch_boolean_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_switch_info, + .get = snd_us16x08_channel_get, + .put = snd_us16x08_channel_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 1) +}; + +static struct snd_kcontrol_new snd_us16x08_ch_int_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_channel_get, + .put = snd_us16x08_channel_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_FADER_BIAS, 1, 0, 133) +}; + +static struct snd_kcontrol_new snd_us16x08_master_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 1, + .info = snd_us16x08_master_info, + .get = snd_us16x08_master_get, + .put = snd_us16x08_master_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_FADER_BIAS, 1, 0, 133) +}; + +static struct snd_kcontrol_new snd_us16x08_route_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 8, + .info = snd_us16x08_route_info, + .get = snd_us16x08_route_get, + .put = snd_us16x08_route_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 9) +}; + +static struct snd_kcontrol_new snd_us16x08_bus_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 1, + .info = snd_us16x08_switch_info, + .get = snd_us16x08_bus_get, + .put = snd_us16x08_bus_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 1) +}; + +static struct snd_kcontrol_new snd_us16x08_compswitch_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_switch_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 1) +}; + +static struct snd_kcontrol_new snd_us16x08_comp_threshold_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_COMP_THRESHOLD_BIAS, 1, + 0, 0x20) +}; + +static struct snd_kcontrol_new snd_us16x08_comp_ratio_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, + sizeof(ratio_map) - 1), /*max*/ +}; + +static struct snd_kcontrol_new snd_us16x08_comp_gain_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 0x14) +}; + +static struct snd_kcontrol_new snd_us16x08_comp_attack_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = + SND_US16X08_KCSET(SND_US16X08_COMP_ATTACK_BIAS, 1, 0, 0xc6), +}; + +static struct snd_kcontrol_new snd_us16x08_comp_release_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = + SND_US16X08_KCSET(SND_US16X08_COMP_RELEASE_BIAS, 1, 0, 0x63), +}; + +static struct snd_kcontrol_new snd_us16x08_eq_gain_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 24), +}; + +static struct snd_kcontrol_new snd_us16x08_eq_low_freq_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 0x1F), +}; + +static struct snd_kcontrol_new snd_us16x08_eq_mid_freq_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 0x3F) +}; + +static struct snd_kcontrol_new snd_us16x08_eq_mid_width_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 0x06) +}; + +static struct snd_kcontrol_new snd_us16x08_eq_high_freq_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = + SND_US16X08_KCSET(SND_US16X08_EQ_HIGHFREQ_BIAS, 1, 0, 0x1F) +}; + +static struct snd_kcontrol_new snd_us16x08_eq_switch_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_switch_info, + .get = snd_us16x08_eqswitch_get, + .put = snd_us16x08_eqswitch_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 1) +}; + +static struct snd_kcontrol_new snd_us16x08_meter_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 1, + .info = snd_us16x08_meter_info, + .get = snd_us16x08_meter_get, + .put = snd_us16x08_meter_put +}; + +/* control store preparation */ + +/* setup compressor store and assign default value */ +static struct snd_us16x08_comp_store *snd_us16x08_create_comp_store(void) +{ + int i = 0; + struct snd_us16x08_comp_store *tmp = + kmalloc(sizeof(struct snd_us16x08_comp_store), GFP_KERNEL); + + if (tmp == NULL) + return NULL; + + for (i = 0; i < SND_US16X08_MAX_CHANNELS; i++) { + tmp->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_THRESHOLD)][i] + = 0x20; + tmp->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_RATIO)][i] = 0x00; + tmp->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_GAIN)][i] = 0x00; + tmp->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_SWITCH)][i] = 0x00; + tmp->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_ATTACK)][i] = 0x00; + tmp->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_RELEASE)][i] = 0x00; + } + return tmp; +} + +/* setup EQ store and assign default values */ +static struct snd_us16x08_eq_store *snd_us16x08_create_eq_store(void) +{ + int i, b_idx; + struct snd_us16x08_eq_store *tmp = + kmalloc(sizeof(struct snd_us16x08_eq_store), GFP_KERNEL); + + if (tmp == NULL) + return NULL; + + for (i = 0; i < SND_US16X08_MAX_CHANNELS; i++) { + for (b_idx = 0; b_idx < SND_US16X08_ID_EQ_BAND_COUNT; b_idx++) { + tmp->val[b_idx][0][i] = 0x0c; + tmp->val[b_idx][3][i] = 0x00; + switch (b_idx) { + case 0: /* EQ Low */ + tmp->val[b_idx][1][i] = 0x05; + tmp->val[b_idx][2][i] = 0xff; + break; + case 1: /* EQ Mid low */ + tmp->val[b_idx][1][i] = 0x0e; + tmp->val[b_idx][2][i] = 0x02; + break; + case 2: /* EQ Mid High */ + tmp->val[b_idx][1][i] = 0x1b; + tmp->val[b_idx][2][i] = 0x02; + break; + case 3: /* EQ High */ + tmp->val[b_idx][1][i] = 0x2f + - SND_US16X08_EQ_HIGHFREQ_BIAS; + tmp->val[b_idx][2][i] = 0xff; + break; + } + } + } + return tmp; +} + +struct snd_us16x08_meter_store *snd_us16x08_create_meter_store(void) +{ + struct snd_us16x08_meter_store *tmp = + kzalloc(sizeof(struct snd_us16x08_meter_store), GFP_KERNEL); + + if (!tmp) + return NULL; + tmp->comp_index = 1; + tmp->comp_active_index = 0; + return tmp; + +} + +static int add_new_ctl(struct usb_mixer_interface *mixer, + const struct snd_kcontrol_new *ncontrol, + int index, int val_type, int channels, + const char *name, const void *opt, + void (*freeer)(struct snd_kcontrol *kctl), + struct usb_mixer_elem_info **elem_ret) +{ + struct snd_kcontrol *kctl; + struct usb_mixer_elem_info *elem; + int err; + + usb_audio_dbg(mixer->chip, "us16x08 add mixer %s\n", name); + + elem = kzalloc(sizeof(*elem), GFP_KERNEL); + if (!elem) + return -ENOMEM; + + elem->head.mixer = mixer; + elem->head.resume = NULL; + elem->control = 0; + elem->idx_off = 0; + elem->head.id = index; + elem->val_type = val_type; + elem->channels = channels; + elem->private_data = (void *) opt; + + kctl = snd_ctl_new1(ncontrol, elem); + if (!kctl) { + kfree(elem); + return -ENOMEM; + } + + kctl->private_free = freeer; + + strlcpy(kctl->id.name, name, sizeof(kctl->id.name)); + + err = snd_usb_mixer_add_control(&elem->head, kctl); + if (err < 0) + return err; + + if (elem_ret) + *elem_ret = elem; + + return 0; +} + +static struct snd_us16x08_control_params control_params; + +/* table of EQ controls */ +static struct snd_us16x08_control_params eq_controls[] = { + { /* EQ switch */ + .kcontrol_new = &snd_us16x08_eq_switch_ctl, + .control_id = SND_US16X08_ID_EQENABLE, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "EQ Switch", + .freeer = snd_usb_mixer_elem_free + }, + { /* EQ low gain */ + .kcontrol_new = &snd_us16x08_eq_gain_ctl, + .control_id = SND_US16X08_ID_EQLOWLEVEL, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ Low Volume", + .freeer = snd_usb_mixer_elem_free + }, + { /* EQ low freq */ + .kcontrol_new = &snd_us16x08_eq_low_freq_ctl, + .control_id = SND_US16X08_ID_EQLOWFREQ, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ Low Frequence", + .freeer = NULL + }, + { /* EQ mid low gain */ + .kcontrol_new = &snd_us16x08_eq_gain_ctl, + .control_id = SND_US16X08_ID_EQLOWMIDLEVEL, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ MidLow Volume", + .freeer = snd_usb_mixer_elem_free + }, + { /* EQ mid low freq */ + .kcontrol_new = &snd_us16x08_eq_mid_freq_ctl, + .control_id = SND_US16X08_ID_EQLOWMIDFREQ, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ MidLow Frequence", + .freeer = NULL + }, + { /* EQ mid low Q */ + .kcontrol_new = &snd_us16x08_eq_mid_width_ctl, + .control_id = SND_US16X08_ID_EQLOWMIDWIDTH, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ MidQLow Q", + .freeer = NULL + }, + { /* EQ mid high gain */ + .kcontrol_new = &snd_us16x08_eq_gain_ctl, + .control_id = SND_US16X08_ID_EQHIGHMIDLEVEL, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ MidHigh Volume", + .freeer = snd_usb_mixer_elem_free + }, + { /* EQ mid high freq */ + .kcontrol_new = &snd_us16x08_eq_mid_freq_ctl, + .control_id = SND_US16X08_ID_EQHIGHMIDFREQ, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ MidHigh Frequence", + .freeer = NULL + }, + { /* EQ mid high Q */ + .kcontrol_new = &snd_us16x08_eq_mid_width_ctl, + .control_id = SND_US16X08_ID_EQHIGHMIDWIDTH, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ MidHigh Q", + .freeer = NULL + }, + { /* EQ high gain */ + .kcontrol_new = &snd_us16x08_eq_gain_ctl, + .control_id = SND_US16X08_ID_EQHIGHLEVEL, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ High Volume", + .freeer = snd_usb_mixer_elem_free + }, + { /* EQ low freq */ + .kcontrol_new = &snd_us16x08_eq_high_freq_ctl, + .control_id = SND_US16X08_ID_EQHIGHFREQ, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ High Frequence", + .freeer = NULL + }, +}; + +/* table of compressor controls */ +static struct snd_us16x08_control_params comp_controls[] = { + { /* Comp enable */ + .kcontrol_new = &snd_us16x08_compswitch_ctl, + .control_id = SND_US16X08_ID_COMP_SWITCH, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "Compressor Switch", + .freeer = snd_usb_mixer_elem_free + }, + { /* Comp threshold */ + .kcontrol_new = &snd_us16x08_comp_threshold_ctl, + .control_id = SND_US16X08_ID_COMP_THRESHOLD, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Compressor Threshold Volume", + .freeer = NULL + }, + { /* Comp ratio */ + .kcontrol_new = &snd_us16x08_comp_ratio_ctl, + .control_id = SND_US16X08_ID_COMP_RATIO, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Compressor Ratio", + .freeer = NULL + }, + { /* Comp attack */ + .kcontrol_new = &snd_us16x08_comp_attack_ctl, + .control_id = SND_US16X08_ID_COMP_ATTACK, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Compressor Attack", + .freeer = NULL + }, + { /* Comp release */ + .kcontrol_new = &snd_us16x08_comp_release_ctl, + .control_id = SND_US16X08_ID_COMP_RELEASE, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Compressor Release", + .freeer = NULL + }, + { /* Comp gain */ + .kcontrol_new = &snd_us16x08_comp_gain_ctl, + .control_id = SND_US16X08_ID_COMP_GAIN, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Compressor Volume", + .freeer = NULL + }, +}; + +/* table of channel controls */ +static struct snd_us16x08_control_params channel_controls[] = { + { /* Phase */ + .kcontrol_new = &snd_us16x08_ch_boolean_ctl, + .control_id = SND_US16X08_ID_PHASE, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "Phase Switch", + .freeer = snd_usb_mixer_elem_free, + .default_val = 0 + }, + { /* Fader */ + .kcontrol_new = &snd_us16x08_ch_int_ctl, + .control_id = SND_US16X08_ID_FADER, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Line Volume", + .freeer = NULL, + .default_val = 127 + }, + { /* Mute */ + .kcontrol_new = &snd_us16x08_ch_boolean_ctl, + .control_id = SND_US16X08_ID_MUTE, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "Mute Switch", + .freeer = NULL, + .default_val = 0 + }, + { /* Pan */ + .kcontrol_new = &snd_us16x08_ch_int_ctl, + .control_id = SND_US16X08_ID_PAN, + .type = USB_MIXER_U16, + .num_channels = 16, + .name = "Pan Left-Right Volume", + .freeer = NULL, + .default_val = 127 + }, +}; + +/* table of master controls */ +static struct snd_us16x08_control_params master_controls[] = { + { /* Master */ + .kcontrol_new = &snd_us16x08_master_ctl, + .control_id = SND_US16X08_ID_FADER, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Master Volume", + .freeer = NULL, + .default_val = 127 + }, + { /* Bypass */ + .kcontrol_new = &snd_us16x08_bus_ctl, + .control_id = SND_US16X08_ID_BYPASS, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "DSP Bypass Switch", + .freeer = NULL, + .default_val = 0 + }, + { /* Buss out */ + .kcontrol_new = &snd_us16x08_bus_ctl, + .control_id = SND_US16X08_ID_BUSS_OUT, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "Buss Out Switch", + .freeer = NULL, + .default_val = 0 + }, + { /* Master mute */ + .kcontrol_new = &snd_us16x08_bus_ctl, + .control_id = SND_US16X08_ID_MUTE, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "Master Mute Switch", + .freeer = NULL, + .default_val = 0 + }, + +}; + +int snd_us16x08_controls_create(struct usb_mixer_interface *mixer) +{ + int i, j; + int err; + struct usb_mixer_elem_info *elem; + struct snd_us16x08_comp_store *comp_store; + struct snd_us16x08_meter_store *meter_store; + struct snd_us16x08_eq_store *eq_store; + + /* just check for non-MIDI interface */ + if (mixer->hostif->desc.bInterfaceNumber == 3) { + + /* create compressor mixer elements */ + comp_store = snd_us16x08_create_comp_store(); + if (comp_store == NULL) + return -ENOMEM; + + /* create eq store */ + eq_store = snd_us16x08_create_eq_store(); + if (eq_store == NULL) { + kfree(comp_store); + return -ENOMEM; + } + + /* create meters store */ + meter_store = snd_us16x08_create_meter_store(); + if (meter_store == NULL) { + kfree(comp_store); + kfree(eq_store); + return -ENOMEM; + } + + /* add routing control */ + err = add_new_ctl(mixer, &snd_us16x08_route_ctl, + SND_US16X08_ID_ROUTE, USB_MIXER_U8, 8, "Line Out Route", + NULL, NULL, &elem); + if (err < 0) { + usb_audio_dbg(mixer->chip, + "Failed to create route control, err:%d\n", + err); + return err; + } + for (i = 0; i < 8; i++) + elem->cache_val[i] = i < 2 ? i : i + 2; + elem->cached = 0xff; + + /* add master controls */ + for (i = 0; + i < sizeof(master_controls) + / sizeof(control_params); + i++) { + + err = add_new_ctl(mixer, + master_controls[i].kcontrol_new, + master_controls[i].control_id, + master_controls[i].type, + master_controls[i].num_channels, + master_controls[i].name, + comp_store, + master_controls[i].freeer, &elem); + if (err < 0) + return err; + elem->cache_val[0] = master_controls[i].default_val; + elem->cached = 1; + } + + /* add channel controls */ + for (i = 0; + i < sizeof(channel_controls) + / sizeof(control_params); + i++) { + + err = add_new_ctl(mixer, + channel_controls[i].kcontrol_new, + channel_controls[i].control_id, + channel_controls[i].type, + channel_controls[i].num_channels, + channel_controls[i].name, + comp_store, + channel_controls[i].freeer, &elem); + if (err < 0) + return err; + for (j = 0; j < SND_US16X08_MAX_CHANNELS; j++) { + elem->cache_val[j] = + channel_controls[i].default_val; + } + elem->cached = 0xffff; + } + + /* add EQ controls */ + for (i = 0; i < sizeof(eq_controls) / + sizeof(control_params); i++) { + + err = add_new_ctl(mixer, + eq_controls[i].kcontrol_new, + eq_controls[i].control_id, + eq_controls[i].type, + eq_controls[i].num_channels, + eq_controls[i].name, + eq_store, + eq_controls[i].freeer, NULL); + if (err < 0) + return err; + } + + /* add compressor controls */ + for (i = 0; + i < sizeof(comp_controls) + / sizeof(control_params); + i++) { + + err = add_new_ctl(mixer, + comp_controls[i].kcontrol_new, + comp_controls[i].control_id, + comp_controls[i].type, + comp_controls[i].num_channels, + comp_controls[i].name, + comp_store, + comp_controls[i].freeer, NULL); + if (err < 0) + return err; + } + + /* meter function 'get' must access to compressor store + * so place a reference here + */ + meter_store->comp_store = comp_store; + err = add_new_ctl(mixer, &snd_us16x08_meter_ctl, + SND_US16X08_ID_METER, USB_MIXER_U16, 0, "Level Meter", + (void *) meter_store, snd_usb_mixer_elem_free, NULL); + if (err < 0) + return err; + } + + return 0; +} + diff --git a/sound/usb/mixer_us16x08.h b/sound/usb/mixer_us16x08.h new file mode 100644 index 0000000..64f89b5 --- /dev/null +++ b/sound/usb/mixer_us16x08.h @@ -0,0 +1,122 @@ +#ifndef __USB_MIXER_US16X08_H +#define __USB_MIXER_US16X08_H + +#define SND_US16X08_MAX_CHANNELS 16 + +/* define some bias, cause some alsa-mixers wont work with + * negative ranges or if mixer-min != 0 + */ +#define SND_US16X08_NO_BIAS 0 +#define SND_US16X08_FADER_BIAS 127 +#define SND_US16X08_EQ_HIGHFREQ_BIAS 0x20 +#define SND_US16X08_COMP_THRESHOLD_BIAS 0x20 +#define SND_US16X08_COMP_ATTACK_BIAS 2 +#define SND_US16X08_COMP_RELEASE_BIAS 1 + +/* get macro for components of kcontrol private_value */ +#define SND_US16X08_KCBIAS(x) (((x)->private_value >> 24) & 0xff) +#define SND_US16X08_KCSTEP(x) (((x)->private_value >> 16) & 0xff) +#define SND_US16X08_KCMIN(x) (((x)->private_value >> 8) & 0xff) +#define SND_US16X08_KCMAX(x) (((x)->private_value >> 0) & 0xff) +/* set macro for kcontrol private_value */ +#define SND_US16X08_KCSET(bias, step, min, max) \ + (((bias) << 24) | ((step) << 16) | ((min) << 8) | (max)) + +/* the URB request/type to control Tascam mixers */ +#define SND_US16X08_URB_REQUEST 0x1D +#define SND_US16X08_URB_REQUESTTYPE 0x40 + +/* the URB params to retrieve meter ranges */ +#define SND_US16X08_URB_METER_REQUEST 0x1e +#define SND_US16X08_URB_METER_REQUESTTYPE 0xc0 + +#define MUA0(x, y) ((x)[(y) * 10 + 4]) +#define MUA1(x, y) ((x)[(y) * 10 + 5]) +#define MUA2(x, y) ((x)[(y) * 10 + 6]) +#define MUB0(x, y) ((x)[(y) * 10 + 7]) +#define MUB1(x, y) ((x)[(y) * 10 + 8]) +#define MUB2(x, y) ((x)[(y) * 10 + 9]) +#define MUC0(x, y) ((x)[(y) * 10 + 10]) +#define MUC1(x, y) ((x)[(y) * 10 + 11]) +#define MUC2(x, y) ((x)[(y) * 10 + 12]) +#define MUC3(x, y) ((x)[(y) * 10 + 13]) + +/* Common Channel control IDs */ +#define SND_US16X08_ID_BYPASS 0x45 +#define SND_US16X08_ID_BUSS_OUT 0x44 +#define SND_US16X08_ID_PHASE 0x85 +#define SND_US16X08_ID_MUTE 0x83 +#define SND_US16X08_ID_FADER 0x81 +#define SND_US16X08_ID_PAN 0x82 +#define SND_US16X08_ID_METER 0xB1 + +#define SND_US16X08_ID_EQ_BAND_COUNT 4 +#define SND_US16X08_ID_EQ_PARAM_COUNT 4 + +/* EQ level IDs */ +#define SND_US16X08_ID_EQLOWLEVEL 0x01 +#define SND_US16X08_ID_EQLOWMIDLEVEL 0x02 +#define SND_US16X08_ID_EQHIGHMIDLEVEL 0x03 +#define SND_US16X08_ID_EQHIGHLEVEL 0x04 + +/* EQ frequence IDs */ +#define SND_US16X08_ID_EQLOWFREQ 0x11 +#define SND_US16X08_ID_EQLOWMIDFREQ 0x12 +#define SND_US16X08_ID_EQHIGHMIDFREQ 0x13 +#define SND_US16X08_ID_EQHIGHFREQ 0x14 + +/* EQ width IDs */ +#define SND_US16X08_ID_EQLOWMIDWIDTH 0x22 +#define SND_US16X08_ID_EQHIGHMIDWIDTH 0x23 + +#define SND_US16X08_ID_EQENABLE 0x30 + +#define EQ_STORE_BAND_IDX(x) ((x) & 0xf) +#define EQ_STORE_PARAM_IDX(x) (((x) & 0xf0) >> 4) + +#define SND_US16X08_ID_ROUTE 0x00 + +/* Compressor Ids */ +#define SND_US16X08_ID_COMP_BASE 0x32 +#define SND_US16X08_ID_COMP_THRESHOLD SND_US16X08_ID_COMP_BASE +#define SND_US16X08_ID_COMP_RATIO (SND_US16X08_ID_COMP_BASE + 1) +#define SND_US16X08_ID_COMP_ATTACK (SND_US16X08_ID_COMP_BASE + 2) +#define SND_US16X08_ID_COMP_RELEASE (SND_US16X08_ID_COMP_BASE + 3) +#define SND_US16X08_ID_COMP_GAIN (SND_US16X08_ID_COMP_BASE + 4) +#define SND_US16X08_ID_COMP_SWITCH (SND_US16X08_ID_COMP_BASE + 5) +#define SND_US16X08_ID_COMP_COUNT 6 + +#define COMP_STORE_IDX(x) ((x) - SND_US16X08_ID_COMP_BASE) + +struct snd_us16x08_eq_store { + u8 val[SND_US16X08_ID_EQ_BAND_COUNT][SND_US16X08_ID_EQ_PARAM_COUNT] + [SND_US16X08_MAX_CHANNELS]; +}; + +struct snd_us16x08_comp_store { + u8 val[SND_US16X08_ID_COMP_COUNT][SND_US16X08_MAX_CHANNELS]; +}; + +struct snd_us16x08_meter_store { + int meter_level[SND_US16X08_MAX_CHANNELS]; + int master_level[2]; /* level of meter for master output */ + int comp_index; /* round trip channel selector */ + int comp_active_index; /* channel select from user space mixer */ + int comp_level[16]; /* compressor reduction level */ + struct snd_us16x08_comp_store *comp_store; +}; + +struct snd_us16x08_control_params { + struct snd_kcontrol_new *kcontrol_new; + int control_id; + int type; + int num_channels; + const char *name; + void (*freeer)(struct snd_kcontrol *kctl); + int default_val; +}; + +#define snd_us16x08_switch_info snd_ctl_boolean_mono_info + +int snd_us16x08_controls_create(struct usb_mixer_interface *mixer); +#endif /* __USB_MIXER_US16X08_H */ -- 2.7.4

2 1

[alsa-devel] [PATCH v6 1/1] ALSA: Tascam US-16x08 DSP mixer quirk
by OnkelDead 16 Feb '17

16 Feb '17

Fixed codestyle, removed blank lines among the variable definitions / declarations. Changed log messages to usb_audio_dbg(), although they happens in therory only. Changed most control names to standard naming rule (where suitable, I'd miss naming rules for EQ or compressor features). Add mixer quirk for Tascam US-16x08 usb interface. Even that this an usb compliant device, the input channels and DSP functions (EQ/Compressor) arn't accessible by default. Signed-off-by: Detlef Urban <onkel(a)paraair.de> --- sound/usb/Makefile | 1 + sound/usb/mixer_quirks.c | 5 + sound/usb/mixer_us16x08.c | 1435 +++++++++++++++++++++++++++++++++++++++++++++ sound/usb/mixer_us16x08.h | 122 ++++ 4 files changed, 1563 insertions(+) create mode 100644 sound/usb/mixer_us16x08.c create mode 100644 sound/usb/mixer_us16x08.h diff --git a/sound/usb/Makefile b/sound/usb/Makefile index 2d2d122..42cb33b 100644 --- a/sound/usb/Makefile +++ b/sound/usb/Makefile @@ -10,6 +10,7 @@ snd-usb-audio-objs := card.o \ mixer.o \ mixer_quirks.o \ mixer_scarlett.o \ + mixer_us16x08.o \ pcm.o \ proc.o \ quirks.o \ diff --git a/sound/usb/mixer_quirks.c b/sound/usb/mixer_quirks.c index 04991b0..4fa0053 100644 --- a/sound/usb/mixer_quirks.c +++ b/sound/usb/mixer_quirks.c @@ -43,6 +43,7 @@ #include "mixer.h" #include "mixer_quirks.h" #include "mixer_scarlett.h" +#include "mixer_us16x08.h" #include "helper.h" extern struct snd_kcontrol_new *snd_usb_feature_unit_ctl; @@ -1729,6 +1730,10 @@ int snd_usb_mixer_apply_create_quirk(struct usb_mixer_interface *mixer) return err; switch (mixer->chip->usb_id) { + /* Tascam US-16x08 */ + case USB_ID(0x0644, 0x8047): + err = snd_us16x08_controls_create(mixer); + break; case USB_ID(0x041e, 0x3020): case USB_ID(0x041e, 0x3040): case USB_ID(0x041e, 0x3042): diff --git a/sound/usb/mixer_us16x08.c b/sound/usb/mixer_us16x08.c new file mode 100644 index 0000000..3da0cb5 --- /dev/null +++ b/sound/usb/mixer_us16x08.c @@ -0,0 +1,1435 @@ +/* + * Tascam US-16x08 ALSA driver + * + * Copyright (c) 2016 by Detlef Urban (onkel(a)paraair.de) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <linux/slab.h> +#include <linux/usb.h> +#include <linux/usb/audio-v2.h> + +#include <sound/core.h> +#include <sound/control.h> + +#include "usbaudio.h" +#include "mixer.h" +#include "helper.h" + +#include "mixer_us16x08.h" + +/* USB control message templates */ +static char route_msg[] = { + 0x61, + 0x02, + 0x03, /* input from master (0x02) or input from computer bus (0x03) */ + 0x62, + 0x02, + 0x01, /* input index (0x01/0x02 eq. left/right) or bus (0x01-0x08) */ + 0x41, + 0x01, + 0x61, + 0x02, + 0x01, + 0x62, + 0x02, + 0x01, /* output index (0x01-0x08) */ + 0x42, + 0x01, + 0x43, + 0x01, + 0x00, + 0x00 +}; + +static char mix_init_msg1[] = { + 0x71, 0x01, 0x00, 0x00 +}; + +static char mix_init_msg2[] = { + 0x62, 0x02, 0x00, 0x61, 0x02, 0x04, 0xb1, 0x01, 0x00, 0x00 +}; + +static char mix_msg_in[] = { + /* default message head, equal to all mixers */ + 0x61, 0x02, 0x04, 0x62, 0x02, 0x01, + 0x81, /* 0x06: Controller ID */ + 0x02, /* 0x07: */ + 0x00, /* 0x08: Value of common mixer */ + 0x00, + 0x00 +}; + +static char mix_msg_out[] = { + /* default message head, equal to all mixers */ + 0x61, 0x02, 0x02, 0x62, 0x02, 0x01, + 0x81, /* 0x06: Controller ID */ + 0x02, /* 0x07: */ + 0x00, /* 0x08: Value of common mixer */ + 0x00, + 0x00 +}; + +static char bypass_msg_out[] = { + 0x45, + 0x02, + 0x01, /* on/off flag */ + 0x00, + 0x00 +}; + +static char bus_msg_out[] = { + 0x44, + 0x02, + 0x01, /* on/off flag */ + 0x00, + 0x00 +}; + +static char comp_msg[] = { + /* default message head, equal to all mixers */ + 0x61, 0x02, 0x04, 0x62, 0x02, 0x01, + 0x91, + 0x02, + 0xf0, /* 0x08: Threshold db (8) (e0 ... 00) (+-0dB -- -32dB) x-32 */ + 0x92, + 0x02, + 0x0a, /* 0x0b: Ratio (0a,0b,0d,0f,11,14,19,1e,23,28,32,3c,50,a0,ff) */ + 0x93, + 0x02, + 0x02, /* 0x0e: Attack (0x02 ... 0xc0) (2ms ... 200ms) */ + 0x94, + 0x02, + 0x01, /* 0x11: Release (0x01 ... 0x64) (10ms ... 1000ms) x*10 */ + 0x95, + 0x02, + 0x03, /* 0x14: gain (0 ... 20) (0dB .. 20dB) */ + 0x96, + 0x02, + 0x01, + 0x97, + 0x02, + 0x01, /* 0x1a: main Comp switch (0 ... 1) (off ... on)) */ + 0x00, + 0x00 +}; + +static char eqs_msq[] = { + /* default message head, equal to all mixers */ + 0x61, 0x02, 0x04, 0x62, 0x02, 0x01, + 0x51, /* 0x06: Controller ID */ + 0x02, + 0x04, /* 0x08: EQ set num (0x01..0x04) (LOW, LOWMID, HIGHMID, HIGH)) */ + 0x52, + 0x02, + 0x0c, /* 0x0b: value dB (0 ... 12) (-12db .. +12db) x-6 */ + 0x53, + 0x02, + 0x0f, /* 0x0e: value freq (32-47) (1.7kHz..18kHz) */ + 0x54, + 0x02, + 0x02, /* 0x11: band width (0-6) (Q16-Q0.25) 2^x/4 (EQ xxMID only) */ + 0x55, + 0x02, + 0x01, /* 0x14: main EQ switch (0 ... 1) (off ... on)) */ + 0x00, + 0x00 +}; + +/* compressor ratio map */ +static char ratio_map[] = { + 0x0a, 0x0b, 0x0d, 0x0f, 0x11, 0x14, 0x19, 0x1e, + 0x23, 0x28, 0x32, 0x3c, 0x50, 0xa0, 0xff +}; + +/* route enumeration names */ +static char *route_names[] = { + "Master Left", "Master Right", "Output 1", "Output 2", "Output 3", + "Output 4", "Output 5", "Output 6", "Output 7", "Output 8", +}; + +static int snd_us16x08_recv_urb(struct snd_usb_audio *chip, + unsigned char *buf, int size) +{ + + mutex_lock(&chip->mutex); + snd_usb_ctl_msg(chip->dev, + usb_rcvctrlpipe(chip->dev, 0), + SND_US16X08_URB_METER_REQUEST, + SND_US16X08_URB_METER_REQUESTTYPE, 0, 0, buf, size); + mutex_unlock(&chip->mutex); + return 0; +} + +/* wrapper function to send prepared URB buffer to usb device. Return an error + * code if something went wrong + */ +static int snd_us16x08_send_urb(struct snd_usb_audio *chip, char *buf, int size) +{ + int err = 0; + + if (chip) { + err = snd_usb_ctl_msg(chip->dev, usb_sndctrlpipe(chip->dev, 0), + SND_US16X08_URB_REQUEST, SND_US16X08_URB_REQUESTTYPE, + 0, 0, buf, size); + } + + return err; +} + +static int snd_us16x08_route_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + int i; + + uinfo->count = 1; + uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; + uinfo->value.integer.max = SND_US16X08_KCMAX(kcontrol); + uinfo->value.integer.min = SND_US16X08_KCMIN(kcontrol); + uinfo->value.integer.step = SND_US16X08_KCSTEP(kcontrol); + uinfo->value.enumerated.items = 10; + uinfo->value.enumerated.names_ptr = (__u64) route_names; + uinfo->value.enumerated.names_length = 0; + for (i = 0; i < 10; i++) + uinfo->value.enumerated.names_length += + strlen(route_names[i]) + 1; + return 0; +} + +static int snd_us16x08_route_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + int index = ucontrol->id.index; + + /* route has no bias */ + ucontrol->value.integer.value[0] = elem->cache_val[index]; + + return 0; +} + +static int snd_us16x08_route_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + int index = ucontrol->id.index; + char buf[sizeof(route_msg)]; + int val, val_org, err = 0; + + /* prepare the message buffer from template */ + memcpy(buf, route_msg, sizeof(route_msg)); + + /* get the new value (no bias for routes) */ + val = ucontrol->value.integer.value[0]; + if (val < 2) { + /* input comes from a master channel */ + val_org = val; + buf[2] = 0x02; + } else { + /* input comes from a computer channel */ + buf[2] = 0x03; + val_org = val - 2; + } + + /* place new route selection in URB message */ + buf[5] = (unsigned char) (val_org & 0x0f) + 1; + /* place route selector in URB message */ + buf[13] = index + 1; + + err = snd_us16x08_send_urb(chip, buf, sizeof(route_msg)); + + if (err > 0) { + elem->cached |= 1 << index; + elem->cache_val[index] = val; + } else { + usb_audio_dbg(chip, "Failed to set routing, err:%d\n", err); + } + + return err > 0 ? 1 : 0; +} + +static int snd_us16x08_master_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->count = 1; + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->value.integer.max = SND_US16X08_KCMAX(kcontrol); + uinfo->value.integer.min = SND_US16X08_KCMIN(kcontrol); + uinfo->value.integer.step = SND_US16X08_KCSTEP(kcontrol); + return 0; +} + +static int snd_us16x08_master_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + int index = ucontrol->id.index; + + ucontrol->value.integer.value[0] = elem->cache_val[index]; + + return 0; +} + +static int snd_us16x08_master_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + char buf[sizeof(mix_msg_out)]; + int val, err = 0; + int index = ucontrol->id.index; + + /* prepare the message buffer from template */ + memcpy(buf, mix_msg_out, sizeof(mix_msg_out)); + + /* new control value incl. bias*/ + val = ucontrol->value.integer.value[0]; + + buf[8] = val - SND_US16X08_KCBIAS(kcontrol); + buf[6] = elem->head.id; + + /* place channel selector in URB message */ + buf[5] = index + 1; + err = snd_us16x08_send_urb(chip, buf, sizeof(mix_msg_out)); + + if (err > 0) { + elem->cached |= 1 << index; + elem->cache_val[index] = val; + } else { + usb_audio_dbg(chip, "Failed to set master, err:%d\n", err); + } + + return err > 0 ? 1 : 0; +} + +static int snd_us16x08_bus_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + char buf[sizeof(mix_msg_out)]; + int val, err = 0; + + val = ucontrol->value.integer.value[0]; + + /* prepare the message buffer from template */ + switch (elem->head.id) { + case SND_US16X08_ID_BYPASS: + memcpy(buf, bypass_msg_out, sizeof(bypass_msg_out)); + buf[2] = val; + err = snd_us16x08_send_urb(chip, buf, sizeof(bypass_msg_out)); + break; + case SND_US16X08_ID_BUSS_OUT: + memcpy(buf, bus_msg_out, sizeof(bus_msg_out)); + buf[2] = val; + err = snd_us16x08_send_urb(chip, buf, sizeof(bus_msg_out)); + break; + case SND_US16X08_ID_MUTE: + memcpy(buf, mix_msg_out, sizeof(mix_msg_out)); + buf[8] = val; + buf[6] = elem->head.id; + buf[5] = 1; + err = snd_us16x08_send_urb(chip, buf, sizeof(mix_msg_out)); + break; + } + + if (err > 0) { + elem->cached |= 1; + elem->cache_val[0] = val; + } else { + usb_audio_dbg(chip, "Failed to set buss param, err:%d\n", err); + } + + return err > 0 ? 1 : 0; +} + +static int snd_us16x08_bus_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + + switch (elem->head.id) { + case SND_US16X08_ID_BUSS_OUT: + ucontrol->value.integer.value[0] = elem->cache_val[0]; + break; + case SND_US16X08_ID_BYPASS: + ucontrol->value.integer.value[0] = elem->cache_val[0]; + break; + case SND_US16X08_ID_MUTE: + ucontrol->value.integer.value[0] = elem->cache_val[0]; + break; + } + + return 0; +} + +/* gets a current mixer value from common store */ +static int snd_us16x08_channel_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + int index = ucontrol->id.index; + + ucontrol->value.integer.value[0] = elem->cache_val[index]; + + return 0; +} + +static int snd_us16x08_channel_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + char buf[sizeof(mix_msg_in)]; + int val, err; + int index = ucontrol->id.index; + + /* prepare URB message from template */ + memcpy(buf, mix_msg_in, sizeof(mix_msg_in)); + + val = ucontrol->value.integer.value[0]; + + /* add the bias to the new value */ + buf[8] = val - SND_US16X08_KCBIAS(kcontrol); + buf[6] = elem->head.id; + buf[5] = index + 1; + + err = snd_us16x08_send_urb(chip, buf, sizeof(mix_msg_in)); + + if (err > 0) { + elem->cached |= 1 << index; + elem->cache_val[index] = val; + } else { + usb_audio_dbg(chip, "Failed to set channel, err:%d\n", err); + } + + return err > 0 ? 1 : 0; +} + +static int snd_us16x08_mix_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->count = 1; + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->value.integer.max = SND_US16X08_KCMAX(kcontrol); + uinfo->value.integer.min = SND_US16X08_KCMIN(kcontrol); + uinfo->value.integer.step = SND_US16X08_KCSTEP(kcontrol); + return 0; +} + +static int snd_us16x08_comp_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_us16x08_comp_store *store = + ((struct snd_us16x08_comp_store *) elem->private_data); + int index = ucontrol->id.index; + int val_idx = COMP_STORE_IDX(elem->head.id); + + ucontrol->value.integer.value[0] = store->val[val_idx][index]; + + return 0; +} + +static int snd_us16x08_comp_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_comp_store *store = + ((struct snd_us16x08_comp_store *) elem->private_data); + int index = ucontrol->id.index; + char buf[sizeof(comp_msg)]; + int val_idx, val; + int err = 0; + + /* prepare compressor URB message from template */ + memcpy(buf, comp_msg, sizeof(comp_msg)); + + /* new control value incl. bias*/ + val_idx = elem->head.id - SND_US16X08_ID_COMP_BASE; + + val = ucontrol->value.integer.value[0]; + store->val[val_idx][index] = ucontrol->value.integer.value[0]; + + /* place comp values in message buffer watch bias! */ + buf[8] = store->val[ + COMP_STORE_IDX(SND_US16X08_ID_COMP_THRESHOLD)][index] + - SND_US16X08_COMP_THRESHOLD_BIAS; + buf[11] = ratio_map[store->val[ + COMP_STORE_IDX(SND_US16X08_ID_COMP_RATIO)][index]]; + buf[14] = store->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_ATTACK)][index] + + SND_US16X08_COMP_ATTACK_BIAS; + buf[17] = store->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_RELEASE)][index] + + SND_US16X08_COMP_RELEASE_BIAS; + buf[20] = store->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_GAIN)][index]; + buf[26] = store->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_SWITCH)][index]; + + /* place channel selector in message buffer */ + buf[5] = index + 1; + + err = snd_us16x08_send_urb(chip, buf, sizeof(comp_msg)); + + if (err > 0) { + elem->cached |= 1 << index; + elem->cache_val[index] = val; + } else { + usb_audio_dbg(chip, "Failed to set compressor, err:%d\n", err); + } + + return 1; +} + +static int snd_us16x08_eqswitch_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int val = 0; + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_us16x08_eq_store *store = + ((struct snd_us16x08_eq_store *) elem->private_data); + int index = ucontrol->id.index; + + /* get low switch from cache is enough, cause all bands are together */ + val = store->val[EQ_STORE_BAND_IDX(elem->head.id)] + [EQ_STORE_PARAM_IDX(elem->head.id)][index]; + ucontrol->value.integer.value[0] = val; + + return 0; +} + +static int snd_us16x08_eqswitch_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_eq_store *store = + ((struct snd_us16x08_eq_store *) elem->private_data); + int index = ucontrol->id.index; + + char buf[sizeof(eqs_msq)]; + int val, err = 0; + int b_idx; + + /* new control value incl. bias*/ + val = ucontrol->value.integer.value[0] + SND_US16X08_KCBIAS(kcontrol); + + /* prepare URB message from EQ template */ + memcpy(buf, eqs_msq, sizeof(eqs_msq)); + + /* place channel index in URB message */ + buf[5] = index + 1; + for (b_idx = 0; b_idx < SND_US16X08_ID_EQ_BAND_COUNT; b_idx++) { + /* all four EQ bands have to be enabled/disabled in once */ + buf[20] = val; + buf[17] = store->val[b_idx][2][index]; + buf[14] = store->val[b_idx][1][index]; + buf[11] = store->val[b_idx][0][index]; + buf[8] = b_idx + 1; + err = snd_us16x08_send_urb(chip, buf, sizeof(eqs_msq)); + if (err < 0) + break; + store->val[b_idx][3][index] = val; + msleep(15); + } + + if (err > 0) { + elem->cached |= 1 << index; + elem->cache_val[index] = val; + } else { + usb_audio_dbg(chip, "Failed to set eq switch, err:%d\n", err); + } + + return 1; +} + +static int snd_us16x08_eq_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int val = 0; + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_us16x08_eq_store *store = + ((struct snd_us16x08_eq_store *) elem->private_data); + int index = ucontrol->id.index; + int b_idx = EQ_STORE_BAND_IDX(elem->head.id) - 1; + int p_idx = EQ_STORE_PARAM_IDX(elem->head.id); + + val = store->val[b_idx][p_idx][index]; + + ucontrol->value.integer.value[0] = val; + + return 0; +} + +static int snd_us16x08_eq_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_eq_store *store = + ((struct snd_us16x08_eq_store *) elem->private_data); + int index = ucontrol->id.index; + char buf[sizeof(eqs_msq)]; + int val, err = 0; + int b_idx = EQ_STORE_BAND_IDX(elem->head.id) - 1; + int p_idx = EQ_STORE_PARAM_IDX(elem->head.id); + + /* copy URB buffer from EQ template */ + memcpy(buf, eqs_msq, sizeof(eqs_msq)); + + val = ucontrol->value.integer.value[0]; + + store->val[b_idx][p_idx][index] = val; + buf[20] = store->val[b_idx][3][index]; + buf[17] = store->val[b_idx][2][index]; + buf[14] = store->val[b_idx][1][index]; + buf[11] = store->val[b_idx][0][index]; + + /* place channel index in URB buffer */ + buf[5] = index + 1; + + /* place EQ band in URB buffer */ + buf[8] = b_idx + 1; + + err = snd_us16x08_send_urb(chip, buf, sizeof(eqs_msq)); + + if (err > 0) { + /* store new value in EQ band cache */ + elem->cached |= 1 << index; + elem->cache_val[index] = val; + } else { + usb_audio_dbg(chip, "Failed to set eq param, err:%d\n", err); + } + + return 1; +} + +static int snd_us16x08_meter_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->count = 1; + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->value.integer.max = 0x7FFF; + uinfo->value.integer.min = 0; + + return 0; +} + +/* calculate compressor index for reduction level request */ +static int snd_get_meter_comp_index(struct snd_us16x08_meter_store *store) +{ + int ret; + + /* any channel active */ + if (store->comp_active_index) { + /* check for stereo link */ + if (store->comp_active_index & 0x20) { + /* reset comp_index to left channel*/ + if (store->comp_index - + store->comp_active_index > 1) + store->comp_index = + store->comp_active_index; + + ret = store->comp_index++ & 0x1F; + } else { + /* no stereo link */ + ret = store->comp_active_index; + } + } else { + /* skip channels with no compressor active */ + while (!store->comp_store->val[ + COMP_STORE_IDX(SND_US16X08_ID_COMP_SWITCH)] + [store->comp_index - 1] + && store->comp_index <= SND_US16X08_MAX_CHANNELS) { + store->comp_index++; + } + ret = store->comp_index++; + if (store->comp_index > SND_US16X08_MAX_CHANNELS) + store->comp_index = 1; + } + return ret; +} + +/* retrieve the meter level values from URB message */ +static void get_meter_levels_from_urb(int s, + struct snd_us16x08_meter_store *store, + u8 *meter_urb) +{ + int val = MUC2(meter_urb, s) + (MUC3(meter_urb, s) << 8); + + if (MUA0(meter_urb, s) == 0x61 && MUA1(meter_urb, s) == 0x02 && + MUA2(meter_urb, s) == 0x04 && MUB0(meter_urb, s) == 0x62) { + if (MUC0(meter_urb, s) == 0x72) + store->meter_level[MUB2(meter_urb, s) - 1] = val; + if (MUC0(meter_urb, s) == 0xb2) + store->comp_level[MUB2(meter_urb, s) - 1] = val; + } + if (MUA0(meter_urb, s) == 0x61 && MUA1(meter_urb, s) == 0x02 && + MUA2(meter_urb, s) == 0x02 && MUB0(meter_urb, s) == 0x62) + store->master_level[MUB2(meter_urb, s) - 1] = val; +} + +/* Function to retrieve current meter values from the device. + * + * The device needs to be polled for meter values with an initial + * requests. It will return with a sequence of different meter value + * packages. The first request (case 0:) initiate this meter response sequence. + * After the third response, an additional request can be placed, + * to retrieve compressor reduction level value for given channel. This round + * trip channel selector will skip all inactive compressors. + * A mixer can interrupt this round-trip by selecting one ore two (stereo-link) + * specific channels. + */ +static int snd_us16x08_meter_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int i, set; + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_meter_store *store = elem->private_data; + u8 meter_urb[64]; + + + if (elem) { + store = (struct snd_us16x08_meter_store *) elem->private_data; + chip = elem->head.mixer->chip; + } else + return 0; + + switch (kcontrol->private_value) { + case 0: + snd_us16x08_send_urb(chip, mix_init_msg1, 4); + snd_us16x08_recv_urb(chip, meter_urb, + sizeof(meter_urb)); + kcontrol->private_value++; + break; + case 1: + snd_us16x08_recv_urb(chip, meter_urb, + sizeof(meter_urb)); + kcontrol->private_value++; + break; + case 2: + snd_us16x08_recv_urb(chip, meter_urb, + sizeof(meter_urb)); + kcontrol->private_value++; + break; + case 3: + mix_init_msg2[2] = snd_get_meter_comp_index(store); + snd_us16x08_send_urb(chip, mix_init_msg2, 10); + snd_us16x08_recv_urb(chip, meter_urb, + sizeof(meter_urb)); + kcontrol->private_value = 0; + break; + } + + for (set = 0; set < 6; set++) + get_meter_levels_from_urb(set, store, meter_urb); + + for (i = 0; i < SND_US16X08_MAX_CHANNELS; i++) { + ucontrol->value.integer.value[i] = + store ? store->meter_level[i] : 0; + } + + ucontrol->value.integer.value[i++] = store ? store->master_level[0] : 0; + ucontrol->value.integer.value[i++] = store ? store->master_level[1] : 0; + + for (i = 2; i < SND_US16X08_MAX_CHANNELS + 2; i++) + ucontrol->value.integer.value[i + SND_US16X08_MAX_CHANNELS] = + store ? store->comp_level[i - 2] : 0; + + return 1; +} + +static int snd_us16x08_meter_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_us16x08_meter_store *store = elem->private_data; + int val; + + val = ucontrol->value.integer.value[0]; + store->comp_active_index = val; + store->comp_index = val; + + return 1; +} + +static struct snd_kcontrol_new snd_us16x08_ch_boolean_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_switch_info, + .get = snd_us16x08_channel_get, + .put = snd_us16x08_channel_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 1) +}; + +static struct snd_kcontrol_new snd_us16x08_ch_int_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_channel_get, + .put = snd_us16x08_channel_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_FADER_BIAS, 1, 0, 133) +}; + +static struct snd_kcontrol_new snd_us16x08_master_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 1, + .info = snd_us16x08_master_info, + .get = snd_us16x08_master_get, + .put = snd_us16x08_master_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_FADER_BIAS, 1, 0, 133) +}; + +static struct snd_kcontrol_new snd_us16x08_route_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 8, + .info = snd_us16x08_route_info, + .get = snd_us16x08_route_get, + .put = snd_us16x08_route_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 9) +}; + +static struct snd_kcontrol_new snd_us16x08_bus_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 1, + .info = snd_us16x08_switch_info, + .get = snd_us16x08_bus_get, + .put = snd_us16x08_bus_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 1) +}; + +static struct snd_kcontrol_new snd_us16x08_compswitch_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_switch_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 1) +}; + +static struct snd_kcontrol_new snd_us16x08_comp_threshold_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_COMP_THRESHOLD_BIAS, 1, + 0, 0x20) +}; + +static struct snd_kcontrol_new snd_us16x08_comp_ratio_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, + sizeof(ratio_map) - 1), /*max*/ +}; + +static struct snd_kcontrol_new snd_us16x08_comp_gain_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 0x14) +}; + +static struct snd_kcontrol_new snd_us16x08_comp_attack_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = + SND_US16X08_KCSET(SND_US16X08_COMP_ATTACK_BIAS, 1, 0, 0xc6), +}; + +static struct snd_kcontrol_new snd_us16x08_comp_release_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = + SND_US16X08_KCSET(SND_US16X08_COMP_RELEASE_BIAS, 1, 0, 0x63), +}; + +static struct snd_kcontrol_new snd_us16x08_eq_gain_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 24), +}; + +static struct snd_kcontrol_new snd_us16x08_eq_low_freq_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 0x1F), +}; + +static struct snd_kcontrol_new snd_us16x08_eq_mid_freq_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 0x3F) +}; + +static struct snd_kcontrol_new snd_us16x08_eq_mid_width_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 0x06) +}; + +static struct snd_kcontrol_new snd_us16x08_eq_high_freq_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = + SND_US16X08_KCSET(SND_US16X08_EQ_HIGHFREQ_BIAS, 1, 0, 0x1F) +}; + +static struct snd_kcontrol_new snd_us16x08_eq_switch_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_switch_info, + .get = snd_us16x08_eqswitch_get, + .put = snd_us16x08_eqswitch_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 1) +}; + +static struct snd_kcontrol_new snd_us16x08_meter_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 1, + .info = snd_us16x08_meter_info, + .get = snd_us16x08_meter_get, + .put = snd_us16x08_meter_put +}; + +/* control store preparation */ + +/* setup compressor store and assign default value */ +static struct snd_us16x08_comp_store *snd_us16x08_create_comp_store(void) +{ + int i = 0; + struct snd_us16x08_comp_store *tmp = + kmalloc(sizeof(struct snd_us16x08_comp_store), GFP_KERNEL); + + if (tmp == NULL) + return NULL; + + for (i = 0; i < SND_US16X08_MAX_CHANNELS; i++) { + tmp->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_THRESHOLD)][i] + = 0x20; + tmp->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_RATIO)][i] = 0x00; + tmp->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_GAIN)][i] = 0x00; + tmp->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_SWITCH)][i] = 0x00; + tmp->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_ATTACK)][i] = 0x00; + tmp->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_RELEASE)][i] = 0x00; + } + return tmp; +} + +/* setup EQ store and assign default values */ +static struct snd_us16x08_eq_store *snd_us16x08_create_eq_store(void) +{ + int i, b_idx; + struct snd_us16x08_eq_store *tmp = + kmalloc(sizeof(struct snd_us16x08_eq_store), GFP_KERNEL); + + if (tmp == NULL) + return NULL; + + for (i = 0; i < SND_US16X08_MAX_CHANNELS; i++) { + for (b_idx = 0; b_idx < SND_US16X08_ID_EQ_BAND_COUNT; b_idx++) { + tmp->val[b_idx][0][i] = 0x0c; + tmp->val[b_idx][3][i] = 0x00; + switch (b_idx) { + case 0: /* EQ Low */ + tmp->val[b_idx][1][i] = 0x05; + tmp->val[b_idx][2][i] = 0xff; + break; + case 1: /* EQ Mid low */ + tmp->val[b_idx][1][i] = 0x0e; + tmp->val[b_idx][2][i] = 0x02; + break; + case 2: /* EQ Mid High */ + tmp->val[b_idx][1][i] = 0x1b; + tmp->val[b_idx][2][i] = 0x02; + break; + case 3: /* EQ High */ + tmp->val[b_idx][1][i] = 0x2f + - SND_US16X08_EQ_HIGHFREQ_BIAS; + tmp->val[b_idx][2][i] = 0xff; + break; + } + } + } + return tmp; +} + +struct snd_us16x08_meter_store *snd_us16x08_create_meter_store(void) +{ + struct snd_us16x08_meter_store *tmp = + kzalloc(sizeof(struct snd_us16x08_meter_store), GFP_KERNEL); + + if (!tmp) + return NULL; + tmp->comp_index = 1; + tmp->comp_active_index = 0; + return tmp; + +} + +static int add_new_ctl(struct usb_mixer_interface *mixer, + const struct snd_kcontrol_new *ncontrol, + int index, int val_type, int channels, + const char *name, const void *opt, + void (*freeer)(struct snd_kcontrol *kctl), + struct usb_mixer_elem_info **elem_ret) +{ + struct snd_kcontrol *kctl; + struct usb_mixer_elem_info *elem; + int err; + + usb_audio_dbg(mixer->chip, "us16x08 add mixer %s\n", name); + + elem = kzalloc(sizeof(*elem), GFP_KERNEL); + if (!elem) + return -ENOMEM; + + elem->head.mixer = mixer; + elem->head.resume = NULL; + elem->control = 0; + elem->idx_off = 0; + elem->head.id = index; + elem->val_type = val_type; + elem->channels = channels; + elem->private_data = (void *) opt; + + kctl = snd_ctl_new1(ncontrol, elem); + if (!kctl) { + kfree(elem); + return -ENOMEM; + } + + kctl->private_free = freeer; + + strlcpy(kctl->id.name, name, sizeof(kctl->id.name)); + + err = snd_usb_mixer_add_control(&elem->head, kctl); + if (err < 0) + return err; + + if (elem_ret) + *elem_ret = elem; + + return 0; +} + +static struct snd_us16x08_control_params control_params; + +/* table of EQ controls */ +static struct snd_us16x08_control_params eq_controls[] = { + { /* EQ switch */ + .kcontrol_new = &snd_us16x08_eq_switch_ctl, + .control_id = SND_US16X08_ID_EQENABLE, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "EQ Switch", + .freeer = snd_usb_mixer_elem_free + }, + { /* EQ low gain */ + .kcontrol_new = &snd_us16x08_eq_gain_ctl, + .control_id = SND_US16X08_ID_EQLOWLEVEL, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ Low Volume", + .freeer = snd_usb_mixer_elem_free + }, + { /* EQ low freq */ + .kcontrol_new = &snd_us16x08_eq_low_freq_ctl, + .control_id = SND_US16X08_ID_EQLOWFREQ, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ Low Frequence", + .freeer = NULL + }, + { /* EQ mid low gain */ + .kcontrol_new = &snd_us16x08_eq_gain_ctl, + .control_id = SND_US16X08_ID_EQLOWMIDLEVEL, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ MidLow Volume", + .freeer = snd_usb_mixer_elem_free + }, + { /* EQ mid low freq */ + .kcontrol_new = &snd_us16x08_eq_mid_freq_ctl, + .control_id = SND_US16X08_ID_EQLOWMIDFREQ, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ MidLow Frequence", + .freeer = NULL + }, + { /* EQ mid low Q */ + .kcontrol_new = &snd_us16x08_eq_mid_width_ctl, + .control_id = SND_US16X08_ID_EQLOWMIDWIDTH, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ MidQLow Q", + .freeer = NULL + }, + { /* EQ mid high gain */ + .kcontrol_new = &snd_us16x08_eq_gain_ctl, + .control_id = SND_US16X08_ID_EQHIGHMIDLEVEL, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ MidHigh Volume", + .freeer = snd_usb_mixer_elem_free + }, + { /* EQ mid high freq */ + .kcontrol_new = &snd_us16x08_eq_mid_freq_ctl, + .control_id = SND_US16X08_ID_EQHIGHMIDFREQ, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ MidHigh Frequence", + .freeer = NULL + }, + { /* EQ mid high Q */ + .kcontrol_new = &snd_us16x08_eq_mid_width_ctl, + .control_id = SND_US16X08_ID_EQHIGHMIDWIDTH, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ MidHigh Q", + .freeer = NULL + }, + { /* EQ high gain */ + .kcontrol_new = &snd_us16x08_eq_gain_ctl, + .control_id = SND_US16X08_ID_EQHIGHLEVEL, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ High Volume", + .freeer = snd_usb_mixer_elem_free + }, + { /* EQ low freq */ + .kcontrol_new = &snd_us16x08_eq_high_freq_ctl, + .control_id = SND_US16X08_ID_EQHIGHFREQ, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ High Frequence", + .freeer = NULL + }, +}; + +/* table of compressor controls */ +static struct snd_us16x08_control_params comp_controls[] = { + { /* Comp enable */ + .kcontrol_new = &snd_us16x08_compswitch_ctl, + .control_id = SND_US16X08_ID_COMP_SWITCH, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "Compressor Switch", + .freeer = snd_usb_mixer_elem_free + }, + { /* Comp threshold */ + .kcontrol_new = &snd_us16x08_comp_threshold_ctl, + .control_id = SND_US16X08_ID_COMP_THRESHOLD, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Compressor Threshold Volume", + .freeer = NULL + }, + { /* Comp ratio */ + .kcontrol_new = &snd_us16x08_comp_ratio_ctl, + .control_id = SND_US16X08_ID_COMP_RATIO, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Compressor Ratio", + .freeer = NULL + }, + { /* Comp attack */ + .kcontrol_new = &snd_us16x08_comp_attack_ctl, + .control_id = SND_US16X08_ID_COMP_ATTACK, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Compressor Attack", + .freeer = NULL + }, + { /* Comp release */ + .kcontrol_new = &snd_us16x08_comp_release_ctl, + .control_id = SND_US16X08_ID_COMP_RELEASE, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Compressor Release", + .freeer = NULL + }, + { /* Comp gain */ + .kcontrol_new = &snd_us16x08_comp_gain_ctl, + .control_id = SND_US16X08_ID_COMP_GAIN, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Compressor Volume", + .freeer = NULL + }, +}; + +/* table of channel controls */ +static struct snd_us16x08_control_params channel_controls[] = { + { /* Phase */ + .kcontrol_new = &snd_us16x08_ch_boolean_ctl, + .control_id = SND_US16X08_ID_PHASE, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "Phase Switch", + .freeer = snd_usb_mixer_elem_free, + .default_val = 0 + }, + { /* Fader */ + .kcontrol_new = &snd_us16x08_ch_int_ctl, + .control_id = SND_US16X08_ID_FADER, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Line Volume", + .freeer = NULL, + .default_val = 127 + }, + { /* Mute */ + .kcontrol_new = &snd_us16x08_ch_boolean_ctl, + .control_id = SND_US16X08_ID_MUTE, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "Mute Switch", + .freeer = NULL, + .default_val = 0 + }, + { /* Pan */ + .kcontrol_new = &snd_us16x08_ch_int_ctl, + .control_id = SND_US16X08_ID_PAN, + .type = USB_MIXER_U16, + .num_channels = 16, + .name = "Pan Left-Right Volume", + .freeer = NULL, + .default_val = 127 + }, +}; + +/* table of master controls */ +static struct snd_us16x08_control_params master_controls[] = { + { /* Master */ + .kcontrol_new = &snd_us16x08_master_ctl, + .control_id = SND_US16X08_ID_FADER, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Master Volume", + .freeer = NULL, + .default_val = 127 + }, + { /* Bypass */ + .kcontrol_new = &snd_us16x08_bus_ctl, + .control_id = SND_US16X08_ID_BYPASS, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "DSP Bypass Switch", + .freeer = NULL, + .default_val = 0 + }, + { /* Buss out */ + .kcontrol_new = &snd_us16x08_bus_ctl, + .control_id = SND_US16X08_ID_BUSS_OUT, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "Buss Out Switch", + .freeer = NULL, + .default_val = 0 + }, + { /* Master mute */ + .kcontrol_new = &snd_us16x08_bus_ctl, + .control_id = SND_US16X08_ID_MUTE, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "Master Mute Switch", + .freeer = NULL, + .default_val = 0 + }, + +}; + +int snd_us16x08_controls_create(struct usb_mixer_interface *mixer) +{ + int i, j; + int err; + struct usb_mixer_elem_info *elem; + struct snd_us16x08_comp_store *comp_store; + struct snd_us16x08_meter_store *meter_store; + struct snd_us16x08_eq_store *eq_store; + + /* just check for non-MIDI interface */ + if (mixer->hostif->desc.bInterfaceNumber == 3) { + + /* create compressor mixer elements */ + comp_store = snd_us16x08_create_comp_store(); + if (comp_store == NULL) + return -ENOMEM; + + /* create eq store */ + eq_store = snd_us16x08_create_eq_store(); + if (eq_store == NULL) { + kfree(comp_store); + return -ENOMEM; + } + + /* create meters store */ + meter_store = snd_us16x08_create_meter_store(); + if (meter_store == NULL) { + kfree(comp_store); + kfree(eq_store); + return -ENOMEM; + } + + /* add routing control */ + err = add_new_ctl(mixer, &snd_us16x08_route_ctl, + SND_US16X08_ID_ROUTE, USB_MIXER_U8, 8, "Line Out Route", + NULL, NULL, &elem); + if (err < 0) { + usb_audio_dbg(mixer->chip, + "Failed to create route control, err:%d\n", + err); + return err; + } + for (i = 0; i < 8; i++) + elem->cache_val[i] = i < 2 ? i : i + 2; + elem->cached = 0xff; + + /* add master controls */ + for (i = 0; + i < sizeof(master_controls) + / sizeof(control_params); + i++) { + + err = add_new_ctl(mixer, + master_controls[i].kcontrol_new, + master_controls[i].control_id, + master_controls[i].type, + master_controls[i].num_channels, + master_controls[i].name, + comp_store, + master_controls[i].freeer, &elem); + if (err < 0) + return err; + elem->cache_val[0] = master_controls[i].default_val; + elem->cached = 1; + } + + /* add channel controls */ + for (i = 0; + i < sizeof(channel_controls) + / sizeof(control_params); + i++) { + + err = add_new_ctl(mixer, + channel_controls[i].kcontrol_new, + channel_controls[i].control_id, + channel_controls[i].type, + channel_controls[i].num_channels, + channel_controls[i].name, + comp_store, + channel_controls[i].freeer, &elem); + if (err < 0) + return err; + for (j = 0; j < SND_US16X08_MAX_CHANNELS; j++) { + elem->cache_val[j] = + channel_controls[i].default_val; + } + elem->cached = 0xffff; + } + + /* add EQ controls */ + for (i = 0; i < sizeof(eq_controls) / + sizeof(control_params); i++) { + + err = add_new_ctl(mixer, + eq_controls[i].kcontrol_new, + eq_controls[i].control_id, + eq_controls[i].type, + eq_controls[i].num_channels, + eq_controls[i].name, + eq_store, + eq_controls[i].freeer, NULL); + if (err < 0) + return err; + } + + /* add compressor controls */ + for (i = 0; + i < sizeof(comp_controls) + / sizeof(control_params); + i++) { + + err = add_new_ctl(mixer, + comp_controls[i].kcontrol_new, + comp_controls[i].control_id, + comp_controls[i].type, + comp_controls[i].num_channels, + comp_controls[i].name, + comp_store, + comp_controls[i].freeer, NULL); + if (err < 0) + return err; + } + + /* meter function 'get' must access to compressor store + * so place a reference here + */ + meter_store->comp_store = comp_store; + err = add_new_ctl(mixer, &snd_us16x08_meter_ctl, + SND_US16X08_ID_METER, USB_MIXER_U16, 0, "Level Meter", + (void *) meter_store, snd_usb_mixer_elem_free, NULL); + if (err < 0) + return err; + } + + return 0; +} + diff --git a/sound/usb/mixer_us16x08.h b/sound/usb/mixer_us16x08.h new file mode 100644 index 0000000..64f89b5 --- /dev/null +++ b/sound/usb/mixer_us16x08.h @@ -0,0 +1,122 @@ +#ifndef __USB_MIXER_US16X08_H +#define __USB_MIXER_US16X08_H + +#define SND_US16X08_MAX_CHANNELS 16 + +/* define some bias, cause some alsa-mixers wont work with + * negative ranges or if mixer-min != 0 + */ +#define SND_US16X08_NO_BIAS 0 +#define SND_US16X08_FADER_BIAS 127 +#define SND_US16X08_EQ_HIGHFREQ_BIAS 0x20 +#define SND_US16X08_COMP_THRESHOLD_BIAS 0x20 +#define SND_US16X08_COMP_ATTACK_BIAS 2 +#define SND_US16X08_COMP_RELEASE_BIAS 1 + +/* get macro for components of kcontrol private_value */ +#define SND_US16X08_KCBIAS(x) (((x)->private_value >> 24) & 0xff) +#define SND_US16X08_KCSTEP(x) (((x)->private_value >> 16) & 0xff) +#define SND_US16X08_KCMIN(x) (((x)->private_value >> 8) & 0xff) +#define SND_US16X08_KCMAX(x) (((x)->private_value >> 0) & 0xff) +/* set macro for kcontrol private_value */ +#define SND_US16X08_KCSET(bias, step, min, max) \ + (((bias) << 24) | ((step) << 16) | ((min) << 8) | (max)) + +/* the URB request/type to control Tascam mixers */ +#define SND_US16X08_URB_REQUEST 0x1D +#define SND_US16X08_URB_REQUESTTYPE 0x40 + +/* the URB params to retrieve meter ranges */ +#define SND_US16X08_URB_METER_REQUEST 0x1e +#define SND_US16X08_URB_METER_REQUESTTYPE 0xc0 + +#define MUA0(x, y) ((x)[(y) * 10 + 4]) +#define MUA1(x, y) ((x)[(y) * 10 + 5]) +#define MUA2(x, y) ((x)[(y) * 10 + 6]) +#define MUB0(x, y) ((x)[(y) * 10 + 7]) +#define MUB1(x, y) ((x)[(y) * 10 + 8]) +#define MUB2(x, y) ((x)[(y) * 10 + 9]) +#define MUC0(x, y) ((x)[(y) * 10 + 10]) +#define MUC1(x, y) ((x)[(y) * 10 + 11]) +#define MUC2(x, y) ((x)[(y) * 10 + 12]) +#define MUC3(x, y) ((x)[(y) * 10 + 13]) + +/* Common Channel control IDs */ +#define SND_US16X08_ID_BYPASS 0x45 +#define SND_US16X08_ID_BUSS_OUT 0x44 +#define SND_US16X08_ID_PHASE 0x85 +#define SND_US16X08_ID_MUTE 0x83 +#define SND_US16X08_ID_FADER 0x81 +#define SND_US16X08_ID_PAN 0x82 +#define SND_US16X08_ID_METER 0xB1 + +#define SND_US16X08_ID_EQ_BAND_COUNT 4 +#define SND_US16X08_ID_EQ_PARAM_COUNT 4 + +/* EQ level IDs */ +#define SND_US16X08_ID_EQLOWLEVEL 0x01 +#define SND_US16X08_ID_EQLOWMIDLEVEL 0x02 +#define SND_US16X08_ID_EQHIGHMIDLEVEL 0x03 +#define SND_US16X08_ID_EQHIGHLEVEL 0x04 + +/* EQ frequence IDs */ +#define SND_US16X08_ID_EQLOWFREQ 0x11 +#define SND_US16X08_ID_EQLOWMIDFREQ 0x12 +#define SND_US16X08_ID_EQHIGHMIDFREQ 0x13 +#define SND_US16X08_ID_EQHIGHFREQ 0x14 + +/* EQ width IDs */ +#define SND_US16X08_ID_EQLOWMIDWIDTH 0x22 +#define SND_US16X08_ID_EQHIGHMIDWIDTH 0x23 + +#define SND_US16X08_ID_EQENABLE 0x30 + +#define EQ_STORE_BAND_IDX(x) ((x) & 0xf) +#define EQ_STORE_PARAM_IDX(x) (((x) & 0xf0) >> 4) + +#define SND_US16X08_ID_ROUTE 0x00 + +/* Compressor Ids */ +#define SND_US16X08_ID_COMP_BASE 0x32 +#define SND_US16X08_ID_COMP_THRESHOLD SND_US16X08_ID_COMP_BASE +#define SND_US16X08_ID_COMP_RATIO (SND_US16X08_ID_COMP_BASE + 1) +#define SND_US16X08_ID_COMP_ATTACK (SND_US16X08_ID_COMP_BASE + 2) +#define SND_US16X08_ID_COMP_RELEASE (SND_US16X08_ID_COMP_BASE + 3) +#define SND_US16X08_ID_COMP_GAIN (SND_US16X08_ID_COMP_BASE + 4) +#define SND_US16X08_ID_COMP_SWITCH (SND_US16X08_ID_COMP_BASE + 5) +#define SND_US16X08_ID_COMP_COUNT 6 + +#define COMP_STORE_IDX(x) ((x) - SND_US16X08_ID_COMP_BASE) + +struct snd_us16x08_eq_store { + u8 val[SND_US16X08_ID_EQ_BAND_COUNT][SND_US16X08_ID_EQ_PARAM_COUNT] + [SND_US16X08_MAX_CHANNELS]; +}; + +struct snd_us16x08_comp_store { + u8 val[SND_US16X08_ID_COMP_COUNT][SND_US16X08_MAX_CHANNELS]; +}; + +struct snd_us16x08_meter_store { + int meter_level[SND_US16X08_MAX_CHANNELS]; + int master_level[2]; /* level of meter for master output */ + int comp_index; /* round trip channel selector */ + int comp_active_index; /* channel select from user space mixer */ + int comp_level[16]; /* compressor reduction level */ + struct snd_us16x08_comp_store *comp_store; +}; + +struct snd_us16x08_control_params { + struct snd_kcontrol_new *kcontrol_new; + int control_id; + int type; + int num_channels; + const char *name; + void (*freeer)(struct snd_kcontrol *kctl); + int default_val; +}; + +#define snd_us16x08_switch_info snd_ctl_boolean_mono_info + +int snd_us16x08_controls_create(struct usb_mixer_interface *mixer); +#endif /* __USB_MIXER_US16X08_H */ -- 2.7.4

1 0

[alsa-devel] [PATCH 0/8] Yet more fixes for LPE HDMI audio
by Takashi Iwai 16 Feb '17

16 Feb '17

Hi, here is yet another round of LPE HDMI audio driver updates. After reading the report from Pierre, I tested the monitor connection and xrandr, and confirmed that it sucks. Here is an attempt to improve the handling. The patches are found in topic/intel-lpe-audio branch as usual, too. Takashi === Takashi Iwai (8): ALSA: x86: Implement jack control ALSA: x86: Use snd_pcm_stop_xrun() for connection / disconnection paths ALSA: x86: Fix memory leak in had_build_channel_allocation_map() ALSA: x86: Don't return an error from chmap ctl at disconnected ALSA: x86: Avoid register accesses during disconnection ALSA: x86: Stop the stream when buffer is processed after disconnection ALSA: x86: Minor code rearrangement ALSA: x86: Don't bail out from PCM ops when disconnected sound/x86/intel_hdmi_audio.c | 118 +++++++++++++++++++++---------------------- sound/x86/intel_hdmi_audio.h | 1 + 2 files changed, 59 insertions(+), 60 deletions(-) -- 2.11.1

1 9

[alsa-devel] [PATCH v6 1/1] ALSA: Tascam US-16x08 DSP mixer quirk
by OnkelDead 16 Feb '17

16 Feb '17

Fixed codestyle, removed blank lines among the variable definitions / declarations. Changed log messages to usb_audio_dbg(), although they happens in therory only. Changed most control names to standard naming rule (where suitable, I'd miss naming rules for EQ or compressor features). Add mixer quirk for Tascam US-16x08 usb interface. Even that this an usb compliant device, the input channels and DSP functions (EQ/Compressor) arn't accessible by default. Signed-off-by: Detlef Urban <onkel(a)paraair.de> --- sound/usb/Makefile | 1 + sound/usb/mixer_quirks.c | 5 + sound/usb/mixer_us16x08.c | 1435 +++++++++++++++++++++++++++++++++++++++++++++ sound/usb/mixer_us16x08.h | 122 ++++ 4 files changed, 1563 insertions(+) create mode 100644 sound/usb/mixer_us16x08.c create mode 100644 sound/usb/mixer_us16x08.h diff --git a/sound/usb/Makefile b/sound/usb/Makefile index 2d2d122..42cb33b 100644 --- a/sound/usb/Makefile +++ b/sound/usb/Makefile @@ -10,6 +10,7 @@ snd-usb-audio-objs := card.o \ mixer.o \ mixer_quirks.o \ mixer_scarlett.o \ + mixer_us16x08.o \ pcm.o \ proc.o \ quirks.o \ diff --git a/sound/usb/mixer_quirks.c b/sound/usb/mixer_quirks.c index 04991b0..4fa0053 100644 --- a/sound/usb/mixer_quirks.c +++ b/sound/usb/mixer_quirks.c @@ -43,6 +43,7 @@ #include "mixer.h" #include "mixer_quirks.h" #include "mixer_scarlett.h" +#include "mixer_us16x08.h" #include "helper.h" extern struct snd_kcontrol_new *snd_usb_feature_unit_ctl; @@ -1729,6 +1730,10 @@ int snd_usb_mixer_apply_create_quirk(struct usb_mixer_interface *mixer) return err; switch (mixer->chip->usb_id) { + /* Tascam US-16x08 */ + case USB_ID(0x0644, 0x8047): + err = snd_us16x08_controls_create(mixer); + break; case USB_ID(0x041e, 0x3020): case USB_ID(0x041e, 0x3040): case USB_ID(0x041e, 0x3042): diff --git a/sound/usb/mixer_us16x08.c b/sound/usb/mixer_us16x08.c new file mode 100644 index 0000000..3da0cb5 --- /dev/null +++ b/sound/usb/mixer_us16x08.c @@ -0,0 +1,1435 @@ +/* + * Tascam US-16x08 ALSA driver + * + * Copyright (c) 2016 by Detlef Urban (onkel(a)paraair.de) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <linux/slab.h> +#include <linux/usb.h> +#include <linux/usb/audio-v2.h> + +#include <sound/core.h> +#include <sound/control.h> + +#include "usbaudio.h" +#include "mixer.h" +#include "helper.h" + +#include "mixer_us16x08.h" + +/* USB control message templates */ +static char route_msg[] = { + 0x61, + 0x02, + 0x03, /* input from master (0x02) or input from computer bus (0x03) */ + 0x62, + 0x02, + 0x01, /* input index (0x01/0x02 eq. left/right) or bus (0x01-0x08) */ + 0x41, + 0x01, + 0x61, + 0x02, + 0x01, + 0x62, + 0x02, + 0x01, /* output index (0x01-0x08) */ + 0x42, + 0x01, + 0x43, + 0x01, + 0x00, + 0x00 +}; + +static char mix_init_msg1[] = { + 0x71, 0x01, 0x00, 0x00 +}; + +static char mix_init_msg2[] = { + 0x62, 0x02, 0x00, 0x61, 0x02, 0x04, 0xb1, 0x01, 0x00, 0x00 +}; + +static char mix_msg_in[] = { + /* default message head, equal to all mixers */ + 0x61, 0x02, 0x04, 0x62, 0x02, 0x01, + 0x81, /* 0x06: Controller ID */ + 0x02, /* 0x07: */ + 0x00, /* 0x08: Value of common mixer */ + 0x00, + 0x00 +}; + +static char mix_msg_out[] = { + /* default message head, equal to all mixers */ + 0x61, 0x02, 0x02, 0x62, 0x02, 0x01, + 0x81, /* 0x06: Controller ID */ + 0x02, /* 0x07: */ + 0x00, /* 0x08: Value of common mixer */ + 0x00, + 0x00 +}; + +static char bypass_msg_out[] = { + 0x45, + 0x02, + 0x01, /* on/off flag */ + 0x00, + 0x00 +}; + +static char bus_msg_out[] = { + 0x44, + 0x02, + 0x01, /* on/off flag */ + 0x00, + 0x00 +}; + +static char comp_msg[] = { + /* default message head, equal to all mixers */ + 0x61, 0x02, 0x04, 0x62, 0x02, 0x01, + 0x91, + 0x02, + 0xf0, /* 0x08: Threshold db (8) (e0 ... 00) (+-0dB -- -32dB) x-32 */ + 0x92, + 0x02, + 0x0a, /* 0x0b: Ratio (0a,0b,0d,0f,11,14,19,1e,23,28,32,3c,50,a0,ff) */ + 0x93, + 0x02, + 0x02, /* 0x0e: Attack (0x02 ... 0xc0) (2ms ... 200ms) */ + 0x94, + 0x02, + 0x01, /* 0x11: Release (0x01 ... 0x64) (10ms ... 1000ms) x*10 */ + 0x95, + 0x02, + 0x03, /* 0x14: gain (0 ... 20) (0dB .. 20dB) */ + 0x96, + 0x02, + 0x01, + 0x97, + 0x02, + 0x01, /* 0x1a: main Comp switch (0 ... 1) (off ... on)) */ + 0x00, + 0x00 +}; + +static char eqs_msq[] = { + /* default message head, equal to all mixers */ + 0x61, 0x02, 0x04, 0x62, 0x02, 0x01, + 0x51, /* 0x06: Controller ID */ + 0x02, + 0x04, /* 0x08: EQ set num (0x01..0x04) (LOW, LOWMID, HIGHMID, HIGH)) */ + 0x52, + 0x02, + 0x0c, /* 0x0b: value dB (0 ... 12) (-12db .. +12db) x-6 */ + 0x53, + 0x02, + 0x0f, /* 0x0e: value freq (32-47) (1.7kHz..18kHz) */ + 0x54, + 0x02, + 0x02, /* 0x11: band width (0-6) (Q16-Q0.25) 2^x/4 (EQ xxMID only) */ + 0x55, + 0x02, + 0x01, /* 0x14: main EQ switch (0 ... 1) (off ... on)) */ + 0x00, + 0x00 +}; + +/* compressor ratio map */ +static char ratio_map[] = { + 0x0a, 0x0b, 0x0d, 0x0f, 0x11, 0x14, 0x19, 0x1e, + 0x23, 0x28, 0x32, 0x3c, 0x50, 0xa0, 0xff +}; + +/* route enumeration names */ +static char *route_names[] = { + "Master Left", "Master Right", "Output 1", "Output 2", "Output 3", + "Output 4", "Output 5", "Output 6", "Output 7", "Output 8", +}; + +static int snd_us16x08_recv_urb(struct snd_usb_audio *chip, + unsigned char *buf, int size) +{ + + mutex_lock(&chip->mutex); + snd_usb_ctl_msg(chip->dev, + usb_rcvctrlpipe(chip->dev, 0), + SND_US16X08_URB_METER_REQUEST, + SND_US16X08_URB_METER_REQUESTTYPE, 0, 0, buf, size); + mutex_unlock(&chip->mutex); + return 0; +} + +/* wrapper function to send prepared URB buffer to usb device. Return an error + * code if something went wrong + */ +static int snd_us16x08_send_urb(struct snd_usb_audio *chip, char *buf, int size) +{ + int err = 0; + + if (chip) { + err = snd_usb_ctl_msg(chip->dev, usb_sndctrlpipe(chip->dev, 0), + SND_US16X08_URB_REQUEST, SND_US16X08_URB_REQUESTTYPE, + 0, 0, buf, size); + } + + return err; +} + +static int snd_us16x08_route_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + int i; + + uinfo->count = 1; + uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; + uinfo->value.integer.max = SND_US16X08_KCMAX(kcontrol); + uinfo->value.integer.min = SND_US16X08_KCMIN(kcontrol); + uinfo->value.integer.step = SND_US16X08_KCSTEP(kcontrol); + uinfo->value.enumerated.items = 10; + uinfo->value.enumerated.names_ptr = (__u64) route_names; + uinfo->value.enumerated.names_length = 0; + for (i = 0; i < 10; i++) + uinfo->value.enumerated.names_length += + strlen(route_names[i]) + 1; + return 0; +} + +static int snd_us16x08_route_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + int index = ucontrol->id.index; + + /* route has no bias */ + ucontrol->value.integer.value[0] = elem->cache_val[index]; + + return 0; +} + +static int snd_us16x08_route_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + int index = ucontrol->id.index; + char buf[sizeof(route_msg)]; + int val, val_org, err = 0; + + /* prepare the message buffer from template */ + memcpy(buf, route_msg, sizeof(route_msg)); + + /* get the new value (no bias for routes) */ + val = ucontrol->value.integer.value[0]; + if (val < 2) { + /* input comes from a master channel */ + val_org = val; + buf[2] = 0x02; + } else { + /* input comes from a computer channel */ + buf[2] = 0x03; + val_org = val - 2; + } + + /* place new route selection in URB message */ + buf[5] = (unsigned char) (val_org & 0x0f) + 1; + /* place route selector in URB message */ + buf[13] = index + 1; + + err = snd_us16x08_send_urb(chip, buf, sizeof(route_msg)); + + if (err > 0) { + elem->cached |= 1 << index; + elem->cache_val[index] = val; + } else { + usb_audio_dbg(chip, "Failed to set routing, err:%d\n", err); + } + + return err > 0 ? 1 : 0; +} + +static int snd_us16x08_master_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->count = 1; + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->value.integer.max = SND_US16X08_KCMAX(kcontrol); + uinfo->value.integer.min = SND_US16X08_KCMIN(kcontrol); + uinfo->value.integer.step = SND_US16X08_KCSTEP(kcontrol); + return 0; +} + +static int snd_us16x08_master_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + int index = ucontrol->id.index; + + ucontrol->value.integer.value[0] = elem->cache_val[index]; + + return 0; +} + +static int snd_us16x08_master_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + char buf[sizeof(mix_msg_out)]; + int val, err = 0; + int index = ucontrol->id.index; + + /* prepare the message buffer from template */ + memcpy(buf, mix_msg_out, sizeof(mix_msg_out)); + + /* new control value incl. bias*/ + val = ucontrol->value.integer.value[0]; + + buf[8] = val - SND_US16X08_KCBIAS(kcontrol); + buf[6] = elem->head.id; + + /* place channel selector in URB message */ + buf[5] = index + 1; + err = snd_us16x08_send_urb(chip, buf, sizeof(mix_msg_out)); + + if (err > 0) { + elem->cached |= 1 << index; + elem->cache_val[index] = val; + } else { + usb_audio_dbg(chip, "Failed to set master, err:%d\n", err); + } + + return err > 0 ? 1 : 0; +} + +static int snd_us16x08_bus_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + char buf[sizeof(mix_msg_out)]; + int val, err = 0; + + val = ucontrol->value.integer.value[0]; + + /* prepare the message buffer from template */ + switch (elem->head.id) { + case SND_US16X08_ID_BYPASS: + memcpy(buf, bypass_msg_out, sizeof(bypass_msg_out)); + buf[2] = val; + err = snd_us16x08_send_urb(chip, buf, sizeof(bypass_msg_out)); + break; + case SND_US16X08_ID_BUSS_OUT: + memcpy(buf, bus_msg_out, sizeof(bus_msg_out)); + buf[2] = val; + err = snd_us16x08_send_urb(chip, buf, sizeof(bus_msg_out)); + break; + case SND_US16X08_ID_MUTE: + memcpy(buf, mix_msg_out, sizeof(mix_msg_out)); + buf[8] = val; + buf[6] = elem->head.id; + buf[5] = 1; + err = snd_us16x08_send_urb(chip, buf, sizeof(mix_msg_out)); + break; + } + + if (err > 0) { + elem->cached |= 1; + elem->cache_val[0] = val; + } else { + usb_audio_dbg(chip, "Failed to set buss param, err:%d\n", err); + } + + return err > 0 ? 1 : 0; +} + +static int snd_us16x08_bus_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + + switch (elem->head.id) { + case SND_US16X08_ID_BUSS_OUT: + ucontrol->value.integer.value[0] = elem->cache_val[0]; + break; + case SND_US16X08_ID_BYPASS: + ucontrol->value.integer.value[0] = elem->cache_val[0]; + break; + case SND_US16X08_ID_MUTE: + ucontrol->value.integer.value[0] = elem->cache_val[0]; + break; + } + + return 0; +} + +/* gets a current mixer value from common store */ +static int snd_us16x08_channel_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + int index = ucontrol->id.index; + + ucontrol->value.integer.value[0] = elem->cache_val[index]; + + return 0; +} + +static int snd_us16x08_channel_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + char buf[sizeof(mix_msg_in)]; + int val, err; + int index = ucontrol->id.index; + + /* prepare URB message from template */ + memcpy(buf, mix_msg_in, sizeof(mix_msg_in)); + + val = ucontrol->value.integer.value[0]; + + /* add the bias to the new value */ + buf[8] = val - SND_US16X08_KCBIAS(kcontrol); + buf[6] = elem->head.id; + buf[5] = index + 1; + + err = snd_us16x08_send_urb(chip, buf, sizeof(mix_msg_in)); + + if (err > 0) { + elem->cached |= 1 << index; + elem->cache_val[index] = val; + } else { + usb_audio_dbg(chip, "Failed to set channel, err:%d\n", err); + } + + return err > 0 ? 1 : 0; +} + +static int snd_us16x08_mix_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->count = 1; + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->value.integer.max = SND_US16X08_KCMAX(kcontrol); + uinfo->value.integer.min = SND_US16X08_KCMIN(kcontrol); + uinfo->value.integer.step = SND_US16X08_KCSTEP(kcontrol); + return 0; +} + +static int snd_us16x08_comp_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_us16x08_comp_store *store = + ((struct snd_us16x08_comp_store *) elem->private_data); + int index = ucontrol->id.index; + int val_idx = COMP_STORE_IDX(elem->head.id); + + ucontrol->value.integer.value[0] = store->val[val_idx][index]; + + return 0; +} + +static int snd_us16x08_comp_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_comp_store *store = + ((struct snd_us16x08_comp_store *) elem->private_data); + int index = ucontrol->id.index; + char buf[sizeof(comp_msg)]; + int val_idx, val; + int err = 0; + + /* prepare compressor URB message from template */ + memcpy(buf, comp_msg, sizeof(comp_msg)); + + /* new control value incl. bias*/ + val_idx = elem->head.id - SND_US16X08_ID_COMP_BASE; + + val = ucontrol->value.integer.value[0]; + store->val[val_idx][index] = ucontrol->value.integer.value[0]; + + /* place comp values in message buffer watch bias! */ + buf[8] = store->val[ + COMP_STORE_IDX(SND_US16X08_ID_COMP_THRESHOLD)][index] + - SND_US16X08_COMP_THRESHOLD_BIAS; + buf[11] = ratio_map[store->val[ + COMP_STORE_IDX(SND_US16X08_ID_COMP_RATIO)][index]]; + buf[14] = store->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_ATTACK)][index] + + SND_US16X08_COMP_ATTACK_BIAS; + buf[17] = store->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_RELEASE)][index] + + SND_US16X08_COMP_RELEASE_BIAS; + buf[20] = store->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_GAIN)][index]; + buf[26] = store->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_SWITCH)][index]; + + /* place channel selector in message buffer */ + buf[5] = index + 1; + + err = snd_us16x08_send_urb(chip, buf, sizeof(comp_msg)); + + if (err > 0) { + elem->cached |= 1 << index; + elem->cache_val[index] = val; + } else { + usb_audio_dbg(chip, "Failed to set compressor, err:%d\n", err); + } + + return 1; +} + +static int snd_us16x08_eqswitch_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int val = 0; + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_us16x08_eq_store *store = + ((struct snd_us16x08_eq_store *) elem->private_data); + int index = ucontrol->id.index; + + /* get low switch from cache is enough, cause all bands are together */ + val = store->val[EQ_STORE_BAND_IDX(elem->head.id)] + [EQ_STORE_PARAM_IDX(elem->head.id)][index]; + ucontrol->value.integer.value[0] = val; + + return 0; +} + +static int snd_us16x08_eqswitch_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_eq_store *store = + ((struct snd_us16x08_eq_store *) elem->private_data); + int index = ucontrol->id.index; + + char buf[sizeof(eqs_msq)]; + int val, err = 0; + int b_idx; + + /* new control value incl. bias*/ + val = ucontrol->value.integer.value[0] + SND_US16X08_KCBIAS(kcontrol); + + /* prepare URB message from EQ template */ + memcpy(buf, eqs_msq, sizeof(eqs_msq)); + + /* place channel index in URB message */ + buf[5] = index + 1; + for (b_idx = 0; b_idx < SND_US16X08_ID_EQ_BAND_COUNT; b_idx++) { + /* all four EQ bands have to be enabled/disabled in once */ + buf[20] = val; + buf[17] = store->val[b_idx][2][index]; + buf[14] = store->val[b_idx][1][index]; + buf[11] = store->val[b_idx][0][index]; + buf[8] = b_idx + 1; + err = snd_us16x08_send_urb(chip, buf, sizeof(eqs_msq)); + if (err < 0) + break; + store->val[b_idx][3][index] = val; + msleep(15); + } + + if (err > 0) { + elem->cached |= 1 << index; + elem->cache_val[index] = val; + } else { + usb_audio_dbg(chip, "Failed to set eq switch, err:%d\n", err); + } + + return 1; +} + +static int snd_us16x08_eq_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int val = 0; + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_us16x08_eq_store *store = + ((struct snd_us16x08_eq_store *) elem->private_data); + int index = ucontrol->id.index; + int b_idx = EQ_STORE_BAND_IDX(elem->head.id) - 1; + int p_idx = EQ_STORE_PARAM_IDX(elem->head.id); + + val = store->val[b_idx][p_idx][index]; + + ucontrol->value.integer.value[0] = val; + + return 0; +} + +static int snd_us16x08_eq_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_eq_store *store = + ((struct snd_us16x08_eq_store *) elem->private_data); + int index = ucontrol->id.index; + char buf[sizeof(eqs_msq)]; + int val, err = 0; + int b_idx = EQ_STORE_BAND_IDX(elem->head.id) - 1; + int p_idx = EQ_STORE_PARAM_IDX(elem->head.id); + + /* copy URB buffer from EQ template */ + memcpy(buf, eqs_msq, sizeof(eqs_msq)); + + val = ucontrol->value.integer.value[0]; + + store->val[b_idx][p_idx][index] = val; + buf[20] = store->val[b_idx][3][index]; + buf[17] = store->val[b_idx][2][index]; + buf[14] = store->val[b_idx][1][index]; + buf[11] = store->val[b_idx][0][index]; + + /* place channel index in URB buffer */ + buf[5] = index + 1; + + /* place EQ band in URB buffer */ + buf[8] = b_idx + 1; + + err = snd_us16x08_send_urb(chip, buf, sizeof(eqs_msq)); + + if (err > 0) { + /* store new value in EQ band cache */ + elem->cached |= 1 << index; + elem->cache_val[index] = val; + } else { + usb_audio_dbg(chip, "Failed to set eq param, err:%d\n", err); + } + + return 1; +} + +static int snd_us16x08_meter_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->count = 1; + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->value.integer.max = 0x7FFF; + uinfo->value.integer.min = 0; + + return 0; +} + +/* calculate compressor index for reduction level request */ +static int snd_get_meter_comp_index(struct snd_us16x08_meter_store *store) +{ + int ret; + + /* any channel active */ + if (store->comp_active_index) { + /* check for stereo link */ + if (store->comp_active_index & 0x20) { + /* reset comp_index to left channel*/ + if (store->comp_index - + store->comp_active_index > 1) + store->comp_index = + store->comp_active_index; + + ret = store->comp_index++ & 0x1F; + } else { + /* no stereo link */ + ret = store->comp_active_index; + } + } else { + /* skip channels with no compressor active */ + while (!store->comp_store->val[ + COMP_STORE_IDX(SND_US16X08_ID_COMP_SWITCH)] + [store->comp_index - 1] + && store->comp_index <= SND_US16X08_MAX_CHANNELS) { + store->comp_index++; + } + ret = store->comp_index++; + if (store->comp_index > SND_US16X08_MAX_CHANNELS) + store->comp_index = 1; + } + return ret; +} + +/* retrieve the meter level values from URB message */ +static void get_meter_levels_from_urb(int s, + struct snd_us16x08_meter_store *store, + u8 *meter_urb) +{ + int val = MUC2(meter_urb, s) + (MUC3(meter_urb, s) << 8); + + if (MUA0(meter_urb, s) == 0x61 && MUA1(meter_urb, s) == 0x02 && + MUA2(meter_urb, s) == 0x04 && MUB0(meter_urb, s) == 0x62) { + if (MUC0(meter_urb, s) == 0x72) + store->meter_level[MUB2(meter_urb, s) - 1] = val; + if (MUC0(meter_urb, s) == 0xb2) + store->comp_level[MUB2(meter_urb, s) - 1] = val; + } + if (MUA0(meter_urb, s) == 0x61 && MUA1(meter_urb, s) == 0x02 && + MUA2(meter_urb, s) == 0x02 && MUB0(meter_urb, s) == 0x62) + store->master_level[MUB2(meter_urb, s) - 1] = val; +} + +/* Function to retrieve current meter values from the device. + * + * The device needs to be polled for meter values with an initial + * requests. It will return with a sequence of different meter value + * packages. The first request (case 0:) initiate this meter response sequence. + * After the third response, an additional request can be placed, + * to retrieve compressor reduction level value for given channel. This round + * trip channel selector will skip all inactive compressors. + * A mixer can interrupt this round-trip by selecting one ore two (stereo-link) + * specific channels. + */ +static int snd_us16x08_meter_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int i, set; + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_meter_store *store = elem->private_data; + u8 meter_urb[64]; + + + if (elem) { + store = (struct snd_us16x08_meter_store *) elem->private_data; + chip = elem->head.mixer->chip; + } else + return 0; + + switch (kcontrol->private_value) { + case 0: + snd_us16x08_send_urb(chip, mix_init_msg1, 4); + snd_us16x08_recv_urb(chip, meter_urb, + sizeof(meter_urb)); + kcontrol->private_value++; + break; + case 1: + snd_us16x08_recv_urb(chip, meter_urb, + sizeof(meter_urb)); + kcontrol->private_value++; + break; + case 2: + snd_us16x08_recv_urb(chip, meter_urb, + sizeof(meter_urb)); + kcontrol->private_value++; + break; + case 3: + mix_init_msg2[2] = snd_get_meter_comp_index(store); + snd_us16x08_send_urb(chip, mix_init_msg2, 10); + snd_us16x08_recv_urb(chip, meter_urb, + sizeof(meter_urb)); + kcontrol->private_value = 0; + break; + } + + for (set = 0; set < 6; set++) + get_meter_levels_from_urb(set, store, meter_urb); + + for (i = 0; i < SND_US16X08_MAX_CHANNELS; i++) { + ucontrol->value.integer.value[i] = + store ? store->meter_level[i] : 0; + } + + ucontrol->value.integer.value[i++] = store ? store->master_level[0] : 0; + ucontrol->value.integer.value[i++] = store ? store->master_level[1] : 0; + + for (i = 2; i < SND_US16X08_MAX_CHANNELS + 2; i++) + ucontrol->value.integer.value[i + SND_US16X08_MAX_CHANNELS] = + store ? store->comp_level[i - 2] : 0; + + return 1; +} + +static int snd_us16x08_meter_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_us16x08_meter_store *store = elem->private_data; + int val; + + val = ucontrol->value.integer.value[0]; + store->comp_active_index = val; + store->comp_index = val; + + return 1; +} + +static struct snd_kcontrol_new snd_us16x08_ch_boolean_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_switch_info, + .get = snd_us16x08_channel_get, + .put = snd_us16x08_channel_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 1) +}; + +static struct snd_kcontrol_new snd_us16x08_ch_int_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_channel_get, + .put = snd_us16x08_channel_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_FADER_BIAS, 1, 0, 133) +}; + +static struct snd_kcontrol_new snd_us16x08_master_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 1, + .info = snd_us16x08_master_info, + .get = snd_us16x08_master_get, + .put = snd_us16x08_master_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_FADER_BIAS, 1, 0, 133) +}; + +static struct snd_kcontrol_new snd_us16x08_route_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 8, + .info = snd_us16x08_route_info, + .get = snd_us16x08_route_get, + .put = snd_us16x08_route_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 9) +}; + +static struct snd_kcontrol_new snd_us16x08_bus_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 1, + .info = snd_us16x08_switch_info, + .get = snd_us16x08_bus_get, + .put = snd_us16x08_bus_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 1) +}; + +static struct snd_kcontrol_new snd_us16x08_compswitch_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_switch_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 1) +}; + +static struct snd_kcontrol_new snd_us16x08_comp_threshold_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_COMP_THRESHOLD_BIAS, 1, + 0, 0x20) +}; + +static struct snd_kcontrol_new snd_us16x08_comp_ratio_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, + sizeof(ratio_map) - 1), /*max*/ +}; + +static struct snd_kcontrol_new snd_us16x08_comp_gain_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 0x14) +}; + +static struct snd_kcontrol_new snd_us16x08_comp_attack_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = + SND_US16X08_KCSET(SND_US16X08_COMP_ATTACK_BIAS, 1, 0, 0xc6), +}; + +static struct snd_kcontrol_new snd_us16x08_comp_release_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = + SND_US16X08_KCSET(SND_US16X08_COMP_RELEASE_BIAS, 1, 0, 0x63), +}; + +static struct snd_kcontrol_new snd_us16x08_eq_gain_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 24), +}; + +static struct snd_kcontrol_new snd_us16x08_eq_low_freq_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 0x1F), +}; + +static struct snd_kcontrol_new snd_us16x08_eq_mid_freq_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 0x3F) +}; + +static struct snd_kcontrol_new snd_us16x08_eq_mid_width_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 0x06) +}; + +static struct snd_kcontrol_new snd_us16x08_eq_high_freq_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = + SND_US16X08_KCSET(SND_US16X08_EQ_HIGHFREQ_BIAS, 1, 0, 0x1F) +}; + +static struct snd_kcontrol_new snd_us16x08_eq_switch_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_switch_info, + .get = snd_us16x08_eqswitch_get, + .put = snd_us16x08_eqswitch_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 1) +}; + +static struct snd_kcontrol_new snd_us16x08_meter_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 1, + .info = snd_us16x08_meter_info, + .get = snd_us16x08_meter_get, + .put = snd_us16x08_meter_put +}; + +/* control store preparation */ + +/* setup compressor store and assign default value */ +static struct snd_us16x08_comp_store *snd_us16x08_create_comp_store(void) +{ + int i = 0; + struct snd_us16x08_comp_store *tmp = + kmalloc(sizeof(struct snd_us16x08_comp_store), GFP_KERNEL); + + if (tmp == NULL) + return NULL; + + for (i = 0; i < SND_US16X08_MAX_CHANNELS; i++) { + tmp->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_THRESHOLD)][i] + = 0x20; + tmp->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_RATIO)][i] = 0x00; + tmp->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_GAIN)][i] = 0x00; + tmp->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_SWITCH)][i] = 0x00; + tmp->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_ATTACK)][i] = 0x00; + tmp->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_RELEASE)][i] = 0x00; + } + return tmp; +} + +/* setup EQ store and assign default values */ +static struct snd_us16x08_eq_store *snd_us16x08_create_eq_store(void) +{ + int i, b_idx; + struct snd_us16x08_eq_store *tmp = + kmalloc(sizeof(struct snd_us16x08_eq_store), GFP_KERNEL); + + if (tmp == NULL) + return NULL; + + for (i = 0; i < SND_US16X08_MAX_CHANNELS; i++) { + for (b_idx = 0; b_idx < SND_US16X08_ID_EQ_BAND_COUNT; b_idx++) { + tmp->val[b_idx][0][i] = 0x0c; + tmp->val[b_idx][3][i] = 0x00; + switch (b_idx) { + case 0: /* EQ Low */ + tmp->val[b_idx][1][i] = 0x05; + tmp->val[b_idx][2][i] = 0xff; + break; + case 1: /* EQ Mid low */ + tmp->val[b_idx][1][i] = 0x0e; + tmp->val[b_idx][2][i] = 0x02; + break; + case 2: /* EQ Mid High */ + tmp->val[b_idx][1][i] = 0x1b; + tmp->val[b_idx][2][i] = 0x02; + break; + case 3: /* EQ High */ + tmp->val[b_idx][1][i] = 0x2f + - SND_US16X08_EQ_HIGHFREQ_BIAS; + tmp->val[b_idx][2][i] = 0xff; + break; + } + } + } + return tmp; +} + +struct snd_us16x08_meter_store *snd_us16x08_create_meter_store(void) +{ + struct snd_us16x08_meter_store *tmp = + kzalloc(sizeof(struct snd_us16x08_meter_store), GFP_KERNEL); + + if (!tmp) + return NULL; + tmp->comp_index = 1; + tmp->comp_active_index = 0; + return tmp; + +} + +static int add_new_ctl(struct usb_mixer_interface *mixer, + const struct snd_kcontrol_new *ncontrol, + int index, int val_type, int channels, + const char *name, const void *opt, + void (*freeer)(struct snd_kcontrol *kctl), + struct usb_mixer_elem_info **elem_ret) +{ + struct snd_kcontrol *kctl; + struct usb_mixer_elem_info *elem; + int err; + + usb_audio_dbg(mixer->chip, "us16x08 add mixer %s\n", name); + + elem = kzalloc(sizeof(*elem), GFP_KERNEL); + if (!elem) + return -ENOMEM; + + elem->head.mixer = mixer; + elem->head.resume = NULL; + elem->control = 0; + elem->idx_off = 0; + elem->head.id = index; + elem->val_type = val_type; + elem->channels = channels; + elem->private_data = (void *) opt; + + kctl = snd_ctl_new1(ncontrol, elem); + if (!kctl) { + kfree(elem); + return -ENOMEM; + } + + kctl->private_free = freeer; + + strlcpy(kctl->id.name, name, sizeof(kctl->id.name)); + + err = snd_usb_mixer_add_control(&elem->head, kctl); + if (err < 0) + return err; + + if (elem_ret) + *elem_ret = elem; + + return 0; +} + +static struct snd_us16x08_control_params control_params; + +/* table of EQ controls */ +static struct snd_us16x08_control_params eq_controls[] = { + { /* EQ switch */ + .kcontrol_new = &snd_us16x08_eq_switch_ctl, + .control_id = SND_US16X08_ID_EQENABLE, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "EQ Switch", + .freeer = snd_usb_mixer_elem_free + }, + { /* EQ low gain */ + .kcontrol_new = &snd_us16x08_eq_gain_ctl, + .control_id = SND_US16X08_ID_EQLOWLEVEL, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ Low Volume", + .freeer = snd_usb_mixer_elem_free + }, + { /* EQ low freq */ + .kcontrol_new = &snd_us16x08_eq_low_freq_ctl, + .control_id = SND_US16X08_ID_EQLOWFREQ, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ Low Frequence", + .freeer = NULL + }, + { /* EQ mid low gain */ + .kcontrol_new = &snd_us16x08_eq_gain_ctl, + .control_id = SND_US16X08_ID_EQLOWMIDLEVEL, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ MidLow Volume", + .freeer = snd_usb_mixer_elem_free + }, + { /* EQ mid low freq */ + .kcontrol_new = &snd_us16x08_eq_mid_freq_ctl, + .control_id = SND_US16X08_ID_EQLOWMIDFREQ, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ MidLow Frequence", + .freeer = NULL + }, + { /* EQ mid low Q */ + .kcontrol_new = &snd_us16x08_eq_mid_width_ctl, + .control_id = SND_US16X08_ID_EQLOWMIDWIDTH, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ MidQLow Q", + .freeer = NULL + }, + { /* EQ mid high gain */ + .kcontrol_new = &snd_us16x08_eq_gain_ctl, + .control_id = SND_US16X08_ID_EQHIGHMIDLEVEL, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ MidHigh Volume", + .freeer = snd_usb_mixer_elem_free + }, + { /* EQ mid high freq */ + .kcontrol_new = &snd_us16x08_eq_mid_freq_ctl, + .control_id = SND_US16X08_ID_EQHIGHMIDFREQ, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ MidHigh Frequence", + .freeer = NULL + }, + { /* EQ mid high Q */ + .kcontrol_new = &snd_us16x08_eq_mid_width_ctl, + .control_id = SND_US16X08_ID_EQHIGHMIDWIDTH, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ MidHigh Q", + .freeer = NULL + }, + { /* EQ high gain */ + .kcontrol_new = &snd_us16x08_eq_gain_ctl, + .control_id = SND_US16X08_ID_EQHIGHLEVEL, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ High Volume", + .freeer = snd_usb_mixer_elem_free + }, + { /* EQ low freq */ + .kcontrol_new = &snd_us16x08_eq_high_freq_ctl, + .control_id = SND_US16X08_ID_EQHIGHFREQ, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "EQ High Frequence", + .freeer = NULL + }, +}; + +/* table of compressor controls */ +static struct snd_us16x08_control_params comp_controls[] = { + { /* Comp enable */ + .kcontrol_new = &snd_us16x08_compswitch_ctl, + .control_id = SND_US16X08_ID_COMP_SWITCH, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "Compressor Switch", + .freeer = snd_usb_mixer_elem_free + }, + { /* Comp threshold */ + .kcontrol_new = &snd_us16x08_comp_threshold_ctl, + .control_id = SND_US16X08_ID_COMP_THRESHOLD, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Compressor Threshold Volume", + .freeer = NULL + }, + { /* Comp ratio */ + .kcontrol_new = &snd_us16x08_comp_ratio_ctl, + .control_id = SND_US16X08_ID_COMP_RATIO, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Compressor Ratio", + .freeer = NULL + }, + { /* Comp attack */ + .kcontrol_new = &snd_us16x08_comp_attack_ctl, + .control_id = SND_US16X08_ID_COMP_ATTACK, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Compressor Attack", + .freeer = NULL + }, + { /* Comp release */ + .kcontrol_new = &snd_us16x08_comp_release_ctl, + .control_id = SND_US16X08_ID_COMP_RELEASE, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Compressor Release", + .freeer = NULL + }, + { /* Comp gain */ + .kcontrol_new = &snd_us16x08_comp_gain_ctl, + .control_id = SND_US16X08_ID_COMP_GAIN, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Compressor Volume", + .freeer = NULL + }, +}; + +/* table of channel controls */ +static struct snd_us16x08_control_params channel_controls[] = { + { /* Phase */ + .kcontrol_new = &snd_us16x08_ch_boolean_ctl, + .control_id = SND_US16X08_ID_PHASE, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "Phase Switch", + .freeer = snd_usb_mixer_elem_free, + .default_val = 0 + }, + { /* Fader */ + .kcontrol_new = &snd_us16x08_ch_int_ctl, + .control_id = SND_US16X08_ID_FADER, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Line Volume", + .freeer = NULL, + .default_val = 127 + }, + { /* Mute */ + .kcontrol_new = &snd_us16x08_ch_boolean_ctl, + .control_id = SND_US16X08_ID_MUTE, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "Mute Switch", + .freeer = NULL, + .default_val = 0 + }, + { /* Pan */ + .kcontrol_new = &snd_us16x08_ch_int_ctl, + .control_id = SND_US16X08_ID_PAN, + .type = USB_MIXER_U16, + .num_channels = 16, + .name = "Pan Left-Right Volume", + .freeer = NULL, + .default_val = 127 + }, +}; + +/* table of master controls */ +static struct snd_us16x08_control_params master_controls[] = { + { /* Master */ + .kcontrol_new = &snd_us16x08_master_ctl, + .control_id = SND_US16X08_ID_FADER, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Master Volume", + .freeer = NULL, + .default_val = 127 + }, + { /* Bypass */ + .kcontrol_new = &snd_us16x08_bus_ctl, + .control_id = SND_US16X08_ID_BYPASS, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "DSP Bypass Switch", + .freeer = NULL, + .default_val = 0 + }, + { /* Buss out */ + .kcontrol_new = &snd_us16x08_bus_ctl, + .control_id = SND_US16X08_ID_BUSS_OUT, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "Buss Out Switch", + .freeer = NULL, + .default_val = 0 + }, + { /* Master mute */ + .kcontrol_new = &snd_us16x08_bus_ctl, + .control_id = SND_US16X08_ID_MUTE, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "Master Mute Switch", + .freeer = NULL, + .default_val = 0 + }, + +}; + +int snd_us16x08_controls_create(struct usb_mixer_interface *mixer) +{ + int i, j; + int err; + struct usb_mixer_elem_info *elem; + struct snd_us16x08_comp_store *comp_store; + struct snd_us16x08_meter_store *meter_store; + struct snd_us16x08_eq_store *eq_store; + + /* just check for non-MIDI interface */ + if (mixer->hostif->desc.bInterfaceNumber == 3) { + + /* create compressor mixer elements */ + comp_store = snd_us16x08_create_comp_store(); + if (comp_store == NULL) + return -ENOMEM; + + /* create eq store */ + eq_store = snd_us16x08_create_eq_store(); + if (eq_store == NULL) { + kfree(comp_store); + return -ENOMEM; + } + + /* create meters store */ + meter_store = snd_us16x08_create_meter_store(); + if (meter_store == NULL) { + kfree(comp_store); + kfree(eq_store); + return -ENOMEM; + } + + /* add routing control */ + err = add_new_ctl(mixer, &snd_us16x08_route_ctl, + SND_US16X08_ID_ROUTE, USB_MIXER_U8, 8, "Line Out Route", + NULL, NULL, &elem); + if (err < 0) { + usb_audio_dbg(mixer->chip, + "Failed to create route control, err:%d\n", + err); + return err; + } + for (i = 0; i < 8; i++) + elem->cache_val[i] = i < 2 ? i : i + 2; + elem->cached = 0xff; + + /* add master controls */ + for (i = 0; + i < sizeof(master_controls) + / sizeof(control_params); + i++) { + + err = add_new_ctl(mixer, + master_controls[i].kcontrol_new, + master_controls[i].control_id, + master_controls[i].type, + master_controls[i].num_channels, + master_controls[i].name, + comp_store, + master_controls[i].freeer, &elem); + if (err < 0) + return err; + elem->cache_val[0] = master_controls[i].default_val; + elem->cached = 1; + } + + /* add channel controls */ + for (i = 0; + i < sizeof(channel_controls) + / sizeof(control_params); + i++) { + + err = add_new_ctl(mixer, + channel_controls[i].kcontrol_new, + channel_controls[i].control_id, + channel_controls[i].type, + channel_controls[i].num_channels, + channel_controls[i].name, + comp_store, + channel_controls[i].freeer, &elem); + if (err < 0) + return err; + for (j = 0; j < SND_US16X08_MAX_CHANNELS; j++) { + elem->cache_val[j] = + channel_controls[i].default_val; + } + elem->cached = 0xffff; + } + + /* add EQ controls */ + for (i = 0; i < sizeof(eq_controls) / + sizeof(control_params); i++) { + + err = add_new_ctl(mixer, + eq_controls[i].kcontrol_new, + eq_controls[i].control_id, + eq_controls[i].type, + eq_controls[i].num_channels, + eq_controls[i].name, + eq_store, + eq_controls[i].freeer, NULL); + if (err < 0) + return err; + } + + /* add compressor controls */ + for (i = 0; + i < sizeof(comp_controls) + / sizeof(control_params); + i++) { + + err = add_new_ctl(mixer, + comp_controls[i].kcontrol_new, + comp_controls[i].control_id, + comp_controls[i].type, + comp_controls[i].num_channels, + comp_controls[i].name, + comp_store, + comp_controls[i].freeer, NULL); + if (err < 0) + return err; + } + + /* meter function 'get' must access to compressor store + * so place a reference here + */ + meter_store->comp_store = comp_store; + err = add_new_ctl(mixer, &snd_us16x08_meter_ctl, + SND_US16X08_ID_METER, USB_MIXER_U16, 0, "Level Meter", + (void *) meter_store, snd_usb_mixer_elem_free, NULL); + if (err < 0) + return err; + } + + return 0; +} + diff --git a/sound/usb/mixer_us16x08.h b/sound/usb/mixer_us16x08.h new file mode 100644 index 0000000..64f89b5 --- /dev/null +++ b/sound/usb/mixer_us16x08.h @@ -0,0 +1,122 @@ +#ifndef __USB_MIXER_US16X08_H +#define __USB_MIXER_US16X08_H + +#define SND_US16X08_MAX_CHANNELS 16 + +/* define some bias, cause some alsa-mixers wont work with + * negative ranges or if mixer-min != 0 + */ +#define SND_US16X08_NO_BIAS 0 +#define SND_US16X08_FADER_BIAS 127 +#define SND_US16X08_EQ_HIGHFREQ_BIAS 0x20 +#define SND_US16X08_COMP_THRESHOLD_BIAS 0x20 +#define SND_US16X08_COMP_ATTACK_BIAS 2 +#define SND_US16X08_COMP_RELEASE_BIAS 1 + +/* get macro for components of kcontrol private_value */ +#define SND_US16X08_KCBIAS(x) (((x)->private_value >> 24) & 0xff) +#define SND_US16X08_KCSTEP(x) (((x)->private_value >> 16) & 0xff) +#define SND_US16X08_KCMIN(x) (((x)->private_value >> 8) & 0xff) +#define SND_US16X08_KCMAX(x) (((x)->private_value >> 0) & 0xff) +/* set macro for kcontrol private_value */ +#define SND_US16X08_KCSET(bias, step, min, max) \ + (((bias) << 24) | ((step) << 16) | ((min) << 8) | (max)) + +/* the URB request/type to control Tascam mixers */ +#define SND_US16X08_URB_REQUEST 0x1D +#define SND_US16X08_URB_REQUESTTYPE 0x40 + +/* the URB params to retrieve meter ranges */ +#define SND_US16X08_URB_METER_REQUEST 0x1e +#define SND_US16X08_URB_METER_REQUESTTYPE 0xc0 + +#define MUA0(x, y) ((x)[(y) * 10 + 4]) +#define MUA1(x, y) ((x)[(y) * 10 + 5]) +#define MUA2(x, y) ((x)[(y) * 10 + 6]) +#define MUB0(x, y) ((x)[(y) * 10 + 7]) +#define MUB1(x, y) ((x)[(y) * 10 + 8]) +#define MUB2(x, y) ((x)[(y) * 10 + 9]) +#define MUC0(x, y) ((x)[(y) * 10 + 10]) +#define MUC1(x, y) ((x)[(y) * 10 + 11]) +#define MUC2(x, y) ((x)[(y) * 10 + 12]) +#define MUC3(x, y) ((x)[(y) * 10 + 13]) + +/* Common Channel control IDs */ +#define SND_US16X08_ID_BYPASS 0x45 +#define SND_US16X08_ID_BUSS_OUT 0x44 +#define SND_US16X08_ID_PHASE 0x85 +#define SND_US16X08_ID_MUTE 0x83 +#define SND_US16X08_ID_FADER 0x81 +#define SND_US16X08_ID_PAN 0x82 +#define SND_US16X08_ID_METER 0xB1 + +#define SND_US16X08_ID_EQ_BAND_COUNT 4 +#define SND_US16X08_ID_EQ_PARAM_COUNT 4 + +/* EQ level IDs */ +#define SND_US16X08_ID_EQLOWLEVEL 0x01 +#define SND_US16X08_ID_EQLOWMIDLEVEL 0x02 +#define SND_US16X08_ID_EQHIGHMIDLEVEL 0x03 +#define SND_US16X08_ID_EQHIGHLEVEL 0x04 + +/* EQ frequence IDs */ +#define SND_US16X08_ID_EQLOWFREQ 0x11 +#define SND_US16X08_ID_EQLOWMIDFREQ 0x12 +#define SND_US16X08_ID_EQHIGHMIDFREQ 0x13 +#define SND_US16X08_ID_EQHIGHFREQ 0x14 + +/* EQ width IDs */ +#define SND_US16X08_ID_EQLOWMIDWIDTH 0x22 +#define SND_US16X08_ID_EQHIGHMIDWIDTH 0x23 + +#define SND_US16X08_ID_EQENABLE 0x30 + +#define EQ_STORE_BAND_IDX(x) ((x) & 0xf) +#define EQ_STORE_PARAM_IDX(x) (((x) & 0xf0) >> 4) + +#define SND_US16X08_ID_ROUTE 0x00 + +/* Compressor Ids */ +#define SND_US16X08_ID_COMP_BASE 0x32 +#define SND_US16X08_ID_COMP_THRESHOLD SND_US16X08_ID_COMP_BASE +#define SND_US16X08_ID_COMP_RATIO (SND_US16X08_ID_COMP_BASE + 1) +#define SND_US16X08_ID_COMP_ATTACK (SND_US16X08_ID_COMP_BASE + 2) +#define SND_US16X08_ID_COMP_RELEASE (SND_US16X08_ID_COMP_BASE + 3) +#define SND_US16X08_ID_COMP_GAIN (SND_US16X08_ID_COMP_BASE + 4) +#define SND_US16X08_ID_COMP_SWITCH (SND_US16X08_ID_COMP_BASE + 5) +#define SND_US16X08_ID_COMP_COUNT 6 + +#define COMP_STORE_IDX(x) ((x) - SND_US16X08_ID_COMP_BASE) + +struct snd_us16x08_eq_store { + u8 val[SND_US16X08_ID_EQ_BAND_COUNT][SND_US16X08_ID_EQ_PARAM_COUNT] + [SND_US16X08_MAX_CHANNELS]; +}; + +struct snd_us16x08_comp_store { + u8 val[SND_US16X08_ID_COMP_COUNT][SND_US16X08_MAX_CHANNELS]; +}; + +struct snd_us16x08_meter_store { + int meter_level[SND_US16X08_MAX_CHANNELS]; + int master_level[2]; /* level of meter for master output */ + int comp_index; /* round trip channel selector */ + int comp_active_index; /* channel select from user space mixer */ + int comp_level[16]; /* compressor reduction level */ + struct snd_us16x08_comp_store *comp_store; +}; + +struct snd_us16x08_control_params { + struct snd_kcontrol_new *kcontrol_new; + int control_id; + int type; + int num_channels; + const char *name; + void (*freeer)(struct snd_kcontrol *kctl); + int default_val; +}; + +#define snd_us16x08_switch_info snd_ctl_boolean_mono_info + +int snd_us16x08_controls_create(struct usb_mixer_interface *mixer); +#endif /* __USB_MIXER_US16X08_H */ -- 2.7.4

5 4

[alsa-devel] [PATCH] ALSA: hda/realtek - Cannot adjust speaker's volume on a Dell AIO
by Kai-Heng Feng 16 Feb '17

16 Feb '17

The issue is the same as "dd9aa335c880 ALSA: hda/realtek - Can't adjust speaker's volume on a Dell AIO", the output requires to connect to a node with Amp-out capability. Applying the same fixup "ALC298_FIXUP_SPK_VOLUME" can fix the issue. Signed-off-by: Kai-Heng Feng <kai.heng.feng(a)canonical.com> --- sound/pci/hda/patch_realtek.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index 7d660ee1d5e8..2bae6fc26c73 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -6065,6 +6065,12 @@ static const struct snd_hda_pin_quirk alc269_pin_fixup_tbl[] = { SND_HDA_PIN_QUIRK(0x10ec0298, 0x1028, "Dell", ALC298_FIXUP_DELL1_MIC_NO_PRESENCE, ALC298_STANDARD_PINS, {0x17, 0x90170150}), + SND_HDA_PIN_QUIRK(0x10ec0298, 0x1028, "Dell", ALC298_FIXUP_SPK_VOLUME, + {0x12, 0xb7a60140}, + {0x13, 0xb7a60150}, + {0x17, 0x90170110}, + {0x1a, 0x03011020}, + {0x21, 0x03211030}), {} }; -- 2.11.1

2 1

[alsa-devel] [PATCH 1/2] ALSA: hda - fix Lewisburg audio issue
by Jaroslav Kysela 15 Feb '17

15 Feb '17

Like for Sunrise Point, the total stream number of Lewisburg's input and output stream exceeds 15 (GCAP is 0x9701), which will cause some streams do not work because of the overflow on SDxCTL.STRM field if using the legacy stream tag allocation method. Signed-off-by: Jaroslav Kysela <perex(a)perex.cz> --- sound/pci/hda/hda_intel.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index faf99cc..7d77bb5 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c @@ -2214,9 +2214,9 @@ static const struct pci_device_id azx_ids[] = { .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH }, /* Lewisburg */ { PCI_DEVICE(0x8086, 0xa1f0), - .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH }, + .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_SKYLAKE }, { PCI_DEVICE(0x8086, 0xa270), - .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH }, + .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_SKYLAKE }, /* Lynx Point-LP */ { PCI_DEVICE(0x8086, 0x9c20), .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH }, -- 2.9.3

2 3

[alsa-devel] Kernel crash at snd_ctl_find_numid+0x38/0x6c in kernel 4.4
by Rohit Kumar 15 Feb '17

15 Feb '17

Hi, I am getting NULL pointer dereference occasionally at snd_ctl_find_numid+0x38/0x6c in 4.4 kernel while accessing snd_kcontrol. The issue is reproduced ocassionally. Can anybody provide any pointer in fixing the issue. Below is the stack trace : 2662.430298: <2> PC is at snd_ctl_find_numid+0x38/0x6c 2662.437819: <2> LR is at snd_ctl_find_id+0x38/0xd8 2662.662838: <2> [<ffffff8008c4e35c>] snd_ctl_find_numid+0x38/0x6c 2662.667513: <2> [<ffffff8008c4e900>] snd_ctl_find_id+0x38/0xd8 2662.673415: <2> [<ffffff8008c4f488>] snd_ctl_elem_info+0x40/0x11c 2662.678799: <2> [<ffffff8008c4df5c>] snd_ctl_ioctl_compat+0x3f4/0x740 2662.684644: <2> [<ffffff800823477c>] compat_SyS_ioctl+0x124/0xd88 There is no specific usecase when the issue is observed. Sometimes issue occurs during bootup and sometimes during audio usecase. Any suggestion will be helpful. Thanks, Rohit

2 1

[alsa-devel] [PATCH 0/4] A few more extensions to LPE audio driver
by Takashi Iwai 14 Feb '17

14 Feb '17

Hi, Linus decided to take another week for 4.11 merge window, so I could play a bit more, and here is the result :) The first patch is the fix for possible GPU hang, and this has been for a while in my local branch and tested. This should be OK to merge soon. (It's also as same as what Ian tested in the last weekend.) The next one is merely a cleanup patch, so it's fine, too. The third one is a transition to use the runtime PM autosuspend, and it's a preliminary for the last change. The last one is the new and experimental one: it enables the keep-link feature. With this patch, the device is managed as default via autosuspend, and the link is opened (but silenced) for the pre-given time (2 seconds) after the PCM close. If the application restarts the stream quickly, the receiver is still warm and can resume gracefully. All these patches are found in topic/intel-lpe-audio branch. (BTW, I cleaned up my branches: now for-next branch tracks the latest stable patches to be merged, while topic/intel-lpe-audio branch tracks the experimental patches. Beware that the latter may be rebased frequently.) Takashi === Takashi Iwai (4): ALSA: x86: Handle reset at prepare callback ALSA: x86: Drop unused stream.running field ALSA: x86: Use runtime PM autosuspend ALSA: x86: Enable keep-link feature sound/x86/intel_hdmi_audio.c | 110 ++++++++++++++++++++++++++++++++----------- sound/x86/intel_hdmi_audio.h | 2 +- 2 files changed, 84 insertions(+), 28 deletions(-) -- 2.11.1

3 10

[alsa-devel] [bug report] ASoC: hdac_hdmi: Begin to add support for DP Multi-stream audio
by Dan Carpenter 14 Feb '17

14 Feb '17

Hello Jeeja KP, The patch 754695f9960b: "ASoC: hdac_hdmi: Begin to add support for DP Multi-stream audio" from Feb 6, 2017, leads to the following static checker warning: sound/soc/codecs/hdac_hdmi.c:742 hdac_hdmi_set_pin_port_mux() error: we previously assumed 'pcm->port' could be null (see line 741) sound/soc/codecs/hdac_hdmi.c 719 static int hdac_hdmi_set_pin_port_mux(struct snd_kcontrol *kcontrol, 720 struct snd_ctl_elem_value *ucontrol) 721 { 722 int ret; 723 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; 724 struct snd_soc_dapm_widget *w = snd_soc_dapm_kcontrol_widget(kcontrol); 725 struct snd_soc_dapm_context *dapm = w->dapm; 726 struct hdac_hdmi_port *port = w->priv; 727 struct hdac_ext_device *edev = to_hda_ext_device(dapm->dev); 728 struct hdac_hdmi_priv *hdmi = edev->private_data; 729 struct hdac_hdmi_pcm *pcm = NULL; 730 const char *cvt_name = e->texts[ucontrol->value.enumerated.item[0]]; 731 732 ret = snd_soc_dapm_put_enum_double(kcontrol, ucontrol); 733 if (ret < 0) 734 return ret; 735 736 if (port == NULL) 737 return -EINVAL; 738 739 mutex_lock(&hdmi->pin_mutex); 740 list_for_each_entry(pcm, &hdmi->pcm_list, head) { 741 if (!pcm->port && pcm->port == port && ^^^^^^^^^ test 742 pcm->port->id == port->id) ^^^^^^^^^^^^^ dereference 743 pcm->port = NULL; ^^^^^^^^^^^^^^^^ Perhaps the NULL test is reversed? 744 745 /* 746 * Jack status is not reported during device probe as the 747 * PCMs are not registered by then. So report it here. 748 */ regards, dan carpenter

2 1

[alsa-devel] [PATCH v1 1/3] ASoC: zx-tdm: add documentation for zte's tdm controller
by Baoyou Xie 14 Feb '17

14 Feb '17

This patch adds dt-binding documentation for zte's tdm controller. Signed-off-by: Baoyou Xie <baoyou.xie(a)linaro.org> --- .../devicetree/bindings/sound/zte,tdm.txt | 32 ++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/zte,tdm.txt diff --git a/Documentation/devicetree/bindings/sound/zte,tdm.txt b/Documentation/devicetree/bindings/sound/zte,tdm.txt new file mode 100644 index 0000000..f6e4f7f --- /dev/null +++ b/Documentation/devicetree/bindings/sound/zte,tdm.txt @@ -0,0 +1,32 @@ +ZTE TDM DAI driver + +Required properties: + +- compatible : should be one of the following. + * zte,zx-tdm +- reg : physical base address of the controller and length of memory mapped + region. +- clocks : Pairs of phandle and specifier referencing the controller's clocks. +- clock-names: "tdm_wclk" for the wclk. + "tdm_pclk" for the pclk. +-#clock-cells: should be 1. +- zte,tdm-dma-sysctrl : Reference to the sysctrl controller controlling + the dma. includes: + phandle of sysctrl. + register offset in sysctrl for control dma. + mask of the register that be written to dma. + value of the register that be written to dma. + +Example: + + tdm: tdm@1487000 { + compatible = "zte,zx-tdm"; + reg = <0x01487000 0x1000>; + clocks = <&audiocrm AUDIO_TDM_WCLK>, <&audiocrm AUDIO_TDM_PCLK>; + clock-names = "tdm_wclk", "tdm_pclk"; + #clock-cells = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&tdm_global_pin>; + zte,tdm-dma-sysctrl = <&sysctrl 0x10c 0xf 0xf>; + status = "ok"; + }; -- 2.7.4

2 4

[alsa-devel] [PATCH] ALSA: hda/patch_sigmatel: Add AmigaOne X1000 pin configs
by Darren Stevens 14 Feb '17

14 Feb '17

The AmigaOne X1000 has a Sigmatel STAC92HD700 attached to the HD Audio on an ATI SB600. Add the required settings to enable sound. Signed-off-by: Darren Stevens <darren(a)stevens-zone.net> ---

2 3

[alsa-devel] [PATCH] ASoC: fsl_sai: support more than 2 channels
by Alexandre Belloni 13 Feb '17

13 Feb '17

The FSL SAI can support up to 32 channels using TDM. Report that value so they can actually be used. Tested using 8 channels. Signed-off-by: Alexandre Belloni <alexandre.belloni(a)free-electrons.com> --- sound/soc/fsl/fsl_sai.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c index 9fadf7e31c5f..18e5ce81527d 100644 --- a/sound/soc/fsl/fsl_sai.c +++ b/sound/soc/fsl/fsl_sai.c @@ -668,7 +668,7 @@ static struct snd_soc_dai_driver fsl_sai_dai = { .playback = { .stream_name = "CPU-Playback", .channels_min = 1, - .channels_max = 2, + .channels_max = 32, .rate_min = 8000, .rate_max = 192000, .rates = SNDRV_PCM_RATE_KNOT, @@ -677,7 +677,7 @@ static struct snd_soc_dai_driver fsl_sai_dai = { .capture = { .stream_name = "CPU-Capture", .channels_min = 1, - .channels_max = 2, + .channels_max = 32, .rate_min = 8000, .rate_max = 192000, .rates = SNDRV_PCM_RATE_KNOT, -- 2.11.0

3 2

[alsa-devel] [PATCH v4 0/8] Add sun8i A33 audio driver
by Mylène Josserand 13 Feb '17

13 Feb '17

Hello everyone, This a V4 of my Allwinner A33 (sun8i) audio codec driver. Tested on "for-next" branch of ASoC repository with some patches to apply before this series: https://patchwork.kernel.org/patch/9447631/ https://patchwork.kernel.org/patch/9423999/ and one of my previous patch (from V2): https://patchwork.kernel.org/patch/9521121/ Changes since V3: - Rebased my patches under Mark Brown's repo on "for-next" branch. - Removed the .owner from sun8i-codec driver, reported by KBuild robot - Updated patch 05/08 according to Rob Herring's review. Changes since V2: - Removed patches from v2 already merged: commit ebad64d193779 ("ASoC: sun4i-i2s: Increase DMA max burst to 8") commit 603a0c8af9cb2 ("clk: sunxi-ng: a33: Add CLK_SET_RATE_PARENT to ac-dig") - Removed "reset-names" from sun4i-i2s driver - Fixed the build warning from sun8i-codec - Fixed some various topics such as subject line for dt bindings patch, renamed the simple-card and disabled the simple-card. Changes since V1: - Remove the analog codec driver as a better version has been committed by Chen-Yu Tsai and is already merged. - Remove the audio-card as simple-card can be used - The DMA maxburst is set to 8 in the sun4i-i2s instead of adding the maxburst of 4 in Sun6i dma engine. - Create a new compatible for sun4i-i2s to handle the reset line. - Fix various problems in sun8i-codec driver according to V1's reviews - Add the pm_runtime hooks in sun8i-codec driver to prepare/ unprepare clocks. - Update the DTS according to Chen-Yu's analog codec driver. - Rename sun8i-codec's clocks to "bus" and "mod" - The first "delay" issue from V1 is fixed by using a delay when enabling the headphone amplifier to let the amplifier being up. Patches 1 and 2 add a new compatible "allwinner,sun6i-a31-i2s" to handle the reset line for sun4i-i2s driver. It uses a quirk to use a version with or without reset lines. Patch 3 adds the sun8i codec driver which represents the digital part of the A33 codec. It supports only playback features. Path 4 fixes the previous issue of a "first time delay" in V1 (see cover letter). Do not hesitate if you have comments on this patch. Patches 5 adds the dt-bindings documentation for new audio driver added in this serie (sun8i-codec). Patch 6 adds the cpu DAI, codec and audio nodes to sun8i-a33 device tree. Patches 7 and 8 enable the audio on Parrot and Sinlinx's boards. The DAI for this A33 codec is the same than for A20: "sun4i-i2s". Currently, the sun8i-a33 codec driver handles only the playback feature. The other ones (such as capture) and all other interfaces except headphone are not supported. I will send a patch to handle the capture with microphones in next few weeks. Examples of amixer commands: amixer set 'Headphone' 75% amixer set 'Headphone' on amixer set 'DAC' on amixer set 'Right DAC Mixer RSlot 0' on amixer set 'Left DAC Mixer LSlot 0' on It was tested on Parrot and Sinlinx boards. Let me know if you have any comments on this serie. Thank you in advance, Best regards, Mylène Josserand (8): ASoC: sun4i-i2s: Update binding documentation to include A31 ASoC: sun4i-i2s: Add quirks to handle a31 compatible ASoC: Add sun8i digital audio codec ASoC: sun8i-codec-analog: Add amplifier event to fix first delay ASoC: codecs: Add sun8i-a33 binding documentation ARM: dts: sun8i: Add audio codec, dai and card for A33 ARM: dts: sun8i: parrot: Enable audio nodes ARM: dts: sun8i: sinlinx: Enable audio nodes .../devicetree/bindings/sound/sun4i-i2s.txt | 5 + .../devicetree/bindings/sound/sun8i-a33-codec.txt | 63 +++ arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts | 12 + arch/arm/boot/dts/sun8i-a33.dtsi | 45 ++ arch/arm/boot/dts/sun8i-r16-parrot.dts | 12 + sound/soc/sunxi/Kconfig | 11 + sound/soc/sunxi/Makefile | 1 + sound/soc/sunxi/sun4i-i2s.c | 57 ++- sound/soc/sunxi/sun8i-codec-analog.c | 30 +- sound/soc/sunxi/sun8i-codec.c | 498 +++++++++++++++++++++ 10 files changed, 730 insertions(+), 4 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/sun8i-a33-codec.txt create mode 100644 sound/soc/sunxi/sun8i-codec.c -- 2.11.0

5 19

[alsa-devel] [PATCH v5 1/1] ALSA: Tascam US-16x08 DSP mixer quirk
by OnkelDead 13 Feb '17

13 Feb '17

Add mixer quirk for Tascam US-16x08 usb interface. Even that this an usb compliant device, the input channels and DSP functions (EQ/Compressor) arn't accessible by default. v5 fixes some wrong snd_kcontrol_new xx.put return codes Signed-off-by: Detlef Urban <onkel(a)paraair.de> --- sound/usb/Makefile | 1 + sound/usb/mixer_quirks.c | 5 + sound/usb/mixer_us16x08.c | 1425 +++++++++++++++++++++++++++++++++++++++++++++ sound/usb/mixer_us16x08.h | 122 ++++ 4 files changed, 1553 insertions(+) create mode 100644 sound/usb/mixer_us16x08.c create mode 100644 sound/usb/mixer_us16x08.h diff --git a/sound/usb/Makefile b/sound/usb/Makefile index 2d2d122..42cb33b 100644 --- a/sound/usb/Makefile +++ b/sound/usb/Makefile @@ -10,6 +10,7 @@ snd-usb-audio-objs := card.o \ mixer.o \ mixer_quirks.o \ mixer_scarlett.o \ + mixer_us16x08.o \ pcm.o \ proc.o \ quirks.o \ diff --git a/sound/usb/mixer_quirks.c b/sound/usb/mixer_quirks.c index 04991b0..4fa0053 100644 --- a/sound/usb/mixer_quirks.c +++ b/sound/usb/mixer_quirks.c @@ -43,6 +43,7 @@ #include "mixer.h" #include "mixer_quirks.h" #include "mixer_scarlett.h" +#include "mixer_us16x08.h" #include "helper.h" extern struct snd_kcontrol_new *snd_usb_feature_unit_ctl; @@ -1729,6 +1730,10 @@ int snd_usb_mixer_apply_create_quirk(struct usb_mixer_interface *mixer) return err; switch (mixer->chip->usb_id) { + /* Tascam US-16x08 */ + case USB_ID(0x0644, 0x8047): + err = snd_us16x08_controls_create(mixer); + break; case USB_ID(0x041e, 0x3020): case USB_ID(0x041e, 0x3040): case USB_ID(0x041e, 0x3042): diff --git a/sound/usb/mixer_us16x08.c b/sound/usb/mixer_us16x08.c new file mode 100644 index 0000000..700c2ad --- /dev/null +++ b/sound/usb/mixer_us16x08.c @@ -0,0 +1,1425 @@ +/* + * Tascam US-16x08 ALSA driver + * + * Copyright (c) 2016 by Detlef Urban (onkel(a)paraair.de) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <linux/slab.h> +#include <linux/usb.h> +#include <linux/usb/audio-v2.h> + +#include <sound/core.h> +#include <sound/control.h> + +#include "usbaudio.h" +#include "mixer.h" +#include "helper.h" + +#include "mixer_us16x08.h" + +/* USB control message templates */ +static char route_msg[] = { + 0x61, + 0x02, + 0x03, /* input from master (0x02) or input from computer bus (0x03) */ + 0x62, + 0x02, + 0x01, /* input index (0x01/0x02 eq. left/right) or bus (0x01-0x08) */ + 0x41, + 0x01, + 0x61, + 0x02, + 0x01, + 0x62, + 0x02, + 0x01, /* output index (0x01-0x08) */ + 0x42, + 0x01, + 0x43, + 0x01, + 0x00, + 0x00 +}; + +static char mix_init_msg1[] = { + 0x71, 0x01, 0x00, 0x00 +}; + +static char mix_init_msg2[] = { + 0x62, 0x02, 0x00, 0x61, 0x02, 0x04, 0xb1, 0x01, 0x00, 0x00 +}; + +static char mix_msg_in[] = { + /* default message head, equal to all mixers */ + 0x61, 0x02, 0x04, 0x62, 0x02, 0x01, + 0x81, /* 0x06: Controller ID */ + 0x02, /* 0x07: */ + 0x00, /* 0x08: Value of common mixer */ + 0x00, + 0x00 +}; + +static char mix_msg_out[] = { + /* default message head, equal to all mixers */ + 0x61, 0x02, 0x02, 0x62, 0x02, 0x01, + 0x81, /* 0x06: Controller ID */ + 0x02, /* 0x07: */ + 0x00, /* 0x08: Value of common mixer */ + 0x00, + 0x00 +}; + +static char bypass_msg_out[] = { + 0x45, + 0x02, + 0x01, /* on/off flag */ + 0x00, + 0x00 +}; + +static char bus_msg_out[] = { + 0x44, + 0x02, + 0x01, /* on/off flag */ + 0x00, + 0x00 +}; + +static char comp_msg[] = { + /* default message head, equal to all mixers */ + 0x61, 0x02, 0x04, 0x62, 0x02, 0x01, + 0x91, + 0x02, + 0xf0, /* 0x08: Threshold db (8) (e0 ... 00) (+-0dB -- -32dB) x-32 */ + 0x92, + 0x02, + 0x0a, /* 0x0b: Ratio (0a,0b,0d,0f,11,14,19,1e,23,28,32,3c,50,a0,ff) */ + 0x93, + 0x02, + 0x02, /* 0x0e: Attack (0x02 ... 0xc0) (2ms ... 200ms) */ + 0x94, + 0x02, + 0x01, /* 0x11: Release (0x01 ... 0x64) (10ms ... 1000ms) x*10 */ + 0x95, + 0x02, + 0x03, /* 0x14: gain (0 ... 20) (0dB .. 20dB) */ + 0x96, + 0x02, + 0x01, + 0x97, + 0x02, + 0x01, /* 0x1a: main Comp switch (0 ... 1) (off ... on)) */ + 0x00, + 0x00 +}; + +static char eqs_msq[] = { + /* default message head, equal to all mixers */ + 0x61, 0x02, 0x04, 0x62, 0x02, 0x01, + 0x51, /* 0x06: Controller ID */ + 0x02, + 0x04, /* 0x08: EQ set num (0x01..0x04) (LOW, LOWMID, HIGHMID, HIGH)) */ + 0x52, + 0x02, + 0x0c, /* 0x0b: value dB (0 ... 12) (-12db .. +12db) x-6 */ + 0x53, + 0x02, + 0x0f, /* 0x0e: value freq (32-47) (1.7kHz..18kHz) */ + 0x54, + 0x02, + 0x02, /* 0x11: band width (0-6) (Q16-Q0.25) 2^x/4 (EQ xxMID only) */ + 0x55, + 0x02, + 0x01, /* 0x14: main EQ switch (0 ... 1) (off ... on)) */ + 0x00, + 0x00 +}; + +/* compressor ratio map */ +static char ratio_map[] = { + 0x0a, 0x0b, 0x0d, 0x0f, 0x11, 0x14, 0x19, 0x1e, + 0x23, 0x28, 0x32, 0x3c, 0x50, 0xa0, 0xff +}; + +static int snd_us16x08_recv_urb(struct snd_usb_audio *chip, + unsigned char *buf, int size) +{ + + mutex_lock(&chip->mutex); + snd_usb_ctl_msg(chip->dev, + usb_rcvctrlpipe(chip->dev, 0), + SND_US16X08_URB_METER_REQUEST, + SND_US16X08_URB_METER_REQUESTTYPE, 0, 0, buf, size); + mutex_unlock(&chip->mutex); + return 0; +} + +/* wrapper function to send prepared URB buffer to usb device. Return an error + * code if something went wrong + */ +static int snd_us16x08_send_urb(struct snd_usb_audio *chip, char *buf, int size) +{ + int err = 0; + + if (chip) { + err = snd_usb_ctl_msg(chip->dev, usb_sndctrlpipe(chip->dev, 0), + SND_US16X08_URB_REQUEST, SND_US16X08_URB_REQUESTTYPE, + 0, 0, buf, size); + } + + return err; +} + +static int snd_us16x08_route_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->count = 1; + uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; + uinfo->value.integer.max = SND_US16X08_KCMAX(kcontrol); + uinfo->value.integer.min = SND_US16X08_KCMIN(kcontrol); + uinfo->value.integer.step = SND_US16X08_KCSTEP(kcontrol); + return 0; +} + +static int snd_us16x08_route_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + int index = ucontrol->id.index; + + /* route has no bias */ + ucontrol->value.integer.value[0] = elem->cache_val[index]; + + return 0; +} + +static int snd_us16x08_route_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + + int index = ucontrol->id.index; + char buf[sizeof(route_msg)]; + int val, val_org, err = 0; + + /* prepare the message buffer from template */ + memcpy(buf, route_msg, sizeof(route_msg)); + + /* get the new value (no bias for routes) */ + val = ucontrol->value.integer.value[0]; + if (val < 2) { + /* input comes from a master channel */ + val_org = val; + buf[2] = 0x02; + } else { + /* input comes from a computer channel */ + buf[2] = 0x03; + val_org = val - 2; + } + + /* place new route selection in URB message */ + buf[5] = (unsigned char) (val_org & 0x0f) + 1; + /* place route selector in URB message */ + buf[13] = index + 1; + + err = snd_us16x08_send_urb(chip, buf, sizeof(route_msg)); + + if (err > 0) { + elem->cached |= 1 << index; + elem->cache_val[index] = val; + } else { + usb_audio_err(chip, "Failed to set routing, err:%d\n", err); + } + + return err > 0 ? 1 : 0; +} + +static int snd_us16x08_master_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->count = 1; + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->value.integer.max = SND_US16X08_KCMAX(kcontrol); + uinfo->value.integer.min = SND_US16X08_KCMIN(kcontrol); + uinfo->value.integer.step = SND_US16X08_KCSTEP(kcontrol); + return 0; +} + +static int snd_us16x08_master_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + + int index = ucontrol->id.index; + + ucontrol->value.integer.value[0] = elem->cache_val[index]; + + return 0; +} + +static int snd_us16x08_master_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + char buf[sizeof(mix_msg_out)]; + int val, err = 0; + int index = ucontrol->id.index; + + /* prepare the message buffer from template */ + memcpy(buf, mix_msg_out, sizeof(mix_msg_out)); + + /* new control value incl. bias*/ + val = ucontrol->value.integer.value[0]; + + buf[8] = val - SND_US16X08_KCBIAS(kcontrol); + buf[6] = elem->head.id; + + /* place channel selector in URB message */ + buf[5] = index + 1; + err = snd_us16x08_send_urb(chip, buf, sizeof(mix_msg_out)); + + if (err > 0) { + elem->cached |= 1 << index; + elem->cache_val[index] = val; + } else { + usb_audio_err(chip, "Failed to set master, err:%d\n", err); + } + + return err > 0 ? 1 : 0; +} + +static int snd_us16x08_bus_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + + char buf[sizeof(mix_msg_out)]; + int val, err = 0; + + val = ucontrol->value.integer.value[0]; + + /* prepare the message buffer from template */ + switch (elem->head.id) { + case SND_US16X08_ID_BYPASS: + memcpy(buf, bypass_msg_out, sizeof(bypass_msg_out)); + buf[2] = val; + err = snd_us16x08_send_urb(chip, buf, sizeof(bypass_msg_out)); + break; + case SND_US16X08_ID_BUSS_OUT: + memcpy(buf, bus_msg_out, sizeof(bus_msg_out)); + buf[2] = val; + err = snd_us16x08_send_urb(chip, buf, sizeof(bus_msg_out)); + break; + case SND_US16X08_ID_MUTE: + memcpy(buf, mix_msg_out, sizeof(mix_msg_out)); + buf[8] = val; + buf[6] = elem->head.id; + buf[5] = 1; + err = snd_us16x08_send_urb(chip, buf, sizeof(mix_msg_out)); + break; + } + + if (err > 0) { + elem->cached |= 1; + elem->cache_val[0] = val; + } else { + usb_audio_err(chip, "Failed to set buss param, err:%d\n", err); + } + + return err > 0 ? 1 : 0; +} + +static int snd_us16x08_bus_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + + switch (elem->head.id) { + case SND_US16X08_ID_BUSS_OUT: + ucontrol->value.integer.value[0] = elem->cache_val[0]; + break; + case SND_US16X08_ID_BYPASS: + ucontrol->value.integer.value[0] = elem->cache_val[0]; + break; + case SND_US16X08_ID_MUTE: + ucontrol->value.integer.value[0] = elem->cache_val[0]; + break; + } + + return 0; +} + +/* gets a current mixer value from common store */ +static int snd_us16x08_channel_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + int index = ucontrol->id.index; + + ucontrol->value.integer.value[0] = elem->cache_val[index]; + + return 0; +} + +static int snd_us16x08_channel_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + char buf[sizeof(mix_msg_in)]; + int val, err; + int index = ucontrol->id.index; + + /* prepare URB message from template */ + memcpy(buf, mix_msg_in, sizeof(mix_msg_in)); + + val = ucontrol->value.integer.value[0]; + + /* add the bias to the new value */ + buf[8] = val - SND_US16X08_KCBIAS(kcontrol); + buf[6] = elem->head.id; + buf[5] = index + 1; + + err = snd_us16x08_send_urb(chip, buf, sizeof(mix_msg_in)); + + if (err > 0) { + elem->cached |= 1 << index; + elem->cache_val[index] = val; + } else { + usb_audio_err(chip, "Failed to set channel, err:%d\n", err); + } + + return err > 0 ? 1 : 0; +} + +static int snd_us16x08_mix_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->count = 1; + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->value.integer.max = SND_US16X08_KCMAX(kcontrol); + uinfo->value.integer.min = SND_US16X08_KCMIN(kcontrol); + uinfo->value.integer.step = SND_US16X08_KCSTEP(kcontrol); + return 0; +} + +static int snd_us16x08_comp_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_us16x08_comp_store *store = + ((struct snd_us16x08_comp_store *) elem->private_data); + int index = ucontrol->id.index; + int val_idx = COMP_STORE_IDX(elem->head.id); + + ucontrol->value.integer.value[0] = store->val[val_idx][index]; + + return 0; +} + +static int snd_us16x08_comp_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_comp_store *store = + ((struct snd_us16x08_comp_store *) elem->private_data); + int index = ucontrol->id.index; + + char buf[sizeof(comp_msg)]; + int val_idx, val; + int err = 0; + + /* prepare compressor URB message from template */ + memcpy(buf, comp_msg, sizeof(comp_msg)); + + /* new control value incl. bias*/ + val_idx = elem->head.id - SND_US16X08_ID_COMP_BASE; + + val = ucontrol->value.integer.value[0]; + store->val[val_idx][index] = ucontrol->value.integer.value[0]; + + /* place comp values in message buffer watch bias! */ + buf[8] = store->val[ + COMP_STORE_IDX(SND_US16X08_ID_COMP_THRESHOLD)][index] + - SND_US16X08_COMP_THRESHOLD_BIAS; + buf[11] = ratio_map[store->val[ + COMP_STORE_IDX(SND_US16X08_ID_COMP_RATIO)][index]]; + buf[14] = store->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_ATTACK)][index] + + SND_US16X08_COMP_ATTACK_BIAS; + buf[17] = store->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_RELEASE)][index] + + SND_US16X08_COMP_RELEASE_BIAS; + buf[20] = store->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_GAIN)][index]; + buf[26] = store->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_SWITCH)][index]; + + /* place channel selector in message buffer */ + buf[5] = index + 1; + + err = snd_us16x08_send_urb(chip, buf, sizeof(comp_msg)); + + if (err > 0) { + elem->cached |= 1 << index; + elem->cache_val[index] = val; + } else { + usb_audio_err(chip, "Failed to set compressor, err:%d\n", err); + } + + return 1; +} + +static int snd_us16x08_eqswitch_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int val = 0; + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_us16x08_eq_store *store = + ((struct snd_us16x08_eq_store *) elem->private_data); + int index = ucontrol->id.index; + + /* get low switch from cache is enough, cause all bands are together */ + val = store->val[EQ_STORE_BAND_IDX(elem->head.id)] + [EQ_STORE_PARAM_IDX(elem->head.id)][index]; + ucontrol->value.integer.value[0] = val; + + return 0; +} + +static int snd_us16x08_eqswitch_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_eq_store *store = + ((struct snd_us16x08_eq_store *) elem->private_data); + int index = ucontrol->id.index; + + char buf[sizeof(eqs_msq)]; + int val, err = 0; + int b_idx; + + /* new control value incl. bias*/ + val = ucontrol->value.integer.value[0] + SND_US16X08_KCBIAS(kcontrol); + + /* prepare URB message from EQ template */ + memcpy(buf, eqs_msq, sizeof(eqs_msq)); + + /* place channel index in URB message */ + buf[5] = index + 1; + for (b_idx = 0; b_idx < SND_US16X08_ID_EQ_BAND_COUNT; b_idx++) { + /* all four EQ bands have to be enabled/disabled in once */ + buf[20] = val; + buf[17] = store->val[b_idx][2][index]; + buf[14] = store->val[b_idx][1][index]; + buf[11] = store->val[b_idx][0][index]; + buf[8] = b_idx + 1; + err = snd_us16x08_send_urb(chip, buf, sizeof(eqs_msq)); + if (err < 0) + break; + store->val[b_idx][3][index] = val; + msleep(15); + } + + if (err > 0) { + elem->cached |= 1 << index; + elem->cache_val[index] = val; + } else { + usb_audio_err(chip, "Failed to set eq switch, err:%d\n", err); + } + + return 1; +} + +static int snd_us16x08_eq_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int val = 0; + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_us16x08_eq_store *store = + ((struct snd_us16x08_eq_store *) elem->private_data); + int index = ucontrol->id.index; + int b_idx = EQ_STORE_BAND_IDX(elem->head.id) - 1; + int p_idx = EQ_STORE_PARAM_IDX(elem->head.id); + + val = store->val[b_idx][p_idx][index]; + + ucontrol->value.integer.value[0] = val; + + return 0; +} + +static int snd_us16x08_eq_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_eq_store *store = + ((struct snd_us16x08_eq_store *) elem->private_data); + int index = ucontrol->id.index; + + char buf[sizeof(eqs_msq)]; + int val, err = 0; + int b_idx = EQ_STORE_BAND_IDX(elem->head.id) - 1; + int p_idx = EQ_STORE_PARAM_IDX(elem->head.id); + + /* copy URB buffer from EQ template */ + memcpy(buf, eqs_msq, sizeof(eqs_msq)); + + val = ucontrol->value.integer.value[0]; + + store->val[b_idx][p_idx][index] = val; + buf[20] = store->val[b_idx][3][index]; + buf[17] = store->val[b_idx][2][index]; + buf[14] = store->val[b_idx][1][index]; + buf[11] = store->val[b_idx][0][index]; + + /* place channel index in URB buffer */ + buf[5] = index + 1; + + /* place EQ band in URB buffer */ + buf[8] = b_idx + 1; + + err = snd_us16x08_send_urb(chip, buf, sizeof(eqs_msq)); + + if (err > 0) { + /* store new value in EQ band cache */ + elem->cached |= 1 << index; + elem->cache_val[index] = val; + } else { + usb_audio_err(chip, "Failed to set eq param, err:%d\n", err); + } + + return 1; +} + +static int snd_us16x08_meter_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->count = 1; + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->value.integer.max = 0x7FFF; + uinfo->value.integer.min = 0; + + return 0; +} + +/* calculate compressor index for reduction level request */ +static int snd_get_meter_comp_index(struct snd_us16x08_meter_store *store) +{ + int ret; + + /* any channel active */ + if (store->comp_active_index) { + /* check for stereo link */ + if (store->comp_active_index & 0x20) { + /* reset comp_index to left channel*/ + if (store->comp_index - + store->comp_active_index > 1) + store->comp_index = + store->comp_active_index; + + ret = store->comp_index++ & 0x1F; + } else { + /* no stereo link */ + ret = store->comp_active_index; + } + } else { + /* skip channels with no compressor active */ + while (!store->comp_store->val[ + COMP_STORE_IDX(SND_US16X08_ID_COMP_SWITCH)] + [store->comp_index - 1] + && store->comp_index <= SND_US16X08_MAX_CHANNELS) { + store->comp_index++; + } + ret = store->comp_index++; + if (store->comp_index > SND_US16X08_MAX_CHANNELS) + store->comp_index = 1; + } + return ret; +} + +/* retrieve the meter level values from URB message */ +static void get_meter_levels_from_urb(int s, + struct snd_us16x08_meter_store *store, + u8 *meter_urb) +{ + int val = MUC2(meter_urb, s) + (MUC3(meter_urb, s) << 8); + + if (MUA0(meter_urb, s) == 0x61 && MUA1(meter_urb, s) == 0x02 && + MUA2(meter_urb, s) == 0x04 && MUB0(meter_urb, s) == 0x62) { + if (MUC0(meter_urb, s) == 0x72) + store->meter_level[MUB2(meter_urb, s) - 1] = val; + if (MUC0(meter_urb, s) == 0xb2) + store->comp_level[MUB2(meter_urb, s) - 1] = val; + } + if (MUA0(meter_urb, s) == 0x61 && MUA1(meter_urb, s) == 0x02 && + MUA2(meter_urb, s) == 0x02 && MUB0(meter_urb, s) == 0x62) + store->master_level[MUB2(meter_urb, s) - 1] = val; +} + +/* Function to retrieve current meter values from the device. + * + * The device needs to be polled for meter values with an initial + * requests. It will return with a sequence of different meter value + * packages. The first request (case 0:) initiate this meter response sequence. + * After the third response, an additional request can be placed, + * to retrieve compressor reduction level value for given channel. This round + * trip channel selector will skip all inactive compressors. + * A mixer can interrupt this round-trip by selecting one ore two (stereo-link) + * specific channels. + */ +static int snd_us16x08_meter_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int i, set; + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_meter_store *store = elem->private_data; + u8 meter_urb[64]; + + + if (elem) { + store = (struct snd_us16x08_meter_store *) elem->private_data; + chip = elem->head.mixer->chip; + } else + return 0; + + switch (kcontrol->private_value) { + case 0: + snd_us16x08_send_urb(chip, mix_init_msg1, 4); + snd_us16x08_recv_urb(chip, meter_urb, + sizeof(meter_urb)); + kcontrol->private_value++; + break; + case 1: + snd_us16x08_recv_urb(chip, meter_urb, + sizeof(meter_urb)); + kcontrol->private_value++; + break; + case 2: + snd_us16x08_recv_urb(chip, meter_urb, + sizeof(meter_urb)); + kcontrol->private_value++; + break; + case 3: + mix_init_msg2[2] = snd_get_meter_comp_index(store); + snd_us16x08_send_urb(chip, mix_init_msg2, 10); + snd_us16x08_recv_urb(chip, meter_urb, + sizeof(meter_urb)); + kcontrol->private_value = 0; + break; + } + + for (set = 0; set < 6; set++) + get_meter_levels_from_urb(set, store, meter_urb); + + for (i = 0; i < SND_US16X08_MAX_CHANNELS; i++) { + ucontrol->value.integer.value[i] = + store ? store->meter_level[i] : 0; + } + + ucontrol->value.integer.value[i++] = store ? store->master_level[0] : 0; + ucontrol->value.integer.value[i++] = store ? store->master_level[1] : 0; + + for (i = 2; i < SND_US16X08_MAX_CHANNELS + 2; i++) + ucontrol->value.integer.value[i + SND_US16X08_MAX_CHANNELS] = + store ? store->comp_level[i - 2] : 0; + + return 1; +} + +static int snd_us16x08_meter_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_us16x08_meter_store *store = elem->private_data; + int val; + + val = ucontrol->value.integer.value[0]; + store->comp_active_index = val; + store->comp_index = val; + + return 1; +} + +static struct snd_kcontrol_new snd_us16x08_ch_boolean_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_switch_info, + .get = snd_us16x08_channel_get, + .put = snd_us16x08_channel_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 1) +}; + +static struct snd_kcontrol_new snd_us16x08_ch_int_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_channel_get, + .put = snd_us16x08_channel_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_FADER_BIAS, 1, 0, 133) +}; + +static struct snd_kcontrol_new snd_us16x08_master_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 1, + .info = snd_us16x08_master_info, + .get = snd_us16x08_master_get, + .put = snd_us16x08_master_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_FADER_BIAS, 1, 0, 133) +}; + +static struct snd_kcontrol_new snd_us16x08_route_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 8, + .info = snd_us16x08_route_info, + .get = snd_us16x08_route_get, + .put = snd_us16x08_route_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 9) +}; + +static struct snd_kcontrol_new snd_us16x08_bus_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 1, + .info = snd_us16x08_switch_info, + .get = snd_us16x08_bus_get, + .put = snd_us16x08_bus_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 1) +}; + +static struct snd_kcontrol_new snd_us16x08_compswitch_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_switch_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 1) +}; + +static struct snd_kcontrol_new snd_us16x08_comp_threshold_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_COMP_THRESHOLD_BIAS, 1, + 0, 0x20) +}; + +static struct snd_kcontrol_new snd_us16x08_comp_ratio_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, + sizeof(ratio_map) - 1), /*max*/ +}; + +static struct snd_kcontrol_new snd_us16x08_comp_gain_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 0x14) +}; + +static struct snd_kcontrol_new snd_us16x08_comp_attack_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = + SND_US16X08_KCSET(SND_US16X08_COMP_ATTACK_BIAS, 1, 0, 0xc6), +}; + +static struct snd_kcontrol_new snd_us16x08_comp_release_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = + SND_US16X08_KCSET(SND_US16X08_COMP_RELEASE_BIAS, 1, 0, 0x63), +}; + +static struct snd_kcontrol_new snd_us16x08_eq_gain_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 24), +}; + +static struct snd_kcontrol_new snd_us16x08_eq_low_freq_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 0x1F), +}; + +static struct snd_kcontrol_new snd_us16x08_eq_mid_freq_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 0x3F) +}; + +static struct snd_kcontrol_new snd_us16x08_eq_mid_width_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 0x06) +}; + +static struct snd_kcontrol_new snd_us16x08_eq_high_freq_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = + SND_US16X08_KCSET(SND_US16X08_EQ_HIGHFREQ_BIAS, 1, 0, 0x1F) +}; + +static struct snd_kcontrol_new snd_us16x08_eq_switch_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_switch_info, + .get = snd_us16x08_eqswitch_get, + .put = snd_us16x08_eqswitch_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 1) +}; + +static struct snd_kcontrol_new snd_us16x08_meter_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 1, + .info = snd_us16x08_meter_info, + .get = snd_us16x08_meter_get, + .put = snd_us16x08_meter_put +}; + +/* control store preparation */ + +/* setup compressor store and assign default value */ +static struct snd_us16x08_comp_store *snd_us16x08_create_comp_store(void) +{ + int i = 0; + struct snd_us16x08_comp_store *tmp = + kmalloc(sizeof(struct snd_us16x08_comp_store), GFP_KERNEL); + + if (tmp == NULL) + return NULL; + + for (i = 0; i < SND_US16X08_MAX_CHANNELS; i++) { + tmp->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_THRESHOLD)][i] + = 0x20; + tmp->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_RATIO)][i] = 0x00; + tmp->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_GAIN)][i] = 0x00; + tmp->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_SWITCH)][i] = 0x00; + tmp->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_ATTACK)][i] = 0x00; + tmp->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_RELEASE)][i] = 0x00; + } + return tmp; +} + +/* setup EQ store and assign default values */ +static struct snd_us16x08_eq_store *snd_us16x08_create_eq_store(void) +{ + int i, b_idx; + struct snd_us16x08_eq_store *tmp = + kmalloc(sizeof(struct snd_us16x08_eq_store), GFP_KERNEL); + + if (tmp == NULL) + return NULL; + + for (i = 0; i < SND_US16X08_MAX_CHANNELS; i++) { + for (b_idx = 0; b_idx < SND_US16X08_ID_EQ_BAND_COUNT; b_idx++) { + tmp->val[b_idx][0][i] = 0x0c; + tmp->val[b_idx][3][i] = 0x00; + switch (b_idx) { + case 0: /* EQ Low */ + tmp->val[b_idx][1][i] = 0x05; + tmp->val[b_idx][2][i] = 0xff; + break; + case 1: /* EQ Mid low */ + tmp->val[b_idx][1][i] = 0x0e; + tmp->val[b_idx][2][i] = 0x02; + break; + case 2: /* EQ Mid High */ + tmp->val[b_idx][1][i] = 0x1b; + tmp->val[b_idx][2][i] = 0x02; + break; + case 3: /* EQ High */ + tmp->val[b_idx][1][i] = 0x2f + - SND_US16X08_EQ_HIGHFREQ_BIAS; + tmp->val[b_idx][2][i] = 0xff; + break; + } + } + } + return tmp; +} + +struct snd_us16x08_meter_store *snd_us16x08_create_meter_store(void) +{ + struct snd_us16x08_meter_store *tmp = + kzalloc(sizeof(struct snd_us16x08_meter_store), GFP_KERNEL); + + if (!tmp) + return NULL; + tmp->comp_index = 1; + tmp->comp_active_index = 0; + return tmp; + +} + +static int add_new_ctl(struct usb_mixer_interface *mixer, + const struct snd_kcontrol_new *ncontrol, + int index, int val_type, int channels, + const char *name, const void *opt, + void (*freeer)(struct snd_kcontrol *kctl), + struct usb_mixer_elem_info **elem_ret) +{ + struct snd_kcontrol *kctl; + struct usb_mixer_elem_info *elem; + int err; + + usb_audio_dbg(mixer->chip, "us16x08 add mixer %s\n", name); + + elem = kzalloc(sizeof(*elem), GFP_KERNEL); + if (!elem) + return -ENOMEM; + + elem->head.mixer = mixer; + elem->head.resume = NULL; + elem->control = 0; + elem->idx_off = 0; + elem->head.id = index; + elem->val_type = val_type; + elem->channels = channels; + elem->private_data = (void *) opt; + + kctl = snd_ctl_new1(ncontrol, elem); + if (!kctl) { + kfree(elem); + return -ENOMEM; + } + + kctl->private_free = freeer; + + strlcpy(kctl->id.name, name, sizeof(kctl->id.name)); + + err = snd_usb_mixer_add_control(&elem->head, kctl); + if (err < 0) + return err; + + if (elem_ret) + *elem_ret = elem; + + return 0; +} + +static struct snd_us16x08_control_params control_params; + +/* table of EQ controls */ +static struct snd_us16x08_control_params eq_controls[] = { + { /* EQ switch */ + .kcontrol_new = &snd_us16x08_eq_switch_ctl, + .control_id = SND_US16X08_ID_EQENABLE, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "EQ enable", + .freeer = snd_usb_mixer_elem_free + }, + { /* EQ low gain */ + .kcontrol_new = &snd_us16x08_eq_gain_ctl, + .control_id = SND_US16X08_ID_EQLOWLEVEL, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Low gain", + .freeer = snd_usb_mixer_elem_free + }, + { /* EQ low freq */ + .kcontrol_new = &snd_us16x08_eq_low_freq_ctl, + .control_id = SND_US16X08_ID_EQLOWFREQ, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Low freq", + .freeer = NULL + }, + { /* EQ mid low gain */ + .kcontrol_new = &snd_us16x08_eq_gain_ctl, + .control_id = SND_US16X08_ID_EQLOWMIDLEVEL, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Mid low gain", + .freeer = snd_usb_mixer_elem_free + }, + { /* EQ mid low freq */ + .kcontrol_new = &snd_us16x08_eq_mid_freq_ctl, + .control_id = SND_US16X08_ID_EQLOWMIDFREQ, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Mid low freq", + .freeer = NULL + }, + { /* EQ mid low Q */ + .kcontrol_new = &snd_us16x08_eq_mid_width_ctl, + .control_id = SND_US16X08_ID_EQLOWMIDWIDTH, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Mid low Q", + .freeer = NULL + }, + { /* EQ mid high gain */ + .kcontrol_new = &snd_us16x08_eq_gain_ctl, + .control_id = SND_US16X08_ID_EQHIGHMIDLEVEL, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Mid high gain", + .freeer = snd_usb_mixer_elem_free + }, + { /* EQ mid high freq */ + .kcontrol_new = &snd_us16x08_eq_mid_freq_ctl, + .control_id = SND_US16X08_ID_EQHIGHMIDFREQ, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Mid high freq", + .freeer = NULL + }, + { /* EQ mid high Q */ + .kcontrol_new = &snd_us16x08_eq_mid_width_ctl, + .control_id = SND_US16X08_ID_EQHIGHMIDWIDTH, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Mid high Q", + .freeer = NULL + }, + { /* EQ high gain */ + .kcontrol_new = &snd_us16x08_eq_gain_ctl, + .control_id = SND_US16X08_ID_EQHIGHLEVEL, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "High gain", + .freeer = snd_usb_mixer_elem_free + }, + { /* EQ low freq */ + .kcontrol_new = &snd_us16x08_eq_high_freq_ctl, + .control_id = SND_US16X08_ID_EQHIGHFREQ, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "High freq", + .freeer = NULL + }, +}; + +/* table of compressor controls */ +static struct snd_us16x08_control_params comp_controls[] = { + { /* Comp enable */ + .kcontrol_new = &snd_us16x08_compswitch_ctl, + .control_id = SND_US16X08_ID_COMP_SWITCH, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "Comp enable", + .freeer = snd_usb_mixer_elem_free + }, + { /* Comp threshold */ + .kcontrol_new = &snd_us16x08_comp_threshold_ctl, + .control_id = SND_US16X08_ID_COMP_THRESHOLD, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Threshold", + .freeer = NULL + }, + { /* Comp ratio */ + .kcontrol_new = &snd_us16x08_comp_ratio_ctl, + .control_id = SND_US16X08_ID_COMP_RATIO, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Ratio", + .freeer = NULL + }, + { /* Comp attack */ + .kcontrol_new = &snd_us16x08_comp_attack_ctl, + .control_id = SND_US16X08_ID_COMP_ATTACK, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Attack", + .freeer = NULL + }, + { /* Comp release */ + .kcontrol_new = &snd_us16x08_comp_release_ctl, + .control_id = SND_US16X08_ID_COMP_RELEASE, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Release", + .freeer = NULL + }, + { /* Comp gain */ + .kcontrol_new = &snd_us16x08_comp_gain_ctl, + .control_id = SND_US16X08_ID_COMP_GAIN, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Gain", + .freeer = NULL + }, +}; + +/* table of channel controls */ +static struct snd_us16x08_control_params channel_controls[] = { + { /* Phase */ + .kcontrol_new = &snd_us16x08_ch_boolean_ctl, + .control_id = SND_US16X08_ID_PHASE, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "Phase", + .freeer = snd_usb_mixer_elem_free, + .default_val = 0 + }, + { /* Fader */ + .kcontrol_new = &snd_us16x08_ch_int_ctl, + .control_id = SND_US16X08_ID_FADER, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Fader", + .freeer = NULL, + .default_val = 127 + }, + { /* Mute */ + .kcontrol_new = &snd_us16x08_ch_boolean_ctl, + .control_id = SND_US16X08_ID_MUTE, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "Mute", + .freeer = NULL, + .default_val = 0 + }, + { /* Pan */ + .kcontrol_new = &snd_us16x08_ch_int_ctl, + .control_id = SND_US16X08_ID_PAN, + .type = USB_MIXER_U16, + .num_channels = 16, + .name = "Pan", + .freeer = NULL, + .default_val = 127 + }, +}; + +/* table of master controls */ +static struct snd_us16x08_control_params master_controls[] = { + { /* Master */ + .kcontrol_new = &snd_us16x08_master_ctl, + .control_id = SND_US16X08_ID_FADER, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Master", + .freeer = NULL, + .default_val = 127 + }, + { /* Bypass */ + .kcontrol_new = &snd_us16x08_bus_ctl, + .control_id = SND_US16X08_ID_BYPASS, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "Bypass", + .freeer = NULL, + .default_val = 0 + }, + { /* Buss out */ + .kcontrol_new = &snd_us16x08_bus_ctl, + .control_id = SND_US16X08_ID_BUSS_OUT, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "Buss out", + .freeer = NULL, + .default_val = 0 + }, + { /* Master mute */ + .kcontrol_new = &snd_us16x08_bus_ctl, + .control_id = SND_US16X08_ID_MUTE, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "Master mute", + .freeer = NULL, + .default_val = 0 + }, + +}; + +int snd_us16x08_controls_create(struct usb_mixer_interface *mixer) +{ + int i, j; + int err; + struct usb_mixer_elem_info *elem; + struct snd_us16x08_comp_store *comp_store; + struct snd_us16x08_meter_store *meter_store; + struct snd_us16x08_eq_store *eq_store; + + /* just check for non-MIDI interface */ + if (mixer->hostif->desc.bInterfaceNumber == 3) { + + /* create compressor mixer elements */ + comp_store = snd_us16x08_create_comp_store(); + if (comp_store == NULL) + return -ENOMEM; + + /* create eq store */ + eq_store = snd_us16x08_create_eq_store(); + if (eq_store == NULL) { + kfree(comp_store); + return -ENOMEM; + } + + /* create meters store */ + meter_store = snd_us16x08_create_meter_store(); + if (meter_store == NULL) { + kfree(comp_store); + kfree(eq_store); + return -ENOMEM; + } + + /* add routing control */ + err = add_new_ctl(mixer, &snd_us16x08_route_ctl, + SND_US16X08_ID_ROUTE, USB_MIXER_U8, 8, "Route", + NULL, NULL, &elem); + if (err < 0) { + usb_audio_err(mixer->chip, + "Failed to create route control, err:%d\n", + err); + return err; + } + for (i = 0; i < 8; i++) + elem->cache_val[i] = i < 2 ? i : i + 2; + elem->cached = 0xff; + + /* add master controls */ + for (i = 0; + i < sizeof(master_controls) + / sizeof(control_params); + i++) { + + err = add_new_ctl(mixer, + master_controls[i].kcontrol_new, + master_controls[i].control_id, + master_controls[i].type, + master_controls[i].num_channels, + master_controls[i].name, + comp_store, + master_controls[i].freeer, &elem); + if (err < 0) + return err; + elem->cache_val[0] = master_controls[i].default_val; + elem->cached = 1; + } + + /* add channel controls */ + for (i = 0; + i < sizeof(channel_controls) + / sizeof(control_params); + i++) { + + err = add_new_ctl(mixer, + channel_controls[i].kcontrol_new, + channel_controls[i].control_id, + channel_controls[i].type, + channel_controls[i].num_channels, + channel_controls[i].name, + comp_store, + channel_controls[i].freeer, &elem); + if (err < 0) + return err; + for (j = 0; j < SND_US16X08_MAX_CHANNELS; j++) { + elem->cache_val[j] = + channel_controls[i].default_val; + } + elem->cached = 0xffff; + } + + /* add EQ controls */ + for (i = 0; i < sizeof(eq_controls) / + sizeof(control_params); i++) { + + err = add_new_ctl(mixer, + eq_controls[i].kcontrol_new, + eq_controls[i].control_id, + eq_controls[i].type, + eq_controls[i].num_channels, + eq_controls[i].name, + eq_store, + eq_controls[i].freeer, NULL); + if (err < 0) + return err; + } + + /* add compressor controls */ + for (i = 0; + i < sizeof(comp_controls) + / sizeof(control_params); + i++) { + + err = add_new_ctl(mixer, + comp_controls[i].kcontrol_new, + comp_controls[i].control_id, + comp_controls[i].type, + comp_controls[i].num_channels, + comp_controls[i].name, + comp_store, + comp_controls[i].freeer, NULL); + if (err < 0) + return err; + } + + /* meter function 'get' must access to compressor store + * so place a reference here + */ + meter_store->comp_store = comp_store; + err = add_new_ctl(mixer, &snd_us16x08_meter_ctl, + SND_US16X08_ID_METER, USB_MIXER_U16, 0, "Meter", + (void *) meter_store, snd_usb_mixer_elem_free, NULL); + if (err < 0) + return err; + } + + return 0; +} diff --git a/sound/usb/mixer_us16x08.h b/sound/usb/mixer_us16x08.h new file mode 100644 index 0000000..64f89b5 --- /dev/null +++ b/sound/usb/mixer_us16x08.h @@ -0,0 +1,122 @@ +#ifndef __USB_MIXER_US16X08_H +#define __USB_MIXER_US16X08_H + +#define SND_US16X08_MAX_CHANNELS 16 + +/* define some bias, cause some alsa-mixers wont work with + * negative ranges or if mixer-min != 0 + */ +#define SND_US16X08_NO_BIAS 0 +#define SND_US16X08_FADER_BIAS 127 +#define SND_US16X08_EQ_HIGHFREQ_BIAS 0x20 +#define SND_US16X08_COMP_THRESHOLD_BIAS 0x20 +#define SND_US16X08_COMP_ATTACK_BIAS 2 +#define SND_US16X08_COMP_RELEASE_BIAS 1 + +/* get macro for components of kcontrol private_value */ +#define SND_US16X08_KCBIAS(x) (((x)->private_value >> 24) & 0xff) +#define SND_US16X08_KCSTEP(x) (((x)->private_value >> 16) & 0xff) +#define SND_US16X08_KCMIN(x) (((x)->private_value >> 8) & 0xff) +#define SND_US16X08_KCMAX(x) (((x)->private_value >> 0) & 0xff) +/* set macro for kcontrol private_value */ +#define SND_US16X08_KCSET(bias, step, min, max) \ + (((bias) << 24) | ((step) << 16) | ((min) << 8) | (max)) + +/* the URB request/type to control Tascam mixers */ +#define SND_US16X08_URB_REQUEST 0x1D +#define SND_US16X08_URB_REQUESTTYPE 0x40 + +/* the URB params to retrieve meter ranges */ +#define SND_US16X08_URB_METER_REQUEST 0x1e +#define SND_US16X08_URB_METER_REQUESTTYPE 0xc0 + +#define MUA0(x, y) ((x)[(y) * 10 + 4]) +#define MUA1(x, y) ((x)[(y) * 10 + 5]) +#define MUA2(x, y) ((x)[(y) * 10 + 6]) +#define MUB0(x, y) ((x)[(y) * 10 + 7]) +#define MUB1(x, y) ((x)[(y) * 10 + 8]) +#define MUB2(x, y) ((x)[(y) * 10 + 9]) +#define MUC0(x, y) ((x)[(y) * 10 + 10]) +#define MUC1(x, y) ((x)[(y) * 10 + 11]) +#define MUC2(x, y) ((x)[(y) * 10 + 12]) +#define MUC3(x, y) ((x)[(y) * 10 + 13]) + +/* Common Channel control IDs */ +#define SND_US16X08_ID_BYPASS 0x45 +#define SND_US16X08_ID_BUSS_OUT 0x44 +#define SND_US16X08_ID_PHASE 0x85 +#define SND_US16X08_ID_MUTE 0x83 +#define SND_US16X08_ID_FADER 0x81 +#define SND_US16X08_ID_PAN 0x82 +#define SND_US16X08_ID_METER 0xB1 + +#define SND_US16X08_ID_EQ_BAND_COUNT 4 +#define SND_US16X08_ID_EQ_PARAM_COUNT 4 + +/* EQ level IDs */ +#define SND_US16X08_ID_EQLOWLEVEL 0x01 +#define SND_US16X08_ID_EQLOWMIDLEVEL 0x02 +#define SND_US16X08_ID_EQHIGHMIDLEVEL 0x03 +#define SND_US16X08_ID_EQHIGHLEVEL 0x04 + +/* EQ frequence IDs */ +#define SND_US16X08_ID_EQLOWFREQ 0x11 +#define SND_US16X08_ID_EQLOWMIDFREQ 0x12 +#define SND_US16X08_ID_EQHIGHMIDFREQ 0x13 +#define SND_US16X08_ID_EQHIGHFREQ 0x14 + +/* EQ width IDs */ +#define SND_US16X08_ID_EQLOWMIDWIDTH 0x22 +#define SND_US16X08_ID_EQHIGHMIDWIDTH 0x23 + +#define SND_US16X08_ID_EQENABLE 0x30 + +#define EQ_STORE_BAND_IDX(x) ((x) & 0xf) +#define EQ_STORE_PARAM_IDX(x) (((x) & 0xf0) >> 4) + +#define SND_US16X08_ID_ROUTE 0x00 + +/* Compressor Ids */ +#define SND_US16X08_ID_COMP_BASE 0x32 +#define SND_US16X08_ID_COMP_THRESHOLD SND_US16X08_ID_COMP_BASE +#define SND_US16X08_ID_COMP_RATIO (SND_US16X08_ID_COMP_BASE + 1) +#define SND_US16X08_ID_COMP_ATTACK (SND_US16X08_ID_COMP_BASE + 2) +#define SND_US16X08_ID_COMP_RELEASE (SND_US16X08_ID_COMP_BASE + 3) +#define SND_US16X08_ID_COMP_GAIN (SND_US16X08_ID_COMP_BASE + 4) +#define SND_US16X08_ID_COMP_SWITCH (SND_US16X08_ID_COMP_BASE + 5) +#define SND_US16X08_ID_COMP_COUNT 6 + +#define COMP_STORE_IDX(x) ((x) - SND_US16X08_ID_COMP_BASE) + +struct snd_us16x08_eq_store { + u8 val[SND_US16X08_ID_EQ_BAND_COUNT][SND_US16X08_ID_EQ_PARAM_COUNT] + [SND_US16X08_MAX_CHANNELS]; +}; + +struct snd_us16x08_comp_store { + u8 val[SND_US16X08_ID_COMP_COUNT][SND_US16X08_MAX_CHANNELS]; +}; + +struct snd_us16x08_meter_store { + int meter_level[SND_US16X08_MAX_CHANNELS]; + int master_level[2]; /* level of meter for master output */ + int comp_index; /* round trip channel selector */ + int comp_active_index; /* channel select from user space mixer */ + int comp_level[16]; /* compressor reduction level */ + struct snd_us16x08_comp_store *comp_store; +}; + +struct snd_us16x08_control_params { + struct snd_kcontrol_new *kcontrol_new; + int control_id; + int type; + int num_channels; + const char *name; + void (*freeer)(struct snd_kcontrol *kctl); + int default_val; +}; + +#define snd_us16x08_switch_info snd_ctl_boolean_mono_info + +int snd_us16x08_controls_create(struct usb_mixer_interface *mixer); +#endif /* __USB_MIXER_US16X08_H */ -- 2.7.4

2 1

[alsa-devel] [PATCH v4 1/3] clk: zte: add i2s clocks for zx296718
by Baoyou Xie 13 Feb '17

13 Feb '17

The i2s related clock support is missing from the existing zx296718 clock driver. This patch adds it, so that the upstream ZX I2S driver can work out. Signed-off-by: Baoyou Xie <baoyou.xie(a)linaro.org> --- drivers/clk/zte/clk-zx296718.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/clk/zte/clk-zx296718.c b/drivers/clk/zte/clk-zx296718.c index ad5d1df..2f7c668 100644 --- a/drivers/clk/zte/clk-zx296718.c +++ b/drivers/clk/zte/clk-zx296718.c @@ -936,6 +936,10 @@ static struct zx_clk_gate audio_gate_clk[] = { GATE(AUDIO_I2S1_WCLK, "i2s1_wclk", "i2s1_wclk_div", AUDIO_I2S1_CLK, 9, CLK_SET_RATE_PARENT, 0), GATE(AUDIO_I2S2_WCLK, "i2s2_wclk", "i2s2_wclk_div", AUDIO_I2S2_CLK, 9, CLK_SET_RATE_PARENT, 0), GATE(AUDIO_I2S3_WCLK, "i2s3_wclk", "i2s3_wclk_div", AUDIO_I2S3_CLK, 9, CLK_SET_RATE_PARENT, 0), + GATE(AUDIO_I2S0_PCLK, "i2s0_pclk", "clk49m5", AUDIO_I2S0_CLK, 8, 0, 0), + GATE(AUDIO_I2S1_PCLK, "i2s1_pclk", "clk49m5", AUDIO_I2S1_CLK, 8, 0, 0), + GATE(AUDIO_I2S2_PCLK, "i2s2_pclk", "clk49m5", AUDIO_I2S2_CLK, 8, 0, 0), + GATE(AUDIO_I2S3_PCLK, "i2s3_pclk", "clk49m5", AUDIO_I2S3_CLK, 8, 0, 0), GATE(AUDIO_I2C0_WCLK, "i2c0_wclk", "i2c0_wclk_mux", AUDIO_I2C0_CLK, 9, CLK_SET_RATE_PARENT, 0), GATE(AUDIO_SPDIF0_WCLK, "spdif0_wclk", "spdif0_wclk_div", AUDIO_SPDIF0_CLK, 9, CLK_SET_RATE_PARENT, 0), GATE(AUDIO_SPDIF1_WCLK, "spdif1_wclk", "spdif1_wclk_div", AUDIO_SPDIF1_CLK, 9, CLK_SET_RATE_PARENT, 0), -- 2.7.4

5 10

[alsa-devel] [PATCH 0/7][resend] ASoC: add OF-graph base simple-card
by Kuninori Morimoto 13 Feb '17

13 Feb '17

Hi Mark, Rob These are resend of OF-graph base simple-card patch-set. I added 3 OF-graph helper functions for it. 1) - 3) : new OF-graph helper functions 4) - 7) : OF-graph base simple-card Kuninori Morimoto (7): 1) of_graph: add of_graph_get_remote_endpoint() 2) of_graph: add of_graph_get_port_parent() 3) of_graph: add of_graph_get_endpoint_count() 4) ASoC: add snd_soc_get_dai_id() 5) ASoC: simple-card-utils: add asoc_simple_card_parse_graph_dai() 6) ASoC: add simple-graph-card document 7) ASoC: add simple-graph-card support .../bindings/sound/simple-graph-card.txt | 137 ++++++++++ drivers/of/base.c | 60 +++- include/linux/of_graph.h | 22 ++ include/sound/simple_card_utils.h | 10 + include/sound/soc.h | 1 + sound/soc/generic/Kconfig | 7 + sound/soc/generic/Makefile | 2 + sound/soc/generic/simple-card-utils.c | 36 +++ sound/soc/generic/simple-graph-card.c | 303 +++++++++++++++++++++ sound/soc/soc-core.c | 23 ++ 10 files changed, 591 insertions(+), 10 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/simple-graph-card.txt create mode 100644 sound/soc/generic/simple-graph-card.c -- 1.9.1

2 9

[alsa-devel] [RFC v3][PATCH 00/13] ALSA: fireface: new driver for RME Fireface series
by Takashi Sakamoto 11 Feb '17

11 Feb '17

Hi, This patchset is a revised version of my former one: [alsa-devel] [RFC v2][PATCH 00/11] ALSA: fireface: new driver for RME Fireface series http://mailman.alsa-project.org/pipermail/alsa-devel/2015-December/102261.h… Since the end of 2015, ALSA firewire stack got many changes. This revision adapt the former one to current stack. Furthermore, I add an abstraction layer of Fireface protocol to help developers to add support for the rest of models. (I'm unwilling to work further for this direction, because of its cost.) Changes: * Rebase to current ALSA firewire stack and add optimization. * Rename local structure with shorter words. * Delegate a task to configure settings on write-only registers to user space applications. * Switch mode to fetch PCM frames from data blocks to sampling data processing layer voluntarily. * Revise comments with technical information from my analysis to Fireface 400 packets. The rebasing is actually done on my proposal of ALSA MOTU driver. Please apply this patchset to it to prevent conflicts. [alsa-devel] [PATCH 00/19][RFC v2] ALSA: firewire-motu: new driver for MOTU FireWire series http://mailman.alsa-project.org/pipermail/alsa-devel/2017-January/117211.ht… Currently, I have a plan to post this patchset to merge into Linux 4.12. Corresponding merge window will be estimated to open this April. If you're willing to test this module, please report the result till then. Unfortunately, I did this work just with my notes and log dumps, thus without any test device. I'm happy if you test this patchset with your Fireface 400. For testers, I prepare for backport codes in my repository in github.com. Please use 'topic/fireface' branch. https://github.com/takaswie/snd-firewire-improve/tree/topic/fireface If you have any question, please reply to me even if it's trivial; e.g. typo in comments, as long as its' technical issue. Regards Takashi Sakamoto (13): ALSA: fireface: add skeleton for RME Fireface series ALSA: fireface: postpone sound card registration ALSA: fireface: add model specific structure ALSA: fireface: add an abstraction layer for model-specific protocols ALSA: fireface: add transaction support ALSA: fireface: add support for MIDI functionality ALSA: fireface: add proc node to help debugging ALSA: firewire-lib: add no-header packet processing ALSA: fireface: add unique data processing layer ALSA: fireface: add stream management functionality ALSA: fireface: add support for PCM functionality ALSA: fireface: add hwdep interface ALSA: fireface: add support for Fireface 400 include/uapi/sound/asound.h | 3 +- include/uapi/sound/firewire.h | 2 +- sound/firewire/Kconfig | 8 + sound/firewire/Makefile | 1 + sound/firewire/amdtp-stream.c | 84 +++++- sound/firewire/amdtp-stream.h | 2 + sound/firewire/fireface/Makefile | 3 + sound/firewire/fireface/amdtp-ff.c | 155 +++++++++++ sound/firewire/fireface/ff-hwdep.c | 191 +++++++++++++ sound/firewire/fireface/ff-midi.c | 131 +++++++++ sound/firewire/fireface/ff-pcm.c | 404 ++++++++++++++++++++++++++++ sound/firewire/fireface/ff-proc.c | 63 +++++ sound/firewire/fireface/ff-protocol-ff400.c | 371 +++++++++++++++++++++++++ sound/firewire/fireface/ff-stream.c | 282 +++++++++++++++++++ sound/firewire/fireface/ff-transaction.c | 295 ++++++++++++++++++++ sound/firewire/fireface/ff.c | 209 ++++++++++++++ sound/firewire/fireface/ff.h | 145 ++++++++++ 17 files changed, 2342 insertions(+), 7 deletions(-) create mode 100644 sound/firewire/fireface/Makefile create mode 100644 sound/firewire/fireface/amdtp-ff.c create mode 100644 sound/firewire/fireface/ff-hwdep.c create mode 100644 sound/firewire/fireface/ff-midi.c create mode 100644 sound/firewire/fireface/ff-pcm.c create mode 100644 sound/firewire/fireface/ff-proc.c create mode 100644 sound/firewire/fireface/ff-protocol-ff400.c create mode 100644 sound/firewire/fireface/ff-stream.c create mode 100644 sound/firewire/fireface/ff-transaction.c create mode 100644 sound/firewire/fireface/ff.c create mode 100644 sound/firewire/fireface/ff.h -- 2.9.3

1 13

[alsa-devel] [PATCH] ALSA: x86: Ensure VLV bitwise operations are SOC specific
by Ian W MORRISON 11 Feb '17

11 Feb '17

The function vlv_display_irq_postinstall is used by both valleyview and cherryview irq handling. I915_LPE_PIPE_C_INTERRUPT is specific to cherryview so should be excluded from any valleyview associated bitwise operations. Signed-off-by: Ian W Morrison <linuxium(a)linuxium.com.au> --- drivers/gpu/drm/i915/i915_irq.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index f0880af..ee61808 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -2940,9 +2940,10 @@ static void vlv_display_irq_postinstall(struct drm_i915_private *dev_priv) WARN_ON(dev_priv->irq_mask != ~0); - val = (I915_LPE_PIPE_A_INTERRUPT | - I915_LPE_PIPE_B_INTERRUPT | - I915_LPE_PIPE_C_INTERRUPT); + val = I915_LPE_PIPE_A_INTERRUPT | + I915_LPE_PIPE_B_INTERRUPT; + if (IS_CHERRYVIEW(dev_priv)) + val |= I915_LPE_PIPE_C_INTERRUPT; enable_mask |= val; -- 1.9.1

2 2

[alsa-devel] [PATCH] ASoC: nau8825: automatic BCLK and LRC divde in master mode
by John Hsu 10 Feb '17

10 Feb '17

Provide the automatic configurable LRC and BCLK divide. The driver will make configurations of LRC and BCLK automatically according to BCLK and FS information in master mode. Signed-off-by: John Hsu <KCHSU0(a)nuvoton.com> --- sound/soc/codecs/nau8825.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/nau8825.c b/sound/soc/codecs/nau8825.c index 4576f98..97fbeba 100644 --- a/sound/soc/codecs/nau8825.c +++ b/sound/soc/codecs/nau8825.c @@ -1231,7 +1231,7 @@ static int nau8825_hw_params(struct snd_pcm_substream *substream, { struct snd_soc_codec *codec = dai->codec; struct nau8825 *nau8825 = snd_soc_codec_get_drvdata(codec); - unsigned int val_len = 0, osr; + unsigned int val_len = 0, osr, ctrl_val, bclk_fs, bclk_div; nau8825_sema_acquire(nau8825, 3 * HZ); @@ -1261,6 +1261,24 @@ static int nau8825_hw_params(struct snd_pcm_substream *substream, osr_adc_sel[osr].clk_src << NAU8825_CLK_ADC_SRC_SFT); } + /* make BCLK and LRC divde configuration if the codec as master. */ + regmap_read(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2, &ctrl_val); + if (ctrl_val & NAU8825_I2S_MS_MASTER) { + /* get the bclk and fs ratio */ + bclk_fs = snd_soc_params_to_bclk(params) / params_rate(params); + if (bclk_fs <= 32) + bclk_div = 2; + else if (bclk_fs <= 64) + bclk_div = 1; + else if (bclk_fs <= 128) + bclk_div = 0; + else + return -EINVAL; + regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2, + NAU8825_I2S_LRC_DIV_MASK | NAU8825_I2S_BLK_DIV_MASK, + ((bclk_div + 1) << NAU8825_I2S_LRC_DIV_SFT) | bclk_div); + } + switch (params_width(params)) { case 16: val_len |= NAU8825_I2S_DL_16; -- 2.6.4 =========================================================================================== The privileged confidential information contained in this email is intended for use only by the addressees as indicated by the original sender of this email. If you are not the addressee indicated in this email or are not responsible for delivery of the email to such a person, please kindly reply to the sender indicating this fact and delete all copies of it from your computer and network server immediately. Your cooperation is highly appreciated. It is advised that any unauthorized use of confidential information of Nuvoton is strictly prohibited; and any information in this email irrelevant to the official business of Nuvoton shall be deemed as neither given nor endorsed by Nuvoton.

2 3

[alsa-devel] [PATCH] pcm: dmix: Allow disabling x86 optimizations
by Takashi Iwai 10 Feb '17

10 Feb '17

The dmix plugin has some optimized implementations for x86 using the direct memory accesses, which was rather the original version, in addition to the "generic" implementation using the semaphore blocking. The x86 implementation relies on the memory coherency *and* the fast read/write on it. For other architectures, this has been always disabled just because of memory coherency. But, the recent LPE audio development revealed that, even on x86 platforms, the read/write performance might become extremely bad when the buffer is marked as uncached. Some drivers already know the buffer is uncached, we need to switch to the generic mode in such a case. This patch introduces yet another flag to dmix configuration, direct_memory_access, that indicates whether the x86-specific optimization can be used or not. Each driver can set the flag in its cards config namespace, and the default dmix config refers to it. As of this patch, only HDMI LPE Audio driver sets it. Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- src/conf/cards/HdmiLpeAudio.conf | 3 +++ src/conf/pcm/dmix.conf | 15 +++++++++++++++ src/pcm/pcm_direct.c | 8 ++++++++ src/pcm/pcm_direct.h | 2 ++ src/pcm/pcm_dmix.c | 1 + src/pcm/pcm_dmix_i386.c | 5 +++++ src/pcm/pcm_dmix_x86_64.c | 5 +++++ 7 files changed, 39 insertions(+) diff --git a/src/conf/cards/HdmiLpeAudio.conf b/src/conf/cards/HdmiLpeAudio.conf index f5836c05219e..61bdfeae2917 100644 --- a/src/conf/cards/HdmiLpeAudio.conf +++ b/src/conf/cards/HdmiLpeAudio.conf @@ -20,6 +20,9 @@ HdmiLpeAudio.pcm.front.0 { } } +# uncached memory reads have a high penalty +HdmiLpeAudio.dmix.direct_memory_access false + # default with dmix+softvol HdmiLpeAudio.pcm.default { @args [ CARD ] diff --git a/src/conf/pcm/dmix.conf b/src/conf/pcm/dmix.conf index 7d0aa0158c42..2d3b329e533a 100644 --- a/src/conf/pcm/dmix.conf +++ b/src/conf/pcm/dmix.conf @@ -49,6 +49,21 @@ pcm.!dmix { @func refer name defaults.pcm.ipc_perm } + direct_memory_access { + @func refer + name { + @func concat + strings [ + "cards." + { + @func card_driver + card $CARD + } + ".dmix.direct_memory_access" + ] + } + default true + } slave { pcm { type hw diff --git a/src/pcm/pcm_direct.c b/src/pcm/pcm_direct.c index e4bef7860d01..364191b20bab 100644 --- a/src/pcm/pcm_direct.c +++ b/src/pcm/pcm_direct.c @@ -1861,6 +1861,7 @@ int snd_pcm_direct_parse_open_conf(snd_config_t *root, snd_config_t *conf, rec->slowptr = 1; rec->max_periods = 0; rec->var_periodsize = 1; + rec->direct_memory_access = 1; /* read defaults */ if (snd_config_search(root, "defaults.pcm.dmix_max_periods", &n) >= 0) { @@ -1974,6 +1975,13 @@ int snd_pcm_direct_parse_open_conf(snd_config_t *root, snd_config_t *conf, rec->var_periodsize = err; continue; } + if (strcmp(id, "direct_memory_access") == 0) { + err = snd_config_get_bool(n); + if (err < 0) + return err; + rec->direct_memory_access = err; + continue; + } SNDERR("Unknown field %s", id); return -EINVAL; } diff --git a/src/pcm/pcm_direct.h b/src/pcm/pcm_direct.h index 66107ec07477..fba55fdcb5b3 100644 --- a/src/pcm/pcm_direct.h +++ b/src/pcm/pcm_direct.h @@ -159,6 +159,7 @@ struct snd_pcm_direct { unsigned int channels; /* client's channels */ unsigned int *bindings; unsigned int recoveries; /* mirror of executed recoveries on slave */ + int direct_memory_access; /* use arch-optimized buffer RW */ union { struct { int shmid_sum; /* IPC global sum ring buffer memory identification */ @@ -340,6 +341,7 @@ struct snd_pcm_direct_open_conf { int slowptr; int max_periods; int var_periodsize; + int direct_memory_access; snd_config_t *slave; snd_config_t *bindings; }; diff --git a/src/pcm/pcm_dmix.c b/src/pcm/pcm_dmix.c index 2ef61599f4b0..dd0356e9114d 100644 --- a/src/pcm/pcm_dmix.c +++ b/src/pcm/pcm_dmix.c @@ -1065,6 +1065,7 @@ int snd_pcm_dmix_open(snd_pcm_t **pcmp, const char *name, dmix->max_periods = opts->max_periods; dmix->var_periodsize = opts->var_periodsize; dmix->sync_ptr = snd_pcm_dmix_sync_ptr; + dmix->direct_memory_access = opts->direct_memory_access; retry: if (first_instance) { diff --git a/src/pcm/pcm_dmix_i386.c b/src/pcm/pcm_dmix_i386.c index dcc6b9a4222e..1ab983a8a373 100644 --- a/src/pcm/pcm_dmix_i386.c +++ b/src/pcm/pcm_dmix_i386.c @@ -87,6 +87,11 @@ static void mix_select_callbacks(snd_pcm_direct_t *dmix) { static int smp = 0, mmx = 0, cmov = 0; + if (!dmix->direct_memory_access) { + generic_mix_select_callbacks(dmix); + return; + } + if (!((1ULL<< dmix->shmptr->s.format) & i386_dmix_supported_format)) { generic_mix_select_callbacks(dmix); return; diff --git a/src/pcm/pcm_dmix_x86_64.c b/src/pcm/pcm_dmix_x86_64.c index 831046d909a4..34c40d4e9d1d 100644 --- a/src/pcm/pcm_dmix_x86_64.c +++ b/src/pcm/pcm_dmix_x86_64.c @@ -70,6 +70,11 @@ static void mix_select_callbacks(snd_pcm_direct_t *dmix) { static int smp = 0; + if (!dmix->direct_memory_access) { + generic_mix_select_callbacks(dmix); + return; + } + if (!((1ULL<< dmix->shmptr->s.format) & x86_64_dmix_supported_format)) { generic_mix_select_callbacks(dmix); return; -- 2.11.0

1 0

[alsa-devel] [PATCH 0/6] Yet another experiments with LPE audio
by Takashi Iwai 10 Feb '17

10 Feb '17

Another day, another patchset. Here I put a largish cleanup patch to just shuffle the code, in addition to the new S16 and S32 formats support and the support for a single period with no period wakeup as we've discussed in the previous thread. One patch to remove BATCH flag is same and kept in the middle of this series. I guess I can merge the first three patches now. As Pierre still seems to have a concern about BATCH, the rest three patches can postpone. It worked stably on my machine, but it'd be appreciated if anyone else can test it on other machines, too (especially with BYT). As usual, they are found in topic/intel-lpe-audio-cleanup branch. Takashi === Takashi Iwai (6): ALSA: x86: Rearrange defines ALSA: x86: Support S32 format ALSA: x86: Support S16 format ALSA: x86: Don't pass SNDRV_PCM_INFO_BATCH flag ALSA: x86: Allow single period PCM operation ALSA: x86: Allow no-period-wakeup setup sound/x86/intel_hdmi_audio.c | 53 +++++++++++++++------- sound/x86/intel_hdmi_audio.h | 64 ++++++++++++++++---------- sound/x86/intel_hdmi_lpe_audio.h | 97 +++++++++++++++++----------------------- 3 files changed, 118 insertions(+), 96 deletions(-) -- 2.11.0

3 15

[alsa-devel] [PATCH RESEND] ASoC: sun4i-i2s: Update binding documentation to include A31
by Mylène Josserand 10 Feb '17

10 Feb '17

Add a new compatible for sun4i-i2s driver to handle some SoCs that have a reset line that must be asserted/deasserted. This new compatible, "allwinner,sun6i-a31-i2s", requires the property "resets" which should be a phandle to the reset line. Except these differences, the compatible is identical to previous one which will not handle a reset line. Signed-off-by: Mylène Josserand <mylene.josserand(a)free-electrons.com> Acked-by: Maxime Ripard <maxime.ripard(a)free-electrons.com> Acked-by: Rob Herring <robh(a)kernel.org> --- Documentation/devicetree/bindings/sound/sun4i-i2s.txt | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/sound/sun4i-i2s.txt b/Documentation/devicetree/bindings/sound/sun4i-i2s.txt index 7b526ec64991..f4adc58f82ba 100644 --- a/Documentation/devicetree/bindings/sound/sun4i-i2s.txt +++ b/Documentation/devicetree/bindings/sound/sun4i-i2s.txt @@ -7,6 +7,7 @@ Required properties: - compatible: should be one of the followings - "allwinner,sun4i-a10-i2s" + - "allwinner,sun6i-a31-i2s" - reg: physical base address of the controller and length of memory mapped region. - interrupts: should contain the I2S interrupt. @@ -19,6 +20,10 @@ Required properties: - "mod" : module clock for the I2S controller - #sound-dai-cells : Must be equal to 0 +Required properties for the following compatibles: + - "allwinner,sun6i-a31-i2s" +- resets: phandle to the reset line for this codec + Example: i2s0: i2s@01c22400 { -- 2.11.0

1 0

[alsa-devel] [PATCH 0/2] Fix some corner cases in LPE Audio driver
by Takashi Iwai 10 Feb '17

10 Feb '17

Hi, while debugging the dmix problem with S16/S32 format, I noticed a possible race and some optimization. Here is the updates. Takashi === Takashi Iwai (2): ALSA: x86: Cache AUD_CONFIG register value ALSA: x86: Avoid unconditional call of snd_pcm_period_elapsed() sound/x86/intel_hdmi_audio.c | 68 +++++++++++++++++++------------------------- sound/x86/intel_hdmi_audio.h | 1 + 2 files changed, 31 insertions(+), 38 deletions(-) -- 2.11.0

1 3

[alsa-devel] [PATCH v3 1/3] clk: zte: add i2s clocks for zx296718
by Baoyou Xie 10 Feb '17

10 Feb '17

The i2s related clock support is missing from the existing zx296718 clock driver. This patch adds it, so that the upstream ZX I2S driver can work out. Signed-off-by: Baoyou Xie <baoyou.xie(a)linaro.org> --- drivers/clk/zte/clk-zx296718.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/clk/zte/clk-zx296718.c b/drivers/clk/zte/clk-zx296718.c index ad5d1df..f106d40 100644 --- a/drivers/clk/zte/clk-zx296718.c +++ b/drivers/clk/zte/clk-zx296718.c @@ -941,6 +941,10 @@ static struct zx_clk_gate audio_gate_clk[] = { GATE(AUDIO_SPDIF1_WCLK, "spdif1_wclk", "spdif1_wclk_div", AUDIO_SPDIF1_CLK, 9, CLK_SET_RATE_PARENT, 0), GATE(AUDIO_TDM_WCLK, "tdm_wclk", "tdm_wclk_div", AUDIO_TDM_CLK, 17, CLK_SET_RATE_PARENT, 0), GATE(AUDIO_TS_PCLK, "tempsensor_pclk", "clk49m5", AUDIO_TS_CLK, 1, 0, 0), + GATE(AUDIO_I2S0_PCLK, "i2s0_pclk", "clk49m5", AUDIO_I2S0_CLK, 8, 0, 0), + GATE(AUDIO_I2S1_PCLK, "i2s1_pclk", "clk49m5", AUDIO_I2S1_CLK, 8, 0, 0), + GATE(AUDIO_I2S2_PCLK, "i2s2_pclk", "clk49m5", AUDIO_I2S2_CLK, 8, 0, 0), + GATE(AUDIO_I2S3_PCLK, "i2s3_pclk", "clk49m5", AUDIO_I2S3_CLK, 8, 0, 0), }; static struct clk_hw_onecell_data audio_hw_onecell_data = { -- 2.7.4

4 7

[alsa-devel] [PATCH 1/2] pcm: Avoid lock for snd_pcm_nonblock()
by Takashi Iwai 09 Feb '17

09 Feb '17

snd_pcm_nonblock() is called as snd_pcm_abort(). Since snd_pcm_abort() is called often from a signal handler to clean things up (e.g. aplay does it), we may face a deadlock if the signal is raised during the locked operation. There can be some way to check the deadlock state, but they would cost much. Since the race condition of snd_pcm_nonblock() is quite small, let's just drop the locking inside snd_pcm_nonblock() as a workaround. Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- src/pcm/pcm.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/src/pcm/pcm.c b/src/pcm/pcm.c index 0cf740f854a9..c136d5579320 100644 --- a/src/pcm/pcm.c +++ b/src/pcm/pcm.c @@ -759,7 +759,10 @@ int snd_pcm_nonblock(snd_pcm_t *pcm, int nonblock) int err = 0; assert(pcm); - __snd_pcm_lock(pcm); /* forced lock due to pcm field change */ + /* FIXME: __snd_pcm_lock() call below is commented out because of the + * the possible deadlock in signal handler calling snd_pcm_abort() + */ + /* __snd_pcm_lock(pcm); */ /* forced lock due to pcm field change */ if ((err = pcm->ops->nonblock(pcm->op_arg, nonblock)) < 0) goto unlock; if (nonblock == 2) { @@ -775,7 +778,7 @@ int snd_pcm_nonblock(snd_pcm_t *pcm, int nonblock) pcm->mode &= ~SND_PCM_NONBLOCK; } unlock: - __snd_pcm_unlock(pcm); + /* __snd_pcm_unlock(pcm); */ /* FIXME: see above */ return err; } -- 2.11.0

1 1

[alsa-devel] [PATCH v4 1/1] ALSA: Tascam US-16x08 DSP mixer quirk
by OnkelDead 09 Feb '17

09 Feb '17

Ok, here my result >> +#include <linux/slab.h> >> +#include <linux/usb.h> >> +#include <linux/usb/audio-v2.h> >> +#include "linux/kthread.h" > > Why kthread? Also why double-quote, not bracket? > >> + >> +#include <sound/core.h> >> +#include <sound/control.h> >> +#include <asm-generic/errno-base.h> > > This looks very wrong. Just include <linux/errno.h> if really needed > (I guess you won't). Indeed! Includes removed >> +/* wrapper function to send prepared URB buffer to usb device. Return -1 >> + * if something went wrong > > It's always better to return a negative error code instead of -1. Now returns correct errno >> + if (err == 0) { >> + store->value[index] = val; >> + elem->cached &= 1 << index; > > Do you mean "|="? Otherwise the cache value is set exclusively. > (Ditto for all other places.) Absolutely right, fixed. >> + switch (elem->head.id) { >> + case SND_US16X08_ID_COMP_THRESHOLD: >> + val = store->valThreshold[index]; >> + break; >> + case SND_US16X08_ID_COMP_RATIO: >> + val = store->valRatio[index]; >> + break; >> + case SND_US16X08_ID_COMP_ATTACK: >> + val = store->valAttack[index]; >> + break; >> + case SND_US16X08_ID_COMP_RELEASE: >> + val = store->valRelease[index]; >> + break; >> + case SND_US16X08_ID_COMP_GAIN: >> + val = store->valGain[index]; >> + break; >> + case SND_US16X08_ID_COMP_SWITCH: >> + val = store->valSwitch[index]; >> + break; > > Wouldn't it be easier to have something like: > > val_idx = elem_id_to_idx(elem->head.id); > val = store->values[val_id][index]; > > A series of switch/case doesn't look good. Good advise, I've changed the store structs accordingly. More about those shadow stores later. >> + buf[20] = store->low_store->valSwitch[index]; >> + buf[17] = store->low_store->valWidth[index]; >> + buf[14] = store->low_store->valFreq[index]; >> + buf[11] = store->low_store->valdB[index]; >> + buf[8] = 0x01; >> + err = snd_us16x08_send_urb(chip, buf, sizeof(eqs_msq)); > > No error check? Fixed. > >> + /* give time to the device to handle the request */ >> + mdelay(15); > > Does it have to be mdelay(), not msleep() or its variant? > mdelay() with such a long time is usually something wrong. > > > +/* setup EQ store and assign default values */ >> +static struct snd_us16x08_eq_store *snd_us16x08_create_eq_store(int band_index) >> +{ >> + int i = 0; > > Superfluous initialization. Fixed. >> +/* suspend/resume */ >> + >> +static void snd_us16x08_resume_route(struct usb_mixer_elem_info *elem) >> +{ >> + int i; >> + struct snd_us16x08_common *store = >> + (struct snd_us16x08_common *) elem->private_data; >> + >> + for (i = 0; i < elem->channels; i++) >> + if (elem->cached & (1 << i)) >> + store->value[i] = elem->cache_val[i]; > > Does it make sense? The resume function resumes the device, and it's > not about the memory we manage by ourselves. Usually the resume > function writes back the cached value to the device. > > If store->value[] and elem->cache_val[] is always identical, we can > drop even store->value[]. A first impression must lead in your concern. But using those shadow caches is important, cause the device expects multiple control values in a single URB message. If e.g. the threshold of a compressor got changed, the driver has to send new threshold AND current ratio, attack, release etc. in a single command. I didn't found a solution for cross-mixer-element-cache-access. Any hints ? I've removed all shadow caches where not needed. I've remove the resume callback, the device is self powered and has its own suspend/resume mechanism. >> + { /* EQ high gain */ >> + .kcontrol_new = &snd_us16x08_eq_gain_ctl, >> + .control_id = SND_US16X08_ID_EQHIGHLEVEL, >> + .type = USB_MIXER_U8, >> + .num_channels = 16, >> + .name = "High gain", >> + .freeer = snd_usb_mixer_elem_free >> + }, >> + { /* EQ low freq */ >> + .kcontrol_new = &snd_us16x08_eq_high_freq_ctl, >> + .control_id = SND_US16X08_ID_EQHIGHFREQ, >> + .type = USB_MIXER_U8, >> + .num_channels = 16, >> + .name = "High freq", > > These mixer control names look somehow too ambiguous... I've tried to keep them short, they are somehow equal to those in the MS control panel I'd lean on. Still unchanged. >> + struct snd_us16x08_eq_store *eq_high_store = >> + snd_us16x08_create_eq_store(0x04); >> + struct snd_us16x08_eq_all_store *eq_all_store = >> + kmalloc(sizeof(struct snd_us16x08_eq_all_store), GFP_KERNEL); >> + >> + /* check for allocation error */ >> + if (eq_low_store == NULL || eq_midlow_store == NULL || >> + eq_midhigh_store == NULL || eq_high_store == NULL || >> + eq_all_store == NULL) >> + return -ENOMEM; > > This leaks the memory. You forgot to release non-NULL ones. Fixed. >> + /* create bus store */ >> + bus_store = snd_us16x08_create_bus_store(0); >> + if (bus_store == NULL) >> + return -ENOMEM; >> + >> + /* create channel store */ >> + channel_store = snd_us16x08_create_channel_store(); >> + if (channel_store == NULL) >> + return -ENOMEM; > > Ditto. Fixed. >> + err = add_new_ctl(mixer, &snd_us16x08_bus_ctl, >> + SND_US16X08_ID_MUTE, USB_MIXER_U8, 1, "Master mute", >> + (void *) bus_store, NULL); >> + if (err < 0) >> + return err; >> + >> + err = add_new_ctl(mixer, &snd_us16x08_ch_boolean_ctl, >> + SND_US16X08_ID_PHASE, USB_MIXER_U8, 16, "Phase", >> + (void *) channel_store, >> + snd_usb_mixer_elem_free); >> + if (err < 0) >> + return err; >> + >> + err = add_new_ctl(mixer, &snd_us16x08_ch_int_ctl, >> + SND_US16X08_ID_FADER, USB_MIXER_S16, 16, "Fader", >> + (void *) channel_store, NULL); >> + if (err < 0) >> + return err; >> + >> + err = add_new_ctl(mixer, &snd_us16x08_ch_boolean_ctl, >> + SND_US16X08_ID_MUTE, USB_MIXER_BOOLEAN, 16, "Mute", >> + (void *) channel_store, NULL); >> + >> + if (err < 0) >> + return err; >> + >> + err = add_new_ctl(mixer, &snd_us16x08_ch_int_ctl, >> + SND_US16X08_ID_PAN, USB_MIXER_U16, 16, "Pan", >> + (void *) channel_store, NULL); > > Can we use a table for registration, too? > This sequence of calls looks... well, a lot of room to optimize Fixed, tables are in place. >> +struct snd_us16x08_eq_store { >> + u8 valdB[SND_US16X08_MAX_CHANNELS]; >> + u8 valFreq[SND_US16X08_MAX_CHANNELS]; >> + u8 valWidth[SND_US16X08_MAX_CHANNELS]; >> + u8 valSwitch[SND_US16X08_MAX_CHANNELS]; > > Please avoid thisSomething, but use this_something (dB might be an > exception, though). > In this case, val prefix can be dropped, too. It's just superfluous. > > >> +struct snd_us16x08_comp_store { >> + u8 valThreshold[SND_US16X08_MAX_CHANNELS]; >> + u8 valAttack[SND_US16X08_MAX_CHANNELS]; >> + u8 valRelease[SND_US16X08_MAX_CHANNELS]; >> + u8 valRatio[SND_US16X08_MAX_CHANNELS]; >> + u8 valGain[SND_US16X08_MAX_CHANNELS]; >> + u8 valSwitch[SND_US16X08_MAX_CHANNELS]; >> +}; > > Ditto. Fixed. Add mixer quirk for Tascam US-16x08 usb interface. Even that this an usb compliant device, the input channels and DSP functions (EQ/Compressor) arn't accessible by default. Signed-off-by: Detlef Urban <onkel(a)paraair.de> --- sound/usb/Makefile | 1 + sound/usb/mixer_quirks.c | 5 + sound/usb/mixer_us16x08.c | 1425 +++++++++++++++++++++++++++++++++++++++++++++ sound/usb/mixer_us16x08.h | 122 ++++ 4 files changed, 1553 insertions(+) create mode 100644 sound/usb/mixer_us16x08.c create mode 100644 sound/usb/mixer_us16x08.h diff --git a/sound/usb/Makefile b/sound/usb/Makefile index 2d2d122..42cb33b 100644 --- a/sound/usb/Makefile +++ b/sound/usb/Makefile @@ -10,6 +10,7 @@ snd-usb-audio-objs := card.o \ mixer.o \ mixer_quirks.o \ mixer_scarlett.o \ + mixer_us16x08.o \ pcm.o \ proc.o \ quirks.o \ diff --git a/sound/usb/mixer_quirks.c b/sound/usb/mixer_quirks.c index 04991b0..4fa0053 100644 --- a/sound/usb/mixer_quirks.c +++ b/sound/usb/mixer_quirks.c @@ -43,6 +43,7 @@ #include "mixer.h" #include "mixer_quirks.h" #include "mixer_scarlett.h" +#include "mixer_us16x08.h" #include "helper.h" extern struct snd_kcontrol_new *snd_usb_feature_unit_ctl; @@ -1729,6 +1730,10 @@ int snd_usb_mixer_apply_create_quirk(struct usb_mixer_interface *mixer) return err; switch (mixer->chip->usb_id) { + /* Tascam US-16x08 */ + case USB_ID(0x0644, 0x8047): + err = snd_us16x08_controls_create(mixer); + break; case USB_ID(0x041e, 0x3020): case USB_ID(0x041e, 0x3040): case USB_ID(0x041e, 0x3042): diff --git a/sound/usb/mixer_us16x08.c b/sound/usb/mixer_us16x08.c new file mode 100644 index 0000000..0ee3f40 --- /dev/null +++ b/sound/usb/mixer_us16x08.c @@ -0,0 +1,1425 @@ +/* + * Tascam US-16x08 ALSA driver + * + * Copyright (c) 2016 by Detlef Urban (onkel(a)paraair.de) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <linux/slab.h> +#include <linux/usb.h> +#include <linux/usb/audio-v2.h> + +#include <sound/core.h> +#include <sound/control.h> + +#include "usbaudio.h" +#include "mixer.h" +#include "helper.h" + +#include "mixer_us16x08.h" + +/* USB control message templates */ +static char route_msg[] = { + 0x61, + 0x02, + 0x03, /* input from master (0x02) or input from computer bus (0x03) */ + 0x62, + 0x02, + 0x01, /* input index (0x01/0x02 eq. left/right) or bus (0x01-0x08) */ + 0x41, + 0x01, + 0x61, + 0x02, + 0x01, + 0x62, + 0x02, + 0x01, /* output index (0x01-0x08) */ + 0x42, + 0x01, + 0x43, + 0x01, + 0x00, + 0x00 +}; + +static char mix_init_msg1[] = { + 0x71, 0x01, 0x00, 0x00 +}; + +static char mix_init_msg2[] = { + 0x62, 0x02, 0x00, 0x61, 0x02, 0x04, 0xb1, 0x01, 0x00, 0x00 +}; + +static char mix_msg_in[] = { + /* default message head, equal to all mixers */ + 0x61, 0x02, 0x04, 0x62, 0x02, 0x01, + 0x81, /* 0x06: Controller ID */ + 0x02, /* 0x07: */ + 0x00, /* 0x08: Value of common mixer */ + 0x00, + 0x00 +}; + +static char mix_msg_out[] = { + /* default message head, equal to all mixers */ + 0x61, 0x02, 0x02, 0x62, 0x02, 0x01, + 0x81, /* 0x06: Controller ID */ + 0x02, /* 0x07: */ + 0x00, /* 0x08: Value of common mixer */ + 0x00, + 0x00 +}; + +static char bypass_msg_out[] = { + 0x45, + 0x02, + 0x01, /* on/off flag */ + 0x00, + 0x00 +}; + +static char bus_msg_out[] = { + 0x44, + 0x02, + 0x01, /* on/off flag */ + 0x00, + 0x00 +}; + +static char comp_msg[] = { + /* default message head, equal to all mixers */ + 0x61, 0x02, 0x04, 0x62, 0x02, 0x01, + 0x91, + 0x02, + 0xf0, /* 0x08: Threshold db (8) (e0 ... 00) (+-0dB -- -32dB) x-32 */ + 0x92, + 0x02, + 0x0a, /* 0x0b: Ratio (0a,0b,0d,0f,11,14,19,1e,23,28,32,3c,50,a0,ff) */ + 0x93, + 0x02, + 0x02, /* 0x0e: Attack (0x02 ... 0xc0) (2ms ... 200ms) */ + 0x94, + 0x02, + 0x01, /* 0x11: Release (0x01 ... 0x64) (10ms ... 1000ms) x*10 */ + 0x95, + 0x02, + 0x03, /* 0x14: gain (0 ... 20) (0dB .. 20dB) */ + 0x96, + 0x02, + 0x01, + 0x97, + 0x02, + 0x01, /* 0x1a: main Comp switch (0 ... 1) (off ... on)) */ + 0x00, + 0x00 +}; + +static char eqs_msq[] = { + /* default message head, equal to all mixers */ + 0x61, 0x02, 0x04, 0x62, 0x02, 0x01, + 0x51, /* 0x06: Controller ID */ + 0x02, + 0x04, /* 0x08: EQ set num (0x01..0x04) (LOW, LOWMID, HIGHMID, HIGH)) */ + 0x52, + 0x02, + 0x0c, /* 0x0b: value dB (0 ... 12) (-12db .. +12db) x-6 */ + 0x53, + 0x02, + 0x0f, /* 0x0e: value freq (32-47) (1.7kHz..18kHz) */ + 0x54, + 0x02, + 0x02, /* 0x11: band width (0-6) (Q16-Q0.25) 2^x/4 (EQ xxMID only) */ + 0x55, + 0x02, + 0x01, /* 0x14: main EQ switch (0 ... 1) (off ... on)) */ + 0x00, + 0x00 +}; + +/* compressor ratio map */ +static char ratio_map[] = { + 0x0a, 0x0b, 0x0d, 0x0f, 0x11, 0x14, 0x19, 0x1e, + 0x23, 0x28, 0x32, 0x3c, 0x50, 0xa0, 0xff +}; + +static int snd_us16x08_recv_urb(struct snd_usb_audio *chip, + unsigned char *buf, int size) +{ + + mutex_lock(&chip->mutex); + snd_usb_ctl_msg(chip->dev, + usb_rcvctrlpipe(chip->dev, 0), + SND_US16X08_URB_METER_REQUEST, + SND_US16X08_URB_METER_REQUESTTYPE, 0, 0, buf, size); + mutex_unlock(&chip->mutex); + return 0; +} + +/* wrapper function to send prepared URB buffer to usb device. Return an error + * code if something went wrong + */ +static int snd_us16x08_send_urb(struct snd_usb_audio *chip, char *buf, int size) +{ + int err = 0; + + if (chip) { + err = snd_usb_ctl_msg(chip->dev, usb_sndctrlpipe(chip->dev, 0), + SND_US16X08_URB_REQUEST, SND_US16X08_URB_REQUESTTYPE, + 0, 0, buf, size); + } + + return err; +} + +static int snd_us16x08_route_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->count = 1; + uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; + uinfo->value.integer.max = SND_US16X08_KCMAX(kcontrol); + uinfo->value.integer.min = SND_US16X08_KCMIN(kcontrol); + uinfo->value.integer.step = SND_US16X08_KCSTEP(kcontrol); + return 0; +} + +static int snd_us16x08_route_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + int index = ucontrol->id.index; + + /* route has no bias */ + ucontrol->value.integer.value[0] = elem->cache_val[index]; + + return 0; +} + +static int snd_us16x08_route_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + + int index = ucontrol->id.index; + char buf[sizeof(route_msg)]; + int val, val_org, err = 0; + + /* prepare the message buffer from template */ + memcpy(buf, route_msg, sizeof(route_msg)); + + /* get the new value (no bias for routes) */ + val = ucontrol->value.integer.value[0]; + if (val < 2) { + /* input comes from a master channel */ + val_org = val; + buf[2] = 0x02; + } else { + /* input comes from a computer channel */ + buf[2] = 0x03; + val_org = val - 2; + } + + /* place new route selection in URB message */ + buf[5] = (unsigned char) (val_org & 0x0f) + 1; + /* place route selector in URB message */ + buf[13] = index + 1; + + err = snd_us16x08_send_urb(chip, buf, sizeof(route_msg)); + + if (err > 0) { + elem->cached |= 1 << index; + elem->cache_val[index] = val; + } else { + usb_audio_err(chip, "Failed to set routing, err:%d\n", err); + } + + return err == 0 ? 1 : 0; +} + +static int snd_us16x08_master_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->count = 1; + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->value.integer.max = SND_US16X08_KCMAX(kcontrol); + uinfo->value.integer.min = SND_US16X08_KCMIN(kcontrol); + uinfo->value.integer.step = SND_US16X08_KCSTEP(kcontrol); + return 0; +} + +static int snd_us16x08_master_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + + int index = ucontrol->id.index; + + ucontrol->value.integer.value[0] = elem->cache_val[index]; + + return 0; +} + +static int snd_us16x08_master_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + char buf[sizeof(mix_msg_out)]; + int val, err = 0; + int index = ucontrol->id.index; + + /* prepare the message buffer from template */ + memcpy(buf, mix_msg_out, sizeof(mix_msg_out)); + + /* new control value incl. bias*/ + val = ucontrol->value.integer.value[0]; + + buf[8] = val - SND_US16X08_KCBIAS(kcontrol); + buf[6] = elem->head.id; + + /* place channel selector in URB message */ + buf[5] = index + 1; + err = snd_us16x08_send_urb(chip, buf, sizeof(mix_msg_out)); + + if (err > 0) { + elem->cached |= 1 << index; + elem->cache_val[index] = val; + } else { + usb_audio_err(chip, "Failed to set master, err:%d\n", err); + } + + return err == 0 ? 1 : 0; +} + +static int snd_us16x08_bus_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + + char buf[sizeof(mix_msg_out)]; + int val, err = 0; + + val = ucontrol->value.integer.value[0]; + + /* prepare the message buffer from template */ + switch (elem->head.id) { + case SND_US16X08_ID_BYPASS: + memcpy(buf, bypass_msg_out, sizeof(bypass_msg_out)); + buf[2] = val; + err = snd_us16x08_send_urb(chip, buf, sizeof(bypass_msg_out)); + break; + case SND_US16X08_ID_BUSS_OUT: + memcpy(buf, bus_msg_out, sizeof(bus_msg_out)); + buf[2] = val; + err = snd_us16x08_send_urb(chip, buf, sizeof(bus_msg_out)); + break; + case SND_US16X08_ID_MUTE: + memcpy(buf, mix_msg_out, sizeof(mix_msg_out)); + buf[8] = val; + buf[6] = elem->head.id; + buf[5] = 1; + err = snd_us16x08_send_urb(chip, buf, sizeof(mix_msg_out)); + break; + } + + if (err > 0) { + elem->cached |= 1; + elem->cache_val[0] = val; + } else { + usb_audio_err(chip, "Failed to set buss param, err:%d\n", err); + } + + return err == 0 ? 1 : 0; +} + +static int snd_us16x08_bus_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + + switch (elem->head.id) { + case SND_US16X08_ID_BUSS_OUT: + ucontrol->value.integer.value[0] = elem->cache_val[0]; + break; + case SND_US16X08_ID_BYPASS: + ucontrol->value.integer.value[0] = elem->cache_val[0]; + break; + case SND_US16X08_ID_MUTE: + ucontrol->value.integer.value[0] = elem->cache_val[0]; + break; + } + + return 0; +} + +/* gets a current mixer value from common store */ +static int snd_us16x08_channel_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + int index = ucontrol->id.index; + + ucontrol->value.integer.value[0] = elem->cache_val[index]; + + return 0; +} + +static int snd_us16x08_channel_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + char buf[sizeof(mix_msg_in)]; + int val, err; + int index = ucontrol->id.index; + + /* prepare URB message from template */ + memcpy(buf, mix_msg_in, sizeof(mix_msg_in)); + + val = ucontrol->value.integer.value[0]; + + /* add the bias to the new value */ + buf[8] = val - SND_US16X08_KCBIAS(kcontrol); + buf[6] = elem->head.id; + buf[5] = index + 1; + + err = snd_us16x08_send_urb(chip, buf, sizeof(mix_msg_in)); + + if (err > 0) { + elem->cached |= 1 << index; + elem->cache_val[index] = val; + } else { + usb_audio_err(chip, "Failed to set channel, err:%d\n", err); + } + + return err == 0 ? 1 : 0; +} + +static int snd_us16x08_mix_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->count = 1; + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->value.integer.max = SND_US16X08_KCMAX(kcontrol); + uinfo->value.integer.min = SND_US16X08_KCMIN(kcontrol); + uinfo->value.integer.step = SND_US16X08_KCSTEP(kcontrol); + return 0; +} + +static int snd_us16x08_comp_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_us16x08_comp_store *store = + ((struct snd_us16x08_comp_store *) elem->private_data); + int index = ucontrol->id.index; + int val_idx = COMP_STORE_IDX(elem->head.id); + + ucontrol->value.integer.value[0] = store->val[val_idx][index]; + + return 0; +} + +static int snd_us16x08_comp_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_comp_store *store = + ((struct snd_us16x08_comp_store *) elem->private_data); + int index = ucontrol->id.index; + + char buf[sizeof(comp_msg)]; + int val_idx, val; + int err = 0; + + /* prepare compressor URB message from template */ + memcpy(buf, comp_msg, sizeof(comp_msg)); + + /* new control value incl. bias*/ + val_idx = elem->head.id - SND_US16X08_ID_COMP_BASE; + + val = ucontrol->value.integer.value[0]; + store->val[val_idx][index] = ucontrol->value.integer.value[0]; + + /* place comp values in message buffer watch bias! */ + buf[8] = store->val[ + COMP_STORE_IDX(SND_US16X08_ID_COMP_THRESHOLD)][index] + - SND_US16X08_COMP_THRESHOLD_BIAS; + buf[11] = ratio_map[store->val[ + COMP_STORE_IDX(SND_US16X08_ID_COMP_RATIO)][index]]; + buf[14] = store->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_ATTACK)][index] + + SND_US16X08_COMP_ATTACK_BIAS; + buf[17] = store->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_RELEASE)][index] + + SND_US16X08_COMP_RELEASE_BIAS; + buf[20] = store->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_GAIN)][index]; + buf[26] = store->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_SWITCH)][index]; + + /* place channel selector in message buffer */ + buf[5] = index + 1; + + err = snd_us16x08_send_urb(chip, buf, sizeof(comp_msg)); + + if (err > 0) { + elem->cached |= 1 << index; + elem->cache_val[index] = val; + } else { + usb_audio_err(chip, "Failed to set compressor, err:%d\n", err); + } + + return 1; +} + +static int snd_us16x08_eqswitch_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int val = 0; + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_us16x08_eq_store *store = + ((struct snd_us16x08_eq_store *) elem->private_data); + int index = ucontrol->id.index; + + /* get low switch from cache is enough, cause all bands are together */ + val = store->val[EQ_STORE_BAND_IDX(elem->head.id)] + [EQ_STORE_PARAM_IDX(elem->head.id)][index]; + ucontrol->value.integer.value[0] = val; + + return 0; +} + +static int snd_us16x08_eqswitch_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_eq_store *store = + ((struct snd_us16x08_eq_store *) elem->private_data); + int index = ucontrol->id.index; + + char buf[sizeof(eqs_msq)]; + int val, err = 0; + int b_idx; + + /* new control value incl. bias*/ + val = ucontrol->value.integer.value[0] + SND_US16X08_KCBIAS(kcontrol); + + /* prepare URB message from EQ template */ + memcpy(buf, eqs_msq, sizeof(eqs_msq)); + + /* place channel index in URB message */ + buf[5] = index + 1; + for (b_idx = 0; b_idx < SND_US16X08_ID_EQ_BAND_COUNT; b_idx++) { + /* all four EQ bands have to be enabled/disabled in once */ + buf[20] = val; + buf[17] = store->val[b_idx][2][index]; + buf[14] = store->val[b_idx][1][index]; + buf[11] = store->val[b_idx][0][index]; + buf[8] = b_idx + 1; + err = snd_us16x08_send_urb(chip, buf, sizeof(eqs_msq)); + if (err < 0) + break; + store->val[b_idx][3][index] = val; + msleep(15); + } + + if (err > 0) { + elem->cached |= 1 << index; + elem->cache_val[index] = val; + } else { + usb_audio_err(chip, "Failed to set eq switch, err:%d\n", err); + } + + return 1; +} + +static int snd_us16x08_eq_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int val = 0; + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_us16x08_eq_store *store = + ((struct snd_us16x08_eq_store *) elem->private_data); + int index = ucontrol->id.index; + int b_idx = EQ_STORE_BAND_IDX(elem->head.id) - 1; + int p_idx = EQ_STORE_PARAM_IDX(elem->head.id); + + val = store->val[b_idx][p_idx][index]; + + ucontrol->value.integer.value[0] = val; + + return 0; +} + +static int snd_us16x08_eq_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_eq_store *store = + ((struct snd_us16x08_eq_store *) elem->private_data); + int index = ucontrol->id.index; + + char buf[sizeof(eqs_msq)]; + int val, err = 0; + int b_idx = EQ_STORE_BAND_IDX(elem->head.id) - 1; + int p_idx = EQ_STORE_PARAM_IDX(elem->head.id); + + /* copy URB buffer from EQ template */ + memcpy(buf, eqs_msq, sizeof(eqs_msq)); + + val = ucontrol->value.integer.value[0]; + + store->val[b_idx][p_idx][index] = val; + buf[20] = store->val[b_idx][3][index]; + buf[17] = store->val[b_idx][2][index]; + buf[14] = store->val[b_idx][1][index]; + buf[11] = store->val[b_idx][0][index]; + + /* place channel index in URB buffer */ + buf[5] = index + 1; + + /* place EQ band in URB buffer */ + buf[8] = b_idx + 1; + + err = snd_us16x08_send_urb(chip, buf, sizeof(eqs_msq)); + + if (err > 0) { + /* store new value in EQ band cache */ + elem->cached |= 1 << index; + elem->cache_val[index] = val; + } else { + usb_audio_err(chip, "Failed to set eq param, err:%d\n", err); + } + + return 1; +} + +static int snd_us16x08_meter_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->count = 1; + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->value.integer.max = 0x7FFF; + uinfo->value.integer.min = 0; + + return 0; +} + +/* calculate compressor index for reduction level request */ +static int snd_get_meter_comp_index(struct snd_us16x08_meter_store *store) +{ + int ret; + + /* any channel active */ + if (store->comp_active_index) { + /* check for stereo link */ + if (store->comp_active_index & 0x20) { + /* reset comp_index to left channel*/ + if (store->comp_index - + store->comp_active_index > 1) + store->comp_index = + store->comp_active_index; + + ret = store->comp_index++ & 0x1F; + } else { + /* no stereo link */ + ret = store->comp_active_index; + } + } else { + /* skip channels with no compressor active */ + while (!store->comp_store->val[ + COMP_STORE_IDX(SND_US16X08_ID_COMP_SWITCH)] + [store->comp_index - 1] + && store->comp_index <= SND_US16X08_MAX_CHANNELS) { + store->comp_index++; + } + ret = store->comp_index++; + if (store->comp_index > SND_US16X08_MAX_CHANNELS) + store->comp_index = 1; + } + return ret; +} + +/* retrieve the meter level values from URB message */ +static void get_meter_levels_from_urb(int s, + struct snd_us16x08_meter_store *store, + u8 *meter_urb) +{ + int val = MUC2(meter_urb, s) + (MUC3(meter_urb, s) << 8); + + if (MUA0(meter_urb, s) == 0x61 && MUA1(meter_urb, s) == 0x02 && + MUA2(meter_urb, s) == 0x04 && MUB0(meter_urb, s) == 0x62) { + if (MUC0(meter_urb, s) == 0x72) + store->meter_level[MUB2(meter_urb, s) - 1] = val; + if (MUC0(meter_urb, s) == 0xb2) + store->comp_level[MUB2(meter_urb, s) - 1] = val; + } + if (MUA0(meter_urb, s) == 0x61 && MUA1(meter_urb, s) == 0x02 && + MUA2(meter_urb, s) == 0x02 && MUB0(meter_urb, s) == 0x62) + store->master_level[MUB2(meter_urb, s) - 1] = val; +} + +/* Function to retrieve current meter values from the device. + * + * The device needs to be polled for meter values with an initial + * requests. It will return with a sequence of different meter value + * packages. The first request (case 0:) initiate this meter response sequence. + * After the third response, an additional request can be placed, + * to retrieve compressor reduction level value for given channel. This round + * trip channel selector will skip all inactive compressors. + * A mixer can interrupt this round-trip by selecting one ore two (stereo-link) + * specific channels. + */ +static int snd_us16x08_meter_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int i, set; + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_meter_store *store = elem->private_data; + u8 meter_urb[64]; + + + if (elem) { + store = (struct snd_us16x08_meter_store *) elem->private_data; + chip = elem->head.mixer->chip; + } else + return 0; + + switch (kcontrol->private_value) { + case 0: + snd_us16x08_send_urb(chip, mix_init_msg1, 4); + snd_us16x08_recv_urb(chip, meter_urb, + sizeof(meter_urb)); + kcontrol->private_value++; + break; + case 1: + snd_us16x08_recv_urb(chip, meter_urb, + sizeof(meter_urb)); + kcontrol->private_value++; + break; + case 2: + snd_us16x08_recv_urb(chip, meter_urb, + sizeof(meter_urb)); + kcontrol->private_value++; + break; + case 3: + mix_init_msg2[2] = snd_get_meter_comp_index(store); + snd_us16x08_send_urb(chip, mix_init_msg2, 10); + snd_us16x08_recv_urb(chip, meter_urb, + sizeof(meter_urb)); + kcontrol->private_value = 0; + break; + } + + for (set = 0; set < 6; set++) + get_meter_levels_from_urb(set, store, meter_urb); + + for (i = 0; i < SND_US16X08_MAX_CHANNELS; i++) { + ucontrol->value.integer.value[i] = + store ? store->meter_level[i] : 0; + } + + ucontrol->value.integer.value[i++] = store ? store->master_level[0] : 0; + ucontrol->value.integer.value[i++] = store ? store->master_level[1] : 0; + + for (i = 2; i < SND_US16X08_MAX_CHANNELS + 2; i++) + ucontrol->value.integer.value[i + SND_US16X08_MAX_CHANNELS] = + store ? store->comp_level[i - 2] : 0; + + return 1; +} + +static int snd_us16x08_meter_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_us16x08_meter_store *store = elem->private_data; + int val; + + val = ucontrol->value.integer.value[0]; + store->comp_active_index = val; + store->comp_index = val; + + return 1; +} + +static struct snd_kcontrol_new snd_us16x08_ch_boolean_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_switch_info, + .get = snd_us16x08_channel_get, + .put = snd_us16x08_channel_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 1) +}; + +static struct snd_kcontrol_new snd_us16x08_ch_int_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_channel_get, + .put = snd_us16x08_channel_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_FADER_BIAS, 1, 0, 133) +}; + +static struct snd_kcontrol_new snd_us16x08_master_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 1, + .info = snd_us16x08_master_info, + .get = snd_us16x08_master_get, + .put = snd_us16x08_master_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_FADER_BIAS, 1, 0, 133) +}; + +static struct snd_kcontrol_new snd_us16x08_route_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 8, + .info = snd_us16x08_route_info, + .get = snd_us16x08_route_get, + .put = snd_us16x08_route_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 9) +}; + +static struct snd_kcontrol_new snd_us16x08_bus_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 1, + .info = snd_us16x08_switch_info, + .get = snd_us16x08_bus_get, + .put = snd_us16x08_bus_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 1) +}; + +static struct snd_kcontrol_new snd_us16x08_compswitch_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_switch_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 1) +}; + +static struct snd_kcontrol_new snd_us16x08_comp_threshold_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_COMP_THRESHOLD_BIAS, 1, + 0, 0x20) +}; + +static struct snd_kcontrol_new snd_us16x08_comp_ratio_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, + sizeof(ratio_map) - 1), /*max*/ +}; + +static struct snd_kcontrol_new snd_us16x08_comp_gain_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 0x14) +}; + +static struct snd_kcontrol_new snd_us16x08_comp_attack_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = + SND_US16X08_KCSET(SND_US16X08_COMP_ATTACK_BIAS, 1, 0, 0xc6), +}; + +static struct snd_kcontrol_new snd_us16x08_comp_release_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = + SND_US16X08_KCSET(SND_US16X08_COMP_RELEASE_BIAS, 1, 0, 0x63), +}; + +static struct snd_kcontrol_new snd_us16x08_eq_gain_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 24), +}; + +static struct snd_kcontrol_new snd_us16x08_eq_low_freq_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 0x1F), +}; + +static struct snd_kcontrol_new snd_us16x08_eq_mid_freq_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 0x3F) +}; + +static struct snd_kcontrol_new snd_us16x08_eq_mid_width_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 0x06) +}; + +static struct snd_kcontrol_new snd_us16x08_eq_high_freq_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = + SND_US16X08_KCSET(SND_US16X08_EQ_HIGHFREQ_BIAS, 1, 0, 0x1F) +}; + +static struct snd_kcontrol_new snd_us16x08_eq_switch_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_switch_info, + .get = snd_us16x08_eqswitch_get, + .put = snd_us16x08_eqswitch_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 1) +}; + +static struct snd_kcontrol_new snd_us16x08_meter_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 1, + .info = snd_us16x08_meter_info, + .get = snd_us16x08_meter_get, + .put = snd_us16x08_meter_put +}; + +/* control store preparation */ + +/* setup compressor store and assign default value */ +static struct snd_us16x08_comp_store *snd_us16x08_create_comp_store(void) +{ + int i = 0; + struct snd_us16x08_comp_store *tmp = + kmalloc(sizeof(struct snd_us16x08_comp_store), GFP_KERNEL); + + if (tmp == NULL) + return NULL; + + for (i = 0; i < SND_US16X08_MAX_CHANNELS; i++) { + tmp->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_THRESHOLD)][i] + = 0x20; + tmp->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_RATIO)][i] = 0x00; + tmp->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_GAIN)][i] = 0x00; + tmp->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_SWITCH)][i] = 0x00; + tmp->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_ATTACK)][i] = 0x00; + tmp->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_RELEASE)][i] = 0x00; + } + return tmp; +} + +/* setup EQ store and assign default values */ +static struct snd_us16x08_eq_store *snd_us16x08_create_eq_store(void) +{ + int i, b_idx; + struct snd_us16x08_eq_store *tmp = + kmalloc(sizeof(struct snd_us16x08_eq_store), GFP_KERNEL); + + if (tmp == NULL) + return NULL; + + for (i = 0; i < SND_US16X08_MAX_CHANNELS; i++) { + for (b_idx = 0; b_idx < SND_US16X08_ID_EQ_BAND_COUNT; b_idx++) { + tmp->val[b_idx][0][i] = 0x0c; + tmp->val[b_idx][3][i] = 0x00; + switch (b_idx) { + case 0: /* EQ Low */ + tmp->val[b_idx][1][i] = 0x05; + tmp->val[b_idx][2][i] = 0xff; + break; + case 1: /* EQ Mid low */ + tmp->val[b_idx][1][i] = 0x0e; + tmp->val[b_idx][2][i] = 0x02; + break; + case 2: /* EQ Mid High */ + tmp->val[b_idx][1][i] = 0x1b; + tmp->val[b_idx][2][i] = 0x02; + break; + case 3: /* EQ High */ + tmp->val[b_idx][1][i] = 0x2f + - SND_US16X08_EQ_HIGHFREQ_BIAS; + tmp->val[b_idx][2][i] = 0xff; + break; + } + } + } + return tmp; +} + +struct snd_us16x08_meter_store *snd_us16x08_create_meter_store(void) +{ + struct snd_us16x08_meter_store *tmp = + kzalloc(sizeof(struct snd_us16x08_meter_store), GFP_KERNEL); + + if (!tmp) + return NULL; + tmp->comp_index = 1; + tmp->comp_active_index = 0; + return tmp; + +} + +static int add_new_ctl(struct usb_mixer_interface *mixer, + const struct snd_kcontrol_new *ncontrol, + int index, int val_type, int channels, + const char *name, const void *opt, + void (*freeer)(struct snd_kcontrol *kctl), + struct usb_mixer_elem_info **elem_ret) +{ + struct snd_kcontrol *kctl; + struct usb_mixer_elem_info *elem; + int err; + + usb_audio_dbg(mixer->chip, "us16x08 add mixer %s\n", name); + + elem = kzalloc(sizeof(*elem), GFP_KERNEL); + if (!elem) + return -ENOMEM; + + elem->head.mixer = mixer; + elem->head.resume = NULL; + elem->control = 0; + elem->idx_off = 0; + elem->head.id = index; + elem->val_type = val_type; + elem->channels = channels; + elem->private_data = (void *) opt; + + kctl = snd_ctl_new1(ncontrol, elem); + if (!kctl) { + kfree(elem); + return -ENOMEM; + } + + kctl->private_free = freeer; + + strlcpy(kctl->id.name, name, sizeof(kctl->id.name)); + + err = snd_usb_mixer_add_control(&elem->head, kctl); + if (err < 0) + return err; + + if (elem_ret) + *elem_ret = elem; + + return 0; +} + +static struct snd_us16x08_control_params control_params; + +/* table of EQ controls */ +static struct snd_us16x08_control_params eq_controls[] = { + { /* EQ switch */ + .kcontrol_new = &snd_us16x08_eq_switch_ctl, + .control_id = SND_US16X08_ID_EQENABLE, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "EQ enable", + .freeer = snd_usb_mixer_elem_free + }, + { /* EQ low gain */ + .kcontrol_new = &snd_us16x08_eq_gain_ctl, + .control_id = SND_US16X08_ID_EQLOWLEVEL, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Low gain", + .freeer = snd_usb_mixer_elem_free + }, + { /* EQ low freq */ + .kcontrol_new = &snd_us16x08_eq_low_freq_ctl, + .control_id = SND_US16X08_ID_EQLOWFREQ, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Low freq", + .freeer = NULL + }, + { /* EQ mid low gain */ + .kcontrol_new = &snd_us16x08_eq_gain_ctl, + .control_id = SND_US16X08_ID_EQLOWMIDLEVEL, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Mid low gain", + .freeer = snd_usb_mixer_elem_free + }, + { /* EQ mid low freq */ + .kcontrol_new = &snd_us16x08_eq_mid_freq_ctl, + .control_id = SND_US16X08_ID_EQLOWMIDFREQ, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Mid low freq", + .freeer = NULL + }, + { /* EQ mid low Q */ + .kcontrol_new = &snd_us16x08_eq_mid_width_ctl, + .control_id = SND_US16X08_ID_EQLOWMIDWIDTH, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Mid low Q", + .freeer = NULL + }, + { /* EQ mid high gain */ + .kcontrol_new = &snd_us16x08_eq_gain_ctl, + .control_id = SND_US16X08_ID_EQHIGHMIDLEVEL, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Mid high gain", + .freeer = snd_usb_mixer_elem_free + }, + { /* EQ mid high freq */ + .kcontrol_new = &snd_us16x08_eq_mid_freq_ctl, + .control_id = SND_US16X08_ID_EQHIGHMIDFREQ, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Mid high freq", + .freeer = NULL + }, + { /* EQ mid high Q */ + .kcontrol_new = &snd_us16x08_eq_mid_width_ctl, + .control_id = SND_US16X08_ID_EQHIGHMIDWIDTH, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Mid high Q", + .freeer = NULL + }, + { /* EQ high gain */ + .kcontrol_new = &snd_us16x08_eq_gain_ctl, + .control_id = SND_US16X08_ID_EQHIGHLEVEL, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "High gain", + .freeer = snd_usb_mixer_elem_free + }, + { /* EQ low freq */ + .kcontrol_new = &snd_us16x08_eq_high_freq_ctl, + .control_id = SND_US16X08_ID_EQHIGHFREQ, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "High freq", + .freeer = NULL + }, +}; + +/* table of compressor controls */ +static struct snd_us16x08_control_params comp_controls[] = { + { /* Comp enable */ + .kcontrol_new = &snd_us16x08_compswitch_ctl, + .control_id = SND_US16X08_ID_COMP_SWITCH, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "Comp enable", + .freeer = snd_usb_mixer_elem_free + }, + { /* Comp threshold */ + .kcontrol_new = &snd_us16x08_comp_threshold_ctl, + .control_id = SND_US16X08_ID_COMP_THRESHOLD, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Threshold", + .freeer = NULL + }, + { /* Comp ratio */ + .kcontrol_new = &snd_us16x08_comp_ratio_ctl, + .control_id = SND_US16X08_ID_COMP_RATIO, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Ratio", + .freeer = NULL + }, + { /* Comp attack */ + .kcontrol_new = &snd_us16x08_comp_attack_ctl, + .control_id = SND_US16X08_ID_COMP_ATTACK, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Attack", + .freeer = NULL + }, + { /* Comp release */ + .kcontrol_new = &snd_us16x08_comp_release_ctl, + .control_id = SND_US16X08_ID_COMP_RELEASE, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Release", + .freeer = NULL + }, + { /* Comp gain */ + .kcontrol_new = &snd_us16x08_comp_gain_ctl, + .control_id = SND_US16X08_ID_COMP_GAIN, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Gain", + .freeer = NULL + }, +}; + +/* table of channel controls */ +static struct snd_us16x08_control_params channel_controls[] = { + { /* Phase */ + .kcontrol_new = &snd_us16x08_ch_boolean_ctl, + .control_id = SND_US16X08_ID_PHASE, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "Phase", + .freeer = snd_usb_mixer_elem_free, + .default_val = 0 + }, + { /* Fader */ + .kcontrol_new = &snd_us16x08_ch_int_ctl, + .control_id = SND_US16X08_ID_FADER, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Fader", + .freeer = NULL, + .default_val = 127 + }, + { /* Mute */ + .kcontrol_new = &snd_us16x08_ch_boolean_ctl, + .control_id = SND_US16X08_ID_MUTE, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "Mute", + .freeer = NULL, + .default_val = 0 + }, + { /* Pan */ + .kcontrol_new = &snd_us16x08_ch_int_ctl, + .control_id = SND_US16X08_ID_PAN, + .type = USB_MIXER_U16, + .num_channels = 16, + .name = "Pan", + .freeer = NULL, + .default_val = 127 + }, +}; + +/* table of master controls */ +static struct snd_us16x08_control_params master_controls[] = { + { /* Master */ + .kcontrol_new = &snd_us16x08_master_ctl, + .control_id = SND_US16X08_ID_FADER, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Master", + .freeer = NULL, + .default_val = 127 + }, + { /* Bypass */ + .kcontrol_new = &snd_us16x08_bus_ctl, + .control_id = SND_US16X08_ID_BYPASS, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "Bypass", + .freeer = NULL, + .default_val = 0 + }, + { /* Buss out */ + .kcontrol_new = &snd_us16x08_bus_ctl, + .control_id = SND_US16X08_ID_BUSS_OUT, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "Buss out", + .freeer = NULL, + .default_val = 0 + }, + { /* Master mute */ + .kcontrol_new = &snd_us16x08_bus_ctl, + .control_id = SND_US16X08_ID_MUTE, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "Master mute", + .freeer = NULL, + .default_val = 0 + }, + +}; + +int snd_us16x08_controls_create(struct usb_mixer_interface *mixer) +{ + int i, j; + int err; + struct usb_mixer_elem_info *elem; + struct snd_us16x08_comp_store *comp_store; + struct snd_us16x08_meter_store *meter_store; + struct snd_us16x08_eq_store *eq_store; + + /* just check for non-MIDI interface */ + if (mixer->hostif->desc.bInterfaceNumber == 3) { + + /* create compressor mixer elements */ + comp_store = snd_us16x08_create_comp_store(); + if (comp_store == NULL) + return -ENOMEM; + + /* create eq store */ + eq_store = snd_us16x08_create_eq_store(); + if (eq_store == NULL) { + kfree(comp_store); + return -ENOMEM; + } + + /* create meters store */ + meter_store = snd_us16x08_create_meter_store(); + if (meter_store == NULL) { + kfree(comp_store); + kfree(eq_store); + return -ENOMEM; + } + + /* add routing control */ + err = add_new_ctl(mixer, &snd_us16x08_route_ctl, + SND_US16X08_ID_ROUTE, USB_MIXER_U8, 8, "Route", + NULL, NULL, &elem); + if (err < 0) { + usb_audio_err(mixer->chip, + "Failed to create route control, err:%d\n", + err); + return err; + } + for (i = 0; i < 8; i++) + elem->cache_val[i] = i < 2 ? i : i + 2; + elem->cached = 0xff; + + /* add master controls */ + for (i = 0; + i < sizeof(master_controls) + / sizeof(control_params); + i++) { + + err = add_new_ctl(mixer, + master_controls[i].kcontrol_new, + master_controls[i].control_id, + master_controls[i].type, + master_controls[i].num_channels, + master_controls[i].name, + comp_store, + master_controls[i].freeer, &elem); + if (err < 0) + return err; + elem->cache_val[0] = master_controls[i].default_val; + elem->cached = 1; + } + + /* add channel controls */ + for (i = 0; + i < sizeof(channel_controls) + / sizeof(control_params); + i++) { + + err = add_new_ctl(mixer, + channel_controls[i].kcontrol_new, + channel_controls[i].control_id, + channel_controls[i].type, + channel_controls[i].num_channels, + channel_controls[i].name, + comp_store, + channel_controls[i].freeer, &elem); + if (err < 0) + return err; + for (j = 0; j < SND_US16X08_MAX_CHANNELS; j++) { + elem->cache_val[j] = + channel_controls[i].default_val; + } + elem->cached = 0xffff; + } + + /* add EQ controls */ + for (i = 0; i < sizeof(eq_controls) / + sizeof(control_params); i++) { + + err = add_new_ctl(mixer, + eq_controls[i].kcontrol_new, + eq_controls[i].control_id, + eq_controls[i].type, + eq_controls[i].num_channels, + eq_controls[i].name, + eq_store, + eq_controls[i].freeer, NULL); + if (err < 0) + return err; + } + + /* add compressor controls */ + for (i = 0; + i < sizeof(comp_controls) + / sizeof(control_params); + i++) { + + err = add_new_ctl(mixer, + comp_controls[i].kcontrol_new, + comp_controls[i].control_id, + comp_controls[i].type, + comp_controls[i].num_channels, + comp_controls[i].name, + comp_store, + comp_controls[i].freeer, NULL); + if (err < 0) + return err; + } + + /* meter function 'get' must access to compressor store + * so place a reference here + */ + meter_store->comp_store = comp_store; + err = add_new_ctl(mixer, &snd_us16x08_meter_ctl, + SND_US16X08_ID_METER, USB_MIXER_U16, 0, "Meter", + (void *) meter_store, snd_usb_mixer_elem_free, NULL); + if (err < 0) + return err; + } + + return 0; +} diff --git a/sound/usb/mixer_us16x08.h b/sound/usb/mixer_us16x08.h new file mode 100644 index 0000000..64f89b5 --- /dev/null +++ b/sound/usb/mixer_us16x08.h @@ -0,0 +1,122 @@ +#ifndef __USB_MIXER_US16X08_H +#define __USB_MIXER_US16X08_H + +#define SND_US16X08_MAX_CHANNELS 16 + +/* define some bias, cause some alsa-mixers wont work with + * negative ranges or if mixer-min != 0 + */ +#define SND_US16X08_NO_BIAS 0 +#define SND_US16X08_FADER_BIAS 127 +#define SND_US16X08_EQ_HIGHFREQ_BIAS 0x20 +#define SND_US16X08_COMP_THRESHOLD_BIAS 0x20 +#define SND_US16X08_COMP_ATTACK_BIAS 2 +#define SND_US16X08_COMP_RELEASE_BIAS 1 + +/* get macro for components of kcontrol private_value */ +#define SND_US16X08_KCBIAS(x) (((x)->private_value >> 24) & 0xff) +#define SND_US16X08_KCSTEP(x) (((x)->private_value >> 16) & 0xff) +#define SND_US16X08_KCMIN(x) (((x)->private_value >> 8) & 0xff) +#define SND_US16X08_KCMAX(x) (((x)->private_value >> 0) & 0xff) +/* set macro for kcontrol private_value */ +#define SND_US16X08_KCSET(bias, step, min, max) \ + (((bias) << 24) | ((step) << 16) | ((min) << 8) | (max)) + +/* the URB request/type to control Tascam mixers */ +#define SND_US16X08_URB_REQUEST 0x1D +#define SND_US16X08_URB_REQUESTTYPE 0x40 + +/* the URB params to retrieve meter ranges */ +#define SND_US16X08_URB_METER_REQUEST 0x1e +#define SND_US16X08_URB_METER_REQUESTTYPE 0xc0 + +#define MUA0(x, y) ((x)[(y) * 10 + 4]) +#define MUA1(x, y) ((x)[(y) * 10 + 5]) +#define MUA2(x, y) ((x)[(y) * 10 + 6]) +#define MUB0(x, y) ((x)[(y) * 10 + 7]) +#define MUB1(x, y) ((x)[(y) * 10 + 8]) +#define MUB2(x, y) ((x)[(y) * 10 + 9]) +#define MUC0(x, y) ((x)[(y) * 10 + 10]) +#define MUC1(x, y) ((x)[(y) * 10 + 11]) +#define MUC2(x, y) ((x)[(y) * 10 + 12]) +#define MUC3(x, y) ((x)[(y) * 10 + 13]) + +/* Common Channel control IDs */ +#define SND_US16X08_ID_BYPASS 0x45 +#define SND_US16X08_ID_BUSS_OUT 0x44 +#define SND_US16X08_ID_PHASE 0x85 +#define SND_US16X08_ID_MUTE 0x83 +#define SND_US16X08_ID_FADER 0x81 +#define SND_US16X08_ID_PAN 0x82 +#define SND_US16X08_ID_METER 0xB1 + +#define SND_US16X08_ID_EQ_BAND_COUNT 4 +#define SND_US16X08_ID_EQ_PARAM_COUNT 4 + +/* EQ level IDs */ +#define SND_US16X08_ID_EQLOWLEVEL 0x01 +#define SND_US16X08_ID_EQLOWMIDLEVEL 0x02 +#define SND_US16X08_ID_EQHIGHMIDLEVEL 0x03 +#define SND_US16X08_ID_EQHIGHLEVEL 0x04 + +/* EQ frequence IDs */ +#define SND_US16X08_ID_EQLOWFREQ 0x11 +#define SND_US16X08_ID_EQLOWMIDFREQ 0x12 +#define SND_US16X08_ID_EQHIGHMIDFREQ 0x13 +#define SND_US16X08_ID_EQHIGHFREQ 0x14 + +/* EQ width IDs */ +#define SND_US16X08_ID_EQLOWMIDWIDTH 0x22 +#define SND_US16X08_ID_EQHIGHMIDWIDTH 0x23 + +#define SND_US16X08_ID_EQENABLE 0x30 + +#define EQ_STORE_BAND_IDX(x) ((x) & 0xf) +#define EQ_STORE_PARAM_IDX(x) (((x) & 0xf0) >> 4) + +#define SND_US16X08_ID_ROUTE 0x00 + +/* Compressor Ids */ +#define SND_US16X08_ID_COMP_BASE 0x32 +#define SND_US16X08_ID_COMP_THRESHOLD SND_US16X08_ID_COMP_BASE +#define SND_US16X08_ID_COMP_RATIO (SND_US16X08_ID_COMP_BASE + 1) +#define SND_US16X08_ID_COMP_ATTACK (SND_US16X08_ID_COMP_BASE + 2) +#define SND_US16X08_ID_COMP_RELEASE (SND_US16X08_ID_COMP_BASE + 3) +#define SND_US16X08_ID_COMP_GAIN (SND_US16X08_ID_COMP_BASE + 4) +#define SND_US16X08_ID_COMP_SWITCH (SND_US16X08_ID_COMP_BASE + 5) +#define SND_US16X08_ID_COMP_COUNT 6 + +#define COMP_STORE_IDX(x) ((x) - SND_US16X08_ID_COMP_BASE) + +struct snd_us16x08_eq_store { + u8 val[SND_US16X08_ID_EQ_BAND_COUNT][SND_US16X08_ID_EQ_PARAM_COUNT] + [SND_US16X08_MAX_CHANNELS]; +}; + +struct snd_us16x08_comp_store { + u8 val[SND_US16X08_ID_COMP_COUNT][SND_US16X08_MAX_CHANNELS]; +}; + +struct snd_us16x08_meter_store { + int meter_level[SND_US16X08_MAX_CHANNELS]; + int master_level[2]; /* level of meter for master output */ + int comp_index; /* round trip channel selector */ + int comp_active_index; /* channel select from user space mixer */ + int comp_level[16]; /* compressor reduction level */ + struct snd_us16x08_comp_store *comp_store; +}; + +struct snd_us16x08_control_params { + struct snd_kcontrol_new *kcontrol_new; + int control_id; + int type; + int num_channels; + const char *name; + void (*freeer)(struct snd_kcontrol *kctl); + int default_val; +}; + +#define snd_us16x08_switch_info snd_ctl_boolean_mono_info + +int snd_us16x08_controls_create(struct usb_mixer_interface *mixer); +#endif /* __USB_MIXER_US16X08_H */ -- 2.7.4

1 0

[alsa-devel] [PATCH v7 0/4] DMA Engine: switch PL330 driver to non-irq-safe runtime PM
by Marek Szyprowski 09 Feb '17

09 Feb '17

Hello, This patchset changes the way the runtime PM is implemented in the PL330 DMA engine driver. The main goal of such change is to add support for the audio power domain to Exynos5 SoCs (5250, 542x, 5433, probably others) and let it to be properly turned off, when no audio is being used. Switching to non-irq-safe runtime PM is required to properly let power domain to be turned off (irq-safe runtime PM keeps power domain turned on all the time) and to integrate with clock controller's runtime PM (this cannot be workarounded any other way, PL330 uses clocks from the controller, which belongs to the same power domain). For more details of the proposed change to the PL330 driver see patch #4. Audio power domain on Exynos5 SoCs contains following hardware modules: 1. clock controller 2. pin controller 3. PL330 DMA controller 4. I2S audio controller Patches for adding or fixing runtime PM for each of the above devices is handled separately. Runtime PM patches for clock controllers is possible and has been proposed in the following thread (pending review): "[PATCH v4 0/4] Add runtime PM support for clocks (on Exynos SoC example)", http://www.spinics.net/lists/arm-kernel/msg550747.html Runtime PM support for Exynos pin controller has been posted in the following thread: "[PATCH 0/9] Runtime PM for Exynos pin controller driver", http://www.spinics.net/lists/arm-kernel/msg550161.html Exynos I2S driver supports runtime PM, but some fixes were needed for it and they are already queued to linux-next. This patchset is based on linux-next from 25th January 2017 with "dmaengine: pl330: fix double lock" patch applied. Best regards Marek Szyprowski Samsung R&D Institute Poland Changelog: v7: - added missing of_dma_request_slave_channel API change to sound/soc/sh/rcar driver - extended commit message with information about drawbacks of irq-safe runtime pm - added Ulf's reviewed-by tags v6: https://www.spinics.net/lists/arm-kernel/msg557377.html - fixed pl330 system sleep suspend/resume callbacks, previous implementation incorrectly tried to unprepare clocks unconditionally - after a fix pl330 suspend/resume callbacks can be simply replaced by generic pm_runtime_force_{suspend,resume} helpers, what simplifies code even more v5: https://www.spinics.net/lists/arm-kernel/msg555001.html - added Acks - additional mutex is indeed not needed, rely on dma_list_mutex in dmaengine core, added comment about locking v4: http://www.spinics.net/lists/dmaengine/msg12329.html - rebased onto "dmaengine: pl330: fix double lock" patch: http://www.spinics.net/lists/dmaengine/msg12289.html - added a mutex to protect runtime PM links creation/removal to avoid races - moved mem2mem channel case handing to pl330_{add,del}_slave_pm_link functions to simplify code and error paths v3: http://www.spinics.net/lists/dmaengine/msg12245.html - removed pl330_filter function as suggested by Arnd Bergmann - removed pl330.h from arch/arm/plat-samsung/devs.c - fixes some minor style issues pointed by Krzysztof Kozlowski v2: https://www.spinics.net/lists/arm-kernel/msg552772.html - rebased onto linux next-20170109 - improved patch description - separated patch #3 from #4 (storing a pointer to slave device for each DMA channel) as requested by Krzysztof Kozlowski v1: https://www.spinics.net/lists/arm-kernel/msg550008.html - initial version Patch summary: Marek Szyprowski (4): dmaengine: pl330: remove pdata based initialization dmaengine: Forward slave device pointer to of_xlate callback dmaengine: pl330: Store pointer to slave device dmaengine: pl330: Don't require irq-safe runtime PM arch/arm/plat-samsung/devs.c | 1 - drivers/dma/amba-pl08x.c | 2 +- drivers/dma/at_hdmac.c | 4 +- drivers/dma/at_xdmac.c | 2 +- drivers/dma/bcm2835-dma.c | 2 +- drivers/dma/coh901318.c | 2 +- drivers/dma/cppi41.c | 2 +- drivers/dma/dma-jz4780.c | 2 +- drivers/dma/dmaengine.c | 2 +- drivers/dma/dw/platform.c | 2 +- drivers/dma/edma.c | 4 +- drivers/dma/fsl-edma.c | 2 +- drivers/dma/img-mdc-dma.c | 2 +- drivers/dma/imx-dma.c | 2 +- drivers/dma/imx-sdma.c | 2 +- drivers/dma/k3dma.c | 2 +- drivers/dma/lpc18xx-dmamux.c | 2 +- drivers/dma/mmp_pdma.c | 2 +- drivers/dma/mmp_tdma.c | 2 +- drivers/dma/moxart-dma.c | 2 +- drivers/dma/mxs-dma.c | 2 +- drivers/dma/nbpfaxi.c | 2 +- drivers/dma/of-dma.c | 19 ++-- drivers/dma/pl330.c | 220 ++++++++++++++++------------------------ drivers/dma/pxa_dma.c | 2 +- drivers/dma/qcom/bam_dma.c | 2 +- drivers/dma/sh/rcar-dmac.c | 2 +- drivers/dma/sh/shdma-of.c | 2 +- drivers/dma/sh/usb-dmac.c | 2 +- drivers/dma/sirf-dma.c | 2 +- drivers/dma/st_fdma.c | 2 +- drivers/dma/ste_dma40.c | 2 +- drivers/dma/stm32-dma.c | 2 +- drivers/dma/sun4i-dma.c | 2 +- drivers/dma/sun6i-dma.c | 2 +- drivers/dma/tegra20-apb-dma.c | 2 +- drivers/dma/tegra210-adma.c | 2 +- drivers/dma/xilinx/xilinx_dma.c | 2 +- drivers/dma/xilinx/zynqmp_dma.c | 2 +- drivers/dma/zx_dma.c | 2 +- include/linux/amba/pl330.h | 35 ------- include/linux/of_dma.h | 19 ++-- sound/soc/sh/rcar/dma.c | 5 +- sound/soc/sh/rcar/dvc.c | 3 +- sound/soc/sh/rcar/rsnd.h | 3 +- sound/soc/sh/rcar/src.c | 3 +- sound/soc/sh/rcar/ssi.c | 3 +- 47 files changed, 158 insertions(+), 231 deletions(-) delete mode 100644 include/linux/amba/pl330.h -- 1.9.1

4 13

[alsa-devel] [PATCH] ALSA: hda - adding a new NV HDMI/DP codec ID in the driver
by Hui Wang 09 Feb '17

09 Feb '17

Without this change, the HDMI/DP codec will be recognised as a generic codec, and there is no sound when playing through this codec. As suggested by NVidia side, after adding the new ID in the driver, the sound playing works well. Cc: <stable(a)vger.kernel.org> Signed-off-by: Hui Wang <hui.wang(a)canonical.com> --- sound/pci/hda/patch_hdmi.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/pci/hda/patch_hdmi.c b/sound/pci/hda/patch_hdmi.c index 32105ce..fd5efa7 100644 --- a/sound/pci/hda/patch_hdmi.c +++ b/sound/pci/hda/patch_hdmi.c @@ -3780,6 +3780,7 @@ static int patch_via_hdmi(struct hda_codec *codec) HDA_CODEC_ENTRY(0x10de0071, "GPU 71 HDMI/DP", patch_nvhdmi), HDA_CODEC_ENTRY(0x10de0072, "GPU 72 HDMI/DP", patch_nvhdmi), HDA_CODEC_ENTRY(0x10de007d, "GPU 7d HDMI/DP", patch_nvhdmi), +HDA_CODEC_ENTRY(0x10de0080, "GPU 80 HDMI/DP", patch_nvhdmi), HDA_CODEC_ENTRY(0x10de0082, "GPU 82 HDMI/DP", patch_nvhdmi), HDA_CODEC_ENTRY(0x10de0083, "GPU 83 HDMI/DP", patch_nvhdmi), HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI", patch_nvhdmi_2ch), -- 1.9.1

2 1

[alsa-devel] [PATCH v1 1/4] ASoC: Intel: common: Replace custom implementation of readq / writeq
by Andy Shevchenko 09 Feb '17

09 Feb '17

The readq() and writeq() helpers are available in the linux/io-64-nonatomic-hi-lo.h and linux/io-64-nonatomic-lo-hi.h headers. Replace custom implementation by the generic helpers. Signed-off-by: Andy Shevchenko <andriy.shevchenko(a)linux.intel.com> --- sound/soc/intel/common/sst-dsp.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/sound/soc/intel/common/sst-dsp.c b/sound/soc/intel/common/sst-dsp.c index 11c0805393ff..748f1f5c02df 100644 --- a/sound/soc/intel/common/sst-dsp.c +++ b/sound/soc/intel/common/sst-dsp.c @@ -22,6 +22,8 @@ #include <linux/io.h> #include <linux/delay.h> +#include <linux/io-64-nonatomic-lo-hi.h> + #include "sst-dsp.h" #include "sst-dsp-priv.h" @@ -43,16 +45,13 @@ EXPORT_SYMBOL_GPL(sst_shim32_read); void sst_shim32_write64(void __iomem *addr, u32 offset, u64 value) { - memcpy_toio(addr + offset, &value, sizeof(value)); + lo_hi_writeq(value, addr + offset); } EXPORT_SYMBOL_GPL(sst_shim32_write64); u64 sst_shim32_read64(void __iomem *addr, u32 offset) { - u64 val; - - memcpy_fromio(&val, addr + offset, sizeof(val)); - return val; + return lo_hi_readq(addr + offset); } EXPORT_SYMBOL_GPL(sst_shim32_read64); -- 2.11.0

3 7

[alsa-devel] [PATCH v1 1/3] clk: zte: add i2s clocks for zx296718
by Baoyou Xie 09 Feb '17

09 Feb '17

The i2s related clock support is missing from the existing zx296718 clock driver. This patch adds it, so that the upstream ZX I2S driver can work out. Signed-off-by: Baoyou Xie <baoyou.xie(a)linaro.org> --- drivers/clk/zte/clk-zx296718.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/clk/zte/clk-zx296718.c b/drivers/clk/zte/clk-zx296718.c index ad5d1df..f106d40 100644 --- a/drivers/clk/zte/clk-zx296718.c +++ b/drivers/clk/zte/clk-zx296718.c @@ -941,6 +941,10 @@ static struct zx_clk_gate audio_gate_clk[] = { GATE(AUDIO_SPDIF1_WCLK, "spdif1_wclk", "spdif1_wclk_div", AUDIO_SPDIF1_CLK, 9, CLK_SET_RATE_PARENT, 0), GATE(AUDIO_TDM_WCLK, "tdm_wclk", "tdm_wclk_div", AUDIO_TDM_CLK, 17, CLK_SET_RATE_PARENT, 0), GATE(AUDIO_TS_PCLK, "tempsensor_pclk", "clk49m5", AUDIO_TS_CLK, 1, 0, 0), + GATE(AUDIO_I2S0_PCLK, "i2s0_pclk", "clk49m5", AUDIO_I2S0_CLK, 8, 0, 0), + GATE(AUDIO_I2S1_PCLK, "i2s1_pclk", "clk49m5", AUDIO_I2S1_CLK, 8, 0, 0), + GATE(AUDIO_I2S2_PCLK, "i2s2_pclk", "clk49m5", AUDIO_I2S2_CLK, 8, 0, 0), + GATE(AUDIO_I2S3_PCLK, "i2s3_pclk", "clk49m5", AUDIO_I2S3_CLK, 8, 0, 0), }; static struct clk_hw_onecell_data audio_hw_onecell_data = { -- 2.7.4

3 5

[alsa-devel] [PATCH v4 0/5] ASoC: hdmi: Preparatory work to support MST audio
by jeeja.kp＠intel.com 08 Feb '17

08 Feb '17

From: Jeeja KP <jeeja.kp(a)intel.com> Display port 1.2 introduces new capability Multi-stream transport (MST) which will allow multiple stream to route to single display port where multiple monitors are connected. Multiple monitors will be connected by a MST Hub or a monitor capable of daisy-chaining. With MST support, a pin can support multiple ports and on each port a monitor can be connected. This is preparatory patch series to enable DP MST Audio by extending the current design from pin to port. o i915 acomp APIs are now used to read the ELD info and support is extended for MST port as well. o Configure port/pin/audio infoframe in widget event handlers for dynamic routing when monitor is connected/disconnected instead of DAI ops. o Use set_tdm slot to set the stream tag instead of dai params and store it in pcm context and use this in configuring the converter in widget event handler. o With MST, pin mux for CVT selection will be used to select CVT for pin-port instead of pin. So create the pin mux accordingly and update the route in skl/bxt machines. o add channel map support in bxtn machines. Note: o This changes require UCM conf modification, once this series is accepted, I will post the UCM change. o This series depends on DRM changes to enable MST and changes are already merged in 4.10-rc1 branch. Changes v2: Split the patchs to smaller series. Changes v3: o rebased on latest branch o Removed already merged patch. Changes v4: o rebased on latest branch o Removed already merged patch. Jeeja KP (5): ASoC: hdac_hdmi: Begin to add support for DP Multi-stream audio ASoC: Intel: Skylake: Add route change to nau88l25_max98357a machine ASoC: Intel: Skylake: Add route change to nau88l25_ssm4567 machine ASoC: Intel: bxt: Add route change to rt298 machine ASoC: hdac_hdmi: Add support to handle MST capable pin sound/soc/codecs/hdac_hdmi.c | 416 +++++++++++++++--------- sound/soc/intel/boards/bxt_rt298.c | 6 +- sound/soc/intel/boards/skl_nau88l25_max98357a.c | 8 +- sound/soc/intel/boards/skl_nau88l25_ssm4567.c | 9 +- 4 files changed, 274 insertions(+), 165 deletions(-) -- 2.5.0

2 6

[alsa-devel] [RFC 00/16] ASoC: hdac_hdmi: Add Support to Enable MST Audio
by jeeja.kp＠intel.com 08 Feb '17

08 Feb '17

From: Jeeja KP <jeeja.kp(a)intel.com> Display port 1.2 introduces new capability Multi-stream transport (MST) which will allow multiple stream to route to single display port where multiple monitors are connected. Multiple monitors will be connected by a MST Hub or a monitor capable of daisy-chaining. With MST support, a pin can support multiple ports and on each port a monitor can be connected. This patch series enables DP MST Audio by extending the current design from pin to port. 1. With MST, Pin mux for CVT selection will be used to select CVT for Pin-port instead of Pin. So create the pin muxes accordingly. 2. Pin is marked as MST capable when connect event reports pipe as valid. if pipe is -1, then pin is not MST capable and default to port 0. if pipe is valid, then pin is MST capable and port = pipe. 3. For MST capable pin, select the device entry before configuring the pin widget verbs controlling the sink device operations. 4. Add support to handle multiple Port mapped to same converter by enabling all the ports and configuring the port when stream is prepared. 5. i915 acomp APIs are now used to read the ELD info and support is extended for MST port as well Notes: 1. When Mutiple ports are mapped to same PCM, currenlty stream constrains will applied based on first port mapped. Jeeja KP (15): ASoC: hdac_hdmi: Begin to add support for DP Multi-stream Audio ASoC: Intel: Skylake: Add route change to rt286 machine ASoC: Intel: Skylake: Add route change to nau88l25_max98357a machine ASoC: Intel: Skylake: Add route change to nau88l25_ssm4567 machine ASoC: Intel: Skylake: Add route change to rt298 machine ASoC: Intel: Skylake: Add route change to da7219_max98357a machine ASoC: hdac_hdmi: Add support to handle MST capable pin ASoC: hdac_hdmi: Add MST verb support ASoc: hdac_hdmi: Configure pin verbs for MST ASoC: hdac_hdmi: Add support to handle Multiple Port to same PCM ASoC: Intel: Skylake: To support MST, add HDMI routes rt286 machine ASoC: Intel: Skylake: To support MST, add HDMI routes nau_max machine ASoC: Intel: Skylake: To support MST, add HDMI routes nau_ssm machine ASoC: Intel: Skylake: To support MST, add HDMI routes rt298 machine ASoC: Intel: Skylake: To support MST, add HDMI routes da7219_max machine Sandeep Tayal (1): ASoC: hdac_hdmi: use audio component framework to read ELD sound/soc/codecs/hdac_hdmi.c | 919 ++++++++++++++---------- sound/soc/intel/boards/bxt_da7219_max98357a.c | 10 +- sound/soc/intel/boards/bxt_rt298.c | 11 +- sound/soc/intel/boards/skl_nau88l25_max98357a.c | 12 +- sound/soc/intel/boards/skl_nau88l25_ssm4567.c | 13 +- sound/soc/intel/boards/skl_rt286.c | 10 +- 6 files changed, 597 insertions(+), 378 deletions(-) -- 2.5.0

2 22

[alsa-devel] [PATCH v3 00/12] ASoC: hdmi: Preparatory work to support MST audio
by jeeja.kp＠intel.com 08 Feb '17

08 Feb '17

From: Jeeja KP <jeeja.kp(a)intel.com> Display port 1.2 introduces new capability Multi-stream transport (MST) which will allow multiple stream to route to single display port where multiple monitors are connected. Multiple monitors will be connected by a MST Hub or a monitor capable of daisy-chaining. With MST support, a pin can support multiple ports and on each port a monitor can be connected. This is preparatory patch series to enable DP MST Audio by extending the current design from pin to port. o i915 acomp APIs are now used to read the ELD info and support is extended for MST port as well. o Configure port/pin/audio infoframe in widget event handlers for dynamic routing when monitor is connected/disconnected instead of DAI ops. o Use set_tdm slot to set the stream tag instead of dai params and store it in pcm context and use this in configuring the converter in widget event handler. o With MST, pin mux for CVT selection will be used to select CVT for pin-port instead of pin. So create the pin mux accordingly and update the route in skl/bxt machines. o add channel map support in bxtn machines. Note: o This patch series has dependency on the series "ASoC: Intel: Skylake: Driver updates". o This changes require UCM conf modification, once this series is accepted, I will post the UCM change. o This series depends on DRM changes to enable MST and changes are already merged in 4.10-rc1 branch. Changes v2: Split the patchs to smaller series. Changes v3: o rebased on latest branch o Removed already merged patch. Jeeja KP (12): ASoC: hdac_hdmi: Register widget event handlers ASoC: Intel: Skylake: Use set_tdm_slot to set the dma channel ASoC: hdac_hdmi: Move channel info from pin to PCM structure ASoC: Intel: bxt: add channel map support in rt298 machine ASoC: Intel: bxt: add channel map support in bxt_da7219_max98357a machine ASoC: hdac_hdmi: Begin to add support for DP Multi-stream audio ASoC: Intel: Skylake: Add route change to rt286 machine ASoC: Intel: Skylake: Add route change to nau88l25_max98357a machine ASoC: Intel: Skylake: Add route change to nau88l25_ssm4567 machine ASoC: Intel: bxt: Add route change to rt298 machine ASoC: Intel: bxt: Add route change to da7219_max98357a machine ASoC: hdac_hdmi: Add support to handle MST capable pin sound/soc/codecs/hdac_hdmi.c | 798 ++++++++++++++---------- sound/soc/intel/boards/bxt_da7219_max98357a.c | 55 +- sound/soc/intel/boards/bxt_rt298.c | 58 +- sound/soc/intel/boards/skl_nau88l25_max98357a.c | 8 +- sound/soc/intel/boards/skl_nau88l25_ssm4567.c | 9 +- sound/soc/intel/boards/skl_rt286.c | 6 +- sound/soc/intel/skylake/skl-pcm.c | 10 +- 7 files changed, 578 insertions(+), 366 deletions(-) -- 2.5.0

3 17

[alsa-devel] [PATCH v2 0/9] Allwinner H5 and Orange Pi PC2 support
by Icenowy Zheng 08 Feb '17

08 Feb '17

Allwinner H5 is a 64-bit SoC with a design like the 32-bit H3. This patch adds support for it, along with the first available board -- Orange Pi PC2. P.S. Some patches are sent wrongly, please ignore them. Sorry. Andre Przywara (3): arm: dts: sun8i: split Allwinner H3 .dtsi arm64: dts: allwinner: add Allwinner H5 .dtsi arm64: dts: sunxi: add support for the Orange Pi PC 2 board Icenowy Zheng (6): drivers: pinctrl: add driver for Allwinner H5 SoC arm64: allwinner: Kconfig: add essential pinctrl driver for H5 clk: sunxi-ng: add support for Allwinner H5 SoC clk: sunxi-ng: remove transitional headers for dt-bindings dmaengine: sun6i: allow build on ARM64 platforms (sun50i) ASoC: sunxi: allow the analog codec driver to be built on ARM64 .../devicetree/bindings/clock/sunxi-ccu.txt | 1 + .../bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 1 + arch/arm/boot/dts/sun8i-h3.dtsi | 501 +----------------- arch/arm/boot/dts/sunxi-h3-h5.dtsi | 557 ++++++++++++++++++++ arch/arm64/Kconfig.platforms | 5 +- arch/arm64/boot/dts/allwinner/Makefile | 1 + .../boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts | 164 ++++++ arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 140 ++++++ arch/arm64/boot/dts/allwinner/sunxi-h3-h5.dtsi | 1 + drivers/clk/sunxi-ng/Kconfig | 6 +- drivers/clk/sunxi-ng/Makefile | 2 +- .../sunxi-ng/{ccu-sun8i-h3.c => ccu-sunxi-h3-h5.c} | 179 ++++++- .../sunxi-ng/{ccu-sun8i-h3.h => ccu-sunxi-h3-h5.h} | 15 +- drivers/dma/Kconfig | 2 +- drivers/pinctrl/sunxi/Kconfig | 4 + drivers/pinctrl/sunxi/Makefile | 1 + drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c | 558 +++++++++++++++++++++ .../clock/{sun8i-h3-ccu.h => sunxi-h3-h5-ccu.h} | 11 +- .../reset/{sun8i-h3-ccu.h => sunxi-h3-h5-ccu.h} | 11 +- sound/soc/sunxi/Kconfig | 2 +- 20 files changed, 1628 insertions(+), 534 deletions(-) create mode 100644 arch/arm/boot/dts/sunxi-h3-h5.dtsi create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi create mode 120000 arch/arm64/boot/dts/allwinner/sunxi-h3-h5.dtsi rename drivers/clk/sunxi-ng/{ccu-sun8i-h3.c => ccu-sunxi-h3-h5.c} (80%) rename drivers/clk/sunxi-ng/{ccu-sun8i-h3.h => ccu-sunxi-h3-h5.h} (82%) create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c rename include/dt-bindings/clock/{sun8i-h3-ccu.h => sunxi-h3-h5-ccu.h} (95%) rename include/dt-bindings/reset/{sun8i-h3-ccu.h => sunxi-h3-h5-ccu.h} (94%) -- 2.11.0

5 19

[alsa-devel] [PATCH v2] ASoc: hdmi-codec: remove HDMI device unregister
by Vincent Abriou 08 Feb '17

08 Feb '17

While unregistering the hdmi-codec, the hdmi device list must be cleaned up. It avoid kernel page fault when registering again the hdmi-codec. Cc: Liam Girdwood <lgirdwood(a)gmail.com> Cc: Mark Brown <broonie(a)kernel.org> Cc: Jaroslav Kysela <perex(a)perex.cz> Cc: Takashi Iwai <tiwai(a)suse.com> Cc: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com> Cc: Jyri Sarha <jsarha(a)ti.com> Cc: Arnaud Pouliquen <arnaud.pouliquen(a)st.com> Cc: Philipp Zabel <p.zabel(a)pengutronix.de> Signed-off-by: Vincent Abriou <vincent.abriou(a)st.com> --- v2: - add mutex to protect hdmi_device_list from concurrent accesses - use of internal dev variable in the hdmi_codec_remove function sound/soc/codecs/hdmi-codec.c | 25 ++++++++++++++++++++++--- 1 file changed, 22 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/hdmi-codec.c b/sound/soc/codecs/hdmi-codec.c index dc6715a..8c5ae1f 100644 --- a/sound/soc/codecs/hdmi-codec.c +++ b/sound/soc/codecs/hdmi-codec.c @@ -32,6 +32,7 @@ struct hdmi_device { }; #define pos_to_hdmi_device(pos) container_of((pos), struct hdmi_device, list) LIST_HEAD(hdmi_device_list); +static DEFINE_MUTEX(hdmi_mutex); #define DAI_NAME_SIZE 16 @@ -794,6 +795,7 @@ static int hdmi_codec_probe(struct platform_device *pdev) return -ENOMEM; hd = NULL; + mutex_lock(&hdmi_mutex); list_for_each(pos, &hdmi_device_list) { struct hdmi_device *tmp = pos_to_hdmi_device(pos); @@ -805,13 +807,16 @@ static int hdmi_codec_probe(struct platform_device *pdev) if (!hd) { hd = devm_kzalloc(dev, sizeof(*hd), GFP_KERNEL); - if (!hd) + if (!hd) { + mutex_unlock(&hdmi_mutex); return -ENOMEM; + } hd->dev = dev->parent; list_add_tail(&hd->list, &hdmi_device_list); } + mutex_unlock(&hdmi_mutex); if (hd->cnt >= ARRAY_SIZE(hdmi_dai_name)) { dev_err(dev, "too many hdmi codec are deteced\n"); @@ -853,11 +858,25 @@ static int hdmi_codec_probe(struct platform_device *pdev) static int hdmi_codec_remove(struct platform_device *pdev) { + struct device *dev = &pdev->dev; + struct list_head *pos; struct hdmi_codec_priv *hcp; - hcp = dev_get_drvdata(&pdev->dev); + mutex_lock(&hdmi_mutex); + list_for_each(pos, &hdmi_device_list) { + struct hdmi_device *tmp = pos_to_hdmi_device(pos); + + if (tmp->dev == dev->parent) { + list_del(pos); + break; + } + } + mutex_unlock(&hdmi_mutex); + + hcp = dev_get_drvdata(dev); kfree(hcp->chmap_info); - snd_soc_unregister_codec(&pdev->dev); + snd_soc_unregister_codec(dev); + return 0; } -- 2.7.4

3 3

[alsa-devel] [PATCH] ASoC:nau8825: automatic LRCK and BCLK divide in master mode
by John Hsu 08 Feb '17

08 Feb '17

Provide the automatic configurable LRC and BCLK divide. The bit clock rate can be chosen by userspace. The driver will make configurations of LRCK and BCLK automatically when playback or capture in master mode. Signed-off-by: John Hsu <KCHSU0(a)nuvoton.com> --- sound/soc/codecs/nau8825.c | 56 ++++++++++++++++++++++++++++++++++++++++++++++ sound/soc/codecs/nau8825.h | 1 + 2 files changed, 57 insertions(+) diff --git a/sound/soc/codecs/nau8825.c b/sound/soc/codecs/nau8825.c index 4576f98..502443b 100644 --- a/sound/soc/codecs/nau8825.c +++ b/sound/soc/codecs/nau8825.c @@ -1007,6 +1007,42 @@ static int nau8825_biq_coeff_put(struct snd_kcontrol *kcontrol, return 0; } +int nau8825_bclk_rate_get_enum(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; + struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); + struct nau8825 *nau8825 = snd_soc_codec_get_drvdata(codec); + unsigned int item; + + item = snd_soc_enum_val_to_item(e, nau8825->bclk_rate); + ucontrol->value.enumerated.item[0] = item; + + return 0; +} + +int nau8825_bclk_rate_put_enum(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; + struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); + struct nau8825 *nau8825 = snd_soc_codec_get_drvdata(codec); + unsigned int *item = ucontrol->value.enumerated.item; + unsigned int val; + bool change = false; + + if (item[0] >= e->items) + return -EINVAL; + + val = snd_soc_enum_item_to_val(e, item[0]); + if (val != nau8825->bclk_rate) { + nau8825->bclk_rate = val; + change = true; + } + + return change; +} + static const char * const nau8825_biq_path[] = { "ADC", "DAC" }; @@ -1031,6 +1067,13 @@ static const struct soc_enum nau8825_dac_oversampl_enum = SOC_ENUM_SINGLE(NAU8825_REG_DAC_CTRL1, NAU8825_DAC_OVERSAMPLE_SFT, ARRAY_SIZE(nau8825_dac_oversampl), nau8825_dac_oversampl); +static const char * const nau8825_bclk_rate[] = { + "128fs", "64fs", "32fs" }; + +static const struct soc_enum nau8825_bclk_rate_enum = + SOC_ENUM_SINGLE(SND_SOC_NOPM, 0, + ARRAY_SIZE(nau8825_bclk_rate), nau8825_bclk_rate); + static const DECLARE_TLV_DB_MINMAX_MUTE(adc_vol_tlv, -10300, 2400); static const DECLARE_TLV_DB_MINMAX_MUTE(sidetone_vol_tlv, -4200, 0); static const DECLARE_TLV_DB_MINMAX(dac_vol_tlv, -5400, 0); @@ -1055,6 +1098,9 @@ static const struct snd_kcontrol_new nau8825_controls[] = { SOC_ENUM("BIQ Path Select", nau8825_biq_path_enum), SND_SOC_BYTES_EXT("BIQ Coefficients", 20, nau8825_biq_coeff_get, nau8825_biq_coeff_put), + + SOC_ENUM_EXT("BCLK rate", nau8825_bclk_rate_enum, + nau8825_bclk_rate_get_enum, nau8825_bclk_rate_put_enum), }; /* DAC Mux 0x33[9] and 0x34[9] */ @@ -1343,6 +1389,14 @@ static int nau8825_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2, NAU8825_I2S_MS_MASK, ctrl2_val); + if (ctrl2_val & NAU8825_I2S_MS_MASTER) { + regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2, + NAU8825_I2S_BLK_DIV_MASK, nau8825->bclk_rate); + regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2, + NAU8825_I2S_LRC_DIV_MASK, + (nau8825->bclk_rate + 1) << NAU8825_I2S_LRC_DIV_SFT); + } + /* Release the semaphone. */ nau8825_sema_release(nau8825); @@ -2497,6 +2551,8 @@ static int nau8825_i2c_probe(struct i2c_client *i2c, return PTR_ERR(nau8825->regmap); nau8825->dev = dev; nau8825->irq = i2c->irq; + /* assign 32fs as default bit clock rate */ + nau8825->bclk_rate = 2; /* Initiate parameters, semaphone and work queue which are needed in * cross talk suppression measurment function. */ diff --git a/sound/soc/codecs/nau8825.h b/sound/soc/codecs/nau8825.h index 514fd13..5f2ed8d 100644 --- a/sound/soc/codecs/nau8825.h +++ b/sound/soc/codecs/nau8825.h @@ -476,6 +476,7 @@ struct nau8825 { int xtalk_event_mask; bool xtalk_protect; int imp_rms[NAU8825_XTALK_IMM]; + int bclk_rate; }; int nau8825_enable_jack_detect(struct snd_soc_codec *codec, -- 2.6.4 =========================================================================================== The privileged confidential information contained in this email is intended for use only by the addressees as indicated by the original sender of this email. If you are not the addressee indicated in this email or are not responsible for delivery of the email to such a person, please kindly reply to the sender indicating this fact and delete all copies of it from your computer and network server immediately. Your cooperation is highly appreciated. It is advised that any unauthorized use of confidential information of Nuvoton is strictly prohibited; and any information in this email irrelevant to the official business of Nuvoton shall be deemed as neither given nor endorsed by Nuvoton.

2 3

Re: [alsa-devel] Cannot combine audio devices with more than 64 channels
by Jörg Müller 08 Feb '17

08 Feb '17

John Rigg informed me about the port-max-option of Jack. So I tried running the following commands: jackd --port-max 1024 -d alsa -C madifx_record_all -P madifx_playback_all jackd -p 1024 -d alsa -C madifx_record_all -P madifx_playback_all jackd -p1024 -d alsa -C madifx_record_all -P madifx_playback_all I also tried ommiting either the option of -C or of -P. But I keep getting the same error: jackd: ../linux/alsa/JackAlsaDriver.cpp:122: virtual int Jack::JackAlsaDriver::Attach(): Assertion `fCaptureChannels < 256' failed. So does that mean jackd doesn't recognize the parameter -p 1024? 2017-01-31 20:31 GMT+01:00 John Rigg <aldev2(a)jrigg.co.uk>: > On Tue, Jan 31, 2017 at 06:18:48PM +0100, Jörg Müller wrote: >> I applied the patch to my system and it fixed the error! >> >> However, I get the following error which seems to be caused by a code >> not being able to handle more than 256 channels: >> > wfs@wfs16:~$ jackd -R -d alsa -C madifx_record_all -P madifx_playback_all >> > jackdmp 1.9.10 >> > Copyright 2001-2005 Paul Davis and others. >> > Copyright 2004-2014 Grame. >> > jackdmp comes with ABSOLUTELY NO WARRANTY >> > This is free software, and you are welcome to redistribute it >> > under certain conditions; see the file COPYING for details >> > no message buffer overruns >> > no message buffer overruns >> > no message buffer overruns >> > JACK server starting in realtime mode with priority 10 >> > self-connect-mode is "Don't restrict self connect requests" >> > audio_reservation_init >> > Acquire audio card Audio0 >> > creating alsa driver ... madifx_playback_all|madifx_record_all|1024|2|48000|0|0|nomon|swmeter|-|32bit >> > configuring for 48000Hz, period = 1024 frames (21.3 ms), buffer = 2 periods >> > ALSA: final selected sample format for capture: 32bit float little-endian >> > ALSA: use 8 periods for capture >> > ALSA: final selected sample format for playback: 32bit float little-endian >> > ALSA: use 8 periods for playback >> > jackd: ../linux/alsa/JackAlsaDriver.cpp:122: virtual int Jack::JackAlsaDriver::Attach(): Assertion `fCaptureChannels < 256' failed. >> > Aborted (core dumped) >> >> What could be the problem here? > > jackd only allows 256 ports maximum by default. Try using -p option > to increase it, eg. to 512: > > jackd -R -p512 -d alsa....etc > > BTW you don't need to specify -R on recent jackd versions as it's > realtime by default (use -r if you don't want realtime). > > John

3 4

[alsa-devel] [PATCH v3 1/1] ALSA: Tascam US-16x08 DSP mixer quirk
by OnkelDead 08 Feb '17

08 Feb '17

Add mixer quirk for Tascam US-16x08 usb interface. Even that this an usb compliant device, the input channels and DSP functions (EQ/Compressor) arn't accessible by default. In v3 I did changed the following: exchange MUA to keep code style, remove all globals, all declaration static (where possible), use standard snd_ctl_boolean_mono_info() when possible, NULL check for all kmalloc(), Remove redundant code, add comments where needed, fix macro arguments, replace uint8_t with u8/s8, remove all typedefs (if possible), add resume callback. Signed-off-by: Detlef Urban <onkel(a)paraair.de> --- sound/usb/Makefile | 1 + sound/usb/mixer_quirks.c | 5 + sound/usb/mixer_us16x08.c | 1772 +++++++++++++++++++++++++++++++++++++++++++++ sound/usb/mixer_us16x08.h | 142 ++++ 4 files changed, 1920 insertions(+) create mode 100644 sound/usb/mixer_us16x08.c create mode 100644 sound/usb/mixer_us16x08.h diff --git a/sound/usb/Makefile b/sound/usb/Makefile index 2d2d122..42cb33b 100644 --- a/sound/usb/Makefile +++ b/sound/usb/Makefile @@ -10,6 +10,7 @@ snd-usb-audio-objs := card.o \ mixer.o \ mixer_quirks.o \ mixer_scarlett.o \ + mixer_us16x08.o \ pcm.o \ proc.o \ quirks.o \ diff --git a/sound/usb/mixer_quirks.c b/sound/usb/mixer_quirks.c index 04991b0..4fa0053 100644 --- a/sound/usb/mixer_quirks.c +++ b/sound/usb/mixer_quirks.c @@ -43,6 +43,7 @@ #include "mixer.h" #include "mixer_quirks.h" #include "mixer_scarlett.h" +#include "mixer_us16x08.h" #include "helper.h" extern struct snd_kcontrol_new *snd_usb_feature_unit_ctl; @@ -1729,6 +1730,10 @@ int snd_usb_mixer_apply_create_quirk(struct usb_mixer_interface *mixer) return err; switch (mixer->chip->usb_id) { + /* Tascam US-16x08 */ + case USB_ID(0x0644, 0x8047): + err = snd_us16x08_controls_create(mixer); + break; case USB_ID(0x041e, 0x3020): case USB_ID(0x041e, 0x3040): case USB_ID(0x041e, 0x3042): diff --git a/sound/usb/mixer_us16x08.c b/sound/usb/mixer_us16x08.c new file mode 100644 index 0000000..54c6928 --- /dev/null +++ b/sound/usb/mixer_us16x08.c @@ -0,0 +1,1772 @@ +/* + * Tascam US-16x08 ALSA driver + * + * Copyright (c) 2016 by Detlef Urban (onkel(a)paraair.de) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <linux/slab.h> +#include <linux/usb.h> +#include <linux/usb/audio-v2.h> +#include "linux/kthread.h" + +#include <sound/core.h> +#include <sound/control.h> +#include <asm-generic/errno-base.h> + +#include "usbaudio.h" +#include "mixer.h" +#include "helper.h" + +#include "mixer_us16x08.h" + +/* USB control message templates */ +static char route_msg[] = { + 0x61, + 0x02, + 0x03, /* input from master (0x02) or input from computer bus (0x03) */ + 0x62, + 0x02, + 0x01, /* input index (0x01/0x02 eq. left/right) or bus (0x01-0x08) */ + 0x41, + 0x01, + 0x61, + 0x02, + 0x01, + 0x62, + 0x02, + 0x01, /* output index (0x01-0x08) */ + 0x42, + 0x01, + 0x43, + 0x01, + 0x00, + 0x00 +}; + +static char mix_init_msg1[] = { + 0x71, 0x01, 0x00, 0x00 +}; + +static char mix_init_msg2[] = { + 0x62, 0x02, 0x00, 0x61, 0x02, 0x04, 0xb1, 0x01, 0x00, 0x00 +}; + +static char mix_msg_in[] = { + /* default message head, equal to all mixers */ + 0x61, 0x02, 0x04, 0x62, 0x02, 0x01, + 0x81, /* 0x06: Controller ID */ + 0x02, /* 0x07: */ + 0x00, /* 0x08: Value of common mixer */ + 0x00, + 0x00 +}; + +static char mix_msg_out[] = { + /* default message head, equal to all mixers */ + 0x61, 0x02, 0x02, 0x62, 0x02, 0x01, + 0x81, /* 0x06: Controller ID */ + 0x02, /* 0x07: */ + 0x00, /* 0x08: Value of common mixer */ + 0x00, + 0x00 +}; + +static char bypass_msg_out[] = { + 0x45, + 0x02, + 0x01, /* on/off flag */ + 0x00, + 0x00 +}; + +static char bus_msg_out[] = { + 0x44, + 0x02, + 0x01, /* on/off flag */ + 0x00, + 0x00 +}; + +static char comp_msg[] = { + /* default message head, equal to all mixers */ + 0x61, 0x02, 0x04, 0x62, 0x02, 0x01, + 0x91, + 0x02, + 0xf0, /* 0x08: Threshold db (8) (e0 ... 00) (+-0dB -- -32dB) x-32 */ + 0x92, + 0x02, + 0x0a, /* 0x0b: Ratio (0a,0b,0d,0f,11,14,19,1e,23,28,32,3c,50,a0,ff) */ + 0x93, + 0x02, + 0x02, /* 0x0e: Attack (0x02 ... 0xc0) (2ms ... 200ms) */ + 0x94, + 0x02, + 0x01, /* 0x11: Release (0x01 ... 0x64) (10ms ... 1000ms) x*10 */ + 0x95, + 0x02, + 0x03, /* 0x14: gain (0 ... 20) (0dB .. 20dB) */ + 0x96, + 0x02, + 0x01, + 0x97, + 0x02, + 0x01, /* 0x1a: main Comp switch (0 ... 1) (off ... on)) */ + 0x00, + 0x00 +}; + +static char eqs_msq[] = { + /* default message head, equal to all mixers */ + 0x61, 0x02, 0x04, 0x62, 0x02, 0x01, + 0x51, /* 0x06: Controller ID */ + 0x02, + 0x04, /* 0x08: EQ set num (0x01..0x04) (LOW, LOWMID, HIGHMID, HIGH)) */ + 0x52, + 0x02, + 0x0c, /* 0x0b: value dB (0 ... 12) (-12db .. +12db) x-6 */ + 0x53, + 0x02, + 0x0f, /* 0x0e: value freq (32-47) (1.7kHz..18kHz) */ + 0x54, + 0x02, + 0x02, /* 0x11: band width (0-6) (Q16-Q0.25) 2^x/4 (EQ xxMID only) */ + 0x55, + 0x02, + 0x01, /* 0x14: main EQ switch (0 ... 1) (off ... on)) */ + 0x00, + 0x00 +}; + +/* compressor ratio map */ +static char ratio_map[] = { + 0x0a, 0x0b, 0x0d, 0x0f, 0x11, 0x14, 0x19, 0x1e, + 0x23, 0x28, 0x32, 0x3c, 0x50, 0xa0, 0xff +}; + +static int snd_us16x08_recv_urb(struct snd_usb_audio *chip, + unsigned char *buf, int size) +{ + + mutex_lock(&chip->mutex); + snd_usb_ctl_msg(chip->dev, + usb_rcvctrlpipe(chip->dev, 0), + SND_US16X08_URB_METER_REQUEST, + SND_US16X08_URB_METER_REQUESTTYPE, 0, 0, buf, size); + mutex_unlock(&chip->mutex); + return 0; +} + +/* wrapper function to send prepared URB buffer to usb device. Return -1 + * if something went wrong + */ +static int snd_us16x08_send_urb(struct snd_usb_audio *chip, char *buf, int size) +{ + int count = -1; + + if (chip) { + count = snd_usb_ctl_msg(chip->dev, + usb_sndctrlpipe(chip->dev, 0), + SND_US16X08_URB_REQUEST, + SND_US16X08_URB_REQUESTTYPE, + 0, 0, buf, size); + } + + return (count == size) ? 0 : count; +} + +static int snd_us16x08_route_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->count = 1; + uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; + uinfo->value.integer.max = SND_US16X08_KCMAX(kcontrol); + uinfo->value.integer.min = SND_US16X08_KCMIN(kcontrol); + uinfo->value.integer.step = SND_US16X08_KCSTEP(kcontrol); + return 0; +} + +static int snd_us16x08_route_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_us16x08_common *store = + (struct snd_us16x08_common *) elem->private_data; + int index = ucontrol->id.index; + + /* route has no bias */ + ucontrol->value.integer.value[0] = store->value[index]; + + return 0; +} + +static int snd_us16x08_route_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_common *store = + (struct snd_us16x08_common *) elem->private_data; + int index = ucontrol->id.index; + char buf[sizeof(route_msg)]; + int val, val_org, err = 0; + + /* prepare the message buffer from template */ + memcpy(buf, route_msg, sizeof(route_msg)); + + /* get the new value (no bias for routes) */ + val = ucontrol->value.integer.value[0]; + if (val < 2) { + /* input comes from a master channel */ + val_org = val; + buf[2] = 0x02; + } else { + /* input comes from a computer channel */ + buf[2] = 0x03; + val_org = val - 2; + } + + /* place new route selection in URB message */ + buf[5] = (unsigned char) (val_org & 0x0f) + 1; + /* place route selector in URB message */ + buf[13] = index + 1; + + err = snd_us16x08_send_urb(chip, buf, sizeof(route_msg)); + + if (err == 0) { + store->value[index] = val; + elem->cached &= 1 << index; + elem->cache_val[index] = val; + } + + return err == 0 ? 1 : 0; +} + +static int snd_us16x08_master_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->count = 1; + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->value.integer.max = SND_US16X08_KCMAX(kcontrol); + uinfo->value.integer.min = SND_US16X08_KCMIN(kcontrol); + uinfo->value.integer.step = SND_US16X08_KCSTEP(kcontrol); + return 0; +} + +static int snd_us16x08_master_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_us16x08_common *store = + (struct snd_us16x08_common *) elem->private_data; + int index = ucontrol->id.index; + + ucontrol->value.integer.value[0] = + store->value[index]; + + return 0; +} + +static int snd_us16x08_master_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_common *store = + (struct snd_us16x08_common *) elem->private_data; + char buf[sizeof(mix_msg_out)]; + int val, err = 0; + int index = ucontrol->id.index; + + /* prepare the message buffer from template */ + memcpy(buf, mix_msg_out, sizeof(mix_msg_out)); + + /* new control value incl. bias*/ + val = ucontrol->value.integer.value[0]; + + buf[8] = val - SND_US16X08_KCBIAS(kcontrol); + buf[6] = elem->head.id; + + /* place channel selector in URB message */ + buf[5] = index + 1; + err = snd_us16x08_send_urb(chip, buf, sizeof(mix_msg_out)); + + if (err == 0) { + store->value[index] = val; + elem->cached &= 1 << index; + elem->cache_val[index] = val; + } + + return err == 0 ? 1 : 0; +} + +static int snd_us16x08_bus_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_bus_store *store = + (struct snd_us16x08_bus_store *) elem->private_data; + + char buf[sizeof(mix_msg_out)]; + int val, err = 0; + + val = ucontrol->value.integer.value[0]; + + /* prepare the message buffer from template */ + switch (elem->head.id) { + case SND_US16X08_ID_BYPASS: + memcpy(buf, bypass_msg_out, sizeof(bypass_msg_out)); + buf[2] = val; + err = snd_us16x08_send_urb(chip, buf, sizeof(bypass_msg_out)); + store->bypass[0] = val; + break; + case SND_US16X08_ID_BUSS_OUT: + memcpy(buf, bus_msg_out, sizeof(bus_msg_out)); + buf[2] = val; + err = snd_us16x08_send_urb(chip, buf, sizeof(bus_msg_out)); + store->bus_out[0] = val; + break; + case SND_US16X08_ID_MUTE: + memcpy(buf, mix_msg_out, sizeof(mix_msg_out)); + buf[8] = val; + buf[6] = elem->head.id; + buf[5] = 1; + err = snd_us16x08_send_urb(chip, buf, sizeof(mix_msg_out)); + store->master_mute[0] = val; + break; + } + + if (err == 0) { + elem->cached &= 1; + elem->cache_val[0] = val; + } + + return err == 0 ? 1 : 0; +} + +static int snd_us16x08_bus_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_us16x08_bus_store *store = + (struct snd_us16x08_bus_store *) elem->private_data; + + switch (elem->head.id) { + case SND_US16X08_ID_BUSS_OUT: + ucontrol->value.integer.value[0] = store->bus_out[0]; + break; + case SND_US16X08_ID_BYPASS: + ucontrol->value.integer.value[0] = store->bypass[0]; + break; + case SND_US16X08_ID_MUTE: + ucontrol->value.integer.value[0] = store->master_mute[0]; + break; + } + + return 0; +} + +/* gets a current mixer value from common store */ +static int snd_us16x08_channel_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_us16x08_channel_store *store = + (struct snd_us16x08_channel_store *) elem->private_data; + int index = ucontrol->id.index; + + switch (elem->head.id) { + case SND_US16X08_ID_MUTE: + ucontrol->value.integer.value[0] = store->mute[index]; + break; + case SND_US16X08_ID_PAN: + ucontrol->value.integer.value[0] = store->pan[index]; + break; + case SND_US16X08_ID_FADER: + ucontrol->value.integer.value[0] = store->gain[index]; + break; + case SND_US16X08_ID_PHASE: + ucontrol->value.integer.value[0] = store->phase[index]; + break; + } + + return 0; +} + +static int snd_us16x08_channel_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_channel_store *store = + (struct snd_us16x08_channel_store *) elem->private_data; + char buf[sizeof(mix_msg_in)]; + int val, err; + int index = ucontrol->id.index; + + /* prepare URB message from template */ + memcpy(buf, mix_msg_in, sizeof(mix_msg_in)); + + val = ucontrol->value.integer.value[0]; + + /* add the bias to the new value */ + buf[8] = val - SND_US16X08_KCBIAS(kcontrol); + buf[6] = elem->head.id; + buf[5] = index + 1; + + err = snd_us16x08_send_urb(chip, buf, sizeof(mix_msg_in)); + + if (err == 0) { + switch (elem->head.id) { + case SND_US16X08_ID_MUTE: + store->mute[index] = val; + break; + case SND_US16X08_ID_PAN: + store->pan[index] = val; + break; + case SND_US16X08_ID_FADER: + store->gain[index] = val; + break; + case SND_US16X08_ID_PHASE: + store->phase[index] = val; + break; + } + elem->cached &= 1 << index; + elem->cache_val[index] = val; + } + + return err == 0 ? 1 : 0; +} + +static int snd_us16x08_mix_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->count = 1; + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->value.integer.max = SND_US16X08_KCMAX(kcontrol); + uinfo->value.integer.min = SND_US16X08_KCMIN(kcontrol); + uinfo->value.integer.step = SND_US16X08_KCSTEP(kcontrol); + return 0; +} + +static int snd_us16x08_comp_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int val = 0; + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_us16x08_comp_store *store = + ((struct snd_us16x08_comp_store *) elem->private_data); + int index = ucontrol->id.index; + + switch (elem->head.id) { + case SND_US16X08_ID_COMP_THRESHOLD: + val = store->valThreshold[index]; + break; + case SND_US16X08_ID_COMP_RATIO: + val = store->valRatio[index]; + break; + case SND_US16X08_ID_COMP_ATTACK: + val = store->valAttack[index]; + break; + case SND_US16X08_ID_COMP_RELEASE: + val = store->valRelease[index]; + break; + case SND_US16X08_ID_COMP_GAIN: + val = store->valGain[index]; + break; + case SND_US16X08_ID_COMP_SWITCH: + val = store->valSwitch[index]; + break; + } + ucontrol->value.integer.value[0] = val; + + return 0; +} + +static int snd_us16x08_comp_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_comp_store *store = + ((struct snd_us16x08_comp_store *) elem->private_data); + int index = ucontrol->id.index; + + char buf[sizeof(comp_msg)]; + int val, err = 0; + + /* prepare compressor URB message from template */ + memcpy(buf, comp_msg, sizeof(comp_msg)); + + /* new control value incl. bias*/ + val = ucontrol->value.integer.value[0]; + switch (elem->head.id) { + case SND_US16X08_ID_COMP_THRESHOLD: + store->valThreshold[index] = val; + break; + case SND_US16X08_ID_COMP_RATIO: + store->valRatio[index] = val; + break; + case SND_US16X08_ID_COMP_ATTACK: + store->valAttack[index] = val; + break; + case SND_US16X08_ID_COMP_RELEASE: + store->valRelease[index] = val; + break; + case SND_US16X08_ID_COMP_GAIN: + store->valGain[index] = val; + break; + case SND_US16X08_ID_COMP_SWITCH: + store->valSwitch[index] = val; + break; + } + + /* place comp values in message buffer watch bias! */ + buf[8] = store->valThreshold[index] - SND_US16X08_COMP_THRESHOLD_BIAS; + buf[11] = ratio_map[store->valRatio[index]]; + buf[14] = store->valAttack[index] + SND_US16X08_COMP_ATTACK_BIAS; + buf[17] = store->valRelease[index] + SND_US16X08_COMP_RELEASE_BIAS; + buf[20] = store->valGain[index]; + buf[26] = store->valSwitch[index]; + + /* place channel selector in message buffer */ + buf[5] = index + 1; + + err = snd_us16x08_send_urb(chip, buf, sizeof(comp_msg)); + + if (err == 0) { + elem->cached &= 1 << index; + elem->cache_val[index] = val; + } + + return 1; +} + +static int snd_us16x08_eqswitch_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int val = 0; + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_us16x08_eq_all_store *store = + ((struct snd_us16x08_eq_all_store *) elem->private_data); + int index = ucontrol->id.index; + + /* get low switch from cache is enough, cause all bands are together */ + val = store->low_store->valSwitch[index]; + ucontrol->value.integer.value[0] = val; + + return 0; +} + +static int snd_us16x08_eqswitch_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_eq_all_store *store = + ((struct snd_us16x08_eq_all_store *) elem->private_data); + int index = ucontrol->id.index; + + char buf[sizeof(eqs_msq)]; + int val, err = 0; + + /* new control value incl. bias*/ + val = ucontrol->value.integer.value[0] + SND_US16X08_KCBIAS(kcontrol); + + /* prepare URB message from EQ template */ + memcpy(buf, eqs_msq, sizeof(eqs_msq)); + + store->low_store->valSwitch[index] = val; + store->midlow_store->valSwitch[index] = val; + store->midhigh_store->valSwitch[index] = val; + store->high_store->valSwitch[index] = val; + + /* place channel index in URB message */ + buf[5] = index + 1; + + /* all four EQ bands have to be enabled/disabled in once */ + buf[20] = store->low_store->valSwitch[index]; + buf[17] = store->low_store->valWidth[index]; + buf[14] = store->low_store->valFreq[index]; + buf[11] = store->low_store->valdB[index]; + buf[8] = 0x01; + err = snd_us16x08_send_urb(chip, buf, sizeof(eqs_msq)); + + /* give time to the device to handle the request */ + mdelay(15); + buf[20] = store->midlow_store->valSwitch[index]; + buf[17] = store->midlow_store->valWidth[index]; + buf[14] = store->midlow_store->valFreq[index]; + buf[11] = store->midlow_store->valdB[index]; + buf[8] = 0x02; + err = snd_us16x08_send_urb(chip, buf, sizeof(eqs_msq)); + + mdelay(15); + buf[20] = store->midhigh_store->valSwitch[index]; + buf[17] = store->midhigh_store->valWidth[index]; + buf[14] = store->midhigh_store->valFreq[index]; + buf[11] = store->midhigh_store->valdB[index]; + buf[8] = 0x03; + err = snd_us16x08_send_urb(chip, buf, sizeof(eqs_msq)); + + mdelay(15); + buf[20] = store->high_store->valSwitch[index]; + buf[17] = store->high_store->valWidth[index]; + buf[14] = store->high_store->valFreq[index] + + SND_US16X08_EQ_HIGHFREQ_BIAS; + buf[11] = store->high_store->valdB[index]; + buf[8] = 0x04; + err = snd_us16x08_send_urb(chip, buf, sizeof(eqs_msq)); + + if (err == 0) { + store->low_store->valSwitch[index] = val; + elem->cached &= 1 << index; + elem->cache_val[index] = val; + } + + return 1; +} + +static int snd_us16x08_eq_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int val = 0; + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_us16x08_eq_store *store = + ((struct snd_us16x08_eq_store *) elem->private_data); + int index = ucontrol->id.index; + + switch (elem->head.id & 0xf0) { + case 0x00: + val = store->valdB[index]; + break; + case 0x10: + val = store->valFreq[index]; + break; + case 0x20: + val = store->valWidth[index]; + break; + } + ucontrol->value.integer.value[0] = val; + + return 0; +} + +static int snd_us16x08_eq_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_eq_store *store = + ((struct snd_us16x08_eq_store *) elem->private_data); + int index = ucontrol->id.index; + + char buf[sizeof(eqs_msq)]; + int val, err = 0; + + /* copy URB buffer from EQ template */ + memcpy(buf, eqs_msq, sizeof(eqs_msq)); + + /* add control bias to new value */ + val = ucontrol->value.integer.value[0]; + + switch (elem->head.id & 0xf0) { + case 0x00: /* level dB */ + store->valdB[index] = val; + break; + case 0x10: + store->valFreq[index] = val; + break; + case 0x20: + store->valWidth[index] = val; + break; + } + + buf[20] = store->valSwitch[index]; + buf[17] = store->valWidth[index]; + /* add eq high frequence bias if high band changed*/ + buf[14] = store->valFreq[index] + + ((elem->head.id & 0x0f) == 0x04 ? + SND_US16X08_EQ_HIGHFREQ_BIAS : SND_US16X08_NO_BIAS); + buf[11] = store->valdB[index]; + + /* place channel index in URB buffer */ + buf[5] = index + 1; + + /* place EQ band in URB buffer */ + buf[8] = (elem->head.id & 0x0F); + + err = snd_us16x08_send_urb(chip, buf, sizeof(eqs_msq)); + + if (err == 0) { + /* store new value in EQ band cache */ + elem->cached &= 1 << index; + elem->cache_val[index] = val; + } + return 1; +} + +static int snd_us16x08_meter_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->count = 1; + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->value.integer.max = 0x7FFF; + uinfo->value.integer.min = 0; + + return 0; +} + +/* calculate compressor index for reduction level request */ +static int snd_get_meter_comp_index(struct snd_us16x08_meter_store *store) +{ + int ret; + + /* any channel active */ + if (store->comp_active_index) { + /* check for stereo link */ + if (store->comp_active_index & 0x20) { + /* reset comp_index to left channel*/ + if (store->comp_index - + store->comp_active_index > 1) + store->comp_index = + store->comp_active_index; + + ret = store->comp_index++ & 0x1F; + } else { + /* no stereo link */ + ret = store->comp_active_index; + } + } else { + /* skip channels with no compressor active */ + while (!store->comp_store->valSwitch[store->comp_index - 1] && + store->comp_index < 17) { + store->comp_index++; + } + ret = store->comp_index++; + if (store->comp_index > 16) + store->comp_index = 1; + } + return ret; +} + +/* retrieve the meter level values from URB message */ +static void get_meter_levels_from_urb(int s, + struct snd_us16x08_meter_store *store, + u8 *meter_urb) +{ + int val = MUC2(meter_urb, s) + (MUC3(meter_urb, s) << 8); + + if (MUA0(meter_urb, s) == 0x61 && MUA1(meter_urb, s) == 0x02 && + MUA2(meter_urb, s) == 0x04 && MUB0(meter_urb, s) == 0x62) { + if (MUC0(meter_urb, s) == 0x72) + store->meter_level[MUB2(meter_urb, s) - 1] = val; + if (MUC0(meter_urb, s) == 0xb2) + store->comp_level[MUB2(meter_urb, s) - 1] = val; + } + if (MUA0(meter_urb, s) == 0x61 && MUA1(meter_urb, s) == 0x02 && + MUA2(meter_urb, s) == 0x02 && MUB0(meter_urb, s) == 0x62) + store->master_level[MUB2(meter_urb, s) - 1] = val; +} + +/* Function to retrieve current meter values from the device. + * + * The device needs to be polled for meter values with an initial + * requests. It will return with a sequence of different meter value + * packages. The first request (case 0:) initiate this meter response sequence. + * After the third response, an additional request can be placed, + * to retrieve compressor reduction level value for given channel. This round + * trip channel selector will skip all inactive compressors. + * A mixer can interrupt this round-trip by selecting one ore two (stereo-link) + * specific channels. + */ +static int snd_us16x08_meter_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int i, set; + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_meter_store *store = elem->private_data; + u8 meter_urb[64]; + + + if (elem) { + store = (struct snd_us16x08_meter_store *) elem->private_data; + chip = elem->head.mixer->chip; + } else + return 0; + + switch (kcontrol->private_value) { + case 0: + snd_us16x08_send_urb(chip, mix_init_msg1, 4); + snd_us16x08_recv_urb(chip, meter_urb, + sizeof(meter_urb)); + kcontrol->private_value++; + break; + case 1: + snd_us16x08_recv_urb(chip, meter_urb, + sizeof(meter_urb)); + kcontrol->private_value++; + break; + case 2: + snd_us16x08_recv_urb(chip, meter_urb, + sizeof(meter_urb)); + kcontrol->private_value++; + break; + case 3: + mix_init_msg2[2] = snd_get_meter_comp_index(store); + snd_us16x08_send_urb(chip, mix_init_msg2, 10); + snd_us16x08_recv_urb(chip, meter_urb, + sizeof(meter_urb)); + kcontrol->private_value = 0; + break; + } + + for (set = 0; set < 6; set++) + get_meter_levels_from_urb(set, store, meter_urb); + + for (i = 0; i < SND_US16X08_MAX_CHANNELS; i++) { + ucontrol->value.integer.value[i] = + store ? store->meter_level[i] : 0; + } + + ucontrol->value.integer.value[i++] = store ? store->master_level[0] : 0; + ucontrol->value.integer.value[i++] = store ? store->master_level[1] : 0; + + for (i = 2; i < SND_US16X08_MAX_CHANNELS + 2; i++) + ucontrol->value.integer.value[i + SND_US16X08_MAX_CHANNELS] = + store ? store->comp_level[i - 2] : 0; + + return 1; +} + +static int snd_us16x08_meter_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_us16x08_meter_store *store = elem->private_data; + int val; + + val = ucontrol->value.integer.value[0]; + store->comp_active_index = val; + store->comp_index = val; + + return 1; +} + +static struct snd_kcontrol_new snd_us16x08_ch_boolean_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_switch_info, + .get = snd_us16x08_channel_get, + .put = snd_us16x08_channel_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 1) +}; + +static struct snd_kcontrol_new snd_us16x08_ch_int_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_channel_get, + .put = snd_us16x08_channel_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_FADER_BIAS, 1, 0, 133) +}; + +static struct snd_kcontrol_new snd_us16x08_master_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 1, + .info = snd_us16x08_master_info, + .get = snd_us16x08_master_get, + .put = snd_us16x08_master_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_FADER_BIAS, 1, 0, 133) +}; + +static struct snd_kcontrol_new snd_us16x08_route_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 8, + .info = snd_us16x08_route_info, + .get = snd_us16x08_route_get, + .put = snd_us16x08_route_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 9) +}; + +static struct snd_kcontrol_new snd_us16x08_bus_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 1, + .info = snd_us16x08_switch_info, + .get = snd_us16x08_bus_get, + .put = snd_us16x08_bus_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 1) +}; + +static struct snd_kcontrol_new snd_us16x08_compswitch_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_switch_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 1) +}; + +static struct snd_kcontrol_new snd_us16x08_comp_threshold_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_COMP_THRESHOLD_BIAS, 1, + 0, 0x20) +}; + +static struct snd_kcontrol_new snd_us16x08_comp_ratio_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, + sizeof(ratio_map) - 1), /*max*/ +}; + +static struct snd_kcontrol_new snd_us16x08_comp_gain_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 0x14) +}; + +static struct snd_kcontrol_new snd_us16x08_comp_attack_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = + SND_US16X08_KCSET(SND_US16X08_COMP_ATTACK_BIAS, 1, 0, 0xc6), +}; + +static struct snd_kcontrol_new snd_us16x08_comp_release_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = + SND_US16X08_KCSET(SND_US16X08_COMP_RELEASE_BIAS, 1, 0, 0x63), +}; + +static struct snd_kcontrol_new snd_us16x08_eq_gain_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 24), +}; + +static struct snd_kcontrol_new snd_us16x08_eq_low_freq_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 0x1F), +}; + +static struct snd_kcontrol_new snd_us16x08_eq_mid_freq_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 0x3F) +}; + +static struct snd_kcontrol_new snd_us16x08_eq_mid_width_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 0x06) +}; + +static struct snd_kcontrol_new snd_us16x08_eq_high_freq_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = + SND_US16X08_KCSET(SND_US16X08_EQ_HIGHFREQ_BIAS, 1, 0, 0x1F) +}; + +static struct snd_kcontrol_new snd_us16x08_eq_switch_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_switch_info, + .get = snd_us16x08_eqswitch_get, + .put = snd_us16x08_eqswitch_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 1) +}; + +static struct snd_kcontrol_new snd_us16x08_meter_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 1, + .info = snd_us16x08_meter_info, + .get = snd_us16x08_meter_get, + .put = snd_us16x08_meter_put +}; + +/* control store preparation */ + +static struct snd_us16x08_common *snd_us16x08_create_mix_store(int default_val) +{ + int i; + struct snd_us16x08_common *tmp = + kmalloc(sizeof(struct snd_us16x08_common), GFP_KERNEL); + + if (tmp == NULL) + return NULL; + + for (i = 0; i < SND_US16X08_MAX_CHANNELS; i++) + tmp->value[i] = default_val; + return tmp; +} + +static struct snd_us16x08_channel_store *snd_us16x08_create_channel_store(void) +{ + int i; + struct snd_us16x08_channel_store *tmp = + kmalloc(sizeof(struct snd_us16x08_channel_store), GFP_KERNEL); + + if (tmp == NULL) + return NULL; + + for (i = 0; i < SND_US16X08_MAX_CHANNELS; i++) { + tmp->gain[i] = 127; /* 0dB */ + tmp->mute[i] = 0; + tmp->pan[i] = 127; /* center */ + tmp->phase[i] = 0; + } + return tmp; +} + +static struct snd_us16x08_comp_store *snd_us16x08_create_comp_store(void) +{ + int i = 0; + struct snd_us16x08_comp_store *tmp = + kmalloc(sizeof(struct snd_us16x08_comp_store), GFP_KERNEL); + + if (tmp == NULL) + return NULL; + + for (i = 0; i < SND_US16X08_MAX_CHANNELS; i++) { + tmp->valThreshold[i] = 0x20; /* 0dB */ + tmp->valRatio[i] = 0x00; /* 1:1 */ + tmp->valGain[i] = 0x00; /* 0dB */ + tmp->valSwitch[i] = 0x00; /* off */ + tmp->valAttack[i] = 0x00; /* 2ms */ + tmp->valRelease[i] = 0x00; /* 10ms */ + } + return tmp; +} + +static struct snd_us16x08_common *snd_us16x08_create_route_store(void) +{ + int i = 0; + struct snd_us16x08_common *tmp = + kmalloc(sizeof(struct snd_us16x08_common), GFP_KERNEL); + + if (tmp == NULL) + return NULL; + + for (i = 0; i < 8; i++) + tmp->value[i] = i < 2 ? i : i + 2; + return tmp; +} + +/* setup compressor store and assign default value */ +static struct snd_us16x08_bus_store *snd_us16x08_create_bus_store( + int default_val) +{ + struct snd_us16x08_bus_store *tmp = + kmalloc(sizeof(struct snd_us16x08_bus_store), GFP_KERNEL); + + if (tmp == NULL) + return NULL; + + tmp->bypass[0] = default_val; + tmp->bus_out[0] = default_val; + tmp->master_mute[0] = default_val; + return tmp; +} + +/* setup EQ store and assign default values */ +static struct snd_us16x08_eq_store *snd_us16x08_create_eq_store(int band_index) +{ + int i = 0; + struct snd_us16x08_eq_store *tmp = + kmalloc(sizeof(struct snd_us16x08_eq_store), GFP_KERNEL); + + if (tmp == NULL) + return NULL; + + for (i = 0; i < SND_US16X08_MAX_CHANNELS; i++) { + switch (band_index) { + case 0x01: /* EQ Low */ + tmp->valdB[i] = 0x0c; + tmp->valFreq[i] = 0x05; + tmp->valWidth[i] = 0xff; + tmp->valSwitch[i] = 0x00; /* off */ + break; + case 0x02: /* EQ Mid low */ + tmp->valdB[i] = 0x0c; + tmp->valFreq[i] = 0x0e; + tmp->valWidth[i] = 0x02; + tmp->valSwitch[i] = 0x00; /* off */ + break; + case 0x03: /* EQ Mid High */ + tmp->valdB[i] = 0x0c; + tmp->valFreq[i] = 0x1b; + tmp->valWidth[i] = 0x02; + tmp->valSwitch[i] = 0x00; /* off */ + break; + case 0x04: /* EQ High */ + tmp->valdB[i] = 0x0c; + tmp->valFreq[i] = 0x2f - SND_US16X08_EQ_HIGHFREQ_BIAS; + tmp->valWidth[i] = 0xff; + tmp->valSwitch[i] = 0x00; /* off */ + break; + } + } + return tmp; +} + +struct snd_us16x08_meter_store *snd_us16x08_create_meter_store(void) +{ + struct snd_us16x08_meter_store *tmp = + kzalloc(sizeof(struct snd_us16x08_meter_store), GFP_KERNEL); + + if (!tmp) + return NULL; + tmp->comp_index = 1; + tmp->comp_active_index = 0; + return tmp; + +} + +/* suspend/resume */ + +static void snd_us16x08_resume_route(struct usb_mixer_elem_info *elem) +{ + int i; + struct snd_us16x08_common *store = + (struct snd_us16x08_common *) elem->private_data; + + for (i = 0; i < elem->channels; i++) + if (elem->cached & (1 << i)) + store->value[i] = elem->cache_val[i]; +} + +static void snd_us16x08_resume_master(struct usb_mixer_elem_info *elem) +{ + struct snd_us16x08_common *store = + (struct snd_us16x08_common *) elem->private_data; + + if (elem->channels == 1 && elem->cached & 1) + store->value[0] = elem->cache_val[0]; +} + +static void snd_us16x08_resume_bus(struct usb_mixer_elem_info *elem) +{ + struct snd_us16x08_bus_store *store = + (struct snd_us16x08_bus_store *) elem->private_data; + + if (elem->channels == 1 && elem->cached & 1) + switch (elem->head.id) { + case SND_US16X08_ID_BYPASS: + store->bypass[0] = elem->cache_val[0]; + break; + case SND_US16X08_ID_BUSS_OUT: + store->bus_out[0] = elem->cache_val[0]; + break; + case SND_US16X08_ID_MUTE: + store->master_mute[0] = elem->cache_val[0]; + break; + } +} + +static void snd_us16x08_resume_channel(struct usb_mixer_elem_info *elem) +{ + int i; + struct snd_us16x08_channel_store *store = + (struct snd_us16x08_channel_store *) elem->private_data; + + for (i = 0; i < elem->channels; i++) + if (elem->cached & (1 << i)) + switch (elem->head.id) { + case SND_US16X08_ID_PAN: + store->pan[i] = elem->cache_val[i]; + break; + case SND_US16X08_ID_FADER: + if (elem->channels > 1) + store->gain[i] = elem->cache_val[i]; + break; + case SND_US16X08_ID_PHASE: + store->phase[i] = elem->cache_val[i]; + break; + case SND_US16X08_ID_MUTE: + if (elem->channels > 1) + store->mute[i] = elem->cache_val[i]; + break; + } +} + +static void snd_us16x08_resume_eq(struct usb_mixer_elem_info *elem) +{ + int i; + int val; + struct snd_us16x08_eq_all_store *store = + (struct snd_us16x08_eq_all_store *) elem->private_data; + + for (i = 0; i < elem->channels; i++) { + if (elem->cached & (1 << i)) { + val = elem->cache_val[i]; + switch (elem->head.id) { + case SND_US16X08_ID_EQLOWLEVEL: + store->low_store->valdB[i] = val; + break; + case SND_US16X08_ID_EQLOWMIDLEVEL: + store->midlow_store->valdB[i] = val; + break; + case SND_US16X08_ID_EQHIGHMIDLEVEL: + store->midhigh_store->valdB[i] = val; + break; + case SND_US16X08_ID_EQHIGHLEVEL: + store->high_store->valdB[i] = val; + break; + case SND_US16X08_ID_EQLOWFREQ: + store->low_store->valFreq[i] = val; + break; + case SND_US16X08_ID_EQLOWMIDFREQ: + store->midlow_store->valFreq[i] = val; + break; + case SND_US16X08_ID_EQHIGHMIDFREQ: + store->midhigh_store->valFreq[i] = val; + break; + case SND_US16X08_ID_EQHIGHFREQ: + store->high_store->valFreq[i] = val; + break; + case SND_US16X08_ID_EQLOWMIDWIDTH: + store->midlow_store->valWidth[i] = val; + break; + case SND_US16X08_ID_EQHIGHMIDWIDTH: + store->midhigh_store->valWidth[i] = val; + break; + case SND_US16X08_ID_EQENABLE: + store->low_store->valSwitch[i] = val; + store->midlow_store->valSwitch[i] = val; + store->midhigh_store->valSwitch[i] = val; + store->high_store->valSwitch[i] = val; + break; + } + } + } +} + +static void snd_us16x08_resume_comp(struct usb_mixer_elem_info *elem) +{ + int i; + int val; + struct snd_us16x08_comp_store *store = + (struct snd_us16x08_comp_store *) elem->private_data; + + for (i = 0; i < elem->channels; i++) { + if (elem->cached & (1 << i)) { + val = elem->cache_val[i]; + switch (elem->head.id) { + case SND_US16X08_ID_COMP_THRESHOLD: + store->valThreshold[i] = val; + break; + case SND_US16X08_ID_COMP_RATIO: + store->valRatio[i] = val; + break; + case SND_US16X08_ID_COMP_ATTACK: + store->valAttack[i] = val; + break; + case SND_US16X08_ID_COMP_RELEASE: + store->valRelease[i] = val; + break; + case SND_US16X08_ID_COMP_GAIN: + store->valGain[i] = val; + break; + case SND_US16X08_ID_COMP_SWITCH: + store->valSwitch[i] = val; + break; + } + } + } +} + +static int snd_us16x08_resume(struct usb_mixer_elem_list *list) +{ + struct usb_mixer_elem_info *elem = + container_of(list, struct usb_mixer_elem_info, head); + + /* restore common mixer values */ + if (elem->head.id == SND_US16X08_ID_PAN || + elem->head.id == SND_US16X08_ID_FADER || + elem->head.id == SND_US16X08_ID_PHASE || + elem->head.id == SND_US16X08_ID_MUTE) + snd_us16x08_resume_channel(elem); + + /* restore eq values */ + if (elem->head.id >= SND_US16X08_ID_EQLOWLEVEL && + elem->head.id <= SND_US16X08_ID_EQENABLE) + snd_us16x08_resume_eq(elem); + + /* restore compressor values */ + if (elem->head.id >= SND_US16X08_ID_COMP_THRESHOLD && + elem->head.id <= SND_US16X08_ID_COMP_SWITCH) + snd_us16x08_resume_comp(elem); + + /* restore route settings */ + if (elem->head.id == SND_US16X08_ID_ROUTE) + snd_us16x08_resume_route(elem); + + /* restore master value */ + if (elem->head.id == SND_US16X08_ID_FADER) + snd_us16x08_resume_master(elem); + + /* restore bus setting */ + if (elem->head.id == SND_US16X08_ID_BYPASS || + elem->head.id == SND_US16X08_ID_BUSS_OUT || + elem->head.id == SND_US16X08_ID_MUTE) + snd_us16x08_resume_bus(elem); + + return 0; +} + +static int add_new_ctl(struct usb_mixer_interface *mixer, + const struct snd_kcontrol_new *ncontrol, + int index, int val_type, int channels, + const char *name, const void *opt, + void (*freeer)(struct snd_kcontrol *kctl)) +{ + struct snd_kcontrol *kctl; + struct usb_mixer_elem_info *elem; + int err; + + usb_audio_dbg(mixer->chip, "us16x08 add mixer %s\n", name); + + if (opt == NULL) + return -EINVAL; + + elem = kzalloc(sizeof(*elem), GFP_KERNEL); + if (!elem) + return -ENOMEM; + + elem->head.mixer = mixer; + elem->head.resume = snd_us16x08_resume; + elem->control = 0; + elem->idx_off = 0; + elem->head.id = index; + elem->val_type = val_type; + elem->channels = channels; + elem->private_data = (void *) opt; + + kctl = snd_ctl_new1(ncontrol, elem); + if (!kctl) { + kfree(elem); + return -ENOMEM; + } + + kctl->private_free = freeer; + + strlcpy(kctl->id.name, name, sizeof(kctl->id.name)); + + err = snd_usb_mixer_add_control(&elem->head, kctl); + if (err < 0) + return err; + + return 0; +} + +/* table of EQ and compressor controls */ + +static struct snd_us16x08_control_params control_params; + +static struct snd_us16x08_control_params eq_controls[] = { + { /* EQ switch */ + .kcontrol_new = &snd_us16x08_eq_switch_ctl, + .control_id = SND_US16X08_ID_EQENABLE, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "EQ enable", + .freeer = snd_usb_mixer_elem_free + }, + { /* EQ low gain */ + .kcontrol_new = &snd_us16x08_eq_gain_ctl, + .control_id = SND_US16X08_ID_EQLOWLEVEL, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Low gain", + .freeer = snd_usb_mixer_elem_free + }, + { /* EQ low freq */ + .kcontrol_new = &snd_us16x08_eq_low_freq_ctl, + .control_id = SND_US16X08_ID_EQLOWFREQ, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Low freq", + .freeer = NULL + }, + { /* EQ mid low gain */ + .kcontrol_new = &snd_us16x08_eq_gain_ctl, + .control_id = SND_US16X08_ID_EQLOWMIDLEVEL, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Mid low gain", + .freeer = snd_usb_mixer_elem_free + }, + { /* EQ mid low freq */ + .kcontrol_new = &snd_us16x08_eq_mid_freq_ctl, + .control_id = SND_US16X08_ID_EQLOWMIDFREQ, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Mid low freq", + .freeer = NULL + }, + { /* EQ mid low Q */ + .kcontrol_new = &snd_us16x08_eq_mid_width_ctl, + .control_id = SND_US16X08_ID_EQLOWMIDWIDTH, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Mid low Q", + .freeer = NULL + }, + { /* EQ mid high gain */ + .kcontrol_new = &snd_us16x08_eq_gain_ctl, + .control_id = SND_US16X08_ID_EQHIGHMIDLEVEL, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Mid high gain", + .freeer = snd_usb_mixer_elem_free + }, + { /* EQ mid high freq */ + .kcontrol_new = &snd_us16x08_eq_mid_freq_ctl, + .control_id = SND_US16X08_ID_EQHIGHMIDFREQ, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Mid high freq", + .freeer = NULL + }, + { /* EQ mid high Q */ + .kcontrol_new = &snd_us16x08_eq_mid_width_ctl, + .control_id = SND_US16X08_ID_EQHIGHMIDWIDTH, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Mid high Q", + .freeer = NULL + }, + { /* EQ high gain */ + .kcontrol_new = &snd_us16x08_eq_gain_ctl, + .control_id = SND_US16X08_ID_EQHIGHLEVEL, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "High gain", + .freeer = snd_usb_mixer_elem_free + }, + { /* EQ low freq */ + .kcontrol_new = &snd_us16x08_eq_high_freq_ctl, + .control_id = SND_US16X08_ID_EQHIGHFREQ, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "High freq", + .freeer = NULL + }, +}; + +static struct snd_us16x08_control_params comp_controls[] = { + { /* Comp enable */ + .kcontrol_new = &snd_us16x08_compswitch_ctl, + .control_id = SND_US16X08_ID_COMP_SWITCH, + .type = USB_MIXER_BOOLEAN, + .num_channels = 16, + .name = "Comp enable", + .freeer = snd_usb_mixer_elem_free + }, + { /* Comp threshold */ + .kcontrol_new = &snd_us16x08_comp_threshold_ctl, + .control_id = SND_US16X08_ID_COMP_THRESHOLD, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Threshold", + .freeer = snd_usb_mixer_elem_free + }, + { /* Comp ratio */ + .kcontrol_new = &snd_us16x08_comp_ratio_ctl, + .control_id = SND_US16X08_ID_COMP_RATIO, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Ratio", + .freeer = snd_usb_mixer_elem_free + }, + { /* Comp attack */ + .kcontrol_new = &snd_us16x08_comp_attack_ctl, + .control_id = SND_US16X08_ID_COMP_ATTACK, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Attack", + .freeer = snd_usb_mixer_elem_free + }, + { /* Comp release */ + .kcontrol_new = &snd_us16x08_comp_release_ctl, + .control_id = SND_US16X08_ID_COMP_RELEASE, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Release", + .freeer = snd_usb_mixer_elem_free + }, + { /* Comp gain */ + .kcontrol_new = &snd_us16x08_comp_gain_ctl, + .control_id = SND_US16X08_ID_COMP_GAIN, + .type = USB_MIXER_U8, + .num_channels = 16, + .name = "Gain", + .freeer = snd_usb_mixer_elem_free + }, +}; + +static int snd_us16x08_controls_create_eq(struct usb_mixer_interface *mixer) +{ + int i; + int err; + void *store = NULL; + struct snd_us16x08_eq_store *eq_low_store = + snd_us16x08_create_eq_store(0x01); + struct snd_us16x08_eq_store *eq_midlow_store = + snd_us16x08_create_eq_store(0x02); + struct snd_us16x08_eq_store *eq_midhigh_store = + snd_us16x08_create_eq_store(0x03); + struct snd_us16x08_eq_store *eq_high_store = + snd_us16x08_create_eq_store(0x04); + struct snd_us16x08_eq_all_store *eq_all_store = + kmalloc(sizeof(struct snd_us16x08_eq_all_store), GFP_KERNEL); + + /* check for allocation error */ + if (eq_low_store == NULL || eq_midlow_store == NULL || + eq_midhigh_store == NULL || eq_high_store == NULL || + eq_all_store == NULL) + return -ENOMEM; + + /* combine EQ per band stores */ + eq_all_store->low_store = eq_low_store; + eq_all_store->midlow_store = eq_midlow_store; + eq_all_store->midhigh_store = eq_midhigh_store; + eq_all_store->high_store = eq_high_store; + + for (i = 0; i < sizeof(eq_controls) / + sizeof(control_params); i++) { + + switch (eq_controls[i].control_id & 0xf) { + case 0x00: + store = eq_all_store; + break; + case 0x01: + store = eq_low_store; + break; + case 0x02: + store = eq_midlow_store; + break; + case 0x03: + store = eq_midhigh_store; + break; + case 0x04: + store = eq_high_store; + break; + } + err = add_new_ctl(mixer, + eq_controls[i].kcontrol_new, + eq_controls[i].control_id, + eq_controls[i].type, + eq_controls[i].num_channels, + eq_controls[i].name, + store, + eq_controls[i].freeer); + if (err < 0) + return err; + } + + return 0; +} + +int snd_us16x08_controls_create(struct usb_mixer_interface *mixer) +{ + int i; + int err; + struct snd_us16x08_common *route_store; + struct snd_us16x08_comp_store *comp_store; + struct snd_us16x08_meter_store *meter_store; + struct snd_us16x08_common *master_store; + struct snd_us16x08_bus_store *bus_store; + struct snd_us16x08_channel_store *channel_store; + + /* just check for non-MIDI interface */ + if (mixer->hostif->desc.bInterfaceNumber == 3) { + + /* create compressor mixer elements */ + comp_store = snd_us16x08_create_comp_store(); + if (comp_store == NULL) + return -ENOMEM; + + /* create bus routing store */ + route_store = snd_us16x08_create_route_store(); + if (route_store == NULL) + return -ENOMEM; + + /* create meters store */ + meter_store = snd_us16x08_create_meter_store(); + if (meter_store == NULL) + return -ENOMEM; + + /* create master store */ + master_store = snd_us16x08_create_mix_store(127); + if (master_store == NULL) + return -ENOMEM; + + /* create bus store */ + bus_store = snd_us16x08_create_bus_store(0); + if (bus_store == NULL) + return -ENOMEM; + + /* create channel store */ + channel_store = snd_us16x08_create_channel_store(); + if (channel_store == NULL) + return -ENOMEM; + + err = add_new_ctl(mixer, &snd_us16x08_route_ctl, + SND_US16X08_ID_ROUTE, USB_MIXER_U8, 8, "Route", + (void *) route_store, snd_usb_mixer_elem_free); + if (err < 0) + return err; + + err = add_new_ctl(mixer, &snd_us16x08_master_ctl, + SND_US16X08_ID_FADER, USB_MIXER_U8, 1, "Master", + (void *) master_store, + snd_usb_mixer_elem_free); + if (err < 0) + return err; + + err = add_new_ctl(mixer, &snd_us16x08_bus_ctl, + SND_US16X08_ID_BYPASS, USB_MIXER_U8, 1, "Bypass", + (void *) bus_store, snd_usb_mixer_elem_free); + if (err < 0) + return err; + + err = add_new_ctl(mixer, &snd_us16x08_bus_ctl, + SND_US16X08_ID_BUSS_OUT, USB_MIXER_U8, 1, "Buss out", + (void *) bus_store, NULL); + if (err < 0) + return err; + + err = add_new_ctl(mixer, &snd_us16x08_bus_ctl, + SND_US16X08_ID_MUTE, USB_MIXER_U8, 1, "Master mute", + (void *) bus_store, NULL); + if (err < 0) + return err; + + err = add_new_ctl(mixer, &snd_us16x08_ch_boolean_ctl, + SND_US16X08_ID_PHASE, USB_MIXER_U8, 16, "Phase", + (void *) channel_store, + snd_usb_mixer_elem_free); + if (err < 0) + return err; + + err = add_new_ctl(mixer, &snd_us16x08_ch_int_ctl, + SND_US16X08_ID_FADER, USB_MIXER_S16, 16, "Fader", + (void *) channel_store, NULL); + if (err < 0) + return err; + + err = add_new_ctl(mixer, &snd_us16x08_ch_boolean_ctl, + SND_US16X08_ID_MUTE, USB_MIXER_BOOLEAN, 16, "Mute", + (void *) channel_store, NULL); + + if (err < 0) + return err; + + err = add_new_ctl(mixer, &snd_us16x08_ch_int_ctl, + SND_US16X08_ID_PAN, USB_MIXER_U16, 16, "Pan", + (void *) channel_store, NULL); + if (err < 0) + return err; + + /* add EQ controls */ + err = snd_us16x08_controls_create_eq(mixer); + if (err < 0) + return err; + + /* add compressor controls */ + for (i = 0; + i < sizeof(comp_controls) + / sizeof(control_params); + i++) { + + err = add_new_ctl(mixer, + comp_controls[i].kcontrol_new, + comp_controls[i].control_id, + comp_controls[i].type, + comp_controls[i].num_channels, + comp_controls[i].name, + comp_store, + comp_controls[i].freeer); + if (err < 0) + return err; + } + + /* meter function 'get' must access to compressor store + * so place a reference here + */ + meter_store->comp_store = comp_store; + err = add_new_ctl(mixer, &snd_us16x08_meter_ctl, + SND_US16X08_ID_METER, USB_MIXER_U16, 0, "Meter", + (void *) meter_store, snd_usb_mixer_elem_free); + if (err < 0) + return err; + } + + return 0; +} diff --git a/sound/usb/mixer_us16x08.h b/sound/usb/mixer_us16x08.h new file mode 100644 index 0000000..2b42329 --- /dev/null +++ b/sound/usb/mixer_us16x08.h @@ -0,0 +1,142 @@ +#ifndef __USB_MIXER_US16X08_H +#define __USB_MIXER_US16X08_H + +#define SND_US16X08_MAX_CHANNELS 16 + +/* define some bias, cause some alsa-mixers wont work with + * negative ranges or if mixer-min != 0 + */ +#define SND_US16X08_NO_BIAS 0 +#define SND_US16X08_FADER_BIAS 127 +#define SND_US16X08_EQ_HIGHFREQ_BIAS 0x20 +#define SND_US16X08_COMP_THRESHOLD_BIAS 0x20 +#define SND_US16X08_COMP_ATTACK_BIAS 2 +#define SND_US16X08_COMP_RELEASE_BIAS 1 + +/* get macro for components of kcontrol private_value */ +#define SND_US16X08_KCBIAS(x) (((x)->private_value >> 24) & 0xff) +#define SND_US16X08_KCSTEP(x) (((x)->private_value >> 16) & 0xff) +#define SND_US16X08_KCMIN(x) (((x)->private_value >> 8) & 0xff) +#define SND_US16X08_KCMAX(x) (((x)->private_value >> 0) & 0xff) +/* set macro for kcontrol private_value */ +#define SND_US16X08_KCSET(bias, step, min, max) \ + (((bias) << 24) | ((step) << 16) | ((min) << 8) | (max)) + +/* the URB request/type to control Tascam mixers */ +#define SND_US16X08_URB_REQUEST 0x1D +#define SND_US16X08_URB_REQUESTTYPE 0x40 + +/* the URB params to retrieve meter ranges */ +#define SND_US16X08_URB_METER_REQUEST 0x1e +#define SND_US16X08_URB_METER_REQUESTTYPE 0xc0 + +#define MUA0(x, y) ((x)[(y) * 10 + 4]) +#define MUA1(x, y) ((x)[(y) * 10 + 5]) +#define MUA2(x, y) ((x)[(y) * 10 + 6]) +#define MUB0(x, y) ((x)[(y) * 10 + 7]) +#define MUB1(x, y) ((x)[(y) * 10 + 8]) +#define MUB2(x, y) ((x)[(y) * 10 + 9]) +#define MUC0(x, y) ((x)[(y) * 10 + 10]) +#define MUC1(x, y) ((x)[(y) * 10 + 11]) +#define MUC2(x, y) ((x)[(y) * 10 + 12]) +#define MUC3(x, y) ((x)[(y) * 10 + 13]) + +/* Common Channel control IDs */ +#define SND_US16X08_ID_BYPASS 0x45 +#define SND_US16X08_ID_BUSS_OUT 0x44 +#define SND_US16X08_ID_PHASE 0x85 +#define SND_US16X08_ID_MUTE 0x83 +#define SND_US16X08_ID_FADER 0x81 +#define SND_US16X08_ID_PAN 0x82 +#define SND_US16X08_ID_METER 0xB1 + +/* EQ level IDs */ +#define SND_US16X08_ID_EQLOWLEVEL 0x01 +#define SND_US16X08_ID_EQLOWMIDLEVEL 0x02 +#define SND_US16X08_ID_EQHIGHMIDLEVEL 0x03 +#define SND_US16X08_ID_EQHIGHLEVEL 0x04 + +/* EQ frequence IDs */ +#define SND_US16X08_ID_EQLOWFREQ 0x11 +#define SND_US16X08_ID_EQLOWMIDFREQ 0x12 +#define SND_US16X08_ID_EQHIGHMIDFREQ 0x13 +#define SND_US16X08_ID_EQHIGHFREQ 0x14 + +/* EQ width IDs */ +#define SND_US16X08_ID_EQLOWMIDWIDTH 0x22 +#define SND_US16X08_ID_EQHIGHMIDWIDTH 0x23 + +#define SND_US16X08_ID_EQENABLE 0x30 + +#define SND_US16X08_ID_ROUTE 0x00 + +/* Compressor Ids */ +#define SND_US16X08_ID_COMP_THRESHOLD 0x32 +#define SND_US16X08_ID_COMP_RATIO 0x33 +#define SND_US16X08_ID_COMP_ATTACK 0x34 +#define SND_US16X08_ID_COMP_RELEASE 0x35 +#define SND_US16X08_ID_COMP_GAIN 0x36 +#define SND_US16X08_ID_COMP_SWITCH 0x37 + +struct snd_us16x08_common { + u8 value[SND_US16X08_MAX_CHANNELS]; +}; + +struct snd_us16x08_channel_store { + u8 gain[SND_US16X08_MAX_CHANNELS]; + u8 phase[SND_US16X08_MAX_CHANNELS]; + u8 pan[SND_US16X08_MAX_CHANNELS]; + u8 mute[SND_US16X08_MAX_CHANNELS]; +}; + +struct snd_us16x08_eq_store { + u8 valdB[SND_US16X08_MAX_CHANNELS]; + u8 valFreq[SND_US16X08_MAX_CHANNELS]; + u8 valWidth[SND_US16X08_MAX_CHANNELS]; + u8 valSwitch[SND_US16X08_MAX_CHANNELS]; +}; + +struct snd_us16x08_eq_all_store { + struct snd_us16x08_eq_store *low_store; + struct snd_us16x08_eq_store *midlow_store; + struct snd_us16x08_eq_store *midhigh_store; + struct snd_us16x08_eq_store *high_store; +}; + +struct snd_us16x08_comp_store { + u8 valThreshold[SND_US16X08_MAX_CHANNELS]; + u8 valAttack[SND_US16X08_MAX_CHANNELS]; + u8 valRelease[SND_US16X08_MAX_CHANNELS]; + u8 valRatio[SND_US16X08_MAX_CHANNELS]; + u8 valGain[SND_US16X08_MAX_CHANNELS]; + u8 valSwitch[SND_US16X08_MAX_CHANNELS]; +}; + +struct snd_us16x08_meter_store { + int meter_level[SND_US16X08_MAX_CHANNELS]; + int master_level[2]; /* level of meter for master output */ + int comp_index; /* round trip channel selector */ + int comp_active_index; /* channel select from user space mixer */ + int comp_level[16]; /* compressor reduction level */ + struct snd_us16x08_comp_store *comp_store; +}; + +struct snd_us16x08_bus_store { + int bypass[1]; + int bus_out[1]; + int master_mute[1]; +}; + +struct snd_us16x08_control_params { + struct snd_kcontrol_new *kcontrol_new; + int control_id; + int type; + int num_channels; + const char *name; + void (*freeer)(struct snd_kcontrol *kctl); +}; + +#define snd_us16x08_switch_info snd_ctl_boolean_mono_info + +int snd_us16x08_controls_create(struct usb_mixer_interface *mixer); +#endif /* __USB_MIXER_US16X08_H */ -- 2.7.4

2 1

[alsa-devel] [PATCH] Add support for Sabre HiFi on System76 and Clevo laptops
by Jeremy Soller 08 Feb '17

08 Feb '17

This patch adds support for the ESS Sabre HiFi DAC found on some System76 and Clevo laptops. These devices can be identified using the Clevo subvendor id, and the Realtek ALC898 codec vendor ID. When a connection is detected on the ESS DAC, identified by GPIO pin 2 being set low, the 0x1b pin VREF should be set to 80%. Otherwise, it should be set to HIZ. Testing has been performed on the current System76 line of laptops, with and without DACs, no regressions have been found. --- sound/pci/hda/patch_realtek.c | 53 ++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 52 insertions(+), 1 deletion(-) diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index 7d660ee..ed15317 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -1797,6 +1797,7 @@ enum { ALC882_FIXUP_NO_PRIMARY_HP, ALC887_FIXUP_ASUS_BASS, ALC887_FIXUP_BASS_CHMAP, + ALC898_FIXUP_CLEVO_SPDIF, }; static void alc889_fixup_coef(struct hda_codec *codec, @@ -1956,6 +1957,43 @@ static void alc882_fixup_no_primary_hp(struct hda_codec *codec, } } +static void alc898_clevo_dac_hook(struct hda_codec *codec, + struct hda_jack_callback *jack) +{ + int val; + + // Read ESS DAC status + snd_hda_codec_write(codec, codec->core.afg, 0, AC_VERB_SET_GPIO_MASK, 4); + snd_hda_codec_write(codec, codec->core.afg, 0, AC_VERB_SET_GPIO_DIRECTION, 0); + val = snd_hda_codec_read(codec, codec->core.afg, 0, AC_VERB_GET_GPIO_DATA, 0); + val &= 0x04; + + if (val == 0) { + // Set VREF on headphone pin to 80% + val = snd_hda_codec_get_pin_target(codec, 0x1b); + val |= AC_PINCTL_VREF_80; + snd_hda_set_pin_ctl(codec, 0x1b, val); + } else { + // Set VREF on headphone pin to HIZ + val = snd_hda_codec_get_pin_target(codec, 0x1b); + val = val & 0xfff8; + snd_hda_set_pin_ctl(codec, 0x1b, val); + } +} + +static void alc898_fixup_clevo(struct hda_codec *codec, + const struct hda_fixup *fix, int action) +{ + switch (action) { + case HDA_FIXUP_ACT_PRE_PROBE: + snd_hda_jack_detect_enable_callback(codec, 0x1b, alc898_clevo_dac_hook); + break; + case HDA_FIXUP_ACT_INIT: + snd_hda_codec_read(codec, 0x1b, 0, AC_VERB_SET_PIN_WIDGET_CONTROL, 4); + break; + } +} + static void alc_fixup_bass_chmap(struct hda_codec *codec, const struct hda_fixup *fix, int action); @@ -2195,6 +2233,10 @@ static const struct hda_fixup alc882_fixups[] = { .type = HDA_FIXUP_FUNC, .v.func = alc_fixup_bass_chmap, }, + [ALC898_FIXUP_CLEVO_SPDIF] = { + .type = HDA_FIXUP_FUNC, + .v.func = alc898_fixup_clevo, + }, }; static const struct snd_pci_quirk alc882_fixup_tbl[] = { @@ -2271,6 +2313,10 @@ static const struct snd_pci_quirk alc882_fixup_tbl[] = { SND_PCI_QUIRK(0x8086, 0x0022, "DX58SO", ALC889_FIXUP_COEF), {} }; +static const struct snd_pci_quirk alc898_fixup_tbl[] = { + SND_PCI_QUIRK_VENDOR(0x1558, "Clevo laptop", ALC898_FIXUP_CLEVO_SPDIF), + {} +}; static const struct hda_model_fixup alc882_fixup_models[] = { {.id = ALC882_FIXUP_ACER_ASPIRE_4930G, .name = "acer-aspire-4930g"}, @@ -2310,6 +2356,11 @@ static int patch_alc882(struct hda_codec *codec) case 0x10ec0885: case 0x10ec0900: break; + case 0x10ec0898: + case 0x10ec0899: + snd_hda_pick_fixup(codec, NULL, alc898_fixup_tbl, + alc882_fixups); + break; default: /* ALC883 and variants */ alc_fix_pll_init(codec, 0x20, 0x0a, 10); @@ -4357,7 +4408,7 @@ static void alc_fixup_headset_mode_alc255_no_hp_mic(struct hda_codec *codec, struct alc_spec *spec = codec->spec; spec->parse_flags |= HDA_PINCFG_HEADSET_MIC; alc255_set_default_jack_type(codec); - } + } else alc_fixup_headset_mode(codec, fix, action); } -- 2.9.3

2 1

[alsa-devel] sound: use-after-free in snd_seq_queue_alloc
by Dmitry Vyukov 08 Feb '17

08 Feb '17

Hello, I've got the following report while running syzkaller fuzzer on 8b1b41ee74f9712c355d66dc105bbea663ae0afd: BUG: KASAN: use-after-free in snd_seq_queue_alloc+0x663/0x690 sound/core/seq/seq_queue.c:200 at addr ffff880086ba1d00 Read of size 4 by task syz-executor2/31851 CPU: 2 PID: 31851 Comm: syz-executor2 Not tainted 4.10.0-rc5+ #201 Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS Bochs 01/01/2011 Call Trace: __asan_report_load4_noabort+0x3e/0x40 mm/kasan/report.c:327 snd_seq_queue_alloc+0x663/0x690 sound/core/seq/seq_queue.c:200 snd_seq_ioctl_create_queue+0xad/0x310 sound/core/seq/seq_clientmgr.c:1508 snd_seq_ioctl+0x2da/0x4d0 sound/core/seq/seq_clientmgr.c:2130 vfs_ioctl fs/ioctl.c:43 [inline] do_vfs_ioctl+0x1bf/0x1790 fs/ioctl.c:683 SYSC_ioctl fs/ioctl.c:698 [inline] SyS_ioctl+0x8f/0xc0 fs/ioctl.c:689 entry_SYSCALL_64_fastpath+0x1f/0xc2 Allocated: PID = 31851 [<ffffffff83483a17>] kzalloc include/linux/slab.h:490 [inline] [<ffffffff83483a17>] queue_new sound/core/seq/seq_queue.c:113 [inline] [<ffffffff83483a17>] snd_seq_queue_alloc+0x107/0x690 sound/core/seq/seq_queue.c:191 [<ffffffff834748dd>] snd_seq_ioctl_create_queue+0xad/0x310 sound/core/seq/seq_clientmgr.c:1508 [<ffffffff8347878a>] snd_seq_ioctl+0x2da/0x4d0 sound/core/seq/seq_clientmgr.c:2130 [<ffffffff81aa41cf>] vfs_ioctl fs/ioctl.c:43 [inline] [<ffffffff81aa41cf>] do_vfs_ioctl+0x1bf/0x1790 fs/ioctl.c:683 [<ffffffff81aa582f>] SYSC_ioctl fs/ioctl.c:698 [inline] [<ffffffff81aa582f>] SyS_ioctl+0x8f/0xc0 fs/ioctl.c:689 [<ffffffff841c9c81>] entry_SYSCALL_64_fastpath+0x1f/0xc2 Freed: PID = 31854 [<ffffffff81a0b5c3>] kfree+0xd3/0x250 mm/slab.c:3822 [<ffffffff834817e0>] queue_delete+0x90/0xb0 sound/core/seq/seq_queue.c:156 [<ffffffff834826cc>] snd_seq_queue_delete+0x3c/0x50 sound/core/seq/seq_queue.c:213 [<ffffffff8347480a>] snd_seq_ioctl_delete_queue+0x6a/0x90 sound/core/seq/seq_clientmgr.c:1534 [<ffffffff8347878a>] snd_seq_ioctl+0x2da/0x4d0 sound/core/seq/seq_clientmgr.c:2130 [<ffffffff81aa41cf>] vfs_ioctl fs/ioctl.c:43 [inline] [<ffffffff81aa41cf>] do_vfs_ioctl+0x1bf/0x1790 fs/ioctl.c:683 [<ffffffff81aa582f>] SYSC_ioctl fs/ioctl.c:698 [inline] [<ffffffff81aa582f>] SyS_ioctl+0x8f/0xc0 fs/ioctl.c:689 Looking at the code: int snd_seq_queue_alloc(int client, int locked, unsigned int info_flags) { struct snd_seq_queue *q; q = queue_new(client, locked); if (q == NULL) return -ENOMEM; q->info_flags = info_flags; if (queue_list_add(q) < 0) { queue_delete(q); return -ENOMEM; } snd_seq_queue_use(q->queue, client, 1); /* use this queue */ return q->queue; } After queue_list_add(q) q can be deleted by another thread, so snd_seq_queue_use(q->queue, client, 1) already potentially operates on deleted object.

2 1

[alsa-devel] [PATCH] ASoc: hdmi-codec: remove HDMI device unregister
by Vincent Abriou 08 Feb '17

08 Feb '17

While unregistering the hdmi-codec, the hdmi device list must be cleaned up. It avoids kernel page fault when registering again the hdmi-codec. Cc: Liam Girdwood <lgirdwood(a)gmail.com> Cc: Mark Brown <broonie(a)kernel.org> Cc: Jaroslav Kysela <perex(a)perex.cz> Cc: Takashi Iwai <tiwai(a)suse.com> Cc: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com> Cc: Jyri Sarha <jsarha(a)ti.com> Cc: Arnaud Pouliquen <arnaud.pouliquen(a)st.com> Cc: Philipp Zabel <p.zabel(a)pengutronix.de> Signed-off-by: Vincent Abriou <vincent.abriou(a)st.com> --- sound/soc/codecs/hdmi-codec.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/sound/soc/codecs/hdmi-codec.c b/sound/soc/codecs/hdmi-codec.c index 90b5948..1ca405e 100644 --- a/sound/soc/codecs/hdmi-codec.c +++ b/sound/soc/codecs/hdmi-codec.c @@ -479,6 +479,18 @@ static int hdmi_codec_probe(struct platform_device *pdev) static int hdmi_codec_remove(struct platform_device *pdev) { + struct device *dev = &pdev->dev; + struct list_head *pos; + + list_for_each(pos, &hdmi_device_list) { + struct hdmi_device *tmp = pos_to_hdmi_device(pos); + + if (tmp->dev == dev->parent) { + list_del(pos); + break; + } + } + snd_soc_unregister_codec(&pdev->dev); return 0; } -- 2.7.4

5 7

[alsa-devel] [patch] ASoC: sun4i-i2s: remove some dead code
by Dan Carpenter 08 Feb '17

08 Feb '17

"i2s->rst" is either NULL or a valid pointer. We won't probe successfully if it's an error pointer. That means these checks can be removed. Signed-off-by: Dan Carpenter <dan.carpenter(a)oracle.com> diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c index 3635bbc72cbc..d79be3e4361b 100644 --- a/sound/soc/sunxi/sun4i-i2s.c +++ b/sound/soc/sunxi/sun4i-i2s.c @@ -723,13 +723,11 @@ static int sun4i_i2s_probe(struct platform_device *pdev) } } - if (!IS_ERR(i2s->rst)) { - ret = reset_control_deassert(i2s->rst); - if (ret) { - dev_err(&pdev->dev, - "Failed to deassert the reset control\n"); - return -EINVAL; - } + ret = reset_control_deassert(i2s->rst); + if (ret) { + dev_err(&pdev->dev, + "Failed to deassert the reset control\n"); + return -EINVAL; } i2s->playback_dma_data.addr = res->start + SUN4I_I2S_FIFO_TX_REG; @@ -766,8 +764,7 @@ static int sun4i_i2s_probe(struct platform_device *pdev) sun4i_i2s_runtime_suspend(&pdev->dev); err_pm_disable: pm_runtime_disable(&pdev->dev); - if (!IS_ERR(i2s->rst)) - reset_control_assert(i2s->rst); + reset_control_assert(i2s->rst); return ret; } @@ -782,8 +779,7 @@ static int sun4i_i2s_remove(struct platform_device *pdev) if (!pm_runtime_status_suspended(&pdev->dev)) sun4i_i2s_runtime_suspend(&pdev->dev); - if (!IS_ERR(i2s->rst)) - reset_control_assert(i2s->rst); + reset_control_assert(i2s->rst); return 0; }

3 4

[alsa-devel] [PATCH v4 0/9] Allwinner H5 and Orange Pi PC2 support
by Icenowy Zheng 08 Feb '17

08 Feb '17

Allwinner H5 is a 64-bit SoC with a design like the 32-bit H3. This patchset adds support for it, along with the first available board -- Orange Pi PC2. Some drivers are also enabled to be built on ARM64 ARCH_SUNXI platform, in order to make the internal audio codec work. Andre Przywara (3): arm: dts: sun8i: split Allwinner H3 .dtsi arm64: dts: allwinner: add Allwinner H5 .dtsi arm64: dts: sunxi: add support for the Orange Pi PC 2 board Icenowy Zheng (6): arm64: allwinner: Kconfig: add essential pinctrl driver for H5 clk: sunxi-ng: rename sun8i-h3 driver to sunxi-h3-h5 clk: sunxi-ng: add support for Allwinner H5 SoC ARM: dts: sun8i: convert H3 dtsi to use new sunxi-h3-h5 binding header dt-bindings: remove transitional headers for Allwinner H3 CCU ASoC: sunxi: allow the analog codec driver to be built on ARM64 .../devicetree/bindings/clock/sunxi-ccu.txt | 1 + arch/arm/boot/dts/sun8i-h3.dtsi | 789 ++++----------------- .../boot/dts/{sun8i-h3.dtsi => sunxi-h3-h5.dtsi} | 91 +-- arch/arm64/Kconfig.platforms | 5 +- arch/arm64/boot/dts/allwinner/Makefile | 1 + .../boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts | 164 +++++ arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 139 ++++ arch/arm64/boot/dts/allwinner/sunxi-h3-h5.dtsi | 1 + drivers/clk/sunxi-ng/Kconfig | 6 +- drivers/clk/sunxi-ng/Makefile | 2 +- .../sunxi-ng/{ccu-sun8i-h3.c => ccu-sunxi-h3-h5.c} | 236 +++++- .../sunxi-ng/{ccu-sun8i-h3.h => ccu-sunxi-h3-h5.h} | 15 +- .../clock/{sun8i-h3-ccu.h => sunxi-h3-h5-ccu.h} | 11 +- .../reset/{sun8i-h3-ccu.h => sunxi-h3-h5-ccu.h} | 11 +- sound/soc/sunxi/Kconfig | 2 +- 15 files changed, 709 insertions(+), 765 deletions(-) rewrite arch/arm/boot/dts/sun8i-h3.dtsi (81%) copy arch/arm/boot/dts/{sun8i-h3.dtsi => sunxi-h3-h5.dtsi} (88%) create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi create mode 120000 arch/arm64/boot/dts/allwinner/sunxi-h3-h5.dtsi rename drivers/clk/sunxi-ng/{ccu-sun8i-h3.c => ccu-sunxi-h3-h5.c} (76%) rename drivers/clk/sunxi-ng/{ccu-sun8i-h3.h => ccu-sunxi-h3-h5.h} (82%) rename include/dt-bindings/clock/{sun8i-h3-ccu.h => sunxi-h3-h5-ccu.h} (95%) rename include/dt-bindings/reset/{sun8i-h3-ccu.h => sunxi-h3-h5-ccu.h} (94%) -- 2.11.0

2 12

[alsa-devel] [PATCH] conf: Add card config for Intel HDMI/DP LPE audio
by Takashi Iwai 07 Feb '17

07 Feb '17

It's a playback-only device with a single PCM dedicated for HDMI/DP output. The dmix is working with the latest driver code, so enable it for default, while providing the hdmi PCM dev for the accesses with AES bits. Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- src/conf/cards/HdmiLpeAudio.conf | 85 ++++++++++++++++++++++++++++++++++++++++ src/conf/cards/Makefile.am | 1 + 2 files changed, 86 insertions(+) create mode 100644 src/conf/cards/HdmiLpeAudio.conf diff --git a/src/conf/cards/HdmiLpeAudio.conf b/src/conf/cards/HdmiLpeAudio.conf new file mode 100644 index 000000000000..f5836c05219e --- /dev/null +++ b/src/conf/cards/HdmiLpeAudio.conf @@ -0,0 +1,85 @@ +# +# Configuration for the Intel HDMI/DP LPE audio +# + +<confdir:pcm/front.conf> + +HdmiLpeAudio.pcm.front.0 { + @args [ CARD ] + @args.CARD { + type string + } + type softvol + slave.pcm { + type hw + card $CARD + } + control { + name "PCM Playback Volume" + card $CARD + } +} + +# default with dmix+softvol +HdmiLpeAudio.pcm.default { + @args [ CARD ] + @args.CARD { + type string + } + type plug + slave.pcm { + type softvol + slave.pcm { + @func concat + strings [ "dmix:" $CARD ] + } + control { + name "PCM Playback Volume" + card $CARD + } + } +} + +<confdir:pcm/surround40.conf> +<confdir:pcm/surround21.conf> +<confdir:pcm/surround41.conf> +<confdir:pcm/surround50.conf> +<confdir:pcm/surround51.conf> + +<confdir:pcm/hdmi.conf> + +HdmiLpeAudio.pcm.hdmi.0 { + @args [ CARD AES0 AES1 AES2 AES3 ] + @args.CARD { + type string + } + @args.AES0 { + type integer + } + @args.AES1 { + type integer + } + @args.AES2 { + type integer + } + @args.AES3 { + type integer + } + type hooks + slave.pcm { + type hw + card $CARD + } + hooks.0 { + type ctl_elems + hook_args [ + { + interface PCM + name "IEC958 Playback Default" + lock true + preserve true + value [ $AES0 $AES1 $AES2 $AES3 ] + } + ] + } +} diff --git a/src/conf/cards/Makefile.am b/src/conf/cards/Makefile.am index 60b5309fb621..e8b530e80a8f 100644 --- a/src/conf/cards/Makefile.am +++ b/src/conf/cards/Makefile.am @@ -30,6 +30,7 @@ cfg_files = aliases.conf \ FireWave.conf \ GUS.conf \ HDA-Intel.conf \ + HdmiLpeAudio.conf \ ICE1712.conf \ ICE1724.conf \ ICH.conf \ -- 2.11.0

1 0

Re: [alsa-devel] [linux-sunxi] Re: [PATCH v3 04/10] clk: sunxi-ng: add support for Allwinner H5 SoC
by Icenowy Zheng 07 Feb '17

07 Feb '17

2017年1月30日 17:04于 Maxime Ripard <maxime.ripard(a)free-electrons.com>写道： > > On Sun, Jan 29, 2017 at 10:33:25AM +0800, Icenowy Zheng wrote: > > Allwinner H5 is a SoC that features a CCU like H3, but with MMC phase > > clocks removed (for new MMC controller) and a new bus gate/reset > > imported. > > > > Add support for it. > > > > Signed-off-by: Icenowy Zheng <icenowy(a)aosc.xyz> > > --- > > See the comments of the previous patch. > > > > .../devicetree/bindings/clock/sunxi-ccu.txt | 1 + > > drivers/clk/sunxi-ng/Kconfig | 2 +- > > drivers/clk/sunxi-ng/ccu-sunxi-h3-h5.c | 137 +++++++++++++++++++++ > > drivers/clk/sunxi-ng/ccu-sunxi-h3-h5.h | 5 +- > > include/dt-bindings/clock/sunxi-h3-h5-ccu.h | 3 + > > include/dt-bindings/reset/sunxi-h3-h5-ccu.h | 3 + > > 6 files changed, 149 insertions(+), 2 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/clock/sunxi-ccu.txt b/Documentation/devicetree/bindings/clock/sunxi-ccu.txt > > index f6032cf63f12..a33a4a5ecffa 100644 > > --- a/Documentation/devicetree/bindings/clock/sunxi-ccu.txt > > +++ b/Documentation/devicetree/bindings/clock/sunxi-ccu.txt > > @@ -9,6 +9,7 @@ Required properties : > > - "allwinner,sun8i-h3-ccu" > > - "allwinner,sun8i-v3s-ccu" > > - "allwinner,sun50i-a64-ccu" > > + - "allwinner,sun50i-h5-ccu" > > > > - reg: Must contain the registers base address and length > > - clocks: phandle to the oscillators feeding the CCU. Two are needed: > > diff --git a/drivers/clk/sunxi-ng/Kconfig b/drivers/clk/sunxi-ng/Kconfig > > index 4be083ae717f..bdf18e846731 100644 > > --- a/drivers/clk/sunxi-ng/Kconfig > > +++ b/drivers/clk/sunxi-ng/Kconfig > > @@ -117,7 +117,7 @@ config SUNXI_H3_H5_CCU > > select SUNXI_CCU_NM > > select SUNXI_CCU_MP > > select SUNXI_CCU_PHASE > > - default MACH_SUN8I > > + default MACH_SUN8I || (ARM64 && ARCH_SUNXI) > > > > config SUN8I_V3S_CCU > > bool "Support for the Allwinner V3s CCU" > > diff --git a/drivers/clk/sunxi-ng/ccu-sunxi-h3-h5.c b/drivers/clk/sunxi-ng/ccu-sunxi-h3-h5.c > > index be63b56315f5..b7b9f85f5c9f 100644 > > --- a/drivers/clk/sunxi-ng/ccu-sunxi-h3-h5.c > > +++ b/drivers/clk/sunxi-ng/ccu-sunxi-h3-h5.c > > @@ -302,6 +302,8 @@ static SUNXI_CCU_GATE(bus_uart3_clk, "bus-uart3", "apb2", > > 0x06c, BIT(19), 0); > > static SUNXI_CCU_GATE(bus_scr0_clk, "bus-scr0", "apb2", > > 0x06c, BIT(20), 0); > > +static SUNXI_CCU_GATE(bus_scr1_clk, "bus-scr1", "apb2", > > + 0x06c, BIT(21), 0); > > > > static SUNXI_CCU_GATE(bus_ephy_clk, "bus-ephy", "ahb1", > > 0x070, BIT(0), 0); > > @@ -547,6 +549,7 @@ static struct ccu_common *sunxi_h3_h5_ccu_clks[] = { > > &bus_uart2_clk.common, > > &bus_uart3_clk.common, > > &bus_scr0_clk.common, > > + &bus_scr1_clk.common, > > &bus_ephy_clk.common, > > &bus_dbg_clk.common, > > &ths_clk.common, > > @@ -730,6 +733,122 @@ static struct clk_hw_onecell_data sun8i_h3_hw_clks = { > > .num = CLK_NUMBER, > > }; > > > > +static struct clk_hw_onecell_data sun50i_h5_hw_clks = { > > + .hws = { > > + [CLK_PLL_CPUX] = &pll_cpux_clk.common.hw, > > + [CLK_PLL_AUDIO_BASE] = &pll_audio_base_clk.common.hw, > > + [CLK_PLL_AUDIO] = &pll_audio_clk.hw, > > + [CLK_PLL_AUDIO_2X] = &pll_audio_2x_clk.hw, > > + [CLK_PLL_AUDIO_4X] = &pll_audio_4x_clk.hw, > > + [CLK_PLL_AUDIO_8X] = &pll_audio_8x_clk.hw, > > + [CLK_PLL_VIDEO] = &pll_video_clk.common.hw, > > + [CLK_PLL_VE] = &pll_ve_clk.common.hw, > > + [CLK_PLL_DDR] = &pll_ddr_clk.common.hw, > > + [CLK_PLL_PERIPH0] = &pll_periph0_clk.common.hw, > > + [CLK_PLL_PERIPH0_2X] = &pll_periph0_2x_clk.hw, > > + [CLK_PLL_GPU] = &pll_gpu_clk.common.hw, > > + [CLK_PLL_PERIPH1] = &pll_periph1_clk.common.hw, > > + [CLK_PLL_DE] = &pll_de_clk.common.hw, > > + [CLK_CPUX] = &cpux_clk.common.hw, > > + [CLK_AXI] = &axi_clk.common.hw, > > + [CLK_AHB1] = &ahb1_clk.common.hw, > > + [CLK_APB1] = &apb1_clk.common.hw, > > + [CLK_APB2] = &apb2_clk.common.hw, > > + [CLK_AHB2] = &ahb2_clk.common.hw, > > + [CLK_BUS_CE] = &bus_ce_clk.common.hw, > > + [CLK_BUS_DMA] = &bus_dma_clk.common.hw, > > + [CLK_BUS_MMC0] = &bus_mmc0_clk.common.hw, > > + [CLK_BUS_MMC1] = &bus_mmc1_clk.common.hw, > > + [CLK_BUS_MMC2] = &bus_mmc2_clk.common.hw, > > + [CLK_BUS_NAND] = &bus_nand_clk.common.hw, > > + [CLK_BUS_DRAM] = &bus_dram_clk.common.hw, > > + [CLK_BUS_EMAC] = &bus_emac_clk.common.hw, > > + [CLK_BUS_TS] = &bus_ts_clk.common.hw, > > + [CLK_BUS_HSTIMER] = &bus_hstimer_clk.common.hw, > > + [CLK_BUS_SPI0] = &bus_spi0_clk.common.hw, > > + [CLK_BUS_SPI1] = &bus_spi1_clk.common.hw, > > + [CLK_BUS_OTG] = &bus_otg_clk.common.hw, > > + [CLK_BUS_EHCI0] = &bus_ehci0_clk.common.hw, > > + [CLK_BUS_EHCI1] = &bus_ehci1_clk.common.hw, > > + [CLK_BUS_EHCI2] = &bus_ehci2_clk.common.hw, > > + [CLK_BUS_EHCI3] = &bus_ehci3_clk.common.hw, > > + [CLK_BUS_OHCI0] = &bus_ohci0_clk.common.hw, > > + [CLK_BUS_OHCI1] = &bus_ohci1_clk.common.hw, > > + [CLK_BUS_OHCI2] = &bus_ohci2_clk.common.hw, > > + [CLK_BUS_OHCI3] = &bus_ohci3_clk.common.hw, > > + [CLK_BUS_VE] = &bus_ve_clk.common.hw, > > + [CLK_BUS_TCON0] = &bus_tcon0_clk.common.hw, > > + [CLK_BUS_TCON1] = &bus_tcon1_clk.common.hw, > > + [CLK_BUS_DEINTERLACE] = &bus_deinterlace_clk.common.hw, > > + [CLK_BUS_CSI] = &bus_csi_clk.common.hw, > > + [CLK_BUS_TVE] = &bus_tve_clk.common.hw, > > + [CLK_BUS_HDMI] = &bus_hdmi_clk.common.hw, > > + [CLK_BUS_DE] = &bus_de_clk.common.hw, > > + [CLK_BUS_GPU] = &bus_gpu_clk.common.hw, > > + [CLK_BUS_MSGBOX] = &bus_msgbox_clk.common.hw, > > + [CLK_BUS_SPINLOCK] = &bus_spinlock_clk.common.hw, > > + [CLK_BUS_CODEC] = &bus_codec_clk.common.hw, > > + [CLK_BUS_SPDIF] = &bus_spdif_clk.common.hw, > > + [CLK_BUS_PIO] = &bus_pio_clk.common.hw, > > + [CLK_BUS_THS] = &bus_ths_clk.common.hw, > > + [CLK_BUS_I2S0] = &bus_i2s0_clk.common.hw, > > + [CLK_BUS_I2S1] = &bus_i2s1_clk.common.hw, > > + [CLK_BUS_I2S2] = &bus_i2s2_clk.common.hw, > > + [CLK_BUS_I2C0] = &bus_i2c0_clk.common.hw, > > + [CLK_BUS_I2C1] = &bus_i2c1_clk.common.hw, > > + [CLK_BUS_I2C2] = &bus_i2c2_clk.common.hw, > > + [CLK_BUS_UART0] = &bus_uart0_clk.common.hw, > > + [CLK_BUS_UART1] = &bus_uart1_clk.common.hw, > > + [CLK_BUS_UART2] = &bus_uart2_clk.common.hw, > > + [CLK_BUS_UART3] = &bus_uart3_clk.common.hw, > > + [CLK_BUS_SCR0] = &bus_scr0_clk.common.hw, > > + [CLK_BUS_SCR1] = &bus_scr1_clk.common.hw, > > + [CLK_BUS_EPHY] = &bus_ephy_clk.common.hw, > > + [CLK_BUS_DBG] = &bus_dbg_clk.common.hw, > > + [CLK_THS] = &ths_clk.common.hw, > > + [CLK_NAND] = &nand_clk.common.hw, > > + [CLK_MMC0] = &mmc0_clk.common.hw, > > + [CLK_MMC1] = &mmc1_clk.common.hw, > > + [CLK_MMC2] = &mmc2_clk.common.hw, > > + [CLK_TS] = &ts_clk.common.hw, > > + [CLK_CE] = &ce_clk.common.hw, > > + [CLK_SPI0] = &spi0_clk.common.hw, > > + [CLK_SPI1] = &spi1_clk.common.hw, > > + [CLK_I2S0] = &i2s0_clk.common.hw, > > + [CLK_I2S1] = &i2s1_clk.common.hw, > > + [CLK_I2S2] = &i2s2_clk.common.hw, > > + [CLK_SPDIF] = &spdif_clk.common.hw, > > + [CLK_USB_PHY0] = &usb_phy0_clk.common.hw, > > + [CLK_USB_PHY1] = &usb_phy1_clk.common.hw, > > + [CLK_USB_PHY2] = &usb_phy2_clk.common.hw, > > + [CLK_USB_PHY3] = &usb_phy3_clk.common.hw, > > + [CLK_USB_OHCI0] = &usb_ohci0_clk.common.hw, > > + [CLK_USB_OHCI1] = &usb_ohci1_clk.common.hw, > > + [CLK_USB_OHCI2] = &usb_ohci2_clk.common.hw, > > + [CLK_USB_OHCI3] = &usb_ohci3_clk.common.hw, > > + [CLK_DRAM] = &dram_clk.common.hw, > > + [CLK_DRAM_VE] = &dram_ve_clk.common.hw, > > + [CLK_DRAM_CSI] = &dram_csi_clk.common.hw, > > + [CLK_DRAM_DEINTERLACE] = &dram_deinterlace_clk.common.hw, > > + [CLK_DRAM_TS] = &dram_ts_clk.common.hw, > > + [CLK_DE] = &de_clk.common.hw, > > + [CLK_TCON0] = &tcon_clk.common.hw, > > + [CLK_TVE] = &tve_clk.common.hw, > > + [CLK_DEINTERLACE] = &deinterlace_clk.common.hw, > > + [CLK_CSI_MISC] = &csi_misc_clk.common.hw, > > + [CLK_CSI_SCLK] = &csi_sclk_clk.common.hw, > > + [CLK_CSI_MCLK] = &csi_mclk_clk.common.hw, > > + [CLK_VE] = &ve_clk.common.hw, > > + [CLK_AC_DIG] = &ac_dig_clk.common.hw, > > + [CLK_AVS] = &avs_clk.common.hw, > > + [CLK_HDMI] = &hdmi_clk.common.hw, > > + [CLK_HDMI_DDC] = &hdmi_ddc_clk.common.hw, > > + [CLK_MBUS] = &mbus_clk.common.hw, > > + [CLK_GPU] = &gpu_clk.common.hw, > > + }, > > + .num = CLK_NUMBER, > > +}; > > + > > static struct ccu_reset_map sunxi_h3_h5_ccu_resets[] = { > > [RST_USB_PHY0] = { 0x0cc, BIT(0) }, > > [RST_USB_PHY1] = { 0x0cc, BIT(1) }, > > @@ -791,6 +910,7 @@ static struct ccu_reset_map sunxi_h3_h5_ccu_resets[] = { > > [RST_BUS_UART2] = { 0x2d8, BIT(18) }, > > [RST_BUS_UART3] = { 0x2d8, BIT(19) }, > > [RST_BUS_SCR0] = { 0x2d8, BIT(20) }, > > + [RST_BUS_SCR1] = { 0x2d8, BIT(21) }, > > That reset line is not valid on the H3. So I should split a H3 reset array and a H5 one? (I modelled after ccu-sun5i.c, which shares one reset array) > > Thanks, > Maxime > > -- > Maxime Ripard, Free Electrons > Embedded Linux and Kernel engineering > http://free-electrons.com > > -- > You received this message because you are subscribed to the Google Groups "linux-sunxi" group. > To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscribe(a)googlegroups.com. > For more options, visit https://groups.google.com/d/optout.

2 1

[alsa-devel] [PATCH] ALSA: x86: mark hdmi suspend/resume functions as __maybe_unused
by Arnd Bergmann 07 Feb '17

07 Feb '17

The two functions are unused when CONFIG_PM_SLEEP is disabled: sound/x86/intel_hdmi_audio.c:1633:12: error: 'hdmi_lpe_audio_resume' defined but not used [-Werror=unused-function] sound/x86/intel_hdmi_audio.c:1622:12: error: 'hdmi_lpe_audio_suspend' defined but not used [-Werror=unused-function] Marking them as __maybe_unused avoids the warning without introducing an ugly #ifdef. Fixes: 182cdf23dbf6 ("ALSA: x86: Implement runtime PM") Signed-off-by: Arnd Bergmann <arnd(a)arndb.de> --- sound/x86/intel_hdmi_audio.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/x86/intel_hdmi_audio.c b/sound/x86/intel_hdmi_audio.c index 8978dc9bf579..0d19a4994bac 100644 --- a/sound/x86/intel_hdmi_audio.c +++ b/sound/x86/intel_hdmi_audio.c @@ -1619,7 +1619,7 @@ static int hdmi_lpe_audio_runtime_suspend(struct device *dev) return 0; } -static int hdmi_lpe_audio_suspend(struct device *dev) +static int __maybe_unused hdmi_lpe_audio_suspend(struct device *dev) { struct snd_intelhad *ctx = dev_get_drvdata(dev); int err; @@ -1630,7 +1630,7 @@ static int hdmi_lpe_audio_suspend(struct device *dev) return err; } -static int hdmi_lpe_audio_resume(struct device *dev) +static int __maybe_unused hdmi_lpe_audio_resume(struct device *dev) { struct snd_intelhad *ctx = dev_get_drvdata(dev); -- 2.9.0

3 3

[alsa-devel] [PATCH v2 0/2] Add STM32 SAI support
by olivier moysan 07 Feb '17

07 Feb '17

This patch-set handles the Serial Audio Interface (SAI) IP on STM32 platforms. The SAI IP is composed of two Sub-block A and B. (see the figure below) Each sub-block makes use of individual and shared resources. Shared resources: - Reset line. Reset common and sub-block registers. - Bus interface clocks. This clock is not exposed in device as it it managed by clock driver, according to kernel clocks gating. - Common register. SAI IP exhibits a common configuration register to manage synchronization modes. NB: These modes are not yet implemented in this version of the SAI driver. - Interrupt. Sub-blocks have their own interrupt status registers but they share the same interrupt line. Individual resources: - Register set - DMA request line. - Communication interface. Each sub-block has its own GPIOs and associated bus lines. - Kernel clock. Each sub-block has its own dedicated clock for its communication interface. To reflect this architecture Sub-block A and B are handled by 2 child devices. Sub-block A and B devices can be configured independently either as transmitter or receiver. A PCM device is associated to each sub-block. A sub-block has to select the appropriated parent clock at runtime, depending on the audio stream sampling rate to be played or captured. Two parent clocks must be provided to support sampling rates multiples of 8 kHz or 11.025kHz. Interface clock +--------------------------------+ +---------------> | SAI IP | Reset | +-----------------+ | +---------------> | |common registers | | | +-----------------+ | | | | +----------------------+ | | | Sub-block A | | Kernel clock A | | | | Bus A +--------------------> | +----------------+ +----------------> | | |A registers | | | | | +----------------+ | | | +----------------------+ | | | | +----------------------+ | | | Sub-block B | | Kernel clock B | | | | Bus B +--------------------> | +----------------+ +-----------------> | | |B registers | | | | | +----------------+ | | | +----------------------+ | | | +--------------------------------+ Changes in v2: - Fix warnings olivier moysan (2): ASoC: stm32: add bindings for SAI ASoC: stm32: add SAI driver .../devicetree/bindings/sound/st,stm32-sai.txt | 79 ++ sound/soc/Kconfig | 1 + sound/soc/Makefile | 1 + sound/soc/stm/Kconfig | 8 + sound/soc/stm/Makefile | 6 + sound/soc/stm/stm32_sai.c | 123 +++ sound/soc/stm/stm32_sai.h | 202 +++++ sound/soc/stm/stm32_sai_sub.c | 899 +++++++++++++++++++++ 8 files changed, 1319 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/st,stm32-sai.txt create mode 100644 sound/soc/stm/Kconfig create mode 100644 sound/soc/stm/Makefile create mode 100644 sound/soc/stm/stm32_sai.c create mode 100644 sound/soc/stm/stm32_sai.h create mode 100644 sound/soc/stm/stm32_sai_sub.c -- 1.9.1

1 2

[alsa-devel] [PATCH v2 1/3] clk: zte: add i2s clocks for zx296718
by Baoyou Xie 07 Feb '17

07 Feb '17

The i2s related clock support is missing from the existing zx296718 clock driver. This patch adds it, so that the upstream ZX I2S driver can work out. Signed-off-by: Baoyou Xie <baoyou.xie(a)linaro.org> --- drivers/clk/zte/clk-zx296718.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/clk/zte/clk-zx296718.c b/drivers/clk/zte/clk-zx296718.c index ad5d1df..f106d40 100644 --- a/drivers/clk/zte/clk-zx296718.c +++ b/drivers/clk/zte/clk-zx296718.c @@ -941,6 +941,10 @@ static struct zx_clk_gate audio_gate_clk[] = { GATE(AUDIO_SPDIF1_WCLK, "spdif1_wclk", "spdif1_wclk_div", AUDIO_SPDIF1_CLK, 9, CLK_SET_RATE_PARENT, 0), GATE(AUDIO_TDM_WCLK, "tdm_wclk", "tdm_wclk_div", AUDIO_TDM_CLK, 17, CLK_SET_RATE_PARENT, 0), GATE(AUDIO_TS_PCLK, "tempsensor_pclk", "clk49m5", AUDIO_TS_CLK, 1, 0, 0), + GATE(AUDIO_I2S0_PCLK, "i2s0_pclk", "clk49m5", AUDIO_I2S0_CLK, 8, 0, 0), + GATE(AUDIO_I2S1_PCLK, "i2s1_pclk", "clk49m5", AUDIO_I2S1_CLK, 8, 0, 0), + GATE(AUDIO_I2S2_PCLK, "i2s2_pclk", "clk49m5", AUDIO_I2S2_CLK, 8, 0, 0), + GATE(AUDIO_I2S3_PCLK, "i2s3_pclk", "clk49m5", AUDIO_I2S3_CLK, 8, 0, 0), }; static struct clk_hw_onecell_data audio_hw_onecell_data = { -- 2.7.4

3 6

[alsa-devel] [bug report] ALSA: x86: Flatten two abstraction layers
by Dan Carpenter 07 Feb '17

07 Feb '17

Hello Takashi Iwai, The patch da8648097497: "ALSA: x86: Flatten two abstraction layers" from Jan 31, 2017, leads to the following static checker warning: sound/x86/intel_hdmi_audio.c:1702 hdmi_lpe_audio_probe() error: strcpy() '"IntelHdmiLpeAudio"' too large for 'card->driver' (18 vs 16) sound/x86/intel_hdmi_audio.c 1695 ctx = card->private_data; 1696 spin_lock_init(&ctx->had_spinlock); 1697 mutex_init(&ctx->mutex); 1698 ctx->connected = false; 1699 ctx->dev = &pdev->dev; 1700 ctx->card = card; 1701 ctx->aes_bits = SNDRV_PCM_DEFAULT_CON_SPDIF; 1702 strcpy(card->driver, INTEL_HAD); ^^^^^^^^^ Too long. We're corrupting memory. The old code was equally bad, but the renaming the function made it show up as a new warning... 1703 strcpy(card->shortname, INTEL_HAD); 1704 regards, dan carpenter

2 2

[alsa-devel] [PATCH 1/2] ALSA: x86: Drop suspicious U24 format support
by Takashi Iwai 07 Feb '17

07 Feb '17

U24 format is declared to be supported by the driver, but this looks really doubtful, as there is no corresponding code. Better to drop it. This format is very uncommon, so there should be practically no impact by this change. Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- sound/x86/intel_hdmi_audio.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/sound/x86/intel_hdmi_audio.c b/sound/x86/intel_hdmi_audio.c index 8978dc9bf579..11ee4dddc5dd 100644 --- a/sound/x86/intel_hdmi_audio.c +++ b/sound/x86/intel_hdmi_audio.c @@ -136,8 +136,7 @@ static const struct snd_pcm_hardware had_pcm_hardware = { SNDRV_PCM_INFO_MMAP| SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BATCH), - .formats = (SNDRV_PCM_FMTBIT_S24 | - SNDRV_PCM_FMTBIT_U24), + .formats = SNDRV_PCM_FMTBIT_S24, .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | -- 2.11.0

1 1

Re: [alsa-devel] Fwd: Regression: Line6 Toneport stops working on 4.10-rc5
by Greg KH 07 Feb '17

07 Feb '17

On Mon, Feb 06, 2017 at 01:01:56PM +0300, Igor Zinovev wrote: > Hello again! > > Thanks for the advice, but bisecting the whole tree took me quite a > while and I ended up stuck because booting on some bisect states has > led my system to run without some devices, like wireless and sound. So > I tried to bisect the sound/usb/line6 path. It turns out that this > commit is the point where it breaks for me: > https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/soun… > > In fact, when I apply the reverse patch on top of 4.10-rc7, it fixes > the problem for me. Wonderful, thanks so much for tracking this down! > Should I bring some of the people that are mentioned in the commit > into this conversation? I've done so now. Andrej and Takashi, the above patch causes a regression for Igor, any thoughts? Should we just revert it? thanks, greg k-h

3 7

[alsa-devel] [PATCH 0/4] Yet another patchset for LPE audio refactoring
by Takashi Iwai 07 Feb '17

07 Feb '17

Hi, this is the final part of my cleanup / refactoring patchsets for Intel LPE audio. Now the PCM stream engine has been rewritten. It supports more flexible configuration, not only fixed 4 periods, for example, yet with a lot of code reduction. As usual, the patches are found in topic/intel-lpe-audio-cleanup branch. thanks, Takashi === Takashi Iwai (4): ALSA: x86: Don't pass SNDRV_PCM_INFO_BATCH flag ALSA: x86: Explicit specify 32bit DMA ALSA: x86: Don't check connection in lowlevel accessors ALSA: x86: Refactor PCM process engine sound/x86/intel_hdmi_audio.c | 613 ++++++++++++++------------------------- sound/x86/intel_hdmi_audio.h | 23 +- sound/x86/intel_hdmi_lpe_audio.h | 26 +- 3 files changed, 236 insertions(+), 426 deletions(-) -- 2.11.0

2 25

[alsa-devel] [RFC v2] [ALSA][CONTROL] 1. Added 2 ioctls for reading/writing values of multiple controls in one go (at once) 2. Restructured the code for read/write of a single control
by Satendra Singh Thakur 07 Feb '17

07 Feb '17

From: satendra singh thakur <satendra.t(a)samsung.com> 1.Added 2 ioctls in alsa driver's control interface -Added an ioctl to read values of multiple elements at once -Added an ioctl to write values of multiple elements at once -In the absence of above ioctls user needs to call N ioctls to read/write value of N elements which requires N context switches -Proposed ioctls will allow accessing N elements' values in a single context switch -Above mentioned ioctl will be useful for alsa utils such as amixer which reads all controls of given sound card 2. Restructured/Combined two functions snd_ctl_elem_read_user and snd_ctl_elem_write_user into a single function snd_ctl_elem_rw_user -These functions were having most of the code which was similar to each other -Thus, there was redundant/duplicate code which was removed and a single function was formed/defined. -Removed functions snd_ctl_elem_read_user and snd_ctl_elem_write_user having redundant/duplicate code 3. This is version 2 of RFC, here we combine previous 2 patches submitted yesterday (02-Feb) with prefix [RFC] [ALSA][CONTROL] -Fixed doxygen comments related warnings -Fixed stack frame related warning Signed-off-by: Satendra Singh Thakur <satendra.t(a)samsung.com> --- include/uapi/sound/asound.h | 8 +++ sound/core/control.c | 130 +++++++++++++++++++++++++++++++++---------- 2 files changed, 109 insertions(+), 29 deletions(-) diff --git a/include/uapi/sound/asound.h b/include/uapi/sound/asound.h index be353a7..a0dcee7 100644 --- a/include/uapi/sound/asound.h +++ b/include/uapi/sound/asound.h @@ -948,6 +948,11 @@ struct snd_ctl_tlv { unsigned int length; /* in bytes aligned to 4 */ unsigned int tlv[0]; /* first TLV */ }; +/*Struct to read/write multiple element values */ +struct snd_ctl_elem_values { + unsigned int num_vals;/* Number of values*/ + struct snd_ctl_elem_value *pvals;/* Pointer to the array of values */ +}; #define SNDRV_CTL_IOCTL_PVERSION _IOR('U', 0x00, int) #define SNDRV_CTL_IOCTL_CARD_INFO _IOR('U', 0x01, struct snd_ctl_card_info) @@ -974,6 +979,9 @@ struct snd_ctl_tlv { #define SNDRV_CTL_IOCTL_RAWMIDI_PREFER_SUBDEVICE _IOW('U', 0x42, int) #define SNDRV_CTL_IOCTL_POWER _IOWR('U', 0xd0, int) #define SNDRV_CTL_IOCTL_POWER_STATE _IOR('U', 0xd1, int) +/*Multipe controls' values read and write*/ +#define SNDRV_CTL_IOCTL_ELEMS_READ _IOWR('U', 0xe0, struct snd_ctl_elem_values) +#define SNDRV_CTL_IOCTL_ELEMS_WRITE _IOWR('U', 0xe1, struct snd_ctl_elem_values) /* * Read interface. diff --git a/sound/core/control.c b/sound/core/control.c index fb096cb..980046c 100644 --- a/sound/core/control.c +++ b/sound/core/control.c @@ -920,27 +920,6 @@ static int snd_ctl_elem_read(struct snd_card *card, return result; } -static int snd_ctl_elem_read_user(struct snd_card *card, - struct snd_ctl_elem_value __user *_control) -{ - struct snd_ctl_elem_value *control; - int result; - - control = memdup_user(_control, sizeof(*control)); - if (IS_ERR(control)) - return PTR_ERR(control); - - snd_power_lock(card); - result = snd_power_wait(card, SNDRV_CTL_POWER_D0); - if (result >= 0) - result = snd_ctl_elem_read(card, control); - snd_power_unlock(card); - if (result >= 0) - if (copy_to_user(_control, control, sizeof(*control))) - result = -EFAULT; - kfree(control); - return result; -} static int snd_ctl_elem_write(struct snd_card *card, struct snd_ctl_file *file, struct snd_ctl_elem_value *control) @@ -976,22 +955,38 @@ static int snd_ctl_elem_write(struct snd_card *card, struct snd_ctl_file *file, return result; } -static int snd_ctl_elem_write_user(struct snd_ctl_file *file, - struct snd_ctl_elem_value __user *_control) +/** + * snd_ctl_elem_rw_user - Read/write value of an element + * @file: pointer to control file object + * @_control: user pointer to struct snd_ctl_elem_value + * @write_flag: flag, true for write, false for read operation + * + * This function reads the value of controls with the given IDs + * of the same card + * Return: On success, it returns positive number returned by + * snd_ctl_elem_write/snd_ctl_elem_read + * On failure, it returns appropriate error + */ + +static int snd_ctl_elem_rw_user(struct snd_ctl_file *file, + struct snd_ctl_elem_value __user *_control, + bool write_flag) { struct snd_ctl_elem_value *control; struct snd_card *card; int result; - control = memdup_user(_control, sizeof(*control)); if (IS_ERR(control)) return PTR_ERR(control); - card = file->card; snd_power_lock(card); result = snd_power_wait(card, SNDRV_CTL_POWER_D0); - if (result >= 0) - result = snd_ctl_elem_write(card, file, control); + if (result >= 0) { + if (write_flag == true) + result = snd_ctl_elem_write(card, file, control); + else + result = snd_ctl_elem_read(card, control); + } snd_power_unlock(card); if (result >= 0) if (copy_to_user(_control, control, sizeof(*control))) @@ -1000,6 +995,79 @@ static int snd_ctl_elem_write_user(struct snd_ctl_file *file, return result; } +/** + * snd_ctl_elems_rw_user - Read/Write values of more than one element, + * one by one + * @file: pointer to control file object + * @pucontrols: user-space pointer to struct snd_ctl_elem_values + * @write_flag: this flag distinguises write or read type request + * + * This function reads/writes the value of controls with the given IDs + * of the same card + * Return: On full/partial success, It returns number of successful + * controls read/written. + * On failure, it returns appropriate error + */ +static int snd_ctl_elems_rw_user(struct snd_ctl_file *file, + struct snd_ctl_elem_values __user *pucontrols, + bool write_flag) +{ + struct snd_ctl_elem_values controls; + struct snd_ctl_elem_value *pcontrol; + struct snd_ctl_elem_value __user *puvals; + struct snd_card *card; + int result; + int vals; + int controls_count = 0; + + if (copy_from_user(&controls, pucontrols, sizeof(controls))) + return -EFAULT; + card = file->card; + if (!controls.num_vals || controls.num_vals > card->controls_count) + return -EINVAL; + /*assign user-space pointer**/ + puvals = (struct snd_ctl_elem_value __user *) controls.pvals; + /**allocate memory to pcontrol*/ + pcontrol = kmalloc(sizeof(*pcontrol), GFP_KERNEL); + if (!pcontrol) + return -ENOMEM; + for (vals = 0; vals < controls.num_vals; vals++) { + if (copy_from_user(pcontrol, puvals + vals, sizeof(*pcontrol))) + goto exit_err; + snd_power_lock(card); + result = snd_power_wait(card, SNDRV_CTL_POWER_D0); + if (result >= 0) { + if (write_flag == true) + result = snd_ctl_elem_write(card, file, + pcontrol); + else + result = snd_ctl_elem_read(card, pcontrol); + } + snd_power_unlock(card); + if (result < 0) { + /**If control failed to set/get + * inform user by sending back -1 in reserved field + * so that one can try again for failed elements + */ + pcontrol->reserved[0] = (unsigned char) -1; + pr_err("ALSA: control: snd_ctl_elem_write/read failed\ + for control name = %s\n", pcontrol->id.name); + } else { + controls_count++; + } + if (copy_to_user(puvals + vals, pcontrol, sizeof(*pcontrol))) + goto exit_err; + } + pr_debug("ALSA: control: Num values successfully read/written %u\n",\ + controls_count); + kfree(pcontrol); + /**Return successful control count to user**/ + return controls_count; +exit_err: + kfree(pcontrol); + return -EFAULT; +} + static int snd_ctl_elem_lock(struct snd_ctl_file *file, struct snd_ctl_elem_id __user *_id) { @@ -1514,9 +1582,13 @@ static long snd_ctl_ioctl(struct file *file, unsigned int cmd, unsigned long arg case SNDRV_CTL_IOCTL_ELEM_INFO: return snd_ctl_elem_info_user(ctl, argp); case SNDRV_CTL_IOCTL_ELEM_READ: - return snd_ctl_elem_read_user(card, argp); + return snd_ctl_elem_rw_user(ctl, argp, false); + case SNDRV_CTL_IOCTL_ELEMS_READ: + return snd_ctl_elems_rw_user(ctl, argp, false); case SNDRV_CTL_IOCTL_ELEM_WRITE: - return snd_ctl_elem_write_user(ctl, argp); + return snd_ctl_elem_rw_user(ctl, argp, true); + case SNDRV_CTL_IOCTL_ELEMS_WRITE: + return snd_ctl_elems_rw_user(ctl, argp, true); case SNDRV_CTL_IOCTL_ELEM_LOCK: return snd_ctl_elem_lock(ctl, argp); case SNDRV_CTL_IOCTL_ELEM_UNLOCK: -- 1.7.9.5

3 3

[alsa-devel] [PATCH] ASoC: bcm2835: Increase channels_max to 8
by Matt Flax 06 Feb '17

06 Feb '17

The AudioInjector Octo sound card operates with 8 channels, however the bcm2835 I2S driver was limited to 2 channels. This patch increases the channel capability to 8 by setting channels_max to 8 in the bcm2835_i2s_dai structure. It also adds the 8 channel condition to the channel guard in the bcm2835_i2s_hw_params function. Signed-off-by: Matt Flax <flatmax(a)flatmax.org> --- sound/soc/bcm/bcm2835-i2s.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/sound/soc/bcm/bcm2835-i2s.c b/sound/soc/bcm/bcm2835-i2s.c index 6ba2049..c65ce28 100644 --- a/sound/soc/bcm/bcm2835-i2s.c +++ b/sound/soc/bcm/bcm2835-i2s.c @@ -312,6 +312,7 @@ static int bcm2835_i2s_hw_params(struct snd_pcm_substream *substream, switch (params_channels(params)) { case 2: + case 8: format = BCM2835_I2S_CH1(format) | BCM2835_I2S_CH2(format); format |= BCM2835_I2S_CH1(BCM2835_I2S_CHPOS(ch1pos)); format |= BCM2835_I2S_CH2(BCM2835_I2S_CHPOS(ch2pos)); @@ -577,7 +578,7 @@ static struct snd_soc_dai_driver bcm2835_i2s_dai = { .probe = bcm2835_i2s_dai_probe, .playback = { .channels_min = 2, - .channels_max = 2, + .channels_max = 8, .rates = SNDRV_PCM_RATE_8000_192000, .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE @@ -585,7 +586,7 @@ static struct snd_soc_dai_driver bcm2835_i2s_dai = { }, .capture = { .channels_min = 2, - .channels_max = 2, + .channels_max = 8, .rates = SNDRV_PCM_RATE_8000_192000, .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE -- 2.7.4

3 9

[alsa-devel] sound: unable to handle kernel paging request snd_seq_prioq_cell_out
by Dmitry Vyukov 06 Feb '17

06 Feb '17

Hello, The following program triggers wild memory access in snd_seq_prioq_cell_out: https://gist.githubusercontent.com/dvyukov/e0bfb47caf577217b3b0550866cba00b… BUG: unable to handle kernel paging request at ffffc9000392ddb8 IP: snd_seq_prioq_cell_out+0x11d/0x260 sound/core/seq/seq_prioq.c:231 PGD 6cc6f067 PUD 6cc70067 PMD 5f94c067 PTE 0 Oops: 0000 [#1] SMP KASAN Modules linked in: CPU: 2 PID: 375 Comm: syz-executor Not tainted 4.10.0-rc5+ #201 Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS Bochs 01/01/2011 task: ffff880066f92500 task.stack: ffff88005f740000 RIP: 0010:snd_seq_prioq_cell_out+0x11d/0x260 sound/core/seq/seq_prioq.c:231 RSP: 0018:ffff88005f7470b8 EFLAGS: 00010046 RAX: dffffc0000000000 RBX: 1ffff1000bee8e18 RCX: ffffc90000c22000 RDX: 1ffff92000725bb7 RSI: ffffffff8348787e RDI: ffffc9000392ddb8 RBP: ffff88005f747208 R08: 0000000000000001 R09: 0000000000000001 R10: dffffc0000000000 R11: 0000000000000004 R12: ffff8800673cbe80 R13: ffff88005f7471e0 R14: ffffc9000392dd90 R15: ffff8800673cbe98 FS: 00007f5262fee700(0000) GS:ffff88006d100000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 CR2: ffffc9000392ddb8 CR3: 0000000066209000 CR4: 00000000001406e0 Call Trace: snd_seq_prioq_delete+0x8b/0xf0 sound/core/seq/seq_prioq.c:90 queue_delete+0x77/0xb0 sound/core/seq/seq_queue.c:152 snd_seq_queue_client_leave+0x34/0x130 sound/core/seq/seq_queue.c:595 seq_free_client1.part.5+0x10a/0x410 sound/core/seq/seq_clientmgr.c:258 seq_free_client1 sound/core/seq/seq_clientmgr.c:255 [inline] seq_free_client+0x6f/0x170 sound/core/seq/seq_clientmgr.c:284 snd_seq_release+0x51/0xe0 sound/core/seq/seq_clientmgr.c:366 __fput+0x332/0x7f0 fs/file_table.c:208 ____fput+0x15/0x20 fs/file_table.c:244 task_work_run+0x18a/0x260 kernel/task_work.c:116 get_signal+0x148f/0x1820 kernel/signal.c:2143 do_signal+0xd2/0x2190 arch/x86/kernel/signal.c:807 exit_to_usermode_loop+0x200/0x2a0 arch/x86/entry/common.c:156 prepare_exit_to_usermode arch/x86/entry/common.c:190 [inline] syscall_return_slowpath+0x4d3/0x570 arch/x86/entry/common.c:259 entry_SYSCALL_64_fastpath+0xc0/0xc2 RIP: 0033:0x4457d9 RSP: 002b:00007f5262fedb58 EFLAGS: 00000286 ORIG_RAX: 0000000000000010 RAX: 0000000000000000 RBX: 00000000007080a8 RCX: 00000000004457d9 RDX: 0000000020001000 RSI: 000000004058534c RDI: 0000000000000005 RBP: 0000000000002250 R08: 0000000000000000 R09: 0000000000000000 R10: 0000000000000000 R11: 0000000000000286 R12: 00000000006e0310 R13: 0000000000000005 R14: 000000004058534c R15: 0000000020001000 Code: f6 0f 84 90 00 00 00 e8 02 1e 2a fe 49 8d 7e 28 48 b8 00 00 00 00 00 fc ff df 48 89 fa 48 c1 ea 03 80 3c 02 00 0f 85 1f 01 00 00 <49> 8b 46 28 49 8d 7c 24 08 48 89 fa 49 89 04 24 48 c1 ea 03 48 RIP: snd_seq_prioq_cell_out+0x11d/0x260 sound/core/seq/seq_prioq.c:231 RSP: ffff88005f7470b8 CR2: ffffc9000392ddb8 ---[ end trace cbaec69c4a9fdbfc ]--- On commit fd694aaa46c7ed811b72eb47d5eb11ce7ab3f7f1 (Jan 26).

2 2

[alsa-devel] [PATCH] ASoC: Intel: Skylake: Report Platform ID info from NHLT
by Subhransu S. Prusty 06 Feb '17

06 Feb '17

This patch create entry in sysfs file system to report the platform_id = "pci-id-oem_id-oem_table_id-oem_revision" for board identification. Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty(a)intel.com> Signed-off-by: Sodhi, VunnyX <vunnyx.sodhi(a)intel.com> --- sound/soc/intel/skylake/skl-nhlt.c | 42 +++++++++++++++++++++++++++++++++++--- sound/soc/intel/skylake/skl.c | 5 +++++ sound/soc/intel/skylake/skl.h | 2 ++ 3 files changed, 46 insertions(+), 3 deletions(-) diff --git a/sound/soc/intel/skylake/skl-nhlt.c b/sound/soc/intel/skylake/skl-nhlt.c index 3f8e6f0b7eb5..2710a3704a38 100644 --- a/sound/soc/intel/skylake/skl-nhlt.c +++ b/sound/soc/intel/skylake/skl-nhlt.c @@ -189,9 +189,9 @@ int skl_get_dmic_geo(struct skl *skl) return dmic_geo; } -static void skl_nhlt_trim_space(struct skl *skl) +static void skl_nhlt_trim_space(char *trim) { - char *s = skl->tplg_name; + char *s = trim; int cnt; int i; @@ -218,7 +218,43 @@ int skl_nhlt_update_topology_bin(struct skl *skl) skl->pci_id, nhlt->header.oem_id, nhlt->header.oem_table_id, nhlt->header.oem_revision, "-tplg.bin"); - skl_nhlt_trim_space(skl); + skl_nhlt_trim_space(skl->tplg_name); return 0; } + +static ssize_t skl_nhlt_platform_id_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct pci_dev *pci = to_pci_dev(dev); + struct hdac_ext_bus *ebus = pci_get_drvdata(pci); + struct skl *skl = ebus_to_skl(ebus); + struct nhlt_acpi_table *nhlt = (struct nhlt_acpi_table *)skl->nhlt; + char platform_id[32]; + + sprintf(platform_id, "%x-%.6s-%.8s-%d", skl->pci_id, + nhlt->header.oem_id, nhlt->header.oem_table_id, + nhlt->header.oem_revision); + + skl_nhlt_trim_space(platform_id); + return sprintf(buf, "%s\n", platform_id); +} + +static DEVICE_ATTR(platform_id, 0444, skl_nhlt_platform_id_show, NULL); + +int skl_nhlt_create_sysfs(struct skl *skl) +{ + struct device *dev = &skl->pci->dev; + + if (sysfs_create_file(&dev->kobj, &dev_attr_platform_id.attr)) + dev_warn(dev, "Error creating sysfs entry\n"); + + return 0; +} + +void skl_nhlt_remove_sysfs(struct skl *skl) +{ + struct device *dev = &skl->pci->dev; + + sysfs_remove_file(&dev->kobj, &dev_attr_platform_id.attr); +} diff --git a/sound/soc/intel/skylake/skl.c b/sound/soc/intel/skylake/skl.c index da5db5098274..1152e46daede 100644 --- a/sound/soc/intel/skylake/skl.c +++ b/sound/soc/intel/skylake/skl.c @@ -732,6 +732,10 @@ static int skl_probe(struct pci_dev *pci, goto out_display_power_off; } + err = skl_nhlt_create_sysfs(skl); + if (err < 0) + goto out_nhlt_free; + skl_nhlt_update_topology_bin(skl); pci_set_drvdata(skl->pci, ebus); @@ -852,6 +856,7 @@ static void skl_remove(struct pci_dev *pci) skl_free_dsp(skl); skl_machine_device_unregister(skl); skl_dmic_device_unregister(skl); + skl_nhlt_remove_sysfs(skl); skl_nhlt_free(skl->nhlt); skl_free(ebus); dev_set_drvdata(&pci->dev, NULL); diff --git a/sound/soc/intel/skylake/skl.h b/sound/soc/intel/skylake/skl.h index 4986e3929dd3..0a1b02e21277 100644 --- a/sound/soc/intel/skylake/skl.h +++ b/sound/soc/intel/skylake/skl.h @@ -130,5 +130,7 @@ struct nhlt_specific_cfg *skl_get_ep_blob(struct skl *skl, u32 instance, void skl_cleanup_resources(struct skl *skl); const struct skl_dsp_ops *skl_get_dsp_ops(int pci_id); void skl_update_d0i3c(struct device *dev, bool enable); +int skl_nhlt_create_sysfs(struct skl *skl); +void skl_nhlt_remove_sysfs(struct skl *skl); #endif /* __SOUND_SOC_SKL_H */ -- 1.9.1

2 1

[alsa-devel] [sound:topic/intel-lpe-audio-dp 4/16] sound/x86/intel_hdmi_audio_if.c:112:30: error: 'struct dev_pm_info' has no member named 'runtime_status'
by kbuild test robot 05 Feb '17

05 Feb '17

tree: https://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound.git topic/intel-lpe-audio-dp head: 9db13e5f2d6dc85150cb8a69ab220b84d9b9fbe7 commit: 5dab11d89777230b3ff38f19ee1b6fbba9688b23 [4/16] ALSA: x86: hdmi: Add audio support for BYT and CHT config: i386-randconfig-x076-02050830 (attached as .config) compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901 reproduce: git checkout 5dab11d89777230b3ff38f19ee1b6fbba9688b23 # save the attached .config to linux build tree make ARCH=i386 All errors (new ones prefixed by >>): sound/x86/intel_hdmi_audio_if.c: In function 'hdmi_audio_suspend': >> sound/x86/intel_hdmi_audio_if.c:112:30: error: 'struct dev_pm_info' has no member named 'runtime_status' if (intelhaddata->dev->power.runtime_status != RPM_SUSPENDED) { ^ vim +112 sound/x86/intel_hdmi_audio_if.c 106 107 pr_debug("Enter:%s\n", __func__); 108 109 had_stream = intelhaddata->private_data; 110 substream = intelhaddata->stream_info.had_substream; 111 > 112 if (intelhaddata->dev->power.runtime_status != RPM_SUSPENDED) { 113 pr_err("audio stream is active\n"); 114 return -EAGAIN; 115 } --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation

1 0

[alsa-devel] [PATCH 0/3] Yet more cleanups for intel-lpe-audio
by Takashi Iwai 05 Feb '17

05 Feb '17

Yet another cleanup patchset, only cosmetic, no real functional changes. Takashi === Takashi Iwai (3): ALSA: x86: Minor cleanup of reset buffer procedure ALSA: x86: Unify local function prefix ALSA: pcm: Define dummy snd_pcm_suspend() for CONFIG_PM=n include/sound/pcm.h | 9 +++ sound/x86/intel_hdmi_audio.c | 140 ++++++++++++++++++++----------------------- 2 files changed, 75 insertions(+), 74 deletions(-) -- 2.11.0

1 3

[alsa-devel] [PATCH v3 00/10] Allwinner H5 and Orange Pi PC2 support
by Icenowy Zheng 05 Feb '17

05 Feb '17

Allwinner H5 is a 64-bit SoC with a design like the 32-bit H3. This patchset adds support for it, along with the first available board -- Orange Pi PC2. Some drivers are also enabled to be built on ARM64 ARCH_SUNXI platform, in order to make the internal audio codec work. Andre Przywara (3): arm: dts: sun8i: split Allwinner H3 .dtsi arm64: dts: allwinner: add Allwinner H5 .dtsi arm64: dts: sunxi: add support for the Orange Pi PC 2 board Icenowy Zheng (7): drivers: pinctrl: add driver for Allwinner H5 SoC arm64: allwinner: Kconfig: add essential pinctrl driver for H5 clk: sunxi-ng: rename sun8i-h3 driver to sunxi-h3-h5 clk: sunxi-ng: add support for Allwinner H5 SoC clk: sunxi-ng: remove transitional headers for dt-bindings dmaengine: sun6i: allow build on ARM64 platforms (sun50i) ASoC: sunxi: allow the analog codec driver to be built on ARM64 .../devicetree/bindings/clock/sunxi-ccu.txt | 1 + .../bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 1 + arch/arm/boot/dts/sun8i-h3.dtsi | 571 ++------------------- arch/arm/boot/dts/sunxi-h3-h5.dtsi | 557 ++++++++++++++++++++ arch/arm64/Kconfig.platforms | 5 +- arch/arm64/boot/dts/allwinner/Makefile | 1 + .../boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts | 164 ++++++ arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 139 +++++ arch/arm64/boot/dts/allwinner/sunxi-h3-h5.dtsi | 1 + drivers/clk/sunxi-ng/Kconfig | 6 +- drivers/clk/sunxi-ng/Makefile | 2 +- .../sunxi-ng/{ccu-sun8i-h3.c => ccu-sunxi-h3-h5.c} | 179 ++++++- .../sunxi-ng/{ccu-sun8i-h3.h => ccu-sunxi-h3-h5.h} | 15 +- drivers/dma/Kconfig | 2 +- drivers/pinctrl/sunxi/Kconfig | 4 + drivers/pinctrl/sunxi/Makefile | 1 + drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c | 558 ++++++++++++++++++++ .../clock/{sun8i-h3-ccu.h => sunxi-h3-h5-ccu.h} | 11 +- .../reset/{sun8i-h3-ccu.h => sunxi-h3-h5-ccu.h} | 11 +- sound/soc/sunxi/Kconfig | 2 +- 20 files changed, 1662 insertions(+), 569 deletions(-) create mode 100644 arch/arm/boot/dts/sunxi-h3-h5.dtsi create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi create mode 120000 arch/arm64/boot/dts/allwinner/sunxi-h3-h5.dtsi rename drivers/clk/sunxi-ng/{ccu-sun8i-h3.c => ccu-sunxi-h3-h5.c} (80%) rename drivers/clk/sunxi-ng/{ccu-sun8i-h3.h => ccu-sunxi-h3-h5.h} (82%) create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c rename include/dt-bindings/clock/{sun8i-h3-ccu.h => sunxi-h3-h5-ccu.h} (95%) rename include/dt-bindings/reset/{sun8i-h3-ccu.h => sunxi-h3-h5-ccu.h} (94%) -- 2.11.0

5 22

[alsa-devel] [asoc:topic/es8328 26/26] es8328-spi.c:undefined reference to `__devm_regmap_init_spi'
by kbuild test robot 05 Feb '17

05 Feb '17

tree: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git topic/es8328 head: aa00f2c8aff7b85f882b6fd1706fc4241046aba7 commit: aa00f2c8aff7b85f882b6fd1706fc4241046aba7 [26/26] ASoC: Allow to select ES8328_I2C and ES8328_SPI directly config: x86_64-randconfig-i0-02050637 (attached as .config) compiler: gcc-4.9 (Debian 4.9.4-2) 4.9.4 reproduce: git checkout aa00f2c8aff7b85f882b6fd1706fc4241046aba7 # save the attached .config to linux build tree make ARCH=x86_64 All errors (new ones prefixed by >>): sound/built-in.o: In function `es8328_spi_probe': >> es8328-spi.c:(.text+0x517fe): undefined reference to `__devm_regmap_init_spi' sound/built-in.o: In function `es8328_spi_driver_init': >> es8328-spi.c:(.init.text+0x1a84): undefined reference to `__spi_register_driver' --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation

1 0

[alsa-devel] [sound:topic/intel-lpe-audio 60/69] sound/x86/intel_hdmi_audio.c:1796:3: error: implicit declaration of function 'snd_pcm_suspend'
by kbuild test robot 05 Feb '17

05 Feb '17

tree: https://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound.git topic/intel-lpe-audio head: 91b0cb0cc07bcb5114df2897531f4ea41c148c8e commit: 182cdf23dbf6672954ac646871bf5902050268c7 [60/69] ALSA: x86: Implement runtime PM config: i386-randconfig-x076-02050830 (attached as .config) compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901 reproduce: git checkout 182cdf23dbf6672954ac646871bf5902050268c7 # save the attached .config to linux build tree make ARCH=i386 All errors (new ones prefixed by >>): sound/x86/intel_hdmi_audio.c: In function 'hdmi_lpe_audio_runtime_suspend': >> sound/x86/intel_hdmi_audio.c:1796:3: error: implicit declaration of function 'snd_pcm_suspend' [-Werror=implicit-function-declaration] snd_pcm_suspend(substream); ^~~~~~~~~~~~~~~ At top level: sound/x86/intel_hdmi_audio.c:1814:12: warning: 'hdmi_lpe_audio_resume' defined but not used [-Wunused-function] static int hdmi_lpe_audio_resume(struct device *dev) ^~~~~~~~~~~~~~~~~~~~~ sound/x86/intel_hdmi_audio.c:1803:12: warning: 'hdmi_lpe_audio_suspend' defined but not used [-Wunused-function] static int hdmi_lpe_audio_suspend(struct device *dev) ^~~~~~~~~~~~~~~~~~~~~~ cc1: some warnings being treated as errors vim +/snd_pcm_suspend +1796 sound/x86/intel_hdmi_audio.c 1790 { 1791 struct snd_intelhad *ctx = dev_get_drvdata(dev); 1792 struct snd_pcm_substream *substream; 1793 1794 substream = had_substream_get(ctx); 1795 if (substream) { > 1796 snd_pcm_suspend(substream); 1797 had_substream_put(ctx); 1798 } 1799 --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation

1 0

Re: [alsa-devel] [PATCH] ASoC: rt5670: add HS ground control
by Mark Brown 04 Feb '17

04 Feb '17

On Thu, Feb 02, 2017 at 02:38:55AM +0000, Bard Liao wrote: > It is a codec GPIO, indeed. But we don't register it to gpiolib. > So there is no other way to touch the GPIO. We are using it to > do headset ground control and we should control its level according > to if headset is using. That's why we control it by a DAPM event. So one option here would be to register it with gpiolib...

1 0

[alsa-devel] [PATCH v8 0/4] Add support for es8388 and hdmi audio on the rock2
by Romain Perier 04 Feb '17

04 Feb '17

This set of patches adds a machine driver for rk3288-based boards that have the built-in HDMI audio and a generic analog output. It also adds slave mode to the es8328 driver that currently only supported the master mode. Then, it adds the required DT definitions to link rockchip-i2s to the es8388 analog output and to hdmi audio. This work is based on the initial work that was done by Sjoerd Simons <sjoerd.simons(a)collabora.co.uk> with some improvements, changes and more commits. Changes in v8: - Fixed unmet direct dependencies for SND_SOC_IMX_ES8328 caused by patch 2/4 Changes in v7: - Added patch 2/4 - No longer select ES8328_I2C for RK3288_HDMI_ANALOG - Fixed DT regulator names in the DT for the Rock2 - Splitted pins for the headphone in the DT for the Rock2 Changes in v6: - Fixed bad error handling for gpio in rk3288_analog_hdmi.c - Removed message duplication in rk_hw_params(), in rk3288_analog_hdmi.c - Removed patch 1/4 (from the previous series), as it has been merged Changes in v5: - Fixed coding style issue in patch 2/4 (the switch case). - Moved the code for the master mode and the slave mode into the switch case for patch 2/4 - Fixed error handling for patch 3/4 Changes in v4: - Add support for multi codecs in the asoc machine driver, so the driver matches the hw architecture (analog and hdmi audio are connected on the same i2s line) - Renamed the driver to rk3288-hdmi-analog.c and changed its documentation - Add built-in support for hdmi audio in this driver - Add support for the property 'rockchip,routing' Changes in v3: - Cosmetic changes in rockchip_es8388.c - Added missing email to MODULE_AUTHOR in rockchip_es8388.c Changes in v2: - Fixed wrong use of the data structure i2c_device_id - Fixed wrong dependencies for SND_SOC_ROCKCHIP_ES8388 Romain Perier (4): ASoC: es8328: Add support for slave mode ASoC: Allow to select ES8328_I2C and ES8328_SPI directly ASoC: rockchip: Add machine driver for RK3288 boards that use analog/HDMI arm: dts: Add support for ES8388 to the Radxa Rock 2 .../bindings/sound/rockchip,rk3288-hdmi-analog.txt | 36 +++ arch/arm/boot/dts/rk3288-rock2-som.dtsi | 2 +- arch/arm/boot/dts/rk3288-rock2-square.dts | 42 +++ sound/soc/codecs/Kconfig | 8 +- sound/soc/codecs/es8328.c | 20 +- sound/soc/fsl/Kconfig | 2 +- sound/soc/rockchip/Kconfig | 9 + sound/soc/rockchip/Makefile | 2 + sound/soc/rockchip/rk3288_hdmi_analog.c | 299 +++++++++++++++++++++ 9 files changed, 408 insertions(+), 12 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/rockchip,rk3288-hdmi-analog.txt create mode 100644 sound/soc/rockchip/rk3288_hdmi_analog.c -- 2.9.3

3 6

[alsa-devel] [PATCH v5 0/4] Add support for es8388 and hdmi audio on the rock2
by Romain Perier 04 Feb '17

04 Feb '17

This set of patches adds a machine driver for rk3288-based boards that have the built-in HDMI audio and a generic analog output. It also adds slave mode to the es8328 driver that currently only supported the master mode. Then, it adds the required DT definitions to link rockchip-i2s to the es8388 analog output and to hdmi audio. This work is based on the initial work that was done by Sjoerd Simons <sjoerd.simons(a)collabora.co.uk> with some improvements, changes and more commits. Changes in v5: - Fixed coding style issue in patch 2/4 (the switch case). - Moved the code for the master mode and the slave mode into the switch case for patch 2/4 - Fixed error handling for patch 3/4 Changes in v4: - Add support for multi codecs in the asoc machine driver, so the driver matches the hw architecture (analog and hdmi audio are connected on the same i2s line) - Renamed the driver to rk3288-hdmi-analog.c and changed its documentation - Add built-in support for hdmi audio in this driver - Add support for the property 'rockchip,routing' Changes in v3: - Cosmetic changes in rockchip_es8388.c - Added missing email to MODULE_AUTHOR in rockchip_es8388.c Changes in v2: - Fixed wrong use of the data structure i2c_device_id - Fixed wrong dependencies for SND_SOC_ROCKCHIP_ES8388 Romain Perier (4): ASoC: es8328-i2c: Add compatible for ES8388 ASoC: es8328: Add support for slave mode ASoC: rockchip: Add machine driver for RK3288 boards that use analog/HDMI arm: dts: Add support for ES8388 to the Radxa Rock 2 Documentation/devicetree/bindings/sound/es8328.txt | 2 +- .../bindings/sound/rockchip,rk3288-hdmi-analog.txt | 36 +++ arch/arm/boot/dts/rk3288-rock2-square.dts | 39 +++ sound/soc/codecs/es8328-i2c.c | 2 + sound/soc/codecs/es8328.c | 20 +- sound/soc/rockchip/Kconfig | 10 + sound/soc/rockchip/Makefile | 2 + sound/soc/rockchip/rk3288_hdmi_analog.c | 299 +++++++++++++++++++++ 8 files changed, 403 insertions(+), 7 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/rockchip,rk3288-hdmi-analog.txt create mode 100644 sound/soc/rockchip/rk3288_hdmi_analog.c -- 2.9.3

2 6

[alsa-devel] [PATCH v7 0/4] Add support for es8388 and hdmi audio on the rock2
by Romain Perier 04 Feb '17

04 Feb '17

This set of patches adds a machine driver for rk3288-based boards that have the built-in HDMI audio and a generic analog output. It also adds slave mode to the es8328 driver that currently only supported the master mode. Then, it adds the required DT definitions to link rockchip-i2s to the es8388 analog output and to hdmi audio. This work is based on the initial work that was done by Sjoerd Simons <sjoerd.simons(a)collabora.co.uk> with some improvements, changes and more commits. Changes in v7: - Added patch 2/4 - No longer select ES8328_I2C for RK3288_HDMI_ANALOG - Fixed DT regulator names in the DT for the Rock2 - Splitted pins for the headphone in the DT for the Rock2 Changes in v6: - Fixed bad error handling for gpio in rk3288_analog_hdmi.c - Removed message duplication in rk_hw_params(), in rk3288_analog_hdmi.c - Removed patch 1/4 (from the previous series), as it has been merged Changes in v5: - Fixed coding style issue in patch 2/4 (the switch case). - Moved the code for the master mode and the slave mode into the switch case for patch 2/4 - Fixed error handling for patch 3/4 Changes in v4: - Add support for multi codecs in the asoc machine driver, so the driver matches the hw architecture (analog and hdmi audio are connected on the same i2s line) - Renamed the driver to rk3288-hdmi-analog.c and changed its documentation - Add built-in support for hdmi audio in this driver - Add support for the property 'rockchip,routing' Changes in v3: - Cosmetic changes in rockchip_es8388.c - Added missing email to MODULE_AUTHOR in rockchip_es8388.c Changes in v2: - Fixed wrong use of the data structure i2c_device_id - Fixed wrong dependencies for SND_SOC_ROCKCHIP_ES8388 Romain Perier (4): ASoC: es8328: Add support for slave mode ASoC: Allow to select ES8328_I2C and ES8328_SPI directly ASoC: rockchip: Add machine driver for RK3288 boards that use analog/HDMI arm: dts: Add support for ES8388 to the Radxa Rock 2 .../bindings/sound/rockchip,rk3288-hdmi-analog.txt | 36 +++ arch/arm/boot/dts/rk3288-rock2-som.dtsi | 2 +- arch/arm/boot/dts/rk3288-rock2-square.dts | 42 +++ sound/soc/codecs/Kconfig | 8 +- sound/soc/codecs/es8328.c | 20 +- sound/soc/rockchip/Kconfig | 9 + sound/soc/rockchip/Makefile | 2 + sound/soc/rockchip/rk3288_hdmi_analog.c | 299 +++++++++++++++++++++ 8 files changed, 407 insertions(+), 11 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/rockchip,rk3288-hdmi-analog.txt create mode 100644 sound/soc/rockchip/rk3288_hdmi_analog.c -- 2.9.3

3 6

[alsa-devel] [PATCH 0/7] Add STM32 DFSDM support
by Arnaud Pouliquen 04 Feb '17

04 Feb '17

This patch-set handles the Digital Filter for Sigma Delta modulators IP on STM32 platforms. DFSDM IP allows PDM microphone capture and sigma delta ADC conversion. Those two features are mixed into the registers of the same hardware block which lead to introduce a multifunction driver on the top of them to be able to share the registers. for This, MFD exports an API based on get/configure/start/stop/release mechanisms. Two kind of resources are handled by the MFD driver. - The filters: - 4 instances available for L4 and H7 - composed with a SInC filter and an integrator - The transceivers or channels - 8 instances available for L4 and H7 - can be connected to serial transceivers (SPI or Manchester mode) internal parallel transceivers (from memory or internal ADC) - associated monitoring: analog watchdog, short circuit detector, extreme detector (monitoring support will be part of a specific patch-set)) Principle OF the DFSDM IP is to connect one or several channels to a filter to process Sigma delta ADC or PDM microphone data. Two types of child devices can de declared: IIO for the management of Sigma Delta ADC conversion. ASoC for PDM microphone audio capture. For details on IP and use case examples please refer to this document: http://www.st.com/content/ccc/resource/training/technical/product_training/… Remark: For audio part a patch is proposed to update core part to add copy support in soc_dmaengine_pcm. Rational is that output data register in DFSDM contains audio sample on 24 MSB + channel ID on the 8 LSB. Proposal is to allow to register a copy ops in soc_dmaengine_pcm to be able to perform post-processing. Back up if not accepted can be to create a pcm_engine in stm32 driver. Not part of this patch-set, but should come as add-on patches: - IIO management of Analog watchdog, short-circuit detection and clock absence detector, with associated IRQs management. - IIO trigger and buffer management. Arnaud Pouliquen (6): MFD: add bindings for STM32 DFSDM driver MFD: add STM32 DFSDM support IIO: add bindings for STM32 DFSDM ADC driver IIO: add STM32 DFSDM ADC support ASoC: add bindings for STM32 DFSDM driver ASoC: add STM32 DFSDM support olivier moysan (1): ASoC: dmaengine_pcm: add copy support .../bindings/iio/adc/st,stm32-dfsdm-adc.txt | 60 ++ .../devicetree/bindings/mfd/stm32-dfsdm.txt | 68 ++ .../devicetree/bindings/sound/st,sm32-adfsdm.txt | 84 ++ drivers/iio/adc/Kconfig | 9 + drivers/iio/adc/Makefile | 1 + drivers/iio/adc/stm32-dfsdm-adc.c | 676 +++++++++++++ drivers/mfd/Kconfig | 11 + drivers/mfd/Makefile | 2 + drivers/mfd/stm32-dfsdm-reg.h | 220 +++++ drivers/mfd/stm32-dfsdm.c | 1044 ++++++++++++++++++++ include/linux/mfd/stm32-dfsdm.h | 324 ++++++ include/sound/dmaengine_pcm.h | 3 + sound/soc/Kconfig | 1 + sound/soc/Makefile | 1 + sound/soc/soc-generic-dmaengine-pcm.c | 37 +- sound/soc/stm/Kconfig | 10 + sound/soc/stm/Makefile | 2 + sound/soc/stm/stm32_adfsdm.c | 686 +++++++++++++ 18 files changed, 3237 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.txt create mode 100644 Documentation/devicetree/bindings/mfd/stm32-dfsdm.txt create mode 100644 Documentation/devicetree/bindings/sound/st,sm32-adfsdm.txt create mode 100644 drivers/iio/adc/stm32-dfsdm-adc.c create mode 100644 drivers/mfd/stm32-dfsdm-reg.h create mode 100644 drivers/mfd/stm32-dfsdm.c create mode 100644 include/linux/mfd/stm32-dfsdm.h create mode 100644 sound/soc/stm/Kconfig create mode 100644 sound/soc/stm/Makefile create mode 100644 sound/soc/stm/stm32_adfsdm.c -- 1.9.1

7 42

[alsa-devel] Applied "ASoC: nau8540: new codec driver" to the asoc tree
by Mark Brown 04 Feb '17

04 Feb '17

The patch ASoC: nau8540: new codec driver has been applied to the asoc tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From c1644e3de45deb60f64548d8e112e44b48b0b6e0 Mon Sep 17 00:00:00 2001 From: John Hsu <KCHSU0(a)nuvoton.com> Date: Fri, 3 Feb 2017 16:19:24 +0800 Subject: [PATCH] ASoC: nau8540: new codec driver Add codec driver of NAU85L40 Signed-off-by: John Hsu <KCHSU0(a)nuvoton.com> Signed-off-by: Mark Brown <broonie(a)kernel.org> --- .../devicetree/bindings/sound/nau8540.txt | 16 + sound/soc/codecs/Kconfig | 5 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/nau8540.c | 835 +++++++++++++++++++++ sound/soc/codecs/nau8540.h | 222 ++++++ 5 files changed, 1080 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/nau8540.txt create mode 100644 sound/soc/codecs/nau8540.c create mode 100644 sound/soc/codecs/nau8540.h diff --git a/Documentation/devicetree/bindings/sound/nau8540.txt b/Documentation/devicetree/bindings/sound/nau8540.txt new file mode 100644 index 000000000000..307a76528320 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/nau8540.txt @@ -0,0 +1,16 @@ +NAU85L40 audio CODEC + +This device supports I2C only. + +Required properties: + + - compatible : "nuvoton,nau8540" + + - reg : the I2C address of the device. + +Example: + +codec: nau8540@1c { + compatible = "nuvoton,nau8540"; + reg = <0x1c>; +}; diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index 9e1718a8cb1c..d98912a25095 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -95,6 +95,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_MAX9877 if I2C select SND_SOC_MC13783 if MFD_MC13XXX select SND_SOC_ML26124 if I2C + select SND_SOC_NAU8540 if I2C select SND_SOC_NAU8810 if I2C select SND_SOC_NAU8825 if I2C select SND_SOC_HDMI_CODEC @@ -1105,6 +1106,10 @@ config SND_SOC_MC13783 config SND_SOC_ML26124 tristate +config SND_SOC_NAU8540 + tristate "Nuvoton Technology Corporation NAU85L40 CODEC" + depends on I2C + config SND_SOC_NAU8810 tristate "Nuvoton Technology Corporation NAU88C10 CODEC" depends on I2C diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index 7e1dad79610b..0a7f4ffe0d78 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -90,6 +90,7 @@ snd-soc-mc13783-objs := mc13783.o snd-soc-ml26124-objs := ml26124.o snd-soc-msm8916-analog-objs := msm8916-wcd-analog.o snd-soc-msm8916-digital-objs := msm8916-wcd-digital.o +snd-soc-nau8540-objs := nau8540.o snd-soc-nau8810-objs := nau8810.o snd-soc-nau8825-objs := nau8825.o snd-soc-hdmi-codec-objs := hdmi-codec.o @@ -318,6 +319,7 @@ obj-$(CONFIG_SND_SOC_MC13783) += snd-soc-mc13783.o obj-$(CONFIG_SND_SOC_ML26124) += snd-soc-ml26124.o obj-$(CONFIG_SND_SOC_MSM8916_WCD_ANALOG) +=snd-soc-msm8916-analog.o obj-$(CONFIG_SND_SOC_MSM8916_WCD_DIGITAL) +=snd-soc-msm8916-digital.o +obj-$(CONFIG_SND_SOC_NAU8540) += snd-soc-nau8540.o obj-$(CONFIG_SND_SOC_NAU8810) += snd-soc-nau8810.o obj-$(CONFIG_SND_SOC_NAU8825) += snd-soc-nau8825.o obj-$(CONFIG_SND_SOC_HDMI_CODEC) += snd-soc-hdmi-codec.o diff --git a/sound/soc/codecs/nau8540.c b/sound/soc/codecs/nau8540.c new file mode 100644 index 000000000000..9e8f0f4aa51a --- /dev/null +++ b/sound/soc/codecs/nau8540.c @@ -0,0 +1,835 @@ +/* + * NAU85L40 ALSA SoC audio driver + * + * Copyright 2016 Nuvoton Technology Corp. + * Author: John Hsu <KCHSU0(a)nuvoton.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/module.h> +#include <linux/moduleparam.h> +#include <linux/init.h> +#include <linux/delay.h> +#include <linux/pm.h> +#include <linux/i2c.h> +#include <linux/regmap.h> +#include <linux/regulator/consumer.h> +#include <linux/spi/spi.h> +#include <linux/slab.h> +#include <linux/of_device.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/soc.h> +#include <sound/soc-dapm.h> +#include <sound/initval.h> +#include <sound/tlv.h> +#include "nau8540.h" + + +#define NAU_FREF_MAX 13500000 +#define NAU_FVCO_MAX 100000000 +#define NAU_FVCO_MIN 90000000 + +/* the maximum frequency of CLK_ADC */ +#define CLK_ADC_MAX 6144000 + +/* scaling for mclk from sysclk_src output */ +static const struct nau8540_fll_attr mclk_src_scaling[] = { + { 1, 0x0 }, + { 2, 0x2 }, + { 4, 0x3 }, + { 8, 0x4 }, + { 16, 0x5 }, + { 32, 0x6 }, + { 3, 0x7 }, + { 6, 0xa }, + { 12, 0xb }, + { 24, 0xc }, +}; + +/* ratio for input clk freq */ +static const struct nau8540_fll_attr fll_ratio[] = { + { 512000, 0x01 }, + { 256000, 0x02 }, + { 128000, 0x04 }, + { 64000, 0x08 }, + { 32000, 0x10 }, + { 8000, 0x20 }, + { 4000, 0x40 }, +}; + +static const struct nau8540_fll_attr fll_pre_scalar[] = { + { 1, 0x0 }, + { 2, 0x1 }, + { 4, 0x2 }, + { 8, 0x3 }, +}; + +/* over sampling rate */ +static const struct nau8540_osr_attr osr_adc_sel[] = { + { 32, 3 }, /* OSR 32, SRC 1/8 */ + { 64, 2 }, /* OSR 64, SRC 1/4 */ + { 128, 1 }, /* OSR 128, SRC 1/2 */ + { 256, 0 }, /* OSR 256, SRC 1 */ +}; + +static const struct reg_default nau8540_reg_defaults[] = { + {NAU8540_REG_POWER_MANAGEMENT, 0x0000}, + {NAU8540_REG_CLOCK_CTRL, 0x0000}, + {NAU8540_REG_CLOCK_SRC, 0x0000}, + {NAU8540_REG_FLL1, 0x0001}, + {NAU8540_REG_FLL2, 0x3126}, + {NAU8540_REG_FLL3, 0x0008}, + {NAU8540_REG_FLL4, 0x0010}, + {NAU8540_REG_FLL5, 0xC000}, + {NAU8540_REG_FLL6, 0x6000}, + {NAU8540_REG_FLL_VCO_RSV, 0xF13C}, + {NAU8540_REG_PCM_CTRL0, 0x000B}, + {NAU8540_REG_PCM_CTRL1, 0x3010}, + {NAU8540_REG_PCM_CTRL2, 0x0800}, + {NAU8540_REG_PCM_CTRL3, 0x0000}, + {NAU8540_REG_PCM_CTRL4, 0x000F}, + {NAU8540_REG_ALC_CONTROL_1, 0x0000}, + {NAU8540_REG_ALC_CONTROL_2, 0x700B}, + {NAU8540_REG_ALC_CONTROL_3, 0x0022}, + {NAU8540_REG_ALC_CONTROL_4, 0x1010}, + {NAU8540_REG_ALC_CONTROL_5, 0x1010}, + {NAU8540_REG_NOTCH_FIL1_CH1, 0x0000}, + {NAU8540_REG_NOTCH_FIL2_CH1, 0x0000}, + {NAU8540_REG_NOTCH_FIL1_CH2, 0x0000}, + {NAU8540_REG_NOTCH_FIL2_CH2, 0x0000}, + {NAU8540_REG_NOTCH_FIL1_CH3, 0x0000}, + {NAU8540_REG_NOTCH_FIL2_CH3, 0x0000}, + {NAU8540_REG_NOTCH_FIL1_CH4, 0x0000}, + {NAU8540_REG_NOTCH_FIL2_CH4, 0x0000}, + {NAU8540_REG_HPF_FILTER_CH12, 0x0000}, + {NAU8540_REG_HPF_FILTER_CH34, 0x0000}, + {NAU8540_REG_ADC_SAMPLE_RATE, 0x0002}, + {NAU8540_REG_DIGITAL_GAIN_CH1, 0x0400}, + {NAU8540_REG_DIGITAL_GAIN_CH2, 0x0400}, + {NAU8540_REG_DIGITAL_GAIN_CH3, 0x0400}, + {NAU8540_REG_DIGITAL_GAIN_CH4, 0x0400}, + {NAU8540_REG_DIGITAL_MUX, 0x00E4}, + {NAU8540_REG_GPIO_CTRL, 0x0000}, + {NAU8540_REG_MISC_CTRL, 0x0000}, + {NAU8540_REG_I2C_CTRL, 0xEFFF}, + {NAU8540_REG_VMID_CTRL, 0x0000}, + {NAU8540_REG_MUTE, 0x0000}, + {NAU8540_REG_ANALOG_ADC1, 0x0011}, + {NAU8540_REG_ANALOG_ADC2, 0x0020}, + {NAU8540_REG_ANALOG_PWR, 0x0000}, + {NAU8540_REG_MIC_BIAS, 0x0004}, + {NAU8540_REG_REFERENCE, 0x0000}, + {NAU8540_REG_FEPGA1, 0x0000}, + {NAU8540_REG_FEPGA2, 0x0000}, + {NAU8540_REG_FEPGA3, 0x0101}, + {NAU8540_REG_FEPGA4, 0x0101}, + {NAU8540_REG_PWR, 0x0000}, +}; + +static bool nau8540_readable_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case NAU8540_REG_POWER_MANAGEMENT ... NAU8540_REG_FLL_VCO_RSV: + case NAU8540_REG_PCM_CTRL0 ... NAU8540_REG_PCM_CTRL4: + case NAU8540_REG_ALC_CONTROL_1 ... NAU8540_REG_ALC_CONTROL_5: + case NAU8540_REG_ALC_GAIN_CH12 ... NAU8540_REG_ADC_SAMPLE_RATE: + case NAU8540_REG_DIGITAL_GAIN_CH1 ... NAU8540_REG_DIGITAL_MUX: + case NAU8540_REG_P2P_CH1 ... NAU8540_REG_I2C_CTRL: + case NAU8540_REG_I2C_DEVICE_ID: + case NAU8540_REG_VMID_CTRL ... NAU8540_REG_MUTE: + case NAU8540_REG_ANALOG_ADC1 ... NAU8540_REG_PWR: + return true; + default: + return false; + } + +} + +static bool nau8540_writeable_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case NAU8540_REG_SW_RESET ... NAU8540_REG_FLL_VCO_RSV: + case NAU8540_REG_PCM_CTRL0 ... NAU8540_REG_PCM_CTRL4: + case NAU8540_REG_ALC_CONTROL_1 ... NAU8540_REG_ALC_CONTROL_5: + case NAU8540_REG_NOTCH_FIL1_CH1 ... NAU8540_REG_ADC_SAMPLE_RATE: + case NAU8540_REG_DIGITAL_GAIN_CH1 ... NAU8540_REG_DIGITAL_MUX: + case NAU8540_REG_GPIO_CTRL ... NAU8540_REG_I2C_CTRL: + case NAU8540_REG_RST: + case NAU8540_REG_VMID_CTRL ... NAU8540_REG_MUTE: + case NAU8540_REG_ANALOG_ADC1 ... NAU8540_REG_PWR: + return true; + default: + return false; + } +} + +static bool nau8540_volatile_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case NAU8540_REG_SW_RESET: + case NAU8540_REG_ALC_GAIN_CH12 ... NAU8540_REG_ALC_STATUS: + case NAU8540_REG_P2P_CH1 ... NAU8540_REG_PEAK_CH4: + case NAU8540_REG_I2C_DEVICE_ID: + case NAU8540_REG_RST: + return true; + default: + return false; + } +} + + +static const DECLARE_TLV_DB_MINMAX(adc_vol_tlv, -12800, 3600); +static const DECLARE_TLV_DB_MINMAX(fepga_gain_tlv, -100, 3600); + +static const struct snd_kcontrol_new nau8540_snd_controls[] = { + SOC_SINGLE_TLV("Mic1 Volume", NAU8540_REG_DIGITAL_GAIN_CH1, + 0, 0x520, 0, adc_vol_tlv), + SOC_SINGLE_TLV("Mic2 Volume", NAU8540_REG_DIGITAL_GAIN_CH2, + 0, 0x520, 0, adc_vol_tlv), + SOC_SINGLE_TLV("Mic3 Volume", NAU8540_REG_DIGITAL_GAIN_CH3, + 0, 0x520, 0, adc_vol_tlv), + SOC_SINGLE_TLV("Mic4 Volume", NAU8540_REG_DIGITAL_GAIN_CH4, + 0, 0x520, 0, adc_vol_tlv), + + SOC_SINGLE_TLV("Frontend PGA1 Volume", NAU8540_REG_FEPGA3, + 0, 0x25, 0, fepga_gain_tlv), + SOC_SINGLE_TLV("Frontend PGA2 Volume", NAU8540_REG_FEPGA3, + 8, 0x25, 0, fepga_gain_tlv), + SOC_SINGLE_TLV("Frontend PGA3 Volume", NAU8540_REG_FEPGA4, + 0, 0x25, 0, fepga_gain_tlv), + SOC_SINGLE_TLV("Frontend PGA4 Volume", NAU8540_REG_FEPGA4, + 8, 0x25, 0, fepga_gain_tlv), +}; + +static const char * const adc_channel[] = { + "ADC channel 1", "ADC channel 2", "ADC channel 3", "ADC channel 4" +}; +static SOC_ENUM_SINGLE_DECL( + digital_ch4_enum, NAU8540_REG_DIGITAL_MUX, 6, adc_channel); + +static const struct snd_kcontrol_new digital_ch4_mux = + SOC_DAPM_ENUM("Digital CH4 Select", digital_ch4_enum); + +static SOC_ENUM_SINGLE_DECL( + digital_ch3_enum, NAU8540_REG_DIGITAL_MUX, 4, adc_channel); + +static const struct snd_kcontrol_new digital_ch3_mux = + SOC_DAPM_ENUM("Digital CH3 Select", digital_ch3_enum); + +static SOC_ENUM_SINGLE_DECL( + digital_ch2_enum, NAU8540_REG_DIGITAL_MUX, 2, adc_channel); + +static const struct snd_kcontrol_new digital_ch2_mux = + SOC_DAPM_ENUM("Digital CH2 Select", digital_ch2_enum); + +static SOC_ENUM_SINGLE_DECL( + digital_ch1_enum, NAU8540_REG_DIGITAL_MUX, 0, adc_channel); + +static const struct snd_kcontrol_new digital_ch1_mux = + SOC_DAPM_ENUM("Digital CH1 Select", digital_ch1_enum); + +static const struct snd_soc_dapm_widget nau8540_dapm_widgets[] = { + SND_SOC_DAPM_SUPPLY("MICBIAS2", NAU8540_REG_MIC_BIAS, 11, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("MICBIAS1", NAU8540_REG_MIC_BIAS, 10, 0, NULL, 0), + + SND_SOC_DAPM_INPUT("MIC1"), + SND_SOC_DAPM_INPUT("MIC2"), + SND_SOC_DAPM_INPUT("MIC3"), + SND_SOC_DAPM_INPUT("MIC4"), + + SND_SOC_DAPM_PGA("Frontend PGA1", NAU8540_REG_PWR, 12, 0, NULL, 0), + SND_SOC_DAPM_PGA("Frontend PGA2", NAU8540_REG_PWR, 13, 0, NULL, 0), + SND_SOC_DAPM_PGA("Frontend PGA3", NAU8540_REG_PWR, 14, 0, NULL, 0), + SND_SOC_DAPM_PGA("Frontend PGA4", NAU8540_REG_PWR, 15, 0, NULL, 0), + + SND_SOC_DAPM_ADC("ADC1", NULL, + NAU8540_REG_POWER_MANAGEMENT, 0, 0), + SND_SOC_DAPM_ADC("ADC2", NULL, + NAU8540_REG_POWER_MANAGEMENT, 1, 0), + SND_SOC_DAPM_ADC("ADC3", NULL, + NAU8540_REG_POWER_MANAGEMENT, 2, 0), + SND_SOC_DAPM_ADC("ADC4", NULL, + NAU8540_REG_POWER_MANAGEMENT, 3, 0), + + SND_SOC_DAPM_PGA("ADC CH1", NAU8540_REG_ANALOG_PWR, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("ADC CH2", NAU8540_REG_ANALOG_PWR, 1, 0, NULL, 0), + SND_SOC_DAPM_PGA("ADC CH3", NAU8540_REG_ANALOG_PWR, 2, 0, NULL, 0), + SND_SOC_DAPM_PGA("ADC CH4", NAU8540_REG_ANALOG_PWR, 3, 0, NULL, 0), + + SND_SOC_DAPM_MUX("Digital CH4 Mux", + SND_SOC_NOPM, 0, 0, &digital_ch4_mux), + SND_SOC_DAPM_MUX("Digital CH3 Mux", + SND_SOC_NOPM, 0, 0, &digital_ch3_mux), + SND_SOC_DAPM_MUX("Digital CH2 Mux", + SND_SOC_NOPM, 0, 0, &digital_ch2_mux), + SND_SOC_DAPM_MUX("Digital CH1 Mux", + SND_SOC_NOPM, 0, 0, &digital_ch1_mux), + + SND_SOC_DAPM_AIF_OUT("AIFTX", "Capture", 0, SND_SOC_NOPM, 0, 0), +}; + +static const struct snd_soc_dapm_route nau8540_dapm_routes[] = { + {"Frontend PGA1", NULL, "MIC1"}, + {"Frontend PGA2", NULL, "MIC2"}, + {"Frontend PGA3", NULL, "MIC3"}, + {"Frontend PGA4", NULL, "MIC4"}, + + {"ADC1", NULL, "Frontend PGA1"}, + {"ADC2", NULL, "Frontend PGA2"}, + {"ADC3", NULL, "Frontend PGA3"}, + {"ADC4", NULL, "Frontend PGA4"}, + + {"ADC CH1", NULL, "ADC1"}, + {"ADC CH2", NULL, "ADC2"}, + {"ADC CH3", NULL, "ADC3"}, + {"ADC CH4", NULL, "ADC4"}, + + {"ADC1", NULL, "MICBIAS1"}, + {"ADC2", NULL, "MICBIAS1"}, + {"ADC3", NULL, "MICBIAS2"}, + {"ADC4", NULL, "MICBIAS2"}, + + {"Digital CH1 Mux", "ADC channel 1", "ADC CH1"}, + {"Digital CH1 Mux", "ADC channel 2", "ADC CH2"}, + {"Digital CH1 Mux", "ADC channel 3", "ADC CH3"}, + {"Digital CH1 Mux", "ADC channel 4", "ADC CH4"}, + + {"Digital CH2 Mux", "ADC channel 1", "ADC CH1"}, + {"Digital CH2 Mux", "ADC channel 2", "ADC CH2"}, + {"Digital CH2 Mux", "ADC channel 3", "ADC CH3"}, + {"Digital CH2 Mux", "ADC channel 4", "ADC CH4"}, + + {"Digital CH3 Mux", "ADC channel 1", "ADC CH1"}, + {"Digital CH3 Mux", "ADC channel 2", "ADC CH2"}, + {"Digital CH3 Mux", "ADC channel 3", "ADC CH3"}, + {"Digital CH3 Mux", "ADC channel 4", "ADC CH4"}, + + {"Digital CH4 Mux", "ADC channel 1", "ADC CH1"}, + {"Digital CH4 Mux", "ADC channel 2", "ADC CH2"}, + {"Digital CH4 Mux", "ADC channel 3", "ADC CH3"}, + {"Digital CH4 Mux", "ADC channel 4", "ADC CH4"}, + + {"AIFTX", NULL, "Digital CH1 Mux"}, + {"AIFTX", NULL, "Digital CH2 Mux"}, + {"AIFTX", NULL, "Digital CH3 Mux"}, + {"AIFTX", NULL, "Digital CH4 Mux"}, +}; + +static int nau8540_clock_check(struct nau8540 *nau8540, int rate, int osr) +{ + int osrate; + + if (osr >= ARRAY_SIZE(osr_adc_sel)) + return -EINVAL; + osrate = osr_adc_sel[osr].osr; + + if (rate * osr > CLK_ADC_MAX) { + dev_err(nau8540->dev, "exceed the maximum frequency of CLK_ADC\n"); + return -EINVAL; + } + + return 0; +} + +static int nau8540_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) +{ + struct snd_soc_codec *codec = dai->codec; + struct nau8540 *nau8540 = snd_soc_codec_get_drvdata(codec); + unsigned int val_len = 0, osr; + + /* CLK_ADC = OSR * FS + * ADC clock frequency is defined as Over Sampling Rate (OSR) + * multiplied by the audio sample rate (Fs). Note that the OSR and Fs + * values must be selected such that the maximum frequency is less + * than 6.144 MHz. + */ + regmap_read(nau8540->regmap, NAU8540_REG_ADC_SAMPLE_RATE, &osr); + osr &= NAU8540_ADC_OSR_MASK; + if (nau8540_clock_check(nau8540, params_rate(params), osr)) + return -EINVAL; + regmap_update_bits(nau8540->regmap, NAU8540_REG_CLOCK_SRC, + NAU8540_CLK_ADC_SRC_MASK, + osr_adc_sel[osr].clk_src << NAU8540_CLK_ADC_SRC_SFT); + + switch (params_width(params)) { + case 16: + val_len |= NAU8540_I2S_DL_16; + break; + case 20: + val_len |= NAU8540_I2S_DL_20; + break; + case 24: + val_len |= NAU8540_I2S_DL_24; + break; + case 32: + val_len |= NAU8540_I2S_DL_32; + break; + default: + return -EINVAL; + } + + regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL0, + NAU8540_I2S_DL_MASK, val_len); + + return 0; +} + +static int nau8540_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) +{ + struct snd_soc_codec *codec = dai->codec; + struct nau8540 *nau8540 = snd_soc_codec_get_drvdata(codec); + unsigned int ctrl1_val = 0, ctrl2_val = 0; + + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBM_CFM: + ctrl2_val |= NAU8540_I2S_MS_MASTER; + break; + case SND_SOC_DAIFMT_CBS_CFS: + break; + default: + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + break; + case SND_SOC_DAIFMT_IB_NF: + ctrl1_val |= NAU8540_I2S_BP_INV; + break; + default: + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + ctrl1_val |= NAU8540_I2S_DF_I2S; + break; + case SND_SOC_DAIFMT_LEFT_J: + ctrl1_val |= NAU8540_I2S_DF_LEFT; + break; + case SND_SOC_DAIFMT_RIGHT_J: + ctrl1_val |= NAU8540_I2S_DF_RIGTH; + break; + case SND_SOC_DAIFMT_DSP_A: + ctrl1_val |= NAU8540_I2S_DF_PCM_AB; + break; + case SND_SOC_DAIFMT_DSP_B: + ctrl1_val |= NAU8540_I2S_DF_PCM_AB; + ctrl1_val |= NAU8540_I2S_PCMB_EN; + break; + default: + return -EINVAL; + } + + regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL0, + NAU8540_I2S_DL_MASK | NAU8540_I2S_DF_MASK | + NAU8540_I2S_BP_INV | NAU8540_I2S_PCMB_EN, ctrl1_val); + regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL1, + NAU8540_I2S_MS_MASK | NAU8540_I2S_DO12_OE, ctrl2_val); + regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL2, + NAU8540_I2S_DO34_OE, 0); + + return 0; +} + +/** + * nau8540_set_tdm_slot - configure DAI TX TDM. + * @dai: DAI + * @tx_mask: bitmask representing active TX slots. Ex. + * 0xf for normal 4 channel TDM. + * 0xf0 for shifted 4 channel TDM + * @rx_mask: no used. + * @slots: Number of slots in use. + * @slot_width: Width in bits for each slot. + * + * Configures a DAI for TDM operation. Only support 4 slots TDM. + */ +static int nau8540_set_tdm_slot(struct snd_soc_dai *dai, + unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width) +{ + struct snd_soc_codec *codec = dai->codec; + struct nau8540 *nau8540 = snd_soc_codec_get_drvdata(codec); + unsigned int ctrl2_val = 0, ctrl4_val = 0; + + if (slots > 4 || ((tx_mask & 0xf0) && (tx_mask & 0xf))) + return -EINVAL; + + ctrl4_val |= (NAU8540_TDM_MODE | NAU8540_TDM_OFFSET_EN); + if (tx_mask & 0xf0) { + ctrl2_val = 4 * slot_width; + ctrl4_val |= (tx_mask >> 4); + } else { + ctrl4_val |= tx_mask; + } + regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL4, + NAU8540_TDM_MODE | NAU8540_TDM_OFFSET_EN | + NAU8540_TDM_TX_MASK, ctrl4_val); + regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL1, + NAU8540_I2S_DO12_OE, NAU8540_I2S_DO12_OE); + regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL2, + NAU8540_I2S_DO34_OE | NAU8540_I2S_TSLOT_L_MASK, + NAU8540_I2S_DO34_OE | ctrl2_val); + + return 0; +} + + +static const struct snd_soc_dai_ops nau8540_dai_ops = { + .hw_params = nau8540_hw_params, + .set_fmt = nau8540_set_fmt, + .set_tdm_slot = nau8540_set_tdm_slot, +}; + +#define NAU8540_RATES SNDRV_PCM_RATE_8000_48000 +#define NAU8540_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE \ + | SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S32_LE) + +static struct snd_soc_dai_driver nau8540_dai = { + .name = "nau8540-hifi", + .capture = { + .stream_name = "Capture", + .channels_min = 1, + .channels_max = 4, + .rates = NAU8540_RATES, + .formats = NAU8540_FORMATS, + }, + .ops = &nau8540_dai_ops, +}; + +/** + * nau8540_calc_fll_param - Calculate FLL parameters. + * @fll_in: external clock provided to codec. + * @fs: sampling rate. + * @fll_param: Pointer to structure of FLL parameters. + * + * Calculate FLL parameters to configure codec. + * + * Returns 0 for success or negative error code. + */ +static int nau8540_calc_fll_param(unsigned int fll_in, + unsigned int fs, struct nau8540_fll *fll_param) +{ + u64 fvco, fvco_max; + unsigned int fref, i, fvco_sel; + + /* Ensure the reference clock frequency (FREF) is <= 13.5MHz by dividing + * freq_in by 1, 2, 4, or 8 using FLL pre-scalar. + * FREF = freq_in / NAU8540_FLL_REF_DIV_MASK + */ + for (i = 0; i < ARRAY_SIZE(fll_pre_scalar); i++) { + fref = fll_in / fll_pre_scalar[i].param; + if (fref <= NAU_FREF_MAX) + break; + } + if (i == ARRAY_SIZE(fll_pre_scalar)) + return -EINVAL; + fll_param->clk_ref_div = fll_pre_scalar[i].val; + + /* Choose the FLL ratio based on FREF */ + for (i = 0; i < ARRAY_SIZE(fll_ratio); i++) { + if (fref >= fll_ratio[i].param) + break; + } + if (i == ARRAY_SIZE(fll_ratio)) + return -EINVAL; + fll_param->ratio = fll_ratio[i].val; + + /* Calculate the frequency of DCO (FDCO) given freq_out = 256 * Fs. + * FDCO must be within the 90MHz - 124MHz or the FFL cannot be + * guaranteed across the full range of operation. + * FDCO = freq_out * 2 * mclk_src_scaling + */ + fvco_max = 0; + fvco_sel = ARRAY_SIZE(mclk_src_scaling); + for (i = 0; i < ARRAY_SIZE(mclk_src_scaling); i++) { + fvco = 256 * fs * 2 * mclk_src_scaling[i].param; + if (fvco > NAU_FVCO_MIN && fvco < NAU_FVCO_MAX && + fvco_max < fvco) { + fvco_max = fvco; + fvco_sel = i; + } + } + if (ARRAY_SIZE(mclk_src_scaling) == fvco_sel) + return -EINVAL; + fll_param->mclk_src = mclk_src_scaling[fvco_sel].val; + + /* Calculate the FLL 10-bit integer input and the FLL 16-bit fractional + * input based on FDCO, FREF and FLL ratio. + */ + fvco = div_u64(fvco_max << 16, fref * fll_param->ratio); + fll_param->fll_int = (fvco >> 16) & 0x3FF; + fll_param->fll_frac = fvco & 0xFFFF; + return 0; +} + +static void nau8540_fll_apply(struct regmap *regmap, + struct nau8540_fll *fll_param) +{ + regmap_update_bits(regmap, NAU8540_REG_CLOCK_SRC, + NAU8540_CLK_SRC_MASK | NAU8540_CLK_MCLK_SRC_MASK, + NAU8540_CLK_SRC_MCLK | fll_param->mclk_src); + regmap_update_bits(regmap, NAU8540_REG_FLL1, + NAU8540_FLL_RATIO_MASK, fll_param->ratio); + /* FLL 16-bit fractional input */ + regmap_write(regmap, NAU8540_REG_FLL2, fll_param->fll_frac); + /* FLL 10-bit integer input */ + regmap_update_bits(regmap, NAU8540_REG_FLL3, + NAU8540_FLL_INTEGER_MASK, fll_param->fll_int); + /* FLL pre-scaler */ + regmap_update_bits(regmap, NAU8540_REG_FLL4, + NAU8540_FLL_REF_DIV_MASK, + fll_param->clk_ref_div << NAU8540_FLL_REF_DIV_SFT); + regmap_update_bits(regmap, NAU8540_REG_FLL5, + NAU8540_FLL_CLK_SW_MASK, NAU8540_FLL_CLK_SW_REF); + regmap_update_bits(regmap, + NAU8540_REG_FLL6, NAU8540_DCO_EN, 0); + if (fll_param->fll_frac) { + regmap_update_bits(regmap, NAU8540_REG_FLL5, + NAU8540_FLL_PDB_DAC_EN | NAU8540_FLL_LOOP_FTR_EN | + NAU8540_FLL_FTR_SW_MASK, + NAU8540_FLL_PDB_DAC_EN | NAU8540_FLL_LOOP_FTR_EN | + NAU8540_FLL_FTR_SW_FILTER); + regmap_update_bits(regmap, NAU8540_REG_FLL6, + NAU8540_SDM_EN, NAU8540_SDM_EN); + } else { + regmap_update_bits(regmap, NAU8540_REG_FLL5, + NAU8540_FLL_PDB_DAC_EN | NAU8540_FLL_LOOP_FTR_EN | + NAU8540_FLL_FTR_SW_MASK, NAU8540_FLL_FTR_SW_ACCU); + regmap_update_bits(regmap, + NAU8540_REG_FLL6, NAU8540_SDM_EN, 0); + } +} + +/* freq_out must be 256*Fs in order to achieve the best performance */ +static int nau8540_set_pll(struct snd_soc_codec *codec, int pll_id, int source, + unsigned int freq_in, unsigned int freq_out) +{ + struct nau8540 *nau8540 = snd_soc_codec_get_drvdata(codec); + struct nau8540_fll fll_param; + int ret, fs; + + switch (pll_id) { + case NAU8540_CLK_FLL_MCLK: + regmap_update_bits(nau8540->regmap, NAU8540_REG_FLL3, + NAU8540_FLL_CLK_SRC_MASK, NAU8540_FLL_CLK_SRC_MCLK); + break; + + case NAU8540_CLK_FLL_BLK: + regmap_update_bits(nau8540->regmap, NAU8540_REG_FLL3, + NAU8540_FLL_CLK_SRC_MASK, NAU8540_FLL_CLK_SRC_BLK); + break; + + case NAU8540_CLK_FLL_FS: + regmap_update_bits(nau8540->regmap, NAU8540_REG_FLL3, + NAU8540_FLL_CLK_SRC_MASK, NAU8540_FLL_CLK_SRC_FS); + break; + + default: + dev_err(nau8540->dev, "Invalid clock id (%d)\n", pll_id); + return -EINVAL; + } + dev_dbg(nau8540->dev, "Sysclk is %dHz and clock id is %d\n", + freq_out, pll_id); + + fs = freq_out / 256; + ret = nau8540_calc_fll_param(freq_in, fs, &fll_param); + if (ret < 0) { + dev_err(nau8540->dev, "Unsupported input clock %d\n", freq_in); + return ret; + } + dev_dbg(nau8540->dev, "mclk_src=%x ratio=%x fll_frac=%x fll_int=%x clk_ref_div=%x\n", + fll_param.mclk_src, fll_param.ratio, fll_param.fll_frac, + fll_param.fll_int, fll_param.clk_ref_div); + + nau8540_fll_apply(nau8540->regmap, &fll_param); + mdelay(2); + regmap_update_bits(nau8540->regmap, NAU8540_REG_CLOCK_SRC, + NAU8540_CLK_SRC_MASK, NAU8540_CLK_SRC_VCO); + + return 0; +} + +static int nau8540_set_sysclk(struct snd_soc_codec *codec, + int clk_id, int source, unsigned int freq, int dir) +{ + struct nau8540 *nau8540 = snd_soc_codec_get_drvdata(codec); + + switch (clk_id) { + case NAU8540_CLK_DIS: + case NAU8540_CLK_MCLK: + regmap_update_bits(nau8540->regmap, NAU8540_REG_CLOCK_SRC, + NAU8540_CLK_SRC_MASK, NAU8540_CLK_SRC_MCLK); + regmap_update_bits(nau8540->regmap, NAU8540_REG_FLL6, + NAU8540_DCO_EN, 0); + break; + + case NAU8540_CLK_INTERNAL: + regmap_update_bits(nau8540->regmap, NAU8540_REG_FLL6, + NAU8540_DCO_EN, NAU8540_DCO_EN); + regmap_update_bits(nau8540->regmap, NAU8540_REG_CLOCK_SRC, + NAU8540_CLK_SRC_MASK, NAU8540_CLK_SRC_VCO); + break; + + default: + dev_err(nau8540->dev, "Invalid clock id (%d)\n", clk_id); + return -EINVAL; + } + + dev_dbg(nau8540->dev, "Sysclk is %dHz and clock id is %d\n", + freq, clk_id); + + return 0; +} + +static void nau8540_reset_chip(struct regmap *regmap) +{ + regmap_write(regmap, NAU8540_REG_SW_RESET, 0x00); + regmap_write(regmap, NAU8540_REG_SW_RESET, 0x00); +} + +static void nau8540_init_regs(struct nau8540 *nau8540) +{ + struct regmap *regmap = nau8540->regmap; + + /* Enable Bias/VMID/VMID Tieoff */ + regmap_update_bits(regmap, NAU8540_REG_VMID_CTRL, + NAU8540_VMID_EN | NAU8540_VMID_SEL_MASK, + NAU8540_VMID_EN | (0x2 << NAU8540_VMID_SEL_SFT)); + regmap_update_bits(regmap, NAU8540_REG_REFERENCE, + NAU8540_PRECHARGE_DIS | NAU8540_GLOBAL_BIAS_EN, + NAU8540_PRECHARGE_DIS | NAU8540_GLOBAL_BIAS_EN); + mdelay(2); + regmap_update_bits(regmap, NAU8540_REG_MIC_BIAS, + NAU8540_PU_PRE, NAU8540_PU_PRE); + regmap_update_bits(regmap, NAU8540_REG_CLOCK_CTRL, + NAU8540_CLK_ADC_EN | NAU8540_CLK_I2S_EN, + NAU8540_CLK_ADC_EN | NAU8540_CLK_I2S_EN); + /* ADC OSR selection, CLK_ADC = Fs * OSR */ + regmap_update_bits(regmap, NAU8540_REG_ADC_SAMPLE_RATE, + NAU8540_ADC_OSR_MASK, NAU8540_ADC_OSR_64); +} + +static int __maybe_unused nau8540_suspend(struct snd_soc_codec *codec) +{ + struct nau8540 *nau8540 = snd_soc_codec_get_drvdata(codec); + + regcache_cache_only(nau8540->regmap, true); + regcache_mark_dirty(nau8540->regmap); + + return 0; +} + +static int __maybe_unused nau8540_resume(struct snd_soc_codec *codec) +{ + struct nau8540 *nau8540 = snd_soc_codec_get_drvdata(codec); + + regcache_cache_only(nau8540->regmap, false); + regcache_sync(nau8540->regmap); + + return 0; +} + +static struct snd_soc_codec_driver nau8540_codec_driver = { + .set_sysclk = nau8540_set_sysclk, + .set_pll = nau8540_set_pll, + .suspend = nau8540_suspend, + .resume = nau8540_resume, + .suspend_bias_off = true, + + .component_driver = { + .controls = nau8540_snd_controls, + .num_controls = ARRAY_SIZE(nau8540_snd_controls), + .dapm_widgets = nau8540_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(nau8540_dapm_widgets), + .dapm_routes = nau8540_dapm_routes, + .num_dapm_routes = ARRAY_SIZE(nau8540_dapm_routes), + }, +}; + +static const struct regmap_config nau8540_regmap_config = { + .val_bits = 16, + .reg_bits = 16, + + .max_register = NAU8540_REG_MAX, + .readable_reg = nau8540_readable_reg, + .writeable_reg = nau8540_writeable_reg, + .volatile_reg = nau8540_volatile_reg, + + .cache_type = REGCACHE_RBTREE, + .reg_defaults = nau8540_reg_defaults, + .num_reg_defaults = ARRAY_SIZE(nau8540_reg_defaults), +}; + +static int nau8540_i2c_probe(struct i2c_client *i2c, + const struct i2c_device_id *id) +{ + struct device *dev = &i2c->dev; + struct nau8540 *nau8540 = dev_get_platdata(dev); + int ret, value; + + if (!nau8540) { + nau8540 = devm_kzalloc(dev, sizeof(*nau8540), GFP_KERNEL); + if (!nau8540) + return -ENOMEM; + } + i2c_set_clientdata(i2c, nau8540); + + nau8540->regmap = devm_regmap_init_i2c(i2c, &nau8540_regmap_config); + if (IS_ERR(nau8540->regmap)) + return PTR_ERR(nau8540->regmap); + ret = regmap_read(nau8540->regmap, NAU8540_REG_I2C_DEVICE_ID, &value); + if (ret < 0) { + dev_err(dev, "Failed to read device id from the NAU85L40: %d\n", + ret); + return ret; + } + + nau8540->dev = dev; + nau8540_reset_chip(nau8540->regmap); + nau8540_init_regs(nau8540); + + return snd_soc_register_codec(dev, + &nau8540_codec_driver, &nau8540_dai, 1); +} + +static int nau8540_i2c_remove(struct i2c_client *client) +{ + snd_soc_unregister_codec(&client->dev); + return 0; +} + + +static const struct i2c_device_id nau8540_i2c_ids[] = { + { "nau8540", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, nau8540_i2c_ids); + +#ifdef CONFIG_OF +static const struct of_device_id nau8540_of_ids[] = { + { .compatible = "nuvoton,nau8540", }, + {} +}; +MODULE_DEVICE_TABLE(of, nau8540_of_ids); +#endif + +static struct i2c_driver nau8540_i2c_driver = { + .driver = { + .name = "nau8540", + .of_match_table = of_match_ptr(nau8540_of_ids), + }, + .probe = nau8540_i2c_probe, + .remove = nau8540_i2c_remove, + .id_table = nau8540_i2c_ids, +}; +module_i2c_driver(nau8540_i2c_driver); + +MODULE_DESCRIPTION("ASoC NAU85L40 driver"); +MODULE_AUTHOR("John Hsu <KCHSU0(a)nuvoton.com>"); +MODULE_LICENSE("GPL v2"); diff --git a/sound/soc/codecs/nau8540.h b/sound/soc/codecs/nau8540.h new file mode 100644 index 000000000000..d06e65188cd5 --- /dev/null +++ b/sound/soc/codecs/nau8540.h @@ -0,0 +1,222 @@ +/* + * NAU85L40 ALSA SoC audio driver + * + * Copyright 2016 Nuvoton Technology Corp. + * Author: John Hsu <KCHSU0(a)nuvoton.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __NAU8540_H__ +#define __NAU8540_H__ + +#define NAU8540_REG_SW_RESET 0x00 +#define NAU8540_REG_POWER_MANAGEMENT 0x01 +#define NAU8540_REG_CLOCK_CTRL 0x02 +#define NAU8540_REG_CLOCK_SRC 0x03 +#define NAU8540_REG_FLL1 0x04 +#define NAU8540_REG_FLL2 0x05 +#define NAU8540_REG_FLL3 0x06 +#define NAU8540_REG_FLL4 0x07 +#define NAU8540_REG_FLL5 0x08 +#define NAU8540_REG_FLL6 0x09 +#define NAU8540_REG_FLL_VCO_RSV 0x0A +#define NAU8540_REG_PCM_CTRL0 0x10 +#define NAU8540_REG_PCM_CTRL1 0x11 +#define NAU8540_REG_PCM_CTRL2 0x12 +#define NAU8540_REG_PCM_CTRL3 0x13 +#define NAU8540_REG_PCM_CTRL4 0x14 +#define NAU8540_REG_ALC_CONTROL_1 0x20 +#define NAU8540_REG_ALC_CONTROL_2 0x21 +#define NAU8540_REG_ALC_CONTROL_3 0x22 +#define NAU8540_REG_ALC_CONTROL_4 0x23 +#define NAU8540_REG_ALC_CONTROL_5 0x24 +#define NAU8540_REG_ALC_GAIN_CH12 0x2D +#define NAU8540_REG_ALC_GAIN_CH34 0x2E +#define NAU8540_REG_ALC_STATUS 0x2F +#define NAU8540_REG_NOTCH_FIL1_CH1 0x30 +#define NAU8540_REG_NOTCH_FIL2_CH1 0x31 +#define NAU8540_REG_NOTCH_FIL1_CH2 0x32 +#define NAU8540_REG_NOTCH_FIL2_CH2 0x33 +#define NAU8540_REG_NOTCH_FIL1_CH3 0x34 +#define NAU8540_REG_NOTCH_FIL2_CH3 0x35 +#define NAU8540_REG_NOTCH_FIL1_CH4 0x36 +#define NAU8540_REG_NOTCH_FIL2_CH4 0x37 +#define NAU8540_REG_HPF_FILTER_CH12 0x38 +#define NAU8540_REG_HPF_FILTER_CH34 0x39 +#define NAU8540_REG_ADC_SAMPLE_RATE 0x3A +#define NAU8540_REG_DIGITAL_GAIN_CH1 0x40 +#define NAU8540_REG_DIGITAL_GAIN_CH2 0x41 +#define NAU8540_REG_DIGITAL_GAIN_CH3 0x42 +#define NAU8540_REG_DIGITAL_GAIN_CH4 0x43 +#define NAU8540_REG_DIGITAL_MUX 0x44 +#define NAU8540_REG_P2P_CH1 0x48 +#define NAU8540_REG_P2P_CH2 0x49 +#define NAU8540_REG_P2P_CH3 0x4A +#define NAU8540_REG_P2P_CH4 0x4B +#define NAU8540_REG_PEAK_CH1 0x4C +#define NAU8540_REG_PEAK_CH2 0x4D +#define NAU8540_REG_PEAK_CH3 0x4E +#define NAU8540_REG_PEAK_CH4 0x4F +#define NAU8540_REG_GPIO_CTRL 0x50 +#define NAU8540_REG_MISC_CTRL 0x51 +#define NAU8540_REG_I2C_CTRL 0x52 +#define NAU8540_REG_I2C_DEVICE_ID 0x58 +#define NAU8540_REG_RST 0x5A +#define NAU8540_REG_VMID_CTRL 0x60 +#define NAU8540_REG_MUTE 0x61 +#define NAU8540_REG_ANALOG_ADC1 0x64 +#define NAU8540_REG_ANALOG_ADC2 0x65 +#define NAU8540_REG_ANALOG_PWR 0x66 +#define NAU8540_REG_MIC_BIAS 0x67 +#define NAU8540_REG_REFERENCE 0x68 +#define NAU8540_REG_FEPGA1 0x69 +#define NAU8540_REG_FEPGA2 0x6A +#define NAU8540_REG_FEPGA3 0x6B +#define NAU8540_REG_FEPGA4 0x6C +#define NAU8540_REG_PWR 0x6D +#define NAU8540_REG_MAX NAU8540_REG_PWR + + +/* POWER_MANAGEMENT (0x01) */ +#define NAU8540_ADC4_EN (0x1 << 3) +#define NAU8540_ADC3_EN (0x1 << 2) +#define NAU8540_ADC2_EN (0x1 << 1) +#define NAU8540_ADC1_EN 0x1 + +/* CLOCK_CTRL (0x02) */ +#define NAU8540_CLK_ADC_EN (0x1 << 15) +#define NAU8540_CLK_I2S_EN (0x1 << 1) + +/* CLOCK_SRC (0x03) */ +#define NAU8540_CLK_SRC_SFT 15 +#define NAU8540_CLK_SRC_MASK (1 << NAU8540_CLK_SRC_SFT) +#define NAU8540_CLK_SRC_VCO (1 << NAU8540_CLK_SRC_SFT) +#define NAU8540_CLK_SRC_MCLK (0 << NAU8540_CLK_SRC_SFT) +#define NAU8540_CLK_ADC_SRC_SFT 6 +#define NAU8540_CLK_ADC_SRC_MASK (0x3 << NAU8540_CLK_ADC_SRC_SFT) +#define NAU8540_CLK_MCLK_SRC_MASK 0xf + +/* FLL1 (0x04) */ +#define NAU8540_FLL_RATIO_MASK 0x7f + +/* FLL3 (0x06) */ +#define NAU8540_FLL_CLK_SRC_SFT 10 +#define NAU8540_FLL_CLK_SRC_MASK (0x3 << NAU8540_FLL_CLK_SRC_SFT) +#define NAU8540_FLL_CLK_SRC_MCLK (0 << NAU8540_FLL_CLK_SRC_SFT) +#define NAU8540_FLL_CLK_SRC_BLK (0x2 << NAU8540_FLL_CLK_SRC_SFT) +#define NAU8540_FLL_CLK_SRC_FS (0x3 << NAU8540_FLL_CLK_SRC_SFT) +#define NAU8540_FLL_INTEGER_MASK 0x3ff + +/* FLL4 (0x07) */ +#define NAU8540_FLL_REF_DIV_SFT 10 +#define NAU8540_FLL_REF_DIV_MASK (0x3 << NAU8540_FLL_REF_DIV_SFT) + +/* FLL5 (0x08) */ +#define NAU8540_FLL_PDB_DAC_EN (0x1 << 15) +#define NAU8540_FLL_LOOP_FTR_EN (0x1 << 14) +#define NAU8540_FLL_CLK_SW_MASK (0x1 << 13) +#define NAU8540_FLL_CLK_SW_N2 (0x1 << 13) +#define NAU8540_FLL_CLK_SW_REF (0x0 << 13) +#define NAU8540_FLL_FTR_SW_MASK (0x1 << 12) +#define NAU8540_FLL_FTR_SW_ACCU (0x1 << 12) +#define NAU8540_FLL_FTR_SW_FILTER (0x0 << 12) + +/* FLL6 (0x9) */ +#define NAU8540_DCO_EN (0x1 << 15) +#define NAU8540_SDM_EN (0x1 << 14) + +/* PCM_CTRL0 (0x10) */ +#define NAU8540_I2S_BP_SFT 7 +#define NAU8540_I2S_BP_INV (0x1 << NAU8540_I2S_BP_SFT) +#define NAU8540_I2S_PCMB_SFT 6 +#define NAU8540_I2S_PCMB_EN (0x1 << NAU8540_I2S_PCMB_SFT) +#define NAU8540_I2S_DL_SFT 2 +#define NAU8540_I2S_DL_MASK (0x3 << NAU8540_I2S_DL_SFT) +#define NAU8540_I2S_DL_16 (0 << NAU8540_I2S_DL_SFT) +#define NAU8540_I2S_DL_20 (0x1 << NAU8540_I2S_DL_SFT) +#define NAU8540_I2S_DL_24 (0x2 << NAU8540_I2S_DL_SFT) +#define NAU8540_I2S_DL_32 (0x3 << NAU8540_I2S_DL_SFT) +#define NAU8540_I2S_DF_MASK 0x3 +#define NAU8540_I2S_DF_RIGTH 0 +#define NAU8540_I2S_DF_LEFT 0x1 +#define NAU8540_I2S_DF_I2S 0x2 +#define NAU8540_I2S_DF_PCM_AB 0x3 + +/* PCM_CTRL1 (0x11) */ +#define NAU8540_I2S_LRC_DIV_SFT 12 +#define NAU8540_I2S_LRC_DIV_MASK (0x3 << NAU8540_I2S_LRC_DIV_SFT) +#define NAU8540_I2S_DO12_OE (0x1 << 4) +#define NAU8540_I2S_MS_SFT 3 +#define NAU8540_I2S_MS_MASK (0x1 << NAU8540_I2S_MS_SFT) +#define NAU8540_I2S_MS_MASTER (0x1 << NAU8540_I2S_MS_SFT) +#define NAU8540_I2S_MS_SLAVE (0x0 << NAU8540_I2S_MS_SFT) +#define NAU8540_I2S_BLK_DIV_MASK 0x7 + +/* PCM_CTRL1 (0x12) */ +#define NAU8540_I2S_DO34_OE (0x1 << 11) +#define NAU8540_I2S_TSLOT_L_MASK 0x3ff + +/* PCM_CTRL4 (0x14) */ +#define NAU8540_TDM_MODE (0x1 << 15) +#define NAU8540_TDM_OFFSET_EN (0x1 << 14) +#define NAU8540_TDM_TX_MASK 0xf + +/* ADC_SAMPLE_RATE (0x3A) */ +#define NAU8540_ADC_OSR_MASK 0x3 +#define NAU8540_ADC_OSR_256 0x3 +#define NAU8540_ADC_OSR_128 0x2 +#define NAU8540_ADC_OSR_64 0x1 +#define NAU8540_ADC_OSR_32 0x0 + +/* VMID_CTRL (0x60) */ +#define NAU8540_VMID_EN (1 << 6) +#define NAU8540_VMID_SEL_SFT 4 +#define NAU8540_VMID_SEL_MASK (0x3 << NAU8540_VMID_SEL_SFT) + +/* MIC_BIAS (0x67) */ +#define NAU8540_PU_PRE (0x1 << 8) + +/* REFERENCE (0x68) */ +#define NAU8540_PRECHARGE_DIS (0x1 << 13) +#define NAU8540_GLOBAL_BIAS_EN (0x1 << 12) + + +/* System Clock Source */ +enum { + NAU8540_CLK_DIS, + NAU8540_CLK_MCLK, + NAU8540_CLK_INTERNAL, + NAU8540_CLK_FLL_MCLK, + NAU8540_CLK_FLL_BLK, + NAU8540_CLK_FLL_FS, +}; + +struct nau8540 { + struct device *dev; + struct regmap *regmap; +}; + +struct nau8540_fll { + int mclk_src; + int ratio; + int fll_frac; + int fll_int; + int clk_ref_div; +}; + +struct nau8540_fll_attr { + unsigned int param; + unsigned int val; +}; + +/* over sampling rate */ +struct nau8540_osr_attr { + unsigned int osr; + unsigned int clk_src; +}; + + +#endif /* __NAU8540_H__ */ -- 2.11.0

1 0

[alsa-devel] [PATCH] ASoC: nau8540: new codec driver
by John Hsu 04 Feb '17

04 Feb '17

Add codec driver of NAU85L40 Signed-off-by: John Hsu <KCHSU0(a)nuvoton.com> --- .../devicetree/bindings/sound/nau8540.txt | 16 + sound/soc/codecs/Kconfig | 5 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/nau8540.c | 835 +++++++++++++++++++++ sound/soc/codecs/nau8540.h | 222 ++++++ 5 files changed, 1080 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/nau8540.txt create mode 100644 sound/soc/codecs/nau8540.c create mode 100644 sound/soc/codecs/nau8540.h diff --git a/Documentation/devicetree/bindings/sound/nau8540.txt b/Documentation/devicetree/bindings/sound/nau8540.txt new file mode 100644 index 0000000..2cc6cf6 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/nau8540.txt @@ -0,0 +1,16 @@ +NAU85L40 audio CODEC + +This device supports I2C only. + +Required properties: + + - compatible : "nuvoton,nau8540" + + - reg : the I2C address of the device. + +Example: + +codec: nau8540@1c { + compatible = "nuvoton,nau8540"; + reg = <0x1c>; +}; diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index 9e1718a..c31cdc9 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -95,6 +95,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_MAX9877 if I2C select SND_SOC_MC13783 if MFD_MC13XXX select SND_SOC_ML26124 if I2C + select SND_SOC_NAU8540 if I2C select SND_SOC_NAU8810 if I2C select SND_SOC_NAU8825 if I2C select SND_SOC_HDMI_CODEC @@ -1105,6 +1106,10 @@ config SND_SOC_MC13783 config SND_SOC_ML26124 tristate +config SND_SOC_NAU8540 + tristate "Nuvoton Technology Corporation NAU85L40 CODEC" + depends on I2C + config SND_SOC_NAU8810 tristate "Nuvoton Technology Corporation NAU88C10 CODEC" depends on I2C diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index 7e1dad7..0a7f4ff 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -90,6 +90,7 @@ snd-soc-mc13783-objs := mc13783.o snd-soc-ml26124-objs := ml26124.o snd-soc-msm8916-analog-objs := msm8916-wcd-analog.o snd-soc-msm8916-digital-objs := msm8916-wcd-digital.o +snd-soc-nau8540-objs := nau8540.o snd-soc-nau8810-objs := nau8810.o snd-soc-nau8825-objs := nau8825.o snd-soc-hdmi-codec-objs := hdmi-codec.o @@ -318,6 +319,7 @@ obj-$(CONFIG_SND_SOC_MC13783) += snd-soc-mc13783.o obj-$(CONFIG_SND_SOC_ML26124) += snd-soc-ml26124.o obj-$(CONFIG_SND_SOC_MSM8916_WCD_ANALOG) +=snd-soc-msm8916-analog.o obj-$(CONFIG_SND_SOC_MSM8916_WCD_DIGITAL) +=snd-soc-msm8916-digital.o +obj-$(CONFIG_SND_SOC_NAU8540) += snd-soc-nau8540.o obj-$(CONFIG_SND_SOC_NAU8810) += snd-soc-nau8810.o obj-$(CONFIG_SND_SOC_NAU8825) += snd-soc-nau8825.o obj-$(CONFIG_SND_SOC_HDMI_CODEC) += snd-soc-hdmi-codec.o diff --git a/sound/soc/codecs/nau8540.c b/sound/soc/codecs/nau8540.c new file mode 100644 index 0000000..c8bcb1d --- /dev/null +++ b/sound/soc/codecs/nau8540.c @@ -0,0 +1,835 @@ +/* + * NAU85L40 ALSA SoC audio driver + * + * Copyright 2016 Nuvoton Technology Corp. + * Author: John Hsu <KCHSU0(a)nuvoton.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/module.h> +#include <linux/moduleparam.h> +#include <linux/init.h> +#include <linux/delay.h> +#include <linux/pm.h> +#include <linux/i2c.h> +#include <linux/regmap.h> +#include <linux/regulator/consumer.h> +#include <linux/spi/spi.h> +#include <linux/slab.h> +#include <linux/of_device.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/soc.h> +#include <sound/soc-dapm.h> +#include <sound/initval.h> +#include <sound/tlv.h> +#include "nau8540.h" + + +#define NAU_FREF_MAX 13500000 +#define NAU_FVCO_MAX 100000000 +#define NAU_FVCO_MIN 90000000 + +/* the maximum frequency of CLK_ADC */ +#define CLK_ADC_MAX 6144000 + +/* scaling for mclk from sysclk_src output */ +static const struct nau8540_fll_attr mclk_src_scaling[] = { + { 1, 0x0 }, + { 2, 0x2 }, + { 4, 0x3 }, + { 8, 0x4 }, + { 16, 0x5 }, + { 32, 0x6 }, + { 3, 0x7 }, + { 6, 0xa }, + { 12, 0xb }, + { 24, 0xc }, +}; + +/* ratio for input clk freq */ +static const struct nau8540_fll_attr fll_ratio[] = { + { 512000, 0x01 }, + { 256000, 0x02 }, + { 128000, 0x04 }, + { 64000, 0x08 }, + { 32000, 0x10 }, + { 8000, 0x20 }, + { 4000, 0x40 }, +}; + +static const struct nau8540_fll_attr fll_pre_scalar[] = { + { 1, 0x0 }, + { 2, 0x1 }, + { 4, 0x2 }, + { 8, 0x3 }, +}; + +/* over sampling rate */ +static const struct nau8540_osr_attr osr_adc_sel[] = { + { 32, 3 }, /* OSR 32, SRC 1/8 */ + { 64, 2 }, /* OSR 64, SRC 1/4 */ + { 128, 1 }, /* OSR 128, SRC 1/2 */ + { 256, 0 }, /* OSR 256, SRC 1 */ +}; + +static const struct reg_default nau8540_reg_defaults[] = { + {NAU8540_REG_POWER_MANAGEMENT, 0x0000}, + {NAU8540_REG_CLOCK_CTRL, 0x0000}, + {NAU8540_REG_CLOCK_SRC, 0x0000}, + {NAU8540_REG_FLL1, 0x0001}, + {NAU8540_REG_FLL2, 0x3126}, + {NAU8540_REG_FLL3, 0x0008}, + {NAU8540_REG_FLL4, 0x0010}, + {NAU8540_REG_FLL5, 0xC000}, + {NAU8540_REG_FLL6, 0x6000}, + {NAU8540_REG_FLL_VCO_RSV, 0xF13C}, + {NAU8540_REG_PCM_CTRL0, 0x000B}, + {NAU8540_REG_PCM_CTRL1, 0x3010}, + {NAU8540_REG_PCM_CTRL2, 0x0800}, + {NAU8540_REG_PCM_CTRL3, 0x0000}, + {NAU8540_REG_PCM_CTRL4, 0x000F}, + {NAU8540_REG_ALC_CONTROL_1, 0x0000}, + {NAU8540_REG_ALC_CONTROL_2, 0x700B}, + {NAU8540_REG_ALC_CONTROL_3, 0x0022}, + {NAU8540_REG_ALC_CONTROL_4, 0x1010}, + {NAU8540_REG_ALC_CONTROL_5, 0x1010}, + {NAU8540_REG_NOTCH_FIL1_CH1, 0x0000}, + {NAU8540_REG_NOTCH_FIL2_CH1, 0x0000}, + {NAU8540_REG_NOTCH_FIL1_CH2, 0x0000}, + {NAU8540_REG_NOTCH_FIL2_CH2, 0x0000}, + {NAU8540_REG_NOTCH_FIL1_CH3, 0x0000}, + {NAU8540_REG_NOTCH_FIL2_CH3, 0x0000}, + {NAU8540_REG_NOTCH_FIL1_CH4, 0x0000}, + {NAU8540_REG_NOTCH_FIL2_CH4, 0x0000}, + {NAU8540_REG_HPF_FILTER_CH12, 0x0000}, + {NAU8540_REG_HPF_FILTER_CH34, 0x0000}, + {NAU8540_REG_ADC_SAMPLE_RATE, 0x0002}, + {NAU8540_REG_DIGITAL_GAIN_CH1, 0x0400}, + {NAU8540_REG_DIGITAL_GAIN_CH2, 0x0400}, + {NAU8540_REG_DIGITAL_GAIN_CH3, 0x0400}, + {NAU8540_REG_DIGITAL_GAIN_CH4, 0x0400}, + {NAU8540_REG_DIGITAL_MUX, 0x00E4}, + {NAU8540_REG_GPIO_CTRL, 0x0000}, + {NAU8540_REG_MISC_CTRL, 0x0000}, + {NAU8540_REG_I2C_CTRL, 0xEFFF}, + {NAU8540_REG_VMID_CTRL, 0x0000}, + {NAU8540_REG_MUTE, 0x0000}, + {NAU8540_REG_ANALOG_ADC1, 0x0011}, + {NAU8540_REG_ANALOG_ADC2, 0x0020}, + {NAU8540_REG_ANALOG_PWR, 0x0000}, + {NAU8540_REG_MIC_BIAS, 0x0004}, + {NAU8540_REG_REFERENCE, 0x0000}, + {NAU8540_REG_FEPGA1, 0x0000}, + {NAU8540_REG_FEPGA2, 0x0000}, + {NAU8540_REG_FEPGA3, 0x0101}, + {NAU8540_REG_FEPGA4, 0x0101}, + {NAU8540_REG_PWR, 0x0000}, +}; + +static bool nau8540_readable_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case NAU8540_REG_POWER_MANAGEMENT ... NAU8540_REG_FLL_VCO_RSV: + case NAU8540_REG_PCM_CTRL0 ... NAU8540_REG_PCM_CTRL4: + case NAU8540_REG_ALC_CONTROL_1 ... NAU8540_REG_ALC_CONTROL_5: + case NAU8540_REG_ALC_GAIN_CH12 ... NAU8540_REG_ADC_SAMPLE_RATE: + case NAU8540_REG_DIGITAL_GAIN_CH1 ... NAU8540_REG_DIGITAL_MUX: + case NAU8540_REG_P2P_CH1 ... NAU8540_REG_I2C_CTRL: + case NAU8540_REG_I2C_DEVICE_ID: + case NAU8540_REG_VMID_CTRL ... NAU8540_REG_MUTE: + case NAU8540_REG_ANALOG_ADC1 ... NAU8540_REG_PWR: + return true; + default: + return false; + } + +} + +static bool nau8540_writeable_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case NAU8540_REG_SW_RESET ... NAU8540_REG_FLL_VCO_RSV: + case NAU8540_REG_PCM_CTRL0 ... NAU8540_REG_PCM_CTRL4: + case NAU8540_REG_ALC_CONTROL_1 ... NAU8540_REG_ALC_CONTROL_5: + case NAU8540_REG_NOTCH_FIL1_CH1 ... NAU8540_REG_ADC_SAMPLE_RATE: + case NAU8540_REG_DIGITAL_GAIN_CH1 ... NAU8540_REG_DIGITAL_MUX: + case NAU8540_REG_GPIO_CTRL ... NAU8540_REG_I2C_CTRL: + case NAU8540_REG_RST: + case NAU8540_REG_VMID_CTRL ... NAU8540_REG_MUTE: + case NAU8540_REG_ANALOG_ADC1 ... NAU8540_REG_PWR: + return true; + default: + return false; + } +} + +static bool nau8540_volatile_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case NAU8540_REG_SW_RESET: + case NAU8540_REG_ALC_GAIN_CH12 ... NAU8540_REG_ALC_STATUS: + case NAU8540_REG_P2P_CH1 ... NAU8540_REG_PEAK_CH4: + case NAU8540_REG_I2C_DEVICE_ID: + case NAU8540_REG_RST: + return true; + default: + return false; + } +} + + +static const DECLARE_TLV_DB_MINMAX(adc_vol_tlv, -12800, 3600); +static const DECLARE_TLV_DB_MINMAX(fepga_gain_tlv, -100, 3600); + +static const struct snd_kcontrol_new nau8540_snd_controls[] = { + SOC_SINGLE_TLV("Mic1 Volume", NAU8540_REG_DIGITAL_GAIN_CH1, + 0, 0x520, 0, adc_vol_tlv), + SOC_SINGLE_TLV("Mic2 Volume", NAU8540_REG_DIGITAL_GAIN_CH2, + 0, 0x520, 0, adc_vol_tlv), + SOC_SINGLE_TLV("Mic3 Volume", NAU8540_REG_DIGITAL_GAIN_CH3, + 0, 0x520, 0, adc_vol_tlv), + SOC_SINGLE_TLV("Mic4 Volume", NAU8540_REG_DIGITAL_GAIN_CH4, + 0, 0x520, 0, adc_vol_tlv), + + SOC_SINGLE_TLV("Frontend PGA1 Volume", NAU8540_REG_FEPGA3, + 0, 0x25, 0, fepga_gain_tlv), + SOC_SINGLE_TLV("Frontend PGA2 Volume", NAU8540_REG_FEPGA3, + 8, 0x25, 0, fepga_gain_tlv), + SOC_SINGLE_TLV("Frontend PGA3 Volume", NAU8540_REG_FEPGA4, + 0, 0x25, 0, fepga_gain_tlv), + SOC_SINGLE_TLV("Frontend PGA4 Volume", NAU8540_REG_FEPGA4, + 8, 0x25, 0, fepga_gain_tlv), +}; + +static const char * const adc_channel[] = { + "ADC channel 1", "ADC channel 2", "ADC channel 3", "ADC channel 4" +}; +static SOC_ENUM_SINGLE_DECL( + digital_ch4_enum, NAU8540_REG_DIGITAL_MUX, 6, adc_channel); + +static const struct snd_kcontrol_new digital_ch4_mux = + SOC_DAPM_ENUM("Digital CH4 Select", digital_ch4_enum); + +static SOC_ENUM_SINGLE_DECL( + digital_ch3_enum, NAU8540_REG_DIGITAL_MUX, 4, adc_channel); + +static const struct snd_kcontrol_new digital_ch3_mux = + SOC_DAPM_ENUM("Digital CH3 Select", digital_ch3_enum); + +static SOC_ENUM_SINGLE_DECL( + digital_ch2_enum, NAU8540_REG_DIGITAL_MUX, 2, adc_channel); + +static const struct snd_kcontrol_new digital_ch2_mux = + SOC_DAPM_ENUM("Digital CH2 Select", digital_ch2_enum); + +static SOC_ENUM_SINGLE_DECL( + digital_ch1_enum, NAU8540_REG_DIGITAL_MUX, 0, adc_channel); + +static const struct snd_kcontrol_new digital_ch1_mux = + SOC_DAPM_ENUM("Digital CH1 Select", digital_ch1_enum); + +static const struct snd_soc_dapm_widget nau8540_dapm_widgets[] = { + SND_SOC_DAPM_SUPPLY("MICBIAS2", NAU8540_REG_MIC_BIAS, 11, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("MICBIAS1", NAU8540_REG_MIC_BIAS, 10, 0, NULL, 0), + + SND_SOC_DAPM_INPUT("MIC1"), + SND_SOC_DAPM_INPUT("MIC2"), + SND_SOC_DAPM_INPUT("MIC3"), + SND_SOC_DAPM_INPUT("MIC4"), + + SND_SOC_DAPM_PGA("Frontend PGA1", NAU8540_REG_PWR, 12, 0, NULL, 0), + SND_SOC_DAPM_PGA("Frontend PGA2", NAU8540_REG_PWR, 13, 0, NULL, 0), + SND_SOC_DAPM_PGA("Frontend PGA3", NAU8540_REG_PWR, 14, 0, NULL, 0), + SND_SOC_DAPM_PGA("Frontend PGA4", NAU8540_REG_PWR, 15, 0, NULL, 0), + + SND_SOC_DAPM_ADC("ADC1", NULL, + NAU8540_REG_POWER_MANAGEMENT, 0, 0), + SND_SOC_DAPM_ADC("ADC2", NULL, + NAU8540_REG_POWER_MANAGEMENT, 1, 0), + SND_SOC_DAPM_ADC("ADC3", NULL, + NAU8540_REG_POWER_MANAGEMENT, 2, 0), + SND_SOC_DAPM_ADC("ADC4", NULL, + NAU8540_REG_POWER_MANAGEMENT, 3, 0), + + SND_SOC_DAPM_PGA("ADC CH1", NAU8540_REG_ANALOG_PWR, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("ADC CH2", NAU8540_REG_ANALOG_PWR, 1, 0, NULL, 0), + SND_SOC_DAPM_PGA("ADC CH3", NAU8540_REG_ANALOG_PWR, 2, 0, NULL, 0), + SND_SOC_DAPM_PGA("ADC CH4", NAU8540_REG_ANALOG_PWR, 3, 0, NULL, 0), + + SND_SOC_DAPM_MUX("Digital CH4 Mux", + SND_SOC_NOPM, 0, 0, &digital_ch4_mux), + SND_SOC_DAPM_MUX("Digital CH3 Mux", + SND_SOC_NOPM, 0, 0, &digital_ch3_mux), + SND_SOC_DAPM_MUX("Digital CH2 Mux", + SND_SOC_NOPM, 0, 0, &digital_ch2_mux), + SND_SOC_DAPM_MUX("Digital CH1 Mux", + SND_SOC_NOPM, 0, 0, &digital_ch1_mux), + + SND_SOC_DAPM_AIF_OUT("AIFTX", "Capture", 0, SND_SOC_NOPM, 0, 0), +}; + +static const struct snd_soc_dapm_route nau8540_dapm_routes[] = { + {"Frontend PGA1", NULL, "MIC1"}, + {"Frontend PGA2", NULL, "MIC2"}, + {"Frontend PGA3", NULL, "MIC3"}, + {"Frontend PGA4", NULL, "MIC4"}, + + {"ADC1", NULL, "Frontend PGA1"}, + {"ADC2", NULL, "Frontend PGA2"}, + {"ADC3", NULL, "Frontend PGA3"}, + {"ADC4", NULL, "Frontend PGA4"}, + + {"ADC CH1", NULL, "ADC1"}, + {"ADC CH2", NULL, "ADC2"}, + {"ADC CH3", NULL, "ADC3"}, + {"ADC CH4", NULL, "ADC4"}, + + {"ADC1", NULL, "MICBIAS1"}, + {"ADC2", NULL, "MICBIAS1"}, + {"ADC3", NULL, "MICBIAS2"}, + {"ADC4", NULL, "MICBIAS2"}, + + {"Digital CH1 Mux", "ADC channel 1", "ADC CH1"}, + {"Digital CH1 Mux", "ADC channel 2", "ADC CH2"}, + {"Digital CH1 Mux", "ADC channel 3", "ADC CH3"}, + {"Digital CH1 Mux", "ADC channel 4", "ADC CH4"}, + + {"Digital CH2 Mux", "ADC channel 1", "ADC CH1"}, + {"Digital CH2 Mux", "ADC channel 2", "ADC CH2"}, + {"Digital CH2 Mux", "ADC channel 3", "ADC CH3"}, + {"Digital CH2 Mux", "ADC channel 4", "ADC CH4"}, + + {"Digital CH3 Mux", "ADC channel 1", "ADC CH1"}, + {"Digital CH3 Mux", "ADC channel 2", "ADC CH2"}, + {"Digital CH3 Mux", "ADC channel 3", "ADC CH3"}, + {"Digital CH3 Mux", "ADC channel 4", "ADC CH4"}, + + {"Digital CH4 Mux", "ADC channel 1", "ADC CH1"}, + {"Digital CH4 Mux", "ADC channel 2", "ADC CH2"}, + {"Digital CH4 Mux", "ADC channel 3", "ADC CH3"}, + {"Digital CH4 Mux", "ADC channel 4", "ADC CH4"}, + + {"AIFTX", NULL, "Digital CH1 Mux"}, + {"AIFTX", NULL, "Digital CH2 Mux"}, + {"AIFTX", NULL, "Digital CH3 Mux"}, + {"AIFTX", NULL, "Digital CH4 Mux"}, +}; + +static int nau8540_clock_check(struct nau8540 *nau8540, int rate, int osr) +{ + int osrate; + + if (osr >= ARRAY_SIZE(osr_adc_sel)) + return -EINVAL; + osrate = osr_adc_sel[osr].osr; + + if (rate * osr > CLK_ADC_MAX) { + dev_err(nau8540->dev, "exceed the maximum frequency of CLK_ADC\n"); + return -EINVAL; + } + + return 0; +} + +static int nau8540_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) +{ + struct snd_soc_codec *codec = dai->codec; + struct nau8540 *nau8540 = snd_soc_codec_get_drvdata(codec); + unsigned int val_len = 0, osr; + + /* CLK_ADC = OSR * FS + * ADC clock frequency is defined as Over Sampling Rate (OSR) + * multiplied by the audio sample rate (Fs). Note that the OSR and Fs + * values must be selected such that the maximum frequency is less + * than 6.144 MHz. + */ + regmap_read(nau8540->regmap, NAU8540_REG_ADC_SAMPLE_RATE, &osr); + osr &= NAU8540_ADC_OSR_MASK; + if (nau8540_clock_check(nau8540, params_rate(params), osr)) + return -EINVAL; + regmap_update_bits(nau8540->regmap, NAU8540_REG_CLOCK_SRC, + NAU8540_CLK_ADC_SRC_MASK, + osr_adc_sel[osr].clk_src << NAU8540_CLK_ADC_SRC_SFT); + + switch (params_width(params)) { + case 16: + val_len |= NAU8540_I2S_DL_16; + break; + case 20: + val_len |= NAU8540_I2S_DL_20; + break; + case 24: + val_len |= NAU8540_I2S_DL_24; + break; + case 32: + val_len |= NAU8540_I2S_DL_32; + break; + default: + return -EINVAL; + } + + regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL0, + NAU8540_I2S_DL_MASK, val_len); + + return 0; +} + +static int nau8540_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) +{ + struct snd_soc_codec *codec = dai->codec; + struct nau8540 *nau8540 = snd_soc_codec_get_drvdata(codec); + unsigned int ctrl1_val = 0, ctrl2_val = 0; + + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBM_CFM: + ctrl2_val |= NAU8540_I2S_MS_MASTER; + break; + case SND_SOC_DAIFMT_CBS_CFS: + break; + default: + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + break; + case SND_SOC_DAIFMT_IB_NF: + ctrl1_val |= NAU8540_I2S_BP_INV; + break; + default: + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + ctrl1_val |= NAU8540_I2S_DF_I2S; + break; + case SND_SOC_DAIFMT_LEFT_J: + ctrl1_val |= NAU8540_I2S_DF_LEFT; + break; + case SND_SOC_DAIFMT_RIGHT_J: + ctrl1_val |= NAU8540_I2S_DF_RIGTH; + break; + case SND_SOC_DAIFMT_DSP_A: + ctrl1_val |= NAU8540_I2S_DF_PCM_AB; + break; + case SND_SOC_DAIFMT_DSP_B: + ctrl1_val |= NAU8540_I2S_DF_PCM_AB; + ctrl1_val |= NAU8540_I2S_PCMB_EN; + break; + default: + return -EINVAL; + } + + regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL0, + NAU8540_I2S_DL_MASK | NAU8540_I2S_DF_MASK | + NAU8540_I2S_BP_INV | NAU8540_I2S_PCMB_EN, ctrl1_val); + regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL1, + NAU8540_I2S_MS_MASK | NAU8540_I2S_DO12_OE, ctrl2_val); + regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL2, + NAU8540_I2S_DO34_OE, 0); + + return 0; +} + +/** + * nau8540_set_tdm_slot - configure DAI TX TDM. + * @dai: DAI + * @tx_mask: bitmask representing active TX slots. Ex. + * 0xf for normal 4 channel TDM. + * 0xf0 for shifted 4 channel TDM + * @rx_mask: no used. + * @slots: Number of slots in use. + * @slot_width: Width in bits for each slot. + * + * Configures a DAI for TDM operation. Only support 4 slots TDM. + */ +static int nau8540_set_tdm_slot(struct snd_soc_dai *dai, + unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width) +{ + struct snd_soc_codec *codec = dai->codec; + struct nau8540 *nau8540 = snd_soc_codec_get_drvdata(codec); + unsigned int ctrl2_val = 0, ctrl4_val = 0; + + if (slots > 4 || ((tx_mask & 0xf0) && (tx_mask & 0xf))) + return -EINVAL; + + ctrl4_val |= (NAU8540_TDM_MODE | NAU8540_TDM_OFFSET_EN); + if (tx_mask & 0xf0) { + ctrl2_val = 4 * slot_width; + ctrl4_val |= (tx_mask >> 4); + } else { + ctrl4_val |= tx_mask; + } + regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL4, + NAU8540_TDM_MODE | NAU8540_TDM_OFFSET_EN | + NAU8540_TDM_TX_MASK, ctrl4_val); + regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL1, + NAU8540_I2S_DO12_OE, NAU8540_I2S_DO12_OE); + regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL2, + NAU8540_I2S_DO34_OE | NAU8540_I2S_TSLOT_L_MASK, + NAU8540_I2S_DO34_OE | ctrl2_val); + + return 0; +} + + +static const struct snd_soc_dai_ops nau8540_dai_ops = { + .hw_params = nau8540_hw_params, + .set_fmt = nau8540_set_fmt, + .set_tdm_slot = nau8540_set_tdm_slot, +}; + +#define NAU8540_RATES SNDRV_PCM_RATE_8000_48000 +#define NAU8540_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE \ + | SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S32_LE) + +static struct snd_soc_dai_driver nau8540_dai = { + .name = "nau8540-hifi", + .capture = { + .stream_name = "Capture", + .channels_min = 1, + .channels_max = 4, + .rates = NAU8540_RATES, + .formats = NAU8540_FORMATS, + }, + .ops = &nau8540_dai_ops, +}; + +/** + * nau8540_calc_fll_param - Calculate FLL parameters. + * @fll_in: external clock provided to codec. + * @fs: sampling rate. + * @fll_param: Pointer to structure of FLL parameters. + * + * Calculate FLL parameters to configure codec. + * + * Returns 0 for success or negative error code. + */ +static int nau8540_calc_fll_param(unsigned int fll_in, + unsigned int fs, struct nau8540_fll *fll_param) +{ + u64 fvco, fvco_max; + unsigned int fref, i, fvco_sel; + + /* Ensure the reference clock frequency (FREF) is <= 13.5MHz by dividing + * freq_in by 1, 2, 4, or 8 using FLL pre-scalar. + * FREF = freq_in / NAU8540_FLL_REF_DIV_MASK + */ + for (i = 0; i < ARRAY_SIZE(fll_pre_scalar); i++) { + fref = fll_in / fll_pre_scalar[i].param; + if (fref <= NAU_FREF_MAX) + break; + } + if (i == ARRAY_SIZE(fll_pre_scalar)) + return -EINVAL; + fll_param->clk_ref_div = fll_pre_scalar[i].val; + + /* Choose the FLL ratio based on FREF */ + for (i = 0; i < ARRAY_SIZE(fll_ratio); i++) { + if (fref >= fll_ratio[i].param) + break; + } + if (i == ARRAY_SIZE(fll_ratio)) + return -EINVAL; + fll_param->ratio = fll_ratio[i].val; + + /* Calculate the frequency of DCO (FDCO) given freq_out = 256 * Fs. + * FDCO must be within the 90MHz - 124MHz or the FFL cannot be + * guaranteed across the full range of operation. + * FDCO = freq_out * 2 * mclk_src_scaling + */ + fvco_max = 0; + fvco_sel = ARRAY_SIZE(mclk_src_scaling); + for (i = 0; i < ARRAY_SIZE(mclk_src_scaling); i++) { + fvco = 256 * fs * 2 * mclk_src_scaling[i].param; + if (fvco > NAU_FVCO_MIN && fvco < NAU_FVCO_MAX && + fvco_max < fvco) { + fvco_max = fvco; + fvco_sel = i; + } + } + if (ARRAY_SIZE(mclk_src_scaling) == fvco_sel) + return -EINVAL; + fll_param->mclk_src = mclk_src_scaling[fvco_sel].val; + + /* Calculate the FLL 10-bit integer input and the FLL 16-bit fractional + * input based on FDCO, FREF and FLL ratio. + */ + fvco = div_u64(fvco_max << 16, fref * fll_param->ratio); + fll_param->fll_int = (fvco >> 16) & 0x3FF; + fll_param->fll_frac = fvco & 0xFFFF; + return 0; +} + +static void nau8540_fll_apply(struct regmap *regmap, + struct nau8540_fll *fll_param) +{ + regmap_update_bits(regmap, NAU8540_REG_CLOCK_SRC, + NAU8540_CLK_SRC_MASK | NAU8540_CLK_MCLK_SRC_MASK, + NAU8540_CLK_SRC_MCLK | fll_param->mclk_src); + regmap_update_bits(regmap, NAU8540_REG_FLL1, + NAU8540_FLL_RATIO_MASK, fll_param->ratio); + /* FLL 16-bit fractional input */ + regmap_write(regmap, NAU8540_REG_FLL2, fll_param->fll_frac); + /* FLL 10-bit integer input */ + regmap_update_bits(regmap, NAU8540_REG_FLL3, + NAU8540_FLL_INTEGER_MASK, fll_param->fll_int); + /* FLL pre-scaler */ + regmap_update_bits(regmap, NAU8540_REG_FLL4, + NAU8540_FLL_REF_DIV_MASK, + fll_param->clk_ref_div << NAU8540_FLL_REF_DIV_SFT); + regmap_update_bits(regmap, NAU8540_REG_FLL5, + NAU8540_FLL_CLK_SW_MASK, NAU8540_FLL_CLK_SW_REF); + regmap_update_bits(regmap, + NAU8540_REG_FLL6, NAU8540_DCO_EN, 0); + if (fll_param->fll_frac) { + regmap_update_bits(regmap, NAU8540_REG_FLL5, + NAU8540_FLL_PDB_DAC_EN | NAU8540_FLL_LOOP_FTR_EN | + NAU8540_FLL_FTR_SW_MASK, + NAU8540_FLL_PDB_DAC_EN | NAU8540_FLL_LOOP_FTR_EN | + NAU8540_FLL_FTR_SW_FILTER); + regmap_update_bits(regmap, NAU8540_REG_FLL6, + NAU8540_SDM_EN, NAU8540_SDM_EN); + } else { + regmap_update_bits(regmap, NAU8540_REG_FLL5, + NAU8540_FLL_PDB_DAC_EN | NAU8540_FLL_LOOP_FTR_EN | + NAU8540_FLL_FTR_SW_MASK, NAU8540_FLL_FTR_SW_ACCU); + regmap_update_bits(regmap, + NAU8540_REG_FLL6, NAU8540_SDM_EN, 0); + } +} + +/* freq_out must be 256*Fs in order to achieve the best performance */ +static int nau8540_set_pll(struct snd_soc_codec *codec, int pll_id, int source, + unsigned int freq_in, unsigned int freq_out) +{ + struct nau8540 *nau8540 = snd_soc_codec_get_drvdata(codec); + struct nau8540_fll fll_param; + int ret, fs; + + switch (pll_id) { + case NAU8540_CLK_FLL_MCLK: + regmap_update_bits(nau8540->regmap, NAU8540_REG_FLL3, + NAU8540_FLL_CLK_SRC_MASK, NAU8540_FLL_CLK_SRC_MCLK); + break; + + case NAU8540_CLK_FLL_BLK: + regmap_update_bits(nau8540->regmap, NAU8540_REG_FLL3, + NAU8540_FLL_CLK_SRC_MASK, NAU8540_FLL_CLK_SRC_BLK); + break; + + case NAU8540_CLK_FLL_FS: + regmap_update_bits(nau8540->regmap, NAU8540_REG_FLL3, + NAU8540_FLL_CLK_SRC_MASK, NAU8540_FLL_CLK_SRC_FS); + break; + + default: + dev_err(nau8540->dev, "Invalid clock id (%d)\n", pll_id); + return -EINVAL; + } + dev_dbg(nau8540->dev, "Sysclk is %dHz and clock id is %d\n", + freq_out, pll_id); + + fs = freq_out / 256; + ret = nau8540_calc_fll_param(freq_in, fs, &fll_param); + if (ret < 0) { + dev_err(nau8540->dev, "Unsupported input clock %d\n", freq_in); + return ret; + } + dev_dbg(nau8540->dev, "mclk_src=%x ratio=%x fll_frac=%x fll_int=%x clk_ref_div=%x\n", + fll_param.mclk_src, fll_param.ratio, fll_param.fll_frac, + fll_param.fll_int, fll_param.clk_ref_div); + + nau8540_fll_apply(nau8540->regmap, &fll_param); + mdelay(2); + regmap_update_bits(nau8540->regmap, NAU8540_REG_CLOCK_SRC, + NAU8540_CLK_SRC_MASK, NAU8540_CLK_SRC_VCO); + + return 0; +} + +static int nau8540_set_sysclk(struct snd_soc_codec *codec, + int clk_id, int source, unsigned int freq, int dir) +{ + struct nau8540 *nau8540 = snd_soc_codec_get_drvdata(codec); + + switch (clk_id) { + case NAU8540_CLK_DIS: + case NAU8540_CLK_MCLK: + regmap_update_bits(nau8540->regmap, NAU8540_REG_CLOCK_SRC, + NAU8540_CLK_SRC_MASK, NAU8540_CLK_SRC_MCLK); + regmap_update_bits(nau8540->regmap, NAU8540_REG_FLL6, + NAU8540_DCO_EN, 0); + break; + + case NAU8540_CLK_INTERNAL: + regmap_update_bits(nau8540->regmap, NAU8540_REG_FLL6, + NAU8540_DCO_EN, NAU8540_DCO_EN); + regmap_update_bits(nau8540->regmap, NAU8540_REG_CLOCK_SRC, + NAU8540_CLK_SRC_MASK, NAU8540_CLK_SRC_VCO); + break; + + default: + dev_err(nau8540->dev, "Invalid clock id (%d)\n", clk_id); + return -EINVAL; + } + + dev_dbg(nau8540->dev, "Sysclk is %dHz and clock id is %d\n", + freq, clk_id); + + return 0; +} + +static void nau8540_reset_chip(struct regmap *regmap) +{ + regmap_write(regmap, NAU8540_REG_SW_RESET, 0x00); + regmap_write(regmap, NAU8540_REG_SW_RESET, 0x00); +} + +static void nau8540_init_regs(struct nau8540 *nau8540) +{ + struct regmap *regmap = nau8540->regmap; + + /* Enable Bias/VMID/VMID Tieoff */ + regmap_update_bits(regmap, NAU8540_REG_VMID_CTRL, + NAU8540_VMID_EN | NAU8540_VMID_SEL_MASK, + NAU8540_VMID_EN | (0x2 << NAU8540_VMID_SEL_SFT)); + regmap_update_bits(regmap, NAU8540_REG_REFERENCE, + NAU8540_PRECHARGE_DIS | NAU8540_GLOBAL_BIAS_EN, + NAU8540_PRECHARGE_DIS | NAU8540_GLOBAL_BIAS_EN); + mdelay(2); + regmap_update_bits(regmap, NAU8540_REG_MIC_BIAS, + NAU8540_PU_PRE, NAU8540_PU_PRE); + regmap_update_bits(regmap, NAU8540_REG_CLOCK_CTRL, + NAU8540_CLK_ADC_EN | NAU8540_CLK_I2S_EN, + NAU8540_CLK_ADC_EN | NAU8540_CLK_I2S_EN); + /* ADC OSR selection, CLK_ADC = Fs * OSR */ + regmap_update_bits(regmap, NAU8540_REG_ADC_SAMPLE_RATE, + NAU8540_ADC_OSR_MASK, NAU8540_ADC_OSR_64); +} + +static int __maybe_unused nau8540_suspend(struct snd_soc_codec *codec) +{ + struct nau8540 *nau8540 = snd_soc_codec_get_drvdata(codec); + + regcache_cache_only(nau8540->regmap, true); + regcache_mark_dirty(nau8540->regmap); + + return 0; +} + +static int __maybe_unused nau8540_resume(struct snd_soc_codec *codec) +{ + struct nau8540 *nau8540 = snd_soc_codec_get_drvdata(codec); + + regcache_cache_only(nau8540->regmap, false); + regcache_sync(nau8540->regmap); + + return 0; +} + +static struct snd_soc_codec_driver nau8540_codec_driver = { + .set_sysclk = nau8540_set_sysclk, + .set_pll = nau8540_set_pll, + .suspend = nau8540_suspend, + .resume = nau8540_resume, + .suspend_bias_off = true, + + .component_driver = { + .controls = nau8540_snd_controls, + .num_controls = ARRAY_SIZE(nau8540_snd_controls), + .dapm_widgets = nau8540_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(nau8540_dapm_widgets), + .dapm_routes = nau8540_dapm_routes, + .num_dapm_routes = ARRAY_SIZE(nau8540_dapm_routes), + }, +}; + +static const struct regmap_config nau8540_regmap_config = { + .val_bits = 16, + .reg_bits = 16, + + .max_register = NAU8540_REG_MAX, + .readable_reg = nau8540_readable_reg, + .writeable_reg = nau8540_writeable_reg, + .volatile_reg = nau8540_volatile_reg, + + .cache_type = REGCACHE_RBTREE, + .reg_defaults = nau8540_reg_defaults, + .num_reg_defaults = ARRAY_SIZE(nau8540_reg_defaults), +}; + +static int nau8540_i2c_probe(struct i2c_client *i2c, + const struct i2c_device_id *id) +{ + struct device *dev = &i2c->dev; + struct nau8540 *nau8540 = dev_get_platdata(dev); + int ret, value; + + if (!nau8540) { + nau8540 = devm_kzalloc(dev, sizeof(*nau8540), GFP_KERNEL); + if (!nau8540) + return -ENOMEM; + } + i2c_set_clientdata(i2c, nau8540); + + nau8540->regmap = devm_regmap_init_i2c(i2c, &nau8540_regmap_config); + if (IS_ERR(nau8540->regmap)) + return PTR_ERR(nau8540->regmap); + ret = regmap_read(nau8540->regmap, NAU8540_REG_I2C_DEVICE_ID, &value); + if (ret < 0) { + dev_err(dev, "Failed to read device id from the NAU85L40: %d\n", + ret); + return ret; + } + + nau8540->dev = dev; + nau8540_reset_chip(nau8540->regmap); + nau8540_init_regs(nau8540); + + return snd_soc_register_codec(dev, + &nau8540_codec_driver, &nau8540_dai, 1); +} + +static int nau8540_i2c_remove(struct i2c_client *client) +{ + snd_soc_unregister_codec(&client->dev); + return 0; +} + + +static const struct i2c_device_id nau8540_i2c_ids[] = { + { "nau8540", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, nau8540_i2c_ids); + +#ifdef CONFIG_OF +static const struct of_device_id nau8540_of_ids[] = { + { .compatible = "nuvoton,nau8540", }, + {} +}; +MODULE_DEVICE_TABLE(of, nau8540_of_ids); +#endif + +static struct i2c_driver nau8540_i2c_driver = { + .driver = { + .name = "nau8540", + .of_match_table = of_match_ptr(nau8540_of_ids), + }, + .probe = nau8540_i2c_probe, + .remove = nau8540_i2c_remove, + .id_table = nau8540_i2c_ids, +}; +module_i2c_driver(nau8540_i2c_driver); + +MODULE_DESCRIPTION("ASoC NAU85L40 driver"); +MODULE_AUTHOR("John Hsu <KCHSU0(a)nuvoton.com>"); +MODULE_LICENSE("GPL v2"); diff --git a/sound/soc/codecs/nau8540.h b/sound/soc/codecs/nau8540.h new file mode 100644 index 0000000..5db5b22 --- /dev/null +++ b/sound/soc/codecs/nau8540.h @@ -0,0 +1,222 @@ +/* + * NAU85L40 ALSA SoC audio driver + * + * Copyright 2016 Nuvoton Technology Corp. + * Author: John Hsu <KCHSU0(a)nuvoton.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __NAU8540_H__ +#define __NAU8540_H__ + +#define NAU8540_REG_SW_RESET 0x00 +#define NAU8540_REG_POWER_MANAGEMENT 0x01 +#define NAU8540_REG_CLOCK_CTRL 0x02 +#define NAU8540_REG_CLOCK_SRC 0x03 +#define NAU8540_REG_FLL1 0x04 +#define NAU8540_REG_FLL2 0x05 +#define NAU8540_REG_FLL3 0x06 +#define NAU8540_REG_FLL4 0x07 +#define NAU8540_REG_FLL5 0x08 +#define NAU8540_REG_FLL6 0x09 +#define NAU8540_REG_FLL_VCO_RSV 0x0A +#define NAU8540_REG_PCM_CTRL0 0x10 +#define NAU8540_REG_PCM_CTRL1 0x11 +#define NAU8540_REG_PCM_CTRL2 0x12 +#define NAU8540_REG_PCM_CTRL3 0x13 +#define NAU8540_REG_PCM_CTRL4 0x14 +#define NAU8540_REG_ALC_CONTROL_1 0x20 +#define NAU8540_REG_ALC_CONTROL_2 0x21 +#define NAU8540_REG_ALC_CONTROL_3 0x22 +#define NAU8540_REG_ALC_CONTROL_4 0x23 +#define NAU8540_REG_ALC_CONTROL_5 0x24 +#define NAU8540_REG_ALC_GAIN_CH12 0x2D +#define NAU8540_REG_ALC_GAIN_CH34 0x2E +#define NAU8540_REG_ALC_STATUS 0x2F +#define NAU8540_REG_NOTCH_FIL1_CH1 0x30 +#define NAU8540_REG_NOTCH_FIL2_CH1 0x31 +#define NAU8540_REG_NOTCH_FIL1_CH2 0x32 +#define NAU8540_REG_NOTCH_FIL2_CH2 0x33 +#define NAU8540_REG_NOTCH_FIL1_CH3 0x34 +#define NAU8540_REG_NOTCH_FIL2_CH3 0x35 +#define NAU8540_REG_NOTCH_FIL1_CH4 0x36 +#define NAU8540_REG_NOTCH_FIL2_CH4 0x37 +#define NAU8540_REG_HPF_FILTER_CH12 0x38 +#define NAU8540_REG_HPF_FILTER_CH34 0x39 +#define NAU8540_REG_ADC_SAMPLE_RATE 0x3A +#define NAU8540_REG_DIGITAL_GAIN_CH1 0x40 +#define NAU8540_REG_DIGITAL_GAIN_CH2 0x41 +#define NAU8540_REG_DIGITAL_GAIN_CH3 0x42 +#define NAU8540_REG_DIGITAL_GAIN_CH4 0x43 +#define NAU8540_REG_DIGITAL_MUX 0x44 +#define NAU8540_REG_P2P_CH1 0x48 +#define NAU8540_REG_P2P_CH2 0x49 +#define NAU8540_REG_P2P_CH3 0x4A +#define NAU8540_REG_P2P_CH4 0x4B +#define NAU8540_REG_PEAK_CH1 0x4C +#define NAU8540_REG_PEAK_CH2 0x4D +#define NAU8540_REG_PEAK_CH3 0x4E +#define NAU8540_REG_PEAK_CH4 0x4F +#define NAU8540_REG_GPIO_CTRL 0x50 +#define NAU8540_REG_MISC_CTRL 0x51 +#define NAU8540_REG_I2C_CTRL 0x52 +#define NAU8540_REG_I2C_DEVICE_ID 0x58 +#define NAU8540_REG_RST 0x5A +#define NAU8540_REG_VMID_CTRL 0x60 +#define NAU8540_REG_MUTE 0x61 +#define NAU8540_REG_ANALOG_ADC1 0x64 +#define NAU8540_REG_ANALOG_ADC2 0x65 +#define NAU8540_REG_ANALOG_PWR 0x66 +#define NAU8540_REG_MIC_BIAS 0x67 +#define NAU8540_REG_REFERENCE 0x68 +#define NAU8540_REG_FEPGA1 0x69 +#define NAU8540_REG_FEPGA2 0x6A +#define NAU8540_REG_FEPGA3 0x6B +#define NAU8540_REG_FEPGA4 0x6C +#define NAU8540_REG_PWR 0x6D +#define NAU8540_REG_MAX NAU8540_REG_PWR + + +/* POWER_MANAGEMENT (0x01) */ +#define NAU8540_ADC4_EN (0x1 << 3) +#define NAU8540_ADC3_EN (0x1 << 2) +#define NAU8540_ADC2_EN (0x1 << 1) +#define NAU8540_ADC1_EN 0x1 + +/* CLOCK_CTRL (0x02) */ +#define NAU8540_CLK_ADC_EN (0x1 << 15) +#define NAU8540_CLK_I2S_EN (0x1 << 1) + +/* CLOCK_SRC (0x03) */ +#define NAU8540_CLK_SRC_SFT 15 +#define NAU8540_CLK_SRC_MASK (1 << NAU8540_CLK_SRC_SFT) +#define NAU8540_CLK_SRC_VCO (1 << NAU8540_CLK_SRC_SFT) +#define NAU8540_CLK_SRC_MCLK (0 << NAU8540_CLK_SRC_SFT) +#define NAU8540_CLK_ADC_SRC_SFT 6 +#define NAU8540_CLK_ADC_SRC_MASK (0x3 << NAU8540_CLK_ADC_SRC_SFT) +#define NAU8540_CLK_MCLK_SRC_MASK 0xf + +/* FLL1 (0x04) */ +#define NAU8540_FLL_RATIO_MASK 0x7f + +/* FLL3 (0x06) */ +#define NAU8540_FLL_CLK_SRC_SFT 10 +#define NAU8540_FLL_CLK_SRC_MASK (0x3 << NAU8540_FLL_CLK_SRC_SFT) +#define NAU8540_FLL_CLK_SRC_MCLK (0 << NAU8540_FLL_CLK_SRC_SFT) +#define NAU8540_FLL_CLK_SRC_BLK (0x2 << NAU8540_FLL_CLK_SRC_SFT) +#define NAU8540_FLL_CLK_SRC_FS (0x3 << NAU8540_FLL_CLK_SRC_SFT) +#define NAU8540_FLL_INTEGER_MASK 0x3ff + +/* FLL4 (0x07) */ +#define NAU8540_FLL_REF_DIV_SFT 10 +#define NAU8540_FLL_REF_DIV_MASK (0x3 << NAU8540_FLL_REF_DIV_SFT) + +/* FLL5 (0x08) */ +#define NAU8540_FLL_PDB_DAC_EN (0x1 << 15) +#define NAU8540_FLL_LOOP_FTR_EN (0x1 << 14) +#define NAU8540_FLL_CLK_SW_MASK (0x1 << 13) +#define NAU8540_FLL_CLK_SW_N2 (0x1 << 13) +#define NAU8540_FLL_CLK_SW_REF (0x0 << 13) +#define NAU8540_FLL_FTR_SW_MASK (0x1 << 12) +#define NAU8540_FLL_FTR_SW_ACCU (0x1 << 12) +#define NAU8540_FLL_FTR_SW_FILTER (0x0 << 12) + +/* FLL6 (0x9) */ +#define NAU8540_DCO_EN (0x1 << 15) +#define NAU8540_SDM_EN (0x1 << 14) + +/* PCM_CTRL0 (0x10) */ +#define NAU8540_I2S_BP_SFT 7 +#define NAU8540_I2S_BP_INV (0x1 << NAU8540_I2S_BP_SFT) +#define NAU8540_I2S_PCMB_SFT 6 +#define NAU8540_I2S_PCMB_EN (0x1 << NAU8540_I2S_PCMB_SFT) +#define NAU8540_I2S_DL_SFT 2 +#define NAU8540_I2S_DL_MASK (0x3 << NAU8540_I2S_DL_SFT) +#define NAU8540_I2S_DL_16 (0 << NAU8540_I2S_DL_SFT) +#define NAU8540_I2S_DL_20 (0x1 << NAU8540_I2S_DL_SFT) +#define NAU8540_I2S_DL_24 (0x2 << NAU8540_I2S_DL_SFT) +#define NAU8540_I2S_DL_32 (0x3 << NAU8540_I2S_DL_SFT) +#define NAU8540_I2S_DF_MASK 0x3 +#define NAU8540_I2S_DF_RIGTH 0 +#define NAU8540_I2S_DF_LEFT 0x1 +#define NAU8540_I2S_DF_I2S 0x2 +#define NAU8540_I2S_DF_PCM_AB 0x3 + +/* PCM_CTRL1 (0x11) */ +#define NAU8540_I2S_LRC_DIV_SFT 12 +#define NAU8540_I2S_LRC_DIV_MASK (0x3 << NAU8540_I2S_LRC_DIV_SFT) +#define NAU8540_I2S_DO12_OE (0x1 << 4) +#define NAU8540_I2S_MS_SFT 3 +#define NAU8540_I2S_MS_MASK (0x1 << NAU8540_I2S_MS_SFT) +#define NAU8540_I2S_MS_MASTER (0x1 << NAU8540_I2S_MS_SFT) +#define NAU8540_I2S_MS_SLAVE (0x0 << NAU8540_I2S_MS_SFT) +#define NAU8540_I2S_BLK_DIV_MASK 0x7 + +/* PCM_CTRL1 (0x12) */ +#define NAU8540_I2S_DO34_OE (0x1 << 11) +#define NAU8540_I2S_TSLOT_L_MASK 0x3ff + +/* PCM_CTRL4 (0x14) */ +#define NAU8540_TDM_MODE (0x1 << 15) +#define NAU8540_TDM_OFFSET_EN (0x1 << 14) +#define NAU8540_TDM_TX_MASK 0xf + +/* ADC_SAMPLE_RATE (0x3A) */ +#define NAU8540_ADC_OSR_MASK 0x3 +#define NAU8540_ADC_OSR_256 0x3 +#define NAU8540_ADC_OSR_128 0x2 +#define NAU8540_ADC_OSR_64 0x1 +#define NAU8540_ADC_OSR_32 0x0 + +/* VMID_CTRL (0x60) */ +#define NAU8540_VMID_EN (1 << 6) +#define NAU8540_VMID_SEL_SFT 4 +#define NAU8540_VMID_SEL_MASK (0x3 << NAU8540_VMID_SEL_SFT) + +/* MIC_BIAS (0x67) */ +#define NAU8540_PU_PRE (0x1 << 8) + +/* REFERENCE (0x68) */ +#define NAU8540_PRECHARGE_DIS (0x1 << 13) +#define NAU8540_GLOBAL_BIAS_EN (0x1 << 12) + + +/* System Clock Source */ +enum { + NAU8540_CLK_DIS, + NAU8540_CLK_MCLK, + NAU8540_CLK_INTERNAL, + NAU8540_CLK_FLL_MCLK, + NAU8540_CLK_FLL_BLK, + NAU8540_CLK_FLL_FS, +}; + +struct nau8540 { + struct device *dev; + struct regmap *regmap; +}; + +struct nau8540_fll { + int mclk_src; + int ratio; + int fll_frac; + int fll_int; + int clk_ref_div; +}; + +struct nau8540_fll_attr { + unsigned int param; + unsigned int val; +}; + +/* over sampling rate */ +struct nau8540_osr_attr { + unsigned int osr; + unsigned int clk_src; +}; + + +#endif /* __NAU8540_H__ */ -- 2.6.4 =========================================================================================== The privileged confidential information contained in this email is intended for use only by the addressees as indicated by the original sender of this email. If you are not the addressee indicated in this email or are not responsible for delivery of the email to such a person, please kindly reply to the sender indicating this fact and delete all copies of it from your computer and network server immediately. Your cooperation is highly appreciated. It is advised that any unauthorized use of confidential information of Nuvoton is strictly prohibited; and any information in this email irrelevant to the official business of Nuvoton shall be deemed as neither given nor endorsed by Nuvoton.

2 1

[alsa-devel] split stereo channel into two mono channels in driver
by Farzan Shojaee 04 Feb '17

04 Feb '17

Hi, I need to modify the driver (I'm not sure, codec driver or platform driver) so that, have two independent mono channels instead of one stereo channel. I'm familiar with structure of ASoC drivers, but I really don't know how can I do it. Can everybody guide me how can I do it? Even a general description would be helpful. Thanks, Farzan Shojaee

2 1

[alsa-devel] [PATCH] ASoC: Drop unnecessary debugfs ifdef
by Daniel Baluta 04 Feb '17

04 Feb '17

This is a relict of 6553bf06a369 ("ASoC: Don't try to register debugfs entries if the parent does not exist"). Signed-off-by: Daniel Baluta <daniel.baluta(a)nxp.com> --- sound/soc/soc-core.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c index 9b589d6..a110d39 100644 --- a/sound/soc/soc-core.c +++ b/sound/soc/soc-core.c @@ -4193,8 +4193,6 @@ static void __exit snd_soc_exit(void) snd_soc_util_exit(); snd_soc_debugfs_exit(); -#ifdef CONFIG_DEBUG_FS -#endif platform_driver_unregister(&soc_driver); } module_exit(snd_soc_exit); -- 2.7.4

2 1

[alsa-devel] [PATCH] drm/i915: Enable VLV audio chicken bit for LPE audio
by Takashi Iwai 03 Feb '17

03 Feb '17

The audio chicken bit (register offset 0x62f38) seems required to make DP audio working on some machines. At least, on Dell Wyse 3040, I failed to get the audio unless this bit is set once. Strangely, the bit seems necessary only once, and it persists after that, even some power-off cycles. The register is supposedly write-only, so it's no evidence whether the bit keeps effect persistently. But, judging from the experiment, it looks enough to set it up once at the device initialization. The patch is basically a cut from the original patch by Pierre-Louis Bossart. Cc: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- drivers/gpu/drm/i915/i915_reg.h | 3 +++ drivers/gpu/drm/i915/intel_lpe_audio.c | 7 +++++++ 2 files changed, 10 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 4e24ba0cdbe8..4f15a3dc6d98 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -2062,6 +2062,9 @@ enum skl_disp_power_wells { #define I915_HDMI_LPE_AUDIO_SIZE 0x1000 /* DisplayPort Audio w/ LPE */ +#define VLV_AUD_CHICKEN_BIT_REG _MMIO(VLV_DISPLAY_BASE + 0x62F38) +#define VLV_CHICKEN_BIT_DBG_ENABLE (1 << 0) + #define _VLV_AUD_PORT_EN_B_DBG (VLV_DISPLAY_BASE + 0x62F20) #define _VLV_AUD_PORT_EN_C_DBG (VLV_DISPLAY_BASE + 0x62F30) #define _VLV_AUD_PORT_EN_D_DBG (VLV_DISPLAY_BASE + 0x62F34) diff --git a/drivers/gpu/drm/i915/intel_lpe_audio.c b/drivers/gpu/drm/i915/intel_lpe_audio.c index d3ffe0012692..3ba2799e93bd 100644 --- a/drivers/gpu/drm/i915/intel_lpe_audio.c +++ b/drivers/gpu/drm/i915/intel_lpe_audio.c @@ -248,6 +248,13 @@ static int lpe_audio_setup(struct drm_i915_private *dev_priv) goto err_free_irq; } + /* enable chicken bit; at least this is required for Dell Wyse 3040 + * with DP outputs (but only sometimes by some reason!) + */ + I915_WRITE(VLV_AUD_CHICKEN_BIT_REG, + I915_READ(VLV_AUD_CHICKEN_BIT_REG) | + VLV_CHICKEN_BIT_DBG_ENABLE); + return 0; err_free_irq: irq_free_desc(dev_priv->lpe_audio.irq); -- 2.11.0

2 3

[alsa-devel] [PATCH v2 00/10] Add sun8i A33 audio driver
by Mylène Josserand 03 Feb '17

03 Feb '17

Hello everyone, This a V2 of my Allwinner A33 (sun8i) audio codec driver. Tested on linux-next-20170105 tag with one remaining patch from Chen-Yu's series: http://lkml.iu.edu/hypermail/linux/kernel/1611.3/01256.html Patch to apply before this serie: https://patchwork.kernel.org/patch/9423999/ Changes since V1: - Remove the analog codec driver as a better version has been committed by Chen-Yu Tsai and is already merged. - Remove the audio-card as simple-card can be used - The DMA maxburst is set to 8 in the sun4i-i2s instead of adding the maxburst of 4 in Sun6i dma engine. - Create a new compatible for sun4i-i2s to handle the reset line. - Fix various problems in sun8i-codec driver according to V1's reviews - Add the pm_runtime hooks in sun8i-codec driver to prepare/ unprepare clocks. - Update the DTS according to Chen-Yu's analog codec driver. - Rename sun8i-codec's clocks to "bus" and "mod" - The first "delay" issue from V1 is fixed by using a delay when enabling the headphone amplifier to let the amplifier being up. Patch 1 increases the DMA maxburst value of sun4i-i2s to 8. See Chen-Yu's commit log for more details: https://patchwork.kernel.org/patch/9411805/ Patch 2 adds the CLK_SET_RATE_PARENT flag to ccu sun8i-a33 clocks. Patches 3 and 4 add a new compatible "allwinner,sun6i-a31-i2s" to handle the reset line for sun4i-i2s driver. It uses a quirk to use a version with or without reset lines. Patch 5 adds the sun8i codec driver which represents the digital part of the A33 codec. It supports only playback features. Path 6 fixes the previous issue of a "first time delay" in V1 (see cover letter). Do not hesitate if you have comments on this patch. Patches 7 adds the dt-bindings documentation for new audio driver added in this serie (sun8i-codec). Patch 8 adds the cpu DAI, codec and audio nodes to sun8i-a33 device tree. Patches 9 and 10 enable the audio on Parrot and Sinlinx's boards. The DAI for this A33 codec is the same than for A20: "sun4i-i2s". Currently, all the drivers handle only the playback feature. The other ones (such as capture) and all other interfaces except headphone are not supported. I will send a patch to handle the capture with microphones in next few weeks. Examples of amixer commands: amixer set 'Headphone' 75% amixer set 'Headphone' on amixer set 'DAC' on amixer set 'Right DAC Mixer RSlot 0' on amixer set 'Left DAC Mixer LSlot 0' on It was tested on Parrot and Sinlinx boards. Let me know if you have any comments on this serie. Thank you in advance, Best regards, Mylène Josserand (10): ASoC: sun4i-i2s: Increase DMA max burst to 8 clk: ccu-sun8i-a33: Add CLK_SET_RATE_PARENT to ac-dig dt-bindings: sound: Add new reset compatible for sun4i-i2s ASoC: sun4i-i2s: Add quirks to handle new compatible for reset ASoC: Add sun8i digital audio codec ASoC: sun8i-codec-analog: Add amplifier event to fix first delay dt-bindings: sound: Add sun8i audio documentation ARM: dts: sun8i: Add audio codec, dai and card for A33 ARM: dts: sun8i: parrot: Enable audio nodes ARM: dts: sun8i: sinlinx: Enable audio nodes .../devicetree/bindings/sound/sun4i-i2s.txt | 23 + .../devicetree/bindings/sound/sun8i-codec.txt | 76 +++ arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts | 8 + arch/arm/boot/dts/sun8i-a33.dtsi | 47 ++ arch/arm/boot/dts/sun8i-r16-parrot.dts | 8 + drivers/clk/sunxi-ng/ccu-sun8i-a33.c | 2 +- sound/soc/sunxi/Kconfig | 11 + sound/soc/sunxi/Makefile | 1 + sound/soc/sunxi/sun4i-i2s.c | 61 ++- sound/soc/sunxi/sun8i-codec-analog.c | 30 +- sound/soc/sunxi/sun8i-codec.c | 531 +++++++++++++++++++++ 11 files changed, 791 insertions(+), 7 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/sun8i-codec.txt create mode 100644 sound/soc/sunxi/sun8i-codec.c -- 2.11.0

3 24

[alsa-devel] Applied "ASoC: sun4i-i2s: Add quirks to handle a31 compatible" to the asoc tree
by Mark Brown 03 Feb '17

03 Feb '17

The patch ASoC: sun4i-i2s: Add quirks to handle a31 compatible has been applied to the asoc tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From 2ad6f30de7087515a0bc2a718fca6681a57739a0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Myl=C3=A8ne=20Josserand?= <mylene.josserand(a)free-electrons.com> Date: Thu, 2 Feb 2017 10:24:16 +0100 Subject: [PATCH] ASoC: sun4i-i2s: Add quirks to handle a31 compatible MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Some SoCs have a reset line that must be asserted/deasserted. This patch adds a quirk to handle the new compatible "allwinner,sun6i-a31-i2s" which will deassert the reset line on probe function and assert it on remove's one. This new compatible is useful in case of A33 codec driver, for example. Signed-off-by: Mylène Josserand <mylene.josserand(a)free-electrons.com> Acked-by: Maxime Ripard <maxime.ripard(a)free-electrons.com> Signed-off-by: Mark Brown <broonie(a)kernel.org> --- sound/soc/sunxi/sun4i-i2s.c | 57 +++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 55 insertions(+), 2 deletions(-) diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c index f24d19526603..268f2bf691b3 100644 --- a/sound/soc/sunxi/sun4i-i2s.c +++ b/sound/soc/sunxi/sun4i-i2s.c @@ -14,9 +14,11 @@ #include <linux/clk.h> #include <linux/dmaengine.h> #include <linux/module.h> +#include <linux/of_device.h> #include <linux/platform_device.h> #include <linux/pm_runtime.h> #include <linux/regmap.h> +#include <linux/reset.h> #include <sound/dmaengine_pcm.h> #include <sound/pcm_params.h> @@ -92,6 +94,7 @@ struct sun4i_i2s { struct clk *bus_clk; struct clk *mod_clk; struct regmap *regmap; + struct reset_control *rst; unsigned int mclk_freq; @@ -651,9 +654,22 @@ static int sun4i_i2s_runtime_suspend(struct device *dev) return 0; } +struct sun4i_i2s_quirks { + bool has_reset; +}; + +static const struct sun4i_i2s_quirks sun4i_a10_i2s_quirks = { + .has_reset = false, +}; + +static const struct sun4i_i2s_quirks sun6i_a31_i2s_quirks = { + .has_reset = true, +}; + static int sun4i_i2s_probe(struct platform_device *pdev) { struct sun4i_i2s *i2s; + const struct sun4i_i2s_quirks *quirks; struct resource *res; void __iomem *regs; int irq, ret; @@ -674,6 +690,12 @@ static int sun4i_i2s_probe(struct platform_device *pdev) return irq; } + quirks = of_device_get_match_data(&pdev->dev); + if (!quirks) { + dev_err(&pdev->dev, "Failed to determine the quirks to use\n"); + return -ENODEV; + } + i2s->bus_clk = devm_clk_get(&pdev->dev, "apb"); if (IS_ERR(i2s->bus_clk)) { dev_err(&pdev->dev, "Can't get our bus clock\n"); @@ -692,7 +714,24 @@ static int sun4i_i2s_probe(struct platform_device *pdev) dev_err(&pdev->dev, "Can't get our mod clock\n"); return PTR_ERR(i2s->mod_clk); } - + + if (quirks->has_reset) { + i2s->rst = devm_reset_control_get(&pdev->dev, NULL); + if (IS_ERR(i2s->rst)) { + dev_err(&pdev->dev, "Failed to get reset control\n"); + return PTR_ERR(i2s->rst); + } + } + + if (!IS_ERR(i2s->rst)) { + ret = reset_control_deassert(i2s->rst); + if (ret) { + dev_err(&pdev->dev, + "Failed to deassert the reset control\n"); + return -EINVAL; + } + } + i2s->playback_dma_data.addr = res->start + SUN4I_I2S_FIFO_TX_REG; i2s->playback_dma_data.maxburst = 4; @@ -727,23 +766,37 @@ static int sun4i_i2s_probe(struct platform_device *pdev) sun4i_i2s_runtime_suspend(&pdev->dev); err_pm_disable: pm_runtime_disable(&pdev->dev); + if (!IS_ERR(i2s->rst)) + reset_control_assert(i2s->rst); return ret; } static int sun4i_i2s_remove(struct platform_device *pdev) { + struct sun4i_i2s *i2s = dev_get_drvdata(&pdev->dev); + snd_dmaengine_pcm_unregister(&pdev->dev); pm_runtime_disable(&pdev->dev); if (!pm_runtime_status_suspended(&pdev->dev)) sun4i_i2s_runtime_suspend(&pdev->dev); + if (!IS_ERR(i2s->rst)) + reset_control_assert(i2s->rst); + return 0; } static const struct of_device_id sun4i_i2s_match[] = { - { .compatible = "allwinner,sun4i-a10-i2s", }, + { + .compatible = "allwinner,sun4i-a10-i2s", + .data = &sun4i_a10_i2s_quirks, + }, + { + .compatible = "allwinner,sun6i-a31-i2s", + .data = &sun6i_a31_i2s_quirks, + }, {} }; MODULE_DEVICE_TABLE(of, sun4i_i2s_match); -- 2.11.0

1 0

[alsa-devel] [PATCH] ASoC: rsnd: fixup reset timing of sync convert_rate
by Kuninori Morimoto 03 Feb '17

03 Feb '17

From: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com> Sync convert rate settings should be availabled *after* Playing. Thus, src->sync should be reset first of init function. Otherwise, it will set remaining settings when it start playing. This patch fixes it. Thanks to Yokoyama-san Reported-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx(a)renesas.com> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com> --- >> Mark This is bug fix for Linus tree sound/soc/sh/rcar/src.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/sound/soc/sh/rcar/src.c b/sound/soc/sh/rcar/src.c index 3a8f65b..42db48d 100644 --- a/sound/soc/sh/rcar/src.c +++ b/sound/soc/sh/rcar/src.c @@ -390,6 +390,9 @@ static int rsnd_src_init(struct rsnd_mod *mod, { struct rsnd_src *src = rsnd_mod_to_src(mod); + /* reset sync convert_rate */ + src->sync.val = 0; + rsnd_mod_power_on(mod); rsnd_src_activation(mod); @@ -398,9 +401,6 @@ static int rsnd_src_init(struct rsnd_mod *mod, rsnd_src_status_clear(mod); - /* reset sync convert_rate */ - src->sync.val = 0; - return 0; } -- 2.7.4

2 1

Re: [alsa-devel] [RFC] [ALSA][CONTROL] Added 2 ioctls for reading/writing values of multiple controls in one go (at once)
by Takashi Iwai 03 Feb '17

03 Feb '17

On Thu, 02 Feb 2017 04:45:48 +0100, Takashi Sakamoto wrote: > > Hi, > > On Feb 2 2017 12:14, Satendra Singh Thakur wrote: > > From: satendra singh thakur <satendra.t(a)samsung.com> > > > > -Added 2 ioctls in alsa driver's control interface > > -Added an ioctl to read values of multiple elements at once > > -Added an ioctl to write values of multiple elements at once > > -In the absence of above ioctls user needs to call N ioctls to > > read/write value of N elements which requires N context switches > > -Proposed ioctls will allow accessing N elements' values in a single > > context switch > > -Above mentioned ioctl will be useful for alsa utils such as amixer > > which reads all controls of given sound card > > > > Signed-off-by: Satendra Singh Thakur <satendra.t(a)samsung.com> > > --- > > include/uapi/sound/asound.h | 8 +++++ > > sound/core/control.c | 69 +++++++++++++++++++++++++++++++++++++++++++ > > 2 files changed, 77 insertions(+) > > I'm _strongly_ interested in your two patches, because it has a > potentiality to purge ASoC abuse of TLV feature, which was introduced > in 2014 with a bad reviewing process. I don't think it can be a replacement for the extended TLV usages. The proposed API is nothing but a loop of ctl elem read/write, and I'm not sure whether it worth to introduce the new ioctls just for that. Takashi

1 0

[alsa-devel] [RFC] [ALSA][CONTROL] Added 2 ioctls for reading/writing values of multiple controls in one go (at once)
by Satendra Singh Thakur 03 Feb '17

03 Feb '17

From: satendra singh thakur <satendra.t(a)samsung.com> -Added 2 ioctls in alsa driver's control interface -Added an ioctl to read values of multiple elements at once -Added an ioctl to write values of multiple elements at once -In the absence of above ioctls user needs to call N ioctls to read/write value of N elements which requires N context switches -Proposed ioctls will allow accessing N elements' values in a single context switch -Above mentioned ioctl will be useful for alsa utils such as amixer which reads all controls of given sound card Signed-off-by: Satendra Singh Thakur <satendra.t(a)samsung.com> --- include/uapi/sound/asound.h | 8 +++++ sound/core/control.c | 69 +++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 77 insertions(+) diff --git a/include/uapi/sound/asound.h b/include/uapi/sound/asound.h index be353a7..a0dcee7 100644 --- a/include/uapi/sound/asound.h +++ b/include/uapi/sound/asound.h @@ -948,6 +948,11 @@ struct snd_ctl_tlv { unsigned int length; /* in bytes aligned to 4 */ unsigned int tlv[0]; /* first TLV */ }; +/*Struct to read/write multiple element values */ +struct snd_ctl_elem_values { + unsigned int num_vals;/* Number of values*/ + struct snd_ctl_elem_value *pvals;/* Pointer to the array of values */ +}; #define SNDRV_CTL_IOCTL_PVERSION _IOR('U', 0x00, int) #define SNDRV_CTL_IOCTL_CARD_INFO _IOR('U', 0x01, struct snd_ctl_card_info) @@ -974,6 +979,9 @@ struct snd_ctl_tlv { #define SNDRV_CTL_IOCTL_RAWMIDI_PREFER_SUBDEVICE _IOW('U', 0x42, int) #define SNDRV_CTL_IOCTL_POWER _IOWR('U', 0xd0, int) #define SNDRV_CTL_IOCTL_POWER_STATE _IOR('U', 0xd1, int) +/*Multipe controls' values read and write*/ +#define SNDRV_CTL_IOCTL_ELEMS_READ _IOWR('U', 0xe0, struct snd_ctl_elem_values) +#define SNDRV_CTL_IOCTL_ELEMS_WRITE _IOWR('U', 0xe1, struct snd_ctl_elem_values) /* * Read interface. diff --git a/sound/core/control.c b/sound/core/control.c index fb096cb..d60dc98 100644 --- a/sound/core/control.c +++ b/sound/core/control.c @@ -942,6 +942,7 @@ static int snd_ctl_elem_read_user(struct snd_card *card, return result; } + static int snd_ctl_elem_write(struct snd_card *card, struct snd_ctl_file *file, struct snd_ctl_elem_value *control) { @@ -1000,6 +1001,70 @@ static int snd_ctl_elem_write_user(struct snd_ctl_file *file, return result; } +/** + * snd_ctl_elems_rw_user - Read/Write values of more than one element, + * one by one + * @card: the card to which element belongs to + * @pucontrols: user-space pointer to struct snd_ctl_elem_values + * @write_flag: this flag distinguises write or read type request + * + * This function reads/writes the value of controls with the given IDs + * of the same card + * Return: On full/partial success, It returns number of successful + * controls read/written. + * On failure, it returns appropriate error + */ +static int snd_ctl_elems_rw_user(struct snd_ctl_file *file, + struct snd_ctl_elem_values __user *pucontrols, + bool write_flag) +{ + struct snd_ctl_elem_values controls; + struct snd_ctl_elem_value control; + struct snd_ctl_elem_value __user *puvals; + struct snd_card *card = file->card; + int result; + int vals; + int controls_count = 0; + + if (copy_from_user(&controls, pucontrols, sizeof(controls))) + return -EFAULT; + if (!controls.num_vals || controls.num_vals > card->controls_count) + return -EINVAL; + /*assign user-space pointer**/ + puvals = (struct snd_ctl_elem_value __user *) controls.pvals; + for (vals = 0; vals < controls.num_vals; vals++) { + if (copy_from_user(&control, puvals + vals, sizeof(control))) + return -EFAULT; + snd_power_lock(card); + result = snd_power_wait(card, SNDRV_CTL_POWER_D0); + if (result >= 0) { + if (write_flag == true) + result = snd_ctl_elem_write(card, file, + &control); + else + result = snd_ctl_elem_read(card, &control); + } + snd_power_unlock(card); + if (result < 0) { + /**If control failed to set/get + * inform user by sending back -1 in reserved field + * so that one can try again for failed elements + */ + control.reserved[0] = (unsigned char) -1; + pr_err("ALSA: control: snd_ctl_elem_write/read failed\ + for control name = %s\n", control.id.name); + } else { + controls_count++; + } + if (copy_to_user(puvals + vals, &control, sizeof(control))) + return -EFAULT; + } + pr_debug("ALSA: control: Num values successfully read/written %u\n",\ + controls_count); + /**Return successful control count to user**/ + return controls_count; +} + static int snd_ctl_elem_lock(struct snd_ctl_file *file, struct snd_ctl_elem_id __user *_id) { @@ -1515,8 +1580,12 @@ static long snd_ctl_ioctl(struct file *file, unsigned int cmd, unsigned long arg return snd_ctl_elem_info_user(ctl, argp); case SNDRV_CTL_IOCTL_ELEM_READ: return snd_ctl_elem_read_user(card, argp); + case SNDRV_CTL_IOCTL_ELEMS_READ: + return snd_ctl_elems_rw_user(ctl, argp, false); case SNDRV_CTL_IOCTL_ELEM_WRITE: return snd_ctl_elem_write_user(ctl, argp); + case SNDRV_CTL_IOCTL_ELEMS_WRITE: + return snd_ctl_elems_rw_user(ctl, argp, true); case SNDRV_CTL_IOCTL_ELEM_LOCK: return snd_ctl_elem_lock(ctl, argp); case SNDRV_CTL_IOCTL_ELEM_UNLOCK: -- 1.7.9.5

2 2

[alsa-devel] [PATCH 00/53] Intel LPE audio driver cleanups
by Takashi Iwai 03 Feb '17

03 Feb '17

Hi, this is a fairly largish patchset to fix and clean up Intel LPE audio driver. Most of the patches are to clean up and refactoring of the codes. As you can see in the diffstat below, quite lots of codes (over 1600 lines) are reduced. Now the driver structure is flattened to a single layer, and it looks much like a normal driver. Besides the refactoring, there are a few major fixes: e.g. the fix for the PCM disconnection that confuses PA,. the fix for the possible sleep-in-atomic at hotplug, the fix for racy chmap accesses. As new features, the driver supports the runtime PM properly now, it sets the CA bit for DP, and it exposes the ELD via ALSA control element. The current code is available in topic/intel-lpe-audio-cleanup branch, and it's based on the DP-audio branch, topic/intel-lpe-audio-dp that I'm going to merge to for-next soon. Takashi === Takashi Iwai (53): ALSA: x86: Don't set PCM state to DISCONNECTED ALSA: x86: Remove v1 ops and structs ALSA: x86: Drop indirect calls of had_ops ALSA: x86: Replace indirect register ops with direct calls ALSA: x86: Replace indirect query_ops with direct calls ALSA: x86: Drop snd_intel_had_interface indirect calls ALSA: x86: Pass snd_intelhad object to helpers ALSA: x86: Handle the error from hdmi_audio_probe() properly ALSA: x86: Drop useless mutex at probe ALSA: x86: Call event callback directly ALSA: x86: Fix possible stale interrupt calls ALSA: x86: Drop unused mid_hdmi_audio_is_busy() ALSA: x86: Drop the global platform device reference ALSA: x86: Drop global hlpe_state ALSA: x86: Drop global ELD copy ALSA: x86: Move the global underrun_count to struct snd_intelhad ALSA: x86: Drop unused hw_silence field ALSA: x86: Move dma_mask debug print into intel_hdmi_lpe_audio.c ALSA: x86: Embed snd_intelhad into snd_card ALSA: x86: Drop superfluous CHT PCI ID check ALSA: x86: Check platform_data earlier ALSA: x86: Call snd_card_register() at the end ALSA: x86: Drop unused hdmi_audio_query() ALSA: x86: Flatten two abstraction layers ALSA: x86: Fold intel_hdmi_audio_if.c into main file ALSA: x86: Replace pr_xxx() with dev_xxx() ALSA: x86: Fix for CONFIG_PM=n ALSA: x86: Remove indirect call of snd_pcm_period_elapsed() ALSA: x86: Drop unused fields from snd_intelhad struct ALSA: x86: Drop superfluous PCM private_free ALSA: x86: Fix sleep-in-atomic via i915 notification ALSA: x86: Remove superfluous check at resume ALSA: x86: Drop had_get_hwstate() ALSA: x86: Tidy up codes ALSA: x86: Remove _v[12] suffices ALSA: x86: Constfy tables ALSA: x86: Remove superfluous irqsave flags ALSA: x86: Fix racy access to chmap ALSA: x86: Drop flag_underrun field ALSA: x86: Drop superfluous state field ALSA: x86: Drop redundant had_stream_pvt ALSA: x86: Drop unused fields from pcm_stream_info ALSA: x86: Properly manage PCM substream lifetype ALSA: x86: Implement runtime PM ALSA: x86: Move stream status into pcm_stream_info ALSA: x86: Use the standard ELD bytes definitions ALSA: x86: Reduce redundant register field names ALSA: x86: Clean up unused defines and inclusions ALSA: x86: Create ELD control element ALSA: x86: Set CA bits for DisplayPort too ALSA: x86: Simplify comments ALSA: x86: Yet more tidy-up and clean-ups ALSA: x86: Rename drv_status to connected sound/x86/Makefile | 4 +- sound/x86/intel_hdmi_audio.c | 1901 +++++++++++++++++++------------------- sound/x86/intel_hdmi_audio.h | 117 +-- sound/x86/intel_hdmi_audio_if.c | 548 ----------- sound/x86/intel_hdmi_lpe_audio.c | 665 ------------- sound/x86/intel_hdmi_lpe_audio.h | 470 ++-------- 6 files changed, 1026 insertions(+), 2679 deletions(-) delete mode 100644 sound/x86/intel_hdmi_audio_if.c delete mode 100644 sound/x86/intel_hdmi_lpe_audio.c -- 2.11.0

3 59

[alsa-devel] [PATCH v4 2/2] ASoc: Add devictree bindings for CS35L35 CODEC
by Brian Austin 02 Feb '17

02 Feb '17

Add devicetree bindings documentatin for Cirrus Logic CS35L35 Boosted Amplifier Signed-off-by: Brian Austin <brian.austin(a)cirrus.com> --- .../devicetree/bindings/sound/cs35l35.txt | 171 +++++++++++++++++++++ 1 file changed, 171 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/cs35l35.txt diff --git a/Documentation/devicetree/bindings/sound/cs35l35.txt b/Documentation/devicetree/bindings/sound/cs35l35.txt new file mode 100644 index 0000000..8a93b1b --- /dev/null +++ b/Documentation/devicetree/bindings/sound/cs35l35.txt @@ -0,0 +1,171 @@ +CS35L35 Speaker Amplifier + +Required properties: + + - compatible : "cirrus,cs35l35" + + - reg : the I2C address of the device for I2C + + - VA-supply, VP-supply : power supplies for the device, + as covered in + Documentation/devicetree/bindings/regulator/regulator.txt. + + - interrupt-parent : Specifies the phandle of the interrupt controller to + which the IRQs from CS35L35 are delivered to. + - interrupts : IRQ line info CS35L35. + (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt + for further information relating to interrupt properties) + +Optional properties: + - reset-gpios : gpio used to reset the amplifier + + - cirrus,stereo-config : Boolean to determine if there are 2 AMPs for a + Stereo configuration + + - cirrus,audio-channel : Set Location of Audio Signal on Serial Port + 0 = Data Packet received on Left I2S Channel + 1 = Data Packet received on Right I2S Channel + + - cirrus,advisory-channel : Set Location of Advisory Signal on Serial Port + 0 = Data Packet received on Left I2S Channel + 1 = Data Packet received on Right I2S Channel + + - cirrus,shared-boost : Boolean to enable ClassH tracking of Advisory Signal + if 2 Devices share Boost BST_CTL + + - cirrus,sp-drv-strength : Value for setting the Serial Port drive strength + Table 3-10 of the datasheet lists drive-strength specifications + 0 = 1x (Default) + 1 = .5x + + - cirrus,bst-pdn-fet-on : Boolean to determine if the Boost PDN control + powers down with a rectification FET On or Off. If VSPK is supplied + externally then FET is off. + + - cirrus,boost-ctl : Boost Converter control word. + Step Size: 100 + 0x00 = (Default) VP + Range is 0x01...0x41 + + - cirrus,boost-ipk : Boost-converter peak current limit. + Configures the peak current by monitoring the current through the boost FET. + Step size: 112 + 0x07 = (Default) 2.46 Amps + Range is 0x00...0x19 + + - cirrus,amp-gain-zc : Boolean to determine if to use Amplifier gain-change + zero-cross + +Optional H/G Algorithm sub-node: + + The cs35l35 node can have a single "cirrus,classh-internal-algo" sub-node + that will disable automatic control of the internal H/G Algorithm. + + It is strongly recommended that the Datasheet be referenced when adjusting + or using these Class H Algorithm controls over the internal Algorithm. + Serious damage can occur to the Device and surrounding components. + + - cirrus,classh-internal-algo : Sub-node for the Internal Class H Algorithm + See Section 4.3 Internal Class H Algorithm in the Datasheet. + If not used, the device manages the ClassH Algorithm internally. + +Optional properties for the "cirrus,classh-internal-algo" Sub-node + + Section 7.29 Class H Control + - cirrus,classh-bst-overide : Boolean + - cirrus,classh-bst-max-limit + - cirrus,classh-mem-depth + + Section 7.30 Class H Headroom Control + - cirrus,classh-headroom + + Section 7.31 Class H Release Rate + - cirrus,classh-release-rate + + Section 7.32 Class H Weak FET Drive Control + - cirrus,classh-wk-fet-disable + - cirrus,classh-wk-fet-delay + - cirrus,classh-wk-fet-thld + + Section 7.34 Class H VP Control + - cirrus,classh-vpch-auto + - cirrus,classh-vpch-rate + - cirrus,classh-vpch-man + +Optional Monitor Signal Format sub-node: + + The cs35l35 node can have a single "cirrus,monitor-signal-format" sub-node + for adjusting the Depth, Location and Frame of the Monitoring Signals + for Algorithms. + + See Sections 4.8.2 through 4.8.4 Serial-Port Control in the Datasheet + + -cirrus,monitor-signal-format : Sub-node for the Monitor Signaling Formating + on the I2S Port. Each of the 3 8 bit values in the array contain the settings + for depth, location, and frame. + + If not used, the defaults for the 6 monitor signals is used. + + Sections 7.44 - 7.53 lists values for the depth, location, and frame + for each monitoring signal. + + - cirrus,imon : 3 8 bit values to set the depth, location, and frame + of the IMON monitor signal. + + - cirrus,vmon : 3 8 bit values to set the depth, location, and frame + of the VMON monitor signal. + + - cirrus,vpmon : 3 8 bit values to set the depth, location, and frame + of the VPMON monitor signal. + + - cirrus,vbstmon : 3 8 bit values to set the depth, location, and frame + of the VBSTMON monitor signal + + - cirrus,vpbrstat : 3 8 bit values to set the depth, location, and frame + of the VPBRSTAT monitor signal + + - cirrus,zerofill : 3 8 bit values to set the depth, location, and frame\ + of the ZEROFILL packet in the monitor signal + +Example: + +cs35l35: cs35l35@20 { + compatible = "cirrus,cs35l35"; + reg = <0x20>; + VA-supply = <&dummy_vreg>; + VP-supply = <&dummy_vreg>; + reset-gpios = <&axi_gpio 54 0>; + interrupt-parent = <&gpio8>; + interrupts = <3 IRQ_TYPE_LEVEL_LOW>; + cirrus,boost-ctl = <0x41>; + + cirrus,stereo-config; + cirrus,audio-channel = <0x00>; + cirrus,advisory-channel = <0x01>; + cirrus,shared-boost; + + cirrus,classh-internal-algo { + cirrus,classh-bst-overide; + cirrus,classh-bst-max-limit = <0x01>; + cirrus,classh-mem-depth = <0x01>; + cirrus,classh-release-rate = <0x08>; + cirrus,classh-headroom-millivolt = <0x0B>; + cirrus,classh-wk-fet-disable = <0x01>; + cirrus,classh-wk-fet-delay = <0x04>; + cirrus,classh-wk-fet-thld = <0x01>; + cirrus,classh-vpch-auto = <0x01>; + cirrus,classh-vpch-rate = <0x02>; + cirrus,classh-vpch-man = <0x05>; + }; + + /* Depth, Location, Frame */ + cirrus,monitor-signal-format { + cirrus,imon = /bits/ 8 <0x03 0x00 0x01>; + cirrus,vmon = /bits/ 8 <0x03 0x00 0x00>; + cirrus,vpmon = /bits/ 8 <0x03 0x04 0x00>; + cirrus,vbstmon = /bits/ 8 <0x03 0x04 0x01>; + cirrus,vpbrstat = /bits/ 8 <0x00 0x04 0x00>; + cirrus,zerofill = /bits/ 8 <0x00 0x00 0x00>; + }; + +}; -- 1.9.1

2 3

[alsa-devel] [PATCH v8] ASoC: omap-mcbsp: Add PM QoS support for McBSP to prevent glitches
by Matt Ranostay 02 Feb '17

02 Feb '17

We can get audio errors if hitting deeper idle states on omaps: [alsa.c:230] error: Fatal problem with alsa output, error -5. [audio.c:614] error: Error in writing audio (Input/output error?)! This seems to happen with off mode idle enabled as power for the whole SoC may get cut off between filling the McBSP fifo using DMA. While active DMA blocks deeper idle states in hardware, McBSP activity does not seem to do so. Basing the QoS latency calculation on the FIFO size, threshold, sample rate, and channels. Based on the original patch by Tony Lindgren Link: https://patchwork.kernel.org/patch/9305867/ Cc: Tony Lindgren <tony(a)atomide.com> Cc: Peter Ujfalusi <peter.ujfalusi(a)ti.com> Signed-off-by: Matt Ranostay <matt(a)ranostay.consulting> --- Changes from v1: * add calculations for latency per number of FIFO locations Changes from v2: * add missing mcbsp.h header change Changes from v3: * base the latency calculations on threshold, buffer size, sample rate, and channels Changes from v4: * using Peter Ujfalusi's suggestions for restoring a higher latency on audio stream completion, or if not applicable remove the QoS request Changes from v5: * clean up latency checking logic * move logic to .prepare and .shutdown to avoid functions that can sleep Changes from v6: * move QoS removal to asoc_mcbsp_remove from omap_mcbsp_cleanup * also remove header include that is unneeded Changes from v7: * fix issue reported by Tony Lindgreen that a player application could close the card after hw_params, and cause an invalid pm_qos_remove_request() sound/soc/omap/mcbsp.h | 3 +++ sound/soc/omap/omap-mcbsp.c | 48 ++++++++++++++++++++++++++++++++++++++++++++- 2 files changed, 50 insertions(+), 1 deletion(-) diff --git a/sound/soc/omap/mcbsp.h b/sound/soc/omap/mcbsp.h index 61e93b1c185d..46ae1269a698 100644 --- a/sound/soc/omap/mcbsp.h +++ b/sound/soc/omap/mcbsp.h @@ -323,8 +323,11 @@ struct omap_mcbsp { unsigned int fmt; unsigned int in_freq; + unsigned int latency[2]; int clk_div; int wlen; + + struct pm_qos_request pm_qos_req; }; void omap_mcbsp_config(struct omap_mcbsp *mcbsp, diff --git a/sound/soc/omap/omap-mcbsp.c b/sound/soc/omap/omap-mcbsp.c index d018e966e533..6b40bdbef336 100644 --- a/sound/soc/omap/omap-mcbsp.c +++ b/sound/soc/omap/omap-mcbsp.c @@ -157,6 +157,17 @@ static void omap_mcbsp_dai_shutdown(struct snd_pcm_substream *substream, struct snd_soc_dai *cpu_dai) { struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); + int tx = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK); + int stream1 = tx ? SNDRV_PCM_STREAM_PLAYBACK : SNDRV_PCM_STREAM_CAPTURE; + int stream2 = tx ? SNDRV_PCM_STREAM_CAPTURE : SNDRV_PCM_STREAM_PLAYBACK; + + if (mcbsp->latency[stream2]) + pm_qos_update_request(&mcbsp->pm_qos_req, + mcbsp->latency[stream2]); + else if (mcbsp->latency[stream1]) + pm_qos_remove_request(&mcbsp->pm_qos_req); + + mcbsp->latency[stream1] = 0; if (!cpu_dai->active) { omap_mcbsp_free(mcbsp); @@ -164,6 +175,28 @@ static void omap_mcbsp_dai_shutdown(struct snd_pcm_substream *substream, } } +static int omap_mcbsp_dai_prepare(struct snd_pcm_substream *substream, + struct snd_soc_dai *cpu_dai) +{ + struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); + struct pm_qos_request *pm_qos_req = &mcbsp->pm_qos_req; + int tx = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK); + int stream1 = tx ? SNDRV_PCM_STREAM_PLAYBACK : SNDRV_PCM_STREAM_CAPTURE; + int stream2 = tx ? SNDRV_PCM_STREAM_CAPTURE : SNDRV_PCM_STREAM_PLAYBACK; + int latency = mcbsp->latency[stream2]; + + /* Prevent omap hardware from hitting off between FIFO fills */ + if (!latency || mcbsp->latency[stream1] < latency) + latency = mcbsp->latency[stream1]; + + if (pm_qos_request_active(pm_qos_req)) + pm_qos_update_request(pm_qos_req, latency); + else if (latency) + pm_qos_add_request(pm_qos_req, PM_QOS_CPU_DMA_LATENCY, latency); + + return 0; +} + static int omap_mcbsp_dai_trigger(struct snd_pcm_substream *substream, int cmd, struct snd_soc_dai *cpu_dai) { @@ -226,6 +259,7 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream, int wlen, channels, wpf; int pkt_size = 0; unsigned int format, div, framesize, master; + unsigned int buffer_size = mcbsp->pdata->buffer_size; dma_data = snd_soc_dai_get_dma_data(cpu_dai, substream); channels = params_channels(params); @@ -240,7 +274,9 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream, default: return -EINVAL; } - if (mcbsp->pdata->buffer_size) { + if (buffer_size) { + int latency; + if (mcbsp->dma_op_mode == MCBSP_DMA_MODE_THRESHOLD) { int period_words, max_thrsh; int divider = 0; @@ -271,6 +307,12 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream, /* Use packet mode for non mono streams */ pkt_size = channels; } + + latency = ((((buffer_size - pkt_size) / channels) * 1000) + / (params->rate_num / params->rate_den)); + + mcbsp->latency[substream->stream] = latency; + omap_mcbsp_set_threshold(substream, pkt_size); } @@ -554,6 +596,7 @@ static int omap_mcbsp_dai_set_dai_sysclk(struct snd_soc_dai *cpu_dai, static const struct snd_soc_dai_ops mcbsp_dai_ops = { .startup = omap_mcbsp_dai_startup, .shutdown = omap_mcbsp_dai_shutdown, + .prepare = omap_mcbsp_dai_prepare, .trigger = omap_mcbsp_dai_trigger, .delay = omap_mcbsp_dai_delay, .hw_params = omap_mcbsp_dai_hw_params, @@ -835,6 +878,9 @@ static int asoc_mcbsp_remove(struct platform_device *pdev) if (mcbsp->pdata->ops && mcbsp->pdata->ops->free) mcbsp->pdata->ops->free(mcbsp->id); + if (pm_qos_request_active(&mcbsp->pm_qos_req)) + pm_qos_remove_request(&mcbsp->pm_qos_req); + omap_mcbsp_cleanup(mcbsp); clk_put(mcbsp->fclk); -- 2.10.2

5 11

[alsa-devel] [PATCH 0/2] Baytrail/Cherrytrail audio fixes - take2
by Pierre-Louis Bossart 02 Feb '17

02 Feb '17

Correction to previous series (applies on top for Mark's for-next) - better handling of missing gpiod, continue only on -ENOENT - compiler warning Pierre-Louis Bossart (2): ASoC: rt5645: fix error handling for gpio detection ASoC: cht-bsw-rt5645: fix unused variable compiler warning sound/soc/codecs/rt5645.c | 10 ++++++++-- sound/soc/intel/boards/cht_bsw_rt5645.c | 1 - 2 files changed, 8 insertions(+), 3 deletions(-) -- 2.7.4

3 6

[alsa-devel] [PATCH] ASoC: nau8824: new codec driver
by John Hsu 02 Feb '17

02 Feb '17

Add codec driver of NAU88L24 Signed-off-by: John Hsu <KCHSU0(a)nuvoton.com> --- .../devicetree/bindings/sound/nau8824.txt | 86 + sound/soc/codecs/Kconfig | 5 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/nau8824.c | 1750 ++++++++++++++++++++ sound/soc/codecs/nau8824.h | 462 ++++++ 5 files changed, 2305 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/nau8824.txt create mode 100644 sound/soc/codecs/nau8824.c create mode 100644 sound/soc/codecs/nau8824.h diff --git a/Documentation/devicetree/bindings/sound/nau8824.txt b/Documentation/devicetree/bindings/sound/nau8824.txt new file mode 100644 index 0000000..c0a68a6 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/nau8824.txt @@ -0,0 +1,86 @@ +Nuvoton NAU8824 audio codec + +This device supports I2C only. + +Required properties: + - compatible : Must be "nuvoton,nau8824" + + - reg : the I2C address of the device. This is either 0x1a (CSB=0) or 0x1b (CSB=1). + +Optional properties: + - nuvoton,vref-impedance: VREF Impedance selection + 0 - Open + 1 - 25 kOhm + 2 - 125 kOhm + 3 - 2.5 kOhm + + - nuvoton,micbias-voltage: Micbias voltage level. + 0 - VDDA + 1 - VDDA + 2 - VDDA * 1.1 + 3 - VDDA * 1.2 + 4 - VDDA * 1.3 + 5 - VDDA * 1.4 + 6 - VDDA * 1.53 + 7 - VDDA * 1.53 + + - nuvoton,sar-threshold-num: Number of buttons supported + - nuvoton,sar-threshold: Impedance threshold for each button. Array that contains up to 8 buttons configuration. SAR value is calculated as + SAR = 255 * MICBIAS / SAR_VOLTAGE * R / (2000 + R) + where MICBIAS is configured by 'nuvoton,micbias-voltage', SAR_VOLTAGE is configured by 'nuvoton,sar-voltage', R - button impedance. + Refer datasheet section 10.2 for more information about threshold calculation. + + - nuvoton,sar-hysteresis: Button impedance measurement hysteresis. + + - nuvoton,sar-voltage: Reference voltage for button impedance measurement. + 0 - VDDA + 1 - VDDA + 2 - VDDA * 1.1 + 3 - VDDA * 1.2 + 4 - VDDA * 1.3 + 5 - VDDA * 1.4 + 6 - VDDA * 1.53 + 7 - VDDA * 1.53 + + - nuvoton,sar-compare-time: SAR compare time + 0 - 500 ns + 1 - 1 us + 2 - 2 us + 3 - 4 us + + - nuvoton,sar-sampling-time: SAR sampling time + 0 - 2 us + 1 - 4 us + 2 - 8 us + 3 - 16 us + + - nuvoton,short-key-debounce: Button short key press debounce time. + 0 - 30 ms + 1 - 50 ms + 2 - 100 ms + + - nuvoton,jack-eject-debounce: Jack ejection debounce time. + 0 - 0 ms + 1 - 1 ms + 2 - 10 ms + + +Example: + + headset: nau8824@1a { + compatible = "nuvoton,nau8824"; + reg = <0x1a>; + interrupt-parent = <&gpio>; + interrupts = <TEGRA_GPIO(E, 6) IRQ_TYPE_LEVEL_LOW>; + nuvoton,vref-impedance = <2>; + nuvoton,micbias-voltage = <6>; + // Setup 4 buttons impedance according to Android specification + nuvoton,sar-threshold-num = <4>; + nuvoton,sar-threshold = <0xc 0x1e 0x38 0x60>; + nuvoton,sar-hysteresis = <0>; + nuvoton,sar-voltage = <6>; + nuvoton,sar-compare-time = <1>; + nuvoton,sar-sampling-time = <1>; + nuvoton,short-key-debounce = <0>; + nuvoton,jack-eject-debounce = <1>; + }; diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index 9e1718a..67b5de5 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -96,6 +96,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_MC13783 if MFD_MC13XXX select SND_SOC_ML26124 if I2C select SND_SOC_NAU8810 if I2C + select SND_SOC_NAU8824 if I2C select SND_SOC_NAU8825 if I2C select SND_SOC_HDMI_CODEC select SND_SOC_PCM1681 if I2C @@ -1109,6 +1110,10 @@ config SND_SOC_NAU8810 tristate "Nuvoton Technology Corporation NAU88C10 CODEC" depends on I2C +config SND_SOC_NAU8824 + tristate "Nuvoton Technology Corporation NAU88L24 CODEC" + depends on I2C + config SND_SOC_NAU8825 tristate diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index 7e1dad7..02dd0c3 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -91,6 +91,7 @@ snd-soc-ml26124-objs := ml26124.o snd-soc-msm8916-analog-objs := msm8916-wcd-analog.o snd-soc-msm8916-digital-objs := msm8916-wcd-digital.o snd-soc-nau8810-objs := nau8810.o +snd-soc-nau8824-objs := nau8824.o snd-soc-nau8825-objs := nau8825.o snd-soc-hdmi-codec-objs := hdmi-codec.o snd-soc-pcm1681-objs := pcm1681.o @@ -319,6 +320,7 @@ obj-$(CONFIG_SND_SOC_ML26124) += snd-soc-ml26124.o obj-$(CONFIG_SND_SOC_MSM8916_WCD_ANALOG) +=snd-soc-msm8916-analog.o obj-$(CONFIG_SND_SOC_MSM8916_WCD_DIGITAL) +=snd-soc-msm8916-digital.o obj-$(CONFIG_SND_SOC_NAU8810) += snd-soc-nau8810.o +obj-$(CONFIG_SND_SOC_NAU8824) += snd-soc-nau8824.o obj-$(CONFIG_SND_SOC_NAU8825) += snd-soc-nau8825.o obj-$(CONFIG_SND_SOC_HDMI_CODEC) += snd-soc-hdmi-codec.o obj-$(CONFIG_SND_SOC_PCM1681) += snd-soc-pcm1681.o diff --git a/sound/soc/codecs/nau8824.c b/sound/soc/codecs/nau8824.c new file mode 100644 index 0000000..c5065c5 --- /dev/null +++ b/sound/soc/codecs/nau8824.c @@ -0,0 +1,1750 @@ +/* + * NAU88L24 ALSA SoC audio driver + * + * Copyright 2016 Nuvoton Technology Corp. + * Author: John Hsu <KCHSU0(a)nuvoton.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/module.h> +#include <linux/delay.h> +#include <linux/init.h> +#include <linux/i2c.h> +#include <linux/regmap.h> +#include <linux/slab.h> +#include <linux/clk.h> +#include <linux/acpi.h> +#include <linux/math64.h> +#include <linux/semaphore.h> + +#include <sound/initval.h> +#include <sound/tlv.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/soc.h> +#include <sound/jack.h> + +#include "nau8824.h" + + +/* the ADC threshold of headset */ +#define HEADSET_SARADC_THD 0x80 + +static int nau8824_config_sysclk(struct nau8824 *nau8824, + int clk_id, unsigned int freq); +static bool nau8824_is_jack_inserted(struct nau8824 *nau8824); + +/* the parameter threshold of FLL */ +#define NAU_FREF_MAX 13500000 +#define NAU_FVCO_MAX 124000000 +#define NAU_FVCO_MIN 90000000 + +/* scaling for mclk from sysclk_src output */ +static const struct nau8824_fll_attr mclk_src_scaling[] = { + { 1, 0x0 }, + { 2, 0x2 }, + { 4, 0x3 }, + { 8, 0x4 }, + { 16, 0x5 }, + { 32, 0x6 }, + { 3, 0x7 }, + { 6, 0xa }, + { 12, 0xb }, + { 24, 0xc }, +}; + +/* ratio for input clk freq */ +static const struct nau8824_fll_attr fll_ratio[] = { + { 512000, 0x01 }, + { 256000, 0x02 }, + { 128000, 0x04 }, + { 64000, 0x08 }, + { 32000, 0x10 }, + { 8000, 0x20 }, + { 4000, 0x40 }, +}; + +static const struct nau8824_fll_attr fll_pre_scalar[] = { + { 1, 0x0 }, + { 2, 0x1 }, + { 4, 0x2 }, + { 8, 0x3 }, +}; + +/* the maximum frequency of CLK_ADC and CLK_DAC */ +#define CLK_DA_AD_MAX 6144000 + +/* over sampling rate */ +static const struct nau8824_osr_attr osr_dac_sel[] = { + { 64, 2 }, /* OSR 64, SRC 1/4 */ + { 256, 0 }, /* OSR 256, SRC 1 */ + { 128, 1 }, /* OSR 128, SRC 1/2 */ + { 0, 0 }, + { 32, 3 }, /* OSR 32, SRC 1/8 */ +}; + +static const struct nau8824_osr_attr osr_adc_sel[] = { + { 32, 3 }, /* OSR 32, SRC 1/8 */ + { 64, 2 }, /* OSR 64, SRC 1/4 */ + { 128, 1 }, /* OSR 128, SRC 1/2 */ + { 256, 0 }, /* OSR 256, SRC 1 */ +}; + +static const struct reg_default nau8824_reg_defaults[] = { + { NAU8824_REG_ENA_CTRL, 0x0000 }, + { NAU8824_REG_CLK_GATING_ENA, 0x0000 }, + { NAU8824_REG_CLK_DIVIDER, 0x0000 }, + { NAU8824_REG_FLL1, 0x0000 }, + { NAU8824_REG_FLL2, 0x3126 }, + { NAU8824_REG_FLL3, 0x0008 }, + { NAU8824_REG_FLL4, 0x0010 }, + { NAU8824_REG_FLL5, 0xC000 }, + { NAU8824_REG_FLL6, 0x6000 }, + { NAU8824_REG_FLL_VCO_RSV, 0xF13C }, + { NAU8824_REG_JACK_DET_CTRL, 0x0000 }, + { NAU8824_REG_INTERRUPT_SETTING_1, 0x0000 }, + { NAU8824_REG_IRQ, 0x0000 }, + { NAU8824_REG_CLEAR_INT_REG, 0x0000 }, + { NAU8824_REG_INTERRUPT_SETTING, 0x1000 }, + { NAU8824_REG_SAR_ADC, 0x0015 }, + { NAU8824_REG_VDET_COEFFICIENT, 0x0110 }, + { NAU8824_REG_VDET_THRESHOLD_1, 0x0000 }, + { NAU8824_REG_VDET_THRESHOLD_2, 0x0000 }, + { NAU8824_REG_VDET_THRESHOLD_3, 0x0000 }, + { NAU8824_REG_VDET_THRESHOLD_4, 0x0000 }, + { NAU8824_REG_GPIO_SEL, 0x0000 }, + { NAU8824_REG_PORT0_I2S_PCM_CTRL_1, 0x000B }, + { NAU8824_REG_PORT0_I2S_PCM_CTRL_2, 0x0010 }, + { NAU8824_REG_PORT0_LEFT_TIME_SLOT, 0x0000 }, + { NAU8824_REG_PORT0_RIGHT_TIME_SLOT, 0x0000 }, + { NAU8824_REG_TDM_CTRL, 0x0000 }, + { NAU8824_REG_ADC_HPF_FILTER, 0x0000 }, + { NAU8824_REG_ADC_FILTER_CTRL, 0x0002 }, + { NAU8824_REG_DAC_FILTER_CTRL_1, 0x0000 }, + { NAU8824_REG_DAC_FILTER_CTRL_2, 0x0000 }, + { NAU8824_REG_NOTCH_FILTER_1, 0x0000 }, + { NAU8824_REG_NOTCH_FILTER_2, 0x0000 }, + { NAU8824_REG_EQ1_LOW, 0x112C }, + { NAU8824_REG_EQ2_EQ3, 0x2C2C }, + { NAU8824_REG_EQ4_EQ5, 0x2C2C }, + { NAU8824_REG_ADC_CH0_DGAIN_CTRL, 0x0100 }, + { NAU8824_REG_ADC_CH1_DGAIN_CTRL, 0x0100 }, + { NAU8824_REG_ADC_CH2_DGAIN_CTRL, 0x0100 }, + { NAU8824_REG_ADC_CH3_DGAIN_CTRL, 0x0100 }, + { NAU8824_REG_DAC_MUTE_CTRL, 0x0000 }, + { NAU8824_REG_DAC_CH0_DGAIN_CTRL, 0x0100 }, + { NAU8824_REG_DAC_CH1_DGAIN_CTRL, 0x0100 }, + { NAU8824_REG_ADC_TO_DAC_ST, 0x0000 }, + { NAU8824_REG_DRC_KNEE_IP12_ADC_CH01, 0x1486 }, + { NAU8824_REG_DRC_KNEE_IP34_ADC_CH01, 0x0F12 }, + { NAU8824_REG_DRC_SLOPE_ADC_CH01, 0x25FF }, + { NAU8824_REG_DRC_ATKDCY_ADC_CH01, 0x3457 }, + { NAU8824_REG_DRC_KNEE_IP12_ADC_CH23, 0x1486 }, + { NAU8824_REG_DRC_KNEE_IP34_ADC_CH23, 0x0F12 }, + { NAU8824_REG_DRC_SLOPE_ADC_CH23, 0x25FF }, + { NAU8824_REG_DRC_ATKDCY_ADC_CH23, 0x3457 }, + { NAU8824_REG_DRC_GAINL_ADC0, 0x0200 }, + { NAU8824_REG_DRC_GAINL_ADC1, 0x0200 }, + { NAU8824_REG_DRC_GAINL_ADC2, 0x0200 }, + { NAU8824_REG_DRC_GAINL_ADC3, 0x0200 }, + { NAU8824_REG_DRC_KNEE_IP12_DAC, 0x1486 }, + { NAU8824_REG_DRC_KNEE_IP34_DAC, 0x0F12 }, + { NAU8824_REG_DRC_SLOPE_DAC, 0x25F9 }, + { NAU8824_REG_DRC_ATKDCY_DAC, 0x3457 }, + { NAU8824_REG_DRC_GAIN_DAC_CH0, 0x0200 }, + { NAU8824_REG_DRC_GAIN_DAC_CH1, 0x0200 }, + { NAU8824_REG_MODE, 0x0000 }, + { NAU8824_REG_MODE1, 0x0000 }, + { NAU8824_REG_MODE2, 0x0000 }, + { NAU8824_REG_CLASSG, 0x0000 }, + { NAU8824_REG_OTP_EFUSE, 0x0000 }, + { NAU8824_REG_OTPDOUT_1, 0x0000 }, + { NAU8824_REG_OTPDOUT_2, 0x0000 }, + { NAU8824_REG_MISC_CTRL, 0x0000 }, + { NAU8824_REG_I2C_TIMEOUT, 0xEFFF }, + { NAU8824_REG_TEST_MODE, 0x0000 }, + { NAU8824_REG_I2C_DEVICE_ID, 0x1AF1 }, + { NAU8824_REG_SAR_ADC_DATA_OUT, 0x00FF }, + { NAU8824_REG_BIAS_ADJ, 0x0000 }, + { NAU8824_REG_PGA_GAIN, 0x0000 }, + { NAU8824_REG_TRIM_SETTINGS, 0x0000 }, + { NAU8824_REG_ANALOG_CONTROL_1, 0x0000 }, + { NAU8824_REG_ANALOG_CONTROL_2, 0x0000 }, + { NAU8824_REG_ENABLE_LO, 0x0000 }, + { NAU8824_REG_GAIN_LO, 0x0000 }, + { NAU8824_REG_CLASSD_GAIN_1, 0x0000 }, + { NAU8824_REG_CLASSD_GAIN_2, 0x0000 }, + { NAU8824_REG_ANALOG_ADC_1, 0x0011 }, + { NAU8824_REG_ANALOG_ADC_2, 0x0020 }, + { NAU8824_REG_RDAC, 0x0008 }, + { NAU8824_REG_MIC_BIAS, 0x0006 }, + { NAU8824_REG_HS_VOLUME_CONTROL, 0x0000 }, + { NAU8824_REG_BOOST, 0x0000 }, + { NAU8824_REG_FEPGA, 0x0000 }, + { NAU8824_REG_FEPGA_II, 0x0000 }, + { NAU8824_REG_FEPGA_SE, 0x0000 }, + { NAU8824_REG_FEPGA_ATTENUATION, 0x0000 }, + { NAU8824_REG_ATT_PORT0, 0x0000 }, + { NAU8824_REG_ATT_PORT1, 0x0000 }, + { NAU8824_REG_POWER_UP_CONTROL, 0x0000 }, + { NAU8824_REG_CHARGE_PUMP_CONTROL, 0x0300 }, + { NAU8824_REG_CHARGE_PUMP_INPUT, 0x0013 }, +}; + +static int nau8824_sema_acquire(struct nau8824 *nau8824, long timeout) +{ + int ret; + + if (timeout) { + ret = down_timeout(&nau8824->jd_sem, timeout); + if (ret < 0) + dev_warn(nau8824->dev, "Acquire semaphone timeout\n"); + } else { + ret = down_interruptible(&nau8824->jd_sem); + if (ret < 0) + dev_warn(nau8824->dev, "Acquire semaphone fail\n"); + } + + return ret; +} + +static inline void nau8824_sema_release(struct nau8824 *nau8824) +{ + up(&nau8824->jd_sem); +} + +static bool nau8824_readable_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case NAU8824_REG_ENA_CTRL ... NAU8824_REG_FLL_VCO_RSV: + case NAU8824_REG_JACK_DET_CTRL: + case NAU8824_REG_INTERRUPT_SETTING_1: + case NAU8824_REG_IRQ: + case NAU8824_REG_CLEAR_INT_REG ... NAU8824_REG_VDET_THRESHOLD_4: + case NAU8824_REG_GPIO_SEL: + case NAU8824_REG_PORT0_I2S_PCM_CTRL_1 ... NAU8824_REG_TDM_CTRL: + case NAU8824_REG_ADC_HPF_FILTER ... NAU8824_REG_EQ4_EQ5: + case NAU8824_REG_ADC_CH0_DGAIN_CTRL ... NAU8824_REG_ADC_TO_DAC_ST: + case NAU8824_REG_DRC_KNEE_IP12_ADC_CH01 ... NAU8824_REG_DRC_GAINL_ADC3: + case NAU8824_REG_DRC_KNEE_IP12_DAC ... NAU8824_REG_DRC_GAIN_DAC_CH1: + case NAU8824_REG_CLASSG ... NAU8824_REG_OTP_EFUSE: + case NAU8824_REG_OTPDOUT_1 ... NAU8824_REG_OTPDOUT_2: + case NAU8824_REG_I2C_TIMEOUT: + case NAU8824_REG_I2C_DEVICE_ID ... NAU8824_REG_SAR_ADC_DATA_OUT: + case NAU8824_REG_BIAS_ADJ ... NAU8824_REG_CLASSD_GAIN_2: + case NAU8824_REG_ANALOG_ADC_1 ... NAU8824_REG_ATT_PORT1: + case NAU8824_REG_POWER_UP_CONTROL ... NAU8824_REG_CHARGE_PUMP_INPUT: + return true; + default: + return false; + } + +} + +static bool nau8824_writeable_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case NAU8824_REG_RESET ... NAU8824_REG_FLL_VCO_RSV: + case NAU8824_REG_JACK_DET_CTRL: + case NAU8824_REG_INTERRUPT_SETTING_1: + case NAU8824_REG_CLEAR_INT_REG ... NAU8824_REG_VDET_THRESHOLD_4: + case NAU8824_REG_GPIO_SEL: + case NAU8824_REG_PORT0_I2S_PCM_CTRL_1 ... NAU8824_REG_TDM_CTRL: + case NAU8824_REG_ADC_HPF_FILTER ... NAU8824_REG_EQ4_EQ5: + case NAU8824_REG_ADC_CH0_DGAIN_CTRL ... NAU8824_REG_ADC_TO_DAC_ST: + case NAU8824_REG_DRC_KNEE_IP12_ADC_CH01: + case NAU8824_REG_DRC_KNEE_IP34_ADC_CH01: + case NAU8824_REG_DRC_SLOPE_ADC_CH01: + case NAU8824_REG_DRC_ATKDCY_ADC_CH01: + case NAU8824_REG_DRC_KNEE_IP12_ADC_CH23: + case NAU8824_REG_DRC_KNEE_IP34_ADC_CH23: + case NAU8824_REG_DRC_SLOPE_ADC_CH23: + case NAU8824_REG_DRC_ATKDCY_ADC_CH23: + case NAU8824_REG_DRC_KNEE_IP12_DAC ... NAU8824_REG_DRC_ATKDCY_DAC: + case NAU8824_REG_CLASSG ... NAU8824_REG_OTP_EFUSE: + case NAU8824_REG_I2C_TIMEOUT: + case NAU8824_REG_BIAS_ADJ ... NAU8824_REG_CLASSD_GAIN_2: + case NAU8824_REG_ANALOG_ADC_1 ... NAU8824_REG_ATT_PORT1: + case NAU8824_REG_POWER_UP_CONTROL ... NAU8824_REG_CHARGE_PUMP_CONTROL: + return true; + default: + return false; + } +} + +static bool nau8824_volatile_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case NAU8824_REG_RESET: + case NAU8824_REG_IRQ ... NAU8824_REG_CLEAR_INT_REG: + case NAU8824_REG_DRC_GAINL_ADC0 ... NAU8824_REG_DRC_GAINL_ADC3: + case NAU8824_REG_DRC_GAIN_DAC_CH0 ... NAU8824_REG_DRC_GAIN_DAC_CH1: + case NAU8824_REG_OTPDOUT_1 ... NAU8824_REG_OTPDOUT_2: + case NAU8824_REG_I2C_DEVICE_ID ... NAU8824_REG_SAR_ADC_DATA_OUT: + case NAU8824_REG_CHARGE_PUMP_INPUT: + return true; + default: + return false; + } +} + +static const char * const nau8824_companding[] = { + "Off", "NC", "u-law", "A-law" }; + +static const struct soc_enum nau8824_companding_adc_enum = + SOC_ENUM_SINGLE(NAU8824_REG_PORT0_I2S_PCM_CTRL_1, 12, + ARRAY_SIZE(nau8824_companding), nau8824_companding); + +static const struct soc_enum nau8824_companding_dac_enum = + SOC_ENUM_SINGLE(NAU8824_REG_PORT0_I2S_PCM_CTRL_1, 14, + ARRAY_SIZE(nau8824_companding), nau8824_companding); + +static const char * const nau8824_adc_decimation[] = { + "32", "64", "128", "256" }; + +static const struct soc_enum nau8824_adc_decimation_enum = + SOC_ENUM_SINGLE(NAU8824_REG_ADC_FILTER_CTRL, 0, + ARRAY_SIZE(nau8824_adc_decimation), nau8824_adc_decimation); + +static const char * const nau8824_dac_oversampl[] = { + "64", "256", "128", "", "32" }; + +static const struct soc_enum nau8824_dac_oversampl_enum = + SOC_ENUM_SINGLE(NAU8824_REG_DAC_FILTER_CTRL_1, 0, + ARRAY_SIZE(nau8824_dac_oversampl), nau8824_dac_oversampl); + +static const char * const nau8824_input_channel[] = { + "Input CH0", "Input CH1", "Input CH2", "Input CH3" }; + +static const struct soc_enum nau8824_adc_ch0_enum = + SOC_ENUM_SINGLE(NAU8824_REG_ADC_CH0_DGAIN_CTRL, 9, + ARRAY_SIZE(nau8824_input_channel), nau8824_input_channel); + +static const struct soc_enum nau8824_adc_ch1_enum = + SOC_ENUM_SINGLE(NAU8824_REG_ADC_CH1_DGAIN_CTRL, 9, + ARRAY_SIZE(nau8824_input_channel), nau8824_input_channel); + +static const struct soc_enum nau8824_adc_ch2_enum = + SOC_ENUM_SINGLE(NAU8824_REG_ADC_CH2_DGAIN_CTRL, 9, + ARRAY_SIZE(nau8824_input_channel), nau8824_input_channel); + +static const struct soc_enum nau8824_adc_ch3_enum = + SOC_ENUM_SINGLE(NAU8824_REG_ADC_CH3_DGAIN_CTRL, 9, + ARRAY_SIZE(nau8824_input_channel), nau8824_input_channel); + +static const char * const nau8824_tdm_slot[] = { + "Slot 0", "Slot 1", "Slot 2", "Slot 3" }; + +static const struct soc_enum nau8824_dac_left_sel_enum = + SOC_ENUM_SINGLE(NAU8824_REG_TDM_CTRL, 6, + ARRAY_SIZE(nau8824_tdm_slot), nau8824_tdm_slot); + +static const struct soc_enum nau8824_dac_right_sel_enum = + SOC_ENUM_SINGLE(NAU8824_REG_TDM_CTRL, 4, + ARRAY_SIZE(nau8824_tdm_slot), nau8824_tdm_slot); + +static const DECLARE_TLV_DB_MINMAX_MUTE(spk_vol_tlv, 0, 2400); +static const DECLARE_TLV_DB_MINMAX(hp_vol_tlv, -3000, 0); +static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, 0, 200, 0); +static const DECLARE_TLV_DB_SCALE(dmic_vol_tlv, -12800, 50, 0); + +static const struct snd_kcontrol_new nau8824_snd_controls[] = { + SOC_ENUM("ADC Companding", nau8824_companding_adc_enum), + SOC_ENUM("DAC Companding", nau8824_companding_dac_enum), + + SOC_ENUM("ADC Decimation Rate", nau8824_adc_decimation_enum), + SOC_ENUM("DAC Oversampling Rate", nau8824_dac_oversampl_enum), + + SOC_SINGLE_TLV("Speaker Right Volume from DACR", + NAU8824_REG_CLASSD_GAIN_1, 8, 0x1f, 0, spk_vol_tlv), + SOC_SINGLE_TLV("Speaker Left Volume from DACL", + NAU8824_REG_CLASSD_GAIN_2, 0, 0x1f, 0, spk_vol_tlv), + SOC_SINGLE_TLV("Speaker Left Volume from DACR", + NAU8824_REG_CLASSD_GAIN_1, 0, 0x1f, 0, spk_vol_tlv), + SOC_SINGLE_TLV("Speaker Right Volume from DACL", + NAU8824_REG_CLASSD_GAIN_2, 8, 0x1f, 0, spk_vol_tlv), + + SOC_SINGLE_TLV("Headphone Right Volume from DACR", + NAU8824_REG_ATT_PORT0, 8, 0x1f, 0, hp_vol_tlv), + SOC_SINGLE_TLV("Headphone Left Volume from DACL", + NAU8824_REG_ATT_PORT0, 0, 0x1f, 0, hp_vol_tlv), + SOC_SINGLE_TLV("Headphone Right Volume from DACL", + NAU8824_REG_ATT_PORT1, 8, 0x1f, 0, hp_vol_tlv), + SOC_SINGLE_TLV("Headphone Left Volume from DACR", + NAU8824_REG_ATT_PORT1, 0, 0x1f, 0, hp_vol_tlv), + + SOC_SINGLE_TLV("Mic1 Volume", NAU8824_REG_FEPGA_II, + NAU8824_FEPGA_GAINL_SFT, 0x12, 0, mic_vol_tlv), + SOC_SINGLE_TLV("Mic2 Volume", NAU8824_REG_FEPGA_II, + NAU8824_FEPGA_GAINR_SFT, 0x12, 0, mic_vol_tlv), + + SOC_SINGLE_TLV("DMIC1 Volume", NAU8824_REG_ADC_CH0_DGAIN_CTRL, + 0, 0x164, 0, dmic_vol_tlv), + SOC_SINGLE_TLV("DMIC2 Volume", NAU8824_REG_ADC_CH1_DGAIN_CTRL, + 0, 0x164, 0, dmic_vol_tlv), + SOC_SINGLE_TLV("DMIC3 Volume", NAU8824_REG_ADC_CH2_DGAIN_CTRL, + 0, 0x164, 0, dmic_vol_tlv), + SOC_SINGLE_TLV("DMIC4 Volume", NAU8824_REG_ADC_CH3_DGAIN_CTRL, + 0, 0x164, 0, dmic_vol_tlv), + + SOC_ENUM("ADC CH0 Select", nau8824_adc_ch0_enum), + SOC_ENUM("ADC CH1 Select", nau8824_adc_ch1_enum), + SOC_ENUM("ADC CH2 Select", nau8824_adc_ch2_enum), + SOC_ENUM("ADC CH3 Select", nau8824_adc_ch3_enum), + + SOC_SINGLE("ADC CH0 TX Switch", NAU8824_REG_TDM_CTRL, 0, 1, 0), + SOC_SINGLE("ADC CH1 TX Switch", NAU8824_REG_TDM_CTRL, 1, 1, 0), + SOC_SINGLE("ADC CH2 TX Switch", NAU8824_REG_TDM_CTRL, 2, 1, 0), + SOC_SINGLE("ADC CH3 TX Switch", NAU8824_REG_TDM_CTRL, 3, 1, 0), + + SOC_ENUM("DACL Channel Source", nau8824_dac_left_sel_enum), + SOC_ENUM("DACR Channel Source", nau8824_dac_right_sel_enum), + + SOC_SINGLE("DACL LR Mix", NAU8824_REG_DAC_MUTE_CTRL, 0, 1, 0), + SOC_SINGLE("DACR LR Mix", NAU8824_REG_DAC_MUTE_CTRL, 1, 1, 0), +}; + +static int nau8824_output_dac_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); + struct nau8824 *nau8824 = snd_soc_codec_get_drvdata(codec); + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + /* Disables the TESTDAC to let DAC signal pass through. */ + regmap_update_bits(nau8824->regmap, NAU8824_REG_ENABLE_LO, + NAU8824_TEST_DAC_EN, 0); + break; + case SND_SOC_DAPM_POST_PMD: + regmap_update_bits(nau8824->regmap, NAU8824_REG_ENABLE_LO, + NAU8824_TEST_DAC_EN, NAU8824_TEST_DAC_EN); + break; + default: + return -EINVAL; + } + + return 0; +} + +static int nau8824_spk_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); + struct nau8824 *nau8824 = snd_soc_codec_get_drvdata(codec); + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + regmap_update_bits(nau8824->regmap, + NAU8824_REG_ANALOG_CONTROL_2, + NAU8824_CLASSD_CLAMP_DIS, NAU8824_CLASSD_CLAMP_DIS); + break; + case SND_SOC_DAPM_POST_PMD: + regmap_update_bits(nau8824->regmap, + NAU8824_REG_ANALOG_CONTROL_2, + NAU8824_CLASSD_CLAMP_DIS, 0); + break; + default: + return -EINVAL; + } + + return 0; +} + +static int nau8824_pump_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); + struct nau8824 *nau8824 = snd_soc_codec_get_drvdata(codec); + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + /* Prevent startup click by letting charge pump to ramp up */ + usleep_range(10000, 11000); + regmap_update_bits(nau8824->regmap, + NAU8824_REG_CHARGE_PUMP_CONTROL, + NAU8824_JAMNODCLOW, NAU8824_JAMNODCLOW); + break; + case SND_SOC_DAPM_PRE_PMD: + regmap_update_bits(nau8824->regmap, + NAU8824_REG_CHARGE_PUMP_CONTROL, + NAU8824_JAMNODCLOW, 0); + break; + default: + return -EINVAL; + } + + return 0; +} + +static int system_clock_control(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *k, int event) +{ + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); + struct nau8824 *nau8824 = snd_soc_codec_get_drvdata(codec); + + if (SND_SOC_DAPM_EVENT_OFF(event)) { + /* Set clock source to disable or internal clock before the + * playback or capture end. Codec needs clock for Jack + * detection and button press if jack inserted; otherwise, + * the clock should be closed. + */ + if (nau8824_is_jack_inserted(nau8824)) { + nau8824_config_sysclk(nau8824, + NAU8824_CLK_INTERNAL, 0); + } else { + nau8824_config_sysclk(nau8824, NAU8824_CLK_DIS, 0); + } + } + return 0; +} + +static const struct snd_kcontrol_new nau8824_adc_ch0_dmic = + SOC_DAPM_SINGLE("Switch", NAU8824_REG_ENA_CTRL, + NAU8824_ADC_CH0_DMIC_SFT, 1, 0); + +static const struct snd_kcontrol_new nau8824_adc_ch1_dmic = + SOC_DAPM_SINGLE("Switch", NAU8824_REG_ENA_CTRL, + NAU8824_ADC_CH1_DMIC_SFT, 1, 0); + +static const struct snd_kcontrol_new nau8824_adc_ch2_dmic = + SOC_DAPM_SINGLE("Switch", NAU8824_REG_ENA_CTRL, + NAU8824_ADC_CH2_DMIC_SFT, 1, 0); + +static const struct snd_kcontrol_new nau8824_adc_ch3_dmic = + SOC_DAPM_SINGLE("Switch", NAU8824_REG_ENA_CTRL, + NAU8824_ADC_CH3_DMIC_SFT, 1, 0); + +static const struct snd_kcontrol_new nau8824_adc_left_mixer[] = { + SOC_DAPM_SINGLE("MIC Switch", NAU8824_REG_FEPGA, + NAU8824_FEPGA_MODEL_MIC1_SFT, 1, 0), + SOC_DAPM_SINGLE("HSMIC Switch", NAU8824_REG_FEPGA, + NAU8824_FEPGA_MODEL_HSMIC_SFT, 1, 0), +}; + +static const struct snd_kcontrol_new nau8824_adc_right_mixer[] = { + SOC_DAPM_SINGLE("MIC Switch", NAU8824_REG_FEPGA, + NAU8824_FEPGA_MODER_MIC2_SFT, 1, 0), + SOC_DAPM_SINGLE("HSMIC Switch", NAU8824_REG_FEPGA, + NAU8824_FEPGA_MODER_HSMIC_SFT, 1, 0), +}; + +static const struct snd_kcontrol_new nau8824_hp_left_mixer[] = { + SOC_DAPM_SINGLE("DAC Right Switch", NAU8824_REG_ENABLE_LO, + NAU8824_DACR_HPL_EN_SFT, 1, 0), + SOC_DAPM_SINGLE("DAC Left Switch", NAU8824_REG_ENABLE_LO, + NAU8824_DACL_HPL_EN_SFT, 1, 0), +}; + +static const struct snd_kcontrol_new nau8824_hp_right_mixer[] = { + SOC_DAPM_SINGLE("DAC Left Switch", NAU8824_REG_ENABLE_LO, + NAU8824_DACL_HPR_EN_SFT, 1, 0), + SOC_DAPM_SINGLE("DAC Right Switch", NAU8824_REG_ENABLE_LO, + NAU8824_DACR_HPR_EN_SFT, 1, 0), +}; + +static const char * const nau8824_dac_src[] = { "DACL", "DACR" }; + +static SOC_ENUM_SINGLE_DECL( + nau8824_dacl_enum, NAU8824_REG_DAC_CH0_DGAIN_CTRL, + NAU8824_DAC_CH0_SEL_SFT, nau8824_dac_src); + +static SOC_ENUM_SINGLE_DECL( + nau8824_dacr_enum, NAU8824_REG_DAC_CH1_DGAIN_CTRL, + NAU8824_DAC_CH1_SEL_SFT, nau8824_dac_src); + +static const struct snd_kcontrol_new nau8824_dacl_mux = + SOC_DAPM_ENUM("DACL Source", nau8824_dacl_enum); + +static const struct snd_kcontrol_new nau8824_dacr_mux = + SOC_DAPM_ENUM("DACR Source", nau8824_dacr_enum); + + +static const struct snd_soc_dapm_widget nau8824_dapm_widgets[] = { + SND_SOC_DAPM_SUPPLY("System Clock", SND_SOC_NOPM, 0, 0, + system_clock_control, SND_SOC_DAPM_POST_PMD), + + SND_SOC_DAPM_INPUT("HSMIC1"), + SND_SOC_DAPM_INPUT("HSMIC2"), + SND_SOC_DAPM_INPUT("MIC1"), + SND_SOC_DAPM_INPUT("MIC2"), + SND_SOC_DAPM_INPUT("DMIC1"), + SND_SOC_DAPM_INPUT("DMIC2"), + SND_SOC_DAPM_INPUT("DMIC3"), + SND_SOC_DAPM_INPUT("DMIC4"), + + SND_SOC_DAPM_SUPPLY("SAR", NAU8824_REG_SAR_ADC, + NAU8824_SAR_ADC_EN_SFT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("MICBIAS", NAU8824_REG_MIC_BIAS, + NAU8824_MICBIAS_POWERUP_SFT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("DMIC12 Power", NAU8824_REG_BIAS_ADJ, + NAU8824_DMIC1_EN_SFT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("DMIC34 Power", NAU8824_REG_BIAS_ADJ, + NAU8824_DMIC2_EN_SFT, 0, NULL, 0), + + SND_SOC_DAPM_SWITCH("DMIC1 Enable", SND_SOC_NOPM, + 0, 0, &nau8824_adc_ch0_dmic), + SND_SOC_DAPM_SWITCH("DMIC2 Enable", SND_SOC_NOPM, + 0, 0, &nau8824_adc_ch1_dmic), + SND_SOC_DAPM_SWITCH("DMIC3 Enable", SND_SOC_NOPM, + 0, 0, &nau8824_adc_ch2_dmic), + SND_SOC_DAPM_SWITCH("DMIC4 Enable", SND_SOC_NOPM, + 0, 0, &nau8824_adc_ch3_dmic), + + SND_SOC_DAPM_MIXER("Left ADC", NAU8824_REG_POWER_UP_CONTROL, + 12, 0, nau8824_adc_left_mixer, + ARRAY_SIZE(nau8824_adc_left_mixer)), + SND_SOC_DAPM_MIXER("Right ADC", NAU8824_REG_POWER_UP_CONTROL, + 13, 0, nau8824_adc_right_mixer, + ARRAY_SIZE(nau8824_adc_right_mixer)), + + SND_SOC_DAPM_ADC("ADCL", NULL, NAU8824_REG_ANALOG_ADC_2, + NAU8824_ADCL_EN_SFT, 0), + SND_SOC_DAPM_ADC("ADCR", NULL, NAU8824_REG_ANALOG_ADC_2, + NAU8824_ADCR_EN_SFT, 0), + + SND_SOC_DAPM_AIF_OUT("AIFTX", "HiFi Capture", 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_IN("AIFRX", "HiFi Playback", 0, SND_SOC_NOPM, 0, 0), + + SND_SOC_DAPM_DAC("DACL", NULL, NAU8824_REG_RDAC, + NAU8824_DACL_EN_SFT, 0), + SND_SOC_DAPM_SUPPLY("DACL Clock", NAU8824_REG_RDAC, + NAU8824_DACL_CLK_SFT, 0, NULL, 0), + SND_SOC_DAPM_DAC("DACR", NULL, NAU8824_REG_RDAC, + NAU8824_DACR_EN_SFT, 0), + SND_SOC_DAPM_SUPPLY("DACR Clock", NAU8824_REG_RDAC, + NAU8824_DACR_CLK_SFT, 0, NULL, 0), + + SND_SOC_DAPM_MUX("DACL Mux", SND_SOC_NOPM, 0, 0, &nau8824_dacl_mux), + SND_SOC_DAPM_MUX("DACR Mux", SND_SOC_NOPM, 0, 0, &nau8824_dacr_mux), + + SND_SOC_DAPM_PGA_S("Output DACL", 0, NAU8824_REG_CHARGE_PUMP_CONTROL, + 8, 1, nau8824_output_dac_event, + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), + SND_SOC_DAPM_PGA_S("Output DACR", 0, NAU8824_REG_CHARGE_PUMP_CONTROL, + 9, 1, nau8824_output_dac_event, + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), + + SND_SOC_DAPM_PGA_S("ClassD", 0, NAU8824_REG_CLASSD_GAIN_1, + NAU8824_CLASSD_EN_SFT, 0, nau8824_spk_event, + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), + + SND_SOC_DAPM_MIXER("Left Headphone", NAU8824_REG_CLASSG, + NAU8824_CLASSG_LDAC_EN_SFT, 0, nau8824_hp_left_mixer, + ARRAY_SIZE(nau8824_hp_left_mixer)), + SND_SOC_DAPM_MIXER("Right Headphone", NAU8824_REG_CLASSG, + NAU8824_CLASSG_RDAC_EN_SFT, 0, nau8824_hp_right_mixer, + ARRAY_SIZE(nau8824_hp_right_mixer)), + SND_SOC_DAPM_PGA_S("Charge Pump", 1, NAU8824_REG_CHARGE_PUMP_CONTROL, + NAU8824_CHARGE_PUMP_EN_SFT, 0, nau8824_pump_event, + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), + SND_SOC_DAPM_PGA("Output Driver L", + NAU8824_REG_POWER_UP_CONTROL, 3, 0, NULL, 0), + SND_SOC_DAPM_PGA("Output Driver R", + NAU8824_REG_POWER_UP_CONTROL, 2, 0, NULL, 0), + SND_SOC_DAPM_PGA("Main Driver L", + NAU8824_REG_POWER_UP_CONTROL, 1, 0, NULL, 0), + SND_SOC_DAPM_PGA("Main Driver R", + NAU8824_REG_POWER_UP_CONTROL, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("HP Boost Driver", NAU8824_REG_BOOST, + NAU8824_HP_BOOST_DIS_SFT, 1, NULL, 0), + SND_SOC_DAPM_PGA("Class G", NAU8824_REG_CLASSG, + NAU8824_CLASSG_EN_SFT, 0, NULL, 0), + + SND_SOC_DAPM_OUTPUT("SPKOUTL"), + SND_SOC_DAPM_OUTPUT("SPKOUTR"), + SND_SOC_DAPM_OUTPUT("HPOL"), + SND_SOC_DAPM_OUTPUT("HPOR"), +}; + +static const struct snd_soc_dapm_route nau8824_dapm_routes[] = { + {"DMIC1 Enable", "Switch", "DMIC1"}, + {"DMIC2 Enable", "Switch", "DMIC2"}, + {"DMIC3 Enable", "Switch", "DMIC3"}, + {"DMIC4 Enable", "Switch", "DMIC4"}, + + {"DMIC1", NULL, "DMIC12 Power"}, + {"DMIC2", NULL, "DMIC12 Power"}, + {"DMIC3", NULL, "DMIC34 Power"}, + {"DMIC4", NULL, "DMIC34 Power"}, + + {"Left ADC", "MIC Switch", "MIC1"}, + {"Left ADC", "HSMIC Switch", "HSMIC1"}, + {"Right ADC", "MIC Switch", "MIC2"}, + {"Right ADC", "HSMIC Switch", "HSMIC2"}, + + {"ADCL", NULL, "Left ADC"}, + {"ADCR", NULL, "Right ADC"}, + + {"AIFTX", NULL, "MICBIAS"}, + {"AIFTX", NULL, "ADCL"}, + {"AIFTX", NULL, "ADCR"}, + {"AIFTX", NULL, "DMIC1 Enable"}, + {"AIFTX", NULL, "DMIC2 Enable"}, + {"AIFTX", NULL, "DMIC3 Enable"}, + {"AIFTX", NULL, "DMIC4 Enable"}, + + {"AIFTX", NULL, "System Clock"}, + {"AIFRX", NULL, "System Clock"}, + + {"DACL", NULL, "AIFRX"}, + {"DACL", NULL, "DACL Clock"}, + {"DACR", NULL, "AIFRX"}, + {"DACR", NULL, "DACR Clock"}, + + {"DACL Mux", "DACL", "DACL"}, + {"DACL Mux", "DACR", "DACR"}, + {"DACR Mux", "DACL", "DACL"}, + {"DACR Mux", "DACR", "DACR"}, + + {"Output DACL", NULL, "DACL Mux"}, + {"Output DACR", NULL, "DACR Mux"}, + + {"ClassD", NULL, "Output DACL"}, + {"ClassD", NULL, "Output DACR"}, + + {"Left Headphone", "DAC Left Switch", "Output DACL"}, + {"Left Headphone", "DAC Right Switch", "Output DACR"}, + {"Right Headphone", "DAC Left Switch", "Output DACL"}, + {"Right Headphone", "DAC Right Switch", "Output DACR"}, + + {"Charge Pump", NULL, "Left Headphone"}, + {"Charge Pump", NULL, "Right Headphone"}, + {"Output Driver L", NULL, "Charge Pump"}, + {"Output Driver R", NULL, "Charge Pump"}, + {"Main Driver L", NULL, "Output Driver L"}, + {"Main Driver R", NULL, "Output Driver R"}, + {"Class G", NULL, "Main Driver L"}, + {"Class G", NULL, "Main Driver R"}, + {"HP Boost Driver", NULL, "Class G"}, + + {"SPKOUTL", NULL, "ClassD"}, + {"SPKOUTR", NULL, "ClassD"}, + {"HPOL", NULL, "HP Boost Driver"}, + {"HPOR", NULL, "HP Boost Driver"}, +}; + +static bool nau8824_is_jack_inserted(struct nau8824 *nau8824) +{ + struct snd_soc_jack *jack = nau8824->jack; + bool insert = FALSE; + + if (nau8824->irq && jack) + insert = jack->status & SND_JACK_HEADPHONE; + + return insert; +} + +static void nau8824_int_status_clear_all(struct regmap *regmap) +{ + int active_irq, clear_irq, i; + + /* Reset the intrruption status from rightmost bit if the corres- + * ponding irq event occurs. + */ + regmap_read(regmap, NAU8824_REG_IRQ, &active_irq); + for (i = 0; i < NAU8824_REG_DATA_LEN; i++) { + clear_irq = (0x1 << i); + if (active_irq & clear_irq) + regmap_write(regmap, + NAU8824_REG_CLEAR_INT_REG, clear_irq); + } +} + +static void nau8824_eject_jack(struct nau8824 *nau8824) +{ + struct snd_soc_dapm_context *dapm = nau8824->dapm; + struct regmap *regmap = nau8824->regmap; + + /* Clear all interruption status */ + nau8824_int_status_clear_all(regmap); + + snd_soc_dapm_disable_pin(dapm, "SAR"); + snd_soc_dapm_disable_pin(dapm, "MICBIAS"); + snd_soc_dapm_sync(dapm); + + /* Enable the insertion interruption, disable the ejection + * interruption, and then bypass de-bounce circuit. + */ + regmap_update_bits(regmap, NAU8824_REG_INTERRUPT_SETTING, + NAU8824_IRQ_KEY_RELEASE_DIS | NAU8824_IRQ_KEY_SHORT_PRESS_DIS | + NAU8824_IRQ_EJECT_DIS | NAU8824_IRQ_INSERT_DIS, + NAU8824_IRQ_KEY_RELEASE_DIS | NAU8824_IRQ_KEY_SHORT_PRESS_DIS | + NAU8824_IRQ_EJECT_DIS); + regmap_update_bits(regmap, NAU8824_REG_INTERRUPT_SETTING_1, + NAU8824_IRQ_INSERT_EN | NAU8824_IRQ_EJECT_EN, + NAU8824_IRQ_INSERT_EN); + regmap_update_bits(regmap, NAU8824_REG_ENA_CTRL, + NAU8824_JD_SLEEP_MODE, NAU8824_JD_SLEEP_MODE); + + /* Close clock for jack type detection at manual mode */ + nau8824_config_sysclk(nau8824, NAU8824_CLK_DIS, 0); +} + +static void nau8824_jdet_work(struct work_struct *work) +{ + struct nau8824 *nau8824 = container_of( + work, struct nau8824, jdet_work); + struct snd_soc_dapm_context *dapm = nau8824->dapm; + struct regmap *regmap = nau8824->regmap; + int adc_value, event = 0, event_mask = 0; + + snd_soc_dapm_force_enable_pin(dapm, "MICBIAS"); + snd_soc_dapm_force_enable_pin(dapm, "SAR"); + snd_soc_dapm_sync(dapm); + + msleep(100); + + regmap_read(regmap, NAU8824_REG_SAR_ADC_DATA_OUT, &adc_value); + adc_value = adc_value & NAU8824_SAR_ADC_DATA_MASK; + dev_dbg(nau8824->dev, "SAR ADC data 0x%02x\n", adc_value); + if (adc_value < HEADSET_SARADC_THD) { + event |= SND_JACK_HEADPHONE; + + snd_soc_dapm_disable_pin(dapm, "SAR"); + snd_soc_dapm_disable_pin(dapm, "MICBIAS"); + snd_soc_dapm_sync(dapm); + } else { + event |= SND_JACK_HEADSET; + } + event_mask |= SND_JACK_HEADSET; + snd_soc_jack_report(nau8824->jack, event, event_mask); + + nau8824_sema_release(nau8824); +} + +static void nau8824_setup_auto_irq(struct nau8824 *nau8824) +{ + struct regmap *regmap = nau8824->regmap; + + /* Enable jack ejection, short key press and release interruption. */ + regmap_update_bits(regmap, NAU8824_REG_INTERRUPT_SETTING_1, + NAU8824_IRQ_INSERT_EN | NAU8824_IRQ_EJECT_EN, + NAU8824_IRQ_EJECT_EN); + regmap_update_bits(regmap, NAU8824_REG_INTERRUPT_SETTING, + NAU8824_IRQ_EJECT_DIS | NAU8824_IRQ_KEY_RELEASE_DIS | + NAU8824_IRQ_KEY_SHORT_PRESS_DIS, 0); + /* Enable internal VCO needed for interruptions */ + nau8824_config_sysclk(nau8824, NAU8824_CLK_INTERNAL, 0); + regmap_update_bits(regmap, NAU8824_REG_ENA_CTRL, + NAU8824_JD_SLEEP_MODE, 0); +} + +static int nau8824_button_decode(int value) +{ + int buttons = 0; + + /* The chip supports up to 8 buttons, but ALSA defines + * only 6 buttons. + */ + if (value & BIT(0)) + buttons |= SND_JACK_BTN_0; + if (value & BIT(1)) + buttons |= SND_JACK_BTN_1; + if (value & BIT(2)) + buttons |= SND_JACK_BTN_2; + if (value & BIT(3)) + buttons |= SND_JACK_BTN_3; + if (value & BIT(4)) + buttons |= SND_JACK_BTN_4; + if (value & BIT(5)) + buttons |= SND_JACK_BTN_5; + + return buttons; +} + +#define NAU8824_BUTTONS (SND_JACK_BTN_0 | SND_JACK_BTN_1 | \ + SND_JACK_BTN_2 | SND_JACK_BTN_3) + +static irqreturn_t nau8824_interrupt(int irq, void *data) +{ + struct nau8824 *nau8824 = (struct nau8824 *)data; + struct regmap *regmap = nau8824->regmap; + int active_irq, clear_irq = 0, event = 0, event_mask = 0; + + if (regmap_read(regmap, NAU8824_REG_IRQ, &active_irq)) { + dev_err(nau8824->dev, "failed to read irq status\n"); + return IRQ_NONE; + } + dev_dbg(nau8824->dev, "IRQ %x\n", active_irq); + + if (active_irq & NAU8824_JACK_EJECTION_DETECTED) { + /* cancel jack detection */ + cancel_work_sync(&nau8824->jdet_work); + + nau8824_eject_jack(nau8824); + event_mask |= SND_JACK_HEADSET; + clear_irq = NAU8824_JACK_EJECTION_DETECTED; + } else if (active_irq & NAU8824_KEY_SHORT_PRESS_IRQ) { + int key_status, button_pressed; + + regmap_read(regmap, NAU8824_REG_CLEAR_INT_REG, + &key_status); + + /* lower 8 bits of the register are for pressed keys */ + button_pressed = nau8824_button_decode(key_status); + + event |= button_pressed; + dev_dbg(nau8824->dev, "button %x pressed\n", event); + event_mask |= NAU8824_BUTTONS; + clear_irq = NAU8824_KEY_SHORT_PRESS_IRQ; + } else if (active_irq & NAU8824_KEY_RELEASE_IRQ) { + event_mask = NAU8824_BUTTONS; + clear_irq = NAU8824_KEY_RELEASE_IRQ; + } else if (active_irq & NAU8824_JACK_INSERTION_DETECTED) { + /* Turn off insertion interruption at manual mode */ + regmap_update_bits(regmap, + NAU8824_REG_INTERRUPT_SETTING, + NAU8824_IRQ_INSERT_DIS, + NAU8824_IRQ_INSERT_DIS); + regmap_update_bits(regmap, + NAU8824_REG_INTERRUPT_SETTING_1, + NAU8824_IRQ_INSERT_EN, 0); + /* detect microphone and jack type */ + cancel_work_sync(&nau8824->jdet_work); + schedule_work(&nau8824->jdet_work); + + /* Enable interruption for jack type detection at audo + * mode which can detect microphone and jack type. + */ + nau8824_setup_auto_irq(nau8824); + } + + if (!clear_irq) + clear_irq = active_irq; + /* clears the rightmost interruption */ + regmap_write(regmap, NAU8824_REG_CLEAR_INT_REG, clear_irq); + + if (event_mask) + snd_soc_jack_report(nau8824->jack, event, event_mask); + + return IRQ_HANDLED; +} + +static int nau8824_clock_check(struct nau8824 *nau8824, + int stream, int rate, int osr) +{ + int osrate; + + if (stream == SNDRV_PCM_STREAM_PLAYBACK) { + if (osr >= ARRAY_SIZE(osr_dac_sel)) + return -EINVAL; + osrate = osr_dac_sel[osr].osr; + } else { + if (osr >= ARRAY_SIZE(osr_adc_sel)) + return -EINVAL; + osrate = osr_adc_sel[osr].osr; + } + + if (!osrate || rate * osr > CLK_DA_AD_MAX) { + dev_err(nau8824->dev, "exceed the maximum frequency of CLK_ADC or CLK_DAC\n"); + return -EINVAL; + } + + return 0; +} + +static int nau8824_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) +{ + struct snd_soc_codec *codec = dai->codec; + struct nau8824 *nau8824 = snd_soc_codec_get_drvdata(codec); + unsigned int val_len = 0, osr; + + nau8824_sema_acquire(nau8824, 3 * HZ); + + /* CLK_DAC or CLK_ADC = OSR * FS + * DAC or ADC clock frequency is defined as Over Sampling Rate (OSR) + * multiplied by the audio sample rate (Fs). Note that the OSR and Fs + * values must be selected such that the maximum frequency is less + * than 6.144 MHz. + */ + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + regmap_read(nau8824->regmap, + NAU8824_REG_DAC_FILTER_CTRL_1, &osr); + osr &= NAU8824_DAC_OVERSAMPLE_MASK; + if (nau8824_clock_check(nau8824, substream->stream, + params_rate(params), osr)) + return -EINVAL; + regmap_update_bits(nau8824->regmap, NAU8824_REG_CLK_DIVIDER, + NAU8824_CLK_DAC_SRC_MASK, + osr_dac_sel[osr].clk_src << NAU8824_CLK_DAC_SRC_SFT); + } else { + regmap_read(nau8824->regmap, + NAU8824_REG_ADC_FILTER_CTRL, &osr); + osr &= NAU8824_ADC_SYNC_DOWN_MASK; + if (nau8824_clock_check(nau8824, substream->stream, + params_rate(params), osr)) + return -EINVAL; + regmap_update_bits(nau8824->regmap, NAU8824_REG_CLK_DIVIDER, + NAU8824_CLK_ADC_SRC_MASK, + osr_adc_sel[osr].clk_src << NAU8824_CLK_ADC_SRC_SFT); + } + + switch (params_width(params)) { + case 16: + val_len |= NAU8824_I2S_DL_16; + break; + case 20: + val_len |= NAU8824_I2S_DL_20; + break; + case 24: + val_len |= NAU8824_I2S_DL_24; + break; + case 32: + val_len |= NAU8824_I2S_DL_32; + break; + default: + return -EINVAL; + } + + regmap_update_bits(nau8824->regmap, NAU8824_REG_PORT0_I2S_PCM_CTRL_1, + NAU8824_I2S_DL_MASK, val_len); + + nau8824_sema_release(nau8824); + + return 0; +} + +static int nau8824_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) +{ + struct snd_soc_codec *codec = dai->codec; + struct nau8824 *nau8824 = snd_soc_codec_get_drvdata(codec); + unsigned int ctrl1_val = 0, ctrl2_val = 0; + + nau8824_sema_acquire(nau8824, 3 * HZ); + + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBM_CFM: + ctrl2_val |= NAU8824_I2S_MS_MASTER; + break; + case SND_SOC_DAIFMT_CBS_CFS: + break; + default: + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + break; + case SND_SOC_DAIFMT_IB_NF: + ctrl1_val |= NAU8824_I2S_BP_INV; + break; + default: + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + ctrl1_val |= NAU8824_I2S_DF_I2S; + break; + case SND_SOC_DAIFMT_LEFT_J: + ctrl1_val |= NAU8824_I2S_DF_LEFT; + break; + case SND_SOC_DAIFMT_RIGHT_J: + ctrl1_val |= NAU8824_I2S_DF_RIGTH; + break; + case SND_SOC_DAIFMT_DSP_A: + ctrl1_val |= NAU8824_I2S_DF_PCM_AB; + break; + case SND_SOC_DAIFMT_DSP_B: + ctrl1_val |= NAU8824_I2S_DF_PCM_AB; + ctrl1_val |= NAU8824_I2S_PCMB_EN; + break; + default: + return -EINVAL; + } + + regmap_update_bits(nau8824->regmap, NAU8824_REG_PORT0_I2S_PCM_CTRL_1, + NAU8824_I2S_DL_MASK | NAU8824_I2S_DF_MASK | + NAU8824_I2S_BP_MASK | NAU8824_I2S_PCMB_EN, ctrl1_val); + regmap_update_bits(nau8824->regmap, NAU8824_REG_PORT0_I2S_PCM_CTRL_2, + NAU8824_I2S_MS_MASK, ctrl2_val); + + nau8824_sema_release(nau8824); + + return 0; +} + +/** + * nau8824_calc_fll_param - Calculate FLL parameters. + * @fll_in: external clock provided to codec. + * @fs: sampling rate. + * @fll_param: Pointer to structure of FLL parameters. + * + * Calculate FLL parameters to configure codec. + * + * Returns 0 for success or negative error code. + */ +static int nau8824_calc_fll_param(unsigned int fll_in, + unsigned int fs, struct nau8824_fll *fll_param) +{ + u64 fvco, fvco_max; + unsigned int fref, i, fvco_sel; + + /* Ensure the reference clock frequency (FREF) is <= 13.5MHz by dividing + * freq_in by 1, 2, 4, or 8 using FLL pre-scalar. + * FREF = freq_in / NAU8824_FLL_REF_DIV_MASK + */ + for (i = 0; i < ARRAY_SIZE(fll_pre_scalar); i++) { + fref = fll_in / fll_pre_scalar[i].param; + if (fref <= NAU_FREF_MAX) + break; + } + if (i == ARRAY_SIZE(fll_pre_scalar)) + return -EINVAL; + fll_param->clk_ref_div = fll_pre_scalar[i].val; + + /* Choose the FLL ratio based on FREF */ + for (i = 0; i < ARRAY_SIZE(fll_ratio); i++) { + if (fref >= fll_ratio[i].param) + break; + } + if (i == ARRAY_SIZE(fll_ratio)) + return -EINVAL; + fll_param->ratio = fll_ratio[i].val; + + /* Calculate the frequency of DCO (FDCO) given freq_out = 256 * Fs. + * FDCO must be within the 90MHz - 124MHz or the FFL cannot be + * guaranteed across the full range of operation. + * FDCO = freq_out * 2 * mclk_src_scaling + */ + fvco_max = 0; + fvco_sel = ARRAY_SIZE(mclk_src_scaling); + for (i = 0; i < ARRAY_SIZE(mclk_src_scaling); i++) { + fvco = 256 * fs * 2 * mclk_src_scaling[i].param; + if (fvco > NAU_FVCO_MIN && fvco < NAU_FVCO_MAX && + fvco_max < fvco) { + fvco_max = fvco; + fvco_sel = i; + } + } + if (ARRAY_SIZE(mclk_src_scaling) == fvco_sel) + return -EINVAL; + fll_param->mclk_src = mclk_src_scaling[fvco_sel].val; + + /* Calculate the FLL 10-bit integer input and the FLL 16-bit fractional + * input based on FDCO, FREF and FLL ratio. + */ + fvco = div_u64(fvco_max << 16, fref * fll_param->ratio); + fll_param->fll_int = (fvco >> 16) & 0x3FF; + fll_param->fll_frac = fvco & 0xFFFF; + return 0; +} + +static void nau8824_fll_apply(struct regmap *regmap, + struct nau8824_fll *fll_param) +{ + regmap_update_bits(regmap, NAU8824_REG_CLK_DIVIDER, + NAU8824_CLK_SRC_MASK | NAU8824_CLK_MCLK_SRC_MASK, + NAU8824_CLK_SRC_MCLK | fll_param->mclk_src); + regmap_update_bits(regmap, NAU8824_REG_FLL1, + NAU8824_FLL_RATIO_MASK, fll_param->ratio); + /* FLL 16-bit fractional input */ + regmap_write(regmap, NAU8824_REG_FLL2, fll_param->fll_frac); + /* FLL 10-bit integer input */ + regmap_update_bits(regmap, NAU8824_REG_FLL3, + NAU8824_FLL_INTEGER_MASK, fll_param->fll_int); + /* FLL pre-scaler */ + regmap_update_bits(regmap, NAU8824_REG_FLL4, + NAU8824_FLL_REF_DIV_MASK, + fll_param->clk_ref_div << NAU8824_FLL_REF_DIV_SFT); + /* select divided VCO input */ + regmap_update_bits(regmap, NAU8824_REG_FLL5, + NAU8824_FLL_CLK_SW_MASK, NAU8824_FLL_CLK_SW_REF); + /* Disable free-running mode */ + regmap_update_bits(regmap, + NAU8824_REG_FLL6, NAU8824_DCO_EN, 0); + if (fll_param->fll_frac) { + regmap_update_bits(regmap, NAU8824_REG_FLL5, + NAU8824_FLL_PDB_DAC_EN | NAU8824_FLL_LOOP_FTR_EN | + NAU8824_FLL_FTR_SW_MASK, + NAU8824_FLL_PDB_DAC_EN | NAU8824_FLL_LOOP_FTR_EN | + NAU8824_FLL_FTR_SW_FILTER); + regmap_update_bits(regmap, NAU8824_REG_FLL6, + NAU8824_SDM_EN, NAU8824_SDM_EN); + } else { + regmap_update_bits(regmap, NAU8824_REG_FLL5, + NAU8824_FLL_PDB_DAC_EN | NAU8824_FLL_LOOP_FTR_EN | + NAU8824_FLL_FTR_SW_MASK, NAU8824_FLL_FTR_SW_ACCU); + regmap_update_bits(regmap, + NAU8824_REG_FLL6, NAU8824_SDM_EN, 0); + } +} + +/* freq_out must be 256*Fs in order to achieve the best performance */ +static int nau8824_set_pll(struct snd_soc_codec *codec, int pll_id, int source, + unsigned int freq_in, unsigned int freq_out) +{ + struct nau8824 *nau8824 = snd_soc_codec_get_drvdata(codec); + struct nau8824_fll fll_param; + int ret, fs; + + fs = freq_out / 256; + ret = nau8824_calc_fll_param(freq_in, fs, &fll_param); + if (ret < 0) { + dev_err(nau8824->dev, "Unsupported input clock %d\n", freq_in); + return ret; + } + dev_dbg(nau8824->dev, "mclk_src=%x ratio=%x fll_frac=%x fll_int=%x clk_ref_div=%x\n", + fll_param.mclk_src, fll_param.ratio, fll_param.fll_frac, + fll_param.fll_int, fll_param.clk_ref_div); + + nau8824_fll_apply(nau8824->regmap, &fll_param); + mdelay(2); + regmap_update_bits(nau8824->regmap, NAU8824_REG_CLK_DIVIDER, + NAU8824_CLK_SRC_MASK, NAU8824_CLK_SRC_VCO); + return 0; +} + +static int nau8824_config_sysclk(struct nau8824 *nau8824, + int clk_id, unsigned int freq) +{ + struct regmap *regmap = nau8824->regmap; + + switch (clk_id) { + case NAU8824_CLK_DIS: + regmap_update_bits(regmap, NAU8824_REG_CLK_DIVIDER, + NAU8824_CLK_SRC_MASK, NAU8824_CLK_SRC_MCLK); + regmap_update_bits(regmap, NAU8824_REG_FLL6, + NAU8824_DCO_EN, 0); + break; + + case NAU8824_CLK_MCLK: + nau8824_sema_acquire(nau8824, 3 * HZ); + regmap_update_bits(regmap, NAU8824_REG_CLK_DIVIDER, + NAU8824_CLK_SRC_MASK, NAU8824_CLK_SRC_MCLK); + regmap_update_bits(regmap, NAU8824_REG_FLL6, + NAU8824_DCO_EN, 0); + nau8824_sema_release(nau8824); + break; + + case NAU8824_CLK_INTERNAL: + regmap_update_bits(regmap, NAU8824_REG_FLL6, + NAU8824_DCO_EN, NAU8824_DCO_EN); + regmap_update_bits(regmap, NAU8824_REG_CLK_DIVIDER, + NAU8824_CLK_SRC_MASK, NAU8824_CLK_SRC_VCO); + break; + + case NAU8824_CLK_FLL_MCLK: + nau8824_sema_acquire(nau8824, 3 * HZ); + regmap_update_bits(regmap, NAU8824_REG_FLL3, + NAU8824_FLL_CLK_SRC_MASK, NAU8824_FLL_CLK_SRC_MCLK); + nau8824_sema_release(nau8824); + break; + + case NAU8824_CLK_FLL_BLK: + nau8824_sema_acquire(nau8824, 3 * HZ); + regmap_update_bits(regmap, NAU8824_REG_FLL3, + NAU8824_FLL_CLK_SRC_MASK, NAU8824_FLL_CLK_SRC_BLK); + nau8824_sema_release(nau8824); + break; + + case NAU8824_CLK_FLL_FS: + nau8824_sema_acquire(nau8824, 3 * HZ); + regmap_update_bits(regmap, NAU8824_REG_FLL3, + NAU8824_FLL_CLK_SRC_MASK, NAU8824_FLL_CLK_SRC_FS); + nau8824_sema_release(nau8824); + break; + + default: + dev_err(nau8824->dev, "Invalid clock id (%d)\n", clk_id); + return -EINVAL; + } + + dev_dbg(nau8824->dev, "Sysclk is %dHz and clock id is %d\n", freq, + clk_id); + + return 0; +} + +static int nau8824_set_sysclk(struct snd_soc_codec *codec, + int clk_id, int source, unsigned int freq, int dir) +{ + struct nau8824 *nau8824 = snd_soc_codec_get_drvdata(codec); + + return nau8824_config_sysclk(nau8824, clk_id, freq); +} + +static void nau8824_resume_setup(struct nau8824 *nau8824) +{ + nau8824_config_sysclk(nau8824, NAU8824_CLK_DIS, 0); + if (nau8824->irq) { + /* Clear all interruption status */ + nau8824_int_status_clear_all(nau8824->regmap); + /* Enable jack detection at sleep mode, insertion detection, + * and ejection detection. + */ + regmap_update_bits(nau8824->regmap, NAU8824_REG_ENA_CTRL, + NAU8824_JD_SLEEP_MODE, NAU8824_JD_SLEEP_MODE); + regmap_update_bits(nau8824->regmap, + NAU8824_REG_INTERRUPT_SETTING_1, + NAU8824_IRQ_EJECT_EN | NAU8824_IRQ_INSERT_EN, + NAU8824_IRQ_EJECT_EN | NAU8824_IRQ_INSERT_EN); + regmap_update_bits(nau8824->regmap, + NAU8824_REG_INTERRUPT_SETTING, + NAU8824_IRQ_EJECT_DIS | NAU8824_IRQ_INSERT_DIS, 0); + } +} + +static int nau8824_set_bias_level(struct snd_soc_codec *codec, + enum snd_soc_bias_level level) +{ + struct nau8824 *nau8824 = snd_soc_codec_get_drvdata(codec); + + switch (level) { + case SND_SOC_BIAS_ON: + break; + + case SND_SOC_BIAS_PREPARE: + break; + + case SND_SOC_BIAS_STANDBY: + if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) { + /* Setup codec configuration after resume */ + nau8824_resume_setup(nau8824); + } + break; + + case SND_SOC_BIAS_OFF: + regmap_update_bits(nau8824->regmap, + NAU8824_REG_INTERRUPT_SETTING, 0x3ff, 0x3ff); + regmap_update_bits(nau8824->regmap, + NAU8824_REG_INTERRUPT_SETTING_1, + NAU8824_IRQ_EJECT_EN | NAU8824_IRQ_INSERT_EN, 0); + break; + } + + return 0; +} + +static int nau8824_codec_probe(struct snd_soc_codec *codec) +{ + struct nau8824 *nau8824 = snd_soc_codec_get_drvdata(codec); + struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); + + nau8824->dapm = dapm; + snd_soc_dapm_sync(nau8824->dapm); + + return 0; +} + +static int __maybe_unused nau8824_suspend(struct snd_soc_codec *codec) +{ + struct nau8824 *nau8824 = snd_soc_codec_get_drvdata(codec); + + if (nau8824->irq) { + disable_irq(nau8824->irq); + snd_soc_codec_force_bias_level(codec, SND_SOC_BIAS_OFF); + } + regcache_cache_only(nau8824->regmap, true); + regcache_mark_dirty(nau8824->regmap); + + return 0; +} + +static int __maybe_unused nau8824_resume(struct snd_soc_codec *codec) +{ + struct nau8824 *nau8824 = snd_soc_codec_get_drvdata(codec); + + regcache_cache_only(nau8824->regmap, false); + regcache_sync(nau8824->regmap); + if (nau8824->irq) { + nau8824_sema_acquire(nau8824, 0); + enable_irq(nau8824->irq); + } + + return 0; +} + +static struct snd_soc_codec_driver nau8824_codec_driver = { + .probe = nau8824_codec_probe, + .set_sysclk = nau8824_set_sysclk, + .set_pll = nau8824_set_pll, + .set_bias_level = nau8824_set_bias_level, + .suspend = nau8824_suspend, + .resume = nau8824_resume, + .suspend_bias_off = true, + + .component_driver = { + .controls = nau8824_snd_controls, + .num_controls = ARRAY_SIZE(nau8824_snd_controls), + .dapm_widgets = nau8824_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(nau8824_dapm_widgets), + .dapm_routes = nau8824_dapm_routes, + .num_dapm_routes = ARRAY_SIZE(nau8824_dapm_routes), + }, +}; + +static const struct snd_soc_dai_ops nau8824_dai_ops = { + .hw_params = nau8824_hw_params, + .set_fmt = nau8824_set_fmt, +}; + +#define NAU8824_RATES SNDRV_PCM_RATE_8000_192000 +#define NAU8824_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE \ + | SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S32_LE) + +static struct snd_soc_dai_driver nau8824_dai = { + .name = NAU8824_CODEC_DAI, + .playback = { + .stream_name = "Playback", + .channels_min = 1, + .channels_max = 2, + .rates = NAU8824_RATES, + .formats = NAU8824_FORMATS, + }, + .capture = { + .stream_name = "Capture", + .channels_min = 1, + .channels_max = 2, + .rates = NAU8824_RATES, + .formats = NAU8824_FORMATS, + }, + .ops = &nau8824_dai_ops, +}; + +static const struct regmap_config nau8824_regmap_config = { + .val_bits = NAU8824_REG_ADDR_LEN, + .reg_bits = NAU8824_REG_DATA_LEN, + + .max_register = NAU8824_REG_MAX, + .readable_reg = nau8824_readable_reg, + .writeable_reg = nau8824_writeable_reg, + .volatile_reg = nau8824_volatile_reg, + + .cache_type = REGCACHE_RBTREE, + .reg_defaults = nau8824_reg_defaults, + .num_reg_defaults = ARRAY_SIZE(nau8824_reg_defaults), +}; + +/** + * nau8824_enable_jack_detect - Specify a jack for event reporting + * + * @component: component to register the jack with + * @jack: jack to use to report headset and button events on + * + * After this function has been called the headset insert/remove and button + * events will be routed to the given jack. Jack can be null to stop + * reporting. + */ +int nau8824_enable_jack_detect(struct snd_soc_codec *codec, + struct snd_soc_jack *jack) +{ + struct nau8824 *nau8824 = snd_soc_codec_get_drvdata(codec); + + nau8824->jack = jack; + + return 0; +} +EXPORT_SYMBOL_GPL(nau8824_enable_jack_detect); + +static void nau8824_reset_chip(struct regmap *regmap) +{ + regmap_write(regmap, NAU8824_REG_RESET, 0x00); + regmap_write(regmap, NAU8824_REG_RESET, 0x00); +} + +static void nau8824_setup_buttons(struct nau8824 *nau8824) +{ + struct regmap *regmap = nau8824->regmap; + + regmap_update_bits(regmap, NAU8824_REG_SAR_ADC, + NAU8824_SAR_TRACKING_GAIN_MASK, + nau8824->sar_voltage << NAU8824_SAR_TRACKING_GAIN_SFT); + regmap_update_bits(regmap, NAU8824_REG_SAR_ADC, + NAU8824_SAR_COMPARE_TIME_MASK, + nau8824->sar_compare_time << NAU8824_SAR_COMPARE_TIME_SFT); + regmap_update_bits(regmap, NAU8824_REG_SAR_ADC, + NAU8824_SAR_SAMPLING_TIME_MASK, + nau8824->sar_sampling_time << NAU8824_SAR_SAMPLING_TIME_SFT); + + regmap_update_bits(regmap, NAU8824_REG_VDET_COEFFICIENT, + NAU8824_LEVELS_NR_MASK, + (nau8824->sar_threshold_num - 1) << NAU8824_LEVELS_NR_SFT); + regmap_update_bits(regmap, NAU8824_REG_VDET_COEFFICIENT, + NAU8824_HYSTERESIS_MASK, + nau8824->sar_hysteresis << NAU8824_HYSTERESIS_SFT); + regmap_update_bits(regmap, NAU8824_REG_VDET_COEFFICIENT, + NAU8824_SHORTKEY_DEBOUNCE_MASK, + nau8824->key_debounce << NAU8824_SHORTKEY_DEBOUNCE_SFT); + + regmap_write(regmap, NAU8824_REG_VDET_THRESHOLD_1, + (nau8824->sar_threshold[0] << 8) | nau8824->sar_threshold[1]); + regmap_write(regmap, NAU8824_REG_VDET_THRESHOLD_2, + (nau8824->sar_threshold[2] << 8) | nau8824->sar_threshold[3]); + regmap_write(regmap, NAU8824_REG_VDET_THRESHOLD_3, + (nau8824->sar_threshold[4] << 8) | nau8824->sar_threshold[5]); + regmap_write(regmap, NAU8824_REG_VDET_THRESHOLD_4, + (nau8824->sar_threshold[6] << 8) | nau8824->sar_threshold[7]); +} + +static void nau8824_init_regs(struct nau8824 *nau8824) +{ + struct regmap *regmap = nau8824->regmap; + + /* Enable Bias/VMID/VMID Tieoff */ + regmap_update_bits(regmap, NAU8824_REG_BIAS_ADJ, + NAU8824_VMID | NAU8824_VMID_SEL_MASK, NAU8824_VMID | + (nau8824->vref_impedance << NAU8824_VMID_SEL_SFT)); + regmap_update_bits(regmap, NAU8824_REG_BOOST, + NAU8824_GLOBAL_BIAS_EN, NAU8824_GLOBAL_BIAS_EN); + mdelay(2); + regmap_update_bits(regmap, NAU8824_REG_MIC_BIAS, + NAU8824_MICBIAS_VOLTAGE_MASK, nau8824->micbias_voltage); + /* Disable Boost Driver, Automatic Short circuit protection enable */ + regmap_update_bits(regmap, NAU8824_REG_BOOST, + NAU8824_PRECHARGE_DIS | NAU8824_HP_BOOST_DIS | + NAU8824_HP_BOOST_G_DIS | NAU8824_SHORT_SHUTDOWN_EN, + NAU8824_PRECHARGE_DIS | NAU8824_HP_BOOST_DIS | + NAU8824_HP_BOOST_G_DIS | NAU8824_SHORT_SHUTDOWN_EN); + /* Scaling for ADC and DAC clock */ + regmap_update_bits(regmap, NAU8824_REG_CLK_DIVIDER, + NAU8824_CLK_ADC_SRC_MASK | NAU8824_CLK_DAC_SRC_MASK, + (0x1 << NAU8824_CLK_ADC_SRC_SFT) | + (0x1 << NAU8824_CLK_DAC_SRC_SFT)); + regmap_update_bits(regmap, NAU8824_REG_DAC_MUTE_CTRL, + NAU8824_DAC_ZC_EN, NAU8824_DAC_ZC_EN); + regmap_update_bits(regmap, NAU8824_REG_ENA_CTRL, + NAU8824_DAC_CH1_EN | NAU8824_DAC_CH0_EN | + NAU8824_ADC_CH0_EN | NAU8824_ADC_CH1_EN | + NAU8824_ADC_CH2_EN | NAU8824_ADC_CH3_EN, + NAU8824_DAC_CH1_EN | NAU8824_DAC_CH0_EN | + NAU8824_ADC_CH0_EN | NAU8824_ADC_CH1_EN | + NAU8824_ADC_CH2_EN | NAU8824_ADC_CH3_EN); + regmap_update_bits(regmap, NAU8824_REG_CLK_GATING_ENA, + NAU8824_CLK_ADC_CH23_EN | NAU8824_CLK_ADC_CH01_EN | + NAU8824_CLK_DAC_CH1_EN | NAU8824_CLK_DAC_CH0_EN | + NAU8824_CLK_I2S_EN | NAU8824_CLK_GAIN_EN | + NAU8824_CLK_SAR_EN | NAU8824_CLK_DMIC_CH23_EN, + NAU8824_CLK_ADC_CH23_EN | NAU8824_CLK_ADC_CH01_EN | + NAU8824_CLK_DAC_CH1_EN | NAU8824_CLK_DAC_CH0_EN | + NAU8824_CLK_I2S_EN | NAU8824_CLK_GAIN_EN | + NAU8824_CLK_SAR_EN | NAU8824_CLK_DMIC_CH23_EN); + /* Class G timer 64ms */ + regmap_update_bits(regmap, NAU8824_REG_CLASSG, + NAU8824_CLASSG_TIMER_MASK, + 0x20 << NAU8824_CLASSG_TIMER_SFT); + regmap_update_bits(regmap, NAU8824_REG_TRIM_SETTINGS, + NAU8824_DRV_CURR_INC, NAU8824_DRV_CURR_INC); + /* Disable DACR/L power */ + regmap_update_bits(regmap, NAU8824_REG_CHARGE_PUMP_CONTROL, + NAU8824_SPKR_PULL_DOWN | NAU8824_SPKL_PULL_DOWN | + NAU8824_POWER_DOWN_DACR | NAU8824_POWER_DOWN_DACL, + NAU8824_SPKR_PULL_DOWN | NAU8824_SPKL_PULL_DOWN | + NAU8824_POWER_DOWN_DACR | NAU8824_POWER_DOWN_DACL); + /* Enable TESTDAC. This sets the analog DAC inputs to a '0' input + * signal to avoid any glitches due to power up transients in both + * the analog and digital DAC circuit. + */ + regmap_update_bits(regmap, NAU8824_REG_ENABLE_LO, + NAU8824_TEST_DAC_EN, NAU8824_TEST_DAC_EN); + /* Config L/R channel */ + regmap_update_bits(regmap, NAU8824_REG_DAC_CH0_DGAIN_CTRL, + NAU8824_DAC_CH0_SEL_MASK, NAU8824_DAC_CH0_SEL_I2S0); + regmap_update_bits(regmap, NAU8824_REG_DAC_CH1_DGAIN_CTRL, + NAU8824_DAC_CH1_SEL_MASK, NAU8824_DAC_CH1_SEL_I2S1); + regmap_update_bits(regmap, NAU8824_REG_ENABLE_LO, + NAU8824_DACR_HPR_EN | NAU8824_DACL_HPL_EN, + NAU8824_DACR_HPR_EN | NAU8824_DACL_HPL_EN); + /* Default oversampling/decimations settings are unusable + * (audible hiss). Set it to something better. + */ + regmap_update_bits(regmap, NAU8824_REG_ADC_FILTER_CTRL, + NAU8824_ADC_SYNC_DOWN_MASK, NAU8824_ADC_SYNC_DOWN_64); + regmap_update_bits(regmap, NAU8824_REG_DAC_FILTER_CTRL_1, + NAU8824_DAC_CICCLP_OFF | NAU8824_DAC_OVERSAMPLE_MASK, + NAU8824_DAC_CICCLP_OFF | NAU8824_DAC_OVERSAMPLE_64); + /* Class D gain 9db for 1R and 2L */ + regmap_update_bits(regmap, NAU8824_REG_CLASSD_GAIN_1, + NAU8824_CLASSD_GAIN_1R_MASK, + (0xa << NAU8824_CLASSD_GAIN_1R_SFT)); + regmap_update_bits(regmap, NAU8824_REG_CLASSD_GAIN_2, + NAU8824_CLASSD_GAIN_2L_MASK, 0xa); + /* DAC clock delay 2ns, VREF */ + regmap_update_bits(regmap, NAU8824_REG_RDAC, + NAU8824_RDAC_CLK_DELAY_MASK | NAU8824_RDAC_VREF_MASK, + (0x2 << NAU8824_RDAC_CLK_DELAY_SFT) | + (0x3 << NAU8824_RDAC_VREF_SFT)); + /* PGA input mode selection */ + regmap_update_bits(regmap, NAU8824_REG_FEPGA, + NAU8824_FEPGA_MODEL_SHORT_EN | NAU8824_FEPGA_MODER_SHORT_EN, + NAU8824_FEPGA_MODEL_SHORT_EN | NAU8824_FEPGA_MODER_SHORT_EN); + /* Boost FEPGA 20dB */ + regmap_update_bits(regmap, NAU8824_REG_FEPGA_II, + NAU8824_FEPGA_GAINL_MASK | NAU8824_FEPGA_GAINR_MASK, + 0xa | (0xa << NAU8824_FEPGA_GAINR_SFT)); + /* Digital microphone control */ + regmap_update_bits(regmap, NAU8824_REG_ANALOG_CONTROL_1, + NAU8824_DMIC_CLK_DRV_STRG | NAU8824_DMIC_CLK_SLEW_FAST, + NAU8824_DMIC_CLK_DRV_STRG | NAU8824_DMIC_CLK_SLEW_FAST); + regmap_update_bits(nau8824->regmap, + NAU8824_REG_JACK_DET_CTRL, NAU8824_JACK_EJECT_DT_MASK, + (nau8824->jack_eject_debounce << NAU8824_JACK_EJECT_DT_SFT)); + if (nau8824->sar_threshold_num) + nau8824_setup_buttons(nau8824); +} + +static int nau8824_setup_irq(struct nau8824 *nau8824) +{ + int ret; + + /* Disable interruption before codec initiation done */ + regmap_update_bits(nau8824->regmap, + NAU8824_REG_INTERRUPT_SETTING, 0x3ff, 0x3ff); + regmap_update_bits(nau8824->regmap, NAU8824_REG_INTERRUPT_SETTING_1, + NAU8824_IRQ_EJECT_EN | NAU8824_IRQ_INSERT_EN, 0); + + /* Initiate jack detection work queue */ + INIT_WORK(&nau8824->jdet_work, nau8824_jdet_work); + ret = devm_request_threaded_irq(nau8824->dev, nau8824->irq, NULL, + nau8824_interrupt, IRQF_TRIGGER_LOW | IRQF_ONESHOT, + "nau8824", nau8824); + if (ret) { + dev_err(nau8824->dev, "Cannot request irq %d (%d)\n", + nau8824->irq, ret); + } + + return ret; +} + +static void nau8824_print_device_properties(struct nau8824 *nau8824) +{ + struct device *dev = nau8824->dev; + int i; + + dev_dbg(dev, "micbias-voltage: %d\n", nau8824->micbias_voltage); + dev_dbg(dev, "vref-impedance: %d\n", nau8824->vref_impedance); + + dev_dbg(dev, "sar-threshold-num: %d\n", nau8824->sar_threshold_num); + for (i = 0; i < nau8824->sar_threshold_num; i++) + dev_dbg(dev, "sar-threshold[%d]=%x\n", i, + nau8824->sar_threshold[i]); + + dev_dbg(dev, "sar-hysteresis: %d\n", nau8824->sar_hysteresis); + dev_dbg(dev, "sar-voltage: %d\n", nau8824->sar_voltage); + dev_dbg(dev, "sar-compare-time: %d\n", nau8824->sar_compare_time); + dev_dbg(dev, "sar-sampling-time: %d\n", nau8824->sar_sampling_time); + dev_dbg(dev, "short-key-debounce: %d\n", nau8824->key_debounce); + dev_dbg(dev, "jack-eject-debounce: %d\n", + nau8824->jack_eject_debounce); +} + +static int nau8824_read_device_properties(struct device *dev, + struct nau8824 *nau8824) { + + device_property_read_u32(dev, "nuvoton,micbias-voltage", + &nau8824->micbias_voltage); + device_property_read_u32(dev, "nuvoton,vref-impedance", + &nau8824->vref_impedance); + device_property_read_u32(dev, "nuvoton,sar-threshold-num", + &nau8824->sar_threshold_num); + device_property_read_u32_array(dev, "nuvoton,sar-threshold", + nau8824->sar_threshold, nau8824->sar_threshold_num); + device_property_read_u32(dev, "nuvoton,sar-hysteresis", + &nau8824->sar_hysteresis); + device_property_read_u32(dev, "nuvoton,sar-voltage", + &nau8824->sar_voltage); + device_property_read_u32(dev, "nuvoton,sar-compare-time", + &nau8824->sar_compare_time); + device_property_read_u32(dev, "nuvoton,sar-sampling-time", + &nau8824->sar_sampling_time); + device_property_read_u32(dev, "nuvoton,short-key-debounce", + &nau8824->key_debounce); + device_property_read_u32(dev, "nuvoton,jack-eject-debounce", + &nau8824->jack_eject_debounce); + + return 0; +} + +static int nau8824_i2c_probe(struct i2c_client *i2c, + const struct i2c_device_id *id) +{ + struct device *dev = &i2c->dev; + struct nau8824 *nau8824 = dev_get_platdata(dev); + int ret, value; + + if (!nau8824) { + nau8824 = devm_kzalloc(dev, sizeof(*nau8824), GFP_KERNEL); + if (!nau8824) + return -ENOMEM; + ret = nau8824_read_device_properties(dev, nau8824); + if (ret) + return ret; + } + i2c_set_clientdata(i2c, nau8824); + + nau8824->regmap = devm_regmap_init_i2c(i2c, &nau8824_regmap_config); + if (IS_ERR(nau8824->regmap)) + return PTR_ERR(nau8824->regmap); + nau8824->dev = dev; + nau8824->irq = i2c->irq; + sema_init(&nau8824->jd_sem, 1); + + nau8824_print_device_properties(nau8824); + + nau8824_reset_chip(nau8824->regmap); + ret = regmap_read(nau8824->regmap, NAU8824_REG_I2C_DEVICE_ID, &value); + if (ret < 0) { + dev_err(dev, "Failed to read device id from the NAU8824: %d\n", + ret); + return ret; + } + nau8824_init_regs(nau8824); + + if (i2c->irq) + nau8824_setup_irq(nau8824); + + return snd_soc_register_codec(dev, + &nau8824_codec_driver, &nau8824_dai, 1); +} + + +static int nau8824_i2c_remove(struct i2c_client *client) +{ + snd_soc_unregister_codec(&client->dev); + return 0; +} + +static const struct i2c_device_id nau8824_i2c_ids[] = { + { "nau8824", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, nau8824_i2c_ids); + +#ifdef CONFIG_OF +static const struct of_device_id nau8824_of_ids[] = { + { .compatible = "nuvoton,nau8824", }, + {} +}; +MODULE_DEVICE_TABLE(of, nau8824_of_ids); +#endif + +#ifdef CONFIG_ACPI +static const struct acpi_device_id nau8824_acpi_match[] = { + { "10508824", 0 }, + {}, +}; +MODULE_DEVICE_TABLE(acpi, nau8824_acpi_match); +#endif + +static struct i2c_driver nau8824_i2c_driver = { + .driver = { + .name = "nau8824", + .of_match_table = of_match_ptr(nau8824_of_ids), + .acpi_match_table = ACPI_PTR(nau8824_acpi_match), + }, + .probe = nau8824_i2c_probe, + .remove = nau8824_i2c_remove, + .id_table = nau8824_i2c_ids, +}; +module_i2c_driver(nau8824_i2c_driver); + + +MODULE_DESCRIPTION("ASoC NAU88L24 driver"); +MODULE_AUTHOR("John Hsu <KCHSU0(a)nuvoton.com>"); +MODULE_LICENSE("GPL v2"); diff --git a/sound/soc/codecs/nau8824.h b/sound/soc/codecs/nau8824.h new file mode 100644 index 0000000..5cb65a4 --- /dev/null +++ b/sound/soc/codecs/nau8824.h @@ -0,0 +1,462 @@ +/* + * NAU88L24 ALSA SoC audio driver + * + * Copyright 2016 Nuvoton Technology Corp. + * Author: John Hsu <KCHSU0(a)nuvoton.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __NAU8824_H__ +#define __NAU8824_H__ + +#define NAU8824_REG_RESET 0x00 +#define NAU8824_REG_ENA_CTRL 0x01 +#define NAU8824_REG_CLK_GATING_ENA 0x02 +#define NAU8824_REG_CLK_DIVIDER 0x03 +#define NAU8824_REG_FLL1 0x04 +#define NAU8824_REG_FLL2 0x05 +#define NAU8824_REG_FLL3 0x06 +#define NAU8824_REG_FLL4 0x07 +#define NAU8824_REG_FLL5 0x08 +#define NAU8824_REG_FLL6 0x09 +#define NAU8824_REG_FLL_VCO_RSV 0x0A +#define NAU8824_REG_JACK_DET_CTRL 0x0D +#define NAU8824_REG_INTERRUPT_SETTING_1 0x0F +#define NAU8824_REG_IRQ 0x10 +#define NAU8824_REG_CLEAR_INT_REG 0x11 +#define NAU8824_REG_INTERRUPT_SETTING 0x12 +#define NAU8824_REG_SAR_ADC 0x13 +#define NAU8824_REG_VDET_COEFFICIENT 0x14 +#define NAU8824_REG_VDET_THRESHOLD_1 0x15 +#define NAU8824_REG_VDET_THRESHOLD_2 0x16 +#define NAU8824_REG_VDET_THRESHOLD_3 0x17 +#define NAU8824_REG_VDET_THRESHOLD_4 0x18 +#define NAU8824_REG_GPIO_SEL 0x1A +#define NAU8824_REG_PORT0_I2S_PCM_CTRL_1 0x1C +#define NAU8824_REG_PORT0_I2S_PCM_CTRL_2 0x1D +#define NAU8824_REG_PORT0_LEFT_TIME_SLOT 0x1E +#define NAU8824_REG_PORT0_RIGHT_TIME_SLOT 0x1F +#define NAU8824_REG_TDM_CTRL 0x20 +#define NAU8824_REG_ADC_HPF_FILTER 0x23 +#define NAU8824_REG_ADC_FILTER_CTRL 0x24 +#define NAU8824_REG_DAC_FILTER_CTRL_1 0x25 +#define NAU8824_REG_DAC_FILTER_CTRL_2 0x26 +#define NAU8824_REG_NOTCH_FILTER_1 0x27 +#define NAU8824_REG_NOTCH_FILTER_2 0x28 +#define NAU8824_REG_EQ1_LOW 0x29 +#define NAU8824_REG_EQ2_EQ3 0x2A +#define NAU8824_REG_EQ4_EQ5 0x2B +#define NAU8824_REG_ADC_CH0_DGAIN_CTRL 0x2D +#define NAU8824_REG_ADC_CH1_DGAIN_CTRL 0x2E +#define NAU8824_REG_ADC_CH2_DGAIN_CTRL 0x2F +#define NAU8824_REG_ADC_CH3_DGAIN_CTRL 0x30 +#define NAU8824_REG_DAC_MUTE_CTRL 0x31 +#define NAU8824_REG_DAC_CH0_DGAIN_CTRL 0x32 +#define NAU8824_REG_DAC_CH1_DGAIN_CTRL 0x33 +#define NAU8824_REG_ADC_TO_DAC_ST 0x34 +#define NAU8824_REG_DRC_KNEE_IP12_ADC_CH01 0x38 +#define NAU8824_REG_DRC_KNEE_IP34_ADC_CH01 0x39 +#define NAU8824_REG_DRC_SLOPE_ADC_CH01 0x3A +#define NAU8824_REG_DRC_ATKDCY_ADC_CH01 0x3B +#define NAU8824_REG_DRC_KNEE_IP12_ADC_CH23 0x3C +#define NAU8824_REG_DRC_KNEE_IP34_ADC_CH23 0x3D +#define NAU8824_REG_DRC_SLOPE_ADC_CH23 0x3E +#define NAU8824_REG_DRC_ATKDCY_ADC_CH23 0x3F +#define NAU8824_REG_DRC_GAINL_ADC0 0x40 +#define NAU8824_REG_DRC_GAINL_ADC1 0x41 +#define NAU8824_REG_DRC_GAINL_ADC2 0x42 +#define NAU8824_REG_DRC_GAINL_ADC3 0x43 +#define NAU8824_REG_DRC_KNEE_IP12_DAC 0x45 +#define NAU8824_REG_DRC_KNEE_IP34_DAC 0x46 +#define NAU8824_REG_DRC_SLOPE_DAC 0x47 +#define NAU8824_REG_DRC_ATKDCY_DAC 0x48 +#define NAU8824_REG_DRC_GAIN_DAC_CH0 0x49 +#define NAU8824_REG_DRC_GAIN_DAC_CH1 0x4A +#define NAU8824_REG_MODE 0x4C +#define NAU8824_REG_MODE1 0x4D +#define NAU8824_REG_MODE2 0x4E +#define NAU8824_REG_CLASSG 0x50 +#define NAU8824_REG_OTP_EFUSE 0x51 +#define NAU8824_REG_OTPDOUT_1 0x53 +#define NAU8824_REG_OTPDOUT_2 0x54 +#define NAU8824_REG_MISC_CTRL 0x55 +#define NAU8824_REG_I2C_TIMEOUT 0x56 +#define NAU8824_REG_TEST_MODE 0x57 +#define NAU8824_REG_I2C_DEVICE_ID 0x58 +#define NAU8824_REG_SAR_ADC_DATA_OUT 0x59 +#define NAU8824_REG_BIAS_ADJ 0x66 +#define NAU8824_REG_PGA_GAIN 0x67 +#define NAU8824_REG_TRIM_SETTINGS 0x68 +#define NAU8824_REG_ANALOG_CONTROL_1 0x69 +#define NAU8824_REG_ANALOG_CONTROL_2 0x6A +#define NAU8824_REG_ENABLE_LO 0x6B +#define NAU8824_REG_GAIN_LO 0x6C +#define NAU8824_REG_CLASSD_GAIN_1 0x6D +#define NAU8824_REG_CLASSD_GAIN_2 0x6E +#define NAU8824_REG_ANALOG_ADC_1 0x71 +#define NAU8824_REG_ANALOG_ADC_2 0x72 +#define NAU8824_REG_RDAC 0x73 +#define NAU8824_REG_MIC_BIAS 0x74 +#define NAU8824_REG_HS_VOLUME_CONTROL 0x75 +#define NAU8824_REG_BOOST 0x76 +#define NAU8824_REG_FEPGA 0x77 +#define NAU8824_REG_FEPGA_II 0x78 +#define NAU8824_REG_FEPGA_SE 0x79 +#define NAU8824_REG_FEPGA_ATTENUATION 0x7A +#define NAU8824_REG_ATT_PORT0 0x7B +#define NAU8824_REG_ATT_PORT1 0x7C +#define NAU8824_REG_POWER_UP_CONTROL 0x7F +#define NAU8824_REG_CHARGE_PUMP_CONTROL 0x80 +#define NAU8824_REG_CHARGE_PUMP_INPUT 0x81 +#define NAU8824_REG_MAX NAU8824_REG_CHARGE_PUMP_INPUT +/* 16-bit control register address, and 16-bits control register data */ +#define NAU8824_REG_ADDR_LEN 16 +#define NAU8824_REG_DATA_LEN 16 + + +/* ENA_CTRL (0x1) */ +#define NAU8824_DMIC_LCH_EDGE_CH23 (0x1 << 12) +#define NAU8824_DMIC_LCH_EDGE_CH01 (0x1 << 11) +#define NAU8824_JD_SLEEP_MODE (0x1 << 10) +#define NAU8824_ADC_CH3_DMIC_SFT 9 +#define NAU8824_ADC_CH3_DMIC_EN (0x1 << NAU8824_ADC_CH3_DMIC_SFT) +#define NAU8824_ADC_CH2_DMIC_SFT 8 +#define NAU8824_ADC_CH2_DMIC_EN (0x1 << NAU8824_ADC_CH2_DMIC_SFT) +#define NAU8824_ADC_CH1_DMIC_SFT 7 +#define NAU8824_ADC_CH1_DMIC_EN (0x1 << NAU8824_ADC_CH1_DMIC_SFT) +#define NAU8824_ADC_CH0_DMIC_SFT 6 +#define NAU8824_ADC_CH0_DMIC_EN (0x1 << NAU8824_ADC_CH0_DMIC_SFT) +#define NAU8824_DAC_CH1_EN (0x1 << 5) +#define NAU8824_DAC_CH0_EN (0x1 << 4) +#define NAU8824_ADC_CH3_EN (0x1 << 3) +#define NAU8824_ADC_CH2_EN (0x1 << 2) +#define NAU8824_ADC_CH1_EN (0x1 << 1) +#define NAU8824_ADC_CH0_EN 0x1 + +/* CLK_GATING_ENA (0x02) */ +#define NAU8824_CLK_ADC_CH23_EN (0x1 << 15) +#define NAU8824_CLK_ADC_CH01_EN (0x1 << 14) +#define NAU8824_CLK_DAC_CH1_EN (0x1 << 13) +#define NAU8824_CLK_DAC_CH0_EN (0x1 << 12) +#define NAU8824_CLK_I2S_EN (0x1 << 7) +#define NAU8824_CLK_GAIN_EN (0x1 << 5) +#define NAU8824_CLK_SAR_EN (0x1 << 3) +#define NAU8824_CLK_DMIC_CH23_EN (0x1 << 1) + +/* CLK_DIVIDER (0x3) */ +#define NAU8824_CLK_SRC_SFT 15 +#define NAU8824_CLK_SRC_MASK (1 << NAU8824_CLK_SRC_SFT) +#define NAU8824_CLK_SRC_VCO (1 << NAU8824_CLK_SRC_SFT) +#define NAU8824_CLK_SRC_MCLK (0 << NAU8824_CLK_SRC_SFT) +#define NAU8824_CLK_MCLK_SRC_MASK (0xf << 0) +#define NAU8824_CLK_DMIC_SRC_SFT 10 +#define NAU8824_CLK_DMIC_SRC_MASK (0x7 << NAU8824_CLK_DMIC_SRC_SFT) +#define NAU8824_CLK_ADC_SRC_SFT 6 +#define NAU8824_CLK_ADC_SRC_MASK (0x3 << NAU8824_CLK_ADC_SRC_SFT) +#define NAU8824_CLK_DAC_SRC_SFT 4 +#define NAU8824_CLK_DAC_SRC_MASK (0x3 << NAU8824_CLK_DAC_SRC_SFT) + +/* FLL1 (0x04) */ +#define NAU8824_FLL_RATIO_MASK (0x7f << 0) + +/* FLL3 (0x06) */ +#define NAU8824_FLL_INTEGER_MASK (0x3ff << 0) +#define NAU8824_FLL_CLK_SRC_SFT 10 +#define NAU8824_FLL_CLK_SRC_MASK (0x3 << NAU8824_FLL_CLK_SRC_SFT) +#define NAU8824_FLL_CLK_SRC_MCLK (0 << NAU8824_FLL_CLK_SRC_SFT) +#define NAU8824_FLL_CLK_SRC_BLK (0x2 << NAU8824_FLL_CLK_SRC_SFT) +#define NAU8824_FLL_CLK_SRC_FS (0x3 << NAU8824_FLL_CLK_SRC_SFT) + +/* FLL4 (0x07) */ +#define NAU8824_FLL_REF_DIV_SFT 10 +#define NAU8824_FLL_REF_DIV_MASK (0x3 << NAU8824_FLL_REF_DIV_SFT) + +/* FLL5 (0x08) */ +#define NAU8824_FLL_PDB_DAC_EN (0x1 << 15) +#define NAU8824_FLL_LOOP_FTR_EN (0x1 << 14) +#define NAU8824_FLL_CLK_SW_MASK (0x1 << 13) +#define NAU8824_FLL_CLK_SW_N2 (0x1 << 13) +#define NAU8824_FLL_CLK_SW_REF (0x0 << 13) +#define NAU8824_FLL_FTR_SW_MASK (0x1 << 12) +#define NAU8824_FLL_FTR_SW_ACCU (0x1 << 12) +#define NAU8824_FLL_FTR_SW_FILTER (0x0 << 12) + +/* FLL6 (0x9) */ +#define NAU8824_DCO_EN (0x1 << 15) +#define NAU8824_SDM_EN (0x1 << 14) + +/* IRQ (0x10) */ +#define NAU8824_SHORT_CIRCUIT_IRQ (0x1 << 7) +#define NAU8824_IMPEDANCE_MEAS_IRQ (0x1 << 6) +#define NAU8824_KEY_RELEASE_IRQ (0x1 << 5) +#define NAU8824_KEY_LONG_PRESS_IRQ (0x1 << 4) +#define NAU8824_KEY_SHORT_PRESS_IRQ (0x1 << 3) +#define NAU8824_JACK_EJECTION_DETECTED (0x1 << 1) +#define NAU8824_JACK_INSERTION_DETECTED 0x1 + +/* JACK_DET_CTRL (0x0D) */ +#define NAU8824_JACK_EJECT_DT_SFT 2 +#define NAU8824_JACK_EJECT_DT_MASK (0x3 << NAU8824_JACK_EJECT_DT_SFT) + +/* INTERRUPT_SETTING_1 (0x0F) */ +#define NAU8824_IRQ_EJECT_EN (0x1 << 9) +#define NAU8824_IRQ_INSERT_EN (0x1 << 8) + +/* INTERRUPT_SETTING (0x12) */ +#define NAU8824_IRQ_KEY_RELEASE_DIS (0x1 << 5) +#define NAU8824_IRQ_KEY_SHORT_PRESS_DIS (0x1 << 3) +#define NAU8824_IRQ_EJECT_DIS (0x1 << 1) +#define NAU8824_IRQ_INSERT_DIS 0x1 + +/* SAR_ADC (0x13) */ +#define NAU8824_SAR_ADC_EN_SFT 12 +#define NAU8824_SAR_TRACKING_GAIN_SFT 8 +#define NAU8824_SAR_TRACKING_GAIN_MASK (0x7 << NAU8824_SAR_TRACKING_GAIN_SFT) +#define NAU8824_SAR_COMPARE_TIME_SFT 2 +#define NAU8824_SAR_COMPARE_TIME_MASK (3 << 2) +#define NAU8824_SAR_SAMPLING_TIME_SFT 0 +#define NAU8824_SAR_SAMPLING_TIME_MASK (3 << 0) + +/* VDET_COEFFICIENT (0x14) */ +#define NAU8824_SHORTKEY_DEBOUNCE_SFT 12 +#define NAU8824_SHORTKEY_DEBOUNCE_MASK (0x3 << NAU8824_SHORTKEY_DEBOUNCE_SFT) +#define NAU8824_LEVELS_NR_SFT 8 +#define NAU8824_LEVELS_NR_MASK (0x7 << 8) +#define NAU8824_HYSTERESIS_SFT 0 +#define NAU8824_HYSTERESIS_MASK 0xf + +/* PORT0_I2S_PCM_CTRL_1 (0x1C) */ +#define NAU8824_I2S_BP_SFT 7 +#define NAU8824_I2S_BP_MASK (1 << NAU8824_I2S_BP_SFT) +#define NAU8824_I2S_BP_INV (1 << NAU8824_I2S_BP_SFT) +#define NAU8824_I2S_PCMB_SFT 6 +#define NAU8824_I2S_PCMB_EN (1 << NAU8824_I2S_PCMB_SFT) +#define NAU8824_I2S_DL_SFT 2 +#define NAU8824_I2S_DL_MASK (0x3 << NAU8824_I2S_DL_SFT) +#define NAU8824_I2S_DL_16 (0 << NAU8824_I2S_DL_SFT) +#define NAU8824_I2S_DL_20 (1 << NAU8824_I2S_DL_SFT) +#define NAU8824_I2S_DL_24 (2 << NAU8824_I2S_DL_SFT) +#define NAU8824_I2S_DL_32 (3 << NAU8824_I2S_DL_SFT) +#define NAU8824_I2S_DF_MASK 0x3 +#define NAU8824_I2S_DF_RIGTH 0 +#define NAU8824_I2S_DF_LEFT 1 +#define NAU8824_I2S_DF_I2S 2 +#define NAU8824_I2S_DF_PCM_AB 3 + + +/* PORT0_I2S_PCM_CTRL_2 (0x1D) */ +#define NAU8824_I2S_LRC_DIV_SFT 12 +#define NAU8824_I2S_LRC_DIV_MASK (0x3 << NAU8824_I2S_LRC_DIV_SFT) +#define NAU8824_I2S_MS_SFT 3 +#define NAU8824_I2S_MS_MASK (1 << NAU8824_I2S_MS_SFT) +#define NAU8824_I2S_MS_MASTER (1 << NAU8824_I2S_MS_SFT) +#define NAU8824_I2S_MS_SLAVE (0 << NAU8824_I2S_MS_SFT) +#define NAU8824_I2S_BLK_DIV_MASK 0x7 + +/* ADC_FILTER_CTRL (0x24) */ +#define NAU8824_ADC_SYNC_DOWN_MASK 0x3 +#define NAU8824_ADC_SYNC_DOWN_32 0 +#define NAU8824_ADC_SYNC_DOWN_64 1 +#define NAU8824_ADC_SYNC_DOWN_128 2 +#define NAU8824_ADC_SYNC_DOWN_256 3 + +/* DAC_FILTER_CTRL_1 (0x25) */ +#define NAU8824_DAC_CICCLP_OFF (0x1 << 7) +#define NAU8824_DAC_OVERSAMPLE_MASK 0x7 +#define NAU8824_DAC_OVERSAMPLE_64 0 +#define NAU8824_DAC_OVERSAMPLE_256 1 +#define NAU8824_DAC_OVERSAMPLE_128 2 +#define NAU8824_DAC_OVERSAMPLE_32 4 + +/* DAC_MUTE_CTRL (0x31) */ +#define NAU8824_DAC_CH01_MIX 0x3 +#define NAU8824_DAC_ZC_EN (0x1 << 11) + +/* DAC_CH0_DGAIN_CTRL (0x32) */ +#define NAU8824_DAC_CH0_SEL_SFT 9 +#define NAU8824_DAC_CH0_SEL_MASK (0x1 << NAU8824_DAC_CH0_SEL_SFT) +#define NAU8824_DAC_CH0_SEL_I2S0 (0x0 << NAU8824_DAC_CH0_SEL_SFT) +#define NAU8824_DAC_CH0_SEL_I2S1 (0x1 << NAU8824_DAC_CH0_SEL_SFT) +#define NAU8824_DAC_CH0_VOL_MASK 0x1ff + +/* DAC_CH1_DGAIN_CTRL (0x33) */ +#define NAU8824_DAC_CH1_SEL_SFT 9 +#define NAU8824_DAC_CH1_SEL_MASK (0x1 << NAU8824_DAC_CH1_SEL_SFT) +#define NAU8824_DAC_CH1_SEL_I2S0 (0x0 << NAU8824_DAC_CH1_SEL_SFT) +#define NAU8824_DAC_CH1_SEL_I2S1 (0x1 << NAU8824_DAC_CH1_SEL_SFT) +#define NAU8824_DAC_CH1_VOL_MASK 0x1ff + +/* CLASSG (0x50) */ +#define NAU8824_CLASSG_TIMER_SFT 8 +#define NAU8824_CLASSG_TIMER_MASK (0x3f << NAU8824_CLASSG_TIMER_SFT) +#define NAU8824_CLASSG_LDAC_EN_SFT 2 +#define NAU8824_CLASSG_RDAC_EN_SFT 1 +#define NAU8824_CLASSG_EN_SFT 0 + +/* SAR_ADC_DATA_OUT (0x59) */ +#define NAU8824_SAR_ADC_DATA_MASK 0xff + +/* BIAS_ADJ (0x66) */ +#define NAU8824_VMID (1 << 6) +#define NAU8824_VMID_SEL_SFT 4 +#define NAU8824_VMID_SEL_MASK (3 << NAU8824_VMID_SEL_SFT) +#define NAU8824_DMIC2_EN_SFT 3 +#define NAU8824_DMIC1_EN_SFT 2 + +/* TRIM_SETTINGS (0x68) */ +#define NAU8824_DRV_CURR_INC (1 << 15) + +/* ANALOG_CONTROL_1 (0x69) */ +#define NAU8824_DMIC_CLK_DRV_STRG (1 << 3) +#define NAU8824_DMIC_CLK_SLEW_FAST (0x7) + +/* ANALOG_CONTROL_2 (0x6A) */ +#define NAU8824_CLASSD_CLAMP_DIS_SFT 3 +#define NAU8824_CLASSD_CLAMP_DIS (0x1 << NAU8824_CLASSD_CLAMP_DIS_SFT) + +/* ENABLE_LO (0x6B) */ +#define NAU8824_TEST_DAC_SFT 14 +#define NAU8824_TEST_DAC_EN (0x3 << NAU8824_TEST_DAC_SFT) +#define NAU8824_DACL_HPR_EN_SFT 3 +#define NAU8824_DACL_HPR_EN (0x1 << NAU8824_DACL_HPR_EN_SFT) +#define NAU8824_DACR_HPR_EN_SFT 2 +#define NAU8824_DACR_HPR_EN (0x1 << NAU8824_DACR_HPR_EN_SFT) +#define NAU8824_DACR_HPL_EN_SFT 1 +#define NAU8824_DACR_HPL_EN (0x1 << NAU8824_DACR_HPL_EN_SFT) +#define NAU8824_DACL_HPL_EN_SFT 0 +#define NAU8824_DACL_HPL_EN 0x1 + +/* CLASSD_GAIN_1 (0x6D) */ +#define NAU8824_CLASSD_GAIN_1R_SFT 8 +#define NAU8824_CLASSD_GAIN_1R_MASK (0x1f << NAU8824_CLASSD_GAIN_1R_SFT) +#define NAU8824_CLASSD_EN_SFT 7 +#define NAU8824_CLASSD_EN (0x1 << NAU8824_CLASSD_EN_SFT) +#define NAU8824_CLASSD_GAIN_1L_MASK 0x1f + +/* CLASSD_GAIN_2 (0x6E) */ +#define NAU8824_CLASSD_GAIN_2R_SFT 8 +#define NAU8824_CLASSD_GAIN_2R_MASK (0x1f << NAU8824_CLASSD_GAIN_1R_SFT) +#define NAU8824_CLASSD_EN_SFT 7 +#define NAU8824_CLASSD_EN (0x1 << NAU8824_CLASSD_EN_SFT) +#define NAU8824_CLASSD_GAIN_2L_MASK 0x1f + +/* ANALOG_ADC_2 (0x72) */ +#define NAU8824_ADCR_EN_SFT 7 +#define NAU8824_ADCL_EN_SFT 6 + +/* RDAC (0x73) */ +#define NAU8824_DACR_EN_SFT 13 +#define NAU8824_DACL_EN_SFT 12 +#define NAU8824_DACR_CLK_SFT 9 +#define NAU8824_DACL_CLK_SFT 8 +#define NAU8824_RDAC_CLK_DELAY_SFT 4 +#define NAU8824_RDAC_CLK_DELAY_MASK (0x7 << NAU8824_RDAC_CLK_DELAY_SFT) +#define NAU8824_RDAC_VREF_SFT 2 +#define NAU8824_RDAC_VREF_MASK (0x3 << NAU8824_RDAC_VREF_SFT) + +/* MIC_BIAS (0x74) */ +#define NAU8824_MICBIAS_JKSLV (1 << 14) +#define NAU8824_MICBIAS_JKR2 (1 << 12) +#define NAU8824_MICBIAS_POWERUP_SFT 8 +#define NAU8824_MICBIAS_VOLTAGE_SFT 0 +#define NAU8824_MICBIAS_VOLTAGE_MASK 0x7 + +/* BOOST (0x76) */ +#define NAU8824_PRECHARGE_DIS (0x1 << 13) +#define NAU8824_GLOBAL_BIAS_EN (0x1 << 12) +#define NAU8824_HP_BOOST_DIS_SFT 9 +#define NAU8824_HP_BOOST_DIS (0x1 << NAU8824_HP_BOOST_DIS_SFT) +#define NAU8824_HP_BOOST_G_DIS_SFT 8 +#define NAU8824_HP_BOOST_G_DIS (0x1 << NAU8824_HP_BOOST_G_DIS_SFT) +#define NAU8824_SHORT_SHUTDOWN_DIG_EN (1 << 7) +#define NAU8824_SHORT_SHUTDOWN_EN (1 << 6) + +/* FEPGA (0x77) */ +#define NAU8824_FEPGA_MODER_SHORT_SFT 7 +#define NAU8824_FEPGA_MODER_SHORT_EN (0x1 << NAU8824_FEPGA_MODER_SHORT_SFT) +#define NAU8824_FEPGA_MODER_MIC2_SFT 5 +#define NAU8824_FEPGA_MODER_MIC2_EN (0x1 << NAU8824_FEPGA_MODER_MIC2_SFT) +#define NAU8824_FEPGA_MODER_HSMIC_SFT 4 +#define NAU8824_FEPGA_MODER_HSMIC_EN (0x1 << NAU8824_FEPGA_MODER_HSMIC_SFT) +#define NAU8824_FEPGA_MODEL_SHORT_SFT 3 +#define NAU8824_FEPGA_MODEL_SHORT_EN (0x1 << NAU8824_FEPGA_MODEL_SHORT_SFT) +#define NAU8824_FEPGA_MODEL_MIC1_SFT 1 +#define NAU8824_FEPGA_MODEL_MIC1_EN (0x1 << NAU8824_FEPGA_MODEL_MIC1_SFT) +#define NAU8824_FEPGA_MODEL_HSMIC_SFT 0 +#define NAU8824_FEPGA_MODEL_HSMIC_EN (0x1 << NAU8824_FEPGA_MODEL_HSMIC_SFT) + +/* FEPGA_II (0x78) */ +#define NAU8824_FEPGA_GAINR_SFT 5 +#define NAU8824_FEPGA_GAINR_MASK (0x1f << NAU8824_FEPGA_GAINR_SFT) +#define NAU8824_FEPGA_GAINL_SFT 0 +#define NAU8824_FEPGA_GAINL_MASK 0x1f + +/* CHARGE_PUMP_CONTROL (0x80) */ +#define NAU8824_JAMNODCLOW (0x1 << 15) +#define NAU8824_SPKR_PULL_DOWN (0x1 << 13) +#define NAU8824_SPKL_PULL_DOWN (0x1 << 12) +#define NAU8824_POWER_DOWN_DACR (0x1 << 9) +#define NAU8824_POWER_DOWN_DACL (0x1 << 8) +#define NAU8824_CHARGE_PUMP_EN_SFT 5 +#define NAU8824_CHARGE_PUMP_EN (0x1 << NAU8824_CHARGE_PUMP_EN_SFT) + + +#define NAU8824_CODEC_DAI "nau8824-hifi" + +/* System Clock Source */ +enum { + NAU8824_CLK_DIS, + NAU8824_CLK_MCLK, + NAU8824_CLK_INTERNAL, + NAU8824_CLK_FLL_MCLK, + NAU8824_CLK_FLL_BLK, + NAU8824_CLK_FLL_FS, +}; + +struct nau8824 { + struct device *dev; + struct regmap *regmap; + struct snd_soc_dapm_context *dapm; + struct snd_soc_jack *jack; + struct work_struct jdet_work; + struct semaphore jd_sem; + int irq; + int micbias_voltage; + int vref_impedance; + int sar_threshold_num; + int sar_threshold[8]; + int sar_hysteresis; + int sar_voltage; + int sar_compare_time; + int sar_sampling_time; + int key_debounce; + int jack_eject_debounce; +}; + +struct nau8824_fll { + int mclk_src; + int ratio; + int fll_frac; + int fll_int; + int clk_ref_div; +}; + +struct nau8824_fll_attr { + unsigned int param; + unsigned int val; +}; + +struct nau8824_osr_attr { + unsigned int osr; + unsigned int clk_src; +}; + + +int nau8824_enable_jack_detect(struct snd_soc_codec *codec, + struct snd_soc_jack *jack); + +#endif /* _NAU8824_H */ + -- 2.6.4 =========================================================================================== The privileged confidential information contained in this email is intended for use only by the addressees as indicated by the original sender of this email. If you are not the addressee indicated in this email or are not responsible for delivery of the email to such a person, please kindly reply to the sender indicating this fact and delete all copies of it from your computer and network server immediately. Your cooperation is highly appreciated. It is advised that any unauthorized use of confidential information of Nuvoton is strictly prohibited; and any information in this email irrelevant to the official business of Nuvoton shall be deemed as neither given nor endorsed by Nuvoton.

2 2

[alsa-devel] [RFC] [ALSA][CONTROL] Restructured the code for read/write of a single control
by Satendra Singh Thakur 02 Feb '17

02 Feb '17

From: satendra singh thakur <satendra.t(a)samsung.com> -Restructured/Combined two functions snd_ctl_elem_read_user and snd_ctl_elem_write_user into a single function snd_ctl_elem_rw_user -These functions were having most of the code which was similar to each other -Thus, there was redundant/duplicate code which was removed and a single function was formed/defined.- -Removed functions snd_ctl_elem_read_user and snd_ctl_elem_write_user having redundant/duplicate code Signed-off-by: Satendra Singh Thakur <satendra.t(a)samsung.com> --- sound/core/control.c | 55 ++++++++++++++++++++++---------------------------- 1 file changed, 24 insertions(+), 31 deletions(-) diff --git a/sound/core/control.c b/sound/core/control.c index fb096cb..6a8bc19 100644 --- a/sound/core/control.c +++ b/sound/core/control.c @@ -920,28 +920,6 @@ static int snd_ctl_elem_read(struct snd_card *card, return result; } -static int snd_ctl_elem_read_user(struct snd_card *card, - struct snd_ctl_elem_value __user *_control) -{ - struct snd_ctl_elem_value *control; - int result; - - control = memdup_user(_control, sizeof(*control)); - if (IS_ERR(control)) - return PTR_ERR(control); - - snd_power_lock(card); - result = snd_power_wait(card, SNDRV_CTL_POWER_D0); - if (result >= 0) - result = snd_ctl_elem_read(card, control); - snd_power_unlock(card); - if (result >= 0) - if (copy_to_user(_control, control, sizeof(*control))) - result = -EFAULT; - kfree(control); - return result; -} - static int snd_ctl_elem_write(struct snd_card *card, struct snd_ctl_file *file, struct snd_ctl_elem_value *control) { @@ -976,22 +954,37 @@ static int snd_ctl_elem_write(struct snd_card *card, struct snd_ctl_file *file, return result; } -static int snd_ctl_elem_write_user(struct snd_ctl_file *file, - struct snd_ctl_elem_value __user *_control) + +/** + * snd_ctl_elem_rw_user - Read/write value of an element + * @file: the card to which element belongs to + * @_control,: the card to which element belongs to + * @card: the card to which element belongs to + * @pucontrols: user-space pointer to struct snd_ctl_elem_values + * + * This function reads the value of controls with the given IDs + * of the same card + */ + +static int snd_ctl_elem_rw_user(struct snd_ctl_file *file, + struct snd_ctl_elem_value __user *_control, + bool write_flag) { struct snd_ctl_elem_value *control; - struct snd_card *card; int result; - + struct snd_card *card; control = memdup_user(_control, sizeof(*control)); if (IS_ERR(control)) return PTR_ERR(control); - card = file->card; snd_power_lock(card); result = snd_power_wait(card, SNDRV_CTL_POWER_D0); - if (result >= 0) - result = snd_ctl_elem_write(card, file, control); + if (result >= 0) { + if (write_flag == true) + result = snd_ctl_elem_write(card, file, control); + else + result = snd_ctl_elem_read(card, control); + } snd_power_unlock(card); if (result >= 0) if (copy_to_user(_control, control, sizeof(*control))) @@ -1514,9 +1507,9 @@ static long snd_ctl_ioctl(struct file *file, unsigned int cmd, unsigned long arg case SNDRV_CTL_IOCTL_ELEM_INFO: return snd_ctl_elem_info_user(ctl, argp); case SNDRV_CTL_IOCTL_ELEM_READ: - return snd_ctl_elem_read_user(card, argp); + return snd_ctl_elem_rw_user(ctl, argp, false); case SNDRV_CTL_IOCTL_ELEM_WRITE: - return snd_ctl_elem_write_user(ctl, argp); + return snd_ctl_elem_rw_user(ctl, argp, true); case SNDRV_CTL_IOCTL_ELEM_LOCK: return snd_ctl_elem_lock(ctl, argp); case SNDRV_CTL_IOCTL_ELEM_UNLOCK: -- 1.7.9.5

1 0

[alsa-devel] [PATCH 0/2] Add STM32 SAI support
by olivier moysan 01 Feb '17

01 Feb '17

This patch-set handles the Serial Audio Interface (SAI) IP on STM32 platforms. The SAI IP is composed of two Sub-block A and B. (see the figure below) Each sub-block makes use of individual and shared resources. Shared resources: - Reset line. Reset common and sub-block registers. - Bus interface clocks. This clock is not exposed in device as it it managed by clock driver, according to kernel clocks gating. - Common register. SAI IP exhibits a common configuration register to manage synchronization modes. NB: These modes are not yet implemented in this version of the SAI driver. - Interrupt. Sub-blocks have their own interrupt status registers but they share the same interrupt line. Individual resources: - Register set - DMA request line. - Communication interface. Each sub-block has its own GPIOs and associated bus lines. - Kernel clock. Each sub-block has its own dedicated clock for its communication interface. To reflect this architecture Sub-block A and B are handled by 2 child devices. Sub-block A and B devices can be configured independently either as transmitter or receiver. A PCM device is associated to each sub-block. A sub-block has to select the appropriated parent clock at runtime, depending on the audio stream sampling rate. Interface clock +--------------------------------+ +---------------> | SAI IP | Reset | +-----------------+ | +---------------> | |common registers | | | +-----------------+ | | | | +----------------------+ | | | Sub-block A | | Kernel clock A | | | | Bus A +--------------------> | +----------------+ +----------------> | | |A registers | | | | | +----------------+ | | | +----------------------+ | | | | +----------------------+ | | | Sub-block B | | Kernel clock B | | | | Bus B +--------------------> | +----------------+ +-----------------> | | |B registers | | | | | +----------------+ | | | +----------------------+ | | | +--------------------------------+ olivier moysan (2): ASoC: stm32: add bindings for SAI ASoC: stm32: add SAI driver .../devicetree/bindings/sound/st,stm32-sai.txt | 79 ++ sound/soc/Kconfig | 1 + sound/soc/Makefile | 1 + sound/soc/stm/Kconfig | 8 + sound/soc/stm/Makefile | 6 + sound/soc/stm/stm32_sai.c | 123 +++ sound/soc/stm/stm32_sai.h | 202 +++++ sound/soc/stm/stm32_sai_sub.c | 898 +++++++++++++++++++++ 8 files changed, 1318 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/st,stm32-sai.txt create mode 100644 sound/soc/stm/Kconfig create mode 100644 sound/soc/stm/Makefile create mode 100644 sound/soc/stm/stm32_sai.c create mode 100644 sound/soc/stm/stm32_sai.h create mode 100644 sound/soc/stm/stm32_sai_sub.c -- 1.9.1

2 4

[alsa-devel] [PATCH] ASoC: rt5670: add HS ground control
by Bard Liao 01 Feb '17

01 Feb '17

Some project use external circuit to prevent the headset ground noise. It will need to use GPIO to control it. Dell Wyse 3040 is the only project that has the external circuit so far and it uses GPIO2 for that. This patch provide the support fot it. Signed-off-by: Bard Liao <bardliao(a)realtek.com> --- include/sound/rt5670.h | 7 +++++ sound/soc/codecs/rt5670.c | 74 ++++++++++++++++++++++++++++++++++++++++++++++- 2 files changed, 80 insertions(+), 1 deletion(-) diff --git a/include/sound/rt5670.h b/include/sound/rt5670.h index b7d6051..0b445b0 100644 --- a/include/sound/rt5670.h +++ b/include/sound/rt5670.h @@ -11,12 +11,19 @@ #ifndef __LINUX_SND_RT5670_H #define __LINUX_SND_RT5670_H +enum rt5670_gpios { + RT5670_GPIO_NONE = 0, + RT5670_GPIO2, +}; + + struct rt5670_platform_data { int jd_mode; bool in2_diff; bool dev_gpio; bool dmic_en; + enum rt5670_gpios hs_ground_control_gpio; unsigned int dmic1_data_pin; /* 0 = GPIO6; 1 = IN2P; 3 = GPIO7*/ unsigned int dmic2_data_pin; diff --git a/sound/soc/codecs/rt5670.c b/sound/soc/codecs/rt5670.c index 97bafac..1d94cec 100644 --- a/sound/soc/codecs/rt5670.c +++ b/sound/soc/codecs/rt5670.c @@ -420,13 +420,15 @@ static int rt5670_headset_detect(struct snd_soc_codec *codec, int jack_insert) struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); if (jack_insert) { + if (rt5670->pdata.hs_ground_control_gpio) + snd_soc_dapm_force_enable_pin(dapm, "HS GND Control"); + snd_soc_dapm_force_enable_pin(dapm, "Mic Det Power"); snd_soc_dapm_sync(dapm); snd_soc_update_bits(codec, RT5670_GEN_CTRL3, 0x4, 0x0); snd_soc_update_bits(codec, RT5670_CJ_CTRL2, RT5670_CBJ_DET_MODE | RT5670_CBJ_MN_JD, RT5670_CBJ_MN_JD); - snd_soc_write(codec, RT5670_GPIO_CTRL2, 0x0004); snd_soc_update_bits(codec, RT5670_GPIO_CTRL1, RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_IRQ); snd_soc_update_bits(codec, RT5670_CJ_CTRL1, @@ -450,6 +452,10 @@ static int rt5670_headset_detect(struct snd_soc_codec *codec, int jack_insert) snd_soc_dapm_disable_pin(dapm, "Mic Det Power"); snd_soc_dapm_sync(dapm); } + if (rt5670->pdata.hs_ground_control_gpio) { + snd_soc_dapm_disable_pin(dapm, "HS GND Control"); + snd_soc_dapm_sync(dapm); + } } else { snd_soc_update_bits(codec, RT5670_INT_IRQ_ST, 0x8, 0x0); snd_soc_update_bits(codec, RT5670_GEN_CTRL3, 0x4, 0x4); @@ -1542,6 +1548,29 @@ static int rt5670_bst2_event(struct snd_soc_dapm_widget *w, return 0; } +static int rt5670_hs_ground_control_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + snd_soc_update_bits(codec, RT5670_GPIO_CTRL2, + RT5670_GP2_OUT_MASK, RT5670_GP2_OUT_HI); + break; + + case SND_SOC_DAPM_POST_PMD: + snd_soc_update_bits(codec, RT5670_GPIO_CTRL2, + RT5670_GP2_OUT_MASK, RT5670_GP2_OUT_LO); + break; + + default: + return 0; + } + + return 0; +} + static const struct snd_soc_dapm_widget rt5670_dapm_widgets[] = { SND_SOC_DAPM_SUPPLY("PLL1", RT5670_PWR_ANLG2, RT5670_PWR_PLL_BIT, 0, NULL, 0), @@ -1917,6 +1946,12 @@ static int rt5670_bst2_event(struct snd_soc_dapm_widget *w, SND_SOC_DAPM_OUTPUT("SPORN"), }; +static const struct snd_soc_dapm_widget hs_gnd_cnotrol_widgets[] = { + SND_SOC_DAPM_SUPPLY("HS GND Control", SND_SOC_NOPM, 0, 0, + rt5670_hs_ground_control_event, + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), +}; + static const struct snd_soc_dapm_route rt5670_dapm_routes[] = { { "ADC Stereo1 Filter", NULL, "ADC STO1 ASRC", is_using_asrc }, { "ADC Stereo2 Filter", NULL, "ADC STO2 ASRC", is_using_asrc }, @@ -2314,6 +2349,11 @@ static int rt5670_bst2_event(struct snd_soc_dapm_widget *w, { "SPORN", NULL, "SPO Amp" }, }; +static const struct snd_soc_dapm_route hs_gnd_cnotrol_routes[] = { + { "BST1", NULL, "HS GND Control" }, + { "HP Amp", NULL, "HS GND Control" }, +}; + static int rt5670_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) { @@ -2679,6 +2719,13 @@ static int rt5670_probe(struct snd_soc_codec *codec) "The driver is for RT5670 RT5671 or RT5672 only\n"); return -ENODEV; } + if (rt5670->pdata.hs_ground_control_gpio) { + snd_soc_dapm_new_controls(dapm, hs_gnd_cnotrol_widgets, + ARRAY_SIZE(hs_gnd_cnotrol_widgets)); + snd_soc_dapm_add_routes(dapm, hs_gnd_cnotrol_routes, + ARRAY_SIZE(hs_gnd_cnotrol_routes)); + } + rt5670->codec = codec; return 0; @@ -2827,6 +2874,10 @@ static int rt5670_resume(struct snd_soc_codec *codec) DMI_MATCH(DMI_BOARD_NAME, "Braswell CRB"), }, }, + {} +}; + +static const struct dmi_system_id dmi_platform_dell_wyse[] = { { .ident = "Dell Wyse 3040", .matches = { @@ -2861,6 +2912,12 @@ static int rt5670_i2c_probe(struct i2c_client *i2c, rt5670->pdata.dmic1_data_pin = RT5670_DMIC_DATA_IN2P; rt5670->pdata.dev_gpio = true; rt5670->pdata.jd_mode = 1; + rt5670->pdata.hs_ground_control_gpio = RT5670_GPIO_NONE; + } else if (dmi_check_system(dmi_platform_dell_wyse)) { + rt5670->pdata.dmic_en = false; + rt5670->pdata.dev_gpio = true; + rt5670->pdata.jd_mode = 1; + rt5670->pdata.hs_ground_control_gpio = RT5670_GPIO2; } rt5670->regmap = devm_regmap_init_i2c(i2c, &rt5670_regmap); @@ -2886,6 +2943,21 @@ static int rt5670_i2c_probe(struct i2c_client *i2c, regmap_write(rt5670->regmap, RT5670_RESET, 0); + switch (rt5670->pdata.hs_ground_control_gpio) { + case RT5670_GPIO_NONE: + break; + case RT5670_GPIO2: + regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2, + RT5670_GP2_PF_MASK | RT5670_GP2_OUT_MASK, + RT5670_GP2_PF_OUT | RT5670_GP2_OUT_LO); + break; + default: + rt5670->pdata.hs_ground_control_gpio = + RT5670_GPIO_NONE; + dev_warn(&i2c->dev, "Only Support GPIO2 currently\n"); + break; + } + regmap_read(rt5670->regmap, RT5670_VENDOR_ID, &val); if (val >= 4) regmap_write(rt5670->regmap, RT5670_GPIO_CTRL3, 0x0980); -- 1.8.1.1.439.g50a6b54

3 7

[alsa-devel] [PATCH v3 0/8] Add sun8i A33 audio driver
by Mylène Josserand 01 Feb '17

01 Feb '17

Hello everyone, This a V3 of my Allwinner A33 (sun8i) audio codec driver. Tested on linux-next-20170131 tag. Changes since V2: - Removed patches from v2 already merged: commit ebad64d193779 ("ASoC: sun4i-i2s: Increase DMA max burst to 8") commit 603a0c8af9cb2 ("clk: sunxi-ng: a33: Add CLK_SET_RATE_PARENT to ac-dig") - Removed "reset-names" from sun4i-i2s driver - Fixed the build warning from sun8i-codec - Fixed some various topics such as subject line for dt bindings patch, renamed the simple-card and disabled the simple-card. Changes since V1: - Remove the analog codec driver as a better version has been committed by Chen-Yu Tsai and is already merged. - Remove the audio-card as simple-card can be used - The DMA maxburst is set to 8 in the sun4i-i2s instead of adding the maxburst of 4 in Sun6i dma engine. - Create a new compatible for sun4i-i2s to handle the reset line. - Fix various problems in sun8i-codec driver according to V1's reviews - Add the pm_runtime hooks in sun8i-codec driver to prepare/ unprepare clocks. - Update the DTS according to Chen-Yu's analog codec driver. - Rename sun8i-codec's clocks to "bus" and "mod" - The first "delay" issue from V1 is fixed by using a delay when enabling the headphone amplifier to let the amplifier being up. Patches 1 and 2 add a new compatible "allwinner,sun6i-a31-i2s" to handle the reset line for sun4i-i2s driver. It uses a quirk to use a version with or without reset lines. Patch 3 adds the sun8i codec driver which represents the digital part of the A33 codec. It supports only playback features. Path 4 fixes the previous issue of a "first time delay" in V1 (see cover letter). Do not hesitate if you have comments on this patch. Patches 5 adds the dt-bindings documentation for new audio driver added in this serie (sun8i-codec). Patch 6 adds the cpu DAI, codec and audio nodes to sun8i-a33 device tree. Patches 7 and 8 enable the audio on Parrot and Sinlinx's boards. The DAI for this A33 codec is the same than for A20: "sun4i-i2s". Currently, the sun8i-a33 codec driver handles only the playback feature. The other ones (such as capture) and all other interfaces except headphone are not supported. I will send a patch to handle the capture with microphones in next few weeks. Examples of amixer commands: amixer set 'Headphone' 75% amixer set 'Headphone' on amixer set 'DAC' on amixer set 'Right DAC Mixer RSlot 0' on amixer set 'Left DAC Mixer LSlot 0' on It was tested on Parrot and Sinlinx boards. Let me know if you have any comments on this serie. Thank you in advance, Best regards, Mylène Josserand (8): ASoC: sun4i-i2s: Update binding documentation to include A31 ASoC: sun4i-i2s: Add quirks to handle a31 compatible ASoC: Add sun8i digital audio codec ASoC: sun8i-codec-analog: Add amplifier event to fix first delay ASoC: codecs: Add sun8i-a33 binding documentation ARM: dts: sun8i: Add audio codec, dai and card for A33 ARM: dts: sun8i: parrot: Enable audio nodes ARM: dts: sun8i: sinlinx: Enable audio nodes .../devicetree/bindings/sound/sun4i-i2s.txt | 5 + .../devicetree/bindings/sound/sun8i-a33-codec.txt | 75 ++++ arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts | 12 + arch/arm/boot/dts/sun8i-a33.dtsi | 45 ++ arch/arm/boot/dts/sun8i-r16-parrot.dts | 12 + sound/soc/sunxi/Kconfig | 11 + sound/soc/sunxi/Makefile | 1 + sound/soc/sunxi/sun4i-i2s.c | 57 ++- sound/soc/sunxi/sun8i-codec-analog.c | 30 +- sound/soc/sunxi/sun8i-codec.c | 499 +++++++++++++++++++++ 10 files changed, 743 insertions(+), 4 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/sun8i-a33-codec.txt create mode 100644 sound/soc/sunxi/sun8i-codec.c -- 2.11.0

5 21

[alsa-devel] [PATCH] ALSA: x86: hdmi: fix build with CONFIG_PM=n
by Arnd Bergmann 01 Feb '17

01 Feb '17

The runtime_status field is defined conditionally and must not be accessed outside of #ifdef CONFIG_PM: sound/x86/intel_hdmi_audio_if.c: In function 'hdmi_audio_suspend': sound/x86/intel_hdmi_audio_if.c:112:30: error: 'struct dev_pm_info' has no member named 'runtime_status' if (intelhaddata->dev->power.runtime_status != RPM_SUSPENDED) { pm_runtime_status_suspended() does what we need here. Fixes: 5dab11d89777 ("ALSA: x86: hdmi: Add audio support for BYT and CHT") Signed-off-by: Arnd Bergmann <arnd(a)arndb.de> --- sound/x86/intel_hdmi_audio_if.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/x86/intel_hdmi_audio_if.c b/sound/x86/intel_hdmi_audio_if.c index 9ae242d62eb2..99eecef87e62 100644 --- a/sound/x86/intel_hdmi_audio_if.c +++ b/sound/x86/intel_hdmi_audio_if.c @@ -109,7 +109,7 @@ int hdmi_audio_suspend(void *haddata, struct hdmi_audio_event event) had_stream = intelhaddata->private_data; substream = intelhaddata->stream_info.had_substream; - if (intelhaddata->dev->power.runtime_status != RPM_SUSPENDED) { + if (!pm_runtime_status_suspended(intelhaddata->dev)) { pr_err("audio stream is active\n"); return -EAGAIN; } -- 2.9.0

2 1

[alsa-devel] [PATCH] ASoC: bcm2835: Remove redundant channel checking code in hw_params
by Matt Flax 01 Feb '17

01 Feb '17

Due to channels_max and channels_min in the bcm2835_i2s_dai structure, the channel guard code in bcm2835_i2s_hw_params is redundant. The bcm2835_i2s_hw_params function checks that the channel count is 2 before continuing. This code never gets executed because core soc checks prevent the execution (upon channel mismatch) of the bcm2835_i2s_hw_params function. The redundancy has been tested and checked for the case when the bcm2835_i2s_dai structure has channels_max = 2 and a request for 8 channels has been made. The test has confirmed that the removed code is redundant as it never gets executed when a channel mismatch occurs. This redundant channel count check may seem like it will not cause any problems however some sound cards (such as the 8 channel AudioInjector Octo sound card) require the execution of the bcm2835_i2s_hw_params function when channels_max in the bcm2835_i2s_dai structure has been increased to 8. As the channel checking code in bcm2835_i2s_hw_params is redundant and stops certain cards from working it has been removed. Signed-off-by: Matt Flax <flatmax(a)flatmax.org> --- sound/soc/bcm/bcm2835-i2s.c | 12 +++--------- 1 file changed, 3 insertions(+), 9 deletions(-) diff --git a/sound/soc/bcm/bcm2835-i2s.c b/sound/soc/bcm/bcm2835-i2s.c index 6ba2049..1773b83 100644 --- a/sound/soc/bcm/bcm2835-i2s.c +++ b/sound/soc/bcm/bcm2835-i2s.c @@ -310,15 +310,9 @@ static int bcm2835_i2s_hw_params(struct snd_pcm_substream *substream, ch1pos = data_delay; ch2pos = bclk_ratio / 2 + data_delay; - switch (params_channels(params)) { - case 2: - format = BCM2835_I2S_CH1(format) | BCM2835_I2S_CH2(format); - format |= BCM2835_I2S_CH1(BCM2835_I2S_CHPOS(ch1pos)); - format |= BCM2835_I2S_CH2(BCM2835_I2S_CHPOS(ch2pos)); - break; - default: - return -EINVAL; - } + format = BCM2835_I2S_CH1(format) | BCM2835_I2S_CH2(format); + format |= BCM2835_I2S_CH1(BCM2835_I2S_CHPOS(ch1pos)); + format |= BCM2835_I2S_CH2(BCM2835_I2S_CHPOS(ch2pos)); /* * Set format for both streams. -- 2.7.4

2 5

[alsa-devel] [sound:topic/intel-lpe-audio-cleanup 12/49] htmldocs: drivers/gpu/drm/i915/intel_lpe_audio.c:337: warning: No description found for parameter 'pipe'
by kbuild test robot 01 Feb '17

01 Feb '17

tree: https://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound.git topic/intel-lpe-audio-cleanup head: 4d0f8298c72c6c084d5e62235f05d152d61e9bdc commit: 8e4d2c9fe684af0219d3a05d07460f1e881945b1 [12/49] drm/i915: Pass pipe to LPE audio notification reproduce: make htmldocs All warnings (new ones prefixed by >>): make[3]: warning: jobserver unavailable: using -j1. Add '+' to parent make rule. include/linux/init.h:1: warning: no structured comments found include/linux/kthread.h:26: warning: Excess function parameter '...' description in 'kthread_create' kernel/sys.c:1: warning: no structured comments found drivers/dma-buf/seqno-fence.c:1: warning: no structured comments found include/drm/drm_drv.h:409: warning: No description found for parameter 'load' include/drm/drm_drv.h:409: warning: No description found for parameter 'firstopen' include/drm/drm_drv.h:409: warning: No description found for parameter 'open' include/drm/drm_drv.h:409: warning: No description found for parameter 'preclose' include/drm/drm_drv.h:409: warning: No description found for parameter 'postclose' include/drm/drm_drv.h:409: warning: No description found for parameter 'lastclose' include/drm/drm_drv.h:409: warning: No description found for parameter 'unload' include/drm/drm_drv.h:409: warning: No description found for parameter 'dma_ioctl' include/drm/drm_drv.h:409: warning: No description found for parameter 'dma_quiescent' include/drm/drm_drv.h:409: warning: No description found for parameter 'context_dtor' include/drm/drm_drv.h:409: warning: No description found for parameter 'set_busid' include/drm/drm_drv.h:409: warning: No description found for parameter 'irq_handler' include/drm/drm_drv.h:409: warning: No description found for parameter 'irq_preinstall' include/drm/drm_drv.h:409: warning: No description found for parameter 'irq_postinstall' include/drm/drm_drv.h:409: warning: No description found for parameter 'irq_uninstall' include/drm/drm_drv.h:409: warning: No description found for parameter 'debugfs_init' include/drm/drm_drv.h:409: warning: No description found for parameter 'debugfs_cleanup' include/drm/drm_drv.h:409: warning: No description found for parameter 'gem_open_object' include/drm/drm_drv.h:409: warning: No description found for parameter 'gem_close_object' include/drm/drm_drv.h:409: warning: No description found for parameter 'prime_handle_to_fd' include/drm/drm_drv.h:409: warning: No description found for parameter 'prime_fd_to_handle' include/drm/drm_drv.h:409: warning: No description found for parameter 'gem_prime_export' include/drm/drm_drv.h:409: warning: No description found for parameter 'gem_prime_import' include/drm/drm_drv.h:409: warning: No description found for parameter 'gem_prime_pin' include/drm/drm_drv.h:409: warning: No description found for parameter 'gem_prime_unpin' include/drm/drm_drv.h:409: warning: No description found for parameter 'gem_prime_res_obj' include/drm/drm_drv.h:409: warning: No description found for parameter 'gem_prime_get_sg_table' include/drm/drm_drv.h:409: warning: No description found for parameter 'gem_prime_import_sg_table' include/drm/drm_drv.h:409: warning: No description found for parameter 'gem_prime_vmap' include/drm/drm_drv.h:409: warning: No description found for parameter 'gem_prime_vunmap' include/drm/drm_drv.h:409: warning: No description found for parameter 'gem_prime_mmap' include/drm/drm_drv.h:409: warning: No description found for parameter 'vgaarb_irq' include/drm/drm_drv.h:409: warning: No description found for parameter 'gem_vm_ops' include/drm/drm_drv.h:409: warning: No description found for parameter 'major' include/drm/drm_drv.h:409: warning: No description found for parameter 'minor' include/drm/drm_drv.h:409: warning: No description found for parameter 'patchlevel' include/drm/drm_drv.h:409: warning: No description found for parameter 'name' include/drm/drm_drv.h:409: warning: No description found for parameter 'desc' include/drm/drm_drv.h:409: warning: No description found for parameter 'date' include/drm/drm_drv.h:409: warning: No description found for parameter 'driver_features' include/drm/drm_drv.h:409: warning: No description found for parameter 'dev_priv_size' include/drm/drm_drv.h:409: warning: No description found for parameter 'ioctls' include/drm/drm_drv.h:409: warning: No description found for parameter 'num_ioctls' include/drm/drm_drv.h:409: warning: No description found for parameter 'fops' include/drm/drm_drv.h:409: warning: No description found for parameter 'legacy_dev_list' >> drivers/gpu/drm/i915/intel_lpe_audio.c:337: warning: No description found for parameter 'pipe' drivers/gpu/drm/i915/intel_lpe_audio.c:337: warning: No description found for parameter 'dp_output' drivers/gpu/drm/i915/intel_lpe_audio.c:337: warning: No description found for parameter 'link_rate' drivers/gpu/drm/i915/intel_lpe_audio.c:338: warning: No description found for parameter 'pipe' drivers/gpu/drm/i915/intel_lpe_audio.c:338: warning: No description found for parameter 'dp_output' drivers/gpu/drm/i915/intel_lpe_audio.c:338: warning: No description found for parameter 'link_rate' drivers/media/dvb-core/dvb_frontend.h:677: warning: No description found for parameter 'refcount' drivers/char/tpm/tpm_vtpm_proxy.c:73: warning: No description found for parameter 'filp' drivers/char/tpm/tpm_vtpm_proxy.c:73: warning: No description found for parameter 'buf' drivers/char/tpm/tpm_vtpm_proxy.c:73: warning: No description found for parameter 'count' drivers/char/tpm/tpm_vtpm_proxy.c:73: warning: No description found for parameter 'off' drivers/char/tpm/tpm_vtpm_proxy.c:123: warning: No description found for parameter 'filp' drivers/char/tpm/tpm_vtpm_proxy.c:123: warning: No description found for parameter 'buf' drivers/char/tpm/tpm_vtpm_proxy.c:123: warning: No description found for parameter 'count' drivers/char/tpm/tpm_vtpm_proxy.c:123: warning: No description found for parameter 'off' drivers/char/tpm/tpm_vtpm_proxy.c:203: warning: No description found for parameter 'proxy_dev' sound/soc/soc-core.c:994: warning: No description found for parameter 'stream_name' Documentation/core-api/assoc_array.rst:13: WARNING: Enumerated list ends without a blank line; unexpected unindent. Documentation/doc-guide/sphinx.rst:110: ERROR: Unknown target name: "sphinx c domain". include/net/cfg80211.h:3154: ERROR: Unexpected indentation. include/net/mac80211.h:3214: ERROR: Unexpected indentation. include/net/mac80211.h:3217: WARNING: Block quote ends without a blank line; unexpected unindent. include/net/mac80211.h:3219: ERROR: Unexpected indentation. include/net/mac80211.h:3220: WARNING: Block quote ends without a blank line; unexpected unindent. include/net/mac80211.h:1773: ERROR: Unexpected indentation. include/net/mac80211.h:1777: WARNING: Block quote ends without a blank line; unexpected unindent. kernel/sched/fair.c:7587: WARNING: Inline emphasis start-string without end-string. kernel/time/timer.c:1240: ERROR: Unexpected indentation. kernel/time/timer.c:1242: ERROR: Unexpected indentation. kernel/time/timer.c:1243: WARNING: Block quote ends without a blank line; unexpected unindent. include/linux/wait.h:121: WARNING: Block quote ends without a blank line; unexpected unindent. include/linux/wait.h:124: ERROR: Unexpected indentation. include/linux/wait.h:126: WARNING: Block quote ends without a blank line; unexpected unindent. kernel/time/hrtimer.c:1021: WARNING: Block quote ends without a blank line; unexpected unindent. kernel/signal.c:317: WARNING: Inline literal start-string without end-string. drivers/message/fusion/mptbase.c:5051: WARNING: Definition list ends without a blank line; unexpected unindent. drivers/tty/serial/serial_core.c:1897: WARNING: Definition list ends without a blank line; unexpected unindent. include/linux/spi/spi.h:369: ERROR: Unexpected indentation. drivers/usb/core/message.c:481: ERROR: Unexpected indentation. drivers/usb/core/message.c:482: WARNING: Block quote ends without a blank line; unexpected unindent. Documentation/driver-api/usb.rst:623: ERROR: Unknown target name: "usb_type". Documentation/driver-api/usb.rst:623: ERROR: Unknown target name: "usb_dir". Documentation/driver-api/usb.rst:623: ERROR: Unknown target name: "usb_recip". Documentation/driver-api/usb.rst:689: ERROR: Unknown target name: "usbdevfs_urb_type". sound/soc/soc-core.c:2508: ERROR: Unknown target name: "snd_soc_daifmt". sound/core/jack.c:312: ERROR: Unknown target name: "snd_jack_btn". Documentation/translations/ko_KR/howto.rst:293: WARNING: Inline emphasis start-string without end-string. WARNING: dvipng command 'dvipng' cannot be run (needed for math display), check the imgmath_dvipng setting vim +/pipe +337 drivers/gpu/drm/i915/intel_lpe_audio.c eef57324 Jerome Anand 2017-01-25 321 } 46d196ec Jerome Anand 2017-01-25 322 46d196ec Jerome Anand 2017-01-25 323 46d196ec Jerome Anand 2017-01-25 324 /** 46d196ec Jerome Anand 2017-01-25 325 * intel_lpe_audio_notify() - notify lpe audio event 46d196ec Jerome Anand 2017-01-25 326 * audio driver and i915 46d196ec Jerome Anand 2017-01-25 327 * @dev_priv: the i915 drm device private data 46d196ec Jerome Anand 2017-01-25 328 * @eld : ELD data 46d196ec Jerome Anand 2017-01-25 329 * @port: port id 46d196ec Jerome Anand 2017-01-25 330 * @tmds_clk_speed: tmds clock frequency in Hz 46d196ec Jerome Anand 2017-01-25 331 * 46d196ec Jerome Anand 2017-01-25 332 * Notify lpe audio driver of eld change. 46d196ec Jerome Anand 2017-01-25 333 */ 46d196ec Jerome Anand 2017-01-25 334 void intel_lpe_audio_notify(struct drm_i915_private *dev_priv, 8e4d2c9f Takashi Iwai 2017-01-31 335 void *eld, int port, int pipe, int tmds_clk_speed, 5114001f Pierre-Louis Bossart 2017-01-31 336 bool dp_output, int link_rate) 46d196ec Jerome Anand 2017-01-25 @337 { 46d196ec Jerome Anand 2017-01-25 338 unsigned long irq_flags; 46d196ec Jerome Anand 2017-01-25 339 struct intel_hdmi_lpe_audio_pdata *pdata = NULL; 2ca74624 Pierre-Louis Bossart 2017-01-31 340 u32 audio_enable; 2ca74624 Pierre-Louis Bossart 2017-01-31 341 i915_reg_t mmio; 46d196ec Jerome Anand 2017-01-25 342 46d196ec Jerome Anand 2017-01-25 343 if (!HAS_LPE_AUDIO(dev_priv)) 46d196ec Jerome Anand 2017-01-25 344 return; 46d196ec Jerome Anand 2017-01-25 345 :::::: The code at line 337 was first introduced by commit :::::: 46d196ec460b9c45ca225f815c0b05f9de67290d drm/i915: Add support for audio driver notifications :::::: TO: Jerome Anand <jerome.anand(a)intel.com> :::::: CC: Takashi Iwai <tiwai(a)suse.de> --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation

1 0

[alsa-devel] [PATCH] ASoC: Intel: Atom: Configure media_loop1 and sprot_loop in stereo
by Sebastien Guiriec 31 Jan '17

31 Jan '17

Most of the devices are using stereo speakers so media_loop1 and sprot_loop default mode should be stereo. As per default all the routing UCM configuration doesn't enable Post processing loops it is not impacting curent configurations. Signed-off-by: Sebastien Guiriec <sebastien.guiriec(a)intel.com> --- sound/soc/intel/atom/sst-atom-controls.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/intel/atom/sst-atom-controls.c b/sound/soc/intel/atom/sst-atom-controls.c index c7b3cbf..0ce1d18 100644 --- a/sound/soc/intel/atom/sst-atom-controls.c +++ b/sound/soc/intel/atom/sst-atom-controls.c @@ -1087,8 +1087,8 @@ static const struct snd_soc_dapm_widget sst_dapm_widgets[] = { SST_PATH_INPUT("sprot_loop_in", SST_TASK_SBA, SST_SWM_IN_SPROT_LOOP, NULL), SST_PATH_INPUT("media_loop1_in", SST_TASK_SBA, SST_SWM_IN_MEDIA_LOOP1, NULL), SST_PATH_INPUT("media_loop2_in", SST_TASK_SBA, SST_SWM_IN_MEDIA_LOOP2, NULL), - SST_PATH_MEDIA_LOOP_OUTPUT("sprot_loop_out", SST_TASK_SBA, SST_SWM_OUT_SPROT_LOOP, SST_FMT_MONO, sst_set_media_loop), - SST_PATH_MEDIA_LOOP_OUTPUT("media_loop1_out", SST_TASK_SBA, SST_SWM_OUT_MEDIA_LOOP1, SST_FMT_MONO, sst_set_media_loop), + SST_PATH_MEDIA_LOOP_OUTPUT("sprot_loop_out", SST_TASK_SBA, SST_SWM_OUT_SPROT_LOOP, SST_FMT_STEREO, sst_set_media_loop), + SST_PATH_MEDIA_LOOP_OUTPUT("media_loop1_out", SST_TASK_SBA, SST_SWM_OUT_MEDIA_LOOP1, SST_FMT_STEREO, sst_set_media_loop), SST_PATH_MEDIA_LOOP_OUTPUT("media_loop2_out", SST_TASK_SBA, SST_SWM_OUT_MEDIA_LOOP2, SST_FMT_STEREO, sst_set_media_loop), /* Media Mixers */ -- 2.9.3 --------------------------------------------------------------------- Intel Corporation SAS (French simplified joint stock company) Registered headquarters: "Les Montalets"- 2, rue de Paris, 92196 Meudon Cedex, France Registration Number: 302 456 199 R.C.S. NANTERRE Capital: 4,572,000 Euros This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). Any review or distribution by others is strictly prohibited. If you are not the intended recipient, please contact the sender and delete all copies.

3 2

[alsa-devel] [PATCH 00/17] Baytrail/Cherrytrail audio fixes
by Pierre-Louis Bossart 31 Jan '17

31 Jan '17

Set of patches to correct issues with machine drivers (suspend, DAI configuration), add missing HID reported in Bugzilla and add playback support for Asus T100HA and Asus X205TA based on RT5645 (capture and jack detection still work-in-progress) Alexandrov Stansilav (2): ASoC: rt5640: Add "10EC3276" ACPI ID ASoC: Intel: Atom: Add HP Pavilion x2 10-p000 machine entry Pierre-Louis Bossart (15): ASoC: Intel: atom: fix frame polarity ASoC: Intel: boards: remove .pm_ops in all Atom/DPCM machine drivers ASoC: Intel: add support for Realtek 5651 on Cherrytrail ASoC: codecs: rt5670: add quirk for Lenovo Thinkpad 10 ASoC: Intel: Baytrail: add quirk for Lenovo Thinkpad 10 ASoC: rt5645: add support for RT5648 ASoc: rt5645: add ACPI ID 10EC3270 ASoC: Intel: cht_bsw_rt5645: add Baytrail MCLK support ASoC: Intel: Atom: add machine driver for baytrail-rt5645 hardware ASoC: Intel: add support for ALC3270 codec ASoC: Intel: cht_bsw_rt5645: harden ACPI device detection ASoC: rt5645: fix error handling for gpio detection ASoC: Intel: cht-bsw-rt5645: add quirks for SSP0/AIF1/AIF2 routing ASoC: Intel: cht-bsw-rt5645: select ASRC source based on routing quirk ASoC: Intel: cht-bsw-rt5645: fix DAI formats sound/soc/codecs/rt5640.c | 1 + sound/soc/codecs/rt5645.c | 5 +- sound/soc/codecs/rt5670.c | 1 + sound/soc/intel/atom/sst-atom-controls.c | 6 +- sound/soc/intel/atom/sst/sst_acpi.c | 52 +++- sound/soc/intel/boards/bytcr_rt5640.c | 5 +- sound/soc/intel/boards/bytcr_rt5651.c | 3 +- sound/soc/intel/boards/cht_bsw_rt5645.c | 396 +++++++++++++++++++++++++++---- 8 files changed, 409 insertions(+), 60 deletions(-) -- 2.7.4

2 33

[alsa-devel] [PATCH v2 0/2] ASoC: Add support for rt5640 sound card found on HP Pavilion x2 10-p000 tablet.
by Alexandrov Stansilav 31 Jan '17

31 Jan '17

Inside DSDT table there is record for this soundcard: Device (RTKC) { Name (_ADR, Zero) // _ADR: Address Name (_HID, "10EC3276") // _HID: Hardware ID Name (_CID, "10EC3276") // _CID: Compatible ID Name (_DDN, "ALC3276") // _DDN: DOS Device Name Name (_SUB, "103C827C") // _SUB: Subsystem ID Name (_PR0, Package (0x01) // _PR0: Power Resources for D0 original bugreport: https://bugzilla.kernel.org/show_bug.cgi?id=187621 v2: Splited patch to codec and sst parts sound/soc/codecs/rt5640.c | 1 + sound/soc/intel/atom/sst/sst_acpi.c | 2 ++ 2 files changed, 3 insertions(+) -- 2.10.2

5 8

[alsa-devel] [PATCH] ASoC: mt8173-max98090: remove the call to snd_soc_jack_add_pins.
by Enric Balletbo i Serra 31 Jan '17

31 Jan '17

The snd_soc_card_jack_new function can call snd_soc_jack_add_pins for you, so pass directly the pins struct when you create the new jack. Signed-off-by: Enric Balletbo i Serra <enric.balletbo(a)collabora.com> --- sound/soc/mediatek/mt8173/mt8173-max98090.c | 14 ++++---------- 1 file changed, 4 insertions(+), 10 deletions(-) diff --git a/sound/soc/mediatek/mt8173/mt8173-max98090.c b/sound/soc/mediatek/mt8173/mt8173-max98090.c index 5524a2c..46c8e6a 100644 --- a/sound/soc/mediatek/mt8173/mt8173-max98090.c +++ b/sound/soc/mediatek/mt8173/mt8173-max98090.c @@ -79,17 +79,11 @@ static int mt8173_max98090_init(struct snd_soc_pcm_runtime *runtime) /* enable jack detection */ ret = snd_soc_card_jack_new(card, "Headphone", SND_JACK_HEADPHONE, - &mt8173_max98090_jack, NULL, 0); + &mt8173_max98090_jack, + mt8173_max98090_jack_pins, + ARRAY_SIZE(mt8173_max98090_jack_pins)); if (ret) { - dev_err(card->dev, "Can't snd_soc_jack_new %d\n", ret); - return ret; - } - - ret = snd_soc_jack_add_pins(&mt8173_max98090_jack, - ARRAY_SIZE(mt8173_max98090_jack_pins), - mt8173_max98090_jack_pins); - if (ret) { - dev_err(card->dev, "Can't snd_soc_jack_add_pins %d\n", ret); + dev_err(card->dev, "Can't create a new Jack %d\n", ret); return ret; } -- 2.9.3

2 1

[alsa-devel] [PATCH] ASoC: wm8741: Remove unused WM8741_NUM_RATES macro
by Sergej Sawazki 31 Jan '17

31 Jan '17

This macro is unused since commit e369bd006fd6 ("ASoC: wm8741: Allow master clock switching"). Signed-off-by: Sergej Sawazki <ce3a(a)gmx.de> --- sound/soc/codecs/wm8741.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/sound/soc/codecs/wm8741.c b/sound/soc/codecs/wm8741.c index 565d477..b8c1940 100644 --- a/sound/soc/codecs/wm8741.c +++ b/sound/soc/codecs/wm8741.c @@ -37,8 +37,6 @@ static const char *wm8741_supply_names[WM8741_NUM_SUPPLIES] = { "DVDD", }; -#define WM8741_NUM_RATES 6 - /* codec private data */ struct wm8741_priv { struct wm8741_platform_data pdata; -- 2.7.4

3 2

[alsa-devel] Applied "ASoC: qcom: lpass-cpu: Remove unnecessary clock checks" to the asoc tree
by Mark Brown 31 Jan '17

31 Jan '17

The patch ASoC: qcom: lpass-cpu: Remove unnecessary clock checks has been applied to the asoc tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From 46dccc3573bc69e13fb5ea3d14dea2e940b3a1a9 Mon Sep 17 00:00:00 2001 From: Bjorn Andersson <bjorn.andersson(a)linaro.org> Date: Mon, 30 Jan 2017 13:03:36 -0800 Subject: [PATCH] ASoC: qcom: lpass-cpu: Remove unnecessary clock checks Clean up the clock calling code by removing numerous IS_ERR() checks by just assigning the clock NULL; as this turn all used functions in the clk API to nops. Also include the word "optional" in the error message when failing to acquire the optional osr clocks. Signed-off-by: Bjorn Andersson <bjorn.andersson(a)linaro.org> Signed-off-by: Mark Brown <broonie(a)kernel.org> --- sound/soc/qcom/lpass-cpu.c | 27 ++++++++++----------------- 1 file changed, 10 insertions(+), 17 deletions(-) diff --git a/sound/soc/qcom/lpass-cpu.c b/sound/soc/qcom/lpass-cpu.c index eff3f9a8b685..1b912a9bb791 100644 --- a/sound/soc/qcom/lpass-cpu.c +++ b/sound/soc/qcom/lpass-cpu.c @@ -33,9 +33,6 @@ static int lpass_cpu_daiops_set_sysclk(struct snd_soc_dai *dai, int clk_id, struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai); int ret; - if (IS_ERR(drvdata->mi2s_osr_clk[dai->driver->id])) - return 0; - ret = clk_set_rate(drvdata->mi2s_osr_clk[dai->driver->id], freq); if (ret) dev_err(dai->dev, "%s() error setting mi2s osrclk to %u: %d\n", @@ -50,23 +47,18 @@ static int lpass_cpu_daiops_startup(struct snd_pcm_substream *substream, struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai); int ret; - if (!IS_ERR(drvdata->mi2s_osr_clk[dai->driver->id])) { - ret = clk_prepare_enable( - drvdata->mi2s_osr_clk[dai->driver->id]); - if (ret) { - dev_err(dai->dev, "%s() error in enabling mi2s osr clk: %d\n", - __func__, ret); - return ret; - } + ret = clk_prepare_enable(drvdata->mi2s_osr_clk[dai->driver->id]); + if (ret) { + dev_err(dai->dev, "%s() error in enabling mi2s osr clk: %d\n", + __func__, ret); + return ret; } ret = clk_prepare_enable(drvdata->mi2s_bit_clk[dai->driver->id]); if (ret) { dev_err(dai->dev, "%s() error in enabling mi2s bit clk: %d\n", __func__, ret); - if (!IS_ERR(drvdata->mi2s_osr_clk[dai->driver->id])) - clk_disable_unprepare( - drvdata->mi2s_osr_clk[dai->driver->id]); + clk_disable_unprepare(drvdata->mi2s_osr_clk[dai->driver->id]); return ret; } @@ -80,8 +72,7 @@ static void lpass_cpu_daiops_shutdown(struct snd_pcm_substream *substream, clk_disable_unprepare(drvdata->mi2s_bit_clk[dai->driver->id]); - if (!IS_ERR(drvdata->mi2s_osr_clk[dai->driver->id])) - clk_disable_unprepare(drvdata->mi2s_osr_clk[dai->driver->id]); + clk_disable_unprepare(drvdata->mi2s_osr_clk[dai->driver->id]); } static int lpass_cpu_daiops_hw_params(struct snd_pcm_substream *substream, @@ -505,9 +496,11 @@ int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev) clk_name); if (IS_ERR(drvdata->mi2s_osr_clk[dai_id])) { dev_warn(&pdev->dev, - "%s() error getting mi2s-osr-clk: %ld\n", + "%s() error getting optional mi2s-osr-clk: %ld\n", __func__, PTR_ERR(drvdata->mi2s_osr_clk[dai_id])); + + drvdata->mi2s_osr_clk[dai_id] = NULL; } if (variant->num_dai > 1) -- 2.11.0

1 0

[alsa-devel] Applied "ASoC: qcom: Drop __func__ usage from log prints" to the asoc tree
by Mark Brown 31 Jan '17

31 Jan '17

The patch ASoC: qcom: Drop __func__ usage from log prints has been applied to the asoc tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From b6e643adfd68258e16babaf36353c9668384350f Mon Sep 17 00:00:00 2001 From: Bjorn Andersson <bjorn.andersson(a)linaro.org> Date: Mon, 30 Jan 2017 13:03:37 -0800 Subject: [PATCH] ASoC: qcom: Drop __func__ usage from log prints The combination of dev_err() and __func__ make most of these log prints over 100 chars long. Remove the usage of __func__ to clean the kernel log and as the usage is not necessary to identify the individual log prints. Signed-off-by: Bjorn Andersson <bjorn.andersson(a)linaro.org> Signed-off-by: Mark Brown <broonie(a)kernel.org> --- sound/soc/qcom/lpass-apq8016.c | 15 +++--- sound/soc/qcom/lpass-cpu.c | 86 ++++++++++++++------------------ sound/soc/qcom/lpass-platform.c | 106 ++++++++++++++++++++-------------------- sound/soc/qcom/storm.c | 22 +++------ 4 files changed, 103 insertions(+), 126 deletions(-) diff --git a/sound/soc/qcom/lpass-apq8016.c b/sound/soc/qcom/lpass-apq8016.c index 3eef0c37ba50..8aed72be3224 100644 --- a/sound/soc/qcom/lpass-apq8016.c +++ b/sound/soc/qcom/lpass-apq8016.c @@ -175,29 +175,28 @@ static int apq8016_lpass_init(struct platform_device *pdev) drvdata->pcnoc_mport_clk = devm_clk_get(dev, "pcnoc-mport-clk"); if (IS_ERR(drvdata->pcnoc_mport_clk)) { - dev_err(&pdev->dev, "%s() error getting pcnoc-mport-clk: %ld\n", - __func__, PTR_ERR(drvdata->pcnoc_mport_clk)); + dev_err(&pdev->dev, "error getting pcnoc-mport-clk: %ld\n", + PTR_ERR(drvdata->pcnoc_mport_clk)); return PTR_ERR(drvdata->pcnoc_mport_clk); } ret = clk_prepare_enable(drvdata->pcnoc_mport_clk); if (ret) { - dev_err(&pdev->dev, "%s() Error enabling pcnoc-mport-clk: %d\n", - __func__, ret); + dev_err(&pdev->dev, "Error enabling pcnoc-mport-clk: %d\n", + ret); return ret; } drvdata->pcnoc_sway_clk = devm_clk_get(dev, "pcnoc-sway-clk"); if (IS_ERR(drvdata->pcnoc_sway_clk)) { - dev_err(&pdev->dev, "%s() error getting pcnoc-sway-clk: %ld\n", - __func__, PTR_ERR(drvdata->pcnoc_sway_clk)); + dev_err(&pdev->dev, "error getting pcnoc-sway-clk: %ld\n", + PTR_ERR(drvdata->pcnoc_sway_clk)); return PTR_ERR(drvdata->pcnoc_sway_clk); } ret = clk_prepare_enable(drvdata->pcnoc_sway_clk); if (ret) { - dev_err(&pdev->dev, "%s() Error enabling pcnoc_sway_clk: %d\n", - __func__, ret); + dev_err(&pdev->dev, "Error enabling pcnoc_sway_clk: %d\n", ret); return ret; } diff --git a/sound/soc/qcom/lpass-cpu.c b/sound/soc/qcom/lpass-cpu.c index 1b912a9bb791..5202a584e0c6 100644 --- a/sound/soc/qcom/lpass-cpu.c +++ b/sound/soc/qcom/lpass-cpu.c @@ -35,8 +35,8 @@ static int lpass_cpu_daiops_set_sysclk(struct snd_soc_dai *dai, int clk_id, ret = clk_set_rate(drvdata->mi2s_osr_clk[dai->driver->id], freq); if (ret) - dev_err(dai->dev, "%s() error setting mi2s osrclk to %u: %d\n", - __func__, freq, ret); + dev_err(dai->dev, "error setting mi2s osrclk to %u: %d\n", + freq, ret); return ret; } @@ -49,15 +49,13 @@ static int lpass_cpu_daiops_startup(struct snd_pcm_substream *substream, ret = clk_prepare_enable(drvdata->mi2s_osr_clk[dai->driver->id]); if (ret) { - dev_err(dai->dev, "%s() error in enabling mi2s osr clk: %d\n", - __func__, ret); + dev_err(dai->dev, "error in enabling mi2s osr clk: %d\n", ret); return ret; } ret = clk_prepare_enable(drvdata->mi2s_bit_clk[dai->driver->id]); if (ret) { - dev_err(dai->dev, "%s() error in enabling mi2s bit clk: %d\n", - __func__, ret); + dev_err(dai->dev, "error in enabling mi2s bit clk: %d\n", ret); clk_disable_unprepare(drvdata->mi2s_osr_clk[dai->driver->id]); return ret; } @@ -87,8 +85,7 @@ static int lpass_cpu_daiops_hw_params(struct snd_pcm_substream *substream, bitwidth = snd_pcm_format_width(format); if (bitwidth < 0) { - dev_err(dai->dev, "%s() invalid bit width given: %d\n", - __func__, bitwidth); + dev_err(dai->dev, "invalid bit width given: %d\n", bitwidth); return bitwidth; } @@ -106,8 +103,7 @@ static int lpass_cpu_daiops_hw_params(struct snd_pcm_substream *substream, regval |= LPAIF_I2SCTL_BITWIDTH_32; break; default: - dev_err(dai->dev, "%s() invalid bitwidth given: %d\n", - __func__, bitwidth); + dev_err(dai->dev, "invalid bitwidth given: %d\n", bitwidth); return -EINVAL; } @@ -134,8 +130,8 @@ static int lpass_cpu_daiops_hw_params(struct snd_pcm_substream *substream, regval |= LPAIF_I2SCTL_SPKMONO_STEREO; break; default: - dev_err(dai->dev, "%s() invalid channels given: %u\n", - __func__, channels); + dev_err(dai->dev, "invalid channels given: %u\n", + channels); return -EINVAL; } } else { @@ -161,8 +157,8 @@ static int lpass_cpu_daiops_hw_params(struct snd_pcm_substream *substream, regval |= LPAIF_I2SCTL_MICMONO_STEREO; break; default: - dev_err(dai->dev, "%s() invalid channels given: %u\n", - __func__, channels); + dev_err(dai->dev, "invalid channels given: %u\n", + channels); return -EINVAL; } } @@ -171,16 +167,15 @@ static int lpass_cpu_daiops_hw_params(struct snd_pcm_substream *substream, LPAIF_I2SCTL_REG(drvdata->variant, dai->driver->id), regval); if (ret) { - dev_err(dai->dev, "%s() error writing to i2sctl reg: %d\n", - __func__, ret); + dev_err(dai->dev, "error writing to i2sctl reg: %d\n", ret); return ret; } ret = clk_set_rate(drvdata->mi2s_bit_clk[dai->driver->id], rate * bitwidth * 2); if (ret) { - dev_err(dai->dev, "%s() error setting mi2s bitclk to %u: %d\n", - __func__, rate * bitwidth * 2, ret); + dev_err(dai->dev, "error setting mi2s bitclk to %u: %d\n", + rate * bitwidth * 2, ret); return ret; } @@ -197,8 +192,7 @@ static int lpass_cpu_daiops_hw_free(struct snd_pcm_substream *substream, LPAIF_I2SCTL_REG(drvdata->variant, dai->driver->id), 0); if (ret) - dev_err(dai->dev, "%s() error writing to i2sctl reg: %d\n", - __func__, ret); + dev_err(dai->dev, "error writing to i2sctl reg: %d\n", ret); return ret; } @@ -222,8 +216,7 @@ static int lpass_cpu_daiops_prepare(struct snd_pcm_substream *substream, LPAIF_I2SCTL_REG(drvdata->variant, dai->driver->id), mask, val); if (ret) - dev_err(dai->dev, "%s() error writing to i2sctl reg: %d\n", - __func__, ret); + dev_err(dai->dev, "error writing to i2sctl reg: %d\n", ret); return ret; } @@ -252,8 +245,8 @@ static int lpass_cpu_daiops_trigger(struct snd_pcm_substream *substream, dai->driver->id), mask, val); if (ret) - dev_err(dai->dev, "%s() error writing to i2sctl reg: %d\n", - __func__, ret); + dev_err(dai->dev, "error writing to i2sctl reg: %d\n", + ret); break; case SNDRV_PCM_TRIGGER_STOP: case SNDRV_PCM_TRIGGER_SUSPEND: @@ -271,8 +264,8 @@ static int lpass_cpu_daiops_trigger(struct snd_pcm_substream *substream, dai->driver->id), mask, val); if (ret) - dev_err(dai->dev, "%s() error writing to i2sctl reg: %d\n", - __func__, ret); + dev_err(dai->dev, "error writing to i2sctl reg: %d\n", + ret); break; } @@ -299,8 +292,7 @@ int asoc_qcom_lpass_cpu_dai_probe(struct snd_soc_dai *dai) ret = regmap_write(drvdata->lpaif_map, LPAIF_I2SCTL_REG(drvdata->variant, dai->driver->id), 0); if (ret) - dev_err(dai->dev, "%s() error writing to i2sctl reg: %d\n", - __func__, ret); + dev_err(dai->dev, "error writing to i2sctl reg: %d\n", ret); return ret; } @@ -442,8 +434,7 @@ int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev) dsp_of_node = of_parse_phandle(pdev->dev.of_node, "qcom,adsp", 0); if (dsp_of_node) { - dev_err(&pdev->dev, "%s() DSP exists and holds audio resources\n", - __func__); + dev_err(&pdev->dev, "DSP exists and holds audio resources\n"); return -EBUSY; } @@ -464,8 +455,7 @@ int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev) drvdata->lpaif = devm_ioremap_resource(&pdev->dev, res); if (IS_ERR((void const __force *)drvdata->lpaif)) { - dev_err(&pdev->dev, "%s() error mapping reg resource: %ld\n", - __func__, + dev_err(&pdev->dev, "error mapping reg resource: %ld\n", PTR_ERR((void const __force *)drvdata->lpaif)); return PTR_ERR((void const __force *)drvdata->lpaif); } @@ -477,8 +467,8 @@ int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev) drvdata->lpaif_map = devm_regmap_init_mmio(&pdev->dev, drvdata->lpaif, &lpass_cpu_regmap_config); if (IS_ERR(drvdata->lpaif_map)) { - dev_err(&pdev->dev, "%s() error initializing regmap: %ld\n", - __func__, PTR_ERR(drvdata->lpaif_map)); + dev_err(&pdev->dev, "error initializing regmap: %ld\n", + PTR_ERR(drvdata->lpaif_map)); return PTR_ERR(drvdata->lpaif_map); } @@ -496,8 +486,7 @@ int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev) clk_name); if (IS_ERR(drvdata->mi2s_osr_clk[dai_id])) { dev_warn(&pdev->dev, - "%s() error getting optional mi2s-osr-clk: %ld\n", - __func__, + "error getting optional mi2s-osr-clk: %ld\n", PTR_ERR(drvdata->mi2s_osr_clk[dai_id])); drvdata->mi2s_osr_clk[dai_id] = NULL; @@ -512,8 +501,7 @@ int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev) clk_name); if (IS_ERR(drvdata->mi2s_bit_clk[dai_id])) { dev_err(&pdev->dev, - "%s() error getting mi2s-bit-clk: %ld\n", - __func__, + "error getting mi2s-bit-clk: %ld\n", PTR_ERR(drvdata->mi2s_bit_clk[dai_id])); return PTR_ERR(drvdata->mi2s_bit_clk[dai_id]); } @@ -521,24 +509,23 @@ int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev) drvdata->ahbix_clk = devm_clk_get(&pdev->dev, "ahbix-clk"); if (IS_ERR(drvdata->ahbix_clk)) { - dev_err(&pdev->dev, "%s() error getting ahbix-clk: %ld\n", - __func__, PTR_ERR(drvdata->ahbix_clk)); + dev_err(&pdev->dev, "error getting ahbix-clk: %ld\n", + PTR_ERR(drvdata->ahbix_clk)); return PTR_ERR(drvdata->ahbix_clk); } ret = clk_set_rate(drvdata->ahbix_clk, LPASS_AHBIX_CLOCK_FREQUENCY); if (ret) { - dev_err(&pdev->dev, "%s() error setting rate on ahbix_clk: %d\n", - __func__, ret); + dev_err(&pdev->dev, "error setting rate on ahbix_clk: %d\n", + ret); return ret; } - dev_dbg(&pdev->dev, "%s() set ahbix_clk rate to %lu\n", __func__, - clk_get_rate(drvdata->ahbix_clk)); + dev_dbg(&pdev->dev, "set ahbix_clk rate to %lu\n", + clk_get_rate(drvdata->ahbix_clk)); ret = clk_prepare_enable(drvdata->ahbix_clk); if (ret) { - dev_err(&pdev->dev, "%s() error enabling ahbix_clk: %d\n", - __func__, ret); + dev_err(&pdev->dev, "error enabling ahbix_clk: %d\n", ret); return ret; } @@ -547,15 +534,14 @@ int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev) variant->dai_driver, variant->num_dai); if (ret) { - dev_err(&pdev->dev, "%s() error registering cpu driver: %d\n", - __func__, ret); + dev_err(&pdev->dev, "error registering cpu driver: %d\n", ret); goto err_clk; } ret = asoc_qcom_lpass_platform_register(pdev); if (ret) { - dev_err(&pdev->dev, "%s() error registering platform driver: %d\n", - __func__, ret); + dev_err(&pdev->dev, "error registering platform driver: %d\n", + ret); goto err_clk; } diff --git a/sound/soc/qcom/lpass-platform.c b/sound/soc/qcom/lpass-platform.c index dd5bdd0da730..7aabf08de3d4 100644 --- a/sound/soc/qcom/lpass-platform.c +++ b/sound/soc/qcom/lpass-platform.c @@ -89,8 +89,7 @@ static int lpass_platform_pcmops_open(struct snd_pcm_substream *substream) LPAIF_DMACTL_REG(v, dma_ch, dir), 0); if (ret) { dev_err(soc_runtime->dev, - "%s() error writing to rdmactl reg: %d\n", - __func__, ret); + "error writing to rdmactl reg: %d\n", ret); return ret; } @@ -103,8 +102,8 @@ static int lpass_platform_pcmops_open(struct snd_pcm_substream *substream) ret = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS); if (ret < 0) { - dev_err(soc_runtime->dev, "%s() setting constraints failed: %d\n", - __func__, ret); + dev_err(soc_runtime->dev, "setting constraints failed: %d\n", + ret); return -EINVAL; } @@ -151,8 +150,8 @@ static int lpass_platform_pcmops_hw_params(struct snd_pcm_substream *substream, bitwidth = snd_pcm_format_width(format); if (bitwidth < 0) { - dev_err(soc_runtime->dev, "%s() invalid bit width given: %d\n", - __func__, bitwidth); + dev_err(soc_runtime->dev, "invalid bit width given: %d\n", + bitwidth); return bitwidth; } @@ -177,8 +176,9 @@ static int lpass_platform_pcmops_hw_params(struct snd_pcm_substream *substream, regval |= LPAIF_DMACTL_WPSCNT_FOUR; break; default: - dev_err(soc_runtime->dev, "%s() invalid PCM config given: bw=%d, ch=%u\n", - __func__, bitwidth, channels); + dev_err(soc_runtime->dev, + "invalid PCM config given: bw=%d, ch=%u\n", + bitwidth, channels); return -EINVAL; } break; @@ -201,22 +201,23 @@ static int lpass_platform_pcmops_hw_params(struct snd_pcm_substream *substream, regval |= LPAIF_DMACTL_WPSCNT_EIGHT; break; default: - dev_err(soc_runtime->dev, "%s() invalid PCM config given: bw=%d, ch=%u\n", - __func__, bitwidth, channels); + dev_err(soc_runtime->dev, + "invalid PCM config given: bw=%d, ch=%u\n", + bitwidth, channels); return -EINVAL; } break; default: - dev_err(soc_runtime->dev, "%s() invalid PCM config given: bw=%d, ch=%u\n", - __func__, bitwidth, channels); + dev_err(soc_runtime->dev, "invalid PCM config given: bw=%d, ch=%u\n", + bitwidth, channels); return -EINVAL; } ret = regmap_write(drvdata->lpaif_map, LPAIF_DMACTL_REG(v, ch, dir), regval); if (ret) { - dev_err(soc_runtime->dev, "%s() error writing to rdmactl reg: %d\n", - __func__, ret); + dev_err(soc_runtime->dev, "error writing to rdmactl reg: %d\n", + ret); return ret; } @@ -237,8 +238,8 @@ static int lpass_platform_pcmops_hw_free(struct snd_pcm_substream *substream) reg = LPAIF_DMACTL_REG(v, pcm_data->dma_ch, substream->stream); ret = regmap_write(drvdata->lpaif_map, reg, 0); if (ret) - dev_err(soc_runtime->dev, "%s() error writing to rdmactl reg: %d\n", - __func__, ret); + dev_err(soc_runtime->dev, "error writing to rdmactl reg: %d\n", + ret); return ret; } @@ -260,8 +261,8 @@ static int lpass_platform_pcmops_prepare(struct snd_pcm_substream *substream) LPAIF_DMABASE_REG(v, ch, dir), runtime->dma_addr); if (ret) { - dev_err(soc_runtime->dev, "%s() error writing to rdmabase reg: %d\n", - __func__, ret); + dev_err(soc_runtime->dev, "error writing to rdmabase reg: %d\n", + ret); return ret; } @@ -269,8 +270,8 @@ static int lpass_platform_pcmops_prepare(struct snd_pcm_substream *substream) LPAIF_DMABUFF_REG(v, ch, dir), (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1); if (ret) { - dev_err(soc_runtime->dev, "%s() error writing to rdmabuff reg: %d\n", - __func__, ret); + dev_err(soc_runtime->dev, "error writing to rdmabuff reg: %d\n", + ret); return ret; } @@ -278,8 +279,8 @@ static int lpass_platform_pcmops_prepare(struct snd_pcm_substream *substream) LPAIF_DMAPER_REG(v, ch, dir), (snd_pcm_lib_period_bytes(substream) >> 2) - 1); if (ret) { - dev_err(soc_runtime->dev, "%s() error writing to rdmaper reg: %d\n", - __func__, ret); + dev_err(soc_runtime->dev, "error writing to rdmaper reg: %d\n", + ret); return ret; } @@ -287,8 +288,8 @@ static int lpass_platform_pcmops_prepare(struct snd_pcm_substream *substream) LPAIF_DMACTL_REG(v, ch, dir), LPAIF_DMACTL_ENABLE_MASK, LPAIF_DMACTL_ENABLE_ON); if (ret) { - dev_err(soc_runtime->dev, "%s() error writing to rdmactl reg: %d\n", - __func__, ret); + dev_err(soc_runtime->dev, "error writing to rdmactl reg: %d\n", + ret); return ret; } @@ -317,8 +318,8 @@ static int lpass_platform_pcmops_trigger(struct snd_pcm_substream *substream, LPAIF_IRQCLEAR_REG(v, LPAIF_IRQ_PORT_HOST), LPAIF_IRQ_ALL(ch)); if (ret) { - dev_err(soc_runtime->dev, "%s() error writing to irqclear reg: %d\n", - __func__, ret); + dev_err(soc_runtime->dev, + "error writing to irqclear reg: %d\n", ret); return ret; } @@ -327,8 +328,8 @@ static int lpass_platform_pcmops_trigger(struct snd_pcm_substream *substream, LPAIF_IRQ_ALL(ch), LPAIF_IRQ_ALL(ch)); if (ret) { - dev_err(soc_runtime->dev, "%s() error writing to irqen reg: %d\n", - __func__, ret); + dev_err(soc_runtime->dev, + "error writing to irqen reg: %d\n", ret); return ret; } @@ -337,8 +338,8 @@ static int lpass_platform_pcmops_trigger(struct snd_pcm_substream *substream, LPAIF_DMACTL_ENABLE_MASK, LPAIF_DMACTL_ENABLE_ON); if (ret) { - dev_err(soc_runtime->dev, "%s() error writing to rdmactl reg: %d\n", - __func__, ret); + dev_err(soc_runtime->dev, + "error writing to rdmactl reg: %d\n", ret); return ret; } break; @@ -350,8 +351,8 @@ static int lpass_platform_pcmops_trigger(struct snd_pcm_substream *substream, LPAIF_DMACTL_ENABLE_MASK, LPAIF_DMACTL_ENABLE_OFF); if (ret) { - dev_err(soc_runtime->dev, "%s() error writing to rdmactl reg: %d\n", - __func__, ret); + dev_err(soc_runtime->dev, + "error writing to rdmactl reg: %d\n", ret); return ret; } @@ -359,8 +360,8 @@ static int lpass_platform_pcmops_trigger(struct snd_pcm_substream *substream, LPAIF_IRQEN_REG(v, LPAIF_IRQ_PORT_HOST), LPAIF_IRQ_ALL(ch), 0); if (ret) { - dev_err(soc_runtime->dev, "%s() error writing to irqen reg: %d\n", - __func__, ret); + dev_err(soc_runtime->dev, + "error writing to irqen reg: %d\n", ret); return ret; } break; @@ -386,16 +387,16 @@ static snd_pcm_uframes_t lpass_platform_pcmops_pointer( ret = regmap_read(drvdata->lpaif_map, LPAIF_DMABASE_REG(v, ch, dir), &base_addr); if (ret) { - dev_err(soc_runtime->dev, "%s() error reading from rdmabase reg: %d\n", - __func__, ret); + dev_err(soc_runtime->dev, + "error reading from rdmabase reg: %d\n", ret); return ret; } ret = regmap_read(drvdata->lpaif_map, LPAIF_DMACURR_REG(v, ch, dir), &curr_addr); if (ret) { - dev_err(soc_runtime->dev, "%s() error reading from rdmacurr reg: %d\n", - __func__, ret); + dev_err(soc_runtime->dev, + "error reading from rdmacurr reg: %d\n", ret); return ret; } @@ -439,8 +440,8 @@ static irqreturn_t lpass_dma_interrupt_handler( LPAIF_IRQCLEAR_REG(v, LPAIF_IRQ_PORT_HOST), LPAIF_IRQ_PER(chan)); if (rv) { - dev_err(soc_runtime->dev, "%s() error writing to irqclear reg: %d\n", - __func__, rv); + dev_err(soc_runtime->dev, + "error writing to irqclear reg: %d\n", rv); return IRQ_NONE; } snd_pcm_period_elapsed(substream); @@ -452,11 +453,11 @@ static irqreturn_t lpass_dma_interrupt_handler( LPAIF_IRQCLEAR_REG(v, LPAIF_IRQ_PORT_HOST), LPAIF_IRQ_XRUN(chan)); if (rv) { - dev_err(soc_runtime->dev, "%s() error writing to irqclear reg: %d\n", - __func__, rv); + dev_err(soc_runtime->dev, + "error writing to irqclear reg: %d\n", rv); return IRQ_NONE; } - dev_warn(soc_runtime->dev, "%s() xrun warning\n", __func__); + dev_warn(soc_runtime->dev, "xrun warning\n"); snd_pcm_stop(substream, SNDRV_PCM_STATE_XRUN); ret = IRQ_HANDLED; } @@ -466,11 +467,11 @@ static irqreturn_t lpass_dma_interrupt_handler( LPAIF_IRQCLEAR_REG(v, LPAIF_IRQ_PORT_HOST), LPAIF_IRQ_ERR(chan)); if (rv) { - dev_err(soc_runtime->dev, "%s() error writing to irqclear reg: %d\n", - __func__, rv); + dev_err(soc_runtime->dev, + "error writing to irqclear reg: %d\n", rv); return IRQ_NONE; } - dev_err(soc_runtime->dev, "%s() bus access error\n", __func__); + dev_err(soc_runtime->dev, "bus access error\n"); snd_pcm_stop(substream, SNDRV_PCM_STATE_DISCONNECTED); ret = IRQ_HANDLED; } @@ -488,8 +489,7 @@ static irqreturn_t lpass_platform_lpaif_irq(int irq, void *data) rv = regmap_read(drvdata->lpaif_map, LPAIF_IRQSTAT_REG(v, LPAIF_IRQ_PORT_HOST), &irqs); if (rv) { - pr_err("%s() error reading from irqstat reg: %d\n", - __func__, rv); + pr_err("error reading from irqstat reg: %d\n", rv); return IRQ_NONE; } @@ -571,8 +571,8 @@ int asoc_qcom_lpass_platform_register(struct platform_device *pdev) drvdata->lpaif_irq = platform_get_irq_byname(pdev, "lpass-irq-lpaif"); if (drvdata->lpaif_irq < 0) { - dev_err(&pdev->dev, "%s() error getting irq handle: %d\n", - __func__, drvdata->lpaif_irq); + dev_err(&pdev->dev, "error getting irq handle: %d\n", + drvdata->lpaif_irq); return -ENODEV; } @@ -580,8 +580,7 @@ int asoc_qcom_lpass_platform_register(struct platform_device *pdev) ret = regmap_write(drvdata->lpaif_map, LPAIF_IRQEN_REG(v, LPAIF_IRQ_PORT_HOST), 0); if (ret) { - dev_err(&pdev->dev, "%s() error writing to irqen reg: %d\n", - __func__, ret); + dev_err(&pdev->dev, "error writing to irqen reg: %d\n", ret); return ret; } @@ -589,8 +588,7 @@ int asoc_qcom_lpass_platform_register(struct platform_device *pdev) lpass_platform_lpaif_irq, IRQF_TRIGGER_RISING, "lpass-irq-lpaif", drvdata); if (ret) { - dev_err(&pdev->dev, "%s() irq request failed: %d\n", - __func__, ret); + dev_err(&pdev->dev, "irq request failed: %d\n", ret); return ret; } diff --git a/sound/soc/qcom/storm.c b/sound/soc/qcom/storm.c index 8fcac2ac3aa6..c5207af14104 100644 --- a/sound/soc/qcom/storm.c +++ b/sound/soc/qcom/storm.c @@ -36,8 +36,7 @@ static int storm_ops_hw_params(struct snd_pcm_substream *substream, bitwidth = snd_pcm_format_width(format); if (bitwidth < 0) { - dev_err(card->dev, "%s() invalid bit width given: %d\n", - __func__, bitwidth); + dev_err(card->dev, "invalid bit width given: %d\n", bitwidth); return bitwidth; } @@ -50,8 +49,8 @@ static int storm_ops_hw_params(struct snd_pcm_substream *substream, ret = snd_soc_dai_set_sysclk(soc_runtime->cpu_dai, 0, sysclk_freq, 0); if (ret) { - dev_err(card->dev, "%s() error setting sysclk to %u: %d\n", - __func__, sysclk_freq, ret); + dev_err(card->dev, "error setting sysclk to %u: %d\n", + sysclk_freq, ret); return ret; } @@ -76,16 +75,14 @@ static int storm_parse_of(struct snd_soc_card *card) dai_link->cpu_of_node = of_parse_phandle(np, "cpu", 0); if (!dai_link->cpu_of_node) { - dev_err(card->dev, "%s() error getting cpu phandle\n", - __func__); + dev_err(card->dev, "error getting cpu phandle\n"); return -EINVAL; } dai_link->platform_of_node = dai_link->cpu_of_node; dai_link->codec_of_node = of_parse_phandle(np, "codec", 0); if (!dai_link->codec_of_node) { - dev_err(card->dev, "%s() error getting codec phandle\n", - __func__); + dev_err(card->dev, "error getting codec phandle\n"); return -EINVAL; } @@ -106,8 +103,7 @@ static int storm_platform_probe(struct platform_device *pdev) ret = snd_soc_of_parse_card_name(card, "qcom,model"); if (ret) { - dev_err(&pdev->dev, "%s() error parsing card name: %d\n", - __func__, ret); + dev_err(&pdev->dev, "error parsing card name: %d\n", ret); return ret; } @@ -116,15 +112,13 @@ static int storm_platform_probe(struct platform_device *pdev) ret = storm_parse_of(card); if (ret) { - dev_err(&pdev->dev, "%s() error resolving dai links: %d\n", - __func__, ret); + dev_err(&pdev->dev, "error resolving dai links: %d\n", ret); return ret; } ret = devm_snd_soc_register_card(&pdev->dev, card); if (ret) - dev_err(&pdev->dev, "%s() error registering soundcard: %d\n", - __func__, ret); + dev_err(&pdev->dev, "error registering soundcard: %d\n", ret); return ret; -- 2.11.0

1 0

[alsa-devel] [patch] sound: oss/ad1848: remove some dead code
by Dan Carpenter 31 Jan '17

31 Jan '17

We never use the irq2dev[] array so we can remove this assignment. Signed-off-by: Dan Carpenter <dan.carpenter(a)oracle.com> diff --git a/sound/oss/ad1848.c b/sound/oss/ad1848.c index 6368e5c7d0ba..f6156d8169d0 100644 --- a/sound/oss/ad1848.c +++ b/sound/oss/ad1848.c @@ -121,11 +121,6 @@ static bool deskpro_xl; static bool deskpro_m; static bool soundpro; -static volatile signed char irq2dev[17] = { - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1 -}; - #ifndef EXCLUDE_TIMERS static int timer_installed = -1; #endif @@ -2060,7 +2055,7 @@ int ad1848_init (char *name, struct resource *ports, int irq, int dma_playback, else devc->irq_ok = 1; /* Couldn't test. assume it's OK */ } else if (irq < 0) - irq2dev[-irq] = devc->dev_no = my_dev; + devc->dev_no = my_dev; #ifndef EXCLUDE_TIMERS if ((capabilities[devc->model].flags & CAP_F_TIMER) &&

2 1

[alsa-devel] [PATCH] ASoC: wm8741: Remove unneeded startup() callback
by Sergej Sawazki 31 Jan '17

31 Jan '17

Do not apply rate constraints in the startup() callback. The machine driver can change the sysclk and hence the supported frame rates in its hw_params(). This callback is unneeded since commit e369bd006fd6 ("ASoC: wm8741: Allow master clock switching"). Signed-off-by: Sergej Sawazki <ce3a(a)gmx.de> --- sound/soc/codecs/wm8741.c | 15 --------------- 1 file changed, 15 deletions(-) diff --git a/sound/soc/codecs/wm8741.c b/sound/soc/codecs/wm8741.c index b8c1940..d6e540a 100644 --- a/sound/soc/codecs/wm8741.c +++ b/sound/soc/codecs/wm8741.c @@ -176,20 +176,6 @@ static const struct snd_pcm_hw_constraint_list constraints_36864 = { .list = rates_36864, }; -static int wm8741_startup(struct snd_pcm_substream *substream, - struct snd_soc_dai *dai) -{ - struct snd_soc_codec *codec = dai->codec; - struct wm8741_priv *wm8741 = snd_soc_codec_get_drvdata(codec); - - if (wm8741->sysclk) - snd_pcm_hw_constraint_list(substream->runtime, 0, - SNDRV_PCM_HW_PARAM_RATE, - wm8741->sysclk_constraints); - - return 0; -} - static int wm8741_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) @@ -360,7 +346,6 @@ static int wm8741_set_dai_fmt(struct snd_soc_dai *codec_dai, SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) static const struct snd_soc_dai_ops wm8741_dai_ops = { - .startup = wm8741_startup, .hw_params = wm8741_hw_params, .set_sysclk = wm8741_set_dai_sysclk, .set_fmt = wm8741_set_dai_fmt, -- 2.7.4

2 4

[alsa-devel] [PATCH] sound: soc: davinci - Fix possible NULL derefrence.
by Shailendra Verma 31 Jan '17

31 Jan '17

of_match_device could return NULL, and so can cause a NULL pointer dereference later. Signed-off-by: Shailendra Verma <shailendra.v(a)samsung.com> --- sound/soc/davinci/davinci-evm.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/sound/soc/davinci/davinci-evm.c b/sound/soc/davinci/davinci-evm.c index 731fb0d..7a369e0 100644 --- a/sound/soc/davinci/davinci-evm.c +++ b/sound/soc/davinci/davinci-evm.c @@ -358,13 +358,20 @@ static int evm_aic3x_init(struct snd_soc_pcm_runtime *rtd) static int davinci_evm_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; - const struct of_device_id *match = - of_match_device(of_match_ptr(davinci_evm_dt_ids), &pdev->dev); - struct snd_soc_dai_link *dai = (struct snd_soc_dai_link *) match->data; + const struct of_device_id *match; + struct snd_soc_dai_link *dai; struct snd_soc_card_drvdata_davinci *drvdata = NULL; struct clk *mclk; int ret = 0; + match = of_match_device(of_match_ptr(davinci_evm_dt_ids), &pdev->dev); + if (!match) { + dev_err(&pdev->dev, "Error: No device match found\n"); + return -ENODEV; + } + + dai = (struct snd_soc_dai_link *) match->data; + evm_soc_card.dai_link = dai; dai->codec_of_node = of_parse_phandle(np, "ti,audio-codec", 0); -- 1.7.9.5

2 3

[alsa-devel] [PATCH 00/10] ASoC: add OF-graph base simple-card
by Kuninori Morimoto 31 Jan '17

31 Jan '17

Hi Mark, Rob These are OF-graph base simple-card patch-set. Unfortunately, OF-graph DT binding idea for ALSA SoC was rejected many times before. 1st OF-graph idea doesn't have card node, but because of ML discussion, latest idea can have it. OTOH, Mark doesn't like big-patch-set. Thus, some of already accepted preparation patches for OF-graph simple-card was no longer needed. 1) - 4) remove these. This patch set is based on my previous this patch ---------------- Date Thu, 19 Jan 2017 15:31:07 +0900 Subject [PATCH 0/6] of_graph_get_remote_endpoint() ---------------- 1) - 4) : remove soc-core OF-graph adjust feature which is no longer needed 5) - 6) : add useful new of-graph functions 7) - 10) : add OF-graph base simple-card Kuninori Morimoto (10): 1) ASoC: soc-core: remove OF adjusting for snd_soc_of_parse_audio_routing 2) ASoC: soc-core: remove OF adjusting for snd_soc_of_parse_audio_prefix 3) ASoC: soc-core: remove OF adjusting for snd_soc_of_parse_audio_simple_widgets 4) ASoC: soc-core: remove OF adjusting for snd_soc_of_parse_card_name 5) of_graph: add of_graph_get_port_parent() 6) of_graph: add of_graph_get_endpoint_count() 7) ASoC: add snd_soc_get_dai_id() 8) ASoC: simple-card-utils: add asoc_simple_card_parse_graph_dai() 9) ASoC: add simple-graph-card document 10) ASoC: add simple-graph-card support .../bindings/sound/simple-graph-card.txt | 137 ++++++++++ drivers/of/base.c | 42 ++- include/linux/of_graph.h | 14 + include/sound/simple_card_utils.h | 10 + include/sound/soc.h | 31 +-- sound/soc/generic/Kconfig | 7 + sound/soc/generic/Makefile | 2 + sound/soc/generic/simple-card-utils.c | 36 +++ sound/soc/generic/simple-graph-card.c | 303 +++++++++++++++++++++ sound/soc/soc-core.c | 61 +++-- 10 files changed, 588 insertions(+), 55 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/simple-graph-card.txt create mode 100644 sound/soc/generic/simple-graph-card.c -- 1.9.1

2 14

[alsa-devel] License for UCM config files - re plumbers audio conf discussion.
by Liam Girdwood 31 Jan '17

31 Jan '17

During the plumbers audio conference we discussed changing the release cadence and packaging of the UCM config files. This was to separate them from the alsa-lib package and alsa-lib release cadence for easier and more timely distribution for Ubuntu, Fedora etc. One thing that we did not cover was the UCM config file licence, if indeed there is a license for the UCM config files ? It's clear to me that the alsa-lib source and headers are LGPL, but does the LGPL also apply to the runtime UCM config files ? LGPL is specifically designed for libraries so my understanding is that it's probably not applicable to the UCM runtime configuration files. Here the LGPL definition of source code from alsa-lib COPYING :- ""Source code" for a work means the preferred form of the work for making modifications to it. For a library, complete source code means all the source code for all modules it contains, plus any associated interface definition files, plus the scripts used to control compilation and installation of the library." Having a licence free or BSD/MIT type license for the UCM config repo would mean the configurations (or derivatives of) could also be used with Android. IANAL Liam

3 2

[alsa-devel] [Alsa-Devel] Cannot combine audio devices with more than 64 channels
by Jörg Müller 31 Jan '17

31 Jan '17

I need to combine two HDSPe MADI FX cards to one virtual device. I have a working driver, which is alsa-compatible. I can select each single card in any alsa-compatible application and all channels work flawless. For combining the MADI FX cards to one virtual device, I created an .asoundrc with 194 inputs for each card. When I start that virtual device via jackd -R -d alsa -C madifx_record_all -P madifx_playback_all I get this error: > creating alsa driver ... > madifx_playback_all|madifx_record_all|1024|2|48000|0|0|nomon|swmeter|-|32bit > jackd: pcm_multi.c:1060: snd_pcm_multi_open: Assertion `!slave_map[sidxs[i]][schannels[i]]' failed. However, it works when I reduce the amount from 194 to 64 channels per card. I tried to use 128 channels per card, but that fails the same way. See my alsa-info here http://pastebin.com/4hq1B3wZ , which also includes the .asoundrc content. I also found this, which might be related: https://ccrma.stanford.edu/mirrors/lalists/lad/2005/06/0202.html To me, this looks like a bug. What do you think? For reference, I posted the same question on http://lists.jackaudio.org/private.cgi/jack-devel-jackaudio.org/2017-Januar…, however, they recommended to ask here for help.

5 11

[alsa-devel] [PATCH v6 0/3] Add support for es8388 and hdmi audio on the rock2
by Romain Perier 31 Jan '17

31 Jan '17

This set of patches adds a machine driver for rk3288-based boards that have the built-in HDMI audio and a generic analog output. It also adds slave mode to the es8328 driver that currently only supported the master mode. Then, it adds the required DT definitions to link rockchip-i2s to the es8388 analog output and to hdmi audio. This work is based on the initial work that was done by Sjoerd Simons <sjoerd.simons(a)collabora.co.uk> with some improvements, changes and more commits. Changes in v6: - Fixed bad error handling for gpio in rk3288_analog_hdmi.c - Removed message duplication in rk_hw_params(), in rk3288_analog_hdmi.c - Removed patch 1/4 (from the previous series), as it has been merged Changes in v5: - Fixed coding style issue in patch 2/4 (the switch case). - Moved the code for the master mode and the slave mode into the switch case for patch 2/4 - Fixed error handling for patch 3/4 Changes in v4: - Add support for multi codecs in the asoc machine driver, so the driver matches the hw architecture (analog and hdmi audio are connected on the same i2s line) - Renamed the driver to rk3288-hdmi-analog.c and changed its documentation - Add built-in support for hdmi audio in this driver - Add support for the property 'rockchip,routing' Changes in v3: - Cosmetic changes in rockchip_es8388.c - Added missing email to MODULE_AUTHOR in rockchip_es8388.c Changes in v2: - Fixed wrong use of the data structure i2c_device_id - Fixed wrong dependencies for SND_SOC_ROCKCHIP_ES8388 Romain Perier (3): ASoC: es8328: Add support for slave mode ASoC: rockchip: Add machine driver for RK3288 boards that use analog/HDMI arm: dts: Add support for ES8388 to the Radxa Rock 2 .../bindings/sound/rockchip,rk3288-hdmi-analog.txt | 36 +++ arch/arm/boot/dts/rk3288-rock2-square.dts | 39 +++ sound/soc/codecs/es8328.c | 20 +- sound/soc/rockchip/Kconfig | 10 + sound/soc/rockchip/Makefile | 2 + sound/soc/rockchip/rk3288_hdmi_analog.c | 299 +++++++++++++++++++++ 6 files changed, 400 insertions(+), 6 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/rockchip,rk3288-hdmi-analog.txt create mode 100644 sound/soc/rockchip/rk3288_hdmi_analog.c -- 2.9.3

2 5

[alsa-devel] Ceasing ALSA involvement due to persistent ill-treatment
by Jonathan Woithe 31 Jan '17

31 Jan '17

I will keep this brief. When things get to the point where every post one makes to alsa-devel is responded to with personal attacks, disdain, contempt or hostility, where one's extensive practical and technical experience is dismissed as being invalid at every opportunity, and one is consequently anxious about reading the responses to one's posts in alsa-devel, it's clearly time to walk away. Sadly, this is the situation I find myself in so walking away is what I will do once this message has been posted. Moving firewire audio streaming functionality into the kernel has been a long term goal of the FFADO project. Having a decade of experience working successfully with these devices under Linux through FFADO and its predecessors, I was planning to lend assistance to the ALSA firewire streaming driver development effort. Unfortunately, it has become abundantly clear that for some reason this is not welcomed (or even tolerated) by some, so instead I will devote my time to the maintenance of FFADO and my other Open Source projects. Although *extremely* miniscule in comparison to the deplorable harassment directed toward others in the Open Source community in the past, the treatment I have received has given me a fresh perspective on the effect that continued attacks can have on a person's attitude to life, and why many good developers have completely turned their back on the entire Open Source movement when faced with these kinds of issues. The Open Source community has wonderfully awesome people, but it is clear how the misdirected actions of a few can so easily drive people away. I wish the ALSA project well for its future work, and urge project members to treat all participants with the basic human rights of respect and dignity which were not afforded to me over the past two years on alsa-devel. Regards jonathan

3 2

[alsa-devel] Intel alsa sound request for Laptops
by John Frankish 31 Jan '17

31 Jan '17

For two or three kernel versions of alsa divers now, HDMI has been the default alsa device on my laptop (Dell Latitude E7240) - this does not make logical sense. In the latest kernel version I use, 4.2.9, alsa sound will not work at all unless I load the i915 kernel driver - this does not make logical sense and means that I cannot use Xvesa. Is it possible to make an alsa feature request for analogue sound to be the default alsa device on laptops and for alsa sound to work without the need to load the i915 kernel driver? Regards John **** List of PLAYBACK Hardware Devices **** card 0: HDMI [HDA Intel HDMI], device 3: HDMI 0 [HDMI 0] Subdevices: 1/1 Subdevice #0: subdevice #0 card 0: HDMI [HDA Intel HDMI], device 7: HDMI 1 [HDMI 1] Subdevices: 1/1 Subdevice #0: subdevice #0 card 0: HDMI [HDA Intel HDMI], device 8: HDMI 2 [HDMI 2] Subdevices: 1/1 Subdevice #0: subdevice #0 card 1: PCH [HDA Intel PCH], device 0: ALC3226 Analog [ALC3226 Analog] Subdevices: 1/1 Subdevice #0: subdevice #0

4 23

[alsa-devel] workqueue lockup due to process_unsol_events stuck in azx_rirb_get_response
by Vlastimil Babka 31 Jan '17

31 Jan '17

Hi, my desktop randomly experiences workqueue lockups on boot with openSUSE Tumbleweed kernels 4.9.x, installed around Christmas. Previously I had a (badly maintained) Gentoo installation with 4.4 IIRC, so I can't say if the kernel has regressed, or the major userspace changes exposed different timing of stuff. This is how the workqueue lockup looks like: kernel: BUG: workqueue lockup - pool cpus=3 node=0 flags=0x0 nice=0 stuck for 173s! kernel: Showing busy workqueues and worker pools: kernel: workqueue events: flags=0x0 kernel: pwq 6: cpus=3 node=0 flags=0x0 nice=0 active=9/256 kernel: in-flight: 60:process_unsol_events [snd_hda_core] process_unsol_events [snd_hda_core] kernel: pending: dbs_work_handler, push_to_pool, vmstat_shepherd, cache_reap, console_callback, sysrq_reinject_alt_sysrq, check_corrup kernel: workqueue events_power_efficient: flags=0x80 kernel: pwq 6: cpus=3 node=0 flags=0x0 nice=0 active=1/256 kernel: pending: neigh_periodic_work kernel: workqueue lru-add-drain: flags=0x8 kernel: pwq 6: cpus=3 node=0 flags=0x0 nice=0 active=1/256 kernel: pending: lru_add_drain_per_cpu BAR(1161) kernel: workqueue vmstat: flags=0xc kernel: pwq 6: cpus=3 node=0 flags=0x0 nice=0 active=1/256 kernel: pending: vmstat_update kernel: workqueue ipv6_addrconf: flags=0x40008 kernel: pwq 6: cpus=3 node=0 flags=0x0 nice=0 active=1/1 kernel: pending: addrconf_verify_work kernel: pool 6: cpus=3 node=0 flags=0x0 nice=0 hung=173s workers=4 idle: 134 373 30 This prevented me from getting a login prompt, as systemd is waiting for wicked. I have used sysrq to list the stuck tasks: kernel: sysrq: SysRq : Show Blocked State kernel: task PC stack pid father kernel: wickedd-nanny D 0 1161 1 0x00000000 kernel: ffff9f88e3ebc000 0000000000000000 ffff9f88e3506040 ffff9f88efd59780 kernel: ffff9f883ee90100 ffffb2dc81117d28 ffffffffa9715ff6 ffff9f88efd59780 kernel: 00ffb2dc81117d20 ffff9f88efd59780 ffff9f88def44000 ffff9f88e3506040 kernel: Call Trace: kernel: [<ffffffffa9715ff6>] ? __schedule+0x236/0x700 kernel: [<ffffffffa97164fd>] schedule+0x3d/0x90 kernel: [<ffffffffa971984e>] schedule_timeout+0x22e/0x410 kernel: [<ffffffffa90ab6e8>] ? finish_task_switch+0x78/0x1f0 kernel: [<ffffffffa90af94a>] ? try_to_wake_up+0x4a/0x3d0 kernel: [<ffffffffa9717837>] wait_for_completion+0x97/0x100 kernel: [<ffffffffa90afd70>] ? wake_up_q+0x80/0x80 kernel: [<ffffffffa909d747>] flush_work+0xf7/0x190 kernel: [<ffffffffa909b370>] ? flush_workqueue_prep_pwqs+0x1a0/0x1a0 kernel: [<ffffffffa91b4191>] lru_add_drain_all+0x121/0x160 kernel: [<ffffffffa91ddc15>] do_mlock+0x45/0x230 kernel: [<ffffffffa91ddf33>] SyS_mlock+0x13/0x20 kernel: [<ffffffffa971b47b>] entry_SYSCALL_64_fastpath+0x1e/0xad Yep, stuck waiting for work item completion, but workqueue processing on cpu 3 is stuck (and contains such item). Then I listed backtraces of all active CPU's: kernel: sysrq: SysRq : Show backtrace of all active CPUs kernel: NMI backtrace for cpu 3 kernel: CPU: 3 PID: 60 Comm: kworker/3:1 Not tainted 4.9.3-1-default #1 kernel: Hardware name: Gigabyte Technology Co., Ltd. GA-870A-UD3/GA-870A-UD3, BIOS F5 08/01/2011 kernel: Workqueue: events process_unsol_events [snd_hda_core] kernel: ffff9f88efcc3a90 ffffffffa93c4f70 0000000000000000 0000000000000003 kernel: ffff9f88efcc3ac0 ffffffffa93c8e44 ffffffffa9055c80 0000000000000003 kernel: 0000000000000001 ffffffffa9cc43c0 ffff9f88efcc3ae0 ffffffffa93c8f66 kernel: Call Trace: kernel: <IRQ> kernel: [<ffffffffa93c4f70>] dump_stack+0x63/0x83 kernel: [<ffffffffa93c8e44>] nmi_cpu_backtrace+0x94/0xa0 kernel: [<ffffffffa9055c80>] ? irq_force_complete_move+0x150/0x150 kernel: [<ffffffffa93c8f66>] nmi_trigger_cpumask_backtrace+0x116/0x150 kernel: [<ffffffffa9055cf9>] arch_trigger_cpumask_backtrace+0x19/0x20 kernel: [<ffffffffa94ce877>] sysrq_handle_showallcpus+0x17/0x20 kernel: [<ffffffffa94cef1b>] __handle_sysrq+0xfb/0x150 [ snip keyboard event processing ] kernel: [<ffffffffa903128d>] handle_irq+0x1d/0x30 kernel: [<ffffffffa971ddab>] do_IRQ+0x4b/0xd0 kernel: [<ffffffffa971be02>] common_interrupt+0x82/0x82 kernel: <EOI> kernel: [<ffffffffa93d1ef3>] ? delay_tsc+0x43/0x90 kernel: [<ffffffffa93d1e2d>] __const_udelay+0x2d/0x30 kernel: [<ffffffffc0c08403>] azx_rirb_get_response+0xb3/0x280 [snd_hda_codec] kernel: [<ffffffffc0c08b43>] azx_get_response+0x33/0x40 [snd_hda_codec] kernel: [<ffffffffc0b86303>] snd_hdac_bus_exec_verb_unlocked+0x83/0x170 [snd_hda_core] kernel: [<ffffffffa952e85c>] ? __pm_runtime_resume+0x4c/0x60 kernel: [<ffffffffc0bfe4fa>] codec_exec_verb+0x8a/0x110 [snd_hda_codec] kernel: [<ffffffffc0b86f97>] snd_hdac_exec_verb+0x17/0x40 [snd_hda_core] kernel: [<ffffffffc0b87944>] snd_hdac_codec_read+0x34/0x50 [snd_hda_core] kernel: [<ffffffffc0c20501>] dspio_read+0x51/0x70 [snd_hda_codec_ca0132] kernel: [<ffffffffc0c20566>] ca0132_process_dsp_response+0x46/0x160 [snd_hda_codec_ca0132] kernel: [<ffffffffc0c02fe5>] call_jack_callback.isra.1+0x25/0xa0 [snd_hda_codec] kernel: [<ffffffffc0c033c6>] snd_hda_jack_unsol_event+0x66/0x80 [snd_hda_codec] kernel: [<ffffffffc0bfd077>] hda_codec_unsol_event+0x17/0x20 [snd_hda_codec] kernel: [<ffffffffc0b86193>] process_unsol_events+0x63/0x70 [snd_hda_core] kernel: [<ffffffffa909e4d3>] process_one_work+0x1f3/0x4d0 kernel: [<ffffffffa909e7f8>] worker_thread+0x48/0x4e0 kernel: [<ffffffffa909e7b0>] ? process_one_work+0x4d0/0x4d0 kernel: [<ffffffffa909e7b0>] ? process_one_work+0x4d0/0x4d0 kernel: [<ffffffffa90a46da>] kthread+0xca/0xe0 kernel: [<ffffffffa90a4610>] ? kthread_park+0x60/0x60 kernel: [<ffffffffa971b6f5>] ret_from_fork+0x25/0x30 This backtrace looks stable on multiple retries. I've rebooted and added module_blacklist=snd_hda_core on the command line to work around this for now. Here's the relevant lspci. The card I use right now is an onboard audio with 3 output jacks for 5.1. The Creative Audigy is currently unused, as should be the HDMI stuff. 00:14.2 Audio device: Advanced Micro Devices, Inc. [AMD/ATI] SBx00 Azalia (Intel HDA) (rev 40) Subsystem: Gigabyte Technology Co., Ltd Device a102 Flags: bus master, slow devsel, latency 32, IRQ 7, NUMA node 0 Memory at fe024000 (64-bit, non-prefetchable) [size=16K] Capabilities: [50] Power Management version 2 Kernel modules: snd_hda_intel 01:00.1 Audio device: Advanced Micro Devices, Inc. [AMD/ATI] Cape Verde/Pitcairn HDMI Audio [Radeon HD 7700/7800 Series] Subsystem: PC Partner Limited / Sapphire Technology Device aab0 Flags: bus master, fast devsel, latency 0, IRQ 10, NUMA node 0 Memory at fd4fc000 (64-bit, non-prefetchable) [size=16K] Capabilities: [48] Vendor Specific Information: Len=08 <?> Capabilities: [50] Power Management version 3 Capabilities: [58] Express Legacy Endpoint, MSI 00 Capabilities: [a0] MSI: Enable- Count=1/1 Maskable- 64bit+ Capabilities: [100] Vendor Specific Information: ID=0001 Rev=1 Len=010 <?> Capabilities: [150] Advanced Error Reporting Kernel modules: snd_hda_intel 02:00.0 Audio device: Creative Labs Sound Core3D [Sound Blaster Recon3D / Z-Series] (rev 01) Subsystem: Creative Labs SB1570 SB Audigy Fx Flags: bus master, fast devsel, latency 0, IRQ 10, NUMA node 0 Memory at fd3fc000 (64-bit, non-prefetchable) [size=16K] Memory at fd3f8000 (64-bit, non-prefetchable) [size=16K] Capabilities: [40] Power Management version 3 Capabilities: [50] MSI: Enable- Count=1/1 Maskable+ 64bit+ Capabilities: [70] Express Endpoint, MSI 00 Capabilities: [100] Advanced Error Reporting Capabilities: [140] Virtual Channel Capabilities: [170] Device Serial Number 00-00-00-00-00-00-00-00 Capabilities: [180] Power Budgeting <?> Kernel modules: snd_hda_intel Let me know what else to dump or try. Thanks, Vlastimil

2 5

[alsa-devel] [PATCH 1/2] ASoC: qcom: lpass-cpu: Remove unnecessary clock checks
by Bjorn Andersson 30 Jan '17

30 Jan '17

Clean up the clock calling code by removing numerous IS_ERR() checks by just assigning the clock NULL; as this turn all used functions in the clk API to nops. Also include the word "optional" in the error message when failing to acquire the optional osr clocks. Cc: Banajit Goswami <bgoswami(a)codeaurora.org> Cc: Patrick Lai <plai(a)codeaurora.org> Cc: Srinivas Kandagatla <srinivas.kandagatla(a)linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson(a)linaro.org> --- sound/soc/qcom/lpass-cpu.c | 27 ++++++++++----------------- 1 file changed, 10 insertions(+), 17 deletions(-) diff --git a/sound/soc/qcom/lpass-cpu.c b/sound/soc/qcom/lpass-cpu.c index eff3f9a8b685..1b912a9bb791 100644 --- a/sound/soc/qcom/lpass-cpu.c +++ b/sound/soc/qcom/lpass-cpu.c @@ -33,9 +33,6 @@ static int lpass_cpu_daiops_set_sysclk(struct snd_soc_dai *dai, int clk_id, struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai); int ret; - if (IS_ERR(drvdata->mi2s_osr_clk[dai->driver->id])) - return 0; - ret = clk_set_rate(drvdata->mi2s_osr_clk[dai->driver->id], freq); if (ret) dev_err(dai->dev, "%s() error setting mi2s osrclk to %u: %d\n", @@ -50,23 +47,18 @@ static int lpass_cpu_daiops_startup(struct snd_pcm_substream *substream, struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai); int ret; - if (!IS_ERR(drvdata->mi2s_osr_clk[dai->driver->id])) { - ret = clk_prepare_enable( - drvdata->mi2s_osr_clk[dai->driver->id]); - if (ret) { - dev_err(dai->dev, "%s() error in enabling mi2s osr clk: %d\n", - __func__, ret); - return ret; - } + ret = clk_prepare_enable(drvdata->mi2s_osr_clk[dai->driver->id]); + if (ret) { + dev_err(dai->dev, "%s() error in enabling mi2s osr clk: %d\n", + __func__, ret); + return ret; } ret = clk_prepare_enable(drvdata->mi2s_bit_clk[dai->driver->id]); if (ret) { dev_err(dai->dev, "%s() error in enabling mi2s bit clk: %d\n", __func__, ret); - if (!IS_ERR(drvdata->mi2s_osr_clk[dai->driver->id])) - clk_disable_unprepare( - drvdata->mi2s_osr_clk[dai->driver->id]); + clk_disable_unprepare(drvdata->mi2s_osr_clk[dai->driver->id]); return ret; } @@ -80,8 +72,7 @@ static void lpass_cpu_daiops_shutdown(struct snd_pcm_substream *substream, clk_disable_unprepare(drvdata->mi2s_bit_clk[dai->driver->id]); - if (!IS_ERR(drvdata->mi2s_osr_clk[dai->driver->id])) - clk_disable_unprepare(drvdata->mi2s_osr_clk[dai->driver->id]); + clk_disable_unprepare(drvdata->mi2s_osr_clk[dai->driver->id]); } static int lpass_cpu_daiops_hw_params(struct snd_pcm_substream *substream, @@ -505,9 +496,11 @@ int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev) clk_name); if (IS_ERR(drvdata->mi2s_osr_clk[dai_id])) { dev_warn(&pdev->dev, - "%s() error getting mi2s-osr-clk: %ld\n", + "%s() error getting optional mi2s-osr-clk: %ld\n", __func__, PTR_ERR(drvdata->mi2s_osr_clk[dai_id])); + + drvdata->mi2s_osr_clk[dai_id] = NULL; } if (variant->num_dai > 1) -- 2.11.0

1 1

Re: [alsa-devel] [PATCH v2 1/1] ALSA: Tascam US-16x08 DSP mixer quirk
by Takashi Iwai 30 Jan '17

30 Jan '17

On Mon, 30 Jan 2017 14:20:18 +0100, Detlef Urban wrote: > > I bet on "global variables have been removed". Good to hear, but I'm not sure. See below. > But still unclear to me is if use of private > data field in struct usb_mixer_elem_info is > uncommon? It's normal to use it. > Add mixer quirk for Tascam US-16x08 usb interface. > Even that this an usb compliant device, > the input channels and DSP functions (EQ/Compressor) > arn't accessible by default. > > Signed-off-by: Detlef Urban <onkel(a)paraair.de> Well, the patch style looks still very incompatible. Please run checkpatch.pl and fix the issues reported there at first. Also, if it's your MUA that breaks the spacing of the patch, then please fix your MUA setup, or use attachment as a last resort. About the non-coding-style issues in the patch: > +int snd_us16x08_recv_urb(struct snd_usb_audio *chip, > + unsigned char *buf, int size) Missing static? > +int snd_us16x08_recv_urb_0xa1(struct snd_usb_audio *chip, > + char *buffer, int size) Ditto. I won't mention in all others. Please check each function whether it really must be non-static or not. > +{ > + > + unsigned char buf[64] = {0,}; > + int err = snd_usb_ctl_msg(chip->dev, > + usb_rcvctrlpipe(chip->dev, 0), > + 2, > + 0xa1, 0x0100, 0x100, buf, 14); > + dev_err(&chip->dev->dev, > + "us16x08: snd_us16x08_recv_urb: error: %d\n", err); Is the intention to show always the error? If yes, please give some more comments to the function itself. > + > + return 0; > +} > + > +/* wrapper function to send prepared URB buffer to usb device. Return -1 > + * if something went wrong (FIXME: have to have more helpful error numbers) Better to fix now :) > + */ > +int snd_us16x08_send_urb(struct snd_usb_audio *chip, char *buf, int size) .... > +struct meter_resp { > + uint8_t a0; > + uint8_t a1; > + uint8_t a2; > + uint8_t b0; > + uint8_t b1; > + uint8_t b2; > + uint8_t c0; > + uint8_t c1; > + uint8_t c2; > + uint8_t c3; > +}; > +struct meter_resp *resp; > +unsigned char meter_urb_buf[64] = {0,}; What about these are global...? I thought you bet it. > +int snd_us16x08_eqswitch_info(struct snd_kcontrol *kcontrol, > + struct snd_ctl_elem_info *uinfo) > +{ > + uinfo->count = 1; > + uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; > + uinfo->value.integer.max = 1; > + uinfo->value.integer.min = 0; > + return 0; > +} Use the standard snd_ctl_boolean_mono_info(). > +static int snd_us16x08_eqswitch_put(struct snd_kcontrol *kcontrol, > + struct snd_ctl_elem_value *ucontrol) > +{ > + struct usb_mixer_elem_info *elem = kcontrol->private_data; > + struct snd_usb_audio *chip = elem->head.mixer->chip; > + struct snd_us16x08_eq_all_store *store = > + ((struct snd_us16x08_eq_all_store *) elem->private_data); > + int index = ucontrol->id.index; > + > + char buf[sizeof(eqs_msq)]; > + int val, err = 0; > + > + val = ucontrol->value.integer.value[0]; > + > + memcpy(buf, eqs_msq, sizeof(eqs_msq)); > + > + store->low_store->valSwitch[index] = val; > + store->midlow_store->valSwitch[index] = val; > + store->midhigh_store->valSwitch[index] = val; > + store->high_store->valSwitch[index] = val; > + > + buf[5] = index + 1; > + > + buf[20] = store->low_store->valSwitch[index]; > + buf[17] = store->low_store->valWidth[index]; > + buf[14] = store->low_store->valFreq[index]; > + buf[11] = store->low_store->valdB[index]; > + buf[8] = 0x01; > + err = snd_us16x08_send_urb(chip, buf, sizeof(eqs_msq)); > + > + mdelay(15); Need to be mdelay(), not msleep() or variant? > +struct snd_us16x08_fader *snd_us16x08_create_mix_store(int default_val) > +{ > + int i; > + struct snd_us16x08_fader *tmp = > + kmalloc(sizeof(struct snd_us16x08_fader), GFP_KERNEL); Missing NULL check. > + > + for (i = 0; i < SND_US16X08_MAX_CHANNELS; i++) > + tmp->value[i] = default_val; > + return tmp; > +} > + > +struct snd_us16x08_comp_store *snd_us16x08_create_comp_store(void) > +{ > + int i = 0; > + struct snd_us16x08_comp_store *tmp = > + kmalloc(sizeof(struct snd_us16x08_comp_store), GFP_KERNEL); Ditto. > + > + for (i = 0; i < SND_US16X08_MAX_CHANNELS; i++) { > + tmp->valThreshold[i] = 0x20; /* 0dB */ > + tmp->valRatio[i] = 0x00; /* 1:1 */ > + tmp->valGain[i] = 0x00; /* 0dB */ > + tmp->valSwitch[i] = 0x00; /* on */ > + tmp->valAttack[i] = 0x02; /* 2ms */ > + tmp->valRelease[i] = 0x01; /* 10ms */ > + } > + return tmp; > +} > + > +struct snd_us16x08_bypass_store *snd_us16x08_create_single_store( > + int default_val) > +{ > + struct snd_us16x08_bypass_store *tmp = > + kmalloc(sizeof(struct snd_us16x08_bypass_store), GFP_KERNEL); Ditto... For the whole! > +void snd_us16x08_free_eq_store(struct snd_kcontrol *kctl) > +{ > + snd_usb_mixer_elem_free(kctl); > +} > + > +void snd_us16x08_free_mix_store(struct snd_kcontrol *kctl) > +{ > + snd_usb_mixer_elem_free(kctl); > +} Why two different functions for the very same thing? > +static int snd_us16x08_meter_get(struct snd_kcontrol *kcontrol, > + struct snd_ctl_elem_value *ucontrol) > +{ > + int i, set; > + int val; > + struct usb_mixer_elem_info *elem = kcontrol->private_data; > + struct snd_usb_audio *chip = elem->head.mixer->chip; > + struct snd_us16x08_meter_store *store = elem->private_data; > + /* struct snd_us16x08_comp_store *comp_store; */ > + > + if (elem) { > + store = (struct snd_us16x08_meter_store *) elem->private_data; > + chip = elem->head.mixer->chip; > + } > + > + switch (kcontrol->private_value) { > + case 0: > + snd_us16x08_send_urb(chip, mix_init_msg1, 4); > + snd_us16x08_recv_urb(chip, meter_urb_buf, > + sizeof(meter_urb_buf)); > + kcontrol->private_value++; > + break; > + case 1: > + snd_us16x08_recv_urb(chip, meter_urb_buf, > + sizeof(meter_urb_buf)); > + kcontrol->private_value++; > + break; > + case 2: > + snd_us16x08_recv_urb(chip, meter_urb_buf, > + sizeof(meter_urb_buf)); > + kcontrol->private_value++; > + break; > + case 3: > + mix_init_msg2[2] = snd_get_meter_comp_index(store); > + snd_us16x08_send_urb(chip, mix_init_msg2, 10); > + snd_us16x08_recv_urb(chip, meter_urb_buf, > + sizeof(meter_urb_buf)); > + kcontrol->private_value = 0; > + break; > + } ..... WTF does this function do...? Please add more comments. > +int snd_us16x08_controls_create_eq(struct usb_mixer_interface *mixer) > +{ > + > + int err; > + char name[64]; > + struct usb_mixer_elem_info *elem; > + > + struct snd_us16x08_eq_store *eq_low_store = > + snd_us16x08_create_eq_store(0x01); > + struct snd_us16x08_eq_store *eq_midlow_store = > + snd_us16x08_create_eq_store(0x02); > + struct snd_us16x08_eq_store *eq_midhigh_store = > + snd_us16x08_create_eq_store(0x03); > + struct snd_us16x08_eq_store *eq_high_store = > + snd_us16x08_create_eq_store(0x04); > + struct snd_us16x08_eq_all_store *eq_all_store = > + kmalloc(sizeof(struct snd_us16x08_eq_all_store), GFP_KERNEL); > + > + eq_all_store->low_store = eq_low_store; > + eq_all_store->midlow_store = eq_midlow_store; > + eq_all_store->midhigh_store = eq_midhigh_store; > + eq_all_store->high_store = eq_high_store; You didn't check NULL at all here... > + snprintf(name, sizeof(name), "5 Low"); > + err = add_new_ctl(mixer, &snd_us16x08_eqlevel_ctl, > + SND_US16X08_ID_EQLOWLEVEL, 0x00, 0, USB_MIXER_U8, 1, name, > + (void *) eq_low_store, snd_us16x08_free_eq_store, &elem); > + if (err < 0) > + return err; > + > + snprintf(name, sizeof(name), "51 LowFreq"); .... Please use a table for this kind of code. > +int snd_us16x08_controls_create(struct usb_mixer_interface *mixer) > +{ > + > + int err; > + char name[64]; > + struct usb_mixer_elem_info *elem; > + struct snd_us16x08_fader *route_store; > + struct snd_us16x08_comp_store *comp_store; > + struct snd_us16x08_meter_store *meter_store; > + > + if (mixer->chip->num_interfaces > 0) { What is this? > + route_store = snd_us16x08_create_mix_store(0); Missing error check. > + route_store->value[0] = 0; > + route_store->value[1] = 1; > + route_store->value[2] = 4; > + route_store->value[3] = 5; > + route_store->value[4] = 6; > + route_store->value[5] = 7; > + route_store->value[6] = 8; > + route_store->value[7] = 9; > + snprintf(name, sizeof(name), "Route"); > + err = add_new_ctl(mixer, &snd_us16x08_route_ctl, > + 0x00, 0x00, 0, > + USB_MIXER_U8, 1, name, (void *) route_store, > + snd_us16x08_free_mix_store, &elem); > + if (err < 0) > + return err; > + > + snprintf(name, sizeof(name), "Master"); ..... Please use a table. > --- /dev/null > +++ b/sound/usb/mixer_us16x08.h > @@ -0,0 +1,132 @@ > +#ifndef __USB_MIXER_US16X08_H > +#define __USB_MIXER_US16X08_H > + > + > +#define SND_US16X08_MIN_CHANNELS 0 Zero channel is allowed...? > +#define SND_US16X08_MAX_CHANNELS 16 > + > +/* set macro for kcontrol private_value */ > +#define SND_US16X08_KCSET(bias, step, min, max) \ > + ((bias << 24) | (step << 16) | (min << 8) | max) Put parentheses to each argument in a macro. > +struct snd_us16x08_fader { > + uint8_t value[SND_US16X08_MAX_CHANNELS]; Use u8 for the kernel code. > +struct snd_us16x08_comp_store { > + int8_t valThreshold[SND_US16X08_MAX_CHANNELS]; > + uint8_t valAttack[SND_US16X08_MAX_CHANNELS]; > + uint8_t valRelease[SND_US16X08_MAX_CHANNELS]; > + uint8_t valRatio[SND_US16X08_MAX_CHANNELS]; > + uint8_t valGain[SND_US16X08_MAX_CHANNELS]; > + uint8_t valSwitch[SND_US16X08_MAX_CHANNELS]; > +}; > + > +struct snd_us16x08_meter_store { > + long meter_level[SND_US16X08_MAX_CHANNELS]; > + long master_level[2]; /* level of meter for master output */ The size of long depends on the architecture. Do you want 32bit or 64bit integer? For the latter, use s64 or u64. For the former, just use the standard int. > + int comp_index; > + int comp_active_index; > + long comp_level[16]; /* compressor reduction level of current > channel */ Ditto. > + struct snd_us16x08_comp_store *comp_store; > +}; > + > +struct snd_us16x08_bypass_store { > + int value; > +}; What's the merit of this struct? > +typedef void(*opt_free)(struct snd_kcontrol *kctl); Don't use typedef unless really required. > +int snd_us16x08_mix_info(struct snd_kcontrol *kcontrol, > + struct snd_ctl_elem_info *uinfo); > + > +int snd_us16x08_controls_create(struct usb_mixer_interface *mixer); > + > +int snd_us16x08_send_urb(struct snd_usb_audio *chip, char *buf, int size); > + > +int snd_us16x08_cur_channel(void); > + > +int add_new_ctl(struct usb_mixer_interface *mixer, > + const struct snd_kcontrol_new *ncontrol, > + int index, int offset, int num, int val_type, int channels, > + const char *name, const void *opt, > + opt_free freeer, struct usb_mixer_elem_info **elem_ret); > + > +int snd_us16x08_controls_create_eq(struct usb_mixer_interface *mixer); > +int snd_us16x08_controls_create_comp(struct usb_mixer_interface *mixer); > + > +struct snd_us16x08_comp_store *get_comp_store(void); Where is it defined? Also, did you test suspend/resume? Your code seems missing the restore mixer callback. Without the proper restore callback, S3 may work, but S4 won't. thanks, Takashi

1 0

[alsa-devel] [PATCH] Sound: soc: samsung - Fix possible NULL derefrence.
by Shailendra Verma 30 Jan '17

30 Jan '17

of_device_get_match_data could return NULL, and so can cause a NULL pointer dereference later. Signed-off-by: Shailendra Verma <shailendra.v(a)samsung.com> --- sound/soc/samsung/i2s.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c index 7825bff..b5acce2 100644 --- a/sound/soc/samsung/i2s.c +++ b/sound/soc/samsung/i2s.c @@ -1224,8 +1224,13 @@ static int samsung_i2s_probe(struct platform_device *pdev) const struct samsung_i2s_dai_data *i2s_dai_data; int ret; - if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) + if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) { i2s_dai_data = of_device_get_match_data(&pdev->dev); + if (!i2s_dai_data) { + dev_err(&pdev->dev, "no device match found\n"); + return -ENODEV; + } + } else i2s_dai_data = (struct samsung_i2s_dai_data *) platform_get_device_id(pdev)->driver_data; -- 1.7.9.5

2 1

[alsa-devel] [PATCH 1/1] ALSA: Tascam US-16x08 DSP mixer quirk
by Detlef Urban 30 Jan '17

30 Jan '17

Add mixer quirk for Tascam US-16x08 usb interface. Even that this an usb compliant device, the input channels and DSP functions (EQ/Compressor) arn't accessible by default. Signed-off by: Detlef Urban <onkel(a)paraair.de> --- diff --git a/sound/usb/Makefile b/sound/usb/Makefile index 2d2d122..5394264 100644 --- a/sound/usb/Makefile +++ b/sound/usb/Makefile @@ -10,6 +10,9 @@ snd-usb-audio-objs := card.o \ mixer.o \ mixer_quirks.o \ mixer_scarlett.o \ + mixer_us16x08.o \ + mixer_us16x08_eq.o \ + mixer_us16x08_comp.o \ pcm.o \ proc.o \ quirks.o \ @@ -25,4 +28,3 @@ obj-$(CONFIG_SND_USB_USX2Y) += snd-usbmidi-lib.o obj-$(CONFIG_SND_USB_US122L) += snd-usbmidi-lib.o obj-$(CONFIG_SND) += misc/ usx2y/ caiaq/ 6fire/ hiface/ bcd2000/ -obj-$(CONFIG_SND_USB_LINE6) += line6/ diff --git a/sound/usb/mixer_quirks.c b/sound/usb/mixer_quirks.c index 04991b0..4fa0053 100644 --- a/sound/usb/mixer_quirks.c +++ b/sound/usb/mixer_quirks.c @@ -43,6 +43,7 @@ #include "mixer.h" #include "mixer_quirks.h" #include "mixer_scarlett.h" +#include "mixer_us16x08.h" #include "helper.h" extern struct snd_kcontrol_new *snd_usb_feature_unit_ctl; @@ -1729,6 +1730,10 @@ int snd_usb_mixer_apply_create_quirk(struct usb_mixer_interface *mixer) return err; switch (mixer->chip->usb_id) { + /* Tascam US-16x08 */ + case USB_ID(0x0644, 0x8047): + err = snd_us16x08_controls_create(mixer); + break; case USB_ID(0x041e, 0x3020): case USB_ID(0x041e, 0x3040): case USB_ID(0x041e, 0x3042): diff --git a/sound/usb/mixer_us16x08.c b/sound/usb/mixer_us16x08.c new file mode 100644 index 0000000..177ec5f --- /dev/null +++ b/sound/usb/mixer_us16x08.c @@ -0,0 +1,815 @@ +/* + * Tascam US-16x08 ALSA driver + * + * Copyright (c) 2016 by Detlef Urban (onkel(a)paraair.de) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <linux/slab.h> +#include <linux/usb.h> +#include <linux/usb/audio-v2.h> +#include "linux/kthread.h" + +#include <sound/core.h> +#include <sound/control.h> + +#include "usbaudio.h" +#include "mixer.h" +#include "helper.h" + +#include "mixer_us16x08.h" + +#define FADER_INFOPUTGET_NOLOG + +static char route_msg[] = { + 0x61, + 0x02, + 0x03, /* input from master (0x02) or input from computer bus (0x03) */ + 0x62, + 0x02, + 0x01, /* input index (0x01/0x02 eq. left/right) or bus (0x01-0x08) */ + 0x41, + 0x01, + 0x61, + 0x02, + 0x01, + 0x62, + 0x02, + 0x01, /* output index (0x01-0x08) */ + 0x42, + 0x01, + 0x43, + 0x01, + 0x00, + 0x00 +}; + +static char mix_init_msg1[] = { + 0x71, 0x01, 0x00, 0x00 +}; +static char mix_init_msg2[] = { + 0x62, 0x02, 0x00, 0x61, 0x02, 0x04, 0xb1, 0x01, 0x00, 0x00 +}; + +static int comp_channel = 1; + +static char mix_msg_in[] = { + CTLMSGHEAD_IN, /* the default message head */ + 0x81, /* 0x06: Controller ID */ + 0x02, /* 0x07: */ + 0x00, /* 0x08: Value of common mixer */ + 0x00, + 0x00 +}; +static char mix_msg_out[] = { + CTLMSGHEAD_OUT, /* the default message head */ + 0x81, /* 0x06: Controller ID */ + 0x02, /* 0x07: */ + 0x00, /* 0x08: Value of common mixer */ + 0x00, + 0x00 +}; + +static char bypass_msg_out[] = { + 0x45, + 0x02, + 0x01, // on/off flag + 0x00, + 0x00 +}; + +static char bus_msg_out[] = { + 0x44, + 0x02, + 0x01, // on/off flag + 0x00, + 0x00 +}; + +int snd_us16x08_recv_urb(struct snd_usb_audio *chip, + unsigned char *buf, int size) +{ + + mutex_lock(&chip->mutex); + snd_usb_ctl_msg(chip->dev, + usb_rcvctrlpipe(chip->dev, 0), + SND_US16X08_URB_METER_REQUEST, + SND_US16X08_URB_METER_REQUESTTYPE, 0, 0, buf, size); + mutex_unlock(&chip->mutex); + return 0; +} + +int snd_us16x08_recv_urb_0xa1(struct snd_usb_audio *chip, + char *buffer, int size) +{ + + unsigned char buf[64] = {0,}; + int err = snd_usb_ctl_msg(chip->dev, + usb_rcvctrlpipe(chip->dev, 0), + 2, + 0xa1, 0x0100, 0x100, buf, 14); + dev_err(&chip->dev->dev, + "us16x08: snd_us16x08_recv_urb: error: %d\n", err); + + return 0; +} + +/* wrapper function to send prepared URB buffer to usb device. Return -1 + * if something went wrong (FIXME: have to have more helpful error numbers) */ +int snd_us16x08_send_urb(struct snd_usb_audio *chip, char *buf, int size) +{ + int count = -1; + + if (chip) { + count = snd_usb_ctl_msg(chip->dev, + usb_sndctrlpipe(chip->dev, 0), + SND_US16X08_URB_REQUEST, + SND_US16X08_URB_REQUESTTYPE, + 0, 0, buf, size); + } + + return(count == size) ? 0 : -1; +} + +struct meter_resp { + uint8_t a0; + uint8_t a1; + uint8_t a2; + uint8_t b0; + uint8_t b1; + uint8_t b2; + uint8_t c0; + uint8_t c1; + uint8_t c2; + uint8_t c3; +}; +struct meter_resp *resp = NULL; +unsigned char meter_urb_buf[64] = {0,}; + +int snd_us16x08_route_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->count = 1; + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->value.integer.max = SND_US16X08_KCMAX(kcontrol); + uinfo->value.integer.min = SND_US16X08_KCMIN(kcontrol); + uinfo->value.integer.step = SND_US16X08_KCSTEP(kcontrol); + return 0; +} + +static int snd_us16x08_route_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_us16x08_fader *store = + (struct snd_us16x08_fader *) elem->private_data; + int index = ucontrol->id.index; + + /* we have only eight output channels, so ignore all others */ + ucontrol->value.integer.value[0] = store->value[index]; + + return 0; +} + +static int snd_us16x08_route_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_fader *store = + (struct snd_us16x08_fader *) elem->private_data; + int index = ucontrol->id.index; + char buf[sizeof(route_msg)]; + int val, val_org, err = 0; + + /* prepare the message buffer from static one */ + memcpy(buf, route_msg, sizeof(route_msg)); + + /* get the new value */ + val = ucontrol->value.integer.value[0]; + if (val < 2) { /* input comes from a master channel */ + val_org = val; + buf[2] = 0x02; + } else { /* input comes from a computer channel */ + buf[2] = 0x03; + val_org = val - 2; + } + + buf[5] = (unsigned char) (val_org & 0x0f) + 1; + buf[13] = index + 1; + + err = snd_us16x08_send_urb(chip, buf, sizeof(route_msg)); + + if (err == 0) + store->value[index] = val; + + return err == 0 ? 1 : 0; +} + +static int snd_us16x08_master_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_us16x08_fader *store = + (struct snd_us16x08_fader *) elem->private_data; + int index = ucontrol->id.index; + + ucontrol->value.integer.value[0] = store->value[index]; + + return 0; +} + +int snd_us16x08_master_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->count = 1; + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->value.integer.max = SND_US16X08_KCMAX(kcontrol); + uinfo->value.integer.min = SND_US16X08_KCMIN(kcontrol); + uinfo->value.integer.step = SND_US16X08_KCSTEP(kcontrol); + return 0; +} + +static int snd_us16x08_master_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_fader *store = + (struct snd_us16x08_fader *) elem->private_data; + char buf[sizeof(mix_msg_out)]; + int val, err = 0; + int index = ucontrol->id.index; + + + /* prepare the message buffer from static one */ + memcpy(buf, mix_msg_out, sizeof(mix_msg_out)); + + val = ucontrol->value.integer.value[0]; + dev_dbg(&chip->dev->dev, + "snd_us16x08_master_put index:%d, val, %d", index, val); + + buf[8] = val - SND_US16X08_KCBIAS(kcontrol); + buf[6] = elem->head.id; + + buf[5] = index + 1; + err = snd_us16x08_send_urb(chip, buf, sizeof(mix_msg_out)); + + if (err == 0) + store->value[index] = val; + + return err == 0 ? 1 : 0; +} + +static int snd_us16x08_bypass_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_us16x08_bypass_store *store = + (struct snd_us16x08_bypass_store *) elem->private_data; + + ucontrol->value.integer.value[0] = store->value; + + return 0; +} + +static int snd_us16x08_bypass_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_bypass_store *store = + (struct snd_us16x08_bypass_store *) elem->private_data; + + // prepare message buffer + char buf[sizeof(bypass_msg_out)]; + int val, err = 0; + + /* prepare the message buffer from static one */ + memcpy(buf, bypass_msg_out, sizeof(bypass_msg_out)); + + val = ucontrol->value.integer.value[0]; + dev_dbg(&chip->dev->dev, "snd_us16x08_bypass_put val: %d", val); + + buf[2] = val; + err = snd_us16x08_send_urb(chip, buf, sizeof(bypass_msg_out)); + + if (err == 0) + store->value = val; + + return err == 0 ? 1 : 0; +} + +static int snd_us16x08_bussout_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_bypass_store *store = + (struct snd_us16x08_bypass_store *) elem->private_data; + + // prepare message buffer + char buf[sizeof(bus_msg_out)]; + int val, err = 0; + + /* prepare the message buffer from static one */ + memcpy(buf, bus_msg_out, sizeof(bus_msg_out)); + + val = ucontrol->value.integer.value[0]; + dev_dbg(&chip->dev->dev, "snd_us16x08_bus_out_put val: %d", val); + + buf[2] = val; + err = snd_us16x08_send_urb(chip, buf, sizeof(bus_msg_out)); + + if (err == 0) + store->value = val; + + return err == 0 ? 1 : 0; +} + +/* +gets a current mixer value from common store + */ +static int snd_us16x08_mix_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_us16x08_fader *store = + (struct snd_us16x08_fader *) elem->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + int index = ucontrol->id.index; + + ucontrol->value.integer.value[0] = store->value[index]; + dev_dbg(&chip->dev->dev, + "snd_us16x08_mix_get: index:%d, val:%d\n", + index, store->value[index]); + + return 0; +} + +static int snd_us16x08_mix_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_fader *store = + (struct snd_us16x08_fader *) elem->private_data; + char buf[sizeof(mix_msg_in)]; + int val, err; + int index = ucontrol->id.index; + + + memcpy(buf, mix_msg_in, sizeof(mix_msg_in)); + + val = ucontrol->value.integer.value[0]; + + buf[8] = val - SND_US16X08_KCBIAS(kcontrol); + buf[6] = elem->head.id; + buf[5] = index + 1; + + err = snd_us16x08_send_urb(chip, buf, sizeof(mix_msg_in)); + + if (err == 0) + store->value[index] = val; + + return err == 0 ? 1 : 0; +} + +int snd_us16x08_mix_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->count = 1; + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->value.integer.max = SND_US16X08_KCMAX(kcontrol); + uinfo->value.integer.min = SND_US16X08_KCMIN(kcontrol); + uinfo->value.integer.step = SND_US16X08_KCSTEP(kcontrol); + return 0; +} + +static int snd_us16x08_switch_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + + uinfo->count = 1; + uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; + uinfo->value.integer.max = 1; + uinfo->value.integer.min = 0; + uinfo->value.integer.step = 1; + return 0; +} + + +static struct snd_kcontrol_new snd_us16x08_mix_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_mix_get, + .put = snd_us16x08_mix_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_FADER_BIAS, 1, 0, 133), +}; +static struct snd_kcontrol_new snd_us16x08_pan_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_mix_get, + .put = snd_us16x08_mix_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_FADER_BIAS, 1, 0, 254), +}; +static struct snd_kcontrol_new snd_us16x08_mute_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_switch_info, + .get = snd_us16x08_mix_get, + .put = snd_us16x08_mix_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 1), +}; +static struct snd_kcontrol_new snd_us16x08_phase_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 16, + .info = snd_us16x08_switch_info, + .get = snd_us16x08_mix_get, + .put = snd_us16x08_mix_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 1), +}; +static struct snd_kcontrol_new snd_us16x08_master_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 2, + .info = snd_us16x08_master_info, + .get = snd_us16x08_master_get, + .put = snd_us16x08_master_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_FADER_BIAS, 1, 0, 133), +}; +static struct snd_kcontrol_new snd_us16x08_route_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 8, + .info = snd_us16x08_route_info, + .get = snd_us16x08_route_get, + .put = snd_us16x08_route_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 9), +}; +static struct snd_kcontrol_new snd_us16x08_bypass_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 1, + .info = snd_us16x08_switch_info, + .get = snd_us16x08_bypass_get, + .put = snd_us16x08_bypass_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 1), +}; +static struct snd_kcontrol_new snd_us16x08_bussout_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 1, + .info = snd_us16x08_switch_info, + .get = snd_us16x08_bypass_get, + .put = snd_us16x08_bussout_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 1), +}; + +static struct snd_kcontrol_new snd_us16x08_master_mute_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .count = 1, + .info = snd_us16x08_switch_info, + .get = snd_us16x08_master_get, + .put = snd_us16x08_master_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 1), +}; + +struct snd_us16x08_fader *snd_us16x08_create_mix_store(int default_val) +{ + int i; + struct snd_us16x08_fader *tmp = + kmalloc(sizeof(struct snd_us16x08_fader), GFP_KERNEL); + + for (i = 0; i < SND_US16X08_MAX_CHANNELS; i++) + tmp->value[i] = default_val; + return tmp; +} + +struct snd_us16x08_bypass_store *snd_us16x08_create_single_store( + int default_val) +{ + struct snd_us16x08_bypass_store *tmp = + kmalloc(sizeof(struct snd_us16x08_bypass_store), GFP_KERNEL); + + tmp->value = default_val; + return tmp; +} + +void snd_us16x08_free_mix_store(struct snd_kcontrol *kctl) +{ + snd_usb_mixer_elem_free(kctl); +} + +/* +meter level transports + */ +static int snd_us16x08_meter_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->count = 1; + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->value.integer.max = 0x7FFF; + uinfo->value.integer.min = 0; + + return 0; +} + +static int snd_us16x08_meter_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + return 1; +} + +static int snd_us16x08_meter_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int i, set; + int val; + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_meter_store *store = elem->private_data; + struct snd_us16x08_comp_store* comp_store; + + if (elem) { + store = (struct snd_us16x08_meter_store *) elem->private_data; + chip = elem->head.mixer->chip; + } + + switch (kcontrol->private_value) { + case 0: + snd_us16x08_send_urb(chip, mix_init_msg1, 4); + snd_us16x08_recv_urb(chip, meter_urb_buf, + sizeof(meter_urb_buf)); + kcontrol->private_value++; + break; + case 1: + snd_us16x08_recv_urb(chip, meter_urb_buf, + sizeof(meter_urb_buf)); + kcontrol->private_value++; + break; + case 2: + snd_us16x08_recv_urb(chip, meter_urb_buf, + sizeof(meter_urb_buf)); + kcontrol->private_value++; + break; + case 3: + mix_init_msg2[2] = comp_channel++; + snd_us16x08_send_urb(chip, mix_init_msg2, 10); + snd_us16x08_recv_urb(chip, meter_urb_buf, + sizeof(meter_urb_buf)); + kcontrol->private_value = 0; + + comp_store = get_comp_store(); + if (comp_channel == 17) + comp_channel = 1; + while (!comp_store->valSwitch[comp_channel - 1] && + comp_channel < 17) + comp_channel++; + if (comp_channel == 17) + comp_channel = 1; + break; + + } + + for (set = 0; set < 6; set++) { + resp = (struct meter_resp *) &(meter_urb_buf[4 + set * 10]); + val = resp->c2 + (resp->c3 << 8); + if (resp->a0 == 0x61 && resp->a1 == 0x02 && + resp->a2 == 0x04 && resp->b0 == 0x62) { + if (resp->c0 == 0x72) + if (store) + store->meter_level[resp->b2 - 1] = val; + if (resp->c0 == 0xb2) { + if (store) + store->comp_level[resp->b2 - 1] = val; + } + } + if (resp->a0 == 0x61 && resp->a1 == 0x02 && + resp->a2 == 0x02 && resp->b0 == 0x62) { + if (store) + store->master_level[resp->b2 - 1] = val; + } + } + + for (i = 0; i < SND_US16X08_MAX_CHANNELS; i++) { + ucontrol->value.integer.value[i] = + store ? store->meter_level[i] : 0; + } + + ucontrol->value.integer.value[i++] = store ? store->master_level[0] : 0; + ucontrol->value.integer.value[i++] = store ? store->master_level[1] : 0; + + for (i = 2; i < SND_US16X08_MAX_CHANNELS + 2; i++) + ucontrol->value.integer.value[i + SND_US16X08_MAX_CHANNELS] = + store ? store->comp_level[i] : 0; + + return 1; +} +static struct snd_kcontrol_new snd_us16x08_meter_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READ, + .info = snd_us16x08_meter_info, + .get = snd_us16x08_meter_get, + .put = snd_us16x08_meter_put, +}; + +struct snd_us16x08_meter_store *snd_us16x08_create_meter_store(void) +{ + struct snd_us16x08_meter_store *tmp = + kzalloc(sizeof(struct snd_us16x08_meter_store), GFP_KERNEL); + + if (!tmp) + return NULL; + return tmp; + +} + +void snd_us16x08_free_meter_store(struct snd_kcontrol *kctl) +{ + kfree(kctl->private_data); +} + +int add_new_ctl(struct usb_mixer_interface *mixer, + const struct snd_kcontrol_new *ncontrol, + int index, int offset, int num, int val_type, + int channels, const char *name, const struct snd_us16x08_fader *opt, + opt_free freeer, struct usb_mixer_elem_info **elem_ret) +{ + struct snd_kcontrol *kctl; + struct usb_mixer_elem_info *elem; + int err; + + usb_audio_dbg(mixer->chip, "us16x08 add mixer %s\n", name); + + elem = kzalloc(sizeof(*elem), GFP_KERNEL); + if (!elem) + return -ENOMEM; + + elem->head.mixer = mixer; + elem->control = offset; + elem->idx_off = num; + elem->head.id = index; + elem->val_type = val_type; + elem->channels = channels; + elem->private_data = (void *) opt; + + kctl = snd_ctl_new1(ncontrol, elem); + if (!kctl) { + kfree(elem); + return -ENOMEM; + } + + kctl->private_free = freeer; + + strlcpy(kctl->id.name, name, sizeof(kctl->id.name)); + + err = snd_usb_mixer_add_control(&elem->head, kctl); + if (err < 0) + return err; + + if (elem_ret) + *elem_ret = elem; + + return 0; +} + +int snd_us16x08_controls_create(struct usb_mixer_interface *mixer) +{ + + int err; + char name[64]; + struct usb_mixer_elem_info *elem; + + + if (mixer->chip->num_interfaces > 0) { + struct snd_us16x08_fader *route_store = + snd_us16x08_create_mix_store(0); + + route_store->value[0] = 0; + route_store->value[1] = 1; + route_store->value[2] = 4; + route_store->value[3] = 5; + route_store->value[4] = 6; + route_store->value[5] = 7; + route_store->value[6] = 8; + route_store->value[7] = 9; + snprintf(name, sizeof(name), "Route"); + err = add_new_ctl(mixer, &snd_us16x08_route_ctl, + 0x00, 0x00, 0, + USB_MIXER_U8, 1, name, (void *) route_store, + snd_us16x08_free_mix_store, &elem); + if (err < 0) + return err; + + + snprintf(name, sizeof(name), "Master"); + err = add_new_ctl(mixer, &snd_us16x08_master_ctl, + SND_US16X08_ID_FADER, 0x00, 0, USB_MIXER_U8, 1, name, + (void *) snd_us16x08_create_mix_store(0), + snd_us16x08_free_mix_store, &elem); + if (err < 0) + return err; + + snprintf(name, sizeof(name), "Bypass"); + err = add_new_ctl(mixer, &snd_us16x08_bypass_ctl, + SND_US16X08_ID_BYPASS, 0x00, 0, USB_MIXER_U8, 1, name, + (void *) snd_us16x08_create_single_store(0), + snd_us16x08_free_mix_store, &elem); + if (err < 0) + return err; + + snprintf(name, sizeof(name), "Buss out"); + err = add_new_ctl(mixer, &snd_us16x08_bussout_ctl, + SND_US16X08_ID_BUSS_OUT, 0x00, 0, USB_MIXER_U8, 1, name, + (void *) snd_us16x08_create_single_store(0), + snd_us16x08_free_mix_store, &elem); + if (err < 0) + return err; + + snprintf(name, sizeof(name), "Master Mute"); + err = add_new_ctl(mixer, &snd_us16x08_master_mute_ctl, + SND_US16X08_ID_MUTE, 0x00, 0, USB_MIXER_U8, 1, name, + (void *) snd_us16x08_create_single_store(0), + snd_us16x08_free_mix_store, &elem); + if (err < 0) + return err; + + + snprintf(name, sizeof(name), "Phase"); + err = add_new_ctl(mixer, &snd_us16x08_phase_ctl, + SND_US16X08_ID_PHASE, 0x00, 0, USB_MIXER_U8, 1, name, + (void *) snd_us16x08_create_mix_store(0), + snd_us16x08_free_mix_store, &elem); + if (err < 0) + return err; + + snprintf(name, sizeof(name), "Fader"); + err = add_new_ctl(mixer, &snd_us16x08_mix_ctl, + SND_US16X08_ID_FADER, 0x00, 0, USB_MIXER_S16, 1, name, + (void *) snd_us16x08_create_mix_store(127), + snd_us16x08_free_mix_store, &elem); + if (err < 0) + return err; + + snprintf(name, sizeof(name), "3 Mute"); + err = add_new_ctl(mixer, &snd_us16x08_mute_ctl, + SND_US16X08_ID_MUTE, 0x00, 0, USB_MIXER_BOOLEAN, 1, + name, (void *) snd_us16x08_create_mix_store(0), + snd_us16x08_free_mix_store, &elem); + if (err < 0) + return err; + + snprintf(name, sizeof(name), "4 Pan"); + err = add_new_ctl(mixer, &snd_us16x08_pan_ctl, + SND_US16X08_ID_PAN, 0x00, 0, USB_MIXER_U16, 1, name, + (void *) snd_us16x08_create_mix_store(127), + snd_us16x08_free_mix_store, &elem); + if (err < 0) + return err; + + resp = kmalloc(sizeof(struct meter_resp), GFP_KERNEL); + if (!resp) + return -ENOMEM; + + snprintf(name, sizeof(name), "Z Meter"); + err = add_new_ctl(mixer, &snd_us16x08_meter_ctl, + SND_US16X08_ID_METER, 0x00, 0, USB_MIXER_U16, 1, name, + (void *) snd_us16x08_create_meter_store(), + snd_us16x08_free_meter_store, &elem); + if (err < 0) + return err; + + err = snd_us16x08_controls_create_eq(mixer); + if (err < 0) + return err; + + err = snd_us16x08_controls_create_comp(mixer); + if (err < 0) + return err; + + + } else { + usb_audio_dbg(mixer->chip, + "mixer->chip->num_interfaces == 0\n"); + } + + return 0; +} diff --git a/sound/usb/mixer_us16x08.h b/sound/usb/mixer_us16x08.h new file mode 100644 index 0000000..6423547 --- /dev/null +++ b/sound/usb/mixer_us16x08.h @@ -0,0 +1,136 @@ +#ifndef __USB_MIXER_US16X08_H +#define __USB_MIXER_US16X08_H + + +#define SND_US16X08_MIN_CHANNELS 0 +#define SND_US16X08_MAX_CHANNELS 16 + +/* define some bias, cause some alsa-mixers wont work with + * negative ranges or if mixer-min != 0 */ +#define SND_US16X08_NO_BIAS 0 +#define SND_US16X08_FADER_BIAS 127 +#define SND_US16X08_EQ_HIGHFREQ_BIAS 0x20 +#define SND_US16X08_COMP_THRESHOLD_BIAS 0x20 +#define SND_US16X08_COMP_ATTACK_BIAS 2 +#define SND_US16X08_COMP_RELEASE_BIAS 1 + +/* get macro for components of kcontrol private_value */ +#define SND_US16X08_KCBIAS(x) ((x->private_value >> 24) & 0xff) +#define SND_US16X08_KCSTEP(x) ((x->private_value >> 16) & 0xff) +#define SND_US16X08_KCMIN(x) ((x->private_value >> 8) & 0xff) +#define SND_US16X08_KCMAX(x) ((x->private_value >> 0) & 0xff) +/* set macro for kcontrol private_value */ +#define SND_US16X08_KCSET(bias, step, min, max) \ + ((bias << 24) | (step << 16) | (min << 8) | max) + +/* the URB request/type to control Tascam mixers */ +#define SND_US16X08_URB_REQUEST 0x1D +#define SND_US16X08_URB_REQUESTTYPE 0x40 + +/* the URB params to retrieve meter ranges */ +#define SND_US16X08_URB_METER_REQUEST 0x1e +#define SND_US16X08_URB_METER_REQUESTTYPE 0xc0 + +/* Common Channel control IDs */ +#define SND_US16X08_ID_BYPASS 0x45 +#define SND_US16X08_ID_BUSS_OUT 0x44 +#define SND_US16X08_ID_PHASE 0x85 +#define SND_US16X08_ID_MUTE 0x83 +#define SND_US16X08_ID_FADER 0x81 +#define SND_US16X08_ID_PAN 0x82 +#define SND_US16X08_ID_METER 0xB1 + +/* EQ level IDs */ +#define SND_US16X08_ID_EQLOWLEVEL 0x01 +#define SND_US16X08_ID_EQLOWMIDLEVEL 0x02 +#define SND_US16X08_ID_EQHIGHMIDLEVEL 0x03 +#define SND_US16X08_ID_EQHIGHLEVEL 0x04 + +/* EQ frequence IDs */ +#define SND_US16X08_ID_EQLOWFREQ 0x11 +#define SND_US16X08_ID_EQLOWMIDFREQ 0x12 +#define SND_US16X08_ID_EQHIGHMIDFREQ 0x13 +#define SND_US16X08_ID_EQHIGHFREQ 0x14 + +/* EQ width IDs */ +#define SND_US16X08_ID_EQLOWMIDWIDTH 0x22 +#define SND_US16X08_ID_EQHIGHMIDWIDTH 0x23 + +#define SND_US16X08_ID_EQENABLE 0x31 + +/* Compressor Ids */ +#define SND_US16X08_ID_COMP_THRESHOLD 0x01 +#define SND_US16X08_ID_COMP_RATIO 0x02 +#define SND_US16X08_ID_COMP_ATTACK 0x03 +#define SND_US16X08_ID_COMP_RELEASE 0x04 +#define SND_US16X08_ID_COMP_GAIN 0x05 +#define SND_US16X08_ID_COMP_SWITCH 0x06 + +struct snd_us16x08_fader { + uint8_t value[SND_US16X08_MAX_CHANNELS]; +}; + +struct snd_us16x08_eq_store { + uint8_t valdB[SND_US16X08_MAX_CHANNELS]; + uint8_t valFreq[SND_US16X08_MAX_CHANNELS]; + uint8_t valWidth[SND_US16X08_MAX_CHANNELS]; + uint8_t valSwitch[SND_US16X08_MAX_CHANNELS]; +}; + +struct snd_us16x08_eq_all_store { + struct snd_us16x08_eq_store *low_store; + struct snd_us16x08_eq_store *midlow_store; + struct snd_us16x08_eq_store *midhigh_store; + struct snd_us16x08_eq_store *high_store; +}; + +struct snd_us16x08_comp_store { + int8_t valThreshold[SND_US16X08_MAX_CHANNELS]; + uint8_t valAttack[SND_US16X08_MAX_CHANNELS]; + uint8_t valRelease[SND_US16X08_MAX_CHANNELS]; + uint8_t valRatio[SND_US16X08_MAX_CHANNELS]; + uint8_t valGain[SND_US16X08_MAX_CHANNELS]; + uint8_t valSwitch[SND_US16X08_MAX_CHANNELS]; +}; + +struct snd_us16x08_meter_store { + long meter_level[SND_US16X08_MAX_CHANNELS]; + long master_level[2]; /* level of meter for master output */ + long comp_level[16]; /* compressor reduction level of current channel */ +}; + +struct snd_us16x08_bypass_store { + int value; +}; + +typedef void(*opt_free)(struct snd_kcontrol *kctl); + + +/* |- Channel index (5) */ +/* | */ +/* v */ +#define CTLMSGHEAD_IN 0x61, 0x02, 0x04, 0x62, 0x02, 0x01 +#define CTLMSGHEAD_OUT 0x61, 0x02, 0x02, 0x62, 0x02, 0x01 + +int snd_us16x08_mix_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo); + +int snd_us16x08_controls_create(struct usb_mixer_interface *mixer); + +int snd_us16x08_send_urb(struct snd_usb_audio *chip, char *buf, int size); + +int snd_us16x08_cur_channel(void); + +int add_new_ctl(struct usb_mixer_interface *mixer, + const struct snd_kcontrol_new *ncontrol, + int index, int offset, int num, int val_type, int channels, + const char *name, const struct snd_us16x08_fader *opt, + opt_free freeer, struct usb_mixer_elem_info **elem_ret); + +int snd_us16x08_controls_create_eq(struct usb_mixer_interface *mixer); +int snd_us16x08_controls_create_comp(struct usb_mixer_interface *mixer); + +struct snd_us16x08_comp_store *get_comp_store(void); + +#endif /* __USB_MIXER_US16X08_H */ + diff --git a/sound/usb/mixer_us16x08_comp.c b/sound/usb/mixer_us16x08_comp.c new file mode 100644 index 0000000..2bc0146 --- /dev/null +++ b/sound/usb/mixer_us16x08_comp.c @@ -0,0 +1,316 @@ +#include <linux/slab.h> +#include <linux/usb.h> +#include <linux/usb/audio-v2.h> + +#include <sound/core.h> +#include <sound/control.h> +#include <sound/tlv.h> + +#include "usbaudio.h" +#include "mixer.h" +#include "helper.h" +#include "power.h" + +#include "mixer_us16x08.h" + +#define COMP_INFOPUTGET_NOLOG + +static char comp_msg[] = { + CTLMSGHEAD_IN, /* default message head, equal to all mixers */ + 0x91, + 0x02, + 0xf0, /* 0x08: Threshold db (8) (e0 ... 00) (+-0dB -- -32dB) x-32 */ + 0x92, + 0x02, + 0x0a, /* 0x0b: Ratio (0a,0b,0d,0f,11,14,19,1e,23,28,32,3c,50,a0,ff) */ + 0x93, + 0x02, + 0x02, /* 0x0e: Attack (0x02 ... 0xc0) (2ms ... 200ms) */ + 0x94, + 0x02, + 0x01, /* 0x11: Release (0x01 ... 0x64) (10ms ... 1000ms) x*10 */ + 0x95, + 0x02, + 0x03, /* 0x14: gain (0 ... 20) (0dB .. 20dB) */ + 0x96, + 0x02, + 0x01, + 0x97, + 0x02, + 0x01, /* 0x1a: main Comp switch (0 ... 1) (off ... on)) */ + 0x00, + 0x00 +}; + +static char ratio_map[] = { + 0x0a, 0x0b, 0x0d, 0x0f, 0x11, 0x14, 0x19, 0x1e, + 0x23, 0x28, 0x32, 0x3c, 0x50, 0xa0, 0xff +}; + +struct snd_us16x08_comp_store *comp_store; + +int snd_us16x08_compswitch_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->count = 1; + uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; + uinfo->value.integer.max = 1; + uinfo->value.integer.min = 0; + return 0; +} + +static int snd_us16x08_comp_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int val = 0; + int bias = (kcontrol->private_value >> 24) & 0xff; + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_comp_store *store = + ((struct snd_us16x08_comp_store *) elem->private_data); + int index = ucontrol->id.index; + + + switch (elem->head.id) { + case SND_US16X08_ID_COMP_THRESHOLD: + val = store->valThreshold[index]; + dev_info(&chip->dev->dev, + "snd_us16x08_comp_get name:Threshold index: %d val:%d", + index, val); + break; + case SND_US16X08_ID_COMP_RATIO: + val = store->valRatio[index]; + dev_info(&chip->dev->dev, + "snd_us16x08_comp_get name:Ratio index: %d val:%d", + index, val); + break; + case SND_US16X08_ID_COMP_ATTACK: + val = store->valAttack[index] - bias; + dev_info(&chip->dev->dev, + "snd_us16x08_comp_get name:Attack index: %d val:%d", + index, val); + break; + case SND_US16X08_ID_COMP_RELEASE: + val = store->valRelease[index] - bias; + dev_info(&chip->dev->dev, + "snd_us16x08_comp_get name:Release index: %d val:%d", + index, val); + break; + case SND_US16X08_ID_COMP_GAIN: + val = store->valGain[index]; + dev_info(&chip->dev->dev, + "snd_us16x08_comp_get name:Gain index: %d val:%d", + index, val); + break; + case SND_US16X08_ID_COMP_SWITCH: + val = store->valSwitch[index]; + dev_info(&chip->dev->dev, + "snd_us16x08_comp_get name:Switch index: %d val:%d", + index, val); + break; + } + ucontrol->value.integer.value[0] = val; + + return 0; +} + +static int snd_us16x08_comp_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_comp_store *store = + ((struct snd_us16x08_comp_store *) elem->private_data); + int index = ucontrol->id.index; + + char buf[sizeof(comp_msg)]; + int val, err = 0; + int bias = SND_US16X08_KCBIAS(kcontrol); + + memcpy(buf, comp_msg, sizeof(comp_msg)); + + val = ucontrol->value.integer.value[0]; + + switch (elem->head.id) { + case SND_US16X08_ID_COMP_THRESHOLD: + store->valThreshold[index] = val; + break; + case SND_US16X08_ID_COMP_RATIO: + store->valRatio[index] = val; + break; + case SND_US16X08_ID_COMP_ATTACK: + store->valAttack[index] = val + bias; + break; + case SND_US16X08_ID_COMP_RELEASE: + store->valRelease[index] = val + bias; + break; + case SND_US16X08_ID_COMP_GAIN: + store->valGain[index] = val; + break; + case SND_US16X08_ID_COMP_SWITCH: + store->valSwitch[index] = val; + break; + } + + buf[8] = store->valThreshold[index] - SND_US16X08_COMP_THRESHOLD_BIAS; + buf[11] = ratio_map[store->valRatio[index]]; + buf[14] = store->valAttack[index]; + buf[17] = store->valRelease[index]; + buf[20] = store->valGain[index]; + buf[26] = store->valSwitch[index]; + + buf[5] = index + 1; + + err = snd_us16x08_send_urb(chip, buf, sizeof(comp_msg)); + + return 1; +} + +static struct snd_kcontrol_new snd_us16x08_compswitch_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .name = "", + .count = 16, + .info = snd_us16x08_compswitch_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = ((SND_US16X08_NO_BIAS << 24) | /*bias*/ + (1 << 16) | /*step*/ + (0 << 8) | /*min*/ + (1)), /*max*/ +}; + +static struct snd_kcontrol_new snd_us16x08_comp_threshold_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .name = "", + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = ((SND_US16X08_COMP_THRESHOLD_BIAS << 24) | /*bias*/ + (1 << 16) | /*step*/ + (0 << 8) | /*min*/ + (0x20)), /*max*/ +}; +static struct snd_kcontrol_new snd_us16x08_comp_ratio_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .name = "", + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = ((SND_US16X08_NO_BIAS << 24) | /*bias*/ + (1 << 16) | /*step*/ + (0 << 8) | /*min*/ + (sizeof(ratio_map) - 1)), /*max*/ +}; +static struct snd_kcontrol_new snd_us16x08_comp_gain_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .name = "", + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 0x14), +}; +static struct snd_kcontrol_new snd_us16x08_comp_attack_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .name = "", + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = + SND_US16X08_KCSET(SND_US16X08_COMP_ATTACK_BIAS, 1, 0, 0xc6), +}; +static struct snd_kcontrol_new snd_us16x08_comp_release_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .name = "", + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_comp_get, + .put = snd_us16x08_comp_put, + .private_value = + SND_US16X08_KCSET(SND_US16X08_COMP_RELEASE_BIAS, 1, 0, 0x63), +}; + +struct snd_us16x08_comp_store *snd_us16x08_create_comp_store(void) +{ + int i = 0; + struct snd_us16x08_comp_store *tmp = + kmalloc(sizeof(struct snd_us16x08_comp_store), GFP_KERNEL); + + for (i = 0; i < SND_US16X08_MAX_CHANNELS; i++) { + tmp->valThreshold[i] = 0x20; /* 0dB */ + tmp->valRatio[i] = 0x00; /* 1:1 */ + tmp->valGain[i] = 0x00; /* 0dB */ + tmp->valSwitch[i] = 0x00; /* on */ + tmp->valAttack[i] = 0x02; /* 2ms */ + tmp->valRelease[i] = 0x01; /* 10ms */ + } + return tmp; +} + +int snd_us16x08_controls_create_comp(struct usb_mixer_interface *mixer) +{ + + int err; + char name[64]; + struct usb_mixer_elem_info *elem; + + comp_store = snd_us16x08_create_comp_store(); + + snprintf(name, sizeof(name), "A Comp"); + err = add_new_ctl(mixer, &snd_us16x08_compswitch_ctl, + SND_US16X08_ID_COMP_SWITCH, 0x00, 0, USB_MIXER_U8, 1, + name, (void *) comp_store, NULL, &elem); + if (err < 0) + return err; + + snprintf(name, sizeof(name), "B Thresh"); + err = add_new_ctl(mixer, &snd_us16x08_comp_threshold_ctl, + SND_US16X08_ID_COMP_THRESHOLD, 0x00, 0, USB_MIXER_U8, 1, name, + (void *) comp_store, NULL, &elem); + if (err < 0) + return err; + + snprintf(name, sizeof(name), "C Ratio"); + err = add_new_ctl(mixer, &snd_us16x08_comp_ratio_ctl, + SND_US16X08_ID_COMP_RATIO, 0x00, 0, USB_MIXER_U8, 1, name, + (void *) comp_store, NULL, &elem); + if (err < 0) + return err; + + snprintf(name, sizeof(name), "D Attack"); + err = add_new_ctl(mixer, &snd_us16x08_comp_attack_ctl, + SND_US16X08_ID_COMP_ATTACK, 0x00, 0, USB_MIXER_U8, 1, name, + (void *) comp_store, NULL, &elem); + if (err < 0) + return err; + + snprintf(name, sizeof(name), "E Release"); + err = add_new_ctl(mixer, &snd_us16x08_comp_release_ctl, + SND_US16X08_ID_COMP_RELEASE, 0x00, 0, USB_MIXER_U8, 1, name, + (void *) comp_store, NULL, &elem); + if (err < 0) + return err; + + snprintf(name, sizeof(name), "F Gain"); + err = add_new_ctl(mixer, &snd_us16x08_comp_gain_ctl, + SND_US16X08_ID_COMP_GAIN, 0x00, 0, USB_MIXER_U8, 1, name, + (void *) comp_store, NULL, &elem); + if (err < 0) + return err; + + return err; +} + +struct snd_us16x08_comp_store* get_comp_store(void) +{ + return comp_store; +} \ No newline at end of file diff --git a/sound/usb/mixer_us16x08_eq.c b/sound/usb/mixer_us16x08_eq.c new file mode 100644 index 0000000..dea2dfb --- /dev/null +++ b/sound/usb/mixer_us16x08_eq.c @@ -0,0 +1,407 @@ +#include <linux/slab.h> +#include <linux/usb.h> +#include <linux/usb/audio-v2.h> + +#include <sound/core.h> +#include <sound/control.h> +#include <sound/tlv.h> + + +#include "usbaudio.h" +#include "mixer.h" + +#include "mixer_us16x08.h" + + +#define EQ_INFOPUTGET_NOLOG + +static char eqs_msq[] = { + CTLMSGHEAD_IN, /* default message head, equal to all mixers */ + 0x51, /* 0x06: Controller ID */ + 0x02, + 0x04, /* 0x08: EQ set num (0x01..0x04) (LOW, LOWMID, HIGHMID, HIGH)) */ + 0x52, + 0x02, + 0x0c, /* 0x0b: value dB (0 ... 12) (-12db .. +12db) x-6 */ + 0x53, + 0x02, + 0x0f, /* 0x0e: value freq (32-47) (1.7kHz..18kHz) */ + 0x54, + 0x02, + 0x02, /* 0x11: band width (0-6) (Q16-Q0.25) 2^x/4 (EQ xxMID only) */ + 0x55, + 0x02, + 0x01, /* 0x14: main EQ switch (0 ... 1) (off ... on)) */ + 0x00, + 0x00 +}; + +int snd_us16x08_eqswitch_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->count = 1; + uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; + uinfo->value.integer.max = 1; + uinfo->value.integer.min = 0; + return 0; +} + +static int snd_us16x08_eqswitch_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int val = 0; + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_us16x08_eq_all_store *store = + ((struct snd_us16x08_eq_all_store *) elem->private_data); + int index = ucontrol->id.index; + + val = store->low_store->valSwitch[index]; + ucontrol->value.integer.value[0] = val; + + return 0; +} + +static int snd_us16x08_eqswitch_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_eq_all_store *store = + ((struct snd_us16x08_eq_all_store *) elem->private_data); + int index = ucontrol->id.index; + + char buf[sizeof(eqs_msq)]; + int val, err = 0; + + val = ucontrol->value.integer.value[0]; + + memcpy(buf, eqs_msq, sizeof(eqs_msq)); + + store->low_store->valSwitch[index] = val; + store->midlow_store->valSwitch[index] = val; + store->midhigh_store->valSwitch[index] = val; + store->high_store->valSwitch[index] = val; + + buf[5] = index + 1; + + buf[20] = store->low_store->valSwitch[index]; + buf[17] = store->low_store->valWidth[index]; + buf[14] = store->low_store->valFreq[index]; + buf[11] = store->low_store->valdB[index]; + buf[8] = 0x01; + err = snd_us16x08_send_urb(chip, buf, sizeof(eqs_msq)); + + udelay(15000); + buf[20] = store->midlow_store->valSwitch[index]; + buf[17] = store->midlow_store->valWidth[index]; + buf[14] = store->midlow_store->valFreq[index]; + buf[11] = store->midlow_store->valdB[index]; + buf[8] = 0x02; + err = snd_us16x08_send_urb(chip, buf, sizeof(eqs_msq)); + + udelay(15000); + buf[20] = store->midhigh_store->valSwitch[index]; + buf[17] = store->midhigh_store->valWidth[index]; + buf[14] = store->midhigh_store->valFreq[index]; + buf[11] = store->midhigh_store->valdB[index]; + buf[8] = 0x03; + err = snd_us16x08_send_urb(chip, buf, sizeof(eqs_msq)); + + udelay(15000); + buf[20] = store->high_store->valSwitch[index]; + buf[17] = store->high_store->valWidth[index]; + buf[14] = store->high_store->valFreq[index]; + buf[11] = store->high_store->valdB[index]; + buf[8] = 0x04; + err = snd_us16x08_send_urb(chip, buf, sizeof(eqs_msq)); + + return 1; +} + +static int snd_us16x08_eq_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int val = 0; + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_us16x08_eq_store *store = + ((struct snd_us16x08_eq_store *) elem->private_data); + int index = ucontrol->id.index; + + + switch (elem->head.id & 0xf0) { + case 0x00: + val = store->valdB[index]; + break; + case 0x10: + val = store->valFreq[index] - + ((kcontrol->private_value >> 24) & 0xff); + break; + case 0x20: + val = store->valWidth[index]; + break; + } + ucontrol->value.integer.value[0] = val; + + return 0; +} + +static int snd_us16x08_eq_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_elem_info *elem = kcontrol->private_data; + struct snd_usb_audio *chip = elem->head.mixer->chip; + struct snd_us16x08_eq_store *store = + ((struct snd_us16x08_eq_store *) elem->private_data); + int index = ucontrol->id.index; + + char buf[sizeof(eqs_msq)]; + int val, err = 0; + + memcpy(buf, eqs_msq, sizeof(eqs_msq)); + + val = ucontrol->value.integer.value[0] + + ((kcontrol->private_value >> 24) & 0xff); + + switch (elem->head.id & 0xf0) { + case 0x00: /* level dB */ + store->valdB[index] = val; + break; + case 0x10: + store->valFreq[index] = val; + break; + case 0x20: + store->valWidth[index] = val; + break; + } + + buf[20] = store->valSwitch[index]; + buf[17] = store->valWidth[index]; + buf[14] = store->valFreq[index]; + buf[11] = store->valdB[index]; + + buf[5] = index + 1; + + buf[8] = (elem->head.id & 0x0F); + err = snd_us16x08_send_urb(chip, buf, sizeof(eqs_msq)); + + return 1; +} + +static struct snd_kcontrol_new snd_us16x08_eqlevel_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .name = "", + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 24), +}; + +static struct snd_kcontrol_new snd_us16x08_eqLowFreq_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .name = "", + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 0x1F), +}; + +static struct snd_kcontrol_new snd_us16x08_eqMidFreq_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .name = "", + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 0x3F), +}; + +static struct snd_kcontrol_new snd_us16x08_eqMidWidth_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .name = "", + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 0x06), +}; + +static struct snd_kcontrol_new snd_us16x08_eqHighFreq_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .name = "", + .count = 16, + .info = snd_us16x08_mix_info, + .get = snd_us16x08_eq_get, + .put = snd_us16x08_eq_put, + .private_value = + SND_US16X08_KCSET(SND_US16X08_EQ_HIGHFREQ_BIAS, 1, 0, 0x1F), +}; + +static struct snd_kcontrol_new snd_us16x08_eqswitch_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .name = "", + .count = 16, + .info = snd_us16x08_eqswitch_info, + .get = snd_us16x08_eqswitch_get, + .put = snd_us16x08_eqswitch_put, + .private_value = SND_US16X08_KCSET(SND_US16X08_NO_BIAS, 1, 0, 1), +}; + +struct snd_us16x08_eq_store *snd_us16x08_create_eq_store(int index) +{ + int i = 0; + struct snd_us16x08_eq_store *tmp = + kmalloc(sizeof(struct snd_us16x08_eq_store), GFP_KERNEL); + + for (i = 0; i < SND_US16X08_MAX_CHANNELS; i++) { + switch (index) { + case 0x01: /* EQ Low */ + tmp->valdB[i] = 0x0c; + tmp->valFreq[i] = 0x05; + tmp->valWidth[i] = 0xff; + tmp->valSwitch[i] = 0x01; /* on */ + break; + case 0x02: /* EQ Mid low */ + tmp->valdB[i] = 0x0c; + tmp->valFreq[i] = 0x0e; + tmp->valWidth[i] = 0x02; + tmp->valSwitch[i] = 0x01; /* on */ + break; + case 0x03: /* EQ Mid High */ + tmp->valdB[i] = 0x0c; + tmp->valFreq[i] = 0x1b; + tmp->valWidth[i] = 0x02; + tmp->valSwitch[i] = 0x01; /* on */ + break; + case 0x04: /* EQ Mid Low */ + tmp->valdB[i] = 0x0c; + tmp->valFreq[i] = 0x2f; + tmp->valWidth[i] = 0xff; + tmp->valSwitch[i] = 0x01; /* on */ + break; + } + } + return tmp; +} + +void snd_us16x08_free_eq_store(struct snd_kcontrol *kctl) +{ + snd_usb_mixer_elem_free(kctl); +} + +int snd_us16x08_controls_create_eq(struct usb_mixer_interface *mixer) +{ + + int err; + char name[64]; + struct usb_mixer_elem_info *elem; + + struct snd_us16x08_eq_store *eq_low_store = + snd_us16x08_create_eq_store(0x01); + struct snd_us16x08_eq_store *eq_midlow_store = + snd_us16x08_create_eq_store(0x02); + struct snd_us16x08_eq_store *eq_midhigh_store = + snd_us16x08_create_eq_store(0x03); + struct snd_us16x08_eq_store *eq_high_store = + snd_us16x08_create_eq_store(0x04); + struct snd_us16x08_eq_all_store *eq_all_store = + kmalloc(sizeof(struct snd_us16x08_eq_all_store), GFP_KERNEL); + + eq_all_store->low_store = eq_low_store; + eq_all_store->midlow_store = eq_midlow_store; + eq_all_store->midhigh_store = eq_midhigh_store; + eq_all_store->high_store = eq_high_store; + + + snprintf(name, sizeof(name), "5 Low"); + err = add_new_ctl(mixer, &snd_us16x08_eqlevel_ctl, + SND_US16X08_ID_EQLOWLEVEL, 0x00, 0, USB_MIXER_U8, 1, name, + (void *) eq_low_store, snd_us16x08_free_eq_store, &elem); + if (err < 0) + return err; + + snprintf(name, sizeof(name), "51 LowFreq"); + err = add_new_ctl(mixer, &snd_us16x08_eqLowFreq_ctl, + SND_US16X08_ID_EQLOWFREQ, 0x00, 0, + USB_MIXER_U8, 1, name, (void *) eq_low_store, NULL, &elem); + if (err < 0) + return err; + + + + snprintf(name, sizeof(name), "6 MLow"); + err = add_new_ctl(mixer, &snd_us16x08_eqlevel_ctl, + SND_US16X08_ID_EQLOWMIDLEVEL, 0x00, 0, USB_MIXER_U8, 1, name, + (void *) eq_midlow_store, snd_us16x08_free_eq_store, &elem); + if (err < 0) + return err; + + snprintf(name, sizeof(name), "61 MLowFreq"); + err = add_new_ctl(mixer, &snd_us16x08_eqMidFreq_ctl, + SND_US16X08_ID_EQLOWMIDFREQ, 0x00, 0, USB_MIXER_U8, 1, name, + (void *) eq_midlow_store, NULL, &elem); + if (err < 0) + return err; + + snprintf(name, sizeof(name), "62 MLowWidth"); + err = add_new_ctl(mixer, &snd_us16x08_eqMidWidth_ctl, + SND_US16X08_ID_EQLOWMIDWIDTH, 0x00, 0, USB_MIXER_U8, 1, name, + (void *) eq_midlow_store, NULL, &elem); + if (err < 0) + return err; + + snprintf(name, sizeof(name), "7 MHigh"); + err = add_new_ctl(mixer, &snd_us16x08_eqlevel_ctl, + SND_US16X08_ID_EQHIGHMIDLEVEL, 0x00, 0, USB_MIXER_U8, 1, name, + (void *) eq_midhigh_store, NULL, &elem); + if (err < 0) + return err; + + snprintf(name, sizeof(name), "71 MHiFreq"); + err = add_new_ctl(mixer, &snd_us16x08_eqMidFreq_ctl, + SND_US16X08_ID_EQHIGHMIDFREQ, 0x00, 0, + USB_MIXER_U8, 1, name, (void *) eq_midhigh_store, NULL, + &elem); + if (err < 0) + return err; + + snprintf(name, sizeof(name), "72 MHiWidth"); + err = add_new_ctl(mixer, &snd_us16x08_eqMidWidth_ctl, + SND_US16X08_ID_EQHIGHMIDWIDTH, 0x00, 0, + USB_MIXER_U8, 1, name, (void *) eq_midhigh_store, NULL, + &elem); + if (err < 0) + return err; + + snprintf(name, sizeof(name), "8 High"); + err = add_new_ctl(mixer, &snd_us16x08_eqlevel_ctl, + SND_US16X08_ID_EQHIGHLEVEL, 0x00, 0, USB_MIXER_U8, 1, name, + (void *) eq_high_store, snd_us16x08_free_eq_store, &elem); + if (err < 0) + return err; + + snprintf(name, sizeof(name), "81 HighFreq"); + err = add_new_ctl(mixer, &snd_us16x08_eqHighFreq_ctl, + SND_US16X08_ID_EQHIGHFREQ, 0x00, 0, USB_MIXER_U8, 1, name, + (void *) eq_high_store, NULL, &elem); + if (err < 0) + return err; + + snprintf(name, sizeof(name), "9 EQ"); + err = add_new_ctl(mixer, &snd_us16x08_eqswitch_ctl, + SND_US16X08_ID_EQENABLE, 0x00, 0, USB_MIXER_BOOLEAN, 1, name, + (void *) eq_all_store, NULL, + &elem); + if (err < 0) + return err; + + + return 0; +}

2 3

Re: [alsa-devel] [linux-sunxi] Re: [PATCH v3 05/10] arm: dts: sun8i: split Allwinner H3 .dtsi
by Icenowy Zheng 30 Jan '17

30 Jan '17

2017年1月30日 09:42于 André Przywara <andre.przywara(a)arm.com>写道： > > On 29/01/17 02:33, Icenowy Zheng wrote: > > From: Andre Przywara <andre.przywara(a)arm.com> > > (Adding DT folks to CC:) > > see below ... > > > The new Allwinner H5 SoC is pin-compatible to the H3 SoC, but with the > > Cortex-A7 cores replaced by Cortex-A53 cores and the MMC controller > > updated. So we should really share almost the whole .dtsi. > > In preparation for that move the peripheral parts of the existing > > sun8i-h3.dtsi into a new sun8i-h3-h5.dtsi. > > The actual sun8i-h3.dtsi then includes that and defines the H3 specific > > parts on top of it. > > On the way get rid of skeleton.dtsi, as recommended in that very file. > > > > Signed-off-by: Andre Przywara <andre.przywara(a)arm.com> > > [Icenowy: also split out mmc, as well as pio and ccu's compatible] > > Signed-off-by: Icenowy Zheng <icenowy(a)aosc.xyz> > > --- > > Changes in v3: > > - Use label-based syntax to reference nodes in H3 DTSI file. > > Changes in v2: > > - Rebase on current linux-next (because of the add of audio codec) > > > > arch/arm/boot/dts/sun8i-h3.dtsi | 571 +++---------------------------------- > > arch/arm/boot/dts/sunxi-h3-h5.dtsi | 557 ++++++++++++++++++++++++++++++++++++ > > 2 files changed, 598 insertions(+), 530 deletions(-) > > create mode 100644 arch/arm/boot/dts/sunxi-h3-h5.dtsi > > > > diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi > > index 08fd0860bb6b..f3a3033789b9 100644 > > --- a/arch/arm/boot/dts/sun8i-h3.dtsi > > +++ b/arch/arm/boot/dts/sun8i-h3.dtsi > > @@ -40,12 +40,7 @@ > > * OTHER DEALINGS IN THE SOFTWARE. > > */ > > > > -#include "skeleton.dtsi" > > - > > -#include <dt-bindings/clock/sun8i-h3-ccu.h> > > -#include <dt-bindings/interrupt-controller/arm-gic.h> > > -#include <dt-bindings/pinctrl/sun4i-a10.h> > > -#include <dt-bindings/reset/sun8i-h3-ccu.h> > > +#include "sunxi-h3-h5.dtsi" > > > > / { > > interrupt-parent = <&gic>; > > @@ -87,489 +82,7 @@ > > <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; > > }; > > > > - clocks { > > - #address-cells = <1>; > > - #size-cells = <1>; > > - ranges; > > - > > - osc24M: osc24M_clk { > > - #clock-cells = <0>; > > - compatible = "fixed-clock"; > > - clock-frequency = <24000000>; > > - clock-output-names = "osc24M"; > > - }; > > - > > - osc32k: osc32k_clk { > > - #clock-cells = <0>; > > - compatible = "fixed-clock"; > > - clock-frequency = <32768>; > > - clock-output-names = "osc32k"; > > - }; > > - > > - apb0: apb0_clk { > > - compatible = "fixed-factor-clock"; > > - #clock-cells = <0>; > > - clock-div = <1>; > > - clock-mult = <1>; > > - clocks = <&osc24M>; > > - clock-output-names = "apb0"; > > - }; > > - > > - apb0_gates: clk@01f01428 { > > - compatible = "allwinner,sun8i-h3-apb0-gates-clk", > > - "allwinner,sun4i-a10-gates-clk"; > > - reg = <0x01f01428 0x4>; > > - #clock-cells = <1>; > > - clocks = <&apb0>; > > - clock-indices = <0>, <1>; > > - clock-output-names = "apb0_pio", "apb0_ir"; > > - }; > > - > > - ir_clk: ir_clk@01f01454 { > > - compatible = "allwinner,sun4i-a10-mod0-clk"; > > - reg = <0x01f01454 0x4>; > > - #clock-cells = <0>; > > - clocks = <&osc32k>, <&osc24M>; > > - clock-output-names = "ir"; > > - }; > > - }; > > - > > soc { > > - compatible = "simple-bus"; > > - #address-cells = <1>; > > - #size-cells = <1>; > > - ranges; > > - > > - dma: dma-controller@01c02000 { > > - compatible = "allwinner,sun8i-h3-dma"; > > - reg = <0x01c02000 0x1000>; > > - interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; > > - clocks = <&ccu CLK_BUS_DMA>; > > - resets = <&ccu RST_BUS_DMA>; > > - #dma-cells = <1>; > > - }; > > - > > - mmc0: mmc@01c0f000 { > > - compatible = "allwinner,sun7i-a20-mmc"; > > - reg = <0x01c0f000 0x1000>; > > - clocks = <&ccu CLK_BUS_MMC0>, > > - <&ccu CLK_MMC0>, > > - <&ccu CLK_MMC0_OUTPUT>, > > - <&ccu CLK_MMC0_SAMPLE>; > > - clock-names = "ahb", > > - "mmc", > > - "output", > > - "sample"; > > - resets = <&ccu RST_BUS_MMC0>; > > - reset-names = "ahb"; > > - interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; > > - status = "disabled"; > > - #address-cells = <1>; > > - #size-cells = <0>; > > - }; > > - > > - mmc1: mmc@01c10000 { > > - compatible = "allwinner,sun7i-a20-mmc"; > > - reg = <0x01c10000 0x1000>; > > - clocks = <&ccu CLK_BUS_MMC1>, > > - <&ccu CLK_MMC1>, > > - <&ccu CLK_MMC1_OUTPUT>, > > - <&ccu CLK_MMC1_SAMPLE>; > > - clock-names = "ahb", > > - "mmc", > > - "output", > > - "sample"; > > - resets = <&ccu RST_BUS_MMC1>; > > - reset-names = "ahb"; > > - interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; > > - status = "disabled"; > > - #address-cells = <1>; > > - #size-cells = <0>; > > - }; > > - > > - mmc2: mmc@01c11000 { > > - compatible = "allwinner,sun7i-a20-mmc"; > > - reg = <0x01c11000 0x1000>; > > - clocks = <&ccu CLK_BUS_MMC2>, > > - <&ccu CLK_MMC2>, > > - <&ccu CLK_MMC2_OUTPUT>, > > - <&ccu CLK_MMC2_SAMPLE>; > > - clock-names = "ahb", > > - "mmc", > > - "output", > > - "sample"; > > - resets = <&ccu RST_BUS_MMC2>; > > - reset-names = "ahb"; > > - interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; > > - status = "disabled"; > > - #address-cells = <1>; > > - #size-cells = <0>; > > - }; > > - > > - usbphy: phy@01c19400 { > > - compatible = "allwinner,sun8i-h3-usb-phy"; > > - reg = <0x01c19400 0x2c>, > > - <0x01c1a800 0x4>, > > - <0x01c1b800 0x4>, > > - <0x01c1c800 0x4>, > > - <0x01c1d800 0x4>; > > - reg-names = "phy_ctrl", > > - "pmu0", > > - "pmu1", > > - "pmu2", > > - "pmu3"; > > - clocks = <&ccu CLK_USB_PHY0>, > > - <&ccu CLK_USB_PHY1>, > > - <&ccu CLK_USB_PHY2>, > > - <&ccu CLK_USB_PHY3>; > > - clock-names = "usb0_phy", > > - "usb1_phy", > > - "usb2_phy", > > - "usb3_phy"; > > - resets = <&ccu RST_USB_PHY0>, > > - <&ccu RST_USB_PHY1>, > > - <&ccu RST_USB_PHY2>, > > - <&ccu RST_USB_PHY3>; > > - reset-names = "usb0_reset", > > - "usb1_reset", > > - "usb2_reset", > > - "usb3_reset"; > > - status = "disabled"; > > - #phy-cells = <1>; > > - }; > > - > > - ehci1: usb@01c1b000 { > > - compatible = "allwinner,sun8i-h3-ehci", "generic-ehci"; > > - reg = <0x01c1b000 0x100>; > > - interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; > > - clocks = <&ccu CLK_BUS_EHCI1>, <&ccu CLK_BUS_OHCI1>; > > - resets = <&ccu RST_BUS_EHCI1>, <&ccu RST_BUS_OHCI1>; > > - phys = <&usbphy 1>; > > - phy-names = "usb"; > > - status = "disabled"; > > - }; > > - > > - ohci1: usb@01c1b400 { > > - compatible = "allwinner,sun8i-h3-ohci", "generic-ohci"; > > - reg = <0x01c1b400 0x100>; > > - interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; > > - clocks = <&ccu CLK_BUS_EHCI1>, <&ccu CLK_BUS_OHCI1>, > > - <&ccu CLK_USB_OHCI1>; > > - resets = <&ccu RST_BUS_EHCI1>, <&ccu RST_BUS_OHCI1>; > > - phys = <&usbphy 1>; > > - phy-names = "usb"; > > - status = "disabled"; > > - }; > > - > > - ehci2: usb@01c1c000 { > > - compatible = "allwinner,sun8i-h3-ehci", "generic-ehci"; > > - reg = <0x01c1c000 0x100>; > > - interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; > > - clocks = <&ccu CLK_BUS_EHCI2>, <&ccu CLK_BUS_OHCI2>; > > - resets = <&ccu RST_BUS_EHCI2>, <&ccu RST_BUS_OHCI2>; > > - phys = <&usbphy 2>; > > - phy-names = "usb"; > > - status = "disabled"; > > - }; > > - > > - ohci2: usb@01c1c400 { > > - compatible = "allwinner,sun8i-h3-ohci", "generic-ohci"; > > - reg = <0x01c1c400 0x100>; > > - interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; > > - clocks = <&ccu CLK_BUS_EHCI2>, <&ccu CLK_BUS_OHCI2>, > > - <&ccu CLK_USB_OHCI2>; > > - resets = <&ccu RST_BUS_EHCI2>, <&ccu RST_BUS_OHCI2>; > > - phys = <&usbphy 2>; > > - phy-names = "usb"; > > - status = "disabled"; > > - }; > > - > > - ehci3: usb@01c1d000 { > > - compatible = "allwinner,sun8i-h3-ehci", "generic-ehci"; > > - reg = <0x01c1d000 0x100>; > > - interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; > > - clocks = <&ccu CLK_BUS_EHCI3>, <&ccu CLK_BUS_OHCI3>; > > - resets = <&ccu RST_BUS_EHCI3>, <&ccu RST_BUS_OHCI3>; > > - phys = <&usbphy 3>; > > - phy-names = "usb"; > > - status = "disabled"; > > - }; > > - > > - ohci3: usb@01c1d400 { > > - compatible = "allwinner,sun8i-h3-ohci", "generic-ohci"; > > - reg = <0x01c1d400 0x100>; > > - interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; > > - clocks = <&ccu CLK_BUS_EHCI3>, <&ccu CLK_BUS_OHCI3>, > > - <&ccu CLK_USB_OHCI3>; > > - resets = <&ccu RST_BUS_EHCI3>, <&ccu RST_BUS_OHCI3>; > > - phys = <&usbphy 3>; > > - phy-names = "usb"; > > - status = "disabled"; > > - }; > > - > > - ccu: clock@01c20000 { > > - compatible = "allwinner,sun8i-h3-ccu"; > > - reg = <0x01c20000 0x400>; > > - clocks = <&osc24M>, <&osc32k>; > > - clock-names = "hosc", "losc"; > > - #clock-cells = <1>; > > - #reset-cells = <1>; > > - }; > > - > > - pio: pinctrl@01c20800 { > > - compatible = "allwinner,sun8i-h3-pinctrl"; > > - reg = <0x01c20800 0x400>; > > - interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, > > - <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; > > - clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>; > > - clock-names = "apb", "hosc", "losc"; > > - gpio-controller; > > - #gpio-cells = <3>; > > - interrupt-controller; > > - #interrupt-cells = <3>; > > - > > - i2c0_pins: i2c0 { > > - pins = "PA11", "PA12"; > > - function = "i2c0"; > > - }; > > - > > - i2c1_pins: i2c1 { > > - pins = "PA18", "PA19"; > > - function = "i2c1"; > > - }; > > - > > - i2c2_pins: i2c2 { > > - pins = "PE12", "PE13"; > > - function = "i2c2"; > > - }; > > - > > - mmc0_pins_a: mmc0@0 { > > - pins = "PF0", "PF1", "PF2", "PF3", > > - "PF4", "PF5"; > > - function = "mmc0"; > > - drive-strength = <30>; > > - bias-pull-up; > > - }; > > - > > - mmc0_cd_pin: mmc0_cd_pin@0 { > > - pins = "PF6"; > > - function = "gpio_in"; > > - bias-pull-up; > > - }; > > - > > - mmc1_pins_a: mmc1@0 { > > - pins = "PG0", "PG1", "PG2", "PG3", > > - "PG4", "PG5"; > > - function = "mmc1"; > > - drive-strength = <30>; > > - bias-pull-up; > > - }; > > - > > - mmc2_8bit_pins: mmc2_8bit { > > - pins = "PC5", "PC6", "PC8", > > - "PC9", "PC10", "PC11", > > - "PC12", "PC13", "PC14", > > - "PC15", "PC16"; > > - function = "mmc2"; > > - drive-strength = <30>; > > - bias-pull-up; > > - }; > > - > > - spi0_pins: spi0 { > > - pins = "PC0", "PC1", "PC2", "PC3"; > > - function = "spi0"; > > - }; > > - > > - spi1_pins: spi1 { > > - pins = "PA15", "PA16", "PA14", "PA13"; > > - function = "spi1"; > > - }; > > - > > - uart0_pins_a: uart0@0 { > > - pins = "PA4", "PA5"; > > - function = "uart0"; > > - }; > > - > > - uart1_pins: uart1 { > > - pins = "PG6", "PG7"; > > - function = "uart1"; > > - }; > > - > > - uart1_rts_cts_pins: uart1_rts_cts { > > - pins = "PG8", "PG9"; > > - function = "uart1"; > > - }; > > - > > - uart2_pins: uart2 { > > - pins = "PA0", "PA1"; > > - function = "uart2"; > > - }; > > - > > - uart3_pins: uart3 { > > - pins = "PA13", "PA14"; > > - function = "uart3"; > > - }; > > - }; > > - > > - timer@01c20c00 { > > - compatible = "allwinner,sun4i-a10-timer"; > > - reg = <0x01c20c00 0xa0>; > > - interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, > > - <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; > > - clocks = <&osc24M>; > > - }; > > - > > - spi0: spi@01c68000 { > > - compatible = "allwinner,sun8i-h3-spi"; > > - reg = <0x01c68000 0x1000>; > > - interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; > > - clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>; > > - clock-names = "ahb", "mod"; > > - dmas = <&dma 23>, <&dma 23>; > > - dma-names = "rx", "tx"; > > - pinctrl-names = "default"; > > - pinctrl-0 = <&spi0_pins>; > > - resets = <&ccu RST_BUS_SPI0>; > > - status = "disabled"; > > - #address-cells = <1>; > > - #size-cells = <0>; > > - }; > > - > > - spi1: spi@01c69000 { > > - compatible = "allwinner,sun8i-h3-spi"; > > - reg = <0x01c69000 0x1000>; > > - interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; > > - clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>; > > - clock-names = "ahb", "mod"; > > - dmas = <&dma 24>, <&dma 24>; > > - dma-names = "rx", "tx"; > > - pinctrl-names = "default"; > > - pinctrl-0 = <&spi1_pins>; > > - resets = <&ccu RST_BUS_SPI1>; > > - status = "disabled"; > > - #address-cells = <1>; > > - #size-cells = <0>; > > - }; > > - > > - wdt0: watchdog@01c20ca0 { > > - compatible = "allwinner,sun6i-a31-wdt"; > > - reg = <0x01c20ca0 0x20>; > > - interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; > > - }; > > - > > - pwm: pwm@01c21400 { > > - compatible = "allwinner,sun8i-h3-pwm"; > > - reg = <0x01c21400 0x8>; > > - clocks = <&osc24M>; > > - #pwm-cells = <3>; > > - status = "disabled"; > > - }; > > - > > - codec: codec@01c22c00 { > > - #sound-dai-cells = <0>; > > - compatible = "allwinner,sun8i-h3-codec"; > > - reg = <0x01c22c00 0x400>; > > - interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; > > - clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>; > > - clock-names = "apb", "codec"; > > - resets = <&ccu RST_BUS_CODEC>; > > - dmas = <&dma 15>, <&dma 15>; > > - dma-names = "rx", "tx"; > > - allwinner,codec-analog-controls = <&codec_analog>; > > - status = "disabled"; > > - }; > > - > > - uart0: serial@01c28000 { > > - compatible = "snps,dw-apb-uart"; > > - reg = <0x01c28000 0x400>; > > - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; > > - reg-shift = <2>; > > - reg-io-width = <4>; > > - clocks = <&ccu CLK_BUS_UART0>; > > - resets = <&ccu RST_BUS_UART0>; > > - dmas = <&dma 6>, <&dma 6>; > > - dma-names = "rx", "tx"; > > - status = "disabled"; > > - }; > > - > > - uart1: serial@01c28400 { > > - compatible = "snps,dw-apb-uart"; > > - reg = <0x01c28400 0x400>; > > - interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; > > - reg-shift = <2>; > > - reg-io-width = <4>; > > - clocks = <&ccu CLK_BUS_UART1>; > > - resets = <&ccu RST_BUS_UART1>; > > - dmas = <&dma 7>, <&dma 7>; > > - dma-names = "rx", "tx"; > > - status = "disabled"; > > - }; > > - > > - uart2: serial@01c28800 { > > - compatible = "snps,dw-apb-uart"; > > - reg = <0x01c28800 0x400>; > > - interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; > > - reg-shift = <2>; > > - reg-io-width = <4>; > > - clocks = <&ccu CLK_BUS_UART2>; > > - resets = <&ccu RST_BUS_UART2>; > > - dmas = <&dma 8>, <&dma 8>; > > - dma-names = "rx", "tx"; > > - status = "disabled"; > > - }; > > - > > - uart3: serial@01c28c00 { > > - compatible = "snps,dw-apb-uart"; > > - reg = <0x01c28c00 0x400>; > > - interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; > > - reg-shift = <2>; > > - reg-io-width = <4>; > > - clocks = <&ccu CLK_BUS_UART3>; > > - resets = <&ccu RST_BUS_UART3>; > > - dmas = <&dma 9>, <&dma 9>; > > - dma-names = "rx", "tx"; > > - status = "disabled"; > > - }; > > - > > - i2c0: i2c@01c2ac00 { > > - compatible = "allwinner,sun6i-a31-i2c"; > > - reg = <0x01c2ac00 0x400>; > > - interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; > > - clocks = <&ccu CLK_BUS_I2C0>; > > - resets = <&ccu RST_BUS_I2C0>; > > - pinctrl-names = "default"; > > - pinctrl-0 = <&i2c0_pins>; > > - status = "disabled"; > > - #address-cells = <1>; > > - #size-cells = <0>; > > - }; > > - > > - i2c1: i2c@01c2b000 { > > - compatible = "allwinner,sun6i-a31-i2c"; > > - reg = <0x01c2b000 0x400>; > > - interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; > > - clocks = <&ccu CLK_BUS_I2C1>; > > - resets = <&ccu RST_BUS_I2C1>; > > - pinctrl-names = "default"; > > - pinctrl-0 = <&i2c1_pins>; > > - status = "disabled"; > > - #address-cells = <1>; > > - #size-cells = <0>; > > - }; > > - > > - i2c2: i2c@01c2b400 { > > - compatible = "allwinner,sun6i-a31-i2c"; > > - reg = <0x01c2b000 0x400>; > > - interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; > > - clocks = <&ccu CLK_BUS_I2C2>; > > - resets = <&ccu RST_BUS_I2C2>; > > - pinctrl-names = "default"; > > - pinctrl-0 = <&i2c2_pins>; > > - status = "disabled"; > > - #address-cells = <1>; > > - #size-cells = <0>; > > - }; > > - > > gic: interrupt-controller@01c81000 { > > compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; > > reg = <0x01c81000 0x1000>, > > @@ -580,51 +93,49 @@ > > #interrupt-cells = <3>; > > interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; > > }; > > + }; > > +}; > > > > - rtc: rtc@01f00000 { > > - compatible = "allwinner,sun6i-a31-rtc"; > > - reg = <0x01f00000 0x54>; > > - interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, > > - <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; > > - }; > > - > > - apb0_reset: reset@01f014b0 { > > - reg = <0x01f014b0 0x4>; > > - compatible = "allwinner,sun6i-a31-clock-reset"; > > - #reset-cells = <1>; > > - }; > > +&ccu { > > + compatible = "allwinner,sun8i-h3-ccu"; > > +}; > > I believe this kind of sharing nodes is a bit frowned upon in connection > with sharing .dtsi's. If the compatible name differs, I think it > deserves to be a separate node spelt out in each SoC's .dtsi. > This also makes the DT more readable, since a reader doesn't have to > refer to two files to see what's in that node. For such a device tree, see sun8i-a23-a33.c . > > > > > - codec_analog: codec-analog@01f015c0 { > > - compatible = "allwinner,sun8i-h3-codec-analog"; > > - reg = <0x01f015c0 0x4>; > > - }; > > +&mmc0 { > > + compatible = "allwinner,sun7i-a20-mmc"; > > + clocks = <&ccu CLK_BUS_MMC0>, > > + <&ccu CLK_MMC0>, > > + <&ccu CLK_MMC0_OUTPUT>, > > + <&ccu CLK_MMC0_SAMPLE>; > > + clock-names = "ahb", > > + "mmc", > > + "output", > > + "sample"; > > This applies even more here, since the MMC controllers also have > different clock requirements. > > So why can't we just leave the CCU, MMC and possibly the pinctrl nodes > completely out of the shared h3-h5.dtsi and introduce them from scratch > in the SoC specific .dtsi? > > I think we still have enough identical nodes to justify this kind of > .dtsi sharing. > > Cheers, > Andre. > > > +}; > > > > - ir: ir@01f02000 { > > - compatible = "allwinner,sun5i-a13-ir"; > > - clocks = <&apb0_gates 1>, <&ir_clk>; > > - clock-names = "apb", "ir"; > > - resets = <&apb0_reset 1>; > > - interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; > > - reg = <0x01f02000 0x40>; > > - status = "disabled"; > > - }; > > +&mmc1 { > > + compatible = "allwinner,sun7i-a20-mmc"; > > + clocks = <&ccu CLK_BUS_MMC1>, > > + <&ccu CLK_MMC1>, > > + <&ccu CLK_MMC1_OUTPUT>, > > + <&ccu CLK_MMC1_SAMPLE>; > > + clock-names = "ahb", > > + "mmc", > > + "output", > > + "sample"; > > +}; > > > > - r_pio: pinctrl@01f02c00 { > > - compatible = "allwinner,sun8i-h3-r-pinctrl"; > > - reg = <0x01f02c00 0x400>; > > - interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; > > - clocks = <&apb0_gates 0>, <&osc24M>, <&osc32k>; > > - clock-names = "apb", "hosc", "losc"; > > - resets = <&apb0_reset 0>; > > - gpio-controller; > > - #gpio-cells = <3>; > > - interrupt-controller; > > - #interrupt-cells = <3>; > > +&mmc2 { > > + compatible = "allwinner,sun7i-a20-mmc"; > > + clocks = <&ccu CLK_BUS_MMC2>, > > + <&ccu CLK_MMC2>, > > + <&ccu CLK_MMC2_OUTPUT>, > > + <&ccu CLK_MMC2_SAMPLE>; > > + clock-names = "ahb", > > + "mmc", > > + "output", > > + "sample"; > > +}; > > > > - ir_pins_a: ir@0 { > > - pins = "PL11"; > > - function = "s_cir_rx"; > > - }; > > - }; > > - }; > > +&pio { > > + compatible = "allwinner,sun8i-h3-pinctrl"; > > }; > > diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi > > new file mode 100644 > > index 000000000000..4a57c65e8869 > > --- /dev/null > > +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi > > @@ -0,0 +1,557 @@ > > +/* > > + * Copyright (C) 2015 Jens Kuske <jenskuske(a)gmail.com> > > + * > > + * This file is dual-licensed: you can use it either under the terms > > + * of the GPL or the X11 license, at your option. Note that this dual > > + * licensing only applies to this file, and not this project as a > > + * whole. > > + * > > + * a) This file is free software; you can redistribute it and/or > > + * modify it under the terms of the GNU General Public License as > > + * published by the Free Software Foundation; either version 2 of the > > + * License, or (at your option) any later version. > > + * > > + * This file is distributed in the hope that it will be useful, > > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > > + * GNU General Public License for more details. > > + * > > + * Or, alternatively, > > + * > > + * b) Permission is hereby granted, free of charge, to any person > > + * obtaining a copy of this software and associated documentation > > + * files (the "Software"), to deal in the Software without > > + * restriction, including without limitation the rights to use, > > + * copy, modify, merge, publish, distribute, sublicense, and/or > > + * sell copies of the Software, and to permit persons to whom the > > + * Software is furnished to do so, subject to the following > > + * conditions: > > + * > > + * The above copyright notice and this permission notice shall be > > + * included in all copies or substantial portions of the Software. > > + * > > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, > > + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES > > + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND > > + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT > > + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, > > + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING > > + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR > > + * OTHER DEALINGS IN THE SOFTWARE. > > + */ > > + > > +#include <dt-bindings/clock/sunxi-h3-h5-ccu.h> > > +#include <dt-bindings/interrupt-controller/arm-gic.h> > > +#include <dt-bindings/pinctrl/sun4i-a10.h> > > +#include <dt-bindings/reset/sunxi-h3-h5-ccu.h> > > + > > +/ { > > + #address-cells = <1>; > > + #size-cells = <1>; > > + > > + clocks { > > + #address-cells = <1>; > > + #size-cells = <1>; > > + ranges; > > + > > + osc24M: osc24M_clk { > > + #clock-cells = <0>; > > + compatible = "fixed-clock"; > > + clock-frequency = <24000000>; > > + clock-output-names = "osc24M"; > > + }; > > + > > + osc32k: osc32k_clk { > > + #clock-cells = <0>; > > + compatible = "fixed-clock"; > > + clock-frequency = <32768>; > > + clock-output-names = "osc32k"; > > + }; > > + > > + apb0: apb0_clk { > > + compatible = "fixed-factor-clock"; > > + #clock-cells = <0>; > > + clock-div = <1>; > > + clock-mult = <1>; > > + clocks = <&osc24M>; > > + clock-output-names = "apb0"; > > + }; > > + > > + apb0_gates: clk@01f01428 { > > + compatible = "allwinner,sun8i-h3-apb0-gates-clk", > > + "allwinner,sun4i-a10-gates-clk"; > > + reg = <0x01f01428 0x4>; > > + #clock-cells = <1>; > > + clocks = <&apb0>; > > + clock-indices = <0>, <1>; > > + clock-output-names = "apb0_pio", "apb0_ir"; > > + }; > > + > > + ir_clk: ir_clk@01f01454 { > > + compatible = "allwinner,sun4i-a10-mod0-clk"; > > + reg = <0x01f01454 0x4>; > > + #clock-cells = <0>; > > + clocks = <&osc32k>, <&osc24M>; > > + clock-output-names = "ir"; > > + }; > > + }; > > + > > + soc { > > + compatible = "simple-bus"; > > + #address-cells = <1>; > > + #size-cells = <1>; > > + ranges; > > + > > + dma: dma-controller@01c02000 { > > + compatible = "allwinner,sun8i-h3-dma"; > > + reg = <0x01c02000 0x1000>; > > + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&ccu CLK_BUS_DMA>; > > + resets = <&ccu RST_BUS_DMA>; > > + #dma-cells = <1>; > > + }; > > + > > + mmc0: mmc@01c0f000 { > > + /* compatible and clocks are in per SoC .dtsi file */ > > + reg = <0x01c0f000 0x1000>; > > + resets = <&ccu RST_BUS_MMC0>; > > + reset-names = "ahb"; > > + interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; > > + status = "disabled"; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + }; > > + > > + mmc1: mmc@01c10000 { > > + /* compatible and clocks are in per SoC .dtsi file */ > > + reg = <0x01c10000 0x1000>; > > + resets = <&ccu RST_BUS_MMC1>; > > + reset-names = "ahb"; > > + interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; > > + status = "disabled"; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + }; > > + > > + mmc2: mmc@01c11000 { > > + /* compatible and clocks are in per SoC .dtsi file */ > > + reg = <0x01c11000 0x1000>; > > + resets = <&ccu RST_BUS_MMC2>; > > + reset-names = "ahb"; > > + interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; > > + status = "disabled"; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + }; > > + > > + usbphy: phy@01c19400 { > > + compatible = "allwinner,sun8i-h3-usb-phy"; > > + reg = <0x01c19400 0x2c>, > > + <0x01c1a800 0x4>, > > + <0x01c1b800 0x4>, > > + <0x01c1c800 0x4>, > > + <0x01c1d800 0x4>; > > + reg-names = "phy_ctrl", > > + "pmu0", > > + "pmu1", > > + "pmu2", > > + "pmu3"; > > + clocks = <&ccu CLK_USB_PHY0>, > > + <&ccu CLK_USB_PHY1>, > > + <&ccu CLK_USB_PHY2>, > > + <&ccu CLK_USB_PHY3>; > > + clock-names = "usb0_phy", > > + "usb1_phy", > > + "usb2_phy", > > + "usb3_phy"; > > + resets = <&ccu RST_USB_PHY0>, > > + <&ccu RST_USB_PHY1>, > > + <&ccu RST_USB_PHY2>, > > + <&ccu RST_USB_PHY3>; > > + reset-names = "usb0_reset", > > + "usb1_reset", > > + "usb2_reset", > > + "usb3_reset"; > > + status = "disabled"; > > + #phy-cells = <1>; > > + }; > > + > > + ehci1: usb@01c1b000 { > > + compatible = "allwinner,sun8i-h3-ehci", "generic-ehci"; > > + reg = <0x01c1b000 0x100>; > > + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&ccu CLK_BUS_EHCI1>, <&ccu CLK_BUS_OHCI1>; > > + resets = <&ccu RST_BUS_EHCI1>, <&ccu RST_BUS_OHCI1>; > > + phys = <&usbphy 1>; > > + phy-names = "usb"; > > + status = "disabled"; > > + }; > > + > > + ohci1: usb@01c1b400 { > > + compatible = "allwinner,sun8i-h3-ohci", "generic-ohci"; > > + reg = <0x01c1b400 0x100>; > > + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&ccu CLK_BUS_EHCI1>, <&ccu CLK_BUS_OHCI1>, > > + <&ccu CLK_USB_OHCI1>; > > + resets = <&ccu RST_BUS_EHCI1>, <&ccu RST_BUS_OHCI1>; > > + phys = <&usbphy 1>; > > + phy-names = "usb"; > > + status = "disabled"; > > + }; > > + > > + ehci2: usb@01c1c000 { > > + compatible = "allwinner,sun8i-h3-ehci", "generic-ehci"; > > + reg = <0x01c1c000 0x100>; > > + interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&ccu CLK_BUS_EHCI2>, <&ccu CLK_BUS_OHCI2>; > > + resets = <&ccu RST_BUS_EHCI2>, <&ccu RST_BUS_OHCI2>; > > + phys = <&usbphy 2>; > > + phy-names = "usb"; > > + status = "disabled"; > > + }; > > + > > + ohci2: usb@01c1c400 { > > + compatible = "allwinner,sun8i-h3-ohci", "generic-ohci"; > > + reg = <0x01c1c400 0x100>; > > + interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&ccu CLK_BUS_EHCI2>, <&ccu CLK_BUS_OHCI2>, > > + <&ccu CLK_USB_OHCI2>; > > + resets = <&ccu RST_BUS_EHCI2>, <&ccu RST_BUS_OHCI2>; > > + phys = <&usbphy 2>; > > + phy-names = "usb"; > > + status = "disabled"; > > + }; > > + > > + ehci3: usb@01c1d000 { > > + compatible = "allwinner,sun8i-h3-ehci", "generic-ehci"; > > + reg = <0x01c1d000 0x100>; > > + interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&ccu CLK_BUS_EHCI3>, <&ccu CLK_BUS_OHCI3>; > > + resets = <&ccu RST_BUS_EHCI3>, <&ccu RST_BUS_OHCI3>; > > + phys = <&usbphy 3>; > > + phy-names = "usb"; > > + status = "disabled"; > > + }; > > + > > + ohci3: usb@01c1d400 { > > + compatible = "allwinner,sun8i-h3-ohci", "generic-ohci"; > > + reg = <0x01c1d400 0x100>; > > + interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&ccu CLK_BUS_EHCI3>, <&ccu CLK_BUS_OHCI3>, > > + <&ccu CLK_USB_OHCI3>; > > + resets = <&ccu RST_BUS_EHCI3>, <&ccu RST_BUS_OHCI3>; > > + phys = <&usbphy 3>; > > + phy-names = "usb"; > > + status = "disabled"; > > + }; > > + > > + ccu: clock@01c20000 { > > + /* compatible is in per SoC .dtsi file */ > > + reg = <0x01c20000 0x400>; > > + clocks = <&osc24M>, <&osc32k>; > > + clock-names = "hosc", "losc"; > > + #clock-cells = <1>; > > + #reset-cells = <1>; > > + }; > > + > > + pio: pinctrl@01c20800 { > > + /* compatible is in per SoC .dtsi file */ > > + reg = <0x01c20800 0x400>; > > + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>; > > + clock-names = "apb", "hosc", "losc"; > > + gpio-controller; > > + #gpio-cells = <3>; > > + interrupt-controller; > > + #interrupt-cells = <3>; > > + > > + i2c0_pins: i2c0 { > > + pins = "PA11", "PA12"; > > + function = "i2c0"; > > + }; > > + > > + i2c1_pins: i2c1 { > > + pins = "PA18", "PA19"; > > + function = "i2c1"; > > + }; > > + > > + i2c2_pins: i2c2 { > > + pins = "PE12", "PE13"; > > + function = "i2c2"; > > + }; > > + > > + mmc0_pins_a: mmc0@0 { > > + pins = "PF0", "PF1", "PF2", "PF3", > > + "PF4", "PF5"; > > + function = "mmc0"; > > + drive-strength = <30>; > > + bias-pull-up; > > + }; > > + > > + mmc0_cd_pin: mmc0_cd_pin@0 { > > + pins = "PF6"; > > + function = "gpio_in"; > > + bias-pull-up; > > + }; > > + > > + mmc1_pins_a: mmc1@0 { > > + pins = "PG0", "PG1", "PG2", "PG3", > > + "PG4", "PG5"; > > + function = "mmc1"; > > + drive-strength = <30>; > > + bias-pull-up; > > + }; > > + > > + mmc2_8bit_pins: mmc2_8bit { > > + pins = "PC5", "PC6", "PC8", > > + "PC9", "PC10", "PC11", > > + "PC12", "PC13", "PC14", > > + "PC15", "PC16"; > > + function = "mmc2"; > > + drive-strength = <30>; > > + bias-pull-up; > > + }; > > + > > + spi0_pins: spi0 { > > + pins = "PC0", "PC1", "PC2", "PC3"; > > + function = "spi0"; > > + }; > > + > > + spi1_pins: spi1 { > > + pins = "PA15", "PA16", "PA14", "PA13"; > > + function = "spi1"; > > + }; > > + > > + uart0_pins_a: uart0@0 { > > + pins = "PA4", "PA5"; > > + function = "uart0"; > > + }; > > + > > + uart1_pins: uart1 { > > + pins = "PG6", "PG7"; > > + function = "uart1"; > > + }; > > + > > + uart1_rts_cts_pins: uart1_rts_cts { > > + pins = "PG8", "PG9"; > > + function = "uart1"; > > + }; > > + > > + uart2_pins: uart2 { > > + pins = "PA0", "PA1"; > > + function = "uart2"; > > + }; > > + > > + uart3_pins: uart3 { > > + pins = "PA13", "PA14"; > > + function = "uart3"; > > + }; > > + }; > > + > > + timer@01c20c00 { > > + compatible = "allwinner,sun4i-a10-timer"; > > + reg = <0x01c20c00 0xa0>; > > + interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&osc24M>; > > + }; > > + > > + spi0: spi@01c68000 { > > + compatible = "allwinner,sun8i-h3-spi"; > > + reg = <0x01c68000 0x1000>; > > + interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>; > > + clock-names = "ahb", "mod"; > > + dmas = <&dma 23>, <&dma 23>; > > + dma-names = "rx", "tx"; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&spi0_pins>; > > + resets = <&ccu RST_BUS_SPI0>; > > + status = "disabled"; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + }; > > + > > + spi1: spi@01c69000 { > > + compatible = "allwinner,sun8i-h3-spi"; > > + reg = <0x01c69000 0x1000>; > > + interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>; > > + clock-names = "ahb", "mod"; > > + dmas = <&dma 24>, <&dma 24>; > > + dma-names = "rx", "tx"; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&spi1_pins>; > > + resets = <&ccu RST_BUS_SPI1>; > > + status = "disabled"; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + }; > > + > > + wdt0: watchdog@01c20ca0 { > > + compatible = "allwinner,sun6i-a31-wdt"; > > + reg = <0x01c20ca0 0x20>; > > + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; > > + }; > > + > > + pwm: pwm@01c21400 { > > + compatible = "allwinner,sun8i-h3-pwm"; > > + reg = <0x01c21400 0x8>; > > + clocks = <&osc24M>; > > + #pwm-cells = <3>; > > + status = "disabled"; > > + }; > > + > > + codec: codec@01c22c00 { > > + #sound-dai-cells = <0>; > > + compatible = "allwinner,sun8i-h3-codec"; > > + reg = <0x01c22c00 0x400>; > > + interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>; > > + clock-names = "apb", "codec"; > > + resets = <&ccu RST_BUS_CODEC>; > > + dmas = <&dma 15>, <&dma 15>; > > + dma-names = "rx", "tx"; > > + allwinner,codec-analog-controls = <&codec_analog>; > > + status = "disabled"; > > + }; > > + > > + uart0: serial@01c28000 { > > + compatible = "snps,dw-apb-uart"; > > + reg = <0x01c28000 0x400>; > > + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; > > + reg-shift = <2>; > > + reg-io-width = <4>; > > + clocks = <&ccu CLK_BUS_UART0>; > > + resets = <&ccu RST_BUS_UART0>; > > + dmas = <&dma 6>, <&dma 6>; > > + dma-names = "rx", "tx"; > > + status = "disabled"; > > + }; > > + > > + uart1: serial@01c28400 { > > + compatible = "snps,dw-apb-uart"; > > + reg = <0x01c28400 0x400>; > > + interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; > > + reg-shift = <2>; > > + reg-io-width = <4>; > > + clocks = <&ccu CLK_BUS_UART1>; > > + resets = <&ccu RST_BUS_UART1>; > > + dmas = <&dma 7>, <&dma 7>; > > + dma-names = "rx", "tx"; > > + status = "disabled"; > > + }; > > + > > + uart2: serial@01c28800 { > > + compatible = "snps,dw-apb-uart"; > > + reg = <0x01c28800 0x400>; > > + interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; > > + reg-shift = <2>; > > + reg-io-width = <4>; > > + clocks = <&ccu CLK_BUS_UART2>; > > + resets = <&ccu RST_BUS_UART2>; > > + dmas = <&dma 8>, <&dma 8>; > > + dma-names = "rx", "tx"; > > + status = "disabled"; > > + }; > > + > > + uart3: serial@01c28c00 { > > + compatible = "snps,dw-apb-uart"; > > + reg = <0x01c28c00 0x400>; > > + interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; > > + reg-shift = <2>; > > + reg-io-width = <4>; > > + clocks = <&ccu CLK_BUS_UART3>; > > + resets = <&ccu RST_BUS_UART3>; > > + dmas = <&dma 9>, <&dma 9>; > > + dma-names = "rx", "tx"; > > + status = "disabled"; > > + }; > > + > > + i2c0: i2c@01c2ac00 { > > + compatible = "allwinner,sun6i-a31-i2c"; > > + reg = <0x01c2ac00 0x400>; > > + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&ccu CLK_BUS_I2C0>; > > + resets = <&ccu RST_BUS_I2C0>; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&i2c0_pins>; > > + status = "disabled"; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + }; > > + > > + i2c1: i2c@01c2b000 { > > + compatible = "allwinner,sun6i-a31-i2c"; > > + reg = <0x01c2b000 0x400>; > > + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&ccu CLK_BUS_I2C1>; > > + resets = <&ccu RST_BUS_I2C1>; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&i2c1_pins>; > > + status = "disabled"; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + }; > > + > > + i2c2: i2c@01c2b400 { > > + compatible = "allwinner,sun6i-a31-i2c"; > > + reg = <0x01c2b000 0x400>; > > + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&ccu CLK_BUS_I2C2>; > > + resets = <&ccu RST_BUS_I2C2>; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&i2c2_pins>; > > + status = "disabled"; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + }; > > + > > + rtc: rtc@01f00000 { > > + compatible = "allwinner,sun6i-a31-rtc"; > > + reg = <0x01f00000 0x54>; > > + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; > > + }; > > + > > + apb0_reset: reset@01f014b0 { > > + reg = <0x01f014b0 0x4>; > > + compatible = "allwinner,sun6i-a31-clock-reset"; > > + #reset-cells = <1>; > > + }; > > + > > + codec_analog: codec-analog@01f015c0 { > > + compatible = "allwinner,sun8i-h3-codec-analog"; > > + reg = <0x01f015c0 0x4>; > > + }; > > + > > + ir: ir@01f02000 { > > + compatible = "allwinner,sun5i-a13-ir"; > > + clocks = <&apb0_gates 1>, <&ir_clk>; > > + clock-names = "apb", "ir"; > > + resets = <&apb0_reset 1>; > > + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; > > + reg = <0x01f02000 0x40>; > > + status = "disabled"; > > + }; > > + > > + r_pio: pinctrl@01f02c00 { > > + compatible = "allwinner,sun8i-h3-r-pinctrl"; > > + reg = <0x01f02c00 0x400>; > > + interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&apb0_gates 0>, <&osc24M>, <&osc32k>; > > + clock-names = "apb", "hosc", "losc"; > > + resets = <&apb0_reset 0>; > > + gpio-controller; > > + #gpio-cells = <3>; > > + interrupt-controller; > > + #interrupt-cells = <3>; > > + > > + ir_pins_a: ir@0 { > > + pins = "PL11"; > > + function = "s_cir_rx"; > > + }; > > + }; > > + }; > > +}; > > > > -- > You received this message because you are subscribed to the Google Groups "linux-sunxi" group. > To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscribe(a)googlegroups.com. > For more options, visit https://groups.google.com/d/optout.

1 0

[alsa-devel] [PATCH 00/19][RFC v2] ALSA: firewire-motu: new driver for MOTU FireWire series
by Takashi Sakamoto 30 Jan '17

30 Jan '17

Hi, This patchset updates a part of my previous RFC, just for MOTU FireWire series. [RFC][PATCH 00/37] ALSA: firewire: support AMDTP variants http://mailman.alsa-project.org/pipermail/alsa-devel/2015-July/094789.html This patchset adds support for a part of MOTU FireWire series with their functionality of packet streaming. Below models are newly supported: - 828 - 828mk2 - 828mk3 (FireWire/Hybrid) However, this module cannot handle 828 correctly to generate sound. The reason is not clear yet. On the other hand, 828mk2 and 828mk3 can be handled most properly via ALSA PCM/MIDI/HwDep interfaces. Currently, I have a plan to post this patchset to merge into Linux 4.12. Corresponding merge window will be estimated to open this April. If you're willing to test this module, please report the result till then. For testers, I prepared for backport modules in my repository. Please follow instructions in README. https://github.com/takaswie/snd-firewire-improve/tree/topic/motu As user land tools, I added some stuffs to libhinawa and hinawa-utils. Please refer to 'topic/motu' branch of these repositories. You can use 'hinawa-motu-common-cui' to configure some streaming-related features of the above units: * https://github.com/takaswie/libhinawa/tree/topic/motu * https://github.com/takaswie/hinawa-utils/tree/topic/motu Takashi Sakamoto (19): firewire-motu: add skeleton for Mark of the unicorn (MOTU) FireWire series firewire-motu: postpone sound card registration firewire-motu: add a structure for model-dependent parameters. firewire-motu: add an abstraction layer for three types of protocols firewire-lib: record cycle count for the first packet firewire-lib: add support for source packet header field in CIP header firewire-lib: enable CIP_DBC_IS_END_EVENT for both directions of stream firewire-motu: add MOTU specific protocol layer firewire-motu: handle transactions specific for MOTU FireWire models firewire-motu: add stream management functionality firewire-motu: add proc node to show current statuc of clock and packet formats firewire-motu: add PCM functionality firewire-motu: add MIDI functionality firewire-motu: add hwdep interface firewire-motu: enable to read transaction cache via hwdep interface firewire-motu: add support for MOTU 828 as a model with protocol version 1 firewire-motu: add support for MOTU 828mk2 as a model with protocol version 2 firewire-lib: add a quirk of packet without valid EOH in CIP format firewire-motu: add support for MOTU 828mk3 (FireWire/Hybrid) as a model with protocol version 3 include/uapi/sound/asound.h | 3 +- include/uapi/sound/firewire.h | 10 +- sound/firewire/Kconfig | 13 ++ sound/firewire/Makefile | 1 + sound/firewire/amdtp-stream.c | 36 ++- sound/firewire/amdtp-stream.h | 9 +- sound/firewire/motu/Makefile | 5 + sound/firewire/motu/amdtp-motu.c | 388 ++++++++++++++++++++++++++++++++ sound/firewire/motu/motu-hwdep.c | 198 ++++++++++++++++ sound/firewire/motu/motu-midi.c | 169 ++++++++++++++ sound/firewire/motu/motu-pcm.c | 398 +++++++++++++++++++++++++++++++++ sound/firewire/motu/motu-proc.c | 118 ++++++++++ sound/firewire/motu/motu-protocol-v1.c | 204 +++++++++++++++++ sound/firewire/motu/motu-protocol-v2.c | 237 ++++++++++++++++++++ sound/firewire/motu/motu-protocol-v3.c | 312 ++++++++++++++++++++++++++ sound/firewire/motu/motu-stream.c | 381 +++++++++++++++++++++++++++++++ sound/firewire/motu/motu-transaction.c | 137 ++++++++++++ sound/firewire/motu/motu.c | 273 ++++++++++++++++++++++ sound/firewire/motu/motu.h | 161 +++++++++++++ 19 files changed, 3042 insertions(+), 11 deletions(-) create mode 100644 sound/firewire/motu/Makefile create mode 100644 sound/firewire/motu/amdtp-motu.c create mode 100644 sound/firewire/motu/motu-hwdep.c create mode 100644 sound/firewire/motu/motu-midi.c create mode 100644 sound/firewire/motu/motu-pcm.c create mode 100644 sound/firewire/motu/motu-proc.c create mode 100644 sound/firewire/motu/motu-protocol-v1.c create mode 100644 sound/firewire/motu/motu-protocol-v2.c create mode 100644 sound/firewire/motu/motu-protocol-v3.c create mode 100644 sound/firewire/motu/motu-stream.c create mode 100644 sound/firewire/motu/motu-transaction.c create mode 100644 sound/firewire/motu/motu.c create mode 100644 sound/firewire/motu/motu.h -- 2.9.3

2 27

Re: [alsa-devel] [linux-sunxi] Re: [PATCH v2 4/9] arm: dts: sun8i: split Allwinner H3 .dtsi
by Icenowy Zheng 27 Jan '17

27 Jan '17

2017年1月27日 23:55于 Maxime Ripard <maxime.ripard(a)free-electrons.com>写道： > > On Thu, Jan 26, 2017 at 11:48:54PM +0800, Icenowy Zheng wrote: > > - mmc0: mmc@01c0f000 { > > + mmc@01c0f000 { > > There's no point in removing the labels, and you can even use the > label-based syntax to reference them, instead of using the path. I think keeping a tree structure in sub dtsi file will make it more pretty and easy to use :-) > > Maxime > > -- > Maxime Ripard, Free Electrons > Embedded Linux and Kernel engineering > http://free-electrons.com > > -- > You received this message because you are subscribed to the Google Groups "linux-sunxi" group. > To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscribe(a)googlegroups.com. > For more options, visit https://groups.google.com/d/optout.

2 1

Re: [alsa-devel] [linux-sunxi] Re: [PATCH v2 6/9] arm64: dts: allwinner: add Allwinner H5 .dtsi
by Icenowy Zheng 27 Jan '17

27 Jan '17

2017年1月27日 23:58于 Maxime Ripard <maxime.ripard(a)free-electrons.com>写道： > > On Thu, Jan 26, 2017 at 11:48:56PM +0800, Icenowy Zheng wrote: > > + mmc@01c0f000 { > > Please use a label based syntax here too. > > > + compatible = "allwinner,sun50i-a64-mmc", > > + "allwinner,sun5i-a13-mmc"; > > The compatibility with the A13 has never been true, and the compatible > should be "allwinner,sun50i-h5-mmc", "allwinner,sun50i-a64-mmc". > > > + clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>; > > + clock-names = "ahb", "mmc"; > > + }; > > + > > + mmc@01c10000 { > > + compatible = "allwinner,sun50i-a64-mmc", > > + "allwinner,sun5i-a13-mmc"; > > + clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>; > > + clock-names = "ahb", "mmc"; > > + }; > > + > > + mmc@01c11000 { > > + compatible = "allwinner,sun50i-a64-mmc", > > And this is very likely to use the emmc compatible. > > > + "allwinner,sun5i-a13-mmc"; > > + clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>; > > + clock-names = "ahb", "mmc"; > > + }; > > + > > + clock@01c20000 { > > + compatible = "allwinner,sun50i-h5-ccu", > > + "allwinner,sun8i-h3-ccu"; > > + }; > > If it doesn't have the same clocks, it's not compatible with the H3. I'll drop it. It's from the original patch from Andre. > > Maxime > > -- > Maxime Ripard, Free Electrons > Embedded Linux and Kernel engineering > http://free-electrons.com > > -- > You received this message because you are subscribed to the Google Groups "linux-sunxi" group. > To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscribe(a)googlegroups.com. > For more options, visit https://groups.google.com/d/optout.

1 0

[alsa-devel] [RFC PATCH 0/5] DisplayPort Audio on Cherrytrail
by Pierre-Louis Bossart 27 Jan '17

27 Jan '17

The following patches enable DisplayPort Audio on Cherrytrail machines when applied on top of Takashi's topic/intel-lpe-audio branch (tested on Zotac PI330) There are a couple of opens where I could use some help: - is it necessary to set a valid_bit which is used only for DP audio? - is the sequence to set the chicken bits and unmute the amplifier ok or can it be improved by being moved somewhere else in the i915 driver? - the register offset to be used by the audio driver depends on a combination of port/pipe/output type. Do we need to get access to the pipe information and when is it available (initial trials showed the pipe is still invalid when the audio notification happens) Feedback welcome! Pierre-Louis Bossart (5): drm: i915: add DP support in LPE audio mode ALSA: x86: intel_hdmi: add definitions and logic for DP audio ALSA: x86: intel_hdmi: set config bitfields for DP mode drm: i915: add DisplayPort amp unmute for LPE audio mode ALSA: x86: hdmi: hack to enable DP audio on CHT drivers/gpu/drm/i915/i915_drv.h | 3 +- drivers/gpu/drm/i915/i915_reg.h | 12 +++ drivers/gpu/drm/i915/intel_audio.c | 19 +++- drivers/gpu/drm/i915/intel_lpe_audio.c | 34 ++++++- include/drm/intel_lpe_audio.h | 2 + sound/x86/intel_hdmi_audio.c | 174 ++++++++++++++++++++++++++++----- sound/x86/intel_hdmi_audio.h | 8 +- sound/x86/intel_hdmi_lpe_audio.c | 44 ++++++++- sound/x86/intel_hdmi_lpe_audio.h | 29 ++++++ 9 files changed, 288 insertions(+), 37 deletions(-) -- 2.7.4

4 16

[alsa-devel] [PATCH RFC 0/3] Pass pipe to LPE audio
by Takashi Iwai 27 Jan '17

27 Jan '17

Hi, this is a patch series to pass the pipe over LPE audio notification, based on Pierre's latest patchset ("[RFC PATCH 0/5] DisplayPort Audio on Cherrytrail"). Takashi === Takashi Iwai (3): drm/i915: Avoid MST pipe handling for LPE audio drm/i915: Pass pipe to LPE audio notification ALSA: x86: Use config base depending on the pipe drivers/gpu/drm/i915/i915_drv.h | 2 +- drivers/gpu/drm/i915/intel_audio.c | 27 ++++++++++++++------------- drivers/gpu/drm/i915/intel_lpe_audio.c | 3 ++- include/drm/intel_lpe_audio.h | 1 + sound/x86/intel_hdmi_lpe_audio.c | 32 +++++++++++++++++++++----------- 5 files changed, 39 insertions(+), 26 deletions(-) -- 2.11.0

2 5

[alsa-devel] [PATCH v7 0/5] Add platform clock for BayTrail platforms
by Pierre-Louis Bossart 27 Jan '17

27 Jan '17

These patches specifically enable the audio MCLK required by Baytrail CR devices. It is the remaining part of a bigger set of patches (already merged in Mark Brown's tree) that enable sound for Baytrail CR devices (especially Asus T100TAF) [1]. They include the clock driver and clock enabling in the pmc_atom code (along with moving of the non-architectural pmc_atom driver code into drivers/platform/x86 as suggested by Thomas Gleixner [2]). This move includes a new header in include/linux/platform_data/x86/. While there is an agreement that the definitions for PMC clocks are not really platform data this location is seen as a good-enough compromise with an agreement between Darren Hart and Andy Shevchenko [3] [1] http://mailman.alsa-project.org/pipermail/alsa-devel/2016-August/111704.html [2] http://mailman.alsa-project.org/pipermail/alsa-devel/2016-October/113936.ht… [3] http://mailman.alsa-project.org/pipermail/alsa-devel/2016-December/115892.h… Changes from v6: - Addressed comments from Stephen Boyd, Andy Shevchenko and Vinod Koul - Renamed clk-byt-plt to clk-pmc-atom - Rebase to 4.10-rc3 (broonie/for-next) - Added helper functions to make error handling more compact - Removed module-related code since it's not possible/supported - Removed useless tests on remove - PMC_CLK_OFFSET move to clk-pcm-atom (more logical) - Split typo correction and makefile fix in separate patches - small fixes (spaces, defaults in switches, alphabetical order, use of clk_writel/readl and no test on write, simpler error handling, use of while(i--), unsigned loop variables, kernel doc fields, format-patch -M -C -D, use of PLATFORM_DEVID_NONE) Changes from v5: - fix build error reported by kbuild test robot - split the clk driver code from x86 platform changes Changes from v4: - move the pmc_atom driver from arch/x86/platform/atom to drivers/platform/x86 Changes from v3: - replace devm_kzalloc with devm_kcalloc - add x86 architecture maintainers Changes from v2: - move clk platform data structures to a separate include file - store clk_hw pointer for the fixed rate clocks Changes from v1: - register the clk device as child of pmc device - pass iomem pointer from pmc driver to clk driver to avoid using pmc_atom_read()/write() and use readl/writel API instead - use devm_clk_hw_register/clkdev_hw_create instead of clk_register/clkdev_create Irina Tirdea (3): clk: x86: Add Atom PMC platform clocks arch/x86/platform/atom: Move pmc_atom to drivers/platform/x86 platform/x86: Enable Atom PMC platform clocks Pierre-Louis Bossart (2): clk: Make x86/ conditional on CONFIG_COMMON_CLK platform/x86: fix typo in comment arch/x86/Kconfig | 4 - arch/x86/platform/atom/Makefile | 1 - drivers/acpi/acpi_lpss.c | 2 +- drivers/clk/Makefile | 2 + drivers/clk/x86/Makefile | 1 + drivers/clk/x86/clk-pmc-atom.c | 373 +++++++++++++++++++++ drivers/platform/x86/Kconfig | 5 + drivers/platform/x86/Makefile | 1 + .../atom => drivers/platform/x86}/pmc_atom.c | 88 ++++- include/linux/platform_data/x86/clk-pmc-atom.h | 44 +++ .../linux/platform_data/x86}/pmc_atom.h | 2 +- 11 files changed, 508 insertions(+), 15 deletions(-) create mode 100644 drivers/clk/x86/clk-pmc-atom.c rename {arch/x86/platform/atom => drivers/platform/x86}/pmc_atom.c (87%) create mode 100644 include/linux/platform_data/x86/clk-pmc-atom.h rename {arch/x86/include/asm => include/linux/platform_data/x86}/pmc_atom.h (98%) -- 2.7.4

5 13

[alsa-devel] [PATCH] sound: pci: cs46xx: constify snd_pcm_ops structures
by Bhumika Goyal 26 Jan '17

26 Jan '17

Declare snd_pcm_ops structures as const as they are either stored in the ops field of a snd_pcm_substream structure or passed as an argument to the function snd_pcm_set_ops. The function argument and the ops field are of type const, so snd_pcm_ops structures having this property can be made const too. File size before: sound/pci/cs46xx/cs46xx_lib.o text data bss dec hex filename 13669 1712 0 15381 3c15 sound/pci/cs46xx/cs46xx_lib.o File size after: sound/pci/cs46xx/cs46xx_lib.o text data bss dec hex filename 14181 1216 0 15397 3c25 sound/pci/cs46xx/cs46xx_lib.o Signed-off-by: Bhumika Goyal <bhumirks(a)gmail.com> --- sound/pci/cs46xx/cs46xx_lib.c | 38 +++++++++++++++++++------------------- 1 file changed, 19 insertions(+), 19 deletions(-) diff --git a/sound/pci/cs46xx/cs46xx_lib.c b/sound/pci/cs46xx/cs46xx_lib.c index fde3cd4..5d012f5 100644 --- a/sound/pci/cs46xx/cs46xx_lib.c +++ b/sound/pci/cs46xx/cs46xx_lib.c @@ -72,18 +72,18 @@ static void amp_voyetra(struct snd_cs46xx *chip, int change); #ifdef CONFIG_SND_CS46XX_NEW_DSP -static struct snd_pcm_ops snd_cs46xx_playback_rear_ops; -static struct snd_pcm_ops snd_cs46xx_playback_indirect_rear_ops; -static struct snd_pcm_ops snd_cs46xx_playback_clfe_ops; -static struct snd_pcm_ops snd_cs46xx_playback_indirect_clfe_ops; -static struct snd_pcm_ops snd_cs46xx_playback_iec958_ops; -static struct snd_pcm_ops snd_cs46xx_playback_indirect_iec958_ops; +static const struct snd_pcm_ops snd_cs46xx_playback_rear_ops; +static const struct snd_pcm_ops snd_cs46xx_playback_indirect_rear_ops; +static const struct snd_pcm_ops snd_cs46xx_playback_clfe_ops; +static const struct snd_pcm_ops snd_cs46xx_playback_indirect_clfe_ops; +static const struct snd_pcm_ops snd_cs46xx_playback_iec958_ops; +static const struct snd_pcm_ops snd_cs46xx_playback_indirect_iec958_ops; #endif -static struct snd_pcm_ops snd_cs46xx_playback_ops; -static struct snd_pcm_ops snd_cs46xx_playback_indirect_ops; -static struct snd_pcm_ops snd_cs46xx_capture_ops; -static struct snd_pcm_ops snd_cs46xx_capture_indirect_ops; +static const struct snd_pcm_ops snd_cs46xx_playback_ops; +static const struct snd_pcm_ops snd_cs46xx_playback_indirect_ops; +static const struct snd_pcm_ops snd_cs46xx_capture_ops; +static const struct snd_pcm_ops snd_cs46xx_capture_indirect_ops; static unsigned short snd_cs46xx_codec_read(struct snd_cs46xx *chip, unsigned short reg, @@ -1665,7 +1665,7 @@ static struct snd_pcm_ops snd_cs46xx_playback_rear_ops = { .pointer = snd_cs46xx_playback_direct_pointer, }; -static struct snd_pcm_ops snd_cs46xx_playback_indirect_rear_ops = { +static const struct snd_pcm_ops snd_cs46xx_playback_indirect_rear_ops = { .open = snd_cs46xx_playback_open_rear, .close = snd_cs46xx_playback_close, .ioctl = snd_pcm_lib_ioctl, @@ -1677,7 +1677,7 @@ static struct snd_pcm_ops snd_cs46xx_playback_indirect_rear_ops = { .ack = snd_cs46xx_playback_transfer, }; -static struct snd_pcm_ops snd_cs46xx_playback_clfe_ops = { +static const struct snd_pcm_ops snd_cs46xx_playback_clfe_ops = { .open = snd_cs46xx_playback_open_clfe, .close = snd_cs46xx_playback_close, .ioctl = snd_pcm_lib_ioctl, @@ -1688,7 +1688,7 @@ static struct snd_pcm_ops snd_cs46xx_playback_clfe_ops = { .pointer = snd_cs46xx_playback_direct_pointer, }; -static struct snd_pcm_ops snd_cs46xx_playback_indirect_clfe_ops = { +static const struct snd_pcm_ops snd_cs46xx_playback_indirect_clfe_ops = { .open = snd_cs46xx_playback_open_clfe, .close = snd_cs46xx_playback_close, .ioctl = snd_pcm_lib_ioctl, @@ -1700,7 +1700,7 @@ static struct snd_pcm_ops snd_cs46xx_playback_indirect_clfe_ops = { .ack = snd_cs46xx_playback_transfer, }; -static struct snd_pcm_ops snd_cs46xx_playback_iec958_ops = { +static const struct snd_pcm_ops snd_cs46xx_playback_iec958_ops = { .open = snd_cs46xx_playback_open_iec958, .close = snd_cs46xx_playback_close_iec958, .ioctl = snd_pcm_lib_ioctl, @@ -1711,7 +1711,7 @@ static struct snd_pcm_ops snd_cs46xx_playback_iec958_ops = { .pointer = snd_cs46xx_playback_direct_pointer, }; -static struct snd_pcm_ops snd_cs46xx_playback_indirect_iec958_ops = { +static const struct snd_pcm_ops snd_cs46xx_playback_indirect_iec958_ops = { .open = snd_cs46xx_playback_open_iec958, .close = snd_cs46xx_playback_close_iec958, .ioctl = snd_pcm_lib_ioctl, @@ -1725,7 +1725,7 @@ static struct snd_pcm_ops snd_cs46xx_playback_indirect_iec958_ops = { #endif -static struct snd_pcm_ops snd_cs46xx_playback_ops = { +static const struct snd_pcm_ops snd_cs46xx_playback_ops = { .open = snd_cs46xx_playback_open, .close = snd_cs46xx_playback_close, .ioctl = snd_pcm_lib_ioctl, @@ -1736,7 +1736,7 @@ static struct snd_pcm_ops snd_cs46xx_playback_ops = { .pointer = snd_cs46xx_playback_direct_pointer, }; -static struct snd_pcm_ops snd_cs46xx_playback_indirect_ops = { +static const struct snd_pcm_ops snd_cs46xx_playback_indirect_ops = { .open = snd_cs46xx_playback_open, .close = snd_cs46xx_playback_close, .ioctl = snd_pcm_lib_ioctl, @@ -1748,7 +1748,7 @@ static struct snd_pcm_ops snd_cs46xx_playback_indirect_ops = { .ack = snd_cs46xx_playback_transfer, }; -static struct snd_pcm_ops snd_cs46xx_capture_ops = { +static const struct snd_pcm_ops snd_cs46xx_capture_ops = { .open = snd_cs46xx_capture_open, .close = snd_cs46xx_capture_close, .ioctl = snd_pcm_lib_ioctl, @@ -1759,7 +1759,7 @@ static struct snd_pcm_ops snd_cs46xx_capture_ops = { .pointer = snd_cs46xx_capture_direct_pointer, }; -static struct snd_pcm_ops snd_cs46xx_capture_indirect_ops = { +static const struct snd_pcm_ops snd_cs46xx_capture_indirect_ops = { .open = snd_cs46xx_capture_open, .close = snd_cs46xx_capture_close, .ioctl = snd_pcm_lib_ioctl, -- 2.7.4

3 2

[alsa-devel] [PATCH v2] sound: pci: cs46xx: constify snd_pcm_ops structures
by Bhumika Goyal 26 Jan '17

26 Jan '17

Declare snd_pcm_ops structures as const as they are either stored in the ops field of a snd_pcm_substream structure or passed as an argument to the function snd_pcm_set_ops. The function argument and the ops field are of type const, so snd_pcm_ops structures having this property can be made const too. File size before: sound/pci/cs46xx/cs46xx_lib.o text data bss dec hex filename 26047 5304 16 31367 7a87 sound/pci/cs46xx/cs46xx_lib.o File size after: sound/pci/cs46xx/cs46xx_lib.o text data bss dec hex filename 27335 4036 16 31387 7a9b sound/pci/cs46xx/cs46xx_lib.o Signed-off-by: Bhumika Goyal <bhumirks(a)gmail.com> --- Changes in v2: * test build the patch with CONFIG_SND_CS46XX_NEW_DSP=y sound/pci/cs46xx/cs46xx_lib.c | 40 ++++++++++++++++++++-------------------- 1 file changed, 20 insertions(+), 20 deletions(-) diff --git a/sound/pci/cs46xx/cs46xx_lib.c b/sound/pci/cs46xx/cs46xx_lib.c index fde3cd4..9a8b41f 100644 --- a/sound/pci/cs46xx/cs46xx_lib.c +++ b/sound/pci/cs46xx/cs46xx_lib.c @@ -72,18 +72,18 @@ static void amp_voyetra(struct snd_cs46xx *chip, int change); #ifdef CONFIG_SND_CS46XX_NEW_DSP -static struct snd_pcm_ops snd_cs46xx_playback_rear_ops; -static struct snd_pcm_ops snd_cs46xx_playback_indirect_rear_ops; -static struct snd_pcm_ops snd_cs46xx_playback_clfe_ops; -static struct snd_pcm_ops snd_cs46xx_playback_indirect_clfe_ops; -static struct snd_pcm_ops snd_cs46xx_playback_iec958_ops; -static struct snd_pcm_ops snd_cs46xx_playback_indirect_iec958_ops; +static const struct snd_pcm_ops snd_cs46xx_playback_rear_ops; +static const struct snd_pcm_ops snd_cs46xx_playback_indirect_rear_ops; +static const struct snd_pcm_ops snd_cs46xx_playback_clfe_ops; +static const struct snd_pcm_ops snd_cs46xx_playback_indirect_clfe_ops; +static const struct snd_pcm_ops snd_cs46xx_playback_iec958_ops; +static const struct snd_pcm_ops snd_cs46xx_playback_indirect_iec958_ops; #endif -static struct snd_pcm_ops snd_cs46xx_playback_ops; -static struct snd_pcm_ops snd_cs46xx_playback_indirect_ops; -static struct snd_pcm_ops snd_cs46xx_capture_ops; -static struct snd_pcm_ops snd_cs46xx_capture_indirect_ops; +static const struct snd_pcm_ops snd_cs46xx_playback_ops; +static const struct snd_pcm_ops snd_cs46xx_playback_indirect_ops; +static const struct snd_pcm_ops snd_cs46xx_capture_ops; +static const struct snd_pcm_ops snd_cs46xx_capture_indirect_ops; static unsigned short snd_cs46xx_codec_read(struct snd_cs46xx *chip, unsigned short reg, @@ -1654,7 +1654,7 @@ static int snd_cs46xx_capture_close(struct snd_pcm_substream *substream) } #ifdef CONFIG_SND_CS46XX_NEW_DSP -static struct snd_pcm_ops snd_cs46xx_playback_rear_ops = { +static const struct snd_pcm_ops snd_cs46xx_playback_rear_ops = { .open = snd_cs46xx_playback_open_rear, .close = snd_cs46xx_playback_close, .ioctl = snd_pcm_lib_ioctl, @@ -1665,7 +1665,7 @@ static int snd_cs46xx_capture_close(struct snd_pcm_substream *substream) .pointer = snd_cs46xx_playback_direct_pointer, }; -static struct snd_pcm_ops snd_cs46xx_playback_indirect_rear_ops = { +static const struct snd_pcm_ops snd_cs46xx_playback_indirect_rear_ops = { .open = snd_cs46xx_playback_open_rear, .close = snd_cs46xx_playback_close, .ioctl = snd_pcm_lib_ioctl, @@ -1677,7 +1677,7 @@ static int snd_cs46xx_capture_close(struct snd_pcm_substream *substream) .ack = snd_cs46xx_playback_transfer, }; -static struct snd_pcm_ops snd_cs46xx_playback_clfe_ops = { +static const struct snd_pcm_ops snd_cs46xx_playback_clfe_ops = { .open = snd_cs46xx_playback_open_clfe, .close = snd_cs46xx_playback_close, .ioctl = snd_pcm_lib_ioctl, @@ -1688,7 +1688,7 @@ static int snd_cs46xx_capture_close(struct snd_pcm_substream *substream) .pointer = snd_cs46xx_playback_direct_pointer, }; -static struct snd_pcm_ops snd_cs46xx_playback_indirect_clfe_ops = { +static const struct snd_pcm_ops snd_cs46xx_playback_indirect_clfe_ops = { .open = snd_cs46xx_playback_open_clfe, .close = snd_cs46xx_playback_close, .ioctl = snd_pcm_lib_ioctl, @@ -1700,7 +1700,7 @@ static int snd_cs46xx_capture_close(struct snd_pcm_substream *substream) .ack = snd_cs46xx_playback_transfer, }; -static struct snd_pcm_ops snd_cs46xx_playback_iec958_ops = { +static const struct snd_pcm_ops snd_cs46xx_playback_iec958_ops = { .open = snd_cs46xx_playback_open_iec958, .close = snd_cs46xx_playback_close_iec958, .ioctl = snd_pcm_lib_ioctl, @@ -1711,7 +1711,7 @@ static int snd_cs46xx_capture_close(struct snd_pcm_substream *substream) .pointer = snd_cs46xx_playback_direct_pointer, }; -static struct snd_pcm_ops snd_cs46xx_playback_indirect_iec958_ops = { +static const struct snd_pcm_ops snd_cs46xx_playback_indirect_iec958_ops = { .open = snd_cs46xx_playback_open_iec958, .close = snd_cs46xx_playback_close_iec958, .ioctl = snd_pcm_lib_ioctl, @@ -1725,7 +1725,7 @@ static int snd_cs46xx_capture_close(struct snd_pcm_substream *substream) #endif -static struct snd_pcm_ops snd_cs46xx_playback_ops = { +static const struct snd_pcm_ops snd_cs46xx_playback_ops = { .open = snd_cs46xx_playback_open, .close = snd_cs46xx_playback_close, .ioctl = snd_pcm_lib_ioctl, @@ -1736,7 +1736,7 @@ static int snd_cs46xx_capture_close(struct snd_pcm_substream *substream) .pointer = snd_cs46xx_playback_direct_pointer, }; -static struct snd_pcm_ops snd_cs46xx_playback_indirect_ops = { +static const struct snd_pcm_ops snd_cs46xx_playback_indirect_ops = { .open = snd_cs46xx_playback_open, .close = snd_cs46xx_playback_close, .ioctl = snd_pcm_lib_ioctl, @@ -1748,7 +1748,7 @@ static int snd_cs46xx_capture_close(struct snd_pcm_substream *substream) .ack = snd_cs46xx_playback_transfer, }; -static struct snd_pcm_ops snd_cs46xx_capture_ops = { +static const struct snd_pcm_ops snd_cs46xx_capture_ops = { .open = snd_cs46xx_capture_open, .close = snd_cs46xx_capture_close, .ioctl = snd_pcm_lib_ioctl, @@ -1759,7 +1759,7 @@ static int snd_cs46xx_capture_close(struct snd_pcm_substream *substream) .pointer = snd_cs46xx_capture_direct_pointer, }; -static struct snd_pcm_ops snd_cs46xx_capture_indirect_ops = { +static const struct snd_pcm_ops snd_cs46xx_capture_indirect_ops = { .open = snd_cs46xx_capture_open, .close = snd_cs46xx_capture_close, .ioctl = snd_pcm_lib_ioctl, -- 1.9.1

2 1

[alsa-devel] [PATCH v2 1/7] drivers: pinctrl: add driver for Allwinner H5 SoC
by Icenowy Zheng 26 Jan '17

26 Jan '17

Based on the Allwinner H5 datasheet and the pinctrl driver of the backward-compatible H3 this introduces the pin multiplex assignments for the H5 SoC. H5 introduced some more pin functions (e.g. three more groups of TS pins, and one more groups of SIM pins) than H3. Signed-off-by: Icenowy Zheng <icenowy(a)aosc.xyz> --- Changes in v2: - Fixed interrupt banks. (There's one more GPIO banks (PF) that can do interrupt handling on H5) .../bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 1 + drivers/pinctrl/sunxi/Kconfig | 4 + drivers/pinctrl/sunxi/Makefile | 1 + drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c | 558 +++++++++++++++++++++ 4 files changed, 564 insertions(+) create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c diff --git a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt index c931fb1c01a6..2fd688c8dbdb 100644 --- a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt @@ -23,6 +23,7 @@ Required properties: "allwinner,sun8i-h3-pinctrl" "allwinner,sun8i-h3-r-pinctrl" "allwinner,sun50i-a64-pinctrl" + "allwinner,sun50i-h5-r-pinctrl" "nextthing,gr8-pinctrl" - reg: Should contain the register physical address and length for the diff --git a/drivers/pinctrl/sunxi/Kconfig b/drivers/pinctrl/sunxi/Kconfig index 8ba10d830ce2..92d845827577 100644 --- a/drivers/pinctrl/sunxi/Kconfig +++ b/drivers/pinctrl/sunxi/Kconfig @@ -72,4 +72,8 @@ config PINCTRL_SUN50I_A64 bool select PINCTRL_SUNXI +config PINCTRL_SUN50I_H5 + bool + select PINCTRL_SUNXI + endif diff --git a/drivers/pinctrl/sunxi/Makefile b/drivers/pinctrl/sunxi/Makefile index 7bcb4683bce5..f9a3855c42f1 100644 --- a/drivers/pinctrl/sunxi/Makefile +++ b/drivers/pinctrl/sunxi/Makefile @@ -16,5 +16,6 @@ obj-$(CONFIG_PINCTRL_SUN8I_A83T) += pinctrl-sun8i-a83t.o obj-$(CONFIG_PINCTRL_SUN8I_H3) += pinctrl-sun8i-h3.o obj-$(CONFIG_PINCTRL_SUN8I_H3_R) += pinctrl-sun8i-h3-r.o obj-$(CONFIG_PINCTRL_SUN8I_V3S) += pinctrl-sun8i-v3s.o +obj-$(CONFIG_PINCTRL_SUN50I_H5) += pinctrl-sun50i-h5.o obj-$(CONFIG_PINCTRL_SUN9I_A80) += pinctrl-sun9i-a80.o obj-$(CONFIG_PINCTRL_SUN9I_A80_R) += pinctrl-sun9i-a80-r.o diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c new file mode 100644 index 000000000000..ccf9419e9418 --- /dev/null +++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c @@ -0,0 +1,558 @@ +/* + * Allwinner H5 SoC pinctrl driver. + * + * Copyright (C) 2016 Icenowy Zheng <icenowy(a)aosc.xyz> + * + * Based on pinctrl-sun8i-h3.c, which is: + * Copyright (C) 2015 Jens Kuske <jenskuske(a)gmail.com> + * + * Based on pinctrl-sun8i-a23.c, which is: + * Copyright (C) 2014 Chen-Yu Tsai <wens(a)csie.org> + * Copyright (C) 2014 Maxime Ripard <maxime.ripard(a)free-electrons.com> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/of.h> +#include <linux/of_device.h> +#include <linux/pinctrl/pinctrl.h> + +#include "pinctrl-sunxi.h" + +static const struct sunxi_desc_pin sun50i_h5_pins[] = { + SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "uart2"), /* TX */ + SUNXI_FUNCTION(0x3, "jtag"), /* MS */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)), /* PA_EINT0 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "uart2"), /* RX */ + SUNXI_FUNCTION(0x3, "jtag"), /* CK */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)), /* PA_EINT1 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "uart2"), /* RTS */ + SUNXI_FUNCTION(0x3, "jtag"), /* DO */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)), /* PA_EINT2 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "uart2"), /* CTS */ + SUNXI_FUNCTION(0x3, "jtag"), /* DI */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)), /* PA_EINT3 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "uart0"), /* TX */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)), /* PA_EINT4 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "uart0"), /* RX */ + SUNXI_FUNCTION(0x3, "pwm0"), + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)), /* PA_EINT5 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "sim"), /* PWREN */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)), /* PA_EINT6 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "sim"), /* CLK */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)), /* PA_EINT7 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 8), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "sim"), /* DATA */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)), /* PA_EINT8 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 9), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "sim"), /* RST */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)), /* PA_EINT9 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 10), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "sim"), /* DET */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)), /* PA_EINT10 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 11), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2c0"), /* SCK */ + SUNXI_FUNCTION(0x3, "di"), /* TX */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)), /* PA_EINT11 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 12), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2c0"), /* SDA */ + SUNXI_FUNCTION(0x3, "di"), /* RX */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 12)), /* PA_EINT12 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 13), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "spi1"), /* CS */ + SUNXI_FUNCTION(0x3, "uart3"), /* TX */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 13)), /* PA_EINT13 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 14), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "spi1"), /* CLK */ + SUNXI_FUNCTION(0x3, "uart3"), /* RX */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 14)), /* PA_EINT14 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 15), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "spi1"), /* MOSI */ + SUNXI_FUNCTION(0x3, "uart3"), /* RTS */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 15)), /* PA_EINT15 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 16), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "spi1"), /* MISO */ + SUNXI_FUNCTION(0x3, "uart3"), /* CTS */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 16)), /* PA_EINT16 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 17), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "spdif"), /* OUT */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 17)), /* PA_EINT17 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 18), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2s0"), /* SYNC */ + SUNXI_FUNCTION(0x3, "i2c1"), /* SCK */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 18)), /* PA_EINT18 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 19), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2s0"), /* CLK */ + SUNXI_FUNCTION(0x3, "i2c1"), /* SDA */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 19)), /* PA_EINT19 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 20), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2s0"), /* DOUT */ + SUNXI_FUNCTION(0x3, "sim"), /* VPPEN */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 20)), /* PA_EINT20 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 21), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2s0"), /* DIN */ + SUNXI_FUNCTION(0x3, "sim"), /* VPPPP */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 21)), /* PA_EINT21 */ + /* Hole */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* WE */ + SUNXI_FUNCTION(0x3, "spi0")), /* MOSI */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* ALE */ + SUNXI_FUNCTION(0x3, "spi0"), /* MISO */ + SUNXI_FUNCTION(0x4, "mmc2")), /* DS */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* CLE */ + SUNXI_FUNCTION(0x3, "spi0")), /* CLK */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* CE1 */ + SUNXI_FUNCTION(0x3, "spi0")), /* CS */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* CE0 */ + SUNXI_FUNCTION(0x4, "spi0")), /* MISO */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* RE */ + SUNXI_FUNCTION(0x3, "mmc2")), /* CLK */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* RB0 */ + SUNXI_FUNCTION(0x3, "mmc2")), /* CMD */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0")), /* RB1 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* DQ0 */ + SUNXI_FUNCTION(0x3, "mmc2")), /* D0 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* DQ1 */ + SUNXI_FUNCTION(0x3, "mmc2")), /* D1 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* DQ2 */ + SUNXI_FUNCTION(0x3, "mmc2")), /* D2 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* DQ3 */ + SUNXI_FUNCTION(0x3, "mmc2")), /* D3 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* DQ4 */ + SUNXI_FUNCTION(0x3, "mmc2")), /* D4 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* DQ5 */ + SUNXI_FUNCTION(0x3, "mmc2")), /* D5 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* DQ6 */ + SUNXI_FUNCTION(0x3, "mmc2")), /* D6 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* DQ7 */ + SUNXI_FUNCTION(0x3, "mmc2")), /* D7 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* DQS */ + SUNXI_FUNCTION(0x3, "mmc2")), /* RST */ + /* Hole */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "emac"), /* RXD3 */ + SUNXI_FUNCTION(0x3, "di"), /* TX */ + SUNXI_FUNCTION(0x4, "ts2")), /* CLK */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "emac"), /* RXD2 */ + SUNXI_FUNCTION(0x3, "di"), /* RX */ + SUNXI_FUNCTION(0x4, "ts2")), /* ERR */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "emac"), /* RXD1 */ + SUNXI_FUNCTION(0x4, "ts2")), /* SYNC */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "emac"), /* RXD0 */ + SUNXI_FUNCTION(0x4, "ts2")), /* DVLD */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "emac"), /* RXCK */ + SUNXI_FUNCTION(0x4, "ts2")), /* D0 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "emac"), /* RXCTL/RXDV */ + SUNXI_FUNCTION(0x4, "ts2")), /* D1 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "emac"), /* RXERR */ + SUNXI_FUNCTION(0x4, "ts2")), /* D2 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "emac"), /* TXD3 */ + SUNXI_FUNCTION(0x4, "ts2"), /* D3 */ + SUNXI_FUNCTION(0x5, "ts3")), /* CLK */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "emac"), /* TXD2 */ + SUNXI_FUNCTION(0x4, "ts2"), /* D4 */ + SUNXI_FUNCTION(0x5, "ts3")), /* ERR */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "emac"), /* TXD1 */ + SUNXI_FUNCTION(0x4, "ts2"), /* D5 */ + SUNXI_FUNCTION(0x5, "ts3")), /* SYNC */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "emac"), /* TXD0 */ + SUNXI_FUNCTION(0x4, "ts2"), /* D6 */ + SUNXI_FUNCTION(0x5, "ts3")), /* DVLD */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "emac"), /* CRS */ + SUNXI_FUNCTION(0x4, "ts2"), /* D7 */ + SUNXI_FUNCTION(0x5, "ts3")), /* D0 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "emac"), /* TXCK */ + SUNXI_FUNCTION(0x4, "sim")), /* PWREN */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "emac"), /* TXCTL/TXEN */ + SUNXI_FUNCTION(0x4, "sim")), /* CLK */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "emac"), /* TXERR */ + SUNXI_FUNCTION(0x4, "sim")), /* DATA */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "emac"), /* CLKIN/COL */ + SUNXI_FUNCTION(0x4, "sim")), /* RST */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "emac"), /* MDC */ + SUNXI_FUNCTION(0x4, "sim")), /* DET */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "emac")), /* MDIO */ + /* Hole */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "csi"), /* PCLK */ + SUNXI_FUNCTION(0x3, "ts0")), /* CLK */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "csi"), /* MCLK */ + SUNXI_FUNCTION(0x3, "ts0")), /* ERR */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "csi"), /* HSYNC */ + SUNXI_FUNCTION(0x3, "ts0")), /* SYNC */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "csi"), /* VSYNC */ + SUNXI_FUNCTION(0x3, "ts0")), /* DVLD */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "csi"), /* D0 */ + SUNXI_FUNCTION(0x3, "ts0")), /* D0 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "csi"), /* D1 */ + SUNXI_FUNCTION(0x3, "ts0")), /* D1 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "csi"), /* D2 */ + SUNXI_FUNCTION(0x3, "ts0")), /* D2 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "csi"), /* D3 */ + SUNXI_FUNCTION(0x3, "ts0"), /* D3 */ + SUNXI_FUNCTION(0x4, "ts1")), /* CLK */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "csi"), /* D4 */ + SUNXI_FUNCTION(0x3, "ts0"), /* D4 */ + SUNXI_FUNCTION(0x4, "ts1")), /* ERR */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "csi"), /* D5 */ + SUNXI_FUNCTION(0x3, "ts0"), /* D5 */ + SUNXI_FUNCTION(0x4, "ts1")), /* SYNC */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "csi"), /* D6 */ + SUNXI_FUNCTION(0x3, "ts0"), /* D6 */ + SUNXI_FUNCTION(0x4, "ts1")), /* DVLD */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "csi"), /* D7 */ + SUNXI_FUNCTION(0x3, "ts"), /* D7 */ + SUNXI_FUNCTION(0x4, "ts1")), /* D0 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "csi"), /* SCK */ + SUNXI_FUNCTION(0x3, "i2c2")), /* SCK */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 13), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "csi"), /* SDA */ + SUNXI_FUNCTION(0x3, "i2c2")), /* SDA */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 14), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x3, "sim")), /* VPPEN */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 15), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x3, "sim")), /* VPPPP */ + /* Hole */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */ + SUNXI_FUNCTION(0x3, "jtag"), /* MS */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 0)), /* PF_EINT0 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */ + SUNXI_FUNCTION(0x3, "jtag"), /* DI */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 1)), /* PF_EINT1 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */ + SUNXI_FUNCTION(0x3, "uart0"), /* TX */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 2)), /* PF_EINT2 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */ + SUNXI_FUNCTION(0x3, "jtag"), /* DO */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 3)), /* PF_EINT3 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */ + SUNXI_FUNCTION(0x3, "uart0"), /* RX */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 4)), /* PF_EINT4 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */ + SUNXI_FUNCTION(0x3, "jtag"), /* CK */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 5)), /* PF_EINT5 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 6), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 6)), /* PF_EINT6 */ + /* Hole */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "mmc1"), /* CLK */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 0)), /* PG_EINT0 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "mmc1"), /* CMD */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 1)), /* PG_EINT1 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "mmc1"), /* D0 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 2)), /* PG_EINT2 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "mmc1"), /* D1 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 3)), /* PG_EINT3 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "mmc1"), /* D2 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 4)), /* PG_EINT4 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "mmc1"), /* D3 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 5)), /* PG_EINT5 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "uart1"), /* TX */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 6)), /* PG_EINT6 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "uart1"), /* RX */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 7)), /* PG_EINT7 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "uart1"), /* RTS */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 8)), /* PG_EINT8 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "uart1"), /* CTS */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 9)), /* PG_EINT9 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2s1"), /* SYNC */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 10)), /* PG_EINT10 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2s1"), /* CLK */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 11)), /* PG_EINT11 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 12), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2s1"), /* DOUT */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 12)), /* PG_EINT12 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 13), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2s1"), /* DIN */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 13)), /* PG_EINT13 */ +}; + +static const struct sunxi_pinctrl_desc sun50i_h5_pinctrl_data = { + .pins = sun50i_h5_pins, + .npins = ARRAY_SIZE(sun50i_h5_pins), + .irq_banks = 2, + .irq_read_needs_mux = true +}; + +static int sun50i_h5_pinctrl_probe(struct platform_device *pdev) +{ + return sunxi_pinctrl_init(pdev, + &sun50i_h5_pinctrl_data); +} + +static const struct of_device_id sun50i_h5_pinctrl_match[] = { + { .compatible = "allwinner,sun50i-h5-pinctrl", }, + {} +}; + +static struct platform_driver sun50i_h5_pinctrl_driver = { + .probe = sun50i_h5_pinctrl_probe, + .driver = { + .name = "sun50i-h5-pinctrl", + .of_match_table = sun50i_h5_pinctrl_match, + }, +}; +builtin_platform_driver(sun50i_h5_pinctrl_driver); -- 2.11.0

1 3

[alsa-devel] Alsa-lib Dmix issue
by Anoop Rajan 26 Jan '17

26 Jan '17

Hello All, I am trying to play a song using dmix plugin using AlsaLib(1.0.29) , My kernel (Linux 3.8)hangs at poll() on snd timer interface.When I debugged further, I understood that poll hangs because of DMA interrupt (snd_pcm_period_elapsed)not been received. Asound. conf as pcm.softvol { type softvol slave { pcm "hw:0,0" } control { name "Master" card 0 } } pcm.volmix { type dmix ipc_key 1024 ipc_key_add_uid yes ipc_perm 0660 slave { pcm "hw:0,0" rate 44100 } } used aplay -D 'plug:volmix' 123.wav. Where as the normal playback aplay 123.wav plays the song as expected. Comparing the two cases, I observed that Dmix is not incrementing the control.appl_ptr(always zero) in SNDRV_PCM_IOCTL_SYNC_PTR ioctl , but the later one(with out dmix) increments this and kernel is notified with the data written with the value in application pointer. Trying to understand further, though I am not an expert here, snd_pcm_dmix_sync_area is invoked, the data is written to destination , dmix->slave_appl_ptr is incremented, but some how the link to dmix->spcm->private_data->sync_ptr->c.control.appl_ptr is not incremented with the written frames. As I understand, SNDRV_PCM_IOCTL_SYNC_PTR should notify kernel with the application pointer else kernel cant understand how much is written when we do data mmap. I am trying to understand why it is not incremented, but strongly believe that it cannot be a bug in alsa-lib Dmix, but I am lacking some thing, but wondering what I am missing here.My kernel access type is MMAP_INTERLEAVED. Exactly same issue mentioned on RaspberryPi below but no solution provided https://www.raspberrypi.org/forums/viewtopic.php?t=64936&p=481557. <https://www.raspberrypi.org/forums/viewtopic.php?t=64936&p=481557> <https://www.raspberrypi.org/forums/viewtopic.php?t=64936&p=481557> Please help me to understand more here, any pointers is appreciated. Regards, Anoop

2 4

[alsa-devel] [PATCH] ASoC: nau8540: new codec driver
by John Hsu 26 Jan '17

26 Jan '17

Add codec driver of NAU85L40 Signed-off-by: John Hsu <KCHSU0(a)nuvoton.com> --- .../devicetree/bindings/sound/nau8540.txt | 16 + sound/soc/codecs/Kconfig | 5 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/nau8540.c | 813 +++++++++++++++++++++ sound/soc/codecs/nau8540.h | 228 ++++++ 5 files changed, 1064 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/nau8540.txt create mode 100644 sound/soc/codecs/nau8540.c create mode 100644 sound/soc/codecs/nau8540.h diff --git a/Documentation/devicetree/bindings/sound/nau8540.txt b/Documentation/devicetree/bindings/sound/nau8540.txt new file mode 100644 index 0000000..2cc6cf6 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/nau8540.txt @@ -0,0 +1,16 @@ +NAU85L40 audio CODEC + +This device supports I2C only. + +Required properties: + + - compatible : "nuvoton,nau8540" + + - reg : the I2C address of the device. + +Example: + +codec: nau8540@1c { + compatible = "nuvoton,nau8540"; + reg = <0x1c>; +}; diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index 9e1718a..c31cdc9 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -95,6 +95,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_MAX9877 if I2C select SND_SOC_MC13783 if MFD_MC13XXX select SND_SOC_ML26124 if I2C + select SND_SOC_NAU8540 if I2C select SND_SOC_NAU8810 if I2C select SND_SOC_NAU8825 if I2C select SND_SOC_HDMI_CODEC @@ -1105,6 +1106,10 @@ config SND_SOC_MC13783 config SND_SOC_ML26124 tristate +config SND_SOC_NAU8540 + tristate "Nuvoton Technology Corporation NAU85L40 CODEC" + depends on I2C + config SND_SOC_NAU8810 tristate "Nuvoton Technology Corporation NAU88C10 CODEC" depends on I2C diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index 7e1dad7..0a7f4ff 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -90,6 +90,7 @@ snd-soc-mc13783-objs := mc13783.o snd-soc-ml26124-objs := ml26124.o snd-soc-msm8916-analog-objs := msm8916-wcd-analog.o snd-soc-msm8916-digital-objs := msm8916-wcd-digital.o +snd-soc-nau8540-objs := nau8540.o snd-soc-nau8810-objs := nau8810.o snd-soc-nau8825-objs := nau8825.o snd-soc-hdmi-codec-objs := hdmi-codec.o @@ -318,6 +319,7 @@ obj-$(CONFIG_SND_SOC_MC13783) += snd-soc-mc13783.o obj-$(CONFIG_SND_SOC_ML26124) += snd-soc-ml26124.o obj-$(CONFIG_SND_SOC_MSM8916_WCD_ANALOG) +=snd-soc-msm8916-analog.o obj-$(CONFIG_SND_SOC_MSM8916_WCD_DIGITAL) +=snd-soc-msm8916-digital.o +obj-$(CONFIG_SND_SOC_NAU8540) += snd-soc-nau8540.o obj-$(CONFIG_SND_SOC_NAU8810) += snd-soc-nau8810.o obj-$(CONFIG_SND_SOC_NAU8825) += snd-soc-nau8825.o obj-$(CONFIG_SND_SOC_HDMI_CODEC) += snd-soc-hdmi-codec.o diff --git a/sound/soc/codecs/nau8540.c b/sound/soc/codecs/nau8540.c new file mode 100644 index 0000000..8a00565 --- /dev/null +++ b/sound/soc/codecs/nau8540.c @@ -0,0 +1,813 @@ +/* + * NAU85L40 ALSA SoC audio driver + * + * Copyright 2016 Nuvoton Technology Corp. + * Author: John Hsu <KCHSU0(a)nuvoton.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/module.h> +#include <linux/moduleparam.h> +#include <linux/init.h> +#include <linux/delay.h> +#include <linux/pm.h> +#include <linux/i2c.h> +#include <linux/regmap.h> +#include <linux/regulator/consumer.h> +#include <linux/spi/spi.h> +#include <linux/slab.h> +#include <linux/of_device.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/soc.h> +#include <sound/soc-dapm.h> +#include <sound/initval.h> +#include <sound/tlv.h> +#include "nau8540.h" + + +#define NAU_FREF_MAX 13500000 +#define NAU_FVCO_MAX 100000000 +#define NAU_FVCO_MIN 90000000 + +/* the maximum frequency of CLK_ADC */ +#define CLK_ADC_MAX 6144000 + +/* scaling for mclk from sysclk_src output */ +static const struct nau8540_fll_attr mclk_src_scaling[] = { + { 1, 0x0 }, + { 2, 0x2 }, + { 4, 0x3 }, + { 8, 0x4 }, + { 16, 0x5 }, + { 32, 0x6 }, + { 3, 0x7 }, + { 6, 0xa }, + { 12, 0xb }, + { 24, 0xc }, +}; + +/* ratio for input clk freq */ +static const struct nau8540_fll_attr fll_ratio[] = { + { 512000, 0x01 }, + { 256000, 0x02 }, + { 128000, 0x04 }, + { 64000, 0x08 }, + { 32000, 0x10 }, + { 8000, 0x20 }, + { 4000, 0x40 }, +}; + +static const struct nau8540_fll_attr fll_pre_scalar[] = { + { 1, 0x0 }, + { 2, 0x1 }, + { 4, 0x2 }, + { 8, 0x3 }, +}; + +/* over sampling rate */ +static const struct nau8540_osr_attr osr_adc_sel[] = { + { 32, 3 }, /* OSR 32, SRC 1/8 */ + { 64, 2 }, /* OSR 64, SRC 1/4 */ + { 128, 1 }, /* OSR 128, SRC 1/2 */ + { 256, 0 }, /* OSR 256, SRC 1 */ +}; + +static const struct reg_default nau8540_reg_defaults[] = { + {NAU8540_REG_POWER_MANAGEMENT, 0x0000}, + {NAU8540_REG_CLOCK_CTRL, 0x0000}, + {NAU8540_REG_CLOCK_SRC, 0x0000}, + {NAU8540_REG_FLL1, 0x0001}, + {NAU8540_REG_FLL2, 0x3126}, + {NAU8540_REG_FLL3, 0x0008}, + {NAU8540_REG_FLL4, 0x0010}, + {NAU8540_REG_FLL5, 0xC000}, + {NAU8540_REG_FLL6, 0x6000}, + {NAU8540_REG_FLL_VCO_RSV, 0xF13C}, + {NAU8540_REG_PCM_CTRL0, 0x000B}, + {NAU8540_REG_PCM_CTRL1, 0x3010}, + {NAU8540_REG_PCM_CTRL2, 0x0800}, + {NAU8540_REG_PCM_CTRL3, 0x0000}, + {NAU8540_REG_PCM_CTRL4, 0x000F}, + {NAU8540_REG_ALC_CONTROL_1, 0x0000}, + {NAU8540_REG_ALC_CONTROL_2, 0x700B}, + {NAU8540_REG_ALC_CONTROL_3, 0x0022}, + {NAU8540_REG_ALC_CONTROL_4, 0x1010}, + {NAU8540_REG_ALC_CONTROL_5, 0x1010}, + {NAU8540_REG_NOTCH_FIL1_CH1, 0x0000}, + {NAU8540_REG_NOTCH_FIL2_CH1, 0x0000}, + {NAU8540_REG_NOTCH_FIL1_CH2, 0x0000}, + {NAU8540_REG_NOTCH_FIL2_CH2, 0x0000}, + {NAU8540_REG_NOTCH_FIL1_CH3, 0x0000}, + {NAU8540_REG_NOTCH_FIL2_CH3, 0x0000}, + {NAU8540_REG_NOTCH_FIL1_CH4, 0x0000}, + {NAU8540_REG_NOTCH_FIL2_CH4, 0x0000}, + {NAU8540_REG_HPF_FILTER_CH12, 0x0000}, + {NAU8540_REG_HPF_FILTER_CH34, 0x0000}, + {NAU8540_REG_ADC_SAMPLE_RATE, 0x0002}, + {NAU8540_REG_DIGITAL_GAIN_CH1, 0x0400}, + {NAU8540_REG_DIGITAL_GAIN_CH2, 0x0400}, + {NAU8540_REG_DIGITAL_GAIN_CH3, 0x0400}, + {NAU8540_REG_DIGITAL_GAIN_CH4, 0x0400}, + {NAU8540_REG_DIGITAL_MUX, 0x00E4}, + {NAU8540_REG_GPIO_CTRL, 0x0000}, + {NAU8540_REG_MISC_CTRL, 0x0000}, + {NAU8540_REG_I2C_CTRL, 0xEFFF}, + {NAU8540_REG_VMID_CTRL, 0x0000}, + {NAU8540_REG_MUTE, 0x0000}, + {NAU8540_REG_ANALOG_ADC1, 0x0011}, + {NAU8540_REG_ANALOG_ADC2, 0x0020}, + {NAU8540_REG_ANALOG_PWR, 0x0000}, + {NAU8540_REG_MIC_BIAS, 0x0004}, + {NAU8540_REG_REFERENCE, 0x0000}, + {NAU8540_REG_FEPGA1, 0x0000}, + {NAU8540_REG_FEPGA2, 0x0000}, + {NAU8540_REG_FEPGA3, 0x0101}, + {NAU8540_REG_FEPGA4, 0x0101}, + {NAU8540_REG_PWR, 0x0000}, +}; + +static bool nau8540_readable_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case NAU8540_REG_POWER_MANAGEMENT ... NAU8540_REG_FLL_VCO_RSV: + case NAU8540_REG_PCM_CTRL0 ... NAU8540_REG_PCM_CTRL4: + case NAU8540_REG_ALC_CONTROL_1 ... NAU8540_REG_ALC_CONTROL_5: + case NAU8540_REG_ALC_GAIN_CH12 ... NAU8540_REG_ADC_SAMPLE_RATE: + case NAU8540_REG_DIGITAL_GAIN_CH1 ... NAU8540_REG_DIGITAL_MUX: + case NAU8540_REG_P2P_CH1 ... NAU8540_REG_I2C_CTRL: + case NAU8540_REG_I2C_DEVICE_ID: + case NAU8540_REG_VMID_CTRL ... NAU8540_REG_MUTE: + case NAU8540_REG_ANALOG_ADC1 ... NAU8540_REG_PWR: + return true; + default: + return false; + } + +} + +static bool nau8540_writeable_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case NAU8540_REG_SW_RESET ... NAU8540_REG_FLL_VCO_RSV: + case NAU8540_REG_PCM_CTRL0 ... NAU8540_REG_PCM_CTRL4: + case NAU8540_REG_ALC_CONTROL_1 ... NAU8540_REG_ALC_CONTROL_5: + case NAU8540_REG_NOTCH_FIL1_CH1 ... NAU8540_REG_ADC_SAMPLE_RATE: + case NAU8540_REG_DIGITAL_GAIN_CH1 ... NAU8540_REG_DIGITAL_MUX: + case NAU8540_REG_GPIO_CTRL ... NAU8540_REG_I2C_CTRL: + case NAU8540_REG_RST: + case NAU8540_REG_VMID_CTRL ... NAU8540_REG_MUTE: + case NAU8540_REG_ANALOG_ADC1 ... NAU8540_REG_PWR: + return true; + default: + return false; + } +} + +static bool nau8540_volatile_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case NAU8540_REG_SW_RESET: + case NAU8540_REG_ALC_GAIN_CH12 ... NAU8540_REG_ALC_STATUS: + case NAU8540_REG_P2P_CH1 ... NAU8540_REG_PEAK_CH4: + case NAU8540_REG_I2C_DEVICE_ID: + case NAU8540_REG_RST: + return true; + default: + return false; + } +} + + +static const DECLARE_TLV_DB_MINMAX(adc_vol_tlv, -12800, 3600); +static const DECLARE_TLV_DB_MINMAX(fepga_gain_tlv, -100, 3600); + +static const struct snd_kcontrol_new nau8540_snd_controls[] = { + SOC_SINGLE_TLV("Mic1 Volume", NAU8540_REG_DIGITAL_GAIN_CH1, + 0, 0x520, 0, adc_vol_tlv), + SOC_SINGLE_TLV("Mic2 Volume", NAU8540_REG_DIGITAL_GAIN_CH2, + 0, 0x520, 0, adc_vol_tlv), + SOC_SINGLE_TLV("Mic3 Volume", NAU8540_REG_DIGITAL_GAIN_CH3, + 0, 0x520, 0, adc_vol_tlv), + SOC_SINGLE_TLV("Mic4 Volume", NAU8540_REG_DIGITAL_GAIN_CH4, + 0, 0x520, 0, adc_vol_tlv), + + SOC_SINGLE_TLV("Frontend PGA1 Volume", NAU8540_REG_FEPGA3, + 0, 0x25, 0, fepga_gain_tlv), + SOC_SINGLE_TLV("Frontend PGA2 Volume", NAU8540_REG_FEPGA3, + 8, 0x25, 0, fepga_gain_tlv), + SOC_SINGLE_TLV("Frontend PGA3 Volume", NAU8540_REG_FEPGA4, + 0, 0x25, 0, fepga_gain_tlv), + SOC_SINGLE_TLV("Frontend PGA4 Volume", NAU8540_REG_FEPGA4, + 8, 0x25, 0, fepga_gain_tlv), +}; + +static const char * const adc_channel[] = { + "ADC channel 1", "ADC channel 2", "ADC channel 3", "ADC channel 4" +}; +static SOC_ENUM_SINGLE_DECL( + digital_ch4_enum, NAU8540_REG_DIGITAL_MUX, 6, adc_channel); + +static const struct snd_kcontrol_new digital_ch4_mux = + SOC_DAPM_ENUM("Digital CH4 Select", digital_ch4_enum); + +static SOC_ENUM_SINGLE_DECL( + digital_ch3_enum, NAU8540_REG_DIGITAL_MUX, 4, adc_channel); + +static const struct snd_kcontrol_new digital_ch3_mux = + SOC_DAPM_ENUM("Digital CH3 Select", digital_ch3_enum); + +static SOC_ENUM_SINGLE_DECL( + digital_ch2_enum, NAU8540_REG_DIGITAL_MUX, 2, adc_channel); + +static const struct snd_kcontrol_new digital_ch2_mux = + SOC_DAPM_ENUM("Digital CH2 Select", digital_ch2_enum); + +static SOC_ENUM_SINGLE_DECL( + digital_ch1_enum, NAU8540_REG_DIGITAL_MUX, 0, adc_channel); + +static const struct snd_kcontrol_new digital_ch1_mux = + SOC_DAPM_ENUM("Digital CH1 Select", digital_ch1_enum); + +static const struct snd_soc_dapm_widget nau8540_dapm_widgets[] = { + SND_SOC_DAPM_SUPPLY("MICBIAS2", NAU8540_REG_MIC_BIAS, 11, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("MICBIAS1", NAU8540_REG_MIC_BIAS, 10, 0, NULL, 0), + + SND_SOC_DAPM_INPUT("MIC1"), + SND_SOC_DAPM_INPUT("MIC2"), + SND_SOC_DAPM_INPUT("MIC3"), + SND_SOC_DAPM_INPUT("MIC4"), + + SND_SOC_DAPM_PGA("Frontend PGA1", NAU8540_REG_PWR, 12, 0, NULL, 0), + SND_SOC_DAPM_PGA("Frontend PGA2", NAU8540_REG_PWR, 13, 0, NULL, 0), + SND_SOC_DAPM_PGA("Frontend PGA3", NAU8540_REG_PWR, 14, 0, NULL, 0), + SND_SOC_DAPM_PGA("Frontend PGA4", NAU8540_REG_PWR, 15, 0, NULL, 0), + + SND_SOC_DAPM_ADC("ADC1", NULL, + NAU8540_REG_POWER_MANAGEMENT, 0, 0), + SND_SOC_DAPM_ADC("ADC2", NULL, + NAU8540_REG_POWER_MANAGEMENT, 1, 0), + SND_SOC_DAPM_ADC("ADC3", NULL, + NAU8540_REG_POWER_MANAGEMENT, 2, 0), + SND_SOC_DAPM_ADC("ADC4", NULL, + NAU8540_REG_POWER_MANAGEMENT, 3, 0), + + SND_SOC_DAPM_PGA("ADC CH1", NAU8540_REG_ANALOG_PWR, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("ADC CH2", NAU8540_REG_ANALOG_PWR, 1, 0, NULL, 0), + SND_SOC_DAPM_PGA("ADC CH3", NAU8540_REG_ANALOG_PWR, 2, 0, NULL, 0), + SND_SOC_DAPM_PGA("ADC CH4", NAU8540_REG_ANALOG_PWR, 3, 0, NULL, 0), + + SND_SOC_DAPM_MUX("Digital CH4 Mux", + SND_SOC_NOPM, 0, 0, &digital_ch4_mux), + SND_SOC_DAPM_MUX("Digital CH3 Mux", + SND_SOC_NOPM, 0, 0, &digital_ch3_mux), + SND_SOC_DAPM_MUX("Digital CH2 Mux", + SND_SOC_NOPM, 0, 0, &digital_ch2_mux), + SND_SOC_DAPM_MUX("Digital CH1 Mux", + SND_SOC_NOPM, 0, 0, &digital_ch1_mux), + + SND_SOC_DAPM_AIF_OUT("AIFTX", "Capture", 0, SND_SOC_NOPM, 0, 0), +}; + +static const struct snd_soc_dapm_route nau8540_dapm_routes[] = { + {"Frontend PGA1", NULL, "MIC1"}, + {"Frontend PGA2", NULL, "MIC2"}, + {"Frontend PGA3", NULL, "MIC3"}, + {"Frontend PGA4", NULL, "MIC4"}, + + {"ADC1", NULL, "Frontend PGA1"}, + {"ADC2", NULL, "Frontend PGA2"}, + {"ADC3", NULL, "Frontend PGA3"}, + {"ADC4", NULL, "Frontend PGA4"}, + + {"ADC CH1", NULL, "ADC1"}, + {"ADC CH2", NULL, "ADC2"}, + {"ADC CH3", NULL, "ADC3"}, + {"ADC CH4", NULL, "ADC4"}, + + {"ADC1", NULL, "MICBIAS1"}, + {"ADC2", NULL, "MICBIAS1"}, + {"ADC3", NULL, "MICBIAS2"}, + {"ADC4", NULL, "MICBIAS2"}, + + {"Digital CH1 Mux", "ADC channel 1", "ADC CH1"}, + {"Digital CH1 Mux", "ADC channel 2", "ADC CH2"}, + {"Digital CH1 Mux", "ADC channel 3", "ADC CH3"}, + {"Digital CH1 Mux", "ADC channel 4", "ADC CH4"}, + + {"Digital CH2 Mux", "ADC channel 1", "ADC CH1"}, + {"Digital CH2 Mux", "ADC channel 2", "ADC CH2"}, + {"Digital CH2 Mux", "ADC channel 3", "ADC CH3"}, + {"Digital CH2 Mux", "ADC channel 4", "ADC CH4"}, + + {"Digital CH3 Mux", "ADC channel 1", "ADC CH1"}, + {"Digital CH3 Mux", "ADC channel 2", "ADC CH2"}, + {"Digital CH3 Mux", "ADC channel 3", "ADC CH3"}, + {"Digital CH3 Mux", "ADC channel 4", "ADC CH4"}, + + {"Digital CH4 Mux", "ADC channel 1", "ADC CH1"}, + {"Digital CH4 Mux", "ADC channel 2", "ADC CH2"}, + {"Digital CH4 Mux", "ADC channel 3", "ADC CH3"}, + {"Digital CH4 Mux", "ADC channel 4", "ADC CH4"}, + + {"AIFTX", NULL, "Digital CH1 Mux"}, + {"AIFTX", NULL, "Digital CH2 Mux"}, + {"AIFTX", NULL, "Digital CH3 Mux"}, + {"AIFTX", NULL, "Digital CH4 Mux"}, +}; + +static int nau8540_clock_check(struct nau8540 *nau8540, int rate, int osr) +{ + int osrate; + + if (osr >= ARRAY_SIZE(osr_adc_sel)) + return -EINVAL; + osrate = osr_adc_sel[osr].osr; + + if (rate * osr > CLK_ADC_MAX) { + dev_err(nau8540->dev, "exceed the maximum frequency of CLK_ADC\n"); + return -EINVAL; + } + + return 0; +} + +static int nau8540_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) +{ + struct snd_soc_codec *codec = dai->codec; + struct nau8540 *nau8540 = snd_soc_codec_get_drvdata(codec); + unsigned int val_len = 0, osr; + + /* CLK_ADC = OSR * FS + * ADC clock frequency is defined as Over Sampling Rate (OSR) + * multiplied by the audio sample rate (Fs). Note that the OSR and Fs + * values must be selected such that the maximum frequency is less + * than 6.144 MHz. + */ + regmap_read(nau8540->regmap, NAU8540_REG_ADC_SAMPLE_RATE, &osr); + osr &= NAU8540_ADC_OSR_MASK; + if (nau8540_clock_check(nau8540, params_rate(params), osr)) + return -EINVAL; + regmap_update_bits(nau8540->regmap, NAU8540_REG_CLOCK_SRC, + NAU8540_CLK_ADC_SRC_MASK, + osr_adc_sel[osr].clk_src << NAU8540_CLK_ADC_SRC_SFT); + + switch (params_width(params)) { + case 16: + val_len |= NAU8540_I2S_DL_16; + break; + case 20: + val_len |= NAU8540_I2S_DL_20; + break; + case 24: + val_len |= NAU8540_I2S_DL_24; + break; + case 32: + val_len |= NAU8540_I2S_DL_32; + break; + default: + return -EINVAL; + } + + regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL0, + NAU8540_I2S_DL_MASK, val_len); + + return 0; +} + +static int nau8540_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) +{ + struct snd_soc_codec *codec = dai->codec; + struct nau8540 *nau8540 = snd_soc_codec_get_drvdata(codec); + unsigned int ctrl1_val = 0, ctrl2_val = 0; + + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBM_CFM: + ctrl2_val |= NAU8540_I2S_MS_MASTER; + break; + case SND_SOC_DAIFMT_CBS_CFS: + break; + default: + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + break; + case SND_SOC_DAIFMT_IB_NF: + ctrl1_val |= NAU8540_I2S_BP_INV; + break; + default: + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + ctrl1_val |= NAU8540_I2S_DF_I2S; + break; + case SND_SOC_DAIFMT_LEFT_J: + ctrl1_val |= NAU8540_I2S_DF_LEFT; + break; + case SND_SOC_DAIFMT_RIGHT_J: + ctrl1_val |= NAU8540_I2S_DF_RIGTH; + break; + case SND_SOC_DAIFMT_DSP_A: + ctrl1_val |= NAU8540_I2S_DF_PCM_AB; + break; + case SND_SOC_DAIFMT_DSP_B: + ctrl1_val |= NAU8540_I2S_DF_PCM_AB; + ctrl1_val |= NAU8540_I2S_PCMB_EN; + break; + default: + return -EINVAL; + } + + regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL0, + NAU8540_I2S_DL_MASK | NAU8540_I2S_DF_MASK | + NAU8540_I2S_BP_INV | NAU8540_I2S_PCMB_EN, ctrl1_val); + regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL1, + NAU8540_I2S_MS_MASK | NAU8540_I2S_DO12_OE, ctrl2_val); + regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL2, + NAU8540_I2S_DO34_OE, 0); + + return 0; +} + +/** + * nau8540_set_tdm_slot - configure DAI TX TDM. + * @dai: DAI + * @tx_mask: bitmask representing active TX slots. Ex. + * 0xf for normal 4 channel TDM. + * 0xf0 for shifted 4 channel TDM + * @rx_mask: no used. + * @slots: Number of slots in use. + * @slot_width: Width in bits for each slot. + * + * Configures a DAI for TDM operation. Only support 4 slots TDM. + */ +static int nau8540_set_tdm_slot(struct snd_soc_dai *dai, + unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width) +{ + struct snd_soc_codec *codec = dai->codec; + struct nau8540 *nau8540 = snd_soc_codec_get_drvdata(codec); + unsigned int ctrl2_val = 0, ctrl4_val = 0; + + if (slots > 4 || ((tx_mask & 0xf0) && (tx_mask & 0xf))) + return -EINVAL; + + ctrl4_val |= (NAU8540_TDM_MODE | NAU8540_TDM_OFFSET_EN); + if (tx_mask & 0xf0) { + ctrl2_val = 4 * slot_width; + ctrl4_val |= (tx_mask >> 4); + } else { + ctrl4_val |= tx_mask; + } + regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL4, + NAU8540_TDM_MODE | NAU8540_TDM_OFFSET_EN | + NAU8540_TDM_TX_MASK, ctrl4_val); + regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL1, + NAU8540_I2S_DO12_OE, NAU8540_I2S_DO12_OE); + regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL2, + NAU8540_I2S_DO34_OE | NAU8540_I2S_TSLOT_L_MASK, + NAU8540_I2S_DO34_OE | ctrl2_val); + + return 0; +} + + +static const struct snd_soc_dai_ops nau8540_dai_ops = { + .hw_params = nau8540_hw_params, + .set_fmt = nau8540_set_fmt, + .set_tdm_slot = nau8540_set_tdm_slot, +}; + +#define NAU8540_RATES SNDRV_PCM_RATE_8000_48000 +#define NAU8540_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE \ + | SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S32_LE) + +static struct snd_soc_dai_driver nau8540_dai = { + .name = "nau8540-hifi", + .capture = { + .stream_name = "Capture", + .channels_min = 1, + .channels_max = 4, + .rates = NAU8540_RATES, + .formats = NAU8540_FORMATS, + }, + .ops = &nau8540_dai_ops, +}; + +/** + * nau8540_calc_fll_param - Calculate FLL parameters. + * @fll_in: external clock provided to codec. + * @fs: sampling rate. + * @fll_param: Pointer to structure of FLL parameters. + * + * Calculate FLL parameters to configure codec. + * + * Returns 0 for success or negative error code. + */ +static int nau8540_calc_fll_param(unsigned int fll_in, + unsigned int fs, struct nau8540_fll *fll_param) +{ + u64 fvco, fvco_max; + unsigned int fref, i, fvco_sel; + + /* Ensure the reference clock frequency (FREF) is <= 13.5MHz by dividing + * freq_in by 1, 2, 4, or 8 using FLL pre-scalar. + * FREF = freq_in / NAU8540_FLL_REF_DIV_MASK + */ + for (i = 0; i < ARRAY_SIZE(fll_pre_scalar); i++) { + fref = fll_in / fll_pre_scalar[i].param; + if (fref <= NAU_FREF_MAX) + break; + } + if (i == ARRAY_SIZE(fll_pre_scalar)) + return -EINVAL; + fll_param->clk_ref_div = fll_pre_scalar[i].val; + + /* Choose the FLL ratio based on FREF */ + for (i = 0; i < ARRAY_SIZE(fll_ratio); i++) { + if (fref >= fll_ratio[i].param) + break; + } + if (i == ARRAY_SIZE(fll_ratio)) + return -EINVAL; + fll_param->ratio = fll_ratio[i].val; + + /* Calculate the frequency of DCO (FDCO) given freq_out = 256 * Fs. + * FDCO must be within the 90MHz - 124MHz or the FFL cannot be + * guaranteed across the full range of operation. + * FDCO = freq_out * 2 * mclk_src_scaling + */ + fvco_max = 0; + fvco_sel = ARRAY_SIZE(mclk_src_scaling); + for (i = 0; i < ARRAY_SIZE(mclk_src_scaling); i++) { + fvco = 256 * fs * 2 * mclk_src_scaling[i].param; + if (fvco > NAU_FVCO_MIN && fvco < NAU_FVCO_MAX && + fvco_max < fvco) { + fvco_max = fvco; + fvco_sel = i; + } + } + if (ARRAY_SIZE(mclk_src_scaling) == fvco_sel) + return -EINVAL; + fll_param->mclk_src = mclk_src_scaling[fvco_sel].val; + + /* Calculate the FLL 10-bit integer input and the FLL 16-bit fractional + * input based on FDCO, FREF and FLL ratio. + */ + fvco = div_u64(fvco_max << 16, fref * fll_param->ratio); + fll_param->fll_int = (fvco >> 16) & 0x3FF; + fll_param->fll_frac = fvco & 0xFFFF; + return 0; +} + +static void nau8540_fll_apply(struct regmap *regmap, + struct nau8540_fll *fll_param) +{ + regmap_update_bits(regmap, NAU8540_REG_CLOCK_SRC, + NAU8540_CLK_SRC_MASK | NAU8540_CLK_MCLK_SRC_MASK, + NAU8540_CLK_SRC_MCLK | fll_param->mclk_src); + regmap_update_bits(regmap, NAU8540_REG_FLL1, + NAU8540_FLL_RATIO_MASK, fll_param->ratio); + /* FLL 16-bit fractional input */ + regmap_write(regmap, NAU8540_REG_FLL2, fll_param->fll_frac); + /* FLL 10-bit integer input */ + regmap_update_bits(regmap, NAU8540_REG_FLL3, + NAU8540_FLL_INTEGER_MASK, fll_param->fll_int); + /* FLL pre-scaler */ + regmap_update_bits(regmap, NAU8540_REG_FLL4, + NAU8540_FLL_REF_DIV_MASK, + fll_param->clk_ref_div << NAU8540_FLL_REF_DIV_SFT); + regmap_update_bits(regmap, NAU8540_REG_FLL5, + NAU8540_FLL_CLK_SW_MASK, NAU8540_FLL_CLK_SW_REF); + regmap_update_bits(regmap, + NAU8540_REG_FLL6, NAU8540_DCO_EN, 0); + if (fll_param->fll_frac) { + regmap_update_bits(regmap, NAU8540_REG_FLL5, + NAU8540_FLL_PDB_DAC_EN | NAU8540_FLL_LOOP_FTR_EN | + NAU8540_FLL_FTR_SW_MASK, + NAU8540_FLL_PDB_DAC_EN | NAU8540_FLL_LOOP_FTR_EN | + NAU8540_FLL_FTR_SW_FILTER); + regmap_update_bits(regmap, NAU8540_REG_FLL6, + NAU8540_SDM_EN, NAU8540_SDM_EN); + } else { + regmap_update_bits(regmap, NAU8540_REG_FLL5, + NAU8540_FLL_PDB_DAC_EN | NAU8540_FLL_LOOP_FTR_EN | + NAU8540_FLL_FTR_SW_MASK, NAU8540_FLL_FTR_SW_ACCU); + regmap_update_bits(regmap, + NAU8540_REG_FLL6, NAU8540_SDM_EN, 0); + } +} + +/* freq_out must be 256*Fs in order to achieve the best performance */ +static int nau8540_set_pll(struct snd_soc_codec *codec, int pll_id, int source, + unsigned int freq_in, unsigned int freq_out) +{ + struct nau8540 *nau8540 = snd_soc_codec_get_drvdata(codec); + struct nau8540_fll fll_param; + int ret, fs; + + fs = freq_out / 256; + ret = nau8540_calc_fll_param(freq_in, fs, &fll_param); + if (ret < 0) { + dev_err(nau8540->dev, "Unsupported input clock %d\n", freq_in); + return ret; + } + dev_dbg(nau8540->dev, "mclk_src=%x ratio=%x fll_frac=%x fll_int=%x clk_ref_div=%x\n", + fll_param.mclk_src, fll_param.ratio, fll_param.fll_frac, + fll_param.fll_int, fll_param.clk_ref_div); + + nau8540_fll_apply(nau8540->regmap, &fll_param); + mdelay(2); + regmap_update_bits(nau8540->regmap, NAU8540_REG_CLOCK_SRC, + NAU8540_CLK_SRC_MASK, NAU8540_CLK_SRC_VCO); + + return 0; +} + +static int nau8540_config_sysclk(struct nau8540 *nau8540, + int clk_id, unsigned int freq) +{ + struct regmap *regmap = nau8540->regmap; + + switch (clk_id) { + case NAU8540_CLK_DIS: + case NAU8540_CLK_MCLK: + regmap_update_bits(regmap, NAU8540_REG_CLOCK_SRC, + NAU8540_CLK_SRC_MASK, NAU8540_CLK_SRC_MCLK); + regmap_update_bits(regmap, NAU8540_REG_FLL6, + NAU8540_DCO_EN, 0); + break; + + case NAU8540_CLK_INTERNAL: + regmap_update_bits(regmap, NAU8540_REG_FLL6, + NAU8540_DCO_EN, NAU8540_DCO_EN); + regmap_update_bits(regmap, NAU8540_REG_CLOCK_SRC, + NAU8540_CLK_SRC_MASK, NAU8540_CLK_SRC_VCO); + break; + + case NAU8540_CLK_FLL_MCLK: + regmap_update_bits(regmap, NAU8540_REG_FLL3, + NAU8540_FLL_CLK_SRC_MASK, NAU8540_FLL_CLK_SRC_MCLK); + break; + + case NAU8540_CLK_FLL_BLK: + regmap_update_bits(regmap, NAU8540_REG_FLL3, + NAU8540_FLL_CLK_SRC_MASK, NAU8540_FLL_CLK_SRC_BLK); + break; + + case NAU8540_CLK_FLL_FS: + regmap_update_bits(regmap, NAU8540_REG_FLL3, + NAU8540_FLL_CLK_SRC_MASK, NAU8540_FLL_CLK_SRC_FS); + break; + + default: + dev_err(nau8540->dev, "Invalid clock id (%d)\n", clk_id); + return -EINVAL; + } + + dev_dbg(nau8540->dev, "Sysclk is %dHz and clock id is %d\n", freq, + clk_id); + + return 0; +} + +static int nau8540_set_sysclk(struct snd_soc_codec *codec, + int clk_id, int source, unsigned int freq, int dir) +{ + struct nau8540 *nau8540 = snd_soc_codec_get_drvdata(codec); + + return nau8540_config_sysclk(nau8540, clk_id, freq); +} + +static void nau8540_reset_chip(struct regmap *regmap) +{ + regmap_write(regmap, NAU8540_REG_SW_RESET, 0x00); + regmap_write(regmap, NAU8540_REG_SW_RESET, 0x00); +} + +static void nau8540_init_regs(struct nau8540 *nau8540) +{ + struct regmap *regmap = nau8540->regmap; + + /* Enable Bias/VMID/VMID Tieoff */ + regmap_update_bits(regmap, NAU8540_REG_VMID_CTRL, + NAU8540_VMID_EN | NAU8540_VMID_SEL_MASK, + NAU8540_VMID_EN | (0x2 << NAU8540_VMID_SEL_SFT)); + regmap_update_bits(regmap, NAU8540_REG_REFERENCE, + NAU8540_PRECHARGE_DIS | NAU8540_GLOBAL_BIAS_EN, + NAU8540_PRECHARGE_DIS | NAU8540_GLOBAL_BIAS_EN); + mdelay(2); + regmap_update_bits(regmap, NAU8540_REG_MIC_BIAS, + NAU8540_PU_PRE, NAU8540_PU_PRE); + regmap_update_bits(regmap, NAU8540_REG_CLOCK_CTRL, + NAU8540_CLK_ADC_EN | NAU8540_CLK_I2S_EN, + NAU8540_CLK_ADC_EN | NAU8540_CLK_I2S_EN); + /* ADC OSR selection, CLK_ADC = Fs * OSR */ + regmap_update_bits(regmap, NAU8540_REG_ADC_SAMPLE_RATE, + NAU8540_ADC_OSR_MASK, NAU8540_ADC_OSR_64); +} + +static struct snd_soc_codec_driver nau8540_codec_driver = { + .set_sysclk = nau8540_set_sysclk, + .set_pll = nau8540_set_pll, + .suspend_bias_off = true, + + .component_driver = { + .controls = nau8540_snd_controls, + .num_controls = ARRAY_SIZE(nau8540_snd_controls), + .dapm_widgets = nau8540_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(nau8540_dapm_widgets), + .dapm_routes = nau8540_dapm_routes, + .num_dapm_routes = ARRAY_SIZE(nau8540_dapm_routes), + }, +}; + +static const struct regmap_config nau8540_regmap_config = { + .val_bits = 16, + .reg_bits = 16, + + .max_register = NAU8540_REG_MAX, + .readable_reg = nau8540_readable_reg, + .writeable_reg = nau8540_writeable_reg, + .volatile_reg = nau8540_volatile_reg, + + .cache_type = REGCACHE_RBTREE, + .reg_defaults = nau8540_reg_defaults, + .num_reg_defaults = ARRAY_SIZE(nau8540_reg_defaults), +}; + +static int nau8540_i2c_probe(struct i2c_client *i2c, + const struct i2c_device_id *id) +{ + struct device *dev = &i2c->dev; + struct nau8540 *nau8540 = dev_get_platdata(dev); + int ret, value; + + if (!nau8540) { + nau8540 = devm_kzalloc(dev, sizeof(*nau8540), GFP_KERNEL); + if (!nau8540) + return -ENOMEM; + } + i2c_set_clientdata(i2c, nau8540); + + nau8540->regmap = devm_regmap_init_i2c(i2c, &nau8540_regmap_config); + if (IS_ERR(nau8540->regmap)) + return PTR_ERR(nau8540->regmap); + nau8540->dev = dev; + + nau8540_reset_chip(nau8540->regmap); + ret = regmap_read(nau8540->regmap, NAU8540_REG_I2C_DEVICE_ID, &value); + if (ret < 0) { + dev_err(dev, "Failed to read device id from the NAU85L40: %d\n", + ret); + return ret; + } + nau8540_init_regs(nau8540); + + return snd_soc_register_codec(dev, + &nau8540_codec_driver, &nau8540_dai, 1); +} + +static int nau8540_i2c_remove(struct i2c_client *client) +{ + snd_soc_unregister_codec(&client->dev); + return 0; +} + + +static const struct i2c_device_id nau8540_i2c_ids[] = { + { "nau8540", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, nau8540_i2c_ids); + +#ifdef CONFIG_OF +static const struct of_device_id nau8540_of_ids[] = { + { .compatible = "nuvoton,nau8540", }, + {} +}; +MODULE_DEVICE_TABLE(of, nau8540_of_ids); +#endif + +static struct i2c_driver nau8540_i2c_driver = { + .driver = { + .name = "nau8540", + .of_match_table = of_match_ptr(nau8540_of_ids), + }, + .probe = nau8540_i2c_probe, + .remove = nau8540_i2c_remove, + .id_table = nau8540_i2c_ids, +}; +module_i2c_driver(nau8540_i2c_driver); + +MODULE_DESCRIPTION("ASoC NAU85L40 driver"); +MODULE_AUTHOR("John Hsu <KCHSU0(a)nuvoton.com>"); +MODULE_LICENSE("GPL v2"); diff --git a/sound/soc/codecs/nau8540.h b/sound/soc/codecs/nau8540.h new file mode 100644 index 0000000..78da362 --- /dev/null +++ b/sound/soc/codecs/nau8540.h @@ -0,0 +1,228 @@ +/* + * NAU85L40 ALSA SoC audio driver + * + * Copyright 2016 Nuvoton Technology Corp. + * Author: John Hsu <KCHSU0(a)nuvoton.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __NAU8540_H__ +#define __NAU8540_H__ + +#define NAU8540_REG_SW_RESET 0x00 +#define NAU8540_REG_POWER_MANAGEMENT 0x01 +#define NAU8540_REG_CLOCK_CTRL 0x02 +#define NAU8540_REG_CLOCK_SRC 0x03 +#define NAU8540_REG_FLL1 0x04 +#define NAU8540_REG_FLL2 0x05 +#define NAU8540_REG_FLL3 0x06 +#define NAU8540_REG_FLL4 0x07 +#define NAU8540_REG_FLL5 0x08 +#define NAU8540_REG_FLL6 0x09 +#define NAU8540_REG_FLL_VCO_RSV 0x0A +#define NAU8540_REG_PCM_CTRL0 0x10 +#define NAU8540_REG_PCM_CTRL1 0x11 +#define NAU8540_REG_PCM_CTRL2 0x12 +#define NAU8540_REG_PCM_CTRL3 0x13 +#define NAU8540_REG_PCM_CTRL4 0x14 +#define NAU8540_REG_ALC_CONTROL_1 0x20 +#define NAU8540_REG_ALC_CONTROL_2 0x21 +#define NAU8540_REG_ALC_CONTROL_3 0x22 +#define NAU8540_REG_ALC_CONTROL_4 0x23 +#define NAU8540_REG_ALC_CONTROL_5 0x24 +#define NAU8540_REG_ALC_GAIN_CH12 0x2D +#define NAU8540_REG_ALC_GAIN_CH34 0x2E +#define NAU8540_REG_ALC_STATUS 0x2F +#define NAU8540_REG_NOTCH_FIL1_CH1 0x30 +#define NAU8540_REG_NOTCH_FIL2_CH1 0x31 +#define NAU8540_REG_NOTCH_FIL1_CH2 0x32 +#define NAU8540_REG_NOTCH_FIL2_CH2 0x33 +#define NAU8540_REG_NOTCH_FIL1_CH3 0x34 +#define NAU8540_REG_NOTCH_FIL2_CH3 0x35 +#define NAU8540_REG_NOTCH_FIL1_CH4 0x36 +#define NAU8540_REG_NOTCH_FIL2_CH4 0x37 +#define NAU8540_REG_HPF_FILTER_CH12 0x38 +#define NAU8540_REG_HPF_FILTER_CH34 0x39 +#define NAU8540_REG_ADC_SAMPLE_RATE 0x3A +#define NAU8540_REG_DIGITAL_GAIN_CH1 0x40 +#define NAU8540_REG_DIGITAL_GAIN_CH2 0x41 +#define NAU8540_REG_DIGITAL_GAIN_CH3 0x42 +#define NAU8540_REG_DIGITAL_GAIN_CH4 0x43 +#define NAU8540_REG_DIGITAL_MUX 0x44 +#define NAU8540_REG_P2P_CH1 0x48 +#define NAU8540_REG_P2P_CH2 0x49 +#define NAU8540_REG_P2P_CH3 0x4A +#define NAU8540_REG_P2P_CH4 0x4B +#define NAU8540_REG_PEAK_CH1 0x4C +#define NAU8540_REG_PEAK_CH2 0x4D +#define NAU8540_REG_PEAK_CH3 0x4E +#define NAU8540_REG_PEAK_CH4 0x4F +#define NAU8540_REG_GPIO_CTRL 0x50 +#define NAU8540_REG_MISC_CTRL 0x51 +#define NAU8540_REG_I2C_CTRL 0x52 +#define NAU8540_REG_I2C_DEVICE_ID 0x58 +#define NAU8540_REG_RST 0x5A +#define NAU8540_REG_VMID_CTRL 0x60 +#define NAU8540_REG_MUTE 0x61 +#define NAU8540_REG_ANALOG_ADC1 0x64 +#define NAU8540_REG_ANALOG_ADC2 0x65 +#define NAU8540_REG_ANALOG_PWR 0x66 +#define NAU8540_REG_MIC_BIAS 0x67 +#define NAU8540_REG_REFERENCE 0x68 +#define NAU8540_REG_FEPGA1 0x69 +#define NAU8540_REG_FEPGA2 0x6A +#define NAU8540_REG_FEPGA3 0x6B +#define NAU8540_REG_FEPGA4 0x6C +#define NAU8540_REG_PWR 0x6D +#define NAU8540_REG_MAX NAU8540_REG_PWR + + +/* POWER_MANAGEMENT (0x01) */ +#define NAU8540_ADC4_EN (0x1 << 3) +#define NAU8540_ADC3_EN (0x1 << 2) +#define NAU8540_ADC2_EN (0x1 << 1) +#define NAU8540_ADC1_EN 0x1 + +/* CLOCK_CTRL (0x02) */ +#define NAU8540_CLK_ADC_EN (0x1 << 15) +#define NAU8540_CLK_I2S_EN (0x1 << 1) + +/* CLOCK_SRC (0x03) */ +#define NAU8540_CLK_SRC_SFT 15 +#define NAU8540_CLK_SRC_MASK (1 << NAU8540_CLK_SRC_SFT) +#define NAU8540_CLK_SRC_VCO (1 << NAU8540_CLK_SRC_SFT) +#define NAU8540_CLK_SRC_MCLK (0 << NAU8540_CLK_SRC_SFT) +#define NAU8540_CLK_ADC_SRC_SFT 6 +#define NAU8540_CLK_ADC_SRC_MASK (0x3 << NAU8540_CLK_ADC_SRC_SFT) +#define NAU8540_CLK_MCLK_SRC_MASK 0xf + +/* FLL1 (0x04) */ +#define NAU8540_FLL_RATIO_MASK 0x7f + +/* FLL3 (0x06) */ +#define NAU8540_FLL_CLK_SRC_SFT 10 +#define NAU8540_FLL_CLK_SRC_MASK (0x3 << NAU8540_FLL_CLK_SRC_SFT) +#define NAU8540_FLL_CLK_SRC_MCLK (0 << NAU8540_FLL_CLK_SRC_SFT) +#define NAU8540_FLL_CLK_SRC_BLK (0x2 << NAU8540_FLL_CLK_SRC_SFT) +#define NAU8540_FLL_CLK_SRC_FS (0x3 << NAU8540_FLL_CLK_SRC_SFT) +#define NAU8540_FLL_INTEGER_MASK 0x3ff + +/* FLL4 (0x07) */ +#define NAU8540_FLL_REF_DIV_SFT 10 +#define NAU8540_FLL_REF_DIV_MASK (0x3 << NAU8540_FLL_REF_DIV_SFT) + +/* FLL5 (0x08) */ +#define NAU8540_FLL_PDB_DAC_EN (0x1 << 15) +#define NAU8540_FLL_LOOP_FTR_EN (0x1 << 14) +#define NAU8540_FLL_CLK_SW_MASK (0x1 << 13) +#define NAU8540_FLL_CLK_SW_N2 (0x1 << 13) +#define NAU8540_FLL_CLK_SW_REF (0x0 << 13) +#define NAU8540_FLL_FTR_SW_MASK (0x1 << 12) +#define NAU8540_FLL_FTR_SW_ACCU (0x1 << 12) +#define NAU8540_FLL_FTR_SW_FILTER (0x0 << 12) + +/* FLL6 (0x9) */ +#define NAU8540_DCO_EN (0x1 << 15) +#define NAU8540_SDM_EN (0x1 << 14) + +/* PCM_CTRL0 (0x10) */ +#define NAU8540_I2S_BP_SFT 7 +#define NAU8540_I2S_BP_INV (0x1 << NAU8540_I2S_BP_SFT) +#define NAU8540_I2S_PCMB_SFT 6 +#define NAU8540_I2S_PCMB_EN (0x1 << NAU8540_I2S_PCMB_SFT) +#define NAU8540_I2S_DL_SFT 2 +#define NAU8540_I2S_DL_MASK (0x3 << NAU8540_I2S_DL_SFT) +#define NAU8540_I2S_DL_16 (0 << NAU8540_I2S_DL_SFT) +#define NAU8540_I2S_DL_20 (0x1 << NAU8540_I2S_DL_SFT) +#define NAU8540_I2S_DL_24 (0x2 << NAU8540_I2S_DL_SFT) +#define NAU8540_I2S_DL_32 (0x3 << NAU8540_I2S_DL_SFT) +#define NAU8540_I2S_DF_MASK 0x3 +#define NAU8540_I2S_DF_RIGTH 0 +#define NAU8540_I2S_DF_LEFT 0x1 +#define NAU8540_I2S_DF_I2S 0x2 +#define NAU8540_I2S_DF_PCM_AB 0x3 + +/* PCM_CTRL1 (0x11) */ +#define NAU8540_I2S_LRC_DIV_SFT 12 +#define NAU8540_I2S_LRC_DIV_MASK (0x3 << NAU8540_I2S_LRC_DIV_SFT) +#define NAU8540_I2S_DO12_OE (0x1 << 4) +#define NAU8540_I2S_MS_SFT 3 +#define NAU8540_I2S_MS_MASK (0x1 << NAU8540_I2S_MS_SFT) +#define NAU8540_I2S_MS_MASTER (0x1 << NAU8540_I2S_MS_SFT) +#define NAU8540_I2S_MS_SLAVE (0x0 << NAU8540_I2S_MS_SFT) +#define NAU8540_I2S_BLK_DIV_MASK 0x7 + +/* PCM_CTRL1 (0x12) */ +#define NAU8540_I2S_DO34_OE (0x1 << 11) +#define NAU8540_I2S_TSLOT_L_MASK 0x3ff + +/* PCM_CTRL4 (0x14) */ +#define NAU8540_TDM_MODE (0x1 << 15) +#define NAU8540_TDM_OFFSET_EN (0x1 << 14) +#define NAU8540_TDM_TX_MASK 0xf + +/* ADC_SAMPLE_RATE (0x3A) */ +#define NAU8540_ADC_OSR_MASK 0x3 +#define NAU8540_ADC_OSR_256 0x3 +#define NAU8540_ADC_OSR_128 0x2 +#define NAU8540_ADC_OSR_64 0x1 +#define NAU8540_ADC_OSR_32 0x0 + +/* VMID_CTRL (0x60) */ +#define NAU8540_VMID_EN (1 << 6) +#define NAU8540_VMID_SEL_SFT 4 +#define NAU8540_VMID_SEL_MASK (0x3 << NAU8540_VMID_SEL_SFT) + +/* MIC_BIAS (0x67) */ +#define NAU8540_PU_PRE (0x1 << 8) + +/* REFERENCE (0x68) */ +#define NAU8540_PRECHARGE_DIS (0x1 << 13) +#define NAU8540_GLOBAL_BIAS_EN (0x1 << 12) + + +/* System Clock Source */ +enum { + NAU8540_CLK_DIS, + NAU8540_CLK_MCLK, + NAU8540_CLK_INTERNAL, + NAU8540_CLK_FLL_MCLK, + NAU8540_CLK_FLL_BLK, + NAU8540_CLK_FLL_FS, +}; + +/* Programmable divider in master mode */ +enum { + NAU8540_BCLKDIV, + NAU8540_FSDIV, +}; + +struct nau8540 { + struct device *dev; + struct regmap *regmap; +}; + +struct nau8540_fll { + int mclk_src; + int ratio; + int fll_frac; + int fll_int; + int clk_ref_div; +}; + +struct nau8540_fll_attr { + unsigned int param; + unsigned int val; +}; + +/* over sampling rate */ +struct nau8540_osr_attr { + unsigned int osr; + unsigned int clk_src; +}; + + +#endif /* __NAU8540_H__ */ -- 2.6.4 =========================================================================================== The privileged confidential information contained in this email is intended for use only by the addressees as indicated by the original sender of this email. If you are not the addressee indicated in this email or are not responsible for delivery of the email to such a person, please kindly reply to the sender indicating this fact and delete all copies of it from your computer and network server immediately. Your cooperation is highly appreciated. It is advised that any unauthorized use of confidential information of Nuvoton is strictly prohibited; and any information in this email irrelevant to the official business of Nuvoton shall be deemed as neither given nor endorsed by Nuvoton.

2 5

[alsa-devel] [PATCH v5 0/5] Add support for Legacy HDMI audio drivers
by Jerome Anand 26 Jan '17

26 Jan '17

Legacy (CherryTrail/ Baytrail) HDMI audio drivers added Legacy hdmi audio-Gfx interaction/ interfacing is updated to use irq chip framework This patch series has only been tested on hardware with a single HDMI connector/pipe and additional work may be needed for newer machines with 2 connectors Jerome Anand (5): drm/i915: setup bridge for HDMI LPE audio driver drm/i915: Add support for audio driver notifications ALSA: add Intel HDMI LPE audio driver for BYT/CHT-T ALSA: x86: hdmi: Add audio support for BYT and CHT ALSA: x86: hdmi: continue playback even when display resolution changes Documentation/gpu/i915.rst | 9 + drivers/gpu/drm/i915/Makefile | 3 + drivers/gpu/drm/i915/i915_drv.c | 4 +- drivers/gpu/drm/i915/i915_drv.h | 13 + drivers/gpu/drm/i915/i915_irq.c | 16 + drivers/gpu/drm/i915/i915_reg.h | 3 + drivers/gpu/drm/i915/intel_audio.c | 31 + drivers/gpu/drm/i915/intel_drv.h | 2 + drivers/gpu/drm/i915/intel_hdmi.c | 1 + drivers/gpu/drm/i915/intel_lpe_audio.c | 370 +++++++ include/drm/intel_lpe_audio.h | 46 + sound/Kconfig | 2 + sound/Makefile | 2 +- sound/x86/Kconfig | 15 + sound/x86/Makefile | 6 + sound/x86/intel_hdmi_audio.c | 1870 ++++++++++++++++++++++++++++++++ sound/x86/intel_hdmi_audio.h | 197 ++++ sound/x86/intel_hdmi_audio_if.c | 551 ++++++++++ sound/x86/intel_hdmi_lpe_audio.c | 617 +++++++++++ sound/x86/intel_hdmi_lpe_audio.h | 683 ++++++++++++ 20 files changed, 4438 insertions(+), 3 deletions(-) create mode 100644 drivers/gpu/drm/i915/intel_lpe_audio.c create mode 100644 include/drm/intel_lpe_audio.h create mode 100644 sound/x86/Kconfig create mode 100644 sound/x86/Makefile create mode 100644 sound/x86/intel_hdmi_audio.c create mode 100644 sound/x86/intel_hdmi_audio.h create mode 100644 sound/x86/intel_hdmi_audio_if.c create mode 100644 sound/x86/intel_hdmi_lpe_audio.c create mode 100644 sound/x86/intel_hdmi_lpe_audio.h -- 2.9.3 base-commit: c34072a82a390d575f7f0394fcf92437898d75d3

6 18

[alsa-devel] Question about OF-graph ports
by Kuninori Morimoto 26 Jan '17

26 Jan '17

Hi Rob, Mark and ALSA SoC ML I'm working for OF-graph base sound card support. Now I want to know 1 things which can't solve by myself. It is OF-graph ports ALSA SoC needs CPU, Codec, and Sound Card. If CPU <-> Card <-> Codec case, OF-graph will be card { ports { port@0 { card_in: endpoint { remote-endpoint = <&cpu_out>; }; }; port@1 { card_out: endpoint { remote-endpoint = <&codec_in>; }; }; }; }; cpu { port { cpu_out: endpoint { remote-endpoint = <&card_in>; }; }; }; codec { port { codec_in: endpoint { remote-endpoint = <&card_out>; }; }; }; This is OK. If CPU has many ports, then ALSA SoC requests 1 Card which has many DAIs (= Digital Audio Interface). This case, cpu will have "ports" and many "port", this is OK. SoC.0 Codec0 SoC.1 <-> Card <-> Codec1 SoC.2 Codec2 In "card", CPU/Codec pair is indicated by "ports" now (= port0 is CPU, port1 is Codec, etc) My question is in this case, how to know CPU/Codec pair on "card" ? Can we have *multi ports*, like this ? card { ports { ports@0 { port@0 { /* SoC.0 */ }; port@1 { /* Codec0*/ }; }; ports@1 { port@0 { /* SoC.1 */ }; port@1 { /* Codec1*/ }; }; ports@2 { port@0 { /* SoC.2 */ }; port@1 { /* Codec2*/ }; }; }; }; Or can I use grouping, like this ? card { group = <port@0 port@1>, <port@2 port@3>, <port@4 port@5>; ports { port@0 { /* SoC.0 */ }; port@1 { /* SoC.1 */ }; port@2 { /* SoC.2 */ }; port@3 { /* Codec0*/ }; port@4 { /* Codec1*/ }; port@5 { /* Codec2*/ }; }; }; Best regards --- Kuninori Morimoto

4 16

[alsa-devel] [PATCH v3] ALSA: ymfpci: Handle return NULL error from ioremap_nocache
by Arvind Yadav 25 Jan '17

25 Jan '17

Here, If ioremap_nocache will fail. It will return NULL. Kernel can run into a NULL-pointer dereference. This error check will avoid NULL pointer dereference. Signed-off-by: Arvind Yadav <arvind.yadav.cs(a)gmail.com> --- sound/pci/ymfpci/ymfpci_main.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/sound/pci/ymfpci/ymfpci_main.c b/sound/pci/ymfpci/ymfpci_main.c index ffee284..8be1f07 100644 --- a/sound/pci/ymfpci/ymfpci_main.c +++ b/sound/pci/ymfpci/ymfpci_main.c @@ -2392,6 +2392,10 @@ int snd_ymfpci_create(struct snd_card *card, chip->rev = pci->revision; chip->reg_area_phys = pci_resource_start(pci, 0); chip->reg_area_virt = ioremap_nocache(chip->reg_area_phys, 0x8000); + if (!chip->reg_area_virt) { + snd_ymfpci_free(chip); + return -ENOMEM; + } pci_set_master(pci); chip->src441_used = -1; -- 1.9.1

2 1

[alsa-devel] [PATCH] ALSA: x86: hdmi: fix returnvar.cocci warnings
by Julia Lawall 25 Jan '17

25 Jan '17

Remove unneeded variable used to store return value. Generated by: scripts/coccinelle/misc/returnvar.cocci CC: Jerome Anand <jerome.anand(a)intel.com> Signed-off-by: Julia Lawall <julia.lawall(a)lip6.fr> Signed-off-by: Fengguang Wu <fengguang.wu(a)intel.com> --- In-Reply-To: <20170124225753.9045-5-jerome.anand(a)intel.com> url: https://github.com/0day-ci/linux/commits/Jerome-Anand/Add-support-for-Legacy -HDMI-audio-drivers/20170124-213547 This is probably not the right patch. It si just what the rule generates. Instead, I guess that retval should be updated in some way? intel_hdmi_audio_if.c | 21 +++++++++------------ 1 file changed, 9 insertions(+), 12 deletions(-) --- a/sound/x86/intel_hdmi_audio_if.c +++ b/sound/x86/intel_hdmi_audio_if.c @@ -239,7 +239,6 @@ static inline int had_chk_intrmiss(struc int had_process_buffer_done(struct snd_intelhad *intelhaddata) { - int retval = 0; u32 len = 1; enum intel_had_aud_buf_type buf_id; enum intel_had_aud_buf_type buff_done; @@ -258,7 +257,7 @@ int had_process_buffer_done(struct snd_i if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) { spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs); pr_err("%s:Device already disconnected\n", __func__); - return retval; + return 0; } buf_id = intelhaddata->curr_buf; intelhaddata->buff_done = buf_id; @@ -280,7 +279,7 @@ int had_process_buffer_done(struct snd_i if (!intr_count || (intr_count > 3)) { pr_err("HAD SW state in non-recoverable!!! mode\n"); pr_err("Already played stale data\n"); - return retval; + return 0; } buf_id += (intr_count - 1); buf_id = buf_id % 4; @@ -298,7 +297,7 @@ int had_process_buffer_done(struct snd_i if (had_get_hwstate(intelhaddata)) { pr_err("HDMI cable plugged-out\n"); - return retval; + return 0; } /*Reprogram the registers with addr and length*/ @@ -322,12 +321,11 @@ int had_process_buffer_done(struct snd_i stream->period_elapsed(stream->had_substream); } - return retval; + return 0; } int had_process_buffer_underrun(struct snd_intelhad *intelhaddata) { - int retval = 0; enum intel_had_aud_buf_type buf_id; struct pcm_stream_info *stream; struct had_pvt_data *had_stream; @@ -355,7 +353,7 @@ int had_process_buffer_underrun(struct s if (drv_status == HAD_DRV_DISCONNECTED) { pr_err("%s:Device already disconnected\n", __func__); - return retval; + return 0; } if (stream_type == HAD_RUNNING_STREAM) { @@ -364,12 +362,11 @@ int had_process_buffer_underrun(struct s stream->period_elapsed(stream->had_substream); } - return retval; + return 0; } int had_process_hot_plug(struct snd_intelhad *intelhaddata) { - int retval = 0; enum intel_had_aud_buf_type buf_id; struct snd_pcm_substream *substream; struct had_pvt_data *had_stream; @@ -384,7 +381,7 @@ int had_process_hot_plug(struct snd_inte if (intelhaddata->drv_status == HAD_DRV_CONNECTED) { pr_debug("Device already connected\n"); spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irqs); - return retval; + return 0; } buf_id = intelhaddata->curr_buf; intelhaddata->buff_done = buf_id; @@ -422,12 +419,12 @@ int had_process_hot_plug(struct snd_inte had_build_channel_allocation_map(intelhaddata); - return retval; + return 0; err: pm_runtime_disable(intelhaddata->dev); intelhaddata->dev = NULL; - return retval; + return 0; } int had_process_hot_unplug(struct snd_intelhad *intelhaddata)

2 1

[alsa-devel] Applied "ASoC: cq93vc: remove MFD_DAVINCI_VOICECODEC dependency from CQ0093VC" to the asoc tree
by Mark Brown 25 Jan '17

25 Jan '17

The patch ASoC: cq93vc: remove MFD_DAVINCI_VOICECODEC dependency from CQ0093VC has been applied to the asoc tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From 31489c0b1d8b33e5b696ba18feb880617e937554 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com> Date: Wed, 25 Jan 2017 00:51:04 +0000 Subject: [PATCH] ASoC: cq93vc: remove MFD_DAVINCI_VOICECODEC dependency from CQ0093VC CQ0093VC is no longer dependent on MFD_DAVINCI_VOICECODEC, let's remove it. Otherwise, we can't compile it by COMPILE_TEST on non-DAVINCE platform Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com> Signed-off-by: Mark Brown <broonie(a)kernel.org> --- sound/soc/codecs/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index 9e1718a8cb1c..928baa69de91 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -45,7 +45,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_ALC5623 if I2C select SND_SOC_ALC5632 if I2C select SND_SOC_BT_SCO - select SND_SOC_CQ0093VC if MFD_DAVINCI_VOICECODEC + select SND_SOC_CQ0093VC select SND_SOC_CS35L32 if I2C select SND_SOC_CS35L33 if I2C select SND_SOC_CS35L34 if I2C -- 2.11.0

1 0

[alsa-devel] [PATCH v4 1/2] ASoC: Add support for CS35L35 CODEC
by Brian Austin 25 Jan '17

25 Jan '17

This patch add support for Cirrus Logic CS35L35 Boosted Amplifier Changes for v4 Add component struct for codec_driver Add bit setting for dt values that are 0 goto err for regmap_patch and reset_gpio style errors Signed-off-by: Brian Austin <brian.austin(a)cirrus.com> --- include/sound/cs35l35.h | 103 ++++ sound/soc/codecs/Kconfig | 4 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/cs35l35.c | 1468 ++++++++++++++++++++++++++++++++++++++++++++ sound/soc/codecs/cs35l35.h | 284 +++++++++ 5 files changed, 1861 insertions(+) create mode 100644 include/sound/cs35l35.h create mode 100644 sound/soc/codecs/cs35l35.c create mode 100644 sound/soc/codecs/cs35l35.h diff --git a/include/sound/cs35l35.h b/include/sound/cs35l35.h new file mode 100644 index 0000000..de92e45 --- /dev/null +++ b/include/sound/cs35l35.h @@ -0,0 +1,103 @@ +/* + * linux/sound/cs35l35.h -- Platform data for CS35l35 + * + * Copyright (c) 2016 Cirrus Logic Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __CS35L35_H +#define __CS35L35_H + +struct classh_cfg { + /* + * Class H Algorithm Control Variables + * You can either have it done + * automatically or you can adjust + * these variables for tuning + * + * if you do not enable the internal algorithm + * you will get a set of mixer controls for + * Class H tuning + * + * Section 4.3 of the datasheet + */ + bool classh_bst_override; + bool classh_algo_enable; + int classh_bst_max_limit; + int classh_mem_depth; + int classh_release_rate; + int classh_headroom; + int classh_wk_fet_disable; + int classh_wk_fet_delay; + int classh_wk_fet_thld; + int classh_vpch_auto; + int classh_vpch_rate; + int classh_vpch_man; +}; + +struct monitor_cfg { + /* + * Signal Monitor Data + * highly configurable signal monitoring + * data positioning and different types of + * monitoring data. + * + * Section 4.8.2 - 4.8.4 of the datasheet + */ + bool is_present; + bool imon_specs; + bool vmon_specs; + bool vpmon_specs; + bool vbstmon_specs; + bool vpbrstat_specs; + bool zerofill_specs; + u8 imon_dpth; + u8 imon_loc; + u8 imon_frm; + u8 vmon_dpth; + u8 vmon_loc; + u8 vmon_frm; + u8 vpmon_dpth; + u8 vpmon_loc; + u8 vpmon_frm; + u8 vbstmon_dpth; + u8 vbstmon_loc; + u8 vbstmon_frm; + u8 vpbrstat_dpth; + u8 vpbrstat_loc; + u8 vpbrstat_frm; + u8 zerofill_dpth; + u8 zerofill_loc; + u8 zerofill_frm; +}; + +struct cs35l35_platform_data { + + /* Stereo (2 Device) */ + bool stereo; + /* serial port drive strength */ + int sp_drv_str; + /* Boost Power Down with FET */ + bool bst_pdn_fet_on; + /* Boost Voltage : used if ClassH Algo Enabled */ + int bst_vctl; + /* Boost Converter Peak Current CTRL */ + int bst_ipk; + /* Amp Gain Zero Cross */ + bool gain_zc; + /* Audio Input Location */ + int aud_channel; + /* Advisory Input Location */ + int adv_channel; + /* Shared Boost for stereo */ + bool shared_bst; + /* ClassH Algorithm */ + struct classh_cfg classh_algo; + /* Monitor Config */ + struct monitor_cfg mon_cfg; +}; + +#endif /* __CS35L35_H */ diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index cfc108e..e07f1f1 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -49,6 +49,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_CS35L32 if I2C select SND_SOC_CS35L33 if I2C select SND_SOC_CS35L34 if I2C + select SND_SOC_CS35L35 if I2C select SND_SOC_CS42L42 if I2C select SND_SOC_CS42L51_I2C if I2C select SND_SOC_CS42L52 if I2C && INPUT @@ -407,6 +408,9 @@ config SND_SOC_CS35L34 tristate "Cirrus Logic CS35L34 CODEC" depends on I2C +config SND_SOC_CS35L35 + tristate "Cirrus Logic CS35L35 CODEC" + config SND_SOC_CS42L42 tristate "Cirrus Logic CS42L42 CODEC" depends on I2C diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index 2624c73..a70189d 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -39,6 +39,7 @@ snd-soc-cq93vc-objs := cq93vc.o snd-soc-cs35l32-objs := cs35l32.o snd-soc-cs35l33-objs := cs35l33.o snd-soc-cs35l34-objs := cs35l34.o +snd-soc-cs35l35-objs := cs35l35.o snd-soc-cs42l42-objs := cs42l42.o snd-soc-cs42l51-objs := cs42l51.o snd-soc-cs42l51-i2c-objs := cs42l51-i2c.o @@ -268,6 +269,7 @@ obj-$(CONFIG_SND_SOC_CQ0093VC) += snd-soc-cq93vc.o obj-$(CONFIG_SND_SOC_CS35L32) += snd-soc-cs35l32.o obj-$(CONFIG_SND_SOC_CS35L33) += snd-soc-cs35l33.o obj-$(CONFIG_SND_SOC_CS35L34) += snd-soc-cs35l34.o +obj-$(CONFIG_SND_SOC_CS35L35) += snd-soc-cs35l35.o obj-$(CONFIG_SND_SOC_CS42L42) += snd-soc-cs42l42.o obj-$(CONFIG_SND_SOC_CS42L51) += snd-soc-cs42l51.o obj-$(CONFIG_SND_SOC_CS42L51_I2C) += snd-soc-cs42l51-i2c.o diff --git a/sound/soc/codecs/cs35l35.c b/sound/soc/codecs/cs35l35.c new file mode 100644 index 0000000..d64b0c2 --- /dev/null +++ b/sound/soc/codecs/cs35l35.c @@ -0,0 +1,1468 @@ +/* + * cs35l35.c -- CS35L35 ALSA SoC audio driver + * + * Copyright 2016 Cirrus Logic, Inc. + * + * Author: Brian Austin <brian.austin(a)cirrus.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include <linux/module.h> +#include <linux/moduleparam.h> +#include <linux/version.h> +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/delay.h> +#include <linux/i2c.h> +#include <linux/slab.h> +#include <linux/platform_device.h> +#include <linux/regulator/consumer.h> +#include <linux/gpio/consumer.h> +#include <linux/of_device.h> +#include <linux/of_gpio.h> +#include <linux/regmap.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/soc.h> +#include <sound/soc-dapm.h> +#include <linux/gpio.h> +#include <sound/initval.h> +#include <sound/tlv.h> +#include <sound/cs35l35.h> +#include <linux/of_irq.h> +#include <linux/completion.h> + +#include "cs35l35.h" + +static const struct reg_default cs35l35_reg[] = { + {CS35L35_PWRCTL1, 0x01}, + {CS35L35_PWRCTL2, 0x11}, + {CS35L35_PWRCTL3, 0x00}, + {CS35L35_CLK_CTL1, 0x04}, + {CS35L35_CLK_CTL2, 0x10}, + {CS35L35_CLK_CTL3, 0xCF}, + {CS35L35_SP_FMT_CTL1, 0x20}, + {CS35L35_SP_FMT_CTL2, 0x00}, + {CS35L35_SP_FMT_CTL3, 0x02}, + {CS35L35_MAG_COMP_CTL, 0x00}, + {CS35L35_AMP_INP_DRV_CTL, 0x01}, + {CS35L35_AMP_DIG_VOL_CTL, 0x12}, + {CS35L35_AMP_DIG_VOL, 0x00}, + {CS35L35_ADV_DIG_VOL, 0x00}, + {CS35L35_PROTECT_CTL, 0x06}, + {CS35L35_AMP_GAIN_AUD_CTL, 0x13}, + {CS35L35_AMP_GAIN_PDM_CTL, 0x00}, + {CS35L35_AMP_GAIN_ADV_CTL, 0x00}, + {CS35L35_GPI_CTL, 0x00}, + {CS35L35_BST_CVTR_V_CTL, 0x00}, + {CS35L35_BST_PEAK_I, 0x07}, + {CS35L35_BST_RAMP_CTL, 0x85}, + {CS35L35_BST_CONV_COEF_1, 0x20}, + {CS35L35_BST_CONV_COEF_2, 0x20}, + {CS35L35_BST_CONV_SLOPE_COMP, 0x47}, + {CS35L35_BST_CONV_SW_FREQ, 0x04}, + {CS35L35_CLASS_H_CTL, 0x0B}, + {CS35L35_CLASS_H_HEADRM_CTL, 0x0B}, + {CS35L35_CLASS_H_RELEASE_RATE, 0x08}, + {CS35L35_CLASS_H_FET_DRIVE_CTL, 0x41}, + {CS35L35_CLASS_H_VP_CTL, 0xC5}, + {CS35L35_VPBR_CTL, 0x0A}, + {CS35L35_VPBR_VOL_CTL, 0x09}, + {CS35L35_VPBR_TIMING_CTL, 0x6A}, + {CS35L35_VPBR_MODE_VOL_CTL, 0x00}, + {CS35L35_SPKR_MON_CTL, 0xC0}, + {CS35L35_IMON_SCALE_CTL, 0x30}, + {CS35L35_AUDIN_RXLOC_CTL, 0x00}, + {CS35L35_ADVIN_RXLOC_CTL, 0x80}, + {CS35L35_VMON_TXLOC_CTL, 0x00}, + {CS35L35_IMON_TXLOC_CTL, 0x80}, + {CS35L35_VPMON_TXLOC_CTL, 0x04}, + {CS35L35_VBSTMON_TXLOC_CTL, 0x84}, + {CS35L35_VPBR_STATUS_TXLOC_CTL, 0x04}, + {CS35L35_ZERO_FILL_LOC_CTL, 0x00}, + {CS35L35_AUDIN_DEPTH_CTL, 0x0F}, + {CS35L35_SPKMON_DEPTH_CTL, 0x0F}, + {CS35L35_SUPMON_DEPTH_CTL, 0x0F}, + {CS35L35_ZEROFILL_DEPTH_CTL, 0x00}, + {CS35L35_MULT_DEV_SYNCH1, 0x02}, + {CS35L35_MULT_DEV_SYNCH2, 0x80}, + {CS35L35_PROT_RELEASE_CTL, 0x00}, + {CS35L35_DIAG_MODE_REG_LOCK, 0x00}, + {CS35L35_DIAG_MODE_CTL_1, 0x40}, + {CS35L35_DIAG_MODE_CTL_2, 0x00}, + {CS35L35_INT_MASK_1, 0xFF}, + {CS35L35_INT_MASK_2, 0xFF}, + {CS35L35_INT_MASK_3, 0xFF}, + {CS35L35_INT_MASK_4, 0xFF}, + +}; + +static bool cs35l35_volatile_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case CS35L35_INT_STATUS_1: + case CS35L35_INT_STATUS_2: + case CS35L35_INT_STATUS_3: + case CS35L35_INT_STATUS_4: + case CS35L35_PLL_STATUS: + case CS35L35_OTP_TRIM_STATUS: + return true; + default: + return false; + } +} + +static bool cs35l35_readable_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case CS35L35_DEVID_AB ... CS35L35_PWRCTL3: + case CS35L35_CLK_CTL1 ... CS35L35_SP_FMT_CTL3: + case CS35L35_MAG_COMP_CTL ... CS35L35_AMP_GAIN_AUD_CTL: + case CS35L35_AMP_GAIN_PDM_CTL ... CS35L35_BST_PEAK_I: + case CS35L35_BST_RAMP_CTL ... CS35L35_BST_CONV_SW_FREQ: + case CS35L35_CLASS_H_CTL ... CS35L35_CLASS_H_VP_CTL: + case CS35L35_CLASS_H_STATUS: + case CS35L35_VPBR_CTL ... CS35L35_VPBR_MODE_VOL_CTL: + case CS35L35_VPBR_ATTEN_STATUS: + case CS35L35_SPKR_MON_CTL: + case CS35L35_IMON_SCALE_CTL ... CS35L35_ZEROFILL_DEPTH_CTL: + case CS35L35_MULT_DEV_SYNCH1 ... CS35L35_PROT_RELEASE_CTL: + case CS35L35_DIAG_MODE_REG_LOCK ... CS35L35_DIAG_MODE_CTL_2: + case CS35L35_INT_MASK_1 ... CS35L35_PLL_STATUS: + case CS35L35_OTP_TRIM_STATUS: + return true; + default: + return false; + } +} + +static bool cs35l35_precious_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case CS35L35_INT_STATUS_1: + case CS35L35_INT_STATUS_2: + case CS35L35_INT_STATUS_3: + case CS35L35_INT_STATUS_4: + case CS35L35_PLL_STATUS: + case CS35L35_OTP_TRIM_STATUS: + return true; + default: + return false; + } +} + +static int cs35l35_sdin_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); + struct cs35l35_private *cs35l35 = snd_soc_codec_get_drvdata(codec); + int ret = 0; + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + regmap_update_bits(cs35l35->regmap, CS35L35_CLK_CTL1, + CS35L35_MCLK_DIS_MASK, + 0 << CS35L35_MCLK_DIS_SHIFT); + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL1, + CS35L35_DISCHG_FILT_MASK, + 0 << CS35L35_DISCHG_FILT_SHIFT); + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL1, + CS35L35_PDN_ALL_MASK, 0); + break; + case SND_SOC_DAPM_POST_PMD: + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL1, + CS35L35_DISCHG_FILT_MASK, + 1 << CS35L35_DISCHG_FILT_SHIFT); + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL1, + CS35L35_PDN_ALL_MASK, 1); + + ret = wait_for_completion_timeout(&cs35l35->pdn_done, + msecs_to_jiffies(100)); + if (ret == 0) { + pr_err("TIMEOUT PDN_DONE did not complete in 100ms\n"); + ret = -ETIMEDOUT; + } + + regmap_update_bits(cs35l35->regmap, CS35L35_CLK_CTL1, + CS35L35_MCLK_DIS_MASK, + 1 << CS35L35_MCLK_DIS_SHIFT); + break; + default: + pr_err("Invalid event = 0x%x\n", event); + ret = -EINVAL; + } + return ret; +} + +static int cs35l35_main_amp_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); + struct cs35l35_private *cs35l35 = snd_soc_codec_get_drvdata(codec); + unsigned int reg[4]; + int i; + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + if (cs35l35->pdata.bst_pdn_fet_on) + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL2, + CS35L35_PDN_BST_MASK, + 0 << CS35L35_PDN_BST_FETON_SHIFT); + else + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL2, + CS35L35_PDN_BST_MASK, + 0 << CS35L35_PDN_BST_FETOFF_SHIFT); + regmap_update_bits(cs35l35->regmap, CS35L35_PROTECT_CTL, + CS35L35_AMP_MUTE_MASK, + 0 << CS35L35_AMP_MUTE_SHIFT); + break; + case SND_SOC_DAPM_POST_PMU: + usleep_range(5000, 5100); + /* If PDM mode we must use VP for Voltage control */ + if (cs35l35->pdm_mode) + regmap_update_bits(cs35l35->regmap, + CS35L35_BST_CVTR_V_CTL, + CS35L35_BST_CTL_MASK, + 0 << CS35L35_BST_CTL_SHIFT); + for (i = 0; i < 2; i++) + regmap_bulk_read(cs35l35->regmap, CS35L35_INT_STATUS_1, + &reg, ARRAY_SIZE(reg)); + break; + case SND_SOC_DAPM_PRE_PMD: + regmap_update_bits(cs35l35->regmap, CS35L35_PROTECT_CTL, + CS35L35_AMP_MUTE_MASK, + 1 << CS35L35_AMP_MUTE_SHIFT); + if (cs35l35->pdata.bst_pdn_fet_on) + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL2, + CS35L35_PDN_BST_MASK, + 1 << CS35L35_PDN_BST_FETON_SHIFT); + else + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL2, + CS35L35_PDN_BST_MASK, + 1 << CS35L35_PDN_BST_FETOFF_SHIFT); + break; + case SND_SOC_DAPM_POST_PMD: + usleep_range(5000, 5100); + /* If PDM mode we should switch back to pdata value + * for Voltage control when we go down + */ + if (cs35l35->pdm_mode) + regmap_update_bits(cs35l35->regmap, + CS35L35_BST_CVTR_V_CTL, + CS35L35_BST_CTL_MASK, + cs35l35->pdata.bst_vctl + << CS35L35_BST_CTL_SHIFT); + + break; + default: + pr_err("Invalid event = 0x%x\n", event); + } + return 0; +} + +static DECLARE_TLV_DB_SCALE(amp_gain_tlv, 0, 1, 1); +static DECLARE_TLV_DB_SCALE(dig_vol_tlv, -10200, 50, 0); + +static const struct snd_kcontrol_new cs35l35_aud_controls[] = { + SOC_SINGLE_SX_TLV("Digital Audio Volume", CS35L35_AMP_DIG_VOL, + 0, 0x34, 0xE4, dig_vol_tlv), + SOC_SINGLE_TLV("AMP Audio Gain", CS35L35_AMP_GAIN_AUD_CTL, 0, 19, 0, + amp_gain_tlv), + SOC_SINGLE_TLV("AMP PDM Gain", CS35L35_AMP_GAIN_PDM_CTL, 0, 19, 0, + amp_gain_tlv), +}; + +static const struct snd_kcontrol_new cs35l35_adv_controls[] = { + SOC_SINGLE_SX_TLV("Digital Advisory Volume", CS35L35_ADV_DIG_VOL, + 0, 0x34, 0xE4, dig_vol_tlv), + SOC_SINGLE_TLV("AMP Advisory Gain", CS35L35_AMP_GAIN_ADV_CTL, 0, 19, 0, + amp_gain_tlv), +}; + +static const struct snd_soc_dapm_widget cs35l35_dapm_widgets[] = { + SND_SOC_DAPM_AIF_IN_E("SDIN", NULL, 0, CS35L35_PWRCTL3, 1, 1, + cs35l35_sdin_event, SND_SOC_DAPM_PRE_PMU | + SND_SOC_DAPM_POST_PMD), + SND_SOC_DAPM_AIF_OUT("SDOUT", NULL, 0, CS35L35_PWRCTL3, 2, 1), + + SND_SOC_DAPM_OUTPUT("SPK"), + + SND_SOC_DAPM_INPUT("VP"), + SND_SOC_DAPM_INPUT("VBST"), + SND_SOC_DAPM_INPUT("ISENSE"), + SND_SOC_DAPM_INPUT("VSENSE"), + + SND_SOC_DAPM_ADC("VMON ADC", NULL, CS35L35_PWRCTL2, 7, 1), + SND_SOC_DAPM_ADC("IMON ADC", NULL, CS35L35_PWRCTL2, 6, 1), + SND_SOC_DAPM_ADC("VPMON ADC", NULL, CS35L35_PWRCTL3, 3, 1), + SND_SOC_DAPM_ADC("VBSTMON ADC", NULL, CS35L35_PWRCTL3, 4, 1), + SND_SOC_DAPM_ADC("CLASS H", NULL, CS35L35_PWRCTL2, 5, 1), + + SND_SOC_DAPM_OUT_DRV_E("Main AMP", CS35L35_PWRCTL2, 0, 1, NULL, 0, + cs35l35_main_amp_event, SND_SOC_DAPM_PRE_PMU | + SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU | + SND_SOC_DAPM_PRE_PMD), +}; + +static const struct snd_soc_dapm_route cs35l35_audio_map[] = { + {"VPMON ADC", NULL, "VP"}, + {"VBSTMON ADC", NULL, "VBST"}, + {"IMON ADC", NULL, "ISENSE"}, + {"VMON ADC", NULL, "VSENSE"}, + {"SDOUT", NULL, "IMON ADC"}, + {"SDOUT", NULL, "VMON ADC"}, + {"SDOUT", NULL, "VBSTMON ADC"}, + {"SDOUT", NULL, "VPMON ADC"}, + {"AMP Capture", NULL, "SDOUT"}, + + {"SDIN", NULL, "AMP Playback"}, + {"CLASS H", NULL, "SDIN"}, + {"Main AMP", NULL, "CLASS H"}, + {"SPK", NULL, "Main AMP"}, +}; + +static int cs35l35_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) +{ + struct snd_soc_codec *codec = codec_dai->codec; + struct cs35l35_private *cs35l35 = snd_soc_codec_get_drvdata(codec); + + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBM_CFM: + regmap_update_bits(cs35l35->regmap, CS35L35_CLK_CTL1, + CS35L35_MS_MASK, 1 << CS35L35_MS_SHIFT); + cs35l35->slave_mode = false; + break; + case SND_SOC_DAIFMT_CBS_CFS: + regmap_update_bits(cs35l35->regmap, CS35L35_CLK_CTL1, + CS35L35_MS_MASK, 0 << CS35L35_MS_SHIFT); + cs35l35->slave_mode = true; + break; + default: + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + cs35l35->i2s_mode = true; + cs35l35->pdm_mode = false; + break; + case SND_SOC_DAIFMT_PDM: + cs35l35->pdm_mode = true; + cs35l35->i2s_mode = false; + break; + default: + return -EINVAL; + } + + return 0; +} + +struct cs35l35_sysclk_config { + int sysclk; + int srate; + u8 clk_cfg; +}; + +static struct cs35l35_sysclk_config cs35l35_clk_ctl[] = { + + /* SYSCLK, Sample Rate, Serial Port Cfg */ + {5644800, 44100, 0x00}, + {5644800, 88200, 0x40}, + {6144000, 48000, 0x10}, + {6144000, 96000, 0x50}, + {11289600, 44100, 0x01}, + {11289600, 88200, 0x41}, + {11289600, 176400, 0x81}, + {12000000, 44100, 0x03}, + {12000000, 48000, 0x13}, + {12000000, 88200, 0x43}, + {12000000, 96000, 0x53}, + {12000000, 176400, 0x83}, + {12000000, 192000, 0x93}, + {12288000, 48000, 0x11}, + {12288000, 96000, 0x51}, + {12288000, 192000, 0x91}, + {13000000, 44100, 0x07}, + {13000000, 48000, 0x17}, + {13000000, 88200, 0x47}, + {13000000, 96000, 0x57}, + {13000000, 176400, 0x87}, + {13000000, 192000, 0x97}, + {22579200, 44100, 0x02}, + {22579200, 88200, 0x42}, + {22579200, 176400, 0x82}, + {24000000, 44100, 0x0B}, + {24000000, 48000, 0x1B}, + {24000000, 88200, 0x4B}, + {24000000, 96000, 0x5B}, + {24000000, 176400, 0x8B}, + {24000000, 192000, 0x9B}, + {24576000, 48000, 0x12}, + {24576000, 96000, 0x52}, + {24576000, 192000, 0x92}, + {26000000, 44100, 0x0F}, + {26000000, 48000, 0x1F}, + {26000000, 88200, 0x4F}, + {26000000, 96000, 0x5F}, + {26000000, 176400, 0x8F}, + {26000000, 192000, 0x9F}, +}; + +static int cs35l35_get_clk_config(int sysclk, int srate) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(cs35l35_clk_ctl); i++) { + if (cs35l35_clk_ctl[i].sysclk == sysclk && + cs35l35_clk_ctl[i].srate == srate) + return cs35l35_clk_ctl[i].clk_cfg; + } + return -EINVAL; +} + +static int cs35l35_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct snd_soc_codec *codec = dai->codec; + struct cs35l35_private *cs35l35 = snd_soc_codec_get_drvdata(codec); + struct classh_cfg *classh = &cs35l35->pdata.classh_algo; + int srate = params_rate(params); + int ret = 0; + u8 sp_sclks; + int audin_format = 0; + int errata_chk; + + int clk_ctl = cs35l35_get_clk_config(cs35l35->sysclk, srate); + + if (clk_ctl < 0) { + dev_err(codec->dev, "Invalid CLK:Rate %d:%d\n", + cs35l35->sysclk, srate); + return -EINVAL; + } + + ret = regmap_update_bits(cs35l35->regmap, CS35L35_CLK_CTL2, + CS35L35_CLK_CTL2_MASK, clk_ctl); + if (ret != 0) { + dev_err(codec->dev, "Failed to set port config %d\n", ret); + return ret; + } + + /* Rev A0 Errata + * + * When configured for the weak-drive detection path (CH_WKFET_DIS = 0) + * the Class H algorithm does not enable weak-drive operation for + * nonzero values of CH_WKFET_DELAY if SP_RATE = 01 or 10 + * + */ + errata_chk = clk_ctl & CS35L35_SP_RATE_MASK; + + if (classh->classh_wk_fet_disable == 0x00 && + (errata_chk == 0x01 || errata_chk == 0x03)) { + ret = regmap_update_bits(cs35l35->regmap, + CS35L35_CLASS_H_FET_DRIVE_CTL, + CS35L35_CH_WKFET_DEL_MASK, + 0 << CS35L35_CH_WKFET_DEL_SHIFT); + if (ret != 0) { + dev_err(codec->dev, "Failed to set fet config %d\n", + ret); + return ret; + } + } + + /* + * You can pull more Monitor data from the SDOUT pin than going to SDIN + * Just make sure your SCLK is fast enough to fill the frame + */ + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + switch (params_width(params)) { + case 8: + audin_format = CS35L35_SDIN_DEPTH_8; + break; + case 16: + audin_format = CS35L35_SDIN_DEPTH_16; + break; + case 24: + audin_format = CS35L35_SDIN_DEPTH_24; + break; + default: + dev_err(codec->dev, "Unsupported Width %d\n", + params_width(params)); + } + regmap_update_bits(cs35l35->regmap, + CS35L35_AUDIN_DEPTH_CTL, + CS35L35_AUDIN_DEPTH_MASK, + audin_format << + CS35L35_AUDIN_DEPTH_SHIFT); + if (cs35l35->pdata.stereo) { + regmap_update_bits(cs35l35->regmap, + CS35L35_AUDIN_DEPTH_CTL, + CS35L35_ADVIN_DEPTH_MASK, + audin_format << + CS35L35_ADVIN_DEPTH_SHIFT); + } + } + + if (cs35l35->i2s_mode) { + /* + * We have to take the SCLK to derive num sclks + * to configure the CLOCK_CTL3 register correctly + */ + if ((cs35l35->sclk / srate) % 4) { + dev_err(codec->dev, "Unsupported sclk/fs ratio %d:%d\n", + cs35l35->sclk, srate); + return -EINVAL; + } + + sp_sclks = ((cs35l35->sclk / srate) / 4) - 1; + + /* Only certain ratios are supported in I2S Slave Mode */ + if (cs35l35->slave_mode) { + switch (sp_sclks) { + case CS35L35_SP_SCLKS_32FS: + case CS35L35_SP_SCLKS_48FS: + case CS35L35_SP_SCLKS_64FS: + break; + default: + dev_err(codec->dev, "ratio not supported\n"); + return -EINVAL; + }; + } else { + /* Only certain ratios supported in I2S MASTER Mode */ + switch (sp_sclks) { + case CS35L35_SP_SCLKS_32FS: + case CS35L35_SP_SCLKS_64FS: + break; + default: + dev_err(codec->dev, "ratio not supported\n"); + return -EINVAL; + }; + } + ret = regmap_update_bits(cs35l35->regmap, + CS35L35_CLK_CTL3, + CS35L35_SP_SCLKS_MASK, sp_sclks << + CS35L35_SP_SCLKS_SHIFT); + if (ret != 0) { + dev_err(codec->dev, "Failed to set fsclk %d\n", ret); + return ret; + } + } + + return ret; +} + +static const unsigned int cs35l35_src_rates[] = { + 44100, 48000, 88200, 96000, 176400, 192000 +}; + +static const struct snd_pcm_hw_constraint_list cs35l35_constraints = { + .count = ARRAY_SIZE(cs35l35_src_rates), + .list = cs35l35_src_rates, +}; + +static int cs35l35_pcm_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct snd_soc_codec *codec = dai->codec; + struct cs35l35_private *cs35l35 = snd_soc_codec_get_drvdata(codec); + + regmap_update_bits(cs35l35->regmap, CS35L35_AMP_INP_DRV_CTL, + CS35L35_PDM_MODE_MASK, + 0 << CS35L35_PDM_MODE_SHIFT); + + snd_pcm_hw_constraint_list(substream->runtime, 0, + SNDRV_PCM_HW_PARAM_RATE, &cs35l35_constraints); + return 0; +} + +static const unsigned int cs35l35_pdm_rates[] = { + 44100, 48000, 88200, 96000 +}; + +static const struct snd_pcm_hw_constraint_list cs35l35_pdm_constraints = { + .count = ARRAY_SIZE(cs35l35_pdm_rates), + .list = cs35l35_pdm_rates, +}; + +static int cs35l35_pdm_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct snd_soc_codec *codec = dai->codec; + struct cs35l35_private *cs35l35 = snd_soc_codec_get_drvdata(codec); + + regmap_update_bits(cs35l35->regmap, CS35L35_AMP_INP_DRV_CTL, + CS35L35_PDM_MODE_MASK, + 1 << CS35L35_PDM_MODE_SHIFT); + + snd_pcm_hw_constraint_list(substream->runtime, 0, + SNDRV_PCM_HW_PARAM_RATE, + &cs35l35_pdm_constraints); + return 0; +} + +static int cs35l35_dai_set_sysclk(struct snd_soc_dai *dai, + int clk_id, unsigned int freq, int dir) +{ + struct snd_soc_codec *codec = dai->codec; + struct cs35l35_private *cs35l35 = snd_soc_codec_get_drvdata(codec); + + /* Need the SCLK Frequency regardless of sysclk source */ + cs35l35->sclk = freq; + + return 0; +} + +static const struct snd_soc_dai_ops cs35l35_ops = { + .startup = cs35l35_pcm_startup, + .set_fmt = cs35l35_set_dai_fmt, + .set_sysclk = cs35l35_dai_set_sysclk, + .hw_params = cs35l35_hw_params, +}; + +static const struct snd_soc_dai_ops cs35l35_pdm_ops = { + .startup = cs35l35_pdm_startup, + .set_fmt = cs35l35_set_dai_fmt, + .hw_params = cs35l35_hw_params, +}; + +static struct snd_soc_dai_driver cs35l35_dai[] = { + { + .name = "cs35l35-pcm", + .id = 0, + .playback = { + .stream_name = "AMP Playback", + .channels_min = 1, + .channels_max = 8, + .rates = SNDRV_PCM_RATE_KNOT, + .formats = CS35L35_FORMATS, + }, + .capture = { + .stream_name = "AMP Capture", + .channels_min = 1, + .channels_max = 8, + .rates = SNDRV_PCM_RATE_KNOT, + .formats = CS35L35_FORMATS, + }, + .ops = &cs35l35_ops, + .symmetric_rates = 1, + }, + { + .name = "cs35l35-pdm", + .id = 1, + .playback = { + .stream_name = "PDM Playback", + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_KNOT, + .formats = CS35L35_FORMATS, + }, + .ops = &cs35l35_pdm_ops, + }, +}; + +static int cs35l35_codec_set_sysclk(struct snd_soc_codec *codec, + int clk_id, int source, unsigned int freq, + int dir) +{ + struct cs35l35_private *cs35l35 = snd_soc_codec_get_drvdata(codec); + int clksrc; + int ret = 0; + + switch (clk_id) { + case 0: + clksrc = CS35L35_CLK_SOURCE_MCLK; + break; + case 1: + clksrc = CS35L35_CLK_SOURCE_SCLK; + break; + case 2: + clksrc = CS35L35_CLK_SOURCE_PDM; + break; + default: + dev_err(codec->dev, "Invalid CLK Source\n"); + return -EINVAL; + }; + + switch (freq) { + case 5644800: + case 6144000: + case 11289600: + case 12000000: + case 12288000: + case 13000000: + case 22579200: + case 24000000: + case 24576000: + case 26000000: + cs35l35->sysclk = freq; + break; + default: + dev_err(codec->dev, "Invalid CLK Frequency %d\n", freq); + return -EINVAL; + } + + ret = regmap_update_bits(cs35l35->regmap, CS35L35_CLK_CTL1, + CS35L35_CLK_SOURCE_MASK, + clksrc << CS35L35_CLK_SOURCE_SHIFT); + if (ret != 0) { + dev_err(codec->dev, "Failed to set sysclk %d\n", ret); + return ret; + } + + return ret; +} + +static int cs35l35_codec_probe(struct snd_soc_codec *codec) +{ + struct cs35l35_private *cs35l35 = snd_soc_codec_get_drvdata(codec); + struct classh_cfg *classh = &cs35l35->pdata.classh_algo; + struct monitor_cfg *monitor_config = &cs35l35->pdata.mon_cfg; + int ret; + + cs35l35->codec = codec; + + /* Set Platform Data */ + if (cs35l35->pdata.bst_vctl) + regmap_update_bits(cs35l35->regmap, CS35L35_BST_CVTR_V_CTL, + CS35L35_BST_CTL_MASK, + cs35l35->pdata.bst_vctl); + + if (cs35l35->pdata.bst_ipk) + regmap_update_bits(cs35l35->regmap, CS35L35_BST_PEAK_I, + CS35L35_BST_IPK_MASK, + cs35l35->pdata.bst_ipk << + CS35L35_BST_IPK_SHIFT); + + if (cs35l35->pdata.gain_zc) + regmap_update_bits(cs35l35->regmap, CS35L35_PROTECT_CTL, + CS35L35_AMP_GAIN_ZC_MASK, + cs35l35->pdata.gain_zc << + CS35L35_AMP_GAIN_ZC_SHIFT); + + if (cs35l35->pdata.aud_channel) + regmap_update_bits(cs35l35->regmap, + CS35L35_AUDIN_RXLOC_CTL, + CS35L35_AUD_IN_LR_MASK, + cs35l35->pdata.aud_channel << + CS35L35_AUD_IN_LR_SHIFT); + + if (cs35l35->pdata.stereo) { + regmap_update_bits(cs35l35->regmap, + CS35L35_ADVIN_RXLOC_CTL, + CS35L35_ADV_IN_LR_MASK, + cs35l35->pdata.adv_channel << + CS35L35_ADV_IN_LR_SHIFT); + if (cs35l35->pdata.shared_bst) + regmap_update_bits(cs35l35->regmap, CS35L35_CLASS_H_CTL, + CS35L35_CH_STEREO_MASK, + 1 << CS35L35_CH_STEREO_SHIFT); + ret = snd_soc_add_codec_controls(codec, cs35l35_adv_controls, + ARRAY_SIZE(cs35l35_adv_controls)); + if (ret) + return ret; + } + + if (cs35l35->pdata.sp_drv_str) + regmap_update_bits(cs35l35->regmap, CS35L35_CLK_CTL1, + CS35L35_SP_DRV_MASK, + cs35l35->pdata.sp_drv_str << + CS35L35_SP_DRV_SHIFT); + + if (classh->classh_algo_enable) { + if (classh->classh_bst_override) + regmap_update_bits(cs35l35->regmap, + CS35L35_CLASS_H_CTL, + CS35L35_CH_BST_OVR_MASK, + classh->classh_bst_override << + CS35L35_CH_BST_OVR_SHIFT); + if (classh->classh_bst_max_limit) + regmap_update_bits(cs35l35->regmap, + CS35L35_CLASS_H_CTL, + CS35L35_CH_BST_LIM_MASK, + classh->classh_bst_max_limit << + CS35L35_CH_BST_LIM_SHIFT); + if (classh->classh_mem_depth) + regmap_update_bits(cs35l35->regmap, + CS35L35_CLASS_H_CTL, + CS35L35_CH_MEM_DEPTH_MASK, + classh->classh_mem_depth << + CS35L35_CH_MEM_DEPTH_SHIFT); + if (classh->classh_headroom) + regmap_update_bits(cs35l35->regmap, + CS35L35_CLASS_H_HEADRM_CTL, + CS35L35_CH_HDRM_CTL_MASK, + classh->classh_headroom << + CS35L35_CH_HDRM_CTL_SHIFT); + if (classh->classh_release_rate) + regmap_update_bits(cs35l35->regmap, + CS35L35_CLASS_H_RELEASE_RATE, + CS35L35_CH_REL_RATE_MASK, + classh->classh_release_rate << + CS35L35_CH_REL_RATE_SHIFT); + if (classh->classh_wk_fet_disable) + regmap_update_bits(cs35l35->regmap, + CS35L35_CLASS_H_FET_DRIVE_CTL, + CS35L35_CH_WKFET_DIS_MASK, + classh->classh_wk_fet_disable << + CS35L35_CH_WKFET_DIS_SHIFT); + if (classh->classh_wk_fet_delay) + regmap_update_bits(cs35l35->regmap, + CS35L35_CLASS_H_FET_DRIVE_CTL, + CS35L35_CH_WKFET_DEL_MASK, + classh->classh_wk_fet_delay << + CS35L35_CH_WKFET_DEL_SHIFT); + if (classh->classh_wk_fet_thld) + regmap_update_bits(cs35l35->regmap, + CS35L35_CLASS_H_FET_DRIVE_CTL, + CS35L35_CH_WKFET_THLD_MASK, + classh->classh_wk_fet_thld << + CS35L35_CH_WKFET_THLD_SHIFT); + if (classh->classh_vpch_auto) + regmap_update_bits(cs35l35->regmap, + CS35L35_CLASS_H_VP_CTL, + CS35L35_CH_VP_AUTO_MASK, + classh->classh_vpch_auto << + CS35L35_CH_VP_AUTO_SHIFT); + if (classh->classh_vpch_rate) + regmap_update_bits(cs35l35->regmap, + CS35L35_CLASS_H_VP_CTL, + CS35L35_CH_VP_RATE_MASK, + classh->classh_vpch_rate << + CS35L35_CH_VP_RATE_SHIFT); + if (classh->classh_vpch_man) + regmap_update_bits(cs35l35->regmap, + CS35L35_CLASS_H_VP_CTL, + CS35L35_CH_VP_MAN_MASK, + classh->classh_vpch_man << + CS35L35_CH_VP_MAN_SHIFT); + } + + if (monitor_config->is_present) { + if (monitor_config->vmon_specs) { + regmap_update_bits(cs35l35->regmap, + CS35L35_SPKMON_DEPTH_CTL, + CS35L35_VMON_DEPTH_MASK, + monitor_config->vmon_dpth << + CS35L35_VMON_DEPTH_SHIFT); + regmap_update_bits(cs35l35->regmap, + CS35L35_VMON_TXLOC_CTL, + CS35L35_MON_TXLOC_MASK, + monitor_config->vmon_loc << + CS35L35_MON_TXLOC_SHIFT); + regmap_update_bits(cs35l35->regmap, + CS35L35_VMON_TXLOC_CTL, + CS35L35_MON_FRM_MASK, + monitor_config->vmon_frm << + CS35L35_MON_FRM_SHIFT); + } + if (monitor_config->imon_specs) { + regmap_update_bits(cs35l35->regmap, + CS35L35_SPKMON_DEPTH_CTL, + CS35L35_IMON_DEPTH_MASK, + monitor_config->imon_dpth << + CS35L35_IMON_DEPTH_SHIFT); + regmap_update_bits(cs35l35->regmap, + CS35L35_IMON_TXLOC_CTL, + CS35L35_MON_TXLOC_MASK, + monitor_config->imon_loc << + CS35L35_MON_TXLOC_SHIFT); + regmap_update_bits(cs35l35->regmap, + CS35L35_IMON_TXLOC_CTL, + CS35L35_MON_FRM_MASK, + monitor_config->imon_frm << + CS35L35_MON_FRM_SHIFT); + } + if (monitor_config->vpmon_specs) { + regmap_update_bits(cs35l35->regmap, + CS35L35_SUPMON_DEPTH_CTL, + CS35L35_VPMON_DEPTH_MASK, + monitor_config->vpmon_dpth << + CS35L35_VPMON_DEPTH_SHIFT); + regmap_update_bits(cs35l35->regmap, + CS35L35_VPMON_TXLOC_CTL, + CS35L35_MON_TXLOC_MASK, + monitor_config->vpmon_loc << + CS35L35_MON_TXLOC_SHIFT); + regmap_update_bits(cs35l35->regmap, + CS35L35_VPMON_TXLOC_CTL, + CS35L35_MON_FRM_MASK, + monitor_config->vpmon_frm << + CS35L35_MON_FRM_SHIFT); + } + if (monitor_config->vbstmon_specs) { + regmap_update_bits(cs35l35->regmap, + CS35L35_SUPMON_DEPTH_CTL, + CS35L35_VBSTMON_DEPTH_MASK, + monitor_config->vpmon_dpth << + CS35L35_VBSTMON_DEPTH_SHIFT); + regmap_update_bits(cs35l35->regmap, + CS35L35_VBSTMON_TXLOC_CTL, + CS35L35_MON_TXLOC_MASK, + monitor_config->vbstmon_loc << + CS35L35_MON_TXLOC_SHIFT); + regmap_update_bits(cs35l35->regmap, + CS35L35_VBSTMON_TXLOC_CTL, + CS35L35_MON_FRM_MASK, + monitor_config->vbstmon_frm << + CS35L35_MON_FRM_SHIFT); + } + if (monitor_config->vpbrstat_specs) { + regmap_update_bits(cs35l35->regmap, + CS35L35_SUPMON_DEPTH_CTL, + CS35L35_VPBRSTAT_DEPTH_MASK, + monitor_config->vpbrstat_dpth << + CS35L35_VPBRSTAT_DEPTH_SHIFT); + regmap_update_bits(cs35l35->regmap, + CS35L35_VPBR_STATUS_TXLOC_CTL, + CS35L35_MON_TXLOC_MASK, + monitor_config->vpbrstat_loc << + CS35L35_MON_TXLOC_SHIFT); + regmap_update_bits(cs35l35->regmap, + CS35L35_VPBR_STATUS_TXLOC_CTL, + CS35L35_MON_FRM_MASK, + monitor_config->vpbrstat_frm << + CS35L35_MON_FRM_SHIFT); + } + if (monitor_config->zerofill_specs) { + regmap_update_bits(cs35l35->regmap, + CS35L35_SUPMON_DEPTH_CTL, + CS35L35_ZEROFILL_DEPTH_MASK, + monitor_config->zerofill_dpth << + CS35L35_ZEROFILL_DEPTH_SHIFT); + regmap_update_bits(cs35l35->regmap, + CS35L35_ZERO_FILL_LOC_CTL, + CS35L35_MON_TXLOC_MASK, + monitor_config->zerofill_loc << + CS35L35_MON_TXLOC_SHIFT); + regmap_update_bits(cs35l35->regmap, + CS35L35_ZERO_FILL_LOC_CTL, + CS35L35_MON_FRM_MASK, + monitor_config->zerofill_frm << + CS35L35_MON_FRM_SHIFT); + } + } + + return ret; +} + +static struct snd_soc_codec_driver soc_codec_dev_cs35l35 = { + .probe = cs35l35_codec_probe, + .set_sysclk = cs35l35_codec_set_sysclk, + .component_driver = { + .dapm_widgets = cs35l35_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(cs35l35_dapm_widgets), + .dapm_routes = cs35l35_audio_map, + .num_dapm_routes = ARRAY_SIZE(cs35l35_audio_map), + .controls = cs35l35_aud_controls, + .num_controls = ARRAY_SIZE(cs35l35_aud_controls), + }, +}; + +static struct regmap_config cs35l35_regmap = { + .reg_bits = 8, + .val_bits = 8, + + .max_register = CS35L35_MAX_REGISTER, + .reg_defaults = cs35l35_reg, + .num_reg_defaults = ARRAY_SIZE(cs35l35_reg), + .volatile_reg = cs35l35_volatile_register, + .readable_reg = cs35l35_readable_register, + .precious_reg = cs35l35_precious_register, + .cache_type = REGCACHE_RBTREE, +}; + +static irqreturn_t cs35l35_irq(int irq, void *data) +{ + struct cs35l35_private *cs35l35 = data; + struct snd_soc_codec *codec = cs35l35->codec; + unsigned int sticky1, sticky2, sticky3, sticky4; + unsigned int mask1, mask2, mask3, mask4, current1; + + /* ack the irq by reading all status registers */ + regmap_read(cs35l35->regmap, CS35L35_INT_STATUS_4, &sticky4); + regmap_read(cs35l35->regmap, CS35L35_INT_STATUS_3, &sticky3); + regmap_read(cs35l35->regmap, CS35L35_INT_STATUS_2, &sticky2); + regmap_read(cs35l35->regmap, CS35L35_INT_STATUS_1, &sticky1); + + regmap_read(cs35l35->regmap, CS35L35_INT_MASK_4, &mask4); + regmap_read(cs35l35->regmap, CS35L35_INT_MASK_3, &mask3); + regmap_read(cs35l35->regmap, CS35L35_INT_MASK_2, &mask2); + regmap_read(cs35l35->regmap, CS35L35_INT_MASK_1, &mask1); + + /* Check to see if unmasked bits are active */ + if (!(sticky1 & ~mask1) && !(sticky2 & ~mask2) && !(sticky3 & ~mask3) + && !(sticky4 & ~mask4)) + return IRQ_NONE; + + if (sticky2 & CS35L35_PDN_DONE) + complete(&cs35l35->pdn_done); + + /* read the current values */ + regmap_read(cs35l35->regmap, CS35L35_INT_STATUS_1, &current1); + + /* handle the interrupts */ + if (sticky1 & CS35L35_CAL_ERR) { + dev_crit(codec->dev, "Calibration Error\n"); + + /* error is no longer asserted; safe to reset */ + if (!(current1 & CS35L35_CAL_ERR)) { + dev_dbg(codec->dev, "Cal error release\n"); + regmap_update_bits(cs35l35->regmap, + CS35L35_PROT_RELEASE_CTL, + CS35L35_CAL_ERR_RLS, 0); + regmap_update_bits(cs35l35->regmap, + CS35L35_PROT_RELEASE_CTL, + CS35L35_CAL_ERR_RLS, + CS35L35_CAL_ERR_RLS); + regmap_update_bits(cs35l35->regmap, + CS35L35_PROT_RELEASE_CTL, + CS35L35_CAL_ERR_RLS, 0); + } + } + + if (sticky1 & CS35L35_AMP_SHORT) { + dev_crit(codec->dev, "AMP Short Error\n"); + + /* error is no longer asserted; safe to reset */ + if (!(current1 & CS35L35_AMP_SHORT)) { + dev_dbg(codec->dev, "Amp short error release\n"); + regmap_update_bits(cs35l35->regmap, + CS35L35_PROT_RELEASE_CTL, + CS35L35_SHORT_RLS, 0); + regmap_update_bits(cs35l35->regmap, + CS35L35_PROT_RELEASE_CTL, + CS35L35_SHORT_RLS, + CS35L35_SHORT_RLS); + regmap_update_bits(cs35l35->regmap, + CS35L35_PROT_RELEASE_CTL, + CS35L35_SHORT_RLS, 0); + } + } + + if (sticky1 & CS35L35_OTW) { + dev_warn(codec->dev, "Over temperature warning\n"); + + /* error is no longer asserted; safe to reset */ + if (!(current1 & CS35L35_OTW)) { + dev_dbg(codec->dev, "Over temperature warn release\n"); + regmap_update_bits(cs35l35->regmap, + CS35L35_PROT_RELEASE_CTL, + CS35L35_OTW_RLS, 0); + regmap_update_bits(cs35l35->regmap, + CS35L35_PROT_RELEASE_CTL, + CS35L35_OTW_RLS, + CS35L35_OTW_RLS); + regmap_update_bits(cs35l35->regmap, + CS35L35_PROT_RELEASE_CTL, + CS35L35_OTW_RLS, 0); + } + } + + if (sticky1 & CS35L35_OTE) { + dev_crit(codec->dev, "Over temperature error\n"); + + /* error is no longer asserted; safe to reset */ + if (!(current1 & CS35L35_OTE)) { + dev_dbg(codec->dev, "Over temperature error release\n"); + regmap_update_bits(cs35l35->regmap, + CS35L35_PROT_RELEASE_CTL, + CS35L35_OTE_RLS, 0); + regmap_update_bits(cs35l35->regmap, + CS35L35_PROT_RELEASE_CTL, + CS35L35_OTE_RLS, + CS35L35_OTE_RLS); + regmap_update_bits(cs35l35->regmap, + CS35L35_PROT_RELEASE_CTL, + CS35L35_OTE_RLS, 0); + } + } + + if (sticky3 & CS35L35_BST_HIGH) { + dev_crit(codec->dev, "VBST error: powering off!\n"); + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL2, + CS35L35_PDN_AMP, CS35L35_PDN_AMP); + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL1, + CS35L35_PDN_ALL, CS35L35_PDN_ALL); + } + + if (sticky3 & CS35L35_LBST_SHORT) { + dev_crit(codec->dev, "LBST error: powering off!\n"); + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL2, + CS35L35_PDN_AMP, CS35L35_PDN_AMP); + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL1, + CS35L35_PDN_ALL, CS35L35_PDN_ALL); + } + + if (sticky2 & CS35L35_VPBR_ERR) + dev_dbg(codec->dev, "Error: Reactive Brownout\n"); + + if (sticky4 & CS35L35_VMON_OVFL) + dev_dbg(codec->dev, "Error: VMON overflow\n"); + + if (sticky4 & CS35L35_IMON_OVFL) + dev_dbg(codec->dev, "Error: IMON overflow\n"); + + return IRQ_HANDLED; +} + + +static int cs35l35_handle_of_data(struct i2c_client *i2c_client, + struct cs35l35_platform_data *pdata) +{ + struct device_node *np = i2c_client->dev.of_node; + struct device_node *classh, *signal_format; + struct classh_cfg *classh_config = &pdata->classh_algo; + struct monitor_cfg *monitor_config = &pdata->mon_cfg; + unsigned int val32 = 0; + u8 monitor_array[3]; + int ret = 0; + + if (!np) + return 0; + + pdata->bst_pdn_fet_on = of_property_read_bool(np, + "cirrus,boost-pdn-fet-on"); + + if (of_property_read_u32(np, "cirrus,boost-ctl", &val32) >= 0) + pdata->bst_vctl = val32; + + if (of_property_read_u32(np, "cirrus,boost-ipk", &val32) >= 0) + /* 0 is not default but valid */ + pdata->bst_ipk = val32 | 0x80000000; + + if (of_property_read_u32(np, "cirrus,sp-drv-strength", &val32) >= 0) + pdata->sp_drv_str = val32; + + pdata->stereo = of_property_read_bool(np, "cirrus,stereo-config"); + + if (pdata->stereo) { + if (of_property_read_u32(np, "cirrus,audio-channel", &val32) >= 0) + pdata->aud_channel = val32; + if (of_property_read_u32(np, "cirrus,advisory-channel", + &val32) >= 0) + pdata->adv_channel = val32; + pdata->shared_bst = of_property_read_bool(np, + "cirrus,shared-boost"); + } + + pdata->gain_zc = of_property_read_bool(np, "cirrus,amp-gain-zc"); + + classh = of_get_child_by_name(np, "cirrus,classh-internal-algo"); + classh_config->classh_algo_enable = classh ? true : false; + + if (classh_config->classh_algo_enable) { + classh_config->classh_bst_override = + of_property_read_bool(np, "cirrus,classh-bst-overide"); + + if (of_property_read_u32(classh, "cirrus,classh-bst-max-limit", + &val32) >= 0) + classh_config->classh_bst_max_limit = val32 | 0x80000000; + if (of_property_read_u32(classh, "cirrus,classh-mem-depth", + &val32) >= 0) + classh_config->classh_mem_depth = val32 | 0x80000000; + if (of_property_read_u32(classh, "cirrus,classh-release-rate", + &val32) >= 0) + classh_config->classh_release_rate = val32; + if (of_property_read_u32(classh, "cirrus,classh-headroom", + &val32) >= 0) + classh_config->classh_headroom = val32 | 0x80000000; + if (of_property_read_u32(classh, "cirrus,classh-wk-fet-disable", + &val32) >= 0) + classh_config->classh_wk_fet_disable = val32; + if (of_property_read_u32(classh, "cirrus,classh-wk-fet-delay", + &val32) >= 0) + classh_config->classh_wk_fet_delay = val32 | 0x80000000; + if (of_property_read_u32(classh, "cirrus,classh-wk-fet-thld", + &val32) >= 0) + classh_config->classh_wk_fet_thld = val32; + if (of_property_read_u32(classh, "cirrus,classh-vpch-auto", + &val32) >= 0) + classh_config->classh_vpch_auto = val32 | 0x80000000; + if (of_property_read_u32(classh, "cirrus,classh-vpch-rate", + &val32) >= 0) + classh_config->classh_vpch_rate = val32 | 0x80000000; + if (of_property_read_u32(classh, "cirrus,classh-vpch-man", + &val32) >= 0) + classh_config->classh_vpch_man = val32; + } + of_node_put(classh); + + /* frame depth location */ + signal_format = of_get_child_by_name(np, "cirrus,monitor-signal-format"); + monitor_config->is_present = signal_format ? true : false; + if (monitor_config->is_present) { + ret = of_property_read_u8_array(signal_format, "cirrus,imon", + monitor_array, ARRAY_SIZE(monitor_array)); + if (!ret) { + monitor_config->imon_specs = true; + monitor_config->imon_dpth = monitor_array[0]; + monitor_config->imon_loc = monitor_array[1]; + monitor_config->imon_frm = monitor_array[2]; + } + ret = of_property_read_u8_array(signal_format, "cirrus,vmon", + monitor_array, ARRAY_SIZE(monitor_array)); + if (!ret) { + monitor_config->vmon_specs = true; + monitor_config->vmon_dpth = monitor_array[0]; + monitor_config->vmon_loc = monitor_array[1]; + monitor_config->vmon_frm = monitor_array[2]; + } + ret = of_property_read_u8_array(signal_format, "cirrus,vpmon", + monitor_array, ARRAY_SIZE(monitor_array)); + if (!ret) { + monitor_config->vpmon_specs = true; + monitor_config->vpmon_dpth = monitor_array[0]; + monitor_config->vpmon_loc = monitor_array[1]; + monitor_config->vpmon_frm = monitor_array[2]; + } + ret = of_property_read_u8_array(signal_format, "cirrus,vbstmon", + monitor_array, ARRAY_SIZE(monitor_array)); + if (!ret) { + monitor_config->vbstmon_specs = true; + monitor_config->vbstmon_dpth = monitor_array[0]; + monitor_config->vbstmon_loc = monitor_array[1]; + monitor_config->vbstmon_frm = monitor_array[2]; + } + ret = of_property_read_u8_array(signal_format, "cirrus,vpbrstat", + monitor_array, ARRAY_SIZE(monitor_array)); + if (!ret) { + monitor_config->vpbrstat_specs = true; + monitor_config->vpbrstat_dpth = monitor_array[0]; + monitor_config->vpbrstat_loc = monitor_array[1]; + monitor_config->vpbrstat_frm = monitor_array[2]; + } + ret = of_property_read_u8_array(signal_format, "cirrus,zerofill", + monitor_array, ARRAY_SIZE(monitor_array)); + if (!ret) { + monitor_config->zerofill_specs = true; + monitor_config->zerofill_dpth = monitor_array[0]; + monitor_config->zerofill_loc = monitor_array[1]; + monitor_config->zerofill_frm = monitor_array[2]; + } + } + of_node_put(signal_format); + + return 0; +} + +/* Errata Rev A0 */ +static const struct reg_sequence cs35l35_errata_patch[] = { + + { 0x7F, 0x99 }, + { 0x00, 0x99 }, + { 0x52, 0x22 }, + { 0x04, 0x14 }, + { 0x6D, 0x44 }, + { 0x24, 0x10 }, + { 0x58, 0xC4 }, + { 0x00, 0x98 }, + { 0x18, 0x08 }, + { 0x00, 0x00 }, + { 0x7F, 0x00 }, +}; + +static int cs35l35_i2c_probe(struct i2c_client *i2c_client, + const struct i2c_device_id *id) +{ + struct cs35l35_private *cs35l35; + struct cs35l35_platform_data *pdata = + dev_get_platdata(&i2c_client->dev); + int i; + int ret; + unsigned int devid = 0; + unsigned int reg; + + cs35l35 = devm_kzalloc(&i2c_client->dev, + sizeof(struct cs35l35_private), + GFP_KERNEL); + if (!cs35l35) { + dev_err(&i2c_client->dev, "could not allocate codec\n"); + return -ENOMEM; + } + + i2c_set_clientdata(i2c_client, cs35l35); + cs35l35->regmap = devm_regmap_init_i2c(i2c_client, &cs35l35_regmap); + if (IS_ERR(cs35l35->regmap)) { + ret = PTR_ERR(cs35l35->regmap); + dev_err(&i2c_client->dev, "regmap_init() failed: %d\n", ret); + goto err; + } + + for (i = 0; i < ARRAY_SIZE(cs35l35_supplies); i++) + cs35l35->supplies[i].supply = cs35l35_supplies[i]; + cs35l35->num_supplies = ARRAY_SIZE(cs35l35_supplies); + + ret = devm_regulator_bulk_get(&i2c_client->dev, + cs35l35->num_supplies, + cs35l35->supplies); + if (ret != 0) { + dev_err(&i2c_client->dev, + "Failed to request core supplies: %d\n", + ret); + return ret; + } + + if (pdata) { + cs35l35->pdata = *pdata; + } else { + pdata = devm_kzalloc(&i2c_client->dev, + sizeof(struct cs35l35_platform_data), + GFP_KERNEL); + if (!pdata) { + dev_err(&i2c_client->dev, + "could not allocate pdata\n"); + return -ENOMEM; + } + if (i2c_client->dev.of_node) { + ret = cs35l35_handle_of_data(i2c_client, pdata); + if (ret != 0) + return ret; + + } + cs35l35->pdata = *pdata; + } + + ret = regulator_bulk_enable(cs35l35->num_supplies, + cs35l35->supplies); + if (ret != 0) { + dev_err(&i2c_client->dev, + "Failed to enable core supplies: %d\n", + ret); + return ret; + } + + /* returning NULL can be an option if in stereo mode */ + cs35l35->reset_gpio = devm_gpiod_get_optional(&i2c_client->dev, + "reset", GPIOD_OUT_LOW); + if (IS_ERR(cs35l35->reset_gpio)) + goto err; + + gpiod_set_value_cansleep(cs35l35->reset_gpio, 1); + + init_completion(&cs35l35->pdn_done); + + ret = regmap_register_patch(cs35l35->regmap, cs35l35_errata_patch, + ARRAY_SIZE(cs35l35_errata_patch)); + if (ret < 0) { + dev_err(&i2c_client->dev, "Failed to apply errata patch\n"); + goto err; + } + + ret = devm_request_threaded_irq(&i2c_client->dev, i2c_client->irq, NULL, + cs35l35_irq, IRQF_ONESHOT | IRQF_TRIGGER_LOW, + "cs35l35", cs35l35); + if (ret != 0) { + dev_err(&i2c_client->dev, "Failed to request IRQ: %d\n", ret); + goto err; + } + /* initialize codec */ + ret = regmap_read(cs35l35->regmap, CS35L35_DEVID_AB, &reg); + + devid = (reg & 0xFF) << 12; + ret = regmap_read(cs35l35->regmap, CS35L35_DEVID_CD, &reg); + devid |= (reg & 0xFF) << 4; + ret = regmap_read(cs35l35->regmap, CS35L35_DEVID_E, &reg); + devid |= (reg & 0xF0) >> 4; + + if (devid != CS35L35_CHIP_ID) { + dev_err(&i2c_client->dev, + "CS35L35 Device ID (%X). Expected ID %X\n", + devid, CS35L35_CHIP_ID); + ret = -ENODEV; + goto err; + } + + ret = regmap_read(cs35l35->regmap, CS35L35_REV_ID, &reg); + if (ret < 0) { + dev_err(&i2c_client->dev, "Get Revision ID failed\n"); + goto err; + } + + dev_info(&i2c_client->dev, + "Cirrus Logic CS35L35 (%x), Revision: %02X\n", devid, + ret & 0xFF); + + /* Set the INT Masks for critical errors */ + regmap_write(cs35l35->regmap, CS35L35_INT_MASK_1, + CS35L35_INT1_CRIT_MASK); + regmap_write(cs35l35->regmap, CS35L35_INT_MASK_2, + CS35L35_INT2_CRIT_MASK); + regmap_write(cs35l35->regmap, CS35L35_INT_MASK_3, + CS35L35_INT3_CRIT_MASK); + regmap_write(cs35l35->regmap, CS35L35_INT_MASK_4, + CS35L35_INT4_CRIT_MASK); + + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL2, + CS35L35_PWR2_PDN_MASK, + CS35L35_PWR2_PDN_MASK); + + if (cs35l35->pdata.bst_pdn_fet_on) + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL2, + CS35L35_PDN_BST_MASK, + 1 << CS35L35_PDN_BST_FETON_SHIFT); + else + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL2, + CS35L35_PDN_BST_MASK, + 1 << CS35L35_PDN_BST_FETOFF_SHIFT); + + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL3, + CS35L35_PWR3_PDN_MASK, + CS35L35_PWR3_PDN_MASK); + + regmap_update_bits(cs35l35->regmap, CS35L35_PROTECT_CTL, + CS35L35_AMP_MUTE_MASK, 1 << CS35L35_AMP_MUTE_SHIFT); + + ret = snd_soc_register_codec(&i2c_client->dev, + &soc_codec_dev_cs35l35, cs35l35_dai, + ARRAY_SIZE(cs35l35_dai)); + if (ret < 0) { + dev_err(&i2c_client->dev, + "%s: Register codec failed\n", __func__); + goto err; + } + +err: + regulator_bulk_disable(cs35l35->num_supplies, + cs35l35->supplies); + return ret; +} + +static int cs35l35_i2c_remove(struct i2c_client *client) +{ + snd_soc_unregister_codec(&client->dev); + return 0; +} + +static const struct of_device_id cs35l35_of_match[] = { + {.compatible = "cirrus,cs35l35"}, + {}, +}; +MODULE_DEVICE_TABLE(of, cs35l35_of_match); + +static const struct i2c_device_id cs35l35_id[] = { + {"cs35l35", 0}, + {} +}; + +MODULE_DEVICE_TABLE(i2c, cs35l35_id); + +static struct i2c_driver cs35l35_i2c_driver = { + .driver = { + .name = "cs35l35", + .of_match_table = cs35l35_of_match, + }, + .id_table = cs35l35_id, + .probe = cs35l35_i2c_probe, + .remove = cs35l35_i2c_remove, +}; + +module_i2c_driver(cs35l35_i2c_driver); + +MODULE_DESCRIPTION("ASoC CS35L35 driver"); +MODULE_AUTHOR("Brian Austin, Cirrus Logic Inc, <brian.austin(a)cirrus.com>"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/codecs/cs35l35.h b/sound/soc/codecs/cs35l35.h new file mode 100644 index 0000000..15638ef --- /dev/null +++ b/sound/soc/codecs/cs35l35.h @@ -0,0 +1,284 @@ +/* + * cs35l35.h -- CS35L35 ALSA SoC audio driver + * + * Copyright 2016 Cirrus Logic, Inc. + * + * Author: Brian Austin <brian.austin(a)cirrus.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#ifndef __CS35L35_H__ +#define __CS35L35_H__ + +#define CS35L35_FIRSTREG 0x01 +#define CS35L35_LASTREG 0x7E +#define CS35L35_CHIP_ID 0x00035A35 +#define CS35L35_DEVID_AB 0x01 /* Device ID A & B [RO] */ +#define CS35L35_DEVID_CD 0x02 /* Device ID C & D [RO] */ +#define CS35L35_DEVID_E 0x03 /* Device ID E [RO] */ +#define CS35L35_FAB_ID 0x04 /* Fab ID [RO] */ +#define CS35L35_REV_ID 0x05 /* Revision ID [RO] */ +#define CS35L35_PWRCTL1 0x06 /* Power Ctl 1 */ +#define CS35L35_PWRCTL2 0x07 /* Power Ctl 2 */ +#define CS35L35_PWRCTL3 0x08 /* Power Ctl 3 */ +#define CS35L35_CLK_CTL1 0x0A /* Clocking Ctl 1 */ +#define CS35L35_CLK_CTL2 0x0B /* Clocking Ctl 2 */ +#define CS35L35_CLK_CTL3 0x0C /* Clocking Ctl 3 */ +#define CS35L35_SP_FMT_CTL1 0x0D /* Serial Port Format CTL1 */ +#define CS35L35_SP_FMT_CTL2 0x0E /* Serial Port Format CTL2 */ +#define CS35L35_SP_FMT_CTL3 0x0F /* Serial Port Format CTL3 */ +#define CS35L35_MAG_COMP_CTL 0x13 /* Magnitude Comp CTL */ +#define CS35L35_AMP_INP_DRV_CTL 0x14 /* Amp Input Drive Ctl */ +#define CS35L35_AMP_DIG_VOL_CTL 0x15 /* Amplifier Dig Volume Ctl */ +#define CS35L35_AMP_DIG_VOL 0x16 /* Amplifier Dig Volume */ +#define CS35L35_ADV_DIG_VOL 0x17 /* Advisory Digital Volume */ +#define CS35L35_PROTECT_CTL 0x18 /* Amp Gain - Prot Ctl Param */ +#define CS35L35_AMP_GAIN_AUD_CTL 0x19 /* Amp Serial Port Gain Ctl */ +#define CS35L35_AMP_GAIN_PDM_CTL 0x1A /* Amplifier Gain PDM Ctl */ +#define CS35L35_AMP_GAIN_ADV_CTL 0x1B /* Amplifier Gain Ctl */ +#define CS35L35_GPI_CTL 0x1C /* GPI Ctl */ +#define CS35L35_BST_CVTR_V_CTL 0x1D /* Boost Conv Voltage Ctl */ +#define CS35L35_BST_PEAK_I 0x1E /* Boost Conv Peak Current */ +#define CS35L35_BST_RAMP_CTL 0x20 /* Boost Conv Soft Ramp Ctl */ +#define CS35L35_BST_CONV_COEF_1 0x21 /* Boost Conv Coefficients 1 */ +#define CS35L35_BST_CONV_COEF_2 0x22 /* Boost Conv Coefficients 2 */ +#define CS35L35_BST_CONV_SLOPE_COMP 0x23 /* Boost Conv Slope Comp */ +#define CS35L35_BST_CONV_SW_FREQ 0x24 /* Boost Conv L BST SW Freq */ +#define CS35L35_CLASS_H_CTL 0x30 /* CLS H Control */ +#define CS35L35_CLASS_H_HEADRM_CTL 0x31 /* CLS H Headroom Ctl */ +#define CS35L35_CLASS_H_RELEASE_RATE 0x32 /* CLS H Release Rate */ +#define CS35L35_CLASS_H_FET_DRIVE_CTL 0x33 /* CLS H Weak FET Drive Ctl */ +#define CS35L35_CLASS_H_VP_CTL 0x34 /* CLS H VP Ctl */ +#define CS35L35_CLASS_H_STATUS 0x38 /* CLS H Status */ +#define CS35L35_VPBR_CTL 0x3A /* VPBR Ctl */ +#define CS35L35_VPBR_VOL_CTL 0x3B /* VPBR Volume Ctl */ +#define CS35L35_VPBR_TIMING_CTL 0x3C /* VPBR Timing Ctl */ +#define CS35L35_VPBR_MODE_VOL_CTL 0x3D /* VPBR Mode/Attack Vol Ctl */ +#define CS35L35_VPBR_ATTEN_STATUS 0x4B /* VPBR Attenuation Status */ +#define CS35L35_SPKR_MON_CTL 0x4E /* Speaker Monitoring Ctl */ +#define CS35L35_IMON_SCALE_CTL 0x51 /* IMON Scale Ctl */ +#define CS35L35_AUDIN_RXLOC_CTL 0x52 /* Audio Input RX Loc Ctl */ +#define CS35L35_ADVIN_RXLOC_CTL 0x53 /* Advisory Input RX Loc Ctl */ +#define CS35L35_VMON_TXLOC_CTL 0x54 /* VMON TX Loc Ctl */ +#define CS35L35_IMON_TXLOC_CTL 0x55 /* IMON TX Loc Ctl */ +#define CS35L35_VPMON_TXLOC_CTL 0x56 /* VPMON TX Loc Ctl */ +#define CS35L35_VBSTMON_TXLOC_CTL 0x57 /* VBSTMON TX Loc Ctl */ +#define CS35L35_VPBR_STATUS_TXLOC_CTL 0x58 /* VPBR Status TX Loc Ctl */ +#define CS35L35_ZERO_FILL_LOC_CTL 0x59 /* Zero Fill Loc Ctl */ +#define CS35L35_AUDIN_DEPTH_CTL 0x5A /* Audio Input Depth Ctl */ +#define CS35L35_SPKMON_DEPTH_CTL 0x5B /* SPK Mon Output Depth Ctl */ +#define CS35L35_SUPMON_DEPTH_CTL 0x5C /* Supply Mon Out Depth Ctl */ +#define CS35L35_ZEROFILL_DEPTH_CTL 0x5D /* Zero Fill Mon Output Ctl */ +#define CS35L35_MULT_DEV_SYNCH1 0x62 /* Multidevice Synch */ +#define CS35L35_MULT_DEV_SYNCH2 0x63 /* Multidevice Synch 2 */ +#define CS35L35_PROT_RELEASE_CTL 0x64 /* Protection Release Ctl */ +#define CS35L35_DIAG_MODE_REG_LOCK 0x68 /* Diagnostic Mode Reg Lock */ +#define CS35L35_DIAG_MODE_CTL_1 0x69 /* Diagnostic Mode Ctl 1 */ +#define CS35L35_DIAG_MODE_CTL_2 0x6A /* Diagnostic Mode Ctl 2 */ +#define CS35L35_INT_MASK_1 0x70 /* Interrupt Mask 1 */ +#define CS35L35_INT_MASK_2 0x71 /* Interrupt Mask 2 */ +#define CS35L35_INT_MASK_3 0x72 /* Interrupt Mask 3 */ +#define CS35L35_INT_MASK_4 0x73 /* Interrupt Mask 4 */ +#define CS35L35_INT_STATUS_1 0x74 /* Interrupt Status 1 */ +#define CS35L35_INT_STATUS_2 0x75 /* Interrupt Status 2 */ +#define CS35L35_INT_STATUS_3 0x76 /* Interrupt Status 3 */ +#define CS35L35_INT_STATUS_4 0x77 /* Interrupt Status 4 */ +#define CS35L35_PLL_STATUS 0x78 /* PLL Status */ +#define CS35L35_OTP_TRIM_STATUS 0x7E /* OTP Trim Status */ + +#define CS35L35_MAX_REGISTER 0x7F + +/* CS35L35_PWRCTL1 */ +#define CS35L35_SFT_RST 0x80 +#define CS35L35_DISCHG_FLT 0x02 +#define CS35L35_PDN_ALL 0x01 + +/* CS35L35_PWRCTL2 */ +#define CS35L35_PDN_VMON 0x80 +#define CS35L35_PDN_IMON 0x40 +#define CS35L35_PDN_CLASSH 0x20 +#define CS35L35_PDN_VPBR 0x10 +#define CS35L35_PDN_BST 0x04 +#define CS35L35_PDN_AMP 0x01 + +/* CS35L35_PWRCTL3 */ +#define CS35L35_PDN_VBSTMON_OUT 0x10 +#define CS35L35_PDN_VMON_OUT 0x08 + +#define CS35L35_AUDIN_DEPTH_MASK 0x03 +#define CS35L35_AUDIN_DEPTH_SHIFT 0 +#define CS35L35_ADVIN_DEPTH_MASK 0x12 +#define CS35L35_ADVIN_DEPTH_SHIFT 2 +#define CS35L35_SDIN_DEPTH_8 0x01 +#define CS35L35_SDIN_DEPTH_16 0x02 +#define CS35L35_SDIN_DEPTH_24 0x03 + +#define CS35L35_SDOUT_DEPTH_8 0x01 +#define CS35L35_SDOUT_DEPTH_12 0x02 +#define CS35L35_SDOUT_DEPTH_16 0x03 + +#define CS35L35_AUD_IN_LR_MASK 0x80 +#define CS35L35_AUD_IN_LR_SHIFT 7 +#define CS35L35_ADV_IN_LR_MASK 0x80 +#define CS35L35_ADV_IN_LR_SHIFT 7 +#define CS35L35_AUD_IN_LOC_MASK 0x0F +#define CS35L35_AUD_IN_LOC_SHIFT 0 +#define CS35L35_ADV_IN_LOC_MASK 0x0F +#define CS35L35_ADV_IN_LOC_SHIFT 0 + +#define CS35L35_IMON_DEPTH_MASK 0x03 +#define CS35L35_IMON_DEPTH_SHIFT 0 +#define CS35L35_VMON_DEPTH_MASK 0x0C +#define CS35L35_VMON_DEPTH_SHIFT 2 +#define CS35L35_VBSTMON_DEPTH_MASK 0x03 +#define CS35L35_VBSTMON_DEPTH_SHIFT 0 +#define CS35L35_VPMON_DEPTH_MASK 0x0C +#define CS35L35_VPMON_DEPTH_SHIFT 2 +#define CS35L35_VPBRSTAT_DEPTH_MASK 0x18 +#define CS35L35_VPBRSTAT_DEPTH_SHIFT 4 +#define CS35L35_ZEROFILL_DEPTH_MASK 0x03 +#define CS35L35_ZEROFILL_DEPTH_SHIFT 0x00 + +#define CS35L35_MON_TXLOC_MASK 0x3F +#define CS35L35_MON_TXLOC_SHIFT 0 +#define CS35L35_MON_FRM_MASK 0x80 +#define CS35L35_MON_FRM_SHIFT 7 + +#define CS35L35_MS_MASK 0x80 +#define CS35L35_MS_SHIFT 7 +#define CS35L35_SPMODE_MASK 0x40 +#define CS35L35_SP_DRV_MASK 0x10 +#define CS35L35_SP_DRV_SHIFT 4 +#define CS35L35_CLK_CTL2_MASK 0xFF +#define CS35L35_PDM_MODE_MASK 0x40 +#define CS35L35_PDM_MODE_SHIFT 6 +#define CS35L35_CLK_SOURCE_MASK 0x03 +#define CS35L35_CLK_SOURCE_SHIFT 0 +#define CS35L35_CLK_SOURCE_MCLK 0 +#define CS35L35_CLK_SOURCE_SCLK 1 +#define CS35L35_CLK_SOURCE_PDM 2 + +#define CS35L35_SP_SCLKS_MASK 0x0F +#define CS35L35_SP_SCLKS_SHIFT 0x00 +#define CS35L35_SP_SCLKS_16FS 0x03 +#define CS35L35_SP_SCLKS_32FS 0x07 +#define CS35L35_SP_SCLKS_48FS 0x0B +#define CS35L35_SP_SCLKS_64FS 0x0F +#define CS35L35_SP_RATE_MASK 0xC0 + +#define CS35L35_PDN_BST_MASK 0x06 +#define CS35L35_PDN_BST_FETON_SHIFT 1 +#define CS35L35_PDN_BST_FETOFF_SHIFT 2 +#define CS35L35_PWR2_PDN_MASK 0xE0 +#define CS35L35_PWR3_PDN_MASK 0x1E +#define CS35L35_PDN_ALL_MASK 0x01 +#define CS35L35_DISCHG_FILT_MASK 0x02 +#define CS35L35_DISCHG_FILT_SHIFT 1 +#define CS35L35_MCLK_DIS_MASK 0x04 +#define CS35L35_MCLK_DIS_SHIFT 2 + +#define CS35L35_BST_CTL_MASK 0x7F +#define CS35L35_BST_CTL_SHIFT 0 +#define CS35L35_BST_IPK_MASK 0x1F +#define CS35L35_BST_IPK_SHIFT 0 +#define CS35L35_AMP_MUTE_MASK 0x20 +#define CS35L35_AMP_MUTE_SHIFT 5 +#define CS35L35_AMP_GAIN_ZC_MASK 0x10 +#define CS35L35_AMP_GAIN_ZC_SHIFT 4 + +/* Class H Algorithm Control */ +#define CS35L35_CH_STEREO_MASK 0x40 +#define CS35L35_CH_STEREO_SHIFT 6 +#define CS35L35_CH_BST_OVR_MASK 0x04 +#define CS35L35_CH_BST_OVR_SHIFT 2 +#define CS35L35_CH_BST_LIM_MASK 0x08 +#define CS35L35_CH_BST_LIM_SHIFT 3 +#define CS35L35_CH_MEM_DEPTH_MASK 0x01 +#define CS35L35_CH_MEM_DEPTH_SHIFT 0 +#define CS35L35_CH_HDRM_CTL_MASK 0x3F +#define CS35L35_CH_HDRM_CTL_SHIFT 0 +#define CS35L35_CH_REL_RATE_MASK 0xFF +#define CS35L35_CH_REL_RATE_SHIFT 0 +#define CS35L35_CH_WKFET_DIS_MASK 0x80 +#define CS35L35_CH_WKFET_DIS_SHIFT 7 +#define CS35L35_CH_WKFET_DEL_MASK 0x70 +#define CS35L35_CH_WKFET_DEL_SHIFT 4 +#define CS35L35_CH_WKFET_THLD_MASK 0x0F +#define CS35L35_CH_WKFET_THLD_SHIFT 0 +#define CS35L35_CH_VP_AUTO_MASK 0x80 +#define CS35L35_CH_VP_AUTO_SHIFT 7 +#define CS35L35_CH_VP_RATE_MASK 0x60 +#define CS35L35_CH_VP_RATE_SHIFT 5 +#define CS35L35_CH_VP_MAN_MASK 0x1F +#define CS35L35_CH_VP_MAN_SHIFT 0 + +/* CS35L35_PROT_RELEASE_CTL */ +#define CS35L35_CAL_ERR_RLS 0x80 +#define CS35L35_SHORT_RLS 0x04 +#define CS35L35_OTW_RLS 0x02 +#define CS35L35_OTE_RLS 0x01 + +/* INT Mask Registers */ +#define CS35L35_INT1_CRIT_MASK 0x38 +#define CS35L35_INT2_CRIT_MASK 0xEF +#define CS35L35_INT3_CRIT_MASK 0xEE +#define CS35L35_INT4_CRIT_MASK 0xFF + +/* PDN DONE Masks */ +#define CS35L35_M_PDN_DONE_SHIFT 4 +#define CS35L35_M_PDN_DONE_MASK 0x10 + +/* CS35L35_INT_1 */ +#define CS35L35_CAL_ERR 0x80 +#define CS35L35_OTP_ERR 0x40 +#define CS35L35_LRCLK_ERR 0x20 +#define CS35L35_SPCLK_ERR 0x10 +#define CS35L35_MCLK_ERR 0x08 +#define CS35L35_AMP_SHORT 0x04 +#define CS35L35_OTW 0x02 +#define CS35L35_OTE 0x01 + +/* CS35L35_INT_2 */ +#define CS35L35_PDN_DONE 0x10 +#define CS35L35_VPBR_ERR 0x02 +#define CS35L35_VPBR_CLR 0x01 + +/* CS35L35_INT_3 */ +#define CS35L35_BST_HIGH 0x10 +#define CS35L35_BST_HIGH_FLAG 0x08 +#define CS35L35_BST_IPK_FLAG 0x04 +#define CS35L35_LBST_SHORT 0x01 + +/* CS35L35_INT_4 */ +#define CS35L35_VMON_OVFL 0x08 +#define CS35L35_IMON_OVFL 0x04 + +#define CS35L35_FORMATS (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | \ + SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) + +struct cs35l35_private { + struct snd_soc_codec *codec; + struct cs35l35_platform_data pdata; + struct regmap *regmap; + struct regulator_bulk_data supplies[2]; + int num_supplies; + int sysclk; + int sclk; + bool pdm_mode; + bool i2s_mode; + bool slave_mode; + /* GPIO for /RST */ + struct gpio_desc *reset_gpio; + struct completion pdn_done; +}; + +static const char * const cs35l35_supplies[] = { + "VA", + "VP", +}; + +#endif -- 1.9.1

1 0

[alsa-devel] [PATCH][resend] ASoC: cq93vc: remove MFD_DAVINCI_VOICECODEC dependency from CQ0093VC
by Kuninori Morimoto 25 Jan '17

25 Jan '17

From: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com> CQ0093VC is no longer dependent on MFD_DAVINCI_VOICECODEC, let's remove it. Otherwise, we can't compile it by COMPILE_TEST on non-DAVINCE platform Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com> --- > Mark I couldn't find this patch on your repository today. It is based on below patch which is included on latest linus/master 8ca9edc837932469b81b8b47ea43a074b6add970 ("mfd: davinci_voicecodec: Tidyup header difinitions") sound/soc/codecs/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index b3fd110..a892937 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -45,7 +45,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_ALC5623 if I2C select SND_SOC_ALC5632 if I2C select SND_SOC_BT_SCO - select SND_SOC_CQ0093VC if MFD_DAVINCI_VOICECODEC + select SND_SOC_CQ0093VC select SND_SOC_CS35L32 if I2C select SND_SOC_CS35L33 if I2C select SND_SOC_CS42L51_I2C if I2C -- 1.9.1

1 0

[alsa-devel] Applied "ASoC: hdac_hdmi: Register widget event handlers" to the asoc tree
by Mark Brown 24 Jan '17

24 Jan '17

The patch ASoC: hdac_hdmi: Register widget event handlers has been applied to the asoc tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From c9bfb5d74dd2a704bf3c622c6b268f6dc6f37ca6 Mon Sep 17 00:00:00 2001 From: Jeeja KP <jeeja.kp(a)intel.com> Date: Tue, 24 Jan 2017 21:49:03 +0530 Subject: [PATCH] ASoC: hdac_hdmi: Register widget event handlers In case of hdmi connect/disconnect or when stream need to be route to multiple monitors, corresponding port and audio infoframe needs to be reconfigured. Currently all the configuration are done in DAI ops which results in silence playback. So use dapm widget event handlers to program audio infoframe and enable /disable port configuration when widget is power on/off. Signed-off-by: Jeeja KP <jeeja.kp(a)intel.com> Signed-off-by: Mark Brown <broonie(a)kernel.org> --- sound/soc/codecs/hdac_hdmi.c | 350 ++++++++++++++++++++++--------------------- 1 file changed, 183 insertions(+), 167 deletions(-) diff --git a/sound/soc/codecs/hdac_hdmi.c b/sound/soc/codecs/hdac_hdmi.c index 4b4e376cc3f6..c0b49f4b7074 100644 --- a/sound/soc/codecs/hdac_hdmi.c +++ b/sound/soc/codecs/hdac_hdmi.c @@ -97,6 +97,9 @@ struct hdac_hdmi_pcm { struct hdac_hdmi_pin *pin; struct hdac_hdmi_cvt *cvt; struct snd_jack *jack; + int stream_tag; + int channels; + int format; }; struct hdac_hdmi_dai_pin_map { @@ -116,11 +119,19 @@ struct hdac_hdmi_priv { struct hdac_chmap chmap; }; -static void hdac_hdmi_enable_cvt(struct hdac_ext_device *edev, - struct hdac_hdmi_dai_pin_map *dai_map); +static struct hdac_hdmi_pcm * +hdac_hdmi_get_pcm_from_cvt(struct hdac_hdmi_priv *hdmi, + struct hdac_hdmi_cvt *cvt) +{ + struct hdac_hdmi_pcm *pcm = NULL; + + list_for_each_entry(pcm, &hdmi->pcm_list, head) { + if (pcm->cvt == cvt) + break; + } -static int hdac_hdmi_enable_pin(struct hdac_ext_device *hdac, - struct hdac_hdmi_dai_pin_map *dai_map); + return pcm; +} static struct hdac_hdmi_pcm *get_hdmi_pcm_from_id(struct hdac_hdmi_priv *hdmi, int pcm_idx) @@ -181,25 +192,6 @@ static int hdac_hdmi_eld_limit_formats(struct snd_pcm_runtime *runtime, } -static int hdac_hdmi_setup_stream(struct hdac_ext_device *hdac, - hda_nid_t cvt_nid, hda_nid_t pin_nid, - u32 stream_tag, int format) -{ - unsigned int val; - - dev_dbg(&hdac->hdac.dev, "cvt nid %d pnid %d stream %d format 0x%x\n", - cvt_nid, pin_nid, stream_tag, format); - - val = (stream_tag << 4); - - snd_hdac_codec_write(&hdac->hdac, cvt_nid, 0, - AC_VERB_SET_CHANNEL_STREAMID, val); - snd_hdac_codec_write(&hdac->hdac, cvt_nid, 0, - AC_VERB_SET_STREAM_FORMAT, format); - - return 0; -} - static void hdac_hdmi_set_dip_index(struct hdac_ext_device *hdac, hda_nid_t pin_nid, int packet_index, int byte_index) @@ -312,54 +304,25 @@ static int hdac_hdmi_setup_audio_infoframe(struct hdac_ext_device *hdac, return 0; } -static void hdac_hdmi_set_power_state(struct hdac_ext_device *edev, - struct hdac_hdmi_dai_pin_map *dai_map, unsigned int pwr_state) +static int hdac_hdmi_set_tdm_slot(struct snd_soc_dai *dai, + unsigned int tx_mask, unsigned int rx_mask, + int slots, int slot_width) { - /* Power up pin widget */ - if (!snd_hdac_check_power_state(&edev->hdac, dai_map->pin->nid, - pwr_state)) - snd_hdac_codec_write(&edev->hdac, dai_map->pin->nid, 0, - AC_VERB_SET_POWER_STATE, pwr_state); - - /* Power up converter */ - if (!snd_hdac_check_power_state(&edev->hdac, dai_map->cvt->nid, - pwr_state)) - snd_hdac_codec_write(&edev->hdac, dai_map->cvt->nid, 0, - AC_VERB_SET_POWER_STATE, pwr_state); -} - -static int hdac_hdmi_playback_prepare(struct snd_pcm_substream *substream, - struct snd_soc_dai *dai) -{ - struct hdac_ext_device *hdac = snd_soc_dai_get_drvdata(dai); - struct hdac_hdmi_priv *hdmi = hdac->private_data; + struct hdac_ext_device *edev = snd_soc_dai_get_drvdata(dai); + struct hdac_hdmi_priv *hdmi = edev->private_data; struct hdac_hdmi_dai_pin_map *dai_map; - struct hdac_hdmi_pin *pin; - struct hdac_ext_dma_params *dd; - int ret; + struct hdac_hdmi_pcm *pcm; + + dev_dbg(&edev->hdac.dev, "%s: strm_tag: %d\n", __func__, tx_mask); dai_map = &hdmi->dai_map[dai->id]; - pin = dai_map->pin; - dd = (struct hdac_ext_dma_params *)snd_soc_dai_get_dma_data(dai, substream); - dev_dbg(&hdac->hdac.dev, "stream tag from cpu dai %d format in cvt 0x%x\n", - dd->stream_tag, dd->format); + pcm = hdac_hdmi_get_pcm_from_cvt(hdmi, dai_map->cvt); - hdac_hdmi_enable_cvt(hdac, dai_map); - ret = hdac_hdmi_enable_pin(hdac, dai_map); - if (ret < 0) - return ret; - mutex_lock(&pin->lock); - pin->channels = substream->runtime->channels; + if (pcm) + pcm->stream_tag = (tx_mask << 4); - ret = hdac_hdmi_setup_audio_infoframe(hdac, dai_map->cvt->nid, - dai_map->pin->nid); - mutex_unlock(&pin->lock); - if (ret < 0) - return ret; - - return hdac_hdmi_setup_stream(hdac, dai_map->cvt->nid, - dai_map->pin->nid, dd->stream_tag, dd->format); + return 0; } static int hdac_hdmi_set_hw_params(struct snd_pcm_substream *substream, @@ -369,7 +332,8 @@ static int hdac_hdmi_set_hw_params(struct snd_pcm_substream *substream, struct hdac_hdmi_priv *hdmi = hdac->private_data; struct hdac_hdmi_dai_pin_map *dai_map; struct hdac_hdmi_pin *pin; - struct hdac_ext_dma_params *dd; + struct hdac_hdmi_pcm *pcm; + int format; dai_map = &hdmi->dai_map[dai->id]; pin = dai_map->pin; @@ -383,74 +347,16 @@ static int hdac_hdmi_set_hw_params(struct snd_pcm_substream *substream, return -ENODEV; } - dd = snd_soc_dai_get_dma_data(dai, substream); - if (!dd) { - dd = kzalloc(sizeof(*dd), GFP_KERNEL); - if (!dd) - return -ENOMEM; - } - - dd->format = snd_hdac_calc_stream_format(params_rate(hparams), + format = snd_hdac_calc_stream_format(params_rate(hparams), params_channels(hparams), params_format(hparams), 24, 0); - snd_soc_dai_set_dma_data(dai, substream, (void *)dd); - - return 0; -} - -static int hdac_hdmi_playback_cleanup(struct snd_pcm_substream *substream, - struct snd_soc_dai *dai) -{ - struct hdac_ext_dma_params *dd; - - dd = (struct hdac_ext_dma_params *)snd_soc_dai_get_dma_data(dai, substream); - - if (dd) { - snd_soc_dai_set_dma_data(dai, substream, NULL); - kfree(dd); - } - - return 0; -} - -static void hdac_hdmi_enable_cvt(struct hdac_ext_device *edev, - struct hdac_hdmi_dai_pin_map *dai_map) -{ - /* Enable transmission */ - snd_hdac_codec_write(&edev->hdac, dai_map->cvt->nid, 0, - AC_VERB_SET_DIGI_CONVERT_1, 1); - - /* Category Code (CC) to zero */ - snd_hdac_codec_write(&edev->hdac, dai_map->cvt->nid, 0, - AC_VERB_SET_DIGI_CONVERT_2, 0); -} - -static int hdac_hdmi_enable_pin(struct hdac_ext_device *hdac, - struct hdac_hdmi_dai_pin_map *dai_map) -{ - int mux_idx; - struct hdac_hdmi_pin *pin = dai_map->pin; - - for (mux_idx = 0; mux_idx < pin->num_mux_nids; mux_idx++) { - if (pin->mux_nids[mux_idx] == dai_map->cvt->nid) { - snd_hdac_codec_write(&hdac->hdac, pin->nid, 0, - AC_VERB_SET_CONNECT_SEL, mux_idx); - break; - } - } - - if (mux_idx == pin->num_mux_nids) + pcm = hdac_hdmi_get_pcm_from_cvt(hdmi, dai_map->cvt); + if (!pcm) return -EIO; - /* Enable out path for this pin widget */ - snd_hdac_codec_write(&hdac->hdac, pin->nid, 0, - AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT); - - hdac_hdmi_set_power_state(hdac, dai_map, AC_PWRST_D0); - - snd_hdac_codec_write(&hdac->hdac, pin->nid, 0, - AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE); + pcm->format = format; + pcm->channels = params_channels(hparams); return 0; } @@ -564,23 +470,6 @@ static int hdac_hdmi_pcm_open(struct snd_pcm_substream *substream, pin->eld.eld_buffer); } -static int hdac_hdmi_trigger(struct snd_pcm_substream *substream, int cmd, - struct snd_soc_dai *dai) -{ - - switch (cmd) { - case SNDRV_PCM_TRIGGER_RESUME: - case SNDRV_PCM_TRIGGER_START: - case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: - return hdac_hdmi_playback_prepare(substream, dai); - - default: - return 0; - } - - return 0; -} - static void hdac_hdmi_pcm_close(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) { @@ -591,16 +480,6 @@ static void hdac_hdmi_pcm_close(struct snd_pcm_substream *substream, dai_map = &hdmi->dai_map[dai->id]; if (dai_map->pin) { - snd_hdac_codec_write(&hdac->hdac, dai_map->cvt->nid, 0, - AC_VERB_SET_CHANNEL_STREAMID, 0); - snd_hdac_codec_write(&hdac->hdac, dai_map->cvt->nid, 0, - AC_VERB_SET_STREAM_FORMAT, 0); - - hdac_hdmi_set_power_state(hdac, dai_map, AC_PWRST_D3); - - snd_hdac_codec_write(&hdac->hdac, dai_map->pin->nid, 0, - AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE); - mutex_lock(&dai_map->pin->lock); dai_map->pin->chmap_set = false; memset(dai_map->pin->chmap, 0, sizeof(dai_map->pin->chmap)); @@ -641,10 +520,11 @@ hdac_hdmi_query_cvt_params(struct hdac_device *hdac, struct hdac_hdmi_cvt *cvt) } static int hdac_hdmi_fill_widget_info(struct device *dev, - struct snd_soc_dapm_widget *w, - enum snd_soc_dapm_type id, void *priv, - const char *wname, const char *stream, - struct snd_kcontrol_new *wc, int numkc) + struct snd_soc_dapm_widget *w, enum snd_soc_dapm_type id, + void *priv, const char *wname, const char *stream, + struct snd_kcontrol_new *wc, int numkc, + int (*event)(struct snd_soc_dapm_widget *, + struct snd_kcontrol *, int), unsigned short event_flags) { w->id = id; w->name = devm_kstrdup(dev, wname, GFP_KERNEL); @@ -657,6 +537,8 @@ static int hdac_hdmi_fill_widget_info(struct device *dev, w->kcontrol_news = wc; w->num_kcontrols = numkc; w->priv = priv; + w->event = event; + w->event_flags = event_flags; return 0; } @@ -686,6 +568,136 @@ static struct hdac_hdmi_pcm *hdac_hdmi_get_pcm(struct hdac_ext_device *edev, return NULL; } +static void hdac_hdmi_set_power_state(struct hdac_ext_device *edev, + hda_nid_t nid, unsigned int pwr_state) +{ + if (get_wcaps(&edev->hdac, nid) & AC_WCAP_POWER) { + if (!snd_hdac_check_power_state(&edev->hdac, nid, pwr_state)) + snd_hdac_codec_write(&edev->hdac, nid, 0, + AC_VERB_SET_POWER_STATE, pwr_state); + } +} + +static void hdac_hdmi_set_amp(struct hdac_ext_device *edev, + hda_nid_t nid, int val) +{ + if (get_wcaps(&edev->hdac, nid) & AC_WCAP_OUT_AMP) + snd_hdac_codec_write(&edev->hdac, nid, 0, + AC_VERB_SET_AMP_GAIN_MUTE, val); +} + + +static int hdac_hdmi_pin_output_widget_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kc, int event) +{ + struct hdac_hdmi_pin *pin = w->priv; + struct hdac_ext_device *edev = to_hda_ext_device(w->dapm->dev); + struct hdac_hdmi_pcm *pcm; + + dev_dbg(&edev->hdac.dev, "%s: widget: %s event: %x\n", + __func__, w->name, event); + + pcm = hdac_hdmi_get_pcm(edev, pin); + if (!pcm) + return -EIO; + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + hdac_hdmi_set_power_state(edev, pin->nid, AC_PWRST_D0); + + /* Enable out path for this pin widget */ + snd_hdac_codec_write(&edev->hdac, pin->nid, 0, + AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT); + + hdac_hdmi_set_amp(edev, pin->nid, AMP_OUT_UNMUTE); + + return hdac_hdmi_setup_audio_infoframe(edev, pcm->cvt->nid, + pin->nid); + + case SND_SOC_DAPM_POST_PMD: + hdac_hdmi_set_amp(edev, pin->nid, AMP_OUT_MUTE); + + /* Disable out path for this pin widget */ + snd_hdac_codec_write(&edev->hdac, pin->nid, 0, + AC_VERB_SET_PIN_WIDGET_CONTROL, 0); + + hdac_hdmi_set_power_state(edev, pin->nid, AC_PWRST_D3); + break; + + } + + return 0; +} + +static int hdac_hdmi_cvt_output_widget_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kc, int event) +{ + struct hdac_hdmi_cvt *cvt = w->priv; + struct hdac_ext_device *edev = to_hda_ext_device(w->dapm->dev); + struct hdac_hdmi_priv *hdmi = edev->private_data; + struct hdac_hdmi_pcm *pcm; + + dev_dbg(&edev->hdac.dev, "%s: widget: %s event: %x\n", + __func__, w->name, event); + + pcm = hdac_hdmi_get_pcm_from_cvt(hdmi, cvt); + if (!pcm) + return -EIO; + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + hdac_hdmi_set_power_state(edev, cvt->nid, AC_PWRST_D0); + + /* Enable transmission */ + snd_hdac_codec_write(&edev->hdac, cvt->nid, 0, + AC_VERB_SET_DIGI_CONVERT_1, 1); + + /* Category Code (CC) to zero */ + snd_hdac_codec_write(&edev->hdac, cvt->nid, 0, + AC_VERB_SET_DIGI_CONVERT_2, 0); + + snd_hdac_codec_write(&edev->hdac, cvt->nid, 0, + AC_VERB_SET_CHANNEL_STREAMID, pcm->stream_tag); + snd_hdac_codec_write(&edev->hdac, cvt->nid, 0, + AC_VERB_SET_STREAM_FORMAT, pcm->format); + break; + + case SND_SOC_DAPM_POST_PMD: + snd_hdac_codec_write(&edev->hdac, cvt->nid, 0, + AC_VERB_SET_CHANNEL_STREAMID, 0); + snd_hdac_codec_write(&edev->hdac, cvt->nid, 0, + AC_VERB_SET_STREAM_FORMAT, 0); + + hdac_hdmi_set_power_state(edev, cvt->nid, AC_PWRST_D3); + break; + + } + + return 0; +} + +static int hdac_hdmi_pin_mux_widget_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kc, int event) +{ + struct hdac_hdmi_pin *pin = w->priv; + struct hdac_ext_device *edev = to_hda_ext_device(w->dapm->dev); + int mux_idx; + + dev_dbg(&edev->hdac.dev, "%s: widget: %s event: %x\n", + __func__, w->name, event); + + if (!kc) + kc = w->kcontrols[0]; + + mux_idx = dapm_kcontrol_get_value(kc); + if (mux_idx > 0) { + snd_hdac_codec_write(&edev->hdac, pin->nid, 0, + AC_VERB_SET_CONNECT_SEL, (mux_idx - 1)); + } + + return 0; +} + /* * Based on user selection, map the PINs with the PCMs. */ @@ -803,7 +815,9 @@ static int hdac_hdmi_create_pin_muxs(struct hdac_ext_device *edev, return -ENOMEM; return hdac_hdmi_fill_widget_info(&edev->hdac.dev, widget, - snd_soc_dapm_mux, pin, widget_name, NULL, kc, 1); + snd_soc_dapm_mux, pin, widget_name, NULL, kc, 1, + hdac_hdmi_pin_mux_widget_event, + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_REG); } /* Add cvt <- input <- mux route map */ @@ -874,8 +888,10 @@ static int create_fill_widget_route_map(struct snd_soc_dapm_context *dapm) list_for_each_entry(cvt, &hdmi->cvt_list, head) { sprintf(widget_name, "Converter %d", cvt->nid); ret = hdac_hdmi_fill_widget_info(dapm->dev, &widgets[i], - snd_soc_dapm_aif_in, &cvt->nid, - widget_name, dai_drv[i].playback.stream_name, NULL, 0); + snd_soc_dapm_aif_in, cvt, + widget_name, dai_drv[i].playback.stream_name, NULL, 0, + hdac_hdmi_cvt_output_widget_event, + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD); if (ret < 0) return ret; i++; @@ -884,8 +900,10 @@ static int create_fill_widget_route_map(struct snd_soc_dapm_context *dapm) list_for_each_entry(pin, &hdmi->pin_list, head) { sprintf(widget_name, "hif%d Output", pin->nid); ret = hdac_hdmi_fill_widget_info(dapm->dev, &widgets[i], - snd_soc_dapm_output, &pin->nid, - widget_name, NULL, NULL, 0); + snd_soc_dapm_output, pin, + widget_name, NULL, NULL, 0, + hdac_hdmi_pin_output_widget_event, + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD); if (ret < 0) return ret; i++; @@ -1141,9 +1159,7 @@ static struct snd_soc_dai_ops hdmi_dai_ops = { .startup = hdac_hdmi_pcm_open, .shutdown = hdac_hdmi_pcm_close, .hw_params = hdac_hdmi_set_hw_params, - .prepare = hdac_hdmi_playback_prepare, - .trigger = hdac_hdmi_trigger, - .hw_free = hdac_hdmi_playback_cleanup, + .set_tdm_slot = hdac_hdmi_set_tdm_slot, }; /* -- 2.11.0

1 0

[alsa-devel] [PATCH] ASoC: rsnd: fixup for_each_rsnd_mod_array{s} iterator increment
by Kuninori Morimoto 24 Jan '17

24 Jan '17

commit 5f222a292 ("ASoC: rsnd: use for_each_rsnd_mod_xxx() ...") modifies rsnd_dai_call() to use for_each_rsnd_mod_arrays(). Current rsnd is incrementing iterator in rsnd_mod_next(), but the iterator will indicate +1 position in for_each loop in this case. Incremental position should be inside for() Reported-by: Hoan Nguyen An <na-hoan(a)jinso.co.jp> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com> --- Mark This is bugfix for v4.10. Can you please apply this patch to it? sound/soc/sh/rcar/core.c | 2 -- sound/soc/sh/rcar/rsnd.h | 4 ++-- 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c index 99b5b08..47b370c 100644 --- a/sound/soc/sh/rcar/core.c +++ b/sound/soc/sh/rcar/core.c @@ -363,8 +363,6 @@ struct rsnd_mod *rsnd_mod_next(int *iterator, if (!mod) continue; - (*iterator)++; - return mod; } diff --git a/sound/soc/sh/rcar/rsnd.h b/sound/soc/sh/rcar/rsnd.h index b90df77..7410ec0 100644 --- a/sound/soc/sh/rcar/rsnd.h +++ b/sound/soc/sh/rcar/rsnd.h @@ -374,10 +374,10 @@ struct rsnd_mod *rsnd_mod_next(int *iterator, int array_size); #define for_each_rsnd_mod(iterator, pos, io) \ for (iterator = 0; \ - (pos = rsnd_mod_next(&iterator, io, NULL, 0));) + (pos = rsnd_mod_next(&iterator, io, NULL, 0)); iterator++) #define for_each_rsnd_mod_arrays(iterator, pos, io, array, size) \ for (iterator = 0; \ - (pos = rsnd_mod_next(&iterator, io, array, size));) + (pos = rsnd_mod_next(&iterator, io, array, size)); iterator++) #define for_each_rsnd_mod_array(iterator, pos, io, array) \ for_each_rsnd_mod_arrays(iterator, pos, io, array, ARRAY_SIZE(array)) -- 1.9.1

2 3

[alsa-devel] [PATCH v2 0/4] Add support for es8388 on the rock2
by Romain Perier 24 Jan '17

24 Jan '17

This set of patches adds a machine driver for rockchip boards that use ES8388 codecs. It also adds slave mode to the es8328 driver that currently only supported the master mode. Then, it adds the required DT definitions to link rockchip-i2s to the es8388 analog output. This work is based on the initial work that was done by Sjoerd Simons <sjoerd.simons(a)collabora.co.uk> with some improvements, changes and more commits. Changes in v2: - Fixed wrong use of the data structure i2c_device_id - Fixed wrong dependencies for SND_SOC_ROCKCHIP_ES8388 Romain Perier (4): ASoC: es8328-i2c: Add compatible for ES8388 ASoC: es8328: Add support for slave mode ASoC: rockchip: Add machine driver for ES8388 codecs arm: dts: Add support for ES8388 to the Radxa Rock 2 Documentation/devicetree/bindings/sound/es8328.txt | 2 +- .../devicetree/bindings/sound/rockchip-es8388.txt | 28 +++ arch/arm/boot/dts/rk3288-rock2-square.dts | 37 +++ sound/soc/codecs/es8328-i2c.c | 2 + sound/soc/codecs/es8328.c | 28 ++- sound/soc/rockchip/Kconfig | 9 + sound/soc/rockchip/Makefile | 2 + sound/soc/rockchip/rockchip_es8388.c | 270 +++++++++++++++++++++ 8 files changed, 371 insertions(+), 7 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/rockchip-es8388.txt create mode 100644 sound/soc/rockchip/rockchip_es8388.c -- 2.9.3

3 7

[alsa-devel] Applied "ASoC: Revert "samsung: Remove unneeded initialization of chan_name"" to the asoc tree
by Mark Brown 24 Jan '17

24 Jan '17

The patch ASoC: Revert "samsung: Remove unneeded initialization of chan_name" has been applied to the asoc tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From b8ab0ccc0b6e517ff595f1b06fb9f578c8b4001f Mon Sep 17 00:00:00 2001 From: Sylwester Nawrocki <s.nawrocki(a)samsung.com> Date: Tue, 17 Jan 2017 14:16:42 +0100 Subject: [PATCH] ASoC: Revert "samsung: Remove unneeded initialization of chan_name" This reverts commit cdaf9af1eaeb539e32bfd6da6310b41ad6c3ba23 which breaks I2S support on the non-DT Samsung SoC platforms, since the default "tx", "rx" DMA channel names for playback and capture streams or custom channel names in struct snd_dmaengine_pcm_config are supported in the ASoC dmaengine module only for devicetree booting case. Signed-off-by: Sylwester Nawrocki <s.nawrocki(a)samsung.com> Signed-off-by: Mark Brown <broonie(a)kernel.org> --- sound/soc/samsung/dmaengine.c | 8 ++++++-- sound/soc/samsung/i2s.c | 3 +++ sound/soc/samsung/s3c2412-i2s.c | 2 ++ sound/soc/samsung/s3c24xx-i2s.c | 2 ++ 4 files changed, 13 insertions(+), 2 deletions(-) diff --git a/sound/soc/samsung/dmaengine.c b/sound/soc/samsung/dmaengine.c index cda656e4afc6..9104c98deeb7 100644 --- a/sound/soc/samsung/dmaengine.c +++ b/sound/soc/samsung/dmaengine.c @@ -37,8 +37,12 @@ int samsung_asoc_dma_platform_register(struct device *dev, dma_filter_fn filter, pcm_conf->prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config; pcm_conf->compat_filter_fn = filter; - pcm_conf->chan_names[SNDRV_PCM_STREAM_PLAYBACK] = tx; - pcm_conf->chan_names[SNDRV_PCM_STREAM_CAPTURE] = rx; + if (dev->of_node) { + pcm_conf->chan_names[SNDRV_PCM_STREAM_PLAYBACK] = tx; + pcm_conf->chan_names[SNDRV_PCM_STREAM_CAPTURE] = rx; + } else { + flags |= SND_DMAENGINE_PCM_FLAG_CUSTOM_CHANNEL_NAME; + } return devm_snd_dmaengine_pcm_register(dev, pcm_conf, flags); } diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c index e00974bc5616..85324e61cbd5 100644 --- a/sound/soc/samsung/i2s.c +++ b/sound/soc/samsung/i2s.c @@ -1305,6 +1305,8 @@ static int samsung_i2s_probe(struct platform_device *pdev) } pri_dai->dma_playback.addr = regs_base + I2STXD; pri_dai->dma_capture.addr = regs_base + I2SRXD; + pri_dai->dma_playback.chan_name = "tx"; + pri_dai->dma_capture.chan_name = "rx"; pri_dai->dma_playback.addr_width = 4; pri_dai->dma_capture.addr_width = 4; pri_dai->quirks = quirks; @@ -1329,6 +1331,7 @@ static int samsung_i2s_probe(struct platform_device *pdev) sec_dai->lock = &pri_dai->spinlock; sec_dai->variant_regs = pri_dai->variant_regs; sec_dai->dma_playback.addr = regs_base + I2STXDS; + sec_dai->dma_playback.chan_name = "tx-sec"; if (!np) { sec_dai->dma_playback.filter_data = i2s_pdata->dma_play_sec; diff --git a/sound/soc/samsung/s3c2412-i2s.c b/sound/soc/samsung/s3c2412-i2s.c index 6d0b8897fa6c..0a4718207e6e 100644 --- a/sound/soc/samsung/s3c2412-i2s.c +++ b/sound/soc/samsung/s3c2412-i2s.c @@ -35,10 +35,12 @@ #include <linux/platform_data/asoc-s3c.h> static struct snd_dmaengine_dai_dma_data s3c2412_i2s_pcm_stereo_out = { + .chan_name = "tx", .addr_width = 4, }; static struct snd_dmaengine_dai_dma_data s3c2412_i2s_pcm_stereo_in = { + .chan_name = "rx", .addr_width = 4, }; diff --git a/sound/soc/samsung/s3c24xx-i2s.c b/sound/soc/samsung/s3c24xx-i2s.c index 07f5091b33e8..91e6871e5413 100644 --- a/sound/soc/samsung/s3c24xx-i2s.c +++ b/sound/soc/samsung/s3c24xx-i2s.c @@ -31,10 +31,12 @@ #include "s3c24xx-i2s.h" static struct snd_dmaengine_dai_dma_data s3c24xx_i2s_pcm_stereo_out = { + .chan_name = "tx", .addr_width = 2, }; static struct snd_dmaengine_dai_dma_data s3c24xx_i2s_pcm_stereo_in = { + .chan_name = "rx", .addr_width = 2, }; -- 2.11.0

1 0

[alsa-devel] [PATCH 1/2] ASoC: Revert "Drop SND_DMAENGINE_PCM_FLAG_CUSTOM_CHANNEL_NAME flag"
by Sylwester Nawrocki 24 Jan '17

24 Jan '17

This reverts commit c6644119a3f80ea644bde10009d5e1013b5aff29 and restores the ability to specify DMA channel names per DAI dma_data. Unfortunately the functionality removed in the patch being reverted cannot be entirely replaced by DMA channel names specified in struct snd_dmaengine_pcm_config as that doesn't cover devices with more than 2 DMA channels. Signed-off-by: Sylwester Nawrocki <s.nawrocki(a)samsung.com> --- include/sound/dmaengine_pcm.h | 6 ++++++ sound/soc/soc-generic-dmaengine-pcm.c | 12 +++++++++++- 2 files changed, 17 insertions(+), 1 deletion(-) diff --git a/include/sound/dmaengine_pcm.h b/include/sound/dmaengine_pcm.h index 1c8f9e1..67be244 100644 --- a/include/sound/dmaengine_pcm.h +++ b/include/sound/dmaengine_pcm.h @@ -71,6 +71,7 @@ struct dma_chan *snd_dmaengine_pcm_request_channel(dma_filter_fn filter_fn, * @slave_id: Slave requester id for the DMA channel. * @filter_data: Custom DMA channel filter data, this will usually be used when * requesting the DMA channel. + * @chan_name: Custom channel name to use when requesting DMA channel. * @fifo_size: FIFO size of the DAI controller in bytes * @flags: PCM_DAI flags, only SND_DMAENGINE_PCM_DAI_FLAG_PACK for now */ @@ -80,6 +81,7 @@ struct snd_dmaengine_dai_dma_data { u32 maxburst; unsigned int slave_id; void *filter_data; + const char *chan_name; unsigned int fifo_size; unsigned int flags; }; @@ -105,6 +107,10 @@ void snd_dmaengine_pcm_set_config_from_dai_data( * playback. */ #define SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX BIT(3) +/* + * The PCM streams have custom channel names specified. + */ +#define SND_DMAENGINE_PCM_FLAG_CUSTOM_CHANNEL_NAME BIT(4) /** * struct snd_dmaengine_pcm_config - Configuration data for dmaengine based PCM diff --git a/sound/soc/soc-generic-dmaengine-pcm.c b/sound/soc/soc-generic-dmaengine-pcm.c index 17eb149..d537864 100644 --- a/sound/soc/soc-generic-dmaengine-pcm.c +++ b/sound/soc/soc-generic-dmaengine-pcm.c @@ -263,6 +263,7 @@ static int dmaengine_pcm_new(struct snd_soc_pcm_runtime *rtd) struct dmaengine_pcm *pcm = soc_platform_to_pcm(rtd->platform); const struct snd_dmaengine_pcm_config *config = pcm->config; struct device *dev = rtd->platform->dev; + struct snd_dmaengine_dai_dma_data *dma_data; struct snd_pcm_substream *substream; size_t prealloc_buffer_size; size_t max_buffer_size; @@ -282,6 +283,13 @@ static int dmaengine_pcm_new(struct snd_soc_pcm_runtime *rtd) if (!substream) continue; + dma_data = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream); + + if (!pcm->chan[i] && + (pcm->flags & SND_DMAENGINE_PCM_FLAG_CUSTOM_CHANNEL_NAME)) + pcm->chan[i] = dma_request_slave_channel(dev, + dma_data->chan_name); + if (!pcm->chan[i] && (pcm->flags & SND_DMAENGINE_PCM_FLAG_COMPAT)) { pcm->chan[i] = dmaengine_pcm_compat_request_channel(rtd, substream); @@ -350,7 +358,9 @@ static int dmaengine_pcm_request_chan_of(struct dmaengine_pcm *pcm, const char *name; struct dma_chan *chan; - if ((pcm->flags & SND_DMAENGINE_PCM_FLAG_NO_DT) || !dev->of_node) + if ((pcm->flags & (SND_DMAENGINE_PCM_FLAG_NO_DT | + SND_DMAENGINE_PCM_FLAG_CUSTOM_CHANNEL_NAME)) || + !dev->of_node) return 0; if (config && config->dma_dev) { -- 1.9.1

2 2

[alsa-devel] [PATCH 1/3] ASoC: wm_adsp: Correct some missing locking
by Charles Keepax 24 Jan '17

24 Jan '17

The recent refactoring overlooked some places which should be covered by the pwr_lock, all code that affects or depends on the power status of the DSP should be covered, this patch adds the missing coverage. Signed-off-by: Charles Keepax <ckeepax(a)opensource.wolfsonmicro.com> --- sound/soc/codecs/wm_adsp.c | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 73dbe4c..08a4a61 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -2575,6 +2575,8 @@ int wm_adsp2_early_event(struct snd_soc_dapm_widget *w, queue_work(system_unbound_wq, &dsp->boot_work); break; case SND_SOC_DAPM_PRE_PMD: + mutex_lock(&dsp->pwr_lock); + wm_adsp_debugfs_clear(dsp); dsp->fw_id = 0; @@ -2590,6 +2592,8 @@ int wm_adsp2_early_event(struct snd_soc_dapm_widget *w, wm_adsp_free_alg_regions(dsp); + mutex_unlock(&dsp->pwr_lock); + adsp_dbg(dsp, "Shutdown complete\n"); break; default: @@ -2612,8 +2616,12 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, case SND_SOC_DAPM_POST_PMU: flush_work(&dsp->boot_work); - if (!dsp->booted) - return -EIO; + mutex_lock(&dsp->pwr_lock); + + if (!dsp->booted) { + ret = -EIO; + goto err; + } ret = wm_adsp2_ena(dsp); if (ret != 0) @@ -2633,14 +2641,10 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, dsp->running = true; - mutex_lock(&dsp->pwr_lock); - if (wm_adsp_fw[dsp->fw].num_caps != 0) { ret = wm_adsp_buffer_init(dsp); - if (ret < 0) { - mutex_unlock(&dsp->pwr_lock); + if (ret < 0) goto err; - } } mutex_unlock(&dsp->pwr_lock); @@ -2685,6 +2689,7 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, err: regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, ADSP2_SYS_ENA | ADSP2_CORE_ENA | ADSP2_START, 0); + mutex_unlock(&dsp->pwr_lock); return ret; } EXPORT_SYMBOL_GPL(wm_adsp2_event); -- 2.1.4

2 5

[alsa-devel] [PATCH] topology: Fix incorrect license in source comments.
by Liam Girdwood 24 Jan '17

24 Jan '17

The topology source files had the wrong licence specified in the comments when initially upstreamed. The topology source files are all licensed under the LGPL-2.1 and not the GPLv2. All earlier versions of the alsa-lib topology source files must be considered LGPL-2.1 like the other source files in alsa-lib and also as specified in the alsa-lib COPYING file. Signed-off-by: Liam Girdwood <liam.r.girdwood(a)linux.intel.com> --- src/topology/builder.c | 17 +++++++++-------- src/topology/channel.c | 17 +++++++++-------- src/topology/ctl.c | 17 +++++++++-------- src/topology/dapm.c | 17 +++++++++-------- src/topology/data.c | 17 +++++++++-------- src/topology/elem.c | 17 +++++++++-------- src/topology/ops.c | 17 +++++++++-------- src/topology/parser.c | 17 +++++++++-------- src/topology/pcm.c | 17 +++++++++-------- src/topology/text.c | 17 +++++++++-------- 10 files changed, 90 insertions(+), 80 deletions(-) diff --git a/src/topology/builder.c b/src/topology/builder.c index 20fa925..dcd9e2a 100644 --- a/src/topology/builder.c +++ b/src/topology/builder.c @@ -2,14 +2,15 @@ Copyright(c) 2014-2015 Intel Corporation All rights reserved. - This program is free software; you can redistribute it and/or modify - it under the terms of version 2 of the GNU General Public License as - published by the Free Software Foundation. - - This program is distributed in the hope that it will be useful, but - WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - General Public License for more details. + This library is free software; you can redistribute it and/or modify + it under the terms of the GNU Lesser General Public License as + published by the Free Software Foundation; either version 2.1 of + the License, or (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Lesser General Public License for more details. Authors: Mengdong Lin <mengdong.lin(a)intel.com> Yao Jin <yao.jin(a)intel.com> diff --git a/src/topology/channel.c b/src/topology/channel.c index c2f1fea..8516b23 100644 --- a/src/topology/channel.c +++ b/src/topology/channel.c @@ -2,14 +2,15 @@ Copyright(c) 2014-2015 Intel Corporation All rights reserved. - This program is free software; you can redistribute it and/or modify - it under the terms of version 2 of the GNU General Public License as - published by the Free Software Foundation. - - This program is distributed in the hope that it will be useful, but - WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - General Public License for more details. + This library is free software; you can redistribute it and/or modify + it under the terms of the GNU Lesser General Public License as + published by the Free Software Foundation; either version 2.1 of + the License, or (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Lesser General Public License for more details. Authors: Mengdong Lin <mengdong.lin(a)intel.com> Yao Jin <yao.jin(a)intel.com> diff --git a/src/topology/ctl.c b/src/topology/ctl.c index 907a97f..1da3d18 100644 --- a/src/topology/ctl.c +++ b/src/topology/ctl.c @@ -2,14 +2,15 @@ Copyright(c) 2014-2015 Intel Corporation All rights reserved. - This program is free software; you can redistribute it and/or modify - it under the terms of version 2 of the GNU General Public License as - published by the Free Software Foundation. - - This program is distributed in the hope that it will be useful, but - WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - General Public License for more details. + This library is free software; you can redistribute it and/or modify + it under the terms of the GNU Lesser General Public License as + published by the Free Software Foundation; either version 2.1 of + the License, or (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Lesser General Public License for more details. Authors: Mengdong Lin <mengdong.lin(a)intel.com> Yao Jin <yao.jin(a)intel.com> diff --git a/src/topology/dapm.c b/src/topology/dapm.c index 8c585a7..eef72bb 100644 --- a/src/topology/dapm.c +++ b/src/topology/dapm.c @@ -2,14 +2,15 @@ Copyright(c) 2014-2015 Intel Corporation All rights reserved. - This program is free software; you can redistribute it and/or modify - it under the terms of version 2 of the GNU General Public License as - published by the Free Software Foundation. - - This program is distributed in the hope that it will be useful, but - WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - General Public License for more details. + This library is free software; you can redistribute it and/or modify + it under the terms of the GNU Lesser General Public License as + published by the Free Software Foundation; either version 2.1 of + the License, or (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Lesser General Public License for more details. Authors: Mengdong Lin <mengdong.lin(a)intel.com> Yao Jin <yao.jin(a)intel.com> diff --git a/src/topology/data.c b/src/topology/data.c index 0d5c430..e2aa38c 100644 --- a/src/topology/data.c +++ b/src/topology/data.c @@ -2,14 +2,15 @@ Copyright(c) 2014-2015 Intel Corporation All rights reserved. - This program is free software; you can redistribute it and/or modify - it under the terms of version 2 of the GNU General Public License as - published by the Free Software Foundation. - - This program is distributed in the hope that it will be useful, but - WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - General Public License for more details. + This library is free software; you can redistribute it and/or modify + it under the terms of the GNU Lesser General Public License as + published by the Free Software Foundation; either version 2.1 of + the License, or (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Lesser General Public License for more details. Authors: Mengdong Lin <mengdong.lin(a)intel.com> Yao Jin <yao.jin(a)intel.com> diff --git a/src/topology/elem.c b/src/topology/elem.c index db26483..efcf3e9 100644 --- a/src/topology/elem.c +++ b/src/topology/elem.c @@ -2,14 +2,15 @@ Copyright(c) 2014-2015 Intel Corporation All rights reserved. - This program is free software; you can redistribute it and/or modify - it under the terms of version 2 of the GNU General Public License as - published by the Free Software Foundation. - - This program is distributed in the hope that it will be useful, but - WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - General Public License for more details. + This library is free software; you can redistribute it and/or modify + it under the terms of the GNU Lesser General Public License as + published by the Free Software Foundation; either version 2.1 of + the License, or (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Lesser General Public License for more details. Authors: Mengdong Lin <mengdong.lin(a)intel.com> Yao Jin <yao.jin(a)intel.com> diff --git a/src/topology/ops.c b/src/topology/ops.c index 1b5c1e2..6f8dc1f 100644 --- a/src/topology/ops.c +++ b/src/topology/ops.c @@ -2,14 +2,15 @@ Copyright(c) 2014-2015 Intel Corporation All rights reserved. - This program is free software; you can redistribute it and/or modify - it under the terms of version 2 of the GNU General Public License as - published by the Free Software Foundation. - - This program is distributed in the hope that it will be useful, but - WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - General Public License for more details. + This library is free software; you can redistribute it and/or modify + it under the terms of the GNU Lesser General Public License as + published by the Free Software Foundation; either version 2.1 of + the License, or (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Lesser General Public License for more details. Authors: Mengdong Lin <mengdong.lin(a)intel.com> Yao Jin <yao.jin(a)intel.com> diff --git a/src/topology/parser.c b/src/topology/parser.c index c5f9757..cfc20e0 100644 --- a/src/topology/parser.c +++ b/src/topology/parser.c @@ -2,14 +2,15 @@ Copyright(c) 2014-2015 Intel Corporation All rights reserved. - This program is free software; you can redistribute it and/or modify - it under the terms of version 2 of the GNU General Public License as - published by the Free Software Foundation. - - This program is distributed in the hope that it will be useful, but - WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - General Public License for more details. + This library is free software; you can redistribute it and/or modify + it under the terms of the GNU Lesser General Public License as + published by the Free Software Foundation; either version 2.1 of + the License, or (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Lesser General Public License for more details. Authors: Mengdong Lin <mengdong.lin(a)intel.com> Yao Jin <yao.jin(a)intel.com> diff --git a/src/topology/pcm.c b/src/topology/pcm.c index 8f8a703..5568d57 100644 --- a/src/topology/pcm.c +++ b/src/topology/pcm.c @@ -2,14 +2,15 @@ Copyright(c) 2014-2015 Intel Corporation All rights reserved. - This program is free software; you can redistribute it and/or modify - it under the terms of version 2 of the GNU General Public License as - published by the Free Software Foundation. - - This program is distributed in the hope that it will be useful, but - WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - General Public License for more details. + This library is free software; you can redistribute it and/or modify + it under the terms of the GNU Lesser General Public License as + published by the Free Software Foundation; either version 2.1 of + the License, or (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Lesser General Public License for more details. Authors: Mengdong Lin <mengdong.lin(a)intel.com> Yao Jin <yao.jin(a)intel.com> diff --git a/src/topology/text.c b/src/topology/text.c index 303fbeb..cba6887 100644 --- a/src/topology/text.c +++ b/src/topology/text.c @@ -2,14 +2,15 @@ Copyright(c) 2014-2015 Intel Corporation All rights reserved. - This program is free software; you can redistribute it and/or modify - it under the terms of version 2 of the GNU General Public License as - published by the Free Software Foundation. - - This program is distributed in the hope that it will be useful, but - WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - General Public License for more details. + This library is free software; you can redistribute it and/or modify + it under the terms of the GNU Lesser General Public License as + published by the Free Software Foundation; either version 2.1 of + the License, or (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU Lesser General Public License for more details. Authors: Mengdong Lin <mengdong.lin(a)intel.com> Yao Jin <yao.jin(a)intel.com> -- 2.9.3

2 1

[alsa-devel] [PATCH] ASoC: ux500: do not moan on deferrals
by Linus Walleij 24 Jan '17

24 Jan '17

This removes the "error" print on probe deferral, it's unnecessary and confusing. Also cut a few debug prints we do not need. Signed-off-by: Linus Walleij <linus.walleij(a)linaro.org> --- sound/soc/ux500/mop500.c | 16 +--------------- 1 file changed, 1 insertion(+), 15 deletions(-) diff --git a/sound/soc/ux500/mop500.c b/sound/soc/ux500/mop500.c index ba9fc099cf67..c5a9e98ddd7f 100644 --- a/sound/soc/ux500/mop500.c +++ b/sound/soc/ux500/mop500.c @@ -103,8 +103,6 @@ static int mop500_probe(struct platform_device *pdev) struct device_node *np = pdev->dev.of_node; int ret; - dev_dbg(&pdev->dev, "%s: Enter.\n", __func__); - mop500_card.dev = &pdev->dev; if (np) { @@ -113,22 +111,12 @@ static int mop500_probe(struct platform_device *pdev) return ret; } - dev_dbg(&pdev->dev, "%s: Card %s: Set platform drvdata.\n", - __func__, mop500_card.name); platform_set_drvdata(pdev, &mop500_card); snd_soc_card_set_drvdata(&mop500_card, NULL); - dev_dbg(&pdev->dev, "%s: Card %s: num_links = %d\n", - __func__, mop500_card.name, mop500_card.num_links); - dev_dbg(&pdev->dev, "%s: Card %s: DAI-link 0: name = %s\n", - __func__, mop500_card.name, mop500_card.dai_link[0].name); - dev_dbg(&pdev->dev, "%s: Card %s: DAI-link 0: stream_name = %s\n", - __func__, mop500_card.name, - mop500_card.dai_link[0].stream_name); - ret = snd_soc_register_card(&mop500_card); - if (ret) + if (ret && ret != -EPROBE_DEFER) dev_err(&pdev->dev, "Error: snd_soc_register_card failed (%d)!\n", ret); @@ -139,8 +127,6 @@ static int mop500_remove(struct platform_device *pdev) { struct snd_soc_card *mop500_card = platform_get_drvdata(pdev); - pr_debug("%s: Enter.\n", __func__); - snd_soc_unregister_card(mop500_card); mop500_ab8500_remove(mop500_card); mop500_of_node_put(); -- 2.9.3

2 3

[alsa-devel] alsa-lib: src/topology/* is GPL2
by Jordi Mallach 24 Jan '17

24 Jan '17

Hello, Today while I worked on the Debian packaging it was brought to my attention that the license governing src/topology is different to the rest of the library, and is not LGPL-2.1+ but GPL-2. Linking in libtopology is the default in alsa-lib, and as I understand it, mixing LGPL2+ + GPL2 makes the resulting binaries effectively GPL2. I am sure that was not the intention for obvious reasons. The code is © Intel Corporation, so possibly this needs to be escalated there in the first place. Jordi -- Jordi Mallach Pérez -- Debian developer http://www.debian.org/ jordi(a)sindominio.net jordi(a)debian.org http://www.sindominio.net/ GnuPG public key information available at http://oskuro.net/

2 1

[alsa-devel] [PATCH v2 00/13] ASoC: hdmi: Preparatory work to support MST audio
by jeeja.kp＠intel.com 24 Jan '17

24 Jan '17

From: Jeeja KP <jeeja.kp(a)intel.com> Display port 1.2 introduces new capability Multi-stream transport (MST) which will allow multiple stream to route to single display port where multiple monitors are connected. Multiple monitors will be connected by a MST Hub or a monitor capable of daisy-chaining. With MST support, a pin can support multiple ports and on each port a monitor can be connected. This is preparatory patch series to enable DP MST Audio by extending the current design from pin to port. o i915 acomp APIs are now used to read the ELD info and support is extended for MST port as well. o Configure port/pin/audio infoframe in widget event handlers for dynamic routing when monitor is connected/disconnected instead of DAI ops. o Use set_tdm slot to set the stream tag instead of dai params and store it in pcm context and use this in configuring the converter in widget event handler. o With MST, pin mux for CVT selection will be used to select CVT for pin-port instead of pin. So create the pin mux accordingly and update the route in skl/bxt machines. o add channel map support in bxtn machines. Note: o This patch series has dependency on the series "ASoC: Intel: Skylake: Driver updates". o This changes require UCM conf modicfication, once this series is accepted, I will post the UCM change. Changes v2: Split the patchs to smaller series. Jeeja KP (12): ASoC: hdac_hdmi: Register widget event handlers ASoC: Intel: Skylake: Use set_tdm_slot to set the dma channel ASoC: hdac_hdmi: Move channel info from pin to PCM structure ASoC: Intel: bxt: add channel map support in rt298 machine ASoC: Intel: bxt: add channel map support in bxt_da7219_max98357a machine ASoC: hdac_hdmi: Begin to add support for DP Multi-stream audio ASoC: Intel: Skylake: Add route change to rt286 machine ASoC: Intel: Skylake: Add route change to nau88l25_max98357a machine ASoC: Intel: Skylake: Add route change to nau88l25_ssm4567 machine ASoC: Intel: bxt: Add route change to rt298 machine ASoC: Intel: bxt: Add route change to da7219_max98357a machine ASoC: hdac_hdmi: Add support to handle MST capable pin Sandeep Tayal (1): ASoC: hdac_hdmi: use audio component framework to read ELD sound/soc/codecs/hdac_hdmi.c | 961 ++++++++++++------------ sound/soc/intel/boards/bxt_da7219_max98357a.c | 55 +- sound/soc/intel/boards/bxt_rt298.c | 58 +- sound/soc/intel/boards/skl_nau88l25_max98357a.c | 8 +- sound/soc/intel/boards/skl_nau88l25_ssm4567.c | 9 +- sound/soc/intel/boards/skl_rt286.c | 6 +- sound/soc/intel/skylake/skl-pcm.c | 10 +- 7 files changed, 610 insertions(+), 497 deletions(-) -- 2.5.0

3 17

[alsa-devel] [PATCH v4 0/4] Add support for es8388 and hdmi audio on the rock2
by Romain Perier 24 Jan '17

24 Jan '17

This set of patches adds a machine driver for rk3288-based boards that have the built-in HDMI audio and a generic analog output. It also adds slave mode to the es8328 driver that currently only supported the master mode. Then, it adds the required DT definitions to link rockchip-i2s to the es8388 analog output and to hdmi audio. This work is based on the initial work that was done by Sjoerd Simons <sjoerd.simons(a)collabora.co.uk> with some improvements, changes and more commits. Changes in v4: - Add support for multi codecs in the asoc machine driver, so the driver matches the hw architecture (analog and hdmi audio are connected on the same i2s line) - Renamed the driver to rk3288-hdmi-analog.c and changed its documentation - Add built-in support for hdmi audio in this driver - Add support for the property 'rockchip,routing' Changes in v3: - Cosmetic changes in rockchip_es8388.c - Added missing email to MODULE_AUTHOR in rockchip_es8388.c Changes in v2: - Fixed wrong use of the data structure i2c_device_id - Fixed wrong dependencies for SND_SOC_ROCKCHIP_ES8388 Romain Perier (4): ASoC: es8328-i2c: Add compatible for ES8388 ASoC: es8328: Add support for slave mode ASoC: rockchip: Add machine driver for RK3288 boards that use analog/HDMI arm: dts: Add support for ES8388 to the Radxa Rock 2 Documentation/devicetree/bindings/sound/es8328.txt | 2 +- .../bindings/sound/rockchip,rk3288-hdmi-analog.txt | 36 +++ arch/arm/boot/dts/rk3288-rock2-square.dts | 39 +++ sound/soc/codecs/es8328-i2c.c | 2 + sound/soc/codecs/es8328.c | 28 +- sound/soc/rockchip/Kconfig | 10 + sound/soc/rockchip/Makefile | 2 + sound/soc/rockchip/rk3288_hdmi_analog.c | 299 +++++++++++++++++++++ 8 files changed, 411 insertions(+), 7 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/rockchip,rk3288-hdmi-analog.txt create mode 100644 sound/soc/rockchip/rk3288_hdmi_analog.c -- 2.9.3

3 11

[alsa-devel] [PATCH v4 0/5] Add support for Legacy HDMI audio drivers
by Jerome Anand 24 Jan '17

24 Jan '17

Legacy (CherryTrail/ Baytrail) HDMI audio drivers added Legacy hdmi audio-Gfx interaction/ interfacing is updated to use irq chip framework This patch series has only been tested on hardware with a single HDMI connector/pipe and additional work may be needed for newer machines with 2 connectors Jerome Anand (5): drm/i915: setup bridge for HDMI LPE audio driver drm/i915: Add support for audio driver notifications ALSA: add Intel HDMI LPE audio driver for BYT/CHT-T ALSA: x86: hdmi: Add audio support for BYT and CHT ALSA: x86: hdmi: continue playback even when display resolution changes Documentation/gpu/i915.rst | 9 + drivers/gpu/drm/i915/Makefile | 3 + drivers/gpu/drm/i915/i915_drv.c | 8 +- drivers/gpu/drm/i915/i915_drv.h | 17 + drivers/gpu/drm/i915/i915_irq.c | 16 + drivers/gpu/drm/i915/i915_reg.h | 3 + drivers/gpu/drm/i915/intel_audio.c | 8 + drivers/gpu/drm/i915/intel_hdmi.c | 1 + drivers/gpu/drm/i915/intel_lpe_audio.c | 388 +++++++ include/drm/intel_lpe_audio.h | 46 + sound/Kconfig | 2 + sound/Makefile | 2 +- sound/x86/Kconfig | 15 + sound/x86/Makefile | 6 + sound/x86/intel_hdmi_audio.c | 1870 ++++++++++++++++++++++++++++++++ sound/x86/intel_hdmi_audio.h | 197 ++++ sound/x86/intel_hdmi_audio_if.c | 551 ++++++++++ sound/x86/intel_hdmi_lpe_audio.c | 617 +++++++++++ sound/x86/intel_hdmi_lpe_audio.h | 683 ++++++++++++ 19 files changed, 4439 insertions(+), 3 deletions(-) create mode 100644 drivers/gpu/drm/i915/intel_lpe_audio.c create mode 100644 include/drm/intel_lpe_audio.h create mode 100644 sound/x86/Kconfig create mode 100644 sound/x86/Makefile create mode 100644 sound/x86/intel_hdmi_audio.c create mode 100644 sound/x86/intel_hdmi_audio.h create mode 100644 sound/x86/intel_hdmi_audio_if.c create mode 100644 sound/x86/intel_hdmi_lpe_audio.c create mode 100644 sound/x86/intel_hdmi_lpe_audio.h -- 2.9.3 base-commit: eb5c556a1e5eff388e48e4b7cf61e95783019e83

5 15

[alsa-devel] [PATCH v2] ASoC: mxs-saif: add mclk enable/disable ops
by Mans Rullgard 23 Jan '17

23 Jan '17

This makes normal clk_enable/disable() calls on mxs_saif_mclk work as expected, i.e. actually turn the mclk output on or (when safe) off. The existing mxs_saif_get/put_mclk() functions are rewritten to use common clk operations on mxs_saif_mclk rather than accessing registers directly. With these changes mxs-saif can be used together with the simple-card driver. Signed-off-by: Mans Rullgard <mans(a)mansr.com> --- v2: add #include <linux/clk-provider.h> needed by some configs --- sound/soc/mxs/mxs-saif.c | 144 +++++++++++++++++++++++++++++++---------------- sound/soc/mxs/mxs-saif.h | 3 + 2 files changed, 99 insertions(+), 48 deletions(-) diff --git a/sound/soc/mxs/mxs-saif.c b/sound/soc/mxs/mxs-saif.c index a002ab892772..7c620399f96b 100644 --- a/sound/soc/mxs/mxs-saif.c +++ b/sound/soc/mxs/mxs-saif.c @@ -204,27 +204,15 @@ static int mxs_saif_set_clk(struct mxs_saif *saif, */ int mxs_saif_put_mclk(unsigned int saif_id) { - struct mxs_saif *saif = mxs_saif[saif_id]; - u32 stat; + struct clk *clk; - if (!saif) - return -EINVAL; + clk = clk_get(NULL, "mxs_saif_mclk"); + if (IS_ERR(clk)) + return PTR_ERR(clk); - stat = __raw_readl(saif->base + SAIF_STAT); - if (stat & BM_SAIF_STAT_BUSY) { - dev_err(saif->dev, "error: busy\n"); - return -EBUSY; - } + clk_disable_unprepare(clk); + clk_put(clk); - clk_disable_unprepare(saif->clk); - - /* disable MCLK output */ - __raw_writel(BM_SAIF_CTRL_CLKGATE, - saif->base + SAIF_CTRL + MXS_SET_ADDR); - __raw_writel(BM_SAIF_CTRL_RUN, - saif->base + SAIF_CTRL + MXS_CLR_ADDR); - - saif->mclk_in_use = 0; return 0; } EXPORT_SYMBOL_GPL(mxs_saif_put_mclk); @@ -239,47 +227,33 @@ int mxs_saif_get_mclk(unsigned int saif_id, unsigned int mclk, unsigned int rate) { struct mxs_saif *saif = mxs_saif[saif_id]; - u32 stat; int ret; struct mxs_saif *master_saif; + struct clk *clk; if (!saif) return -EINVAL; - /* Clear Reset */ - __raw_writel(BM_SAIF_CTRL_SFTRST, - saif->base + SAIF_CTRL + MXS_CLR_ADDR); - - /* FIXME: need clear clk gate for register r/w */ - __raw_writel(BM_SAIF_CTRL_CLKGATE, - saif->base + SAIF_CTRL + MXS_CLR_ADDR); - master_saif = mxs_saif_get_master(saif); if (saif != master_saif) { dev_err(saif->dev, "can not get mclk from a non-master saif\n"); return -EINVAL; } - stat = __raw_readl(saif->base + SAIF_STAT); - if (stat & BM_SAIF_STAT_BUSY) { - dev_err(saif->dev, "error: busy\n"); - return -EBUSY; - } + clk = clk_get(NULL, "mxs_saif_mclk"); + if (IS_ERR(clk)) + return PTR_ERR(clk); + + ret = clk_prepare_enable(clk); + if (ret) + goto out; - saif->mclk_in_use = 1; ret = mxs_saif_set_clk(saif, mclk, rate); - if (ret) - return ret; - ret = clk_prepare_enable(saif->clk); - if (ret) - return ret; +out: + clk_put(clk); - /* enable MCLK output */ - __raw_writel(BM_SAIF_CTRL_RUN, - saif->base + SAIF_CTRL + MXS_SET_ADDR); - - return 0; + return ret; } EXPORT_SYMBOL_GPL(mxs_saif_get_mclk); @@ -687,18 +661,92 @@ static irqreturn_t mxs_saif_irq(int irq, void *dev_id) return IRQ_HANDLED; } +#define to_mxs_saif(c) container_of(c, struct mxs_saif, div_clk.hw) + +static int mxs_saif_mclk_enable(struct clk_hw *hw) +{ + struct mxs_saif *saif = to_mxs_saif(hw); + + /* Clear Reset */ + __raw_writel(BM_SAIF_CTRL_SFTRST, + saif->base + SAIF_CTRL + MXS_CLR_ADDR); + + /* Clear clk gate */ + __raw_writel(BM_SAIF_CTRL_CLKGATE, + saif->base + SAIF_CTRL + MXS_CLR_ADDR); + + /* enable MCLK output */ + __raw_writel(BM_SAIF_CTRL_RUN, + saif->base + SAIF_CTRL + MXS_SET_ADDR); + + saif->mclk_in_use = 1; + + return 0; +} + +static void mxs_saif_mclk_disable(struct clk_hw *hw) +{ + struct mxs_saif *saif = to_mxs_saif(hw); + + if (!saif->ongoing) + __raw_writel(BM_SAIF_CTRL_RUN, + saif->base + SAIF_CTRL + MXS_CLR_ADDR); + + saif->mclk_in_use = 0; +} + +static unsigned long mxs_saif_mclk_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + return clk_divider_ops.recalc_rate(hw, parent_rate); +} + +static long mxs_saif_mclk_round_rate(struct clk_hw *hw, unsigned long rate, + unsigned long *parent_rate) +{ + return clk_divider_ops.round_rate(hw, rate, parent_rate); +} + +static int mxs_saif_mclk_set_rate(struct clk_hw *hw, unsigned long rate, + unsigned long parent_rate) +{ + return clk_divider_ops.set_rate(hw, rate, parent_rate); +} + +static const struct clk_ops mxs_saif_mclk_ops = { + .enable = mxs_saif_mclk_enable, + .disable = mxs_saif_mclk_disable, + .recalc_rate = mxs_saif_mclk_recalc_rate, + .round_rate = mxs_saif_mclk_round_rate, + .set_rate = mxs_saif_mclk_set_rate, +}; + static int mxs_saif_mclk_init(struct platform_device *pdev) { struct mxs_saif *saif = platform_get_drvdata(pdev); struct device_node *np = pdev->dev.of_node; + struct clk_init_data init; + struct clk_divider *div; struct clk *clk; + const char *parent_name; int ret; - clk = clk_register_divider(&pdev->dev, "mxs_saif_mclk", - __clk_get_name(saif->clk), 0, - saif->base + SAIF_CTRL, - BP_SAIF_CTRL_BITCLK_MULT_RATE, 3, - 0, NULL); + parent_name = __clk_get_name(saif->clk); + + init.name = "mxs_saif_mclk"; + init.ops = &mxs_saif_mclk_ops; + init.flags = CLK_GET_RATE_NOCACHE | CLK_IS_BASIC; + init.parent_names = &parent_name; + init.num_parents = 1; + + div = &saif->div_clk; + div->reg = saif->base + SAIF_CTRL; + div->shift = BP_SAIF_CTRL_BITCLK_MULT_RATE; + div->width = 3; + div->flags = CLK_DIVIDER_POWER_OF_TWO; + div->hw.init = &init; + + clk = clk_register(&pdev->dev, &div->hw); if (IS_ERR(clk)) { ret = PTR_ERR(clk); if (ret == -EEXIST) diff --git a/sound/soc/mxs/mxs-saif.h b/sound/soc/mxs/mxs-saif.h index 9a4c0b291b9e..e1bb5cb00ec0 100644 --- a/sound/soc/mxs/mxs-saif.h +++ b/sound/soc/mxs/mxs-saif.h @@ -108,6 +108,7 @@ #define MXS_SAIF_MCLK 0 +#include <linux/clk-provider.h> #include "mxs-pcm.h" struct mxs_saif { @@ -128,6 +129,8 @@ struct mxs_saif { MXS_SAIF_STATE_STOPPED, MXS_SAIF_STATE_RUNNING, } state; + + struct clk_divider div_clk; }; extern int mxs_saif_put_mclk(unsigned int saif_id); -- 2.11.0

3 2

Re: [alsa-devel] [PATCH v3 1/2] ASoC: cs35l35: Add support for Cirrus CS35L35 Amplifier
by Charles Keepax 23 Jan '17

23 Jan '17

On Mon, Jan 23, 2017 at 08:02:34AM -0600, Brian Austin wrote: > On Wed, 21 Dec 2016, Charles Keepax wrote: > > > + break; > > > + case SND_SOC_DAIFMT_PDM: > > > + cs35l35->pdm_mode = true; > > > + cs35l35->i2s_mode = false; > > > > Feels a bit redundant to have both of these if they are only ever > > a logical inversion of each other. > Certain features are only available in these modes and once TDM is added > will make it easier to adjust settings based on mode <snip> > > > + }; > > > + } else { > > > + /* Only certain ratios supported in I2S MASTER Mode */ > > > + switch (sp_sclks) { > > > + case CS35L35_SP_SCLKS_32FS: > > > + case CS35L35_SP_SCLKS_64FS: > > > + break; > > > + default: > > > + dev_err(codec->dev, "ratio not supported\n"); > > > + return -EINVAL; > > > + }; > > > + } > > > + ret = regmap_update_bits(cs35l35->regmap, > > > + CS35L35_CLK_CTL3, CS35L35_SP_SCLKS_MASK, > > > + sp_sclks << CS35L35_SP_SCLKS_SHIFT); > > > + if (ret != 0) { > > > + dev_err(codec->dev, "Failed to set fsclk %d\n", ret); > > > + return ret; > > > + } > > > + } > > > + if (cs35l35->pdm_mode) { > > > + regmap_update_bits(cs35l35->regmap, CS35L35_AMP_INP_DRV_CTL, > > > + CS35L35_PDM_MODE_MASK, 1 << CS35L35_PDM_MODE_SHIFT); > > > + } else { > > > + regmap_update_bits(cs35l35->regmap, CS35L35_AMP_INP_DRV_CTL, > > > + CS35L35_PDM_MODE_MASK, 0 << CS35L35_PDM_MODE_SHIFT); > > > + } > > > > This if could be combined with the one above since pdm_mode == > > !i2s_mode. > > Got it thanks Probably best to ignore that comment given you mention the addition of more flags and the potential for these to no longer just be an inversion of each other in the future. > > > + > > > + if (cs35l35->pdata.bst_ipk) > > > + regmap_update_bits(cs35l35->regmap, CS35L35_BST_PEAK_I, > > > + CS35L35_BST_IPK_MASK, > > > + cs35l35->pdata.bst_ipk << CS35L35_BST_IPK_SHIFT); > > > > I believe zero is a valid value for this field, but not the > > default. Are we happy that the user can never set this value? > > > So here I can just AND in a set high bit that way the check will show true > even if 0. Isn't that what we thought would be the easiest? Yeah seems easiest to me. > > > + if (classh->classh_algo_enable) { > > > + if (classh->classh_bst_override) > > > + regmap_update_bits(cs35l35->regmap, > > > + CS35L35_CLASS_H_CTL, CS35L35_CH_BST_OVR_MASK, > > > + classh->classh_bst_override << CS35L35_CH_BST_OVR_SHIFT); > > > + if (classh->classh_bst_max_limit) > > > + regmap_update_bits(cs35l35->regmap, > > > + CS35L35_CLASS_H_CTL, CS35L35_CH_BST_LIM_MASK, > > > + classh->classh_bst_max_limit << CS35L35_CH_BST_LIM_SHIFT); > > > > This is a single bit, but the default bit is 1, so this code can > > never change the value of the field. > This one and the rest apply to previous statement correct? > Yeah would cover this one too. Thanks, Charles

1 0

[alsa-devel] [PATCH] ALSA: hda/patch_sigmatel: Add AmigaOne X1000 pin configs
by Darren Stevens 23 Jan '17

23 Jan '17

The AmigaOne X1000 has a Sigmatel STAC92HD700 attached to the HD Audio on an ATI SB600. Add the required settings to enable sound. Signed-off-by: Darren Stevens <darren(a)stevens-zone.net> --- diff --git a/sound/pci/hda/patch_sigmatel.c b/sound/pci/hda/patch_sigmatel.c index 37b70f8..51947a6 100644 --- a/sound/pci/hda/patch_sigmatel.c +++ b/sound/pci/hda/patch_sigmatel.c @@ -166,6 +166,7 @@ enum { STAC_D965_VERBS, STAC_DELL_3ST, STAC_DELL_BIOS, + STAC_NEMO_DEFAULT, STAC_DELL_BIOS_AMIC, STAC_DELL_BIOS_SPDIF, STAC_927X_DELL_DMIC, @@ -1360,6 +1361,23 @@ static int stac_create_spdif_mux_ctls(struct hda_codec *codec) {} }; +static const struct hda_pintbl nemo_pin_configs[] = { + { 0x0a, 0x02214020 }, + { 0x0b, 0x02A19080 }, + { 0x0c, 0x0181304E }, + { 0x0d, 0x01014010 }, + { 0x0e, 0x01A19040 }, + { 0x0f, 0x01011012 }, + { 0x10, 0x01016011 }, + { 0x11, 0x01012014 }, + { 0x12, 0x103301F0 }, + { 0x13, 0x00000000 }, + { 0x14, 0x00000000 }, + { 0x21, 0x01442170 }, + { 0x22, 0x00000000 }, + { 0x23, 0x00000000 }, + {} +}; static void stac9200_fixup_panasonic(struct hda_codec *codec, const struct hda_fixup *fix, int action) @@ -3883,6 +3901,10 @@ static void stac927x_fixup_volknob(struct hda_codec *codec, .type = HDA_FIXUP_PINS, .v.pins = d965_5st_no_fp_pin_configs, }, + [STAC_NEMO_DEFAULT] = { + .type = HDA_FIXUP_PINS, + .v.pins = nemo_pin_configs, + }, [STAC_DELL_3ST] = { .type = HDA_FIXUP_PINS, .v.pins = dell_3st_pin_configs, @@ -3939,6 +3961,7 @@ static void stac927x_fixup_volknob(struct hda_codec *codec, { .id = STAC_D965_5ST_NO_FP, .name = "5stack-no-fp" }, { .id = STAC_DELL_3ST, .name = "dell-3stack" }, { .id = STAC_DELL_BIOS, .name = "dell-bios" }, + { .id = STAC_NEMO_DEFAULT, .name = "nemo-default" }, { .id = STAC_DELL_BIOS_AMIC, .name = "dell-bios-amic" }, { .id = STAC_927X_VOLKNOB, .name = "volknob" }, {} @@ -3977,6 +4000,8 @@ static void stac927x_fixup_volknob(struct hda_codec *codec, "Intel D965", STAC_D965_5ST), SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500, "Intel D965", STAC_D965_5ST), + /* Nemo */ + SND_PCI_QUIRK(0x1888, 0x1000, "AmigaOne X1000", STAC_NEMO_DEFAULT), /* volume-knob fixes */ SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB), {} /* terminator */ @@ -5036,6 +5061,7 @@ static int patch_stac9872(struct hda_codec *codec) HDA_CODEC_ENTRY(0x83847683, "STAC9221D A2", patch_stac922x), HDA_CODEC_ENTRY(0x83847618, "STAC9227", patch_stac927x), HDA_CODEC_ENTRY(0x83847619, "STAC9227", patch_stac927x), + HDA_CODEC_ENTRY(0x83847638, "STAC92HD700", patch_stac927x), HDA_CODEC_ENTRY(0x83847616, "STAC9228", patch_stac927x), HDA_CODEC_ENTRY(0x83847617, "STAC9228", patch_stac927x), HDA_CODEC_ENTRY(0x83847614, "STAC9229", patch_stac927x),

2 1

[alsa-devel] [PATCH v3 1/2] ASoC: cs35l35: Add support for Cirrus CS35L35 Amplifier
by Li Xu 23 Jan '17

23 Jan '17

Add driver support for Cirrus Logic CS35L35 boosted speaker amplifier Signed-off-by: Li Xu <li.xu(a)cirrus.com> --- include/sound/cs35l35.h | 104 ++++ sound/soc/codecs/Kconfig | 5 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/cs35l35.c | 1359 ++++++++++++++++++++++++++++++++++++++++++++ sound/soc/codecs/cs35l35.h | 285 ++++++++++ 5 files changed, 1755 insertions(+) create mode 100644 include/sound/cs35l35.h create mode 100644 sound/soc/codecs/cs35l35.c create mode 100644 sound/soc/codecs/cs35l35.h diff --git a/include/sound/cs35l35.h b/include/sound/cs35l35.h new file mode 100644 index 0000000..005a813 --- /dev/null +++ b/include/sound/cs35l35.h @@ -0,0 +1,104 @@ +/* + * linux/sound/cs35l35.h -- Platform data for CS35l35 + * + * Copyright (c) 2016 Cirrus Logic Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __CS35L35_H +#define __CS35L35_H + +struct classh_cfg { + /* + * Class H Algorithm Control Variables + * You can either have it done + * automatically or you can adjust + * these variables for tuning + * + * if you do not enable the internal algorithm + * you will get a set of mixer controls for + * Class H tuning + * + * Section 4.3 of the datasheet + */ + /* Internal ClassH Algorithm */ + bool classh_bst_override; + bool classh_algo_enable; + int classh_bst_max_limit; + int classh_mem_depth; + int classh_release_rate; + int classh_headroom; + int classh_wk_fet_disable; + int classh_wk_fet_delay; + int classh_wk_fet_thld; + int classh_vpch_auto; + int classh_vpch_rate; + int classh_vpch_man; +}; + +struct monitor_cfg { + /* + * Signal Monitor Data + * highly configurable signal monitoring + * data positioning and different types of + * monitoring data. + * + * Section 4.8.2 - 4.8.4 of the datasheet + */ + bool is_present; + bool imon_specs; + bool vmon_specs; + bool vpmon_specs; + bool vbstmon_specs; + bool vpbrstat_specs; + bool zerofill_specs; + u8 imon_dpth; + u8 imon_loc; + u8 imon_frm; + u8 vmon_dpth; + u8 vmon_loc; + u8 vmon_frm; + u8 vpmon_dpth; + u8 vpmon_loc; + u8 vpmon_frm; + u8 vbstmon_dpth; + u8 vbstmon_loc; + u8 vbstmon_frm; + u8 vpbrstat_dpth; + u8 vpbrstat_loc; + u8 vpbrstat_frm; + u8 zerofill_dpth; + u8 zerofill_loc; + u8 zerofill_frm; +}; + +struct cs35l35_platform_data { + + /* Stereo (2 Device) */ + bool stereo; + /* serial port drive strength */ + int sp_drv_str; + /* Boost Power Down with FET */ + bool bst_pdn_fet_on; + /* Boost Voltage : used if ClassH Algo Enabled */ + int bst_vctl; + /* Boost Converter Peak Current CTRL */ + int bst_ipk; + /* Amp Gain Zero Cross */ + bool gain_zc; + /* Audio Input Location */ + int aud_channel; + /* Advisory Input Location */ + int adv_channel; + /* Shared Boost for stereo */ + bool shared_bst; + /* ClassH Algorithm */ + struct classh_cfg classh_algo; + /* Monitor Config */ + struct monitor_cfg mon_cfg; +}; + +#endif /* __CS35L35_H */ diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index 9e1718a..3fd0a08 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -49,6 +49,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_CS35L32 if I2C select SND_SOC_CS35L33 if I2C select SND_SOC_CS35L34 if I2C + select SND_SOC_CS35L35 if I2C select SND_SOC_CS42L42 if I2C select SND_SOC_CS42L51_I2C if I2C select SND_SOC_CS42L52 if I2C && INPUT @@ -407,6 +408,10 @@ config SND_SOC_CS35L34 tristate "Cirrus Logic CS35L34 CODEC" depends on I2C +config SND_SOC_CS35L35 + tristate "Cirrus Logic CS35L35 CODEC" + depends on I2C + config SND_SOC_CS42L42 tristate "Cirrus Logic CS42L42 CODEC" depends on I2C diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index 7e1dad7..a5622f6 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -39,6 +39,7 @@ snd-soc-cq93vc-objs := cq93vc.o snd-soc-cs35l32-objs := cs35l32.o snd-soc-cs35l33-objs := cs35l33.o snd-soc-cs35l34-objs := cs35l34.o +snd-soc-cs35l35-objs := cs35l35.o snd-soc-cs42l42-objs := cs42l42.o snd-soc-cs42l51-objs := cs42l51.o snd-soc-cs42l51-i2c-objs := cs42l51-i2c.o @@ -268,6 +269,7 @@ obj-$(CONFIG_SND_SOC_CQ0093VC) += snd-soc-cq93vc.o obj-$(CONFIG_SND_SOC_CS35L32) += snd-soc-cs35l32.o obj-$(CONFIG_SND_SOC_CS35L33) += snd-soc-cs35l33.o obj-$(CONFIG_SND_SOC_CS35L34) += snd-soc-cs35l34.o +obj-$(CONFIG_SND_SOC_CS35L35) += snd-soc-cs35l35.o obj-$(CONFIG_SND_SOC_CS42L42) += snd-soc-cs42l42.o obj-$(CONFIG_SND_SOC_CS42L51) += snd-soc-cs42l51.o obj-$(CONFIG_SND_SOC_CS42L51_I2C) += snd-soc-cs42l51-i2c.o diff --git a/sound/soc/codecs/cs35l35.c b/sound/soc/codecs/cs35l35.c new file mode 100644 index 0000000..dca4920 --- /dev/null +++ b/sound/soc/codecs/cs35l35.c @@ -0,0 +1,1359 @@ +/* + * cs35l35.c -- CS35L35 ALSA SoC audio driver + * + * Copyright 2016 Cirrus Logic, Inc. + * + * Author: Brian Austin <brian.austin(a)cirrus.com> + * Li Xu <li.xu(a)cirrus.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include <linux/module.h> +#include <linux/moduleparam.h> +#include <linux/version.h> +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/delay.h> +#include <linux/i2c.h> +#include <linux/slab.h> +#include <linux/workqueue.h> +#include <linux/platform_device.h> +#include <linux/regulator/consumer.h> +#include <linux/gpio/consumer.h> +#include <linux/of_device.h> +#include <linux/of_gpio.h> +#include <linux/regmap.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/soc.h> +#include <sound/soc-dapm.h> +#include <linux/gpio.h> +#include <sound/initval.h> +#include <sound/tlv.h> +#include <sound/cs35l35.h> +#include <linux/of_irq.h> +#include <linux/completion.h> + +#include "cs35l35.h" + +static const struct reg_default cs35l35_reg[] = { + {CS35L35_PWRCTL1, 0x01}, + {CS35L35_PWRCTL2, 0x11}, + {CS35L35_PWRCTL3, 0x00}, + {CS35L35_CLK_CTL1, 0x04}, + {CS35L35_CLK_CTL2, 0x10}, + {CS35L35_CLK_CTL3, 0xCF}, + {CS35L35_SP_FMT_CTL1, 0x20}, + {CS35L35_SP_FMT_CTL2, 0x00}, + {CS35L35_SP_FMT_CTL3, 0x02}, + {CS35L35_MAG_COMP_CTL, 0x00}, + {CS35L35_AMP_INP_DRV_CTL, 0x01}, + {CS35L35_AMP_DIG_VOL_CTL, 0x12}, + {CS35L35_AMP_DIG_VOL, 0x00}, + {CS35L35_ADV_DIG_VOL, 0x00}, + {CS35L35_PROTECT_CTL, 0x06}, + {CS35L35_AMP_GAIN_AUD_CTL, 0x13}, + {CS35L35_AMP_GAIN_PDM_CTL, 0x00}, + {CS35L35_AMP_GAIN_ADV_CTL, 0x00}, + {CS35L35_GPI_CTL, 0x00}, + {CS35L35_BST_CVTR_V_CTL, 0x00}, + {CS35L35_BST_PEAK_I, 0x07}, + {CS35L35_BST_RAMP_CTL, 0x85}, + {CS35L35_BST_CONV_COEF_1, 0x20}, + {CS35L35_BST_CONV_COEF_2, 0x20}, + {CS35L35_BST_CONV_SLOPE_COMP, 0x47}, + {CS35L35_BST_CONV_SW_FREQ, 0x04}, + {CS35L35_CLASS_H_CTL, 0x0B}, + {CS35L35_CLASS_H_HEADRM_CTL, 0x0B}, + {CS35L35_CLASS_H_RELEASE_RATE, 0x08}, + {CS35L35_CLASS_H_FET_DRIVE_CTL, 0x41}, + {CS35L35_CLASS_H_VP_CTL, 0xC5}, + {CS35L35_VPBR_CTL, 0x0A}, + {CS35L35_VPBR_VOL_CTL, 0x09}, + {CS35L35_VPBR_TIMING_CTL, 0x6A}, + {CS35L35_VPBR_MODE_VOL_CTL, 0x00}, + {CS35L35_SPKR_MON_CTL, 0xC0}, + {CS35L35_IMON_SCALE_CTL, 0x30}, + {CS35L35_AUDIN_RXLOC_CTL, 0x00}, + {CS35L35_ADVIN_RXLOC_CTL, 0x80}, + {CS35L35_VMON_TXLOC_CTL, 0x00}, + {CS35L35_IMON_TXLOC_CTL, 0x80}, + {CS35L35_VPMON_TXLOC_CTL, 0x04}, + {CS35L35_VBSTMON_TXLOC_CTL, 0x84}, + {CS35L35_VPBR_STATUS_TXLOC_CTL, 0x04}, + {CS35L35_ZERO_FILL_LOC_CTL, 0x00}, + {CS35L35_AUDIN_DEPTH_CTL, 0x0F}, + {CS35L35_SPKMON_DEPTH_CTL, 0x0F}, + {CS35L35_SUPMON_DEPTH_CTL, 0x0F}, + {CS35L35_ZEROFILL_DEPTH_CTL, 0x00}, + {CS35L35_MULT_DEV_SYNCH1, 0x02}, + {CS35L35_MULT_DEV_SYNCH2, 0x80}, + {CS35L35_PROT_RELEASE_CTL, 0x00}, + {CS35L35_DIAG_MODE_REG_LOCK, 0x00}, + {CS35L35_DIAG_MODE_CTL_1, 0x40}, + {CS35L35_DIAG_MODE_CTL_2, 0x00}, + {CS35L35_INT_MASK_1, 0xFF}, + {CS35L35_INT_MASK_2, 0xFF}, + {CS35L35_INT_MASK_3, 0xFF}, + {CS35L35_INT_MASK_4, 0xFF}, + +}; + +static bool cs35l35_volatile_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case CS35L35_INT_STATUS_1: + case CS35L35_INT_STATUS_2: + case CS35L35_INT_STATUS_3: + case CS35L35_INT_STATUS_4: + case CS35L35_PLL_STATUS: + case CS35L35_OTP_TRIM_STATUS: + return true; + default: + return false; + } +} + +static bool cs35l35_readable_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case CS35L35_DEVID_AB ... CS35L35_PWRCTL3: + case CS35L35_CLK_CTL1 ... CS35L35_SP_FMT_CTL3: + case CS35L35_MAG_COMP_CTL ... CS35L35_AMP_GAIN_AUD_CTL: + case CS35L35_AMP_GAIN_PDM_CTL ... CS35L35_BST_PEAK_I: + case CS35L35_BST_RAMP_CTL ... CS35L35_BST_CONV_SW_FREQ: + case CS35L35_CLASS_H_CTL ... CS35L35_CLASS_H_VP_CTL: + case CS35L35_CLASS_H_STATUS: + case CS35L35_VPBR_CTL ... CS35L35_VPBR_MODE_VOL_CTL: + case CS35L35_VPBR_ATTEN_STATUS: + case CS35L35_SPKR_MON_CTL: + case CS35L35_IMON_SCALE_CTL ... CS35L35_ZEROFILL_DEPTH_CTL: + case CS35L35_MULT_DEV_SYNCH1 ... CS35L35_PROT_RELEASE_CTL: + case CS35L35_DIAG_MODE_REG_LOCK ... CS35L35_DIAG_MODE_CTL_2: + case CS35L35_INT_MASK_1 ... CS35L35_PLL_STATUS: + case CS35L35_OTP_TRIM_STATUS: + return true; + default: + return false; + } +} + +static bool cs35l35_precious_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case CS35L35_INT_STATUS_1: + case CS35L35_INT_STATUS_2: + case CS35L35_INT_STATUS_3: + case CS35L35_INT_STATUS_4: + case CS35L35_PLL_STATUS: + case CS35L35_OTP_TRIM_STATUS: + return true; + default: + return false; + } +} + +static int cs35l35_sdin_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); + struct cs35l35_private *cs35l35 = snd_soc_codec_get_drvdata(codec); + int ret = 0; + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + regmap_update_bits(cs35l35->regmap, CS35L35_CLK_CTL1, + CS35L35_MCLK_DIS_MASK, 0 << CS35L35_MCLK_DIS_SHIFT); + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL1, + CS35L35_DISCHG_FILT_MASK, 0 << CS35L35_DISCHG_FILT_SHIFT); + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL1, + CS35L35_PDN_ALL_MASK, 0); + break; + case SND_SOC_DAPM_POST_PMD: + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL1, + CS35L35_PDN_ALL_MASK, 1); + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL1, + CS35L35_DISCHG_FILT_MASK, 1 << CS35L35_DISCHG_FILT_SHIFT); + + ret = wait_for_completion_timeout(&cs35l35->pdn_done, + msecs_to_jiffies(100)); + if (ret == 0) { + dev_err(codec->dev, "TIMEOUT PDN_DONE did not complete in 100ms\n"); + ret = -ETIMEDOUT; + } + + regmap_update_bits(cs35l35->regmap, CS35L35_CLK_CTL1, + CS35L35_MCLK_DIS_MASK, 1 << CS35L35_MCLK_DIS_SHIFT); + break; + default: + dev_err(codec->dev, "Invalid event = 0x%x\n", event); + ret = -EINVAL; + } + return ret; +} + +static int cs35l35_main_amp_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); + struct cs35l35_private *cs35l35 = snd_soc_codec_get_drvdata(codec); + unsigned int reg[4]; + int i; + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + if (cs35l35->pdata.bst_pdn_fet_on) + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL2, + CS35L35_PDN_BST_MASK, 0 << CS35L35_PDN_BST_FETON_SHIFT); + else + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL2, + CS35L35_PDN_BST_MASK, 0 << CS35L35_PDN_BST_FETOFF_SHIFT); + regmap_update_bits(cs35l35->regmap, CS35L35_PROTECT_CTL, + CS35L35_AMP_MUTE_MASK, 0 << CS35L35_AMP_MUTE_SHIFT); + break; + case SND_SOC_DAPM_POST_PMU: + usleep_range(5000, 5100); + /* If PDM mode we must use VP + * for Voltage control + */ + if (cs35l35->pdm_mode) + regmap_update_bits(cs35l35->regmap, + CS35L35_BST_CVTR_V_CTL, CS35L35_BST_CTL_MASK, + 0 << CS35L35_BST_CTL_SHIFT); + for (i = 0; i < 2; i++) + regmap_bulk_read(cs35l35->regmap, CS35L35_INT_STATUS_1, + &reg, ARRAY_SIZE(reg)); + break; + case SND_SOC_DAPM_PRE_PMD: + regmap_update_bits(cs35l35->regmap, CS35L35_PROTECT_CTL, + CS35L35_AMP_MUTE_MASK, 1 << CS35L35_AMP_MUTE_SHIFT); + if (cs35l35->pdata.bst_pdn_fet_on) + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL2, + CS35L35_PDN_BST_MASK, 1 << CS35L35_PDN_BST_FETON_SHIFT); + else + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL2, + CS35L35_PDN_BST_MASK, 1 << CS35L35_PDN_BST_FETOFF_SHIFT); + break; + case SND_SOC_DAPM_POST_PMD: + usleep_range(5000, 5100); + /* If PDM mode we should switch back to pdata value + * for Voltage control when we go down + */ + if (cs35l35->pdm_mode) + regmap_update_bits(cs35l35->regmap, + CS35L35_BST_CVTR_V_CTL, CS35L35_BST_CTL_MASK, + cs35l35->pdata.bst_vctl << CS35L35_BST_CTL_SHIFT); + + break; + default: + dev_err(codec->dev, "Invalid event = 0x%x\n", event); + } + return 0; +} + +static DECLARE_TLV_DB_SCALE(amp_gain_tlv, 0, 1, 1); +static DECLARE_TLV_DB_SCALE(dig_vol_tlv, -10200, 50, 0); + +static const struct snd_kcontrol_new cs35l35_aud_controls[] = { + SOC_SINGLE_SX_TLV("Digital Audio Volume", CS35L35_AMP_DIG_VOL, + 0, 0x34, 0xE4, dig_vol_tlv), + SOC_SINGLE_TLV("AMP Audio Gain", CS35L35_AMP_GAIN_AUD_CTL, 0, 19, 0, + amp_gain_tlv), + SOC_SINGLE_TLV("AMP PDM Gain", CS35L35_AMP_GAIN_PDM_CTL, 0, 19, 0, + amp_gain_tlv), +}; + +static const struct snd_kcontrol_new cs35l35_adv_controls[] = { + SOC_SINGLE_SX_TLV("Digital Advisory Volume", CS35L35_ADV_DIG_VOL, + 0, 0x34, 0xE4, dig_vol_tlv), + SOC_SINGLE_TLV("AMP Advisory Gain", CS35L35_AMP_GAIN_ADV_CTL, 0, 19, 0, + amp_gain_tlv), +}; + +static const struct snd_soc_dapm_widget cs35l35_dapm_widgets[] = { + SND_SOC_DAPM_AIF_IN_E("SDIN", NULL, 0, CS35L35_PWRCTL3, 1, 1, + cs35l35_sdin_event, SND_SOC_DAPM_PRE_PMU | + SND_SOC_DAPM_POST_PMD), + SND_SOC_DAPM_AIF_OUT("SDOUT", NULL, 0, CS35L35_PWRCTL3, 2, 1), + + SND_SOC_DAPM_OUTPUT("SPK"), + + SND_SOC_DAPM_INPUT("VP"), + SND_SOC_DAPM_INPUT("VBST"), + SND_SOC_DAPM_INPUT("ISENSE"), + SND_SOC_DAPM_INPUT("VSENSE"), + + SND_SOC_DAPM_ADC("VMON ADC", NULL, CS35L35_PWRCTL2, 7, 1), + SND_SOC_DAPM_ADC("IMON ADC", NULL, CS35L35_PWRCTL2, 6, 1), + SND_SOC_DAPM_ADC("VPMON ADC", NULL, CS35L35_PWRCTL3, 3, 1), + SND_SOC_DAPM_ADC("VBSTMON ADC", NULL, CS35L35_PWRCTL3, 4, 1), + SND_SOC_DAPM_ADC("CLASS H", NULL, CS35L35_PWRCTL2, 5, 1), + + SND_SOC_DAPM_OUT_DRV_E("Main AMP", CS35L35_PWRCTL2, 0, 1, NULL, 0, + cs35l35_main_amp_event, SND_SOC_DAPM_PRE_PMU | + SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU | + SND_SOC_DAPM_PRE_PMD), +}; + +static const struct snd_soc_dapm_route cs35l35_audio_map[] = { + {"VPMON ADC", NULL, "VP"}, + {"VBSTMON ADC", NULL, "VBST"}, + {"IMON ADC", NULL, "ISENSE"}, + {"VMON ADC", NULL, "VSENSE"}, + {"SDOUT", NULL, "IMON ADC"}, + {"SDOUT", NULL, "VMON ADC"}, + {"SDOUT", NULL, "VBSTMON ADC"}, + {"SDOUT", NULL, "VPMON ADC"}, + {"AMP Capture", NULL, "SDOUT"}, + + {"SDIN", NULL, "AMP Playback"}, + {"CLASS H", NULL, "SDIN"}, + {"Main AMP", NULL, "CLASS H"}, + {"SPK", NULL, "Main AMP"}, +}; + +static int cs35l35_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) +{ + struct snd_soc_codec *codec = codec_dai->codec; + struct cs35l35_private *cs35l35 = snd_soc_codec_get_drvdata(codec); + + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBM_CFM: + regmap_update_bits(cs35l35->regmap, CS35L35_CLK_CTL1, + CS35L35_MS_MASK, 1 << CS35L35_MS_SHIFT); + cs35l35->slave_mode = false; + break; + case SND_SOC_DAIFMT_CBS_CFS: + regmap_update_bits(cs35l35->regmap, CS35L35_CLK_CTL1, + CS35L35_MS_MASK, 0 << CS35L35_MS_SHIFT); + cs35l35->slave_mode = true; + break; + default: + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + cs35l35->i2s_mode = true; + cs35l35->pdm_mode = false; + break; + case SND_SOC_DAIFMT_PDM: + cs35l35->pdm_mode = true; + cs35l35->i2s_mode = false; + break; + default: + return -EINVAL; + } + + return 0; +} + +struct cs35l35_sysclk_config { + int sysclk; + int srate; + u8 clk_cfg; +}; + +static struct cs35l35_sysclk_config cs35l35_clk_ctl[] = { + + /* SYSCLK, Sample Rate, Serial Port Cfg */ + {5644800, 44100, 0x00}, + {5644800, 88200, 0x40}, + {6144000, 48000, 0x10}, + {6144000, 96000, 0x50}, + {11289600, 44100, 0x01}, + {11289600, 88200, 0x41}, + {11289600, 176400, 0x81}, + {12000000, 44100, 0x03}, + {12000000, 48000, 0x13}, + {12000000, 88200, 0x43}, + {12000000, 96000, 0x53}, + {12000000, 176400, 0x83}, + {12000000, 192000, 0x93}, + {12288000, 48000, 0x11}, + {12288000, 96000, 0x51}, + {12288000, 192000, 0x91}, + {13000000, 44100, 0x07}, + {13000000, 48000, 0x17}, + {13000000, 88200, 0x47}, + {13000000, 96000, 0x57}, + {13000000, 176400, 0x87}, + {13000000, 192000, 0x97}, + {22579200, 44100, 0x02}, + {22579200, 88200, 0x42}, + {22579200, 176400, 0x82}, + {24000000, 44100, 0x0B}, + {24000000, 48000, 0x1B}, + {24000000, 88200, 0x4B}, + {24000000, 96000, 0x5B}, + {24000000, 176400, 0x8B}, + {24000000, 192000, 0x9B}, + {24576000, 48000, 0x12}, + {24576000, 96000, 0x52}, + {24576000, 192000, 0x92}, + {26000000, 44100, 0x0F}, + {26000000, 48000, 0x1F}, + {26000000, 88200, 0x4F}, + {26000000, 96000, 0x5F}, + {26000000, 176400, 0x8F}, + {26000000, 192000, 0x9F}, +}; + +static int cs35l35_get_clk_config(int sysclk, int srate) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(cs35l35_clk_ctl); i++) { + if (cs35l35_clk_ctl[i].sysclk == sysclk && + cs35l35_clk_ctl[i].srate == srate) + return cs35l35_clk_ctl[i].clk_cfg; + } + return -EINVAL; +} + +static int cs35l35_pcm_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct snd_soc_codec *codec = dai->codec; + struct cs35l35_private *cs35l35 = snd_soc_codec_get_drvdata(codec); + struct classh_cfg *classh = &cs35l35->pdata.classh_algo; + int srate = params_rate(params); + int ret = 0; + u8 sp_sclks; + int audin_format; + int errata_chk; + + int clk_ctl = cs35l35_get_clk_config(cs35l35->sysclk, srate); + + if (clk_ctl < 0) { + dev_err(codec->dev, "Invalid CLK:Rate %d:%d\n", + cs35l35->sysclk, srate); + return -EINVAL; + } + + ret = regmap_update_bits(cs35l35->regmap, CS35L35_CLK_CTL2, + CS35L35_CLK_CTL2_MASK, clk_ctl); + if (ret != 0) { + dev_err(codec->dev, "Failed to set port config %d\n", ret); + return ret; + } + + /* Rev A0 Errata + * + * When configured for the weak-drive detection path (CH_WKFET_DIS = 0) + * the Class H algorithm does not enable weak-drive operation for + * nonzero values of CH_WKFET_DELAY if SP_RATE = 01 or 10 + * + */ + errata_chk = clk_ctl & CS35L35_SP_RATE_MASK; + + if (classh->classh_wk_fet_disable == 0x00 && + (errata_chk == 0x01 || errata_chk == 0x03)) { + ret = regmap_update_bits(cs35l35->regmap, + CS35L35_CLASS_H_FET_DRIVE_CTL, CS35L35_CH_WKFET_DEL_MASK, + 0 << CS35L35_CH_WKFET_DEL_SHIFT); + if (ret != 0) { + dev_err(codec->dev, "Failed to set fet config %d\n", + ret); + return ret; + } + } + +/* + * You can pull more Monitor data from the SDOUT pin than going to SDIN + * Just make sure your SCLK is fast enough to fill the frame + */ + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + switch (params_width(params)) { + case 8: + audin_format = CS35L35_SDIN_DEPTH_8; + break; + case 16: + audin_format = CS35L35_SDIN_DEPTH_16; + break; + case 24: + audin_format = CS35L35_SDIN_DEPTH_24; + break; + default: + dev_err(codec->dev, "Unsupported Width %d\n", + params_width(params)); + } + regmap_update_bits(cs35l35->regmap, + CS35L35_AUDIN_DEPTH_CTL, CS35L35_AUDIN_DEPTH_MASK, + audin_format << CS35L35_AUDIN_DEPTH_SHIFT); + if (cs35l35->pdata.stereo) { + regmap_update_bits(cs35l35->regmap, + CS35L35_AUDIN_DEPTH_CTL, CS35L35_ADVIN_DEPTH_MASK, + audin_format << CS35L35_ADVIN_DEPTH_SHIFT); + } + } +/* We have to take the SCLK to derive num sclks + * to configure the CLOCK_CTL3 register correctly + */ + if ((cs35l35->sclk / srate) % 4) { + dev_err(codec->dev, "Unsupported sclk/fs ratio %d:%d\n", + cs35l35->sclk, srate); + return -EINVAL; + } + sp_sclks = ((cs35l35->sclk / srate) / 4) - 1; + + if (cs35l35->i2s_mode) { + /* Only certain ratios are supported in I2S Slave Mode */ + if (cs35l35->slave_mode) { + switch (sp_sclks) { + case CS35L35_SP_SCLKS_32FS: + case CS35L35_SP_SCLKS_48FS: + case CS35L35_SP_SCLKS_64FS: + break; + default: + dev_err(codec->dev, "ratio not supported\n"); + return -EINVAL; + }; + } else { + /* Only certain ratios supported in I2S MASTER Mode */ + switch (sp_sclks) { + case CS35L35_SP_SCLKS_32FS: + case CS35L35_SP_SCLKS_64FS: + break; + default: + dev_err(codec->dev, "ratio not supported\n"); + return -EINVAL; + }; + } + ret = regmap_update_bits(cs35l35->regmap, + CS35L35_CLK_CTL3, CS35L35_SP_SCLKS_MASK, + sp_sclks << CS35L35_SP_SCLKS_SHIFT); + if (ret != 0) { + dev_err(codec->dev, "Failed to set fsclk %d\n", ret); + return ret; + } + } + if (cs35l35->pdm_mode) { + regmap_update_bits(cs35l35->regmap, CS35L35_AMP_INP_DRV_CTL, + CS35L35_PDM_MODE_MASK, 1 << CS35L35_PDM_MODE_SHIFT); + } else { + regmap_update_bits(cs35l35->regmap, CS35L35_AMP_INP_DRV_CTL, + CS35L35_PDM_MODE_MASK, 0 << CS35L35_PDM_MODE_SHIFT); + } + return ret; +} + +static const unsigned int cs35l35_src_rates[] = { + 44100, 48000, 88200, 96000, 176400, 192000 +}; + +static const struct snd_pcm_hw_constraint_list cs35l35_constraints = { + .count = ARRAY_SIZE(cs35l35_src_rates), + .list = cs35l35_src_rates, +}; + +static int cs35l35_pcm_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + snd_pcm_hw_constraint_list(substream->runtime, 0, + SNDRV_PCM_HW_PARAM_RATE, &cs35l35_constraints); + return 0; +} + +static const unsigned int cs35l35_pdm_rates[] = { + 44100, 48000, 88200, 96000 +}; + +static const struct snd_pcm_hw_constraint_list cs35l35_pdm_constraints = { + .count = ARRAY_SIZE(cs35l35_pdm_rates), + .list = cs35l35_pdm_rates, +}; + +static int cs35l35_pdm_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + snd_pcm_hw_constraint_list(substream->runtime, 0, + SNDRV_PCM_HW_PARAM_RATE, + &cs35l35_pdm_constraints); + return 0; +} + +static int cs35l35_dai_set_sysclk(struct snd_soc_dai *dai, + int clk_id, unsigned int freq, int dir) +{ + struct snd_soc_codec *codec = dai->codec; + struct cs35l35_private *cs35l35 = snd_soc_codec_get_drvdata(codec); + + /* Need the SCLK Frequency */ + cs35l35->sclk = freq; + + return 0; +} + +static const struct snd_soc_dai_ops cs35l35_ops = { + .startup = cs35l35_pcm_startup, + .set_fmt = cs35l35_set_dai_fmt, + .hw_params = cs35l35_pcm_hw_params, + .set_sysclk = cs35l35_dai_set_sysclk, +}; + +static const struct snd_soc_dai_ops cs35l35_pdm_ops = { + .startup = cs35l35_pdm_startup, + .set_fmt = cs35l35_set_dai_fmt, + .hw_params = cs35l35_pcm_hw_params, + .set_sysclk = cs35l35_dai_set_sysclk, +}; + +static struct snd_soc_dai_driver cs35l35_dai[] = { + { + .name = "cs35l35-pcm", + .id = 0, + .playback = { + .stream_name = "AMP Playback", + .channels_min = 1, + .channels_max = 8, + .rates = SNDRV_PCM_RATE_KNOT, + .formats = CS35L35_FORMATS, + }, + .capture = { + .stream_name = "AMP Capture", + .channels_min = 1, + .channels_max = 8, + .rates = SNDRV_PCM_RATE_KNOT, + .formats = CS35L35_FORMATS, + }, + .ops = &cs35l35_ops, + .symmetric_rates = 1, + }, + { + .name = "cs35l35-pdm", + .id = 1, + .playback = { + .stream_name = "PDM Playback", + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_KNOT, + .formats = CS35L35_FORMATS, + }, + .ops = &cs35l35_pdm_ops, + }, +}; + +static int cs35l35_codec_set_sysclk(struct snd_soc_codec *codec, + int clk_id, int source, unsigned int freq, + int dir) +{ + struct cs35l35_private *cs35l35 = snd_soc_codec_get_drvdata(codec); + int clksrc; + int ret = 0; + + switch (clk_id) { + case 0: + clksrc = CS35L35_CLK_SOURCE_MCLK; + break; + case 1: + clksrc = CS35L35_CLK_SOURCE_SCLK; + break; + case 2: + clksrc = CS35L35_CLK_SOURCE_PDM; + break; + default: + dev_err(codec->dev, "Invalid CLK Source\n"); + return -EINVAL; + }; + + switch (freq) { + case 5644800: + case 6144000: + case 11289600: + case 12000000: + case 12288000: + case 13000000: + case 22579200: + case 24000000: + case 24576000: + case 26000000: + cs35l35->sysclk = freq; + break; + default: + dev_err(codec->dev, "Invalid CLK Frequency\n"); + return -EINVAL; + } + + ret = regmap_update_bits(cs35l35->regmap, CS35L35_CLK_CTL1, + CS35L35_CLK_SOURCE_MASK, clksrc << CS35L35_CLK_SOURCE_SHIFT); + if (ret != 0) { + dev_err(codec->dev, "Failed to set sysclk %d\n", ret); + return ret; + } + + return ret; +} + +static int cs35l35_codec_probe(struct snd_soc_codec *codec) +{ + struct cs35l35_private *cs35l35 = snd_soc_codec_get_drvdata(codec); + struct classh_cfg *classh = &cs35l35->pdata.classh_algo; + struct monitor_cfg *monitor_config = &cs35l35->pdata.mon_cfg; + int ret; + + cs35l35->codec = codec; + + /* Set Platform Data */ + if (cs35l35->pdata.bst_vctl) + regmap_update_bits(cs35l35->regmap, CS35L35_BST_CVTR_V_CTL, + CS35L35_BST_CTL_MASK, cs35l35->pdata.bst_vctl); + + if (cs35l35->pdata.bst_ipk) + regmap_update_bits(cs35l35->regmap, CS35L35_BST_PEAK_I, + CS35L35_BST_IPK_MASK, + cs35l35->pdata.bst_ipk << CS35L35_BST_IPK_SHIFT); + + if (cs35l35->pdata.gain_zc) + regmap_update_bits(cs35l35->regmap, CS35L35_PROTECT_CTL, + CS35L35_AMP_GAIN_ZC_MASK, + cs35l35->pdata.gain_zc << CS35L35_AMP_GAIN_ZC_SHIFT); + + if (cs35l35->pdata.aud_channel) + regmap_update_bits(cs35l35->regmap, + CS35L35_AUDIN_RXLOC_CTL, + CS35L35_AUD_IN_LR_MASK, + cs35l35->pdata.aud_channel << CS35L35_AUD_IN_LR_SHIFT); + + if (cs35l35->pdata.stereo) { + regmap_update_bits(cs35l35->regmap, + CS35L35_ADVIN_RXLOC_CTL, CS35L35_ADV_IN_LR_MASK, + cs35l35->pdata.adv_channel << CS35L35_ADV_IN_LR_SHIFT); + if (cs35l35->pdata.shared_bst) + regmap_update_bits(cs35l35->regmap, CS35L35_CLASS_H_CTL, + CS35L35_CH_STEREO_MASK, 1 << CS35L35_CH_STEREO_SHIFT); + ret = snd_soc_add_codec_controls(codec, cs35l35_adv_controls, + ARRAY_SIZE(cs35l35_adv_controls)); + if (ret) + return ret; + } + + if (cs35l35->pdata.sp_drv_str) + regmap_update_bits(cs35l35->regmap, CS35L35_CLK_CTL1, + CS35L35_SP_DRV_MASK, + cs35l35->pdata.sp_drv_str << CS35L35_SP_DRV_SHIFT); + + if (classh->classh_algo_enable) { + if (classh->classh_bst_override) + regmap_update_bits(cs35l35->regmap, + CS35L35_CLASS_H_CTL, CS35L35_CH_BST_OVR_MASK, + classh->classh_bst_override << CS35L35_CH_BST_OVR_SHIFT); + if (classh->classh_bst_max_limit) + regmap_update_bits(cs35l35->regmap, + CS35L35_CLASS_H_CTL, CS35L35_CH_BST_LIM_MASK, + classh->classh_bst_max_limit << CS35L35_CH_BST_LIM_SHIFT); + if (classh->classh_mem_depth) + regmap_update_bits(cs35l35->regmap, + CS35L35_CLASS_H_CTL, CS35L35_CH_MEM_DEPTH_MASK, + classh->classh_mem_depth << CS35L35_CH_MEM_DEPTH_SHIFT); + if (classh->classh_headroom) + regmap_update_bits(cs35l35->regmap, + CS35L35_CLASS_H_HEADRM_CTL, CS35L35_CH_HDRM_CTL_MASK, + classh->classh_headroom << CS35L35_CH_HDRM_CTL_SHIFT); + if (classh->classh_release_rate) + regmap_update_bits(cs35l35->regmap, + CS35L35_CLASS_H_RELEASE_RATE, CS35L35_CH_REL_RATE_MASK, + classh->classh_release_rate << CS35L35_CH_REL_RATE_SHIFT); + if (classh->classh_wk_fet_disable) + regmap_update_bits(cs35l35->regmap, + CS35L35_CLASS_H_FET_DRIVE_CTL, CS35L35_CH_WKFET_DIS_MASK, + classh->classh_wk_fet_disable << CS35L35_CH_WKFET_DIS_SHIFT); + if (classh->classh_wk_fet_delay) + regmap_update_bits(cs35l35->regmap, + CS35L35_CLASS_H_FET_DRIVE_CTL, CS35L35_CH_WKFET_DEL_MASK, + classh->classh_wk_fet_delay << CS35L35_CH_WKFET_DEL_SHIFT); + if (classh->classh_wk_fet_thld) + regmap_update_bits(cs35l35->regmap, + CS35L35_CLASS_H_FET_DRIVE_CTL, CS35L35_CH_WKFET_THLD_MASK, + classh->classh_wk_fet_thld << CS35L35_CH_WKFET_THLD_SHIFT); + if (classh->classh_vpch_auto) + regmap_update_bits(cs35l35->regmap, + CS35L35_CLASS_H_VP_CTL, CS35L35_CH_VP_AUTO_MASK, + classh->classh_vpch_auto << CS35L35_CH_VP_AUTO_SHIFT); + if (classh->classh_vpch_rate) + regmap_update_bits(cs35l35->regmap, + CS35L35_CLASS_H_VP_CTL, CS35L35_CH_VP_RATE_MASK, + classh->classh_vpch_rate << CS35L35_CH_VP_RATE_SHIFT); + if (classh->classh_vpch_man) + regmap_update_bits(cs35l35->regmap, + CS35L35_CLASS_H_VP_CTL, CS35L35_CH_VP_MAN_MASK, + classh->classh_vpch_man << CS35L35_CH_VP_MAN_SHIFT); + } + + if (monitor_config->is_present) { + if (monitor_config->vmon_specs) { + regmap_update_bits(cs35l35->regmap, + CS35L35_SPKMON_DEPTH_CTL, CS35L35_VMON_DEPTH_MASK, + monitor_config->vmon_dpth << CS35L35_VMON_DEPTH_SHIFT); + regmap_update_bits(cs35l35->regmap, + CS35L35_VMON_TXLOC_CTL, CS35L35_MON_TXLOC_MASK, + monitor_config->vmon_loc << CS35L35_MON_TXLOC_SHIFT); + regmap_update_bits(cs35l35->regmap, + CS35L35_VMON_TXLOC_CTL, CS35L35_MON_FRM_MASK, + monitor_config->vmon_frm << CS35L35_MON_FRM_SHIFT); + } + if (monitor_config->imon_specs) { + regmap_update_bits(cs35l35->regmap, + CS35L35_SPKMON_DEPTH_CTL, CS35L35_IMON_DEPTH_MASK, + monitor_config->imon_dpth << CS35L35_IMON_DEPTH_SHIFT); + regmap_update_bits(cs35l35->regmap, + CS35L35_IMON_TXLOC_CTL, CS35L35_MON_TXLOC_MASK, + monitor_config->imon_loc << CS35L35_MON_TXLOC_SHIFT); + regmap_update_bits(cs35l35->regmap, + CS35L35_IMON_TXLOC_CTL, CS35L35_MON_FRM_MASK, + monitor_config->imon_frm << CS35L35_MON_FRM_SHIFT); + } + if (monitor_config->vpmon_specs) { + regmap_update_bits(cs35l35->regmap, + CS35L35_SUPMON_DEPTH_CTL, CS35L35_VPMON_DEPTH_MASK, + monitor_config->vpmon_dpth << CS35L35_VPMON_DEPTH_SHIFT); + regmap_update_bits(cs35l35->regmap, + CS35L35_VPMON_TXLOC_CTL, CS35L35_MON_TXLOC_MASK, + monitor_config->vpmon_loc << CS35L35_MON_TXLOC_SHIFT); + regmap_update_bits(cs35l35->regmap, + CS35L35_VPMON_TXLOC_CTL, CS35L35_MON_FRM_MASK, + monitor_config->vpmon_frm << CS35L35_MON_FRM_SHIFT); + } + if (monitor_config->vbstmon_specs) { + regmap_update_bits(cs35l35->regmap, + CS35L35_SUPMON_DEPTH_CTL, CS35L35_VBSTMON_DEPTH_MASK, + monitor_config->vpmon_dpth << CS35L35_VBSTMON_DEPTH_SHIFT); + regmap_update_bits(cs35l35->regmap, + CS35L35_VBSTMON_TXLOC_CTL, CS35L35_MON_TXLOC_MASK, + monitor_config->vbstmon_loc << CS35L35_MON_TXLOC_SHIFT); + regmap_update_bits(cs35l35->regmap, + CS35L35_VBSTMON_TXLOC_CTL, CS35L35_MON_FRM_MASK, + monitor_config->vbstmon_frm << CS35L35_MON_FRM_SHIFT); + } + if (monitor_config->vpbrstat_specs) { + regmap_update_bits(cs35l35->regmap, + CS35L35_SUPMON_DEPTH_CTL, CS35L35_VPBRSTAT_DEPTH_MASK, + monitor_config->vpbrstat_dpth << CS35L35_VPBRSTAT_DEPTH_SHIFT); + regmap_update_bits(cs35l35->regmap, + CS35L35_VPBR_STATUS_TXLOC_CTL, CS35L35_MON_TXLOC_MASK, + monitor_config->vpbrstat_loc << CS35L35_MON_TXLOC_SHIFT); + regmap_update_bits(cs35l35->regmap, + CS35L35_VPBR_STATUS_TXLOC_CTL, CS35L35_MON_FRM_MASK, + monitor_config->vpbrstat_frm << CS35L35_MON_FRM_SHIFT); + } + if (monitor_config->zerofill_specs) { + regmap_update_bits(cs35l35->regmap, + CS35L35_SUPMON_DEPTH_CTL, CS35L35_ZEROFILL_DEPTH_MASK, + monitor_config->zerofill_dpth << CS35L35_ZEROFILL_DEPTH_SHIFT); + regmap_update_bits(cs35l35->regmap, + CS35L35_ZERO_FILL_LOC_CTL, CS35L35_MON_TXLOC_MASK, + monitor_config->zerofill_loc << CS35L35_MON_TXLOC_SHIFT); + regmap_update_bits(cs35l35->regmap, + CS35L35_ZERO_FILL_LOC_CTL, CS35L35_MON_FRM_MASK, + monitor_config->zerofill_frm << CS35L35_MON_FRM_SHIFT); + } + } + + return ret; +} + +static struct snd_soc_codec_driver soc_codec_dev_cs35l35 = { + .probe = cs35l35_codec_probe, + .set_sysclk = cs35l35_codec_set_sysclk, + .component_driver = { + .controls = cs35l35_aud_controls, + .num_controls = ARRAY_SIZE(cs35l35_aud_controls), + .dapm_widgets = cs35l35_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(cs35l35_dapm_widgets), + + .dapm_routes = cs35l35_audio_map, + .num_dapm_routes = ARRAY_SIZE(cs35l35_audio_map), + }, +}; + +static struct regmap_config cs35l35_regmap = { + .reg_bits = 8, + .val_bits = 8, + + .max_register = CS35L35_MAX_REGISTER, + .reg_defaults = cs35l35_reg, + .num_reg_defaults = ARRAY_SIZE(cs35l35_reg), + .volatile_reg = cs35l35_volatile_register, + .readable_reg = cs35l35_readable_register, + .precious_reg = cs35l35_precious_register, + .cache_type = REGCACHE_RBTREE, +}; + +static irqreturn_t cs35l35_irq(int irq, void *data) +{ + struct cs35l35_private *cs35l35 = data; + struct snd_soc_codec *codec = cs35l35->codec; + unsigned int sticky1, sticky2, sticky3, sticky4; + unsigned int mask1, mask2, mask3, mask4, current1; + + /* ack the irq by reading all status registers */ + regmap_read(cs35l35->regmap, CS35L35_INT_STATUS_4, &sticky4); + regmap_read(cs35l35->regmap, CS35L35_INT_STATUS_3, &sticky3); + regmap_read(cs35l35->regmap, CS35L35_INT_STATUS_2, &sticky2); + regmap_read(cs35l35->regmap, CS35L35_INT_STATUS_1, &sticky1); + + regmap_read(cs35l35->regmap, CS35L35_INT_MASK_4, &mask4); + regmap_read(cs35l35->regmap, CS35L35_INT_MASK_3, &mask3); + regmap_read(cs35l35->regmap, CS35L35_INT_MASK_2, &mask2); + regmap_read(cs35l35->regmap, CS35L35_INT_MASK_1, &mask1); + + /* Check to see if unmasked bits are active */ + if (!(sticky1 & ~mask1) && !(sticky2 & ~mask2) && !(sticky3 & ~mask3) + && !(sticky4 & ~mask4)) + return IRQ_NONE; + + if (sticky2 & CS35L35_PDN_DONE) + complete(&cs35l35->pdn_done); + + /* read the current values */ + regmap_read(cs35l35->regmap, CS35L35_INT_STATUS_1, &current1); + + /* handle the interrupts */ + if (sticky1 & CS35L35_CAL_ERR) { + dev_err(codec->dev, "%s : Calibration Error\n", __func__); + + /* error is no longer asserted; safe to reset */ + if (!(current1 & CS35L35_CAL_ERR)) { + dev_dbg(codec->dev, "%s : Cal error release\n", __func__); + regmap_update_bits(cs35l35->regmap, + CS35L35_PROT_RELEASE_CTL, CS35L35_CAL_ERR_RLS, 0); + regmap_update_bits(cs35l35->regmap, + CS35L35_PROT_RELEASE_CTL, CS35L35_CAL_ERR_RLS, + CS35L35_CAL_ERR_RLS); + regmap_update_bits(cs35l35->regmap, + CS35L35_PROT_RELEASE_CTL, CS35L35_CAL_ERR_RLS, 0); + } + } + + if (sticky1 & CS35L35_AMP_SHORT) { + /* error is no longer asserted; safe to reset */ + if (!(current1 & CS35L35_AMP_SHORT)) { + dev_dbg(codec->dev, "%s :Amp short error release\n", __func__); + regmap_update_bits(cs35l35->regmap, + CS35L35_PROT_RELEASE_CTL, CS35L35_SHORT_RLS, 0); + regmap_update_bits(cs35l35->regmap, + CS35L35_PROT_RELEASE_CTL, CS35L35_SHORT_RLS, + CS35L35_SHORT_RLS); + regmap_update_bits(cs35l35->regmap, + CS35L35_PROT_RELEASE_CTL, CS35L35_SHORT_RLS, 0); + } + } + + if (sticky1 & CS35L35_OTW) { + dev_err(codec->dev, "%s : Over temperature warning\n", __func__); + + /* error is no longer asserted; safe to reset */ + if (!(current1 & CS35L35_OTW)) { + dev_dbg(codec->dev, "%s : Over temperature warning release\n", + __func__); + regmap_update_bits(cs35l35->regmap, + CS35L35_PROT_RELEASE_CTL, CS35L35_OTW_RLS, 0); + regmap_update_bits(cs35l35->regmap, + CS35L35_PROT_RELEASE_CTL, CS35L35_OTW_RLS, + CS35L35_OTW_RLS); + regmap_update_bits(cs35l35->regmap, + CS35L35_PROT_RELEASE_CTL, CS35L35_OTW_RLS, 0); + } + } + + if (sticky1 & CS35L35_OTE) { + dev_crit(codec->dev, "%s : Over temperature error\n", __func__); + + /* error is no longer asserted; safe to reset */ + if (!(current1 & CS35L35_OTE)) { + dev_dbg(codec->dev, "%s : Over temperature error release\n", + __func__); + regmap_update_bits(cs35l35->regmap, + CS35L35_PROT_RELEASE_CTL, CS35L35_OTE_RLS, 0); + regmap_update_bits(cs35l35->regmap, + CS35L35_PROT_RELEASE_CTL, CS35L35_OTE_RLS, + CS35L35_OTE_RLS); + regmap_update_bits(cs35l35->regmap, + CS35L35_PROT_RELEASE_CTL, CS35L35_OTE_RLS, 0); + } + } + + if (sticky3 & CS35L35_BST_HIGH) { + dev_crit(codec->dev, "%s : VBST error: powering off!\n", __func__); + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL2, + CS35L35_PDN_AMP, CS35L35_PDN_AMP); + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL1, + CS35L35_PDN_ALL, CS35L35_PDN_ALL); + } + + if (sticky3 & CS35L35_LBST_SHORT) { + dev_crit(codec->dev, "%s : LBST error: powering off!\n", __func__); + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL2, + CS35L35_PDN_AMP, CS35L35_PDN_AMP); + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL1, + CS35L35_PDN_ALL, CS35L35_PDN_ALL); + } + + if (sticky2 & CS35L35_VPBR_ERR) + dev_err(codec->dev, "%s : Error: Reactive Brownout\n", __func__); + + if (sticky4 & CS35L35_VMON_OVFL) + dev_err(codec->dev, "%s : Error: VMON overflow\n", __func__); + + if (sticky4 & CS35L35_IMON_OVFL) + dev_err(codec->dev, "%s : Error: IMON overflow\n", __func__); + + return IRQ_HANDLED; +} + + +static int cs35l35_handle_of_data(struct i2c_client *i2c_client, + struct cs35l35_platform_data *pdata) +{ + struct device_node *np = i2c_client->dev.of_node; + struct device_node *classh, *signal_format; + struct classh_cfg *classh_config = &pdata->classh_algo; + struct monitor_cfg *monitor_config = &pdata->mon_cfg; + unsigned int val32 = 0; + u8 monitor_array[3]; + int ret = 0; + + if (!np) + return 0; + + pdata->bst_pdn_fet_on = of_property_read_bool(np, + "cirrus,boost-pdn-fet-on"); + + if (of_property_read_u32(np, "cirrus,boost-ctl-millivolt", &val32) >= 0) + pdata->bst_vctl = val32; + + if (of_property_read_u32(np, "cirrus,boost-ipk-milliamp", &val32) >= 0) + pdata->bst_ipk = val32; + + if (of_property_read_u32(np, "cirrus,sp-drv-strength", &val32) >= 0) + pdata->sp_drv_str = val32; + + pdata->stereo = of_property_read_bool(np, "cirrus,stereo-config"); + + if (pdata->stereo) { + if (of_property_read_u32(np, "cirrus,audio-channel", &val32) >= 0) + pdata->aud_channel = val32; + if (of_property_read_u32(np, "cirrus,advisory-channel", + &val32) >= 0) + pdata->adv_channel = val32; + pdata->shared_bst = of_property_read_bool(np, + "cirrus,shared-boost"); + } + + pdata->gain_zc = of_property_read_bool(np, "cirrus,amp-gain-zc"); + + classh = of_get_child_by_name(np, "cirrus,classh-internal-algo"); + classh_config->classh_algo_enable = classh ? true : false; + + if (classh_config->classh_algo_enable) { + classh_config->classh_bst_override = + of_property_read_bool(np, "cirrus,classh-bst-overide"); + + if (of_property_read_u32(classh, "cirrus,classh-bst-max-limit", + &val32) >= 0) + classh_config->classh_bst_max_limit = val32; + if (of_property_read_u32(classh, "cirrus,classh-mem-depth", + &val32) >= 0) + classh_config->classh_mem_depth = val32; + if (of_property_read_u32(classh, "cirrus,classh-release-rate", + &val32) >= 0) + classh_config->classh_release_rate = val32; + if (of_property_read_u32(classh, "cirrus,classh-headroom", + &val32) >= 0) + classh_config->classh_headroom = val32; + if (of_property_read_u32(classh, "cirrus,classh-wk-fet-disable", + &val32) >= 0) + classh_config->classh_wk_fet_disable = val32; + if (of_property_read_u32(classh, "cirrus,classh-wk-fet-delay", + &val32) >= 0) + classh_config->classh_wk_fet_delay = val32; + if (of_property_read_u32(classh, "cirrus,classh-wk-fet-thld", + &val32) >= 0) + classh_config->classh_wk_fet_thld = val32; + if (of_property_read_u32(classh, "cirrus,classh-vpch-auto", + &val32) >= 0) + classh_config->classh_vpch_auto = val32; + if (of_property_read_u32(classh, "cirrus,classh-vpch-rate", + &val32) >= 0) + classh_config->classh_vpch_rate = val32; + if (of_property_read_u32(classh, "cirrus,classh-vpch-man", + &val32) >= 0) + classh_config->classh_vpch_man = val32; + } + of_node_put(classh); + + /* frame depth location */ + signal_format = of_get_child_by_name(np, "cirrus,monitor-signal-format"); + monitor_config->is_present = signal_format ? true : false; + if (monitor_config->is_present) { + ret = of_property_read_u8_array(signal_format, "cirrus,imon", + monitor_array, ARRAY_SIZE(monitor_array)); + if (!ret) { + monitor_config->imon_specs = true; + monitor_config->imon_dpth = monitor_array[0]; + monitor_config->imon_loc = monitor_array[1]; + monitor_config->imon_frm = monitor_array[2]; + } + ret = of_property_read_u8_array(signal_format, "cirrus,vmon", + monitor_array, ARRAY_SIZE(monitor_array)); + if (!ret) { + monitor_config->vmon_specs = true; + monitor_config->vmon_dpth = monitor_array[0]; + monitor_config->vmon_loc = monitor_array[1]; + monitor_config->vmon_frm = monitor_array[2]; + } + ret = of_property_read_u8_array(signal_format, "cirrus,vpmon", + monitor_array, ARRAY_SIZE(monitor_array)); + if (!ret) { + monitor_config->vpmon_specs = true; + monitor_config->vpmon_dpth = monitor_array[0]; + monitor_config->vpmon_loc = monitor_array[1]; + monitor_config->vpmon_frm = monitor_array[2]; + } + ret = of_property_read_u8_array(signal_format, "cirrus,vbstmon", + monitor_array, ARRAY_SIZE(monitor_array)); + if (!ret) { + monitor_config->vbstmon_specs = true; + monitor_config->vbstmon_dpth = monitor_array[0]; + monitor_config->vbstmon_loc = monitor_array[1]; + monitor_config->vbstmon_frm = monitor_array[2]; + } + ret = of_property_read_u8_array(signal_format, "cirrus,vpbrstat", + monitor_array, ARRAY_SIZE(monitor_array)); + if (!ret) { + monitor_config->vpbrstat_specs = true; + monitor_config->vpbrstat_dpth = monitor_array[0]; + monitor_config->vpbrstat_loc = monitor_array[1]; + monitor_config->vpbrstat_frm = monitor_array[2]; + } + ret = of_property_read_u8_array(signal_format, "cirrus,zerofill", + monitor_array, ARRAY_SIZE(monitor_array)); + if (!ret) { + monitor_config->zerofill_specs = true; + monitor_config->zerofill_dpth = monitor_array[0]; + monitor_config->zerofill_loc = monitor_array[1]; + monitor_config->zerofill_frm = monitor_array[2]; + } + } + of_node_put(signal_format); + + return 0; +} + +/* Errata Rev A0 */ +static const struct reg_sequence cs35l35_errata_patch[] = { + + { 0x7F, 0x99 }, + { 0x00, 0x99 }, + { 0x52, 0x22 }, + { 0x04, 0x14 }, + { 0x6D, 0x44 }, + { 0x24, 0x10 }, + { 0x58, 0xC4 }, + { 0x00, 0x98 }, + { 0x18, 0x08 }, + { 0x00, 0x00 }, + { 0x7F, 0x00 }, +}; + +static int cs35l35_i2c_probe(struct i2c_client *i2c_client, + const struct i2c_device_id *id) +{ + struct cs35l35_private *cs35l35; + struct cs35l35_platform_data *pdata = + dev_get_platdata(&i2c_client->dev); + int i; + int ret; + unsigned int devid = 0; + unsigned int reg; + + cs35l35 = devm_kzalloc(&i2c_client->dev, + sizeof(struct cs35l35_private), + GFP_KERNEL); + if (!cs35l35) { + dev_err(&i2c_client->dev, "could not allocate codec\n"); + return -ENOMEM; + } + + i2c_set_clientdata(i2c_client, cs35l35); + cs35l35->regmap = devm_regmap_init_i2c(i2c_client, &cs35l35_regmap); + if (IS_ERR(cs35l35->regmap)) { + ret = PTR_ERR(cs35l35->regmap); + dev_err(&i2c_client->dev, "regmap_init() failed: %d\n", ret); + goto err; + } + + for (i = 0; i < ARRAY_SIZE(cs35l35_supplies); i++) + cs35l35->supplies[i].supply = cs35l35_supplies[i]; + cs35l35->num_supplies = ARRAY_SIZE(cs35l35_supplies); + + ret = devm_regulator_bulk_get(&i2c_client->dev, + cs35l35->num_supplies, + cs35l35->supplies); + if (ret != 0) { + dev_err(&i2c_client->dev, + "Failed to request core supplies: %d\n", + ret); + return ret; + } + + if (pdata) { + cs35l35->pdata = *pdata; + } else { + pdata = devm_kzalloc(&i2c_client->dev, + sizeof(struct cs35l35_platform_data), + GFP_KERNEL); + if (!pdata) { + dev_err(&i2c_client->dev, + "could not allocate pdata\n"); + return -ENOMEM; + } + if (i2c_client->dev.of_node) { + ret = cs35l35_handle_of_data(i2c_client, pdata); + if (ret != 0) + return ret; + + } + cs35l35->pdata = *pdata; + } + + ret = regulator_bulk_enable(cs35l35->num_supplies, + cs35l35->supplies); + if (ret != 0) { + dev_err(&i2c_client->dev, + "Failed to enable core supplies: %d\n", + ret); + return ret; + } + + /* returning NULL can be an option if in stereo mode */ + cs35l35->reset_gpio = devm_gpiod_get_optional(&i2c_client->dev, + "reset", GPIOD_OUT_LOW); + if (IS_ERR(cs35l35->reset_gpio)) + return PTR_ERR(cs35l35->reset_gpio); + + if (cs35l35->reset_gpio) + gpiod_set_value_cansleep(cs35l35->reset_gpio, 1); + + init_completion(&cs35l35->pdn_done); + + ret = regmap_register_patch(cs35l35->regmap, cs35l35_errata_patch, + ARRAY_SIZE(cs35l35_errata_patch)); + if (ret < 0) { + dev_err(&i2c_client->dev, "Failed to apply errata patch\n"); + return ret; + } + + ret = devm_request_threaded_irq(&i2c_client->dev, i2c_client->irq, NULL, + cs35l35_irq, IRQF_ONESHOT | IRQF_TRIGGER_LOW, + "cs35l35", cs35l35); + if (ret != 0) { + dev_err(&i2c_client->dev, "Failed to request IRQ: %d\n", ret); + goto err; + } + /* initialize codec */ + ret = regmap_read(cs35l35->regmap, CS35L35_DEVID_AB, &reg); + + devid = (reg & 0xFF) << 12; + ret = regmap_read(cs35l35->regmap, CS35L35_DEVID_CD, &reg); + devid |= (reg & 0xFF) << 4; + ret = regmap_read(cs35l35->regmap, CS35L35_DEVID_E, &reg); + devid |= (reg & 0xF0) >> 4; + + if (devid != CS35L35_CHIP_ID) { + dev_err(&i2c_client->dev, + "CS35L35 Device ID (%X). Expected ID %X\n", + devid, CS35L35_CHIP_ID); + ret = -ENODEV; + goto err; + } + + ret = regmap_read(cs35l35->regmap, CS35L35_REV_ID, &reg); + if (ret < 0) { + dev_err(&i2c_client->dev, "Get Revision ID failed\n"); + goto err; + } + + dev_info(&i2c_client->dev, + "Cirrus Logic CS35L35 (%x), Revision: %02X\n", devid, + ret & 0xFF); + + /* Set the INT Masks for critical errors */ + regmap_write(cs35l35->regmap, CS35L35_INT_MASK_1, CS35L35_INT1_CRIT_MASK); + regmap_write(cs35l35->regmap, CS35L35_INT_MASK_2, CS35L35_INT2_CRIT_MASK); + regmap_write(cs35l35->regmap, CS35L35_INT_MASK_3, CS35L35_INT3_CRIT_MASK); + regmap_write(cs35l35->regmap, CS35L35_INT_MASK_4, CS35L35_INT4_CRIT_MASK); + + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL2, + CS35L35_PWR2_PDN_MASK, CS35L35_PWR2_PDN_MASK); + + if (cs35l35->pdata.bst_pdn_fet_on) + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL2, + CS35L35_PDN_BST_MASK, 1 << CS35L35_PDN_BST_FETON_SHIFT); + else + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL2, + CS35L35_PDN_BST_MASK, 1 << CS35L35_PDN_BST_FETOFF_SHIFT); + + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL3, + CS35L35_PWR3_PDN_MASK, CS35L35_PWR3_PDN_MASK); + + regmap_update_bits(cs35l35->regmap, CS35L35_PROTECT_CTL, + CS35L35_AMP_MUTE_MASK, 1 << CS35L35_AMP_MUTE_SHIFT); + + ret = snd_soc_register_codec(&i2c_client->dev, + &soc_codec_dev_cs35l35, cs35l35_dai, + ARRAY_SIZE(cs35l35_dai)); + if (ret < 0) { + dev_err(&i2c_client->dev, + "%s: Register codec failed\n", __func__); + goto err; + } + +err: + regulator_bulk_disable(cs35l35->num_supplies, + cs35l35->supplies); + return ret; +} + +static int cs35l35_i2c_remove(struct i2c_client *client) +{ + snd_soc_unregister_codec(&client->dev); + kfree(i2c_get_clientdata(client)); + return 0; +} + +static const struct of_device_id cs35l35_of_match[] = { + {.compatible = "cirrus,cs35l35"}, + {}, +}; +MODULE_DEVICE_TABLE(of, cs35l35_of_match); + +static const struct i2c_device_id cs35l35_id[] = { + {"cs35l35", 0}, + {} +}; + +MODULE_DEVICE_TABLE(i2c, cs35l35_id); + +static struct i2c_driver cs35l35_i2c_driver = { + .driver = { + .name = "cs35l35", + .of_match_table = cs35l35_of_match, + }, + .id_table = cs35l35_id, + .probe = cs35l35_i2c_probe, + .remove = cs35l35_i2c_remove, +}; + +module_i2c_driver(cs35l35_i2c_driver); + +MODULE_DESCRIPTION("ASoC CS35L35 driver"); +MODULE_AUTHOR("Brian Austin, Cirrus Logic Inc, <brian.austin(a)cirrus.com>"); +MODULE_AUTHOR("Li Xu, Cirrus Logic Inc, <li.xu(a)cirrus.com>"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/codecs/cs35l35.h b/sound/soc/codecs/cs35l35.h new file mode 100644 index 0000000..767227e --- /dev/null +++ b/sound/soc/codecs/cs35l35.h @@ -0,0 +1,285 @@ +/* + * cs35l35.h -- CS35L35 ALSA SoC audio driver + * + * Copyright 2016 Cirrus Logic, Inc. + * + * Author: Brian Austin <brian.austin(a)cirrus.com> + * Li Xu <li.xu(a)cirrus.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#ifndef __CS35L35_H__ +#define __CS35L35_H__ + +#define CS35L35_FIRSTREG 0x01 +#define CS35L35_LASTREG 0x7E +#define CS35L35_CHIP_ID 0x00035A35 +#define CS35L35_DEVID_AB 0x01 /* Device ID A & B [RO] */ +#define CS35L35_DEVID_CD 0x02 /* Device ID C & D [RO] */ +#define CS35L35_DEVID_E 0x03 /* Device ID E [RO] */ +#define CS35L35_FAB_ID 0x04 /* Fab ID [RO] */ +#define CS35L35_REV_ID 0x05 /* Revision ID [RO] */ +#define CS35L35_PWRCTL1 0x06 /* Power Ctl 1 */ +#define CS35L35_PWRCTL2 0x07 /* Power Ctl 2 */ +#define CS35L35_PWRCTL3 0x08 /* Power Ctl 3 */ +#define CS35L35_CLK_CTL1 0x0A /* Clocking Ctl 1 */ +#define CS35L35_CLK_CTL2 0x0B /* Clocking Ctl 2 */ +#define CS35L35_CLK_CTL3 0x0C /* Clocking Ctl 3 */ +#define CS35L35_SP_FMT_CTL1 0x0D /* Serial Port Format CTL1 */ +#define CS35L35_SP_FMT_CTL2 0x0E /* Serial Port Format CTL2 */ +#define CS35L35_SP_FMT_CTL3 0x0F /* Serial Port Format CTL3 */ +#define CS35L35_MAG_COMP_CTL 0x13 /* Magnitude Comp CTL */ +#define CS35L35_AMP_INP_DRV_CTL 0x14 /* Amp Input Drive Ctl */ +#define CS35L35_AMP_DIG_VOL_CTL 0x15 /* Amplifier Dig Volume Ctl */ +#define CS35L35_AMP_DIG_VOL 0x16 /* Amplifier Dig Volume */ +#define CS35L35_ADV_DIG_VOL 0x17 /* Advisory Digital Volume */ +#define CS35L35_PROTECT_CTL 0x18 /* Amp Gain - Prot Ctl Param */ +#define CS35L35_AMP_GAIN_AUD_CTL 0x19 /* Amp Serial Port Gain Ctl */ +#define CS35L35_AMP_GAIN_PDM_CTL 0x1A /* Amplifier Gain PDM Ctl */ +#define CS35L35_AMP_GAIN_ADV_CTL 0x1B /* Amplifier Gain Ctl */ +#define CS35L35_GPI_CTL 0x1C /* GPI Ctl */ +#define CS35L35_BST_CVTR_V_CTL 0x1D /* Boost Conv Voltage Ctl */ +#define CS35L35_BST_PEAK_I 0x1E /* Boost Conv Peak Current */ +#define CS35L35_BST_RAMP_CTL 0x20 /* Boost Conv Soft Ramp Ctl */ +#define CS35L35_BST_CONV_COEF_1 0x21 /* Boost Conv Coefficients 1 */ +#define CS35L35_BST_CONV_COEF_2 0x22 /* Boost Conv Coefficients 2 */ +#define CS35L35_BST_CONV_SLOPE_COMP 0x23 /* Boost Conv Slope Comp */ +#define CS35L35_BST_CONV_SW_FREQ 0x24 /* Boost Conv L BST SW Freq */ +#define CS35L35_CLASS_H_CTL 0x30 /* CLS H Control */ +#define CS35L35_CLASS_H_HEADRM_CTL 0x31 /* CLS H Headroom Ctl */ +#define CS35L35_CLASS_H_RELEASE_RATE 0x32 /* CLS H Release Rate */ +#define CS35L35_CLASS_H_FET_DRIVE_CTL 0x33 /* CLS H Weak FET Drive Ctl */ +#define CS35L35_CLASS_H_VP_CTL 0x34 /* CLS H VP Ctl */ +#define CS35L35_CLASS_H_STATUS 0x38 /* CLS H Status */ +#define CS35L35_VPBR_CTL 0x3A /* VPBR Ctl */ +#define CS35L35_VPBR_VOL_CTL 0x3B /* VPBR Volume Ctl */ +#define CS35L35_VPBR_TIMING_CTL 0x3C /* VPBR Timing Ctl */ +#define CS35L35_VPBR_MODE_VOL_CTL 0x3D /* VPBR Mode/Attack Vol Ctl */ +#define CS35L35_VPBR_ATTEN_STATUS 0x4B /* VPBR Attenuation Status */ +#define CS35L35_SPKR_MON_CTL 0x4E /* Speaker Monitoring Ctl */ +#define CS35L35_IMON_SCALE_CTL 0x51 /* IMON Scale Ctl */ +#define CS35L35_AUDIN_RXLOC_CTL 0x52 /* Audio Input RX Loc Ctl */ +#define CS35L35_ADVIN_RXLOC_CTL 0x53 /* Advisory Input RX Loc Ctl */ +#define CS35L35_VMON_TXLOC_CTL 0x54 /* VMON TX Loc Ctl */ +#define CS35L35_IMON_TXLOC_CTL 0x55 /* IMON TX Loc Ctl */ +#define CS35L35_VPMON_TXLOC_CTL 0x56 /* VPMON TX Loc Ctl */ +#define CS35L35_VBSTMON_TXLOC_CTL 0x57 /* VBSTMON TX Loc Ctl */ +#define CS35L35_VPBR_STATUS_TXLOC_CTL 0x58 /* VPBR Status TX Loc Ctl */ +#define CS35L35_ZERO_FILL_LOC_CTL 0x59 /* Zero Fill Loc Ctl */ +#define CS35L35_AUDIN_DEPTH_CTL 0x5A /* Audio Input Depth Ctl */ +#define CS35L35_SPKMON_DEPTH_CTL 0x5B /* SPK Mon Output Depth Ctl */ +#define CS35L35_SUPMON_DEPTH_CTL 0x5C /* Supply Mon Out Depth Ctl */ +#define CS35L35_ZEROFILL_DEPTH_CTL 0x5D /* Zero Fill Mon Output Ctl */ +#define CS35L35_MULT_DEV_SYNCH1 0x62 /* Multidevice Synch */ +#define CS35L35_MULT_DEV_SYNCH2 0x63 /* Multidevice Synch 2 */ +#define CS35L35_PROT_RELEASE_CTL 0x64 /* Protection Release Ctl */ +#define CS35L35_DIAG_MODE_REG_LOCK 0x68 /* Diagnostic Mode Reg Lock */ +#define CS35L35_DIAG_MODE_CTL_1 0x69 /* Diagnostic Mode Ctl 1 */ +#define CS35L35_DIAG_MODE_CTL_2 0x6A /* Diagnostic Mode Ctl 2 */ +#define CS35L35_INT_MASK_1 0x70 /* Interrupt Mask 1 */ +#define CS35L35_INT_MASK_2 0x71 /* Interrupt Mask 2 */ +#define CS35L35_INT_MASK_3 0x72 /* Interrupt Mask 3 */ +#define CS35L35_INT_MASK_4 0x73 /* Interrupt Mask 4 */ +#define CS35L35_INT_STATUS_1 0x74 /* Interrupt Status 1 */ +#define CS35L35_INT_STATUS_2 0x75 /* Interrupt Status 2 */ +#define CS35L35_INT_STATUS_3 0x76 /* Interrupt Status 3 */ +#define CS35L35_INT_STATUS_4 0x77 /* Interrupt Status 4 */ +#define CS35L35_PLL_STATUS 0x78 /* PLL Status */ +#define CS35L35_OTP_TRIM_STATUS 0x7E /* OTP Trim Status */ + +#define CS35L35_MAX_REGISTER 0x7F + +/* CS35L35_PWRCTL1 */ +#define CS35L35_SFT_RST 0x80 +#define CS35L35_DISCHG_FLT 0x02 +#define CS35L35_PDN_ALL 0x01 + +/* CS35L35_PWRCTL2 */ +#define CS35L35_PDN_VMON 0x80 +#define CS35L35_PDN_IMON 0x40 +#define CS35L35_PDN_CLASSH 0x20 +#define CS35L35_PDN_VPBR 0x10 +#define CS35L35_PDN_BST 0x04 +#define CS35L35_PDN_AMP 0x01 + +/* CS35L35_PWRCTL3 */ +#define CS35L35_PDN_VBSTMON_OUT 0x10 +#define CS35L35_PDN_VMON_OUT 0x08 + +#define CS35L35_AUDIN_DEPTH_MASK 0x03 +#define CS35L35_AUDIN_DEPTH_SHIFT 0 +#define CS35L35_ADVIN_DEPTH_MASK 0x12 +#define CS35L35_ADVIN_DEPTH_SHIFT 2 +#define CS35L35_SDIN_DEPTH_8 0x01 +#define CS35L35_SDIN_DEPTH_16 0x02 +#define CS35L35_SDIN_DEPTH_24 0x03 + +#define CS35L35_SDOUT_DEPTH_8 0x01 +#define CS35L35_SDOUT_DEPTH_12 0x02 +#define CS35L35_SDOUT_DEPTH_16 0x03 + +#define CS35L35_AUD_IN_LR_MASK 0x80 +#define CS35L35_AUD_IN_LR_SHIFT 7 +#define CS35L35_ADV_IN_LR_MASK 0x80 +#define CS35L35_ADV_IN_LR_SHIFT 7 +#define CS35L35_AUD_IN_LOC_MASK 0x0F +#define CS35L35_AUD_IN_LOC_SHIFT 0 +#define CS35L35_ADV_IN_LOC_MASK 0x0F +#define CS35L35_ADV_IN_LOC_SHIFT 0 + +#define CS35L35_IMON_DEPTH_MASK 0x03 +#define CS35L35_IMON_DEPTH_SHIFT 0 +#define CS35L35_VMON_DEPTH_MASK 0x0C +#define CS35L35_VMON_DEPTH_SHIFT 2 +#define CS35L35_VBSTMON_DEPTH_MASK 0x03 +#define CS35L35_VBSTMON_DEPTH_SHIFT 0 +#define CS35L35_VPMON_DEPTH_MASK 0x0C +#define CS35L35_VPMON_DEPTH_SHIFT 2 +#define CS35L35_VPBRSTAT_DEPTH_MASK 0x18 +#define CS35L35_VPBRSTAT_DEPTH_SHIFT 4 +#define CS35L35_ZEROFILL_DEPTH_MASK 0x03 +#define CS35L35_ZEROFILL_DEPTH_SHIFT 0x00 + +#define CS35L35_MON_TXLOC_MASK 0x3F +#define CS35L35_MON_TXLOC_SHIFT 0 +#define CS35L35_MON_FRM_MASK 0x80 +#define CS35L35_MON_FRM_SHIFT 7 + +#define CS35L35_MS_MASK 0x80 +#define CS35L35_MS_SHIFT 7 +#define CS35L35_SPMODE_MASK 0x40 +#define CS35L35_SP_DRV_MASK 0x10 +#define CS35L35_SP_DRV_SHIFT 4 +#define CS35L35_CLK_CTL2_MASK 0xFF +#define CS35L35_PDM_MODE_MASK 0x40 +#define CS35L35_PDM_MODE_SHIFT 6 +#define CS35L35_CLK_SOURCE_MASK 0x03 +#define CS35L35_CLK_SOURCE_SHIFT 0 +#define CS35L35_CLK_SOURCE_MCLK 0 +#define CS35L35_CLK_SOURCE_SCLK 1 +#define CS35L35_CLK_SOURCE_PDM 2 + +#define CS35L35_SP_SCLKS_MASK 0x0F +#define CS35L35_SP_SCLKS_SHIFT 0x00 +#define CS35L35_SP_SCLKS_16FS 0x03 +#define CS35L35_SP_SCLKS_32FS 0x07 +#define CS35L35_SP_SCLKS_48FS 0x0B +#define CS35L35_SP_SCLKS_64FS 0x0F +#define CS35L35_SP_RATE_MASK 0xC0 + +#define CS35L35_PDN_BST_MASK 0x06 +#define CS35L35_PDN_BST_FETON_SHIFT 1 +#define CS35L35_PDN_BST_FETOFF_SHIFT 2 +#define CS35L35_PWR2_PDN_MASK 0xE0 +#define CS35L35_PWR3_PDN_MASK 0x1E +#define CS35L35_PDN_ALL_MASK 0x01 +#define CS35L35_DISCHG_FILT_MASK 0x02 +#define CS35L35_DISCHG_FILT_SHIFT 1 +#define CS35L35_MCLK_DIS_MASK 0x04 +#define CS35L35_MCLK_DIS_SHIFT 2 + +#define CS35L35_BST_CTL_MASK 0x7F +#define CS35L35_BST_CTL_SHIFT 0 +#define CS35L35_BST_IPK_MASK 0x1F +#define CS35L35_BST_IPK_SHIFT 0 +#define CS35L35_AMP_MUTE_MASK 0x20 +#define CS35L35_AMP_MUTE_SHIFT 5 +#define CS35L35_AMP_GAIN_ZC_MASK 0x10 +#define CS35L35_AMP_GAIN_ZC_SHIFT 4 + +/* Class H Algorithm Control */ +#define CS35L35_CH_STEREO_MASK 0x40 +#define CS35L35_CH_STEREO_SHIFT 6 +#define CS35L35_CH_BST_OVR_MASK 0x04 +#define CS35L35_CH_BST_OVR_SHIFT 2 +#define CS35L35_CH_BST_LIM_MASK 0x08 +#define CS35L35_CH_BST_LIM_SHIFT 3 +#define CS35L35_CH_MEM_DEPTH_MASK 0x01 +#define CS35L35_CH_MEM_DEPTH_SHIFT 0 +#define CS35L35_CH_HDRM_CTL_MASK 0x3F +#define CS35L35_CH_HDRM_CTL_SHIFT 0 +#define CS35L35_CH_REL_RATE_MASK 0xFF +#define CS35L35_CH_REL_RATE_SHIFT 0 +#define CS35L35_CH_WKFET_DIS_MASK 0x80 +#define CS35L35_CH_WKFET_DIS_SHIFT 7 +#define CS35L35_CH_WKFET_DEL_MASK 0x70 +#define CS35L35_CH_WKFET_DEL_SHIFT 4 +#define CS35L35_CH_WKFET_THLD_MASK 0x0F +#define CS35L35_CH_WKFET_THLD_SHIFT 0 +#define CS35L35_CH_VP_AUTO_MASK 0x80 +#define CS35L35_CH_VP_AUTO_SHIFT 7 +#define CS35L35_CH_VP_RATE_MASK 0x60 +#define CS35L35_CH_VP_RATE_SHIFT 5 +#define CS35L35_CH_VP_MAN_MASK 0x1F +#define CS35L35_CH_VP_MAN_SHIFT 0 + +/* CS35L35_PROT_RELEASE_CTL */ +#define CS35L35_CAL_ERR_RLS 0x80 +#define CS35L35_SHORT_RLS 0x04 +#define CS35L35_OTW_RLS 0x02 +#define CS35L35_OTE_RLS 0x01 + +/* INT Mask Registers */ +#define CS35L35_INT1_CRIT_MASK 0x38 +#define CS35L35_INT2_CRIT_MASK 0xEF +#define CS35L35_INT3_CRIT_MASK 0xEE +#define CS35L35_INT4_CRIT_MASK 0xFF + +/* PDN DONE Masks */ +#define CS35L35_M_PDN_DONE_SHIFT 4 +#define CS35L35_M_PDN_DONE_MASK 0x10 + +/* CS35L35_INT_1 */ +#define CS35L35_CAL_ERR 0x80 +#define CS35L35_OTP_ERR 0x40 +#define CS35L35_LRCLK_ERR 0x20 +#define CS35L35_SPCLK_ERR 0x10 +#define CS35L35_MCLK_ERR 0x08 +#define CS35L35_AMP_SHORT 0x04 +#define CS35L35_OTW 0x02 +#define CS35L35_OTE 0x01 + +/* CS35L35_INT_2 */ +#define CS35L35_PDN_DONE 0x10 +#define CS35L35_VPBR_ERR 0x02 +#define CS35L35_VPBR_CLR 0x01 + +/* CS35L35_INT_3 */ +#define CS35L35_BST_HIGH 0x10 +#define CS35L35_BST_HIGH_FLAG 0x08 +#define CS35L35_BST_IPK_FLAG 0x04 +#define CS35L35_LBST_SHORT 0x01 + +/* CS35L35_INT_4 */ +#define CS35L35_VMON_OVFL 0x08 +#define CS35L35_IMON_OVFL 0x04 + +#define CS35L35_FORMATS (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | \ + SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) + +struct cs35l35_private { + struct snd_soc_codec *codec; + struct cs35l35_platform_data pdata; + struct regmap *regmap; + struct regulator_bulk_data supplies[2]; + int num_supplies; + int sysclk; + int sclk; + bool pdm_mode; + bool i2s_mode; + bool slave_mode; + /* GPIO for /RST */ + struct gpio_desc *reset_gpio; + struct completion pdn_done; +}; + +static const char * const cs35l35_supplies[] = { + "VA", + "VP", +}; + +#endif -- 1.9.1

3 2

[alsa-devel] [PATCH v2 0/3] Add support for es8323 and hdmi audio to the firefly-rk3288
by Romain Perier 23 Jan '17

23 Jan '17

This set of patches enables support for the es8323 codecs on the firefly-rk3288. It adds the required DT definitions to link rockchip-i2s to the es8388 analog output. As the support for HDMI audio is also built-in in the corresponding ASoC machine driver, HDMI audio output is also enabled. Changes in v2: - Adapted DT for the firefly-rk3288 to the ASoC machine driver rk3288-hdmi-analog - Added patch 02/03 to this series - Re-wrote this cover letter Romain Perier (3): SoC: es8328-i2c: Add compatible for ES8323 arm: dts: rockchip: Don't set otp-gpio pinctrl by default in rk3288.dtsi arm: dts: Add support for ES8323 to the Firefly-RK3288 Documentation/devicetree/bindings/sound/es8328.txt | 5 +++- arch/arm/boot/dts/rk3288-evb.dtsi | 4 +++ arch/arm/boot/dts/rk3288-firefly.dtsi | 34 ++++++++++++++++++++++ arch/arm/boot/dts/rk3288-veyron.dtsi | 4 +++ arch/arm/boot/dts/rk3288.dtsi | 4 --- sound/soc/codecs/es8328-i2c.c | 2 ++ 6 files changed, 48 insertions(+), 5 deletions(-) -- 2.9.3

1 3

[alsa-devel] [PATCH v2] ALSA: ymfpci: Handle return NULL error from ioremap_nocache
by Arvind Yadav 23 Jan '17

23 Jan '17

Here, If ioremap_nocache will fail. It will return NULL. Kernel can run into a NULL-pointer dereference. This error check will avoid NULL pointer dereference. Signed-off-by: Arvind Yadav <arvind.yadav.cs(a)gmail.com> --- sound/pci/ymfpci/ymfpci_main.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/sound/pci/ymfpci/ymfpci_main.c b/sound/pci/ymfpci/ymfpci_main.c index ffee284..8590c3f 100644 --- a/sound/pci/ymfpci/ymfpci_main.c +++ b/sound/pci/ymfpci/ymfpci_main.c @@ -2392,6 +2392,10 @@ int snd_ymfpci_create(struct snd_card *card, chip->rev = pci->revision; chip->reg_area_phys = pci_resource_start(pci, 0); chip->reg_area_virt = ioremap_nocache(chip->reg_area_phys, 0x8000); + if (!chip->reg_area_virt) { + pci_disable_device(pci); + return -ENOMEM; + } pci_set_master(pci); chip->src441_used = -1; -- 1.9.1

2 1

[alsa-devel] [PATCH v4 0/3] Generic HDMI codec: Add channel mapping control
by Arnaud Pouliquen 23 Jan '17

23 Jan '17

Aim of this patch is to add 'Playback Channel Map' control to export audio capabilities in term of HDMI sink speakers allocation. V4: Abandon "Generic HDMI codec: Add channel mapping control" patch as it generates warnings during compilation. Workaround is to define 2 constant tables in hdmi-codec.c to declare channel mapping. One for stereo and one for multichannel. Consequence is that the behaviour is changed: The chmap multichannel table export the HDMI CA configuration (tlv) and not only the one suuported by HDMI sink. Furthermore the chmap control .get handler is overwritten to allow to export to user the selected configuration. - "ASoC: hdmi-codec: add channel mapping control": - add hdmi_codec_stereo_chmaps and hdmi_codec_8ch_chmaps tables. - implement chmap control get handler. - "DRM: add help to get ELD speaker allocation" => No delta vs V2. - "ALSA pcm: allow non constant snd_pcm_chmap_elem" => abandonned - "ASoC: core: add optional pcm_new callback for DAI driver" => No delta vs V2. V3: - "ASoC: hdmi-codec: add channel mapping control": => Minor fixes: - select stereo speaker config by default if HDMI cable unplugged - fix compilation warning. - "DRM: add help to get ELD speaker allocation" => No delta vs V2. - "ALSA pcm: allow non constant snd_pcm_chmap_elem" => No delta vs V2. - "ASoC: core: add optional pcm_new callback for DAI driver" => No delta vs V2. V2: In this version I use chmap helper functions from pcm_lib.c. It is quite tricky to use it from ASoC due to the relation chip of the controls with the pcm runtime. After several tries, my conclusion is that it must be handled in ASoC DAI driver. Main reason is that the DAI driver can not provide snd_pcm_chmap struct through kcontrol structure. But this induces that soc-core provides pcm runtime structure to DAI driver during probe. Base on this conclusion. I reworked my patches by adding 2 new patches in patch-set 1) ALSA pcm: allow non constant snd_pcm_chmap_elem This patch allows to handle non constant channel mapping. As ELD information can change during runtime it is mandatory to properly handle the feature. In term of compatibility with legacy it should be straightforward, as update just consists in suppressing the 'const' constraint. 2) ASoC: core: add optional pcm_new callback for DAI driver This is the only way i found to be able to use snd_pcm_add_chmap_ctls and associated controls helper functions. From my point of view, this is the more simple way to add relationship between DAI and associated pcm devices. Notice that this patch, if accepted, makes the following one obsolete, as it also answer to the associated topic: [PATCH v5 0/2] ALSA controls management using index/device/sub-devices fields (http://www.spinics.net/lists/alsa-devel/msg57639.html). If you estimate that this it not reasonable i will come back to my first version. V1: This patch follows discussion initiate here: [RFC] ASOC: HDMI audio info frame speaker allocation http://www.spinics.net/lists/alsa-devel/msg57363.html The code is fully inspired from HDA driver. On hw_param, HDMI sink speaker capabilities are exported via TLV ops and a CEA allocation is choson, based on ELD information and the number of channels requested by user. Mains differences with HDA implementation are: - Control is read only - Channel swap is not supported. Consequence is that unused channel in the mid of CEA audio infoframe channel mapping are considered as active. example for channel allocation 0x02: FL, FR, 0, FC) This configuration is only available for a 4 channels stream. - Channel allocation table has been reordered and HDMI 2.0 is not supported. Arnaud Pouliquen (4): DRM: add help to get ELD speaker allocation ASoC: core: add optional pcm_new callback for DAI driver ASoC: hdmi-codec: add channel mapping control include/drm/drm_edid.h | 13 ++ include/sound/soc-dai.h | 3 + sound/soc/codecs/hdmi-codec.c | 380 +++++++++++++++++++++++++++++++++++++++++- sound/soc/soc-core.c | 28 ++++ 4 files changed, 423 insertions(+), 1 deletion(-) -- 1.9.1

4 11

[alsa-devel] [PATCH] alsaloop: Correct check in if condition
by Paul Menzel 23 Jan '17

23 Jan '17

Date: Mon, 23 Jan 2017 11:45:13 +0100 Fix the error below found by gcc (Debian 6.3.0-4) 6.3.0 20170121. ``` gcc -DHAVE_CONFIG_H -I. -I../include -I../include -D_GNU_SOURCE -O2 -Wall -pipe -g -MT pcmjob.o -MD -MP -MF .deps/pcmjob.Tpo -c -o pcmjob.o pcmjob.c pcmjob.c: In function 'pcmjob_start': pcmjob.c:1482:27: warning: self-comparison always evaluates to true [-Wtautological-compare] loop->play->channels == loop->play->channels && ^~ ``` Judging from the surrounding code, the check should make sure the channels of the play and capture device are equal. Signed-off-by: Paul Menzel <pmenzel(a)molgen.mpg.de> --- I hope, this patch gets through without any mangling from Mozilla Thunderbird. alsaloop/pcmjob.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/alsaloop/pcmjob.c b/alsaloop/pcmjob.c index 4df59e8..2be0732 100644 --- a/alsaloop/pcmjob.c +++ b/alsaloop/pcmjob.c @@ -1479,7 +1479,7 @@ __again: if (loop->play->access == loop->capt->access && loop->play->format == loop->capt->format && loop->play->rate == loop->capt->rate && - loop->play->channels == loop->play->channels && + loop->play->channels == loop->capt->channels && loop->sync != SYNC_TYPE_SAMPLERATE) { if (verbose > 1) snd_output_printf(loop->output, "shared buffer!!!\n"); -- 2.4.1

1 0

[alsa-devel] [PATCH 1/2] ASoC: nau8825: correct the function name of register
by John Hsu 23 Jan '17

23 Jan '17

Change to correct name of the register function. Signed-off-by: John Hsu <KCHSU0(a)nuvoton.com> --- sound/soc/codecs/nau8825.c | 6 +++--- sound/soc/codecs/nau8825.h | 4 ++-- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/sound/soc/codecs/nau8825.c b/sound/soc/codecs/nau8825.c index e4fb017..9c98d35 100644 --- a/sound/soc/codecs/nau8825.c +++ b/sound/soc/codecs/nau8825.c @@ -561,9 +561,9 @@ static void nau8825_xtalk_prepare(struct nau8825 *nau8825) nau8825_xtalk_backup(nau8825); /* Config IIS as master to output signal by codec */ regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2, - NAU8825_I2S_MS_MASK | NAU8825_I2S_DRV_MASK | + NAU8825_I2S_MS_MASK | NAU8825_I2S_LRC_DIV_MASK | NAU8825_I2S_BLK_DIV_MASK, NAU8825_I2S_MS_MASTER | - (0x2 << NAU8825_I2S_DRV_SFT) | 0x1); + (0x2 << NAU8825_I2S_LRC_DIV_SFT) | 0x1); /* Ramp up headphone volume to 0dB to get better performance and * avoid pop noise in headphone. */ @@ -657,7 +657,7 @@ static void nau8825_xtalk_clean(struct nau8825 *nau8825) NAU8825_IRQ_RMS_EN, NAU8825_IRQ_RMS_EN); /* Recover default value for IIS */ regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2, - NAU8825_I2S_MS_MASK | NAU8825_I2S_DRV_MASK | + NAU8825_I2S_MS_MASK | NAU8825_I2S_LRC_DIV_MASK | NAU8825_I2S_BLK_DIV_MASK, NAU8825_I2S_MS_SLAVE); /* Restore value of specific register for cross talk */ nau8825_xtalk_restore(nau8825); diff --git a/sound/soc/codecs/nau8825.h b/sound/soc/codecs/nau8825.h index 5732ce1..4b390c4 100644 --- a/sound/soc/codecs/nau8825.h +++ b/sound/soc/codecs/nau8825.h @@ -248,8 +248,8 @@ /* I2S_PCM_CTRL2 (0x1d) */ #define NAU8825_I2S_TRISTATE (1 << 15) /* 0 - normal mode, 1 - Hi-Z output */ -#define NAU8825_I2S_DRV_SFT 12 -#define NAU8825_I2S_DRV_MASK (0x3 << NAU8825_I2S_DRV_SFT) +#define NAU8825_I2S_LRC_DIV_SFT 12 +#define NAU8825_I2S_LRC_DIV_MASK (0x3 << NAU8825_I2S_LRC_DIV_SFT) #define NAU8825_I2S_MS_SFT 3 #define NAU8825_I2S_MS_MASK (1 << NAU8825_I2S_MS_SFT) #define NAU8825_I2S_MS_MASTER (1 << NAU8825_I2S_MS_SFT) -- 2.6.4

2 6

[alsa-devel] [PATCH v1] sound: pci: ymfpci: ymfpci_main:- Handle return NULL error from ioremap_nocache
by Arvind Yadav 23 Jan '17

23 Jan '17

Here, If ioremap_nocache will fail. It will return NULL. Kernel can run into a NULL-pointer dereference. This error check will avoid NULL pointer dereference. Signed-off-by: Arvind Yadav <arvind.yadav.cs(a)gmail.com> --- sound/pci/ymfpci/ymfpci_main.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/sound/pci/ymfpci/ymfpci_main.c b/sound/pci/ymfpci/ymfpci_main.c index ffee284..8590c3f 100644 --- a/sound/pci/ymfpci/ymfpci_main.c +++ b/sound/pci/ymfpci/ymfpci_main.c @@ -2392,6 +2392,10 @@ int snd_ymfpci_create(struct snd_card *card, chip->rev = pci->revision; chip->reg_area_phys = pci_resource_start(pci, 0); chip->reg_area_virt = ioremap_nocache(chip->reg_area_phys, 0x8000); + if (!chip->reg_area_virt) { + pci_disable_device(pci); + return -ENOMEM; + } pci_set_master(pci); chip->src441_used = -1; -- 1.9.1

2 2

[alsa-devel] [PATCH][resend] ASoC: simple-card: use devm_get_clk_from_child()
by Kuninori Morimoto 23 Jan '17

23 Jan '17

From: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com> Current simple-card-utils is getting clk by of_clk_get(), but didn't call clk_free(). Now we can use devm_get_clk_from_child() for this purpose. Let's use it. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com> --- > Mark Latest linus tree has below which is required by this patch. 71a2f11511b4d1dc8b8e326e10ec6533b534ddf1 ("clk: add devm_get_clk_from_child() API") include/sound/simple_card_utils.h | 11 ++++++----- sound/soc/generic/simple-card-utils.c | 8 ++++---- sound/soc/generic/simple-card.c | 4 ++-- sound/soc/generic/simple-scu-card.c | 4 ++-- 4 files changed, 14 insertions(+), 13 deletions(-) diff --git a/include/sound/simple_card_utils.h b/include/sound/simple_card_utils.h index 64e90ca..af58d23 100644 --- a/include/sound/simple_card_utils.h +++ b/include/sound/simple_card_utils.h @@ -34,11 +34,12 @@ int asoc_simple_card_set_dailink_name(struct device *dev, int asoc_simple_card_parse_card_name(struct snd_soc_card *card, char *prefix); -#define asoc_simple_card_parse_clk_cpu(node, dai_link, simple_dai) \ - asoc_simple_card_parse_clk(node, dai_link->cpu_of_node, simple_dai) -#define asoc_simple_card_parse_clk_codec(node, dai_link, simple_dai) \ - asoc_simple_card_parse_clk(node, dai_link->codec_of_node, simple_dai) -int asoc_simple_card_parse_clk(struct device_node *node, +#define asoc_simple_card_parse_clk_cpu(dev, node, dai_link, simple_dai) \ + asoc_simple_card_parse_clk(dev, node, dai_link->cpu_of_node, simple_dai) +#define asoc_simple_card_parse_clk_codec(dev, node, dai_link, simple_dai) \ + asoc_simple_card_parse_clk(dev, node, dai_link->codec_of_node, simple_dai) +int asoc_simple_card_parse_clk(struct device *dev, + struct device_node *node, struct device_node *dai_of_node, struct asoc_simple_dai *simple_dai); diff --git a/sound/soc/generic/simple-card-utils.c b/sound/soc/generic/simple-card-utils.c index cf02625..4924575 100644 --- a/sound/soc/generic/simple-card-utils.c +++ b/sound/soc/generic/simple-card-utils.c @@ -98,7 +98,8 @@ int asoc_simple_card_parse_card_name(struct snd_soc_card *card, } EXPORT_SYMBOL_GPL(asoc_simple_card_parse_card_name); -int asoc_simple_card_parse_clk(struct device_node *node, +int asoc_simple_card_parse_clk(struct device *dev, + struct device_node *node, struct device_node *dai_of_node, struct asoc_simple_dai *simple_dai) { @@ -111,14 +112,13 @@ int asoc_simple_card_parse_clk(struct device_node *node, * or "system-clock-frequency = <xxx>" * or device's module clock. */ - clk = of_clk_get(node, 0); + clk = devm_get_clk_from_child(dev, node, NULL); if (!IS_ERR(clk)) { simple_dai->sysclk = clk_get_rate(clk); - simple_dai->clk = clk; } else if (!of_property_read_u32(node, "system-clock-frequency", &val)) { simple_dai->sysclk = val; } else { - clk = of_clk_get(dai_of_node, 0); + clk = devm_get_clk_from_child(dev, dai_of_node, NULL); if (!IS_ERR(clk)) simple_dai->sysclk = clk_get_rate(clk); } diff --git a/sound/soc/generic/simple-card.c b/sound/soc/generic/simple-card.c index a385ff6..85b4f18 100644 --- a/sound/soc/generic/simple-card.c +++ b/sound/soc/generic/simple-card.c @@ -278,11 +278,11 @@ static int asoc_simple_card_dai_link_of(struct device_node *node, if (ret < 0) goto dai_link_of_err; - ret = asoc_simple_card_parse_clk_cpu(cpu, dai_link, cpu_dai); + ret = asoc_simple_card_parse_clk_cpu(dev, cpu, dai_link, cpu_dai); if (ret < 0) goto dai_link_of_err; - ret = asoc_simple_card_parse_clk_codec(codec, dai_link, codec_dai); + ret = asoc_simple_card_parse_clk_codec(dev, codec, dai_link, codec_dai); if (ret < 0) goto dai_link_of_err; diff --git a/sound/soc/generic/simple-scu-card.c b/sound/soc/generic/simple-scu-card.c index bb86ee0..308ff4c 100644 --- a/sound/soc/generic/simple-scu-card.c +++ b/sound/soc/generic/simple-scu-card.c @@ -128,7 +128,7 @@ static int asoc_simple_card_dai_link_of(struct device_node *np, if (ret) return ret; - ret = asoc_simple_card_parse_clk_cpu(np, dai_link, dai_props); + ret = asoc_simple_card_parse_clk_cpu(dev, np, dai_link, dai_props); if (ret < 0) return ret; @@ -153,7 +153,7 @@ static int asoc_simple_card_dai_link_of(struct device_node *np, if (ret < 0) return ret; - ret = asoc_simple_card_parse_clk_codec(np, dai_link, dai_props); + ret = asoc_simple_card_parse_clk_codec(dev, np, dai_link, dai_props); if (ret < 0) return ret; -- 1.9.1

1 0

[alsa-devel] Nokia N900: mixers changed between 4.6 and 4.10, no longer can use in-call speaker
by Pavel Machek 20 Jan '17

20 Jan '17

Hi! In v4.10 (and probably v4.9, too) I can no longer use the in-call speaker. I can no longer use the wired headset, either. v4.4 (and probably v4.6) works ok. Any ideas? Does wired headset / in-call speaker work for you? "Mono" and "Mono DAC" options are still there.. but something else changed, as alsamixer now shows way many more options (meaning they are shorter?) and I get complains from alsactl: alsactl: set_control:1328: failed to obtain info for control #49 (No such file or directory) ... alsactl: set_control:1328: failed to obtain info for control #229 (No such file or directory) Pavel -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html

5 16

[alsa-devel] [PATCH v5 0/2] ALSA controls management using index/device/sub-devices fields
by Arnaud Pouliquen 20 Jan '17

20 Jan '17

Previous discussions summary: - Topic of the patchset: Patch concerns ASoc DAI drivers. Aim is to be able to instantiate PCM control using device field according to the associated PCM char device. For this, a relationship between DAIs PCM control and PCM char device needs to be establish. => Proposal is to add field in DAI driver struct to declare PCM controls that need to be linked to PCM character device on DAI link probing. - Limitation of the patchset: This patchset seems only a first step as 2 concerns are been highlighted: - Patch is limited to "static" DAI-link. This not responds to backend (no_pcm dai links) and some none-DAI codecs, that could register PCm controls. In theses cases it is not possible to establish relationship during probe. => No solution proposed for time beeing. - This patchset does not fix conflict of 2 "identical" PCM controls declared by 2 drivers. For instance, a conflict can exist between a PCM control created in DAI driver and the same control declared in a codec driver. As index field is forced to 0, prefix should be used in codec. => To discuss solution in a separate thread as issue already present without this patchset several approaches seem possible like using index field ( control auto indexation in ASoC) or prefix in Naming. V5: - [PATCH v5 1/2] ASoC: core: allow DAI PCM controls bound to PCM device Minor fixes in comment and error message. - [PATCH v5 2/2] ASoC: sti: bind pcm controls to pcm device. No change since V2. V4: - [PATCH v4 1/2] ASoC: core: allow DAI PCM controls bound to PCM device Fix and rework error management in soc_link_dai_pcm_controls function. - [PATCH v4 2/2] ASoC: sti: bind pcm controls to pcm device. No change since V2. V3: - [PATCH v3 1/2] ASoC: core: allow DAI PCM controls bound to PCM device Code optimization based on Takashi Sakamoto suggestion - [RFC V2 3/3] ASoC: hdmi-codec: Example of PCM control bound to PCM device for multi patch suppressed as it was send as example in previous version. Patch is valid but can have impact on existing drivers as control device field value is updated - [PATCH v3 2/2] ASoC: sti: bind pcm controls to pcm device. No change vs V2 V2: http://www.spinics.net/lists/alsa-devel/msg57045.html Aim of this version is to continue discussion on DAI PCM control focused on ASoC drivers. In this V2 implementation in Soc-core is simplified to limit impact on existing code. Update of the RFC V1 based on discussions: - [RFC 4/4] iecset: allow to select control with device and sub-device numbers no more part of the RFC V2, will be discussed in a separate thread - [RFC 2/4] ALSA: control: increment index field for duplicated control. no more part of the RFC V2, no more need as RFC subject is PCM controls - [RFC V2 1/3] ASoC: core: allow DAI PCM controls bound to PCM device Patch reworked from V1 to simplify implementation - Binding is not done for Dai links tagged with no_pcm (DPCM). - no more possibility to add the controls after the DAI link probing. - [RFC V2 2/3] ASoC: sti: bind PCM controls to PCM device. - [RFC V2 3/3] ASoC: hdmi-codec: Example of PCM control bound to PCM device for multi Example of implementation in STI DAI driver and HDMI-codec drivers V1: http://www.spinics.net/lists/alsa-devel/msg56479.html 1) Alsa-utils patch - iecset: allow to select control with device and sub-device numbers This patch allows to access to 2 iec controls differentiated by device/sub-devices numbers => For me, this patch is mandatory to be able to address the ASoC IEC controls, in case of no fix is implemented to allows index field update in ASoC. 2) Alsa driver patches - ASoC: core: allow PCM control binding to PCM device Add relationship between DAIs PCM controls and PCM device. - ALSA: control: increment index field for duplicated control. Generic implementation of the patch proposed in HDA driver (http://git.kernel.org/cgit/linux/kernel/git/tiwai/sound.git/commit/?id=ea9b…) - ASoC: sti: use bind_pcm_ctl implementation of bind_pcm_ctl for sti driver. Arnaud Pouliquen (2): ASoC: core: allow DAI PCM controls bound to PCM device ASoC: sti: bind pcm controls to pcm device. include/sound/soc-dai.h | 8 ++++++++ sound/soc/soc-core.c | 35 +++++++++++++++++++++++++++++++++++ sound/soc/sti/sti_uniperif.c | 33 ++++----------------------------- 3 files changed, 47 insertions(+), 29 deletions(-) -- 1.9.1

2 4

[alsa-devel] [PATCH 0/2] Generic HDMI codec: Add channel mapping control
by Arnaud Pouliquen 20 Jan '17

20 Jan '17

Aim of this patch is to add 'Playback Channel Map' control to export audio capabilities in term of HDMI sink speakers allocation. This patch follow discussion initiates here: [RFC] ASOC: HDMI audio info frame speaker allocation http://www.spinics.net/lists/alsa-devel/msg57363.html The code is fully inspired from HDA driver. On hw_param, HDMI sink speaker capabilities are exported via TLV ops and a CEA allocation is choson, based on ELD information and the number of channels requested by user. Mains differences with HDA implementation are: - Control is read only - Channel swap is not supported. Consequence is that unused channel in the mid of CEA audio infoframe channel mapping are considered as active. example for channel allocation 0x02: FL, FR, 0, FC) This configuration is only available for a 4 channels stream. - Channel allocation table has been reordered and HDMI 2.0 is not supported. Arnaud Pouliquen (2): DRM: add help to get ELD speaker allocation ASoC: hdmi-codec: add channel mapping control include/drm/drm_edid.h | 13 ++ sound/soc/codecs/hdmi-codec.c | 346 +++++++++++++++++++++++++++++++++++++++++- 2 files changed, 358 insertions(+), 1 deletion(-) -- 1.9.1

4 20

[alsa-devel] [PATCH v2 0/4] Generic HDMI codec: Add channel mapping control
by Arnaud Pouliquen 20 Jan '17

20 Jan '17

Aim of this patch is to add 'Playback Channel Map' control to export audio capabilities in term of HDMI sink speakers allocation. V2: In this version I use chmap helper functions from pcm_lib.c. It is quite tricky to use it from ASoC due to the relation chip of the controls with the pcm runtime. After several tries, my conclusion is that it must be handled in ASoC DAI driver. Main reason is that the DAI driver can not provide snd_pcm_chmap struct through kcontrol structure. But this induces that soc-core provides pcm runtime structure to DAI driver during probe. Base on this conclusion. I reworked my patches by adding 2 new patches in patch-set 1) ALSA pcm: allow non constant snd_pcm_chmap_elem This patch allows to handle non constant channel mapping. As ELD information can change during runtime it is mandatory to properly handle the feature. In term of compatibility with legacy it should be straightforward, as update just consists in suppressing the 'const' constraint. 2) ASoC: core: add optional pcm_new callback for DAI driver This is the only way i found to be able to use snd_pcm_add_chmap_ctls and associated controls helper functions. From my point of view, this is the more simple way to add relationship between DAI and associated pcm devices. Notice that this patch, if accepted, makes the following one obsolete, as it also answer to the associated topic: [PATCH v5 0/2] ALSA controls management using index/device/sub-devices fields (http://www.spinics.net/lists/alsa-devel/msg57639.html). If you estimate that this it not reasonable i will come back to my first version. V1: This patch follow discussion initiates here: [RFC] ASOC: HDMI audio info frame speaker allocation http://www.spinics.net/lists/alsa-devel/msg57363.html The code is fully inspired from HDA driver. On hw_param, HDMI sink speaker capabilities are exported via TLV ops and a CEA allocation is choson, based on ELD information and the number of channels requested by user. Mains differences with HDA implementation are: - Control is read only - Channel swap is not supported. Consequence is that unused channel in the mid of CEA audio infoframe channel mapping are considered as active. example for channel allocation 0x02: FL, FR, 0, FC) This configuration is only available for a 4 channels stream. - Channel allocation table has been reordered and HDMI 2.0 is not supported. Arnaud Pouliquen (4): DRM: add help to get ELD speaker allocation ALSA pcm: allow non constant snd_pcm_chmap_elem ASoC: core: add optional pcm_new callback for DAI driver ASoC: hdmi-codec: add channel mapping control include/drm/drm_edid.h | 13 ++ include/sound/pcm.h | 4 +- include/sound/soc-dai.h | 3 + sound/core/pcm_lib.c | 6 +- sound/soc/codecs/hdmi-codec.c | 310 +++++++++++++++++++++++++++++++++++++++++- sound/soc/soc-core.c | 28 ++++ 6 files changed, 358 insertions(+), 6 deletions(-) -- 1.9.1

5 9

[alsa-devel] [PATCH v3 0/4] Add support for es8388 on the rock2
by Romain Perier 20 Jan '17

20 Jan '17

This set of patches adds a machine driver for rockchip boards that use ES8388 codecs. It also adds slave mode to the es8328 driver that currently only supported the master mode. Then, it adds the required DT definitions to link rockchip-i2s to the es8388 analog output. This work is based on the initial work that was done by Sjoerd Simons <sjoerd.simons(a)collabora.co.uk> with some improvements, changes and more commits. Changes in v3: - Cosmetic changes in rockchip_es8388.c - Added missing email to MODULE_AUTHOR in rockchip_es8388.c Changes in v2: - Fixed wrong use of the data structure i2c_device_id - Fixed wrong dependencies for SND_SOC_ROCKCHIP_ES8388 Romain Perier (4): ASoC: es8328-i2c: Add compatible for ES8388 ASoC: es8328: Add support for slave mode ASoC: rockchip: Add machine driver for ES8388 codecs arm: dts: Add support for ES8388 to the Radxa Rock 2 Documentation/devicetree/bindings/sound/es8328.txt | 2 +- .../devicetree/bindings/sound/rockchip-es8388.txt | 28 +++ arch/arm/boot/dts/rk3288-rock2-square.dts | 37 +++ sound/soc/codecs/es8328-i2c.c | 2 + sound/soc/codecs/es8328.c | 28 ++- sound/soc/rockchip/Kconfig | 9 + sound/soc/rockchip/Makefile | 2 + sound/soc/rockchip/rockchip_es8388.c | 269 +++++++++++++++++++++ 8 files changed, 370 insertions(+), 7 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/rockchip-es8388.txt create mode 100644 sound/soc/rockchip/rockchip_es8388.c -- 2.9.3

1 5

[alsa-devel] [PATCH] ASoC: sunxi: Add bindings for sun8i to SPDIF
by codekipper＠gmail.com 20 Jan '17

20 Jan '17

From: Marcus Cooper <codekipper(a)gmail.com> The H3 SoC uses the same SPDIF block as found in earlier SoCs, but the transmit fifo is at a different address. Signed-off-by: Marcus Cooper <codekipper(a)gmail.com> --- Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt b/Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt index 0230c4d20506..fe0a65e6d629 100644 --- a/Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt +++ b/Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt @@ -10,6 +10,7 @@ Required properties: - compatible : should be one of the following: - "allwinner,sun4i-a10-spdif": for the Allwinner A10 SoC - "allwinner,sun6i-a31-spdif": for the Allwinner A31 SoC + - "allwinner,sun8i-h3-spdif": for the Allwinner H3 SoC - reg : Offset and length of the register set for the device. -- 2.11.0

4 6

[alsa-devel] [PATCH] ASoC: sun4i-spdif: Add support for the H3 SoC
by codekipper＠gmail.com 20 Jan '17

20 Jan '17

From: Marcus Cooper <codekipper(a)gmail.com> The H3 SoC uses the same SPDIF block as found in earlier SoCs, but its TXFIFO is mapped to another address. Signed-off-by: Marcus Cooper <codekipper(a)gmail.com> --- sound/soc/sunxi/sun4i-spdif.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/sound/soc/sunxi/sun4i-spdif.c b/sound/soc/sunxi/sun4i-spdif.c index fec62ee1fc72..c03cd07a9b19 100644 --- a/sound/soc/sunxi/sun4i-spdif.c +++ b/sound/soc/sunxi/sun4i-spdif.c @@ -103,6 +103,8 @@ #define SUN4I_SPDIF_ISTA_RXOSTA BIT(1) #define SUN4I_SPDIF_ISTA_RXASTA BIT(0) +#define SUN8I_SPDIF_TXFIFO (0x20) + #define SUN4I_SPDIF_TXCNT (0x24) #define SUN4I_SPDIF_RXCNT (0x28) @@ -417,6 +419,11 @@ static const struct sun4i_spdif_quirks sun6i_a31_spdif_quirks = { .has_reset = true, }; +static const struct sun4i_spdif_quirks sun8i_h3_spdif_quirks = { + .reg_dac_txdata = SUN8I_SPDIF_TXFIFO, + .has_reset = true, +}; + static const struct of_device_id sun4i_spdif_of_match[] = { { .compatible = "allwinner,sun4i-a10-spdif", @@ -426,6 +433,10 @@ static const struct of_device_id sun4i_spdif_of_match[] = { .compatible = "allwinner,sun6i-a31-spdif", .data = &sun6i_a31_spdif_quirks, }, + { + .compatible = "allwinner,sun8i-h3-spdif", + .data = &sun8i_h3_spdif_quirks, + }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, sun4i_spdif_of_match); -- 2.11.0

3 2

[alsa-devel] [PATCH] ASoC: dapm: fix some pointer error handling
by Linus Walleij 20 Jan '17

20 Jan '17

commit 66feeec9322132689d42723df2537d60f96f8e44 "RFC: ASoC: dapm: handle probe deferrals" forgot a to update some two sites where the call was used. The static codechecks quickly found them. Cc: Lars-Peter Clausen <lars(a)metafoo.de> Cc: Dan Carpenter <dan.carpenter(a)oracle.com> Reported-by: Dan Carpenter <dan.carpenter(a)oracle.com> Fixes: 66feeec93221 ("RFC: ASoC: dapm: handle probe deferrals") Signed-off-by: Linus Walleij <linus.walleij(a)linaro.org> --- sound/soc/soc-dapm.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/sound/soc/soc-dapm.c b/sound/soc/soc-dapm.c index b218cc7bd994..dcef67a9bd48 100644 --- a/sound/soc/soc-dapm.c +++ b/sound/soc/soc-dapm.c @@ -3935,6 +3935,16 @@ int snd_soc_dapm_new_dai_widgets(struct snd_soc_dapm_context *dapm, template.name); w = snd_soc_dapm_new_control_unlocked(dapm, &template); + if (IS_ERR(w)) { + int ret = PTR_ERR(w); + + /* Do not nag about probe deferrals */ + if (ret != -EPROBE_DEFER) + dev_err(dapm->dev, + "ASoC: Failed to create %s widget (%d)\n", + dai->driver->playback.stream_name, ret); + return ret; + } if (!w) { dev_err(dapm->dev, "ASoC: Failed to create %s widget\n", dai->driver->playback.stream_name); @@ -3954,6 +3964,16 @@ int snd_soc_dapm_new_dai_widgets(struct snd_soc_dapm_context *dapm, template.name); w = snd_soc_dapm_new_control_unlocked(dapm, &template); + if (IS_ERR(w)) { + int ret = PTR_ERR(w); + + /* Do not nag about probe deferrals */ + if (ret != -EPROBE_DEFER) + dev_err(dapm->dev, + "ASoC: Failed to create %s widget (%d)\n", + dai->driver->playback.stream_name, ret); + return ret; + } if (!w) { dev_err(dapm->dev, "ASoC: Failed to create %s widget\n", dai->driver->capture.stream_name); -- 2.9.3

2 1

[alsa-devel] Intel HDA audio on EEE PC 1101HGo
by Enrico Mioso 20 Jan '17

20 Jan '17

Hello guys. I am writing to you all to talk you about a strange behaviour of the Intel HDA Audio device on an EEE PC 1101H. The audio device at some point simply doesn't react to commands, giving in dmesgo utput like this: [22321.638079] snd_hda_intel 0000:00:1b.0: azx_get_response timeout, switching to polling mode: last cmd=0x00170503 [22322.641410] snd_hda_intel 0000:00:1b.0: azx_get_response timeout, switching to single_cmd mode: last cmd=0x00170503 This may happen when I boot the system up fresh (here there is no Windows and no hibernation), or when the controller goes to power-save. If I don't set a power save timeout, then the controller will not be recoverable if it gets stuck at boot. As a workaround, I set a very short timeout, so that when the controller fails to start audio, waiting some time and retrying will work. Preliminary infos: Card: HDA Intel MID Chip: Realtek ALC269; Thank you in advance for your help. Please keep me in CC - since I am not subscribed to any list. Enrico Here follows a lspci 00:00.0 Host bridge: Intel Corporation System Controller Hub (SCH Poulsbo) (rev 07) Subsystem: ASUSTeK Computer Inc. Device 83ce Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 00:02.0 VGA compatible controller: Intel Corporation System Controller Hub (SCH Poulsbo) Graphics Controller (rev 07) (prog-if 00 [VGA controller]) Subsystem: ASUSTeK Computer Inc. Device 83ce Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 5 Region 0: Memory at f3f80000 (32-bit, non-prefetchable) [size=512K] Region 1: I/O ports at c880 [size=8] Region 2: Memory at d0000000 (32-bit, non-prefetchable) [size=256M] Region 3: Memory at f3f40000 (32-bit, non-prefetchable) [size=256K] Expansion ROM at <unassigned> [disabled] Capabilities: [d0] Power Management version 2 Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [b0] Vendor Specific Information: Len=07 <?> Capabilities: [90] MSI: Enable- Count=1/1 Maskable- 64bit- Address: 00000000 Data: 0000 Kernel modules: gma500_gfx 00:1b.0 Audio device: Intel Corporation System Controller Hub (SCH Poulsbo) HD Audio Controller (rev 07) Subsystem: ASUSTeK Computer Inc. Device 83ce Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Interrupt: pin A routed to IRQ 23 Region 0: Memory at f3f38000 (64-bit, non-prefetchable) [size=16K] Capabilities: [50] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold-) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [70] Express (v1) Root Complex Integrated Endpoint, MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0 ExtTag- RBE- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend+ Capabilities: [100 v1] Virtual Channel Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 Arb: Fixed- WRR32- WRR64- WRR128- Ctrl: ArbSelect=Fixed Status: InProgress- VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256- Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01 Status: NegoPending- InProgress- VC1: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256- Ctrl: Enable- ID=0 ArbSelect=Fixed TC/VC=00 Status: NegoPending- InProgress- Capabilities: [130 v1] Root Complex Link Desc: PortNumber=0f ComponentID=00 EltType=Config Link0: Desc: TargetPort=00 TargetComponent=00 AssocRCRB- LinkType=MemMapped LinkValid+ Addr: 00000000f0000000 Kernel driver in use: snd_hda_intel Kernel modules: snd_hda_intel 00:1c.0 PCI bridge: Intel Corporation System Controller Hub (SCH Poulsbo) PCI Express Port 1 (rev 07) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Interrupt: pin A routed to IRQ 16 Bus: primary=00, secondary=03, subordinate=03, sec-latency=0 I/O behind bridge: 0000e000-0000efff Memory behind bridge: fbf00000-fbffffff Prefetchable memory behind bridge: 80000000-801fffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0 ExtTag- RBE+ DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #1, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <256ns, L1 <4us ClockPM+ Surprise- LLActRep+ BwNot- ASPMOptComp- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk+ ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+ Slot #0, PowerLimit 0.000W; Interlock- NoCompl- SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- Changed: MRL- PresDet+ LinkState+ RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- Capabilities: [90] Subsystem: ASUSTeK Computer Inc. Device 83ce Capabilities: [a0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: pcieport Kernel modules: shpchp 00:1c.1 PCI bridge: Intel Corporation System Controller Hub (SCH Poulsbo) PCI Express Port 2 (rev 07) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Interrupt: pin B routed to IRQ 17 Bus: primary=00, secondary=01, subordinate=02, sec-latency=0 I/O behind bridge: 0000d000-0000dfff Memory behind bridge: f4000000-fbefffff Prefetchable memory behind bridge: cc000000-cfffffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0 ExtTag- RBE+ DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #2, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <256ns, L1 <4us ClockPM+ Surprise- LLActRep+ BwNot- ASPMOptComp- LnkCtl: ASPM L1 Enabled; RCB 64 bytes Disabled- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+ Slot #0, PowerLimit 0.000W; Interlock- NoCompl- SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- Changed: MRL- PresDet+ LinkState+ RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- Capabilities: [90] Subsystem: ASUSTeK Computer Inc. Device 83ce Capabilities: [a0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: pcieport Kernel modules: shpchp 00:1d.0 USB controller: Intel Corporation System Controller Hub (SCH Poulsbo) USB UHCI #1 (rev 07) (prog-if 00 [UHCI]) Subsystem: ASUSTeK Computer Inc. Device 83ce Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 20 Region 4: I/O ports at b880 [size=32] Kernel driver in use: uhci_hcd Kernel modules: uhci_hcd 00:1d.1 USB controller: Intel Corporation System Controller Hub (SCH Poulsbo) USB UHCI #2 (rev 07) (prog-if 00 [UHCI]) Subsystem: ASUSTeK Computer Inc. Device 83ce Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin B routed to IRQ 21 Region 4: I/O ports at c080 [size=32] Kernel driver in use: uhci_hcd Kernel modules: uhci_hcd 00:1d.2 USB controller: Intel Corporation System Controller Hub (SCH Poulsbo) USB UHCI #3 (rev 07) (prog-if 00 [UHCI]) Subsystem: ASUSTeK Computer Inc. Device 83ce Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin C routed to IRQ 18 Region 4: I/O ports at c480 [size=32] Kernel driver in use: uhci_hcd Kernel modules: uhci_hcd 00:1d.7 USB controller: Intel Corporation System Controller Hub (SCH Poulsbo) USB EHCI #1 (rev 07) (prog-if 20 [EHCI]) Subsystem: ASUSTeK Computer Inc. Device 83ce Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin D routed to IRQ 19 Region 0: Memory at f3f37c00 (32-bit, non-prefetchable) [size=1K] Capabilities: [50] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [58] Debug port: BAR=1 offset=00a0 Kernel driver in use: ehci-pci Kernel modules: ehci_pci 00:1f.0 ISA bridge: Intel Corporation System Controller Hub (SCH Poulsbo) LPC Bridge (rev 07) Subsystem: ASUSTeK Computer Inc. Device 83ce Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Kernel driver in use: lpc_sch Kernel modules: lpc_sch 00:1f.1 IDE interface: Intel Corporation System Controller Hub (SCH Poulsbo) IDE Controller (rev 07) (prog-if 80 [Master]) Subsystem: ASUSTeK Computer Inc. Device 83ce Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Region 0: [virtual] Memory at 000001f0 (32-bit, non-prefetchable) [size=8] Region 1: [virtual] Memory at 000003f0 (type 3, non-prefetchable) Region 2: [virtual] Memory at 00000170 (32-bit, non-prefetchable) [size=8] Region 3: [virtual] Memory at 00000370 (type 3, non-prefetchable) Region 4: I/O ports at ffa0 [size=16] Kernel driver in use: pata_sch Kernel modules: pata_sch, pata_acpi, ata_generic 01:00.0 Network controller: Qualcomm Atheros AR9285 Wireless Network Adapter (PCI-Express) (rev 01) Subsystem: AzureWave AW-NE785 / AW-NE785H 802.11bgn Wireless Full or Half-size Mini PCIe Card Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Interrupt: pin A routed to IRQ 17 Region 0: Memory at fbef0000 (64-bit, non-prefetchable) [size=64K] Capabilities: [40] Power Management version 3 Flags: PMEClk- DSI- D1+ D2- AuxCurrent=375mA PME(D0+,D1+,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit- Address: 00000000 Data: 0pcilib: sysfs_read_vpd: read failed: Connection timed out 000 Capabilities: [60] Express (v2) Legacy Endpoint, MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <512ns, L1 <64us ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 512 bytes DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr+ TransPend- LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <512ns, L1 <64us ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp- LnkCtl: ASPM L1 Enabled; RCB 64 bytes Disabled- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR-, OBFF Not Supported DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis- Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS- Compliance De-emphasis: -6dB LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1- EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest- Capabilities: [100 v1] Advanced Error Reporting UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol- CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+ CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+ AERCap: First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn- Capabilities: [140 v1] Virtual Channel Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 Arb: Fixed- WRR32- WRR64- WRR128- Ctrl: ArbSelect=Fixed Status: InProgress- VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256- Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01 Status: NegoPending- InProgress- Capabilities: [160 v1] Device Serial Number 00-00-00-00-00-00-00-00 Capabilities: [170 v1] Power Budgeting <?> Kernel driver in use: ath9k Kernel modules: ath9k 03:00.0 Ethernet controller: Qualcomm Atheros AR8132 Fast Ethernet (rev c0) Subsystem: ASUSTeK Computer Inc. Device 14e5 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Interrupt: pin A routed to IRQ 24 Region 0: Memory at fbfc0000 (64-bit, non-prefetchable) [size=256K] Region 2: I/O ports at e880 [size=128] Capabilities: [40] Power Management version 3 Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME- Capabilities: [48] MSI: Enable+ Count=1/1 Maskable- 64bit+ Address: 00000000fee0300c Data: 4122 Capabilities: [58] Express (v1) Endpoint, MSI 00 DevCap: MaxPayload 4096 bytes, PhantFunc 0, Latency L0s <4us, L1 unlimited ExtTag- AttnBtn+ AttnInd+ PwrInd+ RBE+ FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 512 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s unlimited, L1 unlimited ClockPM+ Surprise- LLActRep- BwNot- ASPMOptComp- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- Capabilities: [6c] Vital Product Data Not readable Capabilities: [100 v1] Advanced Error Reporting UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq+ ACSViol- UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- UESvrt: DLP- SDES+ TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol- CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr- CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+ AERCap: First Error Pointer: 14, GenCap+ CGenEn- ChkCap+ ChkEn- Capabilities: [180 v1] Device Serial Number ff-25-f6-3a-90-e6-ba-ff Kernel driver in use: atl1c Kernel modules: atl1c

3 32

[alsa-devel] [bug report] ASoC: dapm: Implement and instantiate DAI widgets
by Dan Carpenter 20 Jan '17

20 Jan '17

Hello Mark Brown, The patch 888df395ebc5: "ASoC: dapm: Implement and instantiate DAI widgets" from Feb 16, 2012, leads to the following static checker warning: sound/soc/soc-dapm.c:3944 snd_soc_dapm_new_dai_widgets() error: 'w' dereferencing possible ERR_PTR() sound/soc/soc-dapm.c 3929 if (dai->driver->playback.stream_name) { 3930 template.id = snd_soc_dapm_dai_in; 3931 template.name = dai->driver->playback.stream_name; 3932 template.sname = dai->driver->playback.stream_name; 3933 3934 dev_dbg(dai->dev, "ASoC: adding %s widget\n", 3935 template.name); 3936 3937 w = snd_soc_dapm_new_control_unlocked(dapm, &template); This can either return NULL or ERR_PTR(-EPROBE_DEFER). 3938 if (!w) { 3939 dev_err(dapm->dev, "ASoC: Failed to create %s widget\n", 3940 dai->driver->playback.stream_name); 3941 return -ENOMEM; 3942 } 3943 3944 w->priv = dai; ^^^^^^^^^^^^^ 3945 dai->playback_widget = w; 3946 } regards, dan carpenter

5 6

[alsa-devel] [PATCH v2 0/2] ASoC: sun4i-spdif: Add support for the H3 SoC
by codekipper＠gmail.com 20 Jan '17

20 Jan '17

From: Marcus Cooper <codekipper(a)gmail.com> The H3 SoC uses the same SPDIF block as found in earlier SoCs, but the transmit fifo is at a different address. This has been tested on the Beelink X2. BR, CK --- Changes since v1: - Now a patch set with bindings and driver changes. --- Marcus Cooper (2): ASoC: sunxi: Add bindings for sun8i to SPDIF ASoC: sun4i-spdif: Add support for the H3 SoC Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt | 1 + sound/soc/sunxi/sun4i-spdif.c | 11 +++++++++++ 2 files changed, 12 insertions(+) -- 2.11.0

2 3

[alsa-devel] [PATCH V3 0/5] Add support for Legacy HDMI audio drivers
by Jerome Anand 20 Jan '17

20 Jan '17

Legacy (CherryTrail/ Baytrail) HDMI audio drivers added Legacy hdmi audio-Gfx interaction/ interfacing is updated to use irq chip framework This patch series has only been tested on hardware with a single HDMI connector/pipe and additional work may be needed for newer machines with 2 connectors Jerome Anand (5): drm/i915: setup bridge for HDMI LPE audio driver drm/i915: Add support for audio driver notifications ALSA: add Intel HDMI LPE audio driver for BYT/CHT-T ALSA: x86: hdmi: Add audio support for BYT and CHT ALSA: x86: hdmi: continue playback even when display resolution changes Documentation/gpu/i915.rst | 9 + drivers/gpu/drm/i915/Makefile | 3 + drivers/gpu/drm/i915/i915_drv.c | 8 +- drivers/gpu/drm/i915/i915_drv.h | 17 + drivers/gpu/drm/i915/i915_irq.c | 16 + drivers/gpu/drm/i915/i915_reg.h | 3 + drivers/gpu/drm/i915/intel_audio.c | 8 + drivers/gpu/drm/i915/intel_hdmi.c | 1 + drivers/gpu/drm/i915/intel_lpe_audio.c | 389 +++++++ include/drm/intel_lpe_audio.h | 46 + sound/Kconfig | 2 + sound/Makefile | 2 +- sound/x86/Kconfig | 16 + sound/x86/Makefile | 8 + sound/x86/intel_hdmi_audio.c | 1932 ++++++++++++++++++++++++++++++++ sound/x86/intel_hdmi_audio.h | 201 ++++ sound/x86/intel_hdmi_audio_if.c | 551 +++++++++ sound/x86/intel_hdmi_lpe_audio.c | 617 ++++++++++ sound/x86/intel_hdmi_lpe_audio.h | 685 +++++++++++ 19 files changed, 4511 insertions(+), 3 deletions(-) create mode 100644 drivers/gpu/drm/i915/intel_lpe_audio.c create mode 100644 include/drm/intel_lpe_audio.h create mode 100644 sound/x86/Kconfig create mode 100644 sound/x86/Makefile create mode 100644 sound/x86/intel_hdmi_audio.c create mode 100644 sound/x86/intel_hdmi_audio.h create mode 100644 sound/x86/intel_hdmi_audio_if.c create mode 100644 sound/x86/intel_hdmi_lpe_audio.c create mode 100644 sound/x86/intel_hdmi_lpe_audio.h -- 2.9.3 base-commit: eb5c556a1e5eff388e48e4b7cf61e95783019e83

4 13

[alsa-devel] ASoC: fsl_sai: Has anybody attempted to run the i.MX6UL in TDM mode with channels > 2?
by Caleb Crome 19 Jan '17

19 Jan '17

Hi all, Now that the MX6 fsl_ssi seems to be getting stable for TDM with channels > 2 (thanks all!), the MX6 UL and MX7 have only the SAI port. Does anybody have experience with running the SAI with more than 2 channels? Any thoughts or comments would be welcome! Thanks, -Caleb

3 4

[alsa-devel] [PATCH] ASoC: arizona: Propagate errors from arizona_spk_init
by Charles Keepax 19 Jan '17

19 Jan '17

arizona_spk_init uses snd_soc_dapm_new_control which since commit 37e1df8c95e2 ("ASoC: dapm: handle probe deferrals") will occasionally request a probe deferral. Which means we should propagate the error out of our driver from it. Signed-off-by: Charles Keepax <ckeepax(a)opensource.wolfsonmicro.com> --- sound/soc/codecs/cs47l24.c | 5 ++++- sound/soc/codecs/wm5102.c | 5 ++++- sound/soc/codecs/wm5110.c | 5 ++++- sound/soc/codecs/wm8997.c | 6 +++++- sound/soc/codecs/wm8998.c | 6 +++++- 5 files changed, 22 insertions(+), 5 deletions(-) diff --git a/sound/soc/codecs/cs47l24.c b/sound/soc/codecs/cs47l24.c index 0dd721e..47e6fdd 100644 --- a/sound/soc/codecs/cs47l24.c +++ b/sound/soc/codecs/cs47l24.c @@ -1124,7 +1124,10 @@ static int cs47l24_codec_probe(struct snd_soc_codec *codec) priv->core.arizona->dapm = dapm; - arizona_init_spk(codec); + ret = arizona_init_spk(codec); + if (ret < 0) + return ret; + arizona_init_gpio(codec); arizona_init_mono(codec); arizona_init_notifiers(codec); diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 9edd239..1fe358e 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -1946,7 +1946,10 @@ static int wm5102_codec_probe(struct snd_soc_codec *codec) if (ret) goto err_adsp2_codec_probe; - arizona_init_spk(codec); + ret = arizona_init_spk(codec); + if (ret < 0) + return ret; + arizona_init_gpio(codec); arizona_init_notifiers(codec); diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index 01b5b6c..1bc9421 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -2284,7 +2284,10 @@ static int wm5110_codec_probe(struct snd_soc_codec *codec) priv->core.arizona->dapm = dapm; - arizona_init_spk(codec); + ret = arizona_init_spk(codec); + if (ret < 0) + return ret; + arizona_init_gpio(codec); arizona_init_mono(codec); arizona_init_notifiers(codec); diff --git a/sound/soc/codecs/wm8997.c b/sound/soc/codecs/wm8997.c index ee0c863..49401a8 100644 --- a/sound/soc/codecs/wm8997.c +++ b/sound/soc/codecs/wm8997.c @@ -1062,8 +1062,12 @@ static int wm8997_codec_probe(struct snd_soc_codec *codec) struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); struct snd_soc_component *component = snd_soc_dapm_to_component(dapm); struct wm8997_priv *priv = snd_soc_codec_get_drvdata(codec); + int ret; + + ret = arizona_init_spk(codec); + if (ret < 0) + return ret; - arizona_init_spk(codec); arizona_init_notifiers(codec); snd_soc_component_disable_pin(component, "HAPTICS"); diff --git a/sound/soc/codecs/wm8998.c b/sound/soc/codecs/wm8998.c index 3694f59..44f4471 100644 --- a/sound/soc/codecs/wm8998.c +++ b/sound/soc/codecs/wm8998.c @@ -1321,10 +1321,14 @@ static int wm8998_codec_probe(struct snd_soc_codec *codec) struct wm8998_priv *priv = snd_soc_codec_get_drvdata(codec); struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); struct snd_soc_component *component = snd_soc_dapm_to_component(dapm); + int ret; priv->core.arizona->dapm = dapm; - arizona_init_spk(codec); + ret = arizona_init_spk(codec); + if (ret < 0) + return ret; + arizona_init_gpio(codec); arizona_init_notifiers(codec); -- 2.1.4

2 1

[alsa-devel] [PATCH 00/12] ASoC: Intel: Skylake: Driver updates
by jeeja.kp＠intel.com 19 Jan '17

19 Jan '17

From: Jeeja KP <jeeja.kp(a)intel.com> This patch series includes driver updates for the handling scenarios during System S0/S3 transitions when audio stream is stopped during system. o move DMA configuration in DSP Gateway Module widget event handler to ensure DMA is configured after resume. o Enable SSP MLCK using Supply widget. This will ensure the MCLK is enabled when the widget is power on. o Check DMA decouple register state before coupling/decoupling the DMA. o In case of HDMI pass-through pipe, reset only the FE Pipe when stream in in XRUN state. o Resume the stream from HW renderer position. o HDMI Codec pin and converter state need to be restored when stream is resumed. Jeeja KP (12): ASoC: Intel: Skylake: Add helper function to setup host/link dma ASoC: Intel: Skylake: Configure DMA in PRE_PMD handler of Mixer ASoC: Intel: Skylake: Removed unused skl_get_format() ALSA: hda: check stream decoupled register state ASoC: Intel: Skylake: Add set_tristate DAI ops to enable SSP MCLK ASoC: Intel: Skylake: Remove unused SSP BE prepare DAI ops ASoC: Intel: Skylake: Add supply widget as non DSP widget ASoC: Intel: Skylake: Add supply widget in skl_nau_max machine ASoC: Intel: Skylake: Add supply widget in bxt_da_max machine ASoC: Intel: Skylake: Don't reset pass-through pipe in BE prepare ASoC: Intel: Skylake: set the resume point to LPIB ASoC: hdac_hdmi: Enable pin and converter in prepare sound/hda/ext/hdac_ext_stream.c | 15 +- sound/soc/codecs/hdac_hdmi.c | 28 ++-- sound/soc/intel/boards/bxt_da7219_max98357a.c | 34 ++++ sound/soc/intel/boards/skl_nau88l25_max98357a.c | 34 ++++ sound/soc/intel/skylake/skl-pcm.c | 210 +++++++++++++----------- sound/soc/intel/skylake/skl-topology.c | 27 ++- sound/soc/intel/skylake/skl-topology.h | 6 + 7 files changed, 240 insertions(+), 114 deletions(-) -- 2.5.0

4 20

[alsa-devel] [PATCH v4 0/9] ASoC: Intel: Skylake: Driver updates
by jeeja.kp＠intel.com 19 Jan '17

19 Jan '17

From: Jeeja KP <jeeja.kp(a)intel.com> This patch series includes driver updates for the handling scenarios during System S0/S3 transitions when audio stream is stopped during system. o move DMA configuration in DSP Gateway Module widget event handler to ensure DMA is configured after resume. o Enable SSP MLCK using Supply widget. This will ensure the MCLK is enabled when the widget is power on. o Check DMA decouple register state before coupling/decoupling the DMA. o In case of HDMI pass-through pipe, reset only the FE Pipe when stream in in XRUN state. o Resume the stream from HW renderer position. o HDMI Codec pin and converter state need to be restored when stream is resumed. Changes in v2: - Addressed Mark's comment on patch 1, split this into 2 as this had additional changes other than configuring the DMA. - Addressed Takashi's comment on the usage of snd_hdac_updatel() Changes in v3: - Addressed Takashi's comment on superfluous shift used in reading the value of PPCTL register and also cleaned the condition for updating the reg value. Changes in v4: - Acked by Takashi for patch "ALSA: hda: check stream decoupled register state". - Removed compilation warning in patch "ASoC: hdac_hdmi: Enable pin and converter in prepare". - Remove 4 patches which are already applied. Jeeja KP (9): ALSA: hda: check stream decoupled register state ASoC: Intel: Skylake: Add set_tristate DAI ops to enable SSP MCLK ASoC: Intel: Skylake: Remove unused SSP BE prepare DAI ops ASoC: Intel: Skylake: Add supply widget as non DSP widget ASoC: Intel: Skylake: Add supply widget in skl_nau_max machine ASoC: Intel: Skylake: Add supply widget in bxt_da_max machine ASoC: Intel: Skylake: Don't reset pass-through pipe in BE prepare ASoC: Intel: Skylake: set the resume point to LPIB ASoC: hdac_hdmi: Enable pin and converter in prepare sound/hda/ext/hdac_ext_stream.c | 15 ++++--- sound/soc/codecs/hdac_hdmi.c | 37 ++++++++---------- sound/soc/intel/boards/bxt_da7219_max98357a.c | 34 ++++++++++++++++ sound/soc/intel/boards/skl_nau88l25_max98357a.c | 34 ++++++++++++++++ sound/soc/intel/skylake/skl-pcm.c | 52 +++++++++++++++---------- sound/soc/intel/skylake/skl-topology.c | 6 ++- 6 files changed, 130 insertions(+), 48 deletions(-) -- 2.5.0

4 14

[alsa-devel] [PATCH] ASoC: Intel: boards: Remove ignore_suspend for WoV streams
by Yong Zhi 19 Jan '17

19 Jan '17

When Ref capture is used during S0IX, only the DSP pipelines are needed, thus remove the ignore_suspend for WoV streams so that DMA can be suspended, but keep them for WoV endpoints. Signed-off-by: Yong Zhi <yong.zhi(a)intel.com> --- sound/soc/intel/boards/bxt_da7219_max98357a.c | 1 - 1 file changed, 1 deletion(-) diff --git a/sound/soc/intel/boards/bxt_da7219_max98357a.c b/sound/soc/intel/boards/bxt_da7219_max98357a.c index 1b4330c..02439ac 100644 --- a/sound/soc/intel/boards/bxt_da7219_max98357a.c +++ b/sound/soc/intel/boards/bxt_da7219_max98357a.c @@ -357,7 +357,6 @@ static int broxton_refcap_startup(struct snd_pcm_substream *substream) .platform_name = "0000:00:0e.0", .init = NULL, .dpcm_capture = 1, - .ignore_suspend = 1, .nonatomic = 1, .dynamic = 1, .ops = &broxton_refcap_ops, -- 1.9.1

3 2

[alsa-devel] DMA circular buffers - little help wanted
by Petr Kulhavy 19 Jan '17

19 Jan '17

Hi, I'm trying to write a sound card driver and need a bit of help understanding the logic behind the DMA circular buffers. I can understand there is a buffer of runtime->buffer_size frames, with two pointers: runtime->control->appl_ptr and runtime->status->hw_ptr pointing into it (they are actually offsets from the buffer start). One pointer is the producer, the other consumer. So far a standard circular buffer as I know it. Please correct me if I'm wrong. But what is runtime->boundary good for? It seems the arithmetics is not module buffer_size but modulo boundary, which is pretty confusing me. According to the code and comments some values (like buffer "pointers", available space, free, space, etc.) are supposed to be within 0 ... boundary - 1 and some within 0 ... buffer_size - 1. Not clear to me what is what and why. Could someone please help me to understand the logic behind? The other thing I would like to understand, how is the data positioned in time in terms of synchronisation? I mean where in the buffer, relative to the hw_ptr, is the frame that is supposed to play "now", for an arbitrary "now". Thanks Petr

2 1

[alsa-devel] [PATCH RFC] ASoC: rt5663: use msleep() for uncritical delay
by Nicholas Mc Guire 19 Jan '17

19 Jan '17

The delay here does not seem to be critical with respect to longer delays than 10ms as this delay is to ensure that the write took effect before the next soc_update_bits/write call only, thus a high resolution timer makes little sense here - msleep() should do. Fixes: commit df7c52168ee1 ("ASoC: add rt5663 codec driver") Signed-off-by: Nicholas Mc Guire <hofrat(a)osadl.org> --- Problem was found by cocinelle script. msleep() of 10ms can take up to 20ms on HZ=100 systems but even this does not seem critical here as this is not a very frequent operation (that is not called in a loop) In any case the delta of only 5 us seems unnecessarily small given that jitter on almost all systems would be expected to be larger than 5us and the microsecond precision really is not needed here. This does throw a checkpatch warning with: WARNING: msleep < 20ms can sleep for up to 20ms;" but that seems ok in this case, presumably there are very few systems running audio subsystem that have HZ=100 set. Patch was compile tested with: x86_64_defconfig + CONFIG_COMPILE_TEST=y SND_SOC=m + SND_SOC_ALL_CODECS=m (implies SND_SOC_RT5663=m) Patch is aginast 4.10-rc3 (localversion-next is next-20170111) sound/soc/codecs/rt5663.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/rt5663.c b/sound/soc/codecs/rt5663.c index ed94830..2ecc600 100644 --- a/sound/soc/codecs/rt5663.c +++ b/sound/soc/codecs/rt5663.c @@ -2764,7 +2764,7 @@ static int rt5663_set_bias_level(struct snd_soc_codec *codec, RT5663_PWR_FV1_MASK | RT5663_PWR_FV2_MASK | RT5663_PWR_MB_MASK, RT5663_PWR_VREF1 | RT5663_PWR_VREF2 | RT5663_PWR_MB); - usleep_range(10000, 10005); + msleep(10); if (rt5663->codec_ver == CODEC_VER_1) { snd_soc_update_bits(codec, RT5663_SIG_CLK_DET, RT5663_EN_ANA_CLK_DET_MASK | -- 2.1.4

3 2

[alsa-devel] [PATCH RFC] ASoC: rt5663: use msleep() for long delay loop
by Nicholas Mc Guire 19 Jan '17

19 Jan '17

As the overall delay is in range of seconds and the wait granularity is 10ms msleep() seems more reasonable than to put load on the highres timer subsystem. Fixes: commit df7c52168ee1 ("ASoC: add rt5663 codec driver") Signed-off-by: Nicholas Mc Guire <hofrat(a)osadl.org> --- Problem was found by cocinelle script. This does throw a checkpatch warning with: WARNING: msleep < 20ms can sleep for up to 20ms;" but since this is in a loop and the intended granularity is 10ms with up to 2 seconds total delay this seems ok. Patch was compile tested with: x86_64_defconfig + CONFIG_COMPILE_TEST=y SND_SOC=m + SND_SOC_ALL_CODECS=m (implies SND_SOC_RT5663=m) Patch is aginast 4.10-rc3 (localversion-next is next-20170111) sound/soc/codecs/rt5663.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/sound/soc/codecs/rt5663.c b/sound/soc/codecs/rt5663.c index a32508d..3bdb62b 100644 --- a/sound/soc/codecs/rt5663.c +++ b/sound/soc/codecs/rt5663.c @@ -2982,7 +2982,8 @@ static void rt5663_v2_calibrate(struct rt5663_priv *rt5663) static void rt5663_calibrate(struct rt5663_priv *rt5663) { - int value, count; + int value; + unsigned long timeout; regmap_write(rt5663->regmap, RT5663_RC_CLK, 0x0280); regmap_write(rt5663->regmap, RT5663_GLB_CLK, 0x8000); @@ -3025,17 +3026,15 @@ static void rt5663_calibrate(struct rt5663_priv *rt5663) regmap_write(rt5663->regmap, RT5663_HP_CALIB_3, 0x06c2); regmap_write(rt5663->regmap, RT5663_HP_CALIB_1_1, 0x7b00); regmap_write(rt5663->regmap, RT5663_HP_CALIB_1_1, 0xfb00); - count = 0; - while (true) { + + /* allow the write completion to take up to 2s */ + timeout = jiffies + msecs_to_jiffies(2000); + while (time_is_after_jiffies(timeout)) { regmap_read(rt5663->regmap, RT5663_HP_CALIB_1_1, &value); if (value & 0x8000) - usleep_range(10000, 10005); + msleep(10); else break; - - if (count > 200) - return; - count++; } } -- 2.1.4

3 2

[alsa-devel] [PATCH v4 0/2] ASoC: Use DMI name in sound card long name
by mengdong.lin＠linux.intel.com 18 Jan '17

18 Jan '17

From: Mengdong Lin <mengdong.lin(a)linux.intel.com> This series is based on Liam's idea to use DMI name as the sound card short name in the audio workshop. Now we add DMI info to the card long name: - Not change the card short name, keep it simple. So the card ID won't change as well. - Use DMI name to make the card long name. Machine drivers can use a new API to get this feature. In user space, when the sound server ask UCM to open a sound card, UCM will try to find the best machine-specific configuration file based on the card long name, and only if not avaiable, fallback to the default configuration file that matches the card short name. Please see patch: ucm: Automatically load the best config file based on the card long name History: v1 from RFC: Give up using a table to map DMI info to a simple string, since we cannot maintain such a table for each machine. Just do verbatim copy of DMI info and let user space decide how to use the DMI info in card long name to find the best UCM config file. If device driver adds a flavor string, just append it after the DMI info fields to the card long name. v2: Exclude card name and only keep DMI name in the long name, to save the space since the long name cannot exceed 80 characters. Trim special characters like SPACE in the long name, because UCM configuration files & directories may use the same long name and Autoconf cannot handle special characters. v3: Also include DMI product version in the long name, since vendors like Lenovo may only put self-explanatory name in this field. v4: Use "-" as the separator between DMI names in the card long name, and replace "-" in the original DMI names with "_". Liam Girdwood (1): ASoC: core: Add API to use DMI name in sound card long name Mengdong Lin (1): ASoC: Intel: Use DMI name for sound card long name in Broadwell machine driver include/sound/soc.h | 4 ++ sound/soc/intel/boards/broadwell.c | 2 + sound/soc/soc-core.c | 134 +++++++++++++++++++++++++++++++++++++ 3 files changed, 140 insertions(+) -- 2.5.0

5 7

[alsa-devel] Problem with alsa-compile.sh script on Linux Mint 18.1
by Nali Waterfall 18 Jan '17

18 Jan '17

Hello! I have a "Cannot install patch for unsupported distribution Linux" error while trying to run alsa-compile.sh script. The script supports Ubuntu which Mint is base on. What can I do to make it support Mint? nwfall@desktop ~/alsa $ ./alsa-compile.sh File environment.base is cached. > cd /tmp/alsa-compile-script Program git found. Program autoconf found. Program aclocal found. Program gcc found. Cannot install patch for unsupported distribution Linux. nwfall@desktop ~/alsa $ ./alsa-compile.sh --help Usage: ./alsa-compile.sh [OPTION]... This is a script version 0.2.9 doing ALSA code compilation and installation. Report any problems to <alsa-devel(a)alsa-project.org> mailing list. ... nwfall@desktop /tmp/alsa-compile-script $ cat environment.base protocol=http distrib="Linux" distribver="18.1" url="http://www.alsa-project.org/snapshot/?package=alsa-driver" package="alsa-driver" depmodbin="/sbin/depmod" modinfobin="/sbin/modinfo" nwfall@desktop ~ $ lsb_release -ds Linux Mint 18.1 Serena

2 1

[alsa-devel] [PATCH 1/2] crecord: Fix some minor coding style problems
by Richard Fitzgerald 18 Jan '17

18 Jan '17

- Incorrect indenting of arguments to capture_samples() - Wrap long line in capture_samples() - Added a blank line in main() for readability - Deleted extra trailing blank line at end of file Signed-off-by: Richard Fitzgerald <rf(a)opensource.wolfsonmicro.com> --- src/utils/crecord.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/src/utils/crecord.c b/src/utils/crecord.c index 1ba54d7..390fe45 100644 --- a/src/utils/crecord.c +++ b/src/utils/crecord.c @@ -237,9 +237,9 @@ static int finish_record(void) } static void capture_samples(char *name, unsigned int card, unsigned int device, - unsigned long buffer_size, unsigned int frag, - unsigned int length, unsigned int rate, - unsigned int channels, unsigned int format) + unsigned long buffer_size, unsigned int frag, + unsigned int length, unsigned int rate, + unsigned int channels, unsigned int format) { struct compr_config config; struct snd_codec codec; @@ -268,7 +268,8 @@ static void capture_samples(char *name, unsigned int card, unsigned int device, if (!name) { file = STDOUT_FILENO; } else { - file = open(name, O_RDWR | O_CREAT, S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP); + file = open(name, O_RDWR | O_CREAT, + S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP); if (file == -1) { fprintf(stderr, "Unable to open file '%s'\n", name); exit(EXIT_FAILURE); @@ -466,6 +467,7 @@ int main(int argc, char **argv) exit(EXIT_FAILURE); } } + if (optind >= argc) { file = NULL; finfo = fopen("/dev/null", "w"); @@ -483,4 +485,3 @@ int main(int argc, char **argv) exit(EXIT_SUCCESS); } - -- 1.9.1

2 2

[alsa-devel] [PATCH v6 0/3] ucm: Automatically load the best config file based on the card long name
by mengdong.lin＠linux.intel.com 18 Jan '17

18 Jan '17

From: Mengdong Lin <mengdong.lin(a)linux.intel.com> Intel DSP platform drivers are used by many different devices. For user space to differentiate them, now ASoC provide API for machine drivers to include the DMI info (vendor, product and board) in card long name. This series will add UCM support for loading best device-specific configuration based on the card long name. Mengdong Lin (2): ucm: Load device-specific configuration file based on the card long name ucm: Add command 'get _file' to get the config file name of the opened card History: v2: Request the device-specific file name to match the card long name, no long use automatic key word matching and scoring to avoid error and uncertainty. And add command to check the name of actually loaded configuration file. v3: Fix num in strncpy of the long name, which should be MAX_CARD_LONG_NAME - 1, not MAX_CARD_LONG_NAME (80). v4: No code change. Just update on comments because the kernel v4 patches add DMI product version to the card long name, and use "-" as the separator between DMI fields. v5: Revise the comments. Add patch to assure the input card name not to exceed the maximum card long name supported by kernel to avoid use strncpy and strncmp later. v6: No code change. Fix error in comments: use slash to replace backslash in file path. Mengdong Lin (3): ucm: Assure the user input card name not to exceed max size of card long name ucm: Load device-specific configuration file based on the card long name ucm: Add command 'get _file' to get the config file name of the opened card include/use-case.h | 1 + src/ucm/main.c | 14 +++++++ src/ucm/parser.c | 105 ++++++++++++++++++++++++++++++++++++++++++++++++++-- src/ucm/ucm_local.h | 3 ++ 4 files changed, 119 insertions(+), 4 deletions(-) -- 2.7.4

2 4

[alsa-devel] Add headphone mic support for ALC221 for HP platform
by Kailang 18 Jan '17

18 Jan '17

Hi Takashi, Attach patch is support headphone Mic for ALC221. Many thanks, Kailang

2 1

[alsa-devel] [PATCH v2 0/3] ucm: Add support for component devices
by mengdong.lin＠linux.intel.com 18 Jan '17

18 Jan '17

From: Mengdong Lin <mengdong.lin(a)linux.intel.com> Sound cards are defined by machines. And off-soc codecs and DSPs embedded in DSP can be taken as the components and resued by different machines/ sound cards. This series allows codec and SOC vendors to install UCM configuration files for a specific codec or DSP, and sound card verb files can include these conf files of components. Component devices will not be exposed to applications for backward compatibility. So audio servers like PulseAudio and CRAS still only see the machine devices. History: v2: Use an array to define component directories. Document syntax to enable/disable a component device. Hide cdev defined by the parent device in ucm manager for executing a component sequence. Mengdong Lin (3): ucm: Skip component directories when scanning sound card configuration files ucm: Parse sequence of component devices ucm: Execute sequence of component devices src/ucm/main.c | 88 +++++++++++++++++++++++++++++- src/ucm/parser.c | 154 +++++++++++++++++++++++++++++++++++++++++++++++++++- src/ucm/ucm_local.h | 19 +++++++ src/ucm/utils.c | 1 + 4 files changed, 259 insertions(+), 3 deletions(-) -- 2.7.4

3 6

[alsa-devel] [PATCH v4 0/2] ucm: Automatically load the best config file based on the card long name
by mengdong.lin＠linux.intel.com 18 Jan '17

18 Jan '17

From: Mengdong Lin <mengdong.lin(a)linux.intel.com> Intel DSP platform drivers are used by many different devices. For user space to differentiate them, now ASoC provide API for machine drivers to include the DMI info (vendor, product and board) in card long name. This series will add UCM support for loading best device-specific configuration based on the card long name. Mengdong Lin (2): ucm: Load device-specific configuration file based on the card long name ucm: Add command 'get _file' to get the config file name of the opened card History: v2: Request the device-specific file name to match the card long name, no long use automatic key word matching and scoring to avoid error and uncertainty. And add command to check the name of actually loaded configuration file. v3: Fix num in strncpy of the long name, which should be MAX_CARD_LONG_NAME - 1, not MAX_CARD_LONG_NAME (80). v4: No code change. Just update on comments because the kernel v4 patches add DMI product version to the card long name, and use "-" as the separator between DMI fields. Mengdong Lin (2): ucm: Load device-specific configuration file based on the card long name ucm: Add command 'get _file' to get the config file name of the opened card include/use-case.h | 1 + src/ucm/main.c | 14 ++++++++ src/ucm/parser.c | 101 +++++++++++++++++++++++++++++++++++++++++++++++++--- src/ucm/ucm_local.h | 3 ++ 4 files changed, 115 insertions(+), 4 deletions(-) -- 2.7.4

3 6

[alsa-devel] [PATCH v7] ASoC: omap-mcbsp: Add PM QoS support for McBSP to prevent glitches
by Matt Ranostay 18 Jan '17

18 Jan '17

We can get audio errors if hitting deeper idle states on omaps: [alsa.c:230] error: Fatal problem with alsa output, error -5. [audio.c:614] error: Error in writing audio (Input/output error?)! This seems to happen with off mode idle enabled as power for the whole SoC may get cut off between filling the McBSP fifo using DMA. While active DMA blocks deeper idle states in hardware, McBSP activity does not seem to do so. Basing the QoS latency calculation on the FIFO size, threshold, sample rate, and channels. Based on the original patch by Tony Lindgren Link: https://patchwork.kernel.org/patch/9305867/ Cc: Tony Lindgren <tony(a)atomide.com> Cc: Peter Ujfalusi <peter.ujfalusi(a)ti.com> Acked-by: Peter Ujfalusi <peter.ujfalusi(a)ti.com> Signed-off-by: Matt Ranostay <matt(a)ranostay.consulting> --- Changes from v1: * add calculations for latency per number of FIFO locations Changes from v2: * add missing mcbsp.h header change Changes from v3: * base the latency calculations on threshold, buffer size, sample rate, and channels Changes from v4: * using Peter Ujfalusi's suggestions for restoring a higher latency on audio stream completion, or if not applicable remove the QoS request Changes from v5: * clean up latency checking logic * move logic to .prepare and .shutdown to avoid functions that can sleep Changes from v6: * move QoS removal to asoc_mcbsp_remove from omap_mcbsp_cleanup * also remove header include that is unneeded sound/soc/omap/mcbsp.h | 3 +++ sound/soc/omap/omap-mcbsp.c | 47 ++++++++++++++++++++++++++++++++++++++++++++- 2 files changed, 49 insertions(+), 1 deletion(-) diff --git a/sound/soc/omap/mcbsp.h b/sound/soc/omap/mcbsp.h index 61e93b1c185d..46ae1269a698 100644 --- a/sound/soc/omap/mcbsp.h +++ b/sound/soc/omap/mcbsp.h @@ -323,8 +323,11 @@ struct omap_mcbsp { unsigned int fmt; unsigned int in_freq; + unsigned int latency[2]; int clk_div; int wlen; + + struct pm_qos_request pm_qos_req; }; void omap_mcbsp_config(struct omap_mcbsp *mcbsp, diff --git a/sound/soc/omap/omap-mcbsp.c b/sound/soc/omap/omap-mcbsp.c index d018e966e533..3b8c9724d496 100644 --- a/sound/soc/omap/omap-mcbsp.c +++ b/sound/soc/omap/omap-mcbsp.c @@ -157,6 +157,16 @@ static void omap_mcbsp_dai_shutdown(struct snd_pcm_substream *substream, struct snd_soc_dai *cpu_dai) { struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); + int tx = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK); + int stream1 = tx ? SNDRV_PCM_STREAM_PLAYBACK : SNDRV_PCM_STREAM_CAPTURE; + int stream2 = tx ? SNDRV_PCM_STREAM_CAPTURE : SNDRV_PCM_STREAM_PLAYBACK; + + mcbsp->latency[stream1] = 0; + if (mcbsp->latency[stream2]) + pm_qos_update_request(&mcbsp->pm_qos_req, + mcbsp->latency[stream2]); + else + pm_qos_remove_request(&mcbsp->pm_qos_req); if (!cpu_dai->active) { omap_mcbsp_free(mcbsp); @@ -164,6 +174,28 @@ static void omap_mcbsp_dai_shutdown(struct snd_pcm_substream *substream, } } +static int omap_mcbsp_dai_prepare(struct snd_pcm_substream *substream, + struct snd_soc_dai *cpu_dai) +{ + struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); + struct pm_qos_request *pm_qos_req = &mcbsp->pm_qos_req; + int tx = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK); + int stream1 = tx ? SNDRV_PCM_STREAM_PLAYBACK : SNDRV_PCM_STREAM_CAPTURE; + int stream2 = tx ? SNDRV_PCM_STREAM_CAPTURE : SNDRV_PCM_STREAM_PLAYBACK; + int latency = mcbsp->latency[stream2]; + + /* Prevent omap hardware from hitting off between FIFO fills */ + if (!latency || mcbsp->latency[stream1] < latency) + latency = mcbsp->latency[stream1]; + + if (pm_qos_request_active(pm_qos_req)) + pm_qos_update_request(pm_qos_req, latency); + else if (latency) + pm_qos_add_request(pm_qos_req, PM_QOS_CPU_DMA_LATENCY, latency); + + return 0; +} + static int omap_mcbsp_dai_trigger(struct snd_pcm_substream *substream, int cmd, struct snd_soc_dai *cpu_dai) { @@ -226,6 +258,7 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream, int wlen, channels, wpf; int pkt_size = 0; unsigned int format, div, framesize, master; + unsigned int buffer_size = mcbsp->pdata->buffer_size; dma_data = snd_soc_dai_get_dma_data(cpu_dai, substream); channels = params_channels(params); @@ -240,7 +273,9 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream, default: return -EINVAL; } - if (mcbsp->pdata->buffer_size) { + if (buffer_size) { + int latency; + if (mcbsp->dma_op_mode == MCBSP_DMA_MODE_THRESHOLD) { int period_words, max_thrsh; int divider = 0; @@ -271,6 +306,12 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream, /* Use packet mode for non mono streams */ pkt_size = channels; } + + latency = ((((buffer_size - pkt_size) / channels) * 1000) + / (params->rate_num / params->rate_den)); + + mcbsp->latency[substream->stream] = latency; + omap_mcbsp_set_threshold(substream, pkt_size); } @@ -554,6 +595,7 @@ static int omap_mcbsp_dai_set_dai_sysclk(struct snd_soc_dai *cpu_dai, static const struct snd_soc_dai_ops mcbsp_dai_ops = { .startup = omap_mcbsp_dai_startup, .shutdown = omap_mcbsp_dai_shutdown, + .prepare = omap_mcbsp_dai_prepare, .trigger = omap_mcbsp_dai_trigger, .delay = omap_mcbsp_dai_delay, .hw_params = omap_mcbsp_dai_hw_params, @@ -835,6 +877,9 @@ static int asoc_mcbsp_remove(struct platform_device *pdev) if (mcbsp->pdata->ops && mcbsp->pdata->ops->free) mcbsp->pdata->ops->free(mcbsp->id); + if (pm_qos_request_active(&mcbsp->pm_qos_req)) + pm_qos_remove_request(&mcbsp->pm_qos_req); + omap_mcbsp_cleanup(mcbsp); clk_put(mcbsp->fclk); -- 2.10.2

3 7

Re: [alsa-devel] [PATCH v2 03/10] dt-bindings: sound: Add new reset compatible for sun4i-i2s
by Icenowy Zheng 17 Jan '17

17 Jan '17

2017年1月17日 22:02于 Mylène Josserand <mylene.josserand(a)free-electrons.com>写道： > > Add a new compatible for sun4i-i2s driver to handle some > SoCs that have a reset line that must be asserted/deasserted. > > This new compatible, "allwinner,sun6i-a31-i2s", requires two > properties: > - resets: phandle to the reset line > - reset-names: the name of the reset line ("rst"). > Except these differences, the compatible is identical to previous one > which will not handle a reset line. But I think the IP block is identical, right? Should a new compatible be added only for reset-line? > > Signed-off-by: Mylène Josserand <mylene.josserand(a)free-electrons.com> > --- > .../devicetree/bindings/sound/sun4i-i2s.txt | 23 ++++++++++++++++++++++ > 1 file changed, 23 insertions(+) > > diff --git a/Documentation/devicetree/bindings/sound/sun4i-i2s.txt b/Documentation/devicetree/bindings/sound/sun4i-i2s.txt > index 7a2c0945fd22..f673206e309b 100644 > --- a/Documentation/devicetree/bindings/sound/sun4i-i2s.txt > +++ b/Documentation/devicetree/bindings/sound/sun4i-i2s.txt > @@ -7,6 +7,7 @@ Required properties: > > - compatible: should be one of the following: > - "allwinner,sun4i-a10-i2s" > + - "allwinner,sun6i-a31-i2s" for controller with reset lines > - reg: physical base address of the controller and length of memory mapped > region. > - interrupts: should contain the I2S interrupt. > @@ -19,7 +20,13 @@ Required properties: > - "mod" : module clock for the I2S controller > - #sound-dai-cells : Must be equal to 0 > > +Required properties for the following compatibles: > + - "allwinner,sun6i-a31-i2s" > +- resets: phandle to the reset line for this codec > +- reset-names: Contains the reset signal name "rst" > + > Example: > +For "allwinner,sun4i-a10-i2s": > > i2s0: i2s@01c22400 { > #sound-dai-cells = <0>; > @@ -32,3 +39,19 @@ i2s0: i2s@01c22400 { > <&dma SUN4I_DMA_NORMAL 3>; > dma-names = "rx", "tx"; > }; > + > +For "allwinner,sun6i-a31-i2s": > + > +dai: dai@01c22c00 { > + #sound-dai-cells = <0>; > + compatible = "allwinner,sun6i-a31-i2s"; > + reg = <0x01c22c00 0x200>; > + interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>; > + clock-names = "apb", "mod"; > + resets = <&ccu RST_BUS_CODEC>; > + reset-names = "rst"; > + dmas = <&dma 15>, /* AUDIO_CODEC port */ > + <&dma 15>; /* AUDIO_CODEC port */ > + dma-names = "rx", "tx"; > +}; > -- > 2.11.0 > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel(a)lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

2 1

[alsa-devel] SoundBlaterX G5
by Milan Oravec 17 Jan '17

17 Jan '17

Greetings to all, excuse me please if I'm posting to wrong mailing list. I've bought SoundBlaterX G5 USB soundcard/DAC and want to use it in linux. Sound-card works OOB in linux with snd_usb_audio driver but only at max. 96k/24 sample rate, but HW should be 192K/24 capable. Device volume button works too, but LED backlight doesn't change with volume set. Device needs to be plugged twice i to PC to get USB high speed and 96k support enabled. Here is alsa-info output after plugging in first time: http://www.alsa-project.org/db/?f=1805a3c80208a62da101a27e660a8f020ac6ea71 and after re-plugging: http://www.alsa-project.org/db/?f=74ca49f354e9a100ebf7ba9fe9f6eb82c019f3ef The device is 192K/24 capable under OSX but only when is DSP clock source set to direct stereo ( http://support.creative.com/kb/ShowArticle.aspx?sid=132116 ), this may be the problem in linux. Can anybody help/guide me to how to change this setting or tell me what to do please? If more info/debugging is needed I'm here to serve. How can I submit info about this sound-card to ALSA SoundCard Matrix? Thank you in advance! Kind regards Milan -- s pozdravom Milan Oravec CIKT UKF Nitra mobil: +421907670270 email:moravec@ukf.sk -------------------------------------------------------------------- Tuto spravu nepreveril ziadny antivirus - nebolo treba...

2 6

Re: [alsa-devel] [PATCH v4 0/3] Generic HDMI codec: Add channel mapping control
by Arnaud Pouliquen 17 Jan '17

17 Jan '17

Hello, Any comments on this patch-set? what about the introduction of pcm new callback in DAI ops to use chmap helpers? Is it something reasonable, or should i come back on V1? Regards Arnaud > 2017-01-03 16:52 GMT+01:00 Arnaud Pouliquen <arnaud.pouliquen(a)st.com>: > Aim of this patch is to add 'Playback Channel Map' control to export > audio capabilities in term of HDMI sink speakers allocation. > > V4: > Abandon "Generic HDMI codec: Add channel mapping control" patch as it generates warnings during compilation. > > Workaround is to define 2 constant tables in hdmi-codec.c to declare channel mapping. > One for stereo and one for multichannel. > Consequence is that the behaviour is changed: > The chmap multichannel table export the HDMI CA configuration (tlv) and not only the one suuported by HDMI sink. > Furthermore the chmap control .get handler is overwritten to allow to export to user the selected configuration. > > - "ASoC: hdmi-codec: add channel mapping control": > - add hdmi_codec_stereo_chmaps and hdmi_codec_8ch_chmaps tables. > - implement chmap control get handler. > - "DRM: add help to get ELD speaker allocation" > => No delta vs V2. > - "ALSA pcm: allow non constant snd_pcm_chmap_elem" > => abandonned > - "ASoC: core: add optional pcm_new callback for DAI driver" > => No delta vs V2. > > V3: > - "ASoC: hdmi-codec: add channel mapping control": > => Minor fixes: > - select stereo speaker config by default if HDMI cable unplugged > - fix compilation warning. > - "DRM: add help to get ELD speaker allocation" > => No delta vs V2. > - "ALSA pcm: allow non constant snd_pcm_chmap_elem" > => No delta vs V2. > - "ASoC: core: add optional pcm_new callback for DAI driver" > => No delta vs V2. > > V2: > In this version I use chmap helper functions from pcm_lib.c. > It is quite tricky to use it from ASoC due to the relation chip of the controls > with the pcm runtime. > After several tries, my conclusion is that it must be handled in ASoC DAI driver. > Main reason is that the DAI driver can not provide snd_pcm_chmap struct > through kcontrol structure. But this induces that soc-core provides pcm runtime > structure to DAI driver during probe. > > Base on this conclusion. I reworked my patches by adding 2 > new patches in patch-set > 1) ALSA pcm: allow non constant snd_pcm_chmap_elem > This patch allows to handle non constant channel mapping. As ELD > information can change during runtime it is mandatory to properly > handle the feature. > In term of compatibility with legacy it should be straightforward, > as update just consists in suppressing the 'const' constraint. > > 2) ASoC: core: add optional pcm_new callback for DAI driver > This is the only way i found to be able to use > snd_pcm_add_chmap_ctls and associated controls helper functions. > From my point of view, this is the more simple way to add relationship > between DAI and associated pcm devices. > Notice that this patch, if accepted, makes the following one obsolete, > as it also answer to the associated topic: > [PATCH v5 0/2] ALSA controls management using index/device/sub-devices fields > (http://www.spinics.net/lists/alsa-devel/msg57639.html). > > If you estimate that this it not reasonable i will come back to my first version. > > V1: > This patch follows discussion initiate here: > [RFC] ASOC: HDMI audio info frame speaker allocation > http://www.spinics.net/lists/alsa-devel/msg57363.html > > The code is fully inspired from HDA driver. > On hw_param, HDMI sink speaker capabilities are exported via TLV ops > and a CEA allocation is choson, based on ELD information and the number of > channels requested by user. > > Mains differences with HDA implementation are: > - Control is read only > - Channel swap is not supported. Consequence is that unused channel in > the mid of CEA audio infoframe channel mapping are considered as > active. > example for channel allocation 0x02: FL, FR, 0, FC) > This configuration is only available for a 4 channels stream. > - Channel allocation table has been reordered and HDMI 2.0 is not > supported. > > Arnaud Pouliquen (4): > DRM: add help to get ELD speaker allocation > ASoC: core: add optional pcm_new callback for DAI driver > ASoC: hdmi-codec: add channel mapping control > > include/drm/drm_edid.h | 13 ++ > include/sound/soc-dai.h | 3 + > sound/soc/codecs/hdmi-codec.c | 380 +++++++++++++++++++++++++++++++++++++++++- > sound/soc/soc-core.c | 28 ++++ > 4 files changed, 423 insertions(+), 1 deletion(-) > > -- > 1.9.1 > >

2 1

[alsa-devel] [PATCH v3 0/4] ASoC: Intel: clean up Kconfig
by Andy Shevchenko 17 Jan '17

17 Jan '17

Clean up Kconfig here: - select DW_DMAC_CORE because it's mandatory for some modules - remove redundant selects and dependencies - rename MFLD_PLATFORM to MID_PLATFORM to show that it covers more than Medfield Since v2: - add three more patches - rebase on top of latest linux-next Andy Shevchenko (4): ASoC: Intel: select DW_DMAC_CORE since it's mandatory ASoC: Intel: remove redundant select SND_SOC_INTEL_SST ASoC: Intel: remove ignored dependencies ASoC: Intel: rename SND_SST_MFLD_PLATFORM to SND_SST_MID_PLATFORM sound/soc/intel/Kconfig | 46 ++++++++++++++----------------------------- sound/soc/intel/Makefile | 2 +- sound/soc/intel/atom/Makefile | 7 ++++--- 3 files changed, 20 insertions(+), 35 deletions(-) -- 2.11.0

5 14

[alsa-devel] [PATCH v4 0/4] ASoC: Intel: clean up Kconfig
by Andy Shevchenko 17 Jan '17

17 Jan '17

Clean up Kconfig here: - select DW_DMAC_CORE because it's mandatory for some modules - remove redundant selects and dependencies - rename MFLD_PLATFORM to ATOM_HIFI2_PLATFORM to show that it covers more than *Field Since v3: - use proposed name as SND_SST_ATOM_HIFI2_PLATFORM (Pierre-Louis) - append Keyon's tag Since v2: - add three more patches - rebase on top of latest linux-next Andy Shevchenko (4): ASoC: Intel: select DW_DMAC_CORE since it's mandatory ASoC: Intel: remove redundant select SND_SOC_INTEL_SST ASoC: Intel: remove ignored dependencies ASoC: Intel: rename SND_SST_MFLD_PLATFORM to SND_SST_ATOM_HIFI2_PLATFORM sound/soc/intel/Kconfig | 46 +++++++++------------------- sound/soc/intel/Makefile | 2 +- sound/soc/intel/atom/Makefile | 7 +++-- sound/soc/intel/atom/sst-mfld-platform-pcm.c | 1 + 4 files changed, 21 insertions(+), 35 deletions(-) -- 2.11.0

4 7

[alsa-devel] [PATCH v6 0/4] ASoC: Intel: clean up Kconfig
by Andy Shevchenko 17 Jan '17

17 Jan '17

Clean up Kconfig here: - select DW_DMAC_CORE because it's mandatory for some modules - remove redundant selects and dependencies - rename MFLD_PLATFORM to ATOM_HIFI2_PLATFORM to show that it covers more than *Field Since v5: - DMA engine drivers have to be dependent to DMADEVICES (kbuild test bot) - due to above drop tags for patch 1 Since v4: - append Vinod's and Liam's ACKs Since v3: - use proposed name as SND_SST_ATOM_HIFI2_PLATFORM (Pierre-Louis) - append Keyon's tag Since v2: - add three more patches - rebase on top of latest linux-next Andy Shevchenko (4): ASoC: Intel: select DW_DMAC_CORE since it's mandatory ASoC: Intel: remove redundant select SND_SOC_INTEL_SST ASoC: Intel: remove ignored dependencies ASoC: Intel: rename SND_SST_MFLD_PLATFORM to SND_SST_ATOM_HIFI2_PLATFORM sound/soc/intel/Kconfig | 51 +++++++++++----------------- sound/soc/intel/Makefile | 2 +- sound/soc/intel/atom/Makefile | 7 ++-- sound/soc/intel/atom/sst-mfld-platform-pcm.c | 1 + 4 files changed, 26 insertions(+), 35 deletions(-) -- 2.11.0

3 6

[alsa-devel] [RFC PATCH 0/2] ASoC: Use DMI name in sound card long name
by mengdong.lin＠linux.intel.com 17 Jan '17

17 Jan '17

From: Mengdong Lin <mengdong.lin(a)linux.intel.com> This series is based on Liam's idea to use DMI name as the sound card short name in the audio workshop. After testing on serveral machines, we changed the design a little: - Not change the card name (short name), keep it simple. So the card ID won't change as well. - Use short name and DMI name together to make a readable and unqique long name. Machine drivers can use a new API to get this feature. We hope to get aligned on the kernel side at first, then we'll update UCM code in alsa-lib: when the sound server ask UCM to open a sound card, UCM will try to find the best configuration file that matches the card long name, and only if not avaiable, fallback to the default configuration file that matches the card name (short name). Liam Girdwood (1): ASoC: core: Add API to use DMI name in sound card long name Mengdong Lin (1): ASoC: Intel: Use DMI name for sound card long name in Broadwell machine driver include/sound/soc.h | 5 ++ sound/soc/intel/boards/broadwell.c | 2 + sound/soc/soc-core.c | 134 +++++++++++++++++++++++++++++++++++++ 3 files changed, 141 insertions(+) -- 2.5.0

6 7

[alsa-devel] [PATCH] RFC: ASoC: dapm: handle probe deferrals
by Linus Walleij 17 Jan '17

17 Jan '17

This starts to handle probe deferrals on regulators and clocks on the ASoC DAPM. I came to this patch after audio stopped working on Ux500 ages ago and I finally looked into it to see what is wrong. I had messages like this in the console since a while back: ab8500-codec.0: ASoC: Failed to request audioclk: -517 ab8500-codec.0: ASoC: Failed to create DAPM control audioclk ab8500-codec.0: Failed to create new controls -12 snd-soc-mop500.0: ASoC: failed to instantiate card -12 snd-soc-mop500.0: Error: snd_soc_register_card failed (-12)! snd-soc-mop500: probe of snd-soc-mop500.0 failed with error -12 Apparently because the widget table for the codec looks like this (sound/soc/codecs/ab8500-codec.c): static const struct snd_soc_dapm_widget ab8500_dapm_widgets[] = { /* Clocks */ SND_SOC_DAPM_CLOCK_SUPPLY("audioclk"), /* Regulators */ SND_SOC_DAPM_REGULATOR_SUPPLY("V-AUD", 0, 0), SND_SOC_DAPM_REGULATOR_SUPPLY("V-AMIC1", 0, 0), SND_SOC_DAPM_REGULATOR_SUPPLY("V-AMIC2", 0, 0), SND_SOC_DAPM_REGULATOR_SUPPLY("V-DMIC", 0, 0), So when we call snd_soc_register_codec() and any of these widgets get a deferred probe we do not get an -EPROBE_DEFER (-517) back as we should and instead we just fail. Apparently the code assumes that clocks and regulators must be available at this point and not defer. After this patch it rather looks like this: ab8500-codec.0: Failed to create new controls -517 snd-soc-mop500.0: ASoC: failed to instantiate card -517 snd-soc-mop500.0: Error: snd_soc_register_card failed (-517)! (...) abx500-clk.0: registered clocks for ab850x snd-soc-mop500.0: ab8500-codec-dai.0 <-> ux500-msp-i2s.1 mapping ok snd-soc-mop500.0: ab8500-codec-dai.1 <-> ux500-msp-i2s.3 mapping ok I'm pretty happy about the patch as it it, but I'm a bit uncertain on how to proceed: there are a lot of users of the external functions snd_soc_dapm_new_control() (111 sites) and that will now return an occassional error pointer, which is not handled in the calling sites. I want an indication from the maintainers whether I should just go in and augment all these call sites, or if deferred probe is frowned upon when it leads to this much overhead. Signed-off-by: Linus Walleij <linus.walleij(a)linaro.org> --- sound/soc/soc-dapm.c | 42 ++++++++++++++++++++++++++++++++++++++++++ sound/soc/soc-topology.c | 9 +++++++++ 2 files changed, 51 insertions(+) diff --git a/sound/soc/soc-dapm.c b/sound/soc/soc-dapm.c index 27dd02e57b31..b218cc7bd994 100644 --- a/sound/soc/soc-dapm.c +++ b/sound/soc/soc-dapm.c @@ -363,6 +363,10 @@ static int dapm_kcontrol_data_alloc(struct snd_soc_dapm_widget *widget, snd_soc_dapm_new_control_unlocked(widget->dapm, &template); kfree(name); + if (IS_ERR(data->widget)) { + ret = PTR_ERR(data->widget); + goto err_data; + } if (!data->widget) { ret = -ENOMEM; goto err_data; @@ -397,6 +401,10 @@ static int dapm_kcontrol_data_alloc(struct snd_soc_dapm_widget *widget, data->widget = snd_soc_dapm_new_control_unlocked( widget->dapm, &template); kfree(name); + if (IS_ERR(data->widget)) { + ret = PTR_ERR(data->widget); + goto err_data; + } if (!data->widget) { ret = -ENOMEM; goto err_data; @@ -3403,11 +3411,22 @@ snd_soc_dapm_new_control(struct snd_soc_dapm_context *dapm, mutex_lock_nested(&dapm->card->dapm_mutex, SND_SOC_DAPM_CLASS_RUNTIME); w = snd_soc_dapm_new_control_unlocked(dapm, widget); + /* Do not nag about probe deferrals */ + if (IS_ERR(w)) { + int ret = PTR_ERR(w); + + if (ret != -EPROBE_DEFER) + dev_err(dapm->dev, + "ASoC: Failed to create DAPM control %s (%d)\n", + widget->name, ret); + goto out_unlock; + } if (!w) dev_err(dapm->dev, "ASoC: Failed to create DAPM control %s\n", widget->name); +out_unlock: mutex_unlock(&dapm->card->dapm_mutex); return w; } @@ -3430,6 +3449,8 @@ snd_soc_dapm_new_control_unlocked(struct snd_soc_dapm_context *dapm, w->regulator = devm_regulator_get(dapm->dev, w->name); if (IS_ERR(w->regulator)) { ret = PTR_ERR(w->regulator); + if (ret == -EPROBE_DEFER) + return ERR_PTR(ret); dev_err(dapm->dev, "ASoC: Failed to request %s: %d\n", w->name, ret); return NULL; @@ -3448,6 +3469,8 @@ snd_soc_dapm_new_control_unlocked(struct snd_soc_dapm_context *dapm, w->clk = devm_clk_get(dapm->dev, w->name); if (IS_ERR(w->clk)) { ret = PTR_ERR(w->clk); + if (ret == -EPROBE_DEFER) + return ERR_PTR(ret); dev_err(dapm->dev, "ASoC: Failed to request %s: %d\n", w->name, ret); return NULL; @@ -3566,6 +3589,16 @@ int snd_soc_dapm_new_controls(struct snd_soc_dapm_context *dapm, mutex_lock_nested(&dapm->card->dapm_mutex, SND_SOC_DAPM_CLASS_INIT); for (i = 0; i < num; i++) { w = snd_soc_dapm_new_control_unlocked(dapm, widget); + if (IS_ERR(w)) { + ret = PTR_ERR(w); + /* Do not nag about probe deferrals */ + if (ret == -EPROBE_DEFER) + break; + dev_err(dapm->dev, + "ASoC: Failed to create DAPM control %s (%d)\n", + widget->name, ret); + break; + } if (!w) { dev_err(dapm->dev, "ASoC: Failed to create DAPM control %s\n", @@ -3842,6 +3875,15 @@ int snd_soc_dapm_new_pcm(struct snd_soc_card *card, dev_dbg(card->dev, "ASoC: adding %s widget\n", link_name); w = snd_soc_dapm_new_control_unlocked(&card->dapm, &template); + if (IS_ERR(w)) { + ret = PTR_ERR(w); + /* Do not nag about probe deferrals */ + if (ret != -EPROBE_DEFER) + dev_err(card->dev, + "ASoC: Failed to create %s widget (%d)\n", + link_name, ret); + goto outfree_kcontrol_news; + } if (!w) { dev_err(card->dev, "ASoC: Failed to create %s widget\n", link_name); diff --git a/sound/soc/soc-topology.c b/sound/soc/soc-topology.c index 65670b2b408c..37006c63891a 100644 --- a/sound/soc/soc-topology.c +++ b/sound/soc/soc-topology.c @@ -1556,6 +1556,15 @@ static int soc_tplg_dapm_widget_create(struct soc_tplg *tplg, widget = snd_soc_dapm_new_control(dapm, &template); else widget = snd_soc_dapm_new_control_unlocked(dapm, &template); + if (IS_ERR(widget)) { + ret = PTR_ERR(widget); + /* Do not nag about probe deferrals */ + if (ret != -EPROBE_DEFER) + dev_err(tplg->dev, + "ASoC: failed to create widget %s controls (%d)\n", + w->name, ret); + goto hdr_err; + } if (widget == NULL) { dev_err(tplg->dev, "ASoC: failed to create widget %s controls\n", w->name); -- 2.9.3

2 2

[alsa-devel] [asoc:topic/rt5659 25/26] sound/soc/codecs/rt5659.c:4236:3-8: No need to set .owner here. The core will do it.
by kbuild test robot 17 Jan '17

17 Jan '17

tree: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git topic/rt5659 head: eae39b5f4269260d5d8b35133ba0f4c5e2895b71 commit: 0230f088adcf537a60df9d80dce5b71059946dfe [25/26] ASoC: rt5659: declare rt5659_i2c_driver static coccinelle warnings: (new ones prefixed by >>) >> sound/soc/codecs/rt5659.c:4236:3-8: No need to set .owner here. The core will do it. Please review and possibly fold the followup patch. --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation

2 2

[alsa-devel] [PATCH 1/2] ASoC: mxs-saif: fix setting master base rate
by Jörg Krause 17 Jan '17

17 Jan '17

From: Jörg Krause <jk(a)lintech.de> The SAIF base oversample rates are either 512*fs or 384*fs. An additional divider exists within the SAIF to generate sub-multiples of these two base rates if MCLK is required by the codec. * The sub-rates for the 512x base rate are: 256x, 128x, 64x, and 32x. * The sub-rates for the 384x base rate are: 192x, 96x, and 48x. Setting the base rate depending on the modulo operation with 32 and 48 give wrong results for some mclk. If mclk=18.432MHz both modulo operations results in 0. As testing the result with 32 is done first, a wrong base rate of 512*fs is set instead of the correct 384*fs. Fix this by setting the base rate depending on the calculated sub-rate. Signed-off-by: Jörg Krause <joerg.krause(a)embedded.rocks> --- sound/soc/mxs/mxs-saif.c | 24 +++++++++++++++++------- 1 file changed, 17 insertions(+), 7 deletions(-) diff --git a/sound/soc/mxs/mxs-saif.c b/sound/soc/mxs/mxs-saif.c index 13631003cb7c..1e724533dc6e 100644 --- a/sound/soc/mxs/mxs-saif.c +++ b/sound/soc/mxs/mxs-saif.c @@ -119,23 +119,33 @@ static int mxs_saif_set_clk(struct mxs_saif *saif, * Set SAIF clock * * The SAIF clock should be either 384*fs or 512*fs. - * If MCLK is used, the SAIF clk ratio need to match mclk ratio. - * For 32x mclk, set saif clk as 512*fs. - * For 48x mclk, set saif clk as 384*fs. + * If MCLK is used, the SAIF clk ratio needs to match mclk ratio. + * For 256x, 128x, 64x, and 32x sub-rates, set saif clk as 512*fs. + * For 192x, 96x, and 48x sub-rates, set saif clk as 384*fs. * * If MCLK is not used, we just set saif clk to 512*fs. */ clk_prepare_enable(master_saif->clk); if (master_saif->mclk_in_use) { - if (mclk % 32 == 0) { + switch (mclk / rate) { + case 32: + case 64: + case 128: + case 256: + case 512: scr &= ~BM_SAIF_CTRL_BITCLK_BASE_RATE; ret = clk_set_rate(master_saif->clk, 512 * rate); - } else if (mclk % 48 == 0) { + break; + case 48: + case 96: + case 192: + case 384: scr |= BM_SAIF_CTRL_BITCLK_BASE_RATE; ret = clk_set_rate(master_saif->clk, 384 * rate); - } else { - /* SAIF MCLK should be either 32x or 48x */ + break; + default: + /* SAIF MCLK should be a sub-rate of 512x or 384x */ clk_disable_unprepare(master_saif->clk); return -EINVAL; } -- 2.11.0

2 3

Re: [alsa-devel] [PATCH v2 07/10] dt-bindings: sound: Add sun8i audio documentation
by Icenowy Zheng 17 Jan '17

17 Jan '17

2017年1月18日 00:51于 Maxime Ripard <maxime.ripard(a)free-electrons.com>写道： > > Hi, > > On Tue, Jan 17, 2017 at 03:02:27PM +0100, Mylène Josserand wrote: > > Add the documentation for dt-binding of the digital audio codec driver > > and the audio card driver for Sun8i SoCs. > > > > Signed-off-by: Mylène Josserand <mylene.josserand(a)free-electrons.com> > > One small comment below, > > > --- > > .../devicetree/bindings/sound/sun8i-codec.txt | 76 ++++++++++++++++++++++ > > 1 file changed, 76 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/sound/sun8i-codec.txt > > > > diff --git a/Documentation/devicetree/bindings/sound/sun8i-codec.txt b/Documentation/devicetree/bindings/sound/sun8i-codec.txt > > new file mode 100644 > > index 000000000000..ce3c05219e33 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/sound/sun8i-codec.txt > > @@ -0,0 +1,76 @@ > > +Allwinner SUN8I audio codec > > +------------------------------------ > > + > > +On Sun8i SoCs, and particularly on A33, the audio is separated in > > Technically that's not true on all the SoCs of the sun8i family, but > only a few of them (A33 and H3 iirc). H3 is still the old-style sunxi codec. I think A64 has the same digital codec part (but A64's analog part is different) > > This driver is only made for the A33 at the moment, so you should only > mention it (and you should rename that file as well). > > Once done, > Acked-by: Maxime Ripard <maxime.ripard(a)free-electrons.com> > > Thanks, > Maxime > > > > +different parts: > > + - A DAI driver. It uses the "sun4i-i2s" driver which is > > + documented here: > > + Documentation/devicetree/bindings/sound/sun4i-i2s.txt > > + - An analog part of the codec which is handled as PRCM registers. > > + See Documentation/devicetree/bindings/sound/sun8i-codec-analog.txt > > + - An digital part of the codec which is documented in this current > > + binding documentation. > > + - And finally, an audio card which links all the above components. > > + The simple-audio card will be used. > > + See Documentation/devicetree/bindings/sound/simple-card.txt > > + > > +This bindings documentation exposes Sun8i codec (digital part). > > + > > +Required properties: > > +- compatible: must be "allwinner,sun8i-a33-codec" > > +- reg: must contain the registers location and length > > +- interrupts: must contain the codec interrupt > > +- clocks: a list of phandle + clock-specifer pairs, one for each entry > > + in clock-names. > > +- clock-names: should contain followings: > > + - "bus": the parent APB clock for this controller > > + - "mod": the parent module clock > > + > > +Example: > > +codec: codec@01c22e00 { > > + #sound-dai-cells = <0>; > > + compatible = "allwinner,sun8i-a33-codec"; > > + reg = <0x01c22e00 0x400>; > > + interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>; > > + clock-names = "bus", "mod"; > > + status = "disabled"; > > +}; > > + > > +Here is an example to add a sound card and the codec binding on sun8i SoCs that > > +are similar to A33 using simple-card: > > + > > + sound { > > + compatible = "simple-audio-card"; > > + simple-audio-card,name = "Sun8i Audio Card"; > > + simple-audio-card,format = "i2s"; > > + simple-audio-card,frame-master = <&link_codec>; > > + simple-audio-card,bitclock-master = <&link_codec>; > > + simple-audio-card,mclk-fs = <512>; > > + simple-audio-card,aux-devs = <&codec_analog>; > > + simple-audio-card,routing = > > + "Left DAC", "Digital Left DAC", > > + "Right DAC", "Digital Right DAC"; > > + > > + simple-audio-card,cpu { > > + sound-dai = <&dai>; > > + }; > > + > > + link_codec: simple-audio-card,codec { > > + sound-dai = <&codec>; > > + }; > > + > > + soc@01c00000 { > > + [...] > > + > > + codec: codec@01c22e00 { > > + #sound-dai-cells = <0>; > > + compatible = "allwinner,sun8i-a33-codec"; > > + reg = <0x01c22e00 0x400>; > > + interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>; > > + clock-names = "bus", "mod"; > > + status = "disabled"; > > + }; > > + }; > > + > > -- > > 2.11.0 > > > > -- > Maxime Ripard, Free Electrons > Embedded Linux and Kernel engineering > http://free-electrons.com > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel(a)lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

1 0

[alsa-devel] [PATCH 1/2] ASoC: Revert "Drop SND_DMAENGINE_PCM_FLAG_CUSTOM_CHANNEL_NAME flag"
by Sylwester Nawrocki 17 Jan '17

17 Jan '17

This reverts commit c6644119a3f80ea644bde10009d5e1013b5aff29 and restores the ability to specify DMA channel names per DAI dma_data. Unfortunately the functionality removed in the patch being reverted cannot be entirely replaced by specifying DMA channel names in struct snd_dmaengine_pcm_config as that does not cover devices with more than 2 DMA channels. Together with patch "ASoC: Revert "samsung: Remove unneeded initialization of chan_name"" this fixes broken sound on the s3c24xx SoC platforms. Signed-off-by: Sylwester Nawrocki <s.nawrocki(a)samsung.com> --- include/sound/dmaengine_pcm.h | 6 ++++++ sound/soc/soc-generic-dmaengine-pcm.c | 12 +++++++++++- 2 files changed, 17 insertions(+), 1 deletion(-) diff --git a/include/sound/dmaengine_pcm.h b/include/sound/dmaengine_pcm.h index 1c8f9e1..67be244 100644 --- a/include/sound/dmaengine_pcm.h +++ b/include/sound/dmaengine_pcm.h @@ -71,6 +71,7 @@ struct dma_chan *snd_dmaengine_pcm_request_channel(dma_filter_fn filter_fn, * @slave_id: Slave requester id for the DMA channel. * @filter_data: Custom DMA channel filter data, this will usually be used when * requesting the DMA channel. + * @chan_name: Custom channel name to use when requesting DMA channel. * @fifo_size: FIFO size of the DAI controller in bytes * @flags: PCM_DAI flags, only SND_DMAENGINE_PCM_DAI_FLAG_PACK for now */ @@ -80,6 +81,7 @@ struct snd_dmaengine_dai_dma_data { u32 maxburst; unsigned int slave_id; void *filter_data; + const char *chan_name; unsigned int fifo_size; unsigned int flags; }; @@ -105,6 +107,10 @@ void snd_dmaengine_pcm_set_config_from_dai_data( * playback. */ #define SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX BIT(3) +/* + * The PCM streams have custom channel names specified. + */ +#define SND_DMAENGINE_PCM_FLAG_CUSTOM_CHANNEL_NAME BIT(4) /** * struct snd_dmaengine_pcm_config - Configuration data for dmaengine based PCM diff --git a/sound/soc/soc-generic-dmaengine-pcm.c b/sound/soc/soc-generic-dmaengine-pcm.c index 17eb149..d537864 100644 --- a/sound/soc/soc-generic-dmaengine-pcm.c +++ b/sound/soc/soc-generic-dmaengine-pcm.c @@ -263,6 +263,7 @@ static int dmaengine_pcm_new(struct snd_soc_pcm_runtime *rtd) struct dmaengine_pcm *pcm = soc_platform_to_pcm(rtd->platform); const struct snd_dmaengine_pcm_config *config = pcm->config; struct device *dev = rtd->platform->dev; + struct snd_dmaengine_dai_dma_data *dma_data; struct snd_pcm_substream *substream; size_t prealloc_buffer_size; size_t max_buffer_size; @@ -282,6 +283,13 @@ static int dmaengine_pcm_new(struct snd_soc_pcm_runtime *rtd) if (!substream) continue; + dma_data = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream); + + if (!pcm->chan[i] && + (pcm->flags & SND_DMAENGINE_PCM_FLAG_CUSTOM_CHANNEL_NAME)) + pcm->chan[i] = dma_request_slave_channel(dev, + dma_data->chan_name); + if (!pcm->chan[i] && (pcm->flags & SND_DMAENGINE_PCM_FLAG_COMPAT)) { pcm->chan[i] = dmaengine_pcm_compat_request_channel(rtd, substream); @@ -350,7 +358,9 @@ static int dmaengine_pcm_request_chan_of(struct dmaengine_pcm *pcm, const char *name; struct dma_chan *chan; - if ((pcm->flags & SND_DMAENGINE_PCM_FLAG_NO_DT) || !dev->of_node) + if ((pcm->flags & (SND_DMAENGINE_PCM_FLAG_NO_DT | + SND_DMAENGINE_PCM_FLAG_CUSTOM_CHANNEL_NAME)) || + !dev->of_node) return 0; if (config && config->dma_dev) { -- 1.9.1

1 1

Re: [alsa-devel] [PATCH v2 6/6] dell-led: move driver to drivers/platform/x86/dell-wmi-led.c
by Pavel Machek 17 Jan '17

17 Jan '17

Hi! > Thanks for the patch set. > > Would you mind fixing also the following issues raised by > checkpatch.pl?: > > WARNING: Missing a blank line after declarations > #376: FILE: drivers/platform/x86/dell-wmi-led.c:64: > + struct bios_args args; ... > The fixes could be placed in an incremental patch after this one. Anyway, move itself is ok (and the checkpatch issues are not that serious anyway.) Thanks, Acked-by: Pavel Machek <pavel(a)ucw.cz> -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html

2 1

[alsa-devel] [PATCH 0/2] Add support for es8323 on the firefly-rk3288
by Romain Perier 17 Jan '17

17 Jan '17

This set of patches enables support for the es8323 codecs on the firefly-rk3288. It adds the required DT definitions to link rockchip-i2s to the es8388 analog output. Romain Perier (2): SoC: es8328-i2c: Add compatible for ES8323 arm: dts: Add support for ES8323 to the Firefly-RK3288 Documentation/devicetree/bindings/sound/es8328.txt | 5 ++++- arch/arm/boot/dts/rk3288-firefly.dtsi | 25 ++++++++++++++++++++++ sound/soc/codecs/es8328-i2c.c | 2 ++ 3 files changed, 31 insertions(+), 1 deletion(-) -- 2.9.3

1 2