May 2023 - Alsa-devel - mailman.alsa-project.org

[PATCH 1/9] ALSA: emu10k1: pass frame instead of byte addresses
by Oswald Buddenhagen 18 May '23

18 May '23

... to snd_emu10k1_pcm_init_voice(). This makes the code arguably less convoluted. Signed-off-by: Oswald Buddenhagen <oswald.buddenhagen(a)gmx.de> --- sound/pci/emu10k1/emupcm.c | 31 +++++++++---------------------- 1 file changed, 9 insertions(+), 22 deletions(-) diff --git a/sound/pci/emu10k1/emupcm.c b/sound/pci/emu10k1/emupcm.c index d669f93d8930..9f151a0a7756 100644 --- a/sound/pci/emu10k1/emupcm.c +++ b/sound/pci/emu10k1/emupcm.c @@ -270,15 +270,6 @@ static void snd_emu10k1_pcm_init_voice(struct snd_emu10k1 *emu, stereo = runtime->channels == 2; w_16 = snd_pcm_format_width(runtime->format) == 16; - if (!extra && stereo) { - start_addr >>= 1; - end_addr >>= 1; - } - if (w_16) { - start_addr >>= 1; - end_addr >>= 1; - } - spin_lock_irqsave(&emu->reg_lock, flags); /* volume parameters */ @@ -424,19 +415,16 @@ static int snd_emu10k1_playback_prepare(struct snd_pcm_substream *substream) struct snd_emu10k1 *emu = snd_pcm_substream_chip(substream); struct snd_pcm_runtime *runtime = substream->runtime; struct snd_emu10k1_pcm *epcm = runtime->private_data; + bool w_16 = snd_pcm_format_width(runtime->format) == 16; + bool stereo = runtime->channels == 2; unsigned int start_addr, end_addr; - start_addr = epcm->start_addr; - end_addr = snd_pcm_lib_period_bytes(substream); - if (runtime->channels == 2) { - start_addr >>= 1; - end_addr >>= 1; - } - end_addr += start_addr; + start_addr = epcm->start_addr >> w_16; + end_addr = start_addr + runtime->period_size; snd_emu10k1_pcm_init_voice(emu, 1, 1, epcm->extra, start_addr, end_addr, NULL); - start_addr = epcm->start_addr; - end_addr = epcm->start_addr + snd_pcm_lib_buffer_bytes(substream); + start_addr >>= stereo; + end_addr = start_addr + runtime->buffer_size; snd_emu10k1_pcm_init_voice(emu, 1, 0, epcm->voices[0], start_addr, end_addr, &emu->pcm_mixer[substream->number]); @@ -452,14 +440,13 @@ static int snd_emu10k1_efx_playback_prepare(struct snd_pcm_substream *substream) struct snd_emu10k1 *emu = snd_pcm_substream_chip(substream); struct snd_pcm_runtime *runtime = substream->runtime; struct snd_emu10k1_pcm *epcm = runtime->private_data; - unsigned int start_addr, end_addr; + unsigned int start_addr; unsigned int channel_size; int i; - start_addr = epcm->start_addr; - end_addr = epcm->start_addr + snd_pcm_lib_buffer_bytes(substream); + start_addr = epcm->start_addr >> 1; // 16-bit voices - channel_size = ( end_addr - start_addr ) / NUM_EFX_PLAYBACK; + channel_size = runtime->buffer_size; snd_emu10k1_pcm_init_voice(emu, 1, 1, epcm->extra, start_addr, start_addr + (channel_size / 2), NULL); -- 2.40.0.152.g15d061e6df

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[PATCH v3 00/65] clk: Make determine_rate mandatory for muxes
by Maxime Ripard 18 May '23

18 May '23

Hi, This is a follow-up to a previous series that was printing a warning when a mux has a set_parent implementation but is missing determine_rate(). The rationale is that set_parent() is very likely to be useful when changing the rate, but it's determine_rate() that takes the parenting decision. If we're missing it, then the current parent is always going to be used, and thus set_parent() will not be used. The only exception being a direct call to clk_set_parent(), but those are fairly rare compared to clk_set_rate(). Stephen then asked to promote the warning to an error, and to fix up all the muxes that are in that situation first. So here it is :) It was build-tested on x86, arm and arm64. Affected drivers have been tracked down by the following coccinelle script: virtual report @ clk_ops @ identifier ops; position p; @@ struct clk_ops ops@p = { ... }; @ has_set_parent @ identifier clk_ops.ops; identifier set_parent_f; @@ struct clk_ops ops = { .set_parent = set_parent_f, }; @ has_determine_rate @ identifier clk_ops.ops; identifier determine_rate_f; @@ struct clk_ops ops = { .determine_rate = determine_rate_f, }; @ script:python depends on report && has_set_parent && !has_determine_rate @ ops << clk_ops.ops; set_parent_f << has_set_parent.set_parent_f; p << clk_ops.p; @@ coccilib.report.print_report(p[0], "ERROR: %s has set_parent (%s)" % (ops, set_parent_f)) Berlin is the only user still matching after this series has been applied, but it's because it uses a composite clock which throws the script off. The driver has been converted and shouldn't be a problem. Let me know what you think, Maxime Signed-off-by: Maxime Ripard <maxime(a)cerno.tech> --- Changes in v3: - Rebased on top of next-20230404 - Link to v2: https://lore.kernel.org/r/20221018-clk-range-checks-fixes-v2-0-f6736dec138e… Changes in v2: - Drop all the patches already applied - Promote the clk registration warning to an error - Make all muxes use determine_rate - Link to v1: https://lore.kernel.org/r/20221018-clk-range-checks-fixes-v1-0-f3ef80518140… --- Maxime Ripard (65): clk: Export clk_hw_forward_rate_request() clk: lan966x: Remove unused round_rate hook clk: nodrv: Add a determine_rate hook clk: test: Add a determine_rate hook clk: actions: composite: Add a determine_rate hook for pass clk clk: at91: main: Add a determine_rate hook clk: at91: sckc: Add a determine_rate hook clk: berlin: div: Add a determine_rate hook clk: cdce706: Add a determine_rate hook clk: k210: pll: Add a determine_rate hook clk: k210: aclk: Add a determine_rate hook clk: k210: mux: Add a determine_rate hook clk: lmk04832: clkout: Add a determine_rate hook clk: lochnagar: Add a determine_rate hook clk: qoriq: Add a determine_rate hook clk: si5341: Add a determine_rate hook clk: stm32f4: mux: Add a determine_rate hook clk: vc5: mux: Add a determine_rate hook clk: vc5: clkout: Add a determine_rate hook clk: wm831x: clkout: Add a determine_rate hook clk: davinci: da8xx-cfgchip: Add a determine_rate hook clk: davinci: da8xx-cfgchip: Add a determine_rate hook clk: imx: busy: Add a determine_rate hook clk: imx: fixup-mux: Add a determine_rate hook clk: imx: scu: Add a determine_rate hook clk: mediatek: cpumux: Add a determine_rate hook clk: pxa: Add a determine_rate hook clk: renesas: r9a06g032: Add a determine_rate hook clk: socfpga: gate: Add a determine_rate hook clk: stm32: core: Add a determine_rate hook clk: tegra: bpmp: Add a determine_rate hook clk: tegra: super: Add a determine_rate hook clk: tegra: periph: Add a determine_rate hook clk: ux500: prcmu: Add a determine_rate hook clk: ux500: sysctrl: Add a determine_rate hook clk: versatile: sp810: Add a determine_rate hook drm/tegra: sor: Add a determine_rate hook phy: cadence: sierra: Add a determine_rate hook phy: cadence: torrent: Add a determine_rate hook phy: ti: am654-serdes: Add a determine_rate hook phy: ti: j721e-wiz: Add a determine_rate hook rtc: sun6i: Add a determine_rate hook ASoC: tlv320aic32x4: Add a determine_rate hook clk: actions: composite: div: Switch to determine_rate clk: actions: composite: fact: Switch to determine_rate clk: at91: smd: Switch to determine_rate clk: axi-clkgen: Switch to determine_rate clk: cdce706: divider: Switch to determine_rate clk: cdce706: clkout: Switch to determine_rate clk: si5341: Switch to determine_rate clk: si5351: pll: Switch to determine_rate clk: si5351: msynth: Switch to determine_rate clk: si5351: clkout: Switch to determine_rate clk: da8xx: clk48: Switch to determine_rate clk: imx: scu: Switch to determine_rate clk: ingenic: cgu: Switch to determine_rate clk: ingenic: tcu: Switch to determine_rate clk: sprd: composite: Switch to determine_rate clk: st: flexgen: Switch to determine_rate clk: stm32: composite: Switch to determine_rate clk: tegra: periph: Switch to determine_rate clk: tegra: super: Switch to determine_rate ASoC: tlv320aic32x4: pll: Switch to determine_rate ASoC: tlv320aic32x4: div: Switch to determine_rate clk: Forbid to register a mux without determine_rate drivers/clk/actions/owl-composite.c | 35 +++++++++++----- drivers/clk/actions/owl-composite.h | 2 +- drivers/clk/at91/clk-main.c | 3 +- drivers/clk/at91/clk-smd.c | 29 +++++++------ drivers/clk/at91/sckc.c | 3 +- drivers/clk/berlin/berlin2-div.c | 3 +- drivers/clk/clk-axi-clkgen.c | 14 ++++--- drivers/clk/clk-cdce706.c | 31 ++++++++------ drivers/clk/clk-k210.c | 17 +++++--- drivers/clk/clk-lan966x.c | 17 -------- drivers/clk/clk-lmk04832.c | 1 + drivers/clk/clk-lochnagar.c | 2 + drivers/clk/clk-qoriq.c | 10 +++-- drivers/clk/clk-si5341.c | 21 +++++----- drivers/clk/clk-si5351.c | 67 +++++++++++++++++-------------- drivers/clk/clk-stm32f4.c | 3 +- drivers/clk/clk-versaclock5.c | 8 ++-- drivers/clk/clk-wm831x.c | 3 +- drivers/clk/clk.c | 15 +++++++ drivers/clk/clk_test.c | 1 + drivers/clk/davinci/da8xx-cfgchip.c | 15 ++++--- drivers/clk/imx/clk-busy.c | 3 +- drivers/clk/imx/clk-fixup-mux.c | 3 +- drivers/clk/imx/clk-scu.c | 27 +++++++++++-- drivers/clk/ingenic/cgu.c | 15 +++---- drivers/clk/ingenic/tcu.c | 19 +++++---- drivers/clk/mediatek/clk-cpumux.c | 3 +- drivers/clk/pxa/clk-pxa.c | 3 +- drivers/clk/renesas/r9a06g032-clocks.c | 3 +- drivers/clk/socfpga/clk-gate.c | 3 +- drivers/clk/sprd/composite.c | 16 +++++--- drivers/clk/st/clk-flexgen.c | 15 +++---- drivers/clk/stm32/clk-stm32-core.c | 33 ++++++++++----- drivers/clk/tegra/clk-bpmp.c | 7 +++- drivers/clk/tegra/clk-periph.c | 19 ++++++--- drivers/clk/tegra/clk-super.c | 18 ++++++--- drivers/clk/ux500/clk-prcmu.c | 3 +- drivers/clk/ux500/clk-sysctrl.c | 4 +- drivers/clk/versatile/clk-sp810.c | 3 +- drivers/gpu/drm/tegra/sor.c | 3 +- drivers/phy/cadence/phy-cadence-sierra.c | 1 + drivers/phy/cadence/phy-cadence-torrent.c | 1 + drivers/phy/ti/phy-am654-serdes.c | 1 + drivers/phy/ti/phy-j721e-wiz.c | 1 + drivers/rtc/rtc-sun6i.c | 2 + sound/soc/codecs/tlv320aic32x4-clk.c | 37 ++++++++++------- 46 files changed, 343 insertions(+), 200 deletions(-) --- base-commit: 6a53bda3aaf3de5edeea27d0b1d8781d067640b6 change-id: 20221018-clk-range-checks-fixes-2039f3523240 Best regards, -- Maxime Ripard <maxime(a)cerno.tech>

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[PATCH 0/5] ASoC: mt8188: add new board support
by Trevor Wu 18 May '23

18 May '23

In the series, we extend the capability of mt8188-mt6359 driver. The following changes are included. 1. Divide ADDA BE dai into two dais for SOF. 2. Register hdmi/dp jack pins. 3. dai_fmt can be configured from device tree. 4. Add some I2S codecs support. In addition, new compatible string "mediatek,mt8188-nau8825" is included for a new board support. Trevor Wu (5): ASoC: mediatek: mt8188: separate ADDA playback dai from capture dai ASoC: mediatek: mt8188-mt6359: register hdmi/dp jack pins ASoC: mediatek: common: soundcard driver add dai_fmt support ASoC: mediatek: mt8188-mt6359: support new board with nau88255 ASoC: dt-bindings: mediatek,mt8188-mt6359: update properties .../sound/mediatek,mt8188-mt6359.yaml | 27 +- sound/soc/mediatek/Kconfig | 4 + .../mediatek/common/mtk-soundcard-driver.c | 49 ++- sound/soc/mediatek/mt8188/mt8188-afe-common.h | 3 +- sound/soc/mediatek/mt8188/mt8188-dai-adda.c | 76 ++-- sound/soc/mediatek/mt8188/mt8188-mt6359.c | 326 +++++++++++++++++- 6 files changed, 431 insertions(+), 54 deletions(-) -- 2.18.0

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[PATCH][next] ALSA: mixart: Replace one-element arrays with simple object declarations
by Gustavo A. R. Silva 18 May '23

18 May '23

One-element arrays are deprecated, and we are replacing them with flexible array members, instead. However, in this case it seems those one-element arrays have never actually been used as fake flexible arrays. See this code that dates from Linux-2.6.12-rc2 initial git repository build (commit 1da177e4c3f4 ("Linux-2.6.12-rc2")): sound/pci/mixart/mixart_core.h: 215 struct mixart_stream_state_req 216 { 217 u32 delayed; 218 u64 scheduler; 219 u32 reserved4np[3]; 220 u32 stream_count; /* set to 1 for instance */ 221 struct mixart_flow_info stream_info; /* could be an array[stream_cou nt] */ 222 } __attribute__((packed)); sound/pci/mixart/mixart.c: 388 389 memset(&stream_state_req, 0, sizeof(stream_state_req)); 390 stream_state_req.stream_count = 1; 391 stream_state_req.stream_info.stream_desc.uid_pipe = stream->pipe->group_uid; 392 stream_state_req.stream_info.stream_desc.stream_idx = stream->substream->number; 393 So, taking the code above as example, replace multiple one-element arrays with simple object declarations, and refactor the rest of the code, accordingly. This helps with the ongoing efforts to tighten the FORTIFY_SOURCE routines on memcpy() and help us make progress towards globally enabling -fstrict-flex-arrays=3 [1]. This results in no differences in binary output. Link: https://github.com/KSPP/linux/issues/79 Link: https://github.com/KSPP/linux/issues/296 Link: https://gcc.gnu.org/pipermail/gcc-patches/2022-October/602902.html [1] Signed-off-by: Gustavo A. R. Silva <gustavoars(a)kernel.org> --- sound/pci/mixart/mixart.c | 8 ++++---- sound/pci/mixart/mixart_core.h | 7 +++---- 2 files changed, 7 insertions(+), 8 deletions(-) diff --git a/sound/pci/mixart/mixart.c b/sound/pci/mixart/mixart.c index 1b078b789604..7ceaf6a7a77e 100644 --- a/sound/pci/mixart/mixart.c +++ b/sound/pci/mixart/mixart.c @@ -98,7 +98,7 @@ static int mixart_set_pipe_state(struct mixart_mgr *mgr, memset(&group_state, 0, sizeof(group_state)); group_state.pipe_count = 1; - group_state.pipe_uid[0] = pipe->group_uid; + group_state.pipe_uid = pipe->group_uid; if(start) request.message_id = MSG_STREAM_START_STREAM_GRP_PACKET; @@ -185,7 +185,7 @@ static int mixart_set_clock(struct mixart_mgr *mgr, clock_properties.clock_mode = CM_STANDALONE; clock_properties.frequency = rate; clock_properties.nb_callers = 1; /* only one entry in uid_caller ! */ - clock_properties.uid_caller[0] = pipe->group_uid; + clock_properties.uid_caller = pipe->group_uid; dev_dbg(&mgr->pci->dev, "mixart_set_clock to %d kHz\n", rate); @@ -565,8 +565,8 @@ static int mixart_set_format(struct mixart_stream *stream, snd_pcm_format_t form stream_param.pipe_count = 1; /* set to 1 */ stream_param.stream_count = 1; /* set to 1 */ - stream_param.stream_desc[0].uid_pipe = stream->pipe->group_uid; - stream_param.stream_desc[0].stream_idx = stream->substream->number; + stream_param.stream_desc.uid_pipe = stream->pipe->group_uid; + stream_param.stream_desc.stream_idx = stream->substream->number; request.message_id = MSG_STREAM_SET_INPUT_STAGE_PARAM; request.uid = (struct mixart_uid){0,0}; diff --git a/sound/pci/mixart/mixart_core.h b/sound/pci/mixart/mixart_core.h index 2f0e29ed5d63..ac74b2133c97 100644 --- a/sound/pci/mixart/mixart_core.h +++ b/sound/pci/mixart/mixart_core.h @@ -231,7 +231,7 @@ struct mixart_group_state_req u64 scheduler; u32 reserved4np[2]; u32 pipe_count; /* set to 1 for instance */ - struct mixart_uid pipe_uid[1]; /* could be an array[pipe_count] */ + struct mixart_uid pipe_uid; } __attribute__((packed)); struct mixart_group_state_resp @@ -314,7 +314,7 @@ struct mixart_clock_properties u32 format; u32 board_mask; u32 nb_callers; /* set to 1 (see below) */ - struct mixart_uid uid_caller[1]; + struct mixart_uid uid_caller; } __attribute__((packed)); struct mixart_clock_properties_resp @@ -401,8 +401,7 @@ struct mixart_stream_param_desc u32 reserved4np[3]; u32 pipe_count; /* set to 1 (array size !) */ u32 stream_count; /* set to 1 (array size !) */ - struct mixart_txx_stream_desc stream_desc[1]; /* only one stream per command, but this could be an array */ - + struct mixart_txx_stream_desc stream_desc; } __attribute__((packed)); -- 2.34.1

2 1

[PATCH 0/9] ASoC: amd: ps: add soundwire support
by Vijendar Mukunda 18 May '23

18 May '23

This patch series add support for - Platform device creation for Soundwire Manager instances and PDM controller. - Soundwire DMA driver. - Interrupt handling for Soundwire manager related interrupts, Soundwire DMA interrupts and ACP error interrupts. - ACP PCI driver PM ops modification with respect to Soundwire Power modes. Vijendar Mukunda (9): ASoC: amd: ps: create platform devices based on acp config ASoC: amd: ps: handle soundwire interrupts in acp pci driver ASoC: amd: ps: add soundwire dma driver for ps platform ASoC: amd: ps: add soundwire dma driver dma ops ASoC: amd: ps: add support for Soundwire DMA interrupts ASoC: amd: ps: add pm ops support for soundwire dma driver ASoC: amd: ps: enable Soundwire DMA driver build ASoC: amd: update comments in Kconfig file ASoC: amd: ps: Add soundwire specific checks in pci driver in pm ops. sound/soc/amd/Kconfig | 3 +- sound/soc/amd/ps/Makefile | 2 + sound/soc/amd/ps/acp63.h | 145 ++++++++- sound/soc/amd/ps/pci-ps.c | 393 +++++++++++++++++++++-- sound/soc/amd/ps/ps-sdw-dma.c | 574 ++++++++++++++++++++++++++++++++++ 5 files changed, 1095 insertions(+), 22 deletions(-) create mode 100644 sound/soc/amd/ps/ps-sdw-dma.c -- 2.34.1

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Bug Report ALC294
by Luca Adrian Lindhorst 18 May '23

18 May '23

Hello, I recently got a ASUS ROG Strix G17 13PV with a Ryzen 7945HX. I am running arch with kernel 6.3.2. Unfortunately the speakers aren't working. Headphones, Microphone (internal and on headset) are working fine. I already fiddled with some workarounds: specifying model=asus-zenbook and model=asus-zenbook-ux31a and fiddling with hda-analyzer, but nothing with success. Any help would be appreciated. See the attached alsa info dump. Kind regards Luca Lindhorst

1 0

No sound with Realtek ALC298 on a Samsung Galaxy book
by Aurélien 17 May '23

17 May '23

Hi, Several years ago I sent several mails about problem with Realtek ALC 298 sound card not working on Samsung Galaxy book. Due to a computer problem i had to stop working on it. However I succeed to get it working and I'm submitting the patch attached to this email. Internal speakers works very well. In order to get headset working I had to hack a little bit since it shares the same pin widget (0x17) with the internal speaker. It seems that the ALSA code have solutions to declare a pin widget as both internal and jack but if I use that it doesn't recognize the presence of the jack.. Maybe I'm wrong somewhere. Last but not least i saw that under windows the driver uses another mixer (0xd through the out widget 0x3 rather than mixer 0xc throught the out widget 0x2) when it uses the headset. It offers the opportunity to have a dedicated volume control for the headset independant from the internal speaker. Maybe it could be interesting to do the same under the Linux driver. Unfortunately I don't know how to do that. Do you think is it possible to integrate this patch to the ALSA code? Thanks in advance. Aurélien

2 2

[PATCH] ALSA: emu10k1: fix 64-bit integer division
by Arnd Bergmann 17 May '23

17 May '23

From: Arnd Bergmann <arnd(a)arndb.de> Division of 64-bit values causes a link failure on 32-bit targets, depending on compiler version and target architecture: ERROR: modpost: "__divdi3" [sound/pci/emu10k1/snd-emu10k1.ko] undefined! ERROR: modpost: "__udivdi3" [sound/pci/emu10k1/snd-emu10k1.ko] undefined! Replace these with the safe div_u64() helpers. Fixes: bb5ceb43b7bf ("ALSA: emu10k1: fix non-zero mixer control defaults in highres mode") Signed-off-by: Arnd Bergmann <arnd(a)arndb.de> --- sound/pci/emu10k1/emufx.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/pci/emu10k1/emufx.c b/sound/pci/emu10k1/emufx.c index f64b2b4eb348..7c28789720d1 100644 --- a/sound/pci/emu10k1/emufx.c +++ b/sound/pci/emu10k1/emufx.c @@ -1156,7 +1156,7 @@ snd_emu10k1_init_mono_control(struct snd_emu10k1_fx8010_control_gpr *ctl, ctl->max = 0x7fffffff; ctl->tlv = snd_emu10k1_db_linear; ctl->translation = EMU10K1_GPR_TRANSLATION_NEGATE; - defval = defval * 0x80000000LL / 100 - 1; + defval = div_u64(defval * 0x80000000LL, 100) - 1; } else { ctl->min = 0; ctl->max = 100; @@ -1178,7 +1178,7 @@ snd_emu10k1_init_stereo_control(struct snd_emu10k1_fx8010_control_gpr *ctl, ctl->max = 0x7fffffff; ctl->tlv = snd_emu10k1_db_linear; ctl->translation = EMU10K1_GPR_TRANSLATION_NEGATE; - defval = defval * 0x80000000LL / 100 - 1; + defval = div_u64(defval * 0x80000000LL, 100) - 1; } else { ctl->min = 0; ctl->max = 100; -- 2.39.2

2 1

[PATCH] ALSA: emu10k1: remove runtime 64-bit divisions
by Oswald Buddenhagen 17 May '23

17 May '23

32-bit platforms don't like these. As we're actually dealing with constants, factor out the calculations and pass them in as additional arguments. To keep the call sites clean, wrap the actual functions in macros which generate the arguments. Fixes: bb5ceb43b7bf ("ALSA: emu10k1: fix non-zero mixer control defaults in highres mode") Fixes: 1298bc978afb ("ALSA: emu10k1: enable bit-exact playback, part 1: DSP attenuation") Signed-off-by: Oswald Buddenhagen <oswald.buddenhagen(a)gmx.de> --- Cc: Christophe Leroy <christophe.leroy(a)csgroup.eu> Cc: Naresh Kamboju <naresh.kamboju(a)linaro.org> --- sound/pci/emu10k1/emufx.c | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/sound/pci/emu10k1/emufx.c b/sound/pci/emu10k1/emufx.c index f64b2b4eb348..e9855d37fa5c 100644 --- a/sound/pci/emu10k1/emufx.c +++ b/sound/pci/emu10k1/emufx.c @@ -1144,50 +1144,56 @@ static int snd_emu10k1_ipcm_peek(struct snd_emu10k1 *emu, #define SND_EMU10K1_PLAYBACK_CHANNELS 8 #define SND_EMU10K1_CAPTURE_CHANNELS 4 +#define HR_VAL(v) ((v) * 0x80000000LL / 100 - 1) + static void -snd_emu10k1_init_mono_control(struct snd_emu10k1_fx8010_control_gpr *ctl, - const char *name, int gpr, int defval) +snd_emu10k1_init_mono_control2(struct snd_emu10k1_fx8010_control_gpr *ctl, + const char *name, int gpr, int defval, int defval_hr) { ctl->id.iface = (__force int)SNDRV_CTL_ELEM_IFACE_MIXER; strcpy(ctl->id.name, name); ctl->vcount = ctl->count = 1; if (high_res_gpr_volume) { ctl->min = -1; ctl->max = 0x7fffffff; ctl->tlv = snd_emu10k1_db_linear; ctl->translation = EMU10K1_GPR_TRANSLATION_NEGATE; - defval = defval * 0x80000000LL / 100 - 1; + defval = defval_hr; } else { ctl->min = 0; ctl->max = 100; ctl->tlv = snd_emu10k1_db_scale1; ctl->translation = EMU10K1_GPR_TRANSLATION_NEG_TABLE100; } ctl->gpr[0] = gpr + 0; ctl->value[0] = defval; } +#define snd_emu10k1_init_mono_control(ctl, name, gpr, defval) \ + snd_emu10k1_init_mono_control2(ctl, name, gpr, defval, HR_VAL(defval)) static void -snd_emu10k1_init_stereo_control(struct snd_emu10k1_fx8010_control_gpr *ctl, - const char *name, int gpr, int defval) +snd_emu10k1_init_stereo_control2(struct snd_emu10k1_fx8010_control_gpr *ctl, + const char *name, int gpr, int defval, int defval_hr) { ctl->id.iface = (__force int)SNDRV_CTL_ELEM_IFACE_MIXER; strcpy(ctl->id.name, name); ctl->vcount = ctl->count = 2; if (high_res_gpr_volume) { ctl->min = -1; ctl->max = 0x7fffffff; ctl->tlv = snd_emu10k1_db_linear; ctl->translation = EMU10K1_GPR_TRANSLATION_NEGATE; - defval = defval * 0x80000000LL / 100 - 1; + defval = defval_hr; } else { ctl->min = 0; ctl->max = 100; ctl->tlv = snd_emu10k1_db_scale1; ctl->translation = EMU10K1_GPR_TRANSLATION_NEG_TABLE100; } ctl->gpr[0] = gpr + 0; ctl->value[0] = defval; ctl->gpr[1] = gpr + 1; ctl->value[1] = defval; } +#define snd_emu10k1_init_stereo_control(ctl, name, gpr, defval) \ + snd_emu10k1_init_stereo_control2(ctl, name, gpr, defval, HR_VAL(defval)) static void snd_emu10k1_init_mono_onoff_control(struct snd_emu10k1_fx8010_control_gpr *ctl, -- 2.40.0.152.g15d061e6df

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next: gcc-8-ppc6xx_defconfig: ERROR: modpost: "__divdi3" [sound/pci/emu10k1/snd-emu10k1.ko] undefined!
by Naresh Kamboju 17 May '23

17 May '23

Linux next powerpc gcc-8 build failed on Linux next 20230516 and 20230517. - build/gcc-8-ppc6xx_defconfig Reported-by: Linux Kernel Functional Testing <lkft(a)linaro.org> Build log: ==== make --silent --keep-going --jobs=8 O=/home/tuxbuild/.cache/tuxmake/builds/1/build \ ARCH=powerpc CROSS_COMPILE=powerpc64le-linux-gnu- \ 'CC=sccache powerpc64le-linux-gnu-gcc' \ 'HOSTCC=sccache gcc' ERROR: modpost: "__divdi3" [sound/pci/emu10k1/snd-emu10k1.ko] undefined! ERROR: modpost: "__udivdi3" [sound/pci/emu10k1/snd-emu10k1.ko] undefined! make[2]: *** [/builds/linux/scripts/Makefile.modpost:136: Module.symvers] Error 1 make[2]: Target '__modpost' not remade because of errors. make[1]: *** [/builds/linux/Makefile:1978: modpost] Error 2 links, - https://qa-reports.linaro.org/lkft/linux-next-master/build/next-20230517/te… - https://qa-reports.linaro.org/lkft/linux-next-master/build/next-20230517/te… Steps to reproduce: ======= # To install tuxmake on your system globally: # sudo pip3 install -U tuxmake # # See https://docs.tuxmake.org/ for complete documentation. # Original tuxmake command with fragments listed below. tuxmake --runtime podman --target-arch powerpc --toolchain gcc-8 --kconfig ppc6xx_defconfig -- Linaro LKFT https://lkft.linaro.org

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