December 2016 - Alsa-devel - mailman.alsa-project.org

[alsa-devel] [PATCH 1/2] ASoC: nau8825: correct the function name of register
by John Hsu 23 Jan '17

23 Jan '17

Change to correct name of the register function. Signed-off-by: John Hsu <KCHSU0(a)nuvoton.com> --- sound/soc/codecs/nau8825.c | 6 +++--- sound/soc/codecs/nau8825.h | 4 ++-- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/sound/soc/codecs/nau8825.c b/sound/soc/codecs/nau8825.c index e4fb017..9c98d35 100644 --- a/sound/soc/codecs/nau8825.c +++ b/sound/soc/codecs/nau8825.c @@ -561,9 +561,9 @@ static void nau8825_xtalk_prepare(struct nau8825 *nau8825) nau8825_xtalk_backup(nau8825); /* Config IIS as master to output signal by codec */ regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2, - NAU8825_I2S_MS_MASK | NAU8825_I2S_DRV_MASK | + NAU8825_I2S_MS_MASK | NAU8825_I2S_LRC_DIV_MASK | NAU8825_I2S_BLK_DIV_MASK, NAU8825_I2S_MS_MASTER | - (0x2 << NAU8825_I2S_DRV_SFT) | 0x1); + (0x2 << NAU8825_I2S_LRC_DIV_SFT) | 0x1); /* Ramp up headphone volume to 0dB to get better performance and * avoid pop noise in headphone. */ @@ -657,7 +657,7 @@ static void nau8825_xtalk_clean(struct nau8825 *nau8825) NAU8825_IRQ_RMS_EN, NAU8825_IRQ_RMS_EN); /* Recover default value for IIS */ regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2, - NAU8825_I2S_MS_MASK | NAU8825_I2S_DRV_MASK | + NAU8825_I2S_MS_MASK | NAU8825_I2S_LRC_DIV_MASK | NAU8825_I2S_BLK_DIV_MASK, NAU8825_I2S_MS_SLAVE); /* Restore value of specific register for cross talk */ nau8825_xtalk_restore(nau8825); diff --git a/sound/soc/codecs/nau8825.h b/sound/soc/codecs/nau8825.h index 5732ce1..4b390c4 100644 --- a/sound/soc/codecs/nau8825.h +++ b/sound/soc/codecs/nau8825.h @@ -248,8 +248,8 @@ /* I2S_PCM_CTRL2 (0x1d) */ #define NAU8825_I2S_TRISTATE (1 << 15) /* 0 - normal mode, 1 - Hi-Z output */ -#define NAU8825_I2S_DRV_SFT 12 -#define NAU8825_I2S_DRV_MASK (0x3 << NAU8825_I2S_DRV_SFT) +#define NAU8825_I2S_LRC_DIV_SFT 12 +#define NAU8825_I2S_LRC_DIV_MASK (0x3 << NAU8825_I2S_LRC_DIV_SFT) #define NAU8825_I2S_MS_SFT 3 #define NAU8825_I2S_MS_MASK (1 << NAU8825_I2S_MS_SFT) #define NAU8825_I2S_MS_MASTER (1 << NAU8825_I2S_MS_SFT) -- 2.6.4

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[alsa-devel] [PATCH v5 0/2] ALSA controls management using index/device/sub-devices fields
by Arnaud Pouliquen 20 Jan '17

20 Jan '17

Previous discussions summary: - Topic of the patchset: Patch concerns ASoc DAI drivers. Aim is to be able to instantiate PCM control using device field according to the associated PCM char device. For this, a relationship between DAIs PCM control and PCM char device needs to be establish. => Proposal is to add field in DAI driver struct to declare PCM controls that need to be linked to PCM character device on DAI link probing. - Limitation of the patchset: This patchset seems only a first step as 2 concerns are been highlighted: - Patch is limited to "static" DAI-link. This not responds to backend (no_pcm dai links) and some none-DAI codecs, that could register PCm controls. In theses cases it is not possible to establish relationship during probe. => No solution proposed for time beeing. - This patchset does not fix conflict of 2 "identical" PCM controls declared by 2 drivers. For instance, a conflict can exist between a PCM control created in DAI driver and the same control declared in a codec driver. As index field is forced to 0, prefix should be used in codec. => To discuss solution in a separate thread as issue already present without this patchset several approaches seem possible like using index field ( control auto indexation in ASoC) or prefix in Naming. V5: - [PATCH v5 1/2] ASoC: core: allow DAI PCM controls bound to PCM device Minor fixes in comment and error message. - [PATCH v5 2/2] ASoC: sti: bind pcm controls to pcm device. No change since V2. V4: - [PATCH v4 1/2] ASoC: core: allow DAI PCM controls bound to PCM device Fix and rework error management in soc_link_dai_pcm_controls function. - [PATCH v4 2/2] ASoC: sti: bind pcm controls to pcm device. No change since V2. V3: - [PATCH v3 1/2] ASoC: core: allow DAI PCM controls bound to PCM device Code optimization based on Takashi Sakamoto suggestion - [RFC V2 3/3] ASoC: hdmi-codec: Example of PCM control bound to PCM device for multi patch suppressed as it was send as example in previous version. Patch is valid but can have impact on existing drivers as control device field value is updated - [PATCH v3 2/2] ASoC: sti: bind pcm controls to pcm device. No change vs V2 V2: http://www.spinics.net/lists/alsa-devel/msg57045.html Aim of this version is to continue discussion on DAI PCM control focused on ASoC drivers. In this V2 implementation in Soc-core is simplified to limit impact on existing code. Update of the RFC V1 based on discussions: - [RFC 4/4] iecset: allow to select control with device and sub-device numbers no more part of the RFC V2, will be discussed in a separate thread - [RFC 2/4] ALSA: control: increment index field for duplicated control. no more part of the RFC V2, no more need as RFC subject is PCM controls - [RFC V2 1/3] ASoC: core: allow DAI PCM controls bound to PCM device Patch reworked from V1 to simplify implementation - Binding is not done for Dai links tagged with no_pcm (DPCM). - no more possibility to add the controls after the DAI link probing. - [RFC V2 2/3] ASoC: sti: bind PCM controls to PCM device. - [RFC V2 3/3] ASoC: hdmi-codec: Example of PCM control bound to PCM device for multi Example of implementation in STI DAI driver and HDMI-codec drivers V1: http://www.spinics.net/lists/alsa-devel/msg56479.html 1) Alsa-utils patch - iecset: allow to select control with device and sub-device numbers This patch allows to access to 2 iec controls differentiated by device/sub-devices numbers => For me, this patch is mandatory to be able to address the ASoC IEC controls, in case of no fix is implemented to allows index field update in ASoC. 2) Alsa driver patches - ASoC: core: allow PCM control binding to PCM device Add relationship between DAIs PCM controls and PCM device. - ALSA: control: increment index field for duplicated control. Generic implementation of the patch proposed in HDA driver (http://git.kernel.org/cgit/linux/kernel/git/tiwai/sound.git/commit/?id=ea9b…) - ASoC: sti: use bind_pcm_ctl implementation of bind_pcm_ctl for sti driver. Arnaud Pouliquen (2): ASoC: core: allow DAI PCM controls bound to PCM device ASoC: sti: bind pcm controls to pcm device. include/sound/soc-dai.h | 8 ++++++++ sound/soc/soc-core.c | 35 +++++++++++++++++++++++++++++++++++ sound/soc/sti/sti_uniperif.c | 33 ++++----------------------------- 3 files changed, 47 insertions(+), 29 deletions(-) -- 1.9.1

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[alsa-devel] [PATCH 0/2] Generic HDMI codec: Add channel mapping control
by Arnaud Pouliquen 20 Jan '17

20 Jan '17

Aim of this patch is to add 'Playback Channel Map' control to export audio capabilities in term of HDMI sink speakers allocation. This patch follow discussion initiates here: [RFC] ASOC: HDMI audio info frame speaker allocation http://www.spinics.net/lists/alsa-devel/msg57363.html The code is fully inspired from HDA driver. On hw_param, HDMI sink speaker capabilities are exported via TLV ops and a CEA allocation is choson, based on ELD information and the number of channels requested by user. Mains differences with HDA implementation are: - Control is read only - Channel swap is not supported. Consequence is that unused channel in the mid of CEA audio infoframe channel mapping are considered as active. example for channel allocation 0x02: FL, FR, 0, FC) This configuration is only available for a 4 channels stream. - Channel allocation table has been reordered and HDMI 2.0 is not supported. Arnaud Pouliquen (2): DRM: add help to get ELD speaker allocation ASoC: hdmi-codec: add channel mapping control include/drm/drm_edid.h | 13 ++ sound/soc/codecs/hdmi-codec.c | 346 +++++++++++++++++++++++++++++++++++++++++- 2 files changed, 358 insertions(+), 1 deletion(-) -- 1.9.1

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[alsa-devel] [PATCH v2 0/4] Generic HDMI codec: Add channel mapping control
by Arnaud Pouliquen 20 Jan '17

20 Jan '17

Aim of this patch is to add 'Playback Channel Map' control to export audio capabilities in term of HDMI sink speakers allocation. V2: In this version I use chmap helper functions from pcm_lib.c. It is quite tricky to use it from ASoC due to the relation chip of the controls with the pcm runtime. After several tries, my conclusion is that it must be handled in ASoC DAI driver. Main reason is that the DAI driver can not provide snd_pcm_chmap struct through kcontrol structure. But this induces that soc-core provides pcm runtime structure to DAI driver during probe. Base on this conclusion. I reworked my patches by adding 2 new patches in patch-set 1) ALSA pcm: allow non constant snd_pcm_chmap_elem This patch allows to handle non constant channel mapping. As ELD information can change during runtime it is mandatory to properly handle the feature. In term of compatibility with legacy it should be straightforward, as update just consists in suppressing the 'const' constraint. 2) ASoC: core: add optional pcm_new callback for DAI driver This is the only way i found to be able to use snd_pcm_add_chmap_ctls and associated controls helper functions. From my point of view, this is the more simple way to add relationship between DAI and associated pcm devices. Notice that this patch, if accepted, makes the following one obsolete, as it also answer to the associated topic: [PATCH v5 0/2] ALSA controls management using index/device/sub-devices fields (http://www.spinics.net/lists/alsa-devel/msg57639.html). If you estimate that this it not reasonable i will come back to my first version. V1: This patch follow discussion initiates here: [RFC] ASOC: HDMI audio info frame speaker allocation http://www.spinics.net/lists/alsa-devel/msg57363.html The code is fully inspired from HDA driver. On hw_param, HDMI sink speaker capabilities are exported via TLV ops and a CEA allocation is choson, based on ELD information and the number of channels requested by user. Mains differences with HDA implementation are: - Control is read only - Channel swap is not supported. Consequence is that unused channel in the mid of CEA audio infoframe channel mapping are considered as active. example for channel allocation 0x02: FL, FR, 0, FC) This configuration is only available for a 4 channels stream. - Channel allocation table has been reordered and HDMI 2.0 is not supported. Arnaud Pouliquen (4): DRM: add help to get ELD speaker allocation ALSA pcm: allow non constant snd_pcm_chmap_elem ASoC: core: add optional pcm_new callback for DAI driver ASoC: hdmi-codec: add channel mapping control include/drm/drm_edid.h | 13 ++ include/sound/pcm.h | 4 +- include/sound/soc-dai.h | 3 + sound/core/pcm_lib.c | 6 +- sound/soc/codecs/hdmi-codec.c | 310 +++++++++++++++++++++++++++++++++++++++++- sound/soc/soc-core.c | 28 ++++ 6 files changed, 358 insertions(+), 6 deletions(-) -- 1.9.1

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[alsa-devel] Intel HDA audio on EEE PC 1101HGo
by Enrico Mioso 20 Jan '17

20 Jan '17

Hello guys. I am writing to you all to talk you about a strange behaviour of the Intel HDA Audio device on an EEE PC 1101H. The audio device at some point simply doesn't react to commands, giving in dmesgo utput like this: [22321.638079] snd_hda_intel 0000:00:1b.0: azx_get_response timeout, switching to polling mode: last cmd=0x00170503 [22322.641410] snd_hda_intel 0000:00:1b.0: azx_get_response timeout, switching to single_cmd mode: last cmd=0x00170503 This may happen when I boot the system up fresh (here there is no Windows and no hibernation), or when the controller goes to power-save. If I don't set a power save timeout, then the controller will not be recoverable if it gets stuck at boot. As a workaround, I set a very short timeout, so that when the controller fails to start audio, waiting some time and retrying will work. Preliminary infos: Card: HDA Intel MID Chip: Realtek ALC269; Thank you in advance for your help. Please keep me in CC - since I am not subscribed to any list. Enrico Here follows a lspci 00:00.0 Host bridge: Intel Corporation System Controller Hub (SCH Poulsbo) (rev 07) Subsystem: ASUSTeK Computer Inc. Device 83ce Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 00:02.0 VGA compatible controller: Intel Corporation System Controller Hub (SCH Poulsbo) Graphics Controller (rev 07) (prog-if 00 [VGA controller]) Subsystem: ASUSTeK Computer Inc. Device 83ce Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 5 Region 0: Memory at f3f80000 (32-bit, non-prefetchable) [size=512K] Region 1: I/O ports at c880 [size=8] Region 2: Memory at d0000000 (32-bit, non-prefetchable) [size=256M] Region 3: Memory at f3f40000 (32-bit, non-prefetchable) [size=256K] Expansion ROM at <unassigned> [disabled] Capabilities: [d0] Power Management version 2 Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [b0] Vendor Specific Information: Len=07 <?> Capabilities: [90] MSI: Enable- Count=1/1 Maskable- 64bit- Address: 00000000 Data: 0000 Kernel modules: gma500_gfx 00:1b.0 Audio device: Intel Corporation System Controller Hub (SCH Poulsbo) HD Audio Controller (rev 07) Subsystem: ASUSTeK Computer Inc. Device 83ce Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Interrupt: pin A routed to IRQ 23 Region 0: Memory at f3f38000 (64-bit, non-prefetchable) [size=16K] Capabilities: [50] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold-) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [70] Express (v1) Root Complex Integrated Endpoint, MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0 ExtTag- RBE- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend+ Capabilities: [100 v1] Virtual Channel Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 Arb: Fixed- WRR32- WRR64- WRR128- Ctrl: ArbSelect=Fixed Status: InProgress- VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256- Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01 Status: NegoPending- InProgress- VC1: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256- Ctrl: Enable- ID=0 ArbSelect=Fixed TC/VC=00 Status: NegoPending- InProgress- Capabilities: [130 v1] Root Complex Link Desc: PortNumber=0f ComponentID=00 EltType=Config Link0: Desc: TargetPort=00 TargetComponent=00 AssocRCRB- LinkType=MemMapped LinkValid+ Addr: 00000000f0000000 Kernel driver in use: snd_hda_intel Kernel modules: snd_hda_intel 00:1c.0 PCI bridge: Intel Corporation System Controller Hub (SCH Poulsbo) PCI Express Port 1 (rev 07) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Interrupt: pin A routed to IRQ 16 Bus: primary=00, secondary=03, subordinate=03, sec-latency=0 I/O behind bridge: 0000e000-0000efff Memory behind bridge: fbf00000-fbffffff Prefetchable memory behind bridge: 80000000-801fffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0 ExtTag- RBE+ DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #1, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <256ns, L1 <4us ClockPM+ Surprise- LLActRep+ BwNot- ASPMOptComp- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk+ ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+ Slot #0, PowerLimit 0.000W; Interlock- NoCompl- SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- Changed: MRL- PresDet+ LinkState+ RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- Capabilities: [90] Subsystem: ASUSTeK Computer Inc. Device 83ce Capabilities: [a0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: pcieport Kernel modules: shpchp 00:1c.1 PCI bridge: Intel Corporation System Controller Hub (SCH Poulsbo) PCI Express Port 2 (rev 07) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Interrupt: pin B routed to IRQ 17 Bus: primary=00, secondary=01, subordinate=02, sec-latency=0 I/O behind bridge: 0000d000-0000dfff Memory behind bridge: f4000000-fbefffff Prefetchable memory behind bridge: cc000000-cfffffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0 ExtTag- RBE+ DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #2, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <256ns, L1 <4us ClockPM+ Surprise- LLActRep+ BwNot- ASPMOptComp- LnkCtl: ASPM L1 Enabled; RCB 64 bytes Disabled- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+ Slot #0, PowerLimit 0.000W; Interlock- NoCompl- SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- Changed: MRL- PresDet+ LinkState+ RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- Capabilities: [90] Subsystem: ASUSTeK Computer Inc. Device 83ce Capabilities: [a0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: pcieport Kernel modules: shpchp 00:1d.0 USB controller: Intel Corporation System Controller Hub (SCH Poulsbo) USB UHCI #1 (rev 07) (prog-if 00 [UHCI]) Subsystem: ASUSTeK Computer Inc. Device 83ce Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 20 Region 4: I/O ports at b880 [size=32] Kernel driver in use: uhci_hcd Kernel modules: uhci_hcd 00:1d.1 USB controller: Intel Corporation System Controller Hub (SCH Poulsbo) USB UHCI #2 (rev 07) (prog-if 00 [UHCI]) Subsystem: ASUSTeK Computer Inc. Device 83ce Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin B routed to IRQ 21 Region 4: I/O ports at c080 [size=32] Kernel driver in use: uhci_hcd Kernel modules: uhci_hcd 00:1d.2 USB controller: Intel Corporation System Controller Hub (SCH Poulsbo) USB UHCI #3 (rev 07) (prog-if 00 [UHCI]) Subsystem: ASUSTeK Computer Inc. Device 83ce Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin C routed to IRQ 18 Region 4: I/O ports at c480 [size=32] Kernel driver in use: uhci_hcd Kernel modules: uhci_hcd 00:1d.7 USB controller: Intel Corporation System Controller Hub (SCH Poulsbo) USB EHCI #1 (rev 07) (prog-if 20 [EHCI]) Subsystem: ASUSTeK Computer Inc. Device 83ce Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin D routed to IRQ 19 Region 0: Memory at f3f37c00 (32-bit, non-prefetchable) [size=1K] Capabilities: [50] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [58] Debug port: BAR=1 offset=00a0 Kernel driver in use: ehci-pci Kernel modules: ehci_pci 00:1f.0 ISA bridge: Intel Corporation System Controller Hub (SCH Poulsbo) LPC Bridge (rev 07) Subsystem: ASUSTeK Computer Inc. Device 83ce Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Kernel driver in use: lpc_sch Kernel modules: lpc_sch 00:1f.1 IDE interface: Intel Corporation System Controller Hub (SCH Poulsbo) IDE Controller (rev 07) (prog-if 80 [Master]) Subsystem: ASUSTeK Computer Inc. Device 83ce Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Region 0: [virtual] Memory at 000001f0 (32-bit, non-prefetchable) [size=8] Region 1: [virtual] Memory at 000003f0 (type 3, non-prefetchable) Region 2: [virtual] Memory at 00000170 (32-bit, non-prefetchable) [size=8] Region 3: [virtual] Memory at 00000370 (type 3, non-prefetchable) Region 4: I/O ports at ffa0 [size=16] Kernel driver in use: pata_sch Kernel modules: pata_sch, pata_acpi, ata_generic 01:00.0 Network controller: Qualcomm Atheros AR9285 Wireless Network Adapter (PCI-Express) (rev 01) Subsystem: AzureWave AW-NE785 / AW-NE785H 802.11bgn Wireless Full or Half-size Mini PCIe Card Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Interrupt: pin A routed to IRQ 17 Region 0: Memory at fbef0000 (64-bit, non-prefetchable) [size=64K] Capabilities: [40] Power Management version 3 Flags: PMEClk- DSI- D1+ D2- AuxCurrent=375mA PME(D0+,D1+,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit- Address: 00000000 Data: 0pcilib: sysfs_read_vpd: read failed: Connection timed out 000 Capabilities: [60] Express (v2) Legacy Endpoint, MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <512ns, L1 <64us ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 512 bytes DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr+ TransPend- LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <512ns, L1 <64us ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp- LnkCtl: ASPM L1 Enabled; RCB 64 bytes Disabled- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR-, OBFF Not Supported DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis- Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS- Compliance De-emphasis: -6dB LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1- EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest- Capabilities: [100 v1] Advanced Error Reporting UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol- CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+ CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+ AERCap: First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn- Capabilities: [140 v1] Virtual Channel Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 Arb: Fixed- WRR32- WRR64- WRR128- Ctrl: ArbSelect=Fixed Status: InProgress- VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256- Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01 Status: NegoPending- InProgress- Capabilities: [160 v1] Device Serial Number 00-00-00-00-00-00-00-00 Capabilities: [170 v1] Power Budgeting <?> Kernel driver in use: ath9k Kernel modules: ath9k 03:00.0 Ethernet controller: Qualcomm Atheros AR8132 Fast Ethernet (rev c0) Subsystem: ASUSTeK Computer Inc. Device 14e5 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Interrupt: pin A routed to IRQ 24 Region 0: Memory at fbfc0000 (64-bit, non-prefetchable) [size=256K] Region 2: I/O ports at e880 [size=128] Capabilities: [40] Power Management version 3 Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME- Capabilities: [48] MSI: Enable+ Count=1/1 Maskable- 64bit+ Address: 00000000fee0300c Data: 4122 Capabilities: [58] Express (v1) Endpoint, MSI 00 DevCap: MaxPayload 4096 bytes, PhantFunc 0, Latency L0s <4us, L1 unlimited ExtTag- AttnBtn+ AttnInd+ PwrInd+ RBE+ FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 512 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s unlimited, L1 unlimited ClockPM+ Surprise- LLActRep- BwNot- ASPMOptComp- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- Capabilities: [6c] Vital Product Data Not readable Capabilities: [100 v1] Advanced Error Reporting UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq+ ACSViol- UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- UESvrt: DLP- SDES+ TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol- CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr- CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+ AERCap: First Error Pointer: 14, GenCap+ CGenEn- ChkCap+ ChkEn- Capabilities: [180 v1] Device Serial Number ff-25-f6-3a-90-e6-ba-ff Kernel driver in use: atl1c Kernel modules: atl1c

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[alsa-devel] ASoC: fsl_sai: Has anybody attempted to run the i.MX6UL in TDM mode with channels > 2?
by Caleb Crome 19 Jan '17

19 Jan '17

Hi all, Now that the MX6 fsl_ssi seems to be getting stable for TDM with channels > 2 (thanks all!), the MX6 UL and MX7 have only the SAI port. Does anybody have experience with running the SAI with more than 2 channels? Any thoughts or comments would be welcome! Thanks, -Caleb

3 4

[alsa-devel] [PATCH 00/12] ASoC: Intel: Skylake: Driver updates
by jeeja.kp＠intel.com 19 Jan '17

19 Jan '17

From: Jeeja KP <jeeja.kp(a)intel.com> This patch series includes driver updates for the handling scenarios during System S0/S3 transitions when audio stream is stopped during system. o move DMA configuration in DSP Gateway Module widget event handler to ensure DMA is configured after resume. o Enable SSP MLCK using Supply widget. This will ensure the MCLK is enabled when the widget is power on. o Check DMA decouple register state before coupling/decoupling the DMA. o In case of HDMI pass-through pipe, reset only the FE Pipe when stream in in XRUN state. o Resume the stream from HW renderer position. o HDMI Codec pin and converter state need to be restored when stream is resumed. Jeeja KP (12): ASoC: Intel: Skylake: Add helper function to setup host/link dma ASoC: Intel: Skylake: Configure DMA in PRE_PMD handler of Mixer ASoC: Intel: Skylake: Removed unused skl_get_format() ALSA: hda: check stream decoupled register state ASoC: Intel: Skylake: Add set_tristate DAI ops to enable SSP MCLK ASoC: Intel: Skylake: Remove unused SSP BE prepare DAI ops ASoC: Intel: Skylake: Add supply widget as non DSP widget ASoC: Intel: Skylake: Add supply widget in skl_nau_max machine ASoC: Intel: Skylake: Add supply widget in bxt_da_max machine ASoC: Intel: Skylake: Don't reset pass-through pipe in BE prepare ASoC: Intel: Skylake: set the resume point to LPIB ASoC: hdac_hdmi: Enable pin and converter in prepare sound/hda/ext/hdac_ext_stream.c | 15 +- sound/soc/codecs/hdac_hdmi.c | 28 ++-- sound/soc/intel/boards/bxt_da7219_max98357a.c | 34 ++++ sound/soc/intel/boards/skl_nau88l25_max98357a.c | 34 ++++ sound/soc/intel/skylake/skl-pcm.c | 210 +++++++++++++----------- sound/soc/intel/skylake/skl-topology.c | 27 ++- sound/soc/intel/skylake/skl-topology.h | 6 + 7 files changed, 240 insertions(+), 114 deletions(-) -- 2.5.0

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[alsa-devel] [PATCH v2 0/3] ucm: Add support for component devices
by mengdong.lin＠linux.intel.com 18 Jan '17

18 Jan '17

From: Mengdong Lin <mengdong.lin(a)linux.intel.com> Sound cards are defined by machines. And off-soc codecs and DSPs embedded in DSP can be taken as the components and resued by different machines/ sound cards. This series allows codec and SOC vendors to install UCM configuration files for a specific codec or DSP, and sound card verb files can include these conf files of components. Component devices will not be exposed to applications for backward compatibility. So audio servers like PulseAudio and CRAS still only see the machine devices. History: v2: Use an array to define component directories. Document syntax to enable/disable a component device. Hide cdev defined by the parent device in ucm manager for executing a component sequence. Mengdong Lin (3): ucm: Skip component directories when scanning sound card configuration files ucm: Parse sequence of component devices ucm: Execute sequence of component devices src/ucm/main.c | 88 +++++++++++++++++++++++++++++- src/ucm/parser.c | 154 +++++++++++++++++++++++++++++++++++++++++++++++++++- src/ucm/ucm_local.h | 19 +++++++ src/ucm/utils.c | 1 + 4 files changed, 259 insertions(+), 3 deletions(-) -- 2.7.4

3 6

[alsa-devel] [RFC PATCH 0/2] ASoC: Use DMI name in sound card long name
by mengdong.lin＠linux.intel.com 17 Jan '17

17 Jan '17

From: Mengdong Lin <mengdong.lin(a)linux.intel.com> This series is based on Liam's idea to use DMI name as the sound card short name in the audio workshop. After testing on serveral machines, we changed the design a little: - Not change the card name (short name), keep it simple. So the card ID won't change as well. - Use short name and DMI name together to make a readable and unqique long name. Machine drivers can use a new API to get this feature. We hope to get aligned on the kernel side at first, then we'll update UCM code in alsa-lib: when the sound server ask UCM to open a sound card, UCM will try to find the best configuration file that matches the card long name, and only if not avaiable, fallback to the default configuration file that matches the card name (short name). Liam Girdwood (1): ASoC: core: Add API to use DMI name in sound card long name Mengdong Lin (1): ASoC: Intel: Use DMI name for sound card long name in Broadwell machine driver include/sound/soc.h | 5 ++ sound/soc/intel/boards/broadwell.c | 2 + sound/soc/soc-core.c | 134 +++++++++++++++++++++++++++++++++++++ 3 files changed, 141 insertions(+) -- 2.5.0

6 7

Re: [alsa-devel] [PATCH 2/2] ASoC: cx2072x Add driver for CX2072X CODEC
by Mark Brown 11 Jan '17

11 Jan '17

On Sat, Dec 17, 2016 at 03:52:33PM +0800, simon.ho.cnxt(a)gmail.com wrote: > +/*FIXME: need to move the default settings to device tree*/ No, we'd expect things to be configured from userspace via a binary control. > +static unsigned char cx2072x_eq_coeff_array[MAX_EQ_BAND][MAC_EQ_COEFF] = { > + {0x77, 0x26, 0x13, 0xb3, 0x76, 0x26, 0x0a, 0x3d, 0xd4, 0xe2, 0x04}, > + {0x97, 0x3e, 0xb3, 0x86, 0xc2, 0x3b, 0x4d, 0x79, 0xa7, 0xc5, 0x03}, > + {0x0f, 0x39, 0x76, 0xa3, 0x1b, 0x2b, 0x89, 0x5c, 0xd7, 0xdb, 0x03}, > + {0x21, 0x46, 0xfe, 0xa6, 0xec, 0x24, 0x01, 0x59, 0xf4, 0xd4, 0x03}, > + {0xe9, 0x78, 0x9c, 0xb0, 0x8a, 0x56, 0x64, 0x4f, 0x8d, 0xb0, 0x02}, > + {0x60, 0x6e, 0x57, 0xee, 0xec, 0x18, 0xa8, 0x11, 0xb5, 0xf8, 0x02}, > + {0x5a, 0x14, 0x68, 0xe9, 0x1d, 0x06, 0xb9, 0x5f, 0x68, 0xdc, 0x03}, > +}; > + > +static unsigned char cx2072x_drc_array[MAX_DRC_REGS] = { > + 0x65, 0x55, 0x3C, 0x01, 0x05, 0x39, 0x76, 0x1A, 0x00 > +}; Just use the chip defaults, this avoids any confusion or debate about the values in the kernel. > +#define get_cx2072x_priv(_codec_) \ > + ((struct cx2072x_priv *) snd_soc_codec_get_drvdata(_codec_)) There is no need to cast void pointers, this will at most hide actual errors, and there's no real need for the macro at all really. > + { 36864000, 7 },/* Don't use div 7*/ Does something enforce that? Also coding style, missing space. > +static const struct reg_default cx2072x_reg_defaults[] = { > + { 0x0414, 0x00000003 }, /*2072X_AFG_POWER_STATE */ We have defines for the register names which are helpfully commented here, why not just actually use the defines? > + if (reg == CX2072X_UM_INTERRUPT_CRTL_E) { > + /* Update the MSB byte only */ > + reg += 3; > + size = 1; > + value >>= 24; > + } Use a switch here in case you find any more magic registers. > + ret = i2c_master_send(client, buf, size + 2); > + if (ret == size + 2) { > + ret = 0; > + } else if (ret < 0) { > + dev_err(dev, > + "I2C write address failed\n"); Please print the error code, it makes life easier for people looking at logs with errors. > +static unsigned int get_div_from_mclk(unsigned int mclk) > +{ > + unsigned int div = 8; > + int i = 0; > + > + for (i = 0; i < ARRAY_SIZE(MCLK_PRE_DIV); i++) { > + if (mclk <= MCLK_PRE_DIV[i].mclk) { > + div = MCLK_PRE_DIV[i].div; > + break; > + } > + } > + return div; > +} Why is this function in the middle of all the register I/O functions? > +static int cx2072x_config_headset_det(struct cx2072x_priv *cx2072x) > +{ > + const int interrupt_gpio_pin = 1; > + > + dev_dbg(cx2072x->dev, > + "Configure interrupt pin: %d\n", interrupt_gpio_pin); > + /*No-sticky input type*/ Coding style. There's *lots* of really obvious and bad coding style problems throughout the driver, this is really not good - as well as making things harder to read poor coding style is normally a good indicator that there are other problems. > + /* support both nokia and apple headset set. Monitor time = 275 ms*/ > + regmap_write(cx2072x->regmap, CX2072X_DIGITAL_TEST15, 0x73); > + > + /* Disable TIP detection*/ > + regmap_write(cx2072x->regmap, CX2072X_ANALOG_TEST12, 0x300); > + > + /* Switch MusicD3Live pin to GPIO */ > + regmap_write(cx2072x->regmap, CX2072X_DIGITAL_TEST1, 0); These look awfully like they should be configured by the system integrator via DT. > + regmap_write(cx2072x->regmap, CX2072X_ANALOG_TEST8, > + (unsigned char)int_div & 0xffff); This cast is worrying, why is it needed? > + > + /* clock inversion */ > + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { > + case SND_SOC_DAIFMT_NB_NF: > + is_frame_inv = is_i2s ? 1 : 0; > + is_bclk_inv = is_i2s ? 1 : 0; Please don't abuse the ternery operator like this, write normal logic statements with straightforward assignments. Readers will thank you. > + regmap_write(cx2072x->regmap, CX2072X_I2SPCM_CONTROL1, reg1.ulVal); Please don't use Hungarian notation. > + /*Enables bclk and EAPD pin*/ > + if (cx2072x->rev_id == CX2072X_REV_A2) > + regmap_update_bits(cx2072x->regmap, CX2072X_DIGITAL_BIOS_TEST2, > + 0x84, 0xFF); > + else > + regmap_write(cx2072x->regmap, CX2072X_DIGITAL_BIOS_TEST2, > + regDBT2.ulVal); Again, switch statement. > +static int portg_power_ev(struct snd_soc_dapm_widget *w, > + struct snd_kcontrol *kcontrol, int event) > +{ > + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); > + > + switch (event) { > + case SND_SOC_DAPM_POST_PMU: > + cx2072x_update_dsp(codec); > + break; > + default: > + break; > + } > + return 0; > +} > +static int cx2072x_plbk_dsp_info(struct snd_kcontrol *kcontrol, Blank lines between functions. > + mutex_lock(&cx2072x->eq_coeff_lock); > + memcpy(cache, param, CX2072X_PLBK_EQ_COEF_LEN); > + cx2072x->plbk_dsp_changed = true; Shouldn't this involve a memcmp() to check if the new value is different? > +static const struct snd_kcontrol_new cx2072x_snd_controls[] = { > + > + SOC_DOUBLE_R_TLV("PortD Boost", CX2072X_PORTD_GAIN_LEFT, > + CX2072X_PORTD_GAIN_RIGHT, 0, 3, 0, boost_tlv), All volume controls should end in Volume so userspace knows how to handle them. Also please use normal kernel indentation for the continuation lines. > + SOC_DOUBLE_R("DAC1 Mute", CX2072X_DAC1_AMP_GAIN_LEFT, > + CX2072X_DAC1_AMP_GAIN_RIGHT, 7, 1, 0), All boolean controls should end in Switch so userspace knows how to handle them. > + CX2072X_PLBK_EQ_COEF("DACL EQ 0", 0, 0), > + CX2072X_PLBK_EQ_COEF("DACL EQ 1", 0, 1), > + CX2072X_PLBK_EQ_COEF("DACL EQ 2", 0, 2), > + CX2072X_PLBK_EQ_COEF("DACL EQ 3", 0, 3), > + CX2072X_PLBK_EQ_COEF("DACL EQ 4", 0, 4), > + CX2072X_PLBK_EQ_COEF("DACL EQ 5", 0, 5), > + CX2072X_PLBK_EQ_COEF("DACL EQ 6", 0, 6), > + CX2072X_PLBK_EQ_COEF("DACR EQ 0", 1, 0), > + CX2072X_PLBK_EQ_COEF("DACR EQ 1", 1, 1), > + CX2072X_PLBK_EQ_COEF("DACR EQ 2", 1, 2), > + CX2072X_PLBK_EQ_COEF("DACR EQ 3", 1, 3), > + CX2072X_PLBK_EQ_COEF("DACR EQ 4", 1, 4), > + CX2072X_PLBK_EQ_COEF("DACR EQ 5", 1, 5), > + CX2072X_PLBK_EQ_COEF("DACR EQ 6", 1, 6), This looks like it should be two binary controls, one per EQ. > +int cx2072x_hs_jack_report(struct snd_soc_codec *codec) > +{ > +} > +EXPORT_SYMBOL_GPL(cx2072x_hs_jack_report); We have a standard jack detection interface in the kernel, the driver should be using it rather than writing its own. > +static int cx2072x_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, > + unsigned int rx_mask, int slots, int slot_width) > +{ > + struct snd_soc_codec *codec = dai->codec; > + struct cx2072x_priv *cx2072x = snd_soc_codec_get_drvdata(codec); > + > + if (slots == 0) > + goto out; > + > + > + switch (rx_mask) { > + case 1 ... 0xf: > + default: > + return -EINVAL; > + } So all possible values are invalid? That doesn't seemw right... > + switch (clk_id) { > + case CX2072X_MCLK_EXTERNAL_PLL: > + if (cx2072x->mclk && clk_set_rate(cx2072x->mclk, freq)) > + return -EINVAL; Please write sensible error handling, log what went wrong if you get an error and pass back error codes you get from other APIs. This will make it a lot easier for users to figure out what's happened. > +#define CX2072X_DAPM_SUPPLY_S(wname, wsubseq, wreg, wshift, wmask, won_val, \ > + woff_val, wevent, wflags) \ > + {.id = snd_soc_dapm_supply, .name = wname, .kcontrol_news = NULL, \ > + .num_kcontrols = 0, .reg = wreg, .shift = wshift, .mask = wmask, \ > + .on_val = won_val, .off_val = woff_val, \ > + .subseq = wsubseq, .event = wevent, .event_flags = wflags} There appears to be nothing device specific in here, why is this not being added as a generic supply type? > +static void cx2072x_sw_reset(struct cx2072x_priv *cx2072x) > +{ > + > + regmap_write(cx2072x->regmap, CX2072X_AFG_FUNCTION_RESET, 0x01); Coding style, random blank line hre. > + /* reduce the jack monitor time*/ > + regmap_update_bits(cx2072x->regmap, CX2072X_DIGITAL_TEST15, > + 0x00, 0x06); Coding style, please intent contiuation lines... > + cx2072x_config_headset_det(cx2072x); > + /* configre PortC as input device */ > + regmap_update_bits(cx2072x->regmap, CX2072X_PORTC_PIN_CTRL, > + 0x20, 0x20); ...this isn't even consistent with the rest of the same function :( > + switch (level) { > + case SND_SOC_BIAS_ON: > + /* Enable Headset Mic Bias */ > + if (cx2072x->is_biason == 0) > + cx2072x->is_biason = 1; > + break; This looks worrying but since nothing else uses that driver data I'm guessing it doesn't actually do anything. > + case SND_SOC_BIAS_PREPARE: > + if (old_level == SND_SOC_BIAS_STANDBY) { > + if (cx2072x->mclk) { > + dev_dbg(cx2072x->dev, "Turn on MCLK\n"); > + ret = clk_prepare_enable(cx2072x->mclk); > + if (ret) > + return ret; > + } > + } > + break; > + case SND_SOC_BIAS_STANDBY: > + > + if (old_level == SND_SOC_BIAS_OFF) { > + if (cx2072x->mclk) { > + dev_dbg(cx2072x->dev, "Turn on MCLK\n"); > + ret = clk_prepare_enable(cx2072x->mclk); > + if (ret) > + return ret; > + } So we enable MCLK both when coming out of _OFF and when coming out of _STANDBY? Why (and note that we're missing some disables here... > + regmap_read(cx2072x->regmap, CX2072X_VENDOR_ID, &ven_id); > + regmap_read(cx2072x->regmap, CX2072X_REVISION_ID, &cx2072x->rev_id); > + dev_dbg(codec->dev, "codec version: %08x,%08x\n", > + ven_id, cx2072x->rev_id); Log this at info level. > +#ifdef CONFIG_PM > +static int cx2072x_runtime_suspend(struct device *dev) > +{ > + struct cx2072x_priv *cx2072x = dev_get_drvdata(dev); > + > + cx2072x_set_bias_level(cx2072x->codec, SND_SOC_BIAS_OFF); Let the framework take care of managing bias level for you. > +static bool cx2072x_readable_register(struct device *dev, unsigned int reg) > +{ > + switch (reg) { Why is this nowhere near the rest of the regmap code? > +static int cx2072x_i2c_probe(struct i2c_client *i2c, > + const struct i2c_device_id *id) > +{ > + int ret = -1; > + struct cx2072x_priv *cx2072x; > + > + cx2072x = (struct cx2072x_priv *)devm_kzalloc( > + &i2c->dev, sizeof(struct cx2072x_priv), GFP_KERNEL); No need to cast away from void. > + if (cx2072x == NULL) { > + dev_err(&i2c->dev, "Out of memory!\n"); kzalloc() will already be very noisy if this happens. > +static const struct i2c_device_id cx2072x_i2c_id[] = { > + { "cx20721", 0 }, > + { "cx20723", 0 }, > + { "14F10720", 0 }, > + {} > +}; > +MODULE_DEVICE_TABLE(i2c, cx2072x_i2c_id); One of those looks like an ACPI ID not an I2C ID. > + > +static const struct of_device_id cx2072x_of_match[] = { > + { .compatible = "cnxt,cx20721", }, > + { .compatible = "cnxt,cx20723", }, > + { .compatible = "cnxt,cx7601", }, > + {} Why is cx7601 not an I2C ID? > +#ifdef CONFIG_ACPI > + .acpi_match_table = ACPI_PTR(cx2072x_acpi_match), > +#endif No need for the defines here.

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