December 2016 - Alsa-devel - mailman.alsa-project.org

[alsa-devel] Error patching file pcm_native.c
by Delusion's Master 20 Nov '24

20 Nov '24

Hi, first of all I apologize in case you receive multiple copies of this message, but I forgot to specify a subject in the original mail. I have a problem compiling the latest alsa driver snapshots. Specifically, it's a problem when patching pcm_native.c: [..] copying file alsa-kernel/core/info.c patching file info.c copying file alsa-kernel/core/pcm.c patching file pcm.c Hunk #3 succeeded at 739 (offset 2 lines). Hunk #5 succeeded at 954 (offset 2 lines). Hunk #7 succeeded at 1045 (offset 2 lines). copying file alsa-kernel/core/pcm_native.c patching file pcm_native.c Hunk #4 succeeded at 1544 (offset -25 lines). Hunk #5 succeeded at 2827 (offset 12 lines). Hunk #6 succeeded at 2878 (offset 10 lines). Hunk #7 FAILED at 2906. Hunk #8 FAILED at 2922. Hunk #9 succeeded at 2915 (offset -23 lines). Hunk #10 succeeded at 3036 (offset 10 lines). Hunk #11 succeeded at 3027 (offset -23 lines). Hunk #12 succeeded at 3074 (offset 10 lines). Hunk #13 succeeded at 3098 (offset -23 lines). Hunk #14 succeeded at 3143 (offset 10 lines). Hunk #15 succeeded at 3124 (offset -23 lines). Hunk #16 succeeded at 3214 (offset 10 lines). Hunk #17 succeeded at 3208 (offset -23 lines). Hunk #18 succeeded at 3271 (offset 10 lines). Hunk #19 succeeded at 3304 (offset -23 lines). Hunk #20 succeeded at 3386 (offset 10 lines). Hunk #21 succeeded at 3411 (offset -23 lines). Hunk #22 succeeded at 3456 (offset 10 lines). Hunk #23 succeeded at 3450 (offset -23 lines). Hunk #24 succeeded at 3525 (offset 10 lines). Hunk #25 succeeded at 3644 (offset -23 lines). 2 out of 25 hunks FAILED -- saving rejects to file pcm_native.c.rej make[2]: *** [pcm_native.c] Error 1 It's some days I get this, but I waited to report this since I thought it could be a temporary problem. My OS is Fedora 11 x86_64. Previous snapshots didn't give me this problem, but I can't say which one broke the compilation, since I usually try updated snapshots only at kernel updates. I searched for this error and the only relevant report I could find is this one: http://mailman.alsa-project.org/pipermail/alsa-devel/2009-April/016420.html a report from last April. What could the problem be? Thanks _________________________________________________________________ Invite your mail contacts to join your friends list with Windows Live Spaces. It's easy! http://spaces.live.com/spacesapi.aspx?wx_action=create&wx_url=/friends.aspx…

3 10

[alsa-devel] unsupported variant of snd_hda_intel
by Alexandre 04 Jul '24

04 Jul '24

Hello, I have an Acer Aspire 4736G laptop. The soundcard that is shipped in this laptop is intel-hda based as shown (actually it's a realtek): cat /proc/asound/cards 0 [Intel ]: HDA-Intel - HDA Intel HDA Intel at 0x9b300000 irq 46 Basic sound output is correct but few feature are missing: - internal mic seems to be found but do not works. - sound output stop working when trying to send it using HDMI output - heads do not work when plugged neither when forcing pulseaudio to use it. I have an ubuntu 10.10 which is shipped with alsa 1.0.23. I have googled around and tried loading the snd-hda-intel with several parameters () as found in HD-Audio-Models.txt to no avail. cat /proc/asound/pcm 00-00: ALC888 Analog : ALC888 Analog : playback 1 : capture 1 00-01: ALC888 Digital : ALC888 Digital : playback 1 00-03: NVIDIA HDMI : NVIDIA HDMI : playback 1 Where can I begin to help implement the support for this sound card? I have very skills in developement in general but am ready to try if it is not to hard (I supose I can use previous code for similar models).. I just need a shepherd. Thanks

4 4

[alsa-devel] echo-cancellation plugin advice?
by Max Klein 27 Oct '23

27 Oct '23

> Well, asym wouldn't be the answer. Basically you'll need to open two > slave PCMs in one plugin. So, it's no simple filter-type plugin. > It's doable, but not easy as it sounds, I guess. Takashi, can you please further explain why asym is not the solution and what you see as a problem? I am also trying to figure out if it would be possible to create such a plugin for ALSA? I am still searching for some good starting points on how to write an ALSA plugin... Jean-Marc Valin (http://lists.linuxaudio.org/pipermail/linux-audio-dev/2005-June/012454.html) already released his work as part of speex but as far I know there is no plugin that has been made out of it? Thanks for any hint! -- NEU: FreePhone 3-fach-Flat mit kostenlosem Smartphone! Jetzt informieren: http://mobile.1und1.de/?ac=OM.PW.PW003K20328T7073a

3 2

[alsa-devel] ALSA 1.0.29 release
by Jaroslav Kysela 19 Feb '20

19 Feb '20

Hello all, all userspace packages (except alsa-oss) were released today. You may download them from the ALSA website http://www.alsa-project.org or directly from the FTP server ftp://ftp.alsa-project.org/pub . Full list of changes: http://www.alsa-project.org/main/index.php/Changes_v1.0.28_v1.0.29 Have fun, Jaroslav -- Jaroslav Kysela <perex(a)perex.cz> Linux Kernel Sound Maintainer ALSA Project; Red Hat, Inc.

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[alsa-devel] [PATCH 4/6] alsa-lib:pcm: fix the hw_ptr update until the boundary available.
by sutar.mounesh＠gmail.com 19 Jan '18

19 Jan '18

From: mahendran.k <mahendran.kuppusamy(a)in.bosch.com> For long time test case, the slave_hw_ptr will exceed the boundary and wraparound the slave_hw_ptr. This slave boundary wraparound will cause the rate->hw_ptr to wraparound irrespective of the rate->boundary availability and due to that the available size goes wrong. Hence, To get the correct available size, - Its necessary to increment the rate->hw_ptr upto the rate->boundary and then wraparound the rate->hw_ptr. - While handling fraction part of slave period, rounded value will be introduced by input_frames(). To eliminate rounding issue on rate->hw_ptr, subtract last rounded value from rate->hw_ptr and add new rounded value of present slave_hw_ptr fraction part to rate->hw_ptr. Signed-off-by: mahendran.k <mahendran.kuppusamy(a)in.bosch.com> Signed-off-by: Mounesh Sutar <mounesh_sutar(a)mentor.com> diff --git a/src/pcm/pcm_rate.c b/src/pcm/pcm_rate.c index 1f830dd..5bee77c 100644 --- a/src/pcm/pcm_rate.c +++ b/src/pcm/pcm_rate.c @@ -50,7 +50,7 @@ typedef struct _snd_pcm_rate snd_pcm_rate_t; struct _snd_pcm_rate { snd_pcm_generic_t gen; - snd_pcm_uframes_t appl_ptr, hw_ptr; + snd_pcm_uframes_t appl_ptr, hw_ptr, last_slave_hw_ptr; snd_pcm_uframes_t last_commit_ptr; snd_pcm_uframes_t orig_avail_min; snd_pcm_sw_params_t sw_params; @@ -563,14 +563,28 @@ static inline void snd_pcm_rate_sync_hwptr0(snd_pcm_t *pcm, snd_pcm_uframes_t sl { snd_pcm_rate_t *rate = pcm->private_data; + snd_pcm_sframes_t slave_hw_ptr_diff = slave_hw_ptr - rate->last_slave_hw_ptr; + snd_pcm_sframes_t last_slave_hw_ptr_frac; + if (pcm->stream != SND_PCM_STREAM_PLAYBACK) return; - /* FIXME: boundary overlap of slave hw_ptr isn't evaluated here! - * e.g. if slave rate is small... - */ - rate->hw_ptr = - (slave_hw_ptr / rate->gen.slave->period_size) * pcm->period_size + - rate->ops.input_frames(rate->obj, slave_hw_ptr % rate->gen.slave->period_size); + + if (slave_hw_ptr_diff < 0) + slave_hw_ptr_diff += rate->gen.slave->boundary; /* slave boundary wraparound */ + else if (slave_hw_ptr_diff == 0) + return; + last_slave_hw_ptr_frac = rate->last_slave_hw_ptr % rate->gen.slave->period_size; + /* While handling fraction part fo slave period, rounded value will be introduced by input_frames(). + * To eliminate rounding issue on rate->hw_ptr, subtract last rounded value from rate->hw_ptr and + * add new rounded value of present slave_hw_ptr fraction part to rate->hw_ptr. Hence, + * rate->hw_ptr += [ (no. of updated slave periods * pcm rate period size) - + * fractional part of last_slave_hw_ptr rounded value + + * fractional part of updated slave hw ptr's rounded value ] */ + rate->hw_ptr += ( + (((last_slave_hw_ptr_frac + slave_hw_ptr_diff) / rate->gen.slave->period_size) * pcm->period_size) - + rate->ops.input_frames(rate->obj, last_slave_hw_ptr_frac) + + rate->ops.input_frames(rate->obj, (last_slave_hw_ptr_frac + slave_hw_ptr_diff) % rate->gen.slave->period_size)); + rate->last_slave_hw_ptr = slave_hw_ptr; rate->hw_ptr %= pcm->boundary; } @@ -635,6 +649,7 @@ static int snd_pcm_rate_prepare(snd_pcm_t *pcm) return err; *pcm->hw.ptr = 0; *pcm->appl.ptr = 0; + rate->last_slave_hw_ptr = 0; err = snd_pcm_rate_init(pcm); if (err < 0) return err; @@ -650,6 +665,7 @@ static int snd_pcm_rate_reset(snd_pcm_t *pcm) return err; *pcm->hw.ptr = 0; *pcm->appl.ptr = 0; + rate->last_slave_hw_ptr = 0; err = snd_pcm_rate_init(pcm); if (err < 0) return err; -- 1.7.9.5

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[alsa-devel] [PATCH 1/1] ASoC: bcm2835-i2s: Support 384k sample rate
by Clive Messer 10 Nov '17

10 Nov '17

Add support for sample rates up to 384k to bcm2835-i2s driver, with SNDRV_PCM_RATE_CONTINUOUS and specifying 8k min and 384k max, for both playback and capture. Signed-off-by: Clive Messer <clive.messer(a)digitaldreamtime.co.uk> --- sound/soc/bcm/bcm2835-i2s.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/sound/soc/bcm/bcm2835-i2s.c b/sound/soc/bcm/bcm2835-i2s.c index 6ba2049..4a67db2 100644 --- a/sound/soc/bcm/bcm2835-i2s.c +++ b/sound/soc/bcm/bcm2835-i2s.c @@ -578,7 +578,9 @@ static struct snd_soc_dai_driver bcm2835_i2s_dai = { .playback = { .channels_min = 2, .channels_max = 2, - .rates = SNDRV_PCM_RATE_8000_192000, + .rates = SNDRV_PCM_RATE_CONTINUOUS, + .rate_min = 8000, + .rate_max = 384000, .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE @@ -586,7 +588,9 @@ static struct snd_soc_dai_driver bcm2835_i2s_dai = { .capture = { .channels_min = 2, .channels_max = 2, - .rates = SNDRV_PCM_RATE_8000_192000, + .rates = SNDRV_PCM_RATE_CONTINUOUS, + .rate_min = 8000, + .rate_max = 384000, .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE -- 2.5.5

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[alsa-devel] ASoC Sound Driver I2S over LPE, Intel Baytrail SoC. MinnowBoard Max
by Michael Pogrebinsky 02 Oct '17

02 Oct '17

Hi all, I have the MinnowBoard Max with Baytrail Atom (ValleyView) SoC. I'm attempting to write an Alsa (ASoC) driver for my sound card to work with this board. PCM should work through I2S for this sound card I have. >From my understanding Baytrail's I2S goes over LPE. I read this thread:https://www.mail-archive.com/elinux-minnowboard@lists.elinux.org/msg… So I understand that I need the 3 components for my ASoC driver. However I am having trouble at understanding how to communicate with the LPE to get the I2S working. Here is what I have done so far: I am running Ubuntu 14.04 LTS, kernel : 4.3.0-040300rc4 First of all I downloaded the firmware fw_sst_0f28.bin-48kHz_i2s_master fromhttps://kernel.googlesource.com/pub/scm/linux/kernel/git/firmware/linux… And put it /lib/firmware/intel/. Later I went to the Bios and enabled LPE in PCI mode. I do see the LPE controller now, but it shows as UNCLAIMED. Later I looked at the sound/soc/inte/baytrail/ and from my understanding in order for me to get the I2S working I need to load this module so I did modprobe snd-soc-sst-baytrail-pcm. Later I wrote a simple codec and machine driver (looking at the example of sound/soc/intel/boards/byt_max98090) however everytime I attempt to register the sound card with snd_soc_register_card, I get the following error message in dmesg : "ASoC: CPU DAI baytrail-pcm-audio not registered". >From this I deduct that although I loaded the snd-soc-sst-baytrail-pcm module, the driver has not actually been loaded. I'm clueless on how to proceed from here. I would highly appreciate your help.

3 7

[alsa-devel] [PATCH] ASoC: Intel: Atom: Remove unneeded linux/miscdevice.h include
by Corentin Labbe 19 Sep '17

19 Sep '17

No file in sound/soc/intel/ use any miscdevice. This patch remove this uncessary include. Signed-off-by: Corentin Labbe <clabbe.montjoie(a)gmail.com> --- sound/soc/intel/atom/sst/sst_acpi.c | 1 - 1 file changed, 1 deletion(-) diff --git a/sound/soc/intel/atom/sst/sst_acpi.c b/sound/soc/intel/atom/sst/sst_acpi.c index f4d92bb..a971a58 100644 --- a/sound/soc/intel/atom/sst/sst_acpi.c +++ b/sound/soc/intel/atom/sst/sst_acpi.c @@ -23,7 +23,6 @@ #include <linux/interrupt.h> #include <linux/slab.h> #include <linux/io.h> -#include <linux/miscdevice.h> #include <linux/platform_device.h> #include <linux/firmware.h> #include <linux/pm_runtime.h> -- 2.10.2

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[alsa-devel] [PATCH 0/9] AC97 device/driver model revamp
by Robert Jarzmik 19 Sep '17

19 Sep '17

It all started in the pxa device-tree submission here : https://lkml.org/lkml/2016/2/25/965 Last submission was a RFC in here: http://www.gossamer-threads.com/lists/linux/kernel/2446863 It will be maintained in : git fetch https://github.com/rjarzmik/linux.git work/ac97 The driving ideas are still the same, and I put them in [1] for memory. This is the first post RFC submission. In order to make a full demonstration of the framework, wm97xx was converted to an MFD, see [2] for the "why". As this serie is a complete wm9713 change towards the new AC97 bus, here is the patch organization : - 1/9, 2/9, 3/9 and 5/9: the new AC97 bus, for Mark and Takashi to review - 4/9: wm9713 conversion, this one has ugly #ifdefs, should be reviewed more carefully - 6/9: prerequisite for final 9/9, for Marek and Sebastian to approve => this one is independent and can flow through Sebastian's tree in this next-cycle if accepted - 7/9: prerequisite for final 9/9, for Mark/Dmitry => this one is also independent and can flow in this cycle if accepted - 8/9: prerequisite for final 9/9, for Lee to review => this one has a dependency on 2/9, so it probably can't fit in this next-cycle - 9/9: this last one depends on all the patches before, so it can't fit in this next-cycle As a sum-up, I'd like to push for review for this -next cycle at least the patches 1, 2, 3, 5, 6 and 9. Happy review. Robert Jarzmik (9): ALSA: ac97: split out the generic ac97 registers ALSA: ac97: add an ac97 bus ASoC: add new ac97 bus support ASoC: wm9713: add ac97 new bus support ASoC: pxa: switch to new ac97 bus support power_supply: wm97xx_battery: use power_supply_get_drvdata Input: wm97xx: split out touchscreen registering mfd: wm97xx-core: core support for wm97xx Codec Input: wm97xx: add new AC97 bus support drivers/input/touchscreen/Kconfig | 2 +- drivers/input/touchscreen/wm97xx-core.c | 247 +++++++++++----- drivers/mfd/Kconfig | 14 + drivers/mfd/Makefile | 1 + drivers/mfd/wm97xx-core.c | 282 ++++++++++++++++++ drivers/power/supply/wm97xx_battery.c | 25 +- include/linux/mfd/wm97xx.h | 31 ++ include/sound/ac97/codec.h | 115 +++++++ include/sound/ac97/compat.h | 21 ++ include/sound/ac97/controller.h | 85 ++++++ include/sound/ac97/regs.h | 262 ++++++++++++++++ include/sound/ac97_codec.h | 239 +-------------- include/sound/pxa2xx-lib.h | 15 +- sound/Kconfig | 2 + sound/Makefile | 1 + sound/ac97/Kconfig | 19 ++ sound/ac97/Makefile | 8 + sound/ac97/ac97_core.h | 10 + sound/ac97/bus.c | 510 ++++++++++++++++++++++++++++++++ sound/ac97/codec.c | 15 + sound/ac97/snd_ac97_compat.c | 105 +++++++ sound/arm/Kconfig | 1 - sound/arm/pxa2xx-ac97-lib.c | 39 ++- sound/soc/Kconfig | 4 + sound/soc/codecs/Kconfig | 3 +- sound/soc/codecs/wm9713.c | 37 ++- sound/soc/pxa/Kconfig | 5 +- sound/soc/pxa/pxa2xx-ac97.c | 22 +- 28 files changed, 1738 insertions(+), 382 deletions(-) create mode 100644 drivers/mfd/wm97xx-core.c create mode 100644 include/linux/mfd/wm97xx.h create mode 100644 include/sound/ac97/codec.h create mode 100644 include/sound/ac97/compat.h create mode 100644 include/sound/ac97/controller.h create mode 100644 include/sound/ac97/regs.h create mode 100644 sound/ac97/Kconfig create mode 100644 sound/ac97/Makefile create mode 100644 sound/ac97/ac97_core.h create mode 100644 sound/ac97/bus.c create mode 100644 sound/ac97/codec.c create mode 100644 sound/ac97/snd_ac97_compat.c -- 2.1.4 [1] RFC PATCH reminder: Amongst the driving ideas behind this RFC : - use device/driver model for AC'97 device/driver binding is based on vendor_id{1,2} - use auto-probe of the AC'97 bus to enumerate codecs and create devices - be compatible with previous platform_data model for codecs => this enables a smooth transition, where a codec (here wm9713) can be used either through platform_device or automatic discovery - struct snd_ac97 is not used This structure is really heavy, and doesn't represent an AC97 device, but rather an AC'97 codec internals IIUC. I think it's right place would be in include/sound/ac97/codec.h. This is also a problem for regmap adherence, hence the include/sound/ac97/compat.h. - a new AC'97 bus Kconfig is created This was done for a smooth transition ... let's see if it's a good idea. - split the AC'97 into : - the codec - the digital controller - the bus Amongst the things that are not all touched yet : - ac97_codec.c The generic AC'97 codec in sound/pci/ac97/ac97_codec.c has really a lot features, which are not at all PCI related. They could be transfered to sound/ac97, without the pci specific field. => this deserves a deep ahead thinking, which I'll do if the current approach is accepted by the communauty. The most important patch is 2/7 "ALSA: ac97: add an ac97 bus". This is the main evaluation point for the serie, the others are here so that I can test it all. Well, this is a long term effort, which might need a complete rewrite according to the comments it'll get. Let's expose it for comments and see how I can progress with it. [2] As a corollary, wm97xx is changed into a MFD device, which at least spawns: - the touchscreen device - the ac97 codec - the problem to solve was stated in http://www.gossamer-threads.com/lists/linux/kernel/2510113#2510113

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[alsa-devel] [RFC PATCH 0/7] AC97 device/driver model revamp
by Robert Jarzmik 04 Sep '17

04 Sep '17

It all started in the pxa device-tree submission here : https://lkml.org/lkml/2016/2/25/965 It will be maintained in : git fetch https://github.com/rjarzmik/linux.git work/ac97 And now it transformed into this RFC, which would bring a ground for AC'97 devices closer to the linux device/driver model. This is just an RFC to see if we understand each other Mark. Amongst the driving ideas behind this RFC : - use device/driver model for AC'97 device/driver binding is based on vendor_id{1,2} - use auto-probe of the AC'97 bus to enumerate codecs and create devices - be compatible with previous platform_data model for codecs => this enables a smooth transition, where a codec (here wm9713) can be used either through platform_device or automatic discovery - struct snd_ac97 is not used This structure is really heavy, and doesn't represent an AC97 device, but rather an AC'97 codec internals IIUC. I think it's right place would be in include/sound/ac97/codec.h. This is also a problem for regmap adherence, hence the include/sound/ac97/compat.h. - a new AC'97 bus Kconfig is created This was done for a smooth transition ... let's see if it's a good idea. - split the AC'97 into : - the codec - the digital controller - the bus Amongst the things that are not all touched yet : - ac97_codec.c The generic AC'97 codec in sound/pci/ac97/ac97_codec.c has really a lot features, which are not at all PCI related. They could be transfered to sound/ac97, without the pci specific field. => this deserves a deep ahead thinking, which I'll do if the current approach is accepted by the communauty. The most important patch is 2/7 "ALSA: ac97: add an ac97 bus". This is the main evaluation point for the serie, the others are here so that I can test it all. Well, this is a long term effort, which might need a complete rewrite according to the comments it'll get. Let's expose it for comments and see how I can progress with it. Cheers. -- Robert Robert Jarzmik (7): ALSA: ac97: split out the generic ac97 registers ALSA: ac97: add an ac97 bus ASoC: wm9713: add ac97 new bus support ASoC: pxa: switch to new ac97 bus support ARM: pxa: mioa701 remove wm9713 from platform devices ASoC: mioa701_wm9713: convert to new ac97 bus ASoC: add new ac97 bus support arch/arm/mach-pxa/mioa701.c | 1 - include/sound/ac97/codec.h | 98 ++++++++++++ include/sound/ac97/compat.h | 21 +++ include/sound/ac97/controller.h | 39 +++++ include/sound/ac97/regs.h | 262 +++++++++++++++++++++++++++++++ include/sound/ac97_codec.h | 239 +---------------------------- include/sound/pxa2xx-lib.h | 14 +- sound/Kconfig | 7 + sound/Makefile | 1 + sound/ac97/Kconfig | 9 ++ sound/ac97/Makefile | 5 + sound/ac97/ac97_core.h | 10 ++ sound/ac97/bus.c | 330 ++++++++++++++++++++++++++++++++++++++++ sound/ac97/codec.c | 15 ++ sound/ac97/snd_ac97_compat.c | 104 +++++++++++++ sound/arm/Kconfig | 1 - sound/arm/pxa2xx-ac97-lib.c | 31 ++-- sound/soc/Kconfig | 4 + sound/soc/codecs/wm9713.c | 62 +++++++- sound/soc/pxa/Kconfig | 4 +- sound/soc/pxa/mioa701_wm9713.c | 4 +- sound/soc/pxa/pxa2xx-ac97.c | 12 +- 22 files changed, 1000 insertions(+), 273 deletions(-) create mode 100644 include/sound/ac97/codec.h create mode 100644 include/sound/ac97/compat.h create mode 100644 include/sound/ac97/controller.h create mode 100644 include/sound/ac97/regs.h create mode 100644 sound/ac97/Kconfig create mode 100644 sound/ac97/Makefile create mode 100644 sound/ac97/ac97_core.h create mode 100644 sound/ac97/bus.c create mode 100644 sound/ac97/codec.c create mode 100644 sound/ac97/snd_ac97_compat.c -- 2.1.4

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Re: [alsa-devel] Dell USB audio driver workaround
by Takashi Iwai 21 Jun '17

21 Jun '17

On Wed, 06 Apr 2016 08:29:12 +0200, Kailang wrote: > > Hi Takashi, > > Dell had USB dock. > Maybe firmware issue, the master volume always keep at 0x57. > Attach patch will fix it to keep at Max volume. > > Could you help us to update it? Well, I don't get how this patch works.. > diff --git a/sound/usb/mixer.c b/sound/usb/mixer.c > index 4f85757..84d9a4e 100644 > --- a/sound/usb/mixer.c > +++ b/sound/usb/mixer.c > @@ -846,6 +846,12 @@ static void volume_control_quirks(struct usb_mixer_elem_info *cval, > { > struct snd_usb_audio *chip = cval->head.mixer->chip; > switch (chip->usb_id) { > + case USB_ID(0x0bda, 0x4014): /* Dell workaround */ > + if (strstr(kctl->id.name, "Playback Volume") != NULL) { > + cval->min = 0x0000; > + cval->max = 0x0000; > + } > + break; So, this means that this value has to be fixed to 0? If yes, can't we simply remove this volume instead? thanks, Takashi

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[alsa-devel] [PATCH 0/7] of_graph: prepare for ALSA graph support
by Kuninori Morimoto 17 May '17

17 May '17

Hi Rob, Mark Cc Guennadi, Laurent Now OF graph is mainly used by V4L2 SoC, and ALSA SoC is using different style for SoC <-> Codec binding. But, for example, HDMI case, V4L2 <-> ALSA need to collaborate, and then ALSA SoC needs to adjust to OF graph. OTOH, V4L2's "OF graph" position is same as ALSA SoC "sound card" position. And ALSA SoC side want to keep existing supported feature on new OF graph style. I'm posting this on ALSA SoC ML now. Now, current of_graph is indicating port/endpoint, but there is no way to understand that it is for video port ? or sound port ? or other device port ? For example, HDMI has video port, and sound port. Because of this reason, ALSA SoC side can't handle OF graph correctly. Thus, this patch-set tries to add new "type" on OF graph. And this patch-set includes small feature which are useful for ALSA SoC side OF graph support. Kuninori Morimoto (7): Documentation: of: add type property of_graph: add of_graph_get_remote_endpoint() of_graph: add of_graph_port/endpoint_type_is() of_graph: add of_graph_get_endpoint_count() of_graph: add of_graph_get_port_parent() of_graph: add of_graph_get_top_port() of_graph: add for_each_of_port() / for_each_of_endpoint_in_port() Documentation/devicetree/bindings/graph.txt | 26 ++++ drivers/of/base.c | 196 ++++++++++++++++++++++++++-- include/linux/of_graph.h | 67 ++++++++++ 3 files changed, 279 insertions(+), 10 deletions(-) -- 1.9.1

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[alsa-devel] [PATCH v2 1/2] ASoC: wm8960: Let wm8960 codec driver manage its own MCLK
by Zidan Wang 04 Apr '17

04 Apr '17

From: Zidan Wang <b50113(a)freescale.com> When we want to use wm8960 codec, we should enable its MCLK in machine driver. It's reasonable for wm8960 codec driver to manage its own MCLK. When current bias_level is SND_SOC_BIAS_ON, it is preparing for a transition away from ON. In this case, disable the codec mclk. When current bias_level is not SND_SOC_BIAS_ON, it preparing for a transition to ON. In this case, enable the codec mclk. Signed-off-by: Zidan Wang <b50113(a)freescale.com> --- sound/soc/codecs/wm8960.c | 51 ++++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 48 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/wm8960.c b/sound/soc/codecs/wm8960.c index 75cd7de..fd25973 100644 --- a/sound/soc/codecs/wm8960.c +++ b/sound/soc/codecs/wm8960.c @@ -15,6 +15,7 @@ #include <linux/init.h> #include <linux/delay.h> #include <linux/pm.h> +#include <linux/clk.h> #include <linux/i2c.h> #include <linux/slab.h> #include <sound/core.h> @@ -117,6 +118,7 @@ static bool wm8960_volatile(struct device *dev, unsigned int reg) } struct wm8960_priv { + struct clk *mclk; struct regmap *regmap; int (*set_bias_level)(struct snd_soc_codec *, enum snd_soc_bias_level level); @@ -618,14 +620,38 @@ static int wm8960_set_bias_level_out3(struct snd_soc_codec *codec, enum snd_soc_bias_level level) { struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec); + int ret; switch (level) { case SND_SOC_BIAS_ON: break; case SND_SOC_BIAS_PREPARE: - /* Set VMID to 2x50k */ - snd_soc_update_bits(codec, WM8960_POWER1, 0x180, 0x80); + switch (codec->dapm.bias_level) { + case SND_SOC_BIAS_STANDBY: + if (!IS_ERR(wm8960->mclk)) { + ret = clk_prepare_enable(wm8960->mclk); + if (ret) { + dev_err(codec->dev, + "Failed to enable MCLK: %d\n", + ret); + return ret; + } + } + + /* Set VMID to 2x50k */ + snd_soc_update_bits(codec, WM8960_POWER1, 0x180, 0x80); + break; + + case SND_SOC_BIAS_ON: + if (!IS_ERR(wm8960->mclk)) + clk_disable_unprepare(wm8960->mclk); + break; + + default: + break; + } + break; case SND_SOC_BIAS_STANDBY: @@ -674,7 +700,7 @@ static int wm8960_set_bias_level_capless(struct snd_soc_codec *codec, enum snd_soc_bias_level level) { struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec); - int reg; + int reg, ret; switch (level) { case SND_SOC_BIAS_ON: @@ -715,9 +741,22 @@ static int wm8960_set_bias_level_capless(struct snd_soc_codec *codec, WM8960_VREF, WM8960_VREF); msleep(100); + + if (!IS_ERR(wm8960->mclk)) { + ret = clk_prepare_enable(wm8960->mclk); + if (ret) { + dev_err(codec->dev, + "Failed to enable MCLK: %d\n", + ret); + return ret; + } + } break; case SND_SOC_BIAS_ON: + if (!IS_ERR(wm8960->mclk)) + clk_disable_unprepare(wm8960->mclk); + /* Enable anti-pop mode */ snd_soc_update_bits(codec, WM8960_APOP1, WM8960_POBCTRL | WM8960_SOFT_ST | @@ -1002,6 +1041,12 @@ static int wm8960_i2c_probe(struct i2c_client *i2c, if (wm8960 == NULL) return -ENOMEM; + wm8960->mclk = devm_clk_get(&i2c->dev, "mclk"); + if (IS_ERR(wm8960->mclk)) { + if (PTR_ERR(wm8960->mclk) == -EPROBE_DEFER) + return -EPROBE_DEFER; + } + wm8960->regmap = devm_regmap_init_i2c(i2c, &wm8960_regmap); if (IS_ERR(wm8960->regmap)) return PTR_ERR(wm8960->regmap); -- 1.9.1

5 10

[alsa-devel] [PATCH 0/3] clkdev: add devm_get_clk_from_child()
by Kuninori Morimoto 30 Mar '17

30 Mar '17

Hi Stephen This is v5 of "clkdev: add devm_of_clk_get()", but new series. I hope my understanding was correct with your idea. Kuninori Morimoto (3): 1) clkdev: add devm_get_clk_from_child() 2) ASoC: simple-card: use devm_get_clk_from_child() 3) ASoC: simple-card-utils: enable clocks/clock-names/clock-ranges .../devicetree/bindings/sound/simple-card.txt | 32 +++++++++++++++ drivers/clk/clk-devres.c | 21 ++++++++++ include/linux/clk.h | 29 ++++++++++++-- include/sound/simple_card_utils.h | 11 +++--- sound/soc/generic/simple-card-utils.c | 45 ++++++++++++++++++++-- sound/soc/generic/simple-card.c | 4 +- sound/soc/generic/simple-scu-card.c | 4 +- 7 files changed, 129 insertions(+), 17 deletions(-) -- 1.9.1

4 20

[alsa-devel] [PATCH] alsa-lib: Add htimestamp operation in plugin file
by sutar.mounesh＠gmail.com 27 Feb '17

27 Feb '17

From: Andreas Pape <apape(a)de.adit-jv.com> PCM operation htimestamp is not implemented in plugin file. Calling snd_pcm_htimestamp() on a plugin file crashes. This scenario is considered now. Signed-off-by: Andreas Pape <apape(a)de.adit-jv.com> Signed-off-by: Joshua Frkuska <joshua_frkuska(a)mentor.com> --- --- a/src/pcm/pcm_file.c 2013-07-08 14:31:36.000000000 +0200 +++ b/src/pcm/pcm_file.c 2015-05-04 16:26:10.413615403 +0200 @@ -698,6 +698,7 @@ .readi = snd_pcm_file_readi, .readn = snd_pcm_file_readn, .avail_update = snd_pcm_generic_avail_update, + .htimestamp = snd_pcm_generic_htimestamp, .mmap_commit = snd_pcm_file_mmap_commit, .poll_descriptors_count = snd_pcm_generic_poll_descriptors_count, .poll_descriptors = snd_pcm_generic_poll_descriptors,

4 8

[alsa-devel] [PATCH] pcm_rate: Do not discard slave reported delay in status result.
by Alan Young 21 Feb '17

21 Feb '17

Similar to recent dshare patch.

3 31

[alsa-devel] [RFC 00/16] ASoC: hdac_hdmi: Add Support to Enable MST Audio
by jeeja.kp＠intel.com 08 Feb '17

08 Feb '17

From: Jeeja KP <jeeja.kp(a)intel.com> Display port 1.2 introduces new capability Multi-stream transport (MST) which will allow multiple stream to route to single display port where multiple monitors are connected. Multiple monitors will be connected by a MST Hub or a monitor capable of daisy-chaining. With MST support, a pin can support multiple ports and on each port a monitor can be connected. This patch series enables DP MST Audio by extending the current design from pin to port. 1. With MST, Pin mux for CVT selection will be used to select CVT for Pin-port instead of Pin. So create the pin muxes accordingly. 2. Pin is marked as MST capable when connect event reports pipe as valid. if pipe is -1, then pin is not MST capable and default to port 0. if pipe is valid, then pin is MST capable and port = pipe. 3. For MST capable pin, select the device entry before configuring the pin widget verbs controlling the sink device operations. 4. Add support to handle multiple Port mapped to same converter by enabling all the ports and configuring the port when stream is prepared. 5. i915 acomp APIs are now used to read the ELD info and support is extended for MST port as well Notes: 1. When Mutiple ports are mapped to same PCM, currenlty stream constrains will applied based on first port mapped. Jeeja KP (15): ASoC: hdac_hdmi: Begin to add support for DP Multi-stream Audio ASoC: Intel: Skylake: Add route change to rt286 machine ASoC: Intel: Skylake: Add route change to nau88l25_max98357a machine ASoC: Intel: Skylake: Add route change to nau88l25_ssm4567 machine ASoC: Intel: Skylake: Add route change to rt298 machine ASoC: Intel: Skylake: Add route change to da7219_max98357a machine ASoC: hdac_hdmi: Add support to handle MST capable pin ASoC: hdac_hdmi: Add MST verb support ASoc: hdac_hdmi: Configure pin verbs for MST ASoC: hdac_hdmi: Add support to handle Multiple Port to same PCM ASoC: Intel: Skylake: To support MST, add HDMI routes rt286 machine ASoC: Intel: Skylake: To support MST, add HDMI routes nau_max machine ASoC: Intel: Skylake: To support MST, add HDMI routes nau_ssm machine ASoC: Intel: Skylake: To support MST, add HDMI routes rt298 machine ASoC: Intel: Skylake: To support MST, add HDMI routes da7219_max machine Sandeep Tayal (1): ASoC: hdac_hdmi: use audio component framework to read ELD sound/soc/codecs/hdac_hdmi.c | 919 ++++++++++++++---------- sound/soc/intel/boards/bxt_da7219_max98357a.c | 10 +- sound/soc/intel/boards/bxt_rt298.c | 11 +- sound/soc/intel/boards/skl_nau88l25_max98357a.c | 12 +- sound/soc/intel/boards/skl_nau88l25_ssm4567.c | 13 +- sound/soc/intel/boards/skl_rt286.c | 10 +- 6 files changed, 597 insertions(+), 378 deletions(-) -- 2.5.0

2 22

[alsa-devel] [PATCH] ASoC: rt5670: add HS ground control
by Bard Liao 01 Feb '17

01 Feb '17

Some project use external circuit to prevent the headset ground noise. It will need to use GPIO to control it. Dell Wyse 3040 is the only project that has the external circuit so far and it uses GPIO2 for that. This patch provide the support fot it. Signed-off-by: Bard Liao <bardliao(a)realtek.com> --- include/sound/rt5670.h | 7 +++++ sound/soc/codecs/rt5670.c | 74 ++++++++++++++++++++++++++++++++++++++++++++++- 2 files changed, 80 insertions(+), 1 deletion(-) diff --git a/include/sound/rt5670.h b/include/sound/rt5670.h index b7d6051..0b445b0 100644 --- a/include/sound/rt5670.h +++ b/include/sound/rt5670.h @@ -11,12 +11,19 @@ #ifndef __LINUX_SND_RT5670_H #define __LINUX_SND_RT5670_H +enum rt5670_gpios { + RT5670_GPIO_NONE = 0, + RT5670_GPIO2, +}; + + struct rt5670_platform_data { int jd_mode; bool in2_diff; bool dev_gpio; bool dmic_en; + enum rt5670_gpios hs_ground_control_gpio; unsigned int dmic1_data_pin; /* 0 = GPIO6; 1 = IN2P; 3 = GPIO7*/ unsigned int dmic2_data_pin; diff --git a/sound/soc/codecs/rt5670.c b/sound/soc/codecs/rt5670.c index 97bafac..1d94cec 100644 --- a/sound/soc/codecs/rt5670.c +++ b/sound/soc/codecs/rt5670.c @@ -420,13 +420,15 @@ static int rt5670_headset_detect(struct snd_soc_codec *codec, int jack_insert) struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); if (jack_insert) { + if (rt5670->pdata.hs_ground_control_gpio) + snd_soc_dapm_force_enable_pin(dapm, "HS GND Control"); + snd_soc_dapm_force_enable_pin(dapm, "Mic Det Power"); snd_soc_dapm_sync(dapm); snd_soc_update_bits(codec, RT5670_GEN_CTRL3, 0x4, 0x0); snd_soc_update_bits(codec, RT5670_CJ_CTRL2, RT5670_CBJ_DET_MODE | RT5670_CBJ_MN_JD, RT5670_CBJ_MN_JD); - snd_soc_write(codec, RT5670_GPIO_CTRL2, 0x0004); snd_soc_update_bits(codec, RT5670_GPIO_CTRL1, RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_IRQ); snd_soc_update_bits(codec, RT5670_CJ_CTRL1, @@ -450,6 +452,10 @@ static int rt5670_headset_detect(struct snd_soc_codec *codec, int jack_insert) snd_soc_dapm_disable_pin(dapm, "Mic Det Power"); snd_soc_dapm_sync(dapm); } + if (rt5670->pdata.hs_ground_control_gpio) { + snd_soc_dapm_disable_pin(dapm, "HS GND Control"); + snd_soc_dapm_sync(dapm); + } } else { snd_soc_update_bits(codec, RT5670_INT_IRQ_ST, 0x8, 0x0); snd_soc_update_bits(codec, RT5670_GEN_CTRL3, 0x4, 0x4); @@ -1542,6 +1548,29 @@ static int rt5670_bst2_event(struct snd_soc_dapm_widget *w, return 0; } +static int rt5670_hs_ground_control_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + snd_soc_update_bits(codec, RT5670_GPIO_CTRL2, + RT5670_GP2_OUT_MASK, RT5670_GP2_OUT_HI); + break; + + case SND_SOC_DAPM_POST_PMD: + snd_soc_update_bits(codec, RT5670_GPIO_CTRL2, + RT5670_GP2_OUT_MASK, RT5670_GP2_OUT_LO); + break; + + default: + return 0; + } + + return 0; +} + static const struct snd_soc_dapm_widget rt5670_dapm_widgets[] = { SND_SOC_DAPM_SUPPLY("PLL1", RT5670_PWR_ANLG2, RT5670_PWR_PLL_BIT, 0, NULL, 0), @@ -1917,6 +1946,12 @@ static int rt5670_bst2_event(struct snd_soc_dapm_widget *w, SND_SOC_DAPM_OUTPUT("SPORN"), }; +static const struct snd_soc_dapm_widget hs_gnd_cnotrol_widgets[] = { + SND_SOC_DAPM_SUPPLY("HS GND Control", SND_SOC_NOPM, 0, 0, + rt5670_hs_ground_control_event, + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), +}; + static const struct snd_soc_dapm_route rt5670_dapm_routes[] = { { "ADC Stereo1 Filter", NULL, "ADC STO1 ASRC", is_using_asrc }, { "ADC Stereo2 Filter", NULL, "ADC STO2 ASRC", is_using_asrc }, @@ -2314,6 +2349,11 @@ static int rt5670_bst2_event(struct snd_soc_dapm_widget *w, { "SPORN", NULL, "SPO Amp" }, }; +static const struct snd_soc_dapm_route hs_gnd_cnotrol_routes[] = { + { "BST1", NULL, "HS GND Control" }, + { "HP Amp", NULL, "HS GND Control" }, +}; + static int rt5670_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) { @@ -2679,6 +2719,13 @@ static int rt5670_probe(struct snd_soc_codec *codec) "The driver is for RT5670 RT5671 or RT5672 only\n"); return -ENODEV; } + if (rt5670->pdata.hs_ground_control_gpio) { + snd_soc_dapm_new_controls(dapm, hs_gnd_cnotrol_widgets, + ARRAY_SIZE(hs_gnd_cnotrol_widgets)); + snd_soc_dapm_add_routes(dapm, hs_gnd_cnotrol_routes, + ARRAY_SIZE(hs_gnd_cnotrol_routes)); + } + rt5670->codec = codec; return 0; @@ -2827,6 +2874,10 @@ static int rt5670_resume(struct snd_soc_codec *codec) DMI_MATCH(DMI_BOARD_NAME, "Braswell CRB"), }, }, + {} +}; + +static const struct dmi_system_id dmi_platform_dell_wyse[] = { { .ident = "Dell Wyse 3040", .matches = { @@ -2861,6 +2912,12 @@ static int rt5670_i2c_probe(struct i2c_client *i2c, rt5670->pdata.dmic1_data_pin = RT5670_DMIC_DATA_IN2P; rt5670->pdata.dev_gpio = true; rt5670->pdata.jd_mode = 1; + rt5670->pdata.hs_ground_control_gpio = RT5670_GPIO_NONE; + } else if (dmi_check_system(dmi_platform_dell_wyse)) { + rt5670->pdata.dmic_en = false; + rt5670->pdata.dev_gpio = true; + rt5670->pdata.jd_mode = 1; + rt5670->pdata.hs_ground_control_gpio = RT5670_GPIO2; } rt5670->regmap = devm_regmap_init_i2c(i2c, &rt5670_regmap); @@ -2886,6 +2943,21 @@ static int rt5670_i2c_probe(struct i2c_client *i2c, regmap_write(rt5670->regmap, RT5670_RESET, 0); + switch (rt5670->pdata.hs_ground_control_gpio) { + case RT5670_GPIO_NONE: + break; + case RT5670_GPIO2: + regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2, + RT5670_GP2_PF_MASK | RT5670_GP2_OUT_MASK, + RT5670_GP2_PF_OUT | RT5670_GP2_OUT_LO); + break; + default: + rt5670->pdata.hs_ground_control_gpio = + RT5670_GPIO_NONE; + dev_warn(&i2c->dev, "Only Support GPIO2 currently\n"); + break; + } + regmap_read(rt5670->regmap, RT5670_VENDOR_ID, &val); if (val >= 4) regmap_write(rt5670->regmap, RT5670_GPIO_CTRL3, 0x0980); -- 1.8.1.1.439.g50a6b54

3 7

[alsa-devel] [PATCH 1/2] ASoC: Revert "Drop SND_DMAENGINE_PCM_FLAG_CUSTOM_CHANNEL_NAME flag"
by Sylwester Nawrocki 24 Jan '17

24 Jan '17

This reverts commit c6644119a3f80ea644bde10009d5e1013b5aff29 and restores the ability to specify DMA channel names per DAI dma_data. Unfortunately the functionality removed in the patch being reverted cannot be entirely replaced by DMA channel names specified in struct snd_dmaengine_pcm_config as that doesn't cover devices with more than 2 DMA channels. Signed-off-by: Sylwester Nawrocki <s.nawrocki(a)samsung.com> --- include/sound/dmaengine_pcm.h | 6 ++++++ sound/soc/soc-generic-dmaengine-pcm.c | 12 +++++++++++- 2 files changed, 17 insertions(+), 1 deletion(-) diff --git a/include/sound/dmaengine_pcm.h b/include/sound/dmaengine_pcm.h index 1c8f9e1..67be244 100644 --- a/include/sound/dmaengine_pcm.h +++ b/include/sound/dmaengine_pcm.h @@ -71,6 +71,7 @@ struct dma_chan *snd_dmaengine_pcm_request_channel(dma_filter_fn filter_fn, * @slave_id: Slave requester id for the DMA channel. * @filter_data: Custom DMA channel filter data, this will usually be used when * requesting the DMA channel. + * @chan_name: Custom channel name to use when requesting DMA channel. * @fifo_size: FIFO size of the DAI controller in bytes * @flags: PCM_DAI flags, only SND_DMAENGINE_PCM_DAI_FLAG_PACK for now */ @@ -80,6 +81,7 @@ struct snd_dmaengine_dai_dma_data { u32 maxburst; unsigned int slave_id; void *filter_data; + const char *chan_name; unsigned int fifo_size; unsigned int flags; }; @@ -105,6 +107,10 @@ void snd_dmaengine_pcm_set_config_from_dai_data( * playback. */ #define SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX BIT(3) +/* + * The PCM streams have custom channel names specified. + */ +#define SND_DMAENGINE_PCM_FLAG_CUSTOM_CHANNEL_NAME BIT(4) /** * struct snd_dmaengine_pcm_config - Configuration data for dmaengine based PCM diff --git a/sound/soc/soc-generic-dmaengine-pcm.c b/sound/soc/soc-generic-dmaengine-pcm.c index 17eb149..d537864 100644 --- a/sound/soc/soc-generic-dmaengine-pcm.c +++ b/sound/soc/soc-generic-dmaengine-pcm.c @@ -263,6 +263,7 @@ static int dmaengine_pcm_new(struct snd_soc_pcm_runtime *rtd) struct dmaengine_pcm *pcm = soc_platform_to_pcm(rtd->platform); const struct snd_dmaengine_pcm_config *config = pcm->config; struct device *dev = rtd->platform->dev; + struct snd_dmaengine_dai_dma_data *dma_data; struct snd_pcm_substream *substream; size_t prealloc_buffer_size; size_t max_buffer_size; @@ -282,6 +283,13 @@ static int dmaengine_pcm_new(struct snd_soc_pcm_runtime *rtd) if (!substream) continue; + dma_data = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream); + + if (!pcm->chan[i] && + (pcm->flags & SND_DMAENGINE_PCM_FLAG_CUSTOM_CHANNEL_NAME)) + pcm->chan[i] = dma_request_slave_channel(dev, + dma_data->chan_name); + if (!pcm->chan[i] && (pcm->flags & SND_DMAENGINE_PCM_FLAG_COMPAT)) { pcm->chan[i] = dmaengine_pcm_compat_request_channel(rtd, substream); @@ -350,7 +358,9 @@ static int dmaengine_pcm_request_chan_of(struct dmaengine_pcm *pcm, const char *name; struct dma_chan *chan; - if ((pcm->flags & SND_DMAENGINE_PCM_FLAG_NO_DT) || !dev->of_node) + if ((pcm->flags & (SND_DMAENGINE_PCM_FLAG_NO_DT | + SND_DMAENGINE_PCM_FLAG_CUSTOM_CHANNEL_NAME)) || + !dev->of_node) return 0; if (config && config->dma_dev) { -- 1.9.1

2 2

[alsa-devel] [PATCH v2] ASoC: mxs-saif: add mclk enable/disable ops
by Mans Rullgard 23 Jan '17

23 Jan '17

This makes normal clk_enable/disable() calls on mxs_saif_mclk work as expected, i.e. actually turn the mclk output on or (when safe) off. The existing mxs_saif_get/put_mclk() functions are rewritten to use common clk operations on mxs_saif_mclk rather than accessing registers directly. With these changes mxs-saif can be used together with the simple-card driver. Signed-off-by: Mans Rullgard <mans(a)mansr.com> --- v2: add #include <linux/clk-provider.h> needed by some configs --- sound/soc/mxs/mxs-saif.c | 144 +++++++++++++++++++++++++++++++---------------- sound/soc/mxs/mxs-saif.h | 3 + 2 files changed, 99 insertions(+), 48 deletions(-) diff --git a/sound/soc/mxs/mxs-saif.c b/sound/soc/mxs/mxs-saif.c index a002ab892772..7c620399f96b 100644 --- a/sound/soc/mxs/mxs-saif.c +++ b/sound/soc/mxs/mxs-saif.c @@ -204,27 +204,15 @@ static int mxs_saif_set_clk(struct mxs_saif *saif, */ int mxs_saif_put_mclk(unsigned int saif_id) { - struct mxs_saif *saif = mxs_saif[saif_id]; - u32 stat; + struct clk *clk; - if (!saif) - return -EINVAL; + clk = clk_get(NULL, "mxs_saif_mclk"); + if (IS_ERR(clk)) + return PTR_ERR(clk); - stat = __raw_readl(saif->base + SAIF_STAT); - if (stat & BM_SAIF_STAT_BUSY) { - dev_err(saif->dev, "error: busy\n"); - return -EBUSY; - } + clk_disable_unprepare(clk); + clk_put(clk); - clk_disable_unprepare(saif->clk); - - /* disable MCLK output */ - __raw_writel(BM_SAIF_CTRL_CLKGATE, - saif->base + SAIF_CTRL + MXS_SET_ADDR); - __raw_writel(BM_SAIF_CTRL_RUN, - saif->base + SAIF_CTRL + MXS_CLR_ADDR); - - saif->mclk_in_use = 0; return 0; } EXPORT_SYMBOL_GPL(mxs_saif_put_mclk); @@ -239,47 +227,33 @@ int mxs_saif_get_mclk(unsigned int saif_id, unsigned int mclk, unsigned int rate) { struct mxs_saif *saif = mxs_saif[saif_id]; - u32 stat; int ret; struct mxs_saif *master_saif; + struct clk *clk; if (!saif) return -EINVAL; - /* Clear Reset */ - __raw_writel(BM_SAIF_CTRL_SFTRST, - saif->base + SAIF_CTRL + MXS_CLR_ADDR); - - /* FIXME: need clear clk gate for register r/w */ - __raw_writel(BM_SAIF_CTRL_CLKGATE, - saif->base + SAIF_CTRL + MXS_CLR_ADDR); - master_saif = mxs_saif_get_master(saif); if (saif != master_saif) { dev_err(saif->dev, "can not get mclk from a non-master saif\n"); return -EINVAL; } - stat = __raw_readl(saif->base + SAIF_STAT); - if (stat & BM_SAIF_STAT_BUSY) { - dev_err(saif->dev, "error: busy\n"); - return -EBUSY; - } + clk = clk_get(NULL, "mxs_saif_mclk"); + if (IS_ERR(clk)) + return PTR_ERR(clk); + + ret = clk_prepare_enable(clk); + if (ret) + goto out; - saif->mclk_in_use = 1; ret = mxs_saif_set_clk(saif, mclk, rate); - if (ret) - return ret; - ret = clk_prepare_enable(saif->clk); - if (ret) - return ret; +out: + clk_put(clk); - /* enable MCLK output */ - __raw_writel(BM_SAIF_CTRL_RUN, - saif->base + SAIF_CTRL + MXS_SET_ADDR); - - return 0; + return ret; } EXPORT_SYMBOL_GPL(mxs_saif_get_mclk); @@ -687,18 +661,92 @@ static irqreturn_t mxs_saif_irq(int irq, void *dev_id) return IRQ_HANDLED; } +#define to_mxs_saif(c) container_of(c, struct mxs_saif, div_clk.hw) + +static int mxs_saif_mclk_enable(struct clk_hw *hw) +{ + struct mxs_saif *saif = to_mxs_saif(hw); + + /* Clear Reset */ + __raw_writel(BM_SAIF_CTRL_SFTRST, + saif->base + SAIF_CTRL + MXS_CLR_ADDR); + + /* Clear clk gate */ + __raw_writel(BM_SAIF_CTRL_CLKGATE, + saif->base + SAIF_CTRL + MXS_CLR_ADDR); + + /* enable MCLK output */ + __raw_writel(BM_SAIF_CTRL_RUN, + saif->base + SAIF_CTRL + MXS_SET_ADDR); + + saif->mclk_in_use = 1; + + return 0; +} + +static void mxs_saif_mclk_disable(struct clk_hw *hw) +{ + struct mxs_saif *saif = to_mxs_saif(hw); + + if (!saif->ongoing) + __raw_writel(BM_SAIF_CTRL_RUN, + saif->base + SAIF_CTRL + MXS_CLR_ADDR); + + saif->mclk_in_use = 0; +} + +static unsigned long mxs_saif_mclk_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + return clk_divider_ops.recalc_rate(hw, parent_rate); +} + +static long mxs_saif_mclk_round_rate(struct clk_hw *hw, unsigned long rate, + unsigned long *parent_rate) +{ + return clk_divider_ops.round_rate(hw, rate, parent_rate); +} + +static int mxs_saif_mclk_set_rate(struct clk_hw *hw, unsigned long rate, + unsigned long parent_rate) +{ + return clk_divider_ops.set_rate(hw, rate, parent_rate); +} + +static const struct clk_ops mxs_saif_mclk_ops = { + .enable = mxs_saif_mclk_enable, + .disable = mxs_saif_mclk_disable, + .recalc_rate = mxs_saif_mclk_recalc_rate, + .round_rate = mxs_saif_mclk_round_rate, + .set_rate = mxs_saif_mclk_set_rate, +}; + static int mxs_saif_mclk_init(struct platform_device *pdev) { struct mxs_saif *saif = platform_get_drvdata(pdev); struct device_node *np = pdev->dev.of_node; + struct clk_init_data init; + struct clk_divider *div; struct clk *clk; + const char *parent_name; int ret; - clk = clk_register_divider(&pdev->dev, "mxs_saif_mclk", - __clk_get_name(saif->clk), 0, - saif->base + SAIF_CTRL, - BP_SAIF_CTRL_BITCLK_MULT_RATE, 3, - 0, NULL); + parent_name = __clk_get_name(saif->clk); + + init.name = "mxs_saif_mclk"; + init.ops = &mxs_saif_mclk_ops; + init.flags = CLK_GET_RATE_NOCACHE | CLK_IS_BASIC; + init.parent_names = &parent_name; + init.num_parents = 1; + + div = &saif->div_clk; + div->reg = saif->base + SAIF_CTRL; + div->shift = BP_SAIF_CTRL_BITCLK_MULT_RATE; + div->width = 3; + div->flags = CLK_DIVIDER_POWER_OF_TWO; + div->hw.init = &init; + + clk = clk_register(&pdev->dev, &div->hw); if (IS_ERR(clk)) { ret = PTR_ERR(clk); if (ret == -EEXIST) diff --git a/sound/soc/mxs/mxs-saif.h b/sound/soc/mxs/mxs-saif.h index 9a4c0b291b9e..e1bb5cb00ec0 100644 --- a/sound/soc/mxs/mxs-saif.h +++ b/sound/soc/mxs/mxs-saif.h @@ -108,6 +108,7 @@ #define MXS_SAIF_MCLK 0 +#include <linux/clk-provider.h> #include "mxs-pcm.h" struct mxs_saif { @@ -128,6 +129,8 @@ struct mxs_saif { MXS_SAIF_STATE_STOPPED, MXS_SAIF_STATE_RUNNING, } state; + + struct clk_divider div_clk; }; extern int mxs_saif_put_mclk(unsigned int saif_id); -- 2.11.0

3 2

[alsa-devel] [PATCH v3 1/2] ASoC: cs35l35: Add support for Cirrus CS35L35 Amplifier
by Li Xu 23 Jan '17

23 Jan '17

Add driver support for Cirrus Logic CS35L35 boosted speaker amplifier Signed-off-by: Li Xu <li.xu(a)cirrus.com> --- include/sound/cs35l35.h | 104 ++++ sound/soc/codecs/Kconfig | 5 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/cs35l35.c | 1359 ++++++++++++++++++++++++++++++++++++++++++++ sound/soc/codecs/cs35l35.h | 285 ++++++++++ 5 files changed, 1755 insertions(+) create mode 100644 include/sound/cs35l35.h create mode 100644 sound/soc/codecs/cs35l35.c create mode 100644 sound/soc/codecs/cs35l35.h diff --git a/include/sound/cs35l35.h b/include/sound/cs35l35.h new file mode 100644 index 0000000..005a813 --- /dev/null +++ b/include/sound/cs35l35.h @@ -0,0 +1,104 @@ +/* + * linux/sound/cs35l35.h -- Platform data for CS35l35 + * + * Copyright (c) 2016 Cirrus Logic Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __CS35L35_H +#define __CS35L35_H + +struct classh_cfg { + /* + * Class H Algorithm Control Variables + * You can either have it done + * automatically or you can adjust + * these variables for tuning + * + * if you do not enable the internal algorithm + * you will get a set of mixer controls for + * Class H tuning + * + * Section 4.3 of the datasheet + */ + /* Internal ClassH Algorithm */ + bool classh_bst_override; + bool classh_algo_enable; + int classh_bst_max_limit; + int classh_mem_depth; + int classh_release_rate; + int classh_headroom; + int classh_wk_fet_disable; + int classh_wk_fet_delay; + int classh_wk_fet_thld; + int classh_vpch_auto; + int classh_vpch_rate; + int classh_vpch_man; +}; + +struct monitor_cfg { + /* + * Signal Monitor Data + * highly configurable signal monitoring + * data positioning and different types of + * monitoring data. + * + * Section 4.8.2 - 4.8.4 of the datasheet + */ + bool is_present; + bool imon_specs; + bool vmon_specs; + bool vpmon_specs; + bool vbstmon_specs; + bool vpbrstat_specs; + bool zerofill_specs; + u8 imon_dpth; + u8 imon_loc; + u8 imon_frm; + u8 vmon_dpth; + u8 vmon_loc; + u8 vmon_frm; + u8 vpmon_dpth; + u8 vpmon_loc; + u8 vpmon_frm; + u8 vbstmon_dpth; + u8 vbstmon_loc; + u8 vbstmon_frm; + u8 vpbrstat_dpth; + u8 vpbrstat_loc; + u8 vpbrstat_frm; + u8 zerofill_dpth; + u8 zerofill_loc; + u8 zerofill_frm; +}; + +struct cs35l35_platform_data { + + /* Stereo (2 Device) */ + bool stereo; + /* serial port drive strength */ + int sp_drv_str; + /* Boost Power Down with FET */ + bool bst_pdn_fet_on; + /* Boost Voltage : used if ClassH Algo Enabled */ + int bst_vctl; + /* Boost Converter Peak Current CTRL */ + int bst_ipk; + /* Amp Gain Zero Cross */ + bool gain_zc; + /* Audio Input Location */ + int aud_channel; + /* Advisory Input Location */ + int adv_channel; + /* Shared Boost for stereo */ + bool shared_bst; + /* ClassH Algorithm */ + struct classh_cfg classh_algo; + /* Monitor Config */ + struct monitor_cfg mon_cfg; +}; + +#endif /* __CS35L35_H */ diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index 9e1718a..3fd0a08 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -49,6 +49,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_CS35L32 if I2C select SND_SOC_CS35L33 if I2C select SND_SOC_CS35L34 if I2C + select SND_SOC_CS35L35 if I2C select SND_SOC_CS42L42 if I2C select SND_SOC_CS42L51_I2C if I2C select SND_SOC_CS42L52 if I2C && INPUT @@ -407,6 +408,10 @@ config SND_SOC_CS35L34 tristate "Cirrus Logic CS35L34 CODEC" depends on I2C +config SND_SOC_CS35L35 + tristate "Cirrus Logic CS35L35 CODEC" + depends on I2C + config SND_SOC_CS42L42 tristate "Cirrus Logic CS42L42 CODEC" depends on I2C diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index 7e1dad7..a5622f6 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -39,6 +39,7 @@ snd-soc-cq93vc-objs := cq93vc.o snd-soc-cs35l32-objs := cs35l32.o snd-soc-cs35l33-objs := cs35l33.o snd-soc-cs35l34-objs := cs35l34.o +snd-soc-cs35l35-objs := cs35l35.o snd-soc-cs42l42-objs := cs42l42.o snd-soc-cs42l51-objs := cs42l51.o snd-soc-cs42l51-i2c-objs := cs42l51-i2c.o @@ -268,6 +269,7 @@ obj-$(CONFIG_SND_SOC_CQ0093VC) += snd-soc-cq93vc.o obj-$(CONFIG_SND_SOC_CS35L32) += snd-soc-cs35l32.o obj-$(CONFIG_SND_SOC_CS35L33) += snd-soc-cs35l33.o obj-$(CONFIG_SND_SOC_CS35L34) += snd-soc-cs35l34.o +obj-$(CONFIG_SND_SOC_CS35L35) += snd-soc-cs35l35.o obj-$(CONFIG_SND_SOC_CS42L42) += snd-soc-cs42l42.o obj-$(CONFIG_SND_SOC_CS42L51) += snd-soc-cs42l51.o obj-$(CONFIG_SND_SOC_CS42L51_I2C) += snd-soc-cs42l51-i2c.o diff --git a/sound/soc/codecs/cs35l35.c b/sound/soc/codecs/cs35l35.c new file mode 100644 index 0000000..dca4920 --- /dev/null +++ b/sound/soc/codecs/cs35l35.c @@ -0,0 +1,1359 @@ +/* + * cs35l35.c -- CS35L35 ALSA SoC audio driver + * + * Copyright 2016 Cirrus Logic, Inc. + * + * Author: Brian Austin <brian.austin(a)cirrus.com> + * Li Xu <li.xu(a)cirrus.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include <linux/module.h> +#include <linux/moduleparam.h> +#include <linux/version.h> +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/delay.h> +#include <linux/i2c.h> +#include <linux/slab.h> +#include <linux/workqueue.h> +#include <linux/platform_device.h> +#include <linux/regulator/consumer.h> +#include <linux/gpio/consumer.h> +#include <linux/of_device.h> +#include <linux/of_gpio.h> +#include <linux/regmap.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/soc.h> +#include <sound/soc-dapm.h> +#include <linux/gpio.h> +#include <sound/initval.h> +#include <sound/tlv.h> +#include <sound/cs35l35.h> +#include <linux/of_irq.h> +#include <linux/completion.h> + +#include "cs35l35.h" + +static const struct reg_default cs35l35_reg[] = { + {CS35L35_PWRCTL1, 0x01}, + {CS35L35_PWRCTL2, 0x11}, + {CS35L35_PWRCTL3, 0x00}, + {CS35L35_CLK_CTL1, 0x04}, + {CS35L35_CLK_CTL2, 0x10}, + {CS35L35_CLK_CTL3, 0xCF}, + {CS35L35_SP_FMT_CTL1, 0x20}, + {CS35L35_SP_FMT_CTL2, 0x00}, + {CS35L35_SP_FMT_CTL3, 0x02}, + {CS35L35_MAG_COMP_CTL, 0x00}, + {CS35L35_AMP_INP_DRV_CTL, 0x01}, + {CS35L35_AMP_DIG_VOL_CTL, 0x12}, + {CS35L35_AMP_DIG_VOL, 0x00}, + {CS35L35_ADV_DIG_VOL, 0x00}, + {CS35L35_PROTECT_CTL, 0x06}, + {CS35L35_AMP_GAIN_AUD_CTL, 0x13}, + {CS35L35_AMP_GAIN_PDM_CTL, 0x00}, + {CS35L35_AMP_GAIN_ADV_CTL, 0x00}, + {CS35L35_GPI_CTL, 0x00}, + {CS35L35_BST_CVTR_V_CTL, 0x00}, + {CS35L35_BST_PEAK_I, 0x07}, + {CS35L35_BST_RAMP_CTL, 0x85}, + {CS35L35_BST_CONV_COEF_1, 0x20}, + {CS35L35_BST_CONV_COEF_2, 0x20}, + {CS35L35_BST_CONV_SLOPE_COMP, 0x47}, + {CS35L35_BST_CONV_SW_FREQ, 0x04}, + {CS35L35_CLASS_H_CTL, 0x0B}, + {CS35L35_CLASS_H_HEADRM_CTL, 0x0B}, + {CS35L35_CLASS_H_RELEASE_RATE, 0x08}, + {CS35L35_CLASS_H_FET_DRIVE_CTL, 0x41}, + {CS35L35_CLASS_H_VP_CTL, 0xC5}, + {CS35L35_VPBR_CTL, 0x0A}, + {CS35L35_VPBR_VOL_CTL, 0x09}, + {CS35L35_VPBR_TIMING_CTL, 0x6A}, + {CS35L35_VPBR_MODE_VOL_CTL, 0x00}, + {CS35L35_SPKR_MON_CTL, 0xC0}, + {CS35L35_IMON_SCALE_CTL, 0x30}, + {CS35L35_AUDIN_RXLOC_CTL, 0x00}, + {CS35L35_ADVIN_RXLOC_CTL, 0x80}, + {CS35L35_VMON_TXLOC_CTL, 0x00}, + {CS35L35_IMON_TXLOC_CTL, 0x80}, + {CS35L35_VPMON_TXLOC_CTL, 0x04}, + {CS35L35_VBSTMON_TXLOC_CTL, 0x84}, + {CS35L35_VPBR_STATUS_TXLOC_CTL, 0x04}, + {CS35L35_ZERO_FILL_LOC_CTL, 0x00}, + {CS35L35_AUDIN_DEPTH_CTL, 0x0F}, + {CS35L35_SPKMON_DEPTH_CTL, 0x0F}, + {CS35L35_SUPMON_DEPTH_CTL, 0x0F}, + {CS35L35_ZEROFILL_DEPTH_CTL, 0x00}, + {CS35L35_MULT_DEV_SYNCH1, 0x02}, + {CS35L35_MULT_DEV_SYNCH2, 0x80}, + {CS35L35_PROT_RELEASE_CTL, 0x00}, + {CS35L35_DIAG_MODE_REG_LOCK, 0x00}, + {CS35L35_DIAG_MODE_CTL_1, 0x40}, + {CS35L35_DIAG_MODE_CTL_2, 0x00}, + {CS35L35_INT_MASK_1, 0xFF}, + {CS35L35_INT_MASK_2, 0xFF}, + {CS35L35_INT_MASK_3, 0xFF}, + {CS35L35_INT_MASK_4, 0xFF}, + +}; + +static bool cs35l35_volatile_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case CS35L35_INT_STATUS_1: + case CS35L35_INT_STATUS_2: + case CS35L35_INT_STATUS_3: + case CS35L35_INT_STATUS_4: + case CS35L35_PLL_STATUS: + case CS35L35_OTP_TRIM_STATUS: + return true; + default: + return false; + } +} + +static bool cs35l35_readable_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case CS35L35_DEVID_AB ... CS35L35_PWRCTL3: + case CS35L35_CLK_CTL1 ... CS35L35_SP_FMT_CTL3: + case CS35L35_MAG_COMP_CTL ... CS35L35_AMP_GAIN_AUD_CTL: + case CS35L35_AMP_GAIN_PDM_CTL ... CS35L35_BST_PEAK_I: + case CS35L35_BST_RAMP_CTL ... CS35L35_BST_CONV_SW_FREQ: + case CS35L35_CLASS_H_CTL ... CS35L35_CLASS_H_VP_CTL: + case CS35L35_CLASS_H_STATUS: + case CS35L35_VPBR_CTL ... CS35L35_VPBR_MODE_VOL_CTL: + case CS35L35_VPBR_ATTEN_STATUS: + case CS35L35_SPKR_MON_CTL: + case CS35L35_IMON_SCALE_CTL ... CS35L35_ZEROFILL_DEPTH_CTL: + case CS35L35_MULT_DEV_SYNCH1 ... CS35L35_PROT_RELEASE_CTL: + case CS35L35_DIAG_MODE_REG_LOCK ... CS35L35_DIAG_MODE_CTL_2: + case CS35L35_INT_MASK_1 ... CS35L35_PLL_STATUS: + case CS35L35_OTP_TRIM_STATUS: + return true; + default: + return false; + } +} + +static bool cs35l35_precious_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case CS35L35_INT_STATUS_1: + case CS35L35_INT_STATUS_2: + case CS35L35_INT_STATUS_3: + case CS35L35_INT_STATUS_4: + case CS35L35_PLL_STATUS: + case CS35L35_OTP_TRIM_STATUS: + return true; + default: + return false; + } +} + +static int cs35l35_sdin_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); + struct cs35l35_private *cs35l35 = snd_soc_codec_get_drvdata(codec); + int ret = 0; + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + regmap_update_bits(cs35l35->regmap, CS35L35_CLK_CTL1, + CS35L35_MCLK_DIS_MASK, 0 << CS35L35_MCLK_DIS_SHIFT); + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL1, + CS35L35_DISCHG_FILT_MASK, 0 << CS35L35_DISCHG_FILT_SHIFT); + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL1, + CS35L35_PDN_ALL_MASK, 0); + break; + case SND_SOC_DAPM_POST_PMD: + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL1, + CS35L35_PDN_ALL_MASK, 1); + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL1, + CS35L35_DISCHG_FILT_MASK, 1 << CS35L35_DISCHG_FILT_SHIFT); + + ret = wait_for_completion_timeout(&cs35l35->pdn_done, + msecs_to_jiffies(100)); + if (ret == 0) { + dev_err(codec->dev, "TIMEOUT PDN_DONE did not complete in 100ms\n"); + ret = -ETIMEDOUT; + } + + regmap_update_bits(cs35l35->regmap, CS35L35_CLK_CTL1, + CS35L35_MCLK_DIS_MASK, 1 << CS35L35_MCLK_DIS_SHIFT); + break; + default: + dev_err(codec->dev, "Invalid event = 0x%x\n", event); + ret = -EINVAL; + } + return ret; +} + +static int cs35l35_main_amp_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); + struct cs35l35_private *cs35l35 = snd_soc_codec_get_drvdata(codec); + unsigned int reg[4]; + int i; + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + if (cs35l35->pdata.bst_pdn_fet_on) + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL2, + CS35L35_PDN_BST_MASK, 0 << CS35L35_PDN_BST_FETON_SHIFT); + else + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL2, + CS35L35_PDN_BST_MASK, 0 << CS35L35_PDN_BST_FETOFF_SHIFT); + regmap_update_bits(cs35l35->regmap, CS35L35_PROTECT_CTL, + CS35L35_AMP_MUTE_MASK, 0 << CS35L35_AMP_MUTE_SHIFT); + break; + case SND_SOC_DAPM_POST_PMU: + usleep_range(5000, 5100); + /* If PDM mode we must use VP + * for Voltage control + */ + if (cs35l35->pdm_mode) + regmap_update_bits(cs35l35->regmap, + CS35L35_BST_CVTR_V_CTL, CS35L35_BST_CTL_MASK, + 0 << CS35L35_BST_CTL_SHIFT); + for (i = 0; i < 2; i++) + regmap_bulk_read(cs35l35->regmap, CS35L35_INT_STATUS_1, + &reg, ARRAY_SIZE(reg)); + break; + case SND_SOC_DAPM_PRE_PMD: + regmap_update_bits(cs35l35->regmap, CS35L35_PROTECT_CTL, + CS35L35_AMP_MUTE_MASK, 1 << CS35L35_AMP_MUTE_SHIFT); + if (cs35l35->pdata.bst_pdn_fet_on) + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL2, + CS35L35_PDN_BST_MASK, 1 << CS35L35_PDN_BST_FETON_SHIFT); + else + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL2, + CS35L35_PDN_BST_MASK, 1 << CS35L35_PDN_BST_FETOFF_SHIFT); + break; + case SND_SOC_DAPM_POST_PMD: + usleep_range(5000, 5100); + /* If PDM mode we should switch back to pdata value + * for Voltage control when we go down + */ + if (cs35l35->pdm_mode) + regmap_update_bits(cs35l35->regmap, + CS35L35_BST_CVTR_V_CTL, CS35L35_BST_CTL_MASK, + cs35l35->pdata.bst_vctl << CS35L35_BST_CTL_SHIFT); + + break; + default: + dev_err(codec->dev, "Invalid event = 0x%x\n", event); + } + return 0; +} + +static DECLARE_TLV_DB_SCALE(amp_gain_tlv, 0, 1, 1); +static DECLARE_TLV_DB_SCALE(dig_vol_tlv, -10200, 50, 0); + +static const struct snd_kcontrol_new cs35l35_aud_controls[] = { + SOC_SINGLE_SX_TLV("Digital Audio Volume", CS35L35_AMP_DIG_VOL, + 0, 0x34, 0xE4, dig_vol_tlv), + SOC_SINGLE_TLV("AMP Audio Gain", CS35L35_AMP_GAIN_AUD_CTL, 0, 19, 0, + amp_gain_tlv), + SOC_SINGLE_TLV("AMP PDM Gain", CS35L35_AMP_GAIN_PDM_CTL, 0, 19, 0, + amp_gain_tlv), +}; + +static const struct snd_kcontrol_new cs35l35_adv_controls[] = { + SOC_SINGLE_SX_TLV("Digital Advisory Volume", CS35L35_ADV_DIG_VOL, + 0, 0x34, 0xE4, dig_vol_tlv), + SOC_SINGLE_TLV("AMP Advisory Gain", CS35L35_AMP_GAIN_ADV_CTL, 0, 19, 0, + amp_gain_tlv), +}; + +static const struct snd_soc_dapm_widget cs35l35_dapm_widgets[] = { + SND_SOC_DAPM_AIF_IN_E("SDIN", NULL, 0, CS35L35_PWRCTL3, 1, 1, + cs35l35_sdin_event, SND_SOC_DAPM_PRE_PMU | + SND_SOC_DAPM_POST_PMD), + SND_SOC_DAPM_AIF_OUT("SDOUT", NULL, 0, CS35L35_PWRCTL3, 2, 1), + + SND_SOC_DAPM_OUTPUT("SPK"), + + SND_SOC_DAPM_INPUT("VP"), + SND_SOC_DAPM_INPUT("VBST"), + SND_SOC_DAPM_INPUT("ISENSE"), + SND_SOC_DAPM_INPUT("VSENSE"), + + SND_SOC_DAPM_ADC("VMON ADC", NULL, CS35L35_PWRCTL2, 7, 1), + SND_SOC_DAPM_ADC("IMON ADC", NULL, CS35L35_PWRCTL2, 6, 1), + SND_SOC_DAPM_ADC("VPMON ADC", NULL, CS35L35_PWRCTL3, 3, 1), + SND_SOC_DAPM_ADC("VBSTMON ADC", NULL, CS35L35_PWRCTL3, 4, 1), + SND_SOC_DAPM_ADC("CLASS H", NULL, CS35L35_PWRCTL2, 5, 1), + + SND_SOC_DAPM_OUT_DRV_E("Main AMP", CS35L35_PWRCTL2, 0, 1, NULL, 0, + cs35l35_main_amp_event, SND_SOC_DAPM_PRE_PMU | + SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU | + SND_SOC_DAPM_PRE_PMD), +}; + +static const struct snd_soc_dapm_route cs35l35_audio_map[] = { + {"VPMON ADC", NULL, "VP"}, + {"VBSTMON ADC", NULL, "VBST"}, + {"IMON ADC", NULL, "ISENSE"}, + {"VMON ADC", NULL, "VSENSE"}, + {"SDOUT", NULL, "IMON ADC"}, + {"SDOUT", NULL, "VMON ADC"}, + {"SDOUT", NULL, "VBSTMON ADC"}, + {"SDOUT", NULL, "VPMON ADC"}, + {"AMP Capture", NULL, "SDOUT"}, + + {"SDIN", NULL, "AMP Playback"}, + {"CLASS H", NULL, "SDIN"}, + {"Main AMP", NULL, "CLASS H"}, + {"SPK", NULL, "Main AMP"}, +}; + +static int cs35l35_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) +{ + struct snd_soc_codec *codec = codec_dai->codec; + struct cs35l35_private *cs35l35 = snd_soc_codec_get_drvdata(codec); + + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBM_CFM: + regmap_update_bits(cs35l35->regmap, CS35L35_CLK_CTL1, + CS35L35_MS_MASK, 1 << CS35L35_MS_SHIFT); + cs35l35->slave_mode = false; + break; + case SND_SOC_DAIFMT_CBS_CFS: + regmap_update_bits(cs35l35->regmap, CS35L35_CLK_CTL1, + CS35L35_MS_MASK, 0 << CS35L35_MS_SHIFT); + cs35l35->slave_mode = true; + break; + default: + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + cs35l35->i2s_mode = true; + cs35l35->pdm_mode = false; + break; + case SND_SOC_DAIFMT_PDM: + cs35l35->pdm_mode = true; + cs35l35->i2s_mode = false; + break; + default: + return -EINVAL; + } + + return 0; +} + +struct cs35l35_sysclk_config { + int sysclk; + int srate; + u8 clk_cfg; +}; + +static struct cs35l35_sysclk_config cs35l35_clk_ctl[] = { + + /* SYSCLK, Sample Rate, Serial Port Cfg */ + {5644800, 44100, 0x00}, + {5644800, 88200, 0x40}, + {6144000, 48000, 0x10}, + {6144000, 96000, 0x50}, + {11289600, 44100, 0x01}, + {11289600, 88200, 0x41}, + {11289600, 176400, 0x81}, + {12000000, 44100, 0x03}, + {12000000, 48000, 0x13}, + {12000000, 88200, 0x43}, + {12000000, 96000, 0x53}, + {12000000, 176400, 0x83}, + {12000000, 192000, 0x93}, + {12288000, 48000, 0x11}, + {12288000, 96000, 0x51}, + {12288000, 192000, 0x91}, + {13000000, 44100, 0x07}, + {13000000, 48000, 0x17}, + {13000000, 88200, 0x47}, + {13000000, 96000, 0x57}, + {13000000, 176400, 0x87}, + {13000000, 192000, 0x97}, + {22579200, 44100, 0x02}, + {22579200, 88200, 0x42}, + {22579200, 176400, 0x82}, + {24000000, 44100, 0x0B}, + {24000000, 48000, 0x1B}, + {24000000, 88200, 0x4B}, + {24000000, 96000, 0x5B}, + {24000000, 176400, 0x8B}, + {24000000, 192000, 0x9B}, + {24576000, 48000, 0x12}, + {24576000, 96000, 0x52}, + {24576000, 192000, 0x92}, + {26000000, 44100, 0x0F}, + {26000000, 48000, 0x1F}, + {26000000, 88200, 0x4F}, + {26000000, 96000, 0x5F}, + {26000000, 176400, 0x8F}, + {26000000, 192000, 0x9F}, +}; + +static int cs35l35_get_clk_config(int sysclk, int srate) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(cs35l35_clk_ctl); i++) { + if (cs35l35_clk_ctl[i].sysclk == sysclk && + cs35l35_clk_ctl[i].srate == srate) + return cs35l35_clk_ctl[i].clk_cfg; + } + return -EINVAL; +} + +static int cs35l35_pcm_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct snd_soc_codec *codec = dai->codec; + struct cs35l35_private *cs35l35 = snd_soc_codec_get_drvdata(codec); + struct classh_cfg *classh = &cs35l35->pdata.classh_algo; + int srate = params_rate(params); + int ret = 0; + u8 sp_sclks; + int audin_format; + int errata_chk; + + int clk_ctl = cs35l35_get_clk_config(cs35l35->sysclk, srate); + + if (clk_ctl < 0) { + dev_err(codec->dev, "Invalid CLK:Rate %d:%d\n", + cs35l35->sysclk, srate); + return -EINVAL; + } + + ret = regmap_update_bits(cs35l35->regmap, CS35L35_CLK_CTL2, + CS35L35_CLK_CTL2_MASK, clk_ctl); + if (ret != 0) { + dev_err(codec->dev, "Failed to set port config %d\n", ret); + return ret; + } + + /* Rev A0 Errata + * + * When configured for the weak-drive detection path (CH_WKFET_DIS = 0) + * the Class H algorithm does not enable weak-drive operation for + * nonzero values of CH_WKFET_DELAY if SP_RATE = 01 or 10 + * + */ + errata_chk = clk_ctl & CS35L35_SP_RATE_MASK; + + if (classh->classh_wk_fet_disable == 0x00 && + (errata_chk == 0x01 || errata_chk == 0x03)) { + ret = regmap_update_bits(cs35l35->regmap, + CS35L35_CLASS_H_FET_DRIVE_CTL, CS35L35_CH_WKFET_DEL_MASK, + 0 << CS35L35_CH_WKFET_DEL_SHIFT); + if (ret != 0) { + dev_err(codec->dev, "Failed to set fet config %d\n", + ret); + return ret; + } + } + +/* + * You can pull more Monitor data from the SDOUT pin than going to SDIN + * Just make sure your SCLK is fast enough to fill the frame + */ + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + switch (params_width(params)) { + case 8: + audin_format = CS35L35_SDIN_DEPTH_8; + break; + case 16: + audin_format = CS35L35_SDIN_DEPTH_16; + break; + case 24: + audin_format = CS35L35_SDIN_DEPTH_24; + break; + default: + dev_err(codec->dev, "Unsupported Width %d\n", + params_width(params)); + } + regmap_update_bits(cs35l35->regmap, + CS35L35_AUDIN_DEPTH_CTL, CS35L35_AUDIN_DEPTH_MASK, + audin_format << CS35L35_AUDIN_DEPTH_SHIFT); + if (cs35l35->pdata.stereo) { + regmap_update_bits(cs35l35->regmap, + CS35L35_AUDIN_DEPTH_CTL, CS35L35_ADVIN_DEPTH_MASK, + audin_format << CS35L35_ADVIN_DEPTH_SHIFT); + } + } +/* We have to take the SCLK to derive num sclks + * to configure the CLOCK_CTL3 register correctly + */ + if ((cs35l35->sclk / srate) % 4) { + dev_err(codec->dev, "Unsupported sclk/fs ratio %d:%d\n", + cs35l35->sclk, srate); + return -EINVAL; + } + sp_sclks = ((cs35l35->sclk / srate) / 4) - 1; + + if (cs35l35->i2s_mode) { + /* Only certain ratios are supported in I2S Slave Mode */ + if (cs35l35->slave_mode) { + switch (sp_sclks) { + case CS35L35_SP_SCLKS_32FS: + case CS35L35_SP_SCLKS_48FS: + case CS35L35_SP_SCLKS_64FS: + break; + default: + dev_err(codec->dev, "ratio not supported\n"); + return -EINVAL; + }; + } else { + /* Only certain ratios supported in I2S MASTER Mode */ + switch (sp_sclks) { + case CS35L35_SP_SCLKS_32FS: + case CS35L35_SP_SCLKS_64FS: + break; + default: + dev_err(codec->dev, "ratio not supported\n"); + return -EINVAL; + }; + } + ret = regmap_update_bits(cs35l35->regmap, + CS35L35_CLK_CTL3, CS35L35_SP_SCLKS_MASK, + sp_sclks << CS35L35_SP_SCLKS_SHIFT); + if (ret != 0) { + dev_err(codec->dev, "Failed to set fsclk %d\n", ret); + return ret; + } + } + if (cs35l35->pdm_mode) { + regmap_update_bits(cs35l35->regmap, CS35L35_AMP_INP_DRV_CTL, + CS35L35_PDM_MODE_MASK, 1 << CS35L35_PDM_MODE_SHIFT); + } else { + regmap_update_bits(cs35l35->regmap, CS35L35_AMP_INP_DRV_CTL, + CS35L35_PDM_MODE_MASK, 0 << CS35L35_PDM_MODE_SHIFT); + } + return ret; +} + +static const unsigned int cs35l35_src_rates[] = { + 44100, 48000, 88200, 96000, 176400, 192000 +}; + +static const struct snd_pcm_hw_constraint_list cs35l35_constraints = { + .count = ARRAY_SIZE(cs35l35_src_rates), + .list = cs35l35_src_rates, +}; + +static int cs35l35_pcm_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + snd_pcm_hw_constraint_list(substream->runtime, 0, + SNDRV_PCM_HW_PARAM_RATE, &cs35l35_constraints); + return 0; +} + +static const unsigned int cs35l35_pdm_rates[] = { + 44100, 48000, 88200, 96000 +}; + +static const struct snd_pcm_hw_constraint_list cs35l35_pdm_constraints = { + .count = ARRAY_SIZE(cs35l35_pdm_rates), + .list = cs35l35_pdm_rates, +}; + +static int cs35l35_pdm_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + snd_pcm_hw_constraint_list(substream->runtime, 0, + SNDRV_PCM_HW_PARAM_RATE, + &cs35l35_pdm_constraints); + return 0; +} + +static int cs35l35_dai_set_sysclk(struct snd_soc_dai *dai, + int clk_id, unsigned int freq, int dir) +{ + struct snd_soc_codec *codec = dai->codec; + struct cs35l35_private *cs35l35 = snd_soc_codec_get_drvdata(codec); + + /* Need the SCLK Frequency */ + cs35l35->sclk = freq; + + return 0; +} + +static const struct snd_soc_dai_ops cs35l35_ops = { + .startup = cs35l35_pcm_startup, + .set_fmt = cs35l35_set_dai_fmt, + .hw_params = cs35l35_pcm_hw_params, + .set_sysclk = cs35l35_dai_set_sysclk, +}; + +static const struct snd_soc_dai_ops cs35l35_pdm_ops = { + .startup = cs35l35_pdm_startup, + .set_fmt = cs35l35_set_dai_fmt, + .hw_params = cs35l35_pcm_hw_params, + .set_sysclk = cs35l35_dai_set_sysclk, +}; + +static struct snd_soc_dai_driver cs35l35_dai[] = { + { + .name = "cs35l35-pcm", + .id = 0, + .playback = { + .stream_name = "AMP Playback", + .channels_min = 1, + .channels_max = 8, + .rates = SNDRV_PCM_RATE_KNOT, + .formats = CS35L35_FORMATS, + }, + .capture = { + .stream_name = "AMP Capture", + .channels_min = 1, + .channels_max = 8, + .rates = SNDRV_PCM_RATE_KNOT, + .formats = CS35L35_FORMATS, + }, + .ops = &cs35l35_ops, + .symmetric_rates = 1, + }, + { + .name = "cs35l35-pdm", + .id = 1, + .playback = { + .stream_name = "PDM Playback", + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_KNOT, + .formats = CS35L35_FORMATS, + }, + .ops = &cs35l35_pdm_ops, + }, +}; + +static int cs35l35_codec_set_sysclk(struct snd_soc_codec *codec, + int clk_id, int source, unsigned int freq, + int dir) +{ + struct cs35l35_private *cs35l35 = snd_soc_codec_get_drvdata(codec); + int clksrc; + int ret = 0; + + switch (clk_id) { + case 0: + clksrc = CS35L35_CLK_SOURCE_MCLK; + break; + case 1: + clksrc = CS35L35_CLK_SOURCE_SCLK; + break; + case 2: + clksrc = CS35L35_CLK_SOURCE_PDM; + break; + default: + dev_err(codec->dev, "Invalid CLK Source\n"); + return -EINVAL; + }; + + switch (freq) { + case 5644800: + case 6144000: + case 11289600: + case 12000000: + case 12288000: + case 13000000: + case 22579200: + case 24000000: + case 24576000: + case 26000000: + cs35l35->sysclk = freq; + break; + default: + dev_err(codec->dev, "Invalid CLK Frequency\n"); + return -EINVAL; + } + + ret = regmap_update_bits(cs35l35->regmap, CS35L35_CLK_CTL1, + CS35L35_CLK_SOURCE_MASK, clksrc << CS35L35_CLK_SOURCE_SHIFT); + if (ret != 0) { + dev_err(codec->dev, "Failed to set sysclk %d\n", ret); + return ret; + } + + return ret; +} + +static int cs35l35_codec_probe(struct snd_soc_codec *codec) +{ + struct cs35l35_private *cs35l35 = snd_soc_codec_get_drvdata(codec); + struct classh_cfg *classh = &cs35l35->pdata.classh_algo; + struct monitor_cfg *monitor_config = &cs35l35->pdata.mon_cfg; + int ret; + + cs35l35->codec = codec; + + /* Set Platform Data */ + if (cs35l35->pdata.bst_vctl) + regmap_update_bits(cs35l35->regmap, CS35L35_BST_CVTR_V_CTL, + CS35L35_BST_CTL_MASK, cs35l35->pdata.bst_vctl); + + if (cs35l35->pdata.bst_ipk) + regmap_update_bits(cs35l35->regmap, CS35L35_BST_PEAK_I, + CS35L35_BST_IPK_MASK, + cs35l35->pdata.bst_ipk << CS35L35_BST_IPK_SHIFT); + + if (cs35l35->pdata.gain_zc) + regmap_update_bits(cs35l35->regmap, CS35L35_PROTECT_CTL, + CS35L35_AMP_GAIN_ZC_MASK, + cs35l35->pdata.gain_zc << CS35L35_AMP_GAIN_ZC_SHIFT); + + if (cs35l35->pdata.aud_channel) + regmap_update_bits(cs35l35->regmap, + CS35L35_AUDIN_RXLOC_CTL, + CS35L35_AUD_IN_LR_MASK, + cs35l35->pdata.aud_channel << CS35L35_AUD_IN_LR_SHIFT); + + if (cs35l35->pdata.stereo) { + regmap_update_bits(cs35l35->regmap, + CS35L35_ADVIN_RXLOC_CTL, CS35L35_ADV_IN_LR_MASK, + cs35l35->pdata.adv_channel << CS35L35_ADV_IN_LR_SHIFT); + if (cs35l35->pdata.shared_bst) + regmap_update_bits(cs35l35->regmap, CS35L35_CLASS_H_CTL, + CS35L35_CH_STEREO_MASK, 1 << CS35L35_CH_STEREO_SHIFT); + ret = snd_soc_add_codec_controls(codec, cs35l35_adv_controls, + ARRAY_SIZE(cs35l35_adv_controls)); + if (ret) + return ret; + } + + if (cs35l35->pdata.sp_drv_str) + regmap_update_bits(cs35l35->regmap, CS35L35_CLK_CTL1, + CS35L35_SP_DRV_MASK, + cs35l35->pdata.sp_drv_str << CS35L35_SP_DRV_SHIFT); + + if (classh->classh_algo_enable) { + if (classh->classh_bst_override) + regmap_update_bits(cs35l35->regmap, + CS35L35_CLASS_H_CTL, CS35L35_CH_BST_OVR_MASK, + classh->classh_bst_override << CS35L35_CH_BST_OVR_SHIFT); + if (classh->classh_bst_max_limit) + regmap_update_bits(cs35l35->regmap, + CS35L35_CLASS_H_CTL, CS35L35_CH_BST_LIM_MASK, + classh->classh_bst_max_limit << CS35L35_CH_BST_LIM_SHIFT); + if (classh->classh_mem_depth) + regmap_update_bits(cs35l35->regmap, + CS35L35_CLASS_H_CTL, CS35L35_CH_MEM_DEPTH_MASK, + classh->classh_mem_depth << CS35L35_CH_MEM_DEPTH_SHIFT); + if (classh->classh_headroom) + regmap_update_bits(cs35l35->regmap, + CS35L35_CLASS_H_HEADRM_CTL, CS35L35_CH_HDRM_CTL_MASK, + classh->classh_headroom << CS35L35_CH_HDRM_CTL_SHIFT); + if (classh->classh_release_rate) + regmap_update_bits(cs35l35->regmap, + CS35L35_CLASS_H_RELEASE_RATE, CS35L35_CH_REL_RATE_MASK, + classh->classh_release_rate << CS35L35_CH_REL_RATE_SHIFT); + if (classh->classh_wk_fet_disable) + regmap_update_bits(cs35l35->regmap, + CS35L35_CLASS_H_FET_DRIVE_CTL, CS35L35_CH_WKFET_DIS_MASK, + classh->classh_wk_fet_disable << CS35L35_CH_WKFET_DIS_SHIFT); + if (classh->classh_wk_fet_delay) + regmap_update_bits(cs35l35->regmap, + CS35L35_CLASS_H_FET_DRIVE_CTL, CS35L35_CH_WKFET_DEL_MASK, + classh->classh_wk_fet_delay << CS35L35_CH_WKFET_DEL_SHIFT); + if (classh->classh_wk_fet_thld) + regmap_update_bits(cs35l35->regmap, + CS35L35_CLASS_H_FET_DRIVE_CTL, CS35L35_CH_WKFET_THLD_MASK, + classh->classh_wk_fet_thld << CS35L35_CH_WKFET_THLD_SHIFT); + if (classh->classh_vpch_auto) + regmap_update_bits(cs35l35->regmap, + CS35L35_CLASS_H_VP_CTL, CS35L35_CH_VP_AUTO_MASK, + classh->classh_vpch_auto << CS35L35_CH_VP_AUTO_SHIFT); + if (classh->classh_vpch_rate) + regmap_update_bits(cs35l35->regmap, + CS35L35_CLASS_H_VP_CTL, CS35L35_CH_VP_RATE_MASK, + classh->classh_vpch_rate << CS35L35_CH_VP_RATE_SHIFT); + if (classh->classh_vpch_man) + regmap_update_bits(cs35l35->regmap, + CS35L35_CLASS_H_VP_CTL, CS35L35_CH_VP_MAN_MASK, + classh->classh_vpch_man << CS35L35_CH_VP_MAN_SHIFT); + } + + if (monitor_config->is_present) { + if (monitor_config->vmon_specs) { + regmap_update_bits(cs35l35->regmap, + CS35L35_SPKMON_DEPTH_CTL, CS35L35_VMON_DEPTH_MASK, + monitor_config->vmon_dpth << CS35L35_VMON_DEPTH_SHIFT); + regmap_update_bits(cs35l35->regmap, + CS35L35_VMON_TXLOC_CTL, CS35L35_MON_TXLOC_MASK, + monitor_config->vmon_loc << CS35L35_MON_TXLOC_SHIFT); + regmap_update_bits(cs35l35->regmap, + CS35L35_VMON_TXLOC_CTL, CS35L35_MON_FRM_MASK, + monitor_config->vmon_frm << CS35L35_MON_FRM_SHIFT); + } + if (monitor_config->imon_specs) { + regmap_update_bits(cs35l35->regmap, + CS35L35_SPKMON_DEPTH_CTL, CS35L35_IMON_DEPTH_MASK, + monitor_config->imon_dpth << CS35L35_IMON_DEPTH_SHIFT); + regmap_update_bits(cs35l35->regmap, + CS35L35_IMON_TXLOC_CTL, CS35L35_MON_TXLOC_MASK, + monitor_config->imon_loc << CS35L35_MON_TXLOC_SHIFT); + regmap_update_bits(cs35l35->regmap, + CS35L35_IMON_TXLOC_CTL, CS35L35_MON_FRM_MASK, + monitor_config->imon_frm << CS35L35_MON_FRM_SHIFT); + } + if (monitor_config->vpmon_specs) { + regmap_update_bits(cs35l35->regmap, + CS35L35_SUPMON_DEPTH_CTL, CS35L35_VPMON_DEPTH_MASK, + monitor_config->vpmon_dpth << CS35L35_VPMON_DEPTH_SHIFT); + regmap_update_bits(cs35l35->regmap, + CS35L35_VPMON_TXLOC_CTL, CS35L35_MON_TXLOC_MASK, + monitor_config->vpmon_loc << CS35L35_MON_TXLOC_SHIFT); + regmap_update_bits(cs35l35->regmap, + CS35L35_VPMON_TXLOC_CTL, CS35L35_MON_FRM_MASK, + monitor_config->vpmon_frm << CS35L35_MON_FRM_SHIFT); + } + if (monitor_config->vbstmon_specs) { + regmap_update_bits(cs35l35->regmap, + CS35L35_SUPMON_DEPTH_CTL, CS35L35_VBSTMON_DEPTH_MASK, + monitor_config->vpmon_dpth << CS35L35_VBSTMON_DEPTH_SHIFT); + regmap_update_bits(cs35l35->regmap, + CS35L35_VBSTMON_TXLOC_CTL, CS35L35_MON_TXLOC_MASK, + monitor_config->vbstmon_loc << CS35L35_MON_TXLOC_SHIFT); + regmap_update_bits(cs35l35->regmap, + CS35L35_VBSTMON_TXLOC_CTL, CS35L35_MON_FRM_MASK, + monitor_config->vbstmon_frm << CS35L35_MON_FRM_SHIFT); + } + if (monitor_config->vpbrstat_specs) { + regmap_update_bits(cs35l35->regmap, + CS35L35_SUPMON_DEPTH_CTL, CS35L35_VPBRSTAT_DEPTH_MASK, + monitor_config->vpbrstat_dpth << CS35L35_VPBRSTAT_DEPTH_SHIFT); + regmap_update_bits(cs35l35->regmap, + CS35L35_VPBR_STATUS_TXLOC_CTL, CS35L35_MON_TXLOC_MASK, + monitor_config->vpbrstat_loc << CS35L35_MON_TXLOC_SHIFT); + regmap_update_bits(cs35l35->regmap, + CS35L35_VPBR_STATUS_TXLOC_CTL, CS35L35_MON_FRM_MASK, + monitor_config->vpbrstat_frm << CS35L35_MON_FRM_SHIFT); + } + if (monitor_config->zerofill_specs) { + regmap_update_bits(cs35l35->regmap, + CS35L35_SUPMON_DEPTH_CTL, CS35L35_ZEROFILL_DEPTH_MASK, + monitor_config->zerofill_dpth << CS35L35_ZEROFILL_DEPTH_SHIFT); + regmap_update_bits(cs35l35->regmap, + CS35L35_ZERO_FILL_LOC_CTL, CS35L35_MON_TXLOC_MASK, + monitor_config->zerofill_loc << CS35L35_MON_TXLOC_SHIFT); + regmap_update_bits(cs35l35->regmap, + CS35L35_ZERO_FILL_LOC_CTL, CS35L35_MON_FRM_MASK, + monitor_config->zerofill_frm << CS35L35_MON_FRM_SHIFT); + } + } + + return ret; +} + +static struct snd_soc_codec_driver soc_codec_dev_cs35l35 = { + .probe = cs35l35_codec_probe, + .set_sysclk = cs35l35_codec_set_sysclk, + .component_driver = { + .controls = cs35l35_aud_controls, + .num_controls = ARRAY_SIZE(cs35l35_aud_controls), + .dapm_widgets = cs35l35_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(cs35l35_dapm_widgets), + + .dapm_routes = cs35l35_audio_map, + .num_dapm_routes = ARRAY_SIZE(cs35l35_audio_map), + }, +}; + +static struct regmap_config cs35l35_regmap = { + .reg_bits = 8, + .val_bits = 8, + + .max_register = CS35L35_MAX_REGISTER, + .reg_defaults = cs35l35_reg, + .num_reg_defaults = ARRAY_SIZE(cs35l35_reg), + .volatile_reg = cs35l35_volatile_register, + .readable_reg = cs35l35_readable_register, + .precious_reg = cs35l35_precious_register, + .cache_type = REGCACHE_RBTREE, +}; + +static irqreturn_t cs35l35_irq(int irq, void *data) +{ + struct cs35l35_private *cs35l35 = data; + struct snd_soc_codec *codec = cs35l35->codec; + unsigned int sticky1, sticky2, sticky3, sticky4; + unsigned int mask1, mask2, mask3, mask4, current1; + + /* ack the irq by reading all status registers */ + regmap_read(cs35l35->regmap, CS35L35_INT_STATUS_4, &sticky4); + regmap_read(cs35l35->regmap, CS35L35_INT_STATUS_3, &sticky3); + regmap_read(cs35l35->regmap, CS35L35_INT_STATUS_2, &sticky2); + regmap_read(cs35l35->regmap, CS35L35_INT_STATUS_1, &sticky1); + + regmap_read(cs35l35->regmap, CS35L35_INT_MASK_4, &mask4); + regmap_read(cs35l35->regmap, CS35L35_INT_MASK_3, &mask3); + regmap_read(cs35l35->regmap, CS35L35_INT_MASK_2, &mask2); + regmap_read(cs35l35->regmap, CS35L35_INT_MASK_1, &mask1); + + /* Check to see if unmasked bits are active */ + if (!(sticky1 & ~mask1) && !(sticky2 & ~mask2) && !(sticky3 & ~mask3) + && !(sticky4 & ~mask4)) + return IRQ_NONE; + + if (sticky2 & CS35L35_PDN_DONE) + complete(&cs35l35->pdn_done); + + /* read the current values */ + regmap_read(cs35l35->regmap, CS35L35_INT_STATUS_1, &current1); + + /* handle the interrupts */ + if (sticky1 & CS35L35_CAL_ERR) { + dev_err(codec->dev, "%s : Calibration Error\n", __func__); + + /* error is no longer asserted; safe to reset */ + if (!(current1 & CS35L35_CAL_ERR)) { + dev_dbg(codec->dev, "%s : Cal error release\n", __func__); + regmap_update_bits(cs35l35->regmap, + CS35L35_PROT_RELEASE_CTL, CS35L35_CAL_ERR_RLS, 0); + regmap_update_bits(cs35l35->regmap, + CS35L35_PROT_RELEASE_CTL, CS35L35_CAL_ERR_RLS, + CS35L35_CAL_ERR_RLS); + regmap_update_bits(cs35l35->regmap, + CS35L35_PROT_RELEASE_CTL, CS35L35_CAL_ERR_RLS, 0); + } + } + + if (sticky1 & CS35L35_AMP_SHORT) { + /* error is no longer asserted; safe to reset */ + if (!(current1 & CS35L35_AMP_SHORT)) { + dev_dbg(codec->dev, "%s :Amp short error release\n", __func__); + regmap_update_bits(cs35l35->regmap, + CS35L35_PROT_RELEASE_CTL, CS35L35_SHORT_RLS, 0); + regmap_update_bits(cs35l35->regmap, + CS35L35_PROT_RELEASE_CTL, CS35L35_SHORT_RLS, + CS35L35_SHORT_RLS); + regmap_update_bits(cs35l35->regmap, + CS35L35_PROT_RELEASE_CTL, CS35L35_SHORT_RLS, 0); + } + } + + if (sticky1 & CS35L35_OTW) { + dev_err(codec->dev, "%s : Over temperature warning\n", __func__); + + /* error is no longer asserted; safe to reset */ + if (!(current1 & CS35L35_OTW)) { + dev_dbg(codec->dev, "%s : Over temperature warning release\n", + __func__); + regmap_update_bits(cs35l35->regmap, + CS35L35_PROT_RELEASE_CTL, CS35L35_OTW_RLS, 0); + regmap_update_bits(cs35l35->regmap, + CS35L35_PROT_RELEASE_CTL, CS35L35_OTW_RLS, + CS35L35_OTW_RLS); + regmap_update_bits(cs35l35->regmap, + CS35L35_PROT_RELEASE_CTL, CS35L35_OTW_RLS, 0); + } + } + + if (sticky1 & CS35L35_OTE) { + dev_crit(codec->dev, "%s : Over temperature error\n", __func__); + + /* error is no longer asserted; safe to reset */ + if (!(current1 & CS35L35_OTE)) { + dev_dbg(codec->dev, "%s : Over temperature error release\n", + __func__); + regmap_update_bits(cs35l35->regmap, + CS35L35_PROT_RELEASE_CTL, CS35L35_OTE_RLS, 0); + regmap_update_bits(cs35l35->regmap, + CS35L35_PROT_RELEASE_CTL, CS35L35_OTE_RLS, + CS35L35_OTE_RLS); + regmap_update_bits(cs35l35->regmap, + CS35L35_PROT_RELEASE_CTL, CS35L35_OTE_RLS, 0); + } + } + + if (sticky3 & CS35L35_BST_HIGH) { + dev_crit(codec->dev, "%s : VBST error: powering off!\n", __func__); + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL2, + CS35L35_PDN_AMP, CS35L35_PDN_AMP); + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL1, + CS35L35_PDN_ALL, CS35L35_PDN_ALL); + } + + if (sticky3 & CS35L35_LBST_SHORT) { + dev_crit(codec->dev, "%s : LBST error: powering off!\n", __func__); + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL2, + CS35L35_PDN_AMP, CS35L35_PDN_AMP); + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL1, + CS35L35_PDN_ALL, CS35L35_PDN_ALL); + } + + if (sticky2 & CS35L35_VPBR_ERR) + dev_err(codec->dev, "%s : Error: Reactive Brownout\n", __func__); + + if (sticky4 & CS35L35_VMON_OVFL) + dev_err(codec->dev, "%s : Error: VMON overflow\n", __func__); + + if (sticky4 & CS35L35_IMON_OVFL) + dev_err(codec->dev, "%s : Error: IMON overflow\n", __func__); + + return IRQ_HANDLED; +} + + +static int cs35l35_handle_of_data(struct i2c_client *i2c_client, + struct cs35l35_platform_data *pdata) +{ + struct device_node *np = i2c_client->dev.of_node; + struct device_node *classh, *signal_format; + struct classh_cfg *classh_config = &pdata->classh_algo; + struct monitor_cfg *monitor_config = &pdata->mon_cfg; + unsigned int val32 = 0; + u8 monitor_array[3]; + int ret = 0; + + if (!np) + return 0; + + pdata->bst_pdn_fet_on = of_property_read_bool(np, + "cirrus,boost-pdn-fet-on"); + + if (of_property_read_u32(np, "cirrus,boost-ctl-millivolt", &val32) >= 0) + pdata->bst_vctl = val32; + + if (of_property_read_u32(np, "cirrus,boost-ipk-milliamp", &val32) >= 0) + pdata->bst_ipk = val32; + + if (of_property_read_u32(np, "cirrus,sp-drv-strength", &val32) >= 0) + pdata->sp_drv_str = val32; + + pdata->stereo = of_property_read_bool(np, "cirrus,stereo-config"); + + if (pdata->stereo) { + if (of_property_read_u32(np, "cirrus,audio-channel", &val32) >= 0) + pdata->aud_channel = val32; + if (of_property_read_u32(np, "cirrus,advisory-channel", + &val32) >= 0) + pdata->adv_channel = val32; + pdata->shared_bst = of_property_read_bool(np, + "cirrus,shared-boost"); + } + + pdata->gain_zc = of_property_read_bool(np, "cirrus,amp-gain-zc"); + + classh = of_get_child_by_name(np, "cirrus,classh-internal-algo"); + classh_config->classh_algo_enable = classh ? true : false; + + if (classh_config->classh_algo_enable) { + classh_config->classh_bst_override = + of_property_read_bool(np, "cirrus,classh-bst-overide"); + + if (of_property_read_u32(classh, "cirrus,classh-bst-max-limit", + &val32) >= 0) + classh_config->classh_bst_max_limit = val32; + if (of_property_read_u32(classh, "cirrus,classh-mem-depth", + &val32) >= 0) + classh_config->classh_mem_depth = val32; + if (of_property_read_u32(classh, "cirrus,classh-release-rate", + &val32) >= 0) + classh_config->classh_release_rate = val32; + if (of_property_read_u32(classh, "cirrus,classh-headroom", + &val32) >= 0) + classh_config->classh_headroom = val32; + if (of_property_read_u32(classh, "cirrus,classh-wk-fet-disable", + &val32) >= 0) + classh_config->classh_wk_fet_disable = val32; + if (of_property_read_u32(classh, "cirrus,classh-wk-fet-delay", + &val32) >= 0) + classh_config->classh_wk_fet_delay = val32; + if (of_property_read_u32(classh, "cirrus,classh-wk-fet-thld", + &val32) >= 0) + classh_config->classh_wk_fet_thld = val32; + if (of_property_read_u32(classh, "cirrus,classh-vpch-auto", + &val32) >= 0) + classh_config->classh_vpch_auto = val32; + if (of_property_read_u32(classh, "cirrus,classh-vpch-rate", + &val32) >= 0) + classh_config->classh_vpch_rate = val32; + if (of_property_read_u32(classh, "cirrus,classh-vpch-man", + &val32) >= 0) + classh_config->classh_vpch_man = val32; + } + of_node_put(classh); + + /* frame depth location */ + signal_format = of_get_child_by_name(np, "cirrus,monitor-signal-format"); + monitor_config->is_present = signal_format ? true : false; + if (monitor_config->is_present) { + ret = of_property_read_u8_array(signal_format, "cirrus,imon", + monitor_array, ARRAY_SIZE(monitor_array)); + if (!ret) { + monitor_config->imon_specs = true; + monitor_config->imon_dpth = monitor_array[0]; + monitor_config->imon_loc = monitor_array[1]; + monitor_config->imon_frm = monitor_array[2]; + } + ret = of_property_read_u8_array(signal_format, "cirrus,vmon", + monitor_array, ARRAY_SIZE(monitor_array)); + if (!ret) { + monitor_config->vmon_specs = true; + monitor_config->vmon_dpth = monitor_array[0]; + monitor_config->vmon_loc = monitor_array[1]; + monitor_config->vmon_frm = monitor_array[2]; + } + ret = of_property_read_u8_array(signal_format, "cirrus,vpmon", + monitor_array, ARRAY_SIZE(monitor_array)); + if (!ret) { + monitor_config->vpmon_specs = true; + monitor_config->vpmon_dpth = monitor_array[0]; + monitor_config->vpmon_loc = monitor_array[1]; + monitor_config->vpmon_frm = monitor_array[2]; + } + ret = of_property_read_u8_array(signal_format, "cirrus,vbstmon", + monitor_array, ARRAY_SIZE(monitor_array)); + if (!ret) { + monitor_config->vbstmon_specs = true; + monitor_config->vbstmon_dpth = monitor_array[0]; + monitor_config->vbstmon_loc = monitor_array[1]; + monitor_config->vbstmon_frm = monitor_array[2]; + } + ret = of_property_read_u8_array(signal_format, "cirrus,vpbrstat", + monitor_array, ARRAY_SIZE(monitor_array)); + if (!ret) { + monitor_config->vpbrstat_specs = true; + monitor_config->vpbrstat_dpth = monitor_array[0]; + monitor_config->vpbrstat_loc = monitor_array[1]; + monitor_config->vpbrstat_frm = monitor_array[2]; + } + ret = of_property_read_u8_array(signal_format, "cirrus,zerofill", + monitor_array, ARRAY_SIZE(monitor_array)); + if (!ret) { + monitor_config->zerofill_specs = true; + monitor_config->zerofill_dpth = monitor_array[0]; + monitor_config->zerofill_loc = monitor_array[1]; + monitor_config->zerofill_frm = monitor_array[2]; + } + } + of_node_put(signal_format); + + return 0; +} + +/* Errata Rev A0 */ +static const struct reg_sequence cs35l35_errata_patch[] = { + + { 0x7F, 0x99 }, + { 0x00, 0x99 }, + { 0x52, 0x22 }, + { 0x04, 0x14 }, + { 0x6D, 0x44 }, + { 0x24, 0x10 }, + { 0x58, 0xC4 }, + { 0x00, 0x98 }, + { 0x18, 0x08 }, + { 0x00, 0x00 }, + { 0x7F, 0x00 }, +}; + +static int cs35l35_i2c_probe(struct i2c_client *i2c_client, + const struct i2c_device_id *id) +{ + struct cs35l35_private *cs35l35; + struct cs35l35_platform_data *pdata = + dev_get_platdata(&i2c_client->dev); + int i; + int ret; + unsigned int devid = 0; + unsigned int reg; + + cs35l35 = devm_kzalloc(&i2c_client->dev, + sizeof(struct cs35l35_private), + GFP_KERNEL); + if (!cs35l35) { + dev_err(&i2c_client->dev, "could not allocate codec\n"); + return -ENOMEM; + } + + i2c_set_clientdata(i2c_client, cs35l35); + cs35l35->regmap = devm_regmap_init_i2c(i2c_client, &cs35l35_regmap); + if (IS_ERR(cs35l35->regmap)) { + ret = PTR_ERR(cs35l35->regmap); + dev_err(&i2c_client->dev, "regmap_init() failed: %d\n", ret); + goto err; + } + + for (i = 0; i < ARRAY_SIZE(cs35l35_supplies); i++) + cs35l35->supplies[i].supply = cs35l35_supplies[i]; + cs35l35->num_supplies = ARRAY_SIZE(cs35l35_supplies); + + ret = devm_regulator_bulk_get(&i2c_client->dev, + cs35l35->num_supplies, + cs35l35->supplies); + if (ret != 0) { + dev_err(&i2c_client->dev, + "Failed to request core supplies: %d\n", + ret); + return ret; + } + + if (pdata) { + cs35l35->pdata = *pdata; + } else { + pdata = devm_kzalloc(&i2c_client->dev, + sizeof(struct cs35l35_platform_data), + GFP_KERNEL); + if (!pdata) { + dev_err(&i2c_client->dev, + "could not allocate pdata\n"); + return -ENOMEM; + } + if (i2c_client->dev.of_node) { + ret = cs35l35_handle_of_data(i2c_client, pdata); + if (ret != 0) + return ret; + + } + cs35l35->pdata = *pdata; + } + + ret = regulator_bulk_enable(cs35l35->num_supplies, + cs35l35->supplies); + if (ret != 0) { + dev_err(&i2c_client->dev, + "Failed to enable core supplies: %d\n", + ret); + return ret; + } + + /* returning NULL can be an option if in stereo mode */ + cs35l35->reset_gpio = devm_gpiod_get_optional(&i2c_client->dev, + "reset", GPIOD_OUT_LOW); + if (IS_ERR(cs35l35->reset_gpio)) + return PTR_ERR(cs35l35->reset_gpio); + + if (cs35l35->reset_gpio) + gpiod_set_value_cansleep(cs35l35->reset_gpio, 1); + + init_completion(&cs35l35->pdn_done); + + ret = regmap_register_patch(cs35l35->regmap, cs35l35_errata_patch, + ARRAY_SIZE(cs35l35_errata_patch)); + if (ret < 0) { + dev_err(&i2c_client->dev, "Failed to apply errata patch\n"); + return ret; + } + + ret = devm_request_threaded_irq(&i2c_client->dev, i2c_client->irq, NULL, + cs35l35_irq, IRQF_ONESHOT | IRQF_TRIGGER_LOW, + "cs35l35", cs35l35); + if (ret != 0) { + dev_err(&i2c_client->dev, "Failed to request IRQ: %d\n", ret); + goto err; + } + /* initialize codec */ + ret = regmap_read(cs35l35->regmap, CS35L35_DEVID_AB, &reg); + + devid = (reg & 0xFF) << 12; + ret = regmap_read(cs35l35->regmap, CS35L35_DEVID_CD, &reg); + devid |= (reg & 0xFF) << 4; + ret = regmap_read(cs35l35->regmap, CS35L35_DEVID_E, &reg); + devid |= (reg & 0xF0) >> 4; + + if (devid != CS35L35_CHIP_ID) { + dev_err(&i2c_client->dev, + "CS35L35 Device ID (%X). Expected ID %X\n", + devid, CS35L35_CHIP_ID); + ret = -ENODEV; + goto err; + } + + ret = regmap_read(cs35l35->regmap, CS35L35_REV_ID, &reg); + if (ret < 0) { + dev_err(&i2c_client->dev, "Get Revision ID failed\n"); + goto err; + } + + dev_info(&i2c_client->dev, + "Cirrus Logic CS35L35 (%x), Revision: %02X\n", devid, + ret & 0xFF); + + /* Set the INT Masks for critical errors */ + regmap_write(cs35l35->regmap, CS35L35_INT_MASK_1, CS35L35_INT1_CRIT_MASK); + regmap_write(cs35l35->regmap, CS35L35_INT_MASK_2, CS35L35_INT2_CRIT_MASK); + regmap_write(cs35l35->regmap, CS35L35_INT_MASK_3, CS35L35_INT3_CRIT_MASK); + regmap_write(cs35l35->regmap, CS35L35_INT_MASK_4, CS35L35_INT4_CRIT_MASK); + + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL2, + CS35L35_PWR2_PDN_MASK, CS35L35_PWR2_PDN_MASK); + + if (cs35l35->pdata.bst_pdn_fet_on) + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL2, + CS35L35_PDN_BST_MASK, 1 << CS35L35_PDN_BST_FETON_SHIFT); + else + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL2, + CS35L35_PDN_BST_MASK, 1 << CS35L35_PDN_BST_FETOFF_SHIFT); + + regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL3, + CS35L35_PWR3_PDN_MASK, CS35L35_PWR3_PDN_MASK); + + regmap_update_bits(cs35l35->regmap, CS35L35_PROTECT_CTL, + CS35L35_AMP_MUTE_MASK, 1 << CS35L35_AMP_MUTE_SHIFT); + + ret = snd_soc_register_codec(&i2c_client->dev, + &soc_codec_dev_cs35l35, cs35l35_dai, + ARRAY_SIZE(cs35l35_dai)); + if (ret < 0) { + dev_err(&i2c_client->dev, + "%s: Register codec failed\n", __func__); + goto err; + } + +err: + regulator_bulk_disable(cs35l35->num_supplies, + cs35l35->supplies); + return ret; +} + +static int cs35l35_i2c_remove(struct i2c_client *client) +{ + snd_soc_unregister_codec(&client->dev); + kfree(i2c_get_clientdata(client)); + return 0; +} + +static const struct of_device_id cs35l35_of_match[] = { + {.compatible = "cirrus,cs35l35"}, + {}, +}; +MODULE_DEVICE_TABLE(of, cs35l35_of_match); + +static const struct i2c_device_id cs35l35_id[] = { + {"cs35l35", 0}, + {} +}; + +MODULE_DEVICE_TABLE(i2c, cs35l35_id); + +static struct i2c_driver cs35l35_i2c_driver = { + .driver = { + .name = "cs35l35", + .of_match_table = cs35l35_of_match, + }, + .id_table = cs35l35_id, + .probe = cs35l35_i2c_probe, + .remove = cs35l35_i2c_remove, +}; + +module_i2c_driver(cs35l35_i2c_driver); + +MODULE_DESCRIPTION("ASoC CS35L35 driver"); +MODULE_AUTHOR("Brian Austin, Cirrus Logic Inc, <brian.austin(a)cirrus.com>"); +MODULE_AUTHOR("Li Xu, Cirrus Logic Inc, <li.xu(a)cirrus.com>"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/codecs/cs35l35.h b/sound/soc/codecs/cs35l35.h new file mode 100644 index 0000000..767227e --- /dev/null +++ b/sound/soc/codecs/cs35l35.h @@ -0,0 +1,285 @@ +/* + * cs35l35.h -- CS35L35 ALSA SoC audio driver + * + * Copyright 2016 Cirrus Logic, Inc. + * + * Author: Brian Austin <brian.austin(a)cirrus.com> + * Li Xu <li.xu(a)cirrus.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#ifndef __CS35L35_H__ +#define __CS35L35_H__ + +#define CS35L35_FIRSTREG 0x01 +#define CS35L35_LASTREG 0x7E +#define CS35L35_CHIP_ID 0x00035A35 +#define CS35L35_DEVID_AB 0x01 /* Device ID A & B [RO] */ +#define CS35L35_DEVID_CD 0x02 /* Device ID C & D [RO] */ +#define CS35L35_DEVID_E 0x03 /* Device ID E [RO] */ +#define CS35L35_FAB_ID 0x04 /* Fab ID [RO] */ +#define CS35L35_REV_ID 0x05 /* Revision ID [RO] */ +#define CS35L35_PWRCTL1 0x06 /* Power Ctl 1 */ +#define CS35L35_PWRCTL2 0x07 /* Power Ctl 2 */ +#define CS35L35_PWRCTL3 0x08 /* Power Ctl 3 */ +#define CS35L35_CLK_CTL1 0x0A /* Clocking Ctl 1 */ +#define CS35L35_CLK_CTL2 0x0B /* Clocking Ctl 2 */ +#define CS35L35_CLK_CTL3 0x0C /* Clocking Ctl 3 */ +#define CS35L35_SP_FMT_CTL1 0x0D /* Serial Port Format CTL1 */ +#define CS35L35_SP_FMT_CTL2 0x0E /* Serial Port Format CTL2 */ +#define CS35L35_SP_FMT_CTL3 0x0F /* Serial Port Format CTL3 */ +#define CS35L35_MAG_COMP_CTL 0x13 /* Magnitude Comp CTL */ +#define CS35L35_AMP_INP_DRV_CTL 0x14 /* Amp Input Drive Ctl */ +#define CS35L35_AMP_DIG_VOL_CTL 0x15 /* Amplifier Dig Volume Ctl */ +#define CS35L35_AMP_DIG_VOL 0x16 /* Amplifier Dig Volume */ +#define CS35L35_ADV_DIG_VOL 0x17 /* Advisory Digital Volume */ +#define CS35L35_PROTECT_CTL 0x18 /* Amp Gain - Prot Ctl Param */ +#define CS35L35_AMP_GAIN_AUD_CTL 0x19 /* Amp Serial Port Gain Ctl */ +#define CS35L35_AMP_GAIN_PDM_CTL 0x1A /* Amplifier Gain PDM Ctl */ +#define CS35L35_AMP_GAIN_ADV_CTL 0x1B /* Amplifier Gain Ctl */ +#define CS35L35_GPI_CTL 0x1C /* GPI Ctl */ +#define CS35L35_BST_CVTR_V_CTL 0x1D /* Boost Conv Voltage Ctl */ +#define CS35L35_BST_PEAK_I 0x1E /* Boost Conv Peak Current */ +#define CS35L35_BST_RAMP_CTL 0x20 /* Boost Conv Soft Ramp Ctl */ +#define CS35L35_BST_CONV_COEF_1 0x21 /* Boost Conv Coefficients 1 */ +#define CS35L35_BST_CONV_COEF_2 0x22 /* Boost Conv Coefficients 2 */ +#define CS35L35_BST_CONV_SLOPE_COMP 0x23 /* Boost Conv Slope Comp */ +#define CS35L35_BST_CONV_SW_FREQ 0x24 /* Boost Conv L BST SW Freq */ +#define CS35L35_CLASS_H_CTL 0x30 /* CLS H Control */ +#define CS35L35_CLASS_H_HEADRM_CTL 0x31 /* CLS H Headroom Ctl */ +#define CS35L35_CLASS_H_RELEASE_RATE 0x32 /* CLS H Release Rate */ +#define CS35L35_CLASS_H_FET_DRIVE_CTL 0x33 /* CLS H Weak FET Drive Ctl */ +#define CS35L35_CLASS_H_VP_CTL 0x34 /* CLS H VP Ctl */ +#define CS35L35_CLASS_H_STATUS 0x38 /* CLS H Status */ +#define CS35L35_VPBR_CTL 0x3A /* VPBR Ctl */ +#define CS35L35_VPBR_VOL_CTL 0x3B /* VPBR Volume Ctl */ +#define CS35L35_VPBR_TIMING_CTL 0x3C /* VPBR Timing Ctl */ +#define CS35L35_VPBR_MODE_VOL_CTL 0x3D /* VPBR Mode/Attack Vol Ctl */ +#define CS35L35_VPBR_ATTEN_STATUS 0x4B /* VPBR Attenuation Status */ +#define CS35L35_SPKR_MON_CTL 0x4E /* Speaker Monitoring Ctl */ +#define CS35L35_IMON_SCALE_CTL 0x51 /* IMON Scale Ctl */ +#define CS35L35_AUDIN_RXLOC_CTL 0x52 /* Audio Input RX Loc Ctl */ +#define CS35L35_ADVIN_RXLOC_CTL 0x53 /* Advisory Input RX Loc Ctl */ +#define CS35L35_VMON_TXLOC_CTL 0x54 /* VMON TX Loc Ctl */ +#define CS35L35_IMON_TXLOC_CTL 0x55 /* IMON TX Loc Ctl */ +#define CS35L35_VPMON_TXLOC_CTL 0x56 /* VPMON TX Loc Ctl */ +#define CS35L35_VBSTMON_TXLOC_CTL 0x57 /* VBSTMON TX Loc Ctl */ +#define CS35L35_VPBR_STATUS_TXLOC_CTL 0x58 /* VPBR Status TX Loc Ctl */ +#define CS35L35_ZERO_FILL_LOC_CTL 0x59 /* Zero Fill Loc Ctl */ +#define CS35L35_AUDIN_DEPTH_CTL 0x5A /* Audio Input Depth Ctl */ +#define CS35L35_SPKMON_DEPTH_CTL 0x5B /* SPK Mon Output Depth Ctl */ +#define CS35L35_SUPMON_DEPTH_CTL 0x5C /* Supply Mon Out Depth Ctl */ +#define CS35L35_ZEROFILL_DEPTH_CTL 0x5D /* Zero Fill Mon Output Ctl */ +#define CS35L35_MULT_DEV_SYNCH1 0x62 /* Multidevice Synch */ +#define CS35L35_MULT_DEV_SYNCH2 0x63 /* Multidevice Synch 2 */ +#define CS35L35_PROT_RELEASE_CTL 0x64 /* Protection Release Ctl */ +#define CS35L35_DIAG_MODE_REG_LOCK 0x68 /* Diagnostic Mode Reg Lock */ +#define CS35L35_DIAG_MODE_CTL_1 0x69 /* Diagnostic Mode Ctl 1 */ +#define CS35L35_DIAG_MODE_CTL_2 0x6A /* Diagnostic Mode Ctl 2 */ +#define CS35L35_INT_MASK_1 0x70 /* Interrupt Mask 1 */ +#define CS35L35_INT_MASK_2 0x71 /* Interrupt Mask 2 */ +#define CS35L35_INT_MASK_3 0x72 /* Interrupt Mask 3 */ +#define CS35L35_INT_MASK_4 0x73 /* Interrupt Mask 4 */ +#define CS35L35_INT_STATUS_1 0x74 /* Interrupt Status 1 */ +#define CS35L35_INT_STATUS_2 0x75 /* Interrupt Status 2 */ +#define CS35L35_INT_STATUS_3 0x76 /* Interrupt Status 3 */ +#define CS35L35_INT_STATUS_4 0x77 /* Interrupt Status 4 */ +#define CS35L35_PLL_STATUS 0x78 /* PLL Status */ +#define CS35L35_OTP_TRIM_STATUS 0x7E /* OTP Trim Status */ + +#define CS35L35_MAX_REGISTER 0x7F + +/* CS35L35_PWRCTL1 */ +#define CS35L35_SFT_RST 0x80 +#define CS35L35_DISCHG_FLT 0x02 +#define CS35L35_PDN_ALL 0x01 + +/* CS35L35_PWRCTL2 */ +#define CS35L35_PDN_VMON 0x80 +#define CS35L35_PDN_IMON 0x40 +#define CS35L35_PDN_CLASSH 0x20 +#define CS35L35_PDN_VPBR 0x10 +#define CS35L35_PDN_BST 0x04 +#define CS35L35_PDN_AMP 0x01 + +/* CS35L35_PWRCTL3 */ +#define CS35L35_PDN_VBSTMON_OUT 0x10 +#define CS35L35_PDN_VMON_OUT 0x08 + +#define CS35L35_AUDIN_DEPTH_MASK 0x03 +#define CS35L35_AUDIN_DEPTH_SHIFT 0 +#define CS35L35_ADVIN_DEPTH_MASK 0x12 +#define CS35L35_ADVIN_DEPTH_SHIFT 2 +#define CS35L35_SDIN_DEPTH_8 0x01 +#define CS35L35_SDIN_DEPTH_16 0x02 +#define CS35L35_SDIN_DEPTH_24 0x03 + +#define CS35L35_SDOUT_DEPTH_8 0x01 +#define CS35L35_SDOUT_DEPTH_12 0x02 +#define CS35L35_SDOUT_DEPTH_16 0x03 + +#define CS35L35_AUD_IN_LR_MASK 0x80 +#define CS35L35_AUD_IN_LR_SHIFT 7 +#define CS35L35_ADV_IN_LR_MASK 0x80 +#define CS35L35_ADV_IN_LR_SHIFT 7 +#define CS35L35_AUD_IN_LOC_MASK 0x0F +#define CS35L35_AUD_IN_LOC_SHIFT 0 +#define CS35L35_ADV_IN_LOC_MASK 0x0F +#define CS35L35_ADV_IN_LOC_SHIFT 0 + +#define CS35L35_IMON_DEPTH_MASK 0x03 +#define CS35L35_IMON_DEPTH_SHIFT 0 +#define CS35L35_VMON_DEPTH_MASK 0x0C +#define CS35L35_VMON_DEPTH_SHIFT 2 +#define CS35L35_VBSTMON_DEPTH_MASK 0x03 +#define CS35L35_VBSTMON_DEPTH_SHIFT 0 +#define CS35L35_VPMON_DEPTH_MASK 0x0C +#define CS35L35_VPMON_DEPTH_SHIFT 2 +#define CS35L35_VPBRSTAT_DEPTH_MASK 0x18 +#define CS35L35_VPBRSTAT_DEPTH_SHIFT 4 +#define CS35L35_ZEROFILL_DEPTH_MASK 0x03 +#define CS35L35_ZEROFILL_DEPTH_SHIFT 0x00 + +#define CS35L35_MON_TXLOC_MASK 0x3F +#define CS35L35_MON_TXLOC_SHIFT 0 +#define CS35L35_MON_FRM_MASK 0x80 +#define CS35L35_MON_FRM_SHIFT 7 + +#define CS35L35_MS_MASK 0x80 +#define CS35L35_MS_SHIFT 7 +#define CS35L35_SPMODE_MASK 0x40 +#define CS35L35_SP_DRV_MASK 0x10 +#define CS35L35_SP_DRV_SHIFT 4 +#define CS35L35_CLK_CTL2_MASK 0xFF +#define CS35L35_PDM_MODE_MASK 0x40 +#define CS35L35_PDM_MODE_SHIFT 6 +#define CS35L35_CLK_SOURCE_MASK 0x03 +#define CS35L35_CLK_SOURCE_SHIFT 0 +#define CS35L35_CLK_SOURCE_MCLK 0 +#define CS35L35_CLK_SOURCE_SCLK 1 +#define CS35L35_CLK_SOURCE_PDM 2 + +#define CS35L35_SP_SCLKS_MASK 0x0F +#define CS35L35_SP_SCLKS_SHIFT 0x00 +#define CS35L35_SP_SCLKS_16FS 0x03 +#define CS35L35_SP_SCLKS_32FS 0x07 +#define CS35L35_SP_SCLKS_48FS 0x0B +#define CS35L35_SP_SCLKS_64FS 0x0F +#define CS35L35_SP_RATE_MASK 0xC0 + +#define CS35L35_PDN_BST_MASK 0x06 +#define CS35L35_PDN_BST_FETON_SHIFT 1 +#define CS35L35_PDN_BST_FETOFF_SHIFT 2 +#define CS35L35_PWR2_PDN_MASK 0xE0 +#define CS35L35_PWR3_PDN_MASK 0x1E +#define CS35L35_PDN_ALL_MASK 0x01 +#define CS35L35_DISCHG_FILT_MASK 0x02 +#define CS35L35_DISCHG_FILT_SHIFT 1 +#define CS35L35_MCLK_DIS_MASK 0x04 +#define CS35L35_MCLK_DIS_SHIFT 2 + +#define CS35L35_BST_CTL_MASK 0x7F +#define CS35L35_BST_CTL_SHIFT 0 +#define CS35L35_BST_IPK_MASK 0x1F +#define CS35L35_BST_IPK_SHIFT 0 +#define CS35L35_AMP_MUTE_MASK 0x20 +#define CS35L35_AMP_MUTE_SHIFT 5 +#define CS35L35_AMP_GAIN_ZC_MASK 0x10 +#define CS35L35_AMP_GAIN_ZC_SHIFT 4 + +/* Class H Algorithm Control */ +#define CS35L35_CH_STEREO_MASK 0x40 +#define CS35L35_CH_STEREO_SHIFT 6 +#define CS35L35_CH_BST_OVR_MASK 0x04 +#define CS35L35_CH_BST_OVR_SHIFT 2 +#define CS35L35_CH_BST_LIM_MASK 0x08 +#define CS35L35_CH_BST_LIM_SHIFT 3 +#define CS35L35_CH_MEM_DEPTH_MASK 0x01 +#define CS35L35_CH_MEM_DEPTH_SHIFT 0 +#define CS35L35_CH_HDRM_CTL_MASK 0x3F +#define CS35L35_CH_HDRM_CTL_SHIFT 0 +#define CS35L35_CH_REL_RATE_MASK 0xFF +#define CS35L35_CH_REL_RATE_SHIFT 0 +#define CS35L35_CH_WKFET_DIS_MASK 0x80 +#define CS35L35_CH_WKFET_DIS_SHIFT 7 +#define CS35L35_CH_WKFET_DEL_MASK 0x70 +#define CS35L35_CH_WKFET_DEL_SHIFT 4 +#define CS35L35_CH_WKFET_THLD_MASK 0x0F +#define CS35L35_CH_WKFET_THLD_SHIFT 0 +#define CS35L35_CH_VP_AUTO_MASK 0x80 +#define CS35L35_CH_VP_AUTO_SHIFT 7 +#define CS35L35_CH_VP_RATE_MASK 0x60 +#define CS35L35_CH_VP_RATE_SHIFT 5 +#define CS35L35_CH_VP_MAN_MASK 0x1F +#define CS35L35_CH_VP_MAN_SHIFT 0 + +/* CS35L35_PROT_RELEASE_CTL */ +#define CS35L35_CAL_ERR_RLS 0x80 +#define CS35L35_SHORT_RLS 0x04 +#define CS35L35_OTW_RLS 0x02 +#define CS35L35_OTE_RLS 0x01 + +/* INT Mask Registers */ +#define CS35L35_INT1_CRIT_MASK 0x38 +#define CS35L35_INT2_CRIT_MASK 0xEF +#define CS35L35_INT3_CRIT_MASK 0xEE +#define CS35L35_INT4_CRIT_MASK 0xFF + +/* PDN DONE Masks */ +#define CS35L35_M_PDN_DONE_SHIFT 4 +#define CS35L35_M_PDN_DONE_MASK 0x10 + +/* CS35L35_INT_1 */ +#define CS35L35_CAL_ERR 0x80 +#define CS35L35_OTP_ERR 0x40 +#define CS35L35_LRCLK_ERR 0x20 +#define CS35L35_SPCLK_ERR 0x10 +#define CS35L35_MCLK_ERR 0x08 +#define CS35L35_AMP_SHORT 0x04 +#define CS35L35_OTW 0x02 +#define CS35L35_OTE 0x01 + +/* CS35L35_INT_2 */ +#define CS35L35_PDN_DONE 0x10 +#define CS35L35_VPBR_ERR 0x02 +#define CS35L35_VPBR_CLR 0x01 + +/* CS35L35_INT_3 */ +#define CS35L35_BST_HIGH 0x10 +#define CS35L35_BST_HIGH_FLAG 0x08 +#define CS35L35_BST_IPK_FLAG 0x04 +#define CS35L35_LBST_SHORT 0x01 + +/* CS35L35_INT_4 */ +#define CS35L35_VMON_OVFL 0x08 +#define CS35L35_IMON_OVFL 0x04 + +#define CS35L35_FORMATS (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | \ + SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) + +struct cs35l35_private { + struct snd_soc_codec *codec; + struct cs35l35_platform_data pdata; + struct regmap *regmap; + struct regulator_bulk_data supplies[2]; + int num_supplies; + int sysclk; + int sclk; + bool pdm_mode; + bool i2s_mode; + bool slave_mode; + /* GPIO for /RST */ + struct gpio_desc *reset_gpio; + struct completion pdn_done; +}; + +static const char * const cs35l35_supplies[] = { + "VA", + "VP", +}; + +#endif -- 1.9.1

3 2

[alsa-devel] [PATCH 1/2] ASoC: nau8825: correct the function name of register
by John Hsu 23 Jan '17

23 Jan '17

Change to correct name of the register function. Signed-off-by: John Hsu <KCHSU0(a)nuvoton.com> --- sound/soc/codecs/nau8825.c | 6 +++--- sound/soc/codecs/nau8825.h | 4 ++-- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/sound/soc/codecs/nau8825.c b/sound/soc/codecs/nau8825.c index e4fb017..9c98d35 100644 --- a/sound/soc/codecs/nau8825.c +++ b/sound/soc/codecs/nau8825.c @@ -561,9 +561,9 @@ static void nau8825_xtalk_prepare(struct nau8825 *nau8825) nau8825_xtalk_backup(nau8825); /* Config IIS as master to output signal by codec */ regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2, - NAU8825_I2S_MS_MASK | NAU8825_I2S_DRV_MASK | + NAU8825_I2S_MS_MASK | NAU8825_I2S_LRC_DIV_MASK | NAU8825_I2S_BLK_DIV_MASK, NAU8825_I2S_MS_MASTER | - (0x2 << NAU8825_I2S_DRV_SFT) | 0x1); + (0x2 << NAU8825_I2S_LRC_DIV_SFT) | 0x1); /* Ramp up headphone volume to 0dB to get better performance and * avoid pop noise in headphone. */ @@ -657,7 +657,7 @@ static void nau8825_xtalk_clean(struct nau8825 *nau8825) NAU8825_IRQ_RMS_EN, NAU8825_IRQ_RMS_EN); /* Recover default value for IIS */ regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2, - NAU8825_I2S_MS_MASK | NAU8825_I2S_DRV_MASK | + NAU8825_I2S_MS_MASK | NAU8825_I2S_LRC_DIV_MASK | NAU8825_I2S_BLK_DIV_MASK, NAU8825_I2S_MS_SLAVE); /* Restore value of specific register for cross talk */ nau8825_xtalk_restore(nau8825); diff --git a/sound/soc/codecs/nau8825.h b/sound/soc/codecs/nau8825.h index 5732ce1..4b390c4 100644 --- a/sound/soc/codecs/nau8825.h +++ b/sound/soc/codecs/nau8825.h @@ -248,8 +248,8 @@ /* I2S_PCM_CTRL2 (0x1d) */ #define NAU8825_I2S_TRISTATE (1 << 15) /* 0 - normal mode, 1 - Hi-Z output */ -#define NAU8825_I2S_DRV_SFT 12 -#define NAU8825_I2S_DRV_MASK (0x3 << NAU8825_I2S_DRV_SFT) +#define NAU8825_I2S_LRC_DIV_SFT 12 +#define NAU8825_I2S_LRC_DIV_MASK (0x3 << NAU8825_I2S_LRC_DIV_SFT) #define NAU8825_I2S_MS_SFT 3 #define NAU8825_I2S_MS_MASK (1 << NAU8825_I2S_MS_SFT) #define NAU8825_I2S_MS_MASTER (1 << NAU8825_I2S_MS_SFT) -- 2.6.4

2 6

[alsa-devel] [PATCH v5 0/2] ALSA controls management using index/device/sub-devices fields
by Arnaud Pouliquen 20 Jan '17

20 Jan '17

Previous discussions summary: - Topic of the patchset: Patch concerns ASoc DAI drivers. Aim is to be able to instantiate PCM control using device field according to the associated PCM char device. For this, a relationship between DAIs PCM control and PCM char device needs to be establish. => Proposal is to add field in DAI driver struct to declare PCM controls that need to be linked to PCM character device on DAI link probing. - Limitation of the patchset: This patchset seems only a first step as 2 concerns are been highlighted: - Patch is limited to "static" DAI-link. This not responds to backend (no_pcm dai links) and some none-DAI codecs, that could register PCm controls. In theses cases it is not possible to establish relationship during probe. => No solution proposed for time beeing. - This patchset does not fix conflict of 2 "identical" PCM controls declared by 2 drivers. For instance, a conflict can exist between a PCM control created in DAI driver and the same control declared in a codec driver. As index field is forced to 0, prefix should be used in codec. => To discuss solution in a separate thread as issue already present without this patchset several approaches seem possible like using index field ( control auto indexation in ASoC) or prefix in Naming. V5: - [PATCH v5 1/2] ASoC: core: allow DAI PCM controls bound to PCM device Minor fixes in comment and error message. - [PATCH v5 2/2] ASoC: sti: bind pcm controls to pcm device. No change since V2. V4: - [PATCH v4 1/2] ASoC: core: allow DAI PCM controls bound to PCM device Fix and rework error management in soc_link_dai_pcm_controls function. - [PATCH v4 2/2] ASoC: sti: bind pcm controls to pcm device. No change since V2. V3: - [PATCH v3 1/2] ASoC: core: allow DAI PCM controls bound to PCM device Code optimization based on Takashi Sakamoto suggestion - [RFC V2 3/3] ASoC: hdmi-codec: Example of PCM control bound to PCM device for multi patch suppressed as it was send as example in previous version. Patch is valid but can have impact on existing drivers as control device field value is updated - [PATCH v3 2/2] ASoC: sti: bind pcm controls to pcm device. No change vs V2 V2: http://www.spinics.net/lists/alsa-devel/msg57045.html Aim of this version is to continue discussion on DAI PCM control focused on ASoC drivers. In this V2 implementation in Soc-core is simplified to limit impact on existing code. Update of the RFC V1 based on discussions: - [RFC 4/4] iecset: allow to select control with device and sub-device numbers no more part of the RFC V2, will be discussed in a separate thread - [RFC 2/4] ALSA: control: increment index field for duplicated control. no more part of the RFC V2, no more need as RFC subject is PCM controls - [RFC V2 1/3] ASoC: core: allow DAI PCM controls bound to PCM device Patch reworked from V1 to simplify implementation - Binding is not done for Dai links tagged with no_pcm (DPCM). - no more possibility to add the controls after the DAI link probing. - [RFC V2 2/3] ASoC: sti: bind PCM controls to PCM device. - [RFC V2 3/3] ASoC: hdmi-codec: Example of PCM control bound to PCM device for multi Example of implementation in STI DAI driver and HDMI-codec drivers V1: http://www.spinics.net/lists/alsa-devel/msg56479.html 1) Alsa-utils patch - iecset: allow to select control with device and sub-device numbers This patch allows to access to 2 iec controls differentiated by device/sub-devices numbers => For me, this patch is mandatory to be able to address the ASoC IEC controls, in case of no fix is implemented to allows index field update in ASoC. 2) Alsa driver patches - ASoC: core: allow PCM control binding to PCM device Add relationship between DAIs PCM controls and PCM device. - ALSA: control: increment index field for duplicated control. Generic implementation of the patch proposed in HDA driver (http://git.kernel.org/cgit/linux/kernel/git/tiwai/sound.git/commit/?id=ea9b…) - ASoC: sti: use bind_pcm_ctl implementation of bind_pcm_ctl for sti driver. Arnaud Pouliquen (2): ASoC: core: allow DAI PCM controls bound to PCM device ASoC: sti: bind pcm controls to pcm device. include/sound/soc-dai.h | 8 ++++++++ sound/soc/soc-core.c | 35 +++++++++++++++++++++++++++++++++++ sound/soc/sti/sti_uniperif.c | 33 ++++----------------------------- 3 files changed, 47 insertions(+), 29 deletions(-) -- 1.9.1

2 4

[alsa-devel] [PATCH 0/2] Generic HDMI codec: Add channel mapping control
by Arnaud Pouliquen 20 Jan '17

20 Jan '17

Aim of this patch is to add 'Playback Channel Map' control to export audio capabilities in term of HDMI sink speakers allocation. This patch follow discussion initiates here: [RFC] ASOC: HDMI audio info frame speaker allocation http://www.spinics.net/lists/alsa-devel/msg57363.html The code is fully inspired from HDA driver. On hw_param, HDMI sink speaker capabilities are exported via TLV ops and a CEA allocation is choson, based on ELD information and the number of channels requested by user. Mains differences with HDA implementation are: - Control is read only - Channel swap is not supported. Consequence is that unused channel in the mid of CEA audio infoframe channel mapping are considered as active. example for channel allocation 0x02: FL, FR, 0, FC) This configuration is only available for a 4 channels stream. - Channel allocation table has been reordered and HDMI 2.0 is not supported. Arnaud Pouliquen (2): DRM: add help to get ELD speaker allocation ASoC: hdmi-codec: add channel mapping control include/drm/drm_edid.h | 13 ++ sound/soc/codecs/hdmi-codec.c | 346 +++++++++++++++++++++++++++++++++++++++++- 2 files changed, 358 insertions(+), 1 deletion(-) -- 1.9.1

4 20

[alsa-devel] [PATCH v2 0/4] Generic HDMI codec: Add channel mapping control
by Arnaud Pouliquen 20 Jan '17

20 Jan '17

Aim of this patch is to add 'Playback Channel Map' control to export audio capabilities in term of HDMI sink speakers allocation. V2: In this version I use chmap helper functions from pcm_lib.c. It is quite tricky to use it from ASoC due to the relation chip of the controls with the pcm runtime. After several tries, my conclusion is that it must be handled in ASoC DAI driver. Main reason is that the DAI driver can not provide snd_pcm_chmap struct through kcontrol structure. But this induces that soc-core provides pcm runtime structure to DAI driver during probe. Base on this conclusion. I reworked my patches by adding 2 new patches in patch-set 1) ALSA pcm: allow non constant snd_pcm_chmap_elem This patch allows to handle non constant channel mapping. As ELD information can change during runtime it is mandatory to properly handle the feature. In term of compatibility with legacy it should be straightforward, as update just consists in suppressing the 'const' constraint. 2) ASoC: core: add optional pcm_new callback for DAI driver This is the only way i found to be able to use snd_pcm_add_chmap_ctls and associated controls helper functions. From my point of view, this is the more simple way to add relationship between DAI and associated pcm devices. Notice that this patch, if accepted, makes the following one obsolete, as it also answer to the associated topic: [PATCH v5 0/2] ALSA controls management using index/device/sub-devices fields (http://www.spinics.net/lists/alsa-devel/msg57639.html). If you estimate that this it not reasonable i will come back to my first version. V1: This patch follow discussion initiates here: [RFC] ASOC: HDMI audio info frame speaker allocation http://www.spinics.net/lists/alsa-devel/msg57363.html The code is fully inspired from HDA driver. On hw_param, HDMI sink speaker capabilities are exported via TLV ops and a CEA allocation is choson, based on ELD information and the number of channels requested by user. Mains differences with HDA implementation are: - Control is read only - Channel swap is not supported. Consequence is that unused channel in the mid of CEA audio infoframe channel mapping are considered as active. example for channel allocation 0x02: FL, FR, 0, FC) This configuration is only available for a 4 channels stream. - Channel allocation table has been reordered and HDMI 2.0 is not supported. Arnaud Pouliquen (4): DRM: add help to get ELD speaker allocation ALSA pcm: allow non constant snd_pcm_chmap_elem ASoC: core: add optional pcm_new callback for DAI driver ASoC: hdmi-codec: add channel mapping control include/drm/drm_edid.h | 13 ++ include/sound/pcm.h | 4 +- include/sound/soc-dai.h | 3 + sound/core/pcm_lib.c | 6 +- sound/soc/codecs/hdmi-codec.c | 310 +++++++++++++++++++++++++++++++++++++++++- sound/soc/soc-core.c | 28 ++++ 6 files changed, 358 insertions(+), 6 deletions(-) -- 1.9.1

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[alsa-devel] Intel HDA audio on EEE PC 1101HGo
by Enrico Mioso 20 Jan '17

20 Jan '17

Hello guys. I am writing to you all to talk you about a strange behaviour of the Intel HDA Audio device on an EEE PC 1101H. The audio device at some point simply doesn't react to commands, giving in dmesgo utput like this: [22321.638079] snd_hda_intel 0000:00:1b.0: azx_get_response timeout, switching to polling mode: last cmd=0x00170503 [22322.641410] snd_hda_intel 0000:00:1b.0: azx_get_response timeout, switching to single_cmd mode: last cmd=0x00170503 This may happen when I boot the system up fresh (here there is no Windows and no hibernation), or when the controller goes to power-save. If I don't set a power save timeout, then the controller will not be recoverable if it gets stuck at boot. As a workaround, I set a very short timeout, so that when the controller fails to start audio, waiting some time and retrying will work. Preliminary infos: Card: HDA Intel MID Chip: Realtek ALC269; Thank you in advance for your help. Please keep me in CC - since I am not subscribed to any list. Enrico Here follows a lspci 00:00.0 Host bridge: Intel Corporation System Controller Hub (SCH Poulsbo) (rev 07) Subsystem: ASUSTeK Computer Inc. Device 83ce Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 00:02.0 VGA compatible controller: Intel Corporation System Controller Hub (SCH Poulsbo) Graphics Controller (rev 07) (prog-if 00 [VGA controller]) Subsystem: ASUSTeK Computer Inc. Device 83ce Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 5 Region 0: Memory at f3f80000 (32-bit, non-prefetchable) [size=512K] Region 1: I/O ports at c880 [size=8] Region 2: Memory at d0000000 (32-bit, non-prefetchable) [size=256M] Region 3: Memory at f3f40000 (32-bit, non-prefetchable) [size=256K] Expansion ROM at <unassigned> [disabled] Capabilities: [d0] Power Management version 2 Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [b0] Vendor Specific Information: Len=07 <?> Capabilities: [90] MSI: Enable- Count=1/1 Maskable- 64bit- Address: 00000000 Data: 0000 Kernel modules: gma500_gfx 00:1b.0 Audio device: Intel Corporation System Controller Hub (SCH Poulsbo) HD Audio Controller (rev 07) Subsystem: ASUSTeK Computer Inc. Device 83ce Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Interrupt: pin A routed to IRQ 23 Region 0: Memory at f3f38000 (64-bit, non-prefetchable) [size=16K] Capabilities: [50] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold-) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [70] Express (v1) Root Complex Integrated Endpoint, MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0 ExtTag- RBE- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend+ Capabilities: [100 v1] Virtual Channel Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 Arb: Fixed- WRR32- WRR64- WRR128- Ctrl: ArbSelect=Fixed Status: InProgress- VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256- Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01 Status: NegoPending- InProgress- VC1: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256- Ctrl: Enable- ID=0 ArbSelect=Fixed TC/VC=00 Status: NegoPending- InProgress- Capabilities: [130 v1] Root Complex Link Desc: PortNumber=0f ComponentID=00 EltType=Config Link0: Desc: TargetPort=00 TargetComponent=00 AssocRCRB- LinkType=MemMapped LinkValid+ Addr: 00000000f0000000 Kernel driver in use: snd_hda_intel Kernel modules: snd_hda_intel 00:1c.0 PCI bridge: Intel Corporation System Controller Hub (SCH Poulsbo) PCI Express Port 1 (rev 07) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Interrupt: pin A routed to IRQ 16 Bus: primary=00, secondary=03, subordinate=03, sec-latency=0 I/O behind bridge: 0000e000-0000efff Memory behind bridge: fbf00000-fbffffff Prefetchable memory behind bridge: 80000000-801fffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0 ExtTag- RBE+ DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #1, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <256ns, L1 <4us ClockPM+ Surprise- LLActRep+ BwNot- ASPMOptComp- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk+ ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+ Slot #0, PowerLimit 0.000W; Interlock- NoCompl- SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- Changed: MRL- PresDet+ LinkState+ RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- Capabilities: [90] Subsystem: ASUSTeK Computer Inc. Device 83ce Capabilities: [a0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: pcieport Kernel modules: shpchp 00:1c.1 PCI bridge: Intel Corporation System Controller Hub (SCH Poulsbo) PCI Express Port 2 (rev 07) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Interrupt: pin B routed to IRQ 17 Bus: primary=00, secondary=01, subordinate=02, sec-latency=0 I/O behind bridge: 0000d000-0000dfff Memory behind bridge: f4000000-fbefffff Prefetchable memory behind bridge: cc000000-cfffffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0 ExtTag- RBE+ DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #2, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <256ns, L1 <4us ClockPM+ Surprise- LLActRep+ BwNot- ASPMOptComp- LnkCtl: ASPM L1 Enabled; RCB 64 bytes Disabled- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+ Slot #0, PowerLimit 0.000W; Interlock- NoCompl- SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- Changed: MRL- PresDet+ LinkState+ RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- Capabilities: [90] Subsystem: ASUSTeK Computer Inc. Device 83ce Capabilities: [a0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: pcieport Kernel modules: shpchp 00:1d.0 USB controller: Intel Corporation System Controller Hub (SCH Poulsbo) USB UHCI #1 (rev 07) (prog-if 00 [UHCI]) Subsystem: ASUSTeK Computer Inc. Device 83ce Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 20 Region 4: I/O ports at b880 [size=32] Kernel driver in use: uhci_hcd Kernel modules: uhci_hcd 00:1d.1 USB controller: Intel Corporation System Controller Hub (SCH Poulsbo) USB UHCI #2 (rev 07) (prog-if 00 [UHCI]) Subsystem: ASUSTeK Computer Inc. Device 83ce Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin B routed to IRQ 21 Region 4: I/O ports at c080 [size=32] Kernel driver in use: uhci_hcd Kernel modules: uhci_hcd 00:1d.2 USB controller: Intel Corporation System Controller Hub (SCH Poulsbo) USB UHCI #3 (rev 07) (prog-if 00 [UHCI]) Subsystem: ASUSTeK Computer Inc. Device 83ce Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin C routed to IRQ 18 Region 4: I/O ports at c480 [size=32] Kernel driver in use: uhci_hcd Kernel modules: uhci_hcd 00:1d.7 USB controller: Intel Corporation System Controller Hub (SCH Poulsbo) USB EHCI #1 (rev 07) (prog-if 20 [EHCI]) Subsystem: ASUSTeK Computer Inc. Device 83ce Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin D routed to IRQ 19 Region 0: Memory at f3f37c00 (32-bit, non-prefetchable) [size=1K] Capabilities: [50] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [58] Debug port: BAR=1 offset=00a0 Kernel driver in use: ehci-pci Kernel modules: ehci_pci 00:1f.0 ISA bridge: Intel Corporation System Controller Hub (SCH Poulsbo) LPC Bridge (rev 07) Subsystem: ASUSTeK Computer Inc. Device 83ce Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Kernel driver in use: lpc_sch Kernel modules: lpc_sch 00:1f.1 IDE interface: Intel Corporation System Controller Hub (SCH Poulsbo) IDE Controller (rev 07) (prog-if 80 [Master]) Subsystem: ASUSTeK Computer Inc. Device 83ce Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Region 0: [virtual] Memory at 000001f0 (32-bit, non-prefetchable) [size=8] Region 1: [virtual] Memory at 000003f0 (type 3, non-prefetchable) Region 2: [virtual] Memory at 00000170 (32-bit, non-prefetchable) [size=8] Region 3: [virtual] Memory at 00000370 (type 3, non-prefetchable) Region 4: I/O ports at ffa0 [size=16] Kernel driver in use: pata_sch Kernel modules: pata_sch, pata_acpi, ata_generic 01:00.0 Network controller: Qualcomm Atheros AR9285 Wireless Network Adapter (PCI-Express) (rev 01) Subsystem: AzureWave AW-NE785 / AW-NE785H 802.11bgn Wireless Full or Half-size Mini PCIe Card Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Interrupt: pin A routed to IRQ 17 Region 0: Memory at fbef0000 (64-bit, non-prefetchable) [size=64K] Capabilities: [40] Power Management version 3 Flags: PMEClk- DSI- D1+ D2- AuxCurrent=375mA PME(D0+,D1+,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit- Address: 00000000 Data: 0pcilib: sysfs_read_vpd: read failed: Connection timed out 000 Capabilities: [60] Express (v2) Legacy Endpoint, MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <512ns, L1 <64us ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 512 bytes DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr+ TransPend- LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <512ns, L1 <64us ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp- LnkCtl: ASPM L1 Enabled; RCB 64 bytes Disabled- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR-, OBFF Not Supported DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis- Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS- Compliance De-emphasis: -6dB LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1- EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest- Capabilities: [100 v1] Advanced Error Reporting UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol- CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+ CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+ AERCap: First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn- Capabilities: [140 v1] Virtual Channel Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 Arb: Fixed- WRR32- WRR64- WRR128- Ctrl: ArbSelect=Fixed Status: InProgress- VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256- Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01 Status: NegoPending- InProgress- Capabilities: [160 v1] Device Serial Number 00-00-00-00-00-00-00-00 Capabilities: [170 v1] Power Budgeting <?> Kernel driver in use: ath9k Kernel modules: ath9k 03:00.0 Ethernet controller: Qualcomm Atheros AR8132 Fast Ethernet (rev c0) Subsystem: ASUSTeK Computer Inc. Device 14e5 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Interrupt: pin A routed to IRQ 24 Region 0: Memory at fbfc0000 (64-bit, non-prefetchable) [size=256K] Region 2: I/O ports at e880 [size=128] Capabilities: [40] Power Management version 3 Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME- Capabilities: [48] MSI: Enable+ Count=1/1 Maskable- 64bit+ Address: 00000000fee0300c Data: 4122 Capabilities: [58] Express (v1) Endpoint, MSI 00 DevCap: MaxPayload 4096 bytes, PhantFunc 0, Latency L0s <4us, L1 unlimited ExtTag- AttnBtn+ AttnInd+ PwrInd+ RBE+ FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 512 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s unlimited, L1 unlimited ClockPM+ Surprise- LLActRep- BwNot- ASPMOptComp- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- Capabilities: [6c] Vital Product Data Not readable Capabilities: [100 v1] Advanced Error Reporting UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq+ ACSViol- UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- UESvrt: DLP- SDES+ TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol- CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr- CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+ AERCap: First Error Pointer: 14, GenCap+ CGenEn- ChkCap+ ChkEn- Capabilities: [180 v1] Device Serial Number ff-25-f6-3a-90-e6-ba-ff Kernel driver in use: atl1c Kernel modules: atl1c

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[alsa-devel] ASoC: fsl_sai: Has anybody attempted to run the i.MX6UL in TDM mode with channels > 2?
by Caleb Crome 19 Jan '17

19 Jan '17

Hi all, Now that the MX6 fsl_ssi seems to be getting stable for TDM with channels > 2 (thanks all!), the MX6 UL and MX7 have only the SAI port. Does anybody have experience with running the SAI with more than 2 channels? Any thoughts or comments would be welcome! Thanks, -Caleb

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[alsa-devel] [PATCH 00/12] ASoC: Intel: Skylake: Driver updates
by jeeja.kp＠intel.com 19 Jan '17

19 Jan '17

From: Jeeja KP <jeeja.kp(a)intel.com> This patch series includes driver updates for the handling scenarios during System S0/S3 transitions when audio stream is stopped during system. o move DMA configuration in DSP Gateway Module widget event handler to ensure DMA is configured after resume. o Enable SSP MLCK using Supply widget. This will ensure the MCLK is enabled when the widget is power on. o Check DMA decouple register state before coupling/decoupling the DMA. o In case of HDMI pass-through pipe, reset only the FE Pipe when stream in in XRUN state. o Resume the stream from HW renderer position. o HDMI Codec pin and converter state need to be restored when stream is resumed. Jeeja KP (12): ASoC: Intel: Skylake: Add helper function to setup host/link dma ASoC: Intel: Skylake: Configure DMA in PRE_PMD handler of Mixer ASoC: Intel: Skylake: Removed unused skl_get_format() ALSA: hda: check stream decoupled register state ASoC: Intel: Skylake: Add set_tristate DAI ops to enable SSP MCLK ASoC: Intel: Skylake: Remove unused SSP BE prepare DAI ops ASoC: Intel: Skylake: Add supply widget as non DSP widget ASoC: Intel: Skylake: Add supply widget in skl_nau_max machine ASoC: Intel: Skylake: Add supply widget in bxt_da_max machine ASoC: Intel: Skylake: Don't reset pass-through pipe in BE prepare ASoC: Intel: Skylake: set the resume point to LPIB ASoC: hdac_hdmi: Enable pin and converter in prepare sound/hda/ext/hdac_ext_stream.c | 15 +- sound/soc/codecs/hdac_hdmi.c | 28 ++-- sound/soc/intel/boards/bxt_da7219_max98357a.c | 34 ++++ sound/soc/intel/boards/skl_nau88l25_max98357a.c | 34 ++++ sound/soc/intel/skylake/skl-pcm.c | 210 +++++++++++++----------- sound/soc/intel/skylake/skl-topology.c | 27 ++- sound/soc/intel/skylake/skl-topology.h | 6 + 7 files changed, 240 insertions(+), 114 deletions(-) -- 2.5.0

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[alsa-devel] [PATCH v2 0/3] ucm: Add support for component devices
by mengdong.lin＠linux.intel.com 18 Jan '17

18 Jan '17

From: Mengdong Lin <mengdong.lin(a)linux.intel.com> Sound cards are defined by machines. And off-soc codecs and DSPs embedded in DSP can be taken as the components and resued by different machines/ sound cards. This series allows codec and SOC vendors to install UCM configuration files for a specific codec or DSP, and sound card verb files can include these conf files of components. Component devices will not be exposed to applications for backward compatibility. So audio servers like PulseAudio and CRAS still only see the machine devices. History: v2: Use an array to define component directories. Document syntax to enable/disable a component device. Hide cdev defined by the parent device in ucm manager for executing a component sequence. Mengdong Lin (3): ucm: Skip component directories when scanning sound card configuration files ucm: Parse sequence of component devices ucm: Execute sequence of component devices src/ucm/main.c | 88 +++++++++++++++++++++++++++++- src/ucm/parser.c | 154 +++++++++++++++++++++++++++++++++++++++++++++++++++- src/ucm/ucm_local.h | 19 +++++++ src/ucm/utils.c | 1 + 4 files changed, 259 insertions(+), 3 deletions(-) -- 2.7.4

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[alsa-devel] [RFC PATCH 0/2] ASoC: Use DMI name in sound card long name
by mengdong.lin＠linux.intel.com 17 Jan '17

17 Jan '17

From: Mengdong Lin <mengdong.lin(a)linux.intel.com> This series is based on Liam's idea to use DMI name as the sound card short name in the audio workshop. After testing on serveral machines, we changed the design a little: - Not change the card name (short name), keep it simple. So the card ID won't change as well. - Use short name and DMI name together to make a readable and unqique long name. Machine drivers can use a new API to get this feature. We hope to get aligned on the kernel side at first, then we'll update UCM code in alsa-lib: when the sound server ask UCM to open a sound card, UCM will try to find the best configuration file that matches the card long name, and only if not avaiable, fallback to the default configuration file that matches the card name (short name). Liam Girdwood (1): ASoC: core: Add API to use DMI name in sound card long name Mengdong Lin (1): ASoC: Intel: Use DMI name for sound card long name in Broadwell machine driver include/sound/soc.h | 5 ++ sound/soc/intel/boards/broadwell.c | 2 + sound/soc/soc-core.c | 134 +++++++++++++++++++++++++++++++++++++ 3 files changed, 141 insertions(+) -- 2.5.0

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Re: [alsa-devel] [PATCH 2/2] ASoC: cx2072x Add driver for CX2072X CODEC
by Mark Brown 11 Jan '17

11 Jan '17

On Sat, Dec 17, 2016 at 03:52:33PM +0800, simon.ho.cnxt(a)gmail.com wrote: > +/*FIXME: need to move the default settings to device tree*/ No, we'd expect things to be configured from userspace via a binary control. > +static unsigned char cx2072x_eq_coeff_array[MAX_EQ_BAND][MAC_EQ_COEFF] = { > + {0x77, 0x26, 0x13, 0xb3, 0x76, 0x26, 0x0a, 0x3d, 0xd4, 0xe2, 0x04}, > + {0x97, 0x3e, 0xb3, 0x86, 0xc2, 0x3b, 0x4d, 0x79, 0xa7, 0xc5, 0x03}, > + {0x0f, 0x39, 0x76, 0xa3, 0x1b, 0x2b, 0x89, 0x5c, 0xd7, 0xdb, 0x03}, > + {0x21, 0x46, 0xfe, 0xa6, 0xec, 0x24, 0x01, 0x59, 0xf4, 0xd4, 0x03}, > + {0xe9, 0x78, 0x9c, 0xb0, 0x8a, 0x56, 0x64, 0x4f, 0x8d, 0xb0, 0x02}, > + {0x60, 0x6e, 0x57, 0xee, 0xec, 0x18, 0xa8, 0x11, 0xb5, 0xf8, 0x02}, > + {0x5a, 0x14, 0x68, 0xe9, 0x1d, 0x06, 0xb9, 0x5f, 0x68, 0xdc, 0x03}, > +}; > + > +static unsigned char cx2072x_drc_array[MAX_DRC_REGS] = { > + 0x65, 0x55, 0x3C, 0x01, 0x05, 0x39, 0x76, 0x1A, 0x00 > +}; Just use the chip defaults, this avoids any confusion or debate about the values in the kernel. > +#define get_cx2072x_priv(_codec_) \ > + ((struct cx2072x_priv *) snd_soc_codec_get_drvdata(_codec_)) There is no need to cast void pointers, this will at most hide actual errors, and there's no real need for the macro at all really. > + { 36864000, 7 },/* Don't use div 7*/ Does something enforce that? Also coding style, missing space. > +static const struct reg_default cx2072x_reg_defaults[] = { > + { 0x0414, 0x00000003 }, /*2072X_AFG_POWER_STATE */ We have defines for the register names which are helpfully commented here, why not just actually use the defines? > + if (reg == CX2072X_UM_INTERRUPT_CRTL_E) { > + /* Update the MSB byte only */ > + reg += 3; > + size = 1; > + value >>= 24; > + } Use a switch here in case you find any more magic registers. > + ret = i2c_master_send(client, buf, size + 2); > + if (ret == size + 2) { > + ret = 0; > + } else if (ret < 0) { > + dev_err(dev, > + "I2C write address failed\n"); Please print the error code, it makes life easier for people looking at logs with errors. > +static unsigned int get_div_from_mclk(unsigned int mclk) > +{ > + unsigned int div = 8; > + int i = 0; > + > + for (i = 0; i < ARRAY_SIZE(MCLK_PRE_DIV); i++) { > + if (mclk <= MCLK_PRE_DIV[i].mclk) { > + div = MCLK_PRE_DIV[i].div; > + break; > + } > + } > + return div; > +} Why is this function in the middle of all the register I/O functions? > +static int cx2072x_config_headset_det(struct cx2072x_priv *cx2072x) > +{ > + const int interrupt_gpio_pin = 1; > + > + dev_dbg(cx2072x->dev, > + "Configure interrupt pin: %d\n", interrupt_gpio_pin); > + /*No-sticky input type*/ Coding style. There's *lots* of really obvious and bad coding style problems throughout the driver, this is really not good - as well as making things harder to read poor coding style is normally a good indicator that there are other problems. > + /* support both nokia and apple headset set. Monitor time = 275 ms*/ > + regmap_write(cx2072x->regmap, CX2072X_DIGITAL_TEST15, 0x73); > + > + /* Disable TIP detection*/ > + regmap_write(cx2072x->regmap, CX2072X_ANALOG_TEST12, 0x300); > + > + /* Switch MusicD3Live pin to GPIO */ > + regmap_write(cx2072x->regmap, CX2072X_DIGITAL_TEST1, 0); These look awfully like they should be configured by the system integrator via DT. > + regmap_write(cx2072x->regmap, CX2072X_ANALOG_TEST8, > + (unsigned char)int_div & 0xffff); This cast is worrying, why is it needed? > + > + /* clock inversion */ > + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { > + case SND_SOC_DAIFMT_NB_NF: > + is_frame_inv = is_i2s ? 1 : 0; > + is_bclk_inv = is_i2s ? 1 : 0; Please don't abuse the ternery operator like this, write normal logic statements with straightforward assignments. Readers will thank you. > + regmap_write(cx2072x->regmap, CX2072X_I2SPCM_CONTROL1, reg1.ulVal); Please don't use Hungarian notation. > + /*Enables bclk and EAPD pin*/ > + if (cx2072x->rev_id == CX2072X_REV_A2) > + regmap_update_bits(cx2072x->regmap, CX2072X_DIGITAL_BIOS_TEST2, > + 0x84, 0xFF); > + else > + regmap_write(cx2072x->regmap, CX2072X_DIGITAL_BIOS_TEST2, > + regDBT2.ulVal); Again, switch statement. > +static int portg_power_ev(struct snd_soc_dapm_widget *w, > + struct snd_kcontrol *kcontrol, int event) > +{ > + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); > + > + switch (event) { > + case SND_SOC_DAPM_POST_PMU: > + cx2072x_update_dsp(codec); > + break; > + default: > + break; > + } > + return 0; > +} > +static int cx2072x_plbk_dsp_info(struct snd_kcontrol *kcontrol, Blank lines between functions. > + mutex_lock(&cx2072x->eq_coeff_lock); > + memcpy(cache, param, CX2072X_PLBK_EQ_COEF_LEN); > + cx2072x->plbk_dsp_changed = true; Shouldn't this involve a memcmp() to check if the new value is different? > +static const struct snd_kcontrol_new cx2072x_snd_controls[] = { > + > + SOC_DOUBLE_R_TLV("PortD Boost", CX2072X_PORTD_GAIN_LEFT, > + CX2072X_PORTD_GAIN_RIGHT, 0, 3, 0, boost_tlv), All volume controls should end in Volume so userspace knows how to handle them. Also please use normal kernel indentation for the continuation lines. > + SOC_DOUBLE_R("DAC1 Mute", CX2072X_DAC1_AMP_GAIN_LEFT, > + CX2072X_DAC1_AMP_GAIN_RIGHT, 7, 1, 0), All boolean controls should end in Switch so userspace knows how to handle them. > + CX2072X_PLBK_EQ_COEF("DACL EQ 0", 0, 0), > + CX2072X_PLBK_EQ_COEF("DACL EQ 1", 0, 1), > + CX2072X_PLBK_EQ_COEF("DACL EQ 2", 0, 2), > + CX2072X_PLBK_EQ_COEF("DACL EQ 3", 0, 3), > + CX2072X_PLBK_EQ_COEF("DACL EQ 4", 0, 4), > + CX2072X_PLBK_EQ_COEF("DACL EQ 5", 0, 5), > + CX2072X_PLBK_EQ_COEF("DACL EQ 6", 0, 6), > + CX2072X_PLBK_EQ_COEF("DACR EQ 0", 1, 0), > + CX2072X_PLBK_EQ_COEF("DACR EQ 1", 1, 1), > + CX2072X_PLBK_EQ_COEF("DACR EQ 2", 1, 2), > + CX2072X_PLBK_EQ_COEF("DACR EQ 3", 1, 3), > + CX2072X_PLBK_EQ_COEF("DACR EQ 4", 1, 4), > + CX2072X_PLBK_EQ_COEF("DACR EQ 5", 1, 5), > + CX2072X_PLBK_EQ_COEF("DACR EQ 6", 1, 6), This looks like it should be two binary controls, one per EQ. > +int cx2072x_hs_jack_report(struct snd_soc_codec *codec) > +{ > +} > +EXPORT_SYMBOL_GPL(cx2072x_hs_jack_report); We have a standard jack detection interface in the kernel, the driver should be using it rather than writing its own. > +static int cx2072x_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, > + unsigned int rx_mask, int slots, int slot_width) > +{ > + struct snd_soc_codec *codec = dai->codec; > + struct cx2072x_priv *cx2072x = snd_soc_codec_get_drvdata(codec); > + > + if (slots == 0) > + goto out; > + > + > + switch (rx_mask) { > + case 1 ... 0xf: > + default: > + return -EINVAL; > + } So all possible values are invalid? That doesn't seemw right... > + switch (clk_id) { > + case CX2072X_MCLK_EXTERNAL_PLL: > + if (cx2072x->mclk && clk_set_rate(cx2072x->mclk, freq)) > + return -EINVAL; Please write sensible error handling, log what went wrong if you get an error and pass back error codes you get from other APIs. This will make it a lot easier for users to figure out what's happened. > +#define CX2072X_DAPM_SUPPLY_S(wname, wsubseq, wreg, wshift, wmask, won_val, \ > + woff_val, wevent, wflags) \ > + {.id = snd_soc_dapm_supply, .name = wname, .kcontrol_news = NULL, \ > + .num_kcontrols = 0, .reg = wreg, .shift = wshift, .mask = wmask, \ > + .on_val = won_val, .off_val = woff_val, \ > + .subseq = wsubseq, .event = wevent, .event_flags = wflags} There appears to be nothing device specific in here, why is this not being added as a generic supply type? > +static void cx2072x_sw_reset(struct cx2072x_priv *cx2072x) > +{ > + > + regmap_write(cx2072x->regmap, CX2072X_AFG_FUNCTION_RESET, 0x01); Coding style, random blank line hre. > + /* reduce the jack monitor time*/ > + regmap_update_bits(cx2072x->regmap, CX2072X_DIGITAL_TEST15, > + 0x00, 0x06); Coding style, please intent contiuation lines... > + cx2072x_config_headset_det(cx2072x); > + /* configre PortC as input device */ > + regmap_update_bits(cx2072x->regmap, CX2072X_PORTC_PIN_CTRL, > + 0x20, 0x20); ...this isn't even consistent with the rest of the same function :( > + switch (level) { > + case SND_SOC_BIAS_ON: > + /* Enable Headset Mic Bias */ > + if (cx2072x->is_biason == 0) > + cx2072x->is_biason = 1; > + break; This looks worrying but since nothing else uses that driver data I'm guessing it doesn't actually do anything. > + case SND_SOC_BIAS_PREPARE: > + if (old_level == SND_SOC_BIAS_STANDBY) { > + if (cx2072x->mclk) { > + dev_dbg(cx2072x->dev, "Turn on MCLK\n"); > + ret = clk_prepare_enable(cx2072x->mclk); > + if (ret) > + return ret; > + } > + } > + break; > + case SND_SOC_BIAS_STANDBY: > + > + if (old_level == SND_SOC_BIAS_OFF) { > + if (cx2072x->mclk) { > + dev_dbg(cx2072x->dev, "Turn on MCLK\n"); > + ret = clk_prepare_enable(cx2072x->mclk); > + if (ret) > + return ret; > + } So we enable MCLK both when coming out of _OFF and when coming out of _STANDBY? Why (and note that we're missing some disables here... > + regmap_read(cx2072x->regmap, CX2072X_VENDOR_ID, &ven_id); > + regmap_read(cx2072x->regmap, CX2072X_REVISION_ID, &cx2072x->rev_id); > + dev_dbg(codec->dev, "codec version: %08x,%08x\n", > + ven_id, cx2072x->rev_id); Log this at info level. > +#ifdef CONFIG_PM > +static int cx2072x_runtime_suspend(struct device *dev) > +{ > + struct cx2072x_priv *cx2072x = dev_get_drvdata(dev); > + > + cx2072x_set_bias_level(cx2072x->codec, SND_SOC_BIAS_OFF); Let the framework take care of managing bias level for you. > +static bool cx2072x_readable_register(struct device *dev, unsigned int reg) > +{ > + switch (reg) { Why is this nowhere near the rest of the regmap code? > +static int cx2072x_i2c_probe(struct i2c_client *i2c, > + const struct i2c_device_id *id) > +{ > + int ret = -1; > + struct cx2072x_priv *cx2072x; > + > + cx2072x = (struct cx2072x_priv *)devm_kzalloc( > + &i2c->dev, sizeof(struct cx2072x_priv), GFP_KERNEL); No need to cast away from void. > + if (cx2072x == NULL) { > + dev_err(&i2c->dev, "Out of memory!\n"); kzalloc() will already be very noisy if this happens. > +static const struct i2c_device_id cx2072x_i2c_id[] = { > + { "cx20721", 0 }, > + { "cx20723", 0 }, > + { "14F10720", 0 }, > + {} > +}; > +MODULE_DEVICE_TABLE(i2c, cx2072x_i2c_id); One of those looks like an ACPI ID not an I2C ID. > + > +static const struct of_device_id cx2072x_of_match[] = { > + { .compatible = "cnxt,cx20721", }, > + { .compatible = "cnxt,cx20723", }, > + { .compatible = "cnxt,cx7601", }, > + {} Why is cx7601 not an I2C ID? > +#ifdef CONFIG_ACPI > + .acpi_match_table = ACPI_PTR(cx2072x_acpi_match), > +#endif No need for the defines here.

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[alsa-devel] [PATCH v4 0/3] support DP MST audio
by libin.yang＠intel.com 11 Jan '17

11 Jan '17

From: Libin Yang <libin.yang(a)intel.com> This patchset starts to support DP MST audio. This patchset is based on drm-tip on git://anongit.freedesktop.org/drm-tip change log: v4: refine some comments in 0001 and 0002 patches. refine the 0003 patch for the new ALSA-Configuration document Libin Yang (3): ALSA: hda - add DP mst verb support ALSA: hda - add DP MST audio support ALSA: Documentation about HDA DP MST pin init and connection Documentation/sound/hd-audio/dp-mst.rst | 17 +++ sound/pci/hda/hda_codec.c | 76 +++++++++- sound/pci/hda/hda_codec.h | 3 + sound/pci/hda/patch_hdmi.c | 245 +++++++++++++++++++++++++------- 4 files changed, 285 insertions(+), 56 deletions(-) -- 2.7.4

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[alsa-devel] [PATCH 0/6] ASoC: platform cleanup
by Kuninori Morimoto 11 Jan '17

11 Jan '17

Hi Mark, Lars-Peter These removes un-used platform feature, and move last platform feature to component. If these are OK, all platform feature goes to component. Last platform piece is platform_list on soc-core.c Kuninori Morimoto (6): ASoC: remove .delay from snd_soc_platform_driver ASoC: remove .bespoke_trigger from snd_soc_platform_driver ASoC: remove snd_soc_platform_trigger() ASoC: add for_each_component{_safe} ASoC: add Component level struct snd_compr_ops ASoC: add Component level struct snd_pcm_ops include/sound/soc.h | 23 +++-- sound/soc/soc-compress.c | 228 ++++++++++++++++++++++++++++--------------- sound/soc/soc-core.c | 14 +-- sound/soc/soc-pcm.c | 244 +++++++++++++++++++++++++++++++++-------------- 4 files changed, 339 insertions(+), 170 deletions(-) -- 1.9.1

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[alsa-devel] [PATCH 0/7] Move dell-led to drivers/platform/x86
by Michał Kępień 10 Jan '17

10 Jan '17

This patch series moves the dell-led driver from the LED subsystem to the x86 platform driver subsystem. I decided to also CC the sound subsystem contacts for the whole series as sound/pci/hda/dell_wmi_helper.c is also affected. The original motivation behind this effort was to move all code using the dell-smbios module to the x86 platform driver subsystem. While I was investigating the possibilites to do that, it quickly emerged that dell-led can and in fact should be moved to the x86 platform driver subsystem in its entirety. dell-led consists of two major parts: - the part exposing a microphone mute LED interface, introduced in db6d8cc ("dell-led: add mic mute led interface"); this interface is used by sound/pci/hda/dell_wmi_helper.c; while the original implementation used a WMI interface, it was changed to use dell-smbios in cf0d7ea ("dell-led: use dell_smbios_find_token() for finding mic DMI tokens") and 0c41a08 ("dell-led: use dell_smbios_send_request() for performing SMBIOS calls"), - the part handling an activity LED present in Dell Latitude 2100 netbooks, introduced in 72dcd8d ("leds: Add Dell Business Class Netbook LED driver"); it binds to a specific WMI GUID and then registers a LED device which is controlled using WMI (i.e. it is basically a WMI driver). Patches 1-4 clean up the microphone mute LED interface to minimize the amount of code moved around. Patch 5 moves the microphone mute LED interface to drivers/platform/x86/dell-laptop.c, effectively causing sound/pci/hda/dell_wmi_helper.c to depend on CONFIG_DELL_LAPTOP instead of CONFIG_LEDS_DELL_NETBOOKS. Patch 6 reverts dell-led to the state it was in after its initial commit 72dcd8d ("leds: Add Dell Business Class Netbook LED driver") by removing all remnants of the microphone mute LED handling code. Patch 7 moves all that is left of dell-led (i.e. the activity LED part, as originally implemented), to a new module which is placed in drivers/platform/x86/dell-wmi-led.c. This patch series is based on linux-leds/for-4.11 as the LED subsystem is affected by all patches except patch 3. If anyone reading this has access to a Dell device which has an activity LED and/or a microphone mute LED currently supported by dell-led, I would love to hear from you as I do not have the hardware needed to practically test this patch series. drivers/leds/Kconfig | 9 --- drivers/leds/Makefile | 1 - drivers/platform/x86/Kconfig | 8 +++ drivers/platform/x86/Makefile | 1 + drivers/platform/x86/dell-laptop.c | 28 ++++++++ .../dell-led.c => platform/x86/dell-wmi-led.c} | 75 +++------------------- include/linux/dell-led.h | 6 +- sound/pci/hda/dell_wmi_helper.c | 18 +++--- 8 files changed, 55 insertions(+), 91 deletions(-) rename drivers/{leds/dell-led.c => platform/x86/dell-wmi-led.c} (73%) -- 2.10.2

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[alsa-devel] [PATCH] ASoC: ak4642: Replace mdelay function to msleep
by Kuninori Morimoto 10 Jan '17

10 Jan '17

From: Harunobu Kurokawa <harunobu.kurokawa.dn(a)renesas.com> Replace mdelay to msleep to avoid busy loop on ak4642_lout_event(). Otherwise, sometimes playback doesn't work correctly when pulseaudio was used. Signed-off-by: Harunobu Kurokawa <harunobu.kurokawa.dn(a)renesas.com> --- sound/soc/codecs/ak4642.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/ak4642.c b/sound/soc/codecs/ak4642.c index 40500cd..0205ae1 100644 --- a/sound/soc/codecs/ak4642.c +++ b/sound/soc/codecs/ak4642.c @@ -186,7 +186,7 @@ static int ak4642_lout_event(struct snd_soc_dapm_widget *w, break; case SND_SOC_DAPM_POST_PMU: /* after widget power up */ /* Power save mode OFF */ - mdelay(popup_wait); + msleep(popup_wait); snd_soc_update_bits(codec, SG_SL2, LOPS, 0); break; case SND_SOC_DAPM_PRE_PMD: /* before widget power down */ -- 2.9.2

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[alsa-devel] [PATCH 1/2] ASoC: rt5645: set sel_i2s_pre_div1 to 2
by Bard Liao 09 Jan '17

09 Jan '17

The i2s clock pre-divider 1 is used for both i2s1 and sysclk. The i2s1 is usually used for the main i2s and the pre-divider will be set in hw_params function. However, if i2s2 is used, the pre-divider is not set in the hw_params function and the default value of i2s clock pre-divider 1 is too high for sysclk and DMIC usage. Fix by overriding default divider value to 2. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=95681 Tested-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Signed-off-by: Bard Liao <bardliao(a)realtek.com> --- sound/soc/codecs/rt5645.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/sound/soc/codecs/rt5645.c b/sound/soc/codecs/rt5645.c index 10c2a56..1ac96ef 100644 --- a/sound/soc/codecs/rt5645.c +++ b/sound/soc/codecs/rt5645.c @@ -3833,6 +3833,9 @@ static int rt5645_i2c_probe(struct i2c_client *i2c, } } + regmap_update_bits(rt5645->regmap, RT5645_ADDA_CLK1, + RT5645_I2S_PD1_MASK, RT5645_I2S_PD1_2); + if (rt5645->pdata.jd_invert) { regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2, RT5645_JD_1_1_MASK, RT5645_JD_1_1_INV); -- 1.8.1.1.439.g50a6b54

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[alsa-devel] [PATCH 1/2] ASoC: dwc: Add record capability in PIO mode
by Jose Abreu 09 Jan '17

09 Jan '17

Up until now PIO mode offered only playback support. With this patch we add support for record mode. The PCM was refactored so that we could reuse the existing infrastructure without many changes. We have support for 16 and 32 bits of sample size using only 2 channels. Tested in a x86_64 platform and in ARC AXS101 SDP platform. Signed-off-by: Jose Abreu <joabreu(a)synopsys.com> Cc: Carlos Palminha <palminha(a)synopsys.com> Cc: Liam Girdwood <lgirdwood(a)gmail.com> Cc: Mark Brown <broonie(a)kernel.org> Cc: Jaroslav Kysela <perex(a)perex.cz> Cc: Takashi Iwai <tiwai(a)suse.com> Cc: alsa-devel(a)alsa-project.org Cc: linux-kernel(a)vger.kernel.org --- sound/soc/dwc/designware_i2s.c | 9 +++- sound/soc/dwc/designware_pcm.c | 97 +++++++++++++++++++++++++++++++++--------- sound/soc/dwc/local.h | 9 +++- 3 files changed, 92 insertions(+), 23 deletions(-) diff --git a/sound/soc/dwc/designware_i2s.c b/sound/soc/dwc/designware_i2s.c index bdf8398..9c46e41 100644 --- a/sound/soc/dwc/designware_i2s.c +++ b/sound/soc/dwc/designware_i2s.c @@ -121,9 +121,14 @@ static irqreturn_t i2s_irq_handler(int irq, void *dev_id) irq_valid = true; } - /* Data available. Record mode not supported in PIO mode */ - if (isr[i] & ISR_RXDA) + /* + * Data available. Retrieve samples from FIFO + * NOTE: Only two channels supported + */ + if ((isr[i] & ISR_RXDA) && (i == 0) && dev->use_pio) { + dw_pcm_pop_rx(dev); irq_valid = true; + } /* Error Handling: TX */ if (isr[i] & ISR_TXFO) { diff --git a/sound/soc/dwc/designware_pcm.c b/sound/soc/dwc/designware_pcm.c index 4a83a22..b063c86 100644 --- a/sound/soc/dwc/designware_pcm.c +++ b/sound/soc/dwc/designware_pcm.c @@ -41,10 +41,33 @@ return tx_ptr; \ } +#define dw_pcm_rx_fn(sample_bits) \ +static unsigned int dw_pcm_rx_##sample_bits(struct dw_i2s_dev *dev, \ + struct snd_pcm_runtime *runtime, unsigned int rx_ptr, \ + bool *period_elapsed) \ +{ \ + u##sample_bits (*p)[2] = (void *)runtime->dma_area; \ + unsigned int period_pos = rx_ptr % runtime->period_size; \ + int i; \ +\ + for (i = 0; i < dev->fifo_th; i++) { \ + p[rx_ptr][0] = ioread32(dev->i2s_base + LRBR_LTHR(0)); \ + p[rx_ptr][1] = ioread32(dev->i2s_base + RRBR_RTHR(0)); \ + period_pos++; \ + if (++rx_ptr >= runtime->buffer_size) \ + rx_ptr = 0; \ + } \ + *period_elapsed = period_pos >= runtime->period_size; \ + return rx_ptr; \ +} + dw_pcm_tx_fn(16); dw_pcm_tx_fn(32); +dw_pcm_rx_fn(16); +dw_pcm_rx_fn(32); #undef dw_pcm_tx_fn +#undef dw_pcm_rx_fn static const struct snd_pcm_hardware dw_pcm_hardware = { .info = SNDRV_PCM_INFO_INTERLEAVED | @@ -68,27 +91,51 @@ .fifo_size = 16, }; -void dw_pcm_push_tx(struct dw_i2s_dev *dev) +static void dw_pcm_transfer(struct dw_i2s_dev *dev, bool push) { - struct snd_pcm_substream *tx_substream; - bool tx_active, period_elapsed; + struct snd_pcm_substream *substream; + bool active, period_elapsed; rcu_read_lock(); - tx_substream = rcu_dereference(dev->tx_substream); - tx_active = tx_substream && snd_pcm_running(tx_substream); - if (tx_active) { - unsigned int tx_ptr = READ_ONCE(dev->tx_ptr); - unsigned int new_tx_ptr = dev->tx_fn(dev, tx_substream->runtime, - tx_ptr, &period_elapsed); - cmpxchg(&dev->tx_ptr, tx_ptr, new_tx_ptr); + if (push) + substream = rcu_dereference(dev->tx_substream); + else + substream = rcu_dereference(dev->rx_substream); + active = substream && snd_pcm_running(substream); + if (active) { + unsigned int ptr; + unsigned int new_ptr; + + if (push) { + ptr = READ_ONCE(dev->tx_ptr); + new_ptr = dev->tx_fn(dev, substream->runtime, ptr, + &period_elapsed); + cmpxchg(&dev->tx_ptr, ptr, new_ptr); + } else { + ptr = READ_ONCE(dev->rx_ptr); + new_ptr = dev->rx_fn(dev, substream->runtime, ptr, + &period_elapsed); + cmpxchg(&dev->rx_ptr, ptr, new_ptr); + } if (period_elapsed) - snd_pcm_period_elapsed(tx_substream); + snd_pcm_period_elapsed(substream); } rcu_read_unlock(); } + +void dw_pcm_push_tx(struct dw_i2s_dev *dev) +{ + dw_pcm_transfer(dev, true); +} EXPORT_SYMBOL_GPL(dw_pcm_push_tx); +void dw_pcm_pop_rx(struct dw_i2s_dev *dev) +{ + dw_pcm_transfer(dev, false); +} +EXPORT_SYMBOL_GPL(dw_pcm_pop_rx); + static int dw_pcm_open(struct snd_pcm_substream *substream) { struct snd_pcm_runtime *runtime = substream->runtime; @@ -126,20 +173,17 @@ static int dw_pcm_hw_params(struct snd_pcm_substream *substream, switch (params_format(hw_params)) { case SNDRV_PCM_FORMAT_S16_LE: dev->tx_fn = dw_pcm_tx_16; + dev->rx_fn = dw_pcm_rx_16; break; case SNDRV_PCM_FORMAT_S32_LE: dev->tx_fn = dw_pcm_tx_32; + dev->rx_fn = dw_pcm_rx_32; break; default: dev_err(dev->dev, "invalid format\n"); return -EINVAL; } - if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK) { - dev_err(dev->dev, "only playback is available\n"); - return -EINVAL; - } - ret = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); if (ret < 0) @@ -163,13 +207,21 @@ static int dw_pcm_trigger(struct snd_pcm_substream *substream, int cmd) case SNDRV_PCM_TRIGGER_START: case SNDRV_PCM_TRIGGER_RESUME: case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: - WRITE_ONCE(dev->tx_ptr, 0); - rcu_assign_pointer(dev->tx_substream, substream); + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + WRITE_ONCE(dev->tx_ptr, 0); + rcu_assign_pointer(dev->tx_substream, substream); + } else { + WRITE_ONCE(dev->rx_ptr, 0); + rcu_assign_pointer(dev->rx_substream, substream); + } break; case SNDRV_PCM_TRIGGER_STOP: case SNDRV_PCM_TRIGGER_SUSPEND: case SNDRV_PCM_TRIGGER_PAUSE_PUSH: - rcu_assign_pointer(dev->tx_substream, NULL); + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + rcu_assign_pointer(dev->tx_substream, NULL); + else + rcu_assign_pointer(dev->rx_substream, NULL); break; default: ret = -EINVAL; @@ -183,7 +235,12 @@ static snd_pcm_uframes_t dw_pcm_pointer(struct snd_pcm_substream *substream) { struct snd_pcm_runtime *runtime = substream->runtime; struct dw_i2s_dev *dev = runtime->private_data; - snd_pcm_uframes_t pos = READ_ONCE(dev->tx_ptr); + snd_pcm_uframes_t pos; + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + pos = READ_ONCE(dev->tx_ptr); + else + pos = READ_ONCE(dev->rx_ptr); return pos < runtime->buffer_size ? pos : 0; } diff --git a/sound/soc/dwc/local.h b/sound/soc/dwc/local.h index 68afd75..91dc70a 100644 --- a/sound/soc/dwc/local.h +++ b/sound/soc/dwc/local.h @@ -105,20 +105,27 @@ struct dw_i2s_dev { struct i2s_clk_config_data config; int (*i2s_clk_cfg)(struct i2s_clk_config_data *config); - /* data related to PIO transfers (TX) */ + /* data related to PIO transfers */ bool use_pio; struct snd_pcm_substream __rcu *tx_substream; + struct snd_pcm_substream __rcu *rx_substream; unsigned int (*tx_fn)(struct dw_i2s_dev *dev, struct snd_pcm_runtime *runtime, unsigned int tx_ptr, bool *period_elapsed); + unsigned int (*rx_fn)(struct dw_i2s_dev *dev, + struct snd_pcm_runtime *runtime, unsigned int rx_ptr, + bool *period_elapsed); unsigned int tx_ptr; + unsigned int rx_ptr; }; #if IS_ENABLED(CONFIG_SND_DESIGNWARE_PCM) void dw_pcm_push_tx(struct dw_i2s_dev *dev); +void dw_pcm_pop_rx(struct dw_i2s_dev *dev); int dw_pcm_register(struct platform_device *pdev); #else void dw_pcm_push_tx(struct dw_i2s_dev *dev) { } +void dw_pcm_pop_rx(struct dw_i2s_dev *dev) { } int dw_pcm_register(struct platform_device *pdev) { return -EINVAL; -- 1.9.1

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[alsa-devel] [PATCH v3 0/6] ASoC: sun4i-codec: Add support for A31 Codec
by Chen-Yu Tsai 09 Jan '17

09 Jan '17

Hi everyone, This is v3 of my Allwinner A31 audio codec support series. These are the remaining driver patches not yet merged, with 1 new fix, and the dts file patches. The A31's internal codec is similar (in terms of DMA, interface and control layouts) to the one found in the A10/A13/A20 SoCs. However it has more external inputs and outputs, the mixer controls are now stereo (left/right separated), and it also has some audio processing features (not supported yet). Changes since v2: - Added patch """ASoC: sun4i-codec: Add "Right Mixer" to "Line Out Mono Diff." route""" which fixes line out when all the sources have their left channel muted. - Dropped unused codec_pa_pin from A31 hummingbird dts patch. In the past we always provided a pinmux setting for GPIOs used, to avoid accidentally muxing a pin that was already used for GPIO, or vice versa. The pinctrl subsystem now supports exclusive use of a pin for GPIO, which the sunxi platform wants to migrate to. This drops the requirement of the explicit pinmux setting for GPIOs. - Added Maxime's Acked-by for the two existing patches from v2. After these are merged I plan to submit patches to support the audio codec found in Allwinner's A23 and H3 SoCs. Regards ChenYu Chen-Yu Tsai (6): ASoC: sun4i-codec: Add support for optional reset control to quirks ASoC: sun4i-codec: Add support for A31 ADC capture path ASoC: sun4i-codec: Add "Right Mixer" to "Line Out Mono Diff." route ARM: dts: sun6i: Add audio codec device node ARM: dts: sun6i: hummingbird: Enable internal audio codec ARM: dts: sun6i: sina31s: Enable internal audio codec arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 13 ++++ arch/arm/boot/dts/sun6i-a31.dtsi | 13 ++++ arch/arm/boot/dts/sun6i-a31s-sina31s.dts | 8 +++ sound/soc/sunxi/sun4i-codec.c | 94 ++++++++++++++++++++++++++++- 4 files changed, 127 insertions(+), 1 deletion(-) -- 2.10.2

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[alsa-devel] [PATCH] ASoC: nau8825: Add Class G function options
by Ben Zhang 09 Jan '17

09 Jan '17

Add a DAPM_MUX for userspace to control the Class G function: "Switching": Use +-1.8V or +-0.9V supply, based on signal amplitude. "1.8V": Always use +-1.8V. The default is "Switching" which is the existing behavior without this patch, so no effect on current users. On some devices, the switching may cause a clicking noise at low volume. "1.8V" eliminates the noise at the expense of a few additional mW. Signed-off-by: Ben Zhang <benzh(a)chromium.org> --- sound/soc/codecs/nau8825.c | 24 +++++++++++++++++++++--- 1 file changed, 21 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/nau8825.c b/sound/soc/codecs/nau8825.c index efe3a44..ddd15a0 100644 --- a/sound/soc/codecs/nau8825.c +++ b/sound/soc/codecs/nau8825.c @@ -1062,6 +1062,10 @@ static const char * const nau8825_dac_src[] = { "DACL", "DACR", }; +static const char * const nau8825_class_g_src[] = { + "Switching", "1.8V" +}; + static SOC_ENUM_SINGLE_DECL( nau8825_dacl_enum, NAU8825_REG_DACL_CTRL, NAU8825_DACL_CH_SEL_SFT, nau8825_dac_src); @@ -1070,12 +1074,17 @@ static SOC_ENUM_SINGLE_DECL( nau8825_dacr_enum, NAU8825_REG_DACR_CTRL, NAU8825_DACR_CH_SEL_SFT, nau8825_dac_src); +static SOC_ENUM_SINGLE_DECL( + nau8825_class_g_enum, SND_SOC_NOPM, 0, nau8825_class_g_src); + static const struct snd_kcontrol_new nau8825_dacl_mux = SOC_DAPM_ENUM("DACL Source", nau8825_dacl_enum); static const struct snd_kcontrol_new nau8825_dacr_mux = SOC_DAPM_ENUM("DACR Source", nau8825_dacr_enum); +static const struct snd_kcontrol_new nau8825_class_g_mux = + SOC_DAPM_ENUM("Class G Source", nau8825_class_g_enum); static const struct snd_soc_dapm_widget nau8825_dapm_widgets[] = { SND_SOC_DAPM_AIF_OUT("AIFTX", "Capture", 0, NAU8825_REG_I2S_PCM_CTRL2, @@ -1154,9 +1163,16 @@ static const struct snd_soc_dapm_widget nau8825_dapm_widgets[] = { SND_SOC_DAPM_PGA_S("HP Boost Driver", 9, NAU8825_REG_BOOST, 9, 1, NULL, 0), - /* Class G operation control*/ - SND_SOC_DAPM_PGA_S("Class G", 10, + /* Class G operation control. "Class G" MUX options: + * "Switching": Use +-1.8V or +-0.9V supply, based on signal amplitude. + * "1.8V": Always use +-1.8V. + * The PGA_S widget is used to ensure the Class G control bit is set at + * the correct time w.r.t the other widgets. + */ + SND_SOC_DAPM_PGA_S("Class G Driver", 10, NAU8825_REG_CLASSG_CTRL, 0, 0, NULL, 0), + SND_SOC_DAPM_MUX("Class G", SND_SOC_NOPM, 0, 0, + &nau8825_class_g_mux), SND_SOC_DAPM_OUTPUT("HPOL"), SND_SOC_DAPM_OUTPUT("HPOR"), @@ -1197,7 +1213,9 @@ static const struct snd_soc_dapm_route nau8825_dapm_routes[] = { {"HPOR Pulldown", NULL, "Output DACR"}, {"HP Boost Driver", NULL, "HPOL Pulldown"}, {"HP Boost Driver", NULL, "HPOR Pulldown"}, - {"Class G", NULL, "HP Boost Driver"}, + {"Class G Driver", NULL, "HP Boost Driver"}, + {"Class G", "1.8V", "HP Boost Driver"}, + {"Class G", "Switching", "Class G Driver"}, {"HPOL", NULL, "Class G"}, {"HPOR", NULL, "Class G"}, }; -- 2.8.0.rc3.226.g39d4020

2 3

[alsa-devel] [PATCH] Revert "ASoC: core: replace aux_comp_list to component_dev_list"
by Nikita Yushchenko 09 Jan '17

09 Jan '17

This reverts commit 1a653aa44725668590b36bbe2d7fe4736a69f055 ("ASoC: core: replace aux_comp_list to component_dev_list"). That commit tries to remove card->aux_comp_list, using flagged entries in card->component_dev_list instead. However, components are added to card->component_dev_list in soc_probe_component(), which is called for aux devices by soc_probe_aux_devices(). Before that commit, it traversed card->aux_comp_list and found aux devices added by soc_bind_aux_dev(). After that commit, it traverses card->component_dev_list and finds no aux devices, because soc_probe_component() was not yet called for them. Thus all aux devices are lost and any setup that needs them no longer works. Signed-off-by: Nikita Yushchenko <nikita.yoush(a)cogentembedded.com> --- Fixed lost line in commit message ;) include/sound/soc.h | 4 +++- sound/soc/soc-core.c | 17 +++++------------ 2 files changed, 8 insertions(+), 13 deletions(-) diff --git a/include/sound/soc.h b/include/sound/soc.h index 2b502f6cc6d0..8172a512632a 100644 --- a/include/sound/soc.h +++ b/include/sound/soc.h @@ -809,10 +809,10 @@ struct snd_soc_component { unsigned int ignore_pmdown_time:1; /* pmdown_time is ignored at stop */ unsigned int registered_as_component:1; - unsigned int auxiliary:1; /* for auxiliary component of the card */ unsigned int suspended:1; /* is in suspend PM state */ struct list_head list; + struct list_head list_aux; /* for auxiliary component of the card */ struct list_head card_list; struct snd_soc_dai_driver *dai_drv; @@ -1152,6 +1152,7 @@ struct snd_soc_card { */ struct snd_soc_aux_dev *aux_dev; int num_aux_devs; + struct list_head aux_comp_list; const struct snd_kcontrol_new *controls; int num_controls; @@ -1547,6 +1548,7 @@ static inline void snd_soc_initialize_card_lists(struct snd_soc_card *card) INIT_LIST_HEAD(&card->widgets); INIT_LIST_HEAD(&card->paths); INIT_LIST_HEAD(&card->dapm_list); + INIT_LIST_HEAD(&card->aux_comp_list); INIT_LIST_HEAD(&card->component_dev_list); } diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c index f1901bb1466e..15657a65e4ca 100644 --- a/sound/soc/soc-core.c +++ b/sound/soc/soc-core.c @@ -1747,8 +1747,7 @@ static int soc_bind_aux_dev(struct snd_soc_card *card, int num) } component->init = aux_dev->init; - component->auxiliary = 1; - + list_add(&component->list_aux, &card->aux_comp_list); return 0; err_defer: @@ -1764,10 +1763,7 @@ static int soc_probe_aux_devices(struct snd_soc_card *card) for (order = SND_SOC_COMP_ORDER_FIRST; order <= SND_SOC_COMP_ORDER_LAST; order++) { - list_for_each_entry(comp, &card->component_dev_list, card_list) { - if (!comp->auxiliary) - continue; - + list_for_each_entry(comp, &card->aux_comp_list, list_aux) { if (comp->driver->probe_order == order) { ret = soc_probe_component(card, comp); if (ret < 0) { @@ -1791,14 +1787,11 @@ static void soc_remove_aux_devices(struct snd_soc_card *card) for (order = SND_SOC_COMP_ORDER_FIRST; order <= SND_SOC_COMP_ORDER_LAST; order++) { list_for_each_entry_safe(comp, _comp, - &card->component_dev_list, card_list) { - - if (!comp->auxiliary) - continue; - + &card->aux_comp_list, list_aux) { if (comp->driver->remove_order == order) { soc_remove_component(comp); - comp->auxiliary = 0; + /* remove it from the card's aux_comp_list */ + list_del(&comp->list_aux); } } } -- 2.1.4

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[alsa-devel] Alsamixer: missing Speakers entry in analog output choice (chipset AV200)
by Germano Massullo 08 Jan '17

08 Jan '17

I have a Asus Xonar Essence ST soundboard (Chip: AV200) on Fedora 23 kernel 4.4.5-300.fc23.x86_64 The audiocard has 3 different outputs - Speakers - Headphones - FP Headphones that have mutual exclusion, so that when you are using one of them, you cannot use the others. Sometimes the Speakers output disappears from alsamixer. By restarting the computer, the system gets back to its normal behaviour. I attach 3 logs taken when the problem was occurring. The problem happened also in past years, but in last a 1-2 years it happened less frequently

3 3

[alsa-devel] [PATCH 1/7] ASoC: wm9705: Remove unused DAI ID defines
by Lars-Peter Clausen 06 Jan '17

06 Jan '17

The DAI ID defines are back from the time when DAIs were referenced by a numerical ID. These days a string is used for matching instead and the defines are unused. The last user of these defines was removed in commit f0fba2ad1b6b ("ASoC: multi-component - ASoC Multi-Component Support"). So remove the defines as well. This also means the wm9705.h file no longer has any content and can be removed. Signed-off-by: Lars-Peter Clausen <lars(a)metafoo.de> --- sound/soc/codecs/wm9705.c | 2 -- sound/soc/codecs/wm9705.h | 11 ----------- sound/soc/pxa/e740_wm9705.c | 1 - sound/soc/pxa/e750_wm9705.c | 1 - 4 files changed, 15 deletions(-) delete mode 100644 sound/soc/codecs/wm9705.h diff --git a/sound/soc/codecs/wm9705.c b/sound/soc/codecs/wm9705.c index dcdd055..266b6ec 100644 --- a/sound/soc/codecs/wm9705.c +++ b/sound/soc/codecs/wm9705.c @@ -20,8 +20,6 @@ #include <sound/initval.h> #include <sound/soc.h> -#include "wm9705.h" - #define WM9705_VENDOR_ID 0x574d4c05 #define WM9705_VENDOR_ID_MASK 0xffffffff diff --git a/sound/soc/codecs/wm9705.h b/sound/soc/codecs/wm9705.h deleted file mode 100644 index 23ea9ce..0000000 --- a/sound/soc/codecs/wm9705.h +++ /dev/null @@ -1,11 +0,0 @@ -/* - * wm9705.h -- WM9705 Soc Audio driver - */ - -#ifndef _WM9705_H -#define _WM9705_H - -#define WM9705_DAI_AC97_HIFI 0 -#define WM9705_DAI_AC97_AUX 1 - -#endif diff --git a/sound/soc/pxa/e740_wm9705.c b/sound/soc/pxa/e740_wm9705.c index 1de8765..086c37a 100644 --- a/sound/soc/pxa/e740_wm9705.c +++ b/sound/soc/pxa/e740_wm9705.c @@ -22,7 +22,6 @@ #include <asm/mach-types.h> -#include "../codecs/wm9705.h" #include "pxa2xx-ac97.h" diff --git a/sound/soc/pxa/e750_wm9705.c b/sound/soc/pxa/e750_wm9705.c index b7eb7cd..7823278 100644 --- a/sound/soc/pxa/e750_wm9705.c +++ b/sound/soc/pxa/e750_wm9705.c @@ -22,7 +22,6 @@ #include <asm/mach-types.h> -#include "../codecs/wm9705.h" #include "pxa2xx-ac97.h" static int e750_spk_amp_event(struct snd_soc_dapm_widget *w, -- 2.1.4

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[alsa-devel] [PATCH v3 00/13] ASoC: Intel: Skylake: Driver updates
by jeeja.kp＠intel.com 06 Jan '17

06 Jan '17

From: Jeeja KP <jeeja.kp(a)intel.com> This patch series includes driver updates for the handling scenarios during System S0/S3 transitions when audio stream is stopped during system. o move DMA configuration in DSP Gateway Module widget event handler to ensure DMA is configured after resume. o Enable SSP MLCK using Supply widget. This will ensure the MCLK is enabled when the widget is power on. o Check DMA decouple register state before coupling/decoupling the DMA. o In case of HDMI pass-through pipe, reset only the FE Pipe when stream in in XRUN state. o Resume the stream from HW renderer position. o HDMI Codec pin and converter state need to be restored when stream is resumed. Changes in v2: - Addressed Mark's comment on patch 1, split this into 2 as this had additional changes other than configuring the DMA. - Addressed Takashi's comment on the usage of snd_hdac_updatel() Changes in v3: - Addressed Takashi's comment on superfluous shit used in reading the value of PPCTL register and also cleaned the condition for updating the reg value. Jeeja KP (13): ASoC: Intel: Skylake: Update link_index and format in pipe params ASoC: Intel: Skylake: Add helper function to setup host/link dma ASoC: Intel: Skylake: Configure DMA in PRE_PMD handler of Mixer ASoC: Intel: Skylake: Removed unused skl_get_format() ALSA: hda: check stream decoupled register state ASoC: Intel: Skylake: Add set_tristate DAI ops to enable SSP MCLK ASoC: Intel: Skylake: Remove unused SSP BE prepare DAI ops ASoC: Intel: Skylake: Add supply widget as non DSP widget ASoC: Intel: Skylake: Add supply widget in skl_nau_max machine ASoC: Intel: Skylake: Add supply widget in bxt_da_max machine ASoC: Intel: Skylake: Don't reset pass-through pipe in BE prepare ASoC: Intel: Skylake: set the resume point to LPIB ASoC: hdac_hdmi: Enable pin and converter in prepare sound/hda/ext/hdac_ext_stream.c | 15 +- sound/soc/codecs/hdac_hdmi.c | 28 ++-- sound/soc/intel/boards/bxt_da7219_max98357a.c | 34 ++++ sound/soc/intel/boards/skl_nau88l25_max98357a.c | 34 ++++ sound/soc/intel/skylake/skl-pcm.c | 210 +++++++++++++----------- sound/soc/intel/skylake/skl-topology.c | 27 ++- sound/soc/intel/skylake/skl-topology.h | 6 + 7 files changed, 240 insertions(+), 114 deletions(-) -- 2.5.0

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[alsa-devel] [PATCH] ASoC: pcm5102a: Provide a menu selection text
by Jörg Krause 06 Jan '17

06 Jan '17

Provide a menu selection text so that users can enable, disable or mark it as module in menuconfig. Signed-off-by: Jörg Krause <joerg.krause(a)embedded.rocks> --- sound/soc/codecs/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index 084c2aa..9ee9591 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -624,7 +624,7 @@ config SND_SOC_PCM3168A_SPI select REGMAP_SPI config SND_SOC_PCM5102A - tristate + tristate "Texas Instruments PCM5102A CODEC" config SND_SOC_PCM512x tristate -- 2.10.2

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Re: [alsa-devel] Stream format conversion in SoC driver
by Clemens Ladisch 05 Jan '17

05 Jan '17

Giedrius Trainavičius wrote: >It uses I2S for sending / receiving audio. However, the master clock on our >sound card is generated by the ADC, which supports only 24 bit data, so >getting other sample formats is not possible. The I2S sample format need not be the same as what the DMA controller reads/writes from/to memory. >A question on 'plug' - it accepts 'nearest' as the argument for format, >rate, what happens in case the slave pcm stream supports the exact same >format as requested by user software? The plug plugin instantiates the actual conversion plugins only as needed; with no conversion, it vanishes entirely. Regards, Clemens

2 4

[alsa-devel] [PATCH v6 0/3] Add platform clock for BayTrail platforms
by Irina Tirdea 05 Jan '17

05 Jan '17

These patches specifically enable the audio MCLK required by Baytrail CR devices. It is the remaining part of a bigger set of patches (already merged in Mark's tree) that enable sound for Baytrail CR devices (especially Asus T100TAF) [1]. They include the clock driver and enabling the clock in the pmc_atom code (along with moving of the non-architectural pmc_atom driver code into drivers/platform/x86). [1] http://mailman.alsa-project.org/pipermail/alsa-devel/2016-August/111704.html Changes from v5: - fix build error reported by kbuild test robot - split the clk driver code from x86 platform changes Changes from v4: - move the pmc_atom driver from arch/x86/platform/atom to drivers/platform/x86 Changes from v3: - replace devm_kzalloc with devm_kcalloc - add x86 architecture maintainers Changes from v2: - move clk platform data structures to a separate include file - store clk_hw pointer for the fixed rate clocks Changes from v1: - register the clk device as child of pmc device - pass iomem pointer from pmc driver to clk driver to avoid using pmc_atom_read()/write() and use readl/writel API instead - use devm_clk_hw_register/clkdev_hw_create instead of clk_register/clkdev_create Irina Tirdea (3): clk: x86: Add Atom PMC platform clocks arch/x86/platform/atom: Move pmc_atom to drivers/platform/x86 platform/x86: Enable Atom PMC platform clocks arch/x86/Kconfig | 4 - arch/x86/platform/atom/Makefile | 1 - drivers/acpi/acpi_lpss.c | 2 +- drivers/clk/x86/Makefile | 3 + drivers/clk/x86/clk-byt-plt.c | 380 +++++++++++++++++++++ drivers/platform/x86/Kconfig | 5 + drivers/platform/x86/Makefile | 1 + .../atom => drivers/platform/x86}/pmc_atom.c | 81 ++++- include/linux/platform_data/x86/clk-byt-plt.h | 31 ++ .../linux/platform_data/x86}/pmc_atom.h | 3 + 10 files changed, 500 insertions(+), 11 deletions(-) create mode 100644 drivers/clk/x86/clk-byt-plt.c rename {arch/x86/platform/atom => drivers/platform/x86}/pmc_atom.c (88%) create mode 100644 include/linux/platform_data/x86/clk-byt-plt.h rename {arch/x86/include/asm => include/linux/platform_data/x86}/pmc_atom.h (98%) -- 1.9.1

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[alsa-devel] [PATCH] drm: sti: allow audio playback on HDMI even if disabled.
by Arnaud Pouliquen 04 Jan '17

04 Jan '17

This fix allows to play audio while HDMI is disconnected. When HDMI is disable, audio configuration is stored and samples are dropped (by HDMI IP). When HDMI is enabled, audio HDMI configuration is applied and samples are outputted on HDMI wire. Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen(a)st.com> --- drivers/gpu/drm/sti/sti_hdmi.c | 205 ++++++++++++++++++++--------------------- 1 file changed, 101 insertions(+), 104 deletions(-) diff --git a/drivers/gpu/drm/sti/sti_hdmi.c b/drivers/gpu/drm/sti/sti_hdmi.c index 376b076..9c0025e 100644 --- a/drivers/gpu/drm/sti/sti_hdmi.c +++ b/drivers/gpu/drm/sti/sti_hdmi.c @@ -788,6 +788,95 @@ static void sti_hdmi_disable(struct drm_bridge *bridge) hdmi->enabled = false; } +/** + * sti_hdmi_audio_get_non_coherent_n() - get N parameter for non-coherent + * clocks. None-coherent clocks means that audio and TMDS clocks have not the + * same source (drifts between clocks). In this case assumption is that CTS is + * automatically calculated by hardware. + * + * @audio_fs: audio frame clock frequency in Hz + * + * Values computed are based on table described in HDMI specification 1.4b + * + * Returns n value. + */ +static int sti_hdmi_audio_get_non_coherent_n(unsigned int audio_fs) +{ + unsigned int n; + + switch (audio_fs) { + case 32000: + n = 4096; + break; + case 44100: + n = 6272; + break; + case 48000: + n = 6144; + break; + case 88200: + n = 6272 * 2; + break; + case 96000: + n = 6144 * 2; + break; + case 176400: + n = 6272 * 4; + break; + case 192000: + n = 6144 * 4; + break; + default: + /* Not pre-defined, recommended value: 128 * fs / 1000 */ + n = (audio_fs * 128) / 1000; + } + + return n; +} + +static int hdmi_audio_configure(struct sti_hdmi *hdmi) +{ + int audio_cfg, n; + struct hdmi_audio_params *params = &hdmi->audio; + struct hdmi_audio_infoframe *info = &params->cea; + + DRM_DEBUG_DRIVER("\n"); + + if (!hdmi->enabled) + return 0; + + /* update N parameter */ + n = sti_hdmi_audio_get_non_coherent_n(params->sample_rate); + + DRM_DEBUG_DRIVER("Audio rate = %d Hz, TMDS clock = %d Hz, n = %d\n", + params->sample_rate, hdmi->mode.clock * 1000, n); + hdmi_write(hdmi, n, HDMI_AUDN); + + /* update HDMI registers according to configuration */ + audio_cfg = HDMI_AUD_CFG_SPDIF_DIV_2 | HDMI_AUD_CFG_DTS_INVALID | + HDMI_AUD_CFG_ONE_BIT_INVALID; + + switch (info->channels) { + case 8: + audio_cfg |= HDMI_AUD_CFG_CH78_VALID; + case 6: + audio_cfg |= HDMI_AUD_CFG_CH56_VALID; + case 4: + audio_cfg |= HDMI_AUD_CFG_CH34_VALID | HDMI_AUD_CFG_8CH; + case 2: + audio_cfg |= HDMI_AUD_CFG_CH12_VALID; + break; + default: + DRM_ERROR("ERROR: Unsupported number of channels (%d)!\n", + info->channels); + return -EINVAL; + } + + hdmi_write(hdmi, audio_cfg, HDMI_AUDIO_CFG); + + return hdmi_audio_infoframe_config(hdmi); +} + static void sti_hdmi_pre_enable(struct drm_bridge *bridge) { struct sti_hdmi *hdmi = bridge->driver_private; @@ -826,9 +915,12 @@ static void sti_hdmi_pre_enable(struct drm_bridge *bridge) if (hdmi_avi_infoframe_config(hdmi)) DRM_ERROR("Unable to configure AVI infoframe\n"); - /* Program AUDIO infoframe */ - if (hdmi_audio_infoframe_config(hdmi)) - DRM_ERROR("Unable to configure AUDIO infoframe\n"); + if (hdmi->audio.enabled) { + if (hdmi_audio_configure(hdmi)) + DRM_ERROR("Unable to configure audio\n"); + } else { + hdmi_audio_infoframe_config(hdmi); + } /* Program VS infoframe */ if (hdmi_vendor_infoframe_config(hdmi)) @@ -1078,97 +1170,6 @@ static struct drm_encoder *sti_hdmi_find_encoder(struct drm_device *dev) return NULL; } -/** - * sti_hdmi_audio_get_non_coherent_n() - get N parameter for non-coherent - * clocks. None-coherent clocks means that audio and TMDS clocks have not the - * same source (drifts between clocks). In this case assumption is that CTS is - * automatically calculated by hardware. - * - * @audio_fs: audio frame clock frequency in Hz - * - * Values computed are based on table described in HDMI specification 1.4b - * - * Returns n value. - */ -static int sti_hdmi_audio_get_non_coherent_n(unsigned int audio_fs) -{ - unsigned int n; - - switch (audio_fs) { - case 32000: - n = 4096; - break; - case 44100: - n = 6272; - break; - case 48000: - n = 6144; - break; - case 88200: - n = 6272 * 2; - break; - case 96000: - n = 6144 * 2; - break; - case 176400: - n = 6272 * 4; - break; - case 192000: - n = 6144 * 4; - break; - default: - /* Not pre-defined, recommended value: 128 * fs / 1000 */ - n = (audio_fs * 128) / 1000; - } - - return n; -} - -static int hdmi_audio_configure(struct sti_hdmi *hdmi, - struct hdmi_audio_params *params) -{ - int audio_cfg, n; - struct hdmi_audio_infoframe *info = &params->cea; - - DRM_DEBUG_DRIVER("\n"); - - if (!hdmi->enabled) - return 0; - - /* update N parameter */ - n = sti_hdmi_audio_get_non_coherent_n(params->sample_rate); - - DRM_DEBUG_DRIVER("Audio rate = %d Hz, TMDS clock = %d Hz, n = %d\n", - params->sample_rate, hdmi->mode.clock * 1000, n); - hdmi_write(hdmi, n, HDMI_AUDN); - - /* update HDMI registers according to configuration */ - audio_cfg = HDMI_AUD_CFG_SPDIF_DIV_2 | HDMI_AUD_CFG_DTS_INVALID | - HDMI_AUD_CFG_ONE_BIT_INVALID; - - switch (info->channels) { - case 8: - audio_cfg |= HDMI_AUD_CFG_CH78_VALID; - case 6: - audio_cfg |= HDMI_AUD_CFG_CH56_VALID; - case 4: - audio_cfg |= HDMI_AUD_CFG_CH34_VALID | HDMI_AUD_CFG_8CH; - case 2: - audio_cfg |= HDMI_AUD_CFG_CH12_VALID; - break; - default: - DRM_ERROR("ERROR: Unsupported number of channels (%d)!\n", - info->channels); - return -EINVAL; - } - - hdmi_write(hdmi, audio_cfg, HDMI_AUDIO_CFG); - - hdmi->audio = *params; - - return hdmi_audio_infoframe_config(hdmi); -} - static void hdmi_audio_shutdown(struct device *dev, void *data) { struct sti_hdmi *hdmi = dev_get_drvdata(dev); @@ -1192,17 +1193,9 @@ static int hdmi_audio_hw_params(struct device *dev, { struct sti_hdmi *hdmi = dev_get_drvdata(dev); int ret; - struct hdmi_audio_params audio = { - .sample_width = params->sample_width, - .sample_rate = params->sample_rate, - .cea = params->cea, - }; DRM_DEBUG_DRIVER("\n"); - if (!hdmi->enabled) - return 0; - if ((daifmt->fmt != HDMI_I2S) || daifmt->bit_clk_inv || daifmt->frame_clk_inv || daifmt->bit_clk_master || daifmt->frame_clk_master) { @@ -1213,9 +1206,13 @@ static int hdmi_audio_hw_params(struct device *dev, return -EINVAL; } - audio.enabled = true; + hdmi->audio.sample_width = params->sample_width; + hdmi->audio.sample_rate = params->sample_rate; + hdmi->audio.cea = params->cea; + + hdmi->audio.enabled = true; - ret = hdmi_audio_configure(hdmi, &audio); + ret = hdmi_audio_configure(hdmi); if (ret < 0) return ret; -- 1.9.1

2 1

[alsa-devel] [PATCH] ASoC : fsl_ssi : Correct the condition to check AC97 mode
by Harisangam, Sharvari (S.) 04 Jan '17

04 Jan '17

Corrected the condition to check if ssi is configured for AC97 mode. Other modes like dsp_a also satisfy the ANDing condition. Signed-off-by: Sharvari Harisangam <sharvari.harisangam(a)visteon.com> --- sound/soc/fsl/fsl_ssi.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c index ca6f6b1..4fbb7a2 100644 --- a/sound/soc/fsl/fsl_ssi.c +++ b/sound/soc/fsl/fsl_ssi.c @@ -317,7 +317,8 @@ MODULE_DEVICE_TABLE(of, fsl_ssi_ids); static bool fsl_ssi_is_ac97(struct fsl_ssi_private *ssi_private) { - return !!(ssi_private->dai_fmt & SND_SOC_DAIFMT_AC97); + return !!(ssi_private->dai_fmt & SND_SOC_DAIFMT_AC97) == + SND_SOC_DAIFMT_AC97; } static bool fsl_ssi_is_i2s_master(struct fsl_ssi_private *ssi_private) @@ -1016,7 +1017,7 @@ static int _fsl_ssi_set_dai_fmt(struct device *dev, CCSR_SSI_SCR_TCH_EN); } - if (fmt & SND_SOC_DAIFMT_AC97) + if ((fmt & SND_SOC_DAIFMT_AC97) == SND_SOC_DAIFMT_AC97) fsl_ssi_setup_ac97(ssi_private); return 0; -- 2.7.4

5 5

[alsa-devel] [PATCH - alsa-lib 1/1] Change card/pid get functions to return -ENOSYS if the kernel is too old
by Adam Goode 03 Jan '17

03 Jan '17

When trying to get the pid or card of a client, the get functions will return -1 if there is no pid or card for a client. Clients have zero or one of these, so -1 is correct for these cases. But we also need to detect the case where the kernel cannot tell us if there is a card or pid, so that userspace can fallback to probing this information in the old way. Signed-off-by: Adam Goode <agoode(a)google.com> diff --git a/src/seq/seq.c b/src/seq/seq.c index 4405e68..7de1e81 100644 --- a/src/seq/seq.c +++ b/src/seq/seq.c @@ -1522,9 +1522,10 @@ int snd_seq_client_info_get_error_bounce(const snd_seq_client_info_t *info) } /** - * \brief Get the sound card number. + * \brief Get the sound card number if the kernel supports this. * \param info client_info container - * \return card number or -1 if value is not available. + * \return card number, -1 if there is no card for this client, + * or \c -ENOSYS if the kernel does not have support for this operation * * Only available for SND_SEQ_KERNEL_CLIENT clients. */ @@ -1535,9 +1536,10 @@ int snd_seq_client_info_get_card(const snd_seq_client_info_t *info) } /** - * \brief Get the owning PID. + * \brief Get the owning PID if the kernel supports this. * \param info client_info container - * \return pid or -1 if value is not available. + * \return pid, -1 if there is no PID for this client, + * or \c -ENOSYS if the kernel does not have support for this operation * * Only available for SND_SEQ_USER_CLIENT clients. */ diff --git a/src/seq/seq_hw.c b/src/seq/seq_hw.c index 578ef12..a1d1e4a 100644 --- a/src/seq/seq_hw.c +++ b/src/seq/seq_hw.c @@ -102,8 +102,8 @@ static int snd_seq_hw_get_client_info(snd_seq_t *seq, snd_seq_client_info_t * in return -errno; } if (hw->version < SNDRV_PROTOCOL_VERSION(1, 0, 2)) { - info->card = -1; - info->pid = -1; + info->card = -ENOSYS; + info->pid = -ENOSYS; } return 0; } @@ -374,8 +374,8 @@ static int snd_seq_hw_query_next_client(snd_seq_t *seq, snd_seq_client_info_t *i return -errno; } if (hw->version < SNDRV_PROTOCOL_VERSION(1, 0, 2)) { - info->card = -1; - info->pid = -1; + info->card = -ENOSYS; + info->pid = -ENOSYS; } return 0; } -- 2.8.0.rc3.226.g39d4020

5 16

[alsa-devel] [PATCH v4] ASoC: omap-mcbsp: Add PM QoS support for McBSP to prevent glitches
by Matt Ranostay 03 Jan '17

03 Jan '17

We can get audio errors if hitting deeper idle states on omaps: [alsa.c:230] error: Fatal problem with alsa output, error -5. [audio.c:614] error: Error in writing audio (Input/output error?)! This seems to happen with off mode idle enabled as power for the whole SoC may get cut off between filling the McBSP fifo using DMA. While active DMA blocks deeper idle states in hardware, McBSP activity does not seem to do so. Basing the QoS latency calculation on the FIFO size, threshold, sample rate, and channels. Based on the original patch by Tony Lindgren Link: https://patchwork.kernel.org/patch/9305867/ Cc: Tony Lindgren <tony(a)atomide.com> Cc: Peter Ujfalusi <peter.ujfalusi(a)ti.com> Signed-off-by: Matt Ranostay <matt(a)ranostay.consulting> --- Changes from v1: * add calculations for latency per number of FIFO locations Changes from v2: * add missing mcbsp.h header change Changes from v3: * base the latency calculations on threshold, buffer size, sample rate, and channels sound/soc/omap/mcbsp.c | 19 +++++++++++++++++++ sound/soc/omap/mcbsp.h | 3 +++ sound/soc/omap/omap-mcbsp.c | 21 ++++++++++++++++++++- 3 files changed, 42 insertions(+), 1 deletion(-) diff --git a/sound/soc/omap/mcbsp.c b/sound/soc/omap/mcbsp.c index 06fec5699cc8..8f792e714894 100644 --- a/sound/soc/omap/mcbsp.c +++ b/sound/soc/omap/mcbsp.c @@ -25,6 +25,7 @@ #include <linux/io.h> #include <linux/slab.h> #include <linux/pm_runtime.h> +#include <linux/pm_qos.h> #include <linux/platform_data/asoc-ti-mcbsp.h> @@ -640,9 +641,19 @@ void omap_mcbsp_free(struct omap_mcbsp *mcbsp) */ void omap_mcbsp_start(struct omap_mcbsp *mcbsp, int tx, int rx) { + struct pm_qos_request *pm_qos_req = &mcbsp->pm_qos_req; int enable_srg = 0; u16 w; + /* Prevent omap hardware from hitting off between fifo fills */ + if (mcbsp->latency) { + if (pm_qos_request_active(pm_qos_req)) + pm_qos_update_request(pm_qos_req, mcbsp->latency); + else + pm_qos_add_request(pm_qos_req, PM_QOS_CPU_DMA_LATENCY, + mcbsp->latency); + } + if (mcbsp->st_data) omap_st_start(mcbsp); @@ -731,6 +742,11 @@ void omap_mcbsp_stop(struct omap_mcbsp *mcbsp, int tx, int rx) if (mcbsp->st_data) omap_st_stop(mcbsp); + + if (mcbsp->active == 1 && pm_qos_request_active(&mcbsp->pm_qos_req)) { + pm_qos_remove_request(&mcbsp->pm_qos_req); + mcbsp->latency = 0; + } } int omap2_mcbsp_set_clks_src(struct omap_mcbsp *mcbsp, u8 fck_src_id) @@ -1098,6 +1114,9 @@ int omap_mcbsp_init(struct platform_device *pdev) void omap_mcbsp_cleanup(struct omap_mcbsp *mcbsp) { + if (pm_qos_request_active(&mcbsp->pm_qos_req)) + pm_qos_remove_request(&mcbsp->pm_qos_req); + if (mcbsp->pdata->buffer_size) sysfs_remove_group(&mcbsp->dev->kobj, &additional_attr_group); diff --git a/sound/soc/omap/mcbsp.h b/sound/soc/omap/mcbsp.h index 61e93b1c185d..d312e72f7979 100644 --- a/sound/soc/omap/mcbsp.h +++ b/sound/soc/omap/mcbsp.h @@ -323,8 +323,11 @@ struct omap_mcbsp { unsigned int fmt; unsigned int in_freq; + unsigned int latency; int clk_div; int wlen; + + struct pm_qos_request pm_qos_req; }; void omap_mcbsp_config(struct omap_mcbsp *mcbsp, diff --git a/sound/soc/omap/omap-mcbsp.c b/sound/soc/omap/omap-mcbsp.c index d018e966e533..ddaec37fb4c3 100644 --- a/sound/soc/omap/omap-mcbsp.c +++ b/sound/soc/omap/omap-mcbsp.c @@ -226,6 +226,7 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream, int wlen, channels, wpf; int pkt_size = 0; unsigned int format, div, framesize, master; + unsigned int buffer_size = mcbsp->pdata->buffer_size; dma_data = snd_soc_dai_get_dma_data(cpu_dai, substream); channels = params_channels(params); @@ -240,7 +241,9 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream, default: return -EINVAL; } - if (mcbsp->pdata->buffer_size) { + if (buffer_size) { + int latency; + if (mcbsp->dma_op_mode == MCBSP_DMA_MODE_THRESHOLD) { int period_words, max_thrsh; int divider = 0; @@ -271,6 +274,22 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream, /* Use packet mode for non mono streams */ pkt_size = channels; } + + latency = ((((buffer_size - pkt_size) / channels) * 1000) + / (params->rate_num / params->rate_den)); + + /* + * Use the lowest QoS latency value for active streams, but + * this has the disadvantage of using lower than needed latency + * if an stream with lower QoS ends before one with a higher + * one. Latency setting only gets reset when all streams + * complete. + */ + if (latency <= mcbsp->latency) + mcbsp->latency = latency; + else + mcbsp->latency = 0; + omap_mcbsp_set_threshold(substream, pkt_size); } -- 2.7.4

2 2