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Better documentation with the examples
by GitHub issues - opened 19 Nov '20

19 Nov '20

alsa-project/tinycompress issue #8 was opened from Andres6936: I have compiled the program and when I run the `cplay` script I get an error: ```shellsession andres6936@Tierra ~/CLionProjects/tinycompress-master/src/utils $ cplay TestAudio.mp3 Error: Can't find sync word ``` I have already checked out different mp3 files and I keep getting the same error. I have also tried different options, but it is always the same error. Issue URL : https://github.com/alsa-project/tinycompress/issues/8 Repository URL: https://github.com/alsa-project/tinycompress

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[PATCH] ALSA: mixart: Fix mutex deadlock
by Takashi Iwai 19 Nov '20

19 Nov '20

The code change for switching to non-atomic mode brought the unexpected mutex deadlock in get_msg(). It converted the spinlock with the existing mutex, but there were calls with the already holding the mutex. Since the only place that needs the extra lock is the code path from snd_mixart_send_msg(), remove the mutex lock in get_msg() and apply in the caller side for fixing the mutex deadlock. Fixes: 8d3a8b5cb57d ("ALSA: mixart: Use nonatomic PCM ops") Reported-by: Dan Carpenter <dan.carpenter(a)oracle.com> Cc: <stable(a)vger.kernel.org> Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- sound/pci/mixart/mixart_core.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/sound/pci/mixart/mixart_core.c b/sound/pci/mixart/mixart_core.c index 0bdd33b0af65..fb8895af0363 100644 --- a/sound/pci/mixart/mixart_core.c +++ b/sound/pci/mixart/mixart_core.c @@ -70,7 +70,6 @@ static int get_msg(struct mixart_mgr *mgr, struct mixart_msg *resp, unsigned int i; #endif - mutex_lock(&mgr->msg_lock); err = 0; /* copy message descriptor from miXart to driver */ @@ -119,8 +118,6 @@ static int get_msg(struct mixart_mgr *mgr, struct mixart_msg *resp, writel_be(headptr, MIXART_MEM(mgr, MSG_OUTBOUND_FREE_HEAD)); _clean_exit: - mutex_unlock(&mgr->msg_lock); - return err; } @@ -258,7 +255,9 @@ int snd_mixart_send_msg(struct mixart_mgr *mgr, struct mixart_msg *request, int resp.data = resp_data; resp.size = max_resp_size; + mutex_lock(&mgr->msg_lock); err = get_msg(mgr, &resp, msg_frame); + mutex_unlock(&mgr->msg_lock); if( request->message_id != resp.message_id ) dev_err(&mgr->pci->dev, "RESPONSE ERROR!\n"); -- 2.16.4

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[PATCH] ALSA: hda/ca0132: Fix compile warning without PCI
by Takashi Iwai 19 Nov '20

19 Nov '20

CONFIG_PCI=n leads to a compile warning like: sound/pci/hda/patch_ca0132.c:8214:10: warning: no case matching constant switch condition '0' due to the missed handling of QUIRK_NONE in ca0132_mmio_init(). Fix it. Fixes: bf2aa9ccc8e5 ("ALSA: hda/ca0132 - Cleanup ca0132_mmio_init function.") Reported-by: kernel test robot <lkp(a)intel.com> Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- sound/pci/hda/patch_ca0132.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sound/pci/hda/patch_ca0132.c b/sound/pci/hda/patch_ca0132.c index e0c38f2735c6..d8370a417e3d 100644 --- a/sound/pci/hda/patch_ca0132.c +++ b/sound/pci/hda/patch_ca0132.c @@ -9183,6 +9183,8 @@ static void ca0132_mmio_init(struct hda_codec *codec) case QUIRK_AE5: ca0132_mmio_init_ae5(codec); break; + default: + break; } } -- 2.16.4

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[PATCH] ASoC: fsl_sai: Correct the clock source for mclk0
by Shengjiu Wang 19 Nov '20

19 Nov '20

On VF610, mclk0 = bus_clk; On i.MX6SX/6UL/6ULL/7D, mclk0 = mclk1; On i.MX7ULP, mclk0 = bus_clk; On i.MX8QM/8QXP, mclk0 = bus_clk; On i.MX8MQ/8MN/8MM/8MP, mclk0 = bus_clk; So add variable mclk0_mclk1_match in fsl_sai_soc_data to distinguish these platforms. Signed-off-by: Shengjiu Wang <shengjiu.wang(a)nxp.com> --- sound/soc/fsl/fsl_sai.c | 11 ++++++++++- sound/soc/fsl/fsl_sai.h | 1 + 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c index 3e5c1eaccd5e..479fd27ace35 100644 --- a/sound/soc/fsl/fsl_sai.c +++ b/sound/soc/fsl/fsl_sai.c @@ -1040,7 +1040,6 @@ static int fsl_sai_probe(struct platform_device *pdev) sai->bus_clk = NULL; } - sai->mclk_clk[0] = sai->bus_clk; for (i = 1; i < FSL_SAI_MCLK_MAX; i++) { sprintf(tmp, "mclk%d", i); sai->mclk_clk[i] = devm_clk_get(&pdev->dev, tmp); @@ -1051,6 +1050,11 @@ static int fsl_sai_probe(struct platform_device *pdev) } } + if (sai->soc_data->mclk0_mclk1_match) + sai->mclk_clk[0] = sai->mclk_clk[1]; + else + sai->mclk_clk[0] = sai->bus_clk; + irq = platform_get_irq(pdev, 0); if (irq < 0) return irq; @@ -1165,6 +1169,7 @@ static const struct fsl_sai_soc_data fsl_sai_vf610_data = { .use_edma = false, .fifo_depth = 32, .reg_offset = 0, + .mclk0_mclk1_match = false, }; static const struct fsl_sai_soc_data fsl_sai_imx6sx_data = { @@ -1172,6 +1177,7 @@ static const struct fsl_sai_soc_data fsl_sai_imx6sx_data = { .use_edma = false, .fifo_depth = 32, .reg_offset = 0, + .mclk0_mclk1_match = true, }; static const struct fsl_sai_soc_data fsl_sai_imx7ulp_data = { @@ -1179,6 +1185,7 @@ static const struct fsl_sai_soc_data fsl_sai_imx7ulp_data = { .use_edma = false, .fifo_depth = 16, .reg_offset = 8, + .mclk0_mclk1_match = false, }; static const struct fsl_sai_soc_data fsl_sai_imx8mq_data = { @@ -1186,6 +1193,7 @@ static const struct fsl_sai_soc_data fsl_sai_imx8mq_data = { .use_edma = false, .fifo_depth = 128, .reg_offset = 8, + .mclk0_mclk1_match = false, }; static const struct fsl_sai_soc_data fsl_sai_imx8qm_data = { @@ -1193,6 +1201,7 @@ static const struct fsl_sai_soc_data fsl_sai_imx8qm_data = { .use_edma = true, .fifo_depth = 64, .reg_offset = 0, + .mclk0_mclk1_match = false, }; static const struct of_device_id fsl_sai_ids[] = { diff --git a/sound/soc/fsl/fsl_sai.h b/sound/soc/fsl/fsl_sai.h index 4bbcd0dbe8f1..390a9ca3b531 100644 --- a/sound/soc/fsl/fsl_sai.h +++ b/sound/soc/fsl/fsl_sai.h @@ -219,6 +219,7 @@ struct fsl_sai_soc_data { bool use_imx_pcm; bool use_edma; + bool mclk0_mclk1_match; unsigned int fifo_depth; unsigned int reg_offset; }; -- 2.27.0

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ESS Sabre DAC ES901x Codec drivers
by Matt Flax 19 Nov '20

19 Nov '20

Are there any ESS DAC codec drivers out there ? For example ES9012, ES9018 DACs. http://www.esstech.com/files/2816/0453/7571/ES9018S_Datasheet_v2.2.pdf Matt

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[PATCH v2 00/12] ASoC: soc-component: add snd_soc_component_xxx()
by Kuninori Morimoto 18 Nov '20

18 Nov '20

Hi Mark These are v2 of snd_soc_component_compr_xxx() function patches. I think component related function should be implemented at soc-component.c, otherwise it is confusable to read. These are for it. v1 -> v2 - fixup function return timing on snd_soc_component_compr_get_params() snd_soc_component_compr_get_metadata() - use mutex at compr side on snd_soc_component_compr_get_caps() snd_soc_component_compr_get_codec_caps() snd_soc_component_compr_copy() Link: https://lore.kernel.org/r/878sb78ac4.wl-kuninori.morimoto.gx@renesas.com Kuninori Morimoto (12): ASoC: soc-component: add snd_soc_component_compr_open() ASoC: soc-component: add snd_soc_component_compr_free() ASoC: soc-component: add snd_soc_component_compr_trigger() ASoC: soc-component: add snd_soc_component_compr_set_params() ASoC: soc-component: add snd_soc_component_compr_get_params() ASoC: soc-component: add snd_soc_component_compr_get_caps() ASoC: soc-component: add snd_soc_component_compr_get_codec_caps() ASoC: soc-component: add snd_soc_component_compr_ack() ASoC: soc-component: add snd_soc_component_compr_pointer() ASoC: soc-component: add snd_soc_component_compr_copy() ASoC: soc-component: add snd_soc_component_compr_set_metadata() ASoC: soc-component: add snd_soc_component_compr_get_metadata() include/sound/soc-component.h | 22 +++ sound/soc/soc-component.c | 255 ++++++++++++++++++++++++++++++++ sound/soc/soc-compress.c | 263 ++++------------------------------ 3 files changed, 303 insertions(+), 237 deletions(-) -- 2.25.1

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[PATCH] ASOC: Intel: kbl_rt5663_rt5514_max98927: Do not try to disable disabled clock
by Guenter Roeck 18 Nov '20

18 Nov '20

In kabylake_set_bias_level(), enabling mclk may fail if the clock has already been enabled by the firmware. Attempts to disable that clock later will fail with a warning backtrace. mclk already disabled WARNING: CPU: 2 PID: 108 at drivers/clk/clk.c:952 clk_core_disable+0x1b6/0x1cf ... Call Trace: clk_disable+0x2d/0x3a kabylake_set_bias_level+0x72/0xfd [snd_soc_kbl_rt5663_rt5514_max98927] snd_soc_card_set_bias_level+0x2b/0x6f snd_soc_dapm_set_bias_level+0xe1/0x209 dapm_pre_sequence_async+0x63/0x96 async_run_entry_fn+0x3d/0xd1 process_one_work+0x2a9/0x526 ... Only disable the clock if it has been enabled. Fixes: 15747a802075 ("ASoC: eve: implement set_bias_level function for rt5514") Cc: Brent Lu <brent.lu(a)intel.com> Cc: Curtis Malainey <cujomalainey(a)chromium.org> Signed-off-by: Guenter Roeck <linux(a)roeck-us.net> --- sound/soc/intel/boards/kbl_rt5663_rt5514_max98927.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sound/soc/intel/boards/kbl_rt5663_rt5514_max98927.c b/sound/soc/intel/boards/kbl_rt5663_rt5514_max98927.c index 922cd0176e1f..f95546c184aa 100644 --- a/sound/soc/intel/boards/kbl_rt5663_rt5514_max98927.c +++ b/sound/soc/intel/boards/kbl_rt5663_rt5514_max98927.c @@ -700,6 +700,8 @@ static int kabylake_set_bias_level(struct snd_soc_card *card, switch (level) { case SND_SOC_BIAS_PREPARE: if (dapm->bias_level == SND_SOC_BIAS_ON) { + if (!__clk_is_enabled(priv->mclk)) + return 0; dev_dbg(card->dev, "Disable mclk"); clk_disable_unprepare(priv->mclk); } else { -- 2.17.1

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[PATCH -next] ASoC: samsung: fix platform_no_drv_owner.cocci warnings
by Zou Wei 18 Nov '20

18 Nov '20

./sound/soc/samsung/midas_wm1811.c:534:3-8: No need to set .owner here. The core will do it. Remove .owner field if calls are used which set it automatically Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci Signed-off-by: Zou Wei <zou_wei(a)huawei.com> --- sound/soc/samsung/midas_wm1811.c | 1 - 1 file changed, 1 deletion(-) diff --git a/sound/soc/samsung/midas_wm1811.c b/sound/soc/samsung/midas_wm1811.c index d03340c..1f9a553 100644 --- a/sound/soc/samsung/midas_wm1811.c +++ b/sound/soc/samsung/midas_wm1811.c @@ -531,7 +531,6 @@ static struct platform_driver midas_driver = { .driver = { .name = "midas-audio", .of_match_table = midas_of_match, - .owner = THIS_MODULE, .pm = &snd_soc_pm_ops, }, .probe = midas_probe, -- 2.6.2

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[PATCH] dt-bindings: mediatek: mt8192: revert "add audio afe document"
by Jiaxin Yu 18 Nov '20

18 Nov '20

This reverts commit 1afc60e00de3abbb6c559da409c5c1bb8c1d98ec. Signed-off-by: Jiaxin Yu <jiaxin.yu(a)mediatek.com> --- https://mailman.alsa-project.org/pipermail/alsa-devel/2020-November/176873.… These dependency are continuing to upstream, I will revert this patch first. After the dependencies are merged, I will send 'mt8192-afe-pcm.yaml' again. .../bindings/sound/mt8192-afe-pcm.yaml | 100 ------------------ 1 file changed, 100 deletions(-) delete mode 100644 Documentation/devicetree/bindings/sound/mt8192-afe-pcm.yaml diff --git a/Documentation/devicetree/bindings/sound/mt8192-afe-pcm.yaml b/Documentation/devicetree/bindings/sound/mt8192-afe-pcm.yaml deleted file mode 100644 index 0170c93802d29..0000000000000 --- a/Documentation/devicetree/bindings/sound/mt8192-afe-pcm.yaml +++ /dev/null @@ -1,100 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/sound/mt8192-afe-pcm.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Mediatek AFE PCM controller for mt8192 - -maintainers: - - Jiaxin Yu <jiaxin.yu(a)mediatek.com> - - Shane Chien <shane.chien(a)mediatek.com> - -properties: - compatible: - const: mediatek,mt8192-audio - - interrupts: - maxItems: 1 - - resets: - maxItems: 1 - - reset-names: - const: audiosys - - mediatek,apmixedsys: - $ref: "/schemas/types.yaml#/definitions/phandle" - description: The phandle of the mediatek apmixedsys controller - - mediatek,infracfg: - $ref: "/schemas/types.yaml#/definitions/phandle" - description: The phandle of the mediatek infracfg controller - - mediatek,topckgen: - $ref: "/schemas/types.yaml#/definitions/phandle" - description: The phandle of the mediatek topckgen controller - - power-domains: - maxItems: 1 - - clocks: - items: - - description: AFE clock - - description: ADDA DAC clock - - description: ADDA DAC pre-distortion clock - - description: audio infra sys clock - - description: audio infra 26M clock - - clock-names: - items: - - const: aud_afe_clk - - const: aud_dac_clk - - const: aud_dac_predis_clk - - const: aud_infra_clk - - const: aud_infra_26m_clk - -required: - - compatible - - interrupts - - resets - - reset-names - - mediatek,apmixedsys - - mediatek,infracfg - - mediatek,topckgen - - power-domains - - clocks - - clock-names - -additionalProperties: false - -examples: - - | - #include <dt-bindings/clock/mt8192-clk.h> - #include <dt-bindings/interrupt-controller/arm-gic.h> - #include <dt-bindings/interrupt-controller/irq.h> - #include <dt-bindings/power/mt8192-power.h> - #include <dt-bindings/reset-controller/mt8192-resets.h> - - afe: mt8192-afe-pcm { - compatible = "mediatek,mt8192-audio"; - interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>; - resets = <&watchdog MT8192_TOPRGU_AUDIO_SW_RST>; - reset-names = "audiosys"; - mediatek,apmixedsys = <&apmixedsys>; - mediatek,infracfg = <&infracfg>; - mediatek,topckgen = <&topckgen>; - power-domains = <&scpsys MT8192_POWER_DOMAIN_AUDIO>; - clocks = <&audsys CLK_AUD_AFE>, - <&audsys CLK_AUD_DAC>, - <&audsys CLK_AUD_DAC_PREDIS>, - <&infracfg CLK_INFRA_AUDIO>, - <&infracfg CLK_INFRA_AUDIO_26M_B>; - clock-names = "aud_afe_clk", - "aud_dac_clk", - "aud_dac_predis_clk", - "aud_infra_clk", - "aud_infra_26m_clk"; - }; - -... -- 2.18.0

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[PATCH] ASoC: mmp-sspa: clear transmit phase bit for non-stereo formats
by Kyle Russell 18 Nov '20

18 Nov '20

The transmit phase register value is never cleared during hw params. So once hw params sets this bit to handle a two channel format, it remains configured for dual-phase, which is not desirable for mono playback. Signed-off-by: Kyle Russell <bkylerussell(a)gmail.com> --- sound/soc/pxa/mmp-sspa.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/soc/pxa/mmp-sspa.c b/sound/soc/pxa/mmp-sspa.c index 4255851c71c1..52d4d8ace1c3 100644 --- a/sound/soc/pxa/mmp-sspa.c +++ b/sound/soc/pxa/mmp-sspa.c @@ -239,6 +239,7 @@ static int mmp_sspa_hw_params(struct snd_pcm_substream *substream, return -EINVAL; } + sspa_ctrl &= ~SSPA_CTL_XPH; if (dev->of_node || params_channels(params) == 2) sspa_ctrl |= SSPA_CTL_XPH; -- 2.25.1

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