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[PATCH v4 0/9] ASoC: Intel: avs: PCM power management
by Cezary Rojewski 28 Oct '22

28 Oct '22

Goal of the series is implementation of suspend/resume operations for a PCM stream along with all the collaterals connected to the subject. Start with splitting avs_dai_fe_hw_free() as ideally we would like to reuse as much of existing code as possible but snd_pcm_lib_free_pages() is not desired part of the function when speaking of suspend operation. The actual implementation of suspend/resume() for component drivers follows. For most scenarios, the PM flow is similar to standard streaming one, except for the part where the position register are being saved and the lack of PCM pages freeing. To reduce code duplication, all avs_dai_suspend_XXX() and avs_dai_resume_XXX() functions reuse their non-PM equivalents. Order of operations is affected by the fact that path binding/unbinding happens only in FE part of the stream. Above essentially unlocks SX+streaming scenarios i.e.: power transitions with an ongoing stream. As some streams are allowed to run in low power state, support is provided for S0iX state. The handlers check ACPI capabilities and the number of active low-power paths before deciding between SX and S0iX flows. The last portion of the patchset is addition of power/clock gating overrides. There is no single set of registers that ensures AudioDSP firmware loads 100% of time on every single configuration. By having them exposed, user can have the loading procedure behavior adjusted for their configuration without having to recompile the kernel. Changes in v4: - replaced readb_poll_timeout() with read_poll_timeout() for the DRSM polling function as the register is u32 wide, not u8 Changes in v3: - fixed unused-but-set-variable warnings reported by the test robot Changes in v2: - moved DRSM reg polling to separate function, snd_hdac_stream_wait_drsm() as suggested by Pierre - moved the acpi_gbl_FADT under AVS_S0IX_SUPPORTED macro and relocated the checks from pcm.c to topology.c so that the low-power streams are filtered as early as possible - fixed compilation when CONFIG_ACPI is disabled as reported by the test robot - simplified all the avs_dai_resume/suspend_xxx() by moving ->ignore_suspend check one level up, to avs_component_pm_op() (patch 0002) Amadeusz Sławiński (1): ASoC: Intel: avs: Handle SUSPEND and RESUME triggers Cezary Rojewski (7): ASoC: Intel: avs: Split pcm pages freeing operation from hw_free() ASoC: Intel: avs: Introduce PCM power management routines ALSA: hda: Introduce snd_hdac_stream_wait_drsm() ASoC: Intel: avs: Restart instead of resuming HDA capture streams ASoC: Intel: avs: Count low power streams ASoC: Intel: avs: Power and clock gating policy overriding ASoC: Intel: avs: Enact power gating policy Piotr Maziarz (1): ASoC: Intel: avs: Standby power-state support include/sound/hdaudio.h | 1 + include/sound/hdaudio_ext.h | 5 + sound/hda/hdac_stream.c | 22 ++ sound/soc/intel/avs/avs.h | 8 + sound/soc/intel/avs/core.c | 97 +++++++-- sound/soc/intel/avs/loader.c | 10 + sound/soc/intel/avs/pcm.c | 368 +++++++++++++++++++++++++++++---- sound/soc/intel/avs/topology.c | 10 + 8 files changed, 461 insertions(+), 60 deletions(-) -- 2.25.1

3 11

[PATCH] ASoC: fsl_xcvr: Add Counter registers
by Shengjiu Wang 28 Oct '22

28 Oct '22

These counter registers are part of register list, add them to complete the register map - DMAC counter control registers - Data path Timestamp counter register - Data path bit counter register - Data path bit count timestamp register - Data path bit read timestamp register Signed-off-by: Shengjiu Wang <shengjiu.wang(a)nxp.com> --- sound/soc/fsl/fsl_xcvr.c | 40 ++++++++++++++++++++++++++++++++++++++++ sound/soc/fsl/fsl_xcvr.h | 21 +++++++++++++++++++++ 2 files changed, 61 insertions(+) diff --git a/sound/soc/fsl/fsl_xcvr.c b/sound/soc/fsl/fsl_xcvr.c index c043efe4548d..2a6802fb2a8b 100644 --- a/sound/soc/fsl/fsl_xcvr.c +++ b/sound/soc/fsl/fsl_xcvr.c @@ -934,6 +934,14 @@ static const struct reg_default fsl_xcvr_reg_defaults[] = { { FSL_XCVR_RX_DPTH_CTRL_SET, 0x00002C89 }, { FSL_XCVR_RX_DPTH_CTRL_CLR, 0x00002C89 }, { FSL_XCVR_RX_DPTH_CTRL_TOG, 0x00002C89 }, + { FSL_XCVR_RX_DPTH_CNTR_CTRL, 0x00000000 }, + { FSL_XCVR_RX_DPTH_CNTR_CTRL_SET, 0x00000000 }, + { FSL_XCVR_RX_DPTH_CNTR_CTRL_CLR, 0x00000000 }, + { FSL_XCVR_RX_DPTH_CNTR_CTRL_TOG, 0x00000000 }, + { FSL_XCVR_RX_DPTH_TSCR, 0x00000000 }, + { FSL_XCVR_RX_DPTH_BCR, 0x00000000 }, + { FSL_XCVR_RX_DPTH_BCTR, 0x00000000 }, + { FSL_XCVR_RX_DPTH_BCRR, 0x00000000 }, { FSL_XCVR_TX_DPTH_CTRL, 0x00000000 }, { FSL_XCVR_TX_DPTH_CTRL_SET, 0x00000000 }, { FSL_XCVR_TX_DPTH_CTRL_CLR, 0x00000000 }, @@ -944,6 +952,14 @@ static const struct reg_default fsl_xcvr_reg_defaults[] = { { FSL_XCVR_TX_CS_DATA_3, 0x00000000 }, { FSL_XCVR_TX_CS_DATA_4, 0x00000000 }, { FSL_XCVR_TX_CS_DATA_5, 0x00000000 }, + { FSL_XCVR_TX_DPTH_CNTR_CTRL, 0x00000000 }, + { FSL_XCVR_TX_DPTH_CNTR_CTRL_SET, 0x00000000 }, + { FSL_XCVR_TX_DPTH_CNTR_CTRL_CLR, 0x00000000 }, + { FSL_XCVR_TX_DPTH_CNTR_CTRL_TOG, 0x00000000 }, + { FSL_XCVR_TX_DPTH_TSCR, 0x00000000 }, + { FSL_XCVR_TX_DPTH_BCR, 0x00000000 }, + { FSL_XCVR_TX_DPTH_BCTR, 0x00000000 }, + { FSL_XCVR_TX_DPTH_BCRR, 0x00000000 }, { FSL_XCVR_DEBUG_REG_0, 0x00000000 }, { FSL_XCVR_DEBUG_REG_1, 0x00000000 }, }; @@ -975,6 +991,14 @@ static bool fsl_xcvr_readable_reg(struct device *dev, unsigned int reg) case FSL_XCVR_RX_DPTH_CTRL_SET: case FSL_XCVR_RX_DPTH_CTRL_CLR: case FSL_XCVR_RX_DPTH_CTRL_TOG: + case FSL_XCVR_RX_DPTH_CNTR_CTRL: + case FSL_XCVR_RX_DPTH_CNTR_CTRL_SET: + case FSL_XCVR_RX_DPTH_CNTR_CTRL_CLR: + case FSL_XCVR_RX_DPTH_CNTR_CTRL_TOG: + case FSL_XCVR_RX_DPTH_TSCR: + case FSL_XCVR_RX_DPTH_BCR: + case FSL_XCVR_RX_DPTH_BCTR: + case FSL_XCVR_RX_DPTH_BCRR: case FSL_XCVR_TX_DPTH_CTRL: case FSL_XCVR_TX_DPTH_CTRL_SET: case FSL_XCVR_TX_DPTH_CTRL_CLR: @@ -985,6 +1009,14 @@ static bool fsl_xcvr_readable_reg(struct device *dev, unsigned int reg) case FSL_XCVR_TX_CS_DATA_3: case FSL_XCVR_TX_CS_DATA_4: case FSL_XCVR_TX_CS_DATA_5: + case FSL_XCVR_TX_DPTH_CNTR_CTRL: + case FSL_XCVR_TX_DPTH_CNTR_CTRL_SET: + case FSL_XCVR_TX_DPTH_CNTR_CTRL_CLR: + case FSL_XCVR_TX_DPTH_CNTR_CTRL_TOG: + case FSL_XCVR_TX_DPTH_TSCR: + case FSL_XCVR_TX_DPTH_BCR: + case FSL_XCVR_TX_DPTH_BCTR: + case FSL_XCVR_TX_DPTH_BCRR: case FSL_XCVR_DEBUG_REG_0: case FSL_XCVR_DEBUG_REG_1: return true; @@ -1017,6 +1049,10 @@ static bool fsl_xcvr_writeable_reg(struct device *dev, unsigned int reg) case FSL_XCVR_RX_DPTH_CTRL_SET: case FSL_XCVR_RX_DPTH_CTRL_CLR: case FSL_XCVR_RX_DPTH_CTRL_TOG: + case FSL_XCVR_RX_DPTH_CNTR_CTRL: + case FSL_XCVR_RX_DPTH_CNTR_CTRL_SET: + case FSL_XCVR_RX_DPTH_CNTR_CTRL_CLR: + case FSL_XCVR_RX_DPTH_CNTR_CTRL_TOG: case FSL_XCVR_TX_DPTH_CTRL_SET: case FSL_XCVR_TX_DPTH_CTRL_CLR: case FSL_XCVR_TX_DPTH_CTRL_TOG: @@ -1026,6 +1062,10 @@ static bool fsl_xcvr_writeable_reg(struct device *dev, unsigned int reg) case FSL_XCVR_TX_CS_DATA_3: case FSL_XCVR_TX_CS_DATA_4: case FSL_XCVR_TX_CS_DATA_5: + case FSL_XCVR_TX_DPTH_CNTR_CTRL: + case FSL_XCVR_TX_DPTH_CNTR_CTRL_SET: + case FSL_XCVR_TX_DPTH_CNTR_CTRL_CLR: + case FSL_XCVR_TX_DPTH_CNTR_CTRL_TOG: return true; default: return false; diff --git a/sound/soc/fsl/fsl_xcvr.h b/sound/soc/fsl/fsl_xcvr.h index 7f2853c60085..4769b0fca21d 100644 --- a/sound/soc/fsl/fsl_xcvr.h +++ b/sound/soc/fsl/fsl_xcvr.h @@ -49,6 +49,16 @@ #define FSL_XCVR_RX_DPTH_CTRL_CLR 0x188 #define FSL_XCVR_RX_DPTH_CTRL_TOG 0x18c +#define FSL_XCVR_RX_DPTH_CNTR_CTRL 0x1C0 +#define FSL_XCVR_RX_DPTH_CNTR_CTRL_SET 0x1C4 +#define FSL_XCVR_RX_DPTH_CNTR_CTRL_CLR 0x1C8 +#define FSL_XCVR_RX_DPTH_CNTR_CTRL_TOG 0x1CC + +#define FSL_XCVR_RX_DPTH_TSCR 0x1D0 +#define FSL_XCVR_RX_DPTH_BCR 0x1D4 +#define FSL_XCVR_RX_DPTH_BCTR 0x1D8 +#define FSL_XCVR_RX_DPTH_BCRR 0x1DC + #define FSL_XCVR_TX_DPTH_CTRL 0x220 /* TX datapath ctrl reg */ #define FSL_XCVR_TX_DPTH_CTRL_SET 0x224 #define FSL_XCVR_TX_DPTH_CTRL_CLR 0x228 @@ -59,6 +69,17 @@ #define FSL_XCVR_TX_CS_DATA_3 0x23C #define FSL_XCVR_TX_CS_DATA_4 0x240 #define FSL_XCVR_TX_CS_DATA_5 0x244 + +#define FSL_XCVR_TX_DPTH_CNTR_CTRL 0x260 +#define FSL_XCVR_TX_DPTH_CNTR_CTRL_SET 0x264 +#define FSL_XCVR_TX_DPTH_CNTR_CTRL_CLR 0x268 +#define FSL_XCVR_TX_DPTH_CNTR_CTRL_TOG 0x26C + +#define FSL_XCVR_TX_DPTH_TSCR 0x270 +#define FSL_XCVR_TX_DPTH_BCR 0x274 +#define FSL_XCVR_TX_DPTH_BCTR 0x278 +#define FSL_XCVR_TX_DPTH_BCRR 0x27C + #define FSL_XCVR_DEBUG_REG_0 0x2E0 #define FSL_XCVR_DEBUG_REG_1 0x2F0 -- 2.34.1

2 1

[PATCH 0/3] Add support for SAI on i.MX93 platform
by Chancel Liu 28 Oct '22

28 Oct '22

This patchset supports SAI on i.MX93 platform. Chancel Liu (3): ASoC: dt-bindings: fsl,sai: Add compatible string for i.MX93 platform ASoC: fsl_sai: Add support for i.MX93 platform ASoC: fsl_sai: Specify the maxburst to 8 on i.MX93 platform .../devicetree/bindings/sound/fsl,sai.yaml | 1 + sound/soc/fsl/fsl_sai.c | 23 +++++++++++++++---- sound/soc/fsl/fsl_sai.h | 1 + 3 files changed, 21 insertions(+), 4 deletions(-) -- 2.25.1

5 8

[PATCH v1] ALSA: hda/realtek: Add quirk for ASUS Zenbook using CS35L41
by Stefan Binding 28 Oct '22

28 Oct '22

This Asus Zenbook laptop use Realtek HDA codec combined with 2xCS35L41 Amplifiers using I2C with Internal Boost. Signed-off-by: Stefan Binding <sbinding(a)opensource.cirrus.com> --- sound/pci/hda/patch_realtek.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index 701a72ec5629a..b4f7ff8cfe41b 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -9404,6 +9404,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { SND_PCI_QUIRK(0x1043, 0x1e8e, "ASUS Zephyrus G15", ALC289_FIXUP_ASUS_GA401), SND_PCI_QUIRK(0x1043, 0x1c52, "ASUS Zephyrus G15 2022", ALC289_FIXUP_ASUS_GA401), SND_PCI_QUIRK(0x1043, 0x1f11, "ASUS Zephyrus G14", ALC289_FIXUP_ASUS_GA401), + SND_PCI_QUIRK(0x1043, 0x1f12, "ASUS UM5302", ALC287_FIXUP_CS35L41_I2C_2), SND_PCI_QUIRK(0x1043, 0x1f92, "ASUS ROG Flow X16", ALC289_FIXUP_ASUS_GA401), SND_PCI_QUIRK(0x1043, 0x3030, "ASUS ZN270IE", ALC256_FIXUP_ASUS_AIO_GPIO2), SND_PCI_QUIRK(0x1043, 0x831a, "ASUS P901", ALC269_FIXUP_STEREO_DMIC), -- 2.34.1

2 1

[PATCH 0/6] soundwire: qcom: fixes and support for v1.7
by Srinivas Kandagatla 28 Oct '22

28 Oct '22

This patchset has 2 fixes around fifo handling adds support for v1.7.0 controller found in SM8450 SoCs. Also a patch to make reset optional for v1.6 as this is not required for sc8280xp. Thanks, Srini Srinivas Kandagatla (6): soundwire: qcom: reinit broadcast completion soundwire: qcom: check for outanding writes before doing a read soundwire: qcom: remove unused SWRM_SPECIAL_CMD_ID soundwire: qcom: make reset optional for v1.6 controller dt-bindings: soundwire: qcom: add v1.7.0 support soundwire: qcom: add support for v1.7 Soundwire Controller .../bindings/soundwire/qcom,sdw.txt | 1 + drivers/soundwire/qcom.c | 34 ++++++++++++++++--- 2 files changed, 30 insertions(+), 5 deletions(-) -- 2.21.0

4 11

alsamixer not readable in xterm
by GitHub issues - opened 28 Oct '22

28 Oct '22

alsa-project/alsa-utils issue #176 was opened from Frank-Steiner: Hi, after upgrading from opensuse 15.3 to 15.4 we realized alsamixer is not useable in standard xterm with white background (which is our default) because the black background vanished. Found https://mailman.alsa-project.org/pipermail/alsa-devel/2021-June/185925.html which explains it. But that patch was a bad idea for everyone just using standard xterms and not themed ones. Adding sth. like a "--black-background" switch could be helpful for those people not working with themed X11... cu, Frank Issue URL : https://github.com/alsa-project/alsa-utils/issues/176 Repository URL: https://github.com/alsa-project/alsa-utils

1 0

[RFC][PATCH v2 29/31] timers: ALSA: Use del_timer_shutdown() before freeing timer
by Steven Rostedt 28 Oct '22

28 Oct '22

From: "Steven Rostedt (Google)" <rostedt(a)goodmis.org> Before a timer is freed, del_timer_shutdown() must be called. Link: https://lore.kernel.org/all/20220407161745.7d6754b3@gandalf.local.home/ Cc: Jaroslav Kysela <perex(a)perex.cz> Cc: Takashi Iwai <tiwai(a)suse.com> Cc: Austin Kim <austin.kim(a)lge.com> Cc: alsa-devel(a)alsa-project.org Signed-off-by: Steven Rostedt (Google) <rostedt(a)goodmis.org> --- sound/i2c/other/ak4117.c | 2 +- sound/synth/emux/emux.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/i2c/other/ak4117.c b/sound/i2c/other/ak4117.c index 1bc43e927d82..5269ab7321a4 100644 --- a/sound/i2c/other/ak4117.c +++ b/sound/i2c/other/ak4117.c @@ -47,7 +47,7 @@ static void reg_dump(struct ak4117 *ak4117) static void snd_ak4117_free(struct ak4117 *chip) { - del_timer_sync(&chip->timer); + del_timer_shutdown(&chip->timer); kfree(chip); } diff --git a/sound/synth/emux/emux.c b/sound/synth/emux/emux.c index a870759d179e..a43025f466bb 100644 --- a/sound/synth/emux/emux.c +++ b/sound/synth/emux/emux.c @@ -129,7 +129,7 @@ int snd_emux_free(struct snd_emux *emu) if (! emu) return -EINVAL; - del_timer_sync(&emu->tlist); + del_timer_shutdown(&emu->tlist); snd_emux_proc_free(emu); snd_emux_delete_virmidi(emu); -- 2.35.1

2 1

[PATCH] ASoc: cs42xx8-i2c.c: add module device table for of
by Peter Bergin 28 Oct '22

28 Oct '22

When trying to connect the device with the driver through of it is not working. The of_device_id is defined in cs42xx8.c but is not correctly included in cs42xx8-i2c.c. Also add the matching table for of in the i2c file. Signed-off-by: Peter Bergin <peter(a)berginkonsult.se> --- sound/soc/codecs/cs42xx8-i2c.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/sound/soc/codecs/cs42xx8-i2c.c b/sound/soc/codecs/cs42xx8-i2c.c index cb06a06d48b0..6e8ee28d01f8 100644 --- a/sound/soc/codecs/cs42xx8-i2c.c +++ b/sound/soc/codecs/cs42xx8-i2c.c @@ -37,6 +37,13 @@ static int cs42xx8_i2c_remove(struct i2c_client *i2c) return 0; } +const struct of_device_id cs42xx8_of_match[] = { + { .compatible = "cirrus,cs42448", .data = &cs42448_data, }, + { .compatible = "cirrus,cs42888", .data = &cs42888_data, }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, cs42xx8_of_match); + static struct i2c_device_id cs42xx8_i2c_id[] = { {"cs42448", (kernel_ulong_t)&cs42448_data}, {"cs42888", (kernel_ulong_t)&cs42888_data}, -- 2.34.1

4 7

[PATCH v2] ASoC: dt-bindings: Document audio OF graph dai-tdm-slot-num dai-tdm-slot-width props
by Marek Vasut 27 Oct '22

27 Oct '22

Document dai-tdm-slot-num and dai-tdm-slot-width props as those are parsed by simple graph card and may therefore appear in audio OF graph node. Signed-off-by: Marek Vasut <marex(a)denx.de> --- Cc: Krzysztof Kozlowski <krzysztof.kozlowski(a)linaro.org> Cc: Liam Girdwood <lgirdwood(a)gmail.com> Cc: Mark Brown <broonie(a)kernel.org> Cc: Rob Herring <robh+dt(a)kernel.org> Cc: devicetree(a)vger.kernel.org Cc: alsa-devel(a)alsa-project.org To: linux-arm-kernel(a)lists.infradead.org --- V2: Drop the definition refs and just fill in type and description --- .../devicetree/bindings/sound/audio-graph-port.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/sound/audio-graph-port.yaml b/Documentation/devicetree/bindings/sound/audio-graph-port.yaml index bc46a95ed8400..64654ceef2089 100644 --- a/Documentation/devicetree/bindings/sound/audio-graph-port.yaml +++ b/Documentation/devicetree/bindings/sound/audio-graph-port.yaml @@ -74,6 +74,12 @@ patternProperties: convert-sample-format: $ref: "/schemas/sound/dai-params.yaml#/$defs/dai-sample-format" + dai-tdm-slot-num: + description: Number of slots in use. + $ref: /schemas/types.yaml#/definitions/uint32 + dai-tdm-slot-width: + description: Width in bits for each slot. + $ref: /schemas/types.yaml#/definitions/uint32 dai-tdm-slot-width-map: description: Mapping of sample widths to slot widths. For hardware that cannot support a fixed slot width or a slot width always -- 2.35.1

4 4

[PATCH 00/16] ASoC: SOF: Intel: HDaudio cleanups
by Pierre-Louis Bossart 27 Oct '22

27 Oct '22

This is the part1 of my HDaudio cleanups, before the addition of to-be-announced HDaudio extensions. The patchset includes more consistent use of read/write/update helpers, removal of useless waits, structure members and programming sequences, removal of confusing sharing of private_data between FE and BE. Additional patches are coming to split the controller, codec and multi-link management functionality in well-identified files. Pierre-Louis Bossart (16): ASoC: SOF: ops: fallback to mmio in helpers ASoC: SOF: Intel: use mmio fallback for all platforms ASoC: SOF: ops: add readb/writeb helpers ASoC: SOF: ops: add snd_sof_dsp_updateb() helper ASoC: SOF: Intel: hda-dsp: use SOF helpers for consistency ASoC: SOF: Intel: hda-dai: start removing the use of runtime->private_data in BE ASoC: SOF: Intel: hda-dai: use component_get_drvdata to find hdac_bus ASoC: SOF: Intel: hda-dai: remove useless members in hda_pipe_params ASoC: SOF: Intel: hda-ctrl: remove useless sleep ASoC: SOF: Intel: hda: always do a full reset ASoC: SOF: Intel: hda: remove useless check on GCTL ASoC: SOF: Intel: hda-stream: use SOF helpers for consistency ASoC: SOF: Intel: hda-stream: rename CL_SD_CTL registers as SD_CTL ASoC: SOF: Intel: hda: use SOF helper for consistency ASoC: SOF: Intel: hda-stream: use snd_sof_dsp_updateb() helper ASoC: SOF: Intel: hda-stream: use readb/writeb for stream registers sound/soc/sof/intel/bdw.c | 6 +--- sound/soc/sof/intel/byt.c | 12 ++----- sound/soc/sof/intel/hda-common-ops.c | 6 +--- sound/soc/sof/intel/hda-ctrl.c | 41 ++++++++-------------- sound/soc/sof/intel/hda-dai.c | 31 +++++++---------- sound/soc/sof/intel/hda-dsp.c | 12 ++++--- sound/soc/sof/intel/hda-loader-skl.c | 30 ++++++++-------- sound/soc/sof/intel/hda-loader.c | 4 +-- sound/soc/sof/intel/hda-stream.c | 47 ++++++++++++------------- sound/soc/sof/intel/hda.c | 5 ++- sound/soc/sof/intel/hda.h | 25 +++++++------- sound/soc/sof/intel/pci-tng.c | 6 +--- sound/soc/sof/ops.h | 51 ++++++++++++++++++++-------- sound/soc/sof/sof-priv.h | 4 +++ 14 files changed, 136 insertions(+), 144 deletions(-) -- 2.34.1

3 20

Add Focusrite Scarlett 2i2 gen2
by GitHub pull_request - opened 27 Oct '22

27 Oct '22

alsa-project/alsa-ucm-conf pull request #234 was opened from superseed: This is basically #203 but for the 2i2. I don't really know what I'm doing, but with these changes, I get two separate mono inputs in Pipewire, which is what I was looking for. Request URL : https://github.com/alsa-project/alsa-ucm-conf/pull/234 Patch URL : https://github.com/alsa-project/alsa-ucm-conf/pull/234.patch Repository URL: https://github.com/alsa-project/alsa-ucm-conf

1 0

[BUG][v6.1-rc2] [SOF] max98373 i2c-MX98373:00: Runtime PM usage count underflow!
by Lukasz Majczak 27 Oct '22

27 Oct '22

Hi, I have noticed Runtime PM usage count underflow on my Chromebook (12th Gen Intel(R) Core(TM) i3-1215U) running vanilla v6.1-rc2: [ 7.558178] max98373 i2c-MX98373:00: Runtime PM usage count underflow! [ 7.558188] max98373 i2c-MX98373:01: Runtime PM usage count underflow! [ 7.558206] snd-soc-dummy snd-soc-dummy: Runtime PM usage count underflow! [ 7.558421] snd-soc-dummy snd-soc-dummy: Runtime PM usage count underflow! Link to the full dmesg: https://gist.github.com/semihalf-majczak-lukasz/d6a6d61d5937f762a524ed50fed… Best regards, Lukasz

2 1

[PATCH] ALSA: Use del_timer_sync() before freeing timer
by Steven Rostedt 27 Oct '22

27 Oct '22

From: "Steven Rostedt (Google)" <rostedt(a)goodmis.org> The current code for freeing the emux timer is extremely dangerous: CPU0 CPU1 ---- ---- snd_emux_timer_callback() snd_emux_free() spin_lock(&emu->voice_lock) del_timer(&emu->tlist); <-- returns immediately spin_unlock(&emu->voice_lock); [..] kfree(emu); spin_lock(&emu->voice_lock); [BOOM!] Instead just use del_timer_sync() which will wait for the timer to finish before continuing. No need to check if the timer is active or not when doing so. This doesn't fix the race of a possible re-arming of the timer, but at least it won't use the data that has just been freed. Cc: stable(a)vger.kernel.org Fixes: 1da177e4c3f4 ("Linux-2.6.12-rc2") Signed-off-by: Steven Rostedt (Google) <rostedt(a)goodmis.org> --- sound/synth/emux/emux.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/sound/synth/emux/emux.c b/sound/synth/emux/emux.c index 5ed8e36d2e04..a2ee78809cfb 100644 --- a/sound/synth/emux/emux.c +++ b/sound/synth/emux/emux.c @@ -131,10 +131,7 @@ int snd_emux_free(struct snd_emux *emu) if (! emu) return -EINVAL; - spin_lock_irqsave(&emu->voice_lock, flags); - if (emu->timer_active) - del_timer(&emu->tlist); - spin_unlock_irqrestore(&emu->voice_lock, flags); + del_timer_sync(&emu->tlist); snd_emux_proc_free(emu); snd_emux_delete_virmidi(emu); -- 2.35.1

4 4

[PATCH 0/2] ASoC: Intel: sof_rt5682: quirk auto detection
by Brent Lu 27 Oct '22

27 Oct '22

A new feature to compose quirk value according to the result of amplifier and SoC type detection at runtime. Brent Lu (2): ASoC: Intel: add helpers to detect SoCs ASoC: Intel: sof_rt5682: quirk auto detection include/linux/platform_data/x86/soc.h | 24 +++ sound/soc/intel/boards/sof_rt5682.c | 173 +++++++----------- .../intel/common/soc-acpi-intel-adl-match.c | 12 +- .../intel/common/soc-acpi-intel-jsl-match.c | 6 +- .../intel/common/soc-acpi-intel-tgl-match.c | 6 +- 5 files changed, 101 insertions(+), 120 deletions(-) -- 2.25.1

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Re: [PATCH 6/6] ASoC: Intel: boards: add missing dependency from realtek-common
by Mark Brown 27 Oct '22

27 Oct '22

On Mon, Oct 17, 2022 at 08:17:12AM +0200, Adam Borowski wrote: > These boards use code from sound/soc/sof/sof-audio.c > > Fixes: e1d5e13324020c4b405e63cae34560c7992bec2e > Signed-off-by: Adam Borowski <kilobyte(a)angband.pl> Please include human readable descriptions of things like commits and issues being discussed in e-mail in your mails, this makes them much easier for humans to read especially when they have no internet access. I do frequently catch up on my mail on flights or while otherwise travelling so this is even more pressing for me than just being about making things a bit easier to read. You've not incldued a cover letter for this and only copied me on some patches, are there any dependency issues?

1 0

[PATCH v3 0/9] ASoC: Intel: avs: PCM power management
by Cezary Rojewski 27 Oct '22

27 Oct '22

Goal of the series is implementation of suspend/resume operations for a PCM stream along with all the collaterals connected to the subject. Start with splitting avs_dai_fe_hw_free() as ideally we would like to reuse as much of existing code as possible but snd_pcm_lib_free_pages() is not desired part of the function when speaking of suspend operation. The actual implementation of suspend/resume() for component drivers follows. For most scenarios, the PM flow is similar to standard streaming one, except for the part where the position register are being saved and the lack of PCM pages freeing. To reduce code duplication, all avs_dai_suspend_XXX() and avs_dai_resume_XXX() functions reuse their non-PM equivalents. Order of operations is affected by the fact that path binding/unbinding happens only in FE part of the stream. Above essentially unlocks SX+streaming scenarios i.e.: power transitions with an ongoing stream. As some streams are allowed to run in low power state, support is provided for S0iX state. The handlers check ACPI capabilities and the number of active low-power paths before deciding between SX and S0iX flows. The last portion of the patchset is addition of power/clock gating overrides. There is no single set of registers that ensures AudioDSP firmware loads 100% of time on every single configuration. By having them exposed, user can have the loading procedure behavior adjusted for their configuration without having to recompile the kernel. Changes in v3: - fixed unused-but-set-variable warnings reported by the test robot Changes in v2: - moved DRSM reg polling to separate function, snd_hdac_stream_wait_drsm() as suggested by Pierre - moved the acpi_gbl_FADT under AVS_S0IX_SUPPORTED macro and relocated the checks from pcm.c to topology.c so that the low-power streams are filtered as early as possible - fixed compilation when CONFIG_ACPI is disabled as reported by the test robot - simplified all the avs_dai_resume/suspend_xxx() by moving ->ignore_suspend check one level up, to avs_component_pm_op() (patch 0002) Amadeusz Sławiński (1): ASoC: Intel: avs: Handle SUSPEND and RESUME triggers Cezary Rojewski (7): ASoC: Intel: avs: Split pcm pages freeing operation from hw_free() ASoC: Intel: avs: Introduce PCM power management routines ALSA: hda: Introduce snd_hdac_stream_wait_drsm() ASoC: Intel: avs: Restart instead of resuming HDA capture streams ASoC: Intel: avs: Count low power streams ASoC: Intel: avs: Power and clock gating policy overriding ASoC: Intel: avs: Enact power gating policy Piotr Maziarz (1): ASoC: Intel: avs: Standby power-state support include/sound/hdaudio.h | 1 + include/sound/hdaudio_ext.h | 5 + sound/hda/hdac_stream.c | 21 ++ sound/soc/intel/avs/avs.h | 8 + sound/soc/intel/avs/core.c | 97 +++++++-- sound/soc/intel/avs/loader.c | 10 + sound/soc/intel/avs/pcm.c | 368 +++++++++++++++++++++++++++++---- sound/soc/intel/avs/topology.c | 10 + 8 files changed, 460 insertions(+), 60 deletions(-) -- 2.25.1

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[PATCH] ASoC: sof_es8336: reduce pop noise on speaker
by Zhu Ning 27 Oct '22

27 Oct '22

The Speaker GPIO needs to be turned on slightly behind the codec turned on. It also need to be turned off slightly before the codec turned down. Current code uses delay in DAPM_EVENT to do it but the mdelay delays the DAPM itself and thus has no effect. A delayed_work is added to turn on the speaker. The Speaker is turned off in .trigger since trigger is called slightly before the DAPM events. Signed-off-by: Zhu Ning <zhuning(a)everest-semi.com> --- sound/soc/intel/boards/sof_es8336.c | 58 ++++++++++++++++++++++------- 1 file changed, 44 insertions(+), 14 deletions(-) diff --git a/sound/soc/intel/boards/sof_es8336.c b/sound/soc/intel/boards/sof_es8336.c index fbb42e54947a..7fde36a02d11 100644 --- a/sound/soc/intel/boards/sof_es8336.c +++ b/sound/soc/intel/boards/sof_es8336.c @@ -63,6 +63,7 @@ struct sof_es8336_private { struct snd_soc_jack jack; struct list_head hdmi_pcm_list; bool speaker_en; + struct delayed_work pcm_pop_work; }; struct sof_hdmi_pcm { @@ -111,6 +112,44 @@ static void log_quirks(struct device *dev) dev_info(dev, "quirk headset at mic1 port enabled\n"); } +static void pcm_pop_work_events(struct work_struct *work) +{ + struct sof_es8336_private *priv = + container_of(work, struct sof_es8336_private, pcm_pop_work.work); + + gpiod_set_value_cansleep(priv->gpio_speakers, priv->speaker_en); + + if (quirk & SOF_ES8336_HEADPHONE_GPIO) + gpiod_set_value_cansleep(priv->gpio_headphone, priv->speaker_en); + +} + +static int sof_8336_trigger(struct snd_pcm_substream *substream, int cmd) +{ + struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); + struct snd_soc_card *card = rtd->card; + struct sof_es8336_private *priv = snd_soc_card_get_drvdata(card); + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + case SNDRV_PCM_TRIGGER_RESUME: + break; + + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_STOP: + if (priv->speaker_en == false) + if (substream->stream == 0) + gpiod_set_value_cansleep(priv->gpio_speakers, true); + break; + default: + return -EINVAL; + } + + return 0; +} + static int sof_es8316_speaker_power_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { @@ -122,19 +161,7 @@ static int sof_es8316_speaker_power_event(struct snd_soc_dapm_widget *w, priv->speaker_en = !SND_SOC_DAPM_EVENT_ON(event); - if (SND_SOC_DAPM_EVENT_ON(event)) - msleep(70); - - gpiod_set_value_cansleep(priv->gpio_speakers, priv->speaker_en); - - if (!(quirk & SOF_ES8336_HEADPHONE_GPIO)) - return 0; - - if (SND_SOC_DAPM_EVENT_ON(event)) - msleep(70); - - gpiod_set_value_cansleep(priv->gpio_headphone, priv->speaker_en); - + queue_delayed_work(system_wq, &priv->pcm_pop_work, msecs_to_jiffies(70)); return 0; } @@ -344,6 +371,7 @@ static int sof_es8336_hw_params(struct snd_pcm_substream *substream, /* machine stream operations */ static struct snd_soc_ops sof_es8336_ops = { .hw_params = sof_es8336_hw_params, + .trigger = sof_8336_trigger, }; static struct snd_soc_dai_link_component platform_component[] = { @@ -723,7 +751,8 @@ static int sof_es8336_probe(struct platform_device *pdev) } INIT_LIST_HEAD(&priv->hdmi_pcm_list); - + INIT_DELAYED_WORK(&priv->pcm_pop_work, + pcm_pop_work_events); snd_soc_card_set_drvdata(card, priv); if (mach->mach_params.dmic_num > 0) { @@ -752,6 +781,7 @@ static int sof_es8336_remove(struct platform_device *pdev) struct snd_soc_card *card = platform_get_drvdata(pdev); struct sof_es8336_private *priv = snd_soc_card_get_drvdata(card); + cancel_delayed_work(&priv->pcm_pop_work); gpiod_put(priv->gpio_speakers); device_remove_software_node(priv->codec_dev); put_device(priv->codec_dev); -- 2.37.2

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[PATCH] ALSA: aoa: i2sbus: fix possible memory leak in i2sbus_add_dev()
by Yang Yingliang 27 Oct '22

27 Oct '22

dev_set_name() in soundbus_add_one() allocates memory for name, it need be freed when of_device_register() fails, call soundbus_dev_put() to give up the reference that hold in device_initialize(), so that it can be freed in kobject_cleanup() when the refcount hit to 0. And other resources are also freed in i2sbus_release_dev(), so it can return 0 directly. Fixes: f3d9478b2ce4 ("[ALSA] snd-aoa: add snd-aoa") Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- sound/aoa/soundbus/i2sbus/core.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/sound/aoa/soundbus/i2sbus/core.c b/sound/aoa/soundbus/i2sbus/core.c index faf6b03131ee..f6841daf9e3b 100644 --- a/sound/aoa/soundbus/i2sbus/core.c +++ b/sound/aoa/soundbus/i2sbus/core.c @@ -302,6 +302,10 @@ static int i2sbus_add_dev(struct macio_dev *macio, if (soundbus_add_one(&dev->sound)) { printk(KERN_DEBUG "i2sbus: device registration error!\n"); + if (dev->sound.ofdev.dev.kobj.state_initialized) { + soundbus_dev_put(&dev->sound); + return 0; + } goto err; } -- 2.25.1

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[PATCH] ALSA: aoa: Fix I2S device accounting
by Takashi Iwai 27 Oct '22

27 Oct '22

i2sbus_add_dev() is supposed to return the number of probed devices, i.e. either 1 or 0. However, i2sbus_add_dev() has one error handling that returns -ENODEV; this will screw up the accumulation number counted in the caller, i2sbus_probe(). Fix the return value to 0 and add the comment for better understanding for readers. Fixes: f3d9478b2ce4 ("[ALSA] snd-aoa: add snd-aoa") Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- sound/aoa/soundbus/i2sbus/core.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/sound/aoa/soundbus/i2sbus/core.c b/sound/aoa/soundbus/i2sbus/core.c index f6841daf9e3b..51ed2f34b276 100644 --- a/sound/aoa/soundbus/i2sbus/core.c +++ b/sound/aoa/soundbus/i2sbus/core.c @@ -147,6 +147,7 @@ static int i2sbus_get_and_fixup_rsrc(struct device_node *np, int index, return rc; } +/* Returns 1 if added, 0 for otherwise; don't return a negative value! */ /* FIXME: look at device node refcounting */ static int i2sbus_add_dev(struct macio_dev *macio, struct i2sbus_control *control, @@ -213,7 +214,7 @@ static int i2sbus_add_dev(struct macio_dev *macio, * either as the second one in that case is just a modem. */ if (!ok) { kfree(dev); - return -ENODEV; + return 0; } mutex_init(&dev->lock); -- 2.35.3

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[GIT PULL] ASoC fixes for v6.1-rc2
by Mark Brown 27 Oct '22

27 Oct '22

The following changes since commit 9abf2313adc1ca1b6180c508c25f22f9395cc780: Linux 6.1-rc1 (2022-10-16 15:36:24 -0700) are available in the Git repository at: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git tags/asoc-fix-v6.1-rc2 for you to fetch changes up to e9441675edc1bb8dbfadacf68aafacca60d65a25: ASoC: SOF: Intel: hda-codec: fix possible memory leak in hda_codec_device_init() (2022-10-21 13:04:14 +0100) ---------------------------------------------------------------- ASoC: Fixes for v6.1 Quite a few fixes here, a lot driver specific, plus some new quirks. There was a bit of a mess with the runtime PM handling due to some confusion in the API there which resulted in a number of commits and reverts but that should all be stable now. ---------------------------------------------------------------- Aidan MacDonald (1): ASoC: simple-card: Fix up checks for HW param fixups Colin Ian King (1): ASoC: codecs: jz4725b: Fix spelling mistake "Sourc" -> "Source", "Routee" -> "Route" Derek Fang (2): ASoC: rt5682s: Fix the TDM Tx settings ASoC: rt1019: Fix the TDM settings Geert Uytterhoeven (1): ASoC: codecs: tlv320adc3xxx: Wrap adc3xxx_i2c_remove() in __exit_p() Jiangshan Yi (1): ASoC: cx2072x: fix spelling typo in comment Kai Vehmanen (1): ASoC: SOF: ipc4-mtrace: protect per-core nodes against multiple open Leohearts (1): ASoC: amd: yc: Add Lenovo Thinkbook 14+ 2022 21D0 to quirks table Mark Brown (2): ASoC: wmxxxx: Revert old "ASoC: wmxxxx: Fix PM disable depth imbalance in wmxxxx_probe" ASoC: jz4752b: Capture fixes Peter Ujfalusi (1): Revert "ASoC: soc-component: using pm_runtime_resume_and_get instead of pm_runtime_get_sync" Pierre-Louis Bossart (3): ASoC: Intel: sof_sdw: add quirk variant for LAPBC710 NUC15 ASoC: SOF: Intel: pci-mtl: fix firmware name ASoC: SOF: Intel: pci-tgl: fix ADL-N descriptor Randy Dunlap (2): ASoC: codec: tlv320adc3xxx: add GPIOLIB dependency ASoC: qcom: SND_SOC_SC7180 optionally depends on SOUNDWIRE Shuming Fan (2): ASoC: rt1308-sdw: update the preset settings ASoC: rt1308-sdw: add the default value of some registers Siarhei Volkau (4): ASoC: codecs: jz4725b: add missed Line In power control bit ASoC: codecs: jz4725b: fix reported volume for Master ctl ASoC: codecs: jz4725b: use right control for Capture Volume ASoC: codecs: jz4725b: fix capture selector naming Srinivasa Rao Mandadapu (2): ASoC: qcom: lpass-cpu: mark HDMI TX registers as volatile ASoC: qcom: lpass-cpu: Mark HDMI TX parity register as volatile Xiaolei Wang (1): ASoC: wm8962: Add an event handler for TEMP_HP and TEMP_SPK Yang Yingliang (2): ASoC: Intel: Skylake: fix possible memory leak in skl_codec_device_init() ASoC: SOF: Intel: hda-codec: fix possible memory leak in hda_codec_device_init() Yong Zhi (1): ASoC: Intel: sof_rt5682: Add quirk for Rex board Zhang Qilong (7): ASoC: wm8997: Fix PM disable depth imbalance in wm8997_probe ASoC: wm5110: Fix PM disable depth imbalance in wm5110_probe ASoC: wm5102: Fix PM disable depth imbalance in wm5102_probe ASoC: wm5102: Revert "ASoC: wm5102: Fix PM disable depth imbalance in wm5102_probe" ASoC: wm5110: Revert "ASoC: wm5110: Fix PM disable depth imbalance in wm5110_probe" ASoC: wm8997: Revert "ASoC: wm8997: Fix PM disable depth imbalance in wm8997_probe" ASoC: mt6660: Keep the pm_runtime enables before component stuff in mt6660_i2c_probe linkt (1): ASoC: amd: yc: Adding Lenovo ThinkBook 14 Gen 4+ ARA and Lenovo ThinkBook 16 Gen 4+ ARA to the Quirks List include/sound/simple_card_utils.h | 1 + sound/soc/amd/yc/acp6x-mach.c | 21 ++++++++++++++ sound/soc/codecs/Kconfig | 1 + sound/soc/codecs/cx2072x.h | 2 +- sound/soc/codecs/jz4725b.c | 34 ++++++++++++---------- sound/soc/codecs/mt6660.c | 8 +++--- sound/soc/codecs/rt1019.c | 20 +++++++------ sound/soc/codecs/rt1019.h | 6 ++++ sound/soc/codecs/rt1308-sdw.c | 17 +++++++++-- sound/soc/codecs/rt1308-sdw.h | 3 ++ sound/soc/codecs/rt1308.h | 5 ++++ sound/soc/codecs/rt5682s.c | 15 ++++++++-- sound/soc/codecs/rt5682s.h | 1 + sound/soc/codecs/tlv320adc3xxx.c | 2 +- sound/soc/codecs/wm5102.c | 7 +++-- sound/soc/codecs/wm5110.c | 7 +++-- sound/soc/codecs/wm8962.c | 54 +++++++++++++++++++++++++++++++++-- sound/soc/codecs/wm8997.c | 7 +++-- sound/soc/generic/audio-graph-card.c | 2 +- sound/soc/generic/simple-card-utils.c | 15 ++++++++++ sound/soc/generic/simple-card.c | 3 +- sound/soc/intel/boards/sof_rt5682.c | 12 ++++++++ sound/soc/intel/boards/sof_sdw.c | 11 +++++++ sound/soc/intel/skylake/skl.c | 8 +----- sound/soc/qcom/Kconfig | 1 + sound/soc/qcom/lpass-cpu.c | 10 +++++++ sound/soc/soc-component.c | 6 ++-- sound/soc/sof/intel/hda-codec.c | 8 +----- sound/soc/sof/intel/pci-mtl.c | 2 +- sound/soc/sof/intel/pci-tgl.c | 30 ++++++++++++++++++- sound/soc/sof/ipc4-mtrace.c | 20 +++++++++++-- 31 files changed, 270 insertions(+), 69 deletions(-)

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[Regression] Bug 216613 - Sound stopped working with v6.0.3 on Lenovo T14 Gen2i: ASoC: error at snd_soc_component_probe
by Thorsten Leemhuis 27 Oct '22

27 Oct '22

Hi, this is your Linux kernel regression tracker speaking. I noticed a regression report in bugzilla.kernel.org. As many (most?) kernel developer don't keep an eye on it, I decided to forward it by mail. Quoting from https://bugzilla.kernel.org/show_bug.cgi?id=216613 : > Grzegorz Alibożek 2022-10-21 19:26:43 UTC > > After upgrade kernel from 6.0.2 to 6.0.3 on Lenovo T14 Gen2i, sound stopped working. > dmesg: > > paź 21 21:11:45 kernel: snd_hda_codec_hdmi ehdaudio0D2: failed to create hda codec -12 > paź 21 21:11:45 kernel: snd_hda_codec_hdmi ehdaudio0D2: ASoC: error at snd_soc_component_probe on ehdaudio0D2: -12 > paź 21 21:11:45 kernel: skl_hda_dsp_generic skl_hda_dsp_generic: ASoC: failed to instantiate card -12 > > [reply] [−] Comment 1 Grzegorz Alibożek 2022-10-21 19:56:43 UTC > > Created attachment 303070 [details] > trace See the ticket for more details. BTW, let me use this mail to also add the report to the list of tracked regressions to ensure it's doesn't fall through the cracks: #regzbot introduced: v6.0.2..v6.0.3 https://bugzilla.kernel.org/show_bug.cgi?id=216613 #regzbot ignore-activity Ciao, Thorsten (wearing his 'the Linux kernel's regression tracker' hat) P.S.: As the Linux kernel's regression tracker I deal with a lot of reports and sometimes miss something important when writing mails like this. If that's the case here, don't hesitate to tell me in a public reply, it's in everyone's interest to set the public record straight.

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Thanks to review question [PATCH V2 1/2] ASoc:codes:Add Awinic AW883XX audio amplifier driver
by wangweidong.a＠awinic.com 27 Oct '22

27 Oct '22

Hi Mark Brown Thank you for your valuable advice to let me understand the problem. I will fix this issue in the next patch Best regards Weidong Wang On Mon, Oct 24, 2022 at 10:41:03AM +0800, wangweidong.a(a)awinic.com wrote: > > Then it's not a mute function, the goal of the mute function is to > > run > before all the power management code to minimise glitches during power > management. Just implement the power management via the standard ASoC > power > > > management APIs. > The essence of calling mute is not switch dsp, but switch PA. We think > that PA has only two states. When no audio stream enters, turn off the > PA and turn off the PA's dsp. When the audio stream enters, the PA is > turned on, and the dsp is turned on at the same time > That's not what the mute function is for, the interface is specifically for muting the stream while power management changes are > going on. What you're describing is power management so should be controlled via DAPM. > If your device doesn't have any support for a separate mute function then it should just not implement anything for that in the > driver.

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[PATCH v2 0/9] ASoC: qdsp6: audioreach: add multi-port, SAL and MFC support
by Srinivas Kandagatla 26 Oct '22

26 Oct '22

This patchset adds support to multi-port connections between AudioReach Modules which is required for sophisticated graphs like ECNS or Speaker Protection. Also as part of ECNS testing new module support for SAL and MFC are added. Tested on SM8450 with ECNS. Thanks, Srini Changes since v1: Fixed two warnings on unused and unintialized variable. Srinivas Kandagatla (9): ASoC: qdsp6: audioreach: topology use idr_alloc_u32 ASoC: qdsp6: audioreach: remove unused connection_list ASoC: qdsp6: audioreach: update dapm kcontrol private data ASoC: qdsp6: audioreach: Simplify handing FE and BE graph connections ASoC: qdsp6: audioreach: simplify module_list sz calculation ASoC: qdsp6: audioreach: add support for more port connections ASoC: qdsp6: audioreach: add support to enable SAL Module ASoC: qdsp6: audioreach: add support for MFC Module ASoC: qdsp6: audioreach: add support to enable module command include/uapi/sound/snd_ar_tokens.h | 27 +++ sound/soc/qcom/qdsp6/audioreach.c | 310 ++++++++++++++++++++--------- sound/soc/qcom/qdsp6/audioreach.h | 47 +++-- sound/soc/qcom/qdsp6/q6apm.c | 84 +------- sound/soc/qcom/qdsp6/q6apm.h | 6 +- sound/soc/qcom/qdsp6/topology.c | 243 +++++++++++++++++++--- 6 files changed, 489 insertions(+), 228 deletions(-) -- 2.21.0

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[PATCH v1 1/2] ASoC: simple-card: Support custom DAI system clock IDs
by Aidan MacDonald 26 Oct '22

26 Oct '22

Some DAIs have multiple system clock sources, which can be chosen using the "clk_id" argument to snd_soc_dai_set_sysclk(). Currently this is hardcoded to 0 when using simple cards, but that choice is not always suitable. Add the "system-clock-id" property to allow selecting a different clock ID on a per-DAI basis. To simplify the logic on DPCM cards, add a dummy "asoc_simple_dai" instance and use that for the dummy components on DPCM links. This ensures that when we're iterating over DAIs in the PCM runtime there is always a matching "asoc_simple_dai" we can dereference. Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0(a)gmail.com> --- include/sound/simple_card_utils.h | 2 ++ sound/soc/generic/simple-card-utils.c | 26 ++++++++++++++++++++------ 2 files changed, 22 insertions(+), 6 deletions(-) diff --git a/include/sound/simple_card_utils.h b/include/sound/simple_card_utils.h index a0b827f0c2f6..9f9a72299637 100644 --- a/include/sound/simple_card_utils.h +++ b/include/sound/simple_card_utils.h @@ -26,6 +26,7 @@ struct asoc_simple_dai { const char *name; unsigned int sysclk; int clk_direction; + int sysclk_id; int slots; int slot_width; unsigned int tx_slot_mask; @@ -67,6 +68,7 @@ struct asoc_simple_priv { struct prop_nums num; unsigned int mclk_fs; } *dai_props; + struct asoc_simple_dai dummy_dai; struct asoc_simple_jack hp_jack; struct asoc_simple_jack mic_jack; struct snd_soc_dai_link *dai_link; diff --git a/sound/soc/generic/simple-card-utils.c b/sound/soc/generic/simple-card-utils.c index bef16833c487..d4d898e06e76 100644 --- a/sound/soc/generic/simple-card-utils.c +++ b/sound/soc/generic/simple-card-utils.c @@ -262,6 +262,9 @@ int asoc_simple_parse_clk(struct device *dev, if (of_property_read_bool(node, "system-clock-direction-out")) simple_dai->clk_direction = SND_SOC_CLOCK_OUT; + if (!of_property_read_u32(node, "system-clock-id", &val)) + simple_dai->sysclk_id = val; + return 0; } EXPORT_SYMBOL_GPL(asoc_simple_parse_clk); @@ -355,7 +358,7 @@ void asoc_simple_shutdown(struct snd_pcm_substream *substream) if (props->mclk_fs && !dai->clk_fixed && !snd_soc_dai_active(cpu_dai)) snd_soc_dai_set_sysclk(cpu_dai, - 0, 0, SND_SOC_CLOCK_OUT); + dai->sysclk_id, 0, SND_SOC_CLOCK_OUT); asoc_simple_clk_disable(dai); } @@ -364,7 +367,7 @@ void asoc_simple_shutdown(struct snd_pcm_substream *substream) if (props->mclk_fs && !dai->clk_fixed && !snd_soc_dai_active(codec_dai)) snd_soc_dai_set_sysclk(codec_dai, - 0, 0, SND_SOC_CLOCK_IN); + dai->sysclk_id, 0, SND_SOC_CLOCK_IN); asoc_simple_clk_disable(dai); } @@ -439,7 +442,7 @@ int asoc_simple_hw_params(struct snd_pcm_substream *substream, struct asoc_simple_priv *priv = snd_soc_card_get_drvdata(rtd->card); struct simple_dai_props *props = simple_priv_to_props(priv, rtd->num); unsigned int mclk, mclk_fs = 0; - int i, ret; + int i, ret, sysclk_id; if (props->mclk_fs) mclk_fs = props->mclk_fs; @@ -472,13 +475,21 @@ int asoc_simple_hw_params(struct snd_pcm_substream *substream, } for_each_rtd_codec_dais(rtd, i, sdai) { - ret = snd_soc_dai_set_sysclk(sdai, 0, mclk, SND_SOC_CLOCK_IN); + pdai = simple_props_to_dai_codec(props, i); + sysclk_id = pdai->sysclk_id; + + ret = snd_soc_dai_set_sysclk(sdai, sysclk_id, mclk, + SND_SOC_CLOCK_IN); if (ret && ret != -ENOTSUPP) return ret; } for_each_rtd_cpu_dais(rtd, i, sdai) { - ret = snd_soc_dai_set_sysclk(sdai, 0, mclk, SND_SOC_CLOCK_OUT); + pdai = simple_props_to_dai_cpu(props, i); + sysclk_id = pdai->sysclk_id; + + ret = snd_soc_dai_set_sysclk(sdai, pdai->sysclk_id, mclk, + SND_SOC_CLOCK_OUT); if (ret && ret != -ENOTSUPP) return ret; } @@ -523,7 +534,8 @@ static int asoc_simple_init_dai(struct snd_soc_dai *dai, return 0; if (simple_dai->sysclk) { - ret = snd_soc_dai_set_sysclk(dai, 0, simple_dai->sysclk, + ret = snd_soc_dai_set_sysclk(dai, simple_dai->sysclk_id, + simple_dai->sysclk, simple_dai->clk_direction); if (ret && ret != -ENOTSUPP) { dev_err(dai->dev, "simple-card: set_sysclk error\n"); @@ -858,6 +870,7 @@ int asoc_simple_init_priv(struct asoc_simple_priv *priv, dai_link[i].cpus = &priv->dummy; dai_props[i].num.cpus = dai_link[i].num_cpus = 1; + dai_props[i].cpu_dai = &priv->dummy_dai; } if (li->num[i].codecs) { @@ -882,6 +895,7 @@ int asoc_simple_init_priv(struct asoc_simple_priv *priv, dai_link[i].codecs = &priv->dummy; dai_props[i].num.codecs = dai_link[i].num_codecs = 1; + dai_props[i].codec_dai = &priv->dummy_dai; } if (li->num[i].platforms) { -- 2.38.1

4 20

[PATCH v6 0/9] ASoC: cleanups and improvements for jz4740-i2s
by Aidan MacDonald 26 Oct '22

26 Oct '22

This series is a preparatory cleanup of the jz4740-i2s driver before adding support for a new SoC. The two improvements are lifting unnecessary restrictions on sample rates and formats -- the existing ones appear to be derived from the limitations of the JZ4740's internal codec and don't reflect the actual capabilities of the I2S controller. I'm unable to test the series on any JZ47xx SoCs, but I have tested on an X1000 (which is the SoC I'll be adding in a followup series). Changes in v6: * Added Cc: stable for flush bits fix. Changes in v5: * Drop 'mem' resource removal patch already upstream. * Update FIFO flush bits fix to address Paul's review comments. * Drop PLL clock name patch, that needs a different approach. Link for v4: https://lore.kernel.org/alsa-devel/20220708160244.21933-1-aidanmacdonald.0x… Aidan MacDonald (9): ASoC: jz4740-i2s: Handle independent FIFO flush bits ASoC: jz4740-i2s: Convert to regmap API ASoC: jz4740-i2s: Simplify using regmap fields ASoC: jz4740-i2s: Use FIELD_PREP() macros in hw_params callback ASoC: jz4740-i2s: Align macro values and sort includes ASoC: jz4740-i2s: Support S20_LE and S24_LE sample formats ASoC: jz4740-i2s: Support continuous sample rate ASoC: jz4740-i2s: Move component functions near the component driver ASoC: jz4740-i2s: Refactor DAI probe/remove ops as component ops sound/soc/jz4740/Kconfig | 1 + sound/soc/jz4740/jz4740-i2s.c | 455 ++++++++++++++++++---------------- 2 files changed, 243 insertions(+), 213 deletions(-) -- 2.38.1

2 10

[PATCH] ASoC: dt-bindings: mt8192-mt6359: Set maxItems, not type, for sound-dai
by Nícolas F. R. A. Prado 26 Oct '22

26 Oct '22

sound-dai is a standard property whose type is already set to phandle-array by sound-dai.yaml, so there's no need to set it (and wrongly so for headset-codec) in this binding. What should be set however is the maximum number of items, which for headset-codec should be 1. Signed-off-by: Nícolas F. R. A. Prado <nfraprado(a)collabora.com> --- .../devicetree/bindings/sound/mt8192-mt6359-rt1015-rt5682.yaml | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/sound/mt8192-mt6359-rt1015-rt5682.yaml b/Documentation/devicetree/bindings/sound/mt8192-mt6359-rt1015-rt5682.yaml index 478be7e3fa29..c6e614c1c30b 100644 --- a/Documentation/devicetree/bindings/sound/mt8192-mt6359-rt1015-rt5682.yaml +++ b/Documentation/devicetree/bindings/sound/mt8192-mt6359-rt1015-rt5682.yaml @@ -34,7 +34,7 @@ properties: properties: sound-dai: - $ref: /schemas/types.yaml#/definitions/phandle + maxItems: 1 required: - sound-dai @@ -48,7 +48,6 @@ properties: maxItems: 2 items: maxItems: 1 - $ref: /schemas/types.yaml#/definitions/phandle-array required: - sound-dai -- 2.38.1

3 2

[PATCH] ASoC: SOF: ipc4-loader: Return ssize_t from sof_ipc4_fw_parse_ext_man()
by Peter Ujfalusi 26 Oct '22

26 Oct '22

sof_ipc4_fw_parse_ext_man() can return negative error numbers which is not correct for the used size_t type. Change the return value to ssize_t and use the same type where the function is called. Reported-by: Dan Carpenter <dan.carpenter(a)oracle.com> Fixes: 73c091a2fe96 ("ASoC: SOF: ipc4-loader: Support for loading external libraries") Signed-off-by: Peter Ujfalusi <peter.ujfalusi(a)linux.intel.com> --- sound/soc/sof/ipc4-loader.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/sound/soc/sof/ipc4-loader.c b/sound/soc/sof/ipc4-loader.c index af0018b38cf0..702196774c50 100644 --- a/sound/soc/sof/ipc4-loader.c +++ b/sound/soc/sof/ipc4-loader.c @@ -17,8 +17,8 @@ /* The module ID includes the id of the library it is part of at offset 12 */ #define SOF_IPC4_MOD_LIB_ID_SHIFT 12 -static size_t sof_ipc4_fw_parse_ext_man(struct snd_sof_dev *sdev, - struct sof_ipc4_fw_library *fw_lib) +static ssize_t sof_ipc4_fw_parse_ext_man(struct snd_sof_dev *sdev, + struct sof_ipc4_fw_library *fw_lib) { struct sof_ipc4_fw_data *ipc4_data = sdev->private; const struct firmware *fw = fw_lib->sof_fw.fw; @@ -141,7 +141,7 @@ static size_t sof_ipc4_fw_parse_basefw_ext_man(struct snd_sof_dev *sdev) { struct sof_ipc4_fw_data *ipc4_data = sdev->private; struct sof_ipc4_fw_library *fw_lib; - size_t payload_offset; + ssize_t payload_offset; int ret; fw_lib = devm_kzalloc(sdev->dev, sizeof(*fw_lib), GFP_KERNEL); @@ -170,7 +170,7 @@ static int sof_ipc4_load_library_by_uuid(struct snd_sof_dev *sdev, struct sof_ipc4_fw_data *ipc4_data = sdev->private; struct sof_ipc4_fw_library *fw_lib; const char *fw_filename; - size_t payload_offset; + ssize_t payload_offset; int ret, i, err; if (!sdev->pdata->fw_lib_prefix) { -- 2.38.1

2 1

[PATCH] ASoC: SOF: Intel: MTL: fix comment error
by Pierre-Louis Bossart 26 Oct '22

26 Oct '22

From: Yong Zhi <yong.zhi(a)intel.com> Fix small cut-and-paste error in comment. Reviewed-by: Bard Liao <yung-chuan.liao(a)linux.intel.com> Reviewed-by: Péter Ujfalusi <peter.ujfalusi(a)linux.intel.com> Signed-off-by: Yong Zhi <yong.zhi(a)intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> --- sound/soc/sof/intel/mtl.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/sof/intel/mtl.c b/sound/soc/sof/intel/mtl.c index 7e8b298786df6..91619036762b4 100644 --- a/sound/soc/sof/intel/mtl.c +++ b/sound/soc/sof/intel/mtl.c @@ -393,7 +393,7 @@ static int mtl_dsp_core_power_down(struct snd_sof_dev *sdev, int core) snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, MTL_DSP2CXCTL_PRIMARY_CORE, MTL_DSP2CXCTL_PRIMARY_CORE_SPA_MASK, 0); - /* Wait for unstable CPA read (1 then 0 then 1) just after setting SPA bit */ + /* Wait for unstable CPA read (0 then 1 then 0) just after setting SPA bit */ usleep_range(1000, 1010); ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, MTL_DSP2CXCTL_PRIMARY_CORE, dspcxctl, @@ -422,7 +422,7 @@ static int mtl_power_down_dsp(struct snd_sof_dev *sdev) snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, MTL_HFDSSCS, MTL_HFDSSCS_SPA_MASK, 0); - /* Wait for unstable CPA read (1 then 0 then 1) just after setting SPA bit */ + /* Wait for unstable CPA read (0 then 1 then 0) just after setting SPA bit */ usleep_range(1000, 1010); /* poll with timeout to check if operation successful */ -- 2.34.1

2 1

[PATCH 0/2] ASoC: Intel: Fix typo in comments
by Amadeusz Sławiński 26 Oct '22

26 Oct '22

There is a typo which keeps propagating through existing Intel machine boards fix it with hope that fix stops it from appearing in new boards. Amadeusz Sławiński (2): ASoC: Intel: boards: Fix typo in comments ASoC: Intel: avs: boards: Fix typo in comments sound/soc/intel/avs/boards/max98373.c | 2 +- sound/soc/intel/avs/boards/max98927.c | 2 +- sound/soc/intel/avs/boards/ssm4567.c | 2 +- sound/soc/intel/boards/bdw-rt5650.c | 2 +- sound/soc/intel/boards/bdw-rt5677.c | 2 +- sound/soc/intel/boards/bxt_rt298.c | 2 +- sound/soc/intel/boards/bytcht_cx2072x.c | 2 +- sound/soc/intel/boards/bytcht_es8316.c | 2 +- sound/soc/intel/boards/bytcr_rt5640.c | 2 +- sound/soc/intel/boards/bytcr_rt5651.c | 2 +- sound/soc/intel/boards/bytcr_wm5102.c | 2 +- sound/soc/intel/boards/cht_bsw_max98090_ti.c | 2 +- sound/soc/intel/boards/cht_bsw_nau8824.c | 2 +- sound/soc/intel/boards/cht_bsw_rt5645.c | 2 +- sound/soc/intel/boards/cht_bsw_rt5672.c | 2 +- sound/soc/intel/boards/skl_nau88l25_max98357a.c | 2 +- sound/soc/intel/boards/skl_nau88l25_ssm4567.c | 2 +- 17 files changed, 17 insertions(+), 17 deletions(-) -- 2.25.1

3 4

[PATCH] ASoC: amd: yc: Add Alienware m17 R5 AMD into DMI table
by Brent Mendelsohn 26 Oct '22

26 Oct '22

This model requires an additional detection quirk to enable the internal microphone - BIOS doesn't seem to support AcpDmicConnected (nothing in acpidump output). Link: https://bugzilla.kernel.org/show_bug.cgi?id=216590 Signed-off-by: Brent Mendelsohn <mendiebm(a)gmail.com> --- sound/soc/amd/yc/acp6x-mach.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/sound/soc/amd/yc/acp6x-mach.c b/sound/soc/amd/yc/acp6x-mach.c index 2cb50d5cf1a9..a868a890f00c 100644 --- a/sound/soc/amd/yc/acp6x-mach.c +++ b/sound/soc/amd/yc/acp6x-mach.c @@ -185,6 +185,13 @@ static const struct dmi_system_id yc_acp_quirk_table[] = { DMI_MATCH(DMI_PRODUCT_NAME, "UM5302TA"), } }, + { + .driver_data = &acp6x_card, + .matches = { + DMI_MATCH(DMI_BOARD_VENDOR, "Alienware"), + DMI_MATCH(DMI_PRODUCT_NAME, "Alienware m17 R5 AMD"), + } + }, {} }; -- 2.37.3

3 2

[PATCH] ASoC: Intel: bytcht_es8316: Add quirk for the Nanote UMPC-01
by Hans de Goede 26 Oct '22

26 Oct '22

The Nanote UMPC-01 mini laptop has stereo speakers, while the default bytcht_es8316 settings assume a mono speaker setup. Add a quirk for this. Signed-off-by: Hans de Goede <hdegoede(a)redhat.com> --- sound/soc/intel/boards/bytcht_es8316.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/sound/soc/intel/boards/bytcht_es8316.c b/sound/soc/intel/boards/bytcht_es8316.c index 6432b83f616f..a935c5fd9edb 100644 --- a/sound/soc/intel/boards/bytcht_es8316.c +++ b/sound/soc/intel/boards/bytcht_es8316.c @@ -443,6 +443,13 @@ static const struct dmi_system_id byt_cht_es8316_quirk_table[] = { | BYT_CHT_ES8316_INTMIC_IN2_MAP | BYT_CHT_ES8316_JD_INVERTED), }, + { /* Nanote UMPC-01 */ + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "RWC CO.,LTD"), + DMI_MATCH(DMI_PRODUCT_NAME, "UMPC-01"), + }, + .driver_data = (void *)BYT_CHT_ES8316_INTMIC_IN1_MAP, + }, { /* Teclast X98 Plus II */ .matches = { DMI_MATCH(DMI_SYS_VENDOR, "TECLAST"), -- 2.37.3

3 4

[PATCH v2] MAINTAINERS: update Tzung-Bi's email address
by Tzung-Bi Shih 26 Oct '22

26 Oct '22

Use kernel.org account instead. Signed-off-by: Tzung-Bi Shih <tzungbi(a)kernel.org> --- Changes from v1: - Also update .mailmap. .mailmap | 1 + .../devicetree/bindings/sound/google,cros-ec-codec.yaml | 2 +- Documentation/devicetree/bindings/sound/realtek,rt1015p.yaml | 2 +- MAINTAINERS | 2 +- 4 files changed, 4 insertions(+), 3 deletions(-) diff --git a/.mailmap b/.mailmap index 380378e2db36..84342d781407 100644 --- a/.mailmap +++ b/.mailmap @@ -414,6 +414,7 @@ TripleX Chung <xxx.phy(a)gmail.com> <triplex(a)zh-kernel.org> TripleX Chung <xxx.phy(a)gmail.com> <zhongyu(a)18mail.cn> Tsuneo Yoshioka <Tsuneo.Yoshioka(a)f-secure.com> Tycho Andersen <tycho(a)tycho.pizza> <tycho(a)tycho.ws> +Tzung-Bi Shih <tzungbi(a)kernel.org> <tzungbi(a)google.com> Uwe Kleine-König <ukleinek(a)informatik.uni-freiburg.de> Uwe Kleine-König <u.kleine-koenig(a)pengutronix.de> Uwe Kleine-König <ukleinek(a)strlen.de> diff --git a/Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml b/Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml index c3e9f3485449..dea293f403d9 100644 --- a/Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml +++ b/Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml @@ -8,7 +8,7 @@ title: Audio codec controlled by ChromeOS EC maintainers: - Cheng-Yi Chiang <cychiang(a)chromium.org> - - Tzung-Bi Shih <tzungbi(a)google.com> + - Tzung-Bi Shih <tzungbi(a)kernel.org> description: | Google's ChromeOS EC codec is a digital mic codec provided by the diff --git a/Documentation/devicetree/bindings/sound/realtek,rt1015p.yaml b/Documentation/devicetree/bindings/sound/realtek,rt1015p.yaml index 1d73204451b1..ea7d4900ee4a 100644 --- a/Documentation/devicetree/bindings/sound/realtek,rt1015p.yaml +++ b/Documentation/devicetree/bindings/sound/realtek,rt1015p.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Realtek rt1015p codec devicetree bindings maintainers: - - Tzung-Bi Shih <tzungbi(a)google.com> + - Tzung-Bi Shih <tzungbi(a)kernel.org> description: | Rt1015p is a rt1015 variant which does not support I2C and diff --git a/MAINTAINERS b/MAINTAINERS index cf0f18502372..f9749afc0b9d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -4906,7 +4906,7 @@ F: drivers/platform/chrome/ CHROMEOS EC CODEC DRIVER M: Cheng-Yi Chiang <cychiang(a)chromium.org> -M: Tzung-Bi Shih <tzungbi(a)google.com> +M: Tzung-Bi Shih <tzungbi(a)kernel.org> R: Guenter Roeck <groeck(a)chromium.org> L: chrome-platform(a)lists.linux.dev S: Maintained -- 2.38.0.135.g90850a2211-goog

2 1

[PATCH v2 0/9] ASoC: Intel: avs: PCM power management
by Cezary Rojewski 26 Oct '22

26 Oct '22

Goal of the series is implementation of suspend/resume operations for a PCM stream along with all the collaterals connected to the subject. Start with splitting avs_dai_fe_hw_free() as ideally we would like to reuse as much of existing code as possible but snd_pcm_lib_free_pages() is not desired part of the function when speaking of suspend operation. The actual implementation of suspend/resume() for component drivers follows. For most scenarios, the PM flow is similar to standard streaming one, except for the part where the position register are being saved and the lack of PCM pages freeing. To reduce code duplication, all avs_dai_suspend_XXX() and avs_dai_resume_XXX() functions reuse their non-PM equivalents. Order of operations is affected by the fact that path binding/unbinding happens only in FE part of the stream. Above essentially unlocks SX+streaming scenarios i.e.: power transitions with an ongoing stream. As some streams are allowed to run in low power state, support is provided for S0iX state. The handlers check ACPI capabilities and the number of active low-power paths before deciding between SX and S0iX flows. The last portion of the patchset is addition of power/clock gating overrides. There is no single set of registers that ensures AudioDSP firmware loads 100% of time on every single configuration. By having them exposed, user can have the loading procedure behavior adjusted for their configuration without having to recompile the kernel. Changes in v2: - moved DRSM reg polling to separate function, snd_hdac_stream_wait_drsm() as suggested by Pierre - moved the acpi_gbl_FADT under AVS_S0IX_SUPPORTED macro and relocated the checks from pcm.c to topology.c so that the low-power streams are filtered as early as possible - fixed compilation when CONFIG_ACPI is disabled as reported by the test robot - simplified all the avs_dai_resume/suspend_xxx() by moving ->ignore_suspend check one level up, to avs_component_pm_op() (patch 0002) Amadeusz Sławiński (1): ASoC: Intel: avs: Handle SUSPEND and RESUME triggers Cezary Rojewski (7): ASoC: Intel: avs: Split pcm pages freeing operation from hw_free() ASoC: Intel: avs: Introduce PCM power management routines ALSA: hda: Introduce snd_hdac_stream_wait_drsm() ASoC: Intel: avs: Restart instead of resuming HDA capture streams ASoC: Intel: avs: Count low power streams ASoC: Intel: avs: Power and clock gating policy overriding ASoC: Intel: avs: Enact power gating policy Piotr Maziarz (1): ASoC: Intel: avs: Standby power-state support include/sound/hdaudio.h | 1 + include/sound/hdaudio_ext.h | 5 + sound/hda/hdac_stream.c | 21 ++ sound/soc/intel/avs/avs.h | 8 + sound/soc/intel/avs/core.c | 97 +++++++-- sound/soc/intel/avs/loader.c | 10 + sound/soc/intel/avs/pcm.c | 373 +++++++++++++++++++++++++++++---- sound/soc/intel/avs/topology.c | 10 + 8 files changed, 465 insertions(+), 60 deletions(-) -- 2.25.1

2 10

[PATCH] ALSA/ASoC: replace ternary operator with min()
by wangkailong＠jari.cn 26 Oct '22

26 Oct '22

Fix the following coccicheck warning: sound/soc/soc-ops.c:817: WARNING opportunity for min() sound/core/vmaster.c:73: WARNING opportunity for min() sound/pci/hda/hda_codec.c:337: WARNING opportunity for min() sound/pci/ctxfi/ctatc.c:448: WARNING opportunity for min() sound/pci/ctxfi/ctatc.c:387: WARNING opportunity for min() Signed-off-by: KaiLong Wang <wangkailong(a)jari.cn> --- sound/core/vmaster.c | 2 +- sound/pci/ctxfi/ctatc.c | 4 ++-- sound/pci/hda/hda_codec.c | 2 +- sound/soc/soc-ops.c | 2 +- 4 files changed, 5 insertions(+), 5 deletions(-) diff --git a/sound/core/vmaster.c b/sound/core/vmaster.c index d0f11f37889b..704a09f4bfd6 100644 --- a/sound/core/vmaster.c +++ b/sound/core/vmaster.c @@ -70,7 +70,7 @@ static int follower_update(struct link_follower *follower) follower->vals[ch] = uctl->value.integer.value[ch]; error: kfree(uctl); - return err < 0 ? err : 0; + return min(err, 0); } /* get the follower ctl info and save the initial values */ diff --git a/sound/pci/ctxfi/ctatc.c b/sound/pci/ctxfi/ctatc.c index fbdb8a3d5b8e..9fea50b72cfb 100644 --- a/sound/pci/ctxfi/ctatc.c +++ b/sound/pci/ctxfi/ctatc.c @@ -384,7 +384,7 @@ static int atc_pcm_playback_start(struct ct_atc *atc, struct ct_atc_pcm *apcm) apcm->started = 1; max_cisz = src->multi * src->rsc.msr; - max_cisz = 0x80 * (max_cisz < 8 ? max_cisz : 8); + max_cisz = 0x80 * min(max_cisz, 8); src->ops->set_sa(src, apcm->vm_block->addr); src->ops->set_la(src, apcm->vm_block->addr + apcm->vm_block->size); @@ -445,7 +445,7 @@ atc_pcm_playback_position(struct ct_atc *atc, struct ct_atc_pcm *apcm) size = apcm->vm_block->size; max_cisz = src->multi * src->rsc.msr; - max_cisz = 128 * (max_cisz < 8 ? max_cisz : 8); + max_cisz = 128 * min(max_cisz, 8); return (position + size - max_cisz - apcm->vm_block->addr) % size; } diff --git a/sound/pci/hda/hda_codec.c b/sound/pci/hda/hda_codec.c index b4d1e658c556..c195f99bd8d5 100644 --- a/sound/pci/hda/hda_codec.c +++ b/sound/pci/hda/hda_codec.c @@ -334,7 +334,7 @@ int snd_hda_get_devices(struct hda_codec *codec, hda_nid_t nid, return 0; dev_len = parm + 1; - dev_len = dev_len < max_devices ? dev_len : max_devices; + dev_len = min(dev_len, max_devices); devices = 0; while (devices < dev_len) { diff --git a/sound/soc/soc-ops.c b/sound/soc/soc-ops.c index bd88de056358..d71d10055ed7 100644 --- a/sound/soc/soc-ops.c +++ b/sound/soc/soc-ops.c @@ -814,7 +814,7 @@ int snd_soc_bytes_tlv_callback(struct snd_kcontrol *kcontrol, int op_flag, unsigned int size, unsigned int __user *tlv) { struct soc_bytes_ext *params = (void *)kcontrol->private_value; - unsigned int count = size < params->max ? size : params->max; + unsigned int count = min_t(unsigned int, size, params->max); int ret = -ENXIO; switch (op_flag) { -- 2.25.1

3 3

[PATCH AUTOSEL 6.0 07/44] ALSA: hda: Fix page fault in snd_hda_codec_shutdown()
by Sasha Levin 25 Oct '22

25 Oct '22

From: Cezary Rojewski <cezary.rojewski(a)intel.com> [ Upstream commit f2bd1c5ae2cb0cf9525c9bffc0038c12dd7e1338 ] If early probe of HDAudio bus driver fails e.g.: due to missing firmware file, snd_hda_codec_shutdown() ends in manipulating uninitialized codec->pcm_list_head causing page fault. Initialization of HDAudio codec in ASoC is split in two: - snd_hda_codec_device_init() - snd_hda_codec_device_new() snd_hda_codec_device_init() is called during probe_codecs() by HDAudio bus driver while snd_hda_codec_device_new() is called by codec-component's ->probe(). The second call will not happen until all components required by related sound card are present within the ASoC framework. With firmware failing to load during the PCI's deferred initialization i.e.: probe_work(), no platform components are ever registered. HDAudio codec enumeration is done at that point though, so the codec components became registered to ASoC framework, calling snd_hda_codec_device_init() in the process. Now, during platform reboot snd_hda_codec_shutdown() is called for every codec found on the HDAudio bus causing oops if any of them has not completed both of their initialization steps. Relocating field initialization fixes the issue. Reviewed-by: Kai Vehmanen <kai.vehmanen(a)linux.intel.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Signed-off-by: Cezary Rojewski <cezary.rojewski(a)intel.com> Link: https://lore.kernel.org/r/20220816111727.3218543-7-cezary.rojewski@intel.com Signed-off-by: Takashi Iwai <tiwai(a)suse.de> Signed-off-by: Sasha Levin <sashal(a)kernel.org> --- sound/pci/hda/hda_codec.c | 41 +++++++++++++++++++-------------------- 1 file changed, 20 insertions(+), 21 deletions(-) diff --git a/sound/pci/hda/hda_codec.c b/sound/pci/hda/hda_codec.c index 384426d7e9dd..4ae8b9574778 100644 --- a/sound/pci/hda/hda_codec.c +++ b/sound/pci/hda/hda_codec.c @@ -931,8 +931,28 @@ snd_hda_codec_device_init(struct hda_bus *bus, unsigned int codec_addr, } codec->bus = bus; + codec->depop_delay = -1; + codec->fixup_id = HDA_FIXUP_ID_NOT_SET; + codec->core.dev.release = snd_hda_codec_dev_release; + codec->core.exec_verb = codec_exec_verb; codec->core.type = HDA_DEV_LEGACY; + mutex_init(&codec->spdif_mutex); + mutex_init(&codec->control_mutex); + snd_array_init(&codec->mixers, sizeof(struct hda_nid_item), 32); + snd_array_init(&codec->nids, sizeof(struct hda_nid_item), 32); + snd_array_init(&codec->init_pins, sizeof(struct hda_pincfg), 16); + snd_array_init(&codec->driver_pins, sizeof(struct hda_pincfg), 16); + snd_array_init(&codec->cvt_setups, sizeof(struct hda_cvt_setup), 8); + snd_array_init(&codec->spdif_out, sizeof(struct hda_spdif_out), 16); + snd_array_init(&codec->jacktbl, sizeof(struct hda_jack_tbl), 16); + snd_array_init(&codec->verbs, sizeof(struct hda_verb *), 8); + INIT_LIST_HEAD(&codec->conn_list); + INIT_LIST_HEAD(&codec->pcm_list_head); + INIT_DELAYED_WORK(&codec->jackpoll_work, hda_jackpoll_work); + refcount_set(&codec->pcm_ref, 1); + init_waitqueue_head(&codec->remove_sleep); + return codec; } EXPORT_SYMBOL_GPL(snd_hda_codec_device_init); @@ -985,29 +1005,8 @@ int snd_hda_codec_device_new(struct hda_bus *bus, struct snd_card *card, if (snd_BUG_ON(codec_addr > HDA_MAX_CODEC_ADDRESS)) return -EINVAL; - codec->core.dev.release = snd_hda_codec_dev_release; - codec->core.exec_verb = codec_exec_verb; - codec->card = card; codec->addr = codec_addr; - mutex_init(&codec->spdif_mutex); - mutex_init(&codec->control_mutex); - snd_array_init(&codec->mixers, sizeof(struct hda_nid_item), 32); - snd_array_init(&codec->nids, sizeof(struct hda_nid_item), 32); - snd_array_init(&codec->init_pins, sizeof(struct hda_pincfg), 16); - snd_array_init(&codec->driver_pins, sizeof(struct hda_pincfg), 16); - snd_array_init(&codec->cvt_setups, sizeof(struct hda_cvt_setup), 8); - snd_array_init(&codec->spdif_out, sizeof(struct hda_spdif_out), 16); - snd_array_init(&codec->jacktbl, sizeof(struct hda_jack_tbl), 16); - snd_array_init(&codec->verbs, sizeof(struct hda_verb *), 8); - INIT_LIST_HEAD(&codec->conn_list); - INIT_LIST_HEAD(&codec->pcm_list_head); - refcount_set(&codec->pcm_ref, 1); - init_waitqueue_head(&codec->remove_sleep); - - INIT_DELAYED_WORK(&codec->jackpoll_work, hda_jackpoll_work); - codec->depop_delay = -1; - codec->fixup_id = HDA_FIXUP_ID_NOT_SET; #ifdef CONFIG_PM codec->power_jiffies = jiffies; -- 2.35.1

3 3

[PATCH] ALSA: rme9652: use explicitly signed char
by Jason A. Donenfeld 25 Oct '22

25 Oct '22

With char becoming unsigned by default, and with `char` alone being ambiguous and based on architecture, signed chars need to be marked explicitly as such. This fixes warnings like: sound/pci/rme9652/hdsp.c:3953 hdsp_channel_buffer_location() warn: 'hdsp->channel_map[channel]' is unsigned sound/pci/rme9652/hdsp.c:4153 snd_hdsp_channel_info() warn: impossible condition '(hdsp->channel_map[channel] < 0) => (0-255 < 0)' sound/pci/rme9652/rme9652.c:1833 rme9652_channel_buffer_location() warn: 'rme9652->channel_map[channel]' is unsigned Cc: Jaroslav Kysela <perex(a)perex.cz> Cc: Takashi Iwai <tiwai(a)suse.com> Cc: alsa-devel(a)alsa-project.org Signed-off-by: Jason A. Donenfeld <Jason(a)zx2c4.com> --- sound/pci/rme9652/hdsp.c | 26 +++++++++++++------------- sound/pci/rme9652/rme9652.c | 22 +++++++++++----------- 2 files changed, 24 insertions(+), 24 deletions(-) diff --git a/sound/pci/rme9652/hdsp.c b/sound/pci/rme9652/hdsp.c index dcc43a81ae0e..902508e4fecc 100644 --- a/sound/pci/rme9652/hdsp.c +++ b/sound/pci/rme9652/hdsp.c @@ -433,7 +433,7 @@ struct hdsp_midi { struct snd_rawmidi *rmidi; struct snd_rawmidi_substream *input; struct snd_rawmidi_substream *output; - char istimer; /* timer in use */ + bool istimer; /* timer in use */ struct timer_list timer; spinlock_t lock; int pending; @@ -480,7 +480,7 @@ struct hdsp { pid_t playback_pid; int running; int system_sample_rate; - const char *channel_map; + const signed char *channel_map; int dev; int irq; unsigned long port; @@ -502,7 +502,7 @@ struct hdsp { where the data for that channel can be read/written from/to. */ -static const char channel_map_df_ss[HDSP_MAX_CHANNELS] = { +static const signed char channel_map_df_ss[HDSP_MAX_CHANNELS] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25 }; @@ -517,7 +517,7 @@ static const char channel_map_mf_ss[HDSP_MAX_CHANNELS] = { /* Multiface */ -1, -1, -1, -1, -1, -1, -1, -1 }; -static const char channel_map_ds[HDSP_MAX_CHANNELS] = { +static const signed char channel_map_ds[HDSP_MAX_CHANNELS] = { /* ADAT channels are remapped */ 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, /* channels 12 and 13 are S/PDIF */ @@ -526,7 +526,7 @@ static const char channel_map_ds[HDSP_MAX_CHANNELS] = { -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 }; -static const char channel_map_H9632_ss[HDSP_MAX_CHANNELS] = { +static const signed char channel_map_H9632_ss[HDSP_MAX_CHANNELS] = { /* ADAT channels */ 0, 1, 2, 3, 4, 5, 6, 7, /* SPDIF */ @@ -540,7 +540,7 @@ static const char channel_map_H9632_ss[HDSP_MAX_CHANNELS] = { -1, -1 }; -static const char channel_map_H9632_ds[HDSP_MAX_CHANNELS] = { +static const signed char channel_map_H9632_ds[HDSP_MAX_CHANNELS] = { /* ADAT */ 1, 3, 5, 7, /* SPDIF */ @@ -554,7 +554,7 @@ static const char channel_map_H9632_ds[HDSP_MAX_CHANNELS] = { -1, -1, -1, -1, -1, -1 }; -static const char channel_map_H9632_qs[HDSP_MAX_CHANNELS] = { +static const signed char channel_map_H9632_qs[HDSP_MAX_CHANNELS] = { /* ADAT is disabled in this mode */ /* SPDIF */ 8, 9, @@ -3939,7 +3939,7 @@ static snd_pcm_uframes_t snd_hdsp_hw_pointer(struct snd_pcm_substream *substream return hdsp_hw_pointer(hdsp); } -static char *hdsp_channel_buffer_location(struct hdsp *hdsp, +static signed char *hdsp_channel_buffer_location(struct hdsp *hdsp, int stream, int channel) @@ -3964,7 +3964,7 @@ static int snd_hdsp_playback_copy(struct snd_pcm_substream *substream, void __user *src, unsigned long count) { struct hdsp *hdsp = snd_pcm_substream_chip(substream); - char *channel_buf; + signed char *channel_buf; if (snd_BUG_ON(pos + count > HDSP_CHANNEL_BUFFER_BYTES)) return -EINVAL; @@ -3982,7 +3982,7 @@ static int snd_hdsp_playback_copy_kernel(struct snd_pcm_substream *substream, void *src, unsigned long count) { struct hdsp *hdsp = snd_pcm_substream_chip(substream); - char *channel_buf; + signed char *channel_buf; channel_buf = hdsp_channel_buffer_location(hdsp, substream->pstr->stream, channel); if (snd_BUG_ON(!channel_buf)) @@ -3996,7 +3996,7 @@ static int snd_hdsp_capture_copy(struct snd_pcm_substream *substream, void __user *dst, unsigned long count) { struct hdsp *hdsp = snd_pcm_substream_chip(substream); - char *channel_buf; + signed char *channel_buf; if (snd_BUG_ON(pos + count > HDSP_CHANNEL_BUFFER_BYTES)) return -EINVAL; @@ -4014,7 +4014,7 @@ static int snd_hdsp_capture_copy_kernel(struct snd_pcm_substream *substream, void *dst, unsigned long count) { struct hdsp *hdsp = snd_pcm_substream_chip(substream); - char *channel_buf; + signed char *channel_buf; channel_buf = hdsp_channel_buffer_location(hdsp, substream->pstr->stream, channel); if (snd_BUG_ON(!channel_buf)) @@ -4028,7 +4028,7 @@ static int snd_hdsp_hw_silence(struct snd_pcm_substream *substream, unsigned long count) { struct hdsp *hdsp = snd_pcm_substream_chip(substream); - char *channel_buf; + signed char *channel_buf; channel_buf = hdsp_channel_buffer_location (hdsp, substream->pstr->stream, channel); if (snd_BUG_ON(!channel_buf)) diff --git a/sound/pci/rme9652/rme9652.c b/sound/pci/rme9652/rme9652.c index 1d614fe89a6a..e7c320afefe8 100644 --- a/sound/pci/rme9652/rme9652.c +++ b/sound/pci/rme9652/rme9652.c @@ -230,7 +230,7 @@ struct snd_rme9652 { int last_spdif_sample_rate; /* so that we can catch externally ... */ int last_adat_sample_rate; /* ... induced rate changes */ - const char *channel_map; + const signed char *channel_map; struct snd_card *card; struct snd_pcm *pcm; @@ -247,12 +247,12 @@ struct snd_rme9652 { where the data for that channel can be read/written from/to. */ -static const char channel_map_9652_ss[26] = { +static const signed char channel_map_9652_ss[26] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25 }; -static const char channel_map_9636_ss[26] = { +static const signed char channel_map_9636_ss[26] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, /* channels 16 and 17 are S/PDIF */ 24, 25, @@ -260,7 +260,7 @@ static const char channel_map_9636_ss[26] = { -1, -1, -1, -1, -1, -1, -1, -1 }; -static const char channel_map_9652_ds[26] = { +static const signed char channel_map_9652_ds[26] = { /* ADAT channels are remapped */ 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, /* channels 12 and 13 are S/PDIF */ @@ -269,7 +269,7 @@ static const char channel_map_9652_ds[26] = { -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 }; -static const char channel_map_9636_ds[26] = { +static const signed char channel_map_9636_ds[26] = { /* ADAT channels are remapped */ 1, 3, 5, 7, 9, 11, 13, 15, /* channels 8 and 9 are S/PDIF */ @@ -1819,7 +1819,7 @@ static snd_pcm_uframes_t snd_rme9652_hw_pointer(struct snd_pcm_substream *substr return rme9652_hw_pointer(rme9652); } -static char *rme9652_channel_buffer_location(struct snd_rme9652 *rme9652, +static signed char *rme9652_channel_buffer_location(struct snd_rme9652 *rme9652, int stream, int channel) @@ -1847,7 +1847,7 @@ static int snd_rme9652_playback_copy(struct snd_pcm_substream *substream, void __user *src, unsigned long count) { struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); - char *channel_buf; + signed char *channel_buf; if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES)) return -EINVAL; @@ -1867,7 +1867,7 @@ static int snd_rme9652_playback_copy_kernel(struct snd_pcm_substream *substream, void *src, unsigned long count) { struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); - char *channel_buf; + signed char *channel_buf; channel_buf = rme9652_channel_buffer_location(rme9652, substream->pstr->stream, @@ -1883,7 +1883,7 @@ static int snd_rme9652_capture_copy(struct snd_pcm_substream *substream, void __user *dst, unsigned long count) { struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); - char *channel_buf; + signed char *channel_buf; if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES)) return -EINVAL; @@ -1903,7 +1903,7 @@ static int snd_rme9652_capture_copy_kernel(struct snd_pcm_substream *substream, void *dst, unsigned long count) { struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); - char *channel_buf; + signed char *channel_buf; channel_buf = rme9652_channel_buffer_location(rme9652, substream->pstr->stream, @@ -1919,7 +1919,7 @@ static int snd_rme9652_hw_silence(struct snd_pcm_substream *substream, unsigned long count) { struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); - char *channel_buf; + signed char *channel_buf; channel_buf = rme9652_channel_buffer_location (rme9652, substream->pstr->stream, -- 2.38.1

3 10

[bug report] ASoC: SOF: ipc4-loader: Support for loading external libraries
by Dan Carpenter 25 Oct '22

25 Oct '22

Hello Peter Ujfalusi, The patch 73c091a2fe96: "ASoC: SOF: ipc4-loader: Support for loading external libraries" from Oct 20, 2022, leads to the following Smatch static checker warning: sound/soc/sof/ipc4-loader.c:207 sof_ipc4_load_library_by_uuid() warn: 'payload_offset' unsigned <= 0 sound/soc/sof/ipc4-loader.c 167 static int sof_ipc4_load_library_by_uuid(struct snd_sof_dev *sdev, 168 unsigned long lib_id, const guid_t *uuid) 169 { 170 struct sof_ipc4_fw_data *ipc4_data = sdev->private; 171 struct sof_ipc4_fw_library *fw_lib; 172 const char *fw_filename; 173 size_t payload_offset; ^^^^^^^^^^^^^^^^^^^^^ 174 int ret, i, err; 175 176 if (!sdev->pdata->fw_lib_prefix) { 177 dev_err(sdev->dev, 178 "Library loading is not supported due to not set library path\n"); 179 return -EINVAL; 180 } 181 182 if (!ipc4_data->load_library) { 183 dev_err(sdev->dev, "Library loading is not supported on this platform\n"); 184 return -EOPNOTSUPP; 185 } 186 187 fw_lib = devm_kzalloc(sdev->dev, sizeof(*fw_lib), GFP_KERNEL); 188 if (!fw_lib) 189 return -ENOMEM; 190 191 fw_filename = kasprintf(GFP_KERNEL, "%s/%pUL.bin", 192 sdev->pdata->fw_lib_prefix, uuid); 193 if (!fw_filename) { 194 ret = -ENOMEM; 195 goto free_fw_lib; 196 } 197 198 ret = request_firmware(&fw_lib->sof_fw.fw, fw_filename, sdev->dev); 199 if (ret < 0) { 200 dev_err(sdev->dev, "Library file '%s' is missing\n", fw_filename); 201 goto free_filename; 202 } else { 203 dev_dbg(sdev->dev, "Library file '%s' loaded\n", fw_filename); 204 } 205 206 payload_offset = sof_ipc4_fw_parse_ext_man(sdev, fw_lib); --> 207 if (payload_offset <= 0) { ^^^^^^^^^^^^^^^^^^^ sof_ipc4_fw_parse_ext_man() returns negative error codes but as size_t. It should just return int. If it returns > INT_MAX that can't work on 32bit systems. 208 if (!payload_offset) 209 ret = -EINVAL; 210 else 211 ret = payload_offset; 212 213 goto release; 214 } 215 216 fw_lib->sof_fw.payload_offset = payload_offset; 217 fw_lib->id = lib_id; 218 219 /* Fix up the module ID numbers within the library */ 220 for (i = 0; i < fw_lib->num_modules; i++) 221 fw_lib->modules[i].man4_module_entry.id |= (lib_id << SOF_IPC4_MOD_LIB_ID_SHIFT); 222 223 /* 224 * Make sure that the DSP is booted and stays up while attempting the 225 * loading the library for the first time 226 */ 227 ret = pm_runtime_resume_and_get(sdev->dev); 228 if (ret < 0 && ret != -EACCES) { 229 dev_err_ratelimited(sdev->dev, "%s: pm_runtime resume failed: %d\n", 230 __func__, ret); 231 goto release; 232 } 233 234 ret = ipc4_data->load_library(sdev, fw_lib, false); 235 236 pm_runtime_mark_last_busy(sdev->dev); 237 err = pm_runtime_put_autosuspend(sdev->dev); 238 if (err < 0) 239 dev_err_ratelimited(sdev->dev, "%s: pm_runtime idle failed: %d\n", 240 __func__, err); 241 242 if (ret) 243 goto release; 244 245 ret = xa_insert(&ipc4_data->fw_lib_xa, lib_id, fw_lib, GFP_KERNEL); 246 if (unlikely(ret)) 247 goto release; 248 249 kfree(fw_filename); 250 251 return 0; 252 253 release: 254 release_firmware(fw_lib->sof_fw.fw); 255 /* Allocated within sof_ipc4_fw_parse_ext_man() */ 256 devm_kfree(sdev->dev, fw_lib->modules); 257 free_filename: 258 kfree(fw_filename); 259 free_fw_lib: 260 devm_kfree(sdev->dev, fw_lib); 261 262 return ret; 263 } regards, dan carpenter

2 1

[PATCH v4 00/11] ASoC: cleanups and improvements for jz4740-i2s
by Aidan MacDonald 25 Oct '22

25 Oct '22

This series is a preparatory cleanup of the jz4740-i2s driver before adding support for a new SoC. The two improvements are lifting unnecessary restrictions on sample rates and formats -- the existing ones appear to be derived from the limitations of the JZ4740's internal codec and don't reflect the actual capabilities of the I2S controller. I'm unable to test the series on any JZ47xx SoCs, but I have tested on an X1000 (which is the SoC I'll be adding in a followup series). Changes in v2: * Drop two patches already in sound for-next. * Squash two removal patches into the regmap fields patch. * Remove the unused 'mem' resource in the driver private struct. * Use regmap_set_bits() and regmap_clear_bits() to improve readability. * Add fix for SoCs with independent FIFO flush bits (ie. most of them). * Update sample formats patch with a more informative commit message. * Add two new patches to refactor DAI/component probing. Changes in v3: * Fix missing 'ret' in patch 11 (yes, that was pretty silly of me) Changes in v4: * Refactor FIFO flush bits fix so it doesn't depend on regmap conversion. Aidan MacDonald (11): ASoC: jz4740-i2s: Handle independent FIFO flush bits ASoC: jz4740-i2s: Remove unused 'mem' resource ASoC: jz4740-i2s: Convert to regmap API ASoC: jz4740-i2s: Simplify using regmap fields ASoC: jz4740-i2s: Use FIELD_PREP() macros in hw_params callback ASoC: jz4740-i2s: Align macro values and sort includes ASoC: jz4740-i2s: Make the PLL clock name SoC-specific ASoC: jz4740-i2s: Support S20_LE and S24_LE sample formats ASoC: jz4740-i2s: Support continuous sample rate ASoC: jz4740-i2s: Move component functions near the component driver ASoC: jz4740-i2s: Refactor DAI probe/remove ops as component ops sound/soc/jz4740/Kconfig | 1 + sound/soc/jz4740/jz4740-i2s.c | 461 ++++++++++++++++++---------------- 2 files changed, 248 insertions(+), 214 deletions(-) -- 2.35.1

4 32

[PATCH] ALSA: au88x0: use explicitly signed char
by Jason A. Donenfeld 25 Oct '22

25 Oct '22

With char becoming unsigned by default, and with `char` alone being ambiguous and based on architecture, signed chars need to be marked explicitly as such. This fixes warnings like: sound/pci/au88x0/au88x0_core.c:2029 vortex_adb_checkinout() warn: signedness bug returning '(-22)' sound/pci/au88x0/au88x0_core.c:2046 vortex_adb_checkinout() warn: signedness bug returning '(-12)' sound/pci/au88x0/au88x0_core.c:2125 vortex_adb_allocroute() warn: 'vortex_adb_checkinout(vortex, (0), en, 0)' is unsigned sound/pci/au88x0/au88x0_core.c:2170 vortex_adb_allocroute() warn: 'vortex_adb_checkinout(vortex, stream->resources, en, 4)' is unsigned As well, since one function returns errnos, return an `int` rather than a `signed char`. Cc: Jaroslav Kysela <perex(a)perex.cz> Cc: Takashi Iwai <tiwai(a)suse.com> Cc: alsa-devel(a)alsa-project.org Signed-off-by: Jason A. Donenfeld <Jason(a)zx2c4.com> --- sound/pci/au88x0/au88x0.h | 6 +++--- sound/pci/au88x0/au88x0_core.c | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/sound/pci/au88x0/au88x0.h b/sound/pci/au88x0/au88x0.h index 0aa7af049b1b..6cbb2bc4a048 100644 --- a/sound/pci/au88x0/au88x0.h +++ b/sound/pci/au88x0/au88x0.h @@ -141,7 +141,7 @@ struct snd_vortex { #ifndef CHIP_AU8810 stream_t dma_wt[NR_WT]; wt_voice_t wt_voice[NR_WT]; /* WT register cache. */ - char mixwt[(NR_WT / NR_WTPB) * 6]; /* WT mixin objects */ + s8 mixwt[(NR_WT / NR_WTPB) * 6]; /* WT mixin objects */ #endif /* Global resources */ @@ -235,8 +235,8 @@ static int vortex_alsafmt_aspfmt(snd_pcm_format_t alsafmt, vortex_t *v); static void vortex_connect_default(vortex_t * vortex, int en); static int vortex_adb_allocroute(vortex_t * vortex, int dma, int nr_ch, int dir, int type, int subdev); -static char vortex_adb_checkinout(vortex_t * vortex, int resmap[], int out, - int restype); +static int vortex_adb_checkinout(vortex_t * vortex, int resmap[], int out, + int restype); #ifndef CHIP_AU8810 static int vortex_wt_allocroute(vortex_t * vortex, int dma, int nr_ch); static void vortex_wt_connect(vortex_t * vortex, int en); diff --git a/sound/pci/au88x0/au88x0_core.c b/sound/pci/au88x0/au88x0_core.c index 2ed5100b8cae..f217c02dfdfa 100644 --- a/sound/pci/au88x0/au88x0_core.c +++ b/sound/pci/au88x0/au88x0_core.c @@ -1998,7 +1998,7 @@ static const int resnum[VORTEX_RESOURCE_LAST] = out: Mean checkout if != 0. Else mean Checkin resource. restype: Indicates type of resource to be checked in or out. */ -static char +static int vortex_adb_checkinout(vortex_t * vortex, int resmap[], int out, int restype) { int i, qty = resnum[restype], resinuse = 0; -- 2.38.1

3 3

[PATCH] MAINTAINERS: update Tzung-Bi's email address
by Tzung-Bi Shih 25 Oct '22

25 Oct '22

Use kernel.org account instead. Signed-off-by: Tzung-Bi Shih <tzungbi(a)kernel.org> --- .../devicetree/bindings/sound/google,cros-ec-codec.yaml | 2 +- Documentation/devicetree/bindings/sound/realtek,rt1015p.yaml | 2 +- MAINTAINERS | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml b/Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml index c3e9f3485449..dea293f403d9 100644 --- a/Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml +++ b/Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml @@ -8,7 +8,7 @@ title: Audio codec controlled by ChromeOS EC maintainers: - Cheng-Yi Chiang <cychiang(a)chromium.org> - - Tzung-Bi Shih <tzungbi(a)google.com> + - Tzung-Bi Shih <tzungbi(a)kernel.org> description: | Google's ChromeOS EC codec is a digital mic codec provided by the diff --git a/Documentation/devicetree/bindings/sound/realtek,rt1015p.yaml b/Documentation/devicetree/bindings/sound/realtek,rt1015p.yaml index 1d73204451b1..ea7d4900ee4a 100644 --- a/Documentation/devicetree/bindings/sound/realtek,rt1015p.yaml +++ b/Documentation/devicetree/bindings/sound/realtek,rt1015p.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Realtek rt1015p codec devicetree bindings maintainers: - - Tzung-Bi Shih <tzungbi(a)google.com> + - Tzung-Bi Shih <tzungbi(a)kernel.org> description: | Rt1015p is a rt1015 variant which does not support I2C and diff --git a/MAINTAINERS b/MAINTAINERS index cf0f18502372..f9749afc0b9d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -4906,7 +4906,7 @@ F: drivers/platform/chrome/ CHROMEOS EC CODEC DRIVER M: Cheng-Yi Chiang <cychiang(a)chromium.org> -M: Tzung-Bi Shih <tzungbi(a)google.com> +M: Tzung-Bi Shih <tzungbi(a)kernel.org> R: Guenter Roeck <groeck(a)chromium.org> L: chrome-platform(a)lists.linux.dev S: Maintained -- 2.38.0.135.g90850a2211-goog

2 2

[PATCH 0/3] Add missing dt-binding properties to rt5682(s)
by Nícolas F. R. A. Prado 24 Oct '22

24 Oct '22

This series adds the missing sound-dai-cells to rt5682s and supplies for both rt5682s and rt5682. Nícolas F. R. A. Prado (3): ASoC: dt-bindings: realtek,rt5682s: Add #sound-dai-cells ASoC: dt-bindings: realtek,rt5682s: Add AVDD and MICVDD supplies ASoC: dt-bindings: rt5682: Add AVDD, MICVDD and VBAT supplies .../devicetree/bindings/sound/realtek,rt5682s.yaml | 7 +++++++ Documentation/devicetree/bindings/sound/rt5682.txt | 6 ++++++ 2 files changed, 13 insertions(+) -- 2.38.1

3 13

[PATCH] ALSA: hda: fix possible memory leak in azx_codec_configure()
by Yang Yingliang 24 Oct '22

24 Oct '22

If the codec device is registered, after calling snd_hdac_device_unregister(), codec has already been removed from chip bus, it should call put_device() to give up reference to free codec and device name. Fixes: c0f1886de7e1 ("ALSA: hda: intel: Allow repeatedly probing on codec configuration errors") Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- sound/pci/hda/hda_controller.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/sound/pci/hda/hda_controller.c b/sound/pci/hda/hda_controller.c index 0ff286b7b66b..f6a73ce300a4 100644 --- a/sound/pci/hda/hda_controller.c +++ b/sound/pci/hda/hda_controller.c @@ -1257,8 +1257,11 @@ int azx_codec_configure(struct azx *chip) /* unregister failed codecs if any codec has been probed */ list_for_each_codec_safe(codec, next, &chip->bus) { if (!codec->configured) { + bool is_registered = device_is_registered(&codec->core.dev); codec_err(codec, "Unable to configure, disabling\n"); snd_hdac_device_unregister(&codec->core); + if (is_registered) + put_device(&codec->core.dev); } } } -- 2.25.1

2 2

[PATCH v2] ASoC: core: clarify the driver name initialization
by Jaroslav Kysela 24 Oct '22

24 Oct '22

The driver field in the struct snd_ctl_card_info is a valid user space identifier. Actually, many ASoC drivers do not care and let to initialize this field using a standard wrapping method. Unfortunately, in this way, this field becomes unusable and unreadable for the drivers with longer card names. Also, there is a possibility to have clashes (driver field has only limit of 15 characters). This change will print an error when the wrapping is used. The developers of the affected drivers should fix the problem. Signed-off-by: Jaroslav Kysela <perex(a)perex.cz> v1..v2: - remove the wrong DMI condition per Mark's review --- sound/soc/soc-core.c | 37 +++++++++++++++++++++++-------------- 1 file changed, 23 insertions(+), 14 deletions(-) diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c index e824ff1a9fc0..590143ebf6df 100644 --- a/sound/soc/soc-core.c +++ b/sound/soc/soc-core.c @@ -1840,21 +1840,22 @@ static void soc_check_tplg_fes(struct snd_soc_card *card) } } -#define soc_setup_card_name(name, name1, name2, norm) \ - __soc_setup_card_name(name, sizeof(name), name1, name2, norm) -static void __soc_setup_card_name(char *name, int len, - const char *name1, const char *name2, - int normalization) +#define soc_setup_card_name(card, name, name1, name2) \ + __soc_setup_card_name(card, name, sizeof(name), name1, name2) +static void __soc_setup_card_name(struct snd_soc_card *card, + char *name, int len, + const char *name1, const char *name2) { + const char *src = name1 ? name1 : name2; int i; - snprintf(name, len, "%s", name1 ? name1 : name2); + snprintf(name, len, "%s", src); - if (!normalization) + if (name != card->snd_card->driver) return; /* - * Name normalization + * Name normalization (driver field) * * The driver name is somewhat special, as it's used as a key for * searches in the user-space. @@ -1874,6 +1875,14 @@ static void __soc_setup_card_name(char *name, int len, break; } } + + /* + * The driver field should contain a valid string from the user view. + * The wrapping usually does not work so well here. Set a smaller string + * in the specific ASoC driver. + */ + if (strlen(src) > len - 1) + dev_err(card->dev, "ASoC: driver name too long '%s' -> '%s'\n", src, name); } static void soc_cleanup_card_resources(struct snd_soc_card *card) @@ -2041,12 +2050,12 @@ static int snd_soc_bind_card(struct snd_soc_card *card) /* try to set some sane longname if DMI is available */ snd_soc_set_dmi_name(card, NULL); - soc_setup_card_name(card->snd_card->shortname, - card->name, NULL, 0); - soc_setup_card_name(card->snd_card->longname, - card->long_name, card->name, 0); - soc_setup_card_name(card->snd_card->driver, - card->driver_name, card->name, 1); + soc_setup_card_name(card, card->snd_card->shortname, + card->name, NULL); + soc_setup_card_name(card, card->snd_card->longname, + card->long_name, card->name); + soc_setup_card_name(card, card->snd_card->driver, + card->driver_name, card->name); if (card->components) { /* the current implementation of snd_component_add() accepts */ -- 2.35.3

4 12

[PATCH] ALSA: asihpi: remove variable loops
by Colin Ian King 24 Oct '22

24 Oct '22

Variable loops is just being incremented and it's never used anywhere else. The variable and the increment are redundant so remove it. Signed-off-by: Colin Ian King <colin.i.king(a)gmail.com> --- sound/pci/asihpi/asihpi.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/sound/pci/asihpi/asihpi.c b/sound/pci/asihpi/asihpi.c index 8de43aaa10aa..001786e2aba1 100644 --- a/sound/pci/asihpi/asihpi.c +++ b/sound/pci/asihpi/asihpi.c @@ -725,7 +725,6 @@ static void snd_card_asihpi_timer_function(struct timer_list *t) unsigned int pcm_buf_dma_ofs, min_buf_pos = 0; unsigned int remdata, xfercount, next_jiffies; int first = 1; - int loops = 0; u16 state; u32 buffer_size, bytes_avail, samples_played, on_card_bytes; char name[16]; @@ -806,7 +805,6 @@ static void snd_card_asihpi_timer_function(struct timer_list *t) (unsigned long)frames_to_bytes(runtime, runtime->control->appl_ptr) ); - loops++; } pcm_buf_dma_ofs = min_buf_pos; -- 2.37.3

2 1

[PATCH] ALSA: rawmidi: remove variable dest_frames
by Colin Ian King 24 Oct '22

24 Oct '22

Variable dest_frames is just being incremented and it's never used anywhere else. The variable and the increment are redundant so remove it. Signed-off-by: Colin Ian King <colin.i.king(a)gmail.com> --- sound/core/rawmidi.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/sound/core/rawmidi.c b/sound/core/rawmidi.c index d8edb6055072..7147fda66d93 100644 --- a/sound/core/rawmidi.c +++ b/sound/core/rawmidi.c @@ -1050,7 +1050,6 @@ static int receive_with_tstamp_framing(struct snd_rawmidi_substream *substream, struct snd_rawmidi_runtime *runtime = substream->runtime; struct snd_rawmidi_framing_tstamp *dest_ptr; struct snd_rawmidi_framing_tstamp frame = { .tv_sec = tstamp->tv_sec, .tv_nsec = tstamp->tv_nsec }; - int dest_frames = 0; int orig_count = src_count; int frame_size = sizeof(struct snd_rawmidi_framing_tstamp); @@ -1077,7 +1076,6 @@ static int receive_with_tstamp_framing(struct snd_rawmidi_substream *substream, runtime->avail += frame_size; runtime->hw_ptr += frame_size; runtime->hw_ptr %= runtime->buffer_size; - dest_frames++; } return orig_count - src_count; } -- 2.37.3

2 1

[PATCH 00/21] ARM: s3c: clean out obsolete platforms
by Arnd Bergmann 24 Oct '22

24 Oct '22

From: Arnd Bergmann <arnd(a)arndb.de> The s3c24xx platform was marked as deprecated a while ago, and for the s3c64xx platform, we marked all except one legacy board file as unused. This series removes all of those, leaving only s3c64xx support for DT based boots as well as the cragg6410 board file. About half of the s3c specific drivers were only used on the now removed machines, so these drivers can be retired as well. I can either merge the driver removal patches through the soc tree along with the board file patches, or subsystem maintainers can pick them up into their own trees, whichever they prefer. Arnd Bergmann (21): ARM: s3c: remove all s3c24xx support ARM: s3c: remove s3c24xx specific hacks ARM: s3c: remove most s3c64xx board support ARM: s3c: remove adc.c ARM: s3c: simplify platform code ARM: s3c: remove s3c6400 support power: remove s3c adc battery driver hwmon: remove s3c driver pata: remove samsung_cf driver mmc: remove s3cmci driver clk: remove s3c24xx driver leds: remove s3c24xx driver usb: gadget: remove s3c24xx drivers dmaengine: remove s3c24xx driver cpufreq: remove s3c24xx drivers fbdev: remove s3c2410 framebuffer input: remove s3c24xx touchscreen driver pinctrl: remove s3c24xx driver spi: remove s3c24xx driver soc: s3c: remove pm-debug hack ASoC: samsung: remove unused drivers Cc: Krzysztof Kozlowski <krzysztof.kozlowski(a)linaro.org> Cc: Ben Dooks <ben-linux(a)fluff.org> Cc: Simtec Linux Team <linux(a)simtec.co.uk> Bcc: Alim Akhtar <alim.akhtar(a)samsung.com> Bcc: Rob Herring <robh+dt(a)kernel.org> Bcc: Damien Le Moal <damien.lemoal(a)opensource.wdc.com> Bcc: Sergey Shtylyov <s.shtylyov(a)omp.ru> Bcc: Sylwester Nawrocki <s.nawrocki(a)samsung.com> Bcc: Tomasz Figa <tomasz.figa(a)gmail.com> Bcc: Chanwoo Choi <cw00.choi(a)samsung.com> Bcc: Michael Turquette <mturquette(a)baylibre.com> Bcc: Stephen Boyd <sboyd(a)kernel.org> Bcc: Daniel Lezcano <daniel.lezcano(a)linaro.org> Bcc: Thomas Gleixner <tglx(a)linutronix.de> Bcc: "Rafael J. Wysocki" <rafael(a)kernel.org> Bcc: Viresh Kumar <viresh.kumar(a)linaro.org> Bcc: Vinod Koul <vkoul(a)kernel.org> Bcc: Jean Delvare <jdelvare(a)suse.com> Bcc: Guenter Roeck <linux(a)roeck-us.net> Bcc: Jonathan Cameron <jic23(a)kernel.org> Bcc: Lars-Peter Clausen <lars(a)metafoo.de> Bcc: Dmitry Torokhov <dmitry.torokhov(a)gmail.com> Bcc: Pavel Machek <pavel(a)ucw.cz> Bcc: Mauro Carvalho Chehab <mchehab(a)kernel.org> Bcc: Ulf Hansson <ulf.hansson(a)linaro.org> Bcc: Miquel Raynal <miquel.raynal(a)bootlin.com> Bcc: Richard Weinberger <richard(a)nod.at> Bcc: Vignesh Raghavendra <vigneshr(a)ti.com> Bcc: Linus Walleij <linus.walleij(a)linaro.org> Bcc: Sebastian Reichel <sre(a)kernel.org> Bcc: Alexandre Belloni <alexandre.belloni(a)bootlin.com> Bcc: Mark Brown <broonie(a)kernel.org> Bcc: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> Bcc: Jiri Slaby <jirislaby(a)kernel.org> Bcc: Felipe Balbi <balbi(a)kernel.org> Bcc: Helge Deller <deller(a)gmx.de> Bcc: Wim Van Sebroeck <wim(a)linux-watchdog.org> Bcc: Liam Girdwood <lgirdwood(a)gmail.com> Bcc: Thierry Reding <thierry.reding(a)gmail.com> Bcc: "Uwe Kleine-König" <u.kleine-koenig(a)pengutronix.de> Cc: linux-doc(a)vger.kernel.org Cc: linux-kernel(a)vger.kernel.org Cc: linux-arm-kernel(a)lists.infradead.org Cc: linux-samsung-soc(a)vger.kernel.org Cc: devicetree(a)vger.kernel.org Cc: patches(a)opensource.cirrus.com Cc: linux-stm32(a)st-md-mailman.stormreply.com Cc: linux-ide(a)vger.kernel.org Cc: linux-clk(a)vger.kernel.org Cc: linux-pm(a)vger.kernel.org Cc: dmaengine(a)vger.kernel.org Cc: linux-hwmon(a)vger.kernel.org Cc: linux-i2c(a)vger.kernel.org Cc: linux-iio(a)vger.kernel.org Cc: linux-input(a)vger.kernel.org Cc: linux-leds(a)vger.kernel.org Cc: linux-media(a)vger.kernel.org Cc: linux-mmc(a)vger.kernel.org Cc: linux-mtd(a)lists.infradead.org Cc: linux-gpio(a)vger.kernel.org Cc: linux-rtc(a)vger.kernel.org Cc: linux-spi(a)vger.kernel.org Cc: linux-serial(a)vger.kernel.org Cc: linux-usb(a)vger.kernel.org Cc: linux-fbdev(a)vger.kernel.org Cc: dri-devel(a)lists.freedesktop.org Cc: linux-watchdog(a)vger.kernel.org Cc: alsa-devel(a)alsa-project.org Cc: linux-pwm(a)vger.kernel.org Documentation/arm/index.rst | 1 - Documentation/arm/samsung-s3c24xx/cpufreq.rst | 77 - .../arm/samsung-s3c24xx/eb2410itx.rst | 59 - Documentation/arm/samsung-s3c24xx/gpio.rst | 172 -- Documentation/arm/samsung-s3c24xx/h1940.rst | 41 - Documentation/arm/samsung-s3c24xx/index.rst | 20 - Documentation/arm/samsung-s3c24xx/nand.rst | 30 - .../arm/samsung-s3c24xx/overview.rst | 311 --- Documentation/arm/samsung-s3c24xx/s3c2412.rst | 121 - Documentation/arm/samsung-s3c24xx/s3c2413.rst | 22 - .../arm/samsung-s3c24xx/smdk2440.rst | 57 - Documentation/arm/samsung-s3c24xx/suspend.rst | 137 -- .../arm/samsung-s3c24xx/usb-host.rst | 91 - Documentation/arm/samsung/overview.rst | 13 - MAINTAINERS | 31 - arch/arm/Kconfig | 3 +- arch/arm/Kconfig.debug | 58 +- arch/arm/Makefile | 2 - arch/arm/boot/dts/Makefile | 2 - arch/arm/boot/dts/s3c2410-pinctrl.h | 19 - arch/arm/boot/dts/s3c2416-pinctrl.dtsi | 172 -- arch/arm/boot/dts/s3c2416-smdk2416.dts | 77 - arch/arm/boot/dts/s3c2416.dtsi | 124 -- arch/arm/boot/dts/s3c24xx.dtsi | 92 - arch/arm/configs/mini2440_defconfig | 338 --- arch/arm/configs/s3c2410_defconfig | 437 ---- arch/arm/configs/tct_hammer_defconfig | 58 - arch/arm/include/debug/s3c24xx.S | 10 - arch/arm/mach-s3c/Kconfig | 92 +- arch/arm/mach-s3c/Kconfig.s3c24xx | 604 ----- arch/arm/mach-s3c/Kconfig.s3c64xx | 212 -- arch/arm/mach-s3c/Makefile | 12 - arch/arm/mach-s3c/Makefile.s3c24xx | 102 - arch/arm/mach-s3c/Makefile.s3c64xx | 15 - arch/arm/mach-s3c/adc-core.h | 24 - arch/arm/mach-s3c/adc.c | 510 ----- arch/arm/mach-s3c/anubis.h | 50 - arch/arm/mach-s3c/ata-core-s3c64xx.h | 24 - arch/arm/mach-s3c/backlight-s3c64xx.h | 22 - arch/arm/mach-s3c/bast-ide.c | 82 - arch/arm/mach-s3c/bast-irq.c | 137 -- arch/arm/mach-s3c/bast.h | 194 -- arch/arm/mach-s3c/common-smdk-s3c24xx.c | 228 -- arch/arm/mach-s3c/common-smdk-s3c24xx.h | 11 - arch/arm/mach-s3c/cpu.h | 47 - arch/arm/mach-s3c/cpufreq-utils-s3c24xx.c | 94 - arch/arm/mach-s3c/dev-audio-s3c64xx.c | 127 -- arch/arm/mach-s3c/dev-backlight-s3c64xx.c | 137 -- arch/arm/mach-s3c/devs.c | 726 ------ arch/arm/mach-s3c/devs.h | 37 - arch/arm/mach-s3c/dma-s3c24xx.h | 51 - arch/arm/mach-s3c/dma-s3c64xx.h | 57 - arch/arm/mach-s3c/dma.h | 9 - arch/arm/mach-s3c/fb-core-s3c24xx.h | 24 - arch/arm/mach-s3c/gpio-cfg-helpers.h | 124 -- arch/arm/mach-s3c/gpio-cfg.h | 19 - arch/arm/mach-s3c/gpio-core.h | 3 - arch/arm/mach-s3c/gpio-samsung-s3c24xx.h | 103 - arch/arm/mach-s3c/gpio-samsung.c | 443 +--- arch/arm/mach-s3c/gpio-samsung.h | 7 - arch/arm/mach-s3c/gta02.h | 20 - arch/arm/mach-s3c/h1940-bluetooth.c | 140 -- arch/arm/mach-s3c/h1940.h | 52 - arch/arm/mach-s3c/hardware-s3c24xx.h | 14 - arch/arm/mach-s3c/iic-core.h | 7 - arch/arm/mach-s3c/init.c | 26 +- arch/arm/mach-s3c/iotiming-s3c2410.c | 472 ---- arch/arm/mach-s3c/iotiming-s3c2412.c | 278 --- arch/arm/mach-s3c/irq-pm-s3c24xx.c | 115 - arch/arm/mach-s3c/irq-s3c24xx-fiq-exports.c | 9 - arch/arm/mach-s3c/irq-s3c24xx-fiq.S | 112 - arch/arm/mach-s3c/irq-s3c24xx.c | 1352 ----------- arch/arm/mach-s3c/irqs-s3c24xx.h | 219 -- arch/arm/mach-s3c/irqs.h | 7 - arch/arm/mach-s3c/mach-amlm5900.c | 248 --- arch/arm/mach-s3c/mach-anubis.c | 422 ---- arch/arm/mach-s3c/mach-anw6410.c | 230 -- arch/arm/mach-s3c/mach-at2440evb.c | 233 -- arch/arm/mach-s3c/mach-bast.c | 583 ----- arch/arm/mach-s3c/mach-crag6410.c | 1 - arch/arm/mach-s3c/mach-gta02.c | 588 ----- arch/arm/mach-s3c/mach-h1940.c | 809 ------- arch/arm/mach-s3c/mach-hmt.c | 282 --- arch/arm/mach-s3c/mach-jive.c | 693 ------ arch/arm/mach-s3c/mach-mini2440.c | 804 ------- arch/arm/mach-s3c/mach-mini6410.c | 365 --- arch/arm/mach-s3c/mach-n30.c | 682 ------ arch/arm/mach-s3c/mach-ncp.c | 100 - arch/arm/mach-s3c/mach-nexcoder.c | 162 -- arch/arm/mach-s3c/mach-osiris-dvs.c | 178 -- arch/arm/mach-s3c/mach-osiris.c | 405 ---- arch/arm/mach-s3c/mach-otom.c | 124 -- arch/arm/mach-s3c/mach-qt2410.c | 375 ---- arch/arm/mach-s3c/mach-real6410.c | 333 --- arch/arm/mach-s3c/mach-rx1950.c | 884 -------- arch/arm/mach-s3c/mach-rx3715.c | 213 -- arch/arm/mach-s3c/mach-s3c2416-dt.c | 48 - arch/arm/mach-s3c/mach-smartq.c | 424 ---- arch/arm/mach-s3c/mach-smartq.h | 16 - arch/arm/mach-s3c/mach-smartq5.c | 154 -- arch/arm/mach-s3c/mach-smartq7.c | 170 -- arch/arm/mach-s3c/mach-smdk2410.c | 112 - arch/arm/mach-s3c/mach-smdk2413.c | 169 -- arch/arm/mach-s3c/mach-smdk2416.c | 248 --- arch/arm/mach-s3c/mach-smdk2440.c | 180 -- arch/arm/mach-s3c/mach-smdk2443.c | 126 -- arch/arm/mach-s3c/mach-smdk6400.c | 90 - arch/arm/mach-s3c/mach-smdk6410.c | 706 ------ arch/arm/mach-s3c/mach-tct_hammer.c | 157 -- arch/arm/mach-s3c/mach-vr1000.c | 364 --- arch/arm/mach-s3c/mach-vstms.c | 166 -- arch/arm/mach-s3c/map-s3c.h | 37 - arch/arm/mach-s3c/map-s3c24xx.h | 159 -- arch/arm/mach-s3c/map.h | 7 - arch/arm/mach-s3c/nand-core-s3c24xx.h | 24 - arch/arm/mach-s3c/onenand-core-s3c64xx.h | 32 - arch/arm/mach-s3c/osiris.h | 50 - arch/arm/mach-s3c/otom.h | 25 - arch/arm/mach-s3c/pll-s3c2410.c | 83 - arch/arm/mach-s3c/pll-s3c2440-12000000.c | 95 - arch/arm/mach-s3c/pll-s3c2440-16934400.c | 122 - arch/arm/mach-s3c/pm-core-s3c24xx.h | 96 - arch/arm/mach-s3c/pm-core-s3c64xx.h | 17 - arch/arm/mach-s3c/pm-core.h | 7 - arch/arm/mach-s3c/pm-h1940.S | 19 - arch/arm/mach-s3c/pm-s3c2410.c | 170 -- arch/arm/mach-s3c/pm-s3c2412.c | 126 -- arch/arm/mach-s3c/pm-s3c2416.c | 81 - arch/arm/mach-s3c/pm-s3c24xx.c | 121 - arch/arm/mach-s3c/pm-s3c64xx.c | 83 - arch/arm/mach-s3c/pm.c | 7 +- arch/arm/mach-s3c/pm.h | 12 - arch/arm/mach-s3c/regs-adc.h | 64 - arch/arm/mach-s3c/regs-clock-s3c24xx.h | 146 -- arch/arm/mach-s3c/regs-clock.h | 7 - arch/arm/mach-s3c/regs-dsc-s3c24xx.h | 22 - arch/arm/mach-s3c/regs-gpio-s3c24xx.h | 608 ----- arch/arm/mach-s3c/regs-gpio.h | 7 - arch/arm/mach-s3c/regs-irq-s3c24xx.h | 51 - arch/arm/mach-s3c/regs-irq.h | 7 - arch/arm/mach-s3c/regs-mem-s3c24xx.h | 53 - arch/arm/mach-s3c/regs-s3c2443-clock.h | 238 -- arch/arm/mach-s3c/regs-srom-s3c64xx.h | 55 - arch/arm/mach-s3c/rtc-core-s3c24xx.h | 23 - arch/arm/mach-s3c/s3c2410.c | 130 -- arch/arm/mach-s3c/s3c2412-power.h | 34 - arch/arm/mach-s3c/s3c2412.c | 175 -- arch/arm/mach-s3c/s3c2412.h | 25 - arch/arm/mach-s3c/s3c2416.c | 132 -- arch/arm/mach-s3c/s3c2440.c | 71 - arch/arm/mach-s3c/s3c2442.c | 62 - arch/arm/mach-s3c/s3c2443.c | 112 - arch/arm/mach-s3c/s3c244x.c | 128 -- arch/arm/mach-s3c/s3c24xx.c | 687 ------ arch/arm/mach-s3c/s3c24xx.h | 124 -- arch/arm/mach-s3c/s3c6400.c | 90 - arch/arm/mach-s3c/s3c6410.c | 9 - arch/arm/mach-s3c/s3c64xx.c | 8 - arch/arm/mach-s3c/sdhci.h | 25 - arch/arm/mach-s3c/setup-i2c-s3c24xx.c | 23 - arch/arm/mach-s3c/setup-ide-s3c64xx.c | 40 - arch/arm/mach-s3c/setup-sdhci-gpio-s3c24xx.c | 31 - arch/arm/mach-s3c/setup-spi-s3c24xx.c | 27 - arch/arm/mach-s3c/setup-ts-s3c24xx.c | 29 - arch/arm/mach-s3c/simtec-audio.c | 76 - arch/arm/mach-s3c/simtec-nor.c | 74 - arch/arm/mach-s3c/simtec-pm.c | 60 - arch/arm/mach-s3c/simtec-usb.c | 125 -- arch/arm/mach-s3c/simtec.h | 17 - arch/arm/mach-s3c/sleep-s3c2410.S | 54 - arch/arm/mach-s3c/sleep-s3c2412.S | 53 - arch/arm/mach-s3c/sleep-s3c24xx.S | 69 - arch/arm/mach-s3c/sleep-s3c64xx.S | 27 - arch/arm/mach-s3c/spi-core-s3c24xx.h | 21 - arch/arm/mach-s3c/vr1000.h | 113 - drivers/ata/Kconfig | 10 - drivers/ata/Makefile | 1 - drivers/ata/pata_samsung_cf.c | 662 ------ drivers/clk/samsung/Kconfig | 32 - drivers/clk/samsung/Makefile | 4 - drivers/clk/samsung/clk-s3c2410-dclk.c | 440 ---- drivers/clk/samsung/clk-s3c2410.c | 446 ---- drivers/clk/samsung/clk-s3c2412.c | 254 --- drivers/clk/samsung/clk-s3c2443.c | 438 ---- drivers/clocksource/Kconfig | 2 +- drivers/cpufreq/Kconfig.arm | 78 - drivers/cpufreq/Makefile | 6 - drivers/cpufreq/s3c2410-cpufreq.c | 155 -- drivers/cpufreq/s3c2412-cpufreq.c | 240 -- drivers/cpufreq/s3c2416-cpufreq.c | 492 ---- drivers/cpufreq/s3c2440-cpufreq.c | 321 --- drivers/cpufreq/s3c24xx-cpufreq-debugfs.c | 163 -- drivers/cpufreq/s3c24xx-cpufreq.c | 648 ------ drivers/dma/Kconfig | 12 - drivers/dma/Makefile | 1 - drivers/dma/s3c24xx-dma.c | 1428 ------------ drivers/hwmon/Kconfig | 17 - drivers/hwmon/Makefile | 1 - drivers/hwmon/s3c-hwmon.c | 379 ---- drivers/i2c/busses/Kconfig | 3 +- drivers/i2c/busses/i2c-s3c2410.c | 72 - drivers/iio/adc/Kconfig | 6 +- drivers/input/touchscreen/Kconfig | 12 - drivers/input/touchscreen/Makefile | 1 - drivers/input/touchscreen/s3c2410_ts.c | 464 ---- drivers/leds/Kconfig | 8 - drivers/leds/Makefile | 1 - drivers/leds/leds-s3c24xx.c | 83 - .../media/platform/samsung/s3c-camif/Kconfig | 8 +- drivers/mmc/host/Kconfig | 48 +- drivers/mmc/host/Makefile | 1 - drivers/mmc/host/s3cmci.c | 1777 --------------- drivers/mmc/host/s3cmci.h | 75 - drivers/mtd/nand/raw/Kconfig | 2 +- drivers/mtd/nand/raw/s3c2410.c | 60 - drivers/pinctrl/samsung/Kconfig | 5 - drivers/pinctrl/samsung/Makefile | 1 - drivers/pinctrl/samsung/pinctrl-s3c24xx.c | 653 ------ drivers/pinctrl/samsung/pinctrl-samsung.c | 10 - drivers/power/supply/Kconfig | 6 - drivers/power/supply/Makefile | 1 - drivers/power/supply/s3c_adc_battery.c | 453 ---- drivers/rtc/Kconfig | 8 +- drivers/soc/samsung/Kconfig | 26 +- drivers/soc/samsung/Makefile | 1 - drivers/soc/samsung/s3c-pm-debug.c | 79 - drivers/spi/Kconfig | 18 - drivers/spi/Makefile | 2 - drivers/spi/spi-s3c24xx-regs.h | 41 - drivers/spi/spi-s3c24xx.c | 596 ----- drivers/tty/serial/Kconfig | 8 +- drivers/tty/serial/samsung_tty.c | 199 -- drivers/usb/gadget/udc/Kconfig | 25 - drivers/usb/gadget/udc/Makefile | 2 - drivers/usb/gadget/udc/s3c-hsudc.c | 1319 ----------- drivers/usb/gadget/udc/s3c2410_udc.c | 1980 ----------------- drivers/usb/gadget/udc/s3c2410_udc.h | 99 - drivers/usb/gadget/udc/s3c2410_udc_regs.h | 146 -- drivers/usb/host/Kconfig | 8 +- drivers/video/fbdev/Kconfig | 33 +- drivers/video/fbdev/Makefile | 1 - drivers/video/fbdev/s3c2410fb-regs-lcd.h | 143 -- drivers/video/fbdev/s3c2410fb.c | 1142 ---------- drivers/video/fbdev/s3c2410fb.h | 48 - drivers/watchdog/Kconfig | 9 +- drivers/watchdog/s3c2410_wdt.c | 84 +- include/dt-bindings/clock/s3c2410.h | 59 - include/dt-bindings/clock/s3c2412.h | 70 - include/dt-bindings/clock/s3c2443.h | 91 - include/linux/amba/pl093.h | 77 - include/linux/clk/samsung.h | 32 - .../linux/platform_data/asoc-s3c24xx_simtec.h | 30 - include/linux/platform_data/ata-samsung_cf.h | 31 - include/linux/platform_data/clk-s3c2410.h | 19 - include/linux/platform_data/dma-s3c24xx.h | 48 - include/linux/platform_data/fb-s3c2410.h | 99 - include/linux/platform_data/leds-s3c24xx.h | 18 - include/linux/platform_data/media/s5p_hdmi.h | 32 - include/linux/platform_data/mmc-s3cmci.h | 51 - include/linux/platform_data/s3c-hsudc.h | 33 - include/linux/platform_data/usb-s3c2410_udc.h | 33 - include/linux/s3c_adc_battery.h | 39 - include/linux/soc/samsung/s3c-adc.h | 32 - include/linux/soc/samsung/s3c-cpufreq-core.h | 299 --- include/linux/soc/samsung/s3c-pm.h | 58 - include/linux/spi/s3c24xx-fiq.h | 33 - include/linux/spi/s3c24xx.h | 20 - include/sound/s3c24xx_uda134x.h | 14 - sound/soc/samsung/Kconfig | 93 - sound/soc/samsung/Makefile | 26 - sound/soc/samsung/h1940_uda1380.c | 224 -- sound/soc/samsung/jive_wm8750.c | 143 -- sound/soc/samsung/neo1973_wm8753.c | 360 --- sound/soc/samsung/regs-i2s-v2.h | 111 - sound/soc/samsung/regs-iis.h | 66 - sound/soc/samsung/rx1950_uda1380.c | 245 -- sound/soc/samsung/s3c-i2s-v2.c | 670 ------ sound/soc/samsung/s3c-i2s-v2.h | 108 - sound/soc/samsung/s3c2412-i2s.c | 251 --- sound/soc/samsung/s3c2412-i2s.h | 22 - sound/soc/samsung/s3c24xx-i2s.c | 463 ---- sound/soc/samsung/s3c24xx-i2s.h | 31 - sound/soc/samsung/s3c24xx_simtec.c | 372 ---- sound/soc/samsung/s3c24xx_simtec.h | 18 - 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sound/soc/samsung/s3c24xx_simtec.h delete mode 100644 sound/soc/samsung/s3c24xx_simtec_hermes.c delete mode 100644 sound/soc/samsung/s3c24xx_simtec_tlv320aic23.c delete mode 100644 sound/soc/samsung/s3c24xx_uda134x.c delete mode 100644 sound/soc/samsung/smartq_wm8987.c delete mode 100644 sound/soc/samsung/smdk_wm8580.c -- 2.29.2

4 6

Discuss to review question [PATCH V2 1/2] ASoc:codes:Add Awinic AW883XX audio amplifier driver
by wangweidong.a＠awinic.com 24 Oct '22

24 Oct '22

HI: Mark Brown First of all, thank you for your review. I still have a question I'd like to discuss with you On Mon, Oct 17, 2022 at 04:09:12PM +0800, wangweidong.a(a)awinic.com wrote: > Hi: Mark Brown > > Thank you for your suggestion. I will fix the problem you raised in > the next patch, but there is still a question here and I want to > discuss it with you > > This is rather too big to go through in one go so the review here is > very high level but that's probably a good level for initial review > here as there > Please fix your mail client to clearly identify quoted text, as you can see above it's very dificult for me to tell where you've replied to my mail. > > + if (mute) { > > + aw883xx->pstream = AW883XX_STREAM_CLOSE; > > + cancel_delayed_work_sync(&aw883xx->start_work); > > + mutex_lock(&aw883xx->lock); > > + aw883xx_device_stop(aw883xx->aw_pa); > > + mutex_unlock(&aw883xx->lock); > > + } else { > > + aw883xx->pstream = AW883XX_STREAM_OPEN; > > + mutex_lock(&aw883xx->lock); > > + aw883xx_start(aw883xx, AW_ASYNC_START); > > + aw883xx_hold_dsp_spin_st(&aw883xx->aw_pa->spin_desc); > > + mutex_unlock(&aw883xx->lock); > > + } > > This doesn't look like a mute operation, it looks like it's starting > and stopping the DSP. > > Answer: This is a mute operation ,aw883xx_device_stop is called in th > aw883xx_mute function. This function not only executes the mute > function aw883xx_dev_mute, but also disables dsp and power down. This > is for the aw883xx chip low power optimization. > Then it's not a mute function, the goal of the mute function is to run before all the power management code to minimise glitches during power management. Just implement the power management via the standard ASoC power > management APIs. The essence of calling mute is not switch dsp, but switch PA. We think that PA has only two states. When no audio stream enters, turn off the PA and turn off the PA's dsp. When the audio stream enters, the PA is turned on, and the dsp is turned on at the same time Best regards Weidong Wang

2 1

[PATCH] ASoC: dt-bindings: Convert dmic-codec to DT schema
by Rob Herring 24 Oct '22

24 Oct '22

Convert the dmic-codec binding to DT schema format. The '#sound-dai-cells' and 'sound-name-prefix' properties were not documented, but are in use, so add them. Reviewed-by: Arnaud Pouliquen <arnaud.pouliquen(a)foss.st.com> Signed-off-by: Rob Herring <robh(a)kernel.org> --- v2: - Fix example include and syntax errors - Update Arnaud's email --- .../devicetree/bindings/sound/dmic-codec.yaml | 55 +++++++++++++++++++ .../devicetree/bindings/sound/dmic.txt | 22 -------- 2 files changed, 55 insertions(+), 22 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/dmic-codec.yaml delete mode 100644 Documentation/devicetree/bindings/sound/dmic.txt diff --git a/Documentation/devicetree/bindings/sound/dmic-codec.yaml b/Documentation/devicetree/bindings/sound/dmic-codec.yaml new file mode 100644 index 000000000000..bba27c985996 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/dmic-codec.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/dmic-codec.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Generic PDM Digital microphone (DMIC) codec + +maintainers: + - Arnaud Pouliquen <arnaud.pouliquen(a)foss.st.com> + +allOf: + - $ref: name-prefix.yaml# + +properties: + compatible: + const: dmic-codec + + '#sound-dai-cells': + const: 0 + + dmicen-gpios: + description: GPIO specifier for DMIC to control start and stop + maxItems: 1 + + num-channels: + description: Number of microphones on this DAI + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 1 + maximum: 8 + default: 8 + + modeswitch-delay-ms: + description: Delay (in ms) to complete DMIC mode switch + + wakeup-delay-ms: + description: Delay (in ms) after enabling the DMIC + +required: + - compatible + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + + dmic { + compatible = "dmic-codec"; + dmicen-gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>; + num-channels = <1>; + wakeup-delay-ms = <50>; + modeswitch-delay-ms = <35>; + }; +... diff --git a/Documentation/devicetree/bindings/sound/dmic.txt b/Documentation/devicetree/bindings/sound/dmic.txt deleted file mode 100644 index 32e871037269..000000000000 --- a/Documentation/devicetree/bindings/sound/dmic.txt +++ /dev/null @@ -1,22 +0,0 @@ -Device-Tree bindings for Digital microphone (DMIC) codec - -This device support generic PDM digital microphone. - -Required properties: - - compatible: should be "dmic-codec". - -Optional properties: - - dmicen-gpios: GPIO specifier for dmic to control start and stop - - num-channels: Number of microphones on this DAI - - wakeup-delay-ms: Delay (in ms) after enabling the DMIC - - modeswitch-delay-ms: Delay (in ms) to complete DMIC mode switch - -Example node: - - dmic_codec: dmic@0 { - compatible = "dmic-codec"; - dmicen-gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>; - num-channels = <1>; - wakeup-delay-ms <50>; - modeswitch-delay-ms <35>; - }; -- 2.35.1

2 1

[PATCH] ASoC: dt-bindings: Convert dmic-codec to DT schema
by Rob Herring 24 Oct '22

24 Oct '22

Convert the dmic-codec binding to DT schema format. The '#sound-dai-cells' and 'sound-name-prefix' properties were not documented, but are in use, so add them. Signed-off-by: Rob Herring <robh(a)kernel.org> --- .../devicetree/bindings/sound/dmic-codec.yaml | 55 +++++++++++++++++++ .../devicetree/bindings/sound/dmic.txt | 22 -------- 2 files changed, 55 insertions(+), 22 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/dmic-codec.yaml delete mode 100644 Documentation/devicetree/bindings/sound/dmic.txt diff --git a/Documentation/devicetree/bindings/sound/dmic-codec.yaml b/Documentation/devicetree/bindings/sound/dmic-codec.yaml new file mode 100644 index 000000000000..767152fa99cc --- /dev/null +++ b/Documentation/devicetree/bindings/sound/dmic-codec.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/dmic-codec.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Generic PDM Digital microphone (DMIC) codec + +maintainers: + - Arnaud Pouliquen <arnaud.pouliquen(a)st.com> + +allOf: + - $ref: name-prefix.yaml# + +properties: + compatible: + const: dmic-codec + + '#sound-dai-cells': + const: 0 + + dmicen-gpios: + description: GPIO specifier for DMIC to control start and stop + maxItems: 1 + + num-channels: + description: Number of microphones on this DAI + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 1 + maximum: 8 + default: 8 + + modeswitch-delay-ms: + description: Delay (in ms) to complete DMIC mode switch + + wakeup-delay-ms: + description: Delay (in ms) after enabling the DMIC + +required: + - compatible + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/gpio.h> + + dmic { + compatible = "dmic-codec"; + dmicen-gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>; + num-channels = <1>; + wakeup-delay-ms <50>; + modeswitch-delay-ms <35>; + }; +... diff --git a/Documentation/devicetree/bindings/sound/dmic.txt b/Documentation/devicetree/bindings/sound/dmic.txt deleted file mode 100644 index 32e871037269..000000000000 --- a/Documentation/devicetree/bindings/sound/dmic.txt +++ /dev/null @@ -1,22 +0,0 @@ -Device-Tree bindings for Digital microphone (DMIC) codec - -This device support generic PDM digital microphone. - -Required properties: - - compatible: should be "dmic-codec". - -Optional properties: - - dmicen-gpios: GPIO specifier for dmic to control start and stop - - num-channels: Number of microphones on this DAI - - wakeup-delay-ms: Delay (in ms) after enabling the DMIC - - modeswitch-delay-ms: Delay (in ms) to complete DMIC mode switch - -Example node: - - dmic_codec: dmic@0 { - compatible = "dmic-codec"; - dmicen-gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>; - num-channels = <1>; - wakeup-delay-ms <50>; - modeswitch-delay-ms <35>; - }; -- 2.35.1

3 3

[PATCH v5 0/9] ASoC: cleanups and improvements for jz4740-i2s
by Aidan MacDonald 23 Oct '22

23 Oct '22

This series is a preparatory cleanup of the jz4740-i2s driver before adding support for a new SoC. The two improvements are lifting unnecessary restrictions on sample rates and formats -- the existing ones appear to be derived from the limitations of the JZ4740's internal codec and don't reflect the actual capabilities of the I2S controller. I'm unable to test the series on any JZ47xx SoCs, but I have tested on an X1000 (which is the SoC I'll be adding in a followup series). Changes in v5: * Drop 'mem' resource removal patch already upstream. * Update FIFO flush bits fix to address Paul's review comments. * Drop PLL clock name patch, that needs a different approach. Link for v4: URLHERE Aidan MacDonald (9): ASoC: jz4740-i2s: Handle independent FIFO flush bits ASoC: jz4740-i2s: Convert to regmap API ASoC: jz4740-i2s: Simplify using regmap fields ASoC: jz4740-i2s: Use FIELD_PREP() macros in hw_params callback ASoC: jz4740-i2s: Align macro values and sort includes ASoC: jz4740-i2s: Support S20_LE and S24_LE sample formats ASoC: jz4740-i2s: Support continuous sample rate ASoC: jz4740-i2s: Move component functions near the component driver ASoC: jz4740-i2s: Refactor DAI probe/remove ops as component ops sound/soc/jz4740/Kconfig | 1 + sound/soc/jz4740/jz4740-i2s.c | 455 ++++++++++++++++++---------------- 2 files changed, 243 insertions(+), 213 deletions(-) -- 2.38.1

2 14

[PATCH] ALSA: hda/realtek: Add another HP ZBook G9 model quirks
by Takashi Iwai 22 Oct '22

22 Oct '22

HP ZBook Firefly 16 G9 (103c:896d) and HP ZBook Power 15.6 G9 (103c:89c0) require the same quirk for enabling CS35L41 speaker amps. Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- sound/pci/hda/patch_realtek.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index 9945861f02ef..701a72ec5629 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -9323,6 +9323,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { SND_PCI_QUIRK(0x103c, 0x8898, "HP EliteBook 845 G8 Notebook PC", ALC285_FIXUP_HP_LIMIT_INT_MIC_BOOST), SND_PCI_QUIRK(0x103c, 0x88d0, "HP Pavilion 15-eh1xxx (mainboard 88D0)", ALC287_FIXUP_HP_GPIO_LED), SND_PCI_QUIRK(0x103c, 0x8902, "HP OMEN 16", ALC285_FIXUP_HP_MUTE_LED), + SND_PCI_QUIRK(0x103c, 0x896d, "HP ZBook Firefly 16 G9", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED), SND_PCI_QUIRK(0x103c, 0x896e, "HP EliteBook x360 830 G9", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED), SND_PCI_QUIRK(0x103c, 0x8971, "HP EliteBook 830 G9", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED), SND_PCI_QUIRK(0x103c, 0x8972, "HP EliteBook 840 G9", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED), @@ -9341,6 +9342,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { SND_PCI_QUIRK(0x103c, 0x89aa, "HP EliteBook 630 G9", ALC236_FIXUP_HP_GPIO_LED), SND_PCI_QUIRK(0x103c, 0x89ac, "HP EliteBook 640 G9", ALC236_FIXUP_HP_GPIO_LED), SND_PCI_QUIRK(0x103c, 0x89ae, "HP EliteBook 650 G9", ALC236_FIXUP_HP_GPIO_LED), + SND_PCI_QUIRK(0x103c, 0x89c0, "HP ZBook Power 15.6 G9", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED), SND_PCI_QUIRK(0x103c, 0x89c3, "Zbook Studio G9", ALC245_FIXUP_CS35L41_SPI_4_HP_GPIO_LED), SND_PCI_QUIRK(0x103c, 0x89c6, "Zbook Fury 17 G9", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED), SND_PCI_QUIRK(0x103c, 0x89ca, "HP", ALC236_FIXUP_HP_MUTE_LED_MICMUTE_VREF), -- 2.35.3

1 0

Using snd_device_name_hint() with iface "card"
by GitHub issues - edited 22 Oct '22

22 Oct '22

alsa-project/alsa-lib issue #277 was edited from MathisMARION: Hello, I have been experimenting with the `alsa` library, and I tried to use the `snd_device_name_hint()` function to print information about devices. It doesn't seem documented [here](https://www.alsa-project.org/alsa-doc/alsa-lib/group___control.html) so I looked up for examples online, and explored the source code as well. Looking at the [source code](https://github.com/alsa-project/alsa-lib/blob/master/src/control/name…, it seems like the function should be able to take `"card"` as a valid interface. However when I run this function, it returns `ENOENT`. I ran my program with `gdb` and found that [this call](https://github.com/alsa-project/alsa-lib/blob/master/src/control/name… to `add_card()` was returning the error. `add_card` calls `snd_config_search` which loops through a list to find a match. In my case I found out that the list contained `"cards"` (with an `s`), while the code was searching for `"card"` so I am left wondering if this was done on purpose. Moreover I can get info about my sound cards using `/proc/asound/cards` (with an `s` again) so it makes me doubt even more... I am running Ubuntu 20.04.5, and have installed `libasound2-dev` version `1.2.2-2.1ubuntu2.5`. I can give more info about my setup if needed, I am just unsure what other info would help as of right now. Here's a simple program reproducing my issue: ```c #include <alsa/asoundlib.h> #include <stdio.h> int main() { void **hints; int ret; ret = snd_device_name_hint(-1, "card", &hints); if (ret) { printf("snd_device_name_hint: %s\n", snd_strerror(ret)); return EXIT_FAILURE; } snd_device_name_free_hint(hints); return EXIT_SUCCESS; } ``` ``` snd_device_name_hint: No such file or directory ``` Putting `"cards"` instead results in `EINVAL`: ``` snd_device_name_hint: Invalid argument ``` Issue URL : https://github.com/alsa-project/alsa-lib/issues/277 Repository URL: https://github.com/alsa-project/alsa-lib

1 0

Using snd_device_name_hint() with iface "card"
by GitHub issues - edited 22 Oct '22

22 Oct '22

alsa-project/alsa-lib issue #277 was edited from MathisMARION: Hello, I have been experimenting with the `alsa` library, and I tried to use the `snd_device_name_hint()` function to print information about devices. It doesn't seem documented [here](https://www.alsa-project.org/alsa-doc/alsa-lib/group___control.html) so I looked up for examples online, and explored the source code as well. Looking at the [source code](https://github.com/alsa-project/alsa-lib/blob/master/src/control/name…, it seems like the function should be able to take `"card"` as a valid interface. However when I run this function, it returns `ENOENT`. I ran my program with `gdb` and found that [this call](https://github.com/alsa-project/alsa-lib/blob/master/src/control/name… to `add_card()` was returning the error. `add_card` calls `snd_config_search` which loops through a list to find a match. In my case I found out that the list contained `"cards"` (with an `s`), while the code was searching for `"card"` so I am left wondering if this was done on purpose. Moreover I can get info about my sound cards using `/proc/asound/cards` (with an `s` again) so it makes me doubt even more... I am running Ubuntu 20.04.5, and have installed `libasound2-dev` version `1.2.2-2.1ubuntu2.5`. I can give more info about my setup if needed, I am just unsure what other info would help as of right now. Here's a simple program reproducing my issue: ```c #include <alsa/asoundlib.h> #include <stdio.h> int main() { void **hints; int ret; ret = snd_device_name_hint(-1, "card", &hints); if (ret) { printf("snd_device_name_hint: %s\n", snd_strerror(ret)); return EXIT_FAILURE; } snd_device_name_free_hint(hints); return EXIT_SUCCESS; } ``` Issue URL : https://github.com/alsa-project/alsa-lib/issues/277 Repository URL: https://github.com/alsa-project/alsa-lib

1 0

Using snd_device_name_hint() with iface "card"
by GitHub issues - opened 22 Oct '22

22 Oct '22

alsa-project/alsa-lib issue #277 was opened from MathisMARION: Hello, I have been experimenting with the `alsa` library, and I tried to use the `snd_device_name_hint()` function to print information about devices. It doesn't seem documented [here](https://www.alsa-project.org/alsa-doc/alsa-lib/group___control.html) so I looked up for examples online, and explored the source code as well. Looking at the [source code](https://github.com/alsa-project/alsa-lib/blob/master/src/control/name…, it seems like the function should be able to take `"card"` as a valid interface. However when I run this function, it returns `ENOENT`. I ran my program with `gdb` and found that [this call](https://github.com/alsa-project/alsa-lib/blob/master/src/control/name… to `add_card()` was returning the error. `add_card` calls `snd_config_search` which loops through a list to find a match. In my case I found out that the list contained `"cards"` (with an `s`), while the code was searching for `"card"` so I am left wondering if this was done on purpose. Moreover I can get info about my sound cards using `/proc/asound/cards` (with an `s` again) so it makes me doubt even more... I am running Ubuntu 20.04.5, and have installed `libasound2-dev` version `1.2.2-2.1ubuntu2.5`. I can give more info about my setup if needed, I am just unsure what other info would help as of right now. Issue URL : https://github.com/alsa-project/alsa-lib/issues/277 Repository URL: https://github.com/alsa-project/alsa-lib

1 0

[PATCH v2 00/19] ASoC: SOF: Intel/IPC4: Support for external firmware libraries
by Peter Ujfalusi 21 Oct '22

21 Oct '22

Hi, Changes since v1: - rebased on "[PATCH v2] ASoC: SOF: Intel: pci-tgl: fix ADL-N descriptor" Cover letter: In IPC4 all DSP loadable executable is a 'library' containing modules. The main or basefw is also a library which contains multiple modules. IPC4 allows to use loadable libraries to extend the functionality of the booted basefw. This series adds support for loading external libraries in case they are needed by the loaded topology file. The libraries must be placed to a specific firmware directory (fw_lib_prefix), which is: intel/avs-lib|sof-ipc4-lib/ followed by the platform name and in case of community key use a 'community' directory. For example for upx-i11 (community key): intel/avs-lib/tgl/community is the default path. The name of the library should be the UUID of the module it contains since the library loading is going to look for the file as <module_UUID>.bin In case there is a need to bundle multiple modules into single library, symlinks can be used to point to the file: module_boundle.bin <UUID1>.bin -> module_boundle.bin <UUID2>.bin -> module_boundle.bin <UUID3>.bin -> module_boundle.bin But note that in this case all modules will be loaded to the DSP since only the whole library can be loaded, not individual modules. Regards, Peter --- Peter Ujfalusi (18): ASoC: SOF: Introduce container struct for SOF firmware ASoC: SOF: amd: Use the basefw firmware container directly ASoC: SOF: Intel: hda-loader: Use the basefw firmware container directly ASoC: SOF: Intel: hda-loader-skl: Use the basefw firmware container directly ASoC: SOF: Drop the firmware and fw_offset from snd_sof_pdata ASoC: SOF: ipc: ops: Add support for optional init and exit callbacks ASoC: SOF: ipc4-loader: Save the maximum number of libraries supported ASoC: SOF: ipc4: Convert the firmware handling (loader) to library convention ASoC: SOF: IPC4: Add helper for looking up module by UUID ASoC: SOF: Add path definition for external firmware libraries ASoC: SOF: Intel: Set the default firmware library path for IPC4 ASoC: SOF: ipc4: Define platform dependent library loading callback ASoC: SOF: Intel: hda: Add flag to indicate that the firmware is IMR booted ASoC: SOF: Intel: Add ipc4 library loading implementation ASoC: SOF: loader: Add support for IPC dependent post firmware boot ops ASoC: SOF: ipc4: Stop using the query_fw_configuration fw_loader ops ASoC: SOF: loader: Remove the query_fw_configuration ops ASoC: SOF: ipc4-loader: Support for loading external libraries Ranjani Sridharan (1): ASoC: SOF: loader: Set complete state before post_fw_run op include/sound/sof.h | 10 +- include/sound/sof/ipc4/header.h | 4 + sound/soc/sof/amd/acp-loader.c | 6 +- sound/soc/sof/intel/apl.c | 3 + sound/soc/sof/intel/cnl.c | 3 + sound/soc/sof/intel/hda-loader-skl.c | 7 +- sound/soc/sof/intel/hda-loader.c | 83 +++++++++- sound/soc/sof/intel/hda.h | 4 + sound/soc/sof/intel/icl.c | 3 + sound/soc/sof/intel/mtl.c | 3 + sound/soc/sof/intel/pci-apl.c | 6 + sound/soc/sof/intel/pci-cnl.c | 9 ++ sound/soc/sof/intel/pci-icl.c | 6 + sound/soc/sof/intel/pci-mtl.c | 3 + sound/soc/sof/intel/pci-tgl.c | 24 +++ sound/soc/sof/intel/tgl.c | 3 + sound/soc/sof/ipc.c | 6 + sound/soc/sof/ipc3-loader.c | 26 ++- sound/soc/sof/ipc4-loader.c | 233 ++++++++++++++++++++++++--- sound/soc/sof/ipc4-priv.h | 65 ++++++-- sound/soc/sof/ipc4-topology.c | 17 +- sound/soc/sof/ipc4.c | 41 +++++ sound/soc/sof/loader.c | 25 ++- sound/soc/sof/sof-pci-dev.c | 26 +++ sound/soc/sof/sof-priv.h | 27 +++- 25 files changed, 543 insertions(+), 100 deletions(-) -- 2.38.1

3 21

alsactl restore udev rule failing
by GitHub issues - edited 21 Oct '22

21 Oct '22

alsa-project/alsa-utils issue #175 was edited from rnhmjoj: It seems the udev rule to restore card settings is always failing during the boot: ``` $ journalctl -u systemd-udevd -b -o cat --grep alsa controlC2: Process '/sbin/alsactl restore 2' failed with exit code 99. controlC2: Process '/sbin/alsactl restore 2' failed with exit code 99. controlC1: Process '/sbin/alsactl restore 1' failed with exit code 99. controlC0: Process '/sbin/alsactl restore 0' failed with exit code 99. ``` I checked and made sure the file system is mounted and /var/lib/asound.state is ok by the time the rule runs. I guess the issue could be the hardware is not yet fully initialised. Somehow the settings of card 0 (HDA Intel PCH) are restored anyway, but not those of card 1 (HDA ATI HDMI). Manually running `alsactl restore 2` later works, albeit partially (some softvol controls are never recovered). Issue URL : https://github.com/alsa-project/alsa-utils/issues/175 Repository URL: https://github.com/alsa-project/alsa-utils

1 0

alsactl restore udev rule failing
by GitHub issues - edited 21 Oct '22

21 Oct '22

alsa-project/alsa-utils issue #175 was edited from rnhmjoj: It seems the udev rule to restore card settings is always failing during the boot: ``` $ journalctl -u systemd-udevd -b -o cat --grep alsa controlC2: Process '/sbin/alsactl restore 2' failed with exit code 99. controlC2: Process '/sbin/alsactl restore 2' failed with exit code 99. controlC1: Process '/sbin/alsactl restore 1' failed with exit code 99. controlC0: Process '/sbin/alsactl restore 0' failed with exit code 99. ``` I checked and made sure the file system is mounted and /var/lib/asound.state is ok by the time the rule runs. I guess the issue could be the hardware is not yet fully initialised. Somehow the settings of card 0 (HDA Intel PCH) are restored anyway, but not those of card 2 (HDA ATI HDMI). Manually running `alsactl restore 2` later works, albeit partially (some softvol controls are never recovered). Issue URL : https://github.com/alsa-project/alsa-utils/issues/175 Repository URL: https://github.com/alsa-project/alsa-utils

1 0

alsactl restore udev rule failing
by GitHub issues - opened 21 Oct '22

21 Oct '22

alsa-project/alsa-utils issue #175 was opened from rnhmjoj: It seems the udev rule to restore card settings is always failing during the boot: ``` $ journalctl -u systemd-udevd -b -o cat --grep alsa controlC2: Process '/sbin/alsactl restore 2' failed with exit code 99. controlC2: Process '/sbin/alsactl restore 2' failed with exit code 99. controlC1: Process '/sbin/alsactl restore 1' failed with exit code 99. controlC0: Process '/sbin/alsactl restore 0' failed with exit code 99. ``` I checked and made sure the file system is mounted and /var/lib/asound.state is ok by the time the rule runs. I guess the issue could be the hardware is not yet fully initialised. Somehow the settings of card 0 (HDA Intel PCH) are restored anyway, but not those of card 2 (HDA ATI HDMI). Manually running `alsactl restore 2` later works, albeit partially (some softvol controls are never recovered). Issue URL : https://github.com/alsa-project/alsa-utils/issues/175 Repository URL: https://github.com/alsa-project/alsa-utils

1 0

ucm2: Add initial support for AMD Vangogh (acp5x) on Steam Deck
by GitHub pull_request - opened 21 Oct '22

21 Oct '22

alsa-project/alsa-ucm-conf pull request #233 was opened from cristicc: This has been tested on a Valve Steam Deck EV2 unit, using kernel v6.1-rc1. Request URL : https://github.com/alsa-project/alsa-ucm-conf/pull/233 Patch URL : https://github.com/alsa-project/alsa-ucm-conf/pull/233.patch Repository URL: https://github.com/alsa-project/alsa-ucm-conf

1 0

[PATCH v2] ASoC: Intel: Skylake: fix possible memory leak in skl_codec_device_init()
by Yang Yingliang 21 Oct '22

21 Oct '22

If snd_hdac_device_register() fails, 'codec' and name allocated in dev_set_name() called in snd_hdac_device_init() are leaked. Fix this by calling put_device(), so they can be freed in snd_hda_codec_dev_release() and kobject_cleanup(). Fixes: e4746d94d00c ("ASoC: Intel: Skylake: Introduce HDA codec init and exit routines") Fixes: dfe66a18780d ("ALSA: hdac_ext: add extended HDA bus") Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- v1 -> v2: remove skl_codec_device_exit() and use snd_hda_codec_dev_release() to fix leak --- sound/soc/intel/skylake/skl.c | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/sound/soc/intel/skylake/skl.c b/sound/soc/intel/skylake/skl.c index bbba2df33aaf..3312b57e3c0c 100644 --- a/sound/soc/intel/skylake/skl.c +++ b/sound/soc/intel/skylake/skl.c @@ -689,11 +689,6 @@ static void load_codec_module(struct hda_codec *codec) #endif /* CONFIG_SND_SOC_INTEL_SKYLAKE_HDAUDIO_CODEC */ -static void skl_codec_device_exit(struct device *dev) -{ - snd_hdac_device_exit(dev_to_hdac_dev(dev)); -} - static struct hda_codec *skl_codec_device_init(struct hdac_bus *bus, int addr) { struct hda_codec *codec; @@ -706,12 +701,11 @@ static struct hda_codec *skl_codec_device_init(struct hdac_bus *bus, int addr) } codec->core.type = HDA_DEV_ASOC; - codec->core.dev.release = skl_codec_device_exit; ret = snd_hdac_device_register(&codec->core); if (ret) { dev_err(bus->dev, "failed to register hdac device\n"); - snd_hdac_device_exit(&codec->core); + put_device(&codec->core.dev); return ERR_PTR(ret); } -- 2.25.1

3 3

[PATCH v2] ASOC: SOF: Intel: hda-codec: fix possible memory leak in hda_codec_device_init()
by Yang Yingliang 21 Oct '22

21 Oct '22

If snd_hdac_device_register() fails, 'codec' and name allocated in dev_set_name() called in snd_hdac_device_init() are leaked. Fix this by calling put_device(), so they can be freed in snd_hda_codec_dev_release() and kobject_cleanup(). Fixes: 829c67319806 ("ASoC: SOF: Intel: Introduce HDA codec init and exit routines") Fixes: dfe66a18780d ("ALSA: hdac_ext: add extended HDA bus") Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- v1 -> v2: remove hda_codec_device_exit() and use snd_hda_codec_dev_release() to fix leak --- sound/soc/sof/intel/hda-codec.c | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/sound/soc/sof/intel/hda-codec.c b/sound/soc/sof/intel/hda-codec.c index 1e9afc48394c..f2ec2a6c2e0f 100644 --- a/sound/soc/sof/intel/hda-codec.c +++ b/sound/soc/sof/intel/hda-codec.c @@ -109,11 +109,6 @@ EXPORT_SYMBOL_NS(hda_codec_jack_check, SND_SOC_SOF_HDA_AUDIO_CODEC); #define is_generic_config(x) 0 #endif -static void hda_codec_device_exit(struct device *dev) -{ - snd_hdac_device_exit(dev_to_hdac_dev(dev)); -} - static struct hda_codec *hda_codec_device_init(struct hdac_bus *bus, int addr, int type) { struct hda_codec *codec; @@ -126,12 +121,11 @@ static struct hda_codec *hda_codec_device_init(struct hdac_bus *bus, int addr, i } codec->core.type = type; - codec->core.dev.release = hda_codec_device_exit; ret = snd_hdac_device_register(&codec->core); if (ret) { dev_err(bus->dev, "failed to register hdac device\n"); - snd_hdac_device_exit(&codec->core); + put_device(&codec->core.dev); return ERR_PTR(ret); } -- 2.25.1

3 2

[PATCH] ASoC: amd: yc: Add Lenovo Thinkbook 14+ 2022 21D0 to quirks table
by Leohearts 21 Oct '22

21 Oct '22

Lenovo Thinkbook 14+ 2022 (ThinkBook 14 G4+ ARA) uses Ryzen 6000 processor, and has the same microphone problem as other ThinkPads with AMD Ryzen 6000 series CPUs, which has been listed in https://bugzilla.kernel.org/show_bug.cgi?id=216267. Adding 21D0 to quirks table solves this microphone problem for ThinkBook 14 G4+ ARA. Signed-off-by: Taroe Leohearts <leohearts(a)leohearts.com> --- sound/soc/amd/yc/acp6x-mach.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/sound/soc/amd/yc/acp6x-mach.c b/sound/soc/amd/yc/acp6x-mach.c index 2cb50d5cf..c8df5c25e 100644 --- a/sound/soc/amd/yc/acp6x-mach.c +++ b/sound/soc/amd/yc/acp6x-mach.c @@ -45,6 +45,13 @@ static struct snd_soc_card acp6x_card = { }; static const struct dmi_system_id yc_acp_quirk_table[] = { + { + .driver_data = &acp6x_card, + .matches = { + DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"), + DMI_MATCH(DMI_PRODUCT_NAME, "21D0"), + } + }, { .driver_data = &acp6x_card, .matches = { -- 2.37.2

2 1

[PATCH] ALSA: usb-audio: Add quirks for M-Audio Fast Track C400/600
by Takashi Iwai 21 Oct '22

21 Oct '22

M-Audio Fast Track C400 and C600 devices (0763:2030 and 0763:2031, respectively) seem requiring the explicit setup for the implicit feedback mode. This patch adds the quirk entries for those. BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=214817 Cc: <stable(a)vger.kernel.org> Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- sound/usb/implicit.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sound/usb/implicit.c b/sound/usb/implicit.c index e1bf1b5da423..f3e8484b3d9c 100644 --- a/sound/usb/implicit.c +++ b/sound/usb/implicit.c @@ -47,6 +47,8 @@ struct snd_usb_implicit_fb_match { static const struct snd_usb_implicit_fb_match playback_implicit_fb_quirks[] = { /* Fixed EP */ /* FIXME: check the availability of generic matching */ + IMPLICIT_FB_FIXED_DEV(0x0763, 0x2030, 0x81, 3), /* M-Audio Fast Track C400 */ + IMPLICIT_FB_FIXED_DEV(0x0763, 0x2031, 0x81, 3), /* M-Audio Fast Track C600 */ IMPLICIT_FB_FIXED_DEV(0x0763, 0x2080, 0x81, 2), /* M-Audio FastTrack Ultra */ IMPLICIT_FB_FIXED_DEV(0x0763, 0x2081, 0x81, 2), /* M-Audio FastTrack Ultra */ IMPLICIT_FB_FIXED_DEV(0x2466, 0x8010, 0x81, 2), /* Fractal Audio Axe-Fx III */ -- 2.35.3

1 0

[PATCH 00/10] ALSA/ASoC: hda: cleanup sound/hda/ext code
by Pierre-Louis Bossart 21 Oct '22

21 Oct '22

The code in sound/hda/ext can be cleaned-up. This patchset suggests a more consistent use of prefixes and variable names. It also removes useless code, uses helpers when possible, and clarifies an incorrect assumption that SPIB/DRMS capabilities are tied to Intel multi-link and DSP extensions (they are not). This is a rather invasive set of changes touching sound/hda, sound/soc/intel/skylake, sound/soc/intel/avs and sound/soc/sof/intel, but there should be no change in terms of functionality. I would recommend merging these changes through the ASoC tree. Pierre-Louis Bossart (10): ALSA: hda: ext: hdac_ext_controller: use helpers in loop ALSA: hda: ext: hda_ext_controller: use hlink variable/parameter ASoC: SOF: Intel: hda-dai: use hlink variable/parameter ALSA/ASoC: hda: clarify bus_get_link() and bus_link_get() helpers ALSA/ASoC: hda: ext: add 'ext' prefix to snd_hdac_link_free_all ALSA/ASoC: hda: ext: remove 'link' prefix for stream-related operations ALSA/ASoC: hda: ext: add 'bus' prefix for multi-link stream setting ALSA: hda: ext: reduce ambiguity between 'multi-link' and 'link' DMA ALSA: hda: hdac_ext_controller: remove useless loop ALSA/ASoC: hda: move SPIB/DRMS functionality from ext layer include/sound/hdaudio.h | 26 ++++ include/sound/hdaudio_ext.h | 66 ++------ sound/hda/ext/hdac_ext_controller.c | 116 ++++++++------ sound/hda/ext/hdac_ext_stream.c | 203 +++---------------------- sound/hda/hdac_stream.c | 136 +++++++++++++++++ sound/soc/codecs/hda.c | 4 +- sound/soc/codecs/hdac_hda.c | 6 +- sound/soc/codecs/hdac_hdmi.c | 8 +- sound/soc/intel/avs/core.c | 2 +- sound/soc/intel/avs/loader.c | 16 +- sound/soc/intel/avs/pcm.c | 16 +- sound/soc/intel/skylake/skl-messages.c | 6 +- sound/soc/intel/skylake/skl-pcm.c | 35 +++-- sound/soc/intel/skylake/skl.c | 2 +- sound/soc/sof/intel/hda-dai.c | 42 ++--- sound/soc/sof/intel/hda-pcm.c | 3 +- sound/soc/sof/intel/hda-stream.c | 16 +- sound/soc/sof/intel/hda.c | 2 +- 18 files changed, 343 insertions(+), 362 deletions(-) -- 2.34.1

4 21

[PATCH 0/6] a pile of randconfig fixes
by Adam Borowski 21 Oct '22

21 Oct '22

Hi! I've been doing randconfig build tests for quite a while, here's a pile of fixes. I'm not sure what's the best way to submit these: do you folks prefer a series like this, or a number of individual submissions? With these applied, it seems that archs I run (64-bit x86 arm riscv) are clean now -- at least for the values of "haven't failed build in a while". My restrictions were: [amd64] CONFIG_64BIT=y CONFIG_COMPILE_TEST=y CONFIG_AIC79XX_BUILD_FIRMWARE=n CONFIG_AIC7XXX_BUILD_FIRMWARE=n [arm64] CONFIG_AIC79XX_BUILD_FIRMWARE=n CONFIG_AIC7XXX_BUILD_FIRMWARE=n [riscv64] !CONFIG_ARCH_RV32I=y #yay "selects" CONFIG_CMODEL_MEDANY=y CONFIG_BPF_PRELOAD_UMD=n CONFIG_AIC79XX_BUILD_FIRMWARE=n CONFIG_AIC7XXX_BUILD_FIRMWARE=n and applied fixes for dwc3-qcom riscv_cbom_block_size dump_emit_page riscv:jump_label. All builds were done with gcc-12 on Debian unstable. Meow! -- ⢀⣴⠾⠻⢶⣦⠀ ⣾⠁⢠⠒⠀⣿⡁ ⢿⡄⠘⠷⠚⠋⠀ Quis trollabit ipsos trollos? ⠈⠳⣄⠀⠀⠀⠀ >From 0d8157cf874b80deb072cb26e0f84c02f5ef0b15 Mon Sep 17 00:00:00 2001 From: Adam Borowski <kilobyte(a)angband.pl> To: Matthias Brugger <matthias.bgg(a)gmail.com>, Liam Girdwood <lgirdwood(a)gmail.com>, Mark Brown <broonie(a)kernel.org>, Jiaxin Yu <jiaxin.yu(a)mediatek.com>, AngeloGioacchino Del Regno <angelogioacchino.delregno(a)collabora.com>, linux-mediatek(a)lists.infradead.org, alsa-devel(a)alsa-project.org, linux-kernel(a)vger.kernel.org Date: Wed, 14 Sep 2022 22:06:51 +0200 Subject: [PATCH 1/6] ASoC: mediatek: mt8186: fix an "unused" warning This, and a whole bunch of referenced functions are not needed without CONFIG_OF. The warning makes the build fail under CONFIG_WERROR. Signed-off-by: Adam Borowski <kilobyte(a)angband.pl> --- sound/soc/mediatek/mt8186/mt8186-mt6366-da7219-max98357.c | 2 +- sound/soc/mediatek/mt8186/mt8186-mt6366-rt1019-rt5682s.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/mediatek/mt8186/mt8186-mt6366-da7219-max98357.c b/sound/soc/mediatek/mt8186/mt8186-mt6366-da7219-max98357.c index cfca6bdee834..b15e97bd9d4d 100644 --- a/sound/soc/mediatek/mt8186/mt8186-mt6366-da7219-max98357.c +++ b/sound/soc/mediatek/mt8186/mt8186-mt6366-da7219-max98357.c @@ -1000,7 +1000,7 @@ mt8186_mt6366_da7219_max98357_controls[] = { SOC_DAPM_PIN_SWITCH("HDMI1"), }; -static struct snd_soc_card mt8186_mt6366_da7219_max98357_soc_card = { +static __maybe_unused struct snd_soc_card mt8186_mt6366_da7219_max98357_soc_card = { .name = "mt8186_da7219_max98357", .owner = THIS_MODULE, .dai_link = mt8186_mt6366_da7219_max98357_dai_links, diff --git a/sound/soc/mediatek/mt8186/mt8186-mt6366-rt1019-rt5682s.c b/sound/soc/mediatek/mt8186/mt8186-mt6366-rt1019-rt5682s.c index 2414c5b77233..22ce2f849909 100644 --- a/sound/soc/mediatek/mt8186/mt8186-mt6366-rt1019-rt5682s.c +++ b/sound/soc/mediatek/mt8186/mt8186-mt6366-rt1019-rt5682s.c @@ -976,7 +976,7 @@ mt8186_mt6366_rt1019_rt5682s_controls[] = { SOC_DAPM_PIN_SWITCH("HDMI1"), }; -static struct snd_soc_card mt8186_mt6366_rt1019_rt5682s_soc_card = { +static __maybe_unused struct snd_soc_card mt8186_mt6366_rt1019_rt5682s_soc_card = { .name = "mt8186_rt1019_rt5682s", .owner = THIS_MODULE, .dai_link = mt8186_mt6366_rt1019_rt5682s_dai_links, -- 2.37.2.609.g9ff673ca1a >From c11d7b580c8237a5445bf043db9f37cbdf6e5590 Mon Sep 17 00:00:00 2001 From: Adam Borowski <kilobyte(a)angband.pl> To: David Howells <dhowells(a)redhat.com>, Herbert Xu <herbert(a)gondor.apana.org.au>, "David S. Miller" <davem(a)davemloft.net>, keyrings(a)vger.kernel.org, linux-crypto(a)vger.kernel.org, linux-kernel(a)vger.kernel.org Date: Wed, 14 Sep 2022 22:13:43 +0200 Subject: [PATCH 2/6] certs: fips test: fix build failure with PKCS7_MESSAGE_PARSER=m ld: crypto/asymmetric_keys/selftest.o: in function `fips_signature_selftest': selftest.c:(.init.text+0xcd): undefined reference to `pkcs7_parse_message' ld: selftest.c:(.init.text+0x103): undefined reference to `pkcs7_supply_detached_data' ld: selftest.c:(.init.text+0x10d): undefined reference to `pkcs7_verify' ld: selftest.c:(.init.text+0x135): undefined reference to `pkcs7_validate_trust' ld: selftest.c:(.init.text+0x157): undefined reference to `pkcs7_free_message' Fixes: 3cde3174eb910513d32a9ec8a9b95ea59be833df Signed-off-by: Adam Borowski <kilobyte(a)angband.pl> --- crypto/asymmetric_keys/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/crypto/asymmetric_keys/Kconfig b/crypto/asymmetric_keys/Kconfig index 3df3fe4ed95f..fe007db96c69 100644 --- a/crypto/asymmetric_keys/Kconfig +++ b/crypto/asymmetric_keys/Kconfig @@ -83,6 +83,6 @@ config FIPS_SIGNATURE_SELFTEST for FIPS. depends on KEYS depends on ASYMMETRIC_KEY_TYPE - depends on PKCS7_MESSAGE_PARSER + depends on PKCS7_MESSAGE_PARSER=y endif # ASYMMETRIC_KEY_TYPE -- 2.37.2.609.g9ff673ca1a >From 582ea8837c41dc1bc738c2bd4e01c85bc2bd3ba3 Mon Sep 17 00:00:00 2001 From: Adam Borowski <kilobyte(a)angband.pl> To: Miquel Raynal <miquel.raynal(a)bootlin.com>, Richard Weinberger <richard(a)nod.at>, Vignesh Raghavendra <vigneshr(a)ti.com>, linux-mtd(a)lists.infradead.org, Mark Brown <broonie(a)kernel.org>, linux-spi(a)vger.kernel.org, linux-kernel(a)vger.kernel.org Date: Wed, 14 Sep 2022 23:29:09 +0200 Subject: [PATCH 3/6] mtd: eject cfi_interleave code to its own header This fixes build failures for stuff that doesn't care about that, such as: In file included from ./include/linux/mtd/spi-nor.h:10, from drivers/spi/spi-intel.c:13: ./include/linux/mtd/cfi.h:62:2: error: #warning No CONFIG_MTD_CFI_Ix selected. No NOR chip support 62 | #warning No CONFIG_MTD_CFI_Ix selected. No NOR chip support can work. | ^~~~~~~ Signed-off-by: Adam Borowski <kilobyte(a)angband.pl> --- drivers/mtd/chips/cfi_cmdset_0001.c | 1 + drivers/mtd/chips/cfi_cmdset_0002.c | 1 + drivers/mtd/chips/cfi_cmdset_0020.c | 1 + drivers/mtd/chips/cfi_util.c | 1 + drivers/mtd/chips/gen_probe.c | 1 + drivers/mtd/chips/jedec_probe.c | 1 + include/linux/mtd/cfi.h | 75 -------------------------- include/linux/mtd/cfi_interleave.h | 83 +++++++++++++++++++++++++++++ 8 files changed, 89 insertions(+), 75 deletions(-) create mode 100644 include/linux/mtd/cfi_interleave.h diff --git a/drivers/mtd/chips/cfi_cmdset_0001.c b/drivers/mtd/chips/cfi_cmdset_0001.c index 54f92d09d9cf..efbf06fce95b 100644 --- a/drivers/mtd/chips/cfi_cmdset_0001.c +++ b/drivers/mtd/chips/cfi_cmdset_0001.c @@ -34,6 +34,7 @@ #include <linux/mtd/map.h> #include <linux/mtd/mtd.h> #include <linux/mtd/cfi.h> +#include <linux/mtd/cfi_interleave.h> /* #define CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE */ /* #define CMDSET0001_DISABLE_WRITE_SUSPEND */ diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c index 67453f59c69c..70d00c3641d8 100644 --- a/drivers/mtd/chips/cfi_cmdset_0002.c +++ b/drivers/mtd/chips/cfi_cmdset_0002.c @@ -37,6 +37,7 @@ #include <linux/mtd/map.h> #include <linux/mtd/mtd.h> #include <linux/mtd/cfi.h> +#include <linux/mtd/cfi_interleave.h> #include <linux/mtd/xip.h> #define AMD_BOOTLOC_BUG diff --git a/drivers/mtd/chips/cfi_cmdset_0020.c b/drivers/mtd/chips/cfi_cmdset_0020.c index d35df526e0a6..007e37faff56 100644 --- a/drivers/mtd/chips/cfi_cmdset_0020.c +++ b/drivers/mtd/chips/cfi_cmdset_0020.c @@ -31,6 +31,7 @@ #include <linux/interrupt.h> #include <linux/mtd/map.h> #include <linux/mtd/cfi.h> +#include <linux/mtd/cfi_interleave.h> #include <linux/mtd/mtd.h> diff --git a/drivers/mtd/chips/cfi_util.c b/drivers/mtd/chips/cfi_util.c index 6a6a2a21d2ed..608315032f9e 100644 --- a/drivers/mtd/chips/cfi_util.c +++ b/drivers/mtd/chips/cfi_util.c @@ -22,6 +22,7 @@ #include <linux/mtd/mtd.h> #include <linux/mtd/map.h> #include <linux/mtd/cfi.h> +#include <linux/mtd/cfi_interleave.h> void cfi_udelay(int us) { diff --git a/drivers/mtd/chips/gen_probe.c b/drivers/mtd/chips/gen_probe.c index 4d4f97841016..8703890ff20e 100644 --- a/drivers/mtd/chips/gen_probe.c +++ b/drivers/mtd/chips/gen_probe.c @@ -10,6 +10,7 @@ #include <linux/mtd/mtd.h> #include <linux/mtd/map.h> #include <linux/mtd/cfi.h> +#include <linux/mtd/cfi_interleave.h> #include <linux/mtd/gen_probe.h> static struct mtd_info *check_cmd_set(struct map_info *, int); diff --git a/drivers/mtd/chips/jedec_probe.c b/drivers/mtd/chips/jedec_probe.c index 6f7e7e1b3fe5..88a979bb59bb 100644 --- a/drivers/mtd/chips/jedec_probe.c +++ b/drivers/mtd/chips/jedec_probe.c @@ -20,6 +20,7 @@ #include <linux/mtd/mtd.h> #include <linux/mtd/map.h> #include <linux/mtd/cfi.h> +#include <linux/mtd/cfi_interleave.h> #include <linux/mtd/gen_probe.h> /* AMD */ diff --git a/include/linux/mtd/cfi.h b/include/linux/mtd/cfi.h index d88bb56c18e2..4a8ddb51afee 100644 --- a/include/linux/mtd/cfi.h +++ b/include/linux/mtd/cfi.h @@ -8,87 +8,12 @@ #include <linux/delay.h> #include <linux/types.h> -#include <linux/bug.h> #include <linux/interrupt.h> #include <linux/mtd/flashchip.h> #include <linux/mtd/map.h> #include <linux/mtd/cfi_endian.h> #include <linux/mtd/xip.h> -#ifdef CONFIG_MTD_CFI_I1 -#define cfi_interleave(cfi) 1 -#define cfi_interleave_is_1(cfi) (cfi_interleave(cfi) == 1) -#else -#define cfi_interleave_is_1(cfi) (0) -#endif - -#ifdef CONFIG_MTD_CFI_I2 -# ifdef cfi_interleave -# undef cfi_interleave -# define cfi_interleave(cfi) ((cfi)->interleave) -# else -# define cfi_interleave(cfi) 2 -# endif -#define cfi_interleave_is_2(cfi) (cfi_interleave(cfi) == 2) -#else -#define cfi_interleave_is_2(cfi) (0) -#endif - -#ifdef CONFIG_MTD_CFI_I4 -# ifdef cfi_interleave -# undef cfi_interleave -# define cfi_interleave(cfi) ((cfi)->interleave) -# else -# define cfi_interleave(cfi) 4 -# endif -#define cfi_interleave_is_4(cfi) (cfi_interleave(cfi) == 4) -#else -#define cfi_interleave_is_4(cfi) (0) -#endif - -#ifdef CONFIG_MTD_CFI_I8 -# ifdef cfi_interleave -# undef cfi_interleave -# define cfi_interleave(cfi) ((cfi)->interleave) -# else -# define cfi_interleave(cfi) 8 -# endif -#define cfi_interleave_is_8(cfi) (cfi_interleave(cfi) == 8) -#else -#define cfi_interleave_is_8(cfi) (0) -#endif - -#ifndef cfi_interleave -#warning No CONFIG_MTD_CFI_Ix selected. No NOR chip support can work. -static inline int cfi_interleave(void *cfi) -{ - BUG(); - return 0; -} -#endif - -static inline int cfi_interleave_supported(int i) -{ - switch (i) { -#ifdef CONFIG_MTD_CFI_I1 - case 1: -#endif -#ifdef CONFIG_MTD_CFI_I2 - case 2: -#endif -#ifdef CONFIG_MTD_CFI_I4 - case 4: -#endif -#ifdef CONFIG_MTD_CFI_I8 - case 8: -#endif - return 1; - - default: - return 0; - } -} - /* NB: these values must represents the number of bytes needed to meet the * device type (x8, x16, x32). Eg. a 32 bit device is 4 x 8 bytes. diff --git a/include/linux/mtd/cfi_interleave.h b/include/linux/mtd/cfi_interleave.h new file mode 100644 index 000000000000..03d94a6d11fc --- /dev/null +++ b/include/linux/mtd/cfi_interleave.h @@ -0,0 +1,83 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef __MTD_CFI_INTERLEAVE_H__ +#define __MTD_CFI_INTERLEAVE_H__ + +#include <linux/bug.h> + +#ifdef CONFIG_MTD_CFI_I1 +#define cfi_interleave(cfi) 1 +#define cfi_interleave_is_1(cfi) (cfi_interleave(cfi) == 1) +#else +#define cfi_interleave_is_1(cfi) (0) +#endif + +#ifdef CONFIG_MTD_CFI_I2 +# ifdef cfi_interleave +# undef cfi_interleave +# define cfi_interleave(cfi) ((cfi)->interleave) +# else +# define cfi_interleave(cfi) 2 +# endif +#define cfi_interleave_is_2(cfi) (cfi_interleave(cfi) == 2) +#else +#define cfi_interleave_is_2(cfi) (0) +#endif + +#ifdef CONFIG_MTD_CFI_I4 +# ifdef cfi_interleave +# undef cfi_interleave +# define cfi_interleave(cfi) ((cfi)->interleave) +# else +# define cfi_interleave(cfi) 4 +# endif +#define cfi_interleave_is_4(cfi) (cfi_interleave(cfi) == 4) +#else +#define cfi_interleave_is_4(cfi) (0) +#endif + +#ifdef CONFIG_MTD_CFI_I8 +# ifdef cfi_interleave +# undef cfi_interleave +# define cfi_interleave(cfi) ((cfi)->interleave) +# else +# define cfi_interleave(cfi) 8 +# endif +#define cfi_interleave_is_8(cfi) (cfi_interleave(cfi) == 8) +#else +#define cfi_interleave_is_8(cfi) (0) +#endif + +#ifndef cfi_interleave +#warning No CONFIG_MTD_CFI_Ix selected. No NOR chip support can work. +static inline int cfi_interleave(void *cfi) +{ + BUG(); + return 0; +} +#endif + +static inline int cfi_interleave_supported(int i) +{ + switch (i) { +#ifdef CONFIG_MTD_CFI_I1 + case 1: +#endif +#ifdef CONFIG_MTD_CFI_I2 + case 2: +#endif +#ifdef CONFIG_MTD_CFI_I4 + case 4: +#endif +#ifdef CONFIG_MTD_CFI_I8 + case 8: +#endif + return 1; + + default: + return 0; + } +} + + +#endif /* __MTD_CFI_INTERLEAVE_H__ */ -- 2.37.2.609.g9ff673ca1a >From e11b2e2d16ac6af2d2ee35b009cdb156ccf6c98e Mon Sep 17 00:00:00 2001 From: Adam Borowski <kilobyte(a)angband.pl> To: Yong Zhi <yong.zhi(a)intel.com>, Sakari Ailus <sakari.ailus(a)linux.intel.com>, Bingbu Cao <bingbu.cao(a)intel.com>, Dan Scally <djrscally(a)gmail.com>, Tianshu Qiu <tian.shu.qiu(a)intel.com>, Mauro Carvalho Chehab <mchehab(a)kernel.org>, linux-media(a)vger.kernel.org, linux-kernel(a)vger.kernel.org Date: Fri, 16 Sep 2022 01:33:18 +0200 Subject: [PATCH 4/6] media: ipu3-cio2: make the bridge depend on i2c MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit drivers/media/pci/intel/ipu3/cio2-bridge.c: In function ‘cio2_bridge_unregister_sensors’: drivers/media/pci/intel/ipu3/cio2-bridge.c:258:17: error: implicit declaration of function ‘i2c_unregister_device’; did you mean ‘spi_unregister_device’? [-Werror=implicit-function-declaration] 258 | i2c_unregister_device(sensor->vcm_i2c_client); | ^~~~~~~~~~~~~~~~~~~~~ | spi_unregister_device Signed-off-by: Adam Borowski <kilobyte(a)angband.pl> --- drivers/media/pci/intel/ipu3/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/media/pci/intel/ipu3/Kconfig b/drivers/media/pci/intel/ipu3/Kconfig index 39bd3be0b43d..65b0c1598fbf 100644 --- a/drivers/media/pci/intel/ipu3/Kconfig +++ b/drivers/media/pci/intel/ipu3/Kconfig @@ -21,6 +21,7 @@ config VIDEO_IPU3_CIO2 config CIO2_BRIDGE bool "IPU3 CIO2 Sensors Bridge" depends on VIDEO_IPU3_CIO2 && ACPI + depends on I2C help This extension provides an API for the ipu3-cio2 driver to create connections to cameras that are hidden in the SSDB buffer in ACPI. -- 2.37.2.609.g9ff673ca1a >From 6da77c7f9af144a6a35020e2000e990ce285800f Mon Sep 17 00:00:00 2001 From: Adam Borowski <kilobyte(a)angband.pl> To: Khalil Blaiech <kblaiech(a)nvidia.com>, Asmaa Mnebhi <asmaa(a)nvidia.com>, linux-i2c(a)vger.kernel.org, linux-kernel(a)vger.kernel.org Date: Mon, 10 Oct 2022 20:33:51 +0200 Subject: [PATCH 5/6] i2c: mlxbf: depend on ACPI; clean away ifdeffage This fixes maybe_unused warnings/errors. According to a comment during device tree removal, only ACPI is supported, thus let's actually require it. Fixes: be18c5ede25da39a0eda541f6de3620a30cf731f Signed-off-by: Adam Borowski <kilobyte(a)angband.pl> --- drivers/i2c/busses/Kconfig | 1 + drivers/i2c/busses/i2c-mlxbf.c | 9 --------- 2 files changed, 1 insertion(+), 9 deletions(-) diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index 264e780ae32e..e50f9603d189 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -764,6 +764,7 @@ config I2C_LPC2K config I2C_MLXBF tristate "Mellanox BlueField I2C controller" depends on MELLANOX_PLATFORM && ARM64 + depends on ACPI select I2C_SLAVE help Enabling this option will add I2C SMBus support for Mellanox BlueField diff --git a/drivers/i2c/busses/i2c-mlxbf.c b/drivers/i2c/busses/i2c-mlxbf.c index e68e775f187e..1810d5791b3d 100644 --- a/drivers/i2c/busses/i2c-mlxbf.c +++ b/drivers/i2c/busses/i2c-mlxbf.c @@ -2247,7 +2247,6 @@ static struct i2c_adapter_quirks mlxbf_i2c_quirks = { .max_write_len = MLXBF_I2C_MASTER_DATA_W_LENGTH, }; -#ifdef CONFIG_ACPI static const struct acpi_device_id mlxbf_i2c_acpi_ids[] = { { "MLNXBF03", (kernel_ulong_t)&mlxbf_i2c_chip[MLXBF_I2C_CHIP_TYPE_1] }, { "MLNXBF23", (kernel_ulong_t)&mlxbf_i2c_chip[MLXBF_I2C_CHIP_TYPE_2] }, @@ -2282,12 +2281,6 @@ static int mlxbf_i2c_acpi_probe(struct device *dev, struct mlxbf_i2c_priv *priv) return 0; } -#else -static int mlxbf_i2c_acpi_probe(struct device *dev, struct mlxbf_i2c_priv *priv) -{ - return -ENOENT; -} -#endif /* CONFIG_ACPI */ static int mlxbf_i2c_probe(struct platform_device *pdev) { @@ -2490,9 +2483,7 @@ static struct platform_driver mlxbf_i2c_driver = { .remove = mlxbf_i2c_remove, .driver = { .name = "i2c-mlxbf", -#ifdef CONFIG_ACPI .acpi_match_table = ACPI_PTR(mlxbf_i2c_acpi_ids), -#endif /* CONFIG_ACPI */ }, }; -- 2.37.2.609.g9ff673ca1a >From 22212623b9fbffbe4e6e1490049a895d1d8591bc Mon Sep 17 00:00:00 2001 From: Adam Borowski <kilobyte(a)angband.pl> To: Cezary Rojewski <cezary.rojewski(a)intel.com>, Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com>, Liam Girdwood <liam.r.girdwood(a)linux.intel.com>, Peter Ujfalusi <peter.ujfalusi(a)linux.intel.com>, Bard Liao <yung-chuan.liao(a)linux.intel.com>, Ranjani Sridharan <ranjani.sridharan(a)linux.intel.com>, Kai Vehmanen <kai.vehmanen(a)linux.intel.com>, Mark Brown <broonie(a)kernel.org>, Jaroslav Kysela <perex(a)perex.cz>, Takashi Iwai <tiwai(a)suse.com>, Brent Lu <brent.lu(a)intel.com>, alsa-devel(a)alsa-project.org, linux-kernel(a)vger.kernel.org Date: Mon, 17 Oct 2022 08:17:12 +0200 Subject: [PATCH 6/6] ASoC: Intel: boards: add missing dependency from realtek-common These boards use code from sound/soc/sof/sof-audio.c Fixes: e1d5e13324020c4b405e63cae34560c7992bec2e Signed-off-by: Adam Borowski <kilobyte(a)angband.pl> --- sound/soc/intel/boards/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/soc/intel/boards/Kconfig b/sound/soc/intel/boards/Kconfig index aa12d7e3dd2f..3179ba061d87 100644 --- a/sound/soc/intel/boards/Kconfig +++ b/sound/soc/intel/boards/Kconfig @@ -34,6 +34,7 @@ config SND_SOC_INTEL_SOF_MAXIM_COMMON config SND_SOC_INTEL_SOF_REALTEK_COMMON tristate + depends on SND_SOC_SOF config SND_SOC_INTEL_SOF_CIRRUS_COMMON tristate -- 2.37.2.609.g9ff673ca1a

3 2

[PATCH 0/6] Fix direct renaming of hashed controls
by Maciej S. Szmigiero 21 Oct '22

21 Oct '22

From: "Maciej S. Szmigiero" <maciej.szmigiero(a)oracle.com> I've noticed that some of mixer controls on my sound card seem to be partially broken on the 6.0 kernel - alsactl wasn't able to find them when restoring the mixer state. The issue was traced down to the recent addition of hashed controls lookup in commit c27e1efb61c5 ("ALSA: control: Use xarray for faster lookups"). Since that commit it is *not* enough to just directly update the control name field (like some of ALSA drivers were doing). Now the hash entries for the modified control have to be updated too. This patch set adds a snd_ctl_rename() function that takes care of doing this operation properly for callers that already have the relevant struct snd_kcontrol at hand and hold the control write lock (or simply haven't registered the card yet). These prerequisites hold true for all the call sites modified. The core controls change and the emu10k1 patch were runtime tested. Similar patches for other devices were only compile tested. include/sound/control.h | 1 + sound/core/control.c | 23 +++++++++++++++++++++++ sound/pci/ac97/ac97_codec.c | 32 ++++++++++++++++++++++++-------- sound/pci/ca0106/ca0106_mixer.c | 2 +- sound/pci/emu10k1/emumixer.c | 2 +- sound/pci/hda/patch_realtek.c | 2 +- sound/usb/mixer.c | 2 +- 7 files changed, 52 insertions(+), 12 deletions(-)

2 7

[PATCH 1/6] ASoC: mediatek: mt8186: fix an "unused" warning
by Adam Borowski 21 Oct '22

21 Oct '22

This, and a whole bunch of referenced functions are not needed without CONFIG_OF. The warning makes the build fail under CONFIG_WERROR. Signed-off-by: Adam Borowski <kilobyte(a)angband.pl> --- sound/soc/mediatek/mt8186/mt8186-mt6366-da7219-max98357.c | 2 +- sound/soc/mediatek/mt8186/mt8186-mt6366-rt1019-rt5682s.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/mediatek/mt8186/mt8186-mt6366-da7219-max98357.c b/sound/soc/mediatek/mt8186/mt8186-mt6366-da7219-max98357.c index cfca6bdee834..b15e97bd9d4d 100644 --- a/sound/soc/mediatek/mt8186/mt8186-mt6366-da7219-max98357.c +++ b/sound/soc/mediatek/mt8186/mt8186-mt6366-da7219-max98357.c @@ -1000,7 +1000,7 @@ mt8186_mt6366_da7219_max98357_controls[] = { SOC_DAPM_PIN_SWITCH("HDMI1"), }; -static struct snd_soc_card mt8186_mt6366_da7219_max98357_soc_card = { +static __maybe_unused struct snd_soc_card mt8186_mt6366_da7219_max98357_soc_card = { .name = "mt8186_da7219_max98357", .owner = THIS_MODULE, .dai_link = mt8186_mt6366_da7219_max98357_dai_links, diff --git a/sound/soc/mediatek/mt8186/mt8186-mt6366-rt1019-rt5682s.c b/sound/soc/mediatek/mt8186/mt8186-mt6366-rt1019-rt5682s.c index 2414c5b77233..22ce2f849909 100644 --- a/sound/soc/mediatek/mt8186/mt8186-mt6366-rt1019-rt5682s.c +++ b/sound/soc/mediatek/mt8186/mt8186-mt6366-rt1019-rt5682s.c @@ -976,7 +976,7 @@ mt8186_mt6366_rt1019_rt5682s_controls[] = { SOC_DAPM_PIN_SWITCH("HDMI1"), }; -static struct snd_soc_card mt8186_mt6366_rt1019_rt5682s_soc_card = { +static __maybe_unused struct snd_soc_card mt8186_mt6366_rt1019_rt5682s_soc_card = { .name = "mt8186_rt1019_rt5682s", .owner = THIS_MODULE, .dai_link = mt8186_mt6366_rt1019_rt5682s_dai_links, -- 2.37.2.609.g9ff673ca1a

1 0

Disconnecting certain USB interfaces causes the sound card to go away
by Robert Wu 21 Oct '22

21 Oct '22

Hi ALSA devs, I work on Android and starting from Android T, we use libusb to connect to an MIDI peripheral when Android is in host mode. We do this by opening the device, disconnecting the kernel MIDI interface, claiming the MIDI interface, and using its endpoints. However, we started getting bug reports from customers that some USB peripherals stop playing audio once MIDI is opened. Disconnecting the kernel MIDI interface with USBDEVFS_DISCONNECT causes the USB sound card to disappear for some devices. I tested with 6 USB interfaces with both MIDI and audio and I found the following. 1. I can disconnect the Audio Control, Audio Streaming, and Midi Streaming interfaces on the Komplete Audio 6 and the Alesis iO4 without the sound card disappearing. 2. I can disconnect the Audio Streaming and MIDI Streaming interfaces on the PreSonus USB 96 without the sound card disappearing. Disconnecting the Audio Control interface causes the sound card to disappear. 3. I can disconnect the Audio Streaming interface on the PreSonus Studio 26c, Yamaha AG06, and the Focusrite Scarlett 2i4 without the sound card disappearing. Disconnecting the Audio Control or MIDI Streaming interfaces causes the sound card to disappear. After calling USBDEVFS_RESET, the sound cards come back up. Does anyone know why certain USB peripherals do not handle USBDEVFS_DISCONNECT cleanly on certain interfaces? Thanks, Robert

1 0

[PATCH v3] dt-bindings: soundwire: Convert text bindings to DT Schema
by Srinivasa Rao Mandadapu 20 Oct '22

20 Oct '22

Convert soundwire text bindings to DT Schema format. Update interrupt property items as per device tree, as it is not appropriately described in text file. Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam(a)quicinc.com> Co-developed-by: Ratna Deepthi Kudaravalli <quic_rkudarav(a)quicinc.com> Signed-off-by: Ratna Deepthi Kudaravalli <quic_rkudarav(a)quicinc.com> --- This patch depends on: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?… Changes since V2: -- Update commit message. -- Add child node property. -- Change file name. -- Remove minIteams for few properties. -- Remove redundant required properties. -- Remove redundant description for wakeup-source property. -- Update interrupt property items. Changes since V1: -- Remove the status field in example. -- Remove interrupt-names property in the required list. -- Add the wakeup-source property. .../devicetree/bindings/soundwire/qcom,sdw.txt | 214 --------------------- .../bindings/soundwire/qcom,soundwire.yaml | 184 ++++++++++++++++++ 2 files changed, 184 insertions(+), 214 deletions(-) delete mode 100644 Documentation/devicetree/bindings/soundwire/qcom,sdw.txt create mode 100644 Documentation/devicetree/bindings/soundwire/qcom,soundwire.yaml diff --git a/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt b/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt deleted file mode 100644 index c85c257..0000000 --- a/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt +++ /dev/null @@ -1,214 +0,0 @@ -Qualcomm SoundWire Controller Bindings - - -This binding describes the Qualcomm SoundWire Controller along with its -board specific bus parameters. - -- compatible: - Usage: required - Value type: <stringlist> - Definition: must be "qcom,soundwire-v<MAJOR>.<MINOR>.<STEP>", - Example: - "qcom,soundwire-v1.3.0" - "qcom,soundwire-v1.5.0" - "qcom,soundwire-v1.5.1" - "qcom,soundwire-v1.6.0" -- reg: - Usage: required - Value type: <prop-encoded-array> - Definition: the base address and size of SoundWire controller - address space. - -- interrupts: - Usage: required - Value type: <prop-encoded-array> - Definition: should specify the SoundWire Controller core and optional - wake IRQ - -- interrupt-names: - Usage: Optional - Value type: boolean - Value type: <stringlist> - Definition: should be "core" for core and "wakeup" for wake interrupt. - -- wakeup-source: - Usage: Optional - Value type: boolean - Definition: should specify if SoundWire Controller is wake up capable. - -- clock-names: - Usage: required - Value type: <stringlist> - Definition: should be "iface" for SoundWire Controller interface clock - -- clocks: - Usage: required - Value type: <prop-encoded-array> - Definition: should specify the SoundWire Controller interface clock - -- #sound-dai-cells: - Usage: required - Value type: <u32> - Definition: must be 1 for digital audio interfaces on the controller. - -- qcom,dout-ports: - Usage: required - Value type: <u32> - Definition: must be count of data out ports - -- qcom,din-ports: - Usage: required - Value type: <u32> - Definition: must be count of data in ports - -- qcom,ports-offset1: - Usage: required - Value type: <prop-encoded-array> - Definition: should specify payload transport window offset1 of each - data port. Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-offset2: - Usage: required - Value type: <prop-encoded-array> - Definition: should specify payload transport window offset2 of each - data port. Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-sinterval-low: - Usage: required - Value type: <prop-encoded-array> - Definition: should be sample interval low of each data port. - Out ports followed by In ports. Used for Sample Interval - calculation. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-word-length: - Usage: optional - Value type: <prop-encoded-array> - Definition: should be size of payload channel sample. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-block-pack-mode: - Usage: optional - Value type: <prop-encoded-array> - Definition: should be 0 or 1 to indicate the block packing mode. - 0 to indicate Blocks are per Channel - 1 to indicate Blocks are per Port. - Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-block-group-count: - Usage: optional - Value type: <prop-encoded-array> - Definition: should be in range 1 to 4 to indicate how many sample - intervals are combined into a payload. - Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-lane-control: - Usage: optional - Value type: <prop-encoded-array> - Definition: should be in range 0 to 7 to identify which data lane - the data port uses. - Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-hstart: - Usage: optional - Value type: <prop-encoded-array> - Definition: should be number identifying lowerst numbered coloum in - SoundWire Frame, i.e. left edge of the Transport sub-frame - for each port. Values between 0 and 15 are valid. - Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-hstop: - Usage: optional - Value type: <prop-encoded-array> - Definition: should be number identifying highest numbered coloum in - SoundWire Frame, i.e. the right edge of the Transport - sub-frame for each port. Values between 0 and 15 are valid. - Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,dports-type: - Usage: optional - Value type: <prop-encoded-array> - Definition: should be one of the following types - 0 for reduced port - 1 for simple ports - 2 for full port - Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- reset: - Usage: optional - Value type: <prop-encoded-array> - Definition: Should specify the SoundWire audio CSR reset controller interface, - which is required for SoundWire version 1.6.0 and above. - -- reset-names: - Usage: optional - Value type: <stringlist> - Definition: should be "swr_audio_cgcr" for SoundWire audio CSR reset - controller interface. - -Note: - More Information on detail of encoding of these fields can be -found in MIPI Alliance SoundWire 1.0 Specifications. - -= SoundWire devices -Each subnode of the bus represents SoundWire device attached to it. -The properties of these nodes are defined by the individual bindings. - -= EXAMPLE -The following example represents a SoundWire controller on DB845c board -which has controller integrated inside WCD934x codec on SDM845 SoC. - -soundwire: soundwire@c85 { - compatible = "qcom,soundwire-v1.3.0"; - reg = <0xc85 0x20>; - interrupts = <20 IRQ_TYPE_EDGE_RISING>; - clocks = <&wcc>; - clock-names = "iface"; - resets = <&lpass_audiocc LPASS_AUDIO_SWR_TX_CGCR>; - reset-names = "swr_audio_cgcr"; - #sound-dai-cells = <1>; - qcom,dports-type = <0>; - qcom,dout-ports = <6>; - qcom,din-ports = <2>; - qcom,ports-sinterval-low = /bits/ 8 <0x07 0x1F 0x3F 0x7 0x1F 0x3F 0x0F 0x0F>; - qcom,ports-offset1 = /bits/ 8 <0x01 0x02 0x0C 0x6 0x12 0x0D 0x07 0x0A >; - qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x1F 0x00 0x00 0x1F 0x00 0x00>; - - /* Left Speaker */ - left{ - .... - }; - - /* Right Speaker */ - right{ - .... - }; -}; diff --git a/Documentation/devicetree/bindings/soundwire/qcom,soundwire.yaml b/Documentation/devicetree/bindings/soundwire/qcom,soundwire.yaml new file mode 100644 index 0000000..12cd3c1 --- /dev/null +++ b/Documentation/devicetree/bindings/soundwire/qcom,soundwire.yaml @@ -0,0 +1,184 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soundwire/qcom,soundwire.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SoundWire Controller + +maintainers: + - Srinivas Kandagatla <srinivas.kandagatla(a)linaro.org> + - Srinivasa Rao Mandadapu <quic_srivasam(a)quicinc.com> + +description: + The Qualcomm SoundWire controller along with its board specific bus parameters. + +properties: + compatible: + enum: + - qcom,soundwire-v1.3.0 + - qcom,soundwire-v1.5.0 + - qcom,soundwire-v1.5.1 + - qcom,soundwire-v1.6.0 + + reg: + maxItems: 1 + + interrupts: + items: + - description: specify the SoundWire controller core. + - description: specify the Soundwire controller wake IRQ. + + interrupt-names: + items: + - const: wakeup + - const: core + + clocks: + items: + - description: iface clock + + clock-names: + items: + - const: iface + + resets: + items: + - description: SWR_AUDIO_CGCR RESET + + reset-names: + items: + - const: swr_audio_cgcr + + '#sound-dai-cells': + const: 1 + + '#address-cells': + const: 2 + + '#size-cells': + const: 0 + + wakeup-source: true + + qcom,din-ports: + $ref: /schemas/types.yaml#/definitions/uint32 + description: count of data in ports + + qcom,dout-ports: + $ref: /schemas/types.yaml#/definitions/uint32 + description: count of data out ports + + qcom,ports-word-length: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: size of payload channel sample. + maxItems: 5 + + qcom,ports-sinterval-low: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: sample interval low of each data port. + maxItems: 5 + + qcom,ports-offset1: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: payload transport window offset1 of each data port. + maxItems: 5 + + qcom,ports-offset2: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: payload transport window offset2 of each data port. + maxItems: 5 + + qcom,ports-lane-control: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: identify which data lane the data port uses. + maxItems: 5 + + qcom,ports-block-pack-mode: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: indicate the block packing mode. + maxItems: 5 + + qcom,ports-hstart: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: identifying lowerst numbered coloum in SoundWire frame. + maxItems: 5 + + qcom,ports-hstop: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: identifying highest numbered coloum in SoundWire frame. + maxItems: 5 + + qcom,ports-block-group-count: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: indicate how many sample intervals are combined into a payload. + maxItems: 5 + + codec@4: + $ref: ../sound/qcom,wcd938x-sdw.yaml# + description: + Qualcomm WCD9380/WCD9385 Codec is a standalone Hi-Fi audio codec IC. + It has RX and TX Soundwire slave devices. This bindings is for the + slave devices. + type: object + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - '#sound-dai-cells' + - '#address-cells' + - '#size-cells' + - qcom,dout-ports + - qcom,din-ports + - qcom,ports-sinterval-low + - qcom,ports-offset1 + - qcom,ports-offset2 + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h> + + soundwire@3210000 { + compatible = "qcom,soundwire-v1.6.0"; + reg = <0x03210000 0x2000>; + + interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 130 IRQ_TYPE_LEVEL_HIGH>; + + clocks = <&lpass_rx_macro>; + clock-names = "iface"; + + qcom,din-ports = <0>; + qcom,dout-ports = <5>; + + resets = <&lpass_audiocc LPASS_AUDIO_SWR_RX_CGCR>; + reset-names = "swr_audio_cgcr"; + + qcom,ports-word-length = /bits/ 8 <0x01 0x07 0x04 0xff 0xff>; + qcom,ports-sinterval-low = /bits/ 8 <0x03 0x3f 0x1f 0x03 0x03>; + qcom,ports-offset1 = /bits/ 8 <0x00 0x00 0x0b 0x01 0x01>; + qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x0b 0x00 0x00>; + qcom,ports-lane-control = /bits/ 8 <0x01 0x00 0x00 0x00 0x00>; + qcom,ports-block-pack-mode = /bits/ 8 <0xff 0x00 0x01 0xff 0xff>; + qcom,ports-hstart = /bits/ 8 <0xff 0x03 0xff 0xff 0xff>; + qcom,ports-hstop = /bits/ 8 <0xff 0x06 0xff 0xff 0xff>; + qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0x00>; + + #sound-dai-cells = <1>; + #address-cells = <2>; + #size-cells = <0>; + + codec@4 { + compatible = "sdw20217010d00"; + reg = <0 4>; + qcom,rx-port-mapping = <1 2 3 4 5>; + }; + + }; -- 2.7.4

3 2

add --wildcards to tar options in README
by GitHub pull_request - opened 20 Oct '22

20 Oct '22

alsa-project/alsa-ucm-conf pull request #232 was opened from nodens: Without it, at least on some recent tar version, it won't work: --wildcards is the default only for exclusions, not for member selection. This tends to confuse users, even though it's just an example (e.g #220) Request URL : https://github.com/alsa-project/alsa-ucm-conf/pull/232 Patch URL : https://github.com/alsa-project/alsa-ucm-conf/pull/232.patch Repository URL: https://github.com/alsa-project/alsa-ucm-conf

1 0

[PATCH 0/8] ASoC: Intel: avs: PCM power management
by Cezary Rojewski 20 Oct '22

20 Oct '22

Goal of the series is implementation of suspend/resume operations for a PCM stream along with all the collaterals connected to the subject. Start with splitting avs_dai_fe_hw_free() as ideally we would like to reuse as much of existing code as possible but snd_pcm_lib_free_pages() is not desired part of the function when speaking of suspend operation. The actual implementation of suspend/resume() for component drivers follows. For most scenarios, the PM flow is similar to standard streaming one, except for the part where the position register are being saved and the lack of PCM pages freeing. To reduce code duplication, all avs_dai_suspend_XXX() and avs_dai_resume_XXX() functions reuse their non-PM equivalents. Order of operations is affected by the fact that path binding/unbinding happens only in FE part of the stream. Above essentially unlocks SX+streaming scenarios i.e.: power transitions with an ongoing stream. As some streams are allowed to run in low power state, support is provided for S0iX state. The handlers check ACPI capabilities and the number of active low-power paths before deciding between SX and S0iX flows. The last portion of the patchset is addition of power/clock gating overrides. There is no single set of registers that ensures AudioDSP firmware loads 100% of time on every single configuration. By having them exposed, user can have the loading procedure behavior adjusted for their configuration without having to recompile the kernel. Amadeusz Sławiński (1): ASoC: Intel: avs: Handle SUSPEND and RESUME triggers Cezary Rojewski (6): ASoC: Intel: avs: Split pcm pages freeing operation from hw_free() ASoC: Intel: avs: Introduce PCM power management routines ASoC: Intel: avs: Restart instead of resuming HDA capture streams ASoC: Intel: avs: Count low power streams ASoC: Intel: avs: Power and clock gating policy overriding ASoC: Intel: avs: Enact power gating policy Piotr Maziarz (1): ASoC: Intel: avs: Standby power-state support include/sound/hdaudio_ext.h | 5 + sound/soc/intel/avs/avs.h | 1 + sound/soc/intel/avs/core.c | 97 +++++++-- sound/soc/intel/avs/loader.c | 10 + sound/soc/intel/avs/pcm.c | 387 +++++++++++++++++++++++++++++++---- 5 files changed, 440 insertions(+), 60 deletions(-) -- 2.25.1

3 12

[PATCH v3 0/7] ASoC: codecs: jz4725b: Various improvements and fixes
by Siarhei Volkau 20 Oct '22

20 Oct '22

The patchset fixes: - Line In path stays powered off during capturing or bypass to mixer. - incorrectly represented dB values in alsamixer, et al. - incorrect represented Capture input selector in alsamixer in Playback tab. - wrong control selected as Capture Master The patchset improves: - Exposes output stage (post mixer) gain control and makes it new Master playback gain, DAC gain was the previous master. However, no Master mute now. - Exposes all mixer inputs (both Mics, LineIn and DAC) with their gain controls. - Exposes microphones widgets: single/differential input, boost. Known issues: - Bypass path enablement isn't applied immediately, for make things going bit clock needs to be triggered for a bit, e.g. by aplay dummy.wav It might be a hardware bug, since the bit clock isn't declared as required for codec operation. Tested on: - Ritmix RZX-27 (jz4725b). - Ritmix RZX-50 (jz4755). Diff from v2: - add microphone widgets Diff from v1: - each change in a separate patch Tested-by: Siarhei Volkau <lis8215(a)gmail.com> Signed-off-by: Siarhei Volkau <lis8215(a)gmail.com> Siarhei Volkau (7): ASoC: codecs: jz4725b: add missed Line In power control bit ASoC: codecs: jz4725b: fix reported volume for Master ctl ASoC: codecs: jz4725b: use right control for Capture Volume ASoC: codecs: jz4725b: fix capture selector naming ASoC: codecs: jz4725b: use right control for Master Playback ASoC: codecs: jz4725b: add missed Mixer inputs ASoC: codecs: jz4725b: add missed microphone widgets sound/soc/codecs/jz4725b.c | 109 +++++++++++++++++++++++++++++++------ 1 file changed, 92 insertions(+), 17 deletions(-) -- 2.36.1

3 12

[PATCH] ALSA: ac97: fix possible memory leak in snd_ac97_dev_register()
by Yang Yingliang 20 Oct '22

20 Oct '22

If device_register() fails in snd_ac97_dev_register(), it should call put_device() to give up reference, or the name allocated in dev_set_name() is leaked. Fixes: 0ca06a00e206 ("[ALSA] AC97 bus interface for ad-hoc drivers") Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- sound/pci/ac97/ac97_codec.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/pci/ac97/ac97_codec.c b/sound/pci/ac97/ac97_codec.c index cb60a07d39a8..ceead55f13ab 100644 --- a/sound/pci/ac97/ac97_codec.c +++ b/sound/pci/ac97/ac97_codec.c @@ -2009,6 +2009,7 @@ static int snd_ac97_dev_register(struct snd_device *device) err = device_register(&ac97->dev); if (err < 0) { ac97_err(ac97, "Can't register ac97 bus\n"); + put_device(&ac97->dev); ac97->dev.bus = NULL; return err; } -- 2.25.1

2 1

[PATCH] ASoC: Intel: Skylake: fix possible memory leak in skl_codec_device_init()
by Yang Yingliang 20 Oct '22

20 Oct '22

If snd_hdac_device_register() fails, 'codec' is leaked, free it in snd_hdac_device_exit(). And device_initialize() is called in snd_hdac_device_init(), it should call put_device() to give up reference or the name allocated in dev_set_name() is leaked. The snd_hdac_device_exit() will be called in dev->release(). Fixes: e4746d94d00c ("ASoC: Intel: Skylake: Introduce HDA codec init and exit routines") Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- sound/soc/intel/skylake/skl.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/sound/soc/intel/skylake/skl.c b/sound/soc/intel/skylake/skl.c index bbba2df33aaf..f0048e3fa619 100644 --- a/sound/soc/intel/skylake/skl.c +++ b/sound/soc/intel/skylake/skl.c @@ -691,7 +691,11 @@ static void load_codec_module(struct hda_codec *codec) static void skl_codec_device_exit(struct device *dev) { - snd_hdac_device_exit(dev_to_hdac_dev(dev)); + struct hdac_device *hdac_dev = dev_to_hdac_dev(dev); + struct hda_codec *codec = container_of(hdac_dev, struct hda_codec, core); + + snd_hdac_device_exit(hdac_dev); + kfree(codec); } static struct hda_codec *skl_codec_device_init(struct hdac_bus *bus, int addr) @@ -711,7 +715,7 @@ static struct hda_codec *skl_codec_device_init(struct hdac_bus *bus, int addr) ret = snd_hdac_device_register(&codec->core); if (ret) { dev_err(bus->dev, "failed to register hdac device\n"); - snd_hdac_device_exit(&codec->core); + put_device(&codec->core.dev); return ERR_PTR(ret); } -- 2.25.1

2 2

[PATCH v2] dt-bindings: soundwire: Convert text file to yaml format
by Srinivasa Rao Mandadapu 20 Oct '22

20 Oct '22

Update soundwire bindings with yaml formats. Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam(a)quicinc.com> Co-developed-by: Ratna Deepthi Kudaravalli <quic_rkudarav(a)quicinc.com> Signed-off-by: Ratna Deepthi Kudaravalli <quic_rkudarav(a)quicinc.com> --- This patch depends on: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?… Changes since V1: -- Remove the status field in example. -- Remove interrupt-names property in the required list. -- Add the wakeup-source property. .../devicetree/bindings/soundwire/qcom,sdw.txt | 214 --------------------- .../devicetree/bindings/soundwire/qcom,sdw.yaml | 186 ++++++++++++++++++ 2 files changed, 186 insertions(+), 214 deletions(-) delete mode 100644 Documentation/devicetree/bindings/soundwire/qcom,sdw.txt create mode 100644 Documentation/devicetree/bindings/soundwire/qcom,sdw.yaml diff --git a/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt b/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt deleted file mode 100644 index c85c257..0000000 --- a/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt +++ /dev/null @@ -1,214 +0,0 @@ -Qualcomm SoundWire Controller Bindings - - -This binding describes the Qualcomm SoundWire Controller along with its -board specific bus parameters. - -- compatible: - Usage: required - Value type: <stringlist> - Definition: must be "qcom,soundwire-v<MAJOR>.<MINOR>.<STEP>", - Example: - "qcom,soundwire-v1.3.0" - "qcom,soundwire-v1.5.0" - "qcom,soundwire-v1.5.1" - "qcom,soundwire-v1.6.0" -- reg: - Usage: required - Value type: <prop-encoded-array> - Definition: the base address and size of SoundWire controller - address space. - -- interrupts: - Usage: required - Value type: <prop-encoded-array> - Definition: should specify the SoundWire Controller core and optional - wake IRQ - -- interrupt-names: - Usage: Optional - Value type: boolean - Value type: <stringlist> - Definition: should be "core" for core and "wakeup" for wake interrupt. - -- wakeup-source: - Usage: Optional - Value type: boolean - Definition: should specify if SoundWire Controller is wake up capable. - -- clock-names: - Usage: required - Value type: <stringlist> - Definition: should be "iface" for SoundWire Controller interface clock - -- clocks: - Usage: required - Value type: <prop-encoded-array> - Definition: should specify the SoundWire Controller interface clock - -- #sound-dai-cells: - Usage: required - Value type: <u32> - Definition: must be 1 for digital audio interfaces on the controller. - -- qcom,dout-ports: - Usage: required - Value type: <u32> - Definition: must be count of data out ports - -- qcom,din-ports: - Usage: required - Value type: <u32> - Definition: must be count of data in ports - -- qcom,ports-offset1: - Usage: required - Value type: <prop-encoded-array> - Definition: should specify payload transport window offset1 of each - data port. Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-offset2: - Usage: required - Value type: <prop-encoded-array> - Definition: should specify payload transport window offset2 of each - data port. Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-sinterval-low: - Usage: required - Value type: <prop-encoded-array> - Definition: should be sample interval low of each data port. - Out ports followed by In ports. Used for Sample Interval - calculation. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-word-length: - Usage: optional - Value type: <prop-encoded-array> - Definition: should be size of payload channel sample. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-block-pack-mode: - Usage: optional - Value type: <prop-encoded-array> - Definition: should be 0 or 1 to indicate the block packing mode. - 0 to indicate Blocks are per Channel - 1 to indicate Blocks are per Port. - Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-block-group-count: - Usage: optional - Value type: <prop-encoded-array> - Definition: should be in range 1 to 4 to indicate how many sample - intervals are combined into a payload. - Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-lane-control: - Usage: optional - Value type: <prop-encoded-array> - Definition: should be in range 0 to 7 to identify which data lane - the data port uses. - Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-hstart: - Usage: optional - Value type: <prop-encoded-array> - Definition: should be number identifying lowerst numbered coloum in - SoundWire Frame, i.e. left edge of the Transport sub-frame - for each port. Values between 0 and 15 are valid. - Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-hstop: - Usage: optional - Value type: <prop-encoded-array> - Definition: should be number identifying highest numbered coloum in - SoundWire Frame, i.e. the right edge of the Transport - sub-frame for each port. Values between 0 and 15 are valid. - Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,dports-type: - Usage: optional - Value type: <prop-encoded-array> - Definition: should be one of the following types - 0 for reduced port - 1 for simple ports - 2 for full port - Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- reset: - Usage: optional - Value type: <prop-encoded-array> - Definition: Should specify the SoundWire audio CSR reset controller interface, - which is required for SoundWire version 1.6.0 and above. - -- reset-names: - Usage: optional - Value type: <stringlist> - Definition: should be "swr_audio_cgcr" for SoundWire audio CSR reset - controller interface. - -Note: - More Information on detail of encoding of these fields can be -found in MIPI Alliance SoundWire 1.0 Specifications. - -= SoundWire devices -Each subnode of the bus represents SoundWire device attached to it. -The properties of these nodes are defined by the individual bindings. - -= EXAMPLE -The following example represents a SoundWire controller on DB845c board -which has controller integrated inside WCD934x codec on SDM845 SoC. - -soundwire: soundwire@c85 { - compatible = "qcom,soundwire-v1.3.0"; - reg = <0xc85 0x20>; - interrupts = <20 IRQ_TYPE_EDGE_RISING>; - clocks = <&wcc>; - clock-names = "iface"; - resets = <&lpass_audiocc LPASS_AUDIO_SWR_TX_CGCR>; - reset-names = "swr_audio_cgcr"; - #sound-dai-cells = <1>; - qcom,dports-type = <0>; - qcom,dout-ports = <6>; - qcom,din-ports = <2>; - qcom,ports-sinterval-low = /bits/ 8 <0x07 0x1F 0x3F 0x7 0x1F 0x3F 0x0F 0x0F>; - qcom,ports-offset1 = /bits/ 8 <0x01 0x02 0x0C 0x6 0x12 0x0D 0x07 0x0A >; - qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x1F 0x00 0x00 0x1F 0x00 0x00>; - - /* Left Speaker */ - left{ - .... - }; - - /* Right Speaker */ - right{ - .... - }; -}; diff --git a/Documentation/devicetree/bindings/soundwire/qcom,sdw.yaml b/Documentation/devicetree/bindings/soundwire/qcom,sdw.yaml new file mode 100644 index 0000000..65bff91 --- /dev/null +++ b/Documentation/devicetree/bindings/soundwire/qcom,sdw.yaml @@ -0,0 +1,186 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soundwire/qcom,sdw.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SoundWire Controller + +maintainers: + - Srinivas Kandagatla <srinivas.kandagatla(a)linaro.org> + - Srinivasa Rao Mandadapu <quic_srivasam(a)quicinc.com> + +description: + This binding describes the Qualcomm SoundWire controller along with its + board specific bus parameters. + +properties: + compatible: + enum: + - qcom,soundwire-v1.3.0 + - qcom,soundwire-v1.5.0 + - qcom,soundwire-v1.5.1 + - qcom,soundwire-v1.6.0 + + reg: + items: + - description: the base address and size of SoundWire controller + address space. + + interrupts: + items: + - description: specify the SoundWire controller core and optional + wake IRQ. + + interrupt-names: + items: + - const: wakeup + + clocks: + items: + - description: iface clock + + clock-names: + items: + - const: iface + + resets: + items: + - description: SWR_AUDIO_CGCR RESET + + reset-names: + items: + - const: swr_audio_cgcr + + '#sound-dai-cells': + const: 1 + + '#address-cells': + const: 2 + + '#size-cells': + const: 0 + + wakeup-source: + description: specify the Soundwire Controller is wakeup Capable. + type: boolean + + qcom,din-ports: + $ref: /schemas/types.yaml#/definitions/uint32 + description: count of data in ports + + qcom,dout-ports: + $ref: /schemas/types.yaml#/definitions/uint32 + description: count of data out ports + + qcom,ports-word-length: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: size of payload channel sample. + minItems: 5 + maxItems: 5 + + qcom,ports-sinterval-low: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: sample interval low of each data port. + minItems: 5 + maxItems: 5 + + qcom,ports-offset1: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: payload transport window offset1 of each data port. + minItems: 5 + maxItems: 5 + + qcom,ports-offset2: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: payload transport window offset2 of each data port. + minItems: 5 + maxItems: 5 + + qcom,ports-lane-control: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: identify which data lane the data port uses. + minItems: 5 + maxItems: 5 + + qcom,ports-block-pack-mode: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: indicate the block packing mode. + minItems: 5 + maxItems: 5 + + qcom,ports-hstart: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: identifying lowerst numbered coloum in SoundWire frame. + minItems: 5 + maxItems: 5 + + qcom,ports-hstop: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: identifying highest numbered coloum in SoundWire frame. + minItems: 5 + maxItems: 5 + + qcom,ports-block-group-count: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: indicate how many sample intervals are combined into a payload. + minItems: 5 + maxItems: 5 + +required: + - reg + - interrupts + - clocks + - clock-names + - resets + - reset-names + - '#sound-dai-cells' + - '#address-cells' + - '#size-cells' + - qcom,dout-ports + - qcom,din-ports + - qcom,ports-word-length + - qcom,ports-sinterval-low + - qcom,ports-offset1 + - qcom,ports-offset2 + - qcom,ports-lane-control + - qcom,ports-block-pack-mode + - qcom,ports-hstart + - qcom,ports-block-group-count + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h> + + soundwire@3210000 { + compatible = "qcom,soundwire-v1.6.0"; + reg = <0x03210000 0x2000>; + + interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&lpass_rx_macro>; + clock-names = "iface"; + + qcom,din-ports = <0>; + qcom,dout-ports = <5>; + + resets = <&lpass_audiocc LPASS_AUDIO_SWR_RX_CGCR>; + reset-names = "swr_audio_cgcr"; + + qcom,ports-word-length = /bits/ 8 <0x01 0x07 0x04 0xff 0xff>; + qcom,ports-sinterval-low = /bits/ 8 <0x03 0x3f 0x1f 0x03 0x03>; + qcom,ports-offset1 = /bits/ 8 <0x00 0x00 0x0b 0x01 0x01>; + qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x0b 0x00 0x00>; + qcom,ports-lane-control = /bits/ 8 <0x01 0x00 0x00 0x00 0x00>; + qcom,ports-block-pack-mode = /bits/ 8 <0xff 0x00 0x01 0xff 0xff>; + qcom,ports-hstart = /bits/ 8 <0xff 0x03 0xff 0xff 0xff>; + qcom,ports-hstop = /bits/ 8 <0xff 0x06 0xff 0xff 0xff>; + qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0x00>; + + #sound-dai-cells = <1>; + #address-cells = <2>; + #size-cells = <0>; + }; -- 2.7.4

3 4

Name prefix
by Ki-Seok Jo 20 Oct '22

20 Oct '22

Dear all, I've difficulty using the name prefix in component, so I want to ask for help. The purpose of using the 'name_prefix' is to put i2c driver name before kcontrol's name. As you all know, the name of the registered kcontrol is defined const, so I couldn't modify direct. So I've thought of some ways, but I don't know which one is good. First, as mentioned above, the name value was take from the struct of driver(snd_soc_component_driver) and the value was added to the name_prefix among the members of the snd_soc_component. Then, the error occurred on the dapm widgets and route. ASoC: no source widget found for CLK_SUPPLY ASoC: Failed to add route CLK_SUPPLY -> direct -> DAC I've registered the 'CLK_SUPPLY' on snd_soc_dapm_widget using macro(SND_SOC_DAPM_SUPPLY). However, with the addition of the name_prefix, the registered widget could not be found. Is thee a way to change the name of kcontrol or dapm widget? or the way use the name_prefix, or an example code? Thanks.

1 0

[PATCH v2] ASoC: SOF: Intel: pci-tgl: fix ADL-N descriptor
by Pierre-Louis Bossart 19 Oct '22

19 Oct '22

ADL-N uses a different signing key, which means we can't reuse the regular ADL descriptor used for ADL-P/M/S. Fixes: cd57eb3c403cb ("ASoC: SOF: Intel: pci-tgl: add ADL-N support") Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan(a)linux.intel.com> Reviewed-by: Chao Song <chao.song(a)intel.com> Reviewed-by: Bard Liao <yung-chuan.liao(a)linux.intel.com> --- v2: removed dependency on the series "ASoC: SOF: Intel/IPC4: Support for external firmware libraries". This patch needs to go in first since it's a fix sound/soc/sof/intel/pci-tgl.c | 30 +++++++++++++++++++++++++++++- 1 file changed, 29 insertions(+), 1 deletion(-) diff --git a/sound/soc/sof/intel/pci-tgl.c b/sound/soc/sof/intel/pci-tgl.c index 2d63cc236a68e..4cfe4f242fc5e 100644 --- a/sound/soc/sof/intel/pci-tgl.c +++ b/sound/soc/sof/intel/pci-tgl.c @@ -159,6 +159,34 @@ static const struct sof_dev_desc adl_desc = { .ops_init = sof_tgl_ops_init, }; +static const struct sof_dev_desc adl_n_desc = { + .machines = snd_soc_acpi_intel_adl_machines, + .alt_machines = snd_soc_acpi_intel_adl_sdw_machines, + .use_acpi_target_states = true, + .resindex_lpe_base = 0, + .resindex_pcicfg_base = -1, + .resindex_imr_base = -1, + .irqindex_host_ipc = -1, + .chip_info = &tgl_chip_info, + .ipc_supported_mask = BIT(SOF_IPC) | BIT(SOF_INTEL_IPC4), + .ipc_default = SOF_IPC, + .default_fw_path = { + [SOF_IPC] = "intel/sof", + [SOF_INTEL_IPC4] = "intel/avs/adl-n", + }, + .default_tplg_path = { + [SOF_IPC] = "intel/sof-tplg", + [SOF_INTEL_IPC4] = "intel/avs-tplg", + }, + .default_fw_filename = { + [SOF_IPC] = "sof-adl-n.ri", + [SOF_INTEL_IPC4] = "dsp_basefw.bin", + }, + .nocodec_tplg_filename = "sof-adl-nocodec.tplg", + .ops = &sof_tgl_ops, + .ops_init = sof_tgl_ops_init, +}; + static const struct sof_dev_desc rpls_desc = { .machines = snd_soc_acpi_intel_rpl_machines, .alt_machines = snd_soc_acpi_intel_rpl_sdw_machines, @@ -246,7 +274,7 @@ static const struct pci_device_id sof_pci_ids[] = { { PCI_DEVICE(0x8086, 0x51cf), /* RPL-PX */ .driver_data = (unsigned long)&rpl_desc}, { PCI_DEVICE(0x8086, 0x54c8), /* ADL-N */ - .driver_data = (unsigned long)&adl_desc}, + .driver_data = (unsigned long)&adl_n_desc}, { 0, } }; MODULE_DEVICE_TABLE(pci, sof_pci_ids); -- 2.34.1

2 1

[PATCH] ASoC: SOF: Intel: pci-tgl: fix ADL-N descriptor
by Pierre-Louis Bossart 19 Oct '22

19 Oct '22

ADL-N uses a different signing key, which means we can't reuse the regular ADL descriptor used for ADL-P/M/S. Fixes: cd57eb3c403cb ("ASoC: SOF: Intel: pci-tgl: add ADL-N support") Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan(a)linux.intel.com> Reviewed-by: Chao Song <chao.song(a)intel.com> Reviewed-by: Bard Liao <yung-chuan.liao(a)linux.intel.com> --- sound/soc/sof/intel/pci-tgl.c | 33 ++++++++++++++++++++++++++++++++- 1 file changed, 32 insertions(+), 1 deletion(-) diff --git a/sound/soc/sof/intel/pci-tgl.c b/sound/soc/sof/intel/pci-tgl.c index 2d63cc236a68e..757a7c6bb770c 100644 --- a/sound/soc/sof/intel/pci-tgl.c +++ b/sound/soc/sof/intel/pci-tgl.c @@ -159,6 +159,37 @@ static const struct sof_dev_desc adl_desc = { .ops_init = sof_tgl_ops_init, }; +static const struct sof_dev_desc adl_n_desc = { + .machines = snd_soc_acpi_intel_adl_machines, + .alt_machines = snd_soc_acpi_intel_adl_sdw_machines, + .use_acpi_target_states = true, + .resindex_lpe_base = 0, + .resindex_pcicfg_base = -1, + .resindex_imr_base = -1, + .irqindex_host_ipc = -1, + .chip_info = &tgl_chip_info, + .ipc_supported_mask = BIT(SOF_IPC) | BIT(SOF_INTEL_IPC4), + .ipc_default = SOF_IPC, + .default_fw_path = { + [SOF_IPC] = "intel/sof", + [SOF_INTEL_IPC4] = "intel/avs/adl-n", + }, + .default_lib_path = { + [SOF_INTEL_IPC4] = "intel/avs-lib/adl-n", + }, + .default_tplg_path = { + [SOF_IPC] = "intel/sof-tplg", + [SOF_INTEL_IPC4] = "intel/avs-tplg", + }, + .default_fw_filename = { + [SOF_IPC] = "sof-adl-n.ri", + [SOF_INTEL_IPC4] = "dsp_basefw.bin", + }, + .nocodec_tplg_filename = "sof-adl-nocodec.tplg", + .ops = &sof_tgl_ops, + .ops_init = sof_tgl_ops_init, +}; + static const struct sof_dev_desc rpls_desc = { .machines = snd_soc_acpi_intel_rpl_machines, .alt_machines = snd_soc_acpi_intel_rpl_sdw_machines, @@ -246,7 +277,7 @@ static const struct pci_device_id sof_pci_ids[] = { { PCI_DEVICE(0x8086, 0x51cf), /* RPL-PX */ .driver_data = (unsigned long)&rpl_desc}, { PCI_DEVICE(0x8086, 0x54c8), /* ADL-N */ - .driver_data = (unsigned long)&adl_desc}, + .driver_data = (unsigned long)&adl_n_desc}, { 0, } }; MODULE_DEVICE_TABLE(pci, sof_pci_ids); -- 2.34.1

2 3

[PATCH -next] ASoC: amd: yc: Adding Lenovo ThinkBook 14 Gen 4+ ARA and Lenovo ThinkBook 16 Gen 4+ ARA to the Quirks List
by linkt 19 Oct '22

19 Oct '22

Lenovo ThinkBook 14 Gen 4+ ARA and ThinkBook 16 Gen 4+ ARA need to be added to the list of quirks for the microphone to work properly. Signed-off-by: linkt <xazrael(a)hotmail.com> --- sound/soc/amd/yc/acp6x-mach.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/sound/soc/amd/yc/acp6x-mach.c b/sound/soc/amd/yc/acp6x-mach.c index 2cb50d5cf1a9..09a8aceff22f 100644 --- a/sound/soc/amd/yc/acp6x-mach.c +++ b/sound/soc/amd/yc/acp6x-mach.c @@ -45,6 +45,20 @@ static struct snd_soc_card acp6x_card = { }; static const struct dmi_system_id yc_acp_quirk_table[] = { + { + .driver_data = &acp6x_card, + .matches = { + DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"), + DMI_MATCH(DMI_PRODUCT_NAME, "21D0"), + } + }, + { + .driver_data = &acp6x_card, + .matches = { + DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"), + DMI_MATCH(DMI_PRODUCT_NAME, "21D1"), + } + }, { .driver_data = &acp6x_card, .matches = { -- 2.37.3

3 2

[RESEND] Asoc: qcom: lpass-cpu: Mark HDMI TX parity register as volatile
by Srinivasa Rao Mandadapu 19 Oct '22

19 Oct '22

Update LPASS_HDMI_TX_PARITY_ADDR register as volatile, to fix dp audio failures observed with some of external monitors. Fixes: 7cb37b7bd0d3 ("ASoC: qcom: Add support for lpass hdmi driver") Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam(a)quicinc.com> --- -- Resending this patch as it was posted long back and forgot to track. sound/soc/qcom/lpass-cpu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sound/soc/qcom/lpass-cpu.c b/sound/soc/qcom/lpass-cpu.c index 99a3b44..5435384 100644 --- a/sound/soc/qcom/lpass-cpu.c +++ b/sound/soc/qcom/lpass-cpu.c @@ -784,6 +784,8 @@ static bool lpass_hdmi_regmap_volatile(struct device *dev, unsigned int reg) return true; if (reg == LPASS_HDMI_TX_VBIT_CTL_ADDR(v)) return true; + if (reg == LPASS_HDMI_TX_PARITY_ADDR(v)) + return true; for (i = 0; i < v->hdmi_rdma_channels; ++i) { if (reg == LPAIF_HDMI_RDMACURR_REG(v, i)) -- 2.7.4

3 2

[PATCH 00/30] ARM: pxa: remove all unused boards&drivers
by Arnd Bergmann 19 Oct '22

19 Oct '22

From: Arnd Bergmann <arnd(a)arndb.de> Most of the legacy PXA board files were marked as unused in linux-5.19 and can get removed in linux-6.2. There is support for pxa250/pxa270/pxa300 using devicetree already, which supports a number of boards, but progress on converting the remaining ones has stalled over the past few years. The two boards that are left in the tree for now are the three 'sharpsl' variants (spitz/akita/borzoi) and the 'gumstix' family of machines. Both of these are supported by qemu, which can be helpful for completing the DT conversion. Only PXA25x and PXA27x are left with full boardfile support, so PXA300 can get a lot simpler while still working with DT, and PXA310/320/93x can be removed entirely. A good number of drivers become impossible to select after this, so each of these also get dropped. I'm including the driver patches in the series here and can either merge them through the soc tree, or they can get picked up by the individual subsystem maintainers. Since both the platform and the drivers get removed, the order should not matter. Note that the patches here are generated with 'git format-patch -D' and don't contain the contents of removed files because of the significant size (the first patch is close to a megabyte). Arnd Bergmann (30): ARM: pxa: remove unused board files ARM: pxa: remove irda leftover ARM: pxa: remove unused pxa3xx-ulpi ARM: pxa: drop pxa310/pxa320/pxa93x support ARM: pxa: prune unused device support power: remove z2_battery driver power: remove tosa_battery driver ata: remove palmld pata driver backlight: remove pxa tosa support input: remove pxa930_trkball driver input: remove pxa930_rotary keyboard driver input: remove zylonite touchscreen driver pcmcia: remove unused pxa/sa1100 drivers ASoC: pxa: remove unused board support ALSA: remove ac97 bus support mfd: remove wm97xx driver input: remove wm97xx support parport: remove ax88796 driver power: remove pda_power supply driver rtc: remove v3020 driver mfd: remove toshiba tmio drivers mfd: remove ucb1400 support mtd: remove tmio_nand driver mmc: remove tmio_mmc driver fbdev: remove tmiofb driver fbdev: remove w100fb driver leds: remove asic3 driver usb: remove ohci-tmio driver w1: remove ds1wm driver mfd: remove htc-pasic3 driver Cc: Alan Stern <stern(a)rowland.harvard.edu> Cc: Alexandre Belloni <alexandre.belloni(a)bootlin.com> Cc: Bartosz Golaszewski <brgl(a)bgdev.pl> Cc: Damien Le Moal <damien.lemoal(a)opensource.wdc.com> Cc: Daniel Mack <daniel(a)zonque.org> Cc: Dmitry Torokhov <dmitry.torokhov(a)gmail.com> Cc: Dominik Brodowski <linux(a)dominikbrodowski.net> Cc: Felipe Balbi <balbi(a)kernel.org> Cc: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> Cc: Haojian Zhuang <haojian.zhuang(a)gmail.com> Cc: Helge Deller <deller(a)gmx.de> Cc: Jaroslav Kysela <perex(a)perex.cz> Cc: Jingoo Han <jingoohan1(a)gmail.com> Cc: Lee Jones <lee(a)kernel.org> Cc: Lennert Buytenhek <kernel(a)wantstofly.org> Cc: Liam Girdwood <lgirdwood(a)gmail.com> Cc: Linus Walleij <linus.walleij(a)linaro.org> Cc: Marek Vasut <marek.vasut(a)gmail.com> Cc: Mark Brown <broonie(a)kernel.org> Cc: Michael Petchkovsky <mkpetch(a)internode.on.net> Cc: Miquel Raynal <miquel.raynal(a)bootlin.com> Cc: Paul Parsons <lost.distance(a)yahoo.com> Cc: Philipp Zabel <philipp.zabel(a)gmail.com> Cc: Robert Jarzmik <robert.jarzmik(a)free.fr> Cc: Russell King <linux(a)armlinux.org.uk> Cc: Sebastian Reichel <sre(a)kernel.org> Cc: Sergey Lapin <slapin(a)ossfans.org> Cc: Sergey Shtylyov <s.shtylyov(a)omp.ru> Cc: Sudip Mukherjee <sudipm.mukherjee(a)gmail.com> Cc: Takashi Iwai <tiwai(a)suse.com> Cc: Ulf Hansson <ulf.hansson(a)linaro.org> Cc: Vignesh Raghavendra <vigneshr(a)ti.com> Cc: Viresh Kumar <viresh.kumar(a)linaro.org> Cc: Wolfram Sang <wsa+renesas(a)sang-engineering.com> Cc: linux-pm(a)vger.kernel.org Cc: linux-kernel(a)vger.kernel.org Cc: linux-arm-kernel(a)lists.infradead.org Cc: linux-ide(a)vger.kernel.org Cc: linux-gpio(a)vger.kernel.org Cc: linux-input(a)vger.kernel.org Cc: patches(a)opensource.cirrus.com Cc: linux-leds(a)vger.kernel.org Cc: linux-mmc(a)vger.kernel.org Cc: linux-renesas-soc(a)vger.kernel.org Cc: linux-mtd(a)lists.infradead.org Cc: linux-rtc(a)vger.kernel.org Cc: linux-usb(a)vger.kernel.org Cc: dri-devel(a)lists.freedesktop.org Cc: linux-fbdev(a)vger.kernel.org Cc: alsa-devel(a)alsa-project.org Documentation/power/power_supply_class.rst | 4 +- MAINTAINERS | 100 +- arch/arm/Kconfig | 1 - arch/arm/configs/cm_x300_defconfig | 163 -- arch/arm/configs/colibri_pxa270_defconfig | 157 -- arch/arm/configs/colibri_pxa300_defconfig | 60 - arch/arm/configs/corgi_defconfig | 247 --- arch/arm/configs/eseries_pxa_defconfig | 97 - arch/arm/configs/ezx_defconfig | 389 ---- arch/arm/configs/h5000_defconfig | 74 - arch/arm/configs/lpd270_defconfig | 58 - arch/arm/configs/lubbock_defconfig | 53 - arch/arm/configs/magician_defconfig | 151 -- arch/arm/configs/mainstone_defconfig | 51 - arch/arm/configs/palmz72_defconfig | 75 - arch/arm/configs/pcm027_defconfig | 90 - arch/arm/configs/pxa255-idp_defconfig | 55 - arch/arm/configs/pxa_defconfig | 3 - arch/arm/configs/trizeps4_defconfig | 207 --- arch/arm/configs/viper_defconfig | 160 -- arch/arm/configs/xcep_defconfig | 89 - arch/arm/configs/zeus_defconfig | 173 -- arch/arm/mach-pxa/Kconfig | 583 +----- arch/arm/mach-pxa/Makefile | 60 +- arch/arm/mach-pxa/balloon3-pcmcia.c | 137 -- arch/arm/mach-pxa/balloon3.c | 821 -------- arch/arm/mach-pxa/balloon3.h | 181 -- arch/arm/mach-pxa/capc7117.c | 159 -- arch/arm/mach-pxa/cm-x300.c | 883 --------- arch/arm/mach-pxa/colibri-evalboard.c | 138 -- arch/arm/mach-pxa/colibri-pcmcia.c | 165 -- arch/arm/mach-pxa/colibri-pxa270-income.c | 236 --- arch/arm/mach-pxa/colibri-pxa270.c | 330 ---- arch/arm/mach-pxa/colibri-pxa300.c | 193 -- arch/arm/mach-pxa/colibri-pxa320.c | 264 --- arch/arm/mach-pxa/colibri-pxa3xx.c | 147 -- arch/arm/mach-pxa/colibri.h | 70 - arch/arm/mach-pxa/corgi.c | 826 --------- arch/arm/mach-pxa/corgi.h | 110 -- arch/arm/mach-pxa/corgi_pm.c | 221 --- arch/arm/mach-pxa/csb701.c | 67 - arch/arm/mach-pxa/csb726.c | 291 --- arch/arm/mach-pxa/csb726.h | 24 - arch/arm/mach-pxa/devices.c | 408 ---- arch/arm/mach-pxa/devices.h | 3 - arch/arm/mach-pxa/e740-pcmcia.c | 127 -- arch/arm/mach-pxa/eseries-gpio.h | 63 - arch/arm/mach-pxa/eseries-irq.h | 24 - arch/arm/mach-pxa/eseries.c | 1001 ---------- arch/arm/mach-pxa/ezx.c | 1254 ------------- arch/arm/mach-pxa/h5000.c | 210 --- arch/arm/mach-pxa/h5000.h | 109 -- arch/arm/mach-pxa/himalaya.c | 166 -- arch/arm/mach-pxa/hx4700-pcmcia.c | 118 -- arch/arm/mach-pxa/hx4700.c | 942 ---------- arch/arm/mach-pxa/hx4700.h | 129 -- arch/arm/mach-pxa/icontrol.c | 218 --- arch/arm/mach-pxa/idp.c | 285 --- arch/arm/mach-pxa/idp.h | 195 -- arch/arm/mach-pxa/littleton.c | 462 ----- arch/arm/mach-pxa/littleton.h | 14 - arch/arm/mach-pxa/lpd270.c | 518 ------ arch/arm/mach-pxa/lpd270.h | 40 - arch/arm/mach-pxa/lubbock.c | 649 ------- arch/arm/mach-pxa/lubbock.h | 47 - arch/arm/mach-pxa/magician.c | 1112 ----------- arch/arm/mach-pxa/magician.h | 125 -- arch/arm/mach-pxa/mainstone.c | 738 -------- arch/arm/mach-pxa/mainstone.h | 140 -- arch/arm/mach-pxa/mfp-pxa25x.h | 33 - arch/arm/mach-pxa/mfp-pxa2xx.c | 4 - arch/arm/mach-pxa/mfp-pxa300.h | 52 - arch/arm/mach-pxa/mfp-pxa320.h | 458 ----- arch/arm/mach-pxa/mfp-pxa930.h | 495 ----- arch/arm/mach-pxa/mioa701.c | 784 -------- arch/arm/mach-pxa/mioa701.h | 76 - arch/arm/mach-pxa/mioa701_bootresume.S | 38 - arch/arm/mach-pxa/mp900.c | 101 - arch/arm/mach-pxa/mxm8x10.c | 477 ----- arch/arm/mach-pxa/mxm8x10.h | 22 - arch/arm/mach-pxa/palm27x.c | 473 ----- arch/arm/mach-pxa/palm27x.h | 77 - arch/arm/mach-pxa/palmld-pcmcia.c | 111 -- arch/arm/mach-pxa/palmld.c | 392 ---- arch/arm/mach-pxa/palmld.h | 107 -- arch/arm/mach-pxa/palmt5.c | 234 --- arch/arm/mach-pxa/palmt5.h | 82 - arch/arm/mach-pxa/palmtc-pcmcia.c | 162 -- arch/arm/mach-pxa/palmtc.c | 539 ------ arch/arm/mach-pxa/palmtc.h | 84 - arch/arm/mach-pxa/palmte2.c | 383 ---- arch/arm/mach-pxa/palmte2.h | 64 - arch/arm/mach-pxa/palmtreo.c | 548 ------ arch/arm/mach-pxa/palmtreo.h | 64 - arch/arm/mach-pxa/palmtx-pcmcia.c | 111 -- arch/arm/mach-pxa/palmtx.c | 390 ---- arch/arm/mach-pxa/palmtx.h | 110 -- arch/arm/mach-pxa/palmz72.c | 319 ---- arch/arm/mach-pxa/palmz72.h | 80 - arch/arm/mach-pxa/pcm027.c | 266 --- arch/arm/mach-pxa/pcm027.h | 73 - arch/arm/mach-pxa/pcm990-baseboard.c | 408 ---- arch/arm/mach-pxa/pcm990_baseboard.h | 199 -- arch/arm/mach-pxa/pm.c | 2 - arch/arm/mach-pxa/pm.h | 10 - arch/arm/mach-pxa/poodle.c | 484 ----- arch/arm/mach-pxa/poodle.h | 92 - arch/arm/mach-pxa/pxa25x.c | 7 - arch/arm/mach-pxa/pxa27x.c | 18 +- arch/arm/mach-pxa/pxa27x.h | 3 - arch/arm/mach-pxa/pxa2xx.c | 29 - arch/arm/mach-pxa/pxa300.c | 17 +- arch/arm/mach-pxa/pxa320.c | 88 - arch/arm/mach-pxa/pxa320.h | 9 - arch/arm/mach-pxa/pxa3xx-ulpi.c | 385 ---- arch/arm/mach-pxa/pxa3xx.c | 91 - arch/arm/mach-pxa/pxa930.c | 217 --- arch/arm/mach-pxa/pxa930.h | 8 - arch/arm/mach-pxa/pxa_cplds_irqs.c | 200 -- arch/arm/mach-pxa/regs-u2d.h | 199 -- arch/arm/mach-pxa/regs-uart.h | 146 -- arch/arm/mach-pxa/saar.c | 604 ------ arch/arm/mach-pxa/sharpsl_pm.c | 4 - arch/arm/mach-pxa/spitz.c | 23 - arch/arm/mach-pxa/tavorevb.c | 506 ----- arch/arm/mach-pxa/tosa-bt.c | 134 -- arch/arm/mach-pxa/tosa.c | 946 ---------- arch/arm/mach-pxa/tosa.h | 165 -- arch/arm/mach-pxa/tosa_bt.h | 18 - arch/arm/mach-pxa/trizeps4-pcmcia.c | 200 -- arch/arm/mach-pxa/trizeps4.c | 575 ------ arch/arm/mach-pxa/trizeps4.h | 166 -- arch/arm/mach-pxa/viper-pcmcia.c | 180 -- arch/arm/mach-pxa/viper-pcmcia.h | 12 - arch/arm/mach-pxa/viper.c | 1034 ----------- arch/arm/mach-pxa/viper.h | 91 - arch/arm/mach-pxa/vpac270-pcmcia.c | 137 -- arch/arm/mach-pxa/vpac270.c | 736 -------- arch/arm/mach-pxa/vpac270.h | 38 - arch/arm/mach-pxa/xcep.c | 190 -- arch/arm/mach-pxa/z2.c | 781 -------- arch/arm/mach-pxa/z2.h | 37 - arch/arm/mach-pxa/zeus.c | 974 ---------- arch/arm/mach-pxa/zeus.h | 82 - arch/arm/mach-pxa/zylonite.c | 495 ----- arch/arm/mach-pxa/zylonite.h | 45 - arch/arm/mach-pxa/zylonite_pxa300.c | 281 --- arch/arm/mach-pxa/zylonite_pxa320.c | 213 --- arch/arm/mach-tegra/tegra.c | 1 - drivers/ata/Kconfig | 9 - drivers/ata/Makefile | 1 - drivers/ata/pata_palmld.c | 137 -- drivers/clk/pxa/clk-pxa3xx.c | 22 +- drivers/cpufreq/pxa3xx-cpufreq.c | 21 +- drivers/gpio/Kconfig | 7 - drivers/gpio/Makefile | 1 - drivers/gpio/gpio-ucb1400.c | 85 - drivers/input/keyboard/Kconfig | 9 - drivers/input/keyboard/Makefile | 1 - drivers/input/keyboard/pxa930_rotary.c | 195 -- drivers/input/mouse/Kconfig | 6 - drivers/input/mouse/Makefile | 1 - drivers/input/mouse/pxa930_trkball.c | 250 --- drivers/input/touchscreen/Kconfig | 81 - drivers/input/touchscreen/Makefile | 8 - drivers/input/touchscreen/mainstone-wm97xx.c | 10 - drivers/input/touchscreen/ucb1400_ts.c | 458 ----- drivers/input/touchscreen/wm9705.c | 345 ---- drivers/input/touchscreen/wm9712.c | 466 ----- drivers/input/touchscreen/wm9713.c | 476 ----- drivers/input/touchscreen/wm97xx-core.c | 910 --------- drivers/input/touchscreen/zylonite-wm97xx.c | 220 --- drivers/leds/Kconfig | 11 - drivers/leds/Makefile | 1 - drivers/leds/leds-asic3.c | 177 -- drivers/mfd/Kconfig | 72 - drivers/mfd/Makefile | 8 - drivers/mfd/asic3.c | 1071 ----------- drivers/mfd/htc-pasic3.c | 210 --- drivers/mfd/t7l66xb.c | 432 ----- drivers/mfd/tc6387xb.c | 233 --- drivers/mfd/tc6393xb.c | 912 --------- drivers/mfd/tmio_core.c | 70 - drivers/mfd/ucb1400_core.c | 158 -- drivers/mfd/wm97xx-core.c | 362 ---- drivers/mmc/host/Kconfig | 8 - drivers/mmc/host/Makefile | 1 - drivers/mmc/host/pxamci.c | 3 +- drivers/mmc/host/tmio_mmc.c | 227 --- drivers/mtd/nand/raw/Kconfig | 7 - drivers/mtd/nand/raw/Makefile | 1 - drivers/mtd/nand/raw/tmio_nand.c | 533 ------ drivers/parport/Kconfig | 11 - drivers/parport/Makefile | 1 - drivers/parport/parport_ax88796.c | 418 ----- drivers/pcmcia/Kconfig | 12 +- drivers/pcmcia/Makefile | 5 - drivers/pcmcia/pxa2xx_base.c | 14 +- drivers/pcmcia/pxa2xx_mainstone.c | 122 -- drivers/pcmcia/sa1100_simpad.c | 115 -- drivers/pcmcia/sa1111_badge4.c | 158 -- drivers/pcmcia/sa1111_generic.c | 4 - drivers/pcmcia/sa1111_lubbock.c | 155 -- drivers/power/supply/Kconfig | 22 - drivers/power/supply/Makefile | 3 - drivers/power/supply/ds2760_battery.c | 8 - drivers/power/supply/pda_power.c | 520 ------ drivers/power/supply/tosa_battery.c | 512 ----- drivers/power/supply/z2_battery.c | 317 ---- drivers/rtc/Kconfig | 9 - drivers/rtc/Makefile | 1 - drivers/rtc/rtc-v3020.c | 369 ---- drivers/usb/gadget/udc/pxa25x_udc.c | 62 - drivers/usb/host/ohci-hcd.c | 18 - drivers/usb/host/ohci-pxa27x.c | 9 - drivers/usb/host/ohci-tmio.c | 364 ---- drivers/video/backlight/Kconfig | 14 - drivers/video/backlight/Makefile | 2 - drivers/video/backlight/locomolcd.c | 10 - drivers/video/backlight/tosa_bl.c | 173 -- drivers/video/backlight/tosa_bl.h | 8 - drivers/video/backlight/tosa_lcd.c | 284 --- drivers/video/fbdev/Kconfig | 39 - drivers/video/fbdev/Makefile | 2 - drivers/video/fbdev/tmiofb.c | 1040 ----------- drivers/video/fbdev/w100fb.c | 1644 ----------------- drivers/video/fbdev/w100fb.h | 924 --------- drivers/w1/masters/Kconfig | 7 - drivers/w1/masters/Makefile | 1 - drivers/w1/masters/ds1wm.c | 675 ------- include/linux/mfd/asic3.h | 313 ---- include/linux/mfd/htc-pasic3.h | 54 - include/linux/mfd/t7l66xb.h | 29 - include/linux/mfd/tc6387xb.h | 19 - include/linux/mfd/tc6393xb.h | 53 - include/linux/mfd/tmio.h | 5 - include/linux/parport.h | 5 - include/linux/pda_power.h | 39 - include/linux/platform_data/asoc-palm27x.h | 9 - include/linux/platform_data/asoc-poodle.h | 16 - include/linux/platform_data/asoc-pxa.h | 31 - include/linux/platform_data/irda-pxaficp.h | 26 - .../platform_data/keyboard-pxa930_rotary.h | 21 - include/linux/platform_data/mmp_audio.h | 18 - .../platform_data/mouse-pxa930_trkball.h | 11 - include/linux/platform_data/rtc-v3020.h | 41 - include/linux/platform_data/usb-pxa3xx-ulpi.h | 32 - include/linux/soc/pxa/cpu.h | 93 +- include/linux/ucb1400.h | 160 -- include/linux/z2_battery.h | 17 - include/sound/ac97/codec.h | 116 -- include/sound/ac97/compat.h | 17 - include/sound/ac97/controller.h | 83 - include/video/w100fb.h | 147 -- sound/Kconfig | 3 - sound/Makefile | 1 - sound/ac97/Kconfig | 19 - sound/ac97/Makefile | 9 - sound/ac97/ac97_core.h | 13 - sound/ac97/bus.c | 557 ------ sound/ac97/codec.c | 12 - sound/ac97/snd_ac97_compat.c | 120 -- sound/arm/Kconfig | 13 - sound/arm/Makefile | 4 - sound/arm/pxa2xx-ac97-lib.c | 466 ----- sound/arm/pxa2xx-ac97-regs.h | 100 - sound/arm/pxa2xx-ac97.c | 293 --- sound/pci/ac97/ac97_codec.c | 1 - sound/pci/ac97/ac97_patch.c | 40 - sound/soc/codecs/wm9705.c | 2 - sound/soc/codecs/wm9712.c | 2 - sound/soc/codecs/wm9713.c | 2 - sound/soc/pxa/Kconfig | 183 -- sound/soc/pxa/Makefile | 35 - sound/soc/pxa/brownstone.c | 133 -- sound/soc/pxa/corgi.c | 332 ---- sound/soc/pxa/e740_wm9705.c | 168 -- sound/soc/pxa/e750_wm9705.c | 147 -- sound/soc/pxa/e800_wm9712.c | 147 -- sound/soc/pxa/em-x270.c | 92 - sound/soc/pxa/hx4700.c | 207 --- sound/soc/pxa/magician.c | 366 ---- sound/soc/pxa/mioa701_wm9713.c | 201 -- sound/soc/pxa/mmp-pcm.c | 267 --- sound/soc/pxa/palm27x.c | 162 -- sound/soc/pxa/poodle.c | 291 --- sound/soc/pxa/pxa2xx-ac97.c | 307 --- sound/soc/pxa/pxa2xx-i2s.c | 2 - sound/soc/pxa/tosa.c | 255 --- sound/soc/pxa/ttc-dkb.c | 143 -- sound/soc/pxa/z2.c | 218 --- sound/soc/pxa/zylonite.c | 266 --- 292 files changed, 24 insertions(+), 59127 deletions(-) delete mode 100644 arch/arm/configs/cm_x300_defconfig delete mode 100644 arch/arm/configs/colibri_pxa270_defconfig delete mode 100644 arch/arm/configs/colibri_pxa300_defconfig delete mode 100644 arch/arm/configs/corgi_defconfig delete mode 100644 arch/arm/configs/eseries_pxa_defconfig delete mode 100644 arch/arm/configs/ezx_defconfig delete mode 100644 arch/arm/configs/h5000_defconfig delete mode 100644 arch/arm/configs/lpd270_defconfig delete mode 100644 arch/arm/configs/lubbock_defconfig delete mode 100644 arch/arm/configs/magician_defconfig delete mode 100644 arch/arm/configs/mainstone_defconfig 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100644 arch/arm/mach-pxa/palmld-pcmcia.c delete mode 100644 arch/arm/mach-pxa/palmld.c delete mode 100644 arch/arm/mach-pxa/palmld.h delete mode 100644 arch/arm/mach-pxa/palmt5.c delete mode 100644 arch/arm/mach-pxa/palmt5.h delete mode 100644 arch/arm/mach-pxa/palmtc-pcmcia.c delete mode 100644 arch/arm/mach-pxa/palmtc.c delete mode 100644 arch/arm/mach-pxa/palmtc.h delete mode 100644 arch/arm/mach-pxa/palmte2.c delete mode 100644 arch/arm/mach-pxa/palmte2.h delete mode 100644 arch/arm/mach-pxa/palmtreo.c delete mode 100644 arch/arm/mach-pxa/palmtreo.h delete mode 100644 arch/arm/mach-pxa/palmtx-pcmcia.c delete mode 100644 arch/arm/mach-pxa/palmtx.c delete mode 100644 arch/arm/mach-pxa/palmtx.h delete mode 100644 arch/arm/mach-pxa/palmz72.c delete mode 100644 arch/arm/mach-pxa/palmz72.h delete mode 100644 arch/arm/mach-pxa/pcm027.c delete mode 100644 arch/arm/mach-pxa/pcm027.h delete mode 100644 arch/arm/mach-pxa/pcm990-baseboard.c delete mode 100644 arch/arm/mach-pxa/pcm990_baseboard.h delete mode 100644 arch/arm/mach-pxa/poodle.c delete mode 100644 arch/arm/mach-pxa/poodle.h delete mode 100644 arch/arm/mach-pxa/pxa320.c delete mode 100644 arch/arm/mach-pxa/pxa320.h delete mode 100644 arch/arm/mach-pxa/pxa3xx-ulpi.c delete mode 100644 arch/arm/mach-pxa/pxa930.c delete mode 100644 arch/arm/mach-pxa/pxa930.h delete mode 100644 arch/arm/mach-pxa/pxa_cplds_irqs.c delete mode 100644 arch/arm/mach-pxa/regs-u2d.h delete mode 100644 arch/arm/mach-pxa/regs-uart.h delete mode 100644 arch/arm/mach-pxa/saar.c delete mode 100644 arch/arm/mach-pxa/tavorevb.c delete mode 100644 arch/arm/mach-pxa/tosa-bt.c delete mode 100644 arch/arm/mach-pxa/tosa.c delete mode 100644 arch/arm/mach-pxa/tosa.h delete mode 100644 arch/arm/mach-pxa/tosa_bt.h delete mode 100644 arch/arm/mach-pxa/trizeps4-pcmcia.c delete mode 100644 arch/arm/mach-pxa/trizeps4.c delete mode 100644 arch/arm/mach-pxa/trizeps4.h delete mode 100644 arch/arm/mach-pxa/viper-pcmcia.c delete mode 100644 arch/arm/mach-pxa/viper-pcmcia.h delete mode 100644 arch/arm/mach-pxa/viper.c delete mode 100644 arch/arm/mach-pxa/viper.h delete mode 100644 arch/arm/mach-pxa/vpac270-pcmcia.c delete mode 100644 arch/arm/mach-pxa/vpac270.c delete mode 100644 arch/arm/mach-pxa/vpac270.h delete mode 100644 arch/arm/mach-pxa/xcep.c delete mode 100644 arch/arm/mach-pxa/z2.c delete mode 100644 arch/arm/mach-pxa/z2.h delete mode 100644 arch/arm/mach-pxa/zeus.c delete mode 100644 arch/arm/mach-pxa/zeus.h delete mode 100644 arch/arm/mach-pxa/zylonite.c delete mode 100644 arch/arm/mach-pxa/zylonite.h delete mode 100644 arch/arm/mach-pxa/zylonite_pxa300.c delete mode 100644 arch/arm/mach-pxa/zylonite_pxa320.c delete mode 100644 drivers/ata/pata_palmld.c delete mode 100644 drivers/gpio/gpio-ucb1400.c delete mode 100644 drivers/input/keyboard/pxa930_rotary.c delete mode 100644 drivers/input/mouse/pxa930_trkball.c delete mode 100644 drivers/input/touchscreen/ucb1400_ts.c delete mode 100644 drivers/input/touchscreen/wm9705.c delete mode 100644 drivers/input/touchscreen/wm9712.c delete mode 100644 drivers/input/touchscreen/wm9713.c delete mode 100644 drivers/input/touchscreen/wm97xx-core.c delete mode 100644 drivers/input/touchscreen/zylonite-wm97xx.c delete mode 100644 drivers/leds/leds-asic3.c delete mode 100644 drivers/mfd/asic3.c delete mode 100644 drivers/mfd/htc-pasic3.c delete mode 100644 drivers/mfd/t7l66xb.c delete mode 100644 drivers/mfd/tc6387xb.c delete mode 100644 drivers/mfd/tc6393xb.c delete mode 100644 drivers/mfd/tmio_core.c delete mode 100644 drivers/mfd/ucb1400_core.c delete mode 100644 drivers/mfd/wm97xx-core.c delete mode 100644 drivers/mmc/host/tmio_mmc.c delete mode 100644 drivers/mtd/nand/raw/tmio_nand.c delete mode 100644 drivers/parport/parport_ax88796.c delete mode 100644 drivers/pcmcia/pxa2xx_mainstone.c delete mode 100644 drivers/pcmcia/sa1100_simpad.c delete mode 100644 drivers/pcmcia/sa1111_badge4.c delete mode 100644 drivers/pcmcia/sa1111_lubbock.c delete mode 100644 drivers/power/supply/pda_power.c delete mode 100644 drivers/power/supply/tosa_battery.c delete mode 100644 drivers/power/supply/z2_battery.c delete mode 100644 drivers/rtc/rtc-v3020.c delete mode 100644 drivers/usb/host/ohci-tmio.c delete mode 100644 drivers/video/backlight/tosa_bl.c delete mode 100644 drivers/video/backlight/tosa_bl.h delete mode 100644 drivers/video/backlight/tosa_lcd.c delete mode 100644 drivers/video/fbdev/tmiofb.c delete mode 100644 drivers/video/fbdev/w100fb.c delete mode 100644 drivers/video/fbdev/w100fb.h delete mode 100644 drivers/w1/masters/ds1wm.c delete mode 100644 include/linux/mfd/asic3.h delete mode 100644 include/linux/mfd/htc-pasic3.h delete mode 100644 include/linux/mfd/t7l66xb.h delete mode 100644 include/linux/mfd/tc6387xb.h delete mode 100644 include/linux/mfd/tc6393xb.h delete mode 100644 include/linux/pda_power.h delete mode 100644 include/linux/platform_data/asoc-palm27x.h delete mode 100644 include/linux/platform_data/asoc-poodle.h delete mode 100644 include/linux/platform_data/asoc-pxa.h delete mode 100644 include/linux/platform_data/irda-pxaficp.h delete mode 100644 include/linux/platform_data/keyboard-pxa930_rotary.h delete mode 100644 include/linux/platform_data/mmp_audio.h delete mode 100644 include/linux/platform_data/mouse-pxa930_trkball.h delete mode 100644 include/linux/platform_data/rtc-v3020.h delete mode 100644 include/linux/platform_data/usb-pxa3xx-ulpi.h delete mode 100644 include/linux/ucb1400.h delete mode 100644 include/linux/z2_battery.h delete mode 100644 include/sound/ac97/codec.h delete mode 100644 include/sound/ac97/compat.h delete mode 100644 include/sound/ac97/controller.h delete mode 100644 include/video/w100fb.h delete mode 100644 sound/ac97/Kconfig delete mode 100644 sound/ac97/Makefile delete mode 100644 sound/ac97/ac97_core.h delete mode 100644 sound/ac97/bus.c delete mode 100644 sound/ac97/codec.c delete mode 100644 sound/ac97/snd_ac97_compat.c delete mode 100644 sound/arm/pxa2xx-ac97-lib.c delete mode 100644 sound/arm/pxa2xx-ac97-regs.h delete mode 100644 sound/arm/pxa2xx-ac97.c delete mode 100644 sound/soc/pxa/brownstone.c delete mode 100644 sound/soc/pxa/corgi.c delete mode 100644 sound/soc/pxa/e740_wm9705.c delete mode 100644 sound/soc/pxa/e750_wm9705.c delete mode 100644 sound/soc/pxa/e800_wm9712.c delete mode 100644 sound/soc/pxa/em-x270.c delete mode 100644 sound/soc/pxa/hx4700.c delete mode 100644 sound/soc/pxa/magician.c delete mode 100644 sound/soc/pxa/mioa701_wm9713.c delete mode 100644 sound/soc/pxa/mmp-pcm.c delete mode 100644 sound/soc/pxa/palm27x.c delete mode 100644 sound/soc/pxa/poodle.c delete mode 100644 sound/soc/pxa/pxa2xx-ac97.c delete mode 100644 sound/soc/pxa/tosa.c delete mode 100644 sound/soc/pxa/ttc-dkb.c delete mode 100644 sound/soc/pxa/z2.c delete mode 100644 sound/soc/pxa/zylonite.c -- 2.29.2

1 0

[PATCH] ASoC: amd: acp: Add setbias level for rt5682s codec in machine driver
by Venkata Prasad Potturu 19 Oct '22

19 Oct '22

Add set_bais_level function for rt5682s codec to enable bclk and lrclk before codec widgets power on and disable bclk and lrclk after widgets power down, to avoid pop noise Signed-off-by: Venkata Prasad Potturu <venkataprasad.potturu(a)amd.com> --- sound/soc/amd/acp/acp-mach-common.c | 62 ++++++++++++++++++++++++++--- 1 file changed, 56 insertions(+), 6 deletions(-) diff --git a/sound/soc/amd/acp/acp-mach-common.c b/sound/soc/amd/acp/acp-mach-common.c index 4c69cb6e3400..a78cf29387a7 100644 --- a/sound/soc/amd/acp/acp-mach-common.c +++ b/sound/soc/amd/acp/acp-mach-common.c @@ -167,11 +167,14 @@ static int acp_card_hs_startup(struct snd_pcm_substream *substream) &constraints_channels); snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &constraints_rates); - if (!drvdata->soc_mclk) { - ret = acp_clk_enable(drvdata); - if (ret < 0) { - dev_err(rtd->card->dev, "Failed to enable HS clk: %d\n", ret); - return ret; + + if (strcmp(codec_dai->name, "rt5682s-aif1") && strcmp(codec_dai->name, "rt5682s-aif2")) { + if (!drvdata->soc_mclk) { + ret = acp_clk_enable(drvdata); + if (ret < 0) { + dev_err(rtd->card->dev, "Failed to enable HS clk: %d\n", ret); + return ret; + } } } @@ -280,7 +283,6 @@ static int acp_card_rt5682s_init(struct snd_soc_pcm_runtime *rtd) static const struct snd_soc_ops acp_card_rt5682s_ops = { .startup = acp_card_hs_startup, - .shutdown = acp_card_shutdown, }; static const unsigned int dmic_channels[] = { @@ -570,6 +572,52 @@ SND_SOC_DAILINK_DEF(sof_dmic, SND_SOC_DAILINK_DEF(pdm_dmic, DAILINK_COMP_ARRAY(COMP_CPU("acp-pdm-dmic"))); +static int acp_rtk_set_bias_level(struct snd_soc_card *card, + struct snd_soc_dapm_context *dapm, + enum snd_soc_bias_level level) +{ + struct snd_soc_component *component = dapm->component; + struct acp_card_drvdata *drvdata = card->drvdata; + int ret = 0; + + if (!component) + return 0; + + if (strncmp(component->name, "i2c-RTL5682", 11) && + strncmp(component->name, "i2c-10EC1019", 12)) + return 0; + + /* + * For Realtek's codec and amplifier components, + * the lrck and bclk must be enabled brfore their all dapms be powered on, + * and must be disabled after their all dapms be powered down + * to avoid any pop. + */ + switch (level) { + case SND_SOC_BIAS_STANDBY: + if (snd_soc_dapm_get_bias_level(dapm) == SND_SOC_BIAS_OFF) { + clk_set_rate(drvdata->wclk, 48000); + clk_set_rate(drvdata->bclk, 48000 * 64); + + /* Increase bclk's enable_count */ + ret = clk_prepare_enable(drvdata->bclk); + if (ret < 0) + dev_err(component->dev, "Failed to enable bclk %d\n", ret); + } else { + /* + * Decrease bclk's enable_count. + * While the enable_count is 0, the bclk would be closed. + */ + clk_disable_unprepare(drvdata->bclk); + } + break; + default: + break; + } + + return ret; +} + int acp_sofdsp_dai_links_create(struct snd_soc_card *card) { struct snd_soc_dai_link *links; @@ -730,6 +778,7 @@ int acp_sofdsp_dai_links_create(struct snd_soc_card *card) card->dai_link = links; card->num_links = num_links; + card->set_bias_level = acp_rtk_set_bias_level; return 0; } @@ -907,6 +956,7 @@ int acp_legacy_dai_links_create(struct snd_soc_card *card) card->dai_link = links; card->num_links = num_links; + card->set_bias_level = acp_rtk_set_bias_level; return 0; } -- 2.25.1

2 1

[PATCH 2/2] ASoC: rt1308-sdw: update the preset settings
by shumingf＠realtek.com 19 Oct '22

19 Oct '22

From: Shuming Fan <shumingf(a)realtek.com> This patch updates the pad control and checks the hardware version to set the different preset settings. Signed-off-by: Shuming Fan <shumingf(a)realtek.com> --- sound/soc/codecs/rt1308-sdw.c | 17 ++++++++++++++--- sound/soc/codecs/rt1308-sdw.h | 1 + sound/soc/codecs/rt1308.h | 5 +++++ 3 files changed, 20 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/rt1308-sdw.c b/sound/soc/codecs/rt1308-sdw.c index 5c29416aa781..f99aed353f10 100644 --- a/sound/soc/codecs/rt1308-sdw.c +++ b/sound/soc/codecs/rt1308-sdw.c @@ -50,6 +50,7 @@ static bool rt1308_volatile_register(struct device *dev, unsigned int reg) case 0x3008: case 0x300a: case 0xc000: + case 0xc710: case 0xc860 ... 0xc863: case 0xc870 ... 0xc873: return true; @@ -200,6 +201,7 @@ static int rt1308_io_init(struct device *dev, struct sdw_slave *slave) { struct rt1308_sdw_priv *rt1308 = dev_get_drvdata(dev); int ret = 0; + unsigned int tmp; if (rt1308->hw_init) return 0; @@ -231,6 +233,10 @@ static int rt1308_io_init(struct device *dev, struct sdw_slave *slave) /* sw reset */ regmap_write(rt1308->regmap, RT1308_SDW_RESET, 0); + regmap_read(rt1308->regmap, 0xc710, &tmp); + rt1308->hw_ver = tmp; + dev_dbg(dev, "%s, hw_ver=0x%x\n", __func__, rt1308->hw_ver); + /* initial settings */ regmap_write(rt1308->regmap, 0xc103, 0xc0); regmap_write(rt1308->regmap, 0xc030, 0x17); @@ -246,8 +252,14 @@ static int rt1308_io_init(struct device *dev, struct sdw_slave *slave) regmap_write(rt1308->regmap, 0xc062, 0x05); regmap_write(rt1308->regmap, 0xc171, 0x07); regmap_write(rt1308->regmap, 0xc173, 0x0d); - regmap_write(rt1308->regmap, 0xc311, 0x7f); - regmap_write(rt1308->regmap, 0xc900, 0x90); + if (rt1308->hw_ver == RT1308_VER_C) { + regmap_write(rt1308->regmap, 0xc311, 0x7f); + regmap_write(rt1308->regmap, 0xc300, 0x09); + } else { + regmap_write(rt1308->regmap, 0xc311, 0x4f); + regmap_write(rt1308->regmap, 0xc300, 0x0b); + } + regmap_write(rt1308->regmap, 0xc900, 0x5a); regmap_write(rt1308->regmap, 0xc1a0, 0x84); regmap_write(rt1308->regmap, 0xc1a1, 0x01); regmap_write(rt1308->regmap, 0xc360, 0x78); @@ -257,7 +269,6 @@ static int rt1308_io_init(struct device *dev, struct sdw_slave *slave) regmap_write(rt1308->regmap, 0xc070, 0x00); regmap_write(rt1308->regmap, 0xc100, 0xd7); regmap_write(rt1308->regmap, 0xc101, 0xd7); - regmap_write(rt1308->regmap, 0xc300, 0x09); if (rt1308->first_hw_init) { regcache_cache_bypass(rt1308->regmap, false); diff --git a/sound/soc/codecs/rt1308-sdw.h b/sound/soc/codecs/rt1308-sdw.h index b5f231f708cb..62ce27799307 100644 --- a/sound/soc/codecs/rt1308-sdw.h +++ b/sound/soc/codecs/rt1308-sdw.h @@ -165,6 +165,7 @@ struct rt1308_sdw_priv { bool first_hw_init; int rx_mask; int slots; + int hw_ver; }; struct sdw_stream_data { diff --git a/sound/soc/codecs/rt1308.h b/sound/soc/codecs/rt1308.h index ff7c423e879e..d3a0f91630ca 100644 --- a/sound/soc/codecs/rt1308.h +++ b/sound/soc/codecs/rt1308.h @@ -286,4 +286,9 @@ enum { RT1308_AIFS }; +enum rt1308_hw_ver { + RT1308_VER_C = 2, + RT1308_VER_D +}; + #endif /* end of _RT1308_H_ */ -- 2.37.0

2 1

[PATCH 1/2] ASoC: rt1308-sdw: add the default value of some registers
by shumingf＠realtek.com 19 Oct '22

19 Oct '22

From: Shuming Fan <shumingf(a)realtek.com> The driver missed the default value of register 0xc070/0xc360. This patch adds that default value to avoid invalid register access when the device doesn't be enumerated yet. BugLink: https://github.com/thesofproject/linux/issues/3924 Signed-off-by: Shuming Fan <shumingf(a)realtek.com> --- sound/soc/codecs/rt1308-sdw.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sound/soc/codecs/rt1308-sdw.h b/sound/soc/codecs/rt1308-sdw.h index 6668e19d85d4..b5f231f708cb 100644 --- a/sound/soc/codecs/rt1308-sdw.h +++ b/sound/soc/codecs/rt1308-sdw.h @@ -139,10 +139,12 @@ static const struct reg_default rt1308_reg_defaults[] = { { 0x3005, 0x23 }, { 0x3008, 0x02 }, { 0x300a, 0x00 }, + { 0xc000 | (RT1308_DATA_PATH << 4), 0x00 }, { 0xc003 | (RT1308_DAC_SET << 4), 0x00 }, { 0xc000 | (RT1308_POWER << 4), 0x00 }, { 0xc001 | (RT1308_POWER << 4), 0x00 }, { 0xc002 | (RT1308_POWER << 4), 0x00 }, + { 0xc000 | (RT1308_POWER_STATUS << 4), 0x00 }, }; #define RT1308_SDW_OFFSET 0xc000 -- 2.37.0

2 1

[PATCH v2] ASoC: simple-card: Fix up checks for HW param fixups
by Aidan MacDonald 19 Oct '22

19 Oct '22

The "convert-xxx" properties only have an effect for DPCM DAI links. A DAI link is only created as DPCM if the device tree requires it; part of this involves checking for the use of "convert-xxx" properties. When the convert-sample-format property was added, the checks got out of sync. A DAI link that specified only convert-sample-format but did not pass any of the other DPCM checks would not go into DPCM mode and the convert-sample-format property would be silently ignored. Fix this by adding a function to do the "convert-xxx" property checks, instead of open-coding it in simple-card and audio-graph-card. And add "convert-sample-format" to the check function so that DAI links using it will be initialized correctly. Fixes: 047a05366f4b ("ASoC: simple-card-utils: Fixup DAI sample format") Acked-by: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com> Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0(a)gmail.com> --- v2: Rename helper function to asoc_simple_is_convert_required() as suggested by Kuninori Morimoto. include/sound/simple_card_utils.h | 1 + sound/soc/generic/audio-graph-card.c | 2 +- sound/soc/generic/simple-card-utils.c | 15 +++++++++++++++ sound/soc/generic/simple-card.c | 3 +-- 4 files changed, 18 insertions(+), 3 deletions(-) diff --git a/include/sound/simple_card_utils.h b/include/sound/simple_card_utils.h index a0b827f0c2f6..25e049f44178 100644 --- a/include/sound/simple_card_utils.h +++ b/include/sound/simple_card_utils.h @@ -177,6 +177,7 @@ void asoc_simple_convert_fixup(struct asoc_simple_data *data, struct snd_pcm_hw_params *params); void asoc_simple_parse_convert(struct device_node *np, char *prefix, struct asoc_simple_data *data); +bool asoc_simple_is_convert_required(const struct asoc_simple_data *data); int asoc_simple_parse_routing(struct snd_soc_card *card, char *prefix); diff --git a/sound/soc/generic/audio-graph-card.c b/sound/soc/generic/audio-graph-card.c index b327372f2e4a..fe7cf972d44c 100644 --- a/sound/soc/generic/audio-graph-card.c +++ b/sound/soc/generic/audio-graph-card.c @@ -417,7 +417,7 @@ static inline bool parse_as_dpcm_link(struct asoc_simple_priv *priv, * or has convert-xxx property */ if ((of_get_child_count(codec_port) > 1) || - (adata->convert_rate || adata->convert_channels)) + asoc_simple_is_convert_required(adata)) return true; return false; diff --git a/sound/soc/generic/simple-card-utils.c b/sound/soc/generic/simple-card-utils.c index bef16833c487..be69bbc47f81 100644 --- a/sound/soc/generic/simple-card-utils.c +++ b/sound/soc/generic/simple-card-utils.c @@ -85,6 +85,21 @@ void asoc_simple_parse_convert(struct device_node *np, } EXPORT_SYMBOL_GPL(asoc_simple_parse_convert); +/** + * asoc_simple_is_convert_required() - Query if HW param conversion was requested + * @data: Link data. + * + * Returns true if any HW param conversion was requested for this DAI link with + * any "convert-xxx" properties. + */ +bool asoc_simple_is_convert_required(const struct asoc_simple_data *data) +{ + return data->convert_rate || + data->convert_channels || + data->convert_sample_format; +} +EXPORT_SYMBOL_GPL(asoc_simple_is_convert_required); + int asoc_simple_parse_daifmt(struct device *dev, struct device_node *node, struct device_node *codec, diff --git a/sound/soc/generic/simple-card.c b/sound/soc/generic/simple-card.c index 78419e18717d..feb55b66239b 100644 --- a/sound/soc/generic/simple-card.c +++ b/sound/soc/generic/simple-card.c @@ -393,8 +393,7 @@ static int __simple_for_each_link(struct asoc_simple_priv *priv, * or has convert-xxx property */ if (dpcm_selectable && - (num > 2 || - adata.convert_rate || adata.convert_channels)) { + (num > 2 || asoc_simple_is_convert_required(&adata))) { /* * np * |1(CPU)|0(Codec) li->cpu -- 2.38.0

3 2

[PATCH 05/17] ASoC: remove unused ep93xx files
by Arnd Bergmann 19 Oct '22

19 Oct '22

From: Arnd Bergmann <arnd(a)arndb.de> A couple of ep93xx board files were unused and got removed, so the corresponding ASoC support can also be removed. Cc: Mika Westerberg <mika.westerberg(a)iki.fi> Cc: Ryan Mallon <rmallon(a)gmail.com> Signed-off-by: Arnd Bergmann <arnd(a)arndb.de> --- sound/soc/cirrus/Kconfig | 23 -- sound/soc/cirrus/Makefile | 6 - sound/soc/cirrus/ep93xx-ac97.c | 446 --------------------------------- sound/soc/cirrus/simone.c | 86 ------- sound/soc/cirrus/snappercl15.c | 134 ---------- 5 files changed, 695 deletions(-) delete mode 100644 sound/soc/cirrus/ep93xx-ac97.c delete mode 100644 sound/soc/cirrus/simone.c delete mode 100644 sound/soc/cirrus/snappercl15.c diff --git a/sound/soc/cirrus/Kconfig b/sound/soc/cirrus/Kconfig index 8039a8febefa..34870c2d0cba 100644 --- a/sound/soc/cirrus/Kconfig +++ b/sound/soc/cirrus/Kconfig @@ -27,29 +27,6 @@ config SND_EP93XX_SOC_I2S_WATCHDOG endif # if SND_EP93XX_SOC_I2S -config SND_EP93XX_SOC_AC97 - tristate - select AC97_BUS - select SND_SOC_AC97_BUS - -config SND_EP93XX_SOC_SNAPPERCL15 - tristate "SoC Audio support for Bluewater Systems Snapper CL15 module" - depends on SND_EP93XX_SOC && MACH_SNAPPER_CL15 && I2C - select SND_EP93XX_SOC_I2S - select SND_SOC_TLV320AIC23_I2C - help - Say Y or M here if you want to add support for I2S audio on the - Bluewater Systems Snapper CL15 module. - -config SND_EP93XX_SOC_SIMONE - tristate "SoC Audio support for Simplemachines Sim.One board" - depends on SND_EP93XX_SOC && MACH_SIM_ONE - select SND_EP93XX_SOC_AC97 - select SND_SOC_AC97_CODEC - help - Say Y or M here if you want to add support for AC97 audio on the - Simplemachines Sim.One board. - config SND_EP93XX_SOC_EDB93XX tristate "SoC Audio support for Cirrus Logic EDB93xx boards" depends on SND_EP93XX_SOC && (MACH_EDB9301 || MACH_EDB9302 || MACH_EDB9302A || MACH_EDB9307A || MACH_EDB9315A) diff --git a/sound/soc/cirrus/Makefile b/sound/soc/cirrus/Makefile index bfb8dc409f53..19a86daad660 100644 --- a/sound/soc/cirrus/Makefile +++ b/sound/soc/cirrus/Makefile @@ -2,17 +2,11 @@ # EP93xx Platform Support snd-soc-ep93xx-objs := ep93xx-pcm.o snd-soc-ep93xx-i2s-objs := ep93xx-i2s.o -snd-soc-ep93xx-ac97-objs := ep93xx-ac97.o obj-$(CONFIG_SND_EP93XX_SOC) += snd-soc-ep93xx.o obj-$(CONFIG_SND_EP93XX_SOC_I2S) += snd-soc-ep93xx-i2s.o -obj-$(CONFIG_SND_EP93XX_SOC_AC97) += snd-soc-ep93xx-ac97.o # EP93XX Machine Support -snd-soc-snappercl15-objs := snappercl15.o -snd-soc-simone-objs := simone.o snd-soc-edb93xx-objs := edb93xx.o -obj-$(CONFIG_SND_EP93XX_SOC_SNAPPERCL15) += snd-soc-snappercl15.o -obj-$(CONFIG_SND_EP93XX_SOC_SIMONE) += snd-soc-simone.o obj-$(CONFIG_SND_EP93XX_SOC_EDB93XX) += snd-soc-edb93xx.o diff --git a/sound/soc/cirrus/ep93xx-ac97.c b/sound/soc/cirrus/ep93xx-ac97.c deleted file mode 100644 index 37593abe6053..000000000000 --- a/sound/soc/cirrus/ep93xx-ac97.c +++ /dev/null @@ -1,446 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * ASoC driver for Cirrus Logic EP93xx AC97 controller. - * - * Copyright (c) 2010 Mika Westerberg - * - * Based on s3c-ac97 ASoC driver by Jaswinder Singh. - */ - -#include <linux/delay.h> -#include <linux/err.h> -#include <linux/io.h> -#include <linux/init.h> -#include <linux/module.h> -#include <linux/platform_device.h> -#include <linux/slab.h> - -#include <sound/core.h> -#include <sound/dmaengine_pcm.h> -#include <sound/ac97_codec.h> -#include <sound/soc.h> - -#include <linux/platform_data/dma-ep93xx.h> -#include <linux/soc/cirrus/ep93xx.h> - -#include "ep93xx-pcm.h" - -/* - * Per channel (1-4) registers. - */ -#define AC97CH(n) (((n) - 1) * 0x20) - -#define AC97DR(n) (AC97CH(n) + 0x0000) - -#define AC97RXCR(n) (AC97CH(n) + 0x0004) -#define AC97RXCR_REN BIT(0) -#define AC97RXCR_RX3 BIT(3) -#define AC97RXCR_RX4 BIT(4) -#define AC97RXCR_CM BIT(15) - -#define AC97TXCR(n) (AC97CH(n) + 0x0008) -#define AC97TXCR_TEN BIT(0) -#define AC97TXCR_TX3 BIT(3) -#define AC97TXCR_TX4 BIT(4) -#define AC97TXCR_CM BIT(15) - -#define AC97SR(n) (AC97CH(n) + 0x000c) -#define AC97SR_TXFE BIT(1) -#define AC97SR_TXUE BIT(6) - -#define AC97RISR(n) (AC97CH(n) + 0x0010) -#define AC97ISR(n) (AC97CH(n) + 0x0014) -#define AC97IE(n) (AC97CH(n) + 0x0018) - -/* - * Global AC97 controller registers. - */ -#define AC97S1DATA 0x0080 -#define AC97S2DATA 0x0084 -#define AC97S12DATA 0x0088 - -#define AC97RGIS 0x008c -#define AC97GIS 0x0090 -#define AC97IM 0x0094 -/* - * Common bits for RGIS, GIS and IM registers. - */ -#define AC97_SLOT2RXVALID BIT(1) -#define AC97_CODECREADY BIT(5) -#define AC97_SLOT2TXCOMPLETE BIT(6) - -#define AC97EOI 0x0098 -#define AC97EOI_WINT BIT(0) -#define AC97EOI_CODECREADY BIT(1) - -#define AC97GCR 0x009c -#define AC97GCR_AC97IFE BIT(0) - -#define AC97RESET 0x00a0 -#define AC97RESET_TIMEDRESET BIT(0) - -#define AC97SYNC 0x00a4 -#define AC97SYNC_TIMEDSYNC BIT(0) - -#define AC97_TIMEOUT msecs_to_jiffies(5) - -/** - * struct ep93xx_ac97_info - EP93xx AC97 controller info structure - * @lock: mutex serializing access to the bus (slot 1 & 2 ops) - * @dev: pointer to the platform device dev structure - * @regs: mapped AC97 controller registers - * @done: bus ops wait here for an interrupt - */ -struct ep93xx_ac97_info { - struct mutex lock; - struct device *dev; - void __iomem *regs; - struct completion done; - struct snd_dmaengine_dai_dma_data dma_params_rx; - struct snd_dmaengine_dai_dma_data dma_params_tx; -}; - -/* currently ALSA only supports a single AC97 device */ -static struct ep93xx_ac97_info *ep93xx_ac97_info; - -static struct ep93xx_dma_data ep93xx_ac97_pcm_out = { - .name = "ac97-pcm-out", - .port = EP93XX_DMA_AAC1, - .direction = DMA_MEM_TO_DEV, -}; - -static struct ep93xx_dma_data ep93xx_ac97_pcm_in = { - .name = "ac97-pcm-in", - .port = EP93XX_DMA_AAC1, - .direction = DMA_DEV_TO_MEM, -}; - -static inline unsigned ep93xx_ac97_read_reg(struct ep93xx_ac97_info *info, - unsigned reg) -{ - return __raw_readl(info->regs + reg); -} - -static inline void ep93xx_ac97_write_reg(struct ep93xx_ac97_info *info, - unsigned reg, unsigned val) -{ - __raw_writel(val, info->regs + reg); -} - -static unsigned short ep93xx_ac97_read(struct snd_ac97 *ac97, - unsigned short reg) -{ - struct ep93xx_ac97_info *info = ep93xx_ac97_info; - unsigned short val; - - mutex_lock(&info->lock); - - ep93xx_ac97_write_reg(info, AC97S1DATA, reg); - ep93xx_ac97_write_reg(info, AC97IM, AC97_SLOT2RXVALID); - if (!wait_for_completion_timeout(&info->done, AC97_TIMEOUT)) { - dev_warn(info->dev, "timeout reading register %x\n", reg); - mutex_unlock(&info->lock); - return -ETIMEDOUT; - } - val = (unsigned short)ep93xx_ac97_read_reg(info, AC97S2DATA); - - mutex_unlock(&info->lock); - return val; -} - -static void ep93xx_ac97_write(struct snd_ac97 *ac97, - unsigned short reg, - unsigned short val) -{ - struct ep93xx_ac97_info *info = ep93xx_ac97_info; - - mutex_lock(&info->lock); - - /* - * Writes to the codec need to be done so that slot 2 is filled in - * before slot 1. - */ - ep93xx_ac97_write_reg(info, AC97S2DATA, val); - ep93xx_ac97_write_reg(info, AC97S1DATA, reg); - - ep93xx_ac97_write_reg(info, AC97IM, AC97_SLOT2TXCOMPLETE); - if (!wait_for_completion_timeout(&info->done, AC97_TIMEOUT)) - dev_warn(info->dev, "timeout writing register %x\n", reg); - - mutex_unlock(&info->lock); -} - -static void ep93xx_ac97_warm_reset(struct snd_ac97 *ac97) -{ - struct ep93xx_ac97_info *info = ep93xx_ac97_info; - - mutex_lock(&info->lock); - - /* - * We are assuming that before this functions gets called, the codec - * BIT_CLK is stopped by forcing the codec into powerdown mode. We can - * control the SYNC signal directly via AC97SYNC register. Using - * TIMEDSYNC the controller will keep the SYNC high > 1us. - */ - ep93xx_ac97_write_reg(info, AC97SYNC, AC97SYNC_TIMEDSYNC); - ep93xx_ac97_write_reg(info, AC97IM, AC97_CODECREADY); - if (!wait_for_completion_timeout(&info->done, AC97_TIMEOUT)) - dev_warn(info->dev, "codec warm reset timeout\n"); - - mutex_unlock(&info->lock); -} - -static void ep93xx_ac97_cold_reset(struct snd_ac97 *ac97) -{ - struct ep93xx_ac97_info *info = ep93xx_ac97_info; - - mutex_lock(&info->lock); - - /* - * For doing cold reset, we disable the AC97 controller interface, clear - * WINT and CODECREADY bits, and finally enable the interface again. - */ - ep93xx_ac97_write_reg(info, AC97GCR, 0); - ep93xx_ac97_write_reg(info, AC97EOI, AC97EOI_CODECREADY | AC97EOI_WINT); - ep93xx_ac97_write_reg(info, AC97GCR, AC97GCR_AC97IFE); - - /* - * Now, assert the reset and wait for the codec to become ready. - */ - ep93xx_ac97_write_reg(info, AC97RESET, AC97RESET_TIMEDRESET); - ep93xx_ac97_write_reg(info, AC97IM, AC97_CODECREADY); - if (!wait_for_completion_timeout(&info->done, AC97_TIMEOUT)) - dev_warn(info->dev, "codec cold reset timeout\n"); - - /* - * Give the codec some time to come fully out from the reset. This way - * we ensure that the subsequent reads/writes will work. - */ - usleep_range(15000, 20000); - - mutex_unlock(&info->lock); -} - -static irqreturn_t ep93xx_ac97_interrupt(int irq, void *dev_id) -{ - struct ep93xx_ac97_info *info = dev_id; - unsigned status, mask; - - /* - * Just mask out the interrupt and wake up the waiting thread. - * Interrupts are cleared via reading/writing to slot 1 & 2 registers by - * the waiting thread. - */ - status = ep93xx_ac97_read_reg(info, AC97GIS); - mask = ep93xx_ac97_read_reg(info, AC97IM); - mask &= ~status; - ep93xx_ac97_write_reg(info, AC97IM, mask); - - complete(&info->done); - return IRQ_HANDLED; -} - -static struct snd_ac97_bus_ops ep93xx_ac97_ops = { - .read = ep93xx_ac97_read, - .write = ep93xx_ac97_write, - .reset = ep93xx_ac97_cold_reset, - .warm_reset = ep93xx_ac97_warm_reset, -}; - -static int ep93xx_ac97_trigger(struct snd_pcm_substream *substream, - int cmd, struct snd_soc_dai *dai) -{ - struct ep93xx_ac97_info *info = snd_soc_dai_get_drvdata(dai); - unsigned v = 0; - - switch (cmd) { - case SNDRV_PCM_TRIGGER_START: - case SNDRV_PCM_TRIGGER_RESUME: - case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: - if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { - /* - * Enable compact mode, TX slots 3 & 4, and the TX FIFO - * itself. - */ - v |= AC97TXCR_CM; - v |= AC97TXCR_TX3 | AC97TXCR_TX4; - v |= AC97TXCR_TEN; - ep93xx_ac97_write_reg(info, AC97TXCR(1), v); - } else { - /* - * Enable compact mode, RX slots 3 & 4, and the RX FIFO - * itself. - */ - v |= AC97RXCR_CM; - v |= AC97RXCR_RX3 | AC97RXCR_RX4; - v |= AC97RXCR_REN; - ep93xx_ac97_write_reg(info, AC97RXCR(1), v); - } - break; - - case SNDRV_PCM_TRIGGER_STOP: - case SNDRV_PCM_TRIGGER_SUSPEND: - case SNDRV_PCM_TRIGGER_PAUSE_PUSH: - if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { - /* - * As per Cirrus EP93xx errata described below: - * - * https://www.cirrus.com/en/pubs/errata/ER667E2B.pdf - * - * we will wait for the TX FIFO to be empty before - * clearing the TEN bit. - */ - unsigned long timeout = jiffies + AC97_TIMEOUT; - - do { - v = ep93xx_ac97_read_reg(info, AC97SR(1)); - if (time_after(jiffies, timeout)) { - dev_warn(info->dev, "TX timeout\n"); - break; - } - } while (!(v & (AC97SR_TXFE | AC97SR_TXUE))); - - /* disable the TX FIFO */ - ep93xx_ac97_write_reg(info, AC97TXCR(1), 0); - } else { - /* disable the RX FIFO */ - ep93xx_ac97_write_reg(info, AC97RXCR(1), 0); - } - break; - - default: - dev_warn(info->dev, "unknown command %d\n", cmd); - return -EINVAL; - } - - return 0; -} - -static int ep93xx_ac97_dai_probe(struct snd_soc_dai *dai) -{ - struct ep93xx_ac97_info *info = snd_soc_dai_get_drvdata(dai); - - info->dma_params_tx.filter_data = &ep93xx_ac97_pcm_out; - info->dma_params_rx.filter_data = &ep93xx_ac97_pcm_in; - - dai->playback_dma_data = &info->dma_params_tx; - dai->capture_dma_data = &info->dma_params_rx; - - return 0; -} - -static const struct snd_soc_dai_ops ep93xx_ac97_dai_ops = { - .trigger = ep93xx_ac97_trigger, -}; - -static struct snd_soc_dai_driver ep93xx_ac97_dai = { - .name = "ep93xx-ac97", - .id = 0, - .probe = ep93xx_ac97_dai_probe, - .playback = { - .stream_name = "AC97 Playback", - .channels_min = 2, - .channels_max = 2, - .rates = SNDRV_PCM_RATE_8000_48000, - .formats = SNDRV_PCM_FMTBIT_S16_LE, - }, - .capture = { - .stream_name = "AC97 Capture", - .channels_min = 2, - .channels_max = 2, - .rates = SNDRV_PCM_RATE_8000_48000, - .formats = SNDRV_PCM_FMTBIT_S16_LE, - }, - .ops = &ep93xx_ac97_dai_ops, -}; - -static const struct snd_soc_component_driver ep93xx_ac97_component = { - .name = "ep93xx-ac97", - .legacy_dai_naming = 1, -}; - -static int ep93xx_ac97_probe(struct platform_device *pdev) -{ - struct ep93xx_ac97_info *info; - int irq; - int ret; - - info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL); - if (!info) - return -ENOMEM; - - info->regs = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(info->regs)) - return PTR_ERR(info->regs); - - irq = platform_get_irq(pdev, 0); - if (irq <= 0) - return irq < 0 ? irq : -ENODEV; - - ret = devm_request_irq(&pdev->dev, irq, ep93xx_ac97_interrupt, - IRQF_TRIGGER_HIGH, pdev->name, info); - if (ret) - goto fail; - - dev_set_drvdata(&pdev->dev, info); - - mutex_init(&info->lock); - init_completion(&info->done); - info->dev = &pdev->dev; - - ep93xx_ac97_info = info; - platform_set_drvdata(pdev, info); - - ret = snd_soc_set_ac97_ops(&ep93xx_ac97_ops); - if (ret) - goto fail; - - ret = snd_soc_register_component(&pdev->dev, &ep93xx_ac97_component, - &ep93xx_ac97_dai, 1); - if (ret) - goto fail; - - ret = devm_ep93xx_pcm_platform_register(&pdev->dev); - if (ret) - goto fail_unregister; - - return 0; - -fail_unregister: - snd_soc_unregister_component(&pdev->dev); -fail: - ep93xx_ac97_info = NULL; - snd_soc_set_ac97_ops(NULL); - return ret; -} - -static int ep93xx_ac97_remove(struct platform_device *pdev) -{ - struct ep93xx_ac97_info *info = platform_get_drvdata(pdev); - - snd_soc_unregister_component(&pdev->dev); - - /* disable the AC97 controller */ - ep93xx_ac97_write_reg(info, AC97GCR, 0); - - ep93xx_ac97_info = NULL; - - snd_soc_set_ac97_ops(NULL); - - return 0; -} - -static struct platform_driver ep93xx_ac97_driver = { - .probe = ep93xx_ac97_probe, - .remove = ep93xx_ac97_remove, - .driver = { - .name = "ep93xx-ac97", - }, -}; - -module_platform_driver(ep93xx_ac97_driver); - -MODULE_DESCRIPTION("EP93xx AC97 ASoC Driver"); -MODULE_AUTHOR("Mika Westerberg <mika.westerberg(a)iki.fi>"); -MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:ep93xx-ac97"); diff --git a/sound/soc/cirrus/simone.c b/sound/soc/cirrus/simone.c deleted file mode 100644 index 801c90877d77..000000000000 --- a/sound/soc/cirrus/simone.c +++ /dev/null @@ -1,86 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * simone.c -- ASoC audio for Simplemachines Sim.One board - * - * Copyright (c) 2010 Mika Westerberg - * - * Based on snappercl15 machine driver by Ryan Mallon. - */ - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/platform_device.h> -#include <linux/soc/cirrus/ep93xx.h> - -#include <sound/core.h> -#include <sound/pcm.h> -#include <sound/soc.h> - -#include <asm/mach-types.h> - -SND_SOC_DAILINK_DEFS(hifi, - DAILINK_COMP_ARRAY(COMP_CPU("ep93xx-ac97")), - DAILINK_COMP_ARRAY(COMP_CODEC("ac97-codec", "ac97-hifi")), - DAILINK_COMP_ARRAY(COMP_PLATFORM("ep93xx-ac97"))); - -static struct snd_soc_dai_link simone_dai = { - .name = "AC97", - .stream_name = "AC97 HiFi", - SND_SOC_DAILINK_REG(hifi), -}; - -static struct snd_soc_card snd_soc_simone = { - .name = "Sim.One", - .owner = THIS_MODULE, - .dai_link = &simone_dai, - .num_links = 1, -}; - -static struct platform_device *simone_snd_ac97_device; - -static int simone_probe(struct platform_device *pdev) -{ - struct snd_soc_card *card = &snd_soc_simone; - int ret; - - simone_snd_ac97_device = platform_device_register_simple("ac97-codec", - -1, NULL, 0); - if (IS_ERR(simone_snd_ac97_device)) - return PTR_ERR(simone_snd_ac97_device); - - card->dev = &pdev->dev; - - ret = snd_soc_register_card(card); - if (ret) { - dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n", - ret); - platform_device_unregister(simone_snd_ac97_device); - } - - return ret; -} - -static int simone_remove(struct platform_device *pdev) -{ - struct snd_soc_card *card = platform_get_drvdata(pdev); - - snd_soc_unregister_card(card); - platform_device_unregister(simone_snd_ac97_device); - - return 0; -} - -static struct platform_driver simone_driver = { - .driver = { - .name = "simone-audio", - }, - .probe = simone_probe, - .remove = simone_remove, -}; - -module_platform_driver(simone_driver); - -MODULE_DESCRIPTION("ALSA SoC Simplemachines Sim.One"); -MODULE_AUTHOR("Mika Westerberg <mika.westerberg(a)iki.fi>"); -MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:simone-audio"); diff --git a/sound/soc/cirrus/snappercl15.c b/sound/soc/cirrus/snappercl15.c deleted file mode 100644 index a286f5beeaeb..000000000000 --- a/sound/soc/cirrus/snappercl15.c +++ /dev/null @@ -1,134 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * snappercl15.c -- SoC audio for Bluewater Systems Snapper CL15 module - * - * Copyright (C) 2008 Bluewater Systems Ltd - * Author: Ryan Mallon - */ - -#include <linux/platform_device.h> -#include <linux/module.h> -#include <linux/soc/cirrus/ep93xx.h> -#include <sound/core.h> -#include <sound/pcm.h> -#include <sound/soc.h> - -#include <asm/mach-types.h> - -#include "../codecs/tlv320aic23.h" - -#define CODEC_CLOCK 5644800 - -static int snappercl15_hw_params(struct snd_pcm_substream *substream, - struct snd_pcm_hw_params *params) -{ - struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); - struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(rtd, 0); - struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0); - int err; - - err = snd_soc_dai_set_sysclk(codec_dai, 0, CODEC_CLOCK, - SND_SOC_CLOCK_IN); - if (err) - return err; - - err = snd_soc_dai_set_sysclk(cpu_dai, 0, CODEC_CLOCK, - SND_SOC_CLOCK_OUT); - if (err) - return err; - - return 0; -} - -static const struct snd_soc_ops snappercl15_ops = { - .hw_params = snappercl15_hw_params, -}; - -static const struct snd_soc_dapm_widget tlv320aic23_dapm_widgets[] = { - SND_SOC_DAPM_HP("Headphone Jack", NULL), - SND_SOC_DAPM_LINE("Line In", NULL), - SND_SOC_DAPM_MIC("Mic Jack", NULL), -}; - -static const struct snd_soc_dapm_route audio_map[] = { - {"Headphone Jack", NULL, "LHPOUT"}, - {"Headphone Jack", NULL, "RHPOUT"}, - - {"LLINEIN", NULL, "Line In"}, - {"RLINEIN", NULL, "Line In"}, - - {"MICIN", NULL, "Mic Jack"}, -}; - -SND_SOC_DAILINK_DEFS(aic23, - DAILINK_COMP_ARRAY(COMP_CPU("ep93xx-i2s")), - DAILINK_COMP_ARRAY(COMP_CODEC("tlv320aic23-codec.0-001a", - "tlv320aic23-hifi")), - DAILINK_COMP_ARRAY(COMP_PLATFORM("ep93xx-i2s"))); - -static struct snd_soc_dai_link snappercl15_dai = { - .name = "tlv320aic23", - .stream_name = "AIC23", - .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | - SND_SOC_DAIFMT_CBC_CFC, - .ops = &snappercl15_ops, - SND_SOC_DAILINK_REG(aic23), -}; - -static struct snd_soc_card snd_soc_snappercl15 = { - .name = "Snapper CL15", - .owner = THIS_MODULE, - .dai_link = &snappercl15_dai, - .num_links = 1, - - .dapm_widgets = tlv320aic23_dapm_widgets, - .num_dapm_widgets = ARRAY_SIZE(tlv320aic23_dapm_widgets), - .dapm_routes = audio_map, - .num_dapm_routes = ARRAY_SIZE(audio_map), -}; - -static int snappercl15_probe(struct platform_device *pdev) -{ - struct snd_soc_card *card = &snd_soc_snappercl15; - int ret; - - ret = ep93xx_i2s_acquire(); - if (ret) - return ret; - - card->dev = &pdev->dev; - - ret = snd_soc_register_card(card); - if (ret) { - dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n", - ret); - ep93xx_i2s_release(); - } - - return ret; -} - -static int snappercl15_remove(struct platform_device *pdev) -{ - struct snd_soc_card *card = platform_get_drvdata(pdev); - - snd_soc_unregister_card(card); - ep93xx_i2s_release(); - - return 0; -} - -static struct platform_driver snappercl15_driver = { - .driver = { - .name = "snappercl15-audio", - }, - .probe = snappercl15_probe, - .remove = snappercl15_remove, -}; - -module_platform_driver(snappercl15_driver); - -MODULE_AUTHOR("Ryan Mallon"); -MODULE_DESCRIPTION("ALSA SoC Snapper CL15"); -MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:snappercl15-audio"); -- 2.29.2

2 1

[PATCH 00/17] ARM: remove old board files
by Arnd Bergmann 19 Oct '22

19 Oct '22

From: Arnd Bergmann <arnd(a)arndb.de> This is the first part of the removal of old board files, addressing all the easy cases: cns3xxx and iop32x get removed completely, including a handful of device driversm while ep93xx, dove, mv78xx0, orion, footbridge and omap1 all keep basic platform support but drop support for all boards that have no known users. There are seven patches for other subsystems in this series. It would be helpful to get everything merged in the same release if there are no objections, but I don't care if I include them in the soc tree with an Ack from the subsystem maintainers or the patches are applied directly into the subsystem trees. Arnd Bergmann (17): ARM: at91: remove stale MAINTAINER file entries ARM: cns3xxx: remove entire platform mmc: remove cns3xxx driver ARM: ep93xx: remove old board files ASoC: remove unused ep93xx files ARM: mv78xx0: un-deprecate Terastation WXL ARM: orion: remove unused board files ARM: orion5x: remove dsa_chip_data references ARM: iop32x: remove the platform dmaengine: remove iop-adma driver gpio: remove iop driver ARM: footbridge: remove CATS ARM: omap1: remove unused board files ARM: omap1: remove dead code fbdev: omapfb: remove unused board support spi: remove omap 100K driver mfd: remove htc-i2cpld driver CC: Russell King <linux(a)armlinux.org.uk> CC: Aaro Koskinen <aaro.koskinen(a)iki.fi> CC: Janusz Krzysztofik <jmkrzyszt(a)gmail.com> CC: Tony Lindgren <tony(a)atomide.com> CC: Andrew Lunn <andrew(a)lunn.ch> CC: Sebastian Hesselbarth <sebastian.hesselbarth(a)gmail.com> CC: Gregory Clement <gregory.clement(a)bootlin.com> CC: Hartley Sweeten <hsweeten(a)visionengravers.com> CC: Alexander Sverdlin <alexander.sverdlin(a)gmail.com> CC: Paul Walmsley <paul(a)pwsan.com> CC: Kevin Hilman <khilman(a)kernel.org> CC: Vinod Koul <vkoul(a)kernel.org> CC: Linus Walleij <linus.walleij(a)linaro.org> CC: Bartosz Golaszewski <brgl(a)bgdev.pl> CC: Lee Jones <lee(a)kernel.org> CC: Ulf Hansson <ulf.hansson(a)linaro.org> CC: Mark Brown <broonie(a)kernel.org> CC: Felipe Balbi <balbi(a)kernel.org> CC: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> CC: Alan Stern <stern(a)rowland.harvard.edu> CC: Bin Liu <b-liu(a)ti.com> CC: Helge Deller <deller(a)gmx.de> CC: Wim Van Sebroeck <wim(a)linux-watchdog.org> CC: Guenter Roeck <linux(a)roeck-us.net> CC: Liam Girdwood <lgirdwood(a)gmail.com> CC: Jaroslav Kysela <perex(a)perex.cz> CC: Takashi Iwai <tiwai(a)suse.com> Cc: Hubert Feurstein <hubert.feurstein(a)contec.at> Cc: Krzysztof Halasa <khalasa(a)piap.pl> Cc: Lennert Buytenhek <kernel(a)wantstofly.org> Cc: Sergey Lapin <slapin(a)ossfans.org> CC: Krzysztof Kozlowski <krzysztof.kozlowski(a)linaro.org> CC: Dan Williams <dan.j.williams(a)intel.com> CC: "Pali Rohár" <pali(a)kernel.org> CC: linux-kernel(a)vger.kernel.org CC: linux-arm-kernel(a)lists.infradead.org CC: linux-omap(a)vger.kernel.org CC: linux-usb(a)vger.kernel.org CC: dmaengine(a)vger.kernel.org CC: linux-gpio(a)vger.kernel.org CC: linux-i2c(a)vger.kernel.org CC: linux-mmc(a)vger.kernel.org CC: linux-spi(a)vger.kernel.org CC: linux-fbdev(a)vger.kernel.org CC: dri-devel(a)lists.freedesktop.org CC: linux-watchdog(a)vger.kernel.org CC: alsa-devel(a)alsa-project.org MAINTAINERS | 57 - arch/arm/Kconfig | 6 +- arch/arm/Kconfig.debug | 52 +- arch/arm/Makefile | 2 - arch/arm/boot/compressed/misc-ep93xx.h | 13 +- arch/arm/configs/cns3420vb_defconfig | 63 - arch/arm/configs/iop32x_defconfig | 126 -- arch/arm/configs/mv78xx0_defconfig | 3 - arch/arm/configs/omap1_defconfig | 2 - arch/arm/kernel/entry-common.S | 15 - arch/arm/kernel/head.S | 2 +- arch/arm/mach-cns3xxx/Kconfig | 21 - arch/arm/mach-cns3xxx/Makefile | 6 - arch/arm/mach-cns3xxx/cns3420vb.c | 252 --- arch/arm/mach-cns3xxx/cns3xxx.h | 593 ------- arch/arm/mach-cns3xxx/core.c | 410 ----- arch/arm/mach-cns3xxx/core.h | 32 - arch/arm/mach-cns3xxx/devices.c | 108 -- arch/arm/mach-cns3xxx/devices.h | 17 - arch/arm/mach-cns3xxx/pcie.c | 290 ---- arch/arm/mach-cns3xxx/pm.c | 120 -- arch/arm/mach-cns3xxx/pm.h | 20 - arch/arm/mach-dove/Kconfig | 8 - arch/arm/mach-dove/Makefile | 1 - arch/arm/mach-dove/dove-db-setup.c | 101 -- arch/arm/mach-ep93xx/Kconfig | 63 - arch/arm/mach-ep93xx/Makefile | 5 - arch/arm/mach-ep93xx/adssphere.c | 41 - arch/arm/mach-ep93xx/gesbc9312.c | 41 - arch/arm/mach-ep93xx/micro9.c | 125 -- arch/arm/mach-ep93xx/simone.c | 128 -- arch/arm/mach-ep93xx/snappercl15.c | 162 -- arch/arm/mach-footbridge/Kconfig | 12 - arch/arm/mach-footbridge/Makefile | 2 - arch/arm/mach-footbridge/cats-hw.c | 98 -- arch/arm/mach-footbridge/cats-pci.c | 64 - arch/arm/mach-footbridge/common.c | 3 - arch/arm/mach-iop32x/Kconfig | 54 - arch/arm/mach-iop32x/Makefile | 20 - arch/arm/mach-iop32x/adma.c | 163 -- arch/arm/mach-iop32x/cp6.c | 48 - arch/arm/mach-iop32x/em7210.c | 232 --- arch/arm/mach-iop32x/glantank.c | 214 --- arch/arm/mach-iop32x/glantank.h | 12 - arch/arm/mach-iop32x/gpio-iop32x.h | 11 - arch/arm/mach-iop32x/hardware.h | 38 - arch/arm/mach-iop32x/i2c.c | 92 -- arch/arm/mach-iop32x/iop3xx.h | 326 ---- arch/arm/mach-iop32x/iq31244.c | 333 ---- arch/arm/mach-iop32x/iq31244.h | 16 - arch/arm/mach-iop32x/iq80321.c | 192 --- arch/arm/mach-iop32x/iq80321.h | 16 - arch/arm/mach-iop32x/irq.c | 95 -- arch/arm/mach-iop32x/irqs.h | 48 - arch/arm/mach-iop32x/n2100.c | 367 ----- arch/arm/mach-iop32x/n2100.h | 18 - arch/arm/mach-iop32x/pci.c | 404 ----- arch/arm/mach-iop32x/pmu.c | 29 - arch/arm/mach-iop32x/restart.c | 17 - arch/arm/mach-iop32x/setup.c | 31 - arch/arm/mach-iop32x/time.c | 179 -- arch/arm/mach-mv78xx0/Kconfig | 14 +- arch/arm/mach-mv78xx0/Makefile | 2 - arch/arm/mach-mv78xx0/db78x00-bp-setup.c | 101 -- arch/arm/mach-mv78xx0/rd78x00-masa-setup.c | 86 - arch/arm/mach-omap1/Kconfig | 93 +- arch/arm/mach-omap1/Makefile | 18 - arch/arm/mach-omap1/board-fsample.c | 366 ----- arch/arm/mach-omap1/board-generic.c | 85 - arch/arm/mach-omap1/board-h2-mmc.c | 74 - arch/arm/mach-omap1/board-h2.c | 448 ----- arch/arm/mach-omap1/board-h2.h | 38 - arch/arm/mach-omap1/board-h3-mmc.c | 64 - arch/arm/mach-omap1/board-h3.c | 455 ----- arch/arm/mach-omap1/board-h3.h | 35 - arch/arm/mach-omap1/board-htcherald.c | 585 ------- arch/arm/mach-omap1/board-innovator.c | 481 ------ arch/arm/mach-omap1/board-nand.c | 33 - arch/arm/mach-omap1/board-palmtt.c | 285 ---- arch/arm/mach-omap1/board-palmz71.c | 300 ---- arch/arm/mach-omap1/board-perseus2.c | 333 ---- arch/arm/mach-omap1/clock_data.c | 17 +- arch/arm/mach-omap1/common.h | 8 - arch/arm/mach-omap1/devices.c | 58 +- arch/arm/mach-omap1/dma.c | 25 +- arch/arm/mach-omap1/fpga.c | 186 --- arch/arm/mach-omap1/fpga.h | 49 - arch/arm/mach-omap1/gpio7xx.c | 272 --- arch/arm/mach-omap1/i2c.c | 14 +- arch/arm/mach-omap1/io.c | 24 - arch/arm/mach-omap1/irq.c | 20 +- arch/arm/mach-omap1/irqs.h | 9 - arch/arm/mach-omap1/mcbsp.c | 83 - arch/arm/mach-omap1/mtd-xip.h | 4 - arch/arm/mach-omap1/mux.c | 52 - arch/arm/mach-omap1/pm.c | 76 +- arch/arm/mach-omap1/pm.h | 39 +- arch/arm/mach-omap1/serial.c | 15 - arch/arm/mach-omap1/sleep.S | 80 - arch/arm/mach-omap1/sram-init.c | 7 +- arch/arm/mach-omap1/usb.c | 34 +- arch/arm/mach-orion5x/Kconfig | 59 - arch/arm/mach-orion5x/Makefile | 8 - arch/arm/mach-orion5x/common.c | 10 - arch/arm/mach-orion5x/common.h | 2 - arch/arm/mach-orion5x/db88f5281-setup.c | 376 ----- arch/arm/mach-orion5x/ls_hgl-setup.c | 275 ---- arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c | 172 -- arch/arm/mach-orion5x/rd88f5181l-ge-setup.c | 183 --- arch/arm/mach-orion5x/rd88f5182-setup.c | 288 ---- arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c | 120 -- arch/arm/mach-orion5x/wnr854t-setup.c | 175 -- arch/arm/mach-orion5x/wrt350n-v2-setup.c | 263 --- arch/arm/plat-orion/common.c | 31 - arch/arm/plat-orion/include/plat/common.h | 3 - drivers/dma/Kconfig | 8 - drivers/dma/Makefile | 1 - drivers/dma/iop-adma.c | 1554 ------------------ drivers/dma/iop-adma.h | 914 ---------- drivers/gpio/Kconfig | 10 - drivers/gpio/Makefile | 1 - drivers/gpio/gpio-iop.c | 59 - drivers/i2c/busses/Kconfig | 8 +- drivers/mfd/Kconfig | 11 +- drivers/mfd/Makefile | 1 - drivers/mfd/htc-i2cpld.c | 627 ------- drivers/mmc/host/Kconfig | 13 +- drivers/mmc/host/Makefile | 1 - drivers/mmc/host/sdhci-cns3xxx.c | 113 -- drivers/spi/Kconfig | 6 - drivers/spi/Makefile | 1 - drivers/spi/spi-omap-100k.c | 490 ------ drivers/spi/spi-omap-uwire.c | 16 +- drivers/usb/gadget/udc/Kconfig | 2 +- drivers/usb/gadget/udc/omap_udc.c | 24 +- drivers/usb/host/Kconfig | 25 +- drivers/usb/host/ohci-omap.c | 6 +- drivers/usb/musb/musb_dma.h | 11 +- drivers/usb/phy/phy-isp1301-omap.c | 91 +- drivers/video/fbdev/omap/Kconfig | 9 - drivers/video/fbdev/omap/Makefile | 6 - drivers/video/fbdev/omap/lcd_h3.c | 82 - drivers/video/fbdev/omap/lcd_htcherald.c | 59 - drivers/video/fbdev/omap/lcd_inn1510.c | 69 - drivers/video/fbdev/omap/lcd_inn1610.c | 99 -- drivers/video/fbdev/omap/lcd_palmtt.c | 65 - drivers/video/fbdev/omap/lcd_palmz71.c | 59 - drivers/video/fbdev/omap/lcdc.c | 2 - drivers/watchdog/wdt285.c | 2 - include/linux/htcpld.h | 23 - include/linux/platform_data/leds-omap.h | 19 - include/linux/soc/ti/omap1-soc.h | 35 - sound/soc/cirrus/Kconfig | 23 - sound/soc/cirrus/Makefile | 6 - sound/soc/cirrus/ep93xx-ac97.c | 446 ----- sound/soc/cirrus/simone.c | 86 - sound/soc/cirrus/snappercl15.c | 134 -- 157 files changed, 60 insertions(+), 18109 deletions(-) delete mode 100644 arch/arm/configs/cns3420vb_defconfig delete mode 100644 arch/arm/configs/iop32x_defconfig delete mode 100644 arch/arm/mach-cns3xxx/Kconfig delete mode 100644 arch/arm/mach-cns3xxx/Makefile delete mode 100644 arch/arm/mach-cns3xxx/cns3420vb.c delete mode 100644 arch/arm/mach-cns3xxx/cns3xxx.h delete mode 100644 arch/arm/mach-cns3xxx/core.c delete mode 100644 arch/arm/mach-cns3xxx/core.h delete mode 100644 arch/arm/mach-cns3xxx/devices.c delete mode 100644 arch/arm/mach-cns3xxx/devices.h delete mode 100644 arch/arm/mach-cns3xxx/pcie.c delete mode 100644 arch/arm/mach-cns3xxx/pm.c delete mode 100644 arch/arm/mach-cns3xxx/pm.h delete mode 100644 arch/arm/mach-dove/dove-db-setup.c delete mode 100644 arch/arm/mach-ep93xx/adssphere.c delete mode 100644 arch/arm/mach-ep93xx/gesbc9312.c delete mode 100644 arch/arm/mach-ep93xx/micro9.c delete mode 100644 arch/arm/mach-ep93xx/simone.c delete mode 100644 arch/arm/mach-ep93xx/snappercl15.c delete mode 100644 arch/arm/mach-footbridge/cats-hw.c delete mode 100644 arch/arm/mach-footbridge/cats-pci.c delete mode 100644 arch/arm/mach-iop32x/Kconfig delete mode 100644 arch/arm/mach-iop32x/Makefile delete mode 100644 arch/arm/mach-iop32x/adma.c delete mode 100644 arch/arm/mach-iop32x/cp6.c delete mode 100644 arch/arm/mach-iop32x/em7210.c delete mode 100644 arch/arm/mach-iop32x/glantank.c delete mode 100644 arch/arm/mach-iop32x/glantank.h delete mode 100644 arch/arm/mach-iop32x/gpio-iop32x.h delete mode 100644 arch/arm/mach-iop32x/hardware.h delete mode 100644 arch/arm/mach-iop32x/i2c.c delete mode 100644 arch/arm/mach-iop32x/iop3xx.h delete mode 100644 arch/arm/mach-iop32x/iq31244.c delete mode 100644 arch/arm/mach-iop32x/iq31244.h delete mode 100644 arch/arm/mach-iop32x/iq80321.c delete mode 100644 arch/arm/mach-iop32x/iq80321.h delete mode 100644 arch/arm/mach-iop32x/irq.c delete mode 100644 arch/arm/mach-iop32x/irqs.h delete mode 100644 arch/arm/mach-iop32x/n2100.c delete mode 100644 arch/arm/mach-iop32x/n2100.h delete mode 100644 arch/arm/mach-iop32x/pci.c delete mode 100644 arch/arm/mach-iop32x/pmu.c delete mode 100644 arch/arm/mach-iop32x/restart.c delete mode 100644 arch/arm/mach-iop32x/setup.c delete mode 100644 arch/arm/mach-iop32x/time.c delete mode 100644 arch/arm/mach-mv78xx0/db78x00-bp-setup.c delete mode 100644 arch/arm/mach-mv78xx0/rd78x00-masa-setup.c delete mode 100644 arch/arm/mach-omap1/board-fsample.c delete mode 100644 arch/arm/mach-omap1/board-generic.c delete mode 100644 arch/arm/mach-omap1/board-h2-mmc.c delete mode 100644 arch/arm/mach-omap1/board-h2.c delete mode 100644 arch/arm/mach-omap1/board-h2.h delete mode 100644 arch/arm/mach-omap1/board-h3-mmc.c delete mode 100644 arch/arm/mach-omap1/board-h3.c delete mode 100644 arch/arm/mach-omap1/board-h3.h delete mode 100644 arch/arm/mach-omap1/board-htcherald.c delete mode 100644 arch/arm/mach-omap1/board-innovator.c delete mode 100644 arch/arm/mach-omap1/board-nand.c delete mode 100644 arch/arm/mach-omap1/board-palmtt.c delete mode 100644 arch/arm/mach-omap1/board-palmz71.c delete mode 100644 arch/arm/mach-omap1/board-perseus2.c delete mode 100644 arch/arm/mach-omap1/fpga.c delete mode 100644 arch/arm/mach-omap1/fpga.h delete mode 100644 arch/arm/mach-omap1/gpio7xx.c delete mode 100644 arch/arm/mach-orion5x/db88f5281-setup.c delete mode 100644 arch/arm/mach-orion5x/ls_hgl-setup.c delete mode 100644 arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c delete mode 100644 arch/arm/mach-orion5x/rd88f5181l-ge-setup.c delete mode 100644 arch/arm/mach-orion5x/rd88f5182-setup.c delete mode 100644 arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c delete mode 100644 arch/arm/mach-orion5x/wnr854t-setup.c delete mode 100644 arch/arm/mach-orion5x/wrt350n-v2-setup.c delete mode 100644 drivers/dma/iop-adma.c delete mode 100644 drivers/dma/iop-adma.h delete mode 100644 drivers/gpio/gpio-iop.c delete mode 100644 drivers/mfd/htc-i2cpld.c delete mode 100644 drivers/mmc/host/sdhci-cns3xxx.c delete mode 100644 drivers/spi/spi-omap-100k.c delete mode 100644 drivers/video/fbdev/omap/lcd_h3.c delete mode 100644 drivers/video/fbdev/omap/lcd_htcherald.c delete mode 100644 drivers/video/fbdev/omap/lcd_inn1510.c delete mode 100644 drivers/video/fbdev/omap/lcd_inn1610.c delete mode 100644 drivers/video/fbdev/omap/lcd_palmtt.c delete mode 100644 drivers/video/fbdev/omap/lcd_palmz71.c delete mode 100644 include/linux/htcpld.h delete mode 100644 include/linux/platform_data/leds-omap.h delete mode 100644 sound/soc/cirrus/ep93xx-ac97.c delete mode 100644 sound/soc/cirrus/simone.c delete mode 100644 sound/soc/cirrus/snappercl15.c -- 2.29.2

1 0

[PATCH v2 00/11] ASoC: soc-dapm.c random cleanups
by Kuninori Morimoto 19 Oct '22

19 Oct '22

Hi Mark These are v2 of random cleanup for soc-dpam.c/h. Basically, these are just cleanup, nothing changed. v1 https://lore.kernel.org/r/8735bmqazf.wl-kuninori.morimoto.gx@renesas.com v1 -> v2 - add "break;" on default Kuninori Morimoto (11): ASoC: soc-dapm.c: replace snd_soc_dapm_wcache to snd_soc_dapm_widget ASoC: soc-dapm.c: tidyup error handling on snd_soc_dapm_add_route() ASoC: soc-dapm.c: remove no meaning variable from snd_soc_dapm_add_path() ASoC: soc-dapm.c: ignore parameter NULL at snd_soc_dapm_free_widget() ASoC: soc-dapm.c: cleanup dapm_widget_set_power() ASoC: soc-dapm.c: merge dapm_power_one_widget() and dapm_widget_set_power() ASoC: soc-dapm.c: cleanup snd_soc_dapm_new_dai() ASoC: soc-dapm.c: numerical order for dapm_up_seq ASoC: soc-dapm.h: cleanup white space ASoC: soc-dapm.h: fixup comment for snd_soc_dapm_widget_for_each_path() ASoC: soc-dpcm.h: remove snd_soc_dpcm::hw_param include/sound/soc-dapm.h | 188 +++++++++++++++---------------------- include/sound/soc-dpcm.h | 2 - sound/soc/codecs/hda.c | 6 +- sound/soc/intel/avs/pcm.c | 6 +- sound/soc/sh/rcar/core.c | 3 +- sound/soc/soc-dapm.c | 190 ++++++++++++++++---------------------- sound/soc/soc-pcm.c | 12 ++- 7 files changed, 171 insertions(+), 236 deletions(-) -- 2.25.1

3 13

[PATCH 00/11] ASoC: soc-dapm.c random cleanups
by Kuninori Morimoto 19 Oct '22

19 Oct '22

Hi Mark These are random cleanup for soc-dpam.c/h. Basically, these are just cleanup, nothing changed. Kuninori Morimoto (11): ASoC: soc-dapm.c: replace snd_soc_dapm_wcache to snd_soc_dapm_widget ASoC: soc-dapm.c: tidyup error handling on snd_soc_dapm_add_route() ASoC: soc-dapm.c: remove no meaning variable from snd_soc_dapm_add_path() ASoC: soc-dapm.c: ignore parameter NULL at snd_soc_dapm_free_widget() ASoC: soc-dapm.c: cleanup dapm_widget_set_power() ASoC: soc-dapm.c: merge dapm_power_one_widget() and dapm_widget_set_power() ASoC: soc-dapm.c: cleanup snd_soc_dapm_new_dai() ASoC: soc-dapm.c: numerical order for dapm_up_seq ASoC: soc-dapm.h: cleanup white space ASoC: soc-dapm.h: fixup comment for snd_soc_dapm_widget_for_each_path() ASoC: soc-dpcm.h: remove snd_soc_dpcm::hw_param include/sound/soc-dapm.h | 188 +++++++++++++++---------------------- include/sound/soc-dpcm.h | 2 - sound/soc/codecs/hda.c | 6 +- sound/soc/intel/avs/pcm.c | 6 +- sound/soc/sh/rcar/core.c | 3 +- sound/soc/soc-dapm.c | 189 ++++++++++++++++---------------------- sound/soc/soc-pcm.c | 12 ++- 7 files changed, 170 insertions(+), 236 deletions(-) -- 2.25.1 Thank you for your help !! Best regards --- Kuninori Morimoto

3 15

[PATCH 0/4] ASoC: SOF: Intel: Harden the IPC4 low level sequencing
by Peter Ujfalusi 19 Oct '22

19 Oct '22

Hi, The IPC4 use of doorbell registers leaves some corner cases not well defined and the 'correct sequences' are subjective in a sense. The DSP doorbell registers are used as separate and independent channels and the sequences for host -> DSP -> host (reply) can be racy. For example: The ACKing of a received message can happen before the firmware sends the reply or it can as well happen after the reply has been sent and received by the host. Both can be considered 'correct sequences' but they need different handling. This series will allow the kernel to service any interpretation of the sequencing on the firmware side. Regards, Peter --- Peter Ujfalusi (4): ASoC: SOF: ipc4: Log the tx message before sending it ASoC: SOF: Intel: ipc4: Read the interrupt reason registers at the same time ASoC: SOF: Intel: ipc4: Wait for channel to be free before sending a message ASoC: SOF: Intel: ipc4: Ack a received reply or notification separately sound/soc/sof/intel/cnl.c | 26 ++++++++++++++++++++++---- sound/soc/sof/intel/hda-ipc.c | 27 +++++++++++++++++++++++---- sound/soc/sof/intel/hda.c | 11 +++++++++++ sound/soc/sof/intel/hda.h | 9 +++++++++ sound/soc/sof/intel/mtl.c | 24 +++++++++++++++++++++--- sound/soc/sof/ipc4.c | 4 ++-- 6 files changed, 88 insertions(+), 13 deletions(-) -- 2.38.0

2 5

[PATCH -next] ASoC: soc-component: using pm_runtime_resume_and_get instead of pm_runtime_get_sync
by Zhang Qilong 19 Oct '22

19 Oct '22

Using the newest pm_runtime_resume_and_get is more appropriate for simplifing code here. Signed-off-by: Zhang Qilong <zhangqilong3(a)huawei.com> --- sound/soc/soc-component.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/sound/soc/soc-component.c b/sound/soc/soc-component.c index e12f8244242b..659b9ade4158 100644 --- a/sound/soc/soc-component.c +++ b/sound/soc/soc-component.c @@ -1213,11 +1213,9 @@ int snd_soc_pcm_component_pm_runtime_get(struct snd_soc_pcm_runtime *rtd, int i; for_each_rtd_components(rtd, i, component) { - int ret = pm_runtime_get_sync(component->dev); - if (ret < 0 && ret != -EACCES) { - pm_runtime_put_noidle(component->dev); + int ret = pm_runtime_resume_and_get(component->dev); + if (ret < 0 && ret != -EACCES) return soc_component_ret(component, ret); - } /* mark stream if succeeded */ soc_component_mark_push(component, stream, pm); } -- 2.25.1

4 4

[PATCH] soundwire: dmi-quirks: add quirk variant for LAPBC710 NUC15
by Bard Liao 19 Oct '22

19 Oct '22

From: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Some NUC15 LAPBC710 devices don't expose the same DMI information as the Intel reference, add additional entry in the match table. BugLink: https://github.com/thesofproject/linux/issues/3885 Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan(a)linux.intel.com> Signed-off-by: Bard Liao <yung-chuan.liao(a)linux.intel.com> --- drivers/soundwire/dmi-quirks.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/soundwire/dmi-quirks.c b/drivers/soundwire/dmi-quirks.c index f81cdd83ec26..7969881f126d 100644 --- a/drivers/soundwire/dmi-quirks.c +++ b/drivers/soundwire/dmi-quirks.c @@ -90,6 +90,14 @@ static const struct dmi_system_id adr_remap_quirk_table[] = { }, .driver_data = (void *)intel_tgl_bios, }, + { + /* quirk used for NUC15 LAPBC710 skew */ + .matches = { + DMI_MATCH(DMI_BOARD_VENDOR, "Intel Corporation"), + DMI_MATCH(DMI_BOARD_NAME, "LAPBC710"), + }, + .driver_data = (void *)intel_tgl_bios, + }, { .matches = { DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc"), -- 2.25.1

2 1

[PATCH] ASoC: SOF: ipc4-mtrace: protect per-core nodes against multiple open
by Peter Ujfalusi 19 Oct '22

19 Oct '22

From: Kai Vehmanen <kai.vehmanen(a)linux.intel.com> Add protection against multiple open of the mtrace/coreN debugfs nodes. This is not supported in the implementation, and this will show up as unexpected behaviour of the interface, and potential use of already freed memory. Fixes: f4ea22f7aa75 ("ASoC: SOF: ipc4: Add support for mtrace log extraction") Signed-off-by: Kai Vehmanen <kai.vehmanen(a)linux.intel.com> Reviewed-by: Péter Ujfalusi <peter.ujfalusi(a)linux.intel.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan(a)linux.intel.com> --- sound/soc/sof/ipc4-mtrace.c | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/sound/soc/sof/ipc4-mtrace.c b/sound/soc/sof/ipc4-mtrace.c index 9c7080041d08..70dea8ae706e 100644 --- a/sound/soc/sof/ipc4-mtrace.c +++ b/sound/soc/sof/ipc4-mtrace.c @@ -108,6 +108,7 @@ struct sof_mtrace_core_data { int id; u32 slot_offset; void *log_buffer; + struct mutex buffer_lock; /* for log_buffer alloc/free */ u32 host_read_ptr; u32 dsp_write_ptr; /* pos update IPC arrived before the slot offset is known, queried */ @@ -128,14 +129,22 @@ static int sof_ipc4_mtrace_dfs_open(struct inode *inode, struct file *file) struct sof_mtrace_core_data *core_data = inode->i_private; int ret; + mutex_lock(&core_data->buffer_lock); + + if (core_data->log_buffer) { + ret = -EBUSY; + goto out; + } + ret = debugfs_file_get(file->f_path.dentry); if (unlikely(ret)) - return ret; + goto out; core_data->log_buffer = kmalloc(SOF_MTRACE_SLOT_SIZE, GFP_KERNEL); if (!core_data->log_buffer) { debugfs_file_put(file->f_path.dentry); - return -ENOMEM; + ret = -ENOMEM; + goto out; } ret = simple_open(inode, file); @@ -144,6 +153,9 @@ static int sof_ipc4_mtrace_dfs_open(struct inode *inode, struct file *file) debugfs_file_put(file->f_path.dentry); } +out: + mutex_unlock(&core_data->buffer_lock); + return ret; } @@ -280,7 +292,10 @@ static int sof_ipc4_mtrace_dfs_release(struct inode *inode, struct file *file) debugfs_file_put(file->f_path.dentry); + mutex_lock(&core_data->buffer_lock); kfree(core_data->log_buffer); + core_data->log_buffer = NULL; + mutex_unlock(&core_data->buffer_lock); return 0; } @@ -563,6 +578,7 @@ static int ipc4_mtrace_init(struct snd_sof_dev *sdev) struct sof_mtrace_core_data *core_data = &priv->cores[i]; init_waitqueue_head(&core_data->trace_sleep); + mutex_init(&core_data->buffer_lock); core_data->sdev = sdev; core_data->id = i; } -- 2.38.0

2 1

[PATCH v2] ASoC: Intel: sof_rt5682: Add quirk for Rex board
by Pierre-Louis Bossart 19 Oct '22

19 Oct '22

From: Yong Zhi <yong.zhi(a)intel.com> Add mtl_mx98357_rt5682 driver data for Chrome Rex board support. Reviewed-by: Bard Liao <yung-chuan.liao(a)linux.intel.com> Reviewed-by: Curtis Malainey <cujomalainey(a)chromium.org> Signed-off-by: Yong Zhi <yong.zhi(a)intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> --- v2: added my Signed-off-by this time. sound/soc/intel/boards/sof_rt5682.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/sound/soc/intel/boards/sof_rt5682.c b/sound/soc/intel/boards/sof_rt5682.c index 1bf9455eaf935..adc964d363a29 100644 --- a/sound/soc/intel/boards/sof_rt5682.c +++ b/sound/soc/intel/boards/sof_rt5682.c @@ -225,6 +225,18 @@ static const struct dmi_system_id sof_rt5682_quirk_table[] = { SOF_RT5682_SSP_AMP(2) | SOF_RT5682_NUM_HDMIDEV(4)), }, + { + .callback = sof_rt5682_quirk_cb, + .matches = { + DMI_MATCH(DMI_PRODUCT_FAMILY, "Google_Rex"), + }, + .driver_data = (void *)(SOF_RT5682_MCLK_EN | + SOF_RT5682_SSP_CODEC(2) | + SOF_SPEAKER_AMP_PRESENT | + SOF_RT5682_SSP_AMP(0) | + SOF_RT5682_NUM_HDMIDEV(4) + ), + }, {} }; -- 2.34.1

2 1

[PATCH] ASoC: Intel: sof_rt5682: Add quirk for Rex board
by Pierre-Louis Bossart 19 Oct '22

19 Oct '22

From: Yong Zhi <yong.zhi(a)intel.com> Add mtl_mx98357_rt5682 driver data for Chrome Rex board support. Signed-off-by: Yong Zhi <yong.zhi(a)intel.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Reviewed-by: Bard Liao <yung-chuan.liao(a)linux.intel.com> Reviewed-by: Curtis Malainey <cujomalainey(a)chromium.org> --- sound/soc/intel/boards/sof_rt5682.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/sound/soc/intel/boards/sof_rt5682.c b/sound/soc/intel/boards/sof_rt5682.c index 1bf9455eaf935..adc964d363a29 100644 --- a/sound/soc/intel/boards/sof_rt5682.c +++ b/sound/soc/intel/boards/sof_rt5682.c @@ -225,6 +225,18 @@ static const struct dmi_system_id sof_rt5682_quirk_table[] = { SOF_RT5682_SSP_AMP(2) | SOF_RT5682_NUM_HDMIDEV(4)), }, + { + .callback = sof_rt5682_quirk_cb, + .matches = { + DMI_MATCH(DMI_PRODUCT_FAMILY, "Google_Rex"), + }, + .driver_data = (void *)(SOF_RT5682_MCLK_EN | + SOF_RT5682_SSP_CODEC(2) | + SOF_SPEAKER_AMP_PRESENT | + SOF_RT5682_SSP_AMP(0) | + SOF_RT5682_NUM_HDMIDEV(4) + ), + }, {} }; -- 2.34.1

2 2

[PATCH] ASoC: Intel: sof_sdw: add quirk variant for LAPBC710 NUC15
by Pierre-Louis Bossart 19 Oct '22

19 Oct '22

Some NUC15 LAPBC710 devices don't expose the same DMI information as the Intel reference, add additional entry in the match table. BugLink: https://github.com/thesofproject/linux/issues/3885 Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan(a)linux.intel.com> Reviewed-by: Bard Liao <yung-chuan.liao(a)linux.intel.com> --- sound/soc/intel/boards/sof_sdw.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/sound/soc/intel/boards/sof_sdw.c b/sound/soc/intel/boards/sof_sdw.c index 2ff30b40a1e4c..ee9857dc3135d 100644 --- a/sound/soc/intel/boards/sof_sdw.c +++ b/sound/soc/intel/boards/sof_sdw.c @@ -202,6 +202,17 @@ static const struct dmi_system_id sof_sdw_quirk_table[] = { SOF_SDW_PCH_DMIC | RT711_JD1), }, + { + /* NUC15 LAPBC710 skews */ + .callback = sof_sdw_quirk_cb, + .matches = { + DMI_MATCH(DMI_BOARD_VENDOR, "Intel Corporation"), + DMI_MATCH(DMI_BOARD_NAME, "LAPBC710"), + }, + .driver_data = (void *)(SOF_SDW_TGL_HDMI | + SOF_SDW_PCH_DMIC | + RT711_JD1), + }, /* TigerLake-SDCA devices */ { .callback = sof_sdw_quirk_cb, -- 2.34.1

2 1

[PATCH] ASoC: SOF: Intel: pci-mtl: fix firmware name
by Pierre-Louis Bossart 19 Oct '22

19 Oct '22

Initial IPC4 tests used the same conventions as previous reference closed-source firmware, but for MeteorLake the convention is the same as previous SOF releases (sof-<platform>.ri). Only the prefix changes to avoid confusions between IPC types. This change has no impact on users since the firmware has not yet been released. Fixes: 064520e8aeaa2 ("ASoC: SOF: Intel: Add support for MeteorLake (MTL)") Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Reviewed-by: Chao Song <chao.song(a)intel.com> Reviewed-by: Kai Vehmanen <kai.vehmanen(a)linux.intel.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan(a)linux.intel.com> --- sound/soc/sof/intel/pci-mtl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/sof/intel/pci-mtl.c b/sound/soc/sof/intel/pci-mtl.c index 899b00d53d64f..9f39da984e9fa 100644 --- a/sound/soc/sof/intel/pci-mtl.c +++ b/sound/soc/sof/intel/pci-mtl.c @@ -38,7 +38,7 @@ static const struct sof_dev_desc mtl_desc = { [SOF_INTEL_IPC4] = "intel/sof-ace-tplg", }, .default_fw_filename = { - [SOF_INTEL_IPC4] = "dsp_basefw.bin", + [SOF_INTEL_IPC4] = "sof-mtl.ri", }, .nocodec_tplg_filename = "sof-mtl-nocodec.tplg", .ops = &sof_mtl_ops, -- 2.34.1

2 1

[PATCH 00/19] ASoC: SOF: Intel/IPC4: Support for external firmware libraries
by Peter Ujfalusi 19 Oct '22

19 Oct '22

Hi, In IPC4 all DSP loadable executable is a 'library' containing modules. The main or basefw is also a library which contains multiple modules. IPC4 allows to use loadable libraries to extend the functionality of the booted basefw. This series adds support for loading external libraries in case they are needed by the loaded topology file. The libraries must be placed to a specific firmware directory (fw_lib_prefix), which is: intel/avs-lib|sof-ipc4-lib/ followed by the platform name and in case of community key use a 'community' directory. For example for upx-i11 (community key): intel/avs-lib/tgl/community is the default path. The name of the library should be the UUID of the module it contains since the library loading is going to look for the file as <module_UUID>.bin In case there is a need to bundle multiple modules into single library, symlinks can be used to point to the file: module_boundle.bin <UUID1>.bin -> module_boundle.bin <UUID2>.bin -> module_boundle.bin <UUID3>.bin -> module_boundle.bin But note that in this case all modules will be loaded to the DSP since only the whole library can be loaded, not individual modules. Regards, Peter --- Peter Ujfalusi (18): ASoC: SOF: Introduce container struct for SOF firmware ASoC: SOF: amd: Use the basefw firmware container directly ASoC: SOF: Intel: hda-loader: Use the basefw firmware container directly ASoC: SOF: Intel: hda-loader-skl: Use the basefw firmware container directly ASoC: SOF: Drop the firmware and fw_offset from snd_sof_pdata ASoC: SOF: ipc: ops: Add support for optional init and exit callbacks ASoC: SOF: ipc4-loader: Save the maximum number of libraries supported ASoC: SOF: ipc4: Convert the firmware handling (loader) to library convention ASoC: SOF: IPC4: Add helper for looking up module by UUID ASoC: SOF: Add path definition for external firmware libraries ASoC: SOF: Intel: Set the default firmware library path for IPC4 ASoC: SOF: ipc4: Define platform dependent library loading callback ASoC: SOF: Intel: hda: Add flag to indicate that the firmware is IMR booted ASoC: SOF: Intel: Add ipc4 library loading implementation ASoC: SOF: loader: Add support for IPC dependent post firmware boot ops ASoC: SOF: ipc4: Stop using the query_fw_configuration fw_loader ops ASoC: SOF: loader: Remove the query_fw_configuration ops ASoC: SOF: ipc4-loader: Support for loading external libraries Ranjani Sridharan (1): ASoC: SOF: loader: Set complete state before post_fw_run op include/sound/sof.h | 10 +- include/sound/sof/ipc4/header.h | 4 + sound/soc/sof/amd/acp-loader.c | 6 +- sound/soc/sof/intel/apl.c | 3 + sound/soc/sof/intel/cnl.c | 3 + sound/soc/sof/intel/hda-loader-skl.c | 7 +- sound/soc/sof/intel/hda-loader.c | 83 +++++++++- sound/soc/sof/intel/hda.h | 4 + sound/soc/sof/intel/icl.c | 3 + sound/soc/sof/intel/mtl.c | 3 + sound/soc/sof/intel/pci-apl.c | 6 + sound/soc/sof/intel/pci-cnl.c | 9 ++ sound/soc/sof/intel/pci-icl.c | 6 + sound/soc/sof/intel/pci-mtl.c | 3 + sound/soc/sof/intel/pci-tgl.c | 21 +++ sound/soc/sof/intel/tgl.c | 3 + sound/soc/sof/ipc.c | 6 + sound/soc/sof/ipc3-loader.c | 26 ++- sound/soc/sof/ipc4-loader.c | 233 ++++++++++++++++++++++++--- sound/soc/sof/ipc4-priv.h | 65 ++++++-- sound/soc/sof/ipc4-topology.c | 17 +- sound/soc/sof/ipc4.c | 41 +++++ sound/soc/sof/loader.c | 25 ++- sound/soc/sof/sof-pci-dev.c | 26 +++ sound/soc/sof/sof-priv.h | 27 +++- 25 files changed, 540 insertions(+), 100 deletions(-) -- 2.38.0

4 28

[PATCH] ASOC: amd: acp: Add TDM slots setting support for ACP I2S controller
by Venkata Prasad Potturu 19 Oct '22

19 Oct '22

Modify set tdm slot function to set ACP I2S controller slots in tdm mode based on number of slots. Signed-off-by: Venkata Prasad Potturu <venkataprasad.potturu(a)amd.com> --- sound/soc/amd/acp/acp-i2s.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/sound/soc/amd/acp/acp-i2s.c b/sound/soc/amd/acp/acp-i2s.c index ac416572db0d..09b6511c0a26 100644 --- a/sound/soc/amd/acp/acp-i2s.c +++ b/sound/soc/amd/acp/acp-i2s.c @@ -51,7 +51,7 @@ static int acp_i2s_set_tdm_slot(struct snd_soc_dai *dai, u32 tx_mask, u32 rx_mas struct device *dev = dai->component->dev; struct acp_dev_data *adata = snd_soc_dai_get_drvdata(dai); struct acp_stream *stream; - int slot_len; + int slot_len, no_of_slots; switch (slot_width) { case SLOT_WIDTH_8: @@ -71,6 +71,20 @@ static int acp_i2s_set_tdm_slot(struct snd_soc_dai *dai, u32 tx_mask, u32 rx_mas return -EINVAL; } + switch (slots) { + case 1 ... 7: + no_of_slots = slots; + break; + case 8: + no_of_slots = 0; + break; + default: + dev_err(dev, "Unsupported slots %d\n", slots); + return -EINVAL; + } + + slots = no_of_slots; + spin_lock_irq(&adata->acp_lock); list_for_each_entry(stream, &adata->stream_list, list) { if (tx_mask && stream->dir == SNDRV_PCM_STREAM_PLAYBACK) -- 2.25.1

2 1

[PATCH] ASoC: twl4030: make read-only array ramp_base static const
by Colin Ian King 19 Oct '22

19 Oct '22

Don't populate the read-only array ramp_base on the stack but instead make it static const. Also makes the object code a little smaller. Signed-off-by: Colin Ian King <colin.i.king(a)gmail.com> --- sound/soc/codecs/twl4030.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/twl4030.c b/sound/soc/codecs/twl4030.c index e48768233e20..9c50ac356c89 100644 --- a/sound/soc/codecs/twl4030.c +++ b/sound/soc/codecs/twl4030.c @@ -700,8 +700,10 @@ static void headset_ramp(struct snd_soc_component *component, int ramp) struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component); struct twl4030_board_params *board_params = twl4030->board_params; /* Base values for ramp delay calculation: 2^19 - 2^26 */ - unsigned int ramp_base[] = {524288, 1048576, 2097152, 4194304, - 8388608, 16777216, 33554432, 67108864}; + static const unsigned int ramp_base[] = { + 524288, 1048576, 2097152, 4194304, + 8388608, 16777216, 33554432, 67108864 + }; unsigned int delay; hs_gain = twl4030_read(component, TWL4030_REG_HS_GAIN_SET); -- 2.37.3

2 1

[PATCH 0/3] ASoC: Intel/SOF: simplify S3 resume flows
by Pierre-Louis Bossart 19 Oct '22

19 Oct '22

All Intel drivers for cAVS platforms contain a sequence for S3 resume which doesn't seem justified nor necessary. Forensic Git investigation in internal repositories did not provide any rationale for the implementation, and tests show no impact when those sequences are removed. This sequence was identified as problematic during a large HDaudio cleanup where all programming sequences were revisited before extensions are added. Pierre-Louis Bossart (3): ASoC: Intel: Skylake: simplify S3 resume flows ASoC: Intel: avs: simplify S3 resume flows ASoC: SOF: Intel: hda-dsp: simplify S3 resume flows sound/soc/intel/avs/core.c | 11 ----------- sound/soc/intel/skylake/skl.c | 9 --------- sound/soc/sof/intel/hda-dsp.c | 14 -------------- 3 files changed, 34 deletions(-) -- 2.34.1

3 5

[PATCH] ASoC: SOF: ipc3: Log the tx message before sending it
by Peter Ujfalusi 19 Oct '22

19 Oct '22

It makes more sense to log the message before it is sent to the DSP. Signed-off-by: Peter Ujfalusi <peter.ujfalusi(a)linux.intel.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan(a)linux.intel.com> Reviewed-by: Bard Liao <yung-chuan.liao(a)linux.intel.com> --- sound/soc/sof/ipc3.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/sof/ipc3.c b/sound/soc/sof/ipc3.c index b28af3a48b70..1fef4dcc0936 100644 --- a/sound/soc/sof/ipc3.c +++ b/sound/soc/sof/ipc3.c @@ -329,6 +329,8 @@ static int ipc3_tx_msg_unlocked(struct snd_sof_ipc *ipc, struct snd_sof_dev *sdev = ipc->sdev; int ret; + ipc3_log_header(sdev->dev, "ipc tx", hdr->cmd); + ret = sof_ipc_send_msg(sdev, msg_data, msg_bytes, reply_bytes); if (ret) { @@ -338,8 +340,6 @@ static int ipc3_tx_msg_unlocked(struct snd_sof_ipc *ipc, return ret; } - ipc3_log_header(sdev->dev, "ipc tx", hdr->cmd); - /* now wait for completion */ return ipc3_wait_tx_done(ipc, reply_data); } -- 2.38.0

2 1

[PATCH][next][V2] ASoC: codecs: jz4725b: Fix spelling mistake "Sourc" -> "Source", "Routee" -> "Route"
by Colin Ian King 19 Oct '22

19 Oct '22

There are two spelling mistakes in codec routing description. Fix it. Signed-off-by: Colin Ian King <colin.i.king(a)gmail.com> --- V2: Fix "Routee" -> "Route" too --- sound/soc/codecs/jz4725b.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/jz4725b.c b/sound/soc/codecs/jz4725b.c index 685ba1d3a644..64b14b1c74b9 100644 --- a/sound/soc/codecs/jz4725b.c +++ b/sound/soc/codecs/jz4725b.c @@ -359,7 +359,7 @@ static const struct snd_soc_dapm_route jz4725b_codec_dapm_routes[] = { {"Mixer to ADC", NULL, "Mixer"}, {"ADC Source Capture Route", "Mixer", "Mixer to ADC"}, - {"ADC Sourc Capture Routee", "Line In", "Line In"}, + {"ADC Source Capture Route", "Line In", "Line In"}, {"ADC Source Capture Route", "Mic 1", "Mic 1"}, {"ADC Source Capture Route", "Mic 2", "Mic 2"}, {"ADC", NULL, "ADC Source Capture Route"}, -- 2.37.3

5 7

[PATCH][next] ASoC: codecs: jz4725b: Fix spelling mistake "Sourc" -> "Source"
by Colin Ian King 19 Oct '22

19 Oct '22

There is a spelling mistake in codec routing description. Fix it. Signed-off-by: Colin Ian King <colin.i.king(a)gmail.com> --- sound/soc/codecs/jz4725b.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/jz4725b.c b/sound/soc/codecs/jz4725b.c index 685ba1d3a644..64b14b1c74b9 100644 --- a/sound/soc/codecs/jz4725b.c +++ b/sound/soc/codecs/jz4725b.c @@ -359,7 +359,7 @@ static const struct snd_soc_dapm_route jz4725b_codec_dapm_routes[] = { {"Mixer to ADC", NULL, "Mixer"}, {"ADC Source Capture Route", "Mixer", "Mixer to ADC"}, - {"ADC Sourc Capture Routee", "Line In", "Line In"}, + {"ADC Source Capture Routee", "Line In", "Line In"}, {"ADC Source Capture Route", "Mic 1", "Mic 1"}, {"ADC Source Capture Route", "Mic 2", "Mic 2"}, {"ADC", NULL, "ADC Source Capture Route"}, -- 2.37.3

2 1

[PATCH] ASoC: sun50i-dmic: avoid unused variable warning for sun50i_dmic_of_match
by Ban Tao 19 Oct '22

19 Oct '22

In configurations with CONFIG_OF=n, we get a harmless build warning: sound/soc/sunxi/sun50i-dmic.c:268:34: warning: unused variable 'sun50i_dmic_of_match' [-Wunused-const-variable] Signed-off-by: Ban Tao <fengzheng923(a)gmail.com> Reported-by: kernel test robot <lkp(a)intel.com> --- sound/soc/sunxi/sun50i-dmic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/sunxi/sun50i-dmic.c b/sound/soc/sunxi/sun50i-dmic.c index 86cff5a..62509cb 100644 --- a/sound/soc/sunxi/sun50i-dmic.c +++ b/sound/soc/sunxi/sun50i-dmic.c @@ -391,7 +391,7 @@ static const struct dev_pm_ops sun50i_dmic_pm = { static struct platform_driver sun50i_dmic_driver = { .driver = { .name = "sun50i-dmic", - .of_match_table = of_match_ptr(sun50i_dmic_of_match), + .of_match_table = sun50i_dmic_of_match, .pm = &sun50i_dmic_pm, }, .probe = sun50i_dmic_probe, -- 2.7.4

2 1

[PATCH v1] ASoC: simple-card: Fix up checks for HW param fixups
by Aidan MacDonald 19 Oct '22

19 Oct '22

The "convert-xxx" properties only have an effect for DPCM DAI links. A DAI link is only created as DPCM if the device tree requires it; part of this involves checking for the use of "convert-xxx" properties. When the convert-sample-format property was added, the checks got out of sync. A DAI link that specified only convert-sample-format but did not pass any of the other DPCM checks would not go into DPCM mode and the convert-sample-format property would be silently ignored. Fix this by adding a function to do the "convert-xxx" property checks, instead of open-coding it in simple-card and audio-graph-card. And add "convert-sample-format" to the check function so that DAI links using it will be initialized correctly. Fixes: 047a05366f4b ("ASoC: simple-card-utils: Fixup DAI sample format") Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0(a)gmail.com> --- include/sound/simple_card_utils.h | 1 + sound/soc/generic/audio-graph-card.c | 2 +- sound/soc/generic/simple-card-utils.c | 15 +++++++++++++++ sound/soc/generic/simple-card.c | 3 +-- 4 files changed, 18 insertions(+), 3 deletions(-) diff --git a/include/sound/simple_card_utils.h b/include/sound/simple_card_utils.h index a0b827f0c2f6..cfed741e0181 100644 --- a/include/sound/simple_card_utils.h +++ b/include/sound/simple_card_utils.h @@ -177,6 +177,7 @@ void asoc_simple_convert_fixup(struct asoc_simple_data *data, struct snd_pcm_hw_params *params); void asoc_simple_parse_convert(struct device_node *np, char *prefix, struct asoc_simple_data *data); +bool asoc_simple_convert_is_required(const struct asoc_simple_data *data); int asoc_simple_parse_routing(struct snd_soc_card *card, char *prefix); diff --git a/sound/soc/generic/audio-graph-card.c b/sound/soc/generic/audio-graph-card.c index b327372f2e4a..7804625b131e 100644 --- a/sound/soc/generic/audio-graph-card.c +++ b/sound/soc/generic/audio-graph-card.c @@ -417,7 +417,7 @@ static inline bool parse_as_dpcm_link(struct asoc_simple_priv *priv, * or has convert-xxx property */ if ((of_get_child_count(codec_port) > 1) || - (adata->convert_rate || adata->convert_channels)) + asoc_simple_convert_is_required(adata)) return true; return false; diff --git a/sound/soc/generic/simple-card-utils.c b/sound/soc/generic/simple-card-utils.c index bef16833c487..7a708be24656 100644 --- a/sound/soc/generic/simple-card-utils.c +++ b/sound/soc/generic/simple-card-utils.c @@ -85,6 +85,21 @@ void asoc_simple_parse_convert(struct device_node *np, } EXPORT_SYMBOL_GPL(asoc_simple_parse_convert); +/** + * asoc_simple_convert_is_required() - Query if HW param conversion was requested + * @data: Link data. + * + * Returns true if any HW param conversion was requested for this DAI link with + * any "convert-xxx" properties. + */ +bool asoc_simple_convert_is_required(const struct asoc_simple_data *data) +{ + return data->convert_rate || + data->convert_channels || + data->convert_sample_format; +} +EXPORT_SYMBOL_GPL(asoc_simple_convert_is_required); + int asoc_simple_parse_daifmt(struct device *dev, struct device_node *node, struct device_node *codec, diff --git a/sound/soc/generic/simple-card.c b/sound/soc/generic/simple-card.c index 78419e18717d..675991cdee87 100644 --- a/sound/soc/generic/simple-card.c +++ b/sound/soc/generic/simple-card.c @@ -393,8 +393,7 @@ static int __simple_for_each_link(struct asoc_simple_priv *priv, * or has convert-xxx property */ if (dpcm_selectable && - (num > 2 || - adata.convert_rate || adata.convert_channels)) { + (num > 2 || asoc_simple_convert_is_required(&adata))) { /* * np * |1(CPU)|0(Codec) li->cpu -- 2.38.0

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sof-es8336.conf
by GitHub issues - edited 18 Oct '22

18 Oct '22

alsa-project/alsa-ucm-conf issue #231 was edited from junocomp: The only way for the `Headphone Mixer Volume` to be enabled at startup the following commands needs to be added. `sset Headphone 3` When adding this to `sof-essx8336.conf` and reload alsa I get the following error ``` sudo alsaucm reload ALSA lib parser.c:1194:(parse_sequence) error: sequence command 'sset' is ignored ALSA lib parser.c:1045:(parse_sequence) error: string type is expected for sequence command ALSA lib parser.c:2289:(parse_controls_boot) Unable to parse BootSequence ALSA lib main.c:1541:(snd_use_case_mgr_open) error: failed to import hw:0 use case configuration -22 alsaucm: error failed to open sound card hw:0: Invalid argument ``` When running `amixer -c 0 sset Headphone 3` manually it works fine Issue URL : https://github.com/alsa-project/alsa-ucm-conf/issues/231 Repository URL: https://github.com/alsa-project/alsa-ucm-conf

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sof-es8336.conf
by GitHub issues - opened 18 Oct '22

18 Oct '22

alsa-project/alsa-ucm-conf issue #231 was opened from junocomp: The only way for the `Headphone Mixer Volume` to be enabled at startup the following commands needs to be added. `sset Headphone 3 ` When adding this to `sof-essx8336.conf` and reload alsa I get the following error ``` sudo alsaucm reload ALSA lib parser.c:1194:(parse_sequence) error: sequence command 'sset' is ignored ALSA lib parser.c:1045:(parse_sequence) error: string type is expected for sequence command ALSA lib parser.c:2289:(parse_controls_boot) Unable to parse BootSequence ALSA lib main.c:1541:(snd_use_case_mgr_open) error: failed to import hw:0 use case configuration -22 alsaucm: error failed to open sound card hw:0: Invalid argument ``` When running `amixer -c 0 sset Headphone 3` manually it works fine Issue URL : https://github.com/alsa-project/alsa-ucm-conf/issues/231 Repository URL: https://github.com/alsa-project/alsa-ucm-conf

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[PATCH v1] ALSA: hda/realtek: Add quirk for ASUS Zenbook using CS35L41
by Stefan Binding 18 Oct '22

18 Oct '22

This Asus Zenbook laptop use Realtek HDA codec combined with 2xCS35L41 Amplifiers using SPI with External Boost. Signed-off-by: Stefan Binding <sbinding(a)opensource.cirrus.com> --- sound/pci/hda/patch_realtek.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index 7c177426bf303..79acd2a2caf20 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -9395,6 +9395,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { SND_PCI_QUIRK(0x1043, 0x1ccd, "ASUS X555UB", ALC256_FIXUP_ASUS_MIC), SND_PCI_QUIRK(0x1043, 0x1d42, "ASUS Zephyrus G14 2022", ALC289_FIXUP_ASUS_GA401), SND_PCI_QUIRK(0x1043, 0x1d4e, "ASUS TM420", ALC256_FIXUP_ASUS_HPE), + SND_PCI_QUIRK(0x1043, 0x1e02, "ASUS UX3402", ALC245_FIXUP_CS35L41_SPI_2), SND_PCI_QUIRK(0x1043, 0x1e11, "ASUS Zephyrus G15", ALC289_FIXUP_ASUS_GA502), SND_PCI_QUIRK(0x1043, 0x1e51, "ASUS Zephyrus M15", ALC294_FIXUP_ASUS_GU502_PINS), SND_PCI_QUIRK(0x1043, 0x1e5e, "ASUS ROG Strix G513", ALC294_FIXUP_ASUS_G513_PINS), -- 2.34.1

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Re: [PATCH v2 36/36] pinctrl: Clean up headers
by Geert Uytterhoeven 18 Oct '22

18 Oct '22

Hi Andy, On Tue, Oct 11, 2022 at 11:07 AM Andy Shevchenko <andriy.shevchenko(a)linux.intel.com> wrote: > On Tue, Oct 11, 2022 at 10:46:30AM +0200, Geert Uytterhoeven wrote: > > On Tue, Oct 11, 2022 at 9:31 AM Basavaraj Natikar <bnatikar(a)amd.com> wrote: > > > On 10/11/2022 1:44 AM, Andy Shevchenko wrote: > > > > > +++ b/drivers/pinctrl/core.h > > > > > -#include <linux/pinctrl/pinconf.h> > > > > > > Removing pinconf.h from the core.h may cause build failure in other files > > > because where-ever core.h is included to use “struct pinconf_ops”, there > > > is a need to include pinconf.h. > > > > I can confirm adding > > > > #include <linux/pinctrl/pinconf.h> > > > > to drivers/pinctrl/renesas/pinctrl-rzn1.c and drivers/pinctrl/pinctrl-single.c > > fixes the issues I was seeing with shmobile_defconfig and (out-of-tree) > > renesas_defconfig. > > I will add this, thank you for reporting. Same for drivers/pinctrl/starfive/pinctrl-starfive-jh7100.c. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert(a)linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds

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cs42xxc-i2c: i2c device and driver not connected through deivce-tree
by Peter Bergin 18 Oct '22

18 Oct '22

Hi, on my system I have a cs42448 chip connected on a i2c bus to a i.Mx8mp. The chip is connected on i2c-2 with address 0x48 and I can detect it and read registers with help of i2c-tools. Running kernel v6.0 and having problem as the device and driver is not connected in my system. The probe function (cs42xx8_i2c_probe) is never called during initialization. The module is loaded in the kernel. Here is a snippet from the dtb file: codec: cs42xx8@48 { compatible = "cirrus,cs42448"; reg = <0x48>; reset-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>; #sound-dai-cells = <0>; clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1>; clock-names = "mclk"; VA-supply = <&reg_audio_pwr_5v0>; VD-supply = <&reg_audio_pwr_3v3>; VLS-supply = <&reg_audio_pwr_3v3>; VLC-supply = <&reg_audio_pwr_3v3>; }; Tried to dig in to the code and understand why the device and the driver is not connected with each other. I assumed that they should be connected through device-tree. In sound/soc/codec/snd-soc-cs42xx8-i2c.mod.c: MODULE_ALIAS("i2c:cs42448"); MODULE_ALIAS("i2c:cs42888"); So there are no alias to of: in that file. Do I have the wrong assumption about connecting the device with the driver through the device-tree? Something wrong in my dts snippet above? Great if someone could help out with some ideas around this. Thanks, /Peter

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[PATCH] ASoC: codecs: tlv320adc3xxx: Wrap adc3xxx_i2c_remove() in __exit_p()
by Geert Uytterhoeven 18 Oct '22

18 Oct '22

If CONFIG_SND_SOC_TLV320ADC3XXX=y: `.exit.text' referenced in section `.data' of sound/soc/codecs/tlv320adc3xxx.o: defined in discarded section `.exit.text' of sound/soc/codecs/tlv320adc3xxx.o Fix this by wrapping the adc3xxx_i2c_remove() pointer in __exit_p(). Fixes: e9a3b57efd28fe88 ("ASoC: codec: tlv320adc3xxx: New codec driver") Signed-off-by: Geert Uytterhoeven <geert(a)linux-m68k.org> --- sound/soc/codecs/tlv320adc3xxx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/tlv320adc3xxx.c b/sound/soc/codecs/tlv320adc3xxx.c index baab320ef98879d7..a969547708d49676 100644 --- a/sound/soc/codecs/tlv320adc3xxx.c +++ b/sound/soc/codecs/tlv320adc3xxx.c @@ -1449,7 +1449,7 @@ static struct i2c_driver adc3xxx_i2c_driver = { .of_match_table = tlv320adc3xxx_of_match, }, .probe_new = adc3xxx_i2c_probe, - .remove = adc3xxx_i2c_remove, + .remove = __exit_p(adc3xxx_i2c_remove), .id_table = adc3xxx_i2c_id, }; -- 2.25.1

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[PATCH] ASoC: qcom: SND_SOC_SC7180 optionally depends on SOUNDWIRE
by Randy Dunlap 18 Oct '22

18 Oct '22

If SOUNDWIRE is enabled, then SND_SOC_SC7180 should depend on SOUNDWIRE to prevent SOUNDWIRE=m and SND_SOC_SC7180=y, which causes build errors: s390-linux-ld: sound/soc/qcom/common.o: in function `qcom_snd_sdw_prepare': common.c:(.text+0x140): undefined reference to `sdw_disable_stream' s390-linux-ld: common.c:(.text+0x14a): undefined reference to `sdw_deprepare_stream' s390-linux-ld: common.c:(.text+0x158): undefined reference to `sdw_prepare_stream' s390-linux-ld: common.c:(.text+0x16a): undefined reference to `sdw_enable_stream' s390-linux-ld: common.c:(.text+0x17c): undefined reference to `sdw_deprepare_stream' s390-linux-ld: sound/soc/qcom/common.o: in function `qcom_snd_sdw_hw_free': common.c:(.text+0x344): undefined reference to `sdw_disable_stream' s390-linux-ld: common.c:(.text+0x34e): undefined reference to `sdw_deprepare_stream' Fixes: 3bd975f3ae0a ("ASoC: qcom: sm8250: move some code to common") Fixes: 9e3ecb5b1681 ("ASoC: qcom: sc7180: Add machine driver for sound card registration") Signed-off-by: Randy Dunlap <rdunlap(a)infradead.org> Reported-by: kernel test robot <lkp(a)intel.com> Cc: Srinivas Kandagatla <srinivas.kandagatla(a)linaro.org> Cc: Banajit Goswami <bgoswami(a)quicinc.com> Cc: Mark Brown <broonie(a)kernel.org> Cc: Liam Girdwood <lgirdwood(a)gmail.com> Cc: Ajit Pandey <ajitp(a)codeaurora.org> Cc: Cheng-Yi Chiang <cychiang(a)chromium.org> Cc: Jaroslav Kysela <perex(a)perex.cz> Cc: Takashi Iwai <tiwai(a)suse.com> Cc: stable(a)vger.kernel.org Cc: alsa-devel(a)alsa-project.org --- Sorry, I can't tell which Fixes: hash is appropriate here. sound/soc/qcom/Kconfig | 1 + 1 file changed, 1 insertion(+) diff -- a/sound/soc/qcom/Kconfig b/sound/soc/qcom/Kconfig --- a/sound/soc/qcom/Kconfig +++ b/sound/soc/qcom/Kconfig @@ -187,6 +187,7 @@ config SND_SOC_SC8280XP config SND_SOC_SC7180 tristate "SoC Machine driver for SC7180 boards" depends on I2C && GPIOLIB + depends on SOUNDWIRE || SOUNDWIRE=n select SND_SOC_QCOM_COMMON select SND_SOC_LPASS_SC7180 select SND_SOC_MAX98357A

2 1

[PATCH v2 00/15] ASoC: Intel: avs: Fixes and new boards support
by Cezary Rojewski 18 Oct '22

18 Oct '22

Two fixes are leading the way - one addresses the incorrect DMA mask assignment (typo) at driver probe. The other, fixes a potential buffer overflow when copying data received from firmware to kernel buffer. However unlikely, the fix should still be there. Then a range of patches providing the support for: - AML with rt286 (machine board) - KBL-R for rt298 (codec) - KBL-R with rt298 (machine board) - APL/KBL with da7219 (machine board) - Addition of all the missing SKL-based PCI ids to core.c Of the remaining changes, only one stands out - special case is provided for "unsupported" IPCs. The driver supports a range of platforms, however, on some generations given IPC may not be supported. Such call shall not be treated as "invalid" - those are two different scenarios. Everything else in the patchset is mostly a readability improvement: spelling fixes and log messages issues, code simplification. Changes in v2: - no code changes, just added missing signed-off-by tags Amadeusz Sławiński (4): ASoC: codecs: rt298: Add quirk for KBL-R RVP platform ASoC: Intel: avs: Add quirk for KBL-R RVP platform ASoC: Intel: avs: Support da7219 on both KBL and APL ASoC: Intel: avs: Add missing include to HDA board Cezary Rojewski (11): ASoC: Intel: avs: Fix DMA mask assignment ASoC: Intel: avs: Fix potential RX buffer overflow ASoC: Intel: avs: Support AML with rt286 configuration ASoC: Intel: avs: Add missing SKL-based device IDs ASoC: Intel: avs: Simplify d0ix disabling routine ASoC: Intel: avs: Do not reuse msg between different IPC handlers ASoC: Intel: avs: Do not treat unsupported IPCs as invalid ASoC: Intel: avs: Do not print IPC error message twice ASoC: Intel: avs: Simplify ignore_fw_version description ASoC: Intel: avs: Simplify log control for SKL ASoC: codecs: hda: Fix spelling error in log message sound/soc/codecs/hda.c | 2 +- sound/soc/codecs/rt298.c | 7 +++++++ sound/soc/intel/avs/apl.c | 6 ++++-- sound/soc/intel/avs/avs.h | 4 +++- sound/soc/intel/avs/board_selection.c | 6 ++++++ sound/soc/intel/avs/boards/da7219.c | 6 +++++- sound/soc/intel/avs/boards/hdaudio.c | 1 + sound/soc/intel/avs/boards/rt298.c | 24 ++++++++++++++++++++++-- sound/soc/intel/avs/core.c | 6 +++++- sound/soc/intel/avs/ipc.c | 5 +++-- sound/soc/intel/avs/loader.c | 2 +- sound/soc/intel/avs/messages.c | 19 ++++--------------- sound/soc/intel/avs/messages.h | 2 ++ sound/soc/intel/avs/skl.c | 4 ++-- 14 files changed, 66 insertions(+), 28 deletions(-) -- 2.25.1

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[PATCH v2 0/3] ASoC: add devicetree support for WM8961 codec
by Doug Brown 18 Oct '22

18 Oct '22

This series adds devicetree support for the Wolfson WM8961 codec. The first patch adds a schema, the second patch hooks it up in the code, and the third patch allows it to be selected in Kconfig. Changes since v1: - Fix ordering of property lists and example in schema - Fix wording of commit message - Fix unused variable warning - Split Kconfig change to separate commit Doug Brown (3): ASoC: dt-bindings: add schema for WM8961 ASoC: wm8961: add support for devicetree ASoC: codecs: allow WM8961 to be selected by the user .../devicetree/bindings/sound/wlf,wm8961.yaml | 40 +++++++++++++++++++ sound/soc/codecs/Kconfig | 2 +- sound/soc/codecs/wm8961.c | 7 ++++ 3 files changed, 48 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/sound/wlf,wm8961.yaml -- 2.34.1

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[PATCH 0/2] ASoC: Intel: avs: Add support for max98927 codec
by Amadeusz Sławiński 18 Oct '22

18 Oct '22

This series adds machine board for max98927 codec present on some Chromebook devices. Amadeusz Sławiński (2): ASoC: Intel: avs: Add max98927 machine board ASoC: Intel: avs: Load max98927 on target platform sound/soc/intel/avs/board_selection.c | 8 + sound/soc/intel/avs/boards/Kconfig | 10 ++ sound/soc/intel/avs/boards/Makefile | 2 + sound/soc/intel/avs/boards/max98927.c | 236 ++++++++++++++++++++++++++ 4 files changed, 256 insertions(+) create mode 100644 sound/soc/intel/avs/boards/max98927.c -- 2.25.1

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[PATCH -next 0/4] ASoC: Use DIV_ROUND_UP() instead of open-coding it
by Shang XiaoJing 18 Oct '22

18 Oct '22

Use DIV_ROUND_UP() instead of open-coding it, which intents and makes it more clear what is going on for the casual reviewer. Shang XiaoJing (4): ASoC: cs35l36: Use DIV_ROUND_UP() instead of open-coding it ASoC: wm8978: Use DIV_ROUND_UP() instead of open-coding it ASoC: rsnd: Use DIV_ROUND_UP() instead of open-coding it ASoC: ti: davinci-mcasp: Use DIV_ROUND_UP() instead of open-coding it sound/soc/codecs/cs35l36.c | 4 ++-- sound/soc/codecs/wm8978.c | 2 +- sound/soc/sh/rcar/core.c | 4 ++-- sound/soc/ti/davinci-mcasp.c | 7 +++---- 4 files changed, 8 insertions(+), 9 deletions(-) -- 2.17.1

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[PATCH 0/5] ARM: mvebu: Add audio support for Armada 38x
by Pali Rohár 18 Oct '22

18 Oct '22

This patch series add audio support for Armada 38x. It contains commits from Marvell linux repository https://github.com/MarvellEmbeddedProcessors/linux-marvell/commit/a1d70444c… https://github.com/MarvellEmbeddedProcessors/linux-marvell/commit/f365c9323… https://github.com/MarvellEmbeddedProcessors/linux-marvell/commit/b645bfa91… https://github.com/MarvellEmbeddedProcessors/linux-marvell/commit/829c96c20… first two squashed, rebased on top of the current linux master branch (at v6.0-rc6) with additional patches which adds S/PDIF support on Turris Omnia - A385 board. Marcin Wojtas (3): ASoC: kirkwood: enable Kirkwood driver for Armada 38x platforms ARM: mvebu: add audio I2S controller to Armada 38x Device Tree ARM: mvebu: add audio support to Armada 385 DB Pali Rohár (2): ARM: mvebu: Add spdif-pins mpp pins for Armada 38x ARM: dts: turris-omnia: Define S/PDIF audio card .../devicetree/bindings/sound/mvebu-audio.txt | 14 +- arch/arm/boot/dts/armada-385-turris-omnia.dts | 27 ++++ arch/arm/boot/dts/armada-388-db.dts | 69 +++++++++ arch/arm/boot/dts/armada-38x.dtsi | 24 ++++ sound/soc/kirkwood/kirkwood-i2s.c | 136 +++++++++++++++++- sound/soc/kirkwood/kirkwood.h | 2 + 6 files changed, 269 insertions(+), 3 deletions(-) -- 2.20.1

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[PATCH -next] ASoC: cs42l83: change cs42l83_regmap to static
by Yang Yingliang 18 Oct '22

18 Oct '22

cs42l83_regmap is only used in cs42l83-i2c.c now, change it to static. Fixes: 94d5f62a91aa ("ASoC: cs42l83: Extend CS42L42 support to new part") Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- sound/soc/codecs/cs42l83-i2c.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/cs42l83-i2c.c b/sound/soc/codecs/cs42l83-i2c.c index f90d43996a51..37629ebd90e0 100644 --- a/sound/soc/codecs/cs42l83-i2c.c +++ b/sound/soc/codecs/cs42l83-i2c.c @@ -145,7 +145,7 @@ static const struct reg_default cs42l83_reg_defaults[] = { * This is all the same as for CS42L42 but we * replace the on-reset register defaults. */ -const struct regmap_config cs42l83_regmap = { +static const struct regmap_config cs42l83_regmap = { .reg_bits = 8, .val_bits = 8, -- 2.25.1

2 1

[PATCH] ASoC: fsl_micfil: Add Hardware Voice Activity Detector support
by Shengjiu Wang 18 Oct '22

18 Oct '22

The Hardware Voice Activity Detector (HWVAD) is a block responsible for detect voice activity in a channel selected by the user. It can be configured in Envelope-based or Energy-based mode. There are additional two interrupts for HWVAD, one is event interrupt, another is error interrupt. Enable hwvad in parallel with recording. when voice activity detected, HWVAD will be disabled and alsa control notification is triggerred. Signed-off-by: Shengjiu Wang <shengjiu.wang(a)nxp.com> --- sound/soc/fsl/fsl_micfil.c | 434 +++++++++++++++++++++++++++++++++++++ sound/soc/fsl/fsl_micfil.h | 6 +- 2 files changed, 439 insertions(+), 1 deletion(-) diff --git a/sound/soc/fsl/fsl_micfil.c b/sound/soc/fsl/fsl_micfil.c index 79ef4e269bc9..eeaa75fb9196 100644 --- a/sound/soc/fsl/fsl_micfil.c +++ b/sound/soc/fsl/fsl_micfil.c @@ -47,11 +47,15 @@ struct fsl_micfil { struct clk *pll11k_clk; struct snd_dmaengine_dai_dma_data dma_params_rx; struct sdma_peripheral_config sdmacfg; + struct snd_soc_card *card; unsigned int dataline; char name[32]; int irq[MICFIL_IRQ_LINES]; enum quality quality; int dc_remover; + int vad_init_mode; + int vad_enabled; + int vad_detected; }; struct fsl_micfil_soc_data { @@ -152,6 +156,152 @@ static int micfil_quality_set(struct snd_kcontrol *kcontrol, return micfil_set_quality(micfil); } +static const char * const micfil_hwvad_enable[] = { + "Disable (Record only)", + "Enable (Record with Vad)", +}; + +static const char * const micfil_hwvad_init_mode[] = { + "Envelope mode", "Energy mode", +}; + +static const char * const micfil_hwvad_hpf_texts[] = { + "Filter bypass", + "Cut-off @1750Hz", + "Cut-off @215Hz", + "Cut-off @102Hz", +}; + +/* + * DC Remover Control + * Filter Bypassed 1 1 + * Cut-off @21Hz 0 0 + * Cut-off @83Hz 0 1 + * Cut-off @152HZ 1 0 + */ +static const char * const micfil_dc_remover_texts[] = { + "Cut-off @21Hz", "Cut-off @83Hz", + "Cut-off @152Hz", "Bypass", +}; + +static const struct soc_enum hwvad_enable_enum = + SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(micfil_hwvad_enable), + micfil_hwvad_enable); +static const struct soc_enum hwvad_init_mode_enum = + SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(micfil_hwvad_init_mode), + micfil_hwvad_init_mode); +static const struct soc_enum hwvad_hpf_enum = + SOC_ENUM_SINGLE(REG_MICFIL_VAD0_CTRL2, 0, + ARRAY_SIZE(micfil_hwvad_hpf_texts), + micfil_hwvad_hpf_texts); +static const struct soc_enum fsl_micfil_dc_remover_enum = + SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(micfil_dc_remover_texts), + micfil_dc_remover_texts); + +static int micfil_put_dc_remover_state(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; + struct snd_soc_component *comp = snd_kcontrol_chip(kcontrol); + struct fsl_micfil *micfil = snd_soc_component_get_drvdata(comp); + unsigned int *item = ucontrol->value.enumerated.item; + int val = snd_soc_enum_item_to_val(e, item[0]); + int i = 0, ret = 0; + u32 reg_val = 0; + + if (val < 0 || val > 3) + return -EINVAL; + + micfil->dc_remover = val; + + /* Calculate total value for all channels */ + for (i = 0; i < MICFIL_OUTPUT_CHANNELS; i++) + reg_val |= val << MICFIL_DC_CHX_SHIFT(i); + + /* Update DC Remover mode for all channels */ + ret = snd_soc_component_update_bits(comp, REG_MICFIL_DC_CTRL, + MICFIL_DC_CTRL_CONFIG, reg_val); + if (ret < 0) + return ret; + + return 0; +} + +static int micfil_get_dc_remover_state(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *comp = snd_kcontrol_chip(kcontrol); + struct fsl_micfil *micfil = snd_soc_component_get_drvdata(comp); + + ucontrol->value.enumerated.item[0] = micfil->dc_remover; + + return 0; +} + +static int hwvad_put_enable(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *comp = snd_kcontrol_chip(kcontrol); + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; + unsigned int *item = ucontrol->value.enumerated.item; + struct fsl_micfil *micfil = snd_soc_component_get_drvdata(comp); + int val = snd_soc_enum_item_to_val(e, item[0]); + + micfil->vad_enabled = val; + + return 0; +} + +static int hwvad_get_enable(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *comp = snd_kcontrol_chip(kcontrol); + struct fsl_micfil *micfil = snd_soc_component_get_drvdata(comp); + + ucontrol->value.enumerated.item[0] = micfil->vad_enabled; + + return 0; +} + +static int hwvad_put_init_mode(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *comp = snd_kcontrol_chip(kcontrol); + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; + unsigned int *item = ucontrol->value.enumerated.item; + struct fsl_micfil *micfil = snd_soc_component_get_drvdata(comp); + int val = snd_soc_enum_item_to_val(e, item[0]); + + /* 0 - Envelope-based Mode + * 1 - Energy-based Mode + */ + micfil->vad_init_mode = val; + + return 0; +} + +static int hwvad_get_init_mode(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *comp = snd_kcontrol_chip(kcontrol); + struct fsl_micfil *micfil = snd_soc_component_get_drvdata(comp); + + ucontrol->value.enumerated.item[0] = micfil->vad_init_mode; + + return 0; +} + +static int hwvad_detected(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *comp = snd_kcontrol_chip(kcontrol); + struct fsl_micfil *micfil = snd_soc_component_get_drvdata(comp); + + ucontrol->value.enumerated.item[0] = micfil->vad_detected; + + return 0; +} + static const struct snd_kcontrol_new fsl_micfil_snd_controls[] = { SOC_SINGLE_SX_TLV("CH0 Volume", REG_MICFIL_OUT_CTRL, MICFIL_OUTGAIN_CHX_SHIFT(0), 0xF, 0x7, gain_tlv), @@ -172,6 +322,27 @@ static const struct snd_kcontrol_new fsl_micfil_snd_controls[] = { SOC_ENUM_EXT("MICFIL Quality Select", fsl_micfil_quality_enum, micfil_quality_get, micfil_quality_set), + SOC_ENUM_EXT("HWVAD Enablement Switch", hwvad_enable_enum, + hwvad_get_enable, hwvad_put_enable), + SOC_ENUM_EXT("HWVAD Initialization Mode", hwvad_init_mode_enum, + hwvad_get_init_mode, hwvad_put_init_mode), + SOC_ENUM("HWVAD High-Pass Filter", hwvad_hpf_enum), + SOC_SINGLE("HWVAD ZCD Switch", REG_MICFIL_VAD0_ZCD, 0, 1, 0), + SOC_SINGLE("HWVAD ZCD Auto Threshold Switch", + REG_MICFIL_VAD0_ZCD, 2, 1, 0), + SOC_ENUM_EXT("MICFIL DC Remover Control", fsl_micfil_dc_remover_enum, + micfil_get_dc_remover_state, micfil_put_dc_remover_state), + SOC_SINGLE("HWVAD Input Gain", REG_MICFIL_VAD0_CTRL2, 8, 15, 0), + SOC_SINGLE("HWVAD Sound Gain", REG_MICFIL_VAD0_SCONFIG, 0, 15, 0), + SOC_SINGLE("HWVAD Noise Gain", REG_MICFIL_VAD0_NCONFIG, 0, 15, 0), + SOC_SINGLE_RANGE("HWVAD Detector Frame Time", REG_MICFIL_VAD0_CTRL2, 16, 0, 63, 0), + SOC_SINGLE("HWVAD Detector Initialization Time", REG_MICFIL_VAD0_CTRL1, 8, 31, 0), + SOC_SINGLE("HWVAD Noise Filter Adjustment", REG_MICFIL_VAD0_NCONFIG, 8, 31, 0), + SOC_SINGLE("HWVAD ZCD Threshold", REG_MICFIL_VAD0_ZCD, 16, 1023, 0), + SOC_SINGLE("HWVAD ZCD Adjustment", REG_MICFIL_VAD0_ZCD, 8, 15, 0), + SOC_SINGLE("HWVAD ZCD And Behavior Switch", + REG_MICFIL_VAD0_ZCD, 4, 1, 0), + SOC_SINGLE_BOOL_EXT("VAD Detected", 0, hwvad_detected, NULL), }; /* The SRES is a self-negated bit which provides the CPU with the @@ -210,6 +381,167 @@ static int fsl_micfil_startup(struct snd_pcm_substream *substream, return 0; } +/* Enable/disable hwvad interrupts */ +static int fsl_micfil_configure_hwvad_interrupts(struct fsl_micfil *micfil, int enable) +{ + u32 vadie_reg = enable ? MICFIL_VAD0_CTRL1_IE : 0; + u32 vaderie_reg = enable ? MICFIL_VAD0_CTRL1_ERIE : 0; + + /* Voice Activity Detector Error Interruption */ + regmap_update_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, + MICFIL_VAD0_CTRL1_ERIE, vaderie_reg); + + /* Voice Activity Detector Interruption */ + regmap_update_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, + MICFIL_VAD0_CTRL1_IE, vadie_reg); + + return 0; +} + +/* Configuration done only in energy-based initialization mode */ +static int fsl_micfil_init_hwvad_energy_mode(struct fsl_micfil *micfil) +{ + /* Keep the VADFRENDIS bitfield cleared. */ + regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL2, + MICFIL_VAD0_CTRL2_FRENDIS); + + /* Keep the VADPREFEN bitfield cleared. */ + regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL2, + MICFIL_VAD0_CTRL2_PREFEN); + + /* Keep the VADSFILEN bitfield cleared. */ + regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_SCONFIG, + MICFIL_VAD0_SCONFIG_SFILEN); + + /* Keep the VADSMAXEN bitfield cleared. */ + regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_SCONFIG, + MICFIL_VAD0_SCONFIG_SMAXEN); + + /* Keep the VADNFILAUTO bitfield asserted. */ + regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, + MICFIL_VAD0_NCONFIG_NFILAUT); + + /* Keep the VADNMINEN bitfield cleared. */ + regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, + MICFIL_VAD0_NCONFIG_NMINEN); + + /* Keep the VADNDECEN bitfield cleared. */ + regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, + MICFIL_VAD0_NCONFIG_NDECEN); + + /* Keep the VADNOREN bitfield cleared. */ + regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, + MICFIL_VAD0_NCONFIG_NOREN); + + return 0; +} + +/* Configuration done only in envelope-based initialization mode */ +static int fsl_micfil_init_hwvad_envelope_mode(struct fsl_micfil *micfil) +{ + /* Assert the VADFRENDIS bitfield */ + regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL2, + MICFIL_VAD0_CTRL2_FRENDIS); + + /* Assert the VADPREFEN bitfield. */ + regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL2, + MICFIL_VAD0_CTRL2_PREFEN); + + /* Assert the VADSFILEN bitfield. */ + regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_SCONFIG, + MICFIL_VAD0_SCONFIG_SFILEN); + + /* Assert the VADSMAXEN bitfield. */ + regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_SCONFIG, + MICFIL_VAD0_SCONFIG_SMAXEN); + + /* Clear the VADNFILAUTO bitfield */ + regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, + MICFIL_VAD0_NCONFIG_NFILAUT); + + /* Assert the VADNMINEN bitfield. */ + regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, + MICFIL_VAD0_NCONFIG_NMINEN); + + /* Assert the VADNDECEN bitfield. */ + regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, + MICFIL_VAD0_NCONFIG_NDECEN); + + /* Assert VADNOREN bitfield. */ + regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, + MICFIL_VAD0_NCONFIG_NOREN); + + return 0; +} + +/* + * Hardware Voice Active Detection: The HWVAD takes data from the input + * of a selected PDM microphone to detect if there is any + * voice activity. When a voice activity is detected, an interrupt could + * be delivered to the system. Initialization in section 8.4: + * Can work in two modes: + * -> Eneveope-based mode (section 8.4.1) + * -> Energy-based mode (section 8.4.2) + * + * It is important to remark that the HWVAD detector could be enabled + * or reset only when the MICFIL isn't running i.e. when the BSY_FIL + * bit in STAT register is cleared + */ +static int fsl_micfil_hwvad_enable(struct fsl_micfil *micfil) +{ + int ret; + + micfil->vad_detected = 0; + + /* envelope-based specific initialization */ + if (micfil->vad_init_mode == MICFIL_HWVAD_ENVELOPE_MODE) + ret = fsl_micfil_init_hwvad_envelope_mode(micfil); + else + ret = fsl_micfil_init_hwvad_energy_mode(micfil); + if (ret) + return ret; + + /* Voice Activity Detector Internal Filters Initialization*/ + regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, + MICFIL_VAD0_CTRL1_ST10); + + /* Voice Activity Detector Internal Filter */ + regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, + MICFIL_VAD0_CTRL1_ST10); + + /* Enable Interrupts */ + ret = fsl_micfil_configure_hwvad_interrupts(micfil, 1); + if (ret) + return ret; + + /* Voice Activity Detector Reset */ + regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, + MICFIL_VAD0_CTRL1_RST); + + /* Voice Activity Detector Enabled */ + regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, + MICFIL_VAD0_CTRL1_EN); + + return 0; +} + +static int fsl_micfil_hwvad_disable(struct fsl_micfil *micfil) +{ + struct device *dev = &micfil->pdev->dev; + int ret = 0; + + /* Disable HWVAD */ + regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, + MICFIL_VAD0_CTRL1_EN); + + /* Disable hwvad interrupts */ + ret = fsl_micfil_configure_hwvad_interrupts(micfil, 0); + if (ret) + dev_err(dev, "Failed to disable interrupts\n"); + + return ret; +} + static int fsl_micfil_trigger(struct snd_pcm_substream *substream, int cmd, struct snd_soc_dai *dai) { @@ -245,10 +577,16 @@ static int fsl_micfil_trigger(struct snd_pcm_substream *substream, int cmd, if (ret) return ret; + if (micfil->vad_enabled) + fsl_micfil_hwvad_enable(micfil); + break; case SNDRV_PCM_TRIGGER_STOP: case SNDRV_PCM_TRIGGER_SUSPEND: case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + if (micfil->vad_enabled) + fsl_micfil_hwvad_disable(micfil); + /* Disable the module */ ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1, MICFIL_CTRL1_PDMIEN); @@ -328,6 +666,16 @@ static int fsl_micfil_hw_params(struct snd_pcm_substream *substream, FIELD_PREP(MICFIL_CTRL2_CLKDIV, clk_div) | FIELD_PREP(MICFIL_CTRL2_CICOSR, 16 - osr)); + /* Configure CIC OSR in VADCICOSR */ + regmap_update_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, + MICFIL_VAD0_CTRL1_CICOSR, + FIELD_PREP(MICFIL_VAD0_CTRL1_CICOSR, 16 - osr)); + + /* Configure source channel in VADCHSEL */ + regmap_update_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, + MICFIL_VAD0_CTRL1_CHSEL, + FIELD_PREP(MICFIL_VAD0_CTRL1_CHSEL, (channels - 1))); + micfil->dma_params_rx.peripheral_config = &micfil->sdmacfg; micfil->dma_params_rx.peripheral_size = sizeof(micfil->sdmacfg); micfil->sdmacfg.n_fifos_src = channels; @@ -351,6 +699,7 @@ static int fsl_micfil_dai_probe(struct snd_soc_dai *cpu_dai) int ret, i; micfil->quality = QUALITY_VLOW0; + micfil->card = cpu_dai->component->card; /* set default gain to 2 */ regmap_write(micfil->regmap, REG_MICFIL_OUT_CTRL, 0x22222222); @@ -585,6 +934,71 @@ static irqreturn_t micfil_err_isr(int irq, void *devid) return IRQ_HANDLED; } +static irqreturn_t voice_detected_fn(int irq, void *devid) +{ + struct fsl_micfil *micfil = (struct fsl_micfil *)devid; + struct snd_kcontrol *kctl; + + if (!micfil->card) + return IRQ_HANDLED; + + kctl = snd_soc_card_get_kcontrol(micfil->card, "VAD Detected"); + if (!kctl) + return IRQ_HANDLED; + + if (micfil->vad_detected) + snd_ctl_notify(micfil->card->snd_card, + SNDRV_CTL_EVENT_MASK_VALUE, + &kctl->id); + + return IRQ_HANDLED; +} + +static irqreturn_t hwvad_isr(int irq, void *devid) +{ + struct fsl_micfil *micfil = (struct fsl_micfil *)devid; + struct device *dev = &micfil->pdev->dev; + u32 vad0_reg; + int ret; + + regmap_read(micfil->regmap, REG_MICFIL_VAD0_STAT, &vad0_reg); + + /* + * The only difference between MICFIL_VAD0_STAT_EF and + * MICFIL_VAD0_STAT_IF is that the former requires Write + * 1 to Clear. Since both flags are set, it is enough + * to only read one of them + */ + if (vad0_reg & MICFIL_VAD0_STAT_IF) { + /* Write 1 to clear */ + regmap_write_bits(micfil->regmap, REG_MICFIL_VAD0_STAT, + MICFIL_VAD0_STAT_IF, + MICFIL_VAD0_STAT_IF); + + micfil->vad_detected = 1; + } + + ret = fsl_micfil_hwvad_disable(micfil); + if (ret) + dev_err(dev, "Failed to disable hwvad\n"); + + return IRQ_WAKE_THREAD; +} + +static irqreturn_t hwvad_err_isr(int irq, void *devid) +{ + struct fsl_micfil *micfil = (struct fsl_micfil *)devid; + struct device *dev = &micfil->pdev->dev; + u32 vad0_reg; + + regmap_read(micfil->regmap, REG_MICFIL_VAD0_STAT, &vad0_reg); + + if (vad0_reg & MICFIL_VAD0_STAT_INSATF) + dev_dbg(dev, "voice activity input overflow/underflow detected\n"); + + return IRQ_HANDLED; +} + static int fsl_micfil_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; @@ -677,6 +1091,26 @@ static int fsl_micfil_probe(struct platform_device *pdev) return ret; } + /* Digital Microphone interface voice activity detector event */ + ret = devm_request_threaded_irq(&pdev->dev, micfil->irq[2], + hwvad_isr, voice_detected_fn, + IRQF_SHARED, micfil->name, micfil); + if (ret) { + dev_err(&pdev->dev, "failed to claim hwvad event irq %u\n", + micfil->irq[0]); + return ret; + } + + /* Digital Microphone interface voice activity detector error */ + ret = devm_request_irq(&pdev->dev, micfil->irq[3], + hwvad_err_isr, IRQF_SHARED, + micfil->name, micfil); + if (ret) { + dev_err(&pdev->dev, "failed to claim hwvad error irq %u\n", + micfil->irq[1]); + return ret; + } + micfil->dma_params_rx.chan_name = "rx"; micfil->dma_params_rx.addr = res->start + REG_MICFIL_DATACH0; micfil->dma_params_rx.maxburst = MICFIL_DMA_MAXBURST_RX; diff --git a/sound/soc/fsl/fsl_micfil.h b/sound/soc/fsl/fsl_micfil.h index d60285dd07bc..9237a1c4cb8f 100644 --- a/sound/soc/fsl/fsl_micfil.h +++ b/sound/soc/fsl/fsl_micfil.h @@ -136,10 +136,14 @@ #define FIFO_PTRWID 3 #define FIFO_LEN BIT(FIFO_PTRWID) -#define MICFIL_IRQ_LINES 2 +#define MICFIL_IRQ_LINES 4 #define MICFIL_MAX_RETRY 25 #define MICFIL_SLEEP_MIN 90000 /* in us */ #define MICFIL_SLEEP_MAX 100000 /* in us */ #define MICFIL_DMA_MAXBURST_RX 6 +/* HWVAD Constants */ +#define MICFIL_HWVAD_ENVELOPE_MODE 0 +#define MICFIL_HWVAD_ENERGY_MODE 1 + #endif /* _FSL_MICFIL_H */ -- 2.34.1

2 1

[PATCH] ASoC: codecs: jz4725b: Various improvements and fixes
by Siarhei Volkau 18 Oct '22

18 Oct '22

The patch fixes: - incorrectly represented dB values in alsamixer, et al. - Line In path stays powered off during capturing or bypass to mixer. The patch improves: - Exposes all mixer inputs (both Mics, LineIn and DAC) with their gain controls. - Exposes output stage (post mixer) gain control and makes it new Master playback gain, DAC gain was the previous master. However, no Master mute now. Known issues: - Bypass path enablement isn't applied immediately, for make things going bit clock needs to be triggered for a bit, e.g. by aplay dummy.wav It might be a hardware bug, since the bit clock isn't declared as required for codec operation. Tested on: - Ritmix RZX-27 (jz4725b). - Ritmix RZX-50 (jz4755). Tested-by: Siarhei Volkau <lis8215(a)gmail.com> Signed-off-by: Siarhei Volkau <lis8215(a)gmail.com> --- sound/soc/codecs/jz4725b.c | 81 ++++++++++++++++++++++++++++++++------ 1 file changed, 70 insertions(+), 11 deletions(-) diff --git a/sound/soc/codecs/jz4725b.c b/sound/soc/codecs/jz4725b.c index 5201a8f6d..29f188800 100644 --- a/sound/soc/codecs/jz4725b.c +++ b/sound/soc/codecs/jz4725b.c @@ -136,28 +136,80 @@ enum { #define REG_CGR3_GO1L_OFFSET 0 #define REG_CGR3_GO1L_MASK (0x1f << REG_CGR3_GO1L_OFFSET) +#define REG_CGR4_GO2R_OFFSET 0 +#define REG_CGR4_GO2R_MASK (0x1f << REG_CGR4_GO2R_OFFSET) + +#define REG_CGR5_GO2L_OFFSET 0 +#define REG_CGR5_GO2L_MASK (0x1f << REG_CGR5_GO2L_OFFSET) + +#define REG_CGR6_GO3R_OFFSET 0 +#define REG_CGR6_GO3R_MASK (0x1f << REG_CGR6_GO3R_OFFSET) + +#define REG_CGR7_GO3L_OFFSET 0 +#define REG_CGR7_GO3L_MASK (0x1f << REG_CGR7_GO3L_OFFSET) + +#define REG_CGR8_GOR_OFFSET 0 +#define REG_CGR8_GOR_MASK (0x1f << REG_CGR8_GOR_OFFSET) + +#define REG_CGR9_GOL_OFFSET 0 +#define REG_CGR9_GOL_MASK (0x1f << REG_CGR9_GOL_OFFSET) + +#define REG_CGR10_GIL_OFFSET 0 +#define REG_CGR10_GIR_OFFSET 4 + struct jz_icdc { struct regmap *regmap; void __iomem *base; struct clk *clk; }; -static const SNDRV_CTL_TLVD_DECLARE_DB_LINEAR(jz4725b_dac_tlv, -2250, 0); -static const SNDRV_CTL_TLVD_DECLARE_DB_LINEAR(jz4725b_line_tlv, -1500, 600); +static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(jz4725b_dac_tlv, -2250, 150, 0); +static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(jz4725b_adc_tlv, 0, 150, 0); +static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(jz4725b_mix_tlv, + 0, 11, TLV_DB_SCALE_ITEM(-2250, 0, 0), + 12, 31, TLV_DB_SCALE_ITEM(-2250, 150, 0), +); + +static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(jz4725b_out_tlv, + 0, 11, TLV_DB_SCALE_ITEM(-3350, 200, 0), + 12, 23, TLV_DB_SCALE_ITEM(-1050, 100, 0), + 24, 31, TLV_DB_SCALE_ITEM( 100, 50, 0), +); static const struct snd_kcontrol_new jz4725b_codec_controls[] = { - SOC_DOUBLE_TLV("Master Playback Volume", + SOC_DOUBLE_TLV("DAC Playback Volume", JZ4725B_CODEC_REG_CGR1, REG_CGR1_GODL_OFFSET, REG_CGR1_GODR_OFFSET, 0xf, 1, jz4725b_dac_tlv), - SOC_DOUBLE_R_TLV("Master Capture Volume", + SOC_DOUBLE_TLV("Master Capture Volume", + JZ4725B_CODEC_REG_CGR10, + REG_CGR10_GIL_OFFSET, + REG_CGR10_GIR_OFFSET, + 0xf, 0, jz4725b_adc_tlv), + SOC_DOUBLE_R_TLV("Mixer Line In Bypass Playback Volume", JZ4725B_CODEC_REG_CGR3, JZ4725B_CODEC_REG_CGR2, REG_CGR2_GO1R_OFFSET, - 0x1f, 1, jz4725b_line_tlv), - - SOC_SINGLE("Master Playback Switch", JZ4725B_CODEC_REG_CR1, + 0x1f, 1, jz4725b_mix_tlv), + SOC_DOUBLE_R_TLV("Mixer Mic 1 Bypass Playback Volume", + JZ4725B_CODEC_REG_CGR5, + JZ4725B_CODEC_REG_CGR4, + REG_CGR4_GO2R_OFFSET, + 0x1f, 1, jz4725b_mix_tlv), + SOC_DOUBLE_R_TLV("Mixer Mic 2 Bypass Playback Volume", + JZ4725B_CODEC_REG_CGR7, + JZ4725B_CODEC_REG_CGR6, + REG_CGR6_GO3R_OFFSET, + 0x1f, 1, jz4725b_mix_tlv), + + SOC_DOUBLE_R_TLV("Master Playback Volume", + JZ4725B_CODEC_REG_CGR9, + JZ4725B_CODEC_REG_CGR8, + REG_CGR8_GOR_OFFSET, + 0x1f, 1, jz4725b_out_tlv), + + SOC_SINGLE("DAC Playback Switch", JZ4725B_CODEC_REG_CR1, REG_CR1_DAC_MUTE_OFFSET, 1, 1), SOC_SINGLE("Deemphasize Filter Playback Switch", @@ -180,11 +232,15 @@ static SOC_VALUE_ENUM_SINGLE_DECL(jz4725b_codec_adc_src_enum, jz4725b_codec_adc_src_texts, jz4725b_codec_adc_src_values); static const struct snd_kcontrol_new jz4725b_codec_adc_src_ctrl = - SOC_DAPM_ENUM("Route", jz4725b_codec_adc_src_enum); + SOC_DAPM_ENUM("ADC Source Capture Route", jz4725b_codec_adc_src_enum); static const struct snd_kcontrol_new jz4725b_codec_mixer_controls[] = { - SOC_DAPM_SINGLE("Line In Bypass", JZ4725B_CODEC_REG_CR1, + SOC_DAPM_SINGLE("Line In Bypass Playback Switch", JZ4725B_CODEC_REG_CR1, REG_CR1_BYPASS_OFFSET, 1, 0), + SOC_DAPM_SINGLE("Mic 1 Bypass Playback Switch", JZ4725B_CODEC_REG_CR3, + REG_CR3_SIDETONE1_OFFSET, 1, 0), + SOC_DAPM_SINGLE("Mic 2 Bypass Playback Switch", JZ4725B_CODEC_REG_CR3, + REG_CR3_SIDETONE2_OFFSET, 1, 0), }; static int jz4725b_out_stage_enable(struct snd_soc_dapm_widget *w, @@ -236,7 +292,8 @@ static const struct snd_soc_dapm_widget jz4725b_codec_dapm_widgets[] = { SND_SOC_DAPM_MIXER("DAC to Mixer", JZ4725B_CODEC_REG_CR1, REG_CR1_DACSEL_OFFSET, 0, NULL, 0), - SND_SOC_DAPM_MIXER("Line In", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("Line In", JZ4725B_CODEC_REG_PMR1, + REG_PMR1_SB_LIN_OFFSET, 1, NULL, 0), SND_SOC_DAPM_MIXER("HP Out", JZ4725B_CODEC_REG_CR1, REG_CR1_HP_DIS_OFFSET, 1, NULL, 0), @@ -278,7 +335,9 @@ static const struct snd_soc_dapm_route jz4725b_codec_dapm_routes[] = { {"Line In", NULL, "LLINEIN"}, {"Line In", NULL, "RLINEIN"}, - {"Mixer", "Line In Bypass", "Line In"}, + {"Mixer", "Mic 1 Bypass Playback Switch", "Mic 1"}, + {"Mixer", "Mic 2 Bypass Playback Switch", "Mic 2"}, + {"Mixer", "Line In Bypass Playback Switch", "Line In"}, {"DAC to Mixer", NULL, "DAC"}, {"Mixer", NULL, "DAC to Mixer"}, -- 2.36.1

2 12

[PATCH] ASoC: ak4458: add optional reset control to instead of gpio
by Shengjiu Wang 18 Oct '22

18 Oct '22

From: Viorel Suman <viorel.suman(a)nxp.com> Add optional reset control instead of GPIO to manage codec PDN pin. As there is reference counter for reset control, so need to remove one ak4458_reset in runtime resume to make the reference counter balance. Signed-off-by: Viorel Suman <viorel.suman(a)nxp.com> Signed-off-by: Shengjiu Wang <shengjiu.wang(a)nxp.com> --- sound/soc/codecs/ak4458.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/ak4458.c b/sound/soc/codecs/ak4458.c index 626310859814..ac328d598291 100644 --- a/sound/soc/codecs/ak4458.c +++ b/sound/soc/codecs/ak4458.c @@ -13,6 +13,7 @@ #include <linux/of_gpio.h> #include <linux/pm_runtime.h> #include <linux/regulator/consumer.h> +#include <linux/reset.h> #include <linux/slab.h> #include <sound/initval.h> #include <sound/pcm_params.h> @@ -46,6 +47,7 @@ struct ak4458_priv { struct device *dev; struct regmap *regmap; struct gpio_desc *reset_gpiod; + struct reset_control *reset; struct gpio_desc *mute_gpiod; int digfil; /* SSLOW, SD, SLOW bits */ int fs; /* sampling rate */ @@ -633,6 +635,12 @@ static void ak4458_reset(struct ak4458_priv *ak4458, bool active) if (ak4458->reset_gpiod) { gpiod_set_value_cansleep(ak4458->reset_gpiod, active); usleep_range(1000, 2000); + } else if (!IS_ERR_OR_NULL(ak4458->reset)) { + if (active) + reset_control_assert(ak4458->reset); + else + reset_control_deassert(ak4458->reset); + usleep_range(1000, 2000); } } @@ -668,7 +676,6 @@ static int __maybe_unused ak4458_runtime_resume(struct device *dev) if (ak4458->mute_gpiod) gpiod_set_value_cansleep(ak4458->mute_gpiod, 1); - ak4458_reset(ak4458, true); ak4458_reset(ak4458, false); regcache_cache_only(ak4458->regmap, false); @@ -748,6 +755,10 @@ static int ak4458_i2c_probe(struct i2c_client *i2c) ak4458->drvdata = of_device_get_match_data(&i2c->dev); + ak4458->reset = devm_reset_control_get_optional_shared(ak4458->dev, NULL); + if (IS_ERR(ak4458->reset)) + return PTR_ERR(ak4458->reset); + ak4458->reset_gpiod = devm_gpiod_get_optional(ak4458->dev, "reset", GPIOD_OUT_LOW); if (IS_ERR(ak4458->reset_gpiod)) -- 2.34.1

2 1

[PATCH v3 0/7] Create a new sound card to access MICFIL based on rpmsg channel
by Chancel Liu 18 Oct '22

18 Oct '22

At a previous time, we have successfully created a virtual sound card based on rpmsg. The sound card works under this mechanism Cortex-A core tells the Cortex-M core the format, rate, channel, .etc configuration of the PCM parameters and Cortex-M controls real hardware devices such as SAI and DMA. From the view of Linux side, the sound card is bound to a rpmsg channel through which it can access SAI. Here these patches are introduced to create a new virtual sound card to access MICFIL based on a new created rpmsg channel. It's easy to create a new rpmsg channel for MICFIL through rpmsg name service announcment. Also the other ASoC components bound to this rpmsg MICFIL sound card will be registered with these patches. If other sound cards using different hardware devices needs to be created over rpmsg in the future, these patches can be referred. changes in v3 - Delete the statement referring to linux drivers in dts changes in v2: - Rename property in bindings file according to Krzysztof's comments - Update codes and comments according to Shengjiu's comments Chancel Liu (7): ASoC: dt-bindings: fsl_rpmsg: Add a property to assign the rpmsg channel ASoC: imx-audio-rpmsg: Create rpmsg channel for MICFIL ASoC: imx-pcm-rpmsg: Register different platform drivers ASoC: imx-pcm-rpmsg: Multi-channel support for sound card based on rpmsg ASoC: fsl_rpmsg: Register different ASoC machine devices ASoC: fsl_rpmsg: Multi-channel support in CPU DAI driver ASoC: imx-rpmsg: Assign platform driver used by machine driver to link with .../devicetree/bindings/sound/fsl,rpmsg.yaml | 36 +++++++++++++++++-- sound/soc/fsl/fsl_rpmsg.c | 6 ++-- sound/soc/fsl/imx-audio-rpmsg.c | 3 +- sound/soc/fsl/imx-pcm-rpmsg.c | 10 ++++-- sound/soc/fsl/imx-rpmsg.c | 6 +++- 5 files changed, 51 insertions(+), 10 deletions(-) -- 2.25.1

4 15

[PATCH] ASoC: amd: Update Pink Sardine platform ACP register header
by Vijendar Mukunda 18 Oct '22

18 Oct '22

Update Pink Sardine platform ACP register header with Soundwire Controller specific registers and other ACP registers. Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda(a)amd.com> --- include/sound/acp62_chip_offset_byte.h | 214 +++++++++++++++++++++++++ 1 file changed, 214 insertions(+) diff --git a/include/sound/acp62_chip_offset_byte.h b/include/sound/acp62_chip_offset_byte.h index f03992f81168..ca38f8a0966e 100644 --- a/include/sound/acp62_chip_offset_byte.h +++ b/include/sound/acp62_chip_offset_byte.h @@ -131,6 +131,23 @@ #define ACP_I2S_WAKE_EN 0x000145C #define ACP_SW1_WAKE_EN 0x0001460 +#define ACP_SW_I2S_ERROR_REASON 0x00018B4 +#define ACP_SW_POS_TRACK_I2S_TX_CTRL 0x00018B8 +#define ACP_SW_I2S_TX_DMA_POS 0x00018BC +#define ACP_SW_POS_TRACK_BT_TX_CTRL 0x00018C0 +#define ACP_SW_BT_TX_DMA_POS 0x00018C4 +#define ACP_SW_POS_TRACK_HS_TX_CTRL 0x00018C8 +#define ACP_SW_HS_TX_DMA_POS 0x00018CC +#define ACP_SW_POS_TRACK_I2S_RX_CTRL 0x00018D0 +#define ACP_SW_I2S_RX_DMA_POS 0x00018D4 +#define ACP_SW_POS_TRACK_BT_RX_CTRL 0x00018D8 +#define ACP_SW_BT_RX_DMA_POS 0x00018DC +#define ACP_SW_POS_TRACK_HS_RX_CTRL 0x00018E0 +#define ACP_SW_HS_RX_DMA_POS 0x00018E4 +#define ACP_ERROR_INTR_MASK1 0X0001974 +#define ACP_ERROR_INTR_MASK2 0X0001978 +#define ACP_ERROR_INTR_MASK3 0X000197C + /* Registers from ACP_P1_MISC block */ #define ACP_EXTERNAL_INTR_ENB 0x0001A00 #define ACP_EXTERNAL_INTR_CNTL 0x0001A04 @@ -154,6 +171,8 @@ #define ACP_P1_SW_BT_RX_DMA_POS 0x0001A9C #define ACP_P1_SW_POS_TRACK_HS_RX_CTRL 0x0001AA0 #define ACP_P1_SW_HS_RX_DMA_POS 0x0001AA4 +#define ACP_ERROR_INTR_MASK4 0X0001AEC +#define ACP_ERROR_INTR_MASK5 0X0001AF0 /* Registers from ACP_AUDIO_BUFFERS block */ #define ACP_I2S_RX_RINGBUFADDR 0x0002000 @@ -210,6 +229,24 @@ #define ACP_HS_TX_LINEARPOSITIONCNTR_HIGH 0x00020CC #define ACP_HS_TX_LINEARPOSITIONCNTR_LOW 0x00020D0 #define ACP_HS_TX_INTR_WATERMARK_SIZE 0x00020D4 +#define ACP_AUDIO_RX_RINGBUFADDR ACP_I2S_RX_RINGBUFADDR +#define ACP_AUDIO_RX_RINGBUFSIZE ACP_I2S_RX_RINGBUFSIZE +#define ACP_AUDIO_RX_LINKPOSITIONCNTR ACP_I2S_RX_LINKPOSITIONCNTR +#define ACP_AUDIO_RX_FIFOADDR ACP_I2S_RX_FIFOADDR +#define ACP_AUDIO_RX_FIFOSIZE ACP_I2S_RX_FIFOSIZE +#define ACP_AUDIO_RX_DMA_SIZE ACP_I2S_RX_DMA_SIZE +#define ACP_AUDIO_RX_LINEARPOSITIONCNTR_HIGH ACP_I2S_RX_LINEARPOSITIONCNTR_HIGH +#define ACP_AUDIO_RX_LINEARPOSITIONCNTR_LOW ACP_I2S_RX_LINEARPOSITIONCNTR_LOW +#define ACP_AUDIO_RX_INTR_WATERMARK_SIZE ACP_I2S_RX_INTR_WATERMARK_SIZE +#define ACP_AUDIO_TX_RINGBUFADDR ACP_I2S_TX_RINGBUFADDR +#define ACP_AUDIO_TX_RINGBUFSIZE ACP_I2S_TX_RINGBUFSIZE +#define ACP_AUDIO_TX_LINKPOSITIONCNTR ACP_I2S_TX_LINKPOSITIONCNTR +#define ACP_AUDIO_TX_FIFOADDR ACP_I2S_TX_FIFOADDR +#define ACP_AUDIO_TX_FIFOSIZE ACP_I2S_TX_FIFOSIZE +#define ACP_AUDIO_TX_DMA_SIZE ACP_I2S_TX_DMA_SIZE +#define ACP_AUDIO_TX_LINEARPOSITIONCNTR_HIGH ACP_I2S_TX_LINEARPOSITIONCNTR_HIGH +#define ACP_AUDIO_TX_LINEARPOSITIONCNTR_LOW ACP_I2S_TX_LINEARPOSITIONCNTR_LOW +#define ACP_AUDIO_TX_INTR_WATERMARK_SIZE ACP_I2S_TX_INTR_WATERMARK_SIZE /* Registers from ACP_I2S_TDM block */ #define ACP_I2STDM_IER 0x0002400 @@ -255,6 +292,102 @@ #define ACP_WOV_ERROR_STATUS_REGISTER 0x0002C68 #define ACP_PDM_CLKDIV 0x0002C6C +/* Registers from ACP_SW_SWCLK block */ +#define ACP_SW_EN 0x0003000 +#define ACP_SW_EN_STATUS 0x0003004 +#define ACP_SW_FRAMESIZE 0x0003008 +#define ACP_SW_SSP_COUNTER 0x000300C +#define ACP_SW_AUDIO_TX_EN 0x0003010 +#define ACP_SW_AUDIO_TX_EN_STATUS 0x0003014 +#define ACP_SW_AUDIO_TX_FRAME_FORMAT 0x0003018 +#define ACP_SW_AUDIO_TX_SAMPLEINTERVAL 0x000301C +#define ACP_SW_AUDIO_TX_HCTRL_DP0 0x0003020 +#define ACP_SW_AUDIO_TX_HCTRL_DP1 0x0003024 +#define ACP_SW_AUDIO_TX_HCTRL_DP2 0x0003028 +#define ACP_SW_AUDIO_TX_HCTRL_DP3 0x000302C +#define ACP_SW_AUDIO_TX_OFFSET_DP0 0x0003030 +#define ACP_SW_AUDIO_TX_OFFSET_DP1 0x0003034 +#define ACP_SW_AUDIO_TX_OFFSET_DP2 0x0003038 +#define ACP_SW_AUDIO_TX_OFFSET_DP3 0x000303C +#define ACP_SW_AUDIO_TX_CHANNEL_ENABLE_DP0 0x0003040 +#define ACP_SW_AUDIO_TX_CHANNEL_ENABLE_DP1 0x0003044 +#define ACP_SW_AUDIO_TX_CHANNEL_ENABLE_DP2 0x0003048 +#define ACP_SW_AUDIO_TX_CHANNEL_ENABLE_DP3 0x000304C +#define ACP_SW_BT_TX_EN 0x0003050 +#define ACP_SW_BT_TX_EN_STATUS 0x0003054 +#define ACP_SW_BT_TX_FRAME_FORMAT 0x0003058 +#define ACP_SW_BT_TX_SAMPLEINTERVAL 0x000305C +#define ACP_SW_BT_TX_HCTRL 0x0003060 +#define ACP_SW_BT_TX_OFFSET 0x0003064 +#define ACP_SW_BT_TX_CHANNEL_ENABLE_DP0 0x0003068 +#define ACP_SW_HEADSET_TX_EN 0x000306C +#define ACP_SW_HEADSET_TX_EN_STATUS 0x0003070 +#define ACP_SW_HEADSET_TX_FRAME_FORMAT 0x0003074 +#define ACP_SW_HEADSET_TX_SAMPLEINTERVAL 0x0003078 +#define ACP_SW_HEADSET_TX_HCTRL 0x000307C +#define ACP_SW_HEADSET_TX_OFFSET 0x0003080 +#define ACP_SW_HEADSET_TX_CHANNEL_ENABLE_DP0 0x0003084 +#define ACP_SW_AUDIO_RX_EN 0x0003088 +#define ACP_SW_AUDIO_RX_EN_STATUS 0x000308C +#define ACP_SW_AUDIO_RX_FRAME_FORMAT 0x0003090 +#define ACP_SW_AUDIO_RX_SAMPLEINTERVAL 0x0003094 +#define ACP_SW_AUDIO_RX_HCTRL_DP0 0x0003098 +#define ACP_SW_AUDIO_RX_HCTRL_DP1 0x000309C +#define ACP_SW_AUDIO_RX_HCTRL_DP2 0x0003100 +#define ACP_SW_AUDIO_RX_HCTRL_DP3 0x0003104 +#define ACP_SW_AUDIO_RX_OFFSET_DP0 0x0003108 +#define ACP_SW_AUDIO_RX_OFFSET_DP1 0x000310C +#define ACP_SW_AUDIO_RX_OFFSET_DP2 0x0003110 +#define ACP_SW_AUDIO_RX_OFFSET_DP3 0x0003114 +#define ACP_SW_AUDIO_RX_CHANNEL_ENABLE_DP0 0x0003118 +#define ACP_SW_AUDIO_RX_CHANNEL_ENABLE_DP1 0x000311C +#define ACP_SW_AUDIO_RX_CHANNEL_ENABLE_DP2 0x0003120 +#define ACP_SW_AUDIO_RX_CHANNEL_ENABLE_DP3 0x0003124 +#define ACP_SW_BT_RX_EN 0x0003128 +#define ACP_SW_BT_RX_EN_STATUS 0x000312C +#define ACP_SW_BT_RX_FRAME_FORMAT 0x0003130 +#define ACP_SW_BT_RX_SAMPLEINTERVAL 0x0003134 +#define ACP_SW_BT_RX_HCTRL 0x0003138 +#define ACP_SW_BT_RX_OFFSET 0x000313C +#define ACP_SW_BT_RX_CHANNEL_ENABLE_DP0 0x0003140 +#define ACP_SW_HEADSET_RX_EN 0x0003144 +#define ACP_SW_HEADSET_RX_EN_STATUS 0x0003148 +#define ACP_SW_HEADSET_RX_FRAME_FORMAT 0x000314C +#define ACP_SW_HEADSET_RX_SAMPLEINTERVAL 0x0003150 +#define ACP_SW_HEADSET_RX_HCTRL 0x0003154 +#define ACP_SW_HEADSET_RX_OFFSET 0x0003158 +#define ACP_SW_HEADSET_RX_CHANNEL_ENABLE_DP0 0x000315C +#define ACP_SW_BPT_PORT_EN 0x0003160 +#define ACP_SW_BPT_PORT_EN_STATUS 0x0003164 +#define ACP_SW_BPT_PORT_FRAME_FORMAT 0x0003168 +#define ACP_SW_BPT_PORT_SAMPLEINTERVAL 0x000316C +#define ACP_SW_BPT_PORT_HCTRL 0x0003170 +#define ACP_SW_BPT_PORT_OFFSET 0x0003174 +#define ACP_SW_BPT_PORT_CHANNEL_ENABLE 0x0003178 +#define ACP_SW_BPT_PORT_FIRST_BYTE_ADDR 0x000317C +#define ACP_SW_CLK_RESUME_CTRL 0x0003180 +#define ACP_SW_CLK_RESUME_DELAY_CNTR 0x0003184 +#define ACP_SW_BUS_RESET_CTRL 0x0003188 +#define ACP_SW_PRBS_ERR_STATUS 0x000318C +#define SW_IMM_CMD_UPPER_WORD 0x0003230 +#define SW_IMM_CMD_LOWER_QWORD 0x0003234 +#define SW_IMM_RESP_UPPER_WORD 0x0003238 +#define SW_IMM_RESP_LOWER_QWORD 0x000323C +#define SW_IMM_CMD_STS 0x0003240 +#define SW_BRA_BASE_ADDRESS 0x0003244 +#define SW_BRA_TRANSFER_SIZE 0x0003248 +#define SW_BRA_DMA_BUSY 0x000324C +#define SW_BRA_RESP 0x0003250 +#define SW_BRA_RESP_FRAME_ADDR 0x0003254 +#define SW_BRA_CURRENT_TRANSFER_SIZE 0x0003258 +#define SW_STATE_CHANGE_STATUS_0TO7 0x000325C +#define SW_STATE_CHANGE_STATUS_8TO11 0x0003260 +#define SW_STATE_CHANGE_STATUS_MASK_0TO7 0x0003264 +#define SW_STATE_CHANGE_STATUS_MASK_8TO11 0x0003268 +#define SW_CLK_FREQUENCY_CTRL 0x000326C +#define SW_ERROR_INTR_MASK 0x0003270 +#define SW_PHY_TEST_MODE_DATA_OFF 0x0003274 + /* Registers from ACP_P1_AUDIO_BUFFERS block */ #define ACP_P1_I2S_RX_RINGBUFADDR 0x0003A00 #define ACP_P1_I2S_RX_RINGBUFSIZE 0x0003A04 @@ -310,6 +443,87 @@ #define ACP_P1_HS_TX_LINEARPOSITIONCNTR_HIGH 0x0003ACC #define ACP_P1_HS_TX_LINEARPOSITIONCNTR_LOW 0x0003AD0 #define ACP_P1_HS_TX_INTR_WATERMARK_SIZE 0x0003AD4 +#define ACP_P1_AUDIO_RX_RINGBUFADDR ACP_P1_I2S_RX_RINGBUFADDR +#define ACP_P1_AUDIO_RX_RINGBUFSIZE ACP_P1_I2S_RX_RINGBUFSIZE +#define ACP_P1_AUDIO_RX_LINKPOSITIONCNTR ACP_P1_I2S_RX_LINKPOSITIONCNTR +#define ACP_P1_AUDIO_RX_FIFOADDR ACP_P1_I2S_RX_FIFOADDR +#define ACP_P1_AUDIO_RX_FIFOSIZE ACP_P1_I2S_RX_FIFOSIZE +#define ACP_P1_AUDIO_RX_DMA_SIZE ACP_P1_I2S_RX_DMA_SIZE +#define ACP_P1_AUDIO_RX_LINEARPOSITIONCNTR_HIGH ACP_P1_I2S_RX_LINEARPOSITIONCNTR_HIGH +#define ACP_P1_AUDIO_RX_LINEARPOSITIONCNTR_LOW ACP_P1_I2S_RX_LINEARPOSITIONCNTR_LOW +#define ACP_P1_AUDIO_RX_INTR_WATERMARK_SIZE ACP_P1_I2S_RX_INTR_WATERMARK_SIZE +#define ACP_P1_AUDIO_TX_RINGBUFADDR ACP_P1_I2S_TX_RINGBUFADDR +#define ACP_P1_AUDIO_TX_RINGBUFSIZE ACP_P1_I2S_TX_RINGBUFSIZE +#define ACP_P1_AUDIO_TX_LINKPOSITIONCNTR ACP_P1_I2S_TX_LINKPOSITIONCNTR +#define ACP_P1_AUDIO_TX_FIFOADDR ACP_P1_I2S_TX_FIFOADDR +#define ACP_P1_AUDIO_TX_FIFOSIZE ACP_P1_I2S_TX_FIFOSIZE +#define ACP_P1_AUDIO_TX_DMA_SIZE ACP_P1_I2S_TX_DMA_SIZE +#define ACP_P1_AUDIO_TX_LINEARPOSITIONCNTR_HIGH ACP_P1_I2S_TX_LINEARPOSITIONCNTR_HIGH +#define ACP_P1_AUDIO_TX_LINEARPOSITIONCNTR_LOW ACP_P1_I2S_TX_LINEARPOSITIONCNTR_LOW +#define ACP_P1_AUDIO_TX_INTR_WATERMARK_SIZE ACP_P1_I2S_TX_INTR_WATERMARK_SIZE + +/* Registers from ACP_P1_SW_SWCLK block */ +#define ACP_P1_SW_EN 0x0003C00 +#define ACP_P1_SW_EN_STATUS 0x0003C04 +#define ACP_P1_SW_FRAMESIZE 0x0003C08 +#define ACP_P1_SW_SSP_COUNTER 0x0003C0C +#define ACP_P1_SW_BT_TX_EN 0x0003C50 +#define ACP_P1_SW_BT_TX_EN_STATUS 0x0003C54 +#define ACP_P1_SW_BT_TX_FRAME_FORMAT 0x0003C58 +#define ACP_P1_SW_BT_TX_SAMPLEINTERVAL 0x0003C5C +#define ACP_P1_SW_BT_TX_HCTRL 0x0003C60 +#define ACP_P1_SW_BT_TX_OFFSET 0x0003C64 +#define ACP_P1_SW_BT_TX_CHANNEL_ENABLE_DP0 0x0003C68 +#define ACP_P1_SW_BT_RX_EN 0x0003D28 +#define ACP_P1_SW_BT_RX_EN_STATUS 0x0003D2C +#define ACP_P1_SW_BT_RX_FRAME_FORMAT 0x0003D30 +#define ACP_P1_SW_BT_RX_SAMPLEINTERVAL 0x0003D34 +#define ACP_P1_SW_BT_RX_HCTRL 0x0003D38 +#define ACP_P1_SW_BT_RX_OFFSET 0x0003D3C +#define ACP_P1_SW_BT_RX_CHANNEL_ENABLE_DP0 0x0003D40 +#define ACP_P1_SW_BPT_PORT_EN 0x0003D60 +#define ACP_P1_SW_BPT_PORT_EN_STATUS 0x0003D64 +#define ACP_P1_SW_BPT_PORT_FRAME_FORMAT 0x0003D68 +#define ACP_P1_SW_BPT_PORT_SAMPLEINTERVAL 0x0003D6C +#define ACP_P1_SW_BPT_PORT_HCTRL 0x0003D70 +#define ACP_P1_SW_BPT_PORT_OFFSET 0x0003D74 +#define ACP_P1_SW_BPT_PORT_CHANNEL_ENABLE 0x0003D78 +#define ACP_P1_SW_BPT_PORT_FIRST_BYTE_ADDR 0x0003D7C +#define ACP_P1_SW_CLK_RESUME_CTRL 0x0003D80 +#define ACP_P1_SW_CLK_RESUME_DELAY_CNTR 0x0003D84 +#define ACP_P1_SW_BUS_RESET_CTRL 0x0003D88 +#define ACP_P1_SW_PRBS_ERR_STATUS 0x0003D8C + +/* Registers from ACP_P1_SW_ACLK block */ +#define P1_SW_CORB_BASE_ADDRESS 0x0003E00 +#define P1_SW_CORB_WRITE_POINTER 0x0003E04 +#define P1_SW_CORB_READ_POINTER 0x0003E08 +#define P1_SW_CORB_CONTROL 0x0003E0C +#define P1_SW_CORB_SIZE 0x0003E14 +#define P1_SW_RIRB_BASE_ADDRESS 0x0003E18 +#define P1_SW_RIRB_WRITE_POINTER 0x0003E1C +#define P1_SW_RIRB_RESPONSE_INTERRUPT_COUNT 0x0003E20 +#define P1_SW_RIRB_CONTROL 0x0003E24 +#define P1_SW_RIRB_SIZE 0x0003E28 +#define P1_SW_RIRB_FIFO_MIN_THDL 0x0003E2C +#define P1_SW_IMM_CMD_UPPER_WORD 0x0003E30 +#define P1_SW_IMM_CMD_LOWER_QWORD 0x0003E34 +#define P1_SW_IMM_RESP_UPPER_WORD 0x0003E38 +#define P1_SW_IMM_RESP_LOWER_QWORD 0x0003E3C +#define P1_SW_IMM_CMD_STS 0x0003E40 +#define P1_SW_BRA_BASE_ADDRESS 0x0003E44 +#define P1_SW_BRA_TRANSFER_SIZE 0x0003E48 +#define P1_SW_BRA_DMA_BUSY 0x0003E4C +#define P1_SW_BRA_RESP 0x0003E50 +#define P1_SW_BRA_RESP_FRAME_ADDR 0x0003E54 +#define P1_SW_BRA_CURRENT_TRANSFER_SIZE 0x0003E58 +#define P1_SW_STATE_CHANGE_STATUS_0TO7 0x0003E5C +#define P1_SW_STATE_CHANGE_STATUS_8TO11 0x0003E60 +#define P1_SW_STATE_CHANGE_STATUS_MASK_0TO7 0x0003E64 +#define P1_SW_STATE_CHANGE_STATUS_MASK_8TO11 0x0003E68 +#define P1_SW_CLK_FREQUENCY_CTRL 0x0003E6C +#define P1_SW_ERROR_INTR_MASK 0x0003E70 +#define P1_SW_PHY_TEST_MODE_DATA_OFF 0x0003E74 /* Registers from ACP_SCRATCH block */ #define ACP_SCRATCH_REG_0 0x0010000 -- 2.25.1

2 1

Thanks to review question [PATCH V2 1/2] ASoc:codes:Add Awinic AW883XX audio amplifier driver
by wangweidong.a＠awinic.com 18 Oct '22

18 Oct '22

HI: Mark Brown Thank you very much for your help. I will correct these problems. Best regards, Weidong Wang On Mon, Oct 17, 2022 at 04:09:12PM +0800, wangweidong.a(a)awinic.com wrote: > Hi: Mark Brown > > Thank you for your suggestion. I will fix the problem you raised in > the next patch, but there is still a question here and I want to > discuss it with you > > This is rather too big to go through in one go so the review here is > very high level but that's probably a good level for initial review > here as there Please fix your mail client to clearly identify quoted text, as you can see above it's very dificult for me to tell where you've replied to my mail. > > + if (mute) { > > + aw883xx->pstream = AW883XX_STREAM_CLOSE; > > + cancel_delayed_work_sync(&aw883xx->start_work); > > + mutex_lock(&aw883xx->lock); > > + aw883xx_device_stop(aw883xx->aw_pa); > > + mutex_unlock(&aw883xx->lock); > > + } else { > > + aw883xx->pstream = AW883XX_STREAM_OPEN; > > + mutex_lock(&aw883xx->lock); > > + aw883xx_start(aw883xx, AW_ASYNC_START); > > + aw883xx_hold_dsp_spin_st(&aw883xx->aw_pa->spin_desc); > > + mutex_unlock(&aw883xx->lock); > > + } > > This doesn't look like a mute operation, it looks like it's starting > and stopping the DSP. > > Answer: This is a mute operation ,aw883xx_device_stop is called in th > aw883xx_mute function. This function not only executes the mute > function aw883xx_dev_mute, but also disables dsp and power down. This > is for the aw883xx chip low power optimization. Then it's not a mute function, the goal of the mute function is to run before all the power management code to minimise glitches during power management. Just implement the power management via the standard ASoC power management APIs. > > + aw883xx_dev_set_fade_time(ucontrol->value.integer.value[0], true); > > + > > + aw_pr_dbg("step time %ld", ucontrol->value.integer.value[0]); > > + return 0; > > +} > > If a control write changes a value it should return 1, you should run > the mixer-test selftest which will identify this and a number of other issues. tools/testing/selftests/alsa > Answer: Could you tell me what is mixer-test selftest? I have checked > other drivers, and there is no return 1. Are you *sure* there's none? Other drivers being buggy isn't a good reason to introduce more bugs.

1 0

[PATCH v2 00/11] arm64/slimbus/dt-bindings: convert to DT Schema, minor cleanups
by Krzysztof Kozlowski 18 Oct '22

18 Oct '22

Hi, Changes since v1 ================ 1. Fix commit title typo (Steev). 2. Add Rb/Tb tags. Dependencies ============ No dependencies. Binding patches are independent from DTS. Best regards, Krzysztof Krzysztof Kozlowski (11): arm64: dts: qcom: sdm845: drop unused slimbus properties arm64: dts: qcom: msm8996: drop unused slimbus reg-mames arm64: dts: qcom: sdm845: correct slimbus children unit addresses arm64: dts: qcom: mms8996: correct slimbus children unit addresses arm64: dts: qcom: sdm845: drop unused slimbus dmas arm64: dts: qcom: msm8996: drop unused slimbus dmas arm64: dts: qcom: sdm845: align node names with DT schema arm64: dts: qcom: msm8996: align node names with DT schema dt-bindings: slimbus: convert bus description to DT schema dt-bindings: slimbus: qcom,slim: convert to DT schema dt-bindings: slimbus: qcom,slim-ngd: convert to DT schema .../devicetree/bindings/slimbus/bus.txt | 60 --------- .../bindings/slimbus/qcom,slim-ngd.yaml | 120 ++++++++++++++++++ .../bindings/slimbus/qcom,slim.yaml | 86 +++++++++++++ .../bindings/slimbus/slim-ngd-qcom-ctrl.txt | 84 ------------ .../bindings/slimbus/slim-qcom-ctrl.txt | 39 ------ .../devicetree/bindings/slimbus/slimbus.yaml | 95 ++++++++++++++ arch/arm64/boot/dts/qcom/msm8996.dtsi | 18 ++- arch/arm64/boot/dts/qcom/sdm845.dtsi | 16 +-- 8 files changed, 315 insertions(+), 203 deletions(-) delete mode 100644 Documentation/devicetree/bindings/slimbus/bus.txt create mode 100644 Documentation/devicetree/bindings/slimbus/qcom,slim-ngd.yaml create mode 100644 Documentation/devicetree/bindings/slimbus/qcom,slim.yaml delete mode 100644 Documentation/devicetree/bindings/slimbus/slim-ngd-qcom-ctrl.txt delete mode 100644 Documentation/devicetree/bindings/slimbus/slim-qcom-ctrl.txt create mode 100644 Documentation/devicetree/bindings/slimbus/slimbus.yaml -- 2.34.1

2 12

[PATCH 00/12] ASoC/qcom/remoteproc/arm64: Qualcomm ADSP DTS and binding fixes
by Krzysztof Kozlowski 18 Oct '22

18 Oct '22

Hi, Dependencies/merging ==================== 1. The DTS patches are independent. 2. The binding patches should come together, because of context changes. Could be one of: Qualcomm SoC, ASoC or DT tree. Best regards, Krzysztof Krzysztof Kozlowski (12): arm64: dts: qcom: sdm630: align APR services node names with dtschema arm64: dts: qcom: sdm845: align APR services node names with dtschema arm64: dts: qcom: sm8250: align APR services node names with dtschema arm64: dts: qcom: msm8996: fix APR services nodes arm64: dts: qcom: sdm845: align dai node names with dtschema arm64: dts: qcom: msm8996: align dai node names with dtschema arm64: dts: qcom: qrb5165-rb5: align dai node names with dtschema arm64: dts: qcom: sm8250: use generic name for LPASS clock controller dt-bindings: soc: qcom: apr: correct service children ASoC: dt-bindings: qcom,q6dsp-lpass-ports: cleanup example ASoC: dt-bindings: qcom,q6dsp-lpass-clocks: cleanup example dt-bindings: soc: qcom: apr: add missing properties .../bindings/soc/qcom/qcom,apr.yaml | 85 ++++++++++++++++--- .../sound/qcom,q6dsp-lpass-clocks.yaml | 30 +++---- .../sound/qcom,q6dsp-lpass-ports.yaml | 30 +++---- arch/arm64/boot/dts/qcom/msm8996.dtsi | 10 +-- arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 4 +- arch/arm64/boot/dts/qcom/sdm630.dtsi | 8 +- arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 2 +- .../boot/dts/qcom/sdm845-xiaomi-beryllium.dts | 2 +- .../boot/dts/qcom/sdm845-xiaomi-polaris.dts | 4 +- arch/arm64/boot/dts/qcom/sdm845.dtsi | 8 +- arch/arm64/boot/dts/qcom/sm8250.dtsi | 10 +-- 11 files changed, 124 insertions(+), 69 deletions(-) -- 2.34.1

5 17

controlC1 no longer show up after USBDEVFS_DISCONNECT
by GitHub issues - opened 17 Oct '22

17 Oct '22

alsa-project/alsa-lib issue #276 was opened from robertwu1: After running the following IOCTL on some MIDI devices, the control C1 device node is gone. ~~~ struct usbdevfs_ioctl ctl; ctl.ifno = interface; // MIDI interface ctl.ioctl_code = USBDEVFS_DISCONNECT; ctl.data = NULL; return ioctl(device->fd, USBDEVFS_IOCTL, &ctl); ~~~ Under /dev/snd, the following disappears: controlC1, midiC1D0, pcmC1D0c, pcmC1D0p. MidiControl, AudioStreaming, and AudioControl are under separate interfaces. If some of these were to disappear, I expect only midiC1D0 to disappear. I've tested the following devices: /dev/snd looks the same after USBDEVFS_DISCONNECT: PreSonus AudioBox 96, Alesis iO4, Komplete Audio 6. controlC1, midiC1D0, pcmC1D0c, pcmC1D0p are gone: PreSonus Studio 26c, Yamaha AG06. Here is a public Android bug of users having issues of this on Android: https://issuetracker.google.com/issues/251050530 Issue URL : https://github.com/alsa-project/alsa-lib/issues/276 Repository URL: https://github.com/alsa-project/alsa-lib

1 0

[rft, PATCH v2 00/36] pinctrl: Clean up and add missed headers
by Andy Shevchenko 17 Oct '22

17 Oct '22

Currently the header inclusion inside the pinctrl headers seems more arbitrary than logical. This series is basically out of two parts: - add missed headers to the pin control drivers / users - clean up the headers of pin control subsystem The idea is to have this series to be pulled after -rc1 by the GPIO and pin control subsystems, so all new drivers will utilize cleaned up headers of the pin control. Please, review and comment. Changelog v2: - added preparatory patches: all, but last (LKP) - added missed forward declaration to the last patch (LKP) Andy Shevchenko (36): gpiolib: tegra186: Add missed header(s) gpiolib: cdev: Add missed header(s) media: c8sectpfe: Add missed header(s) pinctrl: actions: Add missed header(s) pinctrl: aspeed: Add missed header(s) pinctrl: at91: Add missed header(s) pinctrl: axp209: Add missed header(s) pinctrl: bcm: Add missed header(s) pinctrl: cygnus-mux: Add missed header(s) pinctrl: imx: Add missed header(s) pinctrl: ingenic: Add missed header(s) pinctrl: k210: Add missed header(s) pinctrl: lochnagar: Add missed header(s) pinctrl: mediatek: Add missed header(s) pinctrl: mvebu: Add missed header(s) pinctrl: npcm7xx: Add missed header(s) pinctrl: ocelot: Add missed header(s) pinctrl: qcom: Add missed header(s) pinctrl: renesas: Add missed header(s) pinctrl: samsung: Add missed header(s) pinctrl: single: Add missed header(s) pinctrl: spear: Add missed header(s) pinctrl: sprd: Add missed header(s) pinctrl: st: Add missed header(s) pinctrl: starfive: Add missed header(s) pinctrl: stm32: Add missed header(s) pinctrl: stmfx: Add missed header(s) pinctrl: tegra: Add missed header(s) pinctrl: ti-iodelay: Add missed header(s) pinctrl: uniphier: Add missed header(s) pinctrl: zynqmp: Add missed header(s) pinctrl: cherryview: Add missed header(s) pinctrl: lynxpoint: Add missed header(s) pinctrl: merrifield: Add missed header(s) pinctrl: intel: Add missed header(s) pinctrl: Clean up headers drivers/gpio/gpio-tegra186.c | 3 +- drivers/gpio/gpiolib-cdev.c | 6 ++-- .../st/sti/c8sectpfe/c8sectpfe-core.c | 8 +++-- drivers/pinctrl/actions/pinctrl-owl.c | 10 +++--- drivers/pinctrl/aspeed/pinctrl-aspeed.c | 1 + drivers/pinctrl/bcm/pinctrl-bcm281xx.c | 13 +++++--- drivers/pinctrl/bcm/pinctrl-cygnus-mux.c | 9 ++++-- drivers/pinctrl/bcm/pinctrl-iproc-gpio.c | 12 ++++--- drivers/pinctrl/bcm/pinctrl-ns2-mux.c | 8 +++-- drivers/pinctrl/bcm/pinctrl-nsp-mux.c | 8 +++-- drivers/pinctrl/cirrus/pinctrl-lochnagar.c | 6 ++-- drivers/pinctrl/core.c | 19 ++++++------ drivers/pinctrl/core.h | 12 ++++++- drivers/pinctrl/devicetree.h | 6 ++++ drivers/pinctrl/freescale/pinctrl-imx.c | 8 +++-- drivers/pinctrl/intel/pinctrl-cherryview.c | 6 ++-- drivers/pinctrl/intel/pinctrl-intel.c | 6 ++-- drivers/pinctrl/intel/pinctrl-lynxpoint.c | 6 ++-- drivers/pinctrl/intel/pinctrl-merrifield.c | 4 ++- drivers/pinctrl/mediatek/pinctrl-moore.c | 3 ++ drivers/pinctrl/mediatek/pinctrl-paris.c | 5 +++ drivers/pinctrl/mvebu/pinctrl-mvebu.c | 14 +++++---- drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c | 11 ++++--- drivers/pinctrl/pinconf.h | 10 ++++++ drivers/pinctrl/pinctrl-at91-pio4.c | 10 ++++-- drivers/pinctrl/pinctrl-at91.c | 16 +++++----- drivers/pinctrl/pinctrl-axp209.c | 8 +++-- drivers/pinctrl/pinctrl-ingenic.c | 10 +++--- drivers/pinctrl/pinctrl-k210.c | 12 ++++--- drivers/pinctrl/pinctrl-ocelot.c | 10 +++--- drivers/pinctrl/pinctrl-single.c | 5 ++- drivers/pinctrl/pinctrl-st.c | 21 ++++++++----- drivers/pinctrl/pinctrl-stmfx.c | 2 ++ drivers/pinctrl/pinctrl-utils.h | 5 +++ drivers/pinctrl/pinctrl-zynqmp.c | 4 ++- drivers/pinctrl/pinmux.c | 17 +++++----- drivers/pinctrl/pinmux.h | 11 +++++++ drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 8 +++-- drivers/pinctrl/qcom/pinctrl-spmi-mpp.c | 8 +++-- drivers/pinctrl/renesas/pinctrl-rzg2l.c | 7 +++-- drivers/pinctrl/renesas/pinctrl-rzv2m.c | 4 ++- drivers/pinctrl/renesas/pinctrl.c | 8 +++-- drivers/pinctrl/samsung/pinctrl-samsung.c | 11 ++++--- drivers/pinctrl/spear/pinctrl-spear.c | 6 ++-- drivers/pinctrl/sprd/pinctrl-sprd.c | 6 ++-- .../starfive/pinctrl-starfive-jh7100.c | 2 ++ drivers/pinctrl/stm32/pinctrl-stm32.c | 16 +++++----- drivers/pinctrl/tegra/pinctrl-tegra.c | 6 ++-- drivers/pinctrl/ti/pinctrl-ti-iodelay.c | 8 +++-- .../pinctrl/uniphier/pinctrl-uniphier-core.c | 8 +++-- include/linux/pinctrl/consumer.h | 31 +++++++++---------- include/linux/pinctrl/devinfo.h | 6 ++-- include/linux/pinctrl/machine.h | 8 +++-- include/linux/pinctrl/pinconf-generic.h | 23 ++++++++------ include/linux/pinctrl/pinctrl.h | 18 +++++------ include/linux/pinctrl/pinmux.h | 5 ++- 56 files changed, 328 insertions(+), 186 deletions(-) base-commit: 9d157c89c5569f0ef560b7a5b2d7bf59ae98499c -- 2.35.1

11 61

Reply to review question [PATCH V2 1/2] ASoc:codes:Add Awinic AW883XX audio amplifier driver
by wangweidong.a＠awinic.com 17 Oct '22

17 Oct '22

Hi: Mark Brown Thank you for your suggestion. I will fix the problem you raised in the next patch, but there is still a question here and I want to discuss it with you This is rather too big to go through in one go so the review here is very high level but that's probably a good level for initial review here as there are a lot of stylistic and structural problems. This doesn't really look like a Linux driver, it's not following the standard patterns or using standard frameworks in normal ways. It'd be good for you to look at how other drivers for similar devices are implemented and ensure that this driver looks similar, where a driver does something very different to other drivers that's usually a sign there's something up. > --- > sound/soc/codecs/Kconfig | 10 + > sound/soc/codecs/Makefile | 4 + > sound/soc/codecs/aw883xx/aw883xx.c | 2734 +++++++++++++++++++++++ > sound/soc/codecs/aw883xx/aw883xx.h | 213 ++ > sound/soc/codecs/aw883xx/aw883xx_bin_parse.c | 1392 ++++++++++++ > sound/soc/codecs/aw883xx/aw883xx_bin_parse.h | 145 ++ > sound/soc/codecs/aw883xx/aw883xx_calib.c | 2534 +++++++++++++++++++++ > sound/soc/codecs/aw883xx/aw883xx_calib.h | 154 ++ > sound/soc/codecs/aw883xx/aw883xx_data_type.h | 157 ++ > sound/soc/codecs/aw883xx/aw883xx_device.c | 1734 ++++++++++++++ > sound/soc/codecs/aw883xx/aw883xx_device.h | 557 +++++ > sound/soc/codecs/aw883xx/aw883xx_init.c | 649 ++++++ > sound/soc/codecs/aw883xx/aw883xx_log.h | 32 + > sound/soc/codecs/aw883xx/aw883xx_monitor.c | 1197 ++++++++++ > sound/soc/codecs/aw883xx/aw883xx_monitor.h | 167 ++ > sound/soc/codecs/aw883xx/aw883xx_pid_2049_reg.h | 2388 ++++++++++++++++++++ > sound/soc/codecs/aw883xx/aw883xx_spin.c | 807 +++++++ > sound/soc/codecs/aw883xx/aw883xx_spin.h | 80 + > 18 files changed, 14954 insertions(+) This should as I previously suggested probably be split into multiple patches, adding the build integration at the end to preserve bisection. Answer: I modified and sent the patch to patch v3 as required > +#define AW883XX_DRIVER_VERSION "v1.3.0" The versioning for the overall kernel is enough, we don't track versions for individual drivers. Answer: I will fix this problem in patch v3. > +static unsigned int g_aw883xx_dev_cnt; static > +DEFINE_MUTEX(g_aw883xx_lock); static struct aw_container > +*g_awinic_cfg; If you're using globals there's something wrong with your driver design, everything should be working with the driver data. Answer: I will not use global variables in patch v3 > +static const char *const aw883xx_switch[] = {"Disable", "Enable"}; Simple on/off switches should be normal Switch controls not enums. Answer: I will fix this problem in patch v3. > +static int aw883xx_platform_init(struct aw883xx *aw883xx) { #ifdef > +AW_QCOM_PLATFORM > + aw883xx->aw_pa->platform = AW_QCOM; > + return 0; > +#elif defined AW_MTK_PLATFORM > + aw883xx->aw_pa->platform = AW_MTK; > + return 0; > +#elif defined AW_SPRD_PLATFORM > + aw883xx->aw_pa->platform = AW_SPRD; > + return 0; > +#else > + return -EINVAL; > +#endif > +} This is not how we do configuration for platforms in Linux, we build single kernel images that support multiple systems so build time configuration really doesn't work, and in any case selecting by SoC vendor isn't going to account for how people design their individual boards. The driver should use some combination of DT and ACPI to figure out whatever configuration it needs, though a lot of what's here looks like it should just be in the machine driver. The driver for a device should just support that device. Answer: I will fix this problem in patch v3. > +/* > + * aw883xx append suffix sound channel information */ static void > +*aw883xx_devm_kstrdup(struct device *dev, char *buf) { > + char *str = NULL; > + > + str = devm_kzalloc(dev, strlen(buf) + 1, GFP_KERNEL); > + if (!str) > + return str; > + memcpy(str, buf, strlen(buf)); > + return str; > +} This is just devm_kstrdup(). Answer: I will fix this problem in patch v3. > +/* > + * aw883xx distinguish between codecs and components by version */ > +#ifdef AW_KERNEL_VER_OVER_4_19_1 Don't include any support for old kernels in upstream submissions. Answer: I will fix this problem in patch v3. > +int aw883xx_i2c_writes(struct aw883xx *aw883xx, > + uint8_t reg_addr, uint8_t *buf, uint16_t len) { > + int ret = -1; > + uint8_t *data = NULL; > + > + data = kmalloc(len + 1, GFP_KERNEL); > + if (data == NULL) > + return -ENOMEM; > + > + data[0] = reg_addr; > + memcpy(&data[1], buf, len); > + > + ret = i2c_master_send(aw883xx->i2c, data, len + 1); I can't see why this isn't just using regmap. All the actual I/O appears to be via a 16 bit regmap. Answer: I will fix this problem in patch v3. > +/* > + * aw883xx interrupt > + */ > +static void aw883xx_interrupt_work(struct work_struct *work) { > + struct aw883xx *aw883xx = container_of(work, > + struct aw883xx, interrupt_work.work); > + int16_t reg_value = 0; > + int ret = -1; > + > + aw_dev_info(aw883xx->dev, "enter"); The driver should be quiet in normal operation unless thre is some error or it's reading back identifying information from the hardware. Answer: I will fix this problem in patch v3. > + /*read reg value*/ > + ret = aw883xx_dev_get_int_status(aw883xx->aw_pa, &reg_value); > + if (ret < 0) > + aw_dev_err(aw883xx->dev, "get init_reg value failed"); > + else > + aw_dev_info(aw883xx->dev, "int value 0x%x", reg_value); > + > + /*clear init reg*/ > + aw883xx_dev_clear_int_status(aw883xx->aw_pa); > + > + /*unmask interrupt*/ > + aw883xx_dev_set_intmask(aw883xx->aw_pa, true); } This doesn't actually do anything with the interrupt? Answer: I will fix this problem in patch v3. > +static int aw883xx_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) > +{ > + aw_snd_soc_codec_t *codec = aw883xx_get_codec(dai); > + > + aw_dev_info(codec->dev, "fmt=0x%x", fmt); > + > + return 0; > +} Remove empty functions, that includes that only log information. Answer: I will fix this problem in patch v3. > +static int aw883xx_mute(struct snd_soc_dai *dai, int mute, int > +stream) { > + aw_snd_soc_codec_t *codec = aw883xx_get_codec(dai); > + struct aw883xx *aw883xx = > + aw_componet_codec_ops.codec_get_drvdata(codec); > + > + aw_dev_info(aw883xx->dev, "mute state=%d", mute); > + > + if (stream != SNDRV_PCM_STREAM_PLAYBACK) { > + aw_dev_info(aw883xx->dev, "capture"); > + return 0; > + } > + > + if (mute) { > + aw883xx->pstream = AW883XX_STREAM_CLOSE; > + cancel_delayed_work_sync(&aw883xx->start_work); > + mutex_lock(&aw883xx->lock); > + aw883xx_device_stop(aw883xx->aw_pa); > + mutex_unlock(&aw883xx->lock); > + } else { > + aw883xx->pstream = AW883XX_STREAM_OPEN; > + mutex_lock(&aw883xx->lock); > + aw883xx_start(aw883xx, AW_ASYNC_START); > + aw883xx_hold_dsp_spin_st(&aw883xx->aw_pa->spin_desc); > + mutex_unlock(&aw883xx->lock); > + } This doesn't look like a mute operation, it looks like it's starting and stopping the DSP. Answer: This is a mute operation ,aw883xx_device_stop is called in th aw883xx_mute function. This function not only executes the mute function aw883xx_dev_mute, but also disables dsp and power down. This is for the aw883xx chip low power optimization. > +static int aw883xx_dai_drv_append_suffix(struct aw883xx *aw883xx, > + struct snd_soc_dai_driver *dai_drv, > + int num_dai) I can't tell what all this append_suffix() stuff is supposed to do but it should probably be removed, if this is about distinguishing multiple devices then the core already has support for that which should be used instead. Answer:I will delete this part in patch v3 > +static int aw883xx_set_fade_in_time(struct snd_kcontrol *kcontrol, > + struct snd_ctl_elem_value *ucontrol) { > + struct soc_mixer_control *mc = > + (struct soc_mixer_control *)kcontrol->private_value; > + > + if ((ucontrol->value.integer.value[0] > mc->max) || > + (ucontrol->value.integer.value[0] < mc->min)) { > + aw_pr_dbg("set val %ld overflow %d or less than :%d", > + ucontrol->value.integer.value[0], mc->max, mc->min); > + return 0; > + } > + aw883xx_dev_set_fade_time(ucontrol->value.integer.value[0], true); > + > + aw_pr_dbg("step time %ld", ucontrol->value.integer.value[0]); > + return 0; > +} If a control write changes a value it should return 1, you should run the mixer-test selftest which will identify this and a number of other issues. Answer: Could you tell me what is mixer-test selftest? I have checked other drivers, and there is no return 1. > +static int aw883xx_request_firmware_file(struct aw883xx *aw883xx) { > + const struct firmware *cont = NULL; > + struct aw_container *aw_cfg = NULL; > + int ret = -1; > + int i; > + > + aw883xx->aw_pa->fw_status = AW_DEV_FW_FAILED; > + > + for (i = 0; i < AW_REQUEST_FW_RETRIES; i++) { > + ret = request_firmware(&cont, AW883XX_ACF_FILE, aw883xx->dev); Why are there retries here? Other drivers that load firmware don't do that, and if it's required I'd expect the firmware framework to do it rather than have individual drivers open code it. Answer: I'll remove the retry code, and fix this problem in patch v3. > +static void aw883xx_fw_wrok(struct work_struct *work) { wrok? Answer: I will fix this problem in patch v3. > +static void aw883xx_load_fw(struct aw883xx *aw883xx) { #ifdef > +AW_SYNC_LOAD > + /*sync loading*/ > + aw883xx_request_firmware_file(aw883xx); > +#else > + /*async loading*/ > + queue_delayed_work(aw883xx->work_queue, > + &aw883xx->acf_work, > + msecs_to_jiffies(AW883XX_LOAD_FW_DELAY_TIME)); > +#endif Why would this be a build time configuration? Answer: I will fix this problem in patch v3. > +/* flag addr_bytes data_bytes reg_num reg_addr*/ static int > +aw883xx_awrw_parse_buf(struct aw883xx *aw883xx, const char *buf, > +size_t count) { Remove all these sysfs APIs, they appear to be a combination of open coding features you shuld get from regmap and providing audio controls which should go via the ALSA API. Answer: I will fix this problem in patch v3. > +#define BigLittleSwap16(A) ((((uint16_t)(A) & 0xff00) >> 8) | \ > + (((uint16_t)(A) & 0x00ff) << 8)) > + > +#define BigLittleSwap32(A) ((((uint32_t)(A) & 0xff000000) >> 24) | \ > + (((uint32_t)(A) & 0x00ff0000) >> 8) | \ > + (((uint32_t)(A) & 0x0000ff00) << 8) | \ > + (((uint32_t)(A) & 0x000000ff) << 24)) Don't open code stuff like this, use the standard kernel interfaces and use naming styles that follow the kernel coding style. Answer: I will fix this problem in patch v3. > +static int aw_check_data_version(struct aw_bin *bin, int bin_num) { > + int i = 0; > + > + DBG("enter\n"); Use the kernel logging framework (though as previously indicated you shouldn't be logging noise like this). Answer: I will delete this part in patch v3. > +static void aw_fs_write(struct file *file, char *buf, size_t count, > +loff_t *pos) { #ifdef AW_KERNEL_VER_OVER_5_4_0 > + kernel_write(file, buf, count, pos); #else > + vfs_write(file, buf, count, pos); > +#endif > +} It is extremely worrying to see filesystem operations in a CODEC driver, this needs a very clear explanation as to what it's doing and why. Answer: I will delete this part in patch v3.

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[PATCH -next] ALSA: hda/realtek: simplify the return of comp_bind()
by Yang Yingliang 17 Oct '22

17 Oct '22

After commit 23904f7b2518 ("ALSA: hda: cs35l41: Remove suspend/resume hda hooks"), the return of comp_bind() can be simplified. No functional changed. Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- sound/pci/hda/patch_realtek.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index e6c4bb5fa041..7c177426bf30 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -6654,13 +6654,8 @@ static int comp_bind(struct device *dev) { struct hda_codec *cdc = dev_to_hda_codec(dev); struct alc_spec *spec = cdc->spec; - int ret; - ret = component_bind_all(dev, spec->comps); - if (ret) - return ret; - - return 0; + return component_bind_all(dev, spec->comps); } static void comp_unbind(struct device *dev) -- 2.25.1

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Reply to review question [PATCH V2 1/2] ASoc:codes:Add Awinic AW883XX audio amplifier driver
by wangweidong.a＠awinic.com 17 Oct '22

17 Oct '22

Hi: Pierre-Louis Bossart Thank you for your suggestion. I will fix the problem you raised in the next patch, but there is still a question here and I want to discuss it with you >Please add the alsa-devel mailing list in the To: list in future submissions. Answer: I will fix this problem in patch v3. >The commit title should be "ASoC: codecs: Add Awinic AW883XX audio amplifier driver" Answer: I will fix this problem in patch v3. >This patch needs a lot of cleanups I am afraid. Answer: I will fix this problem in patch v3. On 9/23/22 13:15, wangweidong.a(a)awinic.com wrote: > From: Weidong Wang <wangweidong.a(a)awinic.com> > > The Awinic AW883XX is an I2S/TDM input, high efficiency > digital Smart K audio amplifier with an integrated 10.25V > smart boost convert > > Add a simple dirver that allows setting it up in the driver tree driver. > diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile > index 92fd441..4c91102 100644 > --- a/sound/soc/codecs/Makefile > +++ b/sound/soc/codecs/Makefile > @@ -352,6 +352,8 @@ snd-soc-tas2780-objs := tas2780.o > # Mux > snd-soc-simple-mux-objs := simple-mux.o > > +snd_soc_aw883xx-objs := aw883xx/aw883xx.o aw883xx/aw883xx_monitor.o aw883xx/aw883xx_init.o aw883xx/aw883xx_device.o aw883xx/aw883xx_calib.o aw883xx/aw883xx_bin_parse.o aw883xx/aw883xx_spin.o >This split is a bit unusual Answer: I will fix this problem in patch v3. > + > obj-$(CONFIG_SND_SOC_88PM860X) += snd-soc-88pm860x.o > obj-$(CONFIG_SND_SOC_AB8500_CODEC) += snd-soc-ab8500-codec.o > obj-$(CONFIG_SND_SOC_AC97_CODEC) += snd-soc-ac97.o > @@ -709,3 +711,5 @@ obj-$(CONFIG_SND_SOC_LPASS_TX_MACRO) += snd-soc-lpass-tx-macro.o > > # Mux > obj-$(CONFIG_SND_SOC_SIMPLE_MUX) += snd-soc-simple-mux.o > + > +obj-$(CONFIG_SND_SOC_AW883XX) +=snd_soc_aw883xx.o > diff --git a/sound/soc/codecs/aw883xx/aw883xx.c b/sound/soc/codecs/aw883xx/aw883xx.c > new file mode 100644 > index 0000000..b64b610 > --- /dev/null > +++ b/sound/soc/codecs/aw883xx/aw883xx.c > @@ -0,0 +1,2734 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * aw883xx.c -- ALSA Soc AW883XX codec support > + * > + * Copyright (c) 2020 AWINIC Technology CO., LTD >2022? Answer: I will fix this problem in patch v3. > + * > + * Author: Bruce zhao <zhaolei(a)awinic.com> > + */ > + > +#include <linux/module.h> > +#include <linux/i2c.h> > +#include <sound/core.h> > +#include <sound/pcm.h> > +#include <sound/pcm_params.h> > +#include <sound/soc.h> > +#include <linux/of_gpio.h> > +#include <linux/delay.h> > +#include <linux/device.h> > +#include <linux/firmware.h> > +#include <linux/i2c.h> > +#include <linux/debugfs.h> > +#include <linux/version.h> > +#include <linux/input.h> > +#include <linux/timer.h> > +#include <linux/workqueue.h> > +#include <linux/hrtimer.h> > +#include <linux/syscalls.h> > +#include <linux/vmalloc.h> > +#include <sound/tlv.h> > +#include <linux/uaccess.h> >it's nicer if this is sorted by alphabetical order. Answer: I modified and sent the patch to patch v3 as required > +#include "aw883xx_pid_2049_reg.h" > +#include "aw883xx.h" > +#include "aw883xx_bin_parse.h" > +#include "aw883xx_device.h" > +#include "aw883xx_log.h" > +#include "aw883xx_spin.h" > + > +/* > + * Marco > + */ > +#define AW883XX_I2C_NAME "aw883xx_smartpa" > + > +#define AW883XX_DRIVER_VERSION "v1.3.0" > + > +#define AW883XX_RATES (SNDRV_PCM_RATE_8000_48000 | \ > + SNDRV_PCM_RATE_96000) >this doesn't include 24kHz Answer: I will fix this problem in patch v3. > +#define AW883XX_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \ > + SNDRV_PCM_FMTBIT_S24_LE | \ > + SNDRV_PCM_FMTBIT_S32_LE) > + > + > +#define AW883XX_ACF_FILE "aw883xx_acf.bin" > +#define AW_REQUEST_FW_RETRIES 5 /* 5 times */ > + > +static unsigned int g_aw883xx_dev_cnt; > +static DEFINE_MUTEX(g_aw883xx_lock); > +static struct aw_container *g_awinic_cfg; > + > +static const char *const aw883xx_switch[] = {"Disable", "Enable"}; > + > +static int aw883xx_platform_init(struct aw883xx *aw883xx) > +{ > +#ifdef AW_QCOM_PLATFORM > + aw883xx->aw_pa->platform = AW_QCOM; > + return 0; > +#elif defined AW_MTK_PLATFORM > + aw883xx->aw_pa->platform = AW_MTK; > + return 0; > +#elif defined AW_SPRD_PLATFORM > + aw883xx->aw_pa->platform = AW_SPRD; > + return 0; > +#else > + return -EINVAL; > +#endif that looks awful. codec drivers are supposed to be relatively common, and platform-specific configuration are usually done with device-tree bindings or machine-driver configurations. Answer: I will fix this problem in patch v3. > +} > + > +int aw883xx_get_version(char *buf, int size) > +{ > + if (size > strlen(AW883XX_DRIVER_VERSION)) { > + memcpy(buf, AW883XX_DRIVER_VERSION, strlen(AW883XX_DRIVER_VERSION)); > + return strlen(AW883XX_DRIVER_VERSION); what would you return the string length? Usually success is 0 and error a negative number. Answer: I will fix this problem in patch v3. > + } else { > + return -ENOMEM; > + } > +} > + > +/* > + * aw883xx append suffix sound channel information > + */ > +static void *aw883xx_devm_kstrdup(struct device *dev, char *buf) It's rather odd to re-declare your local function when there's an existing devm_kstrdup() https://elixir.bootlin.com/linux/v6.0-rc6/source/include/linux/device.h#L227 Answer: I will fix this problem in patch v3. > +{ > + char *str = NULL; > + > + str = devm_kzalloc(dev, strlen(buf) + 1, GFP_KERNEL); > + if (!str) > + return str; > + memcpy(str, buf, strlen(buf)); > + return str; > +} > + > +static int aw883xx_append_i2c_suffix(char *format, > + const char **change_name, struct aw883xx *aw883xx) > +{ > + char buf[64] = { 0 }; > + int i2cbus = aw883xx->i2c->adapter->nr; > + int addr = aw883xx->i2c->addr; > + > + snprintf(buf, sizeof(buf), format, *change_name, i2cbus, addr); > + *change_name = aw883xx_devm_kstrdup(aw883xx->dev, buf); > + if (!(*change_name)) > + return -ENOMEM; > + > + aw_dev_info(aw883xx->dev, "change name :%s", *change_name); > + return 0; > +} > + > +static int aw883xx_append_channel_suffix(char *format, > + const char **change_name, struct aw883xx *aw883xx) > +{ > + char buf[64] = { 0 }; > + int channel = aw883xx->aw_pa->channel; > + > + snprintf(buf, sizeof(buf), format, *change_name, channel); > + *change_name = aw883xx_devm_kstrdup(aw883xx->dev, buf); > + if (!(*change_name)) > + return -ENOMEM; > + > + aw_dev_info(aw883xx->dev, "change name :%s", *change_name); > + return 0; > +} > + > +/* > + * aw883xx distinguish between codecs and components by version > + */ > +#ifdef AW_KERNEL_VER_OVER_4_19_1 > +static struct aw_componet_codec_ops aw_componet_codec_ops = { component Answer: I will fix this problem in patch v3. > + .kcontrol_codec = snd_soc_kcontrol_component, > + .codec_get_drvdata = snd_soc_component_get_drvdata, > + .add_codec_controls = snd_soc_add_component_controls, > + .unregister_codec = snd_soc_unregister_component, > + .register_codec = snd_soc_register_component, > +}; > +#else > +static struct aw_componet_codec_ops aw_componet_codec_ops = { > + .kcontrol_codec = snd_soc_kcontrol_codec, > + .codec_get_drvdata = snd_soc_codec_get_drvdata, > + .add_codec_controls = snd_soc_add_codec_controls, > + .unregister_codec = snd_soc_unregister_codec, > + .register_codec = snd_soc_register_codec, > +}; > +#endif No, we can't deal with old kernels in upstream contributions. Remove the old stuff please. Answer: I will fix this problem in patch v3. > + > +static aw_snd_soc_codec_t *aw883xx_get_codec(struct snd_soc_dai *dai) > +{ > +#ifdef AW_KERNEL_VER_OVER_4_19_1 > + return dai->component; > +#else > + return dai->codec; > +#endif > +} > + > +/* > + * aw883xx reg write/read > + */ > + > +int aw883xx_i2c_writes(struct aw883xx *aw883xx, > + uint8_t reg_addr, uint8_t *buf, uint16_t len) > +{ > + int ret = -1; > + uint8_t *data = NULL; > + > + data = kmalloc(len + 1, GFP_KERNEL); > + if (data == NULL) > + return -ENOMEM; > + > + data[0] = reg_addr; > + memcpy(&data[1], buf, len); > + > + ret = i2c_master_send(aw883xx->i2c, data, len + 1); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "i2c master send error"); > + goto i2c_master_error; > + } else if (ret != (len + 1)) { > + aw_dev_err(aw883xx->dev, "i2c master send error(size error)"); > + ret = -ENXIO; > + goto i2c_master_error; > + } > + > + kfree(data); > + data = NULL; > + return 0; > + > +i2c_master_error: > + kfree(data); > + data = NULL; > + return ret; isn't there an I2C helper for this and all the data transmission helpers below? Answer: I will fix this problem in patch v3. > +} > + > +int aw883xx_i2c_reads(struct aw883xx *aw883xx, > + uint8_t reg_addr, uint8_t *data_buf, > + uint16_t data_len) > +{ > + int ret; > + struct i2c_msg msg[] = { > + [0] = { > + .addr = aw883xx->i2c->addr, > + .flags = 0, > + .len = sizeof(uint8_t), > + .buf = &reg_addr, > + }, > + [1] = { > + .addr = aw883xx->i2c->addr, > + .flags = I2C_M_RD, > + .len = data_len, > + .buf = data_buf, > + }, > + }; > + > + ret = i2c_transfer(aw883xx->i2c->adapter, msg, ARRAY_SIZE(msg)); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "i2c_transfer failed"); > + return ret; > + } else if (ret != AW883XX_READ_MSG_NUM) { > + aw_dev_err(aw883xx->dev, "transfer failed(size error)"); > + return -ENXIO; > + } > + > + return 0; > +} > + > +int aw883xx_i2c_write(struct aw883xx *aw883xx, > + uint8_t reg_addr, uint16_t reg_data) > +{ > + int ret = -1;> + uint8_t cnt = 0; > + uint8_t buf[2] = {0}; > + > + buf[0] = (reg_data & 0xff00) >> 8; > + buf[1] = (reg_data & 0x00ff) >> 0; > + > + while (cnt < AW_I2C_RETRIES) { > + ret = aw883xx_i2c_writes(aw883xx, reg_addr, buf, 2); > + if (ret < 0) > + aw_dev_err(aw883xx->dev, "i2c_write cnt=%d error=%d", > + cnt, ret); > + else > + break; > + cnt++; > + } > + > + if (aw883xx->i2c_log_en) > + aw_dev_info(aw883xx->dev, "write: reg = 0x%02x, val = 0x%04x", > + reg_addr, reg_data); > + > + return ret; > +} > + > +int aw883xx_i2c_read(struct aw883xx *aw883xx, > + uint8_t reg_addr, uint16_t *reg_data) > +{ > + int ret = -1; > + uint8_t cnt = 0; > + uint8_t buf[2] = {0}; > + > + while (cnt < AW_I2C_RETRIES) { > + ret = aw883xx_i2c_reads(aw883xx, reg_addr, buf, 2); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "i2c_read cnt=%d error=%d", > + cnt, ret); > + } else { > + *reg_data = (buf[0] << 8) | (buf[1] << 0); > + break; > + } > + cnt++; > + } > + > + if (aw883xx->i2c_log_en) > + aw_dev_info(aw883xx->dev, "read: reg = 0x%02x, val = 0x%04x", > + reg_addr, *reg_data); > + > + return ret; > +} > + > +int aw883xx_i2c_write_bits(struct aw883xx *aw883xx, > + uint8_t reg_addr, uint16_t mask, > + uint16_t reg_data) > +{ > + int ret = -1; > + uint16_t reg_val = 0; > + > + ret = aw883xx_i2c_read(aw883xx, reg_addr, &reg_val); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "i2c read error, ret=%d", ret); > + return ret; > + } > + reg_val &= mask; > + reg_val |= reg_data & (~mask); > + ret = aw883xx_i2c_write(aw883xx, reg_addr, reg_val); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "i2c read error, ret=%d", ret); > + return ret; > + } > + > + return 0; > +} > + > +int aw883xx_reg_write(struct aw883xx *aw883xx, > + uint8_t reg_addr, uint16_t reg_data) > +{ > + int ret = -1; > + > + mutex_lock(&aw883xx->i2c_lock); > + ret = aw883xx_i2c_write(aw883xx, reg_addr, reg_data); > + if (ret < 0) > + aw_dev_err(aw883xx->dev, > + "write fail, reg = 0x%02x, val = 0x%04x, ret=%d", > + reg_addr, reg_data, ret); > + mutex_unlock(&aw883xx->i2c_lock); > + > + return ret; > +} > + > +int aw883xx_reg_read(struct aw883xx *aw883xx, > + uint8_t reg_addr, uint16_t *reg_data) > +{ > + int ret = -1; > + > + mutex_lock(&aw883xx->i2c_lock); > + ret = aw883xx_i2c_read(aw883xx, reg_addr, reg_data); > + if (ret < 0) > + aw_dev_err(aw883xx->dev, > + "read fail: reg = 0x%02x, val = 0x%04x, ret=%d", > + reg_addr, *reg_data, ret); > + mutex_unlock(&aw883xx->i2c_lock); > + > + return ret; > +} > + > +int aw883xx_reg_write_bits(struct aw883xx *aw883xx, > + uint8_t reg_addr, uint16_t mask, uint16_t reg_data) > +{ > + int ret = -1; > + > + mutex_lock(&aw883xx->i2c_lock); > + ret = aw883xx_i2c_write_bits(aw883xx, reg_addr, mask, reg_data); > + if (ret < 0) > + aw_dev_err(aw883xx->dev, > + "%s fail, ret=%d", __func__, ret); > + mutex_unlock(&aw883xx->i2c_lock); > + > + return ret; > +} > + > +static int aw883xx_dsp_write_16bit(struct aw883xx *aw883xx, > + uint16_t dsp_addr, uint32_t dsp_data) > +{ > + int ret; > + struct aw_dsp_mem_desc *desc = &aw883xx->aw_pa->dsp_mem_desc; > + > + ret = aw883xx_i2c_write(aw883xx, desc->dsp_madd_reg, dsp_addr); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "i2c write error, ret=%d", ret); > + return ret; > + } > + > + ret = aw883xx_i2c_write(aw883xx, desc->dsp_mdat_reg, (uint16_t)dsp_data); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "i2c write error, ret=%d", ret); > + return ret; > + } > + > + return 0; > +} > + > +static int aw883xx_dsp_write_32bit(struct aw883xx *aw883xx, > + uint16_t dsp_addr, uint32_t dsp_data) > +{ > + int ret; > + uint16_t temp_data = 0; > + struct aw_dsp_mem_desc *desc = &aw883xx->aw_pa->dsp_mem_desc; > + > + ret = aw883xx_i2c_write(aw883xx, desc->dsp_madd_reg, dsp_addr); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "i2c write error, ret=%d", ret); > + return ret; > + } > + > + temp_data = dsp_data & AW883XX_DSP_16_DATA_MASK; > + ret = aw883xx_i2c_write(aw883xx, desc->dsp_mdat_reg, temp_data); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "i2c write error, ret=%d", ret); > + return ret; > + } > + > + temp_data = dsp_data >> 16; > + ret = aw883xx_i2c_write(aw883xx, desc->dsp_mdat_reg, temp_data); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "i2c write error, ret=%d", ret); > + return ret; > + } > + > + return 0; > +} > + > +/* > + * aw883xx clear dsp chip select state > + */ > +static void aw883xx_clear_dsp_sel_st(struct aw883xx *aw883xx) > +{ > + uint16_t reg_value; > + uint8_t reg = aw883xx->aw_pa->soft_rst.reg; > + > + aw883xx_i2c_read(aw883xx, reg, &reg_value); > +} > + > +int aw883xx_dsp_write(struct aw883xx *aw883xx, > + uint16_t dsp_addr, uint32_t dsp_data, uint8_t data_type) > +{ > + int ret = -1; > + > + mutex_lock(&aw883xx->i2c_lock); > + if (data_type == AW_DSP_16_DATA) { > + ret = aw883xx_dsp_write_16bit(aw883xx, dsp_addr, dsp_data); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "write dsp_addr[0x%04x] 16 bit dsp_data[%04x] failed", > + (uint32_t)dsp_addr, dsp_data); > + goto exit; > + } > + } else if (data_type == AW_DSP_32_DATA) { > + ret = aw883xx_dsp_write_32bit(aw883xx, dsp_addr, dsp_data); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "write dsp_addr[0x%04x] 32 bit dsp_data[%08x] failed", > + (uint32_t)dsp_addr, dsp_data); > + goto exit; > + } > + } else { > + aw_dev_err(aw883xx->dev, "data type[%d] unsupported", data_type); > + ret = -EINVAL; > + goto exit; > + } > + > +exit: > + aw883xx_clear_dsp_sel_st(aw883xx); > + mutex_unlock(&aw883xx->i2c_lock); > + return ret; > +} > + > + > +static int aw883xx_dsp_read_16bit(struct aw883xx *aw883xx, > + uint16_t dsp_addr, uint32_t *dsp_data) > +{ > + int ret; > + uint16_t temp_data = 0; > + struct aw_dsp_mem_desc *desc = &aw883xx->aw_pa->dsp_mem_desc; > + > + ret = aw883xx_i2c_write(aw883xx, desc->dsp_madd_reg, dsp_addr); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "i2c write error, ret=%d", ret); > + return ret; > + } > + > + ret = aw883xx_i2c_read(aw883xx, desc->dsp_mdat_reg, &temp_data); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "i2c write error, ret=%d", ret); > + return ret; > + } > + > + *dsp_data = temp_data; > + > + return 0; > +} > + > +static int aw883xx_dsp_read_32bit(struct aw883xx *aw883xx, > + uint16_t dsp_addr, uint32_t *dsp_data) > +{ > + int ret; > + uint16_t temp_data = 0; > + struct aw_dsp_mem_desc *desc = &aw883xx->aw_pa->dsp_mem_desc; > + > + /*write dsp addr*/ > + ret = aw883xx_i2c_write(aw883xx, desc->dsp_madd_reg, dsp_addr); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "i2c write error, ret=%d", ret); > + return ret; > + } > + > + /*get Low 16 bit data*/ > + ret = aw883xx_i2c_read(aw883xx, desc->dsp_mdat_reg, &temp_data); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "i2c read error, ret=%d", ret); > + return ret; > + } > + > + *dsp_data = temp_data; > + > + /*get high 16 bit data*/ > + ret = aw883xx_i2c_read(aw883xx, desc->dsp_mdat_reg, &temp_data); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "i2c read error, ret=%d", ret); > + return ret; > + } > + *dsp_data |= (temp_data << 16); > + > + return 0; > +} > + > +int aw883xx_dsp_read(struct aw883xx *aw883xx, > + uint16_t dsp_addr, uint32_t *dsp_data, uint8_t data_type) > +{ > + int ret = -1; > + > + mutex_lock(&aw883xx->i2c_lock); > + if (data_type == AW_DSP_16_DATA) { > + ret = aw883xx_dsp_read_16bit(aw883xx, dsp_addr, dsp_data); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "read dsp_addr[0x%04x] 16 bit dsp_data[%04x] failed", > + (uint32_t)dsp_addr, *dsp_data); > + goto exit; > + } > + } else if (data_type == AW_DSP_32_DATA) { > + ret = aw883xx_dsp_read_32bit(aw883xx, dsp_addr, dsp_data); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "read dsp_addr[0x%04x] 32 bit dsp_data[%08x] failed", > + (uint32_t)dsp_addr, *dsp_data); > + goto exit; > + } > + } else { > + aw_dev_err(aw883xx->dev, "data type[%d] unsupported", data_type); > + ret = -EINVAL; > + goto exit; > + } > + > +exit: > + aw883xx_clear_dsp_sel_st(aw883xx); > + mutex_unlock(&aw883xx->i2c_lock); > + return ret; > +} > + > +/* > + * aw883xx get dev num > + */ > +int aw883xx_get_dev_num(void) > +{ > + return g_aw883xx_dev_cnt; > +} > + > +/* > + * aw883xx interrupt > + */ > +static void aw883xx_interrupt_work(struct work_struct *work) > +{ > + struct aw883xx *aw883xx = container_of(work, > + struct aw883xx, interrupt_work.work); > + int16_t reg_value = 0; > + int ret = -1; > + > + aw_dev_info(aw883xx->dev, "enter"); don't redefine your own dev_info, and that's way to verbose for an interrupt. Answer: I will fix this problem in patch v3. > + > + /*read reg value*/ > + ret = aw883xx_dev_get_int_status(aw883xx->aw_pa, &reg_value); > + if (ret < 0) > + aw_dev_err(aw883xx->dev, "get init_reg value failed"); > + else > + aw_dev_info(aw883xx->dev, "int value 0x%x", reg_value); > + > + /*clear init reg*/ spaces in comments please Answer: I will fix this problem in patch v3. > + aw883xx_dev_clear_int_status(aw883xx->aw_pa); > + > + /*unmask interrupt*/ > + aw883xx_dev_set_intmask(aw883xx->aw_pa, true); > +} > + > +/* > + * Digital Audio Interface > + */ > +static int aw883xx_startup(struct snd_pcm_substream *substream, > + struct snd_soc_dai *dai) > +{ > + aw_snd_soc_codec_t *codec = aw883xx_get_codec(dai); > + struct aw883xx *aw883xx = > + aw_componet_codec_ops.codec_get_drvdata(codec); > + > + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { > + aw_dev_info(aw883xx->dev, "playback enter"); > + /*load cali re*/ > + if (aw883xx->aw_pa->cali_desc.cali_re == AW_ERRO_CALI_RE_VALUE) > + aw883xx_cali_get_cali_re(&aw883xx->aw_pa->cali_desc); > + } else { > + aw_dev_info(aw883xx->dev, "capture enter"); that's really useless, please trim the debug logs. Answer: I will fix this problem in patch v3. > + } > + > + return 0; > +} > + > +static int aw883xx_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) > +{ > + aw_snd_soc_codec_t *codec = aw883xx_get_codec(dai); > + > + aw_dev_info(codec->dev, "fmt=0x%x", fmt); > + > + return 0; > +} > + > +static int aw883xx_set_dai_sysclk(struct snd_soc_dai *dai, > + int clk_id, unsigned int freq, int dir) > +{ > + aw_snd_soc_codec_t *codec = aw883xx_get_codec(dai); > + struct aw883xx *aw883xx = > + aw_componet_codec_ops.codec_get_drvdata(codec); > + > + aw_dev_info(aw883xx->dev, "freq=%d", freq); > + > + aw883xx->sysclk = freq; > + return 0; > +} > + > +static int aw883xx_hw_params(struct snd_pcm_substream *substream, > + struct snd_pcm_hw_params *params, > + struct snd_soc_dai *dai) > +{ > + aw_snd_soc_codec_t *codec = aw883xx_get_codec(dai); > + struct aw883xx *aw883xx = > + aw_componet_codec_ops.codec_get_drvdata(codec); > + > + /* get CAPTURE rate param bit width*/ > + if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) { > + aw_dev_info(aw883xx->dev, > + "STREAM_CAPTURE requested rate: %d, width = %d", > + params_rate(params), params_width(params)); > + } > + > + /* get PLAYBACK rate param bit width*/ > + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { > + aw_dev_info(aw883xx->dev, > + "STREAM_PLAYBACK requested rate: %d, width = %d", > + params_rate(params), params_width(params)); > + } > + > + return 0; > +} > + > +static void aw883xx_start_pa(struct aw883xx *aw883xx) > +{ > + int ret, i; > + > + aw_dev_info(aw883xx->dev, "enter"); > + > + if (aw883xx->allow_pw == false) { > + aw_dev_info(aw883xx->dev, "dev can not allow power"); > + return; > + } > + > + if (aw883xx->pstream == AW883XX_STREAM_CLOSE) { > + aw_dev_info(aw883xx->dev, "pstream is close"); > + return; > + } > + > + for (i = 0; i < AW_START_RETRIES; i++) { > + ret = aw883xx_device_start(aw883xx->aw_pa); > + if (ret) { > + aw_dev_err(aw883xx->dev, "start failed"); > + ret = aw883xx_dev_fw_update(aw883xx->aw_pa, AW_DSP_FW_UPDATE_ON, true); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "fw update failed"); > + continue; > + } > + } else { > + aw_dev_info(aw883xx->dev, "start success"); > + break; > + } > + } > +} > + > +static void aw883xx_startup_work(struct work_struct *work) > +{ > + struct aw883xx *aw883xx = > + container_of(work, struct aw883xx, start_work.work); > + > + mutex_lock(&aw883xx->lock); do you really need such high-level locks? Answer: We need this kind of lock, prevents xml configuration kcontrol from repeatedly operating on the same PA > + aw883xx_start_pa(aw883xx); > + mutex_unlock(&aw883xx->lock); > +} > + > +static void aw883xx_start(struct aw883xx *aw883xx, bool sync_start) > +{ > + int ret; > + int i; > + > + if (aw883xx->aw_pa->fw_status == AW_DEV_FW_OK) { > + if (aw883xx->allow_pw == false) { > + aw_dev_info(aw883xx->dev, "dev can not allow power"); > + return; > + } > + > + if (aw883xx->aw_pa->status == AW_DEV_PW_ON) > + return; > + > + for (i = 0; i < AW_START_RETRIES; i++) { > + ret = aw883xx_dev_fw_update(aw883xx->aw_pa, AW_DSP_FW_UPDATE_OFF, > + aw883xx->phase_sync); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "fw update failed"); > + continue; > + } else { > + /*firmware update success*/ > + if (sync_start == AW_SYNC_START) > + aw883xx_start_pa(aw883xx); > + else > + queue_delayed_work(aw883xx->work_queue, > + &aw883xx->start_work, > + AW883XX_START_WORK_DELAY_MS); > + > + return; > + } > + } > + } > +} > + > +static int aw883xx_mute(struct snd_soc_dai *dai, int mute, int stream) > +{ > + aw_snd_soc_codec_t *codec = aw883xx_get_codec(dai); > + struct aw883xx *aw883xx = > + aw_componet_codec_ops.codec_get_drvdata(codec); > + > + aw_dev_info(aw883xx->dev, "mute state=%d", mute); > + > + if (stream != SNDRV_PCM_STREAM_PLAYBACK) { > + aw_dev_info(aw883xx->dev, "capture"); > + return 0; > + } > + > + if (mute) { > + aw883xx->pstream = AW883XX_STREAM_CLOSE; > + cancel_delayed_work_sync(&aw883xx->start_work); > + mutex_lock(&aw883xx->lock); > + aw883xx_device_stop(aw883xx->aw_pa); > + mutex_unlock(&aw883xx->lock); > + } else { > + aw883xx->pstream = AW883XX_STREAM_OPEN; > + mutex_lock(&aw883xx->lock); > + aw883xx_start(aw883xx, AW_ASYNC_START); > + aw883xx_hold_dsp_spin_st(&aw883xx->aw_pa->spin_desc); > + mutex_unlock(&aw883xx->lock); > + } > + > + return 0; > +} > + > +static void aw883xx_shutdown(struct snd_pcm_substream *substream, > + struct snd_soc_dai *dai) > +{ > + aw_snd_soc_codec_t *codec = aw883xx_get_codec(dai); > + struct aw883xx *aw883xx = > + aw_componet_codec_ops.codec_get_drvdata(codec); > + > + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) > + aw_dev_info(aw883xx->dev, "stream playback"); > + else > + aw_dev_info(aw883xx->dev, "stream capture"); > +} > + > +static const struct snd_soc_dai_ops aw883xx_dai_ops = { > + .startup = aw883xx_startup, > + .set_fmt = aw883xx_set_fmt, > + .set_sysclk = aw883xx_set_dai_sysclk, > + .hw_params = aw883xx_hw_params, > + .mute_stream = aw883xx_mute, > + .shutdown = aw883xx_shutdown, > +}; > + > +static struct snd_soc_dai_driver aw883xx_dai[] = { > + { > + .name = "aw883xx-aif", > + .id = 1, > + .playback = { > + .stream_name = "Speaker_Playback", > + .channels_min = 1, > + .channels_max = 2, > + .rates = AW883XX_RATES, > + .formats = AW883XX_FORMATS, > + }, > + .capture = { > + .stream_name = "Speaker_Capture", > + .channels_min = 1, > + .channels_max = 2, > + .rates = AW883XX_RATES, > + .formats = AW883XX_FORMATS, > + }, > + .ops = &aw883xx_dai_ops, > + /*.symmetric_rates = 1,*/ > + }, > +}; > + > +static int aw883xx_dai_drv_append_suffix(struct aw883xx *aw883xx, > + struct snd_soc_dai_driver *dai_drv, > + int num_dai) > +{ > + int ret; > + int i; > + > + if ((dai_drv != NULL) && (num_dai > 0)) { > + for (i = 0; i < num_dai; i++) { > + if (aw883xx->rename_flag == AW_RENAME_ENABLE) { > + ret = aw883xx_append_channel_suffix("%s-%d", > + &dai_drv->name, aw883xx); > + if (ret < 0) > + return ret; > + ret = aw883xx_append_channel_suffix("%s_%d", > + &dai_drv->playback.stream_name, aw883xx); > + if (ret < 0) > + return ret; > + ret = aw883xx_append_channel_suffix("%s_%d", > + &dai_drv->capture.stream_name, aw883xx); > + if (ret < 0) > + return ret; > + dev_set_name(aw883xx->dev, "%s_%d", > + "aw883xx_smartpa", aw883xx->aw_pa->channel); > + aw_dev_info(aw883xx->dev, "change dev_name:%s", > + dev_name(aw883xx->dev)); > + > + } else { > + ret = aw883xx_append_i2c_suffix("%s-%d-%x", > + &dai_drv->name, aw883xx); > + if (ret < 0) > + return ret; > + ret = aw883xx_append_i2c_suffix("%s_%d_%x", > + &dai_drv->playback.stream_name, aw883xx); > + if (ret < 0) > + return ret; > + ret = aw883xx_append_i2c_suffix("%s_%d_%x", > + &dai_drv->capture.stream_name, aw883xx); > + if (ret < 0) > + return ret; > + > + } > + > + aw_dev_info(aw883xx->dev, "dai name [%s]", dai_drv[i].name); > + aw_dev_info(aw883xx->dev, "pstream_name [%s]", > + dai_drv[i].playback.stream_name); > + aw_dev_info(aw883xx->dev, "cstream_name [%s]", > + dai_drv[i].capture.stream_name); > + } > + } > + > + return 0; not sure what this function is trying to do, but it certainly would be very hard to use the dai names for any machine driver binding if they are so dynamic and variable, no? Answer: I will fix this problem in patch v3. > +} > + > +/* > + * codec driver > + */ > +static int aw883xx_get_fade_in_time(struct snd_kcontrol *kcontrol, > + struct snd_ctl_elem_value *ucontrol) > +{ > + unsigned int time; > + > + aw883xx_dev_get_fade_time(&time, true); > + ucontrol->value.integer.value[0] = time; > + > + aw_pr_dbg("step time %ld", ucontrol->value.integer.value[0]); > + > + return 0; > + > +} > + > +static int aw883xx_set_fade_in_time(struct snd_kcontrol *kcontrol, > + struct snd_ctl_elem_value *ucontrol) > +{ > + struct soc_mixer_control *mc = > + (struct soc_mixer_control *)kcontrol->private_value; > + > + if ((ucontrol->value.integer.value[0] > mc->max) || > + (ucontrol->value.integer.value[0] < mc->min)) { > + aw_pr_dbg("set val %ld overflow %d or less than :%d", > + ucontrol->value.integer.value[0], mc->max, mc->min); > + return 0; > + } > + aw883xx_dev_set_fade_time(ucontrol->value.integer.value[0], true); > + > + aw_pr_dbg("step time %ld", ucontrol->value.integer.value[0]); > + return 0; > +} > + > +static int aw883xx_get_fade_out_time(struct snd_kcontrol *kcontrol, > + struct snd_ctl_elem_value *ucontrol) > +{ > + unsigned int time; > + > + aw883xx_dev_get_fade_time(&time, false); > + ucontrol->value.integer.value[0] = time; > + > + aw_pr_dbg("step time %ld", ucontrol->value.integer.value[0]); > + > + return 0; > +} > + > +static int aw883xx_set_fade_out_time(struct snd_kcontrol *kcontrol, > + struct snd_ctl_elem_value *ucontrol) > +{ > + struct soc_mixer_control *mc = > + (struct soc_mixer_control *)kcontrol->private_value; > + > + if ((ucontrol->value.integer.value[0] > mc->max) || > + (ucontrol->value.integer.value[0] < mc->min)) { > + aw_pr_dbg("set val %ld overflow %d or less than :%d", > + ucontrol->value.integer.value[0], mc->max, mc->min); > + return 0; > + } > + > + aw883xx_dev_set_fade_time(ucontrol->value.integer.value[0], false); > + > + aw_pr_dbg("step time %ld", ucontrol->value.integer.value[0]); > + > + return 0; > +} > + > +static const struct soc_enum aw883xx_snd_enum[] = { > + SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(aw883xx_switch), aw883xx_switch), > +}; > + > +static struct snd_kcontrol_new aw883xx_controls[] = { > + SOC_SINGLE_EXT("aw883xx_fadein_us", 0, 0, 1000000, 0, > + aw883xx_get_fade_in_time, aw883xx_set_fade_in_time), > + SOC_SINGLE_EXT("aw883xx_fadeout_us", 0, 0, 1000000, 0, > + aw883xx_get_fade_out_time, aw883xx_set_fade_out_time), > +}; > + > + > +static void aw883xx_add_codec_controls(struct aw883xx *aw883xx) > +{ > + aw_dev_info(aw883xx->dev, "enter"); > + > + if (aw883xx->aw_pa->channel == 0) { > + aw_componet_codec_ops.add_codec_controls(aw883xx->codec, > + &aw883xx_controls[0], ARRAY_SIZE(aw883xx_controls)); > + aw883xx_add_spin_controls((void *)aw883xx); > + } > +} > + > +static int aw883xx_profile_info(struct snd_kcontrol *kcontrol, > + struct snd_ctl_elem_info *uinfo) > +{ > + int count; > + char *name = NULL; > + const char *prof_name = NULL; > + aw_snd_soc_codec_t *codec = > + aw_componet_codec_ops.kcontrol_codec(kcontrol); > + struct aw883xx *aw883xx = > + aw_componet_codec_ops.codec_get_drvdata(codec); component typo. please fix this in all the file. Answer: I will fix this problem in patch v3. > + > + uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; > + uinfo->count = 1; > + > + count = aw883xx_dev_get_profile_count(aw883xx->aw_pa); > + if (count <= 0) { > + uinfo->value.enumerated.items = 0; > + aw_dev_err(aw883xx->dev, "get count[%d] failed", count); > + return 0; > + } > + > + uinfo->value.enumerated.items = count; > + > + if (uinfo->value.enumerated.item >= count) > + uinfo->value.enumerated.item = count - 1; > + > + name = uinfo->value.enumerated.name; > + count = uinfo->value.enumerated.item; > + > + prof_name = aw_dev_get_prof_name(aw883xx->aw_pa, count); > + if (prof_name == NULL) { > + strscpy(uinfo->value.enumerated.name, "null", > + strlen("null") + 1); > + return 0; > + } > + > + strscpy(name, prof_name, sizeof(uinfo->value.enumerated.name)); > + > + return 0; > +} > + > +static int aw883xx_profile_get(struct snd_kcontrol *kcontrol, > + struct snd_ctl_elem_value *ucontrol) > +{ > + aw_snd_soc_codec_t *codec = > + aw_componet_codec_ops.kcontrol_codec(kcontrol); > + struct aw883xx *aw883xx = > + aw_componet_codec_ops.codec_get_drvdata(codec); > + > + ucontrol->value.integer.value[0] = aw883xx_dev_get_profile_index(aw883xx->aw_pa); > + aw_dev_dbg(codec->dev, "profile index [%d]", > + aw883xx_dev_get_profile_index(aw883xx->aw_pa)); > + return 0; > + > +} > + > +static int aw883xx_profile_set(struct snd_kcontrol *kcontrol, > + struct snd_ctl_elem_value *ucontrol) > +{ > + aw_snd_soc_codec_t *codec = > + aw_componet_codec_ops.kcontrol_codec(kcontrol); > + struct aw883xx *aw883xx = > + aw_componet_codec_ops.codec_get_drvdata(codec); > + int ret; > + int cur_index; > + > + if (aw883xx->dbg_en_prof == false) { > + aw_dev_info(codec->dev, "profile close"); > + return 0; > + } > + > + /* check value valid */ > + ret = aw883xx_dev_check_profile_index(aw883xx->aw_pa, ucontrol->value.integer.value[0]); > + if (ret) { > + aw_dev_info(codec->dev, "unsupported index %ld", > + ucontrol->value.integer.value[0]); > + return 0; > + } > + > + /*check cur_index == set value*/ > + cur_index = aw883xx_dev_get_profile_index(aw883xx->aw_pa); > + if (cur_index == ucontrol->value.integer.value[0]) { > + aw_dev_info(codec->dev, "index no change"); > + return 0; > + } > + > + /*pa stop or stopping just set profile*/ > + mutex_lock(&aw883xx->lock); > + aw883xx_dev_set_profile_index(aw883xx->aw_pa, ucontrol->value.integer.value[0]); > + > + if (aw883xx->pstream) { > + aw883xx_device_stop(aw883xx->aw_pa); > + aw883xx_start(aw883xx, AW_SYNC_START); > + } > + > + mutex_unlock(&aw883xx->lock); > + > + aw_dev_info(codec->dev, "profile id %ld", ucontrol->value.integer.value[0]); > + return 0; > +} > + > +static int aw883xx_switch_info(struct snd_kcontrol *kcontrol, > + struct snd_ctl_elem_info *uinfo) > +{ > + int count; > + > + uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; > + uinfo->count = 1; > + count = 2; > + > + uinfo->value.enumerated.items = count; > + > + if (uinfo->value.enumerated.item >= count) > + uinfo->value.enumerated.item = count - 1; > + > + strscpy(uinfo->value.enumerated.name, > + aw883xx_switch[uinfo->value.enumerated.item], > + strlen(aw883xx_switch[uinfo->value.enumerated.item]) + 1); > + > + return 0; > +} > + > +static int aw883xx_switch_get(struct snd_kcontrol *kcontrol, > + struct snd_ctl_elem_value *ucontrol) > +{ > + aw_snd_soc_codec_t *codec = > + aw_componet_codec_ops.kcontrol_codec(kcontrol); > + struct aw883xx *aw883xx = > + aw_componet_codec_ops.codec_get_drvdata(codec); > + > + ucontrol->value.integer.value[0] = aw883xx->allow_pw; > + > + return 0; > +} > + > +static int aw883xx_switch_set(struct snd_kcontrol *kcontrol, > + struct snd_ctl_elem_value *ucontrol) > +{ > + aw_snd_soc_codec_t *codec = > + aw_componet_codec_ops.kcontrol_codec(kcontrol); > + struct aw883xx *aw883xx = > + aw_componet_codec_ops.codec_get_drvdata(codec); > + > + aw_dev_info(codec->dev, "set value:%ld", ucontrol->value.integer.value[0]); > + > + if (ucontrol->value.integer.value[0] == aw883xx->allow_pw) { > + aw_dev_info(aw883xx->dev, "PA switch not change"); > + return 0; > + } > + > + if (aw883xx->pstream) { > + if (ucontrol->value.integer.value[0] == 0) { > + cancel_delayed_work_sync(&aw883xx->start_work); > + mutex_lock(&aw883xx->lock); > + aw883xx_device_stop(aw883xx->aw_pa); > + aw883xx->allow_pw = false; > + mutex_unlock(&aw883xx->lock); > + } else { > + cancel_delayed_work_sync(&aw883xx->start_work); > + mutex_lock(&aw883xx->lock); > + aw883xx->allow_pw = true; > + aw883xx_start(aw883xx, AW_SYNC_START); > + mutex_unlock(&aw883xx->lock); > + } > + } else { > + mutex_lock(&aw883xx->lock); > + if (ucontrol->value.integer.value[0]) > + aw883xx->allow_pw = true; > + else > + aw883xx->allow_pw = false; > + mutex_unlock(&aw883xx->lock); > + } > + > + return 0; > +} > + > +static int aw883xx_monitor_switch_info(struct snd_kcontrol *kcontrol, > + struct snd_ctl_elem_info *uinfo) > +{ > + int count; > + > + uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; > + uinfo->count = 1; > + count = 2; > + > + uinfo->value.enumerated.items = count; > + > + if (uinfo->value.enumerated.item >= count) > + uinfo->value.enumerated.item = count - 1; > + > + strscpy(uinfo->value.enumerated.name, > + aw883xx_switch[uinfo->value.enumerated.item], > + strlen(aw883xx_switch[uinfo->value.enumerated.item]) + 1); > + > + return 0; > +} > + > +static int aw883xx_monitor_switch_get(struct snd_kcontrol *kcontrol, > + struct snd_ctl_elem_value *ucontrol) > +{ > + aw_snd_soc_codec_t *codec = > + aw_componet_codec_ops.kcontrol_codec(kcontrol); > + struct aw883xx *aw883xx = > + aw_componet_codec_ops.codec_get_drvdata(codec); > + struct aw_monitor_desc *monitor_desc = &aw883xx->aw_pa->monitor_desc; > + > + ucontrol->value.integer.value[0] = monitor_desc->monitor_cfg.monitor_switch; > + > + return 0; > +} > + > +static int aw883xx_monitor_switch_set(struct snd_kcontrol *kcontrol, > + struct snd_ctl_elem_value *ucontrol) > +{ > + aw_snd_soc_codec_t *codec = > + aw_componet_codec_ops.kcontrol_codec(kcontrol); > + struct aw883xx *aw883xx = > + aw_componet_codec_ops.codec_get_drvdata(codec); > + struct aw_monitor_desc *monitor_desc = &aw883xx->aw_pa->monitor_desc; > + uint32_t enable = 0; > + > + aw_dev_info(codec->dev, "set monitor_switch:%ld", ucontrol->value.integer.value[0]); > + > + enable = (uint32_t)ucontrol->value.integer.value[0]; > + > + if (monitor_desc->monitor_cfg.monitor_switch != enable) { > + monitor_desc->monitor_cfg.monitor_switch = enable; > + if (enable) > + aw883xx_monitor_start(monitor_desc); > + } else { > + aw_dev_info(aw883xx->dev, "monitor_switch not change"); > + return 0; > + } > + > + return 0; > +} > + > +static int aw883xx_volume_info(struct snd_kcontrol *kcontrol, > + struct snd_ctl_elem_info *uinfo) > +{ > + aw_snd_soc_codec_t *codec = > + aw_componet_codec_ops.kcontrol_codec(kcontrol); > + struct aw883xx *aw883xx = > + aw_componet_codec_ops.codec_get_drvdata(codec); > + struct aw_volume_desc *vol_desc = &aw883xx->aw_pa->volume_desc; > + > + /* set kcontrol info */ > + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; > + uinfo->count = 1; > + uinfo->value.integer.min = 0; > + uinfo->value.integer.max = vol_desc->mute_volume; > + > + return 0; > +} > + > +static int aw883xx_volume_get(struct snd_kcontrol *kcontrol, > + struct snd_ctl_elem_value *ucontrol) > +{ > + aw_snd_soc_codec_t *codec = > + aw_componet_codec_ops.kcontrol_codec(kcontrol); > + struct aw883xx *aw883xx = > + aw_componet_codec_ops.codec_get_drvdata(codec); > + struct aw_volume_desc *vol_desc = &aw883xx->aw_pa->volume_desc; > + > + ucontrol->value.integer.value[0] = vol_desc->ctl_volume; > + > + aw_dev_info(aw883xx->dev, "ucontrol->value.integer.value[0]=%d", > + vol_desc->ctl_volume); > + > + return 0; > +} > + > +static int aw883xx_volume_set(struct snd_kcontrol *kcontrol, > + struct snd_ctl_elem_value *ucontrol) > +{ > + uint16_t value = 0; > + uint16_t compared_vol = 0; > + aw_snd_soc_codec_t *codec = > + aw_componet_codec_ops.kcontrol_codec(kcontrol); > + struct aw883xx *aw883xx = > + aw_componet_codec_ops.codec_get_drvdata(codec); > + struct aw_volume_desc *vol_desc = &aw883xx->aw_pa->volume_desc; > + > + value = (uint16_t)ucontrol->value.integer.value[0]; > + if (value > vol_desc->mute_volume) { > + aw_dev_err(aw883xx->dev, "value over range\n"); > + return -EINVAL; > + } > + > + aw_dev_info(aw883xx->dev, "ucontrol->value.integer.value[0]=%d", value); > + > + vol_desc->ctl_volume = value; > + > + /*get smaller dB*/ > + compared_vol = AW_GET_MAX_VALUE(vol_desc->ctl_volume, > + vol_desc->monitor_volume); > + > + aw883xx_dev_set_volume(aw883xx->aw_pa, compared_vol); > + > + return 0; > +} > + > +static int aw883xx_dynamic_create_controls(struct aw883xx *aw883xx) > +{ > + struct snd_kcontrol_new *aw883xx_dev_control = NULL; > + char *kctl_name = NULL; > + > + aw883xx_dev_control = devm_kzalloc(aw883xx->codec->dev, > + sizeof(struct snd_kcontrol_new) * AW_KCONTROL_NUM, GFP_KERNEL); > + if (aw883xx_dev_control == NULL) > + return -ENOMEM; > + > + kctl_name = devm_kzalloc(aw883xx->codec->dev, AW_NAME_BUF_MAX, GFP_KERNEL); > + if (kctl_name == NULL) if (!ptr) in all checks please. Answer: I will fix this problem in patch v3. > + return -ENOMEM; > + > + snprintf(kctl_name, AW_NAME_BUF_MAX, "aw_dev_%u_prof", > + aw883xx->aw_pa->channel); > + > + aw883xx_dev_control[0].name = kctl_name; > + aw883xx_dev_control[0].iface = SNDRV_CTL_ELEM_IFACE_MIXER; > + aw883xx_dev_control[0].info = aw883xx_profile_info; > + aw883xx_dev_control[0].get = aw883xx_profile_get; > + aw883xx_dev_control[0].put = aw883xx_profile_set; > + > + kctl_name = devm_kzalloc(aw883xx->codec->dev, AW_NAME_BUF_MAX, GFP_KERNEL); > + if (!kctl_name) > + return -ENOMEM; > + > + snprintf(kctl_name, AW_NAME_BUF_MAX, "aw_dev_%u_switch", aw883xx->aw_pa->channel); > + > + aw883xx_dev_control[1].name = kctl_name; > + aw883xx_dev_control[1].iface = SNDRV_CTL_ELEM_IFACE_MIXER; > + aw883xx_dev_control[1].info = aw883xx_switch_info; > + aw883xx_dev_control[1].get = aw883xx_switch_get; > + aw883xx_dev_control[1].put = aw883xx_switch_set; > + > + kctl_name = devm_kzalloc(aw883xx->codec->dev, AW_NAME_BUF_MAX, GFP_KERNEL); > + if (!kctl_name) > + return -ENOMEM; > + > + snprintf(kctl_name, AW_NAME_BUF_MAX, "aw_dev_%u_monitor_switch", aw883xx->aw_pa->channel); > + > + aw883xx_dev_control[2].name = kctl_name; > + aw883xx_dev_control[2].iface = SNDRV_CTL_ELEM_IFACE_MIXER; > + aw883xx_dev_control[2].info = aw883xx_monitor_switch_info; > + aw883xx_dev_control[2].get = aw883xx_monitor_switch_get; > + aw883xx_dev_control[2].put = aw883xx_monitor_switch_set; > + > + kctl_name = devm_kzalloc(aw883xx->codec->dev, AW_NAME_BUF_MAX, GFP_KERNEL); > + if (!kctl_name) > + return -ENOMEM; > + > + snprintf(kctl_name, AW_NAME_BUF_MAX, "aw_dev_%d_rx_volume", aw883xx->aw_pa->channel); > + > + aw883xx_dev_control[3].name = kctl_name; > + aw883xx_dev_control[3].iface = SNDRV_CTL_ELEM_IFACE_MIXER; > + aw883xx_dev_control[3].info = aw883xx_volume_info; > + aw883xx_dev_control[3].get = aw883xx_volume_get; > + aw883xx_dev_control[3].put = aw883xx_volume_set; > + > + aw_componet_codec_ops.add_codec_controls(aw883xx->codec, > + aw883xx_dev_control, AW_KCONTROL_NUM); > + > + return 0; > +} > + > +static int aw883xx_request_firmware_file(struct aw883xx *aw883xx) > +{ > + const struct firmware *cont = NULL; > + struct aw_container *aw_cfg = NULL; > + int ret = -1; > + int i; > + > + aw883xx->aw_pa->fw_status = AW_DEV_FW_FAILED; > + > + for (i = 0; i < AW_REQUEST_FW_RETRIES; i++) { > + ret = request_firmware(&cont, AW883XX_ACF_FILE, aw883xx->dev); > + if ((ret < 0) || (!cont)) { > + aw883xx->fw_retry_cnt++; > + aw_dev_err(aw883xx->dev, "load [%s] try [%d]!", > + AW883XX_ACF_FILE, aw883xx->fw_retry_cnt); > + > + if (aw883xx->fw_retry_cnt == AW_REQUEST_FW_RETRIES) { > + aw883xx->fw_retry_cnt = 0; > + return ret; > + } > + msleep(1000); > + } else { > + break; > + } what makes you think that waiting and retrying is a good way to deal with a missing firmware file? Answer: I will remove the retried code in patch v3. > + } > + > + aw_dev_info(aw883xx->dev, "loaded %s - size: %zu", > + AW883XX_ACF_FILE, cont ? cont->size : 0); > + > + mutex_lock(&g_aw883xx_lock); > + if (g_awinic_cfg == NULL) { > + aw_cfg = vzalloc(cont->size + sizeof(int)); > + if (aw_cfg == NULL) { > + release_firmware(cont); > + mutex_unlock(&g_aw883xx_lock); > + return -ENOMEM; > + } > + aw_cfg->len = (int)cont->size; > + memcpy(aw_cfg->data, cont->data, cont->size); > + ret = aw883xx_dev_load_acf_check(aw_cfg); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "Load [%s] failed ....!", AW883XX_ACF_FILE); > + vfree(aw_cfg); > + aw_cfg = NULL; > + release_firmware(cont); > + mutex_unlock(&g_aw883xx_lock); > + return ret; > + } > + g_awinic_cfg = aw_cfg; > + } else { > + aw_cfg = g_awinic_cfg; > + aw_dev_info(aw883xx->dev, "[%s] already loaded...", AW883XX_ACF_FILE); > + } > + release_firmware(cont); > + mutex_unlock(&g_aw883xx_lock); > + > + mutex_lock(&aw883xx->lock); > + /*aw device init*/ > + ret = aw883xx_device_init(aw883xx->aw_pa, aw_cfg); > + if (ret < 0) { > + aw_dev_info(aw883xx->dev, "dev init failed"); > + mutex_unlock(&aw883xx->lock); > + return ret; > + } > + > + aw883xx_dynamic_create_controls(aw883xx); > + > + aw883xx_check_spin_mode(&aw883xx->aw_pa->spin_desc); > + > + mutex_unlock(&aw883xx->lock); > + > + return 0; > +} > + > +static void aw883xx_fw_wrok(struct work_struct *work) > +{ > + struct aw883xx *aw883xx = container_of(work, > + struct aw883xx, acf_work.work); > + int ret; > + > + ret = aw883xx_request_firmware_file(aw883xx); > + if (ret < 0) > + aw_dev_err(aw883xx->dev, "load profile failed"); > + > +} > + > +static void aw883xx_load_fw(struct aw883xx *aw883xx) > +{ > +#ifdef AW_SYNC_LOAD > + /*sync loading*/ > + aw883xx_request_firmware_file(aw883xx); > +#else > + /*async loading*/ > + queue_delayed_work(aw883xx->work_queue, > + &aw883xx->acf_work, > + msecs_to_jiffies(AW883XX_LOAD_FW_DELAY_TIME)); > +#endif > +} > + > +#ifdef AW_MTK_PLATFORM > + > +static const struct snd_soc_dapm_widget aw883xx_dapm_widgets[] = { > + /* playback */ > + SND_SOC_DAPM_AIF_IN("AIF_RX", "Speaker_Playback", 0, SND_SOC_NOPM, 0, 0), > + SND_SOC_DAPM_OUTPUT("audio_out"), > + /* capture */ > + SND_SOC_DAPM_AIF_OUT("AIF_TX", "Speaker_Capture", 0, SND_SOC_NOPM, 0, 0), > + SND_SOC_DAPM_INPUT("iv_in"), > +}; > + > +static const struct snd_soc_dapm_route aw883xx_audio_map[] = { > + {"audio_out", NULL, "AIF_RX"}, > + {"AIF_TX", NULL, "iv_in"}, > +}; > + > +#if KERNEL_VERSION(4, 2, 0) > LINUX_VERSION_CODE > +static struct snd_soc_dapm_context *snd_soc_codec_get_dapm(struct snd_soc_codec *codec) > +{ > + return &codec->dapm; > +} > +#endif > + > +static int aw883xx_add_widgets(struct aw883xx *aw883xx) > +{ > + int i = 0; > + int ret; > + struct snd_soc_dapm_widget *aw_widgets = NULL; > + struct snd_soc_dapm_route *aw_route = NULL; > +#ifdef AW_KERNEL_VER_OVER_4_19_1 > + struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(aw883xx->codec); > +#else > + struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(aw883xx->codec); > +#endif > + > + /*add widgets*/ > + aw_widgets = devm_kzalloc(aw883xx->dev, > + sizeof(struct snd_soc_dapm_widget) * > + ARRAY_SIZE(aw883xx_dapm_widgets), > + GFP_KERNEL); > + if (!aw_widgets) > + return -ENOMEM; > + > + memcpy(aw_widgets, aw883xx_dapm_widgets, > + sizeof(struct snd_soc_dapm_widget) * ARRAY_SIZE(aw883xx_dapm_widgets)); > + > + for (i = 0; i < ARRAY_SIZE(aw883xx_dapm_widgets); i++) { > + if (aw883xx->rename_flag == AW_RENAME_ENABLE) { > + if (aw_widgets[i].name) { > + ret = aw883xx_append_channel_suffix("%s_%d", > + &aw_widgets[i].name, > + aw883xx); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "aw_widgets.name append channel suffix failed!\n"); > + return ret; > + } > + } > + > + if (aw_widgets[i].sname) { > + ret = aw883xx_append_channel_suffix("%s_%d", > + &aw_widgets[i].sname, > + aw883xx); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "aw_widgets.name append channel suffix failed!"); > + return ret; > + } > + } > + } else { > + if (aw_widgets[i].name) { > + ret = aw883xx_append_i2c_suffix("%s_%d_%x", > + &aw_widgets[i].name, > + aw883xx); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "aw_widgets.name append i2c suffix failed!\n"); > + return ret; > + } > + } > + > + if (aw_widgets[i].sname) { > + ret = aw883xx_append_i2c_suffix("%s_%d_%x", > + &aw_widgets[i].sname, > + aw883xx); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "aw_widgets.name append i2c suffix failed!"); > + return ret; > + } > + } > + } > + > + } > + > + snd_soc_dapm_new_controls(dapm, aw_widgets, ARRAY_SIZE(aw883xx_dapm_widgets)); > + > + /*add route*/ > + aw_route = devm_kzalloc(aw883xx->dev, > + sizeof(struct snd_soc_dapm_route) * ARRAY_SIZE(aw883xx_audio_map), > + GFP_KERNEL); > + if (!aw_route) > + return -ENOMEM; > + > + memcpy(aw_route, aw883xx_audio_map, > + sizeof(struct snd_soc_dapm_route) * ARRAY_SIZE(aw883xx_audio_map)); > + > + for (i = 0; i < ARRAY_SIZE(aw883xx_audio_map); i++) { > + if (aw883xx->rename_flag == AW_RENAME_ENABLE) { > + if (aw_route[i].sink) { > + ret = aw883xx_append_channel_suffix("%s_%d", > + &aw_route[i].sink, > + aw883xx); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "aw_route.sink append channel suffix failed!"); > + return ret; > + } > + } > + if (aw_route[i].source) { > + ret = aw883xx_append_channel_suffix("%s_%d", > + &aw_route[i].source, > + aw883xx); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "aw_route.source append channel suffix failed!"); > + return ret; > + } > + } > + } else { > + if (aw_route[i].sink) { > + ret = aw883xx_append_i2c_suffix("%s_%d_%x", > + &aw_route[i].sink, > + aw883xx); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "aw_route.sink append i2c suffix failed!"); > + return ret; > + } > + } > + if (aw_route[i].source) { > + ret = aw883xx_append_i2c_suffix("%s_%d_%x", > + &aw_route[i].source, > + aw883xx); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "aw_route.source append i2c suffix failed!"); > + return ret; > + } > + } > + } > + > + > + } > + snd_soc_dapm_add_routes(dapm, aw_route, ARRAY_SIZE(aw883xx_audio_map)); > + > + return 0; > +} > +#endif > + > +static int aw883xx_codec_probe(aw_snd_soc_codec_t *aw_codec) > +{ > + struct aw883xx *aw883xx = > + aw_componet_codec_ops.codec_get_drvdata(aw_codec); > + > + aw_dev_info(aw883xx->dev, "enter"); > + > + /*destroy_workqueue(struct workqueue_struct *wq)*/ > + aw883xx->work_queue = create_singlethread_workqueue("aw883xx"); > + if (!aw883xx->work_queue) { > + aw_dev_err(aw883xx->dev, "create workqueue failed !"); > + return -EINVAL; > + } > + > + INIT_DELAYED_WORK(&aw883xx->interrupt_work, aw883xx_interrupt_work); > + INIT_DELAYED_WORK(&aw883xx->start_work, aw883xx_startup_work); > + INIT_DELAYED_WORK(&aw883xx->acf_work, aw883xx_fw_wrok); > + > + aw883xx->codec = aw_codec; > +aw_dev_info(aw883xx->dev, "ex0"); > + aw883xx_add_codec_controls(aw883xx); > + aw_dev_info(aw883xx->dev, "ex1"); > +#ifdef AW_MTK_PLATFORM > + aw883xx_add_widgets(aw883xx); > +#endif > +aw_dev_info(aw883xx->dev, "ex2"); > + aw883xx_load_fw(aw883xx); > +aw_dev_info(aw883xx->dev, "ex3"); > + return 0; > +} > + > +#ifdef AW_KERNEL_VER_OVER_4_19_1 > +static void aw883xx_codec_remove(aw_snd_soc_codec_t *aw_codec) > +{ > + struct aw883xx *aw883xx = > + aw_componet_codec_ops.codec_get_drvdata(aw_codec); > + > + aw_dev_info(aw883xx->dev, "enter"); > + dump_stack(); > + cancel_delayed_work_sync(&aw883xx->interrupt_work); > + cancel_delayed_work_sync(&aw883xx->acf_work); > + cancel_delayed_work_sync(&aw883xx->aw_pa->monitor_desc.delay_work); > + cancel_delayed_work_sync(&aw883xx->start_work); > + > + if (aw883xx->work_queue) > + destroy_workqueue(aw883xx->work_queue); > + > + aw883xx_dev_deinit(aw883xx->aw_pa); > +} > +#else > +static int aw883xx_codec_remove(aw_snd_soc_codec_t *aw_codec) > +{ > + struct aw883xx *aw883xx = > + aw_componet_codec_ops.codec_get_drvdata(aw_codec); > + > + aw_dev_info(aw883xx->dev, "enter"); > + > + cancel_delayed_work_sync(&aw883xx->interrupt_work); > + cancel_delayed_work_sync(&aw883xx->acf_work); > + cancel_delayed_work_sync(&aw883xx->aw_pa->monitor_desc.delay_work); > + cancel_delayed_work_sync(&aw883xx->start_work); > + > + if (aw883xx->work_queue) > + destroy_workqueue(aw883xx->work_queue); > + > + aw883xx_dev_deinit(aw883xx->aw_pa); > + > + return 0; > +} > +#endif > + > +#ifdef AW_KERNEL_VER_OVER_4_19_1 > +static const struct snd_soc_component_driver soc_codec_dev_aw883xx = { > + .probe = aw883xx_codec_probe, > + .remove = aw883xx_codec_remove, > +}; > +#else > +static struct snd_soc_codec_driver soc_codec_dev_aw883xx = { > + .probe = aw883xx_codec_probe, > + .remove = aw883xx_codec_remove, > +}; > +#endif > + > +static int aw883xx_componet_codec_register(struct aw883xx *aw883xx) > +{ > + struct snd_soc_dai_driver *dai_drv = NULL; > + int ret; > + > + dai_drv = devm_kzalloc(aw883xx->dev, sizeof(aw883xx_dai), GFP_KERNEL); > + if (dai_drv == NULL) > + return -ENOMEM; > + > + memcpy(dai_drv, aw883xx_dai, sizeof(aw883xx_dai)); > + > + ret = aw883xx_dai_drv_append_suffix(aw883xx, dai_drv, 1); > + if (ret < 0) > + return ret; > + > + ret = aw883xx->codec_ops->register_codec(aw883xx->dev, > + &soc_codec_dev_aw883xx, > + dai_drv, ARRAY_SIZE(aw883xx_dai)); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "failed to register aw883xx: %d", ret); > + return ret; > + } > + > + if (aw883xx->rename_flag == AW_RENAME_ENABLE) { > + dev_set_name(aw883xx->dev, "%d-00%x", > + aw883xx->i2c->adapter->nr, aw883xx->i2c->addr); > + aw_dev_info(aw883xx->dev, "reset dev_name:%s", > + dev_name(aw883xx->dev)); > + } > + > + return 0; > +} > + > + > +static struct aw883xx *aw883xx_malloc_init(struct i2c_client *i2c) > +{ > + struct aw883xx *aw883xx = devm_kzalloc(&i2c->dev, > + sizeof(struct aw883xx), GFP_KERNEL); > + if (aw883xx == NULL) > + return NULL; > + > + aw883xx->dev = &i2c->dev; > + aw883xx->i2c = i2c; > + aw883xx->aw_pa = NULL; > + aw883xx->codec = NULL; > + aw883xx->codec_ops = &aw_componet_codec_ops; > + aw883xx->dbg_en_prof = true; > + aw883xx->allow_pw = true; > + aw883xx->work_queue = NULL; > + aw883xx->i2c_log_en = 0; > + mutex_init(&aw883xx->lock); > + mutex_init(&aw883xx->i2c_lock); > + > + return aw883xx; > +} > + > +static int aw883xx_gpio_request(struct aw883xx *aw883xx) > +{ > + int ret; > + > + if (gpio_is_valid(aw883xx->reset_gpio)) { > + ret = devm_gpio_request_one(aw883xx->dev, aw883xx->reset_gpio, > + GPIOF_OUT_INIT_LOW, "aw883xx_rst"); > + if (ret) { > + aw_dev_err(aw883xx->dev, "rst request failed"); > + return ret; > + } > + } > + > + if (gpio_is_valid(aw883xx->irq_gpio)) { > + ret = devm_gpio_request_one(aw883xx->dev, aw883xx->irq_gpio, > + GPIOF_DIR_IN, "aw883xx_int"); > + if (ret) { > + aw_dev_err(aw883xx->dev, "int request failed"); > + return ret; > + } > + } > + > + return 0; > +} > + > +/* > + * device tree > + */ > +static int aw883xx_parse_gpio_dt(struct aw883xx *aw883xx) > +{ > + struct device_node *np = aw883xx->dev->of_node; > + > + aw883xx->reset_gpio = of_get_named_gpio(np, "reset-gpio", 0); > + if (aw883xx->reset_gpio < 0) { > + aw_dev_err(aw883xx->dev, "no reset gpio provided, will not hw reset"); > + //return -EIO; remove? Answer: I will fix this problem in patch v3. > + } else { > + aw_dev_info(aw883xx->dev, "reset gpio provided ok"); > + } > + > + aw883xx->irq_gpio = of_get_named_gpio(np, "irq-gpio", 0); > + if (aw883xx->irq_gpio < 0) > + aw_dev_info(aw883xx->dev, "no irq gpio provided."); > + else > + aw_dev_info(aw883xx->dev, "irq gpio provided ok."); > + > + return 0; > +} > + > +static void aw883xx_parse_sync_flag_dt(struct aw883xx *aw883xx) > +{ > + int ret; > + int32_t sync_enable = 0; > + struct device_node *np = aw883xx->dev->of_node; > + > + ret = of_property_read_u32(np, "sync-flag", &sync_enable); > + if (ret < 0) { > + aw_dev_info(aw883xx->dev, > + "read sync flag failed,default phase sync off"); > + sync_enable = false; > + } else { > + aw_dev_info(aw883xx->dev, > + "sync flag is %d", sync_enable); > + } > + > + aw883xx->phase_sync = sync_enable; > +} > + > +static void aw883xx_parse_rename_flag_dt(struct aw883xx *aw883xx) > +{ > + int ret; > + uint32_t rename_enable = 0; > + struct device_node *np = aw883xx->dev->of_node; > + > + ret = of_property_read_u32(np, "rename-flag", &rename_enable); > + if (ret < 0) { > + aw_dev_info(aw883xx->dev, > + "read rename flag failed,default rename off"); > + } else { > + aw_dev_info(aw883xx->dev, > + "rename flag is %d", rename_enable); > + } > + > + aw883xx->rename_flag = rename_enable; > +} > + > +static int aw883xx_parse_dt(struct aw883xx *aw883xx) > +{ > + aw883xx_parse_sync_flag_dt(aw883xx); > + aw883xx_parse_rename_flag_dt(aw883xx); > + return aw883xx_parse_gpio_dt(aw883xx); > +} > + > +static int aw883xx_hw_reset(struct aw883xx *aw883xx) > +{ > + aw_dev_info(aw883xx->dev, "enter"); > + > + if (gpio_is_valid(aw883xx->reset_gpio)) { > + gpio_set_value_cansleep(aw883xx->reset_gpio, 0); > + usleep_range(AW_1000_US, AW_1000_US + 10); > + gpio_set_value_cansleep(aw883xx->reset_gpio, 1); > + usleep_range(AW_1000_US, AW_1000_US + 10); > + } else { > + aw_dev_err(aw883xx->dev, "failed"); > + } > + return 0; > +} > + > +static int aw883xx_read_chipid(struct aw883xx *aw883xx) > +{ > + int ret = -1; > + uint16_t reg_val = 0; > + > + ret = aw883xx_reg_read(aw883xx, AW883XX_CHIP_ID_REG, &reg_val); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, > + "failed to read chip id, ret=%d", ret); > + return -EIO; > + } > + > + aw883xx->chip_id = reg_val; > + aw_dev_info(aw883xx->dev, > + "read chip id: 0x%x", reg_val); > + > + return 0; > +} > + > +/* > + * irq > + */ > +static irqreturn_t aw883xx_irq(int irq, void *data) > +{ > + struct aw883xx *aw883xx = data; > + > + if (aw883xx == NULL) { > + aw_pr_err("pointer is NULL"); > + return -EINVAL; > + } > + > + aw_dev_info(aw883xx->dev, "enter"); > + /*mask all irq*/ > + aw883xx_dev_set_intmask(aw883xx->aw_pa, false); > + > + /*upload workqueue*/ > + if (aw883xx->work_queue) > + queue_delayed_work(aw883xx->work_queue, > + &aw883xx->interrupt_work, 0); > + > + return IRQ_HANDLED; > +} > + > +static int aw883xx_interrupt_init(struct aw883xx *aw883xx) > +{ > + int irq_flags; > + int ret; > + > + if (gpio_is_valid(aw883xx->irq_gpio)) { > + irq_flags = IRQF_TRIGGER_FALLING | IRQF_ONESHOT; > + ret = devm_request_threaded_irq(aw883xx->dev, > + gpio_to_irq(aw883xx->irq_gpio), > + NULL, aw883xx_irq, irq_flags, > + "aw883xx", aw883xx); > + if (ret) { > + aw_dev_err(aw883xx->dev, "Failed to request IRQ %d: %d", > + gpio_to_irq(aw883xx->irq_gpio), ret); > + return ret; > + } > + } else { > + aw_dev_info(aw883xx->dev, "skipping IRQ registration"); > + } > + > + return 0; > +} > + > + > +/* > + * sys group attribute: reg > + */ > +static ssize_t aw883xx_reg_show(struct device *dev, > + struct device_attribute *attr, char *buf) > +{ > + struct aw883xx *aw883xx = dev_get_drvdata(dev); > + int reg_num = aw883xx->aw_pa->ops.aw_get_reg_num(); > + ssize_t len = 0; > + uint8_t i = 0; > + uint16_t reg_val = 0; > + > + for (i = 0; i < reg_num; i++) { > + if (aw883xx->aw_pa->ops.aw_check_rd_access(i)) { > + aw883xx_reg_read(aw883xx, i, &reg_val); > + len += snprintf(buf + len, PAGE_SIZE - len, > + "reg:0x%02x=0x%04x\n", i, reg_val); > + } > + } > + > + return len; > +} > + > +static ssize_t aw883xx_reg_store(struct device *dev, > + struct device_attribute *attr, const char *buf, > + size_t count) > +{ > + struct aw883xx *aw883xx = dev_get_drvdata(dev); > + unsigned int databuf[2] = { 0 }; > + > + if (sscanf(buf, "%x %x", &databuf[0], &databuf[1]) == 2) > + aw883xx_reg_write(aw883xx, databuf[0], databuf[1]); > + > + return count; > +} > + > +static ssize_t aw883xx_rw_store(struct device *dev, > + struct device_attribute *attr, const char *buf, > + size_t count) > +{ > + struct aw883xx *aw883xx = dev_get_drvdata(dev); > + unsigned int databuf[2] = { 0 }; > + > + if (sscanf(buf, "%x %x", &databuf[0], &databuf[1]) == 2) { > + aw883xx->reg_addr = (uint8_t)databuf[0]; > + if (aw883xx->aw_pa->ops.aw_check_rd_access(databuf[0])) > + aw883xx_reg_write(aw883xx, databuf[0], databuf[1]); > + } else if (sscanf(buf, "%x", &databuf[0]) == 1) { > + aw883xx->reg_addr = (uint8_t)databuf[0]; > + } > + > + return count; > +} > + > +static ssize_t aw883xx_rw_show(struct device *dev, > + struct device_attribute *attr, char *buf) > +{ > + struct aw883xx *aw883xx = dev_get_drvdata(dev); > + ssize_t len = 0; > + uint16_t reg_val = 0; > + > + if (aw883xx->aw_pa->ops.aw_check_rd_access(aw883xx->reg_addr)) { > + aw883xx_reg_read(aw883xx, aw883xx->reg_addr, &reg_val); > + len += snprintf(buf + len, PAGE_SIZE - len, > + "reg:0x%02x=0x%04x\n", aw883xx->reg_addr, > + reg_val); > + } > + > + return len; > +} > + > +static ssize_t aw883xx_drv_ver_show(struct device *dev, > + struct device_attribute *attr, char *buf) > +{ > + ssize_t len = 0; > + > + len += snprintf(buf+len, PAGE_SIZE-len, > + "driver_ver: %s\n", AW883XX_DRIVER_VERSION); > + > + return len; > +} > + > +static ssize_t aw883xx_dsp_rw_show(struct device *dev, > + struct device_attribute *attr, char *buf) > +{ > + struct aw883xx *aw883xx = dev_get_drvdata(dev); > + ssize_t len = 0; > + uint16_t reg_val = 0; > + > + mutex_lock(&aw883xx->i2c_lock); > + aw883xx_i2c_write(aw883xx, aw883xx->aw_pa->dsp_mem_desc.dsp_madd_reg, aw883xx->dsp_addr); > + aw883xx_i2c_read(aw883xx, aw883xx->aw_pa->dsp_mem_desc.dsp_mdat_reg, &reg_val); > + len += snprintf(buf + len, PAGE_SIZE - len, > + "dsp:0x%04x=0x%04x\n", aw883xx->dsp_addr, reg_val); > + aw883xx_i2c_read(aw883xx, aw883xx->aw_pa->dsp_mem_desc.dsp_mdat_reg, &reg_val); > + len += snprintf(buf + len, PAGE_SIZE - len, > + "dsp:0x%04x=0x%04x\n", aw883xx->dsp_addr + 1, reg_val); > + aw883xx_clear_dsp_sel_st(aw883xx); > + mutex_unlock(&aw883xx->i2c_lock); > + > + return len; > +} > + > +static ssize_t aw883xx_dsp_rw_store(struct device *dev, > + struct device_attribute *attr, > + const char *buf, size_t count) > +{ > + struct aw883xx *aw883xx = dev_get_drvdata(dev); > + unsigned int databuf[2] = { 0 }; > + > + if (sscanf(buf, "%x %x", &databuf[0], &databuf[1]) == 2) { > + aw883xx->dsp_addr = (unsigned int)databuf[0]; > + aw883xx_dsp_write(aw883xx, databuf[0], databuf[1], AW_DSP_16_DATA); > + aw_dev_dbg(aw883xx->dev, "get param: %x %x", > + databuf[0], databuf[1]); > + } else if (sscanf(buf, "%x", &databuf[0]) == 1) { > + aw883xx->dsp_addr = (unsigned int)databuf[0]; > + aw_dev_dbg(aw883xx->dev, "get param: %x", > + databuf[0]); > + } > + aw883xx_clear_dsp_sel_st(aw883xx); > + > + return count; > +} > + > +static int aw883xx_awrw_write(struct aw883xx *aw883xx, const char *buf, size_t count) > +{ > + int i, ret; > + char *data_buf = NULL; > + int str_len, data_len, temp_data; > + struct aw883xx_i2c_packet *packet = &aw883xx->i2c_packet; > + uint32_t dsp_addr_h = 0, dsp_addr_l = 0; > + > + if (buf == NULL) { > + aw_dev_err(aw883xx->dev, "awrw buf is NULL"); > + return -EINVAL; > + } > + > + data_len = AWRW_DATA_BYTES * packet->reg_num; > + > + str_len = count - AWRW_HDR_LEN - 1; > + if ((data_len * 5 - 1) > str_len) { > + aw_dev_err(aw883xx->dev, "data_str_len [%d], requeset len [%d]", > + str_len, (data_len * 5 - 1)); > + return -EINVAL; > + } > + > + if (packet->reg_addr == aw883xx->aw_pa->dsp_mem_desc.dsp_madd_reg) { > + if (sscanf(buf + AWRW_HDR_LEN + 1, > + "0x%02x 0x%02x", &dsp_addr_h, > + &dsp_addr_l) == 2) { > + packet->dsp_addr = (dsp_addr_h << 8) | dsp_addr_l; > + packet->dsp_status = AWRW_DSP_READY; > + aw_dev_dbg(aw883xx->dev, "write:reg_addr[0x%02x], dsp_base_addr:[0x%02x]", > + packet->reg_addr, packet->dsp_addr); > + } else { > + aw_dev_err(aw883xx->dev, "get reg 0x%x data failed", packet->reg_addr); > + return -EINVAL; > + } > + return 0; > + } > + > + mutex_lock(&aw883xx->i2c_lock); > + if (packet->reg_addr == aw883xx->aw_pa->dsp_mem_desc.dsp_mdat_reg) { > + if (packet->dsp_status != AWRW_DSP_READY) { > + aw_dev_err(aw883xx->dev, "please write reg[0x40] first"); > + ret = -EINVAL; > + goto exit; > + } > + aw883xx_i2c_write(aw883xx, > + aw883xx->aw_pa->dsp_mem_desc.dsp_madd_reg, > + packet->dsp_addr); > + packet->dsp_status = AWRW_DSP_ST_NONE; > + } > + > + aw_dev_info(aw883xx->dev, "write:reg_addr[0x%02x], reg_num[%d]", > + packet->reg_addr, packet->reg_num); > + > + data_buf = devm_kzalloc(aw883xx->dev, data_len, GFP_KERNEL); > + if (data_buf == NULL) { > + ret = -ENOMEM; > + goto exit; > + } > + > + for (i = 0; i < data_len; i++) { > + if (sscanf(buf + AWRW_HDR_LEN + 1 + i * 5, "0x%02x", &temp_data) == 1) > + data_buf[i] = temp_data; > + data_buf[i] = temp_data; > + > + } > + > + ret = aw883xx_i2c_writes(aw883xx, packet->reg_addr, data_buf, data_len); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "write failed"); > + devm_kfree(aw883xx->dev, data_buf); > + data_buf = NULL; > + goto exit; > + } > + > + devm_kfree(aw883xx->dev, data_buf); > + data_buf = NULL; > + aw_dev_info(aw883xx->dev, "write success"); > +exit: > + mutex_unlock(&aw883xx->i2c_lock); > + return ret; > +} > + > +static int aw883xx_awrw_data_check(struct aw883xx *aw883xx, int *data) > +{ > + if ((data[AWRW_HDR_ADDR_BYTES] != AWRW_ADDR_BYTES) || > + (data[AWRW_HDR_DATA_BYTES] != AWRW_DATA_BYTES)) { > + aw_dev_err(aw883xx->dev, "addr_bytes [%d] or data_bytes [%d] unsupport", > + data[AWRW_HDR_ADDR_BYTES], data[AWRW_HDR_DATA_BYTES]); > + return -EINVAL; > + } > + > + return 0; > +} > + > +/* flag addr_bytes data_bytes reg_num reg_addr*/ > +static int aw883xx_awrw_parse_buf(struct aw883xx *aw883xx, const char *buf, size_t count) > +{ > + int data[AWRW_HDR_MAX] = { 0 }; > + struct aw883xx_i2c_packet *packet = &aw883xx->i2c_packet; > + int ret; > + > + if (sscanf(buf, "0x%02x 0x%02x 0x%02x 0x%02x 0x%02x", > + &data[AWRW_HDR_WR_FLAG], &data[AWRW_HDR_ADDR_BYTES], &data[AWRW_HDR_DATA_BYTES], > + &data[AWRW_HDR_REG_NUM], &data[AWRW_HDR_REG_ADDR]) == 5) { > + > + ret = aw883xx_awrw_data_check(aw883xx, data); > + if (ret < 0) > + return ret; > + > + packet->reg_addr = data[AWRW_HDR_REG_ADDR]; > + packet->reg_num = data[AWRW_HDR_REG_NUM]; > + > + if (data[AWRW_HDR_WR_FLAG] == AWRW_FLAG_WRITE) { > + return aw883xx_awrw_write(aw883xx, buf, count); > + } else if (data[AWRW_HDR_WR_FLAG] == AWRW_FLAG_READ) { > + packet->i2c_status = AWRW_I2C_ST_READ; > + aw_dev_info(aw883xx->dev, "read_cmd:reg_addr[0x%02x], reg_num[%d]", > + packet->reg_addr, packet->reg_num); > + > + } else { > + aw_dev_err(aw883xx->dev, > + "please check str format, unsupport flag %d", > + data[AWRW_HDR_WR_FLAG]); > + return -EINVAL; > + } > + } else { > + aw_dev_err(aw883xx->dev, "can not parse string"); > + return -EINVAL; > + } > + > + return 0; > +} > + > +static ssize_t aw883xx_awrw_store(struct device *dev, > + struct device_attribute *attr, const char *buf, size_t count) > +{ > + struct aw883xx *aw883xx = dev_get_drvdata(dev); > + int ret; > + > + if (count < AWRW_HDR_LEN) { > + aw_dev_err(dev, "data count too smaller, please check write format"); > + aw_dev_err(dev, "string %s", buf); > + return -EINVAL; > + } > + > + ret = aw883xx_awrw_parse_buf(aw883xx, buf, count); > + if (ret) > + return -EINVAL; > + > + > + return count; > +} > + > +static ssize_t aw883xx_awrw_show(struct device *dev, > + struct device_attribute *attr, char *buf) > +{ > + struct aw883xx *aw883xx = dev_get_drvdata(dev); > + struct aw883xx_i2c_packet *packet = &aw883xx->i2c_packet; > + int data_len, len = 0; > + int ret, i; > + char *reg_data = NULL; > + > + if (packet->i2c_status != AWRW_I2C_ST_READ) { > + aw_dev_err(aw883xx->dev, "please write read cmd first"); > + return -EINVAL; > + } > + > + mutex_lock(&aw883xx->i2c_lock); > + if (packet->reg_addr == aw883xx->aw_pa->dsp_mem_desc.dsp_mdat_reg) { > + if (packet->dsp_status != AWRW_DSP_READY) { > + aw_dev_err(aw883xx->dev, "please write reg[0x40] first"); > + mutex_unlock(&aw883xx->i2c_lock); > + return -EINVAL; > + } > + ret = aw883xx_i2c_write(aw883xx, > + aw883xx->aw_pa->dsp_mem_desc.dsp_madd_reg, > + packet->dsp_addr); > + if (ret < 0) { > + mutex_unlock(&aw883xx->i2c_lock); > + return ret; > + } > + packet->dsp_status = AWRW_DSP_ST_NONE; > + } > + > + data_len = AWRW_DATA_BYTES * packet->reg_num; > + reg_data = devm_kzalloc(dev, data_len, GFP_KERNEL); > + if (reg_data == NULL) { > + aw_dev_err(aw883xx->dev, "memory alloc failed"); > + ret = -EINVAL; > + goto exit; > + } > + > + ret = aw883xx_i2c_reads(aw883xx, packet->reg_addr, (char *)reg_data, data_len); > + if (ret < 0) { > + ret = -EFAULT; > + goto exit; > + } > + > + aw_dev_info(aw883xx->dev, "reg_addr 0x%02x, reg_num %d", > + packet->reg_addr, packet->reg_num); > + > + for (i = 0; i < data_len; i++) { > + len += snprintf(buf + len, PAGE_SIZE - len, > + "0x%02x,", reg_data[i]); > + > + } > + ret = len; > + > +exit: > + if (reg_data) { > + devm_kfree(dev, reg_data); > + reg_data = NULL; > + } > + mutex_unlock(&aw883xx->i2c_lock); > + packet->i2c_status = AWRW_I2C_ST_NONE; > + return ret; > +} > + > +static ssize_t aw883xx_fade_step_store(struct device *dev, > + struct device_attribute *attr, const char *buf, size_t count) > +{ > + struct aw883xx *aw883xx = dev_get_drvdata(dev); > + unsigned int databuf = 0; > + int ret = 0; > + > + ret = kstrtoint(buf, 0, &databuf); > + if (ret == 0) { > + if (databuf > (aw883xx->aw_pa->volume_desc.mute_volume)) { > + aw_dev_info(aw883xx->dev, "step overflow %d Db", databuf); > + return count; > + } > + aw883xx_dev_set_fade_vol_step(aw883xx->aw_pa, databuf); > + } > + > + aw_dev_info(aw883xx->dev, "set step %d DB Done", databuf); > + > + return count; > +} > + > +static ssize_t aw883xx_fade_step_show(struct device *dev, > + struct device_attribute *attr, char *buf) > +{ > + ssize_t len = 0; > + struct aw883xx *aw883xx = dev_get_drvdata(dev); > + > + len += snprintf(buf+len, PAGE_SIZE-len, > + "step: %d\n", aw883xx_dev_get_fade_vol_step(aw883xx->aw_pa)); > + > + return len; > +} > + > +static ssize_t aw883xx_dbg_prof_store(struct device *dev, > + struct device_attribute *attr, const char *buf, size_t count) > +{ > + struct aw883xx *aw883xx = dev_get_drvdata(dev); > + unsigned int databuf = 0; > + int ret = 0; > + > + ret = kstrtoint(buf, 0, &databuf); > + if (ret == 0) { > + if (databuf) > + aw883xx->dbg_en_prof = true; > + else > + aw883xx->dbg_en_prof = false; > + } > + > + aw_dev_info(aw883xx->dev, "en_prof %d Done", databuf); > + > + return count; > +} > + > +static ssize_t aw883xx_dbg_prof_show(struct device *dev, > + struct device_attribute *attr, char *buf) > +{ > + struct aw883xx *aw883xx = dev_get_drvdata(dev); > + ssize_t len = 0; > + > + len += snprintf(buf+len, PAGE_SIZE-len, > + " %d\n", aw883xx->dbg_en_prof); > + > + return len; > +} > + > +static ssize_t aw883xx_spk_temp_show(struct device *dev, > + struct device_attribute *attr, char *buf) > +{ > + struct aw883xx *aw883xx = dev_get_drvdata(dev); > + ssize_t len = 0; > + int ret; > + int32_t te; > + > + ret = aw883xx_cali_svc_get_dev_te(&aw883xx->aw_pa->cali_desc, &te); > + if (ret < 0) > + return ret; > + > + len += snprintf(buf + len, PAGE_SIZE - len, > + "Temp:%d\n", te); > + > + return len; > +} > + > +static ssize_t aw883xx_sync_flag_store(struct device *dev, > + struct device_attribute *attr, > + const char *buf, size_t count) > +{ > + struct aw883xx *aw883xx = dev_get_drvdata(dev); > + unsigned int flag = 0; > + int ret; > + > + ret = kstrtouint(buf, 0, &flag); > + if (ret < 0) > + return ret; > + > + flag = ((flag == false) ? false : true); > + > + aw_dev_info(aw883xx->dev, "set phase sync flag : [%d]", flag); > + > + aw883xx->phase_sync = flag; > + > + return count; > +} > + > +static ssize_t aw883xx_sync_flag_show(struct device *dev, > + struct device_attribute *attr, char *buf) > +{ > + struct aw883xx *aw883xx = dev_get_drvdata(dev); > + ssize_t len = 0; > + > + len += snprintf(buf + len, PAGE_SIZE - len, > + "sync flag : %d\n", aw883xx->phase_sync); > + > + return len; > +} > + > +static ssize_t aw883xx_fade_enable_store(struct device *dev, > + struct device_attribute *attr, const char *buf, size_t count) > +{ > + struct aw883xx *aw883xx = dev_get_drvdata(dev); > + uint32_t fade_en = 0; > + int ret = 0; > + > + ret = kstrtouint(buf, 0, &fade_en); > + if (ret == 0) > + aw883xx->aw_pa->fade_en = fade_en; > + > + aw_dev_info(aw883xx->dev, "set fade_en %d", aw883xx->aw_pa->fade_en); > + > + return count; > +} > + > +static ssize_t aw883xx_fade_enable_show(struct device *dev, > + struct device_attribute *attr, char *buf) > +{ > + struct aw883xx *aw883xx = dev_get_drvdata(dev); > + ssize_t len = 0; > + > + len += snprintf(buf+len, PAGE_SIZE-len, > + "fade_en: %d\n", aw883xx->aw_pa->fade_en); > + > + return len; > +} > + > +static ssize_t aw883xx_dsp_re_show(struct device *dev, > + struct device_attribute *attr, char *buf) > +{ > + struct aw883xx *aw883xx = dev_get_drvdata(dev); > + ssize_t len = 0; > + int ret; > + uint32_t read_re = 0; > + > + ret = aw883xx_cali_read_cali_re_from_dsp(&aw883xx->aw_pa->cali_desc, &read_re); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "%s:read dsp re fail\n", __func__); > + return ret; > + } > + > + len += snprintf((char *)(buf + len), > + PAGE_SIZE - len, > + "dsp_re: %d\n", read_re); > + > + return len; > +} > + > +static ssize_t aw883xx_log_en_show(struct device *dev, > + struct device_attribute *attr, char *buf) > +{ > + struct aw883xx *aw883xx = dev_get_drvdata(dev); > + ssize_t len = 0; > + > + len += snprintf(buf + len, PAGE_SIZE - len, "i2c_log_en: %d\n", > + aw883xx->i2c_log_en); > + > + return len; > +} > + > +static ssize_t aw883xx_log_en_store(struct device *dev, > + struct device_attribute *attr, const char *buf, size_t count) > +{ > + struct aw883xx *aw883xx = dev_get_drvdata(dev); > + uint32_t log_en = 0; > + int ret = 0; > + > + ret = kstrtouint(buf, 0, &log_en); > + if (ret == 0) > + aw883xx->i2c_log_en = log_en; > + > + aw_dev_info(aw883xx->dev, "set i2c_log_en: %d", > + aw883xx->i2c_log_en); > + > + return count; > +} > + > +static int aw883xx_dsp_log_info(struct aw883xx *aw883xx, unsigned int base_addr, > + uint32_t data_len, char *format) > +{ > + uint16_t reg_val = 0; > + char *dsp_reg_info = NULL; > + ssize_t dsp_info_len = 0; > + int i; > + > + dsp_reg_info = devm_kzalloc(aw883xx->dev, AW_NAME_BUF_MAX, GFP_KERNEL); > + if (dsp_reg_info == NULL) > + return -ENOMEM; > + > + mutex_lock(&aw883xx->i2c_lock); > + aw883xx_i2c_write(aw883xx, aw883xx->aw_pa->dsp_mem_desc.dsp_madd_reg, base_addr); > + > + for (i = 0; i < data_len; i += 2) { > + aw883xx_i2c_read(aw883xx, aw883xx->aw_pa->dsp_mem_desc.dsp_mdat_reg, &reg_val); > + dsp_info_len += snprintf(dsp_reg_info + dsp_info_len, > + AW_NAME_BUF_MAX - dsp_info_len, > + "%02x,%02x,", (reg_val >> 0) & 0xff, > + (reg_val >> 8) & 0xff); > + if ((i / 2 + 1) % 8 == 0) { > + aw_dev_info(aw883xx->dev, "%s: %s", format, dsp_reg_info); > + dsp_info_len = 0; > + memset(dsp_reg_info, 0, AW_NAME_BUF_MAX); > + } > + > + if (((data_len) % 8 != 0) && > + (i == (data_len - 2))) { > + aw_dev_info(aw883xx->dev, "%s: %s", format, dsp_reg_info); > + dsp_info_len = 0; > + memset(dsp_reg_info, 0, AW_NAME_BUF_MAX); > + } > + } > + > + dsp_info_len = 0; > + memset(dsp_reg_info, 0, AW_NAME_BUF_MAX); > + devm_kfree(aw883xx->dev, dsp_reg_info); > + dsp_reg_info = NULL; > + mutex_unlock(&aw883xx->i2c_lock); > + > + return 0; > +} > + > +static ssize_t aw883xx_dsp_show(struct device *dev, > + struct device_attribute *attr, char *buf) > +{ > + struct aw883xx *aw883xx = dev_get_drvdata(dev); > + ssize_t len = 0; > + int ret = -1; > + uint32_t data_len; > + > + if (aw883xx->aw_pa->dsp_cfg == AW_DEV_DSP_BYPASS) { > + len += snprintf((char *)(buf + len), PAGE_SIZE - len, > + "%s: dsp bypass\n", __func__); > + } else { > + len += snprintf((char *)(buf + len), PAGE_SIZE - len, > + "%s: dsp working\n", __func__); > + ret = aw883xx_dev_get_iis_status(aw883xx->aw_pa); > + if (ret < 0) { > + len += snprintf((char *)(buf + len), > + PAGE_SIZE - len, > + "%s: no iis signal\n", > + __func__); > + aw_dev_err(aw883xx->dev, "no iis signal, dsp show failed"); > + return len; > + } > + > + len += snprintf(buf + len, PAGE_SIZE - len, > + "dsp firmware and config info is displayed in the kernel log\n"); > + > + aw_dev_info(aw883xx->dev, "dsp_firmware_len:%d", aw883xx->aw_pa->dsp_fw_len); > + ret = aw883xx_dsp_log_info(aw883xx, aw883xx->aw_pa->dsp_mem_desc.dsp_fw_base_addr, > + aw883xx->aw_pa->dsp_fw_len, "dsp_fw"); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "dsp_fw display failed"); > + return len; > + } > + > + aw_dev_info(aw883xx->dev, "dsp_config_len:%d", aw883xx->aw_pa->dsp_cfg_len); > + ret = aw883xx_dsp_log_info(aw883xx, aw883xx->aw_pa->dsp_mem_desc.dsp_cfg_base_addr, > + aw883xx->aw_pa->dsp_cfg_len, "dsp_config"); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "dsp_config display failed"); > + return len; > + } > + > + aw_dev_info(aw883xx->dev, "dsp_config:0x8180-0x83fc"); > + data_len = 2 * (aw883xx->aw_pa->dsp_st_desc.dsp_reg_e1 - > + aw883xx->aw_pa->dsp_st_desc.dsp_reg_s1); > + ret = aw883xx_dsp_log_info(aw883xx, aw883xx->aw_pa->dsp_st_desc.dsp_reg_s1, > + data_len, "dsp_st"); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "dsp_config:0x8180-0x83fc failed"); > + return len; > + } > + > + aw_dev_info(aw883xx->dev, "dsp_config:0x9c00-0x9c5c"); > + data_len = 2 * (aw883xx->aw_pa->dsp_st_desc.dsp_reg_e2 - > + aw883xx->aw_pa->dsp_st_desc.dsp_reg_s2); > + ret = aw883xx_dsp_log_info(aw883xx, aw883xx->aw_pa->dsp_st_desc.dsp_reg_s2, > + data_len, "dsp_st"); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "dsp_config:0x9c00-0x9c5c display failed"); > + return len; > + } > + } > + > + return len; > +} > + > +static DEVICE_ATTR(reg, 0644, > + aw883xx_reg_show, aw883xx_reg_store); > +static DEVICE_ATTR(rw, 0644, > + aw883xx_rw_show, aw883xx_rw_store); > +static DEVICE_ATTR(drv_ver, 0444, > + aw883xx_drv_ver_show, NULL); > +static DEVICE_ATTR(dsp_rw, 0644, > + aw883xx_dsp_rw_show, aw883xx_dsp_rw_store); > +static DEVICE_ATTR(awrw, 0644, > + aw883xx_awrw_show, aw883xx_awrw_store); > +static DEVICE_ATTR(fade_step, 0644, > + aw883xx_fade_step_show, aw883xx_fade_step_store); > +static DEVICE_ATTR(dbg_prof, 0644, > + aw883xx_dbg_prof_show, aw883xx_dbg_prof_store); > +static DEVICE_ATTR(spk_temp, 0444, > + aw883xx_spk_temp_show, NULL); > +static DEVICE_ATTR(phase_sync, 0644, > + aw883xx_sync_flag_show, aw883xx_sync_flag_store); > +static DEVICE_ATTR(fade_en, 0644, > + aw883xx_fade_enable_show, aw883xx_fade_enable_store); > +static DEVICE_ATTR(dsp_re, 0444, > + aw883xx_dsp_re_show, NULL); > +static DEVICE_ATTR(i2c_log_en, 0644, > + aw883xx_log_en_show, aw883xx_log_en_store); > +static DEVICE_ATTR(dsp, 0444, > + aw883xx_dsp_show, NULL); > + > + > +static struct attribute *aw883xx_attributes[] = { > + &dev_attr_reg.attr, > + &dev_attr_rw.attr, > + &dev_attr_drv_ver.attr, > + &dev_attr_dsp_rw.attr, > + &dev_attr_awrw.attr, > + &dev_attr_fade_step.attr, > + &dev_attr_dbg_prof.attr, > + &dev_attr_spk_temp.attr, > + &dev_attr_phase_sync.attr, > + &dev_attr_fade_en.attr, > + &dev_attr_dsp_re.attr, > + &dev_attr_i2c_log_en.attr, > + &dev_attr_dsp.attr, > + NULL > +}; > + > +static struct attribute_group aw883xx_attribute_group = { > + .attrs = aw883xx_attributes > +}; All this use of sysfs seems questionable. You have all kinds of mixers already, what applications would use this? Answer: I'm going to delete that part in patch v3. > + > + > + > +/* > + * i2c driver > + */ > +static int aw883xx_i2c_probe(struct i2c_client *i2c, > + const struct i2c_device_id *id) > +{ > + struct aw883xx *aw883xx = NULL; > + int ret = -1; > + > + aw_dev_info(&i2c->dev, "enter"); > + > + if (!i2c_check_functionality(i2c->adapter, I2C_FUNC_I2C)) { > + aw_dev_err(&i2c->dev, "check_functionality failed"); > + return -EIO; > + } > + > + aw883xx = aw883xx_malloc_init(i2c); > + if (aw883xx == NULL) { > + aw_dev_err(&i2c->dev, "malloc aw883xx failed"); > + return -ENOMEM; > + } > + i2c_set_clientdata(i2c, aw883xx); > + > + ret = aw883xx_parse_dt(aw883xx); > + if (ret < 0) { > + aw_dev_err(&i2c->dev, "parse dts failed"); > + return ret; > + } > + > + /*get gpio resource*/ > + ret = aw883xx_gpio_request(aw883xx); > + if (ret) > + return ret; > + > + /* hardware reset */ > + aw883xx_hw_reset(aw883xx); > + > + /* aw883xx chip id */ > + ret = aw883xx_read_chipid(aw883xx); > + if (ret < 0) { > + aw_dev_err(&i2c->dev, "aw883xx_read_chipid failed ret=%d", ret); > + return ret; > + } > + > + /*aw pa init*/ > + ret = aw883xx_init(aw883xx); > + if (ret < 0) > + return ret; > + > + ret = aw883xx_platform_init(aw883xx); > + if (ret < 0) { > + aw_dev_err(&i2c->dev, "get platform failed"); > + return ret; > + } > + > + ret = aw883xx_interrupt_init(aw883xx); > + if (ret < 0) > + return ret; > + > + ret = aw883xx_componet_codec_register(aw883xx); component... Answer: I will fix this problem in patch v3. > + if (ret) { > + aw_dev_err(&i2c->dev, "codec register failed"); > + return ret; > + } > + > + ret = sysfs_create_group(&i2c->dev.kobj, &aw883xx_attribute_group); > + if (ret < 0) { > + aw_dev_info(&i2c->dev, "error creating sysfs attr files"); > + goto err_sysfs; > + } > + > + dev_set_drvdata(&i2c->dev, aw883xx); > + > + /*add device to total list*/ > + mutex_lock(&g_aw883xx_lock); > + g_aw883xx_dev_cnt++; > + mutex_unlock(&g_aw883xx_lock); why do you need to keep track of instances? Answer: I'm going to delete that part in patch v3. > + > + aw_dev_info(&i2c->dev, "dev_cnt %d probe completed successfully", > + g_aw883xx_dev_cnt); > + > + return 0; > + > + > +err_sysfs: > + aw_componet_codec_ops.unregister_codec(&i2c->dev); > + return ret; > +} > + > +static int aw883xx_i2c_remove(struct i2c_client *i2c) > +{ > + struct aw883xx *aw883xx = i2c_get_clientdata(i2c); > + > + aw_dev_info(aw883xx->dev, "enter"); > + > + if (gpio_to_irq(aw883xx->irq_gpio)) > + devm_free_irq(&i2c->dev, > + gpio_to_irq(aw883xx->irq_gpio), > + aw883xx); > + > + sysfs_remove_group(&aw883xx->dev->kobj, > + &aw883xx_attribute_group); > + > + /*free device resource */ > + aw883xx_device_remove(aw883xx->aw_pa); > + > + aw_componet_codec_ops.unregister_codec(&i2c->dev); > + > + mutex_lock(&g_aw883xx_lock); > + g_aw883xx_dev_cnt--; > + if (g_aw883xx_dev_cnt == 0) { > + vfree(g_awinic_cfg); > + g_awinic_cfg = NULL; > + } > + mutex_unlock(&g_aw883xx_lock); > + > + return 0; > +} > + > +static const struct i2c_device_id aw883xx_i2c_id[] = { > + {AW883XX_I2C_NAME, 0}, > + {} > +}; > + > +MODULE_DEVICE_TABLE(i2c, aw883xx_i2c_id); > + > +static const struct of_device_id aw883xx_dt_match[] = { > + {.compatible = "awinic,aw883xx_smartpa"}, > + {}, > +}; > + > +static struct i2c_driver aw883xx_i2c_driver = { > + .driver = { > + .name = AW883XX_I2C_NAME, > + .owner = THIS_MODULE, > + .of_match_table = of_match_ptr(aw883xx_dt_match), > + }, > + .probe = aw883xx_i2c_probe, > + .remove = aw883xx_i2c_remove, > + .id_table = aw883xx_i2c_id, > +}; > + > +static int __init aw883xx_i2c_init(void) > +{ > + int ret = -1; > + > + aw_pr_info("aw883xx driver version %s", AW883XX_DRIVER_VERSION); > + > + ret = i2c_add_driver(&aw883xx_i2c_driver); > + if (ret) > + aw_pr_err("fail to add aw883xx device into i2c"); > + > + return ret; > +} > +module_init(aw883xx_i2c_init); > + > +static void __exit aw883xx_i2c_exit(void) > +{ > + i2c_del_driver(&aw883xx_i2c_driver); > +} > +module_exit(aw883xx_i2c_exit); use module_i2c_driver? Answer: I will fix this problem in patch v3. > + > +MODULE_DESCRIPTION("ASoC AW883XX Smart PA Driver"); > +MODULE_LICENSE("GPL v2"); "GPL" is enough Answer: Because of its purpose, this code requires GPL V2 > + > diff --git a/sound/soc/codecs/aw883xx/aw883xx.h b/sound/soc/codecs/aw883xx/aw883xx.h > new file mode 100644 > index 0000000..076f7cd > --- /dev/null > +++ b/sound/soc/codecs/aw883xx/aw883xx.h > @@ -0,0 +1,213 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +/* > + * aw883xx.c -- ALSA Soc AW883XX codec support > + * > + * Copyright (c) 2020 AWINIC Technology CO., LTD 2022? Answer: I will fix this problem in patch v3. > + * > + * Author: Bruce zhao <zhaolei(a)awinic.com> > + */ > + > +#ifndef __AW883XX_H__ > +#define __AW883XX_H__ > + > +#include <linux/version.h> > +#include <sound/control.h> > +#include <sound/soc.h> > +#include "aw883xx_device.h" > + > +/*#define AW_QCOM_PLATFORM*/ > +#define AW_MTK_PLATFORM > +/*#define AW_SPRD_PLATFORM*/ > + > +/*#define AW_SYNC_LOAD*/ > + > +#define AW883XX_CHIP_ID_REG (0x00) > + > +#if KERNEL_VERSION(4, 19, 1) <= LINUX_VERSION_CODE > +#define AW_KERNEL_VER_OVER_4_19_1 > +#endif > + > +#if KERNEL_VERSION(5, 4, 0) <= LINUX_VERSION_CODE > +#define AW_KERNEL_VER_OVER_5_4_0 > +MODULE_IMPORT_NS(VFS_internal_I_am_really_a_filesystem_and_am_NOT_a_driver); > +#endif seriously? Answer: I will fix this problem in patch v3. > + > +/* > + * i2c transaction on Linux limited to 64k > + * (See Linux kernel documentation: Documentation/i2c/writing-clients) > + */ > +#define MAX_I2C_BUFFER_SIZE (65536) > +#define AW883XX_READ_MSG_NUM (2) > + > +#define AW_I2C_RETRIES (5) > +#define AW_I2C_RETRY_DELAY (5)/* 5ms */ > + > +#define AW_READ_CHIPID_RETRY_DELAY (5)/* 5ms */ > +#define AW_START_RETRIES (5) > + > +#define AW883XX_FLAG_START_ON_MUTE (1 << 0) > +#define AW883XX_FLAG_SKIP_INTERRUPTS (1 << 1) > + > +#define AW883XX_I2S_CHECK_MAX (5) > + > +#define AW883XX_SYSST_CHECK_MAX (10) > + > +#define AW883XX_BIN_TYPE_NUM (3) > +#define AW883XX_LOAD_FW_DELAY_TIME (3000) > +#define AW883XX_START_WORK_DELAY_MS (0) > + > + > +#define AW883XX_DSP_16_DATA_MASK (0x0000ffff) > + > +#define AW_GET_IV_CNT_MAX (6) > +#define AW_KCONTROL_NUM (4) > +#define AW_HW_MONITOR_DELAY (1000) > + > +enum { > + AWRW_I2C_ST_NONE = 0, > + AWRW_I2C_ST_READ, > + AWRW_I2C_ST_WRITE, > +}; > + > +enum { > + AWRW_DSP_ST_NONE = 0, > + AWRW_DSP_READY, > +}; > + > +enum { > + AW_SYNC_START = 0, > + AW_ASYNC_START, > +}; > + > + > +#define AWRW_ADDR_BYTES (1) > +#define AWRW_DATA_BYTES (2) > +#define AWRW_HDR_LEN (24) > + > +enum { > + AWRW_FLAG_WRITE = 0, > + AWRW_FLAG_READ, > +}; > + > +enum { > + AWRW_HDR_WR_FLAG = 0, > + AWRW_HDR_ADDR_BYTES, > + AWRW_HDR_DATA_BYTES, > + AWRW_HDR_REG_NUM, > + AWRW_HDR_REG_ADDR, > + AWRW_HDR_MAX, > +}; > + > +struct aw883xx_i2c_packet { > + unsigned char i2c_status; > + unsigned char dsp_status; > + unsigned int reg_num; > + unsigned int reg_addr; > + unsigned int dsp_addr; > + char *reg_data; > +}; > + > + > + > +enum { > + AW883XX_STREAM_CLOSE = 0, > + AW883XX_STREAM_OPEN, > +}; > + > +enum aw883xx_init { > + AW883XX_INIT_ST = 0, > + AW883XX_INIT_OK = 1, > + AW883XX_INIT_NG = 2, > +}; > + > +enum aw_re_range { > + AW_RE_MIN = 1000, > + AW_RE_MAX = 40000, > +}; > + > +enum { > + AW_RENAME_DISABLE = 0, > + AW_RENAME_ENABLE, > +}; > + > +/* > + * Compatible with codec and component > + */ > +#ifdef AW_KERNEL_VER_OVER_4_19_1 > +typedef struct snd_soc_component aw_snd_soc_codec_t; > +typedef struct snd_soc_component_driver aw_snd_soc_codec_driver_t; > +#else > +typedef struct snd_soc_codec aw_snd_soc_codec_t; > +typedef struct snd_soc_codec_driver aw_snd_soc_codec_driver_t; > +#endif > + > +struct aw_componet_codec_ops { > + aw_snd_soc_codec_t *(*kcontrol_codec)(struct snd_kcontrol *kcontrol); > + void *(*codec_get_drvdata)(aw_snd_soc_codec_t *codec); > + int (*add_codec_controls)(aw_snd_soc_codec_t *codec, > + const struct snd_kcontrol_new *controls, unsigned int num_controls); > + void (*unregister_codec)(struct device *dev); > + int (*register_codec)(struct device *dev, > + const aw_snd_soc_codec_driver_t *codec_drv, > + struct snd_soc_dai_driver *dai_drv, > + int num_dai); > +}; > + > +struct aw883xx { > + struct i2c_client *i2c; > + struct device *dev; > + struct mutex lock; > + struct mutex i2c_lock; > + aw_snd_soc_codec_t *codec; > + struct aw_componet_codec_ops *codec_ops; > + struct aw_device *aw_pa; > + > + int sysclk; > + int reset_gpio; > + int irq_gpio; > + > + unsigned char phase_sync; /*phase sync*/ > + uint32_t allow_pw; > + uint32_t rename_flag; > + uint8_t pstream; > + unsigned char fw_retry_cnt; > + > + uint8_t dbg_en_prof; > + uint8_t i2c_log_en; > + uint8_t spin_flag; > + > + struct list_head list; > + > + struct workqueue_struct *work_queue; > + struct delayed_work start_work; > + struct delayed_work monitor_work; > + struct delayed_work interrupt_work; > + struct delayed_work acf_work; > + > + uint8_t reg_addr; > + uint16_t dsp_addr; > + uint16_t chip_id; > + struct aw883xx_i2c_packet i2c_packet; > +}; > + > +int aw883xx_init(struct aw883xx *aw883xx); > +int aw883xx_i2c_writes(struct aw883xx *aw883xx, > + uint8_t reg_addr, uint8_t *buf, uint16_t len); > +int aw883xx_i2c_write(struct aw883xx *aw883xx, > + uint8_t reg_addr, uint16_t reg_data); > +int aw883xx_reg_write(struct aw883xx *aw883xx, > + uint8_t reg_addr, uint16_t reg_data); > +int aw883xx_i2c_read(struct aw883xx *aw883xx, > + uint8_t reg_addr, uint16_t *reg_data); > +int aw883xx_reg_read(struct aw883xx *aw883xx, > + uint8_t reg_addr, uint16_t *reg_data); > +int aw883xx_reg_write_bits(struct aw883xx *aw883xx, > + uint8_t reg_addr, uint16_t mask, uint16_t reg_data); > +int aw883xx_dsp_write(struct aw883xx *aw883xx, > + uint16_t dsp_addr, uint32_t dsp_data, uint8_t data_type); > +int aw883xx_dsp_read(struct aw883xx *aw883xx, > + uint16_t dsp_addr, uint32_t *dsp_data, uint8_t data_type); > +int aw883xx_get_dev_num(void); > +int aw883xx_get_version(char *buf, int size); > + > +#endif > diff --git a/sound/soc/codecs/aw883xx/aw883xx_bin_parse.c b/sound/soc/codecs/aw883xx/aw883xx_bin_parse.c > new file mode 100644 > index 0000000..2338b73 > --- /dev/null > +++ b/sound/soc/codecs/aw883xx/aw883xx_bin_parse.c > @@ -0,0 +1,1392 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * aw_bin_parse.c -- ALSA Soc AW883XX codec support > + * > + * Copyright (c) 2020 AWINIC Technology CO., LTD > + */ > + > +#include <linux/module.h> > +#include <linux/kernel.h> > +#include <linux/i2c.h> > +#include <linux/of_gpio.h> > +#include <linux/delay.h> > +#include <linux/device.h> > +#include <linux/firmware.h> > +#include <linux/slab.h> > +#include <linux/version.h> > +#include <linux/input.h> > +#include <linux/interrupt.h> > +#include <linux/debugfs.h> > +#include <linux/miscdevice.h> > +#include <linux/uaccess.h> > +#include <linux/regmap.h> > +#include <linux/timer.h> > +#include <linux/workqueue.h> > +#include <linux/hrtimer.h> > +#include <linux/mutex.h> > +#include <linux/cdev.h> > +#include <linux/list.h> > +#include <linux/string.h> > +#include "aw883xx_bin_parse.h" > +#include "aw883xx_log.h" > + > +/* "code version"-"excel version" */ > +#define AWINIC_CODE_VERSION "V0.0.8-V1.0.4" > + > +#define DEBUG_LOG_LEVEL > +#ifdef DEBUG_LOG_LEVEL > +#define DBG(fmt, arg...) \ > + pr_debug("AWINIC_BIN %s,line= %d,"fmt, __func__, __LINE__, ##arg) > +#define DBG_ERR(fmt, arg...) \ > + pr_err("AWINIC_BIN_ERR %s,line= %d,"fmt, __func__, __LINE__, ##arg) > +#else > +#define DBG(fmt, arg...) do {} while (0) > +#define DBG_ERR(fmt, arg...) do {} while (0) > +#endif > + > +#define printing_data_code > + > +#define BigLittleSwap16(A) ((((uint16_t)(A) & 0xff00) >> 8) | \ > + (((uint16_t)(A) & 0x00ff) << 8)) > + > +#define BigLittleSwap32(A) ((((uint32_t)(A) & 0xff000000) >> 24) | \ > + (((uint32_t)(A) & 0x00ff0000) >> 8) | \ > + (((uint32_t)(A) & 0x0000ff00) << 8) | \ > + (((uint32_t)(A) & 0x000000ff) << 24)) > + > +static char *profile_name[AW_PROFILE_MAX] = { > + "Music", "Voice", "Voip", "Ringtone", > + "Ringtone_hs", "Lowpower", "Bypass", > + "Mmi", "Fm", "Notification", "Receiver" > +}; > + > +static int aw_parse_bin_header_1_0_0(struct aw_bin *bin); > + > +/** > + * > + * Interface function > + * > + * return value: > + * value = 0 :success; > + * value = -1 :check bin header version > + * value = -2 :check bin data type > + * value = -3 :check sum or check bin data len error > + * value = -4 :check data version > + * value = -5 :check register num > + * value = -6 :check dsp reg num > + * value = -7 :check soc app num > + * value = -8 :bin is NULL point > + * > + */ > + > +/* > + * check sum data > + */ > +static int aw_check_sum(struct aw_bin *bin, int bin_num) > +{ > + unsigned int i = 0; > + unsigned int sum_data = 0; > + unsigned int check_sum = 0; > + char *p_check_sum = NULL; > + > + DBG("enter\n"); > + p_check_sum = &(bin->info.data[(bin->header_info[bin_num].valid_data_addr - > + bin->header_info[bin_num].header_len)]); > + DBG("aw_bin_parse p_check_sum = %p\n", p_check_sum); > + check_sum = GET_32_DATA(*(p_check_sum + 3), *(p_check_sum + 2), > + *(p_check_sum + 1), *(p_check_sum)); > + > + for (i = 4; i < bin->header_info[bin_num].bin_data_len + > + bin->header_info[bin_num].header_len; i++) { > + sum_data += *(p_check_sum + i); > + } > + DBG("aw_bin_parse bin_num = %d, check_sum = 0x%x, sum_data = 0x%x\n", > + bin_num, check_sum, sum_data); > + if (sum_data != check_sum) { > + p_check_sum = NULL; > + DBG_ERR("aw_bin_parse check sum or check bin data len error\n"); > + DBG_ERR("aw_bin_parse bin_num = %d\n", bin_num); > + DBG_ERR("aw_bin_parse check_sum = 0x%x\n", check_sum); > + DBG_ERR("aw_bin_parse sum_data = 0x%x\n", sum_data); > + return -BIN_DATA_LEN_ERR; > + } > + p_check_sum = NULL; > + > + return 0; > +} > + > +static int aw_check_data_version(struct aw_bin *bin, int bin_num) > +{ > + int i = 0; > + > + DBG("enter\n"); > + for (i = DATA_VERSION_V1; i < DATA_VERSION_MAX; i++) { > + if (bin->header_info[bin_num].bin_data_ver == i) > + return 0; > + } > + DBG_ERR("aw_bin_parse Unrecognized this bin data version\n"); > + return -DATA_VER_ERR; > +} > + > +static int aw_check_register_num_v1(struct aw_bin *bin, int bin_num) > +{ > + unsigned int check_register_num = 0; > + unsigned int parse_register_num = 0; > + char *p_check_sum = NULL; > + struct bin_header_info temp_info; > + > + DBG("enter\n"); > + temp_info = bin->header_info[bin_num]; > + p_check_sum = &(bin->info.data[(temp_info.valid_data_addr)]); > + DBG("aw_bin_parse p_check_sum = %p\n", p_check_sum); > + parse_register_num = GET_32_DATA(*(p_check_sum + 3), *(p_check_sum + 2), > + *(p_check_sum + 1), *(p_check_sum)); > + check_register_num = (bin->header_info[bin_num].bin_data_len - 4) / > + (bin->header_info[bin_num].reg_byte_len + > + bin->header_info[bin_num].data_byte_len); > + DBG("aw_bin_parse bin_num = %d\n", bin_num); > + DBG("aw_bin_parse parse_register_num = 0x%x\n", parse_register_num); > + DBG("aw_bin_parse check_register_num = 0x%x\n", check_register_num); > + if (parse_register_num != check_register_num) { > + p_check_sum = NULL; > + DBG_ERR("aw_bin_parse check register num error\n"); > + DBG_ERR("aw_bin_parse bin_num = %d\n", bin_num); > + DBG_ERR("aw_bin_parse parse_register_num = 0x%x\n", > + parse_register_num); > + DBG_ERR("aw_bin_parse check_register_num = 0x%x\n", > + check_register_num); > + return -REG_NUM_ERR; > + } > + bin->header_info[bin_num].reg_num = parse_register_num; > + bin->header_info[bin_num].valid_data_len = temp_info.bin_data_len - 4; > + p_check_sum = NULL; > + bin->header_info[bin_num].valid_data_addr = temp_info.valid_data_addr + 4; > + return 0; > +} > + > +static int aw_check_dsp_reg_num_v1(struct aw_bin *bin, int bin_num) > +{ > + unsigned int check_dsp_reg_num = 0; > + unsigned int parse_dsp_reg_num = 0; > + char *p_check_sum = NULL; > + struct bin_header_info temp_info; > + > + DBG("enter\n"); > + temp_info = bin->header_info[bin_num]; > + p_check_sum = &(bin->info.data[(temp_info.valid_data_addr)]); > + DBG("aw_bin_parse p_check_sum = %p\n", p_check_sum); > + parse_dsp_reg_num = GET_32_DATA(*(p_check_sum + 7), *(p_check_sum + 6), > + *(p_check_sum + 5), *(p_check_sum + 4)); > + bin->header_info[bin_num].reg_data_byte_len = > + GET_32_DATA(*(p_check_sum + 11), *(p_check_sum + 10), > + *(p_check_sum + 9), *(p_check_sum + 8)); > + check_dsp_reg_num = (bin->header_info[bin_num].bin_data_len - 12) / > + bin->header_info[bin_num].reg_data_byte_len; > + DBG("aw_bin_parse bin_num = %d\n", bin_num); > + DBG("aw_bin_parse parse_dsp_reg_num = 0x%x\n", parse_dsp_reg_num); > + DBG("aw_bin_parse check_dsp_reg_num = 0x%x\n", check_dsp_reg_num); > + if (parse_dsp_reg_num != check_dsp_reg_num) { > + p_check_sum = NULL; > + DBG_ERR("aw_bin_parse check dsp reg num error\n"); > + DBG_ERR("aw_bin_parse bin_num = %d\n", bin_num); > + DBG_ERR("aw_bin_parse parse_dsp_reg_num = 0x%x\n", > + parse_dsp_reg_num); > + DBG_ERR("aw_bin_parse check_dsp_reg_num = 0x%x\n", > + check_dsp_reg_num); > + return -DSP_REG_NUM_ERR; > + } > + bin->header_info[bin_num].download_addr = > + GET_32_DATA(*(p_check_sum + 3), *(p_check_sum + 2), > + *(p_check_sum + 1), *(p_check_sum)); > + bin->header_info[bin_num].reg_num = parse_dsp_reg_num; > + bin->header_info[bin_num].valid_data_len = temp_info.bin_data_len - 12; > + p_check_sum = NULL; > + bin->header_info[bin_num].valid_data_addr = temp_info.valid_data_addr + 12; > + return 0; > +} > + > +static int aw_check_soc_app_num_v1(struct aw_bin *bin, int bin_num) > +{ > + unsigned int check_soc_app_num = 0; > + unsigned int parse_soc_app_num = 0; > + char *p_check_sum = NULL; > + struct bin_header_info temp_info; > + > + DBG("enter\n"); > + temp_info = bin->header_info[bin_num]; > + p_check_sum = &(bin->info.data[(temp_info.valid_data_addr)]); > + DBG("aw_bin_parse p_check_sum = %p\n", p_check_sum); > + bin->header_info[bin_num].app_version = GET_32_DATA(*(p_check_sum + 3), > + *(p_check_sum + 2), *(p_check_sum + 1), *(p_check_sum)); > + parse_soc_app_num = GET_32_DATA(*(p_check_sum + 11), > + *(p_check_sum + 10), *(p_check_sum + 9), *(p_check_sum + 8)); > + check_soc_app_num = bin->header_info[bin_num].bin_data_len - 12; > + DBG("aw_bin_parse bin_num = %d\n", bin_num); > + DBG("aw_bin_parse parse_soc_app_num = 0x%x\n", parse_soc_app_num); > + DBG("aw_bin_parse check_soc_app_num = 0x%x\n", check_soc_app_num); > + if (parse_soc_app_num != check_soc_app_num) { > + p_check_sum = NULL; > + DBG_ERR("aw_bin_parse check soc app num error\n"); > + DBG_ERR("aw_bin_parse bin_num = %d\n", bin_num); > + DBG_ERR("aw_bin_parse parse_soc_app_num = 0x%x\n", > + parse_soc_app_num); > + DBG_ERR("aw_bin_parse check_soc_app_num = 0x%x\n", > + check_soc_app_num); > + return -SOC_APP_NUM_ERR; > + } > + bin->header_info[bin_num].reg_num = parse_soc_app_num; > + bin->header_info[bin_num].download_addr = > + GET_32_DATA(*(p_check_sum + 7), *(p_check_sum + 6), > + *(p_check_sum + 5), *(p_check_sum + 4)); > + bin->header_info[bin_num].valid_data_len = temp_info.bin_data_len - 12; > + p_check_sum = NULL; > + bin->header_info[bin_num].valid_data_addr = temp_info.valid_data_addr + 12; > + return 0; > +} > +/* > + * bin header 1_0_0 > + */ > +static void aw_get_single_bin_header_1_0_0(struct aw_bin *bin) > +{ > + int i; > + > + bin->header_info[bin->all_bin_parse_num].header_len = 60; > + bin->header_info[bin->all_bin_parse_num].check_sum = > + GET_32_DATA(*(bin->p_addr + 3), *(bin->p_addr + 2), > + *(bin->p_addr + 1), *(bin->p_addr)); > + bin->header_info[bin->all_bin_parse_num].header_ver = > + GET_32_DATA(*(bin->p_addr + 7), *(bin->p_addr + 6), > + *(bin->p_addr + 5), *(bin->p_addr + 4)); > + bin->header_info[bin->all_bin_parse_num].bin_data_type = > + GET_32_DATA(*(bin->p_addr + 11), *(bin->p_addr + 10), > + *(bin->p_addr + 9), *(bin->p_addr + 8)); > + bin->header_info[bin->all_bin_parse_num].bin_data_ver = > + GET_32_DATA(*(bin->p_addr + 15), *(bin->p_addr + 14), > + *(bin->p_addr + 13), *(bin->p_addr + 12)); > + bin->header_info[bin->all_bin_parse_num].bin_data_len = > + GET_32_DATA(*(bin->p_addr + 19), *(bin->p_addr + 18), > + *(bin->p_addr + 17), *(bin->p_addr + 16)); > + bin->header_info[bin->all_bin_parse_num].ui_ver = > + GET_32_DATA(*(bin->p_addr + 23), *(bin->p_addr + 22), > + *(bin->p_addr + 21), *(bin->p_addr + 20)); > + bin->header_info[bin->all_bin_parse_num].reg_byte_len = > + GET_32_DATA(*(bin->p_addr + 35), *(bin->p_addr + 34), > + *(bin->p_addr + 33), *(bin->p_addr + 32)); > + bin->header_info[bin->all_bin_parse_num].data_byte_len = > + GET_32_DATA(*(bin->p_addr + 39), *(bin->p_addr + 38), > + *(bin->p_addr + 37), *(bin->p_addr + 36)); > + bin->header_info[bin->all_bin_parse_num].device_addr = > + GET_32_DATA(*(bin->p_addr + 43), *(bin->p_addr + 42), > + *(bin->p_addr + 41), *(bin->p_addr + 40)); > + for (i = 0; i < 8; i++) { > + bin->header_info[bin->all_bin_parse_num].chip_type[i] = > + *(bin->p_addr + 24 + i); > + } > + bin->header_info[bin->all_bin_parse_num].reg_num = 0x00000000; > + bin->header_info[bin->all_bin_parse_num].reg_data_byte_len = 0x00000000; > + bin->header_info[bin->all_bin_parse_num].download_addr = 0x00000000; > + bin->header_info[bin->all_bin_parse_num].app_version = 0x00000000; > + bin->header_info[bin->all_bin_parse_num].valid_data_len = 0x00000000; > + bin->all_bin_parse_num += 1; > +} > + > +static int aw_parse_each_of_multi_bins_1_0_0(unsigned int bin_num, int bin_serial_num, > + struct aw_bin *bin) > +{ > + int ret = 0; > + unsigned int bin_start_addr = 0; > + unsigned int valid_data_len = 0; > + struct bin_header_info aw_bin_header_info; > + > + DBG("aw_bin_parse enter multi bin branch -- %s\n", __func__); > + aw_bin_header_info = bin->header_info[bin->all_bin_parse_num - 1]; > + if (!bin_serial_num) { > + bin_start_addr = GET_32_DATA(*(bin->p_addr + 67), *(bin->p_addr > + + 66), *(bin->p_addr + 65), *(bin->p_addr + 64)); > + bin->p_addr += (60 + bin_start_addr); > + bin->header_info[bin->all_bin_parse_num].valid_data_addr = > + aw_bin_header_info.valid_data_addr + 4 + 8 * bin_num + 60; > + } else { > + valid_data_len = aw_bin_header_info.bin_data_len; > + bin->p_addr += (60 + valid_data_len); > + bin->header_info[bin->all_bin_parse_num].valid_data_addr = > + aw_bin_header_info.valid_data_addr > + + aw_bin_header_info.bin_data_len > + + 60; > + } > + > + ret = aw_parse_bin_header_1_0_0(bin); > + return ret; > +} > + > +/* Get the number of bins in multi bins, and set a for loop, > + * loop processing each bin data > + */ > +static int aw_get_multi_bin_header_1_0_0(struct aw_bin *bin) > +{ > + int i = 0; > + int ret = 0; > + unsigned int bin_num = 0; > + > + DBG("aw_bin_parse enter multi bin branch -- %s\n", __func__); > + bin_num = GET_32_DATA(*(bin->p_addr + 63), *(bin->p_addr + 62), > + *(bin->p_addr + 61), *(bin->p_addr + 60)); > + if (bin->multi_bin_parse_num == 1) > + bin->header_info[bin->all_bin_parse_num].valid_data_addr = 60; > + aw_get_single_bin_header_1_0_0(bin); > + > + for (i = 0; i < bin_num; i++) { > + DBG("aw_bin_parse enter multi bin for is %d\n", i); > + ret = aw_parse_each_of_multi_bins_1_0_0(bin_num, i, bin); > + if (ret < 0) > + return ret; > + } > + return 0; > +} > + > +/* > + * If the bin framework header version is 1.0.0, > + * determine the data type of bin, and then perform different processing > + * according to the data type > + * If it is a single bin data type, write the data directly > + * into the structure array > + * If it is a multi-bin data type, first obtain the number of bins, > + * and then recursively call the bin frame header processing function > + * according to the bin number to process the frame header information > + * of each bin separately > + */ > +static int aw_parse_bin_header_1_0_0(struct aw_bin *bin) > +{ > + int ret = 0; > + unsigned int bin_data_type; > + > + bin_data_type = GET_32_DATA(*(bin->p_addr + 11), *(bin->p_addr + 10), > + *(bin->p_addr + 9), *(bin->p_addr + 8)); > + DBG("aw_bin_parse bin_data_type 0x%x\n", bin_data_type); > + switch (bin_data_type) { > + case DATA_TYPE_REGISTER: > + case DATA_TYPE_DSP_REG: > + case DATA_TYPE_SOC_APP: > + /* Divided into two processing methods, > + * one is single bin processing, > + * and the other is single bin processing in multi bin > + */ > + DBG("aw_bin_parse enter single bin branch\n"); > + bin->single_bin_parse_num += 1; > + DBG("%s bin->single_bin_parse_num is %d\n", __func__, > + bin->single_bin_parse_num); > + if (!bin->multi_bin_parse_num) > + bin->header_info[bin->all_bin_parse_num].valid_data_addr = 60; > + aw_get_single_bin_header_1_0_0(bin); > + break; > + case DATA_TYPE_MULTI_BINS: > + /* Get the number of times to enter multi bins */ > + DBG("aw_bin_parse enter multi bin branch\n"); > + bin->multi_bin_parse_num += 1; > + DBG("%s bin->multi_bin_parse_num is %d\n", __func__, > + bin->multi_bin_parse_num); > + ret = aw_get_multi_bin_header_1_0_0(bin); > + if (ret < 0) > + return ret; > + break; > + } > + return 0; > +} > + > +/* get the bin's header version */ > +static int aw_check_bin_header_version(struct aw_bin *bin) > +{ > + int ret = 0; > + unsigned int header_version = 0; > + > + header_version = GET_32_DATA(*(bin->p_addr + 7), *(bin->p_addr + 6), > + *(bin->p_addr + 5), *(bin->p_addr + 4)); > + DBG("aw_bin_parse header_version 0x%x\n", header_version); > + /* Write data to the corresponding structure array > + * according to different formats of the bin frame header version > + */ > + switch (header_version) { > + case HEADER_VERSION_1_0_0: > + ret = aw_parse_bin_header_1_0_0(bin); > + return ret; > + default: > + DBG_ERR("aw_bin_parse Unrecognized this bin header version\n"); > + return -BIN_HEADER_VER_ERR; > + } > +} > + > +static int aw_parsing_bin_file(struct aw_bin *bin) > +{ > + int i = 0; > + int ret = 0; > + > + DBG("aw_bin_parse code version:%s\n", AWINIC_CODE_VERSION); > + if (!bin) { > + DBG_ERR("aw_bin_parse bin is NULL\n"); > + return -BIN_IS_NULL; > + } > + bin->p_addr = bin->info.data; > + bin->all_bin_parse_num = 0; > + bin->multi_bin_parse_num = 0; > + bin->single_bin_parse_num = 0; > + > + /* filling bins header info */ > + ret = aw_check_bin_header_version(bin); > + if (ret < 0) { > + DBG_ERR("aw_bin_parse check bin header version error\n"); > + return ret; > + } > + bin->p_addr = NULL; > + > + /* check bin header info */ > + for (i = 0; i < bin->all_bin_parse_num; i++) { > + /* check sum */ > + ret = aw_check_sum(bin, i); > + if (ret < 0) { > + DBG_ERR("aw_bin_parse check sum data error\n"); > + return ret; > + } > + /* check bin data version */ > + ret = aw_check_data_version(bin, i); > + if (ret < 0) { > + DBG_ERR("aw_bin_parse check data version error\n"); > + return ret; > + } > + /* check valid data */ > + if (bin->header_info[i].bin_data_ver == DATA_VERSION_V1) { > + /* check register num */ > + if (bin->header_info[i].bin_data_type == > + DATA_TYPE_REGISTER) { > + ret = aw_check_register_num_v1(bin, i); > + if (ret < 0) > + return ret; > + /* check dsp reg num */ > + } else if (bin->header_info[i].bin_data_type == > + DATA_TYPE_DSP_REG) { > + ret = aw_check_dsp_reg_num_v1(bin, i); > + if (ret < 0) > + return ret; > + /* check soc app num */ > + } else if (bin->header_info[i].bin_data_type == > + DATA_TYPE_SOC_APP) { > + ret = aw_check_soc_app_num_v1(bin, i); > + if (ret < 0) > + return ret; > + } else { > + bin->header_info[i].valid_data_len = > + bin->header_info[i].bin_data_len; > + } > + } > + } > + DBG("aw_bin_parse parsing success\n"); > + > + return 0; > +} > + > +int aw883xx_dev_dsp_data_order(struct aw_device *aw_dev, > + uint8_t *data, uint32_t data_len) > +{ > + int i = 0; > + uint8_t tmp_val = 0; > + > + aw_dev_dbg(aw_dev->dev, "enter"); > + > + if (data_len % 2 != 0) { > + aw_dev_dbg(aw_dev->dev, "data_len:%d unsupported", data_len); > + return -EINVAL; > + } > + > + for (i = 0; i < data_len; i += 2) { > + tmp_val = data[i]; > + data[i] = data[i + 1]; > + data[i + 1] = tmp_val; > + } > + > + return 0; > +} > + > +static int aw_dev_parse_raw_reg(struct aw_device *aw_dev, > + uint8_t *data, uint32_t data_len, struct aw_prof_desc *prof_desc) > +{ > + aw_dev_info(aw_dev->dev, "data_size:%d enter", data_len); > + > + prof_desc->sec_desc[AW_DATA_TYPE_REG].data = data; > + prof_desc->sec_desc[AW_DATA_TYPE_REG].len = data_len; > + > + prof_desc->prof_st = AW_PROFILE_OK; > + > + return 0; > +} > + > +static int aw_dev_parse_raw_dsp_cfg(struct aw_device *aw_dev, > + uint8_t *data, uint32_t data_len, struct aw_prof_desc *prof_desc) > +{ > + int ret; > + > + aw_dev_info(aw_dev->dev, "data_size:%d enter", data_len); > + > + ret = aw883xx_dev_dsp_data_order(aw_dev, data, data_len); > + if (ret < 0) > + return ret; > + > + prof_desc->sec_desc[AW_DATA_TYPE_DSP_CFG].data = data; > + prof_desc->sec_desc[AW_DATA_TYPE_DSP_CFG].len = data_len; > + > + prof_desc->prof_st = AW_PROFILE_OK; > + > + return 0; > +} > + > +static int aw_dev_parse_raw_dsp_fw(struct aw_device *aw_dev, > + uint8_t *data, uint32_t data_len, struct aw_prof_desc *prof_desc) > +{ > + int ret; > + > + aw_dev_info(aw_dev->dev, "data_size:%d enter", data_len); > + > + ret = aw883xx_dev_dsp_data_order(aw_dev, data, data_len); > + if (ret < 0) > + return ret; > + > + prof_desc->sec_desc[AW_DATA_TYPE_DSP_FW].data = data; > + prof_desc->sec_desc[AW_DATA_TYPE_DSP_FW].len = data_len; > + > + prof_desc->prof_st = AW_PROFILE_OK; > + > + return 0; > +} > + > +static int aw_dev_prof_parse_multi_bin(struct aw_device *aw_dev, > + uint8_t *data, uint32_t data_len, struct aw_prof_desc *prof_desc) > +{ > + struct aw_bin *aw_bin = NULL; > + int i; > + int ret; > + > + aw_bin = devm_kzalloc(aw_dev->dev, data_len + sizeof(struct aw_bin), GFP_KERNEL); > + if (aw_bin == NULL) > + return -ENOMEM; > + > + aw_bin->info.len = data_len; > + memcpy(aw_bin->info.data, data, data_len); > + > + ret = aw_parsing_bin_file(aw_bin); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "parse bin failed"); > + goto parse_bin_failed; > + } > + > + for (i = 0; i < aw_bin->all_bin_parse_num; i++) { > + if (aw_bin->header_info[i].bin_data_type == DATA_TYPE_REGISTER) { > + prof_desc->sec_desc[AW_DATA_TYPE_REG].len = > + aw_bin->header_info[i].valid_data_len; > + prof_desc->sec_desc[AW_DATA_TYPE_REG].data = > + data + aw_bin->header_info[i].valid_data_addr; > + } else if (aw_bin->header_info[i].bin_data_type == DATA_TYPE_DSP_REG) { > + ret = aw883xx_dev_dsp_data_order(aw_dev, > + data + aw_bin->header_info[i].valid_data_addr, > + aw_bin->header_info[i].valid_data_len); > + if (ret < 0) > + return ret; > + > + prof_desc->sec_desc[AW_DATA_TYPE_DSP_CFG].len = > + aw_bin->header_info[i].valid_data_len; > + prof_desc->sec_desc[AW_DATA_TYPE_DSP_CFG].data = > + data + aw_bin->header_info[i].valid_data_addr; > + } else if (aw_bin->header_info[i].bin_data_type == DATA_TYPE_DSP_FW) { > + ret = aw883xx_dev_dsp_data_order(aw_dev, > + data + aw_bin->header_info[i].valid_data_addr, > + aw_bin->header_info[i].valid_data_len); > + if (ret < 0) > + return ret; > + > + prof_desc->fw_ver = aw_bin->header_info[i].app_version; > + prof_desc->sec_desc[AW_DATA_TYPE_DSP_FW].len = > + aw_bin->header_info[i].valid_data_len; > + prof_desc->sec_desc[AW_DATA_TYPE_DSP_FW].data = > + data + aw_bin->header_info[i].valid_data_addr; > + } > + } > + devm_kfree(aw_dev->dev, aw_bin); > + aw_bin = NULL; > + prof_desc->prof_st = AW_PROFILE_OK; > + return 0; > + > +parse_bin_failed: > + devm_kfree(aw_dev->dev, aw_bin); > + aw_bin = NULL; > + return ret; > +} > + > +static int aw_dev_parse_data_by_sec_type(struct aw_device *aw_dev, struct aw_cfg_hdr *cfg_hdr, > + struct aw_cfg_dde *cfg_dde, struct aw_prof_desc *scene_prof_desc) > +{ > + > + switch (cfg_dde->data_type) { > + case ACF_SEC_TYPE_REG: > + return aw_dev_parse_raw_reg(aw_dev, > + (uint8_t *)cfg_hdr + cfg_dde->data_offset, > + cfg_dde->data_size, scene_prof_desc); > + case ACF_SEC_TYPE_DSP_CFG: > + return aw_dev_parse_raw_dsp_cfg(aw_dev, > + (uint8_t *)cfg_hdr + cfg_dde->data_offset, > + cfg_dde->data_size, scene_prof_desc); > + case ACF_SEC_TYPE_DSP_FW: > + return aw_dev_parse_raw_dsp_fw(aw_dev, > + (uint8_t *)cfg_hdr + cfg_dde->data_offset, > + cfg_dde->data_size, scene_prof_desc); > + case ACF_SEC_TYPE_MUTLBIN: > + return aw_dev_prof_parse_multi_bin(aw_dev, > + (uint8_t *)cfg_hdr + cfg_dde->data_offset, > + cfg_dde->data_size, scene_prof_desc); > + } > + return 0; > +} > + > +static int aw_dev_parse_dev_type(struct aw_device *aw_dev, > + struct aw_cfg_hdr *prof_hdr, struct aw_all_prof_info *all_prof_info) > +{ > + int i = 0; > + int ret; > + int sec_num = 0; > + struct aw_cfg_dde *cfg_dde = > + (struct aw_cfg_dde *)((char *)prof_hdr + prof_hdr->a_hdr_offset); > + > + aw_dev_info(aw_dev->dev, "enter"); > + > + for (i = 0; i < prof_hdr->a_ddt_num; i++) { > + if ((aw_dev->i2c->adapter->nr == cfg_dde[i].dev_bus) && > + (aw_dev->i2c->addr == cfg_dde[i].dev_addr) && > + (cfg_dde[i].type == AW_DEV_TYPE_ID)) { > + if (cfg_dde[i].data_type == ACF_SEC_TYPE_MONITOR) { > + ret = aw883xx_monitor_parse_fw(&aw_dev->monitor_desc, > + (uint8_t *)prof_hdr + cfg_dde[i].data_offset, > + cfg_dde[i].data_size); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "parse monitor failed"); > + return ret; > + } > + } else { > + if (cfg_dde[i].dev_profile >= AW_PROFILE_MAX) { > + aw_dev_err(aw_dev->dev, "dev_profile [%d] overflow", > + cfg_dde[i].dev_profile); > + return -EINVAL; > + } > + ret = aw_dev_parse_data_by_sec_type(aw_dev, prof_hdr, &cfg_dde[i], > + &all_prof_info->prof_desc[cfg_dde[i].dev_profile]); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "parse failed"); > + return ret; > + } > + sec_num++; > + } > + } > + } > + > + if (sec_num == 0) { > + aw_dev_info(aw_dev->dev, "get dev type num is %d, please use default", > + sec_num); > + return AW_DEV_TYPE_NONE; > + } > + > + return AW_DEV_TYPE_OK; > +} > + > +static int aw_dev_parse_dev_default_type(struct aw_device *aw_dev, > + struct aw_cfg_hdr *prof_hdr, struct aw_all_prof_info *all_prof_info) > +{ > + int i = 0; > + int ret; > + int sec_num = 0; > + struct aw_cfg_dde *cfg_dde = > + (struct aw_cfg_dde *)((char *)prof_hdr + prof_hdr->a_hdr_offset); > + > + aw_dev_info(aw_dev->dev, "enter"); > + > + for (i = 0; i < prof_hdr->a_ddt_num; i++) { > + if ((aw_dev->channel == cfg_dde[i].dev_index) && > + (cfg_dde[i].type == AW_DEV_DEFAULT_TYPE_ID)) { > + if (cfg_dde[i].data_type == ACF_SEC_TYPE_MONITOR) { > + ret = aw883xx_monitor_parse_fw(&aw_dev->monitor_desc, > + (uint8_t *)prof_hdr + cfg_dde[i].data_offset, > + cfg_dde[i].data_size); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "parse monitor failed"); > + return ret; > + } > + } else { > + if (cfg_dde[i].dev_profile >= AW_PROFILE_MAX) { > + aw_dev_err(aw_dev->dev, "dev_profile [%d] overflow", > + cfg_dde[i].dev_profile); > + return -EINVAL; > + } > + ret = aw_dev_parse_data_by_sec_type(aw_dev, prof_hdr, &cfg_dde[i], > + &all_prof_info->prof_desc[cfg_dde[i].dev_profile]); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "parse failed"); > + return ret; > + } > + sec_num++; > + } > + } > + } > + > + if (sec_num == 0) { > + aw_dev_err(aw_dev->dev, "get dev default type failed, get num[%d]", sec_num); > + return -EINVAL; > + } > + > + return 0; > +} > + > +static int aw_dev_cfg_get_vaild_prof(struct aw_device *aw_dev, > + struct aw_all_prof_info all_prof_info) > +{ > + int i; > + int num = 0; > + struct aw_sec_data_desc *sec_desc = NULL; > + struct aw_prof_desc *prof_desc = all_prof_info.prof_desc; > + struct aw_prof_info *prof_info = &aw_dev->prof_info; > + > + for (i = 0; i < AW_PROFILE_MAX; i++) { > + if (prof_desc[i].prof_st == AW_PROFILE_OK) { > + sec_desc = prof_desc[i].sec_desc; > + if ((sec_desc[AW_DATA_TYPE_REG].data != NULL) && > + (sec_desc[AW_DATA_TYPE_REG].len != 0) && > + (sec_desc[AW_DATA_TYPE_DSP_CFG].data != NULL) && > + (sec_desc[AW_DATA_TYPE_DSP_CFG].len != 0) && > + (sec_desc[AW_DATA_TYPE_DSP_FW].data != NULL) && > + (sec_desc[AW_DATA_TYPE_DSP_FW].len != 0)) { > + prof_info->count++; > + } > + } > + } > + > + aw_dev_info(aw_dev->dev, "get valid profile:%d", aw_dev->prof_info.count); > + > + if (!prof_info->count) { > + aw_dev_err(aw_dev->dev, "no profile data"); > + return -EPERM; > + } > + > + prof_info->prof_desc = devm_kzalloc(aw_dev->dev, > + prof_info->count * sizeof(struct aw_prof_desc), > + GFP_KERNEL); > + if (prof_info->prof_desc == NULL) { > + aw_dev_err(aw_dev->dev, "prof_desc kzalloc failed"); > + return -ENOMEM; > + } > + > + for (i = 0; i < AW_PROFILE_MAX; i++) { > + if (prof_desc[i].prof_st == AW_PROFILE_OK) { > + sec_desc = prof_desc[i].sec_desc; > + if ((sec_desc[AW_DATA_TYPE_REG].data != NULL) && > + (sec_desc[AW_DATA_TYPE_REG].len != 0) && > + (sec_desc[AW_DATA_TYPE_DSP_CFG].data != NULL) && > + (sec_desc[AW_DATA_TYPE_DSP_CFG].len != 0) && > + (sec_desc[AW_DATA_TYPE_DSP_FW].data != NULL) && > + (sec_desc[AW_DATA_TYPE_DSP_FW].len != 0)) { > + if (num >= prof_info->count) { > + aw_dev_err(aw_dev->dev, "get scene num[%d] overflow count[%d]", > + num, prof_info->count); > + return -ENOMEM; > + } > + prof_info->prof_desc[num] = prof_desc[i]; > + prof_info->prof_desc[num].id = i; > + num++; > + } > + } > + } > + > + return 0; > +} > + > +static int aw_dev_load_cfg_by_hdr(struct aw_device *aw_dev, > + struct aw_cfg_hdr *prof_hdr) > +{ > + int ret; > + struct aw_all_prof_info all_prof_info; > + > + memset(&all_prof_info, 0, sizeof(struct aw_all_prof_info)); > + > + ret = aw_dev_parse_dev_type(aw_dev, prof_hdr, &all_prof_info); > + if (ret < 0) { > + return ret; > + } else if (ret == AW_DEV_TYPE_NONE) { > + aw_dev_info(aw_dev->dev, "get dev type num is 0, parse default dev"); > + ret = aw_dev_parse_dev_default_type(aw_dev, prof_hdr, &all_prof_info); > + if (ret < 0) > + return ret; > + } > + > + ret = aw_dev_cfg_get_vaild_prof(aw_dev, all_prof_info); > + if (ret < 0) > + return ret; > + > + aw_dev->prof_info.prof_name_list = profile_name; > + > + return 0; > +} > + > +static int aw_dev_create_prof_name_list_v_1_0_0_0(struct aw_device *aw_dev) > +{ > + struct aw_prof_info *prof_info = &aw_dev->prof_info; > + struct aw_prof_desc *prof_desc = prof_info->prof_desc; > + int i; > + > + if (prof_desc == NULL) { > + aw_dev_err(aw_dev->dev, "prof_desc is NULL"); > + return -EINVAL; > + } > + > + prof_info->prof_name_list = devm_kzalloc(aw_dev->dev, > + prof_info->count * PROFILE_STR_MAX, > + GFP_KERNEL); > + if (prof_info->prof_name_list == NULL) { > + aw_dev_err(aw_dev->dev, "prof_name_list devm_kzalloc failed"); > + return -ENOMEM; > + } > + > + for (i = 0; i < prof_info->count; i++) { > + prof_desc[i].id = i; > + prof_info->prof_name_list[i] = prof_desc[i].prf_str; > + aw_dev_info(aw_dev->dev, "prof name is %s", prof_info->prof_name_list[i]); > + } > + > + return 0; > +} > + > +static int aw_get_dde_type_info(struct aw_device *aw_dev, struct aw_container *aw_cfg) > +{ > + int i; > + int dev_num = 0; > + int default_num = 0; > + struct aw_cfg_hdr *cfg_hdr = (struct aw_cfg_hdr *)aw_cfg->data; > + struct aw_cfg_dde_v_1_0_0_0 *cfg_dde = > + (struct aw_cfg_dde_v_1_0_0_0 *)(aw_cfg->data + cfg_hdr->a_hdr_offset); > + > + for (i = 0; i < cfg_hdr->a_ddt_num; i++) { > + if (cfg_dde[i].type == AW_DEV_TYPE_ID) > + dev_num++; > + > + if (cfg_dde[i].type == AW_DEV_DEFAULT_TYPE_ID) > + default_num++; > + } > + > + if (!(dev_num || default_num)) { > + aw_dev_err(aw_dev->dev, "can't find scene"); > + return -EINVAL; > + } > + > + if (dev_num != 0) > + aw_dev->prof_info.prof_type = AW_DEV_TYPE_ID; > + else if (default_num != 0) > + aw_dev->prof_info.prof_type = AW_DEV_DEFAULT_TYPE_ID; > + > + return 0; > +} > + > +static int aw_get_dev_scene_count_v_1_0_0_0(struct aw_device *aw_dev, struct aw_container *aw_cfg, > + uint32_t *scene_num) > +{ > + int i; > + struct aw_cfg_hdr *cfg_hdr = (struct aw_cfg_hdr *)aw_cfg->data; > + struct aw_cfg_dde_v_1_0_0_0 *cfg_dde = > + (struct aw_cfg_dde_v_1_0_0_0 *)(aw_cfg->data + cfg_hdr->a_hdr_offset); > + > + for (i = 0; i < cfg_hdr->a_ddt_num; ++i) { > + if ((cfg_dde[i].data_type == ACF_SEC_TYPE_MUTLBIN) && > + (aw_dev->chip_id == cfg_dde[i].chip_id) && > + ((aw_dev->i2c->adapter->nr == cfg_dde[i].dev_bus) && > + (aw_dev->i2c->addr == cfg_dde[i].dev_addr))) > + (*scene_num)++; > + } > + > + return 0; > +} > + > +static int aw_get_default_scene_count_v_1_0_0_0(struct aw_device *aw_dev, > + struct aw_container *aw_cfg, > + uint32_t *scene_num) > +{ > + int i; > + struct aw_cfg_hdr *cfg_hdr = (struct aw_cfg_hdr *)aw_cfg->data; > + struct aw_cfg_dde_v_1_0_0_0 *cfg_dde = > + (struct aw_cfg_dde_v_1_0_0_0 *)(aw_cfg->data + cfg_hdr->a_hdr_offset); > + > + for (i = 0; i < cfg_hdr->a_ddt_num; ++i) { > + if ((cfg_dde[i].data_type == ACF_SEC_TYPE_MUTLBIN) && > + (aw_dev->chip_id == cfg_dde[i].chip_id) && > + (aw_dev->channel == cfg_dde[i].dev_index)) > + (*scene_num)++; > + } > + > + return 0; > +} > + > +static int aw_dev_parse_scene_count_v_1_0_0_0(struct aw_device *aw_dev, > + struct aw_container *aw_cfg, > + uint32_t *count) > +{ > + int ret; > + > + ret = aw_get_dde_type_info(aw_dev, aw_cfg); > + if (ret < 0) > + return ret; > + > + if (aw_dev->prof_info.prof_type == AW_DEV_TYPE_ID) { > + aw_get_dev_scene_count_v_1_0_0_0(aw_dev, aw_cfg, count); > + } else if (aw_dev->prof_info.prof_type == AW_DEV_DEFAULT_TYPE_ID) { > + aw_get_default_scene_count_v_1_0_0_0(aw_dev, aw_cfg, count); > + } else { > + aw_dev_err(aw_dev->dev, "unsupported prof_type[%x]", > + aw_dev->prof_info.prof_type); > + return -EINVAL; > + } > + > + aw_dev_info(aw_dev->dev, "scene count is %d", (*count)); > + return 0; > +} > + > +static int aw_dev_parse_data_by_sec_type_v_1_0_0_0(struct aw_device *aw_dev, > + struct aw_cfg_hdr *prof_hdr, > + struct aw_cfg_dde_v_1_0_0_0 *cfg_dde, > + int *cur_scene_id) > +{ > + int ret; > + struct aw_prof_info *prof_info = &aw_dev->prof_info; > + > + switch (cfg_dde->data_type) { > + case ACF_SEC_TYPE_MUTLBIN: > + ret = aw_dev_prof_parse_multi_bin(aw_dev, > + (uint8_t *)prof_hdr + cfg_dde->data_offset, > + cfg_dde->data_size, &prof_info->prof_desc[*cur_scene_id]); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "parse multi bin failed"); > + return ret; > + } > + prof_info->prof_desc[*cur_scene_id].prf_str = cfg_dde->dev_profile_str; > + prof_info->prof_desc[*cur_scene_id].id = cfg_dde->dev_profile; > + (*cur_scene_id)++; > + break; > + case ACF_SEC_TYPE_MONITOR: > + return aw883xx_monitor_parse_fw(&aw_dev->monitor_desc, > + (uint8_t *)prof_hdr + cfg_dde->data_offset, > + cfg_dde->data_size); > + default: > + aw_pr_err("unsupported SEC_TYPE [%d]", cfg_dde->data_type); > + return -EINVAL; > + } > + > + return 0; > +} > + > +static int aw_dev_parse_dev_type_v_1_0_0_0(struct aw_device *aw_dev, > + struct aw_cfg_hdr *prof_hdr) > +{ > + int i = 0; > + int ret; > + int cur_scene_id = 0; > + struct aw_cfg_dde_v_1_0_0_0 *cfg_dde = > + (struct aw_cfg_dde_v_1_0_0_0 *)((char *)prof_hdr + prof_hdr->a_hdr_offset); > + > + aw_dev_info(aw_dev->dev, "enter"); > + > + for (i = 0; i < prof_hdr->a_ddt_num; i++) { > + if ((aw_dev->i2c->adapter->nr == cfg_dde[i].dev_bus) && > + (aw_dev->i2c->addr == cfg_dde[i].dev_addr) && > + (aw_dev->chip_id == cfg_dde[i].chip_id)) { > + ret = aw_dev_parse_data_by_sec_type_v_1_0_0_0(aw_dev, prof_hdr, > + &cfg_dde[i], &cur_scene_id); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "parse failed"); > + return ret; > + } > + } > + } > + > + if (cur_scene_id == 0) { > + aw_dev_info(aw_dev->dev, "get dev type failed, get num [%d]", cur_scene_id); > + return -EINVAL; > + } > + > + return 0; > +} > + > +static int aw_dev_parse_default_type_v_1_0_0_0(struct aw_device *aw_dev, > + struct aw_cfg_hdr *prof_hdr) > +{ > + int i = 0; > + int ret; > + int cur_scene_id = 0; > + struct aw_cfg_dde_v_1_0_0_0 *cfg_dde = > + (struct aw_cfg_dde_v_1_0_0_0 *)((char *)prof_hdr + prof_hdr->a_hdr_offset); > + > + aw_dev_info(aw_dev->dev, "enter"); > + > + for (i = 0; i < prof_hdr->a_ddt_num; i++) { > + if ((aw_dev->channel == cfg_dde[i].dev_index) && > + (aw_dev->chip_id == cfg_dde[i].chip_id)) { > + ret = aw_dev_parse_data_by_sec_type_v_1_0_0_0(aw_dev, prof_hdr, > + &cfg_dde[i], &cur_scene_id); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "parse failed"); > + return ret; > + } > + } > + } > + > + if (cur_scene_id == 0) { > + aw_dev_err(aw_dev->dev, "get dev default type failed, get num[%d]", cur_scene_id); > + return -EINVAL; > + } > + > + return 0; > +} > + > +static int aw_dev_parse_by_hdr_v_1_0_0_0(struct aw_device *aw_dev, > + struct aw_cfg_hdr *cfg_hdr) > +{ > + int ret; > + > + if (aw_dev->prof_info.prof_type == AW_DEV_TYPE_ID) { > + ret = aw_dev_parse_dev_type_v_1_0_0_0(aw_dev, cfg_hdr); > + if (ret < 0) > + return ret; > + } else if (aw_dev->prof_info.prof_type == AW_DEV_DEFAULT_TYPE_ID) { > + ret = aw_dev_parse_default_type_v_1_0_0_0(aw_dev, cfg_hdr); > + if (ret < 0) > + return ret; > + } else { > + aw_dev_err(aw_dev->dev, "prof type matched failed, get num[%d]", > + aw_dev->prof_info.prof_type); > + return -EINVAL; > + } > + > + return 0; > +} > + > +static int aw_dev_load_cfg_by_hdr_v_1_0_0_0(struct aw_device *aw_dev, struct aw_container *aw_cfg) > +{ > + struct aw_prof_info *prof_info = &aw_dev->prof_info; > + struct aw_cfg_hdr *cfg_hdr = (struct aw_cfg_hdr *)aw_cfg->data; > + int ret; > + > + ret = aw_dev_parse_scene_count_v_1_0_0_0(aw_dev, aw_cfg, &prof_info->count); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "get scene count failed"); > + return ret; > + } > + > + prof_info->prof_desc = devm_kzalloc(aw_dev->dev, > + prof_info->count * sizeof(struct aw_prof_desc), > + GFP_KERNEL); > + if (prof_info->prof_desc == NULL) { > + aw_dev_err(aw_dev->dev, "prof_desc devm_kzalloc failed"); > + return -ENOMEM; > + } > + > + ret = aw_dev_parse_by_hdr_v_1_0_0_0(aw_dev, cfg_hdr); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, " failed"); > + return ret; > + } > + > + ret = aw_dev_create_prof_name_list_v_1_0_0_0(aw_dev); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "create prof name list failed"); > + return ret; > + } > + > + return 0; > +} > + > +int aw883xx_dev_cfg_load(struct aw_device *aw_dev, struct aw_container *aw_cfg) > +{ > + struct aw_cfg_hdr *cfg_hdr = NULL; > + int ret; > + > + aw_dev_info(aw_dev->dev, "enter"); > + > + cfg_hdr = (struct aw_cfg_hdr *)aw_cfg->data; > + switch (cfg_hdr->a_hdr_version) { > + case AW_CFG_HDR_VER_0_0_0_1: > + ret = aw_dev_load_cfg_by_hdr(aw_dev, cfg_hdr); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "hdr_cersion[0x%x] parse failed", > + cfg_hdr->a_hdr_version); > + return ret; > + } > + break; > + case AW_CFG_HDR_VER_1_0_0_0: > + ret = aw_dev_load_cfg_by_hdr_v_1_0_0_0(aw_dev, aw_cfg); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "hdr_cersion[0x%x] parse failed", > + cfg_hdr->a_hdr_version); > + return ret; > + } > + break; > + default: > + aw_pr_err("unsupported hdr_version [0x%x]", cfg_hdr->a_hdr_version); > + return -EINVAL; > + } > + > + aw_dev->fw_status = AW_DEV_FW_OK; > + aw_dev_info(aw_dev->dev, "parse cfg success"); > + return 0; > +} > + > +static uint8_t aw_dev_crc8_check(unsigned char *data, uint32_t data_size) > +{ > + uint8_t crc_value = 0x00; > + uint8_t pdatabuf = 0; > + int i; > + > + while (data_size--) { > + pdatabuf = *data++; > + for (i = 0; i < 8; i++) { > + /*if the lowest bit is 1*/ > + if ((crc_value ^ (pdatabuf)) & 0x01) { > + /*Xor multinomial*/ > + crc_value ^= 0x18; > + crc_value >>= 1; > + crc_value |= 0x80; > + } else { > + crc_value >>= 1; > + } > + pdatabuf >>= 1; > + } > + } > + return crc_value; > +} > + > +static int aw_dev_check_cfg_by_hdr(struct aw_container *aw_cfg) > +{ > + struct aw_cfg_hdr *cfg_hdr = NULL; > + struct aw_cfg_dde *cfg_dde = NULL; > + unsigned int end_data_offset = 0; > + unsigned int act_data = 0; > + unsigned int hdr_ddt_len = 0; > + uint8_t act_crc8 = 0; > + int i; > + > + cfg_hdr = (struct aw_cfg_hdr *)aw_cfg->data; > + > + /*check file type id is awinic acf file*/ > + if (cfg_hdr->a_id != ACF_FILE_ID) { > + aw_pr_err("not acf type file"); > + return -EINVAL; > + } > + > + hdr_ddt_len = cfg_hdr->a_hdr_offset + cfg_hdr->a_ddt_size; > + if (hdr_ddt_len > aw_cfg->len) { > + aw_pr_err("hdrlen with ddt_len [%d] overflow file size[%d]", > + cfg_hdr->a_hdr_offset, aw_cfg->len); > + return -EINVAL; > + } > + > + /*check data size*/ > + cfg_dde = (struct aw_cfg_dde *)((char *)aw_cfg->data + cfg_hdr->a_hdr_offset); > + act_data += hdr_ddt_len; > + for (i = 0; i < cfg_hdr->a_ddt_num; i++) > + act_data += cfg_dde[i].data_size; > + > + if (act_data != aw_cfg->len) { > + aw_pr_err("act_data[%d] not equal to file size[%d]!", > + act_data, aw_cfg->len); > + return -EINVAL; > + } > + > + for (i = 0; i < cfg_hdr->a_ddt_num; i++) { > + /* data check */ > + end_data_offset = cfg_dde[i].data_offset + cfg_dde[i].data_size; > + if (end_data_offset > aw_cfg->len) { > + aw_pr_err("a_ddt_num[%d] end_data_offset[%d] overflow file size[%d]", > + i, end_data_offset, aw_cfg->len); > + return -EINVAL; > + } > + > + /* crc check */ > + act_crc8 = aw_dev_crc8_check(aw_cfg->data + cfg_dde[i].data_offset, > + cfg_dde[i].data_size); > + if (act_crc8 != cfg_dde[i].data_crc) { > + aw_pr_err("a_ddt_num[%d] crc8 check failed, act_crc8:0x%x != data_crc 0x%x", > + i, (uint32_t)act_crc8, cfg_dde[i].data_crc); > + return -EINVAL; > + } > + } > + > + aw_pr_info("project name [%s]", cfg_hdr->a_project); > + aw_pr_info("custom name [%s]", cfg_hdr->a_custom); > + aw_pr_info("version name [%d.%d.%d.%d]", cfg_hdr->a_version[3], cfg_hdr->a_version[2], > + cfg_hdr->a_version[1], cfg_hdr->a_version[0]); > + aw_pr_info("author id %d", cfg_hdr->a_author_id); > + > + return 0; > +} > + > +static int aw_dev_check_acf_by_hdr_v_1_0_0_0(struct aw_container *aw_cfg) > +{ > + struct aw_cfg_hdr *cfg_hdr = NULL; > + struct aw_cfg_dde_v_1_0_0_0 *cfg_dde = NULL; > + unsigned int end_data_offset = 0; > + unsigned int act_data = 0; > + unsigned int hdr_ddt_len = 0; > + uint8_t act_crc8 = 0; > + int i; > + > + cfg_hdr = (struct aw_cfg_hdr *)aw_cfg->data; > + > + /*check file type id is awinic acf file*/ > + if (cfg_hdr->a_id != ACF_FILE_ID) { > + aw_pr_err("not acf type file"); > + return -EINVAL; > + } > + > + hdr_ddt_len = cfg_hdr->a_hdr_offset + cfg_hdr->a_ddt_size; > + if (hdr_ddt_len > aw_cfg->len) { > + aw_pr_err("hdrlen with ddt_len [%d] overflow file size[%d]", > + cfg_hdr->a_hdr_offset, aw_cfg->len); > + return -EINVAL; > + } > + > + /*check data size*/ > + cfg_dde = (struct aw_cfg_dde_v_1_0_0_0 *)((char *)aw_cfg->data + cfg_hdr->a_hdr_offset); > + act_data += hdr_ddt_len; > + for (i = 0; i < cfg_hdr->a_ddt_num; i++) > + act_data += cfg_dde[i].data_size; > + > + if (act_data != aw_cfg->len) { > + aw_pr_err("act_data[%d] not equal to file size[%d]!", > + act_data, aw_cfg->len); > + return -EINVAL; > + } > + > + for (i = 0; i < cfg_hdr->a_ddt_num; i++) { > + /* data check */ > + end_data_offset = cfg_dde[i].data_offset + cfg_dde[i].data_size; > + if (end_data_offset > aw_cfg->len) { > + aw_pr_err("a_ddt_num[%d] end_data_offset[%d] overflow file size[%d]", > + i, end_data_offset, aw_cfg->len); > + return -EINVAL; > + } > + > + /* crc check */ > + act_crc8 = aw_dev_crc8_check(aw_cfg->data + cfg_dde[i].data_offset, > + cfg_dde[i].data_size); > + if (act_crc8 != cfg_dde[i].data_crc) { > + aw_pr_err("a_ddt_num[%d] crc8 check failed, act_crc8:0x%x != data_crc 0x%x", > + i, (uint32_t)act_crc8, cfg_dde[i].data_crc); > + return -EINVAL; > + } > + } > + > + aw_pr_info("project name [%s]", cfg_hdr->a_project); > + aw_pr_info("custom name [%s]", cfg_hdr->a_custom); > + aw_pr_info("version name [%d.%d.%d.%d]", cfg_hdr->a_version[3], cfg_hdr->a_version[2], > + cfg_hdr->a_version[1], cfg_hdr->a_version[0]); > + aw_pr_info("author id %d", cfg_hdr->a_author_id); > + > + return 0; > + > +} > + > +int aw883xx_dev_load_acf_check(struct aw_container *aw_cfg) > +{ > + struct aw_cfg_hdr *cfg_hdr = NULL; > + > + if (aw_cfg == NULL) { > + aw_pr_err("aw_prof is NULL"); > + return -ENOMEM; > + } > + > + if (aw_cfg->len < sizeof(struct aw_cfg_hdr)) { > + aw_pr_err("cfg hdr size[%d] overflow file size[%d]", > + aw_cfg->len, (int)sizeof(struct aw_cfg_hdr)); > + return -EINVAL; > + } > + > + cfg_hdr = (struct aw_cfg_hdr *)aw_cfg->data; > + switch (cfg_hdr->a_hdr_version) { > + case AW_CFG_HDR_VER_0_0_0_1: > + return aw_dev_check_cfg_by_hdr(aw_cfg); > + case AW_CFG_HDR_VER_1_0_0_0: > + return aw_dev_check_acf_by_hdr_v_1_0_0_0(aw_cfg); > + default: > + aw_pr_err("unsupported hdr_version [0x%x]", cfg_hdr->a_hdr_version); > + return -EINVAL; > + } > + > + return 0; > +} > + > +int aw883xx_dev_get_profile_count(struct aw_device *aw_dev) > +{ > + if (aw_dev == NULL) { > + aw_pr_err("aw_dev is NULL"); > + return -ENOMEM; > + } > + > + return aw_dev->prof_info.count; > +} > + > +int aw883xx_dev_check_profile_index(struct aw_device *aw_dev, int index) > +{ > + if ((index >= aw_dev->prof_info.count) || (index < 0)) > + return -EINVAL; > + else > + return 0; > +} > + > +int aw883xx_dev_get_profile_index(struct aw_device *aw_dev) > +{ > + return aw_dev->set_prof; > +} > + > +int aw883xx_dev_set_profile_index(struct aw_device *aw_dev, int index) > +{ > + struct aw_prof_desc *prof_desc = NULL; > + > + if ((index < aw_dev->prof_info.count) && (index >= 0)) { > + aw_dev->set_prof = index; > + prof_desc = &aw_dev->prof_info.prof_desc[index]; > + > + aw_dev_info(aw_dev->dev, "set prof[%s]", > + aw_dev->prof_info.prof_name_list[prof_desc->id]); > + } else { > + return -EINVAL; > + } > + > + return 0; > +} > + > +char *aw_dev_get_prof_name(struct aw_device *aw_dev, int index) > +{ > + struct aw_prof_desc *prof_desc = NULL; > + struct aw_prof_info *prof_info = &aw_dev->prof_info; > + > + if ((index >= aw_dev->prof_info.count) || (index < 0)) { > + aw_dev_err(aw_dev->dev, "index[%d] overflow count[%d]", > + index, aw_dev->prof_info.count); > + return NULL; > + } > + > + prof_desc = &aw_dev->prof_info.prof_desc[index]; > + > + return prof_info->prof_name_list[prof_desc->id]; > +} > + > +int aw883xx_dev_get_prof_data(struct aw_device *aw_dev, int index, > + struct aw_prof_desc **prof_desc) > +{ > + if ((index >= aw_dev->prof_info.count) || (index < 0)) { > + aw_dev_err(aw_dev->dev, "%s: index[%d] overflow count[%d]\n", > + __func__, index, aw_dev->prof_info.count); > + return -EINVAL; > + } > + > + *prof_desc = &aw_dev->prof_info.prof_desc[index]; > + > + return 0; > +} > + > diff --git a/sound/soc/codecs/aw883xx/aw883xx_bin_parse.h b/sound/soc/codecs/aw883xx/aw883xx_bin_parse.h > new file mode 100644 > index 0000000..a961a35 > --- /dev/null > +++ b/sound/soc/codecs/aw883xx/aw883xx_bin_parse.h > @@ -0,0 +1,145 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +/* > + * aw883xx.c -- ALSA Soc AW883XX codec support > + * > + * Copyright (c) 2020 AWINIC Technology CO., LTD > + * > + * Author: Bruce zhao <zhaolei(a)awinic.com> > + */ > + > +#ifndef __AW883XX_BIN_PARSE_H__ > +#define __AW883XX_BIN_PARSE_H__ > + > +#include "aw883xx_device.h" > + > +#define NULL ((void *)0) > +#define GET_32_DATA(w, x, y, z) \ > + ((unsigned int)((((uint8_t)w) << 24) | \ > + (((uint8_t)x) << 16) | (((uint8_t)y) << 8) | \ > + ((uint8_t)z))) > +#define BIN_NUM_MAX 100 > +#define HEADER_LEN 60 > +/* > + * header information > + */ > +enum return_enum { > + BIN_HEADER_VER_ERR = 1, > + BIN_DATA_TYPE_ERR = 2, > + BIN_DATA_LEN_ERR = 3, > + DATA_VER_ERR = 4, > + REG_NUM_ERR = 5, > + DSP_REG_NUM_ERR = 6, > + SOC_APP_NUM_ERR = 7, > + BIN_IS_NULL = 8, > +}; > + > +enum bin_header_version_enum { > + HEADER_VERSION_1_0_0 = 0x01000000, > +}; > + > +enum data_type_enum { > + DATA_TYPE_REGISTER = 0x00000000, > + DATA_TYPE_DSP_REG = 0x00000010, > + DATA_TYPE_DSP_CFG = 0x00000011, > + DATA_TYPE_SOC_REG = 0x00000020, > + DATA_TYPE_SOC_APP = 0x00000021, > + DATA_TYPE_DSP_FW = DATA_TYPE_SOC_APP, > + DATA_TYPE_MULTI_BINS = 0x00002000, > +}; > + > +/** > + * @DATA_VERSION_V1：default little edian > + */ > +enum data_version_enum { > + DATA_VERSION_V1 = 0X00000001, > + DATA_VERSION_MAX, > +}; > + > +/** > + * @header_len: Frame header length > + * @check_sum: Frame header information-Checksum > + * @header_ver: Frame header information-Frame header version > + * @bin_data_type: Frame header information-Data type > + * @bin_data_ver: Frame header information-Data version > + * @bin_data_len: Frame header information-Data length > + * @ui_ver: Frame header information-ui version > + * @chip_type[8]: Frame header information-chip type > + * @reg_byte_len: Frame header information-reg byte len > + * @data_byte_len: Frame header information-data byte len > + * @device_addr: Frame header information-device addr > + * @valid_data_len: Length of valid data obtained after parsing > + * @valid_data_addr: The offset address of the valid data obtained > + * after parsing relative to info > + * @reg_num: The number of registers obtained after parsing > + * @reg_data_byte_len: The byte length of the register obtained after parsing > + * @download_addr: The starting address or download address obtained > + * after parsing > + * @app_version: The software version number obtained after parsing > + */ > +struct bin_header_info { > + unsigned int header_len; > + unsigned int check_sum; > + unsigned int header_ver; > + unsigned int bin_data_type; > + unsigned int bin_data_ver; > + unsigned int bin_data_len; > + unsigned int ui_ver; > + unsigned char chip_type[8]; > + unsigned int reg_byte_len; > + unsigned int data_byte_len; > + unsigned int device_addr; > + unsigned int valid_data_len; > + unsigned int valid_data_addr; > + > + unsigned int reg_num; > + unsigned int reg_data_byte_len; > + unsigned int download_addr; > + unsigned int app_version; > +}; > + > +/* > + * function define > + * > + */ > +/* > + * @len: The size of the bin file obtained from the firmware > + * @data[]: Store the bin file obtained from the firmware > + */ > +struct bin_container { > + unsigned int len; > + unsigned char data[]; > +}; > + > +/** > + * @p_addr: Offset pointer (backward offset pointer to obtain frame header > + * information and important information) > + * @all_bin_parse_num: The number of all bin files > + * @multi_bin_parse_num: The number of single bin files > + * @single_bin_parse_num: The number of multiple bin files > + * @header_info[BIN_NUM_MAX]: Frame header information and other important data > + * obtained after parsing > + * @info: Obtained bin file data that needs to be parsed > + */ > +struct aw_bin { > + unsigned char *p_addr; > + unsigned int all_bin_parse_num; > + unsigned int multi_bin_parse_num; > + unsigned int single_bin_parse_num; > + struct bin_header_info header_info[BIN_NUM_MAX]; > + struct bin_container info; > +}; > + > +/*******************awinic audio parse acf***********************/ > +int aw883xx_dev_dsp_data_order(struct aw_device *aw_dev, > + uint8_t *data, uint32_t data_len); > +int aw883xx_dev_get_prof_data(struct aw_device *aw_dev, int index, > + struct aw_prof_desc **prof_desc); > +char *aw_dev_get_prof_name(struct aw_device *aw_dev, int index); > +int aw883xx_dev_set_profile_index(struct aw_device *aw_dev, int index); > +int aw883xx_dev_get_profile_index(struct aw_device *aw_dev); > +int aw883xx_dev_check_profile_index(struct aw_device *aw_dev, int index); > +int aw883xx_dev_get_profile_count(struct aw_device *aw_dev); > +int aw883xx_dev_cfg_load(struct aw_device *aw_dev, struct aw_container *aw_cfg); > +int aw883xx_dev_load_acf_check(struct aw_container *aw_cfg); > + > +#endif > diff --git a/sound/soc/codecs/aw883xx/aw883xx_calib.c b/sound/soc/codecs/aw883xx/aw883xx_calib.c > new file mode 100644 > index 0000000..4d1b90f > --- /dev/null > +++ b/sound/soc/codecs/aw883xx/aw883xx_calib.c > @@ -0,0 +1,2534 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * aw883xx.c -- ALSA Soc AW883XX codec support > + * > + * Copyright (c) 2020 AWINIC Technology CO., LTD > + * > + * Author: Bruce zhao <zhaolei(a)awinic.com> > + */ > + > +#include <linux/module.h> > +#include <asm/ioctls.h> > +#include <linux/uaccess.h> > +#include <linux/delay.h> > +#include <linux/slab.h> > +#include <linux/fs.h> > +#include <linux/miscdevice.h> > +#include <linux/device.h> > +#include <linux/kernel.h> > +#include <linux/of.h> > +#include <sound/core.h> > +#include <sound/pcm.h> > +#include <sound/pcm_params.h> > +#include <sound/soc.h> > + > +#include "aw883xx_device.h" > +#include "aw883xx_log.h" > +#include "aw883xx_calib.h" > +#include "aw883xx.h" > + > + > + > +static bool is_single_cali; /*if mutli_dev cali false, single dev true*/ > +static unsigned int g_cali_re_time = AW_CALI_RE_DEFAULT_TIMER; > +static unsigned int g_dev_select; > +static struct miscdevice *g_misc_dev; > +static unsigned int g_msic_wr_flag = CALI_STR_NONE; > +static DEFINE_MUTEX(g_cali_lock); > +static const char *cali_str[CALI_STR_MAX] = {"none", "start_cali", "cali_re", > + "cali_f0", "store_re", "show_re", "show_r0", "show_cali_f0", "show_f0", > + "show_te", "dev_sel", "get_ver", "get_re_range" > +}; > + > + > +/******************************cali re store example start***********************************/ > +#ifdef AW_CALI_STORE_EXAMPLE > +/*write cali to persist file example*/ > +#define AWINIC_CALI_FILE "/mnt/vendor/persist/factory/audio/aw_cali.bin" > +#define AW_INT_DEC_DIGIT (10) > + > +static void aw_fs_read(struct file *file, char *buf, size_t count, loff_t *pos) > +{ > +#ifdef AW_KERNEL_VER_OVER_5_4_0 > + kernel_read(file, buf, count, pos); > +#else > + vfs_read(file, buf, count, pos); > +#endif > +} > + > +static void aw_fs_write(struct file *file, char *buf, size_t count, loff_t *pos) > +{ > +#ifdef AW_KERNEL_VER_OVER_5_4_0 > + kernel_write(file, buf, count, pos); > +#else > + vfs_write(file, buf, count, pos); > +#endif > +} > + > +static int aw_cali_write_cali_re_to_file(int32_t cali_re, int channel) > +{ > + struct file *fp = NULL; > + char buf[50] = { 0 }; > + loff_t pos = 0; > + //mm_segment_t fs; > + > + fp = filp_open(AWINIC_CALI_FILE, O_RDWR | O_CREAT, 0644); > + if (IS_ERR(fp)) { > + aw_pr_err("channel:%d open %s failed!", > + channel, AWINIC_CALI_FILE); > + return -EINVAL; > + } > + > + pos = AW_INT_DEC_DIGIT * channel; > + > + snprintf(buf, sizeof(buf), "%10d", cali_re); > + > + //fs = get_fs(); > + //set_fs(KERNFS_NS); > + > + aw_fs_write(fp, buf, strlen(buf), &pos); > + > + //set_fs(fs); > + > + aw_pr_info("channel:%d buf:%s cali_re:%d", > + channel, buf, cali_re); > + > + filp_close(fp, NULL); > + return 0; > +} > + > +static int aw_cali_get_cali_re_from_file(int32_t *cali_re, int channel) > +{ > + struct file *fp = NULL; > + int f_size; > + char *buf = NULL; > + int32_t int_cali_re = 0; > + loff_t pos = 0; > + int ret; > + //mm_segment_t fs; > + > + fp = filp_open(AWINIC_CALI_FILE, O_RDONLY, 0); > + if (IS_ERR(fp)) { > + aw_pr_err("channel:%d open %s failed!", > + channel, AWINIC_CALI_FILE); > + return -EINVAL; > + } > + > + pos = AW_INT_DEC_DIGIT * channel; > + > + f_size = AW_INT_DEC_DIGIT; > + > + buf = kzalloc(f_size + 1, GFP_ATOMIC); > + if (!buf) { > + filp_close(fp, NULL); > + return -EINVAL; > + } > + > + //fs = get_fs(); > + //set_fs(KERNFS_NS); > + > + aw_fs_read(fp, buf, f_size, &pos); > + > + //set_fs(fs); > + ret = kstrtoint(buf, 0, &int_cali_re); > + if (ret < 0) > + *cali_re = AW_ERRO_CALI_RE_VALUE; > + else > + *cali_re = int_cali_re; > + > + aw_pr_info("channel:%d buf:%s int_cali_re: %d", > + channel, buf, int_cali_re); > + > + kfree(buf); > + buf = NULL; > + filp_close(fp, NULL); > + > + return 0; > +} > +#endif > +/********************cali re store example end*****************************/ > + > + > +/*custom need add to set/get cali_re form/to nv*/ > +static int aw_cali_write_re_to_nvram(int32_t cali_re, int32_t channel) > +{ > +#ifdef AW_CALI_STORE_EXAMPLE > + return aw_cali_write_cali_re_to_file(cali_re, channel); > +#else > + return 0; > +#endif > +} > +static int aw_cali_read_re_from_nvram(int32_t *cali_re, int32_t channel) > +{ > +/*custom add, if success return value is 0 , else -1*/ > +#ifdef AW_CALI_STORE_EXAMPLE > + return aw_cali_get_cali_re_from_file(cali_re, channel); > +#else > + return 0; > +#endif > +} > + > +bool aw883xx_cali_check_result(struct aw_cali_desc *cali_desc) > +{ > + if (cali_desc->cali_check_st && > + (cali_desc->cali_result == CALI_RESULT_ERROR)) > + return false; > + else > + return true; > +} > + > +static void aw_cali_svc_run_mute(struct aw_device *aw_dev, int8_t cali_result) > +{ > + aw_dev_dbg(aw_dev->dev, "enter"); > + > + if (aw_dev->cali_desc.cali_check_st) { > + if (cali_result == CALI_RESULT_ERROR) > + aw883xx_dev_mute(aw_dev, true); > + else if (cali_result == CALI_RESULT_NORMAL) > + aw883xx_dev_mute(aw_dev, false); > + } else { > + aw_dev_info(aw_dev->dev, "cali check disable"); > + } > + > + aw_dev_info(aw_dev->dev, "done"); > +} > + > +static int aw_cali_svc_get_dev_re_range(struct aw_device *aw_dev, > + uint32_t *data_buf) > +{ > + data_buf[RE_MIN_FLAG] = aw_dev->re_range.re_min; > + data_buf[RE_MAX_FLAG] = aw_dev->re_range.re_max; > + > + return 0; > +} > + > +static int aw_cali_svc_get_devs_re_range(struct aw_device *aw_dev, > + uint32_t *data_buf, int num) > +{ > + struct list_head *dev_list = NULL; > + struct list_head *pos = NULL; > + struct aw_device *local_dev = NULL; > + int ret, cnt = 0; > + > + /*get dev list*/ > + ret = aw883xx_dev_get_list_head(&dev_list); > + if (ret) { > + aw_dev_err(aw_dev->dev, "get dev list failed"); > + return ret; > + } > + > + list_for_each(pos, dev_list) { > + local_dev = container_of(pos, struct aw_device, list_node); > + if (local_dev->channel < num) { > + data_buf[RE_MIN_FLAG + local_dev->channel * 2] = > + local_dev->re_range.re_min; > + data_buf[RE_MAX_FLAG + local_dev->channel * 2] = > + local_dev->re_range.re_max; > + cnt++; > + } else { > + aw_dev_err(local_dev->dev, "channel num[%d] overflow buf num[%d]", > + local_dev->channel, num); > + return -EINVAL; > + } > + } > + > + return cnt; > +} > + > + > +static int aw_cali_store_cali_re(struct aw_device *aw_dev, int32_t re) > +{ > + int ret; > + > + if ((re > aw_dev->re_range.re_min) && (re < aw_dev->re_range.re_max)) { > + aw_dev->cali_desc.cali_re = re; > + ret = aw_cali_write_re_to_nvram(re, aw_dev->channel); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "write re to nvram failed!"); > + return ret; > + } > + } else { > + aw_dev_err(aw_dev->dev, "invalid cali re %d!", re); > + return -EINVAL; > + } > + > + return 0; > +} > + > +int aw883xx_cali_get_cali_re(struct aw_cali_desc *cali_desc) > +{ > + int ret; > + int32_t cali_re = 0; > + struct aw_device *aw_dev = > + container_of(cali_desc, struct aw_device, cali_desc); > + > + ret = aw_cali_read_re_from_nvram(&cali_re, aw_dev->channel); > + if (ret < 0) { > + cali_desc->cali_re = AW_ERRO_CALI_RE_VALUE; > + cali_desc->cali_result = CALI_RESULT_NONE; > + aw_dev_err(aw_dev->dev, "get re failed"); > + return ret; > + } > + > + if (cali_re < aw_dev->re_range.re_min || cali_re > aw_dev->re_range.re_max) { > + aw_dev_err(aw_dev->dev, > + "out range re value: %d", cali_re); > + cali_desc->cali_re = AW_ERRO_CALI_RE_VALUE; > + /*cali_result is error when aw-cali-check enable*/ > + if (aw_dev->cali_desc.cali_check_st) > + cali_desc->cali_result = CALI_RESULT_ERROR; > + return -EINVAL; > + } > + cali_desc->cali_re = cali_re; > + > + /*cali_result is normal when aw-cali-check enable*/ > + if (aw_dev->cali_desc.cali_check_st) > + cali_desc->cali_result = CALI_RESULT_NORMAL; > + > + aw_dev_info(aw_dev->dev, "get cali re %d", cali_desc->cali_re); > + > + return 0; > +} > + > +int aw883xx_cali_read_cali_re_from_dsp(struct aw_cali_desc *cali_desc, uint32_t *re) > +{ > + struct aw_device *aw_dev = > + container_of(cali_desc, struct aw_device, cali_desc); > + struct aw_adpz_re_desc *desc = &aw_dev->adpz_re_desc; > + int ret; > + > + ret = aw_dev->ops.aw_dsp_read(aw_dev, desc->dsp_reg, re, desc->data_type); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "set cali re error"); > + return ret; > + } > + > + *re = AW_DSP_RE_TO_SHOW_RE(*re, desc->shift); > + *re -= aw_dev->cali_desc.ra; > + > + aw_dev_info(aw_dev->dev, "get dsp re:%d", *re); > + > + return 0; > +} > + > + > +/*************Calibration base function************/ > +int aw883xx_cali_svc_set_cali_re_to_dsp(struct aw_cali_desc *cali_desc) > +{ > + struct aw_device *aw_dev = > + container_of(cali_desc, struct aw_device, cali_desc); > + struct aw_adpz_re_desc *adpz_re_desc = &aw_dev->adpz_re_desc; > + uint32_t cali_re = 0; > + int ret; > + > + cali_re = AW_SHOW_RE_TO_DSP_RE((aw_dev->cali_desc.cali_re + > + aw_dev->cali_desc.ra), adpz_re_desc->shift); > + > + /* set cali re to aw883xx */ > + ret = aw_dev->ops.aw_dsp_write(aw_dev, > + adpz_re_desc->dsp_reg, cali_re, adpz_re_desc->data_type); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "set cali re error"); > + return ret; > + } > + > + ret = aw883xx_dev_modify_dsp_cfg(aw_dev, adpz_re_desc->dsp_reg, > + cali_re, adpz_re_desc->data_type); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "modify dsp cfg failed"); > + return ret; > + } > + > + return 0; > +} > + > +int aw883xx_cali_svc_get_ra(struct aw_cali_desc *cali_desc) > +{ > + int ret; > + uint32_t dsp_ra; > + struct aw_device *aw_dev = > + container_of(cali_desc, struct aw_device, cali_desc); > + struct aw_ra_desc *desc = &aw_dev->ra_desc; > + > + ret = aw_dev->ops.aw_dsp_read(aw_dev, desc->dsp_reg, > + &dsp_ra, desc->data_type); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "read ra error"); > + return ret; > + } > + > + cali_desc->ra = AW_DSP_RE_TO_SHOW_RE(dsp_ra, > + aw_dev->adpz_re_desc.shift); > + aw_dev_info(aw_dev->dev, "get ra:%d", cali_desc->ra); > + return 0; > +} > + > +static int aw_cali_svc_get_dev_realtime_re(struct aw_device *aw_dev, > + uint32_t *re) > +{ > + int ret; > + struct aw_adpz_re_desc *re_desc = &aw_dev->adpz_re_desc; > + struct aw_ra_desc *ra_desc = &aw_dev->ra_desc; > + struct aw_adpz_t0_desc *t0_desc = &aw_dev->t0_desc; > + uint32_t dsp_re = 0; > + uint32_t show_re = 0; > + uint32_t re_cacl = 0; > + uint32_t ra = 0; > + uint32_t t0 = 0; > + int32_t te = 0; > + int32_t te_cacl = 0; > + uint32_t coil_alpha = 0; > + uint16_t pst_rpt = 0; > + > + ret = aw_dev->ops.aw_dsp_read(aw_dev, re_desc->dsp_reg, &dsp_re, re_desc->data_type); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "dsp read re error"); > + return ret; > + } > + > + ret = aw_dev->ops.aw_dsp_read(aw_dev, ra_desc->dsp_reg, &ra, ra_desc->data_type); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "dsp read ra error"); > + return ret; > + } > + > + re_cacl = dsp_re - ra; > + > + ret = aw_dev->ops.aw_dsp_read(aw_dev, t0_desc->dsp_reg, &t0, t0_desc->data_type); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "dsp read t0 error"); > + return ret; > + } > + > + ret = aw_dev->ops.aw_dsp_read(aw_dev, t0_desc->coilalpha_reg, > + &coil_alpha, t0_desc->coil_type); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "dsp read coil_alpha error"); > + return ret; > + } > + > + ret = aw_dev->ops.aw_reg_read(aw_dev, aw_dev->spkr_temp_desc.reg, &pst_rpt); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "reg read pst_rpt error"); > + return ret; > + } > + > + te = (int32_t)((uint32_t)pst_rpt - t0); > + > + te_cacl = AW_TE_CACL_VALUE(te, (uint16_t)coil_alpha); > + > + show_re = AW_RE_REALTIME_VALUE((int32_t)re_cacl, te_cacl); > + > + *re = AW_DSP_RE_TO_SHOW_RE(show_re, re_desc->shift); > + aw_dev_dbg(aw_dev->dev, "real_r0:[%d]", *re); > + > + return 0; > +} > + > +static int aw_cali_svc_get_dev_re(struct aw_device *aw_dev, > + uint32_t *re) > +{ > + int ret; > + struct aw_ste_re_desc *desc = &aw_dev->ste_re_desc; > + uint32_t dsp_re = 0; > + uint32_t show_re = 0; > + > + ret = aw_dev->ops.aw_dsp_read(aw_dev, desc->dsp_reg, &dsp_re, desc->data_type); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "dsp read re error"); > + return ret; > + } > + > + show_re = AW_DSP_RE_TO_SHOW_RE(dsp_re, > + aw_dev->ste_re_desc.shift); > + > + *re = show_re - aw_dev->cali_desc.ra; > + aw_dev_dbg(aw_dev->dev, "real_r0:[%d]", *re); > + > + return 0; > +} > + > +static int aw_cali_svc_get_devs_r0(struct aw_device *aw_dev, int32_t *r0_buf, int num) > +{ > + struct list_head *dev_list = NULL; > + struct list_head *pos = NULL; > + struct aw_device *local_dev = NULL; > + int ret, cnt = 0; > + > + //get dev list > + ret = aw883xx_dev_get_list_head(&dev_list); > + if (ret) { > + aw_dev_err(aw_dev->dev, "get dev list failed"); > + return ret; > + } > + > + list_for_each(pos, dev_list) { > + local_dev = container_of(pos, struct aw_device, list_node); > + if (local_dev->channel < num) { > + ret = aw_cali_svc_get_dev_realtime_re(local_dev, > + &r0_buf[local_dev->channel]); > + if (ret) { > + aw_dev_err(local_dev->dev, "get r0 failed!"); > + return ret; > + } > + cnt++; > + } else { > + aw_dev_err(aw_dev->dev, "channel num[%d] overflow buf num[%d] ", > + local_dev->channel, num); > + } > + } > + return cnt; > +} > + > +static int aw_cali_svc_get_dev_f0(struct aw_device *aw_dev, > + uint32_t *f0) > +{ > + struct aw_f0_desc *f0_desc = &aw_dev->f0_desc; > + uint32_t dsp_val = 0; > + int ret; > + > + ret = aw_dev->ops.aw_dsp_read(aw_dev, > + f0_desc->dsp_reg, &dsp_val, f0_desc->data_type); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "read f0 failed"); > + return ret; > + } > + > + *f0 = dsp_val >> f0_desc->shift; > + aw_dev_dbg(aw_dev->dev, "real_f0:[%d]", *f0); > + > + return 0; > +} > + > +static int aw_cali_svc_get_devs_f0(struct aw_device *aw_dev, int32_t *f0_buf, int num) > +{ > + struct list_head *dev_list = NULL; > + struct list_head *pos = NULL; > + struct aw_device *local_dev = NULL; > + int ret, cnt = 0; > + > + //get dev list > + ret = aw883xx_dev_get_list_head(&dev_list); > + if (ret) { > + aw_dev_err(aw_dev->dev, "get dev list failed"); > + return ret; > + } > + > + list_for_each(pos, dev_list) { > + local_dev = container_of(pos, struct aw_device, list_node); > + if (local_dev->channel < num) { > + ret = aw_cali_svc_get_dev_f0(local_dev, &f0_buf[local_dev->channel]); > + if (ret) { > + aw_dev_err(local_dev->dev, "get f0 failed!"); > + return ret; > + } > + cnt++; > + } else { > + aw_dev_err(aw_dev->dev, "channel num[%d] overflow buf num[%d] ", > + local_dev->channel, num); > + } > + } > + return cnt; > +} > + > +static int aw_cali_svc_get_dev_q(struct aw_device *aw_dev, > + uint32_t *q) > +{ > + struct aw_q_desc *q_desc = &aw_dev->q_desc; > + uint32_t dsp_val = 0; > + int ret; > + > + ret = aw_dev->ops.aw_dsp_read(aw_dev, > + q_desc->dsp_reg, &dsp_val, q_desc->data_type); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "read q failed"); > + return ret; > + } > + > + *q = ((dsp_val * 1000) >> q_desc->shift); > + > + return 0; > +} > + > +int aw883xx_cali_svc_get_dev_te(struct aw_cali_desc *cali_desc, int32_t *te) > +{ > + struct aw_device *aw_dev = > + container_of(cali_desc, struct aw_device, cali_desc); > + uint16_t reg_val = 0; > + int ret; > + > + ret = aw_dev->ops.aw_reg_read(aw_dev, aw_dev->spkr_temp_desc.reg, &reg_val); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "read temperature failed"); > + return ret; > + } > + > + *te = (int32_t)((int16_t)reg_val); > + aw_dev_info(aw_dev->dev, "real_te:[%d]", *te); > + > + return 0; > +} > + > +static int aw_cali_svc_get_devs_te(struct aw_device *aw_dev, int32_t *te_buf, int num) > +{ > + struct list_head *dev_list = NULL; > + struct list_head *pos = NULL; > + struct aw_device *local_dev = NULL; > + int ret, cnt = 0; > + > + //get dev list > + ret = aw883xx_dev_get_list_head(&dev_list); > + if (ret) { > + aw_dev_err(aw_dev->dev, "get dev list failed"); > + return ret; > + } > + > + list_for_each(pos, dev_list) { > + local_dev = container_of(pos, struct aw_device, list_node); > + if (local_dev->channel < num) { > + ret = aw883xx_cali_svc_get_dev_te(&local_dev->cali_desc, > + &te_buf[local_dev->channel]); > + if (ret) { > + aw_dev_err(local_dev->dev, "get temperature failed!"); > + return ret; > + } > + cnt++; > + } else { > + aw_dev_err(aw_dev->dev, "channel num[%d] overflow buf num[%d]", > + local_dev->channel, num); > + } > + } > + return cnt; > +} > + > +static void aw_cali_svc_bubble_sort(uint32_t *data, int data_size) > +{ > + int loop_num = data_size - 1; > + uint16_t temp_store = 0; > + int i; > + int j; > + > + if (data == NULL) { > + aw_pr_err("data is NULL"); > + return; > + } > + > + for (i = 0; i < loop_num; i++) { > + for (j = 0; j < loop_num - i; j++) { > + if (data[j] > data[j + 1]) { > + temp_store = data[j]; > + data[j] = data[j + 1]; > + data[j + 1] = temp_store; > + } > + } > + } > +} > + > +static int aw_cali_svc_del_max_min_ave_algo(uint32_t *data, int data_size) > +{ > + int sum = 0; > + int ave = 0; > + int i = 0; > + > + aw_cali_svc_bubble_sort(data, data_size); > + for (i = 1; i < data_size - 1; i++) > + sum += data[i]; > + > + if ((data_size - AW_CALI_DATA_SUM_RM) == 0) { > + aw_pr_err("data_size id :%d less than 2", data_size); > + return -EINVAL; > + } > + > + ave = sum / (data_size - AW_CALI_DATA_SUM_RM); > + > + return ave; > +} > + > +static void aw_cali_svc_set_cali_status(struct aw_device *aw_dev, bool status) > +{ > + aw_dev->cali_desc.status = status; > + > + if (status) > + aw883xx_monitor_stop(&aw_dev->monitor_desc); > + else > + aw883xx_monitor_start(&aw_dev->monitor_desc); > + > + aw_dev_info(aw_dev->dev, "cali %s", > + (status == 0) ? ("disable") : ("enable")); > +} > + > +bool aw883xx_cali_svc_get_cali_status(struct aw_cali_desc *cali_desc) > +{ > + return cali_desc->status; > +} > + > +static int aw_cali_svc_cali_init_check(struct aw_device *aw_dev) > +{ > + int ret; > + > + aw_dev_dbg(aw_dev->dev, "enter"); > + > + ret = aw883xx_dev_sysst_check(aw_dev); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "syst_check failed"); > + return ret; > + } > + > + ret = aw883xx_dev_get_dsp_status(aw_dev); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "dsp status error"); > + return ret; > + } > + > + ret = aw883xx_dev_get_hmute(aw_dev); > + if (ret == 1) { > + aw_dev_err(aw_dev->dev, "mute staus"); > + return -EINVAL; > + } > + > + return 0; > +} > + > +static int aw_cali_svc_get_cali_cfg(struct aw_device *aw_dev) > +{ > + int ret; > + struct aw_cali_cfg_desc *desc = &aw_dev->cali_cfg_desc; > + struct cali_cfg *cali_cfg = &aw_dev->cali_desc.cali_cfg; > + > + aw_dev_dbg(aw_dev->dev, "enter"); > + > + ret = aw_dev->ops.aw_dsp_read(aw_dev, > + desc->actampth_reg, &cali_cfg->data[0], desc->actampth_data_type); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "dsp read reg0x%x error", desc->actampth_reg); > + return ret; > + } > + > + ret = aw_dev->ops.aw_dsp_read(aw_dev, > + desc->noiseampth_reg, &cali_cfg->data[1], desc->noiseampth_data_type); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "dsp read reg0x%x error", desc->noiseampth_reg); > + return ret; > + } > + > + ret = aw_dev->ops.aw_dsp_read(aw_dev, > + desc->ustepn_reg, &cali_cfg->data[2], desc->ustepn_data_type); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "dsp read reg0x%x error", desc->ustepn_reg); > + return ret; > + } > + > + ret = aw_dev->ops.aw_dsp_read(aw_dev, > + desc->alphan_reg, &cali_cfg->data[3], desc->alphan_data_type); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "dsp read reg0x%x error", desc->alphan_reg); > + return ret; > + } > + > + return 0; > +} > + > +static int aw_cali_svc_set_cali_cfg(struct aw_device *aw_dev, > + struct cali_cfg cali_cfg) > +{ > + int ret; > + struct aw_cali_cfg_desc *desc = &aw_dev->cali_cfg_desc; > + > + aw_dev_dbg(aw_dev->dev, "enter"); > + > + ret = aw_dev->ops.aw_dsp_write(aw_dev, > + desc->actampth_reg, cali_cfg.data[0], desc->actampth_data_type); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "dsp write reg0x%x error", desc->actampth_reg); > + return ret; > + } > + > + ret = aw_dev->ops.aw_dsp_write(aw_dev, > + desc->noiseampth_reg, cali_cfg.data[1], desc->noiseampth_data_type); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "dsp write reg0x%x error", desc->noiseampth_reg); > + return ret; > + } > + > + ret = aw_dev->ops.aw_dsp_write(aw_dev, > + desc->ustepn_reg, cali_cfg.data[2], desc->ustepn_data_type); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "dsp write reg0x%x error", desc->ustepn_reg); > + return ret; > + } > + > + ret = aw_dev->ops.aw_dsp_write(aw_dev, > + desc->alphan_reg, cali_cfg.data[3], desc->alphan_data_type); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "dsp write reg0x%x error", desc->alphan_reg); > + return ret; > + } > + > + return 0; > +} > + > +static int aw_cali_svc_get_smooth_cali_re(struct aw_device *aw_dev) > +{ > + int ret = 0; > + int i = 0; > + uint32_t re_temp[AW_CALI_READ_CNT_MAX] = { 0 }; > + uint32_t dsp_re; > + > + aw_dev_dbg(aw_dev->dev, "enter"); > + > + for (i = 0; i < AW_CALI_READ_CNT_MAX; i++) { > + ret = aw_cali_svc_get_dev_re(aw_dev, &re_temp[i]); > + if (ret < 0) > + goto cali_re_fail; > + > + msleep(30);/*delay 30 ms*/ > + } > + dsp_re = aw_cali_svc_del_max_min_ave_algo(re_temp, > + AW_CALI_READ_CNT_MAX); > + > + if (aw_dev->ops.aw_cali_svc_get_iv_st) { > + ret = aw_dev->ops.aw_cali_svc_get_iv_st(aw_dev); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, > + "get iv data failed"); > + goto cali_re_fail; > + } > + } > + > + if (dsp_re < aw_dev->re_range.re_min || dsp_re > aw_dev->re_range.re_max) { > + aw_dev_err(aw_dev->dev, > + "out range re value: [%d]mohm", dsp_re); > + aw_dev->cali_desc.cali_re = dsp_re; > + if (aw_dev->cali_desc.cali_check_st) { > + aw_dev->cali_desc.cali_result = CALI_RESULT_ERROR; > + ret = aw_cali_write_re_to_nvram(dsp_re, aw_dev->channel); > + if (ret < 0) > + aw_dev_err(aw_dev->dev, "write re failed"); > + } > + aw_cali_svc_run_mute(aw_dev, aw_dev->cali_desc.cali_result); > + return 0; > + } > + > + ret = aw_cali_write_re_to_nvram(dsp_re, aw_dev->channel); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "write re failed"); > + goto cali_re_fail; > + } > + > + if (aw_dev->cali_desc.cali_check_st) > + aw_dev->cali_desc.cali_result = CALI_RESULT_NORMAL; > + > + aw_dev->cali_desc.cali_re = dsp_re; > + aw_dev_info(aw_dev->dev, "re[%d]mohm", aw_dev->cali_desc.cali_re); > + > + aw883xx_dev_dsp_enable(aw_dev, false); > + aw883xx_cali_svc_set_cali_re_to_dsp(&aw_dev->cali_desc); > + aw883xx_dev_dsp_enable(aw_dev, true); > + > + return 0; > + > +cali_re_fail: > + if (aw_dev->cali_desc.cali_check_st) > + aw_dev->cali_desc.cali_result = CALI_RESULT_ERROR; > + aw_cali_svc_run_mute(aw_dev, aw_dev->cali_desc.cali_result); > + return -EINVAL; > +} > + > +static int aw_cali_svc_cali_en(struct aw_device *aw_dev, bool cali_en) > +{ > + int ret = 0; > + struct cali_cfg set_cfg; > + > + aw_dev_info(aw_dev->dev, "cali_en:%d", cali_en); > + > + aw883xx_dev_dsp_enable(aw_dev, false); > + if (cali_en) { > + ret = aw_cali_svc_get_cali_cfg(aw_dev); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "get cali cfg failed"); > + aw883xx_dev_dsp_enable(aw_dev, true); > + return ret; > + } > + set_cfg.data[0] = 0; > + set_cfg.data[1] = 0; > + set_cfg.data[2] = -1; > + set_cfg.data[3] = 1; > + > + ret = aw_cali_svc_set_cali_cfg(aw_dev, set_cfg); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "set cali cfg failed"); > + aw_cali_svc_set_cali_cfg(aw_dev, aw_dev->cali_desc.cali_cfg); > + aw883xx_dev_dsp_enable(aw_dev, true); > + return ret; > + } > + } else { > + aw_cali_svc_set_cali_cfg(aw_dev, aw_dev->cali_desc.cali_cfg); > + } > + aw883xx_dev_dsp_enable(aw_dev, true); > + > + return 0; > +} > + > +static int aw_cali_svc_cali_run_dsp_vol(struct aw_device *aw_dev, > + int type, bool enable) > +{ > + int ret; > + uint16_t reg_val = 0; > + uint16_t set_vol = 0; > + struct aw_dsp_vol_desc *desc = &aw_dev->dsp_vol_desc; > + > + aw_dev_info(aw_dev->dev, "type:%d, enable:%d", type, enable); > + > + if (enable) { > + /*set dsp vol*/ > + if (type == CALI_TYPE_RE) { > + set_vol = desc->mute_st; > + } else if (type == CALI_TYPE_F0) { > + set_vol = desc->noise_st; > + } else { > + aw_dev_err(aw_dev->dev, "type:%d unsupported", type); > + return -EINVAL; > + } > + > + ret = aw_dev->ops.aw_reg_read(aw_dev, > + desc->reg, &reg_val); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "read reg 0x%x failed", desc->reg); > + return ret; > + } > + > + aw_dev->cali_desc.store_vol = reg_val & (~desc->mask); > + reg_val &= desc->mask; > + reg_val |= set_vol; > + > + ret = aw_dev->ops.aw_reg_write(aw_dev, > + desc->reg, reg_val); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "write reg 0x%x failed", desc->reg); > + return ret; > + } > + } else { > + /*reset dsp vol*/ > + ret = aw_dev->ops.aw_reg_read(aw_dev, > + desc->reg, &reg_val); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "read reg 0x%x failed", desc->reg); > + return ret; > + } > + > + reg_val &= desc->mask; > + reg_val |= aw_dev->cali_desc.store_vol; > + > + ret = aw_dev->ops.aw_reg_write(aw_dev, > + desc->reg, reg_val); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "write reg 0x%x failed", desc->reg); > + return ret; > + } > + } > + > + return 0; > +} > + > +static int aw_cali_svc_set_white_noise(struct aw_device *aw_dev, > + bool noise_enable) > +{ > + int ret; > + uint32_t reg_val; > + struct aw_noise_desc *desc = &aw_dev->noise_desc; > + > + aw_dev_info(aw_dev->dev, "set noise %s", > + (noise_enable == 0) ? ("disable") : ("enable")); > + > + ret = aw_dev->ops.aw_dsp_read(aw_dev, > + desc->dsp_reg, &reg_val, desc->data_type); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "read dsp reg 0x%x failed", desc->dsp_reg); > + return ret; > + } > + > + if (noise_enable) > + reg_val |= (~desc->mask); > + else > + reg_val &= desc->mask; > + > + > + ret = aw_dev->ops.aw_dsp_write(aw_dev, > + desc->dsp_reg, reg_val, desc->data_type); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "write dsp reg 0x%x failed", desc->dsp_reg); > + return ret; > + } > + > + return 0; > +} > + > +static int aw_cali_svc_cali_f0_en(struct aw_device *aw_dev, bool f0_enable) > +{ > + int ret; > + struct aw_cali_delay_desc *desc = &aw_dev->cali_delay_desc; > + > + aw_dev_info(aw_dev->dev, "cali f0 %s", > + (f0_enable == 0) ? ("disable") : ("enable")); > + > + if (f0_enable) { > + ret = aw_cali_svc_cali_run_dsp_vol(aw_dev, CALI_TYPE_F0, true); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "run dsp volume error, ret=%d", ret); > + return ret; > + } > + > + msleep(desc->delay); > + > + ret = aw_cali_svc_set_white_noise(aw_dev, true); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "write white noise error, ret=%d", ret); > + aw_cali_svc_cali_run_dsp_vol(aw_dev, CALI_TYPE_F0, false); > + return ret; > + } > + } else { > + aw_cali_svc_set_white_noise(aw_dev, false); > + aw_cali_svc_cali_run_dsp_vol(aw_dev, CALI_TYPE_F0, false); > + } > + > + return 0; > +} > + > +static int aw_cali_svc_get_cali_f0_q(struct aw_device *aw_dev) > +{ > + int ret = -1; > + int cnt = 0; > + uint32_t f0 = 0; > + uint32_t q = 0; > + uint32_t f0_sum = 0; > + uint32_t q_sum = 0; > + struct aw_cali_desc *cali_desc = &aw_dev->cali_desc; > + > + aw_dev_dbg(aw_dev->dev, "enter"); > + > + for (cnt = 0; cnt < F0_READ_CNT_MAX; cnt++) { > + /*f0*/ > + ret = aw_cali_svc_get_dev_f0(aw_dev, &f0); > + if (ret < 0) > + return ret; > + f0_sum += f0; > + > + /*q*/ > + ret = aw_cali_svc_get_dev_q(aw_dev, &q); > + if (ret < 0) > + return ret; > + q_sum += q; > + msleep(30); > + } > + > + cali_desc->f0 = f0_sum / cnt; > + cali_desc->q = q_sum / cnt; > + > + if (aw_dev->ops.aw_cali_svc_get_iv_st) { > + ret = aw_dev->ops.aw_cali_svc_get_iv_st(aw_dev); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, > + "get iv data failed, set default f0: 2600 q: 2600"); > + cali_desc->f0 = 2600; > + cali_desc->q = 2600; > + } > + } > + aw_dev_info(aw_dev->dev, "f0[%d] q[%d]", cali_desc->f0, cali_desc->q); > + return 0; > +} > + > +static int aw_cali_svc_cali_mode_enable(struct aw_device *aw_dev, > + int type, unsigned int flag, bool is_enable) > +{ > + int ret; > + > + aw_dev_info(aw_dev->dev, "type:%d, flag:0x%x, is_enable:%d", > + type, flag, is_enable); > + > + if (is_enable) { > + ret = aw_cali_svc_cali_init_check(aw_dev); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "init check failed"); > + return ret; > + } > + > + aw_cali_svc_set_cali_status(aw_dev, true); > + > + ret = aw_cali_svc_cali_en(aw_dev, true); > + if (ret < 0) { > + aw_cali_svc_set_cali_status(aw_dev, false); > + return ret; > + } > + > + if ((type == CALI_TYPE_RE) && (flag & CALI_OPS_HMUTE)) { > + ret = aw_cali_svc_cali_run_dsp_vol(aw_dev, CALI_TYPE_RE, true); > + if (ret < 0) { > + aw_cali_svc_cali_en(aw_dev, false); > + aw_cali_svc_set_cali_status(aw_dev, false); > + return ret; > + } > + } else if ((type == CALI_TYPE_F0) && (flag & CALI_OPS_NOISE)) { > + ret = aw_cali_svc_cali_f0_en(aw_dev, true); > + if (ret < 0) { > + aw_cali_svc_cali_en(aw_dev, false); > + aw_cali_svc_set_cali_status(aw_dev, false); > + return ret; > + } > + } > + } else { > + > + if ((type == CALI_TYPE_RE) && (flag & CALI_OPS_HMUTE)) > + aw_cali_svc_cali_run_dsp_vol(aw_dev, CALI_TYPE_RE, false); > + else if ((type == CALI_TYPE_F0) && (flag & CALI_OPS_NOISE)) > + aw_cali_svc_cali_f0_en(aw_dev, false); > + > + aw_cali_svc_cali_en(aw_dev, false); > + aw883xx_dev_clear_int_status(aw_dev); > + aw_cali_svc_set_cali_status(aw_dev, false); > + } > + > + return 0; > +} > + > +static int aw_cali_svc_devs_cali_mode_enable(struct list_head *dev_list, > + int type, unsigned int flag, > + bool is_enable) > +{ > + int ret; > + struct list_head *pos = NULL; > + struct aw_device *local_dev = NULL; > + > + list_for_each(pos, dev_list) { > + local_dev = container_of(pos, struct aw_device, list_node); > + if (is_enable) > + aw_cali_svc_run_mute(local_dev, CALI_RESULT_NORMAL); > + ret = aw_cali_svc_cali_mode_enable(local_dev, type, flag, is_enable); > + if (ret < 0) > + return ret; > + if (!is_enable && (type == CALI_TYPE_F0)) > + aw_cali_svc_run_mute(local_dev, local_dev->cali_desc.cali_result); > + } > + > + return ret; > +} > + > +static int aw_cali_svc_dev_cali_re(struct aw_device *aw_dev, unsigned int flag) > +{ > + int ret; > + > + aw_dev_info(aw_dev->dev, "enter"); > + > + aw_cali_svc_run_mute(aw_dev, CALI_RESULT_NORMAL); > + > + ret = aw_cali_svc_cali_mode_enable(aw_dev, > + CALI_TYPE_RE, flag, true); > + if (ret < 0) > + return ret; > + > + msleep(g_cali_re_time); > + > + ret = aw_cali_svc_get_smooth_cali_re(aw_dev); > + if (ret < 0) > + aw_dev_err(aw_dev->dev, "cali re failed"); > + > + aw_cali_svc_cali_mode_enable(aw_dev, > + CALI_TYPE_RE, flag, false); > + > + return ret; > +} > + > +static int aw_cali_svc_devs_get_cali_re(struct list_head *dev_list) > +{ > + int ret; > + struct list_head *pos = NULL; > + struct aw_device *local_dev = NULL; > + > + list_for_each(pos, dev_list) { > + local_dev = container_of(pos, struct aw_device, list_node); > + ret = aw_cali_svc_get_smooth_cali_re(local_dev); > + if (ret < 0) { > + aw_dev_err(local_dev->dev, "get re failed"); > + return ret; > + } > + } > + > + return ret; > +} > + > +static int aw_cali_svc_devs_cali_re(struct aw_device *aw_dev, unsigned int flag) > +{ > + int ret; > + struct list_head *dev_list = NULL; > + > + aw_dev_info(aw_dev->dev, "enter"); > + > + ret = aw883xx_dev_get_list_head(&dev_list); > + if (ret) { > + aw_dev_err(aw_dev->dev, " get dev list failed"); > + return ret; > + } > + > + ret = aw_cali_svc_devs_cali_mode_enable(dev_list, CALI_TYPE_RE, flag, true); > + if (ret < 0) > + goto error; > + > + msleep(g_cali_re_time); > + > + ret = aw_cali_svc_devs_get_cali_re(dev_list); > + if (ret < 0) > + goto error; > + > + aw_cali_svc_devs_cali_mode_enable(dev_list, CALI_TYPE_RE, flag, false); > + > + return 0; > + > +error: > + aw_cali_svc_devs_cali_mode_enable(dev_list, CALI_TYPE_RE, flag, false); > + return ret; > +} > + > +static int aw_cali_svc_cali_re(struct aw_device *aw_dev, bool is_single, unsigned int flag) > +{ > + if (is_single) > + return aw_cali_svc_dev_cali_re(aw_dev, flag); > + else > + return aw_cali_svc_devs_cali_re(aw_dev, flag); > +} > + > +static int aw_cali_svc_set_devs_re_str(struct aw_device *aw_dev, const char *re_str) > +{ > + struct list_head *dev_list = NULL, *pos = NULL; > + struct aw_device *local_dev = NULL; > + int ret, cnt = 0; > + int re_data[AW_DEV_CH_MAX] = { 0 }; > + char str_data[32] = { 0 }; > + int i, len = 0; > + int dev_num = 0; > + > + /*get dev list*/ > + ret = aw883xx_dev_get_list_head(&dev_list); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "get dev list failed"); > + return ret; > + } > + > + dev_num = aw_dev->ops.aw_get_dev_num(); > + > + for (i = 0 ; i < dev_num; i++) { > + memset(str_data, 0, sizeof(str_data)); > + snprintf(str_data, sizeof(str_data), "dev[%d]:%s ", i, "%d"); > + ret = sscanf(re_str + len, str_data, &re_data[i]); > + if (ret <= 0) { > + aw_dev_err(aw_dev->dev, "unsupported str: %s", re_str); > + return -EINVAL; > + } > + len += snprintf(str_data, sizeof(str_data), "dev[%d]:%d ", i, re_data[i]); > + if (len > strlen(re_str)) { > + aw_dev_err(aw_dev->dev, "%s: unsupported", re_str); > + return -EINVAL; > + } > + } > + > + list_for_each(pos, dev_list) { > + local_dev = container_of(pos, struct aw_device, list_node); > + if (local_dev->channel < AW_DEV_CH_MAX) { > + ret = aw_cali_store_cali_re(local_dev, re_data[local_dev->channel]); > + if (ret < 0) { > + aw_dev_err(local_dev->dev, "store cali re failed"); > + return ret; > + } > + cnt++; > + } > + } > + > + return cnt; > +} > + > +static int aw_cali_svc_dev_cali_f0_q(struct aw_device *aw_dev, unsigned int flag) > +{ > + int ret; > + > + aw_cali_svc_run_mute(aw_dev, CALI_RESULT_NORMAL); > + > + ret = aw_cali_svc_cali_mode_enable(aw_dev, CALI_TYPE_F0, flag, true); > + if (ret < 0) > + return ret; > + > + msleep(AW_CALI_F0_TIME); > + > + ret = aw_cali_svc_get_cali_f0_q(aw_dev); > + if (ret < 0) > + aw_dev_err(aw_dev->dev, "get f0 q failed"); > + > + aw_cali_svc_cali_mode_enable(aw_dev, CALI_TYPE_F0, flag, false); > + > + aw_cali_svc_run_mute(aw_dev, aw_dev->cali_desc.cali_result); > + > + return ret; > +} > + > +static int aw_cali_svc_devs_get_cali_f0_q(struct list_head *dev_list) > +{ > + int ret; > + struct list_head *pos = NULL; > + struct aw_device *local_dev = NULL; > + > + list_for_each(pos, dev_list) { > + local_dev = container_of(pos, struct aw_device, list_node); > + ret = aw_cali_svc_get_cali_f0_q(local_dev); > + if (ret < 0) { > + aw_dev_err(local_dev->dev, "get f0 q failed"); > + return ret; > + } > + } > + > + return ret; > +} > + > +static int aw_cali_svc_devs_cali_f0_q(struct aw_device *aw_dev, unsigned int flag) > +{ > + int ret; > + struct list_head *dev_list = NULL; > + > + ret = aw883xx_dev_get_list_head(&dev_list); > + if (ret) { > + aw_dev_err(aw_dev->dev, " get dev list failed"); > + return ret; > + } > + > + ret = aw_cali_svc_devs_cali_mode_enable(dev_list, CALI_TYPE_F0, flag, true); > + if (ret < 0) > + goto error; > + > + msleep(AW_CALI_F0_TIME); > + > + ret = aw_cali_svc_devs_get_cali_f0_q(dev_list); > + if (ret < 0) > + goto error; > + > + aw_cali_svc_devs_cali_mode_enable(dev_list, CALI_TYPE_F0, flag, false); > + > + return 0; > + > +error: > + aw_cali_svc_devs_cali_mode_enable(dev_list, CALI_TYPE_F0, flag, false); > + return ret; > +} > + > +static int aw_cali_svc_cali_f0_q(struct aw_device *aw_dev, bool is_single, unsigned int flag) > +{ > + if (is_single) > + return aw_cali_svc_dev_cali_f0_q(aw_dev, flag); > + else > + return aw_cali_svc_devs_cali_f0_q(aw_dev, flag); > +} > + > +static int aw_cali_svc_get_dev_cali_val(struct aw_device *aw_dev, int type, uint32_t *data_buf) > +{ > + switch (type) { > + case GET_RE_TYPE: > + *data_buf = aw_dev->cali_desc.cali_re; > + break; > + case GET_F0_TYPE: > + *data_buf = aw_dev->cali_desc.f0; > + break; > + case GET_Q_TYPE: > + *data_buf = aw_dev->cali_desc.q; > + break; > + default: > + aw_dev_err(aw_dev->dev, "type:%d not support", type); > + return -EINVAL; > + } > + > + return 0; > +} > + > +static int aw_cali_svc_get_devs_cali_val(struct aw_device *aw_dev, > + int type, > + uint32_t *data_buf, > + int num) > +{ > + struct list_head *dev_list = NULL; > + struct list_head *pos = NULL; > + struct aw_device *local_dev = NULL; > + int ret, cnt = 0; > + > + /*get dev list*/ > + ret = aw883xx_dev_get_list_head(&dev_list); > + if (ret) { > + aw_dev_err(aw_dev->dev, "get dev list failed"); > + return ret; > + } > + > + list_for_each(pos, dev_list) { > + local_dev = container_of(pos, struct aw_device, list_node); > + if (local_dev->channel < num) { > + switch (type) { > + case GET_RE_TYPE: > + data_buf[local_dev->channel] = local_dev->cali_desc.cali_re; > + break; > + case GET_F0_TYPE: > + data_buf[local_dev->channel] = local_dev->cali_desc.f0; > + break; > + case GET_Q_TYPE: > + data_buf[local_dev->channel] = local_dev->cali_desc.q; > + break; > + default: > + aw_dev_err(local_dev->dev, "type:%d not support", type); > + return -EINVAL; > + } > + cnt++; > + } else { > + aw_dev_err(local_dev->dev, "channel num[%d] overflow buf num[%d]", > + local_dev->channel, num); > + return -EINVAL; > + } > + } > + > + return cnt; > +} > + > +static int aw_cali_svc_cali_re_f0_q(struct aw_device *aw_dev, bool is_single, unsigned int flag) > +{ > + int ret; > + > + ret = aw_cali_svc_cali_re(aw_dev, is_single, flag); > + if (ret < 0) > + return ret; > + > + ret = aw_cali_svc_cali_f0_q(aw_dev, is_single, flag); > + if (ret < 0) > + return ret; > + > + return 0; > +} > + > +static int aw_cali_svc_cali_cmd(struct aw_device *aw_dev, > + int cali_cmd, > + bool is_single, > + unsigned int flag) > +{ > + switch (cali_cmd) { > + case AW_CALI_CMD_RE: { > + return aw_cali_svc_cali_re(aw_dev, is_single, flag); > + } break; > + case AW_CALI_CMD_F0: > + case AW_CALI_CMD_F0_Q: { > + return aw_cali_svc_cali_f0_q(aw_dev, is_single, flag); > + } break; > + case AW_CALI_CMD_RE_F0: > + case AW_CALI_CMD_RE_F0_Q: { > + return aw_cali_svc_cali_re_f0_q(aw_dev, is_single, flag); > + } > + default: { > + aw_dev_err(aw_dev->dev, "unsupported cmd %d", cali_cmd); > + return -EINVAL; > + } > + } > + return 0; > +} > + > +static int aw_cali_svc_get_cmd_form_str(struct aw_device *aw_dev, const char *buf) > +{ > + int i; > + > + for (i = 0; i < CALI_STR_MAX; i++) { > + if (!strncmp(cali_str[i], buf, strlen(cali_str[i]))) > + break; > + } > + > + if (i == CALI_STR_MAX) { > + aw_dev_err(aw_dev->dev, "supported cmd [%s]!", buf); > + return -EINVAL; > + } > + > + aw_dev_dbg(aw_dev->dev, "find str [%s]", cali_str[i]); > + return i; > +} > + > +/*****************************attr cali***************************************************/ > +static ssize_t aw_cali_attr_time_store(struct device *dev, > + struct device_attribute *attr, const char *buf, size_t count) > +{ > + int ret; > + uint32_t time; > + struct aw883xx *aw883xx = dev_get_drvdata(dev); > + struct aw_device *aw_dev = aw883xx->aw_pa; > + > + ret = kstrtoint(buf, 0, &time); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "read buf %s failed", buf); > + return ret; > + } > + > + if (time < 1000) { > + aw_dev_err(aw_dev->dev, "time:%d is too short, no set", time); > + return -EINVAL; > + } > + > + g_cali_re_time = time; > + aw_dev_dbg(aw_dev->dev, "time:%u", time); > + > + return count; > +} > + > +static ssize_t aw_cali_attr_time_show(struct device *dev, > + struct device_attribute *attr, char *buf) > +{ > + ssize_t len = 0; > + > + len += snprintf(buf+len, PAGE_SIZE-len, > + "time: %u\n", g_cali_re_time); > + > + return len; > +} > + > +static ssize_t aw_cali_attr_re_store(struct device *dev, > + struct device_attribute *attr, const char *buf, size_t count) > +{ > + struct aw883xx *aw883xx = dev_get_drvdata(dev); > + struct aw_device *aw_dev = aw883xx->aw_pa; > + int ret; > + int re; > + > + if (is_single_cali) { > + ret = kstrtoint(buf, 0, &re); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "read buf %s failed", buf); > + return ret; > + } > + > + ret = aw_cali_store_cali_re(aw_dev, re); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "store cali re failed!"); > + return ret; > + } > + } else { > + ret = aw_cali_svc_set_devs_re_str(aw_dev, buf); > + if (ret <= 0) { > + aw_pr_err("set re str %s failed", buf); > + return -EPERM; > + } > + } > + > + return count; > +} > + > +static ssize_t aw_cali_attr_re_show(struct device *dev, > + struct device_attribute *attr, char *buf) > +{ > + int ret, i; > + struct aw883xx *aw883xx = dev_get_drvdata(dev); > + struct aw_device *aw_dev = aw883xx->aw_pa; > + ssize_t len = 0; > + int32_t re[AW_DEV_CH_MAX] = { 0 }; > + > + ret = aw_cali_svc_cali_re(aw_dev, is_single_cali, CALI_OPS_HMUTE); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "cali re failed"); > + return ret; > + } > + > + if (is_single_cali) { > + len += snprintf(buf+len, PAGE_SIZE-len, "dev[%d]: %umOhms\n", > + aw_dev->channel, aw_dev->cali_desc.cali_re); > + } else { > + ret = aw_cali_svc_get_devs_cali_val(aw_dev, GET_RE_TYPE, re, AW_DEV_CH_MAX); > + if (ret <= 0) { > + aw_dev_err(aw_dev->dev, "get re failed"); > + } else { > + for (i = 0; i < ret; i++) > + len += snprintf(buf+len, PAGE_SIZE-len, > + "dev[%d]: %umOhms ", i, re[i]); > + > + len += snprintf(buf+len, PAGE_SIZE-len, "\n"); > + } > + } > + > + return len; > +} > + > +static ssize_t aw_cali_attr_f0_show(struct device *dev, > + struct device_attribute *attr, char *buf) > +{ > + int ret, i; > + struct aw883xx *aw883xx = dev_get_drvdata(dev); > + struct aw_device *aw_dev = aw883xx->aw_pa; > + ssize_t len = 0; > + uint32_t f0[AW_DEV_CH_MAX] = { 0 }; > + > + ret = aw_cali_svc_cali_f0_q(aw_dev, is_single_cali, CALI_OPS_NOISE); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "cali f0 failed"); > + return ret; > + } > + > + if (is_single_cali) { > + len += snprintf(buf+len, PAGE_SIZE-len, "dev[%d]:%u Hz\n", > + aw_dev->channel, aw_dev->cali_desc.f0); > + } else { > + ret = aw_cali_svc_get_devs_cali_val(aw_dev, GET_F0_TYPE, f0, AW_DEV_CH_MAX); > + if (ret <= 0) { > + aw_dev_err(aw_dev->dev, "get re failed"); > + } else { > + for (i = 0; i < ret; i++) > + len += snprintf(buf+len, PAGE_SIZE-len, "dev[%d]:%u Hz ", i, f0[i]); > + > + len += snprintf(buf+len, PAGE_SIZE-len, "\n"); > + } > + } > + > + return len; > +} > + > +static ssize_t aw_cali_attr_f0_q_show(struct device *dev, > + struct device_attribute *attr, char *buf) > +{ > + int ret, i; > + struct aw883xx *aw883xx = dev_get_drvdata(dev); > + struct aw_device *aw_dev = aw883xx->aw_pa; > + ssize_t len = 0; > + uint32_t f0[AW_DEV_CH_MAX] = { 0 }; > + uint32_t q[AW_DEV_CH_MAX] = { 0 }; > + > + ret = aw_cali_svc_cali_f0_q(aw_dev, is_single_cali, CALI_OPS_NOISE); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "cali f0 q failed"); > + return ret; > + } > + > + if (is_single_cali) { > + len += snprintf(buf+len, PAGE_SIZE-len, "dev[%d]f0:%u Hz q:%u\n", > + aw_dev->channel, aw_dev->cali_desc.f0, aw_dev->cali_desc.q); > + } else { > + > + ret = aw_cali_svc_get_devs_cali_val(aw_dev, GET_F0_TYPE, f0, AW_DEV_CH_MAX); > + if (ret <= 0) { > + aw_dev_err(aw_dev->dev, "get f0 failed"); > + return -EINVAL; > + } > + > + ret = aw_cali_svc_get_devs_cali_val(aw_dev, GET_Q_TYPE, q, AW_DEV_CH_MAX); > + if (ret <= 0) { > + aw_dev_err(aw_dev->dev, "get q failed"); > + return -EINVAL; > + } > + > + for (i = 0; i < ret; i++) > + len += snprintf(buf+len, PAGE_SIZE-len, "dev[%d]:f0:%u Hz q:%u ", > + i, f0[i], q[i]); > + > + len += snprintf(buf+len, PAGE_SIZE-len, "\n"); > + } > + > + return len; > +} > + > +static ssize_t aw_re_range_show(struct device *dev, > + struct device_attribute *attr, char *buf) > +{ > + ssize_t len = 0; > + struct aw883xx *aw883xx = dev_get_drvdata(dev); > + struct aw_device *aw_dev = aw883xx->aw_pa; > + uint32_t range_buf[RE_RANGE_NUM] = { 0 }; > + > + aw_cali_svc_get_dev_re_range(aw_dev, range_buf); > + > + len += snprintf(buf + len, PAGE_SIZE - len, > + "re_min value: [%d]\n", range_buf[RE_MIN_FLAG]); > + len += snprintf(buf + len, PAGE_SIZE - len, > + "re_max value: [%d]\n", range_buf[RE_MAX_FLAG]); > + > + return len; > +} > + > +static DEVICE_ATTR(cali_time, 0644, > + aw_cali_attr_time_show, aw_cali_attr_time_store); > +static DEVICE_ATTR(cali_re, 0644, > + aw_cali_attr_re_show, aw_cali_attr_re_store); > +static DEVICE_ATTR(cali_f0, 0444, > + aw_cali_attr_f0_show, NULL); > +static DEVICE_ATTR(cali_f0_q, 0444, > + aw_cali_attr_f0_q_show, NULL); > +static DEVICE_ATTR(re_range, 0444, > + aw_re_range_show, NULL); > + > +static struct attribute *aw_cali_attr[] = { > + &dev_attr_cali_time.attr, > + &dev_attr_cali_re.attr, > + &dev_attr_cali_f0.attr, > + &dev_attr_cali_f0_q.attr, > + &dev_attr_re_range.attr, > + NULL > +}; > + > +static struct attribute_group aw_cali_attr_group = { > + .attrs = aw_cali_attr, > + NULL > +}; > + > +static void aw_cali_attr_init(struct aw_device *aw_dev) > +{ > + int ret; > + > + ret = sysfs_create_group(&aw_dev->dev->kobj, &aw_cali_attr_group); > + if (ret < 0) > + aw_dev_info(aw_dev->dev, "error creating sysfs cali attr files"); > +} > + > +static void aw_cali_attr_deinit(struct aw_device *aw_dev) > +{ > + sysfs_remove_group(&aw_dev->dev->kobj, &aw_cali_attr_group); > + aw_dev_info(aw_dev->dev, "attr files deinit"); > +} > + > + > + > + > +/*****************************class node******************************************************/ > +static ssize_t aw_cali_class_time_show(struct class *class, struct class_attribute *attr, char *buf) > +{ > + ssize_t len = 0; > + > + len += snprintf(buf+len, PAGE_SIZE-len, > + "time: %d\n", g_cali_re_time); > + > + return len; > +} > + > +static ssize_t aw_cali_class_time_store(struct class *class, > + struct class_attribute *attr, const char *buf, size_t len) > +{ > + int ret; > + uint32_t time; > + > + ret = kstrtoint(buf, 0, &time); > + if (ret < 0) { > + aw_pr_err("read buf %s failed", buf); > + return ret; > + } > + > + if (time < 1000) { > + aw_pr_err("time:%d is too short, no set", time); > + return -EINVAL; > + } > + > + g_cali_re_time = time; > + aw_pr_dbg("time:%d", time); > + > + return len; > +} > + > +static ssize_t aw_cali_class_cali_re_show(struct class *class, > + struct class_attribute *attr, > + char *buf) > +{ > + struct list_head *dev_list; > + struct aw_device *local_dev; > + int ret, i; > + ssize_t len = 0; > + uint32_t cali_re[AW_DEV_CH_MAX] = { 0 }; > + > + aw_pr_info("enter"); > + > + ret = aw883xx_dev_get_list_head(&dev_list); > + if (ret) { > + aw_pr_err("get dev list failed"); > + return ret; > + } > + > + local_dev = list_first_entry(dev_list, struct aw_device, list_node); > + > + ret = aw_cali_svc_cali_re(local_dev, false, CALI_OPS_HMUTE); > + if (ret < 0) > + return ret; > + > + ret = aw_cali_svc_get_devs_cali_val(local_dev, GET_RE_TYPE, cali_re, AW_DEV_CH_MAX); > + if (ret <= 0) { > + aw_dev_err(local_dev->dev, "get re failed"); > + } else { > + for (i = 0; i < ret; i++) > + len += snprintf(buf+len, PAGE_SIZE-len, "dev[%d]:%u mOhms ", i, cali_re[i]); > + > + len += snprintf(buf+len, PAGE_SIZE-len, "\n"); > + } > + > + return len; > +} > + > +static ssize_t aw_cali_class_cali_re_store(struct class *class, > + struct class_attribute *attr, const char *buf, size_t len) > +{ > + struct list_head *dev_list = NULL; > + struct aw_device *local_dev = NULL; > + int ret; > + > + ret = aw883xx_dev_get_list_head(&dev_list); > + if (ret) { > + aw_pr_err("get dev list failed"); > + return ret; > + } > + > + local_dev = list_first_entry(dev_list, struct aw_device, list_node); > + > + ret = aw_cali_svc_set_devs_re_str(local_dev, buf); > + if (ret <= 0) { > + aw_pr_err("set re str %s failed", buf); > + return -EPERM; > + } > + > + return len; > +} > + > +static ssize_t aw_cali_class_cali_f0_show(struct class *class, > + struct class_attribute *attr, char *buf) > +{ > + struct list_head *dev_list = NULL; > + struct aw_device *local_dev = NULL; > + int ret = -1; > + int i = 0; > + ssize_t len = 0; > + uint32_t f0[AW_DEV_CH_MAX] = { 0 }; > + > + aw_pr_info("enter"); > + > + ret = aw883xx_dev_get_list_head(&dev_list); > + if (ret < 0) { > + aw_pr_err("get dev list failed"); > + return ret; > + } > + > + local_dev = list_first_entry(dev_list, struct aw_device, list_node); > + > + ret = aw_cali_svc_cali_f0_q(local_dev, is_single_cali, CALI_OPS_NOISE); > + if (ret < 0) { > + aw_pr_err("cali f0 failed"); > + return ret; > + } > + > + ret = aw_cali_svc_get_devs_cali_val(local_dev, GET_F0_TYPE, f0, AW_DEV_CH_MAX); > + if (ret <= 0) { > + aw_pr_err("get f0 failed"); > + } else { > + for (i = 0; i < ret; i++) > + len += snprintf(buf+len, PAGE_SIZE-len, "dev[%d]:%u Hz ", > + i, f0[i]); > + > + len += snprintf(buf+len, PAGE_SIZE-len, "\n"); > + } > + > + return len; > +} > + > +static ssize_t aw_cali_class_cali_f0_q_show(struct class *class, > + struct class_attribute *attr, > + char *buf) > +{ > + struct list_head *dev_list = NULL; > + struct aw_device *local_dev = NULL; > + int ret, i; > + ssize_t len = 0; > + uint32_t f0[AW_DEV_CH_MAX] = { 0 }; > + uint32_t q[AW_DEV_CH_MAX] = { 0 }; > + > + aw_pr_info("enter"); > + > + ret = aw883xx_dev_get_list_head(&dev_list); > + if (ret < 0) { > + aw_pr_err("get dev list failed"); > + return ret; > + } > + > + local_dev = list_first_entry(dev_list, struct aw_device, list_node); > + > + ret = aw_cali_svc_cali_f0_q(local_dev, is_single_cali, CALI_OPS_NOISE); > + if (ret < 0) { > + aw_dev_err(local_dev->dev, "cali f0 q failed"); > + return ret; > + } > + > + ret = aw_cali_svc_get_devs_cali_val(local_dev, GET_F0_TYPE, f0, AW_DEV_CH_MAX); > + if (ret <= 0) { > + aw_dev_err(local_dev->dev, "get f0 failed"); > + return -EINVAL; > + } > + > + ret = aw_cali_svc_get_devs_cali_val(local_dev, GET_Q_TYPE, q, AW_DEV_CH_MAX); > + if (ret <= 0) { > + aw_dev_err(local_dev->dev, "get q failed"); > + return -EINVAL; > + } > + > + for (i = 0; i < ret; i++) > + len += snprintf(buf+len, PAGE_SIZE-len, "dev[%d]:f0:%u Hz q:%u ", > + i, f0[i], q[i]); > + > + len += snprintf(buf+len, PAGE_SIZE-len, "\n"); > + > + return len; > +} > + > +static ssize_t aw_class_re_range_show(struct class *class, struct class_attribute *attr, char *buf) > +{ > + int ret, i; > + ssize_t len = 0; > + struct list_head *dev_list = NULL; > + struct aw_device *local_dev = NULL; > + uint32_t re_value[AW_DEV_RE_RANGE] = { 0 }; > + > + aw_pr_info("enter"); > + > + ret = aw883xx_dev_get_list_head(&dev_list); > + if (ret < 0) { > + aw_pr_err("get dev list failed"); > + return ret; > + } > + > + local_dev = list_first_entry(dev_list, struct aw_device, list_node); > + ret = aw_cali_svc_get_devs_re_range(local_dev, re_value, AW_DEV_CH_MAX); > + if (ret <= 0) { > + aw_dev_err(local_dev->dev, "get re range failed"); > + return -EINVAL; > + } > + > + for (i = 0; i < ret; i++) { > + len += snprintf(buf+len, PAGE_SIZE-len, "dev[%d]:re_min:%d re_max:%d ", > + i, re_value[RE_MIN_FLAG + i * RE_RANGE_NUM], > + re_value[RE_MAX_FLAG + i * RE_RANGE_NUM]); > + } > + len += snprintf(buf+len, PAGE_SIZE-len, "\n"); > + > + return len; > +} > + > +static struct class_attribute class_attr_cali_time = > + __ATTR(cali_time, 0644, > + aw_cali_class_time_show, aw_cali_class_time_store); > + > +static struct class_attribute class_attr_re25_calib = > + __ATTR(re25_calib, 0644, > + aw_cali_class_cali_re_show, aw_cali_class_cali_re_store); > + > +static struct class_attribute class_attr_f0_calib = > + __ATTR(f0_calib, 0444, > + aw_cali_class_cali_f0_show, NULL); > + > +static struct class_attribute class_attr_f0_q_calib = > + __ATTR(f0_q_calib, 0444, > + aw_cali_class_cali_f0_q_show, NULL); > + > +static struct class_attribute class_att_re_range = > + __ATTR(re_range, 0444, > + aw_class_re_range_show, NULL); > + > +static struct class aw_cali_class = { > + .name = "smartpa", > + .owner = THIS_MODULE, > +}; > + > +static void aw_cali_class_attr_init(struct aw_device *aw_dev) > +{ > + int ret; > + > + if (aw_dev->channel != 0) { > + aw_dev_err(aw_dev->dev, "class node already register"); > + return; > + } > + > + ret = class_register(&aw_cali_class); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "error creating class node"); > + return; > + } > + > + ret = class_create_file(&aw_cali_class, &class_attr_cali_time); > + if (ret) > + aw_dev_err(aw_dev->dev, "creat class_attr_cali_time fail"); > + > + ret = class_create_file(&aw_cali_class, &class_attr_re25_calib); > + if (ret) > + aw_dev_err(aw_dev->dev, "creat class_attr_re25_calib fail"); > + > + ret = class_create_file(&aw_cali_class, &class_attr_f0_calib); > + if (ret) > + aw_dev_err(aw_dev->dev, "creat class_attr_f0_calib fail"); > + > + > + ret = class_create_file(&aw_cali_class, &class_attr_f0_q_calib); > + if (ret) > + aw_dev_err(aw_dev->dev, "creat class_attr_f0_q_calib fail"); > + > + ret = class_create_file(&aw_cali_class, &class_att_re_range); > + if (ret) > + aw_dev_err(aw_dev->dev, "creat class_att_re_range fail"); > +} > + > +static void aw_cali_class_attr_deinit(struct aw_device *aw_dev) > +{ > + class_remove_file(&aw_cali_class, &class_att_re_range); > + class_remove_file(&aw_cali_class, &class_attr_f0_q_calib); > + class_remove_file(&aw_cali_class, &class_attr_f0_calib); > + class_remove_file(&aw_cali_class, &class_attr_re25_calib); > + class_remove_file(&aw_cali_class, &class_attr_cali_time); > + > + class_unregister(&aw_cali_class); > + aw_dev_info(aw_dev->dev, "unregister class node"); > +} > +/*****************************class node******************************************************/ > + > + > +/*****************************misc cali******************************************************/ > +static int aw_cali_misc_open(struct inode *inode, struct file *file) > +{ > + struct list_head *dev_list = NULL; > + struct list_head *pos = NULL; > + struct aw_device *local_dev = NULL; > + int ret; > + > + aw_pr_dbg("misc open success"); > + > + ret = aw883xx_dev_get_list_head(&dev_list); > + if (ret) { > + aw_pr_err("get dev list failed"); > + file->private_data = NULL; > + return -EINVAL; > + } > + > + //find select dev > + list_for_each(pos, dev_list) { > + local_dev = container_of(pos, struct aw_device, list_node); > + if (local_dev->channel == g_dev_select) > + break; > + } > + > + if (local_dev == NULL) { > + aw_pr_err("get dev failed"); > + return -EINVAL; > + } > + > + //cannot find sel dev, use list first dev > + if (local_dev->channel != g_dev_select) { > + local_dev = list_first_entry(dev_list, struct aw_device, list_node); > + aw_dev_dbg(local_dev->dev, "can not find dev[%d], use default", g_dev_select); > + } > + > + file->private_data = (void *)local_dev; > + > + aw_dev_dbg(local_dev->dev, "misc open success"); > + > + return 0; > +} > + > +static int aw_cali_misc_release(struct inode *inode, struct file *file) > +{ > + file->private_data = (void *)NULL; > + > + aw_pr_dbg("misc release success"); > + > + return 0; > +} > + > +static int aw_cali_misc_ops_write(struct aw_device *aw_dev, > + unsigned int cmd, unsigned long arg) > +{ > + > + unsigned int data_len = _IOC_SIZE(cmd); > + char *data_ptr = NULL; > + int ret = 0; > + > + data_ptr = devm_kzalloc(aw_dev->dev, data_len, GFP_KERNEL); > + if (!data_ptr) > + return -ENOMEM; > + if (copy_from_user(data_ptr, (void __user *)arg, data_len)) { > + ret = -EFAULT; > + goto exit; > + } > + > + switch (cmd) { > + case AW_IOCTL_SET_CALI_RE: { > + aw_cali_store_cali_re(aw_dev, *((int32_t *)data_ptr)); > + } break; > + default:{ > + aw_dev_err(aw_dev->dev, "unsupported cmd %d", cmd); > + ret = -EINVAL; > + } break; > + } > + > +exit: > + devm_kfree(aw_dev->dev, data_ptr); > + data_ptr = NULL; > + return ret; > +} > + > +static int aw_cali_misc_ops_read(struct aw_device *aw_dev, > + unsigned int cmd, unsigned long arg) > +{ > + > + int16_t data_len = _IOC_SIZE(cmd); > + char *data_ptr = NULL; > + int32_t *data_32_ptr = NULL; > + int ret = 0; > + > + data_ptr = devm_kzalloc(aw_dev->dev, data_len, GFP_KERNEL); > + if (!data_ptr) > + return -ENOMEM; > + > + data_32_ptr = (int32_t *)data_ptr; > + switch (cmd) { > + case AW_IOCTL_GET_RE: { > + ret = aw_cali_svc_dev_cali_re(aw_dev, CALI_OPS_HMUTE); > + if (ret < 0) > + goto exit; > + > + ret = aw_cali_svc_get_dev_cali_val(aw_dev, GET_RE_TYPE, data_32_ptr); > + } break; > + case AW_IOCTL_GET_CALI_F0: { > + ret = aw_cali_svc_dev_cali_f0_q(aw_dev, CALI_OPS_NOISE); > + if (ret < 0) > + goto exit; > + > + ret = aw_cali_svc_get_dev_cali_val(aw_dev, GET_F0_TYPE, data_32_ptr); > + } break; > + case AW_IOCTL_GET_F0: { > + ret = aw_cali_svc_get_dev_f0(aw_dev, data_32_ptr); > + } break; > + case AW_IOCTL_GET_TE: { > + ret = aw883xx_cali_svc_get_dev_te(&aw_dev->cali_desc, data_32_ptr); > + } break; > + case AW_IOCTL_GET_REAL_R0: { > + ret = aw_cali_svc_get_dev_realtime_re(aw_dev, data_32_ptr); > + } break; > + case AW_IOCTL_GET_RE_RANGE: { > + ret = aw_cali_svc_get_dev_re_range(aw_dev, data_32_ptr); > + } break; > + default:{ > + aw_dev_err(aw_dev->dev, "unsupported cmd %d", cmd); > + ret = -EINVAL; > + } break; > + } > + > +exit: > + if (copy_to_user((void __user *)arg, > + data_ptr, data_len)) { > + ret = -EFAULT; > + } > + > + devm_kfree(aw_dev->dev, data_ptr); > + data_ptr = NULL; > + return ret; > +} > + > +static int aw_cali_misc_ops(struct aw_device *aw_dev, > + unsigned int cmd, unsigned long arg) > +{ > + int ret = 0; > + > + switch (cmd) { > + case AW_IOCTL_SET_CALI_RE: > + return aw_cali_misc_ops_write(aw_dev, cmd, arg); > + case AW_IOCTL_GET_F0: > + case AW_IOCTL_GET_CALI_F0: > + case AW_IOCTL_GET_RE: > + case AW_IOCTL_GET_REAL_R0: > + case AW_IOCTL_GET_TE: > + case AW_IOCTL_GET_RE_RANGE: > + return aw_cali_misc_ops_read(aw_dev, cmd, arg); > + default: > + aw_dev_err(aw_dev->dev, "unsupported cmd %d", cmd); > + ret = -EINVAL; > + break; > + } > + > + return ret; > +} > + > +static long aw_cali_misc_unlocked_ioctl(struct file *file, > + unsigned int cmd, unsigned long arg) > +{ > + int ret = 0; > + struct aw_device *aw_dev = NULL; > + > + if (((_IOC_TYPE(cmd)) != (AW_IOCTL_MAGIC))) { > + aw_pr_err(" cmd magic err"); > + return -EINVAL; > + } > + aw_dev = (struct aw_device *)file->private_data; > + ret = aw_cali_misc_ops(aw_dev, cmd, arg); > + if (ret < 0) > + return -EINVAL; > + return 0; > +} > + > +#ifdef CONFIG_COMPAT > +static long aw_cali_misc_compat_ioctl(struct file *file, > + unsigned int cmd, unsigned long arg) > +{ > + int ret = 0; > + struct aw_device *aw_dev = NULL; > + > + if (((_IOC_TYPE(cmd)) != (AW_IOCTL_MAGIC))) { > + aw_pr_err("cmd magic err"); > + return -EINVAL; > + } > + aw_dev = (struct aw_device *)file->private_data; > + ret = aw_cali_misc_ops(aw_dev, cmd, arg); > + if (ret < 0) > + return -EINVAL; > + > + > + return 0; > +} > +#endif > + > +static ssize_t aw_cali_misc_read(struct file *filp, char __user *buf, size_t size, loff_t *pos) > +{ > + int len = 0; > + int i, ret; > + struct aw_device *aw_dev = (struct aw_device *)filp->private_data; > + char local_buf[512] = { 0 }; > + uint32_t temp_data[AW_DEV_CH_MAX] = { 0 }; > + uint32_t re_value[AW_DEV_RE_RANGE] = { 0 }; > + > + aw_dev_info(aw_dev->dev, "enter"); > + > + if (*pos) { > + *pos = 0; > + return 0; > + } > + > + switch (g_msic_wr_flag) { > + case CALI_STR_SHOW_RE: { > + ret = aw_cali_svc_get_devs_cali_val(aw_dev, GET_RE_TYPE, temp_data, AW_DEV_CH_MAX); > + if (ret > 0) { > + for (i = 0; i < ret; i++) > + len += snprintf(local_buf+len, > + sizeof(local_buf)-len, > + "dev[%d]:%u ", > + i, temp_data[i]); > + > + len += snprintf(local_buf+len, sizeof(local_buf)-len, "\n"); > + } else { > + aw_dev_err(aw_dev->dev, "get re failed"); > + return -EINVAL; > + } > + } break; > + case CALI_STR_SHOW_R0: { > + ret = aw_cali_svc_get_devs_r0(aw_dev, temp_data, AW_DEV_CH_MAX); > + if (ret > 0) { > + for (i = 0; i < ret; i++) > + len += snprintf(local_buf+len, sizeof(local_buf)-len, > + "dev[%d]:%d ", i, temp_data[i]); > + len += snprintf(local_buf+len, sizeof(local_buf)-len, "\n"); > + } else { > + aw_dev_err(aw_dev->dev, "get r0 failed"); > + return -EINVAL; > + } > + } break; > + case CALI_STR_SHOW_CALI_F0: { > + ret = aw_cali_svc_get_devs_cali_val(aw_dev, GET_F0_TYPE, temp_data, AW_DEV_CH_MAX); > + if (ret > 0) { > + for (i = 0; i < ret; i++) > + len += snprintf(local_buf+len, sizeof(local_buf)-len, > + "dev[%d]:%d ", i, temp_data[i]); > + > + len += snprintf(local_buf+len, sizeof(local_buf)-len, "\n"); > + } else { > + aw_dev_err(aw_dev->dev, "get cali f0 failed"); > + return -EINVAL; > + } > + } break; > + case CALI_STR_SHOW_F0: { > + ret = aw_cali_svc_get_devs_f0(aw_dev, temp_data, AW_DEV_CH_MAX); > + if (ret > 0) { > + for (i = 0; i < ret; i++) > + len += snprintf(local_buf+len, sizeof(local_buf)-len, > + "dev[%d]:%d ", i, temp_data[i]); > + > + len += snprintf(local_buf+len, sizeof(local_buf) - len, "\n"); > + } else { > + aw_dev_err(aw_dev->dev, "get f0 failed"); > + return -EINVAL; > + } > + } break; > + case CALI_STR_SHOW_TE: { > + ret = aw_cali_svc_get_devs_te(aw_dev, temp_data, AW_DEV_CH_MAX); > + if (ret > 0) { > + for (i = 0; i < ret; i++) > + len += snprintf(local_buf+len, sizeof(local_buf)-len, > + "dev[%d]:%d ", i, temp_data[i]); > + len += snprintf(local_buf+len, sizeof(local_buf)-len, "\n"); > + } else { > + aw_dev_err(aw_dev->dev, "get te failed"); > + return -EINVAL; > + } > + } break; > + case CALI_STR_VER: { > + if (aw_dev->ops.aw_get_version) { > + len = aw_dev->ops.aw_get_version(local_buf, sizeof(local_buf)); > + if (len < 0) { > + aw_dev_err(aw_dev->dev, "get version failed"); > + return -EINVAL; > + } > + len += snprintf(local_buf+len, sizeof(local_buf) - len, "\n"); > + } else { > + aw_dev_err(aw_dev->dev, "get version is NULL"); > + return -EINVAL; > + } > + } break; > + case CALI_STR_SHOW_RE_RANGE: { > + ret = aw_cali_svc_get_devs_re_range(aw_dev, re_value, AW_DEV_CH_MAX); > + if (ret > 0) { > + for (i = 0; i < ret; i++) { > + len += snprintf(local_buf+len, sizeof(local_buf)-len, > + "dev[%d]:re_min:%d re_max:%d\n", > + i, re_value[RE_MIN_FLAG + i * RE_RANGE_NUM], > + re_value[RE_MAX_FLAG + i * RE_RANGE_NUM]); > + } > + } else { > + aw_dev_err(aw_dev->dev, "get re range failed"); > + return -EINVAL; > + } > + } break; > + default: { > + if (g_msic_wr_flag == CALI_STR_NONE) { > + aw_dev_info(aw_dev->dev, "please write cmd first"); > + } else { > + aw_dev_err(aw_dev->dev, "unsupported flag [%d]", g_msic_wr_flag); > + g_msic_wr_flag = CALI_STR_NONE; > + return -EINVAL; > + } > + return -EINVAL; > + } break; > + } > + > + if (copy_to_user((void __user *)buf, local_buf, len)) { > + aw_dev_err(aw_dev->dev, "copy_to_user error"); > + g_msic_wr_flag = CALI_STR_NONE; > + return -EFAULT; > + } > + > + g_msic_wr_flag = CALI_STR_NONE; > + *pos += len; > + return len; > + > +} > + > +static int aw_cali_misc_switch_dev(struct file *filp, struct aw_device *aw_dev, char *cmd_buf) > +{ > + int dev_select_num; > + struct list_head *dev_list = NULL; > + struct list_head *pos = NULL; > + struct aw_device *local_dev = NULL; > + int ret; > + > + if (cmd_buf == NULL) { > + aw_dev_err(aw_dev->dev, "cmd_buf is NULL"); > + return -EINVAL; > + } > + > + /*get sel dev str*/ > + sscanf(cmd_buf, "dev_sel:dev[%d]", &dev_select_num); > + > + if (dev_select_num >= AW_DEV_CH_MAX) { > + aw_dev_err(aw_dev->dev, "unsupport str [%s]", cmd_buf); > + return -EINVAL; > + } > + > + /*get dev list*/ > + ret = aw883xx_dev_get_list_head(&dev_list); > + if (ret) { > + aw_dev_err(aw_dev->dev, "get dev list failed"); > + return ret; > + } > + > + /*find sel dev*/ > + list_for_each(pos, dev_list) { > + local_dev = container_of(pos, struct aw_device, list_node); > + if (local_dev->channel == dev_select_num) { > + filp->private_data = (void *)local_dev; > + g_dev_select = dev_select_num; > + aw_dev_info(local_dev->dev, "switch to dev[%d]", dev_select_num); > + return 0; > + } > + } > + aw_dev_err(aw_dev->dev, " unsupport [%s]", cmd_buf); > + return -EINVAL; > +} > + > +static ssize_t aw_cali_misc_write(struct file *filp, > + const char __user *buf, > + size_t size, loff_t *pos) > +{ > + char *kernel_buf = NULL; > + struct aw_device *aw_dev = (struct aw_device *)filp->private_data; > + int ret = 0; > + > + aw_dev_info(aw_dev->dev, "enter, write size:%d", (int)size); > + kernel_buf = kzalloc(size + 1, GFP_KERNEL); > + if (kernel_buf == NULL) { > + aw_dev_err(aw_dev->dev, "kzalloc failed !"); > + return -ENOMEM; > + } > + > + if (copy_from_user(kernel_buf, > + (void __user *)buf, > + size)) { > + ret = -EFAULT; > + goto exit; > + } > + > + ret = aw_cali_svc_get_cmd_form_str(aw_dev, kernel_buf); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "upported cmd [%s]!", kernel_buf); > + ret = -EINVAL; > + goto exit; > + } > + > + switch (ret) { > + case CALI_STR_CALI_RE_F0: { > + ret = aw_cali_svc_cali_cmd(aw_dev, AW_CALI_CMD_RE_F0, > + is_single_cali, CALI_OPS_HMUTE|CALI_OPS_NOISE); > + } break; > + case CALI_STR_CALI_RE: { > + ret = aw_cali_svc_cali_cmd(aw_dev, AW_CALI_CMD_RE, > + is_single_cali, CALI_OPS_HMUTE); > + } break; > + case CALI_STR_CALI_F0: { > + ret = aw_cali_svc_cali_cmd(aw_dev, AW_CALI_CMD_F0, > + is_single_cali, CALI_OPS_HMUTE|CALI_OPS_NOISE); > + } break; > + case CALI_STR_SET_RE: { > + /*skip store_re*/ > + kernel_buf[size] = '\0'; > + ret = aw_cali_svc_set_devs_re_str(aw_dev, > + kernel_buf + strlen(cali_str[CALI_STR_SET_RE]) + 1); > + } break; > + case CALI_STR_DEV_SEL: { > + ret = aw_cali_misc_switch_dev(filp, aw_dev, kernel_buf); > + } break; > + case CALI_STR_SHOW_RE: /*show cali_re*/ > + case CALI_STR_SHOW_R0: /*show real r0*/ > + case CALI_STR_SHOW_CALI_F0: /*GET DEV CALI_F0*/ > + case CALI_STR_SHOW_F0: /*SHOW REAL F0*/ > + case CALI_STR_SHOW_TE: > + case CALI_STR_VER: > + case CALI_STR_SHOW_RE_RANGE: { > + g_msic_wr_flag = ret; > + ret = 0; > + } break; > + default: { > + aw_dev_err(aw_dev->dev, "unsupported [%s]!", kernel_buf); > + ret = -EINVAL; > + } break; > + }; > + > +exit: > + aw_dev_dbg(aw_dev->dev, "cmd [%s]!", kernel_buf); > + kfree(kernel_buf); > + kernel_buf = NULL; > + > + if (ret < 0) > + return -EINVAL; > + else > + return size; > +} > + > +static const struct file_operations aw_cali_misc_fops = { > + .owner = THIS_MODULE, > + .open = aw_cali_misc_open, > + .read = aw_cali_misc_read, > + .write = aw_cali_misc_write, > + .release = aw_cali_misc_release, > + .unlocked_ioctl = aw_cali_misc_unlocked_ioctl, > +#ifdef CONFIG_COMPAT > + .compat_ioctl = aw_cali_misc_compat_ioctl, > +#endif > +}; > + > +static struct miscdevice misc_cali = { > + .name = "aw_smartpa", > + .minor = MISC_DYNAMIC_MINOR, > + .fops = &aw_cali_misc_fops, > +}; > + > +static int aw_cali_misc_init(struct aw_device *aw_dev) > +{ > + int ret; > + > + mutex_lock(&g_cali_lock); > + if (g_misc_dev == NULL) { > + ret = misc_register(&misc_cali); > + if (ret) { > + aw_dev_err(aw_dev->dev, "misc register fail: %d\n", ret); > + mutex_unlock(&g_cali_lock); > + return -EINVAL; > + } > + g_misc_dev = &misc_cali; > + aw_dev_dbg(aw_dev->dev, "misc register success"); > + } else { > + aw_dev_dbg(aw_dev->dev, "misc already register"); > + } > + mutex_unlock(&g_cali_lock); > + > + return 0; > +} > + > +static void aw_cali_misc_deinit(struct aw_device *aw_dev) > +{ > + mutex_lock(&g_cali_lock); > + if (g_misc_dev) { > + misc_deregister(g_misc_dev); > + g_misc_dev = NULL; > + } > + mutex_unlock(&g_cali_lock); > + aw_dev_dbg(aw_dev->dev, " misc unregister done"); > +} > +/*****************************misc cali******************************************************/ > + > +static void aw_cali_parse_dt(struct aw_device *aw_dev) > +{ > + struct device_node *np = aw_dev->dev->of_node; > + int ret = -1; > + uint32_t cali_check = CALI_CHECK_DISABLE; > + struct aw_cali_desc *desc = &aw_dev->cali_desc; > + > + ret = of_property_read_u32(np, "aw-cali-check", &cali_check); > + if (ret < 0) { > + aw_dev_info(aw_dev->dev, " cali-check get failed ,default turn off"); > + cali_check = CALI_CHECK_DISABLE; > + } > + > + desc->cali_check_st = cali_check; > + aw_dev_info(aw_dev->dev, "cali check :%s", > + (desc->cali_check_st) ? "enable" : "disable"); > +} > + > +void aw883xx_cali_init(struct aw_cali_desc *cali_desc) > +{ > + struct aw_device *aw_dev = > + container_of(cali_desc, struct aw_device, cali_desc); > + > + memset(cali_desc, 0, sizeof(struct aw_cali_desc)); > + > + aw_cali_parse_dt(aw_dev); > + > + aw_cali_attr_init(aw_dev); > + > + aw_cali_class_attr_init(aw_dev); > + > + aw_cali_misc_init(aw_dev); > + > + cali_desc->cali_result = CALI_RESULT_NONE; > +} > + > +void aw883xx_cali_deinit(struct aw_cali_desc *cali_desc) > +{ > + struct aw_device *aw_dev = > + container_of(cali_desc, struct aw_device, cali_desc); > + > + aw_cali_attr_deinit(aw_dev); > + > + aw_cali_class_attr_deinit(aw_dev); > + > + aw_cali_misc_deinit(aw_dev); > +} > diff --git a/sound/soc/codecs/aw883xx/aw883xx_calib.h b/sound/soc/codecs/aw883xx/aw883xx_calib.h > new file mode 100644 > index 0000000..c20c319 > --- /dev/null > +++ b/sound/soc/codecs/aw883xx/aw883xx_calib.h > @@ -0,0 +1,154 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +/* > + * aw883xx.c -- ALSA Soc AW883XX codec support > + * > + * Copyright (c) 2020 AWINIC Technology CO., LTD > + * > + * Author: Bruce zhao <zhaolei(a)awinic.com> > + */ > + > +#ifndef __AW883XX_CALIBRATION_H__ > +#define __AW883XX_CALIBRATION_H__ > + > +/*#define AW_CALI_STORE_EXAMPLE*/ > + > +#define AW_CALI_STORE_EXAMPLE > +#define AW_ERRO_CALI_RE_VALUE (0) > +#define AW_ERRO_CALI_F0_VALUE (2600) > + > +#define AW_CALI_RE_DEFAULT_TIMER (3000) > +#define MSGS_SIZE (512) > +#define RESERVED_SIZE (252) > + > + > +#define AW_CALI_ALL_DEV (0xFFFFFFFF) > + > +#define AW_CALI_RE_MAX (15000) > +#define AW_CALI_RE_MIN (4000) > +#define AW_CALI_CFG_NUM (4) > +#define AW_CALI_F0_DATA_NUM (4) > +#define AW_CALI_READ_CNT_MAX (8) > +#define AW_CALI_DATA_SUM_RM (2) > +#define AW_DSP_RE_TO_SHOW_RE(re, shift) (((re) * (1000)) >> (shift)) > +#define AW_SHOW_RE_TO_DSP_RE(re, shift) (((re) << shift) / (1000)) > +#define AW_CALI_F0_TIME (5 * 1000) > +#define F0_READ_CNT_MAX (5) > +#define AW_FS_CFG_MAX (11) > +#define AW_DEV_CH_MAX (16) > +#define AW_DEV_RE_RANGE (RE_RANGE_NUM * AW_DEV_CH_MAX) > +#define AW_TE_CACL_VALUE(te, coil_alpha) ((int32_t)(((int32_t)te << 18) / (coil_alpha))) > +#define AW_RE_REALTIME_VALUE(re_cacl, te_cacl) \ > + ((re_cacl) + (int32_t)((int64_t)((te_cacl) * (re_cacl)) >> 14)) > + > +enum { > + CALI_CHECK_DISABLE = 0, > + CALI_CHECK_ENABLE = 1, > +}; > + > +enum { > + CALI_RESULT_NONE = 0, > + CALI_RESULT_NORMAL = 1, > + CALI_RESULT_ERROR = -1, > +}; > + > +enum { > + CALI_OPS_HMUTE = 0X0001, > + CALI_OPS_NOISE = 0X0002, > +}; > + > +enum { > + CALI_TYPE_RE = 0, > + CALI_TYPE_F0, > +}; > + > +enum{ > + AW_CALI_MODE_NONE = 0, > + AW_CALI_MODE_ATTR, > + AW_CALI_MODE_CLASS, > + AW_CALI_MODE_MISC, > + AW_CALI_MODE_MAX > +}; > + > +enum { > + GET_RE_TYPE = 0, > + GET_F0_TYPE, > + GET_Q_TYPE, > +}; > + > +enum { > + AW_CALI_CMD_RE = 0, > + AW_CALI_CMD_F0, > + AW_CALI_CMD_RE_F0, > + AW_CALI_CMD_F0_Q, > + AW_CALI_CMD_RE_F0_Q, > +}; > + > +enum { > + CALI_STR_NONE = 0, > + CALI_STR_CALI_RE_F0, > + CALI_STR_CALI_RE, > + CALI_STR_CALI_F0, > + CALI_STR_SET_RE, > + CALI_STR_SHOW_RE, /*show cali_re*/ > + CALI_STR_SHOW_R0, /*show real r0*/ > + CALI_STR_SHOW_CALI_F0, /*GET DEV CALI_F0*/ > + CALI_STR_SHOW_F0, /*SHOW REAL F0*/ > + CALI_STR_SHOW_TE, > + CALI_STR_DEV_SEL, /*switch device*/ > + CALI_STR_VER, > + CALI_STR_SHOW_RE_RANGE, > + CALI_STR_MAX, > +}; > + > +enum { > + RE_MIN_FLAG = 0, > + RE_MAX_FLAG = 1, > + RE_RANGE_NUM = 2, > +}; > + > +struct re_data { > + uint32_t re_range[2]; > +}; > + > + > +#define AW_IOCTL_MAGIC 'a' > + > +#define AW_IOCTL_GET_F0 _IOWR(AW_IOCTL_MAGIC, 5, int32_t) > +#define AW_IOCTL_SET_CALI_RE _IOWR(AW_IOCTL_MAGIC, 6, int32_t) > + > +#define AW_IOCTL_GET_RE _IOWR(AW_IOCTL_MAGIC, 17, int32_t) > +#define AW_IOCTL_GET_CALI_F0 _IOWR(AW_IOCTL_MAGIC, 18, int32_t) > +#define AW_IOCTL_GET_REAL_R0 _IOWR(AW_IOCTL_MAGIC, 19, int32_t) > +#define AW_IOCTL_GET_TE _IOWR(AW_IOCTL_MAGIC, 20, int32_t) > +#define AW_IOCTL_GET_RE_RANGE _IOWR(AW_IOCTL_MAGIC, 21, struct re_data) > + > +struct cali_cfg { > + uint32_t data[AW_CALI_CFG_NUM]; > +}; > + > + > +struct aw_cali_desc { > + bool status; > + struct cali_cfg cali_cfg; > + uint16_t store_vol; > + uint32_t cali_re; /*cali value*/ > + uint32_t f0; > + uint32_t q; > + uint32_t ra; > + int8_t cali_result; > + uint8_t cali_check_st; > +}; > + > +void aw883xx_cali_init(struct aw_cali_desc *cali_desc); > +void aw883xx_cali_deinit(struct aw_cali_desc *cali_desc); > +bool aw883xx_cali_svc_get_cali_status(struct aw_cali_desc *cali_desc); > +int aw883xx_cali_svc_set_cali_re_to_dsp(struct aw_cali_desc *cali_desc); > +int aw883xx_cali_svc_get_ra(struct aw_cali_desc *cali_desc); > +int aw883xx_cali_svc_get_dev_te(struct aw_cali_desc *cali_desc, int32_t *te); > +int aw883xx_cali_get_cali_re(struct aw_cali_desc *cali_desc); > +int aw883xx_cali_read_cali_re_from_dsp(struct aw_cali_desc *cali_desc, uint32_t *re); > +bool aw883xx_cali_check_result(struct aw_cali_desc *cali_desc); > + > +#endif > + > + > diff --git a/sound/soc/codecs/aw883xx/aw883xx_data_type.h b/sound/soc/codecs/aw883xx/aw883xx_data_type.h > new file mode 100644 > index 0000000..b21f938 > --- /dev/null > +++ b/sound/soc/codecs/aw883xx/aw883xx_data_type.h > @@ -0,0 +1,157 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +/* > + * aw883xx.c -- ALSA Soc AW883XX codec support > + * > + * Copyright (c) 2020 AWINIC Technology CO., LTD > + * > + * Author: Bruce zhao <zhaolei(a)awinic.com> > + */ > + > +#ifndef __AW883XX_DATA_TYPE_H__ > +#define __AW883XX_DATA_TYPE_H__ > + > +#define AW_NAME_BUF_MAX (50) > + > + > +/* > + * aw profile > + */ > +#define PROJECT_NAME_MAX (24) > +#define CUSTOMER_NAME_MAX (16) > +#define CFG_VERSION_MAX (4) > +#define DEV_NAME_MAX (16) > +#define PROFILE_STR_MAX (32) > + > +#define ACF_FILE_ID (0xa15f908) > + > +struct aw_msg_hdr { > + int32_t type; > + int32_t opcode_id; > + int32_t version; > + int32_t reseriver[3]; > +}; > + > +enum aw_cfg_hdr_version { > + AW_CFG_HDR_VER_0_0_0_1 = 0x00000001, > + AW_CFG_HDR_VER_1_0_0_0 = 0x01000000, > +}; > + > +enum aw_cfg_dde_type { > + AW_DEV_NONE_TYPE_ID = 0xFFFFFFFF, > + AW_DEV_TYPE_ID = 0x00000000, > + AW_SKT_TYPE_ID = 0x00000001, > + AW_DEV_DEFAULT_TYPE_ID = 0x00000002, > +}; > + > +enum aw_sec_type { > + ACF_SEC_TYPE_REG = 0, > + ACF_SEC_TYPE_DSP, > + ACF_SEC_TYPE_DSP_CFG, > + ACF_SEC_TYPE_DSP_FW, > + ACF_SEC_TYPE_HDR_REG, > + ACF_SEC_TYPE_HDR_DSP_CFG, > + ACF_SEC_TYPE_HDR_DSP_FW, > + ACF_SEC_TYPE_MUTLBIN, > + ACF_SEC_TYPE_SKT_PROJECT, > + ACF_SEC_TYPE_DSP_PROJECT, > + ACF_SEC_TYPE_MONITOR, > + ACF_SEC_TYPE_MAX, > +}; > + > +enum profile_data_type { > + AW_DATA_TYPE_REG = 0, > + AW_DATA_TYPE_DSP_CFG, > + AW_DATA_TYPE_DSP_FW, > + AW_DATA_TYPE_MAX, > +}; > + > +enum aw_prof_type { > + AW_PROFILE_MUSIC = 0, > + AW_PROFILE_VOICE, > + AW_PROFILE_VOIP, > + AW_PROFILE_RINGTONE, > + AW_PROFILE_RINGTONE_HS, > + AW_PROFILE_LOWPOWER, > + AW_PROFILE_BYPASS, > + AW_PROFILE_MMI, > + AW_PROFILE_FM, > + AW_PROFILE_NOTIFICATION, > + AW_PROFILE_RECEIVER, > + AW_PROFILE_MAX, > +}; > + > +enum aw_profile_status { > + AW_PROFILE_WAIT = 0, > + AW_PROFILE_OK, > +}; > + > +struct aw_cfg_hdr { > + uint32_t a_id; /*acf file ID 0xa15f908*/ > + char a_project[PROJECT_NAME_MAX]; /*project name*/ > + char a_custom[CUSTOMER_NAME_MAX]; /*custom name :huawei xiaomi vivo oppo*/ > + char a_version[CFG_VERSION_MAX]; /*author update version*/ > + uint32_t a_author_id; /*author id*/ > + uint32_t a_ddt_size; /*sub section table entry size*/ > + uint32_t a_ddt_num; /*sub section table entry num*/ > + uint32_t a_hdr_offset; /*sub section table offset in file*/ > + uint32_t a_hdr_version; /*sub section table version*/ > + uint32_t reserve[3]; > +}; > + > +struct aw_cfg_dde { > + uint32_t type; /*DDE type id*/ > + char dev_name[DEV_NAME_MAX]; > + uint16_t dev_index; /*dev id*/ > + uint16_t dev_bus; /*dev bus id*/ > + uint16_t dev_addr; /*dev addr id*/ > + uint16_t dev_profile; /*dev profile id*/ > + uint32_t data_type; /*data type id*/ > + uint32_t data_size; > + uint32_t data_offset; > + uint32_t data_crc; > + uint32_t reserve[5]; > +}; > + > +struct aw_cfg_dde_v_1_0_0_0 { > + uint32_t type; /*DDE type id*/ > + char dev_name[DEV_NAME_MAX]; > + uint16_t dev_index; /*dev id*/ > + uint16_t dev_bus; /*dev bus id*/ > + uint16_t dev_addr; /*dev addr id*/ > + uint16_t dev_profile; /*dev profile id*/ > + uint32_t data_type; /*data type id*/ > + uint32_t data_size; > + uint32_t data_offset; > + uint32_t data_crc; > + char dev_profile_str[PROFILE_STR_MAX]; > + uint32_t chip_id; > + uint32_t reserve[4]; > +}; > + > +struct aw_sec_data_desc { > + uint32_t len; > + unsigned char *data; > +}; > + > +struct aw_prof_desc { > + uint32_t id; > + uint32_t prof_st; > + char *prf_str; > + uint32_t fw_ver; > + struct aw_sec_data_desc sec_desc[AW_DATA_TYPE_MAX]; > +}; > + > +struct aw_all_prof_info { > + struct aw_prof_desc prof_desc[AW_PROFILE_MAX]; > +}; > + > +struct aw_prof_info { > + int count; > + int prof_type; > + char **prof_name_list; > + struct aw_prof_desc *prof_desc; > +}; > + > + > +#endif > + > diff --git a/sound/soc/codecs/aw883xx/aw883xx_device.c b/sound/soc/codecs/aw883xx/aw883xx_device.c > new file mode 100644 > index 0000000..681d9e5 > --- /dev/null > +++ b/sound/soc/codecs/aw883xx/aw883xx_device.c > @@ -0,0 +1,1734 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * aw883xx.c -- ALSA Soc AW883XX codec support > + * > + * Copyright (c) 2020 AWINIC Technology CO., LTD > + * > + * Author: Bruce zhao <zhaolei(a)awinic.com> > + */ > + > +#include <linux/module.h> > +#include <linux/i2c.h> > +#include <sound/core.h> > +#include <sound/pcm.h> > +#include <sound/pcm_params.h> > +#include <sound/soc.h> > +#include <linux/of_gpio.h> > +#include <linux/delay.h> > +#include <linux/device.h> > +#include <linux/firmware.h> > +#include <linux/debugfs.h> > +#include <linux/version.h> > +#include <linux/workqueue.h> > +#include <linux/syscalls.h> > +#include <sound/control.h> > +#include <linux/uaccess.h> > + > +#include "aw883xx_data_type.h" > +#include "aw883xx_log.h" > +#include "aw883xx_device.h" > +#include "aw883xx_bin_parse.h" > +#include "aw883xx_calib.h" > + > +#define AW_DEV_SYSST_CHECK_MAX (10) > + > +enum { > + AW_EXT_DSP_WRITE_NONE = 0, > + AW_EXT_DSP_WRITE, > +}; > + > +static unsigned int g_fade_in_time = AW_1000_US / 10; > +static unsigned int g_fade_out_time = AW_1000_US >> 1; > +static LIST_HEAD(g_dev_list); > +static DEFINE_MUTEX(g_dev_lock); > + > +static int aw_dev_reg_dump(struct aw_device *aw_dev) > +{ > + int reg_num = aw_dev->ops.aw_get_reg_num(); > + uint8_t i = 0; > + uint16_t reg_val = 0; > + > + for (i = 0; i < reg_num; i++) { > + if (aw_dev->ops.aw_check_rd_access(i)) { > + aw_dev->ops.aw_reg_read(aw_dev, i, &reg_val); > + aw_dev_info(aw_dev->dev, "read: reg = 0x%02x, val = 0x%04x", > + i, reg_val); > + } > + } > + > + return 0; > +} > + > +int aw883xx_dev_set_volume(struct aw_device *aw_dev, uint16_t set_vol) > +{ > + uint16_t hw_vol = 0; > + int ret = -1; > + struct aw_volume_desc *vol_desc = &aw_dev->volume_desc; > + > + hw_vol = set_vol + vol_desc->init_volume; > + > + ret = aw_dev->ops.aw_set_hw_volume(aw_dev, hw_vol); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "set volume failed"); > + return ret; > + } > + > + return 0; > +} > + > +int aw883xx_dev_get_volume(struct aw_device *aw_dev, uint16_t *get_vol) > +{ > + int ret = -1; > + uint16_t hw_vol = 0; > + struct aw_volume_desc *vol_desc = &aw_dev->volume_desc; > + > + ret = aw_dev->ops.aw_get_hw_volume(aw_dev, &hw_vol); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "read volume failed"); > + return ret; > + } > + > + *get_vol = hw_vol - vol_desc->init_volume; > + > + return 0; > +} > + > +static void aw_dev_fade_in(struct aw_device *aw_dev) > +{ > + int i = 0; > + struct aw_volume_desc *desc = &aw_dev->volume_desc; > + int fade_step = aw_dev->fade_step; > + uint16_t fade_in_vol = desc->ctl_volume; > + > + if (!aw_dev->fade_en) > + return; > + > + if (fade_step == 0 || g_fade_in_time == 0) { > + aw883xx_dev_set_volume(aw_dev, fade_in_vol); > + return; > + } > + /*volume up*/ > + for (i = desc->mute_volume; i >= fade_in_vol; i -= fade_step) { > + aw883xx_dev_set_volume(aw_dev, i); > + usleep_range(g_fade_in_time, g_fade_in_time + 10); > + } > + if (i != fade_in_vol) > + aw883xx_dev_set_volume(aw_dev, fade_in_vol); > + > +} > + > +static void aw_dev_fade_out(struct aw_device *aw_dev) > +{ > + int i = 0; > + struct aw_volume_desc *desc = &aw_dev->volume_desc; > + int fade_step = aw_dev->fade_step; > + > + if (!aw_dev->fade_en) > + return; > + > + if (fade_step == 0 || g_fade_out_time == 0) { > + aw883xx_dev_set_volume(aw_dev, desc->mute_volume); > + return; > + } > + > + for (i = desc->ctl_volume; i <= desc->mute_volume; i += fade_step) { > + aw883xx_dev_set_volume(aw_dev, i); > + usleep_range(g_fade_out_time, g_fade_out_time + 10); > + } > + if (i != desc->mute_volume) { > + aw883xx_dev_set_volume(aw_dev, desc->mute_volume); > + usleep_range(g_fade_out_time, g_fade_out_time + 10); > + } > +} > + > +int aw883xx_dev_get_fade_vol_step(struct aw_device *aw_dev) > +{ > + return aw_dev->fade_step; > +} > + > +void aw883xx_dev_set_fade_vol_step(struct aw_device *aw_dev, unsigned int step) > +{ > + aw_dev->fade_step = step; > +} > + > +void aw883xx_dev_get_fade_time(unsigned int *time, bool fade_in) > +{ > + if (fade_in) > + *time = g_fade_in_time; > + else > + *time = g_fade_out_time; > +} > + > +void aw883xx_dev_set_fade_time(unsigned int time, bool fade_in) > +{ > + if (fade_in) > + g_fade_in_time = time; > + else > + g_fade_out_time = time; > +} > + > +static uint64_t aw_dev_dsp_crc32_reflect(uint64_t ref, uint8_t ch) > +{ > + int i; > + uint64_t value = 0; > + > + for (i = 1; i < (ch + 1); i++) { > + if (ref & 1) > + value |= 1 << (ch - i); > + > + ref >>= 1; > + } > + > + return value; > +} > + > +static uint32_t aw_dev_calc_dsp_cfg_crc32(uint8_t *buf, uint32_t len) > +{ > + uint8_t i; > + uint32_t crc = 0xffffffff; > + > + while (len--) { > + for (i = 1; i != 0; i <<= 1) { > + if ((crc & 0x80000000) != 0) { > + crc <<= 1; > + crc ^= 0x1EDC6F41; > + } else { > + crc <<= 1; > + } > + > + if ((*buf & i) != 0) > + crc ^= 0x1EDC6F41; > + } > + buf++; > + } > + > + return (aw_dev_dsp_crc32_reflect(crc, 32)^0xffffffff); > +} > + > +static int aw_dev_set_dsp_crc32(struct aw_device *aw_dev) > +{ > + uint32_t crc_value = 0; > + uint32_t crc_data_len = 0; > + int ret = -1; > + struct aw_sec_data_desc *crc_dsp_cfg = &aw_dev->crc_dsp_cfg; > + struct aw_dsp_crc_desc *desc = &aw_dev->dsp_crc_desc; > + > + /*get crc data len*/ > + crc_data_len = (desc->dsp_reg - aw_dev->dsp_mem_desc.dsp_cfg_base_addr) * 2; > + if (crc_data_len > crc_dsp_cfg->len) { > + aw_dev_err(aw_dev->dev, "crc data len :%d > cfg_data len:%d", > + crc_data_len, crc_dsp_cfg->len); > + return -EINVAL; > + } > + > + if (crc_data_len % 4 != 0) { > + aw_dev_err(aw_dev->dev, "The crc data len :%d unsupport", crc_data_len); > + return -EINVAL; > + } > + > + crc_value = aw_dev_calc_dsp_cfg_crc32(crc_dsp_cfg->data, crc_data_len); > + > + aw_dev_info(aw_dev->dev, "crc_value:0x%x", crc_value); > + ret = aw_dev->ops.aw_dsp_write(aw_dev, desc->dsp_reg, crc_value, > + desc->data_type); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "set dsp crc value failed"); > + return ret; > + } > + > + return 0; > +} > + > +static int aw_dev_dsp_crc_check_enable(struct aw_device *aw_dev, bool flag) > +{ > + struct aw_dsp_crc_desc *dsp_crc_desc = &aw_dev->dsp_crc_desc; > + int ret; > + > + aw_dev_info(aw_dev->dev, "enter,flag:%d", flag); > + if (flag) { > + ret = aw_dev->ops.aw_reg_write_bits(aw_dev, dsp_crc_desc->ctl_reg, > + dsp_crc_desc->ctl_mask, dsp_crc_desc->ctl_enable); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "enable dsp crc failed"); > + return ret; > + } > + } else { > + ret = aw_dev->ops.aw_reg_write_bits(aw_dev, dsp_crc_desc->ctl_reg, > + dsp_crc_desc->ctl_mask, dsp_crc_desc->ctl_disable); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "close dsp crc failed"); > + return ret; > + } > + } > + > + return 0; > +} > + > + > +static int aw_dev_dsp_st_check(struct aw_device *aw_dev) > +{ > + struct aw_sysst_desc *desc = &aw_dev->sysst_desc; > + int ret = -1; > + uint16_t reg_val = 0; > + int i; > + > + for (i = 0; i < AW_DSP_ST_CHECK_MAX; i++) { > + ret = aw_dev->ops.aw_reg_read(aw_dev, desc->reg, &reg_val); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "read reg0x%x failed", desc->reg); > + continue; > + } > + > + if ((reg_val & (~desc->dsp_mask)) != desc->dsp_check) { > + aw_dev_err(aw_dev->dev, "check dsp st fail,reg_val:0x%04x", reg_val); > + ret = -EINVAL; > + continue; > + } else { > + aw_dev_info(aw_dev->dev, "dsp st check ok, reg_val:0x%04x", reg_val); > + return 0; > + } > + } > + > + return ret; > +} > + > +static int aw_dev_dsp_crc32_check(struct aw_device *aw_dev) > +{ > + int ret; > + > + if (aw_dev->dsp_cfg == AW_DEV_DSP_BYPASS) { > + aw_dev_info(aw_dev->dev, "dsp bypass"); > + return 0; > + } > + > + ret = aw_dev_set_dsp_crc32(aw_dev); > + if (ret < 0) { > + aw_dev_info(aw_dev->dev, "set dsp crc32 failed"); > + return ret; > + } > + > + aw_dev_dsp_crc_check_enable(aw_dev, true); > + > + /*dsp enable*/ > + aw883xx_dev_dsp_enable(aw_dev, true); > + usleep_range(AW_5000_US, AW_5000_US + 100); > + > + ret = aw_dev_dsp_st_check(aw_dev); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "check crc32 fail"); > + return ret; > + } > + > + aw_dev_dsp_crc_check_enable(aw_dev, false); > + aw_dev->dsp_crc_st = AW_DSP_CRC_OK; > + return 0; > +} > + > +static void aw_dev_pwd(struct aw_device *aw_dev, bool pwd) > +{ > + struct aw_pwd_desc *pwd_desc = &aw_dev->pwd_desc; > + > + aw_dev_dbg(aw_dev->dev, "enter"); > + > + if (pwd) { > + aw_dev->ops.aw_reg_write_bits(aw_dev, pwd_desc->reg, > + pwd_desc->mask, > + pwd_desc->enable); > + } else { > + aw_dev->ops.aw_reg_write_bits(aw_dev, pwd_desc->reg, > + pwd_desc->mask, > + pwd_desc->disable); > + } > + aw_dev_info(aw_dev->dev, "done"); > +} > + > +static void aw_dev_amppd(struct aw_device *aw_dev, bool amppd) > +{ > + struct aw_amppd_desc *amppd_desc = &aw_dev->amppd_desc; > + > + aw_dev_dbg(aw_dev->dev, "enter"); > + if (amppd) { > + aw_dev->ops.aw_reg_write_bits(aw_dev, amppd_desc->reg, > + amppd_desc->mask, > + amppd_desc->enable); > + } else { > + aw_dev->ops.aw_reg_write_bits(aw_dev, amppd_desc->reg, > + amppd_desc->mask, > + amppd_desc->disable); > + } > + aw_dev_info(aw_dev->dev, "done"); > +} > + > + > +void aw883xx_dev_mute(struct aw_device *aw_dev, bool mute) > +{ > + struct aw_mute_desc *mute_desc = &aw_dev->mute_desc; > + > + aw_dev_dbg(aw_dev->dev, "enter"); > + if (mute) { > + aw_dev_fade_out(aw_dev); > + aw_dev->ops.aw_reg_write_bits(aw_dev, mute_desc->reg, > + mute_desc->mask, mute_desc->enable); > + } else { > + aw_dev->ops.aw_reg_write_bits(aw_dev, mute_desc->reg, > + mute_desc->mask, mute_desc->disable); > + aw_dev_fade_in(aw_dev); > + } > + aw_dev_info(aw_dev->dev, "done"); > +} > + > +int aw883xx_dev_get_hmute(struct aw_device *aw_dev) > +{ > + uint16_t reg_val = 0; > + int ret; > + struct aw_mute_desc *desc = &aw_dev->mute_desc; > + > + aw_dev_dbg(aw_dev->dev, "enter"); > + > + ret = aw_dev->ops.aw_reg_read(aw_dev, desc->reg, &reg_val); > + if (ret < 0) > + return ret; > + > + if (reg_val & (~desc->mask)) > + ret = 1; > + else > + ret = 0; > + > + return ret; > +} > + > +static int aw_dev_get_icalk(struct aw_device *aw_dev, int16_t *icalk) > +{ > + int ret = -1; > + uint16_t reg_val = 0; > + uint16_t reg_icalk = 0; > + struct aw_vcalb_desc *desc = &aw_dev->vcalb_desc; > + > + ret = aw_dev->ops.aw_reg_read(aw_dev, desc->icalk_reg, &reg_val); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "reg read failed"); > + return ret; > + } > + > + reg_icalk = reg_val & (~desc->icalk_reg_mask); > + > + if (reg_icalk & (~desc->icalk_sign_mask)) > + reg_icalk = reg_icalk | desc->icalk_neg_mask; > + > + *icalk = (int16_t)reg_icalk; > + > + return 0; > +} > + > +static int aw_dev_get_vcalk(struct aw_device *aw_dev, int16_t *vcalk) > +{ > + int ret = -1; > + uint16_t reg_val = 0; > + uint16_t reg_vcalk = 0; > + struct aw_vcalb_desc *desc = &aw_dev->vcalb_desc; > + > + ret = aw_dev->ops.aw_reg_read(aw_dev, desc->vcalk_reg, &reg_val); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "reg read failed"); > + return ret; > + } > + > + reg_val = reg_val >> desc->vcalk_shift; > + > + reg_vcalk = (uint16_t)reg_val & (~desc->vcalk_reg_mask); > + > + if (reg_vcalk & (~desc->vcalk_sign_mask)) > + reg_vcalk = reg_vcalk | desc->vcalk_neg_mask; > + > + *vcalk = (int16_t)reg_vcalk; > + > + return 0; > +} > + > +static int aw_dev_get_vcalk_dac(struct aw_device *aw_dev, int16_t *vcalk) > +{ > + int ret = -1; > + uint16_t reg_val = 0; > + uint16_t reg_vcalk = 0; > + struct aw_vcalb_desc *desc = &aw_dev->vcalb_desc; > + > + ret = aw_dev->ops.aw_reg_read(aw_dev, desc->icalk_reg, &reg_val); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "reg read failed"); > + return ret; > + } > + > + reg_vcalk = reg_val >> desc->vcalk_dac_shift; > + > + if (reg_vcalk & desc->vcalk_dac_mask) > + reg_vcalk = reg_vcalk | desc->vcalk_dac_neg_mask; > + > + *vcalk = (int16_t)reg_vcalk; > + > + return 0; > +} > + > +int aw883xx_dev_modify_dsp_cfg(struct aw_device *aw_dev, > + unsigned int addr, uint32_t dsp_data, unsigned char data_type) > +{ > + uint32_t addr_offset = 0; > + int len = 0; > + uint8_t temp_data[4] = { 0 }; > + struct aw_sec_data_desc *crc_dsp_cfg = &aw_dev->crc_dsp_cfg; > + > + aw_dev_dbg(aw_dev->dev, "addr:0x%x, dsp_data:0x%x", addr, dsp_data); > + if (data_type == AW_DSP_16_DATA) { > + temp_data[0] = (uint8_t)(dsp_data & 0x00ff); > + temp_data[1] = (uint8_t)((dsp_data & 0xff00) >> 8); > + len = 2; > + } else if (data_type == AW_DSP_32_DATA) { > + temp_data[0] = (uint8_t)(dsp_data & 0x000000ff); > + temp_data[1] = (uint8_t)((dsp_data & 0x0000ff00) >> 8); > + temp_data[2] = (uint8_t)((dsp_data & 0x00ff0000) >> 16); > + temp_data[3] = (uint8_t)((dsp_data & 0xff000000) >> 24); > + len = 4; > + } else { > + aw_dev_err(aw_dev->dev, "data type[%d] unsupported", data_type); > + return -EINVAL; > + } > + > + addr_offset = (addr - aw_dev->dsp_mem_desc.dsp_cfg_base_addr) * 2; > + if (addr_offset > crc_dsp_cfg->len) { > + aw_dev_err(aw_dev->dev, "addr_offset[%d] > crc_dsp_cfg->len[%d]", > + addr_offset, crc_dsp_cfg->len); > + return -EINVAL; > + } > + > + memcpy(crc_dsp_cfg->data + addr_offset, temp_data, len); > + return 0; > +} > + > +static int aw_dev_vsense_select(struct aw_device *aw_dev, int *vsense_select) > +{ > + int ret = -1; > + struct aw_vcalb_desc *desc = &aw_dev->vcalb_desc; > + uint16_t vsense_reg_val; > + > + ret = aw_dev->ops.aw_reg_read(aw_dev, desc->vcalb_vsense_reg, &vsense_reg_val); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "read vsense_reg_val failed"); > + return ret; > + } > + aw_dev_dbg(aw_dev->dev, "vsense_reg = 0x%x", vsense_reg_val); > + > + if (vsense_reg_val & (~desc->vcalk_vdsel_mask)) { > + *vsense_select = AW_DEV_VDSEL_VSENSE; > + aw_dev_info(aw_dev->dev, "vsense outside"); > + return 0; > + } > + > + *vsense_select = AW_DEV_VDSEL_DAC; > + aw_dev_info(aw_dev->dev, "vsense inside"); > + return 0; > +} > + > +static int aw_dev_set_vcalb(struct aw_device *aw_dev) > +{ > + int ret = -1; > + uint32_t reg_val = 0; > + int vcalb; > + int icalk; > + int vcalk; > + int16_t icalk_val = 0; > + int16_t vcalk_val = 0; > + struct aw_vcalb_desc *desc = &aw_dev->vcalb_desc; > + uint32_t vcalb_adj; > + int vsense_select = -1; > + > + ret = aw_dev->ops.aw_dsp_read(aw_dev, desc->vcalb_dsp_reg, &vcalb_adj, desc->data_type); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "read vcalb_adj failed"); > + return ret; > + } > + > + ret = aw_dev_vsense_select(aw_dev, &vsense_select); > + if (ret < 0) > + return ret; > + aw_dev_dbg(aw_dev->dev, "vsense_select = %d", vsense_select); > + > + ret = aw_dev_get_icalk(aw_dev, &icalk_val); > + if (ret < 0) > + return ret; > + icalk = desc->cabl_base_value + desc->icalk_value_factor * icalk_val; > + > + if (vsense_select == AW_DEV_VDSEL_VSENSE) { > + ret = aw_dev_get_vcalk(aw_dev, &vcalk_val); > + if (ret < 0) > + return ret; > + vcalk = desc->cabl_base_value + desc->vcalk_value_factor * vcalk_val; > + vcalb = desc->vcal_factor * desc->vscal_factor / > + desc->iscal_factor * icalk / vcalk * vcalb_adj; > + > + aw_dev_dbg(aw_dev->dev, "vcalk_factor=%d, vscal_factor=%d, icalk=%d, vcalk=%d", > + desc->vcalk_value_factor, desc->vscal_factor, icalk, vcalk); > + } else if (vsense_select == AW_DEV_VDSEL_DAC) { > + ret = aw_dev_get_vcalk_dac(aw_dev, &vcalk_val); > + if (ret < 0) > + return ret; > + vcalk = desc->cabl_base_value + desc->vcalk_value_factor_vsense_in * vcalk_val; > + vcalb = desc->vcal_factor * desc->vscal_factor_vsense_in / > + desc->iscal_factor * icalk / vcalk * vcalb_adj; > + > + aw_dev_dbg(aw_dev->dev, "vcalk_dac_factor=%d, vscal_dac_factor=%d, icalk=%d, vcalk=%d", > + desc->vcalk_value_factor_vsense_in, > + desc->vscal_factor_vsense_in, icalk, vcalk); > + } else { > + aw_dev_err(aw_dev->dev, "unsupport vsense status"); > + return -EINVAL; > + } > + > + if ((vcalk == 0) || (desc->iscal_factor == 0)) { > + aw_dev_err(aw_dev->dev, "vcalk:%d or desc->iscal_factor:%d unsupported", > + vcalk, desc->iscal_factor); > + return -EINVAL; > + } > + > + vcalb = vcalb >> aw_dev->vcalb_desc.vcalb_adj_shift; > + reg_val = (uint32_t)vcalb; > + > + aw_dev_dbg(aw_dev->dev, "vcalb=%d, reg_val=0x%x, vcalb_adj =0x%x", > + vcalb, reg_val, vcalb_adj); > + > + ret = aw_dev->ops.aw_dsp_write(aw_dev, desc->vcalb_dsp_reg, reg_val, desc->data_type); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "write vcalb failed"); > + return ret; > + } > + > + ret = aw883xx_dev_modify_dsp_cfg(aw_dev, desc->vcalb_dsp_reg, > + (uint32_t)reg_val, desc->data_type); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "modify dsp cfg failed"); > + return ret; > + } > + > + aw_dev_info(aw_dev->dev, "done"); > + > + return 0; > +} > + > +static int aw_dev_get_cali_f0_delay(struct aw_device *aw_dev) > +{ > + struct aw_cali_delay_desc *desc = &aw_dev->cali_delay_desc; > + uint32_t cali_delay = 0; > + int ret = -1; > + > + ret = aw_dev->ops.aw_dsp_read(aw_dev, > + desc->dsp_reg, &cali_delay, desc->data_type); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "read cali delay failed, ret=%d", ret); > + return ret; > + } > + > + desc->delay = AW_CALI_DELAY_CACL(cali_delay); > + aw_dev_info(aw_dev->dev, "read cali delay: %d ms", desc->delay); > + > + return 0; > +} > + > +int aw883xx_dev_get_int_status(struct aw_device *aw_dev, uint16_t *int_status) > +{ > + int ret = -1; > + uint16_t reg_val = 0; > + > + ret = aw_dev->ops.aw_reg_read(aw_dev, aw_dev->int_desc.st_reg, &reg_val); > + if (ret < 0) > + aw_dev_err(aw_dev->dev, "read interrupt reg fail, ret=%d", ret); > + else > + *int_status = reg_val; > + > + aw_dev_dbg(aw_dev->dev, "read interrupt reg = 0x%04x", *int_status); > + return ret; > +} > + > +void aw883xx_dev_clear_int_status(struct aw_device *aw_dev) > +{ > + uint16_t int_status = 0; > + > + /*read int status and clear*/ > + aw883xx_dev_get_int_status(aw_dev, &int_status); > + /*make sure int status is clear*/ > + aw883xx_dev_get_int_status(aw_dev, &int_status); > + aw_dev_info(aw_dev->dev, "done"); > +} > + > + > +int aw883xx_dev_get_iis_status(struct aw_device *aw_dev) > +{ > + int ret = -1; > + uint16_t reg_val = 0; > + struct aw_sysst_desc *desc = &aw_dev->sysst_desc; > + > + aw_dev_dbg(aw_dev->dev, "enter"); > + > + aw_dev->ops.aw_reg_read(aw_dev, desc->reg, &reg_val); > + if ((reg_val & desc->pll_check) == desc->pll_check) > + ret = 0; > + else > + aw_dev_err(aw_dev->dev, "check pll lock fail,reg_val:0x%04x", reg_val); > + > + return ret; > +} > + > + > +static int aw_dev_mode1_pll_check(struct aw_device *aw_dev) > +{ > + int ret = -1; > + uint16_t i = 0; > + > + for (i = 0; i < AW_DEV_SYSST_CHECK_MAX; i++) { > + ret = aw883xx_dev_get_iis_status(aw_dev); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "mode1 iis signal check error"); > + usleep_range(AW_2000_US, AW_2000_US + 10); > + } else { > + return 0; > + } > + } > + > + return ret; > +} > + > +static int aw_dev_mode2_pll_check(struct aw_device *aw_dev) > +{ > + int ret = -1; > + uint16_t i = 0; > + uint16_t reg_val = 0; > + struct aw_cco_mux_desc *cco_mux_desc = &aw_dev->cco_mux_desc; > + > + aw_dev->ops.aw_reg_read(aw_dev, cco_mux_desc->reg, &reg_val); > + reg_val &= (~cco_mux_desc->mask); > + if (reg_val == cco_mux_desc->divider) { > + aw_dev_dbg(aw_dev->dev, "CCO_MUX is already divider"); > + return ret; > + } > + > + /* change mode2 */ > + aw_dev->ops.aw_reg_write_bits(aw_dev, cco_mux_desc->reg, > + cco_mux_desc->mask, cco_mux_desc->divider); > + > + for (i = 0; i < AW_DEV_SYSST_CHECK_MAX; i++) { > + ret = aw883xx_dev_get_iis_status(aw_dev); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "mode2 iis signal check error"); > + usleep_range(AW_2000_US, AW_2000_US + 10); > + } else { > + break; > + } > + } > + > + /* change mode1*/ > + aw_dev->ops.aw_reg_write_bits(aw_dev, cco_mux_desc->reg, > + cco_mux_desc->mask, cco_mux_desc->bypass); > + > + if (ret == 0) { > + usleep_range(AW_2000_US, AW_2000_US + 10); > + for (i = 0; i < AW_DEV_SYSST_CHECK_MAX; i++) { > + ret = aw_dev_mode1_pll_check(aw_dev); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "mode2 switch to mode1, iis signal check error"); > + usleep_range(AW_2000_US, AW_2000_US + 10); > + } else { > + break; > + } > + } > + } > + > + return ret; > +} > + > +int aw883xx_dev_syspll_check(struct aw_device *aw_dev) > +{ > + int ret = -1; > + > + ret = aw_dev_mode1_pll_check(aw_dev); > + if (ret < 0) { > + aw_dev_info(aw_dev->dev, "mode1 check iis failed try switch to mode2 check"); > + ret = aw_dev_mode2_pll_check(aw_dev); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "mode2 check iis failed"); > + return ret; > + } > + } > + > + return ret; > +} > + > +int aw883xx_dev_sysst_check(struct aw_device *aw_dev) > +{ > + int ret = -1; > + unsigned char i; > + uint16_t reg_val = 0; > + struct aw_sysst_desc *desc = &aw_dev->sysst_desc; > + > + for (i = 0; i < AW_DEV_SYSST_CHECK_MAX; i++) { > + aw_dev->ops.aw_reg_read(aw_dev, desc->reg, &reg_val); > + if (((reg_val & (~desc->st_mask)) & desc->st_check) != desc->st_check) { > + aw_dev_dbg(aw_dev->dev, "check fail, cnt=%d, reg_val=0x%04x", > + i, reg_val); > + usleep_range(AW_2000_US, AW_2000_US + 10); > + } else { > + ret = 0; > + break; > + } > + } > + if (ret < 0) > + aw_dev_err(aw_dev->dev, "check fail"); > + > + return ret; > +} > + > +static int aw_dev_get_monitor_sysint_st(struct aw_device *aw_dev) > +{ > + int ret = 0; > + struct aw_int_desc *desc = &aw_dev->int_desc; > + > + if ((desc->intst_mask) & (desc->sysint_st)) { > + aw_dev_err(aw_dev->dev, > + "monitor check fail:0x%04x", desc->sysint_st); > + ret = -EINVAL; > + } > + desc->sysint_st = 0; > + > + return ret; > +} > + > +static int aw_dev_sysint_check(struct aw_device *aw_dev) > +{ > + int ret = 0; > + uint16_t reg_val = 0; > + struct aw_int_desc *desc = &aw_dev->int_desc; > + > + aw883xx_dev_get_int_status(aw_dev, &reg_val); > + > + if (reg_val & (desc->intst_mask)) { > + aw_dev_err(aw_dev->dev, "pa stop check fail:0x%04x", reg_val); > + ret = -EINVAL; > + } > + > + return ret; > +} > + > +static void aw_dev_get_cur_mode_st(struct aw_device *aw_dev) > +{ > + uint16_t reg_val; > + struct aw_profctrl_desc *profctrl_desc = &aw_dev->profctrl_desc; > + > + aw_dev->ops.aw_reg_read(aw_dev, aw_dev->pwd_desc.reg, &reg_val); > + > + if ((reg_val & (~profctrl_desc->mask)) == profctrl_desc->rcv_mode_val) > + profctrl_desc->cur_mode = AW_RCV_MODE; > + else > + profctrl_desc->cur_mode = AW_NOT_RCV_MODE; > +} > + > +int aw883xx_dev_set_intmask(struct aw_device *aw_dev, bool flag) > +{ > + int ret = -1; > + struct aw_int_desc *desc = &aw_dev->int_desc; > + > + if (flag) > + ret = aw_dev->ops.aw_reg_write(aw_dev, desc->mask_reg, > + desc->int_mask); > + else > + ret = aw_dev->ops.aw_reg_write(aw_dev, desc->mask_reg, > + desc->mask_default); > + > + aw_dev_info(aw_dev->dev, "done"); > + return ret; > +} > + > +void aw883xx_dev_dsp_enable(struct aw_device *aw_dev, bool dsp) > +{ > + int ret = -1; > + struct aw_dsp_en_desc *desc = &aw_dev->dsp_en_desc; > + > + if (dsp) { > + ret = aw_dev->ops.aw_reg_write_bits(aw_dev, desc->reg, > + desc->mask, desc->enable); > + if (ret < 0) > + aw_dev_err(aw_dev->dev, "enable dsp failed"); > + } else { > + ret = aw_dev->ops.aw_reg_write_bits(aw_dev, desc->reg, > + desc->mask, desc->disable); > + if (ret < 0) > + aw_dev_err(aw_dev->dev, "disable dsp failed"); > + } > + > + aw_dev_info(aw_dev->dev, "done"); > +} > + > +static int aw_dev_get_dsp_config(struct aw_device *aw_dev, unsigned char *dsp_cfg) > +{ > + int ret = -1; > + uint16_t reg_val = 0; > + struct aw_dsp_en_desc *desc = &aw_dev->dsp_en_desc; > + > + ret = aw_dev->ops.aw_reg_read(aw_dev, desc->reg, &reg_val); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "reg read failed"); > + return ret; > + } > + > + if (reg_val & (~desc->mask)) > + *dsp_cfg = AW_DEV_DSP_BYPASS; > + else > + *dsp_cfg = AW_DEV_DSP_WORK; > + > + aw_dev_info(aw_dev->dev, "done"); > + > + return 0; > +} > + > +void aw883xx_dev_memclk_select(struct aw_device *aw_dev, unsigned char flag) > +{ > + struct aw_memclk_desc *desc = &aw_dev->memclk_desc; > + int ret = -1; > + > + if (flag == AW_DEV_MEMCLK_PLL) { > + ret = aw_dev->ops.aw_reg_write_bits(aw_dev, desc->reg, > + desc->mask, desc->mcu_hclk); > + if (ret < 0) > + aw_dev_err(aw_dev->dev, "memclk select pll failed"); > + > + } else if (flag == AW_DEV_MEMCLK_OSC) { > + ret = aw_dev->ops.aw_reg_write_bits(aw_dev, desc->reg, > + desc->mask, desc->osc_clk); > + if (ret < 0) > + aw_dev_err(aw_dev->dev, "memclk select OSC failed"); > + } else { > + aw_dev_err(aw_dev->dev, "unknown memclk config, flag=0x%x", flag); > + } > + > + aw_dev_info(aw_dev->dev, "done"); > +} > + > +int aw883xx_dev_get_dsp_status(struct aw_device *aw_dev) > +{ > + int ret = -1; > + uint16_t reg_val = 0; > + struct aw_watch_dog_desc *desc = &aw_dev->watch_dog_desc; > + > + aw_dev_info(aw_dev->dev, "enter"); > + > + aw_dev->ops.aw_reg_read(aw_dev, desc->reg, &reg_val); > + if (reg_val & (~desc->mask)) > + ret = 0; > + > + return ret; > +} > + > +static int aw_dev_get_vmax(struct aw_device *aw_dev, unsigned int *vmax) > +{ > + int ret = -1; > + struct aw_vmax_desc *desc = &aw_dev->vmax_desc; > + > + ret = aw_dev->ops.aw_dsp_read(aw_dev, desc->dsp_reg, vmax, desc->data_type); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "get vmax failed"); > + return ret; > + } > + > + return 0; > +} > + > +/* > + * aw_dev update cfg > + */ > + > +static int aw_dev_reg_container_update(struct aw_device *aw_dev, > + uint8_t *data, uint32_t len) > +{ > + int i, ret; > + uint8_t reg_addr = 0; > + uint16_t reg_val = 0; > + uint16_t read_val = 0; > + uint16_t read_vol = 0; > + struct aw_int_desc *int_desc = &aw_dev->int_desc; > + struct aw_volume_desc *vol_desc = &aw_dev->volume_desc; > + int16_t *reg_data = NULL; > + int data_len; > + > + aw_dev_dbg(aw_dev->dev, "enter"); > + reg_data = (int16_t *)data; > + data_len = len >> 1; > + > + if (data_len % 2 != 0) { > + aw_dev_err(aw_dev->dev, "data len:%d unsupported", > + data_len); > + return -EINVAL; > + } > + > + for (i = 0; i < data_len; i += 2) { > + reg_addr = reg_data[i]; > + reg_val = reg_data[i + 1]; > + aw_dev_dbg(aw_dev->dev, "reg = 0x%02x, val = 0x%04x", > + reg_addr, reg_val); > + if (reg_addr == int_desc->mask_reg) { > + int_desc->int_mask = reg_val; > + reg_val = int_desc->mask_default; > + } > + if (reg_addr == aw_dev->mute_desc.reg) { > + aw_dev->ops.aw_reg_read(aw_dev, reg_addr, &read_val); > + read_val &= (~aw_dev->mute_desc.mask); > + reg_val &= aw_dev->mute_desc.mask; > + reg_val |= read_val; > + } > + if (reg_addr == aw_dev->dsp_crc_desc.ctl_reg) > + reg_val &= aw_dev->dsp_crc_desc.ctl_mask; > + > + if (reg_addr == aw_dev->chansel_desc.txchan_reg) { > + /*close tx*/ > + reg_val &= aw_dev->tx_en_desc.tx_en_mask; > + reg_val |= aw_dev->tx_en_desc.tx_disable; > + } > + > + if (reg_addr == aw_dev->volume_desc.reg) { > + read_vol = (reg_val & (~aw_dev->volume_desc.mask)) >> > + aw_dev->volume_desc.shift; > + aw_dev->volume_desc.init_volume = > + aw_dev->ops.aw_reg_val_to_db(read_vol); > + } > + > + ret = aw_dev->ops.aw_reg_write(aw_dev, reg_addr, reg_val); > + if (ret < 0) > + break; > + > + } > + > + aw883xx_hold_reg_spin_st(&aw_dev->spin_desc); > + > + aw_dev_get_cur_mode_st(aw_dev); > + > + if (aw_dev->cur_prof != aw_dev->set_prof) { > + /*clear control volume when PA change profile*/ > + vol_desc->ctl_volume = 0; > + } else { > + /*keep control volume when PA start with sync mode*/ > + aw883xx_dev_set_volume(aw_dev, vol_desc->ctl_volume); > + } > + > + /*keep min volume*/ > + if (aw_dev->fade_en) > + aw883xx_dev_set_volume(aw_dev, vol_desc->mute_volume); > + > + aw_dev_get_dsp_config(aw_dev, &aw_dev->dsp_cfg); > + > + aw_dev_dbg(aw_dev->dev, "exit"); > + > + return ret; > +} > + > +static int aw_dev_reg_update(struct aw_device *aw_dev, > + uint8_t *data, uint32_t len) > +{ > + > + aw_dev_dbg(aw_dev->dev, "reg len:%d", len); > + > + if (len && (data != NULL)) { > + aw_dev_reg_container_update(aw_dev, data, len); > + } else { > + aw_dev_err(aw_dev->dev, "reg data is null or len is 0"); > + return -EPERM; > + } > + > + return 0; > +} > + > +static int aw_dev_dsp_container_update(struct aw_device *aw_dev, > + uint8_t *data, uint32_t len, uint16_t base) > +{ > + int i; > + struct aw_dsp_mem_desc *dsp_mem_desc = &aw_dev->dsp_mem_desc; > +#ifdef AW_DSP_I2C_WRITES > + uint32_t tmp_len = 0; > +#else > + uint16_t reg_val = 0; > +#endif > + > + aw_dev_dbg(aw_dev->dev, "enter"); > + mutex_lock(aw_dev->i2c_lock); > +#ifdef AW_DSP_I2C_WRITES > + /* i2c writes */ > + aw_dev->ops.aw_i2c_write(aw_dev, dsp_mem_desc->dsp_madd_reg, base); > + > + for (i = 0; i < len; i += AW_MAX_RAM_WRITE_BYTE_SIZE) { > + if ((len - i) < AW_MAX_RAM_WRITE_BYTE_SIZE) > + tmp_len = len - i; > + else > + tmp_len = AW_MAX_RAM_WRITE_BYTE_SIZE; > + aw_dev->ops.aw_i2c_writes(aw_dev, dsp_mem_desc->dsp_mdat_reg, > + &data[i], tmp_len); > + } > + > +#else > + /* i2c write */ > + aw_dev->ops.aw_i2c_write(aw_dev, dsp_mem_desc->dsp_madd_reg, base); > + for (i = 0; i < len; i += 2) { > + reg_val = (data[i] << 8) + data[i + 1]; > + aw_dev->ops.aw_i2c_write(aw_dev, dsp_mem_desc->dsp_mdat_reg, > + reg_val); > + } > +#endif > + mutex_unlock(aw_dev->i2c_lock); > + aw_dev_dbg(aw_dev->dev, "exit"); > + > + return 0; > +} > + > +int aw_dev_dsp_fw_update(struct aw_device *aw_dev, > + uint8_t *data, uint32_t len) > +{ > + struct aw_dsp_mem_desc *dsp_mem_desc = &aw_dev->dsp_mem_desc; > + > + aw_dev_dbg(aw_dev->dev, "dsp firmware len:%d", len); > + > + if (len && (data != NULL)) { > + aw_dev_dsp_container_update(aw_dev, > + data, len, dsp_mem_desc->dsp_fw_base_addr); > + aw_dev->dsp_fw_len = len; > + } else { > + aw_dev_err(aw_dev->dev, "dsp firmware data is null or len is 0"); > + return -EPERM; > + } > + > + return 0; > +} > + > +static int aw_dev_copy_to_crc_dsp_cfg(struct aw_device *aw_dev, > + uint8_t *data, uint32_t size) > +{ > + struct aw_sec_data_desc *crc_dsp_cfg = &aw_dev->crc_dsp_cfg; > + int ret; > + > + if (crc_dsp_cfg->data == NULL) { > + crc_dsp_cfg->data = devm_kzalloc(aw_dev->dev, size, GFP_KERNEL); > + if (!crc_dsp_cfg->data) > + return -ENOMEM; > + crc_dsp_cfg->len = size; > + } else if (crc_dsp_cfg->len < size) { > + devm_kfree(aw_dev->dev, crc_dsp_cfg->data); > + crc_dsp_cfg->data = NULL; > + crc_dsp_cfg->data = devm_kzalloc(aw_dev->dev, size, GFP_KERNEL); > + if (!crc_dsp_cfg->data) { > + aw_dev_err(aw_dev->dev, "error allocating memory"); > + return -ENOMEM; > + } > + } > + memcpy(crc_dsp_cfg->data, data, size); > + ret = aw883xx_dev_dsp_data_order(aw_dev, crc_dsp_cfg->data, size); > + if (ret < 0) > + return ret; > + > + return 0; > +} > + > +int aw883xx_dev_dsp_cfg_update(struct aw_device *aw_dev, > + uint8_t *data, uint32_t len) > +{ > + struct aw_dsp_mem_desc *dsp_mem_desc = &aw_dev->dsp_mem_desc; > + int ret; > + > + aw_dev_dbg(aw_dev->dev, "dsp config len:%d", len); > + > + if (len && (data != NULL)) { > + aw_dev_dsp_container_update(aw_dev, > + data, len, dsp_mem_desc->dsp_cfg_base_addr); > + aw_dev->dsp_cfg_len = len; > + > + ret = aw_dev_copy_to_crc_dsp_cfg(aw_dev, data, len); > + if (ret < 0) > + return ret; > + > + aw_dev_set_vcalb(aw_dev); > + aw883xx_cali_svc_get_ra(&aw_dev->cali_desc); > + aw_dev_get_cali_f0_delay(aw_dev); > + > + if (aw_dev->ops.aw_get_hw_mon_st) { > + ret = aw_dev->ops.aw_get_hw_mon_st(aw_dev, > + &aw_dev->monitor_desc.hw_mon_en, > + &aw_dev->monitor_desc.hw_temp_flag); > + if (ret < 0) > + return ret; > + } > + > + ret = aw_dev_get_vmax(aw_dev, &aw_dev->vmax_desc.init_vmax); > + if (ret == 0) { > + aw_dev_info(aw_dev->dev, "get init vmax:0x%x", > + aw_dev->vmax_desc.init_vmax); > + } else { > + aw_dev_err(aw_dev->dev, "get vmax failed"); > + return ret; > + } > + > + aw_dev->dsp_crc_st = AW_DSP_CRC_NA; > + } else { > + aw_dev_err(aw_dev->dev, "dsp config data is null or len is 0"); > + return -EPERM; > + } > + > + return 0; > +} > + > +static int aw_dev_sram_check(struct aw_device *aw_dev) > +{ > + int ret = -1; > + uint16_t reg_val = 0; > + struct aw_dsp_mem_desc *dsp_mem_desc = &aw_dev->dsp_mem_desc; > + > + mutex_lock(aw_dev->i2c_lock); > + /*check the odd bits of reg 0x40*/ > + aw_dev->ops.aw_i2c_write(aw_dev, dsp_mem_desc->dsp_madd_reg, > + AW_DSP_ODD_NUM_BIT_TEST); > + aw_dev->ops.aw_i2c_read(aw_dev, dsp_mem_desc->dsp_madd_reg, &reg_val); > + if (reg_val != AW_DSP_ODD_NUM_BIT_TEST) { > + aw_dev_err(aw_dev->dev, "check reg 0x40 odd bit failed, read[0x%x] does not match write[0x%x]", > + reg_val, AW_DSP_ODD_NUM_BIT_TEST); > + goto error; > + } > + > + /*check the even bits of reg 0x40*/ > + aw_dev->ops.aw_i2c_write(aw_dev, dsp_mem_desc->dsp_madd_reg, > + AW_DSP_EVEN_NUM_BIT_TEST); > + aw_dev->ops.aw_i2c_read(aw_dev, dsp_mem_desc->dsp_madd_reg, &reg_val); > + if (reg_val != AW_DSP_EVEN_NUM_BIT_TEST) { > + aw_dev_err(aw_dev->dev, "check reg 0x40 even bit failed, read[0x%x] does not match write[0x%x]", > + reg_val, AW_DSP_EVEN_NUM_BIT_TEST); > + goto error; > + } > + > + /*check dsp_fw_base_addr*/ > + aw_dev->ops.aw_i2c_write(aw_dev, dsp_mem_desc->dsp_madd_reg, > + dsp_mem_desc->dsp_fw_base_addr); > + aw_dev->ops.aw_i2c_write(aw_dev, dsp_mem_desc->dsp_mdat_reg, > + AW_DSP_EVEN_NUM_BIT_TEST); > + > + aw_dev->ops.aw_i2c_write(aw_dev, dsp_mem_desc->dsp_madd_reg, > + dsp_mem_desc->dsp_fw_base_addr); > + aw_dev->ops.aw_i2c_read(aw_dev, dsp_mem_desc->dsp_mdat_reg, &reg_val); > + if (reg_val != AW_DSP_EVEN_NUM_BIT_TEST) { > + aw_dev_err(aw_dev->dev, "check dsp fw addr failed, read[0x%x] does not match write[0x%x]", > + reg_val, AW_DSP_EVEN_NUM_BIT_TEST); > + goto error; > + } > + > + /*check dsp_cfg_base_addr*/ > + aw_dev->ops.aw_i2c_write(aw_dev, dsp_mem_desc->dsp_madd_reg, > + dsp_mem_desc->dsp_cfg_base_addr); > + aw_dev->ops.aw_i2c_write(aw_dev, dsp_mem_desc->dsp_mdat_reg, > + AW_DSP_ODD_NUM_BIT_TEST); > + > + aw_dev->ops.aw_i2c_write(aw_dev, dsp_mem_desc->dsp_madd_reg, > + dsp_mem_desc->dsp_cfg_base_addr); > + aw_dev->ops.aw_i2c_read(aw_dev, dsp_mem_desc->dsp_mdat_reg, &reg_val); > + if (reg_val != AW_DSP_ODD_NUM_BIT_TEST) { > + aw_dev_err(aw_dev->dev, "check dsp cfg failed, read[0x%x] does not match write[0x%x]", > + reg_val, AW_DSP_ODD_NUM_BIT_TEST); > + goto error; > + } > + > + mutex_unlock(aw_dev->i2c_lock); > + return 0; > + > +error: > + mutex_unlock(aw_dev->i2c_lock); > + return ret; > +} > + > +int aw883xx_dev_fw_update(struct aw_device *aw_dev, bool up_dsp_fw_en, bool force_up_en) > +{ > + int ret = -1; > + struct aw_prof_desc *set_prof_desc = NULL; > + struct aw_sec_data_desc *sec_desc = NULL; > + char *prof_name = NULL; > + > + if ((aw_dev->cur_prof == aw_dev->set_prof) && > + (force_up_en == AW_FORCE_UPDATE_OFF)) { > + aw_dev_info(aw_dev->dev, "scene no change, not update"); > + return 0; > + } > + > + if (aw_dev->fw_status == AW_DEV_FW_FAILED) { > + aw_dev_err(aw_dev->dev, "fw status[%d] error", aw_dev->fw_status); > + return -EPERM; > + } > + > + prof_name = aw_dev_get_prof_name(aw_dev, aw_dev->set_prof); > + if (prof_name == NULL) > + return -ENOMEM; > + > + aw_dev_info(aw_dev->dev, "start update %s", prof_name); > + > + ret = aw883xx_dev_get_prof_data(aw_dev, aw_dev->set_prof, &set_prof_desc); > + if (ret < 0) > + return ret; > + > + /*update reg*/ > + sec_desc = set_prof_desc->sec_desc; > + ret = aw_dev_reg_update(aw_dev, sec_desc[AW_DATA_TYPE_REG].data, > + sec_desc[AW_DATA_TYPE_REG].len); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "update reg failed"); > + return ret; > + } > + > + aw883xx_dev_mute(aw_dev, true); > + > + if (aw_dev->dsp_cfg == AW_DEV_DSP_WORK) > + aw883xx_dev_dsp_enable(aw_dev, false); > + > + aw883xx_dev_memclk_select(aw_dev, AW_DEV_MEMCLK_OSC); > + > + if (up_dsp_fw_en) { > + ret = aw_dev_sram_check(aw_dev); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "check sram failed"); > + goto error; > + } > + > + /*update dsp firmware*/ > + aw_dev_info(aw_dev->dev, "fw_ver: [%x]", set_prof_desc->fw_ver); > + ret = aw_dev_dsp_fw_update(aw_dev, sec_desc[AW_DATA_TYPE_DSP_FW].data, > + sec_desc[AW_DATA_TYPE_DSP_FW].len); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "update dsp fw failed"); > + goto error; > + } > + } > + > + /*update dsp config*/ > + ret = aw883xx_dev_dsp_cfg_update(aw_dev, sec_desc[AW_DATA_TYPE_DSP_CFG].data, > + sec_desc[AW_DATA_TYPE_DSP_CFG].len); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "update dsp cfg failed"); > + goto error; > + } > + > + aw883xx_dev_memclk_select(aw_dev, AW_DEV_MEMCLK_PLL); > + > + aw_dev->cur_prof = aw_dev->set_prof; > + > + aw_dev_info(aw_dev->dev, "load %s done", prof_name); > + return 0; > + > +error: > + aw883xx_dev_memclk_select(aw_dev, AW_DEV_MEMCLK_PLL); > + > + return ret; > +} > + > +int aw883xx_dev_dsp_check(struct aw_device *aw_dev) > +{ > + int ret = -1; > + uint16_t i = 0; > + > + aw_dev_dbg(aw_dev->dev, "enter"); > + > + if (aw_dev->dsp_cfg == AW_DEV_DSP_BYPASS) { > + aw_dev_dbg(aw_dev->dev, "dsp bypass"); > + return 0; > + } else if (aw_dev->dsp_cfg == AW_DEV_DSP_WORK) { > + aw883xx_dev_dsp_enable(aw_dev, false); > + aw883xx_dev_dsp_enable(aw_dev, true); > + usleep_range(AW_1000_US, AW_1000_US + 10); > + for (i = 0; i < AW_DEV_DSP_CHECK_MAX; i++) { > + ret = aw883xx_dev_get_dsp_status(aw_dev); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "dsp wdt status error=%d", ret); > + usleep_range(AW_2000_US, AW_2000_US + 10); > + } else { > + return 0; > + } > + } > + } else { > + aw_dev_err(aw_dev->dev, "unknown dsp cfg=%d", aw_dev->dsp_cfg); > + return -EINVAL; > + } > + > + return -EINVAL; > +} > + > +static int aw_dev_set_cfg_f0_fs(struct aw_device *aw_dev) > +{ > + uint32_t f0_fs = 0; > + struct aw_cfgf0_fs_desc *cfgf0_fs_desc = &aw_dev->cfgf0_fs_desc; > + int ret; > + > + if (aw_dev->ops.aw_set_cfg_f0_fs) { > + aw_dev->ops.aw_set_cfg_f0_fs(aw_dev, &f0_fs); > + ret = aw883xx_dev_modify_dsp_cfg(aw_dev, cfgf0_fs_desc->dsp_reg, > + f0_fs, cfgf0_fs_desc->data_type); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "modify dsp cfg failed"); > + return ret; > + } > + } > + > + return 0; > +} > + > +static void aw_dev_cali_re_update(struct aw_cali_desc *cali_desc) > +{ > + struct aw_device *aw_dev = > + container_of(cali_desc, struct aw_device, cali_desc); > + > + if (aw_dev->cali_desc.cali_re < aw_dev->re_range.re_max && > + aw_dev->cali_desc.cali_re > aw_dev->re_range.re_min) { > + aw883xx_cali_svc_set_cali_re_to_dsp(&aw_dev->cali_desc); > + } else { > + aw_dev_err(aw_dev->dev, "cali_re:%d out of range, no set", > + aw_dev->cali_desc.cali_re); > + } > +} > + > + > +int aw883xx_device_start(struct aw_device *aw_dev) > +{ > + int ret = -1; > + > + aw_dev_info(aw_dev->dev, "enter"); > + > + if (aw_dev->status == AW_DEV_PW_ON) { > + aw_dev_info(aw_dev->dev, "already power on"); > + return 0; > + } > + > + /*power on*/ > + aw_dev_pwd(aw_dev, false); > + usleep_range(AW_2000_US, AW_2000_US + 10); > + > + ret = aw883xx_dev_syspll_check(aw_dev); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "pll check failed cannot start"); > + aw_dev_reg_dump(aw_dev); > + goto pll_check_fail; > + } > + > + /*amppd on*/ > + aw_dev_amppd(aw_dev, false); > + usleep_range(AW_1000_US, AW_1000_US + 50); > + > + /*check i2s status*/ > + ret = aw883xx_dev_sysst_check(aw_dev); > + if (ret < 0) { > + /*check failed*/ > + aw_dev_reg_dump(aw_dev); > + goto sysst_check_fail; > + } > + > + if (aw_dev->dsp_cfg == AW_DEV_DSP_WORK) { > + /*dsp bypass*/ > + aw883xx_dev_dsp_enable(aw_dev, false); > + if (aw_dev->ops.aw_dsp_fw_check) { > + ret = aw_dev->ops.aw_dsp_fw_check(aw_dev); > + if (ret < 0) { > + aw_dev_reg_dump(aw_dev); > + goto dsp_fw_check_fail; > + } > + } > + aw_dev_set_cfg_f0_fs(aw_dev); > + > + aw_dev_cali_re_update(&aw_dev->cali_desc); > + > + if (aw_dev->dsp_crc_st != AW_DSP_CRC_OK) { > + ret = aw_dev_dsp_crc32_check(aw_dev); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "dsp crc check failed"); > + aw_dev_reg_dump(aw_dev); > + goto crc_check_fail; > + } > + } > + > + ret = aw883xx_dev_dsp_check(aw_dev); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "check dsp status failed"); > + aw_dev_reg_dump(aw_dev); > + goto dsp_check_fail; > + } > + } else { > + aw_dev_dbg(aw_dev->dev, "start pa with dsp bypass"); > + } > + > + /*enable tx feedback*/ > + if (aw_dev->ops.aw_i2s_tx_enable) > + aw_dev->ops.aw_i2s_tx_enable(aw_dev, true); > + > + /*close mute*/ > + if (aw883xx_cali_check_result(&aw_dev->cali_desc)) > + aw883xx_dev_mute(aw_dev, false); > + else > + aw883xx_dev_mute(aw_dev, true); > + > + /*clear inturrupt*/ > + aw883xx_dev_clear_int_status(aw_dev); > + /*set inturrupt mask*/ > + aw883xx_dev_set_intmask(aw_dev, true); > + > + aw883xx_monitor_start(&aw_dev->monitor_desc); > + > + aw_dev->status = AW_DEV_PW_ON; > + > + aw_dev_info(aw_dev->dev, "done"); > + > + return 0; > + > +dsp_check_fail: > +crc_check_fail: > + aw883xx_dev_dsp_enable(aw_dev, false); > +dsp_fw_check_fail: > +sysst_check_fail: > + /*clear interrupt*/ > + aw883xx_dev_clear_int_status(aw_dev); > + aw_dev_amppd(aw_dev, true); > +pll_check_fail: > + aw_dev_pwd(aw_dev, true); > + aw_dev->status = AW_DEV_PW_OFF; > + return ret; > +} > + > +int aw883xx_device_stop(struct aw_device *aw_dev) > +{ > + struct aw_sec_data_desc *dsp_cfg = > + &aw_dev->prof_info.prof_desc[aw_dev->cur_prof].sec_desc[AW_DATA_TYPE_DSP_CFG]; > + struct aw_sec_data_desc *dsp_fw = > + &aw_dev->prof_info.prof_desc[aw_dev->cur_prof].sec_desc[AW_DATA_TYPE_DSP_FW]; > + int int_st = 0; > + int monitor_int_st = 0; > + > + aw_dev_dbg(aw_dev->dev, "enter"); > + > + if (aw_dev->status == AW_DEV_PW_OFF) { > + aw_dev_info(aw_dev->dev, "already power off"); > + return 0; > + } > + > + aw_dev->status = AW_DEV_PW_OFF; > + > + aw883xx_monitor_stop(&aw_dev->monitor_desc); > + > + /*set mute*/ > + aw883xx_dev_mute(aw_dev, true); > + usleep_range(AW_4000_US, AW_4000_US + 100); > + > + /*close tx feedback*/ > + if (aw_dev->ops.aw_i2s_tx_enable) > + aw_dev->ops.aw_i2s_tx_enable(aw_dev, false); > + usleep_range(AW_1000_US, AW_1000_US + 100); > + > + /*set defaut int mask*/ > + aw883xx_dev_set_intmask(aw_dev, false); > + > + /*check sysint state*/ > + int_st = aw_dev_sysint_check(aw_dev); > + > + /*close dsp*/ > + aw883xx_dev_dsp_enable(aw_dev, false); > + > + /*enable amppd*/ > + aw_dev_amppd(aw_dev, true); > + > + /*check monitor process sysint state*/ > + monitor_int_st = aw_dev_get_monitor_sysint_st(aw_dev); > + > + if (int_st < 0 || monitor_int_st < 0) { > + /*system status anomaly*/ > + aw883xx_dev_memclk_select(aw_dev, AW_DEV_MEMCLK_OSC); > + aw883xx_dev_dsp_cfg_update(aw_dev, dsp_cfg->data, dsp_cfg->len); > + aw_dev_dsp_fw_update(aw_dev, dsp_fw->data, dsp_fw->len); > + aw883xx_dev_memclk_select(aw_dev, AW_DEV_MEMCLK_PLL); > + } > + > + /*set power down*/ > + aw_dev_pwd(aw_dev, true); > + > + aw_dev_info(aw_dev->dev, "done"); > + return 0; > +} > + > +/*deinit aw_device*/ > +void aw883xx_dev_deinit(struct aw_device *aw_dev) > +{ > + if (aw_dev == NULL) > + return; > + > + if (aw_dev->prof_info.prof_desc != NULL) { > + devm_kfree(aw_dev->dev, aw_dev->prof_info.prof_desc); > + aw_dev->prof_info.prof_desc = NULL; > + } > + aw_dev->prof_info.count = 0; > + > + if (aw_dev->crc_dsp_cfg.data != NULL) { > + aw_dev->crc_dsp_cfg.len = 0; > + devm_kfree(aw_dev->dev, aw_dev->crc_dsp_cfg.data); > + aw_dev->crc_dsp_cfg.data = NULL; > + } > + > +} > + > +/*init aw_device*/ > +int aw883xx_device_init(struct aw_device *aw_dev, struct aw_container *aw_cfg) > +{ > + int ret; > + > + if (aw_dev == NULL || aw_cfg == NULL) { > + aw_pr_err("aw_dev is NULL or aw_cfg is NULL"); > + return -ENOMEM; > + } > + > + ret = aw883xx_dev_cfg_load(aw_dev, aw_cfg); > + if (ret < 0) { > + aw883xx_dev_deinit(aw_dev); > + aw_dev_err(aw_dev->dev, "aw_dev acf parse failed"); > + return -EINVAL; > + } > + > + aw_dev->cur_prof = aw_dev->prof_info.prof_desc[0].id; > + aw_dev->set_prof = aw_dev->prof_info.prof_desc[0].id; > + ret = aw883xx_dev_fw_update(aw_dev, AW_FORCE_UPDATE_ON, > + AW_DSP_FW_UPDATE_ON); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "fw update failed"); > + return ret; > + } > + > + aw883xx_dev_set_intmask(aw_dev, false); > + > + /*set mute*/ > + aw883xx_dev_mute(aw_dev, true); > + > + /*close tx feedback*/ > + if (aw_dev->ops.aw_i2s_tx_enable) > + aw_dev->ops.aw_i2s_tx_enable(aw_dev, false); > + usleep_range(AW_1000_US, AW_1000_US + 100); > + > + /*enable amppd*/ > + aw_dev_amppd(aw_dev, true); > + /*close dsp*/ > + aw883xx_dev_dsp_enable(aw_dev, false); > + /*set power down*/ > + aw_dev_pwd(aw_dev, true); > + > + mutex_lock(&g_dev_lock); > + list_add(&aw_dev->list_node, &g_dev_list); > + mutex_unlock(&g_dev_lock); > + > + aw_dev_info(aw_dev->dev, "init done"); > + > + return 0; > +} > + > +static void aw883xx_parse_channel_dt(struct aw_device *aw_dev) > +{ > + int ret; > + uint32_t channel_value; > + struct device_node *np = aw_dev->dev->of_node; > + > + ret = of_property_read_u32(np, "sound-channel", &channel_value); > + if (ret < 0) { > + aw_dev_info(aw_dev->dev, > + "read sound-channel failed,use default 0"); > + aw_dev->channel = AW_DEV_DEFAULT_CH; > + return; > + } > + > + aw_dev_dbg(aw_dev->dev, "read sound-channel value is: %d", > + channel_value); > + aw_dev->channel = channel_value; > +} > + > +static void aw883xx_parse_fade_enable_dt(struct aw_device *aw_dev) > +{ > + int ret = -1; > + struct device_node *np = aw_dev->dev->of_node; > + uint32_t fade_en; > + > + ret = of_property_read_u32(np, "fade-enable", &fade_en); > + if (ret < 0) { > + aw_dev_info(aw_dev->dev, > + "read fade-enable failed, close fade_in_out"); > + fade_en = AW_FADE_IN_OUT_DEFAULT; > + } else { > + aw_dev_info(aw_dev->dev, "read fade-enable value is: %d", fade_en); > + } > + > + aw_dev->fade_en = fade_en; > +} > + > +static void aw883xx_parse_re_range_dt(struct aw_device *aw_dev) > +{ > + int ret; > + uint32_t re_max; > + uint32_t re_min; > + struct device_node *np = aw_dev->dev->of_node; > + > + ret = of_property_read_u32(np, "re-min", &re_min); > + if (ret < 0) { > + aw_dev->re_range.re_min = aw_dev->re_range.re_min_default; > + aw_dev_info(aw_dev->dev, > + "read re-min value failed, set default value:[%d]mohm", > + aw_dev->re_range.re_min); > + } else { > + aw_dev_info(aw_dev->dev, > + "parse re-min:[%d]", re_min); > + aw_dev->re_range.re_min = re_min; > + } > + > + ret = of_property_read_u32(np, "re-max", &re_max); > + if (ret < 0) { > + aw_dev->re_range.re_max = aw_dev->re_range.re_max_default; > + aw_dev_info(aw_dev->dev, > + "read re-max failed, set default value:[%d]mohm", > + aw_dev->re_range.re_max); > + } else { > + aw_dev_info(aw_dev->dev, > + "parse re-max:[%d]", re_max); > + aw_dev->re_range.re_max = re_max; > + } > +} > + > +static void aw_device_parse_dt(struct aw_device *aw_dev) > +{ > + aw883xx_parse_channel_dt(aw_dev); > + aw883xx_parse_fade_enable_dt(aw_dev); > + aw883xx_parse_re_range_dt(aw_dev); > +} > + > +int aw883xx_dev_get_list_head(struct list_head **head) > +{ > + if (list_empty(&g_dev_list)) > + return -EINVAL; > + > + *head = &g_dev_list; > + > + return 0; > +} > + > +int aw883xx_device_probe(struct aw_device *aw_dev) > +{ > + INIT_LIST_HEAD(&aw_dev->list_node); > + > + aw_device_parse_dt(aw_dev); > + > + aw883xx_cali_init(&aw_dev->cali_desc); > + > + aw883xx_monitor_init(&aw_dev->monitor_desc); > + > + aw883xx_spin_init(&aw_dev->spin_desc); > + > + return 0; > +} > + > +int aw883xx_device_remove(struct aw_device *aw_dev) > +{ > + aw883xx_monitor_deinit(&aw_dev->monitor_desc); > + > + aw883xx_cali_deinit(&aw_dev->cali_desc); > + > + return 0; > +} > + > diff --git a/sound/soc/codecs/aw883xx/aw883xx_device.h b/sound/soc/codecs/aw883xx/aw883xx_device.h > new file mode 100644 > index 0000000..bfac8e2 > --- /dev/null > +++ b/sound/soc/codecs/aw883xx/aw883xx_device.h > @@ -0,0 +1,557 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +/* > + * aw883xx.c -- ALSA Soc AW883XX codec support > + * > + * Copyright (c) 2020 AWINIC Technology CO., LTD > + * > + * Author: Bruce zhao <zhaolei(a)awinic.com> > + */ > + > +#ifndef __AW883XX_DEVICE_FILE_H__ > +#define __AW883XX_DEVICE_FILE_H__ > +#include "aw883xx_spin.h" > +#include "aw883xx_monitor.h" > +#include "aw883xx_data_type.h" > +#include "aw883xx_calib.h" > + > +#define AW_DEV_DEFAULT_CH (0) > +#define AW_DEV_I2S_CHECK_MAX (5) > +#define AW_DEV_DSP_CHECK_MAX (5) > + > +/* > + * DSP I2C WRITES > + */ > +#define AW_DSP_I2C_WRITES > +#define AW_MAX_RAM_WRITE_BYTE_SIZE (128) > +#define AW_DSP_ODD_NUM_BIT_TEST (0x5555) > +#define AW_DSP_EVEN_NUM_BIT_TEST (0xAAAA) > +#define AW_DSP_ST_CHECK_MAX (2) > +#define AW_FADE_IN_OUT_DEFAULT (0) > +#define AW_CALI_DELAY_CACL(value) ((value * 32) / 48) > + > +#define AW_GET_MIN_VALUE(value1, value2) \ > + ((value1) > (value2) ? (value2) : (value1)) > + > +#define AW_GET_MAX_VALUE(value1, value2) \ > + ((value1) > (value2) ? (value1) : (value2)) > + > +struct aw_device; > + > +enum { > + AW_DEV_VDSEL_DAC = 0, > + AW_DEV_VDSEL_VSENSE = 1, > +}; > + > +enum { > + AW_DSP_CRC_NA = 0, > + AW_DSP_CRC_OK = 1, > +}; > + > +enum { > + AW_DSP_CRC_DISABLE = 0, > + AW_DSP_CRC_ENABLE = 1, > +}; > + > +enum { > + AW_DSP_FW_UPDATE_OFF = 0, > + AW_DSP_FW_UPDATE_ON = 1, > +}; > + > +enum { > + AW_FORCE_UPDATE_OFF = 0, > + AW_FORCE_UPDATE_ON = 1, > +}; > + > +enum { > + AW_1000_US = 1000, > + AW_2000_US = 2000, > + AW_3000_US = 3000, > + AW_4000_US = 4000, > + AW_5000_US = 5000, > + AW_10000_US = 10000, > + AW_100000_US = 100000, > +}; > + > +enum { > + AW_DEV_TYPE_OK = 0, > + AW_DEV_TYPE_NONE = 1, > +}; > + > + > +enum AW_DEV_STATUS { > + AW_DEV_PW_OFF = 0, > + AW_DEV_PW_ON, > +}; > + > +enum AW_DEV_FW_STATUS { > + AW_DEV_FW_FAILED = 0, > + AW_DEV_FW_OK, > +}; > + > +enum AW_DEV_MEMCLK { > + AW_DEV_MEMCLK_OSC = 0, > + AW_DEV_MEMCLK_PLL = 1, > +}; > + > +enum AW_DEV_DSP_CFG { > + AW_DEV_DSP_WORK = 0, > + AW_DEV_DSP_BYPASS = 1, > +}; > + > +enum { > + AW_DSP_16_DATA = 0, > + AW_DSP_32_DATA = 1, > +}; > + > +enum aw_platform { > + AW_QCOM = 0, > + AW_MTK = 1, > + AW_SPRD = 2, > +}; > + > +enum { > + AW_NOT_RCV_MODE = 0, > + AW_RCV_MODE = 1, > +}; > + > +struct aw_device_ops { > + int (*aw_i2c_writes)(struct aw_device *aw_dev, uint8_t reg_addr, > + uint8_t *buf, uint16_t len); > + int (*aw_i2c_write)(struct aw_device *aw_dev, uint8_t reg_addr, uint16_t reg_data); > + int (*aw_i2c_read)(struct aw_device *aw_dev, uint8_t reg_addr, uint16_t *reg_data); > + > + int (*aw_reg_write)(struct aw_device *aw_dev, uint8_t reg_addr, uint16_t reg_data); > + int (*aw_reg_read)(struct aw_device *aw_dev, uint8_t reg_addr, uint16_t *reg_data); > + int (*aw_reg_write_bits)(struct aw_device *aw_dev, uint8_t reg_addr, > + uint16_t mask, uint16_t reg_data); > + > + int (*aw_dsp_write)(struct aw_device *aw_dev, > + uint16_t dsp_addr, > + uint32_t reg_data, > + uint8_t data_type); > + int (*aw_dsp_read)(struct aw_device *aw_dev, > + uint16_t dsp_addr, > + uint32_t *dsp_data, > + uint8_t data_type); > + int (*aw_dsp_write_bits)(struct aw_device *aw_dev, uint16_t dsp_addr, > + uint16_t mask, uint16_t dsp_data); > + > + int (*aw_set_hw_volume)(struct aw_device *aw_dev, uint16_t value); > + int (*aw_get_hw_volume)(struct aw_device *aw_dev, uint16_t *value); > + unsigned int (*aw_reg_val_to_db)(unsigned int value); > + > + void (*aw_i2s_tx_enable)(struct aw_device *aw_dev, bool flag); > + int (*aw_get_dev_num)(void); > + > + bool (*aw_check_wr_access)(int reg); > + bool (*aw_check_rd_access)(int reg); > + int (*aw_get_reg_num)(void); > + int (*aw_get_version)(char *buf, int size); > + int (*aw_read_dsp_pid)(struct aw_device *aw_dev); > + int (*aw_get_hw_mon_st)(struct aw_device *aw_dev, bool *is_enable, uint8_t *temp_flag); > + int (*aw_cali_svc_get_iv_st)(struct aw_device *aw_dev); > + void (*aw_set_cfg_f0_fs)(struct aw_device *aw_dev, uint32_t *f0_fs); > + int (*aw_dsp_fw_check)(struct aw_device *aw_dev); > +}; > + > +struct aw_int_desc { > + unsigned int mask_reg; /*interrupt mask reg*/ > + unsigned int st_reg; /*interrupt status reg*/ > + unsigned int mask_default; /*default mask close all*/ > + unsigned int int_mask; /*set mask*/ > + unsigned int intst_mask; /*interrupt check mask*/ > + uint16_t sysint_st; /*interrupt reg status*/ > +}; > + > +struct aw_pwd_desc { > + unsigned int reg; > + unsigned int mask; > + unsigned int enable; > + unsigned int disable; > +}; > + > +struct aw_vcalb_desc { > + unsigned int icalk_reg; > + unsigned int icalk_reg_mask; > + unsigned int icalk_sign_mask; > + unsigned int icalk_neg_mask; > + int icalk_value_factor; > + > + unsigned int vcalk_reg; > + unsigned int vcalk_reg_mask; > + unsigned int vcalk_sign_mask; > + unsigned int vcalk_neg_mask; > + unsigned int vcalk_shift; > + int vcalk_value_factor; > + > + unsigned int vcalb_dsp_reg; > + unsigned char data_type; > + int cabl_base_value; > + int vcal_factor; > + int vscal_factor; > + int iscal_factor; > + > + unsigned int vcalb_adj_shift; > + > + unsigned int vcalb_vsense_reg; > + int vscal_factor_vsense_in; > + int vcalk_value_factor_vsense_in; > + unsigned int vcalk_dac_shift; > + unsigned int vcalk_dac_mask; > + unsigned int vcalk_dac_neg_mask; > + unsigned int vcalk_vdsel_mask; > +}; > + > +struct aw_mute_desc { > + unsigned int reg; > + unsigned int mask; > + unsigned int enable; > + unsigned int disable; > +}; > + > +struct aw_sysst_desc { > + unsigned int reg; > + unsigned int st_check; > + unsigned int st_mask; > + unsigned int pll_check; > + unsigned int dsp_check; > + unsigned int dsp_mask; > +}; > + > +struct aw_profctrl_desc { > + unsigned int reg; > + unsigned int mask; > + unsigned int rcv_mode_val; > + unsigned int cur_mode; > +}; > + > +struct aw_volume_desc { > + unsigned int reg; > + unsigned int mask; > + unsigned int shift; > + unsigned int init_volume; > + unsigned int mute_volume; > + unsigned int ctl_volume; > + unsigned int max_volume; > + unsigned int monitor_volume; > +}; > + > +struct aw_dsp_en_desc { > + unsigned int reg; > + unsigned int mask; > + unsigned int enable; > + unsigned int disable; > +}; > + > +struct aw_memclk_desc { > + unsigned int reg; > + unsigned int mask; > + unsigned int mcu_hclk; > + unsigned int osc_clk; > +}; > + > +struct aw_watch_dog_desc { > + unsigned int reg; > + unsigned int mask; > +}; > + > +struct aw_dsp_mem_desc { > + unsigned int dsp_madd_reg; > + unsigned int dsp_mdat_reg; > + unsigned int dsp_fw_base_addr; > + unsigned int dsp_cfg_base_addr; > +}; > + > +struct aw_voltage_desc { > + unsigned int reg; > + unsigned int vbat_range; > + unsigned int int_bit; > +}; > + > +struct aw_temperature_desc { > + unsigned int reg; > + unsigned int sign_mask; > + unsigned int neg_mask; > +}; > + > +struct aw_ipeak_desc { > + unsigned int reg; > + unsigned int mask; > +}; > + > +struct aw_vmax_desc { > + unsigned int dsp_reg; > + unsigned char data_type; > + unsigned int init_vmax; > +}; > + > +struct aw_soft_rst { > + uint8_t reg; > + uint16_t reg_value; > +}; > + > +struct aw_cali_cfg_desc { > + unsigned int actampth_reg; > + unsigned char actampth_data_type; > + > + unsigned int noiseampth_reg; > + unsigned char noiseampth_data_type; > + > + unsigned int ustepn_reg; > + unsigned char ustepn_data_type; > + > + unsigned int alphan_reg; > + unsigned int alphan_data_type; > +}; > + > +struct aw_dsp_vol_desc { > + unsigned int reg; > + unsigned int mute_st; > + unsigned int noise_st; > + unsigned int mask; > +}; > + > +struct aw_amppd_desc { > + unsigned int reg; > + unsigned int mask; > + unsigned int enable; > + unsigned int disable; > +}; > + > +struct aw_f0_desc { > + unsigned int dsp_reg; > + unsigned char data_type; > + unsigned int shift; > +}; > + > +struct aw_cfgf0_fs_desc { > + unsigned int dsp_reg; > + unsigned char data_type; > +}; > + > +struct aw_q_desc { > + unsigned int dsp_reg; > + unsigned char data_type; > + unsigned int shift; > +}; > + > +struct aw_ra_desc { > + unsigned int dsp_reg; > + unsigned char data_type; > +}; > + > +struct aw_noise_desc { > + unsigned int dsp_reg; > + unsigned char data_type; > + unsigned int mask; > +}; > + > +struct aw_hw_mon_desc { > + unsigned int dsp_reg; > + unsigned char data_type; > + unsigned int mask; > + unsigned int enable; > + unsigned int disable; > +}; > + > +struct aw_ste_re_desc { > + unsigned int dsp_reg; > + unsigned char data_type; > + unsigned int shift; > +}; > + > +struct aw_adpz_re_desc { > + unsigned int dsp_reg; > + unsigned char data_type; > + unsigned int shift; > +}; > + > +struct aw_adpz_t0_desc { > + unsigned int dsp_reg; > + unsigned char data_type; > + uint16_t coilalpha_reg; > + unsigned char coil_type; > +}; > + > +struct aw_spkr_temp_desc { > + unsigned int reg; > +}; > + > +struct aw_dsp_crc_desc { > + unsigned int ctl_reg; > + unsigned int ctl_mask; > + unsigned int ctl_enable; > + unsigned int ctl_disable; > + > + unsigned int dsp_reg; > + unsigned char data_type; > +}; > + > +struct aw_cco_mux_desc { > + unsigned int reg; > + unsigned int mask; > + unsigned int divider; > + unsigned int bypass; > +}; > + > +struct aw_hw_temp_desc { > + unsigned int dsp_reg; > + unsigned char data_type; > +}; > + > +struct aw_re_range_desc { > + uint32_t re_min; > + uint32_t re_max; > + uint32_t re_min_default; > + uint32_t re_max_default; > +}; > + > +struct aw_cali_delay_desc { > + unsigned int dsp_reg; > + unsigned char data_type; > + unsigned int delay; > +}; > + > +struct aw_chansel_desc { > + unsigned int rxchan_reg; > + unsigned int rxchan_mask; > + unsigned int txchan_reg; > + unsigned int txchan_mask; > + > + unsigned int rx_left; > + unsigned int rx_right; > + unsigned int tx_left; > + unsigned int tx_right; > +}; > + > +struct aw_tx_en_desc { > + unsigned int tx_en_mask; > + unsigned int tx_disable; > +}; > + > +struct aw_dsp_st { > + unsigned int dsp_reg_s1; > + unsigned int dsp_reg_e1; > + > + unsigned int dsp_reg_s2; > + unsigned int dsp_reg_e2; > +}; > + > +struct aw_container { > + int len; > + uint8_t data[]; > +}; > + > +struct aw_device { > + int status; > + struct mutex *i2c_lock; > + > + unsigned char cur_prof; /*current profile index*/ > + unsigned char set_prof; /*set profile index*/ > + unsigned char dsp_crc_st; > + uint16_t chip_id; > + > + unsigned int channel; /*pa channel select*/ > + unsigned int fade_step; > + > + struct i2c_client *i2c; > + struct device *dev; > + char *acf; > + void *private_data; > + > + uint32_t fade_en; > + unsigned char dsp_cfg; > + > + uint32_t dsp_fw_len; > + uint32_t dsp_cfg_len; > + uint8_t platform; > + uint8_t fw_status; /*load cfg status*/ > + struct aw_prof_info prof_info; > + struct aw_sec_data_desc crc_dsp_cfg; > + > + struct aw_int_desc int_desc; > + struct aw_pwd_desc pwd_desc; > + struct aw_mute_desc mute_desc; > + struct aw_vcalb_desc vcalb_desc; > + struct aw_sysst_desc sysst_desc; > + struct aw_profctrl_desc profctrl_desc; > + struct aw_volume_desc volume_desc; > + struct aw_dsp_en_desc dsp_en_desc; > + struct aw_memclk_desc memclk_desc; > + struct aw_watch_dog_desc watch_dog_desc; > + struct aw_dsp_mem_desc dsp_mem_desc; > + struct aw_voltage_desc voltage_desc; > + struct aw_temperature_desc temp_desc; > + struct aw_vmax_desc vmax_desc; > + struct aw_ipeak_desc ipeak_desc; > + struct aw_soft_rst soft_rst; > + struct aw_cali_cfg_desc cali_cfg_desc; > + struct aw_ra_desc ra_desc; > + struct aw_dsp_vol_desc dsp_vol_desc; > + struct aw_noise_desc noise_desc; > + struct aw_f0_desc f0_desc; > + struct aw_cfgf0_fs_desc cfgf0_fs_desc; > + struct aw_q_desc q_desc; > + struct aw_hw_mon_desc hw_mon_desc; > + struct aw_ste_re_desc ste_re_desc; > + struct aw_adpz_re_desc adpz_re_desc; > + struct aw_adpz_t0_desc t0_desc; > + struct aw_amppd_desc amppd_desc; > + struct aw_spkr_temp_desc spkr_temp_desc; > + struct aw_dsp_crc_desc dsp_crc_desc; > + struct aw_cco_mux_desc cco_mux_desc; > + struct aw_hw_temp_desc hw_temp_desc; > + > + struct aw_cali_desc cali_desc; > + struct aw_monitor_desc monitor_desc; > + struct aw_re_range_desc re_range; > + struct aw_spin_desc spin_desc; > + struct aw_chansel_desc chansel_desc; > + struct aw_tx_en_desc tx_en_desc; > + struct aw_cali_delay_desc cali_delay_desc; > + struct aw_dsp_st dsp_st_desc; > + > + struct aw_device_ops ops; > + struct list_head list_node; > +}; > + > + > +void aw883xx_dev_deinit(struct aw_device *aw_dev); > +int aw883xx_device_init(struct aw_device *aw_dev, struct aw_container *aw_prof); > +int aw883xx_device_start(struct aw_device *aw_dev); > +int aw883xx_device_stop(struct aw_device *aw_dev); > + > +int aw883xx_dev_fw_update(struct aw_device *aw_dev, bool up_dsp_fw_en, bool force_up_en); > +int aw883xx_dev_get_int_status(struct aw_device *aw_dev, uint16_t *int_status); > +void aw883xx_dev_set_volume_step(struct aw_device *aw_dev, unsigned int step); > +int aw883xx_dev_set_intmask(struct aw_device *aw_dev, bool flag); > +void aw883xx_dev_clear_int_status(struct aw_device *aw_dev); > +int aw883xx_dev_get_volume_step(struct aw_device *aw_dev); > +int aw883xx_device_probe(struct aw_device *aw_dev); > +int aw883xx_device_remove(struct aw_device *aw_dev); > +int aw883xx_dev_syspll_check(struct aw_device *aw_dev); > +int aw883xx_dev_get_dsp_status(struct aw_device *aw_dev); > + > +void aw883xx_dev_set_fade_vol_step(struct aw_device *aw_dev, unsigned int step); > +int aw883xx_dev_get_fade_vol_step(struct aw_device *aw_dev); > +void aw883xx_dev_get_fade_time(unsigned int *time, bool fade_in); > +void aw883xx_dev_set_fade_time(unsigned int time, bool fade_in); > +int aw883xx_dev_get_hmute(struct aw_device *aw_dev); > +int aw883xx_dev_sysst_check(struct aw_device *aw_dev); > +int aw883xx_dev_get_list_head(struct list_head **head); > +int aw883xx_dev_dsp_check(struct aw_device *aw_dev); > +void aw883xx_dev_memclk_select(struct aw_device *aw_dev, unsigned char flag); > +void aw883xx_dev_dsp_enable(struct aw_device *aw_dev, bool dsp); > +void aw883xx_dev_mute(struct aw_device *aw_dev, bool mute); > +int aw883xx_dev_dsp_fw_update(struct aw_device *aw_dev, > + uint8_t *data, uint32_t len); > +int aw883xx_dev_dsp_cfg_update(struct aw_device *aw_dev, > + uint8_t *data, uint32_t len); > +int aw883xx_dev_modify_dsp_cfg(struct aw_device *aw_dev, > + unsigned int addr, uint32_t dsp_data, unsigned char data_type); > +int aw883xx_dev_get_iis_status(struct aw_device *aw_dev); > +int aw883xx_dev_set_volume(struct aw_device *aw_dev, uint16_t set_vol); > +int aw883xx_dev_get_volume(struct aw_device *aw_dev, uint16_t *get_vol); > + > +#endif > + > diff --git a/sound/soc/codecs/aw883xx/aw883xx_init.c b/sound/soc/codecs/aw883xx/aw883xx_init.c > new file mode 100644 > index 0000000..b34f92f > --- /dev/null > +++ b/sound/soc/codecs/aw883xx/aw883xx_init.c > @@ -0,0 +1,649 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * aw883xx.c -- ALSA Soc AW883XX codec support > + * > + * Copyright (c) 2020 AWINIC Technology CO., LTD > + * > + * Author: Bruce zhao <zhaolei(a)awinic.com> > + */ > + > +/*#define DEBUG*/ > +#include <linux/module.h> > +#include <linux/i2c.h> > +#include <sound/core.h> > +#include <sound/pcm.h> > +#include <sound/pcm_params.h> > +#include <sound/soc.h> > +#include <linux/of_gpio.h> > +#include <linux/delay.h> > +#include <linux/device.h> > +#include <linux/firmware.h> > +#include <linux/version.h> > +#include <linux/workqueue.h> > +#include <linux/syscalls.h> > +#include <sound/control.h> > +#include <linux/uaccess.h> > +#include <linux/syscalls.h> > + > +#include "aw883xx.h" > +#include "aw883xx_bin_parse.h" > +#include "aw883xx_pid_2049_reg.h" > +#include "aw883xx_log.h" > + > +#define AW_FW_CHECK_PART (10) > + > + > +static int aw883xx_dev_i2c_writes(struct aw_device *aw_dev, > + uint8_t reg_addr, uint8_t *buf, uint16_t len) > +{ > + struct aw883xx *aw883xx = (struct aw883xx *)aw_dev->private_data; > + > + return aw883xx_i2c_writes(aw883xx, reg_addr, buf, len); > +} > + > +static int aw883xx_dev_i2c_write(struct aw_device *aw_dev, > + uint8_t reg_addr, uint16_t reg_data) > +{ > + struct aw883xx *aw883xx = (struct aw883xx *)aw_dev->private_data; > + > + return aw883xx_i2c_write(aw883xx, reg_addr, reg_data); > +} > + > +static int aw883xx_dev_i2c_read(struct aw_device *aw_dev, > + uint8_t reg_addr, uint16_t *reg_data) > +{ > + struct aw883xx *aw883xx = (struct aw883xx *)aw_dev->private_data; > + > + return aw883xx_i2c_read(aw883xx, reg_addr, reg_data); > +} > + > + > +static int aw883xx_dev_reg_read(struct aw_device *aw_dev, > + uint8_t reg_addr, uint16_t *reg_data) > +{ > + struct aw883xx *aw883xx = (struct aw883xx *)aw_dev->private_data; > + > + return aw883xx_reg_read(aw883xx, reg_addr, reg_data); > +} > + > +static int aw883xx_dev_reg_write(struct aw_device *aw_dev, > + uint8_t reg_addr, uint16_t reg_data) > +{ > + struct aw883xx *aw883xx = (struct aw883xx *)aw_dev->private_data; > + > + return aw883xx_reg_write(aw883xx, reg_addr, reg_data); > +} > + > +static int aw883xx_dev_reg_write_bits(struct aw_device *aw_dev, > + uint8_t reg_addr, uint16_t mask, uint16_t reg_data) > +{ > + struct aw883xx *aw883xx = (struct aw883xx *)aw_dev->private_data; > + > + return aw883xx_reg_write_bits(aw883xx, reg_addr, mask, reg_data); > +} > + > +static int aw883xx_dev_dsp_write(struct aw_device *aw_dev, > + uint16_t dsp_addr, uint32_t dsp_data, uint8_t data_type) > +{ > + struct aw883xx *aw883xx = (struct aw883xx *)aw_dev->private_data; > + > + return aw883xx_dsp_write(aw883xx, dsp_addr, dsp_data, data_type); > +} > + > +static int aw883xx_dev_dsp_read(struct aw_device *aw_dev, > + uint16_t dsp_addr, uint32_t *dsp_data, uint8_t data_type) > +{ > + struct aw883xx *aw883xx = (struct aw883xx *)aw_dev->private_data; > + > + return aw883xx_dsp_read(aw883xx, dsp_addr, dsp_data, data_type); > +} > + > + > +/* > + * aw883xx i2c write/read > + */ > +/*[9 : 6]: -6DB ; [5 : 0]: -0.125DB real_value = value * 8 : 0.125db --> 1*/ > +static unsigned int aw_pid_2049_reg_val_to_db(unsigned int value) > +{ > + return (((value >> AW_PID_2049_VOL_6DB_START) * AW_PID_2049_VOLUME_STEP_DB) + > + ((value & 0x3f) % AW_PID_2049_VOLUME_STEP_DB)); > +} > + > +/*[9 : 6]: -6DB ; [5 : 0]: -0.125DB reg_value = value / step << 6 + value % step ; step = 6 * 8*/ > +static uint16_t aw_pid_2049_db_val_to_reg(uint16_t value) > +{ > + return (((value / AW_PID_2049_VOLUME_STEP_DB) << AW_PID_2049_VOL_6DB_START) + > + (value % AW_PID_2049_VOLUME_STEP_DB)); > +} > + > +static int aw883xx_set_volume(struct aw883xx *aw883xx, uint16_t value) > +{ > + uint16_t reg_value = 0; > + uint16_t real_value = 0; > + uint16_t volume = 0; > + struct aw_volume_desc *vol_desc = &aw883xx->aw_pa->volume_desc; > + > + volume = AW_GET_MIN_VALUE(value, vol_desc->mute_volume); > + real_value = aw_pid_2049_db_val_to_reg(volume); > + > + /* cal real value */ > + aw883xx_reg_read(aw883xx, AW_PID_2049_SYSCTRL2_REG, &reg_value); > + > + aw_dev_dbg(aw883xx->dev, "value 0x%x , reg:0x%x", value, real_value); > + > + /*[15 : 6] volume*/ > + real_value = (real_value << AW_PID_2049_VOL_START_BIT) | (reg_value & AW_PID_2049_VOL_MASK); > + > + /* write value */ > + aw883xx_reg_write(aw883xx, AW_PID_2049_SYSCTRL2_REG, real_value); > + > + return 0; > +} > + > +static int aw883xx_get_volume(struct aw883xx *aw883xx, uint16_t *value) > +{ > + uint16_t reg_value = 0; > + uint16_t real_value = 0; > + > + /* read value */ > + aw883xx_reg_read(aw883xx, AW_PID_2049_SYSCTRL2_REG, &reg_value); > + > + /*[15 : 6] volume*/ > + real_value = reg_value >> AW_PID_2049_VOL_START_BIT; > + > + real_value = aw_pid_2049_reg_val_to_db(real_value); > + > + *value = real_value; > + > + return 0; > +} > + > +static int aw_pid_2049_set_volume(struct aw_device *aw_dev, uint16_t value) > +{ > + struct aw883xx *aw883xx = (struct aw883xx *)aw_dev->private_data; > + > + return aw883xx_set_volume(aw883xx, value); > +} > + > +static int aw_pid_2049_get_volume(struct aw_device *aw_dev, uint16_t *value) > +{ > + struct aw883xx *aw883xx = (struct aw883xx *)aw_dev->private_data; > + > + return aw883xx_get_volume(aw883xx, value); > +} > + > +static void aw_pid_2049_i2s_tx_enable(struct aw_device *aw_dev, bool flag) > +{ > + struct aw883xx *aw883xx = (struct aw883xx *)aw_dev->private_data; > + > + aw_dev_dbg(aw883xx->dev, "enter"); > + > + if (flag) { > + aw883xx_reg_write_bits(aw883xx, AW_PID_2049_I2SCFG1_REG, > + AW_PID_2049_I2STXEN_MASK, > + AW_PID_2049_I2STXEN_ENABLE_VALUE); > + } else { > + aw883xx_reg_write_bits(aw883xx, AW_PID_2049_I2SCFG1_REG, > + AW_PID_2049_I2STXEN_MASK, > + AW_PID_2049_I2STXEN_DISABLE_VALUE); > + } > +} > + > +static void aw_pid_2049_set_cfg_f0_fs(struct aw_device *aw_dev, uint32_t *f0_fs) > +{ > + uint16_t rate_data = 0; > + uint32_t fs = 0; > + struct aw883xx *aw883xx = (struct aw883xx *)aw_dev->private_data; > + > + aw_dev_dbg(aw883xx->dev, "enter"); > + aw883xx_reg_read(aw883xx, AW_PID_2049_I2SCTRL_REG, &rate_data); > + > + switch (rate_data & (~AW_PID_2049_I2SSR_MASK)) { > + case AW_PID_2049_I2SSR_8_KHZ_VALUE: > + fs = 8000; > + break; > + case AW_PID_2049_I2SSR_16_KHZ_VALUE: > + fs = 16000; > + break; > + case AW_PID_2049_I2SSR_32_KHZ_VALUE: > + fs = 32000; > + break; > + case AW_PID_2049_I2SSR_44_KHZ_VALUE: > + fs = 44000; > + break; > + case AW_PID_2049_I2SSR_48_KHZ_VALUE: > + fs = 48000; > + break; > + case AW_PID_2049_I2SSR_96_KHZ_VALUE: > + fs = 96000; > + break; > + case AW_PID_2049_I2SSR_192KHZ_VALUE: > + fs = 192000; > + break; > + default: > + fs = 48000; > + aw_dev_err(aw883xx->dev, > + "rate can not support, use default 48k"); > + break; > + } > + > + aw_dev_dbg(aw883xx->dev, "get i2s fs:%d", fs); > + *f0_fs = fs / 8; > + > + aw883xx_dsp_write(aw883xx, > + AW_PID_2049_DSP_REG_CFGF0_FS, *f0_fs, AW_DSP_32_DATA); > +} > + > +static bool aw_pid_2049_check_rd_access(int reg) > +{ > + if (reg >= AW_PID_2049_REG_MAX) > + return false; > + > + if (aw_pid_2049_reg_access[reg] & REG_RD_ACCESS) > + return true; > + else > + return false; > +} > + > +static bool aw_pid_2049_check_wr_access(int reg) > +{ > + if (reg >= AW_PID_2049_REG_MAX) > + return false; > + > + if (aw_pid_2049_reg_access[reg] & REG_WR_ACCESS) > + return true; > + else > + return false; > +} > + > +static int aw_pid_2049_get_reg_num(void) > +{ > + return AW_PID_2049_REG_MAX; > +} > + > +static int aw_pid_2049_get_hw_mon_st(struct aw_device *aw_dev, > + bool *is_enable, uint8_t *temp_flag) > +{ > + int ret = 0; > + uint32_t vbat_en = 0; > + uint32_t temp_en = 0; > + uint32_t temp_switch = 0; > + struct aw883xx *aw883xx = (struct aw883xx *)aw_dev->private_data; > + > + ret = aw883xx_dsp_read(aw883xx, > + AW_PID_2049_DSP_REG_CFG_MBMEC_GLBCFG, &vbat_en, AW_DSP_16_DATA); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "read hardware monitor status failed"); > + return ret; > + } > + > + ret = aw883xx_dsp_read(aw883xx, > + AW_PID_2049_DSP_REG_TEMP_SWITCH, &temp_en, AW_DSP_16_DATA); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "read hardware temp switch failed"); > + return ret; > + } > + > + temp_switch = temp_en; > + vbat_en &= (~AW_PID_2049_DSP_MONITOR_MASK); > + temp_en &= (~AW_PID_2049_DSP_TEMP_PEAK_MASK); > + temp_switch &= (~AW_PID_2049_DSP_TEMP_SEL_FLAG); > + > + if (vbat_en || temp_en) > + *is_enable = true; > + else > + *is_enable = false; > + > + if (temp_switch) > + *temp_flag = AW_EXTERNAL_TEMP; > + else > + *temp_flag = AW_INTERNAL_TEMP; > + > + return 0; > +} > + > +static int aw_pid_2049_cali_get_iv_st(struct aw_device *aw_dev) > +{ > + struct aw883xx *aw883xx = (struct aw883xx *)aw_dev->private_data; > + int ret; > + uint16_t reg_data = 0; > + int i; > + > + aw_dev_info(aw_dev->dev, "enter"); > + > + for (i = 0; i < AW_GET_IV_CNT_MAX; i++) { > + ret = aw883xx_reg_read(aw883xx, AW_PID_2049_ASR1_REG, &reg_data); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, > + "read 0x%x failed", AW_PID_2049_ASR1_REG); > + return ret; > + } > + > + reg_data &= (~AW_PID_2049_ReAbs_MASK); > + if (!reg_data) > + return 0; > + msleep(30); > + } > + > + aw_dev_err(aw883xx->dev, "IV data abnormal, please check"); > + > + return -EINVAL; > +} > + > +static int aw_pid_2049_dsp_fw_check(struct aw_device *aw_dev) > +{ > + struct aw_prof_desc *set_prof_desc = NULL; > + struct aw_sec_data_desc *dsp_fw_desc = NULL; > + uint16_t base_addr = AW_PID_2049_DSP_FW_ADDR; > + uint16_t addr = base_addr; > + int ret, i; > + uint32_t dsp_val; > + uint16_t bin_val; > + > + aw_dev_info(aw_dev->dev, "enter"); > + > + ret = aw883xx_dev_get_prof_data(aw_dev, aw_dev->cur_prof, &set_prof_desc); > + if (ret < 0) > + return ret; > + > + /*update reg*/ > + dsp_fw_desc = &set_prof_desc->sec_desc[AW_DATA_TYPE_DSP_FW]; > + > + for (i = 0; i < AW_FW_CHECK_PART; i++) { > + ret = aw883xx_dev_dsp_read(aw_dev, addr, &dsp_val, AW_DSP_16_DATA); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "dsp read failed"); > + return ret; > + } > + > + bin_val = AW_GET_16_DATA(dsp_fw_desc->data[2 * (addr - base_addr)], > + dsp_fw_desc->data[2 * (addr - base_addr) + 1]); > + > + if (dsp_val != bin_val) { > + aw_dev_err(aw_dev->dev, "check failed, addr[0x%x], read[0x%x] != bindata[0x%x]", > + addr, dsp_val, bin_val); > + return -EINVAL; > + } > + > + addr += (dsp_fw_desc->len / 2) / AW_FW_CHECK_PART; > + if ((addr - base_addr) > dsp_fw_desc->len) { > + aw_dev_err(aw_dev->dev, "check failed, addr[0x%x] too large", addr); > + return -EINVAL; > + } > + } > + > + aw_dev_info(aw_dev->dev, "dsp fw check success"); > + > + return 0; > +} > + > +static int aw883xx_dev_init(struct aw883xx *aw883xx) > +{ > + struct aw_device *aw_pa = NULL; > + > + aw_pa = devm_kzalloc(aw883xx->dev, sizeof(struct aw_device), GFP_KERNEL); > + if (aw_pa == NULL) > + return -ENOMEM; > + > + /*call aw device init func*/ > + aw_pa->acf = NULL; > + aw_pa->prof_info.prof_desc = NULL; > + aw_pa->prof_info.count = 0; > + aw_pa->prof_info.prof_type = AW_DEV_NONE_TYPE_ID; > + aw_pa->channel = 0; > + aw_pa->i2c_lock = &aw883xx->i2c_lock; > + aw_pa->i2c = aw883xx->i2c; > + aw_pa->fw_status = AW_DEV_FW_FAILED; > + aw_pa->fade_step = AW_PID_2049_VOLUME_STEP_DB; > + aw_pa->re_range.re_min_default = AW_RE_MIN; > + aw_pa->re_range.re_max_default = AW_RE_MAX; > + aw_pa->monitor_desc.hw_monitor_delay = AW_HW_MONITOR_DELAY; > + > + aw_pa->chip_id = aw883xx->chip_id; > + aw_pa->private_data = (void *)aw883xx; > + aw_pa->dev = aw883xx->dev; > + aw_pa->ops.aw_get_version = aw883xx_get_version; > + aw_pa->ops.aw_i2c_writes = aw883xx_dev_i2c_writes; > + aw_pa->ops.aw_i2c_write = aw883xx_dev_i2c_write; > + aw_pa->ops.aw_reg_write = aw883xx_dev_reg_write; > + aw_pa->ops.aw_reg_write_bits = aw883xx_dev_reg_write_bits; > + aw_pa->ops.aw_i2c_read = aw883xx_dev_i2c_read; > + aw_pa->ops.aw_reg_read = aw883xx_dev_reg_read; > + aw_pa->ops.aw_dsp_read = aw883xx_dev_dsp_read; > + aw_pa->ops.aw_dsp_write = aw883xx_dev_dsp_write; > + aw_pa->ops.aw_get_dev_num = aw883xx_get_dev_num; > + > + aw_pa->ops.aw_get_hw_volume = aw_pid_2049_get_volume; > + aw_pa->ops.aw_set_hw_volume = aw_pid_2049_set_volume; > + aw_pa->ops.aw_reg_val_to_db = aw_pid_2049_reg_val_to_db; > + > + aw_pa->ops.aw_check_rd_access = aw_pid_2049_check_rd_access; > + aw_pa->ops.aw_check_wr_access = aw_pid_2049_check_wr_access; > + aw_pa->ops.aw_get_reg_num = aw_pid_2049_get_reg_num; > + > + aw_pa->ops.aw_i2s_tx_enable = aw_pid_2049_i2s_tx_enable; > + aw_pa->ops.aw_get_hw_mon_st = aw_pid_2049_get_hw_mon_st; > + > + aw_pa->ops.aw_cali_svc_get_iv_st = aw_pid_2049_cali_get_iv_st; > + aw_pa->ops.aw_set_cfg_f0_fs = aw_pid_2049_set_cfg_f0_fs; > + aw_pa->ops.aw_dsp_fw_check = aw_pid_2049_dsp_fw_check; > + > + aw_pa->int_desc.mask_reg = AW_PID_2049_SYSINTM_REG; > + aw_pa->int_desc.mask_default = AW_PID_2049_SYSINTM_DEFAULT; > + aw_pa->int_desc.int_mask = AW_PID_2049_SYSINTM_DEFAULT; > + aw_pa->int_desc.st_reg = AW_PID_2049_SYSINT_REG; > + aw_pa->int_desc.intst_mask = AW_PID_2049_BIT_SYSINT_CHECK; > + > + aw_pa->pwd_desc.reg = AW_PID_2049_SYSCTRL_REG; > + aw_pa->pwd_desc.mask = AW_PID_2049_PWDN_MASK; > + aw_pa->pwd_desc.enable = AW_PID_2049_PWDN_POWER_DOWN_VALUE; > + aw_pa->pwd_desc.disable = AW_PID_2049_PWDN_WORKING_VALUE; > + > + aw_pa->mute_desc.reg = AW_PID_2049_SYSCTRL_REG; > + aw_pa->mute_desc.mask = AW_PID_2049_HMUTE_MASK; > + aw_pa->mute_desc.enable = AW_PID_2049_HMUTE_ENABLE_VALUE; > + aw_pa->mute_desc.disable = AW_PID_2049_HMUTE_DISABLE_VALUE; > + > + aw_pa->vcalb_desc.vcalb_dsp_reg = AW_PID_2049_DSP_REG_VCALB; > + aw_pa->vcalb_desc.data_type = AW_DSP_16_DATA; > + aw_pa->vcalb_desc.vcal_factor = AW_PID_2049_VCAL_FACTOR; > + aw_pa->vcalb_desc.cabl_base_value = AW_PID_2049_CABL_BASE_VALUE; > + aw_pa->vcalb_desc.vscal_factor = AW_PID_2049_VSCAL_FACTOR; > + aw_pa->vcalb_desc.iscal_factor = AW_PID_2049_ISCAL_FACTOR; > + > + aw_pa->vcalb_desc.vcalb_adj_shift = AW_PID_2049_VCALB_ADJ_FACTOR; > + > + aw_pa->vcalb_desc.icalk_value_factor = AW_PID_2049_ICABLK_FACTOR; > + aw_pa->vcalb_desc.icalk_reg = AW_PID_2049_EFRM2_REG; > + aw_pa->vcalb_desc.icalk_reg_mask = AW_PID_2049_EF_ISN_GESLP_MASK; > + aw_pa->vcalb_desc.icalk_sign_mask = AW_PID_2049_EF_ISN_GESLP_SIGN_MASK; > + aw_pa->vcalb_desc.icalk_neg_mask = AW_PID_2049_EF_ISN_GESLP_SIGN_NEG; > + > + aw_pa->vcalb_desc.vcalk_reg = AW_PID_2049_EFRH_REG; > + aw_pa->vcalb_desc.vcalk_reg_mask = AW_PID_2049_EF_VSN_GESLP_MASK; > + aw_pa->vcalb_desc.vcalk_sign_mask = AW_PID_2049_EF_VSN_GESLP_SIGN_MASK; > + aw_pa->vcalb_desc.vcalk_neg_mask = AW_PID_2049_EF_VSN_GESLP_SIGN_NEG; > + aw_pa->vcalb_desc.vcalk_value_factor = AW_PID_2049_VCABLK_FACTOR; > + aw_pa->vcalb_desc.vcalk_shift = AW_PID_2049_EF_VSENSE_GAIN_SHIFT; > + > + aw_pa->vcalb_desc.vcalb_vsense_reg = AW_PID_2049_I2SCFG3_REG; > + aw_pa->vcalb_desc.vcalk_vdsel_mask = AW_PID_2049_VDSEL_MASK; > + aw_pa->vcalb_desc.vcalk_value_factor_vsense_in = AW_PID_2049_VCABLK_FACTOR_DAC; > + aw_pa->vcalb_desc.vscal_factor_vsense_in = AW_PID_2049_VSCAL_FACTOR_DAC; > + aw_pa->vcalb_desc.vcalk_dac_shift = AW_PID_2049_EF_DAC_GESLP_SHIFT; > + aw_pa->vcalb_desc.vcalk_dac_mask = AW_PID_2049_EF_DAC_GESLP_SIGN_MASK; > + aw_pa->vcalb_desc.vcalk_dac_neg_mask = AW_PID_2049_EF_DAC_GESLP_SIGN_NEG; > + > + aw_pa->sysst_desc.reg = AW_PID_2049_SYSST_REG; > + aw_pa->sysst_desc.st_check = AW_PID_2049_BIT_SYSST_CHECK; > + aw_pa->sysst_desc.st_mask = AW_PID_2049_BIT_SYSST_CHECK_MASK; > + aw_pa->sysst_desc.pll_check = AW_PID_2049_BIT_PLL_CHECK; > + aw_pa->sysst_desc.dsp_check = AW_PID_2049_DSPS_NORMAL_VALUE; > + aw_pa->sysst_desc.dsp_mask = AW_PID_2049_DSPS_MASK; > + > + aw_pa->profctrl_desc.reg = AW_PID_2049_SYSCTRL_REG; > + aw_pa->profctrl_desc.mask = AW_PID_2049_RCV_MODE_MASK; > + aw_pa->profctrl_desc.rcv_mode_val = AW_PID_2049_RCV_MODE_RECEIVER_VALUE; > + > + aw_pa->volume_desc.reg = AW_PID_2049_SYSCTRL2_REG; > + aw_pa->volume_desc.mask = AW_PID_2049_VOL_MASK; > + aw_pa->volume_desc.shift = AW_PID_2049_VOL_START_BIT; > + aw_pa->volume_desc.mute_volume = AW_PID_2049_MUTE_VOL; > + aw_pa->volume_desc.max_volume = AW_PID_2049_VOL_DEFAULT_VALUE; > + aw_pa->volume_desc.ctl_volume = AW_PID_2049_VOL_DEFAULT_VALUE; > + > + aw_pa->dsp_en_desc.reg = AW_PID_2049_SYSCTRL_REG; > + aw_pa->dsp_en_desc.mask = AW_PID_2049_DSPBY_MASK; > + aw_pa->dsp_en_desc.enable = AW_PID_2049_DSPBY_WORKING_VALUE; > + aw_pa->dsp_en_desc.disable = AW_PID_2049_DSPBY_BYPASS_VALUE; > + > + aw_pa->memclk_desc.reg = AW_PID_2049_DBGCTRL_REG; > + aw_pa->memclk_desc.mask = AW_PID_2049_MEM_CLKSEL_MASK; > + aw_pa->memclk_desc.mcu_hclk = AW_PID_2049_MEM_CLKSEL_DAP_HCLK_VALUE; > + aw_pa->memclk_desc.osc_clk = AW_PID_2049_MEM_CLKSEL_OSC_CLK_VALUE; > + > + aw_pa->watch_dog_desc.reg = AW_PID_2049_WDT_REG; > + aw_pa->watch_dog_desc.mask = AW_PID_2049_WDT_CNT_MASK; > + > + aw_pa->dsp_mem_desc.dsp_madd_reg = AW_PID_2049_DSPMADD_REG; > + aw_pa->dsp_mem_desc.dsp_mdat_reg = AW_PID_2049_DSPMDAT_REG; > + aw_pa->dsp_mem_desc.dsp_cfg_base_addr = AW_PID_2049_DSP_CFG_ADDR; > + aw_pa->dsp_mem_desc.dsp_fw_base_addr = AW_PID_2049_DSP_FW_ADDR; > + > + aw_pa->voltage_desc.reg = AW_PID_2049_VBAT_REG; > + aw_pa->voltage_desc.vbat_range = AW_PID_2049_VBAT_RANGE; > + aw_pa->voltage_desc.int_bit = AW_PID_2049_INT_10BIT; > + > + aw_pa->temp_desc.reg = AW_PID_2049_TEMP_REG; > + aw_pa->temp_desc.sign_mask = AW_PID_2049_TEMP_SIGN_MASK; > + aw_pa->temp_desc.neg_mask = AW_PID_2049_TEMP_NEG_MASK; > + > + aw_pa->vmax_desc.dsp_reg = AW_PID_2049_DSP_REG_VMAX; > + aw_pa->vmax_desc.data_type = AW_DSP_16_DATA; > + > + aw_pa->ipeak_desc.reg = AW_PID_2049_SYSCTRL2_REG; > + aw_pa->ipeak_desc.mask = AW_PID_2049_BST_IPEAK_MASK; > + > + aw_pa->soft_rst.reg = AW_PID_2049_ID_REG; > + aw_pa->soft_rst.reg_value = AW_PID_2049_SOFT_RESET_VALUE; > + > + aw_pa->dsp_vol_desc.reg = AW_PID_2049_DSPCFG_REG; > + aw_pa->dsp_vol_desc.mask = AW_PID_2049_DSP_VOL_MASK; > + aw_pa->dsp_vol_desc.mute_st = AW_PID_2049_DSP_VOL_MUTE; > + aw_pa->dsp_vol_desc.noise_st = AW_PID_2049_DSP_VOL_NOISE_ST; > + > + aw_pa->amppd_desc.reg = AW_PID_2049_SYSCTRL_REG; > + aw_pa->amppd_desc.mask = AW_PID_2049_AMPPD_MASK; > + aw_pa->amppd_desc.enable = AW_PID_2049_AMPPD_POWER_DOWN_VALUE; > + aw_pa->amppd_desc.disable = AW_PID_2049_AMPPD_WORKING_VALUE; > + > + aw_pa->spkr_temp_desc.reg = AW_PID_2049_ASR2_REG; > + > + /*32-bit data types need bypass dsp*/ > + aw_pa->ra_desc.dsp_reg = AW_PID_2049_DSP_REG_CFG_ADPZ_RA; > + aw_pa->ra_desc.data_type = AW_DSP_32_DATA; > + > + /*32-bit data types need bypass dsp*/ > + aw_pa->cali_cfg_desc.actampth_reg = AW_PID_2049_DSP_REG_CFG_MBMEC_ACTAMPTH; > + aw_pa->cali_cfg_desc.actampth_data_type = AW_DSP_32_DATA; > + > + /*32-bit data types need bypass dsp*/ > + aw_pa->cali_cfg_desc.noiseampth_reg = AW_PID_2049_DSP_REG_CFG_MBMEC_NOISEAMPTH; > + aw_pa->cali_cfg_desc.noiseampth_data_type = AW_DSP_32_DATA; > + > + aw_pa->cali_cfg_desc.ustepn_reg = AW_PID_2049_DSP_REG_CFG_ADPZ_USTEPN; > + aw_pa->cali_cfg_desc.ustepn_data_type = AW_DSP_16_DATA; > + > + aw_pa->cali_cfg_desc.alphan_reg = AW_PID_2049_DSP_REG_CFG_RE_ALPHA; > + aw_pa->cali_cfg_desc.alphan_data_type = AW_DSP_16_DATA; > + > + /*32-bit data types need bypass dsp*/ > + aw_pa->adpz_re_desc.dsp_reg = AW_PID_2049_DSP_REG_CFG_ADPZ_RE; > + aw_pa->adpz_re_desc.data_type = AW_DSP_32_DATA; > + aw_pa->adpz_re_desc.shift = AW_PID_2049_DSP_RE_SHIFT; > + > + aw_pa->t0_desc.dsp_reg = AW_PID_2049_DSP_CFG_ADPZ_T0; > + aw_pa->t0_desc.data_type = AW_DSP_16_DATA; > + aw_pa->t0_desc.coilalpha_reg = AW_PID_2049_DSP_CFG_ADPZ_COILALPHA; > + aw_pa->t0_desc.coil_type = AW_DSP_16_DATA; > + > + aw_pa->ste_re_desc.shift = AW_PID_2049_DSP_REG_CALRE_SHIFT; > + aw_pa->ste_re_desc.dsp_reg = AW_PID_2049_DSP_REG_CALRE; > + aw_pa->ste_re_desc.data_type = AW_DSP_16_DATA; > + > + aw_pa->noise_desc.dsp_reg = AW_PID_2049_DSP_REG_CFG_MBMEC_GLBCFG; > + aw_pa->noise_desc.data_type = AW_DSP_16_DATA; > + aw_pa->noise_desc.mask = AW_PID_2049_DSP_REG_NOISE_MASK; > + > + aw_pa->f0_desc.dsp_reg = AW_PID_2049_DSP_REG_RESULT_F0; > + aw_pa->f0_desc.shift = AW_PID_2049_DSP_F0_SHIFT; > + aw_pa->f0_desc.data_type = AW_DSP_16_DATA; > + > + /*32-bit data types need bypass dsp*/ > + aw_pa->cfgf0_fs_desc.dsp_reg = AW_PID_2049_DSP_REG_CFGF0_FS; > + aw_pa->cfgf0_fs_desc.data_type = AW_DSP_32_DATA; > + > + aw_pa->q_desc.dsp_reg = AW_PID_2049_DSP_REG_RESULT_Q; > + aw_pa->q_desc.shift = AW_PID_2049_DSP_Q_SHIFT; > + aw_pa->q_desc.data_type = AW_DSP_16_DATA; > + > + /*32-bit data types need bypass dsp*/ > + aw_pa->dsp_crc_desc.dsp_reg = AW_PID_2049_DSP_REG_CRC_ADDR; > + aw_pa->dsp_crc_desc.data_type = AW_DSP_32_DATA; > + > + aw_pa->dsp_crc_desc.ctl_reg = AW_PID_2049_HAGCCFG7_REG; > + aw_pa->dsp_crc_desc.ctl_mask = AW_PID_2049_AGC_DSP_CTL_MASK; > + aw_pa->dsp_crc_desc.ctl_enable = AW_PID_2049_AGC_DSP_CTL_ENABLE_VALUE; > + aw_pa->dsp_crc_desc.ctl_disable = AW_PID_2049_AGC_DSP_CTL_DISABLE_VALUE; > + > + aw_pa->cco_mux_desc.reg = AW_PID_2049_PLLCTRL1_REG; > + aw_pa->cco_mux_desc.mask = AW_PID_2049_CCO_MUX_MASK; > + aw_pa->cco_mux_desc.divider = AW_PID_2049_CCO_MUX_DIVIDED_VALUE; > + aw_pa->cco_mux_desc.bypass = AW_PID_2049_CCO_MUX_BYPASS_VALUE; > + > + /*hw monitor temp reg*/ > + aw_pa->hw_temp_desc.dsp_reg = AW_PID_2049_DSP_REG_TEMP_ADDR; > + aw_pa->hw_temp_desc.data_type = AW_DSP_16_DATA; > + > + aw_pa->chansel_desc.rxchan_reg = AW_PID_2049_I2SCTRL_REG; > + aw_pa->chansel_desc.rxchan_mask = AW_PID_2049_CHSEL_MASK; > + aw_pa->chansel_desc.txchan_reg = AW_PID_2049_I2SCFG1_REG; > + aw_pa->chansel_desc.txchan_mask = AW_PID_2049_I2SCHS_MASK; > + > + aw_pa->chansel_desc.rx_left = AW_PID_2049_CHSEL_LEFT_VALUE; > + aw_pa->chansel_desc.rx_right = AW_PID_2049_CHSEL_RIGHT_VALUE; > + aw_pa->chansel_desc.tx_left = AW_PID_2049_I2SCHS_LEFT_VALUE; > + aw_pa->chansel_desc.tx_right = AW_PID_2049_I2SCHS_RIGHT_VALUE; > + > + aw_pa->tx_en_desc.tx_en_mask = AW_PID_2049_I2STXEN_MASK; > + aw_pa->tx_en_desc.tx_disable = AW_PID_2049_I2STXEN_DISABLE_VALUE; > + > + aw_pa->cali_delay_desc.dsp_reg = AW_PID_2049_DSP_CALI_F0_DELAY; > + aw_pa->cali_delay_desc.data_type = AW_DSP_16_DATA; > + > + aw_pa->dsp_st_desc.dsp_reg_s1 = AW_PID_2049_DSP_ST_S1; > + aw_pa->dsp_st_desc.dsp_reg_e1 = AW_PID_2049_DSP_ST_E1; > + aw_pa->dsp_st_desc.dsp_reg_s2 = AW_PID_2049_DSP_ST_S2; > + aw_pa->dsp_st_desc.dsp_reg_e2 = AW_PID_2049_DSP_ST_E2; > + > + aw883xx_device_probe(aw_pa); > + > + aw883xx->aw_pa = aw_pa; > + > + return 0; > +} > + > +int aw883xx_init(struct aw883xx *aw883xx) > +{ > + int ret = 0; > + > + if (aw883xx->chip_id == AW883XX_PID_2049) { > + ret = aw883xx_dev_init(aw883xx); > + } else { > + aw_dev_err(aw883xx->dev, "unsupported device"); > + return -EINVAL; > + } > + > + return ret; > +} > + > diff --git a/sound/soc/codecs/aw883xx/aw883xx_log.h b/sound/soc/codecs/aw883xx/aw883xx_log.h > new file mode 100644 > index 0000000..1667f43 > --- /dev/null > +++ b/sound/soc/codecs/aw883xx/aw883xx_log.h > @@ -0,0 +1,32 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +/* > + * aw883xx.c -- ALSA Soc AW883XX codec support > + * > + * Copyright (c) 2020 AWINIC Technology CO., LTD > + * > + * Author: Bruce zhao <zhaolei(a)awinic.com> > + */ > + > +#ifndef __AW883XX_LOG_H__ > +#define __AW883XX_LOG_H__ > + > +/* > + * print information control > + */ > +#define aw_dev_err(dev, format, ...) \ > + pr_err("[Awinic][%s]%s: " format "\n", dev_name(dev), __func__, ##__VA_ARGS__) > +#define aw_dev_info(dev, format, ...) \ > + pr_info("[Awinic][%s]%s: " format "\n", dev_name(dev), __func__, ##__VA_ARGS__) > +#define aw_dev_dbg(dev, format, ...) \ > + pr_debug("[Awinic][%s]%s: " format "\n", dev_name(dev), __func__, ##__VA_ARGS__) > + > +#define aw_pr_err(format, ...) \ > + pr_err("[Awinic]%s: " format "\n", __func__, ##__VA_ARGS__) > +#define aw_pr_info(format, ...) \ > + pr_info("[Awinic]%s: " format "\n", __func__, ##__VA_ARGS__) > +#define aw_pr_dbg(format, ...) \ > + pr_debug("[Awinic]%s: " format "\n", __func__, ##__VA_ARGS__) > + > + > +#endif > + > diff --git a/sound/soc/codecs/aw883xx/aw883xx_monitor.c b/sound/soc/codecs/aw883xx/aw883xx_monitor.c > new file mode 100644 > index 0000000..1897d40 > --- /dev/null > +++ b/sound/soc/codecs/aw883xx/aw883xx_monitor.c > @@ -0,0 +1,1197 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * awinic_monitor.c monitor_module > + * > + * Copyright (c) 2019 AWINIC Technology CO., LTD > + * > + * Author: Nick Li <liweilei(a)awinic.com.cn> > + */ > + > +#include <linux/module.h> > +#include <linux/i2c.h> > +#include <sound/core.h> > +#include <sound/pcm.h> > +#include <sound/pcm_params.h> > +#include <sound/soc.h> > +#include <linux/of_gpio.h> > +#include <linux/delay.h> > +#include <linux/device.h> > +#include <linux/firmware.h> > +#include <linux/of.h> > +#include <linux/version.h> > +#include <linux/input.h> > +#include <linux/timer.h> > +#include <linux/workqueue.h> > +#include <linux/hrtimer.h> > +#include <linux/power_supply.h> > +#include "aw883xx_monitor.h" > +#include "aw883xx_log.h" > +#include "aw883xx_device.h" > +#include "aw883xx.h" > +#include "aw883xx_calib.h" > + > + > +#define AW883XX_MONITOR_NAME "aw883xx_monitor.bin" > + > +/* > + * device monitor > + */ > + #ifndef AW_SYS_BATTERY_ST > +static int aw_monitor_get_chip_voltage(struct aw_device *aw_dev, > + unsigned int *vol) > +{ > + int ret = -1; > + uint16_t local_vol = 0; > + struct aw_voltage_desc *desc = &aw_dev->voltage_desc; > + > + ret = aw_dev->ops.aw_reg_read(aw_dev, desc->reg, (uint16_t *)vol); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "read voltage failed!"); > + return ret; > + } > + > + if (desc->int_bit == 0) { > + aw_dev_err(aw_dev->dev, "desc->int_bit:%d unsupported", desc->int_bit); > + return -EINVAL; > + } > + > + local_vol = ((*vol) * desc->vbat_range) / desc->int_bit; > + > + *vol = local_vol; > + > + aw_dev_info(aw_dev->dev, "chip voltage is %d", *vol); > + > + return 0; > +} > + > +static int aw_monitor_get_chip_temperature(struct aw_device *aw_dev, int *temp) > +{ > + int ret = -1; > + uint16_t reg_val = 0; > + uint16_t local_temp; > + struct aw_temperature_desc *desc = &aw_dev->temp_desc; > + > + ret = aw_dev->ops.aw_reg_read(aw_dev, desc->reg, &reg_val); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "get temperature failed!"); > + return ret; > + } > + > + local_temp = reg_val; > + > + if (local_temp & (~desc->sign_mask)) > + local_temp = local_temp | desc->neg_mask; > + > + *temp = (int)((int16_t)local_temp); > + > + aw_dev_info(aw_dev->dev, "chip temperature = %d", *temp); > + return 0; > +} > +#endif > + > +static int aw_monitor_get_battery_state(struct aw_device *aw_dev, > + int *data, int data_type) > +{ > + char name[] = "battery"; > + int ret = -1; > + union power_supply_propval prop = { 0 }; > + struct power_supply *psy = NULL; > + > + psy = power_supply_get_by_name(name); > + if (psy) { > + ret = power_supply_get_property(psy, data_type, &prop); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "get data failed"); > + return -EINVAL; > + } > + *data = prop.intval; > + aw_dev_dbg(aw_dev->dev, "get system data: %d", *data); > + } else { > + aw_dev_err(aw_dev->dev, "no struct power supply name : %s", name); > + return -EINVAL; > + } > + > + return 0; > +} > + > +static int aw_monitor_get_system_temperature(struct aw_device *aw_dev, int *temp) > +{ > + int ret = -1; > + int sys_temp; > + > + ret = aw_monitor_get_battery_state(aw_dev, &sys_temp, POWER_SUPPLY_PROP_TEMP); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "get system temperature failed!"); > + return ret; > + } > + > + *temp = sys_temp / 10; > + aw_dev_dbg(aw_dev->dev, "system temperature = %d", *temp); > + > + return ret; > +} > + > +static int aw_monitor_set_system_temperature(struct aw_device *aw_dev, int sys_temp) > +{ > + int ret = -1; > + struct aw_hw_temp_desc *hw_temp_desc = &aw_dev->hw_temp_desc; > + > + ret = aw_dev->ops.aw_dsp_write(aw_dev, hw_temp_desc->dsp_reg, > + sys_temp, hw_temp_desc->data_type); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "set system temperature failed!"); > + return ret; > + } > + > + return ret; > +} > + > +#ifdef AW_SYS_BATTERY_ST > +static int aw_monitor_get_system_voltage(struct aw_device *aw_dev, unsigned int *vol) > +{ > + int ret = -1; > + unsigned int sys_vol; > + > + ret = aw_monitor_get_battery_state(aw_dev, &sys_vol, POWER_SUPPLY_PROP_VOLTAGE_NOW); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "get system voltage failed!"); > + return ret; > + } > + > + *vol = sys_vol / 1000; > + aw_dev_dbg(aw_dev->dev, "system voltage = %d", *vol); > + > + return ret; > +} > +#endif > + > +static int aw_monitor_get_temperature(struct aw_device *aw_dev, int *temp) > +{ > +#ifdef AW_SYS_BATTERY_ST > + return aw_monitor_get_system_temperature(aw_dev, temp); > +#else > + return aw_monitor_get_chip_temperature(aw_dev, temp); > +#endif > +} > + > +static int aw_monitor_get_voltage(struct aw_device *aw_dev, unsigned int *vol) > +{ > +#ifdef AW_SYS_BATTERY_ST > + return aw_monitor_get_system_voltage(aw_dev, vol); > +#else > + return aw_monitor_get_chip_voltage(aw_dev, vol); > +#endif > +} > + > +static int aw_monitor_get_temp_and_vol(struct aw_device *aw_dev) > +{ > + struct aw_monitor_desc *monitor = &aw_dev->monitor_desc; > + unsigned int voltage = 0; > + int current_temp = 0; > + int ret = -1; > + > +#ifdef AW_DEBUG > + if (monitor->test_vol == 0) { > + ret = aw_monitor_get_voltage(aw_dev, &voltage); > + if (ret < 0) > + return ret; > + } else { > + voltage = monitor->test_vol; > + } > + > + if (monitor->test_temp == 0) { > + ret = aw_monitor_get_temperature(aw_dev, &current_temp); > + if (ret < 0) > + return ret; > + } else { > + current_temp = monitor->test_temp; > + } > +#else > + ret = aw_monitor_get_voltage(aw_dev, &voltage); > + if (ret < 0) > + return ret; > + > + ret = aw_monitor_get_temperature(aw_dev, &current_temp); > + if (ret < 0) > + return ret; > +#endif > + > + monitor->vol_trace.sum_val += voltage; > + monitor->temp_trace.sum_val += current_temp; > + monitor->samp_count++; > + > + return 0; > +} > + > +static int aw_monitor_first_get_data_form_table(struct aw_device *aw_dev, > + struct aw_table_info table_info, > + struct aw_monitor_trace *data_trace) > +{ > + int i; > + > + if (table_info.aw_table == NULL) { > + aw_dev_err(aw_dev->dev, "table_info.aw_table is null"); > + return -EINVAL; > + } > + > + for (i = 0; i < table_info.table_num; i++) { > + if (data_trace->sum_val >= table_info.aw_table[i].min_val) { > + memcpy(&data_trace->aw_table, &table_info.aw_table[i], > + sizeof(struct aw_table)); > + break; > + } > + } > + return 0; > +} > + > +static int aw_monitor_trace_data_from_table(struct aw_device *aw_dev, > + struct aw_table_info table_info, > + struct aw_monitor_trace *data_trace) > +{ > + int i; > + > + if (table_info.aw_table == NULL) { > + aw_dev_err(aw_dev->dev, "table_info.aw_table is null"); > + return -EINVAL; > + } > + > + for (i = 0; i < table_info.table_num; i++) { > + if (data_trace->sum_val >= table_info.aw_table[i].min_val && > + data_trace->sum_val <= table_info.aw_table[i].max_val) { > + memcpy(&data_trace->aw_table, &table_info.aw_table[i], > + sizeof(struct aw_table)); > + break; > + } > + } > + > + return 0; > +} > + > +static int aw_monitor_get_data_from_table(struct aw_device *aw_dev, > + struct aw_table_info table_info, > + struct aw_monitor_trace *data_trace, > + uint32_t aplha) > +{ > + struct aw_monitor_desc *monitor = &aw_dev->monitor_desc; > + > + if (monitor->first_entry == AW_FIRST_ENTRY) { > + return aw_monitor_first_get_data_form_table(aw_dev, > + table_info, data_trace); > + } else { > + if (monitor->samp_count == 0) { > + aw_dev_err(aw_dev->dev, "monitor->samp_count:%d unsupported", > + monitor->samp_count); > + return -EINVAL; > + } > + > + data_trace->sum_val = data_trace->sum_val / monitor->samp_count; > + data_trace->sum_val = ((int32_t)aplha * data_trace->sum_val + > + (1000 - (int32_t)aplha) * data_trace->pre_val) / 1000; > + return aw_monitor_trace_data_from_table(aw_dev, > + table_info, data_trace); > + } > + > + return 0; > +} > + > +static int aw_monitor_get_data(struct aw_device *aw_dev) > +{ > + struct aw_monitor_desc *monitor = &aw_dev->monitor_desc; > + struct aw_monitor_cfg *monitor_cfg = &monitor->monitor_cfg; > + struct aw_monitor_trace *vol_trace = &monitor->vol_trace; > + struct aw_monitor_trace *temp_trace = &monitor->temp_trace; > + int ret; > + > + if (monitor_cfg->vol_switch) { > + ret = aw_monitor_get_data_from_table(aw_dev, > + monitor_cfg->vol_info, vol_trace, > + monitor_cfg->vol_aplha); > + if (ret < 0) > + return ret; > + } else { > + vol_trace->aw_table.ipeak = IPEAK_NONE; > + vol_trace->aw_table.gain = GAIN_NONE; > + vol_trace->aw_table.vmax = VMAX_NONE; > + } > + > + if (monitor_cfg->temp_switch) { > + ret = aw_monitor_get_data_from_table(aw_dev, > + monitor_cfg->temp_info, temp_trace, > + monitor_cfg->temp_aplha); > + if (ret < 0) > + return ret; > + } else { > + temp_trace->aw_table.ipeak = IPEAK_NONE; > + temp_trace->aw_table.gain = GAIN_NONE; > + temp_trace->aw_table.vmax = VMAX_NONE; > + } > + > + aw_dev_dbg(aw_dev->dev, > + "filter_vol:%d, vol: ipeak = 0x%x, gain = 0x%x, vmax = 0x%x", > + monitor->vol_trace.sum_val, vol_trace->aw_table.ipeak, > + vol_trace->aw_table.gain, vol_trace->aw_table.vmax); > + > + aw_dev_dbg(aw_dev->dev, > + "filter_temp:%d, temp: ipeak = 0x%x, gain = 0x%x, vmax = 0x%x", > + monitor->temp_trace.sum_val, temp_trace->aw_table.ipeak, > + temp_trace->aw_table.gain, temp_trace->aw_table.vmax); > + return 0; > +} > + > +static void aw_monitor_get_cfg(struct aw_device *aw_dev, > + struct aw_table *set_table) > +{ > + struct aw_monitor_desc *monitor = &aw_dev->monitor_desc; > + struct aw_table *temp_data = &monitor->temp_trace.aw_table; > + struct aw_table *vol_data = &monitor->vol_trace.aw_table; > + > + if (temp_data->ipeak == IPEAK_NONE && vol_data->ipeak == IPEAK_NONE) { > + memcpy(set_table, temp_data, sizeof(struct aw_table)); > + } else if (temp_data->ipeak == IPEAK_NONE) { > + memcpy(set_table, vol_data, sizeof(struct aw_table)); > + } else if (vol_data->ipeak == IPEAK_NONE) { > + memcpy(set_table, temp_data, sizeof(struct aw_table)); > + } else { > + if (monitor->monitor_cfg.logic_switch == AW_MON_LOGIC_OR) { > + set_table->ipeak = (temp_data->ipeak < vol_data->ipeak ? > + temp_data->ipeak : vol_data->ipeak); > + set_table->gain = (temp_data->gain < vol_data->gain ? > + vol_data->gain : temp_data->gain); > + set_table->vmax = (temp_data->vmax < vol_data->vmax ? > + vol_data->vmax : temp_data->vmax); > + } else { > + set_table->ipeak = (temp_data->ipeak < vol_data->ipeak ? > + vol_data->ipeak : temp_data->ipeak); > + set_table->gain = (temp_data->gain < vol_data->gain ? > + temp_data->gain : vol_data->gain); > + set_table->vmax = (temp_data->vmax < vol_data->vmax ? > + temp_data->vmax : vol_data->vmax); > + } > + } > +} > + > +static void aw_monitor_set_ipeak(struct aw_device *aw_dev, > + uint16_t ipeak) > +{ > + struct aw_monitor_cfg *monitor_cfg = &aw_dev->monitor_desc.monitor_cfg; > + uint16_t reg_val = 0; > + uint16_t read_reg_val; > + int ret; > + struct aw_ipeak_desc *desc = &aw_dev->ipeak_desc; > + > + if (ipeak == IPEAK_NONE || (!monitor_cfg->ipeak_switch)) > + return; > + > + ret = aw_dev->ops.aw_reg_read(aw_dev, desc->reg, &reg_val); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "read ipeak failed"); > + return; > + } > + > + read_reg_val = reg_val; > + read_reg_val &= (~desc->mask); > + > + if (read_reg_val == ipeak) { > + aw_dev_dbg(aw_dev->dev, "ipeak = 0x%x, no change", > + read_reg_val); > + return; > + } > + reg_val &= desc->mask; > + read_reg_val = ipeak; > + reg_val |= read_reg_val; > + > + ret = aw_dev->ops.aw_reg_write(aw_dev, desc->reg, reg_val); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "write ipeak failed"); > + return; > + } > + aw_dev_info(aw_dev->dev, "set reg val = 0x%x, ipeak = 0x%x", > + reg_val, ipeak); > + > +} > + > +static void aw_monitor_set_gain(struct aw_device *aw_dev, uint16_t gain) > +{ > + uint16_t monitor_vol = 0; > + uint16_t compared_vol = 0; > + struct aw_monitor_cfg *monitor_cfg = &aw_dev->monitor_desc.monitor_cfg; > + struct aw_volume_desc *vol_desc = &aw_dev->volume_desc; > + > + if (gain == GAIN_NONE || (!monitor_cfg->gain_switch)) > + return; > + > + monitor_vol = aw_dev->ops.aw_reg_val_to_db(gain); > + vol_desc->monitor_volume = monitor_vol; > + > + /*get smaller dB*/ > + compared_vol = AW_GET_MAX_VALUE(vol_desc->ctl_volume, > + vol_desc->monitor_volume); > + > + aw883xx_dev_set_volume(aw_dev, compared_vol); > +} > + > +static int aw_monitor_vmax_check(struct aw_device *aw_dev) > +{ > + int ret = -1; > + > + ret = aw883xx_dev_syspll_check(aw_dev); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "no iis signal"); > + return ret; > + } > + > + ret = aw883xx_dev_get_dsp_status(aw_dev); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "dsp not work"); > + return ret; > + } > + > + return 0; > +} > + > +static void aw_monitor_set_vmax(struct aw_device *aw_dev, > + uint32_t vmax) > +{ > + struct aw_monitor_cfg *monitor_cfg = &aw_dev->monitor_desc.monitor_cfg; > + struct aw_vmax_desc *desc = &aw_dev->vmax_desc; > + uint16_t vmax_set; > + int ret = -1; > + > + if (vmax == VMAX_NONE || (!monitor_cfg->vmax_switch)) > + return; > + > + ret = aw_monitor_vmax_check(aw_dev); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "vmax_check fail, ret=%d", ret); > + return; > + } > + > + if ((vmax == aw_dev->monitor_desc.pre_vmax) && > + (aw_dev->monitor_desc.first_entry != AW_FIRST_ENTRY)) { > + aw_dev_dbg(aw_dev->dev, "vmax = 0x%x, no change", vmax); > + return; > + } > + > + vmax_set = (uint16_t)((int16_t)vmax + > + (int16_t)aw_dev->vmax_desc.init_vmax); > + > + > + ret = aw_dev->ops.aw_dsp_write(aw_dev, > + desc->dsp_reg, vmax_set, desc->data_type); > + if (ret < 0) > + return; > + > + aw_dev_info(aw_dev->dev, "get monitor vmax = 0x%x, set vmax = 0x%x", > + vmax, vmax_set); > +} > + > +static void aw_monitor_check_sysint(struct aw_device *aw_dev) > +{ > + int ret = -1; > + uint16_t sysint = 0; > + struct aw_int_desc *desc = &aw_dev->int_desc; > + > + ret = aw883xx_dev_get_int_status(aw_dev, &sysint); > + if (ret < 0) > + aw_dev_err(aw_dev->dev, "get_sysint fail, ret=%d", ret); > + > + if (sysint & (desc->intst_mask)) { > + desc->sysint_st = sysint; > + aw_dev_err(aw_dev->dev, "check sysint fail, reg=0x%04x", sysint); > + } > +} > + > +static int aw_monitor_work(struct aw_device *aw_dev) > +{ > + struct aw_monitor_desc *monitor = &aw_dev->monitor_desc; > + struct aw_monitor_cfg *monitor_cfg = &monitor->monitor_cfg; > + struct aw_table set_table; > + int ret = -1; > + > + if (aw883xx_cali_svc_get_cali_status(&aw_dev->cali_desc)) { > + aw_dev_info(aw_dev->dev, "done nothing during calibration"); > + return 0; > + } > + > + ret = aw_monitor_get_temp_and_vol(aw_dev); > + if (ret < 0) > + return ret; > + > + if (monitor->samp_count < monitor_cfg->monitor_count && > + (monitor->first_entry == AW_NOT_FIRST_ENTRY)) > + return 0; > + > + ret = aw_monitor_get_data(aw_dev); > + if (ret < 0) > + return ret; > + > + aw_monitor_get_cfg(aw_dev, &set_table); > + > + aw_dev_dbg(aw_dev->dev, > + "set_ipeak = 0x%x, set_gain = 0x%x, set_vmax = 0x%x", > + set_table.ipeak, set_table.gain, set_table.vmax); > + > + aw_monitor_set_ipeak(aw_dev, set_table.ipeak); > + > + aw_monitor_set_gain(aw_dev, set_table.gain); > + > + aw_monitor_set_vmax(aw_dev, set_table.vmax); > + > + aw_monitor_check_sysint(aw_dev); > + > + monitor->samp_count = 0; > + monitor->temp_trace.pre_val = monitor->temp_trace.sum_val; > + monitor->temp_trace.sum_val = 0; > + > + monitor->vol_trace.pre_val = monitor->vol_trace.sum_val; > + monitor->vol_trace.sum_val = 0; > + > + if (monitor->first_entry == AW_FIRST_ENTRY) > + monitor->first_entry = AW_NOT_FIRST_ENTRY; > + > + return 0; > +} > + > +static void aw_monitor_work_func(struct work_struct *work) > +{ > + struct aw_device *aw_dev = container_of(work, > + struct aw_device, monitor_desc.delay_work.work); > + struct aw883xx *aw883xx = (struct aw883xx *)aw_dev->private_data; > + struct aw_monitor_cfg *monitor_cfg = &aw_dev->monitor_desc.monitor_cfg; > + struct aw_monitor_desc *monitor = &aw_dev->monitor_desc; > + > + aw_dev_dbg(aw_dev->dev, "scene_mode %d,monitor_status:%d, monitor_switch:%d", > + aw_dev->cur_prof, monitor_cfg->monitor_status, > + monitor_cfg->monitor_switch); > + > + if ((monitor_cfg->monitor_status == AW_MON_CFG_OK) && > + monitor_cfg->monitor_switch) { > + > + if (!aw883xx_dev_get_hmute(aw_dev)) { > + aw_monitor_work(aw_dev); > + queue_delayed_work(aw883xx->work_queue, > + &monitor->delay_work, > + msecs_to_jiffies(monitor_cfg->monitor_time)); > + } > + > + } > +} > + > +static int aw_hw_monitor_work(struct aw_device *aw_dev) > +{ > + int32_t sys_temp; > + > + aw_monitor_get_system_temperature(aw_dev, &sys_temp); > + > + aw_monitor_set_system_temperature(aw_dev, sys_temp); > + > + return 0; > +} > + > +static void aw_hw_monitor_work_func(struct work_struct *work) > +{ > + struct aw_device *aw_dev = container_of(work, > + struct aw_device, monitor_desc.hw_monitor_work.work); > + struct aw883xx *aw883xx = (struct aw883xx *)aw_dev->private_data; > + struct aw_monitor_desc *monitor = &aw_dev->monitor_desc; > + > + if (!aw883xx_dev_get_hmute(aw_dev)) { > + aw_hw_monitor_work(aw_dev); > + queue_delayed_work(aw883xx->work_queue, > + &monitor->hw_monitor_work, > + msecs_to_jiffies(monitor->hw_monitor_delay)); > + } > +} > + > +void aw883xx_monitor_start(struct aw_monitor_desc *monitor_desc) > +{ > + uint8_t temp_flag = monitor_desc->hw_temp_flag; > + struct aw_device *aw_dev = container_of(monitor_desc, > + struct aw_device, monitor_desc); > + struct aw883xx *aw883xx = (struct aw883xx *)aw_dev->private_data; > + > + aw_dev_info(aw_dev->dev, "enter"); > + > + if (aw_dev->profctrl_desc.cur_mode == AW_RCV_MODE) { > + aw_dev_dbg(aw_dev->dev, "receiver mode no need to start monitor"); > + return; > + } > + > + if (monitor_desc->hw_mon_en) { > + aw_dev_info(aw_dev->dev, "hardware monitor is enable"); > + if (temp_flag == AW_EXTERNAL_TEMP) { > + queue_delayed_work(aw883xx->work_queue, > + &monitor_desc->hw_monitor_work, 0); > + } else { > + aw_dev_dbg(aw_dev->dev, "Internal chip temperature used"); > + } > + return; > + } > + > + monitor_desc->first_entry = AW_FIRST_ENTRY; > + monitor_desc->samp_count = 0; > + monitor_desc->vol_trace.sum_val = 0; > + monitor_desc->temp_trace.sum_val = 0; > + > + queue_delayed_work(aw883xx->work_queue, > + &monitor_desc->delay_work, 0); > +} > + > +int aw883xx_monitor_stop(struct aw_monitor_desc *monitor_desc) > +{ > + struct aw_device *aw_dev = container_of(monitor_desc, > + struct aw_device, monitor_desc); > + > + aw_dev_info(aw_dev->dev, "enter"); > + > + aw_dev->volume_desc.monitor_volume = 0; > + cancel_delayed_work_sync(&monitor_desc->delay_work); > + cancel_delayed_work_sync(&monitor_desc->hw_monitor_work); > + > + return 0; > + > +} > + > +/* > + * load monitor config > + */ > +static int aw_monitor_param_check_sum(struct aw_device *aw_dev, > + uint8_t *data, uint32_t data_len) > +{ > + int i, check_sum = 0; > + struct aw_monitor_hdr_v_0_1_1 *monitor_hdr = > + (struct aw_monitor_hdr_v_0_1_1 *)data; > + > + if (data_len < sizeof(struct aw_monitor_hdr_v_0_1_1)) { > + aw_dev_err(aw_dev->dev, > + "data size smaller than hdr , please check monitor bin"); > + return -ENOMEM; > + } > + > + for (i = 4 ; i < data_len; i++) > + check_sum += (uint8_t)data[i]; > + > + if (monitor_hdr->check_sum != check_sum) { > + aw_dev_err(aw_dev->dev, > + "check_sum[%d] is not equal to actual check_sum[%d]", > + monitor_hdr->check_sum, check_sum); > + return -ENOMEM; > + } > + > + return 0; > +} > + > +static void aw_monitor_write_data_to_table(struct aw_device *aw_dev, > + struct aw_table_info *table_info, const char *offset_ptr) > +{ > + int i; > + int table_size = AW_TABLE_SIZE; > + > + for (i = 0; i < table_info->table_num * table_size; i += table_size) { > + table_info->aw_table[i / AW_TABLE_SIZE].min_val = > + AW_GET_16_DATA(offset_ptr[1 + i], offset_ptr[i]); > + table_info->aw_table[i / AW_TABLE_SIZE].max_val = > + AW_GET_16_DATA(offset_ptr[3 + i], offset_ptr[2 + i]); > + table_info->aw_table[i / AW_TABLE_SIZE].ipeak = > + AW_GET_16_DATA(offset_ptr[5 + i], offset_ptr[4 + i]); > + table_info->aw_table[i / AW_TABLE_SIZE].gain = > + AW_GET_16_DATA(offset_ptr[7 + i], offset_ptr[6 + i]); > + table_info->aw_table[i / AW_TABLE_SIZE].vmax = > + AW_GET_32_DATA(offset_ptr[11 + i], offset_ptr[10 + i], > + offset_ptr[9 + i], offset_ptr[8 + i]); > + } > + > + for (i = 0; i < table_info->table_num; i++) > + aw_dev_info(aw_dev->dev, > + "min_val:%d, max_val:%d, ipeak:0x%x, gain:0x%x, vmax:0x%x", > + table_info->aw_table[i].min_val, > + table_info->aw_table[i].max_val, > + table_info->aw_table[i].ipeak, > + table_info->aw_table[i].gain, > + table_info->aw_table[i].vmax); > + > +} > + > +static int aw_monitor_parse_vol_data_v_0_1_1(struct aw_device *aw_dev, uint8_t *data) > +{ > + struct aw_monitor_hdr_v_0_1_1 *monitor_hdr = > + (struct aw_monitor_hdr_v_0_1_1 *)data; > + struct aw_table_info *vol_info = > + &aw_dev->monitor_desc.monitor_cfg.vol_info; > + > + aw_dev_info(aw_dev->dev, "===parse vol start ==="); > + if (vol_info->aw_table != NULL) { > + devm_kfree(aw_dev->dev, vol_info->aw_table); > + vol_info->aw_table = NULL; > + } > + > + vol_info->aw_table = devm_kzalloc(aw_dev->dev, > + (monitor_hdr->vol_num * AW_TABLE_SIZE), > + GFP_KERNEL); > + if (vol_info->aw_table == NULL) > + return -ENOMEM; > + > + vol_info->table_num = monitor_hdr->vol_num; > + aw_monitor_write_data_to_table(aw_dev, vol_info, > + &data[monitor_hdr->vol_offset]); > + aw_dev_info(aw_dev->dev, "===parse vol end ==="); > + return 0; > +} > + > +static int aw_monitor_parse_temp_data_v_0_1_1(struct aw_device *aw_dev, uint8_t *data) > +{ > + struct aw_monitor_hdr_v_0_1_1 *monitor_hdr = > + (struct aw_monitor_hdr_v_0_1_1 *)data; > + struct aw_table_info *temp_info = > + &aw_dev->monitor_desc.monitor_cfg.temp_info; > + > + aw_dev_info(aw_dev->dev, "===parse temp start ==="); > + > + if (temp_info->aw_table != NULL) { > + devm_kfree(aw_dev->dev, temp_info->aw_table); > + temp_info->aw_table = NULL; > + } > + > + temp_info->aw_table = devm_kzalloc(aw_dev->dev, > + (monitor_hdr->temp_num * AW_TABLE_SIZE), > + GFP_KERNEL); > + if (temp_info->aw_table == NULL) > + return -ENOMEM; > + > + temp_info->table_num = monitor_hdr->temp_num; > + aw_monitor_write_data_to_table(aw_dev, temp_info, > + &data[monitor_hdr->temp_offset]); > + aw_dev_info(aw_dev->dev, "===parse temp end ==="); > + return 0; > +} > + > +static void aw_monitor_parse_hdr_v_0_1_1(struct aw_device *aw_dev, uint8_t *data) > +{ > + struct aw_monitor_hdr_v_0_1_1 *monitor_hdr = > + (struct aw_monitor_hdr_v_0_1_1 *)data; > + struct aw_monitor_cfg *monitor_cfg = &aw_dev->monitor_desc.monitor_cfg; > + > + monitor_cfg->monitor_switch = > + (monitor_hdr->enable_flag >> MONITOR_EN_BIT) & MONITOR_EN_MASK; > + monitor_cfg->monitor_time = monitor_hdr->monitor_time; > + monitor_cfg->monitor_count = monitor_hdr->monitor_count; > + monitor_cfg->ipeak_switch = > + (monitor_hdr->enable_flag >> MONITOR_IPEAK_EN_BIT) & MONITOR_EN_MASK; > + monitor_cfg->logic_switch = > + (monitor_hdr->enable_flag >> MONITOR_LOGIC_BIT) & MONITOR_EN_MASK; > + monitor_cfg->gain_switch = > + (monitor_hdr->enable_flag >> MONITOR_GAIN_EN_BIT) & MONITOR_EN_MASK; > + monitor_cfg->vmax_switch = > + (monitor_hdr->enable_flag >> MONITOR_VMAX_EN_BIT) & MONITOR_EN_MASK; > + monitor_cfg->temp_switch = > + (monitor_hdr->enable_flag >> MONITOR_TEMP_EN_BIT) & MONITOR_EN_MASK; > + monitor_cfg->temp_aplha = monitor_hdr->temp_aplha; > + monitor_cfg->vol_switch = > + (monitor_hdr->enable_flag >> MONITOR_VOL_EN_BIT) & MONITOR_EN_MASK; > + monitor_cfg->vol_aplha = monitor_hdr->vol_aplha; > + > + aw_dev_info(aw_dev->dev, "chip name:%s", > + monitor_hdr->chip_type); > + aw_dev_info(aw_dev->dev, "ui ver:0x%x", > + monitor_hdr->ui_ver); > + > + aw_dev_info(aw_dev->dev, > + "monitor_switch:%d, monitor_time:%d (ms), monitor_count:%d", > + monitor_cfg->monitor_switch, monitor_cfg->monitor_time, > + monitor_cfg->monitor_count); > + > + aw_dev_info(aw_dev->dev, > + "logic_switch:%d, ipeak_switch:%d, gain_switch:%d, vmax_switch:%d", > + monitor_cfg->logic_switch, monitor_cfg->ipeak_switch, > + monitor_cfg->gain_switch, monitor_cfg->vmax_switch); > + > + aw_dev_info(aw_dev->dev, > + "temp_switch:%d, temp_aplha:%d, vol_switch:%d, vol_aplha:%d", > + monitor_cfg->temp_switch, monitor_cfg->temp_aplha, > + monitor_cfg->vol_switch, monitor_cfg->vol_aplha); > +} > + > +static int aw_monitor_check_fw_v_0_1_1(struct aw_device *aw_dev, > + uint8_t *data, uint32_t data_len) > +{ > + struct aw_monitor_hdr_v_0_1_1 *monitor_hdr = > + (struct aw_monitor_hdr_v_0_1_1 *)data; > + int temp_size, vol_size; > + > + if (data_len < sizeof(struct aw_monitor_hdr_v_0_1_1)) { > + aw_dev_err(aw_dev->dev, > + "params size[%d] < struct aw_monitor_hdr size[%d]!", > + data_len, (int)sizeof(struct aw_monitor_hdr_v_0_1_1)); > + return -ENOMEM; > + } > + > + if (monitor_hdr->temp_offset > data_len) { > + aw_dev_err(aw_dev->dev, "temp_offset[%d] overflow file size[%d]!", > + monitor_hdr->temp_offset, data_len); > + return -ENOMEM; > + } > + > + if (monitor_hdr->vol_offset > data_len) { > + aw_dev_err(aw_dev->dev, "vol_offset[%d] overflow file size[%d]!", > + monitor_hdr->vol_offset, data_len); > + return -ENOMEM; > + } > + > + temp_size = monitor_hdr->temp_num * monitor_hdr->single_temp_size; > + if (temp_size > data_len) { > + aw_dev_err(aw_dev->dev, "temp_size:[%d] overflow file size[%d]!", > + temp_size, data_len); > + return -ENOMEM; > + } > + > + vol_size = monitor_hdr->vol_num * monitor_hdr->single_vol_size; > + if (vol_size > data_len) { > + aw_dev_err(aw_dev->dev, "vol_size:[%d] overflow file size[%d]!", > + vol_size, data_len); > + return -ENOMEM; > + } > + > + return 0; > +} > + > +static int aw_monitor_parse_data_v_0_1_1(struct aw_device *aw_dev, > + uint8_t *data, uint32_t data_len) > +{ > + int ret; > + struct aw_monitor_cfg *monitor_cfg = &aw_dev->monitor_desc.monitor_cfg; > + > + ret = aw_monitor_check_fw_v_0_1_1(aw_dev, data, data_len); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "check monitor failed"); > + return ret; > + } > + > + aw_monitor_parse_hdr_v_0_1_1(aw_dev, data); > + > + ret = aw_monitor_parse_temp_data_v_0_1_1(aw_dev, data); > + if (ret < 0) > + return ret; > + > + ret = aw_monitor_parse_vol_data_v_0_1_1(aw_dev, data); > + if (ret < 0) { > + if (monitor_cfg->temp_info.aw_table != NULL) { > + devm_kfree(aw_dev->dev, monitor_cfg->temp_info.aw_table); > + monitor_cfg->temp_info.aw_table = NULL; > + monitor_cfg->temp_info.table_num = 0; > + } > + return ret; > + } > + > + monitor_cfg->monitor_status = AW_MON_CFG_OK; > + return 0; > +} > + > +int aw883xx_monitor_parse_fw(struct aw_monitor_desc *monitor_desc, > + uint8_t *data, uint32_t data_len) > +{ > + struct aw_monitor_hdr_v_0_1_1 *monitor_hdr = NULL; > + struct aw_device *aw_dev = NULL; > + int ret; > + > + if (monitor_desc == NULL || data == NULL) { > + pr_err("monitor_desc or data is NULL"); > + return -EINVAL; > + } > + > + monitor_hdr = (struct aw_monitor_hdr_v_0_1_1 *)data; > + aw_dev = container_of(monitor_desc, > + struct aw_device, monitor_desc); > + > + ret = aw_monitor_param_check_sum(aw_dev, data, data_len); > + if (ret < 0) > + return ret; > + > + switch (monitor_hdr->monitor_ver) { > + case AW_MONITOR_HDR_VER_0_1_1: > + return aw_monitor_parse_data_v_0_1_1(aw_dev, data, data_len); > + default: > + aw_dev_err(aw_dev->dev, "cfg version:0x%x unsupported", > + monitor_hdr->monitor_ver); > + return -EINVAL; > + } > +} > + > +static void aw_monitor_free_firmware(struct aw_device *aw_dev) > +{ > + struct aw_monitor_cfg *monitor_cfg = > + &aw_dev->monitor_desc.monitor_cfg; > + > + monitor_cfg->monitor_status = AW_MON_CFG_ST; > + > + if (monitor_cfg->temp_info.aw_table != NULL) { > + devm_kfree(aw_dev->dev, monitor_cfg->temp_info.aw_table); > + monitor_cfg->temp_info.aw_table = NULL; > + } > + > + if (monitor_cfg->vol_info.aw_table != NULL) { > + devm_kfree(aw_dev->dev, monitor_cfg->vol_info.aw_table); > + monitor_cfg->vol_info.aw_table = NULL; > + } > + > + memset(monitor_cfg, 0, sizeof(struct aw_monitor_cfg)); > +} > + > +static int aw_monitor_real_time_update_monitor(struct aw_device *aw_dev) > +{ > + const struct firmware *cont = NULL; > + struct aw_container *aw_monitor_cnt = NULL; > + int ret; > + > + ret = request_firmware(&cont, AW883XX_MONITOR_NAME, aw_dev->dev); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "failed to read %s", AW883XX_MONITOR_NAME); > + release_firmware(cont); > + return ret; > + } > + > + aw_monitor_cnt = devm_kzalloc(aw_dev->dev, > + cont->size + sizeof(uint32_t), GFP_KERNEL); > + if (aw_monitor_cnt == NULL) { > + release_firmware(cont); > + return ret; > + } > + > + aw_monitor_cnt->len = (int)cont->size; > + memcpy(aw_monitor_cnt->data, cont->data, cont->size); > + release_firmware(cont); > + > + ret = aw883xx_monitor_parse_fw(&aw_dev->monitor_desc, > + aw_monitor_cnt->data, aw_monitor_cnt->len); > + if (ret < 0) > + aw_dev_err(aw_dev->dev, "parse monitor firmware failed!"); > + > + devm_kfree(aw_dev->dev, aw_monitor_cnt); > + aw_monitor_cnt = NULL; > + > + return ret; > +} > + > +/* > + * monitor init > + */ > +#ifdef AW_DEBUG > +static ssize_t aw_vol_store(struct device *dev, > + struct device_attribute *attr, const char *buf, size_t count) > +{ > + struct aw883xx *aw883xx = dev_get_drvdata(dev); > + struct aw_device *aw_dev = aw883xx->aw_pa; > + uint32_t vol = 0; > + int ret = -1; > + > + if (count == 0) > + return 0; > + > + ret = kstrtouint(buf, 0, &vol); > + if (ret < 0) > + return ret; > + > + aw_dev_info(aw_dev->dev, "vol set =%d", vol); > + aw_dev->monitor_desc.test_vol = vol; > + > + return count; > +} > + > +static ssize_t aw_vol_show(struct device *dev, > + struct device_attribute *attr, char *buf) > +{ > + struct aw883xx *aw883xx = dev_get_drvdata(dev); > + struct aw_device *aw_dev = aw883xx->aw_pa; > + ssize_t len = 0; > + > + len += snprintf(buf+len, PAGE_SIZE-len, > + "vol: %d\n", > + aw_dev->monitor_desc.test_vol); > + return len; > +} > + > +static ssize_t aw_temp_store(struct device *dev, > + struct device_attribute *attr, const char *buf, size_t count) > +{ > + struct aw883xx *aw883xx = dev_get_drvdata(dev); > + struct aw_device *aw_dev = aw883xx->aw_pa; > + int32_t temp = 0; > + int ret = -1; > + > + if (count == 0) > + return 0; > + > + ret = kstrtoint(buf, 0, &temp); > + if (ret < 0) > + return ret; > + > + aw_dev_info(aw_dev->dev, "temp set =%d", temp); > + > + aw_dev->monitor_desc.test_temp = temp; > + > + return count; > +} > + > +static ssize_t aw_temp_show(struct device *dev, > + struct device_attribute *attr, char *buf) > +{ > + struct aw883xx *aw883xx = dev_get_drvdata(dev); > + struct aw_device *aw_dev = aw883xx->aw_pa; > + ssize_t len = 0; > + > + len += snprintf(buf+len, PAGE_SIZE-len, > + "aw883xx temp: %d\n", > + aw_dev->monitor_desc.test_temp); > + > + return len; > +} > + > +static DEVICE_ATTR(vol, 0644, > + aw_vol_show, aw_vol_store); > +static DEVICE_ATTR(temp, 0644, > + aw_temp_show, aw_temp_store); > +#endif > + > +static ssize_t aw_monitor_store(struct device *dev, > + struct device_attribute *attr, const char *buf, size_t count) > +{ > + struct aw883xx *aw883xx = dev_get_drvdata(dev); > + struct aw_device *aw_dev = aw883xx->aw_pa; > + uint32_t enable = 0; > + int ret = -1; > + > + if (count == 0) > + return 0; > + > + ret = kstrtouint(buf, 0, &enable); > + if (ret < 0) > + return ret; > + > + aw_dev_info(aw_dev->dev, "monitor enable set =%d", enable); > + > + if (aw_dev->monitor_desc.monitor_cfg.monitor_switch != enable) { > + aw_dev->monitor_desc.monitor_cfg.monitor_switch = enable; > + if (enable) > + aw883xx_monitor_start(&aw_dev->monitor_desc); > + } else { > + return count; > + } > + > + return count; > +} > + > +static ssize_t aw_monitor_show(struct device *dev, > + struct device_attribute *attr, char *buf) > +{ > + struct aw883xx *aw883xx = dev_get_drvdata(dev); > + struct aw_device *aw_dev = aw883xx->aw_pa; > + ssize_t len = 0; > + > + > + len += snprintf(buf+len, PAGE_SIZE-len, > + "aw883xx monitor_flag=%u\n", > + aw_dev->monitor_desc.monitor_cfg.monitor_switch); > + return len; > +} > + > +static ssize_t aw_monitor_update_store(struct device *dev, > + struct device_attribute *attr, const char *buf, size_t count) > +{ > + struct aw883xx *aw883xx = dev_get_drvdata(dev); > + struct aw_device *aw_dev = aw883xx->aw_pa; > + > + uint32_t update = 0; > + int ret = -1; > + > + if (count == 0) > + return 0; > + > + ret = kstrtouint(buf, 0, &update); > + if (ret < 0) > + return ret; > + > + aw_dev_info(aw_dev->dev, "monitor update = %d", update); > + > + if (update) { > + aw883xx_monitor_stop(&aw_dev->monitor_desc); > + aw_monitor_free_firmware(aw_dev); > + ret = aw_monitor_real_time_update_monitor(aw_dev); > + if (ret < 0) > + return ret; > + aw883xx_monitor_start(&aw_dev->monitor_desc); > + } > + > + return count; > +} > + > +static DEVICE_ATTR(monitor, 0644, > + aw_monitor_show, aw_monitor_store); > +static DEVICE_ATTR(monitor_update, 0200, > + NULL, aw_monitor_update_store); > + > + > +static struct attribute *aw_monitor_attr[] = { > + &dev_attr_monitor.attr, > + &dev_attr_monitor_update.attr, > +#ifdef AW_DEBUG > + &dev_attr_vol.attr, > + &dev_attr_temp.attr, > +#endif > + NULL > +}; > + > +static struct attribute_group aw_monitor_attr_group = { > + .attrs = aw_monitor_attr, > +}; > + > +static void aw_monitor_parse_dt(struct aw_device *aw_dev) > +{ > + int ret = -1; > + uint32_t monitor_delay; > + struct device_node *np = aw_dev->dev->of_node; > + > + ret = of_property_read_u32(np, "hw-monitor-delay", &monitor_delay); > + if (ret < 0) { > + aw_dev_info(aw_dev->dev, > + "read hw-monitor-delay failed, set default value:[%d]ms", > + aw_dev->monitor_desc.hw_monitor_delay); > + } else { > + aw_dev_info(aw_dev->dev, > + "parse hw-monitor-delay:[%d]", monitor_delay); > + aw_dev->monitor_desc.hw_monitor_delay = monitor_delay; > + } > +} > + > +void aw883xx_monitor_init(struct aw_monitor_desc *monitor_desc) > +{ > + int ret; > + struct aw_device *aw_dev = container_of(monitor_desc, > + struct aw_device, monitor_desc); > + > + aw_dev_info(aw_dev->dev, "enter"); > + > + aw_monitor_parse_dt(aw_dev); > + > +#ifdef AW_DEBUG > + monitor_desc->test_vol = 0; > + monitor_desc->test_temp = 0; > +#endif > + > + INIT_DELAYED_WORK(&monitor_desc->delay_work, aw_monitor_work_func); > + INIT_DELAYED_WORK(&monitor_desc->hw_monitor_work, aw_hw_monitor_work_func); > + > + ret = sysfs_create_group(&aw_dev->dev->kobj, > + &aw_monitor_attr_group); > + if (ret < 0) > + aw_dev_err(aw_dev->dev, "error creating sysfs attr files"); > +} > + > +void aw883xx_monitor_deinit(struct aw_monitor_desc *monitor_desc) > +{ > + struct aw_device *aw_dev = > + container_of(monitor_desc, struct aw_device, monitor_desc); > + > + aw883xx_monitor_stop(monitor_desc); > + > + sysfs_remove_group(&aw_dev->dev->kobj, &aw_monitor_attr_group); > +} > + > diff --git a/sound/soc/codecs/aw883xx/aw883xx_monitor.h b/sound/soc/codecs/aw883xx/aw883xx_monitor.h > new file mode 100644 > index 0000000..5a1a017 > --- /dev/null > +++ b/sound/soc/codecs/aw883xx/aw883xx_monitor.h > @@ -0,0 +1,167 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +/* > + * aw883xx.c -- ALSA Soc AW883XX codec support > + * > + * Copyright (c) 2020 AWINIC Technology CO., LTD > + * > + * Author: Bruce zhao <zhaolei(a)awinic.com> > + */ > + > +#ifndef __AW883XX_MONITOR_H__ > +#define __AW883XX_MONITOR_H__ > + > +/*#define AW_DEBUG*/ > +/*#define AW_SYS_BATTERY_ST*/ > + > +struct aw_table; > + > +#define AW_TABLE_SIZE sizeof(struct aw_table) > +#define AW_MONITOR_DEFAULT_FLAG (0) > + > +#define IPEAK_NONE (0xFF) > +#define GAIN_NONE (0xFF) > +#define VMAX_NONE (0xFFFFFFFF) > + > + > +#define AW_GET_32_DATA(w, x, y, z) \ > + ((uint32_t)((((uint8_t)w) << 24) | (((uint8_t)x) << 16) | \ > + (((uint8_t)y) << 8) | ((uint8_t)z))) > +#define AW_GET_16_DATA(x, y) \ > + ((uint16_t)((((uint8_t)x) << 8) | (uint8_t)y)) > + > +enum { > + AW_MON_LOGIC_OR = 0, > + AW_MON_LOGIC_AND = 1, > +}; > + > +enum { > + AW_FIRST_ENTRY = 0, > + AW_NOT_FIRST_ENTRY = 1, > +}; > + > +enum aw_monitor_hdr_ver { > + AW_MONITOR_HDR_VER_0_1_1 = 0x00010100, > +}; > + > +enum aw_monitor_init { > + AW_MON_CFG_ST = 0, > + AW_MON_CFG_OK = 1, > +}; > + > +#define MONITOR_EN_MASK 0x01 > + > +enum { > + MONITOR_EN_BIT = 0, > + MONITOR_LOGIC_BIT = 1, > + MONITOR_IPEAK_EN_BIT = 2, > + MONITOR_GAIN_EN_BIT = 3, > + MONITOR_VMAX_EN_BIT = 4, > + MONITOR_TEMP_EN_BIT = 5, > + MONITOR_VOL_EN_BIT = 6, > +}; > + > +enum { > + AW_INTERNAL_TEMP = 0, > + AW_EXTERNAL_TEMP = 1, > +}; > + > +struct aw_monitor_hdr_v_0_1_1 { > + uint32_t check_sum; > + uint32_t monitor_ver; > + char chip_type[16]; > + uint32_t ui_ver; > + uint32_t monitor_time; > + uint32_t monitor_count; > + uint32_t enable_flag; > + /* [bit 31:7]*/ > + /* [bit 6: vol en]*/ > + /* [bit 5: temp en]*/ > + /* [bit 4: vmax en]*/ > + /* [bit 3: gain en]*/ > + /* [bit 2: ipeak en]*/ > + /* [bit 1: & or | flag]*/ > + /* [bit 0: monitor en]*/ > + uint32_t temp_aplha; > + uint32_t temp_num; > + uint32_t single_temp_size; > + uint32_t temp_offset; > + uint32_t vol_aplha; > + uint32_t vol_num; > + uint32_t single_vol_size; > + uint32_t vol_offset; > + uint32_t reserver[3]; > +}; > + > +struct aw_table { > + int16_t min_val; > + int16_t max_val; > + uint16_t ipeak; > + uint16_t gain; > + uint32_t vmax; > +}; > + > +struct aw_table_info { > + uint8_t table_num; > + struct aw_table *aw_table; > +}; > + > +struct aw_monitor_cfg { > + uint8_t monitor_status; > + uint32_t monitor_switch; > + uint32_t monitor_time; > + uint32_t monitor_count; > + uint32_t logic_switch; > + uint32_t temp_switch; > + uint32_t temp_aplha; > + uint32_t vol_switch; > + uint32_t vol_aplha; > + uint32_t ipeak_switch; > + uint32_t gain_switch; > + uint32_t vmax_switch; > + struct aw_table_info temp_info; > + struct aw_table_info vol_info; > +}; > + > +struct aw_monitor_trace { > + int32_t pre_val; > + int32_t sum_val; > + struct aw_table aw_table; > +}; > + > + > +/* > + * struct aw882xx monitor > + */ > +struct aw_monitor_desc { > + struct delayed_work delay_work; > + struct delayed_work hw_monitor_work; > + struct aw_monitor_cfg monitor_cfg; > + bool hw_mon_en; > + > + uint8_t hw_temp_flag; > + uint8_t first_entry; > + uint8_t samp_count; > + uint32_t pre_vmax; > + uint32_t hw_monitor_delay; > + > + struct aw_monitor_trace temp_trace; > + struct aw_monitor_trace vol_trace; > + > +#ifdef AW_DEBUG > + uint16_t test_vol; > + int16_t test_temp; > +#endif > +}; > + > +/* > + * aw882xx monitor functions > + */ > +void aw883xx_monitor_start(struct aw_monitor_desc *monitor_desc); > +int aw883xx_monitor_stop(struct aw_monitor_desc *monitor_desc); > +void aw883xx_monitor_init(struct aw_monitor_desc *monitor_desc); > +void aw883xx_monitor_deinit(struct aw_monitor_desc *monitor_desc); > +int aw883xx_monitor_parse_fw(struct aw_monitor_desc *monitor_desc, > + uint8_t *data, uint32_t data_len); > + > +#endif > + > diff --git a/sound/soc/codecs/aw883xx/aw883xx_pid_2049_reg.h b/sound/soc/codecs/aw883xx/aw883xx_pid_2049_reg.h > new file mode 100644 > index 0000000..afddec5 > --- /dev/null > +++ b/sound/soc/codecs/aw883xx/aw883xx_pid_2049_reg.h > @@ -0,0 +1,2388 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +/* > + * aw883xx.c -- ALSA Soc AW883XX codec support > + * > + * Copyright (c) 2020 AWINIC Technology CO., LTD > + * > + * Author: Bruce zhao <zhaolei(a)awinic.com> > + */ > + > +#ifndef __AW883XX_PID_2049_REG_H__ > +#define __AW883XX_PID_2049_REG_H__ > + > +/* registers list */ > +#define AW_PID_2049_ID_REG (0x00) > +#define AW_PID_2049_SYSST_REG (0x01) > +#define AW_PID_2049_SYSINT_REG (0x02) > +#define AW_PID_2049_SYSINTM_REG (0x03) > +#define AW_PID_2049_SYSCTRL_REG (0x04) > +#define AW_PID_2049_SYSCTRL2_REG (0x05) > +#define AW_PID_2049_I2SCTRL_REG (0x06) > +#define AW_PID_2049_I2SCFG1_REG (0x07) > +#define AW_PID_2049_I2SCFG2_REG (0x08) > +#define AW_PID_2049_HAGCCFG1_REG (0x09) > +#define AW_PID_2049_HAGCCFG2_REG (0x0A) > +#define AW_PID_2049_HAGCCFG3_REG (0x0B) > +#define AW_PID_2049_HAGCCFG4_REG (0x0C) > +#define AW_PID_2049_HAGCCFG5_REG (0x0D) > +#define AW_PID_2049_HAGCCFG6_REG (0x0E) > +#define AW_PID_2049_HAGCCFG7_REG (0x0F) > +#define AW_PID_2049_MPDCFG_REG (0x10) > +#define AW_PID_2049_PWMCTRL_REG (0x11) > +#define AW_PID_2049_I2SCFG3_REG (0x12) > +#define AW_PID_2049_DBGCTRL_REG (0x13) > +#define AW_PID_2049_HAGCST_REG (0x20) > +#define AW_PID_2049_VBAT_REG (0x21) > +#define AW_PID_2049_TEMP_REG (0x22) > +#define AW_PID_2049_PVDD_REG (0x23) > +#define AW_PID_2049_ISNDAT_REG (0x24) > +#define AW_PID_2049_VSNDAT_REG (0x25) > +#define AW_PID_2049_I2SINT_REG (0x26) > +#define AW_PID_2049_I2SCAPCNT_REG (0x27) > +#define AW_PID_2049_ANASTA1_REG (0x28) > +#define AW_PID_2049_ANASTA2_REG (0x29) > +#define AW_PID_2049_ANASTA3_REG (0x2A) > +#define AW_PID_2049_ANASTA4_REG (0x2B) > +#define AW_PID_2049_TESTDET_REG (0x2C) > +#define AW_PID_2049_TESTIN_REG (0x38) > +#define AW_PID_2049_TESTOUT_REG (0x39) > +#define AW_PID_2049_DSPMADD_REG (0x40) > +#define AW_PID_2049_DSPMDAT_REG (0x41) > +#define AW_PID_2049_WDT_REG (0x42) > +#define AW_PID_2049_ACR1_REG (0x43) > +#define AW_PID_2049_ACR2_REG (0x44) > +#define AW_PID_2049_ASR1_REG (0x45) > +#define AW_PID_2049_ASR2_REG (0x46) > +#define AW_PID_2049_DSPCFG_REG (0x47) > +#define AW_PID_2049_ASR3_REG (0x48) > +#define AW_PID_2049_ASR4_REG (0x49) > +#define AW_PID_2049_VSNCTRL1_REG (0x50) > +#define AW_PID_2049_ISNCTRL1_REG (0x51) > +#define AW_PID_2049_PLLCTRL1_REG (0x52) > +#define AW_PID_2049_PLLCTRL2_REG (0x53) > +#define AW_PID_2049_PLLCTRL3_REG (0x54) > +#define AW_PID_2049_CDACTRL1_REG (0x55) > +#define AW_PID_2049_CDACTRL2_REG (0x56) > +#define AW_PID_2049_SADCCTRL1_REG (0x57) > +#define AW_PID_2049_SADCCTRL2_REG (0x58) > +#define AW_PID_2049_CPCTRL1_REG (0x59) > +#define AW_PID_2049_BSTCTRL1_REG (0x60) > +#define AW_PID_2049_BSTCTRL2_REG (0x61) > +#define AW_PID_2049_BSTCTRL3_REG (0x62) > +#define AW_PID_2049_BSTCTRL4_REG (0x63) > +#define AW_PID_2049_BSTCTRL5_REG (0x64) > +#define AW_PID_2049_BSTCTRL6_REG (0x65) > +#define AW_PID_2049_BSTCTRL7_REG (0x66) > +#define AW_PID_2049_DSMCFG1_REG (0x67) > +#define AW_PID_2049_DSMCFG2_REG (0x68) > +#define AW_PID_2049_DSMCFG3_REG (0x69) > +#define AW_PID_2049_DSMCFG4_REG (0x6A) > +#define AW_PID_2049_DSMCFG5_REG (0x6B) > +#define AW_PID_2049_DSMCFG6_REG (0x6C) > +#define AW_PID_2049_DSMCFG7_REG (0x6D) > +#define AW_PID_2049_DSMCFG8_REG (0x6E) > +#define AW_PID_2049_TESTCTRL1_REG (0x70) > +#define AW_PID_2049_TESTCTRL2_REG (0x71) > +#define AW_PID_2049_EFCTRL1_REG (0x72) > +#define AW_PID_2049_EFCTRL2_REG (0x73) > +#define AW_PID_2049_EFWH_REG (0x74) > +#define AW_PID_2049_EFWM2_REG (0x75) > +#define AW_PID_2049_EFWM1_REG (0x76) > +#define AW_PID_2049_EFWL_REG (0x77) > +#define AW_PID_2049_EFRH_REG (0x78) > +#define AW_PID_2049_EFRM2_REG (0x79) > +#define AW_PID_2049_EFRM1_REG (0x7A) > +#define AW_PID_2049_EFRL_REG (0x7B) > +#define AW_PID_2049_TM_REG (0x7C) > + > +/* > + * Register Access > + */ > +enum aw883xx_id { > + AW883XX_PID_2049 = 0x2049, > +}; > + > +#define AW_PID_2049_REG_MAX (0x7D) > + > +#define REG_NONE_ACCESS (0) > +#define REG_RD_ACCESS (1 << 0) > +#define REG_WR_ACCESS (1 << 1) > + > +static const unsigned char aw_pid_2049_reg_access[AW_PID_2049_REG_MAX] = { > + [AW_PID_2049_ID_REG] = (REG_RD_ACCESS), > + [AW_PID_2049_SYSST_REG] = (REG_RD_ACCESS), > + [AW_PID_2049_SYSINT_REG] = (REG_RD_ACCESS), > + [AW_PID_2049_SYSINTM_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_SYSCTRL_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_SYSCTRL2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_I2SCTRL_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_I2SCFG1_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_I2SCFG2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_HAGCCFG1_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_HAGCCFG2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_HAGCCFG3_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_HAGCCFG4_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_HAGCCFG5_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_HAGCCFG6_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_HAGCCFG7_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_MPDCFG_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_PWMCTRL_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_I2SCFG3_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_DBGCTRL_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_HAGCST_REG] = (REG_RD_ACCESS), > + [AW_PID_2049_VBAT_REG] = (REG_RD_ACCESS), > + [AW_PID_2049_TEMP_REG] = (REG_RD_ACCESS), > + [AW_PID_2049_PVDD_REG] = (REG_RD_ACCESS), > + [AW_PID_2049_ISNDAT_REG] = (REG_RD_ACCESS), > + [AW_PID_2049_VSNDAT_REG] = (REG_RD_ACCESS), > + [AW_PID_2049_I2SINT_REG] = (REG_RD_ACCESS), > + [AW_PID_2049_I2SCAPCNT_REG] = (REG_RD_ACCESS), > + [AW_PID_2049_ANASTA1_REG] = (REG_RD_ACCESS), > + [AW_PID_2049_ANASTA2_REG] = (REG_RD_ACCESS), > + [AW_PID_2049_ANASTA3_REG] = (REG_RD_ACCESS), > + [AW_PID_2049_ANASTA4_REG] = (REG_RD_ACCESS), > + [AW_PID_2049_TESTDET_REG] = (REG_RD_ACCESS), > + [AW_PID_2049_TESTIN_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_TESTOUT_REG] = (REG_RD_ACCESS), > + [AW_PID_2049_DSPMADD_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_DSPMDAT_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_WDT_REG] = (REG_RD_ACCESS), > + [AW_PID_2049_ACR1_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_ACR2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_ASR1_REG] = (REG_RD_ACCESS), > + [AW_PID_2049_ASR2_REG] = (REG_RD_ACCESS), > + [AW_PID_2049_DSPCFG_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_ASR3_REG] = (REG_RD_ACCESS), > + [AW_PID_2049_ASR4_REG] = (REG_RD_ACCESS), > + [AW_PID_2049_VSNCTRL1_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_ISNCTRL1_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_PLLCTRL1_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_PLLCTRL2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_PLLCTRL3_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_CDACTRL1_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_CDACTRL2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_SADCCTRL1_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_SADCCTRL2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_CPCTRL1_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_BSTCTRL1_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_BSTCTRL2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_BSTCTRL3_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_BSTCTRL4_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_BSTCTRL5_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_BSTCTRL6_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_BSTCTRL7_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_DSMCFG1_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_DSMCFG2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_DSMCFG3_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_DSMCFG4_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_DSMCFG5_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_DSMCFG6_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_DSMCFG7_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_DSMCFG8_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_TESTCTRL1_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_TESTCTRL2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_EFCTRL1_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_EFCTRL2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_EFWH_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_EFWM2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_EFWM1_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_EFWL_REG] = (REG_RD_ACCESS | REG_WR_ACCESS), > + [AW_PID_2049_EFRH_REG] = (REG_RD_ACCESS), > + [AW_PID_2049_EFRM2_REG] = (REG_RD_ACCESS), > + [AW_PID_2049_EFRM1_REG] = (REG_RD_ACCESS), > + [AW_PID_2049_EFRL_REG] = (REG_RD_ACCESS), > + [AW_PID_2049_TM_REG] = (REG_NONE_ACCESS), > +}; > + > +#define AW_PID_2049_VOLUME_STEP_DB (6 * 8) > + > + > +/* detail information of registers begin */ > +/* ID (0x00) detail */ > +/* IDCODE bit 15:0 (ID 0x00) */ > +#define AW_PID_2049_IDCODE_START_BIT (0) > +#define AW_PID_2049_IDCODE_BITS_LEN (16) > +#define AW_PID_2049_IDCODE_MASK \ > + (~(((1<<AW_PID_2049_IDCODE_BITS_LEN)-1) << AW_PID_2049_IDCODE_START_BIT)) > + > +#define AW_PID_2049_IDCODE_DEFAULT_VALUE (0x2049) > +#define AW_PID_2049_IDCODE_DEFAULT \ > + (AW_PID_2049_IDCODE_DEFAULT_VALUE << AW_PID_2049_IDCODE_START_BIT) > + > +#define AW_PID_2049_SOFT_RESET_VALUE (0x55aa) > + > +/* default value of ID (0x00) */ > +/* #define AW_PID_2049_ID_DEFAULT (0x2049) */ > + > +/* SYSST (0x01) detail */ > +/* OVP2S bit 15 (SYSST 0x01) */ > +#define AW_PID_2049_OVP2S_START_BIT (15) > +#define AW_PID_2049_OVP2S_BITS_LEN (1) > +#define AW_PID_2049_OVP2S_MASK \ > + (~(((1<<AW_PID_2049_OVP2S_BITS_LEN)-1) << AW_PID_2049_OVP2S_START_BIT)) > + > +#define AW_PID_2049_OVP2S_NORMAL (0) > +#define AW_PID_2049_OVP2S_NORMAL_VALUE \ > + (AW_PID_2049_OVP2S_NORMAL << AW_PID_2049_OVP2S_START_BIT) > + > +#define AW_PID_2049_OVP2S_OVP (1) > +#define AW_PID_2049_OVP2S_OVP_VALUE \ > + (AW_PID_2049_OVP2S_OVP << AW_PID_2049_OVP2S_START_BIT) > + > +#define AW_PID_2049_OVP2S_DEFAULT_VALUE (0) > +#define AW_PID_2049_OVP2S_DEFAULT \ > + (AW_PID_2049_OVP2S_DEFAULT_VALUE << AW_PID_2049_OVP2S_START_BIT) > + > +/* UVLS bit 14 (SYSST 0x01) */ > +#define AW_PID_2049_UVLS_START_BIT (14) > +#define AW_PID_2049_UVLS_BITS_LEN (1) > +#define AW_PID_2049_UVLS_MASK \ > + (~(((1<<AW_PID_2049_UVLS_BITS_LEN)-1) << AW_PID_2049_UVLS_START_BIT)) > + > +#define AW_PID_2049_UVLS_NORMAL (0) > +#define AW_PID_2049_UVLS_NORMAL_VALUE \ > + (AW_PID_2049_UVLS_NORMAL << AW_PID_2049_UVLS_START_BIT) > + > +#define AW_PID_2049_UVLS_UVLO (1) > +#define AW_PID_2049_UVLS_UVLO_VALUE \ > + (AW_PID_2049_UVLS_UVLO << AW_PID_2049_UVLS_START_BIT) > + > +#define AW_PID_2049_UVLS_DEFAULT_VALUE (0) > +#define AW_PID_2049_UVLS_DEFAULT \ > + (AW_PID_2049_UVLS_DEFAULT_VALUE << AW_PID_2049_UVLS_START_BIT) > + > +/* ADPS bit 13 (SYSST 0x01) */ > +#define AW_PID_2049_ADPS_START_BIT (13) > +#define AW_PID_2049_ADPS_BITS_LEN (1) > +#define AW_PID_2049_ADPS_MASK \ > + (~(((1<<AW_PID_2049_ADPS_BITS_LEN)-1) << AW_PID_2049_ADPS_START_BIT)) > + > +#define AW_PID_2049_ADPS_TRANSPARENT (0) > +#define AW_PID_2049_ADPS_TRANSPARENT_VALUE \ > + (AW_PID_2049_ADPS_TRANSPARENT << AW_PID_2049_ADPS_START_BIT) > + > +#define AW_PID_2049_ADPS_BOOST (1) > +#define AW_PID_2049_ADPS_BOOST_VALUE \ > + (AW_PID_2049_ADPS_BOOST << AW_PID_2049_ADPS_START_BIT) > + > +#define AW_PID_2049_ADPS_DEFAULT_VALUE (0) > +#define AW_PID_2049_ADPS_DEFAULT \ > + (AW_PID_2049_ADPS_DEFAULT_VALUE << AW_PID_2049_ADPS_START_BIT) > + > +/* DSPS bit 12 (SYSST 0x01) */ > +#define AW_PID_2049_DSPS_START_BIT (12) > +#define AW_PID_2049_DSPS_BITS_LEN (1) > +#define AW_PID_2049_DSPS_MASK \ > + (~(((1<<AW_PID_2049_DSPS_BITS_LEN)-1) << AW_PID_2049_DSPS_START_BIT)) > + > +#define AW_PID_2049_DSPS_NORMAL (0) > +#define AW_PID_2049_DSPS_NORMAL_VALUE \ > + (AW_PID_2049_DSPS_NORMAL << AW_PID_2049_DSPS_START_BIT) > + > +#define AW_PID_2049_DSPS_DSP_STABLE (1) > +#define AW_PID_2049_DSPS_DSP_STABLE_VALUE \ > + (AW_PID_2049_DSPS_DSP_STABLE << AW_PID_2049_DSPS_START_BIT) > + > +#define AW_PID_2049_DSPS_DEFAULT_VALUE (0) > +#define AW_PID_2049_DSPS_DEFAULT \ > + (AW_PID_2049_DSPS_DEFAULT_VALUE << AW_PID_2049_DSPS_START_BIT) > + > +/* BSTOCS bit 11 (SYSST 0x01) */ > +#define AW_PID_2049_BSTOCS_START_BIT (11) > +#define AW_PID_2049_BSTOCS_BITS_LEN (1) > +#define AW_PID_2049_BSTOCS_MASK \ > + (~(((1<<AW_PID_2049_BSTOCS_BITS_LEN)-1) << AW_PID_2049_BSTOCS_START_BIT)) > + > +#define AW_PID_2049_BSTOCS_NORMAL (0) > +#define AW_PID_2049_BSTOCS_NORMAL_VALUE \ > + (AW_PID_2049_BSTOCS_NORMAL << AW_PID_2049_BSTOCS_START_BIT) > + > +#define AW_PID_2049_BSTOCS_OVER_CURRENT (1) > +#define AW_PID_2049_BSTOCS_OVER_CURRENT_VALUE \ > + (AW_PID_2049_BSTOCS_OVER_CURRENT << AW_PID_2049_BSTOCS_START_BIT) > + > +#define AW_PID_2049_BSTOCS_DEFAULT_VALUE (0) > +#define AW_PID_2049_BSTOCS_DEFAULT \ > + (AW_PID_2049_BSTOCS_DEFAULT_VALUE << AW_PID_2049_BSTOCS_START_BIT) > + > +/* OVPS bit 10 (SYSST 0x01) */ > +#define AW_PID_2049_OVPS_START_BIT (10) > +#define AW_PID_2049_OVPS_BITS_LEN (1) > +#define AW_PID_2049_OVPS_MASK \ > + (~(((1<<AW_PID_2049_OVPS_BITS_LEN)-1) << AW_PID_2049_OVPS_START_BIT)) > + > +#define AW_PID_2049_OVPS_NORMAL (0) > +#define AW_PID_2049_OVPS_NORMAL_VALUE \ > + (AW_PID_2049_OVPS_NORMAL << AW_PID_2049_OVPS_START_BIT) > + > +#define AW_PID_2049_OVPS_OVP (1) > +#define AW_PID_2049_OVPS_OVP_VALUE \ > + (AW_PID_2049_OVPS_OVP << AW_PID_2049_OVPS_START_BIT) > + > +#define AW_PID_2049_OVPS_DEFAULT_VALUE (0) > +#define AW_PID_2049_OVPS_DEFAULT \ > + (AW_PID_2049_OVPS_DEFAULT_VALUE << AW_PID_2049_OVPS_START_BIT) > + > +/* BSTS bit 9 (SYSST 0x01) */ > +#define AW_PID_2049_BSTS_START_BIT (9) > +#define AW_PID_2049_BSTS_BITS_LEN (1) > +#define AW_PID_2049_BSTS_MASK \ > + (~(((1<<AW_PID_2049_BSTS_BITS_LEN)-1) << AW_PID_2049_BSTS_START_BIT)) > + > +#define AW_PID_2049_BSTS_NOT_FINISHED (0) > +#define AW_PID_2049_BSTS_NOT_FINISHED_VALUE \ > + (AW_PID_2049_BSTS_NOT_FINISHED << AW_PID_2049_BSTS_START_BIT) > + > +#define AW_PID_2049_BSTS_FINISHED (1) > +#define AW_PID_2049_BSTS_FINISHED_VALUE \ > + (AW_PID_2049_BSTS_FINISHED << AW_PID_2049_BSTS_START_BIT) > + > +#define AW_PID_2049_BSTS_DEFAULT_VALUE (0) > +#define AW_PID_2049_BSTS_DEFAULT \ > + (AW_PID_2049_BSTS_DEFAULT_VALUE << AW_PID_2049_BSTS_START_BIT) > + > +/* SWS bit 8 (SYSST 0x01) */ > +#define AW_PID_2049_SWS_START_BIT (8) > +#define AW_PID_2049_SWS_BITS_LEN (1) > +#define AW_PID_2049_SWS_MASK \ > + (~(((1<<AW_PID_2049_SWS_BITS_LEN)-1) << AW_PID_2049_SWS_START_BIT)) > + > +#define AW_PID_2049_SWS_NOT_SWITCHING (0) > +#define AW_PID_2049_SWS_NOT_SWITCHING_VALUE \ > + (AW_PID_2049_SWS_NOT_SWITCHING << AW_PID_2049_SWS_START_BIT) > + > +#define AW_PID_2049_SWS_SWITCHING (1) > +#define AW_PID_2049_SWS_SWITCHING_VALUE \ > + (AW_PID_2049_SWS_SWITCHING << AW_PID_2049_SWS_START_BIT) > + > +#define AW_PID_2049_SWS_DEFAULT_VALUE (0) > +#define AW_PID_2049_SWS_DEFAULT \ > + (AW_PID_2049_SWS_DEFAULT_VALUE << AW_PID_2049_SWS_START_BIT) > + > +/* CLIPS bit 7 (SYSST 0x01) */ > +#define AW_PID_2049_CLIPS_START_BIT (7) > +#define AW_PID_2049_CLIPS_BITS_LEN (1) > +#define AW_PID_2049_CLIPS_MASK \ > + (~(((1<<AW_PID_2049_CLIPS_BITS_LEN)-1) << AW_PID_2049_CLIPS_START_BIT)) > + > +#define AW_PID_2049_CLIPS_NOT_CLIPPING (0) > +#define AW_PID_2049_CLIPS_NOT_CLIPPING_VALUE \ > + (AW_PID_2049_CLIPS_NOT_CLIPPING << AW_PID_2049_CLIPS_START_BIT) > + > +#define AW_PID_2049_CLIPS_CLIPPING (1) > +#define AW_PID_2049_CLIPS_CLIPPING_VALUE \ > + (AW_PID_2049_CLIPS_CLIPPING << AW_PID_2049_CLIPS_START_BIT) > + > +#define AW_PID_2049_CLIPS_DEFAULT_VALUE (0) > +#define AW_PID_2049_CLIPS_DEFAULT \ > + (AW_PID_2049_CLIPS_DEFAULT_VALUE << AW_PID_2049_CLIPS_START_BIT) > + > +/* WDS bit 6 (SYSST 0x01) */ > +#define AW_PID_2049_WDS_START_BIT (6) > +#define AW_PID_2049_WDS_BITS_LEN (1) > +#define AW_PID_2049_WDS_MASK \ > + (~(((1<<AW_PID_2049_WDS_BITS_LEN)-1) << AW_PID_2049_WDS_START_BIT)) > + > +#define AW_PID_2049_WDS_NORMAL (0) > +#define AW_PID_2049_WDS_NORMAL_VALUE \ > + (AW_PID_2049_WDS_NORMAL << AW_PID_2049_WDS_START_BIT) > + > +#define AW_PID_2049_WDS_ABNORMAL (1) > +#define AW_PID_2049_WDS_ABNORMAL_VALUE \ > + (AW_PID_2049_WDS_ABNORMAL << AW_PID_2049_WDS_START_BIT) > + > +#define AW_PID_2049_WDS_DEFAULT_VALUE (0) > +#define AW_PID_2049_WDS_DEFAULT \ > + (AW_PID_2049_WDS_DEFAULT_VALUE << AW_PID_2049_WDS_START_BIT) > + > +/* NOCLKS bit 5 (SYSST 0x01) */ > +#define AW_PID_2049_NOCLKS_START_BIT (5) > +#define AW_PID_2049_NOCLKS_BITS_LEN (1) > +#define AW_PID_2049_NOCLKS_MASK \ > + (~(((1<<AW_PID_2049_NOCLKS_BITS_LEN)-1) << AW_PID_2049_NOCLKS_START_BIT)) > + > +#define AW_PID_2049_NOCLKS_CLOCK_OK (0) > +#define AW_PID_2049_NOCLKS_CLOCK_OK_VALUE \ > + (AW_PID_2049_NOCLKS_CLOCK_OK << AW_PID_2049_NOCLKS_START_BIT) > + > +#define AW_PID_2049_NOCLKS_NO_CLOCK (1) > +#define AW_PID_2049_NOCLKS_NO_CLOCK_VALUE \ > + (AW_PID_2049_NOCLKS_NO_CLOCK << AW_PID_2049_NOCLKS_START_BIT) > + > +#define AW_PID_2049_NOCLKS_DEFAULT_VALUE (0) > +#define AW_PID_2049_NOCLKS_DEFAULT \ > + (AW_PID_2049_NOCLKS_DEFAULT_VALUE << AW_PID_2049_NOCLKS_START_BIT) > + > +/* CLKS bit 4 (SYSST 0x01) */ > +#define AW_PID_2049_CLKS_START_BIT (4) > +#define AW_PID_2049_CLKS_BITS_LEN (1) > +#define AW_PID_2049_CLKS_MASK \ > + (~(((1<<AW_PID_2049_CLKS_BITS_LEN)-1) << AW_PID_2049_CLKS_START_BIT)) > + > +#define AW_PID_2049_CLKS_NOT_STABLE (0) > +#define AW_PID_2049_CLKS_NOT_STABLE_VALUE \ > + (AW_PID_2049_CLKS_NOT_STABLE << AW_PID_2049_CLKS_START_BIT) > + > +#define AW_PID_2049_CLKS_STABLE (1) > +#define AW_PID_2049_CLKS_STABLE_VALUE \ > + (AW_PID_2049_CLKS_STABLE << AW_PID_2049_CLKS_START_BIT) > + > +#define AW_PID_2049_CLKS_DEFAULT_VALUE (0) > +#define AW_PID_2049_CLKS_DEFAULT \ > + (AW_PID_2049_CLKS_DEFAULT_VALUE << AW_PID_2049_CLKS_START_BIT) > + > +/* OCDS bit 3 (SYSST 0x01) */ > +#define AW_PID_2049_OCDS_START_BIT (3) > +#define AW_PID_2049_OCDS_BITS_LEN (1) > +#define AW_PID_2049_OCDS_MASK \ > + (~(((1<<AW_PID_2049_OCDS_BITS_LEN)-1) << AW_PID_2049_OCDS_START_BIT)) > + > +#define AW_PID_2049_OCDS_NORAML (0) > +#define AW_PID_2049_OCDS_NORAML_VALUE \ > + (AW_PID_2049_OCDS_NORAML << AW_PID_2049_OCDS_START_BIT) > + > +#define AW_PID_2049_OCDS_OC (1) > +#define AW_PID_2049_OCDS_OC_VALUE \ > + (AW_PID_2049_OCDS_OC << AW_PID_2049_OCDS_START_BIT) > + > +#define AW_PID_2049_OCDS_DEFAULT_VALUE (0) > +#define AW_PID_2049_OCDS_DEFAULT \ > + (AW_PID_2049_OCDS_DEFAULT_VALUE << AW_PID_2049_OCDS_START_BIT) > + > +/* CLIP_PRES bit 2 (SYSST 0x01) */ > +#define AW_PID_2049_CLIP_PRES_START_BIT (2) > +#define AW_PID_2049_CLIP_PRES_BITS_LEN (1) > +#define AW_PID_2049_CLIP_PRES_MASK \ > + (~(((1<<AW_PID_2049_CLIP_PRES_BITS_LEN)-1) << AW_PID_2049_CLIP_PRES_START_BIT)) > + > +#define AW_PID_2049_CLIP_PRES_NOT_CLIPPING (0) > +#define AW_PID_2049_CLIP_PRES_NOT_CLIPPING_VALUE \ > + (AW_PID_2049_CLIP_PRES_NOT_CLIPPING << AW_PID_2049_CLIP_PRES_START_BIT) > + > +#define AW_PID_2049_CLIP_PRES_CLIPPING (1) > +#define AW_PID_2049_CLIP_PRES_CLIPPING_VALUE \ > + (AW_PID_2049_CLIP_PRES_CLIPPING << AW_PID_2049_CLIP_PRES_START_BIT) > + > +#define AW_PID_2049_CLIP_PRES_DEFAULT_VALUE (0) > +#define AW_PID_2049_CLIP_PRES_DEFAULT \ > + (AW_PID_2049_CLIP_PRES_DEFAULT_VALUE << AW_PID_2049_CLIP_PRES_START_BIT) > + > +/* OTHS bit 1 (SYSST 0x01) */ > +#define AW_PID_2049_OTHS_START_BIT (1) > +#define AW_PID_2049_OTHS_BITS_LEN (1) > +#define AW_PID_2049_OTHS_MASK \ > + (~(((1<<AW_PID_2049_OTHS_BITS_LEN)-1) << AW_PID_2049_OTHS_START_BIT)) > + > +#define AW_PID_2049_OTHS_NORMAL (0) > +#define AW_PID_2049_OTHS_NORMAL_VALUE \ > + (AW_PID_2049_OTHS_NORMAL << AW_PID_2049_OTHS_START_BIT) > + > +#define AW_PID_2049_OTHS_OT (1) > +#define AW_PID_2049_OTHS_OT_VALUE \ > + (AW_PID_2049_OTHS_OT << AW_PID_2049_OTHS_START_BIT) > + > +#define AW_PID_2049_OTHS_DEFAULT_VALUE (0) > +#define AW_PID_2049_OTHS_DEFAULT \ > + (AW_PID_2049_OTHS_DEFAULT_VALUE << AW_PID_2049_OTHS_START_BIT) > + > +/* PLLS bit 0 (SYSST 0x01) */ > +#define AW_PID_2049_PLLS_START_BIT (0) > +#define AW_PID_2049_PLLS_BITS_LEN (1) > +#define AW_PID_2049_PLLS_MASK \ > + (~(((1<<AW_PID_2049_PLLS_BITS_LEN)-1) << AW_PID_2049_PLLS_START_BIT)) > + > +#define AW_PID_2049_PLLS_UNLOCKED (0) > +#define AW_PID_2049_PLLS_UNLOCKED_VALUE \ > + (AW_PID_2049_PLLS_UNLOCKED << AW_PID_2049_PLLS_START_BIT) > + > +#define AW_PID_2049_PLLS_LOCKED (1) > +#define AW_PID_2049_PLLS_LOCKED_VALUE \ > + (AW_PID_2049_PLLS_LOCKED << AW_PID_2049_PLLS_START_BIT) > + > +#define AW_PID_2049_PLLS_DEFAULT_VALUE (0) > +#define AW_PID_2049_PLLS_DEFAULT \ > + (AW_PID_2049_PLLS_DEFAULT_VALUE << AW_PID_2049_PLLS_START_BIT) > + > + > + > +#define AW_PID_2049_BIT_PLL_CHECK \ > + (AW_PID_2049_CLKS_STABLE_VALUE | \ > + AW_PID_2049_PLLS_LOCKED_VALUE) > + > + > +#define AW_PID_2049_BIT_SYSST_CHECK_MASK \ > + (~(AW_PID_2049_UVLS_NORMAL_VALUE | \ > + AW_PID_2049_BSTOCS_OVER_CURRENT_VALUE | \ > + AW_PID_2049_BSTS_FINISHED_VALUE | \ > + AW_PID_2049_SWS_SWITCHING_VALUE | \ > + AW_PID_2049_NOCLKS_NO_CLOCK_VALUE | \ > + AW_PID_2049_CLKS_STABLE_VALUE | \ > + AW_PID_2049_OCDS_OC_VALUE | \ > + AW_PID_2049_OTHS_OT_VALUE | \ > + AW_PID_2049_PLLS_LOCKED_VALUE)) > + > +#define AW_PID_2049_BIT_SYSST_CHECK \ > + (AW_PID_2049_BSTS_FINISHED_VALUE | \ > + AW_PID_2049_SWS_SWITCHING_VALUE | \ > + AW_PID_2049_CLKS_STABLE_VALUE | \ > + AW_PID_2049_PLLS_LOCKED_VALUE) > + > +/* default value of SYSST (0x01) */ > +/* #define AW_PID_2049_SYSST_DEFAULT (0x0000) */ > + > +/* SYSINT (0x02) detail */ > +/* OVP2I bit 15 (SYSINT 0x02) */ > +#define AW_PID_2049_OVP2I_START_BIT (15) > +#define AW_PID_2049_OVP2I_BITS_LEN (1) > +#define AW_PID_2049_OVP2I_MASK \ > + (~(((1<<AW_PID_2049_OVP2I_BITS_LEN)-1) << AW_PID_2049_OVP2I_START_BIT)) > + > +#define AW_PID_2049_OVP2I_DEFAULT_VALUE (0) > +#define AW_PID_2049_OVP2I_DEFAULT \ > + (AW_PID_2049_OVP2I_DEFAULT_VALUE << AW_PID_2049_OVP2I_START_BIT) > + > +/* UVLI bit 14 (SYSINT 0x02) */ > +#define AW_PID_2049_UVLI_START_BIT (14) > +#define AW_PID_2049_UVLI_BITS_LEN (1) > +#define AW_PID_2049_UVLI_MASK \ > + (~(((1<<AW_PID_2049_UVLI_BITS_LEN)-1) << AW_PID_2049_UVLI_START_BIT)) > + > +#define AW_PID_2049_UVLI_DEFAULT_VALUE (0) > +#define AW_PID_2049_UVLI_DEFAULT \ > + (AW_PID_2049_UVLI_DEFAULT_VALUE << AW_PID_2049_UVLI_START_BIT) > + > +/* ADPI bit 13 (SYSINT 0x02) */ > +#define AW_PID_2049_ADPI_START_BIT (13) > +#define AW_PID_2049_ADPI_BITS_LEN (1) > +#define AW_PID_2049_ADPI_MASK \ > + (~(((1<<AW_PID_2049_ADPI_BITS_LEN)-1) << AW_PID_2049_ADPI_START_BIT)) > + > +#define AW_PID_2049_ADPI_DEFAULT_VALUE (0) > +#define AW_PID_2049_ADPI_DEFAULT \ > + (AW_PID_2049_ADPI_DEFAULT_VALUE << AW_PID_2049_ADPI_START_BIT) > + > +/* DSPI bit 12 (SYSINT 0x02) */ > +#define AW_PID_2049_DSPI_START_BIT (12) > +#define AW_PID_2049_DSPI_BITS_LEN (1) > +#define AW_PID_2049_DSPI_MASK \ > + (~(((1<<AW_PID_2049_DSPI_BITS_LEN)-1) << AW_PID_2049_DSPI_START_BIT)) > + > +#define AW_PID_2049_DSPI_DEFAULT_VALUE (0) > +#define AW_PID_2049_DSPI_DEFAULT \ > + (AW_PID_2049_DSPI_DEFAULT_VALUE << AW_PID_2049_DSPI_START_BIT) > + > +/* BSTOCI bit 11 (SYSINT 0x02) */ > +#define AW_PID_2049_BSTOCI_START_BIT (11) > +#define AW_PID_2049_BSTOCI_BITS_LEN (1) > +#define AW_PID_2049_BSTOCI_MASK \ > + (~(((1<<AW_PID_2049_BSTOCI_BITS_LEN)-1) << AW_PID_2049_BSTOCI_START_BIT)) > + > +#define AW_PID_2049_BSTOCI_DEFAULT_VALUE (0) > +#define AW_PID_2049_BSTOCI_DEFAULT \ > + (AW_PID_2049_BSTOCI_DEFAULT_VALUE << AW_PID_2049_BSTOCI_START_BIT) > + > +/* OVPI bit 10 (SYSINT 0x02) */ > +#define AW_PID_2049_OVPI_START_BIT (10) > +#define AW_PID_2049_OVPI_BITS_LEN (1) > +#define AW_PID_2049_OVPI_MASK \ > + (~(((1<<AW_PID_2049_OVPI_BITS_LEN)-1) << AW_PID_2049_OVPI_START_BIT)) > + > +#define AW_PID_2049_OVPI_DEFAULT_VALUE (0) > +#define AW_PID_2049_OVPI_DEFAULT \ > + (AW_PID_2049_OVPI_DEFAULT_VALUE << AW_PID_2049_OVPI_START_BIT) > + > +/* BSTI bit 9 (SYSINT 0x02) */ > +#define AW_PID_2049_BSTI_START_BIT (9) > +#define AW_PID_2049_BSTI_BITS_LEN (1) > +#define AW_PID_2049_BSTI_MASK \ > + (~(((1<<AW_PID_2049_BSTI_BITS_LEN)-1) << AW_PID_2049_BSTI_START_BIT)) > + > +#define AW_PID_2049_BSTI_DEFAULT_VALUE (0) > +#define AW_PID_2049_BSTI_DEFAULT \ > + (AW_PID_2049_BSTI_DEFAULT_VALUE << AW_PID_2049_BSTI_START_BIT) > + > +/* SWI bit 8 (SYSINT 0x02) */ > +#define AW_PID_2049_SWI_START_BIT (8) > +#define AW_PID_2049_SWI_BITS_LEN (1) > +#define AW_PID_2049_SWI_MASK \ > + (~(((1<<AW_PID_2049_SWI_BITS_LEN)-1) << AW_PID_2049_SWI_START_BIT)) > + > +#define AW_PID_2049_SWI_DEFAULT_VALUE (0) > +#define AW_PID_2049_SWI_DEFAULT \ > + (AW_PID_2049_SWI_DEFAULT_VALUE << AW_PID_2049_SWI_START_BIT) > + > +/* CLIPI bit 7 (SYSINT 0x02) */ > +#define AW_PID_2049_CLIPI_START_BIT (7) > +#define AW_PID_2049_CLIPI_BITS_LEN (1) > +#define AW_PID_2049_CLIPI_MASK \ > + (~(((1<<AW_PID_2049_CLIPI_BITS_LEN)-1) << AW_PID_2049_CLIPI_START_BIT)) > + > +#define AW_PID_2049_CLIPI_DEFAULT_VALUE (0) > +#define AW_PID_2049_CLIPI_DEFAULT \ > + (AW_PID_2049_CLIPI_DEFAULT_VALUE << AW_PID_2049_CLIPI_START_BIT) > + > +/* WDI bit 6 (SYSINT 0x02) */ > +#define AW_PID_2049_WDI_START_BIT (6) > +#define AW_PID_2049_WDI_BITS_LEN (1) > +#define AW_PID_2049_WDI_MASK \ > + (~(((1<<AW_PID_2049_WDI_BITS_LEN)-1) << AW_PID_2049_WDI_START_BIT)) > + > +#define AW_PID_2049_WDI_DEFAULT_VALUE (0) > +#define AW_PID_2049_WDI_INT_VALUE (1) > +#define AW_PID_2049_WDI_DEFAULT \ > + (AW_PID_2049_WDI_DEFAULT_VALUE << AW_PID_2049_WDI_START_BIT) > +#define AW_PID_2049_WDI_INTERRUPT \ > + (AW_PID_2049_WDI_INT_VALUE << AW_PID_2049_WDI_START_BIT) > + > +/* NOCLKI bit 5 (SYSINT 0x02) */ > +#define AW_PID_2049_NOCLKI_START_BIT (5) > +#define AW_PID_2049_NOCLKI_BITS_LEN (1) > +#define AW_PID_2049_NOCLKI_MASK \ > + (~(((1<<AW_PID_2049_NOCLKI_BITS_LEN)-1) << AW_PID_2049_NOCLKI_START_BIT)) > + > +#define AW_PID_2049_NOCLKI_DEFAULT_VALUE (0) > +#define AW_PID_2049_NOCLKI_INT_VALUE (1) > +#define AW_PID_2049_NOCLKI_DEFAULT \ > + (AW_PID_2049_NOCLKI_DEFAULT_VALUE << AW_PID_2049_NOCLKI_START_BIT) > +#define AW_PID_2049_NOCLKI_INTERRUPT \ > + (AW_PID_2049_NOCLKI_INT_VALUE << AW_PID_2049_NOCLKI_START_BIT) > + > +/* CLKI bit 4 (SYSINT 0x02) */ > +#define AW_PID_2049_CLKI_START_BIT (4) > +#define AW_PID_2049_CLKI_BITS_LEN (1) > +#define AW_PID_2049_CLKI_MASK \ > + (~(((1<<AW_PID_2049_CLKI_BITS_LEN)-1) << AW_PID_2049_CLKI_START_BIT)) > + > +#define AW_PID_2049_CLKI_DEFAULT_VALUE (0) > +#define AW_PID_2049_CLKI_INT_VALUE (1) > +#define AW_PID_2049_CLKI_DEFAULT \ > + (AW_PID_2049_CLKI_DEFAULT_VALUE << AW_PID_2049_CLKI_START_BIT) > +#define AW_PID_2049_CLKI_INTERRUPT \ > + (AW_PID_2049_CLKI_INT_VALUE << AW_PID_2049_CLKI_START_BIT) > + > +/* OCDI bit 3 (SYSINT 0x02) */ > +#define AW_PID_2049_OCDI_START_BIT (3) > +#define AW_PID_2049_OCDI_BITS_LEN (1) > +#define AW_PID_2049_OCDI_MASK \ > + (~(((1<<AW_PID_2049_OCDI_BITS_LEN)-1) << AW_PID_2049_OCDI_START_BIT)) > + > +#define AW_PID_2049_OCDI_DEFAULT_VALUE (0) > +#define AW_PID_2049_OCDI_DEFAULT \ > + (AW_PID_2049_OCDI_DEFAULT_VALUE << AW_PID_2049_OCDI_START_BIT) > + > +/* CLIP_PREI bit 2 (SYSINT 0x02) */ > +#define AW_PID_2049_CLIP_PREI_START_BIT (2) > +#define AW_PID_2049_CLIP_PREI_BITS_LEN (1) > +#define AW_PID_2049_CLIP_PREI_MASK \ > + (~(((1<<AW_PID_2049_CLIP_PREI_BITS_LEN)-1) << AW_PID_2049_CLIP_PREI_START_BIT)) > + > +#define AW_PID_2049_CLIP_PREI_DEFAULT_VALUE (0) > +#define AW_PID_2049_CLIP_PREI_DEFAULT \ > + (AW_PID_2049_CLIP_PREI_DEFAULT_VALUE << AW_PID_2049_CLIP_PREI_START_BIT) > + > +/* OTHI bit 1 (SYSINT 0x02) */ > +#define AW_PID_2049_OTHI_START_BIT (1) > +#define AW_PID_2049_OTHI_BITS_LEN (1) > +#define AW_PID_2049_OTHI_MASK \ > + (~(((1<<AW_PID_2049_OTHI_BITS_LEN)-1) << AW_PID_2049_OTHI_START_BIT)) > + > +#define AW_PID_2049_OTHI_DEFAULT_VALUE (0) > +#define AW_PID_2049_OTHI_DEFAULT \ > + (AW_PID_2049_OTHI_DEFAULT_VALUE << AW_PID_2049_OTHI_START_BIT) > + > +/* PLLI bit 0 (SYSINT 0x02) */ > +#define AW_PID_2049_PLLI_START_BIT (0) > +#define AW_PID_2049_PLLI_BITS_LEN (1) > +#define AW_PID_2049_PLLI_MASK \ > + (~(((1<<AW_PID_2049_PLLI_BITS_LEN)-1) << AW_PID_2049_PLLI_START_BIT)) > + > +#define AW_PID_2049_PLLI_DEFAULT_VALUE (0) > +#define AW_PID_2049_PLLI_INT_VALUE (1) > +#define AW_PID_2049_PLLI_DEFAULT \ > + (AW_PID_2049_PLLI_DEFAULT_VALUE << AW_PID_2049_PLLI_START_BIT) > +#define AW_PID_2049_PLLI_INTERRUPT \ > + (AW_PID_2049_PLLI_INT_VALUE << AW_PID_2049_PLLI_START_BIT) > + > +/* default value of SYSINT (0x02) */ > +/* #define AW_PID_2049_SYSINT_DEFAULT (0x0000) */ > + > +#define AW_PID_2049_BIT_SYSINT_CHECK \ > + (AW_PID_2049_WDI_INTERRUPT | \ > + AW_PID_2049_CLKI_INTERRUPT | \ > + AW_PID_2049_NOCLKI_INTERRUPT | \ > + AW_PID_2049_PLLI_INTERRUPT) > + > +/* SYSINTM (0x03) detail */ > +/* OVP2M bit 15 (SYSINTM 0x03) */ > +#define AW_PID_2049_OVP2M_START_BIT (15) > +#define AW_PID_2049_OVP2M_BITS_LEN (1) > +#define AW_PID_2049_OVP2M_MASK \ > + (~(((1<<AW_PID_2049_OVP2M_BITS_LEN)-1) << AW_PID_2049_OVP2M_START_BIT)) > + > +#define AW_PID_2049_OVP2M_DEFAULT_VALUE (1) > +#define AW_PID_2049_OVP2M_DEFAULT \ > + (AW_PID_2049_OVP2M_DEFAULT_VALUE << AW_PID_2049_OVP2M_START_BIT) > + > +/* UVLM bit 14 (SYSINTM 0x03) */ > +#define AW_PID_2049_UVLM_START_BIT (14) > +#define AW_PID_2049_UVLM_BITS_LEN (1) > +#define AW_PID_2049_UVLM_MASK \ > + (~(((1<<AW_PID_2049_UVLM_BITS_LEN)-1) << AW_PID_2049_UVLM_START_BIT)) > + > +#define AW_PID_2049_UVLM_DEFAULT_VALUE (1) > +#define AW_PID_2049_UVLM_DEFAULT \ > + (AW_PID_2049_UVLM_DEFAULT_VALUE << AW_PID_2049_UVLM_START_BIT) > + > +/* ADPM bit 13 (SYSINTM 0x03) */ > +#define AW_PID_2049_ADPM_START_BIT (13) > +#define AW_PID_2049_ADPM_BITS_LEN (1) > +#define AW_PID_2049_ADPM_MASK \ > + (~(((1<<AW_PID_2049_ADPM_BITS_LEN)-1) << AW_PID_2049_ADPM_START_BIT)) > + > +#define AW_PID_2049_ADPM_DEFAULT_VALUE (1) > +#define AW_PID_2049_ADPM_DEFAULT \ > + (AW_PID_2049_ADPM_DEFAULT_VALUE << AW_PID_2049_ADPM_START_BIT) > + > +/* DSPM bit 12 (SYSINTM 0x03) */ > +#define AW_PID_2049_DSPM_START_BIT (12) > +#define AW_PID_2049_DSPM_BITS_LEN (1) > +#define AW_PID_2049_DSPM_MASK \ > + (~(((1<<AW_PID_2049_DSPM_BITS_LEN)-1) << AW_PID_2049_DSPM_START_BIT)) > + > +#define AW_PID_2049_DSPM_DEFAULT_VALUE (1) > +#define AW_PID_2049_DSPM_DEFAULT \ > + (AW_PID_2049_DSPM_DEFAULT_VALUE << AW_PID_2049_DSPM_START_BIT) > + > +/* BSTOCM bit 11 (SYSINTM 0x03) */ > +#define AW_PID_2049_BSTOCM_START_BIT (11) > +#define AW_PID_2049_BSTOCM_BITS_LEN (1) > +#define AW_PID_2049_BSTOCM_MASK \ > + (~(((1<<AW_PID_2049_BSTOCM_BITS_LEN)-1) << AW_PID_2049_BSTOCM_START_BIT)) > + > +#define AW_PID_2049_BSTOCM_DEFAULT_VALUE (1) > +#define AW_PID_2049_BSTOCM_DEFAULT \ > + (AW_PID_2049_BSTOCM_DEFAULT_VALUE << AW_PID_2049_BSTOCM_START_BIT) > + > +/* OVPM bit 10 (SYSINTM 0x03) */ > +#define AW_PID_2049_OVPM_START_BIT (10) > +#define AW_PID_2049_OVPM_BITS_LEN (1) > +#define AW_PID_2049_OVPM_MASK \ > + (~(((1<<AW_PID_2049_OVPM_BITS_LEN)-1) << AW_PID_2049_OVPM_START_BIT)) > + > +#define AW_PID_2049_OVPM_DEFAULT_VALUE (1) > +#define AW_PID_2049_OVPM_DEFAULT \ > + (AW_PID_2049_OVPM_DEFAULT_VALUE << AW_PID_2049_OVPM_START_BIT) > + > +/* BSTM bit 9 (SYSINTM 0x03) */ > +#define AW_PID_2049_BSTM_START_BIT (9) > +#define AW_PID_2049_BSTM_BITS_LEN (1) > +#define AW_PID_2049_BSTM_MASK \ > + (~(((1<<AW_PID_2049_BSTM_BITS_LEN)-1) << AW_PID_2049_BSTM_START_BIT)) > + > +#define AW_PID_2049_BSTM_DEFAULT_VALUE (1) > +#define AW_PID_2049_BSTM_DEFAULT \ > + (AW_PID_2049_BSTM_DEFAULT_VALUE << AW_PID_2049_BSTM_START_BIT) > + > +/* SWM bit 8 (SYSINTM 0x03) */ > +#define AW_PID_2049_SWM_START_BIT (8) > +#define AW_PID_2049_SWM_BITS_LEN (1) > +#define AW_PID_2049_SWM_MASK \ > + (~(((1<<AW_PID_2049_SWM_BITS_LEN)-1) << AW_PID_2049_SWM_START_BIT)) > + > +#define AW_PID_2049_SWM_DEFAULT_VALUE (1) > +#define AW_PID_2049_SWM_DEFAULT \ > + (AW_PID_2049_SWM_DEFAULT_VALUE << AW_PID_2049_SWM_START_BIT) > + > +/* CLIPM bit 7 (SYSINTM 0x03) */ > +#define AW_PID_2049_CLIPM_START_BIT (7) > +#define AW_PID_2049_CLIPM_BITS_LEN (1) > +#define AW_PID_2049_CLIPM_MASK \ > + (~(((1<<AW_PID_2049_CLIPM_BITS_LEN)-1) << AW_PID_2049_CLIPM_START_BIT)) > + > +#define AW_PID_2049_CLIPM_DEFAULT_VALUE (1) > +#define AW_PID_2049_CLIPM_DEFAULT \ > + (AW_PID_2049_CLIPM_DEFAULT_VALUE << AW_PID_2049_CLIPM_START_BIT) > + > +/* WDM bit 6 (SYSINTM 0x03) */ > +#define AW_PID_2049_WDM_START_BIT (6) > +#define AW_PID_2049_WDM_BITS_LEN (1) > +#define AW_PID_2049_WDM_MASK \ > + (~(((1<<AW_PID_2049_WDM_BITS_LEN)-1) << AW_PID_2049_WDM_START_BIT)) > + > +#define AW_PID_2049_WDM_DEFAULT_VALUE (1) > +#define AW_PID_2049_WDM_DEFAULT \ > + (AW_PID_2049_WDM_DEFAULT_VALUE << AW_PID_2049_WDM_START_BIT) > + > +/* NOCLKM bit 5 (SYSINTM 0x03) */ > +#define AW_PID_2049_NOCLKM_START_BIT (5) > +#define AW_PID_2049_NOCLKM_BITS_LEN (1) > +#define AW_PID_2049_NOCLKM_MASK \ > + (~(((1<<AW_PID_2049_NOCLKM_BITS_LEN)-1) << AW_PID_2049_NOCLKM_START_BIT)) > + > +#define AW_PID_2049_NOCLKM_DEFAULT_VALUE (1) > +#define AW_PID_2049_NOCLKM_DEFAULT \ > + (AW_PID_2049_NOCLKM_DEFAULT_VALUE << AW_PID_2049_NOCLKM_START_BIT) > + > +/* CLKM bit 4 (SYSINTM 0x03) */ > +#define AW_PID_2049_CLKM_START_BIT (4) > +#define AW_PID_2049_CLKM_BITS_LEN (1) > +#define AW_PID_2049_CLKM_MASK \ > + (~(((1<<AW_PID_2049_CLKM_BITS_LEN)-1) << AW_PID_2049_CLKM_START_BIT)) > + > +#define AW_PID_2049_CLKM_DEFAULT_VALUE (1) > +#define AW_PID_2049_CLKM_DEFAULT \ > + (AW_PID_2049_CLKM_DEFAULT_VALUE << AW_PID_2049_CLKM_START_BIT) > + > +/* OCDM bit 3 (SYSINTM 0x03) */ > +#define AW_PID_2049_OCDM_START_BIT (3) > +#define AW_PID_2049_OCDM_BITS_LEN (1) > +#define AW_PID_2049_OCDM_MASK \ > + (~(((1<<AW_PID_2049_OCDM_BITS_LEN)-1) << AW_PID_2049_OCDM_START_BIT)) > + > +#define AW_PID_2049_OCDM_DEFAULT_VALUE (1) > +#define AW_PID_2049_OCDM_DEFAULT \ > + (AW_PID_2049_OCDM_DEFAULT_VALUE << AW_PID_2049_OCDM_START_BIT) > + > +/* CLIP_PREM bit 2 (SYSINTM 0x03) */ > +#define AW_PID_2049_CLIP_PREM_START_BIT (2) > +#define AW_PID_2049_CLIP_PREM_BITS_LEN (1) > +#define AW_PID_2049_CLIP_PREM_MASK \ > + (~(((1<<AW_PID_2049_CLIP_PREM_BITS_LEN)-1) << AW_PID_2049_CLIP_PREM_START_BIT)) > + > +#define AW_PID_2049_CLIP_PREM_DEFAULT_VALUE (1) > +#define AW_PID_2049_CLIP_PREM_DEFAULT \ > + (AW_PID_2049_CLIP_PREM_DEFAULT_VALUE << AW_PID_2049_CLIP_PREM_START_BIT) > + > +/* OTHM bit 1 (SYSINTM 0x03) */ > +#define AW_PID_2049_OTHM_START_BIT (1) > +#define AW_PID_2049_OTHM_BITS_LEN (1) > +#define AW_PID_2049_OTHM_MASK \ > + (~(((1<<AW_PID_2049_OTHM_BITS_LEN)-1) << AW_PID_2049_OTHM_START_BIT)) > + > +#define AW_PID_2049_OTHM_DEFAULT_VALUE (1) > +#define AW_PID_2049_OTHM_DEFAULT \ > + (AW_PID_2049_OTHM_DEFAULT_VALUE << AW_PID_2049_OTHM_START_BIT) > + > +/* PLLM bit 0 (SYSINTM 0x03) */ > +#define AW_PID_2049_PLLM_START_BIT (0) > +#define AW_PID_2049_PLLM_BITS_LEN (1) > +#define AW_PID_2049_PLLM_MASK \ > + (~(((1<<AW_PID_2049_PLLM_BITS_LEN)-1) << AW_PID_2049_PLLM_START_BIT)) > + > +#define AW_PID_2049_PLLM_DEFAULT_VALUE (1) > +#define AW_PID_2049_PLLM_DEFAULT \ > + (AW_PID_2049_PLLM_DEFAULT_VALUE << AW_PID_2049_PLLM_START_BIT) > + > +/* default value of SYSINTM (0x03) */ > +#define AW_PID_2049_SYSINTM_DEFAULT (0xFFFF) > + > +/* SYSCTRL (0x04) detail */ > +/* SPK_GAIN bit 14:12 (SYSCTRL 0x04) */ > +#define AW_PID_2049_SPK_GAIN_START_BIT (12) > +#define AW_PID_2049_SPK_GAIN_BITS_LEN (3) > +#define AW_PID_2049_SPK_GAIN_MASK \ > + (~(((1<<AW_PID_2049_SPK_GAIN_BITS_LEN)-1) << AW_PID_2049_SPK_GAIN_START_BIT)) > + > +#define AW_PID_2049_SPK_GAIN_4_AV (0) > +#define AW_PID_2049_SPK_GAIN_4_AV_VALUE \ > + (AW_PID_2049_SPK_GAIN_4_AV << AW_PID_2049_SPK_GAIN_START_BIT) > + > +#define AW_PID_2049_SPK_GAIN_4P67_AV (1) > +#define AW_PID_2049_SPK_GAIN_4P67_AV_VALUE \ > + (AW_PID_2049_SPK_GAIN_4P67_AV << AW_PID_2049_SPK_GAIN_START_BIT) > + > +#define AW_PID_2049_SPK_GAIN_6_AV (2) > +#define AW_PID_2049_SPK_GAIN_6_AV_VALUE \ > + (AW_PID_2049_SPK_GAIN_6_AV << AW_PID_2049_SPK_GAIN_START_BIT) > + > +#define AW_PID_2049_SPK_GAIN_7_AV (3) > +#define AW_PID_2049_SPK_GAIN_7_AV_VALUE \ > + (AW_PID_2049_SPK_GAIN_7_AV << AW_PID_2049_SPK_GAIN_START_BIT) > + > +#define AW_PID_2049_SPK_GAIN_12_AV (4) > +#define AW_PID_2049_SPK_GAIN_12_AV_VALUE \ > + (AW_PID_2049_SPK_GAIN_12_AV << AW_PID_2049_SPK_GAIN_START_BIT) > + > +#define AW_PID_2049_SPK_GAIN_14_AV (5) > +#define AW_PID_2049_SPK_GAIN_14_AV_VALUE \ > + (AW_PID_2049_SPK_GAIN_14_AV << AW_PID_2049_SPK_GAIN_START_BIT) > + > +#define AW_PID_2049_SPK_GAIN_DEFAULT_VALUE (0x5) > +#define AW_PID_2049_SPK_GAIN_DEFAULT \ > + (AW_PID_2049_SPK_GAIN_DEFAULT_VALUE << AW_PID_2049_SPK_GAIN_START_BIT) > + > +/* RMSE bit 11 (SYSCTRL 0x04) */ > +#define AW_PID_2049_RMSE_START_BIT (11) > +#define AW_PID_2049_RMSE_BITS_LEN (1) > +#define AW_PID_2049_RMSE_MASK \ > + (~(((1<<AW_PID_2049_RMSE_BITS_LEN)-1) << AW_PID_2049_RMSE_START_BIT)) > + > +#define AW_PID_2049_RMSE_PEAK_AGC (0) > +#define AW_PID_2049_RMSE_PEAK_AGC_VALUE \ > + (AW_PID_2049_RMSE_PEAK_AGC << AW_PID_2049_RMSE_START_BIT) > + > +#define AW_PID_2049_RMSE_RMS_AGC (1) > +#define AW_PID_2049_RMSE_RMS_AGC_VALUE \ > + (AW_PID_2049_RMSE_RMS_AGC << AW_PID_2049_RMSE_START_BIT) > + > +#define AW_PID_2049_RMSE_DEFAULT_VALUE (0) > +#define AW_PID_2049_RMSE_DEFAULT \ > + (AW_PID_2049_RMSE_DEFAULT_VALUE << AW_PID_2049_RMSE_START_BIT) > + > +/* HAGCE bit 10 (SYSCTRL 0x04) */ > +#define AW_PID_2049_HAGCE_START_BIT (10) > +#define AW_PID_2049_HAGCE_BITS_LEN (1) > +#define AW_PID_2049_HAGCE_MASK \ > + (~(((1<<AW_PID_2049_HAGCE_BITS_LEN)-1) << AW_PID_2049_HAGCE_START_BIT)) > + > +#define AW_PID_2049_HAGCE_DISABLE (0) > +#define AW_PID_2049_HAGCE_DISABLE_VALUE \ > + (AW_PID_2049_HAGCE_DISABLE << AW_PID_2049_HAGCE_START_BIT) > + > +#define AW_PID_2049_HAGCE_ENABLE (1) > +#define AW_PID_2049_HAGCE_ENABLE_VALUE \ > + (AW_PID_2049_HAGCE_ENABLE << AW_PID_2049_HAGCE_START_BIT) > + > +#define AW_PID_2049_HAGCE_DEFAULT_VALUE (0) > +#define AW_PID_2049_HAGCE_DEFAULT \ > + (AW_PID_2049_HAGCE_DEFAULT_VALUE << AW_PID_2049_HAGCE_START_BIT) > + > +/* HDCCE bit 9 (SYSCTRL 0x04) */ > +#define AW_PID_2049_HDCCE_START_BIT (9) > +#define AW_PID_2049_HDCCE_BITS_LEN (1) > +#define AW_PID_2049_HDCCE_MASK \ > + (~(((1<<AW_PID_2049_HDCCE_BITS_LEN)-1) << AW_PID_2049_HDCCE_START_BIT)) > + > +#define AW_PID_2049_HDCCE_DISABLE (0) > +#define AW_PID_2049_HDCCE_DISABLE_VALUE \ > + (AW_PID_2049_HDCCE_DISABLE << AW_PID_2049_HDCCE_START_BIT) > + > +#define AW_PID_2049_HDCCE_ENABLE (1) > +#define AW_PID_2049_HDCCE_ENABLE_VALUE \ > + (AW_PID_2049_HDCCE_ENABLE << AW_PID_2049_HDCCE_START_BIT) > + > +#define AW_PID_2049_HDCCE_DEFAULT_VALUE (1) > +#define AW_PID_2049_HDCCE_DEFAULT \ > + (AW_PID_2049_HDCCE_DEFAULT_VALUE << AW_PID_2049_HDCCE_START_BIT) > + > +/* HMUTE bit 8 (SYSCTRL 0x04) */ > +#define AW_PID_2049_HMUTE_START_BIT (8) > +#define AW_PID_2049_HMUTE_BITS_LEN (1) > +#define AW_PID_2049_HMUTE_MASK \ > + (~(((1<<AW_PID_2049_HMUTE_BITS_LEN)-1) << AW_PID_2049_HMUTE_START_BIT)) > + > +#define AW_PID_2049_HMUTE_DISABLE (0) > +#define AW_PID_2049_HMUTE_DISABLE_VALUE \ > + (AW_PID_2049_HMUTE_DISABLE << AW_PID_2049_HMUTE_START_BIT) > + > +#define AW_PID_2049_HMUTE_ENABLE (1) > +#define AW_PID_2049_HMUTE_ENABLE_VALUE \ > + (AW_PID_2049_HMUTE_ENABLE << AW_PID_2049_HMUTE_START_BIT) > + > +#define AW_PID_2049_HMUTE_DEFAULT_VALUE (1) > +#define AW_PID_2049_HMUTE_DEFAULT \ > + (AW_PID_2049_HMUTE_DEFAULT_VALUE << AW_PID_2049_HMUTE_START_BIT) > + > +/* RCV_MODE bit 7 (SYSCTRL 0x04) */ > +#define AW_PID_2049_RCV_MODE_START_BIT (7) > +#define AW_PID_2049_RCV_MODE_BITS_LEN (1) > +#define AW_PID_2049_RCV_MODE_MASK \ > + (~(((1<<AW_PID_2049_RCV_MODE_BITS_LEN)-1) << AW_PID_2049_RCV_MODE_START_BIT)) > + > +#define AW_PID_2049_RCV_MODE_SPEAKER (0) > +#define AW_PID_2049_RCV_MODE_SPEAKER_VALUE \ > + (AW_PID_2049_RCV_MODE_SPEAKER << AW_PID_2049_RCV_MODE_START_BIT) > + > +#define AW_PID_2049_RCV_MODE_RECEIVER (1) > +#define AW_PID_2049_RCV_MODE_RECEIVER_VALUE \ > + (AW_PID_2049_RCV_MODE_RECEIVER << AW_PID_2049_RCV_MODE_START_BIT) > + > +#define AW_PID_2049_RCV_MODE_DEFAULT_VALUE (0) > +#define AW_PID_2049_RCV_MODE_DEFAULT \ > + (AW_PID_2049_RCV_MODE_DEFAULT_VALUE << AW_PID_2049_RCV_MODE_START_BIT) > + > +/* I2SEN bit 6 (SYSCTRL 0x04) */ > +#define AW_PID_2049_I2SEN_START_BIT (6) > +#define AW_PID_2049_I2SEN_BITS_LEN (1) > +#define AW_PID_2049_I2SEN_MASK \ > + (~(((1<<AW_PID_2049_I2SEN_BITS_LEN)-1) << AW_PID_2049_I2SEN_START_BIT)) > + > +#define AW_PID_2049_I2SEN_DISABLE (0) > +#define AW_PID_2049_I2SEN_DISABLE_VALUE \ > + (AW_PID_2049_I2SEN_DISABLE << AW_PID_2049_I2SEN_START_BIT) > + > +#define AW_PID_2049_I2SEN_ENABLE (1) > +#define AW_PID_2049_I2SEN_ENABLE_VALUE \ > + (AW_PID_2049_I2SEN_ENABLE << AW_PID_2049_I2SEN_START_BIT) > + > +#define AW_PID_2049_I2SEN_DEFAULT_VALUE (0) > +#define AW_PID_2049_I2SEN_DEFAULT \ > + (AW_PID_2049_I2SEN_DEFAULT_VALUE << AW_PID_2049_I2SEN_START_BIT) > + > +/* WSINV bit 5 (SYSCTRL 0x04) */ > +#define AW_PID_2049_WSINV_START_BIT (5) > +#define AW_PID_2049_WSINV_BITS_LEN (1) > +#define AW_PID_2049_WSINV_MASK \ > + (~(((1<<AW_PID_2049_WSINV_BITS_LEN)-1) << AW_PID_2049_WSINV_START_BIT)) > + > +#define AW_PID_2049_WSINV_NOT_SWITCH (0) > +#define AW_PID_2049_WSINV_NOT_SWITCH_VALUE \ > + (AW_PID_2049_WSINV_NOT_SWITCH << AW_PID_2049_WSINV_START_BIT) > + > +#define AW_PID_2049_WSINV_SWITCH (1) > +#define AW_PID_2049_WSINV_SWITCH_VALUE \ > + (AW_PID_2049_WSINV_SWITCH << AW_PID_2049_WSINV_START_BIT) > + > +#define AW_PID_2049_WSINV_DEFAULT_VALUE (0) > +#define AW_PID_2049_WSINV_DEFAULT \ > + (AW_PID_2049_WSINV_DEFAULT_VALUE << AW_PID_2049_WSINV_START_BIT) > + > +/* BCKINV bit 4 (SYSCTRL 0x04) */ > +#define AW_PID_2049_BCKINV_START_BIT (4) > +#define AW_PID_2049_BCKINV_BITS_LEN (1) > +#define AW_PID_2049_BCKINV_MASK \ > + (~(((1<<AW_PID_2049_BCKINV_BITS_LEN)-1) << AW_PID_2049_BCKINV_START_BIT)) > + > +#define AW_PID_2049_BCKINV_NOT_INVERT (0) > +#define AW_PID_2049_BCKINV_NOT_INVERT_VALUE \ > + (AW_PID_2049_BCKINV_NOT_INVERT << AW_PID_2049_BCKINV_START_BIT) > + > +#define AW_PID_2049_BCKINV_INVERTED (1) > +#define AW_PID_2049_BCKINV_INVERTED_VALUE \ > + (AW_PID_2049_BCKINV_INVERTED << AW_PID_2049_BCKINV_START_BIT) > + > +#define AW_PID_2049_BCKINV_DEFAULT_VALUE (0) > +#define AW_PID_2049_BCKINV_DEFAULT \ > + (AW_PID_2049_BCKINV_DEFAULT_VALUE << AW_PID_2049_BCKINV_START_BIT) > + > +/* IPLL bit 3 (SYSCTRL 0x04) */ > +#define AW_PID_2049_IPLL_START_BIT (3) > +#define AW_PID_2049_IPLL_BITS_LEN (1) > +#define AW_PID_2049_IPLL_MASK \ > + (~(((1<<AW_PID_2049_IPLL_BITS_LEN)-1) << AW_PID_2049_IPLL_START_BIT)) > + > +#define AW_PID_2049_IPLL_BCK (0) > +#define AW_PID_2049_IPLL_BCK_VALUE \ > + (AW_PID_2049_IPLL_BCK << AW_PID_2049_IPLL_START_BIT) > + > +#define AW_PID_2049_IPLL_WCK (1) > +#define AW_PID_2049_IPLL_WCK_VALUE \ > + (AW_PID_2049_IPLL_WCK << AW_PID_2049_IPLL_START_BIT) > + > +#define AW_PID_2049_IPLL_DEFAULT_VALUE (0) > +#define AW_PID_2049_IPLL_DEFAULT \ > + (AW_PID_2049_IPLL_DEFAULT_VALUE << AW_PID_2049_IPLL_START_BIT) > + > +/* DSPBY bit 2 (SYSCTRL 0x04) */ > +#define AW_PID_2049_DSPBY_START_BIT (2) > +#define AW_PID_2049_DSPBY_BITS_LEN (1) > +#define AW_PID_2049_DSPBY_MASK \ > + (~(((1<<AW_PID_2049_DSPBY_BITS_LEN)-1) << AW_PID_2049_DSPBY_START_BIT)) > + > +#define AW_PID_2049_DSPBY_WORKING (0) > +#define AW_PID_2049_DSPBY_WORKING_VALUE \ > + (AW_PID_2049_DSPBY_WORKING << AW_PID_2049_DSPBY_START_BIT) > + > +#define AW_PID_2049_DSPBY_BYPASS (1) > +#define AW_PID_2049_DSPBY_BYPASS_VALUE \ > + (AW_PID_2049_DSPBY_BYPASS << AW_PID_2049_DSPBY_START_BIT) > + > +#define AW_PID_2049_DSPBY_DEFAULT_VALUE (1) > +#define AW_PID_2049_DSPBY_DEFAULT \ > + (AW_PID_2049_DSPBY_DEFAULT_VALUE << AW_PID_2049_DSPBY_START_BIT) > + > +/* AMPPD bit 1 (SYSCTRL 0x04) */ > +#define AW_PID_2049_AMPPD_START_BIT (1) > +#define AW_PID_2049_AMPPD_BITS_LEN (1) > +#define AW_PID_2049_AMPPD_MASK \ > + (~(((1<<AW_PID_2049_AMPPD_BITS_LEN)-1) << AW_PID_2049_AMPPD_START_BIT)) > + > +#define AW_PID_2049_AMPPD_WORKING (0) > +#define AW_PID_2049_AMPPD_WORKING_VALUE \ > + (AW_PID_2049_AMPPD_WORKING << AW_PID_2049_AMPPD_START_BIT) > + > +#define AW_PID_2049_AMPPD_POWER_DOWN (1) > +#define AW_PID_2049_AMPPD_POWER_DOWN_VALUE \ > + (AW_PID_2049_AMPPD_POWER_DOWN << AW_PID_2049_AMPPD_START_BIT) > + > +#define AW_PID_2049_AMPPD_DEFAULT_VALUE (1) > +#define AW_PID_2049_AMPPD_DEFAULT \ > + (AW_PID_2049_AMPPD_DEFAULT_VALUE << AW_PID_2049_AMPPD_START_BIT) > + > +/* PWDN bit 0 (SYSCTRL 0x04) */ > +#define AW_PID_2049_PWDN_START_BIT (0) > +#define AW_PID_2049_PWDN_BITS_LEN (1) > +#define AW_PID_2049_PWDN_MASK \ > + (~(((1<<AW_PID_2049_PWDN_BITS_LEN)-1) << AW_PID_2049_PWDN_START_BIT)) > + > +#define AW_PID_2049_PWDN_WORKING (0) > +#define AW_PID_2049_PWDN_WORKING_VALUE \ > + (AW_PID_2049_PWDN_WORKING << AW_PID_2049_PWDN_START_BIT) > + > +#define AW_PID_2049_PWDN_POWER_DOWN (1) > +#define AW_PID_2049_PWDN_POWER_DOWN_VALUE \ > + (AW_PID_2049_PWDN_POWER_DOWN << AW_PID_2049_PWDN_START_BIT) > + > +#define AW_PID_2049_PWDN_DEFAULT_VALUE (1) > +#define AW_PID_2049_PWDN_DEFAULT \ > + (AW_PID_2049_PWDN_DEFAULT_VALUE << AW_PID_2049_PWDN_START_BIT) > + > +/* default value of SYSCTRL (0x04) */ > +/* #define AW_PID_2049_SYSCTRL_DEFAULT (0x5307) */ > + > +/* SYSCTRL2 (0x05) detail */ > +/* VOL bit 15:6 (SYSCTRL2 0x05) */ > +#define AW_PID_2049_MUTE_VOL (90 * 8) > +#define AW_PID_2049_VOLUME_STEP_DB (6 * 8) > + > +#define AW_PID_2049_VOL_6DB_START (6) > +#define AW_PID_2049_VOL_START_BIT (6) > +#define AW_PID_2049_VOL_BITS_LEN (10) > +#define AW_PID_2049_VOL_MASK \ > + (~(((1<<AW_PID_2049_VOL_BITS_LEN)-1) << AW_PID_2049_VOL_START_BIT)) > + > +#define AW_PID_2049_VOL_DEFAULT_VALUE (0) > +#define AW_PID_2049_VOL_DEFAULT \ > + (AW_PID_2049_VOL_DEFAULT_VALUE << AW_PID_2049_VOL_START_BIT) > + > +/* INTMODE bit 5 (SYSCTRL2 0x05) */ > +#define AW_PID_2049_INTMODE_START_BIT (5) > +#define AW_PID_2049_INTMODE_BITS_LEN (1) > +#define AW_PID_2049_INTMODE_MASK \ > + (~(((1<<AW_PID_2049_INTMODE_BITS_LEN)-1) << AW_PID_2049_INTMODE_START_BIT)) > + > +#define AW_PID_2049_INTMODE_OPENMINUS_DRAIN (0) > +#define AW_PID_2049_INTMODE_OPENMINUS_DRAIN_VALUE \ > + (AW_PID_2049_INTMODE_OPENMINUS_DRAIN << AW_PID_2049_INTMODE_START_BIT) > + > +#define AW_PID_2049_INTMODE_PUSHPULL (1) > +#define AW_PID_2049_INTMODE_PUSHPULL_VALUE \ > + (AW_PID_2049_INTMODE_PUSHPULL << AW_PID_2049_INTMODE_START_BIT) > + > +#define AW_PID_2049_INTMODE_DEFAULT_VALUE (0) > +#define AW_PID_2049_INTMODE_DEFAULT \ > + (AW_PID_2049_INTMODE_DEFAULT_VALUE << AW_PID_2049_INTMODE_START_BIT) > + > +/* INTN bit 4 (SYSCTRL2 0x05) */ > +#define AW_PID_2049_INTN_START_BIT (4) > +#define AW_PID_2049_INTN_BITS_LEN (1) > +#define AW_PID_2049_INTN_MASK \ > + (~(((1<<AW_PID_2049_INTN_BITS_LEN)-1) << AW_PID_2049_INTN_START_BIT)) > + > +#define AW_PID_2049_INTN_SYSINT (0) > +#define AW_PID_2049_INTN_SYSINT_VALUE \ > + (AW_PID_2049_INTN_SYSINT << AW_PID_2049_INTN_START_BIT) > + > +#define AW_PID_2049_INTN_SYSST (1) > +#define AW_PID_2049_INTN_SYSST_VALUE \ > + (AW_PID_2049_INTN_SYSST << AW_PID_2049_INTN_START_BIT) > + > +#define AW_PID_2049_INTN_DEFAULT_VALUE (0) > +#define AW_PID_2049_INTN_DEFAULT \ > + (AW_PID_2049_INTN_DEFAULT_VALUE << AW_PID_2049_INTN_START_BIT) > + > +/* BST_IPEAK bit 3:0 (SYSCTRL2 0x05) */ > +#define AW_PID_2049_BST_IPEAK_START_BIT (0) > +#define AW_PID_2049_BST_IPEAK_BITS_LEN (4) > +#define AW_PID_2049_BST_IPEAK_MASK \ > + (~(((1<<AW_PID_2049_BST_IPEAK_BITS_LEN)-1) << AW_PID_2049_BST_IPEAK_START_BIT)) > + > +#define AW_PID_2049_BST_IPEAK_1P50A (0) > +#define AW_PID_2049_BST_IPEAK_1P50A_VALUE \ > + (AW_PID_2049_BST_IPEAK_1P50A << AW_PID_2049_BST_IPEAK_START_BIT) > + > +#define AW_PID_2049_BST_IPEAK_1P75A (1) > +#define AW_PID_2049_BST_IPEAK_1P75A_VALUE \ > + (AW_PID_2049_BST_IPEAK_1P75A << AW_PID_2049_BST_IPEAK_START_BIT) > + > +#define AW_PID_2049_BST_IPEAK_2P00A (2) > +#define AW_PID_2049_BST_IPEAK_2P00A_VALUE \ > + (AW_PID_2049_BST_IPEAK_2P00A << AW_PID_2049_BST_IPEAK_START_BIT) > + > +#define AW_PID_2049_BST_IPEAK_2P25A (3) > +#define AW_PID_2049_BST_IPEAK_2P25A_VALUE \ > + (AW_PID_2049_BST_IPEAK_2P25A << AW_PID_2049_BST_IPEAK_START_BIT) > + > +#define AW_PID_2049_BST_IPEAK_2P50A (4) > +#define AW_PID_2049_BST_IPEAK_2P50A_VALUE \ > + (AW_PID_2049_BST_IPEAK_2P50A << AW_PID_2049_BST_IPEAK_START_BIT) > + > +#define AW_PID_2049_BST_IPEAK_2P75A (5) > +#define AW_PID_2049_BST_IPEAK_2P75A_VALUE \ > + (AW_PID_2049_BST_IPEAK_2P75A << AW_PID_2049_BST_IPEAK_START_BIT) > + > +#define AW_PID_2049_BST_IPEAK_3P00A (6) > +#define AW_PID_2049_BST_IPEAK_3P00A_VALUE \ > + (AW_PID_2049_BST_IPEAK_3P00A << AW_PID_2049_BST_IPEAK_START_BIT) > + > +#define AW_PID_2049_BST_IPEAK_3P25A (7) > +#define AW_PID_2049_BST_IPEAK_3P25A_VALUE \ > + (AW_PID_2049_BST_IPEAK_3P25A << AW_PID_2049_BST_IPEAK_START_BIT) > + > +#define AW_PID_2049_BST_IPEAK_3P50A (8) > +#define AW_PID_2049_BST_IPEAK_3P50A_VALUE \ > + (AW_PID_2049_BST_IPEAK_3P50A << AW_PID_2049_BST_IPEAK_START_BIT) > + > +#define AW_PID_2049_BST_IPEAK_3P75A (9) > +#define AW_PID_2049_BST_IPEAK_3P75A_VALUE \ > + (AW_PID_2049_BST_IPEAK_3P75A << AW_PID_2049_BST_IPEAK_START_BIT) > + > +#define AW_PID_2049_BST_IPEAK_4P00A (10) > +#define AW_PID_2049_BST_IPEAK_4P00A_VALUE \ > + (AW_PID_2049_BST_IPEAK_4P00A << AW_PID_2049_BST_IPEAK_START_BIT) > + > +#define AW_PID_2049_BST_IPEAK_4P25A (11) > +#define AW_PID_2049_BST_IPEAK_4P25A_VALUE \ > + (AW_PID_2049_BST_IPEAK_4P25A << AW_PID_2049_BST_IPEAK_START_BIT) > + > +#define AW_PID_2049_BST_IPEAK_4P50A (12) > +#define AW_PID_2049_BST_IPEAK_4P50A_VALUE \ > + (AW_PID_2049_BST_IPEAK_4P50A << AW_PID_2049_BST_IPEAK_START_BIT) > + > +#define AW_PID_2049_BST_IPEAK_DEFAULT_VALUE (9) > +#define AW_PID_2049_BST_IPEAK_DEFAULT \ > + (AW_PID_2049_BST_IPEAK_DEFAULT_VALUE << AW_PID_2049_BST_IPEAK_START_BIT) > + > +/* default value of SYSCTRL2 (0x05) */ > +/* #define AW_PID_2049_SYSCTRL2_DEFAULT (0x0009) */ > + > +/* I2SCTRL (0x06) detail */ > +/* SLOT_NUM bit 14:12 (I2SCTRL 0x06) */ > +#define AW_PID_2049_SLOT_NUM_START_BIT (12) > +#define AW_PID_2049_SLOT_NUM_BITS_LEN (3) > +#define AW_PID_2049_SLOT_NUM_MASK \ > + (~(((1<<AW_PID_2049_SLOT_NUM_BITS_LEN)-1) << AW_PID_2049_SLOT_NUM_START_BIT)) > + > +#define AW_PID_2049_SLOT_NUM_I2S_MODE (0) > +#define AW_PID_2049_SLOT_NUM_I2S_MODE_VALUE \ > + (AW_PID_2049_SLOT_NUM_I2S_MODE << AW_PID_2049_SLOT_NUM_START_BIT) > + > +#define AW_PID_2049_SLOT_NUM_TDM1S (1) > +#define AW_PID_2049_SLOT_NUM_TDM1S_VALUE \ > + (AW_PID_2049_SLOT_NUM_TDM1S << AW_PID_2049_SLOT_NUM_START_BIT) > + > +#define AW_PID_2049_SLOT_NUM_TDM2S (2) > +#define AW_PID_2049_SLOT_NUM_TDM2S_VALUE \ > + (AW_PID_2049_SLOT_NUM_TDM2S << AW_PID_2049_SLOT_NUM_START_BIT) > + > +#define AW_PID_2049_SLOT_NUM_TDM4S (3) > +#define AW_PID_2049_SLOT_NUM_TDM4S_VALUE \ > + (AW_PID_2049_SLOT_NUM_TDM4S << AW_PID_2049_SLOT_NUM_START_BIT) > + > +#define AW_PID_2049_SLOT_NUM_TDM6S (4) > +#define AW_PID_2049_SLOT_NUM_TDM6S_VALUE \ > + (AW_PID_2049_SLOT_NUM_TDM6S << AW_PID_2049_SLOT_NUM_START_BIT) > + > +#define AW_PID_2049_SLOT_NUM_TDM8S (5) > +#define AW_PID_2049_SLOT_NUM_TDM8S_VALUE \ > + (AW_PID_2049_SLOT_NUM_TDM8S << AW_PID_2049_SLOT_NUM_START_BIT) > + > +#define AW_PID_2049_SLOT_NUM_TDM16S (6) > +#define AW_PID_2049_SLOT_NUM_TDM16S_VALUE \ > + (AW_PID_2049_SLOT_NUM_TDM16S << AW_PID_2049_SLOT_NUM_START_BIT) > + > +#define AW_PID_2049_SLOT_NUM_RESERVED (7) > +#define AW_PID_2049_SLOT_NUM_RESERVED_VALUE \ > + (AW_PID_2049_SLOT_NUM_RESERVED << AW_PID_2049_SLOT_NUM_START_BIT) > + > +#define AW_PID_2049_SLOT_NUM_DEFAULT_VALUE (0) > +#define AW_PID_2049_SLOT_NUM_DEFAULT \ > + (AW_PID_2049_SLOT_NUM_DEFAULT_VALUE << AW_PID_2049_SLOT_NUM_START_BIT) > + > +/* CHSEL bit 11:10 (I2SCTRL 0x06) */ > +#define AW_PID_2049_CHSEL_START_BIT (10) > +#define AW_PID_2049_CHSEL_BITS_LEN (2) > +#define AW_PID_2049_CHSEL_MASK \ > + (~(((1<<AW_PID_2049_CHSEL_BITS_LEN)-1) << AW_PID_2049_CHSEL_START_BIT)) > + > +#define AW_PID_2049_CHSEL_RESERVED (0) > +#define AW_PID_2049_CHSEL_RESERVED_VALUE \ > + (AW_PID_2049_CHSEL_RESERVED << AW_PID_2049_CHSEL_START_BIT) > + > +#define AW_PID_2049_CHSEL_LEFT (1) > +#define AW_PID_2049_CHSEL_LEFT_VALUE \ > + (AW_PID_2049_CHSEL_LEFT << AW_PID_2049_CHSEL_START_BIT) > + > +#define AW_PID_2049_CHSEL_RIGHT (2) > +#define AW_PID_2049_CHSEL_RIGHT_VALUE \ > + (AW_PID_2049_CHSEL_RIGHT << AW_PID_2049_CHSEL_START_BIT) > + > +#define AW_PID_2049_CHSEL_MONO (3) > +#define AW_PID_2049_CHSEL_MONO_VALUE \ > + (AW_PID_2049_CHSEL_MONO << AW_PID_2049_CHSEL_START_BIT) > + > +#define AW_PID_2049_CHSEL_DEFAULT_VALUE (1) > +#define AW_PID_2049_CHSEL_DEFAULT \ > + (AW_PID_2049_CHSEL_DEFAULT_VALUE << AW_PID_2049_CHSEL_START_BIT) > + > +/* I2SMD bit 9:8 (I2SCTRL 0x06) */ > +#define AW_PID_2049_I2SMD_START_BIT (8) > +#define AW_PID_2049_I2SMD_BITS_LEN (2) > +#define AW_PID_2049_I2SMD_MASK \ > + (~(((1<<AW_PID_2049_I2SMD_BITS_LEN)-1) << AW_PID_2049_I2SMD_START_BIT)) > + > +#define AW_PID_2049_I2SMD_PHILIP_STANDARD (0) > +#define AW_PID_2049_I2SMD_PHILIP_STANDARD_VALUE \ > + (AW_PID_2049_I2SMD_PHILIP_STANDARD << AW_PID_2049_I2SMD_START_BIT) > + > +#define AW_PID_2049_I2SMD_MSB_JUSTIFIED (1) > +#define AW_PID_2049_I2SMD_MSB_JUSTIFIED_VALUE \ > + (AW_PID_2049_I2SMD_MSB_JUSTIFIED << AW_PID_2049_I2SMD_START_BIT) > + > +#define AW_PID_2049_I2SMD_LSB_JUSTIFIED (2) > +#define AW_PID_2049_I2SMD_LSB_JUSTIFIED_VALUE \ > + (AW_PID_2049_I2SMD_LSB_JUSTIFIED << AW_PID_2049_I2SMD_START_BIT) > + > +#define AW_PID_2049_I2SMD_RESERVED (3) > +#define AW_PID_2049_I2SMD_RESERVED_VALUE \ > + (AW_PID_2049_I2SMD_RESERVED << AW_PID_2049_I2SMD_START_BIT) > + > +#define AW_PID_2049_I2SMD_DEFAULT_VALUE (0) > +#define AW_PID_2049_I2SMD_DEFAULT \ > + (AW_PID_2049_I2SMD_DEFAULT_VALUE << AW_PID_2049_I2SMD_START_BIT) > + > +/* I2SFS bit 7:6 (I2SCTRL 0x06) */ > +#define AW_PID_2049_I2SFS_START_BIT (6) > +#define AW_PID_2049_I2SFS_BITS_LEN (2) > +#define AW_PID_2049_I2SFS_MASK \ > + (~(((1<<AW_PID_2049_I2SFS_BITS_LEN)-1) << AW_PID_2049_I2SFS_START_BIT)) > + > +#define AW_PID_2049_I2SFS_16_BITS (0) > +#define AW_PID_2049_I2SFS_16_BITS_VALUE \ > + (AW_PID_2049_I2SFS_16_BITS << AW_PID_2049_I2SFS_START_BIT) > + > +#define AW_PID_2049_I2SFS_20_BITS (1) > +#define AW_PID_2049_I2SFS_20_BITS_VALUE \ > + (AW_PID_2049_I2SFS_20_BITS << AW_PID_2049_I2SFS_START_BIT) > + > +#define AW_PID_2049_I2SFS_24_BITS (2) > +#define AW_PID_2049_I2SFS_24_BITS_VALUE \ > + (AW_PID_2049_I2SFS_24_BITS << AW_PID_2049_I2SFS_START_BIT) > + > +#define AW_PID_2049_I2SFS_32_BITS (3) > +#define AW_PID_2049_I2SFS_32_BITS_VALUE \ > + (AW_PID_2049_I2SFS_32_BITS << AW_PID_2049_I2SFS_START_BIT) > + > +#define AW_PID_2049_I2SFS_DEFAULT_VALUE (3) > +#define AW_PID_2049_I2SFS_DEFAULT \ > + (AW_PID_2049_I2SFS_DEFAULT_VALUE << AW_PID_2049_I2SFS_START_BIT) > + > +/* I2SBCK bit 5:4 (I2SCTRL 0x06) */ > +#define AW_PID_2049_I2SBCK_START_BIT (4) > +#define AW_PID_2049_I2SBCK_BITS_LEN (2) > +#define AW_PID_2049_I2SBCK_MASK \ > + (~(((1<<AW_PID_2049_I2SBCK_BITS_LEN)-1) << AW_PID_2049_I2SBCK_START_BIT)) > + > +#define AW_PID_2049_I2SBCK_32FS (0) > +#define AW_PID_2049_I2SBCK_32FS_VALUE \ > + (AW_PID_2049_I2SBCK_32FS << AW_PID_2049_I2SBCK_START_BIT) > + > +#define AW_PID_2049_I2SBCK_48FS (1) > +#define AW_PID_2049_I2SBCK_48FS_VALUE \ > + (AW_PID_2049_I2SBCK_48FS << AW_PID_2049_I2SBCK_START_BIT) > + > +#define AW_PID_2049_I2SBCK_64FS (2) > +#define AW_PID_2049_I2SBCK_64FS_VALUE \ > + (AW_PID_2049_I2SBCK_64FS << AW_PID_2049_I2SBCK_START_BIT) > + > +#define AW_PID_2049_I2SBCK_RESERVED (3) > +#define AW_PID_2049_I2SBCK_RESERVED_VALUE \ > + (AW_PID_2049_I2SBCK_RESERVED << AW_PID_2049_I2SBCK_START_BIT) > + > +#define AW_PID_2049_I2SBCK_DEFAULT_VALUE (2) > +#define AW_PID_2049_I2SBCK_DEFAULT \ > + (AW_PID_2049_I2SBCK_DEFAULT_VALUE << AW_PID_2049_I2SBCK_START_BIT) > + > +/* I2SSR bit 3:0 (I2SCTRL 0x06) */ > +#define AW_PID_2049_I2SSR_START_BIT (0) > +#define AW_PID_2049_I2SSR_BITS_LEN (4) > +#define AW_PID_2049_I2SSR_MASK \ > + (~(((1<<AW_PID_2049_I2SSR_BITS_LEN)-1) << AW_PID_2049_I2SSR_START_BIT)) > + > +#define AW_PID_2049_I2SSR_8_KHZ (0) > +#define AW_PID_2049_I2SSR_8_KHZ_VALUE \ > + (AW_PID_2049_I2SSR_8_KHZ << AW_PID_2049_I2SSR_START_BIT) > + > +#define AW_PID_2049_I2SSR_11_KHZ (1) > +#define AW_PID_2049_I2SSR_11_KHZ_VALUE \ > + (AW_PID_2049_I2SSR_11_KHZ << AW_PID_2049_I2SSR_START_BIT) > + > +#define AW_PID_2049_I2SSR_12_KHZ (2) > +#define AW_PID_2049_I2SSR_12_KHZ_VALUE \ > + (AW_PID_2049_I2SSR_12_KHZ << AW_PID_2049_I2SSR_START_BIT) > + > +#define AW_PID_2049_I2SSR_16_KHZ (3) > +#define AW_PID_2049_I2SSR_16_KHZ_VALUE \ > + (AW_PID_2049_I2SSR_16_KHZ << AW_PID_2049_I2SSR_START_BIT) > + > +#define AW_PID_2049_I2SSR_22_KHZ (4) > +#define AW_PID_2049_I2SSR_22_KHZ_VALUE \ > + (AW_PID_2049_I2SSR_22_KHZ << AW_PID_2049_I2SSR_START_BIT) > + > +#define AW_PID_2049_I2SSR_24_KHZ (5) > +#define AW_PID_2049_I2SSR_24_KHZ_VALUE \ > + (AW_PID_2049_I2SSR_24_KHZ << AW_PID_2049_I2SSR_START_BIT) > + > +#define AW_PID_2049_I2SSR_32_KHZ (6) > +#define AW_PID_2049_I2SSR_32_KHZ_VALUE \ > + (AW_PID_2049_I2SSR_32_KHZ << AW_PID_2049_I2SSR_START_BIT) > + > +#define AW_PID_2049_I2SSR_44_KHZ (7) > +#define AW_PID_2049_I2SSR_44_KHZ_VALUE \ > + (AW_PID_2049_I2SSR_44_KHZ << AW_PID_2049_I2SSR_START_BIT) > + > +#define AW_PID_2049_I2SSR_48_KHZ (8) > +#define AW_PID_2049_I2SSR_48_KHZ_VALUE \ > + (AW_PID_2049_I2SSR_48_KHZ << AW_PID_2049_I2SSR_START_BIT) > + > +#define AW_PID_2049_I2SSR_96_KHZ (9) > +#define AW_PID_2049_I2SSR_96_KHZ_VALUE \ > + (AW_PID_2049_I2SSR_96_KHZ << AW_PID_2049_I2SSR_START_BIT) > + > +#define AW_PID_2049_I2SSR_192KHZ (10) > +#define AW_PID_2049_I2SSR_192KHZ_VALUE \ > + (AW_PID_2049_I2SSR_192KHZ << AW_PID_2049_I2SSR_START_BIT) > + > +#define AW_PID_2049_I2SSR_DEFAULT_VALUE (8) > +#define AW_PID_2049_I2SSR_DEFAULT \ > + (AW_PID_2049_I2SSR_DEFAULT_VALUE << AW_PID_2049_I2SSR_START_BIT) > + > +/* default value of I2SCTRL (0x06) */ > +/* #define AW_PID_2049_I2SCTRL_DEFAULT (0x04E8) */ > + > +/* I2SCFG1 (0x07) detail */ > +/* I2S_RXL_SLOTVLD bit 15:12 (I2SCFG1 0x07) */ > +#define AW_PID_2049_I2S_RXL_SLOTVLD_START_BIT (12) > +#define AW_PID_2049_I2S_RXL_SLOTVLD_BITS_LEN (4) > +#define AW_PID_2049_I2S_RXL_SLOTVLD_MASK \ > + (~(((1<<AW_PID_2049_I2S_RXL_SLOTVLD_BITS_LEN)-1) << AW_PID_2049_I2S_RXL_SLOTVLD_START_BIT)) > + > +#define AW_PID_2049_I2S_RXL_SLOTVLD_SLOT_0 (0) > +#define AW_PID_2049_I2S_RXL_SLOTVLD_SLOT_0_VALUE \ > + (AW_PID_2049_I2S_RXL_SLOTVLD_SLOT_0 << AW_PID_2049_I2S_RXL_SLOTVLD_START_BIT) > + > +#define AW_PID_2049_I2S_RXL_SLOTVLD_SLOT_1 (1) > +#define AW_PID_2049_I2S_RXL_SLOTVLD_SLOT_1_VALUE \ > + (AW_PID_2049_I2S_RXL_SLOTVLD_SLOT_1 << AW_PID_2049_I2S_RXL_SLOTVLD_START_BIT) > + > +#define AW_PID_2049_I2S_RXL_SLOTVLD_SLOT_2 (2) > +#define AW_PID_2049_I2S_RXL_SLOTVLD_SLOT_2_VALUE \ > + (AW_PID_2049_I2S_RXL_SLOTVLD_SLOT_2 << AW_PID_2049_I2S_RXL_SLOTVLD_START_BIT) > + > +#define AW_PID_2049_I2S_RXL_SLOTVLD_SLOT_3 (3) > +#define AW_PID_2049_I2S_RXL_SLOTVLD_SLOT_3_VALUE \ > + (AW_PID_2049_I2S_RXL_SLOTVLD_SLOT_3 << AW_PID_2049_I2S_RXL_SLOTVLD_START_BIT) > + > +#define AW_PID_2049_I2S_RXL_SLOTVLD_SLOT_15 (15) > +#define AW_PID_2049_I2S_RXL_SLOTVLD_SLOT_15_VALUE \ > + (AW_PID_2049_I2S_RXL_SLOTVLD_SLOT_15 << AW_PID_2049_I2S_RXL_SLOTVLD_START_BIT) > + > +#define AW_PID_2049_I2S_RXL_SLOTVLD_DEFAULT_VALUE (0) > +#define AW_PID_2049_I2S_RXL_SLOTVLD_DEFAULT \ > + (AW_PID_2049_I2S_RXL_SLOTVLD_DEFAULT_VALUE << AW_PID_2049_I2S_RXL_SLOTVLD_START_BIT) > + > +/* I2S_RXR_SLOTVLD bit 11:8 (I2SCFG1 0x07) */ > +#define AW_PID_2049_I2S_RXR_SLOTVLD_START_BIT (8) > +#define AW_PID_2049_I2S_RXR_SLOTVLD_BITS_LEN (4) > +#define AW_PID_2049_I2S_RXR_SLOTVLD_MASK \ > + (~(((1<<AW_PID_2049_I2S_RXR_SLOTVLD_BITS_LEN)-1) << AW_PID_2049_I2S_RXR_SLOTVLD_START_BIT)) > + > +#define AW_PID_2049_I2S_RXR_SLOTVLD_SLOT_0 (0) > +#define AW_PID_2049_I2S_RXR_SLOTVLD_SLOT_0_VALUE \ > + (AW_PID_2049_I2S_RXR_SLOTVLD_SLOT_0 << AW_PID_2049_I2S_RXR_SLOTVLD_START_BIT) > + > +#define AW_PID_2049_I2S_RXR_SLOTVLD_SLOT_1 (1) > +#define AW_PID_2049_I2S_RXR_SLOTVLD_SLOT_1_VALUE \ > + (AW_PID_2049_I2S_RXR_SLOTVLD_SLOT_1 << AW_PID_2049_I2S_RXR_SLOTVLD_START_BIT) > + > +#define AW_PID_2049_I2S_RXR_SLOTVLD_SLOT_2 (2) > +#define AW_PID_2049_I2S_RXR_SLOTVLD_SLOT_2_VALUE \ > + (AW_PID_2049_I2S_RXR_SLOTVLD_SLOT_2 << AW_PID_2049_I2S_RXR_SLOTVLD_START_BIT) > + > +#define AW_PID_2049_I2S_RXR_SLOTVLD_SLOT_3 (3) > +#define AW_PID_2049_I2S_RXR_SLOTVLD_SLOT_3_VALUE \ > + (AW_PID_2049_I2S_RXR_SLOTVLD_SLOT_3 << AW_PID_2049_I2S_RXR_SLOTVLD_START_BIT) > + > +#define AW_PID_2049_I2S_RXR_SLOTVLD_SLOT_15 (15) > +#define AW_PID_2049_I2S_RXR_SLOTVLD_SLOT_15_VALUE \ > + (AW_PID_2049_I2S_RXR_SLOTVLD_SLOT_15 << AW_PID_2049_I2S_RXR_SLOTVLD_START_BIT) > + > +#define AW_PID_2049_I2S_RXR_SLOTVLD_DEFAULT_VALUE (1) > +#define AW_PID_2049_I2S_RXR_SLOTVLD_DEFAULT \ > + (AW_PID_2049_I2S_RXR_SLOTVLD_DEFAULT_VALUE << AW_PID_2049_I2S_RXR_SLOTVLD_START_BIT) > + > +/* I2S_TX_SLOTVLD bit 7:4 (I2SCFG1 0x07) */ > +#define AW_PID_2049_I2S_TX_SLOTVLD_START_BIT (4) > +#define AW_PID_2049_I2S_TX_SLOTVLD_BITS_LEN (4) > +#define AW_PID_2049_I2S_TX_SLOTVLD_MASK \ > + (~(((1<<AW_PID_2049_I2S_TX_SLOTVLD_BITS_LEN)-1) << AW_PID_2049_I2S_TX_SLOTVLD_START_BIT)) > + > +#define AW_PID_2049_I2S_TX_SLOTVLD_SLOT_0 (0) > +#define AW_PID_2049_I2S_TX_SLOTVLD_SLOT_0_VALUE \ > + (AW_PID_2049_I2S_TX_SLOTVLD_SLOT_0 << AW_PID_2049_I2S_TX_SLOTVLD_START_BIT) > + > +#define AW_PID_2049_I2S_TX_SLOTVLD_SLOT_1 (1) > +#define AW_PID_2049_I2S_TX_SLOTVLD_SLOT_1_VALUE \ > + (AW_PID_2049_I2S_TX_SLOTVLD_SLOT_1 << AW_PID_2049_I2S_TX_SLOTVLD_START_BIT) > + > +#define AW_PID_2049_I2S_TX_SLOTVLD_SLOT_2 (2) > +#define AW_PID_2049_I2S_TX_SLOTVLD_SLOT_2_VALUE \ > + (AW_PID_2049_I2S_TX_SLOTVLD_SLOT_2 << AW_PID_2049_I2S_TX_SLOTVLD_START_BIT) > + > +#define AW_PID_2049_I2S_TX_SLOTVLD_SLOT_3 (3) > +#define AW_PID_2049_I2S_TX_SLOTVLD_SLOT_3_VALUE \ > + (AW_PID_2049_I2S_TX_SLOTVLD_SLOT_3 << AW_PID_2049_I2S_TX_SLOTVLD_START_BIT) > + > +#define AW_PID_2049_I2S_TX_SLOTVLD_SLOT_15 (15) > +#define AW_PID_2049_I2S_TX_SLOTVLD_SLOT_15_VALUE \ > + (AW_PID_2049_I2S_TX_SLOTVLD_SLOT_15 << AW_PID_2049_I2S_TX_SLOTVLD_START_BIT) > + > +#define AW_PID_2049_I2S_TX_SLOTVLD_DEFAULT_VALUE (0) > +#define AW_PID_2049_I2S_TX_SLOTVLD_DEFAULT \ > + (AW_PID_2049_I2S_TX_SLOTVLD_DEFAULT_VALUE << AW_PID_2049_I2S_TX_SLOTVLD_START_BIT) > + > +/* FSYNC_TYPE bit 3 (I2SCFG1 0x07) */ > +#define AW_PID_2049_FSYNC_TYPE_START_BIT (3) > +#define AW_PID_2049_FSYNC_TYPE_BITS_LEN (1) > +#define AW_PID_2049_FSYNC_TYPE_MASK \ > + (~(((1<<AW_PID_2049_FSYNC_TYPE_BITS_LEN)-1) << AW_PID_2049_FSYNC_TYPE_START_BIT)) > + > +#define AW_PID_2049_FSYNC_TYPE_ONEMINUS_SLOT (0) > +#define AW_PID_2049_FSYNC_TYPE_ONEMINUS_SLOT_VALUE \ > + (AW_PID_2049_FSYNC_TYPE_ONEMINUS_SLOT << AW_PID_2049_FSYNC_TYPE_START_BIT) > + > +#define AW_PID_2049_FSYNC_TYPE_ONEMINUS_BCK (1) > +#define AW_PID_2049_FSYNC_TYPE_ONEMINUS_BCK_VALUE \ > + (AW_PID_2049_FSYNC_TYPE_ONEMINUS_BCK << AW_PID_2049_FSYNC_TYPE_START_BIT) > + > +#define AW_PID_2049_FSYNC_TYPE_DEFAULT_VALUE (0) > +#define AW_PID_2049_FSYNC_TYPE_DEFAULT \ > + (AW_PID_2049_FSYNC_TYPE_DEFAULT_VALUE << AW_PID_2049_FSYNC_TYPE_START_BIT) > + > +/* I2SCHS bit 2 (I2SCFG1 0x07) */ > +#define AW_PID_2049_I2SCHS_START_BIT (2) > +#define AW_PID_2049_I2SCHS_BITS_LEN (1) > +#define AW_PID_2049_I2SCHS_MASK \ > + (~(((1<<AW_PID_2049_I2SCHS_BITS_LEN)-1) << AW_PID_2049_I2SCHS_START_BIT)) > + > +#define AW_PID_2049_I2SCHS_LEFT (0) > +#define AW_PID_2049_I2SCHS_LEFT_VALUE \ > + (AW_PID_2049_I2SCHS_LEFT << AW_PID_2049_I2SCHS_START_BIT) > + > +#define AW_PID_2049_I2SCHS_RIGHT (1) > +#define AW_PID_2049_I2SCHS_RIGHT_VALUE \ > + (AW_PID_2049_I2SCHS_RIGHT << AW_PID_2049_I2SCHS_START_BIT) > + > +#define AW_PID_2049_I2SCHS_DEFAULT_VALUE (0) > +#define AW_PID_2049_I2SCHS_DEFAULT \ > + (AW_PID_2049_I2SCHS_DEFAULT_VALUE << AW_PID_2049_I2SCHS_START_BIT) > + > +/* I2SRXEN bit 1 (I2SCFG1 0x07) */ > +#define AW_PID_2049_I2SRXEN_START_BIT (1) > +#define AW_PID_2049_I2SRXEN_BITS_LEN (1) > +#define AW_PID_2049_I2SRXEN_MASK \ > + (~(((1<<AW_PID_2049_I2SRXEN_BITS_LEN)-1) << AW_PID_2049_I2SRXEN_START_BIT)) > + > +#define AW_PID_2049_I2SRXEN_DISABLE (0) > +#define AW_PID_2049_I2SRXEN_DISABLE_VALUE \ > + (AW_PID_2049_I2SRXEN_DISABLE << AW_PID_2049_I2SRXEN_START_BIT) > + > +#define AW_PID_2049_I2SRXEN_ENABLE (1) > +#define AW_PID_2049_I2SRXEN_ENABLE_VALUE \ > + (AW_PID_2049_I2SRXEN_ENABLE << AW_PID_2049_I2SRXEN_START_BIT) > + > +#define AW_PID_2049_I2SRXEN_DEFAULT_VALUE (1) > +#define AW_PID_2049_I2SRXEN_DEFAULT \ > + (AW_PID_2049_I2SRXEN_DEFAULT_VALUE << AW_PID_2049_I2SRXEN_START_BIT) > + > +/* I2STXEN bit 0 (I2SCFG1 0x07) */ > +#define AW_PID_2049_I2STXEN_START_BIT (0) > +#define AW_PID_2049_I2STXEN_BITS_LEN (1) > +#define AW_PID_2049_I2STXEN_MASK \ > + (~(((1<<AW_PID_2049_I2STXEN_BITS_LEN)-1) << AW_PID_2049_I2STXEN_START_BIT)) > + > +#define AW_PID_2049_I2STXEN_DISABLE (0) > +#define AW_PID_2049_I2STXEN_DISABLE_VALUE \ > + (AW_PID_2049_I2STXEN_DISABLE << AW_PID_2049_I2STXEN_START_BIT) > + > +#define AW_PID_2049_I2STXEN_ENABLE (1) > +#define AW_PID_2049_I2STXEN_ENABLE_VALUE \ > + (AW_PID_2049_I2STXEN_ENABLE << AW_PID_2049_I2STXEN_START_BIT) > + > +#define AW_PID_2049_I2STXEN_DEFAULT_VALUE (0) > +#define AW_PID_2049_I2STXEN_DEFAULT \ > + (AW_PID_2049_I2STXEN_DEFAULT_VALUE << AW_PID_2049_I2STXEN_START_BIT) > + > +/* default value of I2SCFG1 (0x07) */ > +/* #define AW_PID_2049_I2SCFG1_DEFAULT (0x0102) */ > + > +/* I2SCFG2 (0x08) detail */ > +/* ULS_FIR_MD bit 14 (I2SCFG2 0x08) */ > +#define AW_PID_2049_ULS_FIR_MD_START_BIT (14) > +#define AW_PID_2049_ULS_FIR_MD_BITS_LEN (1) > +#define AW_PID_2049_ULS_FIR_MD_MASK \ > + (~(((1<<AW_PID_2049_ULS_FIR_MD_BITS_LEN)-1) << AW_PID_2049_ULS_FIR_MD_START_BIT)) > + > +#define AW_PID_2049_ULS_FIR_MD_NOTMINUS_USED (0) > +#define AW_PID_2049_ULS_FIR_MD_NOTMINUS_USED_VALUE \ > + (AW_PID_2049_ULS_FIR_MD_NOTMINUS_USED << AW_PID_2049_ULS_FIR_MD_START_BIT) > + > +#define AW_PID_2049_ULS_FIR_MD_USED (1) > +#define AW_PID_2049_ULS_FIR_MD_USED_VALUE \ > + (AW_PID_2049_ULS_FIR_MD_USED << AW_PID_2049_ULS_FIR_MD_START_BIT) > + > +#define AW_PID_2049_ULS_FIR_MD_DEFAULT_VALUE (0) > +#define AW_PID_2049_ULS_FIR_MD_DEFAULT \ > + (AW_PID_2049_ULS_FIR_MD_DEFAULT_VALUE << AW_PID_2049_ULS_FIR_MD_START_BIT) > + > +/* ULS_MODE bit 13 (I2SCFG2 0x08) */ > +#define AW_PID_2049_ULS_MODE_START_BIT (13) > +#define AW_PID_2049_ULS_MODE_BITS_LEN (1) > +#define AW_PID_2049_ULS_MODE_MASK \ > + (~(((1<<AW_PID_2049_ULS_MODE_BITS_LEN)-1) << AW_PID_2049_ULS_MODE_START_BIT)) > + > +#define AW_PID_2049_ULS_MODE_LOWPASS (0) > +#define AW_PID_2049_ULS_MODE_LOWPASS_VALUE \ > + (AW_PID_2049_ULS_MODE_LOWPASS << AW_PID_2049_ULS_MODE_START_BIT) > + > +#define AW_PID_2049_ULS_MODE_TDM (1) > +#define AW_PID_2049_ULS_MODE_TDM_VALUE \ > + (AW_PID_2049_ULS_MODE_TDM << AW_PID_2049_ULS_MODE_START_BIT) > + > +#define AW_PID_2049_ULS_MODE_DEFAULT_VALUE (0) > +#define AW_PID_2049_ULS_MODE_DEFAULT \ > + (AW_PID_2049_ULS_MODE_DEFAULT_VALUE << AW_PID_2049_ULS_MODE_START_BIT) > + > +/* ULS_EN bit 12 (I2SCFG2 0x08) */ > +#define AW_PID_2049_ULS_EN_START_BIT (12) > +#define AW_PID_2049_ULS_EN_BITS_LEN (1) > +#define AW_PID_2049_ULS_EN_MASK \ > + (~(((1<<AW_PID_2049_ULS_EN_BITS_LEN)-1) << AW_PID_2049_ULS_EN_START_BIT)) > + > +#define AW_PID_2049_ULS_EN_DISABLE (0) > +#define AW_PID_2049_ULS_EN_DISABLE_VALUE \ > + (AW_PID_2049_ULS_EN_DISABLE << AW_PID_2049_ULS_EN_START_BIT) > + > +#define AW_PID_2049_ULS_EN_ENABLE (1) > +#define AW_PID_2049_ULS_EN_ENABLE_VALUE \ > + (AW_PID_2049_ULS_EN_ENABLE << AW_PID_2049_ULS_EN_START_BIT) > + > +#define AW_PID_2049_ULS_EN_DEFAULT_VALUE (0) > +#define AW_PID_2049_ULS_EN_DEFAULT \ > + (AW_PID_2049_ULS_EN_DEFAULT_VALUE << AW_PID_2049_ULS_EN_START_BIT) > + > +/* IV2CH bit 9 (I2SCFG2 0x08) */ > +#define AW_PID_2049_IV2CH_START_BIT (9) > +#define AW_PID_2049_IV2CH_BITS_LEN (1) > +#define AW_PID_2049_IV2CH_MASK \ > + (~(((1<<AW_PID_2049_IV2CH_BITS_LEN)-1) << AW_PID_2049_IV2CH_START_BIT)) > + > +#define AW_PID_2049_IV2CH_LEGACY (0) > +#define AW_PID_2049_IV2CH_LEGACY_VALUE \ > + (AW_PID_2049_IV2CH_LEGACY << AW_PID_2049_IV2CH_START_BIT) > + > +#define AW_PID_2049_IV2CH_SPECIAL (1) > +#define AW_PID_2049_IV2CH_SPECIAL_VALUE \ > + (AW_PID_2049_IV2CH_SPECIAL << AW_PID_2049_IV2CH_START_BIT) > + > +#define AW_PID_2049_IV2CH_DEFAULT_VALUE (0) > +#define AW_PID_2049_IV2CH_DEFAULT \ > + (AW_PID_2049_IV2CH_DEFAULT_VALUE << AW_PID_2049_IV2CH_START_BIT) > + > +/* I2S_TXEDGE bit 8 (I2SCFG2 0x08) */ > +#define AW_PID_2049_I2S_TXEDGE_START_BIT (8) > +#define AW_PID_2049_I2S_TXEDGE_BITS_LEN (1) > +#define AW_PID_2049_I2S_TXEDGE_MASK \ > + (~(((1<<AW_PID_2049_I2S_TXEDGE_BITS_LEN)-1) << AW_PID_2049_I2S_TXEDGE_START_BIT)) > + > +#define AW_PID_2049_I2S_TXEDGE_NEGEDGE (0) > +#define AW_PID_2049_I2S_TXEDGE_NEGEDGE_VALUE \ > + (AW_PID_2049_I2S_TXEDGE_NEGEDGE << AW_PID_2049_I2S_TXEDGE_START_BIT) > + > +#define AW_PID_2049_I2S_TXEDGE_POSEDGE (1) > +#define AW_PID_2049_I2S_TXEDGE_POSEDGE_VALUE \ > + (AW_PID_2049_I2S_TXEDGE_POSEDGE << AW_PID_2049_I2S_TXEDGE_START_BIT) > + > +#define AW_PID_2049_I2S_TXEDGE_DEFAULT_VALUE (0) > +#define AW_PID_2049_I2S_TXEDGE_DEFAULT \ > + (AW_PID_2049_I2S_TXEDGE_DEFAULT_VALUE << AW_PID_2049_I2S_TXEDGE_START_BIT) > + > +/* I2SDOSEL bit 7 (I2SCFG2 0x08) */ > +#define AW_PID_2049_I2SDOSEL_START_BIT (7) > +#define AW_PID_2049_I2SDOSEL_BITS_LEN (1) > +#define AW_PID_2049_I2SDOSEL_MASK \ > + (~(((1<<AW_PID_2049_I2SDOSEL_BITS_LEN)-1) << AW_PID_2049_I2SDOSEL_START_BIT)) > + > +#define AW_PID_2049_I2SDOSEL_ZEROS (0) > +#define AW_PID_2049_I2SDOSEL_ZEROS_VALUE \ > + (AW_PID_2049_I2SDOSEL_ZEROS << AW_PID_2049_I2SDOSEL_START_BIT) > + > +#define AW_PID_2049_I2SDOSEL_TXDATA (1) > +#define AW_PID_2049_I2SDOSEL_TXDATA_VALUE \ > + (AW_PID_2049_I2SDOSEL_TXDATA << AW_PID_2049_I2SDOSEL_START_BIT) > + > +#define AW_PID_2049_I2SDOSEL_DEFAULT_VALUE (0) > +#define AW_PID_2049_I2SDOSEL_DEFAULT \ > + (AW_PID_2049_I2SDOSEL_DEFAULT_VALUE << AW_PID_2049_I2SDOSEL_START_BIT) > + > +/* DOHZ bit 6 (I2SCFG2 0x08) */ > +#define AW_PID_2049_DOHZ_START_BIT (6) > +#define AW_PID_2049_DOHZ_BITS_LEN (1) > +#define AW_PID_2049_DOHZ_MASK \ > + (~(((1<<AW_PID_2049_DOHZ_BITS_LEN)-1) << AW_PID_2049_DOHZ_START_BIT)) > + > +#define AW_PID_2049_DOHZ_ALL (0) > +#define AW_PID_2049_DOHZ_ALL_VALUE \ > + (AW_PID_2049_DOHZ_ALL << AW_PID_2049_DOHZ_START_BIT) > + > +#define AW_PID_2049_DOHZ_HIZ (1) > +#define AW_PID_2049_DOHZ_HIZ_VALUE \ > + (AW_PID_2049_DOHZ_HIZ << AW_PID_2049_DOHZ_START_BIT) > + > +#define AW_PID_2049_DOHZ_DEFAULT_VALUE (1) > +#define AW_PID_2049_DOHZ_DEFAULT \ > + (AW_PID_2049_DOHZ_DEFAULT_VALUE << AW_PID_2049_DOHZ_START_BIT) > + > +/* DRVSTREN bit 5 (I2SCFG2 0x08) */ > +#define AW_PID_2049_DRVSTREN_START_BIT (5) > +#define AW_PID_2049_DRVSTREN_BITS_LEN (1) > +#define AW_PID_2049_DRVSTREN_MASK \ > + (~(((1<<AW_PID_2049_DRVSTREN_BITS_LEN)-1) << AW_PID_2049_DRVSTREN_START_BIT)) > + > +#define AW_PID_2049_DRVSTREN_4MA (0) > +#define AW_PID_2049_DRVSTREN_4MA_VALUE \ > + (AW_PID_2049_DRVSTREN_4MA << AW_PID_2049_DRVSTREN_START_BIT) > + > +#define AW_PID_2049_DRVSTREN_12MA (1) > +#define AW_PID_2049_DRVSTREN_12MA_VALUE \ > + (AW_PID_2049_DRVSTREN_12MA << AW_PID_2049_DRVSTREN_START_BIT) > + > +#define AW_PID_2049_DRVSTREN_DEFAULT_VALUE (1) > +#define AW_PID_2049_DRVSTREN_DEFAULT \ > + (AW_PID_2049_DRVSTREN_DEFAULT_VALUE << AW_PID_2049_DRVSTREN_START_BIT) > + > +/* INPLEV bit 4 (I2SCFG2 0x08) */ > +#define AW_PID_2049_INPLEV_START_BIT (4) > +#define AW_PID_2049_INPLEV_BITS_LEN (1) > +#define AW_PID_2049_INPLEV_MASK \ > + (~(((1<<AW_PID_2049_INPLEV_BITS_LEN)-1) << AW_PID_2049_INPLEV_START_BIT)) > + > +#define AW_PID_2049_INPLEV_NOT_ATTENUATED (0) > +#define AW_PID_2049_INPLEV_NOT_ATTENUATED_VALUE \ > + (AW_PID_2049_INPLEV_NOT_ATTENUATED << AW_PID_2049_INPLEV_START_BIT) > + > +#define AW_PID_2049_INPLEV_ATTENUATED (1) > +#define AW_PID_2049_INPLEV_ATTENUATED_VALUE \ > + (AW_PID_2049_INPLEV_ATTENUATED << AW_PID_2049_INPLEV_START_BIT) > + > +#define AW_PID_2049_INPLEV_DEFAULT_VALUE (0) > +#define AW_PID_2049_INPLEV_DEFAULT \ > + (AW_PID_2049_INPLEV_DEFAULT_VALUE << AW_PID_2049_INPLEV_START_BIT) > + > +/* CFSEL bit 2:0 (I2SCFG2 0x08) */ > +#define AW_PID_2049_CFSEL_START_BIT (0) > +#define AW_PID_2049_CFSEL_BITS_LEN (3) > +#define AW_PID_2049_CFSEL_MASK \ > + (~(((1<<AW_PID_2049_CFSEL_BITS_LEN)-1) << AW_PID_2049_CFSEL_START_BIT)) > + > +#define AW_PID_2049_CFSEL_HAGC (0) > +#define AW_PID_2049_CFSEL_HAGC_VALUE \ > + (AW_PID_2049_CFSEL_HAGC << AW_PID_2049_CFSEL_START_BIT) > + > +#define AW_PID_2049_CFSEL_DFIFO (1) > +#define AW_PID_2049_CFSEL_DFIFO_VALUE \ > + (AW_PID_2049_CFSEL_DFIFO << AW_PID_2049_CFSEL_START_BIT) > + > +#define AW_PID_2049_CFSEL_ULS (2) > +#define AW_PID_2049_CFSEL_ULS_VALUE \ > + (AW_PID_2049_CFSEL_ULS << AW_PID_2049_CFSEL_START_BIT) > + > +#define AW_PID_2049_CFSEL_IVT_FS (3) > +#define AW_PID_2049_CFSEL_IVT_FS_VALUE \ > + (AW_PID_2049_CFSEL_IVT_FS << AW_PID_2049_CFSEL_START_BIT) > + > +#define AW_PID_2049_CFSEL_IVT_IPVT (4) > +#define AW_PID_2049_CFSEL_IVT_IPVT_VALUE \ > + (AW_PID_2049_CFSEL_IVT_IPVT << AW_PID_2049_CFSEL_START_BIT) > + > +#define AW_PID_2049_CFSEL_DEFAULT_VALUE (0) > +#define AW_PID_2049_CFSEL_DEFAULT \ > + (AW_PID_2049_CFSEL_DEFAULT_VALUE << AW_PID_2049_CFSEL_START_BIT) > + > +/* default value of I2SCFG2 (0x08) */ > +/* #define AW_PID_2049_I2SCFG2_DEFAULT (0x0060) */ > + > +/* HAGCCFG1 (0x09) detail */ > +/* RVTH bit 15:8 (HAGCCFG1 0x09) */ > +#define AW_PID_2049_RVTH_START_BIT (8) > +#define AW_PID_2049_RVTH_BITS_LEN (8) > +#define AW_PID_2049_RVTH_MASK \ > + (~(((1<<AW_PID_2049_RVTH_BITS_LEN)-1) << AW_PID_2049_RVTH_START_BIT)) > + > +#define AW_PID_2049_RVTH_DEFAULT_VALUE (0x39) > +#define AW_PID_2049_RVTH_DEFAULT \ > + (AW_PID_2049_RVTH_DEFAULT_VALUE << AW_PID_2049_RVTH_START_BIT) > + > +/* AVTH bit 7:0 (HAGCCFG1 0x09) */ > +#define AW_PID_2049_AVTH_START_BIT (0) > +#define AW_PID_2049_AVTH_BITS_LEN (8) > +#define AW_PID_2049_AVTH_MASK \ > + (~(((1<<AW_PID_2049_AVTH_BITS_LEN)-1) << AW_PID_2049_AVTH_START_BIT)) > + > +#define AW_PID_2049_AVTH_DEFAULT_VALUE (0x40) > +#define AW_PID_2049_AVTH_DEFAULT \ > + (AW_PID_2049_AVTH_DEFAULT_VALUE << AW_PID_2049_AVTH_START_BIT) > + > +/* default value of HAGCCFG1 (0x09) */ > +/* #define AW_PID_2049_HAGCCFG1_DEFAULT (0x3940) */ > + > +/* HAGCCFG2 (0x0A) detail */ > +/* ATTH bit 15:0 (HAGCCFG2 0x0A) */ > +#define AW_PID_2049_ATTH_START_BIT (0) > +#define AW_PID_2049_ATTH_BITS_LEN (16) > +#define AW_PID_2049_ATTH_MASK \ > + (~(((1<<AW_PID_2049_ATTH_BITS_LEN)-1) << AW_PID_2049_ATTH_START_BIT)) > + > +#define AW_PID_2049_ATTH_RESERVED (0) > +#define AW_PID_2049_ATTH_RESERVED_VALUE \ > + (AW_PID_2049_ATTH_RESERVED << AW_PID_2049_ATTH_START_BIT) > + > +#define AW_PID_2049_ATTH_DEFAULT_VALUE (0x0030) > +#define AW_PID_2049_ATTH_DEFAULT \ > + (AW_PID_2049_ATTH_DEFAULT_VALUE << AW_PID_2049_ATTH_START_BIT) > + > +/* default value of HAGCCFG2 (0x0A) */ > +/* #define AW_PID_2049_HAGCCFG2_DEFAULT (0x0030) */ > + > +/* HAGCCFG3 (0x0B) detail */ > +/* RTTH bit 15:0 (HAGCCFG3 0x0B) */ > +#define AW_PID_2049_RTTH_START_BIT (0) > +#define AW_PID_2049_RTTH_BITS_LEN (16) > +#define AW_PID_2049_RTTH_MASK \ > + (~(((1<<AW_PID_2049_RTTH_BITS_LEN)-1) << AW_PID_2049_RTTH_START_BIT)) > + > +#define AW_PID_2049_RTTH_RESERVED (0) > +#define AW_PID_2049_RTTH_RESERVED_VALUE \ > + (AW_PID_2049_RTTH_RESERVED << AW_PID_2049_RTTH_START_BIT) > + > +#define AW_PID_2049_RTTH_DEFAULT_VALUE (0x01E0) > +#define AW_PID_2049_RTTH_DEFAULT \ > + (AW_PID_2049_RTTH_DEFAULT_VALUE << AW_PID_2049_RTTH_START_BIT) > + > +/* default value of HAGCCFG3 (0x0B) */ > +/* #define AW_PID_2049_HAGCCFG3_DEFAULT (0x01E0) */ > + > +/* HAGCCFG4 (0x0C) detail */ > +/* IIC_GEN_ADDR bit 15:9 (HAGCCFG4 0x0C) */ > +#define AW_PID_2049_IIC_GEN_ADDR_START_BIT (9) > +#define AW_PID_2049_IIC_GEN_ADDR_BITS_LEN (7) > +#define AW_PID_2049_IIC_GEN_ADDR_MASK \ > + (~(((1<<AW_PID_2049_IIC_GEN_ADDR_BITS_LEN)-1) << AW_PID_2049_IIC_GEN_ADDR_START_BIT)) > + > +#define AW_PID_2049_IIC_GEN_ADDR_DEFAULT_VALUE (0x0E) > +#define AW_PID_2049_IIC_GEN_ADDR_DEFAULT \ > + (AW_PID_2049_IIC_GEN_ADDR_DEFAULT_VALUE << AW_PID_2049_IIC_GEN_ADDR_START_BIT) > + > +/* IIC_GEN_EN bit 8 (HAGCCFG4 0x0C) */ > +#define AW_PID_2049_IIC_GEN_EN_START_BIT (8) > +#define AW_PID_2049_IIC_GEN_EN_BITS_LEN (1) > +#define AW_PID_2049_IIC_GEN_EN_MASK \ > + (~(((1<<AW_PID_2049_IIC_GEN_EN_BITS_LEN)-1) << AW_PID_2049_IIC_GEN_EN_START_BIT)) > + > +#define AW_PID_2049_IIC_GEN_EN_DISABLE (0) > +#define AW_PID_2049_IIC_GEN_EN_DISABLE_VALUE \ > + (AW_PID_2049_IIC_GEN_EN_DISABLE << AW_PID_2049_IIC_GEN_EN_START_BIT) > + > +#define AW_PID_2049_IIC_GEN_EN_ENABLE (1) > +#define AW_PID_2049_IIC_GEN_EN_ENABLE_VALUE \ > + (AW_PID_2049_IIC_GEN_EN_ENABLE << AW_PID_2049_IIC_GEN_EN_START_BIT) > + > +#define AW_PID_2049_IIC_GEN_EN_DEFAULT_VALUE (0) > +#define AW_PID_2049_IIC_GEN_EN_DEFAULT \ > + (AW_PID_2049_IIC_GEN_EN_DEFAULT_VALUE << AW_PID_2049_IIC_GEN_EN_START_BIT) > + > +/* HOLDTH bit 7:0 (HAGCCFG4 0x0C) */ > +#define AW_PID_2049_HOLDTH_START_BIT (0) > +#define AW_PID_2049_HOLDTH_BITS_LEN (8) > +#define AW_PID_2049_HOLDTH_MASK \ > + (~(((1<<AW_PID_2049_HOLDTH_BITS_LEN)-1) << AW_PID_2049_HOLDTH_START_BIT)) > + > +#define AW_PID_2049_HOLDTH_RESERVED (0) > +#define AW_PID_2049_HOLDTH_RESERVED_VALUE \ > + (AW_PID_2049_HOLDTH_RESERVED << AW_PID_2049_HOLDTH_START_BIT) > + > +#define AW_PID_2049_HOLDTH_DEFAULT_VALUE (0x64) > +#define AW_PID_2049_HOLDTH_DEFAULT \ > + (AW_PID_2049_HOLDTH_DEFAULT_VALUE << AW_PID_2049_HOLDTH_START_BIT) > + > +/* default value of HAGCCFG4 (0x0C) */ > +/* #define AW_PID_2049_HAGCCFG4_DEFAULT (0x1C64) */ > + > +/* AGC_DSP_CTL bit 15 (HAGCCFG7 0x0F) */ > +#define AW_PID_2049_AGC_DSP_CTL_START_BIT (15) > +#define AW_PID_2049_AGC_DSP_CTL_BITS_LEN (1) > +#define AW_PID_2049_AGC_DSP_CTL_MASK \ > + (~(((1<<AW_PID_2049_AGC_DSP_CTL_BITS_LEN)-1) << AW_PID_2049_AGC_DSP_CTL_START_BIT)) > + > +#define AW_PID_2049_AGC_DSP_CTL_DISABLE (0) > +#define AW_PID_2049_AGC_DSP_CTL_DISABLE_VALUE \ > + (AW_PID_2049_AGC_DSP_CTL_DISABLE << AW_PID_2049_AGC_DSP_CTL_START_BIT) > + > +#define AW_PID_2049_AGC_DSP_CTL_ENABLE (1) > +#define AW_PID_2049_AGC_DSP_CTL_ENABLE_VALUE \ > + (AW_PID_2049_AGC_DSP_CTL_ENABLE << AW_PID_2049_AGC_DSP_CTL_START_BIT) > +/* VDSEL bit 0 (I2SCFG3 0x12) */ > +#define AW_PID_2049_VDSEL_START_BIT (0) > +#define AW_PID_2049_VDSEL_BITS_LEN (1) > +#define AW_PID_2049_VDSEL_MASK \ > + (~(((1<<AW_PID_2049_VDSEL_BITS_LEN)-1) << AW_PID_2049_VDSEL_START_BIT)) > + > +/* MEM_CLKSEL bit 3 (DBGCTRL 0x13) */ > +#define AW_PID_2049_MEM_CLKSEL_START_BIT (3) > +#define AW_PID_2049_MEM_CLKSEL_BITS_LEN (1) > +#define AW_PID_2049_MEM_CLKSEL_MASK \ > + (~(((1<<AW_PID_2049_MEM_CLKSEL_BITS_LEN)-1) << AW_PID_2049_MEM_CLKSEL_START_BIT)) > + > +#define AW_PID_2049_MEM_CLKSEL_OSC_CLK (0) > +#define AW_PID_2049_MEM_CLKSEL_OSC_CLK_VALUE \ > + (AW_PID_2049_MEM_CLKSEL_OSC_CLK << AW_PID_2049_MEM_CLKSEL_START_BIT) > + > +#define AW_PID_2049_MEM_CLKSEL_DAP_HCLK (1) > +#define AW_PID_2049_MEM_CLKSEL_DAP_HCLK_VALUE \ > + (AW_PID_2049_MEM_CLKSEL_DAP_HCLK << AW_PID_2049_MEM_CLKSEL_START_BIT) > + > +/* HAGCST (0x20) detail */ > +/* SPK_GAIN_ST bit 10:8 (HAGCST 0x20) */ > +#define AW_PID_2049_SPK_GAIN_ST_START_BIT (8) > +#define AW_PID_2049_SPK_GAIN_ST_BITS_LEN (3) > +#define AW_PID_2049_SPK_GAIN_ST_MASK \ > + (~(((1<<AW_PID_2049_SPK_GAIN_ST_BITS_LEN)-1) << AW_PID_2049_SPK_GAIN_ST_START_BIT)) > + > +#define AW_PID_2049_SPK_GAIN_ST_4_AV (0) > +#define AW_PID_2049_SPK_GAIN_ST_4_AV_VALUE \ > + (AW_PID_2049_SPK_GAIN_ST_4_AV << AW_PID_2049_SPK_GAIN_ST_START_BIT) > + > +#define AW_PID_2049_SPK_GAIN_ST_4P67_AV (1) > +#define AW_PID_2049_SPK_GAIN_ST_4P67_AV_VALUE \ > + (AW_PID_2049_SPK_GAIN_ST_4P67_AV << AW_PID_2049_SPK_GAIN_ST_START_BIT) > + > +#define AW_PID_2049_SPK_GAIN_ST_6_AV (2) > +#define AW_PID_2049_SPK_GAIN_ST_6_AV_VALUE \ > + (AW_PID_2049_SPK_GAIN_ST_6_AV << AW_PID_2049_SPK_GAIN_ST_START_BIT) > + > +#define AW_PID_2049_SPK_GAIN_ST_7_AV (3) > +#define AW_PID_2049_SPK_GAIN_ST_7_AV_VALUE \ > + (AW_PID_2049_SPK_GAIN_ST_7_AV << AW_PID_2049_SPK_GAIN_ST_START_BIT) > + > +#define AW_PID_2049_SPK_GAIN_ST_12_AV (4) > +#define AW_PID_2049_SPK_GAIN_ST_12_AV_VALUE \ > + (AW_PID_2049_SPK_GAIN_ST_12_AV << AW_PID_2049_SPK_GAIN_ST_START_BIT) > + > +#define AW_PID_2049_SPK_GAIN_ST_14_AV (5) > +#define AW_PID_2049_SPK_GAIN_ST_14_AV_VALUE \ > + (AW_PID_2049_SPK_GAIN_ST_14_AV << AW_PID_2049_SPK_GAIN_ST_START_BIT) > + > +#define AW_PID_2049_SPK_GAIN_ST_DEFAULT_VALUE (5) > +#define AW_PID_2049_SPK_GAIN_ST_DEFAULT \ > + (AW_PID_2049_SPK_GAIN_ST_DEFAULT_VALUE << AW_PID_2049_SPK_GAIN_ST_START_BIT) > + > +/* BSTVOUT_ST bit 5:0 (HAGCST 0x20) */ > +#define AW_PID_2049_BSTVOUT_ST_START_BIT (0) > +#define AW_PID_2049_BSTVOUT_ST_BITS_LEN (6) > +#define AW_PID_2049_BSTVOUT_ST_MASK \ > + (~(((1<<AW_PID_2049_BSTVOUT_ST_BITS_LEN)-1) << AW_PID_2049_BSTVOUT_ST_START_BIT)) > + > +#define AW_PID_2049_BSTVOUT_ST_3P125V (0) > +#define AW_PID_2049_BSTVOUT_ST_3P125V_VALUE \ > + (AW_PID_2049_BSTVOUT_ST_3P125V << AW_PID_2049_BSTVOUT_ST_START_BIT) > + > +#define AW_PID_2049_BSTVOUT_ST_3P250V (1) > +#define AW_PID_2049_BSTVOUT_ST_3P250V_VALUE \ > + (AW_PID_2049_BSTVOUT_ST_3P250V << AW_PID_2049_BSTVOUT_ST_START_BIT) > + > +#define AW_PID_2049_BSTVOUT_ST_3P375V (2) > +#define AW_PID_2049_BSTVOUT_ST_3P375V_VALUE \ > + (AW_PID_2049_BSTVOUT_ST_3P375V << AW_PID_2049_BSTVOUT_ST_START_BIT) > + > +#define AW_PID_2049_BSTVOUT_ST_3P500V (3) > +#define AW_PID_2049_BSTVOUT_ST_3P500V_VALUE \ > + (AW_PID_2049_BSTVOUT_ST_3P500V << AW_PID_2049_BSTVOUT_ST_START_BIT) > + > +#define AW_PID_2049_BSTVOUT_ST_3P625V (4) > +#define AW_PID_2049_BSTVOUT_ST_3P625V_VALUE \ > + (AW_PID_2049_BSTVOUT_ST_3P625V << AW_PID_2049_BSTVOUT_ST_START_BIT) > + > +#define AW_PID_2049_BSTVOUT_ST_3P750V (5) > +#define AW_PID_2049_BSTVOUT_ST_3P750V_VALUE \ > + (AW_PID_2049_BSTVOUT_ST_3P750V << AW_PID_2049_BSTVOUT_ST_START_BIT) > + > +#define AW_PID_2049_BSTVOUT_ST_11P000V (63) > +#define AW_PID_2049_BSTVOUT_ST_11P000V_VALUE \ > + (AW_PID_2049_BSTVOUT_ST_11P000V << AW_PID_2049_BSTVOUT_ST_START_BIT) > + > +#define AW_PID_2049_BSTVOUT_ST_DEFAULT_VALUE (0) > +#define AW_PID_2049_BSTVOUT_ST_DEFAULT \ > + (AW_PID_2049_BSTVOUT_ST_DEFAULT_VALUE << AW_PID_2049_BSTVOUT_ST_START_BIT) > + > +/* default value of HAGCST (0x20) */ > +/* #define AW_PID_2049_HAGCST_DEFAULT (0x0500) */ > + > +/* VBAT (0x21) detail */ > +/* VBAT_DET bit 9:0 (VBAT 0x21) */ > +#define AW_PID_2049_VBAT_DET_START_BIT (0) > +#define AW_PID_2049_VBAT_DET_BITS_LEN (10) > +#define AW_PID_2049_VBAT_DET_MASK \ > + (~(((1<<AW_PID_2049_VBAT_DET_BITS_LEN)-1) << AW_PID_2049_VBAT_DET_START_BIT)) > + > +#define AW_PID_2049_VBAT_DET_DEFAULT_VALUE (0x263) > +#define AW_PID_2049_VBAT_DET_DEFAULT \ > + (AW_PID_2049_VBAT_DET_DEFAULT_VALUE << AW_PID_2049_VBAT_DET_START_BIT) > + > +#define AW_PID_2049_VBAT_RANGE (6025) > +#define AW_PID_2049_INT_10BIT (1023) > +/* default value of VBAT (0x21) */ > +/* #define AW_PID_2049_VBAT_DEFAULT (0x0263) */ > + > +/* TEMP (0x22) detail */ > +/* TEMP_DET bit 9:0 (TEMP 0x22) */ > +#define AW_PID_2049_TEMP_DET_START_BIT (0) > +#define AW_PID_2049_TEMP_DET_BITS_LEN (10) > +#define AW_PID_2049_TEMP_DET_MASK \ > + (~(((1<<AW_PID_2049_TEMP_DET_BITS_LEN)-1) << AW_PID_2049_TEMP_DET_START_BIT)) > + > +#define AW_PID_2049_TEMP_DET_MINUS_40 (0x3D8) > +#define AW_PID_2049_TEMP_DET_MINUS_40_VALUE \ > + (AW_PID_2049_TEMP_DET_MINUS_40 << AW_PID_2049_TEMP_DET_START_BIT) > + > +#define AW_PID_2049_TEMP_DET_0 (0x00) > +#define AW_PID_2049_TEMP_DET_0_VALUE \ > + (AW_PID_2049_TEMP_DET_0 << AW_PID_2049_TEMP_DET_START_BIT) > + > +#define AW_PID_2049_TEMP_DET_1 (0x01) > +#define AW_PID_2049_TEMP_DET_1_VALUE \ > + (AW_PID_2049_TEMP_DET_1 << AW_PID_2049_TEMP_DET_START_BIT) > + > +#define AW_PID_2049_TEMP_DET_25 (0x19) > +#define AW_PID_2049_TEMP_DET_25_VALUE \ > + (AW_PID_2049_TEMP_DET_25 << AW_PID_2049_TEMP_DET_START_BIT) > + > +#define AW_PID_2049_TEMP_DET_55 (0x37) > +#define AW_PID_2049_TEMP_DET_55_VALUE \ > + (AW_PID_2049_TEMP_DET_55 << AW_PID_2049_TEMP_DET_START_BIT) > + > +#define AW_PID_2049_TEMP_DET_DEFAULT_VALUE (0x019) > +#define AW_PID_2049_TEMP_DET_DEFAULT \ > + (AW_PID_2049_TEMP_DET_DEFAULT_VALUE << AW_PID_2049_TEMP_DET_START_BIT) > +#define AW_PID_2049_TEMP_SIGN_MASK (~(1 << 9)) > +#define AW_PID_2049_TEMP_NEG_MASK (0XFC00) > + > +/* default value of TEMP (0x22) */ > +/* #define AW_PID_2049_TEMP_DEFAULT (0x0019) */ > + > +/* PVDD (0x23) detail */ > +/* PVDD_DET bit 9:0 (PVDD 0x23) */ > +#define AW_PID_2049_PVDD_DET_START_BIT (0) > +#define AW_PID_2049_PVDD_DET_BITS_LEN (10) > +#define AW_PID_2049_PVDD_DET_MASK \ > + (~(((1<<AW_PID_2049_PVDD_DET_BITS_LEN)-1) << AW_PID_2049_PVDD_DET_START_BIT)) > + > +#define AW_PID_2049_PVDD_DET_DEFAULT_VALUE (0x263) > +#define AW_PID_2049_PVDD_DET_DEFAULT \ > + (AW_PID_2049_PVDD_DET_DEFAULT_VALUE << AW_PID_2049_PVDD_DET_START_BIT) > + > +/* default value of PVDD (0x23) */ > +/* #define AW_PID_2049_PVDD_DEFAULT (0x0263) */ > + > +/* BSTCTRL1 (0x60) detail */ > +/* BST_RTH bit 13:8 (BSTCTRL1 0x60) */ > +#define AW_PID_2049_BST_RTH_START_BIT (8) > +#define AW_PID_2049_BST_RTH_BITS_LEN (6) > +#define AW_PID_2049_BST_RTH_MASK \ > + (~(((1<<AW_PID_2049_BST_RTH_BITS_LEN)-1) << AW_PID_2049_BST_RTH_START_BIT)) > + > +#define AW_PID_2049_BST_RTH_DEFAULT_VALUE (4) > +#define AW_PID_2049_BST_RTH_DEFAULT \ > + (AW_PID_2049_BST_RTH_DEFAULT_VALUE << AW_PID_2049_BST_RTH_START_BIT) > + > +/* BST_ATH bit 5:0 (BSTCTRL1 0x60) */ > +#define AW_PID_2049_BST_ATH_START_BIT (0) > +#define AW_PID_2049_BST_ATH_BITS_LEN (6) > +#define AW_PID_2049_BST_ATH_MASK \ > + (~(((1<<AW_PID_2049_BST_ATH_BITS_LEN)-1) << AW_PID_2049_BST_ATH_START_BIT)) > + > +#define AW_PID_2049_BST_ATH_DEFAULT_VALUE (2) > +#define AW_PID_2049_BST_ATH_DEFAULT \ > + (AW_PID_2049_BST_ATH_DEFAULT_VALUE << AW_PID_2049_BST_ATH_START_BIT) > + > +/* default value of BSTCTRL1 (0x60) */ > +/* #define AW_PID_2049_BSTCTRL1_DEFAULT (0x0402) */ > + > +/* BSTCTRL2 (0x61) detail */ > +/* BST_MODE bit 14:12 (BSTCTRL2 0x61) */ > +#define AW_PID_2049_BST_MODE_START_BIT (12) > +#define AW_PID_2049_BST_MODE_BITS_LEN (3) > +#define AW_PID_2049_BST_MODE_MASK \ > + (~(((1<<AW_PID_2049_BST_MODE_BITS_LEN)-1) << AW_PID_2049_BST_MODE_START_BIT)) > + > +#define AW_PID_2049_BST_MODE_TRANSPARENT (0) > +#define AW_PID_2049_BST_MODE_TRANSPARENT_VALUE \ > + (AW_PID_2049_BST_MODE_TRANSPARENT << AW_PID_2049_BST_MODE_START_BIT) > + > +#define AW_PID_2049_BST_MODE_FORCE_BOOST (1) > +#define AW_PID_2049_BST_MODE_FORCE_BOOST_VALUE \ > + (AW_PID_2049_BST_MODE_FORCE_BOOST << AW_PID_2049_BST_MODE_START_BIT) > + > +#define AW_PID_2049_BST_MODE_SMART_BOOST1 (5) > +#define AW_PID_2049_BST_MODE_SMART_BOOST1_VALUE \ > + (AW_PID_2049_BST_MODE_SMART_BOOST1 << AW_PID_2049_BST_MODE_START_BIT) > + > +#define AW_PID_2049_BST_MODE_SMART_BOOST2 (6) > +#define AW_PID_2049_BST_MODE_SMART_BOOST2_VALUE \ > + (AW_PID_2049_BST_MODE_SMART_BOOST2 << AW_PID_2049_BST_MODE_START_BIT) > + > +#define AW_PID_2049_BST_MODE_DEFAULT_VALUE (0x6) > +#define AW_PID_2049_BST_MODE_DEFAULT \ > + (AW_PID_2049_BST_MODE_DEFAULT_VALUE << AW_PID_2049_BST_MODE_START_BIT) > + > +/* WDT_CNT bit 7:0 (WDT 0x42) */ > +#define AW_PID_2049_WDT_CNT_START_BIT (0) > +#define AW_PID_2049_WDT_CNT_BITS_LEN (8) > +#define AW_PID_2049_WDT_CNT_MASK \ > + (~(((1<<AW_PID_2049_WDT_CNT_BITS_LEN)-1) << AW_PID_2049_WDT_CNT_START_BIT)) > + > +/* BST_TDEG bit 11:8 (BSTCTRL2 0x61) */ > +#define AW_PID_2049_BST_TDEG_START_BIT (8) > +#define AW_PID_2049_BST_TDEG_BITS_LEN (4) > +#define AW_PID_2049_BST_TDEG_MASK \ > + (~(((1<<AW_PID_2049_BST_TDEG_BITS_LEN)-1) << AW_PID_2049_BST_TDEG_START_BIT)) > + > +#define AW_PID_2049_BST_TDEG_0P50_MS (0) > +#define AW_PID_2049_BST_TDEG_0P50_MS_VALUE \ > + (AW_PID_2049_BST_TDEG_0P50_MS << AW_PID_2049_BST_TDEG_START_BIT) > + > +#define AW_PID_2049_BST_TDEG_1P00_MS (1) > +#define AW_PID_2049_BST_TDEG_1P00_MS_VALUE \ > + (AW_PID_2049_BST_TDEG_1P00_MS << AW_PID_2049_BST_TDEG_START_BIT) > + > +#define AW_PID_2049_BST_TDEG_2P00_MS (2) > +#define AW_PID_2049_BST_TDEG_2P00_MS_VALUE \ > + (AW_PID_2049_BST_TDEG_2P00_MS << AW_PID_2049_BST_TDEG_START_BIT) > + > +#define AW_PID_2049_BST_TDEG_4P00_MS (3) > +#define AW_PID_2049_BST_TDEG_4P00_MS_VALUE \ > + (AW_PID_2049_BST_TDEG_4P00_MS << AW_PID_2049_BST_TDEG_START_BIT) > + > +#define AW_PID_2049_BST_TDEG_8P00_MS (4) > +#define AW_PID_2049_BST_TDEG_8P00_MS_VALUE \ > + (AW_PID_2049_BST_TDEG_8P00_MS << AW_PID_2049_BST_TDEG_START_BIT) > + > +#define AW_PID_2049_BST_TDEG_10P7_MS (5) > +#define AW_PID_2049_BST_TDEG_10P7_MS_VALUE \ > + (AW_PID_2049_BST_TDEG_10P7_MS << AW_PID_2049_BST_TDEG_START_BIT) > + > +/* ReAbs bit 3 (ASR1 0x45) */ > +#define AW_PID_2049_ReAbs_START_BIT (3) > +#define AW_PID_2049_ReAbs_BITS_LEN (1) > +#define AW_PID_2049_ReAbs_MASK \ > + (~(((1<<AW_PID_2049_ReAbs_BITS_LEN)-1) << AW_PID_2049_ReAbs_START_BIT)) > + > +#define AW_PID_2049_BST_TDEG_13P3_MS (6) > +#define AW_PID_2049_BST_TDEG_13P3_MS_VALUE \ > + (AW_PID_2049_BST_TDEG_13P3_MS << AW_PID_2049_BST_TDEG_START_BIT) > + > +/* DSP_VOL bit 15:8 (DSPCFG 0x47) */ > +#define AW_PID_2049_DSP_VOL_START_BIT (8) > +#define AW_PID_2049_DSP_VOL_BITS_LEN (8) > +#define AW_PID_2049_DSP_VOL_MASK \ > + (~(((1<<AW_PID_2049_DSP_VOL_BITS_LEN)-1) << AW_PID_2049_DSP_VOL_START_BIT)) > + > +#define AW_PID_2049_DSP_VOL_MUTE (0XFF00) > +#define AW_PID_2049_DSP_VOL_NOISE_ST (0X1800) > + > +#define AW_PID_2049_BST_TDEG_16P0_MS (7) > +#define AW_PID_2049_BST_TDEG_16P0_MS_VALUE \ > + (AW_PID_2049_BST_TDEG_16P0_MS << AW_PID_2049_BST_TDEG_START_BIT) > + > +#define AW_PID_2049_BST_TDEG_18P6_MS (8) > +#define AW_PID_2049_BST_TDEG_18P6_MS_VALUE \ > + (AW_PID_2049_BST_TDEG_18P6_MS << AW_PID_2049_BST_TDEG_START_BIT) > + > +#define AW_PID_2049_BST_TDEG_21P3_MS (9) > +#define AW_PID_2049_BST_TDEG_21P3_MS_VALUE \ > + (AW_PID_2049_BST_TDEG_21P3_MS << AW_PID_2049_BST_TDEG_START_BIT) > + > +#define AW_PID_2049_BST_TDEG_24P0_MS (10) > +#define AW_PID_2049_BST_TDEG_24P0_MS_VALUE \ > + (AW_PID_2049_BST_TDEG_24P0_MS << AW_PID_2049_BST_TDEG_START_BIT) > + > +#define AW_PID_2049_BST_TDEG_32P0_MS (11) > +#define AW_PID_2049_BST_TDEG_32P0_MS_VALUE \ > + (AW_PID_2049_BST_TDEG_32P0_MS << AW_PID_2049_BST_TDEG_START_BIT) > + > +#define AW_PID_2049_BST_TDEG_64P0_MS (12) > +#define AW_PID_2049_BST_TDEG_64P0_MS_VALUE \ > + (AW_PID_2049_BST_TDEG_64P0_MS << AW_PID_2049_BST_TDEG_START_BIT) > + > +#define AW_PID_2049_BST_TDEG_128_MS (13) > +#define AW_PID_2049_BST_TDEG_128_MS_VALUE \ > + (AW_PID_2049_BST_TDEG_128_MS << AW_PID_2049_BST_TDEG_START_BIT) > + > +#define AW_PID_2049_BST_TDEG_256_MS (14) > +#define AW_PID_2049_BST_TDEG_256_MS_VALUE \ > + (AW_PID_2049_BST_TDEG_256_MS << AW_PID_2049_BST_TDEG_START_BIT) > + > +#define AW_PID_2049_BST_TDEG_1200_MS (15) > +#define AW_PID_2049_BST_TDEG_1200_MS_VALUE \ > + (AW_PID_2049_BST_TDEG_1200_MS << AW_PID_2049_BST_TDEG_START_BIT) > + > +#define AW_PID_2049_BST_TDEG_DEFAULT_VALUE (11) > +#define AW_PID_2049_BST_TDEG_DEFAULT \ > + (AW_PID_2049_BST_TDEG_DEFAULT_VALUE << AW_PID_2049_BST_TDEG_START_BIT) > + > +/* VOUT_VREFSET bit 5:0 (BSTCTRL2 0x61) */ > +/* CCO_MUX bit 14 (PLLCTRL1 0x52) */ > +#define AW_PID_2049_CCO_MUX_START_BIT (14) > +#define AW_PID_2049_CCO_MUX_BITS_LEN (1) > +#define AW_PID_2049_CCO_MUX_MASK \ > + (~(((1<<AW_PID_2049_CCO_MUX_BITS_LEN)-1) << AW_PID_2049_CCO_MUX_START_BIT)) > + > +#define AW_PID_2049_CCO_MUX_DIVIDED (0) > +#define AW_PID_2049_CCO_MUX_DIVIDED_VALUE \ > + (AW_PID_2049_CCO_MUX_DIVIDED << AW_PID_2049_CCO_MUX_START_BIT) > + > +#define AW_PID_2049_CCO_MUX_BYPASS (1) > +#define AW_PID_2049_CCO_MUX_BYPASS_VALUE \ > + (AW_PID_2049_CCO_MUX_BYPASS << AW_PID_2049_CCO_MUX_START_BIT) > + > +#define AW_PID_2049_VOUT_VREFSET_START_BIT (0) > +#define AW_PID_2049_VOUT_VREFSET_BITS_LEN (6) > +#define AW_PID_2049_VOUT_VREFSET_MASK \ > + (~(((1<<AW_PID_2049_VOUT_VREFSET_BITS_LEN)-1) << AW_PID_2049_VOUT_VREFSET_START_BIT)) > + > +#define AW_PID_2049_VOUT_VREFSET_3P125V (0) > +#define AW_PID_2049_VOUT_VREFSET_3P125V_VALUE \ > + (AW_PID_2049_VOUT_VREFSET_3P125V << AW_PID_2049_VOUT_VREFSET_START_BIT) > + > +#define AW_PID_2049_VOUT_VREFSET_3P250V (1) > +#define AW_PID_2049_VOUT_VREFSET_3P250V_VALUE \ > + (AW_PID_2049_VOUT_VREFSET_3P250V << AW_PID_2049_VOUT_VREFSET_START_BIT) > + > +#define AW_PID_2049_VOUT_VREFSET_3P375V (2) > +#define AW_PID_2049_VOUT_VREFSET_3P375V_VALUE \ > + (AW_PID_2049_VOUT_VREFSET_3P375V << AW_PID_2049_VOUT_VREFSET_START_BIT) > + > +#define AW_PID_2049_VOUT_VREFSET_3P500V (3) > +#define AW_PID_2049_VOUT_VREFSET_3P500V_VALUE \ > + (AW_PID_2049_VOUT_VREFSET_3P500V << AW_PID_2049_VOUT_VREFSET_START_BIT) > + > +#define AW_PID_2049_VOUT_VREFSET_3P625V (4) > +#define AW_PID_2049_VOUT_VREFSET_3P625V_VALUE \ > + (AW_PID_2049_VOUT_VREFSET_3P625V << AW_PID_2049_VOUT_VREFSET_START_BIT) > + > +#define AW_PID_2049_VOUT_VREFSET_3P750V (5) > +#define AW_PID_2049_VOUT_VREFSET_3P750V_VALUE \ > + (AW_PID_2049_VOUT_VREFSET_3P750V << AW_PID_2049_VOUT_VREFSET_START_BIT) > + > +#define AW_PID_2049_VOUT_VREFSET_11P000V (63) > +#define AW_PID_2049_VOUT_VREFSET_11P000V_VALUE \ > + (AW_PID_2049_VOUT_VREFSET_11P000V << AW_PID_2049_VOUT_VREFSET_START_BIT) > + > +#define AW_PID_2049_VOUT_VREFSET_DEFAULT_VALUE (0x33) > +#define AW_PID_2049_VOUT_VREFSET_DEFAULT \ > + (AW_PID_2049_VOUT_VREFSET_DEFAULT_VALUE << AW_PID_2049_VOUT_VREFSET_START_BIT) > + > +/* default value of BSTCTRL2 (0x61) */ > +/* #define AW_PID_2049_BSTCTRL2_DEFAULT (0x6B33) */ > + > +/* detail information of registers end */ > + > +/* EF_VSN_GESLP bit 9:0 (EFRH 0x78) */ > +#define AW_PID_2049_EF_VSN_GESLP_START_BIT (0) > +#define AW_PID_2049_EF_VSN_GESLP_BITS_LEN (10) > +#define AW_PID_2049_EF_VSN_GESLP_MASK \ > + (~(((1<<AW_PID_2049_EF_VSN_GESLP_BITS_LEN)-1) << AW_PID_2049_EF_VSN_GESLP_START_BIT)) > + > +#define AW_PID_2049_EF_VSN_GESLP_SIGN_MASK (~(1 << 9)) > +#define AW_PID_2049_EF_VSN_GESLP_SIGN_NEG (0xfe00) > +/* EF_ISN_GESLP bit 9:0 (EFRM2 0x79) */ > +#define AW_PID_2049_EF_ISN_GESLP_START_BIT (0) > +#define AW_PID_2049_EF_ISN_GESLP_BITS_LEN (10) > +#define AW_PID_2049_EF_ISN_GESLP_MASK \ > + (~(((1<<AW_PID_2049_EF_ISN_GESLP_BITS_LEN)-1) << AW_PID_2049_EF_ISN_GESLP_START_BIT)) > + > +#define AW_PID_2049_EF_ISN_GESLP_SIGN_MASK (~(1 << 9)) > +#define AW_PID_2049_EF_ISN_GESLP_SIGN_NEG (0xfe00) > +/* > + * Vcalb > + */ > + > +#define AW_PID_2049_CABL_BASE_VALUE (1000) > +#define AW_PID_2049_ICABLK_FACTOR (1) > +#define AW_PID_2049_VCABLK_FACTOR (1) > +#define AW_PID_2049_VCAL_FACTOR (1 << 12) > +#define AW_PID_2049_VSCAL_FACTOR (16500) > +#define AW_PID_2049_ISCAL_FACTOR (3667) > +#define AW_PID_2049_EF_VSENSE_GAIN_SHIFT (0) > + > +#define AW_PID_2049_VCABLK_FACTOR_DAC (2) > +#define AW_PID_2049_VSCAL_FACTOR_DAC (11790) > +#define AW_PID_2049_EF_DAC_GESLP_SHIFT (10) > +#define AW_PID_2049_EF_DAC_GESLP_SIGN_MASK (1 << 5) > +#define AW_PID_2049_EF_DAC_GESLP_SIGN_NEG (0xffc0) > + > +#define AW_PID_2049_VCALB_ADJ_FACTOR (12) > + > +/* > + * AW883XX DSP > + */ > +#define AW_PID_2049_DSP_CFG_ADDR (0x9C80) > +#define AW_PID_2049_DSP_FW_ADDR (0x8C00) > + > +#define AW_PID_2049_DSP_REG_RESULT_F0 (0x9C58) > +#define AW_PID_2049_DSP_F0_SHIFT (1) > + > +#define AW_PID_2049_DSP_REG_CALRE (0x9C5A) > +#define AW_PID_2049_DSP_REG_CALRE_SHIFT (10) > +#define AW_PID_2049_DSP_REG_RESULT_Q (0x9C5C) > +#define AW_PID_2049_DSP_Q_SHIFT (11) > + > +#define AW_PID_2049_DSP_REG_VMAX (0x9C94) > + > + > +#define AW_PID_2049_DSP_REG_CFG_MBMEC_GLBCFG (0x9CE2) > +/* bit 0 */ > +#define AW_PID_2049_DSP_MONITOR_MASK (~(1 << 0)) > +#define AW_PID_2049_DSP_MONITOR_ENABLE (1 << 0) > +#define AW_PID_2049_DSP_MONITOR_DISABLE (0 << 0) > +/*bit 4*/ > +#define AW_PID_2049_DSP_REG_NOISE_MASK (~(1 << 4)) > + > +#define AW_PID_2049_DSP_TEMP_PEAK_MASK (~(1 << 4)) > +#define AW_PID_2049_DSP_TEMP_SEL_FLAG (~(1 << 14)) > + > +#define AW_PID_2049_DSP_REG_CFG_MBMEC_ACTAMPTH (0x9CE4)/*32bit*/ > +#define AW_PID_2049_DSP_REG_CFG_MBMEC_NOISEAMPTH (0x9CE6)/*32bit*/ > +#define AW_PID_2049_DSP_REG_VCALB (0x9CF7) > + > +#define AW_PID_2049_DSP_REG_CFG_ADPZ_RE (0x9D00)/*32bit*/ > +#define AW_PID_2049_DSP_RE_SHIFT (12) > + > +#define AW_PID_2049_DSP_REG_CFG_ADPZ_RA (0x9D02)/*32bit*/ > + > +#define AW_PID_2049_DSP_REG_CFG_ADPZ_USTEPN (0x9D08) > + > + > +#define AW_PID_2049_DSP_REG_CRC_ADDR (0x9F42)/*32bit*/ > +#define AW_PID_2049_DSP_REG_CFGF0_FS (0x9F44)/*32bit*/ > +#define AW_PID_2049_DSP_REG_CFG_RE_ALPHA (0x9F47) > +#define AW_PID_2049_DSP_REG_TEMP_ADDR (0x9C5D) > +#define AW_PID_2049_DSP_REG_TEMP_SWITCH (0x9D71)/*16bit*/ > +#define AW_PID_2049_DSP_CALI_F0_DELAY (0x9CFD) > +#define AW_PID_2049_DSP_CFG_ADPZ_T0 (0x9D11)/*16bit*/ > +#define AW_PID_2049_DSP_CFG_ADPZ_COILALPHA (0x9D0F)/*16bit*/ > +#define AW_PID_2049_DSP_ST_S1 (0x8180) > +#define AW_PID_2049_DSP_ST_E1 (0x83FD) > +#define AW_PID_2049_DSP_ST_S2 (0x9C00) > +#define AW_PID_2049_DSP_ST_E2 (0x9C5D) > + > +#endif /* #ifndef __AW_PID_2049_REG_H__ */ > diff --git a/sound/soc/codecs/aw883xx/aw883xx_spin.c b/sound/soc/codecs/aw883xx/aw883xx_spin.c > new file mode 100644 > index 0000000..de5f6c3 > --- /dev/null > +++ b/sound/soc/codecs/aw883xx/aw883xx_spin.c > @@ -0,0 +1,807 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * aw_spin.c aw883xx spin module > + * > + * Copyright (c) 2020 AWINIC Technology CO., LTD > + * > + * Author: Bruce zhao <zhaolei(a)awinic.com> > + */ > + > +#include <linux/module.h> > +#include <linux/i2c.h> > +#include <sound/soc.h> > +#include <linux/of_gpio.h> > +#include <linux/delay.h> > +#include <linux/device.h> > +#include <linux/version.h> > +#include <linux/syscalls.h> > +#include <sound/control.h> > +#include <linux/uaccess.h> > +#include <linux/debugfs.h> > +#include <linux/slab.h> > +#include <linux/fs.h> > +#include <linux/kernel.h> > +#include <linux/of.h> > +#include "aw883xx_spin.h" > +#include "aw883xx_device.h" > +#include "aw883xx.h" > +#include "aw883xx_log.h" > + > +static DEFINE_MUTEX(g_aw_spin_lock); > +static DEFINE_MUTEX(g_aw_dsp_lock); > + > +static int g_rx_topo_id = AW_RX_TOPO_ID; > +static int g_rx_port_id = AW_RX_PORT_ID; > + > +static unsigned int g_spin_angle = AW_SPIN_0; > +static unsigned int g_spin_mode = AW_SPIN_OFF_MODE; > + > +static const char *const aw_spin[] = {"spin_0", "spin_90", > + "spin_180", "spin_270"}; > + > +#ifdef AW_MTK_PLATFORM_SPIN > +extern int mtk_spk_send_ipi_buf_to_dsp(void *data_buffer, uint32_t data_size); > +extern int mtk_spk_recv_ipi_buf_from_dsp(int8_t *buffer, int16_t size, uint32_t *buf_len); > +#elif defined AW_QCOM_PLATFORM_SPIN > +extern int afe_get_topology(int port_id); > +extern int aw_send_afe_cal_apr(uint32_t param_id, > + void *buf, int cmd_size, bool write); > +#else > +static int aw_send_afe_cal_apr(uint32_t param_id, > + void *buf, int cmd_size, bool write) > +{ > + return 0; > +} > + > +static int afe_get_topology(int port_id) > +{ > + return 0; > +} > +#endif > + > +#ifdef AW_QCOM_PLATFORM_SPIN > +extern void aw_set_port_id(int tx_port_id, int rx_port_id); > +#else > +static void aw_set_port_id(int tx_port_id, int rx_port_id) > +{ > + > +} > +#endif > + > +static int aw_get_msg_id(int dev_ch, uint32_t *msg_id) > +{ > + switch (dev_ch) { > + case AW_DEV_CH_PRI_L: > + *msg_id = AFE_MSG_ID_MSG_0; > + break; > + case AW_DEV_CH_PRI_R: > + *msg_id = AFE_MSG_ID_MSG_0; > + break; > + case AW_DEV_CH_SEC_L: > + *msg_id = AFE_MSG_ID_MSG_1; > + break; > + case AW_DEV_CH_SEC_R: > + *msg_id = AFE_MSG_ID_MSG_1; > + break; > + default: > + pr_err("%s: can not find msg num, channel %d ", __func__, dev_ch); > + return -EINVAL; > + } > + > + pr_debug("%s: msg id[%d] ", __func__, *msg_id); > + return 0; > +} > + > +#ifdef AW_MTK_PLATFORM_SPIN > +static int aw_mtk_write_data_to_dsp(int msg_id, void *data, int size) > +{ > + int32_t *dsp_data = NULL; > + struct aw_msg_hdr *hdr = NULL; > + int ret; > + > + dsp_data = kzalloc(sizeof(struct aw_msg_hdr) + size, GFP_KERNEL); > + if (!dsp_data) > + return -ENOMEM; > + > + hdr = (struct aw_msg_hdr *)dsp_data; > + hdr->type = AW_DSP_MSG_TYPE_DATA; > + hdr->opcode_id = msg_id; > + hdr->version = AW_DSP_MSG_HDR_VER; > + > + memcpy(((char *)dsp_data) + sizeof(struct aw_msg_hdr), data, size); > + > + ret = mtk_spk_send_ipi_buf_to_dsp(dsp_data, > + sizeof(struct aw_msg_hdr) + size); > + if (ret < 0) { > + pr_err("%s: write data failed\n", __func__); > + kfree(dsp_data); > + dsp_data = NULL; > + return ret; > + } > + > + kfree(dsp_data); > + dsp_data = NULL; > + return 0; > +} > + > +static int aw_mtk_set_spin_angle(struct aw_device *aw_dev, uint32_t spin_angle) > +{ > + int ret; > + > + ret = aw_mtk_write_data_to_dsp(AW_MSG_ID_SPIN, &spin_angle, sizeof(uint32_t)); > + if (ret) > + aw_dev_err(aw_dev->dev, "write data to dsp failed"); > + > + return ret; > +} > + > +static int aw_mtk_get_spin_angle(void *spin_angle, int size) > +{ > + int ret; > + struct aw_msg_hdr hdr; > + > + hdr.type = AW_DSP_MSG_TYPE_CMD; > + hdr.opcode_id = AW_MSG_ID_SPIN; > + hdr.version = AW_DSP_MSG_HDR_VER; > + > + mutex_lock(&g_aw_dsp_lock); > + ret = mtk_spk_send_ipi_buf_to_dsp(&hdr, sizeof(struct aw_msg_hdr)); > + if (ret < 0) { > + pr_err("%s:send cmd failed\n", __func__); > + mutex_unlock(&g_aw_dsp_lock); > + return ret; > + } > + > + ret = mtk_spk_recv_ipi_buf_from_dsp(spin_angle, size, &size); > + if (ret < 0) { > + pr_err("%s:get data failed\n", __func__); > + mutex_unlock(&g_aw_dsp_lock); > + return ret; > + } > + mutex_unlock(&g_aw_dsp_lock); > + > + return 0; > +} > + > +static int aw_mtk_set_mixer_en(struct aw_device *aw_dev, uint32_t msg_id, int32_t is_enable) > +{ > + int32_t *dsp_msg = NULL; > + struct aw_msg_hdr *hdr = NULL; > + int ret; > + > + dsp_msg = kzalloc(sizeof(struct aw_msg_hdr) + sizeof(int32_t), GFP_KERNEL); > + if (!dsp_msg) > + return -ENOMEM; > + hdr = (struct aw_msg_hdr *)dsp_msg; > + hdr->type = AW_DSP_MSG_TYPE_DATA; > + hdr->opcode_id = AW_INLINE_ID_AUDIO_MIX; > + hdr->version = AW_DSP_MSG_HDR_VER; > + > + memcpy(((char *)dsp_msg) + sizeof(struct aw_msg_hdr), > + (char *)&is_enable, sizeof(int32_t)); > + > + ret = aw_mtk_write_data_to_dsp(msg_id, (void *)dsp_msg, > + sizeof(struct aw_msg_hdr) + sizeof(int32_t)); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, " write data failed"); > + kfree(dsp_msg); > + dsp_msg = NULL; > + return ret; > + } > + > + kfree(dsp_msg); > + dsp_msg = NULL; > + return 0; > +} > +#else > +static int aw_check_dsp_ready(void) > +{ > + int ret; > + > + ret = afe_get_topology(g_rx_port_id); What is this related to, and why is this Qualcomm-specific. I stopped here. Answer: I will fix this problem in patch v3. > + > + aw_pr_dbg("rx topo_id 0x%x ", ret); > + > + if (ret != g_rx_topo_id) > + aw_pr_err("get rx_topo_id 0x%x ", ret); > + > + return 0; > +} > + > +static int aw_qcom_write_data_to_dsp(uint32_t msg_id, void *data, int size) > +{ > + int ret; > + > + mutex_lock(&g_aw_dsp_lock); > + > + aw_check_dsp_ready(); > + ret = aw_send_afe_cal_apr(msg_id, data, size, true); > + > + mutex_unlock(&g_aw_dsp_lock); > + > + return ret; > +} > + > +static int aw_qcom_read_data_from_dsp(uint32_t msg_id, void *data, int size) > +{ > + int ret; > + > + mutex_lock(&g_aw_dsp_lock); > + > + aw_check_dsp_ready(); > + ret = aw_send_afe_cal_apr(msg_id, data, size, false); > + > + mutex_unlock(&g_aw_dsp_lock); > + > + return ret; > +} > + > +static int aw_qcom_set_spin_angle(struct aw_device *aw_dev, > + uint32_t spin_angle) > +{ > + int ret; > + > + ret = aw_qcom_write_data_to_dsp(AW_MSG_ID_SPIN, &spin_angle, sizeof(uint32_t)); > + if (ret) > + aw_dev_err(aw_dev->dev, "write spin angle to dsp failed"); > + else > + aw_dev_info(aw_dev->dev, "write spin angle to dsp successful"); > + > + return ret; > +} > + > +static int aw_qcom_get_spin_angle(uint32_t *spin_angle, int size) > +{ > + int ret; > + > + ret = aw_qcom_read_data_from_dsp(AW_MSG_ID_SPIN, spin_angle, size); > + if (ret) > + pr_err("%s: get spin angle failed\n", __func__); > + else > + pr_info("%s: get spin angle successful\n", __func__); > + > + return ret; > +} > + > +static int aw_qcom_set_mixer_en(struct aw_device *aw_dev, > + uint32_t msg_id, int32_t is_enable) > +{ > + int32_t *dsp_msg; > + int ret = 0; > + int msg_len = (int)(sizeof(struct aw_msg_hdr) + sizeof(int32_t)); > + > + dsp_msg = kzalloc(msg_len, GFP_KERNEL); > + if (!dsp_msg) > + return -ENOMEM; > + > + dsp_msg[0] = AW_DSP_MSG_TYPE_DATA; > + dsp_msg[1] = AW_INLINE_ID_AUDIO_MIX; > + dsp_msg[2] = AW_DSP_MSG_HDR_VER; > + > + memcpy(dsp_msg + (sizeof(struct aw_msg_hdr) / sizeof(int32_t)), > + (char *)&is_enable, sizeof(int32_t)); > + > + ret = aw_qcom_write_data_to_dsp(msg_id, (void *)dsp_msg, msg_len); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "write data to dsp failed"); > + kfree(dsp_msg); > + return ret; > + } > + > + aw_dev_dbg(aw_dev->dev, "write data[%d] to dsp success", msg_len); > + kfree(dsp_msg); > + return 0; > +} > +#endif > + > +/***********************************spin_angle**********************************/ > +static int aw_set_adsp_spin_angle(struct aw_device *aw_dev, uint32_t spin_angle) > +{ > + if (spin_angle >= AW_SPIN_MAX) { > + aw_dev_err(aw_dev->dev, "spin_angle:%d not support", > + spin_angle); > + return -EINVAL; > + } > + > +#ifdef AW_MTK_PLATFORM_SPIN > + return aw_mtk_set_spin_angle(aw_dev, spin_angle); > +#else > + return aw_qcom_set_spin_angle(aw_dev, spin_angle); > +#endif > +} > + > +static void aw_get_adsp_spin_angle(uint32_t *spin_angle) > +{ > +#ifdef AW_MTK_PLATFORM_SPIN > + aw_mtk_get_spin_angle(spin_angle, sizeof(uint32_t)); > +#else > + aw_qcom_get_spin_angle(spin_angle, sizeof(uint32_t)); > +#endif > +} > +/*******************************************************************************/ > + > +/**********************************mixer_status*********************************/ > +static int aw_set_mixer_en(struct aw_device *aw_dev, int32_t is_enable) > +{ > + int ret; > + uint32_t msg_id; > + > + ret = aw_get_msg_id(aw_dev->channel, &msg_id); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "get msg_num failed"); > + return ret; > + } > + > +#ifdef AW_MTK_PLATFORM_SPIN > + ret = aw_mtk_set_mixer_en(aw_dev, msg_id, is_enable); > +#else > + ret = aw_qcom_set_mixer_en(aw_dev, msg_id, is_enable); > +#endif No, we can't have such ifdefs Answer: I will fix this problem in patch v3. > + if (ret) > + aw_dev_err(aw_dev->dev, "set mixer status failed"); > + > + return ret; > +} > + > +int aw883xx_hold_reg_spin_st(struct aw_spin_desc *spin_desc) > +{ > + struct aw_device *aw_dev = container_of(spin_desc, > + struct aw_device, spin_desc); > + uint16_t reg_val; > + > + if (aw_dev == NULL) { > + aw_pr_err("aw_dev is NULL"); > + return -EINVAL; > + } > + > + mutex_lock(&g_aw_spin_lock); > + if ((g_spin_mode == AW_REG_SPIN_MODE) || > + (g_spin_mode == AW_REG_MIXER_SPIN_MODE)) { > + /*set rx*/ > + aw_dev->ops.aw_reg_read(aw_dev, > + aw_dev->chansel_desc.rxchan_reg, &reg_val); > + reg_val &= aw_dev->chansel_desc.rxchan_mask; > + reg_val |= spin_desc->spin_table[g_spin_angle].rx_val; > + aw_dev->ops.aw_reg_write(aw_dev, > + aw_dev->chansel_desc.rxchan_reg, reg_val); > + > + /*set tx*/ > + aw_dev->ops.aw_reg_read(aw_dev, > + aw_dev->chansel_desc.txchan_reg, &reg_val); > + reg_val &= aw_dev->chansel_desc.txchan_mask; > + reg_val |= spin_desc->spin_table[g_spin_angle].tx_val; > + aw_dev->ops.aw_reg_write(aw_dev, > + aw_dev->chansel_desc.txchan_reg, reg_val); > + } > + mutex_unlock(&g_aw_spin_lock); > + > + return 0; > +} > + > +int aw883xx_check_spin_mode(struct aw_spin_desc *spin_desc) > +{ > + struct list_head *pos = NULL; > + struct list_head *dev_list = NULL; > + struct aw_device *local_pa = NULL; > + int ret = -1; > + int spin_mode = AW_SPIN_OFF_MODE; > + struct aw_device *aw_dev = container_of(spin_desc, > + struct aw_device, spin_desc); > + struct aw883xx *aw883xx = (struct aw883xx *)aw_dev->private_data; > + > + if (g_spin_mode == AW_SPIN_OFF_MODE) { > + aw883xx->spin_flag = AW_SPIN_OFF; > + return 0; > + } > + > + ret = aw883xx_dev_get_list_head(&dev_list); > + if (ret) { > + aw_pr_err("get dev list failed"); > + return ret; > + } > + > + list_for_each(pos, dev_list) { > + local_pa = container_of(pos, struct aw_device, list_node); > + spin_mode = local_pa->spin_desc.spin_mode; > + if (g_spin_mode != spin_mode) { > + aw_pr_err("dev[%d] spin mode:%d not equal g_spin_mode:%d, check failed", > + local_pa->channel, spin_mode, g_spin_mode); > + aw883xx->spin_flag = AW_SPIN_OFF; > + return -EINVAL; > + } > + } > + aw883xx->spin_flag = AW_SPIN_ON; > + > + return 0; > +} > + > +int aw883xx_hold_dsp_spin_st(struct aw_spin_desc *spin_desc) > +{ > + struct aw_device *aw_dev = container_of(spin_desc, > + struct aw_device, spin_desc); > + int ret = -1; > + > + if (aw_dev == NULL) { > + aw_pr_err("aw_dev is NULL"); > + return -EINVAL; > + } > + > + if (aw_dev->channel == 0) { > + if (g_spin_mode == AW_ADSP_SPIN_MODE) { > + ret = aw_set_adsp_spin_angle(aw_dev, > + g_spin_angle); > + if (ret < 0) > + return ret; > + } > + } > + > + return ret; > +} > + > +static int aw_set_channal_mode(struct aw_device *aw_pa, channel > + uint32_t spin_angle) > +{ > + int ret; > + struct aw_chansel_desc *chansel_desc = &aw_pa->chansel_desc; > + struct aw_spin_ch *spin_ch = &aw_pa->spin_desc.spin_table[spin_angle]; > + > + ret = aw_pa->ops.aw_reg_write_bits(aw_pa, chansel_desc->rxchan_reg, > + chansel_desc->rxchan_mask, spin_ch->rx_val); this looks like regmap should be used... Answer: I will fix this problem in patch v3. > + if (ret < 0) { > + aw_dev_err(aw_pa->dev, "set rx failed"); > + return ret; > + } > + > + ret = aw_pa->ops.aw_reg_write_bits(aw_pa, chansel_desc->txchan_reg, > + chansel_desc->txchan_mask, spin_ch->tx_val); > + if (ret < 0) { > + aw_dev_err(aw_pa->dev, "set tx failed"); > + return ret; > + } > + > + aw_dev_dbg(aw_pa->dev, "set channel mode done!"); > + > + return 0; > +} > + > +static int aw_set_reg_spin_angle(struct aw883xx *aw883xx, uint32_t spin_angle) what do spin and spin_angle refer to? Answer: I'm going to delete that part in patch v3. > +{ > + struct list_head *pos = NULL; > + struct list_head *dev_list = NULL; > + struct aw_device *local_pa = NULL; > + int ret; > + > + if (spin_angle >= ARRAY_SIZE(aw_spin)) { > + aw_dev_err(aw883xx->dev, "spin_angle:%d not support", > + spin_angle); > + return -EINVAL; > + } > + > + ret = aw883xx_dev_get_list_head(&dev_list); > + if (ret) { > + aw_dev_err(aw883xx->dev, "get dev list failed"); > + return ret; > + } > + > + list_for_each(pos, dev_list) { > + local_pa = container_of(pos, struct aw_device, list_node); > + ret = aw_set_channal_mode(local_pa, spin_angle); > + if (ret < 0) { > + aw_dev_err(aw883xx->dev, "set channal mode failed"); > + return ret; > + } > + } > + > + return 0; > +} > + > +static int aw_set_reg_mixer_spin_angle(struct aw883xx *aw883xx, uint32_t spin_angle) > +{ > + int ret; > + > + if (spin_angle >= ARRAY_SIZE(aw_spin)) { > + aw_dev_err(aw883xx->dev, "spin_angle:%d not support", > + spin_angle); > + return -EINVAL; > + } > + > + ret = aw_set_mixer_en(aw883xx->aw_pa, AW_AUDIO_MIX_ENABLE); > + if (ret) > + return ret; > + > + usleep_range(AW_100000_US, AW_100000_US + 10); > + > + aw_set_reg_spin_angle(aw883xx, spin_angle); > + > + ret = aw_set_mixer_en(aw883xx->aw_pa, AW_AUDIO_MIX_DISABLE); > + if (ret) > + return ret; > + > + return ret; > +} > + > +static void aw_get_reg_spin_angle(uint32_t *spin_angle) > +{ > + *spin_angle = g_spin_angle; > + > + pr_debug("%s: get spin:%s\n", __func__, aw_spin[g_spin_angle]); > +} > + > +static int aw_set_spin_angle(struct aw883xx *aw883xx, uint32_t spin_angle) > +{ > + switch (g_spin_mode) { > + case AW_REG_SPIN_MODE: > + return aw_set_reg_spin_angle(aw883xx, spin_angle); > + case AW_ADSP_SPIN_MODE: > + return aw_set_adsp_spin_angle(aw883xx->aw_pa, spin_angle); > + case AW_REG_MIXER_SPIN_MODE: > + return aw_set_reg_mixer_spin_angle(aw883xx, spin_angle); > + default: > + aw_pr_err("unsupported spin mode:%d", g_spin_mode); > + return -EINVAL; > + } > +} > + > +static void aw_set_spin_mode(int mode) > +{ > + g_spin_mode = mode; > +} > + > +static int aw_set_spin(struct snd_kcontrol *kcontrol, > + struct snd_ctl_elem_value *ucontrol) > +{ > + struct aw883xx *aw883xx = (struct aw883xx *)kcontrol->private_value; > + uint32_t ctrl_value; > + int ret; > + > + aw_dev_dbg(aw883xx->dev, "ucontrol->value.integer.value[0]=%ld", > + ucontrol->value.integer.value[0]); > + > + if (aw883xx->spin_flag == AW_SPIN_OFF) { > + aw_dev_dbg(aw883xx->dev, "spin func not enable"); > + return 0; > + } > + > + ctrl_value = (uint32_t)ucontrol->value.integer.value[0]; > + > + mutex_lock(&g_aw_spin_lock); > + if (aw883xx->pstream == AW883XX_STREAM_OPEN) { > + ret = aw_set_spin_angle(aw883xx, ctrl_value); > + if (ret < 0) > + aw_dev_err(aw883xx->dev, "set spin error, ret=%d\n", > + ret); > + } else { > + if ((g_spin_mode == AW_REG_SPIN_MODE) || (g_spin_mode == AW_REG_MIXER_SPIN_MODE)) > + aw_set_reg_spin_angle(aw883xx, ctrl_value); > + else > + aw_dev_info(aw883xx->dev, "stream no start only record spin angle"); > + } > + g_spin_angle = ctrl_value; > + mutex_unlock(&g_aw_spin_lock); > + > + return 0; > +} > + > +static void aw_get_spin_angle(uint32_t *spin_angle) > +{ > + if ((g_spin_mode == AW_REG_SPIN_MODE) || (g_spin_mode == AW_REG_MIXER_SPIN_MODE)) > + aw_get_reg_spin_angle(spin_angle); > + else if (g_spin_mode == AW_ADSP_SPIN_MODE) > + aw_get_adsp_spin_angle(spin_angle); > +} > + > +static int aw_get_spin(struct snd_kcontrol *kcontrol, > + struct snd_ctl_elem_value *ucontrol) > +{ > + struct aw883xx *aw883xx = (struct aw883xx *)kcontrol->private_value; > + uint32_t ctrl_value = 0; > + > + mutex_lock(&g_aw_spin_lock); > + if (aw883xx->pstream == AW883XX_STREAM_OPEN) { > + aw_get_spin_angle(&ctrl_value); > + ucontrol->value.integer.value[0] = ctrl_value; > + } else { > + ucontrol->value.integer.value[0] = g_spin_angle; > + aw_dev_dbg(aw883xx->dev, "no stream, use record value"); > + } > + mutex_unlock(&g_aw_spin_lock); > + > + return 0; > +} > + > +static int aw_spin_info(struct snd_kcontrol *kcontrol, > + struct snd_ctl_elem_info *uinfo) > +{ > + struct aw883xx *aw883xx = (struct aw883xx *)kcontrol->private_value; > + int count = 0; > + > + if (aw883xx == NULL) { > + aw_pr_err("get struct aw883xx failed"); > + return -EINVAL; > + } > + > + uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; > + uinfo->count = 1; > + count = ARRAY_SIZE(aw_spin); > + > + uinfo->value.enumerated.items = count; > + if (uinfo->value.enumerated.item >= count) > + uinfo->value.enumerated.item = count - 1; > + > + strscpy(uinfo->value.enumerated.name, > + aw_spin[uinfo->value.enumerated.item], > + strlen(aw_spin[uinfo->value.enumerated.item]) + 1); > + > + return 0; > +} > + > +static int aw_spin_control_create(struct aw883xx *aw883xx) > +{ > + int kcontrol_num = 1; > + struct snd_kcontrol_new *aw_spin_control = NULL; > + char *kctl_name = NULL; > + > + aw_spin_control = devm_kzalloc(aw883xx->codec->dev, > + sizeof(struct snd_kcontrol_new) * 1, GFP_KERNEL); > + if (aw_spin_control == NULL) > + return -ENOMEM; > + > + kctl_name = devm_kzalloc(aw883xx->codec->dev, AW_NAME_BUF_MAX, GFP_KERNEL); > + if (kctl_name == NULL) > + return -ENOMEM; > + > + snprintf(kctl_name, AW_NAME_BUF_MAX, "aw_spin_switch"); > + > + aw_spin_control[0].name = kctl_name; > + aw_spin_control[0].iface = SNDRV_CTL_ELEM_IFACE_MIXER; > + aw_spin_control[0].info = aw_spin_info; > + aw_spin_control[0].get = aw_get_spin; > + aw_spin_control[0].put = aw_set_spin; > + aw_spin_control[0].private_value = (unsigned long)aw883xx; > + > + kctl_name = devm_kzalloc(aw883xx->codec->dev, AW_NAME_BUF_MAX, GFP_KERNEL); > + if (!kctl_name) > + return -ENOMEM; > + > + aw883xx->codec_ops->add_codec_controls(aw883xx->codec, > + aw_spin_control, kcontrol_num); > + > + return 0; > +} > + > +void aw883xx_add_spin_controls(void *aw_dev) > +{ > + struct aw883xx *aw883xx = (struct aw883xx *)aw_dev; > + > + if (aw883xx->aw_pa->spin_desc.spin_mode != AW_SPIN_OFF_MODE) > + aw_spin_control_create(aw883xx); > +} > + > +static int aw_parse_spin_table_dt(struct aw_device *aw_dev, > + struct device_node *np) > +{ > + int ret = -1; > + const char *str_data = NULL; > + char spin_table_str[AW_SPIN_MAX] = { 0 }; > + int i, spin_count = 0; > + > + ret = of_property_read_string(np, "spin-data", &str_data); > + if (ret < 0) { > + aw_dev_err(aw_dev->dev, "get spin_data failed, close spin function"); > + return ret; > + } > + > + ret = sscanf(str_data, "%c %c %c %c", > + &spin_table_str[AW_SPIN_0], &spin_table_str[AW_SPIN_90], > + &spin_table_str[AW_SPIN_180], &spin_table_str[AW_SPIN_270]); > + if (ret != AW_SPIN_MAX) { > + aw_dev_err(aw_dev->dev, "unsupported str:%s, close spin function", > + str_data); > + return -EINVAL; > + } > + > + for (i = 0; i < AW_SPIN_MAX; i++) { > + if (spin_table_str[i] == 'l' || spin_table_str[i] == 'L') { > + aw_dev->spin_desc.spin_table[i].rx_val = aw_dev->chansel_desc.rx_left; > + aw_dev->spin_desc.spin_table[i].tx_val = aw_dev->chansel_desc.tx_left; > + spin_count++; > + } else if (spin_table_str[i] == 'r' || spin_table_str[i] == 'R') { > + aw_dev->spin_desc.spin_table[i].rx_val = aw_dev->chansel_desc.rx_right; > + aw_dev->spin_desc.spin_table[i].tx_val = aw_dev->chansel_desc.tx_right; > + spin_count++; > + } else { > + aw_dev_err(aw_dev->dev, "unsupported str:%s, close spin function", > + str_data); > + return -EINVAL; > + } > + } > + > + if (spin_count != ARRAY_SIZE(aw_spin)) { > + aw_dev_err(aw_dev->dev, "get spin_data failed, spin_count:%d", spin_count); > + return -EINVAL; > + } > + > + return 0; > +} > + > +static void aw_parse_topo_id_dt(struct aw_device *aw_dev) > +{ > + int ret; > + > + ret = of_property_read_u32(aw_dev->dev->of_node, "aw-rx-topo-id", &g_rx_topo_id); > + if (ret < 0) { > + g_rx_topo_id = AW_RX_TOPO_ID; > + aw_dev_info(aw_dev->dev, "read aw-rx-topo-id failed,use default"); > + } > + > + aw_dev_info(aw_dev->dev, "rx-topo-id: 0x%x", g_rx_topo_id); > +} > + > +static void aw_parse_port_id_dt(struct aw_device *aw_dev) > +{ > + int ret; > + > + ret = of_property_read_u32(aw_dev->dev->of_node, "aw-rx-port-id", &g_rx_port_id); > + if (ret < 0) { > + g_rx_port_id = AW_RX_PORT_ID; > + aw_dev_info(aw_dev->dev, "read aw-rx-port-id failed,use default"); > + } > + > + aw_set_port_id(0, g_rx_port_id); > + aw_dev_info(aw_dev->dev, "rx-port-id: 0x%x", > + g_rx_port_id); > +} > + > +static int aw_parse_spin_mode_dt(struct aw_device *aw_dev) what does 'spin' refer to? Answer: I'm going to delete that part in patch v3. > +{ > + int ret = -1; > + const char *spin_mode = NULL; > + int mode; > + struct device_node *np = aw_dev->dev->of_node; > + > + ret = of_property_read_string(np, "spin-mode", &spin_mode); > + if (ret < 0) { > + aw_dev_info(aw_dev->dev, > + "spin-mode get failed, spin switch off"); > + aw_dev->spin_desc.spin_mode = AW_SPIN_OFF_MODE; > + return 0; > + } > + > + if (!strcmp(spin_mode, "dsp_spin")) > + mode = AW_ADSP_SPIN_MODE; > + else if (!strcmp(spin_mode, "reg_spin")) > + mode = AW_REG_SPIN_MODE; > + else if (!strcmp(spin_mode, "reg_mixer_spin")) > + mode = AW_REG_MIXER_SPIN_MODE; > + else > + mode = AW_SPIN_OFF_MODE; > + > + aw_dev->spin_desc.spin_mode = mode; > + > + aw_set_spin_mode(mode); > + > + if ((mode == AW_REG_SPIN_MODE) || (mode == AW_REG_MIXER_SPIN_MODE)) { > + ret = aw_parse_spin_table_dt(aw_dev, np); > + if (ret < 0) { > + aw_dev->spin_desc.spin_mode = AW_SPIN_OFF_MODE; > + aw_dev_err(aw_dev->dev, > + "spin-table get failed, ret = %d", ret); > + return ret; > + } > + } > + > + aw_dev_info(aw_dev->dev, "spin mode is %d", mode); > + > + return 0; > +} > + > +void aw883xx_spin_init(struct aw_spin_desc *spin_desc) > +{ > + struct aw_device *aw_dev = container_of(spin_desc, > + struct aw_device, spin_desc); > + > + aw_parse_spin_mode_dt(aw_dev); > + aw_parse_topo_id_dt(aw_dev); > + aw_parse_port_id_dt(aw_dev); > +} > + > diff --git a/sound/soc/codecs/aw883xx/aw883xx_spin.h b/sound/soc/codecs/aw883xx/aw883xx_spin.h > new file mode 100644 > index 0000000..cb5dc39 > --- /dev/null > +++ b/sound/soc/codecs/aw883xx/aw883xx_spin.h > @@ -0,0 +1,80 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +/* > + * aw883xx.c -- ALSA Soc AW883XX codec support > + * > + * Copyright (c) 2020 AWINIC Technology CO., LTD 2022? Answer: I will fix this problem in patch v3. Best regards, Weidong Wang

1 0

Draft: Add Arturia Minifuse 1 Support
by GitHub pull_request - edited 17 Oct '22

17 Oct '22

alsa-project/alsa-ucm-conf pull request #226 was edited from nodens: Arturia Minifuse 1 is a stripped-down version of Minifuse 2: - 1 Input - 2 Outputs - Loopback interface to ease recording of the computer output (attempt at fixing #220) Request URL : https://github.com/alsa-project/alsa-ucm-conf/pull/226 Patch URL : https://github.com/alsa-project/alsa-ucm-conf/pull/226.patch Repository URL: https://github.com/alsa-project/alsa-ucm-conf

1 0

[PATCH 6/6] ASoC: Intel: boards: add missing dependency from realtek-common
by Adam Borowski 17 Oct '22

17 Oct '22

These boards use code from sound/soc/sof/sof-audio.c Fixes: e1d5e13324020c4b405e63cae34560c7992bec2e Signed-off-by: Adam Borowski <kilobyte(a)angband.pl> --- sound/soc/intel/boards/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/soc/intel/boards/Kconfig b/sound/soc/intel/boards/Kconfig index aa12d7e3dd2f..3179ba061d87 100644 --- a/sound/soc/intel/boards/Kconfig +++ b/sound/soc/intel/boards/Kconfig @@ -34,6 +34,7 @@ config SND_SOC_INTEL_SOF_MAXIM_COMMON config SND_SOC_INTEL_SOF_REALTEK_COMMON tristate + depends on SND_SOC_SOF config SND_SOC_INTEL_SOF_CIRRUS_COMMON tristate -- 2.37.2.609.g9ff673ca1a

1 0

[RESEND] dt-bindings: soundwire: Convert text file to yaml format
by Srinivasa Rao Mandadapu 17 Oct '22

17 Oct '22

Update soundwire bindings with yaml formats. Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam(a)quicinc.com> Co-developed-by: Ratna Deepthi Kudaravalli <quic_rkudarav(a)quicinc.com> Signed-off-by: Ratna Deepthi Kudaravalli <quic_rkudarav(a)quicinc.com> --- .../devicetree/bindings/soundwire/qcom,sdw.txt | 214 --------------------- .../devicetree/bindings/soundwire/qcom,sdw.yaml | 185 ++++++++++++++++++ 2 files changed, 185 insertions(+), 214 deletions(-) delete mode 100644 Documentation/devicetree/bindings/soundwire/qcom,sdw.txt create mode 100644 Documentation/devicetree/bindings/soundwire/qcom,sdw.yaml diff --git a/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt b/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt deleted file mode 100644 index c85c257..0000000 --- a/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt +++ /dev/null @@ -1,214 +0,0 @@ -Qualcomm SoundWire Controller Bindings - - -This binding describes the Qualcomm SoundWire Controller along with its -board specific bus parameters. - -- compatible: - Usage: required - Value type: <stringlist> - Definition: must be "qcom,soundwire-v<MAJOR>.<MINOR>.<STEP>", - Example: - "qcom,soundwire-v1.3.0" - "qcom,soundwire-v1.5.0" - "qcom,soundwire-v1.5.1" - "qcom,soundwire-v1.6.0" -- reg: - Usage: required - Value type: <prop-encoded-array> - Definition: the base address and size of SoundWire controller - address space. - -- interrupts: - Usage: required - Value type: <prop-encoded-array> - Definition: should specify the SoundWire Controller core and optional - wake IRQ - -- interrupt-names: - Usage: Optional - Value type: boolean - Value type: <stringlist> - Definition: should be "core" for core and "wakeup" for wake interrupt. - -- wakeup-source: - Usage: Optional - Value type: boolean - Definition: should specify if SoundWire Controller is wake up capable. - -- clock-names: - Usage: required - Value type: <stringlist> - Definition: should be "iface" for SoundWire Controller interface clock - -- clocks: - Usage: required - Value type: <prop-encoded-array> - Definition: should specify the SoundWire Controller interface clock - -- #sound-dai-cells: - Usage: required - Value type: <u32> - Definition: must be 1 for digital audio interfaces on the controller. - -- qcom,dout-ports: - Usage: required - Value type: <u32> - Definition: must be count of data out ports - -- qcom,din-ports: - Usage: required - Value type: <u32> - Definition: must be count of data in ports - -- qcom,ports-offset1: - Usage: required - Value type: <prop-encoded-array> - Definition: should specify payload transport window offset1 of each - data port. Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-offset2: - Usage: required - Value type: <prop-encoded-array> - Definition: should specify payload transport window offset2 of each - data port. Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-sinterval-low: - Usage: required - Value type: <prop-encoded-array> - Definition: should be sample interval low of each data port. - Out ports followed by In ports. Used for Sample Interval - calculation. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-word-length: - Usage: optional - Value type: <prop-encoded-array> - Definition: should be size of payload channel sample. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-block-pack-mode: - Usage: optional - Value type: <prop-encoded-array> - Definition: should be 0 or 1 to indicate the block packing mode. - 0 to indicate Blocks are per Channel - 1 to indicate Blocks are per Port. - Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-block-group-count: - Usage: optional - Value type: <prop-encoded-array> - Definition: should be in range 1 to 4 to indicate how many sample - intervals are combined into a payload. - Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-lane-control: - Usage: optional - Value type: <prop-encoded-array> - Definition: should be in range 0 to 7 to identify which data lane - the data port uses. - Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-hstart: - Usage: optional - Value type: <prop-encoded-array> - Definition: should be number identifying lowerst numbered coloum in - SoundWire Frame, i.e. left edge of the Transport sub-frame - for each port. Values between 0 and 15 are valid. - Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-hstop: - Usage: optional - Value type: <prop-encoded-array> - Definition: should be number identifying highest numbered coloum in - SoundWire Frame, i.e. the right edge of the Transport - sub-frame for each port. Values between 0 and 15 are valid. - Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,dports-type: - Usage: optional - Value type: <prop-encoded-array> - Definition: should be one of the following types - 0 for reduced port - 1 for simple ports - 2 for full port - Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- reset: - Usage: optional - Value type: <prop-encoded-array> - Definition: Should specify the SoundWire audio CSR reset controller interface, - which is required for SoundWire version 1.6.0 and above. - -- reset-names: - Usage: optional - Value type: <stringlist> - Definition: should be "swr_audio_cgcr" for SoundWire audio CSR reset - controller interface. - -Note: - More Information on detail of encoding of these fields can be -found in MIPI Alliance SoundWire 1.0 Specifications. - -= SoundWire devices -Each subnode of the bus represents SoundWire device attached to it. -The properties of these nodes are defined by the individual bindings. - -= EXAMPLE -The following example represents a SoundWire controller on DB845c board -which has controller integrated inside WCD934x codec on SDM845 SoC. - -soundwire: soundwire@c85 { - compatible = "qcom,soundwire-v1.3.0"; - reg = <0xc85 0x20>; - interrupts = <20 IRQ_TYPE_EDGE_RISING>; - clocks = <&wcc>; - clock-names = "iface"; - resets = <&lpass_audiocc LPASS_AUDIO_SWR_TX_CGCR>; - reset-names = "swr_audio_cgcr"; - #sound-dai-cells = <1>; - qcom,dports-type = <0>; - qcom,dout-ports = <6>; - qcom,din-ports = <2>; - qcom,ports-sinterval-low = /bits/ 8 <0x07 0x1F 0x3F 0x7 0x1F 0x3F 0x0F 0x0F>; - qcom,ports-offset1 = /bits/ 8 <0x01 0x02 0x0C 0x6 0x12 0x0D 0x07 0x0A >; - qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x1F 0x00 0x00 0x1F 0x00 0x00>; - - /* Left Speaker */ - left{ - .... - }; - - /* Right Speaker */ - right{ - .... - }; -}; diff --git a/Documentation/devicetree/bindings/soundwire/qcom,sdw.yaml b/Documentation/devicetree/bindings/soundwire/qcom,sdw.yaml new file mode 100644 index 0000000..bf8f6c1 --- /dev/null +++ b/Documentation/devicetree/bindings/soundwire/qcom,sdw.yaml @@ -0,0 +1,185 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soundwire/qcom,sdw.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SoundWire Controller + +maintainers: + - Srinivas Kandagatla <srinivas.kandagatla(a)linaro.org> + - Srinivasa Rao Mandadapu <quic_srivasam(a)quicinc.com> + +description: + This binding describes the Qualcomm SoundWire controller along with its + board specific bus parameters. + +properties: + compatible: + enum: + - qcom,soundwire-v1.3.0 + - qcom,soundwire-v1.5.0 + - qcom,soundwire-v1.5.1 + - qcom,soundwire-v1.6.0 + + reg: + items: + - description: the base address and size of SoundWire controller + address space. + + interrupts: + items: + - description: specify the SoundWire controller core and optional + wake IRQ. + + interrupt-names: + items: + - const: wakeup + + clocks: + items: + - description: iface clock + + clock-names: + items: + - const: iface + + resets: + items: + - description: SWR_AUDIO_CGCR RESET + + reset-names: + items: + - const: swr_audio_cgcr + + '#sound-dai-cells': + const: 1 + + '#address-cells': + const: 2 + + '#size-cells': + const: 0 + + qcom,din-ports: + $ref: /schemas/types.yaml#/definitions/uint32 + description: count of data in ports + + qcom,dout-ports: + $ref: /schemas/types.yaml#/definitions/uint32 + description: count of data out ports + + qcom,ports-word-length: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: size of payload channel sample. + minItems: 5 + maxItems: 5 + + qcom,ports-sinterval-low: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: sample interval low of each data port. + minItems: 5 + maxItems: 5 + + qcom,ports-offset1: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: payload transport window offset1 of each data port. + minItems: 5 + maxItems: 5 + + qcom,ports-offset2: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: payload transport window offset2 of each data port. + minItems: 5 + maxItems: 5 + + qcom,ports-lane-control: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: identify which data lane the data port uses. + minItems: 5 + maxItems: 5 + + qcom,ports-block-pack-mode: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: indicate the block packing mode. + minItems: 5 + maxItems: 5 + + qcom,ports-hstart: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: identifying lowerst numbered coloum in SoundWire frame. + minItems: 5 + maxItems: 5 + + qcom,ports-hstop: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: identifying highest numbered coloum in SoundWire frame. + minItems: 5 + maxItems: 5 + + qcom,ports-block-group-count: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: indicate how many sample intervals are combined into a payload. + minItems: 5 + maxItems: 5 + +required: + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + - resets + - reset-names + - '#sound-dai-cells' + - '#address-cells' + - '#size-cells' + - qcom,dout-ports + - qcom,din-ports + - qcom,ports-word-length + - qcom,ports-sinterval-low + - qcom,ports-offset1 + - qcom,ports-offset2 + - qcom,ports-lane-control + - qcom,ports-block-pack-mode + - qcom,ports-hstart + - qcom,ports-block-group-count + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h> + + soundwire@3210000 { + compatible = "qcom,soundwire-v1.6.0"; + reg = <0x03210000 0x2000>; + + interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&lpass_rx_macro>; + clock-names = "iface"; + + qcom,din-ports = <0>; + qcom,dout-ports = <5>; + + resets = <&lpass_audiocc LPASS_AUDIO_SWR_RX_CGCR>; + reset-names = "swr_audio_cgcr"; + + qcom,ports-word-length = /bits/ 8 <0x01 0x07 0x04 0xff 0xff>; + qcom,ports-sinterval-low = /bits/ 8 <0x03 0x3f 0x1f 0x03 0x03>; + qcom,ports-offset1 = /bits/ 8 <0x00 0x00 0x0b 0x01 0x01>; + qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x0b 0x00 0x00>; + qcom,ports-lane-control = /bits/ 8 <0x01 0x00 0x00 0x00 0x00>; + qcom,ports-block-pack-mode = /bits/ 8 <0xff 0x00 0x01 0xff 0xff>; + qcom,ports-hstart = /bits/ 8 <0xff 0x03 0xff 0xff 0xff>; + qcom,ports-hstop = /bits/ 8 <0xff 0x06 0xff 0xff 0xff>; + qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0x00>; + + #sound-dai-cells = <1>; + #address-cells = <2>; + #size-cells = <0>; + + status = "disabled"; + }; -- 2.7.4

3 2

Re: [syzbot] INFO: rcu detected stall in batadv_nc_worker (3)
by syzbot 16 Oct '22

16 Oct '22

syzbot has bisected this issue to: commit f8a4018c826fde6137425bbdbe524d5973feb173 Author: Mark Brown <broonie(a)kernel.org> Date: Thu Jun 2 13:53:04 2022 +0000 ASoC: tas2770: Use modern ASoC DAI format terminology bisection log: https://syzkaller.appspot.com/x/bisect.txt?x=164d4978880000 start commit: 55be6084c8e0 Merge tag 'timers-core-2022-10-05' of git://g.. git tree: upstream final oops: https://syzkaller.appspot.com/x/report.txt?x=154d4978880000 console output: https://syzkaller.appspot.com/x/log.txt?x=114d4978880000 kernel config: https://syzkaller.appspot.com/x/.config?x=df75278aabf0681a dashboard link: https://syzkaller.appspot.com/bug?extid=69904c3b4a09e8fa2e1b syz repro: https://syzkaller.appspot.com/x/repro.syz?x=16e2e478880000 C reproducer: https://syzkaller.appspot.com/x/repro.c?x=149ca17c880000 Reported-by: syzbot+69904c3b4a09e8fa2e1b(a)syzkaller.appspotmail.com Fixes: f8a4018c826f ("ASoC: tas2770: Use modern ASoC DAI format terminology") For information about bisection process see: https://goo.gl/tpsmEJ#bisection

1 0

Regression in Linux Kernel v5.15.71 / external headset microphone stops working
by Jan Henke 16 Oct '22

16 Oct '22

Hello sound system maintainers, a recent patch to the stable 5.15 linux branch unfortunately introduced a regression. From 5.15.71 onward (also in 5.19.15) plugging in an external headset into the audio jack no longer results in a working microphone. Symptoms are that there is no choice to set the connected device to microphone only (I am using GNOME, so once you plugin a device you get a dialogue to choose it's type, normally there are 3 choices, Headphone, Headset and Microphone, with the bug the last one is missing), and the connected microphone no longer records any audio. Note that you can still choose the headset microphone as audio input, it just does not record anything. Doing a git bisect I was able to identify the commit introducing this regression: a963fe6d0eb6ef0a15b3aade7c186cd5bb7bd01f is the first bad commit commit a963fe6d0eb6ef0a15b3aade7c186cd5bb7bd01f Author: Callum Osmotherly <callum.osmotherly(a)gmail.com> Date: Thu Sep 15 22:36:08 2022 +0930 ALSA: hda/realtek: Enable 4-speaker output Dell Precision 5530 laptop commit 1885ff13d4c42910b37a0e3f7c2f182520f4eed1 upstream. Just as with the 5570 (and the other Dell laptops), this enables the two subwoofer speakers on the Dell Precision 5530 together with the main ones, significantly increasing the audio quality. I've tested this myself on a 5530 and can confirm it's working as expected. Signed-off-by: Callum Osmotherly <callum.osmotherly(a)gmail.com> Cc: <stable(a)vger.kernel.org> Link:https://lore.kernel.org/r/YyMjQO3mhyXlMbCf@piranha Signed-off-by: Takashi Iwai <tiwai(a)suse.de> Signed-off-by: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> sound/pci/hda/patch_realtek.c | 1 + 1 file changed, 1 insertion(+) Which makes sense, since I noticed this regression on a Dell Precision 5530 laptop. Downstream bug report: https://bugs.gentoo.org/876843 Please revert this commit to restore the previous working condition on all affected branches, since an external headset is a very common use case with these kinds of laptops. There were similar commits for different laptop models, but I do not have any of these models, so I cannot say if they cause a similar regression. Best regards, Jan Henke

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[PATCH 0/2] sound: dice: Firestudio Mobile
by George Hilliard 16 Oct '22

16 Oct '22

This short series adds a configuration block for the Firestudio Mobile I just acquired. Very similar to the Firestudio, but a lower port count. My understanding is that the Low, Medium, and High speeds refer to 48kHz, 96kHz, and 192kHz sample rates, of which only the first two are supported by this hardware line. Please correct me if this is not correct. Thanks!

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[PATCH v2] ASoC: qcom: lpass-cpu: mark HDMI TX registers as volatile
by Srinivasa Rao Mandadapu 15 Oct '22

15 Oct '22

Update HDMI volatile registers list as DMA, Channel Selection registers, vbit control registers are being reflected by hardware DP port disconnection. This update is required to fix no display and no sound issue observed after reconnecting TAMA/SANWA DP cables. Once DP cable is unplugged, DMA control registers are being reset by hardware, however at second plugin, new dma control values does not updated to the dma hardware registers since new register value and cached values at the time of first plugin are same. Fixes: 7cb37b7bd0d3 ("ASoC: qcom: Add support for lpass hdmi driver") Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam(a)quicinc.com> Reported-by: Kuogee Hsieh <quic_khsieh(a)quicinc.com> --- sound/soc/qcom/lpass-cpu.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/sound/soc/qcom/lpass-cpu.c b/sound/soc/qcom/lpass-cpu.c index 8a56f38..99a3b44 100644 --- a/sound/soc/qcom/lpass-cpu.c +++ b/sound/soc/qcom/lpass-cpu.c @@ -782,10 +782,18 @@ static bool lpass_hdmi_regmap_volatile(struct device *dev, unsigned int reg) return true; if (reg == LPASS_HDMI_TX_LEGACY_ADDR(v)) return true; + if (reg == LPASS_HDMI_TX_VBIT_CTL_ADDR(v)) + return true; for (i = 0; i < v->hdmi_rdma_channels; ++i) { if (reg == LPAIF_HDMI_RDMACURR_REG(v, i)) return true; + if (reg == LPASS_HDMI_TX_DMA_ADDR(v, i)) + return true; + if (reg == LPASS_HDMI_TX_CH_LSB_ADDR(v, i)) + return true; + if (reg == LPASS_HDMI_TX_CH_MSB_ADDR(v, i)) + return true; } return false; } -- 2.7.4

3 3

[RESEND] dt-bindings: soundwire: Convert text file to yaml format
by Srinivasa Rao Mandadapu 15 Oct '22

15 Oct '22

Update soundwire bindings with yaml formats. Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam(a)quicinc.com> Co-developed-by: Ratna Deepthi Kudaravalli <quic_rkudarv(a)quicinc.com> Signed-off-by: Ratna Deepthi Kudaravalli <quic_rkudarv(a)quicinc.com> --- .../devicetree/bindings/soundwire/qcom,sdw.txt | 214 --------------------- .../devicetree/bindings/soundwire/qcom,sdw.yaml | 185 ++++++++++++++++++ 2 files changed, 185 insertions(+), 214 deletions(-) delete mode 100644 Documentation/devicetree/bindings/soundwire/qcom,sdw.txt create mode 100644 Documentation/devicetree/bindings/soundwire/qcom,sdw.yaml diff --git a/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt b/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt deleted file mode 100644 index c85c257..0000000 --- a/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt +++ /dev/null @@ -1,214 +0,0 @@ -Qualcomm SoundWire Controller Bindings - - -This binding describes the Qualcomm SoundWire Controller along with its -board specific bus parameters. - -- compatible: - Usage: required - Value type: <stringlist> - Definition: must be "qcom,soundwire-v<MAJOR>.<MINOR>.<STEP>", - Example: - "qcom,soundwire-v1.3.0" - "qcom,soundwire-v1.5.0" - "qcom,soundwire-v1.5.1" - "qcom,soundwire-v1.6.0" -- reg: - Usage: required - Value type: <prop-encoded-array> - Definition: the base address and size of SoundWire controller - address space. - -- interrupts: - Usage: required - Value type: <prop-encoded-array> - Definition: should specify the SoundWire Controller core and optional - wake IRQ - -- interrupt-names: - Usage: Optional - Value type: boolean - Value type: <stringlist> - Definition: should be "core" for core and "wakeup" for wake interrupt. - -- wakeup-source: - Usage: Optional - Value type: boolean - Definition: should specify if SoundWire Controller is wake up capable. - -- clock-names: - Usage: required - Value type: <stringlist> - Definition: should be "iface" for SoundWire Controller interface clock - -- clocks: - Usage: required - Value type: <prop-encoded-array> - Definition: should specify the SoundWire Controller interface clock - -- #sound-dai-cells: - Usage: required - Value type: <u32> - Definition: must be 1 for digital audio interfaces on the controller. - -- qcom,dout-ports: - Usage: required - Value type: <u32> - Definition: must be count of data out ports - -- qcom,din-ports: - Usage: required - Value type: <u32> - Definition: must be count of data in ports - -- qcom,ports-offset1: - Usage: required - Value type: <prop-encoded-array> - Definition: should specify payload transport window offset1 of each - data port. Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-offset2: - Usage: required - Value type: <prop-encoded-array> - Definition: should specify payload transport window offset2 of each - data port. Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-sinterval-low: - Usage: required - Value type: <prop-encoded-array> - Definition: should be sample interval low of each data port. - Out ports followed by In ports. Used for Sample Interval - calculation. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-word-length: - Usage: optional - Value type: <prop-encoded-array> - Definition: should be size of payload channel sample. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-block-pack-mode: - Usage: optional - Value type: <prop-encoded-array> - Definition: should be 0 or 1 to indicate the block packing mode. - 0 to indicate Blocks are per Channel - 1 to indicate Blocks are per Port. - Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-block-group-count: - Usage: optional - Value type: <prop-encoded-array> - Definition: should be in range 1 to 4 to indicate how many sample - intervals are combined into a payload. - Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-lane-control: - Usage: optional - Value type: <prop-encoded-array> - Definition: should be in range 0 to 7 to identify which data lane - the data port uses. - Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-hstart: - Usage: optional - Value type: <prop-encoded-array> - Definition: should be number identifying lowerst numbered coloum in - SoundWire Frame, i.e. left edge of the Transport sub-frame - for each port. Values between 0 and 15 are valid. - Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-hstop: - Usage: optional - Value type: <prop-encoded-array> - Definition: should be number identifying highest numbered coloum in - SoundWire Frame, i.e. the right edge of the Transport - sub-frame for each port. Values between 0 and 15 are valid. - Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,dports-type: - Usage: optional - Value type: <prop-encoded-array> - Definition: should be one of the following types - 0 for reduced port - 1 for simple ports - 2 for full port - Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- reset: - Usage: optional - Value type: <prop-encoded-array> - Definition: Should specify the SoundWire audio CSR reset controller interface, - which is required for SoundWire version 1.6.0 and above. - -- reset-names: - Usage: optional - Value type: <stringlist> - Definition: should be "swr_audio_cgcr" for SoundWire audio CSR reset - controller interface. - -Note: - More Information on detail of encoding of these fields can be -found in MIPI Alliance SoundWire 1.0 Specifications. - -= SoundWire devices -Each subnode of the bus represents SoundWire device attached to it. -The properties of these nodes are defined by the individual bindings. - -= EXAMPLE -The following example represents a SoundWire controller on DB845c board -which has controller integrated inside WCD934x codec on SDM845 SoC. - -soundwire: soundwire@c85 { - compatible = "qcom,soundwire-v1.3.0"; - reg = <0xc85 0x20>; - interrupts = <20 IRQ_TYPE_EDGE_RISING>; - clocks = <&wcc>; - clock-names = "iface"; - resets = <&lpass_audiocc LPASS_AUDIO_SWR_TX_CGCR>; - reset-names = "swr_audio_cgcr"; - #sound-dai-cells = <1>; - qcom,dports-type = <0>; - qcom,dout-ports = <6>; - qcom,din-ports = <2>; - qcom,ports-sinterval-low = /bits/ 8 <0x07 0x1F 0x3F 0x7 0x1F 0x3F 0x0F 0x0F>; - qcom,ports-offset1 = /bits/ 8 <0x01 0x02 0x0C 0x6 0x12 0x0D 0x07 0x0A >; - qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x1F 0x00 0x00 0x1F 0x00 0x00>; - - /* Left Speaker */ - left{ - .... - }; - - /* Right Speaker */ - right{ - .... - }; -}; diff --git a/Documentation/devicetree/bindings/soundwire/qcom,sdw.yaml b/Documentation/devicetree/bindings/soundwire/qcom,sdw.yaml new file mode 100644 index 0000000..bf8f6c1 --- /dev/null +++ b/Documentation/devicetree/bindings/soundwire/qcom,sdw.yaml @@ -0,0 +1,185 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soundwire/qcom,sdw.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SoundWire Controller + +maintainers: + - Srinivas Kandagatla <srinivas.kandagatla(a)linaro.org> + - Srinivasa Rao Mandadapu <quic_srivasam(a)quicinc.com> + +description: + This binding describes the Qualcomm SoundWire controller along with its + board specific bus parameters. + +properties: + compatible: + enum: + - qcom,soundwire-v1.3.0 + - qcom,soundwire-v1.5.0 + - qcom,soundwire-v1.5.1 + - qcom,soundwire-v1.6.0 + + reg: + items: + - description: the base address and size of SoundWire controller + address space. + + interrupts: + items: + - description: specify the SoundWire controller core and optional + wake IRQ. + + interrupt-names: + items: + - const: wakeup + + clocks: + items: + - description: iface clock + + clock-names: + items: + - const: iface + + resets: + items: + - description: SWR_AUDIO_CGCR RESET + + reset-names: + items: + - const: swr_audio_cgcr + + '#sound-dai-cells': + const: 1 + + '#address-cells': + const: 2 + + '#size-cells': + const: 0 + + qcom,din-ports: + $ref: /schemas/types.yaml#/definitions/uint32 + description: count of data in ports + + qcom,dout-ports: + $ref: /schemas/types.yaml#/definitions/uint32 + description: count of data out ports + + qcom,ports-word-length: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: size of payload channel sample. + minItems: 5 + maxItems: 5 + + qcom,ports-sinterval-low: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: sample interval low of each data port. + minItems: 5 + maxItems: 5 + + qcom,ports-offset1: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: payload transport window offset1 of each data port. + minItems: 5 + maxItems: 5 + + qcom,ports-offset2: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: payload transport window offset2 of each data port. + minItems: 5 + maxItems: 5 + + qcom,ports-lane-control: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: identify which data lane the data port uses. + minItems: 5 + maxItems: 5 + + qcom,ports-block-pack-mode: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: indicate the block packing mode. + minItems: 5 + maxItems: 5 + + qcom,ports-hstart: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: identifying lowerst numbered coloum in SoundWire frame. + minItems: 5 + maxItems: 5 + + qcom,ports-hstop: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: identifying highest numbered coloum in SoundWire frame. + minItems: 5 + maxItems: 5 + + qcom,ports-block-group-count: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: indicate how many sample intervals are combined into a payload. + minItems: 5 + maxItems: 5 + +required: + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + - resets + - reset-names + - '#sound-dai-cells' + - '#address-cells' + - '#size-cells' + - qcom,dout-ports + - qcom,din-ports + - qcom,ports-word-length + - qcom,ports-sinterval-low + - qcom,ports-offset1 + - qcom,ports-offset2 + - qcom,ports-lane-control + - qcom,ports-block-pack-mode + - qcom,ports-hstart + - qcom,ports-block-group-count + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h> + + soundwire@3210000 { + compatible = "qcom,soundwire-v1.6.0"; + reg = <0x03210000 0x2000>; + + interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&lpass_rx_macro>; + clock-names = "iface"; + + qcom,din-ports = <0>; + qcom,dout-ports = <5>; + + resets = <&lpass_audiocc LPASS_AUDIO_SWR_RX_CGCR>; + reset-names = "swr_audio_cgcr"; + + qcom,ports-word-length = /bits/ 8 <0x01 0x07 0x04 0xff 0xff>; + qcom,ports-sinterval-low = /bits/ 8 <0x03 0x3f 0x1f 0x03 0x03>; + qcom,ports-offset1 = /bits/ 8 <0x00 0x00 0x0b 0x01 0x01>; + qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x0b 0x00 0x00>; + qcom,ports-lane-control = /bits/ 8 <0x01 0x00 0x00 0x00 0x00>; + qcom,ports-block-pack-mode = /bits/ 8 <0xff 0x00 0x01 0xff 0xff>; + qcom,ports-hstart = /bits/ 8 <0xff 0x03 0xff 0xff 0xff>; + qcom,ports-hstop = /bits/ 8 <0xff 0x06 0xff 0xff 0xff>; + qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0x00>; + + #sound-dai-cells = <1>; + #address-cells = <2>; + #size-cells = <0>; + + status = "disabled"; + }; -- 2.7.4

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[PATCH] dt-bindings: soundwire: Convert text file to yaml format
by Srinivasa Rao Mandadapu 15 Oct '22

15 Oct '22

Update soundwire bindings with yaml formats. Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam(a)quicinc.com> Co-developed-by: Ratna Deepthi Kudaravalli <quic_rkudarv(a)quicinc.com> Signed-off-by: Ratna Deepthi Kudaravalli <quic_rkudarv(a)quicinc.com> --- .../devicetree/bindings/soundwire/qcom,sdw.txt | 214 --------------------- .../devicetree/bindings/soundwire/qcom,sdw.yaml | 185 ++++++++++++++++++ 2 files changed, 185 insertions(+), 214 deletions(-) delete mode 100644 Documentation/devicetree/bindings/soundwire/qcom,sdw.txt create mode 100644 Documentation/devicetree/bindings/soundwire/qcom,sdw.yaml diff --git a/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt b/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt deleted file mode 100644 index c85c257..0000000 --- a/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt +++ /dev/null @@ -1,214 +0,0 @@ -Qualcomm SoundWire Controller Bindings - - -This binding describes the Qualcomm SoundWire Controller along with its -board specific bus parameters. - -- compatible: - Usage: required - Value type: <stringlist> - Definition: must be "qcom,soundwire-v<MAJOR>.<MINOR>.<STEP>", - Example: - "qcom,soundwire-v1.3.0" - "qcom,soundwire-v1.5.0" - "qcom,soundwire-v1.5.1" - "qcom,soundwire-v1.6.0" -- reg: - Usage: required - Value type: <prop-encoded-array> - Definition: the base address and size of SoundWire controller - address space. - -- interrupts: - Usage: required - Value type: <prop-encoded-array> - Definition: should specify the SoundWire Controller core and optional - wake IRQ - -- interrupt-names: - Usage: Optional - Value type: boolean - Value type: <stringlist> - Definition: should be "core" for core and "wakeup" for wake interrupt. - -- wakeup-source: - Usage: Optional - Value type: boolean - Definition: should specify if SoundWire Controller is wake up capable. - -- clock-names: - Usage: required - Value type: <stringlist> - Definition: should be "iface" for SoundWire Controller interface clock - -- clocks: - Usage: required - Value type: <prop-encoded-array> - Definition: should specify the SoundWire Controller interface clock - -- #sound-dai-cells: - Usage: required - Value type: <u32> - Definition: must be 1 for digital audio interfaces on the controller. - -- qcom,dout-ports: - Usage: required - Value type: <u32> - Definition: must be count of data out ports - -- qcom,din-ports: - Usage: required - Value type: <u32> - Definition: must be count of data in ports - -- qcom,ports-offset1: - Usage: required - Value type: <prop-encoded-array> - Definition: should specify payload transport window offset1 of each - data port. Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-offset2: - Usage: required - Value type: <prop-encoded-array> - Definition: should specify payload transport window offset2 of each - data port. Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-sinterval-low: - Usage: required - Value type: <prop-encoded-array> - Definition: should be sample interval low of each data port. - Out ports followed by In ports. Used for Sample Interval - calculation. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-word-length: - Usage: optional - Value type: <prop-encoded-array> - Definition: should be size of payload channel sample. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-block-pack-mode: - Usage: optional - Value type: <prop-encoded-array> - Definition: should be 0 or 1 to indicate the block packing mode. - 0 to indicate Blocks are per Channel - 1 to indicate Blocks are per Port. - Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-block-group-count: - Usage: optional - Value type: <prop-encoded-array> - Definition: should be in range 1 to 4 to indicate how many sample - intervals are combined into a payload. - Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-lane-control: - Usage: optional - Value type: <prop-encoded-array> - Definition: should be in range 0 to 7 to identify which data lane - the data port uses. - Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-hstart: - Usage: optional - Value type: <prop-encoded-array> - Definition: should be number identifying lowerst numbered coloum in - SoundWire Frame, i.e. left edge of the Transport sub-frame - for each port. Values between 0 and 15 are valid. - Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,ports-hstop: - Usage: optional - Value type: <prop-encoded-array> - Definition: should be number identifying highest numbered coloum in - SoundWire Frame, i.e. the right edge of the Transport - sub-frame for each port. Values between 0 and 15 are valid. - Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- qcom,dports-type: - Usage: optional - Value type: <prop-encoded-array> - Definition: should be one of the following types - 0 for reduced port - 1 for simple ports - 2 for full port - Out ports followed by In ports. - Value of 0xFF indicates that this option is not implemented - or applicable for the respective data port. - More info in MIPI Alliance SoundWire 1.0 Specifications. - -- reset: - Usage: optional - Value type: <prop-encoded-array> - Definition: Should specify the SoundWire audio CSR reset controller interface, - which is required for SoundWire version 1.6.0 and above. - -- reset-names: - Usage: optional - Value type: <stringlist> - Definition: should be "swr_audio_cgcr" for SoundWire audio CSR reset - controller interface. - -Note: - More Information on detail of encoding of these fields can be -found in MIPI Alliance SoundWire 1.0 Specifications. - -= SoundWire devices -Each subnode of the bus represents SoundWire device attached to it. -The properties of these nodes are defined by the individual bindings. - -= EXAMPLE -The following example represents a SoundWire controller on DB845c board -which has controller integrated inside WCD934x codec on SDM845 SoC. - -soundwire: soundwire@c85 { - compatible = "qcom,soundwire-v1.3.0"; - reg = <0xc85 0x20>; - interrupts = <20 IRQ_TYPE_EDGE_RISING>; - clocks = <&wcc>; - clock-names = "iface"; - resets = <&lpass_audiocc LPASS_AUDIO_SWR_TX_CGCR>; - reset-names = "swr_audio_cgcr"; - #sound-dai-cells = <1>; - qcom,dports-type = <0>; - qcom,dout-ports = <6>; - qcom,din-ports = <2>; - qcom,ports-sinterval-low = /bits/ 8 <0x07 0x1F 0x3F 0x7 0x1F 0x3F 0x0F 0x0F>; - qcom,ports-offset1 = /bits/ 8 <0x01 0x02 0x0C 0x6 0x12 0x0D 0x07 0x0A >; - qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x1F 0x00 0x00 0x1F 0x00 0x00>; - - /* Left Speaker */ - left{ - .... - }; - - /* Right Speaker */ - right{ - .... - }; -}; diff --git a/Documentation/devicetree/bindings/soundwire/qcom,sdw.yaml b/Documentation/devicetree/bindings/soundwire/qcom,sdw.yaml new file mode 100644 index 0000000..bf8f6c1 --- /dev/null +++ b/Documentation/devicetree/bindings/soundwire/qcom,sdw.yaml @@ -0,0 +1,185 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soundwire/qcom,sdw.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SoundWire Controller + +maintainers: + - Srinivas Kandagatla <srinivas.kandagatla(a)linaro.org> + - Srinivasa Rao Mandadapu <quic_srivasam(a)quicinc.com> + +description: + This binding describes the Qualcomm SoundWire controller along with its + board specific bus parameters. + +properties: + compatible: + enum: + - qcom,soundwire-v1.3.0 + - qcom,soundwire-v1.5.0 + - qcom,soundwire-v1.5.1 + - qcom,soundwire-v1.6.0 + + reg: + items: + - description: the base address and size of SoundWire controller + address space. + + interrupts: + items: + - description: specify the SoundWire controller core and optional + wake IRQ. + + interrupt-names: + items: + - const: wakeup + + clocks: + items: + - description: iface clock + + clock-names: + items: + - const: iface + + resets: + items: + - description: SWR_AUDIO_CGCR RESET + + reset-names: + items: + - const: swr_audio_cgcr + + '#sound-dai-cells': + const: 1 + + '#address-cells': + const: 2 + + '#size-cells': + const: 0 + + qcom,din-ports: + $ref: /schemas/types.yaml#/definitions/uint32 + description: count of data in ports + + qcom,dout-ports: + $ref: /schemas/types.yaml#/definitions/uint32 + description: count of data out ports + + qcom,ports-word-length: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: size of payload channel sample. + minItems: 5 + maxItems: 5 + + qcom,ports-sinterval-low: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: sample interval low of each data port. + minItems: 5 + maxItems: 5 + + qcom,ports-offset1: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: payload transport window offset1 of each data port. + minItems: 5 + maxItems: 5 + + qcom,ports-offset2: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: payload transport window offset2 of each data port. + minItems: 5 + maxItems: 5 + + qcom,ports-lane-control: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: identify which data lane the data port uses. + minItems: 5 + maxItems: 5 + + qcom,ports-block-pack-mode: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: indicate the block packing mode. + minItems: 5 + maxItems: 5 + + qcom,ports-hstart: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: identifying lowerst numbered coloum in SoundWire frame. + minItems: 5 + maxItems: 5 + + qcom,ports-hstop: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: identifying highest numbered coloum in SoundWire frame. + minItems: 5 + maxItems: 5 + + qcom,ports-block-group-count: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: indicate how many sample intervals are combined into a payload. + minItems: 5 + maxItems: 5 + +required: + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + - resets + - reset-names + - '#sound-dai-cells' + - '#address-cells' + - '#size-cells' + - qcom,dout-ports + - qcom,din-ports + - qcom,ports-word-length + - qcom,ports-sinterval-low + - qcom,ports-offset1 + - qcom,ports-offset2 + - qcom,ports-lane-control + - qcom,ports-block-pack-mode + - qcom,ports-hstart + - qcom,ports-block-group-count + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h> + + soundwire@3210000 { + compatible = "qcom,soundwire-v1.6.0"; + reg = <0x03210000 0x2000>; + + interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&lpass_rx_macro>; + clock-names = "iface"; + + qcom,din-ports = <0>; + qcom,dout-ports = <5>; + + resets = <&lpass_audiocc LPASS_AUDIO_SWR_RX_CGCR>; + reset-names = "swr_audio_cgcr"; + + qcom,ports-word-length = /bits/ 8 <0x01 0x07 0x04 0xff 0xff>; + qcom,ports-sinterval-low = /bits/ 8 <0x03 0x3f 0x1f 0x03 0x03>; + qcom,ports-offset1 = /bits/ 8 <0x00 0x00 0x0b 0x01 0x01>; + qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x0b 0x00 0x00>; + qcom,ports-lane-control = /bits/ 8 <0x01 0x00 0x00 0x00 0x00>; + qcom,ports-block-pack-mode = /bits/ 8 <0xff 0x00 0x01 0xff 0xff>; + qcom,ports-hstart = /bits/ 8 <0xff 0x03 0xff 0xff 0xff>; + qcom,ports-hstop = /bits/ 8 <0xff 0x06 0xff 0xff 0xff>; + qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0x00>; + + #sound-dai-cells = <1>; + #address-cells = <2>; + #size-cells = <0>; + + status = "disabled"; + }; -- 2.7.4

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[PATCH 1/2] ALSA: hda: Add Intel DG2 PCI ID and HDMI codec vid
by Kai Vehmanen 14 Oct '22

14 Oct '22

Add HD Audio PCI ID and HDMI codec vendor ID for Intel DG2. Reviewed-by: Uma Shankar <uma.shankar(a)intel.com> Signed-off-by: Kai Vehmanen <kai.vehmanen(a)linux.intel.com> --- sound/pci/hda/hda_intel.c | 12 +++++++++++- sound/pci/hda/patch_hdmi.c | 1 + 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index 221afacbc7fd..b98d7975adea 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c @@ -335,7 +335,10 @@ enum { ((pci)->device == 0x0c0c) || \ ((pci)->device == 0x0d0c) || \ ((pci)->device == 0x160c) || \ - ((pci)->device == 0x490d)) + ((pci)->device == 0x490d) || \ + ((pci)->device == 0x4f90) || \ + ((pci)->device == 0x4f91) || \ + ((pci)->device == 0x4f92)) #define IS_BXT(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0x5a98) @@ -2477,6 +2480,13 @@ static const struct pci_device_id azx_ids[] = { /* DG1 */ { PCI_DEVICE(0x8086, 0x490d), .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE}, + /* DG2 */ + { PCI_DEVICE(0x8086, 0x4f90), + .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE}, + { PCI_DEVICE(0x8086, 0x4f91), + .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE}, + { PCI_DEVICE(0x8086, 0x4f92), + .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE}, /* Alderlake-S */ { PCI_DEVICE(0x8086, 0x7ad0), .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE}, diff --git a/sound/pci/hda/patch_hdmi.c b/sound/pci/hda/patch_hdmi.c index 65d2c5539919..98633d2684de 100644 --- a/sound/pci/hda/patch_hdmi.c +++ b/sound/pci/hda/patch_hdmi.c @@ -4382,6 +4382,7 @@ HDA_CODEC_ENTRY(0x80862814, "DG1 HDMI", patch_i915_tgl_hdmi), HDA_CODEC_ENTRY(0x80862815, "Alderlake HDMI", patch_i915_tgl_hdmi), HDA_CODEC_ENTRY(0x8086281c, "Alderlake-P HDMI", patch_i915_tgl_hdmi), HDA_CODEC_ENTRY(0x80862816, "Rocketlake HDMI", patch_i915_tgl_hdmi), +HDA_CODEC_ENTRY(0x80862819, "DG2 HDMI", patch_i915_tgl_hdmi), HDA_CODEC_ENTRY(0x8086281a, "Jasperlake HDMI", patch_i915_icl_hdmi), HDA_CODEC_ENTRY(0x8086281b, "Elkhartlake HDMI", patch_i915_icl_hdmi), HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI", patch_generic_hdmi), base-commit: d7aca8d8f548570f650d9b1dfedf6902f56f2bce -- 2.34.1

3 3

A2B codec chain implementation
by Théo Lebrun 14 Oct '22

14 Oct '22

Hi, Automotive Audio Bus (A2B) is a bus that carries a clock, I2S/TDM, I2C, GPIO and mailboxes over a two wire connection that carries power as well. It has a leader-follower (master-slave in the spec) structure, with no obligation to have all samples going from or to the leader. Analog Devices sells transceivers, that can also decode PDM inputs. Their configuration is register based, with ways of accessing follower registers from the leader. Here is their technical reference: https://www.analog.com/media/en/technical-documentation/user-guides/AD242x_… The goal is to implement support for those, when the host is connected to the leader. The implementation would be done by registering a new bus_type and device_type, with a device for each functionality (on each bus node) provided by the bus. Two issues were faced though: - At runtime, when an PCM stream is started, not only do the CPU and codec need to be configured, but also the leader and follower need some dynamic configuration based on hw_params. We have something resembling a chain, and all 4 devices need to be configured I2S-wise: CPU <-I2S-> leader node <-A2B-> follower node <-I2S-> codec. That does not fit the standard form of a DAI link that only has a CPU and a codec. Is there a way to have a sound card that contains multiple codecs, all actived? - Clocks will have to be handled at the bus level and not at the soundcard level, as the master clock is needed at all times for the bus to be functional. Sadly it's probably not doable to use the clocks provided by the I2S/TDM CPU codec (which would be ideal as they are audio rate, which is what the bus expects), because they only get enabled when a PCM stream is active. On the hardware used for testing (SAMA7G54), we can't use an external (relative to the CPU codec) clock as master clock and use the peripheral to generate the bitclock, it doesn't support it; therefore both have to be handled at the bus level using board specific clocks. So the first point is the main question: how could a codec chain be modeled? I was potentially thinking about a custom soundcard? That could surely help? Would it be the right solution? Any pointers would help. The clock aspect would have been an issue as a codec is either a clock provider or consumer but for this particular use it is not as we'll use the bus and not the soundcard to handle the clock management. Thanks! Théo -- Théo Lebrun, Bootlin Embedded Linux and Kernel engineering https://bootlin.com

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Re: [rft, PATCH v2 00/36] pinctrl: Clean up and add missed headers
by Andy Shevchenko 14 Oct '22

14 Oct '22

On Tue, Oct 11, 2022 at 11:56 PM Florian Fainelli <f.fainelli(a)gmail.com> wrote: > On 10/10/2022 1:14 PM, Andy Shevchenko wrote: > > Currently the header inclusion inside the pinctrl headers seems more arbitrary > > than logical. This series is basically out of two parts: > > - add missed headers to the pin control drivers / users > > - clean up the headers of pin control subsystem > > > > The idea is to have this series to be pulled after -rc1 by the GPIO and > > pin control subsystems, so all new drivers will utilize cleaned up headers > > of the pin control. > > > > Please, review and comment. > > Did you really need to split this on a per-driver basis as opposed to > just a treewide drivers/pinctrl, drivers/media and drivers/gpiolib patch > set? > > 36 patches seems needlessly high when 4 patches could have achieve the > same outcome. I can combine them if maintainers ask for that, nevertheless for Intel pin control and GPIO drivers, which I care more about, I would like to leave as separate changes (easy to see in history what was done). -- With Best Regards, Andy Shevchenko

2 1

[PATCH v2] ASoC: nau8822: add spk boost and spk btl options
by Benjamin Marty 14 Oct '22

14 Oct '22

These two options are required to use the Speaker output on this codec to its full potential, when wiring up the Speaker in an BTL configuration. The Speaker Boost flag is explained in the Datasheet on page 80. The Speaker BTL flag is explained in the Datasheet on page 78. Signed-off-by: Benjamin Marty <info(a)benjaminmarty.ch> --- sound/soc/codecs/nau8822.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/sound/soc/codecs/nau8822.c b/sound/soc/codecs/nau8822.c index 1aef281a9972..812b8254f9a0 100644 --- a/sound/soc/codecs/nau8822.c +++ b/sound/soc/codecs/nau8822.c @@ -379,6 +379,12 @@ static const struct snd_kcontrol_new nau8822_snd_controls[] = { NAU8822_REG_DAC_CONTROL, 5, 1, 0), SOC_SINGLE("ADC 128x Oversampling Switch", NAU8822_REG_ADC_CONTROL, 5, 1, 0), + + SOC_SINGLE("Speaker Gain Boost Control", + NAU8822_REG_OUTPUT_CONTROL, 2, 1, 0), + + SOC_SINGLE("Speaker BTL Configuration", + NAU8822_REG_RIGHT_SPEAKER_CONTROL, 4, 1, 0), }; /* LMAIN and RMAIN Mixer */ -- 2.38.0

3 2

[PATCH] ASoC: nau8822: add spk boost and spk btl options
by Benjamin Marty 14 Oct '22

14 Oct '22

These two options are required to use the Speaker output on this codec to its full potential, when wiring up the Speaker in an BTL configuration. The Speaker Boost flag is explained in the Datasheet on page 80. The Speaker BTL flag is explained in the Datasheet on page 78. Signed-off-by: Benjamin Marty <info(a)benjaminmarty.ch> --- sound/soc/codecs/nau8822.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/sound/soc/codecs/nau8822.c b/sound/soc/codecs/nau8822.c index 1aef281a9972..812b8254f9a0 100644 --- a/sound/soc/codecs/nau8822.c +++ b/sound/soc/codecs/nau8822.c @@ -379,6 +379,12 @@ static const struct snd_kcontrol_new nau8822_snd_controls[] = { NAU8822_REG_DAC_CONTROL, 5, 1, 0), SOC_SINGLE("ADC 128x Oversampling Switch", NAU8822_REG_ADC_CONTROL, 5, 1, 0), + + SOC_SINGLE("Speaker Gain Boost Control", + NAU8822_REG_OUTPUT_CONTROL, 2, 1, 0), + + SOC_SINGLE("Speaker BTL Configuration", + NAU8822_REG_RIGHT_SPEAKER_CONTROL, 4, 1, 0), }; /* LMAIN and RMAIN Mixer */ -- 2.37.3

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Re: Buffer overflow in AVS driver
by CoolStar Organization 14 Oct '22

14 Oct '22

Hi Cezary and Alicja, Just chiming in a bit regarding Geminilake since I figured it out on my end. I have been able to get AVS (at least my port anyways) to run on a Geminilake chromebook after re-signing + re-packing the DSP firmware with the community keys and updating my driver's topology generation to look for the correct SSP's on the NHLT. I dug through the older SKL module in Linux and I noticed the topologies for that specify a "mixer" module (I'm noting it creates an output and an input mixer and binds them together in between the HDA and I2S copier modules). Do these mixer modules do any volume adjustment / volume limiting? as I didn't see any configuration for the mixers aside from the audio format. --CoolStar On Mon, Oct 3, 2022 at 9:09 AM <alicja.michalska(a)tutanota.com> wrote: > Hello Cezary, Amadeusz and CoolStar. > > I'm sure you're waiting for update from me, but unfortunately I got really > sick with tonsillitis. Hopefully it clears up a bit tomorrow. > > I did some preliminary testing as CoolStar mentioned, but I would like to > compare results with GeminiLake Refresh board (google/octopus) that should > be arriving tomorrow. It also uses DA7219 + 2x max98357a (max98357a is a > mono amplifier, so there are two amplifiers on the board - one per channel). > > Just from multimeter measurements there's nothing out of ordinary. 5.12v > (so basically 5v) driving max98357a, resulting with 2.7v on speaker output > which is within spec. I'm still learning how to use an oscilloscope, but > I've noticed that Vpp parameter goes up to 2.4v if you set the volume to > 100% (I'm testing on google/reef baseboard which is ApolloLake N3350 with > DA7219 + 2x max98357a). If you set volume to ~66% it stays around 2v and > speakers don't heat up. > > Here you can see that even without any audio playing, left speaker is > significantly warmer than right one. I began playback with volume set to > 25%, then increased it to 65% and then 100%. Once speaker reaches 60*C, > it's permanently damaged. Working speaker has 3.7Ohm resistance, while > damaged one has 3.9Ohm. > You can also see a pair of max98357a's heating up in the background while > playing with volume set to 100% - they reach 40*C. > > https://elly.rocks/tmp/avs_fryingpan.mp4 > Speaking of which, reading trough the code I've noticed that you intend on > supporting GLK platform. We don't have firmware signed with community keys > (GLK doesn't accept Intel-signed keys) so I've been wondering - would it be > possible for you to provide such FW? > > It is really baffling to me, because as far as we both (CoolStar and me) > see, max98357a is a very simple amplifier controlled by setting GPIO pin > low or high. Conclusion would be that the problem lies in how AVS is > driving ADAU7002 or DA7219, but I'm definitely not in shape right now to > read trough AVS code once again. > > > Best regards, > Alicja Michalska > -- > Sent from Tutanota Client for Linux x86_64 > > > > Oct 2, 2022, 00:09 by coolstarorganization(a)gmail.com: > > > Hi Cezary, > > I was able to get a capture streams working. Thanks for the guidance > on the order of operations for that. For the final iteration of my driver > port I'm going to be grabbing data from the NHLT to populate topologies it > generates so that should have less hardcoding. > > > > Regarding the volume problem, Alicja here ran some tests with AVS on > linux with a scope connected to the output pins of the max98357a (we're > testing on various Skylake, Kaby Lake and Apollo Lake chromebooks -- I > unfortunately blew the left speaker on pantheon here during testing (and > Alicja blew a left speaker on snappy). We're using topology files grabbed > from Chrome OS's Apollo Lake image (I edited the virtual bus id to get it > working on Kaby Lake here), and it seems there's nothing referencing DSM > inside either the alsa configs or topology. > > --CoolStar > > > > On Thu, Sep 29, 2022 at 9:41 AM Rojewski, Cezary <> > cezary.rojewski(a)intel.com> > wrote: > > > >> > >> Hello, > >> > >> > >> > >> > >> > >> Indeed, there are means on dealing with volume problem you describe. > Not all of them are free though and we cannot share such to the community > without client’s ACK. > >> > >> > >> Judging by the max98357a, platform of yours is a Chromebook device, > perhaps AML-based, e.g.: Atlas. Said configuration contains the DSM module > which addresses the problem. The DSM topology and the configuration should > be available to public, so filtering google’s public domain should yield > positive results. > >> > >> > >> > >> > >> > >> I advise against hardcoding anything within the driver. Within a week > or two, tools for compiling the topology as well as several dozens of > examples should be present on the upstream, that is on the >> > github.com/thesofproject <http://github.com/thesofproject>>> . > >> > >> > >> But yes, there is a requirement for certain ordering of operations. In > general, you should be creating stuff from input to output (precisely in > that direction). For capture, input stands at BE side while for playback > it’s FE instead. There’s also part about configuring the actual hardware > that is represented in ASoC as a BE. Files: avs/path.c and avs/pcm.c should > provide the pattern you seek. > >> > >> > >> > >> > >> > >> > >> > >> > >> Kind regards, > >> > >> > >> Czarek > >> > >> > >> > >> > >> > >> From:>> CoolStar Organization <>> coolstarorganization(a)gmail.com>> > > >> >> Sent:>> Wednesday, September 28, 2022 11:17 PM > >> >> To:>> Rojewski, Cezary <>> cezary.rojewski(a)intel.com>> > > >> >> Cc:>> >> amadeuszx.slawinski(a)linux.intel.com > >> >> Subject:>> Re: Buffer overflow in AVS driver > >> > >> > >> > >> > >> Hi Czarek, > >> > >> > >> You can mention CoolStar in the Reported-by tag, as that’s the > pseudonym I go by. > >> > >> > >> > >> > >> > >> Also I had 2 questions regarding AVS. > >> > >> > >> > >> > >> > >> A friend and I both noticed on max98357a that increasing the volume in > the OS past 70% can destroy the speakers. Is there a module or something > that could be bound on the speaker path to limit the volume as max98357a > itself just has an on/off switch? (I noticed catpt has volume controls. > Maybe AVS’s updown mix?). > >> > >> > >> > >> > >> > >> Also, I managed to get my AVS port to output sound on another OS (I’m > not using topology files and am hard coding the path). However I noticed > I’ve been unable to record sound. I noticed for output streams the > initialization sequence is: > >> > >> > >> 1. Create pipeline 0 > >> > >> > >> 2. Create i2s link output path on pipeline 0 > >> > >> > >> 3. Grab HDA render stream & program BDL > >> > >> > >> 4. Create pipeline 1 > >> > >> > >> 5. Create HDA output path on pipeline 1 with virtual link address > (HDA stream tag - 1) > >> > >> > >> 6. Bind pipeline 1 to 0 > >> > >> > >> 7. Set pipeline 0 and then 1 to reset & paused > >> > >> > >> 8. Start HDA stream playback > >> > >> > >> 9. Set pipelines 1 and then 0 to running > >> > >> > >> > >> > >> > >> I’ve been attempting to do a similar setup for input (except with i2s > link input path, an HDA capture stream, and HDA input path) but I don’t see > any input. Is there a particular order for input initialization for it to > work? (Similar to how for the output I had to set up the HDA stream before > creating the HDA pipeline before I could get any sound output?) > >> > >> > >> > >> > >> > >> —CoolStar > >> > >> > >> > >> > >> > >> On Wed, Sep 28, 2022 at 1:09 PM Rojewski, Cezary <>> > cezary.rojewski(a)intel.com>> > wrote: > >> > >> > >>> > >>> Hello, > >>> > >>> > >>> > >>> > >>> > >>> Please excuse my delay in response. We appreciate the input – in > future, please do not be afraid to email us with alsa-devel in CC. It’s > easier to not have the mail missed that way. > >>> > >>> > >>> > >>> > >>> > >>> In regard to the actual bug, highly unlikely but indeed you’re > correct. While my response is delayed, patch fixing the problem in our > internal tree was not. Said patch should soon appear on the alsa-devel > mailing list. Are there any names that you would like us to mention in the > relevant commit message (through “Reported-by:” tag)?. > >>> > >>> > >>> > >>> > >>> > >>> Kind regards, > >>> > >>> > >>> Czarek > >>> > >>> > >>> > >>> > >>> > >>> From:>>> CoolStar Organization <>>> coolstarorganization(a)gmail.com>>> > > > >>> >>> Sent:>>> Saturday, September 10, 2022 10:00 PM > >>> >>> To:>>> Rojewski, Cezary <>>> cezary.rojewski(a)intel.com>>> >; > >>> amadeuszx.slawinski(a)linux.intel.com > >>> >>> Subject:>>> Buffer overflow in AVS driver > >>> > >>> > >>> > >>> > >>> Hi, > >>> > >>> > >>> I've been looking at porting the avs driver you've written to another > OS. During the process I noticed a potential buffer overflow issue in ipc.c. > >>> > >>> > >>> > >>> > >>> > >>> I noticed that ipc->rx.data is allocated a buffer of > `AVS_MAILBOX_SIZE` (or 4096 bytes) in the init, and this buffer is not > allocated anywhere else. In avs_dsp_receive_rx, if the msg type is set to a > large config get, it sets the size to the arbitrary value from the msg > struct without any checks, and then immediately does a memcpy to the buffer. > >>> > >>> > >>> > >>> > >>> > >>> I'd highly suggest putting a check to ensure this doesn't go larger > than AVS_MAILBOX_SIZE to avoid a buffer overflow as that could crash the > system (or potentially be a vulnerability to take over the host system if > an attacker somehow gets code execution on the DSP?) > >>> > >>> > >>> --CoolStar > >>> > >>> > >

1 0

Software volume control has very little effect on Behringer UMC204HD
by GitHub issues - edited 13 Oct '22

13 Oct '22

alsa-project/alsa-ucm-conf issue #230 was edited from Spanfile: I'm using a Behringer UMC204HD with its UCM profile and Pipewire. The profile works fine that it properly splits the interface's four output channels into two stereo line outputs, and Pipewire is properly using them. There aren't any issues with audio crackling, latency or the sort, but the software volume control is affecting the actual volume output very little. Only the first few "notches" from 0 to 10 change the volume noticeably, however the lowest volume it allows is still somewhat loud. From there on the rest of the range doesn't change the volume much at all. Using the Direct UCM profile lets the software volume control have much better range, but I need the Line A/B split in my setup so that profile is not an option. I haven't tried disabling UCM and configuring pro audio in Pipewire directly, but that doesn't sound like a proper fix. It may be intentional, however? [There has been a similar issue reported to Pipewire](https://gitlab.freedesktop.org/pipewire/pipewire/-/issues/2643), but it's not exactly what I'm experiencing. [I've reported this issue to them as well.](https://gitlab.freedesktop.org/pipewire/pipewire/-/issues/2765) Of course I could set the software volume to something static and control it from the interface, but the interface is physically out of reach from my hands and the software volume is easily controlled from my keyboard ;) Kernel: 6.0.1.arch1-1 Pipewire: 0.3.59 alsa-ucm-conf: 1.2.7.2 Desktop environment: GNOME (w/ GDM) Issue URL : https://github.com/alsa-project/alsa-ucm-conf/issues/230 Repository URL: https://github.com/alsa-project/alsa-ucm-conf

1 0

Software volume control has very little effect on Behringer UMC204HD
by GitHub issues - edited 13 Oct '22

13 Oct '22

alsa-project/alsa-ucm-conf issue #230 was edited from Spanfile: I'm using a Behringer UMC204HD with Pipewire and its UCM profile. The profile works fine that it properly splits the interface's four output channels into two stereo line outputs, and Pipewire is properly using them. There aren't any issues with audio crackling, latency or the sort, but the software volume control is affecting the actual volume output very little. Only the first few "notches" from 0 to 10 change the volume noticeably, however the lowest volume it allows is still somewhat loud. From there on the rest of the range doesn't change the volume much at all. Using the Direct UCM profile lets the software volume control have much better range, but I need the Line A/B split in my setup so that profile is not an option. I haven't tried disabling UCM and configuring pro audio in Pipewire directly, but that doesn't sound like a proper fix. It may be intentional, however? [There has been a similar issue reported to Pipewire](https://gitlab.freedesktop.org/pipewire/pipewire/-/issues/2643), but it's not exactly what I'm experiencing. [I've reported this issue to them as well.](https://gitlab.freedesktop.org/pipewire/pipewire/-/issues/2765) Of course I could set the software volume to something static and control it from the interface, but the interface is physically out of reach from my hands and the software volume is easily controlled from my keyboard ;) Kernel: 6.0.1.arch1-1 Pipewire: 0.3.59 alsa-ucm-conf: 1.2.7.2 Desktop environment: GNOME (w/ GDM) Issue URL : https://github.com/alsa-project/alsa-ucm-conf/issues/230 Repository URL: https://github.com/alsa-project/alsa-ucm-conf

1 0

[PATCH] ASoC: rt5682s: Fix the TDM Tx settings
by derek.fang＠realtek.com 13 Oct '22

13 Oct '22

From: Derek Fang <derek.fang(a)realtek.com> Complete the missing and correct the TDM Tx settings. Signed-off-by: Derek Fang <derek.fang(a)realtek.com> --- sound/soc/codecs/rt5682s.c | 15 +++++++++++++-- sound/soc/codecs/rt5682s.h | 1 + 2 files changed, 14 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/rt5682s.c b/sound/soc/codecs/rt5682s.c index 3b91a3442c68..5199d3bbaf0b 100644 --- a/sound/soc/codecs/rt5682s.c +++ b/sound/soc/codecs/rt5682s.c @@ -1981,7 +1981,7 @@ static int rt5682s_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width) { struct snd_soc_component *component = dai->component; - unsigned int cl, val = 0; + unsigned int cl, val = 0, tx_slotnum; if (tx_mask || rx_mask) snd_soc_component_update_bits(component, @@ -1990,6 +1990,16 @@ static int rt5682s_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, snd_soc_component_update_bits(component, RT5682S_TDM_ADDA_CTRL_2, RT5682S_TDM_EN, 0); + /* Tx slot configuration */ + tx_slotnum = hweight_long(tx_mask); + if (tx_slotnum) { + if (tx_slotnum > slots) { + dev_err(component->dev, "Invalid or oversized Tx slots.\n"); + return -EINVAL; + } + val |= (tx_slotnum - 1) << RT5682S_TDM_ADC_DL_SFT; + } + switch (slots) { case 4: val |= RT5682S_TDM_TX_CH_4; @@ -2010,7 +2020,8 @@ static int rt5682s_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, } snd_soc_component_update_bits(component, RT5682S_TDM_CTRL, - RT5682S_TDM_TX_CH_MASK | RT5682S_TDM_RX_CH_MASK, val); + RT5682S_TDM_TX_CH_MASK | RT5682S_TDM_RX_CH_MASK | + RT5682S_TDM_ADC_DL_MASK, val); switch (slot_width) { case 8: diff --git a/sound/soc/codecs/rt5682s.h b/sound/soc/codecs/rt5682s.h index 824dc6543c18..45464a041765 100644 --- a/sound/soc/codecs/rt5682s.h +++ b/sound/soc/codecs/rt5682s.h @@ -899,6 +899,7 @@ #define RT5682S_TDM_RX_CH_8 (0x3 << 8) #define RT5682S_TDM_ADC_LCA_MASK (0x7 << 4) #define RT5682S_TDM_ADC_LCA_SFT 4 +#define RT5682S_TDM_ADC_DL_MASK (0x3 << 0) #define RT5682S_TDM_ADC_DL_SFT 0 /* TDM control 2 (0x007a) */ -- 2.17.1

2 1

[PATCH] ASoC: rt1019: Fix the TDM settings
by derek.fang＠realtek.com 13 Oct '22

13 Oct '22

From: Derek Fang <derek.fang(a)realtek.com> Complete the missing and correct the TDM settings. Signed-off-by: Derek Fang <derek.fang(a)realtek.com> --- sound/soc/codecs/rt1019.c | 20 +++++++++++--------- sound/soc/codecs/rt1019.h | 6 ++++++ 2 files changed, 17 insertions(+), 9 deletions(-) diff --git a/sound/soc/codecs/rt1019.c b/sound/soc/codecs/rt1019.c index b66bfecbb879..49f527c61a7a 100644 --- a/sound/soc/codecs/rt1019.c +++ b/sound/soc/codecs/rt1019.c @@ -391,18 +391,18 @@ static int rt1019_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width) { struct snd_soc_component *component = dai->component; - unsigned int val = 0, rx_slotnum; + unsigned int cn = 0, cl = 0, rx_slotnum; int ret = 0, first_bit; switch (slots) { case 4: - val |= RT1019_I2S_TX_4CH; + cn = RT1019_I2S_TX_4CH; break; case 6: - val |= RT1019_I2S_TX_6CH; + cn = RT1019_I2S_TX_6CH; break; case 8: - val |= RT1019_I2S_TX_8CH; + cn = RT1019_I2S_TX_8CH; break; case 2: break; @@ -412,16 +412,16 @@ static int rt1019_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, switch (slot_width) { case 20: - val |= RT1019_I2S_DL_20; + cl = RT1019_TDM_CL_20; break; case 24: - val |= RT1019_I2S_DL_24; + cl = RT1019_TDM_CL_24; break; case 32: - val |= RT1019_I2S_DL_32; + cl = RT1019_TDM_CL_32; break; case 8: - val |= RT1019_I2S_DL_8; + cl = RT1019_TDM_CL_8; break; case 16: break; @@ -470,8 +470,10 @@ static int rt1019_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, goto _set_tdm_err_; } + snd_soc_component_update_bits(component, RT1019_TDM_1, + RT1019_TDM_CL_MASK, cl); snd_soc_component_update_bits(component, RT1019_TDM_2, - RT1019_I2S_CH_TX_MASK | RT1019_I2S_DF_MASK, val); + RT1019_I2S_CH_TX_MASK, cn); _set_tdm_err_: return ret; diff --git a/sound/soc/codecs/rt1019.h b/sound/soc/codecs/rt1019.h index 64df831eeb72..48ba15efb48d 100644 --- a/sound/soc/codecs/rt1019.h +++ b/sound/soc/codecs/rt1019.h @@ -95,6 +95,12 @@ #define RT1019_TDM_BCLK_MASK (0x1 << 6) #define RT1019_TDM_BCLK_NORM (0x0 << 6) #define RT1019_TDM_BCLK_INV (0x1 << 6) +#define RT1019_TDM_CL_MASK (0x7) +#define RT1019_TDM_CL_8 (0x4) +#define RT1019_TDM_CL_32 (0x3) +#define RT1019_TDM_CL_24 (0x2) +#define RT1019_TDM_CL_20 (0x1) +#define RT1019_TDM_CL_16 (0x0) /* 0x0401 TDM Control-2 */ #define RT1019_I2S_CH_TX_MASK (0x3 << 6) -- 2.17.1

2 1

[PATCH] ASoC: qcom: lpass-cpu: mark HDMI TX registers as volatile
by Srinivasa Rao Mandadapu 13 Oct '22

13 Oct '22

From: Srinivasa Rao Mandadapu <srivasam(a)qualcomm.corp-partner.google.com> Update HDMI volatile registers list as DMA, Channel Selection registers , vbit control registers are being reflected by hardware DP port disconnection. This update is required to fix no display and no sound issue observed after reconnecting TAMA/SANWA DP cables. Once DP cable is unplugged, DMA control registers are being reset by hardware, however at second plugin, new dma control values does not updated to the dma hardware registers since new register value and cached values at the time of first plugin are same. Signed-off-by: Srinivasa Rao Mandadapu <srivasam(a)qualcomm.corp-partner.google.com> --- sound/soc/qcom/lpass-cpu.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/sound/soc/qcom/lpass-cpu.c b/sound/soc/qcom/lpass-cpu.c index 8a56f38..99a3b44 100644 --- a/sound/soc/qcom/lpass-cpu.c +++ b/sound/soc/qcom/lpass-cpu.c @@ -782,10 +782,18 @@ static bool lpass_hdmi_regmap_volatile(struct device *dev, unsigned int reg) return true; if (reg == LPASS_HDMI_TX_LEGACY_ADDR(v)) return true; + if (reg == LPASS_HDMI_TX_VBIT_CTL_ADDR(v)) + return true; for (i = 0; i < v->hdmi_rdma_channels; ++i) { if (reg == LPAIF_HDMI_RDMACURR_REG(v, i)) return true; + if (reg == LPASS_HDMI_TX_DMA_ADDR(v, i)) + return true; + if (reg == LPASS_HDMI_TX_CH_LSB_ADDR(v, i)) + return true; + if (reg == LPASS_HDMI_TX_CH_MSB_ADDR(v, i)) + return true; } return false; } -- 2.7.4

3 2

[PATCH] ASoC: wm8962: Add an event handler for TEMP_HP and TEMP_SPK
by Xiaolei Wang 13 Oct '22

13 Oct '22

In wm8962 driver, the WM8962_ADDITIONAL_CONTROL_4 is used as a volatile register, but this register mixes a bunch of volatile status bits and a bunch of non-volatile control bits. The dapm widgets TEMP_HP and TEMP_SPK leverages the control bits in this register. After the wm8962 probe, the regmap will bet set to cache only mode, then a read error like below would be triggered when trying to read the initial power state of the dapm widgets TEMP_HP and TEMP_SPK. wm8962 0-001a: ASoC: error at soc_component_read_no_lock on wm8962.0-001a: -16 In order to fix this issue, we add event handler to actually power up/down these widgets. With this change, we also need to explicitly power off these widgets in the wm8962 probe since they are enabled by default. Signed-off-by: Xiaolei Wang <xiaolei.wang(a)windriver.com> --- sound/soc/codecs/wm8962.c | 54 +++++++++++++++++++++++++++++++++++++-- 1 file changed, 52 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/wm8962.c b/sound/soc/codecs/wm8962.c index 398c448ea854..6df06fba4377 100644 --- a/sound/soc/codecs/wm8962.c +++ b/sound/soc/codecs/wm8962.c @@ -1840,6 +1840,49 @@ SOC_SINGLE_TLV("SPKOUTR Mixer DACR Volume", WM8962_SPEAKER_MIXER_5, 4, 1, 0, inmix_tlv), }; +static int tp_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + int ret, reg, val, mask; + struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); + + ret = pm_runtime_resume_and_get(component->dev); + if (ret < 0) { + dev_err(component->dev, "Failed to resume device: %d\n", ret); + return ret; + } + + reg = WM8962_ADDITIONAL_CONTROL_4; + + if (!strcmp(w->name, "TEMP_HP")) { + mask = WM8962_TEMP_ENA_HP_MASK; + val = WM8962_TEMP_ENA_HP; + } else if (!strcmp(w->name, "TEMP_SPK")) { + mask = WM8962_TEMP_ENA_SPK_MASK; + val = WM8962_TEMP_ENA_SPK; + } else { + pm_runtime_put(component->dev); + return -EINVAL; + } + + switch (event) { + case SND_SOC_DAPM_POST_PMD: + val = 0; + fallthrough; + case SND_SOC_DAPM_POST_PMU: + ret = snd_soc_component_update_bits(component, reg, mask, val); + break; + default: + WARN(1, "Invalid event %d\n", event); + pm_runtime_put(component->dev); + return -EINVAL; + } + + pm_runtime_put(component->dev); + + return 0; +} + static int cp_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { @@ -2140,8 +2183,10 @@ SND_SOC_DAPM_SUPPLY("TOCLK", WM8962_ADDITIONAL_CONTROL_1, 0, 0, NULL, 0), SND_SOC_DAPM_SUPPLY_S("DSP2", 1, WM8962_DSP2_POWER_MANAGEMENT, WM8962_DSP2_ENA_SHIFT, 0, dsp2_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), -SND_SOC_DAPM_SUPPLY("TEMP_HP", WM8962_ADDITIONAL_CONTROL_4, 2, 0, NULL, 0), -SND_SOC_DAPM_SUPPLY("TEMP_SPK", WM8962_ADDITIONAL_CONTROL_4, 1, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("TEMP_HP", SND_SOC_NOPM, 0, 0, tp_event, + SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), +SND_SOC_DAPM_SUPPLY("TEMP_SPK", SND_SOC_NOPM, 0, 0, tp_event, + SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), SND_SOC_DAPM_MIXER("INPGAL", WM8962_LEFT_INPUT_PGA_CONTROL, 4, 0, inpgal, ARRAY_SIZE(inpgal)), @@ -3763,6 +3808,11 @@ static int wm8962_i2c_probe(struct i2c_client *i2c) if (ret < 0) goto err_pm_runtime; + regmap_update_bits(wm8962->regmap, WM8962_ADDITIONAL_CONTROL_4, + WM8962_TEMP_ENA_HP_MASK, 0); + regmap_update_bits(wm8962->regmap, WM8962_ADDITIONAL_CONTROL_4, + WM8962_TEMP_ENA_SPK_MASK, 0); + regcache_cache_only(wm8962->regmap, true); /* The drivers should power up as needed */ -- 2.25.1

4 3

Software volume control has very little effect on Behringer UMC204HD
by GitHub issues - opened 13 Oct '22

13 Oct '22

alsa-project/alsa-ucm-conf issue #230 was opened from Spanfile: I'm using a Behringer UMC204HD with Pipewire and its UCM profile. The profile works fine that it properly splits the interface's four output channels into two stereo line outputs, and Pipewire is properly using them. There aren't any issues with audio crackling, latency or the sort, but the software volume control is affecting the actual volume output very little. Only the first few "notches" from 0 to 10 change the volume noticeably, however the lowest volume it allows is still somewhat loud. From there on the rest of the range doesn't change the volume much at all. According to the Pipewire developers, this issue likely falls within the ALSA territory. Using the Direct UCM profile lets the software volume control have much better range, but I need the Line A/B split in my setup so that profile is not an option. I haven't tried disabling UCM and configuring pro audio in Pipewire directly, but that doesn't sound like a proper fix. It may be intentional, however? [There has been a similar issue reported to Pipewire](https://gitlab.freedesktop.org/pipewire/pipewire/-/issues/2643), but it's not exactly what I'm experiencing. Of course I could set the software volume to something static and control it from the interface, but the interface is physically out of reach from my hands and the software volume is easily controlled from my keyboard ;) Kernel: 6.0.1.arch1-1 Pipewire: 0.3.59 alsa-ucm-conf: 1.2.7.2 Desktop environment: GNOME (w/ GDM) Issue URL : https://github.com/alsa-project/alsa-ucm-conf/issues/230 Repository URL: https://github.com/alsa-project/alsa-ucm-conf

1 0

[PATCH] ASoC: Add Richtek RT5512 Speaker Amp Driver
by Jeff Chang 13 Oct '22

13 Oct '22

From: Jeff <jeff_chang(a)richtek.com> The RT5512 is a boosted class-D amplifier with V/I sensing. A built-in DC-DC step-up converter is used to provide efficient power for class-D amplifier with multi-level class-H operation. The digital audio interface supports I2S, left-justified, right-justified and TDM format for audio in with a data out used for chip information like voltage sense and current sense, which are able to be monitored via DATAO pin through proper register setting. Signed-off-by: SHIH CHIA CHANG <jeff_chang(a)richtek.com> --- .../bindings/sound/richtek,rt5512.yaml | 50 + sound/soc/codecs/Kconfig | 10 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/rt5512.c | 860 ++++++++++++++++++ 4 files changed, 922 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/richtek,rt5512.yaml create mode 100644 sound/soc/codecs/rt5512.c diff --git a/Documentation/devicetree/bindings/sound/richtek,rt5512.yaml b/Documentation/devicetree/bindings/sound/richtek,rt5512.yaml new file mode 100644 index 000000000000..6a21c9d1bd2c --- /dev/null +++ b/Documentation/devicetree/bindings/sound/richtek,rt5512.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/richtek,rt5512.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Richtek RT5512 speaker amplifier + +maintainers: + - SHIH CHIA CHANG <jeff_chang(a)richtek.com> + +description: | + The RT5512B is a boosted class-D amplifier with V/I sensing. + A built-in DC-DC step-up converter is used to provide efficient power for + class-D amplifier with multi-level class-H operation. The digital audio + interface supports I2S, left-justified, right-justified and TDM format for + audio in with a data out used for chip information like voltage sense and + current sense, which are able to be monitored via DATAO pin through proper + register setting. + +properties: + compatible: + enum: + - richtek,rt5150 + + reg: + description: I2C device address + maxItems: 1 + + '#sound-dai-cells': + const: 0 + +required: + - compatible + - reg + - '#sound-dai-cells' + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + rt5512@5c { + compatible = "richtek,rt5512"; + reg = <0x5c>; + #sound-dai-cells = <0>; + }; + }; diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index e3b90c425faf..0f2b4c2aded3 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -176,6 +176,7 @@ config SND_SOC_ALL_CODECS imply SND_SOC_RT1019 imply SND_SOC_RT1305 imply SND_SOC_RT1308 + imply SND_SOC_RT5512 imply SND_SOC_RT5514 imply SND_SOC_RT5616 imply SND_SOC_RT5631 @@ -1311,6 +1312,15 @@ config SND_SOC_RT1316_SDW depends on SOUNDWIRE select REGMAP_SOUNDWIRE +config SND_SOC_RT5512 + tristate "Mediatek RT5512 speaker amplifier" + depends on I2C + help + Config of RT5512. It is a Smart power + amplifier which contain speaker protection, + multi-band DRC, equalizer function. It would + be set to yes if device with RT5512 on it. + config SND_SOC_RT5514 tristate depends on I2C diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index 9170ee1447dd..13e79d735779 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -199,6 +199,7 @@ snd-soc-rt1316-sdw-objs := rt1316-sdw.o snd-soc-rt274-objs := rt274.o snd-soc-rt286-objs := rt286.o snd-soc-rt298-objs := rt298.o +snd-soc-rt5512-objs := rt5512.o snd-soc-rt5514-objs := rt5514.o snd-soc-rt5514-spi-objs := rt5514-spi.o snd-soc-rt5616-objs := rt5616.o @@ -554,6 +555,7 @@ obj-$(CONFIG_SND_SOC_RT1316_SDW) += snd-soc-rt1316-sdw.o obj-$(CONFIG_SND_SOC_RT274) += snd-soc-rt274.o obj-$(CONFIG_SND_SOC_RT286) += snd-soc-rt286.o obj-$(CONFIG_SND_SOC_RT298) += snd-soc-rt298.o +obj-$(CONFIG_SND_SOC_RT5512) += snd-soc-rt5512.o obj-$(CONFIG_SND_SOC_RT5514) += snd-soc-rt5514.o obj-$(CONFIG_SND_SOC_RT5514_SPI) += snd-soc-rt5514-spi.o obj-$(CONFIG_SND_SOC_RT5514_SPI_BUILTIN) += snd-soc-rt5514-spi.o diff --git a/sound/soc/codecs/rt5512.c b/sound/soc/codecs/rt5512.c new file mode 100644 index 000000000000..a843fd730df3 --- /dev/null +++ b/sound/soc/codecs/rt5512.c @@ -0,0 +1,860 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2021 Mediatek Inc. + */ + +#include <linux/debugfs.h> +#include <linux/delay.h> +#include <linux/err.h> +#include <linux/gpio.h> +#include <linux/i2c.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/of_gpio.h> +#include <linux/pm_qos.h> +#include <linux/pm_runtime.h> +#include <linux/version.h> +#include <sound/pcm_params.h> +#include <sound/soc.h> +#include <sound/tlv.h> + + +#define RT5512_REV_A (2) +#define RT5512_REV_B (3) + +#define RT5512_REG_DEVID (0x00) +#define RT5512_REG_SERIAL_DATA_STATUS (0x01) +#define RT5512_REG_SYSTEM_CTRL (0x03) +#define RT5512_REG_IRQ_EN (0x04) +#define RT5512_REG_IRQ_STATUS1 (0x05) +#define RT5512_REG_SERIAL_CFG1 (0x10) +#define RT5512_REG_DATAO_SEL (0x12) +#define RT5512_REG_TDM_CFG3 (0x15) +#define RT5512_REG_HPF_CTRL (0x16) +#define RT5512_REG_HPF_COEF_1 (0x19) +#define RT5512_REG_HPF_COEF_2 (0x1B) +#define RT5512_REG_PATH_BYPASS (0x1F) +#define RT5512_REG_WDT_CTRL (0x20) +#define RT5512_REG_HCLIP_CTRL (0x24) +#define RT5512_REG_VOL_CTRL (0x29) +#define RT5512_REG_CLIP_CTRL (0x30) +#define RT5512_REG_CALI_T0 (0x3F) +#define RT5512_REG_BST_CTRL (0x40) +#define RT5512_REG_BST_L1 (0x41) +#define RT5512_REG_PROTECTION_CFG (0x46) +#define RT5512_REG_PLL_CFG1 (0x60) +#define RT5512_REG_DRE_CTRL (0x68) +#define RT5512_REG_DRE_THDMODE (0x69) +#define RT5512_REG_FINE_RISING (0x6C) +#define RT5512_REG_FINE_FALLING (0x6D) +#define RT5512_REG_PWM_CTRL (0x70) +#define RT5512_REG_DC_PROTECT_CTRL (0x74) +#define RT5512_REG_DITHER_CTRL (0x78) +#define RT5512_REG_MISC_CTRL1 (0x98) +#define RT5512_REG_GVSENSE_CONST (0x9D) +#define RT5512_REG_SPK_IB (0xA2) +#define RT5512_REG_ANA_SPK_CTRL6 (0xA6) +#define RT5512_REG_NSW (0xAD) +#define RT5512_REG_VBG (0xAE) +#define RT5512_REG_BST_BIAS (0xB0) +#define RT5512_REG_VSADC_BLKBIAS (0xB1) +#define RT5512_REG_CS_CTRL (0xB3) +#define RT5512_REG_ANA_TOP_CTRL0 (0xB5) +#define RT5512_REG_ANA_TOP_CTRL1 (0xB6) + +struct rt5512_chip { + struct i2c_client *i2c; + struct device *dev; + struct snd_soc_component *component; + struct mutex var_lock; + struct regmap *regmap; + int t0; + int pwr_cnt; + unsigned int ff_gain; + u16 chip_rev; + u8 bst_mode; + u8 dev_cnt; + struct pm_qos_request rt5512_qos_request; +}; + +static struct regmap_config rt5512_regmap_config = { + .reg_bits = 8, + .val_bits = 16, + .max_register = 0xff, +}; + +static int rt5512_codec_dac_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_component *component = + snd_soc_dapm_to_component(w->dapm); + int ret = 0; + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + /* un-mute */ + ret = snd_soc_component_update_bits(component, 0x03, 0x0002, 0); + break; + case SND_SOC_DAPM_POST_PMU: + break; + } + return ret; +} + +static int rt5512_codec_classd_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_component *component = + snd_soc_dapm_to_component(w->dapm); + struct rt5512_chip *chip = snd_soc_component_get_drvdata(component); + int ret = 0; + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + /* charge pump disable & disable UVP */ + ret |= snd_soc_component_update_bits(component, 0xb5, 0xf9fc, + 0xf9fc); + mdelay(11); + + dev_info(component->dev, "%s rt5512 update bst mode %d\n", + __func__, chip->bst_mode); + /* boost config to adaptive mode */ + ret = snd_soc_component_update_bits(component, 0x40, 0x0003, + chip->bst_mode); + mdelay(2); + + ret |= snd_soc_component_update_bits(component, 0x98, 0x0700, + 0x0100); + /* charge pump enable */ + ret |= snd_soc_component_update_bits(component, 0xb5, 0x0001, + 0x0001); + break; + case SND_SOC_DAPM_POST_PMU: + mdelay(2); + ret |= snd_soc_component_update_bits(component, 0x98, 0x0200, + 0x0200); + dev_info(component->dev, "Amp on\n"); + cpu_latency_qos_update_request(&chip->rt5512_qos_request, + PM_QOS_DEFAULT_VALUE); + break; + case SND_SOC_DAPM_PRE_PMD: + dev_info(component->dev, "Amp off\n"); + cpu_latency_qos_update_request(&chip->rt5512_qos_request, 150); + + /* enable mute */ + ret = snd_soc_component_update_bits(component, 0x03, 0x0002, + 0x0002); + /* Headroom 1.1V */ + ret |= snd_soc_component_update_bits(component, 0x41, 0x00ff, + 0x002f); + ret |= snd_soc_component_update_bits(component, 0x98, 0x0010, + 0x0010); + break; + case SND_SOC_DAPM_POST_PMD: + /* un-mute */ + ret |= snd_soc_component_update_bits(component, 0x03, 0x0002, + 0x0000); + mdelay(2); + + /* charge pump disable*/ + ret |= snd_soc_component_update_bits(component, 0xb5, 0x0001, + 0x0000); + + mdelay(1); + /* set boost to disable mode */ + ret |= snd_soc_component_update_bits(component, 0x40, 0x0003, + 0x0000); + /* D_VBG, Bias current disable */ + ret |= snd_soc_component_update_bits(component, 0xb5, 0xfffe, + 0x0000); + break; + default: + break; + } + return ret; +} + +static const char * const rt5512_i2smux_text[] = { "I2S1", "I2S2"}; +static SOC_ENUM_SINGLE_DECL(rt5512_i2s_muxsel, + SND_SOC_NOPM, 0, rt5512_i2smux_text); +static const struct snd_kcontrol_new rt5512_i2smux_ctrl = + SOC_DAPM_ENUM("Switch", rt5512_i2s_muxsel); + +static const struct snd_soc_dapm_widget rt5512_component_dapm_widgets[] = { + SND_SOC_DAPM_MUX("I2S Mux", SND_SOC_NOPM, 0, 0, &rt5512_i2smux_ctrl), + SND_SOC_DAPM_DAC_E("DAC", NULL, RT5512_REG_PLL_CFG1, + 0, 1, rt5512_codec_dac_event, SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_ADC("VI ADC", NULL, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_PGA("PGA", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_OUT_DRV_E("ClassD", RT5512_REG_SYSTEM_CTRL, 2, 0, + NULL, 0, rt5512_codec_classd_event, + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU | + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD), + SND_SOC_DAPM_SPK("SPK", NULL), +}; + +static const struct snd_soc_dapm_route rt5512_component_dapm_routes[] = { + { "I2S Mux", "I2S1", "AIF1 Playback" }, + { "I2S Mux", "I2S2", "AIF2 Playback" }, + { "DAC", NULL, "I2S Mux" }, + { "PGA", NULL, "DAC" }, + { "ClassD", NULL, "PGA" }, + { "SPK", NULL, "ClassD" }, + { "VI ADC", NULL, "ClassD" }, + { "AIF1 Capture", NULL, "VI ADC" }, +}; + +static int rt5512_component_get_t0(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = + snd_soc_kcontrol_component(kcontrol); + struct rt5512_chip *chip = snd_soc_component_get_drvdata(component); + + dev_info(component->dev, "%s, chip->t0 = %d\n", __func__, chip->t0); + ucontrol->value.integer.value[0] = chip->t0; + return 0; +} + +static int rt5512_get_bstmode(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = + snd_soc_kcontrol_component(kcontrol); + struct rt5512_chip *chip = snd_soc_component_get_drvdata(component); + + ucontrol->value.integer.value[0] = chip->bst_mode; + return 0; +} + +static int rt5512_set_bstmode(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = + snd_soc_kcontrol_component(kcontrol); + struct rt5512_chip *chip = snd_soc_component_get_drvdata(component); + int ret = 0; + + chip->bst_mode = ucontrol->value.integer.value[0]; + dev_info(component->dev, "%s, bst_mode = %d\n", __func__, + chip->bst_mode); + return ret; +} + +static int rt5512_codec_get_chiprev(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = + snd_soc_kcontrol_component(kcontrol); + struct rt5512_chip *chip = snd_soc_component_get_drvdata(component); + + ucontrol->value.integer.value[0] = chip->chip_rev & 0xf; + return 0; +} + +static int rt5512_codec_put_istcbypass(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = + snd_soc_kcontrol_component(kcontrol); + int ret; + + pm_runtime_get_sync(component->dev); + if (ucontrol->value.integer.value[0]) { + ret = snd_soc_component_update_bits(component, + RT5512_REG_PATH_BYPASS, + 0x0004, 0x0004); + } else { + ret = snd_soc_component_update_bits(component, + RT5512_REG_PATH_BYPASS, + 0x0004, 0x0000); + } + if (ret) + dev_err(component->dev, "%s set CC Max Failed\n", __func__); + pm_runtime_put_sync(component->dev); + return ret; +} + +static int rt5512_codec_get_istcbypass(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = + snd_soc_kcontrol_component(kcontrol); + int ret; + + pm_runtime_get_sync(component->dev); + ret = snd_soc_component_read(component, RT5512_REG_PATH_BYPASS); + + if (ret > 0 && ret&0x0004) + ucontrol->value.integer.value[0] = 1; + else + ucontrol->value.integer.value[0] = 0; + pm_runtime_put_sync(component->dev); + return 0; +} + +static int rt5512_codec_get_volsw(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = + snd_soc_kcontrol_component(kcontrol); + int ret; + + pm_runtime_get_sync(component->dev); + ret = snd_soc_get_volsw(kcontrol, ucontrol); + if (ret < 0) + dev_err(component->dev, "%s get volsw fail\n", __func__); + pm_runtime_put_sync(component->dev); + return ret; +} + +static int rt5512_codec_put_volsw(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = + snd_soc_kcontrol_component(kcontrol); + int put_ret = 0; + + pm_runtime_get_sync(component->dev); + put_ret = snd_soc_put_volsw(kcontrol, ucontrol); + if (put_ret < 0) + dev_err(component->dev, "%s put volsw fail\n", __func__); + pm_runtime_put_sync(component->dev); + return put_ret; +} + +static const DECLARE_TLV_DB_SCALE(vol_ctl_tlv, -1155, 5, 0); +static const struct snd_kcontrol_new rt5512_component_snd_controls[] = { + SOC_SINGLE_EXT_TLV("Volume_Ctrl", RT5512_REG_VOL_CTRL, 0, 255, + 1, rt5512_codec_get_volsw, rt5512_codec_put_volsw, + vol_ctl_tlv), + SOC_SINGLE_EXT("Data Output Left Channel Selection", + RT5512_REG_DATAO_SEL, 3, 7, 0, + rt5512_codec_get_volsw, rt5512_codec_put_volsw), + SOC_SINGLE_EXT("Data Output Right Channel Selection", + RT5512_REG_DATAO_SEL, 0, 7, 0, + rt5512_codec_get_volsw, rt5512_codec_put_volsw), + SOC_SINGLE_EXT("Audio Input Selection", RT5512_REG_DATAO_SEL, + 6, 3, 0, + rt5512_codec_get_volsw, rt5512_codec_put_volsw), + SOC_SINGLE_EXT("IDAC Gain Selection", RT5512_REG_ANA_TOP_CTRL1, + 0, 31, 0, + rt5512_codec_get_volsw, rt5512_codec_put_volsw), + SOC_SINGLE_EXT("VBAT BIT OUT EN", RT5512_REG_TDM_CFG3, 11, 1, 0, + rt5512_codec_get_volsw, rt5512_codec_put_volsw), + SOC_SINGLE_EXT("Boost Mode", SND_SOC_NOPM, 0, 3, 0, + rt5512_get_bstmode, rt5512_set_bstmode), + SOC_SINGLE_EXT("T0_SEL", SND_SOC_NOPM, 0, 7, 0, + rt5512_component_get_t0, NULL), + SOC_SINGLE_EXT("Chip_Rev", SND_SOC_NOPM, 0, 16, 0, + rt5512_codec_get_chiprev, NULL), + SOC_SINGLE_BOOL_EXT("IS_TC_BYPASS", SND_SOC_NOPM, + rt5512_codec_get_istcbypass, rt5512_codec_put_istcbypass), +}; + +static int rt5512_component_setting(struct snd_soc_component *component) +{ + struct rt5512_chip *chip = snd_soc_component_get_drvdata(component); + int ret = 0; + + ret = snd_soc_component_read(component, 0x4d); + if (ret < 0) + return -EIO; + chip->ff_gain = ret; + if (chip->chip_rev == RT5512_REV_A) { + /* RT5512A_RU012B_algorithm_20201110.lua */ + ret |= snd_soc_component_update_bits(component, 0xA1, 0xff18, + 0x5b18); + ret |= snd_soc_component_write(component, 0x69, 0x0002); + ret |= snd_soc_component_write(component, 0x68, 0x000C); + ret |= snd_soc_component_write(component, 0x6C, 0x0010); + ret |= snd_soc_component_write(component, 0x6D, 0x0008); + ret |= snd_soc_component_write(component, 0x30, 0x0002); + ret |= snd_soc_component_write(component, 0xA7, 0x0A84); + ret |= snd_soc_component_write(component, 0x20, 0x00A2); + ret |= snd_soc_component_write(component, 0x8B, 0x0040); + + /* BST optimizations for efficiency */ + ret |= snd_soc_component_write(component, 0xAD, 0x40F7); + ret |= snd_soc_component_write(component, 0x41, 0x0028); + ret |= snd_soc_component_write(component, 0x49, 0x0495); + /* 2019.0821 */ + ret |= snd_soc_component_write(component, 0x46, 0x001D); + ret |= snd_soc_component_write(component, 0x45, 0x5292); + ret |= snd_soc_component_write(component, 0x4C, 0x0293); + + ret |= snd_soc_component_write(component, 0xA2, 0x355D); + ret |= snd_soc_component_update_bits(component, 0xAE, 0x00ff, + 0x0056); + ret |= snd_soc_component_write(component, 0xA5, 0x6612); + ret |= snd_soc_component_write(component, 0x70, 0x0021); + ret |= snd_soc_component_write(component, 0xA6, 0x3135); + + /* boost THD performance enhance */ + ret |= snd_soc_component_write(component, 0x9B, 0x5f37); + ret |= snd_soc_component_write(component, 0x4A, 0xD755); + + /* V.I sense performance enhance */ + ret |= snd_soc_component_write(component, 0xB3, 0x9103); + ret |= snd_soc_component_update_bits(component, 0xB1, 0xfff0, + 0xA5AA); + ret |= snd_soc_component_write(component, 0xB0, 0xD5A5); + ret |= snd_soc_component_write(component, 0x98, 0x8B8C); + ret |= snd_soc_component_write(component, 0x78, 0x00f2); + + ret |= snd_soc_component_write(component, 0x9D, 0x00FC); + ret |= snd_soc_component_write(component, 0x38, 0x9BEB); + ret |= snd_soc_component_write(component, 0x39, 0x8BAC); + ret |= snd_soc_component_write(component, 0x3A, 0x7E7D); + ret |= snd_soc_component_write(component, 0x3B, 0x7395); + ret |= snd_soc_component_write(component, 0x3C, 0x6A68); + ret |= snd_soc_component_write(component, 0x3D, 0x6295); + ret |= snd_soc_component_write(component, 0x3E, 0x5BD4); + + ret |= snd_soc_component_update_bits(component, 0x12, 0x0007, 0x0006); + ret |= snd_soc_component_update_bits(component, 0xB6, 0x0400, 0x0000); + } else if (chip->chip_rev == RT5512_REV_B) { /* REV_B */ + /* RT5512B_RU012D_algorithm_20201110.lua */ + ret |= snd_soc_component_update_bits(component, 0xA1, 0xff18, 0x5b18); + ret |= snd_soc_component_write(component, 0x69, 0x0002); + ret |= snd_soc_component_write(component, 0x68, 0x000C); + ret |= snd_soc_component_write(component, 0x6C, 0x0010); + ret |= snd_soc_component_write(component, 0x6D, 0x0008); + ret |= snd_soc_component_write(component, 0x30, 0x0002); + ret |= snd_soc_component_write(component, 0xA7, 0x0A84); + ret |= snd_soc_component_write(component, 0x20, 0x00A2); + ret |= snd_soc_component_write(component, 0x8B, 0x0040); + + /* BST optimizations for efficiency */ + ret |= snd_soc_component_write(component, 0xAD, 0x40F7); + ret |= snd_soc_component_write(component, 0x41, 0x0028); + ret |= snd_soc_component_write(component, 0x49, 0x0495); + /* 2019.0821 */ + ret |= snd_soc_component_write(component, 0x46, 0x001D); + ret |= snd_soc_component_write(component, 0x45, 0x5292); + ret |= snd_soc_component_write(component, 0x4C, 0x0293); + + ret |= snd_soc_component_write(component, 0xA2, 0x355D); + ret |= snd_soc_component_update_bits(component, 0xAE, 0x00ff, 0x0056); + ret |= snd_soc_component_write(component, 0xA5, 0x6612); + ret |= snd_soc_component_write(component, 0x70, 0x0021); + ret |= snd_soc_component_write(component, 0xA6, 0x3135); + + /* boost THD performance enhance */ + ret |= snd_soc_component_write(component, 0x9B, 0x5f37); + ret |= snd_soc_component_write(component, 0x4A, 0xD755); + + /* V.I sense performance enhance */ + ret |= snd_soc_component_write(component, 0xB3, 0x9103); + ret |= snd_soc_component_update_bits(component, 0xB1, 0xfff0, 0xA5AA); + ret |= snd_soc_component_write(component, 0xB0, 0xD5A5); + ret |= snd_soc_component_write(component, 0x98, 0x8B8C); + ret |= snd_soc_component_write(component, 0x78, 0x00f2); + + ret |= snd_soc_component_write(component, 0x9D, 0x00FC); + ret |= snd_soc_component_write(component, 0x38, 0x9BEB); + ret |= snd_soc_component_write(component, 0x39, 0x8BAC); + ret |= snd_soc_component_write(component, 0x3A, 0x7E7D); + ret |= snd_soc_component_write(component, 0x3B, 0x7395); + ret |= snd_soc_component_write(component, 0x3C, 0x6A68); + ret |= snd_soc_component_write(component, 0x3D, 0x6295); + ret |= snd_soc_component_write(component, 0x3E, 0x5BD4); + + ret |= snd_soc_component_update_bits(component, 0x12, 0x0007, 0x0006); + ret |= snd_soc_component_update_bits(component, 0xB6, 0x0400, 0x0000); + } + + if (ret < 0) + return ret; + mdelay(5); + return 0; +} + +static int rt5512_component_probe(struct snd_soc_component *component) +{ + struct rt5512_chip *chip = snd_soc_component_get_drvdata(component); + int ret = 0; + + pm_runtime_get_sync(component->dev); + + chip->component = component; + snd_soc_component_init_regmap(component, chip->regmap); + + ret = rt5512_component_setting(component); + if (ret < 0) { + dev_err(chip->dev, "rt5512 component setting failed\n"); + goto component_probe_fail; + } + +component_probe_fail: + pm_runtime_put_sync(component->dev); + return ret; +} + +static void rt5512_component_remove(struct snd_soc_component *component) +{ + snd_soc_component_exit_regmap(component); +} + +static const struct snd_soc_component_driver rt5512_component_driver = { + .probe = rt5512_component_probe, + .remove = rt5512_component_remove, + + .controls = rt5512_component_snd_controls, + .num_controls = ARRAY_SIZE(rt5512_component_snd_controls), + .dapm_widgets = rt5512_component_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(rt5512_component_dapm_widgets), + .dapm_routes = rt5512_component_dapm_routes, + .num_dapm_routes = ARRAY_SIZE(rt5512_component_dapm_routes), + + .idle_bias_on = false, +}; + +static int rt5512_component_aif_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *hw_params, struct snd_soc_dai *dai) +{ + struct snd_soc_dapm_context *dapm = + snd_soc_component_get_dapm(dai->component); + int word_len = params_physical_width(hw_params); + int aud_bit = params_width(hw_params); + u16 reg_data = 0; + int ret = 0; + char *tmp = "SPK"; + + dev_dbg(dai->dev, "%s: ++\n", __func__); + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + dev_info(dai->dev, "format: 0x%08x, rate: 0x%08x, word_len: %d, aud_bit: %d\n", + params_format(hw_params), params_rate(hw_params), word_len, + aud_bit); + if (word_len > 32 || word_len < 16) { + dev_err(dai->dev, "not supported word length\n"); + return -ENOTSUPP; + } + switch (aud_bit) { + case 16: + reg_data = 3; + break; + case 18: + reg_data = 2; + break; + case 20: + reg_data = 1; + break; + case 24: + case 32: + reg_data = 0; + break; + default: + return -ENOTSUPP; + } + ret = snd_soc_component_update_bits(dai->component, + RT5512_REG_SERIAL_CFG1, 0x00c0, (reg_data << 6)); + if (ret < 0) { + dev_err(dai->dev, "config aud bit fail\n"); + return ret; + } + + ret = snd_soc_component_update_bits(dai->component, + RT5512_REG_TDM_CFG3, 0x03f0, word_len << 4); + if (ret < 0) { + dev_err(dai->dev, "config word len fail\n"); + return ret; + } + dev_dbg(dai->dev, "%s: --\n", __func__); + return snd_soc_dapm_enable_pin(dapm, tmp); +} + +static int rt5512_component_aif_hw_free(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct snd_soc_dapm_context *dapm = + snd_soc_component_get_dapm(dai->component); + int ret = 0; + char *tmp = "SPK"; + + if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) + return 0; + dev_info(dai->dev, "%s successfully start\n", __func__); + + ret = snd_soc_dapm_disable_pin(dapm, tmp); + if (ret < 0) + return ret; + return snd_soc_dapm_sync(dapm); +} + +static const struct snd_soc_dai_ops rt5512_component_aif_ops = { + .hw_params = rt5512_component_aif_hw_params, + .hw_free = rt5512_component_aif_hw_free, +}; + +#define STUB_RATES SNDRV_PCM_RATE_8000_192000 +#define STUB_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \ + SNDRV_PCM_FMTBIT_U16_LE | \ + SNDRV_PCM_FMTBIT_S24_LE | \ + SNDRV_PCM_FMTBIT_U24_LE | \ + SNDRV_PCM_FMTBIT_S32_LE | \ + SNDRV_PCM_FMTBIT_U32_LE) + +static struct snd_soc_dai_driver rt5512_codec_dai[] = { + { + .name = "rt5512-aif", + .playback = { + .stream_name = "AIF1 Playback", + .channels_min = 1, + .channels_max = 2, + .rates = STUB_RATES, + .formats = STUB_FORMATS, + }, + .capture = { + .stream_name = "AIF1 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = STUB_RATES, + .formats = STUB_FORMATS, + }, + /* dai properties */ + .symmetric_rate = 1, + .symmetric_channels = 1, + .symmetric_sample_bits = 1, + /* dai operations */ + .ops = &rt5512_component_aif_ops, + }, + { + .name = "rt5512-aif2", + .playback = { + .stream_name = "AIF2 Playback", + .channels_min = 1, + .channels_max = 2, + .rates = STUB_RATES, + .formats = STUB_FORMATS, + }, + .ops = &rt5512_component_aif_ops, + }, +}; + +static inline int _rt5512_chip_power_on(struct rt5512_chip *chip, int on_off) +{ + int ret = 0; + + dev_info(chip->dev, "%s, %d\n", __func__, on_off); + ret = regmap_write_bits(chip->regmap, RT5512_REG_SYSTEM_CTRL, 0xffff, + on_off ? 0x0000 : 0x0001); + if (ret) + return ret; + return 0; +} + +static inline int _rt5512_chip_sw_reset(struct rt5512_chip *chip) +{ + int ret; + u8 data[2] = {0x00, 0x00}; + u8 reg_data[2] = {0x00, 0x80}; + + /* turn on main pll first, then trigger reset */ + ret = i2c_smbus_write_i2c_block_data(chip->i2c, RT5512_REG_SYSTEM_CTRL, + 2, data); + if (ret < 0) + return ret; + ret = i2c_smbus_write_i2c_block_data(chip->i2c, RT5512_REG_SYSTEM_CTRL, + 2, reg_data); + if (ret < 0) + return ret; + mdelay(14); + + if (chip->chip_rev == RT5512_REV_B) { + reg_data[0] = 0; + reg_data[1] = 0; + ret = i2c_smbus_write_i2c_block_data(chip->i2c, 0x98, 2, + reg_data); + if (ret < 0) { + dev_err(chip->dev, "%s write 0x98 failed\n", __func__); + return ret; + } + mdelay(10); + reg_data[0] = 0xE1; + reg_data[1] = 0xFD; + ret = i2c_smbus_write_i2c_block_data(chip->i2c, 0xb5, 2, + reg_data); + if (ret < 0) { + dev_err(chip->dev, "%s write 0xb5 failed\n", __func__); + return ret; + } + } + return 0; +} + +static inline int rt5512_chip_id_check(struct rt5512_chip *chip) +{ + u8 id[2] = {0}; + int ret = 0; + u8 data[2] = {0x00, 0x00}; + + ret = i2c_smbus_write_i2c_block_data(chip->i2c, RT5512_REG_SYSTEM_CTRL, + 2, data); + if (ret < 0) + return ret; + ret = i2c_smbus_read_i2c_block_data(chip->i2c, RT5512_REG_DEVID, 2, id); + if (ret < 0) + return ret; + if (id[0] != 0) { + dev_err(chip->dev, "%s device id not match, id = %x\n", + __func__, id[0]); + return -ENODEV; + } + chip->chip_rev = id[1]; + if (chip->chip_rev != RT5512_REV_A && chip->chip_rev != RT5512_REV_B) { + dev_err(chip->dev, "%s chip rev not match, rev = %d\n", + __func__, chip->chip_rev); + return -ENODEV; + } + dev_info(chip->dev, "%s chip_rev = %d\n", __func__, chip->chip_rev); + + ret = i2c_smbus_read_i2c_block_data(chip->i2c, RT5512_REG_CALI_T0, 2, + id); + if (ret < 0) + return ret; + chip->t0 = id[1]; + dev_info(chip->dev, "%s chip t0 = %d\n", __func__, chip->t0); + + data[1] = 0x01; + ret = i2c_smbus_write_i2c_block_data(chip->i2c, RT5512_REG_SYSTEM_CTRL, + 2, data); + return ret; +} + +static inline int rt5512_component_register(struct rt5512_chip *chip) +{ + return devm_snd_soc_register_component(chip->dev, + &rt5512_component_driver, + rt5512_codec_dai, + ARRAY_SIZE(rt5512_codec_dai)); +} + +int rt5512_i2c_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct rt5512_chip *chip = NULL; + int ret = 0; + static int dev_cnt; + + chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); + if (!chip) + return -ENOMEM; + chip->i2c = client; + chip->dev = &client->dev; + chip->dev_cnt = dev_cnt; + mutex_init(&chip->var_lock); + i2c_set_clientdata(client, chip); + + ret = rt5512_chip_id_check(chip); + if (ret < 0) { + dev_err(&client->dev, "chip id check fail, ret = %d\n", ret); + return -ENODEV; + } + + chip->bst_mode = 1; /* Battery Mode */ + + /* chip reset first */ + ret = _rt5512_chip_sw_reset(chip); + if (ret < 0) { + dev_err(chip->dev, "chip reset fail\n"); + goto probe_fail; + } + + chip->regmap = devm_regmap_init_i2c(client, &rt5512_regmap_config); + if (IS_ERR(chip->regmap)) { + ret = PTR_ERR(chip->regmap); + dev_err(&client->dev, "failed to initialise regmap: %d\n", ret); + return ret; + } + + /* register qos to prevent deep idle during transfer */ + cpu_latency_qos_add_request(&chip->rt5512_qos_request, + PM_QOS_DEFAULT_VALUE); + ret = rt5512_component_register(chip); + if (!ret) { + pm_runtime_set_active(chip->dev); + pm_runtime_enable(chip->dev); + } + dev_info(chip->dev, "%s end, ret = %d\n", __func__, ret); + return ret; +probe_fail: + _rt5512_chip_power_on(chip, 0); + mutex_destroy(&chip->var_lock); + return ret; +} + +void rt5512_i2c_remove(struct i2c_client *client) +{ + struct rt5512_chip *chip = i2c_get_clientdata(client); + + pm_runtime_disable(chip->dev); + pm_runtime_set_suspended(chip->dev); + mutex_destroy(&chip->var_lock); +} + +static int __maybe_unused rt5512_i2c_runtime_suspend(struct device *dev) +{ + struct rt5512_chip *chip = dev_get_drvdata(dev); + int ret = 0; + + dev_info(dev, "enter low power mode\n"); + ret = regmap_write_bits(chip->regmap, RT5512_REG_SYSTEM_CTRL, + 0xffff, 0x0001); + cpu_latency_qos_update_request(&chip->rt5512_qos_request, + PM_QOS_DEFAULT_VALUE); + if (ret < 0) + dev_err(dev, "%s ret = %d\n", __func__, ret); + return 0; +} + +static int __maybe_unused rt5512_i2c_runtime_resume(struct device *dev) +{ + struct rt5512_chip *chip = dev_get_drvdata(dev); + int ret = 0; + + /* update qos to prevent deep idle during transfer */ + cpu_latency_qos_update_request(&chip->rt5512_qos_request, 150); + dev_info(dev, "exit low power mode\n"); + ret = regmap_write_bits(chip->regmap, + RT5512_REG_SYSTEM_CTRL, 0xffff, 0x0000); + if (ret < 0) + dev_err(dev, "%s ret = %d\n", __func__, ret); + usleep_range(2000, 2100); + return 0; +} + +static const struct dev_pm_ops rt5512_dev_pm_ops = { + SET_RUNTIME_PM_OPS(rt5512_i2c_runtime_suspend, + rt5512_i2c_runtime_resume, NULL) +}; + +static const struct of_device_id __maybe_unused rt5512_of_id[] = { + { .compatible = "richtek,rt5512",}, + {}, +}; +MODULE_DEVICE_TABLE(of, rt5512_of_id); + +static const struct i2c_device_id rt5512_i2c_id[] = { + {"rt5512", 0 }, + {}, +}; +MODULE_DEVICE_TABLE(i2c, rt5512_i2c_id); + +static struct i2c_driver rt5512_i2c_driver = { + .driver = { + .name = "rt5512", + .of_match_table = of_match_ptr(rt5512_of_id), + .pm = &rt5512_dev_pm_ops, + }, + .probe = rt5512_i2c_probe, + .remove = rt5512_i2c_remove, + .id_table = rt5512_i2c_id, +}; +module_i2c_driver(rt5512_i2c_driver); + +MODULE_AUTHOR("Jeff Chang <jeff_chang(a)richtek.com>"); +MODULE_DESCRIPTION("RT5512 SPKAMP Driver"); +MODULE_LICENSE("GPL"); +MODULE_VERSION("2.0.5_M"); -- 2.17.1

5 5

[PATCH v2 -next 0/3] ASoC: wmxxxx: Revert old "ASoC: wmxxxx: Fix PM disable depth imbalance in wmxxxx_probe"
by Zhang Qilong 13 Oct '22

13 Oct '22

Both the old and new patch have been applied, it will resulted in redundant calling of pm_runtime_disable when error returns. We Just revert the old three patches to fix it. --- v2: - add subject for the patch title Zhang Qilong (3): ASoC: wm5102: Revert "ASoC: wm5102: Fix PM disable depth imbalance in wm5102_probe" ASoC: wm5110: Revert "ASoC: wm5110: Fix PM disable depth imbalance in wm5110_probe" ASoC: wm8997: Revert "ASoC: wm8997: Fix PM disable depth imbalance in wm8997_probe" sound/soc/codecs/wm5102.c | 6 +++--- sound/soc/codecs/wm5110.c | 6 +++--- sound/soc/codecs/wm8997.c | 6 +++--- 3 files changed, 9 insertions(+), 9 deletions(-) -- 2.25.1

2 4

[PATCH] ASoC: cx2072x: fix spelling typo in comment
by Jiangshan Yi 13 Oct '22

13 Oct '22

From: Jiangshan Yi <yijiangshan(a)kylinos.cn> Fix spelling typo in comment. Reported-by: k2ci <kernel-bot(a)kylinos.cn> Signed-off-by: Jiangshan Yi <yijiangshan(a)kylinos.cn> --- sound/soc/codecs/cx2072x.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/cx2072x.h b/sound/soc/codecs/cx2072x.h index ebdd567fa225..09e3a92b184f 100644 --- a/sound/soc/codecs/cx2072x.h +++ b/sound/soc/codecs/cx2072x.h @@ -177,7 +177,7 @@ #define CX2072X_PLBK_DRC_PARM_LEN 9 #define CX2072X_CLASSD_AMP_LEN 6 -/* DAI interfae type */ +/* DAI interface type */ #define CX2072X_DAI_HIFI 1 #define CX2072X_DAI_DSP 2 #define CX2072X_DAI_DSP_PWM 3 /* 4 ch, including mic and AEC */ -- 2.25.1 No virus found Checked by Hillstone Network AntiVirus

2 1

[PATCH -next] ASoC: mt6660: Keep the pm_runtime enables before component stuff in mt6660_i2c_probe
by Zhang Qilong 13 Oct '22

13 Oct '22

It would be better to keep the pm_runtime enables before the IRQ and component stuff. Both of those could start triggering PM runtime events. Signed-off-by: Zhang Qilong <zhangqilong3(a)huawei.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno(a)collabora.com> --- sound/soc/codecs/mt6660.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/sound/soc/codecs/mt6660.c b/sound/soc/codecs/mt6660.c index 554c33e8b62f..cc2df5f7ea19 100644 --- a/sound/soc/codecs/mt6660.c +++ b/sound/soc/codecs/mt6660.c @@ -503,14 +503,14 @@ static int mt6660_i2c_probe(struct i2c_client *client) dev_err(chip->dev, "read chip revision fail\n"); goto probe_fail; } + pm_runtime_set_active(chip->dev); + pm_runtime_enable(chip->dev); ret = devm_snd_soc_register_component(chip->dev, &mt6660_component_driver, &mt6660_codec_dai, 1); - if (!ret) { - pm_runtime_set_active(chip->dev); - pm_runtime_enable(chip->dev); - } + if (ret) + pm_runtime_disable(chip->dev); return ret; -- 2.25.1

2 1

[PATCH v2] ASoC: codec: tlv320adc3xxx: add GPIOLIB dependency
by Randy Dunlap 13 Oct '22

13 Oct '22

Fix build errors when CONFIG_GPIOLIB is not enabled: ../sound/soc/codecs/tlv320adc3xxx.c: In function 'adc3xxx_i2c_probe': ../sound/soc/codecs/tlv320adc3xxx.c:1352:28: error: implicit declaration of function 'devm_gpiod_get'; did you mean 'devm_gpio_free'? [-Werror=implicit-function-declaration] 1352 | adc3xxx->rst_pin = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW); ../sound/soc/codecs/tlv320adc3xxx.c:1352:57: error: 'GPIOD_OUT_LOW' undeclared (first use in this function); did you mean 'GPIOF_INIT_LOW'? 1352 | adc3xxx->rst_pin = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW); CC lib/dynamic_debug.o ../sound/soc/codecs/tlv320adc3xxx.c:1400:9: error: implicit declaration of function 'gpiod_set_value_cansleep'; did you mean 'gpio_set_value_cansleep'? [-Werror=implicit-function-declaration] 1400 | gpiod_set_value_cansleep(adc3xxx->rst_pin, 1); Fixes: e9a3b57efd28 ("ASoC: codec: tlv320adc3xxx: New codec driver") Signed-off-by: Randy Dunlap <rdunlap(a)infradead.org> Reported-by: kernel test robot <lkp(a)intel.com> Cc: Mark Brown <broonie(a)kernel.org> Cc: Liam Girdwood <lgirdwood(a)gmail.com> Cc: Ricard Wanderlof <ricardw(a)axis.com> Cc: Jaroslav Kysela <perex(a)perex.cz> Cc: Takashi Iwai <tiwai(a)suse.com> Cc: alsa-devel(a)alsa-project.org --- v2: use correct Subject keywords sound/soc/codecs/Kconfig | 1 + 1 file changed, 1 insertion(+) --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -1629,6 +1629,7 @@ config SND_SOC_TFA989X config SND_SOC_TLV320ADC3XXX tristate "Texas Instruments TLV320ADC3001/3101 audio ADC" depends on I2C + depends on GPIOLIB help Enable support for Texas Instruments TLV320ADC3001 and TLV320ADC3101 ADCs.

2 1

ALC4080 - ASRock X670E Taichi
by GitHub issues - edited 13 Oct '22

13 Oct '22

alsa-project/alsa-ucm-conf issue #229 was edited from hendrikb-101: This board's ALC4082 seems to be sitting here: `26ce:0a06 Generic USB Audio` After trying out the latest UCM configuration I also tried adding this to my USB-Audio.conf: `# 26ce:0a06 ASRock X670E Taichi` `Regex "USB((26ce:0a06)|(0414:a00e)|(0b05:(1996|1a(16|2[07])))|(0db0:(005a|151f|1feb|419c|82c7|a073|a47c|b202)))"` but no dice (still recognized as "Generic USB Audio" and ports don't work). Sound works in Windows 11 and manually playing a sound like that works: `aplay -D plughw:Audio,1 /usr/share/sounds/alsa/Front_Left.wav ` Is there anything else different on this board besides the device's id?! This is my [alsa-info.txt](https://github.com/alsa-project/alsa-ucm-conf/files/9771968/…. Issue URL : https://github.com/alsa-project/alsa-ucm-conf/issues/229 Repository URL: https://github.com/alsa-project/alsa-ucm-conf

1 0

ALC4080 - ASRock X670E Taichi
by GitHub issues - edited 13 Oct '22

13 Oct '22

alsa-project/alsa-ucm-conf issue #229 was edited from hendrikb-101: This board's ALC4082 seems to be sitting here: `26ce:0a06 Generic USB Audio` After trying out the latest UCM configuration I also tried adding this to my USB-Audio.conf: `# 26ce:0a06 ASRock X670E Taichi Regex "USB((26ce:0a06)|(0414:a00e)|(0b05:(1996|1a(16|2[07])))|(0db0:(005a|151f|1feb|419c|82c7|a073|a47c|b202)))"` but no dice (still recognized as "Generic USB Audio" and ports don't work). Sound works in Windows 11 and manually playing a sound like that works: `aplay -D plughw:Audio,1 /usr/share/sounds/alsa/Front_Left.wav ` Is there anything else different on this board besides the device's id?! This is my [alsa-info.txt](https://github.com/alsa-project/alsa-ucm-conf/files/9771968/…. Issue URL : https://github.com/alsa-project/alsa-ucm-conf/issues/229 Repository URL: https://github.com/alsa-project/alsa-ucm-conf

1 0

ALC4080 - ASRock X670E Taichi
by GitHub issues - edited 13 Oct '22

13 Oct '22

alsa-project/alsa-ucm-conf issue #229 was edited from hendrikb-101: This board's ALC4082 seems to be sitting here: `26ce:0a06 Generic USB Audio` After trying out the latest UCM configuration I also tried adding this to my USB-Audio.conf: `# 26ce:0a06 ASRock X670E Taichi` `Regex "USB((26ce:0a06)|(0414:a00e)|(0b05:(1996|1a(16|2[07])))|(0db0:(005a|151f|1feb|419c|82c7|a073|a47c|b202)))"` but no dice (still recognized as "Generic USB Audio" and ports don't work). Sound works in Windows 11 and manually playing a sound like that works: `aplay -D plughw:Audio,1 /usr/share/sounds/alsa/Front_Left.wav ` Is there anything else different on this board besides the device's id?! This is my [alsa-info.txt](https://github.com/alsa-project/alsa-ucm-conf/files/9771968/…. Issue URL : https://github.com/alsa-project/alsa-ucm-conf/issues/229 Repository URL: https://github.com/alsa-project/alsa-ucm-conf

1 0

ALC4080 - ASRock X670E Taichi
by GitHub issues - opened 13 Oct '22

13 Oct '22

alsa-project/alsa-ucm-conf issue #229 was opened from hendrikb-101: This board's ALC4082 seems to be sitting here: `26ce:0a06 Generic USB Audio` After trying out the latest UCM configuration I also tried adding this to my USB-Audio.conf: `# 26ce:0a06 ASRock X670E Taichi Regex "USB((26ce:0a06)|(0414:a00e)|(0b05:(1996|1a(16|2[07])))|(0db0:(005a|151f|1feb|419c|82c7|a073|a47c|b202)))"` but no dice (still recognized as "Generic USB Audio" and ports don't work). Sound works in Windows 11 and manually playing a sound like that works: `aplay -D plughw:Audio,1 /usr/share/sounds/alsa/Front_Left.wav ` Is there anything else different on this board besides the device's id?! This is my [alsa-info.txt](https://github.com/alsa-project/alsa-ucm-conf/files/9771968/…. Issue URL : https://github.com/alsa-project/alsa-ucm-conf/issues/229 Repository URL: https://github.com/alsa-project/alsa-ucm-conf

1 0

[PATCH AUTOSEL 5.10 17/33] soundwire: intel: fix error handling on dai registration issues
by Sasha Levin 13 Oct '22

13 Oct '22

From: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> [ Upstream commit c6867cda906aadbce5e71efde9c78a26108b2bad ] The call to intel_register_dai() may fail because of memory allocation issues or problems reported by the ASoC core. In all cases, when a error is thrown the component is not registered, it's invalid to unregister it. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Reviewed-by: Rander Wang <rander.wang(a)intel.com> Signed-off-by: Bard Liao <yung-chuan.liao(a)linux.intel.com> Link: https://lore.kernel.org/r/20220919175721.354679-2-yung-chuan.liao@linux.int… Signed-off-by: Vinod Koul <vkoul(a)kernel.org> Signed-off-by: Sasha Levin <sashal(a)kernel.org> --- drivers/soundwire/intel.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/soundwire/intel.c b/drivers/soundwire/intel.c index 824d9f900aca..942d2fe13218 100644 --- a/drivers/soundwire/intel.c +++ b/drivers/soundwire/intel.c @@ -1470,7 +1470,6 @@ int intel_master_startup(struct platform_device *pdev) ret = intel_register_dai(sdw); if (ret) { dev_err(dev, "DAI registration failed: %d\n", ret); - snd_soc_unregister_component(dev); goto err_interrupt; } -- 2.35.1

1 0

[PATCH AUTOSEL 5.10 16/33] soundwire: cadence: Don't overwrite msg->buf during write commands
by Sasha Levin 13 Oct '22

13 Oct '22

From: Richard Fitzgerald <rf(a)opensource.cirrus.com> [ Upstream commit ba05b39d265bdd16913f7684600d9d41e2796745 ] The buf passed in struct sdw_msg must only be written for a READ, in that case the RDATA part of the response is the data value of the register. For a write command there is no RDATA, and buf should be assumed to be const and unmodifable. The original caller should not expect its data buffer to be corrupted by an sdw_nwrite(). Signed-off-by: Richard Fitzgerald <rf(a)opensource.cirrus.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Link: https://lore.kernel.org/r/20220916103505.1562210-1-rf@opensource.cirrus.com Signed-off-by: Vinod Koul <vkoul(a)kernel.org> Signed-off-by: Sasha Levin <sashal(a)kernel.org> --- drivers/soundwire/cadence_master.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/soundwire/cadence_master.c b/drivers/soundwire/cadence_master.c index c6d421a4b91b..a3247692ddc0 100644 --- a/drivers/soundwire/cadence_master.c +++ b/drivers/soundwire/cadence_master.c @@ -501,9 +501,12 @@ cdns_fill_msg_resp(struct sdw_cdns *cdns, return SDW_CMD_IGNORED; } - /* fill response */ - for (i = 0; i < count; i++) - msg->buf[i + offset] = FIELD_GET(CDNS_MCP_RESP_RDATA, cdns->response_buf[i]); + if (msg->flags == SDW_MSG_FLAG_READ) { + /* fill response */ + for (i = 0; i < count; i++) + msg->buf[i + offset] = FIELD_GET(CDNS_MCP_RESP_RDATA, + cdns->response_buf[i]); + } return SDW_CMD_OK; } -- 2.35.1

1 0

[PATCH AUTOSEL 5.15 22/47] soundwire: intel: fix error handling on dai registration issues
by Sasha Levin 13 Oct '22

13 Oct '22

From: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> [ Upstream commit c6867cda906aadbce5e71efde9c78a26108b2bad ] The call to intel_register_dai() may fail because of memory allocation issues or problems reported by the ASoC core. In all cases, when a error is thrown the component is not registered, it's invalid to unregister it. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Reviewed-by: Rander Wang <rander.wang(a)intel.com> Signed-off-by: Bard Liao <yung-chuan.liao(a)linux.intel.com> Link: https://lore.kernel.org/r/20220919175721.354679-2-yung-chuan.liao@linux.int… Signed-off-by: Vinod Koul <vkoul(a)kernel.org> Signed-off-by: Sasha Levin <sashal(a)kernel.org> --- drivers/soundwire/intel.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/soundwire/intel.c b/drivers/soundwire/intel.c index 38e7f1a2bb97..89ee033f0c35 100644 --- a/drivers/soundwire/intel.c +++ b/drivers/soundwire/intel.c @@ -1407,7 +1407,6 @@ int intel_link_startup(struct auxiliary_device *auxdev) ret = intel_register_dai(sdw); if (ret) { dev_err(dev, "DAI registration failed: %d\n", ret); - snd_soc_unregister_component(dev); goto err_interrupt; } -- 2.35.1

1 0

[PATCH AUTOSEL 5.15 21/47] soundwire: cadence: Don't overwrite msg->buf during write commands
by Sasha Levin 13 Oct '22

13 Oct '22

From: Richard Fitzgerald <rf(a)opensource.cirrus.com> [ Upstream commit ba05b39d265bdd16913f7684600d9d41e2796745 ] The buf passed in struct sdw_msg must only be written for a READ, in that case the RDATA part of the response is the data value of the register. For a write command there is no RDATA, and buf should be assumed to be const and unmodifable. The original caller should not expect its data buffer to be corrupted by an sdw_nwrite(). Signed-off-by: Richard Fitzgerald <rf(a)opensource.cirrus.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Link: https://lore.kernel.org/r/20220916103505.1562210-1-rf@opensource.cirrus.com Signed-off-by: Vinod Koul <vkoul(a)kernel.org> Signed-off-by: Sasha Levin <sashal(a)kernel.org> --- drivers/soundwire/cadence_master.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/soundwire/cadence_master.c b/drivers/soundwire/cadence_master.c index 4fcc3ba93004..18d2f9b3e201 100644 --- a/drivers/soundwire/cadence_master.c +++ b/drivers/soundwire/cadence_master.c @@ -545,9 +545,12 @@ cdns_fill_msg_resp(struct sdw_cdns *cdns, return SDW_CMD_IGNORED; } - /* fill response */ - for (i = 0; i < count; i++) - msg->buf[i + offset] = FIELD_GET(CDNS_MCP_RESP_RDATA, cdns->response_buf[i]); + if (msg->flags == SDW_MSG_FLAG_READ) { + /* fill response */ + for (i = 0; i < count; i++) + msg->buf[i + offset] = FIELD_GET(CDNS_MCP_RESP_RDATA, + cdns->response_buf[i]); + } return SDW_CMD_OK; } -- 2.35.1

1 0

[PATCH AUTOSEL 5.19 28/63] soundwire: intel: fix error handling on dai registration issues
by Sasha Levin 13 Oct '22

13 Oct '22

From: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> [ Upstream commit c6867cda906aadbce5e71efde9c78a26108b2bad ] The call to intel_register_dai() may fail because of memory allocation issues or problems reported by the ASoC core. In all cases, when a error is thrown the component is not registered, it's invalid to unregister it. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Reviewed-by: Rander Wang <rander.wang(a)intel.com> Signed-off-by: Bard Liao <yung-chuan.liao(a)linux.intel.com> Link: https://lore.kernel.org/r/20220919175721.354679-2-yung-chuan.liao@linux.int… Signed-off-by: Vinod Koul <vkoul(a)kernel.org> Signed-off-by: Sasha Levin <sashal(a)kernel.org> --- drivers/soundwire/intel.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/soundwire/intel.c b/drivers/soundwire/intel.c index 505c5ef061e3..865d91ecb862 100644 --- a/drivers/soundwire/intel.c +++ b/drivers/soundwire/intel.c @@ -1401,7 +1401,6 @@ int intel_link_startup(struct auxiliary_device *auxdev) ret = intel_register_dai(sdw); if (ret) { dev_err(dev, "DAI registration failed: %d\n", ret); - snd_soc_unregister_component(dev); goto err_interrupt; } -- 2.35.1

1 0

[PATCH AUTOSEL 5.19 27/63] soundwire: cadence: Don't overwrite msg->buf during write commands
by Sasha Levin 13 Oct '22

13 Oct '22

From: Richard Fitzgerald <rf(a)opensource.cirrus.com> [ Upstream commit ba05b39d265bdd16913f7684600d9d41e2796745 ] The buf passed in struct sdw_msg must only be written for a READ, in that case the RDATA part of the response is the data value of the register. For a write command there is no RDATA, and buf should be assumed to be const and unmodifable. The original caller should not expect its data buffer to be corrupted by an sdw_nwrite(). Signed-off-by: Richard Fitzgerald <rf(a)opensource.cirrus.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Link: https://lore.kernel.org/r/20220916103505.1562210-1-rf@opensource.cirrus.com Signed-off-by: Vinod Koul <vkoul(a)kernel.org> Signed-off-by: Sasha Levin <sashal(a)kernel.org> --- drivers/soundwire/cadence_master.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/soundwire/cadence_master.c b/drivers/soundwire/cadence_master.c index 4fbb19557f5e..42c5fae80efb 100644 --- a/drivers/soundwire/cadence_master.c +++ b/drivers/soundwire/cadence_master.c @@ -544,9 +544,12 @@ cdns_fill_msg_resp(struct sdw_cdns *cdns, return SDW_CMD_IGNORED; } - /* fill response */ - for (i = 0; i < count; i++) - msg->buf[i + offset] = FIELD_GET(CDNS_MCP_RESP_RDATA, cdns->response_buf[i]); + if (msg->flags == SDW_MSG_FLAG_READ) { + /* fill response */ + for (i = 0; i < count; i++) + msg->buf[i + offset] = FIELD_GET(CDNS_MCP_RESP_RDATA, + cdns->response_buf[i]); + } return SDW_CMD_OK; } -- 2.35.1

1 0

[PATCH AUTOSEL 6.0 29/67] soundwire: intel: fix error handling on dai registration issues
by Sasha Levin 13 Oct '22

13 Oct '22

From: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> [ Upstream commit c6867cda906aadbce5e71efde9c78a26108b2bad ] The call to intel_register_dai() may fail because of memory allocation issues or problems reported by the ASoC core. In all cases, when a error is thrown the component is not registered, it's invalid to unregister it. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Reviewed-by: Rander Wang <rander.wang(a)intel.com> Signed-off-by: Bard Liao <yung-chuan.liao(a)linux.intel.com> Link: https://lore.kernel.org/r/20220919175721.354679-2-yung-chuan.liao@linux.int… Signed-off-by: Vinod Koul <vkoul(a)kernel.org> Signed-off-by: Sasha Levin <sashal(a)kernel.org> --- drivers/soundwire/intel.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/soundwire/intel.c b/drivers/soundwire/intel.c index 89d1d0d021fc..af6c1a93372d 100644 --- a/drivers/soundwire/intel.c +++ b/drivers/soundwire/intel.c @@ -1429,7 +1429,6 @@ int intel_link_startup(struct auxiliary_device *auxdev) ret = intel_register_dai(sdw); if (ret) { dev_err(dev, "DAI registration failed: %d\n", ret); - snd_soc_unregister_component(dev); goto err_interrupt; } -- 2.35.1

1 0

[PATCH AUTOSEL 6.0 28/67] soundwire: cadence: Don't overwrite msg->buf during write commands
by Sasha Levin 13 Oct '22

13 Oct '22

From: Richard Fitzgerald <rf(a)opensource.cirrus.com> [ Upstream commit ba05b39d265bdd16913f7684600d9d41e2796745 ] The buf passed in struct sdw_msg must only be written for a READ, in that case the RDATA part of the response is the data value of the register. For a write command there is no RDATA, and buf should be assumed to be const and unmodifable. The original caller should not expect its data buffer to be corrupted by an sdw_nwrite(). Signed-off-by: Richard Fitzgerald <rf(a)opensource.cirrus.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Link: https://lore.kernel.org/r/20220916103505.1562210-1-rf@opensource.cirrus.com Signed-off-by: Vinod Koul <vkoul(a)kernel.org> Signed-off-by: Sasha Levin <sashal(a)kernel.org> --- drivers/soundwire/cadence_master.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/soundwire/cadence_master.c b/drivers/soundwire/cadence_master.c index 4fbb19557f5e..42c5fae80efb 100644 --- a/drivers/soundwire/cadence_master.c +++ b/drivers/soundwire/cadence_master.c @@ -544,9 +544,12 @@ cdns_fill_msg_resp(struct sdw_cdns *cdns, return SDW_CMD_IGNORED; } - /* fill response */ - for (i = 0; i < count; i++) - msg->buf[i + offset] = FIELD_GET(CDNS_MCP_RESP_RDATA, cdns->response_buf[i]); + if (msg->flags == SDW_MSG_FLAG_READ) { + /* fill response */ + for (i = 0; i < count; i++) + msg->buf[i + offset] = FIELD_GET(CDNS_MCP_RESP_RDATA, + cdns->response_buf[i]); + } return SDW_CMD_OK; } -- 2.35.1

1 0

[PATCH v1 0/5] Support System Suspend and Resume for CS35L41 HDA
by Stefan Binding 12 Oct '22

12 Oct '22

The CS35L41 HDA driver currently only supports runtime suspend and resume. Add support for system suspend and resume into the CS35L41 HDA driver. The driver will put the parts into a state where they can be powered down during suspend, and on system resume, it will restore the part. If firmware was previously loaded, during system suspend, the firmware will be unloaded, and during system resume, it will be loaded again. Note: System suspend is only supported for models which use Internal Boost, or models which use External Boost with a Boost Enable GPIO. The chain also contains minor bug fixes for the CS35L41 HDA driver, and associated hda_cs_dsp_ctl driver. Richard Fitzgerald (1): ALSA: hda/cs_dsp_ctl: Fix mutex inversion when creating controls Stefan Binding (4): ALSA: hda: hda_cs_dsp_ctl: Minor clean and redundant code removal ALSA: hda: hda_cs_dsp_ctl: Ensure pwr_lock is held before reading/writing controls ALSA: hda: cs35l41: Remove suspend/resume hda hooks ALSA: hda: cs35l41: Support System Suspend sound/pci/hda/cs35l41_hda.c | 197 +++++++++++++++++++++++++-------- sound/pci/hda/hda_component.h | 2 - sound/pci/hda/hda_cs_dsp_ctl.c | 79 +++++++------ sound/pci/hda/hda_cs_dsp_ctl.h | 2 +- sound/pci/hda/patch_realtek.c | 19 +--- 5 files changed, 198 insertions(+), 101 deletions(-) -- 2.34.1

2 6

Re: Fw: [External] RE: [PATCH -next] ASoC: amd: yc: Adding Lenovo ThinkBook 14 Gen 4+ ARA and Lenovo ThinkBook 16 Gen 4+ ARA to the Quirks List
by Mark Pearson 11 Oct '22

11 Oct '22

<moved to my more open-source friendly email account> Thanks Mario On 2022-10-11 13:14, Mark Pearson wrote: > > -------------------------------------------------------------------------------- > *From:* Limonciello, Mario <Mario.Limonciello(a)amd.com> > *Sent:* October 11, 2022 13:08 > *Subject:* [External] RE: [PATCH -next] ASoC: amd: yc: Adding Lenovo ThinkBook > 14 Gen 4+ ARA and Lenovo ThinkBook 16 Gen 4+ ARA to the Quirks List > [Public] > > Cc: > Mark Pearson > Vijendar > Syed > Renjith > >> -----Original Message----- >> From: linkt <xazrael(a)hotmail.com> >> Sent: Monday, October 10, 2022 21:52 >> To: lgirdwood(a)gmail.com; broonie(a)kernel.org; perex(a)perex.cz; >> tiwai(a)suse.com; Limonciello, Mario <Mario.Limonciello(a)amd.com> >> Cc: alsa-devel(a)alsa-project.org; linux-kernel(a)vger.kernel.org; linkt >> <xazrael(a)hotmail.com> >> Subject: [PATCH -next] ASoC: amd: yc: Adding Lenovo ThinkBook 14 Gen 4+ >> ARA and Lenovo ThinkBook 16 Gen 4+ ARA to the Quirks List >> >> Lenovo ThinkBook 14 Gen 4+ ARA and ThinkBook 16 Gen 4+ ARA >> need to be added to the list of quirks for the microphone to work properly. >> >> Signed-off-by: linkt <xazrael(a)hotmail.com> > > This patch alone makes sense to me. > > Cc: stable(a)vger.kernel.org > Reviewed-by: Mario Limonciello <mario.limonciello(a)amd.com> > > I think it should go in as is, but it prompts another idea to me I want to run by > Mark specifically.. > > Should we just drop this whole file down to a much simpler DMI match prefix like > this: > >> + { >> + .driver_data = &acp6x_card, >> + .matches = { >> + DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"), >> + DMI_MATCH(DMI_PRODUCT_NAME, "21"), >> + } >> + }, > > That would allow it to match all the Lenovo Rembrandt systems presumably and > can stop touching the file. This only makes sense if every single Lenovo > Rembrandt design > uses a DMIC from ACP. I don't know if that's a valid assumption and I think we > need Mark > to confirm it. > > The DMI match "technically" would match some of the Intel systems from this > generation > but this driver is only "loaded" on AMD Rembrandt systems, so I don't think it's > a problem. > I love the idea but I'm a little hesitant as I don't know if I'll be able to confirm it authoritatively - I don't have particularly great levers to pull on for platforms outside the Linux program. I'll try - but I think chances of being able to reply yes or no with confidence are limited. I think it's relatively low risk for breaking anything on this years platforms - but may get more interesting for next years. If needed can we then just quirk any platforms that come up that need the logic reversing or does that get really messy. I can confirm the "21" match is going to be match a ton of Intel platforms. For the AMD platforms - will this be limited to Rembrandt only or will it affect any past/future generations? Short answer - I'll see what I can find...but no promises Mark

2 1

Re: [PATCH v2 02/36] gpiolib: cdev: Add missed header(s)
by Andy Shevchenko 11 Oct '22

11 Oct '22

On Tue, Oct 11, 2022 at 11:05:42AM +0300, Andy Shevchenko wrote: > On Tue, Oct 11, 2022 at 3:02 AM Kent Gibson <warthog618(a)gmail.com> wrote: > > On Mon, Oct 10, 2022 at 11:14:18PM +0300, Andy Shevchenko wrote: ... > > > -#include <linux/gpio.h> > > > #include <linux/gpio/driver.h> > > > +#include <linux/gpio.h> > > > +#include <linux/hte.h> > > > > Ok with the hte re-order. > > > > But moving the gpio subsystem header after the gpio/driver is not > > alphabetical ('.' precedes '/') and it read better and made more sense > > to me the way it was. > > I see, I guess this is vim sort vs shell sort. Strange, they should > follow the locale settings... I have checked, the shell and vim sort gave the same result as in this patch. -- With Best Regards, Andy Shevchenko

3 5

Add support for listing compress devices
by GitHub issues - opened 11 Oct '22

11 Oct '22

alsa-project/tinycompress issue #17 was opened from dbaluta: Similar with `aplay -l` we need an option to list compress devices. `cplay -l`. Issue URL : https://github.com/alsa-project/tinycompress/issues/17 Repository URL: https://github.com/alsa-project/tinycompress

1 0

[PATCH 1/2] ALSA: rawmidi: Drop register_mutex in snd_rawmidi_free()
by Takashi Iwai 11 Oct '22

11 Oct '22

The register_mutex taken around the dev_unregister callback call in snd_rawmidi_free() may potentially lead to a mutex deadlock, when OSS emulation and a hot unplug are involved. Since the mutex doesn't protect the actual race (as the registration itself is already protected by another means), let's drop it. Link: https://lore.kernel.org/r/CAB7eexJP7w1B0mVgDF0dQ+gWor7UdkiwPczmL7pn91xx8xpz… Cc: <stable(a)vger.kernel.org> Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- sound/core/rawmidi.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/sound/core/rawmidi.c b/sound/core/rawmidi.c index 6963d5a487b3..d8edb6055072 100644 --- a/sound/core/rawmidi.c +++ b/sound/core/rawmidi.c @@ -1899,10 +1899,8 @@ static int snd_rawmidi_free(struct snd_rawmidi *rmidi) snd_info_free_entry(rmidi->proc_entry); rmidi->proc_entry = NULL; - mutex_lock(&register_mutex); if (rmidi->ops && rmidi->ops->dev_unregister) rmidi->ops->dev_unregister(rmidi); - mutex_unlock(&register_mutex); snd_rawmidi_free_substreams(&rmidi->streams[SNDRV_RAWMIDI_STREAM_INPUT]); snd_rawmidi_free_substreams(&rmidi->streams[SNDRV_RAWMIDI_STREAM_OUTPUT]); -- 2.35.3

1 1

[PATCH] ALSA: hda/realtek: Add Intel Reference SSID to support headset keys
by Saranya Gopal 11 Oct '22

11 Oct '22

This patch fixes the issue with 3.5mm headset keys on RPL-P platform. Signed-off-by: Saranya Gopal <saranya.gopal(a)intel.com> Signed-off-by: Ninad Naik <ninad.naik(a)intel.com> --- sound/pci/hda/patch_realtek.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index bce82b834cec..4ea07634548d 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -9444,6 +9444,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { SND_PCI_QUIRK(0x10ec, 0x118c, "Medion EE4254 MD62100", ALC256_FIXUP_MEDION_HEADSET_NO_PRESENCE), SND_PCI_QUIRK(0x10ec, 0x1230, "Intel Reference board", ALC295_FIXUP_CHROME_BOOK), SND_PCI_QUIRK(0x10ec, 0x1252, "Intel Reference board", ALC295_FIXUP_CHROME_BOOK), + SND_PCI_QUIRK(0x10ec, 0x124c, "Intel Reference board", ALC295_FIXUP_CHROME_BOOK), SND_PCI_QUIRK(0x10ec, 0x1254, "Intel Reference board", ALC295_FIXUP_CHROME_BOOK), SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-SZ6", ALC269_FIXUP_HEADSET_MODE), SND_PCI_QUIRK(0x144d, 0xc109, "Samsung Ativ book 9 (NP900X3G)", ALC269_FIXUP_INV_DMIC), -- 2.25.1

2 1

If system has Dmic, variable DeviceDmic will be empty
by GitHub pull_request - opened 11 Oct '22

11 Oct '22

alsa-project/alsa-ucm-conf pull request #228 was opened from xanthein: change condition from False to True to configure Dmic0 correctly Request URL : https://github.com/alsa-project/alsa-ucm-conf/pull/228 Patch URL : https://github.com/alsa-project/alsa-ucm-conf/pull/228.patch Repository URL: https://github.com/alsa-project/alsa-ucm-conf

1 0

[PATCH v2] ASoC: wm8731: fix build when I2C is not enabled
by Randy Dunlap 11 Oct '22

11 Oct '22

Building wm8731-i2c.c has a kconfig warning and build errors when I2C is not enabled, so prevent that kconfig-uration. WARNING: unmet direct dependencies detected for SND_SOC_WM8731_I2C Depends on [n]: SOUND [=y] && !UML && SND [=m] && SND_SOC [=m] && I2C [=n] Selected by [m]: - SND_SOC_DB1200 [=m] && SOUND [=y] && !UML && SND [=m] && SND_SOC [=m] && SND_SOC_AU1XPSC [=m] and subsequent build errors: ../sound/soc/codecs/wm8731-i2c.c:64:1: warning: data definition has no type or storage class 64 | module_i2c_driver(wm8731_i2c_driver); ../sound/soc/codecs/wm8731-i2c.c:64:1: error: type defaults to 'int' in declaration of 'module_i2c_driver' [-Werror=implicit-int] ../sound/soc/codecs/wm8731-i2c.c:64:1: warning: parameter names (without types) in function declaration ../sound/soc/codecs/wm8731-i2c.c:55:26: warning: 'wm8731_i2c_driver' defined but not used [-Wunused-variable] 55 | static struct i2c_driver wm8731_i2c_driver = { Fixes: 9dc15f81baf2 ("ASoC: wm8731: Factor out the I2C and SPI bus code into separate modules") Reported-by: kernel test robot <lkp(a)intel.com> Signed-off-by: Randy Dunlap <rdunlap(a)infradead.org> Cc: Mark Brown <broonie(a)kernel.org> Cc: Liam Girdwood <lgirdwood(a)gmail.com> Cc: alsa-devel(a)alsa-project.org Cc: Jaroslav Kysela <perex(a)perex.cz> Cc: Takashi Iwai <tiwai(a)suse.com> --- v2: add Takashi's email address sound/soc/au1x/Kconfig | 1 + 1 file changed, 1 insertion(+) diff sound/soc/au1x/Kconfig sound/soc/au1x/Kconfig --- a/sound/soc/au1x/Kconfig +++ b/sound/soc/au1x/Kconfig @@ -54,6 +54,7 @@ config SND_SOC_DB1000 config SND_SOC_DB1200 tristate "DB1200/DB1300/DB1550 Audio support" depends on SND_SOC_AU1XPSC + depends on I2C select SND_SOC_AU1XPSC_AC97 select SND_SOC_AC97_CODEC select SND_SOC_WM9712

1 0

[PATCH] Fixes bc2c23549ccd ("ALSA: hda/realtek: Add pincfg for ASUS G533Z HP jack")
by Luke D. Jones 11 Oct '22

11 Oct '22

The initial fix for ASUS G533Z was based on faulty information. This fixes the pincfg to values that have been verified with no existing module options or other hacks enabled. Enables headphone jack, and 5.1 surround. Signed-off-by: Luke D. Jones <luke(a)ljones.dev> --- sound/pci/hda/patch_realtek.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index bce82b834cec..24406f81da27 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -8449,11 +8449,13 @@ static const struct hda_fixup alc269_fixups[] = { [ALC285_FIXUP_ASUS_G533Z_PINS] = { .type = HDA_FIXUP_PINS, .v.pins = (const struct hda_pintbl[]) { - { 0x14, 0x90170120 }, - { } + { 0x14, 0x90170152 }, /* Speaker Surround Playback Switch */ + { 0x19, 0x03a19020 }, /* Mic Boost Volume */ + { 0x1a, 0x03a11c30 }, /* Mic Boost Volume */ + { 0x1e, 0x90170151 }, /* Rear jack, IN OUT EAPD Detect */ + { 0x21, 0x03211420 }, + { } }, - .chained = true, - .chain_id = ALC294_FIXUP_ASUS_G513_PINS, }, [ALC294_FIXUP_ASUS_COEF_1B] = { .type = HDA_FIXUP_VERBS, -- 2.37.3

3 2

topology: nhlt: intel: ssp: fix obvious typo for 'codec_provider'
by GitHub pull_request - opened 10 Oct '22

10 Oct '22

alsa-project/alsa-utils pull request #174 was opened from plbossart: Looks like a bad search and replace? Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Request URL : https://github.com/alsa-project/alsa-utils/pull/174 Patch URL : https://github.com/alsa-project/alsa-utils/pull/174.patch Repository URL: https://github.com/alsa-project/alsa-utils

1 0

unable to install alsa-utils with newest pulseaudio
by GitHub issues - opened 10 Oct '22

10 Oct '22

alsa-project/alsa-utils issue #173 was opened from voncloft: I installed and upgraded pulse audio to version 16.1 I keep receiving the following error when trying to upgrade alsa-utils (the latest version): `/bin/sh ../libtool --tag=CC --mode=link gcc -Wall -g -D_REENTRANT -D_GNU_SOURCE -g -O2 -module -avoid-version -export-dynamic -no-undefined -Wl,-z,defs -o libasound_module_conf_pulse.la -rpath /usr/lib/alsa-lib conf_pulse.lo -lasound -lpulse -pthread -lasound /bin/grep: /usr/lib/pulseaudio/libpulsecommon-13.0.la: No such file or directory /bin/sed: can't read /usr/lib/pulseaudio/libpulsecommon-13.0.la: No such file or directory libtool: error: '/usr/lib/pulseaudio/libpulsecommon-13.0.la' is not a valid libtool archive make[2]: *** [Makefile:535: libasound_module_conf_pulse.la] Error 1 make[2]: Leaving directory '/sources/alsa-plugins/pulse' make[1]: *** [Makefile:444: all-recursive] Error 1 make[1]: Leaving directory '/sources/alsa-plugins' make: *** [Makefile:376: all] Error 2` What exactly is going on here? Issue URL : https://github.com/alsa-project/alsa-utils/issues/173 Repository URL: https://github.com/alsa-project/alsa-utils

1 0

[PATCH] ALSA: hda/realtek: Add quirk for ASUS GV601R laptop
by Luke D. Jones 10 Oct '22

10 Oct '22

The ASUS ROG X16 (GV601R) series laptop has the same node-to-DAC pairs as early models and the G14, this includes bass speakers which are by default mapped incorrectly to the 0x06 node. Add a quirk to use the same DAC pairs as the G14. Signed-off-by: Luke D. Jones <luke(a)ljones.dev> --- sound/pci/hda/patch_realtek.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index bce82b834cec..1ffea762ba57 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -9422,6 +9422,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { SND_PCI_QUIRK(0x1043, 0x1e8e, "ASUS Zephyrus G15", ALC289_FIXUP_ASUS_GA401), SND_PCI_QUIRK(0x1043, 0x1c52, "ASUS Zephyrus G15 2022", ALC289_FIXUP_ASUS_GA401), SND_PCI_QUIRK(0x1043, 0x1f11, "ASUS Zephyrus G14", ALC289_FIXUP_ASUS_GA401), + SND_PCI_QUIRK(0x1043, 0x1f92, "ASUS ROG Flow X16", ALC289_FIXUP_ASUS_GA401), SND_PCI_QUIRK(0x1043, 0x3030, "ASUS ZN270IE", ALC256_FIXUP_ASUS_AIO_GPIO2), SND_PCI_QUIRK(0x1043, 0x831a, "ASUS P901", ALC269_FIXUP_STEREO_DMIC), SND_PCI_QUIRK(0x1043, 0x834a, "ASUS S101", ALC269_FIXUP_STEREO_DMIC), -- 2.37.3

2 1

Mute PC Speaker by default
by GitHub issues - opened 10 Oct '22

10 Oct '22

alsa-project/alsa-utils issue #172 was opened from lnussel: SUSE has a [preset](https://build.opensuse.org/package/view_file/openSUSE:Factory/alsa-… to mute the PC speaker by default as it can be quite annoying (https://bugzilla.suse.com/show_bug.cgi?id=767270). Would it make sense to include that upstream? Issue URL : https://github.com/alsa-project/alsa-utils/issues/172 Repository URL: https://github.com/alsa-project/alsa-utils

1 0

[PATCH 00/15] ASoC: Intel: avs: Fixes and new boards support
by Cezary Rojewski 10 Oct '22

10 Oct '22

Two fixes are leading the way - one addresses the incorrect DMA mask assignment (typo) at driver probe. The other, fixes a potential buffer overflow when copying data received from firmware to kernel buffer. However unlikely, the fix should still be there. Then a range of patches providing the support for: - AML with rt286 (machine board) - KBL-R for rt298 (codec) - KBL-R with rt298 (machine board) - APL/KBL with da7219 (machine board) - Addition of all the missing SKL-based PCI ids to core.c Of the remaining changes, only one stands out - special case is provided for "unsupported" IPCs. The driver supports a range of platforms, however, on some generations given IPC may not be supported. Such call shall not be treated as "invalid" - those are two different scenarios. Everything else in the patchset is mostly a readability improvement: spelling fixes and log messages issues, code simplification. Amadeusz Sławiński (4): ASoC: codecs: rt298: Add quirk for KBL-R RVP platform ASoC: Intel: avs: Add quirk for KBL-R RVP platform ASoC: Intel: avs: Support da7219 on both KBL and APL ASoC: Intel: avs: Add missing include to HDA board Cezary Rojewski (11): ASoC: Intel: avs: Fix DMA mask assignment ASoC: Intel: avs: Fix potential RX buffer overflow ASoC: Intel: avs: Support AML with rt286 configuration ASoC: Intel: avs: Add missing SKL-based device IDs ASoC: Intel: avs: Simplify d0ix disabling routine ASoC: Intel: avs: Do not reuse msg between different IPC handlers ASoC: Intel: avs: Do not treat unsupported IPCs as invalid ASoC: Intel: avs: Do not print IPC error message twice ASoC: Intel: avs: Simplify ignore_fw_version description ASoC: Intel: avs: Simplify log control for SKL ASoC: codecs: hda: Fix spelling error in log message sound/soc/codecs/hda.c | 2 +- sound/soc/codecs/rt298.c | 7 +++++++ sound/soc/intel/avs/apl.c | 6 ++++-- sound/soc/intel/avs/avs.h | 4 +++- sound/soc/intel/avs/board_selection.c | 6 ++++++ sound/soc/intel/avs/boards/da7219.c | 6 +++++- sound/soc/intel/avs/boards/hdaudio.c | 1 + sound/soc/intel/avs/boards/rt298.c | 24 ++++++++++++++++++++++-- sound/soc/intel/avs/core.c | 6 +++++- sound/soc/intel/avs/ipc.c | 5 +++-- sound/soc/intel/avs/loader.c | 2 +- sound/soc/intel/avs/messages.c | 19 ++++--------------- sound/soc/intel/avs/messages.h | 2 ++ sound/soc/intel/avs/skl.c | 4 ++-- 14 files changed, 66 insertions(+), 28 deletions(-) -- 2.25.1

1 16

[PATCH -next 0/3] Revert old "Fix PM disable depth imbalance in wmxxxx_probe"
by Zhang Qilong 10 Oct '22

10 Oct '22

Both the old and new patch have been applied, it will resulted in redundant calling of pm_runtime_disable when error returns. We Just revert the old three patches to fix it. Zhang Qilong (3): Revert "ASoC: wm5102: Fix PM disable depth imbalance in wm5102_probe" Revert "ASoC: wm5110: Fix PM disable depth imbalance in wm5110_probe" Revert "ASoC: wm8997: Fix PM disable depth imbalance in wm8997_probe" sound/soc/codecs/wm5102.c | 6 +++--- sound/soc/codecs/wm5110.c | 6 +++--- sound/soc/codecs/wm8997.c | 6 +++--- 3 files changed, 9 insertions(+), 9 deletions(-) -- 2.25.1

3 5

[PATCH AUTOSEL 5.4 05/14] ALSA: usb-audio: Add quirk to enable Avid Mbox 3 support
by Sasha Levin 10 Oct '22

10 Oct '22

From: Conner Knox <connerknoxpublic(a)gmail.com> [ Upstream commit b01104fc62b6194c852124f6c6df1c0a5c031fc1 ] Add support for Avid Mbox3 USB audio interface at 48kHz Signed-off-by: Conner Knox <connerknoxpublic(a)gmail.com> Link: https://lore.kernel.org/r/20220818201433.16360-1-mbarriolinares@gmail.com Signed-off-by: Takashi Iwai <tiwai(a)suse.de> Signed-off-by: Sasha Levin <sashal(a)kernel.org> --- sound/usb/quirks-table.h | 76 ++++++++++ sound/usb/quirks.c | 302 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 378 insertions(+) diff --git a/sound/usb/quirks-table.h b/sound/usb/quirks-table.h index c29ccdf9e8bc..79c97bde81fd 100644 --- a/sound/usb/quirks-table.h +++ b/sound/usb/quirks-table.h @@ -3175,6 +3175,82 @@ AU0828_DEVICE(0x2040, 0x7270, "Hauppauge", "HVR-950Q"), } } }, +/* DIGIDESIGN MBOX 3 */ +{ + USB_DEVICE(0x0dba, 0x5000), + .driver_info = (unsigned long) &(const struct snd_usb_audio_quirk) { + .vendor_name = "Digidesign", + .product_name = "Mbox 3", + .ifnum = QUIRK_ANY_INTERFACE, + .type = QUIRK_COMPOSITE, + .data = (const struct snd_usb_audio_quirk[]) { + { + .ifnum = 0, + .type = QUIRK_IGNORE_INTERFACE + }, + { + .ifnum = 1, + .type = QUIRK_IGNORE_INTERFACE + }, + { + .ifnum = 2, + .type = QUIRK_AUDIO_FIXED_ENDPOINT, + .data = &(const struct audioformat) { + .formats = SNDRV_PCM_FMTBIT_S24_3LE, + .channels = 4, + .iface = 2, + .altsetting = 1, + .altset_idx = 1, + .attributes = 0x00, + .endpoint = 0x01, + .ep_attr = USB_ENDPOINT_XFER_ISOC | + USB_ENDPOINT_SYNC_ASYNC, + .rates = SNDRV_PCM_RATE_48000, + .rate_min = 48000, + .rate_max = 48000, + .nr_rates = 1, + .rate_table = (unsigned int[]) { + 48000 + } + } + }, + { + .ifnum = 3, + .type = QUIRK_AUDIO_FIXED_ENDPOINT, + .data = &(const struct audioformat) { + .formats = SNDRV_PCM_FMTBIT_S24_3LE, + .channels = 4, + .iface = 3, + .altsetting = 1, + .altset_idx = 1, + .endpoint = 0x81, + .attributes = 0x00, + .ep_attr = USB_ENDPOINT_XFER_ISOC | + USB_ENDPOINT_SYNC_ASYNC, + .maxpacksize = 0x009c, + .rates = SNDRV_PCM_RATE_48000, + .rate_min = 48000, + .rate_max = 48000, + .nr_rates = 1, + .rate_table = (unsigned int[]) { + 48000 + } + } + }, + { + .ifnum = 4, + .type = QUIRK_MIDI_FIXED_ENDPOINT, + .data = &(const struct snd_usb_midi_endpoint_info) { + .out_cables = 0x0001, + .in_cables = 0x0001 + } + }, + { + .ifnum = -1 + } + } + } +}, { /* Tascam US122 MKII - playback-only support */ .match_flags = USB_DEVICE_ID_MATCH_DEVICE, diff --git a/sound/usb/quirks.c b/sound/usb/quirks.c index 72223545abfd..1d317ae2929d 100644 --- a/sound/usb/quirks.c +++ b/sound/usb/quirks.c @@ -1018,6 +1018,304 @@ static int snd_usb_axefx3_boot_quirk(struct usb_device *dev) return 0; } +static void mbox3_setup_48_24_magic(struct usb_device *dev) +{ + /* The Mbox 3 is "little endian" */ + /* max volume is: 0x0000. */ + /* min volume is: 0x0080 (shown in little endian form) */ + + + /* Load 48000Hz rate into buffer */ + u8 com_buff[4] = {0x80, 0xbb, 0x00, 0x00}; + + /* Set 48000Hz sample rate */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 0x01, 0x21, 0x0100, 0x0001, &com_buff, 4); //Is this really needed? + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 0x01, 0x21, 0x0100, 0x8101, &com_buff, 4); + + /* Deactivate Tuner */ + /* on = 0x01*/ + /* off = 0x00*/ + com_buff[0] = 0x00; + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 0x01, 0x21, 0x0003, 0x2001, &com_buff, 1); + + /* Set clock source to Internal (as opposed to S/PDIF) */ + com_buff[0] = 0x01; + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0100, 0x8001, &com_buff, 1); + + /* Mute the hardware loopbacks to start the device in a known state. */ + com_buff[0] = 0x00; + com_buff[1] = 0x80; + /* Analogue input 1 left channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0110, 0x4001, &com_buff, 2); + /* Analogue input 1 right channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0111, 0x4001, &com_buff, 2); + /* Analogue input 2 left channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0114, 0x4001, &com_buff, 2); + /* Analogue input 2 right channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0115, 0x4001, &com_buff, 2); + /* Analogue input 3 left channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0118, 0x4001, &com_buff, 2); + /* Analogue input 3 right channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0119, 0x4001, &com_buff, 2); + /* Analogue input 4 left channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x011c, 0x4001, &com_buff, 2); + /* Analogue input 4 right channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x011d, 0x4001, &com_buff, 2); + + /* Set software sends to output */ + com_buff[0] = 0x00; + com_buff[1] = 0x00; + /* Analogue software return 1 left channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0100, 0x4001, &com_buff, 2); + com_buff[0] = 0x00; + com_buff[1] = 0x80; + /* Analogue software return 1 right channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0101, 0x4001, &com_buff, 2); + com_buff[0] = 0x00; + com_buff[1] = 0x80; + /* Analogue software return 2 left channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0104, 0x4001, &com_buff, 2); + com_buff[0] = 0x00; + com_buff[1] = 0x00; + /* Analogue software return 2 right channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0105, 0x4001, &com_buff, 2); + + com_buff[0] = 0x00; + com_buff[1] = 0x80; + /* Analogue software return 3 left channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0108, 0x4001, &com_buff, 2); + /* Analogue software return 3 right channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0109, 0x4001, &com_buff, 2); + /* Analogue software return 4 left channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x010c, 0x4001, &com_buff, 2); + /* Analogue software return 4 right channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x010d, 0x4001, &com_buff, 2); + + /* Return to muting sends */ + com_buff[0] = 0x00; + com_buff[1] = 0x80; + /* Analogue fx return left channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0120, 0x4001, &com_buff, 2); + /* Analogue fx return right channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0121, 0x4001, &com_buff, 2); + + /* Analogue software input 1 fx send: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0100, 0x4201, &com_buff, 2); + /* Analogue software input 2 fx send: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0101, 0x4201, &com_buff, 2); + /* Analogue software input 3 fx send: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0102, 0x4201, &com_buff, 2); + /* Analogue software input 4 fx send: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0103, 0x4201, &com_buff, 2); + /* Analogue input 1 fx send: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0104, 0x4201, &com_buff, 2); + /* Analogue input 2 fx send: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0105, 0x4201, &com_buff, 2); + /* Analogue input 3 fx send: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0106, 0x4201, &com_buff, 2); + /* Analogue input 4 fx send: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0107, 0x4201, &com_buff, 2); + + /* Toggle allowing host control */ + com_buff[0] = 0x02; + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 3, 0x21, 0x0000, 0x2001, &com_buff, 1); + + /* Do not dim fx returns */ + com_buff[0] = 0x00; + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 3, 0x21, 0x0002, 0x2001, &com_buff, 1); + + /* Do not set fx returns to mono */ + com_buff[0] = 0x00; + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 3, 0x21, 0x0001, 0x2001, &com_buff, 1); + + /* Mute the S/PDIF hardware loopback + * same odd volume logic here as above + */ + com_buff[0] = 0x00; + com_buff[1] = 0x80; + /* S/PDIF hardware input 1 left channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0112, 0x4001, &com_buff, 2); + /* S/PDIF hardware input 1 right channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0113, 0x4001, &com_buff, 2); + /* S/PDIF hardware input 2 left channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0116, 0x4001, &com_buff, 2); + /* S/PDIF hardware input 2 right channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0117, 0x4001, &com_buff, 2); + /* S/PDIF hardware input 3 left channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x011a, 0x4001, &com_buff, 2); + /* S/PDIF hardware input 3 right channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x011b, 0x4001, &com_buff, 2); + /* S/PDIF hardware input 4 left channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x011e, 0x4001, &com_buff, 2); + /* S/PDIF hardware input 4 right channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x011f, 0x4001, &com_buff, 2); + /* S/PDIF software return 1 left channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0102, 0x4001, &com_buff, 2); + /* S/PDIF software return 1 right channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0103, 0x4001, &com_buff, 2); + /* S/PDIF software return 2 left channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0106, 0x4001, &com_buff, 2); + /* S/PDIF software return 2 right channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0107, 0x4001, &com_buff, 2); + + com_buff[0] = 0x00; + com_buff[1] = 0x00; + /* S/PDIF software return 3 left channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x010a, 0x4001, &com_buff, 2); + + com_buff[0] = 0x00; + com_buff[1] = 0x80; + /* S/PDIF software return 3 right channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x010b, 0x4001, &com_buff, 2); + /* S/PDIF software return 4 left channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x010e, 0x4001, &com_buff, 2); + + com_buff[0] = 0x00; + com_buff[1] = 0x00; + /* S/PDIF software return 4 right channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x010f, 0x4001, &com_buff, 2); + + com_buff[0] = 0x00; + com_buff[1] = 0x80; + /* S/PDIF fx returns left channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0122, 0x4001, &com_buff, 2); + /* S/PDIF fx returns right channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0123, 0x4001, &com_buff, 2); + + /* Set the dropdown "Effect" to the first option */ + /* Room1 = 0x00 */ + /* Room2 = 0x01 */ + /* Room3 = 0x02 */ + /* Hall 1 = 0x03 */ + /* Hall 2 = 0x04 */ + /* Plate = 0x05 */ + /* Delay = 0x06 */ + /* Echo = 0x07 */ + com_buff[0] = 0x00; + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0200, 0x4301, &com_buff, 1); /* max is 0xff */ + /* min is 0x00 */ + + + /* Set the effect duration to 0 */ + /* max is 0xffff */ + /* min is 0x0000 */ + com_buff[0] = 0x00; + com_buff[1] = 0x00; + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0400, 0x4301, &com_buff, 2); + + /* Set the effect volume and feedback to 0 */ + /* max is 0xff */ + /* min is 0x00 */ + com_buff[0] = 0x00; + /* feedback: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0500, 0x4301, &com_buff, 1); + /* volume: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0300, 0x4301, &com_buff, 1); + + /* Set soft button hold duration */ + /* 0x03 = 250ms */ + /* 0x05 = 500ms DEFAULT */ + /* 0x08 = 750ms */ + /* 0x0a = 1sec */ + com_buff[0] = 0x05; + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 3, 0x21, 0x0005, 0x2001, &com_buff, 1); + + /* Use dim LEDs for button of state */ + com_buff[0] = 0x00; + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 3, 0x21, 0x0004, 0x2001, &com_buff, 1); +} + +#define MBOX3_DESCRIPTOR_SIZE 464 + +static int snd_usb_mbox3_boot_quirk(struct usb_device *dev) +{ + struct usb_host_config *config = dev->actconfig; + int err; + int descriptor_size; + + descriptor_size = le16_to_cpu(get_cfg_desc(config)->wTotalLength); + + if (descriptor_size != MBOX3_DESCRIPTOR_SIZE) { + dev_err(&dev->dev, "Invalid descriptor size=%d.\n", descriptor_size); + return -ENODEV; + } + + dev_dbg(&dev->dev, "device initialised!\n"); + + err = usb_get_descriptor(dev, USB_DT_DEVICE, 0, + &dev->descriptor, sizeof(dev->descriptor)); + config = dev->actconfig; + if (err < 0) + dev_dbg(&dev->dev, "error usb_get_descriptor: %d\n", err); + + err = usb_reset_configuration(dev); + if (err < 0) + dev_dbg(&dev->dev, "error usb_reset_configuration: %d\n", err); + dev_dbg(&dev->dev, "mbox3_boot: new boot length = %d\n", + le16_to_cpu(get_cfg_desc(config)->wTotalLength)); + + mbox3_setup_48_24_magic(dev); + dev_info(&dev->dev, "Digidesign Mbox 3: 24bit 48kHz"); + + return 0; /* Successful boot */ +} #define MICROBOOK_BUF_SIZE 128 @@ -1304,6 +1602,10 @@ int snd_usb_apply_boot_quirk(struct usb_device *dev, case USB_ID(0x0dba, 0x3000): /* Digidesign Mbox 2 */ return snd_usb_mbox2_boot_quirk(dev); + case USB_ID(0x0dba, 0x5000): + /* Digidesign Mbox 3 */ + return snd_usb_mbox3_boot_quirk(dev); + case USB_ID(0x1235, 0x0010): /* Focusrite Novation Saffire 6 USB */ case USB_ID(0x1235, 0x0018): /* Focusrite Novation Twitch */ -- 2.35.1

1 0

[PATCH AUTOSEL 5.10 15/22] ASoC: SOF: pci: Change DMI match info to support all Chrome platforms
by Sasha Levin 10 Oct '22

10 Oct '22

From: Jairaj Arava <jairaj.arava(a)intel.com> [ Upstream commit c1c1fc8103f794a10c5c15e3c17879caf4f42c8f ] In some Chrome platforms if OEM's use their own string as SYS_VENDOR than "Google", it leads to firmware load failure from intel/sof/community path. Hence, changing SYS_VENDOR to PRODUCT_FAMILY in which "Google" is used as common prefix and is supported in all Chrome platforms. Reviewed-by: Ranjani Sridharan <ranjani.sridharan(a)linux.intel.com> Reviewed-by: Chao Song <chao.song(a)intel.com> Reviewed-by: Curtis Malainey <curtis(a)malainey.com> Signed-off-by: Jairaj Arava <jairaj.arava(a)intel.com> Signed-off-by: Curtis Malainey <cujomalainey(a)chromium.org> Signed-off-by: Sathyanarayana Nujella <sathyanarayana.nujella(a)intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Link: https://lore.kernel.org/r/20220919114429.42700-1-pierre-louis.bossart@linux… Signed-off-by: Mark Brown <broonie(a)kernel.org> Signed-off-by: Sasha Levin <sashal(a)kernel.org> --- sound/soc/sof/sof-pci-dev.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/sof/sof-pci-dev.c b/sound/soc/sof/sof-pci-dev.c index 75657a25dbc0..fe9feaab6a0a 100644 --- a/sound/soc/sof/sof-pci-dev.c +++ b/sound/soc/sof/sof-pci-dev.c @@ -75,7 +75,7 @@ static const struct dmi_system_id community_key_platforms[] = { { .ident = "Google Chromebooks", .matches = { - DMI_MATCH(DMI_SYS_VENDOR, "Google"), + DMI_MATCH(DMI_PRODUCT_FAMILY, "Google"), } }, {}, -- 2.35.1

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[PATCH AUTOSEL 5.10 06/22] ALSA: usb-audio: Add quirk to enable Avid Mbox 3 support
by Sasha Levin 10 Oct '22

10 Oct '22

From: Conner Knox <connerknoxpublic(a)gmail.com> [ Upstream commit b01104fc62b6194c852124f6c6df1c0a5c031fc1 ] Add support for Avid Mbox3 USB audio interface at 48kHz Signed-off-by: Conner Knox <connerknoxpublic(a)gmail.com> Link: https://lore.kernel.org/r/20220818201433.16360-1-mbarriolinares@gmail.com Signed-off-by: Takashi Iwai <tiwai(a)suse.de> Signed-off-by: Sasha Levin <sashal(a)kernel.org> --- sound/usb/quirks-table.h | 76 ++++++++++ sound/usb/quirks.c | 302 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 378 insertions(+) diff --git a/sound/usb/quirks-table.h b/sound/usb/quirks-table.h index 1ac91c46da3c..a7f065567190 100644 --- a/sound/usb/quirks-table.h +++ b/sound/usb/quirks-table.h @@ -3021,6 +3021,82 @@ AU0828_DEVICE(0x2040, 0x7270, "Hauppauge", "HVR-950Q"), } } }, +/* DIGIDESIGN MBOX 3 */ +{ + USB_DEVICE(0x0dba, 0x5000), + .driver_info = (unsigned long) &(const struct snd_usb_audio_quirk) { + .vendor_name = "Digidesign", + .product_name = "Mbox 3", + .ifnum = QUIRK_ANY_INTERFACE, + .type = QUIRK_COMPOSITE, + .data = (const struct snd_usb_audio_quirk[]) { + { + .ifnum = 0, + .type = QUIRK_IGNORE_INTERFACE + }, + { + .ifnum = 1, + .type = QUIRK_IGNORE_INTERFACE + }, + { + .ifnum = 2, + .type = QUIRK_AUDIO_FIXED_ENDPOINT, + .data = &(const struct audioformat) { + .formats = SNDRV_PCM_FMTBIT_S24_3LE, + .channels = 4, + .iface = 2, + .altsetting = 1, + .altset_idx = 1, + .attributes = 0x00, + .endpoint = 0x01, + .ep_attr = USB_ENDPOINT_XFER_ISOC | + USB_ENDPOINT_SYNC_ASYNC, + .rates = SNDRV_PCM_RATE_48000, + .rate_min = 48000, + .rate_max = 48000, + .nr_rates = 1, + .rate_table = (unsigned int[]) { + 48000 + } + } + }, + { + .ifnum = 3, + .type = QUIRK_AUDIO_FIXED_ENDPOINT, + .data = &(const struct audioformat) { + .formats = SNDRV_PCM_FMTBIT_S24_3LE, + .channels = 4, + .iface = 3, + .altsetting = 1, + .altset_idx = 1, + .endpoint = 0x81, + .attributes = 0x00, + .ep_attr = USB_ENDPOINT_XFER_ISOC | + USB_ENDPOINT_SYNC_ASYNC, + .maxpacksize = 0x009c, + .rates = SNDRV_PCM_RATE_48000, + .rate_min = 48000, + .rate_max = 48000, + .nr_rates = 1, + .rate_table = (unsigned int[]) { + 48000 + } + } + }, + { + .ifnum = 4, + .type = QUIRK_MIDI_FIXED_ENDPOINT, + .data = &(const struct snd_usb_midi_endpoint_info) { + .out_cables = 0x0001, + .in_cables = 0x0001 + } + }, + { + .ifnum = -1 + } + } + } +}, { /* Tascam US122 MKII - playback-only support */ USB_DEVICE_VENDOR_SPEC(0x0644, 0x8021), diff --git a/sound/usb/quirks.c b/sound/usb/quirks.c index 41f5d8242478..b571a9c9c319 100644 --- a/sound/usb/quirks.c +++ b/sound/usb/quirks.c @@ -1024,6 +1024,304 @@ static int snd_usb_axefx3_boot_quirk(struct usb_device *dev) return 0; } +static void mbox3_setup_48_24_magic(struct usb_device *dev) +{ + /* The Mbox 3 is "little endian" */ + /* max volume is: 0x0000. */ + /* min volume is: 0x0080 (shown in little endian form) */ + + + /* Load 48000Hz rate into buffer */ + u8 com_buff[4] = {0x80, 0xbb, 0x00, 0x00}; + + /* Set 48000Hz sample rate */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 0x01, 0x21, 0x0100, 0x0001, &com_buff, 4); //Is this really needed? + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 0x01, 0x21, 0x0100, 0x8101, &com_buff, 4); + + /* Deactivate Tuner */ + /* on = 0x01*/ + /* off = 0x00*/ + com_buff[0] = 0x00; + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 0x01, 0x21, 0x0003, 0x2001, &com_buff, 1); + + /* Set clock source to Internal (as opposed to S/PDIF) */ + com_buff[0] = 0x01; + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0100, 0x8001, &com_buff, 1); + + /* Mute the hardware loopbacks to start the device in a known state. */ + com_buff[0] = 0x00; + com_buff[1] = 0x80; + /* Analogue input 1 left channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0110, 0x4001, &com_buff, 2); + /* Analogue input 1 right channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0111, 0x4001, &com_buff, 2); + /* Analogue input 2 left channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0114, 0x4001, &com_buff, 2); + /* Analogue input 2 right channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0115, 0x4001, &com_buff, 2); + /* Analogue input 3 left channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0118, 0x4001, &com_buff, 2); + /* Analogue input 3 right channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0119, 0x4001, &com_buff, 2); + /* Analogue input 4 left channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x011c, 0x4001, &com_buff, 2); + /* Analogue input 4 right channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x011d, 0x4001, &com_buff, 2); + + /* Set software sends to output */ + com_buff[0] = 0x00; + com_buff[1] = 0x00; + /* Analogue software return 1 left channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0100, 0x4001, &com_buff, 2); + com_buff[0] = 0x00; + com_buff[1] = 0x80; + /* Analogue software return 1 right channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0101, 0x4001, &com_buff, 2); + com_buff[0] = 0x00; + com_buff[1] = 0x80; + /* Analogue software return 2 left channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0104, 0x4001, &com_buff, 2); + com_buff[0] = 0x00; + com_buff[1] = 0x00; + /* Analogue software return 2 right channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0105, 0x4001, &com_buff, 2); + + com_buff[0] = 0x00; + com_buff[1] = 0x80; + /* Analogue software return 3 left channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0108, 0x4001, &com_buff, 2); + /* Analogue software return 3 right channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0109, 0x4001, &com_buff, 2); + /* Analogue software return 4 left channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x010c, 0x4001, &com_buff, 2); + /* Analogue software return 4 right channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x010d, 0x4001, &com_buff, 2); + + /* Return to muting sends */ + com_buff[0] = 0x00; + com_buff[1] = 0x80; + /* Analogue fx return left channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0120, 0x4001, &com_buff, 2); + /* Analogue fx return right channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0121, 0x4001, &com_buff, 2); + + /* Analogue software input 1 fx send: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0100, 0x4201, &com_buff, 2); + /* Analogue software input 2 fx send: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0101, 0x4201, &com_buff, 2); + /* Analogue software input 3 fx send: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0102, 0x4201, &com_buff, 2); + /* Analogue software input 4 fx send: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0103, 0x4201, &com_buff, 2); + /* Analogue input 1 fx send: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0104, 0x4201, &com_buff, 2); + /* Analogue input 2 fx send: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0105, 0x4201, &com_buff, 2); + /* Analogue input 3 fx send: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0106, 0x4201, &com_buff, 2); + /* Analogue input 4 fx send: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0107, 0x4201, &com_buff, 2); + + /* Toggle allowing host control */ + com_buff[0] = 0x02; + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 3, 0x21, 0x0000, 0x2001, &com_buff, 1); + + /* Do not dim fx returns */ + com_buff[0] = 0x00; + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 3, 0x21, 0x0002, 0x2001, &com_buff, 1); + + /* Do not set fx returns to mono */ + com_buff[0] = 0x00; + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 3, 0x21, 0x0001, 0x2001, &com_buff, 1); + + /* Mute the S/PDIF hardware loopback + * same odd volume logic here as above + */ + com_buff[0] = 0x00; + com_buff[1] = 0x80; + /* S/PDIF hardware input 1 left channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0112, 0x4001, &com_buff, 2); + /* S/PDIF hardware input 1 right channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0113, 0x4001, &com_buff, 2); + /* S/PDIF hardware input 2 left channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0116, 0x4001, &com_buff, 2); + /* S/PDIF hardware input 2 right channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0117, 0x4001, &com_buff, 2); + /* S/PDIF hardware input 3 left channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x011a, 0x4001, &com_buff, 2); + /* S/PDIF hardware input 3 right channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x011b, 0x4001, &com_buff, 2); + /* S/PDIF hardware input 4 left channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x011e, 0x4001, &com_buff, 2); + /* S/PDIF hardware input 4 right channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x011f, 0x4001, &com_buff, 2); + /* S/PDIF software return 1 left channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0102, 0x4001, &com_buff, 2); + /* S/PDIF software return 1 right channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0103, 0x4001, &com_buff, 2); + /* S/PDIF software return 2 left channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0106, 0x4001, &com_buff, 2); + /* S/PDIF software return 2 right channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0107, 0x4001, &com_buff, 2); + + com_buff[0] = 0x00; + com_buff[1] = 0x00; + /* S/PDIF software return 3 left channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x010a, 0x4001, &com_buff, 2); + + com_buff[0] = 0x00; + com_buff[1] = 0x80; + /* S/PDIF software return 3 right channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x010b, 0x4001, &com_buff, 2); + /* S/PDIF software return 4 left channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x010e, 0x4001, &com_buff, 2); + + com_buff[0] = 0x00; + com_buff[1] = 0x00; + /* S/PDIF software return 4 right channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x010f, 0x4001, &com_buff, 2); + + com_buff[0] = 0x00; + com_buff[1] = 0x80; + /* S/PDIF fx returns left channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0122, 0x4001, &com_buff, 2); + /* S/PDIF fx returns right channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0123, 0x4001, &com_buff, 2); + + /* Set the dropdown "Effect" to the first option */ + /* Room1 = 0x00 */ + /* Room2 = 0x01 */ + /* Room3 = 0x02 */ + /* Hall 1 = 0x03 */ + /* Hall 2 = 0x04 */ + /* Plate = 0x05 */ + /* Delay = 0x06 */ + /* Echo = 0x07 */ + com_buff[0] = 0x00; + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0200, 0x4301, &com_buff, 1); /* max is 0xff */ + /* min is 0x00 */ + + + /* Set the effect duration to 0 */ + /* max is 0xffff */ + /* min is 0x0000 */ + com_buff[0] = 0x00; + com_buff[1] = 0x00; + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0400, 0x4301, &com_buff, 2); + + /* Set the effect volume and feedback to 0 */ + /* max is 0xff */ + /* min is 0x00 */ + com_buff[0] = 0x00; + /* feedback: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0500, 0x4301, &com_buff, 1); + /* volume: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0300, 0x4301, &com_buff, 1); + + /* Set soft button hold duration */ + /* 0x03 = 250ms */ + /* 0x05 = 500ms DEFAULT */ + /* 0x08 = 750ms */ + /* 0x0a = 1sec */ + com_buff[0] = 0x05; + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 3, 0x21, 0x0005, 0x2001, &com_buff, 1); + + /* Use dim LEDs for button of state */ + com_buff[0] = 0x00; + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 3, 0x21, 0x0004, 0x2001, &com_buff, 1); +} + +#define MBOX3_DESCRIPTOR_SIZE 464 + +static int snd_usb_mbox3_boot_quirk(struct usb_device *dev) +{ + struct usb_host_config *config = dev->actconfig; + int err; + int descriptor_size; + + descriptor_size = le16_to_cpu(get_cfg_desc(config)->wTotalLength); + + if (descriptor_size != MBOX3_DESCRIPTOR_SIZE) { + dev_err(&dev->dev, "Invalid descriptor size=%d.\n", descriptor_size); + return -ENODEV; + } + + dev_dbg(&dev->dev, "device initialised!\n"); + + err = usb_get_descriptor(dev, USB_DT_DEVICE, 0, + &dev->descriptor, sizeof(dev->descriptor)); + config = dev->actconfig; + if (err < 0) + dev_dbg(&dev->dev, "error usb_get_descriptor: %d\n", err); + + err = usb_reset_configuration(dev); + if (err < 0) + dev_dbg(&dev->dev, "error usb_reset_configuration: %d\n", err); + dev_dbg(&dev->dev, "mbox3_boot: new boot length = %d\n", + le16_to_cpu(get_cfg_desc(config)->wTotalLength)); + + mbox3_setup_48_24_magic(dev); + dev_info(&dev->dev, "Digidesign Mbox 3: 24bit 48kHz"); + + return 0; /* Successful boot */ +} #define MICROBOOK_BUF_SIZE 128 @@ -1344,6 +1642,10 @@ int snd_usb_apply_boot_quirk(struct usb_device *dev, case USB_ID(0x0dba, 0x3000): /* Digidesign Mbox 2 */ return snd_usb_mbox2_boot_quirk(dev); + case USB_ID(0x0dba, 0x5000): + /* Digidesign Mbox 3 */ + return snd_usb_mbox3_boot_quirk(dev); + case USB_ID(0x1235, 0x0010): /* Focusrite Novation Saffire 6 USB */ case USB_ID(0x1235, 0x0018): /* Focusrite Novation Twitch */ -- 2.35.1

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[PATCH AUTOSEL 5.15 17/25] ASoC: SOF: pci: Change DMI match info to support all Chrome platforms
by Sasha Levin 10 Oct '22

10 Oct '22

From: Jairaj Arava <jairaj.arava(a)intel.com> [ Upstream commit c1c1fc8103f794a10c5c15e3c17879caf4f42c8f ] In some Chrome platforms if OEM's use their own string as SYS_VENDOR than "Google", it leads to firmware load failure from intel/sof/community path. Hence, changing SYS_VENDOR to PRODUCT_FAMILY in which "Google" is used as common prefix and is supported in all Chrome platforms. Reviewed-by: Ranjani Sridharan <ranjani.sridharan(a)linux.intel.com> Reviewed-by: Chao Song <chao.song(a)intel.com> Reviewed-by: Curtis Malainey <curtis(a)malainey.com> Signed-off-by: Jairaj Arava <jairaj.arava(a)intel.com> Signed-off-by: Curtis Malainey <cujomalainey(a)chromium.org> Signed-off-by: Sathyanarayana Nujella <sathyanarayana.nujella(a)intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Link: https://lore.kernel.org/r/20220919114429.42700-1-pierre-louis.bossart@linux… Signed-off-by: Mark Brown <broonie(a)kernel.org> Signed-off-by: Sasha Levin <sashal(a)kernel.org> --- sound/soc/sof/sof-pci-dev.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/sof/sof-pci-dev.c b/sound/soc/sof/sof-pci-dev.c index b773289c928d..3b4c011e0283 100644 --- a/sound/soc/sof/sof-pci-dev.c +++ b/sound/soc/sof/sof-pci-dev.c @@ -80,7 +80,7 @@ static const struct dmi_system_id community_key_platforms[] = { { .ident = "Google Chromebooks", .matches = { - DMI_MATCH(DMI_SYS_VENDOR, "Google"), + DMI_MATCH(DMI_PRODUCT_FAMILY, "Google"), } }, {}, -- 2.35.1

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[PATCH AUTOSEL 5.15 11/25] ALSA: usb-audio: Register card at the last interface
by Sasha Levin 10 Oct '22

10 Oct '22

From: Takashi Iwai <tiwai(a)suse.de> [ Upstream commit 6392dcd1d0c7034ccf630ec55fc9e5810ecadf3b ] The USB-audio driver matches per interface, and as default, it registers the card instance at the very first instance. This can be a problem for the devices that have multiple interfaces to be probed, as the udev rule isn't applied properly for the later appearing interfaces. Although we introduced the delayed_register option and the quirks for covering those shortcomings, it's nothing but a workaround for specific devices. This patch is an another attempt to fix the problem in a more generic way. Now the driver checks the whole USB device descriptor at the very first time when an interface is attached to a sound card. It looks at each matching interface in the descriptor and remembers the last matching one. The snd_card_register() is invoked only when this last interface is probed. After this change, the quirks for the delayed registration become superfluous, hence they are removed along with the patch. OTOH, the delayed_register option is still kept, as it might be useful for some corner cases (e.g. a special driver overtakes the interface probe from the standard driver, and the last interface probe may miss). Link: https://lore.kernel.org/r/20220904161247.16461-1-tiwai@suse.de Signed-off-by: Takashi Iwai <tiwai(a)suse.de> Signed-off-by: Sasha Levin <sashal(a)kernel.org> --- sound/usb/card.c | 32 +++++++++++++++++++++++++------- sound/usb/quirks.c | 42 ------------------------------------------ sound/usb/quirks.h | 2 -- sound/usb/usbaudio.h | 1 + 4 files changed, 26 insertions(+), 51 deletions(-) diff --git a/sound/usb/card.c b/sound/usb/card.c index 713b84d8d42f..207c212eabde 100644 --- a/sound/usb/card.c +++ b/sound/usb/card.c @@ -689,7 +689,7 @@ static bool get_alias_id(struct usb_device *dev, unsigned int *id) return false; } -static bool check_delayed_register_option(struct snd_usb_audio *chip, int iface) +static int check_delayed_register_option(struct snd_usb_audio *chip) { int i; unsigned int id, inum; @@ -698,14 +698,31 @@ static bool check_delayed_register_option(struct snd_usb_audio *chip, int iface) if (delayed_register[i] && sscanf(delayed_register[i], "%x:%x", &id, &inum) == 2 && id == chip->usb_id) - return iface < inum; + return inum; } - return false; + return -1; } static const struct usb_device_id usb_audio_ids[]; /* defined below */ +/* look for the last interface that matches with our ids and remember it */ +static void find_last_interface(struct snd_usb_audio *chip) +{ + struct usb_host_config *config = chip->dev->actconfig; + struct usb_interface *intf; + int i; + + if (!config) + return; + for (i = 0; i < config->desc.bNumInterfaces; i++) { + intf = config->interface[i]; + if (usb_match_id(intf, usb_audio_ids)) + chip->last_iface = intf->altsetting[0].desc.bInterfaceNumber; + } + usb_audio_dbg(chip, "Found last interface = %d\n", chip->last_iface); +} + /* look for the corresponding quirk */ static const struct snd_usb_audio_quirk * get_alias_quirk(struct usb_device *dev, unsigned int id) @@ -812,6 +829,7 @@ static int usb_audio_probe(struct usb_interface *intf, err = -ENODEV; goto __error; } + find_last_interface(chip); } if (chip->num_interfaces >= MAX_CARD_INTERFACES) { @@ -861,11 +879,11 @@ static int usb_audio_probe(struct usb_interface *intf, chip->need_delayed_register = false; /* clear again */ } - /* we are allowed to call snd_card_register() many times, but first - * check to see if a device needs to skip it or do anything special + /* register card if we reach to the last interface or to the specified + * one given via option */ - if (!snd_usb_registration_quirk(chip, ifnum) && - !check_delayed_register_option(chip, ifnum)) { + if (check_delayed_register_option(chip) == ifnum || + chip->last_iface == ifnum) { err = snd_card_register(chip->card); if (err < 0) goto __error; diff --git a/sound/usb/quirks.c b/sound/usb/quirks.c index 194c75c45628..eadac586bcc8 100644 --- a/sound/usb/quirks.c +++ b/sound/usb/quirks.c @@ -2030,48 +2030,6 @@ void snd_usb_audioformat_attributes_quirk(struct snd_usb_audio *chip, } } -/* - * registration quirk: - * the registration is skipped if a device matches with the given ID, - * unless the interface reaches to the defined one. This is for delaying - * the registration until the last known interface, so that the card and - * devices appear at the same time. - */ - -struct registration_quirk { - unsigned int usb_id; /* composed via USB_ID() */ - unsigned int interface; /* the interface to trigger register */ -}; - -#define REG_QUIRK_ENTRY(vendor, product, iface) \ - { .usb_id = USB_ID(vendor, product), .interface = (iface) } - -static const struct registration_quirk registration_quirks[] = { - REG_QUIRK_ENTRY(0x0951, 0x16d8, 2), /* Kingston HyperX AMP */ - REG_QUIRK_ENTRY(0x0951, 0x16ed, 2), /* Kingston HyperX Cloud Alpha S */ - REG_QUIRK_ENTRY(0x0951, 0x16ea, 2), /* Kingston HyperX Cloud Flight S */ - REG_QUIRK_ENTRY(0x0ecb, 0x1f46, 2), /* JBL Quantum 600 */ - REG_QUIRK_ENTRY(0x0ecb, 0x1f47, 2), /* JBL Quantum 800 */ - REG_QUIRK_ENTRY(0x0ecb, 0x1f4c, 2), /* JBL Quantum 400 */ - REG_QUIRK_ENTRY(0x0ecb, 0x2039, 2), /* JBL Quantum 400 */ - REG_QUIRK_ENTRY(0x0ecb, 0x203c, 2), /* JBL Quantum 600 */ - REG_QUIRK_ENTRY(0x0ecb, 0x203e, 2), /* JBL Quantum 800 */ - { 0 } /* terminator */ -}; - -/* return true if skipping registration */ -bool snd_usb_registration_quirk(struct snd_usb_audio *chip, int iface) -{ - const struct registration_quirk *q; - - for (q = registration_quirks; q->usb_id; q++) - if (chip->usb_id == q->usb_id) - return iface < q->interface; - - /* Register as normal */ - return false; -} - /* * driver behavior quirk flags */ diff --git a/sound/usb/quirks.h b/sound/usb/quirks.h index 31abb7cb01a5..f9bfd5ac7bab 100644 --- a/sound/usb/quirks.h +++ b/sound/usb/quirks.h @@ -48,8 +48,6 @@ void snd_usb_audioformat_attributes_quirk(struct snd_usb_audio *chip, struct audioformat *fp, int stream); -bool snd_usb_registration_quirk(struct snd_usb_audio *chip, int iface); - void snd_usb_init_quirk_flags(struct snd_usb_audio *chip); #endif /* __USBAUDIO_QUIRKS_H */ diff --git a/sound/usb/usbaudio.h b/sound/usb/usbaudio.h index 044cd7ab27cb..39c3c61a7e49 100644 --- a/sound/usb/usbaudio.h +++ b/sound/usb/usbaudio.h @@ -37,6 +37,7 @@ struct snd_usb_audio { unsigned int quirk_flags; unsigned int need_delayed_register:1; /* warn for delayed registration */ int num_interfaces; + int last_iface; int num_suspended_intf; int sample_rate_read_error; -- 2.35.1

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[PATCH AUTOSEL 5.15 07/25] ALSA: usb-audio: Add quirk to enable Avid Mbox 3 support
by Sasha Levin 10 Oct '22

10 Oct '22

From: Conner Knox <connerknoxpublic(a)gmail.com> [ Upstream commit b01104fc62b6194c852124f6c6df1c0a5c031fc1 ] Add support for Avid Mbox3 USB audio interface at 48kHz Signed-off-by: Conner Knox <connerknoxpublic(a)gmail.com> Link: https://lore.kernel.org/r/20220818201433.16360-1-mbarriolinares@gmail.com Signed-off-by: Takashi Iwai <tiwai(a)suse.de> Signed-off-by: Sasha Levin <sashal(a)kernel.org> --- sound/usb/quirks-table.h | 76 ++++++++++ sound/usb/quirks.c | 302 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 378 insertions(+) diff --git a/sound/usb/quirks-table.h b/sound/usb/quirks-table.h index f93201a830b5..06dfdd45cff8 100644 --- a/sound/usb/quirks-table.h +++ b/sound/usb/quirks-table.h @@ -2985,6 +2985,82 @@ YAMAHA_DEVICE(0x7010, "UB99"), } } }, +/* DIGIDESIGN MBOX 3 */ +{ + USB_DEVICE(0x0dba, 0x5000), + .driver_info = (unsigned long) &(const struct snd_usb_audio_quirk) { + .vendor_name = "Digidesign", + .product_name = "Mbox 3", + .ifnum = QUIRK_ANY_INTERFACE, + .type = QUIRK_COMPOSITE, + .data = (const struct snd_usb_audio_quirk[]) { + { + .ifnum = 0, + .type = QUIRK_IGNORE_INTERFACE + }, + { + .ifnum = 1, + .type = QUIRK_IGNORE_INTERFACE + }, + { + .ifnum = 2, + .type = QUIRK_AUDIO_FIXED_ENDPOINT, + .data = &(const struct audioformat) { + .formats = SNDRV_PCM_FMTBIT_S24_3LE, + .channels = 4, + .iface = 2, + .altsetting = 1, + .altset_idx = 1, + .attributes = 0x00, + .endpoint = 0x01, + .ep_attr = USB_ENDPOINT_XFER_ISOC | + USB_ENDPOINT_SYNC_ASYNC, + .rates = SNDRV_PCM_RATE_48000, + .rate_min = 48000, + .rate_max = 48000, + .nr_rates = 1, + .rate_table = (unsigned int[]) { + 48000 + } + } + }, + { + .ifnum = 3, + .type = QUIRK_AUDIO_FIXED_ENDPOINT, + .data = &(const struct audioformat) { + .formats = SNDRV_PCM_FMTBIT_S24_3LE, + .channels = 4, + .iface = 3, + .altsetting = 1, + .altset_idx = 1, + .endpoint = 0x81, + .attributes = 0x00, + .ep_attr = USB_ENDPOINT_XFER_ISOC | + USB_ENDPOINT_SYNC_ASYNC, + .maxpacksize = 0x009c, + .rates = SNDRV_PCM_RATE_48000, + .rate_min = 48000, + .rate_max = 48000, + .nr_rates = 1, + .rate_table = (unsigned int[]) { + 48000 + } + } + }, + { + .ifnum = 4, + .type = QUIRK_MIDI_FIXED_ENDPOINT, + .data = &(const struct snd_usb_midi_endpoint_info) { + .out_cables = 0x0001, + .in_cables = 0x0001 + } + }, + { + .ifnum = -1 + } + } + } +}, { /* Tascam US122 MKII - playback-only support */ USB_DEVICE_VENDOR_SPEC(0x0644, 0x8021), diff --git a/sound/usb/quirks.c b/sound/usb/quirks.c index 5b4d8f5eade2..194c75c45628 100644 --- a/sound/usb/quirks.c +++ b/sound/usb/quirks.c @@ -1020,6 +1020,304 @@ static int snd_usb_axefx3_boot_quirk(struct usb_device *dev) return 0; } +static void mbox3_setup_48_24_magic(struct usb_device *dev) +{ + /* The Mbox 3 is "little endian" */ + /* max volume is: 0x0000. */ + /* min volume is: 0x0080 (shown in little endian form) */ + + + /* Load 48000Hz rate into buffer */ + u8 com_buff[4] = {0x80, 0xbb, 0x00, 0x00}; + + /* Set 48000Hz sample rate */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 0x01, 0x21, 0x0100, 0x0001, &com_buff, 4); //Is this really needed? + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 0x01, 0x21, 0x0100, 0x8101, &com_buff, 4); + + /* Deactivate Tuner */ + /* on = 0x01*/ + /* off = 0x00*/ + com_buff[0] = 0x00; + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 0x01, 0x21, 0x0003, 0x2001, &com_buff, 1); + + /* Set clock source to Internal (as opposed to S/PDIF) */ + com_buff[0] = 0x01; + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0100, 0x8001, &com_buff, 1); + + /* Mute the hardware loopbacks to start the device in a known state. */ + com_buff[0] = 0x00; + com_buff[1] = 0x80; + /* Analogue input 1 left channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0110, 0x4001, &com_buff, 2); + /* Analogue input 1 right channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0111, 0x4001, &com_buff, 2); + /* Analogue input 2 left channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0114, 0x4001, &com_buff, 2); + /* Analogue input 2 right channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0115, 0x4001, &com_buff, 2); + /* Analogue input 3 left channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0118, 0x4001, &com_buff, 2); + /* Analogue input 3 right channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0119, 0x4001, &com_buff, 2); + /* Analogue input 4 left channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x011c, 0x4001, &com_buff, 2); + /* Analogue input 4 right channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x011d, 0x4001, &com_buff, 2); + + /* Set software sends to output */ + com_buff[0] = 0x00; + com_buff[1] = 0x00; + /* Analogue software return 1 left channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0100, 0x4001, &com_buff, 2); + com_buff[0] = 0x00; + com_buff[1] = 0x80; + /* Analogue software return 1 right channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0101, 0x4001, &com_buff, 2); + com_buff[0] = 0x00; + com_buff[1] = 0x80; + /* Analogue software return 2 left channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0104, 0x4001, &com_buff, 2); + com_buff[0] = 0x00; + com_buff[1] = 0x00; + /* Analogue software return 2 right channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0105, 0x4001, &com_buff, 2); + + com_buff[0] = 0x00; + com_buff[1] = 0x80; + /* Analogue software return 3 left channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0108, 0x4001, &com_buff, 2); + /* Analogue software return 3 right channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0109, 0x4001, &com_buff, 2); + /* Analogue software return 4 left channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x010c, 0x4001, &com_buff, 2); + /* Analogue software return 4 right channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x010d, 0x4001, &com_buff, 2); + + /* Return to muting sends */ + com_buff[0] = 0x00; + com_buff[1] = 0x80; + /* Analogue fx return left channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0120, 0x4001, &com_buff, 2); + /* Analogue fx return right channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0121, 0x4001, &com_buff, 2); + + /* Analogue software input 1 fx send: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0100, 0x4201, &com_buff, 2); + /* Analogue software input 2 fx send: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0101, 0x4201, &com_buff, 2); + /* Analogue software input 3 fx send: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0102, 0x4201, &com_buff, 2); + /* Analogue software input 4 fx send: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0103, 0x4201, &com_buff, 2); + /* Analogue input 1 fx send: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0104, 0x4201, &com_buff, 2); + /* Analogue input 2 fx send: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0105, 0x4201, &com_buff, 2); + /* Analogue input 3 fx send: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0106, 0x4201, &com_buff, 2); + /* Analogue input 4 fx send: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0107, 0x4201, &com_buff, 2); + + /* Toggle allowing host control */ + com_buff[0] = 0x02; + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 3, 0x21, 0x0000, 0x2001, &com_buff, 1); + + /* Do not dim fx returns */ + com_buff[0] = 0x00; + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 3, 0x21, 0x0002, 0x2001, &com_buff, 1); + + /* Do not set fx returns to mono */ + com_buff[0] = 0x00; + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 3, 0x21, 0x0001, 0x2001, &com_buff, 1); + + /* Mute the S/PDIF hardware loopback + * same odd volume logic here as above + */ + com_buff[0] = 0x00; + com_buff[1] = 0x80; + /* S/PDIF hardware input 1 left channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0112, 0x4001, &com_buff, 2); + /* S/PDIF hardware input 1 right channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0113, 0x4001, &com_buff, 2); + /* S/PDIF hardware input 2 left channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0116, 0x4001, &com_buff, 2); + /* S/PDIF hardware input 2 right channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0117, 0x4001, &com_buff, 2); + /* S/PDIF hardware input 3 left channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x011a, 0x4001, &com_buff, 2); + /* S/PDIF hardware input 3 right channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x011b, 0x4001, &com_buff, 2); + /* S/PDIF hardware input 4 left channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x011e, 0x4001, &com_buff, 2); + /* S/PDIF hardware input 4 right channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x011f, 0x4001, &com_buff, 2); + /* S/PDIF software return 1 left channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0102, 0x4001, &com_buff, 2); + /* S/PDIF software return 1 right channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0103, 0x4001, &com_buff, 2); + /* S/PDIF software return 2 left channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0106, 0x4001, &com_buff, 2); + /* S/PDIF software return 2 right channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0107, 0x4001, &com_buff, 2); + + com_buff[0] = 0x00; + com_buff[1] = 0x00; + /* S/PDIF software return 3 left channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x010a, 0x4001, &com_buff, 2); + + com_buff[0] = 0x00; + com_buff[1] = 0x80; + /* S/PDIF software return 3 right channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x010b, 0x4001, &com_buff, 2); + /* S/PDIF software return 4 left channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x010e, 0x4001, &com_buff, 2); + + com_buff[0] = 0x00; + com_buff[1] = 0x00; + /* S/PDIF software return 4 right channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x010f, 0x4001, &com_buff, 2); + + com_buff[0] = 0x00; + com_buff[1] = 0x80; + /* S/PDIF fx returns left channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0122, 0x4001, &com_buff, 2); + /* S/PDIF fx returns right channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0123, 0x4001, &com_buff, 2); + + /* Set the dropdown "Effect" to the first option */ + /* Room1 = 0x00 */ + /* Room2 = 0x01 */ + /* Room3 = 0x02 */ + /* Hall 1 = 0x03 */ + /* Hall 2 = 0x04 */ + /* Plate = 0x05 */ + /* Delay = 0x06 */ + /* Echo = 0x07 */ + com_buff[0] = 0x00; + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0200, 0x4301, &com_buff, 1); /* max is 0xff */ + /* min is 0x00 */ + + + /* Set the effect duration to 0 */ + /* max is 0xffff */ + /* min is 0x0000 */ + com_buff[0] = 0x00; + com_buff[1] = 0x00; + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0400, 0x4301, &com_buff, 2); + + /* Set the effect volume and feedback to 0 */ + /* max is 0xff */ + /* min is 0x00 */ + com_buff[0] = 0x00; + /* feedback: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0500, 0x4301, &com_buff, 1); + /* volume: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0300, 0x4301, &com_buff, 1); + + /* Set soft button hold duration */ + /* 0x03 = 250ms */ + /* 0x05 = 500ms DEFAULT */ + /* 0x08 = 750ms */ + /* 0x0a = 1sec */ + com_buff[0] = 0x05; + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 3, 0x21, 0x0005, 0x2001, &com_buff, 1); + + /* Use dim LEDs for button of state */ + com_buff[0] = 0x00; + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 3, 0x21, 0x0004, 0x2001, &com_buff, 1); +} + +#define MBOX3_DESCRIPTOR_SIZE 464 + +static int snd_usb_mbox3_boot_quirk(struct usb_device *dev) +{ + struct usb_host_config *config = dev->actconfig; + int err; + int descriptor_size; + + descriptor_size = le16_to_cpu(get_cfg_desc(config)->wTotalLength); + + if (descriptor_size != MBOX3_DESCRIPTOR_SIZE) { + dev_err(&dev->dev, "Invalid descriptor size=%d.\n", descriptor_size); + return -ENODEV; + } + + dev_dbg(&dev->dev, "device initialised!\n"); + + err = usb_get_descriptor(dev, USB_DT_DEVICE, 0, + &dev->descriptor, sizeof(dev->descriptor)); + config = dev->actconfig; + if (err < 0) + dev_dbg(&dev->dev, "error usb_get_descriptor: %d\n", err); + + err = usb_reset_configuration(dev); + if (err < 0) + dev_dbg(&dev->dev, "error usb_reset_configuration: %d\n", err); + dev_dbg(&dev->dev, "mbox3_boot: new boot length = %d\n", + le16_to_cpu(get_cfg_desc(config)->wTotalLength)); + + mbox3_setup_48_24_magic(dev); + dev_info(&dev->dev, "Digidesign Mbox 3: 24bit 48kHz"); + + return 0; /* Successful boot */ +} #define MICROBOOK_BUF_SIZE 128 @@ -1324,6 +1622,10 @@ int snd_usb_apply_boot_quirk(struct usb_device *dev, case USB_ID(0x0dba, 0x3000): /* Digidesign Mbox 2 */ return snd_usb_mbox2_boot_quirk(dev); + case USB_ID(0x0dba, 0x5000): + /* Digidesign Mbox 3 */ + return snd_usb_mbox3_boot_quirk(dev); + case USB_ID(0x1235, 0x0010): /* Focusrite Novation Saffire 6 USB */ case USB_ID(0x1235, 0x0018): /* Focusrite Novation Twitch */ -- 2.35.1

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[PATCH AUTOSEL 5.19 24/36] ASoC: SOF: add quirk to override topology mclk_id
by Sasha Levin 10 Oct '22

10 Oct '22

From: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> [ Upstream commit d136949dd8e2e309dc2f186507486b71cbe9acdb ] Some Intel-based platforms rely on a topology file that hard-codes the use of MCLK0. This is incorrect in 10% of the cases. Rather than generating yet another set of topology files, this patch adds a kernel module parameter to override the topology value. In hindsight, we should never have allowed mclks to be specified in topology, this is a hardware-level information that should not have been visible in the topology. Future patches will try to set this value automagically, e.g. by parsing the NHLT content. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Reviewed-by: Kai Vehmanen <kai.vehmanen(a)linux.intel.com> Reviewed-by: Bard Liao <yung-chuan.liao(a)linux.intel.com> Link: https://lore.kernel.org/r/20220919115350.43104-3-pierre-louis.bossart@linux… Signed-off-by: Mark Brown <broonie(a)kernel.org> Signed-off-by: Sasha Levin <sashal(a)kernel.org> --- sound/soc/sof/intel/hda.c | 11 +++++++++++ sound/soc/sof/ipc3-topology.c | 7 +++++++ sound/soc/sof/sof-priv.h | 4 ++++ 3 files changed, 22 insertions(+) diff --git a/sound/soc/sof/intel/hda.c b/sound/soc/sof/intel/hda.c index 17f2f3a982c3..7d9e62ab9d0e 100644 --- a/sound/soc/sof/intel/hda.c +++ b/sound/soc/sof/intel/hda.c @@ -376,6 +376,10 @@ static int dmic_num_override = -1; module_param_named(dmic_num, dmic_num_override, int, 0444); MODULE_PARM_DESC(dmic_num, "SOF HDA DMIC number"); +static int mclk_id_override = -1; +module_param_named(mclk_id, mclk_id_override, int, 0444); +MODULE_PARM_DESC(mclk_id, "SOF SSP mclk_id"); + #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) static bool hda_codec_use_common_hdmi = IS_ENABLED(CONFIG_SND_HDA_CODEC_HDMI); module_param_named(use_common_hdmi, hda_codec_use_common_hdmi, bool, 0444); @@ -1433,6 +1437,13 @@ struct snd_soc_acpi_mach *hda_machine_select(struct snd_sof_dev *sdev) sof_pdata->tplg_filename = tplg_filename; } + + /* check if mclk_id should be modified from topology defaults */ + if (mclk_id_override >= 0) { + dev_info(sdev->dev, "Overriding topology with MCLK %d from kernel_parameter\n", mclk_id_override); + sdev->mclk_id_override = true; + sdev->mclk_id_quirk = mclk_id_override; + } } /* diff --git a/sound/soc/sof/ipc3-topology.c b/sound/soc/sof/ipc3-topology.c index e97f50d5bcba..b8ec302bc887 100644 --- a/sound/soc/sof/ipc3-topology.c +++ b/sound/soc/sof/ipc3-topology.c @@ -1233,6 +1233,7 @@ static int sof_link_afe_load(struct snd_soc_component *scomp, struct snd_sof_dai static int sof_link_ssp_load(struct snd_soc_component *scomp, struct snd_sof_dai_link *slink, struct sof_ipc_dai_config *config, struct snd_sof_dai *dai) { + struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(scomp); struct snd_soc_tplg_hw_config *hw_config = slink->hw_configs; struct sof_dai_private_data *private = dai->private; u32 size = sizeof(*config); @@ -1257,6 +1258,12 @@ static int sof_link_ssp_load(struct snd_soc_component *scomp, struct snd_sof_dai config[i].hdr.size = size; + if (sdev->mclk_id_override) { + dev_dbg(scomp->dev, "tplg: overriding topology mclk_id %d by quirk %d\n", + config[i].ssp.mclk_id, sdev->mclk_id_quirk); + config[i].ssp.mclk_id = sdev->mclk_id_quirk; + } + /* copy differentiating hw configs to ipc structs */ config[i].ssp.mclk_rate = le32_to_cpu(hw_config[i].mclk_rate); config[i].ssp.bclk_rate = le32_to_cpu(hw_config[i].bclk_rate); diff --git a/sound/soc/sof/sof-priv.h b/sound/soc/sof/sof-priv.h index f11f575fd1da..544e5be9d10e 100644 --- a/sound/soc/sof/sof-priv.h +++ b/sound/soc/sof/sof-priv.h @@ -585,6 +585,10 @@ struct snd_sof_dev { /* to protect the ipc_rx_handler_list and dsp_state_handler_list list */ struct mutex client_event_handler_mutex; + /* quirks to override topology values */ + bool mclk_id_override; + u16 mclk_id_quirk; /* same size as in IPC3 definitions */ + void *private; /* core does not touch this */ }; -- 2.35.1

1 0

[PATCH AUTOSEL 5.19 23/36] ASoC: SOF: pci: Change DMI match info to support all Chrome platforms
by Sasha Levin 10 Oct '22

10 Oct '22

From: Jairaj Arava <jairaj.arava(a)intel.com> [ Upstream commit c1c1fc8103f794a10c5c15e3c17879caf4f42c8f ] In some Chrome platforms if OEM's use their own string as SYS_VENDOR than "Google", it leads to firmware load failure from intel/sof/community path. Hence, changing SYS_VENDOR to PRODUCT_FAMILY in which "Google" is used as common prefix and is supported in all Chrome platforms. Reviewed-by: Ranjani Sridharan <ranjani.sridharan(a)linux.intel.com> Reviewed-by: Chao Song <chao.song(a)intel.com> Reviewed-by: Curtis Malainey <curtis(a)malainey.com> Signed-off-by: Jairaj Arava <jairaj.arava(a)intel.com> Signed-off-by: Curtis Malainey <cujomalainey(a)chromium.org> Signed-off-by: Sathyanarayana Nujella <sathyanarayana.nujella(a)intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Link: https://lore.kernel.org/r/20220919114429.42700-1-pierre-louis.bossart@linux… Signed-off-by: Mark Brown <broonie(a)kernel.org> Signed-off-by: Sasha Levin <sashal(a)kernel.org> --- sound/soc/sof/sof-pci-dev.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/sof/sof-pci-dev.c b/sound/soc/sof/sof-pci-dev.c index d627092b399d..643fd1036d60 100644 --- a/sound/soc/sof/sof-pci-dev.c +++ b/sound/soc/sof/sof-pci-dev.c @@ -138,7 +138,7 @@ static const struct dmi_system_id community_key_platforms[] = { .ident = "Google Chromebooks", .callback = chromebook_use_community_key, .matches = { - DMI_MATCH(DMI_SYS_VENDOR, "Google"), + DMI_MATCH(DMI_PRODUCT_FAMILY, "Google"), } }, {}, -- 2.35.1

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[PATCH AUTOSEL 5.19 22/36] ALSA: intel-dspconfig: add ES8336 support for AlderLake-PS
by Sasha Levin 10 Oct '22

10 Oct '22

From: Muralidhar Reddy <muralidhar.reddy(a)intel.com> [ Upstream commit 9db1c9fa214ef41d098633ff40a87284ca6e1870 ] added quirks for ESS8336 for AlderLake-PS Reviewed-by: Ranjani Sridharan <ranjani.sridharan(a)linux.intel.com> Signed-off-by: Muralidhar Reddy <muralidhar.reddy(a)intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Link: https://lore.kernel.org/r/20220919114548.42769-1-pierre-louis.bossart@linux… Signed-off-by: Mark Brown <broonie(a)kernel.org> Signed-off-by: Sasha Levin <sashal(a)kernel.org> --- sound/hda/intel-dsp-config.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/sound/hda/intel-dsp-config.c b/sound/hda/intel-dsp-config.c index ec9cbb219bc1..dbc7dfd00c44 100644 --- a/sound/hda/intel-dsp-config.c +++ b/sound/hda/intel-dsp-config.c @@ -422,6 +422,11 @@ static const struct config_entry config_table[] = { .device = 0x51cd, }, /* Alderlake-PS */ + { + .flags = FLAG_SOF, + .device = 0x51c9, + .codec_hid = &essx_83x6, + }, { .flags = FLAG_SOF | FLAG_SOF_ONLY_IF_DMIC_OR_SOUNDWIRE, .device = 0x51c9, -- 2.35.1

1 0

[PATCH AUTOSEL 5.19 14/36] ALSA: usb-audio: Register card at the last interface
by Sasha Levin 10 Oct '22

10 Oct '22

From: Takashi Iwai <tiwai(a)suse.de> [ Upstream commit 6392dcd1d0c7034ccf630ec55fc9e5810ecadf3b ] The USB-audio driver matches per interface, and as default, it registers the card instance at the very first instance. This can be a problem for the devices that have multiple interfaces to be probed, as the udev rule isn't applied properly for the later appearing interfaces. Although we introduced the delayed_register option and the quirks for covering those shortcomings, it's nothing but a workaround for specific devices. This patch is an another attempt to fix the problem in a more generic way. Now the driver checks the whole USB device descriptor at the very first time when an interface is attached to a sound card. It looks at each matching interface in the descriptor and remembers the last matching one. The snd_card_register() is invoked only when this last interface is probed. After this change, the quirks for the delayed registration become superfluous, hence they are removed along with the patch. OTOH, the delayed_register option is still kept, as it might be useful for some corner cases (e.g. a special driver overtakes the interface probe from the standard driver, and the last interface probe may miss). Link: https://lore.kernel.org/r/20220904161247.16461-1-tiwai@suse.de Signed-off-by: Takashi Iwai <tiwai(a)suse.de> Signed-off-by: Sasha Levin <sashal(a)kernel.org> --- sound/usb/card.c | 32 +++++++++++++++++++++++++------- sound/usb/quirks.c | 42 ------------------------------------------ sound/usb/quirks.h | 2 -- sound/usb/usbaudio.h | 1 + 4 files changed, 26 insertions(+), 51 deletions(-) diff --git a/sound/usb/card.c b/sound/usb/card.c index 706d249a9ad6..3aea241435fb 100644 --- a/sound/usb/card.c +++ b/sound/usb/card.c @@ -690,7 +690,7 @@ static bool get_alias_id(struct usb_device *dev, unsigned int *id) return false; } -static bool check_delayed_register_option(struct snd_usb_audio *chip, int iface) +static int check_delayed_register_option(struct snd_usb_audio *chip) { int i; unsigned int id, inum; @@ -699,14 +699,31 @@ static bool check_delayed_register_option(struct snd_usb_audio *chip, int iface) if (delayed_register[i] && sscanf(delayed_register[i], "%x:%x", &id, &inum) == 2 && id == chip->usb_id) - return iface < inum; + return inum; } - return false; + return -1; } static const struct usb_device_id usb_audio_ids[]; /* defined below */ +/* look for the last interface that matches with our ids and remember it */ +static void find_last_interface(struct snd_usb_audio *chip) +{ + struct usb_host_config *config = chip->dev->actconfig; + struct usb_interface *intf; + int i; + + if (!config) + return; + for (i = 0; i < config->desc.bNumInterfaces; i++) { + intf = config->interface[i]; + if (usb_match_id(intf, usb_audio_ids)) + chip->last_iface = intf->altsetting[0].desc.bInterfaceNumber; + } + usb_audio_dbg(chip, "Found last interface = %d\n", chip->last_iface); +} + /* look for the corresponding quirk */ static const struct snd_usb_audio_quirk * get_alias_quirk(struct usb_device *dev, unsigned int id) @@ -813,6 +830,7 @@ static int usb_audio_probe(struct usb_interface *intf, err = -ENODEV; goto __error; } + find_last_interface(chip); } if (chip->num_interfaces >= MAX_CARD_INTERFACES) { @@ -862,11 +880,11 @@ static int usb_audio_probe(struct usb_interface *intf, chip->need_delayed_register = false; /* clear again */ } - /* we are allowed to call snd_card_register() many times, but first - * check to see if a device needs to skip it or do anything special + /* register card if we reach to the last interface or to the specified + * one given via option */ - if (!snd_usb_registration_quirk(chip, ifnum) && - !check_delayed_register_option(chip, ifnum)) { + if (check_delayed_register_option(chip) == ifnum || + chip->last_iface == ifnum) { err = snd_card_register(chip->card); if (err < 0) goto __error; diff --git a/sound/usb/quirks.c b/sound/usb/quirks.c index 194c75c45628..eadac586bcc8 100644 --- a/sound/usb/quirks.c +++ b/sound/usb/quirks.c @@ -2030,48 +2030,6 @@ void snd_usb_audioformat_attributes_quirk(struct snd_usb_audio *chip, } } -/* - * registration quirk: - * the registration is skipped if a device matches with the given ID, - * unless the interface reaches to the defined one. This is for delaying - * the registration until the last known interface, so that the card and - * devices appear at the same time. - */ - -struct registration_quirk { - unsigned int usb_id; /* composed via USB_ID() */ - unsigned int interface; /* the interface to trigger register */ -}; - -#define REG_QUIRK_ENTRY(vendor, product, iface) \ - { .usb_id = USB_ID(vendor, product), .interface = (iface) } - -static const struct registration_quirk registration_quirks[] = { - REG_QUIRK_ENTRY(0x0951, 0x16d8, 2), /* Kingston HyperX AMP */ - REG_QUIRK_ENTRY(0x0951, 0x16ed, 2), /* Kingston HyperX Cloud Alpha S */ - REG_QUIRK_ENTRY(0x0951, 0x16ea, 2), /* Kingston HyperX Cloud Flight S */ - REG_QUIRK_ENTRY(0x0ecb, 0x1f46, 2), /* JBL Quantum 600 */ - REG_QUIRK_ENTRY(0x0ecb, 0x1f47, 2), /* JBL Quantum 800 */ - REG_QUIRK_ENTRY(0x0ecb, 0x1f4c, 2), /* JBL Quantum 400 */ - REG_QUIRK_ENTRY(0x0ecb, 0x2039, 2), /* JBL Quantum 400 */ - REG_QUIRK_ENTRY(0x0ecb, 0x203c, 2), /* JBL Quantum 600 */ - REG_QUIRK_ENTRY(0x0ecb, 0x203e, 2), /* JBL Quantum 800 */ - { 0 } /* terminator */ -}; - -/* return true if skipping registration */ -bool snd_usb_registration_quirk(struct snd_usb_audio *chip, int iface) -{ - const struct registration_quirk *q; - - for (q = registration_quirks; q->usb_id; q++) - if (chip->usb_id == q->usb_id) - return iface < q->interface; - - /* Register as normal */ - return false; -} - /* * driver behavior quirk flags */ diff --git a/sound/usb/quirks.h b/sound/usb/quirks.h index 31abb7cb01a5..f9bfd5ac7bab 100644 --- a/sound/usb/quirks.h +++ b/sound/usb/quirks.h @@ -48,8 +48,6 @@ void snd_usb_audioformat_attributes_quirk(struct snd_usb_audio *chip, struct audioformat *fp, int stream); -bool snd_usb_registration_quirk(struct snd_usb_audio *chip, int iface); - void snd_usb_init_quirk_flags(struct snd_usb_audio *chip); #endif /* __USBAUDIO_QUIRKS_H */ diff --git a/sound/usb/usbaudio.h b/sound/usb/usbaudio.h index ffbb4b0d09a0..2c6575029b1c 100644 --- a/sound/usb/usbaudio.h +++ b/sound/usb/usbaudio.h @@ -37,6 +37,7 @@ struct snd_usb_audio { unsigned int quirk_flags; unsigned int need_delayed_register:1; /* warn for delayed registration */ int num_interfaces; + int last_iface; int num_suspended_intf; int sample_rate_read_error; -- 2.35.1

1 0

[PATCH AUTOSEL 5.19 07/36] ALSA: usb-audio: Add quirk to enable Avid Mbox 3 support
by Sasha Levin 10 Oct '22

10 Oct '22

From: Conner Knox <connerknoxpublic(a)gmail.com> [ Upstream commit b01104fc62b6194c852124f6c6df1c0a5c031fc1 ] Add support for Avid Mbox3 USB audio interface at 48kHz Signed-off-by: Conner Knox <connerknoxpublic(a)gmail.com> Link: https://lore.kernel.org/r/20220818201433.16360-1-mbarriolinares@gmail.com Signed-off-by: Takashi Iwai <tiwai(a)suse.de> Signed-off-by: Sasha Levin <sashal(a)kernel.org> --- sound/usb/quirks-table.h | 76 ++++++++++ sound/usb/quirks.c | 302 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 378 insertions(+) diff --git a/sound/usb/quirks-table.h b/sound/usb/quirks-table.h index f93201a830b5..06dfdd45cff8 100644 --- a/sound/usb/quirks-table.h +++ b/sound/usb/quirks-table.h @@ -2985,6 +2985,82 @@ YAMAHA_DEVICE(0x7010, "UB99"), } } }, +/* DIGIDESIGN MBOX 3 */ +{ + USB_DEVICE(0x0dba, 0x5000), + .driver_info = (unsigned long) &(const struct snd_usb_audio_quirk) { + .vendor_name = "Digidesign", + .product_name = "Mbox 3", + .ifnum = QUIRK_ANY_INTERFACE, + .type = QUIRK_COMPOSITE, + .data = (const struct snd_usb_audio_quirk[]) { + { + .ifnum = 0, + .type = QUIRK_IGNORE_INTERFACE + }, + { + .ifnum = 1, + .type = QUIRK_IGNORE_INTERFACE + }, + { + .ifnum = 2, + .type = QUIRK_AUDIO_FIXED_ENDPOINT, + .data = &(const struct audioformat) { + .formats = SNDRV_PCM_FMTBIT_S24_3LE, + .channels = 4, + .iface = 2, + .altsetting = 1, + .altset_idx = 1, + .attributes = 0x00, + .endpoint = 0x01, + .ep_attr = USB_ENDPOINT_XFER_ISOC | + USB_ENDPOINT_SYNC_ASYNC, + .rates = SNDRV_PCM_RATE_48000, + .rate_min = 48000, + .rate_max = 48000, + .nr_rates = 1, + .rate_table = (unsigned int[]) { + 48000 + } + } + }, + { + .ifnum = 3, + .type = QUIRK_AUDIO_FIXED_ENDPOINT, + .data = &(const struct audioformat) { + .formats = SNDRV_PCM_FMTBIT_S24_3LE, + .channels = 4, + .iface = 3, + .altsetting = 1, + .altset_idx = 1, + .endpoint = 0x81, + .attributes = 0x00, + .ep_attr = USB_ENDPOINT_XFER_ISOC | + USB_ENDPOINT_SYNC_ASYNC, + .maxpacksize = 0x009c, + .rates = SNDRV_PCM_RATE_48000, + .rate_min = 48000, + .rate_max = 48000, + .nr_rates = 1, + .rate_table = (unsigned int[]) { + 48000 + } + } + }, + { + .ifnum = 4, + .type = QUIRK_MIDI_FIXED_ENDPOINT, + .data = &(const struct snd_usb_midi_endpoint_info) { + .out_cables = 0x0001, + .in_cables = 0x0001 + } + }, + { + .ifnum = -1 + } + } + } +}, { /* Tascam US122 MKII - playback-only support */ USB_DEVICE_VENDOR_SPEC(0x0644, 0x8021), diff --git a/sound/usb/quirks.c b/sound/usb/quirks.c index 5b4d8f5eade2..194c75c45628 100644 --- a/sound/usb/quirks.c +++ b/sound/usb/quirks.c @@ -1020,6 +1020,304 @@ static int snd_usb_axefx3_boot_quirk(struct usb_device *dev) return 0; } +static void mbox3_setup_48_24_magic(struct usb_device *dev) +{ + /* The Mbox 3 is "little endian" */ + /* max volume is: 0x0000. */ + /* min volume is: 0x0080 (shown in little endian form) */ + + + /* Load 48000Hz rate into buffer */ + u8 com_buff[4] = {0x80, 0xbb, 0x00, 0x00}; + + /* Set 48000Hz sample rate */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 0x01, 0x21, 0x0100, 0x0001, &com_buff, 4); //Is this really needed? + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 0x01, 0x21, 0x0100, 0x8101, &com_buff, 4); + + /* Deactivate Tuner */ + /* on = 0x01*/ + /* off = 0x00*/ + com_buff[0] = 0x00; + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 0x01, 0x21, 0x0003, 0x2001, &com_buff, 1); + + /* Set clock source to Internal (as opposed to S/PDIF) */ + com_buff[0] = 0x01; + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0100, 0x8001, &com_buff, 1); + + /* Mute the hardware loopbacks to start the device in a known state. */ + com_buff[0] = 0x00; + com_buff[1] = 0x80; + /* Analogue input 1 left channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0110, 0x4001, &com_buff, 2); + /* Analogue input 1 right channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0111, 0x4001, &com_buff, 2); + /* Analogue input 2 left channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0114, 0x4001, &com_buff, 2); + /* Analogue input 2 right channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0115, 0x4001, &com_buff, 2); + /* Analogue input 3 left channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0118, 0x4001, &com_buff, 2); + /* Analogue input 3 right channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0119, 0x4001, &com_buff, 2); + /* Analogue input 4 left channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x011c, 0x4001, &com_buff, 2); + /* Analogue input 4 right channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x011d, 0x4001, &com_buff, 2); + + /* Set software sends to output */ + com_buff[0] = 0x00; + com_buff[1] = 0x00; + /* Analogue software return 1 left channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0100, 0x4001, &com_buff, 2); + com_buff[0] = 0x00; + com_buff[1] = 0x80; + /* Analogue software return 1 right channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0101, 0x4001, &com_buff, 2); + com_buff[0] = 0x00; + com_buff[1] = 0x80; + /* Analogue software return 2 left channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0104, 0x4001, &com_buff, 2); + com_buff[0] = 0x00; + com_buff[1] = 0x00; + /* Analogue software return 2 right channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0105, 0x4001, &com_buff, 2); + + com_buff[0] = 0x00; + com_buff[1] = 0x80; + /* Analogue software return 3 left channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0108, 0x4001, &com_buff, 2); + /* Analogue software return 3 right channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0109, 0x4001, &com_buff, 2); + /* Analogue software return 4 left channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x010c, 0x4001, &com_buff, 2); + /* Analogue software return 4 right channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x010d, 0x4001, &com_buff, 2); + + /* Return to muting sends */ + com_buff[0] = 0x00; + com_buff[1] = 0x80; + /* Analogue fx return left channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0120, 0x4001, &com_buff, 2); + /* Analogue fx return right channel: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0121, 0x4001, &com_buff, 2); + + /* Analogue software input 1 fx send: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0100, 0x4201, &com_buff, 2); + /* Analogue software input 2 fx send: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0101, 0x4201, &com_buff, 2); + /* Analogue software input 3 fx send: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0102, 0x4201, &com_buff, 2); + /* Analogue software input 4 fx send: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0103, 0x4201, &com_buff, 2); + /* Analogue input 1 fx send: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0104, 0x4201, &com_buff, 2); + /* Analogue input 2 fx send: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0105, 0x4201, &com_buff, 2); + /* Analogue input 3 fx send: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0106, 0x4201, &com_buff, 2); + /* Analogue input 4 fx send: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0107, 0x4201, &com_buff, 2); + + /* Toggle allowing host control */ + com_buff[0] = 0x02; + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 3, 0x21, 0x0000, 0x2001, &com_buff, 1); + + /* Do not dim fx returns */ + com_buff[0] = 0x00; + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 3, 0x21, 0x0002, 0x2001, &com_buff, 1); + + /* Do not set fx returns to mono */ + com_buff[0] = 0x00; + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 3, 0x21, 0x0001, 0x2001, &com_buff, 1); + + /* Mute the S/PDIF hardware loopback + * same odd volume logic here as above + */ + com_buff[0] = 0x00; + com_buff[1] = 0x80; + /* S/PDIF hardware input 1 left channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0112, 0x4001, &com_buff, 2); + /* S/PDIF hardware input 1 right channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0113, 0x4001, &com_buff, 2); + /* S/PDIF hardware input 2 left channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0116, 0x4001, &com_buff, 2); + /* S/PDIF hardware input 2 right channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0117, 0x4001, &com_buff, 2); + /* S/PDIF hardware input 3 left channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x011a, 0x4001, &com_buff, 2); + /* S/PDIF hardware input 3 right channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x011b, 0x4001, &com_buff, 2); + /* S/PDIF hardware input 4 left channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x011e, 0x4001, &com_buff, 2); + /* S/PDIF hardware input 4 right channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x011f, 0x4001, &com_buff, 2); + /* S/PDIF software return 1 left channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0102, 0x4001, &com_buff, 2); + /* S/PDIF software return 1 right channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0103, 0x4001, &com_buff, 2); + /* S/PDIF software return 2 left channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0106, 0x4001, &com_buff, 2); + /* S/PDIF software return 2 right channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0107, 0x4001, &com_buff, 2); + + com_buff[0] = 0x00; + com_buff[1] = 0x00; + /* S/PDIF software return 3 left channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x010a, 0x4001, &com_buff, 2); + + com_buff[0] = 0x00; + com_buff[1] = 0x80; + /* S/PDIF software return 3 right channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x010b, 0x4001, &com_buff, 2); + /* S/PDIF software return 4 left channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x010e, 0x4001, &com_buff, 2); + + com_buff[0] = 0x00; + com_buff[1] = 0x00; + /* S/PDIF software return 4 right channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x010f, 0x4001, &com_buff, 2); + + com_buff[0] = 0x00; + com_buff[1] = 0x80; + /* S/PDIF fx returns left channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0122, 0x4001, &com_buff, 2); + /* S/PDIF fx returns right channel */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0123, 0x4001, &com_buff, 2); + + /* Set the dropdown "Effect" to the first option */ + /* Room1 = 0x00 */ + /* Room2 = 0x01 */ + /* Room3 = 0x02 */ + /* Hall 1 = 0x03 */ + /* Hall 2 = 0x04 */ + /* Plate = 0x05 */ + /* Delay = 0x06 */ + /* Echo = 0x07 */ + com_buff[0] = 0x00; + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0200, 0x4301, &com_buff, 1); /* max is 0xff */ + /* min is 0x00 */ + + + /* Set the effect duration to 0 */ + /* max is 0xffff */ + /* min is 0x0000 */ + com_buff[0] = 0x00; + com_buff[1] = 0x00; + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0400, 0x4301, &com_buff, 2); + + /* Set the effect volume and feedback to 0 */ + /* max is 0xff */ + /* min is 0x00 */ + com_buff[0] = 0x00; + /* feedback: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0500, 0x4301, &com_buff, 1); + /* volume: */ + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 1, 0x21, 0x0300, 0x4301, &com_buff, 1); + + /* Set soft button hold duration */ + /* 0x03 = 250ms */ + /* 0x05 = 500ms DEFAULT */ + /* 0x08 = 750ms */ + /* 0x0a = 1sec */ + com_buff[0] = 0x05; + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 3, 0x21, 0x0005, 0x2001, &com_buff, 1); + + /* Use dim LEDs for button of state */ + com_buff[0] = 0x00; + snd_usb_ctl_msg(dev, usb_sndctrlpipe(dev, 0), + 3, 0x21, 0x0004, 0x2001, &com_buff, 1); +} + +#define MBOX3_DESCRIPTOR_SIZE 464 + +static int snd_usb_mbox3_boot_quirk(struct usb_device *dev) +{ + struct usb_host_config *config = dev->actconfig; + int err; + int descriptor_size; + + descriptor_size = le16_to_cpu(get_cfg_desc(config)->wTotalLength); + + if (descriptor_size != MBOX3_DESCRIPTOR_SIZE) { + dev_err(&dev->dev, "Invalid descriptor size=%d.\n", descriptor_size); + return -ENODEV; + } + + dev_dbg(&dev->dev, "device initialised!\n"); + + err = usb_get_descriptor(dev, USB_DT_DEVICE, 0, + &dev->descriptor, sizeof(dev->descriptor)); + config = dev->actconfig; + if (err < 0) + dev_dbg(&dev->dev, "error usb_get_descriptor: %d\n", err); + + err = usb_reset_configuration(dev); + if (err < 0) + dev_dbg(&dev->dev, "error usb_reset_configuration: %d\n", err); + dev_dbg(&dev->dev, "mbox3_boot: new boot length = %d\n", + le16_to_cpu(get_cfg_desc(config)->wTotalLength)); + + mbox3_setup_48_24_magic(dev); + dev_info(&dev->dev, "Digidesign Mbox 3: 24bit 48kHz"); + + return 0; /* Successful boot */ +} #define MICROBOOK_BUF_SIZE 128 @@ -1324,6 +1622,10 @@ int snd_usb_apply_boot_quirk(struct usb_device *dev, case USB_ID(0x0dba, 0x3000): /* Digidesign Mbox 2 */ return snd_usb_mbox2_boot_quirk(dev); + case USB_ID(0x0dba, 0x5000): + /* Digidesign Mbox 3 */ + return snd_usb_mbox3_boot_quirk(dev); + case USB_ID(0x1235, 0x0010): /* Focusrite Novation Saffire 6 USB */ case USB_ID(0x1235, 0x0018): /* Focusrite Novation Twitch */ -- 2.35.1

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[PATCH AUTOSEL 6.0 34/44] ASoC: amd: yc: Add Lenovo Yoga Slim 7 Pro X to quirks table
by Sasha Levin 10 Oct '22

10 Oct '22

From: Mario Limonciello <mario.limonciello(a)amd.com> [ Upstream commit 2232b2dd8cd4f1e6d554b2c3f6899ce36f791b67 ] Lenovo Yoga Slim 7 Pro X has an ACP DMIC that isn't specified in the ASL or existing quirk list. Add it to the quirk table to let DMIC work on these systems. Link: https://bugzilla.kernel.org/show_bug.cgi?id=216299 Tested-by: Sebastian S <iam(a)decentr.al> Reported-and-tested-by: Travis Glenn Hansen <travisghansen(a)yahoo.com> Signed-off-by: Mario Limonciello <mario.limonciello(a)amd.com> Link: https://lore.kernel.org/r/20220920201436.19734-3-mario.limonciello@amd.com Signed-off-by: Mark Brown <broonie(a)kernel.org> Signed-off-by: Sasha Levin <sashal(a)kernel.org> --- sound/soc/amd/yc/acp6x-mach.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/sound/soc/amd/yc/acp6x-mach.c b/sound/soc/amd/yc/acp6x-mach.c index 5eab3baf3573..2cb50d5cf1a9 100644 --- a/sound/soc/amd/yc/acp6x-mach.c +++ b/sound/soc/amd/yc/acp6x-mach.c @@ -171,6 +171,13 @@ static const struct dmi_system_id yc_acp_quirk_table[] = { DMI_MATCH(DMI_PRODUCT_NAME, "21J6"), } }, + { + .driver_data = &acp6x_card, + .matches = { + DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"), + DMI_MATCH(DMI_PRODUCT_NAME, "82"), + } + }, { .driver_data = &acp6x_card, .matches = { -- 2.35.1

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[PATCH AUTOSEL 6.0 33/44] ASoC: amd: yc: Add ASUS UM5302TA into DMI table
by Sasha Levin 10 Oct '22

10 Oct '22

From: Xiaoyan Li <lxy.lixiaoyan(a)gmail.com> [ Upstream commit 4df5b13dec9e1b5a12db47ee92eb3f7da5c3deb5 ] ASUS Zenbook S 13 OLED (UM5302TA) needs this quirk to get the built-in microphone working properly. Link: https://bugzilla.kernel.org/show_bug.cgi?id=216270 Signed-off-by: Xiaoyan Li <lxy.lixiaoyan(a)gmail.com> Suggested-by: Mario Limonciello <mario.limonciello(a)amd.com> Reviewed-by: Mario Limonciello <mario.limonciello(a)amd.com> Signed-off-by: Mario Limonciello <mario.limonciello(a)amd.com> Link: https://lore.kernel.org/r/20220920201436.19734-2-mario.limonciello@amd.com Signed-off-by: Mark Brown <broonie(a)kernel.org> Signed-off-by: Sasha Levin <sashal(a)kernel.org> --- sound/soc/amd/yc/acp6x-mach.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/sound/soc/amd/yc/acp6x-mach.c b/sound/soc/amd/yc/acp6x-mach.c index e0b24e1daef3..5eab3baf3573 100644 --- a/sound/soc/amd/yc/acp6x-mach.c +++ b/sound/soc/amd/yc/acp6x-mach.c @@ -171,6 +171,13 @@ static const struct dmi_system_id yc_acp_quirk_table[] = { DMI_MATCH(DMI_PRODUCT_NAME, "21J6"), } }, + { + .driver_data = &acp6x_card, + .matches = { + DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK COMPUTER INC."), + DMI_MATCH(DMI_PRODUCT_NAME, "UM5302TA"), + } + }, {} }; -- 2.35.1

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[PATCH AUTOSEL 6.0 28/44] ASoC: SOF: add quirk to override topology mclk_id
by Sasha Levin 10 Oct '22

10 Oct '22

From: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> [ Upstream commit d136949dd8e2e309dc2f186507486b71cbe9acdb ] Some Intel-based platforms rely on a topology file that hard-codes the use of MCLK0. This is incorrect in 10% of the cases. Rather than generating yet another set of topology files, this patch adds a kernel module parameter to override the topology value. In hindsight, we should never have allowed mclks to be specified in topology, this is a hardware-level information that should not have been visible in the topology. Future patches will try to set this value automagically, e.g. by parsing the NHLT content. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Reviewed-by: Kai Vehmanen <kai.vehmanen(a)linux.intel.com> Reviewed-by: Bard Liao <yung-chuan.liao(a)linux.intel.com> Link: https://lore.kernel.org/r/20220919115350.43104-3-pierre-louis.bossart@linux… Signed-off-by: Mark Brown <broonie(a)kernel.org> Signed-off-by: Sasha Levin <sashal(a)kernel.org> --- sound/soc/sof/intel/hda.c | 11 +++++++++++ sound/soc/sof/ipc3-topology.c | 7 +++++++ sound/soc/sof/sof-priv.h | 4 ++++ 3 files changed, 22 insertions(+) diff --git a/sound/soc/sof/intel/hda.c b/sound/soc/sof/intel/hda.c index 6d4ecbe14adf..ada2e6775749 100644 --- a/sound/soc/sof/intel/hda.c +++ b/sound/soc/sof/intel/hda.c @@ -376,6 +376,10 @@ static int dmic_num_override = -1; module_param_named(dmic_num, dmic_num_override, int, 0444); MODULE_PARM_DESC(dmic_num, "SOF HDA DMIC number"); +static int mclk_id_override = -1; +module_param_named(mclk_id, mclk_id_override, int, 0444); +MODULE_PARM_DESC(mclk_id, "SOF SSP mclk_id"); + #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) static bool hda_codec_use_common_hdmi = IS_ENABLED(CONFIG_SND_HDA_CODEC_HDMI); module_param_named(use_common_hdmi, hda_codec_use_common_hdmi, bool, 0444); @@ -1565,6 +1569,13 @@ struct snd_soc_acpi_mach *hda_machine_select(struct snd_sof_dev *sdev) sof_pdata->tplg_filename = tplg_filename; } + + /* check if mclk_id should be modified from topology defaults */ + if (mclk_id_override >= 0) { + dev_info(sdev->dev, "Overriding topology with MCLK %d from kernel_parameter\n", mclk_id_override); + sdev->mclk_id_override = true; + sdev->mclk_id_quirk = mclk_id_override; + } } /* diff --git a/sound/soc/sof/ipc3-topology.c b/sound/soc/sof/ipc3-topology.c index 65923e7a5976..a39b43850f0e 100644 --- a/sound/soc/sof/ipc3-topology.c +++ b/sound/soc/sof/ipc3-topology.c @@ -1249,6 +1249,7 @@ static int sof_link_afe_load(struct snd_soc_component *scomp, struct snd_sof_dai static int sof_link_ssp_load(struct snd_soc_component *scomp, struct snd_sof_dai_link *slink, struct sof_ipc_dai_config *config, struct snd_sof_dai *dai) { + struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(scomp); struct snd_soc_tplg_hw_config *hw_config = slink->hw_configs; struct sof_dai_private_data *private = dai->private; u32 size = sizeof(*config); @@ -1273,6 +1274,12 @@ static int sof_link_ssp_load(struct snd_soc_component *scomp, struct snd_sof_dai config[i].hdr.size = size; + if (sdev->mclk_id_override) { + dev_dbg(scomp->dev, "tplg: overriding topology mclk_id %d by quirk %d\n", + config[i].ssp.mclk_id, sdev->mclk_id_quirk); + config[i].ssp.mclk_id = sdev->mclk_id_quirk; + } + /* copy differentiating hw configs to ipc structs */ config[i].ssp.mclk_rate = le32_to_cpu(hw_config[i].mclk_rate); config[i].ssp.bclk_rate = le32_to_cpu(hw_config[i].bclk_rate); diff --git a/sound/soc/sof/sof-priv.h b/sound/soc/sof/sof-priv.h index 823583086279..828c74bb75f8 100644 --- a/sound/soc/sof/sof-priv.h +++ b/sound/soc/sof/sof-priv.h @@ -594,6 +594,10 @@ struct snd_sof_dev { /* to protect the ipc_rx_handler_list and dsp_state_handler_list list */ struct mutex client_event_handler_mutex; + /* quirks to override topology values */ + bool mclk_id_override; + u16 mclk_id_quirk; /* same size as in IPC3 definitions */ + void *private; /* core does not touch this */ }; -- 2.35.1

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