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[alsa-devel] [PATCH] ALSA: hda - Another fixup for ASUS laptop with ALC660 codec
by Takashi Iwai 02 Dec '13

02 Dec '13

ASUS Z35HL laptop also needs the very same fix as the previous one that was applied to ASUS W7J. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=66231 Cc: <stable(a)vger.kernel.org> Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- sound/pci/hda/patch_realtek.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index a98f3296b891..9ca83001fc37 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -4559,6 +4559,7 @@ static const struct hda_fixup alc861_fixups[] = { static const struct snd_pci_quirk alc861_fixup_tbl[] = { SND_PCI_QUIRK(0x1043, 0x1253, "ASUS W7J", ALC660_FIXUP_ASUS_W7J), + SND_PCI_QUIRK(0x1043, 0x1263, "ASUS Z35HL", ALC660_FIXUP_ASUS_W7J), SND_PCI_QUIRK(0x1043, 0x1393, "ASUS A6Rp", ALC861_FIXUP_ASUS_A6RP), SND_PCI_QUIRK_VENDOR(0x1043, "ASUS laptop", ALC861_FIXUP_AMP_VREF_0F), SND_PCI_QUIRK(0x1462, 0x7254, "HP DX2200", ALC861_FIXUP_NO_JACK_DETECT), -- 1.8.4.4

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[alsa-devel] HD-Audio: How to reduce driver initializaton time if multiple codecs present on the bus?
by Lin, Mengdong 02 Dec '13

02 Dec '13

Hi Takashi, We're trying to reduce the HD-A driver initialization time when more than one codecs are connected to the bus, but are blocked. Would you please share some advices on this? Usually, there is one HD-A controller connecting to two codecs: one on-board codec and one integrated display codec. During initialization, the codecs are created and configured in a serial way. Creating a codec may cost 6~20ms, and then building controls make cost about 15~30ms. So I had thought it's helpful to build controls for different codecs in parallel in function snd_hda_build_controls(), as we did in driver suspend/resume. But the test shows this doesn't work: (1) Using a workqueue without WQ_UNBOUND, the work items, which calls snd_hda_codec_build_controls(), are processed one after one (I think because there is no explicit sleep in the work function). So the total time does not change. (2) Using an unbouned work queue for the bus or using separate kthreads for each codec, the work items for different codecs are processed in parallel. However, the total time is still the sum of two codec as that without parallel. I think that because snd_hda_codec_read() are used during initialization, the command execution on bus is serialized in the low level. So even if we parallel initializing two codecs in high level, commands on bus are still processed one by one so the total time cannot reduce. We're blocked here. Is there any other means to reduce the time? Thanks Mengdong

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[alsa-devel] [PATCH] ALSA: hda - Fix bad EAPD setup for HP machines with AD1984A
by Takashi Iwai 02 Dec '13

02 Dec '13

It seems that EAPD on NID 0x16 is the only control over all outputs on HP machines with AD1984A while turning EAPD on NID 0x12 breaks the output. Thus we need to avoid fiddling EAPD on NID. As a quick workaround, just set own_eapd_ctrl flag for the wrong EAPD, then implement finer EAPD controls. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=66321 Cc: <stable(a)vger.kernel.org> Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- sound/pci/hda/patch_analog.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/pci/hda/patch_analog.c b/sound/pci/hda/patch_analog.c index 1a83559f4cbd..34d86ec5d3dd 100644 --- a/sound/pci/hda/patch_analog.c +++ b/sound/pci/hda/patch_analog.c @@ -962,6 +962,7 @@ static void ad1884_fixup_hp_eapd(struct hda_codec *codec, switch (action) { case HDA_FIXUP_ACT_PRE_PROBE: spec->gen.vmaster_mute.hook = ad1884_vmaster_hp_gpio_hook; + spec->gen.own_eapd_ctl = 1; snd_hda_sequence_write_cache(codec, gpio_init_verbs); break; case HDA_FIXUP_ACT_PROBE: -- 1.8.4.4

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[alsa-devel] [PATCH] ASoC: fsl: imx-ssi: omit ssi counter to avoid harm in unbalanced situation
by Oskar Schirmer 02 Dec '13

02 Dec '13

Unbalanced calls to imx_ssi_trigger() may result in endless SSI activity and thus provoke eternal sound. While on the first glance, the switch statement looks pretty symmetric, the SUSPEND/RESUME pair is not: the suspend case comes along snd_pcm_suspend_all(), which for fsl/imx-pcm-fiq is called only at snd_soc_suspend(), but the resume case originates straight from the SNDRV_PCM_IOCTL_RESUME. This way userland may provoke an unbalanced resume, which might cause the ssi->enabled counter to increase and never return to zero again, so eventually SSI_SCR_SSIEN is never disabled. Simply removing the ssi->enabled will solve the problem, as long as one never goes play and capture game simultaneously, but beware trying both at once, the early TRIGGER_STOP will cut off the other activity prematurely. So now playing and capturing is scrutinized separately, instead of by counting. This is essentially the same stuff as in sound/soc/fsl/imx-pcm-fiq.c which I send a patch for three days ago. Astonishing enough this highly fragile scheme is used twice in parallel to serve the very same control function, synchronously: Once out of sync you are lost until reboot. Note, that these fixes wont prevent state machine distortion on alsa level to cut sound or the like. It just makes sure we have a chance to synchronise again later on. Signed-off-by: Oskar Schirmer <oskar(a)scara.com> --- sound/soc/fsl/imx-ssi.c | 19 ++++++++++++------- sound/soc/fsl/imx-ssi.h | 3 ++- 2 files changed, 14 insertions(+), 8 deletions(-) diff --git a/sound/soc/fsl/imx-ssi.c b/sound/soc/fsl/imx-ssi.c index f5f248c..c68499b 100644 --- a/sound/soc/fsl/imx-ssi.c +++ b/sound/soc/fsl/imx-ssi.c @@ -298,27 +298,32 @@ static int imx_ssi_trigger(struct snd_pcm_substream *substream, int cmd, case SNDRV_PCM_TRIGGER_START: case SNDRV_PCM_TRIGGER_RESUME: case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: - if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { scr |= SSI_SCR_TE; - else + ssi->playing = 1; + } else { scr |= SSI_SCR_RE; + ssi->capturing = 1; + } sier |= sier_bits; - if (++ssi->enabled == 1) - scr |= SSI_SCR_SSIEN; + scr |= SSI_SCR_SSIEN; break; case SNDRV_PCM_TRIGGER_STOP: case SNDRV_PCM_TRIGGER_SUSPEND: case SNDRV_PCM_TRIGGER_PAUSE_PUSH: - if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { scr &= ~SSI_SCR_TE; - else + ssi->playing = 0; + } else { scr &= ~SSI_SCR_RE; + ssi->capturing = 0; + } sier &= ~sier_bits; - if (--ssi->enabled == 0) + if (!ssi->playing && !ssi->capturing) scr &= ~SSI_SCR_SSIEN; break; diff --git a/sound/soc/fsl/imx-ssi.h b/sound/soc/fsl/imx-ssi.h index 560c40f..a3c90d5 100644 --- a/sound/soc/fsl/imx-ssi.h +++ b/sound/soc/fsl/imx-ssi.h @@ -213,7 +213,8 @@ struct imx_ssi { int fiq_init; int dma_init; - int enabled; + int playing; + int capturing; }; #endif /* _IMX_SSI_H */ -- 1.7.9.5

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[alsa-devel] [PATCH 1/1] ASoC: soc_compress: Add set_metadata
by Richard Fitzgerald 02 Dec '13

02 Dec '13

Pass the set_metadata() calls through to the codec driver. Signed-off-by: Zhao Weijia <weijia.zhao(a)capelabs.com> Signed-off-by: Richard Fitzgerald <rf(a)opensource.wolfsonmicro.com> --- sound/soc/soc-compress.c | 18 +++++++++++++++++- 1 files changed, 17 insertions(+), 1 deletions(-) diff --git a/sound/soc/soc-compress.c b/sound/soc/soc-compress.c index 53c9ecd..186802b 100644 --- a/sound/soc/soc-compress.c +++ b/sound/soc/soc-compress.c @@ -318,6 +318,21 @@ static int soc_compr_pointer(struct snd_compr_stream *cstream, mutex_unlock(&rtd->pcm_mutex); return 0; } +static int soc_compr_set_metadata(struct snd_compr_stream *cstream, + struct snd_compr_metadata *metadata) +{ + struct snd_soc_pcm_runtime *rtd = cstream->private_data; + struct snd_soc_platform *platform = rtd->platform; + + mutex_lock_nested(&rtd->pcm_mutex, rtd->pcm_subclass); + + if (platform->driver->compr_ops && platform->driver->compr_ops->set_metadata) + platform->driver->compr_ops->set_metadata(cstream, metadata); + + mutex_unlock(&rtd->pcm_mutex); + return 0; +} + static int soc_compr_copy(struct snd_compr_stream *cstream, char __user *buf, size_t count) @@ -372,7 +387,8 @@ static struct snd_compr_ops soc_compr_ops = { .pointer = soc_compr_pointer, .ack = soc_compr_ack, .get_caps = soc_compr_get_caps, - .get_codec_caps = soc_compr_get_codec_caps + .get_codec_caps = soc_compr_get_codec_caps, + .set_metadata = soc_compr_set_metadata, }; /* create a new compress */ -- 1.7.2.5

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[alsa-devel] Using devm_snd_soc_register_card() causes problem with imx-sgtl5000
by Shawn Guo 02 Dec '13

02 Dec '13

I'm trying to test Lars' devm_snd_dmaengine_pcm_register patches with imx-sgtl5000 machine driver, but running into the rmmod problem below on v3.13-rc1. Reverting commit 01984a4 (ASoC: imx-sgtl5000: Use devm_snd_soc_register_card) seems to fix the problem for me. Any hint on what's going wrong here? Shawn root@arm:~# lsmod Module Size Used by snd_soc_imx_sgtl5000 3506 0 snd_soc_sgtl5000 13677 2 snd_soc_imx_audmux 5324 1 snd_soc_imx_sgtl5000 snd_soc_fsl_ssi 8139 2 imx_pcm_dma 1380 1 snd_soc_fsl_ssi root@arm:~# rmmod snd_soc_imx_sgtl5000 Unable to handle kernel paging request at virtual address e594025c pgd = be134000 [e594025c] *pgd=00000000 Internal error: Oops: 5 [#1] SMP ARM Modules linked in: snd_soc_imx_sgtl5000(-) snd_soc_sgtl5000 snd_soc_imx_audmux snd_soc_fsl_ssi imx_pcm_dma CPU: 0 PID: 1793 Comm: rmmod Not tainted 3.13.0-rc1 #1570 task: bee28900 ti: bfbec000 task.ti: bfbec000 PC is at debugfs_remove_recursive+0x28/0x154 LR is at snd_soc_unregister_card+0xa0/0xcc pc : [<80252b38>] lr : [<80496ac4>] psr: a0000013 sp : bfbede00 ip : bfbede28 fp : bfbede24 r10: 803281d4 r9 : bfbec000 r8 : 803271ac r7 : bef54440 r6 : 00000004 r5 : bf9a4010 r4 : bf9a4010 r3 : e5940224 r2 : 00000000 r1 : bef54450 r0 : 803271ac Flags: NzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user Control: 10c53c7d Table: 4e13404a DAC: 00000015 Process rmmod (pid: 1793, stack limit = 0xbfbec240) Stack: (0xbfbede00 to 0xbfbee000) de00: 00000000 bf9a4010 bf9a4010 00000004 bef54440 bec89000 bfbede44 bfbede28 de20: 80496ac4 80252b1c 804a4b60 bfbede60 bf9a4010 00000004 bfbede54 bfbede48 de40: 804a4b74 80496a30 bfbede94 bfbede58 80328728 804a4b6c bfbede94 a0000013 de60: bf1b5800 bef54440 00000002 bf9a4010 7f0169f8 bf9a4044 00000081 8000e9c4 de80: bfbec000 00000000 bfbedeac bfbede98 80328cb0 80328618 7f016000 bf9a4010 dea0: bfbedec4 bfbedeb0 8032561c 80328c84 bf9a4010 7f0169f8 bfbedee4 bfbedec8 dec0: 80325e84 803255a8 bee28900 7f0169f8 00000000 78208d30 bfbedefc bfbedee8 dee0: 80325410 80325dd4 beca8100 7f0169f8 bfbedf14 bfbedf00 803264f8 803253c8 df00: 7f01635c 7f016a3c bfbedf24 bfbedf18 80327098 803264d4 bfbedf34 bfbedf28 df20: 7f016370 80327090 bfbedfa4 bfbedf38 80085ef0 7f016368 bfbedf54 5f646e73 df40: 5f636f73 5f786d69 6c746773 30303035 00000000 78208008 bfbedf84 bfbedf68 df60: 800613b0 80061194 fffffffe 78208d00 7efc2f07 00000081 7f016a3c 00000800 df80: bfbedf84 00000000 00000000 fffffffe 78208d00 7efc2f07 00000000 bfbedfa8 dfa0: 8000e800 80085dcc fffffffe 78208d00 78208d30 00000800 a8c82400 a8c82400 dfc0: fffffffe 78208d00 7efc2f07 00000081 00000002 00000000 78208008 00000800 dfe0: 7efc2e1c 7efc2ba8 76f5ca47 76edec7c 80000010 78208d30 00000000 00000000 Backtrace: [<80252b10>] (debugfs_remove_recursive+0x0/0x154) from [<80496ac4>] (snd_soc_unregister_card+0xa0/0xcc) r8:bec89000 r7:bef54440 r6:00000004 r5:bf9a4010 r4:bf9a4010 r3:00000000 [<80496a24>] (snd_soc_unregister_card+0x0/0xcc) from [<804a4b74>] (devm_card_release+0x14/0x18) r6:00000004 r5:bf9a4010 r4:bfbede60 r3:804a4b60 [<804a4b60>] (devm_card_release+0x0/0x18) from [<80328728>] (release_nodes+0x11c/0x1dc) [<8032860c>] (release_nodes+0x0/0x1dc) from [<80328cb0>] (devres_release_all+0x38/0x54) [<80328c78>] (devres_release_all+0x0/0x54) from [<8032561c>] (__device_release_driver+0x80/0xd4) r4:bf9a4010 r3:7f016000 [<8032559c>] (__device_release_driver+0x0/0xd4) from [<80325e84>] (driver_detach+0xbc/0xc0) r5:7f0169f8 r4:bf9a4010 [<80325dc8>] (driver_detach+0x0/0xc0) from [<80325410>] (bus_remove_driver+0x54/0x98) r6:78208d30 r5:00000000 r4:7f0169f8 r3:bee28900 [<803253bc>] (bus_remove_driver+0x0/0x98) from [<803264f8>] (driver_unregister+0x30/0x50) r4:7f0169f8 r3:beca8100 [<803264c8>] (driver_unregister+0x0/0x50) from [<80327098>] (platform_driver_unregister+0x14/0x18) r4:7f016a3c r3:7f01635c [<80327084>] (platform_driver_unregister+0x0/0x18) from [<7f016370>] (imx_sgtl5000_driver_exit+0x14/0x1c [snd_soc_imx_sgtl5000]) [<7f01635c>] (imx_sgtl5000_driver_exit+0x0/0x1c [snd_soc_imx_sgtl5000]) from [<80085ef0>] (SyS_delete_module+0x130/0x18c) [<80085dc0>] (SyS_delete_module+0x0/0x18c) from [<8000e800>] (ret_fast_syscall+0x0/0x48) r6:7efc2f07 r5:78208d00 r4:fffffffe Code: 889da9f8 e5983020 e3530000 089da9f8 (e5933038) ---[ end trace 825e7e125251a225 ]---

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[alsa-devel] [PATCH 1/6] ASoC: Add resource managed snd_dmaengine_pcm_register()
by Lars-Peter Clausen 02 Dec '13

02 Dec '13

For many drivers using the generic dmaengine PCM driver one of the few (or the only) things left to do in the drivers remove function is to unregister the PCM device. This patch adds a resource managed version of snd_dmaengine_pcm_register() which makes it possible to simplify the remove function as well as the error path in the probe function for those drivers. Signed-off-by: Lars-Peter Clausen <lars(a)metafoo.de> --- Changes since v1: * Moved snd_dmaengine_pcm_register() to soc-devres.c --- include/sound/dmaengine_pcm.h | 4 ++++ sound/soc/soc-devres.c | 41 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 45 insertions(+) diff --git a/include/sound/dmaengine_pcm.h b/include/sound/dmaengine_pcm.h index 1501731..4ef986c 100644 --- a/include/sound/dmaengine_pcm.h +++ b/include/sound/dmaengine_pcm.h @@ -140,6 +140,10 @@ int snd_dmaengine_pcm_register(struct device *dev, unsigned int flags); void snd_dmaengine_pcm_unregister(struct device *dev); +int devm_snd_dmaengine_pcm_register(struct device *dev, + const struct snd_dmaengine_pcm_config *config, + unsigned int flags); + int snd_dmaengine_pcm_prepare_slave_config(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct dma_slave_config *slave_config); diff --git a/sound/soc/soc-devres.c b/sound/soc/soc-devres.c index b1d7322..9998619 100644 --- a/sound/soc/soc-devres.c +++ b/sound/soc/soc-devres.c @@ -12,6 +12,7 @@ #include <linux/module.h> #include <linux/moduleparam.h> #include <sound/soc.h> +#include <sound/dmaengine_pcm.h> static void devm_component_release(struct device *dev, void *res) { @@ -84,3 +85,43 @@ int devm_snd_soc_register_card(struct device *dev, struct snd_soc_card *card) return ret; } EXPORT_SYMBOL_GPL(devm_snd_soc_register_card); + +#ifdef CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM + +static void devm_dmaengine_pcm_release(struct device *dev, void *res) +{ + snd_dmaengine_pcm_unregister(*(struct device **)res); +} + +/** + * devm_snd_dmaengine_pcm_register - resource managed dmaengine PCM registration + * @dev: The parent device for the PCM device + * @config: Platform specific PCM configuration + * @flags: Platform specific quirks + * + * Register a dmaengine based PCM device with automatic unregistration when the + * device is unregistered. + */ +int devm_snd_dmaengine_pcm_register(struct device *dev, + const struct snd_dmaengine_pcm_config *config, unsigned int flags) +{ + struct device **ptr; + int ret; + + ptr = devres_alloc(devm_dmaengine_pcm_release, sizeof(*ptr), GFP_KERNEL); + if (!ptr) + return -ENOMEM; + + ret = snd_dmaengine_pcm_register(dev, config, flags); + if (ret == 0) { + *ptr = dev; + devres_add(dev, ptr); + } else { + devres_free(ptr); + } + + return ret; +} +EXPORT_SYMBOL_GPL(devm_snd_dmaengine_pcm_register); + +#endif -- 1.8.0

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[alsa-devel] [PATCH] ASoC: generic-dmaengine-pcm: Set BATCH flag when residue reporting is not supported
by Lars-Peter Clausen 02 Dec '13

02 Dec '13

For dmaengine drivers which do not support transfer residue reporting we update the PCM pointer with period granularity. Set the SNDRV_PCM_INFO_BATCH flag in this case to let userspace know about this. Signed-off-by: Lars-Peter Clausen <lars(a)metafoo.de> --- sound/soc/soc-generic-dmaengine-pcm.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/sound/soc/soc-generic-dmaengine-pcm.c b/sound/soc/soc-generic-dmaengine-pcm.c index cbc9c96..87e8635 100644 --- a/sound/soc/soc-generic-dmaengine-pcm.c +++ b/sound/soc/soc-generic-dmaengine-pcm.c @@ -137,6 +137,9 @@ static int dmaengine_pcm_set_runtime_hwparams(struct snd_pcm_substream *substrea hw.buffer_bytes_max = SIZE_MAX; hw.fifo_size = dma_data->fifo_size; + if (pcm->flags & SND_DMAENGINE_PCM_FLAG_NO_RESIDUE) + hw.info |= SNDRV_PCM_INFO_BATCH; + ret = dma_get_slave_caps(chan, &dma_caps); if (ret == 0) { if (dma_caps.cmd_pause) -- 1.8.0

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[alsa-devel] [PATCH] ASoC: Set SNDRV_PCM_INFO_JOINT_DUPLEX for PCMs with symmetry constraints
by Lars-Peter Clausen 02 Dec '13

02 Dec '13

If there are symmetry constraints between the playback and the capture channel set the SNDRV_PCM_INFO_JOINT_DUPLEX flag to let userspace know about this. Signed-off-by: Lars-Peter Clausen <lars(a)metafoo.de> --- sound/soc/soc-pcm.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/sound/soc/soc-pcm.c b/sound/soc/soc-pcm.c index 22af038..eb340a8 100644 --- a/sound/soc/soc-pcm.c +++ b/sound/soc/soc-pcm.c @@ -180,6 +180,21 @@ static int soc_pcm_params_symmetry(struct snd_pcm_substream *substream, return 0; } +static bool soc_pcm_has_symmetry(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai_driver *cpu_driver = rtd->cpu_dai->driver; + struct snd_soc_dai_driver *codec_driver = rtd->codec_dai->driver; + struct snd_soc_dai_link *link = rtd->dai_link; + + return cpu_driver->symmetric_rates || codec_driver->symmetric_rates || + link->symmetric_rates || cpu_driver->symmetric_channels || + codec_driver->symmetric_channels || link->symmetric_channels || + cpu_driver->symmetric_samplebits || + codec_driver->symmetric_samplebits || + link->symmetric_samplebits; +} + /* * List of sample sizes that might go over the bus for parameter * application. There ought to be a wildcard sample size for things @@ -316,6 +331,9 @@ static int soc_pcm_open(struct snd_pcm_substream *substream) &cpu_dai_drv->capture); } + if (soc_pcm_has_symmetry(substream)) + runtime->hw.info |= SNDRV_PCM_INFO_JOINT_DUPLEX; + ret = -EINVAL; if (!runtime->hw.rates) { printk(KERN_ERR "ASoC: %s <-> %s No matching rates\n", -- 1.8.0

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[alsa-devel] [PATCH] ASoC: imx-spdif: Remove error message upon devm_kzalloc() failure
by Fabio Estevam 02 Dec '13

02 Dec '13

From: Fabio Estevam <fabio.estevam(a)freescale.com> No need to have a specific OOM message, since there is generic MM out of memory message in place. Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> --- sound/soc/fsl/imx-spdif.c | 1 - 1 file changed, 1 deletion(-) diff --git a/sound/soc/fsl/imx-spdif.c b/sound/soc/fsl/imx-spdif.c index 8499d52..980dd1f 100644 --- a/sound/soc/fsl/imx-spdif.c +++ b/sound/soc/fsl/imx-spdif.c @@ -35,7 +35,6 @@ static int imx_spdif_audio_probe(struct platform_device *pdev) data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); if (!data) { - dev_err(&pdev->dev, "failed to allocate memory\n"); ret = -ENOMEM; goto end; } -- 1.8.1.2

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[alsa-devel] MAXIM 98089 codec support in Linux
by VS 02 Dec '13

02 Dec '13

Hi, We are trying to integrate MAXIM 98089 (Audio codec) into our Linux product build. This has 2 DAI's available with it - DAI1 with both Playback and Capture facility and DAI2 with Playback capability alone. When we use this codec in our build, we find that the dai1_hw_params and dai1_set_fmt functions never gets called but it is always dai2_hw_params and dai2_set_fmt function that gets called because of which apparently, we are able to hear the voice that is incoming but not able to capture the voice and send it out externally. Here are our definitions: static struct snd_soc_dai_driver max98089_dai[] = { { .name = "max98089.0", .playback = { .stream_name = "Playback", .channels_min = 1, .channels_max = 2, .rates = MAX98089_RATES, .formats = MAX98089_FORMATS, }, .capture = { .stream_name = "Capture", .channels_min = 1, .channels_max = 2, .rates = MAX98089_RATES, .formats = MAX98089_FORMATS, }, .ops = &max98089_dai1_ops, }, { .name = "max98089.1", .playback = { .stream_name = "Aux Playback", .channels_min = 1, .channels_max = 2, .rates = MAX98089_RATES, .formats = MAX98089_FORMATS, }, .ops = &max98089_dai2_ops, .symmetric_rates = 1, } }; The codec specific registers only when we put in dai2_ops functions, we are able to see the effects but there is no effect if we put it in dai1_ops functions. Is there any specific way of referring to DAI when we have multiple DAI support in the codec that we are using? Thanks in advance for your inputs VS

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[alsa-devel] [PATCH] ALSA: hda - Fix headset mic input after muted internal mic (Dell/Realtek)
by David Henningsson 02 Dec '13

02 Dec '13

By trial and error, I found this patch could work around an issue where the headset mic would stop working if you switch between the internal mic and the headset mic, and the internal mic was muted. It still takes a second or two before the headset mic actually starts working, but still better than nothing. I'd like to add stable to this patch, but I'd like Kailang's ack first because I don't know what the verbs really do. BugLink: https://bugs.launchpad.net/bugs/1256840 Signed-off-by: David Henningsson <david.henningsson(a)canonical.com> --- sound/pci/hda/patch_realtek.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index 537991c..85d1c8b 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -3338,6 +3338,7 @@ static void alc_headset_mode_ctia(struct hda_codec *codec) alc_write_coef_idx(codec, 0x18, 0x7388); break; case 0x10ec0668: + alc_write_coef_idx(codec, 0x11, 0x0001); alc_write_coef_idx(codec, 0x15, 0x0d60); alc_write_coef_idx(codec, 0xc3, 0x0000); break; @@ -3366,6 +3367,7 @@ static void alc_headset_mode_omtp(struct hda_codec *codec) alc_write_coef_idx(codec, 0x18, 0x7388); break; case 0x10ec0668: + alc_write_coef_idx(codec, 0x11, 0x0001); alc_write_coef_idx(codec, 0x15, 0x0d50); alc_write_coef_idx(codec, 0xc3, 0x0000); break; -- 1.7.9.5

2 1

[alsa-devel] Remove fixup list for HP
by Kailang 02 Dec '13

02 Dec '13

Hi Takashi, Chrome OS was loaded driver by models. The patch was remove the alc269 fixup entry for HP chrome book. Thanks. Kialang

2 2

[alsa-devel] compressed audio support
by maruthi srinivas 02 Dec '13

02 Dec '13

Hi, I saw that compressed audio framework being used with Asoc (alsa soc). Can the framework be used with other than Asoc ? I mean with ALSA pci based cards. I see the implementation in the following files. which one is to be used ? Does tinycompress in userspace can be used with either approaches ? http://lxr.free-electrons.com/source/sound/core/compress_offload.c http://lxr.free-electrons.com/source/sound/soc/soc-compress.c Regards, Maruthi

2 1

[alsa-devel] [PATCH] alsa-lib: dlmisc: Add a fake dl lib head file when dl lib is not supported by the toolchain.
by Sonic Zhang 02 Dec '13

02 Dec '13

From: sonic <sonic(a)htpc.(none)> The FLAT GNU toolchain doesn't include the dlfcn.h header file. Signed-off-by: Sonic Zhang <sonic.adi(a)gmail.com> --- include/dlmisc.h | 24 ++++++++++++++++++++++++ modules/mixer/simple/sbasedl.c | 4 ++++ src/mixer/simple_abst.c | 4 ++++ 3 files changed, 32 insertions(+) create mode 100644 include/dlmisc.h diff --git a/include/dlmisc.h b/include/dlmisc.h new file mode 100644 index 0000000..3be8d43 --- /dev/null +++ b/include/dlmisc.h @@ -0,0 +1,24 @@ +/* + * This library is free software; you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as + * published by the Free Software Foundation; either version 2.1 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#ifndef __ALSA_DLMISC_H +#define __ALSA_DLMISC_H + +#define RTLD_NOW 0x00002 +#define RTLD_GLOBAL 0x00100 + +#endif diff --git a/modules/mixer/simple/sbasedl.c b/modules/mixer/simple/sbasedl.c index 494802f..511bebf 100644 --- a/modules/mixer/simple/sbasedl.c +++ b/modules/mixer/simple/sbasedl.c @@ -27,7 +27,11 @@ #include <fcntl.h> #include <sys/ioctl.h> #include <math.h> +#ifdef HAVE_LIBDL #include <dlfcn.h> +#else +#include <dlmisc.h> +#endif #include "config.h" #include "asoundlib.h" #include "mixer_abst.h" diff --git a/src/mixer/simple_abst.c b/src/mixer/simple_abst.c index 9e9aaf5..dd951fe 100644 --- a/src/mixer/simple_abst.c +++ b/src/mixer/simple_abst.c @@ -34,7 +34,11 @@ #include <fcntl.h> #include <sys/ioctl.h> #include <math.h> +#ifdef HAVE_LIBDL #include <dlfcn.h> +#else +#include <dlmisc.h> +#endif #include "config.h" #include "asoundlib.h" #include "mixer_simple.h" -- 1.7.9.5

1 1

[alsa-devel] Bug: plugging in a new sound card causes mixer state of other sound cards to be changed
by Angus McInnes 01 Dec '13

01 Dec '13

Hi, When I plug in my USB sound card, the mixer settings of the internal sound card are changed. I don't want this to happen. I believe the problem is with this commit: http://git.alsa-project.org/?p=alsa-utils.git;a=blobdiff;f=alsactl/90-alsa-… The card number $attr{number} comes from the card* device. Since KERNELS=="card*" was changed to KERNELS!="card*", alsactl restore is run with no card number attribute, so it restores the state of all cards. If I change the != back to ==, alsactl restore is run with a card number and the problem seems to be resolved. (By the way, your bug tracker at https://bugtrack.alsa-project.org/alsa-bug seems to be down.) Regards, Angus McInnes

1 0

[alsa-devel] [RFC 0/4] DT support for rx51-audio
by Sebastian Reichel 30 Nov '13

30 Nov '13

Hi, This patchset adds DT support in rx51-audio. I tested it on the Nokia N900 and was able to play sound with aplay using earphones and earspeaker. The Loudspeakers did not work. I don't know the reason. The patchset consists of 4 patches: 1. convert rx51-audio to snd_soc_register_card() 2. init audio in rx51 platform file 3. add some DT helpers to ASoC core 4. add DT support to rx51-audio Please note, that the patch is RFC level for now. For example non DT boot does not work, because I did not yet add pdata in boardcode. Proposed DTS node would look like this: sound: rx51-audio { compatible = "nokia,rx51-audio"; ti,mcbsp = <&mcbsp2>; ti,codec = <&tlv320aic3x>; ti,codec_aux = <&tlv320aic3x_aux>; ti,headset_amp = <&tpa6130a2>; tvout-selection-gpio = <&gpio2 8 GPIO_ACTIVE_HIGH>; /* 40 */ jack-detection-gpio = <&gpio6 17 GPIO_ACTIVE_HIGH>; /* 177 */ eci-sw-gpio = <&gpio6 22 GPIO_ACTIVE_HIGH>; /* 182 */ speaker-amp-gpio = <&twl_gpio 7 GPIO_ACTIVE_HIGH>; }; -- Sebastian Pali Rohár (2): ASoC: omap: rx51: Use snd_soc_register_card ARM: OMAP: rx51: Register audio device Sebastian Reichel (2): ASoC: Allow Aux Codecs to be specified using DT ASoC: RX-51: Add DT support to sound driver .../devicetree/bindings/sound/nokia,rx51.txt | 28 +++ .../devicetree/bindings/vendor-prefixes.txt | 1 + arch/arm/mach-omap2/board-rx51-peripherals.c | 11 ++ include/sound/rx51.h | 18 ++ include/sound/soc.h | 13 +- sound/soc/omap/omap-mcbsp.c | 5 +- sound/soc/omap/omap-mcbsp.h | 2 +- sound/soc/omap/rx51.c | 212 +++++++++++++++------ sound/soc/soc-core.c | 68 +++++-- 9 files changed, 277 insertions(+), 81 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/nokia,rx51.txt create mode 100644 include/sound/rx51.h -- 1.8.4.rc3

6 17

[alsa-devel] [PATCH] ALSA: hda - Fix silent output on ASUS W7J laptop
by Takashi Iwai 29 Nov '13

29 Nov '13

The recent kernels got regressions on ASUS W7J with ALC660 codec where no sound comes out. After a long debugging session, we found out that setting the pin control on the unused NID 0x10 is mandatory for the outputs. And, it was found out that another magic of NID 0x0f that is required for other ASUS laptops isn't needed on this machine. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=66081 Reported-and-tested-by: Andrey Lipaev <lipaev(a)mail.ru> Cc: <stable(a)vger.kernel.org> Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- sound/pci/hda/patch_realtek.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index 6366a6683e22..a98f3296b891 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -4494,6 +4494,7 @@ enum { ALC861_FIXUP_AMP_VREF_0F, ALC861_FIXUP_NO_JACK_DETECT, ALC861_FIXUP_ASUS_A6RP, + ALC660_FIXUP_ASUS_W7J, }; /* On some laptops, VREF of pin 0x0f is abused for controlling the main amp */ @@ -4543,10 +4544,21 @@ static const struct hda_fixup alc861_fixups[] = { .v.func = alc861_fixup_asus_amp_vref_0f, .chained = true, .chain_id = ALC861_FIXUP_NO_JACK_DETECT, + }, + [ALC660_FIXUP_ASUS_W7J] = { + .type = HDA_FIXUP_VERBS, + .v.verbs = (const struct hda_verb[]) { + /* ASUS W7J needs a magic pin setup on unused NID 0x10 + * for enabling outputs + */ + {0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, 0x24}, + { } + }, } }; static const struct snd_pci_quirk alc861_fixup_tbl[] = { + SND_PCI_QUIRK(0x1043, 0x1253, "ASUS W7J", ALC660_FIXUP_ASUS_W7J), SND_PCI_QUIRK(0x1043, 0x1393, "ASUS A6Rp", ALC861_FIXUP_ASUS_A6RP), SND_PCI_QUIRK_VENDOR(0x1043, "ASUS laptop", ALC861_FIXUP_AMP_VREF_0F), SND_PCI_QUIRK(0x1462, 0x7254, "HP DX2200", ALC861_FIXUP_NO_JACK_DETECT), -- 1.8.4.4

1 0

[alsa-devel] [PATCH] ASoC: core: Use consistent byte ordering in snd_soc_bytes_get
by Charles Keepax 29 Nov '13

29 Nov '13

snd_soc_bytes_put treats the data in the binary control as big endian words, however snd_soc_bytes_get uses the endian of the host machine. This causes the two functions to be inconsistant with how the mask is applied on little endian machines. This patch applies the big_endian format used in snd_soc_bytes_put to snd_soc_bytes_get. Signed-off-by: Charles Keepax <ckeepax(a)opensource.wolfsonmicro.com> --- sound/soc/soc-core.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c index 4e53d87..a66783e 100644 --- a/sound/soc/soc-core.c +++ b/sound/soc/soc-core.c @@ -3212,11 +3212,11 @@ int snd_soc_bytes_get(struct snd_kcontrol *kcontrol, break; case 2: ((u16 *)(&ucontrol->value.bytes.data))[0] - &= ~params->mask; + &= cpu_to_be16(~params->mask); break; case 4: ((u32 *)(&ucontrol->value.bytes.data))[0] - &= ~params->mask; + &= cpu_to_be32(~params->mask); break; default: return -EINVAL; -- 1.7.2.5

2 1

[alsa-devel] [PATCH 1/2] ASoC: atmel: sam9x5_wm8731: fix oops when unload module
by Bo Shen 29 Nov '13

29 Nov '13

As the priv is not assigned to card->drvdata, it is NULL, so when unload module, it will cause NULL pointer oops. Assign priv to card->drvdata to fix this issue. Signed-off-by: Bo Shen <voice.shen(a)atmel.com> --- sound/soc/atmel/sam9x5_wm8731.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/soc/atmel/sam9x5_wm8731.c b/sound/soc/atmel/sam9x5_wm8731.c index 992ae38..6dc33ac 100644 --- a/sound/soc/atmel/sam9x5_wm8731.c +++ b/sound/soc/atmel/sam9x5_wm8731.c @@ -99,6 +99,7 @@ static int sam9x5_wm8731_driver_probe(struct platform_device *pdev) card->dev = &pdev->dev; card->owner = THIS_MODULE; + card->drvdata = priv; card->dai_link = dai; card->num_links = 1; card->dapm_widgets = sam9x5_dapm_widgets; -- 1.7.9.5

3 9

[alsa-devel] [PATCH 1/4] dt: Add bindings documentation for the ADI AXI-I2S controller
by Lars-Peter Clausen 29 Nov '13

29 Nov '13

This patch adds the devicetree documentation for the ADI AXI-SPDIF audio controller. The controller has: * One set of memory mapped register * Two clocks, one for the memory mapped register interface, one used as the audio reference clock * One DMA interface each for the transmit and receive data Signed-off-by: Lars-Peter Clausen <lars(a)metafoo.de> Cc: Rob Herring <rob.herring(a)calxeda.com> Cc: Pawel Moll <pawel.moll(a)arm.com> Cc: Mark Rutland <mark.rutland(a)arm.com> Cc: Stephen Warren <swarren(a)wwwdotorg.org> Cc: Ian Campbell <ijc+devicetree(a)hellion.org.uk> Cc: devicetree(a)vger.kernel.org --- .../devicetree/bindings/sound/adi,axi-i2s.txt | 29 ++++++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/adi,axi-i2s.txt diff --git a/Documentation/devicetree/bindings/sound/adi,axi-i2s.txt b/Documentation/devicetree/bindings/sound/adi,axi-i2s.txt new file mode 100644 index 0000000..d9c0e53 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/adi,axi-i2s.txt @@ -0,0 +1,29 @@ +ADI AXI-I2S controller + +Required properties: + - compatible : Must be "adi,axi-i2s-1.00.a" + - reg : Must contain I2S registers location and length + - clocks : Clock specifier providing a handle to the controller's clocks. The + controller expects two clocks, the clock used for the AXI interface and the + clock used as thei sampling rate reference clock sample. + - clock-names : "axi" for the clock to the AXI interface, "ref" for the sample + rate reference clock. + - dma : Specifiers for the DMA channels that are used by the core. + - dma-names : "tx" for the transmit channel, "rx" for the receive channel. + +For more details on the 'dma', 'dma-names', 'clock' and 'clock-names' properties +please check: + * resource-names.txt + * clock/clock-bindings.txt + * dma/dma.txt + +Example: + + i2s: i2s@0x77600000 { + compatible = "adi,axi-i2s-1.00.a"; + reg = <0x77600000 0x1000>; + clocks = <&clk 15 &audio_clock>; + clock-names = "axi", "ref"; + dmas = <&ps7_dma 0 &ps7_dma 1>; + dma-names = "tx", "rx"; + }; -- 1.8.0

2 8

[alsa-devel] [PATCH] ALSA: hda - allow a codec to define its own depop delay time
by mengdong.lin＠intel.com 29 Nov '13

29 Nov '13

From: Mengdong Lin <mengdong.lin(a)intel.com> This patch adds 'depop_delay' to struct hda_codec, to indicate a depop delay time in ms when power-down, in function set_power_state() to D3. Default value is -1, for a default delay time. Machine fixup can set a suitable value according to the codec chip and HW audio design. Signed-off-by: Mengdong Lin <mengdong.lin(a)intel.com> diff --git a/sound/pci/hda/hda_codec.c b/sound/pci/hda/hda_codec.c index 1e04a20..75ec91e 100644 --- a/sound/pci/hda/hda_codec.c +++ b/sound/pci/hda/hda_codec.c @@ -1444,6 +1444,7 @@ int snd_hda_codec_new(struct hda_bus *bus, INIT_LIST_HEAD(&codec->conn_list); INIT_DELAYED_WORK(&codec->jackpoll_work, hda_jackpoll_work); + codec->depop_delay = -1; #ifdef CONFIG_PM spin_lock_init(&codec->power_lock); @@ -3901,8 +3902,10 @@ static unsigned int hda_set_power_state(struct hda_codec *codec, /* this delay seems necessary to avoid click noise at power-down */ if (power_state == AC_PWRST_D3) { - /* transition time less than 10ms for power down */ - msleep(codec->epss ? 10 : 100); + if (codec->depop_delay < 0) + msleep(codec->epss ? 10 : 100); + else if (codec->depop_delay > 0) + msleep(codec->depop_delay); flags = HDA_RW_NO_RESPONSE_FALLBACK; } diff --git a/sound/pci/hda/hda_codec.h b/sound/pci/hda/hda_codec.h index bedb436..efd0edc 100644 --- a/sound/pci/hda/hda_codec.h +++ b/sound/pci/hda/hda_codec.h @@ -943,6 +943,8 @@ struct hda_codec { struct snd_array jacks; #endif + int depop_delay; /* depop delay in ms, -1 for default delay time */ + /* fix-up list */ int fixup_id; const struct hda_fixup *fixup_list; -- 1.8.1.2

2 1

[alsa-devel] [RFC] ALSA: add new alsa control byte extended
by Vinod Koul 29 Nov '13

29 Nov '13

As discussed in the last Audio uConf we need to improve byte controls to allow larger size data to be sent to DSPs The modern DSPs require alsa byte controls size which far exceeds the today 512bytes limit. In order for usermode to send larger sizes (few 100s of KBs) along with size information we add extended byte control interface which sends any size bytes parameter buffer for DSPs to use Obviosly the size must be supported by the device and would be required to inform the max size allowed for the control. Signed-off-by: Vinod Koul <vinod.koul(a)intel.com> --- include/uapi/sound/asound.h | 8 +++++++- 1 files changed, 7 insertions(+), 1 deletions(-) diff --git a/include/uapi/sound/asound.h b/include/uapi/sound/asound.h index 9fc6219..8c10359 100644 --- a/include/uapi/sound/asound.h +++ b/include/uapi/sound/asound.h @@ -782,7 +782,8 @@ typedef int __bitwise snd_ctl_elem_type_t; #define SNDRV_CTL_ELEM_TYPE_BYTES ((__force snd_ctl_elem_type_t) 4) /* byte array */ #define SNDRV_CTL_ELEM_TYPE_IEC958 ((__force snd_ctl_elem_type_t) 5) /* IEC958 (S/PDIF) setup */ #define SNDRV_CTL_ELEM_TYPE_INTEGER64 ((__force snd_ctl_elem_type_t) 6) /* 64-bit integer type */ -#define SNDRV_CTL_ELEM_TYPE_LAST SNDRV_CTL_ELEM_TYPE_INTEGER64 +#define SNDRV_CTL_ELEM_TYPE_BYTES_EXT ((__force snd_ctl_elem_type_t) 7) /* bytes array extended */ +#define SNDRV_CTL_ELEM_TYPE_LAST SNDRV_CTL_ELEM_TYPE_BYTES_EXT typedef int __bitwise snd_ctl_elem_iface_t; #define SNDRV_CTL_ELEM_IFACE_CARD ((__force snd_ctl_elem_iface_t) 0) /* global control */ @@ -891,6 +892,11 @@ struct snd_ctl_elem_value { unsigned char data[512]; unsigned char *data_ptr; /* obsoleted */ } bytes; + struct { + unsigned long size; /* size of buffer */ + __u64 data; i /* user data pointer */ + } bytes_ext; + struct snd_aes_iec958 iec958; } value; /* RO */ struct timespec tstamp; -- 1.7.0.4

6 19

[alsa-devel] How to properly restart after config change
by Dolevo Jay 29 Nov '13

29 Nov '13

Hi experts, In my application, I some parameters in the asound.conf at runtime. However, after my software edits and changes the necessary parameters, the application still runs with the old configuration. If I run aplay, it works fine and runs with the new config but not my application. So, could anyone tell me what I should do extra after changing the parameters? Perhaps a small restart of something? thanks.

2 1

Re: [alsa-devel] ALSA: Add ALSA driver for Atmel Audio Bitstream DAC
by Dan Carpenter 29 Nov '13

29 Nov '13

Hello Hans-Christian Egtvedt, The patch e4967d6016b7: "ALSA: Add ALSA driver for Atmel Audio Bitstream DAC" from Feb 5, 2009, leads to the following static checker warning: "sound/atmel/abdac.c:373 set_sample_rates() error: buffer overflow 'dac->rates' 6 <= 6" sound/atmel/abdac.c 354 /* we start at 192 kHz and work our way down to 5112 Hz */ 355 while (new_rate >= RATE_MIN && index < (MAX_NUM_RATES + 1)) { index == MAX_NUM_RATES + 1 so index is 7. 356 new_rate = clk_round_rate(dac->sample_clk, 256 * new_rate); 357 if (new_rate < 0) 358 break; 359 /* make sure we are below the ABDAC clock */ 360 if (new_rate <= clk_get_rate(dac->pclk)) { 361 dac->rates[index] = new_rate / 256; index == MAX_NUM_RATES is off by one. 362 index++; 363 } 364 /* divide by 256 and then by two to get next rate */ 365 new_rate /= 256 * 2; 366 } 367 368 if (index) { 369 int i; 370 371 /* reverse array, smallest go first */ 372 for (i = 0; i < (index / 2); i++) { 373 unsigned int tmp = dac->rates[index - 1 - i]; 7 - 1 - 0 is 6, but dac->rates[] only has 6 elements so we are potentially reading beyond the end of the array here. 374 dac->rates[index - 1 - i] = dac->rates[i]; 375 dac->rates[i] = tmp; 376 } 377 378 dac->constraints_rates.count = index; 379 dac->constraints_rates.list = dac->rates; 380 dac->constraints_rates.mask = 0; 381 dac->rates_num = index; 382 383 retval = 0; 384 } regards, dan carpenter

2 2

[alsa-devel] Remove depop delay for suspend and resume
by Kailang 29 Nov '13

29 Nov '13

Hi Takashi, Intel test alc262. They find the suspend and resume time were > 50ms. So, I delete the delay for alc_eapd_shutup and alc_resume. If we want to have depop functions, we will follow like alc283. Thanks. Kailang

3 6

[alsa-devel] [PATCH 1/2] ALSA: hda/realtek - Remove depop delay for suspend and resume if applicable
by mengdong.lin＠intel.com 29 Nov '13

29 Nov '13

From: Kailang Yang <kailang(a)realtek.com> This patch defines a flag "no_depop_delay" in alc_spec. If this flag is set, delay in alc_eapd_shutup and alc_resume will be skipped. Machine-specific fixup can set this flag to reduce suspend/resume time, if the codec and hardware analog design can avoid pop noise without this delay. Signed-off-by: Kailang Yang <kailang(a)realtek.com> Signed-off-by: Mengdong Lin <mengdong.lin(a)intel.com> diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index 6366a66..503cf78 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -118,7 +118,8 @@ struct alc_spec { int init_amp; int codec_variant; /* flag for other variants */ - bool has_alc5505_dsp; + unsigned int has_alc5505_dsp:1; + unsigned int no_depop_delay:1; /* for PLL fix */ hda_nid_t pll_nid; @@ -280,8 +281,11 @@ static void alc_auto_setup_eapd(struct hda_codec *codec, bool on) */ static void alc_eapd_shutup(struct hda_codec *codec) { + struct alc_spec *spec = codec->spec; + alc_auto_setup_eapd(codec, false); - msleep(200); + if (!spec->no_depop_delay) + msleep(200); snd_hda_shutup_pins(codec); } @@ -863,7 +867,10 @@ static int alc_suspend(struct hda_codec *codec) #ifdef CONFIG_PM static int alc_resume(struct hda_codec *codec) { - msleep(150); /* to avoid pop noise */ + struct alc_spec *spec = codec->spec; + + if (!spec->no_depop_delay) + msleep(150); /* to avoid pop noise */ codec->patch_ops.init(codec); snd_hda_codec_resume_amp(codec); snd_hda_codec_resume_cache(codec); @@ -4448,7 +4455,7 @@ static int patch_alc269(struct hda_codec *codec) } if (snd_hda_codec_read(codec, 0x51, 0, AC_VERB_PARAMETERS, 0) == 0x10ec5505) { - spec->has_alc5505_dsp = true; + spec->has_alc5505_dsp = 1; spec->init_hook = alc5505_dsp_init; } -- 1.8.1.2

2 2

[alsa-devel] [PATCH 0/6] ASoC: rcar: add Gen2 support
by Kuninori Morimoto 29 Nov '13

29 Nov '13

Hi Mark These patches add Gen2 PIO transfer support for Renesas sound driver. DMA transfer will be supported. Kuninori Morimoto (6): ASoC: rcar: remove unused register settings ASoC: rcar: separate regmap init common field ASoC: rcar: add rsnd_is_accessible_reg() ASoC: rcar: remove .path_init/exit from rsnd_gen_ops ASoC: rcar: remove rcar_gen_ops ASoC: rcar: add Gen2 sound support sound/soc/sh/rcar/gen.c | 248 +++++++++++++++++++++++++++++----------------- sound/soc/sh/rcar/rsnd.h | 6 +- sound/soc/sh/rcar/ssi.c | 3 + 3 files changed, 162 insertions(+), 95 deletions(-) Best regards --- Kuninori Morimoto

2 7

[alsa-devel] [PATCH] ASoC: wm_adsp: Stop region iteration when the desired region is found
by Charles Keepax 29 Nov '13

29 Nov '13

When locating the memory region relating to a coefficient block written through a bin file we keep processing the list of regions even after we have found the region we require. This patch adds a break, so we don't process redundant list items. Signed-off-by: Charles Keepax <ckeepax(a)opensource.wolfsonmicro.com> --- sound/soc/codecs/wm_adsp.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 46ec0e9..b42f9af 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -1286,6 +1286,7 @@ static int wm_adsp_load_coeff(struct wm_adsp *dsp) reg = wm_adsp_region_to_reg(mem, reg); reg += offset; + break; } } -- 1.7.2.5

2 2

[alsa-devel] [PATCH] ASoC: cs42l52: Fix build
by Mark Brown 29 Nov '13

29 Nov '13

From: Mark Brown <broonie(a)linaro.org> Signed-off-by: Mark Brown <broonie(a)linaro.org> --- sound/soc/codecs/cs42l52.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/cs42l52.c b/sound/soc/codecs/cs42l52.c index 4a47a634f376..0bac6d5a4ac8 100644 --- a/sound/soc/codecs/cs42l52.c +++ b/sound/soc/codecs/cs42l52.c @@ -1232,7 +1232,7 @@ static int cs42l52_i2c_probe(struct i2c_client *i2c_client, if (of_property_read_u32(i2c_client->dev.of_node, "cirrus,chgfreq-divisor", &val32) >= 0) - pdata->chgfreq_divisor = val32; + pdata->chgfreq = val32; pdata->reset_gpio = of_get_named_gpio(i2c_client->dev.of_node, -- 1.8.4.4

1 0

[alsa-devel] [PATCH V2] ASoC: tegra: use reset framework
by Stephen Warren 29 Nov '13

29 Nov '13

From: Stephen Warren <swarren(a)nvidia.com> Tegra's clock driver now provides an implementation of the common reset API (include/linux/reset.h). Use this instead of the old Tegra- specific API; that will soon be removed. This change also renames "clock"/"clk" to "modules"/"mod" in symbols related to entries in configlink_clocks[], since: - We don't care about clock handles any more, but rather reset handles, so the old name isn't applicable. - It really is a list of modules on the bus, about which we currently only care about reset handles. If we start caring about any other aspect of the modules in the future, we won't have to rename all these symbols again. Note: The addition of "depends COMMON_CLOCK" is something that was missing before, not a new requirement. Cc: treding(a)nvidia.com Cc: pdeschrijver(a)nvidia.com Cc: linux-tegra(a)vger.kernel.org Cc: linux-arm-kernel(a)lists.infradead.org Cc: Liam Girdwood <lgirdwood(a)gmail.com> Cc: Mark Brown <broonie(a)kernel.org> Cc: alsa-devel(a)alsa-project.org Signed-off-by: Stephen Warren <swarren(a)nvidia.com> --- v2: Added note about COMMON_CLOCK to commit description. This patch is part of a series with strong internal depdendencies. I'm looking for an ack so that I can take the entire series through the Tegra and arm-soc trees. The series will be part of a stable branch that can be merged into other subsystems if needed to avoid/resolve dependencies. --- sound/soc/tegra/Kconfig | 2 ++ sound/soc/tegra/tegra30_ahub.c | 70 +++++++++++++++++++++++------------------- sound/soc/tegra/tegra30_ahub.h | 2 +- 3 files changed, 41 insertions(+), 33 deletions(-) diff --git a/sound/soc/tegra/Kconfig b/sound/soc/tegra/Kconfig index 8fc653ca3ab4..896292bb853f 100644 --- a/sound/soc/tegra/Kconfig +++ b/sound/soc/tegra/Kconfig @@ -1,6 +1,8 @@ config SND_SOC_TEGRA tristate "SoC Audio for the Tegra System-on-Chip" depends on (ARCH_TEGRA && TEGRA20_APB_DMA) || COMPILE_TEST + depends on COMMON_CLK + depends on RESET_CONTROLLER select REGMAP_MMIO select SND_SOC_GENERIC_DMAENGINE_PCM help diff --git a/sound/soc/tegra/tegra30_ahub.c b/sound/soc/tegra/tegra30_ahub.c index 31154338c1eb..5ce00dc48c44 100644 --- a/sound/soc/tegra/tegra30_ahub.c +++ b/sound/soc/tegra/tegra30_ahub.c @@ -24,6 +24,7 @@ #include <linux/platform_device.h> #include <linux/pm_runtime.h> #include <linux/regmap.h> +#include <linux/reset.h> #include <linux/slab.h> #include <linux/clk/tegra.h> #include <sound/soc.h> @@ -301,27 +302,27 @@ int tegra30_ahub_unset_rx_cif_source(enum tegra30_ahub_rxcif rxcif) } EXPORT_SYMBOL_GPL(tegra30_ahub_unset_rx_cif_source); -#define CLK_LIST_MASK_TEGRA30 BIT(0) -#define CLK_LIST_MASK_TEGRA114 BIT(1) +#define MOD_LIST_MASK_TEGRA30 BIT(0) +#define MOD_LIST_MASK_TEGRA114 BIT(1) -#define CLK_LIST_MASK_TEGRA30_OR_LATER \ - (CLK_LIST_MASK_TEGRA30 | CLK_LIST_MASK_TEGRA114) +#define MOD_LIST_MASK_TEGRA30_OR_LATER \ + (MOD_LIST_MASK_TEGRA30 | MOD_LIST_MASK_TEGRA114) static const struct { - const char *clk_name; - u32 clk_list_mask; -} configlink_clocks[] = { - { "i2s0", CLK_LIST_MASK_TEGRA30_OR_LATER }, - { "i2s1", CLK_LIST_MASK_TEGRA30_OR_LATER }, - { "i2s2", CLK_LIST_MASK_TEGRA30_OR_LATER }, - { "i2s3", CLK_LIST_MASK_TEGRA30_OR_LATER }, - { "i2s4", CLK_LIST_MASK_TEGRA30_OR_LATER }, - { "dam0", CLK_LIST_MASK_TEGRA30_OR_LATER }, - { "dam1", CLK_LIST_MASK_TEGRA30_OR_LATER }, - { "dam2", CLK_LIST_MASK_TEGRA30_OR_LATER }, - { "spdif_in", CLK_LIST_MASK_TEGRA30_OR_LATER }, - { "amx", CLK_LIST_MASK_TEGRA114 }, - { "adx", CLK_LIST_MASK_TEGRA114 }, + const char *rst_name; + u32 mod_list_mask; +} configlink_mods[] = { + { "i2s0", MOD_LIST_MASK_TEGRA30_OR_LATER }, + { "i2s1", MOD_LIST_MASK_TEGRA30_OR_LATER }, + { "i2s2", MOD_LIST_MASK_TEGRA30_OR_LATER }, + { "i2s3", MOD_LIST_MASK_TEGRA30_OR_LATER }, + { "i2s4", MOD_LIST_MASK_TEGRA30_OR_LATER }, + { "dam0", MOD_LIST_MASK_TEGRA30_OR_LATER }, + { "dam1", MOD_LIST_MASK_TEGRA30_OR_LATER }, + { "dam2", MOD_LIST_MASK_TEGRA30_OR_LATER }, + { "spdif", MOD_LIST_MASK_TEGRA30_OR_LATER }, + { "amx", MOD_LIST_MASK_TEGRA114 }, + { "adx", MOD_LIST_MASK_TEGRA114 }, }; #define LAST_REG(name) \ @@ -450,17 +451,17 @@ static const struct regmap_config tegra30_ahub_ahub_regmap_config = { }; static struct tegra30_ahub_soc_data soc_data_tegra30 = { - .clk_list_mask = CLK_LIST_MASK_TEGRA30, + .mod_list_mask = MOD_LIST_MASK_TEGRA30, .set_audio_cif = tegra30_ahub_set_cif, }; static struct tegra30_ahub_soc_data soc_data_tegra114 = { - .clk_list_mask = CLK_LIST_MASK_TEGRA114, + .mod_list_mask = MOD_LIST_MASK_TEGRA114, .set_audio_cif = tegra30_ahub_set_cif, }; static struct tegra30_ahub_soc_data soc_data_tegra124 = { - .clk_list_mask = CLK_LIST_MASK_TEGRA114, + .mod_list_mask = MOD_LIST_MASK_TEGRA114, .set_audio_cif = tegra124_ahub_set_cif, }; @@ -475,7 +476,7 @@ static int tegra30_ahub_probe(struct platform_device *pdev) { const struct of_device_id *match; const struct tegra30_ahub_soc_data *soc_data; - struct clk *clk; + struct reset_control *rst; int i; struct resource *res0, *res1, *region; u32 of_dma[2]; @@ -495,19 +496,24 @@ static int tegra30_ahub_probe(struct platform_device *pdev) * operate correctly, all devices on this bus must be out of reset. * Ensure that here. */ - for (i = 0; i < ARRAY_SIZE(configlink_clocks); i++) { - if (!(configlink_clocks[i].clk_list_mask & - soc_data->clk_list_mask)) + for (i = 0; i < ARRAY_SIZE(configlink_mods); i++) { + if (!(configlink_mods[i].mod_list_mask & + soc_data->mod_list_mask)) continue; - clk = clk_get(&pdev->dev, configlink_clocks[i].clk_name); - if (IS_ERR(clk)) { - dev_err(&pdev->dev, "Can't get clock %s\n", - configlink_clocks[i].clk_name); - ret = PTR_ERR(clk); + + rst = reset_control_get(&pdev->dev, + configlink_mods[i].rst_name); + if (IS_ERR(rst)) { + dev_err(&pdev->dev, "Can't get reset %s\n", + configlink_mods[i].rst_name); + ret = PTR_ERR(rst); goto err; } - tegra_periph_reset_deassert(clk); - clk_put(clk); + + ret = reset_control_deassert(rst); + reset_control_put(rst); + if (ret) + goto err; } ahub = devm_kzalloc(&pdev->dev, sizeof(struct tegra30_ahub), diff --git a/sound/soc/tegra/tegra30_ahub.h b/sound/soc/tegra/tegra30_ahub.h index d67321d90faa..1383f8cd3572 100644 --- a/sound/soc/tegra/tegra30_ahub.h +++ b/sound/soc/tegra/tegra30_ahub.h @@ -502,7 +502,7 @@ void tegra124_ahub_set_cif(struct regmap *regmap, unsigned int reg, struct tegra30_ahub_cif_conf *conf); struct tegra30_ahub_soc_data { - u32 clk_list_mask; + u32 mod_list_mask; void (*set_audio_cif)(struct regmap *regmap, unsigned int reg, struct tegra30_ahub_cif_conf *conf); -- 1.8.1.5

3 2

[alsa-devel] [PATCH] ASoC mc13783 codec: Add 'loudspeaker amp' and 'lineout amp'
by Lambrecht Jürgen 29 Nov '13

29 Nov '13

Add Alsp (loudspeaker amp) and Arxout (lineout amp) in the same way as Asp (speaker amp) and Ahs (headphone amp) - Remove "LSPL": all output controls are added now; this one doesn't exist - Fix: "LSP" is loudspeaker amp; they indeed share the same mux according to the datasheet figure but they have separate registers. And testing shows the Asp and Alsp muxes are separated. - Add "CODEC Capture Switch" control and move "CODEC Capture Mixin Switch" to its correct place Signed-off-by: Jürgen Lambrecht <J.Lambrecht(a)televic.com> --- sound/soc/codecs/mc13783.c | 29 ++++++++++++++++++++++++----- 1 file changed, 24 insertions(+), 5 deletions(-) diff --git a/sound/soc/codecs/mc13783.c b/sound/soc/codecs/mc13783.c index af7bc55..08fb022 100644 --- a/sound/soc/codecs/mc13783.c +++ b/sound/soc/codecs/mc13783.c @@ -437,6 +437,10 @@ static const SOC_ENUM_SINGLE_DECL(speaker_amp_source, MC13783_AUDIO_RX0, 4, speaker_amp_source_text); static const struct snd_kcontrol_new speaker_amp_source_mux = SOC_DAPM_ENUM("Speaker Amp Source MUX", speaker_amp_source); +static const SOC_ENUM_SINGLE_DECL(loudspeaker_amp_source, MC13783_AUDIO_RX0, 7, + speaker_amp_source_text); +static const struct snd_kcontrol_new loudspeaker_amp_source_mux = + SOC_DAPM_ENUM("Loudspeaker Amp Source MUX", loudspeaker_amp_source); static const char * const headset_amp_source_text[] = { "CODEC", "Mixer" @@ -447,6 +451,11 @@ static const SOC_ENUM_SINGLE_DECL(headset_amp_source, MC13783_AUDIO_RX0, 11, static const struct snd_kcontrol_new headset_amp_source_mux = SOC_DAPM_ENUM("Headset Amp Source MUX", headset_amp_source); +static const SOC_ENUM_SINGLE_DECL(lineout_amp_source, MC13783_AUDIO_RX0, 17, + headset_amp_source_text); +static const struct snd_kcontrol_new lineout_amp_source_mux = + SOC_DAPM_ENUM("Lineout Amp Source MUX", lineout_amp_source); + static const struct snd_kcontrol_new cdcout_ctl = SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 18, 1, 0); @@ -493,10 +502,15 @@ static const struct snd_soc_dapm_widget mc13783_dapm_widgets[] = { SND_SOC_DAPM_MUX("Speaker Amp Source MUX", SND_SOC_NOPM, 0, 0, &speaker_amp_source_mux), + SND_SOC_DAPM_MUX("Loudspeaker Amp Source MUX", SND_SOC_NOPM, 0, 0, + &loudspeaker_amp_source_mux), SND_SOC_DAPM_MUX("Headset Amp Source MUX", SND_SOC_NOPM, 0, 0, &headset_amp_source_mux), + SND_SOC_DAPM_MUX("Lineout Amp Source MUX", SND_SOC_NOPM, 0, 0, + &lineout_amp_source_mux), + SND_SOC_DAPM_PGA("PGA Left Input", SND_SOC_NOPM, 0, 0, NULL, 0), SND_SOC_DAPM_PGA("PGA Right Input", SND_SOC_NOPM, 0, 0, NULL, 0), @@ -514,7 +528,6 @@ static const struct snd_soc_dapm_widget mc13783_dapm_widgets[] = { SND_SOC_DAPM_OUTPUT("RXOUTR"), SND_SOC_DAPM_OUTPUT("HSL"), SND_SOC_DAPM_OUTPUT("HSR"), - SND_SOC_DAPM_OUTPUT("LSPL"), SND_SOC_DAPM_OUTPUT("LSP"), SND_SOC_DAPM_OUTPUT("SP"), SND_SOC_DAPM_OUTPUT("CDCOUT"), @@ -563,21 +576,26 @@ static struct snd_soc_dapm_route mc13783_routes[] = { { "Speaker Amp Source MUX", "CODEC", "Voice CODEC PGA"}, { "Speaker Amp Source MUX", "Right", "DAC PGA"}, + { "Loudspeaker Amp Source MUX", "CODEC", "Voice CODEC PGA"}, + { "Loudspeaker Amp Source MUX", "Right", "DAC PGA"}, { "Headset Amp Source MUX", "CODEC", "Voice CODEC PGA"}, { "Headset Amp Source MUX", "Mixer", "DAC PGA"}, + { "Lineout Amp Source MUX", "CODEC", "Voice CODEC PGA"}, + { "Lineout Amp Source MUX", "Mixer", "DAC PGA"}, + /* Output */ { "HSL", NULL, "Headset Amp Left" }, { "HSR", NULL, "Headset Amp Right"}, { "RXOUTL", NULL, "Line out Amp Left"}, { "RXOUTR", NULL, "Line out Amp Right"}, { "SP", "Speaker Amp Switch", "Speaker Amp Source MUX"}, - { "LSP", "Loudspeaker Amp", "Speaker Amp Source MUX"}, + { "LSP", "Loudspeaker Amp", "Loudspeaker Amp Source MUX"}, { "HSL", "Headset Amp Left", "Headset Amp Source MUX"}, { "HSR", "Headset Amp Right", "Headset Amp Source MUX"}, - { "Line out Amp Left", NULL, "DAC PGA"}, - { "Line out Amp Right", NULL, "DAC PGA"}, + { "RXOUTL", "Line out Amp Left", "Lineout Amp Source MUX"}, + { "RXOUTR", "Line out Amp Right", "Lineout Amp Source MUX"}, { "DAC PGA", NULL, "DAC"}, { "DAC", NULL, "DAC_E"}, { "CDCOUT", "CDCOUT Switch", "Voice CODEC PGA"}, @@ -602,11 +620,12 @@ static struct snd_kcontrol_new mc13783_control_list[] = { SOC_DOUBLE("Headset Amp Switch", MC13783_AUDIO_RX0, 10, 9, 1, 0), SOC_DOUBLE("Line out Amp Switch", MC13783_AUDIO_RX0, 16, 15, 1, 0), + SOC_SINGLE("CODEC Capture Mixin Switch", MC13783_AUDIO_RX0, 21, 1, 0), SOC_SINGLE("PCM Capture Mixin Switch", MC13783_AUDIO_RX0, 22, 1, 0), SOC_SINGLE("Line in Capture Mixin Switch", MC13783_AUDIO_RX0, 23, 1, 0), SOC_SINGLE("CODEC Capture Volume", MC13783_AUDIO_RX1, 1, 15, 0), - SOC_SINGLE("CODEC Capture Mixin Switch", MC13783_AUDIO_RX0, 21, 1, 0), + SOC_SINGLE("CODEC Capture Switch", MC13783_AUDIO_RX1, 0, 1, 0), SOC_SINGLE("Line in Capture Volume", MC13783_AUDIO_RX1, 12, 15, 0), SOC_SINGLE("Line in Capture Switch", MC13783_AUDIO_RX1, 10, 1, 0), -- 1.7.10.4

1 0

[alsa-devel] [PATCH] ASoC mc13783 codec: complete capture mux
by Lambrecht Jürgen 29 Nov '13

29 Nov '13

codec adc (capture) mux was not complete: * fix naming of TXIN/TX * reorder RXIN and TXIN to show muxing priority * implement RXIN/RX (R and L are the same control) Signed-off-by: Jürgen Lambrecht <J.Lambrecht(a)televic.com> --- sound/soc/codecs/mc13783.c | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/sound/soc/codecs/mc13783.c b/sound/soc/codecs/mc13783.c index bae6016..af7bc55 100644 --- a/sound/soc/codecs/mc13783.c +++ b/sound/soc/codecs/mc13783.c @@ -401,11 +401,14 @@ static const struct snd_kcontrol_new mc2_amp_ctl = static const struct snd_kcontrol_new atx_amp_ctl = SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_TX, 11, 1, 0); +static const struct snd_kcontrol_new rx_sel_ctl = + SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_TX, 13, 1, 0); + /* Virtual mux. The chip does the input selection automatically * as soon as we enable one input. */ static const char * const adcl_enum_text[] = { - "MC1L", "RXINL", + "MC1L", "RXL", }; static const struct soc_enum adcl_enum = @@ -415,7 +418,7 @@ static const struct snd_kcontrol_new left_input_mux = SOC_DAPM_ENUM_VIRT("Route", adcl_enum); static const char * const adcr_enum_text[] = { - "MC1R", "MC2", "RXINR", "TXIN", + "MC1R", "MC2", "TX", "RXR", }; static const struct soc_enum adcr_enum = @@ -470,9 +473,9 @@ static const struct snd_soc_dapm_widget mc13783_dapm_widgets[] = { SND_SOC_DAPM_INPUT("MC1LIN"), SND_SOC_DAPM_INPUT("MC1RIN"), SND_SOC_DAPM_INPUT("MC2IN"), + SND_SOC_DAPM_INPUT("TXIN"), SND_SOC_DAPM_INPUT("RXINR"), SND_SOC_DAPM_INPUT("RXINL"), - SND_SOC_DAPM_INPUT("TXIN"), SND_SOC_DAPM_SUPPLY("MC1 Bias", MC13783_AUDIO_TX, 0, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("MC2 Bias", MC13783_AUDIO_TX, 1, 0, NULL, 0), @@ -480,7 +483,8 @@ static const struct snd_soc_dapm_widget mc13783_dapm_widgets[] = { SND_SOC_DAPM_SWITCH("MC1L Amp", MC13783_AUDIO_TX, 7, 0, &mc1l_amp_ctl), SND_SOC_DAPM_SWITCH("MC1R Amp", MC13783_AUDIO_TX, 5, 0, &mc1r_amp_ctl), SND_SOC_DAPM_SWITCH("MC2 Amp", MC13783_AUDIO_TX, 9, 0, &mc2_amp_ctl), - SND_SOC_DAPM_SWITCH("TXIN Amp", MC13783_AUDIO_TX, 11, 0, &atx_amp_ctl), + SND_SOC_DAPM_SWITCH("TX Amp", MC13783_AUDIO_TX, 11, 0, &atx_amp_ctl), + SND_SOC_DAPM_SWITCH("RX Sel", MC13783_AUDIO_TX, 13, 0, &rx_sel_ctl), SND_SOC_DAPM_VIRT_MUX("PGA Left Input Mux", SND_SOC_NOPM, 0, 0, &left_input_mux), @@ -537,14 +541,16 @@ static struct snd_soc_dapm_route mc13783_routes[] = { { "MC1L Amp", NULL, "MC1LIN"}, { "MC1R Amp", NULL, "MC1RIN" }, { "MC2 Amp", NULL, "MC2IN" }, - { "TXIN Amp", NULL, "TXIN"}, + { "TX Amp", NULL, "TXIN"}, + { "RX Sel", NULL, "RXINR"}, + { "RX Sel", NULL, "RXINL"}, /* indeed same control bit for RXINR and RXINL */ { "PGA Left Input Mux", "MC1L", "MC1L Amp" }, - { "PGA Left Input Mux", "RXINL", "RXINL"}, + { "PGA Left Input Mux", "RXL", "RX Sel"}, { "PGA Right Input Mux", "MC1R", "MC1R Amp" }, { "PGA Right Input Mux", "MC2", "MC2 Amp"}, - { "PGA Right Input Mux", "TXIN", "TXIN Amp"}, - { "PGA Right Input Mux", "RXINR", "RXINR"}, + { "PGA Right Input Mux", "TX", "TX Amp"}, + { "PGA Right Input Mux", "RXR", "RX Sel"}, { "PGA Left Input", NULL, "PGA Left Input Mux"}, { "PGA Right Input", NULL, "PGA Right Input Mux"}, -- 1.7.10.4

1 0

[alsa-devel] [patch] ALSA: dice: fix array limits in dice_proc_read()
by Dan Carpenter 29 Nov '13

29 Nov '13

The array limits are supposed to be in units of u32 instead of in bytes. The current code has a potential array overflow. Fixes: c614475b0ea9 ('ALSA: dice: add a proc file to show device information') Signed-off-by: Dan Carpenter <dan.carpenter(a)oracle.com> diff --git a/sound/firewire/dice.c b/sound/firewire/dice.c index 57bcd31fcc12..c0aa64941cee 100644 --- a/sound/firewire/dice.c +++ b/sound/firewire/dice.c @@ -1019,7 +1019,7 @@ static void dice_proc_read(struct snd_info_entry *entry, if (dice_proc_read_mem(dice, &tx_rx_header, sections[2], 2) < 0) return; - quadlets = min_t(u32, tx_rx_header.size, sizeof(buf.tx)); + quadlets = min_t(u32, tx_rx_header.size, sizeof(buf.tx) / 4); for (stream = 0; stream < tx_rx_header.number; ++stream) { if (dice_proc_read_mem(dice, &buf.tx, sections[2] + 2 + stream * tx_rx_header.size, @@ -1045,7 +1045,7 @@ static void dice_proc_read(struct snd_info_entry *entry, if (dice_proc_read_mem(dice, &tx_rx_header, sections[4], 2) < 0) return; - quadlets = min_t(u32, tx_rx_header.size, sizeof(buf.rx)); + quadlets = min_t(u32, tx_rx_header.size, sizeof(buf.rx) / 4); for (stream = 0; stream < tx_rx_header.number; ++stream) { if (dice_proc_read_mem(dice, &buf.rx, sections[4] + 2 + stream * tx_rx_header.size,

4 4

[alsa-devel] [PATCH] ALSA: hda - Add mono speaker quirk for Dell Inspiron 5439
by David Henningsson 29 Nov '13

29 Nov '13

This machine also has mono output if run through DAC node 0x03. Cc: stable(a)vger.kernel.org (v3.10+) BugLink: https://bugs.launchpad.net/bugs/1256212 Tested-by: David Chen <david.chen(a)canonical.com> Signed-off-by: David Henningsson <david.henningsson(a)canonical.com> --- sound/pci/hda/patch_realtek.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index 2ad568e..8099200 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -4243,6 +4243,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { SND_PCI_QUIRK(0x1028, 0x0614, "Dell Inspiron 3135", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE), SND_PCI_QUIRK(0x1028, 0x0616, "Dell Vostro 5470", ALC290_FIXUP_MONO_SPEAKERS), SND_PCI_QUIRK(0x1028, 0x061f, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE), + SND_PCI_QUIRK(0x1028, 0x0638, "Dell Inspiron 5439", ALC290_FIXUP_MONO_SPEAKERS), SND_PCI_QUIRK(0x1028, 0x063f, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE), SND_PCI_QUIRK(0x1028, 0x15cc, "Dell X5 Precision", ALC269_FIXUP_DELL2_MIC_NO_PRESENCE), SND_PCI_QUIRK(0x1028, 0x15cd, "Dell X5 Precision", ALC269_FIXUP_DELL2_MIC_NO_PRESENCE), -- 1.7.9.5

2 1

[alsa-devel] [PATCH 00/11] codecs: Use IS_ENABLED() macro
by Fabio Estevam 29 Nov '13

29 Nov '13

From: Fabio Estevam <fabio.estevam(a)freescale.com> Using the IS_ENABLED() macro can make the code shorter and simpler. Mark, There are still more ocurrences that can be converted to IS_ENABLED. If you are happy with this series I will send another one with the remaining pieces.

3 15

[alsa-devel] [PATCH] hda-emu: Add workqueue_set_max_active function
by David Henningsson 29 Nov '13

29 Nov '13

Signed-off-by: David Henningsson <david.henningsson(a)canonical.com> --- include/linux/workqueue.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/linux/workqueue.h b/include/linux/workqueue.h index 1a8834e..ca49b4c 100644 --- a/include/linux/workqueue.h +++ b/include/linux/workqueue.h @@ -53,4 +53,7 @@ static inline struct delayed_work *to_delayed_work(struct work_struct *work) return container_of(work, struct delayed_work, work); } +static inline void workqueue_set_max_active(struct workqueue_struct *wq, + int max_active) { } + #endif /* __LINUX_WORKQUEUE_H */ -- 1.7.9.5

2 1

[alsa-devel] HD-Audio: can msleep in hda_set_power_state() to D3 be optional?
by Lin, Mengdong 29 Nov '13

29 Nov '13

Hi Takashi, In hda_set_power_state(), there is a mandatory sleep up to 100ms before setting state to D3. /* this delay seems necessary to avoid click noise at power-down */ if (power_state == AC_PWRST_D3) { msleep(codec->epss ? 10 : 100); ... Could this be optional for specific codecs? flags = HDA_RW_NO_RESPONSE_FALLBACK; } Some codecs implement their own sleep in patch_ops.suspend() to avoid the noise. So is it okay to add a codec flag to decide whether the sleep is necessary here? Thanks Mengdong

2 3

[alsa-devel] [PATCH] ASoC: adsp: Use async writes where possible
by Mark Brown 28 Nov '13

28 Nov '13

From: Mark Brown <broonie(a)linaro.org> This will allow a marginal speed improvement when used with a bus that supports async I/O by reducing the amount of context thrashing between writes, allowing the bus to be more fully utilised. Signed-off-by: Mark Brown <broonie(a)linaro.org> --- sound/soc/codecs/wm_adsp.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 46ec0e9744d4..6b1c01c66e64 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -1468,8 +1468,8 @@ static int wm_adsp2_ena(struct wm_adsp *dsp) unsigned int val; int ret, count; - ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, - ADSP2_SYS_ENA, ADSP2_SYS_ENA); + ret = regmap_update_bits_async(dsp->regmap, dsp->base + ADSP2_CONTROL, + ADSP2_SYS_ENA, ADSP2_SYS_ENA); if (ret != 0) return ret; @@ -1521,9 +1521,9 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, val = (val & ARIZONA_SYSCLK_FREQ_MASK) >> ARIZONA_SYSCLK_FREQ_SHIFT; - ret = regmap_update_bits(dsp->regmap, - dsp->base + ADSP2_CLOCKING, - ADSP2_CLK_SEL_MASK, val); + ret = regmap_update_bits_async(dsp->regmap, + dsp->base + ADSP2_CLOCKING, + ADSP2_CLK_SEL_MASK, val); if (ret != 0) { adsp_err(dsp, "Failed to set clock rate: %d\n", ret); @@ -1586,10 +1586,10 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, if (ret != 0) goto err; - ret = regmap_update_bits(dsp->regmap, - dsp->base + ADSP2_CONTROL, - ADSP2_CORE_ENA | ADSP2_START, - ADSP2_CORE_ENA | ADSP2_START); + ret = regmap_update_bits_async(dsp->regmap, + dsp->base + ADSP2_CONTROL, + ADSP2_CORE_ENA | ADSP2_START, + ADSP2_CORE_ENA | ADSP2_START); if (ret != 0) goto err; -- 1.8.4.4

1 0

[alsa-devel] [PATCH 1/3] ASoC: ak4642: Convert to module_i2c_driver()
by Mark Brown 28 Nov '13

28 Nov '13

From: Mark Brown <broonie(a)linaro.org> The device does not support anything other than I2C (at least with the current driver) so save code. Signed-off-by: Mark Brown <broonie(a)linaro.org> --- sound/soc/codecs/ak4642.c | 22 +--------------------- 1 file changed, 1 insertion(+), 21 deletions(-) diff --git a/sound/soc/codecs/ak4642.c b/sound/soc/codecs/ak4642.c index 2f861c9b1d69..5bb18e913fa5 100644 --- a/sound/soc/codecs/ak4642.c +++ b/sound/soc/codecs/ak4642.c @@ -511,7 +511,6 @@ static struct snd_soc_codec_driver soc_codec_dev_ak4648 = { .num_dapm_routes = ARRAY_SIZE(ak4642_intercon), }; -#if IS_ENABLED(CONFIG_I2C) static struct of_device_id ak4642_of_match[]; static int ak4642_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *id) @@ -571,27 +570,8 @@ static struct i2c_driver ak4642_i2c_driver = { .remove = ak4642_i2c_remove, .id_table = ak4642_i2c_id, }; -#endif -static int __init ak4642_modinit(void) -{ - int ret = 0; -#if IS_ENABLED(CONFIG_I2C) - ret = i2c_add_driver(&ak4642_i2c_driver); -#endif - return ret; - -} -module_init(ak4642_modinit); - -static void __exit ak4642_exit(void) -{ -#if IS_ENABLED(CONFIG_I2C) - i2c_del_driver(&ak4642_i2c_driver); -#endif - -} -module_exit(ak4642_exit); +module_i2c_driver(ak4642_i2c_driver); MODULE_DESCRIPTION("Soc AK4642 driver"); MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori(a)renesas.com>"); -- 1.8.4.4

1 2

[alsa-devel] [PATCH 1/2] ALSA: hda - Initialize missing bass speaker pin for ASUS AIO ET2700
by Takashi Iwai 28 Nov '13

28 Nov '13

Add a fixup entry for the missing bass speaker pin 0x16 on ASUS ET2700 AiO desktop. The channel map will be added in the next patch, so that this can be backported easily to stable kernels. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=65961 Cc: <stable(a)vger.kernel.org> Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- sound/pci/hda/patch_realtek.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index 3a9a1b0c1dbe..fd835c52618e 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -1782,6 +1782,7 @@ enum { ALC889_FIXUP_IMAC91_VREF, ALC882_FIXUP_INV_DMIC, ALC882_FIXUP_NO_PRIMARY_HP, + ALC887_FIXUP_ASUS_BASS, }; static void alc889_fixup_coef(struct hda_codec *codec, @@ -2105,6 +2106,13 @@ static const struct hda_fixup alc882_fixups[] = { .type = HDA_FIXUP_FUNC, .v.func = alc882_fixup_no_primary_hp, }, + [ALC887_FIXUP_ASUS_BASS] = { + .type = HDA_FIXUP_PINS, + .v.pins = (const struct hda_pintbl[]) { + {0x16, 0x99130130}, /* bass speaker */ + {} + }, + }, }; static const struct snd_pci_quirk alc882_fixup_tbl[] = { @@ -2138,6 +2146,7 @@ static const struct snd_pci_quirk alc882_fixup_tbl[] = { SND_PCI_QUIRK(0x1043, 0x1873, "ASUS W90V", ALC882_FIXUP_ASUS_W90V), SND_PCI_QUIRK(0x1043, 0x1971, "Asus W2JC", ALC882_FIXUP_ASUS_W2JC), SND_PCI_QUIRK(0x1043, 0x835f, "Asus Eee 1601", ALC888_FIXUP_EEE1601), + SND_PCI_QUIRK(0x1043, 0x84bc, "ASUS ET2700", ALC887_FIXUP_ASUS_BASS), SND_PCI_QUIRK(0x104d, 0x9047, "Sony Vaio TT", ALC889_FIXUP_VAIO_TT), SND_PCI_QUIRK(0x104d, 0x905a, "Sony Vaio Z", ALC882_FIXUP_NO_PRIMARY_HP), SND_PCI_QUIRK(0x104d, 0x9043, "Sony Vaio VGC-LN51JGB", ALC882_FIXUP_NO_PRIMARY_HP), -- 1.8.4.4

1 1

[alsa-devel] [PATCH] Add nommu support for alsa-utils
by Aaron Wu 28 Nov '13

28 Nov '13

Signed-off-by: Aaron Wu <aaron.wu(a)analog.com> Add nommu support for alsa-utils mainly for Blackfin --- package/alsa-utils/alsa-utils-nommu.patch | 54 +++++++++++++++++++++++++++++ package/alsa-utils/alsa-utils.mk | 1 + 2 files changed, 55 insertions(+) create mode 100644 package/alsa-utils/alsa-utils-nommu.patch diff --git a/package/alsa-utils/alsa-utils-nommu.patch b/package/alsa-utils/alsa-utils-nommu.patch new file mode 100644 index 0000000..c0227f5 --- /dev/null +++ b/package/alsa-utils/alsa-utils-nommu.patch @@ -0,0 +1,54 @@ +diff -Nur alsa-utils-1.0.26/alsactl/init_utils_run.c alsa-utils-1.0.26-new/alsactl/init_utils_run.c +--- alsa-utils-1.0.26/alsactl/init_utils_run.c 2012-09-06 15:52:57.000000000 +0800 ++++ alsa-utils-1.0.26-new/alsactl/init_utils_run.c 2013-10-22 02:19:06.210649921 +0800 +@@ -88,8 +88,11 @@ + strlcat(program, argv[0], sizeof(program)); + argv[0] = program; + } +- ++#ifdef HAVE_FORK + pid = fork(); ++#else ++ pid = vfork(); ++#endif + switch(pid) { + case 0: + /* child closes parent ends of pipes */ +diff -Nur alsa-utils-1.0.26/alsaloop/alsaloop.c alsa-utils-1.0.26-new/alsaloop/alsaloop.c +--- alsa-utils-1.0.26/alsaloop/alsaloop.c 2012-09-06 15:52:57.000000000 +0800 ++++ alsa-utils-1.0.26-new/alsaloop/alsaloop.c 2013-10-22 02:21:26.994650695 +0800 +@@ -850,14 +850,22 @@ + logit(LOG_CRIT, "daemon() failed: %s\n", strerror(errno)); + exit(EXIT_FAILURE); + } ++ #ifdef HAVE_FORK + i = fork(); ++ #else ++ i = vfork(); ++ #endif + if (i < 0) { + logit(LOG_CRIT, "fork() failed: %s\n", strerror(errno)); + exit(EXIT_FAILURE); + } + if (i > 0) { + /* wait(&i); */ ++ #ifdef HAVE_FORK + exit(EXIT_SUCCESS); ++ #else ++ _exit(EXIT_SUCCESS); ++ #endif + } + } + +diff -Nur alsa-utils-1.0.26/configure.in alsa-utils-1.0.26-new/configure.in +--- alsa-utils-1.0.26/configure.in 2012-09-06 16:45:44.000000000 +0800 ++++ alsa-utils-1.0.26-new/configure.in 2013-10-23 02:25:40.391127379 +0800 +@@ -23,6 +23,8 @@ + AC_MSG_RESULT($CC) + fi + ++ ++AC_CHECK_FUNC([fork]) + AC_PROG_CC + dnl AC_PROG_CXX + AC_PROG_INSTALL diff --git a/package/alsa-utils/alsa-utils.mk b/package/alsa-utils/alsa-utils.mk index b951112..4956e04 100644 --- a/package/alsa-utils/alsa-utils.mk +++ b/package/alsa-utils/alsa-utils.mk @@ -9,6 +9,7 @@ ALSA_UTILS_SOURCE = alsa-utils-$(ALSA_UTILS_VERSION).tar.bz2 ALSA_UTILS_SITE = http://alsa.cybermirror.org/utils ALSA_UTILS_LICENSE = GPLv2 ALSA_UTILS_LICENSE_FILES = COPYING +ALSA_UTILS_AUTORECONF = YES ALSA_UTILS_INSTALL_STAGING = YES ALSA_UTILS_DEPENDENCIES = host-gettext alsa-lib \ $(if $(BR2_PACKAGE_NCURSES),ncurses) -- 1.7.9.5

2 1

[alsa-devel] [PATCH] ALSA: hda - Add zenbook-boost model for ASUS Zenbook
by Takashi Iwai 28 Nov '13

28 Nov '13

There's been a complaint about the too soft output on ASUS Zenbook with ALC269VB in comparison with Windows. It turned out, however, that the actual hardware output level is same between Linux and Windows unless software plugin is used. Still, it'd be convenient to give a capability for increasing the output level via Realtek codec's D-class amp. As a compromise, here provides a new model option, zenbook-boost, to enable the COEFs for the output boost amp. It's not used unless the option is given explicitly just for safety reason. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=62651 Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- Documentation/sound/alsa/HD-Audio-Models.txt | 1 + sound/pci/hda/patch_realtek.c | 13 +++++++++++++ 2 files changed, 14 insertions(+) diff --git a/Documentation/sound/alsa/HD-Audio-Models.txt b/Documentation/sound/alsa/HD-Audio-Models.txt index 85c362d8ea34..6fbd108bcb27 100644 --- a/Documentation/sound/alsa/HD-Audio-Models.txt +++ b/Documentation/sound/alsa/HD-Audio-Models.txt @@ -32,6 +32,7 @@ ALC269/270/275/276/28x/29x lenovo-dock Enables docking station I/O for some Lenovos dell-headset-multi Headset jack, which can also be used as mic-in dell-headset-dock Headset jack (without mic-in), and also dock I/O + zenbook-boost Add +6dB amp to output of ASUS Zenbook ALC66x/67x/892 ============== diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index 3a9a1b0c1dbe..284952c37929 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -3799,6 +3799,7 @@ enum { ALC269_FIXUP_ACER_AC700, ALC269_FIXUP_LIMIT_INT_MIC_BOOST, ALC269VB_FIXUP_ASUS_ZENBOOK, + ALC269VB_FIXUP_ASUS_ZENBOOK_BOOST, ALC269_FIXUP_LIMIT_INT_MIC_BOOST_MUTE_LED, ALC269VB_FIXUP_ORDISSIMO_EVE2, ALC283_FIXUP_CHROME_BOOK, @@ -4082,6 +4083,17 @@ static const struct hda_fixup alc269_fixups[] = { .chained = true, .chain_id = ALC269VB_FIXUP_DMIC, }, + [ALC269VB_FIXUP_ASUS_ZENBOOK_BOOST] = { + .type = HDA_FIXUP_VERBS, + .v.verbs = (const struct hda_verb[]) { + /* class-D output boost +6dB */ + {0x20, AC_VERB_SET_COEF_INDEX, 0x12}, + {0x20, AC_VERB_SET_PROC_COEF, 0x3000}, + { } + }, + .chained = true, + .chain_id = ALC269VB_FIXUP_ASUS_ZENBOOK, + }, [ALC269_FIXUP_LIMIT_INT_MIC_BOOST_MUTE_LED] = { .type = HDA_FIXUP_FUNC, .v.func = alc269_fixup_limit_int_mic_boost, @@ -4299,6 +4311,7 @@ static const struct hda_model_fixup alc269_fixup_models[] = { {.id = ALC269_FIXUP_HP_GPIO_LED, .name = "hp-gpio-led"}, {.id = ALC269_FIXUP_DELL1_MIC_NO_PRESENCE, .name = "dell-headset-multi"}, {.id = ALC269_FIXUP_DELL2_MIC_NO_PRESENCE, .name = "dell-headset-dock"}, + {.id = ALC269VB_FIXUP_ASUS_ZENBOOK_BOOST, .name = "zenbook-boost"}, {} }; -- 1.8.4.4

1 0

[alsa-devel] [PATCH] ALSA: hda - Check leaf nodes to find aamix amps
by Takashi Iwai 28 Nov '13

28 Nov '13

The current generic parser assumes blindly that the volume and mute amps are found in the aamix node itself. But on some codecs, typically Analog Devices ones, the aamix amps are separately implemented in each leaf node of the aamix node, and the current driver can't establish the correct amp controls. This is a regression compared with the previous static quirks. This patch extends the search for the amps to the leaf nodes for allowing the aamix controls again on such codecs. In this implementation, I didn't code to loop through the whole paths, since usually one depth should suffice, and we can't search too deeply, as it may result in the conflicting control assignments. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=65641 Cc: <stable(a)vger.kernel.org> Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- sound/pci/hda/hda_generic.c | 57 +++++++++++++++++++++++++++++++++++---------- 1 file changed, 45 insertions(+), 12 deletions(-) diff --git a/sound/pci/hda/hda_generic.c b/sound/pci/hda/hda_generic.c index faefff1d3e81..c4671d00babd 100644 --- a/sound/pci/hda/hda_generic.c +++ b/sound/pci/hda/hda_generic.c @@ -2808,6 +2808,42 @@ static int add_loopback_list(struct hda_gen_spec *spec, hda_nid_t mix, int idx) return 0; } +/* return true if either a volume or a mute amp is found for the given + * aamix path; the amp has to be either in the mixer node or its direct leaf + */ +static bool look_for_mix_leaf_ctls(struct hda_codec *codec, hda_nid_t mix_nid, + hda_nid_t pin, unsigned int *mix_val, + unsigned int *mute_val) +{ + int idx, num_conns; + const hda_nid_t *list; + hda_nid_t nid; + + idx = snd_hda_get_conn_index(codec, mix_nid, pin, true); + if (idx < 0) + return false; + + *mix_val = *mute_val = 0; + if (nid_has_volume(codec, mix_nid, HDA_INPUT)) + *mix_val = HDA_COMPOSE_AMP_VAL(mix_nid, 3, idx, HDA_INPUT); + if (nid_has_mute(codec, mix_nid, HDA_INPUT)) + *mute_val = HDA_COMPOSE_AMP_VAL(mix_nid, 3, idx, HDA_INPUT); + if (*mix_val && *mute_val) + return true; + + /* check leaf node */ + num_conns = snd_hda_get_conn_list(codec, mix_nid, &list); + if (num_conns < idx) + return false; + nid = list[idx]; + if (!*mix_val && nid_has_volume(codec, nid, HDA_OUTPUT)) + *mix_val = HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT); + if (!*mute_val && nid_has_mute(codec, nid, HDA_OUTPUT)) + *mute_val = HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT); + + return *mix_val || *mute_val; +} + /* create input playback/capture controls for the given pin */ static int new_analog_input(struct hda_codec *codec, int input_idx, hda_nid_t pin, const char *ctlname, int ctlidx, @@ -2815,12 +2851,11 @@ static int new_analog_input(struct hda_codec *codec, int input_idx, { struct hda_gen_spec *spec = codec->spec; struct nid_path *path; - unsigned int val; + unsigned int mix_val, mute_val; int err, idx; - if (!nid_has_volume(codec, mix_nid, HDA_INPUT) && - !nid_has_mute(codec, mix_nid, HDA_INPUT)) - return 0; /* no need for analog loopback */ + if (!look_for_mix_leaf_ctls(codec, mix_nid, pin, &mix_val, &mute_val)) + return 0; path = snd_hda_add_new_path(codec, pin, mix_nid, 0); if (!path) @@ -2829,20 +2864,18 @@ static int new_analog_input(struct hda_codec *codec, int input_idx, spec->loopback_paths[input_idx] = snd_hda_get_path_idx(codec, path); idx = path->idx[path->depth - 1]; - if (nid_has_volume(codec, mix_nid, HDA_INPUT)) { - val = HDA_COMPOSE_AMP_VAL(mix_nid, 3, idx, HDA_INPUT); - err = __add_pb_vol_ctrl(spec, HDA_CTL_WIDGET_VOL, ctlname, ctlidx, val); + if (mix_val) { + err = __add_pb_vol_ctrl(spec, HDA_CTL_WIDGET_VOL, ctlname, ctlidx, mix_val); if (err < 0) return err; - path->ctls[NID_PATH_VOL_CTL] = val; + path->ctls[NID_PATH_VOL_CTL] = mix_val; } - if (nid_has_mute(codec, mix_nid, HDA_INPUT)) { - val = HDA_COMPOSE_AMP_VAL(mix_nid, 3, idx, HDA_INPUT); - err = __add_pb_sw_ctrl(spec, HDA_CTL_WIDGET_MUTE, ctlname, ctlidx, val); + if (mute_val) { + err = __add_pb_sw_ctrl(spec, HDA_CTL_WIDGET_MUTE, ctlname, ctlidx, mute_val); if (err < 0) return err; - path->ctls[NID_PATH_MUTE_CTL] = val; + path->ctls[NID_PATH_MUTE_CTL] = mute_val; } path->active = true; -- 1.8.4.4

1 0

[alsa-devel] [PATCH v7 0/4] Add dual-fifo mode support of i.MX ssi
by Nicolin Chen 28 Nov '13

28 Nov '13

* ! This series of patches has a direct dependency between them. When * ! applying them, we need to apply to one single branch. Otherwise, * ! it would break currect branches. Changelog v7: * Appended missing Acked-by to all four patches. * Sorry that I didn't add them at the first place. v6: * PATCH-1: Use goto err_firmware instead of return directly. * * Nothing changes for the other three ack-ed patches v5: * PATCH-3: Add period size constraint when using dual fifo mode * * Nothing changes for the other three patches v4: * PATCH-3: Drop useless register configuration. * * Nothing changes for the other three patches v3: * PATCH-1: Add comments to indicate the end of v1 and v2 array. * PATCH-3: Use better way to keep watermark as even number. * * Nothing changes for PATCH-2 and PATCH-4 v2: * Instead of adding rogue scripts to current SDMA driver based on firmware * V1, we define the new SDMA firmware as version 2 and bisect the PATCH-1 * to two patches: The first is to add version check code to the SDMA driver; * And the second is to add SSI dual FIFO DMATYPE. * * Nothing changes for the last two patches. v1: * SSI can reduce hardware overrun/underrun possibility when using dual * fifo mode. To support this mode, we need to first update sdma sciprt * list, and then enable dual fifo BIT in SSI driver, and last update DT * bindings of i.MX series. Nicolin Chen (4): dma: imx-sdma: Add sdma firmware version 2 support dma: imx-sdma: Add new dma type for ssi dual fifo script ASoC: fsl_ssi: Add dual fifo mode support ARM: dts: imx: use dual-fifo sdma script for ssi .../devicetree/bindings/dma/fsl-imx-sdma.txt | 1 + arch/arm/boot/dts/imx51.dtsi | 4 ++-- arch/arm/boot/dts/imx53.dtsi | 4 ++-- arch/arm/boot/dts/imx6qdl.dtsi | 12 +++++----- arch/arm/boot/dts/imx6sl.dtsi | 12 +++++----- drivers/dma/imx-sdma.c | 19 ++++++++++++++- include/linux/platform_data/dma-imx-sdma.h | 5 ++++ include/linux/platform_data/dma-imx.h | 1 + sound/soc/fsl/fsl_ssi.c | 27 +++++++++++++++++++++- 9 files changed, 67 insertions(+), 18 deletions(-) -- 1.8.4

3 7

[alsa-devel] Intermittent cut out on the video
by Dolevo Jay 28 Nov '13

28 Nov '13

Hi experts, In my system, I use two headphone jacks to connect my speakers, one is to the jack on the pc itself and the other one is to the jack located on the monitor which I connect to the same pc with hdmi cable. I have two sound cards on my system and I use the following asound.conf to have audio from two jacks simultaneously. http://pastebin.com/2yd6EW8C As you see, I also use dmix because I have multiple of audio sources coming and I mix them. However, I now have the following problem. I connect two speakers to the each jack and start hearing an audio stream. The audio coming from the jack on the pc is cutting out intermittently. It just cuts out for a fraction of a second and continues as normal and after some time it happens again. The frequency of the occurrence increases over time. I have absolutely no problem with the audio from the jack on the display. Could anyone shed some light on this issue? In my opinion, this is a sort of configuration issue since I have no problem at one source while having at the other source. Thanks in advance, Regards, Dolevo

2 2

Re: [alsa-devel] [PATCHv2 3/8] ARM: dts: Enables SAI ALSA SoC DAI device for Vybrid VF610 TOWER board.
by Bill Pringlemeir 28 Nov '13

28 Nov '13

[sorry, I should have copied alsa-devel(a)alsa-project.org previously]. On 19 Nov 2013, Li.Xiubo(a)freescale.com wrote: >>> This patch add and enable SAI device. >>> >>> arch/arm/boot/dts/vf610-twr.dts | 6 ++++++ >>> 1 file changed, 6 insertions(+) >>> >>> diff --git a/arch/arm/boot/dts/vf610-twr.dts >>> b/arch/arm/boot/dts/vf610-twr.dts index 1a58678..e4106dd 100644 >>> --- a/arch/arm/boot/dts/vf610-twr.dts >>> +++ b/arch/arm/boot/dts/vf610-twr.dts >>>>> -57,6 +57,12 @@ >>> status = "okay"; >>> }; >> >> Should we put a comment here that a TWR-AUDIO-SGTL board is needed? Or >> is this better in a menuconfig? I guess TWR-AUDIO-SGTL is needed as this >> codec is not on the VF610-TWR main board? >> > > Yes, the SGTL5000 codec is not on the VF610-TWR main board, and needs an extra > TWR-AUDIO-SGTL board. > > IMO, puting this comment in the menuconfig is much better. I agree. I guess the patch set 6 makes more sense. Also, you might consider adding a printk in the 'fsl_sgtl5000_probe()'. I guess that devm_snd_soc_register_card() will fail if the board is not present? As the board is not 'standard' people may come asking why the audio fails on the 'VF610-TWR'. + ret = devm_snd_soc_register_card(&pdev->dev, &fsl_sgt1500_card); + if (ret) { + dev_err(&pdev->dev, "register soc sound card failed :%d\n" + "TWR-AUDIO-SGTL board required.\n", + ret); + return ret; + } Especially, you can make one kernel that handles both cases w/wo TWR-AUDIO-SGTL board attached. Thanks for your work. Bill Pringlemeir.

2 5

[alsa-devel] alsa-lib-1.0.27.2 not compatible with ppc64le architecture
by Madhu Pavan 28 Nov '13

28 Nov '13

Hi, We are in the process of adding support for new arch (ppc64le) and as part of that we wanted to send patches for config.guess and configure as appropriate. alsa-lib-1.0.27.2 could not be built on ppc64le because it had an outdated configure/config.guess/libtool.m4. Since your pkg uses libtool and the latest tarball of your pkg didn't build on ppc64le due to outdated libtool present on your system. We wanted to request you to upgrade your libtool to the alpha release of libtool which has all the bits and pieces needed for ppc64le support. In that context, I wanted to confirm the below 1) Should we send patches to this mailing list or there is some other mailing list ? 2) New libtool alpha release which supports ppc64le arch is available, you may pick up the alpha release from either of the below : ftp://alpha.gnu.org/gnu/libtool/libtool-2.4.2.418.tar.gz (1.6MB) ftp://alpha.gnu.org/gnu/libtool/libtool-2.4.2.418.tar.xz (920KB) It would be great if you can install this new libtool which supports ppc64le, and spin the pkg and let us know the new tar availability. We can test it on ppc64le architecture for you. Please let me know if you are planning to release or spin newer version. Currently I used http://www.alsa-project.org/main/index.php/Main_Page Which does not have ppc64le support. Your response is highly appreciated. Thanks in advance, Madhu Pavan Kothapally

1 0

[alsa-devel] [PATCHv1] ASoC: SGTL5000: Fix kernel failed while getting regulator consumers
by Xiubo Li 28 Nov '13

28 Nov '13

SGTL5000 codec allows to use the internal LDO instead of VDDD, if the internal LDO is used, this caused the following kernel failed while trying to get the external VDDD regulator consumer. Adding sgtl5000_external_vddd_used() to fix it. And this has been tested on VF610-TWR board. sgtl5000 0-000a: Failed to get supply 'VDDD': -19 Signed-off-by: Xiubo Li <Li.Xiubo(a)freescale.com> --- sound/soc/codecs/sgtl5000.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/sgtl5000.c b/sound/soc/codecs/sgtl5000.c index 1f4093f..1a2d35a 100644 --- a/sound/soc/codecs/sgtl5000.c +++ b/sound/soc/codecs/sgtl5000.c @@ -1298,6 +1298,20 @@ static int sgtl5000_replace_vddd_with_ldo(struct snd_soc_codec *codec) return 0; } +static int sgtl5000_external_vddd_used(struct snd_soc_codec *codec) +{ + struct regulator *consumer; + struct sgtl5000_priv *sgtl5000 = snd_soc_codec_get_drvdata(codec); + + consumer = regulator_get(codec->dev, sgtl5000->supplies[VDDD].supply); + if (IS_ERR(consumer)) { + return 0; + } + regulator_put(consumer); + + return 1; +} + static int sgtl5000_enable_regulators(struct snd_soc_codec *codec) { int reg; @@ -1310,9 +1324,7 @@ static int sgtl5000_enable_regulators(struct snd_soc_codec *codec) for (i = 0; i < ARRAY_SIZE(sgtl5000->supplies); i++) sgtl5000->supplies[i].supply = supply_names[i]; - ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(sgtl5000->supplies), - sgtl5000->supplies); - if (!ret) + if (sgtl5000_external_vddd_used(codec)) external_vddd = 1; else { ret = sgtl5000_replace_vddd_with_ldo(codec); -- 1.8.4

4 6

[alsa-devel] [PATCH v2 16/18] ASoC: wm8990: Use IS_ENABLED() macro
by Fabio Estevam 27 Nov '13

27 Nov '13

Using the IS_ENABLED() macro can make the code shorter and simpler. Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> --- Changes since v1: - Fix Subject and commit log sound/soc/codecs/wm8990.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/wm8990.c b/sound/soc/codecs/wm8990.c index 253c88b..34f0020 100644 --- a/sound/soc/codecs/wm8990.c +++ b/sound/soc/codecs/wm8990.c @@ -1376,7 +1376,7 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8990 = { .volatile_register = wm8990_volatile_register, }; -#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) +#if IS_ENABLED(CONFIG_I2C) static int wm8990_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *id) { @@ -1423,7 +1423,7 @@ static struct i2c_driver wm8990_i2c_driver = { static int __init wm8990_modinit(void) { int ret = 0; -#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) +#if IS_ENABLED(CONFIG_I2C) ret = i2c_add_driver(&wm8990_i2c_driver); if (ret != 0) { printk(KERN_ERR "Failed to register wm8990 I2C driver: %d\n", @@ -1436,7 +1436,7 @@ module_init(wm8990_modinit); static void __exit wm8990_exit(void) { -#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) +#if IS_ENABLED(CONFIG_I2C) i2c_del_driver(&wm8990_i2c_driver); #endif } -- 1.8.1.2

2 5

[alsa-devel] [PATCH 00/18] ASoC: codecs: Use IS_ENABLED() macro
by Fabio Estevam 27 Nov '13

27 Nov '13

Using the IS_ENABLED() macro can make the code shorter and simpler.

2 34

[alsa-devel] [PATCH v3 1/2] ASoC: Add devicetree support for CS42L52
by Brian Austin 27 Nov '13

27 Nov '13

This patch adds device tree support for the CS42L52 Codec v3 Adds better descriptors for platform data. Change mic differential setting to boolean Change chgfreq to chgfreq-divisor Add vendor cirrus to of properties Signed-off-by: Brian Austin <brian.austin(a)cirrus.com> --- sound/soc/codecs/cs42l52.c | 45 ++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 42 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/cs42l52.c b/sound/soc/codecs/cs42l52.c index e68450e..ed3c20f 100644 --- a/sound/soc/codecs/cs42l52.c +++ b/sound/soc/codecs/cs42l52.c @@ -17,7 +17,7 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/delay.h> -#include <linux/gpio.h> +#include <linux/of_gpio.h> #include <linux/pm.h> #include <linux/i2c.h> #include <linux/input.h> @@ -1193,6 +1193,7 @@ static int cs42l52_i2c_probe(struct i2c_client *i2c_client, int ret; unsigned int devid = 0; unsigned int reg; + u32 val32; cs42l52 = devm_kzalloc(&i2c_client->dev, sizeof(struct cs42l52_private), GFP_KERNEL); @@ -1206,9 +1207,39 @@ static int cs42l52_i2c_probe(struct i2c_client *i2c_client, dev_err(&i2c_client->dev, "regmap_init() failed: %d\n", ret); return ret; } - - if (pdata) + if (pdata) { + cs42l52->pdata = *pdata; + } else { + pdata = devm_kzalloc(&i2c_client->dev, + sizeof(struct cs42l52_platform_data), + GFP_KERNEL); + if (!pdata) { + dev_err(&i2c_client->dev, "could not allocate pdata\n"); + return -ENOMEM; + } + if (i2c_client->dev.of_node) { + if (of_property_read_bool(i2c_client->dev.of_node, + "cirrus,mica-differential-cfg")) + pdata->mica_diff_cfg = true; + + if (of_property_read_bool(i2c_client->dev.of_node, + "cirrus,micb-differential-cfg")) + pdata->micb_diff_cfg = true; + + if (of_property_read_u32(i2c_client->dev.of_node, + "cirrus,micbias-lvl", &val32) >= 0) + pdata->micbias_lvl = val32; + + if (of_property_read_u32(i2c_client->dev.of_node, + "cirrus,chgfreq-divisor", &val32) >= 0) + pdata->chgfreq_divisor = val32; + + pdata->reset_gpio = + of_get_named_gpio(i2c_client->dev.of_node, + "cirrus,reset-gpio", 0); + } cs42l52->pdata = *pdata; + } if (cs42l52->pdata.reset_gpio) { ret = gpio_request_one(cs42l52->pdata.reset_gpio, @@ -1280,6 +1311,13 @@ static int cs42l52_i2c_remove(struct i2c_client *client) return 0; } +static const struct of_device_id cs42l52_of_match[] = { + { .compatible = "cirrus,cs42l52", }, + {}, +}; +MODULE_DEVICE_TABLE(of, cs42l52_of_match); + + static const struct i2c_device_id cs42l52_id[] = { { "cs42l52", 0 }, { } @@ -1290,6 +1328,7 @@ static struct i2c_driver cs42l52_i2c_driver = { .driver = { .name = "cs42l52", .owner = THIS_MODULE, + .of_match_table = cs42l52_of_match, }, .id_table = cs42l52_id, .probe = cs42l52_i2c_probe, -- 1.8.4.3

2 2

[alsa-devel] [PATCH] ASoC: add RT286 CODEC driver
by bardliao＠realtek.com 27 Nov '13

27 Nov '13

From: Bard Liao <bardliao(a)realtek.com> This patch adds the ALC286 codec driver. Signed-off-by: Bard Liao <bardliao(a)realtek.com> --- This is the initial codec driver of ALC586. I tested DMCI/Headset recording and Speaker/Headphone playback. --- sound/soc/codecs/Kconfig | 3 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/rt286.c | 1609 +++++++++++++++++++++++++++++++++++++++++++++ sound/soc/codecs/rt286.h | 113 ++++ 4 files changed, 1727 insertions(+) create mode 100644 sound/soc/codecs/rt286.c create mode 100644 sound/soc/codecs/rt286.h diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index 983d087a..56748d4 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -313,6 +313,9 @@ config SND_SOC_PCM1792A config SND_SOC_PCM3008 tristate +config SND_SOC_RT286 + tristate + config SND_SOC_RT5631 tristate diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index bc12676..b31615c 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -48,6 +48,7 @@ snd-soc-pcm1792a-codec-objs := pcm1792a.o snd-soc-pcm3008-objs := pcm3008.o snd-soc-rt5631-objs := rt5631.o snd-soc-rt5640-objs := rt5640.o +snd-soc-rt286-objs := rt286.o snd-soc-sgtl5000-objs := sgtl5000.o snd-soc-alc5623-objs := alc5623.o snd-soc-alc5632-objs := alc5632.o @@ -181,6 +182,7 @@ obj-$(CONFIG_SND_SOC_PCM1792A) += snd-soc-pcm1792a-codec.o obj-$(CONFIG_SND_SOC_PCM3008) += snd-soc-pcm3008.o obj-$(CONFIG_SND_SOC_RT5631) += snd-soc-rt5631.o obj-$(CONFIG_SND_SOC_RT5640) += snd-soc-rt5640.o +obj-$(CONFIG_SND_SOC_RT286) += snd-soc-rt286.o obj-$(CONFIG_SND_SOC_SGTL5000) += snd-soc-sgtl5000.o obj-$(CONFIG_SND_SOC_SIGMADSP) += snd-soc-sigmadsp.o obj-$(CONFIG_SND_SOC_SI476X) += snd-soc-si476x.o diff --git a/sound/soc/codecs/rt286.c b/sound/soc/codecs/rt286.c new file mode 100644 index 0000000..e95f76c --- /dev/null +++ b/sound/soc/codecs/rt286.c @@ -0,0 +1,1609 @@ +/* + * rt286.c -- RT286 ALSA SoC audio codec driver + * + * Copyright 2013 Realtek Semiconductor Corp. + * Author: Bard Liao <bardliao(a)realtek.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#define DEBUG +#include <linux/module.h> +#include <linux/moduleparam.h> +#include <linux/init.h> +#include <linux/delay.h> +#include <linux/pm.h> +#include <linux/i2c.h> +#include <linux/platform_device.h> +#include <linux/spi/spi.h> +#include <linux/acpi.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/soc.h> +#include <sound/soc-dapm.h> +#include <sound/initval.h> +#include <sound/tlv.h> + +#include "../../pci/hda/hda_codec.h" +#include "rt286.h" + +static int hp_amp_time = 100; +module_param(hp_amp_time, int, 0644); + +#define RT_SUPPORT_COMBO_JACK 1 +#define VERSION "0.0.1-beta3 alsa 1.0.25" + +struct rt286_priv { + struct snd_soc_codec *codec; + struct regmap *regmap; + struct i2c_client *i2c; +}; + +static unsigned long rt286_read(struct snd_soc_codec *codec, + unsigned int vid, + unsigned int nid, + unsigned int data) +{ + struct i2c_msg xfer[2]; + int ret; + unsigned long verb; + unsigned long buf = 0x0; + struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec); + + verb = nid << 20 | vid << 8 | data; + verb = cpu_to_be32(verb); + /* Write register */ + xfer[0].addr = rt286->i2c->addr; + xfer[0].flags = 0; + xfer[0].len = 4; + xfer[0].buf = (u8 *)&verb; + + /* Read data */ + xfer[1].addr = rt286->i2c->addr; + xfer[1].flags = I2C_M_RD; + xfer[1].len = 4; + xfer[1].buf = (u8 *)&buf; + + ret = i2c_transfer(rt286->i2c->adapter, xfer, 2); + if (ret != 2) { + dev_err(&rt286->i2c->dev, "i2c_transfer() returned %d\n", ret); + return 0; + } + + return be32_to_cpu(buf); +} + +static int rt286_write(struct snd_soc_codec *codec, + unsigned int vid, + unsigned int nid, + unsigned long value) +{ + u8 data[4]; + int ret; + struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec); + + if ((vid & 0xff) == 0) { /* 4bit VID */ + vid = vid >> 8; + data[0] = (nid >> 4) & 0xf; + data[1] = ((nid & 0xf) << 4) | vid; + data[2] = (value >> 8) & 0xff; + data[3] = value & 0xff; + } else { /* 12bit VID */ + data[0] = (nid >> 4) & 0xf; + data[1] = ((nid & 0xf) << 4) | ((vid >> 8) & 0xf); + data[2] = vid & 0xff; + data[3] = value & 0xff; + } + + ret = i2c_master_send(rt286->i2c, data, 4); + pr_debug("write 0x%x 0x%x 0x%lx\n", vid, nid, value); + if (ret == 4) + return 0; + if (ret < 0) + return ret; + else + return -EIO; +} + +static int rt286_index_write(struct snd_soc_codec *codec, + unsigned int WidgetID, unsigned int index, unsigned int data) +{ + int ret; + + ret = rt286_write(codec, AC_VERB_SET_COEF_INDEX, + WidgetID, index); + if (ret < 0) { + dev_err(codec->dev, "Failed to set private addr: %d\n", ret); + goto err; + } + ret = rt286_write(codec, AC_VERB_SET_PROC_COEF, + WidgetID, data); + if (ret < 0) { + dev_err(codec->dev, "Failed to set private value: %d\n", ret); + goto err; + } + + return 0; +err: + return ret; +} + +static unsigned long rt286_index_read(struct snd_soc_codec *codec, + unsigned int WidgetID, unsigned int index) +{ + int ret; + + ret = rt286_write(codec, AC_VERB_SET_COEF_INDEX, + WidgetID, index); + if (ret < 0) { + dev_err(codec->dev, "Failed to set private addr: %d\n", ret); + return ret; + } + return rt286_read(codec, AC_VERB_GET_PROC_COEF, + WidgetID, index); +} + +static int rt286_index_update_bits(struct snd_soc_codec *codec, + unsigned int WidgetID, unsigned int index, + unsigned int mask, unsigned int data) +{ + unsigned long old, new; + int change, ret; + + ret = rt286_index_read(codec, WidgetID, index); + if (ret < 0) { + dev_err(codec->dev, "Failed to read private reg: %d\n", ret); + goto err; + } + + old = ret; + new = (old & ~mask) | (data & mask); + change = old != new; + + if (change) { + ret = rt286_index_write(codec, WidgetID, index, new); + if (ret < 0) { + dev_err(codec->dev, + "Failed to write private reg: %d\n", ret); + goto err; + } + } + return change; + +err: + return ret; +} + +static int rt286_support_power_controls[] = { + NODE_ID_DAC_OUT1, + NODE_ID_DAC_OUT2, + NODE_ID_ADC_IN1, + NODE_ID_ADC_IN2, + NODE_ID_MIC1, + NODE_ID_DMIC1, + NODE_ID_DMIC2, + NODE_ID_SPK_OUT, + NODE_ID_HP_OUT, +}; +#define RT286_POWER_REG_LEN ARRAY_SIZE(rt286_support_power_controls) + +static const struct reg_default rt286_reg[TOTAL_NODE_ID + 1] = { + { NODE_ID_DAC_OUT1, 0x7f7f }, + { NODE_ID_DAC_OUT2, 0x7f7f }, + { NODE_ID_SPDIF, 0x0000 }, + { NODE_ID_ADC_IN1, 0x4343 }, + { NODE_ID_ADC_IN2, 0x4343 }, + { NODE_ID_MIC1, 0x0002 }, + { NODE_ID_MIXER_IN, 0x000b }, + { NODE_ID_MIXER_OUT1, 0x0002 }, + { NODE_ID_MIXER_OUT2, 0x0000 }, + { NODE_ID_SPK_OUT, 0x0000 }, + { NODE_ID_HP_OUT, 0x0000 }, + { NODE_ID_MIXER_IN1, 0x0005 }, + { NODE_ID_MIXER_IN2, 0x0005 }, +}; + +static bool rt286_volatile_register(struct device *dev, unsigned int reg) +{ + return 0; +} + +static bool rt286_readable_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case NODE_ID_DAC_OUT1: + case NODE_ID_DAC_OUT2: + case NODE_ID_ADC_IN1: + case NODE_ID_ADC_IN2: + case NODE_ID_MIC1: + case NODE_ID_SPDIF: + case NODE_ID_MIXER_IN: + case NODE_ID_MIXER_OUT1: + case NODE_ID_MIXER_OUT2: + case NODE_ID_DMIC1: + case NODE_ID_DMIC2: + case NODE_ID_SPK_OUT: + case NODE_ID_HP_OUT: + case NODE_ID_MIXER_IN1: + case NODE_ID_MIXER_IN2: + return 1; + default: + return 0; + } +} + +int rt286_jack_detect(struct snd_soc_codec *codec, bool *bHP, bool *bMIC) +{ + unsigned int val; + int i; + + *bHP = false; + *bMIC = false; + +#if RT_SUPPORT_COMBO_JACK + *bHP = rt286_read(codec, AC_VERB_GET_PIN_SENSE, NODE_ID_HP_OUT, 0); + if (*bHP) { + /* power on HV,VERF */ + rt286_index_update_bits(codec, NODE_ID_VENDOR_REGISTERS, + 0x03, 0x1001, 0x0000); + /* power LDO1 */ + rt286_index_update_bits(codec, NODE_ID_VENDOR_REGISTERS, + 0x08, 0x0004, 0x0004); + rt286_write(codec, AC_VERB_SET_PIN_WIDGET_CONTROL, + NODE_ID_MIC1, 0x24); + rt286_write(codec, AC_VERB_SET_COEF_INDEX, + 0x20, 0x50); + val = rt286_read(codec, AC_VERB_GET_PROC_COEF, + 0x20, 0x50); + + msleep(200); + i = 40; + while (((val & 0x0800) == 0) && (i > 0)) { + rt286_write(codec, AC_VERB_SET_COEF_INDEX, + 0x20, 0x50); + val = rt286_read(codec, + AC_VERB_GET_PROC_COEF, 0x20, 0x50); + i--; + msleep(20); + } + + if (0x0400 == (val & 0x0700)) { + *bMIC = false; + + rt286_write(codec, AC_VERB_SET_PIN_WIDGET_CONTROL, + NODE_ID_MIC1, 0x20); + /* power off HV,VERF */ + rt286_index_update_bits(codec, + NODE_ID_VENDOR_REGISTERS, + 0x03, 0x1001, 0x1001); + rt286_index_update_bits(codec, + NODE_ID_VENDOR_REGISTERS, + 0x04, 0xC000, 0x0000); + rt286_index_update_bits(codec, + NODE_ID_VENDOR_REGISTERS, + 0x4f, 0x0030, 0x0000); + rt286_index_update_bits(codec, + NODE_ID_VENDOR_REGISTERS, + 0x02, 0xc000, 0x0000); + } else if ((0x0200 == (val & 0x0700)) || + (0x0100 == (val & 0x0700))) { + *bMIC = true; + } else { + *bMIC = false; + } + + rt286_index_update_bits(codec, NODE_ID_VENDOR_REGISTERS, + 0x20, 0x0060, 0x0000); + } else { + rt286_index_update_bits(codec, NODE_ID_VENDOR_REGISTERS, + 0x20, 0x0060, 0x0020); + rt286_index_update_bits(codec, NODE_ID_VENDOR_REGISTERS, + 0x04, 0xC000, 0x8000); + rt286_index_update_bits(codec, NODE_ID_VENDOR_REGISTERS, + 0x4f, 0x0030, 0x0020); + rt286_index_update_bits(codec, NODE_ID_VENDOR_REGISTERS, + 0x02, 0xc000, 0x8000); + + *bMIC = false; + } + +#else + *bHP = rt286_read(codec, AC_VERB_GET_PIN_SENSE, NODE_ID_HP_OUT, 0); + *bMIC = rt286_read(codec, AC_VERB_GET_PIN_SENSE, NODE_ID_MIC1, 0); +#endif + + + /* Clear IRQ */ + rt286_index_update_bits(codec, NODE_ID_VENDOR_REGISTERS, + 0x33, 0x1, 0x1); + return 0; +} + + +static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -6350, 50, 0); +static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, 0, 1000, 0); + +static int rt286_playback_vol_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct soc_mixer_control *mc = + (struct soc_mixer_control *)kcontrol->private_value; + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + + + ucontrol->value.integer.value[0] = + rt286_read(codec, AC_VERB_GET_AMP_GAIN_MUTE, + mc->reg, 0xa000) & 0x7f; + ucontrol->value.integer.value[1] = + rt286_read(codec, AC_VERB_GET_AMP_GAIN_MUTE, + mc->reg, 0x8000) & 0x7f; + + return 0; +} + +static int rt286_playback_vol_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct soc_mixer_control *mc = + (struct soc_mixer_control *)kcontrol->private_value; + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + unsigned int vall, valr; + + vall = ucontrol->value.integer.value[0]; + valr = ucontrol->value.integer.value[1]; + if (vall == valr) { + vall = vall | 0xb000; + rt286_write(codec, AC_VERB_SET_AMP_GAIN_MUTE, mc->reg, vall); + } else { + vall = vall | 0xa000; + rt286_write(codec, AC_VERB_SET_AMP_GAIN_MUTE, mc->reg, vall); + valr = valr | 0x9000; + rt286_write(codec, AC_VERB_SET_AMP_GAIN_MUTE, mc->reg, valr); + } + + return 0; +} + +static int rt286_capture_vol_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct soc_mixer_control *mc = + (struct soc_mixer_control *)kcontrol->private_value; + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + + + ucontrol->value.integer.value[0] = + rt286_read(codec, AC_VERB_GET_AMP_GAIN_MUTE, + mc->reg, 0x0) & 0x7f; + ucontrol->value.integer.value[1] = + rt286_read(codec, AC_VERB_GET_AMP_GAIN_MUTE, + mc->reg, 0x2000) & 0x7f; + + return 0; +} + +static int rt286_capture_vol_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct soc_mixer_control *mc = + (struct soc_mixer_control *)kcontrol->private_value; + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + unsigned int vall, valr; + + vall = ucontrol->value.integer.value[0]; + valr = ucontrol->value.integer.value[1]; + if (vall == valr) { + vall = vall | 0x7000; + rt286_write(codec, AC_VERB_SET_AMP_GAIN_MUTE, mc->reg, vall); + } else { + vall = vall | 0x6000; + rt286_write(codec, AC_VERB_SET_AMP_GAIN_MUTE, mc->reg, vall); + valr = valr | 0x5000; + rt286_write(codec, AC_VERB_SET_AMP_GAIN_MUTE, mc->reg, valr); + } + + return 0; +} + +static int rt286_mic_gain_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct soc_mixer_control *mc = + (struct soc_mixer_control *)kcontrol->private_value; + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + + ucontrol->value.integer.value[0] = + rt286_read(codec, AC_VERB_GET_AMP_GAIN_MUTE, + mc->reg, 0x0) & 0x3; + + return 0; +} + +static int rt286_mic_gain_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct soc_mixer_control *mc = + (struct soc_mixer_control *)kcontrol->private_value; + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + unsigned int val; + + val = ucontrol->value.integer.value[0]; + val = val | 0x7000; + rt286_write(codec, AC_VERB_SET_AMP_GAIN_MUTE, mc->reg, val); + + return 0; +} + +static int rt286_playback_switch_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct soc_mixer_control *mc = + (struct soc_mixer_control *)kcontrol->private_value; + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + + + ucontrol->value.integer.value[0] = + !(rt286_read(codec, AC_VERB_GET_AMP_GAIN_MUTE, + mc->reg, 0xa000) & 0x80); + ucontrol->value.integer.value[1] = + !(rt286_read(codec, AC_VERB_GET_AMP_GAIN_MUTE, + mc->reg, 0x8000) & 0x80); + + return 0; +} + +static int rt286_playback_switch_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct soc_mixer_control *mc = + (struct soc_mixer_control *)kcontrol->private_value; + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + unsigned int vall, valr; + + vall = (!ucontrol->value.integer.value[0] << 7); + valr = (!ucontrol->value.integer.value[1] << 7); + + if (vall == valr) { + vall = vall | 0xb000; + rt286_write(codec, AC_VERB_SET_AMP_GAIN_MUTE, mc->reg, vall); + } else { + vall = vall | 0xa000; + rt286_write(codec, AC_VERB_SET_AMP_GAIN_MUTE, mc->reg, vall); + valr = valr | 0x9000; + rt286_write(codec, AC_VERB_SET_AMP_GAIN_MUTE, mc->reg, valr); + } + + return 0; +} + +static const struct snd_kcontrol_new rt286_snd_controls[] = { + SOC_DOUBLE_EXT_TLV("DAC0 Playback Volume", NODE_ID_DAC_OUT1, + 8, 0, 0x7f, 0, + rt286_playback_vol_get, rt286_playback_vol_put, + out_vol_tlv), + SOC_DOUBLE_EXT_TLV("ADC0 Capture Volume", NODE_ID_ADC_IN1, + 8, 0, 0x7f, 0, + rt286_capture_vol_get, rt286_capture_vol_put, + out_vol_tlv), + SOC_SINGLE_EXT_TLV("AMIC Gain", NODE_ID_MIC1, 0, 0x3, 0, + rt286_mic_gain_get, rt286_mic_gain_put, + mic_vol_tlv), + SOC_DOUBLE_EXT("Headphone Playback Switch", NODE_ID_HP_OUT, + 15, 8, 1, 1, rt286_playback_switch_get, + rt286_playback_switch_put), + SOC_DOUBLE_EXT("Speaker Playback Switch", NODE_ID_SPK_OUT, + 15, 8, 1, 1, rt286_playback_switch_get, + rt286_playback_switch_put), +}; + +static void hwCodecConfigure(struct snd_soc_codec *codec) +{ + struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec); + unsigned int val; + int i; + + rt286_write(codec, AC_VERB_SET_POWER_STATE, + NODE_ID_AUDIO_FUNCTION_GROUP, AC_PWRST_D3); + for (i = 0; i < RT286_POWER_REG_LEN; i++) { + rt286_write(codec, AC_VERB_SET_POWER_STATE, + rt286_support_power_controls[i], AC_PWRST_D3); + } + + rt286_index_write(codec, NODE_ID_VENDOR_REGISTERS, 0x4F, 0xb029); + rt286_index_write(codec, NODE_ID_VENDOR_REGISTERS, 0x09, 0xc400); + rt286_index_write(codec, NODE_ID_VENDOR_REGISTERS, 0x0A, 0x0120); + rt286_index_write(codec, NODE_ID_VENDOR_REGISTERS, 0x33, 0x020A); + +#if !RT_SUPPORT_COMBO_JACK + rt286_index_write(codec, NODE_ID_VENDOR_REGISTERS, 0x50, 0x0000); + rt286_index_write(codec, NODE_ID_VENDOR_REGISTERS, 0x19, 0x0816); + rt286_index_write(codec, NODE_ID_VENDOR_REGISTERS, 0x20, 0x0000); +#endif + + mdelay(10); + + /* Set configuration default */ + /* MIC1 node 0x18 */ + rt286_write(codec, AC_VERB_SET_CONFIG_DEFAULT_BYTES_3, + NODE_ID_MIC1, 0x00); + + /* DMIC1/2 */ + rt286_write(codec, AC_VERB_SET_CONFIG_DEFAULT_BYTES_3, + NODE_ID_DMIC1, 0x00); + /* DMIC3/4 */ + rt286_write(codec, AC_VERB_SET_CONFIG_DEFAULT_BYTES_3, + NODE_ID_DMIC2, 0x00); + + mdelay(10); + +#if RT_SUPPORT_COMBO_JACK + rt286_index_write(codec, NODE_ID_VENDOR_REGISTERS, 0x4f, 0x5029); +#endif + + rt286_index_update_bits(codec, + NODE_ID_VENDOR_REGISTERS, 0x08, 0x0008, 0x0000); + rt286_index_update_bits(codec, + NODE_ID_VENDOR_REGISTERS, 0x62, 0x0007, 0x0007); + rt286_index_update_bits(codec, + NODE_ID_VENDOR_REGISTERS, 0x0e, 0x00c0, 0x0040); + /* Sync volume */ + regmap_read(rt286->regmap, NODE_ID_ADC_IN1, &val); + val = (val >> 8) & 0x7f; + rt286_write(codec, AC_VERB_SET_AMP_GAIN_MUTE, + NODE_ID_ADC_IN1, 0x6000 | val); + regmap_read(rt286->regmap, NODE_ID_ADC_IN1, &val); + val = val & 0x7f; + rt286_write(codec, AC_VERB_SET_AMP_GAIN_MUTE, + NODE_ID_ADC_IN1, 0x5000 | val); + regmap_read(rt286->regmap, NODE_ID_ADC_IN2, &val); + val = (val >> 8) & 0x7f; + rt286_write(codec, AC_VERB_SET_AMP_GAIN_MUTE, + NODE_ID_ADC_IN2, 0x6000 | val); + regmap_read(rt286->regmap, NODE_ID_ADC_IN2, &val); + val = val & 0x7f; + rt286_write(codec, AC_VERB_SET_AMP_GAIN_MUTE, + NODE_ID_ADC_IN2, 0x5000 | val); + regmap_read(rt286->regmap, NODE_ID_DAC_OUT1, &val); + val = (val >> 8) & 0x7f; + rt286_write(codec, AC_VERB_SET_AMP_GAIN_MUTE, + NODE_ID_DAC_OUT1, 0xa000 | val); + regmap_read(rt286->regmap, NODE_ID_DAC_OUT1, &val); + val = val & 0x7f; + rt286_write(codec, AC_VERB_SET_AMP_GAIN_MUTE, + NODE_ID_DAC_OUT1, 0x9000 | val); + regmap_read(rt286->regmap, NODE_ID_DAC_OUT2, &val); + val = (val >> 8) & 0x7f; + rt286_write(codec, AC_VERB_SET_AMP_GAIN_MUTE, + NODE_ID_DAC_OUT2, 0xa000 | val); + regmap_read(rt286->regmap, NODE_ID_DAC_OUT2, &val); + val = val & 0x7f; + rt286_write(codec, AC_VERB_SET_AMP_GAIN_MUTE, + NODE_ID_DAC_OUT2, 0x9000 | val); + regmap_read(rt286->regmap, NODE_ID_MIC1, &val); + val = val & 0x3; + rt286_write(codec, AC_VERB_SET_AMP_GAIN_MUTE, + NODE_ID_MIC1, 0x7000 | val); + /* Sync the mux selection */ + regmap_read(rt286->regmap, NODE_ID_MIXER_IN1, &val); + rt286_write(codec, AC_VERB_SET_CONNECT_SEL, + NODE_ID_MIXER_IN1, val & RT286_ADC_SEL_MASK); + regmap_read(rt286->regmap, NODE_ID_MIXER_IN2, &val); + rt286_write(codec, AC_VERB_SET_CONNECT_SEL, + NODE_ID_MIXER_IN2, val & RT286_ADC_SEL_MASK); + +} + +/* Digital Mixer */ +static const struct snd_kcontrol_new rt286_front_mix[] = { + SOC_DAPM_SINGLE("DAC Switch", NODE_ID_MIXER_OUT1, + RT286_M_FRONT_DAC_SFT, 1, 1), + SOC_DAPM_SINGLE("RECMIX Switch", NODE_ID_MIXER_OUT1, + RT286_M_FRONT_REC_SFT, 1, 1), +}; + +/* Analog Input Mixer */ +static const struct snd_kcontrol_new rt286_rec_mix[] = { + SOC_DAPM_SINGLE("Beep Switch", NODE_ID_MIXER_IN, + RT286_M_REC_BEEP_SFT, 1, 1), + SOC_DAPM_SINGLE("Line1 Switch", NODE_ID_MIXER_IN, + RT286_M_REC_LINE1_SFT, 1, 1), + SOC_DAPM_SINGLE("Mic1 Switch", NODE_ID_MIXER_IN, + RT286_M_REC_MIC1_SFT, 1, 1), + SOC_DAPM_SINGLE("I2S Switch", NODE_ID_MIXER_IN, + RT286_M_REC_I2S_SFT, 1, 1), +}; + +/* ADC0 source */ +static const char * const rt286_adc_src[] = { + "Mic", "Dmic" +}; + +static int rt286_adc_values[] = { + 0, 5, +}; + +static const SOC_VALUE_ENUM_SINGLE_DECL( + rt286_adc0_enum, NODE_ID_MIXER_IN1, RT286_ADC_SEL_SFT, + RT286_ADC_SEL_MASK, rt286_adc_src, rt286_adc_values); + +static const struct snd_kcontrol_new rt286_adc0_mux = + SOC_DAPM_VALUE_ENUM("ADC 0 source", rt286_adc0_enum); + +static const SOC_VALUE_ENUM_SINGLE_DECL( + rt286_adc1_enum, NODE_ID_MIXER_IN2, RT286_ADC_SEL_SFT, + RT286_ADC_SEL_MASK, rt286_adc_src, rt286_adc_values); + +static const struct snd_kcontrol_new rt286_adc1_mux = + SOC_DAPM_VALUE_ENUM("ADC 1 source", rt286_adc1_enum); + +/* HP-OUT source */ +static const char * const rt286_hpo_src[] = { + "Front", "Surr" +}; + +static const SOC_ENUM_SINGLE_DECL(rt286_hpo_enum, NODE_ID_HP_OUT, + RT286_HP_SEL_SFT, rt286_hpo_src); + +static const struct snd_kcontrol_new rt286_hpo_mux = +SOC_DAPM_ENUM("HPO source", rt286_hpo_enum); + +/* SPK-OUT source */ +static const char * const rt286_spo_src[] = { + "Front", "Surr" +}; + +static const SOC_ENUM_SINGLE_DECL(rt286_spo_enum, NODE_ID_SPK_OUT, + RT286_SPK_SEL_SFT, rt286_spo_src); + +static const struct snd_kcontrol_new rt286_spo_mux = +SOC_DAPM_ENUM("SPO source", rt286_spo_enum); + +/* SPDIF source */ +static const char * const rt286_spdif_src[] = { + "PCM-IN 0", "PCM-IN 1", "SP-OUT", "PP" +}; + +static const SOC_ENUM_SINGLE_DECL(rt286_spdif_enum, NODE_ID_SPDIF, + RT286_SPDIF_SEL_SFT, rt286_spdif_src); + +static const struct snd_kcontrol_new rt286_spdif_mux = +SOC_DAPM_ENUM("SPDIF source", rt286_spdif_enum); + + +static int rt286_spk_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = w->codec; + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + rt286_write(codec, AC_VERB_SET_POWER_STATE, + NODE_ID_SPK_OUT, AC_PWRST_D0); + rt286_write(codec, AC_VERB_SET_PIN_WIDGET_CONTROL, + NODE_ID_SPK_OUT, 0x40); + rt286_write(codec, AC_VERB_SET_EAPD_BTLENABLE, + NODE_ID_SPK_OUT, 0x0002); + rt286_write(codec, AC_VERB_SET_AMP_GAIN_MUTE, + NODE_ID_SPK_OUT, 0xb000); + break; + case SND_SOC_DAPM_PRE_PMD: + rt286_write(codec, AC_VERB_SET_AMP_GAIN_MUTE, + NODE_ID_SPK_OUT, 0xb080); + rt286_write(codec, AC_VERB_SET_EAPD_BTLENABLE, + NODE_ID_SPK_OUT, 0x0000); + rt286_write(codec, AC_VERB_SET_PIN_WIDGET_CONTROL, + NODE_ID_SPK_OUT, 0x00); + rt286_write(codec, AC_VERB_SET_POWER_STATE, + NODE_ID_SPK_OUT, AC_PWRST_D3); + break; + + default: + return 0; + } + + return 0; +} + +static int rt286_set_dmic1_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = w->codec; + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + rt286_write(codec, AC_VERB_SET_PIN_WIDGET_CONTROL, + NODE_ID_DMIC1, 0x20); + rt286_write(codec, AC_VERB_SET_POWER_STATE, + NODE_ID_DMIC1, AC_PWRST_D0); + break; + case SND_SOC_DAPM_PRE_PMD: + rt286_write(codec, AC_VERB_SET_POWER_STATE, + NODE_ID_DMIC1, AC_PWRST_D3); + rt286_write(codec, AC_VERB_SET_PIN_WIDGET_CONTROL, + NODE_ID_DMIC1, 0x0); + break; + default: + return 0; + } + + return 0; +} + +static int rt286_set_dmic2_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = w->codec; + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + rt286_write(codec, AC_VERB_SET_POWER_STATE, + NODE_ID_DMIC2, AC_PWRST_D0); + break; + case SND_SOC_DAPM_PRE_PMD: + rt286_write(codec, AC_VERB_SET_POWER_STATE, + NODE_ID_DMIC2, AC_PWRST_D3); + break; + default: + return 0; + } + + return 0; +} + +static int rt286_hp_pow_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = w->codec; + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + rt286_write(codec, AC_VERB_SET_POWER_STATE, + NODE_ID_HP_OUT, AC_PWRST_D0); + rt286_write(codec, AC_VERB_SET_PIN_WIDGET_CONTROL, + NODE_ID_HP_OUT, 0x40); + break; + + case SND_SOC_DAPM_PRE_PMD: + rt286_write(codec, AC_VERB_SET_PIN_WIDGET_CONTROL, + NODE_ID_HP_OUT, 0x00); + rt286_write(codec, AC_VERB_SET_POWER_STATE, + NODE_ID_HP_OUT, AC_PWRST_D3); + break; + + default: + return 0; + } + + return 0; +} + +static int rt286_hp_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = w->codec; + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + rt286_write(codec, AC_VERB_SET_AMP_GAIN_MUTE, + NODE_ID_HP_OUT, 0xb000); + mdelay(hp_amp_time); + break; + + case SND_SOC_DAPM_PRE_PMD: + rt286_write(codec, AC_VERB_SET_AMP_GAIN_MUTE, + NODE_ID_HP_OUT, 0xb080); + break; + + default: + return 0; + } + + return 0; +} + +static int rt286_dac0_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = w->codec; + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + rt286_write(codec, AC_VERB_SET_POWER_STATE, + NODE_ID_DAC_OUT1, AC_PWRST_D0); + break; + case SND_SOC_DAPM_PRE_PMD: + rt286_write(codec, AC_VERB_SET_POWER_STATE, + NODE_ID_DAC_OUT1, AC_PWRST_D3); + break; + default: + return 0; + } + + return 0; +} + +static int rt286_dac1_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = w->codec; + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + rt286_write(codec, AC_VERB_SET_POWER_STATE, + NODE_ID_DAC_OUT2, AC_PWRST_D0); + break; + case SND_SOC_DAPM_PRE_PMD: + rt286_write(codec, AC_VERB_SET_POWER_STATE, + NODE_ID_DAC_OUT2, AC_PWRST_D3); + break; + default: + return 0; + } + + return 0; +} + +static int rt286_adc0_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = w->codec; + + switch (event) { + case SND_SOC_DAPM_POST_PMU: +#if (RT_SUPPORT_COMBO_JACK == 1) + rt286_index_update_bits(codec, NODE_ID_VENDOR_REGISTERS, + 0x04, 0xC000, 0x8000); + rt286_index_update_bits(codec, NODE_ID_VENDOR_REGISTERS, + 0x4f, 0x0030, 0x0020); + rt286_index_update_bits(codec, NODE_ID_VENDOR_REGISTERS, + 0x02, 0xc000, 0x8000); +#endif + rt286_index_update_bits(codec, NODE_ID_VENDOR_REGISTERS, + 0x0f, 0x0020, 0x0000); + rt286_write(codec, AC_VERB_SET_POWER_STATE, + NODE_ID_ADC_IN1, AC_PWRST_D0); + break; + case SND_SOC_DAPM_PRE_PMD: + rt286_write(codec, AC_VERB_SET_POWER_STATE, + NODE_ID_ADC_IN1, AC_PWRST_D3); + break; + case SND_SOC_DAPM_POST_REG: + rt286_write(codec, AC_VERB_SET_CONNECT_SEL, + NODE_ID_MIXER_IN1, snd_soc_read(codec, + NODE_ID_MIXER_IN1) & RT286_ADC_SEL_MASK); + break; + default: + return 0; + } + + return 0; +} + +static int rt286_adc1_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = w->codec; + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + +#if (RT_SUPPORT_COMBO_JACK == 1) + rt286_index_update_bits(codec, NODE_ID_VENDOR_REGISTERS, + 0x04, 0xC000, 0x8000); + rt286_index_update_bits(codec, NODE_ID_VENDOR_REGISTERS, + 0x4f, 0x0030, 0x0020); + rt286_index_update_bits(codec, NODE_ID_VENDOR_REGISTERS, + 0x02, 0xc000, 0x8000); +#endif + rt286_write(codec, AC_VERB_SET_CHANNEL_STREAMID, + NODE_ID_ADC_IN1, 0x10); + rt286_index_update_bits(codec, NODE_ID_VENDOR_REGISTERS, + 0x0f, 0x0020, 0x0000); + rt286_write(codec, AC_VERB_SET_POWER_STATE, + NODE_ID_ADC_IN2, AC_PWRST_D0); + + break; + case SND_SOC_DAPM_PRE_PMD: + rt286_write(codec, AC_VERB_SET_POWER_STATE, + NODE_ID_ADC_IN2, AC_PWRST_D3); + break; + case SND_SOC_DAPM_POST_REG: + rt286_write(codec, AC_VERB_SET_CONNECT_SEL, + NODE_ID_MIXER_IN2, snd_soc_read(codec, + NODE_ID_MIXER_IN2) & RT286_ADC_SEL_MASK); + break; + default: + return 0; + } + + return 0; +} + +static int rt286_spk_mux_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = w->codec; + + switch (event) { + case SND_SOC_DAPM_POST_REG: + rt286_write(codec, AC_VERB_SET_CONNECT_SEL, + NODE_ID_SPK_OUT, snd_soc_read(codec, + NODE_ID_SPK_OUT) & RT286_SPK_SEL_MASK); + break; + default: + return 0; + } + + return 0; +} + +static int rt286_hpo_mux_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = w->codec; + + switch (event) { + case SND_SOC_DAPM_POST_REG: + rt286_write(codec, AC_VERB_SET_CONNECT_SEL, + NODE_ID_HP_OUT, snd_soc_read(codec, + NODE_ID_HP_OUT) & RT286_HP_SEL_MASK); + break; + default: + return 0; + } + + return 0; +} + +static const struct snd_soc_dapm_widget rt286_dapm_widgets[] = { + /* Input Lines */ + SND_SOC_DAPM_INPUT("DMIC1 Pin"), + SND_SOC_DAPM_INPUT("DMIC2 Pin"), + SND_SOC_DAPM_INPUT("MIC1"), + SND_SOC_DAPM_INPUT("LINE1"), + SND_SOC_DAPM_INPUT("Beep"), + + /* DMIC */ + SND_SOC_DAPM_PGA_E("DMIC1", SND_SOC_NOPM, 0, 0, + NULL, 0, rt286_set_dmic1_event, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PGA_E("DMIC2", SND_SOC_NOPM, 0, 0, + NULL, 0, rt286_set_dmic2_event, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_SUPPLY("DMIC Receiver", SND_SOC_NOPM, + 0, 0, NULL, 0), + + /* REC Mixer */ + SND_SOC_DAPM_MIXER("RECMIX", SND_SOC_NOPM, 0, 0, + rt286_rec_mix, ARRAY_SIZE(rt286_rec_mix)), + + /* ADCs */ + SND_SOC_DAPM_ADC("ADC 0", NULL, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_ADC("ADC 1", NULL, SND_SOC_NOPM, 0, 0), + + /* ADC Mux */ + SND_SOC_DAPM_MUX_E("ADC 0 Mux", SND_SOC_NOPM, 0, 0, + &rt286_adc0_mux, rt286_adc0_event, SND_SOC_DAPM_PRE_PMD | + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_REG), + SND_SOC_DAPM_MUX_E("ADC 1 Mux", SND_SOC_NOPM, 0, 0, + &rt286_adc1_mux, rt286_adc1_event, SND_SOC_DAPM_PRE_PMD | + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_REG), + + + /* Audio Interface */ + SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0), + + + /* Output Side */ + + /* DACs */ + SND_SOC_DAPM_DAC_E("DAC 0", NULL, SND_SOC_NOPM, + 0, 0, rt286_dac0_event, + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), + SND_SOC_DAPM_DAC_E("DAC 1", NULL, SND_SOC_NOPM, + 0, 0, rt286_dac1_event, + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), + + /* Output Mux */ + SND_SOC_DAPM_MUX_E("SPK Mux", SND_SOC_NOPM, 0, 0, + &rt286_spo_mux, + rt286_spk_mux_event, + SND_SOC_DAPM_POST_REG), + + SND_SOC_DAPM_MUX_E("HPO Mux", SND_SOC_NOPM, 0, 0, + &rt286_hpo_mux, + rt286_hpo_mux_event, + SND_SOC_DAPM_POST_REG), + + SND_SOC_DAPM_SUPPLY("HP Power", SND_SOC_NOPM, + 0, 0, rt286_hp_pow_event, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + + SND_SOC_DAPM_MUX("SPDIF Mux", SND_SOC_NOPM, 0, 0, + &rt286_spdif_mux), + + /* Output Mixer */ + SND_SOC_DAPM_MIXER("Front", SND_SOC_NOPM, 0, 0, + rt286_front_mix, ARRAY_SIZE(rt286_front_mix)), + SND_SOC_DAPM_PGA("Surr", SND_SOC_NOPM, 0, 0, NULL, 0), + + /* Output Pga */ + SND_SOC_DAPM_PGA_E("SPO", SND_SOC_NOPM, 0, 0, + NULL, 0, rt286_spk_event, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PGA_E("HPO", SND_SOC_NOPM, 0, 0, + NULL, 0, rt286_hp_event, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + /* Output Lines */ + SND_SOC_DAPM_OUTPUT("SPOL"), + SND_SOC_DAPM_OUTPUT("SPOR"), + SND_SOC_DAPM_OUTPUT("HPO Pin"), + SND_SOC_DAPM_OUTPUT("SPDIF"), +}; + +static const struct snd_soc_dapm_route rt286_dapm_routes[] = { + {"DMIC1", NULL, "DMIC1 Pin"}, + {"DMIC2", NULL, "DMIC2 Pin"}, + {"DMIC1", NULL, "DMIC Receiver"}, + {"DMIC2", NULL, "DMIC Receiver"}, + + {"RECMIX", "Beep Switch", "Beep"}, + {"RECMIX", "Line1 Switch", "LINE1"}, + {"RECMIX", "Mic1 Switch", "MIC1"}, + + {"ADC 0 Mux", "Dmic", "DMIC1"}, + {"ADC 0 Mux", "Mic", "MIC1"}, + {"ADC 1 Mux", "Dmic", "DMIC2"}, + {"ADC 1 Mux", "Mic", "MIC1"}, + + {"ADC 0", NULL, "ADC 0 Mux"}, + {"ADC 1", NULL, "ADC 1 Mux"}, + + {"AIF1TX", NULL, "ADC 0"}, + {"AIF2TX", NULL, "ADC 1"}, + + {"DAC 0", NULL, "AIF1RX"}, + {"DAC 1", NULL, "AIF2RX"}, + + {"Front", "DAC Switch", "DAC 0"}, + {"Front", "RECMIX Switch", "RECMIX"}, + + {"Surr", NULL, "DAC 1"}, + + {"SPK Mux", "Front", "Front"}, + {"SPK Mux", "Surr", "Surr"}, + + {"HPO Mux", "Front", "Front"}, + {"HPO Mux", "Surr", "Surr"}, + + {"SPO", NULL, "SPK Mux"}, + {"HPO", NULL, "HPO Mux"}, + {"HPO", NULL, "HP Power"}, + + {"SPOL", NULL, "SPO"}, + {"SPOR", NULL, "SPO"}, + {"HPO Pin", NULL, "HPO"}, +}; + +static int rt286_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_codec *codec = rtd->codec; + unsigned long val; + int d_len_code; + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + val = rt286_read(codec, AC_VERB_GET_STREAM_FORMAT, + NODE_ID_DAC_OUT1, 0); + else + val = rt286_read(codec, AC_VERB_GET_STREAM_FORMAT, + NODE_ID_ADC_IN1, 0); + + switch (params_rate(params)) { + /* bit 14 0:48K 1:44.1K */ + case 48000: + val &= ~0x4000; + break; + case 44100: + val |= 0x4000; + break; + default: + pr_err("unsportted sample rate %d\n", params_rate(params)); + return -EINVAL; + } + + if (params_channels(params) <= 16) { + /* bit 3:0 Number of Channel */ + val &= ~0xf; + val |= (params_channels(params) - 1); + } else { + pr_err("unsportted channels %d\n", params_channels(params)); + return -EINVAL; + } + + val &= ~0x70; + d_len_code = 0; + switch (params_format(params)) { + /* bit 6:4 Bits per Sample */ + case SNDRV_PCM_FORMAT_S16_LE: + d_len_code = 0; + val |= (0x1 << 4); + break; + case SNDRV_PCM_FORMAT_S32_LE: + d_len_code = 2; + val |= (0x4 << 4); + break; + case SNDRV_PCM_FORMAT_S20_3LE: + d_len_code = 1; + val |= (0x2 << 4); + break; + case SNDRV_PCM_FORMAT_S24_LE: + d_len_code = 2; + val |= (0x3 << 4); + break; + case SNDRV_PCM_FORMAT_S8: + break; + default: + return -EINVAL; + } + rt286_index_update_bits(codec, + NODE_ID_VENDOR_REGISTERS, 0x09, 0x0018, d_len_code << 3); + pr_debug("format val = 0x%lx\n", val); + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + rt286_write(codec, AC_VERB_SET_STREAM_FORMAT, + NODE_ID_DAC_OUT1, val); + else + rt286_write(codec, AC_VERB_SET_STREAM_FORMAT, + NODE_ID_ADC_IN1, val); + + return 0; +} + +static int rt286_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) +{ + struct snd_soc_codec *codec = dai->codec; + unsigned long val_dac, val_adc; + + val_dac = rt286_read(codec, AC_VERB_GET_STREAM_FORMAT, + NODE_ID_DAC_OUT1, 0); + val_adc = rt286_read(codec, AC_VERB_GET_STREAM_FORMAT, + NODE_ID_ADC_IN1, 0); + + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + rt286_index_update_bits(codec, + NODE_ID_VENDOR_REGISTERS, 0x09, 0x0300, 0x0); + break; + case SND_SOC_DAIFMT_LEFT_J: + rt286_index_update_bits(codec, + NODE_ID_VENDOR_REGISTERS, 0x09, 0x0300, 0x1 << 8); + break; + case SND_SOC_DAIFMT_DSP_A: + rt286_index_update_bits(codec, + NODE_ID_VENDOR_REGISTERS, 0x09, 0x0300, 0x2 << 8); + break; + case SND_SOC_DAIFMT_DSP_B: + rt286_index_update_bits(codec, + NODE_ID_VENDOR_REGISTERS, 0x09, 0x0300, 0x3 << 8); + break; + default: + return -EINVAL; + } + /* bit 15 Stream Type 0:PCM 1:Non-PCM */ + val_dac &= ~0x8000; + val_adc &= ~0x8000; + rt286_write(codec, AC_VERB_SET_STREAM_FORMAT, + NODE_ID_DAC_OUT1, val_dac); + rt286_write(codec, AC_VERB_SET_STREAM_FORMAT, + NODE_ID_ADC_IN1, val_adc); + + return 0; +} + +static int rt286_set_dai_sysclk(struct snd_soc_dai *dai, + int clk_id, unsigned int freq, int dir) +{ + struct snd_soc_codec *codec = dai->codec; + + pr_debug("%s freq=%d\n", __func__, freq); + + switch (freq) { + case 19200000: + case 24000000: + rt286_index_update_bits(codec, NODE_ID_VENDOR_REGISTERS, + 0x63, 0x4, 0x4); + rt286_index_update_bits(codec, NODE_ID_VENDOR_REGISTERS, + 0x49, 0x20, 0x0); + break; + case 12288000: + case 11289600: + rt286_index_update_bits(codec, NODE_ID_VENDOR_REGISTERS, + 0x0a, 0x0108, 0x0000); + rt286_index_update_bits(codec, NODE_ID_VENDOR_REGISTERS, + 0x0b, 0xfc1e, 0x0004); + rt286_index_update_bits(codec, NODE_ID_VENDOR_REGISTERS, + 0x49, 0x0020, 0x0020); + break; + case 24576000: + case 22579200: + rt286_index_update_bits(codec, NODE_ID_VENDOR_REGISTERS, + 0x0a, 0x0108, 0x0008); + rt286_index_update_bits(codec, NODE_ID_VENDOR_REGISTERS, + 0x0b, 0xfc1e, 0x5406); + rt286_index_update_bits(codec, NODE_ID_VENDOR_REGISTERS, + 0x49, 0x0020, 0x0020); + break; + default: + pr_err("unsported system clock\n"); + return -EINVAL; + } + + return 0; +} + +static int rt286_set_dai_dfs(struct snd_soc_dai *dai, unsigned int fs) +{ + struct snd_soc_codec *codec = dai->codec; + + pr_debug("%s fs=%d\n", __func__, fs); + if (50 == fs) + rt286_index_update_bits(codec, + NODE_ID_VENDOR_REGISTERS, 0x09, 0x1000, 0x1000); + + + return 0; +} + +static ssize_t rt286_codec_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct rt286_priv *rt286 = i2c_get_clientdata(client); + struct snd_soc_codec *codec = rt286->codec; + unsigned long val; + int cnt = 0, i; + + cnt += sprintf(buf, "RT286 codec register\n"); + for (i = 0; i <= TOTAL_NODE_ID; i++) { + if (cnt + 31 >= PAGE_SIZE) + break; + if (!rt286_readable_register(dev, i)) + continue; + val = rt286_read(codec, AC_VERB_GET_POWER_STATE, i, 0); + + cnt += snprintf(buf + cnt, 31, + "vid: 0x%x nid: %02x val: %04lx\n", + AC_VERB_GET_POWER_STATE, i, val); + } + for (i = 0; i <= TOTAL_NODE_ID; i++) { + if (cnt + 31 >= PAGE_SIZE) + break; + if (!rt286_readable_register(dev, i)) + continue; + val = rt286_read(codec, AC_VERB_GET_PIN_WIDGET_CONTROL, i, 0); + + cnt += snprintf(buf + cnt, 31, + "vid: 0x%x nid: %02x val: %04lx\n", + AC_VERB_GET_PIN_WIDGET_CONTROL, i, val); + } + for (i = 0; i <= TOTAL_NODE_ID; i++) { + if (cnt + 31 >= PAGE_SIZE) + break; + if (!rt286_readable_register(dev, i)) + continue; + val = rt286_read(codec, AC_VERB_GET_AMP_GAIN_MUTE, i, 0); + + cnt += snprintf(buf + cnt, 31, + "vid: 0x%x nid: %02x val: %04lx\n", + AC_VERB_GET_AMP_GAIN_MUTE, i, val); + } + + val = rt286_index_read(codec, NODE_ID_VENDOR_REGISTERS, 0x09); + cnt += snprintf(buf + cnt, 31, "Index: 0x%x val: %04lx\n", 0x09, val); + + + if (cnt >= PAGE_SIZE) + cnt = PAGE_SIZE - 1; + + return cnt; +} + +static ssize_t rt286_codec_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct rt286_priv *rt286 = i2c_get_clientdata(client); + struct snd_soc_codec *codec = rt286->codec; + unsigned int nid = 0, vid = 0; + unsigned long data = 0; + int i; + + pr_debug("register \"%s\" count=%ld\n", buf, count); + + for (i = 0; i < count; i++) { + if (*(buf + i) <= '9' && *(buf + i) >= '0') + vid = (vid << 4) | (*(buf + i) - '0'); + else if (*(buf + i) <= 'f' && *(buf + i) >= 'a') + vid = (vid << 4) | ((*(buf + i) - 'a') + 0xa); + else if (*(buf + i) <= 'F' && *(buf + i) >= 'A') + vid = (vid << 4) | ((*(buf + i) - 'A') + 0xa); + else + break; + } + + for (i = i + 1; i < count; i++) { + if (*(buf + i) <= '9' && *(buf + i) >= '0') + nid = (nid << 4) | (*(buf + i) - '0'); + else if (*(buf + i) <= 'f' && *(buf + i) >= 'a') + nid = (nid << 4) | ((*(buf + i) - 'a') + 0xa); + else if (*(buf + i) <= 'F' && *(buf + i) >= 'A') + nid = (nid << 4) | ((*(buf + i) - 'A') + 0xa); + else + break; + } + + for (i = i + 1; i < count; i++) { + if (*(buf + i) <= '9' && *(buf + i) >= '0') + data = (data << 4) | (*(buf + i) - '0'); + else if (*(buf + i) <= 'f' && *(buf + i) >= 'a') + data = (data << 4) | ((*(buf + i) - 'a') + 0xa); + else if (*(buf + i) <= 'F' && *(buf + i) >= 'A') + data = (data << 4) | ((*(buf + i) - 'A') + 0xa); + else + break; + } + + if (*(buf + i + 1) == 'r') { + pr_info("vid=0x%x nid=0x%x data=0x%lx\n", + vid, nid, rt286_read(codec, vid, nid, data)); + } else { + rt286_write(codec, vid, nid, data); + pr_debug("vid=0x%x nid=0x%x data=0x%lx\n", vid, nid, data); + } + + return count; +} + +static DEVICE_ATTR(codec_reg, 0666, rt286_codec_show, rt286_codec_store); + +static int rt286_set_bias_level(struct snd_soc_codec *codec, + enum snd_soc_bias_level level) +{ + switch (level) { + case SND_SOC_BIAS_ON: + pr_debug("In case SND_SOC_BIAS_ON:\n"); + break; + + case SND_SOC_BIAS_PREPARE: + rt286_write(codec, AC_VERB_SET_POWER_STATE, + NODE_ID_AUDIO_FUNCTION_GROUP, AC_PWRST_D0); + pr_debug("In case SND_SOC_BIAS_PREPARE:\n"); + break; + + case SND_SOC_BIAS_STANDBY: + pr_debug("In case SND_SOC_BIAS_STANDBY:\n"); + break; + + case SND_SOC_BIAS_OFF: + pr_debug("In case SND_SOC_BIAS_OFF:\n"); + rt286_write(codec, AC_VERB_SET_POWER_STATE, + NODE_ID_AUDIO_FUNCTION_GROUP, AC_PWRST_D3); + break; + + default: + break; + } + codec->dapm.bias_level = level; + + return 0; +} + +static int rt286_probe(struct snd_soc_codec *codec) +{ + struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec); + int ret; + + pr_info("Codec driver version %s\n", VERSION); + + ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP); + if (ret != 0) { + dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); + return ret; + } + + hwCodecConfigure(codec); + codec->dapm.bias_level = SND_SOC_BIAS_OFF; + rt286->codec = codec; + + ret = device_create_file(codec->dev, &dev_attr_codec_reg); + if (ret != 0) { + dev_err(codec->dev, + "Failed to create codec_reg sysfs files: %d\n", ret); + return ret; + } + + return 0; +} + +static int rt286_remove(struct snd_soc_codec *codec) +{ + rt286_set_bias_level(codec, SND_SOC_BIAS_OFF); + return 0; +} + +#ifdef CONFIG_PM +static int rt286_suspend(struct snd_soc_codec *codec) +{ + return 0; +} + +static int rt286_resume(struct snd_soc_codec *codec) +{ + return 0; +} +#else +#define rt286_suspend NULL +#define rt286_resume NULL +#endif + +#define RT286_STEREO_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000) +#define RT286_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ + SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8) + +struct snd_soc_dai_ops rt286_aif_dai_ops = { + .hw_params = rt286_hw_params, + .set_fmt = rt286_set_dai_fmt, + .set_sysclk = rt286_set_dai_sysclk, + .set_dfs = rt286_set_dai_dfs, +}; + +struct snd_soc_dai_driver rt286_dai[] = { + { + .name = "rt286-aif1", + .id = RT286_AIF1, + .playback = { + .stream_name = "AIF1 Playback", + .channels_min = 1, + .channels_max = 2, + .rates = RT286_STEREO_RATES, + .formats = RT286_FORMATS, + }, + .capture = { + .stream_name = "AIF1 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = RT286_STEREO_RATES, + .formats = RT286_FORMATS, + }, + .ops = &rt286_aif_dai_ops, + }, +}; + +static struct snd_soc_codec_driver soc_codec_dev_rt286 = { + .probe = rt286_probe, + .remove = rt286_remove, + .suspend = rt286_suspend, + .resume = rt286_resume, + .set_bias_level = rt286_set_bias_level, + .idle_bias_off = true, + .controls = rt286_snd_controls, + .num_controls = ARRAY_SIZE(rt286_snd_controls), + .dapm_widgets = rt286_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(rt286_dapm_widgets), + .dapm_routes = rt286_dapm_routes, + .num_dapm_routes = ARRAY_SIZE(rt286_dapm_routes), +}; + +static const struct regmap_config rt286_regmap = { + .reg_bits = 8, + .val_bits = 16, + + .max_register = TOTAL_NODE_ID + 1, + .volatile_reg = rt286_volatile_register, + .readable_reg = rt286_readable_register, + + .cache_type = REGCACHE_RBTREE, + .reg_defaults = rt286_reg, + .num_reg_defaults = ARRAY_SIZE(rt286_reg), +}; + +static const struct i2c_device_id rt286_i2c_id[] = { + {"rt286", 0}, + {} +}; +MODULE_DEVICE_TABLE(i2c, rt286_i2c_id); + +static struct acpi_device_id rt286_acpi_match[] = { + {"INT343A", 0}, + {}, +}; +MODULE_DEVICE_TABLE(acpi, rt286_acpi_match); + +static int rt286_i2c_probe(struct i2c_client *i2c, + const struct i2c_device_id *id) +{ + struct rt286_priv *rt286; + int ret; + + rt286 = devm_kzalloc(&i2c->dev, + sizeof(struct rt286_priv), + GFP_KERNEL); + if (NULL == rt286) + return -ENOMEM; + + rt286->i2c = i2c; + i2c_set_clientdata(i2c, rt286); + + rt286->regmap = devm_regmap_init_i2c(i2c, &rt286_regmap); + if (IS_ERR(rt286->regmap)) { + ret = PTR_ERR(rt286->regmap); + dev_err(&i2c->dev, "Failed to allocate register map: %d\n", + ret); + return ret; + } + + regcache_cache_only(rt286->regmap, true); + ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt286, + rt286_dai, ARRAY_SIZE(rt286_dai)); + if (ret < 0) + goto err; + + return 0; +err: + return ret; +} + +static int rt286_i2c_remove(struct i2c_client *i2c) +{ + snd_soc_unregister_codec(&i2c->dev); + + return 0; +} + +static void rt286_i2c_shutdown(struct i2c_client *client) +{ + struct rt286_priv *rt286 = i2c_get_clientdata(client); + struct snd_soc_codec *codec = rt286->codec; + + if (codec != NULL) + rt286_set_bias_level(codec, SND_SOC_BIAS_OFF); +} + +struct i2c_driver rt286_i2c_driver = { + .driver = { + .name = "rt286", + .owner = THIS_MODULE, + .acpi_match_table = ACPI_PTR(rt286_acpi_match), + }, + .probe = rt286_i2c_probe, + .remove = rt286_i2c_remove, + .shutdown = rt286_i2c_shutdown, + .id_table = rt286_i2c_id, +}; + +static int __init rt286_modinit(void) +{ + return i2c_add_driver(&rt286_i2c_driver); +} + +module_init(rt286_modinit); + +static void __exit rt286_modexit(void) +{ + i2c_del_driver(&rt286_i2c_driver); +} + +module_exit(rt286_modexit); + +MODULE_DESCRIPTION("ASoC RT286 driver"); +MODULE_AUTHOR("Bard Liao <bardliao(a)realtek.com>"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/codecs/rt286.h b/sound/soc/codecs/rt286.h new file mode 100644 index 0000000..3702d9a --- /dev/null +++ b/sound/soc/codecs/rt286.h @@ -0,0 +1,113 @@ +/* + * rt286.h -- RT286 ALSA SoC audio driver + * + * Copyright 2011 Realtek Microelectronics + * Author: Johnny Hsu <johnnyhsu(a)realtek.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __RT286_H__ +#define __RT286_H__ + +#define NODE_ID_AUDIO_FUNCTION_GROUP 0x01 +#define NODE_ID_DAC_OUT1 0x02 +#define NODE_ID_DAC_OUT2 0x03 +#define NODE_ID_ADC_IN1 0x09 +#define NODE_ID_ADC_IN2 0x08 +#define NODE_ID_MIXER_IN 0x0b +#define NODE_ID_MIXER_OUT1 0x0c +#define NODE_ID_MIXER_OUT2 0x0d +#define NODE_ID_DMIC1 0x12 +#define NODE_ID_DMIC2 0x13 +#define NODE_ID_SPK_OUT 0x14 +#define NODE_ID_MIC1 0x18 +#define NODE_ID_LINE1 0x1a +#define NODE_ID_BEEP 0x1d +#define NODE_ID_SPDIF 0x1e +#define NODE_ID_VENDOR_REGISTERS 0x20 +#define NODE_ID_HP_OUT 0x21 +#define NODE_ID_MIXER_IN1 0x22 +#define NODE_ID_MIXER_IN2 0x23 +#define TOTAL_NODE_ID 0x23 + +#define CONNECTION_INDEX_MIC1 0X0 +#define CONNECTION_INDEX_DMIC 0X5 + +/* SPDIF (0x06) */ +#define RT286_SPDIF_SEL_SFT 0 +#define RT286_SPDIF_SEL_PCM0 0 +#define RT286_SPDIF_SEL_PCM1 1 +#define RT286_SPDIF_SEL_SPOUT 2 +#define RT286_SPDIF_SEL_PP 3 + +/* RECMIX (0x0b) */ +#define RT286_M_REC_BEEP_SFT 0 +#define RT286_M_REC_LINE1_SFT 1 +#define RT286_M_REC_MIC1_SFT 2 +#define RT286_M_REC_I2S_SFT 3 + +/* Front (0x0c) */ +#define RT286_M_FRONT_DAC_SFT 0 +#define RT286_M_FRONT_REC_SFT 1 + +/* SPK-OUT (0x14) */ +#define RT286_SPK_SEL_MASK 0x1 +#define RT286_SPK_SEL_SFT 0 +#define RT286_SPK_SEL_F 0 +#define RT286_SPK_SEL_S 1 + +/* HP-OUT (0x21) */ +#define RT286_HP_SEL_MASK 0x1 +#define RT286_HP_SEL_SFT 0 +#define RT286_HP_SEL_F 0 +#define RT286_HP_SEL_S 1 + +/* ADC (0x22) (0x23) */ +#define RT286_ADC_SEL_MASK 0x7 +#define RT286_ADC_SEL_SFT 0 +#define RT286_ADC_SEL_SURR 0 +#define RT286_ADC_SEL_FRONT 1 +#define RT286_ADC_SEL_DMIC 2 +#define RT286_ADC_SEL_BEEP 4 +#define RT286_ADC_SEL_LINE1 5 +#define RT286_ADC_SEL_I2S 6 +#define RT286_ADC_SEL_MIC1 7 + +/* System Clock Source */ +enum { + RT286_SCLK_S_MCLK, + RT286_SCLK_S_PLL1, + RT286_SCLK_S_RCCLK, +}; + +enum { + RT286_AIF1, + RT286_AIF2, + RT286_AIF3, + RT286_AIFS, +}; + +enum { + RT286_DMIC_DIS, + RT286_DMIC1, + RT286_DMIC2, +}; + +enum { + RT286_J_IN_EVENT, /* Jack insert */ + RT286_J_OUT_EVENT, /* Jack evulse */ + RT286_BP_EVENT, /* Button Press */ + RT286_BR_EVENT, /* Button Release */ + RT286_UN_EVENT, /* Unknown */ +}; + +struct rt286_pll_code { + bool m_bp; /* Indicates bypass m code or not. */ + int m_code; + int n_code; + int k_code; +}; +#endif /* __RT286_H__ */ -- 1.8.1.1.439.g50a6b54

3 2

[alsa-devel] [PATCH] ASoC: kirkwood: Fix erroneous double output while playing
by Jean-Francois Moine 27 Nov '13

27 Nov '13

This patch fixes the setting of the register KIRKWOOD_PLAYCTL which did always streaming on both I2S and SPDIF, ignoring the DAI ID. The bug was introduced by the commit 75b9b65ee5a "ASoC: kirkwood: add S/PDIF support" Signed-off-by: Jean-Francois Moine <moinejf(a)free.fr> --- sound/soc/kirkwood/kirkwood-i2s.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/sound/soc/kirkwood/kirkwood-i2s.c b/sound/soc/kirkwood/kirkwood-i2s.c index d34d917..b27f826 100644 --- a/sound/soc/kirkwood/kirkwood-i2s.c +++ b/sound/soc/kirkwood/kirkwood-i2s.c @@ -244,15 +244,15 @@ static int kirkwood_i2s_play_trigger(struct snd_pcm_substream *substream, ctl); } - if (dai->id == 0) - ctl &= ~KIRKWOOD_PLAYCTL_SPDIF_EN; /* i2s */ - else - ctl &= ~KIRKWOOD_PLAYCTL_I2S_EN; /* spdif */ - switch (cmd) { case SNDRV_PCM_TRIGGER_START: /* configure */ ctl = priv->ctl_play; + if (dai->id == 0) + ctl &= ~KIRKWOOD_PLAYCTL_SPDIF_EN; /* i2s */ + else + ctl &= ~KIRKWOOD_PLAYCTL_I2S_EN; /* spdif */ + value = ctl & ~KIRKWOOD_PLAYCTL_ENABLE_MASK; writel(value, priv->io + KIRKWOOD_PLAYCTL); -- Ken ar c'hentañ | ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/

2 1

[alsa-devel] [PATCH] ASoC: kirkwood: Fix invalid SPDIF format
by Jean-Francois Moine 27 Nov '13

27 Nov '13

This patch removes the 32 bits format which is not supported by S/PDIF output. Signed-off-by: Jean-Francois Moine <moinejf(a)free.fr> --- sound/soc/kirkwood/kirkwood-i2s.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/sound/soc/kirkwood/kirkwood-i2s.c b/sound/soc/kirkwood/kirkwood-i2s.c index b27f826..0b18f65 100644 --- a/sound/soc/kirkwood/kirkwood-i2s.c +++ b/sound/soc/kirkwood/kirkwood-i2s.c @@ -33,6 +33,10 @@ SNDRV_PCM_FMTBIT_S24_LE | \ SNDRV_PCM_FMTBIT_S32_LE) +#define KIRKWOOD_SPDIF_FORMATS \ + (SNDRV_PCM_FMTBIT_S16_LE | \ + SNDRV_PCM_FMTBIT_S24_LE) + static int kirkwood_i2s_set_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt) { @@ -449,14 +453,14 @@ static struct snd_soc_dai_driver kirkwood_i2s_dai[2] = { .channels_max = 2, .rates = SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000, - .formats = KIRKWOOD_I2S_FORMATS, + .formats = KIRKWOOD_SPDIF_FORMATS, }, .capture = { .channels_min = 1, .channels_max = 2, .rates = SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000, - .formats = KIRKWOOD_I2S_FORMATS, + .formats = KIRKWOOD_SPDIF_FORMATS, }, .ops = &kirkwood_i2s_dai_ops, }, @@ -493,7 +497,7 @@ static struct snd_soc_dai_driver kirkwood_i2s_dai_extclk[2] = { .rates = SNDRV_PCM_RATE_8000_192000 | SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_KNOT, - .formats = KIRKWOOD_I2S_FORMATS, + .formats = KIRKWOOD_SPDIF_FORMATS, }, .capture = { .channels_min = 1, @@ -501,7 +505,7 @@ static struct snd_soc_dai_driver kirkwood_i2s_dai_extclk[2] = { .rates = SNDRV_PCM_RATE_8000_192000 | SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_KNOT, - .formats = KIRKWOOD_I2S_FORMATS, + .formats = KIRKWOOD_SPDIF_FORMATS, }, .ops = &kirkwood_i2s_dai_ops, }, -- Ken ar c'hentañ | ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/

5 7

[alsa-devel] [PATCH 1/2] ASoC: soc_pcm_init_runtime_hw: Fix rate_max calculation
by Lars-Peter Clausen 27 Nov '13

27 Nov '13

In order to make sure that the sample rate is in the supported range of both components the maximum rate of the card should be the minimum of the maximum rate of each components. There is one special case to consider though, if max_rate is set to 0 this means there is no maximum specified, so use min_not_zero() macro which will give use the desired result. Signed-off-by: Lars-Peter Clausen <lars(a)metafoo.de> --- sound/soc/soc-pcm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/soc-pcm.c b/sound/soc/soc-pcm.c index 170ff96..c4ef880 100644 --- a/sound/soc/soc-pcm.c +++ b/sound/soc/soc-pcm.c @@ -220,7 +220,7 @@ static void soc_pcm_init_runtime_hw(struct snd_pcm_hardware *hw, struct snd_soc_pcm_stream *cpu_stream) { hw->rate_min = max(codec_stream->rate_min, cpu_stream->rate_min); - hw->rate_max = max(codec_stream->rate_max, cpu_stream->rate_max); + hw->rate_max = min_not_zero(codec_stream->rate_max, cpu_stream->rate_max); hw->channels_min = max(codec_stream->channels_min, cpu_stream->channels_min); hw->channels_max = min(codec_stream->channels_max, -- 1.8.0

3 10

[alsa-devel] [PATCH] ASoC: wm5110: Remove output OSR and PGA volume controls
by Charles Keepax 27 Nov '13

27 Nov '13

These are managed automatically in current revisions. Signed-off-by: Charles Keepax <ckeepax(a)opensource.wolfsonmicro.com> --- sound/soc/codecs/wm5110.c | 25 ------------------------- 1 files changed, 0 insertions(+), 25 deletions(-) diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index 0e63d8c..9eb8517 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -309,19 +309,6 @@ ARIZONA_MIXER_CONTROLS("SPKDAT1R", ARIZONA_OUT5RMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("SPKDAT2L", ARIZONA_OUT6LMIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("SPKDAT2R", ARIZONA_OUT6RMIX_INPUT_1_SOURCE), -SOC_SINGLE("HPOUT1 High Performance Switch", ARIZONA_OUTPUT_PATH_CONFIG_1L, - ARIZONA_OUT1_OSR_SHIFT, 1, 0), -SOC_SINGLE("HPOUT2 High Performance Switch", ARIZONA_OUTPUT_PATH_CONFIG_2L, - ARIZONA_OUT2_OSR_SHIFT, 1, 0), -SOC_SINGLE("HPOUT3 High Performance Switch", ARIZONA_OUTPUT_PATH_CONFIG_3L, - ARIZONA_OUT3_OSR_SHIFT, 1, 0), -SOC_SINGLE("Speaker High Performance Switch", ARIZONA_OUTPUT_PATH_CONFIG_4L, - ARIZONA_OUT4_OSR_SHIFT, 1, 0), -SOC_SINGLE("SPKDAT1 High Performance Switch", ARIZONA_OUTPUT_PATH_CONFIG_5L, - ARIZONA_OUT5_OSR_SHIFT, 1, 0), -SOC_SINGLE("SPKDAT2 High Performance Switch", ARIZONA_OUTPUT_PATH_CONFIG_6L, - ARIZONA_OUT6_OSR_SHIFT, 1, 0), - SOC_DOUBLE_R("HPOUT1 Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_1L, ARIZONA_DAC_DIGITAL_VOLUME_1R, ARIZONA_OUT1L_MUTE_SHIFT, 1, 1), SOC_DOUBLE_R("HPOUT2 Digital Switch", ARIZONA_DAC_DIGITAL_VOLUME_2L, @@ -354,18 +341,6 @@ SOC_DOUBLE_R_TLV("SPKDAT2 Digital Volume", ARIZONA_DAC_DIGITAL_VOLUME_6L, ARIZONA_DAC_DIGITAL_VOLUME_6R, ARIZONA_OUT6L_VOL_SHIFT, 0xbf, 0, digital_tlv), -SOC_DOUBLE_R_RANGE_TLV("HPOUT1 Volume", ARIZONA_OUTPUT_PATH_CONFIG_1L, - ARIZONA_OUTPUT_PATH_CONFIG_1R, - ARIZONA_OUT1L_PGA_VOL_SHIFT, - 0x34, 0x40, 0, ana_tlv), -SOC_DOUBLE_R_RANGE_TLV("HPOUT2 Volume", ARIZONA_OUTPUT_PATH_CONFIG_2L, - ARIZONA_OUTPUT_PATH_CONFIG_2R, - ARIZONA_OUT2L_PGA_VOL_SHIFT, - 0x34, 0x40, 0, ana_tlv), -SOC_DOUBLE_R_RANGE_TLV("HPOUT3 Volume", ARIZONA_OUTPUT_PATH_CONFIG_3L, - ARIZONA_OUTPUT_PATH_CONFIG_3R, - ARIZONA_OUT3L_PGA_VOL_SHIFT, 0x34, 0x40, 0, ana_tlv), - SOC_DOUBLE("SPKDAT1 Switch", ARIZONA_PDM_SPK1_CTRL_1, ARIZONA_SPK1L_MUTE_SHIFT, ARIZONA_SPK1R_MUTE_SHIFT, 1, 1), SOC_DOUBLE("SPKDAT2 Switch", ARIZONA_PDM_SPK2_CTRL_1, ARIZONA_SPK2L_MUTE_SHIFT, -- 1.7.2.5

2 1

[alsa-devel] [PATCH] ALSA: hda - resume codecs in parallel
by mengdong.lin＠intel.com 27 Nov '13

27 Nov '13

From: Mengdong Lin <mengdong.lin(a)intel.com> To reduce driver resume time, this patch resumes the codecs in parallel if there are multiple codecs on the bus. - The PM workqueue of bus is also used to parallel resuming multiple codecs. - The work item 'pm_work' is renamed to 'suspend_work' to parallel suspending codecs. - Add a work item 'resume_work' to parallel resuming codecs. Signed-off-by: Mengdong Lin <mengdong.lin(a)intel.com> diff --git a/sound/pci/hda/hda_codec.c b/sound/pci/hda/hda_codec.c index 60ff45a..1e04a20 100644 --- a/sound/pci/hda/hda_codec.c +++ b/sound/pci/hda/hda_codec.c @@ -104,7 +104,8 @@ static inline void hda_call_pm_notify(struct hda_bus *bus, bool power_up) if (bus->ops.pm_notify) bus->ops.pm_notify(bus, power_up); } -static void hda_pm_work(struct work_struct *work); +static void hda_suspend_work(struct work_struct *work); +static void hda_resume_work(struct work_struct *work); #else #define codec_in_pm(codec) 0 static inline void hda_keep_power_on(struct hda_codec *codec) {} @@ -1447,7 +1448,8 @@ int snd_hda_codec_new(struct hda_bus *bus, #ifdef CONFIG_PM spin_lock_init(&codec->power_lock); INIT_DELAYED_WORK(&codec->power_work, hda_power_work); - INIT_WORK(&codec->pm_work, hda_pm_work); + INIT_WORK(&codec->suspend_work, hda_suspend_work); + INIT_WORK(&codec->resume_work, hda_resume_work); /* snd_hda_codec_new() marks the codec as power-up, and leave it as is. * the caller has to power down appropriatley after initialization * phase. @@ -5058,13 +5060,21 @@ int snd_hda_check_amp_list_power(struct hda_codec *codec, } EXPORT_SYMBOL_HDA(snd_hda_check_amp_list_power); -static void hda_pm_work(struct work_struct *work) +static void hda_suspend_work(struct work_struct *work) { struct hda_codec *codec = - container_of(work, struct hda_codec, pm_work); + container_of(work, struct hda_codec, suspend_work); hda_call_codec_suspend(codec, false); } + +static void hda_resume_work(struct work_struct *work) +{ + struct hda_codec *codec = + container_of(work, struct hda_codec, resume_work); + + hda_call_codec_resume(codec); +} #endif /* @@ -5633,7 +5643,7 @@ int snd_hda_suspend(struct hda_bus *bus) cancel_delayed_work_sync(&codec->jackpoll_work); if (hda_codec_is_power_on(codec)) { if (bus->num_codecs > 1) - queue_work(bus->pm_wq, &codec->pm_work); + queue_work(bus->pm_wq, &codec->suspend_work); else hda_call_codec_suspend(codec, false); } @@ -5659,9 +5669,15 @@ int snd_hda_resume(struct hda_bus *bus) printk("snd_hda_resume, pci device 0x%04x\n", bus->pci->device); list_for_each_entry(codec, &bus->codec_list, list) { - hda_call_codec_resume(codec); + if (bus->num_codecs > 1) + queue_work(bus->pm_wq, &codec->resume_work); + else + hda_call_codec_resume(codec); } + if (bus->num_codecs > 1) + flush_workqueue(bus->pm_wq); + printk("snd_hda_resume ok, pci device 0x%04x\n", bus->pci->device); return 0; } diff --git a/sound/pci/hda/hda_codec.h b/sound/pci/hda/hda_codec.h index 82807ef..bedb436 100644 --- a/sound/pci/hda/hda_codec.h +++ b/sound/pci/hda/hda_codec.h @@ -920,7 +920,9 @@ struct hda_codec { unsigned long power_off_acct; unsigned long power_jiffies; spinlock_t power_lock; - struct work_struct pm_work; /* task to parallel multi-codec PM */ + /* tasks to parallel multi-codec suspend/resume */ + struct work_struct suspend_work; + struct work_struct resume_work; #endif /* filter the requested power state per nid */ -- 1.8.1.2

2 1

[alsa-devel] [RFC PATCH] ALSA: hda - suspend codecs in parallel
by mengdong.lin＠intel.com 27 Nov '13

27 Nov '13

From: Mengdong Lin <mengdong.lin(a)intel.com> The time to suspend a single codec may be several hundreds of ms. When runtime power saving is not enabled, driver suspend time can be long especially there are more than one codec on the bus. To reduce driver suspend time, this patch creates a work queue for each codec and will suspend the codecs in parallel, if there are multiple codecs on bus. Signed-off-by: Mengdong Lin <mengdong.lin(a)intel.com> diff --git a/sound/pci/hda/hda_codec.c b/sound/pci/hda/hda_codec.c index cb0c776..c9092a1 100644 --- a/sound/pci/hda/hda_codec.c +++ b/sound/pci/hda/hda_codec.c @@ -97,6 +97,7 @@ EXPORT_SYMBOL_HDA(snd_hda_delete_codec_preset); #ifdef CONFIG_PM #define codec_in_pm(codec) ((codec)->in_pm) static void hda_power_work(struct work_struct *work); +static void hda_pm_work(struct work_struct *work); static void hda_keep_power_on(struct hda_codec *codec); #define hda_codec_is_power_on(codec) ((codec)->power_on) static inline void hda_call_pm_notify(struct hda_bus *bus, bool power_up) @@ -1355,6 +1356,8 @@ static void snd_hda_codec_free(struct hda_codec *codec) #ifdef CONFIG_PM if (!codec->pm_down_notified) /* cancel leftover refcounts */ hda_call_pm_notify(codec->bus, false); + if (codec->pm_wq) + destroy_workqueue(codec->pm_wq); #endif module_put(codec->owner); free_hda_cache(&codec->amp_cache); @@ -1434,6 +1437,13 @@ int snd_hda_codec_new(struct hda_bus *bus, */ hda_keep_power_on(codec); hda_call_pm_notify(bus, true); + + codec->pm_wq = create_workqueue("hda_codec_wq"); + if (!codec->pm_wq) { + snd_hda_codec_free(codec); + return -ENOMEM; + } + INIT_WORK(&codec->pm_work, hda_pm_work); #endif if (codec->bus->modelname) { @@ -1445,6 +1455,7 @@ int snd_hda_codec_new(struct hda_bus *bus, } list_add_tail(&codec->list, &bus->codec_list); + bus->num_codecs++; bus->caddr_tbl[codec_addr] = codec; codec->vendor_id = snd_hda_param_read(codec, AC_NODE_ROOT, @@ -5032,6 +5043,14 @@ int snd_hda_check_amp_list_power(struct hda_codec *codec, return 0; } EXPORT_SYMBOL_HDA(snd_hda_check_amp_list_power); + +static void hda_pm_work(struct work_struct *work) +{ + struct hda_codec *codec = + container_of(work, struct hda_codec, pm_work); + + hda_call_codec_suspend(codec, false); +} #endif /* @@ -5595,11 +5614,24 @@ EXPORT_SYMBOL_HDA(snd_hda_add_imux_item); int snd_hda_suspend(struct hda_bus *bus) { struct hda_codec *codec; + unsigned int mask = 0; list_for_each_entry(codec, &bus->codec_list, list) { cancel_delayed_work_sync(&codec->jackpoll_work); - if (hda_codec_is_power_on(codec)) - hda_call_codec_suspend(codec, false); + if (hda_codec_is_power_on(codec)) { + if (codec->epss || bus->num_codecs == 1) + hda_call_codec_suspend(codec, false); + else { + mask |= 1 << codec->addr; + queue_work(codec->pm_wq, &codec->pm_work); + } + } + } + + list_for_each_entry(codec, &bus->codec_list, list) { + if (mask & (1 << codec->addr)) + flush_work(&codec->pm_work); + } return 0; } diff --git a/sound/pci/hda/hda_codec.h b/sound/pci/hda/hda_codec.h index 7aa9870..ffb1866 100644 --- a/sound/pci/hda/hda_codec.h +++ b/sound/pci/hda/hda_codec.h @@ -673,6 +673,7 @@ struct hda_bus { /* codec linked list */ struct list_head codec_list; + unsigned int num_codecs; /* link caddr -> codec */ struct hda_codec *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1]; @@ -916,6 +917,8 @@ struct hda_codec { unsigned long power_off_acct; unsigned long power_jiffies; spinlock_t power_lock; + struct workqueue_struct *pm_wq; + struct work_struct pm_work; #endif /* filter the requested power state per nid */ -- 1.8.1.2

3 15

[alsa-devel] [PATCH] ALSA: usb: use multiple packets per urb for Wireless USB inbound audio
by Thomas Pugliese 27 Nov '13

27 Nov '13

For Wireless USB audio devices, use multiple isoc packets per URB for inbound endpoints with a datainterval < 5. This allows the WUSB host controller to take advantage of bursting to service endpoints whose logical polling interval is less than the 4ms minimum polling interval limit in WUSB. Signed-off-by: Thomas Pugliese <thomas.pugliese(a)gmail.com> --- sound/usb/endpoint.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/sound/usb/endpoint.c b/sound/usb/endpoint.c index b9ba0fc..83aabea2 100644 --- a/sound/usb/endpoint.c +++ b/sound/usb/endpoint.c @@ -636,8 +636,22 @@ static int data_ep_set_params(struct snd_usb_endpoint *ep, if (usb_pipein(ep->pipe) || snd_usb_endpoint_implicit_feedback_sink(ep)) { + urb_packs = packs_per_ms; + /* + * Wireless devices can poll at a max rate of once per 4ms. + * For dataintervals less than 5, increase the packet count to + * allow the host controller to use bursting to fill in the + * gaps. + */ + if (snd_usb_get_speed(ep->chip->dev) == USB_SPEED_WIRELESS) { + int interval = ep->datainterval; + while (interval < 5) { + urb_packs <<= 1; + ++interval; + } + } /* make capture URBs <= 1 ms and smaller than a period */ - urb_packs = min(max_packs_per_urb, packs_per_ms); + urb_packs = min(max_packs_per_urb, urb_packs); while (urb_packs > 1 && urb_packs * maxsize >= period_bytes) urb_packs >>= 1; ep->nurbs = MAX_URBS; -- 1.7.10.4

2 1

[alsa-devel] [PATCH] ALSA: hda - Enable mute/mic-mute LEDs for more Thinkpads with Conexant codec
by Hui Wang 27 Nov '13

27 Nov '13

Most Thinkpad Edge series laptops use conexant codec, so far although the codecs have different minor Vendor Id and minor Subsystem Id, but they all belong to the cxt_5066 family, this change can make the mute/mic-mute LEDs support more generic among cxt_5066 family. Cc: Alex Hung <alex.hung(a)canonical.com> Cc: David Henningsson <david.henningsson(a)canonical.com> Signed-off-by: Hui Wang <hui.wang(a)canonical.com> --- sound/pci/hda/hda_local.h | 22 ++++++++++++++++++++++ sound/pci/hda/patch_conexant.c | 3 +++ sound/pci/hda/patch_realtek.c | 20 -------------------- 3 files changed, 25 insertions(+), 20 deletions(-) diff --git a/sound/pci/hda/hda_local.h b/sound/pci/hda/hda_local.h index d398b64..1155958 100644 --- a/sound/pci/hda/hda_local.h +++ b/sound/pci/hda/hda_local.h @@ -777,4 +777,26 @@ void snd_hdmi_write_eld_info(struct hdmi_eld *eld, #define SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE 80 void snd_print_channel_allocation(int spk_alloc, char *buf, int buflen); +#if IS_ENABLED(CONFIG_THINKPAD_ACPI) +#include <acpi/acpi.h> + +static acpi_status acpi_check_cb(acpi_handle handle, u32 lvl, void *context, + void **rv) +{ + bool *found = context; + *found = true; + return AE_OK; +} + +static inline bool is_thinkpad(struct hda_codec *codec) +{ + bool found = false; + if (codec->subsystem_id >> 16 != 0x17aa) + return false; + if (ACPI_SUCCESS(acpi_get_devices("LEN0068", acpi_check_cb, &found, NULL)) && found) + return true; + found = false; + return ACPI_SUCCESS(acpi_get_devices("IBM0068", acpi_check_cb, &found, NULL)) && found; +} +#endif #endif /* __SOUND_HDA_LOCAL_H */ diff --git a/sound/pci/hda/patch_conexant.c b/sound/pci/hda/patch_conexant.c index c205bb1..8063ae9 100644 --- a/sound/pci/hda/patch_conexant.c +++ b/sound/pci/hda/patch_conexant.c @@ -3279,6 +3279,8 @@ static void cxt_fixup_thinkpad_acpi(struct hda_codec *codec, bool removefunc = false; if (action == HDA_FIXUP_ACT_PROBE) { + if (!is_thinkpad(codec)) + return; if (!led_set_func) led_set_func = symbol_request(tpacpi_led_set); if (!led_set_func) { @@ -3494,6 +3496,7 @@ static const struct snd_pci_quirk cxt5066_fixups[] = { SND_PCI_QUIRK(0x17aa, 0x3975, "Lenovo U300s", CXT_FIXUP_STEREO_DMIC), SND_PCI_QUIRK(0x17aa, 0x3977, "Lenovo IdeaPad U310", CXT_FIXUP_STEREO_DMIC), SND_PCI_QUIRK(0x17aa, 0x397b, "Lenovo S205", CXT_FIXUP_STEREO_DMIC), + SND_PCI_QUIRK_VENDOR(0x17aa, "Thinkpad", CXT_FIXUP_THINKPAD_ACPI), SND_PCI_QUIRK(0x1c06, 0x2011, "Lemote A1004", CXT_PINCFG_LEMOTE_A1004), SND_PCI_QUIRK(0x1c06, 0x2012, "Lemote A1205", CXT_PINCFG_LEMOTE_A1205), {} diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index 5e42059..bedf35f 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -3673,29 +3673,9 @@ static void alc290_fixup_mono_speakers(struct hda_codec *codec, #if IS_ENABLED(CONFIG_THINKPAD_ACPI) #include <linux/thinkpad_acpi.h> -#include <acpi/acpi.h> static int (*led_set_func)(int, bool); -static acpi_status acpi_check_cb(acpi_handle handle, u32 lvl, void *context, - void **rv) -{ - bool *found = context; - *found = true; - return AE_OK; -} - -static bool is_thinkpad(struct hda_codec *codec) -{ - bool found = false; - if (codec->subsystem_id >> 16 != 0x17aa) - return false; - if (ACPI_SUCCESS(acpi_get_devices("LEN0068", acpi_check_cb, &found, NULL)) && found) - return true; - found = false; - return ACPI_SUCCESS(acpi_get_devices("IBM0068", acpi_check_cb, &found, NULL)) && found; -} - static void update_tpacpi_mute_led(void *private_data, int enabled) { if (led_set_func) -- 1.8.1.2

4 7

Re: [alsa-devel] Commit:ce6cfaf1 query for shared control
by Lars-Peter Clausen 27 Nov '13

27 Nov '13

On 11/25/2013 11:57 PM, noman pouigt wrote: > On Sun, Nov 24, 2013 at 11:45 PM, Lars-Peter Clausen <lars(a)metafoo.de> wrote: >> On 11/25/2013 08:12 AM, noman pouigt wrote: >>> Hello Lars, >>> >>> I was wondering if you can enlighten me >>> on below query. >>> >>> Commit:ce6cfaf1 >>> >>> From the commit text "The input and >>> output paths for each widgets are only >>> updated though during the respective run >>> for that widget". > Thanks for replying.Probably my query was > not clear.I wanted to understand the commit > text which i quoted above.And my understanding > of that commit text is below: The text just describes the behavior as it was before the commit, which was separate power-up/power-down sequence for each widget. >>> Does this commit text mean: when mux >>> or mixer_power_update is called then only >>> the widget is powered and it's peer- widget >>> source(path source) and widget sink(path sink)? >> >> Hi, >> >> What the commit does is to make sure that if a control is shared between >> multiple mixers/muxes to apply all the changes in the same update sequence. >> Instead of, as it was done before, to run a update sequence for each mixer/mux. > I understood this as you have clearly mentioned it with a nice > diagram. >> >>> >>> +------+ >>> A1 ------| | >>> | MUX1 |----- C1 >>> B1 ------| | >>> +------+ >>> | >>> control ---+ >>> | >>> +------+ >>> A2 ------| | >>> | MUX2 |----- C2 >>> B2 ------| | >>> +------+ >>> >>> Can I represent the above diagram as below: >>> >>> char *input_text_1[] = { >>> "A1", "B1" >>> }; >>> >>> struct soc_enum input_enum_1 = >>> SOC_ENUM_SINGLE(some_register, some_bit, >>> 2, input_text_1); >>> >>> char *input_text_2[] = { >>> "A2", "B2" >>> }; >>> struct soc_enum input_enum_2 = >>> SOC_ENUM_SINGLE(some_register, some_bit, >>> 2, input_text_2); >>> >>> >>> struct snd_kcontrol_new input_mux = >>> SOC_DAPM_ENUM("C1", input_enum_1); >>> struct snd_kcontrol_new input_mux = >>> SOC_DAPM_ENUM("C2", input_enum_2); >>> >>> dapm_route[] { >>> "A1", "control","C1" >>> "B1", "control","C1" >>> "A2", "control","C2" >>> "B2", "control","C2" >>> }; >> >> The control part needs to have the name of one of the enum items. So this >> would be { "A1", "A1", "C1" } and so on. > Yes makes sense as then only it will know > which widget to connect to as it has multiple > widgets. >> >> - Lars >> >> >> >> >>

1 0

[alsa-devel] [PATCH 0/5] A few HD-audio things for 3.14
by Takashi Iwai 26 Nov '13

26 Nov '13

Hi, here are a few patches that are targeted for 3.14. So they are not urgently needed, mostly clean ups, but also includes some runtime PM changes as we're discussing now. The patches are found in sound-unstable git tree test/hda branch, too. Takashi

2 8

Re: [alsa-devel] [alsa-cvslog] [ALSA GIT]ALSA utilities repository branch master updated. v1.0.27.2-14-gd2d9b6f
by Clemens Ladisch 26 Nov '13

26 Nov '13

GIT server wrote: > - Log ----------------------------------------------------------------- > commit d2d9b6fc8d20fca1e06fc261ac20fd6cfd8a8d1b > Author: Takashi Iwai <tiwai(a)suse.de> > Date: Tue Nov 26 11:44:40 2013 +0100 > > alsactl: Add monitor command > mask = snd_ctl_event_elem_get_mask(event); > if (mask & SND_CTL_EVENT_MASK_VALUE) > printf(" VALUE"); > if (mask & SND_CTL_EVENT_MASK_INFO) > printf(" INFO"); > if (mask & SND_CTL_EVENT_MASK_ADD) > printf(" ADD"); > if (mask & SND_CTL_EVENT_MASK_TLV) > printf(" TLV"); > if (mask == SND_CTL_EVENT_MASK_REMOVE) > printf(" REMOVE"); The documentation of SND_CTL_EVENT_MASK_REMOVE says: | Warning: test this first and if set don't test the other masks Regards, Clemens

2 1

[alsa-devel] HD-Audio: Is it okay to delay resuming codecs when resuming from S3?
by Lin, Mengdong 26 Nov '13

26 Nov '13

Hi Takashi, Is it okay to delay resuming codecs when resuming from S3? i.e. skip snd_hda_resume() in azx_resume()? This would reduce driver resume time from S3. And the codecs will be resumed when being used for the 1st time after S3. Resuming a codec may cost more than 100ms. So even if we parallel resuming codecs in snd_hda_resume(), driver resume time on some platforms is still a bit long. Regards Mengdong

2 3

[alsa-devel] [PATCH] ALSA: hda - Drop bus->avoid_link_reset flag
by Takashi Iwai 26 Nov '13

26 Nov '13

Use bus->power_keep_link_on instead. The controller shouldn't go to D3 when the link isn't reset, so essentially avoiding the link reset means avoiding the runtime PM. Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- sound/pci/hda/hda_codec.h | 1 - sound/pci/hda/hda_intel.c | 3 +-- sound/pci/hda/patch_sigmatel.c | 3 ++- 3 files changed, 3 insertions(+), 4 deletions(-) diff --git a/sound/pci/hda/hda_codec.h b/sound/pci/hda/hda_codec.h index 77db69480c19..7aa9870040c1 100644 --- a/sound/pci/hda/hda_codec.h +++ b/sound/pci/hda/hda_codec.h @@ -698,7 +698,6 @@ struct hda_bus { unsigned int in_reset:1; /* during reset operation */ unsigned int power_keep_link_on:1; /* don't power off HDA link */ unsigned int no_response_fallback:1; /* don't fallback at RIRB error */ - unsigned int avoid_link_reset:1; /* don't reset link at runtime PM */ int primary_dig_out_type; /* primary digital out PCM type */ }; diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index 7a09404579a7..c6d230193da6 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c @@ -2994,8 +2994,7 @@ static int azx_runtime_suspend(struct device *dev) STATESTS_INT_MASK); azx_stop_chip(chip); - if (!chip->bus->avoid_link_reset) - azx_enter_link_reset(chip); + azx_enter_link_reset(chip); azx_clear_irq_pending(chip); if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) hda_display_power(false); diff --git a/sound/pci/hda/patch_sigmatel.c b/sound/pci/hda/patch_sigmatel.c index d2cc0041d9d3..088a5afbd1b9 100644 --- a/sound/pci/hda/patch_sigmatel.c +++ b/sound/pci/hda/patch_sigmatel.c @@ -2094,7 +2094,8 @@ static void stac92hd83xxx_fixup_hp_mic_led(struct hda_codec *codec, if (action == HDA_FIXUP_ACT_PRE_PROBE) { spec->mic_mute_led_gpio = 0x08; /* GPIO3 */ - codec->bus->avoid_link_reset = 1; + /* resetting controller clears GPIO, so we need to keep on */ + codec->bus->power_keep_link_on = 1; } } -- 1.8.4.3

1 0

[alsa-devel] [PATCH v2 0/9] ASoC: fsl-ssi: offline/online configuration and cleanups
by Markus Pargmann 26 Nov '13

26 Nov '13

Hi, This patch series fixes some fsl-ssi code that does not act exactly as it is described in the reference manuals. The reference manuals before imx50 do mention that some register bits, including TDMAE/RDMAE, should not be changed while the SSI unit is enabled (SSIEN). At the same time the SDMA unit has a undefined request handling if there are DMA requests before the SDMA engine and its channel is configured. The reference manual states that SSI DMA requests are sent as soon as the FIFO and the DMAE bits are enabled. It does not mention a dependency to SCR's TE/RE bit. To avoid sending DMA requests before a channel is configured, we have to seperate the fsl-ssi behavior into offline and online configuration. SoCs before imx50 have to use offline configuration while later SoC versions can use online reconfiguration. This series adds support for online configuration and cleans up the configuration register code especially in fsl_ssi_trigger. At the end we have a seperation between enable/disable logic and the actual configuration register values used to enable/disable TX/RX. I tested this series on mx53. The series is based on Mark Brown's topic/fsl branch. Regards, Markus Changes in v2: - Enable fsl-ssi interrupts independent of CONFIG_DEBUG_FS. - Move irq mapping fix into seperate patch (was in "Move sysfs stats to debugfs") - Rebased on v3.13-rc1 topic/fsl branch. Changes in v1: - Not removing imx21-ssi from the compatible array in the DTS patch. - Dropped "ASoC: fsl-ssi: Drop AC97 debug register usage" for the moment as I don't have time to setup AC97 hardware for some tests Markus Pargmann (9): ASoC: fsl-ssi: Move sysfs stats to debugfs ASoC: fsl-ssi: Fix interrupt mapping and release ASoC: fsl-ssi: Add imx50-ssi and of_device_id matching ASoC: fsl-ssi: Add offline_config flag ASoC: fsl-ssi: Add configuration helper functions ASoC: fsl-ssi: Move RX/TX configuration to seperate functions ASoC: fsl-ssi: Drop ac97 specific trigger function ARM: DTS: imx5* imx6*, use imx50-ssi ASoC: fsl-ssi: Drop AC97 debug register usage arch/arm/boot/dts/imx51.dtsi | 10 +- arch/arm/boot/dts/imx53.dtsi | 10 +- arch/arm/boot/dts/imx6qdl.dtsi | 12 +- arch/arm/boot/dts/imx6sl.dtsi | 12 +- sound/soc/fsl/fsl_ssi.c | 521 +++++++++++++++++++++++++++-------------- 5 files changed, 371 insertions(+), 194 deletions(-) -- 1.8.4.2

2 11

[alsa-devel] [PATCH 1/2] ALSA: hda/realtek - Add support of ALC231 codec
by Takashi Iwai 26 Nov '13

26 Nov '13

From: Kailang Yang <kailang(a)realtek.com> It's compatible with ALC269. Signed-off-by: Kailang Yang <kailang(a)realtek.com> Cc: <stable(a)vger.kernel.org> Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- sound/pci/hda/patch_realtek.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index 5e42059f10a1..60973fd6eb82 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -5175,6 +5175,7 @@ static int patch_alc680(struct hda_codec *codec) */ static const struct hda_codec_preset snd_hda_preset_realtek[] = { { .id = 0x10ec0221, .name = "ALC221", .patch = patch_alc269 }, + { .id = 0x10ec0231, .name = "ALC231", .patch = patch_alc269 }, { .id = 0x10ec0233, .name = "ALC233", .patch = patch_alc269 }, { .id = 0x10ec0255, .name = "ALC255", .patch = patch_alc269 }, { .id = 0x10ec0260, .name = "ALC260", .patch = patch_alc260 }, -- 1.8.4.3

1 1

[alsa-devel] [PATCH] ALSA: cs46xx: Move DSP blob out of kernel tree
by Takashi Iwai 26 Nov '13

26 Nov '13

... and load from the external firmware files. The firmware binary blobs in cs46xx driver have been in a gray zone regarding the license. It's most likely should be OK, but still unclear. And, the size isn't that small, too. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=10750 Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- sound/pci/Kconfig | 1 + sound/pci/cs46xx/cs46xx.h | 5 + sound/pci/cs46xx/cs46xx_image.h | 3468 ------------------------------------ sound/pci/cs46xx/cs46xx_lib.c | 265 ++- sound/pci/cs46xx/imgs/cwc4630.h | 320 ---- sound/pci/cs46xx/imgs/cwcasync.h | 176 -- sound/pci/cs46xx/imgs/cwcbinhack.h | 48 - sound/pci/cs46xx/imgs/cwcdma.asp | 170 -- sound/pci/cs46xx/imgs/cwcdma.h | 68 - sound/pci/cs46xx/imgs/cwcsnoop.h | 46 - 10 files changed, 226 insertions(+), 4341 deletions(-) delete mode 100644 sound/pci/cs46xx/cs46xx_image.h delete mode 100644 sound/pci/cs46xx/imgs/cwc4630.h delete mode 100644 sound/pci/cs46xx/imgs/cwcasync.h delete mode 100644 sound/pci/cs46xx/imgs/cwcbinhack.h delete mode 100644 sound/pci/cs46xx/imgs/cwcdma.asp delete mode 100644 sound/pci/cs46xx/imgs/cwcdma.h delete mode 100644 sound/pci/cs46xx/imgs/cwcsnoop.h diff --git a/sound/pci/Kconfig b/sound/pci/Kconfig index 46ed9e8ae0fd..3a0504dfeb8a 100644 --- a/sound/pci/Kconfig +++ b/sound/pci/Kconfig @@ -254,6 +254,7 @@ config SND_CS46XX tristate "Cirrus Logic (Sound Fusion) CS4280/CS461x/CS462x/CS463x" select SND_RAWMIDI select SND_AC97_CODEC + select FW_LOADER help Say Y here to include support for Cirrus Logic CS4610/CS4612/ CS4614/CS4615/CS4622/CS4624/CS4630/CS4280 chips. diff --git a/sound/pci/cs46xx/cs46xx.h b/sound/pci/cs46xx/cs46xx.h index fc339ef0a0ae..c49a082c378b 100644 --- a/sound/pci/cs46xx/cs46xx.h +++ b/sound/pci/cs46xx/cs46xx.h @@ -1716,9 +1716,14 @@ struct snd_cs46xx { struct snd_pcm *pcm_rear; struct snd_pcm *pcm_center_lfe; struct snd_pcm *pcm_iec958; + +#define CS46XX_DSP_MODULES 5 + struct dsp_module_desc *modules[CS46XX_DSP_MODULES]; #else /* for compatibility */ struct snd_cs46xx_pcm *playback_pcm; unsigned int play_ctl; + + struct ba1_struct *ba1; #endif #ifdef CONFIG_PM_SLEEP diff --git a/sound/pci/cs46xx/cs46xx_image.h b/sound/pci/cs46xx/cs46xx_image.h deleted file mode 100644 index dc93f62db2c2..000000000000 diff --git a/sound/pci/cs46xx/cs46xx_lib.c b/sound/pci/cs46xx/cs46xx_lib.c index 1b66efd9b728..f18e5878f58b 100644 --- a/sound/pci/cs46xx/cs46xx_lib.c +++ b/sound/pci/cs46xx/cs46xx_lib.c @@ -54,7 +54,9 @@ #include <linux/gameport.h> #include <linux/mutex.h> #include <linux/export.h> - +#include <linux/module.h> +#include <linux/firmware.h> +#include <linux/vmalloc.h> #include <sound/core.h> #include <sound/control.h> @@ -330,13 +332,146 @@ int snd_cs46xx_download(struct snd_cs46xx *chip, return 0; } +static inline void memcpy_le32(void *dst, const void *src, unsigned int len) +{ +#ifdef __LITTLE_ENDIAN + memcpy(dst, src, len); +#else + u32 *_dst = dst; + const __le32 *_src = src; + len /= 4; + while (len-- > 0) + *_dst++ = le32_to_cpu(*_src++); +#endif +} + #ifdef CONFIG_SND_CS46XX_NEW_DSP -#include "imgs/cwc4630.h" -#include "imgs/cwcasync.h" -#include "imgs/cwcsnoop.h" -#include "imgs/cwcbinhack.h" -#include "imgs/cwcdma.h" +static const char *module_names[CS46XX_DSP_MODULES] = { + "cwc4630", "cwcasync", "cwcsnoop", "cwcbinhack", "cwcdma" +}; + +MODULE_FIRMWARE("cs46xx/cwc4630"); +MODULE_FIRMWARE("cs46xx/cwcasync"); +MODULE_FIRMWARE("cs46xx/cwcsnoop"); +MODULE_FIRMWARE("cs46xx/cwcbinhack"); +MODULE_FIRMWARE("cs46xx/cwcdma"); + +static void free_module_desc(struct dsp_module_desc *module) +{ + if (!module) + return; + kfree(module->module_name); + kfree(module->symbol_table.symbols); + if (module->segments) { + int i; + for (i = 0; i < module->nsegments; i++) + kfree(module->segments[i].data); + kfree(module->segments); + } +} + +/* firmware binary format: + * le32 nsymbols; + * struct { + * le32 address; + * char symbol_name[DSP_MAX_SYMBOL_NAME]; + * le32 symbol_type; + * } symbols[nsymbols]; + * le32 nsegments; + * struct { + * le32 segment_type; + * le32 offset; + * le32 size; + * le32 data[size]; + * } segments[nsegments]; + */ + +static int load_firmware(struct snd_cs46xx *chip, + struct dsp_module_desc **module_ret, + const char *fw_name) +{ + int i, err; + unsigned int nums, fwlen, fwsize; + const __le32 *fwdat; + struct dsp_module_desc *module = NULL; + const struct firmware *fw; + char fw_path[32]; + + sprintf(fw_path, "cs46xx/%s", fw_name); + err = request_firmware(&fw, fw_path, &chip->pci->dev); + if (err < 0) + return err; + fwsize = fw->size / 4; + if (fwsize < 2) { + err = -EINVAL; + goto error; + } + + err = -ENOMEM; + module = kzalloc(sizeof(*module), GFP_KERNEL); + if (!module) + goto error; + module->module_name = kstrdup(fw_name, GFP_KERNEL); + if (!module->module_name) + goto error; + + fwlen = 0; + fwdat = (const __le32 *)fw->data; + nums = module->symbol_table.nsymbols = le32_to_cpu(fwdat[fwlen++]); + if (nums >= 40) + goto error_inval; + module->symbol_table.symbols = + kcalloc(nums, sizeof(struct dsp_symbol_entry), GFP_KERNEL); + if (!module->symbol_table.symbols) + goto error; + for (i = 0; i < nums; i++) { + struct dsp_symbol_entry *entry = + &module->symbol_table.symbols[i]; + if (fwlen + 2 + DSP_MAX_SYMBOL_NAME / 4 > fwsize) + goto error_inval; + entry->address = le32_to_cpu(fwdat[fwlen++]); + memcpy(entry->symbol_name, &fwdat[fwlen], DSP_MAX_SYMBOL_NAME - 1); + fwlen += DSP_MAX_SYMBOL_NAME / 4; + entry->symbol_type = le32_to_cpu(fwdat[fwlen++]); + } + + if (fwlen >= fwsize) + goto error_inval; + nums = module->nsegments = le32_to_cpu(fwdat[fwlen++]); + if (nums > 10) + goto error_inval; + module->segments = + kcalloc(nums, sizeof(struct dsp_segment_desc), GFP_KERNEL); + if (!module->segments) + goto error; + for (i = 0; i < nums; i++) { + struct dsp_segment_desc *entry = &module->segments[i]; + if (fwlen + 3 > fwsize) + goto error_inval; + entry->segment_type = le32_to_cpu(fwdat[fwlen++]); + entry->offset = le32_to_cpu(fwdat[fwlen++]); + entry->size = le32_to_cpu(fwdat[fwlen++]); + if (fwlen + entry->size > fwsize) + goto error_inval; + entry->data = kmalloc(entry->size * 4, GFP_KERNEL); + if (!entry->data) + goto error; + memcpy_le32(entry->data, &fwdat[fwlen], entry->size * 4); + fwlen += entry->size; + } + + *module_ret = module; + release_firmware(fw); + return 0; + + error_inval: + err = -EINVAL; + error: + free_module_desc(module); + release_firmware(fw); + return err; +} int snd_cs46xx_clear_BA1(struct snd_cs46xx *chip, unsigned long offset, @@ -361,20 +496,63 @@ int snd_cs46xx_clear_BA1(struct snd_cs46xx *chip, #else /* old DSP image */ -#include "cs46xx_image.h" +struct ba1_struct { + struct { + u32 offset; + u32 size; + } memory[BA1_MEMORY_COUNT]; + u32 map[BA1_DWORD_SIZE]; +}; + +MODULE_FIRMWARE("cs46xx/ba1"); + +static int load_firmware(struct snd_cs46xx *chip) +{ + const struct firmware *fw; + int i, size, err; + + err = request_firmware(&fw, "cs46xx/ba1", &chip->pci->dev); + if (err < 0) + return err; + if (fw->size != sizeof(*chip->ba1)) { + err = -EINVAL; + goto error; + } + + chip->ba1 = vmalloc(sizeof(*chip->ba1)); + if (!chip->ba1) { + err = -ENOMEM; + goto error; + } + + memcpy_le32(chip->ba1, fw->data, sizeof(*chip->ba1)); + + /* sanity check */ + size = 0; + for (i = 0; i < BA1_MEMORY_COUNT; i++) + size += chip->ba1->memory[i].size; + if (size > BA1_DWORD_SIZE * 4) + err = -EINVAL; + + error: + release_firmware(fw); + return err; +} int snd_cs46xx_download_image(struct snd_cs46xx *chip) { int idx, err; - unsigned long offset = 0; + unsigned int offset = 0; + struct ba1_struct *ba1 = chip->ba1; for (idx = 0; idx < BA1_MEMORY_COUNT; idx++) { - if ((err = snd_cs46xx_download(chip, - &BA1Struct.map[offset], - BA1Struct.memory[idx].offset, - BA1Struct.memory[idx].size)) < 0) + err = snd_cs46xx_download(chip, + &ba1->map[offset], + ba1->memory[idx].offset, + ba1->memory[idx].size); + if (err < 0) return err; - offset += BA1Struct.memory[idx].size >> 2; + offset += ba1->memory[idx].size >> 2; } return 0; } @@ -2798,6 +2976,10 @@ static int snd_cs46xx_free(struct snd_cs46xx *chip) cs46xx_dsp_spos_destroy(chip); chip->dsp_spos_instance = NULL; } + for (idx = 0; idx < CS46XX_DSP_MODULES; idx++) + free_module_desc(chip->modules[idx]); +#else + vfree(chip->ba1); #endif #ifdef CONFIG_PM_SLEEP @@ -3067,6 +3249,11 @@ static void cs46xx_enable_stream_irqs(struct snd_cs46xx *chip) int snd_cs46xx_start_dsp(struct snd_cs46xx *chip) { unsigned int tmp; +#ifdef CONFIG_SND_CS46XX_NEW_DSP + int i; +#endif + int err; + /* * Reset the processor. */ @@ -3075,45 +3262,33 @@ int snd_cs46xx_start_dsp(struct snd_cs46xx *chip) * Download the image to the processor. */ #ifdef CONFIG_SND_CS46XX_NEW_DSP -#if 0 - if (cs46xx_dsp_load_module(chip, &cwcemb80_module) < 0) { - snd_printk(KERN_ERR "image download error\n"); - return -EIO; - } -#endif - - if (cs46xx_dsp_load_module(chip, &cwc4630_module) < 0) { - snd_printk(KERN_ERR "image download error [cwc4630]\n"); - return -EIO; - } - - if (cs46xx_dsp_load_module(chip, &cwcasync_module) < 0) { - snd_printk(KERN_ERR "image download error [cwcasync]\n"); - return -EIO; - } - - if (cs46xx_dsp_load_module(chip, &cwcsnoop_module) < 0) { - snd_printk(KERN_ERR "image download error [cwcsnoop]\n"); - return -EIO; - } - - if (cs46xx_dsp_load_module(chip, &cwcbinhack_module) < 0) { - snd_printk(KERN_ERR "image download error [cwcbinhack]\n"); - return -EIO; - } - - if (cs46xx_dsp_load_module(chip, &cwcdma_module) < 0) { - snd_printk(KERN_ERR "image download error [cwcdma]\n"); - return -EIO; + for (i = 0; i < CS46XX_DSP_MODULES; i++) { + err = load_firmware(chip, &chip->modules[i], module_names[i]); + if (err < 0) { + snd_printk(KERN_ERR "firmware load error [%s]\n", + module_names[i]); + return err; + } + err = cs46xx_dsp_load_module(chip, chip->modules[i]); + if (err < 0) { + snd_printk(KERN_ERR "image download error [%s]\n", + module_names[i]); + return err; + } } if (cs46xx_dsp_scb_and_task_init(chip) < 0) return -EIO; #else + err = load_firmware(chip); + if (err < 0) + return err; + /* old image */ - if (snd_cs46xx_download_image(chip) < 0) { + err = snd_cs46xx_download_image(chip); + if (err < 0) { snd_printk(KERN_ERR "image download error\n"); - return -EIO; + return err; } /* diff --git a/sound/pci/cs46xx/imgs/cwc4630.h b/sound/pci/cs46xx/imgs/cwc4630.h deleted file mode 100644 index 37c4f1318dc5..000000000000 diff --git a/sound/pci/cs46xx/imgs/cwcasync.h b/sound/pci/cs46xx/imgs/cwcasync.h deleted file mode 100644 index 70e63e13c2b3..000000000000 diff --git a/sound/pci/cs46xx/imgs/cwcbinhack.h b/sound/pci/cs46xx/imgs/cwcbinhack.h deleted file mode 100644 index f4d93689cd49..000000000000 diff --git a/sound/pci/cs46xx/imgs/cwcdma.asp b/sound/pci/cs46xx/imgs/cwcdma.asp deleted file mode 100644 index a65e1193c89a..000000000000 diff --git a/sound/pci/cs46xx/imgs/cwcdma.h b/sound/pci/cs46xx/imgs/cwcdma.h deleted file mode 100644 index 7ff0d4587161..000000000000 diff --git a/sound/pci/cs46xx/imgs/cwcsnoop.h b/sound/pci/cs46xx/imgs/cwcsnoop.h deleted file mode 100644 index 6929d0a5a3f3..000000000000 -- 1.8.4.3

1 0

[alsa-devel] [PATCH 1/6] ASoC: Add resource managed snd_dmaengine_pcm_register()
by Lars-Peter Clausen 25 Nov '13

25 Nov '13

For many drivers using the generic dmaengine PCM driver one of the few (or the only) things left to do in the drivers remove function is to unregister the PCM device. This patch adds a resource managed version of snd_dmaengine_pcm_register() which makes it possible to simplify the remove function as well as the error path in the probe function for those drivers. Signed-off-by: Lars-Peter Clausen <lars(a)metafoo.de> --- include/sound/dmaengine_pcm.h | 4 ++++ sound/soc/soc-generic-dmaengine-pcm.c | 36 +++++++++++++++++++++++++++++++++++ 2 files changed, 40 insertions(+) diff --git a/include/sound/dmaengine_pcm.h b/include/sound/dmaengine_pcm.h index 1501731..4ef986c 100644 --- a/include/sound/dmaengine_pcm.h +++ b/include/sound/dmaengine_pcm.h @@ -140,6 +140,10 @@ int snd_dmaengine_pcm_register(struct device *dev, unsigned int flags); void snd_dmaengine_pcm_unregister(struct device *dev); +int devm_snd_dmaengine_pcm_register(struct device *dev, + const struct snd_dmaengine_pcm_config *config, + unsigned int flags); + int snd_dmaengine_pcm_prepare_slave_config(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct dma_slave_config *slave_config); diff --git a/sound/soc/soc-generic-dmaengine-pcm.c b/sound/soc/soc-generic-dmaengine-pcm.c index cbc9c96..20690c0 100644 --- a/sound/soc/soc-generic-dmaengine-pcm.c +++ b/sound/soc/soc-generic-dmaengine-pcm.c @@ -366,4 +366,40 @@ void snd_dmaengine_pcm_unregister(struct device *dev) } EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_unregister); +static void devm_dmaengine_pcm_release(struct device *dev, void *res) +{ + snd_dmaengine_pcm_unregister(*(struct device **)res); +} + +/** + * devm_snd_dmaengine_pcm_register - resource managed dmaengine PCM registration + * @dev: The parent device for the PCM device + * @config: Platform specific PCM configuration + * @flags: Platform specific quirks + * + * Register a dmaengine based PCM device with automatic unregistration when the + * device is unregistered. + */ +int devm_snd_dmaengine_pcm_register(struct device *dev, + const struct snd_dmaengine_pcm_config *config, unsigned int flags) +{ + struct device **ptr; + int ret; + + ptr = devres_alloc(devm_dmaengine_pcm_release, sizeof(*ptr), GFP_KERNEL); + if (!ptr) + return -ENOMEM; + + ret = snd_dmaengine_pcm_register(dev, config, flags); + if (ret == 0) { + *ptr = dev; + devres_add(dev, ptr); + } else { + devres_free(ptr); + } + + return ret; +} +EXPORT_SYMBOL_GPL(devm_snd_dmaengine_pcm_register); + MODULE_LICENSE("GPL"); -- 1.8.0

4 13

[alsa-devel] ASOC: stream widget created two times
by Arnaud POULIQUEN 25 Nov '13

25 Nov '13

Hello, I 'm newbie on asoc dev. I'm trying to develop a driver based on dynamic PCM implementation with backend and frontend. I'm working on 3.10 I have declared a FE : { .name = "MMDL0", .stream_name = "MM DL0 Frontend", .cpu_dai_name = "mm_dl0", .codec_name = "snd-soc-dummy", .codec_dai_name = "snd-soc-dummy-dai", .dynamic=1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_pmdown_time = 1, /* Power down without delay */ .init = sti_dummy_init, }, CPU DAI associated: static struct snd_soc_dai_driver sti_frontend_cpu_dais[] = { { .name = "mm_dl0", .playback = { .stream_name = "MM_DL0", .channels_min = 1, .channels_max = 8, .rates = SNDRV_PCM_RATE_48000, .formats = SNDRV_PCM_FMTBIT_S16_LE }, .probe = sti_frontend_dai_probe, .probe_order = SND_SOC_COMP_ORDER_FIRST, }, } Platform is declared using platform_of_node using DTS. I have also declared a BE and the route that links the FE cpu dai widget with the BE codec dai widget. My concern is that MM_DL0 widget is created 2 times. One time in soc_probe_link_dais and one time in soc_probe_platform. After analysis it seems that this occurs because my cpu dai is registered in platform device. In this case the condition if (dai->dev != platform->dev) in soc_probe_platform is false, so dai widget is created a second time. So I would like to know if this is a normal behavior and I have to create a specific device to register my cpu_dai? Thanks in advance for your answers BR Arnaud

2 1

[alsa-devel] [PATCHv5] ASoC: Add support for BCM2835
by Florian Meier 25 Nov '13

25 Nov '13

This driver adds support for digital audio (I2S) for the BCM2835 SoC that is used by the Raspberry Pi. External audio codecs can be connected to the Raspberry Pi via P5 header. It relies on cyclic DMA engine support for BCM2835. Signed-off-by: Florian Meier <florian.meier(a)koalo.de> --- - Uses devm_snd_soc_register_component now - Fixes error handling in probe .../devicetree/bindings/sound/bcm2835-i2s.txt | 25 + sound/soc/Kconfig | 1 + sound/soc/Makefile | 1 + sound/soc/bcm/Kconfig | 10 + sound/soc/bcm/Makefile | 5 + sound/soc/bcm/bcm2835-i2s.c | 886 ++++++++++++++++++++ 6 files changed, 928 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/bcm2835-i2s.txt create mode 100644 sound/soc/bcm/Kconfig create mode 100644 sound/soc/bcm/Makefile create mode 100644 sound/soc/bcm/bcm2835-i2s.c diff --git a/Documentation/devicetree/bindings/sound/bcm2835-i2s.txt b/Documentation/devicetree/bindings/sound/bcm2835-i2s.txt new file mode 100644 index 0000000..65783de --- /dev/null +++ b/Documentation/devicetree/bindings/sound/bcm2835-i2s.txt @@ -0,0 +1,25 @@ +* Broadcom BCM2835 SoC I2S/PCM module + +Required properties: +- compatible: "brcm,bcm2835-i2s" +- reg: A list of base address and size entries: + * The first entry should cover the PCM registers + * The second entry should cover the PCM clock registers +- dmas: List of DMA controller phandle and DMA request line ordered pairs. +- dma-names: Identifier string for each DMA request line in the dmas property. + These strings correspond 1:1 with the ordered pairs in dmas. + + One of the DMA channels will be responsible for transmission (should be + named "tx") and one for reception (should be named "rx"). + +Example: + +bcm2835_i2s: i2s@7e203000 { + compatible = "brcm,bcm2835-i2s"; + reg = <0x7e203000 0x20>, + <0x7e101098 0x02>; + + dmas = <&dma 2>, + <&dma 3>; + dma-names = "tx", "rx"; +}; diff --git a/sound/soc/Kconfig b/sound/soc/Kconfig index 5138b84..a5e3a70 100644 --- a/sound/soc/Kconfig +++ b/sound/soc/Kconfig @@ -33,6 +33,7 @@ config SND_SOC_GENERIC_DMAENGINE_PCM # All the supported SoCs source "sound/soc/atmel/Kconfig" source "sound/soc/au1x/Kconfig" +source "sound/soc/bcm/Kconfig" source "sound/soc/blackfin/Kconfig" source "sound/soc/cirrus/Kconfig" source "sound/soc/davinci/Kconfig" diff --git a/sound/soc/Makefile b/sound/soc/Makefile index 8b9e701..b52d4aa 100644 --- a/sound/soc/Makefile +++ b/sound/soc/Makefile @@ -10,6 +10,7 @@ obj-$(CONFIG_SND_SOC) += codecs/ obj-$(CONFIG_SND_SOC) += generic/ obj-$(CONFIG_SND_SOC) += atmel/ obj-$(CONFIG_SND_SOC) += au1x/ +obj-$(CONFIG_SND_SOC) += bcm/ obj-$(CONFIG_SND_SOC) += blackfin/ obj-$(CONFIG_SND_SOC) += cirrus/ obj-$(CONFIG_SND_SOC) += davinci/ diff --git a/sound/soc/bcm/Kconfig b/sound/soc/bcm/Kconfig new file mode 100644 index 0000000..3d82a29 --- /dev/null +++ b/sound/soc/bcm/Kconfig @@ -0,0 +1,10 @@ +config SND_BCM2835_SOC_I2S + tristate "SoC Audio support for the Broadcom BCM2835 I2S module" + depends on ARCH_BCM2835 || COMPILE_TEST + select SND_SOC_DMAENGINE_PCM + select SND_SOC_GENERIC_DMAENGINE_PCM + select REGMAP_MMIO + help + Say Y or M if you want to add support for codecs attached to + the BCM2835 I2S interface. You will also need + to select the audio interfaces to support below. diff --git a/sound/soc/bcm/Makefile b/sound/soc/bcm/Makefile new file mode 100644 index 0000000..bc816b7 --- /dev/null +++ b/sound/soc/bcm/Makefile @@ -0,0 +1,5 @@ +# BCM2835 Platform Support +snd-soc-bcm2835-i2s-objs := bcm2835-i2s.o + +obj-$(CONFIG_SND_BCM2835_SOC_I2S) += snd-soc-bcm2835-i2s.o + diff --git a/sound/soc/bcm/bcm2835-i2s.c b/sound/soc/bcm/bcm2835-i2s.c new file mode 100644 index 0000000..f49b007 --- /dev/null +++ b/sound/soc/bcm/bcm2835-i2s.c @@ -0,0 +1,886 @@ +/* + * ALSA SoC I2S Audio Layer for Broadcom BCM2835 SoC + * + * Author: Florian Meier <florian.meier(a)koalo.de> + * Copyright 2013 + * + * Based on + * Raspberry Pi PCM I2S ALSA Driver + * Copyright (c) by Phil Poole 2013 + * + * ALSA SoC I2S (McBSP) Audio Layer for TI DAVINCI processor + * Vladimir Barinov, <vbarinov(a)embeddedalley.com> + * Copyright (C) 2007 MontaVista Software, Inc., <source(a)mvista.com> + * + * OMAP ALSA SoC DAI driver using McBSP port + * Copyright (C) 2008 Nokia Corporation + * Contact: Jarkko Nikula <jarkko.nikula(a)bitmer.com> + * Peter Ujfalusi <peter.ujfalusi(a)ti.com> + * + * Freescale SSI ALSA SoC Digital Audio Interface (DAI) driver + * Author: Timur Tabi <timur(a)freescale.com> + * Copyright 2007-2010 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + */ + +#include <linux/init.h> +#include <linux/module.h> +#include <linux/device.h> +#include <linux/slab.h> +#include <linux/delay.h> +#include <linux/io.h> +#include <linux/clk.h> + +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/initval.h> +#include <sound/soc.h> +#include <sound/dmaengine_pcm.h> + +/* Clock registers */ +#define BCM2835_CLK_PCMCTL_REG 0x00 +#define BCM2835_CLK_PCMDIV_REG 0x04 + +/* Clock register settings */ +#define BCM2835_CLK_PASSWD (0x5a000000) +#define BCM2835_CLK_PASSWD_MASK (0xff000000) +#define BCM2835_CLK_MASH(v) ((v) << 9) +#define BCM2835_CLK_FLIP BIT(8) +#define BCM2835_CLK_BUSY BIT(7) +#define BCM2835_CLK_KILL BIT(5) +#define BCM2835_CLK_ENAB BIT(4) +#define BCM2835_CLK_SRC(v) (v) + +#define BCM2835_CLK_SHIFT (12) +#define BCM2835_CLK_DIVI(v) ((v) << BCM2835_CLK_SHIFT) +#define BCM2835_CLK_DIVF(v) (v) +#define BCM2835_CLK_DIVF_MASK (0xFFF) + +enum { + BCM2835_CLK_MASH_0 = 0, + BCM2835_CLK_MASH_1, + BCM2835_CLK_MASH_2, + BCM2835_CLK_MASH_3, +}; + +enum { + BCM2835_CLK_SRC_GND = 0, + BCM2835_CLK_SRC_OSC, + BCM2835_CLK_SRC_DBG0, + BCM2835_CLK_SRC_DBG1, + BCM2835_CLK_SRC_PLLA, + BCM2835_CLK_SRC_PLLC, + BCM2835_CLK_SRC_PLLD, + BCM2835_CLK_SRC_HDMI, +}; + +/* Most clocks are not useable (freq = 0) */ +static const unsigned int bcm2835_clk_freq[BCM2835_CLK_SRC_HDMI+1] = { + [BCM2835_CLK_SRC_GND] = 0, + [BCM2835_CLK_SRC_OSC] = 19200000, + [BCM2835_CLK_SRC_DBG0] = 0, + [BCM2835_CLK_SRC_DBG1] = 0, + [BCM2835_CLK_SRC_PLLA] = 0, + [BCM2835_CLK_SRC_PLLC] = 0, + [BCM2835_CLK_SRC_PLLD] = 500000000, + [BCM2835_CLK_SRC_HDMI] = 0, +}; + +/* I2S registers */ +#define BCM2835_I2S_CS_A_REG 0x00 +#define BCM2835_I2S_FIFO_A_REG 0x04 +#define BCM2835_I2S_MODE_A_REG 0x08 +#define BCM2835_I2S_RXC_A_REG 0x0c +#define BCM2835_I2S_TXC_A_REG 0x10 +#define BCM2835_I2S_DREQ_A_REG 0x14 +#define BCM2835_I2S_INTEN_A_REG 0x18 +#define BCM2835_I2S_INTSTC_A_REG 0x1c +#define BCM2835_I2S_GRAY_REG 0x20 + +/* I2S register settings */ +#define BCM2835_I2S_STBY BIT(25) +#define BCM2835_I2S_SYNC BIT(24) +#define BCM2835_I2S_RXSEX BIT(23) +#define BCM2835_I2S_RXF BIT(22) +#define BCM2835_I2S_TXE BIT(21) +#define BCM2835_I2S_RXD BIT(20) +#define BCM2835_I2S_TXD BIT(19) +#define BCM2835_I2S_RXR BIT(18) +#define BCM2835_I2S_TXW BIT(17) +#define BCM2835_I2S_CS_RXERR BIT(16) +#define BCM2835_I2S_CS_TXERR BIT(15) +#define BCM2835_I2S_RXSYNC BIT(14) +#define BCM2835_I2S_TXSYNC BIT(13) +#define BCM2835_I2S_DMAEN BIT(9) +#define BCM2835_I2S_RXTHR(v) ((v) << 7) +#define BCM2835_I2S_TXTHR(v) ((v) << 5) +#define BCM2835_I2S_RXCLR BIT(4) +#define BCM2835_I2S_TXCLR BIT(3) +#define BCM2835_I2S_TXON BIT(2) +#define BCM2835_I2S_RXON BIT(1) +#define BCM2835_I2S_EN (1) + +#define BCM2835_I2S_CLKDIS BIT(28) +#define BCM2835_I2S_PDMN BIT(27) +#define BCM2835_I2S_PDME BIT(26) +#define BCM2835_I2S_FRXP BIT(25) +#define BCM2835_I2S_FTXP BIT(24) +#define BCM2835_I2S_CLKM BIT(23) +#define BCM2835_I2S_CLKI BIT(22) +#define BCM2835_I2S_FSM BIT(21) +#define BCM2835_I2S_FSI BIT(20) +#define BCM2835_I2S_FLEN(v) ((v) << 10) +#define BCM2835_I2S_FSLEN(v) (v) + +#define BCM2835_I2S_CHWEX BIT(15) +#define BCM2835_I2S_CHEN BIT(14) +#define BCM2835_I2S_CHPOS(v) ((v) << 4) +#define BCM2835_I2S_CHWID(v) (v) +#define BCM2835_I2S_CH1(v) ((v) << 16) +#define BCM2835_I2S_CH2(v) (v) + +#define BCM2835_I2S_TX_PANIC(v) ((v) << 24) +#define BCM2835_I2S_RX_PANIC(v) ((v) << 16) +#define BCM2835_I2S_TX(v) ((v) << 8) +#define BCM2835_I2S_RX(v) (v) + +#define BCM2835_I2S_INT_RXERR BIT(3) +#define BCM2835_I2S_INT_TXERR BIT(2) +#define BCM2835_I2S_INT_RXR BIT(1) +#define BCM2835_I2S_INT_TXW BIT(0) + +/* I2S DMA interface */ +/* FIXME: Needs IOMMU support */ +#define BCM2835_VCMMU_SHIFT (0x7E000000 - 0x20000000) + +/* General device struct */ +struct bcm2835_i2s_dev { + struct device *dev; + struct snd_dmaengine_dai_dma_data dma_data[2]; + unsigned int fmt; + unsigned int bclk_ratio; + + struct regmap *i2s_regmap; + struct regmap *clk_regmap; +}; + +static void bcm2835_i2s_start_clock(struct bcm2835_i2s_dev *dev) +{ + /* Start the clock if in master mode */ + unsigned int master = dev->fmt & SND_SOC_DAIFMT_MASTER_MASK; + + switch (master) { + case SND_SOC_DAIFMT_CBS_CFS: + case SND_SOC_DAIFMT_CBS_CFM: + regmap_update_bits(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, + BCM2835_CLK_PASSWD_MASK | BCM2835_CLK_ENAB, + BCM2835_CLK_PASSWD | BCM2835_CLK_ENAB); + break; + default: + break; + } +} + +static void bcm2835_i2s_stop_clock(struct bcm2835_i2s_dev *dev) +{ + uint32_t clkreg; + int timeout = 1000; + + /* Stop clock */ + regmap_update_bits(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, + BCM2835_CLK_PASSWD_MASK | BCM2835_CLK_ENAB, + BCM2835_CLK_PASSWD); + + /* Wait for the BUSY flag going down */ + while (--timeout) { + regmap_read(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, &clkreg); + if (!(clkreg & BCM2835_CLK_BUSY)) + break; + } + + if (!timeout) { + /* KILL the clock */ + dev_err(dev->dev, "I2S clock didn't stop. Kill the clock!\n"); + regmap_update_bits(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, + BCM2835_CLK_KILL | BCM2835_CLK_PASSWD_MASK, + BCM2835_CLK_KILL | BCM2835_CLK_PASSWD); + } +} + +static void bcm2835_i2s_clear_fifos(struct bcm2835_i2s_dev *dev, + bool tx, bool rx) +{ + int timeout = 1000; + uint32_t syncval; + uint32_t csreg; + uint32_t i2s_active_state; + uint32_t clkreg; + uint32_t clk_active_state; + uint32_t off; + uint32_t clr; + + off = tx ? BCM2835_I2S_TXON : 0; + off |= rx ? BCM2835_I2S_RXON : 0; + + clr = tx ? BCM2835_I2S_TXCLR : 0; + clr |= rx ? BCM2835_I2S_RXCLR : 0; + + /* Backup the current state */ + regmap_read(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, &csreg); + i2s_active_state = csreg & (BCM2835_I2S_RXON | BCM2835_I2S_TXON); + + regmap_read(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, &clkreg); + clk_active_state = clkreg & BCM2835_CLK_ENAB; + + /* Start clock if not running */ + if (!clk_active_state) { + regmap_update_bits(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, + BCM2835_CLK_PASSWD_MASK | BCM2835_CLK_ENAB, + BCM2835_CLK_PASSWD | BCM2835_CLK_ENAB); + } + + /* Stop I2S module */ + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, off, 0); + + /* + * Clear the FIFOs + * Requires at least 2 PCM clock cycles to take effect + */ + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, clr, clr); + + /* Wait for 2 PCM clock cycles */ + + /* + * Toggle the SYNC flag. After 2 PCM clock cycles it can be read back + * FIXME: This does not seem to work for slave mode! + */ + regmap_read(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, &syncval); + syncval &= BCM2835_I2S_SYNC; + + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, + BCM2835_I2S_SYNC, ~syncval); + + /* Wait for the SYNC flag changing it's state */ + while (--timeout) { + regmap_read(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, &csreg); + if ((csreg & BCM2835_I2S_SYNC) != syncval) + break; + } + + if (!timeout) + dev_err(dev->dev, "I2S SYNC error!\n"); + + /* Stop clock if it was not running before */ + if (!clk_active_state) + bcm2835_i2s_stop_clock(dev); + + /* Restore I2S state */ + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, + BCM2835_I2S_RXON | BCM2835_I2S_TXON, i2s_active_state); +} + +static int bcm2835_i2s_set_dai_fmt(struct snd_soc_dai *dai, + unsigned int fmt) +{ + struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); + dev->fmt = fmt; + return 0; +} + +static int bcm2835_i2s_set_dai_bclk_ratio(struct snd_soc_dai *dai, + unsigned int ratio) +{ + struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); + dev->bclk_ratio = ratio; + return 0; +} + +static int bcm2835_i2s_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); + + unsigned int sampling_rate = params_rate(params); + unsigned int data_length, data_delay, bclk_ratio; + unsigned int ch1pos, ch2pos, mode, format; + unsigned int mash = BCM2835_CLK_MASH_1; + unsigned int divi, divf, target_frequency; + int clk_src = -1; + unsigned int master = dev->fmt & SND_SOC_DAIFMT_MASTER_MASK; + bool bit_master = (master == SND_SOC_DAIFMT_CBS_CFS + || master == SND_SOC_DAIFMT_CBS_CFM); + + bool frame_master = (master == SND_SOC_DAIFMT_CBS_CFS + || master == SND_SOC_DAIFMT_CBM_CFS); + uint32_t csreg; + + /* + * If a stream is already enabled, + * the registers are already set properly. + */ + regmap_read(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, &csreg); + + if (csreg & (BCM2835_I2S_TXON | BCM2835_I2S_RXON)) + return 0; + + /* + * Adjust the data length according to the format. + * We prefill the half frame length with an integer + * divider of 2400 as explained at the clock settings. + * Maybe it is overwritten there, if the Integer mode + * does not apply. + */ + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_S16_LE: + data_length = 16; + bclk_ratio = 40; + break; + case SNDRV_PCM_FORMAT_S32_LE: + data_length = 32; + bclk_ratio = 80; + break; + default: + return -EINVAL; + } + + /* If bclk_ratio already set, use that one. */ + if (dev->bclk_ratio) + bclk_ratio = dev->bclk_ratio; + + /* + * Clock Settings + * + * The target frequency of the bit clock is + * sampling rate * frame length + * + * Integer mode: + * Sampling rates that are multiples of 8000 kHz + * can be driven by the oscillator of 19.2 MHz + * with an integer divider as long as the frame length + * is an integer divider of 19200000/8000=2400 as set up above. + * This is no longer possible if the sampling rate + * is too high (e.g. 192 kHz), because the oscillator is too slow. + * + * MASH mode: + * For all other sampling rates, it is not possible to + * have an integer divider. Approximate the clock + * with the MASH module that induces a slight frequency + * variance. To minimize that it is best to have the fastest + * clock here. That is PLLD with 500 MHz. + */ + target_frequency = sampling_rate * bclk_ratio; + clk_src = BCM2835_CLK_SRC_OSC; + mash = BCM2835_CLK_MASH_0; + + if (bcm2835_clk_freq[clk_src] % target_frequency == 0 + && bit_master && frame_master) { + divi = bcm2835_clk_freq[clk_src] / target_frequency; + divf = 0; + } else { + uint64_t dividend; + + if (!dev->bclk_ratio) { + /* + * Overwrite bclk_ratio, because the + * above trick is not needed or can + * not be used. + */ + bclk_ratio = 2 * data_length; + } + + target_frequency = sampling_rate * bclk_ratio; + + clk_src = BCM2835_CLK_SRC_PLLD; + mash = BCM2835_CLK_MASH_1; + + dividend = bcm2835_clk_freq[clk_src]; + dividend <<= BCM2835_CLK_SHIFT; + do_div(dividend, target_frequency); + divi = dividend >> BCM2835_CLK_SHIFT; + divf = dividend & BCM2835_CLK_DIVF_MASK; + } + + /* Set clock divider */ + regmap_write(dev->clk_regmap, BCM2835_CLK_PCMDIV_REG, BCM2835_CLK_PASSWD + | BCM2835_CLK_DIVI(divi) + | BCM2835_CLK_DIVF(divf)); + + /* Setup clock, but don't start it yet */ + regmap_write(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, BCM2835_CLK_PASSWD + | BCM2835_CLK_MASH(mash) + | BCM2835_CLK_SRC(clk_src)); + + /* Setup the frame format */ + format = BCM2835_I2S_CHEN; + + if (data_length > 24) + format |= BCM2835_I2S_CHWEX; + + format |= BCM2835_I2S_CHWID((data_length-8)&0xf); + + switch (dev->fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + data_delay = 1; + break; + default: + /* + * TODO + * Others are possible but are not implemented at the moment. + */ + dev_err(dev->dev, "%s:bad format\n", __func__); + return -EINVAL; + } + + ch1pos = data_delay; + ch2pos = bclk_ratio / 2 + data_delay; + + switch (params_channels(params)) { + case 2: + format = BCM2835_I2S_CH1(format) | BCM2835_I2S_CH2(format); + format |= BCM2835_I2S_CH1(BCM2835_I2S_CHPOS(ch1pos)); + format |= BCM2835_I2S_CH2(BCM2835_I2S_CHPOS(ch2pos)); + break; + default: + return -EINVAL; + } + + /* + * Set format for both streams. + * We cannot set another frame length + * (and therefore word length) anyway, + * so the format will be the same. + */ + regmap_write(dev->i2s_regmap, BCM2835_I2S_RXC_A_REG, format); + regmap_write(dev->i2s_regmap, BCM2835_I2S_TXC_A_REG, format); + + /* Setup the I2S mode */ + mode = 0; + + if (data_length <= 16) { + /* + * Use frame packed mode (2 channels per 32 bit word) + * We cannot set another frame length in the second stream + * (and therefore word length) anyway, + * so the format will be the same. + */ + mode |= BCM2835_I2S_FTXP | BCM2835_I2S_FRXP; + } + + mode |= BCM2835_I2S_FLEN(bclk_ratio - 1); + mode |= BCM2835_I2S_FSLEN(bclk_ratio / 2); + + /* Master or slave? */ + switch (dev->fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBS_CFS: + /* CPU is master */ + break; + case SND_SOC_DAIFMT_CBM_CFS: + /* + * CODEC is bit clock master + * CPU is frame master + */ + mode |= BCM2835_I2S_CLKM; + break; + case SND_SOC_DAIFMT_CBS_CFM: + /* + * CODEC is frame master + * CPU is bit clock master + */ + mode |= BCM2835_I2S_FSM; + break; + case SND_SOC_DAIFMT_CBM_CFM: + /* CODEC is master */ + mode |= BCM2835_I2S_CLKM; + mode |= BCM2835_I2S_FSM; + break; + default: + dev_err(dev->dev, "%s:bad master\n", __func__); + return -EINVAL; + } + + /* + * Invert clocks? + * + * The BCM approach seems to be inverted to the classical I2S approach. + */ + switch (dev->fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + /* None. Therefore, both for BCM */ + mode |= BCM2835_I2S_CLKI; + mode |= BCM2835_I2S_FSI; + break; + case SND_SOC_DAIFMT_IB_IF: + /* Both. Therefore, none for BCM */ + break; + case SND_SOC_DAIFMT_NB_IF: + /* + * Invert only frame sync. Therefore, + * invert only bit clock for BCM + */ + mode |= BCM2835_I2S_CLKI; + break; + case SND_SOC_DAIFMT_IB_NF: + /* + * Invert only bit clock. Therefore, + * invert only frame sync for BCM + */ + mode |= BCM2835_I2S_FSI; + break; + default: + return -EINVAL; + } + + regmap_write(dev->i2s_regmap, BCM2835_I2S_MODE_A_REG, mode); + + /* Setup the DMA parameters */ + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, + BCM2835_I2S_RXTHR(1) + | BCM2835_I2S_TXTHR(1) + | BCM2835_I2S_DMAEN, 0xffffffff); + + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_DREQ_A_REG, + BCM2835_I2S_TX_PANIC(0x10) + | BCM2835_I2S_RX_PANIC(0x30) + | BCM2835_I2S_TX(0x30) + | BCM2835_I2S_RX(0x20), 0xffffffff); + + /* Clear FIFOs */ + bcm2835_i2s_clear_fifos(dev, true, true); + + return 0; +} + +static int bcm2835_i2s_prepare(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); + uint32_t cs_reg; + + bcm2835_i2s_start_clock(dev); + + /* + * Clear both FIFOs if the one that should be started + * is not empty at the moment. This should only happen + * after overrun. Otherwise, hw_params would have cleared + * the FIFO. + */ + regmap_read(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, &cs_reg); + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK + && !(cs_reg & BCM2835_I2S_TXE)) + bcm2835_i2s_clear_fifos(dev, true, false); + else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE + && (cs_reg & BCM2835_I2S_RXD)) + bcm2835_i2s_clear_fifos(dev, false, true); + + return 0; +} + +static void bcm2835_i2s_stop(struct bcm2835_i2s_dev *dev, + struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + uint32_t mask; + + if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) + mask = BCM2835_I2S_RXON; + else + mask = BCM2835_I2S_TXON; + + regmap_update_bits(dev->i2s_regmap, + BCM2835_I2S_CS_A_REG, mask, 0); + + /* Stop also the clock when not SND_SOC_DAIFMT_CONT */ + if (!dai->active && !(dev->fmt & SND_SOC_DAIFMT_CONT)) + bcm2835_i2s_stop_clock(dev); +} + +static int bcm2835_i2s_trigger(struct snd_pcm_substream *substream, int cmd, + struct snd_soc_dai *dai) +{ + struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); + uint32_t mask; + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + case SNDRV_PCM_TRIGGER_RESUME: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + bcm2835_i2s_start_clock(dev); + + if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) + mask = BCM2835_I2S_RXON; + else + mask = BCM2835_I2S_TXON; + + regmap_update_bits(dev->i2s_regmap, + BCM2835_I2S_CS_A_REG, mask, mask); + break; + + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + bcm2835_i2s_stop(dev, substream, dai); + break; + default: + return -EINVAL; + } + + return 0; +} + +static int bcm2835_i2s_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); + + if (dai->active) + return 0; + + /* Should this still be running stop it */ + bcm2835_i2s_stop_clock(dev); + + /* Enable PCM block */ + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, + BCM2835_I2S_EN, BCM2835_I2S_EN); + + /* + * Disable STBY. + * Requires at least 4 PCM clock cycles to take effect. + */ + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, + BCM2835_I2S_STBY, BCM2835_I2S_STBY); + + return 0; +} + +static void bcm2835_i2s_shutdown(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); + + bcm2835_i2s_stop(dev, substream, dai); + + /* If both streams are stopped, disable module and clock */ + if (dai->active) + return; + + /* Disable the module */ + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, + BCM2835_I2S_EN, 0); + + /* + * Stopping clock is necessary, because stop does + * not stop the clock when SND_SOC_DAIFMT_CONT + */ + bcm2835_i2s_stop_clock(dev); +} + +static const struct snd_soc_dai_ops bcm2835_i2s_dai_ops = { + .startup = bcm2835_i2s_startup, + .shutdown = bcm2835_i2s_shutdown, + .prepare = bcm2835_i2s_prepare, + .trigger = bcm2835_i2s_trigger, + .hw_params = bcm2835_i2s_hw_params, + .set_fmt = bcm2835_i2s_set_dai_fmt, + .set_bclk_ratio = bcm2835_i2s_set_dai_bclk_ratio +}; + +static int bcm2835_i2s_dai_probe(struct snd_soc_dai *dai) +{ + struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); + + snd_soc_dai_init_dma_data(dai, + &dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK], + &dev->dma_data[SNDRV_PCM_STREAM_CAPTURE]); + + return 0; +} + +static struct snd_soc_dai_driver bcm2835_i2s_dai = { + .name = "bcm2835-i2s", + .probe = bcm2835_i2s_dai_probe, + .playback = { + .channels_min = 2, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000_192000, + .formats = SNDRV_PCM_FMTBIT_S16_LE + | SNDRV_PCM_FMTBIT_S32_LE + }, + .capture = { + .channels_min = 2, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000_192000, + .formats = SNDRV_PCM_FMTBIT_S16_LE + | SNDRV_PCM_FMTBIT_S32_LE + }, + .ops = &bcm2835_i2s_dai_ops, + .symmetric_rates = 1 +}; + +static bool bcm2835_i2s_volatile_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case BCM2835_I2S_CS_A_REG: + case BCM2835_I2S_FIFO_A_REG: + case BCM2835_I2S_INTSTC_A_REG: + case BCM2835_I2S_GRAY_REG: + return true; + default: + return false; + }; +} + +static bool bcm2835_i2s_precious_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case BCM2835_I2S_FIFO_A_REG: + return true; + default: + return false; + }; +} + +static bool bcm2835_clk_volatile_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case BCM2835_CLK_PCMCTL_REG: + return true; + default: + return false; + }; +} + +static const struct regmap_config bcm2835_regmap_config[] = { + { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + .max_register = BCM2835_I2S_GRAY_REG, + .precious_reg = bcm2835_i2s_precious_reg, + .volatile_reg = bcm2835_i2s_volatile_reg, + .cache_type = REGCACHE_RBTREE, + }, + { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + .max_register = BCM2835_CLK_PCMDIV_REG, + .volatile_reg = bcm2835_clk_volatile_reg, + .cache_type = REGCACHE_RBTREE, + }, +}; + +static const struct snd_soc_component_driver bcm2835_i2s_component = { + .name = "bcm2835-i2s-comp", +}; + +static int bcm2835_i2s_probe(struct platform_device *pdev) +{ + struct bcm2835_i2s_dev *dev; + int i; + int ret; + struct regmap *regmap[2]; + struct resource *mem[2]; + + /* Request both ioareas */ + for (i = 0; i <= 1; i++) { + void __iomem *base; + + mem[i] = platform_get_resource(pdev, IORESOURCE_MEM, i); + base = devm_ioremap_resource(&pdev->dev, mem[i]); + if (IS_ERR(base)) + return PTR_ERR(base); + + regmap[i] = devm_regmap_init_mmio(&pdev->dev, base, + &bcm2835_regmap_config[i]); + if (IS_ERR(regmap[i])) + return PTR_ERR(regmap[i]); + } + + dev = devm_kzalloc(&pdev->dev, sizeof(*dev), + GFP_KERNEL); + if (!dev) + return -ENOMEM; + + dev->i2s_regmap = regmap[0]; + dev->clk_regmap = regmap[1]; + + /* Set the DMA address */ + dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK].addr = + (dma_addr_t)mem[0]->start + BCM2835_I2S_FIFO_A_REG + + BCM2835_VCMMU_SHIFT; + + dev->dma_data[SNDRV_PCM_STREAM_CAPTURE].addr = + (dma_addr_t)mem[0]->start + BCM2835_I2S_FIFO_A_REG + + BCM2835_VCMMU_SHIFT; + + /* Set the bus width */ + dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK].addr_width = + DMA_SLAVE_BUSWIDTH_4_BYTES; + dev->dma_data[SNDRV_PCM_STREAM_CAPTURE].addr_width = + DMA_SLAVE_BUSWIDTH_4_BYTES; + + /* Set burst */ + dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK].maxburst = 2; + dev->dma_data[SNDRV_PCM_STREAM_CAPTURE].maxburst = 2; + + /* BCLK ratio - use default */ + dev->bclk_ratio = 0; + + /* Store the pdev */ + dev->dev = &pdev->dev; + dev_set_drvdata(&pdev->dev, dev); + + ret = devm_snd_soc_register_component(&pdev->dev, + &bcm2835_i2s_component, &bcm2835_i2s_dai, 1); + if (ret) { + dev_err(&pdev->dev, "Could not register DAI: %d\n", ret); + return ret; + } + + ret = snd_dmaengine_pcm_register(&pdev->dev, NULL, 0); + if (ret) { + dev_err(&pdev->dev, "Could not register PCM: %d\n", ret); + return ret; + } + + return 0; +} + +static const struct of_device_id bcm2835_i2s_of_match[] = { + { .compatible = "brcm,bcm2835-i2s", }, + {}, +}; + +static int bcm2835_i2s_remove(struct platform_device *pdev) +{ + snd_dmaengine_pcm_unregister(&pdev->dev); + return 0; +} + +static struct platform_driver bcm2835_i2s_driver = { + .probe = bcm2835_i2s_probe, + .remove = bcm2835_i2s_remove, + .driver = { + .name = "bcm2835-i2s", + .owner = THIS_MODULE, + .of_match_table = bcm2835_i2s_of_match, + }, +}; + +module_platform_driver(bcm2835_i2s_driver); + +MODULE_ALIAS("platform:bcm2835-i2s"); +MODULE_DESCRIPTION("BCM2835 I2S interface"); +MODULE_AUTHOR("Florian Meier <florian.meier(a)koalo.de>"); +MODULE_LICENSE("GPL v2"); -- 1.7.9.5

2 1

[alsa-devel] ASoC fixes for v3.13
by Mark Brown 25 Nov '13

25 Nov '13

The following changes since commit 3d800c6d75b8c92fa928a0bcaf95cd7ac5fd1ce5: ASoC: cs42l52: Correct MIC CTL mask (2013-11-15 10:16:53 +0000) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git tags/asoc-v3.13-5 for you to fetch changes up to 9a5c543dd71952719d40429b6ef252a46c9b2246: Merge remote-tracking branch 'asoc/fix/wm8962' into asoc-linus (2013-11-20 15:20:38 +0000) Not sure why the diffstat is still going crazy here... :/ ---------------------------------------------------------------- ASoC: Fixes for v3.13 A bunch of device specific fixes, nothing with a general impact here. ---------------------------------------------------------------- Charles Keepax (1): ASoC: wm5110: Add post SYSCLK register patch for rev D chip Dan Carpenter (1): ASoC: rcar: off by one in rsnd_scu_set_route() Kuninori Morimoto (2): ASoC: rcar: fixup mod access before checking ASoC: rcar: fixup dma_async_issue_pending() timing Lee Jones (1): ASoC: ab8500: Revert to using custom I/O functions Mark Brown (8): Merge remote-tracking branch 'asoc/fix/ab8500' into asoc-linus Merge remote-tracking branch 'asoc/fix/arizona' into asoc-linus Merge remote-tracking branch 'asoc/fix/blackfin' into asoc-linus Merge remote-tracking branch 'asoc/fix/cs42l52' into asoc-linus Merge remote-tracking branch 'asoc/fix/dma' into asoc-linus Merge remote-tracking branch 'asoc/fix/fsl' into asoc-linus Merge remote-tracking branch 'asoc/fix/rcar' into asoc-linus Merge remote-tracking branch 'asoc/fix/wm8962' into asoc-linus Richard Fitzgerald (1): ASoC: arizona: Set FLL to free-run before disabling .../devicetree/bindings/sound/cs42l73.txt | 22 + .../bindings/sound/davinci-evm-audio.txt | 42 ++ .../bindings/sound/davinci-mcasp-audio.txt | 41 +- .../devicetree/bindings/sound/tlv320aic3x.txt | 26 + .../devicetree/bindings/sound/tpa6130a2.txt | 27 + Documentation/sound/alsa/soc/DPCM.txt | 380 +++++++++++++ Documentation/sound/alsa/soc/codec.txt | 46 +- Documentation/sound/alsa/soc/dapm.txt | 71 ++- Documentation/sound/alsa/soc/machine.txt | 6 +- Documentation/sound/alsa/soc/platform.txt | 19 +- drivers/base/regmap/internal.h | 8 +- drivers/base/regmap/regcache.c | 3 +- drivers/base/regmap/regmap.c | 294 ++++++++-- drivers/mfd/mc13xxx-core.c | 5 - drivers/mfd/mc13xxx-spi.c | 5 + include/linux/mfd/mc13xxx.h | 7 + include/linux/platform_data/davinci_asp.h | 2 + include/linux/regmap.h | 44 ++ include/sound/cs42l52.h | 2 + include/sound/cs42l73.h | 22 + include/sound/dmaengine_pcm.h | 8 + include/sound/rcar_snd.h | 1 - include/sound/soc-dai.h | 17 + include/sound/soc-dapm.h | 4 + include/sound/soc.h | 100 ++-- include/trace/events/asoc.h | 1 + sound/arm/pxa2xx-ac97-lib.c | 27 +- sound/soc/Makefile | 2 +- sound/soc/atmel/atmel-pcm.c | 2 +- sound/soc/atmel/atmel_wm8904.c | 8 - sound/soc/atmel/sam9g20_wm8731.c | 1 + sound/soc/blackfin/bf5xx-i2s.c | 1 + sound/soc/cirrus/Kconfig | 2 +- sound/soc/cirrus/ep93xx-pcm.c | 13 + sound/soc/codecs/88pm860x-codec.c | 75 +-- sound/soc/codecs/88pm860x-codec.h | 117 ++-- sound/soc/codecs/ab8500-codec.c | 26 +- sound/soc/codecs/adau1373.c | 298 ++++++++-- sound/soc/codecs/adav80x.c | 147 +++-- sound/soc/codecs/ak4104.c | 11 +- sound/soc/codecs/ak4642.c | 4 +- sound/soc/codecs/arizona.c | 27 +- sound/soc/codecs/cq93vc.c | 46 +- sound/soc/codecs/cs4271.c | 1 + sound/soc/codecs/cs42l52.c | 93 +-- sound/soc/codecs/cs42l52.h | 2 +- sound/soc/codecs/cs42l73.c | 114 ++-- sound/soc/codecs/cs42l73.h | 105 ++-- sound/soc/codecs/max98088.c | 624 +++++++++------------ sound/soc/codecs/max98095.c | 466 ++++++--------- sound/soc/codecs/max9850.c | 39 +- sound/soc/codecs/mc13783.c | 135 +++-- sound/soc/codecs/ml26124.c | 2 + sound/soc/codecs/pcm1681.c | 1 + sound/soc/codecs/pcm1792a.c | 1 + sound/soc/codecs/rt5640.c | 31 +- sound/soc/codecs/si476x.c | 64 +-- sound/soc/codecs/sn95031.c | 35 +- sound/soc/codecs/tas5086.c | 171 ++++-- sound/soc/codecs/tlv320aic23.c | 84 ++- sound/soc/codecs/tlv320aic26.c | 139 +---- sound/soc/codecs/tlv320aic26.h | 5 +- sound/soc/codecs/tlv320aic32x4.c | 101 +--- sound/soc/codecs/tlv320aic3x.c | 234 ++++---- sound/soc/codecs/tpa6130a2.c | 32 +- sound/soc/codecs/twl4030.c | 80 ++- sound/soc/codecs/twl6040.c | 26 +- sound/soc/codecs/wm0010.c | 8 +- sound/soc/codecs/wm5110.c | 55 +- sound/soc/codecs/wm8400.c | 95 +--- sound/soc/codecs/wm8962.c | 228 ++++---- sound/soc/codecs/wm8996.c | 2 + sound/soc/codecs/wm_adsp.c | 27 +- sound/soc/davinci/Kconfig | 18 +- sound/soc/davinci/Makefile | 1 + sound/soc/davinci/davinci-evm.c | 188 ++++++- sound/soc/davinci/davinci-mcasp.c | 169 ++++-- sound/soc/davinci/davinci-mcasp.h | 12 + sound/soc/fsl/eukrea-tlv320.c | 15 +- sound/soc/fsl/fsl_spdif.c | 22 +- sound/soc/fsl/fsl_ssi.c | 22 +- sound/soc/fsl/imx-audmux.c | 9 +- sound/soc/fsl/imx-mc13783.c | 1 + sound/soc/fsl/imx-pcm-dma.c | 4 +- sound/soc/fsl/imx-pcm-fiq.c | 29 +- sound/soc/fsl/imx-sgtl5000.c | 4 +- sound/soc/fsl/imx-spdif.c | 4 +- sound/soc/fsl/imx-ssi.c | 3 - sound/soc/fsl/imx-wm8962.c | 4 +- sound/soc/generic/simple-card.c | 5 + sound/soc/kirkwood/kirkwood-dma.c | 6 +- sound/soc/kirkwood/kirkwood-i2s.c | 108 +++- sound/soc/kirkwood/kirkwood-openrd.c | 2 +- sound/soc/kirkwood/kirkwood-t5325.c | 2 +- sound/soc/kirkwood/kirkwood.h | 4 +- sound/soc/mid-x86/mfld_machine.c | 10 +- sound/soc/mxs/mxs-saif.c | 42 +- sound/soc/mxs/mxs-saif.h | 5 + sound/soc/mxs/mxs-sgtl5000.c | 20 +- sound/soc/omap/omap-mcpdm.c | 12 +- sound/soc/omap/omap-twl4030.c | 5 +- sound/soc/pxa/brownstone.c | 1 + sound/soc/pxa/corgi.c | 1 + sound/soc/pxa/e740_wm9705.c | 1 + sound/soc/pxa/e750_wm9705.c | 1 + sound/soc/pxa/e800_wm9712.c | 1 + sound/soc/pxa/imote2.c | 1 + sound/soc/pxa/mioa701_wm9713.c | 1 + sound/soc/pxa/mmp-sspa.c | 5 +- sound/soc/pxa/palm27x.c | 1 + sound/soc/pxa/poodle.c | 1 + sound/soc/pxa/pxa2xx-ac97.c | 56 +- sound/soc/pxa/tosa.c | 1 + sound/soc/pxa/ttc-dkb.c | 1 + sound/soc/samsung/bells.c | 1 + sound/soc/samsung/i2s.c | 25 +- sound/soc/samsung/smdk_wm8994.c | 14 +- sound/soc/sh/rcar/adg.c | 11 +- sound/soc/sh/rcar/core.c | 94 +--- sound/soc/sh/rcar/gen.c | 261 +++++---- sound/soc/sh/rcar/rsnd.h | 5 +- sound/soc/sh/rcar/scu.c | 14 +- sound/soc/sh/rcar/ssi.c | 52 +- sound/soc/soc-cache.c | 263 ++------- sound/soc/soc-core.c | 343 ++++++----- sound/soc/soc-dapm.c | 120 ++-- sound/soc/soc-devres.c | 86 +++ sound/soc/soc-generic-dmaengine-pcm.c | 105 +++- sound/soc/soc-io.c | 26 - sound/soc/soc-jack.c | 7 +- sound/soc/soc-pcm.c | 60 +- sound/soc/soc-utils.c | 6 +- sound/soc/spear/spdif_in.c | 12 +- sound/soc/spear/spdif_out.c | 14 +- sound/soc/tegra/tegra30_ahub.c | 115 +++- sound/soc/tegra/tegra30_ahub.h | 38 +- sound/soc/tegra/tegra30_i2s.c | 51 +- sound/soc/tegra/tegra30_i2s.h | 7 + sound/soc/tegra/tegra_asoc_utils.c | 2 + sound/soc/tegra/tegra_asoc_utils.h | 1 + sound/soc/tegra/tegra_pcm.c | 1 - 141 files changed, 4424 insertions(+), 3118 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/cs42l73.txt create mode 100644 Documentation/devicetree/bindings/sound/davinci-evm-audio.txt create mode 100644 Documentation/devicetree/bindings/sound/tpa6130a2.txt create mode 100644 Documentation/sound/alsa/soc/DPCM.txt create mode 100644 include/sound/cs42l73.h create mode 100644 sound/soc/soc-devres.c

2 4

[alsa-devel] [PATCH RESEND] ASoC: clk: probe defer when clock not yet ready
by Jean-Francois Moine 25 Nov '13

25 Nov '13

At probe time, a clock device may not be ready when some other device wants to use it. This patch lets the functions clk_get/devm_clk_get return a probe defer when the clock is defined in the DT but not yet available. It also fixes an erroneous call to clk_get_sys() when __clk_get() fails. Signed-off-by: Jean-Francois Moine <moinejf(a)free.fr> --- resend: - patch subject change from [PATCH v3 1/2] ASoC: kirkwood: clk: probe defer when clock not yet ready - base kernel 3.13.0-rc1 v2: fix __clk_get() failure (from Russell King) --- drivers/clk/clk.c | 2 +- drivers/clk/clkdev.c | 7 ++++++- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index 2cf2ea6..41361c6 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -2187,7 +2187,7 @@ EXPORT_SYMBOL_GPL(of_clk_del_provider); struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec) { struct of_clk_provider *provider; - struct clk *clk = ERR_PTR(-ENOENT); + struct clk *clk = ERR_PTR(-EPROBE_DEFER); /* Check if we have such a provider in our array */ mutex_lock(&of_clk_lock); diff --git a/drivers/clk/clkdev.c b/drivers/clk/clkdev.c index 442a313..1f402b9 100644 --- a/drivers/clk/clkdev.c +++ b/drivers/clk/clkdev.c @@ -157,7 +157,12 @@ struct clk *clk_get(struct device *dev, const char *con_id) if (dev) { clk = of_clk_get_by_name(dev->of_node, con_id); - if (!IS_ERR(clk) && __clk_get(clk)) + if (!IS_ERR(clk)) { + if (!__clk_get(clk)) + clk = ERR_PTR(-ENOENT); + return clk; + } + if (PTR_ERR(clk) == -EPROBE_DEFER) return clk; } -- Ken ar c'hentañ | ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/

2 1

[alsa-devel] [PATCH 1/5] ASoC: wm8990: Mark the register map as dirty when powering down
by Mark Brown 25 Nov '13

25 Nov '13

From: Mark Brown <broonie(a)linaro.org> Otherwise we'll skip sync on resume. Signed-off-by: Mark Brown <broonie(a)linaro.org> Cc: stable(a)vger.kernel.org --- sound/soc/codecs/wm8990.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sound/soc/codecs/wm8990.c b/sound/soc/codecs/wm8990.c index 253c88bb7a4c..4f05fb88bddf 100644 --- a/sound/soc/codecs/wm8990.c +++ b/sound/soc/codecs/wm8990.c @@ -1259,6 +1259,8 @@ static int wm8990_set_bias_level(struct snd_soc_codec *codec, /* disable POBCTRL, SOFT_ST and BUFDCOPEN */ snd_soc_write(codec, WM8990_ANTIPOP2, 0x0); + + codec->cache_sync = 1; break; } -- 1.8.4.4

2 5

[alsa-devel] [PATCH 0/8] ASoC: fsl-ssi: offline/online configuration and cleanups
by Markus Pargmann 25 Nov '13

25 Nov '13

Hi, This patch series fixes some fsl-ssi code that does not act exactly as it is described in the reference manuals. The reference manuals before imx50 do mention that some register bits, including TDMAE/RDMAE, should not be changed while the SSI unit is enabled (SSIEN). At the same time the SDMA unit has a undefined request handling if there are DMA requests before the SDMA engine and its channel is configured. The reference manual states that SSI DMA requests are sent as soon as the FIFO and the DMAE bits are enabled. It does not mention a dependency to SCR's TE/RE bit. To avoid sending DMA requests before a channel is configured, we have to seperate the fsl-ssi behavior into offline and online configuration. SoCs before imx50 have to use offline configuration while later SoC versions can use online reconfiguration. This series adds support for online configuration and cleans up the configuration register code especially in fsl_ssi_trigger. At the end we have a seperation between enable/disable logic and the actual configuration register values used to enable/disable TX/RX. I tested this series on mx53. The series is based on Mark Brown's topic/fsl branch. Regards, Markus Changes in v1: - Not removing imx21-ssi from the compatible array in the DTS patch. - Dropped "ASoC: fsl-ssi: Drop AC97 debug register usage" for the moment as I don't have time to setup AC97 hardware for some tests Markus Pargmann (8): ASoC: fsl-ssi: Move ac97 specific setup to seperate function ASoC: fsl-ssi: Move sysfs stats to debugfs ASoC: fsl-ssi: Add imx50-ssi and of_device_id matching ASoC: fsl-ssi: Add offline_config flag ASoC: fsl-ssi: Add configuration helper functions ASoC: fsl-ssi: Move RX/TX configuration to seperate functions ASoC: fsl-ssi: Drop ac97 specific trigger function ARM: DTS: imx5* imx6*, use imx50-ssi arch/arm/boot/dts/imx51.dtsi | 10 +- arch/arm/boot/dts/imx53.dtsi | 10 +- arch/arm/boot/dts/imx6qdl.dtsi | 12 +- arch/arm/boot/dts/imx6sl.dtsi | 12 +- sound/soc/fsl/fsl_ssi.c | 588 +++++++++++++++++++++++++++-------------- 5 files changed, 417 insertions(+), 215 deletions(-) -- 1.8.4.2

3 15

Re: [alsa-devel] Commit:ce6cfaf1 query for shared control
by Lars-Peter Clausen 25 Nov '13

25 Nov '13

On 11/25/2013 08:12 AM, noman pouigt wrote: > Hello Lars, > > I was wondering if you can enlighten me > on below query. > > Commit:ce6cfaf1 > > From the commit text "The input and > output paths for each widgets are only > updated though during the respective run > for that widget". > > Does this commit text mean: when mux > or mixer_power_update is called then only > the widget is powered and it's peer- widget > source(path source) and widget sink(path sink)? Hi, What the commit does is to make sure that if a control is shared between multiple mixers/muxes to apply all the changes in the same update sequence. Instead of, as it was done before, to run a update sequence for each mixer/mux. > > +------+ > A1 ------| | > | MUX1 |----- C1 > B1 ------| | > +------+ > | > control ---+ > | > +------+ > A2 ------| | > | MUX2 |----- C2 > B2 ------| | > +------+ > > Can I represent the above diagram as below: > > char *input_text_1[] = { > "A1", "B1" > }; > > struct soc_enum input_enum_1 = > SOC_ENUM_SINGLE(some_register, some_bit, > 2, input_text_1); > > char *input_text_2[] = { > "A2", "B2" > }; > struct soc_enum input_enum_2 = > SOC_ENUM_SINGLE(some_register, some_bit, > 2, input_text_2); > > > struct snd_kcontrol_new input_mux = > SOC_DAPM_ENUM("C1", input_enum_1); > struct snd_kcontrol_new input_mux = > SOC_DAPM_ENUM("C2", input_enum_2); > > dapm_route[] { > "A1", "control","C1" > "B1", "control","C1" > "A2", "control","C2" > "B2", "control","C2" > }; The control part needs to have the name of one of the enum items. So this would be { "A1", "A1", "C1" } and so on. - Lars

1 0

[alsa-devel] [PATCH] ASoC: dapm: Use SND_SOC_DAPM_INIT_REG_VAL in SND_SOC_DAPM_MUX
by Stephen Warren 24 Nov '13

24 Nov '13

From: Stephen Warren <swarren(a)nvidia.com> SND_SOC_DAPM_MUX() doesn't currently initialize the .mask field. This results in the mux never affecting HW, since no bits are ever set or cleared. Fix SND_SOC_DAPM_MUX() to use SND_SOC_DAPM_INIT_REG_VAL() to set up the reg, shift, on_val, and off_val fields like almost all other SND_SOC_xxx() macros. It looks like this was a "typo" in the fixed commit linked below. This makes the speakers on the Toshiba AC100 (PAZ00) laptop work again. Fixes: de9ba98b6d26 ("ASoC: dapm: Make widget power register settings more flexible") Cc: <stable(a)vger.kernel.org> # v3.12+ Cc: Lars-Peter Clausen <lars(a)metafoo.de> Signed-off-by: Stephen Warren <swarren(a)nvidia.com> --- include/sound/soc-dapm.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/sound/soc-dapm.h b/include/sound/soc-dapm.h index 2037c45adfe6..56ebdfca6273 100644 --- a/include/sound/soc-dapm.h +++ b/include/sound/soc-dapm.h @@ -104,7 +104,8 @@ struct device; SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \ .kcontrol_news = wcontrols, .num_kcontrols = 1} #define SND_SOC_DAPM_MUX(wname, wreg, wshift, winvert, wcontrols) \ -{ .id = snd_soc_dapm_mux, .name = wname, .reg = wreg, \ +{ .id = snd_soc_dapm_mux, .name = wname, \ + SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \ .kcontrol_news = wcontrols, .num_kcontrols = 1} #define SND_SOC_DAPM_VIRT_MUX(wname, wreg, wshift, winvert, wcontrols) \ { .id = snd_soc_dapm_virt_mux, .name = wname, \ -- 1.8.1.5

2 4

[alsa-devel] [PATCH] ASoC: Rename mid-x86 directory to intel
by Jarkko Nikula 24 Nov '13

24 Nov '13

We have other Intel platforms coming having the Smart Sound Technology (SST) so rename the mid-x86 directory to intel as originally directory name reflected only Intel MID platform. Signed-off-by: Jarkko Nikula <jarkko.nikula(a)linux.intel.com> Acked-by: Vinod Koul <vinod.koul(a)intel.com> --- sound/soc/Kconfig | 2 +- sound/soc/Makefile | 2 +- sound/soc/{mid-x86 => intel}/Kconfig | 0 sound/soc/{mid-x86 => intel}/Makefile | 0 sound/soc/{mid-x86 => intel}/mfld_machine.c | 0 sound/soc/{mid-x86 => intel}/sst_dsp.h | 0 sound/soc/{mid-x86 => intel}/sst_platform.c | 0 sound/soc/{mid-x86 => intel}/sst_platform.h | 0 8 files changed, 2 insertions(+), 2 deletions(-) rename sound/soc/{mid-x86 => intel}/Kconfig (100%) rename sound/soc/{mid-x86 => intel}/Makefile (100%) rename sound/soc/{mid-x86 => intel}/mfld_machine.c (100%) rename sound/soc/{mid-x86 => intel}/sst_dsp.h (100%) rename sound/soc/{mid-x86 => intel}/sst_platform.c (100%) rename sound/soc/{mid-x86 => intel}/sst_platform.h (100%) diff --git a/sound/soc/Kconfig b/sound/soc/Kconfig index 5138b8493051..463a9e25e04f 100644 --- a/sound/soc/Kconfig +++ b/sound/soc/Kconfig @@ -42,7 +42,7 @@ source "sound/soc/jz4740/Kconfig" source "sound/soc/nuc900/Kconfig" source "sound/soc/omap/Kconfig" source "sound/soc/kirkwood/Kconfig" -source "sound/soc/mid-x86/Kconfig" +source "sound/soc/intel/Kconfig" source "sound/soc/mxs/Kconfig" source "sound/soc/pxa/Kconfig" source "sound/soc/samsung/Kconfig" diff --git a/sound/soc/Makefile b/sound/soc/Makefile index 8b9e70105dd2..ff291d3e60af 100644 --- a/sound/soc/Makefile +++ b/sound/soc/Makefile @@ -16,7 +16,7 @@ obj-$(CONFIG_SND_SOC) += davinci/ obj-$(CONFIG_SND_SOC) += dwc/ obj-$(CONFIG_SND_SOC) += fsl/ obj-$(CONFIG_SND_SOC) += jz4740/ -obj-$(CONFIG_SND_SOC) += mid-x86/ +obj-$(CONFIG_SND_SOC) += intel/ obj-$(CONFIG_SND_SOC) += mxs/ obj-$(CONFIG_SND_SOC) += nuc900/ obj-$(CONFIG_SND_SOC) += omap/ diff --git a/sound/soc/mid-x86/Kconfig b/sound/soc/intel/Kconfig similarity index 100% rename from sound/soc/mid-x86/Kconfig rename to sound/soc/intel/Kconfig diff --git a/sound/soc/mid-x86/Makefile b/sound/soc/intel/Makefile similarity index 100% rename from sound/soc/mid-x86/Makefile rename to sound/soc/intel/Makefile diff --git a/sound/soc/mid-x86/mfld_machine.c b/sound/soc/intel/mfld_machine.c similarity index 100% rename from sound/soc/mid-x86/mfld_machine.c rename to sound/soc/intel/mfld_machine.c diff --git a/sound/soc/mid-x86/sst_dsp.h b/sound/soc/intel/sst_dsp.h similarity index 100% rename from sound/soc/mid-x86/sst_dsp.h rename to sound/soc/intel/sst_dsp.h diff --git a/sound/soc/mid-x86/sst_platform.c b/sound/soc/intel/sst_platform.c similarity index 100% rename from sound/soc/mid-x86/sst_platform.c rename to sound/soc/intel/sst_platform.c diff --git a/sound/soc/mid-x86/sst_platform.h b/sound/soc/intel/sst_platform.h similarity index 100% rename from sound/soc/mid-x86/sst_platform.h rename to sound/soc/intel/sst_platform.h -- 1.8.4.2

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[alsa-devel] [patch] ASoC: rcar: some dubious one-bit signed bitfields
by Dan Carpenter 24 Nov '13

24 Nov '13

Because these are signed they can either be 0 or -1 instead of 0 and 1 as intended. It doesn't cause a problem from what I can see, but it's dangerous and Sparse complains: sound/soc/sh/rcar/rsnd.h:177:25: error: dubious one-bit signed bitfield Signed-off-by: Dan Carpenter <dan.carpenter(a)oracle.com> diff --git a/sound/soc/sh/rcar/rsnd.h b/sound/soc/sh/rcar/rsnd.h index 9e463e5..b5ac3a2 100644 --- a/sound/soc/sh/rcar/rsnd.h +++ b/sound/soc/sh/rcar/rsnd.h @@ -174,11 +174,11 @@ struct rsnd_dai { struct rsnd_dai_stream playback; struct rsnd_dai_stream capture; - int clk_master:1; - int bit_clk_inv:1; - int frm_clk_inv:1; - int sys_delay:1; - int data_alignment:1; + unsigned int clk_master:1; + unsigned int bit_clk_inv:1; + unsigned int frm_clk_inv:1; + unsigned int sys_delay:1; + unsigned int data_alignment:1; }; #define rsnd_dai_nr(priv) ((priv)->dai_nr)

2 1

[alsa-devel] [PATCH][RFC] ASoC: rcar: select REGMAP
by Kuninori Morimoto 24 Nov '13

24 Nov '13

55e5b6fd5af04b6d8b0ac6635edf49476ff298ba (ASoC: rsnd: use regmap instead of original register mapping method) support regmap/regmap_field on Renesas sound driver. It needs CONFIG_REGMAP now. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com> --- Mark I'm not sure this is needed or not, but I tried send it sound/soc/sh/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/soc/sh/Kconfig b/sound/soc/sh/Kconfig index 14011d9..ff60e11 100644 --- a/sound/soc/sh/Kconfig +++ b/sound/soc/sh/Kconfig @@ -37,6 +37,7 @@ config SND_SOC_SH4_SIU config SND_SOC_RCAR tristate "R-Car series SRU/SCU/SSIU/SSI support" select SND_SIMPLE_CARD + select REGMAP help This option enables R-Car SUR/SCU/SSIU/SSI sound support -- 1.7.9.5

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[alsa-devel] [PATCH 0/4] *** SUBJECT HERE ***
by Charles Keepax 24 Nov '13

24 Nov '13

Hi, Small patch series adding some missing functionality on the WM5110. Given most of the changes are in ASoC I have generated the patches against Mark's tree but let me know if we want to push them through MFD instead and I can regenerate, but I suspect they will cause less conflicts going through ASoC. Thanks, Charles Charles Keepax (3): mfd: wm5110: Make DSP memories readable ASoC: wm5110: Add basic support for ISRCs ASoC: wm5110: Expose input high pass filter controls Mark Brown (1): ASoC: wm5110: Hook up ADSP2 cores drivers/mfd/wm5110-tables.c | 73 +++++++- include/linux/mfd/arizona/registers.h | 37 ++++ sound/soc/codecs/Kconfig | 2 + sound/soc/codecs/arizona.c | 10 + sound/soc/codecs/arizona.h | 1 + sound/soc/codecs/wm5110.c | 316 ++++++++++++++++++++++++++++++++- 6 files changed, 433 insertions(+), 6 deletions(-) -- 1.7.2.5

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[alsa-devel] [PATCH] ASoC: fsl_ssi: Add missing __iomem annotations
by Lars-Peter Clausen 24 Nov '13

24 Nov '13

There are two places in the fsl_ssi driver where the pointer to the register set is missing the __iomem annotation. Adding it fixes the following warnings from sparse: sound/soc/fsl/fsl_ssi.c:747:45: warning: incorrect type in initializer (different address spaces) sound/soc/fsl/fsl_ssi.c:747:45: expected struct ccsr_ssi *ssi sound/soc/fsl/fsl_ssi.c:747:45: got struct ccsr_ssi [noderef] <asn:2>*ssi sound/soc/fsl/fsl_ssi.c:756:9: warning: incorrect type in argument 2 (different address spaces) sound/soc/fsl/fsl_ssi.c:756:9: expected void volatile [noderef] <asn:2>*addr sound/soc/fsl/fsl_ssi.c:756:9: got unsigned int *<noident> sound/soc/fsl/fsl_ssi.c:759:9: warning: incorrect type in argument 2 (different address spaces) sound/soc/fsl/fsl_ssi.c:759:9: expected void volatile [noderef] <asn:2>*addr sound/soc/fsl/fsl_ssi.c:759:9: got unsigned int *<noident> sound/soc/fsl/fsl_ssi.c:761:25: warning: incorrect type in argument 1 (different address spaces) sound/soc/fsl/fsl_ssi.c:761:25: expected unsigned int [noderef] [usertype] <asn:2>*addr sound/soc/fsl/fsl_ssi.c:761:25: got unsigned int *<noident> sound/soc/fsl/fsl_ssi.c:769:45: warning: incorrect type in initializer (different address spaces) sound/soc/fsl/fsl_ssi.c:769:45: expected struct ccsr_ssi *ssi sound/soc/fsl/fsl_ssi.c:769:45: got struct ccsr_ssi [noderef] <asn:2>*ssi sound/soc/fsl/fsl_ssi.c:775:9: warning: incorrect type in argument 2 (different address spaces) sound/soc/fsl/fsl_ssi.c:775:9: expected void volatile [noderef] <asn:2>*addr sound/soc/fsl/fsl_ssi.c:775:9: got unsigned int *<noident> sound/soc/fsl/fsl_ssi.c:776:25: warning: incorrect type in argument 1 (different address spaces) sound/soc/fsl/fsl_ssi.c:776:25: expected unsigned int [noderef] [usertype] <asn:2>*addr sound/soc/fsl/fsl_ssi.c:776:25: got unsigned int *<noident> sound/soc/fsl/fsl_ssi.c:781:16: warning: incorrect type in argument 1 (different address spaces) sound/soc/fsl/fsl_ssi.c:781:16: expected void const volatile [noderef] <asn:2>*addr sound/soc/fsl/fsl_ssi.c:781:16: got unsigned int *<noident> Signed-off-by: Lars-Peter Clausen <lars(a)metafoo.de> --- sound/soc/fsl/fsl_ssi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c index 3df0318..1a9521a 100644 --- a/sound/soc/fsl/fsl_ssi.c +++ b/sound/soc/fsl/fsl_ssi.c @@ -751,7 +751,7 @@ static void fsl_ssi_ac97_init(void) static void fsl_ssi_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val) { - struct ccsr_ssi *ssi = fsl_ac97_data->ssi; + struct ccsr_ssi __iomem *ssi = fsl_ac97_data->ssi; unsigned int lreg; unsigned int lval; @@ -773,7 +773,7 @@ static void fsl_ssi_ac97_write(struct snd_ac97 *ac97, unsigned short reg, static unsigned short fsl_ssi_ac97_read(struct snd_ac97 *ac97, unsigned short reg) { - struct ccsr_ssi *ssi = fsl_ac97_data->ssi; + struct ccsr_ssi __iomem *ssi = fsl_ac97_data->ssi; unsigned short val = -1; unsigned int lreg; -- 1.8.0

1 0

[alsa-devel] Zoom R16
by Jason Mancine 24 Nov '13

24 Nov '13

Hello, I am looking for some assistance in getting the Zoom R16 working for playback. Please let me know if this is the right forum for this... The device is recognized, but I just can't figure out which interface is which, and how to configure them in quirks-table.h. Any help would be appreciated. To start, the output of lsusb -v for the device is this: --- Bus 001 Device 010: ID 1686:00dd ZOOM Corporation Device Descriptor: bLength 18 bDescriptorType 1 bcdUSB 2.00 bDeviceClass 255 Vendor Specific Class bDeviceSubClass 0 bDeviceProtocol 255 bMaxPacketSize0 64 idVendor 0x1686 ZOOM Corporation idProduct 0x00dd bcdDevice 0.02 iManufacturer 1 iProduct 2 R16 iSerial 3 0 bNumConfigurations 1 Configuration Descriptor: bLength 9 bDescriptorType 2 wTotalLength 259 bNumInterfaces 4 bConfigurationValue 1 iConfiguration 0 bmAttributes 0x80 (Bus Powered) MaxPower 480mA Interface Descriptor: bLength 9 bDescriptorType 4 bInterfaceNumber 0 bAlternateSetting 0 bNumEndpoints 0 bInterfaceClass 255 Vendor Specific Class bInterfaceSubClass 1 bInterfaceProtocol 0 iInterface 0 ** UNRECOGNIZED: 0b 24 01 00 01 35 00 03 01 02 03 ** UNRECOGNIZED: 0c 24 02 05 01 01 00 02 03 00 00 00 ** UNRECOGNIZED: 09 24 03 08 01 03 00 05 00 ** UNRECOGNIZED: 0c 24 02 09 01 02 00 08 00 00 00 00 ** UNRECOGNIZED: 09 24 03 0c 01 01 00 09 00 Interface Descriptor: bLength 9 bDescriptorType 4 bInterfaceNumber 1 bAlternateSetting 0 bNumEndpoints 0 bInterfaceClass 255 Vendor Specific Class bInterfaceSubClass 2 bInterfaceProtocol 0 iInterface 0 Interface Descriptor: bLength 9 bDescriptorType 4 bInterfaceNumber 1 bAlternateSetting 1 bNumEndpoints 1 bInterfaceClass 255 Vendor Specific Class bInterfaceSubClass 2 bInterfaceProtocol 0 iInterface 0 ** UNRECOGNIZED: 07 24 01 05 01 01 00 ** UNRECOGNIZED: 14 24 02 01 02 04 18 04 44 ac 00 80 bb 00 88 58 01 00 77 01 Endpoint Descriptor: bLength 7 bDescriptorType 5 bEndpointAddress 0x03 EP 3 OUT bmAttributes 9 Transfer Type Isochronous Synch Type Adaptive Usage Type Data wMaxPacketSize 0x006c 1x 108 bytes bInterval 1 Interface Descriptor: bLength 9 bDescriptorType 4 bInterfaceNumber 2 bAlternateSetting 0 bNumEndpoints 0 bInterfaceClass 255 Vendor Specific Class bInterfaceSubClass 2 bInterfaceProtocol 0 iInterface 0 Interface Descriptor: bLength 9 bDescriptorType 4 bInterfaceNumber 2 bAlternateSetting 1 bNumEndpoints 1 bInterfaceClass 255 Vendor Specific Class bInterfaceSubClass 2 bInterfaceProtocol 0 iInterface 0 ** UNRECOGNIZED: 07 24 01 0c 01 01 00 ** UNRECOGNIZED: 14 24 02 01 08 04 18 04 44 ac 00 80 bb 00 88 58 01 00 77 01 Endpoint Descriptor: bLength 7 bDescriptorType 5 bEndpointAddress 0x84 EP 4 IN bmAttributes 13 Transfer Type Isochronous Synch Type Synchronous Usage Type Data wMaxPacketSize 0x01a0 1x 416 bytes bInterval 1 Interface Descriptor: bLength 9 bDescriptorType 4 bInterfaceNumber 3 bAlternateSetting 0 bNumEndpoints 2 bInterfaceClass 255 Vendor Specific Class bInterfaceSubClass 3 bInterfaceProtocol 0 iInterface 0 ** UNRECOGNIZED: 07 24 01 00 01 41 00 ** UNRECOGNIZED: 06 24 02 01 01 00 ** UNRECOGNIZED: 06 24 02 02 02 00 ** UNRECOGNIZED: 09 24 03 01 03 01 02 01 00 ** UNRECOGNIZED: 09 24 03 02 04 01 01 01 00 Endpoint Descriptor: bLength 7 bDescriptorType 5 bEndpointAddress 0x01 EP 1 OUT bmAttributes 2 Transfer Type Bulk Synch Type None Usage Type Data wMaxPacketSize 0x0040 1x 64 bytes bInterval 0 Endpoint Descriptor: bLength 7 bDescriptorType 5 bEndpointAddress 0x82 EP 2 IN bmAttributes 2 Transfer Type Bulk Synch Type None Usage Type Data wMaxPacketSize 0x0040 1x 64 bytes bInterval 0 Device Qualifier (for other device speed): bLength 10 bDescriptorType 6 bcdUSB 2.00 bDeviceClass 255 Vendor Specific Class bDeviceSubClass 0 bDeviceProtocol 255 bMaxPacketSize0 64 bNumConfigurations 1 Device Status: 0x0001 Self Powered --- This is the quirk that Clemens provided on the linux-audio mail list...the device is recognized, but no capture/playback: { /* ZOOM R16 in USB 2.0 mode */ USB_DEVICE(0x1686, 0x00dd), .driver_info = (unsigned long) & (const struct snd_usb_audio_quirk) { .ifnum = QUIRK_ANY_INTERFACE, .type = QUIRK_COMPOSITE, .data = (const struct snd_usb_audio_quirk[]) { { .ifnum = 0, .type = QUIRK_IGNORE_INTERFACE }, { .ifnum = 1, .type = QUIRK_AUDIO_STANDARD_INTERFACE }, { .ifnum = 2, .type = QUIRK_AUDIO_STANDARD_INTERFACE }, { .ifnum = 3, .type = QUIRK_MIDI_STANDARD_INTERFACE }, { .ifnum = .1 }, } } }, Now....despite there being no #4 interface in lsusb, if I append the following to the above quirk I get all 8 channels of capture working. I am more confused than ever. :) { .ifnum = 4, .type = QUIRK_AUDIO_FIXED_ENDPOINT, .data = & (const struct audioformat) { .formats = SNDRV_PCM_FMTBIT_S24_LE, .channels = 8, .iface = 1, .altsetting = 1, .altset_idx = 1, .attributes = UAC_EP_CS_ATTR_SAMPLE_RATE, .endpoint = 0x84, .ep_attr = 13, .rates = SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000, .rate_min = 44100, .rate_max = 96000, .nr_rates = 4, .rate_table = (unsigned int[]) { 44100, 48000, 88200, 96000 } } }, Obviously, this is not the correct solution and I can't make playback work by adding additional .ifnums. I am quite certain that interface 1 is capture and 2 is playback but if I add the same info to either of those sections my entire system freezes when I plug in the device. Thanks, jason

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Re: [alsa-devel] [pulseaudio-discuss] acceptable noise level for mic boost
by Oleksij Rempel 23 Nov '13

23 Nov '13

Am 22.11.2013 18:34, schrieb Oleksij Rempel: > Am 22.11.2013 17:48, schrieb Tanu Kaskinen: >> On Thu, 2013-11-21 at 16:42 +0100, Oleksij Rempel wrote: >>> Hello all, >>> >>> i posted this email to ALSA, but probably PA devs have some ideas too. >>> >>> ====================================================================== >>> Hello Takashi, >>> >>> what is acceptable noise level for mic boost? >>> My laptop has three levels of mic boost (+36dB). Level 3 is useless >>> since noise level will be about 0db. With level 1 i get -12dB noise, so >>> there is almost 12dB room for data... but it is not enough for normal >>> speech, which is about 20dB. >>> >>> Are there any ALSA guide for HW designers, which will say some thing >>> like acceptable levels are 90-20dB? >>> There are some Skype and Microsoft prescriptions for certification. >>> For example M$ prescribe 18dB or more for speech to noise ration for >>> build in mics. It sound like good number to start. >>> >>> In my case, i need to remove mic boost completely to guarantee minimum >>> 18dB SpNR. Suddenly i didn't found correct way to do it. >>> I will be thankful for some tip. >>> >>> ===================================================================== >>> >>> So my question to PA devs. Do pulse audio need to know about noise level >>> of microphone? Will it help to make correct decisions? Especial for VoIP >>> and automatic gain control. >> >> We don't currently have any idea of the noise level, so we don't have >> code for adjusting our decisions based on that information either. So, >> I'd say that pulseaudio doesn't *need* to know about the noise level. Of >> course, if someone someday complains that pulseaudio does bad decisions >> because it doesn't take the noise level into account, then we would need >> that information. >> > > Thank you for your response. > I have more questions: > Skype continuously trying to adjust record level. If there is a silence > it will try to push the input volume as close to 0dB (in pulseaudio > terms) as possible. > For my laptop 0dB(in PA) will mean some thing +68dB over base volume > (ALSA). The noise will reach 0dBFS. > Well, it wont kill any one, but it sound bad. > > What 0dB mean in pulseaudio? > Why pulseaudio has capture volume range -130 - +11dB? Is it possible to > fit this gain to 16-bit PCM? to answer this question by my self. If i understand correctly pulseaudio trying to imitate professional mixer settings. The difference is, usual mixer has 0dB settings as point for preconfigured sound. You need to use "Gain" or "Trim" control to configure it to acceptable level. 0dB in PulseAudio looks for me incorrect, if no preconfigurable available. Here is one example: http://www.youtube.com/watch?v=YXSJ1oOQ9tY > Now to my hardware. I can blacklist in the driver 2 "mic boost" steps > without introducing any regressions. Which will guaranty maximal noise > level = -12dBFS. But it is still not optimal. Best experience i had with > limit to -24dB. In this case i need to remove Mic Boost completely but > pulseaudio will fail to make a difference between internal and external mic. > > What is best solution in this case? Fix pulse or leave at least one step > for mic boost? After some more testing, i'm sure it should be fixed in pulseaudio. Blacklisting microfone setting is just quick dirty hack. It will work for internal mic. But fail on external. There is no way, ALSA can predict some thing about it. The best thing ALSA can do here is to provide all possible controls. > The microphone on this laptop is a digital mic. Do it make sense to use > hardware amp? Or is it possible to get better results with software? Theoretically, Skype or Empathy or any other app with auto gain control should us 0dB as target. But since ALSA or PulseAudio can't automatically detect correct point, PuleAudio should provide possibility to override 0dB offset. For build in microphones can be used ALSA quirk list or some kind of database for pulseaudio with per device default values to make better default experience. IMO, current solution with blacklists in ALSA is wrong. -- Regards, Oleksij

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[alsa-devel] [PATCH] ASoC: ak4641: Convert to direct regmap API usage
by Mark Brown 22 Nov '13

22 Nov '13

From: Mark Brown <broonie(a)linaro.org> We're trying to remove the ASoC level I/O functions. Signed-off-by: Mark Brown <broonie(a)linaro.org> --- sound/soc/codecs/ak4641.c | 38 +++++++++++++++++++++++++------------- 1 file changed, 25 insertions(+), 13 deletions(-) diff --git a/sound/soc/codecs/ak4641.c b/sound/soc/codecs/ak4641.c index 49cc5f6d6dba..94cbe508dd37 100644 --- a/sound/soc/codecs/ak4641.c +++ b/sound/soc/codecs/ak4641.c @@ -17,6 +17,7 @@ #include <linux/gpio.h> #include <linux/pm.h> #include <linux/i2c.h> +#include <linux/regmap.h> #include <linux/slab.h> #include <sound/core.h> #include <sound/pcm.h> @@ -30,6 +31,7 @@ /* codec private data */ struct ak4641_priv { + struct regmap *regmap; unsigned int sysclk; int deemph; int playback_fs; @@ -38,12 +40,12 @@ struct ak4641_priv { /* * ak4641 register cache */ -static const u8 ak4641_reg[AK4641_CACHEREGNUM] = { - 0x00, 0x80, 0x00, 0x80, - 0x02, 0x00, 0x11, 0x05, - 0x00, 0x00, 0x36, 0x10, - 0x00, 0x00, 0x57, 0x00, - 0x88, 0x88, 0x08, 0x08 +static const struct reg_default ak4641_reg_defaults[] = { + { 0, 0x00 }, { 1, 0x80 }, { 2, 0x00 }, { 3, 0x80 }, + { 4, 0x02 }, { 5, 0x00 }, { 6, 0x11 }, { 7, 0x05 }, + { 8, 0x00 }, { 9, 0x00 }, { 10, 0x36 }, { 11, 0x10 }, + { 12, 0x00 }, { 13, 0x00 }, { 14, 0x57 }, { 15, 0x00 }, + { 16, 0x88 }, { 17, 0x88 }, { 18, 0x08 }, { 19, 0x08 } }; static const int deemph_settings[] = {44100, 0, 48000, 32000}; @@ -396,6 +398,7 @@ static int ak4641_mute(struct snd_soc_dai *dai, int mute) static int ak4641_set_bias_level(struct snd_soc_codec *codec, enum snd_soc_bias_level level) { + struct ak4641_priv *ak4641 = snd_soc_codec_get_drvdata(codec); struct ak4641_platform_data *pdata = codec->dev->platform_data; int ret; @@ -417,7 +420,7 @@ static int ak4641_set_bias_level(struct snd_soc_codec *codec, gpio_set_value(pdata->gpio_npdn, 1); mdelay(1); - ret = snd_soc_cache_sync(codec); + ret = regcache_sync(ak4641->regmap); if (ret) { dev_err(codec->dev, "Failed to sync cache: %d\n", ret); @@ -433,7 +436,7 @@ static int ak4641_set_bias_level(struct snd_soc_codec *codec, gpio_set_value(pdata->gpio_npdn, 0); if (pdata && gpio_is_valid(pdata->gpio_power)) gpio_set_value(pdata->gpio_power, 0); - codec->cache_sync = 1; + regcache_mark_dirty(ak4641->regmap); break; } codec->dapm.bias_level = level; @@ -518,7 +521,7 @@ static int ak4641_probe(struct snd_soc_codec *codec) { int ret; - ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_I2C); + ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP); if (ret != 0) { dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); return ret; @@ -550,12 +553,17 @@ static struct snd_soc_codec_driver soc_codec_dev_ak4641 = { .dapm_routes = ak4641_audio_map, .num_dapm_routes = ARRAY_SIZE(ak4641_audio_map), .set_bias_level = ak4641_set_bias_level, - .reg_cache_size = ARRAY_SIZE(ak4641_reg), - .reg_word_size = sizeof(u8), - .reg_cache_default = ak4641_reg, - .reg_cache_step = 1, }; +static const struct regmap_config ak4641_regmap = { + .reg_bits = 8, + .val_bits = 8, + + .max_register = AK4641_BTIF, + .reg_defaults = ak4641_reg_defaults, + .num_reg_defaults = ARRAY_SIZE(ak4641_reg_defaults), + .cache_type = REGCACHE_RBTREE, +}; static int ak4641_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *id) @@ -569,6 +577,10 @@ static int ak4641_i2c_probe(struct i2c_client *i2c, if (!ak4641) return -ENOMEM; + ak4641->regmap = devm_regmap_init_i2c(i2c, &ak4641_regmap); + if (IS_ERR(ak4641->regmap)) + return PTR_ERR(ak4641->regmap); + if (pdata) { if (gpio_is_valid(pdata->gpio_power)) { ret = gpio_request_one(pdata->gpio_power, -- 1.8.4.4

1 0

[alsa-devel] [PATCH 1/4] ASoC: wm8991: Convert to table based control and widget init
by Mark Brown 22 Nov '13

22 Nov '13

From: Mark Brown <broonie(a)linaro.org> Signed-off-by: Mark Brown <broonie(a)linaro.org> --- sound/soc/codecs/wm8991.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/sound/soc/codecs/wm8991.c b/sound/soc/codecs/wm8991.c index 5078fc8e10f7..86aa33fd11de 100644 --- a/sound/soc/codecs/wm8991.c +++ b/sound/soc/codecs/wm8991.c @@ -764,7 +764,7 @@ static const struct snd_soc_dapm_widget wm8991_dapm_widgets[] = { SND_SOC_DAPM_OUTPUT("Internal DAC Sink"), }; -static const struct snd_soc_dapm_route audio_map[] = { +static const struct snd_soc_dapm_route wm8991_dapm_routes[] = { /* Make DACs turn on when playing even if not mixed into any outputs */ {"Internal DAC Sink", NULL, "Left DAC"}, {"Internal DAC Sink", NULL, "Right DAC"}, @@ -1278,13 +1278,6 @@ static int wm8991_probe(struct snd_soc_codec *codec) snd_soc_write(codec, WM8991_LEFT_OUTPUT_VOLUME, 0x50 | (1<<8)); snd_soc_write(codec, WM8991_RIGHT_OUTPUT_VOLUME, 0x50 | (1<<8)); - snd_soc_add_codec_controls(codec, wm8991_snd_controls, - ARRAY_SIZE(wm8991_snd_controls)); - - snd_soc_dapm_new_controls(&codec->dapm, wm8991_dapm_widgets, - ARRAY_SIZE(wm8991_dapm_widgets)); - snd_soc_dapm_add_routes(&codec->dapm, audio_map, - ARRAY_SIZE(audio_map)); return 0; } @@ -1333,6 +1326,12 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8991 = { .suspend = wm8991_suspend, .resume = wm8991_resume, .set_bias_level = wm8991_set_bias_level, + .controls = wm8991_snd_controls, + .num_controls = ARRAY_SIZE(wm8991_snd_controls), + .dapm_widgets = wm8991_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(wm8991_dapm_widgets), + .dapm_routes = wm8991_dapm_routes, + .num_dapm_routes = ARRAY_SIZE(wm8991_dapm_routes), .reg_cache_size = WM8991_MAX_REGISTER + 1, .reg_word_size = sizeof(u16), .reg_cache_default = wm8991_reg_defs -- 1.8.4.4

2 4

[alsa-devel] firewire-lib: an issue to generate packet with 'no data' in blocking mode
by Takashi Sakamoto 22 Nov '13

22 Nov '13

Clemens, I have a question about generate packet with 'no data' in blocking mode. I think there is out of specification in current firewire-lib. If this is a qurk for some devices, I'll prepare patches to switch generating mode because BeBoB cannot sound with current firewire-lib. If this is a bug, then I want to discuss which is better for firewire-lib. In my understanding of IEC 61883-6, there are two ways: 1. generate 'empty packet' defined in IEC 61883-1 - size of packet is 2 quadlets - FDF = sfc - packet includes just CIP headers 2. generate 'special non-empty packet' defined in IEC 61883-6 - size of packet is following to blocking mode - FDF = 0xff ('NO-DATA' code) - packet includes dummy data But current implementation is a strange combination of them. - size of packet is 2 (way 1) - FDF = 0xff (way 2) I attach two patches. 'empty.patch' is for 1 and 'special.patch' is for 2. Regards Takashi Sakamoto

3 4

[alsa-devel] [PATCHv4] ASoC: Add support for BCM2835
by Florian Meier 22 Nov '13

22 Nov '13

This driver adds support for digital audio (I2S) for the BCM2835 SoC that is used by the Raspberry Pi. External audio codecs can be connected to the Raspberry Pi via P5 header. It relies on cyclic DMA engine support for BCM2835. Signed-off-by: Florian Meier <florian.meier(a)koalo.de> --- Minor style improvements compared to PATCHv3. .../devicetree/bindings/sound/bcm2835-i2s.txt | 25 + sound/soc/Kconfig | 1 + sound/soc/Makefile | 1 + sound/soc/bcm/Kconfig | 10 + sound/soc/bcm/Makefile | 5 + sound/soc/bcm/bcm2835-i2s.c | 892 ++++++++++++++++++++ 6 files changed, 934 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/bcm2835-i2s.txt create mode 100644 sound/soc/bcm/Kconfig create mode 100644 sound/soc/bcm/Makefile create mode 100644 sound/soc/bcm/bcm2835-i2s.c diff --git a/Documentation/devicetree/bindings/sound/bcm2835-i2s.txt b/Documentation/devicetree/bindings/sound/bcm2835-i2s.txt new file mode 100644 index 0000000..65783de --- /dev/null +++ b/Documentation/devicetree/bindings/sound/bcm2835-i2s.txt @@ -0,0 +1,25 @@ +* Broadcom BCM2835 SoC I2S/PCM module + +Required properties: +- compatible: "brcm,bcm2835-i2s" +- reg: A list of base address and size entries: + * The first entry should cover the PCM registers + * The second entry should cover the PCM clock registers +- dmas: List of DMA controller phandle and DMA request line ordered pairs. +- dma-names: Identifier string for each DMA request line in the dmas property. + These strings correspond 1:1 with the ordered pairs in dmas. + + One of the DMA channels will be responsible for transmission (should be + named "tx") and one for reception (should be named "rx"). + +Example: + +bcm2835_i2s: i2s@7e203000 { + compatible = "brcm,bcm2835-i2s"; + reg = <0x7e203000 0x20>, + <0x7e101098 0x02>; + + dmas = <&dma 2>, + <&dma 3>; + dma-names = "tx", "rx"; +}; diff --git a/sound/soc/Kconfig b/sound/soc/Kconfig index 5138b84..a5e3a70 100644 --- a/sound/soc/Kconfig +++ b/sound/soc/Kconfig @@ -33,6 +33,7 @@ config SND_SOC_GENERIC_DMAENGINE_PCM # All the supported SoCs source "sound/soc/atmel/Kconfig" source "sound/soc/au1x/Kconfig" +source "sound/soc/bcm/Kconfig" source "sound/soc/blackfin/Kconfig" source "sound/soc/cirrus/Kconfig" source "sound/soc/davinci/Kconfig" diff --git a/sound/soc/Makefile b/sound/soc/Makefile index 8b9e701..b52d4aa 100644 --- a/sound/soc/Makefile +++ b/sound/soc/Makefile @@ -10,6 +10,7 @@ obj-$(CONFIG_SND_SOC) += codecs/ obj-$(CONFIG_SND_SOC) += generic/ obj-$(CONFIG_SND_SOC) += atmel/ obj-$(CONFIG_SND_SOC) += au1x/ +obj-$(CONFIG_SND_SOC) += bcm/ obj-$(CONFIG_SND_SOC) += blackfin/ obj-$(CONFIG_SND_SOC) += cirrus/ obj-$(CONFIG_SND_SOC) += davinci/ diff --git a/sound/soc/bcm/Kconfig b/sound/soc/bcm/Kconfig new file mode 100644 index 0000000..3d82a29 --- /dev/null +++ b/sound/soc/bcm/Kconfig @@ -0,0 +1,10 @@ +config SND_BCM2835_SOC_I2S + tristate "SoC Audio support for the Broadcom BCM2835 I2S module" + depends on ARCH_BCM2835 || COMPILE_TEST + select SND_SOC_DMAENGINE_PCM + select SND_SOC_GENERIC_DMAENGINE_PCM + select REGMAP_MMIO + help + Say Y or M if you want to add support for codecs attached to + the BCM2835 I2S interface. You will also need + to select the audio interfaces to support below. diff --git a/sound/soc/bcm/Makefile b/sound/soc/bcm/Makefile new file mode 100644 index 0000000..bc816b7 --- /dev/null +++ b/sound/soc/bcm/Makefile @@ -0,0 +1,5 @@ +# BCM2835 Platform Support +snd-soc-bcm2835-i2s-objs := bcm2835-i2s.o + +obj-$(CONFIG_SND_BCM2835_SOC_I2S) += snd-soc-bcm2835-i2s.o + diff --git a/sound/soc/bcm/bcm2835-i2s.c b/sound/soc/bcm/bcm2835-i2s.c new file mode 100644 index 0000000..7b27c35 --- /dev/null +++ b/sound/soc/bcm/bcm2835-i2s.c @@ -0,0 +1,892 @@ +/* + * ALSA SoC I2S Audio Layer for Broadcom BCM2835 SoC + * + * Author: Florian Meier <florian.meier(a)koalo.de> + * Copyright 2013 + * + * Based on + * Raspberry Pi PCM I2S ALSA Driver + * Copyright (c) by Phil Poole 2013 + * + * ALSA SoC I2S (McBSP) Audio Layer for TI DAVINCI processor + * Vladimir Barinov, <vbarinov(a)embeddedalley.com> + * Copyright (C) 2007 MontaVista Software, Inc., <source(a)mvista.com> + * + * OMAP ALSA SoC DAI driver using McBSP port + * Copyright (C) 2008 Nokia Corporation + * Contact: Jarkko Nikula <jarkko.nikula(a)bitmer.com> + * Peter Ujfalusi <peter.ujfalusi(a)ti.com> + * + * Freescale SSI ALSA SoC Digital Audio Interface (DAI) driver + * Author: Timur Tabi <timur(a)freescale.com> + * Copyright 2007-2010 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + */ + +#include <linux/init.h> +#include <linux/module.h> +#include <linux/device.h> +#include <linux/slab.h> +#include <linux/delay.h> +#include <linux/io.h> +#include <linux/clk.h> + +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/initval.h> +#include <sound/soc.h> +#include <sound/dmaengine_pcm.h> + +/* Clock registers */ +#define BCM2835_CLK_PCMCTL_REG 0x00 +#define BCM2835_CLK_PCMDIV_REG 0x04 + +/* Clock register settings */ +#define BCM2835_CLK_PASSWD (0x5a000000) +#define BCM2835_CLK_PASSWD_MASK (0xff000000) +#define BCM2835_CLK_MASH(v) ((v) << 9) +#define BCM2835_CLK_FLIP BIT(8) +#define BCM2835_CLK_BUSY BIT(7) +#define BCM2835_CLK_KILL BIT(5) +#define BCM2835_CLK_ENAB BIT(4) +#define BCM2835_CLK_SRC(v) (v) + +#define BCM2835_CLK_SHIFT (12) +#define BCM2835_CLK_DIVI(v) ((v) << BCM2835_CLK_SHIFT) +#define BCM2835_CLK_DIVF(v) (v) +#define BCM2835_CLK_DIVF_MASK (0xFFF) + +enum { + BCM2835_CLK_MASH_0 = 0, + BCM2835_CLK_MASH_1, + BCM2835_CLK_MASH_2, + BCM2835_CLK_MASH_3, +}; + +enum { + BCM2835_CLK_SRC_GND = 0, + BCM2835_CLK_SRC_OSC, + BCM2835_CLK_SRC_DBG0, + BCM2835_CLK_SRC_DBG1, + BCM2835_CLK_SRC_PLLA, + BCM2835_CLK_SRC_PLLC, + BCM2835_CLK_SRC_PLLD, + BCM2835_CLK_SRC_HDMI, +}; + +/* Most clocks are not useable (freq = 0) */ +static const unsigned int bcm2835_clk_freq[BCM2835_CLK_SRC_HDMI+1] = { + [BCM2835_CLK_SRC_GND] = 0, + [BCM2835_CLK_SRC_OSC] = 19200000, + [BCM2835_CLK_SRC_DBG0] = 0, + [BCM2835_CLK_SRC_DBG1] = 0, + [BCM2835_CLK_SRC_PLLA] = 0, + [BCM2835_CLK_SRC_PLLC] = 0, + [BCM2835_CLK_SRC_PLLD] = 500000000, + [BCM2835_CLK_SRC_HDMI] = 0, +}; + +/* I2S registers */ +#define BCM2835_I2S_CS_A_REG 0x00 +#define BCM2835_I2S_FIFO_A_REG 0x04 +#define BCM2835_I2S_MODE_A_REG 0x08 +#define BCM2835_I2S_RXC_A_REG 0x0c +#define BCM2835_I2S_TXC_A_REG 0x10 +#define BCM2835_I2S_DREQ_A_REG 0x14 +#define BCM2835_I2S_INTEN_A_REG 0x18 +#define BCM2835_I2S_INTSTC_A_REG 0x1c +#define BCM2835_I2S_GRAY_REG 0x20 + +/* I2S register settings */ +#define BCM2835_I2S_STBY BIT(25) +#define BCM2835_I2S_SYNC BIT(24) +#define BCM2835_I2S_RXSEX BIT(23) +#define BCM2835_I2S_RXF BIT(22) +#define BCM2835_I2S_TXE BIT(21) +#define BCM2835_I2S_RXD BIT(20) +#define BCM2835_I2S_TXD BIT(19) +#define BCM2835_I2S_RXR BIT(18) +#define BCM2835_I2S_TXW BIT(17) +#define BCM2835_I2S_CS_RXERR BIT(16) +#define BCM2835_I2S_CS_TXERR BIT(15) +#define BCM2835_I2S_RXSYNC BIT(14) +#define BCM2835_I2S_TXSYNC BIT(13) +#define BCM2835_I2S_DMAEN BIT(9) +#define BCM2835_I2S_RXTHR(v) ((v) << 7) +#define BCM2835_I2S_TXTHR(v) ((v) << 5) +#define BCM2835_I2S_RXCLR BIT(4) +#define BCM2835_I2S_TXCLR BIT(3) +#define BCM2835_I2S_TXON BIT(2) +#define BCM2835_I2S_RXON BIT(1) +#define BCM2835_I2S_EN (1) + +#define BCM2835_I2S_CLKDIS BIT(28) +#define BCM2835_I2S_PDMN BIT(27) +#define BCM2835_I2S_PDME BIT(26) +#define BCM2835_I2S_FRXP BIT(25) +#define BCM2835_I2S_FTXP BIT(24) +#define BCM2835_I2S_CLKM BIT(23) +#define BCM2835_I2S_CLKI BIT(22) +#define BCM2835_I2S_FSM BIT(21) +#define BCM2835_I2S_FSI BIT(20) +#define BCM2835_I2S_FLEN(v) ((v) << 10) +#define BCM2835_I2S_FSLEN(v) (v) + +#define BCM2835_I2S_CHWEX BIT(15) +#define BCM2835_I2S_CHEN BIT(14) +#define BCM2835_I2S_CHPOS(v) ((v) << 4) +#define BCM2835_I2S_CHWID(v) (v) +#define BCM2835_I2S_CH1(v) ((v) << 16) +#define BCM2835_I2S_CH2(v) (v) + +#define BCM2835_I2S_TX_PANIC(v) ((v) << 24) +#define BCM2835_I2S_RX_PANIC(v) ((v) << 16) +#define BCM2835_I2S_TX(v) ((v) << 8) +#define BCM2835_I2S_RX(v) (v) + +#define BCM2835_I2S_INT_RXERR BIT(3) +#define BCM2835_I2S_INT_TXERR BIT(2) +#define BCM2835_I2S_INT_RXR BIT(1) +#define BCM2835_I2S_INT_TXW BIT(0) + +/* I2S DMA interface */ +/* FIXME: Needs IOMMU support */ +#define BCM2835_VCMMU_SHIFT (0x7E000000 - 0x20000000) + +/* General device struct */ +struct bcm2835_i2s_dev { + struct device *dev; + struct snd_dmaengine_dai_dma_data dma_data[2]; + unsigned int fmt; + unsigned int bclk_ratio; + + struct regmap *i2s_regmap; + struct regmap *clk_regmap; +}; + +static void bcm2835_i2s_start_clock(struct bcm2835_i2s_dev *dev) +{ + /* Start the clock if in master mode */ + unsigned int master = dev->fmt & SND_SOC_DAIFMT_MASTER_MASK; + + switch (master) { + case SND_SOC_DAIFMT_CBS_CFS: + case SND_SOC_DAIFMT_CBS_CFM: + regmap_update_bits(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, + BCM2835_CLK_PASSWD_MASK | BCM2835_CLK_ENAB, + BCM2835_CLK_PASSWD | BCM2835_CLK_ENAB); + break; + default: + break; + } +} + +static void bcm2835_i2s_stop_clock(struct bcm2835_i2s_dev *dev) +{ + uint32_t clkreg; + int timeout = 1000; + + /* Stop clock */ + regmap_update_bits(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, + BCM2835_CLK_PASSWD_MASK | BCM2835_CLK_ENAB, + BCM2835_CLK_PASSWD); + + /* Wait for the BUSY flag going down */ + while (--timeout) { + regmap_read(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, &clkreg); + if (!(clkreg & BCM2835_CLK_BUSY)) + break; + } + + if (!timeout) { + /* KILL the clock */ + dev_err(dev->dev, "I2S clock didn't stop. Kill the clock!\n"); + regmap_update_bits(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, + BCM2835_CLK_KILL | BCM2835_CLK_PASSWD_MASK, + BCM2835_CLK_KILL | BCM2835_CLK_PASSWD); + } +} + +static void bcm2835_i2s_clear_fifos(struct bcm2835_i2s_dev *dev, + bool tx, bool rx) +{ + int timeout = 1000; + uint32_t syncval; + uint32_t csreg; + uint32_t i2s_active_state; + uint32_t clkreg; + uint32_t clk_active_state; + uint32_t off; + uint32_t clr; + + off = tx ? BCM2835_I2S_TXON : 0; + off |= rx ? BCM2835_I2S_RXON : 0; + + clr = tx ? BCM2835_I2S_TXCLR : 0; + clr |= rx ? BCM2835_I2S_RXCLR : 0; + + /* Backup the current state */ + regmap_read(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, &csreg); + i2s_active_state = csreg & (BCM2835_I2S_RXON | BCM2835_I2S_TXON); + + regmap_read(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, &clkreg); + clk_active_state = clkreg & BCM2835_CLK_ENAB; + + /* Start clock if not running */ + if (!clk_active_state) { + regmap_update_bits(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, + BCM2835_CLK_PASSWD_MASK | BCM2835_CLK_ENAB, + BCM2835_CLK_PASSWD | BCM2835_CLK_ENAB); + } + + /* Stop I2S module */ + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, off, 0); + + /* + * Clear the FIFOs + * Requires at least 2 PCM clock cycles to take effect + */ + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, clr, clr); + + /* Wait for 2 PCM clock cycles */ + + /* + * Toggle the SYNC flag. After 2 PCM clock cycles it can be read back + * FIXME: This does not seem to work for slave mode! + */ + regmap_read(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, &syncval); + syncval &= BCM2835_I2S_SYNC; + + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, + BCM2835_I2S_SYNC, ~syncval); + + /* Wait for the SYNC flag changing it's state */ + while (--timeout) { + regmap_read(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, &csreg); + if ((csreg & BCM2835_I2S_SYNC) != syncval) + break; + } + + if (!timeout) + dev_err(dev->dev, "I2S SYNC error!\n"); + + /* Stop clock if it was not running before */ + if (!clk_active_state) + bcm2835_i2s_stop_clock(dev); + + /* Restore I2S state */ + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, + BCM2835_I2S_RXON | BCM2835_I2S_TXON, i2s_active_state); +} + +static int bcm2835_i2s_set_dai_fmt(struct snd_soc_dai *dai, + unsigned int fmt) +{ + struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); + dev->fmt = fmt; + return 0; +} + +static int bcm2835_i2s_set_dai_bclk_ratio(struct snd_soc_dai *dai, + unsigned int ratio) +{ + struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); + dev->bclk_ratio = ratio; + return 0; +} + +static int bcm2835_i2s_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); + + unsigned int sampling_rate = params_rate(params); + unsigned int data_length, data_delay, bclk_ratio; + unsigned int ch1pos, ch2pos, mode, format; + unsigned int mash = BCM2835_CLK_MASH_1; + unsigned int divi, divf, target_frequency; + int clk_src = -1; + unsigned int master = dev->fmt & SND_SOC_DAIFMT_MASTER_MASK; + bool bit_master = (master == SND_SOC_DAIFMT_CBS_CFS + || master == SND_SOC_DAIFMT_CBS_CFM); + + bool frame_master = (master == SND_SOC_DAIFMT_CBS_CFS + || master == SND_SOC_DAIFMT_CBM_CFS); + uint32_t csreg; + + /* + * If a stream is already enabled, + * the registers are already set properly. + */ + regmap_read(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, &csreg); + + if (csreg & (BCM2835_I2S_TXON | BCM2835_I2S_RXON)) + return 0; + + /* + * Adjust the data length according to the format. + * We prefill the half frame length with an integer + * divider of 2400 as explained at the clock settings. + * Maybe it is overwritten there, if the Integer mode + * does not apply. + */ + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_S16_LE: + data_length = 16; + bclk_ratio = 40; + break; + case SNDRV_PCM_FORMAT_S32_LE: + data_length = 32; + bclk_ratio = 80; + break; + default: + return -EINVAL; + } + + /* If bclk_ratio already set, use that one. */ + if (dev->bclk_ratio) + bclk_ratio = dev->bclk_ratio; + + /* + * Clock Settings + * + * The target frequency of the bit clock is + * sampling rate * frame length + * + * Integer mode: + * Sampling rates that are multiples of 8000 kHz + * can be driven by the oscillator of 19.2 MHz + * with an integer divider as long as the frame length + * is an integer divider of 19200000/8000=2400 as set up above. + * This is no longer possible if the sampling rate + * is too high (e.g. 192 kHz), because the oscillator is too slow. + * + * MASH mode: + * For all other sampling rates, it is not possible to + * have an integer divider. Approximate the clock + * with the MASH module that induces a slight frequency + * variance. To minimize that it is best to have the fastest + * clock here. That is PLLD with 500 MHz. + */ + target_frequency = sampling_rate * bclk_ratio; + clk_src = BCM2835_CLK_SRC_OSC; + mash = BCM2835_CLK_MASH_0; + + if (bcm2835_clk_freq[clk_src] % target_frequency == 0 + && bit_master && frame_master) { + divi = bcm2835_clk_freq[clk_src] / target_frequency; + divf = 0; + } else { + uint64_t dividend; + + if (!dev->bclk_ratio) { + /* + * Overwrite bclk_ratio, because the + * above trick is not needed or can + * not be used. + */ + bclk_ratio = 2 * data_length; + } + + target_frequency = sampling_rate * bclk_ratio; + + clk_src = BCM2835_CLK_SRC_PLLD; + mash = BCM2835_CLK_MASH_1; + + dividend = bcm2835_clk_freq[clk_src]; + dividend <<= BCM2835_CLK_SHIFT; + do_div(dividend, target_frequency); + divi = dividend >> BCM2835_CLK_SHIFT; + divf = dividend & BCM2835_CLK_DIVF_MASK; + } + + /* Set clock divider */ + regmap_write(dev->clk_regmap, BCM2835_CLK_PCMDIV_REG, BCM2835_CLK_PASSWD + | BCM2835_CLK_DIVI(divi) + | BCM2835_CLK_DIVF(divf)); + + /* Setup clock, but don't start it yet */ + regmap_write(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, BCM2835_CLK_PASSWD + | BCM2835_CLK_MASH(mash) + | BCM2835_CLK_SRC(clk_src)); + + /* Setup the frame format */ + format = BCM2835_I2S_CHEN; + + if (data_length > 24) + format |= BCM2835_I2S_CHWEX; + + format |= BCM2835_I2S_CHWID((data_length-8)&0xf); + + switch (dev->fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + data_delay = 1; + break; + default: + /* + * TODO + * Others are possible but are not implemented at the moment. + */ + dev_err(dev->dev, "%s:bad format\n", __func__); + return -EINVAL; + } + + ch1pos = data_delay; + ch2pos = bclk_ratio / 2 + data_delay; + + switch (params_channels(params)) { + case 2: + format = BCM2835_I2S_CH1(format) | BCM2835_I2S_CH2(format); + format |= BCM2835_I2S_CH1(BCM2835_I2S_CHPOS(ch1pos)); + format |= BCM2835_I2S_CH2(BCM2835_I2S_CHPOS(ch2pos)); + break; + default: + return -EINVAL; + } + + /* + * Set format for both streams. + * We cannot set another frame length + * (and therefore word length) anyway, + * so the format will be the same. + */ + regmap_write(dev->i2s_regmap, BCM2835_I2S_RXC_A_REG, format); + regmap_write(dev->i2s_regmap, BCM2835_I2S_TXC_A_REG, format); + + /* Setup the I2S mode */ + mode = 0; + + if (data_length <= 16) { + /* + * Use frame packed mode (2 channels per 32 bit word) + * We cannot set another frame length in the second stream + * (and therefore word length) anyway, + * so the format will be the same. + */ + mode |= BCM2835_I2S_FTXP | BCM2835_I2S_FRXP; + } + + mode |= BCM2835_I2S_FLEN(bclk_ratio - 1); + mode |= BCM2835_I2S_FSLEN(bclk_ratio / 2); + + /* Master or slave? */ + switch (dev->fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBS_CFS: + /* CPU is master */ + break; + case SND_SOC_DAIFMT_CBM_CFS: + /* + * CODEC is bit clock master + * CPU is frame master + */ + mode |= BCM2835_I2S_CLKM; + break; + case SND_SOC_DAIFMT_CBS_CFM: + /* + * CODEC is frame master + * CPU is bit clock master + */ + mode |= BCM2835_I2S_FSM; + break; + case SND_SOC_DAIFMT_CBM_CFM: + /* CODEC is master */ + mode |= BCM2835_I2S_CLKM; + mode |= BCM2835_I2S_FSM; + break; + default: + dev_err(dev->dev, "%s:bad master\n", __func__); + return -EINVAL; + } + + /* + * Invert clocks? + * + * The BCM approach seems to be inverted to the classical I2S approach. + */ + switch (dev->fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + /* None. Therefore, both for BCM */ + mode |= BCM2835_I2S_CLKI; + mode |= BCM2835_I2S_FSI; + break; + case SND_SOC_DAIFMT_IB_IF: + /* Both. Therefore, none for BCM */ + break; + case SND_SOC_DAIFMT_NB_IF: + /* + * Invert only frame sync. Therefore, + * invert only bit clock for BCM + */ + mode |= BCM2835_I2S_CLKI; + break; + case SND_SOC_DAIFMT_IB_NF: + /* + * Invert only bit clock. Therefore, + * invert only frame sync for BCM + */ + mode |= BCM2835_I2S_FSI; + break; + default: + return -EINVAL; + } + + regmap_write(dev->i2s_regmap, BCM2835_I2S_MODE_A_REG, mode); + + /* Setup the DMA parameters */ + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, + BCM2835_I2S_RXTHR(1) + | BCM2835_I2S_TXTHR(1) + | BCM2835_I2S_DMAEN, 0xffffffff); + + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_DREQ_A_REG, + BCM2835_I2S_TX_PANIC(0x10) + | BCM2835_I2S_RX_PANIC(0x30) + | BCM2835_I2S_TX(0x30) + | BCM2835_I2S_RX(0x20), 0xffffffff); + + /* Clear FIFOs */ + bcm2835_i2s_clear_fifos(dev, true, true); + + return 0; +} + +static int bcm2835_i2s_prepare(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); + uint32_t cs_reg; + + bcm2835_i2s_start_clock(dev); + + /* + * Clear both FIFOs if the one that should be started + * is not empty at the moment. This should only happen + * after overrun. Otherwise, hw_params would have cleared + * the FIFO. + */ + regmap_read(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, &cs_reg); + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK + && !(cs_reg & BCM2835_I2S_TXE)) + bcm2835_i2s_clear_fifos(dev, true, false); + else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE + && (cs_reg & BCM2835_I2S_RXD)) + bcm2835_i2s_clear_fifos(dev, false, true); + + return 0; +} + +static void bcm2835_i2s_stop(struct bcm2835_i2s_dev *dev, + struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + uint32_t mask; + + if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) + mask = BCM2835_I2S_RXON; + else + mask = BCM2835_I2S_TXON; + + regmap_update_bits(dev->i2s_regmap, + BCM2835_I2S_CS_A_REG, mask, 0); + + /* Stop also the clock when not SND_SOC_DAIFMT_CONT */ + if (!dai->active && !(dev->fmt & SND_SOC_DAIFMT_CONT)) + bcm2835_i2s_stop_clock(dev); +} + +static int bcm2835_i2s_trigger(struct snd_pcm_substream *substream, int cmd, + struct snd_soc_dai *dai) +{ + struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); + uint32_t mask; + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + case SNDRV_PCM_TRIGGER_RESUME: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + bcm2835_i2s_start_clock(dev); + + if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) + mask = BCM2835_I2S_RXON; + else + mask = BCM2835_I2S_TXON; + + regmap_update_bits(dev->i2s_regmap, + BCM2835_I2S_CS_A_REG, mask, mask); + break; + + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + bcm2835_i2s_stop(dev, substream, dai); + break; + default: + return -EINVAL; + } + + return 0; +} + +static int bcm2835_i2s_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); + + if (dai->active) + return 0; + + /* Should this still be running stop it */ + bcm2835_i2s_stop_clock(dev); + + /* Enable PCM block */ + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, + BCM2835_I2S_EN, BCM2835_I2S_EN); + + /* + * Disable STBY. + * Requires at least 4 PCM clock cycles to take effect. + */ + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, + BCM2835_I2S_STBY, BCM2835_I2S_STBY); + + return 0; +} + +static void bcm2835_i2s_shutdown(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); + + bcm2835_i2s_stop(dev, substream, dai); + + /* If both streams are stopped, disable module and clock */ + if (dai->active) + return; + + /* Disable the module */ + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, + BCM2835_I2S_EN, 0); + + /* + * Stopping clock is necessary, because stop does + * not stop the clock when SND_SOC_DAIFMT_CONT + */ + bcm2835_i2s_stop_clock(dev); +} + +static const struct snd_soc_dai_ops bcm2835_i2s_dai_ops = { + .startup = bcm2835_i2s_startup, + .shutdown = bcm2835_i2s_shutdown, + .prepare = bcm2835_i2s_prepare, + .trigger = bcm2835_i2s_trigger, + .hw_params = bcm2835_i2s_hw_params, + .set_fmt = bcm2835_i2s_set_dai_fmt, + .set_bclk_ratio = bcm2835_i2s_set_dai_bclk_ratio +}; + +static int bcm2835_i2s_dai_probe(struct snd_soc_dai *dai) +{ + struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); + + snd_soc_dai_init_dma_data(dai, + &dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK], + &dev->dma_data[SNDRV_PCM_STREAM_CAPTURE]); + + return 0; +} + +static struct snd_soc_dai_driver bcm2835_i2s_dai = { + .name = "bcm2835-i2s", + .probe = bcm2835_i2s_dai_probe, + .playback = { + .channels_min = 2, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000_192000, + .formats = SNDRV_PCM_FMTBIT_S16_LE + | SNDRV_PCM_FMTBIT_S32_LE + }, + .capture = { + .channels_min = 2, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000_192000, + .formats = SNDRV_PCM_FMTBIT_S16_LE + | SNDRV_PCM_FMTBIT_S32_LE + }, + .ops = &bcm2835_i2s_dai_ops, + .symmetric_rates = 1 +}; + +static bool bcm2835_i2s_volatile_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case BCM2835_I2S_CS_A_REG: + case BCM2835_I2S_FIFO_A_REG: + case BCM2835_I2S_INTSTC_A_REG: + case BCM2835_I2S_GRAY_REG: + return true; + default: + return false; + }; +} + +static bool bcm2835_i2s_precious_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case BCM2835_I2S_FIFO_A_REG: + return true; + default: + return false; + }; +} + +static bool bcm2835_clk_volatile_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case BCM2835_CLK_PCMCTL_REG: + return true; + default: + return false; + }; +} + +static const struct regmap_config bcm2835_regmap_config[] = { + { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + .max_register = BCM2835_I2S_GRAY_REG, + .precious_reg = bcm2835_i2s_precious_reg, + .volatile_reg = bcm2835_i2s_volatile_reg, + .cache_type = REGCACHE_RBTREE, + }, + { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + .max_register = BCM2835_CLK_PCMDIV_REG, + .volatile_reg = bcm2835_clk_volatile_reg, + .cache_type = REGCACHE_RBTREE, + }, +}; + +static const struct snd_soc_component_driver bcm2835_i2s_component = { + .name = "bcm2835-i2s-comp", +}; + +static int bcm2835_i2s_probe(struct platform_device *pdev) +{ + struct bcm2835_i2s_dev *dev; + int i; + int ret; + struct regmap *regmap[2]; + struct resource *mem[2]; + + /* Request both ioareas */ + for (i = 0; i <= 1; i++) { + void __iomem *base; + + mem[i] = platform_get_resource(pdev, IORESOURCE_MEM, i); + base = devm_ioremap_resource(&pdev->dev, mem[i]); + if (IS_ERR(base)) + return PTR_ERR(base); + + regmap[i] = devm_regmap_init_mmio(&pdev->dev, base, + &bcm2835_regmap_config[i]); + if (IS_ERR(regmap[i])) { + dev_err(&pdev->dev, "I2S probe: regmap init failed\n"); + return PTR_ERR(regmap[i]); + } + } + + dev = devm_kzalloc(&pdev->dev, sizeof(*dev), + GFP_KERNEL); + if (IS_ERR(base)) + return PTR_ERR(base); + + dev->i2s_regmap = regmap[0]; + dev->clk_regmap = regmap[1]; + + /* Set the DMA address */ + dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK].addr = + (dma_addr_t)mem[0]->start + BCM2835_I2S_FIFO_A_REG + + BCM2835_VCMMU_SHIFT; + + dev->dma_data[SNDRV_PCM_STREAM_CAPTURE].addr = + (dma_addr_t)mem[0]->start + BCM2835_I2S_FIFO_A_REG + + BCM2835_VCMMU_SHIFT; + + /* Set the bus width */ + dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK].addr_width = + DMA_SLAVE_BUSWIDTH_4_BYTES; + dev->dma_data[SNDRV_PCM_STREAM_CAPTURE].addr_width = + DMA_SLAVE_BUSWIDTH_4_BYTES; + + /* Set burst */ + dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK].maxburst = 2; + dev->dma_data[SNDRV_PCM_STREAM_CAPTURE].maxburst = 2; + + /* BCLK ratio - use default */ + dev->bclk_ratio = 0; + + /* Store the pdev */ + dev->dev = &pdev->dev; + dev_set_drvdata(&pdev->dev, dev); + + ret = snd_soc_register_component(&pdev->dev, + &bcm2835_i2s_component, &bcm2835_i2s_dai, 1); + + if (ret) { + dev_err(&pdev->dev, "Could not register DAI: %d\n", ret); + ret = -ENOMEM; + return ret; + } + + ret = snd_dmaengine_pcm_register(&pdev->dev, NULL, 0); + if (ret) { + dev_err(&pdev->dev, "Could not register PCM: %d\n", ret); + snd_soc_unregister_component(&pdev->dev); + return ret; + } + + return 0; +} + +static const struct of_device_id bcm2835_i2s_of_match[] = { + { .compatible = "brcm,bcm2835-i2s", }, + {}, +}; + +static int bcm2835_i2s_remove(struct platform_device *pdev) +{ + snd_dmaengine_pcm_unregister(&pdev->dev); + snd_soc_unregister_component(&pdev->dev); + return 0; +} + +static struct platform_driver bcm2835_i2s_driver = { + .probe = bcm2835_i2s_probe, + .remove = bcm2835_i2s_remove, + .driver = { + .name = "bcm2835-i2s", + .owner = THIS_MODULE, + .of_match_table = bcm2835_i2s_of_match, + }, +}; + +module_platform_driver(bcm2835_i2s_driver); + +MODULE_ALIAS("platform:bcm2835-i2s"); +MODULE_DESCRIPTION("BCM2835 I2S interface"); +MODULE_AUTHOR("Florian Meier <florian.meier(a)koalo.de>"); +MODULE_LICENSE("GPL v2"); -- 1.7.9.5

2 2

Re: [alsa-devel] [Report] ALSO: hda - CA0132: Bugs and missing features
by Dylan Reid 22 Nov '13

22 Nov '13

On Tue, Nov 19, 2013 at 8:08 AM, Andreas Reis <andreas.reis(a)gmail.com> wrote: > Correction: The other jack duplicated for the front panel is Mic In > (no mention of the rear panel jack's shared Line In functionality > here), not Rear Speaker Out. > > On Tue, Nov 19, 2013 at 5:04 PM, Andreas Reis <andreas.reis(a)gmail.com> wrote: >> Posting here by Takashi's advice after my alsa-user post remained unanswered. >> >> There are a number of grave issues with the CA0132 codec on my >> Gigabyte G1.Sniper M5 (rev. 1.0) (Intel Z87, Recon3Di onboard, latest >> bios F8c). I've tried kernels (x64) from 3.9 to 3.13-preRC1 (as >> currently in Torvald's git), both with pulse on Ubuntu 13.10 and >> without on Arch Linux. >> Sorry I don't have good news for you. The CA0132 is very dependent on the firmware that is loaded into the DSP that resides in the codec. To get your system to work you'll have to obtain the firmware that was designed for your motherboard, then change the Linux driver to be able to talk to it, without a spec for how it works. This is not impossible, but it would be rather time consuming. -Dylan

2 1

[alsa-devel] [PATCH] ALSA: hda - Set current_headset_type to ALC_HEADSET_TYPE_ENUM (janitorial)
by David Henningsson 22 Nov '13

22 Nov '13

current_headset_type should be of the HEADSET_TYPE enum, not the HEADSET_MODE enum. Since ALC_HEADSET_TYPE_UNKNOWN and ALC_HEADSET_MODE_UNKNOWN are both 0, this patch is just janitorial. Signed-off-by: David Henningsson <david.henningsson(a)canonical.com> --- sound/pci/hda/patch_realtek.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index 6d8d9b3..5e42059 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -3414,7 +3414,7 @@ static void alc_update_headset_mode_hook(struct hda_codec *codec, static void alc_update_headset_jack_cb(struct hda_codec *codec, struct hda_jack_tbl *jack) { struct alc_spec *spec = codec->spec; - spec->current_headset_type = ALC_HEADSET_MODE_UNKNOWN; + spec->current_headset_type = ALC_HEADSET_TYPE_UNKNOWN; snd_hda_gen_hp_automute(codec, jack); } -- 1.7.9.5

2 1

[alsa-devel] [PATCH] ASoC: wm8991: Use a supply to manage input power
by Mark Brown 22 Nov '13

22 Nov '13

From: Mark Brown <broonie(a)linaro.org> Instead of using a fake register and events to manage input power use a supply to do the job, saving code and preparing for regmap conversion of the driver. Signed-off-by: Mark Brown <broonie(a)linaro.org> --- sound/soc/codecs/wm8991.c | 53 +++++++++++++++-------------------------------- sound/soc/codecs/wm8991.h | 9 -------- 2 files changed, 17 insertions(+), 45 deletions(-) diff --git a/sound/soc/codecs/wm8991.c b/sound/soc/codecs/wm8991.c index 3a39df7a3829..5078fc8e10f7 100644 --- a/sound/soc/codecs/wm8991.c +++ b/sound/soc/codecs/wm8991.c @@ -374,30 +374,6 @@ static const struct snd_kcontrol_new wm8991_snd_controls[] = { /* * _DAPM_ Controls */ -static int inmixer_event(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event) -{ - u16 reg, fakepower; - - reg = snd_soc_read(w->codec, WM8991_POWER_MANAGEMENT_2); - fakepower = snd_soc_read(w->codec, WM8991_INTDRIVBITS); - - if (fakepower & ((1 << WM8991_INMIXL_PWR_BIT) | - (1 << WM8991_AINLMUX_PWR_BIT))) - reg |= WM8991_AINL_ENA; - else - reg &= ~WM8991_AINL_ENA; - - if (fakepower & ((1 << WM8991_INMIXR_PWR_BIT) | - (1 << WM8991_AINRMUX_PWR_BIT))) - reg |= WM8991_AINR_ENA; - else - reg &= ~WM8991_AINR_ENA; - - snd_soc_write(w->codec, WM8991_POWER_MANAGEMENT_2, reg); - return 0; -} - static int outmixer_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { @@ -655,6 +631,11 @@ static const struct snd_soc_dapm_widget wm8991_dapm_widgets[] = { SND_SOC_DAPM_INPUT("RIN2"), SND_SOC_DAPM_INPUT("Internal ADC Source"), + SND_SOC_DAPM_SUPPLY("INL", WM8991_POWER_MANAGEMENT_2, + WM8991_AINL_ENA_BIT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("INR", WM8991_POWER_MANAGEMENT_2, + WM8991_AINR_ENA_BIT, 0, NULL, 0), + /* DACs */ SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8991_POWER_MANAGEMENT_2, WM8991_ADCL_ENA_BIT, 0), @@ -676,26 +657,22 @@ static const struct snd_soc_dapm_widget wm8991_dapm_widgets[] = { ARRAY_SIZE(wm8991_dapm_rin34_pga_controls)), /* INMIXL */ - SND_SOC_DAPM_MIXER_E("INMIXL", WM8991_INTDRIVBITS, WM8991_INMIXL_PWR_BIT, 0, + SND_SOC_DAPM_MIXER("INMIXL", SND_SOC_NOPM, 0, 0, &wm8991_dapm_inmixl_controls[0], - ARRAY_SIZE(wm8991_dapm_inmixl_controls), - inmixer_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), + ARRAY_SIZE(wm8991_dapm_inmixl_controls)), /* AINLMUX */ - SND_SOC_DAPM_MUX_E("AINLMUX", WM8991_INTDRIVBITS, WM8991_AINLMUX_PWR_BIT, 0, - &wm8991_dapm_ainlmux_controls, inmixer_event, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), + SND_SOC_DAPM_MUX("AINLMUX", SND_SOC_NOPM, 0, 0, + &wm8991_dapm_ainlmux_controls), /* INMIXR */ - SND_SOC_DAPM_MIXER_E("INMIXR", WM8991_INTDRIVBITS, WM8991_INMIXR_PWR_BIT, 0, + SND_SOC_DAPM_MIXER("INMIXR", SND_SOC_NOPM, 0, 0, &wm8991_dapm_inmixr_controls[0], - ARRAY_SIZE(wm8991_dapm_inmixr_controls), - inmixer_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), + ARRAY_SIZE(wm8991_dapm_inmixr_controls)), /* AINRMUX */ - SND_SOC_DAPM_MUX_E("AINRMUX", WM8991_INTDRIVBITS, WM8991_AINRMUX_PWR_BIT, 0, - &wm8991_dapm_ainrmux_controls, inmixer_event, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), + SND_SOC_DAPM_MUX("AINRMUX", SND_SOC_NOPM, 0, 0, + &wm8991_dapm_ainrmux_controls), /* Output Side */ /* DACs */ @@ -797,6 +774,10 @@ static const struct snd_soc_dapm_route audio_map[] = { {"Right ADC", NULL, "Internal ADC Source"}, /* Input Side */ + {"INMIXL", NULL, "INL"}, + {"AINLMUX", NULL, "INL"}, + {"INMIXR", NULL, "INR"}, + {"AINRMUX", NULL, "INR"}, /* LIN12 PGA */ {"LIN12 PGA", "LIN1 Switch", "LIN1"}, {"LIN12 PGA", "LIN2 Switch", "LIN2"}, diff --git a/sound/soc/codecs/wm8991.h b/sound/soc/codecs/wm8991.h index 07707d8d7e20..08ed383303c0 100644 --- a/sound/soc/codecs/wm8991.h +++ b/sound/soc/codecs/wm8991.h @@ -76,7 +76,6 @@ #define WM8991_PLL1 0x3C #define WM8991_PLL2 0x3D #define WM8991_PLL3 0x3E -#define WM8991_INTDRIVBITS 0x3F #define WM8991_REGISTER_COUNT 60 #define WM8991_MAX_REGISTER 0x3F @@ -807,14 +806,6 @@ */ #define WM8991_PLLK2_MASK 0x00FF /* PLLK2 - [7:0] */ -/* - * R63 (0x3F) - Internal Driver Bits - */ -#define WM8991_INMIXL_PWR_BIT 0 -#define WM8991_AINLMUX_PWR_BIT 1 -#define WM8991_INMIXR_PWR_BIT 2 -#define WM8991_AINRMUX_PWR_BIT 3 - #define WM8991_MCLK_DIV 0 #define WM8991_DACCLK_DIV 1 #define WM8991_ADCCLK_DIV 2 -- 1.8.4.4

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[alsa-devel] Audio Mini Conference Minutes - Edinburgh 21st October 2013
by Liam Girdwood 22 Nov '13

22 Nov '13

I've pasted below the minutes from this years ALSA developer mini conference in Edinburgh. I'll also add it to the developer Wiki alongside some slides from Eric and Tanu (once I know the correct answer to the anti-spam captcha). Fwiw, there are some interesting "unclaimed" tasks/projects below. Please feel free to volunteer for anything below that may interest you. Btw, if you are replying to start a thread about a certain subject below, please snip the other context and change the email to match the new $SUBJECT. This should make things easier to track. Thanks Liam Audio BOF - Monday October 21st 2013 - Edinburgh ================================================ Attendees :- ----------------------------------------------------------------------- Mark Brown, Liam Girdwood, Pierre Bossart, Patrick Lai, Lars-Peter Clausen, Eric Laurent, David Henningsson, Takashi Iwai, Colin Guthrie, Tanu Kaskinen, Arun Raghavan, Paul Handrigan, Daniel Mack, Dylan Reid, Sven Neuman, Dmimtris Papastamos, Charles Keepax, Nariman Poushin, João Paulo Rechi Vita, Alexander Patrakov, Micheal Wu, Lennart Poettering Topics ======= Pulseaudio route management and UCM ----------------------------------- There was interest for shared policy configuration file format across different systems. No such sharing has been planned. Tanu's initial reaction is that it's not feasible, but he is open to discussing it. What to do if there are multiple paths from A to B? One will be chosen, either arbitrarily or based on connection requirements or prioritization. How to control effect offloading? Tanu's vague idea is that if some kind of filtering is required/preferred, it's expressed as a requirement for a connection, and the node implementation will then enable the details of enabling the effect if such effect is available. Tanu doesn't know how well that would work in practice - and probably unaware of many details that would have to be taken into account. UCM being used by some people but missing good documentation. Liam to write documentation and use examples from Arun as "gold standard" example configurations. More UCM configs to go online in alsa-lib repo. UCM configs sometimes need updated for new kernel releases as Kcontrol strings have changed. Suggestions made for additional UUID for each kcontrol to lessen UCM config name changes (e.g. vendor-part-reg-shift-mask could be used as ASoC kcontrol UUID). Naming changes also effect HDA kcontrols, but no HDA UCM configs yet ? kcontrol UUID harder for DSP and HDA. Arun reported UCM issue with combination of devices. e.g. Enable dev 1 & 2 then disable dev 1 & 2. Maybe virtual device that combines devices ?? #include for UCM - should be easy to add. Simplifies config for family of similar devices like Panda, PandaES etc Device Names in UCM names. There are some standard names in UCM header but need more. Liam to add more names. Arbitration, UCM does not do arbitration but leaves that up to sound server. Controls names need more standardisation. Kcontrol naming mainly based on HW specified within data sheets. Difficult for userspace to cope with great degree of naming variations and provide enough information for userspace to know which volume is master etc. Audio Delay and Timing granularity ---------------------------------- Some DMA drivers very bad at providing position information used to work out buffer positions. Difficult for userspace to render audio and wake up correctly with such HW unless we can provide mechanism for userspace to know the DMA position accuracy. IOCTL suggested, info is in driver so easy to expose. There already is the SNDRV_PCM_INFO_BATCH flag which is supposed to indicated that the granularity is period-size-ish. It makes sense for applications like pulse-audio to check whether this flag is set or not. Hostless Audio -------------- Hostless should now use kcontrol to join the graph links to enable or disable and not hostless PCM device (old Android hack). e.g. FM playback loopback to codec, Modem PCM handling. i.e. CODEC <-> CODEC type. Need mixer to expose set config changes as link config is static e.g. WB/NB configs. Audio Offloading for Android ---------------------------- Avail in KK, supports > 1 compressed devices. No guarantee on no dropped samples when changing compressed to PCM and vice versa (or enabling effects ????) Not available yet when in use with video, no tech reason to stop this. AV sync good. Some effects can be offloaded and some not. Compressed API -------------- Intel to upstream remaining fixes. AR - Liam, Vinod. Stable updates with no users. 3.10 is stable but we can changes core API since there are no users. Android Audio Effects Framework Modifications --------------------------------------------- Composite with HW and SW representations. Supports 3rd party GUI controls but they must use the effect API and not bypass with private IOCTLs. How do we do library, like tiny effects ? API exists in use by Factory, can we extend to alsa ? Nobody using compressed and effects outside of Android atm. 24 Bit HiRes Audio for Android ------------------------------ How do we handle 24 bit audio at fast rates e.g. 192kHz. Being pushed by market. Flac suggested as source media and not PCM. We could use offload, on roadmap for Hires audio on android PCM, maybe float instead of 24 bit. Need for 192kHz, Probably not use effects. Effect Support in ALSA ---------------------- Several proposals for APIs. Control device type, do we need new control or use existing CTL ? Per card or per DSP / CODEC. ? Not to use control API for everything , could confuse some userspace. Get/set could be any control type, not just binary ? Binary blobs used to hide workings of effects. Topology Query and edit - query the graph from HDA/DAPM - used to establish connections and end points. per card based IOCTL. Could be new alsamixer to allow users to control volumes. Media controller API. How do we match to ALSA. Need non LGPL library for android. Missing certain features, someone needs to write code. MC API is Video oriented, library is just wrappers around IOCTLs, 1 man week of simple work to implement non LGPL version. Removal/creation - kernel can provide any type of information to user space key values. Document new keys, generic structure. Channel mapping possible using tuples. Need to support dynamic entity information. Handles static pipeline well, and can also expose dynamic with some complexity (with more entities). Abstract away sink+sources in userspace library, maybe too complex. Trivial to use UUIDs for dynamic entities. Start with prototype and see what happens. Action on Intel/Vinod ? Topology 2 NODES and EFFECT IOCTLS could be replaced with media controller as MediaC provides good match. Sending/Receiving Binary data to drivers ---------------------------------------- Use cases that go above 256/512 ? byte limit for binary controls. Extend for larger ? Do something about it. Action for ????? Tiwai/Mark ???? MMAP for some parameters. Visualizer, peak meters. ? Multiple of 4k pages. Can be used for DMA buffer positions on IPC IRQ based DSPs. Avoid copying large amounts of data. trade off for DSP. Usable for DEBUG too. Prototype and see what happens - Who ?? Expose API for sending large chunks of data e.g. 2MB. Nice for generic code to send this data (no special tooling) Needs new API for large data chunks. What about write(). Patrick to prototype some code. DSP resource management ----------------------- Do we need pre-trigger to work out MIPS/MHz + buffer resources for DSP resources. Tables used atm for most DSPs. Something for policy or UCM to specify ? Could change for different FWs. Peak and average loading gives difficulty. Might not get feedback, latency in the pipe and need to agree on units of measurements. Complex problem. Estimate worst case. OMAP4 example uses DAPM, expose reource usage numbers, expose capability limits. Liam to publish clock resource management logic for Haswell DSP. Can be used as starting point for investigations into feasibility etc. HDMI - Hotplug -------------- Can cause changes to audio path. Do we need to tell userspace card has changed ? Specific for ELD or generic problem ? Suggestion to remove and then insert card not usable Signal for monitor re-pluging, ELD not available right away. How to sync ELD information, ELD time out signal ? DSPs can change capabilities, ELDS can be garbage. PA maybe ask to quickly for ELD info, expose new jack for HDA when ELD is known. Generic event to tell userspace that card has changed. HDA/MIMI specific solution. Generic API to talk between audio and DRM devices. Bespoke atm. Code lives in the wrong place atm. Need to sync. Code is already upstream. David to prototype a solution based on deferring the probe until ELD is ready. Mic/LED hotkey -------------- Few different scenarios - from slides. Multiple cards and multiple mics. Which Mic will LED represent ? card or system or other. We'll not use the LED class because it does not buy us anything: LED class is writable for root only, and PA does not run as root. Nobody seemed to have a firm convincing argument in any direction. As such, keeping the current behaviour (reflect mute state of internal card) will be kept for now. Alexander suggested looking at what NetworkManager does with the wifi-off indicator in the presence of multiple wireless devices with (potentially) their own wifi-off switches. Performance - Use case startup ------------------------------ Discussing optimisation from DPCM - users QC, TI and Intel. DSP can route to multiple endpoints from a single PCM. Startup call back -> PCM -> FE -> BE. Then hw_params(), followed by prepare() and trigger(). Cold start latency 113ms on QDSP since some slow ops on QDSP are serialised. Solution to shift some prepare() work into DAPM. DAPM ops are tun in parallel and a workq. Compressed offload ------------------ Video/Audio offload - pass audio timestamp. Metadata for QDSP stored at front of compressed data by QC. Transport stream already supported by compressed API. Timestamps may differ in DSP implementations. AV sync topic requested by V4Linux for long time. Only discussed for PCM not offload, need TS for offload and support of V4Linux guys. Compressed offload transcoding. - How do we specify this transform. New API for userspace to spec output of decoder. All sorts of routing combinations are possible making implementation very difficult. Query the the BE connected to the FE, we may be able to call existing PCM API's on the BE PCM. Patrick to prototype some code. Firmware based Kcontrols and Graphs ----------------------------------- Patches have been developed to attach Kcontrol and Graph meta data to DSP FW. This allows single DSP driver to be used with multiple FWs without modification. Patch V1 reviewed last year before TI layoff and we should be ready for V2 before end of year. Consists of kernel patch and userspace tool to generate the control and graph data. Current userspace tool is needing work to improve config generation. There is no config file format at present. Paul and some Wolfson guys have volunteered to assist in this effort. Code currently works on OMAP4 platforms. Kernel code is here (top 5 patches) :- https://git.kernel.org/cgit/linux/kernel/git/lrg/asoc.git/log/?h=topic/firm… Userspace tool is here :- git@gitorious.org:omap-audio/asoc-fw.git Clean up ALSA code ------------------ Move plugins to their projects - move ffmpeg plugin to ffmpeg project, etc. Drivers, requests to move to device probe model, away from alsa model. Need to register device files at end of driver creation. Input susbsys uses possible method that could be copied. sysfs files need sync to avoid races for creation. Agreement. Process, How do we work ----------------------- Bug reports. Who looks at bugs. No takers. New mailing lists ? no, just use filters to hide emails that are not of interest. Misc ---- Softvol, add SND_CTL for no softvol in ctl open. Use alsa conf file or ctl. Arun encouraged to revive the email thread on the topic. Possible bug where specially crafted javascript can set PA volume to 100%. Defined pulseaudio behviour (Colin), related to flat volumes. New ASoC drivers must now use generic DMA engine PCM driver. Non atomic trigger requirments from DSP drivers. DSPs mostly sleep when performing IPC and need a trigger call that can sleep. Patrick will investigate. Propagate errors from BEs to FEs. Patrick to investigate. This will also include reporting underruns too. System restart for DSP FW crashes. This requires reloading all FW and trying to recover all active streams. Patrick to investigate. Lennart asked about the support of audio "mute" via systemd session management, like input and drm drivers already do. Takashi took a look at input evdev code, and actually it's revoking instead of muting. The advantage of revoking over muting is that it's simpler and doesn't need the capability check, as far as he read through discussion threads. But Takashi is not sure whether revoking behavior is good for PA at all.

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[alsa-devel] [PATCH] ALSA: hda - Provide missing pin configs for VAIO with ALC260
by Takashi Iwai 22 Nov '13

22 Nov '13

Some models (or maybe depending on BIOS version) of Sony VAIO with ALC260 give no proper pin configurations as default, resulting in the non-working speaker, etc. Just provide the whole pin configurations via a fixup. Reported-by: Matthew Markus <mmarkus(a)hearit.co> Cc: <stable(a)vger.kernel.org> Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- sound/pci/hda/patch_realtek.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index bb653dd0f813..6d8d9b3520d0 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -1512,6 +1512,7 @@ enum { ALC260_FIXUP_KN1, ALC260_FIXUP_FSC_S7020, ALC260_FIXUP_FSC_S7020_JWSE, + ALC260_FIXUP_VAIO_PINS, }; static void alc260_gpio1_automute(struct hda_codec *codec) @@ -1652,6 +1653,24 @@ static const struct hda_fixup alc260_fixups[] = { .chained = true, .chain_id = ALC260_FIXUP_FSC_S7020, }, + [ALC260_FIXUP_VAIO_PINS] = { + .type = HDA_FIXUP_PINS, + .v.pins = (const struct hda_pintbl[]) { + /* Pin configs are missing completely on some VAIOs */ + { 0x0f, 0x01211020 }, + { 0x10, 0x0001003f }, + { 0x11, 0x411111f0 }, + { 0x12, 0x01a15930 }, + { 0x13, 0x411111f0 }, + { 0x14, 0x411111f0 }, + { 0x15, 0x411111f0 }, + { 0x16, 0x411111f0 }, + { 0x17, 0x411111f0 }, + { 0x18, 0x411111f0 }, + { 0x19, 0x411111f0 }, + { } + } + }, }; static const struct snd_pci_quirk alc260_fixup_tbl[] = { @@ -1660,6 +1679,7 @@ static const struct snd_pci_quirk alc260_fixup_tbl[] = { SND_PCI_QUIRK(0x1025, 0x008f, "Acer", ALC260_FIXUP_GPIO1), SND_PCI_QUIRK(0x103c, 0x280a, "HP dc5750", ALC260_FIXUP_HP_DC5750), SND_PCI_QUIRK(0x103c, 0x30ba, "HP Presario B1900", ALC260_FIXUP_HP_B1900), + SND_PCI_QUIRK(0x104d, 0x81bb, "Sony VAIO", ALC260_FIXUP_VAIO_PINS), SND_PCI_QUIRK(0x104d, 0x81e2, "Sony VAIO TX", ALC260_FIXUP_HP_PIN_0F), SND_PCI_QUIRK(0x10cf, 0x1326, "FSC LifeBook S7020", ALC260_FIXUP_FSC_S7020), SND_PCI_QUIRK(0x1509, 0x4540, "Favorit 100XS", ALC260_FIXUP_GPIO1), -- 1.8.4.3

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[alsa-devel] acceptable noise level for mic boost
by Oleksij Rempel 21 Nov '13

21 Nov '13

Hello Takashi, what is acceptable noise level for mic boost? My laptop has three levels of mic boost (+36dB). Level 3 is useless since noise level will be about 0db. With level 1 i get -12dB noise, so there is almost 12dB room for data... but it is not enough for normal speech, which is about 20dB. Are there any ALSA guide for HW designers, which will say some thing like acceptable levels are 90-20dB? There are some Skype and Microsoft prescriptions for certification. For example M$ prescribe 18dB or more for speech to noise ration for build in mics. It sound like good number to start. In my case, i need to remove mic boost completely to guarantee minimum 18dB SpNR. Suddenly i didn't found correct way to do it. I will be thankful for some tip. -- Regards, Oleksij

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[alsa-devel] [PATCH v2 4/4]: ALSA: oxygen: The new Xonar DG mixer implementation
by Roman Volkov 21 Nov '13

21 Nov '13

The mixer now at the upper level of hierarchy and actually controls the Xonar DG driver. There are also other system structures like model description structure needed for upper-level oxygen driver. Headphone volume control is implemented in the mixer instead of selecting the HP impedance (I have my own Xonar DG card and that's okay). Independent volume and mute control of each capture source. Signed-off-by: Roman I. Volkov <v1ron(a)mail.ru> --- diff -uprN linux-3.12/sound/pci/oxygen/Makefile linux-3.12-my/sound/pci/oxygen/Makefile --- linux-3.12/sound/pci/oxygen/Makefile 2013-11-04 03:41:51.000000000 +0400 +++ linux-3.12-my/sound/pci/oxygen/Makefile 2013-11-20 19:04:54.000000000 +0400 @@ -1,5 +1,5 @@ snd-oxygen-lib-objs := oxygen_io.o oxygen_lib.o oxygen_mixer.o oxygen_pcm.o -snd-oxygen-objs := oxygen.o xonar_dg.o +snd-oxygen-objs := oxygen.o xonar_dg_mixer.o xonar_dg.o snd-virtuoso-objs := virtuoso.o xonar_lib.o \ xonar_pcm179x.o xonar_cs43xx.o xonar_wm87x6.o xonar_hdmi.o diff -uprN linux-3.12/sound/pci/oxygen/xonar_dg_mixer.c linux-3.12-my/sound/pci/oxygen/xonar_dg_mixer.c --- linux-3.12/sound/pci/oxygen/xonar_dg_mixer.c 1970-01-01 03:00:00.000000000 +0300 +++ linux-3.12-my/sound/pci/oxygen/xonar_dg_mixer.c 2013-11-21 14:05:55.000000000 +0400 @@ -0,0 +1,483 @@ +/* + * Mixer controls for the Xonar DG/DGX + * + * Copyright (c) Clemens Ladisch <clemens(a)ladisch.de> + * Copyright (c) Roman Volkov <v1ron(a)mail.ru> + * + * This driver is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2. + * + * This driver is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this driver; if not, see <http://www.gnu.org/licenses/>. + */ + +/* + * It is not good that we do not have software volume control + * as the Windows driver does. CS4361 cannot attenuate the volume. + * When we are switching from headphones to the speakers, + * which are controlled by the simple DAC CS4361, our headphones + * in the rear jack can stun us. + */ + +#include <linux/pci.h> +#include <linux/delay.h> +#include <sound/control.h> +#include <sound/core.h> +#include <sound/info.h> +#include <sound/pcm.h> +#include <sound/tlv.h> +#include "oxygen.h" +#include "xonar_dg.h" +#include "cs4245.h" + +/* CS4245 Headphone Channels A&B Volume Control */ +static int xonar_dg_dac_stereo_volume_info(struct snd_kcontrol *ctl, + struct snd_ctl_elem_info *info) +{ + info->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + info->count = 2; + info->value.integer.min = 0; + info->value.integer.max = 255; + return 0; +} + +static int xonar_dg_dac_stereo_volume_get(struct snd_kcontrol *ctl, + struct snd_ctl_elem_value *val) +{ + struct oxygen *chip = ctl->private_data; + struct dg *data = chip->model_data; + unsigned int tmp; + + mutex_lock(&chip->mutex); + tmp = (~data->cs4245_shadow[CS4245_DAC_A_CTRL]) & 255; + val->value.integer.value[0] = tmp; + tmp = (~data->cs4245_shadow[CS4245_DAC_B_CTRL]) & 255; + val->value.integer.value[1] = tmp; + mutex_unlock(&chip->mutex); + return 0; +} + +static int xonar_dg_dac_stereo_volume_put(struct snd_kcontrol *ctl, + struct snd_ctl_elem_value *val) +{ + struct oxygen *chip = ctl->private_data; + struct dg *data = chip->model_data; + + if ((val->value.integer.value[0] > 255) || + (val->value.integer.value[0] < 0) || + (val->value.integer.value[1] > 255) || + (val->value.integer.value[1] < 0)) { + return -EINVAL; + } + mutex_lock(&chip->mutex); + data->cs4245_shadow[CS4245_DAC_A_CTRL] = ~val->value.integer.value[0]; + data->cs4245_shadow[CS4245_DAC_B_CTRL] = ~val->value.integer.value[1]; + cs4245_write_spi(chip, CS4245_DAC_A_CTRL); + cs4245_write_spi(chip, CS4245_DAC_B_CTRL); + mutex_unlock(&chip->mutex); + return 0; +} + +/* CS4245 DAC Mute */ +static int xonar_dg_dac_mute_get(struct snd_kcontrol *ctl, + struct snd_ctl_elem_value *val) +{ + struct oxygen *chip = ctl->private_data; + struct dg *data = chip->model_data; + + mutex_lock(&chip->mutex); + val->value.integer.value[0] = ((data->cs4245_shadow[CS4245_DAC_CTRL_1] + & CS4245_MUTE_DAC) == 0); + mutex_unlock(&chip->mutex); + return 0; +} + +static int xonar_dg_dac_mute_put(struct snd_kcontrol *ctl, + struct snd_ctl_elem_value *val) +{ + struct oxygen *chip = ctl->private_data; + struct dg *data = chip->model_data; + + if (val->value.integer.value[0] > 1) + return -EINVAL; + mutex_lock(&chip->mutex); + data->cs4245_shadow[CS4245_DAC_CTRL_1] &= ~CS4245_MUTE_DAC; + data->cs4245_shadow[CS4245_DAC_CTRL_1] |= + (~val->value.integer.value[0] << 2) & CS4245_MUTE_DAC; + cs4245_write_spi(chip, CS4245_DAC_CTRL_1); + mutex_unlock(&chip->mutex); + return 0; +} + +/* Xonar DG Output Select */ +static int xonar_dg_pcm_route_apply(struct oxygen *chip) +{ + struct dg *data = chip->model_data; + + data->cs4245_shadow[CS4245_SIGNAL_SEL] &= + ~CS4245_A_OUT_SEL_MASK; + if (data->pcm_output == PLAYBACK_DST_HP) { + /* Mute FP (aux output) amplifier, switch rear jack to CS4245 */ + oxygen_set_bits8(chip, OXYGEN_GPIO_DATA, GPIO_HP_REAR); + } else if (data->pcm_output == PLAYBACK_DST_HP_FP) { + /* + * Unmute FP amplifier, switch rear jack to CS4361, + * I2S ports 2,3,4 should be inactive + */ + oxygen_clear_bits8(chip, OXYGEN_GPIO_DATA, GPIO_HP_REAR); + data->cs4245_shadow[CS4245_SIGNAL_SEL] |= CS4245_A_OUT_SEL_DAC; + } else { + /* + * 2.0, 4.0, 5.1: switch to CS4361, mute FP amp., + * and change playback routing / DMA channels + */ + oxygen_clear_bits8(chip, OXYGEN_GPIO_DATA, GPIO_HP_REAR); + } + cs4245_write_spi(chip, CS4245_SIGNAL_SEL); + return 0; +} + +static int xonar_dg_pcm_route_info(struct snd_kcontrol *ctl, + struct snd_ctl_elem_info *info) +{ + static const char *const names[3] = { + "Stereo Headphones", + "Stereo Headphones FP", + "Multichannel", + }; + + return snd_ctl_enum_info(info, 1, 3, names); +} + +static int xonar_dg_pcm_route_get(struct snd_kcontrol *ctl, + struct snd_ctl_elem_value *val) +{ + struct oxygen *chip = ctl->private_data; + struct dg *data = chip->model_data; + + mutex_lock(&chip->mutex); + val->value.integer.value[0] = data->pcm_output; + mutex_unlock(&chip->mutex); + + return 0; +} + +static int xonar_dg_pcm_route_put(struct snd_kcontrol *ctl, + struct snd_ctl_elem_value *val) +{ + struct oxygen *chip = ctl->private_data; + struct dg *data = chip->model_data; + int ret; + + mutex_lock(&chip->mutex); + data->pcm_output = val->value.integer.value[0]; + ret = xonar_dg_pcm_route_apply(chip); + oxygen_update_dac_routing(chip); + mutex_unlock(&chip->mutex); + + return ret; +} + +/* CS4245 PGA Source */ +static int xonar_dg_pga_mute_reg_toggle(struct oxygen *chip, bool mute); +static int xonar_dg_pga_volume_reg_write(struct oxygen *chip, char left, + char right); + +static int xonar_dg_pga_source_apply(struct oxygen *chip) +{ + struct dg *data = chip->model_data; + + data->cs4245_shadow[CS4245_ANALOG_IN] &= ~CS4245_SEL_MASK; + if (data->pga_source == CAPTURE_SRC_FP_MIC) + data->cs4245_shadow[CS4245_ANALOG_IN] |= CS4245_SEL_INPUT_2; + else if (data->pga_source == CAPTURE_SRC_LINE) + data->cs4245_shadow[CS4245_ANALOG_IN] |= CS4245_SEL_INPUT_4; + else if (data->pga_source != CAPTURE_SRC_MIC) + data->cs4245_shadow[CS4245_ANALOG_IN] |= CS4245_SEL_INPUT_1; + oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, GPIO_INPUT_ROUTE); + return cs4245_write_spi(chip, CS4245_ANALOG_IN); +} + +static int xonar_dg_pga_source_info(struct snd_kcontrol *ctl, + struct snd_ctl_elem_info *info) +{ + static const char *const ps_names[4] = { + "Microphone", + "Microphone FP", + "Line In", + "Aux" + }; + + return snd_ctl_enum_info(info, 1, 4, ps_names); +} + +static int xonar_dg_pga_source_get(struct snd_kcontrol *ctl, + struct snd_ctl_elem_value *val) +{ + struct oxygen *chip = ctl->private_data; + struct dg *data = chip->model_data; + + mutex_lock(&chip->mutex); + val->value.integer.value[0] = data->pga_source; + mutex_unlock(&chip->mutex); + + return 0; +} + +/* Switch the source and change volume/mute */ +static int xonar_dg_pga_source_put(struct snd_kcontrol *ctl, + struct snd_ctl_elem_value *val) +{ + struct oxygen *chip = ctl->private_data; + struct dg *data = chip->model_data; + long route = val->value.integer.value[0]; + int ret; + + if ((route > CAPTURE_SRC_AUX) || (route < 0)) + return -EINVAL; + + mutex_lock(&chip->mutex); + data->pga_source = route; + ret = xonar_dg_pga_source_apply(chip); + if (ret < 0) + goto err; + ret = xonar_dg_pga_mute_reg_toggle(chip, data->cap_mute[route]); + if (ret < 0) + goto err; + ret = xonar_dg_pga_volume_reg_write(chip, + data->cap_vol[route][0], + data->cap_vol[route][1]); + if (ret < 0) + goto err; +err: + mutex_unlock(&chip->mutex); + + return ret; +} + +/* Common routines to access capture volume register - Mic, Line, Aux */ +static int xonar_dg_pga_volume_reg_write(struct oxygen *chip, char left, + char right) +{ + struct dg *data = chip->model_data; + int ret; + + data->cs4245_shadow[CS4245_PGA_A_CTRL] = left; + data->cs4245_shadow[CS4245_PGA_B_CTRL] = right; + ret = cs4245_write_spi(chip, CS4245_PGA_A_CTRL); + if (ret < 0) + return ret; + return cs4245_write_spi(chip, CS4245_PGA_B_CTRL); +} + +static int xonar_dg_pga_volume_info(struct snd_kcontrol *ctl, + struct snd_ctl_elem_info *info) +{ + info->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + info->count = 2; + info->value.integer.min = -24; + info->value.integer.max = 24; + return 0; +} + +static int xonar_dg_pga_volume_get(struct snd_kcontrol *ctl, + struct snd_ctl_elem_value *val) +{ + struct oxygen *chip = ctl->private_data; + struct dg *data = chip->model_data; + + mutex_lock(&chip->mutex); + val->value.integer.value[0] = data->cap_vol[ctl->private_value][0]; + val->value.integer.value[1] = data->cap_vol[ctl->private_value][1]; + mutex_unlock(&chip->mutex); + + return 0; +} + +static int xonar_dg_pga_volume_put(struct snd_kcontrol *ctl, + struct snd_ctl_elem_value *val) +{ + struct oxygen *chip = ctl->private_data; + struct dg *data = chip->model_data; + long left = val->value.integer.value[0]; + long right = val->value.integer.value[1]; + int ret = 0; + + if ((left > 24) || (left < -24) || (right > 24) || (right < -24)) + return -EINVAL; + + mutex_lock(&chip->mutex); + data->cap_vol[ctl->private_value][0] = left; + data->cap_vol[ctl->private_value][1] = right; + ret = xonar_dg_pga_volume_reg_write(chip, + data->cap_vol[data->pga_source][0], + data->cap_vol[data->pga_source][1]); + mutex_unlock(&chip->mutex); + + return ret; +} + +/* Common routines to access capture mute register - Mic, Line, Aux */ +static int xonar_dg_pga_mute_reg_toggle(struct oxygen *chip, bool mute) +{ + struct dg *data = chip->model_data; + + data->cs4245_shadow[CS4245_ADC_CTRL] &= ~CS4245_MUTE_ADC; + data->cs4245_shadow[CS4245_ADC_CTRL] |= ((mute == 0) << 2) & + CS4245_MUTE_ADC; + return cs4245_write_spi(chip, CS4245_ADC_CTRL); +} + +static int xonar_dg_pga_mute_get(struct snd_kcontrol *ctl, + struct snd_ctl_elem_value *val) +{ + struct oxygen *chip = ctl->private_data; + struct dg *data = chip->model_data; + + mutex_lock(&chip->mutex); + val->value.integer.value[0] = (long)data->cap_mute[ctl->private_value]; + mutex_unlock(&chip->mutex); + + return 0; +} + +static int xonar_dg_pga_mute_put(struct snd_kcontrol *ctl, + struct snd_ctl_elem_value *val) +{ + struct oxygen *chip = ctl->private_data; + struct dg *data = chip->model_data; + long tmp = val->value.integer.value[0]; + int ret = 0; + + if ((tmp > 1) || (tmp < 0)) + return -EINVAL; + + mutex_lock(&chip->mutex); + data->cap_mute[ctl->private_value] = tmp != 0; + ret = xonar_dg_pga_mute_reg_toggle(chip, + data->cap_mute[data->pga_source]); + mutex_unlock(&chip->mutex); + + return ret; +} + +#define CAPTURE_VOLUME(xname, private) { \ + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ + .name = xname, \ + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \ + SNDRV_CTL_ELEM_ACCESS_TLV_READ, \ + .info = xonar_dg_pga_volume_info, \ + .get = xonar_dg_pga_volume_get, \ + .put = xonar_dg_pga_volume_put, \ + .tlv = { .p = xonar_dg_pga_db_scale, }, \ + .private_value = private, \ + } +#define CAPTURE_SWITCH(xname, private) { \ + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ + .name = xname, \ + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, \ + .info = snd_ctl_boolean_mono_info, \ + .get = xonar_dg_pga_mute_get, \ + .put = xonar_dg_pga_mute_put, \ + .private_value = private, \ + } + +static const DECLARE_TLV_DB_MINMAX(xonar_dg_hp_db_scale, -12550, 0); +static const DECLARE_TLV_DB_MINMAX(xonar_dg_pga_db_scale, -1200, 1200); +static const struct snd_kcontrol_new xonar_dg_controls[] = { + { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .name = "Headphone Playback Volume", + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | + SNDRV_CTL_ELEM_ACCESS_TLV_READ, + .info = xonar_dg_dac_stereo_volume_info, + .get = xonar_dg_dac_stereo_volume_get, + .put = xonar_dg_dac_stereo_volume_put, + .tlv = { .p = xonar_dg_hp_db_scale, }, + }, + { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .name = "Headphone Playback Switch", + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .info = snd_ctl_boolean_mono_info, + .get = xonar_dg_dac_mute_get, + .put = xonar_dg_dac_mute_put, + }, + { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .name = "Output Playback Enum", + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .info = xonar_dg_pcm_route_info, + .get = xonar_dg_pcm_route_get, + .put = xonar_dg_pcm_route_put, + }, + { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .name = "Input Capture Enum", + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .info = xonar_dg_pga_source_info, + .get = xonar_dg_pga_source_get, + .put = xonar_dg_pga_source_put, + }, + CAPTURE_VOLUME("Mic Capture Volume", CAPTURE_SRC_MIC), + CAPTURE_SWITCH("Mic Capture Switch", CAPTURE_SRC_MIC), + CAPTURE_VOLUME("FP Mic Capture Volume", CAPTURE_SRC_FP_MIC), + CAPTURE_SWITCH("FP Mic Capture Switch", CAPTURE_SRC_FP_MIC), + CAPTURE_VOLUME("Line Capture Volume", CAPTURE_SRC_LINE), + CAPTURE_SWITCH("Line Capture Switch", CAPTURE_SRC_LINE), + CAPTURE_VOLUME("Aux Capture Volume", CAPTURE_SRC_AUX), + CAPTURE_SWITCH("Aux Capture Switch", CAPTURE_SRC_AUX), +}; + +int xonar_dg_mixer_init(struct oxygen *chip) +{ + unsigned int i; + int ret; + for (i = 0; i < ARRAY_SIZE(xonar_dg_controls); i++) { + ret = snd_ctl_add(chip->card, + snd_ctl_new1(&xonar_dg_controls[i], chip)); + if (ret < 0) + return ret; + } + return 0; +} + +/* Disable built-in volume control, we have only headphone volume */ +static int xonar_control_filter(struct snd_kcontrol_new *template) +{ + if (!strncmp(template->name, "Master Playback ", 16)) + return 1; + return 0; +} + +struct oxygen_model model_xonar_dg = { + .longname = "C-Media Oxygen HD Audio", + .chip = "CMI8786", + .init = dg_init, + .control_filter = xonar_control_filter, + .mixer_init = xonar_dg_mixer_init, + .cleanup = dg_cleanup, + .suspend = dg_suspend, + .resume = dg_resume, + .set_dac_params = set_cs4245_dac_params, + .set_adc_params = set_cs4245_adc_params, + .adjust_dac_routing = adjust_dg_dac_routing, + .dump_registers = dump_cs4245_registers, + .model_data_size = sizeof(struct dg), + .device_config = PLAYBACK_0_TO_I2S | + PLAYBACK_1_TO_SPDIF | + CAPTURE_0_FROM_I2S_1 | + CAPTURE_1_FROM_SPDIF, + .dac_channels_pcm = 6, + .dac_channels_mixer = 0, + .function_flags = OXYGEN_FUNCTION_SPI, + .dac_mclks = OXYGEN_MCLKS(256, 128, 128), + .adc_mclks = OXYGEN_MCLKS(256, 128, 128), + .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST, + .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST, +}; -- Kind regards, Roman Volkov, v1ron(a)mail.ru

1 0

[alsa-devel] [PATCH v2 3/4]: ALSA: oxygen: Move the Xonar DG mixer code away from this file and actual driver changes
by Roman Volkov 21 Nov '13

21 Nov '13

Move the mixer controls and other system structures to a separate file. Also there are actual driver changes: Multichannel routing, CS4245 initialization, CS4245 SPI reading and writing, DAC/ADC settings, suspend/resume logic. Signed-off-by: Roman I. Volkov <v1ron(a)mail.ru> --- I can confirm, the driver also works with OXYGEN_FUNCTION_ENABLE_SPI_4_5 removed. diff -uprN linux-3.12/sound/pci/oxygen/oxygen_mixer.c linux-3.12-my/sound/pci/oxygen/oxygen_mixer.c --- linux-3.12/sound/pci/oxygen/oxygen_mixer.c 2013-11-04 03:41:51.000000000 +0400 +++ linux-3.12-my/sound/pci/oxygen/oxygen_mixer.c 2013-11-20 19:13:09.000000000 +0400 @@ -190,6 +190,7 @@ void oxygen_update_dac_routing(struct ox if (chip->model.update_center_lfe_mix) chip->model.update_center_lfe_mix(chip, chip->dac_routing > 2); } +EXPORT_SYMBOL(oxygen_update_dac_routing); static int upmix_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value) { diff -uprN linux-3.12/sound/pci/oxygen/cs4245.h linux-3.12-my/sound/pci/oxygen/cs4245.h --- linux-3.12/sound/pci/oxygen/cs4245.h 2013-11-04 03:41:51.000000000 +0400 +++ linux-3.12-my/sound/pci/oxygen/cs4245.h 2013-11-20 12:08:07.000000000 +0400 @@ -103,5 +103,6 @@ #define CS4245_ADC_UNDRFL 0x01 -#define CS4245_SPI_ADDRESS (0x9e << 16) -#define CS4245_SPI_WRITE (0 << 16) +#define CS4245_SPI_ADDRESS 0x9e +#define CS4245_SPI_WRITE 0 +#define CS4245_SPI_READ 1 diff -uprN linux-3.12/sound/pci/oxygen/xonar_dg.h linux-3.12-my/sound/pci/oxygen/xonar_dg.h --- linux-3.12/sound/pci/oxygen/xonar_dg.h 2013-11-04 03:41:51.000000000 +0400 +++ linux-3.12-my/sound/pci/oxygen/xonar_dg.h 2013-11-21 13:41:44.000000000 +0400 @@ -3,6 +3,51 @@ #include "oxygen.h" +#define GPIO_MAGIC 0x0008 +#define GPIO_HP_DETECT 0x0010 +#define GPIO_INPUT_ROUTE 0x0060 +#define GPIO_HP_REAR 0x0080 +#define GPIO_OUTPUT_ENABLE 0x0100 + +#define CAPTURE_SRC_MIC 0 +#define CAPTURE_SRC_FP_MIC 1 +#define CAPTURE_SRC_LINE 2 +#define CAPTURE_SRC_AUX 3 + +#define PLAYBACK_DST_HP 0 +#define PLAYBACK_DST_HP_FP 1 +#define PLAYBACK_DST_MULTICH 2 + extern struct oxygen_model model_xonar_dg; +/* Xonar DG Specific Data */ +struct dg { + unsigned char cs4245_shadow[16]; + /* Output select: headphone/speakers */ + unsigned char pcm_output; + /* Input select: Mic, FP Mic, Line, Aux */ + unsigned char pga_source; + /* Independent capture volume */ + char cap_vol[4][2]; + bool cap_mute[4]; +}; + +/* Xonar DG control routines */ +int cs4245_write_spi(struct oxygen *chip, u8 reg); +int cs4245_read_spi(struct oxygen *chip, u8 reg); +int cs4245_read_shadow(struct oxygen *chip); +int cs4245_write_shadow(struct oxygen *chip); +void dg_init(struct oxygen *chip); +void set_cs4245_dac_params(struct oxygen *chip, + struct snd_pcm_hw_params *params); +void set_cs4245_adc_params(struct oxygen *chip, + struct snd_pcm_hw_params *params); +unsigned int adjust_dg_dac_routing(struct oxygen *chip, + unsigned int play_routing); +void dump_cs4245_registers(struct oxygen *chip, + struct snd_info_buffer *buffer); +void dg_suspend(struct oxygen *chip); +void dg_resume(struct oxygen *chip); +void dg_cleanup(struct oxygen *chip); + #endif diff -uprN linux-3.12/sound/pci/oxygen/xonar_dg.c linux-3.12-my/sound/pci/oxygen/xonar_dg.c --- linux-3.12/sound/pci/oxygen/xonar_dg.c 2013-11-04 03:41:51.000000000 +0400 +++ linux-3.12-my/sound/pci/oxygen/xonar_dg.c 2013-11-21 16:35:02.000000000 +0400 @@ -1,8 +1,8 @@ /* - * card driver for the Xonar DG/DGX + * Card driver for the Xonar DG/DGX * * Copyright (c) Clemens Ladisch <clemens(a)ladisch.de> - * + * Copyright (c) Roman Volkov <v1ron(a)mail.ru> * * This driver is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License, version 2. @@ -20,29 +20,37 @@ * Xonar DG/DGX * ------------ * + * CS4245/CS4361 both will mute all outputs if any clock ratio of + * any I²S channel is invalid. + * * CMI8788: * * SPI 0 -> CS4245 * + * Playback: * I²S 1 -> CS4245 * I²S 2 -> CS4361 (center/LFE) * I²S 3 -> CS4361 (surround) * I²S 4 -> CS4361 (front) + * Capture: + * I²S ADC 1 <- CS4245 * * GPIO 3 <- ? * GPIO 4 <- headphone detect - * GPIO 5 -> route input jack to line-in (0) or mic-in (1) - * GPIO 6 -> route input jack to line-in (0) or mic-in (1) - * GPIO 7 -> enable rear headphone amp - * GPIO 8 -> enable output to speakers + * GPIO 5 -> ADC analog circuit power supply control for left channel (?) + * GPIO 6 -> ADC analog circuit power supply control for right channel (?) + * GPIO 7 -> switches green rear output jack between CS4245 / CS4361 first + * channel (mechanical relay) + * GPIO 8 -> DAC analog circuit power supply control (?) * * CS4245: * - * input 1 <- aux - * input 2 <- front mic - * input 4 <- line/mic + * input 0 <- Microphone + * input 1 <- Aux + * input 2 <- Front Panel Mic + * input 4 <- Line In * DAC out -> headphones - * aux out -> front panel headphones + * AUX out -> front panel headphones */ #include <linux/pci.h> @@ -56,553 +64,214 @@ #include "xonar_dg.h" #include "cs4245.h" -#define GPIO_MAGIC 0x0008 -#define GPIO_HP_DETECT 0x0010 -#define GPIO_INPUT_ROUTE 0x0060 -#define GPIO_HP_REAR 0x0080 -#define GPIO_OUTPUT_ENABLE 0x0100 - -struct dg { - unsigned int output_sel; - s8 input_vol[4][2]; - unsigned int input_sel; - u8 hp_vol_att; - u8 cs4245_regs[0x11]; -}; - -static void cs4245_write(struct oxygen *chip, unsigned int reg, u8 value) -{ - struct dg *data = chip->model_data; - - oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER | - OXYGEN_SPI_DATA_LENGTH_3 | - OXYGEN_SPI_CLOCK_1280 | - (0 << OXYGEN_SPI_CODEC_SHIFT) | - OXYGEN_SPI_CEN_LATCH_CLOCK_HI, - CS4245_SPI_ADDRESS | - CS4245_SPI_WRITE | - (reg << 8) | value); - data->cs4245_regs[reg] = value; -} - -static void cs4245_write_cached(struct oxygen *chip, unsigned int reg, u8 value) -{ - struct dg *data = chip->model_data; - - if (value != data->cs4245_regs[reg]) - cs4245_write(chip, reg, value); -} - -static void cs4245_registers_init(struct oxygen *chip) -{ - struct dg *data = chip->model_data; - - cs4245_write(chip, CS4245_POWER_CTRL, CS4245_PDN); - cs4245_write(chip, CS4245_DAC_CTRL_1, - data->cs4245_regs[CS4245_DAC_CTRL_1]); - cs4245_write(chip, CS4245_ADC_CTRL, - data->cs4245_regs[CS4245_ADC_CTRL]); - cs4245_write(chip, CS4245_SIGNAL_SEL, - data->cs4245_regs[CS4245_SIGNAL_SEL]); - cs4245_write(chip, CS4245_PGA_B_CTRL, - data->cs4245_regs[CS4245_PGA_B_CTRL]); - cs4245_write(chip, CS4245_PGA_A_CTRL, - data->cs4245_regs[CS4245_PGA_A_CTRL]); - cs4245_write(chip, CS4245_ANALOG_IN, - data->cs4245_regs[CS4245_ANALOG_IN]); - cs4245_write(chip, CS4245_DAC_A_CTRL, - data->cs4245_regs[CS4245_DAC_A_CTRL]); - cs4245_write(chip, CS4245_DAC_B_CTRL, - data->cs4245_regs[CS4245_DAC_B_CTRL]); - cs4245_write(chip, CS4245_DAC_CTRL_2, - CS4245_DAC_SOFT | CS4245_DAC_ZERO | CS4245_INVERT_DAC); - cs4245_write(chip, CS4245_INT_MASK, 0); - cs4245_write(chip, CS4245_POWER_CTRL, 0); -} - -static void cs4245_init(struct oxygen *chip) +int cs4245_write_spi(struct oxygen *chip, u8 reg) { struct dg *data = chip->model_data; - data->cs4245_regs[CS4245_DAC_CTRL_1] = - CS4245_DAC_FM_SINGLE | CS4245_DAC_DIF_LJUST; - data->cs4245_regs[CS4245_ADC_CTRL] = - CS4245_ADC_FM_SINGLE | CS4245_ADC_DIF_LJUST; - data->cs4245_regs[CS4245_SIGNAL_SEL] = - CS4245_A_OUT_SEL_HIZ | CS4245_ASYNCH; - data->cs4245_regs[CS4245_PGA_B_CTRL] = 0; - data->cs4245_regs[CS4245_PGA_A_CTRL] = 0; - data->cs4245_regs[CS4245_ANALOG_IN] = - CS4245_PGA_SOFT | CS4245_PGA_ZERO | CS4245_SEL_INPUT_4; - data->cs4245_regs[CS4245_DAC_A_CTRL] = 0; - data->cs4245_regs[CS4245_DAC_B_CTRL] = 0; - cs4245_registers_init(chip); - snd_component_add(chip->card, "CS4245"); -} - -static void dg_output_enable(struct oxygen *chip) -{ - msleep(2500); - oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, GPIO_OUTPUT_ENABLE); + return oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER | + OXYGEN_SPI_DATA_LENGTH_3 | OXYGEN_SPI_CLOCK_1280 | + (0 << OXYGEN_SPI_CODEC_SHIFT) | OXYGEN_SPI_CEN_LATCH_CLOCK_HI, + (((u32)CS4245_SPI_ADDRESS) << 16) | (((u32)reg) << 8) | + ((u32)data->cs4245_shadow[reg])); } -static void dg_init(struct oxygen *chip) +int cs4245_read_spi(struct oxygen *chip, u8 reg) { struct dg *data = chip->model_data; + int ret; - data->output_sel = 0; - data->input_sel = 3; - data->hp_vol_att = 2 * 16; + ret = oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER | + OXYGEN_SPI_DATA_LENGTH_2 | + OXYGEN_SPI_CEN_LATCH_CLOCK_HI | + OXYGEN_SPI_CLOCK_1280 | (0 << OXYGEN_SPI_CODEC_SHIFT), + (CS4245_SPI_ADDRESS << 8) | reg); + if (ret < 0) + return ret; - cs4245_init(chip); - - oxygen_clear_bits16(chip, OXYGEN_GPIO_CONTROL, - GPIO_MAGIC | GPIO_HP_DETECT); - oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, - GPIO_INPUT_ROUTE | GPIO_HP_REAR | GPIO_OUTPUT_ENABLE); - oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, - GPIO_INPUT_ROUTE | GPIO_HP_REAR); - dg_output_enable(chip); -} - -static void dg_cleanup(struct oxygen *chip) -{ - oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_OUTPUT_ENABLE); -} - -static void dg_suspend(struct oxygen *chip) -{ - dg_cleanup(chip); -} - -static void dg_resume(struct oxygen *chip) -{ - cs4245_registers_init(chip); - dg_output_enable(chip); -} - -static void set_cs4245_dac_params(struct oxygen *chip, - struct snd_pcm_hw_params *params) -{ - struct dg *data = chip->model_data; - u8 value; - - value = data->cs4245_regs[CS4245_DAC_CTRL_1] & ~CS4245_DAC_FM_MASK; - if (params_rate(params) <= 50000) - value |= CS4245_DAC_FM_SINGLE; - else if (params_rate(params) <= 100000) - value |= CS4245_DAC_FM_DOUBLE; - else - value |= CS4245_DAC_FM_QUAD; - cs4245_write_cached(chip, CS4245_DAC_CTRL_1, value); -} - -static void set_cs4245_adc_params(struct oxygen *chip, - struct snd_pcm_hw_params *params) -{ - struct dg *data = chip->model_data; - u8 value; - - value = data->cs4245_regs[CS4245_ADC_CTRL] & ~CS4245_ADC_FM_MASK; - if (params_rate(params) <= 50000) - value |= CS4245_ADC_FM_SINGLE; - else if (params_rate(params) <= 100000) - value |= CS4245_ADC_FM_DOUBLE; - else - value |= CS4245_ADC_FM_QUAD; - cs4245_write_cached(chip, CS4245_ADC_CTRL, value); -} - -static inline unsigned int shift_bits(unsigned int value, - unsigned int shift_from, - unsigned int shift_to, - unsigned int mask) -{ - if (shift_from < shift_to) - return (value << (shift_to - shift_from)) & mask; - else - return (value >> (shift_from - shift_to)) & mask; -} - -static unsigned int adjust_dg_dac_routing(struct oxygen *chip, - unsigned int play_routing) -{ - return (play_routing & OXYGEN_PLAY_DAC0_SOURCE_MASK) | - shift_bits(play_routing, - OXYGEN_PLAY_DAC2_SOURCE_SHIFT, - OXYGEN_PLAY_DAC1_SOURCE_SHIFT, - OXYGEN_PLAY_DAC1_SOURCE_MASK) | - shift_bits(play_routing, - OXYGEN_PLAY_DAC1_SOURCE_SHIFT, - OXYGEN_PLAY_DAC2_SOURCE_SHIFT, - OXYGEN_PLAY_DAC2_SOURCE_MASK) | - shift_bits(play_routing, - OXYGEN_PLAY_DAC0_SOURCE_SHIFT, - OXYGEN_PLAY_DAC3_SOURCE_SHIFT, - OXYGEN_PLAY_DAC3_SOURCE_MASK); -} - -static int output_switch_info(struct snd_kcontrol *ctl, - struct snd_ctl_elem_info *info) -{ - static const char *const names[3] = { - "Speakers", "Headphones", "FP Headphones" - }; - - return snd_ctl_enum_info(info, 1, 3, names); -} + ret = oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER | + OXYGEN_SPI_DATA_LENGTH_2 | + OXYGEN_SPI_CEN_LATCH_CLOCK_HI | + OXYGEN_SPI_CLOCK_1280 | (0 << OXYGEN_SPI_CODEC_SHIFT), + (CS4245_SPI_ADDRESS | CS4245_SPI_READ) << 8); + if (ret < 0) + return ret; -static int output_switch_get(struct snd_kcontrol *ctl, - struct snd_ctl_elem_value *value) -{ - struct oxygen *chip = ctl->private_data; - struct dg *data = chip->model_data; + data->cs4245_shadow[reg] = oxygen_read8(chip, OXYGEN_SPI_DATA1); - mutex_lock(&chip->mutex); - value->value.enumerated.item[0] = data->output_sel; - mutex_unlock(&chip->mutex); return 0; } -static int output_switch_put(struct snd_kcontrol *ctl, - struct snd_ctl_elem_value *value) +int cs4245_read_shadow(struct oxygen *chip) { - struct oxygen *chip = ctl->private_data; - struct dg *data = chip->model_data; - u8 reg; - int changed; - - if (value->value.enumerated.item[0] > 2) - return -EINVAL; + unsigned char address; + int ret; - mutex_lock(&chip->mutex); - changed = value->value.enumerated.item[0] != data->output_sel; - if (changed) { - data->output_sel = value->value.enumerated.item[0]; - - reg = data->cs4245_regs[CS4245_SIGNAL_SEL] & - ~CS4245_A_OUT_SEL_MASK; - reg |= data->output_sel == 2 ? - CS4245_A_OUT_SEL_DAC : CS4245_A_OUT_SEL_HIZ; - cs4245_write_cached(chip, CS4245_SIGNAL_SEL, reg); - - cs4245_write_cached(chip, CS4245_DAC_A_CTRL, - data->output_sel ? data->hp_vol_att : 0); - cs4245_write_cached(chip, CS4245_DAC_B_CTRL, - data->output_sel ? data->hp_vol_att : 0); - - oxygen_write16_masked(chip, OXYGEN_GPIO_DATA, - data->output_sel == 1 ? GPIO_HP_REAR : 0, - GPIO_HP_REAR); + for (address = 0; address <= 0x10; address++) { + ret = cs4245_read_spi(chip, address); + if (ret < 0) + return ret; } - mutex_unlock(&chip->mutex); - return changed; -} - -static int hp_volume_offset_info(struct snd_kcontrol *ctl, - struct snd_ctl_elem_info *info) -{ - static const char *const names[3] = { - "< 64 ohms", "64-150 ohms", "150-300 ohms" - }; - - return snd_ctl_enum_info(info, 1, 3, names); -} - -static int hp_volume_offset_get(struct snd_kcontrol *ctl, - struct snd_ctl_elem_value *value) -{ - struct oxygen *chip = ctl->private_data; - struct dg *data = chip->model_data; - - mutex_lock(&chip->mutex); - if (data->hp_vol_att > 2 * 7) - value->value.enumerated.item[0] = 0; - else if (data->hp_vol_att > 0) - value->value.enumerated.item[0] = 1; - else - value->value.enumerated.item[0] = 2; - mutex_unlock(&chip->mutex); return 0; } -static int hp_volume_offset_put(struct snd_kcontrol *ctl, - struct snd_ctl_elem_value *value) +int cs4245_write_shadow(struct oxygen *chip) { - static const s8 atts[3] = { 2 * 16, 2 * 7, 0 }; - struct oxygen *chip = ctl->private_data; - struct dg *data = chip->model_data; - s8 att; - int changed; + unsigned char address; + int ret; - if (value->value.enumerated.item[0] > 2) - return -EINVAL; - att = atts[value->value.enumerated.item[0]]; - mutex_lock(&chip->mutex); - changed = att != data->hp_vol_att; - if (changed) { - data->hp_vol_att = att; - if (data->output_sel) { - cs4245_write_cached(chip, CS4245_DAC_A_CTRL, att); - cs4245_write_cached(chip, CS4245_DAC_B_CTRL, att); - } + for (address = 0; address <= 0x10; address++) { + ret = cs4245_write_spi(chip, address); + if (ret < 0) + return ret; } - mutex_unlock(&chip->mutex); - return changed; -} - -static int input_vol_info(struct snd_kcontrol *ctl, - struct snd_ctl_elem_info *info) -{ - info->type = SNDRV_CTL_ELEM_TYPE_INTEGER; - info->count = 2; - info->value.integer.min = 2 * -12; - info->value.integer.max = 2 * 12; - return 0; -} - -static int input_vol_get(struct snd_kcontrol *ctl, - struct snd_ctl_elem_value *value) -{ - struct oxygen *chip = ctl->private_data; - struct dg *data = chip->model_data; - unsigned int idx = ctl->private_value; - - mutex_lock(&chip->mutex); - value->value.integer.value[0] = data->input_vol[idx][0]; - value->value.integer.value[1] = data->input_vol[idx][1]; - mutex_unlock(&chip->mutex); return 0; } -static int input_vol_put(struct snd_kcontrol *ctl, - struct snd_ctl_elem_value *value) +static void cs4245_init(struct oxygen *chip) { - struct oxygen *chip = ctl->private_data; struct dg *data = chip->model_data; - unsigned int idx = ctl->private_value; - int changed = 0; - if (value->value.integer.value[0] < 2 * -12 || - value->value.integer.value[0] > 2 * 12 || - value->value.integer.value[1] < 2 * -12 || - value->value.integer.value[1] > 2 * 12) - return -EINVAL; - mutex_lock(&chip->mutex); - changed = data->input_vol[idx][0] != value->value.integer.value[0] || - data->input_vol[idx][1] != value->value.integer.value[1]; - if (changed) { - data->input_vol[idx][0] = value->value.integer.value[0]; - data->input_vol[idx][1] = value->value.integer.value[1]; - if (idx == data->input_sel) { - cs4245_write_cached(chip, CS4245_PGA_A_CTRL, - data->input_vol[idx][0]); - cs4245_write_cached(chip, CS4245_PGA_B_CTRL, - data->input_vol[idx][1]); - } - } - mutex_unlock(&chip->mutex); - return changed; -} + /* save the initial state */ + cs4245_read_shadow(chip); -static DECLARE_TLV_DB_SCALE(cs4245_pga_db_scale, -1200, 50, 0); + /* + * Power up the CODEC internals, enable soft ramp & zero cross, work + * in async. mode, + * Enable AUX output from DAC. DAC output in the Windows driver is + * inverted. + */ + data->cs4245_shadow[CS4245_POWER_CTRL] = 0; + data->cs4245_shadow[CS4245_SIGNAL_SEL] = CS4245_A_OUT_SEL_DAC | + CS4245_ASYNCH; + data->cs4245_shadow[CS4245_DAC_CTRL_1] = 0; + data->cs4245_shadow[CS4245_DAC_CTRL_2] = CS4245_DAC_SOFT | + CS4245_DAC_ZERO | CS4245_INVERT_DAC; + data->cs4245_shadow[CS4245_ADC_CTRL] = 0; + data->cs4245_shadow[CS4245_ANALOG_IN] = CS4245_PGA_SOFT | + CS4245_PGA_ZERO; -static int input_sel_info(struct snd_kcontrol *ctl, - struct snd_ctl_elem_info *info) -{ - static const char *const names[4] = { - "Mic", "Aux", "Front Mic", "Line" - }; + cs4245_write_shadow(chip); - return snd_ctl_enum_info(info, 1, 4, names); + snd_component_add(chip->card, "CS4245"); } -static int input_sel_get(struct snd_kcontrol *ctl, - struct snd_ctl_elem_value *value) +void dg_init(struct oxygen *chip) { - struct oxygen *chip = ctl->private_data; - struct dg *data = chip->model_data; + /* + * The pin XGPIO1 as XGPIO1, gpios 8,7,6,5,1,0 as outputs. + */ - mutex_lock(&chip->mutex); - value->value.enumerated.item[0] = data->input_sel; - mutex_unlock(&chip->mutex); - return 0; + cs4245_init(chip); + oxygen_write16(chip, OXYGEN_GPIO_CONTROL, GPIO_OUTPUT_ENABLE | + GPIO_HP_REAR | GPIO_INPUT_ROUTE); + oxygen_write16(chip, OXYGEN_GPIO_DATA, GPIO_HP_REAR | GPIO_INPUT_ROUTE); + /* Anti-pop delay */ + msleep(2500); + oxygen_write16(chip, OXYGEN_GPIO_DATA, GPIO_OUTPUT_ENABLE | + GPIO_HP_REAR | GPIO_INPUT_ROUTE); } -static int input_sel_put(struct snd_kcontrol *ctl, - struct snd_ctl_elem_value *value) +void set_cs4245_dac_params(struct oxygen *chip, + struct snd_pcm_hw_params *params) { - static const u8 sel_values[4] = { - CS4245_SEL_MIC, - CS4245_SEL_INPUT_1, - CS4245_SEL_INPUT_2, - CS4245_SEL_INPUT_4 - }; - struct oxygen *chip = ctl->private_data; struct dg *data = chip->model_data; - int changed; - - if (value->value.enumerated.item[0] > 3) - return -EINVAL; + unsigned char dac_ctrl; + unsigned char mclk_freq; - mutex_lock(&chip->mutex); - changed = value->value.enumerated.item[0] != data->input_sel; - if (changed) { - data->input_sel = value->value.enumerated.item[0]; - - cs4245_write(chip, CS4245_ANALOG_IN, - (data->cs4245_regs[CS4245_ANALOG_IN] & - ~CS4245_SEL_MASK) | - sel_values[data->input_sel]); - - cs4245_write_cached(chip, CS4245_PGA_A_CTRL, - data->input_vol[data->input_sel][0]); - cs4245_write_cached(chip, CS4245_PGA_B_CTRL, - data->input_vol[data->input_sel][1]); - - oxygen_write16_masked(chip, OXYGEN_GPIO_DATA, - data->input_sel ? 0 : GPIO_INPUT_ROUTE, - GPIO_INPUT_ROUTE); + dac_ctrl = data->cs4245_shadow[CS4245_DAC_CTRL_1] & ~CS4245_DAC_FM_MASK; + mclk_freq = data->cs4245_shadow[CS4245_MCLK_FREQ] & ~CS4245_MCLK1_MASK; + if (params_rate(params) <= 50000) { + dac_ctrl |= CS4245_DAC_FM_SINGLE; + mclk_freq |= CS4245_MCLK_1 << CS4245_MCLK1_SHIFT; + } else if (params_rate(params) <= 100000) { + dac_ctrl |= CS4245_DAC_FM_DOUBLE; + mclk_freq |= CS4245_MCLK_1 << CS4245_MCLK1_SHIFT; + } else { + dac_ctrl |= CS4245_DAC_FM_QUAD; + mclk_freq |= CS4245_MCLK_2 << CS4245_MCLK1_SHIFT; } - mutex_unlock(&chip->mutex); - return changed; + data->cs4245_shadow[CS4245_DAC_CTRL_1] = dac_ctrl; + data->cs4245_shadow[CS4245_MCLK_FREQ] = mclk_freq; + cs4245_write_spi(chip, CS4245_DAC_CTRL_1); + cs4245_write_spi(chip, CS4245_MCLK_FREQ); } -static int hpf_info(struct snd_kcontrol *ctl, struct snd_ctl_elem_info *info) +void set_cs4245_adc_params(struct oxygen *chip, + struct snd_pcm_hw_params *params) { - static const char *const names[2] = { "Active", "Frozen" }; + struct dg *data = chip->model_data; + unsigned char adc_ctrl; + unsigned char mclk_freq; - return snd_ctl_enum_info(info, 1, 2, names); + adc_ctrl = data->cs4245_shadow[CS4245_ADC_CTRL] & ~CS4245_ADC_FM_MASK; + mclk_freq = data->cs4245_shadow[CS4245_MCLK_FREQ] & ~CS4245_MCLK2_MASK; + if (params_rate(params) <= 50000) { + adc_ctrl |= CS4245_ADC_FM_SINGLE; + mclk_freq |= CS4245_MCLK_1 << CS4245_MCLK2_SHIFT; + } else if (params_rate(params) <= 100000) { + adc_ctrl |= CS4245_ADC_FM_DOUBLE; + mclk_freq |= CS4245_MCLK_1 << CS4245_MCLK2_SHIFT; + } else { + adc_ctrl |= CS4245_ADC_FM_QUAD; + mclk_freq |= CS4245_MCLK_2 << CS4245_MCLK2_SHIFT; + } + data->cs4245_shadow[CS4245_ADC_CTRL] = adc_ctrl; + data->cs4245_shadow[CS4245_MCLK_FREQ] = mclk_freq; + cs4245_write_spi(chip, CS4245_ADC_CTRL); + cs4245_write_spi(chip, CS4245_MCLK_FREQ); } -static int hpf_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value) +unsigned int adjust_dg_dac_routing(struct oxygen *chip, + unsigned int play_routing) { - struct oxygen *chip = ctl->private_data; struct dg *data = chip->model_data; + unsigned int routing = 0; - value->value.enumerated.item[0] = - !!(data->cs4245_regs[CS4245_ADC_CTRL] & CS4245_HPF_FREEZE); - return 0; + switch (data->pcm_output) { + case PLAYBACK_DST_HP: + case PLAYBACK_DST_HP_FP: + oxygen_write8_masked(chip, OXYGEN_PLAY_ROUTING, + OXYGEN_PLAY_MUTE23 | OXYGEN_PLAY_MUTE45 | + OXYGEN_PLAY_MUTE67, OXYGEN_PLAY_MUTE_MASK); + break; + case PLAYBACK_DST_MULTICH: + routing = (0 << OXYGEN_PLAY_DAC0_SOURCE_SHIFT) | + (2 << OXYGEN_PLAY_DAC1_SOURCE_SHIFT) | + (1 << OXYGEN_PLAY_DAC2_SOURCE_SHIFT) | + (0 << OXYGEN_PLAY_DAC3_SOURCE_SHIFT); + oxygen_write8_masked(chip, OXYGEN_PLAY_ROUTING, + OXYGEN_PLAY_MUTE01, OXYGEN_PLAY_MUTE_MASK); + break; + } + return routing; } -static int hpf_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value) +void dump_cs4245_registers(struct oxygen *chip, + struct snd_info_buffer *buffer) { - struct oxygen *chip = ctl->private_data; struct dg *data = chip->model_data; - u8 reg; - int changed; + unsigned int reg; - mutex_lock(&chip->mutex); - reg = data->cs4245_regs[CS4245_ADC_CTRL] & ~CS4245_HPF_FREEZE; - if (value->value.enumerated.item[0]) - reg |= CS4245_HPF_FREEZE; - changed = reg != data->cs4245_regs[CS4245_ADC_CTRL]; - if (changed) - cs4245_write(chip, CS4245_ADC_CTRL, reg); - mutex_unlock(&chip->mutex); - return changed; -} - -#define INPUT_VOLUME(xname, index) { \ - .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ - .name = xname, \ - .info = input_vol_info, \ - .get = input_vol_get, \ - .put = input_vol_put, \ - .tlv = { .p = cs4245_pga_db_scale }, \ - .private_value = index, \ -} -static const struct snd_kcontrol_new dg_controls[] = { - { - .iface = SNDRV_CTL_ELEM_IFACE_MIXER, - .name = "Analog Output Playback Enum", - .info = output_switch_info, - .get = output_switch_get, - .put = output_switch_put, - }, - { - .iface = SNDRV_CTL_ELEM_IFACE_MIXER, - .name = "Headphones Impedance Playback Enum", - .info = hp_volume_offset_info, - .get = hp_volume_offset_get, - .put = hp_volume_offset_put, - }, - INPUT_VOLUME("Mic Capture Volume", 0), - INPUT_VOLUME("Aux Capture Volume", 1), - INPUT_VOLUME("Front Mic Capture Volume", 2), - INPUT_VOLUME("Line Capture Volume", 3), - { - .iface = SNDRV_CTL_ELEM_IFACE_MIXER, - .name = "Capture Source", - .info = input_sel_info, - .get = input_sel_get, - .put = input_sel_put, - }, - { - .iface = SNDRV_CTL_ELEM_IFACE_MIXER, - .name = "ADC High-pass Filter Capture Enum", - .info = hpf_info, - .get = hpf_get, - .put = hpf_put, - }, -}; + snd_iprintf(buffer, "\nCS4245:"); + cs4245_read_spi(chip, CS4245_INT_STATUS); + for (reg = 0; reg < ARRAY_SIZE(data->cs4245_shadow); ++reg) + snd_iprintf(buffer, " %02x", data->cs4245_shadow[reg]); + snd_iprintf(buffer, "\n"); +} -static int dg_control_filter(struct snd_kcontrol_new *template) +void dg_suspend(struct oxygen *chip) { - if (!strncmp(template->name, "Master Playback ", 16)) - return 1; - return 0; + oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_OUTPUT_ENABLE); } -static int dg_mixer_init(struct oxygen *chip) +void dg_resume(struct oxygen *chip) { - unsigned int i; - int err; - - for (i = 0; i < ARRAY_SIZE(dg_controls); ++i) { - err = snd_ctl_add(chip->card, - snd_ctl_new1(&dg_controls[i], chip)); - if (err < 0) - return err; - } - return 0; + cs4245_write_shadow(chip); + msleep(2500); + oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, GPIO_OUTPUT_ENABLE); } -static void dump_cs4245_registers(struct oxygen *chip, - struct snd_info_buffer *buffer) +void dg_cleanup(struct oxygen *chip) { - struct dg *data = chip->model_data; - unsigned int i; - - snd_iprintf(buffer, "\nCS4245:"); - for (i = 1; i <= 0x10; ++i) - snd_iprintf(buffer, " %02x", data->cs4245_regs[i]); - snd_iprintf(buffer, "\n"); + dg_suspend(chip); } - -struct oxygen_model model_xonar_dg = { - .longname = "C-Media Oxygen HD Audio", - .chip = "CMI8786", - .init = dg_init, - .control_filter = dg_control_filter, - .mixer_init = dg_mixer_init, - .cleanup = dg_cleanup, - .suspend = dg_suspend, - .resume = dg_resume, - .set_dac_params = set_cs4245_dac_params, - .set_adc_params = set_cs4245_adc_params, - .adjust_dac_routing = adjust_dg_dac_routing, - .dump_registers = dump_cs4245_registers, - .model_data_size = sizeof(struct dg), - .device_config = PLAYBACK_0_TO_I2S | - PLAYBACK_1_TO_SPDIF | - CAPTURE_0_FROM_I2S_2 | - CAPTURE_1_FROM_SPDIF, - .dac_channels_pcm = 6, - .dac_channels_mixer = 0, - .function_flags = OXYGEN_FUNCTION_SPI, - .dac_mclks = OXYGEN_MCLKS(256, 128, 128), - .adc_mclks = OXYGEN_MCLKS(256, 128, 128), - .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST, - .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST, -}; -- Kind regards, Roman Volkov, v1ron(a)mail.ru

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[alsa-devel] [PATCH v2 2/4]: ALSA: oxygen: Add mute mask to the header file
by Roman Volkov 21 Nov '13

21 Nov '13

I need this mask to mute unnecessary channels Signed-off-by: Roman I. Volkov <v1ron(a)mail.ru> --- diff -uprN linux-3.12/sound/pci/oxygen/oxygen_regs.h linux-3.12-my/sound/pci/oxygen/oxygen_regs.h --- linux-3.12/sound/pci/oxygen/oxygen_regs.h 2013-11-04 03:41:51.000000000 +0400 +++ linux-3.12-my/sound/pci/oxygen/oxygen_regs.h 2013-11-20 12:08:07.000000000 +0400 @@ -318,6 +318,7 @@ #define OXYGEN_PLAY_MUTE23 0x0002 #define OXYGEN_PLAY_MUTE45 0x0004 #define OXYGEN_PLAY_MUTE67 0x0008 +#define OXYGEN_PLAY_MUTE_MASK 0x000f #define OXYGEN_PLAY_MULTICH_MASK 0x0010 #define OXYGEN_PLAY_MULTICH_I2S_DAC 0x0000 #define OXYGEN_PLAY_MULTICH_AC97 0x0010 -- Kind regards, Roman Volkov, v1ron(a)mail.ru

1 0

[alsa-devel] [PATCH v2 1/4] ALSA: oxygen: Change SPI writing/waiting logic
by Roman Volkov 21 Nov '13

21 Nov '13

Move waiting logic into separate function, wait after triggering the transaction (not before), increase the wait timeout, error handling. Should not affect other card models. Signed-off-by: Roman I. Volkov <v1ron(a)mail.ru> --- diff -uprN linux-3.12/sound/pci/oxygen/oxygen.h linux-3.12-my/sound/pci/oxygen/oxygen.h --- linux-3.12/sound/pci/oxygen/oxygen.h 2013-11-04 03:41:51.000000000 +0400 +++ linux-3.12-my/sound/pci/oxygen/oxygen.h 2013-11-20 22:20:44.000000000 +0400 @@ -198,7 +198,7 @@ void oxygen_write_ac97(struct oxygen *ch void oxygen_write_ac97_masked(struct oxygen *chip, unsigned int codec, unsigned int index, u16 data, u16 mask); -void oxygen_write_spi(struct oxygen *chip, u8 control, unsigned int data); +int oxygen_write_spi(struct oxygen *chip, u8 control, unsigned int data); void oxygen_write_i2c(struct oxygen *chip, u8 device, u8 map, u8 data); void oxygen_reset_uart(struct oxygen *chip); diff -uprN linux-3.12/sound/pci/oxygen/oxygen_io.c linux-3.12-my/sound/pci/oxygen/oxygen_io.c --- linux-3.12/sound/pci/oxygen/oxygen_io.c 2013-11-04 03:41:51.000000000 +0400 +++ linux-3.12-my/sound/pci/oxygen/oxygen_io.c 2013-11-20 15:34:14.000000000 +0400 @@ -194,23 +194,34 @@ void oxygen_write_ac97_masked(struct oxy } EXPORT_SYMBOL(oxygen_write_ac97_masked); -void oxygen_write_spi(struct oxygen *chip, u8 control, unsigned int data) +static int oxygen_wait_spi(struct oxygen *chip) { - unsigned int count; + /* Higher interval to be sure - 400 microseconds */ + unsigned int count = 100; - /* should not need more than 30.72 us (24 * 1.28 us) */ - count = 10; - while ((oxygen_read8(chip, OXYGEN_SPI_CONTROL) & OXYGEN_SPI_BUSY) - && count > 0) { + for (;;) { + if ((oxygen_read8(chip, OXYGEN_SPI_CONTROL) & + OXYGEN_SPI_BUSY) == 0) + break; + if (count == 0) { + snd_printk(KERN_ERR "oxygen: spi wait timeout\n"); + return -EIO; + } udelay(4); - --count; + count--; } + return 0; +} +int oxygen_write_spi(struct oxygen *chip, u8 control, unsigned int data) +{ oxygen_write8(chip, OXYGEN_SPI_DATA1, data); oxygen_write8(chip, OXYGEN_SPI_DATA2, data >> 8); if (control & OXYGEN_SPI_DATA_LENGTH_3) oxygen_write8(chip, OXYGEN_SPI_DATA3, data >> 16); oxygen_write8(chip, OXYGEN_SPI_CONTROL, control); + + return oxygen_wait_spi(chip); } EXPORT_SYMBOL(oxygen_write_spi); -- Kind regards, Roman Volkov, v1ron(a)mail.ru

1 0

Re: [alsa-devel] question about aplay fails on arm 64
by Clemens Ladisch 21 Nov '13

21 Nov '13

Please don't top-post. 曹能华 wrote: > Hi, Clemens Don't drop the mailing list from replies. > Do you mean we need to change ALSA's mmap code to adapt to ARM64. Maybe. > Do you know how to port it? No. Regards, Clemens

2 1

[alsa-devel] [PATCH] ALSA: hda - Add headset quirk for Dell Inspiron 3135
by David Henningsson 21 Nov '13

21 Nov '13

Cc: stable(a)vger.kernel.org (3.10+) BugLink: https://bugs.launchpad.net/bugs/1253636 Signed-off-by: David Henningsson <david.henningsson(a)canonical.com> --- sound/pci/hda/patch_realtek.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index a90bfab..c08f435 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -4152,6 +4152,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { SND_PCI_QUIRK(0x1028, 0x0608, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE), SND_PCI_QUIRK(0x1028, 0x0609, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE), SND_PCI_QUIRK(0x1028, 0x0613, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE), + SND_PCI_QUIRK(0x1028, 0x0614, "Dell Inspiron 3135", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE), SND_PCI_QUIRK(0x1028, 0x0616, "Dell Vostro 5470", ALC290_FIXUP_MONO_SPEAKERS), SND_PCI_QUIRK(0x1028, 0x061f, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE), SND_PCI_QUIRK(0x1028, 0x063f, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE), -- 1.7.9.5

2 1

[alsa-devel] [PATCH] wm8994: avoid to enable dcs done irq before init completion dcs_done
by wangbiao 21 Nov '13

21 Nov '13

From: wang, biao <biao.wang(a)intel.com> Date: Wed, 20 Nov 2013 17:53:28 +0800 Subject: [PATCH] wm8994: avoid to enable dcs done irq before init completion dcs_done once code return from request_threaded_irq, irq was setup enabled by default, but completion var dcs_done not got initialized yet, if then a dcs done irq was raised, system will got hung as the sync mechanism is invalid now. so this patch try not enable irq when request it until we got things ready. Signed-off-by: wang, biao <biao.wang(a)intel.com> Signed-off-by: Zhang, Di <di.zhang(a)intel.com> --- sound/soc/codecs/wm8994.c | 5 +++++ 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/sound/soc/codecs/wm8994.c b/sound/soc/codecs/wm8994.c index 86426a1..d7e59dd 100644 --- a/sound/soc/codecs/wm8994.c +++ b/sound/soc/codecs/wm8994.c @@ -3981,6 +3981,7 @@ static int wm8994_codec_probe(struct snd_soc_codec *codec) struct wm8994 *control = dev_get_drvdata(codec->dev->parent); struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); struct snd_soc_dapm_context *dapm = &codec->dapm; + unsigned int dcs_done_irq; unsigned int reg; int ret, i; @@ -4077,6 +4078,9 @@ static int wm8994_codec_probe(struct snd_soc_codec *codec) wm8994_request_irq(wm8994->wm8994, WM8994_IRQ_TEMP_SHUT, wm8994_temp_shut, "Thermal shutdown", codec); + dcs_done_irq = regmap_irq_get_virq(wm8994->wm8994->irq_data, + WM8994_IRQ_DCS_DONE); + irq_set_status_flags(dcs_done_irq, IRQ_NOAUTOEN); ret = wm8994_request_irq(wm8994->wm8994, WM8994_IRQ_DCS_DONE, wm_hubs_dcs_done, "DC servo done", &wm8994->hubs); @@ -4313,6 +4317,7 @@ static int wm8994_codec_probe(struct snd_soc_codec *codec) } wm_hubs_add_analogue_routes(codec, 0, 0); + enable_irq(dcs_done_irq); snd_soc_dapm_add_routes(dapm, intercon, ARRAY_SIZE(intercon)); switch (control->type) { -- 1.7.0.4

2 1

[alsa-devel] Bug? Sound support for at91sam9x5-wm8731 based boards
by Zhong Li 21 Nov '13

21 Nov '13

When playing stereo sound on the Atmel at91sam9x5-ek board the left and right channel would get swapped about 1 in 6 tries.

2 6

[alsa-devel] [PATCH] ALSA: hda - Fix the headphone jack detection on Sony VAIO TX
by Takashi Iwai 21 Nov '13

21 Nov '13

BIOS sets MISC_NO_PRESENCE bit wrongly to the pin config on NID 0x0f. Cc: <stable(a)vger.kernel.org> Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- sound/pci/hda/patch_realtek.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index cc1dfdc1ff74..1c6f00802719 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -1660,6 +1660,7 @@ static const struct snd_pci_quirk alc260_fixup_tbl[] = { SND_PCI_QUIRK(0x1025, 0x008f, "Acer", ALC260_FIXUP_GPIO1), SND_PCI_QUIRK(0x103c, 0x280a, "HP dc5750", ALC260_FIXUP_HP_DC5750), SND_PCI_QUIRK(0x103c, 0x30ba, "HP Presario B1900", ALC260_FIXUP_HP_B1900), + SND_PCI_QUIRK(0x104d, 0x81e2, "Sony VAIO TX", ALC260_FIXUP_HP_PIN_0F), SND_PCI_QUIRK(0x10cf, 0x1326, "FSC LifeBook S7020", ALC260_FIXUP_FSC_S7020), SND_PCI_QUIRK(0x1509, 0x4540, "Favorit 100XS", ALC260_FIXUP_GPIO1), SND_PCI_QUIRK(0x152d, 0x0729, "Quanta KN1", ALC260_FIXUP_KN1), -- 1.8.4.3

1 0

[alsa-devel] [PATCH] ALSA: hda - Fix missing bass speaker on ASUS N550
by Takashi Iwai 21 Nov '13

21 Nov '13

The laptop has a built-in speaker on NID 0x1a. It's an LFE only on the right channel, so we need to provide an explicit chmap, too. There might be other surround speakers, but they can fixed in addition at later point, so let's fix the easier bass speaker at first. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=65091 Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- sound/pci/hda/patch_realtek.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index a90bfab8530f..cc1dfdc1ff74 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -4723,6 +4723,8 @@ enum { ALC668_FIXUP_DELL_MIC_NO_PRESENCE, ALC668_FIXUP_HEADSET_MODE, ALC662_FIXUP_BASS_CHMAP, + ALC662_FIXUP_BASS_1A, + ALC662_FIXUP_BASS_1A_CHMAP, }; static const struct hda_fixup alc662_fixups[] = { @@ -4903,6 +4905,19 @@ static const struct hda_fixup alc662_fixups[] = { .chained = true, .chain_id = ALC662_FIXUP_ASUS_MODE4 }, + [ALC662_FIXUP_BASS_1A] = { + .type = HDA_FIXUP_PINS, + .v.pins = (const struct hda_pintbl[]) { + {0x1a, 0x80106111}, /* bass speaker */ + {} + }, + }, + [ALC662_FIXUP_BASS_1A_CHMAP] = { + .type = HDA_FIXUP_FUNC, + .v.func = alc662_fixup_bass_chmap, + .chained = true, + .chain_id = ALC662_FIXUP_BASS_1A, + }, }; static const struct snd_pci_quirk alc662_fixup_tbl[] = { @@ -4918,6 +4933,7 @@ static const struct snd_pci_quirk alc662_fixup_tbl[] = { SND_PCI_QUIRK(0x1028, 0x0625, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE), SND_PCI_QUIRK(0x1028, 0x0626, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE), SND_PCI_QUIRK(0x103c, 0x1632, "HP RP5800", ALC662_FIXUP_HP_RP5800), + SND_PCI_QUIRK(0x1043, 0x11cd, "Asus N550", ALC662_FIXUP_BASS_1A_CHMAP), SND_PCI_QUIRK(0x1043, 0x1477, "ASUS N56VZ", ALC662_FIXUP_BASS_CHMAP), SND_PCI_QUIRK(0x1043, 0x1bf3, "ASUS N76VZ", ALC662_FIXUP_BASS_CHMAP), SND_PCI_QUIRK(0x1043, 0x8469, "ASUS mobo", ALC662_FIXUP_NO_JACK_DETECT), -- 1.8.4.3

1 0

[alsa-devel] [PATCH][topic/symmetry] ASoC: soc-pcm: move DAIs parameters cleaning into hw_free()
by Nicolin Chen 20 Nov '13

20 Nov '13

We're now applying soc_hw_params_symmetry() to reject unmatched parameters while we clear parameters in soc_pcm_close(). So here's a use case might be broken by this mechanism: aplay -Dhw:0 44100.wav 48000.wav 32000.wav In this case, we call soc_pcm_open()->soc_pcm_hw_params()->soc_pcm_hw_free() ->soc_pcm_hw_params()->soc_pcm_hw_free()->soc_pcm_close() in order. As we only clear parameters in soc_pcm_close(). The parameters would be remained in the system even if the playback of 44100.wav is finished. Thus, this patch is trying to move parameters cleaning into hw_free() so that the system can continue to serve this kind of use case. Also, since we set them in hw_params(), it should be better to clear them in hw_free() for symmetry. Signed-off-by: Nicolin Chen <b42378(a)freescale.com> --- sound/soc/soc-pcm.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/sound/soc/soc-pcm.c b/sound/soc/soc-pcm.c index 60d9cfb..d519757 100644 --- a/sound/soc/soc-pcm.c +++ b/sound/soc/soc-pcm.c @@ -443,19 +443,6 @@ static int soc_pcm_close(struct snd_pcm_substream *substream) codec_dai->active--; codec->active--; - /* clear the corresponding DAIs rate when inactive */ - if (!cpu_dai->active) { - cpu_dai->rate = 0; - cpu_dai->channels = 0; - cpu_dai->sample_bits = 0; - } - - if (!codec_dai->active) { - codec_dai->rate = 0; - codec_dai->channels = 0; - codec_dai->sample_bits = 0; - } - /* Muting the DAC suppresses artifacts caused during digital * shutdown, for example from stopping clocks. */ @@ -671,6 +658,19 @@ static int soc_pcm_hw_free(struct snd_pcm_substream *substream) mutex_lock_nested(&rtd->pcm_mutex, rtd->pcm_subclass); + /* clear the corresponding DAIs parameters when going to be inactive */ + if (cpu_dai->active == 1) { + cpu_dai->rate = 0; + cpu_dai->channels = 0; + cpu_dai->sample_bits = 0; + } + + if (codec_dai->active == 1) { + codec_dai->rate = 0; + codec_dai->channels = 0; + codec_dai->sample_bits = 0; + } + /* apply codec digital mute */ if (!codec->active) snd_soc_dai_digital_mute(codec_dai, 1, substream->stream); -- 1.8.4

2 1

[alsa-devel] [PATCH 1/1] ASoC: arizona: Set FLL to free-run before disabling
by Richard Fitzgerald 20 Nov '13

20 Nov '13

Signed-off-by: Richard Fitzgerald <rf(a)opensource.wolfsonmicro.com> --- sound/soc/codecs/arizona.c | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 6f05b17..fea9910 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1529,6 +1529,8 @@ static void arizona_enable_fll(struct arizona_fll *fll, try_wait_for_completion(&fll->ok); regmap_update_bits(arizona->regmap, fll->base + 1, + ARIZONA_FLL1_FREERUN, 0); + regmap_update_bits(arizona->regmap, fll->base + 1, ARIZONA_FLL1_ENA, ARIZONA_FLL1_ENA); if (use_sync) regmap_update_bits(arizona->regmap, fll->base + 0x11, @@ -1546,6 +1548,8 @@ static void arizona_disable_fll(struct arizona_fll *fll) struct arizona *arizona = fll->arizona; bool change; + regmap_update_bits(arizona->regmap, fll->base + 1, + ARIZONA_FLL1_FREERUN, ARIZONA_FLL1_FREERUN); regmap_update_bits_check(arizona->regmap, fll->base + 1, ARIZONA_FLL1_ENA, 0, &change); regmap_update_bits(arizona->regmap, fll->base + 0x11, -- 1.7.2.5

2 3

[alsa-devel] [PATCH 1/1] ASoC: wm5110: Add extra AIF2 channels
by Richard Fitzgerald 20 Nov '13

20 Nov '13

Signed-off-by: D.J. Barrow <dbarrow(a)wolfsonmicro.com> Signed-off-by: Richard Fitzgerald <rf(a)opensource.wolfsonmicro.com> --- include/linux/mfd/arizona/registers.h | 121 +++++++++++++++++++++++++++++++++ sound/soc/codecs/arizona.c | 8 ++ sound/soc/codecs/arizona.h | 2 +- sound/soc/codecs/wm5110.c | 48 +++++++++++++- 4 files changed, 176 insertions(+), 3 deletions(-) diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 4706d3d..8f4c9d7 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -511,6 +511,38 @@ #define ARIZONA_AIF2TX2MIX_INPUT_3_VOLUME 0x74D #define ARIZONA_AIF2TX2MIX_INPUT_4_SOURCE 0x74E #define ARIZONA_AIF2TX2MIX_INPUT_4_VOLUME 0x74F +#define ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE 0x750 +#define ARIZONA_AIF2TX3MIX_INPUT_1_VOLUME 0x751 +#define ARIZONA_AIF2TX3MIX_INPUT_2_SOURCE 0x752 +#define ARIZONA_AIF2TX3MIX_INPUT_2_VOLUME 0x753 +#define ARIZONA_AIF2TX3MIX_INPUT_3_SOURCE 0x754 +#define ARIZONA_AIF2TX3MIX_INPUT_3_VOLUME 0x755 +#define ARIZONA_AIF2TX3MIX_INPUT_4_SOURCE 0x756 +#define ARIZONA_AIF2TX3MIX_INPUT_4_VOLUME 0x757 +#define ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE 0x758 +#define ARIZONA_AIF2TX4MIX_INPUT_1_VOLUME 0x759 +#define ARIZONA_AIF2TX4MIX_INPUT_2_SOURCE 0x75A +#define ARIZONA_AIF2TX4MIX_INPUT_2_VOLUME 0x75B +#define ARIZONA_AIF2TX4MIX_INPUT_3_SOURCE 0x75C +#define ARIZONA_AIF2TX4MIX_INPUT_3_VOLUME 0x75D +#define ARIZONA_AIF2TX4MIX_INPUT_4_SOURCE 0x75E +#define ARIZONA_AIF2TX4MIX_INPUT_4_VOLUME 0x75F +#define ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE 0x760 +#define ARIZONA_AIF2TX5MIX_INPUT_1_VOLUME 0x761 +#define ARIZONA_AIF2TX5MIX_INPUT_2_SOURCE 0x762 +#define ARIZONA_AIF2TX5MIX_INPUT_2_VOLUME 0x763 +#define ARIZONA_AIF2TX5MIX_INPUT_3_SOURCE 0x764 +#define ARIZONA_AIF2TX5MIX_INPUT_3_VOLUME 0x765 +#define ARIZONA_AIF2TX5MIX_INPUT_4_SOURCE 0x766 +#define ARIZONA_AIF2TX5MIX_INPUT_4_VOLUME 0x767 +#define ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE 0x768 +#define ARIZONA_AIF2TX6MIX_INPUT_1_VOLUME 0x769 +#define ARIZONA_AIF2TX6MIX_INPUT_2_SOURCE 0x76A +#define ARIZONA_AIF2TX6MIX_INPUT_2_VOLUME 0x76B +#define ARIZONA_AIF2TX6MIX_INPUT_3_SOURCE 0x76C +#define ARIZONA_AIF2TX6MIX_INPUT_3_VOLUME 0x76D +#define ARIZONA_AIF2TX6MIX_INPUT_4_SOURCE 0x76E +#define ARIZONA_AIF2TX6MIX_INPUT_4_VOLUME 0x76F #define ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE 0x780 #define ARIZONA_AIF3TX1MIX_INPUT_1_VOLUME 0x781 #define ARIZONA_AIF3TX1MIX_INPUT_2_SOURCE 0x782 @@ -3726,6 +3758,35 @@ #define ARIZONA_AIF2TX2_SLOT_WIDTH 6 /* AIF2TX2_SLOT - [5:0] */ /* + * R1355 (0x54B) - AIF2 Frame Ctrl 5 + */ +#define ARIZONA_AIF2TX3_SLOT_MASK 0x003F /* AIF2TX3_SLOT - [5:0] */ +#define ARIZONA_AIF2TX3_SLOT_SHIFT 0 /* AIF2TX3_SLOT - [5:0] */ +#define ARIZONA_AIF2TX3_SLOT_WIDTH 6 /* AIF2TX3_SLOT - [5:0] */ + +/* + * R1356 (0x54C) - AIF2 Frame Ctrl 6 + */ +#define ARIZONA_AIF2TX4_SLOT_MASK 0x003F /* AIF2TX4_SLOT - [5:0] */ +#define ARIZONA_AIF2TX4_SLOT_SHIFT 0 /* AIF2TX4_SLOT - [5:0] */ +#define ARIZONA_AIF2TX4_SLOT_WIDTH 6 /* AIF2TX4_SLOT - [5:0] */ + + +/* + * R1357 (0x54D) - AIF2 Frame Ctrl 7 + */ +#define ARIZONA_AIF2TX5_SLOT_MASK 0x003F /* AIF2TX5_SLOT - [5:0] */ +#define ARIZONA_AIF2TX5_SLOT_SHIFT 0 /* AIF2TX5_SLOT - [5:0] */ +#define ARIZONA_AIF2TX5_SLOT_WIDTH 6 /* AIF2TX5_SLOT - [5:0] */ + +/* + * R1358 (0x54E) - AIF2 Frame Ctrl 8 + */ +#define ARIZONA_AIF2TX6_SLOT_MASK 0x003F /* AIF2TX6_SLOT - [5:0] */ +#define ARIZONA_AIF2TX6_SLOT_SHIFT 0 /* AIF2TX6_SLOT - [5:0] */ +#define ARIZONA_AIF2TX6_SLOT_WIDTH 6 /* AIF2TX6_SLOT - [5:0] */ + +/* * R1361 (0x551) - AIF2 Frame Ctrl 11 */ #define ARIZONA_AIF2RX1_SLOT_MASK 0x003F /* AIF2RX1_SLOT - [5:0] */ @@ -3740,8 +3801,52 @@ #define ARIZONA_AIF2RX2_SLOT_WIDTH 6 /* AIF2RX2_SLOT - [5:0] */ /* + * R1363 (0x553) - AIF2 Frame Ctrl 13 + */ +#define ARIZONA_AIF2RX3_SLOT_MASK 0x003F /* AIF2RX3_SLOT - [5:0] */ +#define ARIZONA_AIF2RX3_SLOT_SHIFT 0 /* AIF2RX3_SLOT - [5:0] */ +#define ARIZONA_AIF2RX3_SLOT_WIDTH 6 /* AIF2RX3_SLOT - [5:0] */ + +/* + * R1364 (0x554) - AIF2 Frame Ctrl 14 + */ +#define ARIZONA_AIF2RX4_SLOT_MASK 0x003F /* AIF2RX4_SLOT - [5:0] */ +#define ARIZONA_AIF2RX4_SLOT_SHIFT 0 /* AIF2RX4_SLOT - [5:0] */ +#define ARIZONA_AIF2RX4_SLOT_WIDTH 6 /* AIF2RX4_SLOT - [5:0] */ + +/* + * R1365 (0x555) - AIF2 Frame Ctrl 15 + */ +#define ARIZONA_AIF2RX5_SLOT_MASK 0x003F /* AIF2RX5_SLOT - [5:0] */ +#define ARIZONA_AIF2RX5_SLOT_SHIFT 0 /* AIF2RX5_SLOT - [5:0] */ +#define ARIZONA_AIF2RX5_SLOT_WIDTH 6 /* AIF2RX5_SLOT - [5:0] */ + +/* + * R1366 (0x556) - AIF2 Frame Ctrl 16 + */ +#define ARIZONA_AIF2RX6_SLOT_MASK 0x003F /* AIF2RX6_SLOT - [5:0] */ +#define ARIZONA_AIF2RX6_SLOT_SHIFT 0 /* AIF2RX6_SLOT - [5:0] */ +#define ARIZONA_AIF2RX6_SLOT_WIDTH 6 /* AIF2RX6_SLOT - [5:0] */ + +/* * R1369 (0x559) - AIF2 Tx Enables */ +#define ARIZONA_AIF2TX6_ENA 0x0020 /* AIF2TX6_ENA */ +#define ARIZONA_AIF2TX6_ENA_MASK 0x0020 /* AIF2TX6_ENA */ +#define ARIZONA_AIF2TX6_ENA_SHIFT 5 /* AIF2TX6_ENA */ +#define ARIZONA_AIF2TX6_ENA_WIDTH 1 /* AIF2TX6_ENA */ +#define ARIZONA_AIF2TX5_ENA 0x0010 /* AIF2TX5_ENA */ +#define ARIZONA_AIF2TX5_ENA_MASK 0x0010 /* AIF2TX5_ENA */ +#define ARIZONA_AIF2TX5_ENA_SHIFT 4 /* AIF2TX5_ENA */ +#define ARIZONA_AIF2TX5_ENA_WIDTH 1 /* AIF2TX5_ENA */ +#define ARIZONA_AIF2TX4_ENA 0x0008 /* AIF2TX4_ENA */ +#define ARIZONA_AIF2TX4_ENA_MASK 0x0008 /* AIF2TX4_ENA */ +#define ARIZONA_AIF2TX4_ENA_SHIFT 3 /* AIF2TX4_ENA */ +#define ARIZONA_AIF2TX4_ENA_WIDTH 1 /* AIF2TX4_ENA */ +#define ARIZONA_AIF2TX3_ENA 0x0004 /* AIF2TX3_ENA */ +#define ARIZONA_AIF2TX3_ENA_MASK 0x0004 /* AIF2TX3_ENA */ +#define ARIZONA_AIF2TX3_ENA_SHIFT 2 /* AIF2TX3_ENA */ +#define ARIZONA_AIF2TX3_ENA_WIDTH 1 /* AIF2TX3_ENA */ #define ARIZONA_AIF2TX2_ENA 0x0002 /* AIF2TX2_ENA */ #define ARIZONA_AIF2TX2_ENA_MASK 0x0002 /* AIF2TX2_ENA */ #define ARIZONA_AIF2TX2_ENA_SHIFT 1 /* AIF2TX2_ENA */ @@ -3754,6 +3859,22 @@ /* * R1370 (0x55A) - AIF2 Rx Enables */ +#define ARIZONA_AIF2RX6_ENA 0x0020 /* AIF2RX6_ENA */ +#define ARIZONA_AIF2RX6_ENA_MASK 0x0020 /* AIF2RX6_ENA */ +#define ARIZONA_AIF2RX6_ENA_SHIFT 5 /* AIF2RX6_ENA */ +#define ARIZONA_AIF2RX6_ENA_WIDTH 1 /* AIF2RX6_ENA */ +#define ARIZONA_AIF2RX5_ENA 0x0010 /* AIF2RX5_ENA */ +#define ARIZONA_AIF2RX5_ENA_MASK 0x0010 /* AIF2RX5_ENA */ +#define ARIZONA_AIF2RX5_ENA_SHIFT 4 /* AIF2RX5_ENA */ +#define ARIZONA_AIF2RX5_ENA_WIDTH 1 /* AIF2RX5_ENA */ +#define ARIZONA_AIF2RX4_ENA 0x0008 /* AIF2RX4_ENA */ +#define ARIZONA_AIF2RX4_ENA_MASK 0x0008 /* AIF2RX4_ENA */ +#define ARIZONA_AIF2RX4_ENA_SHIFT 3 /* AIF2RX4_ENA */ +#define ARIZONA_AIF2RX4_ENA_WIDTH 1 /* AIF2RX4_ENA */ +#define ARIZONA_AIF2RX3_ENA 0x0004 /* AIF2RX3_ENA */ +#define ARIZONA_AIF2RX3_ENA_MASK 0x0004 /* AIF2RX3_ENA */ +#define ARIZONA_AIF2RX3_ENA_SHIFT 2 /* AIF2RX3_ENA */ +#define ARIZONA_AIF2RX3_ENA_WIDTH 1 /* AIF2RX3_ENA */ #define ARIZONA_AIF2RX2_ENA 0x0002 /* AIF2RX2_ENA */ #define ARIZONA_AIF2RX2_ENA_MASK 0x0002 /* AIF2RX2_ENA */ #define ARIZONA_AIF2RX2_ENA_SHIFT 1 /* AIF2RX2_ENA */ diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index fea9910..6188b05 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -292,6 +292,10 @@ const char *arizona_mixer_texts[ARIZONA_NUM_MIXER_INPUTS] = { "AIF1RX8", "AIF2RX1", "AIF2RX2", + "AIF2RX3", + "AIF2RX4", + "AIF2RX5", + "AIF2RX6", "AIF3RX1", "AIF3RX2", "SLIMRX1", @@ -395,6 +399,10 @@ int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS] = { 0x27, 0x28, /* AIF2RX1 */ 0x29, + 0x2a, + 0x2b, + 0x2c, + 0x2d, 0x30, /* AIF3RX1 */ 0x31, 0x38, /* SLIMRX1 */ diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 9e81b63..1f96672 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -81,7 +81,7 @@ struct arizona_priv { unsigned int spk_ena_pending:1; }; -#define ARIZONA_NUM_MIXER_INPUTS 99 +#define ARIZONA_NUM_MIXER_INPUTS 103 extern const unsigned int arizona_mixer_tlv[]; extern const char *arizona_mixer_texts[ARIZONA_NUM_MIXER_INPUTS]; diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index f2d1094..1a73a02 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -302,6 +302,10 @@ ARIZONA_MIXER_CONTROLS("AIF1TX8", ARIZONA_AIF1TX8MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("AIF2TX1", ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("AIF2TX2", ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF2TX3", ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF2TX4", ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF2TX5", ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE), +ARIZONA_MIXER_CONTROLS("AIF2TX6", ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("AIF3TX1", ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("AIF3TX2", ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE), @@ -361,6 +365,10 @@ ARIZONA_MIXER_ENUMS(AIF1TX8, ARIZONA_AIF1TX8MIX_INPUT_1_SOURCE); ARIZONA_MIXER_ENUMS(AIF2TX1, ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE); ARIZONA_MIXER_ENUMS(AIF2TX2, ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF2TX3, ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF2TX4, ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF2TX5, ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE); +ARIZONA_MIXER_ENUMS(AIF2TX6, ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE); ARIZONA_MIXER_ENUMS(AIF3TX1, ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE); ARIZONA_MIXER_ENUMS(AIF3TX2, ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE); @@ -561,11 +569,27 @@ SND_SOC_DAPM_AIF_OUT("AIF2TX1", NULL, 0, ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX1_ENA_SHIFT, 0), SND_SOC_DAPM_AIF_OUT("AIF2TX2", NULL, 0, ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF2TX3", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF2TX4", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF2TX5", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_OUT("AIF2TX6", NULL, 0, + ARIZONA_AIF2_TX_ENABLES, ARIZONA_AIF2TX6_ENA_SHIFT, 0), SND_SOC_DAPM_AIF_IN("AIF2RX1", NULL, 0, ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX1_ENA_SHIFT, 0), SND_SOC_DAPM_AIF_IN("AIF2RX2", NULL, 0, ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX2_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX3", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX3_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX4", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX4_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX5", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX5_ENA_SHIFT, 0), +SND_SOC_DAPM_AIF_IN("AIF2RX6", NULL, 0, + ARIZONA_AIF2_RX_ENABLES, ARIZONA_AIF2RX6_ENA_SHIFT, 0), SND_SOC_DAPM_AIF_IN("SLIMRX1", NULL, 0, ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE, @@ -703,6 +727,10 @@ ARIZONA_MIXER_WIDGETS(AIF1TX8, "AIF1TX8"), ARIZONA_MIXER_WIDGETS(AIF2TX1, "AIF2TX1"), ARIZONA_MIXER_WIDGETS(AIF2TX2, "AIF2TX2"), +ARIZONA_MIXER_WIDGETS(AIF2TX3, "AIF2TX3"), +ARIZONA_MIXER_WIDGETS(AIF2TX4, "AIF2TX4"), +ARIZONA_MIXER_WIDGETS(AIF2TX5, "AIF2TX5"), +ARIZONA_MIXER_WIDGETS(AIF2TX6, "AIF2TX6"), ARIZONA_MIXER_WIDGETS(AIF3TX1, "AIF3TX1"), ARIZONA_MIXER_WIDGETS(AIF3TX2, "AIF3TX2"), @@ -764,6 +792,10 @@ SND_SOC_DAPM_OUTPUT("MICSUPP"), { name, "AIF1RX8", "AIF1RX8" }, \ { name, "AIF2RX1", "AIF2RX1" }, \ { name, "AIF2RX2", "AIF2RX2" }, \ + { name, "AIF2RX3", "AIF2RX3" }, \ + { name, "AIF2RX4", "AIF2RX4" }, \ + { name, "AIF2RX5", "AIF2RX5" }, \ + { name, "AIF2RX6", "AIF2RX6" }, \ { name, "AIF3RX1", "AIF3RX1" }, \ { name, "AIF3RX2", "AIF3RX2" }, \ { name, "SLIMRX1", "SLIMRX1" }, \ @@ -861,9 +893,17 @@ static const struct snd_soc_dapm_route wm5110_dapm_routes[] = { { "AIF2 Capture", NULL, "AIF2TX1" }, { "AIF2 Capture", NULL, "AIF2TX2" }, + { "AIF2 Capture", NULL, "AIF2TX3" }, + { "AIF2 Capture", NULL, "AIF2TX4" }, + { "AIF2 Capture", NULL, "AIF2TX5" }, + { "AIF2 Capture", NULL, "AIF2TX6" }, { "AIF2RX1", NULL, "AIF2 Playback" }, { "AIF2RX2", NULL, "AIF2 Playback" }, + { "AIF2RX3", NULL, "AIF2 Playback" }, + { "AIF2RX4", NULL, "AIF2 Playback" }, + { "AIF2RX5", NULL, "AIF2 Playback" }, + { "AIF2RX6", NULL, "AIF2 Playback" }, { "AIF3 Capture", NULL, "AIF3TX1" }, { "AIF3 Capture", NULL, "AIF3TX2" }, @@ -947,6 +987,10 @@ static const struct snd_soc_dapm_route wm5110_dapm_routes[] = { ARIZONA_MIXER_ROUTES("AIF2TX1", "AIF2TX1"), ARIZONA_MIXER_ROUTES("AIF2TX2", "AIF2TX2"), + ARIZONA_MIXER_ROUTES("AIF2TX3", "AIF2TX3"), + ARIZONA_MIXER_ROUTES("AIF2TX4", "AIF2TX4"), + ARIZONA_MIXER_ROUTES("AIF2TX5", "AIF2TX5"), + ARIZONA_MIXER_ROUTES("AIF2TX6", "AIF2TX6"), ARIZONA_MIXER_ROUTES("AIF3TX1", "AIF3TX1"), ARIZONA_MIXER_ROUTES("AIF3TX2", "AIF3TX2"), @@ -1079,14 +1123,14 @@ static struct snd_soc_dai_driver wm5110_dai[] = { .playback = { .stream_name = "AIF2 Playback", .channels_min = 1, - .channels_max = 2, + .channels_max = 6, .rates = WM5110_RATES, .formats = WM5110_FORMATS, }, .capture = { .stream_name = "AIF2 Capture", .channels_min = 1, - .channels_max = 2, + .channels_max = 6, .rates = WM5110_RATES, .formats = WM5110_FORMATS, }, -- 1.7.2.5

2 1

[alsa-devel] [PATCH] ALSA: hda - Disable runtime PM on LynxPoint(-LP) controllers
by Takashi Iwai 20 Nov '13

20 Nov '13

We got bug reports of the stalled HD-audio, typically after S3 or S4, and it turned out that they seemed triggered by runtime PM on Lynx Point and Lynx Point-LP controllers. As there is no way to recover properly from the stalled controller, it's safer to disable the runtime PM support on these chips for now. Further notes: I actually could reproduce this on a few HP laptops here. Go to S3 after runtime suspend, then the next playback fails, resulting in either a codec stall or repeated sounds. The problem seems lying in a deeper level. The complete stall could be avoided by disabling the call of azx_stop_chip() in azx_runtime_suspend(). More specifically, it's the disablement of CORB/RIRB in azx_free_cmd_io(). After removing this call, the sound is resumed. However, even with that workaround, the first playback after resume stalls due to the missing RIRB interrupts (so you get "switch to polling mode" kernel warning). Interestingly, the codec communication in the resume procedure does work. The system goes to runtime suspend immediately after resume, then something gets broken at that point. This missing interrupt problem happens even if you do nothing in runtime suspend/resume callback with empty callbacks. This implies that it's an issue in the underlying layer. So, the only feasible "fix" in the sound driver side to suppress the runtime PM, so far. Cc: <stable(a)vger.kernel.org> Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- Yet another note: the patch is based on v3.12, not on linux-next, so that it can be backported cleanly for 3.12 and earlier kernels. sound/pci/hda/hda_intel.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index 6e61a019aa5e..27fc33e54a50 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c @@ -3973,7 +3973,7 @@ static DEFINE_PCI_DEVICE_TABLE(azx_ids) = { .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM }, /* Lynx Point */ { PCI_DEVICE(0x8086, 0x8c20), - .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH }, + .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM }, /* Wellsburg */ { PCI_DEVICE(0x8086, 0x8d20), .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH }, @@ -3981,10 +3981,10 @@ static DEFINE_PCI_DEVICE_TABLE(azx_ids) = { .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH }, /* Lynx Point-LP */ { PCI_DEVICE(0x8086, 0x9c20), - .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH }, + .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM }, /* Lynx Point-LP */ { PCI_DEVICE(0x8086, 0x9c21), - .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH }, + .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM }, /* Haswell */ { PCI_DEVICE(0x8086, 0x0a0c), .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH | -- 1.8.4.3

2 4

Re: [alsa-devel] [PATCH 2/2] snd-oxygen: Fixes for the Xonar DG card
by Roman Volkov 20 Nov '13

20 Nov '13

В Wed, 20 Nov 2013 13:29:18 +0100 Clemens Ladisch <clemens(a)ladisch.de> пишет: > Roman Volkov wrote: > > Clemens Ladisch <clemens(a)ladisch.de> пишет: > >> Roman Volkov wrote: > >>> + * 128kHz doesn't work for CS4361 (multichannel playback) > >> > >> Why do you expect 128 kHz to work? > > > > 128kHz will not work because ... > > ... the CMI8788 does not support 128 kHz in the first place. > > > And perhaps my anti-pop delay of 1 second is too long. > > The Windows driver uses 2.5 seconds. > > >> Is the reset pin actually connected? Does the Windows driver do > >> this? > > > > Should be, otherwise this is bad design. > > This driver is not for a theoretical, optimally designed card; it is > for the actual card that Asus builds. If the Windows driver does not > touch the reset pin, we should not do this either (because it might be > connected to the self-destruct trigger). > > > sometimes (rarely) I get completely distorted sound when I power up > > the Windows machine. > > After a cold boot? > > This also happened for some other Xonar card when the Linux driver did > things differently and did not reset these settings when shutting > down. > > >> Use mdelay() only when sleeping is not possible; use msleep() > >> instead. > > > > msleep() is not recommended for small delays (1ms-20ms). > > Only because it isn't very accurate. But using mdelay() is even worse > because it busy-loops. > > >>> + case PLAYBACK_DST_20_CH: > >>> + case PLAYBACK_DST_40_CH: > >>> + case PLAYBACK_DST_51_CH: > >> > >> Why is it necessary to differentiate between those? There should > >> be no mixer control; the driver can automatically detect what > >> format is used. And this should not make any difference because > >> the unused channels will be silent anyway. > > > > Just as in the windows driver. > > This is not necessarily a reason to implement the same in the Linux > driver, especially if it's not required by the actual hardware, and > reduces usability. > > > Should I change this to "HP\HP FP\Speakers"? > > Yes. > > >>> +/* Put the codec into low power mode, disable audio output, save > >>> registers */ > >> > >> Does the Windows driver implement this? > > > > I don't know. Linux docs says I should put my hardware into low > > power mode and I do that. > > As far as I know, none of the Xonar cards have any real power-saving > functionality; they rely on the entire PCI slot being powered down. > > For practical purposes, suspend/resume just means that you have to > restore the registers. > > >>> - .function_flags = OXYGEN_FUNCTION_SPI, > >>> + .function_flags = OXYGEN_FUNCTION_SPI | > >>> OXYGEN_FUNCTION_ENABLE_SPI_4_5, > >> > >> Why? > > > > Because this just works and as in the Windows driver. > > If nothing is connected to those pins, it doesn't matter. This code > in the Windows driver probably was just copy/pasted from the D2 code. > > >>> +++ linux-3.12-my/sound/pci/oxygen/xonar_dg.h > >> > >> This file was intended as the interface between xonar_dg.c and the > >> generic oxygen.c driver. > >> > >> That you have to add so much stuff indicates that xonar_dg.c and > >> xonar_dg_mixer.c are not very independent and maybe should have > >> stayed a single file. > > > > But moving mixer to another file so simplifies things... > > Your choice. But it makes it hard to review changes when you move the > code around in the same patch. > > > Regards, > Clemens > Okay, I won't argue. If the driver will work with the changes, I don't care. How should I name the subject? Should I mark this with "RESEND" or "UPDATE" or leave the subject named like "[PATCH 2/2] snd-oxygen: Fixes for the Xonar DG card"? -- Kind regards, Roman Volkov, v1ron(a)mail.ru

1 0

[alsa-devel] question about aplay fails on arm 64
by 曹能华 20 Nov '13

20 Nov '13

Hello, alsa maintainer: Recently, i encounter aplay failed on arm 64 bits core. My test environment is: Linux kernel use arm 64 bits, and alsa-lib/aplay is 32 bit version. So the ioctl interface should use snd_pcm_ioctl_compat. but when i use aplay to playback music, i encounter "aplay" segment fault. Do we need some special configuration for alsa-lib/aplay to support 64 bit kernel? Any suggestion will be appreciated. Thanks! [\u@\h: \W]\#aplay windows.wav [ 85.237519] 823 (aplay) snd_pcm_playback_open+++ [ 85.247876] 823 (aplay) snd_pcm_aio_write--- [ 85.254708] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 85.263597] 823 (aplay) ======snd_pcm_ioctl_compat3333 [ 85.271850] 823 (aplay) snd_pcm_playback_ioctl1+++ [ 85.279019] 823 (aplay) snd_pcm_common_ioctl1+++ [ 85.285318] 823 (aplay) snd_pcm_common_ioctl122 [ 85.292253] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 85.300186] 823 (aplay) ======snd_pcm_ioctl_compat3333 [ 85.307569] 823 (aplay) snd_pcm_playback_ioctl1+++ [ 85.314021] 823 (aplay) snd_pcm_common_ioctl1+++ [ 85.320697] 823 (aplay) snd_pcm_common_ioctl111 [ 85.328240] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 85.336255] 823 (aplay) ======snd_pcm_ioctl_compat3333 [ 85.343185] 823 (aplay) snd_pcm_playback_ioctl1+++ [ 85.350090] 823 (aplay) snd_pcm_common_ioctl1+++ [ 85.356800] 823 (aplay) snd_pcm_common_ioctl144 [ 85.366441] 823 (aplay) =====snd_pcm_mmap+++ [ 85.372840] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 85.380709] 823 (aplay) ======snd_pcm_ioctl_compat9999 [ 85.388074] 823 (aplay) snd_pcm_ioctl_sync_ptr_compat++ [ 85.395184] 823 (aplay) state:0x0 [ 85.400355] 823 (aplay) hw_ptr:0x0 [ 85.405080] 823 (aplay) tstamp:0x0 [ 85.410326] 823 (aplay) suspend_stat:0x0 [ 85.416216] 823 (aplay) tstamp:0x0 [ 85.421039] 823 (aplay) appl_ptr:0x0 [ 85.426489] 823 (aplay) avail_min:0x1 [ 85.431579] 823 (aplay) snd_pcm_ioctl_sync_ptr_compat-- [ 85.443771] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 85.451883] 823 (aplay) ======snd_pcm_ioctl_compat3333 [ 85.459321] 823 (aplay) snd_pcm_playback_ioctl1+++ [ 85.466280] 823 (aplay) snd_pcm_common_ioctl1+++ [ 85.472539] 823 (aplay) snd_pcm_common_ioctl122 Playing WAVE 'windows.wav' : Signed 16 bit Little Endian, Rate 22050 Hz, Stereo [ 85.500612] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 85.508756] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 85.519975] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 85.528101] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 85.536112] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 85.543496] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 85.552271] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 85.560207] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 85.594120] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 85.602221] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 85.639453] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 85.647597] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 85.656416] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 85.663826] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 85.693293] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 85.701231] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 85.730988] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 85.739043] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 85.748850] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 85.756855] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 85.765543] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 85.772949] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 85.802272] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 85.810266] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 85.839909] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 85.847899] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 85.857606] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 85.865619] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 85.873814] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 85.881784] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 85.891149] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 85.899062] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 85.911247] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 85.919318] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 85.928068] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 85.935994] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 85.945446] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 85.952828] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 85.962969] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 85.971003] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 85.980633] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 85.988651] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 85.997912] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.005880] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.019755] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.027851] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.037648] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.045668] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.055326] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.062700] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.071957] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.079852] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.093442] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.101428] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.110880] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.118767] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.128022] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.136031] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.145312] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.152642] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.166234] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.174252] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.185470] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.192864] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.202191] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.210222] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.219452] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.227353] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.241140] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.249167] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.258633] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.266583] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.275809] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.283209] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.292507] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.300462] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.312362] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.320295] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.329874] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.337825] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.347005] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.354979] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.364272] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.371671] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.386035] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.394010] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.404122] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.411491] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.420685] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.428587] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.437805] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.445723] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.458333] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.466412] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.476696] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.484743] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.494008] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.501393] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.510721] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.518682] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.528949] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.536991] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.546180] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.554122] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.563543] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.570903] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.583664] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.591141] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.600602] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.608548] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.617702] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.625703] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.634924] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.642317] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.653731] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.661075] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.670427] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.678383] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.687594] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.695585] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.709565] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.717652] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.734313] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.741774] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.755420] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.763633] 823 (aplay) ======snd_pcm_ioctl_compat5555 [ 86.773070] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.780448] 823 (aplay) ======snd_pcm_ioctl_compat66666 [ 86.789495] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.797508] 823 (aplay) ======snd_pcm_ioctl_compat9999 [ 86.804939] 823 (aplay) snd_pcm_ioctl_sync_ptr_compat++ [ 86.812086] 823 (aplay) state:0x1 [ 86.817225] 823 (aplay) hw_ptr:0x0 [ 86.821974] 823 (aplay) tstamp:0x0 [ 86.827171] 823 (aplay) suspend_stat:0x0 [ 86.833049] 823 (aplay) tstamp:0x0 [ 86.837795] 823 (aplay) appl_ptr:0x0 [ 86.843255] 823 (aplay) avail_min:0x1 [ 86.848303] 823 (aplay) snd_pcm_ioctl_sync_ptr_compat-- [ 86.857505] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.865637] 823 (aplay) ======snd_pcm_ioctl_compat77777 [ 86.874082] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.881454] 823 (aplay) ======snd_pcm_ioctl_compat1010 [ 86.889143] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.896981] 823 (aplay) ======snd_pcm_ioctl_compat1010 [ 86.904723] 823 (aplay) =====snd_pcm_mmap+++ [ 86.910536] 823 (aplay) =====snd_pcm_mmap33 [ 86.919994] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.928068] 823 (aplay) ======snd_pcm_ioctl_compat77777 [ 86.937550] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 86.945512] 823 (aplay) ======snd_pcm_ioctl_compat9999 [ 86.952892] 823 (aplay) snd_pcm_ioctl_sync_ptr_compat++ [ 86.959975] 823 (aplay) state:0x1 [ 86.965065] 823 (aplay) hw_ptr:0x0 [ 86.969876] 823 (aplay) tstamp:0x0 [ 86.975111] 823 (aplay) suspend_stat:0x0 [ 86.980497] 823 (aplay) tstamp:0x0 [ 86.985722] 823 (aplay) appl_ptr:0x0 [ 86.990719] 823 (aplay) avail_min:0x300 [ 86.996397] 823 (aplay) snd_pcm_ioctl_sync_ptr_compat-- [ 87.004605] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 87.012676] 823 (aplay) ======snd_pcm_ioctl_compat3333 [ 87.019501] 823 (aplay) snd_pcm_playback_ioctl1+++ [ 87.026451] 823 (aplay) snd_pcm_common_ioctl1+++ [ 87.033169] 823 (aplay) snd_pcm_common_ioctl11111 [ 87.048203] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 87.056227] 823 (aplay) ======snd_pcm_ioctl_compat9999 [ 87.063579] 823 (aplay) snd_pcm_ioctl_sync_ptr_compat++ [ 87.070579] 823 (aplay) state:0x2 [ 87.075679] 823 (aplay) hw_ptr:0x0 [ 87.080477] 823 (aplay) tstamp:0x0 [ 87.085657] 823 (aplay) suspend_stat:0x0 [ 87.091028] 823 (aplay) tstamp:0x0 [ 87.096229] 823 (aplay) appl_ptr:0x0 [ 87.101165] 823 (aplay) avail_min:0x300 [ 87.106813] 823 (aplay) snd_pcm_ioctl_sync_ptr_compat-- [ 87.116559] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 87.124489] 823 (aplay) ======snd_pcm_ioctl_compat77777 [ 87.134835] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 87.142950] 823 (aplay) ======snd_pcm_ioctl_compat9999 [ 87.149868] 823 (aplay) snd_pcm_ioctl_sync_ptr_compat++ [ 87.157350] 823 (aplay) state:0x2 [ 87.162475] 823 (aplay) hw_ptr:0x0 [ 87.167254] 823 (aplay) tstamp:0x0 [ 87.172485] 823 (aplay) suspend_stat:0x0 [ 87.177886] 823 (aplay) tstamp:0x0 [ 87.183131] 823 (aplay) appl_ptr:0x0 [ 87.188110] 823 (aplay) avail_min:0x300 [ 87.193880] 823 (aplay) snd_pcm_ioctl_sync_ptr_compat-- [ 87.202114] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 87.209559] 823 (aplay) ======snd_pcm_ioctl_compat9999 [ 87.217028] 823 (aplay) snd_pcm_ioctl_sync_ptr_compat++ [ 87.224520] 823 (aplay) state:0x2 [ 87.229146] 823 (aplay) hw_ptr:0x0 [ 87.234352] 823 (aplay) tstamp:0x0 [ 87.239101] 823 (aplay) suspend_stat:0x0 [ 87.244924] 823 (aplay) tstamp:0x0 [ 87.249708] 823 (aplay) appl_ptr:0x0 [ 87.255147] 823 (aplay) avail_min:0x300 [ 87.260432] 823 (aplay) snd_pcm_ioctl_sync_ptr_compat-- [ 87.268036] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 87.275875] 823 (aplay) ======snd_pcm_ioctl_compat9999 [ 87.283164] 823 (aplay) snd_pcm_ioctl_sync_ptr_compat++ [ 87.290225] 823 (aplay) state:0x2 [ 87.295283] 823 (aplay) hw_ptr:0x0 [ 87.300041] 823 (aplay) tstamp:0x0 [ 87.305174] 823 (aplay) suspend_stat:0x0 [ 87.310583] 823 (aplay) tstamp:0x0 [ 87.315771] 823 (aplay) appl_ptr:0x0 [ 87.320771] 823 (aplay) avail_min:0x300 [ 87.326468] 823 (aplay) snd_pcm_ioctl_sync_ptr_compat-- [ 87.335868] 823 (aplay) ======snd_pcm_ioctl_compat++++++++ [ 87.343945] 823 (aplay) ======snd_pcm_ioctl_compat9999 [ 87.350825] 823 (aplay) snd_pcm_ioctl_sync_ptr_compat++ [ 87.358387] 823 (aplay) state:0x2 [ 87.363532] 823 (aplay) hw_ptr:0x0 [ 87.368252] 823 (aplay) tstamp:0x0 [ 87.373510] 823 (aplay) suspend_stat:0x0 [ 87.378904] 823 (aplay) tstamp:0x0 [ 87.384100] 823 (aplay) appl_ptr:0x0 [ 87.389050] 823 (aplay) avail_min:0x300 [ 87.394764] 823 (aplay) snd_pcm_ioctl_sync_ptr_compat-- [ 87.403146] 823 (aplay) Bad mode in Error handler detected, code 0xbf000000 [ 87.412595] 823 (aplay) CPU: 0 PID: 823 Comm: aplay Not tainted 3.10.0+ #35 [ 87.421956] 823 (aplay) task: ffffffc019add7c0 ti: ffffffc019a50000 task.ti: ffffffc019a50000 [ 87.433106] 823 (aplay) PC is at 0xf72fd970 [ 87.438849] 823 (aplay) LR is at 0x0 [ 87.443931] 823 (aplay) pc : [<00000000f72fd970>] lr : [<0000000000000000>] pstate: 80000010 [ 87.454906] 823 (aplay) sp : ffffffc019a51ff0 [ 87.460837] x29: 0000000000000000 x28: 0000000000000000 [ 87.468175] x27: 0000000000000000 x26: 0000000000000000 [ 87.475415] x25: 0000000000000000 x24: 0000000000000000 [ 87.482645] x23: 0000000000000000 x22: 0000000000000000 [ 87.489961] x21: 0000000000000000 x20: 0000000000000000 [ 87.497217] x19: 0000000000000000 x18: 0000000000000000 [ 87.504365] x17: 0000000000000000 x16: 0000000000000000 [ 87.511611] x15: 0000000000000000 x14: 00000000f72fd9ec [ 87.518832] x13: 00000000ffa0ee98 x12: 00000000ffa0ee98 [ 87.526061] x11: 00000000ffa0eeec x10: 000000000001e32c [ 87.533332] x9 : 000000000001e31c x8 : 00000000ffa0f168 [ 87.540473] x7 : 00000000ffa0f168 x6 : 00000000ffa0f180 [ 87.547681] x5 : 00000000f738f000 x4 : 000000000000000f [ 87.554817] x3 : 0000000000000300 x2 : 0000000000000001 [ 87.561998] x1 : 0000000000000000 x0 : 0000000000000000 [ 87.569196] 823 (aplay) [ 87.573201] 823 (aplay) Bad mode in Synchronous Abort handler detected, code 0x86000007 [ 87.583794] 823 (aplay) CPU: 0 PID: 823 Comm: aplay Not tainted 3.10.0+ #35 [ 87.593059] 823 (aplay) task: ffffffc019add7c0 ti: ffffffc019a50000 task.ti: ffffffc019a50000 [ 87.603993] 823 (aplay) PC is at 0x0 [ 87.608968] 823 (aplay) LR is at 0x0 [ 87.614003] 823 (aplay) pc : [<0000000000000000>] lr : [<0000000000000000>] pstate: 800003c5 [ 87.624868] 823 (aplay) sp : ffffffc019a51ed0 [ 87.630832] x29: 0000000000000000 x28: 0000000000000000 [ 87.638120] x27: 0000000000000000 x26: 0000000000000000 [ 87.645395] x25: 0000000000000000 x24: 0000000000000000 [ 87.652731] x23: 0000000080000010 x22: 00000000f72fd970 [ 87.659999] x21: ffffffc019a51ff0 x20: 0000000000000000 [ 87.667198] x19: 0000000000000000 x18: 0000000000000000 [ 87.674377] x17: 0000000000000000 x16: 0000000000000000 [ 87.681570] x15: 0000000000000002 x14: 0000000000000082 [ 87.688706] x13: 0000000000000000 x12: 0000000000001db0 [ 87.695986] x11: ffffffc0012376f8 x10: 0000000000000050 [ 87.703184] x9 : ffffffc019a51c60 x8 : ffffffc000590228 [ 87.710415] x7 : 0000000000000003 x6 : 000000000000027d [ 87.717643] x5 : ffffffc000081380 x4 : 0000000000000000 [ 87.724914] x3 : 0000000000000001 x2 : 0000000000000001 [ 87.732107] x1 : ffffffc019a51de0 x0 : 0000000000000000 [ 87.739282] 823 (aplay) [ 87.743126] 823 (aplay) Internal error: Oops - bad mode: 0 [#1] PREEMPT [ 87.752089] 823 (aplay) CPU: 0 PID: 823 Comm: aplay Not tainted 3.10.0+ #35 [ 87.761348] 823 (aplay) task: ffffffc019add7c0 ti: ffffffc019a50000 task.ti: ffffffc019a50000 [ 87.772375] 823 (aplay) PC is at 0x0 [ 87.777318] 823 (aplay) LR is at 0x0 [ 87.782386] 823 (aplay) pc : [<0000000000000000>] lr : [<0000000000000000>] pstate: 800003c5 [ 87.793320] 823 (aplay) sp : ffffffc019a51ed0 [ 87.799289] x29: 0000000000000000 x28: 0000000000000000 [ 87.806491] x27: 0000000000000000 x26: 0000000000000000 [ 87.813665] x25: 0000000000000000 x24: 0000000000000000 [ 87.820915] x23: 0000000080000010 x22: 00000000f72fd970 [ 87.828152] x21: ffffffc019a51ff0 x20: 0000000000000000 [ 87.835382] x19: 0000000000000000 x18: 0000000000000000 [ 87.842585] x17: 0000000000000000 x16: 0000000000000000 [ 87.849845] x15: 0000000000000002 x14: 0000000000000082 [ 87.857020] x13: 0000000000000000 x12: 0000000000001db0 [ 87.864266] x11: ffffffc0012376f8 x10: 0000000000000050 [ 87.871505] x9 : ffffffc019a51c60 x8 : ffffffc000590228 [ 87.878720] x7 : 0000000000000003 x6 : 000000000000027d [ 87.885914] x5 : ffffffc000081380 x4 : 0000000000000000 [ 87.893121] x3 : 0000000000000001 x2 : 0000000000000001 [ 87.900321] x1 : ffffffc019a51de0 x0 : 0000000000000000 [ 87.907443] 823 (aplay) [ 87.911323] 823 (aplay) Process aplay (pid: 823, stack limit = 0xffffffc019a50058) [ 87.921331] 823 (aplay) Stack: (0xffffffc019a51ed0 to 0xffffffc019a52000) [ 87.930547] 823 (aplay) 1ec0: 00000000 00000000 00000000 00000000 [ 87.942875] 823 (aplay) 1ee0: 00000001 00000000 00000300 00000000 0000000f 00000000 f738f000 00000000 [ 87.955305] 823 (aplay) 1f00: ffa0f180 00000000 ffa0f168 00000000 ffa0f168 00000000 0001e31c 00000000 [ 87.967718] 823 (aplay) 1f20: 0001e32c 00000000 ffa0eeec 00000000 ffa0ee98 00000000 ffa0ee98 00000000 [ 87.979993] 823 (aplay) 1f40: f72fd9ec 00000000 00000000 00000000 00000000 00000000 00000000 00000000 [ 87.992343] 823 (aplay) 1f60: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 [ 88.004660] 823 (aplay) 1f80: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 [ 88.016989] 823 (aplay) 1fa0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 [ 88.029331] 823 (aplay) 1fc0: 00000000 00000000 19a51ff0 ffffffc0 f72fd970 00000000 80000010 00000000 [ 88.041739] 823 (aplay) 1fe0: 00000004 00000000 ffffffff ffffffff 00400080 a201ca14 00400020 200130de [ 88.053478] 823 (aplay) Call trace: [ 88.058456] 823 (aplay) Code: bad PC value [ 88.065099] 823 (aplay) ---[ end trace c58f84f42ebfb68b ]--- [ 88.091636] 823 (aplay) snd_pcm_release++ [ 88.098134] 823 (aplay) snd_pcm_release-- Segmentation fault [\u@\h: \W]\# BR cosmo

2 1

[alsa-devel] [PATCH] ALSA: hda - A casual Dell Headset quirk
by David Henningsson 20 Nov '13

20 Nov '13

You're looking at a casual headset patch, for a specific hardware it will match, and suddenly, the headset jack will work, so please apply this simple quirk! BugLink: https://bugs.launchpad.net/bugs/1253038 Signed-off-by: David Henningsson <david.henningsson(a)canonical.com> --- sound/pci/hda/patch_realtek.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index 8593d4e..a90bfab 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -4915,6 +4915,7 @@ static const struct snd_pci_quirk alc662_fixup_tbl[] = { SND_PCI_QUIRK(0x1025, 0x038b, "Acer Aspire 8943G", ALC662_FIXUP_ASPIRE), SND_PCI_QUIRK(0x1028, 0x05d8, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE), SND_PCI_QUIRK(0x1028, 0x05db, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE), + SND_PCI_QUIRK(0x1028, 0x0625, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE), SND_PCI_QUIRK(0x1028, 0x0626, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE), SND_PCI_QUIRK(0x103c, 0x1632, "HP RP5800", ALC662_FIXUP_HP_RP5800), SND_PCI_QUIRK(0x1043, 0x1477, "ASUS N56VZ", ALC662_FIXUP_BASS_CHMAP), -- 1.7.9.5

2 1

[alsa-devel] [PATCH] Maya44+ Support in ALSA
by Simone Camporeale 20 Nov '13

20 Nov '13

I found some problems on Maya44+ USB support in linux. Using ubuntu 13.04 , Ubuntu 13.10 with alsa driver alsa-driver-1.0.25+dfsg i found that this card isn't supported. Only 2 of 4 channels work and they are mixed . This card mounts TI TUSB3200AC chip. This chip is also used in Re Loop devices and in Herlcues DJ Console. To fix this problem i found on google a patch for Reloop device. I chanaged VID and PID for MAYA44+ and now it works . This patch involves in edititing ./sound/usb/quirks-table.h according to attached patch Also i provide an .asoundrc. With this .asoundrc you are able to use each input and output channel maya44+ patch --- a/sound/usb/quirks-table.h 2013-11-12 12:43:24.380251603 +0100 +++ b/sound/usb/quirks-table.h 2013-11-06 12:28:20.000000000 +0100 @@ -320,6 +320,93 @@ #undef YAMAHA_DEVICE #undef YAMAHA_INTERFACE + +/* Reloop Play */ +{ + USB_DEVICE(0x200c, 0x100b), + .bInterfaceClass = USB_CLASS_PER_INTERFACE, + .driver_info = (unsigned long) &(const struct snd_usb_audio_quirk) { + .ifnum = QUIRK_ANY_INTERFACE, + .type = QUIRK_COMPOSITE, + .data = &(const struct snd_usb_audio_quirk[]) { + { + .ifnum = 0, + .type = QUIRK_AUDIO_STANDARD_MIXER, + }, + { + .ifnum = 1, + .type = QUIRK_AUDIO_FIXED_ENDPOINT, + .data = &(const struct audioformat) { + .formats = SNDRV_PCM_FMTBIT_S24_3LE, + .channels = 4, + .iface = 1, + .altsetting = 1, + .altset_idx = 1, + .attributes = UAC_EP_CS_ATTR_SAMPLE_RATE, + .endpoint = 0x01, + .ep_attr = USB_ENDPOINT_SYNC_ADAPTIVE, + .rates = SNDRV_PCM_RATE_44100 | + SNDRV_PCM_RATE_48000, + .rate_min = 44100, + .rate_max = 48000, + .nr_rates = 2, + .rate_table = (unsigned int[]) { + 44100, 48000 + } + } + }, + { + .ifnum = -1 + } + } + } +}, + +/* Maya44 USB+ Play */ +{ + USB_DEVICE(0x2573, 0x0008), + .bInterfaceClass = USB_CLASS_PER_INTERFACE, + .driver_info = (unsigned long) &(const struct snd_usb_audio_quirk) { + .ifnum = QUIRK_ANY_INTERFACE, + .type = QUIRK_COMPOSITE, + .data = &(const struct snd_usb_audio_quirk[]) { + { + .ifnum = 0, + .type = QUIRK_AUDIO_STANDARD_MIXER, + }, + { + .ifnum = 1, + .type = QUIRK_AUDIO_FIXED_ENDPOINT, + .data = &(const struct audioformat) { + .formats = SNDRV_PCM_FMTBIT_S24_3LE, + .channels = 4, + .iface = 1, + .altsetting = 1, + .altset_idx = 1, + .attributes = UAC_EP_CS_ATTR_SAMPLE_RATE, + .endpoint = 0x01, + .ep_attr = USB_ENDPOINT_SYNC_ADAPTIVE, + .rates = SNDRV_PCM_RATE_44100 | + SNDRV_PCM_RATE_48000, + .rate_min = 44100, + .rate_max = 48000, + .nr_rates = 2, + .rate_table = (unsigned int[]) { + 44100, 48000 + } + } + }, + { + .ifnum = -1 + } + } + } +}, + + + + + /* * Roland/RolandED/Edirol/BOSS devices */ .asoundrc example: pcm.dshare { type dmix ipc_key 2048 slave { pcm "hw:1" rate 44100 period_time 0 period_size 1024 buffer_size 8192 channels 4 } bindings { 0 0 1 1 2 2 3 3 } } pcm.dsnooped { type dsnoop ipc_key 2048 slave { pcm "hw:1" rate 48000 periods 0 period_time 0 period_size 1024 buffer_size 4096 channels 4 } } pcm.mayaAin1 { type plug slave { pcm "dsnooped" channels 4 } ttable.0.0 1 } pcm.mayaAin2 { type plug slave { pcm "dsnooped" channels 4 } ttable.0.1 1 } pcm.mayaAin3 { type plug slave { pcm "dsnooped" channels 4 } ttable.0.2 1 } pcm.mayaAin4 { type plug slave { pcm "dsnooped" channels 4 } ttable.0.3 1 } pcm.mayaAout1 { type plug slave { pcm "dshare" channels 4 } ttable.0.0 1 } pcm.mayaAout2 { type plug slave { pcm "dshare" channels 4 } ttable.0.1 1 } pcm.mayaAout3 { type plug slave { pcm "dshare" channels 4 } ttable.0.2 1 } pcm.mayaAout4 { type plug slave { pcm "dshare" channels 4 } ttable.0.3 1 }

2 4

[alsa-devel] [PATCH 2/2] snd-oxygen: Fixes for the Xonar DG card
by Roman Volkov 20 Nov '13

20 Nov '13

Fixes for the Xonar DG model of the Oxygen driver: CS4245 CODEC now fully supported with the headphone amplifier. Both front panel and rear jacks work. Full support of capturing: from the microphone, line in, and aux input. Multichannel playback routing corrected for 2.0/4.0/5.1 speakers New mixer controls, hardware volume control supported for headphones only. Signed-off-by: Roman I Volkov <v1ron(a)mail.ru> --- Depends on: [PATCH 1/2] snd-oxygen: Changes for oxygen driver to fix the Xonar DG card diff -uprN linux-3.12/sound/pci/oxygen/Makefile linux-3.12-my/sound/pci/oxygen/Makefile --- linux-3.12/sound/pci/oxygen/Makefile 2013-11-04 03:41:51.000000000 +0400 +++ linux-3.12-my/sound/pci/oxygen/Makefile 2013-11-15 16:55:55.000000000 +0400 @@ -1,5 +1,5 @@ snd-oxygen-lib-objs := oxygen_io.o oxygen_lib.o oxygen_mixer.o oxygen_pcm.o -snd-oxygen-objs := oxygen.o xonar_dg.o +snd-oxygen-objs := oxygen.o xonar_dg.o xonar_dg_mixer.o snd-virtuoso-objs := virtuoso.o xonar_lib.o \ xonar_pcm179x.o xonar_cs43xx.o xonar_wm87x6.o xonar_hdmi.o diff -uprN linux-3.12/sound/pci/oxygen/xonar_dg.c linux-3.12-my/sound/pci/oxygen/xonar_dg.c --- linux-3.12/sound/pci/oxygen/xonar_dg.c 2013-11-04 03:41:51.000000000 +0400 +++ linux-3.12-my/sound/pci/oxygen/xonar_dg.c 2013-11-19 01:01:07.000000000 +0400 @@ -2,7 +2,7 @@ * card driver for the Xonar DG/DGX * * Copyright (c) Clemens Ladisch <clemens(a)ladisch.de> - * + * Copyright (c) Roman Volkov <v1ron(a)mail.ru> * * This driver is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License, version 2. @@ -17,32 +17,48 @@ */ /* - * Xonar DG/DGX + * TODOs: + * DGX card: not tested. + * Suspend/resume: not tested + * SPDIF: not tested + * 128kHz doesn't work for CS4361 (multichannel playback) + * * ------------ * + * Pecularities: + * CS4245/CS4361 both will mute outputs if MCLK\BCLK\LRCK rates are invalid. + * CS4245 mutes DAC even if ADC clocks are invalid. + * CS4245 Auxiliary Output is connected to the front panel headphones jack + * through amplifier. + * * CMI8788: * * SPI 0 -> CS4245 * + * Playback: * I²S 1 -> CS4245 * I²S 2 -> CS4361 (center/LFE) * I²S 3 -> CS4361 (surround) * I²S 4 -> CS4361 (front) + * Capture: + * I²S ADC 1 <- CS4245 * - * GPIO 3 <- ? + * GPIO 3 <- unused (?) * GPIO 4 <- headphone detect - * GPIO 5 -> route input jack to line-in (0) or mic-in (1) - * GPIO 6 -> route input jack to line-in (0) or mic-in (1) - * GPIO 7 -> enable rear headphone amp - * GPIO 8 -> enable output to speakers + * GPIO 5 -> ADC analog circuit power supply control for left channel (?) + * GPIO 6 -> ADC analog circuit power supply control for right channel (?) + * GPIO 7 -> switches green rear output jack between CS4245 / CS4361 first + * channel + * GPIO 8 -> DAC analog circuit power supply control (?) * * CS4245: * - * input 1 <- aux - * input 2 <- front mic - * input 4 <- line/mic + * input 0 <- Microphone + * input 1 <- Aux + * input 2 <- Front Panel Mic + * input 4 <- Line In * DAC out -> headphones - * aux out -> front panel headphones + * AUX out -> front panel headphones */ #include <linux/pci.h> @@ -56,536 +72,263 @@ #include "xonar_dg.h" #include "cs4245.h" -#define GPIO_MAGIC 0x0008 -#define GPIO_HP_DETECT 0x0010 -#define GPIO_INPUT_ROUTE 0x0060 -#define GPIO_HP_REAR 0x0080 -#define GPIO_OUTPUT_ENABLE 0x0100 - -struct dg { - unsigned int output_sel; - s8 input_vol[4][2]; - unsigned int input_sel; - u8 hp_vol_att; - u8 cs4245_regs[0x11]; -}; - -static void cs4245_write(struct oxygen *chip, unsigned int reg, u8 value) +int cs4245_write_spi(struct oxygen *chip, u8 reg) { struct dg *data = chip->model_data; - oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER | - OXYGEN_SPI_DATA_LENGTH_3 | - OXYGEN_SPI_CLOCK_1280 | - (0 << OXYGEN_SPI_CODEC_SHIFT) | - OXYGEN_SPI_CEN_LATCH_CLOCK_HI, - CS4245_SPI_ADDRESS | - CS4245_SPI_WRITE | - (reg << 8) | value); - data->cs4245_regs[reg] = value; + return oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER | + OXYGEN_SPI_DATA_LENGTH_3 | OXYGEN_SPI_CLOCK_1280 | + (0 << OXYGEN_SPI_CODEC_SHIFT) | OXYGEN_SPI_CEN_LATCH_CLOCK_HI, + (((u32)CS4245_SPI_ADDRESS) << 16) | (((u32)reg) << 8) | + ((u32)data->cs4245_shadow[reg])); } -static void cs4245_write_cached(struct oxygen *chip, unsigned int reg, u8 value) +int cs4245_read_spi(struct oxygen *chip, u8 reg) { struct dg *data = chip->model_data; + int ret; - if (value != data->cs4245_regs[reg]) - cs4245_write(chip, reg, value); -} - -static void cs4245_registers_init(struct oxygen *chip) -{ - struct dg *data = chip->model_data; + ret = oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER | + OXYGEN_SPI_DATA_LENGTH_2 | + OXYGEN_SPI_CEN_LATCH_CLOCK_HI | + OXYGEN_SPI_CLOCK_1280 | (0 << OXYGEN_SPI_CODEC_SHIFT), + (CS4245_SPI_ADDRESS << 8) | reg); + if (ret < 0) + return ret; - cs4245_write(chip, CS4245_POWER_CTRL, CS4245_PDN); - cs4245_write(chip, CS4245_DAC_CTRL_1, - data->cs4245_regs[CS4245_DAC_CTRL_1]); - cs4245_write(chip, CS4245_ADC_CTRL, - data->cs4245_regs[CS4245_ADC_CTRL]); - cs4245_write(chip, CS4245_SIGNAL_SEL, - data->cs4245_regs[CS4245_SIGNAL_SEL]); - cs4245_write(chip, CS4245_PGA_B_CTRL, - data->cs4245_regs[CS4245_PGA_B_CTRL]); - cs4245_write(chip, CS4245_PGA_A_CTRL, - data->cs4245_regs[CS4245_PGA_A_CTRL]); - cs4245_write(chip, CS4245_ANALOG_IN, - data->cs4245_regs[CS4245_ANALOG_IN]); - cs4245_write(chip, CS4245_DAC_A_CTRL, - data->cs4245_regs[CS4245_DAC_A_CTRL]); - cs4245_write(chip, CS4245_DAC_B_CTRL, - data->cs4245_regs[CS4245_DAC_B_CTRL]); - cs4245_write(chip, CS4245_DAC_CTRL_2, - CS4245_DAC_SOFT | CS4245_DAC_ZERO | CS4245_INVERT_DAC); - cs4245_write(chip, CS4245_INT_MASK, 0); - cs4245_write(chip, CS4245_POWER_CTRL, 0); -} + ret = oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER | + OXYGEN_SPI_DATA_LENGTH_2 | + OXYGEN_SPI_CEN_LATCH_CLOCK_HI | + OXYGEN_SPI_CLOCK_1280 | (0 << OXYGEN_SPI_CODEC_SHIFT), + (CS4245_SPI_ADDRESS | CS4245_SPI_READ) << 8); + if (ret < 0) + return ret; + ret = oxygen_wait_spi(chip); + if (ret < 0) + return ret; -static void cs4245_init(struct oxygen *chip) -{ - struct dg *data = chip->model_data; + data->cs4245_shadow[reg] = oxygen_read8(chip, OXYGEN_SPI_DATA1); - data->cs4245_regs[CS4245_DAC_CTRL_1] = - CS4245_DAC_FM_SINGLE | CS4245_DAC_DIF_LJUST; - data->cs4245_regs[CS4245_ADC_CTRL] = - CS4245_ADC_FM_SINGLE | CS4245_ADC_DIF_LJUST; - data->cs4245_regs[CS4245_SIGNAL_SEL] = - CS4245_A_OUT_SEL_HIZ | CS4245_ASYNCH; - data->cs4245_regs[CS4245_PGA_B_CTRL] = 0; - data->cs4245_regs[CS4245_PGA_A_CTRL] = 0; - data->cs4245_regs[CS4245_ANALOG_IN] = - CS4245_PGA_SOFT | CS4245_PGA_ZERO | CS4245_SEL_INPUT_4; - data->cs4245_regs[CS4245_DAC_A_CTRL] = 0; - data->cs4245_regs[CS4245_DAC_B_CTRL] = 0; - cs4245_registers_init(chip); - snd_component_add(chip->card, "CS4245"); + return 0; } -static void dg_output_enable(struct oxygen *chip) +static int cs4245_dump_regs(struct oxygen *chip, bool bRead) { - msleep(2500); - oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, GPIO_OUTPUT_ENABLE); + u8 address; + + for (address = 0; address <= 0x10; address++) { + return bRead ? cs4245_read_spi(chip, address) : + cs4245_write_spi(chip, address); + } + return 0; } -static void dg_init(struct oxygen *chip) +static void cs4245_init(struct oxygen *chip) { struct dg *data = chip->model_data; - data->output_sel = 0; - data->input_sel = 3; - data->hp_vol_att = 2 * 16; - - cs4245_init(chip); + /* save the initial state */ + cs4245_dump_regs(chip, true); - oxygen_clear_bits16(chip, OXYGEN_GPIO_CONTROL, - GPIO_MAGIC | GPIO_HP_DETECT); - oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, - GPIO_INPUT_ROUTE | GPIO_HP_REAR | GPIO_OUTPUT_ENABLE); - oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, - GPIO_INPUT_ROUTE | GPIO_HP_REAR); - dg_output_enable(chip); -} + /* + * Power up the CODEC internals, enable soft ramp & zero cross, work + * in async. mode, + * Enable aux output from DAC. DAC output in the Windows driver is + * inverted. + */ + data->cs4245_shadow[CS4245_POWER_CTRL] = 0; + data->cs4245_shadow[CS4245_SIGNAL_SEL] = CS4245_A_OUT_SEL_DAC | + CS4245_ASYNCH; + data->cs4245_shadow[CS4245_DAC_CTRL_1] = 0; + data->cs4245_shadow[CS4245_DAC_CTRL_2] = CS4245_DAC_SOFT | + CS4245_DAC_ZERO | CS4245_INVERT_DAC; + data->cs4245_shadow[CS4245_ADC_CTRL] = 0; + data->cs4245_shadow[CS4245_ANALOG_IN] = CS4245_PGA_SOFT | + CS4245_PGA_ZERO; + data->cs4245_shadow[CS4245_MCLK_FREQ] = (CS4245_MCLK_1 << + CS4245_MCLK1_SHIFT) | (CS4245_MCLK_1 << CS4245_MCLK2_SHIFT); + + cs4245_write_spi(chip, CS4245_SIGNAL_SEL); + cs4245_write_spi(chip, CS4245_DAC_CTRL_1); + cs4245_write_spi(chip, CS4245_DAC_CTRL_2); + cs4245_write_spi(chip, CS4245_ADC_CTRL); + cs4245_write_spi(chip, CS4245_ANALOG_IN); + cs4245_write_spi(chip, CS4245_MCLK_FREQ); + cs4245_write_spi(chip, CS4245_POWER_CTRL); -static void dg_cleanup(struct oxygen *chip) -{ - oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_OUTPUT_ENABLE); + snd_component_add(chip->card, "CS4245"); } -static void dg_suspend(struct oxygen *chip) +static void dg_init(struct oxygen *chip) { - dg_cleanup(chip); -} + /* + * Recommended sequence from the datasheet: reset the codec and then + * initialize it. + * The pin XGPIO1 as XGPIO1, gpios 8,7,6,5,1,0 as outputs. + */ + oxygen_write8_masked(chip, OXYGEN_FUNCTION, 0, + OXYGEN_FUNCTION_RESET_CODEC); + mdelay(1); + oxygen_write8_masked(chip, OXYGEN_FUNCTION, 0xff, + OXYGEN_FUNCTION_RESET_CODEC); + mdelay(1); -static void dg_resume(struct oxygen *chip) -{ - cs4245_registers_init(chip); - dg_output_enable(chip); + cs4245_init(chip); + oxygen_write16(chip, OXYGEN_GPIO_CONTROL, GPIO_OUTPUT_ENABLE | + GPIO_HP_REAR | GPIO_INPUT_ROUTE); + oxygen_write16(chip, OXYGEN_GPIO_DATA, GPIO_HP_REAR | GPIO_INPUT_ROUTE); + /* Anti-pop delay */ + msleep_interruptible(1000); + oxygen_write16(chip, OXYGEN_GPIO_DATA, GPIO_OUTPUT_ENABLE | + GPIO_HP_REAR | GPIO_INPUT_ROUTE); } static void set_cs4245_dac_params(struct oxygen *chip, struct snd_pcm_hw_params *params) { struct dg *data = chip->model_data; - u8 value; + unsigned char tmp; + unsigned char tmp2; - value = data->cs4245_regs[CS4245_DAC_CTRL_1] & ~CS4245_DAC_FM_MASK; - if (params_rate(params) <= 50000) - value |= CS4245_DAC_FM_SINGLE; - else if (params_rate(params) <= 100000) - value |= CS4245_DAC_FM_DOUBLE; - else - value |= CS4245_DAC_FM_QUAD; - cs4245_write_cached(chip, CS4245_DAC_CTRL_1, value); + tmp = data->cs4245_shadow[CS4245_DAC_CTRL_1] & ~CS4245_DAC_FM_MASK; + tmp2 = data->cs4245_shadow[CS4245_MCLK_FREQ] & ~CS4245_MCLK1_MASK; + if (params_rate(params) <= 50000) { + tmp |= CS4245_DAC_FM_SINGLE; + tmp2 |= CS4245_MCLK_1 << CS4245_MCLK1_SHIFT; + } else if (params_rate(params) <= 100000) { + tmp |= CS4245_DAC_FM_DOUBLE; + tmp2 |= CS4245_MCLK_1 << CS4245_MCLK1_SHIFT; + } else { + tmp |= CS4245_DAC_FM_QUAD; + tmp2 |= CS4245_MCLK_2 << CS4245_MCLK1_SHIFT; + } + data->cs4245_shadow[CS4245_DAC_CTRL_1] = tmp; + data->cs4245_shadow[CS4245_MCLK_FREQ] = tmp2; + cs4245_write_spi(chip, CS4245_DAC_CTRL_1); + cs4245_write_spi(chip, CS4245_MCLK_FREQ); } static void set_cs4245_adc_params(struct oxygen *chip, struct snd_pcm_hw_params *params) { struct dg *data = chip->model_data; - u8 value; + unsigned char tmp; + unsigned char tmp2; - value = data->cs4245_regs[CS4245_ADC_CTRL] & ~CS4245_ADC_FM_MASK; - if (params_rate(params) <= 50000) - value |= CS4245_ADC_FM_SINGLE; - else if (params_rate(params) <= 100000) - value |= CS4245_ADC_FM_DOUBLE; - else - value |= CS4245_ADC_FM_QUAD; - cs4245_write_cached(chip, CS4245_ADC_CTRL, value); -} - -static inline unsigned int shift_bits(unsigned int value, - unsigned int shift_from, - unsigned int shift_to, - unsigned int mask) -{ - if (shift_from < shift_to) - return (value << (shift_to - shift_from)) & mask; - else - return (value >> (shift_from - shift_to)) & mask; + tmp = data->cs4245_shadow[CS4245_ADC_CTRL] & ~CS4245_ADC_FM_MASK; + tmp2 = data->cs4245_shadow[CS4245_MCLK_FREQ] & ~CS4245_MCLK2_MASK; + if (params_rate(params) <= 50000) { + tmp |= CS4245_ADC_FM_SINGLE; + tmp2 |= CS4245_MCLK_1 << CS4245_MCLK2_SHIFT; + } else if (params_rate(params) <= 100000) { + tmp |= CS4245_ADC_FM_DOUBLE; + tmp2 |= CS4245_MCLK_1 << CS4245_MCLK2_SHIFT; + } else { + tmp |= CS4245_ADC_FM_QUAD; + tmp2 |= CS4245_MCLK_2 << CS4245_MCLK2_SHIFT; + } + data->cs4245_shadow[CS4245_ADC_CTRL] = tmp; + data->cs4245_shadow[CS4245_MCLK_FREQ] = tmp2; + cs4245_write_spi(chip, CS4245_ADC_CTRL); + cs4245_write_spi(chip, CS4245_MCLK_FREQ); } static unsigned int adjust_dg_dac_routing(struct oxygen *chip, unsigned int play_routing) { - return (play_routing & OXYGEN_PLAY_DAC0_SOURCE_MASK) | - shift_bits(play_routing, - OXYGEN_PLAY_DAC2_SOURCE_SHIFT, - OXYGEN_PLAY_DAC1_SOURCE_SHIFT, - OXYGEN_PLAY_DAC1_SOURCE_MASK) | - shift_bits(play_routing, - OXYGEN_PLAY_DAC1_SOURCE_SHIFT, - OXYGEN_PLAY_DAC2_SOURCE_SHIFT, - OXYGEN_PLAY_DAC2_SOURCE_MASK) | - shift_bits(play_routing, - OXYGEN_PLAY_DAC0_SOURCE_SHIFT, - OXYGEN_PLAY_DAC3_SOURCE_SHIFT, - OXYGEN_PLAY_DAC3_SOURCE_MASK); -} - -static int output_switch_info(struct snd_kcontrol *ctl, - struct snd_ctl_elem_info *info) -{ - static const char *const names[3] = { - "Speakers", "Headphones", "FP Headphones" - }; - - return snd_ctl_enum_info(info, 1, 3, names); -} - -static int output_switch_get(struct snd_kcontrol *ctl, - struct snd_ctl_elem_value *value) -{ - struct oxygen *chip = ctl->private_data; - struct dg *data = chip->model_data; - - mutex_lock(&chip->mutex); - value->value.enumerated.item[0] = data->output_sel; - mutex_unlock(&chip->mutex); - return 0; -} - -static int output_switch_put(struct snd_kcontrol *ctl, - struct snd_ctl_elem_value *value) -{ - struct oxygen *chip = ctl->private_data; - struct dg *data = chip->model_data; - u8 reg; - int changed; - - if (value->value.enumerated.item[0] > 2) - return -EINVAL; - - mutex_lock(&chip->mutex); - changed = value->value.enumerated.item[0] != data->output_sel; - if (changed) { - data->output_sel = value->value.enumerated.item[0]; - - reg = data->cs4245_regs[CS4245_SIGNAL_SEL] & - ~CS4245_A_OUT_SEL_MASK; - reg |= data->output_sel == 2 ? - CS4245_A_OUT_SEL_DAC : CS4245_A_OUT_SEL_HIZ; - cs4245_write_cached(chip, CS4245_SIGNAL_SEL, reg); - - cs4245_write_cached(chip, CS4245_DAC_A_CTRL, - data->output_sel ? data->hp_vol_att : 0); - cs4245_write_cached(chip, CS4245_DAC_B_CTRL, - data->output_sel ? data->hp_vol_att : 0); - - oxygen_write16_masked(chip, OXYGEN_GPIO_DATA, - data->output_sel == 1 ? GPIO_HP_REAR : 0, - GPIO_HP_REAR); - } - mutex_unlock(&chip->mutex); - return changed; -} - -static int hp_volume_offset_info(struct snd_kcontrol *ctl, - struct snd_ctl_elem_info *info) -{ - static const char *const names[3] = { - "< 64 ohms", "64-150 ohms", "150-300 ohms" - }; - - return snd_ctl_enum_info(info, 1, 3, names); -} - -static int hp_volume_offset_get(struct snd_kcontrol *ctl, - struct snd_ctl_elem_value *value) -{ - struct oxygen *chip = ctl->private_data; - struct dg *data = chip->model_data; - - mutex_lock(&chip->mutex); - if (data->hp_vol_att > 2 * 7) - value->value.enumerated.item[0] = 0; - else if (data->hp_vol_att > 0) - value->value.enumerated.item[0] = 1; - else - value->value.enumerated.item[0] = 2; - mutex_unlock(&chip->mutex); - return 0; -} - -static int hp_volume_offset_put(struct snd_kcontrol *ctl, - struct snd_ctl_elem_value *value) -{ - static const s8 atts[3] = { 2 * 16, 2 * 7, 0 }; - struct oxygen *chip = ctl->private_data; struct dg *data = chip->model_data; - s8 att; - int changed; + unsigned int routing = 0; - if (value->value.enumerated.item[0] > 2) - return -EINVAL; - att = atts[value->value.enumerated.item[0]]; - mutex_lock(&chip->mutex); - changed = att != data->hp_vol_att; - if (changed) { - data->hp_vol_att = att; - if (data->output_sel) { - cs4245_write_cached(chip, CS4245_DAC_A_CTRL, att); - cs4245_write_cached(chip, CS4245_DAC_B_CTRL, att); - } + switch (data->pcm_output) { + case PLAYBACK_DST_HP: + case PLAYBACK_DST_HP_FP: + oxygen_write8_masked(chip, OXYGEN_PLAY_ROUTING, + OXYGEN_PLAY_MUTE23 | OXYGEN_PLAY_MUTE45 | + OXYGEN_PLAY_MUTE67, OXYGEN_PLAY_MUTE_MASK); + break; + case PLAYBACK_DST_20_CH: + routing = (0 << OXYGEN_PLAY_DAC0_SOURCE_SHIFT) | + (2 << OXYGEN_PLAY_DAC1_SOURCE_SHIFT) | + (1 << OXYGEN_PLAY_DAC2_SOURCE_SHIFT) | + (0 << OXYGEN_PLAY_DAC3_SOURCE_SHIFT); + oxygen_write8_masked(chip, OXYGEN_PLAY_ROUTING, + OXYGEN_PLAY_MUTE01 | OXYGEN_PLAY_MUTE23 | + OXYGEN_PLAY_MUTE45, OXYGEN_PLAY_MUTE_MASK); + break; + case PLAYBACK_DST_40_CH: + routing = (0 << OXYGEN_PLAY_DAC0_SOURCE_SHIFT) | + (2 << OXYGEN_PLAY_DAC1_SOURCE_SHIFT) | + (1 << OXYGEN_PLAY_DAC2_SOURCE_SHIFT) | + (0 << OXYGEN_PLAY_DAC3_SOURCE_SHIFT); + oxygen_write8_masked(chip, OXYGEN_PLAY_ROUTING, + OXYGEN_PLAY_MUTE01 | + OXYGEN_PLAY_MUTE23, OXYGEN_PLAY_MUTE_MASK); + break; + case PLAYBACK_DST_51_CH: + routing = (0 << OXYGEN_PLAY_DAC0_SOURCE_SHIFT) | + (2 << OXYGEN_PLAY_DAC1_SOURCE_SHIFT) | + (1 << OXYGEN_PLAY_DAC2_SOURCE_SHIFT) | + (0 << OXYGEN_PLAY_DAC3_SOURCE_SHIFT); + oxygen_write8_masked(chip, OXYGEN_PLAY_ROUTING, + OXYGEN_PLAY_MUTE01, OXYGEN_PLAY_MUTE_MASK); + break; } - mutex_unlock(&chip->mutex); - return changed; -} - -static int input_vol_info(struct snd_kcontrol *ctl, - struct snd_ctl_elem_info *info) -{ - info->type = SNDRV_CTL_ELEM_TYPE_INTEGER; - info->count = 2; - info->value.integer.min = 2 * -12; - info->value.integer.max = 2 * 12; - return 0; -} - -static int input_vol_get(struct snd_kcontrol *ctl, - struct snd_ctl_elem_value *value) -{ - struct oxygen *chip = ctl->private_data; - struct dg *data = chip->model_data; - unsigned int idx = ctl->private_value; - - mutex_lock(&chip->mutex); - value->value.integer.value[0] = data->input_vol[idx][0]; - value->value.integer.value[1] = data->input_vol[idx][1]; - mutex_unlock(&chip->mutex); - return 0; + return routing; } -static int input_vol_put(struct snd_kcontrol *ctl, - struct snd_ctl_elem_value *value) +static void dump_cs4245_registers(struct oxygen *chip, + struct snd_info_buffer *buffer) { - struct oxygen *chip = ctl->private_data; struct dg *data = chip->model_data; - unsigned int idx = ctl->private_value; - int changed = 0; - - if (value->value.integer.value[0] < 2 * -12 || - value->value.integer.value[0] > 2 * 12 || - value->value.integer.value[1] < 2 * -12 || - value->value.integer.value[1] > 2 * 12) - return -EINVAL; - mutex_lock(&chip->mutex); - changed = data->input_vol[idx][0] != value->value.integer.value[0] || - data->input_vol[idx][1] != value->value.integer.value[1]; - if (changed) { - data->input_vol[idx][0] = value->value.integer.value[0]; - data->input_vol[idx][1] = value->value.integer.value[1]; - if (idx == data->input_sel) { - cs4245_write_cached(chip, CS4245_PGA_A_CTRL, - data->input_vol[idx][0]); - cs4245_write_cached(chip, CS4245_PGA_B_CTRL, - data->input_vol[idx][1]); - } - } - mutex_unlock(&chip->mutex); - return changed; -} - -static DECLARE_TLV_DB_SCALE(cs4245_pga_db_scale, -1200, 50, 0); - -static int input_sel_info(struct snd_kcontrol *ctl, - struct snd_ctl_elem_info *info) -{ - static const char *const names[4] = { - "Mic", "Aux", "Front Mic", "Line" - }; + unsigned int reg; - return snd_ctl_enum_info(info, 1, 4, names); + snd_iprintf(buffer, "\nCS4245:"); + cs4245_read_spi(chip, CS4245_INT_STATUS); + for (reg = 0; reg < ARRAY_SIZE(data->cs4245_shadow); ++reg) + snd_iprintf(buffer, " %02x", data->cs4245_shadow[reg]); + snd_iprintf(buffer, "\n"); } -static int input_sel_get(struct snd_kcontrol *ctl, - struct snd_ctl_elem_value *value) +/* Put the codec into low power mode, disable audio output, save registers */ +static void dg_suspend(struct oxygen *chip) { - struct oxygen *chip = ctl->private_data; struct dg *data = chip->model_data; - - mutex_lock(&chip->mutex); - value->value.enumerated.item[0] = data->input_sel; - mutex_unlock(&chip->mutex); - return 0; + data->cs4245_shadow[CS4245_POWER_CTRL] = CS4245_PDN_MIC | + CS4245_PDN_ADC | CS4245_PDN_DAC | CS4245_PDN; + cs4245_write_spi(chip, CS4245_POWER_CTRL); + cs4245_dump_regs(chip, true); + oxygen_write16_masked(chip, OXYGEN_GPIO_DATA, 0, GPIO_OUTPUT_ENABLE); } -static int input_sel_put(struct snd_kcontrol *ctl, - struct snd_ctl_elem_value *value) +static void dg_resume(struct oxygen *chip) { - static const u8 sel_values[4] = { - CS4245_SEL_MIC, - CS4245_SEL_INPUT_1, - CS4245_SEL_INPUT_2, - CS4245_SEL_INPUT_4 - }; - struct oxygen *chip = ctl->private_data; struct dg *data = chip->model_data; - int changed; - - if (value->value.enumerated.item[0] > 3) - return -EINVAL; - - mutex_lock(&chip->mutex); - changed = value->value.enumerated.item[0] != data->input_sel; - if (changed) { - data->input_sel = value->value.enumerated.item[0]; - - cs4245_write(chip, CS4245_ANALOG_IN, - (data->cs4245_regs[CS4245_ANALOG_IN] & - ~CS4245_SEL_MASK) | - sel_values[data->input_sel]); - - cs4245_write_cached(chip, CS4245_PGA_A_CTRL, - data->input_vol[data->input_sel][0]); - cs4245_write_cached(chip, CS4245_PGA_B_CTRL, - data->input_vol[data->input_sel][1]); - - oxygen_write16_masked(chip, OXYGEN_GPIO_DATA, - data->input_sel ? 0 : GPIO_INPUT_ROUTE, - GPIO_INPUT_ROUTE); - } - mutex_unlock(&chip->mutex); - return changed; + data->cs4245_shadow[CS4245_POWER_CTRL] = 0; + cs4245_dump_regs(chip, false); + msleep_interruptible(1000); + oxygen_write16_masked(chip, OXYGEN_GPIO_DATA, 0xffff, + GPIO_OUTPUT_ENABLE); } -static int hpf_info(struct snd_kcontrol *ctl, struct snd_ctl_elem_info *info) -{ - static const char *const names[2] = { "Active", "Frozen" }; - - return snd_ctl_enum_info(info, 1, 2, names); -} - -static int hpf_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value) +static void dg_cleanup(struct oxygen *chip) { - struct oxygen *chip = ctl->private_data; - struct dg *data = chip->model_data; - - value->value.enumerated.item[0] = - !!(data->cs4245_regs[CS4245_ADC_CTRL] & CS4245_HPF_FREEZE); - return 0; + dg_suspend(chip); } -static int hpf_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value) -{ - struct oxygen *chip = ctl->private_data; - struct dg *data = chip->model_data; - u8 reg; - int changed; - - mutex_lock(&chip->mutex); - reg = data->cs4245_regs[CS4245_ADC_CTRL] & ~CS4245_HPF_FREEZE; - if (value->value.enumerated.item[0]) - reg |= CS4245_HPF_FREEZE; - changed = reg != data->cs4245_regs[CS4245_ADC_CTRL]; - if (changed) - cs4245_write(chip, CS4245_ADC_CTRL, reg); - mutex_unlock(&chip->mutex); - return changed; -} - -#define INPUT_VOLUME(xname, index) { \ - .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ - .name = xname, \ - .info = input_vol_info, \ - .get = input_vol_get, \ - .put = input_vol_put, \ - .tlv = { .p = cs4245_pga_db_scale }, \ - .private_value = index, \ -} -static const struct snd_kcontrol_new dg_controls[] = { - { - .iface = SNDRV_CTL_ELEM_IFACE_MIXER, - .name = "Analog Output Playback Enum", - .info = output_switch_info, - .get = output_switch_get, - .put = output_switch_put, - }, - { - .iface = SNDRV_CTL_ELEM_IFACE_MIXER, - .name = "Headphones Impedance Playback Enum", - .info = hp_volume_offset_info, - .get = hp_volume_offset_get, - .put = hp_volume_offset_put, - }, - INPUT_VOLUME("Mic Capture Volume", 0), - INPUT_VOLUME("Aux Capture Volume", 1), - INPUT_VOLUME("Front Mic Capture Volume", 2), - INPUT_VOLUME("Line Capture Volume", 3), - { - .iface = SNDRV_CTL_ELEM_IFACE_MIXER, - .name = "Capture Source", - .info = input_sel_info, - .get = input_sel_get, - .put = input_sel_put, - }, - { - .iface = SNDRV_CTL_ELEM_IFACE_MIXER, - .name = "ADC High-pass Filter Capture Enum", - .info = hpf_info, - .get = hpf_get, - .put = hpf_put, - }, -}; - -static int dg_control_filter(struct snd_kcontrol_new *template) +/* Disable built-in volume control, we have only headphone volume */ +static int xonar_control_filter(struct snd_kcontrol_new *template) { if (!strncmp(template->name, "Master Playback ", 16)) return 1; return 0; } -static int dg_mixer_init(struct oxygen *chip) -{ - unsigned int i; - int err; - - for (i = 0; i < ARRAY_SIZE(dg_controls); ++i) { - err = snd_ctl_add(chip->card, - snd_ctl_new1(&dg_controls[i], chip)); - if (err < 0) - return err; - } - return 0; -} - -static void dump_cs4245_registers(struct oxygen *chip, - struct snd_info_buffer *buffer) -{ - struct dg *data = chip->model_data; - unsigned int i; - - snd_iprintf(buffer, "\nCS4245:"); - for (i = 1; i <= 0x10; ++i) - snd_iprintf(buffer, " %02x", data->cs4245_regs[i]); - snd_iprintf(buffer, "\n"); -} - struct oxygen_model model_xonar_dg = { .longname = "C-Media Oxygen HD Audio", .chip = "CMI8786", .init = dg_init, - .control_filter = dg_control_filter, - .mixer_init = dg_mixer_init, + .control_filter = xonar_control_filter, + .mixer_init = xonar_dg_mixer_init, .cleanup = dg_cleanup, .suspend = dg_suspend, .resume = dg_resume, @@ -596,11 +339,11 @@ struct oxygen_model model_xonar_dg = { .model_data_size = sizeof(struct dg), .device_config = PLAYBACK_0_TO_I2S | PLAYBACK_1_TO_SPDIF | - CAPTURE_0_FROM_I2S_2 | + CAPTURE_0_FROM_I2S_1 | CAPTURE_1_FROM_SPDIF, .dac_channels_pcm = 6, .dac_channels_mixer = 0, - .function_flags = OXYGEN_FUNCTION_SPI, + .function_flags = OXYGEN_FUNCTION_SPI | OXYGEN_FUNCTION_ENABLE_SPI_4_5, .dac_mclks = OXYGEN_MCLKS(256, 128, 128), .adc_mclks = OXYGEN_MCLKS(256, 128, 128), .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST, diff -uprN linux-3.12/sound/pci/oxygen/xonar_dg.h linux-3.12-my/sound/pci/oxygen/xonar_dg.h --- linux-3.12/sound/pci/oxygen/xonar_dg.h 2013-11-04 03:41:51.000000000 +0400 +++ linux-3.12-my/sound/pci/oxygen/xonar_dg.h 2013-11-19 01:06:12.000000000 +0400 @@ -3,6 +3,48 @@ #include "oxygen.h" +#define GPIO_MAGIC 0x0008 +#define GPIO_HP_DETECT 0x0010 +#define GPIO_INPUT_ROUTE 0x0060 +#define GPIO_HP_REAR 0x0080 +#define GPIO_OUTPUT_ENABLE 0x0100 + +#define CAPTURE_SRC_MIC 0 +#define CAPTURE_SRC_FP_MIC 1 +#define CAPTURE_SRC_LINE 2 +#define CAPTURE_SRC_AUX 3 + +#define PLAYBACK_DST_HP 0 +#define PLAYBACK_DST_HP_FP 1 +#define PLAYBACK_DST_20_CH 2 +#define PLAYBACK_DST_40_CH 3 +#define PLAYBACK_DST_51_CH 4 + extern struct oxygen_model model_xonar_dg; +/* Xonar DG Specific Data */ +struct dg { + unsigned char cs4245_shadow[16]; + /* Output select: headphone/speakers */ + unsigned char pcm_output; + /* Input select: MIC, Line, Aux */ + unsigned char pga_source; + /* Independend capture volumes */ + char mic_vol_l; + char mic_vol_r; + bool mic_m; + char line_vol_l; + char line_vol_r; + bool line_m; + char aux_vol_l; + char aux_vol_r; + bool aux_m; +}; + +/* Xonar DG SPI/I2C control routines */ +int cs4245_write_spi(struct oxygen *chip, u8 reg); + +/* Xonar DG Mixer */ +int xonar_dg_mixer_init(struct oxygen *chip); + #endif diff -uprN linux-3.12/sound/pci/oxygen/xonar_dg_mixer.c linux-3.12-my/sound/pci/oxygen/xonar_dg_mixer.c --- linux-3.12/sound/pci/oxygen/xonar_dg_mixer.c 1970-01-01 03:00:00.000000000 +0300 +++ linux-3.12-my/sound/pci/oxygen/xonar_dg_mixer.c 2013-11-19 01:04:16.000000000 +0400 @@ -0,0 +1,536 @@ +/* + * Mixer controls for the Xonar DG/DGX + * + * Copyright (c) Roman Volkov <v1ron(a)mail.ru> + * + * This driver is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2. + * + * This driver is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this driver; if not, see <http://www.gnu.org/licenses/>. + */ + +/* + * It is not good that we do not have software volume control + * as the Windows driver does. CS4361 cannot attenuate the volume. + * When we are switching from headphones to the speakers, + * which are controlled by the simple DAC CS4361, our headphones + * in the rear jack can stun us. + */ + +#include <linux/pci.h> +#include <linux/delay.h> +#include <sound/control.h> +#include <sound/core.h> +#include <sound/info.h> +#include <sound/pcm.h> +#include <sound/tlv.h> +#include "oxygen.h" +#include "xonar_dg.h" +#include "cs4245.h" + +/* CS4245 Headphone Channels A&B Volume Control */ +static int xonar_dg_dac_stereo_volume_info(struct snd_kcontrol *ctl, + struct snd_ctl_elem_info *info) +{ + info->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + info->count = 2; + info->value.integer.min = 0; + info->value.integer.max = 255; + return 0; +} + +static int xonar_dg_dac_stereo_volume_get(struct snd_kcontrol *ctl, + struct snd_ctl_elem_value *val) +{ + struct oxygen *chip = ctl->private_data; + struct dg *data = chip->model_data; + unsigned int tmp; + + mutex_lock(&chip->mutex); + tmp = (~data->cs4245_shadow[CS4245_DAC_A_CTRL]) & 255; + val->value.integer.value[0] = tmp; + tmp = (~data->cs4245_shadow[CS4245_DAC_B_CTRL]) & 255; + val->value.integer.value[1] = tmp; + mutex_unlock(&chip->mutex); + return 0; +} + +static int xonar_dg_dac_stereo_volume_put(struct snd_kcontrol *ctl, + struct snd_ctl_elem_value *val) +{ + struct oxygen *chip = ctl->private_data; + struct dg *data = chip->model_data; + + if ((val->value.integer.value[0] > 255) || + (val->value.integer.value[0] < 0) || + (val->value.integer.value[1] > 255) || + (val->value.integer.value[1] < 0)) { + return -EINVAL; + } + mutex_lock(&chip->mutex); + data->cs4245_shadow[CS4245_DAC_A_CTRL] = ~val->value.integer.value[0]; + data->cs4245_shadow[CS4245_DAC_B_CTRL] = ~val->value.integer.value[1]; + cs4245_write_spi(chip, CS4245_DAC_A_CTRL); + cs4245_write_spi(chip, CS4245_DAC_B_CTRL); + mutex_unlock(&chip->mutex); + return 0; +} + +/* CS4245 DAC Mute */ +static int xonar_dg_dac_mute_get(struct snd_kcontrol *ctl, + struct snd_ctl_elem_value *val) +{ + struct oxygen *chip = ctl->private_data; + struct dg *data = chip->model_data; + + mutex_lock(&chip->mutex); + val->value.integer.value[0] = ((data->cs4245_shadow[CS4245_DAC_CTRL_1] + & CS4245_MUTE_DAC) == 0); + mutex_unlock(&chip->mutex); + return 0; +} + +static int xonar_dg_dac_mute_put(struct snd_kcontrol *ctl, + struct snd_ctl_elem_value *val) +{ + struct oxygen *chip = ctl->private_data; + struct dg *data = chip->model_data; + + if (val->value.integer.value[0] > 1) + return -EINVAL; + mutex_lock(&chip->mutex); + data->cs4245_shadow[CS4245_DAC_CTRL_1] &= ~CS4245_MUTE_DAC; + data->cs4245_shadow[CS4245_DAC_CTRL_1] |= + (~val->value.integer.value[0] << 2) & CS4245_MUTE_DAC; + cs4245_write_spi(chip, CS4245_DAC_CTRL_1); + mutex_unlock(&chip->mutex); + return 0; +} + +/* Xonar DG Output Select */ +static int xonar_dg_pcm_route_apply(struct oxygen *chip) +{ + struct dg *data = chip->model_data; + + if (data->pcm_output == PLAYBACK_DST_HP) { + /* Mute FP (aux output) amplifier, switch rear jack to CS4245 */ + oxygen_write8_masked(chip, OXYGEN_GPIO_DATA, 0xff, + GPIO_HP_REAR); + data->cs4245_shadow[CS4245_SIGNAL_SEL] &= + ~CS4245_A_OUT_SEL_MASK; + } else if (data->pcm_output == PLAYBACK_DST_HP_FP) { + /* + * Unmute FP amplifier, switch rear jack to CS4361, + * I2S ports 2,3,4 should be inactive + */ + oxygen_write8_masked(chip, OXYGEN_GPIO_DATA, 0x00, 0x80); + data->cs4245_shadow[CS4245_SIGNAL_SEL] &= + ~CS4245_A_OUT_SEL_MASK; + data->cs4245_shadow[CS4245_SIGNAL_SEL] |= CS4245_A_OUT_SEL_DAC; + } else { + /* + * 2.0, 4.0, 5.1: switch to CS4361, mute FP amp., + * and just change playback routing / DMA channels + */ + oxygen_write8_masked(chip, OXYGEN_GPIO_DATA, 0x00, 0x80); + data->cs4245_shadow[CS4245_SIGNAL_SEL] &= + ~CS4245_A_OUT_SEL_MASK; + } + cs4245_write_spi(chip, CS4245_SIGNAL_SEL); + return 0; +} + +static int xonar_dg_pcm_route_info(struct snd_kcontrol *ctl, + struct snd_ctl_elem_info *info) +{ + static const char *const names[5] = { + "Stereo Headphones", + "Stereo Headphones FP", + "Stereo Speakers", + "4 Speakers", + "5.1 Speakers", + }; + + return snd_ctl_enum_info(info, 1, 5, names); +} + +static int xonar_dg_pcm_route_get(struct snd_kcontrol *ctl, + struct snd_ctl_elem_value *val) +{ + struct oxygen *chip = ctl->private_data; + struct dg *data = chip->model_data; + + mutex_lock(&chip->mutex); + val->value.integer.value[0] = data->pcm_output; + mutex_unlock(&chip->mutex); + + return 0; +} + +static int xonar_dg_pcm_route_put(struct snd_kcontrol *ctl, + struct snd_ctl_elem_value *val) +{ + struct oxygen *chip = ctl->private_data; + struct dg *data = chip->model_data; + int ret; + + mutex_lock(&chip->mutex); + data->pcm_output = val->value.integer.value[0]; + ret = xonar_dg_pcm_route_apply(chip); + oxygen_update_dac_routing(chip); + mutex_unlock(&chip->mutex); + + return ret; +} + +/* CS4245 PGA Source */ +static int xonar_dg_pga_mute_reg_toggle(struct oxygen *chip, bool mute); +static int xonar_dg_pga_volume_reg_write(struct oxygen *chip, char left, + char right); + +static int xonar_dg_pga_source_apply(struct oxygen *chip) +{ + struct dg *data = chip->model_data; + + data->cs4245_shadow[CS4245_ANALOG_IN] &= ~CS4245_SEL_MASK; + if (data->pga_source == CAPTURE_SRC_FP_MIC) + data->cs4245_shadow[CS4245_ANALOG_IN] |= CS4245_SEL_INPUT_2; + else if (data->pga_source == CAPTURE_SRC_LINE) + data->cs4245_shadow[CS4245_ANALOG_IN] |= CS4245_SEL_INPUT_4; + else if (data->pga_source != CAPTURE_SRC_MIC) + data->cs4245_shadow[CS4245_ANALOG_IN] |= CS4245_SEL_INPUT_1; + oxygen_write16_masked(chip, OXYGEN_GPIO_DATA, 0xffff, GPIO_INPUT_ROUTE); + return cs4245_write_spi(chip, CS4245_ANALOG_IN); +} + +static int xonar_dg_pga_source_info(struct snd_kcontrol *ctl, + struct snd_ctl_elem_info *info) +{ + static const char *const ps_names[4] = { + "Microphone", + "Microphone FP", + "Line In", + "Aux" + }; + + return snd_ctl_enum_info(info, 1, 4, ps_names); +} + +static int xonar_dg_pga_source_get(struct snd_kcontrol *ctl, + struct snd_ctl_elem_value *val) +{ + struct oxygen *chip = ctl->private_data; + struct dg *data = chip->model_data; + + mutex_lock(&chip->mutex); + val->value.integer.value[0] = data->pga_source; + mutex_unlock(&chip->mutex); + + return 0; +} + +static int xonar_dg_pga_source_put(struct snd_kcontrol *ctl, + struct snd_ctl_elem_value *val) +{ + struct oxygen *chip = ctl->private_data; + struct dg *data = chip->model_data; + bool mute = false; + long route = val->value.integer.value[0]; + char left = 0; + char right = 0; + int ret; + + if (route > CAPTURE_SRC_AUX) + return -EINVAL; + + mutex_lock(&chip->mutex); + data->pga_source = route; + ret = xonar_dg_pga_source_apply(chip); + if (ret < 0) + goto err; + switch (route) { + case CAPTURE_SRC_MIC: + case CAPTURE_SRC_FP_MIC: + mute = data->mic_m; + left = data->mic_vol_l; + right = data->mic_vol_r; + break; + case CAPTURE_SRC_LINE: + mute = data->line_m; + left = data->line_vol_l; + right = data->line_vol_r; + break; + case CAPTURE_SRC_AUX: + mute = data->aux_m; + left = data->aux_vol_l; + right = data->aux_vol_r; + break; + } + ret = xonar_dg_pga_mute_reg_toggle(chip, mute); + if (ret < 0) + goto err; + ret = xonar_dg_pga_volume_reg_write(chip, left, right); + if (ret < 0) + goto err; +err: + mutex_unlock(&chip->mutex); + + return ret; +} + +/* Common routines to access capture volume register - Mic, Line, Aux */ +static int xonar_dg_pga_volume_reg_write(struct oxygen *chip, char left, + char right) +{ + struct dg *data = chip->model_data; + int ret; + + data->cs4245_shadow[CS4245_PGA_A_CTRL] = left; + data->cs4245_shadow[CS4245_PGA_B_CTRL] = right; + ret = cs4245_write_spi(chip, CS4245_PGA_A_CTRL); + if (ret < 0) + return ret; + return cs4245_write_spi(chip, CS4245_PGA_B_CTRL); +} + +static int xonar_dg_pga_volume_info(struct snd_kcontrol *ctl, + struct snd_ctl_elem_info *info) +{ + info->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + info->count = 2; + info->value.integer.min = -24; + info->value.integer.max = 24; + return 0; +} + +static int xonar_dg_pga_volume_get(struct snd_kcontrol *ctl, + struct snd_ctl_elem_value *val) +{ + struct oxygen *chip = ctl->private_data; + struct dg *data = chip->model_data; + + mutex_lock(&chip->mutex); + switch (ctl->private_value) { + case CAPTURE_SRC_MIC: + val->value.integer.value[0] = data->mic_vol_l; + val->value.integer.value[1] = data->mic_vol_r; + break; + case CAPTURE_SRC_LINE: + val->value.integer.value[0] = data->line_vol_l; + val->value.integer.value[1] = data->line_vol_r; + break; + case CAPTURE_SRC_AUX: + val->value.integer.value[0] = data->aux_vol_l; + val->value.integer.value[1] = data->aux_vol_r; + break; + } + mutex_unlock(&chip->mutex); + + return 0; +} + +static int xonar_dg_pga_volume_put(struct snd_kcontrol *ctl, + struct snd_ctl_elem_value *val) +{ + struct oxygen *chip = ctl->private_data; + struct dg *data = chip->model_data; + long left = val->value.integer.value[0]; + long right = val->value.integer.value[1]; + int ret = 0; + + if ((left > 24) || (left < -24) || (right > 24) || (right < -24)) + return -EINVAL; + + mutex_lock(&chip->mutex); + switch (ctl->private_value) { + case CAPTURE_SRC_MIC: + data->mic_vol_l = left; + data->mic_vol_r = right; + break; + case CAPTURE_SRC_LINE: + data->line_vol_l = left; + data->line_vol_r = right; + break; + case CAPTURE_SRC_AUX: + data->aux_vol_l = left; + data->aux_vol_r = right; + break; + } + switch (data->pga_source) { + case CAPTURE_SRC_MIC: + case CAPTURE_SRC_FP_MIC: + ret = xonar_dg_pga_volume_reg_write(chip, data->mic_vol_l, + data->mic_vol_r); + break; + case CAPTURE_SRC_LINE: + ret = xonar_dg_pga_volume_reg_write(chip, data->line_vol_l, + data->line_vol_r); + break; + case CAPTURE_SRC_AUX: + ret = xonar_dg_pga_volume_reg_write(chip, data->aux_vol_l, + data->aux_vol_r); + break; + } + mutex_unlock(&chip->mutex); + + return ret; +} + +/* Common routines to access capture mute register - Mic, Line, Aux */ +static int xonar_dg_pga_mute_reg_toggle(struct oxygen *chip, bool mute) +{ + struct dg *data = chip->model_data; + + data->cs4245_shadow[CS4245_ADC_CTRL] &= ~CS4245_MUTE_ADC; + data->cs4245_shadow[CS4245_ADC_CTRL] |= ((mute == 0) << 2) & + CS4245_MUTE_ADC; + return cs4245_write_spi(chip, CS4245_ADC_CTRL); +} + +static int xonar_dg_pga_mute_get(struct snd_kcontrol *ctl, + struct snd_ctl_elem_value *val) +{ + struct oxygen *chip = ctl->private_data; + struct dg *data = chip->model_data; + + mutex_lock(&chip->mutex); + switch (ctl->private_value) { + case CAPTURE_SRC_MIC: + val->value.integer.value[0] = data->mic_m != false ? 1 : 0; + break; + case CAPTURE_SRC_LINE: + val->value.integer.value[0] = data->mic_m != false ? 1 : 0; + break; + case CAPTURE_SRC_AUX: + val->value.integer.value[0] = data->mic_m != false ? 1 : 0; + break; + } + mutex_unlock(&chip->mutex); + + return 0; +} + +static int xonar_dg_pga_mute_put(struct snd_kcontrol *ctl, + struct snd_ctl_elem_value *val) +{ + struct oxygen *chip = ctl->private_data; + struct dg *data = chip->model_data; + long tmp = val->value.integer.value[0]; + int ret = 0; + + if ((tmp > 1) || (tmp < 0)) + return -EINVAL; + + mutex_lock(&chip->mutex); + switch (ctl->private_value) { + case CAPTURE_SRC_MIC: + data->mic_m = tmp != 0; + break; + case CAPTURE_SRC_LINE: + data->line_m = tmp != 0; + break; + case CAPTURE_SRC_AUX: + data->aux_m = tmp != 0; + break; + } + switch (data->pga_source) { + case CAPTURE_SRC_MIC: + case CAPTURE_SRC_FP_MIC: + ret = xonar_dg_pga_mute_reg_toggle(chip, data->mic_m); + break; + case CAPTURE_SRC_LINE: + ret = xonar_dg_pga_mute_reg_toggle(chip, data->line_m); + break; + case CAPTURE_SRC_AUX: + ret = xonar_dg_pga_mute_reg_toggle(chip, data->aux_m); + break; + } + mutex_unlock(&chip->mutex); + + return ret; +} + +#define CAPTURE_VOLUME(xname, private) { \ + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ + .name = xname, \ + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \ + SNDRV_CTL_ELEM_ACCESS_TLV_READ, \ + .info = xonar_dg_pga_volume_info, \ + .get = xonar_dg_pga_volume_get, \ + .put = xonar_dg_pga_volume_put, \ + .tlv = { .p = xonar_dg_pga_db_scale, }, \ + .private_value = private, \ + } +#define CAPTURE_SWITCH(xname, private) { \ + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ + .name = xname, \ + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, \ + .info = snd_ctl_boolean_mono_info, \ + .get = xonar_dg_pga_mute_get, \ + .put = xonar_dg_pga_mute_put, \ + .private_value = private, \ + } + +static const DECLARE_TLV_DB_MINMAX(xonar_dg_hp_db_scale, -12550, 0); +static const DECLARE_TLV_DB_MINMAX(xonar_dg_pga_db_scale, -1200, 1200); +static const struct snd_kcontrol_new xonar_dg_controls[] = { + { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .name = "Headphone Playback Volume", + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | + SNDRV_CTL_ELEM_ACCESS_TLV_READ, + .info = xonar_dg_dac_stereo_volume_info, + .get = xonar_dg_dac_stereo_volume_get, + .put = xonar_dg_dac_stereo_volume_put, + .tlv = { .p = xonar_dg_hp_db_scale, }, + }, + { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .name = "Headphone Playback Switch", + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .info = snd_ctl_boolean_mono_info, + .get = xonar_dg_dac_mute_get, + .put = xonar_dg_dac_mute_put, + }, + { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .name = "Output Playback Enum", + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .info = xonar_dg_pcm_route_info, + .get = xonar_dg_pcm_route_get, + .put = xonar_dg_pcm_route_put, + }, + { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .name = "Input Capture Enum", + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .info = xonar_dg_pga_source_info, + .get = xonar_dg_pga_source_get, + .put = xonar_dg_pga_source_put, + }, + CAPTURE_VOLUME("Mic Capture Volume", CAPTURE_SRC_MIC), + CAPTURE_SWITCH("Mic Capture Switch", CAPTURE_SRC_MIC), + CAPTURE_VOLUME("Line Capture Volume", CAPTURE_SRC_LINE), + CAPTURE_SWITCH("Line Capture Switch", CAPTURE_SRC_LINE), + CAPTURE_VOLUME("Aux Capture Volume", CAPTURE_SRC_AUX), + CAPTURE_SWITCH("Aux Capture Switch", CAPTURE_SRC_AUX), +}; + +int xonar_dg_mixer_init(struct oxygen *chip) +{ + unsigned int i; + int ret; + for (i = 0; i < ARRAY_SIZE(xonar_dg_controls); i++) { + ret = snd_ctl_add(chip->card, + snd_ctl_new1(&xonar_dg_controls[i], chip)); + if (ret < 0) + return ret; + } + return 0; +}

2 2

[alsa-devel] [PATCH 07/12] ASoC: rcar: rename GEN2_SRU to GEN2_SCU
by Kuninori Morimoto 20 Nov '13

20 Nov '13

Gen2 has SCU. SRU is for Gen1 Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com> --- include/sound/rcar_snd.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/sound/rcar_snd.h b/include/sound/rcar_snd.h index 12afab1..a818ff7 100644 --- a/include/sound/rcar_snd.h +++ b/include/sound/rcar_snd.h @@ -18,7 +18,7 @@ #define RSND_GEN1_ADG 1 #define RSND_GEN1_SSI 2 -#define RSND_GEN2_SRU 0 +#define RSND_GEN2_SCU 0 #define RSND_GEN2_ADG 1 #define RSND_GEN2_SSIU 2 #define RSND_GEN2_SSI 3 -- 1.7.9.5

2 3

[alsa-devel] [PATCH 1/2] snd-oxygen: Changes for oxygen driver to fix the Xonar DG card
by Roman Volkov 20 Nov '13

20 Nov '13

This patch does some preparation of existing Oxygen driver. Some constants added to the header files. To perform the SPI reading, there is a new function to wait when the SPI finishes a transaction. Channel routing must be updated when the user selects the audio output, and there are some extra symbols exported from the snd-oxygen-lib module. Signed-off-by: Roman I Volkov <v1ron(a)mail.ru> --- Should not affect other models of Oxygen driver, but who knows. diff -uprN linux-3.12/sound/pci/oxygen/cs4245.h linux-3.12-my/sound/pci/oxygen/cs4245.h --- linux-3.12/sound/pci/oxygen/cs4245.h 2013-11-04 03:41:51.000000000 +0400 +++ linux-3.12-my/sound/pci/oxygen/cs4245.h 2013-11-15 15:46:40.000000000 +0400 @@ -103,5 +103,6 @@ #define CS4245_ADC_UNDRFL 0x01 -#define CS4245_SPI_ADDRESS (0x9e << 16) -#define CS4245_SPI_WRITE (0 << 16) +#define CS4245_SPI_ADDRESS 0x9e +#define CS4245_SPI_WRITE 0 +#define CS4245_SPI_READ 1 diff -uprN linux-3.12/sound/pci/oxygen/oxygen.h linux-3.12-my/sound/pci/oxygen/oxygen.h --- linux-3.12/sound/pci/oxygen/oxygen.h 2013-11-04 03:41:51.000000000 +0400 +++ linux-3.12-my/sound/pci/oxygen/oxygen.h 2013-11-15 15:47:38.000000000 +0400 @@ -198,7 +198,8 @@ void oxygen_write_ac97(struct oxygen *ch void oxygen_write_ac97_masked(struct oxygen *chip, unsigned int codec, unsigned int index, u16 data, u16 mask); -void oxygen_write_spi(struct oxygen *chip, u8 control, unsigned int data); +int oxygen_wait_spi(struct oxygen *chip); +int oxygen_write_spi(struct oxygen *chip, u8 control, unsigned int data); void oxygen_write_i2c(struct oxygen *chip, u8 device, u8 map, u8 data); void oxygen_reset_uart(struct oxygen *chip); diff -uprN linux-3.12/sound/pci/oxygen/oxygen_io.c linux-3.12-my/sound/pci/oxygen/oxygen_io.c --- linux-3.12/sound/pci/oxygen/oxygen_io.c 2013-11-04 03:41:51.000000000 +0400 +++ linux-3.12-my/sound/pci/oxygen/oxygen_io.c 2013-11-19 00:56:12.000000000 +0400 @@ -105,8 +105,8 @@ static int oxygen_ac97_wait(struct oxyge * Reading the status register also clears the bits, so we have to save * the read bits in status. */ - wait_event_timeout(chip->ac97_waitqueue, - ({ status |= oxygen_read8(chip, OXYGEN_AC97_INTERRUPT_STATUS); + wait_event_timeout(chip->ac97_waitqueue, ({ status |= oxygen_read8(chip, + OXYGEN_AC97_INTERRUPT_STATUS); status & mask; }), msecs_to_jiffies(1) + 1); /* @@ -194,23 +194,35 @@ void oxygen_write_ac97_masked(struct oxy } EXPORT_SYMBOL(oxygen_write_ac97_masked); -void oxygen_write_spi(struct oxygen *chip, u8 control, unsigned int data) +int oxygen_wait_spi(struct oxygen *chip) { - unsigned int count; + /* Higher interval to be sure - 100 microseconds */ + unsigned int count = 100; - /* should not need more than 30.72 us (24 * 1.28 us) */ - count = 10; - while ((oxygen_read8(chip, OXYGEN_SPI_CONTROL) & OXYGEN_SPI_BUSY) - && count > 0) { - udelay(4); - --count; + for (;;) { + if ((oxygen_read8(chip, OXYGEN_SPI_CONTROL) & + OXYGEN_SPI_BUSY) == 0) + break; + if (count == 0) { + snd_printk(KERN_ERR "oxygen: spi wait timeout\n"); + return -EIO; + } + udelay(1); + count--; } + return 0; +} +EXPORT_SYMBOL(oxygen_wait_spi); +int oxygen_write_spi(struct oxygen *chip, u8 control, unsigned int data) +{ oxygen_write8(chip, OXYGEN_SPI_DATA1, data); oxygen_write8(chip, OXYGEN_SPI_DATA2, data >> 8); if (control & OXYGEN_SPI_DATA_LENGTH_3) oxygen_write8(chip, OXYGEN_SPI_DATA3, data >> 16); oxygen_write8(chip, OXYGEN_SPI_CONTROL, control); + + return oxygen_wait_spi(chip); } EXPORT_SYMBOL(oxygen_write_spi); diff -uprN linux-3.12/sound/pci/oxygen/oxygen_mixer.c linux-3.12-my/sound/pci/oxygen/oxygen_mixer.c --- linux-3.12/sound/pci/oxygen/oxygen_mixer.c 2013-11-04 03:41:51.000000000 +0400 +++ linux-3.12-my/sound/pci/oxygen/oxygen_mixer.c 2013-11-18 14:03:54.000000000 +0400 @@ -190,6 +190,7 @@ void oxygen_update_dac_routing(struct ox if (chip->model.update_center_lfe_mix) chip->model.update_center_lfe_mix(chip, chip->dac_routing > 2); } +EXPORT_SYMBOL(oxygen_update_dac_routing); static int upmix_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value) { diff -uprN linux-3.12/sound/pci/oxygen/oxygen_regs.h linux-3.12-my/sound/pci/oxygen/oxygen_regs.h --- linux-3.12/sound/pci/oxygen/oxygen_regs.h 2013-11-04 03:41:51.000000000 +0400 +++ linux-3.12-my/sound/pci/oxygen/oxygen_regs.h 2013-11-18 13:58:11.000000000 +0400 @@ -318,6 +318,7 @@ #define OXYGEN_PLAY_MUTE23 0x0002 #define OXYGEN_PLAY_MUTE45 0x0004 #define OXYGEN_PLAY_MUTE67 0x0008 +#define OXYGEN_PLAY_MUTE_MASK 0x000f #define OXYGEN_PLAY_MULTICH_MASK 0x0010 #define OXYGEN_PLAY_MULTICH_I2S_DAC 0x0000 #define OXYGEN_PLAY_MULTICH_AC97 0x0010

2 2

[alsa-devel] (no subject)
by Xiubo Li 20 Nov '13

20 Nov '13

Hello, This patch series is mostly Freescale's SAI SoC Digital Audio Interface driver implementation. And the implementation is only compatible with device tree definition. This patch series is based on linux-next and has been tested on Vybrid VF610 Tower board using device tree. Changed in v2: - Use default settings for the generic dmaengine PCM driver. - Separate receive and transmit setting in most functions, but some couldn't for the HW limitation. - Drop some not reduntant code. - Use devm_snd_soc_register_component() instead of snd_soc_register_component(). - Use devm_snd_soc_register_card() instead of devm_snd_soc_register_card(). - Adjust the code sentences sequence. - Make the namespacing consistent. - Rename CONFIG_SND_SOC_FSL_SGTL5000 to CONFIG_SND_SOC_FSL_SGTL5000_VF610. - Drop some meaningless lines. - Rename the binding document file. Added in v1: - Add SAI SoC Digital Audio Interface driver. - Add Freescale SAI ALSA SoC Digital Audio Interface node for VF610. - Enables SAI ALSA SoC DAI device for Vybrid VF610 TOWER board. - Add device tree bindings for Freescale SAI. - Revise the bugs about the sgt15000 codec. - Add SGT15000 based audio machine driver. - Enable SGT15000 codec based audio driver node for VF610. - Add device tree bindings for Freescale VF610 sound.

8 41

[alsa-devel] [PATCH] ASoC: soc-pcm: fix incorrect channels and sample_bits wiping off
by Nicolin Chen 20 Nov '13

20 Nov '13

This patch wipes off the corresponding channels and sample_bits for codec_dai. Signed-off-by: Nicolin Chen <b42378(a)freescale.com> --- @Mark Brown Sir, I find the previous symmetry patch hasn't been merged into for-next. So are you willing to apply this one or let me refine the previous PATCH and resend that one? sound/soc/soc-pcm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/soc-pcm.c b/sound/soc/soc-pcm.c index e1c5a00..60d9cfb 100644 --- a/sound/soc/soc-pcm.c +++ b/sound/soc/soc-pcm.c @@ -452,8 +452,8 @@ static int soc_pcm_close(struct snd_pcm_substream *substream) if (!codec_dai->active) { codec_dai->rate = 0; - cpu_dai->channels = 0; - cpu_dai->sample_bits = 0; + codec_dai->channels = 0; + codec_dai->sample_bits = 0; } /* Muting the DAC suppresses artifacts caused during digital -- 1.8.4

2 2

[alsa-devel] [PATCH 08/10] ASoC: ux500_pcm: Differentiate between pdata and DT initialisation
by Lee Jones 19 Nov '13

19 Nov '13

If booting with full DT support (i.e. DMA too, the last piece of the puzzle), then we don't need to use the compatible request channel call back and, due to the work we laid down earlier in this patch-set, we can use core function calls to populate the DMA slave_config. We also require slightly different flags to inform the core that we 'are' booting with DT. Cc: alsa-devel(a)alsa-project.org Cc: Mark Brown <broonie(a)kernel.org> Acked-by: Linus Walleij <linus.walleij(a)linaro.org> Signed-off-by: Lee Jones <lee.jones(a)linaro.org> --- sound/soc/ux500/ux500_pcm.c | 28 +++++++++++++++++++++++----- 1 file changed, 23 insertions(+), 5 deletions(-) diff --git a/sound/soc/ux500/ux500_pcm.c b/sound/soc/ux500/ux500_pcm.c index ce554de..acfec98 100644 --- a/sound/soc/ux500/ux500_pcm.c +++ b/sound/soc/ux500/ux500_pcm.c @@ -139,15 +139,33 @@ static const struct snd_dmaengine_pcm_config ux500_dmaengine_pcm_config = { .prepare_slave_config = ux500_pcm_prepare_slave_config, }; +static const struct snd_dmaengine_pcm_config ux500_dmaengine_of_pcm_config = { + .pcm_hardware = &ux500_pcm_hw, + .prealloc_buffer_size = 128 * 1024, + .prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config, +}; + int ux500_pcm_register_platform(struct platform_device *pdev) { + const struct snd_dmaengine_pcm_config *pcm_config; + struct device_node *np = pdev->dev.of_node; + unsigned int pcm_flags; int ret; - ret = snd_dmaengine_pcm_register(&pdev->dev, - &ux500_dmaengine_pcm_config, - SND_DMAENGINE_PCM_FLAG_NO_RESIDUE | - SND_DMAENGINE_PCM_FLAG_COMPAT | - SND_DMAENGINE_PCM_FLAG_NO_DT); + if (np) { + pcm_config = &ux500_dmaengine_of_pcm_config; + + pcm_flags = SND_DMAENGINE_PCM_FLAG_NO_RESIDUE | + SND_DMAENGINE_PCM_FLAG_COMPAT; + } else { + pcm_config = &ux500_dmaengine_pcm_config; + + pcm_flags = SND_DMAENGINE_PCM_FLAG_NO_RESIDUE | + SND_DMAENGINE_PCM_FLAG_NO_DT | + SND_DMAENGINE_PCM_FLAG_COMPAT; + } + + ret = snd_dmaengine_pcm_register(&pdev->dev, pcm_config, pcm_flags); if (ret < 0) { dev_err(&pdev->dev, "%s: ERROR: Failed to register platform '%s' (%d)!\n", -- 1.8.1.2

3 4

[alsa-devel] [PATCH v2 1/2] ASOC: tegra: fix matching of AC97 components
by Lucas Stach 19 Nov '13

19 Nov '13

Matching works completely based on the cpu of_node. Signed-off-by: Lucas Stach <dev(a)lynxeye.de> Acked-by: Stephen Warren <swarren(a)nvidia.com> --- v2: no changes CC: <alsa-devel(a)alsa-project.org> CC: Mark Brown <broonie(a)linaro.org> CC: Stephen Warren <swarren(a)wwwdotorg.org> --- sound/soc/tegra/tegra_wm9712.c | 1 - 1 file changed, 1 deletion(-) diff --git a/sound/soc/tegra/tegra_wm9712.c b/sound/soc/tegra/tegra_wm9712.c index 5e11963..45b5789 100644 --- a/sound/soc/tegra/tegra_wm9712.c +++ b/sound/soc/tegra/tegra_wm9712.c @@ -55,7 +55,6 @@ static int tegra_wm9712_init(struct snd_soc_pcm_runtime *rtd) static struct snd_soc_dai_link tegra_wm9712_dai = { .name = "AC97 HiFi", .stream_name = "AC97 HiFi", - .cpu_dai_name = "tegra20-ac97", .codec_dai_name = "wm9712-hifi", .codec_name = "wm9712-codec", .init = tegra_wm9712_init, -- 1.8.3.1

1 1

[alsa-devel] [PATCH] ASoC: rcar: fixup dma_async_issue_pending() timing
by Kuninori Morimoto 19 Nov '13

19 Nov '13

DMAEngine will stall without this patch Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com> --- sound/soc/sh/rcar/core.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c index 78c35b4..f57e519 100644 --- a/sound/soc/sh/rcar/core.c +++ b/sound/soc/sh/rcar/core.c @@ -200,9 +200,8 @@ static void rsnd_dma_do_work(struct work_struct *work) return; } + dma_async_issue_pending(dma->chan); } - - dma_async_issue_pending(dma->chan); } int rsnd_dma_available(struct rsnd_dma *dma) -- 1.7.9.5

2 1

[alsa-devel] [PATCH] ASoC: wm5110: Add post SYSCLK register patch for rev D chip
by Charles Keepax 19 Nov '13

19 Nov '13

Certain registers require patching after the SYSCLK has been brought up add support for this into the CODEC driver. Signed-off-by: Charles Keepax <ckeepax(a)opensource.wolfsonmicro.com> --- sound/soc/codecs/wm5110.c | 43 ++++++++++++++++++++++++++++++++++++++++++- 1 files changed, 42 insertions(+), 1 deletions(-) diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index f2d1094..c3c7396 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -37,6 +37,47 @@ struct wm5110_priv { struct arizona_fll fll[2]; }; +static const struct reg_default wm5110_sysclk_revd_patch[] = { + { 0x3093, 0x1001 }, + { 0x30E3, 0x1301 }, + { 0x3133, 0x1201 }, + { 0x3183, 0x1501 }, + { 0x31D3, 0x1401 }, +}; + +static int wm5110_sysclk_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = w->codec; + struct arizona *arizona = dev_get_drvdata(codec->dev->parent); + struct regmap *regmap = codec->control_data; + const struct reg_default *patch = NULL; + int i, patch_size; + + switch (arizona->rev) { + case 3: + patch = wm5110_sysclk_revd_patch; + patch_size = ARRAY_SIZE(wm5110_sysclk_revd_patch); + break; + default: + return 0; + } + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + if (patch) + for (i = 0; i < patch_size; i++) + regmap_write(regmap, patch[i].reg, + patch[i].def); + break; + + default: + break; + } + + return 0; +} + static DECLARE_TLV_DB_SCALE(ana_tlv, 0, 100, 0); static DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); static DECLARE_TLV_DB_SCALE(digital_tlv, -6400, 50, 0); @@ -400,7 +441,7 @@ static const struct snd_kcontrol_new wm5110_aec_loopback_mux = static const struct snd_soc_dapm_widget wm5110_dapm_widgets[] = { SND_SOC_DAPM_SUPPLY("SYSCLK", ARIZONA_SYSTEM_CLOCK_1, ARIZONA_SYSCLK_ENA_SHIFT, - 0, NULL, 0), + 0, wm5110_sysclk_ev, SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_SUPPLY("ASYNCCLK", ARIZONA_ASYNC_CLOCK_1, ARIZONA_ASYNC_CLK_ENA_SHIFT, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("OPCLK", ARIZONA_OUTPUT_SYSTEM_CLOCK, -- 1.7.2.5

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[alsa-devel] [PATCH 09/10] ASoC: ux500_pcm: Take out pointless dev_dbg() call
by Lee Jones 19 Nov '13

19 Nov '13

Cc: alsa-devel(a)alsa-project.org Cc: Mark Brown <broonie(a)kernel.org> Acked-by: Linus Walleij <linus.walleij(a)linaro.org> Signed-off-by: Lee Jones <lee.jones(a)linaro.org> --- sound/soc/ux500/ux500_pcm.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/sound/soc/ux500/ux500_pcm.c b/sound/soc/ux500/ux500_pcm.c index acfec98..fd7f12e 100644 --- a/sound/soc/ux500/ux500_pcm.c +++ b/sound/soc/ux500/ux500_pcm.c @@ -65,14 +65,10 @@ static struct dma_chan *ux500_pcm_request_chan(struct snd_soc_pcm_runtime *rtd, struct snd_pcm_substream *substream) { struct snd_soc_dai *dai = rtd->cpu_dai; - struct device *dev = dai->dev; u16 per_data_width, mem_data_width; struct stedma40_chan_cfg *dma_cfg; struct ux500_msp_dma_params *dma_params; - dev_dbg(dev, "%s: MSP %d (%s): Enter.\n", __func__, dai->id, - snd_pcm_stream_str(substream)); - dma_params = snd_soc_dai_get_dma_data(dai, substream); dma_cfg = dma_params->dma_cfg; -- 1.8.1.2

2 1

[alsa-devel] [PATCH 06/10] ASoC: ux500_pcm: Extend Device Tree support to deal with DMA data
by Lee Jones 19 Nov '13

19 Nov '13

Soon we will strip out pdata support from the Ux500 set of ASoC drivers. When this happens it will have to supply a DMA slave_config to the dmaengine. At the moment a great deal of this comes from pdata via AUXDATA. We need to become independent of this soon. This patch starts the process by allocating memory for the associated data structures and fetches the MSP id used for const struct indexing. Cc: alsa-devel(a)alsa-project.org Cc: Mark Brown <broonie(a)kernel.org> Acked-by: Linus Walleij <linus.walleij(a)linaro.org> Signed-off-by: Lee Jones <lee.jones(a)linaro.org> --- sound/soc/ux500/ux500_msp_i2s.c | 56 ++++++++++++++++++++++++++++++----------- 1 file changed, 41 insertions(+), 15 deletions(-) diff --git a/sound/soc/ux500/ux500_msp_i2s.c b/sound/soc/ux500/ux500_msp_i2s.c index 1ca8b08..7f2a4ac 100644 --- a/sound/soc/ux500/ux500_msp_i2s.c +++ b/sound/soc/ux500/ux500_msp_i2s.c @@ -646,6 +646,34 @@ int ux500_msp_i2s_close(struct ux500_msp *msp, unsigned int dir) } +int ux500_msp_i2s_of_init_msp(struct platform_device *pdev, + struct ux500_msp *msp, + struct msp_i2s_platform_data **platform_data) +{ + struct msp_i2s_platform_data *pdata; + + *platform_data = devm_kzalloc(&pdev->dev, + sizeof(struct msp_i2s_platform_data), + GFP_KERNEL); + pdata = *platform_data; + if (!pdata) + return -ENOMEM; + + msp->playback_dma_data.dma_cfg = devm_kzalloc(&pdev->dev, + sizeof(struct stedma40_chan_cfg), + GFP_KERNEL); + if (!msp->playback_dma_data.dma_cfg) + return -ENOMEM; + + msp->capture_dma_data.dma_cfg = devm_kzalloc(&pdev->dev, + sizeof(struct stedma40_chan_cfg), + GFP_KERNEL); + if (!msp->capture_dma_data.dma_cfg) + return -ENOMEM; + + return 0; +} + int ux500_msp_i2s_init_msp(struct platform_device *pdev, struct ux500_msp **msp_p, struct msp_i2s_platform_data *platform_data) @@ -653,30 +681,28 @@ int ux500_msp_i2s_init_msp(struct platform_device *pdev, struct resource *res = NULL; struct device_node *np = pdev->dev.of_node; struct ux500_msp *msp; + int ret; *msp_p = devm_kzalloc(&pdev->dev, sizeof(struct ux500_msp), GFP_KERNEL); msp = *msp_p; if (!msp) return -ENOMEM; - if (np) { - if (!platform_data) { - platform_data = devm_kzalloc(&pdev->dev, - sizeof(struct msp_i2s_platform_data), GFP_KERNEL); - if (!platform_data) - return -ENOMEM; - } - } else - if (!platform_data) + if (!platform_data) { + if (np) { + ret = ux500_msp_i2s_of_init_msp(pdev, msp, + &platform_data); + if (ret) + return ret; + } else return -EINVAL; + } else { + msp->playback_dma_data.dma_cfg = platform_data->msp_i2s_dma_tx; + msp->capture_dma_data.dma_cfg = platform_data->msp_i2s_dma_rx; + msp->id = platform_data->id; + } - dev_dbg(&pdev->dev, "%s: Enter (name: %s, id: %d).\n", __func__, - pdev->name, platform_data->id); - - msp->id = platform_data->id; msp->dev = &pdev->dev; - msp->playback_dma_data.dma_cfg = platform_data->msp_i2s_dma_tx; - msp->capture_dma_data.dma_cfg = platform_data->msp_i2s_dma_rx; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (res == NULL) { -- 1.8.1.2

2 1

[alsa-devel] [PATCH 05/10] ASoC: Ux500: Match platform by device node when booting Device Tree
by Lee Jones 19 Nov '13

19 Nov '13

We're getting closer to fully enabling the Ux500 ASoC driver for Device Tree. When we switch over from using AUXDATA we'll need to match platform by only Device Tree nodes. In this patch we NULL out the platform_name, and supply nodes for each platform device. Cc: alsa-devel(a)alsa-project.org Cc: Mark Brown <broonie(a)kernel.org> Acked-by: Linus Walleij <linus.walleij(a)linaro.org> Signed-off-by: Lee Jones <lee.jones(a)linaro.org> --- sound/soc/ux500/mop500.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sound/soc/ux500/mop500.c b/sound/soc/ux500/mop500.c index 178d1ba..b3b66aa 100644 --- a/sound/soc/ux500/mop500.c +++ b/sound/soc/ux500/mop500.c @@ -91,6 +91,8 @@ static int mop500_of_probe(struct platform_device *pdev, for (i = 0; i < 2; i++) { mop500_dai_links[i].cpu_of_node = msp_np[i]; mop500_dai_links[i].cpu_dai_name = NULL; + mop500_dai_links[i].platform_of_node = msp_np[i]; + mop500_dai_links[i].platform_name = NULL; mop500_dai_links[i].codec_of_node = codec_np; mop500_dai_links[i].codec_name = NULL; } -- 1.8.1.2

2 1

[alsa-devel] [PATCH 1/2] ASoC: ab8500: Revert "ASoC: ab8500: Explicitly set I/O up"
by Lee Jones 19 Nov '13

19 Nov '13

This reverts commit 2245e3c31c15c2d2a26926c4b734f4d3a37ae252, as it is one of two patches which stop audio from working on Snowball. Cc: alsa-devel(a)alsa-project.org Cc: Mark Brown <broonie(a)kernel.org> Signed-off-by: Lee Jones <lee.jones(a)linaro.org> --- sound/soc/codecs/ab8500-codec.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/sound/soc/codecs/ab8500-codec.c b/sound/soc/codecs/ab8500-codec.c index a0394a8..ca500fd 100644 --- a/sound/soc/codecs/ab8500-codec.c +++ b/sound/soc/codecs/ab8500-codec.c @@ -2473,8 +2473,6 @@ static int ab8500_codec_probe(struct snd_soc_codec *codec) dev_dbg(dev, "%s: Enter.\n", __func__); - snd_soc_codec_set_cache_io(codec, 0, 0, SND_SOC_REGMAP); - /* Setup AB8500 according to board-settings */ pdata = dev_get_platdata(dev->parent); -- 1.8.1.2

2 2

[alsa-devel] [Report] ALSO: hda - CA0132: Bugs and missing features
by Andreas Reis 19 Nov '13

19 Nov '13

Posting here by Takashi's advice after my alsa-user post remained unanswered. There are a number of grave issues with the CA0132 codec on my Gigabyte G1.Sniper M5 (rev. 1.0) (Intel Z87, Recon3Di onboard, latest bios F8c). I've tried kernels (x64) from 3.9 to 3.13-preRC1 (as currently in Torvald's git), both with pulse on Ubuntu 13.10 and without on Arch Linux. First a description, then the issues; contacting Creative's support only led to one of those "we don't do Linux" replies. This motherboard has 2/5.1 channel support with a total of eight jacks (the last two below are stated as duplicated for a front panel, with only one of each pair to be used at a time): * Line/Mic In * Line/Front Speaker Out * Optical S/PDIF Out * Center/Subwoofer Speaker Out * Rear Speaker Out * Headphone/Speaker Out On Windows everything works (optical not tested), although the In jack must be set to "Mic" to work, not to "Line" (no corresponding setting exists in alsamixer). The manual recommends using the headphone jacks for stereo (as it "supports amplifying function"), but from the moment of pressing the power button both also output very audible static noise along with the actual sound, so I only use the Line Out. Now, the actual issues on Linux: * No way to change to 5.1, at least not with alsamixer (the "Surround" switch there refers to some stereo effect). C/S and Rear Out jacks are just dead. * The front panel Headphone/Speaker Out works, but the rear panel one only provides the static. * Often after restarting from a system crash, the sound will not work until I change the Master volume and restart all programs which tried to play something. * One needs these lines in /etc/asound.conf to fix the sound card ordering, as card 0 only has three S/PDIF outs (presumably the HDMI/DP outs of the Intel chipset): defaults.pcm { card 1 device 0 } defaults.ctl { card 1 device 0 } And what irks the most: * No microphone input whatsoever, on neither jack. The only noise on Linux is a faint click on disabling either "AMic1/DMic" or "AMic1/DMic Auto Detect", and the attached garbage when Mic1-Boost is enabled along with the latter two (regardless of weather the mic is actually plugged in). Passing model=generic to snd-hda-intel, as suggested by Takashi in an email, had no effect. Some observations: * alsamixer seems to always show "Analog-Mic2" or "What U Hear" (sometimes both) enabled after boot, even if they had been manually disabled previously. * As written above, there is no way to cycle between the three input settings (rear panel line-in, rear panel mic, front panel mic) as on Windows. * One can switch on both "Analog-Mic2" and "AMic1/DMic"/"AMic1/DMic Auto Detect" at the same time, although they should probably be mutually exclusive. * It only works on Windows 8.1 if I hard boot into it. If I reboot from Linux it will fail as well: The Mic is still detected (ie, not reported as unplugged), but instead of actually recording, it take any output as its input, while corrupting it into a what sounds to me like a soft, fading feedback loop. Unfortunately I have been unable to record this. Cycling the settings there doesn't help, only shutting down and removing the power for a brief while does. Attachments: * alsa-info (split due to size): part1: http://pastie.org/pastes/8492817/text?key=p2wnvkcvn0h7o3t2pdgg part2: http://pastie.org/pastes/8492822/text?key=yjurqav8tzrpvbfar4o87a * lspci -vvnn: http://pastie.org/pastes/8492798/text * alsamixer, capture: http://i.imgur.com/ByA20f0.png * alsamixer, playback: http://i.imgur.com/7dkvo66.png * recorded garbage (arecord -f S16_LE -r 44100 -d 10 hw:1,0 test-mic.wav): http://www.mediafire.com/?yy1fno6vw9dbdo8

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[alsa-devel] [PATCH 0/4] *** SUBJECT HERE ***
by Charles Keepax 19 Nov '13

19 Nov '13

Hi, Small patch series adding some missing functionality on the WM5110. Given most of the changes are in ASoC I have generated the patches against Mark's tree but let me know if we want to push them through MFD instead and I can regenerate, but I suspect they will cause less conflicts going through ASoC. Thanks, Charles Charles Keepax (3): mfd: wm5110: Make DSP memories readable ASoC: wm5110: Add basic support for ISRCs ASoC: wm5110: Expose input high pass filter controls Mark Brown (1): ASoC: wm5110: Hook up ADSP2 cores drivers/mfd/wm5110-tables.c | 73 +++++++- include/linux/mfd/arizona/registers.h | 37 ++++ sound/soc/codecs/Kconfig | 2 + sound/soc/codecs/arizona.c | 10 + sound/soc/codecs/arizona.h | 1 + sound/soc/codecs/wm5110.c | 316 ++++++++++++++++++++++++++++++++- 6 files changed, 433 insertions(+), 6 deletions(-) -- 1.7.2.5

1 4

[alsa-devel] [PATCH] ALSA: hda - Enable mute/mic-mute LEDs for more Thinkpads with Realtek codec
by David Henningsson 19 Nov '13

19 Nov '13

We're using the ACPI interface to detect whether we're dealing with a Thinkpad or not. This way we're not loading the thinkpad_acpi module when we're not on a Thinkpad, but at the same time, we give the opportunity to check for, and potentially enable, both present and future Thinkpad with mute/micmute LEDs. At least those running the ALC269 family (269 to 299) of Realtek codecs. Cc: Alex Hung <alex.hung(a)canonical.com> Tested-by: Hui Wang <hui.wang(a)canonical.com> Signed-off-by: David Henningsson <david.henningsson(a)canonical.com> --- sound/pci/hda/patch_realtek.c | 29 ++++++++++++++++++++++++++--- 1 file changed, 26 insertions(+), 3 deletions(-) Hi Takashi, Sorry I'm late with this one. I'm hoping that you can still merge it for 3.13, but if you can't, we'll just backport it into the Ubuntu 3.13 kernel instead, so not the end of the world I guess. diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index 04d1e6b..05987ff 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -3652,9 +3652,29 @@ static void alc290_fixup_mono_speakers(struct hda_codec *codec, #if IS_ENABLED(CONFIG_THINKPAD_ACPI) #include <linux/thinkpad_acpi.h> +#include <acpi/acpi.h> static int (*led_set_func)(int, bool); +static acpi_status acpi_check_cb(acpi_handle handle, u32 lvl, void *context, + void **rv) +{ + bool *found = context; + *found = true; + return AE_OK; +} + +static bool is_thinkpad(struct hda_codec *codec) +{ + bool found = false; + if (codec->subsystem_id >> 16 != 0x17aa) + return false; + if (ACPI_SUCCESS(acpi_get_devices("LEN0068", acpi_check_cb, &found, NULL)) && found) + return true; + found = false; + return ACPI_SUCCESS(acpi_get_devices("IBM0068", acpi_check_cb, &found, NULL)) && found; +} + static void update_tpacpi_mute_led(void *private_data, int enabled) { if (led_set_func) @@ -3680,6 +3700,8 @@ static void alc_fixup_thinkpad_acpi(struct hda_codec *codec, bool removefunc = false; if (action == HDA_FIXUP_ACT_PROBE) { + if (!is_thinkpad(codec)) + return; if (!led_set_func) led_set_func = symbol_request(tpacpi_led_set); if (!led_set_func) { @@ -4027,6 +4049,8 @@ static const struct hda_fixup alc269_fixups[] = { [ALC269_FIXUP_LIMIT_INT_MIC_BOOST] = { .type = HDA_FIXUP_FUNC, .v.func = alc269_fixup_limit_int_mic_boost, + .chained = true, + .chain_id = ALC269_FIXUP_THINKPAD_ACPI, }, [ALC269_FIXUP_LIMIT_INT_MIC_BOOST_MUTE_LED] = { .type = HDA_FIXUP_FUNC, @@ -4070,8 +4094,6 @@ static const struct hda_fixup alc269_fixups[] = { [ALC269_FIXUP_THINKPAD_ACPI] = { .type = HDA_FIXUP_FUNC, .v.func = alc_fixup_thinkpad_acpi, - .chained = true, - .chain_id = ALC269_FIXUP_LIMIT_INT_MIC_BOOST }, [ALC255_FIXUP_DELL1_MIC_NO_PRESENCE] = { .type = HDA_FIXUP_PINS, @@ -4173,7 +4195,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { SND_PCI_QUIRK(0x17aa, 0x2208, "Thinkpad T431s", ALC269_FIXUP_LENOVO_DOCK), SND_PCI_QUIRK(0x17aa, 0x220c, "Thinkpad", ALC269_FIXUP_LIMIT_INT_MIC_BOOST), SND_PCI_QUIRK(0x17aa, 0x2212, "Thinkpad", ALC269_FIXUP_LIMIT_INT_MIC_BOOST), - SND_PCI_QUIRK(0x17aa, 0x2214, "Thinkpad", ALC269_FIXUP_THINKPAD_ACPI), + SND_PCI_QUIRK(0x17aa, 0x2214, "Thinkpad", ALC269_FIXUP_LIMIT_INT_MIC_BOOST), SND_PCI_QUIRK(0x17aa, 0x2215, "Thinkpad", ALC269_FIXUP_LIMIT_INT_MIC_BOOST), SND_PCI_QUIRK(0x17aa, 0x5013, "Thinkpad", ALC269_FIXUP_LIMIT_INT_MIC_BOOST), SND_PCI_QUIRK(0x17aa, 0x501a, "Thinkpad", ALC283_FIXUP_INT_MIC), @@ -4181,6 +4203,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { SND_PCI_QUIRK(0x17aa, 0x5109, "Thinkpad", ALC269_FIXUP_LIMIT_INT_MIC_BOOST), SND_PCI_QUIRK(0x17aa, 0x3bf8, "Quanta FL1", ALC269_FIXUP_PCM_44K), SND_PCI_QUIRK(0x17aa, 0x9e54, "LENOVO NB", ALC269_FIXUP_LENOVO_EAPD), + SND_PCI_QUIRK_VENDOR(0x17aa, "Thinkpad", ALC269_FIXUP_THINKPAD_ACPI), SND_PCI_QUIRK(0x1b7d, 0xa831, "Ordissimo EVE2 ", ALC269VB_FIXUP_ORDISSIMO_EVE2), /* Also known as Malata PC-B1303 */ #if 0 -- 1.7.9.5

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[alsa-devel] [RFC PATCH] hda_intel: ratelimit "spurious response" message
by Joe Perches 19 Nov '13

19 Nov '13

dmesg here has a 100+ consecutive lines of: [ 1464.219446] hda-intel 0000:00:14.2: spurious response 0x0:0x0, last cmd=0x170500 [ 1464.219451] hda-intel 0000:00:14.2: spurious response 0x0:0x0, last cmd=0x170500 [ 1464.219454] hda-intel 0000:00:14.2: spurious response 0x0:0x0, last cmd=0x170500 ... Ratelimit the message to reduce the dmesg log noise. Coalesce the format while at it. Signed-off-by: Joe Perches <joe(a)perches.com> --- sound/pci/hda/hda_intel.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index 6e61a01..6e444ca 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c @@ -906,12 +906,12 @@ static void azx_update_rirb(struct azx *chip) chip->rirb.res[addr] = res; smp_wmb(); chip->rirb.cmds[addr]--; - } else - snd_printk(KERN_ERR SFX "%s: spurious response %#x:%#x, " - "last cmd=%#08x\n", + } else if (printk_ratelimit()) { + snd_printk(KERN_ERR SFX "%s: spurious response %#x:%#x, last cmd=%#08x\n", pci_name(chip->pci), res, res_ex, chip->last_cmd[addr]); + } } }

2 10

[alsa-devel] [PATCH 1/1] firewire-lib: include sound/asound.h to refer to snd_pcm_format_t
by Takashi Sakamoto 19 Nov '13

19 Nov '13

From: Takashi Sakamoto <o-takashi(a)sakamocchi.jp> 'snd_pcm_format_t' is used by amdtp_out_stream_set_pcm_format(). Currently, when just including amdtp.h, compiler cannot find this type because this type is defined in uapi/sound/asound.h and this header is not included by amdtp.h. Signed-off-by: Takashi Sakamoto <o-takashi(a)sakamocchi.jp> --- sound/firewire/amdtp.h | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/firewire/amdtp.h b/sound/firewire/amdtp.h index 839ebf8..2746ecd 100644 --- a/sound/firewire/amdtp.h +++ b/sound/firewire/amdtp.h @@ -4,6 +4,7 @@ #include <linux/err.h> #include <linux/interrupt.h> #include <linux/mutex.h> +#include <sound/asound.h> #include "packets-buffer.h" /** -- 1.8.3.2

2 1

[alsa-devel] [PATCH 2/3] ASOC: tegra: fix matching of AC97 components
by Lucas Stach 19 Nov '13

19 Nov '13

Matching works completely based on the cpu of_node. Signed-off-by: Lucas Stach <dev(a)lynxeye.de> --- CC: <alsa-devel(a)alsa-project.org> CC: Mark Brown <broonie(a)linaro.org> CC: Stephen Warren <swarren(a)wwwdotorg.org> --- sound/soc/tegra/tegra_wm9712.c | 1 - 1 file changed, 1 deletion(-) diff --git a/sound/soc/tegra/tegra_wm9712.c b/sound/soc/tegra/tegra_wm9712.c index 5e11963..45b5789 100644 --- a/sound/soc/tegra/tegra_wm9712.c +++ b/sound/soc/tegra/tegra_wm9712.c @@ -55,7 +55,6 @@ static int tegra_wm9712_init(struct snd_soc_pcm_runtime *rtd) static struct snd_soc_dai_link tegra_wm9712_dai = { .name = "AC97 HiFi", .stream_name = "AC97 HiFi", - .cpu_dai_name = "tegra20-ac97", .codec_dai_name = "wm9712-hifi", .codec_name = "wm9712-codec", .init = tegra_wm9712_init, -- 1.8.3.1

2 1

[alsa-devel] [PATCHv7] dmaengine: Add support for BCM2835
by Florian Meier 18 Nov '13

18 Nov '13

Add support for DMA controller of BCM2835 as used in the Raspberry Pi. Currently it only supports cyclic DMA. Signed-off-by: Florian Meier <florian.meier(a)koalo.de> --- This version includes some more style improvements suggested in the previous thread. .../devicetree/bindings/dma/bcm2835-dma.txt | 56 ++ drivers/dma/Kconfig | 6 + drivers/dma/Makefile | 1 + drivers/dma/bcm2835-dma.c | 736 ++++++++++++++++++++ 4 files changed, 799 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/bcm2835-dma.txt create mode 100644 drivers/dma/bcm2835-dma.c diff --git a/Documentation/devicetree/bindings/dma/bcm2835-dma.txt b/Documentation/devicetree/bindings/dma/bcm2835-dma.txt new file mode 100644 index 0000000..7d91019 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/bcm2835-dma.txt @@ -0,0 +1,56 @@ +* BCM2835 DMA controller + +Required properties: +- compatible: Should be "brcm,bcm2835-dma". +- reg: Should contain DMA registers location and length. +- interrupts: Should contain the DMA interrupts associated + to the DMA channels in ascending order. + First cell is the IRQ bank. + Second cell is the IRQ number. +- #dma-cells: Must be <1>, used to represent the number of integer cells in + the dmas property of client devices. +- brcm,dma-channel-mask: Bit mask representing the channels + not used by the firmware. + +Example: + +dma: dma@7e007000 { + compatible = "brcm,bcm2835-dma"; + reg = <0x7e007000 0xf00>; + interrupts = <1 16 + 1 17 + 1 18 + 1 19 + 1 20 + 1 21 + 1 22 + 1 23 + 1 24 + 1 25 + 1 26 + 1 27 + 1 28>; + + #dma-cells = <1>; + brcm,dma-channel-mask = <0x7f35>; +}; + +DMA clients connected to the BCM2835 DMA controller must use the format +described in the dma.txt file, using a two-cell specifier for each channel: +a phandle plus one integer cells. +The two cells in order are: + +1. A phandle pointing to the DMA controller. +2. The DREQ number. + +Example: + +bcm2835_i2s: i2s@7e203000 { + compatible = "brcm,bcm2835-i2s"; + reg = < 0x7e203000 0x20 + 0x7e101098 0x02>; + + dmas = <&dma 2 + &dma 3>; + dma-names = "tx", "rx"; +}; diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig index c61a6ec..880e723 100644 --- a/drivers/dma/Kconfig +++ b/drivers/dma/Kconfig @@ -300,6 +300,12 @@ config DMA_OMAP select DMA_ENGINE select DMA_VIRTUAL_CHANNELS +config DMA_BCM2835 + tristate "BCM2835 DMA engine support" + depends on (ARCH_BCM2835 || MACH_BCM2708) + select DMA_ENGINE + select DMA_VIRTUAL_CHANNELS + config TI_CPPI41 tristate "AM33xx CPPI41 DMA support" depends on ARCH_OMAP diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile index 0ce2da9..0a6f08e 100644 --- a/drivers/dma/Makefile +++ b/drivers/dma/Makefile @@ -38,6 +38,7 @@ obj-$(CONFIG_EP93XX_DMA) += ep93xx_dma.o obj-$(CONFIG_DMA_SA11X0) += sa11x0-dma.o obj-$(CONFIG_MMP_TDMA) += mmp_tdma.o obj-$(CONFIG_DMA_OMAP) += omap-dma.o +obj-$(CONFIG_DMA_BCM2835) += bcm2835-dma.o obj-$(CONFIG_MMP_PDMA) += mmp_pdma.o obj-$(CONFIG_DMA_JZ4740) += dma-jz4740.o obj-$(CONFIG_TI_CPPI41) += cppi41.o diff --git a/drivers/dma/bcm2835-dma.c b/drivers/dma/bcm2835-dma.c new file mode 100644 index 0000000..4b4c673 --- /dev/null +++ b/drivers/dma/bcm2835-dma.c @@ -0,0 +1,736 @@ +/* + * BCM2835 DMA engine support + * + * This driver only supports cyclic DMA transfers + * as needed for the I2S module. + * + * Author: Florian Meier <florian.meier(a)koalo.de> + * Copyright 2013 + * + * Based on + * OMAP DMAengine support by Russell King + * + * BCM2708 DMA Driver + * Copyright (C) 2010 Broadcom + * + * Raspberry Pi PCM I2S ALSA Driver + * Copyright (c) by Phil Poole 2013 + * + * MARVELL MMP Peripheral DMA Driver + * Copyright 2012 Marvell International Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#include <linux/dmaengine.h> +#include <linux/dma-mapping.h> +#include <linux/err.h> +#include <linux/init.h> +#include <linux/interrupt.h> +#include <linux/list.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/slab.h> +#include <linux/io.h> +#include <linux/spinlock.h> +#include <linux/of.h> +#include <linux/of_dma.h> + +#include "virt-dma.h" + +struct bcm2835_dmadev { + struct dma_device ddev; + spinlock_t lock; + void __iomem *base; + struct device_dma_parameters dma_parms; +}; + +struct bcm2835_dma_cb { + uint32_t info; + uint32_t src; + uint32_t dst; + uint32_t length; + uint32_t stride; + uint32_t next; + uint32_t pad[2]; +}; + +struct bcm2835_chan { + struct virt_dma_chan vc; + struct list_head node; + + struct dma_slave_config cfg; + bool cyclic; + unsigned dreq; + + int ch; + struct bcm2835_desc *desc; + + void __iomem *chan_base; + int irq_number; +}; + +struct bcm2835_desc { + struct virt_dma_desc vd; + enum dma_transfer_direction dir; + + unsigned int control_block_size; + struct bcm2835_dma_cb *control_block_base; + dma_addr_t control_block_base_phys; + + unsigned frames; + size_t size; +}; + +#define BCM2835_DMA_CS 0x00 +#define BCM2835_DMA_ADDR 0x04 +#define BCM2835_DMA_SOURCE_AD 0x0c +#define BCM2835_DMA_DEST_AD 0x10 +#define BCM2835_DMA_NEXTCB 0x1C + +/* DMA CS Control and Status bits */ +#define BCM2835_DMA_ACTIVE BIT(0) +#define BCM2835_DMA_INT BIT(2) +#define BCM2835_DMA_ISPAUSED BIT(4) /* Pause requested or not active */ +#define BCM2835_DMA_ISHELD BIT(5) /* Is held by DREQ flow control */ +#define BCM2835_DMA_ERR BIT(8) +#define BCM2835_DMA_ABORT BIT(30) /* Stop current CB, go to next, WO */ +#define BCM2835_DMA_RESET BIT(31) /* WO, self clearing */ + +#define BCM2835_DMA_INT_EN BIT(0) +#define BCM2835_DMA_D_INC BIT(4) +#define BCM2835_DMA_D_DREQ BIT(6) +#define BCM2835_DMA_S_INC BIT(8) +#define BCM2835_DMA_S_DREQ BIT(10) + +#define BCM2835_DMA_PER_MAP(x) ((x) << 16) + +#define BCM2835_DMA_DATA_TYPE_S8 1 +#define BCM2835_DMA_DATA_TYPE_S16 2 +#define BCM2835_DMA_DATA_TYPE_S32 4 +#define BCM2835_DMA_DATA_TYPE_S128 16 + +/* Valid only for channels 0 - 14, 15 has its own base address */ +#define BCM2835_DMA_CHAN(n) ((n) << 8) /* Base address */ +#define BCM2835_DMA_CHANIO(base, n) ((base) + BCM2835_DMA_CHAN(n)) + +static inline struct bcm2835_dmadev *to_bcm2835_dma_dev(struct dma_device *d) +{ + return container_of(d, struct bcm2835_dmadev, ddev); +} + +static inline struct bcm2835_chan *to_bcm2835_dma_chan(struct dma_chan *c) +{ + return container_of(c, struct bcm2835_chan, vc.chan); +} + +static inline struct bcm2835_desc *to_bcm2835_dma_desc( + struct dma_async_tx_descriptor *t) +{ + return container_of(t, struct bcm2835_desc, vd.tx); +} + +static void bcm2835_dma_desc_free(struct virt_dma_desc *vd) +{ + struct bcm2835_desc *desc = container_of(vd, struct bcm2835_desc, vd); + dma_free_coherent(desc->vd.tx.chan->device->dev, + desc->control_block_size, + desc->control_block_base, + desc->control_block_base_phys); + kfree(desc); +} + +static int bcm2835_dma_abort(void __iomem *chan_base) +{ + unsigned long int cs; + long int timeout = 10000; + + cs = readl(chan_base + BCM2835_DMA_CS); + if (!(cs & BCM2835_DMA_ACTIVE)) + return 0; + + /* Write 0 to the active bit - Pause the DMA */ + writel(0, chan_base + BCM2835_DMA_CS); + + /* Wait for any current AXI transfer to complete */ + while ((cs & BCM2835_DMA_ISPAUSED) && --timeout >= 0) + cs = readl(chan_base + BCM2835_DMA_CS); + + /* We'll un-pause when we set of our next DMA */ + if (cs & BCM2835_DMA_ISPAUSED) + return -ETIMEDOUT; + + if (!(cs & BCM2835_DMA_ACTIVE)) + return 0; + + /* Terminate the control block chain */ + writel(0, chan_base + BCM2835_DMA_NEXTCB); + + /* Abort the whole DMA */ + writel(BCM2835_DMA_ABORT | BCM2835_DMA_ACTIVE, + chan_base + BCM2835_DMA_CS); + + return 0; +} + +static void bcm2835_dma_start_desc(struct bcm2835_chan *c) +{ + struct virt_dma_desc *vd = vchan_next_desc(&c->vc); + struct bcm2835_desc *d; + + if (!vd) { + c->desc = NULL; + return; + } + + list_del(&vd->node); + + c->desc = d = to_bcm2835_dma_desc(&vd->tx); + + dsb(); /* ARM data synchronization (push) operation */ + + writel(d->control_block_base_phys, c->chan_base + BCM2835_DMA_ADDR); + writel(BCM2835_DMA_ACTIVE, c->chan_base + BCM2835_DMA_CS); +} + +static irqreturn_t bcm2835_dma_callback(int irq, void *data) +{ + struct bcm2835_chan *c = data; + struct bcm2835_desc *d; + unsigned long flags; + + spin_lock_irqsave(&c->vc.lock, flags); + + /* Acknowledge interrupt */ + writel(BCM2835_DMA_INT, c->chan_base + BCM2835_DMA_CS); + + d = c->desc; + + if (d) { + /* TODO Only works for cyclic DMA */ + vchan_cyclic_callback(&d->vd); + } + + /* Keep the DMA engine running */ + dsb(); /* ARM synchronization barrier */ + writel(BCM2835_DMA_ACTIVE, c->chan_base + BCM2835_DMA_CS); + + spin_unlock_irqrestore(&c->vc.lock, flags); + + return IRQ_HANDLED; +} + +static int bcm2835_dma_alloc_chan_resources(struct dma_chan *chan) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + + dev_dbg(c->vc.chan.device->dev, + "Allocating DMA channel %i\n", c->ch); + + return request_irq(c->irq_number, + bcm2835_dma_callback, 0, "DMA IRQ", c); +} + +static void bcm2835_dma_free_chan_resources(struct dma_chan *chan) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + + vchan_free_chan_resources(&c->vc); + free_irq(c->irq_number, c); + + dev_dbg(c->vc.chan.device->dev, "Freeing DMA channel %u\n", c->ch); +} + +static size_t bcm2835_dma_desc_size(struct bcm2835_desc *d) +{ + return d->size; +} + +static size_t bcm2835_dma_desc_size_pos(struct bcm2835_desc *d, dma_addr_t addr) +{ + unsigned i; + size_t size; + + for (size = i = 0; i < d->frames; i++) { + struct bcm2835_dma_cb *control_block = + &d->control_block_base[i]; + size_t this_size = control_block->length; + dma_addr_t dma; + + if (d->dir == DMA_DEV_TO_MEM) + dma = control_block->dst; + else + dma = control_block->src; + + if (size) + size += this_size; + else if (addr >= dma && addr < dma + this_size) + size += dma + this_size - addr; + } + + return size; +} + +static enum dma_status bcm2835_dma_tx_status(struct dma_chan *chan, + dma_cookie_t cookie, struct dma_tx_state *txstate) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + struct virt_dma_desc *vd; + enum dma_status ret; + unsigned long flags; + + ret = dma_cookie_status(chan, cookie, txstate); + if (ret == DMA_SUCCESS || !txstate) + return ret; + + spin_lock_irqsave(&c->vc.lock, flags); + vd = vchan_find_desc(&c->vc, cookie); + if (vd) { + txstate->residue = + bcm2835_dma_desc_size(to_bcm2835_dma_desc(&vd->tx)); + } else if (c->desc && c->desc->vd.tx.cookie == cookie) { + struct bcm2835_desc *d = c->desc; + dma_addr_t pos; + + if (d->dir == DMA_MEM_TO_DEV) + pos = readl(c->chan_base + BCM2835_DMA_SOURCE_AD); + else if (d->dir == DMA_DEV_TO_MEM) + pos = readl(c->chan_base + BCM2835_DMA_DEST_AD); + else + pos = 0; + + txstate->residue = bcm2835_dma_desc_size_pos(d, pos); + } else { + txstate->residue = 0; + } + + spin_unlock_irqrestore(&c->vc.lock, flags); + + return ret; +} + +static void bcm2835_dma_issue_pending(struct dma_chan *chan) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + unsigned long flags; + + c->cyclic = true; /* Nothing else is implemented */ + + spin_lock_irqsave(&c->vc.lock, flags); + if (vchan_issue_pending(&c->vc) && !c->desc) + bcm2835_dma_start_desc(c); + + spin_unlock_irqrestore(&c->vc.lock, flags); +} + +static struct dma_async_tx_descriptor *bcm2835_dma_prep_dma_cyclic( + struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len, + size_t period_len, enum dma_transfer_direction direction, + unsigned long flags, void *context) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + enum dma_slave_buswidth dev_width; + struct bcm2835_desc *d; + dma_addr_t dev_addr; + unsigned es, sync_type; + unsigned frame; + + /* Grab configuration */ + if (direction == DMA_DEV_TO_MEM) { + dev_addr = c->cfg.src_addr; + dev_width = c->cfg.src_addr_width; + sync_type = BCM2835_DMA_S_DREQ; + } else if (direction == DMA_MEM_TO_DEV) { + dev_addr = c->cfg.dst_addr; + dev_width = c->cfg.dst_addr_width; + sync_type = BCM2835_DMA_D_DREQ; + } else { + dev_err(chan->device->dev, "%s: bad direction?\n", __func__); + return NULL; + } + + /* Bus width translates to the element size (ES) */ + switch (dev_width) { + case DMA_SLAVE_BUSWIDTH_4_BYTES: + es = BCM2835_DMA_DATA_TYPE_S32; + break; + default: + return NULL; + } + + /* Now allocate and setup the descriptor. */ + d = kzalloc(sizeof(*d), GFP_NOWAIT); + if (!d) + return NULL; + + d->dir = direction; + d->frames = buf_len / period_len; + + /* Allocate memory for control blocks */ + d->control_block_size = d->frames * sizeof(struct bcm2835_dma_cb); + d->control_block_base = dma_zalloc_coherent(chan->device->dev, + d->control_block_size, &d->control_block_base_phys, + GFP_NOWAIT); + + if (!d->control_block_base) { + kfree(d); + return NULL; + } + + /* + * Iterate over all frames, create a control block + * for each frame and link them together. + */ + for (frame = 0; frame < d->frames; frame++) { + struct bcm2835_dma_cb *control_block = + &d->control_block_base[frame]; + + /* Setup adresses */ + if (d->dir == DMA_DEV_TO_MEM) { + control_block->info = BCM2835_DMA_D_INC; + control_block->src = dev_addr; + control_block->dst = buf_addr + frame * period_len; + } else { + control_block->info = BCM2835_DMA_S_INC; + control_block->src = buf_addr + frame * period_len; + control_block->dst = dev_addr; + } + + /* Enable interrupt */ + control_block->info |= BCM2835_DMA_INT_EN; + + /* Setup synchronization */ + if (sync_type != 0) + control_block->info |= sync_type; + + /* Setup DREQ channel */ + if (c->dreq != 0) + control_block->info |= + BCM2835_DMA_PER_MAP(c->dreq); + + /* Length of a frame */ + control_block->length = period_len; + d->size += control_block->length; + + /* + * Next block is the next frame. + * This DMA engine driver currently only supports cyclic DMA. + * Therefore, wrap around at number of frames. + */ + control_block->next = d->control_block_base_phys + + sizeof(struct bcm2835_dma_cb) + * ((frame + 1) % d->frames); + } + + return vchan_tx_prep(&c->vc, &d->vd, flags); +} + +static int bcm2835_dma_slave_config(struct bcm2835_chan *c, + struct dma_slave_config *cfg) +{ + if ((cfg->direction == DMA_DEV_TO_MEM && + cfg->src_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES) || + (cfg->direction == DMA_MEM_TO_DEV && + cfg->dst_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES) || + !is_slave_direction(cfg->direction)) { + return -EINVAL; + } + + c->cfg = *cfg; + + return 0; +} + +static int bcm2835_dma_terminate_all(struct bcm2835_chan *c) +{ + struct bcm2835_dmadev *d = to_bcm2835_dma_dev(c->vc.chan.device); + unsigned long flags; + int timeout = 1000; + LIST_HEAD(head); + + spin_lock_irqsave(&c->vc.lock, flags); + + /* Prevent this channel being scheduled */ + spin_lock(&d->lock); + list_del_init(&c->node); + spin_unlock(&d->lock); + + /* + * Stop DMA activity: we assume the callback will not be called + * after bcm_dma_abort() returns (even if it does, it will see + * c->desc is NULL and exit.) + */ + if (c->desc) { + c->desc = NULL; + bcm2835_dma_abort(c->chan_base); + + /* Wait for stopping */ + while (timeout > 0) { + timeout--; + if (!(readl(c->chan_base + BCM2835_DMA_CS) & + BCM2835_DMA_ACTIVE)) + break; + + cpu_relax(); + } + + if (timeout <= 0) + dev_err(d->ddev.dev, "DMA transfer could not be terminated\n"); + } + + vchan_get_all_descriptors(&c->vc, &head); + spin_unlock_irqrestore(&c->vc.lock, flags); + vchan_dma_desc_free_list(&c->vc, &head); + + return 0; +} + +static int bcm2835_dma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd, + unsigned long arg) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + int ret; + + switch (cmd) { + case DMA_SLAVE_CONFIG: + return bcm2835_dma_slave_config(c, + (struct dma_slave_config *)arg); + + case DMA_TERMINATE_ALL: + bcm2835_dma_terminate_all(c); + break; + + default: + ret = -ENXIO; + break; + } + + return ret; +} + +static int bcm2835_dma_chan_init(struct bcm2835_dmadev *d, int chan_id, int irq) +{ + struct bcm2835_chan *c; + + c = devm_kzalloc(d->ddev.dev, sizeof(*c), GFP_KERNEL); + if (!c) + return -ENOMEM; + + c->vc.desc_free = bcm2835_dma_desc_free; + vchan_init(&c->vc, &d->ddev); + INIT_LIST_HEAD(&c->node); + + d->ddev.chancnt++; + + c->chan_base = BCM2835_DMA_CHANIO(d->base, chan_id); + c->ch = chan_id; + c->irq_number = irq; + + return 0; +} + +static void bcm2835_dma_free(struct bcm2835_dmadev *od) +{ + while (!list_empty(&od->ddev.channels)) { + struct bcm2835_chan *c = list_first_entry(&od->ddev.channels, + struct bcm2835_chan, vc.chan.device_node); + + list_del(&c->vc.chan.device_node); + tasklet_kill(&c->vc.task); + } +} + +#if defined(CONFIG_OF) +static const struct of_device_id bcm2835_dma_of_match[] = { + { .compatible = "brcm,bcm2835-dma", }, + {}, +}; +MODULE_DEVICE_TABLE(of, bcm2835_dma_of_match); +#endif + +static struct dma_chan *bcm2835_dma_xlate(struct of_phandle_args *spec, + struct of_dma *ofdma) +{ + struct bcm2835_dmadev *d = ofdma->of_dma_data; + struct dma_chan *chan, *candidate; + +retry: + candidate = NULL; + + /* Walk the list of channels registered with the current instance and + * find one that is currently unused */ + list_for_each_entry(chan, &d->ddev.channels, device_node) + if (chan->client_count == 0) { + candidate = chan; + break; + } + + if (!candidate) + return NULL; + + /* dma_get_slave_channel will return NULL if we lost a race between + * the lookup and the reservation */ + chan = dma_get_slave_channel(candidate); + + if (chan) { + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + + /* Set DREQ from param */ + c->dreq = spec->args[0]; + + return chan; + } + + goto retry; +} + +static int bcm2835_dma_device_slave_caps(struct dma_chan *dchan, + struct dma_slave_caps *caps) +{ + caps->src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES); + caps->dstn_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES); + caps->directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV); + caps->cmd_pause = false; + caps->cmd_terminate = true; + + return 0; +} + +static int bcm2835_dma_probe(struct platform_device *pdev) +{ + struct bcm2835_dmadev *od; + struct resource *res; + void __iomem *base; + int rc; + int i; + int irq; + uint32_t chans_available; + + if (!pdev->dev.dma_mask) + pdev->dev.dma_mask = &pdev->dev.coherent_dma_mask; + + rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); + if (rc) + return rc; + dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); + + od = devm_kzalloc(&pdev->dev, sizeof(*od), GFP_KERNEL); + if (!od) + return -ENOMEM; + + pdev->dev.dma_parms = &od->dma_parms; + dma_set_max_seg_size(&pdev->dev, 0x3FFFFFFF); + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(base)) + return PTR_ERR(base); + + od->base = base; + + dma_cap_set(DMA_SLAVE, od->ddev.cap_mask); + dma_cap_set(DMA_CYCLIC, od->ddev.cap_mask); + od->ddev.device_alloc_chan_resources = bcm2835_dma_alloc_chan_resources; + od->ddev.device_free_chan_resources = bcm2835_dma_free_chan_resources; + od->ddev.device_tx_status = bcm2835_dma_tx_status; + od->ddev.device_issue_pending = bcm2835_dma_issue_pending; + od->ddev.device_slave_caps = bcm2835_dma_device_slave_caps; + od->ddev.device_prep_dma_cyclic = bcm2835_dma_prep_dma_cyclic; + od->ddev.device_control = bcm2835_dma_control; + od->ddev.dev = &pdev->dev; + INIT_LIST_HEAD(&od->ddev.channels); + spin_lock_init(&od->lock); + + platform_set_drvdata(pdev, od); + + if (pdev->dev.of_node) { + /* Request DMA channel mask from device tree */ + if (of_property_read_u32(pdev->dev.of_node, + "brcm,dma-channel-mask", + &chans_available)) { + dev_err(&pdev->dev, "Failed to get channel mask\n"); + bcm2835_dma_free(od); + return -EINVAL; + } + } else { + dev_err(&pdev->dev, "Failed to get channel mask. No device tree.\n"); + bcm2835_dma_free(od); + return -EINVAL; + } + + /* Do not use the FIQ and BULK channels */ + chans_available &= ~0xD; + + for (i = 0; i < pdev->num_resources; i++) { + irq = platform_get_irq(pdev, i); + if (irq < 0) + break; + + if (chans_available & (1 << i)) { + rc = bcm2835_dma_chan_init(od, i, irq); + if (rc) { + bcm2835_dma_free(od); + return rc; + } + } + } + + dev_dbg(&pdev->dev, "Initialized %i DMA channels\n", i); + + if (pdev->dev.of_node) { + /* Device-tree DMA controller registration */ + rc = of_dma_controller_register(pdev->dev.of_node, + bcm2835_dma_xlate, od); + if (rc) { + dev_err(&pdev->dev, "Failed to register DMA controller\n"); + bcm2835_dma_free(od); + return rc; + } + } + + rc = dma_async_device_register(&od->ddev); + if (rc) { + dev_err(&pdev->dev, + "Failed to register slave DMA engine device: %d\n", rc); + bcm2835_dma_free(od); + return rc; + } + + dev_dbg(&pdev->dev, "Load BCM2835 DMA engine driver\n"); + + return rc; +} + +static int bcm2835_dma_remove(struct platform_device *pdev) +{ + struct bcm2835_dmadev *od = platform_get_drvdata(pdev); + + dma_async_device_unregister(&od->ddev); + bcm2835_dma_free(od); + + return 0; +} + +static struct platform_driver bcm2835_dma_driver = { + .probe = bcm2835_dma_probe, + .remove = bcm2835_dma_remove, + .driver = { + .name = "bcm2835-dma", + .owner = THIS_MODULE, + .of_match_table = of_match_ptr(bcm2835_dma_of_match), + }, +}; + +module_platform_driver(bcm2835_dma_driver); + +MODULE_ALIAS("platform:bcm2835-dma"); +MODULE_DESCRIPTION("BCM2835 DMA engine driver"); +MODULE_AUTHOR("Florian Meier <florian.meier(a)koalo.de>"); +MODULE_LICENSE("GPL v2"); -- 1.7.9.5

6 10

[alsa-devel] [PATCH] ALSA: hda - Select FW_LOADER from CONFIG_SND_HDA_CODEC_CA0132_DSP
by Takashi Iwai 18 Nov '13

18 Nov '13

Use select FW_LOADER instead of depends on. It's more intuitive and more consistent with other entries. Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- sound/pci/hda/Kconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/sound/pci/hda/Kconfig b/sound/pci/hda/Kconfig index 8de66ccd7279..4cdd9ded4563 100644 --- a/sound/pci/hda/Kconfig +++ b/sound/pci/hda/Kconfig @@ -209,8 +209,9 @@ config SND_HDA_CODEC_CA0132 config SND_HDA_CODEC_CA0132_DSP bool "Support new DSP code for CA0132 codec" - depends on SND_HDA_CODEC_CA0132 && FW_LOADER + depends on SND_HDA_CODEC_CA0132 select SND_HDA_DSP_LOADER + select FW_LOADER help Say Y here to enable the DSP for Creative CA0132 for extended features like equalizer or echo cancellation. -- 1.8.4.3

1 0

[alsa-devel] [PATCHv3] ASoC: Add support for BCM2835
by Florian Meier 18 Nov '13

18 Nov '13

This driver adds support for digital audio (I2S) for the BCM2835 SoC that is used by the Raspberry Pi. External audio codecs can be connected to the Raspberry Pi via P5 header. It relies on cyclic DMA engine support for BCM2835. Signed-off-by: Florian Meier <florian.meier(a)koalo.de> --- This successor of RFCv2 is no longer dependent on the dmaengine patch (of course you need it for running it). Therefore, it should cleanly apply. Furthermore, some minor enhancements were applied. For example - Removal of bcm2835-pcm.c and .h - Adding bindings documentation - Adding possibility for setting bclk_ratio .../devicetree/bindings/sound/bcm2835-i2s.txt | 22 + sound/soc/Kconfig | 1 + sound/soc/Makefile | 1 + sound/soc/bcm/Kconfig | 10 + sound/soc/bcm/Makefile | 5 + sound/soc/bcm/bcm2835-i2s.c | 904 ++++++++++++++++++++ 6 files changed, 943 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/bcm2835-i2s.txt create mode 100644 sound/soc/bcm/Kconfig create mode 100644 sound/soc/bcm/Makefile create mode 100644 sound/soc/bcm/bcm2835-i2s.c diff --git a/Documentation/devicetree/bindings/sound/bcm2835-i2s.txt b/Documentation/devicetree/bindings/sound/bcm2835-i2s.txt new file mode 100644 index 0000000..7bf1d04 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/bcm2835-i2s.txt @@ -0,0 +1,22 @@ +* Broadcom BCM2835 SoC I2S/PCM module + +Required properties: +- compatible: "brcm,bcm2835-i2s" +- reg: Register location and size + <PCM base address, size + PCM clock base address, size>; +- dmas: List of DMA controller phandle and DMA request line ordered pairs. +- dma-names: Identifier string for each DMA request line in the dmas property. + These strings correspond 1:1 with the ordered pairs in dmas. + +Example: + +bcm2835_i2s: i2s@7e203000 { + compatible = "brcm,bcm2835-i2s"; + reg = < 0x7e203000 0x20 + 0x7e101098 0x02>; + + dmas = <&dma 2 + &dma 3>; + dma-names = "tx", "rx"; +}; diff --git a/sound/soc/Kconfig b/sound/soc/Kconfig index 5138b84..a5e3a70 100644 --- a/sound/soc/Kconfig +++ b/sound/soc/Kconfig @@ -33,6 +33,7 @@ config SND_SOC_GENERIC_DMAENGINE_PCM # All the supported SoCs source "sound/soc/atmel/Kconfig" source "sound/soc/au1x/Kconfig" +source "sound/soc/bcm/Kconfig" source "sound/soc/blackfin/Kconfig" source "sound/soc/cirrus/Kconfig" source "sound/soc/davinci/Kconfig" diff --git a/sound/soc/Makefile b/sound/soc/Makefile index 8b9e701..b52d4aa 100644 --- a/sound/soc/Makefile +++ b/sound/soc/Makefile @@ -10,6 +10,7 @@ obj-$(CONFIG_SND_SOC) += codecs/ obj-$(CONFIG_SND_SOC) += generic/ obj-$(CONFIG_SND_SOC) += atmel/ obj-$(CONFIG_SND_SOC) += au1x/ +obj-$(CONFIG_SND_SOC) += bcm/ obj-$(CONFIG_SND_SOC) += blackfin/ obj-$(CONFIG_SND_SOC) += cirrus/ obj-$(CONFIG_SND_SOC) += davinci/ diff --git a/sound/soc/bcm/Kconfig b/sound/soc/bcm/Kconfig new file mode 100644 index 0000000..3d82a29 --- /dev/null +++ b/sound/soc/bcm/Kconfig @@ -0,0 +1,10 @@ +config SND_BCM2835_SOC_I2S + tristate "SoC Audio support for the Broadcom BCM2835 I2S module" + depends on ARCH_BCM2835 || COMPILE_TEST + select SND_SOC_DMAENGINE_PCM + select SND_SOC_GENERIC_DMAENGINE_PCM + select REGMAP_MMIO + help + Say Y or M if you want to add support for codecs attached to + the BCM2835 I2S interface. You will also need + to select the audio interfaces to support below. diff --git a/sound/soc/bcm/Makefile b/sound/soc/bcm/Makefile new file mode 100644 index 0000000..bc816b7 --- /dev/null +++ b/sound/soc/bcm/Makefile @@ -0,0 +1,5 @@ +# BCM2835 Platform Support +snd-soc-bcm2835-i2s-objs := bcm2835-i2s.o + +obj-$(CONFIG_SND_BCM2835_SOC_I2S) += snd-soc-bcm2835-i2s.o + diff --git a/sound/soc/bcm/bcm2835-i2s.c b/sound/soc/bcm/bcm2835-i2s.c new file mode 100644 index 0000000..7378e08 --- /dev/null +++ b/sound/soc/bcm/bcm2835-i2s.c @@ -0,0 +1,904 @@ +/* + * ALSA SoC I2S Audio Layer for Broadcom BCM2835 SoC + * + * Author: Florian Meier <florian.meier(a)koalo.de> + * Copyright 2013 + * + * Based on + * Raspberry Pi PCM I2S ALSA Driver + * Copyright (c) by Phil Poole 2013 + * + * ALSA SoC I2S (McBSP) Audio Layer for TI DAVINCI processor + * Vladimir Barinov, <vbarinov(a)embeddedalley.com> + * Copyright (C) 2007 MontaVista Software, Inc., <source(a)mvista.com> + * + * OMAP ALSA SoC DAI driver using McBSP port + * Copyright (C) 2008 Nokia Corporation + * Contact: Jarkko Nikula <jarkko.nikula(a)bitmer.com> + * Peter Ujfalusi <peter.ujfalusi(a)ti.com> + * + * Freescale SSI ALSA SoC Digital Audio Interface (DAI) driver + * Author: Timur Tabi <timur(a)freescale.com> + * Copyright 2007-2010 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + */ + +#include <linux/init.h> +#include <linux/module.h> +#include <linux/device.h> +#include <linux/slab.h> +#include <linux/delay.h> +#include <linux/io.h> +#include <linux/clk.h> + +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/initval.h> +#include <sound/soc.h> +#include <sound/dmaengine_pcm.h> + +/* Clock registers */ +#define BCM2835_CLK_PCMCTL_REG 0x00 +#define BCM2835_CLK_PCMDIV_REG 0x04 + +/* Clock register settings */ +#define BCM2835_CLK_PASSWD (0x5a000000) +#define BCM2835_CLK_PASSWD_MASK (0xff000000) +#define BCM2835_CLK_MASH(v) ((v) << 9) +#define BCM2835_CLK_FLIP BIT(8) +#define BCM2835_CLK_BUSY BIT(7) +#define BCM2835_CLK_KILL BIT(5) +#define BCM2835_CLK_ENAB BIT(4) +#define BCM2835_CLK_SRC(v) (v) + +#define BCM2835_CLK_DIVI(v) ((v) << 12) +#define BCM2835_CLK_DIVF(v) (v) + +enum { + BCM2835_CLK_MASH_0 = 0, + BCM2835_CLK_MASH_1, + BCM2835_CLK_MASH_2, + BCM2835_CLK_MASH_3, +}; + +enum { + BCM2835_CLK_SRC_GND = 0, + BCM2835_CLK_SRC_OSC, + BCM2835_CLK_SRC_DBG0, + BCM2835_CLK_SRC_DBG1, + BCM2835_CLK_SRC_PLLA, + BCM2835_CLK_SRC_PLLC, + BCM2835_CLK_SRC_PLLD, + BCM2835_CLK_SRC_HDMI, +}; + +/* Most clocks are not useable (freq = 0) */ +static const unsigned int bcm2835_clk_freq[BCM2835_CLK_SRC_HDMI+1] = { + [BCM2835_CLK_SRC_GND] = 0, + [BCM2835_CLK_SRC_OSC] = 19200000, + [BCM2835_CLK_SRC_DBG0] = 0, + [BCM2835_CLK_SRC_DBG1] = 0, + [BCM2835_CLK_SRC_PLLA] = 0, + [BCM2835_CLK_SRC_PLLC] = 0, + [BCM2835_CLK_SRC_PLLD] = 500000000, + [BCM2835_CLK_SRC_HDMI] = 0, +}; + +/* I2S registers */ +#define BCM2835_I2S_CS_A_REG 0x00 +#define BCM2835_I2S_FIFO_A_REG 0x04 +#define BCM2835_I2S_MODE_A_REG 0x08 +#define BCM2835_I2S_RXC_A_REG 0x0c +#define BCM2835_I2S_TXC_A_REG 0x10 +#define BCM2835_I2S_DREQ_A_REG 0x14 +#define BCM2835_I2S_INTEN_A_REG 0x18 +#define BCM2835_I2S_INTSTC_A_REG 0x1c +#define BCM2835_I2S_GRAY_REG 0x20 + +/* I2S register settings */ +#define BCM2835_I2S_STBY BIT(25) +#define BCM2835_I2S_SYNC BIT(24) +#define BCM2835_I2S_RXSEX BIT(23) +#define BCM2835_I2S_RXF BIT(22) +#define BCM2835_I2S_TXE BIT(21) +#define BCM2835_I2S_RXD BIT(20) +#define BCM2835_I2S_TXD BIT(19) +#define BCM2835_I2S_RXR BIT(18) +#define BCM2835_I2S_TXW BIT(17) +#define BCM2835_I2S_CS_RXERR BIT(16) +#define BCM2835_I2S_CS_TXERR BIT(15) +#define BCM2835_I2S_RXSYNC BIT(14) +#define BCM2835_I2S_TXSYNC BIT(13) +#define BCM2835_I2S_DMAEN BIT(9) +#define BCM2835_I2S_RXTHR(v) ((v) << 7) +#define BCM2835_I2S_TXTHR(v) ((v) << 5) +#define BCM2835_I2S_RXCLR BIT(4) +#define BCM2835_I2S_TXCLR BIT(3) +#define BCM2835_I2S_TXON BIT(2) +#define BCM2835_I2S_RXON BIT(1) +#define BCM2835_I2S_EN (1) + +#define BCM2835_I2S_CLKDIS BIT(28) +#define BCM2835_I2S_PDMN BIT(27) +#define BCM2835_I2S_PDME BIT(26) +#define BCM2835_I2S_FRXP BIT(25) +#define BCM2835_I2S_FTXP BIT(24) +#define BCM2835_I2S_CLKM BIT(23) +#define BCM2835_I2S_CLKI BIT(22) +#define BCM2835_I2S_FSM BIT(21) +#define BCM2835_I2S_FSI BIT(20) +#define BCM2835_I2S_FLEN(v) ((v) << 10) +#define BCM2835_I2S_FSLEN(v) (v) + +#define BCM2835_I2S_CHWEX BIT(15) +#define BCM2835_I2S_CHEN BIT(14) +#define BCM2835_I2S_CHPOS(v) ((v) << 4) +#define BCM2835_I2S_CHWID(v) (v) +#define BCM2835_I2S_CH1(v) ((v) << 16) +#define BCM2835_I2S_CH2(v) (v) + +#define BCM2835_I2S_TX_PANIC(v) ((v) << 24) +#define BCM2835_I2S_RX_PANIC(v) ((v) << 16) +#define BCM2835_I2S_TX(v) ((v) << 8) +#define BCM2835_I2S_RX(v) (v) + +#define BCM2835_I2S_INT_RXERR BIT(3) +#define BCM2835_I2S_INT_TXERR BIT(2) +#define BCM2835_I2S_INT_RXR BIT(1) +#define BCM2835_I2S_INT_TXW BIT(0) + +/* I2S DMA interface */ +/* FIXME: Needs IOMMU support */ +#define BCM2835_VCMMU_SHIFT (0x7E000000 - 0x20000000) + +/* General device struct */ +struct bcm2835_i2s_dev { + struct device *dev; + struct snd_dmaengine_dai_dma_data dma_data[2]; + unsigned int fmt; + unsigned int bclk_ratio; + + struct regmap *i2s_regmap; + struct regmap *clk_regmap; +}; + +static void bcm2835_i2s_start_clock(struct bcm2835_i2s_dev *dev) +{ + /* Start the clock if in master mode */ + unsigned int master = dev->fmt & SND_SOC_DAIFMT_MASTER_MASK; + + switch (master) { + case SND_SOC_DAIFMT_CBS_CFS: + case SND_SOC_DAIFMT_CBS_CFM: + regmap_update_bits(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, + BCM2835_CLK_PASSWD_MASK | BCM2835_CLK_ENAB, + BCM2835_CLK_PASSWD | BCM2835_CLK_ENAB); + break; + default: + break; + } +} + +static void bcm2835_i2s_stop_clock(struct bcm2835_i2s_dev *dev) +{ + uint32_t clkreg; + int timeout = 1000; + + /* Stop clock */ + regmap_update_bits(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, + BCM2835_CLK_PASSWD_MASK | BCM2835_CLK_ENAB, + BCM2835_CLK_PASSWD); + + /* Wait for the BUSY flag going down */ + while (timeout > 0) { + timeout--; + + regmap_read(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, &clkreg); + if (!(clkreg & BCM2835_CLK_BUSY)) + break; + } + + if (timeout <= 0) { + /* KILL the clock */ + dev_err(dev->dev, "I2S clock didn't stop. Kill the clock!\n"); + regmap_update_bits(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, + BCM2835_CLK_KILL | BCM2835_CLK_PASSWD_MASK, + BCM2835_CLK_KILL | BCM2835_CLK_PASSWD); + } +} + +static void bcm2835_i2s_clear_fifos(struct bcm2835_i2s_dev *dev, + bool tx, bool rx) +{ + int timeout = 1000; + uint32_t syncval; + uint32_t csreg; + uint32_t i2s_active_state; + uint32_t clkreg; + uint32_t clk_active_state; + uint32_t off; + uint32_t clr; + + off = tx ? BCM2835_I2S_TXON : 0; + off |= rx ? BCM2835_I2S_RXON : 0; + + clr = tx ? BCM2835_I2S_TXCLR : 0; + clr |= rx ? BCM2835_I2S_RXCLR : 0; + + /* Backup the current state */ + regmap_read(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, &csreg); + i2s_active_state = csreg & (BCM2835_I2S_RXON | BCM2835_I2S_TXON); + + regmap_read(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, &clkreg); + clk_active_state = clkreg & BCM2835_CLK_ENAB; + + /* Start clock if not running */ + if (!clk_active_state) { + regmap_update_bits(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, + BCM2835_CLK_PASSWD_MASK | BCM2835_CLK_ENAB, + BCM2835_CLK_PASSWD | BCM2835_CLK_ENAB); + } + + /* Stop I2S module */ + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, off, 0); + + /* + * Clear the FIFOs + * Requires at least 2 PCM clock cycles to take effect + */ + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, clr, clr); + + /* Wait for 2 PCM clock cycles */ + + /* + * Toggle the SYNC flag - after 2 PCM clock cycles it can be read back + * FIXME: This does not seem to work for slave mode! + */ + regmap_read(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, &syncval); + syncval &= BCM2835_I2S_SYNC; + + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, + BCM2835_I2S_SYNC, ~syncval); + + /* Wait for the SYNC flag changing it's state */ + while (timeout > 0) { + timeout--; + + regmap_read(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, &csreg); + if ((csreg & BCM2835_I2S_SYNC) != syncval) + break; + } + + if (timeout <= 0) + dev_err(dev->dev, "I2S SYNC error!\n"); + + /* Stop clock if it was not running before */ + if (!clk_active_state) + bcm2835_i2s_stop_clock(dev); + + /* Restore I2S state */ + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, + BCM2835_I2S_RXON | BCM2835_I2S_TXON, i2s_active_state); +} + +static int bcm2835_i2s_set_dai_fmt(struct snd_soc_dai *dai, + unsigned int fmt) +{ + struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); + dev->fmt = fmt; + return 0; +} + +static int bcm2835_i2s_set_dai_bclk_ratio(struct snd_soc_dai *dai, + unsigned int ratio) +{ + struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); + dev->bclk_ratio = ratio; + return 0; +} + +static int bcm2835_i2s_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); + + unsigned int sampling_rate = params_rate(params); + unsigned int data_length, data_delay, bclk_ratio; + unsigned int ch1pos, ch2pos, mode, format; + unsigned int mash = BCM2835_CLK_MASH_1; + unsigned int divi, divf, target_frequency; + int clk_src = -1; + unsigned int master = dev->fmt & SND_SOC_DAIFMT_MASTER_MASK; + uint32_t bit_master = (master == SND_SOC_DAIFMT_CBS_CFS + || master == SND_SOC_DAIFMT_CBS_CFM); + + uint32_t frame_master = (master == SND_SOC_DAIFMT_CBS_CFS + || master == SND_SOC_DAIFMT_CBM_CFS); + uint32_t csreg; + + /* + * If a stream is already enabled, + * the registers are already set properly. + */ + regmap_read(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, &csreg); + + if (csreg & (BCM2835_I2S_TXON | BCM2835_I2S_RXON)) + return 0; + + /* + * Adjust the data length according to the format. + * We prefill the half frame length with an integer + * divider of 2400 as explained at the clock settings. + * Maybe it is overwritten there, if the Integer mode + * does not apply. + */ + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_S16_LE: + data_length = 16; + bclk_ratio = 40; + break; + case SNDRV_PCM_FORMAT_S32_LE: + data_length = 32; + bclk_ratio = 80; + break; + default: + return -EINVAL; + } + + /* If bclk_ratio already set, use that one. */ + if (dev->bclk_ratio) + bclk_ratio = dev->bclk_ratio; + + /* + * Clock Settings + * + * The target frequency of the bit clock is + * sampling rate * frame length + * + * Integer mode: + * Sampling rates that are multiples of 8000 kHz + * can be driven by the oscillator of 19.2 MHz + * with an integer divider as long as the frame length + * is an integer divider of 19200000/8000=2400 as set up above. + * This is no longer possible if the sampling rate + * is too high (e.g. 192 kHz), because the oscillator is too slow. + * + * MASH mode: + * For all other sampling rates, it is not possible to + * have an integer divider. Approximate the clock + * with the MASH module that induces a slight frequency + * variance. To minimize that it is best to have the fastest + * clock here. That is PLLD with 500 MHz. + */ + target_frequency = sampling_rate*bclk_ratio; + clk_src = BCM2835_CLK_SRC_OSC; + mash = BCM2835_CLK_MASH_0; + + if (bcm2835_clk_freq[clk_src] % target_frequency == 0 + && bit_master && frame_master) { + divi = bcm2835_clk_freq[clk_src]/target_frequency; + divf = 0; + } else { + uint64_t dividend; + + if (!dev->bclk_ratio) { + /* + * Overwrite bclk_ratio, because the + * above trick is not needed or can + * not be used. + */ + bclk_ratio = 2*data_length; + } + + target_frequency = sampling_rate*bclk_ratio; + + clk_src = BCM2835_CLK_SRC_PLLD; + mash = BCM2835_CLK_MASH_1; + + dividend = bcm2835_clk_freq[clk_src]; + dividend *= 1024; + do_div(dividend, target_frequency); + divi = dividend / 1024; + divf = dividend % 1024; + } + + /* Set clock divider */ + regmap_write(dev->clk_regmap, BCM2835_CLK_PCMDIV_REG, BCM2835_CLK_PASSWD + | BCM2835_CLK_DIVI(divi) + | BCM2835_CLK_DIVF(divf)); + + /* Setup clock, but don't start it yet */ + regmap_write(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, BCM2835_CLK_PASSWD + | BCM2835_CLK_MASH(mash) + | BCM2835_CLK_SRC(clk_src)); + + /* Setup the frame format */ + format = BCM2835_I2S_CHEN; + + if (data_length > 24) + format |= BCM2835_I2S_CHWEX; + + format |= BCM2835_I2S_CHWID((data_length-8)&0xf); + + switch (dev->fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + data_delay = 1; + break; + default: + /* + * TODO + * Others are possible but are not implemented at the moment. + */ + dev_err(dev->dev, "%s:bad format\n", __func__); + return -EINVAL; + } + + ch1pos = data_delay; + ch2pos = bclk_ratio/2+data_delay; + + switch (params_channels(params)) { + case 2: + format = BCM2835_I2S_CH1(format) | BCM2835_I2S_CH2(format); + format |= BCM2835_I2S_CH1(BCM2835_I2S_CHPOS(ch1pos)); + format |= BCM2835_I2S_CH2(BCM2835_I2S_CHPOS(ch2pos)); + break; + default: + return -EINVAL; + } + + /* + * Set format for both streams. + * We cannot set another frame length + * (and therefore word length) anyway, + * so the format will be the same. + */ + regmap_write(dev->i2s_regmap, BCM2835_I2S_RXC_A_REG, format); + regmap_write(dev->i2s_regmap, BCM2835_I2S_TXC_A_REG, format); + + /* Setup the I2S mode */ + mode = 0; + + if (data_length <= 16) { + /* + * Use frame packed mode (2 channels per 32 bit word) + * We cannot set another frame length in the second stream + * (and therefore word length) anyway, + * so the format will be the same. + */ + mode |= BCM2835_I2S_FTXP | BCM2835_I2S_FRXP; + } + + mode |= BCM2835_I2S_FLEN(bclk_ratio-1); + mode |= BCM2835_I2S_FSLEN(bclk_ratio/2); + + /* Master or slave? */ + switch (dev->fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBS_CFS: + /* CPU is master */ + break; + case SND_SOC_DAIFMT_CBM_CFS: + /* + * CODEC is bit clock master + * CPU is frame master + */ + mode |= BCM2835_I2S_CLKM; + break; + case SND_SOC_DAIFMT_CBS_CFM: + /* + * CODEC is frame master + * CPU is bit clock master + */ + mode |= BCM2835_I2S_FSM; + break; + case SND_SOC_DAIFMT_CBM_CFM: + /* CODEC is master */ + mode |= BCM2835_I2S_CLKM; + mode |= BCM2835_I2S_FSM; + break; + default: + dev_err(dev->dev, "%s:bad master\n", __func__); + return -EINVAL; + } + + /* + * Invert clocks? + * + * The BCM approach seems to be inverted to the classical I2S approach. + */ + switch (dev->fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + /* None - therefore, both for BCM */ + mode |= BCM2835_I2S_CLKI; + mode |= BCM2835_I2S_FSI; + break; + case SND_SOC_DAIFMT_IB_IF: + /* Both - therefore, none for BCM*/ + break; + case SND_SOC_DAIFMT_NB_IF: + /* + * Invert only frame sync - therefore, + * Invert only bit clock for BCM + */ + mode |= BCM2835_I2S_CLKI; + break; + case SND_SOC_DAIFMT_IB_NF: + /* + * Invert only bit clock - therefore, + * Invert only frame sync for BCM + */ + mode |= BCM2835_I2S_FSI; + break; + default: + return -EINVAL; + } + + regmap_write(dev->i2s_regmap, BCM2835_I2S_MODE_A_REG, mode); + + + /* Setup the DMA parameters */ + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, + BCM2835_I2S_RXTHR(1) + | BCM2835_I2S_TXTHR(1) + | BCM2835_I2S_DMAEN, 0xffffffff); + + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_DREQ_A_REG, + BCM2835_I2S_TX_PANIC(0x10) + | BCM2835_I2S_RX_PANIC(0x30) + | BCM2835_I2S_TX(0x30) + | BCM2835_I2S_RX(0x20), 0xffffffff); + + /* Clear FIFOs */ + bcm2835_i2s_clear_fifos(dev, true, true); + + return 0; +} + + +static int bcm2835_i2s_prepare(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); + uint32_t cs_reg; + + bcm2835_i2s_start_clock(dev); + + /* + * Clear both FIFOs if the one that should be started + * is not empty at the moment. This should only happen + * after overrun. Otherwise, hw_params would have cleared + * the FIFO. + */ + regmap_read(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, &cs_reg); + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK + && !(cs_reg & BCM2835_I2S_TXE)) + bcm2835_i2s_clear_fifos(dev, true, false); + else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE + && (cs_reg & BCM2835_I2S_RXD)) + bcm2835_i2s_clear_fifos(dev, false, true); + + return 0; +} + +static void bcm2835_i2s_stop(struct bcm2835_i2s_dev *dev, + struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + uint32_t mask; + + if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) + mask = BCM2835_I2S_RXON; + else + mask = BCM2835_I2S_TXON; + + regmap_update_bits(dev->i2s_regmap, + BCM2835_I2S_CS_A_REG, mask, 0); + + /* Stop also the clock when not SND_SOC_DAIFMT_CONT */ + if (!dai->active && !(dev->fmt & SND_SOC_DAIFMT_CONT)) + bcm2835_i2s_stop_clock(dev); + +} + +static int bcm2835_i2s_trigger(struct snd_pcm_substream *substream, int cmd, + struct snd_soc_dai *dai) +{ + struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); + uint32_t mask; + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + case SNDRV_PCM_TRIGGER_RESUME: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + bcm2835_i2s_start_clock(dev); + + if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) + mask = BCM2835_I2S_RXON; + else + mask = BCM2835_I2S_TXON; + + regmap_update_bits(dev->i2s_regmap, + BCM2835_I2S_CS_A_REG, mask, mask); + break; + + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + bcm2835_i2s_stop(dev, substream, dai); + break; + default: + return -EINVAL; + } + + return 0; +} + +static int bcm2835_i2s_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); + + if (!dai->active) { + /* Should this still be running stop it */ + bcm2835_i2s_stop_clock(dev); + + /* Enable PCM block */ + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, + BCM2835_I2S_EN, BCM2835_I2S_EN); + + /* + * Disable STBY + * Requires at least 4 PCM clock cycles to take effect + */ + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, + BCM2835_I2S_STBY, BCM2835_I2S_STBY); + } + + return 0; +} + +static void bcm2835_i2s_shutdown(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); + + bcm2835_i2s_stop(dev, substream, dai); + + /* If both streams are stopped, disable module and clock */ + if (!dai->active) { + /* Disable the module */ + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, + BCM2835_I2S_EN, 0); + + /* + * Stopping clock is necessary, because stop does + * not stop the clock when SND_SOC_DAIFMT_CONT + */ + bcm2835_i2s_stop_clock(dev); + } +} + +static const struct snd_soc_dai_ops bcm2835_i2s_dai_ops = { + .startup = bcm2835_i2s_startup, + .shutdown = bcm2835_i2s_shutdown, + .prepare = bcm2835_i2s_prepare, + .trigger = bcm2835_i2s_trigger, + .hw_params = bcm2835_i2s_hw_params, + .set_fmt = bcm2835_i2s_set_dai_fmt, + .set_bclk_ratio = bcm2835_i2s_set_dai_bclk_ratio +}; + +static int bcm2835_i2s_dai_probe(struct snd_soc_dai *dai) +{ + struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); + + snd_soc_dai_init_dma_data(dai, + &dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK], + &dev->dma_data[SNDRV_PCM_STREAM_CAPTURE]); + + return 0; +} + +static struct snd_soc_dai_driver bcm2835_i2s_dai = { + .name = "bcm2835-i2s", + .probe = bcm2835_i2s_dai_probe, + .playback = { + .channels_min = 2, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000_192000, + .formats = SNDRV_PCM_FMTBIT_S16_LE + | SNDRV_PCM_FMTBIT_S32_LE + }, + .capture = { + .channels_min = 2, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000_192000, + .formats = SNDRV_PCM_FMTBIT_S16_LE + | SNDRV_PCM_FMTBIT_S32_LE + }, + .ops = &bcm2835_i2s_dai_ops, + .symmetric_rates = 1 +}; + +static bool bcm2835_i2s_volatile_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case BCM2835_I2S_CS_A_REG: + case BCM2835_I2S_FIFO_A_REG: + case BCM2835_I2S_INTSTC_A_REG: + case BCM2835_I2S_GRAY_REG: + return true; + default: + return false; + }; +} + +static bool bcm2835_i2s_precious_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case BCM2835_I2S_FIFO_A_REG: + return true; + default: + return false; + }; +} + +static bool bcm2835_clk_volatile_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case BCM2835_CLK_PCMCTL_REG: + return true; + default: + return false; + }; +} + +static const struct regmap_config bcm2835_regmap_config[] = { + { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + .max_register = BCM2835_I2S_GRAY_REG, + .precious_reg = bcm2835_i2s_precious_reg, + .volatile_reg = bcm2835_i2s_volatile_reg, + .cache_type = REGCACHE_RBTREE, + }, + { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + .max_register = BCM2835_CLK_PCMDIV_REG, + .volatile_reg = bcm2835_clk_volatile_reg, + .cache_type = REGCACHE_RBTREE, + }, +}; + +static const struct snd_soc_component_driver bcm2835_i2s_component = { + .name = "bcm2835-i2s-comp", +}; + +static int bcm2835_i2s_probe(struct platform_device *pdev) +{ + struct bcm2835_i2s_dev *dev; + int i; + int ret; + struct regmap *regmap[2]; + struct resource *mem[2]; + + /* Request both ioareas */ + for (i = 0; i <= 1; i++) { + void __iomem *base; + + mem[i] = platform_get_resource(pdev, IORESOURCE_MEM, i); + if (!mem[i]) { + dev_err(&pdev->dev, "I2S probe: Memory resource could not be found.\n"); + return -ENODEV; + } + + base = devm_ioremap_resource(&pdev->dev, mem[i]); + if (!base) { + dev_err(&pdev->dev, "I2S probe: ioremap failed.\n"); + return -ENOMEM; + } + + regmap[i] = devm_regmap_init_mmio(&pdev->dev, base, + &bcm2835_regmap_config[i]); + if (IS_ERR(regmap[i])) { + dev_err(&pdev->dev, "I2S probe: regmap init failed\n"); + return PTR_ERR(regmap[i]); + } + } + + dev = devm_kzalloc(&pdev->dev, sizeof(*dev), + GFP_KERNEL); + if (!dev) { + dev_err(&pdev->dev, "I2S probe: kzalloc failed.\n"); + return -ENOMEM; + } + + dev->i2s_regmap = regmap[0]; + dev->clk_regmap = regmap[1]; + + /* Set the DMA address */ + dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK].addr = + (dma_addr_t)mem[0]->start + BCM2835_I2S_FIFO_A_REG + + BCM2835_VCMMU_SHIFT; + + dev->dma_data[SNDRV_PCM_STREAM_CAPTURE].addr = + (dma_addr_t)mem[0]->start + BCM2835_I2S_FIFO_A_REG + + BCM2835_VCMMU_SHIFT; + + /* Set the bus width */ + dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK].addr_width = + DMA_SLAVE_BUSWIDTH_4_BYTES; + dev->dma_data[SNDRV_PCM_STREAM_CAPTURE].addr_width = + DMA_SLAVE_BUSWIDTH_4_BYTES; + + /* Set burst */ + dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK].maxburst = 2; + dev->dma_data[SNDRV_PCM_STREAM_CAPTURE].maxburst = 2; + + /* BCLK ratio - use default */ + dev->bclk_ratio = 0; + + /* Store the pdev */ + dev->dev = &pdev->dev; + dev_set_drvdata(&pdev->dev, dev); + + ret = snd_soc_register_component(&pdev->dev, + &bcm2835_i2s_component, &bcm2835_i2s_dai, 1); + + if (ret) { + dev_err(&pdev->dev, "Could not register DAI: %d\n", ret); + ret = -ENOMEM; + return ret; + } + + ret = snd_dmaengine_pcm_register(&pdev->dev, NULL, 0); + if (ret) { + dev_err(&pdev->dev, "Could not register PCM: %d\n", ret); + snd_soc_unregister_component(&pdev->dev); + return ret; + } + + return 0; +} + +static const struct of_device_id bcm2835_i2s_of_match[] = { + { .compatible = "brcm,bcm2835-i2s", }, + {}, +}; + +static int bcm2835_i2s_remove(struct platform_device *pdev) +{ + snd_dmaengine_pcm_unregister(&pdev->dev); + snd_soc_unregister_component(&pdev->dev); + return 0; +} + +static struct platform_driver bcm2835_i2s_driver = { + .probe = bcm2835_i2s_probe, + .remove = bcm2835_i2s_remove, + .driver = { + .name = "bcm2835-i2s", + .owner = THIS_MODULE, + .of_match_table = bcm2835_i2s_of_match, + }, +}; + +module_platform_driver(bcm2835_i2s_driver); + +MODULE_ALIAS("platform:bcm2835-i2s"); +MODULE_DESCRIPTION("BCM2835 I2S interface"); +MODULE_AUTHOR("Florian Meier <florian.meier(a)koalo.de>"); +MODULE_LICENSE("GPL v2"); -- 1.7.9.5

4 6

[alsa-devel] [PATCH 3/3] ASOC: tegra: fix AC97 clock handling
by Lucas Stach 18 Nov '13

18 Nov '13

This corrects the Tegra AC97 clock handling to be in line with the devicetree. Audio PLL is controlled by the machine driver, only AC97 host controller clock remains to be independent. Signed-off-by: Lucas Stach <dev(a)lynxeye.de> -- CC: Mark Brown <broonie(a)linaro.org> CC: Stephen Warren <swarren(a)wwwdotorg.org> CC: alsa-devel(a)alsa-project.org This is basically a v2 of "ASOC: tegra: move AC97 clock defines to the controller node" incorporating the feedback I got from both Stephen and Mark. --- sound/soc/tegra/tegra20_ac97.c | 32 ++++++++++---------------------- sound/soc/tegra/tegra20_ac97.h | 1 - sound/soc/tegra/tegra_wm9712.c | 17 ++++++++++++++++- 3 files changed, 26 insertions(+), 24 deletions(-) diff --git a/sound/soc/tegra/tegra20_ac97.c b/sound/soc/tegra/tegra20_ac97.c index ae27bcd..584d8c3 100644 --- a/sound/soc/tegra/tegra20_ac97.c +++ b/sound/soc/tegra/tegra20_ac97.c @@ -37,7 +37,6 @@ #include <sound/soc.h> #include <sound/dmaengine_pcm.h> -#include "tegra_asoc_utils.h" #include "tegra20_ac97.h" #define DRV_NAME "tegra20-ac97" @@ -337,7 +336,7 @@ static int tegra20_ac97_platform_probe(struct platform_device *pdev) regs = devm_ioremap_resource(&pdev->dev, mem); if (IS_ERR(regs)) { ret = PTR_ERR(regs); - goto err_clk_put; + goto err; } ac97->regmap = devm_regmap_init_mmio(&pdev->dev, regs, @@ -345,7 +344,7 @@ static int tegra20_ac97_platform_probe(struct platform_device *pdev) if (IS_ERR(ac97->regmap)) { dev_err(&pdev->dev, "regmap init failed\n"); ret = PTR_ERR(ac97->regmap); - goto err_clk_put; + goto err; } if (of_property_read_u32_array(pdev->dev.of_node, @@ -353,7 +352,7 @@ static int tegra20_ac97_platform_probe(struct platform_device *pdev) of_dma, 2) < 0) { dev_err(&pdev->dev, "No DMA resource\n"); ret = -ENODEV; - goto err_clk_put; + goto err; } ac97->reset_gpio = of_get_named_gpio(pdev->dev.of_node, @@ -363,18 +362,18 @@ static int tegra20_ac97_platform_probe(struct platform_device *pdev) GPIOF_OUT_INIT_HIGH, "codec-reset"); if (ret) { dev_err(&pdev->dev, "could not get codec-reset GPIO\n"); - goto err_clk_put; + goto err; } } else { dev_err(&pdev->dev, "no codec-reset GPIO supplied\n"); - goto err_clk_put; + goto err; } ac97->sync_gpio = of_get_named_gpio(pdev->dev.of_node, "nvidia,codec-sync-gpio", 0); if (!gpio_is_valid(ac97->sync_gpio)) { dev_err(&pdev->dev, "no codec-sync GPIO supplied\n"); - goto err_clk_put; + goto err; } ac97->capture_dma_data.addr = mem->start + TEGRA20_AC97_FIFO_RX1; @@ -387,24 +386,18 @@ static int tegra20_ac97_platform_probe(struct platform_device *pdev) ac97->playback_dma_data.maxburst = 4; ac97->playback_dma_data.slave_id = of_dma[1]; - ret = tegra_asoc_utils_init(&ac97->util_data, &pdev->dev); - if (ret) - goto err_clk_put; - - ret = tegra_asoc_utils_set_ac97_rate(&ac97->util_data); - if (ret) - goto err_asoc_utils_fini; + ret = clk_set_rate(ac97->clk_ac97, 24576000); ret = clk_prepare_enable(ac97->clk_ac97); if (ret) { dev_err(&pdev->dev, "clk_enable failed: %d\n", ret); - goto err_asoc_utils_fini; + goto err; } ret = snd_soc_set_ac97_ops(&tegra20_ac97_ops); if (ret) { dev_err(&pdev->dev, "Failed to set AC'97 ops: %d\n", ret); - goto err_asoc_utils_fini; + goto err; } ret = snd_soc_register_component(&pdev->dev, &tegra20_ac97_component, @@ -412,7 +405,7 @@ static int tegra20_ac97_platform_probe(struct platform_device *pdev) if (ret) { dev_err(&pdev->dev, "Could not register DAI: %d\n", ret); ret = -ENOMEM; - goto err_asoc_utils_fini; + goto err; } ret = tegra_pcm_platform_register(&pdev->dev); @@ -428,9 +421,6 @@ static int tegra20_ac97_platform_probe(struct platform_device *pdev) err_unregister_component: snd_soc_unregister_component(&pdev->dev); -err_asoc_utils_fini: - tegra_asoc_utils_fini(&ac97->util_data); -err_clk_put: err: snd_soc_set_ac97_ops(NULL); return ret; @@ -443,8 +433,6 @@ static int tegra20_ac97_platform_remove(struct platform_device *pdev) tegra_pcm_platform_unregister(&pdev->dev); snd_soc_unregister_component(&pdev->dev); - tegra_asoc_utils_fini(&ac97->util_data); - clk_disable_unprepare(ac97->clk_ac97); snd_soc_set_ac97_ops(NULL); diff --git a/sound/soc/tegra/tegra20_ac97.h b/sound/soc/tegra/tegra20_ac97.h index 4acb3aa..0a39d82 100644 --- a/sound/soc/tegra/tegra20_ac97.h +++ b/sound/soc/tegra/tegra20_ac97.h @@ -90,6 +90,5 @@ struct tegra20_ac97 { struct regmap *regmap; int reset_gpio; int sync_gpio; - struct tegra_asoc_utils_data util_data; }; #endif /* __TEGRA20_AC97_H__ */ diff --git a/sound/soc/tegra/tegra_wm9712.c b/sound/soc/tegra/tegra_wm9712.c index 45b5789..25a7f82 100644 --- a/sound/soc/tegra/tegra_wm9712.c +++ b/sound/soc/tegra/tegra_wm9712.c @@ -29,10 +29,13 @@ #include <sound/pcm_params.h> #include <sound/soc.h> +#include "tegra_asoc_utils.h" + #define DRV_NAME "tegra-snd-wm9712" struct tegra_wm9712 { struct platform_device *codec; + struct tegra_asoc_utils_data util_data; }; static const struct snd_soc_dapm_widget tegra_wm9712_dapm_widgets[] = { @@ -118,15 +121,25 @@ static int tegra_wm9712_driver_probe(struct platform_device *pdev) tegra_wm9712_dai.platform_of_node = tegra_wm9712_dai.cpu_of_node; + ret = tegra_asoc_utils_init(&machine->util_data, &pdev->dev); + if (ret) + goto codec_unregister; + + ret = tegra_asoc_utils_set_ac97_rate(&machine->util_data); + if (ret) + goto asoc_utils_fini; + ret = snd_soc_register_card(card); if (ret) { dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n", ret); - goto codec_unregister; + goto asoc_utils_fini; } return 0; +asoc_utils_fini: + tegra_asoc_utils_fini(&machine->util_data); codec_unregister: platform_device_del(machine->codec); codec_put: @@ -141,6 +154,8 @@ static int tegra_wm9712_driver_remove(struct platform_device *pdev) snd_soc_unregister_card(card); + tegra_asoc_utils_fini(&machine->util_data); + platform_device_unregister(machine->codec); return 0; -- 1.8.3.1

3 2

[alsa-devel] internal mic boost: how much is too much?
by Oleksij Rempel 18 Nov '13

18 Nov '13

Hello all, i have two laptops with internal dmic, each of them has 3 step mic boost. One step 12 dB. The third step seems to me useless, since it give more noise then sound. I know there is code in patch_reatek.c to disable two steps. But before i provide some patch, it will be interesting to know, how much noise is too much? What is the best way to measure it? Do i need some tools like this? http://www.conrad.de/ce/de/product/100804/VOLTCRAFT-SL-100-Schallpegel-Mess… -- Regards, Oleksij

1 0

[alsa-devel] [RFC 0/9] ASoC: fsl-ssi: offline/online configuration and cleanups
by Markus Pargmann 18 Nov '13

18 Nov '13

Hi, This patch series fixes some fsl-ssi code that does not act exactly as it is described in the reference manuals. The reference manuals before imx50 do mention that some register bits, including TDMAE/RDMAE, should not be changed while the SSI unit is enabled (SSIEN). At the same time the SDMA unit has a undefined request handling if there are DMA requests before the SDMA engine and its channel is configured. The reference manual states that SSI DMA requests are sent as soon as the FIFO and the DMAE bits are enabled. It does not mention a dependency to SCR's TE/RE bit. To avoid sending DMA requests before a channel is configured, we have to seperate the fsl-ssi behavior into offline and online configuration. SoCs before imx50 have to use offline configuration while later SoC versions can use online reconfiguration. This series adds support for online configuration and cleans up the configuration register code especially in fsl_ssi_trigger. At the end we have a seperation between enable/disable logic and the actual configuration register values used to enable/disable TX/RX. I tested this series on mx53. Regards, Markus Markus Pargmann (9): ASoC: fsl-ssi: Drop AC97 debug register usage ASoC: fsl-ssi: Move ac97 specific setup to seperate function ASoC: fsl-ssi: Move sysfs stats to debugfs ASoC: fsl-ssi: Add imx50-ssi and of_device_id matching ASoC: fsl-ssi: Add offline_config flag ASoC: fsl-ssi: Add configuration helper functions ASoC: fsl-ssi: Move RX/TX configuration to seperate functions ASoC: fsl-ssi: Drop ac97 specific trigger function ARM: DTS: imx5* imx6*, use imx50-ssi arch/arm/boot/dts/imx51.dtsi | 6 +- arch/arm/boot/dts/imx53.dtsi | 6 +- arch/arm/boot/dts/imx6qdl.dtsi | 6 +- arch/arm/boot/dts/imx6sl.dtsi | 6 +- sound/soc/fsl/fsl_ssi.c | 580 ++++++++++++++++++++++++++--------------- 5 files changed, 389 insertions(+), 215 deletions(-) -- 1.8.4.2

2 12

[alsa-devel] [RFC 16/23] ASoC: omap: mcbsp, mcpdm, dmic: raw read and write endian fix
by Taras Kondratiuk 18 Nov '13

18 Nov '13

From: Victor Kamensky <victor.kamensky(a)linaro.org> All OMAP IP blocks expect LE data, but CPU may operate in BE mode. Need to use endian neutral functions to read/write h/w registers. I.e instead of __raw_read[lw] and __raw_write[lw] functions code need to use read[lw]_relaxed and write[lw]_relaxed functions. If the first simply reads/writes register, the second will byteswap it if host operates in BE mode. Changes are trivial sed like replacement of __raw_xxx functions with xxx_relaxed variant. Signed-off-by: Victor Kamensky <victor.kamensky(a)linaro.org> Signed-off-by: Taras Kondratiuk <taras.kondratiuk(a)linaro.org> --- sound/soc/omap/mcbsp.c | 12 ++++++------ sound/soc/omap/omap-dmic.c | 4 ++-- sound/soc/omap/omap-mcpdm.c | 4 ++-- 3 files changed, 10 insertions(+), 10 deletions(-) diff --git a/sound/soc/omap/mcbsp.c b/sound/soc/omap/mcbsp.c index 83433fd..86c7538 100644 --- a/sound/soc/omap/mcbsp.c +++ b/sound/soc/omap/mcbsp.c @@ -36,10 +36,10 @@ static void omap_mcbsp_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val) if (mcbsp->pdata->reg_size == 2) { ((u16 *)mcbsp->reg_cache)[reg] = (u16)val; - __raw_writew((u16)val, addr); + writew_relaxed((u16)val, addr); } else { ((u32 *)mcbsp->reg_cache)[reg] = val; - __raw_writel(val, addr); + writel_relaxed(val, addr); } } @@ -48,22 +48,22 @@ static int omap_mcbsp_read(struct omap_mcbsp *mcbsp, u16 reg, bool from_cache) void __iomem *addr = mcbsp->io_base + reg * mcbsp->pdata->reg_step; if (mcbsp->pdata->reg_size == 2) { - return !from_cache ? __raw_readw(addr) : + return !from_cache ? readw_relaxed(addr) : ((u16 *)mcbsp->reg_cache)[reg]; } else { - return !from_cache ? __raw_readl(addr) : + return !from_cache ? readl_relaxed(addr) : ((u32 *)mcbsp->reg_cache)[reg]; } } static void omap_mcbsp_st_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val) { - __raw_writel(val, mcbsp->st_data->io_base_st + reg); + writel_relaxed(val, mcbsp->st_data->io_base_st + reg); } static int omap_mcbsp_st_read(struct omap_mcbsp *mcbsp, u16 reg) { - return __raw_readl(mcbsp->st_data->io_base_st + reg); + return readl_relaxed(mcbsp->st_data->io_base_st + reg); } #define MCBSP_READ(mcbsp, reg) \ diff --git a/sound/soc/omap/omap-dmic.c b/sound/soc/omap/omap-dmic.c index 12e566b..1bd531d 100644 --- a/sound/soc/omap/omap-dmic.c +++ b/sound/soc/omap/omap-dmic.c @@ -61,12 +61,12 @@ struct omap_dmic { static inline void omap_dmic_write(struct omap_dmic *dmic, u16 reg, u32 val) { - __raw_writel(val, dmic->io_base + reg); + writel_relaxed(val, dmic->io_base + reg); } static inline int omap_dmic_read(struct omap_dmic *dmic, u16 reg) { - return __raw_readl(dmic->io_base + reg); + return readl_relaxed(dmic->io_base + reg); } static inline void omap_dmic_start(struct omap_dmic *dmic) diff --git a/sound/soc/omap/omap-mcpdm.c b/sound/soc/omap/omap-mcpdm.c index 90d2a7c..653ba1c 100644 --- a/sound/soc/omap/omap-mcpdm.c +++ b/sound/soc/omap/omap-mcpdm.c @@ -74,12 +74,12 @@ struct omap_mcpdm { static inline void omap_mcpdm_write(struct omap_mcpdm *mcpdm, u16 reg, u32 val) { - __raw_writel(val, mcpdm->io_base + reg); + writel_relaxed(val, mcpdm->io_base + reg); } static inline int omap_mcpdm_read(struct omap_mcpdm *mcpdm, u16 reg) { - return __raw_readl(mcpdm->io_base + reg); + return readl_relaxed(mcpdm->io_base + reg); } #ifdef DEBUG -- 1.7.9.5

5 4

[alsa-devel] alsa-lib changes in pcm file plugin
by Andrey Mazo 18 Nov '13

18 Nov '13

Hi, This short patch series contains three independent changes in pcm file plugin. The first two of them are trivial fixes and should not cause any behavior changes and regressions. The third one contains changes to make pcm_file.c access input/output files only when needed and thus to make its behavior more intuitive (from my point of view) (i.e., write to output file only on playback and read from input file only on capture). The patches should apply cleanly against current HEAD (ae035b7fe5620fcaf4f5ea33ecabcf93b8e056cd).

2 8

[alsa-devel] [PATCH 1/2] ASoC: wm8940: Convert to table based control and DAPM init
by Mark Brown 17 Nov '13

17 Nov '13

From: Mark Brown <broonie(a)linaro.org> Signed-off-by: Mark Brown <broonie(a)linaro.org> --- sound/soc/codecs/wm8940.c | 28 +++++++--------------------- 1 file changed, 7 insertions(+), 21 deletions(-) diff --git a/sound/soc/codecs/wm8940.c b/sound/soc/codecs/wm8940.c index b1591c6..4858b5c 100644 --- a/sound/soc/codecs/wm8940.c +++ b/sound/soc/codecs/wm8940.c @@ -264,7 +264,7 @@ static const struct snd_soc_dapm_widget wm8940_dapm_widgets[] = { SND_SOC_DAPM_INPUT("AUX"), }; -static const struct snd_soc_dapm_route audio_map[] = { +static const struct snd_soc_dapm_route wm8940_dapm_routes[] = { /* Mono output mixer */ {"Mono Mixer", "PCM Playback Switch", "DAC"}, {"Mono Mixer", "Aux Playback Switch", "Aux Input"}, @@ -296,21 +296,6 @@ static const struct snd_soc_dapm_route audio_map[] = { {"ADC", NULL, "Boost Mixer"}, }; -static int wm8940_add_widgets(struct snd_soc_codec *codec) -{ - struct snd_soc_dapm_context *dapm = &codec->dapm; - int ret; - - ret = snd_soc_dapm_new_controls(dapm, wm8940_dapm_widgets, - ARRAY_SIZE(wm8940_dapm_widgets)); - if (ret) - goto error_ret; - ret = snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map)); - -error_ret: - return ret; -} - #define wm8940_reset(c) snd_soc_write(c, WM8940_SOFTRESET, 0); static int wm8940_set_dai_fmt(struct snd_soc_dai *codec_dai, @@ -716,11 +701,6 @@ static int wm8940_probe(struct snd_soc_codec *codec) return ret; } - ret = snd_soc_add_codec_controls(codec, wm8940_snd_controls, - ARRAY_SIZE(wm8940_snd_controls)); - if (ret) - return ret; - ret = wm8940_add_widgets(codec); return ret; } @@ -736,6 +716,12 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8940 = { .suspend = wm8940_suspend, .resume = wm8940_resume, .set_bias_level = wm8940_set_bias_level, + .controls = wm8940_snd_controls, + .num_controls = ARRAY_SIZE(wm8940_snd_controls), + .dapm_widgets = wm8940_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(wm8940_dapm_widgets), + .dapm_routes = wm8940_dapm_routes, + .num_dapm_routes = ARRAY_SIZE(wm8940_dapm_routes), .reg_cache_size = ARRAY_SIZE(wm8940_reg_defaults), .reg_word_size = sizeof(u16), .reg_cache_default = wm8940_reg_defaults, -- 1.8.4.2

3 4

[alsa-devel] udev rules prefix
by Ivailo 17 Nov '13

17 Nov '13

Hello, the default prefix for alsa-utils is /usr however the udev rules directory is /lib/udev/rules.d thus on setups with separate partition for /usr the binaries, from /usr/bin and /usr/sbin, will likely not be available during the boot process and the udev rule will fail to restore the state. I suggest that the udev rules directory follows the prefix or append /usr to it to resolve this. Cheers!

4 12

[alsa-devel] [RFCv2] ASoC: Add support for BCM2835
by Florian Meier 16 Nov '13

16 Nov '13

This driver adds support for digital audio (I2S) for the BCM2835 SoC that is used by the Raspberry Pi. External audio codecs can be connected to the Raspberry Pi via P5 header. It relies on cyclic DMA engine support for BCM2835. Signed-off-by: Florian Meier <florian.meier(a)koalo.de> --- Second version. - snd_pcm_hardware struct was removed - now calculated by core. - FIFO address is now calculated from the device tree parameters. - In a case of over- or underrun, only the associated FIFO is cleared. According to the datasheet this might induce problems with channel swapping, but testing has shown no evidence. - dai->active is used instead of requesting state from hardware or building up own method. - Some minor fixes arch/arm/boot/dts/bcm2835.dtsi | 12 + sound/soc/Kconfig | 1 + sound/soc/Makefile | 1 + sound/soc/bcm/Kconfig | 15 + sound/soc/bcm/Makefile | 7 + sound/soc/bcm/bcm2835-i2s.c | 892 ++++++++++++++++++++++++++++++++++++++++ sound/soc/bcm/bcm2835-pcm.c | 52 +++ sound/soc/bcm/bcm2835-pcm.h | 29 ++ 8 files changed, 1009 insertions(+) create mode 100644 sound/soc/bcm/Kconfig create mode 100644 sound/soc/bcm/Makefile create mode 100644 sound/soc/bcm/bcm2835-i2s.c create mode 100644 sound/soc/bcm/bcm2835-pcm.c create mode 100644 sound/soc/bcm/bcm2835-pcm.h diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi index 7389405..facba9e 100644 --- a/arch/arm/boot/dts/bcm2835.dtsi +++ b/arch/arm/boot/dts/bcm2835.dtsi @@ -126,6 +126,18 @@ dma-requests = <32>; dma-channel-mask = <0x7f35>; }; + + bcm2835_i2s: i2s@7e203000 { + compatible = "brcm,bcm2835-i2s"; + reg = < 0x7e203000 0x20 + 0x7e101098 0x02>; + + dmas = <&dma 2 + &dma 3>; + dma-names = "tx", "rx"; + + status = "disabled"; + }; }; clocks { diff --git a/sound/soc/Kconfig b/sound/soc/Kconfig index 5138b84..a5e3a70 100644 --- a/sound/soc/Kconfig +++ b/sound/soc/Kconfig @@ -33,6 +33,7 @@ config SND_SOC_GENERIC_DMAENGINE_PCM # All the supported SoCs source "sound/soc/atmel/Kconfig" source "sound/soc/au1x/Kconfig" +source "sound/soc/bcm/Kconfig" source "sound/soc/blackfin/Kconfig" source "sound/soc/cirrus/Kconfig" source "sound/soc/davinci/Kconfig" diff --git a/sound/soc/Makefile b/sound/soc/Makefile index 8b9e701..b52d4aa 100644 --- a/sound/soc/Makefile +++ b/sound/soc/Makefile @@ -10,6 +10,7 @@ obj-$(CONFIG_SND_SOC) += codecs/ obj-$(CONFIG_SND_SOC) += generic/ obj-$(CONFIG_SND_SOC) += atmel/ obj-$(CONFIG_SND_SOC) += au1x/ +obj-$(CONFIG_SND_SOC) += bcm/ obj-$(CONFIG_SND_SOC) += blackfin/ obj-$(CONFIG_SND_SOC) += cirrus/ obj-$(CONFIG_SND_SOC) += davinci/ diff --git a/sound/soc/bcm/Kconfig b/sound/soc/bcm/Kconfig new file mode 100644 index 0000000..93619ec --- /dev/null +++ b/sound/soc/bcm/Kconfig @@ -0,0 +1,15 @@ +config SND_BCM2835_SOC_I2S + tristate + +config SND_BCM2835_SOC + tristate "SoC Audio support for the Broadcom BCM2835 I2S module" + depends on ARCH_BCM2835 + select SND_SOC_DMAENGINE_PCM + select DMADEVICES + select DMA_BCM2835 + select SND_SOC_GENERIC_DMAENGINE_PCM + select REGMAP_MMIO + help + Say Y or M if you want to add support for codecs attached to + the BCM2835 I2S interface. You will also need + to select the audio interfaces to support below. diff --git a/sound/soc/bcm/Makefile b/sound/soc/bcm/Makefile new file mode 100644 index 0000000..46d8cfb --- /dev/null +++ b/sound/soc/bcm/Makefile @@ -0,0 +1,7 @@ +# BCM2835 Platform Support +snd-soc-bcm2835-objs := bcm2835-pcm.o +snd-soc-bcm2835-i2s-objs := bcm2835-i2s.o + +obj-$(CONFIG_SND_BCM2835_SOC) += snd-soc-bcm2835.o +obj-$(CONFIG_SND_BCM2835_SOC_I2S) += snd-soc-bcm2835-i2s.o + diff --git a/sound/soc/bcm/bcm2835-i2s.c b/sound/soc/bcm/bcm2835-i2s.c new file mode 100644 index 0000000..5aae315 --- /dev/null +++ b/sound/soc/bcm/bcm2835-i2s.c @@ -0,0 +1,892 @@ +/* + * ALSA SoC I2S Audio Layer for Broadcom BCM2835 SoC + * + * Author: Florian Meier <florian.meier(a)koalo.de> + * Copyright 2013 + * + * based on + * Raspberry Pi PCM I2S ALSA Driver + * Copyright (c) by Phil Poole 2013 + * + * ALSA SoC I2S (McBSP) Audio Layer for TI DAVINCI processor + * Vladimir Barinov, <vbarinov(a)embeddedalley.com> + * Copyright (C) 2007 MontaVista Software, Inc., <source(a)mvista.com> + * + * OMAP ALSA SoC DAI driver using McBSP port + * Copyright (C) 2008 Nokia Corporation + * Contact: Jarkko Nikula <jarkko.nikula(a)bitmer.com> + * Peter Ujfalusi <peter.ujfalusi(a)ti.com> + * + * Freescale SSI ALSA SoC Digital Audio Interface (DAI) driver + * Author: Timur Tabi <timur(a)freescale.com> + * Copyright 2007-2010 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA + * 02110-1301 USA + * + */ + +#include <linux/init.h> +#include <linux/module.h> +#include <linux/device.h> +#include <linux/slab.h> +#include <linux/delay.h> +#include <linux/io.h> +#include <linux/clk.h> + +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/initval.h> +#include <sound/soc.h> +#include <sound/dmaengine_pcm.h> + +#include "bcm2835-pcm.h" + +/* Clock registers */ +#define BCM2835_CLK_PCMCTL_REG 0x00 +#define BCM2835_CLK_PCMDIV_REG 0x04 + +/* Clock register settings */ +#define BCM2835_CLK_PASSWD (0x5a000000) +#define BCM2835_CLK_PASSWD_MASK (0xff000000) +#define BCM2835_CLK_MASH(v) ((v) << 9) +#define BCM2835_CLK_FLIP (1 << 8) +#define BCM2835_CLK_BUSY (1 << 7) +#define BCM2835_CLK_KILL (1 << 5) +#define BCM2835_CLK_ENAB (1 << 4) +#define BCM2835_CLK_SRC(v) (v) + +#define BCM2835_CLK_DIVI(v) ((v) << 12) +#define BCM2835_CLK_DIVF(v) (v) + +enum { + BCM2835_CLK_MASH_0 = 0, + BCM2835_CLK_MASH_1, + BCM2835_CLK_MASH_2, + BCM2835_CLK_MASH_3, +}; + +enum { + BCM2835_CLK_SRC_GND = 0, + BCM2835_CLK_SRC_OSC, + BCM2835_CLK_SRC_DBG0, + BCM2835_CLK_SRC_DBG1, + BCM2835_CLK_SRC_PLLA, + BCM2835_CLK_SRC_PLLC, + BCM2835_CLK_SRC_PLLD, + BCM2835_CLK_SRC_HDMI, +}; + +/* Most clocks are not useable (freq = 0) */ +static const unsigned int bcm2835_clk_freq[BCM2835_CLK_SRC_HDMI+1] = { + [BCM2835_CLK_SRC_GND] = 0, + [BCM2835_CLK_SRC_OSC] = 19200000, + [BCM2835_CLK_SRC_DBG0] = 0, + [BCM2835_CLK_SRC_DBG1] = 0, + [BCM2835_CLK_SRC_PLLA] = 0, + [BCM2835_CLK_SRC_PLLC] = 0, + [BCM2835_CLK_SRC_PLLD] = 500000000, + [BCM2835_CLK_SRC_HDMI] = 0, +}; + +/* I2S registers */ +#define BCM2835_I2S_CS_A_REG 0x00 +#define BCM2835_I2S_FIFO_A_REG 0x04 +#define BCM2835_I2S_MODE_A_REG 0x08 +#define BCM2835_I2S_RXC_A_REG 0x0c +#define BCM2835_I2S_TXC_A_REG 0x10 +#define BCM2835_I2S_DREQ_A_REG 0x14 +#define BCM2835_I2S_INTEN_A_REG 0x18 +#define BCM2835_I2S_INTSTC_A_REG 0x1c +#define BCM2835_I2S_GRAY_REG 0x20 + +/* I2S register settings */ +#define BCM2835_I2S_STBY (1 << 25) +#define BCM2835_I2S_SYNC (1 << 24) +#define BCM2835_I2S_RXSEX (1 << 23) +#define BCM2835_I2S_RXF (1 << 22) +#define BCM2835_I2S_TXE (1 << 21) +#define BCM2835_I2S_RXD (1 << 20) +#define BCM2835_I2S_TXD (1 << 19) +#define BCM2835_I2S_RXR (1 << 18) +#define BCM2835_I2S_TXW (1 << 17) +#define BCM2835_I2S_CS_RXERR (1 << 16) +#define BCM2835_I2S_CS_TXERR (1 << 15) +#define BCM2835_I2S_RXSYNC (1 << 14) +#define BCM2835_I2S_TXSYNC (1 << 13) +#define BCM2835_I2S_DMAEN (1 << 9) +#define BCM2835_I2S_RXTHR(v) ((v) << 7) +#define BCM2835_I2S_TXTHR(v) ((v) << 5) +#define BCM2835_I2S_RXCLR (1 << 4) +#define BCM2835_I2S_TXCLR (1 << 3) +#define BCM2835_I2S_TXON (1 << 2) +#define BCM2835_I2S_RXON (1 << 1) +#define BCM2835_I2S_EN (1) + +#define BCM2835_I2S_CLKDIS (1 << 28) +#define BCM2835_I2S_PDMN (1 << 27) +#define BCM2835_I2S_PDME (1 << 26) +#define BCM2835_I2S_FRXP (1 << 25) +#define BCM2835_I2S_FTXP (1 << 24) +#define BCM2835_I2S_CLKM (1 << 23) +#define BCM2835_I2S_CLKI (1 << 22) +#define BCM2835_I2S_FSM (1 << 21) +#define BCM2835_I2S_FSI (1 << 20) +#define BCM2835_I2S_FLEN(v) ((v) << 10) +#define BCM2835_I2S_FSLEN(v) (v) + +#define BCM2835_I2S_CHWEX (1 << 15) +#define BCM2835_I2S_CHEN (1 << 14) +#define BCM2835_I2S_CHPOS(v) ((v) << 4) +#define BCM2835_I2S_CHWID(v) (v) +#define BCM2835_I2S_CH1(v) ((v) << 16) +#define BCM2835_I2S_CH2(v) (v) + +#define BCM2835_I2S_TX_PANIC(v) ((v) << 24) +#define BCM2835_I2S_RX_PANIC(v) ((v) << 16) +#define BCM2835_I2S_TX(v) ((v) << 8) +#define BCM2835_I2S_RX(v) (v) + +#define BCM2835_I2S_INT_RXERR (1 << 3) +#define BCM2835_I2S_INT_TXERR (1 << 2) +#define BCM2835_I2S_INT_RXR (1 << 1) +#define BCM2835_I2S_INT_TXW (1 << 0) + +/* I2S DMA interface */ +/* FIXME: Needs IOMMU support */ +#define BCM2835_VCMMU_SHIFT (0x7E000000 - 0x20000000) + +/* General device struct */ +struct bcm2835_i2s_dev { + struct device *dev; + struct snd_dmaengine_dai_dma_data dma_data[2]; + unsigned int fmt; + + struct regmap *i2s_regmap; + struct regmap *clk_regmap; +}; + +static void bcm2835_i2s_start_clock(struct bcm2835_i2s_dev *dev) +{ + /* + * Start the clock if in master mode. + */ + unsigned int master = dev->fmt & SND_SOC_DAIFMT_MASTER_MASK; + + switch (master) { + case SND_SOC_DAIFMT_CBS_CFS: + case SND_SOC_DAIFMT_CBS_CFM: + regmap_update_bits(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, + BCM2835_CLK_PASSWD_MASK | BCM2835_CLK_ENAB, + BCM2835_CLK_PASSWD | BCM2835_CLK_ENAB); + break; + default: + break; + } +} + +static void bcm2835_i2s_stop_clock(struct bcm2835_i2s_dev *dev) +{ + uint32_t clkreg; + int timeout = 1000; + + /* stop clock */ + regmap_update_bits(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, + BCM2835_CLK_PASSWD_MASK | BCM2835_CLK_ENAB, + BCM2835_CLK_PASSWD); + + /* wait for the BUSY flag going down */ + while (timeout > 0) { + timeout--; + + regmap_read(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, &clkreg); + if (!(clkreg & BCM2835_CLK_BUSY)) + break; + } + + if (timeout <= 0) { + /* KILL the clock */ + dev_err(dev->dev, "I2S clock didn't stop. Kill the clock!\n"); + regmap_update_bits(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, + BCM2835_CLK_KILL | BCM2835_CLK_PASSWD_MASK, + BCM2835_CLK_KILL | BCM2835_CLK_PASSWD); + } +} + +static void bcm2835_i2s_clear_fifos(struct bcm2835_i2s_dev *dev, + bool tx, bool rx) +{ + int timeout = 1000; + uint32_t syncval; + uint32_t csreg; + uint32_t i2s_active_state; + uint32_t clkreg; + uint32_t clk_active_state; + uint32_t off; + uint32_t clr; + + off = tx ? BCM2835_I2S_TXON : 0; + off |= rx ? BCM2835_I2S_RXON : 0; + + clr = tx ? BCM2835_I2S_TXCLR : 0; + clr |= rx ? BCM2835_I2S_RXCLR : 0; + + /* Backup the current state */ + regmap_read(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, &csreg); + i2s_active_state = csreg & (BCM2835_I2S_RXON | BCM2835_I2S_TXON); + + regmap_read(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, &clkreg); + clk_active_state = clkreg & BCM2835_CLK_ENAB; + + /* Start clock if not running */ + if (!clk_active_state) { + regmap_update_bits(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, + BCM2835_CLK_PASSWD_MASK | BCM2835_CLK_ENAB, + BCM2835_CLK_PASSWD | BCM2835_CLK_ENAB); + } + + /* Stop I2S module */ + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, off, 0); + + /* + * Clear the FIFOs + * Requires at least 2 PCM clock cycles to take effect + */ + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, clr, -1); + + /* Wait for 2 PCM clock cycles */ + + /* + * Toggle the SYNC flag - after 2 PCM clock cycles it can be read back + * FIXME: This does not seem to work for slave mode! + */ + regmap_read(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, &syncval); + syncval &= BCM2835_I2S_SYNC; + + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, + BCM2835_I2S_SYNC, ~syncval); + + /* Wait for the SYNC flag changing it's state */ + while (timeout > 0) { + timeout--; + + regmap_read(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, &csreg); + if ((csreg & BCM2835_I2S_SYNC) != syncval) + break; + } + + if (timeout <= 0) + dev_err(dev->dev, "I2S SYNC error!\n"); + + /* Stop clock if it was not running before */ + if (!clk_active_state) + bcm2835_i2s_stop_clock(dev); + + /* Restore I2S state */ + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, + BCM2835_I2S_RXON | BCM2835_I2S_TXON, i2s_active_state); +} + +static int bcm2835_i2s_set_dai_fmt(struct snd_soc_dai *dai, + unsigned int fmt) +{ + struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); + dev->fmt = fmt; + return 0; +} + +static int bcm2835_i2s_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); + + unsigned int sampling_rate = params_rate(params); + unsigned int data_length, data_delay, half_frame; + unsigned int ch1pos, ch2pos, mode, format; + unsigned int mash = BCM2835_CLK_MASH_1; + unsigned int divi, divf, target_frequency; + int clk_src = -1; + unsigned int master = dev->fmt & SND_SOC_DAIFMT_MASTER_MASK; + uint32_t bit_master = (master == SND_SOC_DAIFMT_CBS_CFS + || master == SND_SOC_DAIFMT_CBS_CFM); + + uint32_t frame_master = (master == SND_SOC_DAIFMT_CBS_CFS + || master == SND_SOC_DAIFMT_CBM_CFS); + uint32_t csreg; + + /* + * If a stream is already enabled, + * the registers are already set properly. + */ + regmap_read(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, &csreg); + + if (csreg & (BCM2835_I2S_TXON | BCM2835_I2S_RXON)) + return 0; + + /* + * Adjust the data length according to the format. + * We prefill the half frame length with an integer + * divider of 2400 as explained at the clock settings. + * Maybe it is overwritten there, if the Integer mode + * does not apply. + */ + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_S16_LE: + data_length = 16; + half_frame = 20; + break; + case SNDRV_PCM_FORMAT_S32_LE: + data_length = 32; + half_frame = 40; + break; + default: + return -EINVAL; + } + + /* + * Clock Settings + * + * The target frequency of the bit clock is + * sampling rate * frame length + * + * Integer mode: + * Sampling rates that are multiples of 8000 kHz + * can be driven by the oscillator of 19.2 MHz + * with an integer divider as long as the frame length + * is an integer divider of 19200000/8000=2400 as set up above. + * This is no longer possible if the sampling rate + * is too high (e.g. 192 kHz), because the oscillator is too slow. + * + * MASH mode: + * For all other sampling rates, it is not possible to + * have an integer divider. Approximate the clock + * with the MASH module that induces a slight frequency + * variance. To minimize that it is best to have the fastest + * clock here. That is PLLD with 500 MHz. + */ + target_frequency = sampling_rate*half_frame*2; + clk_src = BCM2835_CLK_SRC_OSC; + mash = BCM2835_CLK_MASH_0; + + if (bcm2835_clk_freq[clk_src] % target_frequency == 0 + && bit_master && frame_master) { + divi = bcm2835_clk_freq[clk_src]/target_frequency; + divf = 0; + } else { + uint64_t dividend; + + /* + * Overwrite half frame length, because the + * above trick is not needed. + * This is fixed, because a bit clock of 64*fs + * seems to be what most codecs want. + * Is it necessary to have this dynamic? + */ + half_frame = 32; + target_frequency = sampling_rate*half_frame*2; + + clk_src = BCM2835_CLK_SRC_PLLD; + mash = BCM2835_CLK_MASH_1; + + dividend = bcm2835_clk_freq[clk_src]; + dividend *= 1024; + do_div(dividend, target_frequency); + divi = dividend / 1024; + divf = dividend % 1024; + } + + /* Set clock divider */ + regmap_write(dev->clk_regmap, BCM2835_CLK_PCMDIV_REG, BCM2835_CLK_PASSWD + | BCM2835_CLK_DIVI(divi) + | BCM2835_CLK_DIVF(divf)); + + /* Setup clock, but don't start it yet */ + regmap_write(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, BCM2835_CLK_PASSWD + | BCM2835_CLK_MASH(mash) + | BCM2835_CLK_SRC(clk_src)); + + /* Setup the frame format */ + format = BCM2835_I2S_CHEN; + + if (data_length > 24) + format |= BCM2835_I2S_CHWEX; + + format |= BCM2835_I2S_CHWID((data_length-8)&0xf); + + switch (dev->fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + data_delay = 1; + break; + default: + /* TODO + * Others are possible but are not implemented at the moment. + */ + dev_err(dev->dev, "%s:bad format\n", __func__); + return -EINVAL; + } + + ch1pos = data_delay; + ch2pos = half_frame+data_delay; + + switch (params_channels(params)) { + case 2: + format = BCM2835_I2S_CH1(format) | BCM2835_I2S_CH2(format); + format |= BCM2835_I2S_CH1(BCM2835_I2S_CHPOS(ch1pos)); + format |= BCM2835_I2S_CH2(BCM2835_I2S_CHPOS(ch2pos)); + break; + default: + return -EINVAL; + } + + /* + * Set format for both streams. + * We cannot set another frame length + * (and therefore word length) anyway, + * so the format will be the same. + */ + regmap_write(dev->i2s_regmap, BCM2835_I2S_RXC_A_REG, format); + regmap_write(dev->i2s_regmap, BCM2835_I2S_TXC_A_REG, format); + + /* Setup the I2S mode */ + mode = 0; + + if (data_length <= 16) { + /* + * Use frame packed mode (2 channels per 32 bit word) + * We cannot set another frame length in the second stream + * (and therefore word length) anyway, + * so the format will be the same. + */ + mode |= BCM2835_I2S_FTXP | BCM2835_I2S_FRXP; + } + + mode |= BCM2835_I2S_FLEN(half_frame*2-1); + mode |= BCM2835_I2S_FSLEN(half_frame); + + /* master or slave? */ + switch (dev->fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBS_CFS: + /* cpu is master */ + break; + case SND_SOC_DAIFMT_CBM_CFS: + /* + * codec is bit clock master + * cpu is frame master + */ + mode |= BCM2835_I2S_CLKM; + break; + case SND_SOC_DAIFMT_CBS_CFM: + /* + * codec is frame master + * cpu is bit clock master + */ + mode |= BCM2835_I2S_FSM; + break; + case SND_SOC_DAIFMT_CBM_CFM: + /* codec is master */ + mode |= BCM2835_I2S_CLKM; + mode |= BCM2835_I2S_FSM; + break; + default: + dev_err(dev->dev, "%s:bad master\n", __func__); + return -EINVAL; + } + + /* + * Invert clocks? + * + * The BCM approach seems to be inverted to the classical I2S approach. + */ + switch (dev->fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + /* none - therefore, both for BCM */ + mode |= BCM2835_I2S_CLKI; + mode |= BCM2835_I2S_FSI; + break; + case SND_SOC_DAIFMT_IB_IF: + /* both - therefore, none for BCM*/ + break; + case SND_SOC_DAIFMT_NB_IF: + /* + * invert only frame sync - therefore, + * invert only bit clock for BCM + */ + mode |= BCM2835_I2S_CLKI; + break; + case SND_SOC_DAIFMT_IB_NF: + /* + * invert only bit clock - therefore, + * invert only frame sync for BCM + */ + mode |= BCM2835_I2S_FSI; + break; + default: + return -EINVAL; + } + + regmap_write(dev->i2s_regmap, BCM2835_I2S_MODE_A_REG, mode); + + + /* Setup the DMA parameters */ + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, + BCM2835_I2S_RXTHR(1) + | BCM2835_I2S_TXTHR(1) + | BCM2835_I2S_DMAEN, -1); + + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_DREQ_A_REG, + BCM2835_I2S_TX_PANIC(0x10) + | BCM2835_I2S_RX_PANIC(0x30) + | BCM2835_I2S_TX(0x30) + | BCM2835_I2S_RX(0x20), -1); + + /* Clear FIFOs */ + bcm2835_i2s_clear_fifos(dev, true, true); + + return 0; +} + + +static int bcm2835_i2s_prepare(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); + uint32_t cs_reg; + + bcm2835_i2s_start_clock(dev); + + /* + * Clear both FIFOs if the one that should be started + * is not empty at the moment. This should only happen + * after overrun. Otherwise, hw_params would have cleared + * the FIFO. + */ + regmap_read(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, &cs_reg); + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK + && !(cs_reg & BCM2835_I2S_TXE)) + bcm2835_i2s_clear_fifos(dev, true, false); + else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE + && (cs_reg & BCM2835_I2S_RXD)) + bcm2835_i2s_clear_fifos(dev, false, true); + + return 0; +} + +static void bcm2835_i2s_stop(struct bcm2835_i2s_dev *dev, + struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + uint32_t mask; + + if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) + mask = BCM2835_I2S_RXON; + else + mask = BCM2835_I2S_TXON; + + regmap_update_bits(dev->i2s_regmap, + BCM2835_I2S_CS_A_REG, mask, 0); + + /* Stop also the clock when not SND_SOC_DAIFMT_CONT */ + if (!dai->active && !(dev->fmt & SND_SOC_DAIFMT_CONT)) + bcm2835_i2s_stop_clock(dev); + +} + +static int bcm2835_i2s_trigger(struct snd_pcm_substream *substream, int cmd, + struct snd_soc_dai *dai) +{ + struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); + uint32_t mask; + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + case SNDRV_PCM_TRIGGER_RESUME: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + bcm2835_i2s_start_clock(dev); + + if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) + mask = BCM2835_I2S_RXON; + else + mask = BCM2835_I2S_TXON; + + regmap_update_bits(dev->i2s_regmap, + BCM2835_I2S_CS_A_REG, mask, mask); + break; + + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + bcm2835_i2s_stop(dev, substream, dai); + break; + default: + return -EINVAL; + } + + return 0; +} + +static int bcm2835_i2s_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); + + if (!dai->active) { + /* should this still be running stop it */ + bcm2835_i2s_stop_clock(dev); + + /* enable PCM block */ + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, + BCM2835_I2S_EN, -1); + + /* + * Disable STBY + * Requires at least 4 PCM clock cycles to take effect + */ + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, + BCM2835_I2S_STBY, -1); + } + + return 0; +} + +static void bcm2835_i2s_shutdown(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); + + bcm2835_i2s_stop(dev, substream, dai); + + /* If both streams are stopped, disable module and clock */ + if (!dai->active) { + /* Disable the module */ + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, + BCM2835_I2S_EN, 0); + + /* + * Stopping clock is necessary, because stop does + * not stop the clock when SND_SOC_DAIFMT_CONT + */ + bcm2835_i2s_stop_clock(dev); + } +} + +static const struct snd_soc_dai_ops bcm2835_i2s_dai_ops = { + .startup = bcm2835_i2s_startup, + .shutdown = bcm2835_i2s_shutdown, + .prepare = bcm2835_i2s_prepare, + .trigger = bcm2835_i2s_trigger, + .hw_params = bcm2835_i2s_hw_params, + .set_fmt = bcm2835_i2s_set_dai_fmt, +}; + +static int bcm2835_i2s_dai_probe(struct snd_soc_dai *dai) +{ + struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); + + dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK].addr_width = + DMA_SLAVE_BUSWIDTH_4_BYTES; + dev->dma_data[SNDRV_PCM_STREAM_CAPTURE].addr_width = + DMA_SLAVE_BUSWIDTH_4_BYTES; + + /* TODO other burst parameters possible? */ + dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK].maxburst = 2; + dev->dma_data[SNDRV_PCM_STREAM_CAPTURE].maxburst = 2; + + dai->playback_dma_data = &dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK]; + dai->capture_dma_data = &dev->dma_data[SNDRV_PCM_STREAM_CAPTURE]; + + return 0; +} + +static struct snd_soc_dai_driver bcm2835_i2s_dai = { + .name = "bcm2835-i2s", + .probe = bcm2835_i2s_dai_probe, + .playback = { + .channels_min = 2, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000_192000, + .formats = SNDRV_PCM_FMTBIT_S16_LE + | SNDRV_PCM_FMTBIT_S32_LE + }, + .capture = { + .channels_min = 2, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000_192000, + .formats = SNDRV_PCM_FMTBIT_S16_LE + | SNDRV_PCM_FMTBIT_S32_LE + }, + .ops = &bcm2835_i2s_dai_ops, + .symmetric_rates = 1 +}; + +static bool bcm2835_i2s_volatile_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case BCM2835_I2S_CS_A_REG: + case BCM2835_I2S_FIFO_A_REG: + case BCM2835_I2S_INTSTC_A_REG: + case BCM2835_I2S_GRAY_REG: + return true; + default: + return false; + }; +} + +static bool bcm2835_i2s_precious_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case BCM2835_I2S_FIFO_A_REG: + return true; + default: + return false; + }; +} + +static bool bcm2835_clk_volatile_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case BCM2835_CLK_PCMCTL_REG: + return true; + default: + return false; + }; +} + +static const struct regmap_config bcm2835_regmap_config[] = { + { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + .max_register = BCM2835_I2S_GRAY_REG, + .precious_reg = bcm2835_i2s_precious_reg, + .volatile_reg = bcm2835_i2s_volatile_reg, + .cache_type = REGCACHE_RBTREE, + }, + { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + .max_register = BCM2835_CLK_PCMDIV_REG, + .volatile_reg = bcm2835_clk_volatile_reg, + .cache_type = REGCACHE_RBTREE, + }, +}; + +static const struct snd_soc_component_driver bcm2835_i2s_component = { + .name = "bcm2835-i2s-comp", +}; + +static int bcm2835_i2s_probe(struct platform_device *pdev) +{ + struct bcm2835_i2s_dev *dev; + int i; + int ret; + struct regmap *regmap[2]; + struct resource *mem[2]; + + /* request both ioareas */ + for (i = 0; i <= 1; i++) { + void __iomem *base; + + mem[i] = platform_get_resource(pdev, IORESOURCE_MEM, i); + if (!mem[i]) { + dev_err(&pdev->dev, "I2S probe: Memory resource could not be found.\n"); + return -ENODEV; + } + + base = devm_ioremap_resource(&pdev->dev, mem[i]); + if (!base) { + dev_err(&pdev->dev, "I2S probe: ioremap failed.\n"); + return -ENOMEM; + } + + regmap[i] = devm_regmap_init_mmio(&pdev->dev, base, + &bcm2835_regmap_config[i]); + if (IS_ERR(regmap[i])) { + dev_err(&pdev->dev, "I2S probe: regmap init failed\n"); + return PTR_ERR(regmap[i]); + } + } + + dev = devm_kzalloc(&pdev->dev, sizeof(struct bcm2835_i2s_dev), + GFP_KERNEL); + if (!dev) { + dev_err(&pdev->dev, "I2S probe: kzalloc failed.\n"); + return -ENOMEM; + } + + dev->i2s_regmap = regmap[0]; + dev->clk_regmap = regmap[1]; + + /* Set the DMA address */ + dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK].addr = + (dma_addr_t)mem[0]->start + BCM2835_I2S_FIFO_A_REG + + BCM2835_VCMMU_SHIFT; + + dev->dma_data[SNDRV_PCM_STREAM_CAPTURE].addr = + (dma_addr_t)mem[0]->start + BCM2835_I2S_FIFO_A_REG + + BCM2835_VCMMU_SHIFT; + + /* Store the pdev */ + dev->dev = &pdev->dev; + dev_set_drvdata(&pdev->dev, dev); + + ret = snd_soc_register_component(&pdev->dev, + &bcm2835_i2s_component, &bcm2835_i2s_dai, 1); + + if (ret) { + dev_err(&pdev->dev, "Could not register DAI: %d\n", ret); + ret = -ENOMEM; + return ret; + } + + ret = bcm2835_pcm_platform_register(&pdev->dev); + if (ret) { + dev_err(&pdev->dev, "Could not register PCM: %d\n", ret); + snd_soc_unregister_component(&pdev->dev); + return ret; + } + + return 0; +} + +static const struct of_device_id bcm2835_i2s_of_match[] = { + { .compatible = "brcm,bcm2835-i2s", }, + {}, +}; + +static int bcm2835_i2s_remove(struct platform_device *pdev) +{ + bcm2835_pcm_platform_unregister(&pdev->dev); + snd_soc_unregister_component(&pdev->dev); + return 0; +} + +static struct platform_driver bcm2835_i2s_driver = { + .probe = bcm2835_i2s_probe, + .remove = bcm2835_i2s_remove, + .driver = { + .name = "bcm2835-i2s", + .owner = THIS_MODULE, + .of_match_table = bcm2835_i2s_of_match, + }, +}; + +module_platform_driver(bcm2835_i2s_driver); + +MODULE_AUTHOR("Florian Meier"); +MODULE_DESCRIPTION("BCM2835 I2S Interface"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/bcm/bcm2835-pcm.c b/sound/soc/bcm/bcm2835-pcm.c new file mode 100644 index 0000000..c4dc12ea --- /dev/null +++ b/sound/soc/bcm/bcm2835-pcm.c @@ -0,0 +1,52 @@ +/* + * ALSA PCM interface for Broadcom BCM2835 SoC + * + * Author: Florian Meier <florian.meier(a)koalo.de> + * Copyright 2013 + * + * based on + * ALSA PCM interface for the OMAP SoC + * Copyright (C) 2008 Nokia Corporation + * Contact: Jarkko Nikula <jarkko.nikula(a)bitmer.com> + * Peter Ujfalusi <peter.ujfalusi(a)ti.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA + * 02110-1301 USA + * + */ + +#include <linux/module.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/soc.h> +#include <sound/dmaengine_pcm.h> + +#include "bcm2835-pcm.h" + +int bcm2835_pcm_platform_register(struct device *dev) +{ + return snd_dmaengine_pcm_register(dev, NULL, 0); +} +EXPORT_SYMBOL_GPL(bcm2835_pcm_platform_register); + +void bcm2835_pcm_platform_unregister(struct device *dev) +{ + snd_dmaengine_pcm_unregister(dev); +} +EXPORT_SYMBOL_GPL(bcm2835_pcm_platform_unregister); + +MODULE_AUTHOR("Florian Meier"); +MODULE_DESCRIPTION("BCM2835 PCM ASoC driver"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/bcm/bcm2835-pcm.h b/sound/soc/bcm/bcm2835-pcm.h new file mode 100644 index 0000000..07a70ca --- /dev/null +++ b/sound/soc/bcm/bcm2835-pcm.h @@ -0,0 +1,29 @@ +/* + * ALSA PCM interface for Broadcom BCM2835 SoC + * + * Author: Florian Meier <florian.meier(a)koalo.de> + * Copyright 2013 + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA + * 02110-1301 USA + * + */ + +#ifndef __BCM2835_PCM_H__ +#define __BCM2835_PCM_H__ + +int bcm2835_pcm_platform_register(struct device *dev); +void bcm2835_pcm_platform_unregister(struct device *dev); + +#endif -- 1.7.9.5

2 1

[alsa-devel] ASoC fixes for v3.13
by Mark Brown 16 Nov '13

16 Nov '13

The following changes since commit a894bd7fb539d671149fea9420c94c0fbe6baf7a: ASoC: generic-dmaengine-pcm: Clear slave_config memory (2013-11-07 11:35:30 +0000) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git tags/asoc-v3.13-4 for you to fetch changes up to a190f7867e1830a2d4c890c00b27465b863f5f59: Merge remote-tracking branch 'asoc/fix/wm8962' into asoc-linus (2013-11-15 10:20:16 +0000) The diffstat is inflated by some of the branches being based on v3.12. For the next release cycle I think I'm going to start basing most things on -rc1 to cut down on this. ---------------------------------------------------------------- ASoC: Fixes for v3.13 A few fixes in drivers, the i.MX and wm8962 fixes are for a pretty nasty issues for users of those drivers if they run into them. ---------------------------------------------------------------- Brian Austin (1): ASoC: cs42l52: Correct MIC CTL mask Charles Keepax (1): ASoC: wm8997: Correct typo in ISRC mux routes Mark Brown (6): Merge remote-tracking branch 'asoc/fix/arizona' into asoc-linus Merge remote-tracking branch 'asoc/fix/blackfin' into asoc-linus Merge remote-tracking branch 'asoc/fix/cs42l52' into asoc-linus Merge remote-tracking branch 'asoc/fix/dma' into asoc-linus Merge remote-tracking branch 'asoc/fix/fsl' into asoc-linus Merge remote-tracking branch 'asoc/fix/wm8962' into asoc-linus Nicolin Chen (1): ASoC: wm8962: Turn on regcache_cache_only before disabling regulator Oskar Schirmer (1): ASoC: fsl: imx-pcm-fiq: omit fiq counter to avoid harm in unbalanced situations Richard Fitzgerald (1): ASoC: arizona: Fix typo in name of EQ coefficient controls Takashi Iwai (1): ASoC: blackfin: Fix missing break Documentation/ABI/stable/sysfs-bus-usb | 8 +- Documentation/ABI/testing/sysfs-devices-power | 32 +- Documentation/ABI/testing/sysfs-power | 22 +- Documentation/acpi/dsdt-override.txt | 2 +- Documentation/connector/ucon.c | 2 +- Documentation/devicetree/bindings/memory.txt | 168 ------ .../devicetree/bindings/sound/cs42l73.txt | 22 + .../bindings/sound/davinci-evm-audio.txt | 42 ++ .../bindings/sound/davinci-mcasp-audio.txt | 41 +- .../devicetree/bindings/sound/tlv320aic3x.txt | 26 + .../devicetree/bindings/sound/tpa6130a2.txt | 27 + Documentation/sound/alsa/soc/DPCM.txt | 380 +++++++++++++ Documentation/sound/alsa/soc/codec.txt | 46 +- Documentation/sound/alsa/soc/dapm.txt | 71 ++- Documentation/sound/alsa/soc/machine.txt | 6 +- Documentation/sound/alsa/soc/platform.txt | 19 +- MAINTAINERS | 171 +++--- Makefile | 2 +- arch/arc/mm/fault.c | 6 +- arch/arm/boot/dts/integratorcp.dts | 9 +- arch/arm/common/mcpm_entry.c | 6 +- arch/arm/common/sharpsl_param.c | 5 +- arch/arm/include/asm/Kbuild | 1 - arch/arm/include/asm/mcpm.h | 14 +- arch/arm/include/asm/syscall.h | 6 + arch/arm/kernel/head.S | 21 +- arch/arm/mm/dma-mapping.c | 43 +- arch/arm/mm/init.c | 3 - arch/arm/net/bpf_jit_32.c | 1 + arch/mips/kernel/perf_event_mipsxx.c | 4 +- arch/mips/mti-malta/malta-int.c | 9 +- arch/mips/ralink/timer.c | 2 +- arch/parisc/configs/712_defconfig | 2 + arch/parisc/configs/a500_defconfig | 2 + arch/parisc/configs/b180_defconfig | 3 + arch/parisc/configs/c3000_defconfig | 3 + arch/parisc/configs/c8000_defconfig | 2 + arch/parisc/configs/default_defconfig | 2 + arch/parisc/kernel/cache.c | 1 - arch/parisc/kernel/head.S | 4 + arch/powerpc/net/bpf_jit_comp.c | 1 + arch/s390/include/asm/pgtable.h | 4 +- arch/s390/include/asm/timex.h | 28 +- arch/s390/kernel/compat_signal.c | 4 +- arch/s390/kernel/debug.c | 2 +- arch/s390/kvm/interrupt.c | 6 +- arch/s390/lib/delay.c | 14 +- arch/s390/net/bpf_jit_comp.c | 4 +- arch/sparc/net/bpf_jit_comp.c | 1 + arch/um/kernel/exitcode.c | 4 +- arch/x86/Kconfig | 1 + arch/x86/include/asm/percpu.h | 3 +- arch/x86/kernel/apic/x2apic_uv_x.c | 2 +- arch/x86/kernel/cpu/perf_event.c | 6 +- arch/x86/kernel/kvm.c | 19 +- arch/x86/kernel/nmi.c | 4 +- arch/x86/net/bpf_jit_comp.c | 18 +- arch/x86/xen/smp.c | 9 + arch/xtensa/kernel/entry.S | 49 +- arch/xtensa/kernel/signal.c | 2 +- arch/xtensa/platforms/iss/network.c | 3 +- block/partitions/efi.c | 7 +- drivers/acpi/Kconfig | 8 +- drivers/acpi/device_pm.c | 56 -- drivers/acpi/power.c | 104 +--- drivers/acpi/scan.c | 1 - drivers/ata/ahci.c | 2 +- drivers/ata/ahci_platform.c | 2 +- drivers/ata/libahci.c | 10 +- drivers/ata/libata-acpi.c | 14 - drivers/ata/libata-eh.c | 6 +- drivers/ata/libata-scsi.c | 3 - drivers/ata/libata.h | 4 - drivers/ata/pata_isapnp.c | 2 +- drivers/base/memory.c | 7 +- drivers/base/regmap/internal.h | 8 +- drivers/base/regmap/regcache.c | 3 +- drivers/base/regmap/regmap.c | 294 ++++++++-- drivers/char/tpm/xen-tpmfront.c | 1 + drivers/clk/clk-nomadik.c | 21 + drivers/clk/mvebu/armada-370.c | 4 +- drivers/clk/socfpga/clk.c | 2 +- drivers/clk/versatile/clk-icst.c | 2 +- drivers/connector/cn_proc.c | 18 + drivers/connector/connector.c | 9 +- drivers/cpufreq/acpi-cpufreq.c | 8 +- drivers/cpufreq/intel_pstate.c | 52 +- drivers/cpufreq/s3c64xx-cpufreq.c | 2 +- drivers/dma/edma.c | 2 + drivers/gpio/gpio-lynxpoint.c | 5 +- drivers/gpio/gpiolib.c | 6 +- drivers/gpu/drm/drm_drv.c | 11 +- drivers/gpu/drm/i915/i915_drv.c | 5 +- drivers/gpu/drm/i915/i915_drv.h | 8 +- drivers/gpu/drm/i915/i915_gem_gtt.c | 109 +++- drivers/gpu/drm/i915/i915_reg.h | 6 + drivers/gpu/drm/i915/intel_crt.c | 28 +- drivers/gpu/drm/i915/intel_ddi.c | 21 +- drivers/gpu/drm/i915/intel_display.c | 131 +++-- drivers/gpu/drm/i915/intel_dp.c | 20 + drivers/gpu/drm/i915/intel_drv.h | 2 + drivers/gpu/drm/i915/intel_lvds.c | 16 + drivers/gpu/drm/i915/intel_pm.c | 4 +- drivers/gpu/drm/radeon/atombios_encoders.c | 54 +- drivers/gpu/drm/radeon/cik.c | 4 + drivers/gpu/drm/radeon/dce6_afmt.c | 3 + drivers/gpu/drm/radeon/evergreen_hdmi.c | 4 + drivers/gpu/drm/radeon/kv_dpm.c | 2 +- drivers/gpu/drm/radeon/ni.c | 1 + drivers/gpu/drm/radeon/r600.c | 1 + drivers/gpu/drm/radeon/r600_hdmi.c | 3 + drivers/gpu/drm/radeon/radeon.h | 4 +- drivers/gpu/drm/radeon/radeon_connectors.c | 33 +- drivers/gpu/drm/radeon/radeon_cs.c | 3 +- drivers/gpu/drm/radeon/radeon_drv.c | 4 +- drivers/gpu/drm/radeon/radeon_uvd.c | 3 +- drivers/gpu/drm/radeon/si.c | 1 + drivers/gpu/drm/radeon/uvd_v1_0.c | 4 +- drivers/gpu/drm/vmwgfx/vmwgfx_drv.c | 17 +- drivers/gpu/drm/vmwgfx/vmwgfx_resource.c | 2 +- drivers/hid/hid-core.c | 12 +- drivers/hid/hid-ids.h | 6 + drivers/hid/hid-input.c | 13 +- drivers/hid/hid-wiimote-core.c | 5 +- drivers/hid/usbhid/hid-quirks.c | 3 + drivers/iio/frequency/adf4350.c | 6 +- drivers/iio/industrialio-buffer.c | 3 + drivers/infiniband/Kconfig | 11 + drivers/infiniband/core/uverbs.h | 2 + drivers/infiniband/core/uverbs_cmd.c | 4 + drivers/infiniband/core/uverbs_main.c | 6 + drivers/infiniband/hw/amso1100/c2_ae.c | 2 +- drivers/infiniband/hw/mlx4/main.c | 2 + drivers/infiniband/hw/mlx5/main.c | 16 +- drivers/infiniband/hw/mlx5/mr.c | 70 ++- drivers/infiniband/hw/mlx5/qp.c | 80 +-- drivers/infiniband/hw/mlx5/srq.c | 4 +- drivers/infiniband/hw/mthca/mthca_eq.c | 2 +- drivers/infiniband/hw/ocrdma/ocrdma_hw.c | 6 +- drivers/infiniband/hw/ocrdma/ocrdma_main.c | 2 +- drivers/infiniband/hw/ocrdma/ocrdma_verbs.c | 6 +- drivers/infiniband/ulp/isert/ib_isert.c | 2 +- drivers/input/input.c | 10 +- drivers/input/keyboard/pxa27x_keypad.c | 11 +- drivers/input/misc/cm109.c | 14 +- drivers/input/mouse/alps.c | 1 + drivers/input/serio/i8042.c | 23 +- drivers/input/tablet/wacom_sys.c | 4 + drivers/input/tablet/wacom_wac.c | 8 + drivers/md/bcache/request.c | 2 +- drivers/md/dm-snap-persistent.c | 18 +- drivers/md/md.c | 5 +- drivers/md/raid1.c | 1 + drivers/md/raid10.c | 1 + drivers/md/raid5.c | 20 + drivers/media/dvb-frontends/tda10071.c | 9 +- drivers/media/i2c/ad9389b.c | 15 +- drivers/media/i2c/adv7511.c | 18 +- drivers/media/i2c/adv7842.c | 30 +- drivers/media/i2c/ths8200.c | 12 +- drivers/media/pci/saa7134/saa7134-video.c | 1 + drivers/media/platform/s5p-jpeg/jpeg-core.c | 1 + drivers/media/platform/sh_vou.c | 2 +- drivers/media/platform/soc_camera/mx3_camera.c | 5 +- drivers/media/tuners/e4000.c | 3 +- drivers/media/usb/stkwebcam/stk-webcam.c | 7 + drivers/media/usb/uvc/uvc_driver.c | 18 + drivers/media/v4l2-core/videobuf2-core.c | 4 +- drivers/media/v4l2-core/videobuf2-dma-contig.c | 87 ++- drivers/mfd/mc13xxx-core.c | 5 - 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drivers/thermal/samsung/exynos_tmu.c | 12 +- drivers/thermal/samsung/exynos_tmu.h | 7 +- drivers/thermal/samsung/exynos_tmu_data.c | 30 +- drivers/thermal/samsung/exynos_tmu_data.h | 13 +- drivers/thermal/thermal_hwmon.c | 2 +- drivers/thermal/ti-soc-thermal/ti-thermal-common.c | 1 + drivers/thermal/x86_pkg_temp_thermal.c | 14 +- drivers/tty/serial/atmel_serial.c | 9 +- drivers/tty/serial/imx.c | 3 - drivers/tty/serial/vt8500_serial.c | 5 +- drivers/uio/uio.c | 17 +- drivers/usb/chipidea/host.c | 6 +- drivers/usb/core/quirks.c | 6 + drivers/usb/host/pci-quirks.c | 4 +- drivers/usb/host/xhci-hub.c | 26 - drivers/usb/host/xhci-pci.c | 25 + drivers/usb/host/xhci.c | 14 +- drivers/usb/host/xhci.h | 2 + drivers/usb/misc/Kconfig | 2 +- drivers/usb/musb/musb_core.c | 46 ++ drivers/usb/musb/musb_core.h | 1 + drivers/usb/musb/musb_gadget.c | 3 + drivers/usb/musb/musb_virthub.c | 46 -- drivers/usb/serial/ftdi_sio.c | 1 + drivers/usb/serial/ftdi_sio_ids.h | 6 + drivers/usb/serial/option.c | 225 +++++++- drivers/usb/serial/pl2303.c | 274 ++------- drivers/usb/serial/ti_usb_3410_5052.c | 1 + drivers/usb/storage/scsiglue.c | 5 +- drivers/usb/storage/unusual_devs.h | 7 + drivers/vfio/vfio_iommu_type1.c | 40 +- drivers/vhost/scsi.c | 2 +- drivers/video/au1100fb.c | 26 +- drivers/video/au1200fb.c | 23 +- drivers/w1/w1.c | 6 + fs/btrfs/inode.c | 1 + fs/buffer.c | 14 +- fs/cifs/cifsfs.c | 6 +- fs/cifs/cifspdu.h | 31 +- fs/cifs/cifssmb.c | 40 +- fs/cifs/netmisc.c | 4 +- fs/cifs/sess.c | 4 +- fs/cifs/smb2pdu.c | 6 + fs/cifs/smbfsctl.h | 14 + fs/cifs/transport.c | 9 +- fs/dcache.c | 20 +- fs/ecryptfs/crypto.c | 2 +- fs/ecryptfs/keystore.c | 3 +- fs/eventpoll.c | 4 +- fs/ext3/namei.c | 5 +- fs/ext4/namei.c | 5 +- fs/file_table.c | 4 +- fs/jfs/jfs_inode.c | 3 +- fs/namei.c | 3 +- fs/proc/inode.c | 10 +- fs/proc/task_mmu.c | 4 +- fs/select.c | 3 +- fs/seq_file.c | 2 + include/acpi/acpi_bus.h | 7 - include/linux/filter.h | 15 +- include/linux/ipc_namespace.h | 6 +- include/linux/memcontrol.h | 50 +- include/linux/mfd/mc13xxx.h | 7 + include/linux/mlx5/device.h | 4 +- include/linux/mlx5/driver.h | 6 +- include/linux/netdevice.h | 5 +- include/linux/of_reserved_mem.h | 14 - include/linux/percpu.h | 8 +- include/linux/platform_data/davinci_asp.h | 2 + include/linux/regmap.h | 44 ++ include/linux/sched.h | 7 +- include/linux/usb/usb_phy_gen_xceiv.h | 2 +- include/linux/usb_usual.h | 4 +- include/linux/yam.h | 2 +- include/net/cipso_ipv4.h | 6 +- include/net/dst.h | 12 + include/net/ip6_route.h | 6 +- include/net/mac802154.h | 2 +- include/net/sock.h | 6 +- include/sound/cs42l52.h | 2 + include/sound/cs42l73.h | 22 + include/sound/rcar_snd.h | 2 +- include/sound/soc-dai.h | 10 + include/sound/soc-dapm.h | 4 + include/sound/soc.h | 100 ++-- include/trace/events/asoc.h | 1 + include/trace/events/target.h | 4 +- include/uapi/drm/drm_mode.h | 2 + include/uapi/linux/perf_event.h | 12 +- include/uapi/linux/tc_act/Kbuild | 1 + include/{ => uapi}/linux/tc_act/tc_defact.h | 2 +- include/uapi/rdma/ib_user_verbs.h | 6 + ipc/ipc_sysctl.c | 20 +- ipc/sem.c | 42 +- ipc/util.c | 27 +- kernel/cgroup.c | 14 +- kernel/events/core.c | 4 + kernel/events/ring_buffer.c | 31 +- kernel/mutex.c | 32 +- kernel/power/hibernate.c | 2 +- kernel/time/clockevents.c | 65 ++- lib/Kconfig.debug | 2 +- lib/percpu-refcount.c | 3 + lib/scatterlist.c | 3 +- mm/filemap.c | 11 +- mm/huge_memory.c | 80 ++- mm/hugetlb.c | 17 +- mm/list_lru.c | 3 +- mm/memcontrol.c | 196 +++---- mm/memory.c | 73 ++- mm/migrate.c | 21 +- mm/mprotect.c | 9 +- mm/mremap.c | 5 +- mm/oom_kill.c | 2 +- mm/page-writeback.c | 10 +- mm/pagewalk.c | 2 +- mm/slab_common.c | 2 + mm/swapfile.c | 4 +- mm/vmscan.c | 1 + mm/zswap.c | 4 + net/8021q/vlan_netlink.c | 2 +- net/batman-adv/main.c | 5 +- net/batman-adv/network-coding.c | 28 +- net/batman-adv/network-coding.h | 14 +- net/bridge/br_fdb.c | 4 +- net/bridge/br_mdb.c | 2 +- net/bridge/br_multicast.c | 38 +- net/bridge/br_netlink.c | 2 +- net/bridge/br_private.h | 5 +- net/bridge/br_stp_if.c | 2 +- net/bridge/br_vlan.c | 125 +++-- net/compat.c | 2 + net/core/dev.c | 3 +- net/core/filter.c | 8 +- net/core/secure_seq.c | 2 + net/core/sock.c | 1 + net/ieee802154/6lowpan.c | 5 + net/ipv4/inet_hashtables.c | 2 +- net/ipv4/ip_output.c | 13 +- net/ipv4/ip_vti.c | 14 +- net/ipv4/route.c | 2 +- net/ipv4/tcp_input.c | 9 +- net/ipv4/tcp_output.c | 14 +- net/ipv4/xfrm4_policy.c | 1 + net/ipv6/ah6.c | 3 +- net/ipv6/esp6.c | 3 +- net/ipv6/inet6_hashtables.c | 2 +- net/ipv6/ip6_gre.c | 6 +- net/ipv6/ip6_output.c | 29 +- net/ipv6/ip6_tunnel.c | 12 +- net/ipv6/ipcomp6.c | 3 +- net/ipv6/route.c | 46 +- net/ipv6/udp.c | 5 +- net/ipv6/xfrm6_policy.c | 1 + net/key/af_key.c | 3 +- net/l2tp/l2tp_core.c | 36 +- net/l2tp/l2tp_core.h | 3 + net/l2tp/l2tp_ppp.c | 4 + net/mac80211/cfg.c | 2 +- net/mac80211/ieee80211_i.h | 3 + net/mac80211/offchannel.c | 2 + net/mac80211/rx.c | 3 + net/mac80211/scan.c | 19 + net/mac80211/status.c | 3 + net/mac80211/tx.c | 3 +- net/mac80211/util.c | 9 +- net/netfilter/nf_conntrack_h323_main.c | 4 +- net/sched/sch_fq.c | 22 +- net/sched/sch_netem.c | 17 + net/sctp/output.c | 3 +- net/socket.c | 24 +- net/unix/af_unix.c | 10 + net/unix/diag.c | 1 + net/wireless/core.c | 23 +- net/wireless/core.h | 3 + net/wireless/ibss.c | 3 + net/wireless/nl80211.c | 4 +- net/wireless/radiotap.c | 7 +- net/xfrm/xfrm_policy.c | 28 +- net/xfrm/xfrm_replay.c | 54 +- net/xfrm/xfrm_user.c | 5 +- scripts/kallsyms.c | 12 +- scripts/link-vmlinux.sh | 2 + security/apparmor/apparmorfs.c | 4 +- security/apparmor/policy.c | 1 + sound/arm/pxa2xx-ac97-lib.c | 27 +- sound/core/pcm.c | 4 + sound/pci/hda/hda_codec.c | 4 +- sound/pci/hda/hda_generic.c | 6 +- sound/pci/hda/patch_analog.c | 18 +- sound/pci/hda/patch_realtek.c | 1 + sound/pci/rme9652/hdsp.c | 1 + sound/soc/Makefile | 2 +- sound/soc/atmel/atmel-pcm.c | 2 +- sound/soc/atmel/atmel_wm8904.c | 8 - sound/soc/atmel/sam9g20_wm8731.c | 1 + sound/soc/blackfin/bf5xx-i2s.c | 1 + sound/soc/cirrus/Kconfig | 2 +- sound/soc/codecs/88pm860x-codec.c | 75 +-- sound/soc/codecs/88pm860x-codec.h | 117 ++-- sound/soc/codecs/ab8500-codec.c | 92 ++- sound/soc/codecs/adau1373.c | 298 ++++++++-- sound/soc/codecs/adav80x.c | 147 +++-- sound/soc/codecs/ak4104.c | 11 +- sound/soc/codecs/ak4642.c | 4 +- sound/soc/codecs/arizona.c | 23 +- sound/soc/codecs/cq93vc.c | 46 +- sound/soc/codecs/cs4271.c | 1 + sound/soc/codecs/cs42l52.c | 93 +-- sound/soc/codecs/cs42l52.h | 4 +- sound/soc/codecs/cs42l73.c | 114 ++-- sound/soc/codecs/cs42l73.h | 105 ++-- sound/soc/codecs/max98088.c | 624 +++++++++------------ sound/soc/codecs/max98095.c | 466 ++++++--------- sound/soc/codecs/max9850.c | 39 +- sound/soc/codecs/mc13783.c | 135 +++-- sound/soc/codecs/ml26124.c | 2 + sound/soc/codecs/pcm1681.c | 3 +- sound/soc/codecs/pcm1792a.c | 3 +- sound/soc/codecs/rt5640.c | 31 +- sound/soc/codecs/si476x.c | 64 +-- sound/soc/codecs/sn95031.c | 35 +- sound/soc/codecs/tas5086.c | 171 ++++-- sound/soc/codecs/tlv320aic23.c | 84 ++- sound/soc/codecs/tlv320aic26.c | 139 +---- sound/soc/codecs/tlv320aic26.h | 5 +- sound/soc/codecs/tlv320aic32x4.c | 101 +--- sound/soc/codecs/tlv320aic3x.c | 238 ++++---- sound/soc/codecs/tpa6130a2.c | 32 +- sound/soc/codecs/twl4030.c | 80 ++- sound/soc/codecs/twl6040.c | 26 +- sound/soc/codecs/wm0010.c | 8 +- sound/soc/codecs/wm5102.c | 8 +- sound/soc/codecs/wm5110.c | 20 +- sound/soc/codecs/wm8400.c | 95 +--- sound/soc/codecs/wm8962.c | 228 ++++---- sound/soc/codecs/wm8996.c | 2 + sound/soc/codecs/wm8997.c | 10 +- sound/soc/codecs/wm_adsp.c | 27 +- sound/soc/codecs/wm_hubs.c | 1 + sound/soc/davinci/Kconfig | 18 +- sound/soc/davinci/Makefile | 1 + sound/soc/davinci/davinci-evm.c | 188 ++++++- sound/soc/davinci/davinci-mcasp.c | 169 ++++-- sound/soc/davinci/davinci-mcasp.h | 12 + sound/soc/fsl/eukrea-tlv320.c | 15 +- sound/soc/fsl/fsl_spdif.c | 22 +- sound/soc/fsl/fsl_ssi.c | 22 +- sound/soc/fsl/imx-audmux.c | 9 +- sound/soc/fsl/imx-mc13783.c | 3 +- sound/soc/fsl/imx-pcm-fiq.c | 29 +- sound/soc/fsl/imx-sgtl5000.c | 4 +- sound/soc/fsl/imx-spdif.c | 4 +- sound/soc/fsl/imx-ssi.c | 26 +- sound/soc/fsl/imx-ssi.h | 2 + sound/soc/fsl/imx-wm8962.c | 4 +- sound/soc/generic/simple-card.c | 5 + sound/soc/kirkwood/kirkwood-dma.c | 6 +- sound/soc/kirkwood/kirkwood-i2s.c | 108 +++- sound/soc/kirkwood/kirkwood-openrd.c | 2 +- sound/soc/kirkwood/kirkwood-t5325.c | 2 +- sound/soc/kirkwood/kirkwood.h | 4 +- sound/soc/mid-x86/mfld_machine.c | 10 +- sound/soc/mxs/mxs-saif.c | 42 +- sound/soc/mxs/mxs-saif.h | 5 + sound/soc/mxs/mxs-sgtl5000.c | 20 +- sound/soc/omap/Kconfig | 4 +- sound/soc/omap/omap-mcpdm.c | 12 +- sound/soc/omap/omap-twl4030.c | 5 +- sound/soc/pxa/brownstone.c | 1 + sound/soc/pxa/corgi.c | 1 + sound/soc/pxa/e740_wm9705.c | 1 + sound/soc/pxa/e750_wm9705.c | 1 + sound/soc/pxa/e800_wm9712.c | 1 + sound/soc/pxa/imote2.c | 1 + sound/soc/pxa/mioa701_wm9713.c | 1 + sound/soc/pxa/mmp-sspa.c | 5 +- sound/soc/pxa/palm27x.c | 1 + sound/soc/pxa/poodle.c | 1 + sound/soc/pxa/pxa2xx-ac97.c | 56 +- sound/soc/pxa/tosa.c | 1 + sound/soc/pxa/ttc-dkb.c | 1 + sound/soc/samsung/bells.c | 1 + sound/soc/samsung/i2s.c | 16 +- sound/soc/samsung/smdk_wm8994.c | 14 +- sound/soc/sh/rcar/adg.c | 11 +- sound/soc/sh/rcar/core.c | 81 +-- sound/soc/sh/rcar/gen.c | 261 +++++---- sound/soc/sh/rcar/rsnd.h | 9 +- sound/soc/sh/rcar/scu.c | 12 +- sound/soc/sh/rcar/ssi.c | 52 +- sound/soc/soc-cache.c | 263 ++------- sound/soc/soc-core.c | 343 ++++++----- sound/soc/soc-dapm.c | 124 ++-- sound/soc/soc-devres.c | 86 +++ sound/soc/soc-io.c | 26 - sound/soc/soc-jack.c | 7 +- sound/soc/soc-pcm.c | 60 +- sound/soc/soc-utils.c | 6 +- sound/soc/spear/spdif_in.c | 12 +- sound/soc/spear/spdif_out.c | 14 +- sound/soc/tegra/tegra30_ahub.c | 115 +++- sound/soc/tegra/tegra30_ahub.h | 38 +- sound/soc/tegra/tegra30_i2s.c | 51 +- sound/soc/tegra/tegra30_i2s.h | 7 + sound/soc/tegra/tegra_asoc_utils.c | 2 + sound/soc/tegra/tegra_asoc_utils.h | 1 + sound/usb/usx2y/us122l.c | 4 +- tools/perf/Documentation/perf-record.txt | 14 +- tools/perf/Documentation/perf-top.txt | 18 +- tools/perf/builtin-kvm.c | 7 + tools/perf/builtin-record.c | 73 ++- tools/perf/builtin-top.c | 33 +- tools/perf/builtin-trace.c | 8 +- tools/perf/tests/code-reading.c | 1 + tools/perf/tests/keep-tracking.c | 1 + tools/perf/tests/mmap-basic.c | 1 + tools/perf/tests/open-syscall-tp-fields.c | 4 +- tools/perf/tests/perf-record.c | 2 + tools/perf/tests/perf-time-to-tsc.c | 4 +- tools/perf/tests/sw-clock.c | 4 +- tools/perf/tests/task-exit.c | 6 +- tools/perf/ui/stdio/hist.c | 9 +- tools/perf/util/callchain.h | 3 + tools/perf/util/event.c | 32 +- tools/perf/util/evlist.c | 13 +- tools/perf/util/evlist.h | 2 + tools/perf/util/evsel.c | 1 - tools/perf/util/hist.h | 13 + tools/perf/util/probe-finder.c | 2 +- tools/perf/util/python.c | 2 + .../perf/util/scripting-engines/trace-event-perl.c | 2 +- .../util/scripting-engines/trace-event-python.c | 37 +- tools/testing/selftests/timers/posix_timers.c | 2 +- virt/kvm/kvm_main.c | 2 +- 599 files changed, 8499 insertions(+), 6158 deletions(-) delete mode 100644 Documentation/devicetree/bindings/memory.txt create mode 100644 Documentation/devicetree/bindings/sound/cs42l73.txt create mode 100644 Documentation/devicetree/bindings/sound/davinci-evm-audio.txt create mode 100644 Documentation/devicetree/bindings/sound/tpa6130a2.txt create mode 100644 Documentation/sound/alsa/soc/DPCM.txt delete mode 100644 drivers/of/of_reserved_mem.c delete mode 100644 include/linux/of_reserved_mem.h create mode 100644 include/sound/cs42l73.h rename include/{ => uapi}/linux/tc_act/tc_defact.h (75%) create mode 100644 sound/soc/soc-devres.c

2 1

[alsa-devel] [RFC 0/2] I2C and SPI dev_name change for ACPI enumerated slaves
by Jarkko Nikula 16 Nov '13

16 Nov '13

Hi We've run into problem of changing I2C device names while developing ALSA SoC drivers for x86 based systems. Changing device names makes more difficult to match devices by their name. Which is what we use within ASoC subsystem. These changing names comes from changing adapter/bus numbering which could occur due variable amount of bus controllers, probe order, add-on cards or different BIOS settings. Patches here try to solve the problem on ACPI 5 based systems by using stable ACPI device name with a "i2c-"/"spi-" prefix for I2C/SPI slave device names. Both patches are independent from each other and can go through their own subsystems. Jarkko Nikula (2): i2c: Use stable dev_name for ACPI enumerated I2C slaves spi: Use stable dev_name for ACPI enumerated SPI slaves drivers/i2c/i2c-core.c | 24 ++++++++++++++++++++---- drivers/spi/spi.c | 21 ++++++++++++++++++--- 2 files changed, 38 insertions(+), 7 deletions(-) -- 1.8.4.rc3

5 41

[alsa-devel] [PATCHv5] dmaengine: Add support for BCM2835
by Florian Meier 15 Nov '13

15 Nov '13

Add support for DMA controller of BCM2835 as used in the Raspberry Pi. Currently it only supports cyclic DMA. Signed-off-by: Florian Meier <florian.meier(a)koalo.de> --- Fifth version with better error handling in probe. .../devicetree/bindings/dma/bcm2835-dma.txt | 56 ++ drivers/dma/Kconfig | 6 + drivers/dma/Makefile | 1 + drivers/dma/bcm2835-dma.c | 749 +++++++++++++++++++++ 4 files changed, 812 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/bcm2835-dma.txt create mode 100644 drivers/dma/bcm2835-dma.c diff --git a/Documentation/devicetree/bindings/dma/bcm2835-dma.txt b/Documentation/devicetree/bindings/dma/bcm2835-dma.txt new file mode 100644 index 0000000..7d91019 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/bcm2835-dma.txt @@ -0,0 +1,56 @@ +* BCM2835 DMA controller + +Required properties: +- compatible: Should be "brcm,bcm2835-dma". +- reg: Should contain DMA registers location and length. +- interrupts: Should contain the DMA interrupts associated + to the DMA channels in ascending order. + First cell is the IRQ bank. + Second cell is the IRQ number. +- #dma-cells: Must be <1>, used to represent the number of integer cells in + the dmas property of client devices. +- brcm,dma-channel-mask: Bit mask representing the channels + not used by the firmware. + +Example: + +dma: dma@7e007000 { + compatible = "brcm,bcm2835-dma"; + reg = <0x7e007000 0xf00>; + interrupts = <1 16 + 1 17 + 1 18 + 1 19 + 1 20 + 1 21 + 1 22 + 1 23 + 1 24 + 1 25 + 1 26 + 1 27 + 1 28>; + + #dma-cells = <1>; + brcm,dma-channel-mask = <0x7f35>; +}; + +DMA clients connected to the BCM2835 DMA controller must use the format +described in the dma.txt file, using a two-cell specifier for each channel: +a phandle plus one integer cells. +The two cells in order are: + +1. A phandle pointing to the DMA controller. +2. The DREQ number. + +Example: + +bcm2835_i2s: i2s@7e203000 { + compatible = "brcm,bcm2835-i2s"; + reg = < 0x7e203000 0x20 + 0x7e101098 0x02>; + + dmas = <&dma 2 + &dma 3>; + dma-names = "tx", "rx"; +}; diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig index c61a6ec..880e723 100644 --- a/drivers/dma/Kconfig +++ b/drivers/dma/Kconfig @@ -300,6 +300,12 @@ config DMA_OMAP select DMA_ENGINE select DMA_VIRTUAL_CHANNELS +config DMA_BCM2835 + tristate "BCM2835 DMA engine support" + depends on (ARCH_BCM2835 || MACH_BCM2708) + select DMA_ENGINE + select DMA_VIRTUAL_CHANNELS + config TI_CPPI41 tristate "AM33xx CPPI41 DMA support" depends on ARCH_OMAP diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile index 0ce2da9..0a6f08e 100644 --- a/drivers/dma/Makefile +++ b/drivers/dma/Makefile @@ -38,6 +38,7 @@ obj-$(CONFIG_EP93XX_DMA) += ep93xx_dma.o obj-$(CONFIG_DMA_SA11X0) += sa11x0-dma.o obj-$(CONFIG_MMP_TDMA) += mmp_tdma.o obj-$(CONFIG_DMA_OMAP) += omap-dma.o +obj-$(CONFIG_DMA_BCM2835) += bcm2835-dma.o obj-$(CONFIG_MMP_PDMA) += mmp_pdma.o obj-$(CONFIG_DMA_JZ4740) += dma-jz4740.o obj-$(CONFIG_TI_CPPI41) += cppi41.o diff --git a/drivers/dma/bcm2835-dma.c b/drivers/dma/bcm2835-dma.c new file mode 100644 index 0000000..bc26398 --- /dev/null +++ b/drivers/dma/bcm2835-dma.c @@ -0,0 +1,749 @@ +/* + * BCM2835 DMA engine support + * + * This driver only supports cyclic DMA transfers + * as needed for the I2S module. + * + * Author: Florian Meier, <florian.meier(a)koalo.de> + * Copyright 2013 + * + * based on + * OMAP DMAengine support by Russell King + * + * BCM2708 DMA Driver + * Copyright (C) 2010 Broadcom + * + * Raspberry Pi PCM I2S ALSA Driver + * Copyright (c) by Phil Poole 2013 + * + * MARVELL MMP Peripheral DMA Driver + * Copyright 2012 Marvell International Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#include <linux/dmaengine.h> +#include <linux/dma-mapping.h> +#include <linux/err.h> +#include <linux/init.h> +#include <linux/interrupt.h> +#include <linux/list.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/slab.h> +#include <linux/io.h> +#include <linux/spinlock.h> +#include <linux/of.h> +#include <linux/of_dma.h> + +#include "virt-dma.h" + +struct bcm2835_dmadev { + struct dma_device ddev; + spinlock_t lock; + void __iomem *dma_base; + struct device_dma_parameters dma_parms; +}; + +struct bcm2835_dma_cb { + uint32_t info; + uint32_t src; + uint32_t dst; + uint32_t length; + uint32_t stride; + uint32_t next; + uint32_t pad[2]; +}; + +struct bcm2835_chan { + struct virt_dma_chan vc; + struct list_head node; + + struct dma_slave_config cfg; + bool cyclic; + unsigned dreq; + + int dma_ch; + struct bcm2835_desc *desc; + + void __iomem *dma_chan_base; + int dma_irq_number; +}; + +struct bcm2835_desc { + struct virt_dma_desc vd; + enum dma_transfer_direction dir; + + unsigned int control_block_size; + struct bcm2835_dma_cb *control_block_base; + dma_addr_t control_block_base_phys; + + unsigned frames; + size_t size; +}; + +#define BCM2835_DMA_CS 0x00 +#define BCM2835_DMA_ADDR 0x04 +#define BCM2835_DMA_SOURCE_AD 0x0c +#define BCM2835_DMA_DEST_AD 0x10 +#define BCM2835_DMA_NEXTCB 0x1C + +/* DMA CS Control and Status bits */ +#define BCM2835_DMA_ACTIVE (1 << 0) +#define BCM2835_DMA_INT (1 << 2) +#define BCM2835_DMA_ISPAUSED (1 << 4) /* Pause requested or not active */ +#define BCM2835_DMA_ISHELD (1 << 5) /* Is held by DREQ flow control */ +#define BCM2835_DMA_ERR (1 << 8) +#define BCM2835_DMA_ABORT (1 << 30) /* stop current CB, go to next, WO */ +#define BCM2835_DMA_RESET (1 << 31) /* WO, self clearing */ + +#define BCM2835_DMA_INT_EN (1 << 0) +#define BCM2835_DMA_D_INC (1 << 4) +#define BCM2835_DMA_D_DREQ (1 << 6) +#define BCM2835_DMA_S_INC (1 << 8) +#define BCM2835_DMA_S_DREQ (1 << 6) + +#define BCM2835_DMA_PER_MAP(x) ((x) << 16) + +#define BCM2835_DMA_DATA_TYPE_S8 1 +#define BCM2835_DMA_DATA_TYPE_S16 2 +#define BCM2835_DMA_DATA_TYPE_S32 4 +#define BCM2835_DMA_DATA_TYPE_S128 16 + +/* valid only for channels 0 - 14, 15 has its own base address */ +#define BCM2835_DMA_CHAN(n) ((n) << 8) /* base address */ +#define BCM2835_DMA_CHANIO(dma_base, n) ((dma_base) + BCM2835_DMA_CHAN(n)) + +static inline struct bcm2835_dmadev *to_bcm2835_dma_dev(struct dma_device *d) +{ + return container_of(d, struct bcm2835_dmadev, ddev); +} + +static inline struct bcm2835_chan *to_bcm2835_dma_chan(struct dma_chan *c) +{ + return container_of(c, struct bcm2835_chan, vc.chan); +} + +static inline struct bcm2835_desc *to_bcm2835_dma_desc( + struct dma_async_tx_descriptor *t) +{ + return container_of(t, struct bcm2835_desc, vd.tx); +} + +static void bcm2835_dma_desc_free(struct virt_dma_desc *vd) +{ + struct bcm2835_desc *desc = container_of(vd, struct bcm2835_desc, vd); + dma_free_coherent(desc->vd.tx.chan->device->dev, + desc->control_block_size, + desc->control_block_base, + desc->control_block_base_phys); + kfree(desc); +} + +static int bcm2835_dma_abort(void __iomem *dma_chan_base) +{ + unsigned long int cs; + int rc = 0; + + cs = readl(dma_chan_base + BCM2835_DMA_CS); + + if (BCM2835_DMA_ACTIVE & cs) { + long int timeout = 10000; + + /* write 0 to the active bit - pause the DMA */ + writel(0, dma_chan_base + BCM2835_DMA_CS); + + /* wait for any current AXI transfer to complete */ + while ((cs & BCM2835_DMA_ISPAUSED) && --timeout >= 0) + cs = readl(dma_chan_base + BCM2835_DMA_CS); + + if (cs & BCM2835_DMA_ISPAUSED) { + /* we'll un-pause when we set of our next DMA */ + rc = -ETIMEDOUT; + + } else if (BCM2835_DMA_ACTIVE & cs) { + /* terminate the control block chain */ + writel(0, dma_chan_base + BCM2835_DMA_NEXTCB); + + /* abort the whole DMA */ + writel(BCM2835_DMA_ABORT | BCM2835_DMA_ACTIVE, + dma_chan_base + BCM2835_DMA_CS); + } + } + + return rc; +} + +static void bcm2835_dma_start_desc(struct bcm2835_chan *c) +{ + struct virt_dma_desc *vd = vchan_next_desc(&c->vc); + struct bcm2835_desc *d; + + if (!vd) { + c->desc = NULL; + return; + } + + list_del(&vd->node); + + c->desc = d = to_bcm2835_dma_desc(&vd->tx); + + dsb(); /* ARM data synchronization (push) operation */ + + writel(d->control_block_base_phys, c->dma_chan_base + BCM2835_DMA_ADDR); + writel(BCM2835_DMA_ACTIVE, c->dma_chan_base + BCM2835_DMA_CS); +} + +static irqreturn_t bcm2835_dma_callback(int irq, void *data) +{ + struct bcm2835_chan *c = data; + struct bcm2835_desc *d; + unsigned long flags; + + spin_lock_irqsave(&c->vc.lock, flags); + + /* acknowledge interrupt */ + writel(BCM2835_DMA_INT, c->dma_chan_base + BCM2835_DMA_CS); + + d = c->desc; + + if (d) { + /* TODO Only works for cyclic DMA */ + vchan_cyclic_callback(&d->vd); + } + + /* keep the DMA engine running */ + dsb(); /* ARM synchronization barrier */ + writel(BCM2835_DMA_ACTIVE, c->dma_chan_base + BCM2835_DMA_CS); + + spin_unlock_irqrestore(&c->vc.lock, flags); + + return IRQ_HANDLED; +} + +static int bcm2835_dma_alloc_chan_resources(struct dma_chan *chan) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + + dev_dbg(c->vc.chan.device->dev, + "Allocating DMA channel %i\n", c->dma_ch); + + return request_irq(c->dma_irq_number, + bcm2835_dma_callback, 0, "DMA IRQ", c); +} + +static void bcm2835_dma_free_chan_resources(struct dma_chan *chan) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + + vchan_free_chan_resources(&c->vc); + free_irq(c->dma_irq_number, c); + + dev_dbg(c->vc.chan.device->dev, "Freeing DMA channel %u\n", c->dma_ch); +} + +static size_t bcm2835_dma_desc_size(struct bcm2835_desc *d) +{ + return d->size; +} + +static size_t bcm2835_dma_desc_size_pos(struct bcm2835_desc *d, dma_addr_t addr) +{ + unsigned i; + size_t size; + + for (size = i = 0; i < d->frames; i++) { + struct bcm2835_dma_cb *control_block = + &d->control_block_base[i]; + size_t this_size = control_block->length; + dma_addr_t dma; + + if (d->dir == DMA_DEV_TO_MEM) + dma = control_block->dst; + else + dma = control_block->src; + + if (size) + size += this_size; + else if (addr >= dma && addr < dma + this_size) + size += dma + this_size - addr; + } + + return size; +} + +static enum dma_status bcm2835_dma_tx_status(struct dma_chan *chan, + dma_cookie_t cookie, struct dma_tx_state *txstate) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + struct virt_dma_desc *vd; + enum dma_status ret; + unsigned long flags; + + ret = dma_cookie_status(chan, cookie, txstate); + if (ret == DMA_SUCCESS || !txstate) + return ret; + + spin_lock_irqsave(&c->vc.lock, flags); + vd = vchan_find_desc(&c->vc, cookie); + if (vd) { + txstate->residue = + bcm2835_dma_desc_size(to_bcm2835_dma_desc(&vd->tx)); + } else if (c->desc && c->desc->vd.tx.cookie == cookie) { + struct bcm2835_desc *d = c->desc; + dma_addr_t pos; + + if (d->dir == DMA_MEM_TO_DEV) + pos = readl(c->dma_chan_base + BCM2835_DMA_SOURCE_AD); + else if (d->dir == DMA_DEV_TO_MEM) + pos = readl(c->dma_chan_base + BCM2835_DMA_DEST_AD); + else + pos = 0; + + txstate->residue = bcm2835_dma_desc_size_pos(d, pos); + } else { + txstate->residue = 0; + } + + spin_unlock_irqrestore(&c->vc.lock, flags); + + return ret; +} + +static void bcm2835_dma_issue_pending(struct dma_chan *chan) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + unsigned long flags; + + c->cyclic = true; /* nothing else is implemented */ + + spin_lock_irqsave(&c->vc.lock, flags); + if (vchan_issue_pending(&c->vc) && !c->desc) + bcm2835_dma_start_desc(c); + + spin_unlock_irqrestore(&c->vc.lock, flags); +} + + +static struct dma_async_tx_descriptor *bcm2835_dma_prep_dma_cyclic( + struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len, + size_t period_len, enum dma_transfer_direction direction, + unsigned long flags, void *context) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + enum dma_slave_buswidth dev_width; + struct bcm2835_desc *d; + dma_addr_t dev_addr; + unsigned es, sync_type; + unsigned frame; + + /* Grab configuration */ + if (direction == DMA_DEV_TO_MEM) { + dev_addr = c->cfg.src_addr; + dev_width = c->cfg.src_addr_width; + sync_type = BCM2835_DMA_S_DREQ; + } else if (direction == DMA_MEM_TO_DEV) { + dev_addr = c->cfg.dst_addr; + dev_width = c->cfg.dst_addr_width; + sync_type = BCM2835_DMA_D_DREQ; + } else { + dev_err(chan->device->dev, "%s: bad direction?\n", __func__); + return NULL; + } + + /* Bus width translates to the element size (ES) */ + switch (dev_width) { + case DMA_SLAVE_BUSWIDTH_4_BYTES: + es = BCM2835_DMA_DATA_TYPE_S32; + break; + default: + return NULL; + } + + /* Now allocate and setup the descriptor. */ + d = kzalloc(sizeof(*d), GFP_NOWAIT); + if (!d) + return NULL; + + d->dir = direction; + d->frames = buf_len / period_len; + + /* Allocate memory for control blocks */ + d->control_block_size = d->frames * sizeof(struct bcm2835_dma_cb); + d->control_block_base = dma_alloc_coherent(chan->device->dev, + d->control_block_size, &d->control_block_base_phys, + GFP_NOWAIT); + + if (!d->control_block_base) { + kfree(d); + dev_err(chan->device->dev, + "%s: Memory allocation error\n", __func__); + return NULL; + } + + memset(d->control_block_base, 0, d->control_block_size); + + /* + * Iterate over all frames, create a control block + * for each frame and link them together. + */ + for (frame = 0; frame < d->frames; frame++) { + struct bcm2835_dma_cb *control_block = + &d->control_block_base[frame]; + + /* Setup adresses */ + if (d->dir == DMA_DEV_TO_MEM) { + control_block->info = BCM2835_DMA_D_INC; + control_block->src = dev_addr; + control_block->dst = buf_addr + frame * period_len; + } else { + control_block->info = BCM2835_DMA_S_INC; + control_block->src = buf_addr + frame * period_len; + control_block->dst = dev_addr; + } + + /* Enable interrupt */ + control_block->info |= BCM2835_DMA_INT_EN; + + /* Setup synchronization */ + if (sync_type != 0) + control_block->info |= sync_type; + + /* Setup DREQ channel */ + if (c->dreq != 0) + control_block->info |= + BCM2835_DMA_PER_MAP(c->dreq); + + /* Length of a frame */ + control_block->length = period_len; + d->size += control_block->length; + + /* + * Next block is the next frame. + * This DMA engine driver currently only supports cyclic DMA. + * Therefore, wrap around at number of frames. + */ + control_block->next = d->control_block_base_phys + + sizeof(struct bcm2835_dma_cb) + * ((frame + 1) % d->frames); + + /* The following fields are not used here */ + control_block->stride = 0; + control_block->pad[0] = 0; + control_block->pad[1] = 0; + } + + return vchan_tx_prep(&c->vc, &d->vd, flags); +} + +static int bcm2835_dma_slave_config(struct bcm2835_chan *c, + struct dma_slave_config *cfg) +{ + if ((cfg->direction == DMA_DEV_TO_MEM && + cfg->src_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES) || + (cfg->direction == DMA_MEM_TO_DEV && + cfg->dst_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES) || + (cfg->direction != DMA_DEV_TO_MEM && + cfg->direction != DMA_MEM_TO_DEV)) { + return -EINVAL; + } + + c->cfg = *cfg; + + return 0; +} + +static int bcm2835_dma_terminate_all(struct bcm2835_chan *c) +{ + struct bcm2835_dmadev *d = to_bcm2835_dma_dev(c->vc.chan.device); + unsigned long flags; + int timeout = 1000; + LIST_HEAD(head); + + spin_lock_irqsave(&c->vc.lock, flags); + + /* Prevent this channel being scheduled */ + spin_lock(&d->lock); + list_del_init(&c->node); + spin_unlock(&d->lock); + + /* + * Stop DMA activity: we assume the callback will not be called + * after bcm_dma_abort() returns (even if it does, it will see + * c->desc is NULL and exit.) + */ + if (c->desc) { + c->desc = NULL; + bcm2835_dma_abort(c->dma_chan_base); + + /* Wait for stopping */ + while (timeout > 0) { + timeout--; + if (!(readl(c->dma_chan_base + BCM2835_DMA_CS) & + BCM2835_DMA_ACTIVE)) + break; + + cpu_relax(); + } + + if (timeout <= 0) + dev_err(d->ddev.dev, "DMA transfer could not be terminated\n"); + } + + vchan_get_all_descriptors(&c->vc, &head); + spin_unlock_irqrestore(&c->vc.lock, flags); + vchan_dma_desc_free_list(&c->vc, &head); + + return 0; +} + +static int bcm2835_dma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd, + unsigned long arg) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + int ret; + + switch (cmd) { + case DMA_SLAVE_CONFIG: + return bcm2835_dma_slave_config(c, + (struct dma_slave_config *)arg); + + case DMA_TERMINATE_ALL: + bcm2835_dma_terminate_all(c); + break; + + default: + ret = -ENXIO; + break; + } + + return ret; +} + +static int bcm2835_dma_chan_init(struct bcm2835_dmadev *d, int chan_id, int irq) +{ + struct bcm2835_chan *c; + + c = kzalloc(sizeof(*c), GFP_KERNEL); + if (!c) + return -ENOMEM; + + c->vc.desc_free = bcm2835_dma_desc_free; + vchan_init(&c->vc, &d->ddev); + INIT_LIST_HEAD(&c->node); + + d->ddev.chancnt++; + + c->dma_chan_base = BCM2835_DMA_CHANIO(d->dma_base, chan_id); + c->dma_ch = chan_id; + c->dma_irq_number = irq; + + return 0; +} + +static void bcm2835_dma_free(struct bcm2835_dmadev *od) +{ + while (!list_empty(&od->ddev.channels)) { + struct bcm2835_chan *c = list_first_entry(&od->ddev.channels, + struct bcm2835_chan, vc.chan.device_node); + + list_del(&c->vc.chan.device_node); + tasklet_kill(&c->vc.task); + kfree(c); + } +} + +#if defined(CONFIG_OF) +static const struct of_device_id bcm2835_dma_of_match[] = { + { .compatible = "brcm,bcm2835-dma", }, + {}, +}; +MODULE_DEVICE_TABLE(of, bcm2835_dma_of_match); +#endif + +static struct dma_chan *bcm2835_dma_xlate(struct of_phandle_args *dma_spec, + struct of_dma *ofdma) +{ + struct bcm2835_dmadev *d = ofdma->of_dma_data; + struct dma_chan *chan, *candidate; + +retry: + candidate = NULL; + + /* walk the list of channels registered with the current instance and + * find one that is currently unused */ + list_for_each_entry(chan, &d->ddev.channels, device_node) + if (chan->client_count == 0) { + candidate = chan; + break; + } + + if (!candidate) + return NULL; + + /* dma_get_slave_channel will return NULL if we lost a race between + * the lookup and the reservation */ + chan = dma_get_slave_channel(candidate); + + if (chan) { + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + + /* Set DREQ from param */ + c->dreq = dma_spec->args[0]; + + return chan; + } + + goto retry; +} + +static int bcm2835_dma_device_slave_caps(struct dma_chan *dchan, + struct dma_slave_caps *caps) +{ + caps->src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES); + caps->dstn_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES); + caps->directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV); + caps->cmd_pause = false; + caps->cmd_terminate = true; + + return 0; +} + +static int bcm2835_dma_probe(struct platform_device *pdev) +{ + struct bcm2835_dmadev *od; + struct resource *dma_res = NULL; + void __iomem *dma_base = NULL; + int rc = 0; + int i = 0; + int irq; + uint32_t chans_available; + + if (!pdev->dev.dma_mask) + pdev->dev.dma_mask = &pdev->dev.coherent_dma_mask; + + rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); + if (rc) + return rc; + dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); + + od = devm_kzalloc(&pdev->dev, sizeof(*od), GFP_KERNEL); + if (!od) + return -ENOMEM; + + pdev->dev.dma_parms = &od->dma_parms; + dma_set_max_seg_size(&pdev->dev, 0x3FFFFFFF); + + dma_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + dma_base = devm_ioremap_resource(&pdev->dev, dma_res); + if (IS_ERR(dma_base)) + return PTR_ERR(dma_base); + + od->dma_base = dma_base; + + dma_cap_set(DMA_SLAVE, od->ddev.cap_mask); + dma_cap_set(DMA_CYCLIC, od->ddev.cap_mask); + od->ddev.device_alloc_chan_resources = bcm2835_dma_alloc_chan_resources; + od->ddev.device_free_chan_resources = bcm2835_dma_free_chan_resources; + od->ddev.device_tx_status = bcm2835_dma_tx_status; + od->ddev.device_issue_pending = bcm2835_dma_issue_pending; + od->ddev.device_slave_caps = bcm2835_dma_device_slave_caps; + od->ddev.device_prep_dma_cyclic = bcm2835_dma_prep_dma_cyclic; + od->ddev.device_control = bcm2835_dma_control; + od->ddev.dev = &pdev->dev; + INIT_LIST_HEAD(&od->ddev.channels); + spin_lock_init(&od->lock); + + platform_set_drvdata(pdev, od); + + if (pdev->dev.of_node) { + /* Request DMA channel mask from device tree */ + if (of_property_read_u32(pdev->dev.of_node, + "brcm,dma-channel-mask", + &chans_available)) { + dev_err(&pdev->dev, "Failed to get channel mask\n"); + bcm2835_dma_free(od); + return -EINVAL; + } + } else { + dev_err(&pdev->dev, "Failed to get channel mask. No device tree.\n"); + bcm2835_dma_free(od); + return -EINVAL; + } + + /* do not use the FIQ and BULK channels */ + chans_available &= ~0xD; + + for (i = 0; i < pdev->num_resources; i++) { + irq = platform_get_irq(pdev, i); + if (irq < 0) + break; + + if (chans_available & (1 << i)) { + rc = bcm2835_dma_chan_init(od, i, irq); + if (rc) { + bcm2835_dma_free(od); + return rc; + } + } + } + + dev_dbg(&pdev->dev, "Initialized %i DMA channels\n", i); + + if (pdev->dev.of_node) { + /* Device-tree DMA controller registration */ + rc = of_dma_controller_register(pdev->dev.of_node, + bcm2835_dma_xlate, od); + if (rc) { + dev_err(&pdev->dev, "Failed to register DMA controller\n"); + bcm2835_dma_free(od); + return rc; + } + } + + rc = dma_async_device_register(&od->ddev); + if (rc) { + dev_err(&pdev->dev, + "Failed to register slave DMA engine device: %d\n", rc); + bcm2835_dma_free(od); + return rc; + } + + dev_dbg(&pdev->dev, "Load BCM2835 DMA engine driver\n"); + + return rc; +} + +static int bcm2835_dma_remove(struct platform_device *pdev) +{ + struct bcm2835_dmadev *od = platform_get_drvdata(pdev); + + dma_async_device_unregister(&od->ddev); + bcm2835_dma_free(od); + + return 0; +} + +static struct platform_driver bcm2835_dma_driver = { + .probe = bcm2835_dma_probe, + .remove = bcm2835_dma_remove, + .driver = { + .name = "bcm2835-dma", + .owner = THIS_MODULE, + .of_match_table = of_match_ptr(bcm2835_dma_of_match), + }, +}; + +module_platform_driver(bcm2835_dma_driver); + +MODULE_ALIAS("platform:bcm2835-dma"); +MODULE_DESCRIPTION("BCM2835 DMA engine driver"); +MODULE_AUTHOR("Florian Meier <florian.meier(a)koalo.de>"); +MODULE_LICENSE("GPL v2"); -- 1.8.1.2

3 3

[alsa-devel] [PATCH] ASoC: tegra: use clk_disable_unprepare instead of clk_disable
by Wei Yongjun 15 Nov '13

15 Nov '13

From: Wei Yongjun <yongjun_wei(a)trendmicro.com.cn> clk_prepare_enable() is used so clk_disable_unprepare() should be used instead of clk_disable() in the error handling path. Signed-off-by: Wei Yongjun <yongjun_wei(a)trendmicro.com.cn> --- sound/soc/tegra/tegra30_ahub.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/tegra/tegra30_ahub.c b/sound/soc/tegra/tegra30_ahub.c index 3115433..63f65d9 100644 --- a/sound/soc/tegra/tegra30_ahub.c +++ b/sound/soc/tegra/tegra30_ahub.c @@ -84,7 +84,7 @@ static int tegra30_ahub_runtime_resume(struct device *dev) ret = clk_prepare_enable(ahub->clk_apbif); if (ret) { dev_err(dev, "clk_enable apbif failed: %d\n", ret); - clk_disable(ahub->clk_d_audio); + clk_disable_unprepare(ahub->clk_d_audio); return ret; }

3 2

[alsa-devel] [PATCHv6] dmaengine: Add support for BCM2835
by Florian Meier 15 Nov '13

15 Nov '13

Add support for DMA controller of BCM2835 as used in the Raspberry Pi. Currently it only supports cyclic DMA. Signed-off-by: Florian Meier <florian.meier(a)koalo.de> --- Sixth version with some style improvements by Joe. sizeof(s128) doesn't work. Therefore, still hardcoded byte counts. .../devicetree/bindings/dma/bcm2835-dma.txt | 56 ++ drivers/dma/Kconfig | 6 + drivers/dma/Makefile | 1 + drivers/dma/bcm2835-dma.c | 744 +++++++++++++++++++++ 4 files changed, 807 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/bcm2835-dma.txt create mode 100644 drivers/dma/bcm2835-dma.c diff --git a/Documentation/devicetree/bindings/dma/bcm2835-dma.txt b/Documentation/devicetree/bindings/dma/bcm2835-dma.txt new file mode 100644 index 0000000..7d91019 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/bcm2835-dma.txt @@ -0,0 +1,56 @@ +* BCM2835 DMA controller + +Required properties: +- compatible: Should be "brcm,bcm2835-dma". +- reg: Should contain DMA registers location and length. +- interrupts: Should contain the DMA interrupts associated + to the DMA channels in ascending order. + First cell is the IRQ bank. + Second cell is the IRQ number. +- #dma-cells: Must be <1>, used to represent the number of integer cells in + the dmas property of client devices. +- brcm,dma-channel-mask: Bit mask representing the channels + not used by the firmware. + +Example: + +dma: dma@7e007000 { + compatible = "brcm,bcm2835-dma"; + reg = <0x7e007000 0xf00>; + interrupts = <1 16 + 1 17 + 1 18 + 1 19 + 1 20 + 1 21 + 1 22 + 1 23 + 1 24 + 1 25 + 1 26 + 1 27 + 1 28>; + + #dma-cells = <1>; + brcm,dma-channel-mask = <0x7f35>; +}; + +DMA clients connected to the BCM2835 DMA controller must use the format +described in the dma.txt file, using a two-cell specifier for each channel: +a phandle plus one integer cells. +The two cells in order are: + +1. A phandle pointing to the DMA controller. +2. The DREQ number. + +Example: + +bcm2835_i2s: i2s@7e203000 { + compatible = "brcm,bcm2835-i2s"; + reg = < 0x7e203000 0x20 + 0x7e101098 0x02>; + + dmas = <&dma 2 + &dma 3>; + dma-names = "tx", "rx"; +}; diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig index c61a6ec..880e723 100644 --- a/drivers/dma/Kconfig +++ b/drivers/dma/Kconfig @@ -300,6 +300,12 @@ config DMA_OMAP select DMA_ENGINE select DMA_VIRTUAL_CHANNELS +config DMA_BCM2835 + tristate "BCM2835 DMA engine support" + depends on (ARCH_BCM2835 || MACH_BCM2708) + select DMA_ENGINE + select DMA_VIRTUAL_CHANNELS + config TI_CPPI41 tristate "AM33xx CPPI41 DMA support" depends on ARCH_OMAP diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile index 0ce2da9..0a6f08e 100644 --- a/drivers/dma/Makefile +++ b/drivers/dma/Makefile @@ -38,6 +38,7 @@ obj-$(CONFIG_EP93XX_DMA) += ep93xx_dma.o obj-$(CONFIG_DMA_SA11X0) += sa11x0-dma.o obj-$(CONFIG_MMP_TDMA) += mmp_tdma.o obj-$(CONFIG_DMA_OMAP) += omap-dma.o +obj-$(CONFIG_DMA_BCM2835) += bcm2835-dma.o obj-$(CONFIG_MMP_PDMA) += mmp_pdma.o obj-$(CONFIG_DMA_JZ4740) += dma-jz4740.o obj-$(CONFIG_TI_CPPI41) += cppi41.o diff --git a/drivers/dma/bcm2835-dma.c b/drivers/dma/bcm2835-dma.c new file mode 100644 index 0000000..23c7fb6 --- /dev/null +++ b/drivers/dma/bcm2835-dma.c @@ -0,0 +1,744 @@ +/* + * BCM2835 DMA engine support + * + * This driver only supports cyclic DMA transfers + * as needed for the I2S module. + * + * Author: Florian Meier, <florian.meier(a)koalo.de> + * Copyright 2013 + * + * based on + * OMAP DMAengine support by Russell King + * + * BCM2708 DMA Driver + * Copyright (C) 2010 Broadcom + * + * Raspberry Pi PCM I2S ALSA Driver + * Copyright (c) by Phil Poole 2013 + * + * MARVELL MMP Peripheral DMA Driver + * Copyright 2012 Marvell International Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#include <linux/dmaengine.h> +#include <linux/dma-mapping.h> +#include <linux/err.h> +#include <linux/init.h> +#include <linux/interrupt.h> +#include <linux/list.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/slab.h> +#include <linux/io.h> +#include <linux/spinlock.h> +#include <linux/of.h> +#include <linux/of_dma.h> + +#include "virt-dma.h" + +struct bcm2835_dmadev { + struct dma_device ddev; + spinlock_t lock; + void __iomem *dma_base; + struct device_dma_parameters dma_parms; +}; + +struct bcm2835_dma_cb { + uint32_t info; + uint32_t src; + uint32_t dst; + uint32_t length; + uint32_t stride; + uint32_t next; + uint32_t pad[2]; +}; + +struct bcm2835_chan { + struct virt_dma_chan vc; + struct list_head node; + + struct dma_slave_config cfg; + bool cyclic; + unsigned dreq; + + int dma_ch; + struct bcm2835_desc *desc; + + void __iomem *dma_chan_base; + int dma_irq_number; +}; + +struct bcm2835_desc { + struct virt_dma_desc vd; + enum dma_transfer_direction dir; + + unsigned int control_block_size; + struct bcm2835_dma_cb *control_block_base; + dma_addr_t control_block_base_phys; + + unsigned frames; + size_t size; +}; + +#define BCM2835_DMA_CS 0x00 +#define BCM2835_DMA_ADDR 0x04 +#define BCM2835_DMA_SOURCE_AD 0x0c +#define BCM2835_DMA_DEST_AD 0x10 +#define BCM2835_DMA_NEXTCB 0x1C + +/* DMA CS Control and Status bits */ +#define BCM2835_DMA_ACTIVE BIT(0) +#define BCM2835_DMA_INT BIT(2) +#define BCM2835_DMA_ISPAUSED BIT(4) /* Pause requested or not active */ +#define BCM2835_DMA_ISHELD BIT(5) /* Is held by DREQ flow control */ +#define BCM2835_DMA_ERR BIT(8) +#define BCM2835_DMA_ABORT BIT(30) /* stop current CB, go to next, WO */ +#define BCM2835_DMA_RESET BIT(31) /* WO, self clearing */ + +#define BCM2835_DMA_INT_EN BIT(0) +#define BCM2835_DMA_D_INC BIT(4) +#define BCM2835_DMA_D_DREQ BIT(6) +#define BCM2835_DMA_S_INC BIT(8) +#define BCM2835_DMA_S_DREQ BIT(10) + +#define BCM2835_DMA_PER_MAP(x) ((x) << 16) + +#define BCM2835_DMA_DATA_TYPE_S8 1 +#define BCM2835_DMA_DATA_TYPE_S16 2 +#define BCM2835_DMA_DATA_TYPE_S32 4 +#define BCM2835_DMA_DATA_TYPE_S128 16 + +/* valid only for channels 0 - 14, 15 has its own base address */ +#define BCM2835_DMA_CHAN(n) ((n) << 8) /* base address */ +#define BCM2835_DMA_CHANIO(dma_base, n) ((dma_base) + BCM2835_DMA_CHAN(n)) + +static inline struct bcm2835_dmadev *to_bcm2835_dma_dev(struct dma_device *d) +{ + return container_of(d, struct bcm2835_dmadev, ddev); +} + +static inline struct bcm2835_chan *to_bcm2835_dma_chan(struct dma_chan *c) +{ + return container_of(c, struct bcm2835_chan, vc.chan); +} + +static inline struct bcm2835_desc *to_bcm2835_dma_desc( + struct dma_async_tx_descriptor *t) +{ + return container_of(t, struct bcm2835_desc, vd.tx); +} + +static void bcm2835_dma_desc_free(struct virt_dma_desc *vd) +{ + struct bcm2835_desc *desc = container_of(vd, struct bcm2835_desc, vd); + dma_free_coherent(desc->vd.tx.chan->device->dev, + desc->control_block_size, + desc->control_block_base, + desc->control_block_base_phys); + kfree(desc); +} + +static int bcm2835_dma_abort(void __iomem *dma_chan_base) +{ + unsigned long int cs; + long int timeout = 10000; + + cs = readl(dma_chan_base + BCM2835_DMA_CS); + if (!(cs & BCM2835_DMA_ACTIVE)) + return 0; + + /* write 0 to the active bit - pause the DMA */ + writel(0, dma_chan_base + BCM2835_DMA_CS); + + /* wait for any current AXI transfer to complete */ + while ((cs & BCM2835_DMA_ISPAUSED) && --timeout >= 0) + cs = readl(dma_chan_base + BCM2835_DMA_CS); + + /* we'll un-pause when we set of our next DMA */ + if (cs & BCM2835_DMA_ISPAUSED) + return -ETIMEDOUT; + + if (!(cs & BCM2835_DMA_ACTIVE)) + return 0; + + /* terminate the control block chain */ + writel(0, dma_chan_base + BCM2835_DMA_NEXTCB); + + /* abort the whole DMA */ + writel(BCM2835_DMA_ABORT | BCM2835_DMA_ACTIVE, + dma_chan_base + BCM2835_DMA_CS); + + return 0; +} + +static void bcm2835_dma_start_desc(struct bcm2835_chan *c) +{ + struct virt_dma_desc *vd = vchan_next_desc(&c->vc); + struct bcm2835_desc *d; + + if (!vd) { + c->desc = NULL; + return; + } + + list_del(&vd->node); + + c->desc = d = to_bcm2835_dma_desc(&vd->tx); + + dsb(); /* ARM data synchronization (push) operation */ + + writel(d->control_block_base_phys, c->dma_chan_base + BCM2835_DMA_ADDR); + writel(BCM2835_DMA_ACTIVE, c->dma_chan_base + BCM2835_DMA_CS); +} + +static irqreturn_t bcm2835_dma_callback(int irq, void *data) +{ + struct bcm2835_chan *c = data; + struct bcm2835_desc *d; + unsigned long flags; + + spin_lock_irqsave(&c->vc.lock, flags); + + /* acknowledge interrupt */ + writel(BCM2835_DMA_INT, c->dma_chan_base + BCM2835_DMA_CS); + + d = c->desc; + + if (d) { + /* TODO Only works for cyclic DMA */ + vchan_cyclic_callback(&d->vd); + } + + /* keep the DMA engine running */ + dsb(); /* ARM synchronization barrier */ + writel(BCM2835_DMA_ACTIVE, c->dma_chan_base + BCM2835_DMA_CS); + + spin_unlock_irqrestore(&c->vc.lock, flags); + + return IRQ_HANDLED; +} + +static int bcm2835_dma_alloc_chan_resources(struct dma_chan *chan) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + + dev_dbg(c->vc.chan.device->dev, + "Allocating DMA channel %i\n", c->dma_ch); + + return request_irq(c->dma_irq_number, + bcm2835_dma_callback, 0, "DMA IRQ", c); +} + +static void bcm2835_dma_free_chan_resources(struct dma_chan *chan) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + + vchan_free_chan_resources(&c->vc); + free_irq(c->dma_irq_number, c); + + dev_dbg(c->vc.chan.device->dev, "Freeing DMA channel %u\n", c->dma_ch); +} + +static size_t bcm2835_dma_desc_size(struct bcm2835_desc *d) +{ + return d->size; +} + +static size_t bcm2835_dma_desc_size_pos(struct bcm2835_desc *d, dma_addr_t addr) +{ + unsigned i; + size_t size = 0; + + for (i = 0; i < d->frames; i++) { + struct bcm2835_dma_cb *control_block = + &d->control_block_base[i]; + size_t this_size = control_block->length; + dma_addr_t dma; + + if (d->dir == DMA_DEV_TO_MEM) + dma = control_block->dst; + else + dma = control_block->src; + + if (size) + size += this_size; + else if (addr >= dma && addr < dma + this_size) + size += dma + this_size - addr; + } + + return size; +} + +static enum dma_status bcm2835_dma_tx_status(struct dma_chan *chan, + dma_cookie_t cookie, struct dma_tx_state *txstate) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + struct virt_dma_desc *vd; + enum dma_status ret; + unsigned long flags; + + ret = dma_cookie_status(chan, cookie, txstate); + if (ret == DMA_SUCCESS || !txstate) + return ret; + + spin_lock_irqsave(&c->vc.lock, flags); + vd = vchan_find_desc(&c->vc, cookie); + if (vd) { + txstate->residue = + bcm2835_dma_desc_size(to_bcm2835_dma_desc(&vd->tx)); + } else if (c->desc && c->desc->vd.tx.cookie == cookie) { + struct bcm2835_desc *d = c->desc; + dma_addr_t pos; + + if (d->dir == DMA_MEM_TO_DEV) + pos = readl(c->dma_chan_base + BCM2835_DMA_SOURCE_AD); + else if (d->dir == DMA_DEV_TO_MEM) + pos = readl(c->dma_chan_base + BCM2835_DMA_DEST_AD); + else + pos = 0; + + txstate->residue = bcm2835_dma_desc_size_pos(d, pos); + } else { + txstate->residue = 0; + } + + spin_unlock_irqrestore(&c->vc.lock, flags); + + return ret; +} + +static void bcm2835_dma_issue_pending(struct dma_chan *chan) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + unsigned long flags; + + c->cyclic = true; /* nothing else is implemented */ + + spin_lock_irqsave(&c->vc.lock, flags); + if (vchan_issue_pending(&c->vc) && !c->desc) + bcm2835_dma_start_desc(c); + + spin_unlock_irqrestore(&c->vc.lock, flags); +} + + +static struct dma_async_tx_descriptor *bcm2835_dma_prep_dma_cyclic( + struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len, + size_t period_len, enum dma_transfer_direction direction, + unsigned long flags, void *context) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + enum dma_slave_buswidth dev_width; + struct bcm2835_desc *d; + dma_addr_t dev_addr; + unsigned es, sync_type; + unsigned frame; + + /* Grab configuration */ + if (direction == DMA_DEV_TO_MEM) { + dev_addr = c->cfg.src_addr; + dev_width = c->cfg.src_addr_width; + sync_type = BCM2835_DMA_S_DREQ; + } else if (direction == DMA_MEM_TO_DEV) { + dev_addr = c->cfg.dst_addr; + dev_width = c->cfg.dst_addr_width; + sync_type = BCM2835_DMA_D_DREQ; + } else { + dev_err(chan->device->dev, "%s: bad direction?\n", __func__); + return NULL; + } + + /* Bus width translates to the element size (ES) */ + switch (dev_width) { + case DMA_SLAVE_BUSWIDTH_4_BYTES: + es = BCM2835_DMA_DATA_TYPE_S32; + break; + default: + return NULL; + } + + /* Now allocate and setup the descriptor. */ + d = kzalloc(sizeof(*d), GFP_NOWAIT); + if (!d) + return NULL; + + d->dir = direction; + d->frames = buf_len / period_len; + + /* Allocate memory for control blocks */ + d->control_block_size = d->frames * sizeof(struct bcm2835_dma_cb); + d->control_block_base = dma_zalloc_coherent(chan->device->dev, + d->control_block_size, &d->control_block_base_phys, + GFP_NOWAIT); + + if (!d->control_block_base) { + kfree(d); + return NULL; + } + + /* + * Iterate over all frames, create a control block + * for each frame and link them together. + */ + for (frame = 0; frame < d->frames; frame++) { + struct bcm2835_dma_cb *control_block = + &d->control_block_base[frame]; + + /* Setup adresses */ + if (d->dir == DMA_DEV_TO_MEM) { + control_block->info = BCM2835_DMA_D_INC; + control_block->src = dev_addr; + control_block->dst = buf_addr + frame * period_len; + } else { + control_block->info = BCM2835_DMA_S_INC; + control_block->src = buf_addr + frame * period_len; + control_block->dst = dev_addr; + } + + /* Enable interrupt */ + control_block->info |= BCM2835_DMA_INT_EN; + + /* Setup synchronization */ + if (sync_type != 0) + control_block->info |= sync_type; + + /* Setup DREQ channel */ + if (c->dreq != 0) + control_block->info |= + BCM2835_DMA_PER_MAP(c->dreq); + + /* Length of a frame */ + control_block->length = period_len; + d->size += control_block->length; + + /* + * Next block is the next frame. + * This DMA engine driver currently only supports cyclic DMA. + * Therefore, wrap around at number of frames. + */ + control_block->next = d->control_block_base_phys + + sizeof(struct bcm2835_dma_cb) + * ((frame + 1) % d->frames); + + /* The following fields are not used here */ + control_block->stride = 0; + control_block->pad[0] = 0; + control_block->pad[1] = 0; + } + + return vchan_tx_prep(&c->vc, &d->vd, flags); +} + +static int bcm2835_dma_slave_config(struct bcm2835_chan *c, + struct dma_slave_config *cfg) +{ + if ((cfg->direction == DMA_DEV_TO_MEM && + cfg->src_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES) || + (cfg->direction == DMA_MEM_TO_DEV && + cfg->dst_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES) || + (cfg->direction != DMA_DEV_TO_MEM && + cfg->direction != DMA_MEM_TO_DEV)) { + return -EINVAL; + } + + c->cfg = *cfg; + + return 0; +} + +static int bcm2835_dma_terminate_all(struct bcm2835_chan *c) +{ + struct bcm2835_dmadev *d = to_bcm2835_dma_dev(c->vc.chan.device); + unsigned long flags; + int timeout = 1000; + LIST_HEAD(head); + + spin_lock_irqsave(&c->vc.lock, flags); + + /* Prevent this channel being scheduled */ + spin_lock(&d->lock); + list_del_init(&c->node); + spin_unlock(&d->lock); + + /* + * Stop DMA activity: we assume the callback will not be called + * after bcm_dma_abort() returns (even if it does, it will see + * c->desc is NULL and exit.) + */ + if (c->desc) { + c->desc = NULL; + bcm2835_dma_abort(c->dma_chan_base); + + /* Wait for stopping */ + while (timeout > 0) { + timeout--; + if (!(readl(c->dma_chan_base + BCM2835_DMA_CS) & + BCM2835_DMA_ACTIVE)) + break; + + cpu_relax(); + } + + if (timeout <= 0) + dev_err(d->ddev.dev, "DMA transfer could not be terminated\n"); + } + + vchan_get_all_descriptors(&c->vc, &head); + spin_unlock_irqrestore(&c->vc.lock, flags); + vchan_dma_desc_free_list(&c->vc, &head); + + return 0; +} + +static int bcm2835_dma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd, + unsigned long arg) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + int ret; + + switch (cmd) { + case DMA_SLAVE_CONFIG: + return bcm2835_dma_slave_config(c, + (struct dma_slave_config *)arg); + + case DMA_TERMINATE_ALL: + bcm2835_dma_terminate_all(c); + break; + + default: + ret = -ENXIO; + break; + } + + return ret; +} + +static int bcm2835_dma_chan_init(struct bcm2835_dmadev *d, int chan_id, int irq) +{ + struct bcm2835_chan *c; + + c = kzalloc(sizeof(*c), GFP_KERNEL); + if (!c) + return -ENOMEM; + + c->vc.desc_free = bcm2835_dma_desc_free; + vchan_init(&c->vc, &d->ddev); + INIT_LIST_HEAD(&c->node); + + d->ddev.chancnt++; + + c->dma_chan_base = BCM2835_DMA_CHANIO(d->dma_base, chan_id); + c->dma_ch = chan_id; + c->dma_irq_number = irq; + + return 0; +} + +static void bcm2835_dma_free(struct bcm2835_dmadev *od) +{ + while (!list_empty(&od->ddev.channels)) { + struct bcm2835_chan *c = list_first_entry(&od->ddev.channels, + struct bcm2835_chan, vc.chan.device_node); + + list_del(&c->vc.chan.device_node); + tasklet_kill(&c->vc.task); + kfree(c); + } +} + +#if defined(CONFIG_OF) +static const struct of_device_id bcm2835_dma_of_match[] = { + { .compatible = "brcm,bcm2835-dma", }, + {}, +}; +MODULE_DEVICE_TABLE(of, bcm2835_dma_of_match); +#endif + +static struct dma_chan *bcm2835_dma_xlate(struct of_phandle_args *dma_spec, + struct of_dma *ofdma) +{ + struct bcm2835_dmadev *d = ofdma->of_dma_data; + struct dma_chan *chan, *candidate; + +retry: + candidate = NULL; + + /* walk the list of channels registered with the current instance and + * find one that is currently unused */ + list_for_each_entry(chan, &d->ddev.channels, device_node) + if (chan->client_count == 0) { + candidate = chan; + break; + } + + if (!candidate) + return NULL; + + /* dma_get_slave_channel will return NULL if we lost a race between + * the lookup and the reservation */ + chan = dma_get_slave_channel(candidate); + + if (chan) { + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + + /* Set DREQ from param */ + c->dreq = dma_spec->args[0]; + + return chan; + } + + goto retry; +} + +static int bcm2835_dma_device_slave_caps(struct dma_chan *dchan, + struct dma_slave_caps *caps) +{ + caps->src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES); + caps->dstn_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES); + caps->directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV); + caps->cmd_pause = false; + caps->cmd_terminate = true; + + return 0; +} + +static int bcm2835_dma_probe(struct platform_device *pdev) +{ + struct bcm2835_dmadev *od; + struct resource *dma_res = NULL; + void __iomem *dma_base = NULL; + int rc = 0; + int i = 0; + int irq; + uint32_t chans_available; + + if (!pdev->dev.dma_mask) + pdev->dev.dma_mask = &pdev->dev.coherent_dma_mask; + + rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); + if (rc) + return rc; + dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); + + od = devm_kzalloc(&pdev->dev, sizeof(*od), GFP_KERNEL); + if (!od) + return -ENOMEM; + + pdev->dev.dma_parms = &od->dma_parms; + dma_set_max_seg_size(&pdev->dev, 0x3FFFFFFF); + + dma_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + dma_base = devm_ioremap_resource(&pdev->dev, dma_res); + if (IS_ERR(dma_base)) + return PTR_ERR(dma_base); + + od->dma_base = dma_base; + + dma_cap_set(DMA_SLAVE, od->ddev.cap_mask); + dma_cap_set(DMA_CYCLIC, od->ddev.cap_mask); + od->ddev.device_alloc_chan_resources = bcm2835_dma_alloc_chan_resources; + od->ddev.device_free_chan_resources = bcm2835_dma_free_chan_resources; + od->ddev.device_tx_status = bcm2835_dma_tx_status; + od->ddev.device_issue_pending = bcm2835_dma_issue_pending; + od->ddev.device_slave_caps = bcm2835_dma_device_slave_caps; + od->ddev.device_prep_dma_cyclic = bcm2835_dma_prep_dma_cyclic; + od->ddev.device_control = bcm2835_dma_control; + od->ddev.dev = &pdev->dev; + INIT_LIST_HEAD(&od->ddev.channels); + spin_lock_init(&od->lock); + + platform_set_drvdata(pdev, od); + + if (pdev->dev.of_node) { + /* Request DMA channel mask from device tree */ + if (of_property_read_u32(pdev->dev.of_node, + "brcm,dma-channel-mask", + &chans_available)) { + dev_err(&pdev->dev, "Failed to get channel mask\n"); + bcm2835_dma_free(od); + return -EINVAL; + } + } else { + dev_err(&pdev->dev, "Failed to get channel mask. No device tree.\n"); + bcm2835_dma_free(od); + return -EINVAL; + } + + /* do not use the FIQ and BULK channels */ + chans_available &= ~0xD; + + for (i = 0; i < pdev->num_resources; i++) { + irq = platform_get_irq(pdev, i); + if (irq < 0) + break; + + if (chans_available & (1 << i)) { + rc = bcm2835_dma_chan_init(od, i, irq); + if (rc) { + bcm2835_dma_free(od); + return rc; + } + } + } + + dev_dbg(&pdev->dev, "Initialized %i DMA channels\n", i); + + if (pdev->dev.of_node) { + /* Device-tree DMA controller registration */ + rc = of_dma_controller_register(pdev->dev.of_node, + bcm2835_dma_xlate, od); + if (rc) { + dev_err(&pdev->dev, "Failed to register DMA controller\n"); + bcm2835_dma_free(od); + return rc; + } + } + + rc = dma_async_device_register(&od->ddev); + if (rc) { + dev_err(&pdev->dev, + "Failed to register slave DMA engine device: %d\n", rc); + bcm2835_dma_free(od); + return rc; + } + + dev_dbg(&pdev->dev, "Load BCM2835 DMA engine driver\n"); + + return rc; +} + +static int bcm2835_dma_remove(struct platform_device *pdev) +{ + struct bcm2835_dmadev *od = platform_get_drvdata(pdev); + + dma_async_device_unregister(&od->ddev); + bcm2835_dma_free(od); + + return 0; +} + +static struct platform_driver bcm2835_dma_driver = { + .probe = bcm2835_dma_probe, + .remove = bcm2835_dma_remove, + .driver = { + .name = "bcm2835-dma", + .owner = THIS_MODULE, + .of_match_table = of_match_ptr(bcm2835_dma_of_match), + }, +}; + +module_platform_driver(bcm2835_dma_driver); + +MODULE_ALIAS("platform:bcm2835-dma"); +MODULE_DESCRIPTION("BCM2835 DMA engine driver"); +MODULE_AUTHOR("Florian Meier <florian.meier(a)koalo.de>"); +MODULE_LICENSE("GPL v2"); -- 1.8.1.2

1 0

[alsa-devel] [PATCH 00/51] DMA mask changes
by Russell King - ARM Linux 15 Nov '13

15 Nov '13

This started out as a request to look at the DMA mask situation, and how to solve the issues which we have on ARM - notably how the DMA mask should be setup. However, I started off reviewing how the dma_mask and coherent_dma_mask was being used, and what I found was rather messy, and in some cases rather buggy. I tried to get some of the bug fixes in before the last merge window, but it seems that the maintainers preferred to have the full solution rather than a simple -rc suitable bug fix. So, this is an attempt to clean things up. The first point here is that drivers performing DMA should be calling dma_set_mask()/dma_set_coherent_mask() in their probe function to verify that DMA can be performed. Lots of ARM drivers omit this step; please refer to the DMA API documentation on this subject. What this means is that the DMA mask provided by bus code is a default value - nothing more. It doesn't have to accurately reflect what the device is actually capable of. Apart from the storage for dev->dma_mask being initialised for any device which is DMA capable, there is no other initialisation which is strictly necessary at device creation time. Now, these cleanups address two major areas: 1. The setting of DMA masks, particularly when both the coherent and streaming DMA masks are set together. 2. The initialisation of DMA masks by drivers - this seems to be becoming a popular habbit, one which may not be entirely the right solution. Rather than having this scattered throughout the tree, I've pulled that into a central location (and called it coercing the DMA mask - because it really is about forcing the DMA mask to be that value.) 3. Finally, addressing the long held misbelief that DMA masks somehow correspond with physical addresses. We already have established long ago that dma_addr_t values returned from the DMA API are the values which you program into the DMA controller, and so are the bus addresses. It is _only_ sane that DMA masks are also bus related too, and not related to physical address spaces. (3) is a very important point for LPAE systems, which may still have less than 4GB of memory, but this memory is all located above the 4GB physical boundary. This means with the current model, any device using a 32-bit DMA mask fails - even though the DMA controller is still only a 32-bit DMA controller but the 32-bit bus addresses map to system memory. To put it another way, the bus addresses have a 4GB physical offset on them. This email is only being sent to the mailing lists in question, not to anyone personally. The list of individuals is far to great to do that. I'm hoping no mailing lists reject the patches based on the number of recipients. Patches based on v3.12-rc1. Documentation/DMA-API-HOWTO.txt | 37 +++++++++------ Documentation/DMA-API.txt | 8 +++ arch/arm/include/asm/dma-mapping.h | 8 +++ arch/arm/mm/dma-mapping.c | 49 ++++++++++++++++++-- arch/arm/mm/init.c | 12 +++--- arch/arm/mm/mm.h | 2 + arch/powerpc/kernel/vio.c | 3 +- block/blk-settings.c | 8 ++-- drivers/amba/bus.c | 6 +-- drivers/ata/pata_ixp4xx_cf.c | 5 ++- drivers/ata/pata_octeon_cf.c | 5 +- drivers/block/nvme-core.c | 10 ++--- drivers/crypto/ixp4xx_crypto.c | 48 ++++++++++---------- drivers/dma/amba-pl08x.c | 5 ++ drivers/dma/dw/platform.c | 8 +-- drivers/dma/edma.c | 6 +-- drivers/dma/pl330.c | 4 ++ drivers/firmware/dcdbas.c | 23 +++++----- drivers/firmware/google/gsmi.c | 13 +++-- drivers/gpu/drm/exynos/exynos_drm_drv.c | 6 ++- drivers/gpu/drm/omapdrm/omap_dmm_tiler.c | 5 +- drivers/media/platform/omap3isp/isp.c | 6 +- drivers/media/platform/omap3isp/isp.h | 3 - drivers/mmc/card/queue.c | 3 +- drivers/mmc/host/sdhci-acpi.c | 5 +- drivers/net/ethernet/broadcom/b44.c | 3 +- drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c | 8 +--- drivers/net/ethernet/brocade/bna/bnad.c | 13 ++---- drivers/net/ethernet/emulex/benet/be_main.c | 12 +---- drivers/net/ethernet/intel/e1000/e1000_main.c | 9 +--- drivers/net/ethernet/intel/e1000e/netdev.c | 18 +++----- drivers/net/ethernet/intel/igb/igb_main.c | 18 +++----- drivers/net/ethernet/intel/igbvf/netdev.c | 18 +++----- drivers/net/ethernet/intel/ixgb/ixgb_main.c | 16 ++----- drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | 15 ++---- drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c | 15 ++---- drivers/net/ethernet/nxp/lpc_eth.c | 6 ++- drivers/net/ethernet/octeon/octeon_mgmt.c | 5 +- drivers/net/ethernet/sfc/efx.c | 12 +----- drivers/net/wireless/b43/dma.c | 9 +--- drivers/net/wireless/b43legacy/dma.c | 9 +--- drivers/of/platform.c | 3 - drivers/parport/parport_pc.c | 8 +++- drivers/scsi/scsi_lib.c | 2 +- drivers/staging/dwc2/platform.c | 5 +- drivers/staging/et131x/et131x.c | 17 +------ drivers/staging/imx-drm/imx-drm-core.c | 8 +++- drivers/staging/imx-drm/ipuv3-crtc.c | 4 +- drivers/staging/media/dt3155v4l/dt3155v4l.c | 5 +-- drivers/usb/chipidea/ci_hdrc_imx.c | 7 +-- drivers/usb/dwc3/dwc3-exynos.c | 7 +-- drivers/usb/gadget/lpc32xx_udc.c | 4 +- drivers/usb/host/bcma-hcd.c | 3 +- drivers/usb/host/ehci-atmel.c | 7 +-- drivers/usb/host/ehci-octeon.c | 4 +- drivers/usb/host/ehci-omap.c | 10 ++-- drivers/usb/host/ehci-orion.c | 7 +-- drivers/usb/host/ehci-platform.c | 10 ++-- drivers/usb/host/ehci-s5p.c | 7 +-- drivers/usb/host/ehci-spear.c | 7 +-- drivers/usb/host/ehci-tegra.c | 7 +-- drivers/usb/host/ohci-at91.c | 9 ++-- drivers/usb/host/ohci-exynos.c | 7 +-- drivers/usb/host/ohci-nxp.c | 5 +- drivers/usb/host/ohci-octeon.c | 5 +- drivers/usb/host/ohci-omap3.c | 10 ++-- drivers/usb/host/ohci-pxa27x.c | 8 ++-- drivers/usb/host/ohci-sa1111.c | 6 +++ drivers/usb/host/ohci-spear.c | 7 +-- drivers/usb/host/ssb-hcd.c | 3 +- drivers/usb/host/uhci-platform.c | 7 +-- drivers/usb/musb/am35x.c | 50 +++++++-------------- drivers/usb/musb/da8xx.c | 49 +++++++------------- drivers/usb/musb/davinci.c | 48 +++++++------------- drivers/usb/musb/tusb6010.c | 49 +++++++------------- drivers/video/amba-clcd.c | 5 ++ include/linux/amba/bus.h | 2 - include/linux/dma-mapping.h | 31 +++++++++++++ sound/arm/pxa2xx-pcm.c | 9 +--- sound/soc/atmel/atmel-pcm.c | 11 ++--- sound/soc/blackfin/bf5xx-ac97-pcm.c | 11 ++--- sound/soc/blackfin/bf5xx-i2s-pcm.c | 10 ++--- sound/soc/davinci/davinci-pcm.c | 9 +--- sound/soc/fsl/fsl_dma.c | 9 +--- sound/soc/fsl/mpc5200_dma.c | 10 ++--- sound/soc/jz4740/jz4740-pcm.c | 12 ++--- sound/soc/kirkwood/kirkwood-dma.c | 9 +--- sound/soc/nuc900/nuc900-pcm.c | 9 ++-- sound/soc/omap/omap-pcm.c | 11 ++--- sound/soc/pxa/pxa2xx-pcm.c | 11 ++--- sound/soc/s6000/s6000-pcm.c | 9 +--- sound/soc/samsung/dma.c | 11 ++--- sound/soc/samsung/idma.c | 11 ++--- 93 files changed, 493 insertions(+), 566 deletions(-)

10 54

[alsa-devel] [PATCH 0/2] Add monaural audio support for fsl_ssi.c
by Nicolin Chen 15 Nov '13

15 Nov '13

This series of patches need to be applied into one single tree because the second patch depends on the first one. Without it, SSI would playback constant noise to the right channel when playback monaural audio files on i.MX6 Series board. We might also need to apply the iomux change to the other i.MX platforms, just currently I don't have those boards so I drop their changes for now. Nicolin Chen (2): ARM: dts: imx: specify the value of audmux pinctrl instead of 0x80000000 ASoC: fsl_ssi: Add monaural audio support for non-ac97 interface arch/arm/boot/dts/imx6qdl.dtsi | 22 +++++++++++----------- sound/soc/fsl/fsl_ssi.c | 22 +++++++++++++++++++--- 2 files changed, 30 insertions(+), 14 deletions(-) -- 1.8.4

3 10

[alsa-devel] [PATCH] ALSA: hda - load EQ params into IDT codec on HP bNB13 systems
by Takashi Iwai 15 Nov '13

15 Nov '13

From: Vitaliy Kulikov <Vitaliy.Kulikov(a)idt.com> Adds linear EQ filtering for integrated speaker protection Signed-off-by: Vitaliy Kulikov <vitaliy.kulikov(a)idt.com> Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- sound/pci/hda/patch_sigmatel.c | 532 ++++++++++++++++++++++++++++++++++++++++- 1 file changed, 531 insertions(+), 1 deletion(-) diff --git a/sound/pci/hda/patch_sigmatel.c b/sound/pci/hda/patch_sigmatel.c index 69a549a82345..d2cc0041d9d3 100644 --- a/sound/pci/hda/patch_sigmatel.c +++ b/sound/pci/hda/patch_sigmatel.c @@ -100,6 +100,7 @@ enum { STAC_92HD83XXX_HEADSET_JACK, STAC_92HD83XXX_HP, STAC_HP_ENVY_BASS, + STAC_HP_BNB13_EQ, STAC_92HD83XXX_MODELS }; @@ -2106,6 +2107,434 @@ static void stac92hd83xxx_fixup_headset_jack(struct hda_codec *codec, spec->headset_jack = 1; } +static const struct hda_verb hp_bnb13_eq_verbs[] = { + /* 44.1KHz base */ + { 0x22, 0x7A6, 0x3E }, + { 0x22, 0x7A7, 0x68 }, + { 0x22, 0x7A8, 0x17 }, + { 0x22, 0x7A9, 0x3E }, + { 0x22, 0x7AA, 0x68 }, + { 0x22, 0x7AB, 0x17 }, + { 0x22, 0x7AC, 0x00 }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x83 }, + { 0x22, 0x7A7, 0x2F }, + { 0x22, 0x7A8, 0xD1 }, + { 0x22, 0x7A9, 0x83 }, + { 0x22, 0x7AA, 0x2F }, + { 0x22, 0x7AB, 0xD1 }, + { 0x22, 0x7AC, 0x01 }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x3E }, + { 0x22, 0x7A7, 0x68 }, + { 0x22, 0x7A8, 0x17 }, + { 0x22, 0x7A9, 0x3E }, + { 0x22, 0x7AA, 0x68 }, + { 0x22, 0x7AB, 0x17 }, + { 0x22, 0x7AC, 0x02 }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x7C }, + { 0x22, 0x7A7, 0xC6 }, + { 0x22, 0x7A8, 0x0C }, + { 0x22, 0x7A9, 0x7C }, + { 0x22, 0x7AA, 0xC6 }, + { 0x22, 0x7AB, 0x0C }, + { 0x22, 0x7AC, 0x03 }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0xC3 }, + { 0x22, 0x7A7, 0x25 }, + { 0x22, 0x7A8, 0xAF }, + { 0x22, 0x7A9, 0xC3 }, + { 0x22, 0x7AA, 0x25 }, + { 0x22, 0x7AB, 0xAF }, + { 0x22, 0x7AC, 0x04 }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x3E }, + { 0x22, 0x7A7, 0x85 }, + { 0x22, 0x7A8, 0x73 }, + { 0x22, 0x7A9, 0x3E }, + { 0x22, 0x7AA, 0x85 }, + { 0x22, 0x7AB, 0x73 }, + { 0x22, 0x7AC, 0x05 }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x85 }, + { 0x22, 0x7A7, 0x39 }, + { 0x22, 0x7A8, 0xC7 }, + { 0x22, 0x7A9, 0x85 }, + { 0x22, 0x7AA, 0x39 }, + { 0x22, 0x7AB, 0xC7 }, + { 0x22, 0x7AC, 0x06 }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x3C }, + { 0x22, 0x7A7, 0x90 }, + { 0x22, 0x7A8, 0xB0 }, + { 0x22, 0x7A9, 0x3C }, + { 0x22, 0x7AA, 0x90 }, + { 0x22, 0x7AB, 0xB0 }, + { 0x22, 0x7AC, 0x07 }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x7A }, + { 0x22, 0x7A7, 0xC6 }, + { 0x22, 0x7A8, 0x39 }, + { 0x22, 0x7A9, 0x7A }, + { 0x22, 0x7AA, 0xC6 }, + { 0x22, 0x7AB, 0x39 }, + { 0x22, 0x7AC, 0x08 }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0xC4 }, + { 0x22, 0x7A7, 0xE9 }, + { 0x22, 0x7A8, 0xDC }, + { 0x22, 0x7A9, 0xC4 }, + { 0x22, 0x7AA, 0xE9 }, + { 0x22, 0x7AB, 0xDC }, + { 0x22, 0x7AC, 0x09 }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x3D }, + { 0x22, 0x7A7, 0xE1 }, + { 0x22, 0x7A8, 0x0D }, + { 0x22, 0x7A9, 0x3D }, + { 0x22, 0x7AA, 0xE1 }, + { 0x22, 0x7AB, 0x0D }, + { 0x22, 0x7AC, 0x0A }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x89 }, + { 0x22, 0x7A7, 0xB6 }, + { 0x22, 0x7A8, 0xEB }, + { 0x22, 0x7A9, 0x89 }, + { 0x22, 0x7AA, 0xB6 }, + { 0x22, 0x7AB, 0xEB }, + { 0x22, 0x7AC, 0x0B }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x39 }, + { 0x22, 0x7A7, 0x9D }, + { 0x22, 0x7A8, 0xFE }, + { 0x22, 0x7A9, 0x39 }, + { 0x22, 0x7AA, 0x9D }, + { 0x22, 0x7AB, 0xFE }, + { 0x22, 0x7AC, 0x0C }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x76 }, + { 0x22, 0x7A7, 0x49 }, + { 0x22, 0x7A8, 0x15 }, + { 0x22, 0x7A9, 0x76 }, + { 0x22, 0x7AA, 0x49 }, + { 0x22, 0x7AB, 0x15 }, + { 0x22, 0x7AC, 0x0D }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0xC8 }, + { 0x22, 0x7A7, 0x80 }, + { 0x22, 0x7A8, 0xF5 }, + { 0x22, 0x7A9, 0xC8 }, + { 0x22, 0x7AA, 0x80 }, + { 0x22, 0x7AB, 0xF5 }, + { 0x22, 0x7AC, 0x0E }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x40 }, + { 0x22, 0x7A7, 0x00 }, + { 0x22, 0x7A8, 0x00 }, + { 0x22, 0x7A9, 0x40 }, + { 0x22, 0x7AA, 0x00 }, + { 0x22, 0x7AB, 0x00 }, + { 0x22, 0x7AC, 0x0F }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x90 }, + { 0x22, 0x7A7, 0x68 }, + { 0x22, 0x7A8, 0xF1 }, + { 0x22, 0x7A9, 0x90 }, + { 0x22, 0x7AA, 0x68 }, + { 0x22, 0x7AB, 0xF1 }, + { 0x22, 0x7AC, 0x10 }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x34 }, + { 0x22, 0x7A7, 0x47 }, + { 0x22, 0x7A8, 0x6C }, + { 0x22, 0x7A9, 0x34 }, + { 0x22, 0x7AA, 0x47 }, + { 0x22, 0x7AB, 0x6C }, + { 0x22, 0x7AC, 0x11 }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x6F }, + { 0x22, 0x7A7, 0x97 }, + { 0x22, 0x7A8, 0x0F }, + { 0x22, 0x7A9, 0x6F }, + { 0x22, 0x7AA, 0x97 }, + { 0x22, 0x7AB, 0x0F }, + { 0x22, 0x7AC, 0x12 }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0xCB }, + { 0x22, 0x7A7, 0xB8 }, + { 0x22, 0x7A8, 0x94 }, + { 0x22, 0x7A9, 0xCB }, + { 0x22, 0x7AA, 0xB8 }, + { 0x22, 0x7AB, 0x94 }, + { 0x22, 0x7AC, 0x13 }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x40 }, + { 0x22, 0x7A7, 0x00 }, + { 0x22, 0x7A8, 0x00 }, + { 0x22, 0x7A9, 0x40 }, + { 0x22, 0x7AA, 0x00 }, + { 0x22, 0x7AB, 0x00 }, + { 0x22, 0x7AC, 0x14 }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x95 }, + { 0x22, 0x7A7, 0x76 }, + { 0x22, 0x7A8, 0x5B }, + { 0x22, 0x7A9, 0x95 }, + { 0x22, 0x7AA, 0x76 }, + { 0x22, 0x7AB, 0x5B }, + { 0x22, 0x7AC, 0x15 }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x31 }, + { 0x22, 0x7A7, 0xAC }, + { 0x22, 0x7A8, 0x31 }, + { 0x22, 0x7A9, 0x31 }, + { 0x22, 0x7AA, 0xAC }, + { 0x22, 0x7AB, 0x31 }, + { 0x22, 0x7AC, 0x16 }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x6A }, + { 0x22, 0x7A7, 0x89 }, + { 0x22, 0x7A8, 0xA5 }, + { 0x22, 0x7A9, 0x6A }, + { 0x22, 0x7AA, 0x89 }, + { 0x22, 0x7AB, 0xA5 }, + { 0x22, 0x7AC, 0x17 }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0xCE }, + { 0x22, 0x7A7, 0x53 }, + { 0x22, 0x7A8, 0xCF }, + { 0x22, 0x7A9, 0xCE }, + { 0x22, 0x7AA, 0x53 }, + { 0x22, 0x7AB, 0xCF }, + { 0x22, 0x7AC, 0x18 }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x40 }, + { 0x22, 0x7A7, 0x00 }, + { 0x22, 0x7A8, 0x00 }, + { 0x22, 0x7A9, 0x40 }, + { 0x22, 0x7AA, 0x00 }, + { 0x22, 0x7AB, 0x00 }, + { 0x22, 0x7AC, 0x19 }, + { 0x22, 0x7AD, 0x80 }, + /* 48KHz base */ + { 0x22, 0x7A6, 0x3E }, + { 0x22, 0x7A7, 0x88 }, + { 0x22, 0x7A8, 0xDC }, + { 0x22, 0x7A9, 0x3E }, + { 0x22, 0x7AA, 0x88 }, + { 0x22, 0x7AB, 0xDC }, + { 0x22, 0x7AC, 0x1A }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x82 }, + { 0x22, 0x7A7, 0xEE }, + { 0x22, 0x7A8, 0x46 }, + { 0x22, 0x7A9, 0x82 }, + { 0x22, 0x7AA, 0xEE }, + { 0x22, 0x7AB, 0x46 }, + { 0x22, 0x7AC, 0x1B }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x3E }, + { 0x22, 0x7A7, 0x88 }, + { 0x22, 0x7A8, 0xDC }, + { 0x22, 0x7A9, 0x3E }, + { 0x22, 0x7AA, 0x88 }, + { 0x22, 0x7AB, 0xDC }, + { 0x22, 0x7AC, 0x1C }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x7D }, + { 0x22, 0x7A7, 0x09 }, + { 0x22, 0x7A8, 0x28 }, + { 0x22, 0x7A9, 0x7D }, + { 0x22, 0x7AA, 0x09 }, + { 0x22, 0x7AB, 0x28 }, + { 0x22, 0x7AC, 0x1D }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0xC2 }, + { 0x22, 0x7A7, 0xE5 }, + { 0x22, 0x7A8, 0xB4 }, + { 0x22, 0x7A9, 0xC2 }, + { 0x22, 0x7AA, 0xE5 }, + { 0x22, 0x7AB, 0xB4 }, + { 0x22, 0x7AC, 0x1E }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x3E }, + { 0x22, 0x7A7, 0xA3 }, + { 0x22, 0x7A8, 0x1F }, + { 0x22, 0x7A9, 0x3E }, + { 0x22, 0x7AA, 0xA3 }, + { 0x22, 0x7AB, 0x1F }, + { 0x22, 0x7AC, 0x1F }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x84 }, + { 0x22, 0x7A7, 0xCA }, + { 0x22, 0x7A8, 0xF1 }, + { 0x22, 0x7A9, 0x84 }, + { 0x22, 0x7AA, 0xCA }, + { 0x22, 0x7AB, 0xF1 }, + { 0x22, 0x7AC, 0x20 }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x3C }, + { 0x22, 0x7A7, 0xD5 }, + { 0x22, 0x7A8, 0x9C }, + { 0x22, 0x7A9, 0x3C }, + { 0x22, 0x7AA, 0xD5 }, + { 0x22, 0x7AB, 0x9C }, + { 0x22, 0x7AC, 0x21 }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x7B }, + { 0x22, 0x7A7, 0x35 }, + { 0x22, 0x7A8, 0x0F }, + { 0x22, 0x7A9, 0x7B }, + { 0x22, 0x7AA, 0x35 }, + { 0x22, 0x7AB, 0x0F }, + { 0x22, 0x7AC, 0x22 }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0xC4 }, + { 0x22, 0x7A7, 0x87 }, + { 0x22, 0x7A8, 0x45 }, + { 0x22, 0x7A9, 0xC4 }, + { 0x22, 0x7AA, 0x87 }, + { 0x22, 0x7AB, 0x45 }, + { 0x22, 0x7AC, 0x23 }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x3E }, + { 0x22, 0x7A7, 0x0A }, + { 0x22, 0x7A8, 0x78 }, + { 0x22, 0x7A9, 0x3E }, + { 0x22, 0x7AA, 0x0A }, + { 0x22, 0x7AB, 0x78 }, + { 0x22, 0x7AC, 0x24 }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x88 }, + { 0x22, 0x7A7, 0xE2 }, + { 0x22, 0x7A8, 0x05 }, + { 0x22, 0x7A9, 0x88 }, + { 0x22, 0x7AA, 0xE2 }, + { 0x22, 0x7AB, 0x05 }, + { 0x22, 0x7AC, 0x25 }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x3A }, + { 0x22, 0x7A7, 0x1A }, + { 0x22, 0x7A8, 0xA3 }, + { 0x22, 0x7A9, 0x3A }, + { 0x22, 0x7AA, 0x1A }, + { 0x22, 0x7AB, 0xA3 }, + { 0x22, 0x7AC, 0x26 }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x77 }, + { 0x22, 0x7A7, 0x1D }, + { 0x22, 0x7A8, 0xFB }, + { 0x22, 0x7A9, 0x77 }, + { 0x22, 0x7AA, 0x1D }, + { 0x22, 0x7AB, 0xFB }, + { 0x22, 0x7AC, 0x27 }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0xC7 }, + { 0x22, 0x7A7, 0xDA }, + { 0x22, 0x7A8, 0xE5 }, + { 0x22, 0x7A9, 0xC7 }, + { 0x22, 0x7AA, 0xDA }, + { 0x22, 0x7AB, 0xE5 }, + { 0x22, 0x7AC, 0x28 }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x40 }, + { 0x22, 0x7A7, 0x00 }, + { 0x22, 0x7A8, 0x00 }, + { 0x22, 0x7A9, 0x40 }, + { 0x22, 0x7AA, 0x00 }, + { 0x22, 0x7AB, 0x00 }, + { 0x22, 0x7AC, 0x29 }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x8E }, + { 0x22, 0x7A7, 0xD7 }, + { 0x22, 0x7A8, 0x22 }, + { 0x22, 0x7A9, 0x8E }, + { 0x22, 0x7AA, 0xD7 }, + { 0x22, 0x7AB, 0x22 }, + { 0x22, 0x7AC, 0x2A }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x35 }, + { 0x22, 0x7A7, 0x26 }, + { 0x22, 0x7A8, 0xC6 }, + { 0x22, 0x7A9, 0x35 }, + { 0x22, 0x7AA, 0x26 }, + { 0x22, 0x7AB, 0xC6 }, + { 0x22, 0x7AC, 0x2B }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x71 }, + { 0x22, 0x7A7, 0x28 }, + { 0x22, 0x7A8, 0xDE }, + { 0x22, 0x7A9, 0x71 }, + { 0x22, 0x7AA, 0x28 }, + { 0x22, 0x7AB, 0xDE }, + { 0x22, 0x7AC, 0x2C }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0xCA }, + { 0x22, 0x7A7, 0xD9 }, + { 0x22, 0x7A8, 0x3A }, + { 0x22, 0x7A9, 0xCA }, + { 0x22, 0x7AA, 0xD9 }, + { 0x22, 0x7AB, 0x3A }, + { 0x22, 0x7AC, 0x2D }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x40 }, + { 0x22, 0x7A7, 0x00 }, + { 0x22, 0x7A8, 0x00 }, + { 0x22, 0x7A9, 0x40 }, + { 0x22, 0x7AA, 0x00 }, + { 0x22, 0x7AB, 0x00 }, + { 0x22, 0x7AC, 0x2E }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x93 }, + { 0x22, 0x7A7, 0x5E }, + { 0x22, 0x7A8, 0xD8 }, + { 0x22, 0x7A9, 0x93 }, + { 0x22, 0x7AA, 0x5E }, + { 0x22, 0x7AB, 0xD8 }, + { 0x22, 0x7AC, 0x2F }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x32 }, + { 0x22, 0x7A7, 0xB7 }, + { 0x22, 0x7A8, 0xB1 }, + { 0x22, 0x7A9, 0x32 }, + { 0x22, 0x7AA, 0xB7 }, + { 0x22, 0x7AB, 0xB1 }, + { 0x22, 0x7AC, 0x30 }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x6C }, + { 0x22, 0x7A7, 0xA1 }, + { 0x22, 0x7A8, 0x28 }, + { 0x22, 0x7A9, 0x6C }, + { 0x22, 0x7AA, 0xA1 }, + { 0x22, 0x7AB, 0x28 }, + { 0x22, 0x7AC, 0x31 }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0xCD }, + { 0x22, 0x7A7, 0x48 }, + { 0x22, 0x7A8, 0x4F }, + { 0x22, 0x7A9, 0xCD }, + { 0x22, 0x7AA, 0x48 }, + { 0x22, 0x7AB, 0x4F }, + { 0x22, 0x7AC, 0x32 }, + { 0x22, 0x7AD, 0x80 }, + { 0x22, 0x7A6, 0x40 }, + { 0x22, 0x7A7, 0x00 }, + { 0x22, 0x7A8, 0x00 }, + { 0x22, 0x7A9, 0x40 }, + { 0x22, 0x7AA, 0x00 }, + { 0x22, 0x7AB, 0x00 }, + { 0x22, 0x7AC, 0x33 }, + { 0x22, 0x7AD, 0x80 }, + /* common */ + { 0x22, 0x782, 0xC1 }, + { 0x22, 0x771, 0x2C }, + { 0x22, 0x772, 0x2C }, + { 0x22, 0x788, 0x04 }, + { 0x01, 0x7B0, 0x08 }, + {} +}; + static const struct hda_fixup stac92hd83xxx_fixups[] = { [STAC_92HD83XXX_REF] = { .type = HDA_FIXUP_PINS, @@ -2174,6 +2603,12 @@ static const struct hda_fixup stac92hd83xxx_fixups[] = { {} }, }, + [STAC_HP_BNB13_EQ] = { + .type = HDA_FIXUP_VERBS, + .v.verbs = hp_bnb13_eq_verbs, + .chained = true, + .chain_id = STAC_92HD83XXX_HP_MIC_LED, + }, }; static const struct hda_model_fixup stac92hd83xxx_models[] = { @@ -2189,6 +2624,7 @@ static const struct hda_model_fixup stac92hd83xxx_models[] = { { .id = STAC_92HD83XXX_HP_MIC_LED, .name = "hp-mic-led" }, { .id = STAC_92HD83XXX_HEADSET_JACK, .name = "headset-jack" }, { .id = STAC_HP_ENVY_BASS, .name = "hp-envy-bass" }, + { .id = STAC_HP_BNB13_EQ, .name = "hp-bnb13-eq" }, {} }; @@ -2235,7 +2671,101 @@ static const struct snd_pci_quirk stac92hd83xxx_fixup_tbl[] = { SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1888, "HP Envy Spectre", STAC_HP_ENVY_BASS), SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18df, - "HP Folio", STAC_92HD83XXX_HP_MIC_LED), + "HP Folio", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18F8, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1909, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190A, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1940, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1941, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1942, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1943, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1944, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1945, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1946, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1948, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1949, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194A, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194B, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194C, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194E, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194F, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1950, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1951, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195A, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195B, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195C, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1991, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2103, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2104, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2105, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2106, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2107, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2108, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2109, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210A, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210B, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211C, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211D, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211E, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211F, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2120, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2121, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2122, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2123, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213E, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213F, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2140, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B2, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B3, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B5, + "HP bNB13", STAC_HP_BNB13_EQ), + SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B6, + "HP bNB13", STAC_HP_BNB13_EQ), SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x1900, "HP", STAC_92HD83XXX_HP_MIC_LED), SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2000, -- 1.8.4.3

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[alsa-devel] [PATCH 1/2] ASoC: cs42l52: Make MICA/B mixer dependent on mic config
by Brian Austin 15 Nov '13

15 Nov '13

MICA/B Single-Ended input selection depends on mica/b config so lets make the mixer controls for them only show for selected mic's Signed-off-by: Brian Austin <brian.austin(a)cirrus.com> --- include/sound/cs42l52.h | 8 ++++---- sound/soc/codecs/cs42l52.c | 37 ++++++++++++++++++++++++++++++------- 2 files changed, 34 insertions(+), 11 deletions(-) diff --git a/include/sound/cs42l52.h b/include/sound/cs42l52.h index daa91f3..bbabf84 100644 --- a/include/sound/cs42l52.h +++ b/include/sound/cs42l52.h @@ -16,11 +16,11 @@ struct cs42l52_platform_data { /* MICBIAS Level. Check datasheet Pg48 */ unsigned int micbias_lvl; - /* MICA mode selection 0=Single 1=Differential */ - unsigned int mica_cfg; + /* MICA mode selection Differential or Single-ended */ + bool mica_diff_cfg; - /* MICB mode selection 0=Single 1=Differential */ - unsigned int micb_cfg; + /* MICB mode selection Differential or Single-ended */ + bool micb_diff_cfg; /* Charge Pump Freq. Check datasheet Pg73 */ unsigned int chgfreq; diff --git a/sound/soc/codecs/cs42l52.c b/sound/soc/codecs/cs42l52.c index 46c8af5..e68450e 100644 --- a/sound/soc/codecs/cs42l52.c +++ b/sound/soc/codecs/cs42l52.c @@ -419,9 +419,6 @@ static const struct snd_kcontrol_new cs42l52_snd_controls[] = { SOC_DOUBLE("Bypass Mute", CS42L52_MISC_CTL, 4, 5, 1, 0), - SOC_ENUM("MICA Select", mica_enum), - SOC_ENUM("MICB Select", micb_enum), - SOC_DOUBLE_R_TLV("MIC Gain Volume", CS42L52_MICA_CTL, CS42L52_MICB_CTL, 0, 0x10, 0, mic_tlv), @@ -528,6 +525,30 @@ static const struct snd_kcontrol_new cs42l52_snd_controls[] = { }; +static const struct snd_kcontrol_new cs42l52_mica_controls[] = { + SOC_ENUM("MICA Select", mica_enum), +}; + +static const struct snd_kcontrol_new cs42l52_micb_controls[] = { + SOC_ENUM("MICB Select", micb_enum), +}; + +static int cs42l52_add_mic_controls(struct snd_soc_codec *codec) +{ + struct cs42l52_private *cs42l52 = snd_soc_codec_get_drvdata(codec); + struct cs42l52_platform_data *pdata = &cs42l52->pdata; + + if (!pdata->mica_diff_cfg) + snd_soc_add_codec_controls(codec, cs42l52_mica_controls, + ARRAY_SIZE(cs42l52_mica_controls)); + + if (!pdata->micb_diff_cfg) + snd_soc_add_codec_controls(codec, cs42l52_micb_controls, + ARRAY_SIZE(cs42l52_micb_controls)); + + return 0; +} + static const struct snd_soc_dapm_widget cs42l52_dapm_widgets[] = { SND_SOC_DAPM_INPUT("AIN1L"), @@ -1104,6 +1125,8 @@ static int cs42l52_probe(struct snd_soc_codec *codec) } regcache_cache_only(cs42l52->regmap, true); + cs42l52_add_mic_controls(codec); + cs42l52_init_beep(codec); cs42l52_set_bias_level(codec, SND_SOC_BIAS_STANDBY); @@ -1221,16 +1244,16 @@ static int cs42l52_i2c_probe(struct i2c_client *i2c_client, reg & 0xFF); /* Set Platform Data */ - if (cs42l52->pdata.mica_cfg) + if (cs42l52->pdata.mica_diff_cfg) regmap_update_bits(cs42l52->regmap, CS42L52_MICA_CTL, CS42L52_MIC_CTL_TYPE_MASK, - cs42l52->pdata.mica_cfg << + cs42l52->pdata.mica_diff_cfg << CS42L52_MIC_CTL_TYPE_SHIFT); - if (cs42l52->pdata.micb_cfg) + if (cs42l52->pdata.micb_diff_cfg) regmap_update_bits(cs42l52->regmap, CS42L52_MICB_CTL, CS42L52_MIC_CTL_TYPE_MASK, - cs42l52->pdata.micb_cfg << + cs42l52->pdata.micb_diff_cfg << CS42L52_MIC_CTL_TYPE_SHIFT); if (cs42l52->pdata.chgfreq) -- 1.8.4.3

2 4

[alsa-devel] [PATCH 00/10] Yet another small covery bug fixes
by Takashi Iwai 15 Nov '13

15 Nov '13

Hi, here is yet another series of fixes for bugs reported by coverity. Mostly driver-specific bugs, no serious ones, as far as I look over them. Takashi

2 12

[alsa-devel] [PATCH V0] ASoC: pxa-ssp: add TISSP mode support
by Qiao Zhou 15 Nov '13

15 Nov '13

add TISSP mode support. with this mode enabled, ssp controller works in TI-ssp protocol automatically and doesn't need to configure sspsp register to set the timing for tx/rx. Signed-off-by: Qiao Zhou <zhouqiao(a)marvell.com> --- include/sound/soc-dai.h | 1 + sound/soc/pxa/pxa-ssp.c | 8 ++++++++ 2 files changed, 9 insertions(+), 0 deletions(-) diff --git a/include/sound/soc-dai.h b/include/sound/soc-dai.h index ae9a227..43fc5d0 100644 --- a/include/sound/soc-dai.h +++ b/include/sound/soc-dai.h @@ -33,6 +33,7 @@ struct snd_compr_stream; #define SND_SOC_DAIFMT_DSP_B 5 /* L data MSB during FRM LRC */ #define SND_SOC_DAIFMT_AC97 6 /* AC97 */ #define SND_SOC_DAIFMT_PDM 7 /* Pulse density modulation */ +#define SND_SOC_DAIFMT_SSP 8 /* SSP mode */ /* left and right justified also known as MSB and LSB respectively */ #define SND_SOC_DAIFMT_MSB SND_SOC_DAIFMT_LEFT_J diff --git a/sound/soc/pxa/pxa-ssp.c b/sound/soc/pxa/pxa-ssp.c index a3119a0..effa8d1 100644 --- a/sound/soc/pxa/pxa-ssp.c +++ b/sound/soc/pxa/pxa-ssp.c @@ -505,6 +505,14 @@ static int pxa_ssp_set_dai_fmt(struct snd_soc_dai *cpu_dai, sscr0 |= SSCR0_MOD | SSCR0_PSP; sscr1 |= SSCR1_TRAIL | SSCR1_RWOT; break; + /* + * add TISSP protocol support. setting to this mode, ssp controller + * works in TI-ssp mode, and need not set psp register to conf + * detailed timing. + */ + case SND_SOC_DAIFMT_SSP: + sscr0 |= SSCR0_TISSP; + sscr1 |= SSCR1_RWOT; default: return -EINVAL; -- 1.7.0.4

3 10

[alsa-devel] [PATCH 1/2] ASoC: cs42l52: Make MICA/B mixer dependent on mic config
by Brian Austin 14 Nov '13

14 Nov '13

MICA/B Single-Ended input selection depends on mica/b config so lets make the mixer controls for them only show for selected mic's Signed-off-by: Brian Austin <brian.austin(a)cirrus.com> --- include/sound/cs42l52.h | 8 ++++---- sound/soc/codecs/cs42l52.c | 37 ++++++++++++++++++++++++++++++------- 2 files changed, 34 insertions(+), 11 deletions(-) diff --git a/include/sound/cs42l52.h b/include/sound/cs42l52.h index daa91f3..bbabf84 100644 --- a/include/sound/cs42l52.h +++ b/include/sound/cs42l52.h @@ -16,11 +16,11 @@ struct cs42l52_platform_data { /* MICBIAS Level. Check datasheet Pg48 */ unsigned int micbias_lvl; - /* MICA mode selection 0=Single 1=Differential */ - unsigned int mica_cfg; + /* MICA mode selection Differential or Single-ended */ + bool mica_diff_cfg; - /* MICB mode selection 0=Single 1=Differential */ - unsigned int micb_cfg; + /* MICB mode selection Differential or Single-ended */ + bool micb_diff_cfg; /* Charge Pump Freq. Check datasheet Pg73 */ unsigned int chgfreq; diff --git a/sound/soc/codecs/cs42l52.c b/sound/soc/codecs/cs42l52.c index 46c8af5..e68450e 100644 --- a/sound/soc/codecs/cs42l52.c +++ b/sound/soc/codecs/cs42l52.c @@ -419,9 +419,6 @@ static const struct snd_kcontrol_new cs42l52_snd_controls[] = { SOC_DOUBLE("Bypass Mute", CS42L52_MISC_CTL, 4, 5, 1, 0), - SOC_ENUM("MICA Select", mica_enum), - SOC_ENUM("MICB Select", micb_enum), - SOC_DOUBLE_R_TLV("MIC Gain Volume", CS42L52_MICA_CTL, CS42L52_MICB_CTL, 0, 0x10, 0, mic_tlv), @@ -528,6 +525,30 @@ static const struct snd_kcontrol_new cs42l52_snd_controls[] = { }; +static const struct snd_kcontrol_new cs42l52_mica_controls[] = { + SOC_ENUM("MICA Select", mica_enum), +}; + +static const struct snd_kcontrol_new cs42l52_micb_controls[] = { + SOC_ENUM("MICB Select", micb_enum), +}; + +static int cs42l52_add_mic_controls(struct snd_soc_codec *codec) +{ + struct cs42l52_private *cs42l52 = snd_soc_codec_get_drvdata(codec); + struct cs42l52_platform_data *pdata = &cs42l52->pdata; + + if (!pdata->mica_diff_cfg) + snd_soc_add_codec_controls(codec, cs42l52_mica_controls, + ARRAY_SIZE(cs42l52_mica_controls)); + + if (!pdata->micb_diff_cfg) + snd_soc_add_codec_controls(codec, cs42l52_micb_controls, + ARRAY_SIZE(cs42l52_micb_controls)); + + return 0; +} + static const struct snd_soc_dapm_widget cs42l52_dapm_widgets[] = { SND_SOC_DAPM_INPUT("AIN1L"), @@ -1104,6 +1125,8 @@ static int cs42l52_probe(struct snd_soc_codec *codec) } regcache_cache_only(cs42l52->regmap, true); + cs42l52_add_mic_controls(codec); + cs42l52_init_beep(codec); cs42l52_set_bias_level(codec, SND_SOC_BIAS_STANDBY); @@ -1221,16 +1244,16 @@ static int cs42l52_i2c_probe(struct i2c_client *i2c_client, reg & 0xFF); /* Set Platform Data */ - if (cs42l52->pdata.mica_cfg) + if (cs42l52->pdata.mica_diff_cfg) regmap_update_bits(cs42l52->regmap, CS42L52_MICA_CTL, CS42L52_MIC_CTL_TYPE_MASK, - cs42l52->pdata.mica_cfg << + cs42l52->pdata.mica_diff_cfg << CS42L52_MIC_CTL_TYPE_SHIFT); - if (cs42l52->pdata.micb_cfg) + if (cs42l52->pdata.micb_diff_cfg) regmap_update_bits(cs42l52->regmap, CS42L52_MICB_CTL, CS42L52_MIC_CTL_TYPE_MASK, - cs42l52->pdata.micb_cfg << + cs42l52->pdata.micb_diff_cfg << CS42L52_MIC_CTL_TYPE_SHIFT); if (cs42l52->pdata.chgfreq) -- 1.8.4.3

1 1

[alsa-devel] [ALSA UCM] Help me obtain complete document of alsa ucm
by Xavier Hsu 14 Nov '13

14 Nov '13

Hi, When I develop ALSA UCM for my target platform. I've stocked by lack syntax description. I already know how to use some syntax of alsa ucm like "EnableSequence" and "DisableSequence" in "SectionVerb". So I can use alsa commands like *alsaucm -c EVB set _verb HiFi set _enadev Headphones* *alsaucm -c EVB set _verb HiFi set _disdev Headphones* to enable or disable our Headphones devices. In addition to, I add some setting like *ATTRS{id}=="EVBsnd", RUN+="/usr/bin/alsaucm -c MB8AC0300 set _verb HiFi"* *ATTRS{id}=="EVBsnd", RUN+="/usr/bin/alsaucm -c MB8AC0300 set _verb Record"* in 90-alsa-ucm.rules file. But I don't know how to correctly use some syntax (such as "ConflictingDevice", "TransitionSequence", "Value" and so on) of alsa ucm. I refer to Use Case Manager in ALSA document. http://www.alsa-project.org/main/index.php/Use_Case_Manager Unfortunately, it cannot resolve my questions. Do you have more detail information about ALSA UCM syntax usage documentation or example? Thank you very much. -Xavier Hsu-

2 1

[alsa-devel] [PATCH] ASoC: wm8962: Turn on regcache_cache_only before disabling regulator
by Nicolin Chen 14 Nov '13

14 Nov '13

It's safer to turn on regcache_cache_only before disabling regulator since the driver will turn off the regcache_cache_only after enabling regulator. If we remain cache_only false, some command like 'amixer cset' would get failure if being run before wm8962_resume(). Signed-off-by: Nicolin Chen <b42378(a)freescale.com> --- sound/soc/codecs/wm8962.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sound/soc/codecs/wm8962.c b/sound/soc/codecs/wm8962.c index 2bf9ee7..1741493 100644 --- a/sound/soc/codecs/wm8962.c +++ b/sound/soc/codecs/wm8962.c @@ -3720,6 +3720,8 @@ static int wm8962_i2c_probe(struct i2c_client *i2c, if (ret < 0) goto err_enable; + regcache_cache_only(wm8962->regmap, true); + /* The drivers should power up as needed */ regulator_bulk_disable(ARRAY_SIZE(wm8962->supplies), wm8962->supplies); -- 1.8.4

2 1

[alsa-devel] [PATCHv4] dmaengine: Add support for BCM2835
by Florian Meier 14 Nov '13

14 Nov '13

Add support for DMA controller of BCM2835 as used in the Raspberry Pi. Currently it only supports cyclic DMA. Signed-off-by: Florian Meier <florian.meier(a)koalo.de> --- Besides of many minor improvements (thanks to your helpful comments), this fourth version does the assignment of the virtual to the hardware channel already in probe. This simplifies things a lot (first of all the complex alloc_chan_resources is now gone). Regarding the maximum segment size: 0x3FFFFFFF is the maximum possible DMA transfer length value and I have no evidence that the maximum segment size is smaller. .../devicetree/bindings/dma/bcm2835-dma.txt | 59 ++ drivers/dma/Kconfig | 6 + drivers/dma/Makefile | 1 + drivers/dma/bcm2835-dma.c | 750 ++++++++++++++++++++ 4 files changed, 816 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/bcm2835-dma.txt create mode 100644 drivers/dma/bcm2835-dma.c diff --git a/Documentation/devicetree/bindings/dma/bcm2835-dma.txt b/Documentation/devicetree/bindings/dma/bcm2835-dma.txt new file mode 100644 index 0000000..bca5e84 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/bcm2835-dma.txt @@ -0,0 +1,59 @@ +* BCM2835 DMA controller + +Required properties: +- compatible: Should be "brcm,bcm2835-dma". +- reg: Should contain DMA registers location and length. +- interrupts: Should contain the DMA interrupts associated + to the DMA channels in ascending order. + First cell is the IRQ bank. + Second cell is the IRQ number. +- #dma-cells: Must be <1>, used to represent the number of integer cells in + the dmas property of client devices. +- dma-channels: Maximum number of DMA channels available. +- dma-requests: Number of DMA Requests. +- brcm,dma-channel-mask: Bit mask representing the channels available. + +Example: + +dma: dma@7e007000 { + compatible = "brcm,bcm2835-dma"; + reg = <0x7e007000 0xf00>; + interrupts = <1 16 + 1 17 + 1 18 + 1 19 + 1 20 + 1 21 + 1 22 + 1 23 + 1 24 + 1 25 + 1 26 + 1 27 + 1 28>; + + #dma-cells = <1>; + dma-channels = <16>; + dma-requests = <32>; + brcm,dma-channel-mask = <0x7f35>; +}; + +DMA clients connected to the BCM2835 DMA controller must use the format +described in the dma.txt file, using a two-cell specifier for each channel: +a phandle plus one integer cells. +The two cells in order are: + +1. A phandle pointing to the DMA controller. +2. The DREQ number. + +Example: + +bcm2835_i2s: i2s@7e203000 { + compatible = "brcm,bcm2835-i2s"; + reg = < 0x7e203000 0x20 + 0x7e101098 0x02>; + + dmas = <&dma 2 + &dma 3>; + dma-names = "tx", "rx"; +}; diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig index c61a6ec..880e723 100644 --- a/drivers/dma/Kconfig +++ b/drivers/dma/Kconfig @@ -300,6 +300,12 @@ config DMA_OMAP select DMA_ENGINE select DMA_VIRTUAL_CHANNELS +config DMA_BCM2835 + tristate "BCM2835 DMA engine support" + depends on (ARCH_BCM2835 || MACH_BCM2708) + select DMA_ENGINE + select DMA_VIRTUAL_CHANNELS + config TI_CPPI41 tristate "AM33xx CPPI41 DMA support" depends on ARCH_OMAP diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile index 0ce2da9..0a6f08e 100644 --- a/drivers/dma/Makefile +++ b/drivers/dma/Makefile @@ -38,6 +38,7 @@ obj-$(CONFIG_EP93XX_DMA) += ep93xx_dma.o obj-$(CONFIG_DMA_SA11X0) += sa11x0-dma.o obj-$(CONFIG_MMP_TDMA) += mmp_tdma.o obj-$(CONFIG_DMA_OMAP) += omap-dma.o +obj-$(CONFIG_DMA_BCM2835) += bcm2835-dma.o obj-$(CONFIG_MMP_PDMA) += mmp_pdma.o obj-$(CONFIG_DMA_JZ4740) += dma-jz4740.o obj-$(CONFIG_TI_CPPI41) += cppi41.o diff --git a/drivers/dma/bcm2835-dma.c b/drivers/dma/bcm2835-dma.c new file mode 100644 index 0000000..baf072e --- /dev/null +++ b/drivers/dma/bcm2835-dma.c @@ -0,0 +1,750 @@ +/* + * BCM2835 DMA engine support + * + * This driver only supports cyclic DMA transfers + * as needed for the I2S module. + * + * Author: Florian Meier, <florian.meier(a)koalo.de> + * Copyright 2013 + * + * based on + * OMAP DMAengine support by Russell King + * + * BCM2708 DMA Driver + * Copyright (C) 2010 Broadcom + * + * Raspberry Pi PCM I2S ALSA Driver + * Copyright (c) by Phil Poole 2013 + * + * MARVELL MMP Peripheral DMA Driver + * Copyright 2012 Marvell International Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#include <linux/dmaengine.h> +#include <linux/dma-mapping.h> +#include <linux/err.h> +#include <linux/init.h> +#include <linux/interrupt.h> +#include <linux/list.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/slab.h> +#include <linux/io.h> +#include <linux/spinlock.h> +#include <linux/of.h> +#include <linux/of_dma.h> + +#include "virt-dma.h" + +struct bcm2835_dmadev { + struct dma_device ddev; + spinlock_t lock; + void __iomem *dma_base; + struct device_dma_parameters dma_parms; +}; + +struct bcm2835_dma_cb { + uint32_t info; + uint32_t src; + uint32_t dst; + uint32_t length; + uint32_t stride; + uint32_t next; + uint32_t pad[2]; +}; + +struct bcm2835_chan { + struct virt_dma_chan vc; + struct list_head node; + + struct dma_slave_config cfg; + bool cyclic; + unsigned dreq; + + int dma_ch; + struct bcm2835_desc *desc; + + void __iomem *dma_chan_base; + int dma_irq_number; +}; + +struct bcm2835_desc { + struct virt_dma_desc vd; + enum dma_transfer_direction dir; + + unsigned int control_block_size; + struct bcm2835_dma_cb *control_block_base; + dma_addr_t control_block_base_phys; + + unsigned frames; + size_t size; +}; + +#define BCM2835_DMA_CS 0x00 +#define BCM2835_DMA_ADDR 0x04 +#define BCM2835_DMA_SOURCE_AD 0x0c +#define BCM2835_DMA_DEST_AD 0x10 +#define BCM2835_DMA_NEXTCB 0x1C + +/* DMA CS Control and Status bits */ +#define BCM2835_DMA_ACTIVE (1 << 0) +#define BCM2835_DMA_INT (1 << 2) +#define BCM2835_DMA_ISPAUSED (1 << 4) /* Pause requested or not active */ +#define BCM2835_DMA_ISHELD (1 << 5) /* Is held by DREQ flow control */ +#define BCM2835_DMA_ERR (1 << 8) +#define BCM2835_DMA_ABORT (1 << 30) /* stop current CB, go to next, WO */ +#define BCM2835_DMA_RESET (1 << 31) /* WO, self clearing */ + +#define BCM2835_DMA_INT_EN (1 << 0) +#define BCM2835_DMA_D_INC (1 << 4) +#define BCM2835_DMA_D_DREQ (1 << 6) +#define BCM2835_DMA_S_INC (1 << 8) +#define BCM2835_DMA_S_DREQ (1 << 6) + +#define BCM2835_DMA_PER_MAP(x) ((x) << 16) + +#define BCM2835_DMA_DATA_TYPE_S8 1 +#define BCM2835_DMA_DATA_TYPE_S16 2 +#define BCM2835_DMA_DATA_TYPE_S32 4 +#define BCM2835_DMA_DATA_TYPE_S128 16 + +/* valid only for channels 0 - 14, 15 has its own base address */ +#define BCM2835_DMA_CHAN(n) ((n) << 8) /* base address */ +#define BCM2835_DMA_CHANIO(dma_base, n) ((dma_base) + BCM2835_DMA_CHAN(n)) + +static inline struct bcm2835_dmadev *to_bcm2835_dma_dev(struct dma_device *d) +{ + return container_of(d, struct bcm2835_dmadev, ddev); +} + +static inline struct bcm2835_chan *to_bcm2835_dma_chan(struct dma_chan *c) +{ + return container_of(c, struct bcm2835_chan, vc.chan); +} + +static inline struct bcm2835_desc *to_bcm2835_dma_desc( + struct dma_async_tx_descriptor *t) +{ + return container_of(t, struct bcm2835_desc, vd.tx); +} + +static void bcm2835_dma_desc_free(struct virt_dma_desc *vd) +{ + struct bcm2835_desc *desc = container_of(vd, struct bcm2835_desc, vd); + dma_free_coherent(desc->vd.tx.chan->device->dev, + desc->control_block_size, + desc->control_block_base, + desc->control_block_base_phys); + kfree(desc); +} + +static int bcm2835_dma_abort(void __iomem *dma_chan_base) +{ + unsigned long int cs; + int rc = 0; + + cs = readl(dma_chan_base + BCM2835_DMA_CS); + + if (BCM2835_DMA_ACTIVE & cs) { + long int timeout = 10000; + + /* write 0 to the active bit - pause the DMA */ + writel(0, dma_chan_base + BCM2835_DMA_CS); + + /* wait for any current AXI transfer to complete */ + while ((cs & BCM2835_DMA_ISPAUSED) && --timeout >= 0) + cs = readl(dma_chan_base + BCM2835_DMA_CS); + + if (cs & BCM2835_DMA_ISPAUSED) { + /* we'll un-pause when we set of our next DMA */ + rc = -ETIMEDOUT; + + } else if (BCM2835_DMA_ACTIVE & cs) { + /* terminate the control block chain */ + writel(0, dma_chan_base + BCM2835_DMA_NEXTCB); + + /* abort the whole DMA */ + writel(BCM2835_DMA_ABORT | BCM2835_DMA_ACTIVE, + dma_chan_base + BCM2835_DMA_CS); + } + } + + return rc; +} + +static void bcm2835_dma_start_desc(struct bcm2835_chan *c) +{ + struct virt_dma_desc *vd = vchan_next_desc(&c->vc); + struct bcm2835_desc *d; + + if (!vd) { + c->desc = NULL; + return; + } + + list_del(&vd->node); + + c->desc = d = to_bcm2835_dma_desc(&vd->tx); + + dsb(); /* ARM data synchronization (push) operation */ + + writel(d->control_block_base_phys, c->dma_chan_base + BCM2835_DMA_ADDR); + writel(BCM2835_DMA_ACTIVE, c->dma_chan_base + BCM2835_DMA_CS); +} + +static irqreturn_t bcm2835_dma_callback(int irq, void *data) +{ + struct bcm2835_chan *c = data; + struct bcm2835_desc *d; + unsigned long flags; + + spin_lock_irqsave(&c->vc.lock, flags); + + /* acknowledge interrupt */ + writel(BCM2835_DMA_INT, c->dma_chan_base + BCM2835_DMA_CS); + + d = c->desc; + + if (d) { + /* TODO Only works for cyclic DMA */ + vchan_cyclic_callback(&d->vd); + } + + /* keep the DMA engine running */ + dsb(); /* ARM synchronization barrier */ + writel(BCM2835_DMA_ACTIVE, c->dma_chan_base + BCM2835_DMA_CS); + + spin_unlock_irqrestore(&c->vc.lock, flags); + + return IRQ_HANDLED; +} + +static int bcm2835_dma_alloc_chan_resources(struct dma_chan *chan) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + + dev_dbg(c->vc.chan.device->dev, + "Allocating DMA channel %i\n", c->dma_ch); + + return request_irq(c->dma_irq_number, + bcm2835_dma_callback, 0, "DMA IRQ", c); +} + +static void bcm2835_dma_free_chan_resources(struct dma_chan *chan) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + + vchan_free_chan_resources(&c->vc); + free_irq(c->dma_irq_number, c); + + dev_dbg(c->vc.chan.device->dev, "Freeing DMA channel %u\n", c->dma_ch); +} + +static size_t bcm2835_dma_desc_size(struct bcm2835_desc *d) +{ + return d->size; +} + +static size_t bcm2835_dma_desc_size_pos(struct bcm2835_desc *d, dma_addr_t addr) +{ + unsigned i; + size_t size; + + for (size = i = 0; i < d->frames; i++) { + struct bcm2835_dma_cb *control_block = + &d->control_block_base[i]; + size_t this_size = control_block->length; + dma_addr_t dma; + + if (d->dir == DMA_DEV_TO_MEM) + dma = control_block->dst; + else + dma = control_block->src; + + if (size) + size += this_size; + else if (addr >= dma && addr < dma + this_size) + size += dma + this_size - addr; + } + + return size; +} + +static enum dma_status bcm2835_dma_tx_status(struct dma_chan *chan, + dma_cookie_t cookie, struct dma_tx_state *txstate) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + struct virt_dma_desc *vd; + enum dma_status ret; + unsigned long flags; + + ret = dma_cookie_status(chan, cookie, txstate); + if (ret == DMA_SUCCESS || !txstate) + return ret; + + spin_lock_irqsave(&c->vc.lock, flags); + vd = vchan_find_desc(&c->vc, cookie); + if (vd) { + txstate->residue = + bcm2835_dma_desc_size(to_bcm2835_dma_desc(&vd->tx)); + } else if (c->desc && c->desc->vd.tx.cookie == cookie) { + struct bcm2835_desc *d = c->desc; + dma_addr_t pos; + + if (d->dir == DMA_MEM_TO_DEV) + pos = readl(c->dma_chan_base + BCM2835_DMA_SOURCE_AD); + else if (d->dir == DMA_DEV_TO_MEM) + pos = readl(c->dma_chan_base + BCM2835_DMA_DEST_AD); + else + pos = 0; + + txstate->residue = bcm2835_dma_desc_size_pos(d, pos); + } else { + txstate->residue = 0; + } + + spin_unlock_irqrestore(&c->vc.lock, flags); + + return ret; +} + +static void bcm2835_dma_issue_pending(struct dma_chan *chan) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + unsigned long flags; + + c->cyclic = true; /* nothing else is implemented */ + + spin_lock_irqsave(&c->vc.lock, flags); + if (vchan_issue_pending(&c->vc) && !c->desc) + bcm2835_dma_start_desc(c); + + spin_unlock_irqrestore(&c->vc.lock, flags); +} + + +static struct dma_async_tx_descriptor *bcm2835_dma_prep_dma_cyclic( + struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len, + size_t period_len, enum dma_transfer_direction direction, + unsigned long flags, void *context) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + enum dma_slave_buswidth dev_width; + struct bcm2835_desc *d; + dma_addr_t dev_addr; + unsigned es, sync_type; + unsigned frame; + + /* Grab configuration */ + if (direction == DMA_DEV_TO_MEM) { + dev_addr = c->cfg.src_addr; + dev_width = c->cfg.src_addr_width; + sync_type = BCM2835_DMA_S_DREQ; + } else if (direction == DMA_MEM_TO_DEV) { + dev_addr = c->cfg.dst_addr; + dev_width = c->cfg.dst_addr_width; + sync_type = BCM2835_DMA_D_DREQ; + } else { + dev_err(chan->device->dev, "%s: bad direction?\n", __func__); + return NULL; + } + + /* Bus width translates to the element size (ES) */ + switch (dev_width) { + case DMA_SLAVE_BUSWIDTH_4_BYTES: + es = BCM2835_DMA_DATA_TYPE_S32; + break; + default: + return NULL; + } + + /* Now allocate and setup the descriptor. */ + d = kzalloc(sizeof(*d), GFP_NOWAIT); + if (!d) + return NULL; + + d->dir = direction; + d->frames = buf_len / period_len; + + /* Allocate memory for control blocks */ + d->control_block_size = d->frames * sizeof(struct bcm2835_dma_cb); + d->control_block_base = dma_alloc_coherent(chan->device->dev, + d->control_block_size, &d->control_block_base_phys, + GFP_NOWAIT); + + if (!d->control_block_base) { + kfree(d); + dev_err(chan->device->dev, + "%s: Memory allocation error\n", __func__); + return NULL; + } + + memset(d->control_block_base, 0, d->control_block_size); + + /* + * Iterate over all frames, create a control block + * for each frame and link them together. + */ + for (frame = 0; frame < d->frames; frame++) { + struct bcm2835_dma_cb *control_block = + &d->control_block_base[frame]; + + /* Setup adresses */ + if (d->dir == DMA_DEV_TO_MEM) { + control_block->info = BCM2835_DMA_D_INC; + control_block->src = dev_addr; + control_block->dst = buf_addr + frame * period_len; + } else { + control_block->info = BCM2835_DMA_S_INC; + control_block->src = buf_addr + frame * period_len; + control_block->dst = dev_addr; + } + + /* Enable interrupt */ + control_block->info |= BCM2835_DMA_INT_EN; + + /* Setup synchronization */ + if (sync_type != 0) + control_block->info |= sync_type; + + /* Setup DREQ channel */ + if (c->dreq != 0) + control_block->info |= + BCM2835_DMA_PER_MAP(c->dreq); + + /* Length of a frame */ + control_block->length = period_len; + d->size += control_block->length; + + /* + * Next block is the next frame. + * This DMA engine driver currently only supports cyclic DMA. + * Therefore, wrap around at number of frames. + */ + control_block->next = d->control_block_base_phys + + sizeof(struct bcm2835_dma_cb) + * ((frame + 1) % d->frames); + + /* The following fields are not used here */ + control_block->stride = 0; + control_block->pad[0] = 0; + control_block->pad[1] = 0; + } + + return vchan_tx_prep(&c->vc, &d->vd, flags); +} + +static int bcm2835_dma_slave_config(struct bcm2835_chan *c, + struct dma_slave_config *cfg) +{ + if ((cfg->direction == DMA_DEV_TO_MEM && + cfg->src_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES) || + (cfg->direction == DMA_MEM_TO_DEV && + cfg->dst_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES) || + (cfg->direction != DMA_DEV_TO_MEM && + cfg->direction != DMA_MEM_TO_DEV)) { + return -EINVAL; + } + + c->cfg = *cfg; + + return 0; +} + +static int bcm2835_dma_terminate_all(struct bcm2835_chan *c) +{ + struct bcm2835_dmadev *d = to_bcm2835_dma_dev(c->vc.chan.device); + unsigned long flags; + int timeout = 1000; + LIST_HEAD(head); + + spin_lock_irqsave(&c->vc.lock, flags); + + /* Prevent this channel being scheduled */ + spin_lock(&d->lock); + list_del_init(&c->node); + spin_unlock(&d->lock); + + /* + * Stop DMA activity: we assume the callback will not be called + * after bcm_dma_abort() returns (even if it does, it will see + * c->desc is NULL and exit.) + */ + if (c->desc) { + c->desc = NULL; + bcm2835_dma_abort(c->dma_chan_base); + + /* Wait for stopping */ + while (timeout > 0) { + timeout--; + if (!(readl(c->dma_chan_base + BCM2835_DMA_CS) & + BCM2835_DMA_ACTIVE)) + break; + + cpu_relax(); + } + + if (timeout <= 0) + dev_err(d->ddev.dev, "DMA transfer could not be terminated\n"); + } + + vchan_get_all_descriptors(&c->vc, &head); + spin_unlock_irqrestore(&c->vc.lock, flags); + vchan_dma_desc_free_list(&c->vc, &head); + + return 0; +} + +static int bcm2835_dma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd, + unsigned long arg) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + int ret; + + switch (cmd) { + case DMA_SLAVE_CONFIG: + return bcm2835_dma_slave_config(c, + (struct dma_slave_config *)arg); + + case DMA_TERMINATE_ALL: + bcm2835_dma_terminate_all(c); + break; + + default: + ret = -ENXIO; + break; + } + + return ret; +} + +static int bcm2835_dma_chan_init(struct bcm2835_dmadev *d, int chan_id, int irq) +{ + struct bcm2835_chan *c; + + c = kzalloc(sizeof(*c), GFP_KERNEL); + if (!c) + return -ENOMEM; + + c->vc.desc_free = bcm2835_dma_desc_free; + vchan_init(&c->vc, &d->ddev); + INIT_LIST_HEAD(&c->node); + + d->ddev.chancnt++; + + c->dma_chan_base = BCM2835_DMA_CHANIO(d->dma_base, chan_id); + c->dma_ch = chan_id; + c->dma_irq_number = irq; + + return 0; +} + +static void bcm2835_dma_free(struct bcm2835_dmadev *od) +{ + while (!list_empty(&od->ddev.channels)) { + struct bcm2835_chan *c = list_first_entry(&od->ddev.channels, + struct bcm2835_chan, vc.chan.device_node); + + list_del(&c->vc.chan.device_node); + tasklet_kill(&c->vc.task); + kfree(c); + } +} + +#if defined(CONFIG_OF) +static const struct of_device_id bcm2835_dma_of_match[] = { + { .compatible = "brcm,bcm2835-dma", }, + {}, +}; +MODULE_DEVICE_TABLE(of, bcm2835_dma_of_match); +#endif + +static struct dma_chan *bcm2835_dma_xlate(struct of_phandle_args *dma_spec, + struct of_dma *ofdma) +{ + struct bcm2835_dmadev *d = ofdma->of_dma_data; + struct dma_chan *chan, *candidate; + +retry: + candidate = NULL; + + /* walk the list of channels registered with the current instance and + * find one that is currently unused */ + list_for_each_entry(chan, &d->ddev.channels, device_node) + if (chan->client_count == 0) { + candidate = chan; + break; + } + + if (!candidate) + return NULL; + + /* dma_get_slave_channel will return NULL if we lost a race between + * the lookup and the reservation */ + chan = dma_get_slave_channel(candidate); + + if (chan) { + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + + /* Set DREQ from param */ + c->dreq = dma_spec->args[0]; + + return chan; + } + + goto retry; +} + +static int bcm2835_dma_device_slave_caps(struct dma_chan *dchan, + struct dma_slave_caps *caps) +{ + caps->src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES); + caps->dstn_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES); + caps->directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV); + caps->cmd_pause = false; + caps->cmd_terminate = true; + + return 0; +} + +static int bcm2835_dma_probe(struct platform_device *pdev) +{ + struct bcm2835_dmadev *od; + struct resource *dma_res = NULL; + void __iomem *dma_base = NULL; + int rc = 0; + int i = 0; + int irq; + uint32_t chans_available; + + if (!pdev->dev.dma_mask) + pdev->dev.dma_mask = &pdev->dev.coherent_dma_mask; + + rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); + if (rc) + return rc; + dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); + + od = devm_kzalloc(&pdev->dev, sizeof(*od), GFP_KERNEL); + if (!od) + return -ENOMEM; + + pdev->dev.dma_parms = &od->dma_parms; + dma_set_max_seg_size(&pdev->dev, 0x3FFFFFFF); + + dma_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + dma_base = devm_ioremap_resource(&pdev->dev, dma_res); + if (IS_ERR(dma_base)) + return PTR_ERR(dma_base); + + od->dma_base = dma_base; + + dma_cap_set(DMA_SLAVE, od->ddev.cap_mask); + dma_cap_set(DMA_CYCLIC, od->ddev.cap_mask); + od->ddev.device_alloc_chan_resources = bcm2835_dma_alloc_chan_resources; + od->ddev.device_free_chan_resources = bcm2835_dma_free_chan_resources; + od->ddev.device_tx_status = bcm2835_dma_tx_status; + od->ddev.device_issue_pending = bcm2835_dma_issue_pending; + od->ddev.device_slave_caps = bcm2835_dma_device_slave_caps; + od->ddev.device_prep_dma_cyclic = bcm2835_dma_prep_dma_cyclic; + od->ddev.device_control = bcm2835_dma_control; + od->ddev.dev = &pdev->dev; + INIT_LIST_HEAD(&od->ddev.channels); + spin_lock_init(&od->lock); + + platform_set_drvdata(pdev, od); + + if (pdev->dev.of_node) { + const void *chan_mask; + + /* Device-tree DMA controller registration */ + rc = of_dma_controller_register(pdev->dev.of_node, + bcm2835_dma_xlate, od); + if (rc) { + dev_err(&pdev->dev, "Failed to register DMA controller\n"); + dma_async_device_unregister(&od->ddev); + bcm2835_dma_free(od); + return rc; + } + + /* Request DMA channel mask from device tree */ + chan_mask = of_get_property(pdev->dev.of_node, + "brcm,dma-channel-mask", NULL); + + if (!chan_mask) { + dev_err(&pdev->dev, "Failed to get channel mask\n"); + dma_async_device_unregister(&od->ddev); + bcm2835_dma_free(od); + return -EINVAL; + } + + chans_available = be32_to_cpup(chan_mask); + + /* do not use the FIQ and BULK channels */ + chans_available &= ~0xD; + + for (i = 0; i < pdev->num_resources; i++) { + irq = platform_get_irq(pdev, i); + if (irq < 0) + break; + + if (chans_available & (1 << i)) { + rc = bcm2835_dma_chan_init(od, i, irq); + if (rc) { + bcm2835_dma_free(od); + return rc; + } + } + } + } + + dev_dbg(&pdev->dev, "Initialized %i DMA channels\n", i); + + rc = dma_async_device_register(&od->ddev); + if (rc) { + dev_err(&pdev->dev, + "Failed to register slave DMA engine device: %d\n", rc); + bcm2835_dma_free(od); + return rc; + } + + dev_dbg(&pdev->dev, "Load BCM2835 DMA engine driver\n"); + + return rc; +} + +static int bcm2835_dma_remove(struct platform_device *pdev) +{ + struct bcm2835_dmadev *od = platform_get_drvdata(pdev); + + dma_async_device_unregister(&od->ddev); + bcm2835_dma_free(od); + + return 0; +} + +static struct platform_driver bcm2835_dma_driver = { + .probe = bcm2835_dma_probe, + .remove = bcm2835_dma_remove, + .driver = { + .name = "bcm2835-dma", + .owner = THIS_MODULE, + .of_match_table = of_match_ptr(bcm2835_dma_of_match), + }, +}; + +module_platform_driver(bcm2835_dma_driver); + +MODULE_ALIAS("platform:bcm2835-dma"); +MODULE_DESCRIPTION("BCM2835 DMA engine driver"); +MODULE_AUTHOR("Florian Meier <florian.meier(a)koalo.de>"); +MODULE_LICENSE("GPL v2"); -- 1.7.9.5

3 13

[alsa-devel] [PATCH] ALSA: jack: Unregister input device at disconnection
by Takashi Iwai 14 Nov '13

14 Nov '13

The recent change in sysfs triggered a kernel WARNING at unloading a sound driver like WARNING: CPU: 3 PID: 2247 at fs/sysfs/group.c:214 sysfs_remove_group+0xe8/0xf0() sysfs group ffffffff81ab7b20 not found for kobject 'event14' for each jack instance. It's because the unregistration of jack input device is done in dev_free callback, which is called after snd_card_disconnect(). Since device_unregister(card->card_dev) is called in snd_card_disconnect(), the whole sysfs entries belonging to card->card_dev have been already removed recursively. Thus this results in a warning as input_unregister_device() yet tries to unregister the already removed sysfs entry. For fixing this mess, we need to unregister the jack input device at dev_disconnect callback so that it's called before unregistering the card->card_dev. Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- sound/core/jack.c | 19 ++++++++++++++++--- 1 file changed, 16 insertions(+), 3 deletions(-) diff --git a/sound/core/jack.c b/sound/core/jack.c index b35fe7345c20..8658578eb584 100644 --- a/sound/core/jack.c +++ b/sound/core/jack.c @@ -34,12 +34,12 @@ static int jack_switch_types[SND_JACK_SWITCH_TYPES] = { SW_LINEIN_INSERT, }; -static int snd_jack_dev_free(struct snd_device *device) +static int snd_jack_dev_disconnect(struct snd_device *device) { struct snd_jack *jack = device->device_data; - if (jack->private_free) - jack->private_free(jack); + if (!jack->input_dev) + return 0; /* If the input device is registered with the input subsystem * then we need to use a different deallocator. */ @@ -47,6 +47,18 @@ static int snd_jack_dev_free(struct snd_device *device) input_unregister_device(jack->input_dev); else input_free_device(jack->input_dev); + jack->input_dev = NULL; + return 0; +} + +static int snd_jack_dev_free(struct snd_device *device) +{ + struct snd_jack *jack = device->device_data; + + if (jack->private_free) + jack->private_free(jack); + + snd_jack_dev_disconnect(device); kfree(jack->id); kfree(jack); @@ -110,6 +122,7 @@ int snd_jack_new(struct snd_card *card, const char *id, int type, static struct snd_device_ops ops = { .dev_free = snd_jack_dev_free, .dev_register = snd_jack_dev_register, + .dev_disconnect = snd_jack_dev_disconnect, }; jack = kzalloc(sizeof(struct snd_jack), GFP_KERNEL); -- 1.8.4.2

2 1

[alsa-devel] [PATCH] ALSA: pcsp: Fix the order of input device unregistration
by Takashi Iwai 14 Nov '13

14 Nov '13

The current code may access to the already freed object. The input device must be accessed and unregistered before freeing the top level sound object. Cc: <stable(a)vger.kernel.org> Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- sound/drivers/pcsp/pcsp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/drivers/pcsp/pcsp.c b/sound/drivers/pcsp/pcsp.c index f664bae3b9b0..328bd29264ce 100644 --- a/sound/drivers/pcsp/pcsp.c +++ b/sound/drivers/pcsp/pcsp.c @@ -188,8 +188,8 @@ static int pcsp_probe(struct platform_device *dev) static int pcsp_remove(struct platform_device *dev) { struct snd_pcsp *chip = platform_get_drvdata(dev); - alsa_card_pcsp_exit(chip); pcspkr_input_remove(chip->input_dev); + alsa_card_pcsp_exit(chip); return 0; } -- 1.8.4.2

1 0

[alsa-devel] SPI PCM capture device examples please
by Matt Flax 14 Nov '13

14 Nov '13

Hi there, Is it possible to write an ALSA driver for a device which already has an SPI driver ? I have been trying to look for examples in the ALSA kernel source tree, however all the drivers I have looked at use SPI to control the codecs .... there must be an example where the codec uses SPI for PCM data ? If someone is aware of any codecs which use SPI for PCM data can you please link me to the example driver code ? The device I am interested in operates in slave SPI mode and only has ADCs, so it only has one input SPI line (and other necessary lines, such as clk). Its data sample rates are up to 1 M Hz. Here is a link to the SPI driver in question : http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/drivers… thanks Matt

3 3

[alsa-devel] [PATCH] ASoC: fsl: imx-pcm-fiq: omit fiq counter to avoid harm in unbalanced situations
by Oskar Schirmer 14 Nov '13

14 Nov '13

Unbalanced calls to snd_imx_pcm_trigger() may result in endless FIQ activity and thus provoke eternal sound. While on the first glance, the switch statement looks pretty symmetric, the SUSPEND/RESUME pair is not: the suspend case comes along snd_pcm_suspend_all(), which for fsl/imx-pcm-fiq is called only at snd_soc_suspend(), but the resume case originates straight from the SNDRV_PCM_IOCTL_RESUME. This way userland may provoke an unbalanced resume, which might cause the fiq_enable counter to increase and never return to zero again, so eventually imx_pcm_fiq is never disabled. Simply removing the fiq_enable will solve the problem, as long as one never goes play and capture game simultaneously, but beware trying both at once, the early TRIGGER_STOP will cut off the other activity prematurely. So now playing and capturing is scrutinized separately, instead of by counting. Signed-off-by: Oskar Schirmer <oskar(a)scara.com> --- sound/soc/fsl/imx-pcm-fiq.c | 29 +++++++++++++++++------------ 1 file changed, 17 insertions(+), 12 deletions(-) diff --git a/sound/soc/fsl/imx-pcm-fiq.c b/sound/soc/fsl/imx-pcm-fiq.c index 10e3305..f00b512 100644 --- a/sound/soc/fsl/imx-pcm-fiq.c +++ b/sound/soc/fsl/imx-pcm-fiq.c @@ -42,7 +42,8 @@ struct imx_pcm_runtime_data { struct hrtimer hrt; int poll_time_ns; struct snd_pcm_substream *substream; - atomic_t running; + atomic_t playing; + atomic_t capturing; }; static enum hrtimer_restart snd_hrtimer_callback(struct hrtimer *hrt) @@ -52,7 +53,7 @@ static enum hrtimer_restart snd_hrtimer_callback(struct hrtimer *hrt) struct snd_pcm_substream *substream = iprtd->substream; struct pt_regs regs; - if (!atomic_read(&iprtd->running)) + if (!atomic_read(&iprtd->playing) && !atomic_read(&iprtd->capturing)) return HRTIMER_NORESTART; get_fiq_regs(&regs); @@ -106,7 +107,6 @@ static int snd_imx_pcm_prepare(struct snd_pcm_substream *substream) return 0; } -static int fiq_enable; static int imx_pcm_fiq; static int snd_imx_pcm_trigger(struct snd_pcm_substream *substream, int cmd) @@ -118,23 +118,27 @@ static int snd_imx_pcm_trigger(struct snd_pcm_substream *substream, int cmd) case SNDRV_PCM_TRIGGER_START: case SNDRV_PCM_TRIGGER_RESUME: case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: - atomic_set(&iprtd->running, 1); + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + atomic_set(&iprtd->playing, 1); + else + atomic_set(&iprtd->capturing, 1); hrtimer_start(&iprtd->hrt, ns_to_ktime(iprtd->poll_time_ns), HRTIMER_MODE_REL); - if (++fiq_enable == 1) - enable_fiq(imx_pcm_fiq); - + enable_fiq(imx_pcm_fiq); break; case SNDRV_PCM_TRIGGER_STOP: case SNDRV_PCM_TRIGGER_SUSPEND: case SNDRV_PCM_TRIGGER_PAUSE_PUSH: - atomic_set(&iprtd->running, 0); - - if (--fiq_enable == 0) + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + atomic_set(&iprtd->playing, 0); + else + atomic_set(&iprtd->capturing, 0); + if (!atomic_read(&iprtd->playing) && + !atomic_read(&iprtd->capturing)) disable_fiq(imx_pcm_fiq); - break; + default: return -EINVAL; } @@ -182,7 +186,8 @@ static int snd_imx_open(struct snd_pcm_substream *substream) iprtd->substream = substream; - atomic_set(&iprtd->running, 0); + atomic_set(&iprtd->playing, 0); + atomic_set(&iprtd->capturing, 0); hrtimer_init(&iprtd->hrt, CLOCK_MONOTONIC, HRTIMER_MODE_REL); iprtd->hrt.function = snd_hrtimer_callback; -- 1.7.9.5

2 1

[alsa-devel] [PATCH 00/21] ASoC: davinci: Code cleanups and support for DRA7xx
by Peter Ujfalusi 14 Nov '13

14 Nov '13

Hi, In this series: Small cleanup of Kconfig/Makefile McASP support for AM43xx SoCs McASP support for DRA7xx SoCs Fix for synchronous master mode operation of McASP Code simplification (FIFO handling, etc) Data port selection support (dat or config address space) General code cleanup regarding to: - relocating register definition to header file - renaming of the private mcasp structure - IO functions parameters has been changed Regards, Peter --- Peter Ujfalusi (21): ASoC: davinci: Kconfig: Remove help section for SND_DAVINCI_SOC ASoC: davinci: Kconfig/Makefile: Generic EVM machine driver related cleanup ASoC: davinci: kconfig: Prepare for AM43xx support ASoC: davinci-evm: Do not include davinci-mcasp.h ASoC: davinci-evm: Switch to use .dai_fmt of snd_soc_dai_link(s) ASoC: davinci-mcasp: Move DAVINCI_MCASP_RATE from header to source file ASoC: davinci-mcasp: Remove unused DAVINCI_MCASP_I2S/DIT_DAI defines ASoC: davinci-mcasp: Correct dai driver struct initialization for 2nd dai ASoC: davinci-mcasp: Move register definitions to header file ASoC: davinci-mcasp: Move private struct definition to source file ASoC: davinci-mcasp: Remove unused DAVINCI_MCASP_NUM_SERIALIZER define ASoC: davinci-mcasp: Do not inline the mcasp_set_ctl_reg function ASoC: davinci-mcasp: Rename private struct and it's users (dev -> mcasp) ASoC: davinci-mcasp: Be consistent with the use of base in davinci_mcasp_set_dai_fmt ASoC: davinci-mcasp: Simplify FIFO configuration code ASoC: davinci-mcasp: Data source (bus) selection support ASoC: davinci-mcasp: Fix synchronous master receive mode ASoC: davinci-mcasp: Support for McASP version found in DRA7xx ASoC: davinci-mcasp: Support for fck reparenting ASoC: davinci-mcasp: Change IO functions parameter list ASoC: davinci-mcasp: Correct am33xx snd_platform_data name .../bindings/sound/davinci-mcasp-audio.txt | 6 +- include/linux/platform_data/davinci_asp.h | 1 + sound/soc/davinci/Kconfig | 29 +- sound/soc/davinci/Makefile | 8 +- sound/soc/davinci/davinci-evm.c | 48 +- sound/soc/davinci/davinci-mcasp.c | 1016 +++++++++----------- sound/soc/davinci/davinci-mcasp.h | 304 +++++- 7 files changed, 738 insertions(+), 674 deletions(-) -- 1.8.4.2

2 26

[alsa-devel] [PATCH] ASoC: cs42l52: Reorganize MICA/B Config and Select
by Brian Austin 14 Nov '13

14 Nov '13

This patch reworks the MICA an MICB config for single-ended or differential and the selection of which MIC for the single config Signed-off-by: Brian Austin <brian.austin(a)cirrus.com> --- include/sound/cs42l52.h | 6 ------ sound/soc/codecs/cs42l52.c | 25 ++++--------------------- 2 files changed, 4 insertions(+), 27 deletions(-) diff --git a/include/sound/cs42l52.h b/include/sound/cs42l52.h index 7c2be4a..daa91f3 100644 --- a/include/sound/cs42l52.h +++ b/include/sound/cs42l52.h @@ -22,12 +22,6 @@ struct cs42l52_platform_data { /* MICB mode selection 0=Single 1=Differential */ unsigned int micb_cfg; - /* MICA Select 0=MIC1A 1=MIC2A */ - unsigned int mica_sel; - - /* MICB Select 0=MIC2A 1=MIC2B */ - unsigned int micb_sel; - /* Charge Pump Freq. Check datasheet Pg73 */ unsigned int chgfreq; diff --git a/sound/soc/codecs/cs42l52.c b/sound/soc/codecs/cs42l52.c index 8b427c9..5af8306 100644 --- a/sound/soc/codecs/cs42l52.c +++ b/sound/soc/codecs/cs42l52.c @@ -233,7 +233,7 @@ static const struct soc_enum mic_bias_level_enum = SOC_ENUM_SINGLE(CS42L52_IFACE_CTL2, 0, ARRAY_SIZE(mic_bias_level_text), mic_bias_level_text); -static const char * const cs42l52_mic_text[] = { "Single", "Differential" }; +static const char * const cs42l52_mic_text[] = { "MIC1", "MIC2" }; static const struct soc_enum mica_enum = SOC_ENUM_SINGLE(CS42L52_MICA_CTL, 5, @@ -243,12 +243,6 @@ static const struct soc_enum micb_enum = SOC_ENUM_SINGLE(CS42L52_MICB_CTL, 5, ARRAY_SIZE(cs42l52_mic_text), cs42l52_mic_text); -static const struct snd_kcontrol_new mica_mux = - SOC_DAPM_ENUM("Left Mic Input Capture Mux", mica_enum); - -static const struct snd_kcontrol_new micb_mux = - SOC_DAPM_ENUM("Right Mic Input Capture Mux", micb_enum); - static const char * const digital_output_mux_text[] = {"ADC", "DSP"}; static const struct soc_enum digital_output_mux_enum = @@ -425,6 +419,9 @@ static const struct snd_kcontrol_new cs42l52_snd_controls[] = { SOC_DOUBLE("Bypass Mute", CS42L52_MISC_CTL, 4, 5, 1, 0), + SOC_ENUM("MICA Select", mica_enum), + SOC_ENUM("MICB Select", micb_enum), + SOC_DOUBLE_R_TLV("MIC Gain Volume", CS42L52_MICA_CTL, CS42L52_MICB_CTL, 0, 0x10, 0, mic_tlv), @@ -550,9 +547,6 @@ static const struct snd_soc_dapm_widget cs42l52_dapm_widgets[] = { SND_SOC_DAPM_AIF_OUT("AIFOUTR", NULL, 0, SND_SOC_NOPM, 0, 0), - SND_SOC_DAPM_MUX("MICA Mux", SND_SOC_NOPM, 0, 0, &mica_mux), - SND_SOC_DAPM_MUX("MICB Mux", SND_SOC_NOPM, 0, 0, &micb_mux), - SND_SOC_DAPM_ADC("ADC Left", NULL, CS42L52_PWRCTL1, 1, 1), SND_SOC_DAPM_ADC("ADC Right", NULL, CS42L52_PWRCTL1, 2, 1), SND_SOC_DAPM_PGA("PGA Left", CS42L52_PWRCTL1, 3, 1, NULL, 0), @@ -1239,17 +1233,6 @@ static int cs42l52_i2c_probe(struct i2c_client *i2c_client, cs42l52->pdata.micb_cfg << CS42L52_MIC_CTL_TYPE_SHIFT); - if (cs42l52->pdata.mica_sel) - regmap_update_bits(cs42l52->regmap, CS42L52_MICA_CTL, - CS42L52_MIC_CTL_MIC_SEL_MASK, - cs42l52->pdata.mica_sel << - CS42L52_MIC_CTL_MIC_SEL_SHIFT); - if (cs42l52->pdata.micb_sel) - regmap_update_bits(cs42l52->regmap, CS42L52_MICB_CTL, - CS42L52_MIC_CTL_MIC_SEL_MASK, - cs42l52->pdata.micb_sel << - CS42L52_MIC_CTL_MIC_SEL_SHIFT); - if (cs42l52->pdata.chgfreq) regmap_update_bits(cs42l52->regmap, CS42L52_CHARGE_PUMP, CS42L52_CHARGE_PUMP_MASK, -- 1.8.4.3

2 1

[alsa-devel] [RFC][PATCH v1] ASoC: soc-pcm: add symmetry for channels and sample bits
by Nicolin Chen 14 Nov '13

14 Nov '13

Some SoCs can only work in mono or stereo mode at one time. So if we let them capture a mono stream while playing a stereo stream, there might be a problem occur to one of these two streams: double paced or slowed down. In soc-pcm.c, we have soc_pcm_apply_symmetry() to apply the rate symmetry. But we don't have one for channels. Likewise, we can treat symmetric_rate as a solution for those SoCs or CODECs which can not handle asymmetrical LRCLK. But it's also impossible for them to handle asymmetrical BCLK. And accodring to BCLK = LRCLK * channel number * slot size(fixed or sample bits), sample bits might also be a problem if they are not using a fixed slot size. Thus, this patch applys symmetry for channels and sample bits. Meanwhile, there might be a race between two substreams if starting simultaneously. Previously, we only added warning to compalin but still using conservative way to let it carry on. However, this patch rejects the second stream with any unmatched parameter to make sure the first existing stream won't be broken. Signed-off-by: Nicolin Chen <b42378(a)freescale.com> --- include/sound/soc-dai.h | 6 +++ include/sound/soc.h | 2 + sound/soc/soc-pcm.c | 130 +++++++++++++++++++++++++++++++++++++++--------- 3 files changed, 115 insertions(+), 23 deletions(-) diff --git a/include/sound/soc-dai.h b/include/sound/soc-dai.h index 800c101..243d3b6 100644 --- a/include/sound/soc-dai.h +++ b/include/sound/soc-dai.h @@ -220,6 +220,8 @@ struct snd_soc_dai_driver { struct snd_soc_pcm_stream capture; struct snd_soc_pcm_stream playback; unsigned int symmetric_rates:1; + unsigned int symmetric_channels:1; + unsigned int symmetric_samplebits:1; /* probe ordering - for components with runtime dependencies */ int probe_order; @@ -244,6 +246,8 @@ struct snd_soc_dai { unsigned int capture_active:1; /* stream is in use */ unsigned int playback_active:1; /* stream is in use */ unsigned int symmetric_rates:1; + unsigned int symmetric_channels:1; + unsigned int symmetric_samplebits:1; struct snd_pcm_runtime *runtime; unsigned int active; unsigned char probed:1; @@ -258,6 +262,8 @@ struct snd_soc_dai { /* Symmetry data - only valid if symmetry is being enforced */ unsigned int rate; + unsigned int channels; + unsigned int sample_bits; /* parent platform/codec */ struct snd_soc_platform *platform; diff --git a/include/sound/soc.h b/include/sound/soc.h index 1f741cb..1cda7d3 100644 --- a/include/sound/soc.h +++ b/include/sound/soc.h @@ -879,6 +879,8 @@ struct snd_soc_dai_link { /* Symmetry requirements */ unsigned int symmetric_rates:1; + unsigned int symmetric_channels:1; + unsigned int symmetric_samplebits:1; /* Do not create a PCM for this DAI link (Backend link) */ unsigned int no_pcm:1; diff --git a/sound/soc/soc-pcm.c b/sound/soc/soc-pcm.c index d449872..e1c5a00 100644 --- a/sound/soc/soc-pcm.c +++ b/sound/soc/soc-pcm.c @@ -83,30 +83,97 @@ static int soc_pcm_apply_symmetry(struct snd_pcm_substream *substream, struct snd_soc_pcm_runtime *rtd = substream->private_data; int ret; - if (!soc_dai->driver->symmetric_rates && - !rtd->dai_link->symmetric_rates) - return 0; + if (soc_dai->rate && (soc_dai->driver->symmetric_rates || + rtd->dai_link->symmetric_rates)) { + dev_dbg(soc_dai->dev, "ASoC: Symmetry forces %dHz rate\n", + soc_dai->rate); + + ret = snd_pcm_hw_constraint_minmax(substream->runtime, + SNDRV_PCM_HW_PARAM_RATE, + soc_dai->rate, soc_dai->rate); + if (ret < 0) { + dev_err(soc_dai->dev, + "ASoC: Unable to apply rate constraint: %d\n", + ret); + return ret; + } + } - /* This can happen if multiple streams are starting simultaneously - - * the second can need to get its constraints before the first has - * picked a rate. Complain and allow the application to carry on. - */ - if (!soc_dai->rate) { - dev_warn(soc_dai->dev, - "ASoC: Not enforcing symmetric_rates due to race\n"); - return 0; + if (soc_dai->channels && (soc_dai->driver->symmetric_channels || + rtd->dai_link->symmetric_channels)) { + dev_dbg(soc_dai->dev, "ASoC: Symmetry forces %d channel(s)\n", + soc_dai->channels); + + ret = snd_pcm_hw_constraint_minmax(substream->runtime, + SNDRV_PCM_HW_PARAM_CHANNELS, + soc_dai->channels, + soc_dai->channels); + if (ret < 0) { + dev_err(soc_dai->dev, + "ASoC: Unable to apply channel symmetry constraint: %d\n", + ret); + return ret; + } } - dev_dbg(soc_dai->dev, "ASoC: Symmetry forces %dHz rate\n", soc_dai->rate); + if (soc_dai->sample_bits && (soc_dai->driver->symmetric_samplebits || + rtd->dai_link->symmetric_samplebits)) { + dev_dbg(soc_dai->dev, "ASoC: Symmetry forces %d sample bits\n", + soc_dai->sample_bits); - ret = snd_pcm_hw_constraint_minmax(substream->runtime, - SNDRV_PCM_HW_PARAM_RATE, - soc_dai->rate, soc_dai->rate); - if (ret < 0) { - dev_err(soc_dai->dev, - "ASoC: Unable to apply rate symmetry constraint: %d\n", - ret); - return ret; + ret = snd_pcm_hw_constraint_minmax(substream->runtime, + SNDRV_PCM_HW_PARAM_SAMPLE_BITS, + soc_dai->sample_bits, + soc_dai->sample_bits); + if (ret < 0) { + dev_err(soc_dai->dev, + "ASoC: Unable to apply sample bits symmetry constraint: %d\n", + ret); + return ret; + } + } + + return 0; +} + +static int soc_pcm_params_symmetry(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = rtd->cpu_dai; + struct snd_soc_dai *codec_dai = rtd->codec_dai; + unsigned int rate, channels, sample_bits, symmetry; + + rate = params_rate(params); + channels = params_channels(params); + sample_bits = snd_pcm_format_physical_width(params_format(params)); + + /* reject unmatched parameters when applying symmetry */ + symmetry = cpu_dai->driver->symmetric_rates || + codec_dai->driver->symmetric_rates || + rtd->dai_link->symmetric_rates; + if (symmetry && cpu_dai->rate && cpu_dai->rate != rate) { + dev_err(rtd->dev, "ASoC: unmatched rate symmetry: %d - %d\n", + cpu_dai->rate, rate); + return -EINVAL; + } + + symmetry = cpu_dai->driver->symmetric_channels || + codec_dai->driver->symmetric_channels || + rtd->dai_link->symmetric_channels; + if (symmetry && cpu_dai->channels && cpu_dai->channels != channels) { + dev_err(rtd->dev, "ASoC: unmatched channel symmetry: %d - %d\n", + cpu_dai->channels, channels); + return -EINVAL; + } + + symmetry = cpu_dai->driver->symmetric_samplebits || + codec_dai->driver->symmetric_samplebits || + rtd->dai_link->symmetric_samplebits; + if (symmetry && cpu_dai->sample_bits && cpu_dai->sample_bits != sample_bits) { + dev_err(rtd->dev, "ASoC: unmatched sample bits symmetry: %d - %d\n", + cpu_dai->sample_bits, sample_bits); + return -EINVAL; } return 0; @@ -377,11 +444,17 @@ static int soc_pcm_close(struct snd_pcm_substream *substream) codec->active--; /* clear the corresponding DAIs rate when inactive */ - if (!cpu_dai->active) + if (!cpu_dai->active) { cpu_dai->rate = 0; + cpu_dai->channels = 0; + cpu_dai->sample_bits = 0; + } - if (!codec_dai->active) + if (!codec_dai->active) { codec_dai->rate = 0; + cpu_dai->channels = 0; + cpu_dai->sample_bits = 0; + } /* Muting the DAC suppresses artifacts caused during digital * shutdown, for example from stopping clocks. @@ -514,6 +587,10 @@ static int soc_pcm_hw_params(struct snd_pcm_substream *substream, mutex_lock_nested(&rtd->pcm_mutex, rtd->pcm_subclass); + ret = soc_pcm_params_symmetry(substream, params); + if (ret) + goto out; + if (rtd->dai_link->ops && rtd->dai_link->ops->hw_params) { ret = rtd->dai_link->ops->hw_params(substream, params); if (ret < 0) { @@ -550,9 +627,16 @@ static int soc_pcm_hw_params(struct snd_pcm_substream *substream, } } - /* store the rate for each DAIs */ + /* store the parameters for each DAIs */ cpu_dai->rate = params_rate(params); + cpu_dai->channels = params_channels(params); + cpu_dai->sample_bits = + snd_pcm_format_physical_width(params_format(params)); + codec_dai->rate = params_rate(params); + codec_dai->channels = params_channels(params); + codec_dai->sample_bits = + snd_pcm_format_physical_width(params_format(params)); out: mutex_unlock(&rtd->pcm_mutex); -- 1.8.4

2 1

[alsa-devel] [PATCH] ASoC: blackfin: Fix missing break
by Takashi Iwai 14 Nov '13

14 Nov '13

Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=60768 Fixes: 4b2ffc205cb9 ('ASoC: Blackfin I2S: add 8-bit sample support') Cc: <stable(a)vger.kernel.org> Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- sound/soc/blackfin/bf5xx-i2s.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/soc/blackfin/bf5xx-i2s.c b/sound/soc/blackfin/bf5xx-i2s.c index 9a174fc47d39..39d774839b3e 100644 --- a/sound/soc/blackfin/bf5xx-i2s.c +++ b/sound/soc/blackfin/bf5xx-i2s.c @@ -121,6 +121,7 @@ static int bf5xx_i2s_hw_params(struct snd_pcm_substream *substream, bf5xx_i2s->tcr2 |= 7; bf5xx_i2s->rcr2 |= 7; sport_handle->wdsize = 1; + break; case SNDRV_PCM_FORMAT_S16_LE: bf5xx_i2s->tcr2 |= 15; bf5xx_i2s->rcr2 |= 15; -- 1.8.4.2

3 9

[alsa-devel] [PATCH [alsa-utils] 1/2] alsaconf: support newer m-i-t and kmod
by Mike Frysinger 14 Nov '13

14 Nov '13

The m-i-t package made it up to 3.10 versions before ending, so update the glob to handle those too. Most distros are moving on to kmod, so we also want to handle the version string that package outputs. Signed-off-by: Mike Frysinger <vapier(a)gentoo.org> --- alsaconf/alsaconf.in | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/alsaconf/alsaconf.in b/alsaconf/alsaconf.in index 5c23787..59f25d1 100644 --- a/alsaconf/alsaconf.in +++ b/alsaconf/alsaconf.in @@ -308,9 +308,11 @@ elif [ "$kernel" = "new" ]; then cfgout="/etc/modprobe.d/50-sound.conf" cfgoldout="/etc/modprobe.d/sound" if [ ! -f $cfgout ]; then - modver=$(modprobe -V | sed -e's/^module-init-tools version //') - case "$modver" in - 3.[789]*) + case "$(modprobe -V)" in + "module-init-tools version "3.[789]*|\ + "module-init-tools version "3.1[0-9]*) + ;; + "kmod version "*) ;; *) cfgout="/etc/modprobe.d/sound" -- 1.8.3.2

2 2

[alsa-devel] Duplicated/weird SND_CHMAP_xx positions
by Anssi Hannula 14 Nov '13

14 Nov '13

Hi, I see we have both: SND_CHMAP_FLH, /**< front left high */ SND_CHMAP_FCH, /**< front center high */ SND_CHMAP_FRH, /**< front right high */ and SND_CHMAP_TFL, /**< top front left */ SND_CHMAP_TFR, /**< top front right */ SND_CHMAP_TFC, /**< top front center */ However, these are actually exactly the same AFAICS, both are the speakers above the front speakers (CEA/HDMI uses "high" and USB audio uses "top" nomenclature). I guess we should deprecate one set? I can't think of anything else than adding comments saying they are deprecated, though... I guess I'd prefer to deprecate the "high" ones since we have many other "top" and "bottom" channels. Also, the only in-kernel use of "high" is by HDA HDMI and it only will start working in 3.13-rcX. We have also these: SND_CHMAP_BC, /**< bottom center */ SND_CHMAP_BLC, /**< bottom left center */ SND_CHMAP_BRC, /**< bottom right center */ I guess "bottom center" is "under the listener" (USB audio v2 spec doesn't clarify, but clearly doesn't use the "Front" specifier as in "front bottom center"). However, the last two ones are weird. The descriptions do not make sense to me (under the listener to the left? wouldn't that be "bottom side left" instead?). It seems like they were added by mistake - the only user is the USB audio driver which wrongly uses them for "back left/right center" instead of correct RLC/RRC. For reference, the complete current position list is: /** channel positions */ enum snd_pcm_chmap_position { SND_CHMAP_UNKNOWN = 0, /**< unspecified */ SND_CHMAP_NA, /**< N/A, silent */ SND_CHMAP_MONO, /**< mono stream */ SND_CHMAP_FL, /**< front left */ SND_CHMAP_FR, /**< front right */ SND_CHMAP_RL, /**< rear left */ SND_CHMAP_RR, /**< rear right */ SND_CHMAP_FC, /**< front center */ SND_CHMAP_LFE, /**< LFE */ SND_CHMAP_SL, /**< side left */ SND_CHMAP_SR, /**< side right */ SND_CHMAP_RC, /**< rear center */ SND_CHMAP_FLC, /**< front left center */ SND_CHMAP_FRC, /**< front right center */ SND_CHMAP_RLC, /**< rear left center */ SND_CHMAP_RRC, /**< rear right center */ SND_CHMAP_FLW, /**< front left wide */ SND_CHMAP_FRW, /**< front right wide */ SND_CHMAP_FLH, /**< front left high */ SND_CHMAP_FCH, /**< front center high */ SND_CHMAP_FRH, /**< front right high */ SND_CHMAP_TC, /**< top center */ SND_CHMAP_TFL, /**< top front left */ SND_CHMAP_TFR, /**< top front right */ SND_CHMAP_TFC, /**< top front center */ SND_CHMAP_TRL, /**< top rear left */ SND_CHMAP_TRR, /**< top rear right */ SND_CHMAP_TRC, /**< top rear center */ SND_CHMAP_TFLC, /**< top front left center */ SND_CHMAP_TFRC, /**< top front right center */ SND_CHMAP_TSL, /**< top side left */ SND_CHMAP_TSR, /**< top side right */ SND_CHMAP_LLFE, /**< left LFE */ SND_CHMAP_RLFE, /**< right LFE */ SND_CHMAP_BC, /**< bottom center */ SND_CHMAP_BLC, /**< bottom left center */ SND_CHMAP_BRC, /**< bottom right center */ SND_CHMAP_LAST = SND_CHMAP_BRC, }; -- Anssi Hannula

2 5

[alsa-devel] [PATCH v2 1/2] ASoC: cs42l52: Add DeviceTree Support for CS42L52
by Brian Austin 13 Nov '13

13 Nov '13

This patch adds device tree support for the CS42L52 CODEC v2 changes dt bindings to use '-' instead of '_'. reset_gpio = reset-gpio. Pdata variables are not changed. Signed-off-by: Brian Austin <brian.austin(a)cirrus.com> --- sound/soc/codecs/cs42l52.c | 51 ++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 49 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/cs42l52.c b/sound/soc/codecs/cs42l52.c index 8b427c9..ea55ee5 100644 --- a/sound/soc/codecs/cs42l52.c +++ b/sound/soc/codecs/cs42l52.c @@ -17,7 +17,7 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/delay.h> -#include <linux/gpio.h> +#include <linux/of_gpio.h> #include <linux/pm.h> #include <linux/i2c.h> #include <linux/input.h> @@ -1174,6 +1174,7 @@ static int cs42l52_i2c_probe(struct i2c_client *i2c_client, struct cs42l52_private *cs42l52; struct cs42l52_platform_data *pdata = dev_get_platdata(&i2c_client->dev); int ret; + u32 val32; unsigned int devid = 0; unsigned int reg; @@ -1190,8 +1191,47 @@ static int cs42l52_i2c_probe(struct i2c_client *i2c_client, return ret; } - if (pdata) + if (pdata) { cs42l52->pdata = *pdata; + } else { + pdata = devm_kzalloc(&i2c_client->dev, + sizeof(struct cs42l52_platform_data), + GFP_KERNEL); + if (!pdata) { + dev_err(&i2c_client->dev, "could not allocate pdata\n"); + return -ENOMEM; + } + if (i2c_client->dev.of_node) { + if (of_property_read_u32(i2c_client->dev.of_node, + "mica-cfg", &val32) >= 0) + pdata->mica_cfg = val32; + + if (of_property_read_u32(i2c_client->dev.of_node, + "micb-cfg", &val32) >= 0) + pdata->micb_cfg = val32; + + if (of_property_read_u32(i2c_client->dev.of_node, + "mica-sel", &val32) >= 0) + pdata->mica_sel = val32; + + if (of_property_read_u32(i2c_client->dev.of_node, + "micb-sel", &val32) >= 0) + pdata->micb_sel = val32; + + if (of_property_read_u32(i2c_client->dev.of_node, + "micbias-lvl", &val32) >= 0) + pdata->micbias_lvl = val32; + + if (of_property_read_u32(i2c_client->dev.of_node, + "chgfreq", &val32) >= 0) + pdata->chgfreq = val32; + + pdata->reset_gpio = + of_get_named_gpio(i2c_client->dev.of_node, + "reset-gpio", 0); + } + cs42l52->pdata = *pdata; + } if (cs42l52->pdata.reset_gpio) { ret = gpio_request_one(cs42l52->pdata.reset_gpio, @@ -1274,6 +1314,12 @@ static int cs42l52_i2c_remove(struct i2c_client *client) return 0; } +static const struct of_device_id cs42l52_of_match[] = { + { .compatible = "cirrus,cs42l52", }, + {}, +}; +MODULE_DEVICE_TABLE(of, cs42l52_of_match); + static const struct i2c_device_id cs42l52_id[] = { { "cs42l52", 0 }, { } @@ -1284,6 +1330,7 @@ static struct i2c_driver cs42l52_i2c_driver = { .driver = { .name = "cs42l52", .owner = THIS_MODULE, + .of_match_table = cs42l52_of_match, }, .id_table = cs42l52_id, .probe = cs42l52_i2c_probe, -- 1.8.4.rc3

4 15

[alsa-devel] Linux Audio Conference 2014 - Call for Participation
by Robin Gareus 13 Nov '13

13 Nov '13

[Sorry for cross-posting, please distribute] We are happy to announce the next issue of the Linux Audio Conference (LAC), May 1-4, 2014 @ ZKM | Institute for Music and Acoustics, in Karlsruhe, Germnany. http://lac.linuxaudio.org/2014/ The Linux Audio Conference is an international conference that brings together musicians, sound artists, software developers and researchers, working with Linux as an open, stable, professional platform for audio and media research and music production. LAC includes paper sessions, workshops, and a diverse program of electronic music. *Call for Papers, Workshops, Music and Installations* We invite submissions of papers addressing all areas of audio processing and media creation based on Linux. Papers can focus on technical, artistic and scientific issues and should target developers or users. In our call for music, we are looking for works that have been produced or composed entirely/mostly using Linux. The online submission of papers, workshops, music and installations is now open at http://lac.linuxaudio.org/2014/participation The Deadline for all submissions is January 27th, 2014 (23:59 HAST). You are invited to register for participation on our conference website. There you will find up-to-date instructions, as well as important information about dates, travel, lodging, and so on. This year's conference is hosted by the ZKM | Institute for Music und Acoustics (IMA). The IMA is a forum for international discourse and exchange and combines artistic work with research and development in the context of electroacoustic music. By holding concerts, symposia and festivals on a regular basis it brings together composers, musicians, musicologists, music software developers and listeners interested in contemporary music. Artists in Residence and software developers work on their productions in studios at the institute. With digital sound synthesis, algorithmic composition, live-electronics up to radio plays, interactive sound installations and audiovisual productions their creations cover a broad range of what digital technology can inspire the musical fantasy to. The ZKM is proud to be the place of the LAC for the fifth time after having initiated the conference in 2003. http://www.zkm.de/musik We look forward to seeing you in Karlsruhe in May! Sincerely, The LAC 2014 Organizing Team

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[alsa-devel] [PATCH] dmaengine: Add support for BCM2835.
by Florian Meier 13 Nov '13

13 Nov '13

Add support for DMA controller of BCM2835 as used in the Raspberry Pi. Currently it only supports cyclic DMA for serving the I2S driver. Signed-off-by: Florian Meier <florian.meier(a)koalo.de> --- arch/arm/boot/dts/bcm2835.dtsi | 22 + drivers/dma/Kconfig | 6 + drivers/dma/Makefile | 1 + drivers/dma/bcm2835-dma.c | 880 ++++++++++++++++++++++++++++++++++++++++ 4 files changed, 909 insertions(+) create mode 100644 drivers/dma/bcm2835-dma.c diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi index 1e12aef..1514198 100644 --- a/arch/arm/boot/dts/bcm2835.dtsi +++ b/arch/arm/boot/dts/bcm2835.dtsi @@ -103,6 +103,28 @@ clocks = <&clk_mmc>; status = "disabled"; }; + + dma: dma@7e007000 { + compatible = "brcm,bcm2835-dma"; + reg = <0x7e007000 0xf00>; + interrupts = <1 16 + 1 17 + 1 18 + 1 19 + 1 20 + 1 21 + 1 22 + 1 23 + 1 24 + 1 25 + 1 26 + 1 27 + 1 28>; + + #dma-cells = <1>; + dma-channels = <15>; /* DMA channel 15 is not handled yet */ + dma-requests = <32>; + }; }; clocks { diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig index f238cfd..f2d253b 100644 --- a/drivers/dma/Kconfig +++ b/drivers/dma/Kconfig @@ -288,6 +288,12 @@ config DMA_OMAP select DMA_ENGINE select DMA_VIRTUAL_CHANNELS +config DMA_BCM2835 + tristate "BCM2835 DMA engine support" + depends on (ARCH_BCM2835 || MACH_BCM2708) + select DMA_ENGINE + select DMA_VIRTUAL_CHANNELS + config TI_CPPI41 tristate "AM33xx CPPI41 DMA support" depends on ARCH_OMAP diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile index db89035..6348157 100644 --- a/drivers/dma/Makefile +++ b/drivers/dma/Makefile @@ -37,6 +37,7 @@ obj-$(CONFIG_EP93XX_DMA) += ep93xx_dma.o obj-$(CONFIG_DMA_SA11X0) += sa11x0-dma.o obj-$(CONFIG_MMP_TDMA) += mmp_tdma.o obj-$(CONFIG_DMA_OMAP) += omap-dma.o +obj-$(CONFIG_DMA_BCM2835) += bcm2835-dma.o obj-$(CONFIG_MMP_PDMA) += mmp_pdma.o obj-$(CONFIG_DMA_JZ4740) += dma-jz4740.o obj-$(CONFIG_TI_CPPI41) += cppi41.o diff --git a/drivers/dma/bcm2835-dma.c b/drivers/dma/bcm2835-dma.c new file mode 100644 index 0000000..c3e53b3 --- /dev/null +++ b/drivers/dma/bcm2835-dma.c @@ -0,0 +1,880 @@ +/* + * BCM2835 DMA engine support + * + * This driver only supports cyclic DMA transfers + * as needed for the I2S module. + * + * Author: Florian Meier, <florian.meier(a)koalo.de> + * Copyright 2013 + * + * based on + * OMAP DMAengine support by Russell King + * + * BCM2708 DMA Driver + * Copyright (C) 2010 Broadcom + * + * Raspberry Pi PCM I2S ALSA Driver + * Copyright (c) by Phil Poole 2013 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include <linux/dmaengine.h> +#include <linux/dma-mapping.h> +#include <linux/err.h> +#include <linux/init.h> +#include <linux/interrupt.h> +#include <linux/list.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/slab.h> +#include <linux/io.h> +#include <linux/spinlock.h> +#include <linux/irq.h> +#include <linux/of.h> +#include <linux/of_dma.h> + +#include "virt-dma.h" + +struct bcm2835_dmadev { + struct dma_device ddev; + spinlock_t lock; + struct tasklet_struct task; + struct list_head pending; + uint32_t chans_available; + void __iomem *dma_base; + int *dma_irq_numbers; +}; + +struct bcm2835_dma_cb { + unsigned long info; + unsigned long src; + unsigned long dst; + unsigned long length; + unsigned long stride; + unsigned long next; + unsigned long pad[2]; +}; + +struct bcm2835_chan { + struct virt_dma_chan vc; + struct list_head node; + + struct dma_slave_config cfg; + unsigned dma_sig; + bool cyclic; + + int dma_ch; + struct bcm2835_desc *desc; + unsigned sgidx; + + void __iomem *dma_chan_base; + int dma_irq_number; + struct irqaction dma_irq_handler; +}; + +struct bcm2835_sg { + dma_addr_t addr; + uint32_t en; /* number of elements (24-bit) */ + uint32_t fn; /* number of frames (16-bit) */ +}; + +struct bcm2835_desc { + struct virt_dma_desc vd; + enum dma_transfer_direction dir; + dma_addr_t dev_addr; + + uint8_t es; + unsigned int sync_type; + unsigned int sync_dreq; + + unsigned int control_block_size; + struct bcm2835_dma_cb *control_block_base; + dma_addr_t control_block_base_phys; + + unsigned sglen; + struct bcm2835_sg sg[0]; +}; + +#define BCM2835_DMA_CS 0x00 +#define BCM2835_DMA_ADDR 0x04 +#define BCM2835_DMA_SOURCE_AD 0x0c +#define BCM2835_DMA_DEST_AD 0x10 +#define BCM2835_DMA_NEXTCB 0x1C + +/* DMA CS Control and Status bits */ +#define BCM2835_DMA_ACTIVE (1 << 0) +#define BCM2835_DMA_INT (1 << 2) +#define BCM2835_DMA_ISPAUSED (1 << 4) /* Pause requested or not active */ +#define BCM2835_DMA_ISHELD (1 << 5) /* Is held by DREQ flow control */ +#define BCM2835_DMA_ERR (1 << 8) +#define BCM2835_DMA_ABORT (1 << 30) /* stop current CB, go to next, WO */ +#define BCM2835_DMA_RESET (1 << 31) /* WO, self clearing */ + +#define BCM2835_DMA_INT_EN (1 << 0) +#define BCM2835_DMA_D_INC (1 << 4) +#define BCM2835_DMA_D_DREQ (1 << 6) +#define BCM2835_DMA_S_INC (1 << 8) +#define BCM2835_DMA_S_DREQ (1 << 6) + +#define BCM2835_DMA_PER_MAP(x) ((x) << 16) + +#define BCM2835_DMA_DATA_TYPE_S8 1 +#define BCM2835_DMA_DATA_TYPE_S16 2 +#define BCM2835_DMA_DATA_TYPE_S32 4 +#define BCM2835_DMA_DATA_TYPE_S128 16 + +#define BCM2835_DMA_CHANNEL_MASK 32565 + +/* valid only for channels 0 - 14, 15 has its own base address */ +#define BCM2835_DMA_CHAN(n) ((n)<<8) /* base address */ +#define BCM2835_DMA_CHANIO(dma_base, n) ((dma_base)+BCM2835_DMA_CHAN(n)) + +static const unsigned es_bytes[] = { + [BCM2835_DMA_DATA_TYPE_S8] = 1, + [BCM2835_DMA_DATA_TYPE_S16] = 2, + [BCM2835_DMA_DATA_TYPE_S32] = 4, + [BCM2835_DMA_DATA_TYPE_S128] = 16 +}; + +static inline struct bcm2835_dmadev *to_bcm2835_dma_dev(struct dma_device *d) +{ + return container_of(d, struct bcm2835_dmadev, ddev); +} + +static inline struct bcm2835_chan *to_bcm2835_dma_chan(struct dma_chan *c) +{ + return container_of(c, struct bcm2835_chan, vc.chan); +} + +static inline struct bcm2835_desc *to_bcm2835_dma_desc( + struct dma_async_tx_descriptor *t) +{ + return container_of(t, struct bcm2835_desc, vd.tx); +} + +static bool bcm2835_dma_filter_fn(struct dma_chan *chan, void *param) +{ + return true; +} + +static struct of_dma_filter_info bcm2835_dma_info = { + .filter_fn = bcm2835_dma_filter_fn, +}; + +static void bcm2835_dma_desc_free(struct virt_dma_desc *vd) +{ + struct bcm2835_desc *desc = container_of(vd, struct bcm2835_desc, vd); + dma_free_coherent(desc->vd.tx.chan->device->dev, + desc->control_block_size, + desc->control_block_base, + desc->control_block_base_phys); + kfree(desc); +} + +static void bcm2835_dma_start(void __iomem *dma_chan_base, + dma_addr_t control_block) +{ + dsb(); /* ARM data synchronization (push) operation */ + + writel(control_block, dma_chan_base+BCM2835_DMA_ADDR); + writel(BCM2835_DMA_ACTIVE, dma_chan_base+BCM2835_DMA_CS); +} + +static int bcm2835_dma_abort(void __iomem *dma_chan_base) +{ + unsigned long int cs; + int rc = 0; + + cs = readl(dma_chan_base + BCM2835_DMA_CS); + + if (BCM2835_DMA_ACTIVE & cs) { + long int timeout = 10000; + + /* write 0 to the active bit - pause the DMA */ + writel(0, dma_chan_base + BCM2835_DMA_CS); + + /* wait for any current AXI transfer to complete */ + while (0 != (cs & BCM2835_DMA_ISPAUSED) && --timeout >= 0) + cs = readl(dma_chan_base + BCM2835_DMA_CS); + + if (0 != (cs & BCM2835_DMA_ISPAUSED)) { + /* we'll un-pause when we set of our next DMA */ + rc = -ETIMEDOUT; + + } else if (BCM2835_DMA_ACTIVE & cs) { + /* terminate the control block chain */ + writel(0, dma_chan_base + BCM2835_DMA_NEXTCB); + + /* abort the whole DMA */ + writel(BCM2835_DMA_ABORT | BCM2835_DMA_ACTIVE, + dma_chan_base + BCM2835_DMA_CS); + } + } + + return rc; +} + +static void bcm2835_dma_start_sg(struct bcm2835_chan *c, struct bcm2835_desc *d, + unsigned idx) +{ + struct bcm2835_sg *sg = d->sg + idx; + int frame; + int frames = sg->fn; + + /* + * Iterate over all frames and create a control block + * for each frame and link them together. + */ + for (frame = 0; frame < frames; frame++) { + struct bcm2835_dma_cb *control_block = + &d->control_block_base[frame]; + + /* Setup adresses */ + if (d->dir == DMA_DEV_TO_MEM) { + control_block->info = BCM2835_DMA_D_INC; + control_block->src = d->dev_addr; + control_block->dst = sg->addr+frame*sg->en; + } else { + control_block->info = BCM2835_DMA_S_INC; + control_block->src = sg->addr+frame*sg->en; + control_block->dst = d->dev_addr; + } + + /* Enable interrupt */ + control_block->info |= BCM2835_DMA_INT_EN; + + /* Setup synchronization */ + if (d->sync_type != 0) + control_block->info |= d->sync_type; + + /* Setup DREQ channel */ + if (d->sync_dreq != 0) + control_block->info |= + BCM2835_DMA_PER_MAP(d->sync_dreq); + + /* Length of a frame */ + control_block->length = sg->en; + + /* + * Next block is the next frame. + * This DMA engine driver currently only supports cyclic DMA. + * Therefore, wrap around at number of frames. + */ + control_block->next = d->control_block_base_phys + + sizeof(struct bcm2835_dma_cb)*((frame+1)%(frames)); + + /* The following fields are not used here */ + control_block->stride = 0; + control_block->pad[0] = 0; + control_block->pad[1] = 0; + } + + /* Start the DMA transfer */ + bcm2835_dma_start(c->dma_chan_base, d->control_block_base_phys); +} + +static void bcm2835_dma_start_desc(struct bcm2835_chan *c) +{ + struct virt_dma_desc *vd = vchan_next_desc(&c->vc); + struct bcm2835_desc *d; + + if (!vd) { + c->desc = NULL; + return; + } + + list_del(&vd->node); + + c->desc = d = to_bcm2835_dma_desc(&vd->tx); + c->sgidx = 0; + + bcm2835_dma_start_sg(c, d, 0); +} + +static irqreturn_t bcm2835_dma_callback(int irq, void *data) +{ + struct bcm2835_chan *c = data; + struct bcm2835_desc *d; + unsigned long flags; + + spin_lock_irqsave(&c->vc.lock, flags); + + /* acknowledge interrupt */ + writel(BCM2835_DMA_INT, c->dma_chan_base + BCM2835_DMA_CS); + + d = c->desc; + + if (d) { + if (!c->cyclic) { + if (++c->sgidx < d->sglen) { + bcm2835_dma_start_sg(c, d, c->sgidx); + } else { + bcm2835_dma_start_desc(c); + vchan_cookie_complete(&d->vd); + } + } else { + vchan_cyclic_callback(&d->vd); + } + } + + /* keep the DMA engine running */ + dsb(); /* ARM synchronization barrier */ + writel(BCM2835_DMA_ACTIVE, c->dma_chan_base + BCM2835_DMA_CS); + + spin_unlock_irqrestore(&c->vc.lock, flags); + + return IRQ_HANDLED; +} + +/* + * This callback schedules all pending channels. We could be more + * clever here by postponing allocation of the real DMA channels to + * this point, and freeing them when our virtual channel becomes idle. + * + * We would then need to deal with 'all channels in-use' + */ +static void bcm2835_dma_sched(unsigned long data) +{ + struct bcm2835_dmadev *d = (struct bcm2835_dmadev *)data; + LIST_HEAD(head); + + spin_lock_irq(&d->lock); + list_splice_tail_init(&d->pending, &head); + spin_unlock_irq(&d->lock); + + while (!list_empty(&head)) { + struct bcm2835_chan *c = list_first_entry(&head, + struct bcm2835_chan, node); + + spin_lock_irq(&c->vc.lock); + list_del_init(&c->node); + bcm2835_dma_start_desc(c); + spin_unlock_irq(&c->vc.lock); + } +} + +static int bcm2835_dma_alloc_chan_resources(struct dma_chan *chan) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + int ret; + struct bcm2835_dmadev *d = to_bcm2835_dma_dev(chan->device); + uint32_t chans = d->chans_available; + int chanID = 0; + + dev_dbg(c->vc.chan.device->dev, + "allocating channel for %u\n", c->dma_sig); + + /* do not use the FIQ and BULK channels */ + chans &= ~0xD; + + if (chans) { + /* return the ordinal of the first channel in the bitmap */ + while (chans != 0 && (chans & 1) == 0) { + chans >>= 1; + chanID++; + } + + /* claim the channel */ + d->chans_available &= ~(1 << chanID); + + c->dma_chan_base = BCM2835_DMA_CHANIO(d->dma_base, chanID); + + c->dma_irq_number = d->dma_irq_numbers[chanID]; + + c->dma_ch = chanID; + } else { + return -ENOMEM; + } + + c->dma_irq_handler.name = "DMA engine IRQ handler"; + c->dma_irq_handler.flags = 0; + c->dma_irq_handler.handler = bcm2835_dma_callback; + + ret = request_any_context_irq(c->dma_irq_number, + bcm2835_dma_callback, 0, "DMA IRQ", c); + if (ret < 0) + return ret; + + return 0; +} + +static void bcm2835_dma_free_chan_resources(struct dma_chan *chan) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + struct bcm2835_dmadev *d = to_bcm2835_dma_dev(chan->device); + + vchan_free_chan_resources(&c->vc); + d->chans_available |= (1 << c->dma_ch); + free_irq(c->dma_irq_number, c); + + dev_dbg(c->vc.chan.device->dev, "freeing channel for %u\n", c->dma_sig); +} + +static size_t bcm2835_dma_sg_size(struct bcm2835_sg *sg) +{ + return sg->en * sg->fn; +} + +static size_t bcm2835_dma_desc_size(struct bcm2835_desc *d) +{ + unsigned i; + size_t size; + + for (size = i = 0; i < d->sglen; i++) + size += bcm2835_dma_sg_size(&d->sg[i]); + + return size * es_bytes[d->es]; +} + +static size_t bcm2835_dma_desc_size_pos(struct bcm2835_desc *d, dma_addr_t addr) +{ + unsigned i; + size_t size; + + for (size = i = 0; i < d->sglen; i++) { + size_t this_size = bcm2835_dma_sg_size(&d->sg[i]); + + if (size) + size += this_size; + else if (addr >= d->sg[i].addr && + addr < d->sg[i].addr + this_size) + size += d->sg[i].addr + this_size - addr; + } + return size; +} + + +/* + * Returns current physical source address for the given DMA channel. + * If the channel is running the caller must disable interrupts prior calling + * this function and process the returned value before re-enabling interrupt to + * prevent races with the interrupt handler. + */ +static dma_addr_t bcm2835_get_dma_src_pos(struct bcm2835_chan *c) +{ + return readl(c->dma_chan_base + BCM2835_DMA_SOURCE_AD); +} + +/* + * Returns current physical destination address for the given DMA channel. + * If the channel is running the caller must disable interrupts prior calling + * this function and process the returned value before re-enabling interrupt to + * prevent races with the interrupt handler. + */ +static dma_addr_t bcm2835_get_dma_dst_pos(struct bcm2835_chan *c) +{ + return readl(c->dma_chan_base + BCM2835_DMA_DEST_AD); +} + +static enum dma_status bcm2835_dma_tx_status(struct dma_chan *chan, + dma_cookie_t cookie, struct dma_tx_state *txstate) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + struct virt_dma_desc *vd; + enum dma_status ret; + unsigned long flags; + + ret = dma_cookie_status(chan, cookie, txstate); + if (ret == DMA_SUCCESS || !txstate) + return ret; + + spin_lock_irqsave(&c->vc.lock, flags); + vd = vchan_find_desc(&c->vc, cookie); + if (vd) { + txstate->residue = + bcm2835_dma_desc_size(to_bcm2835_dma_desc(&vd->tx)); + } else if (c->desc && c->desc->vd.tx.cookie == cookie) { + struct bcm2835_desc *d = c->desc; + dma_addr_t pos; + + if (d->dir == DMA_MEM_TO_DEV) + pos = bcm2835_get_dma_src_pos(c); + else if (d->dir == DMA_DEV_TO_MEM) + pos = bcm2835_get_dma_dst_pos(c); + else + pos = 0; + + txstate->residue = bcm2835_dma_desc_size_pos(d, pos); + } else { + txstate->residue = 0; + } + + spin_unlock_irqrestore(&c->vc.lock, flags); + + return ret; +} + +static void bcm2835_dma_issue_pending(struct dma_chan *chan) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + unsigned long flags; + + spin_lock_irqsave(&c->vc.lock, flags); + if (vchan_issue_pending(&c->vc) && !c->desc) { + struct bcm2835_dmadev *d = to_bcm2835_dma_dev(chan->device); + spin_lock(&d->lock); + if (list_empty(&c->node)) + list_add_tail(&c->node, &d->pending); + spin_unlock(&d->lock); + tasklet_schedule(&d->task); + } + spin_unlock_irqrestore(&c->vc.lock, flags); +} + + +static struct dma_async_tx_descriptor *bcm2835_dma_prep_dma_cyclic( + struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len, + size_t period_len, enum dma_transfer_direction direction, + unsigned long flags, void *context) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + enum dma_slave_buswidth dev_width; + struct bcm2835_desc *d; + dma_addr_t dev_addr; + unsigned int es, sync_type, sync_dreq; + + /* Grab configuration */ + if (direction == DMA_DEV_TO_MEM) { + dev_addr = c->cfg.src_addr; + dev_width = c->cfg.src_addr_width; + sync_type = BCM2835_DMA_S_DREQ; + sync_dreq = c->cfg.slave_id; + } else if (direction == DMA_MEM_TO_DEV) { + dev_addr = c->cfg.dst_addr; + dev_width = c->cfg.dst_addr_width; + sync_type = BCM2835_DMA_D_DREQ; + sync_dreq = c->cfg.slave_id; + } else { + dev_err(chan->device->dev, "%s: bad direction?\n", __func__); + return NULL; + } + + /* Bus width translates to the element size (ES) */ + switch (dev_width) { + case DMA_SLAVE_BUSWIDTH_4_BYTES: + es = BCM2835_DMA_DATA_TYPE_S32; + break; + default: + return NULL; + } + + /* Now allocate and setup the descriptor. */ + d = kzalloc(sizeof(*d) + sizeof(d->sg[0]), GFP_ATOMIC); + if (!d) + return NULL; + + d->dir = direction; + d->dev_addr = dev_addr; + d->es = es; + d->sync_type = sync_type; + d->sync_dreq = sync_dreq; + d->sg[0].addr = buf_addr; + d->sg[0].en = period_len; + d->sg[0].fn = buf_len / period_len; + d->sglen = 1; + + /* Allocate memory for control blocks */ + d->control_block_size = d->sg[0].fn*sizeof(struct bcm2835_dma_cb); + d->control_block_base = dma_alloc_coherent(chan->device->dev, + d->control_block_size, &d->control_block_base_phys, + GFP_KERNEL); + + if (!d->control_block_base) { + dev_err(chan->device->dev, + "%s: Memory allocation error\n", __func__); + return NULL; + } + + memset(d->control_block_base, 0, d->control_block_size); + + if (!c->cyclic) { + c->cyclic = true; + /* nothing else is implemented */ + } + + return vchan_tx_prep(&c->vc, &d->vd, DMA_CTRL_ACK | DMA_PREP_INTERRUPT); +} + +static int bcm2835_dma_slave_config(struct bcm2835_chan *c, + struct dma_slave_config *cfg) +{ + if ((cfg->direction == DMA_DEV_TO_MEM + && cfg->src_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES) || + (cfg->direction == DMA_MEM_TO_DEV + && cfg->dst_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES)) { + return -EINVAL; + } + + memcpy(&c->cfg, cfg, sizeof(c->cfg)); + + return 0; +} + +static int bcm2835_dma_terminate_all(struct bcm2835_chan *c) +{ + struct bcm2835_dmadev *d = to_bcm2835_dma_dev(c->vc.chan.device); + unsigned long flags; + LIST_HEAD(head); + + spin_lock_irqsave(&c->vc.lock, flags); + + /* Prevent this channel being scheduled */ + spin_lock(&d->lock); + list_del_init(&c->node); + spin_unlock(&d->lock); + + /* + * Stop DMA activity: we assume the callback will not be called + * after bcm_dma_abort() returns (even if it does, it will see + * c->desc is NULL and exit.) + */ + if (c->desc) { + c->desc = NULL; + bcm2835_dma_abort(c->dma_chan_base); + + /* Wait for stopping */ + while (readl(c->dma_chan_base + BCM2835_DMA_CS) + & BCM2835_DMA_ACTIVE) + ; + } + + vchan_get_all_descriptors(&c->vc, &head); + spin_unlock_irqrestore(&c->vc.lock, flags); + vchan_dma_desc_free_list(&c->vc, &head); + + return 0; +} + +static int bcm2835_dma_pause(struct bcm2835_chan *c) +{ + /* FIXME: not supported by platform private API */ + return -EINVAL; +} + +static int bcm2835_dma_resume(struct bcm2835_chan *c) +{ + /* FIXME: not supported by platform private API */ + return -EINVAL; +} + +static int bcm2835_dma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd, + unsigned long arg) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + int ret; + + switch (cmd) { + case DMA_SLAVE_CONFIG: + ret = bcm2835_dma_slave_config(c, + (struct dma_slave_config *)arg); + break; + + case DMA_TERMINATE_ALL: + ret = bcm2835_dma_terminate_all(c); + break; + + case DMA_PAUSE: + ret = bcm2835_dma_pause(c); + break; + + case DMA_RESUME: + ret = bcm2835_dma_resume(c); + break; + + default: + ret = -ENXIO; + break; + } + + return ret; +} + +static int bcm2835_dma_chan_init(struct bcm2835_dmadev *od, int dma_sig) +{ + struct bcm2835_chan *c; + + c = kzalloc(sizeof(*c), GFP_KERNEL); + if (!c) + return -ENOMEM; + + c->dma_sig = dma_sig; + c->vc.desc_free = bcm2835_dma_desc_free; + vchan_init(&c->vc, &od->ddev); + INIT_LIST_HEAD(&c->node); + + od->ddev.chancnt++; + + return 0; +} + +static void bcm2835_dma_free(struct bcm2835_dmadev *od) +{ + tasklet_kill(&od->task); + while (!list_empty(&od->ddev.channels)) { + struct bcm2835_chan *c = list_first_entry(&od->ddev.channels, + struct bcm2835_chan, vc.chan.device_node); + + list_del(&c->vc.chan.device_node); + tasklet_kill(&c->vc.task); + kfree(c); + } +} + +#if defined(CONFIG_OF) +static const struct of_device_id bcm2835_dma_of_match[] = { + { + .compatible = "brcm,bcm2835-dma", + } +}; +MODULE_DEVICE_TABLE(of, bcm2835_dma_of_match); +#endif + +static int bcm2835_dma_probe(struct platform_device *pdev) +{ + struct bcm2835_dmadev *od; + struct resource *dma_res = NULL; + void __iomem *dma_base = NULL; + int rc = 0; + int i; + struct resource *irq; + int irq_resources; + + od = devm_kzalloc(&pdev->dev, sizeof(*od), GFP_KERNEL); + if (!od) + return -ENOMEM; + + dma_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + dma_base = devm_ioremap_resource(&pdev->dev, dma_res); + if (IS_ERR(dma_base)) + return PTR_ERR(dma_base); + + od->dma_base = dma_base; + od->chans_available = BCM2835_DMA_CHANNEL_MASK; + + dma_cap_set(DMA_SLAVE, od->ddev.cap_mask); + dma_cap_set(DMA_CYCLIC, od->ddev.cap_mask); + od->ddev.device_alloc_chan_resources = bcm2835_dma_alloc_chan_resources; + od->ddev.device_free_chan_resources = bcm2835_dma_free_chan_resources; + od->ddev.device_tx_status = bcm2835_dma_tx_status; + od->ddev.device_issue_pending = bcm2835_dma_issue_pending; + od->ddev.device_prep_dma_cyclic = bcm2835_dma_prep_dma_cyclic; + od->ddev.device_control = bcm2835_dma_control; + od->ddev.dev = &pdev->dev; + INIT_LIST_HEAD(&od->ddev.channels); + INIT_LIST_HEAD(&od->pending); + spin_lock_init(&od->lock); + + tasklet_init(&od->task, bcm2835_dma_sched, (unsigned long)od); + + irq_resources = 0; + + for (i = 0; i < pdev->num_resources; i++) { + if (IORESOURCE_IRQ == resource_type(&pdev->resource[i])) + irq_resources++; + } + + od->dma_irq_numbers = devm_kzalloc(&pdev->dev, + irq_resources*sizeof(int), GFP_KERNEL); + if (!od) + return -ENOMEM; + + for (i = 0; i < irq_resources; i++) { + rc = bcm2835_dma_chan_init(od, i); + if (rc) { + bcm2835_dma_free(od); + return rc; + } + + irq = platform_get_resource(pdev, IORESOURCE_IRQ, i); + if (!irq) { + dev_err(&pdev->dev, + "No IRQ resource for channel %i\n", i); + return -ENODEV; + } + od->dma_irq_numbers[i] = irq->start; + } + + rc = dma_async_device_register(&od->ddev); + if (rc) { + dev_err(&pdev->dev, + "Failed to register slave DMA engine device: %d\n", rc); + bcm2835_dma_free(od); + return rc; + } + + platform_set_drvdata(pdev, od); + + if (pdev->dev.of_node) { + bcm2835_dma_info.dma_cap = od->ddev.cap_mask; + + /* Device-tree DMA controller registration */ + rc = of_dma_controller_register(pdev->dev.of_node, + of_dma_simple_xlate, &bcm2835_dma_info); + if (rc) { + dev_err(&pdev->dev, "Failed to register DMA controller\n"); + dma_async_device_unregister(&od->ddev); + bcm2835_dma_free(od); + return rc; + } + } + + dev_dbg(&pdev->dev, "Load BCM2835 DMA engine driver\n"); + + return rc; +} + +static int bcm2835_dma_remove(struct platform_device *pdev) +{ + struct bcm2835_dmadev *od = platform_get_drvdata(pdev); + + dma_async_device_unregister(&od->ddev); + bcm2835_dma_free(od); + + return 0; +} + +static struct platform_driver bcm2835_dma_driver = { + .probe = bcm2835_dma_probe, + .remove = bcm2835_dma_remove, + .driver = { + .name = "bcm2835-dma", + .owner = THIS_MODULE, + .of_match_table = of_match_ptr(bcm2835_dma_of_match), + }, +}; + +static const struct platform_device_info bcm2835_dma_dev_info = { + .name = "bcm2835-dma", + .id = -1, + .dma_mask = DMA_BIT_MASK(32), +}; + +static int bcm2835_dma_init(void) +{ + int rc = platform_driver_register(&bcm2835_dma_driver); + return rc; +} +subsys_initcall(bcm2835_dma_init); + +static void __exit bcm2835_dma_exit(void) +{ + platform_driver_unregister(&bcm2835_dma_driver); +} +module_exit(bcm2835_dma_exit); + +MODULE_AUTHOR("Florian Meier"); +MODULE_DESCRIPTION("BCM2835 DMA engine driver"); +MODULE_LICENSE("GPL"); + -- 1.7.9.5

5 10

[alsa-devel] [PATCH v2] ALSA: usb-audio: add front jack channel selector for EMU0204
by Vasily Khoruzhick 13 Nov '13

13 Nov '13

Add support for front jack channel selector which is present on EMU0204. It allows to get 4 channels out of this soundcard. Tested-by: Yury Bushmelev <jay(a)jay-tech.ru> Signed-off-by: Vasily Khoruzhick <anarsoul(a)gmail.com> --- v2: - pass constants for bRequest and bRequestType into snd_usb_ctl_msg() - implement control as an enum instead of a switch. sound/usb/mixer_quirks.c | 87 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 87 insertions(+) diff --git a/sound/usb/mixer_quirks.c b/sound/usb/mixer_quirks.c index d42a584..83f8ab1 100644 --- a/sound/usb/mixer_quirks.c +++ b/sound/usb/mixer_quirks.c @@ -433,6 +433,86 @@ static void snd_audigy2nx_proc_read(struct snd_info_entry *entry, } } +/* EMU0204 */ +static int snd_emu0204_ch_switch_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + static const char *texts[4] = {"1/2", + "3/4" + }; + + uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; + uinfo->count = 1; + uinfo->value.enumerated.items = 2; + if (uinfo->value.enumerated.item > 1) + uinfo->value.enumerated.item = 1; + strcpy(uinfo->value.enumerated.name, + texts[uinfo->value.enumerated.item]); + + return 0; +} + +static int snd_emu0204_ch_switch_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + ucontrol->value.enumerated.item[0] = kcontrol->private_value; + return 0; +} + +static int snd_emu0204_ch_switch_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct usb_mixer_interface *mixer = snd_kcontrol_chip(kcontrol); + int value = ucontrol->value.enumerated.item[0]; + int err, changed; + unsigned char buf[2]; + + buf[0] = 0x01; + buf[1] = value ? 0x02 : 0x01; + + changed = value != kcontrol->private_value; + down_read(&mixer->chip->shutdown_rwsem); + if (mixer->chip->shutdown) { + err = -ENODEV; + goto out; + } + err = snd_usb_ctl_msg(mixer->chip->dev, + usb_sndctrlpipe(mixer->chip->dev, 0), UAC_SET_CUR, + USB_RECIP_INTERFACE | USB_TYPE_CLASS | USB_DIR_OUT, + 0x0400, 0x0e00, buf, 2); + out: + up_read(&mixer->chip->shutdown_rwsem); + if (err < 0) + return err; + kcontrol->private_value = value; + return changed; +} + + +static struct snd_kcontrol_new snd_emu0204_controls[] = { + { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .name = "Front Jack Channels", + .info = snd_emu0204_ch_switch_info, + .get = snd_emu0204_ch_switch_get, + .put = snd_emu0204_ch_switch_put, + .private_value = 0, + }, +}; + +static int snd_emu0204_controls_create(struct usb_mixer_interface *mixer) +{ + int i, err; + + for (i = 0; i < ARRAY_SIZE(snd_emu0204_controls); ++i) { + err = snd_ctl_add(mixer->chip->card, + snd_ctl_new1(&snd_emu0204_controls[i], mixer)); + if (err < 0) + return err; + } + + return 0; +} /* ASUS Xonar U1 / U3 controls */ static int snd_xonar_u1_switch_get(struct snd_kcontrol *kcontrol, @@ -1545,6 +1625,13 @@ int snd_usb_mixer_apply_create_quirk(struct usb_mixer_interface *mixer) snd_audigy2nx_proc_read); break; + /* EMU0204 */ + case USB_ID(0x041e, 0x3f19): + err = snd_emu0204_controls_create(mixer); + if (err < 0) + break; + break; + case USB_ID(0x0763, 0x2030): /* M-Audio Fast Track C400 */ case USB_ID(0x0763, 0x2031): /* M-Audio Fast Track C400 */ err = snd_c400_create_mixer(mixer); -- 1.8.4.2

2 4

[alsa-devel] [PATCH] ALSA: hda - Don't clear the power state at snd_hda_codec_reset()
by Takashi Iwai 13 Nov '13

13 Nov '13

snd_hda_codec_reset() is called either in resetting the whole setup at error paths or hwdep clear/reconfig sysfs triggers. But all of these don't assume that the power has to be off, rather they want to keep the power state unchanged (e.g. reconfig_codec() calls the power up/down by itself). Thus, unconditionally clearing the power state in snd_hda_codec_reset() leads to the inconsistency, confuses the further operation. This patch gets rid of the lines doing that bad thing. Cc: <stable(a)vger.kernel.org> Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- sound/pci/hda/hda_codec.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/sound/pci/hda/hda_codec.c b/sound/pci/hda/hda_codec.c index dd5403d40830..afb90f48867f 100644 --- a/sound/pci/hda/hda_codec.c +++ b/sound/pci/hda/hda_codec.c @@ -2579,9 +2579,6 @@ int snd_hda_codec_reset(struct hda_codec *codec) cancel_delayed_work_sync(&codec->jackpoll_work); #ifdef CONFIG_PM cancel_delayed_work_sync(&codec->power_work); - codec->power_on = 0; - codec->power_transition = 0; - codec->power_jiffies = jiffies; flush_workqueue(bus->workq); #endif snd_hda_ctls_clear(codec); -- 1.8.4.2

1 0

[alsa-devel] [PATCH] ASoC: fsl-ssi: fix SDMA starvation
by Markus Pargmann 13 Nov '13

13 Nov '13

From: Juergen Beisert <jbe(a)pengutronix.de> In cases when capturing is already running and someone enables also playback, the SDMA unit of the i.MX SoC does not see an edge on its TX DMA request line. This is due to the TX FIFOs are empty, and this request line is active all the time, when the CCSR_SSI_SIER_TDMAE bit is set. In this case also the TX FIFO underrun interrupt will flood the system forever. To ensure the first edge happens after enabling the TX side of the SSI unit and to trigger the SDMA unit successfully enable the CCSR_SSI_SIER_TDMAE on demand only. To be sure, this patch does the same for the CCSR_SSI_SIER_RDMAE (RX side) bit. Signed-off-by: Juergen Beisert <jbe(a)pengutronix.de> Cc: stable(a)vger.kernel.org Signed-off-by: Markus Pargmann <mpa(a)pengutronix.de> --- Hi, The patch is based on Mark's "fix/fsl" branch. Regards, Markus Pargmann sound/soc/fsl/fsl_ssi.c | 24 ++++++++++++++++-------- 1 file changed, 16 insertions(+), 8 deletions(-) diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c index 6b81d0c..8c94632 100644 --- a/sound/soc/fsl/fsl_ssi.c +++ b/sound/soc/fsl/fsl_ssi.c @@ -107,10 +107,9 @@ static inline void write_ssi_mask(u32 __iomem *addr, u32 clear, u32 set) #endif /* SIER bitflag of interrupts to enable */ -#define SIER_FLAGS (CCSR_SSI_SIER_TFRC_EN | CCSR_SSI_SIER_TDMAE | \ - CCSR_SSI_SIER_TIE | CCSR_SSI_SIER_TUE0_EN | \ - CCSR_SSI_SIER_TUE1_EN | CCSR_SSI_SIER_RFRC_EN | \ - CCSR_SSI_SIER_RDMAE | CCSR_SSI_SIER_RIE | \ +#define SIER_FLAGS (CCSR_SSI_SIER_TFRC_EN | CCSR_SSI_SIER_TIE | \ + CCSR_SSI_SIER_TUE0_EN | CCSR_SSI_SIER_TUE1_EN | \ + CCSR_SSI_SIER_RFRC_EN | CCSR_SSI_SIER_RIE | \ CCSR_SSI_SIER_ROE0_EN | CCSR_SSI_SIER_ROE1_EN) /** @@ -548,6 +547,9 @@ static int fsl_ssi_hw_params(struct snd_pcm_substream *substream, * * The DMA channel is in external master start and pause mode, which * means the SSI completely controls the flow of data. + * + * To use the i.MX's SDMA unit it is important to create an edge on the + * corresponding request line. Otherwise the request will be ignored! */ static int fsl_ssi_trigger(struct snd_pcm_substream *substream, int cmd, struct snd_soc_dai *dai) @@ -580,20 +582,26 @@ static int fsl_ssi_trigger(struct snd_pcm_substream *substream, int cmd, switch (cmd) { case SNDRV_PCM_TRIGGER_START: case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: - if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { write_ssi_mask(&ssi->scr, 0, CCSR_SSI_SCR_SSIEN | CCSR_SSI_SCR_TE); - else + write_ssi_mask(&ssi->sier, 0, CCSR_SSI_SIER_TDMAE); + } else { write_ssi_mask(&ssi->scr, 0, CCSR_SSI_SCR_SSIEN | CCSR_SSI_SCR_RE); + write_ssi_mask(&ssi->sier, 0, CCSR_SSI_SIER_RDMAE); + } break; case SNDRV_PCM_TRIGGER_STOP: case SNDRV_PCM_TRIGGER_PAUSE_PUSH: - if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { write_ssi_mask(&ssi->scr, CCSR_SSI_SCR_TE, 0); - else + write_ssi_mask(&ssi->sier, CCSR_SSI_SIER_TDMAE, 0); + } else { write_ssi_mask(&ssi->scr, CCSR_SSI_SCR_RE, 0); + write_ssi_mask(&ssi->sier, CCSR_SSI_SIER_RDMAE, 0); + } if (!ssi_private->imx_ac97 && (read_ssi(&ssi->scr) & (CCSR_SSI_SCR_TE | CCSR_SSI_SCR_RE)) == 0) -- 1.8.4.2

3 9

[alsa-devel] ERROR:PCM WRITE ASSRTION FAILED
by ranjith vs 13 Nov '13

13 Nov '13

hi, I am getting following errors while writing to speaker " snd_pcm_writei: Assertion `pcm' failed." what might be the reasons for that and is there any solutions. thanks & regards, Ranjith

2 1

[alsa-devel] [PATCH] ASoC: fsl-ssi: Fix interrupt enable/disable
by Markus Pargmann 13 Nov '13

13 Nov '13

The fsl_ssi_trigger function enables all interrupts (for RX and TX) when a stream is started. The enabled interrupts are never cleared. We don't need all interrupts enabled for one active stream, e.g. RX interrupts are not necessary for playback. Next to the interrupts, the DMA enable bits are set at the same time. This can lead to lost DMA requests and SDMA starvation. This patch seperates the SIER flags into DMA_TX and DMA_RX flags to seperatly enable/disable the TX/RX channels. Based on Jürgen Beisert's patch 'ASoC: fsl-ssi: fix SDMA starvation'. Cc: Jürgen Beisert <jbe(a)pengutronix.de> Signed-off-by: Markus Pargmann <mpa(a)pengutronix.de> --- sound/soc/fsl/fsl_ssi.c | 33 ++++++++++++++++++++------------- 1 file changed, 20 insertions(+), 13 deletions(-) diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c index 6b81d0c..905b8db 100644 --- a/sound/soc/fsl/fsl_ssi.c +++ b/sound/soc/fsl/fsl_ssi.c @@ -107,11 +107,18 @@ static inline void write_ssi_mask(u32 __iomem *addr, u32 clear, u32 set) #endif /* SIER bitflag of interrupts to enable */ -#define SIER_FLAGS (CCSR_SSI_SIER_TFRC_EN | CCSR_SSI_SIER_TDMAE | \ - CCSR_SSI_SIER_TIE | CCSR_SSI_SIER_TUE0_EN | \ - CCSR_SSI_SIER_TUE1_EN | CCSR_SSI_SIER_RFRC_EN | \ - CCSR_SSI_SIER_RDMAE | CCSR_SSI_SIER_RIE | \ - CCSR_SSI_SIER_ROE0_EN | CCSR_SSI_SIER_ROE1_EN) +#define FSLSSI_TX_SIER_FLAGS (CCSR_SSI_SIER_TIE | CCSR_SSI_SIER_TFE0_EN) +#define FSLSSI_RX_SIER_FLAGS (CCSR_SSI_SIER_RIE | CCSR_SSI_SIER_RFF0_EN) + +#define FSLSSI_DMA_TX_SIER_FLAGS (CCSR_SSI_SIER_TFRC_EN | \ + CCSR_SSI_SIER_TDMAE | CCSR_SSI_SIER_TIE | \ + CCSR_SSI_SIER_TUE0_EN | CCSR_SSI_SIER_TUE1_EN) +#define FSLSSI_DMA_RX_SIER_FLAGS (CCSR_SSI_SIER_RFRC_EN | \ + CCSR_SSI_SIER_RDMAE | CCSR_SSI_SIER_RIE | \ + CCSR_SSI_SIER_ROE0_EN | CCSR_SSI_SIER_ROE1_EN) + +#define FSLSSI_SISR_MASK (FSLSSI_TX_SIER_FLAGS | FSLSSI_RX_SIER_FLAGS | \ + FSLSSI_DMA_TX_SIER_FLAGS | FSLSSI_DMA_RX_SIER_FLAGS) /** * fsl_ssi_private: per-SSI private data @@ -201,7 +208,7 @@ static irqreturn_t fsl_ssi_isr(int irq, void *dev_id) were interrupted for. We mask it with the Interrupt Enable register so that we only check for events that we're interested in. */ - sisr = read_ssi(&ssi->sisr) & SIER_FLAGS; + sisr = read_ssi(&ssi->sisr) & FSLSSI_SISR_MASK; if (sisr & CCSR_SSI_SISR_RFRC) { ssi_private->stats.rfrc++; @@ -567,19 +574,20 @@ static int fsl_ssi_trigger(struct snd_pcm_substream *substream, int cmd, if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { if (ssi_private->use_dma) - sier_bits = SIER_FLAGS; + sier_bits = FSLSSI_DMA_TX_SIER_FLAGS; else - sier_bits = CCSR_SSI_SIER_TIE | CCSR_SSI_SIER_TFE0_EN; + sier_bits = FSLSSI_TX_SIER_FLAGS; } else { if (ssi_private->use_dma) - sier_bits = SIER_FLAGS; + sier_bits = FSLSSI_DMA_RX_SIER_FLAGS; else - sier_bits = CCSR_SSI_SIER_RIE | CCSR_SSI_SIER_RFF0_EN; + sier_bits = FSLSSI_RX_SIER_FLAGS; } switch (cmd) { case SNDRV_PCM_TRIGGER_START: case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + write_ssi_mask(&ssi->sier, 0, sier_bits); if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) write_ssi_mask(&ssi->scr, 0, CCSR_SSI_SCR_SSIEN | CCSR_SSI_SCR_TE); @@ -590,6 +598,7 @@ static int fsl_ssi_trigger(struct snd_pcm_substream *substream, int cmd, case SNDRV_PCM_TRIGGER_STOP: case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + write_ssi_mask(&ssi->sier, sier_bits, 0); if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) write_ssi_mask(&ssi->scr, CCSR_SSI_SCR_TE, 0); else @@ -604,8 +613,6 @@ static int fsl_ssi_trigger(struct snd_pcm_substream *substream, int cmd, return -EINVAL; } - write_ssi(sier_bits, &ssi->sier); - return 0; } @@ -801,7 +808,7 @@ static struct snd_ac97_bus_ops fsl_ssi_ac97_ops = { */ #define SIER_SHOW(flag, name) \ do { \ - if (SIER_FLAGS & CCSR_SSI_SIER_##flag) \ + if (FSLSSI_SISR_MASK & CCSR_SSI_SIER_##flag) \ length += sprintf(buf + length, #name "=%u\n", \ ssi_private->stats.name); \ } while (0) -- 1.8.4.2

1 1

[alsa-devel] [PATCH] ASoC: arizona: Fix typo in name of EQ coefficient controls
by Richard Fitzgerald 13 Nov '13

13 Nov '13

Signed-off-by: Richard Fitzgerald <rf(a)opensource.wolfsonmicro.com> --- sound/soc/codecs/wm5102.c | 8 ++++---- sound/soc/codecs/wm5110.c | 8 ++++---- sound/soc/codecs/wm8997.c | 8 ++++---- 3 files changed, 12 insertions(+), 12 deletions(-) diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 8bbddc1..a08e8bf 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -685,13 +685,13 @@ ARIZONA_MIXER_CONTROLS("EQ2", ARIZONA_EQ2MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("EQ3", ARIZONA_EQ3MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("EQ4", ARIZONA_EQ4MIX_INPUT_1_SOURCE), -SND_SOC_BYTES_MASK("EQ1 Coefficeints", ARIZONA_EQ1_1, 21, +SND_SOC_BYTES_MASK("EQ1 Coefficients", ARIZONA_EQ1_1, 21, ARIZONA_EQ1_ENA_MASK), -SND_SOC_BYTES_MASK("EQ2 Coefficeints", ARIZONA_EQ2_1, 21, +SND_SOC_BYTES_MASK("EQ2 Coefficients", ARIZONA_EQ2_1, 21, ARIZONA_EQ2_ENA_MASK), -SND_SOC_BYTES_MASK("EQ3 Coefficeints", ARIZONA_EQ3_1, 21, +SND_SOC_BYTES_MASK("EQ3 Coefficients", ARIZONA_EQ3_1, 21, ARIZONA_EQ3_ENA_MASK), -SND_SOC_BYTES_MASK("EQ4 Coefficeints", ARIZONA_EQ4_1, 21, +SND_SOC_BYTES_MASK("EQ4 Coefficients", ARIZONA_EQ4_1, 21, ARIZONA_EQ4_ENA_MASK), SOC_SINGLE_TLV("EQ1 B1 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B1_GAIN_SHIFT, diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index bbd6438..b67ba33 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -101,13 +101,13 @@ ARIZONA_MIXER_CONTROLS("EQ2", ARIZONA_EQ2MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("EQ3", ARIZONA_EQ3MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("EQ4", ARIZONA_EQ4MIX_INPUT_1_SOURCE), -SND_SOC_BYTES_MASK("EQ1 Coefficeints", ARIZONA_EQ1_1, 21, +SND_SOC_BYTES_MASK("EQ1 Coefficients", ARIZONA_EQ1_1, 21, ARIZONA_EQ1_ENA_MASK), -SND_SOC_BYTES_MASK("EQ2 Coefficeints", ARIZONA_EQ2_1, 21, +SND_SOC_BYTES_MASK("EQ2 Coefficients", ARIZONA_EQ2_1, 21, ARIZONA_EQ2_ENA_MASK), -SND_SOC_BYTES_MASK("EQ3 Coefficeints", ARIZONA_EQ3_1, 21, +SND_SOC_BYTES_MASK("EQ3 Coefficients", ARIZONA_EQ3_1, 21, ARIZONA_EQ3_ENA_MASK), -SND_SOC_BYTES_MASK("EQ4 Coefficeints", ARIZONA_EQ4_1, 21, +SND_SOC_BYTES_MASK("EQ4 Coefficients", ARIZONA_EQ4_1, 21, ARIZONA_EQ4_ENA_MASK), SOC_SINGLE_TLV("EQ1 B1 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B1_GAIN_SHIFT, diff --git a/sound/soc/codecs/wm8997.c b/sound/soc/codecs/wm8997.c index 2e886ca..1392bb3 100644 --- a/sound/soc/codecs/wm8997.c +++ b/sound/soc/codecs/wm8997.c @@ -170,13 +170,13 @@ ARIZONA_MIXER_CONTROLS("EQ2", ARIZONA_EQ2MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("EQ3", ARIZONA_EQ3MIX_INPUT_1_SOURCE), ARIZONA_MIXER_CONTROLS("EQ4", ARIZONA_EQ4MIX_INPUT_1_SOURCE), -SND_SOC_BYTES_MASK("EQ1 Coefficeints", ARIZONA_EQ1_1, 21, +SND_SOC_BYTES_MASK("EQ1 Coefficients", ARIZONA_EQ1_1, 21, ARIZONA_EQ1_ENA_MASK), -SND_SOC_BYTES_MASK("EQ2 Coefficeints", ARIZONA_EQ2_1, 21, +SND_SOC_BYTES_MASK("EQ2 Coefficients", ARIZONA_EQ2_1, 21, ARIZONA_EQ2_ENA_MASK), -SND_SOC_BYTES_MASK("EQ3 Coefficeints", ARIZONA_EQ3_1, 21, +SND_SOC_BYTES_MASK("EQ3 Coefficients", ARIZONA_EQ3_1, 21, ARIZONA_EQ3_ENA_MASK), -SND_SOC_BYTES_MASK("EQ4 Coefficeints", ARIZONA_EQ4_1, 21, +SND_SOC_BYTES_MASK("EQ4 Coefficients", ARIZONA_EQ4_1, 21, ARIZONA_EQ4_ENA_MASK), SOC_SINGLE_TLV("EQ1 B1 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B1_GAIN_SHIFT, -- 1.7.2.5

2 1

[alsa-devel] [PATCHv3] dmaengine: Add support for BCM2835
by Florian Meier 13 Nov '13

13 Nov '13

Add support for DMA controller of BCM2835 as used in the Raspberry Pi. Currently it only supports cyclic DMA. Signed-off-by: Florian Meier <florian.meier(a)koalo.de> --- Thank you for your comments! I hope I have now removed all leftovers of the sg struct. Regarding the endian-ness: I have not found any hint about that in the datasheet. Therefore, I chose uint32_t. If you think fixed le32 is more likely I will change it. The PAD fields do not seem to be used, but the datasheet states they should be set to 0. .../devicetree/bindings/dma/bcm2835-dma.txt | 57 ++ arch/arm/boot/dts/bcm2835.dtsi | 23 + drivers/dma/Kconfig | 6 + drivers/dma/Makefile | 1 + drivers/dma/bcm2835-dma.c | 810 ++++++++++++++++++++ 5 files changed, 897 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/bcm2835-dma.txt create mode 100644 drivers/dma/bcm2835-dma.c diff --git a/Documentation/devicetree/bindings/dma/bcm2835-dma.txt b/Documentation/devicetree/bindings/dma/bcm2835-dma.txt new file mode 100644 index 0000000..9542ac8 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/bcm2835-dma.txt @@ -0,0 +1,57 @@ +* BCM2835 DMA controller + +Required properties: +- compatible: Should be "brcm,bcm2835-dma". +- reg: Should contain DMA registers location and length. +- interrupts: Should contain all DMA interrupts. First cell is the IRQ bank + Second cell is the IRQ number. +- #dma-cells: Must be <1>, used to represent the number of integer cells in +the dmas property of client devices. +- dma-channels: Maximum number of DMA channels available +- dma-requests: Number of DMA Requests. +- dma-channel-mask: Bit mask representing the channels available. + +Example: + +dma: dma@7e007000 { + compatible = "brcm,bcm2835-dma"; + reg = <0x7e007000 0xf00>; + interrupts = <1 16 + 1 17 + 1 18 + 1 19 + 1 20 + 1 21 + 1 22 + 1 23 + 1 24 + 1 25 + 1 26 + 1 27 + 1 28>; + + #dma-cells = <1>; + dma-channels = <15>; + dma-requests = <32>; + dma-channel-mask = <0x7f35>; +}; + +DMA clients connected to the BCM2835 DMA controller must use the format +described in the dma.txt file, using a two-cell specifier for each channel: +a phandle plus one integer cells. +The two cells in order are: + +1. A phandle pointing to the DMA controller. +2. The DREQ number. + +Example: + +bcm2835_i2s: i2s@7e203000 { + compatible = "brcm,bcm2835-i2s"; + reg = < 0x7e203000 0x20 + 0x7e101098 0x02>; + + dmas = <&dma 2 + &dma 3>; + dma-names = "tx", "rx"; +}; diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi index 1e12aef..7389405 100644 --- a/arch/arm/boot/dts/bcm2835.dtsi +++ b/arch/arm/boot/dts/bcm2835.dtsi @@ -103,6 +103,29 @@ clocks = <&clk_mmc>; status = "disabled"; }; + + dma: dma@7e007000 { + compatible = "brcm,bcm2835-dma"; + reg = <0x7e007000 0xf00>; + interrupts = <1 16 + 1 17 + 1 18 + 1 19 + 1 20 + 1 21 + 1 22 + 1 23 + 1 24 + 1 25 + 1 26 + 1 27 + 1 28>; + + #dma-cells = <1>; + dma-channels = <15>; /* DMA channel 15 is not handled yet */ + dma-requests = <32>; + dma-channel-mask = <0x7f35>; + }; }; clocks { diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig index f238cfd..f2d253b 100644 --- a/drivers/dma/Kconfig +++ b/drivers/dma/Kconfig @@ -288,6 +288,12 @@ config DMA_OMAP select DMA_ENGINE select DMA_VIRTUAL_CHANNELS +config DMA_BCM2835 + tristate "BCM2835 DMA engine support" + depends on (ARCH_BCM2835 || MACH_BCM2708) + select DMA_ENGINE + select DMA_VIRTUAL_CHANNELS + config TI_CPPI41 tristate "AM33xx CPPI41 DMA support" depends on ARCH_OMAP diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile index db89035..6348157 100644 --- a/drivers/dma/Makefile +++ b/drivers/dma/Makefile @@ -37,6 +37,7 @@ obj-$(CONFIG_EP93XX_DMA) += ep93xx_dma.o obj-$(CONFIG_DMA_SA11X0) += sa11x0-dma.o obj-$(CONFIG_MMP_TDMA) += mmp_tdma.o obj-$(CONFIG_DMA_OMAP) += omap-dma.o +obj-$(CONFIG_DMA_BCM2835) += bcm2835-dma.o obj-$(CONFIG_MMP_PDMA) += mmp_pdma.o obj-$(CONFIG_DMA_JZ4740) += dma-jz4740.o obj-$(CONFIG_TI_CPPI41) += cppi41.o diff --git a/drivers/dma/bcm2835-dma.c b/drivers/dma/bcm2835-dma.c new file mode 100644 index 0000000..141a698 --- /dev/null +++ b/drivers/dma/bcm2835-dma.c @@ -0,0 +1,810 @@ +/* + * BCM2835 DMA engine support + * + * This driver only supports cyclic DMA transfers + * as needed for the I2S module. + * + * Author: Florian Meier, <florian.meier(a)koalo.de> + * Copyright 2013 + * + * based on + * OMAP DMAengine support by Russell King + * + * BCM2708 DMA Driver + * Copyright (C) 2010 Broadcom + * + * Raspberry Pi PCM I2S ALSA Driver + * Copyright (c) by Phil Poole 2013 + * + * MARVELL MMP Peripheral DMA Driver + * Copyright 2012 Marvell International Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include <linux/dmaengine.h> +#include <linux/dma-mapping.h> +#include <linux/err.h> +#include <linux/init.h> +#include <linux/interrupt.h> +#include <linux/list.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/slab.h> +#include <linux/io.h> +#include <linux/spinlock.h> +#include <linux/of.h> +#include <linux/of_dma.h> + +#include "virt-dma.h" + +struct bcm2835_dmadev { + struct dma_device ddev; + spinlock_t lock; + + uint32_t chans_available; + + void __iomem *dma_base; + int *dma_irq_numbers; + + struct device_dma_parameters dma_parms; +}; + +struct bcm2835_dma_cb { + uint32_t info; + uint32_t src; + uint32_t dst; + uint32_t length; + uint32_t stride; + uint32_t next; + uint32_t pad[2]; +}; + +struct bcm2835_chan { + struct virt_dma_chan vc; + struct list_head node; + + struct dma_slave_config cfg; + unsigned dma_sig; + bool cyclic; + unsigned dreq; + + int dma_ch; + struct bcm2835_desc *desc; + + void __iomem *dma_chan_base; + int dma_irq_number; +}; + +struct bcm2835_desc { + struct virt_dma_desc vd; + enum dma_transfer_direction dir; + dma_addr_t dev_addr; + + unsigned int control_block_size; + struct bcm2835_dma_cb *control_block_base; + dma_addr_t control_block_base_phys; + + unsigned frames; +}; + +#define BCM2835_DMA_CS 0x00 +#define BCM2835_DMA_ADDR 0x04 +#define BCM2835_DMA_SOURCE_AD 0x0c +#define BCM2835_DMA_DEST_AD 0x10 +#define BCM2835_DMA_NEXTCB 0x1C + +/* DMA CS Control and Status bits */ +#define BCM2835_DMA_ACTIVE (1 << 0) +#define BCM2835_DMA_INT (1 << 2) +#define BCM2835_DMA_ISPAUSED (1 << 4) /* Pause requested or not active */ +#define BCM2835_DMA_ISHELD (1 << 5) /* Is held by DREQ flow control */ +#define BCM2835_DMA_ERR (1 << 8) +#define BCM2835_DMA_ABORT (1 << 30) /* stop current CB, go to next, WO */ +#define BCM2835_DMA_RESET (1 << 31) /* WO, self clearing */ + +#define BCM2835_DMA_INT_EN (1 << 0) +#define BCM2835_DMA_D_INC (1 << 4) +#define BCM2835_DMA_D_DREQ (1 << 6) +#define BCM2835_DMA_S_INC (1 << 8) +#define BCM2835_DMA_S_DREQ (1 << 6) + +#define BCM2835_DMA_PER_MAP(x) ((x) << 16) + +#define BCM2835_DMA_DATA_TYPE_S8 1 +#define BCM2835_DMA_DATA_TYPE_S16 2 +#define BCM2835_DMA_DATA_TYPE_S32 4 +#define BCM2835_DMA_DATA_TYPE_S128 16 + +/* valid only for channels 0 - 14, 15 has its own base address */ +#define BCM2835_DMA_CHAN(n) ((n) << 8) /* base address */ +#define BCM2835_DMA_CHANIO(dma_base, n) ((dma_base) + BCM2835_DMA_CHAN(n)) + +static inline struct bcm2835_dmadev *to_bcm2835_dma_dev(struct dma_device *d) +{ + return container_of(d, struct bcm2835_dmadev, ddev); +} + +static inline struct bcm2835_chan *to_bcm2835_dma_chan(struct dma_chan *c) +{ + return container_of(c, struct bcm2835_chan, vc.chan); +} + +static inline struct bcm2835_desc *to_bcm2835_dma_desc( + struct dma_async_tx_descriptor *t) +{ + return container_of(t, struct bcm2835_desc, vd.tx); +} + +static void bcm2835_dma_desc_free(struct virt_dma_desc *vd) +{ + struct bcm2835_desc *desc = container_of(vd, struct bcm2835_desc, vd); + dma_free_coherent(desc->vd.tx.chan->device->dev, + desc->control_block_size, + desc->control_block_base, + desc->control_block_base_phys); + kfree(desc); +} + +static int bcm2835_dma_abort(void __iomem *dma_chan_base) +{ + unsigned long int cs; + int rc = 0; + + cs = readl(dma_chan_base + BCM2835_DMA_CS); + + if (BCM2835_DMA_ACTIVE & cs) { + long int timeout = 10000; + + /* write 0 to the active bit - pause the DMA */ + writel(0, dma_chan_base + BCM2835_DMA_CS); + + /* wait for any current AXI transfer to complete */ + while ((cs & BCM2835_DMA_ISPAUSED) && --timeout >= 0) + cs = readl(dma_chan_base + BCM2835_DMA_CS); + + if (cs & BCM2835_DMA_ISPAUSED) { + /* we'll un-pause when we set of our next DMA */ + rc = -ETIMEDOUT; + + } else if (BCM2835_DMA_ACTIVE & cs) { + /* terminate the control block chain */ + writel(0, dma_chan_base + BCM2835_DMA_NEXTCB); + + /* abort the whole DMA */ + writel(BCM2835_DMA_ABORT | BCM2835_DMA_ACTIVE, + dma_chan_base + BCM2835_DMA_CS); + } + } + + return rc; +} + +static void bcm2835_dma_start_desc(struct bcm2835_chan *c) +{ + struct virt_dma_desc *vd = vchan_next_desc(&c->vc); + struct bcm2835_desc *d; + + if (!vd) { + c->desc = NULL; + return; + } + + list_del(&vd->node); + + c->desc = d = to_bcm2835_dma_desc(&vd->tx); + + dsb(); /* ARM data synchronization (push) operation */ + + writel(d->control_block_base_phys, c->dma_chan_base + BCM2835_DMA_ADDR); + writel(BCM2835_DMA_ACTIVE, c->dma_chan_base + BCM2835_DMA_CS); +} + +static irqreturn_t bcm2835_dma_callback(int irq, void *data) +{ + struct bcm2835_chan *c = data; + struct bcm2835_desc *d; + unsigned long flags; + + spin_lock_irqsave(&c->vc.lock, flags); + + /* acknowledge interrupt */ + writel(BCM2835_DMA_INT, c->dma_chan_base + BCM2835_DMA_CS); + + d = c->desc; + + if (d) { + if (!c->cyclic) { + bcm2835_dma_start_desc(c); + vchan_cookie_complete(&d->vd); + } else { + vchan_cyclic_callback(&d->vd); + } + } + + /* keep the DMA engine running */ + dsb(); /* ARM synchronization barrier */ + writel(BCM2835_DMA_ACTIVE, c->dma_chan_base + BCM2835_DMA_CS); + + spin_unlock_irqrestore(&c->vc.lock, flags); + + return IRQ_HANDLED; +} + +static int bcm2835_dma_alloc_chan_resources(struct dma_chan *chan) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + int ret; + struct bcm2835_dmadev *d = to_bcm2835_dma_dev(chan->device); + uint32_t chans = d->chans_available; + int chanID = 0; + unsigned long flags; + + spin_lock_irqsave(&d->lock, flags); + + chans = d->chans_available; + + dev_dbg(c->vc.chan.device->dev, + "allocating channel for %u\n", c->dma_sig); + + /* do not use the FIQ and BULK channels */ + chans &= ~0xD; + + if (!chans) { + spin_unlock_irqrestore(&d->lock, flags); + return -ENOMEM; + } + + /* return the ordinal of the first channel in the bitmap */ + chanID = __ffs(chans); + + /* claim the channel */ + d->chans_available &= ~(1 << chanID); + + c->dma_chan_base = BCM2835_DMA_CHANIO(d->dma_base, chanID); + c->dma_irq_number = d->dma_irq_numbers[chanID]; + c->dma_ch = chanID; + + ret = request_irq(c->dma_irq_number, + bcm2835_dma_callback, 0, "DMA IRQ", c); + + spin_unlock_irqrestore(&d->lock, flags); + + if (ret < 0) + return ret; + + return 0; +} + +static void bcm2835_dma_free_chan_resources(struct dma_chan *chan) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + struct bcm2835_dmadev *d = to_bcm2835_dma_dev(chan->device); + unsigned long flags; + + spin_lock_irqsave(&d->lock, flags); + vchan_free_chan_resources(&c->vc); + d->chans_available |= 1 << c->dma_ch; + free_irq(c->dma_irq_number, c); + spin_unlock_irqrestore(&d->lock, flags); + + dev_dbg(c->vc.chan.device->dev, "freeing channel for %u\n", c->dma_sig); +} + +static size_t bcm2835_dma_desc_size(struct bcm2835_desc *d) +{ + unsigned i; + size_t size; + + for (size = i = 0; i < d->frames; i++) { + struct bcm2835_dma_cb *control_block = + &d->control_block_base[i]; + + size += control_block->length; + } + + return size; +} + +static size_t bcm2835_dma_desc_size_pos(struct bcm2835_desc *d, dma_addr_t addr) +{ + unsigned i; + size_t size; + + for (size = i = 0; i < d->frames; i++) { + struct bcm2835_dma_cb *control_block = + &d->control_block_base[i]; + size_t this_size = control_block->length; + dma_addr_t dma; + + if (d->dir == DMA_DEV_TO_MEM) + dma = control_block->dst; + else + dma = control_block->src; + + if (size) + size += this_size; + else if (addr >= dma && addr < dma + this_size) + size += dma + this_size - addr; + } + + return size; +} + +static enum dma_status bcm2835_dma_tx_status(struct dma_chan *chan, + dma_cookie_t cookie, struct dma_tx_state *txstate) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + struct virt_dma_desc *vd; + enum dma_status ret; + unsigned long flags; + + ret = dma_cookie_status(chan, cookie, txstate); + if (ret == DMA_SUCCESS || !txstate) + return ret; + + spin_lock_irqsave(&c->vc.lock, flags); + vd = vchan_find_desc(&c->vc, cookie); + if (vd) { + txstate->residue = + bcm2835_dma_desc_size(to_bcm2835_dma_desc(&vd->tx)); + } else if (c->desc && c->desc->vd.tx.cookie == cookie) { + struct bcm2835_desc *d = c->desc; + dma_addr_t pos; + + if (d->dir == DMA_MEM_TO_DEV) + pos = readl(c->dma_chan_base + BCM2835_DMA_SOURCE_AD); + else if (d->dir == DMA_DEV_TO_MEM) + pos = readl(c->dma_chan_base + BCM2835_DMA_DEST_AD); + else + pos = 0; + + txstate->residue = bcm2835_dma_desc_size_pos(d, pos); + } else { + txstate->residue = 0; + } + + spin_unlock_irqrestore(&c->vc.lock, flags); + + return ret; +} + +static void bcm2835_dma_issue_pending(struct dma_chan *chan) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + unsigned long flags; + + c->cyclic = true; /* nothing else is implemented */ + + spin_lock_irqsave(&c->vc.lock, flags); + if (vchan_issue_pending(&c->vc) && !c->desc) { + bcm2835_dma_start_desc(c); + } + spin_unlock_irqrestore(&c->vc.lock, flags); +} + + +static struct dma_async_tx_descriptor *bcm2835_dma_prep_dma_cyclic( + struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len, + size_t period_len, enum dma_transfer_direction direction, + unsigned long flags, void *context) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + enum dma_slave_buswidth dev_width; + struct bcm2835_desc *d; + dma_addr_t dev_addr; + unsigned es, sync_type; + unsigned frame; + + /* Grab configuration */ + if (direction == DMA_DEV_TO_MEM) { + dev_addr = c->cfg.src_addr; + dev_width = c->cfg.src_addr_width; + sync_type = BCM2835_DMA_S_DREQ; + } else if (direction == DMA_MEM_TO_DEV) { + dev_addr = c->cfg.dst_addr; + dev_width = c->cfg.dst_addr_width; + sync_type = BCM2835_DMA_D_DREQ; + } else { + dev_err(chan->device->dev, "%s: bad direction?\n", __func__); + return NULL; + } + + /* Bus width translates to the element size (ES) */ + switch (dev_width) { + case DMA_SLAVE_BUSWIDTH_4_BYTES: + es = BCM2835_DMA_DATA_TYPE_S32; + break; + default: + return NULL; + } + + /* Now allocate and setup the descriptor. */ + d = kzalloc(sizeof(*d), GFP_ATOMIC); + if (!d) + return NULL; + + d->dir = direction; + d->dev_addr = dev_addr; + d->frames = buf_len / period_len; + + /* Allocate memory for control blocks */ + d->control_block_size = d->frames * sizeof(struct bcm2835_dma_cb); + d->control_block_base = dma_alloc_coherent(chan->device->dev, + d->control_block_size, &d->control_block_base_phys, + GFP_KERNEL); + + if (!d->control_block_base) { + dev_err(chan->device->dev, + "%s: Memory allocation error\n", __func__); + return NULL; + } + + memset(d->control_block_base, 0, d->control_block_size); + + /* + * Iterate over all frames, create a control block + * for each frame and link them together. + */ + for (frame = 0; frame < d->frames; frame++) { + struct bcm2835_dma_cb *control_block = + &d->control_block_base[frame]; + + /* Setup adresses */ + if (d->dir == DMA_DEV_TO_MEM) { + control_block->info = BCM2835_DMA_D_INC; + control_block->src = d->dev_addr; + control_block->dst = buf_addr + frame * period_len; + } else { + control_block->info = BCM2835_DMA_S_INC; + control_block->src = buf_addr + frame * period_len; + control_block->dst = d->dev_addr; + } + + /* Enable interrupt */ + control_block->info |= BCM2835_DMA_INT_EN; + + /* Setup synchronization */ + if (sync_type != 0) + control_block->info |= sync_type; + + /* Setup DREQ channel */ + if (c->dreq != 0) + control_block->info |= + BCM2835_DMA_PER_MAP(c->dreq); + + /* Length of a frame */ + control_block->length = period_len; + + /* + * Next block is the next frame. + * This DMA engine driver currently only supports cyclic DMA. + * Therefore, wrap around at number of frames. + */ + control_block->next = d->control_block_base_phys + + sizeof(struct bcm2835_dma_cb) * ((frame + 1) % (d->frames)); + + /* The following fields are not used here */ + control_block->stride = 0; + control_block->pad[0] = 0; + control_block->pad[1] = 0; + } + + return vchan_tx_prep(&c->vc, &d->vd, flags); +} + +static int bcm2835_dma_slave_config(struct bcm2835_chan *c, + struct dma_slave_config *cfg) +{ + if ((cfg->direction == DMA_DEV_TO_MEM && + cfg->src_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES) || + (cfg->direction == DMA_MEM_TO_DEV && + cfg->dst_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES) || + (cfg->direction != DMA_DEV_TO_MEM && + cfg->direction != DMA_MEM_TO_DEV)) { + return -EINVAL; + } + + c->cfg = *cfg; + + return 0; +} + +static int bcm2835_dma_terminate_all(struct bcm2835_chan *c) +{ + struct bcm2835_dmadev *d = to_bcm2835_dma_dev(c->vc.chan.device); + unsigned long flags; + int timeout = 1000; + LIST_HEAD(head); + + spin_lock_irqsave(&c->vc.lock, flags); + + /* Prevent this channel being scheduled */ + spin_lock(&d->lock); + list_del_init(&c->node); + spin_unlock(&d->lock); + + /* + * Stop DMA activity: we assume the callback will not be called + * after bcm_dma_abort() returns (even if it does, it will see + * c->desc is NULL and exit.) + */ + if (c->desc) { + c->desc = NULL; + bcm2835_dma_abort(c->dma_chan_base); + + /* Wait for stopping */ + while (timeout > 0) { + timeout--; + if(!(readl(c->dma_chan_base + BCM2835_DMA_CS) & + BCM2835_DMA_ACTIVE)) + break; + + cpu_relax(); + } + } + + vchan_get_all_descriptors(&c->vc, &head); + spin_unlock_irqrestore(&c->vc.lock, flags); + vchan_dma_desc_free_list(&c->vc, &head); + + return 0; +} + +static int bcm2835_dma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd, + unsigned long arg) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + int ret; + + switch (cmd) { + case DMA_SLAVE_CONFIG: + return bcm2835_dma_slave_config(c, + (struct dma_slave_config *)arg); + + case DMA_TERMINATE_ALL: + bcm2835_dma_terminate_all(c); + break; + + case DMA_PAUSE: + ret = -EINVAL; + break; + + case DMA_RESUME: + ret = -EINVAL; + break; + + default: + ret = -ENXIO; + break; + } + + return ret; +} + +static int bcm2835_dma_chan_init(struct bcm2835_dmadev *od, int dma_sig) +{ + struct bcm2835_chan *c; + + c = kzalloc(sizeof(*c), GFP_KERNEL); + if (!c) + return -ENOMEM; + + c->dma_sig = dma_sig; + c->vc.desc_free = bcm2835_dma_desc_free; + vchan_init(&c->vc, &od->ddev); + INIT_LIST_HEAD(&c->node); + + od->ddev.chancnt++; + + return 0; +} + +static void bcm2835_dma_free(struct bcm2835_dmadev *od) +{ + while (!list_empty(&od->ddev.channels)) { + struct bcm2835_chan *c = list_first_entry(&od->ddev.channels, + struct bcm2835_chan, vc.chan.device_node); + + list_del(&c->vc.chan.device_node); + tasklet_kill(&c->vc.task); + kfree(c); + } +} + +#if defined(CONFIG_OF) +static const struct of_device_id bcm2835_dma_of_match[] = { + { + .compatible = "brcm,bcm2835-dma", + } +}; +MODULE_DEVICE_TABLE(of, bcm2835_dma_of_match); +#endif + +static struct dma_chan *bcm2835_dma_xlate(struct of_phandle_args *dma_spec, + struct of_dma *ofdma) +{ + struct bcm2835_dmadev *d = ofdma->of_dma_data; + struct dma_chan *chan, *candidate; + +retry: + candidate = NULL; + + /* walk the list of channels registered with the current instance and + * find one that is currently unused */ + list_for_each_entry(chan, &d->ddev.channels, device_node) + if (chan->client_count == 0) { + candidate = chan; + break; + } + + if (!candidate) + return NULL; + + /* dma_get_slave_channel will return NULL if we lost a race between + * the lookup and the reservation */ + chan = dma_get_slave_channel(candidate); + + if (chan) { + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + + /* Set DREQ from param */ + c->dreq = dma_spec->args[0]; + + return chan; + } + + goto retry; +} + +static int bcm2835_dma_probe(struct platform_device *pdev) +{ + struct bcm2835_dmadev *od; + struct resource *dma_res = NULL; + void __iomem *dma_base = NULL; + int rc = 0; + int i; + struct resource *irq; + int irq_resources; + + if (!pdev->dev.dma_mask) + pdev->dev.dma_mask = &pdev->dev.coherent_dma_mask; + + rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); + if (rc) + return rc; + dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); + + od = devm_kzalloc(&pdev->dev, sizeof(*od), GFP_KERNEL); + if (!od) + return -ENOMEM; + + pdev->dev.dma_parms = &od->dma_parms; + dma_set_max_seg_size(&pdev->dev, 0x3FFFFFFF); + + dma_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + dma_base = devm_ioremap_resource(&pdev->dev, dma_res); + if (IS_ERR(dma_base)) + return PTR_ERR(dma_base); + + od->dma_base = dma_base; + + dma_cap_set(DMA_SLAVE, od->ddev.cap_mask); + dma_cap_set(DMA_CYCLIC, od->ddev.cap_mask); + od->ddev.device_alloc_chan_resources = bcm2835_dma_alloc_chan_resources; + od->ddev.device_free_chan_resources = bcm2835_dma_free_chan_resources; + od->ddev.device_tx_status = bcm2835_dma_tx_status; + od->ddev.device_issue_pending = bcm2835_dma_issue_pending; + od->ddev.device_prep_dma_cyclic = bcm2835_dma_prep_dma_cyclic; + od->ddev.device_control = bcm2835_dma_control; + od->ddev.dev = &pdev->dev; + INIT_LIST_HEAD(&od->ddev.channels); + spin_lock_init(&od->lock); + + irq_resources = 0; + + for (i = 0; i < pdev->num_resources; i++) { + if (platform_get_resource(pdev, IORESOURCE_IRQ, i) > 0) + irq_resources++; + } + + od->dma_irq_numbers = devm_kzalloc(&pdev->dev, + irq_resources*sizeof(int), GFP_KERNEL); + if (!od) + return -ENOMEM; + + for (i = 0; i < irq_resources; i++) { + rc = bcm2835_dma_chan_init(od, i); + if (rc) { + bcm2835_dma_free(od); + return rc; + } + + irq = platform_get_resource(pdev, IORESOURCE_IRQ, i); + if (!irq) { + dev_err(&pdev->dev, + "No IRQ resource for channel %i\n", i); + return -ENODEV; + } + od->dma_irq_numbers[i] = irq->start; + } + + rc = dma_async_device_register(&od->ddev); + if (rc) { + dev_err(&pdev->dev, + "Failed to register slave DMA engine device: %d\n", rc); + bcm2835_dma_free(od); + return rc; + } + + platform_set_drvdata(pdev, od); + + if (pdev->dev.of_node) { + const void *chan_mask; + + /* Device-tree DMA controller registration */ + rc = of_dma_controller_register(pdev->dev.of_node, + bcm2835_dma_xlate, od); + if (rc) { + dev_err(&pdev->dev, "Failed to register DMA controller\n"); + dma_async_device_unregister(&od->ddev); + bcm2835_dma_free(od); + return rc; + } + + /* Request DMA channel mask from device tree */ + chan_mask = of_get_property(pdev->dev.of_node, + "dma-channel-mask", NULL); + + if (!chan_mask) { + dev_err(&pdev->dev, "Failed to get channel mask\n"); + dma_async_device_unregister(&od->ddev); + bcm2835_dma_free(od); + return -EINVAL; + } + + od->chans_available = be32_to_cpup(chan_mask); + } + + dev_dbg(&pdev->dev, "Load BCM2835 DMA engine driver\n"); + + return rc; +} + +static int bcm2835_dma_remove(struct platform_device *pdev) +{ + struct bcm2835_dmadev *od = platform_get_drvdata(pdev); + + dma_async_device_unregister(&od->ddev); + bcm2835_dma_free(od); + + return 0; +} + +static struct platform_driver bcm2835_dma_driver = { + .probe = bcm2835_dma_probe, + .remove = bcm2835_dma_remove, + .driver = { + .name = "bcm2835-dma", + .owner = THIS_MODULE, + .of_match_table = of_match_ptr(bcm2835_dma_of_match), + }, +}; + +module_platform_driver(bcm2835_dma_driver); + +MODULE_AUTHOR("Florian Meier"); +MODULE_DESCRIPTION("BCM2835 DMA engine driver"); +MODULE_LICENSE("GPL"); + -- 1.7.9.5

4 3

[alsa-devel] [PATCH v2 1/2] ASoC: dmaengine-pcm: Add support for querying DMA capabilities
by Lars-Peter Clausen 13 Nov '13

13 Nov '13

Currently each platform making use the the generic dmaengine PCM driver still needs to provide a custom snd_pcm_hardware struct which specifies the capabilities of the DMA controller, e.g. the maximum period size that can be supported. This patch adds code which uses the newly introduced dma_get_slave_caps() API to query this information from the dmaengine driver. The new code path will only be taken if the 'pcm_hardware' field of the snd_dmaengine_pcm_config struct is NULL. The patch also introduces a new 'fifo_size' field to the snd_dmaengine_dai_dma_data struct which is used to initialize the snd_pcm_hardware 'fifo_size' field and needs to be set by the DAI driver. Signed-off-by: Lars-Peter Clausen <lars(a)metafoo.de> --- Changes since v1: * Use dma_get_max_seg_size() to get the maximum size of one period * Assume that a DMA engine driver is able to support an infinite number of periods * Increase min_period_bytes from 16 to 256. --- include/sound/dmaengine_pcm.h | 2 ++ sound/soc/soc-generic-dmaengine-pcm.c | 55 ++++++++++++++++++++++++++++------- 2 files changed, 47 insertions(+), 10 deletions(-) diff --git a/include/sound/dmaengine_pcm.h b/include/sound/dmaengine_pcm.h index f11c35c..83b2c3e 100644 --- a/include/sound/dmaengine_pcm.h +++ b/include/sound/dmaengine_pcm.h @@ -61,6 +61,7 @@ struct dma_chan *snd_dmaengine_pcm_get_chan(struct snd_pcm_substream *substream) * @slave_id: Slave requester id for the DMA channel. * @filter_data: Custom DMA channel filter data, this will usually be used when * requesting the DMA channel. + * @fifo_size: FIFO size of the DAI controller in bytes */ struct snd_dmaengine_dai_dma_data { dma_addr_t addr; @@ -68,6 +69,7 @@ struct snd_dmaengine_dai_dma_data { u32 maxburst; unsigned int slave_id; void *filter_data; + unsigned int fifo_size; }; void snd_dmaengine_pcm_set_config_from_dai_data( diff --git a/sound/soc/soc-generic-dmaengine-pcm.c b/sound/soc/soc-generic-dmaengine-pcm.c index e29ec3c..c39e19e 100644 --- a/sound/soc/soc-generic-dmaengine-pcm.c +++ b/sound/soc/soc-generic-dmaengine-pcm.c @@ -36,6 +36,15 @@ static struct dmaengine_pcm *soc_platform_to_pcm(struct snd_soc_platform *p) return container_of(p, struct dmaengine_pcm, platform); } +static struct device *dmaengine_dma_dev(struct dmaengine_pcm *pcm, + struct snd_pcm_substream *substream) +{ + if (!pcm->chan[substream->stream]) + return NULL; + + return pcm->chan[substream->stream]->device->dev; +} + /** * snd_dmaengine_pcm_prepare_slave_config() - Generic prepare_slave_config callback * @substream: PCM substream @@ -92,28 +101,54 @@ static int dmaengine_pcm_hw_params(struct snd_pcm_substream *substream, return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params)); } -static int dmaengine_pcm_open(struct snd_pcm_substream *substream) +static int dmaengine_pcm_set_runtime_hwparams(struct snd_pcm_substream *substream) { struct snd_soc_pcm_runtime *rtd = substream->private_data; struct dmaengine_pcm *pcm = soc_platform_to_pcm(rtd->platform); + struct device *dma_dev = dmaengine_dma_dev(pcm, substream); struct dma_chan *chan = pcm->chan[substream->stream]; + struct snd_dmaengine_dai_dma_data *dma_data; + struct dma_slave_caps dma_caps; + struct snd_pcm_hardware hw; int ret; - ret = snd_soc_set_runtime_hwparams(substream, + if (pcm->config->pcm_hardware) + return snd_soc_set_runtime_hwparams(substream, pcm->config->pcm_hardware); - if (ret) - return ret; - return snd_dmaengine_pcm_open(substream, chan); + dma_data = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream); + + memset(&hw, 0, sizeof(hw)); + hw.info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | + SNDRV_PCM_INFO_INTERLEAVED; + hw.periods_min = 2; + hw.periods_max = UINT_MAX; + hw.period_bytes_min = 256; + hw.period_bytes_max = dma_get_max_seg_size(dma_dev); + hw.buffer_bytes_max = SIZE_MAX; + hw.fifo_size = dma_data->fifo_size; + + ret = dma_get_slave_caps(chan, &dma_caps); + if (ret == 0) { + if (dma_caps.cmd_pause) + hw.info |= SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME; + } + + return snd_soc_set_runtime_hwparams(substream, &hw); } -static struct device *dmaengine_dma_dev(struct dmaengine_pcm *pcm, - struct snd_pcm_substream *substream) +static int dmaengine_pcm_open(struct snd_pcm_substream *substream) { - if (!pcm->chan[substream->stream]) - return NULL; + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct dmaengine_pcm *pcm = soc_platform_to_pcm(rtd->platform); + struct dma_chan *chan = pcm->chan[substream->stream]; + int ret; - return pcm->chan[substream->stream]->device->dev; + ret = dmaengine_pcm_set_runtime_hwparams(substream); + if (ret) + return ret; + + return snd_dmaengine_pcm_open(substream, chan); } static void dmaengine_pcm_free(struct snd_pcm *pcm) -- 1.8.0

3 12

[alsa-devel] [PATCH 1/2] ALSA: hda - Don't turn off EAPD for headphone on Lenovo N100
by Takashi Iwai 13 Nov '13

13 Nov '13

The only EAPD on AD1986A is on NID 0x1b where usually the speaker. But this doesn't control only the speaker amp but may influence on all outputs, e.g. Lenovo N100 laptop seems to have this issue. Cc: <stable(a)vger.kernel.org> Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- sound/pci/hda/patch_analog.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/sound/pci/hda/patch_analog.c b/sound/pci/hda/patch_analog.c index 87d2e0335ae4..ba37116168ac 100644 --- a/sound/pci/hda/patch_analog.c +++ b/sound/pci/hda/patch_analog.c @@ -219,8 +219,12 @@ static int alloc_ad_spec(struct hda_codec *codec) static void ad_fixup_inv_jack_detect(struct hda_codec *codec, const struct hda_fixup *fix, int action) { - if (action == HDA_FIXUP_ACT_PRE_PROBE) + struct ad198x_spec *spec = codec->spec; + + if (action == HDA_FIXUP_ACT_PRE_PROBE) { codec->inv_jack_detect = 1; + spec->gen.keep_eapd_on = 1; + } } enum { -- 1.8.4.2

1 1

[alsa-devel] [patch] ALSA: snd-aoa: two copy and paste bugs
by Dan Carpenter 13 Nov '13

13 Nov '13

These functions were cut and paste and the tests for NULL weren't updated properly. Signed-off-by: Dan Carpenter <dan.carpenter(a)oracle.com> diff --git a/sound/aoa/fabrics/layout.c b/sound/aoa/fabrics/layout.c index 61ab640..9dc5806 100644 --- a/sound/aoa/fabrics/layout.c +++ b/sound/aoa/fabrics/layout.c @@ -644,7 +644,7 @@ static int n##_control_put(struct snd_kcontrol *kcontrol, \ struct snd_ctl_elem_value *ucontrol) \ { \ struct gpio_runtime *gpio = snd_kcontrol_chip(kcontrol); \ - if (gpio->methods && gpio->methods->get_##n) \ + if (gpio->methods && gpio->methods->set_##n) \ gpio->methods->set_##n(gpio, \ !!ucontrol->value.integer.value[0]); \ return 1; \ @@ -1135,7 +1135,7 @@ static int aoa_fabric_layout_resume(struct soundbus_dev *sdev) { struct layout_dev *ldev = dev_get_drvdata(&sdev->ofdev.dev); - if (ldev->gpio.methods && ldev->gpio.methods->all_amps_off) + if (ldev->gpio.methods && ldev->gpio.methods->all_amps_restore) ldev->gpio.methods->all_amps_restore(&ldev->gpio); return 0;

3 2

[alsa-devel] [patch] ALSA: isa: not allocating enough space
by Dan Carpenter 13 Nov '13

13 Nov '13

We allocate only 4 bytes here "sizeof(int)" instead of WF_MSAMPLE_BYTES (259) which was intended. Signed-off-by: Dan Carpenter <dan.carpenter(a)oracle.com> diff --git a/sound/isa/wavefront/wavefront_synth.c b/sound/isa/wavefront/wavefront_synth.c index a2f87f9..e5db001 100644 --- a/sound/isa/wavefront/wavefront_synth.c +++ b/sound/isa/wavefront/wavefront_synth.c @@ -1196,7 +1196,7 @@ wavefront_send_multisample (snd_wavefront_t *dev, wavefront_patch_info *header) int num_samples; unsigned char *msample_hdr; - msample_hdr = kmalloc(sizeof(WF_MSAMPLE_BYTES), GFP_KERNEL); + msample_hdr = kmalloc(WF_MSAMPLE_BYTES, GFP_KERNEL); if (! msample_hdr) return -ENOMEM;

2 1

[alsa-devel] Can HD-A codec Realtek ALC898 support 20/24 bit playback and recording? How to verify this?
by Lin, Mengdong 13 Nov '13

13 Nov '13

Hi, I have a ALC898 codec. Can it support 20bit and 24bit playback or recording? If yes, how can I verify this? The audio input/output nodes show PCM bits [0xe]: 16 20 24 But I get error when using "-D hw" to record or play S24_LE format: $ arecord -D hw:1,0 -r 48000 -f S24_LE -c 2 test.wav Recording WAVE 'test.wav' : Signed 24 bit Little Endian, Rate 48000 Hz, Stereo arecord: set_params:1081: Sample format non available Available formats: - S16_LE - S32_LE $ aplay -t wav -D hw:1,0 test.wav Playing WAVE 'test.wav' : Signed 24 bit Little Endian, Rate 48000 Hz, Stereo aplay: set_params:1081: Sample format non available Available formats: - S16_LE - S32_LE Here is the codec info: Codec: Realtek ALC898 Address: 2 AFG Function Id: 0x1 (unsol 1) Vendor Id: 0x10ec0899 Subsystem Id: 0x80862046 Revision Id: 0x100003 No Modem Function Group found Default PCM: rates [0x5f0]: 32000 44100 48000 88200 96000 192000 bits [0xe]: 16 20 24 formats [0x1]: PCM Default Amp-In caps: N/A Default Amp-Out caps: N/A State of AFG node 0x01: Power states: D0 D1 D2 D3 CLKSTOP EPSS Power: setting=D0, actual=D0 GPIO: io=2, o=0, i=0, unsolicited=1, wake=0 IO[0]: enable=0, dir=0, wake=0, sticky=0, data=0, unsol=0 IO[1]: enable=0, dir=0, wake=0, sticky=0, data=0, unsol=0 Node 0x02 [Audio Output] wcaps 0x411: Stereo Device: name="ALC898 Analog", type="Audio", device=0 Converter: stream=8, channel=0 PCM: rates [0x5e0]: 44100 48000 88200 96000 192000 bits [0xe]: 16 20 24 formats [0x1]: PCM Power states: D0 D1 D2 D3 EPSS Power: setting=D0, actual=D0 Node 0x03 [Audio Output] wcaps 0x411: Stereo Converter: stream=8, channel=0 PCM: rates [0x5e0]: 44100 48000 88200 96000 192000 bits [0xe]: 16 20 24 formats [0x1]: PCM Power states: D0 D1 D2 D3 EPSS Power: setting=D0, actual=D0 Node 0x04 [Audio Output] wcaps 0x411: Stereo Converter: stream=8, channel=0 PCM: rates [0x5e0]: 44100 48000 88200 96000 192000 bits [0xe]: 16 20 24 formats [0x1]: PCM Power states: D0 D1 D2 D3 EPSS Power: setting=D0, actual=D0 Node 0x05 [Audio Output] wcaps 0x411: Stereo Converter: stream=8, channel=0 PCM: rates [0x5e0]: 44100 48000 88200 96000 192000 bits [0xe]: 16 20 24 formats [0x1]: PCM Power states: D0 D1 D2 D3 EPSS Power: setting=D0, actual=D0 Node 0x06 [Audio Output] wcaps 0x611: Stereo Digital Converter: stream=8, channel=0 Digital: Digital category: 0x0 IEC Coding Type: 0x0 PCM: rates [0x5f0]: 32000 44100 48000 88200 96000 192000 bits [0xe]: 16 20 24 formats [0x1]: PCM Power states: D0 D1 D2 D3 EPSS Power: setting=D0, actual=D0 Node 0x07 [Audio Input] wcaps 0x10051b: Stereo Amp-In Control: name="Capture Volume", index=0, device=0 ControlAmp: chs=3, dir=In, idx=0, ofs=0 Control: name="Capture Switch", index=0, device=0 ControlAmp: chs=3, dir=In, idx=0, ofs=0 Device: name="ALC898 Analog", type="Audio", device=0 Amp-In caps: ofs=0x17, nsteps=0x3f, stepsize=0x02, mute=1 Amp-In vals: [0x27 0x27] Converter: stream=4, channel=0 SDI-Select: 0 PCM: rates [0x5e0]: 44100 48000 88200 96000 192000 bits [0xe]: 16 20 24 formats [0x1]: PCM Power states: D0 D1 D2 D3 EPSS Power: setting=D0, actual=D0 Connection: 1 0x24 Node 0x08 [Audio Input] wcaps 0x10051b: Stereo Amp-In Control: name="Capture Volume", index=1, device=0 ControlAmp: chs=3, dir=In, idx=0, ofs=0 Control: name="Capture Switch", index=1, device=0 ControlAmp: chs=3, dir=In, idx=0, ofs=0 Device: name="ALC898 Alt Analog", type="Audio", device=2 Amp-In caps: ofs=0x17, nsteps=0x3f, stepsize=0x02, mute=1 Amp-In vals: [0x80 0x80] Converter: stream=0, channel=0 SDI-Select: 0 PCM: rates [0x5e0]: 44100 48000 88200 96000 192000 bits [0xe]: 16 20 24 formats [0x1]: PCM Power states: D0 D1 D2 D3 EPSS Power: setting=D0, actual=D0 Connection: 1 0x23 Node 0x09 [Audio Input] wcaps 0x10051b: Stereo Amp-In Control: name="Capture Volume", index=2, device=0 ControlAmp: chs=3, dir=In, idx=0, ofs=0 Control: name="Capture Switch", index=2, device=0 ControlAmp: chs=3, dir=In, idx=0, ofs=0 Amp-In caps: ofs=0x17, nsteps=0x3f, stepsize=0x02, mute=1 Amp-In vals: [0x80 0x80] Converter: stream=0, channel=0 SDI-Select: 0 PCM: rates [0x5e0]: 44100 48000 88200 96000 192000 bits [0xe]: 16 20 24 formats [0x1]: PCM Power states: D0 D1 D2 D3 EPSS Power: setting=D0, actual=D0 Connection: 1 0x22 Node 0x0a [Audio Input] wcaps 0x100791: Stereo Digital Converter: stream=0, channel=0 SDI-Select: 0 Digital: Digital category: 0x0 IEC Coding Type: 0x0 PCM: rates [0x570]: 32000 44100 48000 96000 192000 bits [0xe]: 16 20 24 formats [0x1]: PCM Unsolicited: tag=00, enabled=0 Power states: D0 D1 D2 D3 EPSS Power: setting=D0, actual=D0 Connection: 1 0x1f Node 0x0b [Audio Mixer] wcaps 0x20010b: Stereo Amp-In Control: name="Front Mic Playback Volume", index=0, device=0 ControlAmp: chs=3, dir=In, idx=1, ofs=0 Control: name="Front Mic Playback Switch", index=0, device=0 ControlAmp: chs=3, dir=In, idx=1, ofs=0 Control: name="Rear Mic Playback Volume", index=0, device=0 ControlAmp: chs=3, dir=In, idx=0, ofs=0 Control: name="Rear Mic Playback Switch", index=0, device=0 ControlAmp: chs=3, dir=In, idx=0, ofs=0 Control: name="Line Playback Volume", index=0, device=0 ControlAmp: chs=3, dir=In, idx=2, ofs=0 Control: name="Line Playback Switch", index=0, device=0 ControlAmp: chs=3, dir=In, idx=2, ofs=0 Control: name="Beep Playback Volume", index=0, device=0 ControlAmp: chs=3, dir=In, idx=5, ofs=0 Control: name="Beep Playback Switch", index=0, device=0 ControlAmp: chs=3, dir=In, idx=5, ofs=0 Amp-In caps: ofs=0x17, nsteps=0x1f, stepsize=0x05, mute=1 Amp-In vals: [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x80 0x80] Connection: 10 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x14 0x15 0x16 0x17 Node 0x0c [Audio Mixer] wcaps 0x20010f: Stereo Amp-In Amp-Out Control: name="Front Playback Volume", index=0, device=0 ControlAmp: chs=3, dir=Out, idx=0, ofs=0 Amp-In caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1 Amp-In vals: [0x00 0x00] [0x00 0x00] Amp-Out caps: ofs=0x57, nsteps=0x57, stepsize=0x02, mute=0 Amp-Out vals: [0x3b 0x3b] Connection: 2 0x02 0x0b Node 0x0d [Audio Mixer] wcaps 0x20010f: Stereo Amp-In Amp-Out Control: name="Surround Playback Volume", index=0, device=0 ControlAmp: chs=3, dir=Out, idx=0, ofs=0 Amp-In caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1 Amp-In vals: [0x00 0x00] [0x00 0x00] Amp-Out caps: ofs=0x57, nsteps=0x57, stepsize=0x02, mute=0 Amp-Out vals: [0x00 0x00] Connection: 2 0x03 0x0b Node 0x0e [Audio Mixer] wcaps 0x20010f: Stereo Amp-In Amp-Out Control: name="Center Playback Volume", index=0, device=0 ControlAmp: chs=1, dir=Out, idx=0, ofs=0 Control: name="LFE Playback Volume", index=0, device=0 ControlAmp: chs=2, dir=Out, idx=0, ofs=0 Amp-In caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1 Amp-In vals: [0x00 0x00] [0x00 0x00] Amp-Out caps: ofs=0x57, nsteps=0x57, stepsize=0x02, mute=0 Amp-Out vals: [0x00 0x00] Connection: 2 0x04 0x0b Node 0x0f [Audio Mixer] wcaps 0x20010f: Stereo Amp-In Amp-Out Control: name="Headphone Playback Volume", index=0, device=0 ControlAmp: chs=3, dir=Out, idx=0, ofs=0 Amp-In caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1 Amp-In vals: [0x00 0x00] [0x00 0x00] Amp-Out caps: ofs=0x57, nsteps=0x57, stepsize=0x02, mute=0 Amp-Out vals: [0x3b 0x3b] Connection: 2 0x05 0x0b Node 0x10 [Audio Output] wcaps 0x611: Stereo Digital Control: name="IEC958 Playback Con Mask", index=0, device=0 Control: name="IEC958 Playback Pro Mask", index=0, device=0 Control: name="IEC958 Playback Default", index=0, device=0 Control: name="IEC958 Playback Switch", index=0, device=0 Control: name="IEC958 Default PCM Playback Switch", index=0, device=0 Device: name="ALC898 Digital", type="SPDIF", device=1 Converter: stream=8, channel=0 Digital: Digital category: 0x0 IEC Coding Type: 0x0 PCM: rates [0x5f0]: 32000 44100 48000 88200 96000 192000 bits [0xe]: 16 20 24 formats [0x1]: PCM Power states: D0 D1 D2 D3 EPSS Power: setting=D0, actual=D0 Node 0x11 [Pin Complex] wcaps 0x400701: Stereo Digital Control: name="SPDIF Phantom Jack", index=0, device=0 Pincap 0x00000010: OUT Pin Default 0x01451120: [Jack] SPDIF Out at Ext Rear Conn = Optical, Color = Black DefAssociation = 0x2, Sequence = 0x0 Misc = NO_PRESENCE Pin-ctls: 0x40: OUT Power states: D0 D1 D2 D3 EPSS Power: setting=D0, actual=D0 Connection: 1 0x10 Node 0x12 [Pin Complex] wcaps 0x400401: Stereo Pincap 0x00000020: IN Pin Default 0x411111f0: [N/A] Speaker at Ext Rear Conn = 1/8, Color = Black DefAssociation = 0xf, Sequence = 0x0 Misc = NO_PRESENCE Pin-ctls: 0x00: Power states: D0 D1 D2 D3 EPSS Power: setting=D0, actual=D0 Node 0x13 [Vendor Defined Widget] wcaps 0xf00000: Mono Node 0x14 [Pin Complex] wcaps 0x40058d: Stereo Amp-Out Control: name="Front Playback Switch", index=0, device=0 ControlAmp: chs=3, dir=Out, idx=0, ofs=0 Control: name="Line Out Front Jack", index=0, device=0 Amp-Out caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1 Amp-Out vals: [0x00 0x00] Pincap 0x0001003c: IN OUT HP EAPD Detect EAPD 0x2: EAPD Pin Default 0x01014410: [Jack] Line Out at Ext Rear Conn = 1/8, Color = Green DefAssociation = 0x1, Sequence = 0x0 Pin-ctls: 0x00: Unsolicited: tag=05, enabled=1 Power states: D0 D1 D2 D3 EPSS Power: setting=D0, actual=D0 Connection: 5 0x0c* 0x0d 0x0e 0x0f 0x26 Node 0x15 [Pin Complex] wcaps 0x40058d: Stereo Amp-Out Control: name="Surround Playback Switch", index=0, device=0 ControlAmp: chs=3, dir=Out, idx=0, ofs=0 Control: name="Line Out Surround Jack", index=0, device=0 Amp-Out caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1 Amp-Out vals: [0x80 0x80] Pincap 0x0000003c: IN OUT HP Detect Pin Default 0x01011412: [Jack] Line Out at Ext Rear Conn = 1/8, Color = Black DefAssociation = 0x1, Sequence = 0x2 Pin-ctls: 0x00: Unsolicited: tag=06, enabled=1 Power states: D0 D1 D2 D3 EPSS Power: setting=D0, actual=D0 Connection: 5 0x0c 0x0d* 0x0e 0x0f 0x26 Node 0x16 [Pin Complex] wcaps 0x40058d: Stereo Amp-Out Control: name="Center Playback Switch", index=0, device=0 ControlAmp: chs=1, dir=Out, idx=0, ofs=0 Control: name="LFE Playback Switch", index=0, device=0 ControlAmp: chs=2, dir=Out, idx=0, ofs=0 Control: name="Line Out CLFE Jack", index=0, device=0 Amp-Out caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1 Amp-Out vals: [0x80 0x80] Pincap 0x0000003c: IN OUT HP Detect Pin Default 0x01016411: [Jack] Line Out at Ext Rear Conn = 1/8, Color = Orange DefAssociation = 0x1, Sequence = 0x1 Pin-ctls: 0x00: Unsolicited: tag=07, enabled=1 Power states: D0 D1 D2 D3 EPSS Power: setting=D0, actual=D0 Connection: 5 0x0c 0x0d 0x0e* 0x0f 0x26 Node 0x17 [Pin Complex] wcaps 0x40058d: Stereo Amp-Out Amp-Out caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1 Amp-Out vals: [0x80 0x80] Pincap 0x0000003c: IN OUT HP Detect Pin Default 0x411111f0: [N/A] Speaker at Ext Rear Conn = 1/8, Color = Black DefAssociation = 0xf, Sequence = 0x0 Misc = NO_PRESENCE Pin-ctls: 0x20: IN Unsolicited: tag=00, enabled=0 Power states: D0 D1 D2 D3 EPSS Power: setting=D0, actual=D0 Connection: 5 0x0c 0x0d 0x0e 0x0f* 0x26 Node 0x18 [Pin Complex] wcaps 0x40058f: Stereo Amp-In Amp-Out Control: name="Rear Mic Boost Volume", index=0, device=0 ControlAmp: chs=3, dir=In, idx=0, ofs=0 Control: name="Rear Mic Jack", index=0, device=0 Amp-In caps: ofs=0x00, nsteps=0x03, stepsize=0x27, mute=0 Amp-In vals: [0x00 0x00] Amp-Out caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1 Amp-Out vals: [0x80 0x80] Pincap 0x0000373c: IN OUT HP Detect Vref caps: HIZ 50 GRD 80 100 Pin Default 0x01a19c40: [Jack] Mic at Ext Rear Conn = 1/8, Color = Pink DefAssociation = 0x4, Sequence = 0x0 Pin-ctls: 0x21: IN VREF_50 Unsolicited: tag=03, enabled=1 Power states: D0 D1 D2 D3 EPSS Power: setting=D0, actual=D0 Connection: 5 0x0c* 0x0d 0x0e 0x0f 0x26 Node 0x19 [Pin Complex] wcaps 0x40058f: Stereo Amp-In Amp-Out Control: name="Front Mic Boost Volume", index=0, device=0 ControlAmp: chs=3, dir=In, idx=0, ofs=0 Control: name="Front Mic Jack", index=0, device=0 Amp-In caps: ofs=0x00, nsteps=0x03, stepsize=0x27, mute=0 Amp-In vals: [0x00 0x00] Amp-Out caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1 Amp-Out vals: [0x80 0x80] Pincap 0x0000373c: IN OUT HP Detect Vref caps: HIZ 50 GRD 80 100 Pin Default 0x02a19c41: [Jack] Mic at Ext Front Conn = 1/8, Color = Pink DefAssociation = 0x4, Sequence = 0x1 Pin-ctls: 0x24: IN VREF_80 Unsolicited: tag=02, enabled=1 Power states: D0 D1 D2 D3 EPSS Power: setting=D0, actual=D0 Connection: 5 0x0c* 0x0d 0x0e 0x0f 0x26 Node 0x1a [Pin Complex] wcaps 0x40058f: Stereo Amp-In Amp-Out Control: name="Line Boost Volume", index=0, device=0 ControlAmp: chs=3, dir=In, idx=0, ofs=0 Control: name="Line Jack", index=0, device=0 Amp-In caps: ofs=0x00, nsteps=0x03, stepsize=0x27, mute=0 Amp-In vals: [0x00 0x00] Amp-Out caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1 Amp-Out vals: [0x80 0x80] Pincap 0x0000373c: IN OUT HP Detect Vref caps: HIZ 50 GRD 80 100 Pin Default 0x0181344f: [Jack] Line In at Ext Rear Conn = 1/8, Color = Blue DefAssociation = 0x4, Sequence = 0xf Pin-ctls: 0x20: IN VREF_HIZ Unsolicited: tag=04, enabled=1 Power states: D0 D1 D2 D3 EPSS Power: setting=D0, actual=D0 Connection: 5 0x0c* 0x0d 0x0e 0x0f 0x26 Node 0x1b [Pin Complex] wcaps 0x40058f: Stereo Amp-In Amp-Out Control: name="Headphone Playback Switch", index=0, device=0 ControlAmp: chs=3, dir=Out, idx=0, ofs=0 Control: name="Front Headphone Jack", index=0, device=0 Amp-In caps: ofs=0x00, nsteps=0x03, stepsize=0x27, mute=0 Amp-In vals: [0x00 0x00] Amp-Out caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1 Amp-Out vals: [0x00 0x00] Pincap 0x0001373c: IN OUT HP EAPD Detect Vref caps: HIZ 50 GRD 80 100 EAPD 0x2: EAPD Pin Default 0x02214450: [Jack] HP Out at Ext Front Conn = 1/8, Color = Green DefAssociation = 0x5, Sequence = 0x0 Pin-ctls: 0xc0: OUT HP VREF_HIZ Unsolicited: tag=01, enabled=1 Power states: D0 D1 D2 D3 EPSS Power: setting=D0, actual=D0 Connection: 5 0x0c 0x0d 0x0e 0x0f* 0x26 Node 0x1c [Pin Complex] wcaps 0x400481: Stereo Pincap 0x00000024: IN Detect Pin Default 0x411111f0: [N/A] Speaker at Ext Rear Conn = 1/8, Color = Black DefAssociation = 0xf, Sequence = 0x0 Misc = NO_PRESENCE Pin-ctls: 0x20: IN Unsolicited: tag=00, enabled=0 Power states: D0 D1 D2 D3 EPSS Power: setting=D0, actual=D0 Node 0x1d [Pin Complex] wcaps 0x400400: Mono Pincap 0x00000020: IN Pin Default 0x4016f601: [N/A] Speaker at Ext N/A Conn = Digital, Color = Other DefAssociation = 0x0, Sequence = 0x1 Pin-ctls: 0x20: IN Power states: D0 D1 D2 D3 EPSS Power: setting=D0, actual=D0 Node 0x1e [Pin Complex] wcaps 0x400701: Stereo Digital Control: name="SPDIF Phantom Jack", index=1, device=0 Pincap 0x00000010: OUT Pin Default 0x90460130: [Fixed] SPDIF Out at Int N/A Conn = Digital, Color = Unknown DefAssociation = 0x3, Sequence = 0x0 Misc = NO_PRESENCE Pin-ctls: 0x40: OUT Power states: D0 D1 D2 D3 EPSS Power: setting=D0, actual=D0 Connection: 1 0x06 Node 0x1f [Pin Complex] wcaps 0x400681: Stereo Digital Pincap 0x00000020: IN Pin Default 0x411111f0: [N/A] Speaker at Ext Rear Conn = 1/8, Color = Black DefAssociation = 0xf, Sequence = 0x0 Misc = NO_PRESENCE Pin-ctls: 0x20: IN Unsolicited: tag=00, enabled=0 Power states: D0 D1 D2 D3 EPSS Power: setting=D0, actual=D0 Node 0x20 [Vendor Defined Widget] wcaps 0xf00040: Mono Processing caps: benign=0, ncoeff=28 Node 0x21 [Vendor Defined Widget] wcaps 0xf00000: Mono Node 0x22 [Audio Mixer] wcaps 0x20010b: Stereo Amp-In Amp-In caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1 Amp-In vals: [0x80 0x80] [0x00 0x00] [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x80 0x80] Connection: 11 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x14 0x15 0x16 0x17 0x0b Node 0x23 [Audio Mixer] wcaps 0x20010b: Stereo Amp-In Amp-In caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1 Amp-In vals: [0x80 0x80] [0x00 0x00] [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x80 0x80] Connection: 11 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x14 0x15 0x16 0x17 0x0b Node 0x24 [Audio Selector] wcaps 0x300101: Stereo Connection: 12 0x18 0x19* 0x1a 0x1b 0x1c 0x1d 0x14 0x15 0x16 0x17 0x0b 0x12 Node 0x25 [Audio Output] wcaps 0x411: Stereo Converter: stream=0, channel=0 PCM: rates [0x5e0]: 44100 48000 88200 96000 192000 bits [0xe]: 16 20 24 formats [0x1]: PCM Power states: D0 D1 D2 D3 EPSS Power: setting=D0, actual=D0 Node 0x26 [Audio Mixer] wcaps 0x20010f: Stereo Amp-In Amp-Out Amp-In caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1 Amp-In vals: [0x00 0x00] [0x80 0x80] Amp-Out caps: ofs=0x57, nsteps=0x57, stepsize=0x02, mute=0 Amp-Out vals: [0x57 0x57] Connection: 2 0x25 0x0b Regards Mengdong

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[alsa-devel] [PATCH] ALSA: pcm: retrieve true appl_ptr where stream was unlocked
by Oskar Schirmer 12 Nov '13

12 Nov '13

Calculated for data transfer, the local variable appl_ptr is reused, changed and written back later, though the lock was not held during the transfer earlier. Admitted, destiny of the lock is not obvious at all, but this looks much like a race condition candidate, so make sure to have some original appl_ptr value to work on. Two occurences. Signed-off-by: Oskar Schirmer <oskar(a)scara.com> --- sound/core/pcm_lib.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sound/core/pcm_lib.c b/sound/core/pcm_lib.c index 6e03b46..47e836a 100644 --- a/sound/core/pcm_lib.c +++ b/sound/core/pcm_lib.c @@ -2051,6 +2051,7 @@ static snd_pcm_sframes_t snd_pcm_lib_write1(struct snd_pcm_substream *substream, default: break; } + appl_ptr = runtime->control->appl_ptr; appl_ptr += frames; if (appl_ptr >= runtime->boundary) appl_ptr -= runtime->boundary; @@ -2283,6 +2284,7 @@ static snd_pcm_sframes_t snd_pcm_lib_read1(struct snd_pcm_substream *substream, default: break; } + appl_ptr = runtime->control->appl_ptr; appl_ptr += frames; if (appl_ptr >= runtime->boundary) appl_ptr -= runtime->boundary; -- 1.7.9.5

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[alsa-devel] Please backport "ALSA: hda - Move one-time init codes from generic_hdmi_init" to 3.4/3.5
by David Henningsson 12 Nov '13

12 Nov '13

Hi, This is a real oldie, but better late than never. A while back, I discovered that this patch would help against a kernel panic when "cat /proc/asound/card0/codec0" was executed on this machine, which was running an fglrx driver. I asked for a stable backport, but Takashi wanted testing to make sure this was actually fixed by the patch [1]. And now, several months later, I have this confirmation [2]. The test was conducted on an 3.5 Ubuntu kernel, based on the 3.5 extended stable tree, but would apply equally well to 3.4. I'm attaching the backported patch - it applied cleanly, I've just added an extra section with an explanation. -- David Henningsson, Canonical Ltd. https://launchpad.net/~diwic [1] http://mailman.alsa-project.org/pipermail/alsa-devel/2013-March/060132.html [2] https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1212160/comments/4

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[alsa-devel] [PATCH] ASoC: fsl: set correct platform drvdata in pcm030_fabric_probe()
by Wei Yongjun 12 Nov '13

12 Nov '13

From: Wei Yongjun <yongjun_wei(a)trendmicro.com.cn> platform_set_drvdata(op, pdata) in pcm030_fabric_probe() will be overwrited when calling snd_soc_register_card(card), but cm030_fabric_remove() use drvdata as a type of struct pcm030_audio_data, so we should move platform_set_drvdata() below snd_soc_register_card() call. Signed-off-by: Wei Yongjun <yongjun_wei(a)trendmicro.com.cn> --- sound/soc/fsl/pcm030-audio-fabric.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/sound/soc/fsl/pcm030-audio-fabric.c b/sound/soc/fsl/pcm030-audio-fabric.c index eb43738..3665f61 100644 --- a/sound/soc/fsl/pcm030-audio-fabric.c +++ b/sound/soc/fsl/pcm030-audio-fabric.c @@ -69,7 +69,6 @@ static int pcm030_fabric_probe(struct platform_device *op) return -ENOMEM; card->dev = &op->dev; - platform_set_drvdata(op, pdata); pdata->card = card; @@ -98,6 +97,8 @@ static int pcm030_fabric_probe(struct platform_device *op) if (ret) dev_err(&op->dev, "snd_soc_register_card() failed: %d\n", ret); + platform_set_drvdata(op, pdata); + return ret; }

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[alsa-devel] [PATCH] ASoC: wm8997: Correct typo in ISRC mux routes
by Charles Keepax 12 Nov '13

12 Nov '13

Signed-off-by: Charles Keepax <ckeepax(a)opensource.wolfsonmicro.com> --- sound/soc/codecs/wm8997.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/sound/soc/codecs/wm8997.c b/sound/soc/codecs/wm8997.c index 6ec3de3..2e886ca 100644 --- a/sound/soc/codecs/wm8997.c +++ b/sound/soc/codecs/wm8997.c @@ -887,7 +887,7 @@ static const struct snd_soc_dapm_route wm8997_dapm_routes[] = { ARIZONA_MIXER_ROUTES("Mic Mute Mixer", "Mic"), ARIZONA_MUX_ROUTES("ISRC1INT1", "ISRC1INT1"), - ARIZONA_MUX_ROUTES("ISRC1INT2", "ISRC2INT2"), + ARIZONA_MUX_ROUTES("ISRC1INT2", "ISRC1INT2"), ARIZONA_MUX_ROUTES("ISRC1DEC1", "ISRC1DEC1"), ARIZONA_MUX_ROUTES("ISRC1DEC2", "ISRC1DEC2"), -- 1.7.2.5

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Re: [alsa-devel] ASoC: add Renesas R-Car module feature
by Dan Carpenter 12 Nov '13

12 Nov '13

Hello Kuninori Morimoto, This is a semi-automatic email about new static checker warnings. The patch cdaa3cdfb4a7: "ASoC: add Renesas R-Car module feature" from Jul 21, 2013, leads to the following Smatch complaint: sound/soc/sh/rcar/core.c:294 rsnd_dai_connect() warn: variable dereferenced before check 'mod' (see line 291) sound/soc/sh/rcar/core.c 290 { 291 struct rsnd_priv *priv = rsnd_mod_to_priv(mod); ^^^^^^^^^^^^^^^^^^^^^ Dereference. 292 struct device *dev = rsnd_priv_to_dev(priv); 293 294 if (!mod) { ^^^^ Check. 295 dev_err(dev, "NULL mod\n"); 296 return -EIO; regards, dan carpenter

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[alsa-devel] [RFC] ASoC: fsl-ssi: Missing DMA-Request workaround
by Markus Pargmann 12 Nov '13

12 Nov '13

There is a hardware issue when using capture and playback at the same time. In the tested scenario, the capture stream was started slightly before the playback stream. The first time the application starts after a powerup, there is a high probability that the SSI unit does not send a request to the SDMA unit. The playback does not work. I tested this on i.MX53 with SSI unit 2 kernel 3.10.10. Here is a register dump of the situation: SDMA 0x63fb0000 00000000: c0040000 00000000 0000001e 00000000 00000010: 00000001 ffffffff 00000000 e03efa41 00000020: 00000000 00000000 00000000 00000000 00000030: 00000064 00000000 00000003 00000000 00000040: 00000000 00000000 00000000 00006000 00000050: 00000000 00000000 00000001 00004050 00000060: 01208000 00000000 00000000 00000000 /* 0x60: EVT_MIRROR showing all received DMA requests */ ^ This should be a 3 instead. Bits 24 and 25 are the DMA requests for RX and TX. Bit 25 is not set, DMA request 25 is missing. SSI 0x50014000 00000000: 00000000 00000000 0000005f 00000000 00000010: 00000457 000050c1 01f80f00 0000028d /* 0x14: ISR Interrupt status register */ ^ At 0x14 we can clearly see the last bit is set (0x1) which is TFE0, Transmit FIFO 0 empty. So it should automatically request data from the DMA engine, but it doesn't. 00000020: 0000028d 0004e000 00040000 000010dd 00000030: 00001f1f 00000000 00000000 00000000 00000040: 00000000 00000000 00000000 00000000 00000050: 00000000 00000000 ........ STATS (/sys/bus/platform/devices/50014000.ssi/statistics) rfrc=0 tfrc=0 roe1=0 roe0=0 tue1=0 tue0=1094475 I could solve this issue by filling the transmit FIFO with data. After that, the SDMA unit receives DMA request 25 again and audio playback works. This patch adds TUE0 interrupt handler which fills FIFO0 with arbitrary data. Signed-off-by: Markus Pargmann <mpa(a)pengutronix.de> --- Hi, does anyone have an idea why the SSI unit does not request DMA by its own at the beginning? Or is it a hardware errata that is not listed yet? Regards, Markus Pargmann sound/soc/fsl/fsl_ssi.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c index 6b81d0c..8faf2b5 100644 --- a/sound/soc/fsl/fsl_ssi.c +++ b/sound/soc/fsl/fsl_ssi.c @@ -269,9 +269,14 @@ static irqreturn_t fsl_ssi_isr(int irq, void *dev_id) } if (sisr & CCSR_SSI_SISR_TUE0) { + int i; + ssi_private->stats.tue0++; sisr2 |= CCSR_SSI_SISR_TUE0; ret = IRQ_HANDLED; + + for (i = 0; i != ssi_private->fifo_depth; ++i) + write_ssi(0x0, &ssi->stx0); } if (sisr & CCSR_SSI_SISR_TFS) { -- 1.8.4.2

4 6

[alsa-devel] [PATCH] ALSA: hda - Fix Line Out automute on Realtek multifunction jacks
by David Henningsson 12 Nov '13

12 Nov '13

In case there is both a multifunction headset jack and a Line Out jack, automuting was not working properly from the Line Out jack. This patch fixes that issue. Cc: stable(a)vger.kernel.org (3.10+) BugLink: https://bugs.launchpad.net/bugs/1250377 Tested-by: Cyrus Lien <cyrus.lien(a)canonical.com> Signed-off-by: David Henningsson <david.henningsson(a)canonical.com> --- sound/pci/hda/patch_realtek.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index 24d924d..04d1e6b 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -3344,8 +3344,10 @@ static void alc_update_headset_mode(struct hda_codec *codec) else new_headset_mode = ALC_HEADSET_MODE_HEADPHONE; - if (new_headset_mode == spec->current_headset_mode) + if (new_headset_mode == spec->current_headset_mode) { + snd_hda_gen_update_outputs(codec); return; + } switch (new_headset_mode) { case ALC_HEADSET_MODE_UNPLUGGED: -- 1.7.9.5

2 1

[alsa-devel] [PATCH] ALSA: hda - Check keep_eapd_on before inv_eapd
by Takashi Iwai 12 Nov '13

12 Nov '13

We don't change the EAPD bit in set_pin_eapd() if keep_eapd_on flag is set by the codec driver and enable is false. But, we also apply the flipping of enable value according to inv_eapd flag in the same function, and this confused the former check, handled as if it's turned ON. The inverted EAPD check must be applied after keep_eapd_on check, instead. Cc: <stable(a)vger.kernel.org> Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- sound/pci/hda/hda_generic.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/pci/hda/hda_generic.c b/sound/pci/hda/hda_generic.c index 276f6e759bac..3067ed4fe3b2 100644 --- a/sound/pci/hda/hda_generic.c +++ b/sound/pci/hda/hda_generic.c @@ -796,10 +796,10 @@ static void set_pin_eapd(struct hda_codec *codec, hda_nid_t pin, bool enable) if (spec->own_eapd_ctl || !(snd_hda_query_pin_caps(codec, pin) & AC_PINCAP_EAPD)) return; - if (codec->inv_eapd) - enable = !enable; if (spec->keep_eapd_on && !enable) return; + if (codec->inv_eapd) + enable = !enable; snd_hda_codec_update_cache(codec, pin, 0, AC_VERB_SET_EAPD_BTLENABLE, enable ? 0x02 : 0x00); -- 1.8.4.2

1 0

Re: [alsa-devel] How to apply rate conversion in asound.conf
by Dolevo Jay 12 Nov '13

12 Nov '13

> Date: Wed, 6 Nov 2013 17:30:25 +0100 > From: clemens(a)ladisch.de > To: cmst(a)live.com; alsa-devel(a)alsa-project.org > Subject: Re: [alsa-devel] How to apply rate conversion in asound.conf > > Dolevo Jay wrote: > > pcm.!default { > > type plug > > slave.pcm multi > > } > > > > pcm.multi { > > slaves.a.pcm "hw:0,1"; > > slaves.b.pcm "hw:1,1"; > > ... > > > > My purpose is to apply rate conversion to the "hw:1,1" and have 44100 rate > > out. > > All slaves must use the same rate. > > The easiest way is apply this to the plug plugin: > > pcm.!default { > type plug > slave { > pcm multi > rate 44100 > } > } > > > Regards, > Clemens > _______________________________________________ > Alsa-devel mailing list > Alsa-devel(a)alsa-project.org > http://mailman.alsa-project.org/mailman/listinfo/alsa-devel Hi, What you suggested worked perfect but I implemented the rate conversion in my software for some specific reasons. What I need to do now is to have a aosund.conf which has dmix into multi plugins together. So, here is my multi configuration: -------------------------------- pcm.!default { type plug slave.pcm multi } pcm.multi { type multi; slaves.a.pcm "hw:0,1"; slaves.a.channels 2; slaves.b.pcm "hw:1,1"; slaves.b.channels 2; bindings.0.slave a; bindings.0.channel 0; bindings.1.slave a; bindings.1.channel 1; bindings.2.slave b; bindings.2.channel 0; bindings.3.slave b; bindings.3.channel 1; } -------------------------------- The following dmix runs ok for 1,1 hardware: -------------------------------- pcm.dmixer { type dmix ipc_key 2048 slave { pcm "hw:1,1" } bindings { 0 0 1 1 } } pcm.!default { type plug slave.pcm dmixer } -------------------------------- Could you please tell me how I can implement the second configuration with dmixer into the first one which has multi. So, basically how can I call a plugin inside of another plugin? Thanks a lot.

2 2

[alsa-devel] [snd_msnd_init] WARNING: CPU: 0 PID: 1 at fs/sysfs/dir.c:486 sysfs_warn_dup+0x7d/0xa0()
by Fengguang Wu 12 Nov '13

12 Nov '13

Greetings, I got this warning when booting a kernel with the attached kconfig. [ 5.073253] kobject: 'msnd-pinnacle.7' (cec33408): kobject_release, parent (null) (delayed) [ 5.074347] kobject: 'msnd-pinnacle' (cecd4980): kobject_release, parent cf3ad9b0 (delayed) [ 5.075576] ------------[ cut here ]------------ [ 5.076200] WARNING: CPU: 0 PID: 1 at fs/sysfs/dir.c:486 sysfs_warn_dup+0x7d/0xa0() [ 5.077434] sysfs: cannot create duplicate filename '/bus/isa/drivers/msnd-pinnacle' [ 5.078422] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.12.0-wl-05537-gf1c1073 #242 [ 5.079529] Hardware name: Bochs Bochs, BIOS Bochs 01/01/2011 [ 5.080418] 00000000 00000000 cb857d74 c17a4989 cb857db4 cb857da4 c10944ba c1a23264 [ 5.081680] cb857dd0 00000001 c1a231f8 000001e6 c11c051d c11c051d c0025000 000001e6 [ 5.083104] c0025000 cb857dbc c109452e 00000009 cb857db4 c1a23264 cb857dd0 cb857de0 [ 5.084361] Call Trace: [ 5.084745] [<c17a4989>] dump_stack+0x4b/0x98 [ 5.085463] [<c10944ba>] warn_slowpath_common+0x7a/0xa0 [ 5.086182] [<c11c051d>] ? sysfs_warn_dup+0x7d/0xa0 [ 5.086785] [<c11c051d>] ? sysfs_warn_dup+0x7d/0xa0 [ 5.087397] [<c109452e>] warn_slowpath_fmt+0x2e/0x30 [ 5.087980] [<c11c051d>] sysfs_warn_dup+0x7d/0xa0 [ 5.088621] [<c11c0569>] sysfs_add_one+0x29/0x40 [ 5.089230] [<c11c0648>] create_dir+0x58/0xa0 [ 5.089797] [<c11c0a1d>] sysfs_create_dir_ns+0xfd/0x120 [ 5.090709] [<c12343c2>] kobject_add_internal+0xc2/0x240 [ 5.091505] [<c1179fbb>] ? kfree+0x7b/0x210 [ 5.092211] [<c1233fc2>] ? kobject_set_name_vargs+0x42/0x60 [ 5.092978] [<c123458d>] kobject_init_and_add+0x4d/0x60 [ 5.093706] [<c13e108a>] bus_add_driver+0x7a/0x200 [ 5.094351] [<c1c1c729>] ? snd_msnd_init+0x49/0x49 [ 5.095085] [<c13ebbb0>] ? isa_bus_remove+0x30/0x30 [ 5.095817] [<c1c1c729>] ? snd_msnd_init+0x49/0x49 [ 5.096521] [<c13e285f>] driver_register+0xaf/0xf0 [ 5.097136] [<c10c4492>] ? preempt_count_sub+0xf2/0x150 [ 5.097795] [<c13ebca6>] isa_register_driver+0x26/0x160 [ 5.098534] [<c1c1c6e0>] ? alsa_card_gusextreme_init+0x14/0x14 [ 5.099423] [<c17b3f20>] ? _raw_spin_unlock+0x50/0x60 [ 5.100093] [<c1c1c729>] ? snd_msnd_init+0x49/0x49 [ 5.100715] [<c1c1c73b>] snd_msnd_init+0x12/0x49 [ 5.101336] [<c1bd3bb3>] do_one_initcall+0x90/0x155 [ 5.102207] [<c10d00e0>] ? put_prev_task_fair+0x130/0x490 [ 5.102891] [<c123ecfd>] ? strlen+0xd/0x20 [ 5.103490] [<c1bd3500>] ? do_early_param+0x5e/0x7a [ 5.104164] [<c10b4a6c>] ? parse_args+0x1ec/0x330 [ 5.104746] [<c17b3fa8>] ? _raw_spin_unlock_irqrestore+0x78/0x90 [ 5.105526] [<c1bd3e18>] kernel_init_freeable+0x1a0/0x23f [ 5.106240] [<c1bd351c>] ? do_early_param+0x7a/0x7a [ 5.106961] [<c179bbcb>] kernel_init+0xb/0x150 [ 5.107566] [<c17b5937>] ret_from_kernel_thread+0x1b/0x28 [ 5.108356] [<c179bbc0>] ? rest_init+0xc0/0xc0 [ 5.109054] ---[ end trace f2f06bffaee363dd ]--- [ 5.109705] ------------[ cut here ]------------ Thanks, Fengguang

2 3

[alsa-devel] [PATCHv1 0/8] ALSA: Add SAI driver and enable SGT15000 codec.
by Xiubo Li 12 Nov '13

12 Nov '13

This patch series is mostly Freescale's SAI SoC Digital Audio Interface driver implementation. And the implementation is only compatible with device tree definition. This patch series is based on linux-next and has been tested on Vybrid VF610 Tower board using device tree. Added in v1: - Add SAI SoC Digital Audio Interface driver. - Add Freescale SAI ALSA SoC Digital Audio Interface node for VF610. - Enables SAI ALSA SoC DAI device for Vybrid VF610 TOWER board. - Add device tree bindings for Freescale SAI. - Revise the bugs about the sgt15000 codec. - Add SGT15000 based audio machine driver. - Enable SGT15000 codec based audio driver node for VF610. - Add device tree bindings for Freescale VF610 sound.

10 46

[alsa-devel] [COMPRESS] [PATCH] ALSA: compress_core: don't return -EBADFD from poll if paused
by Richard Fitzgerald 12 Nov '13

12 Nov '13

Pausing audio playback is not an illegal state so it doesn't seem sensible for poll() to return -EBADFD on a paused stream. There's also no reason to assume that we can't write more data to the DSP while playback is paused. Remove the -EBADFD so that a stream in paused state will still report the buffer availability from poll(). It is up to the user process to manage its state so that it knows whether it is paused or not. Signed-off-by: Richard Fitzgerald <rf(a)opensource.wolfsonmicro.com> --- sound/core/compress_offload.c | 3 +-- 1 files changed, 1 insertions(+), 2 deletions(-) diff --git a/sound/core/compress_offload.c b/sound/core/compress_offload.c index bea523a..30ca133 100644 --- a/sound/core/compress_offload.c +++ b/sound/core/compress_offload.c @@ -384,8 +384,7 @@ static unsigned int snd_compr_poll(struct file *f, poll_table *wait) return -EFAULT; mutex_lock(&stream->device->lock); - if (stream->runtime->state == SNDRV_PCM_STATE_PAUSED || - stream->runtime->state == SNDRV_PCM_STATE_OPEN) { + if (stream->runtime->state == SNDRV_PCM_STATE_OPEN) { retval = -EBADFD; goto out; } -- 1.7.2.5

3 2

[alsa-devel] [TINYCOMPRESS][PATCH] compress: compress_wait() must return error if timed out
by Richard Fitzgerald 12 Nov '13

12 Nov '13

The caller must be certain that a return of 0 really means that compress is ready for more data, so when poll() returns 0 for a timeout we must report that as an error. Signed-off-by: Richard Fitzgerald <rf(a)opensource.wolfsonmicro.com> --- compress.c | 18 ++++++++++-------- 1 files changed, 10 insertions(+), 8 deletions(-) diff --git a/compress.c b/compress.c index 5cd0966..d1a2283 100644 --- a/compress.c +++ b/compress.c @@ -616,15 +616,17 @@ int compress_wait(struct compress *compress, int timeout_ms) fds.events = POLLOUT | POLLIN; ret = poll(&fds, 1, timeout_ms); - if (fds.revents & POLLERR) { - return oops(compress, EIO, "poll returned error!"); + if (ret > 0) { + if (fds.revents & POLLERR) + return oops(compress, EIO, "poll returned error!"); + if (fds.revents & (POLLOUT | POLLIN)) + return 0; } - /* A pause will cause -EBADFD or zero. */ - if ((ret < 0) && (ret != -EBADFD)) + if (ret == 0) + return oops(compress, ETIME, "poll timed out"); + if (ret < 0) return oops(compress, errno, "poll error"); - if (fds.revents & (POLLOUT | POLLIN)) { - return 0; - } - return ret; + + return oops(compress, EIO, "poll signalled unhandled event"); } -- 1.7.2.5

2 1

[alsa-devel] [patch] ASoC: rcar: off by one in rsnd_scu_set_route()
by Dan Carpenter 12 Nov '13

12 Nov '13

If "id == ARRAY_SIZE(routes)" then we read one space beyond the end of the routes[] array. Signed-off-by: Dan Carpenter <dan.carpenter(a)oracle.com> diff --git a/sound/soc/sh/rcar/scu.c b/sound/soc/sh/rcar/scu.c index 1ab1bce..5e46ef2 100644 --- a/sound/soc/sh/rcar/scu.c +++ b/sound/soc/sh/rcar/scu.c @@ -68,7 +68,7 @@ static int rsnd_scu_set_route(struct rsnd_priv *priv, return 0; id = rsnd_mod_id(mod); - if (id < 0 || id > ARRAY_SIZE(routes)) + if (id < 0 || id >= ARRAY_SIZE(routes)) return -EIO; /*

3 2

[alsa-devel] [RFC] ASoC: Add support for BCM2835
by Florian Meier 11 Nov '13

11 Nov '13

This driver adds support for digital audio (I2S) for the BCM2835 SoC that is used by the Raspberry Pi. External audio codecs can be connected to the Raspberry Pi via P5 header. It relies on cyclic DMA engine support for BCM2835. Signed-off-by: Florian Meier <florian.meier(a)koalo.de> --- This patch does not cleanly apply, because it depends on the DMA driver. Anyhow, I would be glad to get some comments. arch/arm/boot/dts/bcm2835.dtsi | 12 + sound/soc/Kconfig | 1 + sound/soc/Makefile | 1 + sound/soc/bcm2835/Kconfig | 15 + sound/soc/bcm2835/Makefile | 6 + sound/soc/bcm2835/bcm2835-i2s.c | 962 +++++++++++++++++++++++++++++++++++++++ sound/soc/bcm2835/bcm2835-pcm.c | 74 +++ sound/soc/bcm2835/bcm2835-pcm.h | 29 ++ 8 files changed, 1100 insertions(+) create mode 100644 sound/soc/bcm2835/Kconfig create mode 100644 sound/soc/bcm2835/Makefile create mode 100644 sound/soc/bcm2835/bcm2835-i2s.c create mode 100644 sound/soc/bcm2835/bcm2835-pcm.c create mode 100644 sound/soc/bcm2835/bcm2835-pcm.h diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi index 1514198..17f7b1b 100644 --- a/arch/arm/boot/dts/bcm2835.dtsi +++ b/arch/arm/boot/dts/bcm2835.dtsi @@ -125,6 +125,18 @@ dma-channels = <15>; /* DMA channel 15 is not handled yet */ dma-requests = <32>; }; + + bcm2835_i2s: i2s@7e203000 { + compatible = "brcm,bcm2835-i2s"; + reg = < 0x7e203000 0x20 + 0x7e101098 0x02>; + + dmas = <&dma 0 + &dma 0>; + dma-names = "tx", "rx"; + + status = "disabled"; + }; }; clocks { diff --git a/sound/soc/Kconfig b/sound/soc/Kconfig index 5138b84..077e4a4 100644 --- a/sound/soc/Kconfig +++ b/sound/soc/Kconfig @@ -33,6 +33,7 @@ config SND_SOC_GENERIC_DMAENGINE_PCM # All the supported SoCs source "sound/soc/atmel/Kconfig" source "sound/soc/au1x/Kconfig" +source "sound/soc/bcm2835/Kconfig" source "sound/soc/blackfin/Kconfig" source "sound/soc/cirrus/Kconfig" source "sound/soc/davinci/Kconfig" diff --git a/sound/soc/Makefile b/sound/soc/Makefile index 61a64d2..298768f 100644 --- a/sound/soc/Makefile +++ b/sound/soc/Makefile @@ -10,6 +10,7 @@ obj-$(CONFIG_SND_SOC) += codecs/ obj-$(CONFIG_SND_SOC) += generic/ obj-$(CONFIG_SND_SOC) += atmel/ obj-$(CONFIG_SND_SOC) += au1x/ +obj-$(CONFIG_SND_SOC) += bcm2835/ obj-$(CONFIG_SND_SOC) += blackfin/ obj-$(CONFIG_SND_SOC) += cirrus/ obj-$(CONFIG_SND_SOC) += davinci/ diff --git a/sound/soc/bcm2835/Kconfig b/sound/soc/bcm2835/Kconfig new file mode 100644 index 0000000..93619ec --- /dev/null +++ b/sound/soc/bcm2835/Kconfig @@ -0,0 +1,15 @@ +config SND_BCM2835_SOC_I2S + tristate + +config SND_BCM2835_SOC + tristate "SoC Audio support for the Broadcom BCM2835 I2S module" + depends on ARCH_BCM2835 + select SND_SOC_DMAENGINE_PCM + select DMADEVICES + select DMA_BCM2835 + select SND_SOC_GENERIC_DMAENGINE_PCM + select REGMAP_MMIO + help + Say Y or M if you want to add support for codecs attached to + the BCM2835 I2S interface. You will also need + to select the audio interfaces to support below. diff --git a/sound/soc/bcm2835/Makefile b/sound/soc/bcm2835/Makefile new file mode 100644 index 0000000..f442f57 --- /dev/null +++ b/sound/soc/bcm2835/Makefile @@ -0,0 +1,6 @@ +# BCM2835 Platform Support +snd-soc-bcm2835-objs := bcm2835-pcm.o +snd-soc-bcm2835-i2s-objs := bcm2835-i2s.o + +obj-$(CONFIG_SND_BCM2835_SOC) += snd-soc-bcm2835.o +obj-$(CONFIG_SND_BCM2835_SOC_I2S) += snd-soc-bcm2835-i2s.o diff --git a/sound/soc/bcm2835/bcm2835-i2s.c b/sound/soc/bcm2835/bcm2835-i2s.c new file mode 100644 index 0000000..7fb6ff4 --- /dev/null +++ b/sound/soc/bcm2835/bcm2835-i2s.c @@ -0,0 +1,962 @@ +/* + * ALSA SoC I2S Audio Layer for Broadcom BCM2835 SoC + * + * Author: Florian Meier <florian.meier(a)koalo.de> + * Copyright 2013 + * + * based on + * Raspberry Pi PCM I2S ALSA Driver + * Copyright (c) by Phil Poole 2013 + * + * ALSA SoC I2S (McBSP) Audio Layer for TI DAVINCI processor + * Vladimir Barinov, <vbarinov(a)embeddedalley.com> + * Copyright (C) 2007 MontaVista Software, Inc., <source(a)mvista.com> + * + * OMAP ALSA SoC DAI driver using McBSP port + * Copyright (C) 2008 Nokia Corporation + * Contact: Jarkko Nikula <jarkko.nikula(a)bitmer.com> + * Peter Ujfalusi <peter.ujfalusi(a)ti.com> + * + * Freescale SSI ALSA SoC Digital Audio Interface (DAI) driver + * Author: Timur Tabi <timur(a)freescale.com> + * Copyright 2007-2010 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA + * 02110-1301 USA + * + */ + +#include <linux/init.h> +#include <linux/module.h> +#include <linux/device.h> +#include <linux/slab.h> +#include <linux/delay.h> +#include <linux/io.h> +#include <linux/clk.h> + +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/initval.h> +#include <sound/soc.h> +#include <sound/dmaengine_pcm.h> + +#include "bcm2835-pcm.h" + +/* Clock registers */ +#define BCM2835_CLK_PCMCTL_REG 0x00 +#define BCM2835_CLK_PCMDIV_REG 0x04 + +/* Clock register settings */ +#define BCM2835_CLK_PASSWD (0x5a000000) +#define BCM2835_CLK_PASSWD_MASK (0xff000000) +#define BCM2835_CLK_MASH(v) ((v) << 9) +#define BCM2835_CLK_FLIP (1 << 8) +#define BCM2835_CLK_BUSY (1 << 7) +#define BCM2835_CLK_KILL (1 << 5) +#define BCM2835_CLK_ENAB (1 << 4) +#define BCM2835_CLK_SRC(v) (v) + +#define BCM2835_CLK_DIVI(v) ((v) << 12) +#define BCM2835_CLK_DIVF(v) (v) + +enum { + BCM2835_CLK_MASH_0 = 0, + BCM2835_CLK_MASH_1, + BCM2835_CLK_MASH_2, + BCM2835_CLK_MASH_3, +}; + +enum { + BCM2835_CLK_SRC_GND = 0, + BCM2835_CLK_SRC_OSC, + BCM2835_CLK_SRC_DBG0, + BCM2835_CLK_SRC_DBG1, + BCM2835_CLK_SRC_PLLA, + BCM2835_CLK_SRC_PLLC, + BCM2835_CLK_SRC_PLLD, + BCM2835_CLK_SRC_HDMI, +}; + +/* Most clocks are not useable (freq = 0) */ +static const unsigned int bcm2835_clk_freq[BCM2835_CLK_SRC_HDMI+1] = { + [BCM2835_CLK_SRC_GND] = 0, + [BCM2835_CLK_SRC_OSC] = 19200000, + [BCM2835_CLK_SRC_DBG0] = 0, + [BCM2835_CLK_SRC_DBG1] = 0, + [BCM2835_CLK_SRC_PLLA] = 0, + [BCM2835_CLK_SRC_PLLC] = 0, + [BCM2835_CLK_SRC_PLLD] = 500000000, + [BCM2835_CLK_SRC_HDMI] = 0, +}; + + +/* I2S registers */ +#define BCM2835_I2S_CS_A_REG 0x00 +#define BCM2835_I2S_FIFO_A_REG 0x04 +#define BCM2835_I2S_MODE_A_REG 0x08 +#define BCM2835_I2S_RXC_A_REG 0x0c +#define BCM2835_I2S_TXC_A_REG 0x10 +#define BCM2835_I2S_DREQ_A_REG 0x14 +#define BCM2835_I2S_INTEN_A_REG 0x18 +#define BCM2835_I2S_INTSTC_A_REG 0x1c +#define BCM2835_I2S_GRAY_REG 0x20 + +/* I2S register settings */ +#define BCM2835_I2S_STBY (1 << 25) +#define BCM2835_I2S_SYNC (1 << 24) +#define BCM2835_I2S_RXSEX (1 << 23) +#define BCM2835_I2S_RXF (1 << 22) +#define BCM2835_I2S_TXE (1 << 21) +#define BCM2835_I2S_RXD (1 << 20) +#define BCM2835_I2S_TXD (1 << 19) +#define BCM2835_I2S_RXR (1 << 18) +#define BCM2835_I2S_TXW (1 << 17) +#define BCM2835_I2S_CS_RXERR (1 << 16) +#define BCM2835_I2S_CS_TXERR (1 << 15) +#define BCM2835_I2S_RXSYNC (1 << 14) +#define BCM2835_I2S_TXSYNC (1 << 13) +#define BCM2835_I2S_DMAEN (1 << 9) +#define BCM2835_I2S_RXTHR(v) ((v) << 7) +#define BCM2835_I2S_TXTHR(v) ((v) << 5) +#define BCM2835_I2S_RXCLR (1 << 4) +#define BCM2835_I2S_TXCLR (1 << 3) +#define BCM2835_I2S_TXON (1 << 2) +#define BCM2835_I2S_RXON (1 << 1) +#define BCM2835_I2S_EN (1) + +#define BCM2835_I2S_CLKDIS (1 << 28) +#define BCM2835_I2S_PDMN (1 << 27) +#define BCM2835_I2S_PDME (1 << 26) +#define BCM2835_I2S_FRXP (1 << 25) +#define BCM2835_I2S_FTXP (1 << 24) +#define BCM2835_I2S_CLKM (1 << 23) +#define BCM2835_I2S_CLKI (1 << 22) +#define BCM2835_I2S_FSM (1 << 21) +#define BCM2835_I2S_FSI (1 << 20) +#define BCM2835_I2S_FLEN(v) ((v) << 10) +#define BCM2835_I2S_FSLEN(v) (v) + +#define BCM2835_I2S_CHWEX (1 << 15) +#define BCM2835_I2S_CHEN (1 << 14) +#define BCM2835_I2S_CHPOS(v) ((v) << 4) +#define BCM2835_I2S_CHWID(v) (v) +#define BCM2835_I2S_CH1(v) ((v) << 16) +#define BCM2835_I2S_CH2(v) (v) + +#define BCM2835_I2S_TX_PANIC(v) ((v) << 24) +#define BCM2835_I2S_RX_PANIC(v) ((v) << 16) +#define BCM2835_I2S_TX(v) ((v) << 8) +#define BCM2835_I2S_RX(v) (v) + +#define BCM2835_I2S_INT_RXERR (1 << 3) +#define BCM2835_I2S_INT_TXERR (1 << 2) +#define BCM2835_I2S_INT_RXR (1 << 1) +#define BCM2835_I2S_INT_TXW (1 << 0) + +/* I2S DMA interface */ +#define BCM2835_I2S_FIFO_PHYSICAL_ADDR 0x7E203004 +#define BCM2835_DMA_DREQ_PCM_TX 2 +#define BCM2835_DMA_DREQ_PCM_RX 3 + +/* General device struct */ +struct bcm2835_i2s_dev { + struct device *dev; + + struct snd_dmaengine_dai_dma_data dma_data[2]; + + unsigned int fmt; + struct snd_pcm_substream *first_stream; + struct snd_pcm_substream *second_stream; + + struct regmap *i2s_regmap; + struct regmap *clk_regmap; +}; + +static void bcm2835_i2s_start_clock(struct bcm2835_i2s_dev *dev) +{ + /* + * Start the clock if in master mode. + */ + unsigned int master = dev->fmt & SND_SOC_DAIFMT_MASTER_MASK; + + switch (master) { + case SND_SOC_DAIFMT_CBS_CFS: + case SND_SOC_DAIFMT_CBS_CFM: + regmap_update_bits(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, + BCM2835_CLK_PASSWD_MASK | BCM2835_CLK_ENAB, + BCM2835_CLK_PASSWD | BCM2835_CLK_ENAB); + break; + default: + break; + } +} + +static void bcm2835_i2s_stop_clock(struct bcm2835_i2s_dev *dev) +{ + unsigned int clkreg; + int timeout = 1000; + + /* stop clock */ + regmap_update_bits(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, + BCM2835_CLK_PASSWD_MASK | BCM2835_CLK_ENAB, + BCM2835_CLK_PASSWD); + + /* wait for the BUSY flag going down */ + while (timeout > 0) { + timeout--; + + regmap_read(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, &clkreg); + if (!(clkreg & BCM2835_CLK_BUSY)) + break; + } + + if (timeout <= 0) { + /* KILL the clock */ + dev_err(dev->dev, "I2S clock didn't stop. Kill the clock!\n"); + regmap_update_bits(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, + BCM2835_CLK_KILL | BCM2835_CLK_PASSWD_MASK, + BCM2835_CLK_KILL | BCM2835_CLK_PASSWD); + } +} + +static void bcm2835_i2s_clear_fifos(struct bcm2835_i2s_dev *dev) +{ + int timeout = 1000; + unsigned int syncval; + unsigned int csreg; + unsigned int i2s_active_state; + unsigned int clkreg; + unsigned int clk_active_state; + + /* Backup the current state */ + regmap_read(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, &csreg); + i2s_active_state = csreg & (BCM2835_I2S_RXON | BCM2835_I2S_TXON); + + regmap_read(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, &clkreg); + clk_active_state = clkreg & BCM2835_CLK_ENAB; + + /* Start clock if not running */ + if (!clk_active_state) { + regmap_update_bits(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, + BCM2835_CLK_PASSWD_MASK | BCM2835_CLK_ENAB, + BCM2835_CLK_PASSWD | BCM2835_CLK_ENAB); + } + + /* Stop I2S module */ + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, + BCM2835_I2S_RXON | BCM2835_I2S_TXON, 0); + + /* + * Clear the FIFOs + * Requires at least 2 PCM clock cycles to take effect + */ + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, + BCM2835_I2S_RXCLR | BCM2835_I2S_TXCLR, -1); + + /* Wait for 2 PCM clock cycles */ + + /* + * Toggle the SYNC flag - after 2 PCM clock cycles it can be read back + * FIXME: This does not seem to work for slave mode! + */ + regmap_read(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, &syncval); + syncval &= BCM2835_I2S_SYNC; + + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, + BCM2835_I2S_SYNC, ~syncval); + + /* Wait for the SYNC flag changing it's state */ + while (timeout > 0) { + timeout--; + + regmap_read(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, &csreg); + if ((csreg & BCM2835_I2S_SYNC) != syncval) + break; + } + + if (timeout <= 0) + dev_err(dev->dev, "I2S SYNC error!\n"); + + /* Stop clock if it was not running before */ + if (!clk_active_state) + bcm2835_i2s_stop_clock(dev); + + /* Restore I2S state */ + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, + BCM2835_I2S_RXON | BCM2835_I2S_TXON, i2s_active_state); +} + +static int bcm2835_i2s_set_dai_fmt(struct snd_soc_dai *dai, + unsigned int fmt) +{ + struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); + dev->fmt = fmt; + return 0; +} + +static int bcm2835_i2s_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); + + unsigned int sampling_rate = params_rate(params); + unsigned int data_length, data_delay, half_frame; + unsigned int ch1pos, ch2pos, mode, format; + unsigned int mash = BCM2835_CLK_MASH_1; + unsigned int divi, divf, target_frequency; + int clk_src = -1; + unsigned int master = dev->fmt & SND_SOC_DAIFMT_MASTER_MASK; + unsigned int bit_master = (master == SND_SOC_DAIFMT_CBS_CFS + || master == SND_SOC_DAIFMT_CBS_CFM); + + unsigned int frame_master = (master == SND_SOC_DAIFMT_CBS_CFS + || master == SND_SOC_DAIFMT_CBM_CFS); + unsigned int csreg; + + /* + * If a stream is already enabled, + * the registers are already set properly. + */ + regmap_read(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, &csreg); + + if (csreg & (BCM2835_I2S_TXON | BCM2835_I2S_RXON)) + return 0; + + /* + * Adjust the data length according to the format. + * We prefill the half frame length with an integer + * divider of 2400 as explained at the clock settings. + * Maybe it is overwritten there, if the Integer mode + * does not apply. + */ + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_S16_LE: + data_length = 16; + half_frame = 20; + break; + case SNDRV_PCM_FORMAT_S32_LE: + data_length = 32; + half_frame = 40; + break; + default: + return -EINVAL; + } + + /* + * Clock Settings + * + * The target frequency of the bit clock is + * sampling rate * frame length + * + * Integer mode: + * Sampling rates that are multiples of 8000 kHz + * can be driven by the oscillator of 19.2 MHz + * with an integer divider as long as the frame length + * is an integer divider of 19200000/8000=2400 as set up above. + * This is no longer possible if the sampling rate + * is too high (e.g. 192 kHz), because the oscillator is too slow. + * + * MASH mode: + * For all other sampling rates, it is not possible to + * have an integer divider. Approximate the clock + * with the MASH module that induces a slight frequency + * variance. To minimize that it is best to have the fastest + * clock here. That is PLLD with 500 MHz. + */ + target_frequency = sampling_rate*half_frame*2; + clk_src = BCM2835_CLK_SRC_OSC; + mash = BCM2835_CLK_MASH_0; + + if (bcm2835_clk_freq[clk_src] % target_frequency == 0 + && bit_master && frame_master) { + divi = bcm2835_clk_freq[clk_src]/target_frequency; + divf = 0; + } else { + uint64_t dividend; + + /* + * Overwrite half frame length, because the + * above trick is not needed. + * This is fixed, because a bit clock of 64*fs + * seems to be what most codecs want. + * Is it necessary to have this dynamic? + */ + half_frame = 32; + target_frequency = sampling_rate*half_frame*2; + + clk_src = BCM2835_CLK_SRC_PLLD; + mash = BCM2835_CLK_MASH_1; + + dividend = bcm2835_clk_freq[clk_src]; + dividend *= 1024; + do_div(dividend, target_frequency); + divi = dividend / 1024; + divf = dividend % 1024; + } + + /* Set clock divider */ + regmap_write(dev->clk_regmap, BCM2835_CLK_PCMDIV_REG, BCM2835_CLK_PASSWD + | BCM2835_CLK_DIVI(divi) + | BCM2835_CLK_DIVF(divf)); + + /* Setup clock, but don't start it yet */ + regmap_write(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, BCM2835_CLK_PASSWD + | BCM2835_CLK_MASH(mash) + | BCM2835_CLK_SRC(clk_src)); + + /* Setup the frame format */ + format = BCM2835_I2S_CHEN; + + if (data_length > 24) + format |= BCM2835_I2S_CHWEX; + + format |= BCM2835_I2S_CHWID((data_length-8)&0xf); + + switch (dev->fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + data_delay = 1; + break; + default: + /* TODO + * Others are possible but are not implemented at the moment. + */ + dev_err(dev->dev, "%s:bad format\n", __func__); + return -EINVAL; + } + + ch1pos = data_delay; + ch2pos = half_frame+data_delay; + + switch (params_channels(params)) { + case 2: + format = BCM2835_I2S_CH1(format) | BCM2835_I2S_CH2(format); + format |= BCM2835_I2S_CH1(BCM2835_I2S_CHPOS(ch1pos)); + format |= BCM2835_I2S_CH2(BCM2835_I2S_CHPOS(ch2pos)); + break; + default: + return -EINVAL; + } + + /* + * Set format for both streams. + * We cannot set another frame length + * (and therefore word length) anyway, + * so the format will be the same. + */ + regmap_write(dev->i2s_regmap, BCM2835_I2S_RXC_A_REG, format); + regmap_write(dev->i2s_regmap, BCM2835_I2S_TXC_A_REG, format); + + /* Setup the I2S mode */ + mode = 0; + + if (data_length <= 16) { + /* + * Use frame packed mode (2 channels per 32 bit word) + * We cannot set another frame length in the second stream + * (and therefore word length) anyway, + * so the format will be the same. + */ + mode |= BCM2835_I2S_FTXP | BCM2835_I2S_FRXP; + } + + mode |= BCM2835_I2S_FLEN(half_frame*2-1); + mode |= BCM2835_I2S_FSLEN(half_frame); + + /* master or slave? */ + switch (dev->fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBS_CFS: + /* cpu is master */ + break; + case SND_SOC_DAIFMT_CBM_CFS: + /* + * codec is bit clock master + * cpu is frame master + */ + mode |= BCM2835_I2S_CLKM; + break; + case SND_SOC_DAIFMT_CBS_CFM: + /* + * codec is frame master + * cpu is bit clock master + */ + mode |= BCM2835_I2S_FSM; + break; + case SND_SOC_DAIFMT_CBM_CFM: + /* codec is master */ + mode |= BCM2835_I2S_CLKM; + mode |= BCM2835_I2S_FSM; + break; + default: + dev_err(dev->dev, "%s:bad master\n", __func__); + return -EINVAL; + } + + /* + * Invert clocks? + * + * The BCM approach seems to be inverted to the classical I2S approach. + */ + switch (dev->fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + /* none - therefore, both for BCM */ + mode |= BCM2835_I2S_CLKI; + mode |= BCM2835_I2S_FSI; + break; + case SND_SOC_DAIFMT_IB_IF: + /* both - therefore, none for BCM*/ + break; + case SND_SOC_DAIFMT_NB_IF: + /* + * invert only frame sync - therefore, + * invert only bit clock for BCM + */ + mode |= BCM2835_I2S_CLKI; + break; + case SND_SOC_DAIFMT_IB_NF: + /* + * invert only bit clock - therefore, + * invert only frame sync for BCM + */ + mode |= BCM2835_I2S_FSI; + break; + default: + return -EINVAL; + } + + regmap_write(dev->i2s_regmap, BCM2835_I2S_MODE_A_REG, mode); + + + /* Setup the DMA parameters */ + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, + BCM2835_I2S_RXTHR(1) + | BCM2835_I2S_TXTHR(1) + | BCM2835_I2S_DMAEN, -1); + + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_DREQ_A_REG, + BCM2835_I2S_TX_PANIC(0x10) + | BCM2835_I2S_RX_PANIC(0x30) + | BCM2835_I2S_TX(0x30) + | BCM2835_I2S_RX(0x20), -1); + + /* Clear FIFOs */ + bcm2835_i2s_clear_fifos(dev); + + return 0; +} + + +static int bcm2835_i2s_prepare(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); + unsigned int cs_reg; + + bcm2835_i2s_start_clock(dev); + + /* + * Clear both FIFOs if the one that should be started + * is not empty at the moment. This should only happen + * after overrun. Otherwise, hw_params would have cleared + * the FIFO. + */ + regmap_read(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, &cs_reg); + + switch (substream->stream) { + case SNDRV_PCM_STREAM_PLAYBACK: + if (cs_reg & BCM2835_I2S_TXE) + break; + case SNDRV_PCM_STREAM_CAPTURE: + if (!(cs_reg & BCM2835_I2S_RXD)) + break; + + bcm2835_i2s_clear_fifos(dev); + } + + return 0; +} + +static void bcm2835_i2s_stop(struct bcm2835_i2s_dev *dev, + struct snd_pcm_substream *substream) +{ + unsigned int still_running; + + if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) { + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, + BCM2835_I2S_RXON, 0); + } else { + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, + BCM2835_I2S_TXON, 0); + } + + regmap_read(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, &still_running); + still_running &= BCM2835_I2S_TXON | BCM2835_I2S_RXON; + + /* Stop also the clock when not SND_SOC_DAIFMT_CONT */ + if (!still_running && !(dev->fmt & SND_SOC_DAIFMT_CONT)) + bcm2835_i2s_stop_clock(dev); + +} + +static int bcm2835_i2s_trigger(struct snd_pcm_substream *substream, int cmd, + struct snd_soc_dai *dai) +{ + struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + case SNDRV_PCM_TRIGGER_RESUME: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + bcm2835_i2s_start_clock(dev); + + if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) { + regmap_update_bits(dev->i2s_regmap, + BCM2835_I2S_CS_A_REG, + BCM2835_I2S_RXON, BCM2835_I2S_RXON); + } else { + regmap_update_bits(dev->i2s_regmap, + BCM2835_I2S_CS_A_REG, + BCM2835_I2S_TXON, BCM2835_I2S_TXON); + } + break; + + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + bcm2835_i2s_stop(dev, substream); + break; + default: + return -EINVAL; + } + + return 0; +} + +static int bcm2835_i2s_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); + + if (!dev->first_stream) { + dev->first_stream = substream; + + /* should this still be running stop it */ + bcm2835_i2s_stop_clock(dev); + + /* enable PCM block */ + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, + BCM2835_I2S_EN, -1); + + /* + * Disable STBY + * Requires at least 4 PCM clock cycles to take effect + */ + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, + BCM2835_I2S_STBY, -1); + + } else { + dev->second_stream = substream; + } + + return 0; +} + +static void bcm2835_i2s_shutdown(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); + + bcm2835_i2s_stop(dev, substream); + + if (dev->first_stream == substream) + dev->first_stream = dev->second_stream; + + dev->second_stream = NULL; + + /* If both streams are stopped, disable module and clock */ + if (!dev->first_stream) { + /* Disable the module */ + regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, + BCM2835_I2S_EN, 0); + + /* + * Stopping clock is necessary, because stop does + * not stop the clock when SND_SOC_DAIFMT_CONT + */ + bcm2835_i2s_stop_clock(dev); + } +} + +static const struct snd_soc_dai_ops bcm2835_i2s_dai_ops = { + .startup = bcm2835_i2s_startup, + .shutdown = bcm2835_i2s_shutdown, + .prepare = bcm2835_i2s_prepare, + .trigger = bcm2835_i2s_trigger, + .hw_params = bcm2835_i2s_hw_params, + .set_fmt = bcm2835_i2s_set_dai_fmt, +}; + +static int bcm2835_i2s_dai_probe(struct snd_soc_dai *dai) +{ + struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); + + /* Set the appropriate DMA parameters */ + dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK].addr = + (dma_addr_t)BCM2835_I2S_FIFO_PHYSICAL_ADDR; + dev->dma_data[SNDRV_PCM_STREAM_CAPTURE].addr = + (dma_addr_t)BCM2835_I2S_FIFO_PHYSICAL_ADDR; + + dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK].slave_id = + BCM2835_DMA_DREQ_PCM_TX; + dev->dma_data[SNDRV_PCM_STREAM_CAPTURE].slave_id = + BCM2835_DMA_DREQ_PCM_RX; + + dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK].addr_width = + DMA_SLAVE_BUSWIDTH_4_BYTES; + dev->dma_data[SNDRV_PCM_STREAM_CAPTURE].addr_width = + DMA_SLAVE_BUSWIDTH_4_BYTES; + + /* TODO other burst parameters possible? */ + dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK].maxburst = 2; + dev->dma_data[SNDRV_PCM_STREAM_CAPTURE].maxburst = 2; + + dai->playback_dma_data = &dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK]; + dai->capture_dma_data = &dev->dma_data[SNDRV_PCM_STREAM_CAPTURE]; + + return 0; +} + +static struct snd_soc_dai_driver bcm2835_i2s_dai = { + .name = "bcm2835-i2s", + .probe = bcm2835_i2s_dai_probe, + .playback = { + .channels_min = 2, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000_192000, + .formats = SNDRV_PCM_FMTBIT_S16_LE + | SNDRV_PCM_FMTBIT_S32_LE + }, + .capture = { + .channels_min = 2, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000_192000, + .formats = SNDRV_PCM_FMTBIT_S16_LE + | SNDRV_PCM_FMTBIT_S32_LE + }, + .ops = &bcm2835_i2s_dai_ops, + .symmetric_rates = 1 +}; + +static bool bcm2835_i2s_wr_rd_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case BCM2835_I2S_CS_A_REG: + case BCM2835_I2S_FIFO_A_REG: + case BCM2835_I2S_MODE_A_REG: + case BCM2835_I2S_RXC_A_REG: + case BCM2835_I2S_TXC_A_REG: + case BCM2835_I2S_DREQ_A_REG: + case BCM2835_I2S_INTEN_A_REG: + case BCM2835_I2S_INTSTC_A_REG: + case BCM2835_I2S_GRAY_REG: + return true; + default: + return false; + }; +} + +static bool bcm2835_i2s_volatile_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case BCM2835_I2S_CS_A_REG: + case BCM2835_I2S_FIFO_A_REG: + case BCM2835_I2S_INTSTC_A_REG: + case BCM2835_I2S_GRAY_REG: + return true; + default: + return false; + }; +} + +static bool bcm2835_i2s_precious_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case BCM2835_I2S_FIFO_A_REG: + return true; + default: + return false; + }; +} + + +static bool bcm2835_clk_wr_rd_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case BCM2835_CLK_PCMCTL_REG: + case BCM2835_CLK_PCMDIV_REG: + return true; + default: + return false; + }; +} + +static bool bcm2835_clk_volatile_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case BCM2835_CLK_PCMCTL_REG: + return true; + default: + return false; + }; +} + +static bool bcm2835_clk_precious_reg(struct device *dev, unsigned int reg) +{ + return false; +} + +static const struct regmap_config bcm2835_regmap_config[] = { + { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + .max_register = BCM2835_I2S_GRAY_REG, + .writeable_reg = bcm2835_i2s_wr_rd_reg, + .readable_reg = bcm2835_i2s_wr_rd_reg, + .volatile_reg = bcm2835_i2s_volatile_reg, + .precious_reg = bcm2835_i2s_precious_reg, + .cache_type = REGCACHE_RBTREE, + }, + { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + .max_register = BCM2835_CLK_PCMDIV_REG, + .writeable_reg = bcm2835_clk_wr_rd_reg, + .readable_reg = bcm2835_clk_wr_rd_reg, + .volatile_reg = bcm2835_clk_volatile_reg, + .precious_reg = bcm2835_clk_precious_reg, + .cache_type = REGCACHE_RBTREE, + }, +}; + +static const struct regmap_config bcm2835_i2s_regmap_config = { +}; + +static const struct snd_soc_component_driver bcm2835_i2s_component = { + .name = "bcm2835-i2s-comp", +}; + +static int bcm2835_i2s_probe(struct platform_device *pdev) +{ + struct bcm2835_i2s_dev *dev; + int i; + int ret; + struct regmap *regmap[2]; + + /* request both ioareas */ + for (i = 0; i <= 1; i++) { + struct resource *mem, *ioarea; + void __iomem *base; + + mem = platform_get_resource(pdev, IORESOURCE_MEM, i); + if (!mem) { + dev_err(&pdev->dev, "I2S probe: Memory resource could not be found.\n"); + return -ENODEV; + } + + ioarea = devm_request_mem_region(&pdev->dev, mem->start, + resource_size(mem), + pdev->name); + if (!ioarea) { + dev_err(&pdev->dev, "I2S probe: Memory region already claimed.\n"); + return -EBUSY; + } + + base = devm_ioremap(&pdev->dev, mem->start, + resource_size(mem)); + if (!base) { + dev_err(&pdev->dev, "I2S probe: ioremap failed.\n"); + return -ENOMEM; + } + + regmap[i] = devm_regmap_init_mmio(&pdev->dev, base, + &bcm2835_regmap_config[i]); + if (IS_ERR(regmap[i])) { + dev_err(&pdev->dev, "I2S probe: regmap init failed\n"); + return PTR_ERR(regmap[i]); + } + } + + dev = devm_kzalloc(&pdev->dev, sizeof(struct bcm2835_i2s_dev), + GFP_KERNEL); + if (!dev) { + dev_err(&pdev->dev, "I2S probe: kzalloc failed.\n"); + return -ENOMEM; + } + + dev->i2s_regmap = regmap[0]; + dev->clk_regmap = regmap[1]; + + /* Store the pdev */ + dev->dev = &pdev->dev; + dev_set_drvdata(&pdev->dev, dev); + + ret = snd_soc_register_component(&pdev->dev, + &bcm2835_i2s_component, &bcm2835_i2s_dai, 1); + + if (ret) { + dev_err(&pdev->dev, "Could not register DAI: %d\n", ret); + ret = -ENOMEM; + return ret; + } + + ret = bcm2835_pcm_platform_register(&pdev->dev); + if (ret) { + dev_err(&pdev->dev, "Could not register PCM: %d\n", ret); + snd_soc_unregister_component(&pdev->dev); + return ret; + } + + return 0; +} + +static const struct of_device_id bcm2835_i2s_of_match[] = { + { .compatible = "brcm,bcm2835-i2s", }, + {}, +}; + +static int bcm2835_i2s_remove(struct platform_device *pdev) +{ + bcm2835_pcm_platform_unregister(&pdev->dev); + snd_soc_unregister_component(&pdev->dev); + return 0; +} + +static struct platform_driver bcm2835_i2s_driver = { + .probe = bcm2835_i2s_probe, + .remove = bcm2835_i2s_remove, + .driver = { + .name = "bcm2835-i2s", + .owner = THIS_MODULE, + .of_match_table = bcm2835_i2s_of_match, + }, +}; + +module_platform_driver(bcm2835_i2s_driver); + +MODULE_AUTHOR("Florian Meier"); +MODULE_DESCRIPTION("BCM2835 I2S Interface"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/bcm2835/bcm2835-pcm.c b/sound/soc/bcm2835/bcm2835-pcm.c new file mode 100644 index 0000000..66e1c0e --- /dev/null +++ b/sound/soc/bcm2835/bcm2835-pcm.c @@ -0,0 +1,74 @@ +/* + * ALSA PCM interface for Broadcom BCM2835 SoC + * + * Author: Florian Meier <florian.meier(a)koalo.de> + * Copyright 2013 + * + * based on + * ALSA PCM interface for the OMAP SoC + * Copyright (C) 2008 Nokia Corporation + * Contact: Jarkko Nikula <jarkko.nikula(a)bitmer.com> + * Peter Ujfalusi <peter.ujfalusi(a)ti.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA + * 02110-1301 USA + * + */ + +#include <linux/module.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/soc.h> +#include <sound/dmaengine_pcm.h> + +#include "bcm2835-pcm.h" + +static const struct snd_pcm_hardware bcm2835_pcm_hardware = { + .info = SNDRV_PCM_INFO_MMAP | + SNDRV_PCM_INFO_MMAP_VALID | + SNDRV_PCM_INFO_INTERLEAVED | + SNDRV_PCM_INFO_JOINT_DUPLEX, + .formats = SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S32_LE, + .period_bytes_min = 32, + .period_bytes_max = 64 * PAGE_SIZE, + .periods_min = 2, + .periods_max = 255, + .buffer_bytes_max = 128 * PAGE_SIZE, +}; + +static const struct snd_dmaengine_pcm_config bcm2835_dmaengine_pcm_config = { + .prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config, + .pcm_hardware = &bcm2835_pcm_hardware, + .prealloc_buffer_size = 256 * PAGE_SIZE, +}; + +int bcm2835_pcm_platform_register(struct device *dev) +{ + return snd_dmaengine_pcm_register(dev, + &bcm2835_dmaengine_pcm_config, + SND_DMAENGINE_PCM_FLAG_COMPAT); +} +EXPORT_SYMBOL_GPL(bcm2835_pcm_platform_register); + +void bcm2835_pcm_platform_unregister(struct device *dev) +{ + snd_dmaengine_pcm_unregister(dev); +} +EXPORT_SYMBOL_GPL(bcm2835_pcm_platform_unregister); + +MODULE_AUTHOR("Florian Meier"); +MODULE_DESCRIPTION("BCM2835 PCM ASoC driver"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/bcm2835/bcm2835-pcm.h b/sound/soc/bcm2835/bcm2835-pcm.h new file mode 100644 index 0000000..07a70ca --- /dev/null +++ b/sound/soc/bcm2835/bcm2835-pcm.h @@ -0,0 +1,29 @@ +/* + * ALSA PCM interface for Broadcom BCM2835 SoC + * + * Author: Florian Meier <florian.meier(a)koalo.de> + * Copyright 2013 + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA + * 02110-1301 USA + * + */ + +#ifndef __BCM2835_PCM_H__ +#define __BCM2835_PCM_H__ + +int bcm2835_pcm_platform_register(struct device *dev); +void bcm2835_pcm_platform_unregister(struct device *dev); + +#endif -- 1.7.9.5

3 2

[alsa-devel] [PATCHv2] dmaengine: Add support for BCM2835.
by Florian Meier 11 Nov '13

11 Nov '13

Add support for DMA controller of BCM2835 as used in the Raspberry Pi. Currently it only supports cyclic DMA. Signed-off-by: Florian Meier <florian.meier(a)koalo.de> --- Second version of patch. Main improvements: - Initialization of control blocks in prep function - Request DREQ from device tree - Request channel mask from device tree arch/arm/boot/dts/bcm2835.dtsi | 23 ++ drivers/dma/Kconfig | 6 + drivers/dma/Makefile | 1 + drivers/dma/bcm2835-dma.c | 896 ++++++++++++++++++++++++++++++++++++++++ 4 files changed, 926 insertions(+) create mode 100644 drivers/dma/bcm2835-dma.c diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi index 1e12aef..7389405 100644 --- a/arch/arm/boot/dts/bcm2835.dtsi +++ b/arch/arm/boot/dts/bcm2835.dtsi @@ -103,6 +103,29 @@ clocks = <&clk_mmc>; status = "disabled"; }; + + dma: dma@7e007000 { + compatible = "brcm,bcm2835-dma"; + reg = <0x7e007000 0xf00>; + interrupts = <1 16 + 1 17 + 1 18 + 1 19 + 1 20 + 1 21 + 1 22 + 1 23 + 1 24 + 1 25 + 1 26 + 1 27 + 1 28>; + + #dma-cells = <1>; + dma-channels = <15>; /* DMA channel 15 is not handled yet */ + dma-requests = <32>; + dma-channel-mask = <0x7f35>; + }; }; clocks { diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig index f238cfd..f2d253b 100644 --- a/drivers/dma/Kconfig +++ b/drivers/dma/Kconfig @@ -288,6 +288,12 @@ config DMA_OMAP select DMA_ENGINE select DMA_VIRTUAL_CHANNELS +config DMA_BCM2835 + tristate "BCM2835 DMA engine support" + depends on (ARCH_BCM2835 || MACH_BCM2708) + select DMA_ENGINE + select DMA_VIRTUAL_CHANNELS + config TI_CPPI41 tristate "AM33xx CPPI41 DMA support" depends on ARCH_OMAP diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile index db89035..6348157 100644 --- a/drivers/dma/Makefile +++ b/drivers/dma/Makefile @@ -37,6 +37,7 @@ obj-$(CONFIG_EP93XX_DMA) += ep93xx_dma.o obj-$(CONFIG_DMA_SA11X0) += sa11x0-dma.o obj-$(CONFIG_MMP_TDMA) += mmp_tdma.o obj-$(CONFIG_DMA_OMAP) += omap-dma.o +obj-$(CONFIG_DMA_BCM2835) += bcm2835-dma.o obj-$(CONFIG_MMP_PDMA) += mmp_pdma.o obj-$(CONFIG_DMA_JZ4740) += dma-jz4740.o obj-$(CONFIG_TI_CPPI41) += cppi41.o diff --git a/drivers/dma/bcm2835-dma.c b/drivers/dma/bcm2835-dma.c new file mode 100644 index 0000000..6972c0c --- /dev/null +++ b/drivers/dma/bcm2835-dma.c @@ -0,0 +1,896 @@ +/* + * BCM2835 DMA engine support + * + * This driver only supports cyclic DMA transfers + * as needed for the I2S module. + * + * Author: Florian Meier, <florian.meier(a)koalo.de> + * Copyright 2013 + * + * based on + * OMAP DMAengine support by Russell King + * + * BCM2708 DMA Driver + * Copyright (C) 2010 Broadcom + * + * Raspberry Pi PCM I2S ALSA Driver + * Copyright (c) by Phil Poole 2013 + * + * MARVELL MMP Peripheral DMA Driver + * Copyright 2012 Marvell International Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include <linux/dmaengine.h> +#include <linux/dma-mapping.h> +#include <linux/err.h> +#include <linux/init.h> +#include <linux/interrupt.h> +#include <linux/list.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/slab.h> +#include <linux/io.h> +#include <linux/spinlock.h> +#include <linux/irq.h> +#include <linux/of.h> +#include <linux/of_dma.h> + +#include "virt-dma.h" + +struct bcm2835_dmadev { + struct dma_device ddev; + spinlock_t lock; + struct tasklet_struct task; + struct list_head pending; + uint32_t chans_available; + void __iomem *dma_base; + int *dma_irq_numbers; +}; + +struct bcm2835_dma_cb { + unsigned long info; + unsigned long src; + unsigned long dst; + unsigned long length; + unsigned long stride; + unsigned long next; + unsigned long pad[2]; +}; + +struct bcm2835_chan { + struct virt_dma_chan vc; + struct list_head node; + + struct dma_slave_config cfg; + unsigned dma_sig; + bool cyclic; + unsigned dreq; + + int dma_ch; + struct bcm2835_desc *desc; + unsigned sgidx; + + void __iomem *dma_chan_base; + int dma_irq_number; + struct irqaction dma_irq_handler; +}; + +struct bcm2835_sg { + dma_addr_t addr; + uint32_t en; /* number of elements (24-bit) */ + uint32_t fn; /* number of frames (16-bit) */ +}; + +struct bcm2835_desc { + struct virt_dma_desc vd; + enum dma_transfer_direction dir; + dma_addr_t dev_addr; + + uint8_t es; + + unsigned int control_block_size; + struct bcm2835_dma_cb *control_block_base; + dma_addr_t control_block_base_phys; + + unsigned sglen; + struct bcm2835_sg sg[0]; +}; + +#define BCM2835_DMA_CS 0x00 +#define BCM2835_DMA_ADDR 0x04 +#define BCM2835_DMA_SOURCE_AD 0x0c +#define BCM2835_DMA_DEST_AD 0x10 +#define BCM2835_DMA_NEXTCB 0x1C + +/* DMA CS Control and Status bits */ +#define BCM2835_DMA_ACTIVE (1 << 0) +#define BCM2835_DMA_INT (1 << 2) +#define BCM2835_DMA_ISPAUSED (1 << 4) /* Pause requested or not active */ +#define BCM2835_DMA_ISHELD (1 << 5) /* Is held by DREQ flow control */ +#define BCM2835_DMA_ERR (1 << 8) +#define BCM2835_DMA_ABORT (1 << 30) /* stop current CB, go to next, WO */ +#define BCM2835_DMA_RESET (1 << 31) /* WO, self clearing */ + +#define BCM2835_DMA_INT_EN (1 << 0) +#define BCM2835_DMA_D_INC (1 << 4) +#define BCM2835_DMA_D_DREQ (1 << 6) +#define BCM2835_DMA_S_INC (1 << 8) +#define BCM2835_DMA_S_DREQ (1 << 6) + +#define BCM2835_DMA_PER_MAP(x) ((x) << 16) + +#define BCM2835_DMA_DATA_TYPE_S8 1 +#define BCM2835_DMA_DATA_TYPE_S16 2 +#define BCM2835_DMA_DATA_TYPE_S32 4 +#define BCM2835_DMA_DATA_TYPE_S128 16 + +/* valid only for channels 0 - 14, 15 has its own base address */ +#define BCM2835_DMA_CHAN(n) ((n)<<8) /* base address */ +#define BCM2835_DMA_CHANIO(dma_base, n) ((dma_base)+BCM2835_DMA_CHAN(n)) + +static inline struct bcm2835_dmadev *to_bcm2835_dma_dev(struct dma_device *d) +{ + return container_of(d, struct bcm2835_dmadev, ddev); +} + +static inline struct bcm2835_chan *to_bcm2835_dma_chan(struct dma_chan *c) +{ + return container_of(c, struct bcm2835_chan, vc.chan); +} + +static inline struct bcm2835_desc *to_bcm2835_dma_desc( + struct dma_async_tx_descriptor *t) +{ + return container_of(t, struct bcm2835_desc, vd.tx); +} + +static void bcm2835_dma_desc_free(struct virt_dma_desc *vd) +{ + struct bcm2835_desc *desc = container_of(vd, struct bcm2835_desc, vd); + dma_free_coherent(desc->vd.tx.chan->device->dev, + desc->control_block_size, + desc->control_block_base, + desc->control_block_base_phys); + kfree(desc); +} + +static int bcm2835_dma_abort(void __iomem *dma_chan_base) +{ + unsigned long int cs; + int rc = 0; + + cs = readl(dma_chan_base + BCM2835_DMA_CS); + + if (BCM2835_DMA_ACTIVE & cs) { + long int timeout = 10000; + + /* write 0 to the active bit - pause the DMA */ + writel(0, dma_chan_base + BCM2835_DMA_CS); + + /* wait for any current AXI transfer to complete */ + while (0 != (cs & BCM2835_DMA_ISPAUSED) && --timeout >= 0) + cs = readl(dma_chan_base + BCM2835_DMA_CS); + + if (0 != (cs & BCM2835_DMA_ISPAUSED)) { + /* we'll un-pause when we set of our next DMA */ + rc = -ETIMEDOUT; + + } else if (BCM2835_DMA_ACTIVE & cs) { + /* terminate the control block chain */ + writel(0, dma_chan_base + BCM2835_DMA_NEXTCB); + + /* abort the whole DMA */ + writel(BCM2835_DMA_ABORT | BCM2835_DMA_ACTIVE, + dma_chan_base + BCM2835_DMA_CS); + } + } + + return rc; +} + +static void bcm2835_dma_start_sg(struct bcm2835_chan *c, struct bcm2835_desc *d, + unsigned idx) +{ + dsb(); /* ARM data synchronization (push) operation */ + + writel(d->control_block_base_phys, c->dma_chan_base+BCM2835_DMA_ADDR); + writel(BCM2835_DMA_ACTIVE, c->dma_chan_base+BCM2835_DMA_CS); +} + +static void bcm2835_dma_start_desc(struct bcm2835_chan *c) +{ + struct virt_dma_desc *vd = vchan_next_desc(&c->vc); + struct bcm2835_desc *d; + + if (!vd) { + c->desc = NULL; + return; + } + + list_del(&vd->node); + + c->desc = d = to_bcm2835_dma_desc(&vd->tx); + c->sgidx = 0; + + bcm2835_dma_start_sg(c, d, 0); +} + +static irqreturn_t bcm2835_dma_callback(int irq, void *data) +{ + struct bcm2835_chan *c = data; + struct bcm2835_desc *d; + unsigned long flags; + + spin_lock_irqsave(&c->vc.lock, flags); + + /* acknowledge interrupt */ + writel(BCM2835_DMA_INT, c->dma_chan_base + BCM2835_DMA_CS); + + d = c->desc; + + if (d) { + if (!c->cyclic) { + if (++c->sgidx < d->sglen) { + bcm2835_dma_start_sg(c, d, c->sgidx); + } else { + bcm2835_dma_start_desc(c); + vchan_cookie_complete(&d->vd); + } + } else { + vchan_cyclic_callback(&d->vd); + } + } + + /* keep the DMA engine running */ + dsb(); /* ARM synchronization barrier */ + writel(BCM2835_DMA_ACTIVE, c->dma_chan_base + BCM2835_DMA_CS); + + spin_unlock_irqrestore(&c->vc.lock, flags); + + return IRQ_HANDLED; +} + +/* + * This callback schedules all pending channels. We could be more + * clever here by postponing allocation of the real DMA channels to + * this point, and freeing them when our virtual channel becomes idle. + * + * We would then need to deal with 'all channels in-use' + */ +static void bcm2835_dma_sched(unsigned long data) +{ + struct bcm2835_dmadev *d = (struct bcm2835_dmadev *)data; + LIST_HEAD(head); + + spin_lock_irq(&d->lock); + list_splice_tail_init(&d->pending, &head); + spin_unlock_irq(&d->lock); + + while (!list_empty(&head)) { + struct bcm2835_chan *c = list_first_entry(&head, + struct bcm2835_chan, node); + + spin_lock_irq(&c->vc.lock); + list_del_init(&c->node); + bcm2835_dma_start_desc(c); + spin_unlock_irq(&c->vc.lock); + } +} + +static int bcm2835_dma_alloc_chan_resources(struct dma_chan *chan) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + int ret; + struct bcm2835_dmadev *d = to_bcm2835_dma_dev(chan->device); + uint32_t chans = d->chans_available; + int chanID = 0; + + dev_dbg(c->vc.chan.device->dev, + "allocating channel for %u\n", c->dma_sig); + + /* do not use the FIQ and BULK channels */ + chans &= ~0xD; + + if (chans) { + /* return the ordinal of the first channel in the bitmap */ + while (chans != 0 && (chans & 1) == 0) { + chans >>= 1; + chanID++; + } + + /* claim the channel */ + d->chans_available &= ~(1 << chanID); + + c->dma_chan_base = BCM2835_DMA_CHANIO(d->dma_base, chanID); + c->dma_irq_number = d->dma_irq_numbers[chanID]; + c->dma_ch = chanID; + } else { + return -ENOMEM; + } + + c->dma_irq_handler.name = "DMA engine IRQ handler"; + c->dma_irq_handler.flags = 0; + c->dma_irq_handler.handler = bcm2835_dma_callback; + + ret = request_irq(c->dma_irq_number, + bcm2835_dma_callback, 0, "DMA IRQ", c); + if (ret < 0) + return ret; + + return 0; +} + +static void bcm2835_dma_free_chan_resources(struct dma_chan *chan) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + struct bcm2835_dmadev *d = to_bcm2835_dma_dev(chan->device); + + vchan_free_chan_resources(&c->vc); + d->chans_available |= (1 << c->dma_ch); + free_irq(c->dma_irq_number, c); + + dev_dbg(c->vc.chan.device->dev, "freeing channel for %u\n", c->dma_sig); +} + +static size_t bcm2835_dma_sg_size(struct bcm2835_sg *sg) +{ + return sg->en * sg->fn; +} + +static size_t bcm2835_dma_desc_size(struct bcm2835_desc *d) +{ + unsigned i; + size_t size; + + for (size = i = 0; i < d->sglen; i++) + size += bcm2835_dma_sg_size(&d->sg[i]); + + return size * d->es; +} + +static size_t bcm2835_dma_desc_size_pos(struct bcm2835_desc *d, dma_addr_t addr) +{ + unsigned i; + size_t size; + + for (size = i = 0; i < d->sglen; i++) { + size_t this_size = bcm2835_dma_sg_size(&d->sg[i]); + + if (size) + size += this_size; + else if (addr >= d->sg[i].addr && + addr < d->sg[i].addr + this_size) + size += d->sg[i].addr + this_size - addr; + } + return size; +} + + +/* + * Returns current physical source address for the given DMA channel. + * If the channel is running the caller must disable interrupts prior calling + * this function and process the returned value before re-enabling interrupt to + * prevent races with the interrupt handler. + */ +static dma_addr_t bcm2835_get_dma_src_pos(struct bcm2835_chan *c) +{ + return readl(c->dma_chan_base + BCM2835_DMA_SOURCE_AD); +} + +/* + * Returns current physical destination address for the given DMA channel. + * If the channel is running the caller must disable interrupts prior calling + * this function and process the returned value before re-enabling interrupt to + * prevent races with the interrupt handler. + */ +static dma_addr_t bcm2835_get_dma_dst_pos(struct bcm2835_chan *c) +{ + return readl(c->dma_chan_base + BCM2835_DMA_DEST_AD); +} + +static enum dma_status bcm2835_dma_tx_status(struct dma_chan *chan, + dma_cookie_t cookie, struct dma_tx_state *txstate) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + struct virt_dma_desc *vd; + enum dma_status ret; + unsigned long flags; + + ret = dma_cookie_status(chan, cookie, txstate); + if (ret == DMA_SUCCESS || !txstate) + return ret; + + spin_lock_irqsave(&c->vc.lock, flags); + vd = vchan_find_desc(&c->vc, cookie); + if (vd) { + txstate->residue = + bcm2835_dma_desc_size(to_bcm2835_dma_desc(&vd->tx)); + } else if (c->desc && c->desc->vd.tx.cookie == cookie) { + struct bcm2835_desc *d = c->desc; + dma_addr_t pos; + + if (d->dir == DMA_MEM_TO_DEV) + pos = bcm2835_get_dma_src_pos(c); + else if (d->dir == DMA_DEV_TO_MEM) + pos = bcm2835_get_dma_dst_pos(c); + else + pos = 0; + + txstate->residue = bcm2835_dma_desc_size_pos(d, pos); + } else { + txstate->residue = 0; + } + + spin_unlock_irqrestore(&c->vc.lock, flags); + + return ret; +} + +static void bcm2835_dma_issue_pending(struct dma_chan *chan) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + unsigned long flags; + + spin_lock_irqsave(&c->vc.lock, flags); + if (vchan_issue_pending(&c->vc) && !c->desc) { + struct bcm2835_dmadev *d = to_bcm2835_dma_dev(chan->device); + spin_lock(&d->lock); + if (list_empty(&c->node)) + list_add_tail(&c->node, &d->pending); + spin_unlock(&d->lock); + tasklet_schedule(&d->task); + } + spin_unlock_irqrestore(&c->vc.lock, flags); +} + + +static struct dma_async_tx_descriptor *bcm2835_dma_prep_dma_cyclic( + struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len, + size_t period_len, enum dma_transfer_direction direction, + unsigned long flags, void *context) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + enum dma_slave_buswidth dev_width; + struct bcm2835_desc *d; + dma_addr_t dev_addr; + unsigned int es, sync_type; + int frame; + int frames; + + /* Grab configuration */ + if (direction == DMA_DEV_TO_MEM) { + dev_addr = c->cfg.src_addr; + dev_width = c->cfg.src_addr_width; + sync_type = BCM2835_DMA_S_DREQ; + } else if (direction == DMA_MEM_TO_DEV) { + dev_addr = c->cfg.dst_addr; + dev_width = c->cfg.dst_addr_width; + sync_type = BCM2835_DMA_D_DREQ; + } else { + dev_err(chan->device->dev, "%s: bad direction?\n", __func__); + return NULL; + } + + /* Bus width translates to the element size (ES) */ + switch (dev_width) { + case DMA_SLAVE_BUSWIDTH_4_BYTES: + es = BCM2835_DMA_DATA_TYPE_S32; + break; + default: + return NULL; + } + + /* Now allocate and setup the descriptor. */ + d = kzalloc(sizeof(*d) + sizeof(d->sg[0]), GFP_ATOMIC); + if (!d) + return NULL; + + d->dir = direction; + d->dev_addr = dev_addr; + d->es = es; + d->sg[0].addr = buf_addr; + d->sg[0].en = period_len; + d->sg[0].fn = buf_len / period_len; + d->sglen = 1; + + /* Allocate memory for control blocks */ + d->control_block_size = d->sg[0].fn*sizeof(struct bcm2835_dma_cb); + d->control_block_base = dma_alloc_coherent(chan->device->dev, + d->control_block_size, &d->control_block_base_phys, + GFP_KERNEL); + + if (!d->control_block_base) { + dev_err(chan->device->dev, + "%s: Memory allocation error\n", __func__); + return NULL; + } + + memset(d->control_block_base, 0, d->control_block_size); + + /* + * Iterate over all frames, create a control block + * for each frame and link them together. + */ + frames = d->sg[0].fn; + + for (frame = 0; frame < frames; frame++) { + struct bcm2835_dma_cb *control_block = + &d->control_block_base[frame]; + + /* Setup adresses */ + if (d->dir == DMA_DEV_TO_MEM) { + control_block->info = BCM2835_DMA_D_INC; + control_block->src = d->dev_addr; + control_block->dst = d->sg[0].addr+frame*d->sg[0].en; + } else { + control_block->info = BCM2835_DMA_S_INC; + control_block->src = d->sg[0].addr+frame*d->sg[0].en; + control_block->dst = d->dev_addr; + } + + /* Enable interrupt */ + control_block->info |= BCM2835_DMA_INT_EN; + + /* Setup synchronization */ + if (sync_type != 0) + control_block->info |= sync_type; + + /* Setup DREQ channel */ + if (c->dreq != 0) + control_block->info |= + BCM2835_DMA_PER_MAP(c->dreq); + + /* Length of a frame */ + control_block->length = d->sg[0].en; + + /* + * Next block is the next frame. + * This DMA engine driver currently only supports cyclic DMA. + * Therefore, wrap around at number of frames. + */ + control_block->next = d->control_block_base_phys + + sizeof(struct bcm2835_dma_cb)*((frame+1)%(frames)); + + /* The following fields are not used here */ + control_block->stride = 0; + control_block->pad[0] = 0; + control_block->pad[1] = 0; + } + + c->cyclic = true; /* nothing else is implemented */ + + return vchan_tx_prep(&c->vc, &d->vd, flags); +} + +static int bcm2835_dma_slave_config(struct bcm2835_chan *c, + struct dma_slave_config *cfg) +{ + if ((cfg->direction == DMA_DEV_TO_MEM + && cfg->src_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES) || + (cfg->direction == DMA_MEM_TO_DEV + && cfg->dst_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES)) { + return -EINVAL; + } + + memcpy(&c->cfg, cfg, sizeof(c->cfg)); + + return 0; +} + +static int bcm2835_dma_terminate_all(struct bcm2835_chan *c) +{ + struct bcm2835_dmadev *d = to_bcm2835_dma_dev(c->vc.chan.device); + unsigned long flags; + LIST_HEAD(head); + + spin_lock_irqsave(&c->vc.lock, flags); + + /* Prevent this channel being scheduled */ + spin_lock(&d->lock); + list_del_init(&c->node); + spin_unlock(&d->lock); + + /* + * Stop DMA activity: we assume the callback will not be called + * after bcm_dma_abort() returns (even if it does, it will see + * c->desc is NULL and exit.) + */ + if (c->desc) { + c->desc = NULL; + bcm2835_dma_abort(c->dma_chan_base); + + /* Wait for stopping */ + while (readl(c->dma_chan_base + BCM2835_DMA_CS) + & BCM2835_DMA_ACTIVE) + ; + } + + vchan_get_all_descriptors(&c->vc, &head); + spin_unlock_irqrestore(&c->vc.lock, flags); + vchan_dma_desc_free_list(&c->vc, &head); + + return 0; +} + +static int bcm2835_dma_pause(struct bcm2835_chan *c) +{ + /* FIXME: not supported by platform private API */ + return -EINVAL; +} + +static int bcm2835_dma_resume(struct bcm2835_chan *c) +{ + /* FIXME: not supported by platform private API */ + return -EINVAL; +} + +static int bcm2835_dma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd, + unsigned long arg) +{ + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + int ret; + + switch (cmd) { + case DMA_SLAVE_CONFIG: + ret = bcm2835_dma_slave_config(c, + (struct dma_slave_config *)arg); + break; + + case DMA_TERMINATE_ALL: + ret = bcm2835_dma_terminate_all(c); + break; + + case DMA_PAUSE: + ret = bcm2835_dma_pause(c); + break; + + case DMA_RESUME: + ret = bcm2835_dma_resume(c); + break; + + default: + ret = -ENXIO; + break; + } + + return ret; +} + +static int bcm2835_dma_chan_init(struct bcm2835_dmadev *od, int dma_sig) +{ + struct bcm2835_chan *c; + + c = kzalloc(sizeof(*c), GFP_KERNEL); + if (!c) + return -ENOMEM; + + c->dma_sig = dma_sig; + c->vc.desc_free = bcm2835_dma_desc_free; + vchan_init(&c->vc, &od->ddev); + INIT_LIST_HEAD(&c->node); + + od->ddev.chancnt++; + + return 0; +} + +static void bcm2835_dma_free(struct bcm2835_dmadev *od) +{ + tasklet_kill(&od->task); + while (!list_empty(&od->ddev.channels)) { + struct bcm2835_chan *c = list_first_entry(&od->ddev.channels, + struct bcm2835_chan, vc.chan.device_node); + + list_del(&c->vc.chan.device_node); + tasklet_kill(&c->vc.task); + kfree(c); + } +} + +#if defined(CONFIG_OF) +static const struct of_device_id bcm2835_dma_of_match[] = { + { + .compatible = "brcm,bcm2835-dma", + } +}; +MODULE_DEVICE_TABLE(of, bcm2835_dma_of_match); +#endif + +static struct dma_chan *bcm2835_dma_xlate(struct of_phandle_args *dma_spec, + struct of_dma *ofdma) +{ + struct bcm2835_dmadev *d = ofdma->of_dma_data; + struct dma_chan *chan, *candidate; + +retry: + candidate = NULL; + + /* walk the list of channels registered with the current instance and + * find one that is currently unused */ + list_for_each_entry(chan, &d->ddev.channels, device_node) + if (chan->client_count == 0) { + candidate = chan; + break; + } + + if (!candidate) + return NULL; + + /* dma_get_slave_channel will return NULL if we lost a race between + * the lookup and the reservation */ + chan = dma_get_slave_channel(candidate); + + if (chan) { + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + + /* Set DREQ from param */ + c->dreq = dma_spec->args[0]; + + return chan; + } + + goto retry; +} + +static int bcm2835_dma_probe(struct platform_device *pdev) +{ + struct bcm2835_dmadev *od; + struct resource *dma_res = NULL; + void __iomem *dma_base = NULL; + int rc = 0; + int i; + struct resource *irq; + int irq_resources; + + od = devm_kzalloc(&pdev->dev, sizeof(*od), GFP_KERNEL); + if (!od) + return -ENOMEM; + + dma_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + dma_base = devm_ioremap_resource(&pdev->dev, dma_res); + if (IS_ERR(dma_base)) + return PTR_ERR(dma_base); + + od->dma_base = dma_base; + + dma_cap_set(DMA_SLAVE, od->ddev.cap_mask); + dma_cap_set(DMA_CYCLIC, od->ddev.cap_mask); + od->ddev.device_alloc_chan_resources = bcm2835_dma_alloc_chan_resources; + od->ddev.device_free_chan_resources = bcm2835_dma_free_chan_resources; + od->ddev.device_tx_status = bcm2835_dma_tx_status; + od->ddev.device_issue_pending = bcm2835_dma_issue_pending; + od->ddev.device_prep_dma_cyclic = bcm2835_dma_prep_dma_cyclic; + od->ddev.device_control = bcm2835_dma_control; + od->ddev.dev = &pdev->dev; + INIT_LIST_HEAD(&od->ddev.channels); + INIT_LIST_HEAD(&od->pending); + spin_lock_init(&od->lock); + + tasklet_init(&od->task, bcm2835_dma_sched, (unsigned long)od); + + irq_resources = 0; + + for (i = 0; i < pdev->num_resources; i++) { + if (IORESOURCE_IRQ == resource_type(&pdev->resource[i])) + irq_resources++; + } + + od->dma_irq_numbers = devm_kzalloc(&pdev->dev, + irq_resources*sizeof(int), GFP_KERNEL); + if (!od) + return -ENOMEM; + + for (i = 0; i < irq_resources; i++) { + rc = bcm2835_dma_chan_init(od, i); + if (rc) { + bcm2835_dma_free(od); + return rc; + } + + irq = platform_get_resource(pdev, IORESOURCE_IRQ, i); + if (!irq) { + dev_err(&pdev->dev, + "No IRQ resource for channel %i\n", i); + return -ENODEV; + } + od->dma_irq_numbers[i] = irq->start; + } + + rc = dma_async_device_register(&od->ddev); + if (rc) { + dev_err(&pdev->dev, + "Failed to register slave DMA engine device: %d\n", rc); + bcm2835_dma_free(od); + return rc; + } + + platform_set_drvdata(pdev, od); + + if (pdev->dev.of_node) { + const void *chan_mask; + + /* Device-tree DMA controller registration */ + rc = of_dma_controller_register(pdev->dev.of_node, + bcm2835_dma_xlate, od); + if (rc) { + dev_err(&pdev->dev, "Failed to register DMA controller\n"); + dma_async_device_unregister(&od->ddev); + bcm2835_dma_free(od); + return rc; + } + + /* Request DMA channel mask from device tree */ + chan_mask = of_get_property(pdev->dev.of_node, + "dma-channel-mask", NULL); + + if (!chan_mask) { + dev_err(&pdev->dev, "Failed to get channel mask\n"); + dma_async_device_unregister(&od->ddev); + bcm2835_dma_free(od); + return -EINVAL; + } + + od->chans_available = be32_to_cpup(chan_mask); + } + + dev_dbg(&pdev->dev, "Load BCM2835 DMA engine driver\n"); + + return rc; +} + +static int bcm2835_dma_remove(struct platform_device *pdev) +{ + struct bcm2835_dmadev *od = platform_get_drvdata(pdev); + + dma_async_device_unregister(&od->ddev); + bcm2835_dma_free(od); + + return 0; +} + +static struct platform_driver bcm2835_dma_driver = { + .probe = bcm2835_dma_probe, + .remove = bcm2835_dma_remove, + .driver = { + .name = "bcm2835-dma", + .owner = THIS_MODULE, + .of_match_table = of_match_ptr(bcm2835_dma_of_match), + }, +}; + +static const struct platform_device_info bcm2835_dma_dev_info = { + .name = "bcm2835-dma", + .id = -1, + .dma_mask = DMA_BIT_MASK(32), +}; + +static int bcm2835_dma_init(void) +{ + int rc = platform_driver_register(&bcm2835_dma_driver); + return rc; +} +subsys_initcall(bcm2835_dma_init); + +static void __exit bcm2835_dma_exit(void) +{ + platform_driver_unregister(&bcm2835_dma_driver); +} +module_exit(bcm2835_dma_exit); + +MODULE_AUTHOR("Florian Meier"); +MODULE_DESCRIPTION("BCM2835 DMA engine driver"); +MODULE_LICENSE("GPL"); + -- 1.7.9.5

3 2

[alsa-devel] [PATCH 0/3] Random set of small HDA HDMI fixes
by Anssi Hannula 11 Nov '13

11 Nov '13

Hi, Here's some random small fixes to the HDA HDMI code. First affects both generic and ATI/AMD codecs and the last two concern ATI/AMD only. At least 2 and 3 should go to 3.13. No idea what caused the codec reads to fail in the first place regarding the first patch... This was reported at: http://forum.xbmc.org/showthread.php?tid=174854&pid=1546159#pid1546159 sound/pci/hda/hda_eld.c | 30 ++++++++++++++++++++++++------ sound/pci/hda/patch_hdmi.c | 5 ++++- 2 files changed, 28 insertions(+), 7 deletions(-) Anssi Hannula (3): ALSA: hda - hdmi: Add error-checking to some codec reads ALSA: hda - hdmi: Skip out-of-range latency values in AMD ELD generator ALSA: hda - hdmi: Fix wrong baseline length in ATI/AMD generated ELD -- Anssi Hannula

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