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[alsa-devel] [PATCH 1/2] ASoC: rt5640: Add function for enabling DMIC from ACPI probed machine
by Jarkko Nikula 01 Oct '14
by Jarkko Nikula 01 Oct '14
01 Oct '14
There is no code enabling DMIC clock in systems that don't provide platform
data for rt5640 after commit 71d97a794301 ("ASoC: rt5640: Use the platform
data for DMIC settings").
I think it's worth to keep this static DMIC clock and alternative data pin
setting during probe time. For making possible to use DMIC from ACPI probed
machine (prior ACPI 5.1 with _DSD) this patch moves DMIC configuration to
new exported rt5640_dmic_enable() that machine drivers can call.
Please note, this patch moves DMIC configuration from i2c probe to codec
probe in case platform data for rt5640 is set.
Signed-off-by: Jarkko Nikula <jarkko.nikula(a)linux.intel.com>
Cc: Oder Chiou <oder_chiou(a)realtek.com>
---
for-next. I don't think there is regression caused by 71d97a794301 for the
byt-rt5640 machines. Theoretically yes for internal development platform
(which is don't care) but also byt-rt5640 got DMI quirks support for machine
specific routes only recently (i.e. machine without quirk was never working
completely).
---
sound/soc/codecs/rt5640.c | 49 +++++++++++++++++++++++++++++------------------
sound/soc/codecs/rt5640.h | 3 +++
2 files changed, 33 insertions(+), 19 deletions(-)
diff --git a/sound/soc/codecs/rt5640.c b/sound/soc/codecs/rt5640.c
index f1ec6e6bd08a..c3f2decd643c 100644
--- a/sound/soc/codecs/rt5640.c
+++ b/sound/soc/codecs/rt5640.c
@@ -1906,6 +1906,32 @@ static int rt5640_set_bias_level(struct snd_soc_codec *codec,
return 0;
}
+int rt5640_dmic_enable(struct snd_soc_codec *codec,
+ bool dmic1_data_pin, bool dmic2_data_pin)
+{
+ struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
+
+ regmap_update_bits(rt5640->regmap, RT5640_GPIO_CTRL1,
+ RT5640_GP2_PIN_MASK, RT5640_GP2_PIN_DMIC1_SCL);
+
+ if (dmic1_data_pin) {
+ regmap_update_bits(rt5640->regmap, RT5640_DMIC,
+ RT5640_DMIC_1_DP_MASK, RT5640_DMIC_1_DP_GPIO3);
+ regmap_update_bits(rt5640->regmap, RT5640_GPIO_CTRL1,
+ RT5640_GP3_PIN_MASK, RT5640_GP3_PIN_DMIC1_SDA);
+ }
+
+ if (dmic2_data_pin) {
+ regmap_update_bits(rt5640->regmap, RT5640_DMIC,
+ RT5640_DMIC_2_DP_MASK, RT5640_DMIC_2_DP_GPIO4);
+ regmap_update_bits(rt5640->regmap, RT5640_GPIO_CTRL1,
+ RT5640_GP4_PIN_MASK, RT5640_GP4_PIN_DMIC2_SDA);
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(rt5640_dmic_enable);
+
static int rt5640_probe(struct snd_soc_codec *codec)
{
struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
@@ -1945,6 +1971,10 @@ static int rt5640_probe(struct snd_soc_codec *codec)
return -ENODEV;
}
+ if (rt5640->pdata.dmic_en)
+ rt5640_dmic_enable(codec, rt5640->pdata.dmic1_data_pin,
+ rt5640->pdata.dmic2_data_pin);
+
return 0;
}
@@ -2195,25 +2225,6 @@ static int rt5640_i2c_probe(struct i2c_client *i2c,
regmap_update_bits(rt5640->regmap, RT5640_IN3_IN4,
RT5640_IN_DF2, RT5640_IN_DF2);
- if (rt5640->pdata.dmic_en) {
- regmap_update_bits(rt5640->regmap, RT5640_GPIO_CTRL1,
- RT5640_GP2_PIN_MASK, RT5640_GP2_PIN_DMIC1_SCL);
-
- if (rt5640->pdata.dmic1_data_pin) {
- regmap_update_bits(rt5640->regmap, RT5640_DMIC,
- RT5640_DMIC_1_DP_MASK, RT5640_DMIC_1_DP_GPIO3);
- regmap_update_bits(rt5640->regmap, RT5640_GPIO_CTRL1,
- RT5640_GP3_PIN_MASK, RT5640_GP3_PIN_DMIC1_SDA);
- }
-
- if (rt5640->pdata.dmic2_data_pin) {
- regmap_update_bits(rt5640->regmap, RT5640_DMIC,
- RT5640_DMIC_2_DP_MASK, RT5640_DMIC_2_DP_GPIO4);
- regmap_update_bits(rt5640->regmap, RT5640_GPIO_CTRL1,
- RT5640_GP4_PIN_MASK, RT5640_GP4_PIN_DMIC2_SDA);
- }
- }
-
rt5640->hp_mute = 1;
return snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5640,
diff --git a/sound/soc/codecs/rt5640.h b/sound/soc/codecs/rt5640.h
index 58ebe96b86da..3deb8babeabb 100644
--- a/sound/soc/codecs/rt5640.h
+++ b/sound/soc/codecs/rt5640.h
@@ -2097,4 +2097,7 @@ struct rt5640_priv {
bool hp_mute;
};
+int rt5640_dmic_enable(struct snd_soc_codec *codec,
+ bool dmic1_data_pin, bool dmic2_data_pin);
+
#endif
--
2.1.0
2
2

01 Oct '14
On Wed, Oct 01, 2014 at 05:17:44PM +0530, Pramod Gurav wrote:
> On Wednesday 01 October 2014 05:08 PM, Mark Brown wrote:
> > Applied, I'm assuming that the API change is going to be introduced in a
> > future kernel version since obviously it'll break the build otherwise.
> Mark please revert the changes as these are already present in
> linux-next master. I realized it late. Sorry for trouble.
Done.
1
0

01 Oct '14
On Wed, Oct 01, 2014 at 11:17:46AM +0530, Pramod Gurav wrote:
> Get rid of using return value from gpiochip_remove() as it returns
> void with a new change in kernel.
Applied, I'm assuming that the API change is going to be introduced in a
future kernel version since obviously it'll break the build otherwise.
1
0
Raymond Yau wrote:
>It affect your measurent if you are using the mic on your usb audio if the
>automatic gain control is switch on
Automatic gain control is now switched off.
>Background noise affect the result if you are not using line in and line
>out with a loopback cable
I am using loopback, noise should not be an issue.
>How many steps need to reduce amplitude of the recorded sine wave by
>half when you play a sine wav through your usb audio and record it back
>using audacity?
Using recorded sine wav provided by 'speaker-test -t sin'
amplitude of recorded sine wave reduced by half at step 77
output of 'amixer -c 2 set Headphone 77':
Simple mixer control 'Headphone',0
Capabilities: pvolume pswitch pswitch-joined
Playback channels: Front Left - Front Right
Limits: Playback 0 - 151
Mono:
Front Left: Playback 77 [51%] [-13.94dB] [on]
Front Right: Playback 77 [51%] [-13.94dB] [on]
>You many need to change the name of the volume control to headphone
>playback volume in alsamixertest
Done. alsamixertest output: http://ix.io/ezd
2
1

Re: [alsa-devel] [PATCH] ASoC:kirkwood: Don't raise an error when no DAI format
by Russell King - ARM Linux 01 Oct '14
by Russell King - ARM Linux 01 Oct '14
01 Oct '14
On Sun, Sep 28, 2014 at 04:19:27PM +0200, Jean-Francois Moine wrote:
> The two DAIs of the kirkwood controller have a unique PCM format.
>
> The simple-card sets the audio hardware definitions of all CPU DAIs.
> The PCM format is defined only when it is present in the DT.
>
> This patch prevents the controller to raise an error when
> the DT audio card definition by the simple card contains the PCM
> format of one CPU DAI only.
I think this is a silly idea - why should every driver have additional code
to detect when it's called to do thing. Why doesn't the simple card code
always pass the required format?
Looking at other drivers, no one else does this; they all appear to require
the proper format to be specified.
What some drivers do (eg, omap-mcbsp.c) is to block set_fmt when the
DAI is already in use - setting a flag "configured" in hw_params, and
clearing it in shutdown. Maybe following this will solve your problem.
In any case, random drivers doing stuff differently without reason is
really not a good idea.
--
FTTC broadband for 0.8mile line: currently at 9.5Mbps down 400kbps up
according to speedtest.net.
3
3
The following changes since commit 7d1311b93e58ed55f3a31cc8f94c4b8fe988a2b9:
Linux 3.17-rc1 (2014-08-16 10:40:26 -0600)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git tags/asoc-v3.17-rc7
for you to fetch changes up to fe2a08b3bf1a6e35c00e18843bc19aa1778432c3:
ASoC: ssm2602: do not hardcode type to SSM2602 (2014-09-30 13:27:19 +0100)
----------------------------------------------------------------
ASoC: Fix SSM2602 device identification
Another fix for v3.17, fixing device identification after the split out
of the I2C and SPI code.
----------------------------------------------------------------
Stefan Kristiansson (1):
ASoC: ssm2602: do not hardcode type to SSM2602
sound/soc/codecs/ssm2602.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
2
1

30 Sep '14
Hi,
While investigating some interesting debug output from PulseAudio, I
tried to figure out the cause.
From what I can tell, my Radeon seems to ask for new samples at a very
high rate, which I estimate to be around 280 kHz. My radeon card has
DVI, HDMI and VGA connectors, and the only thing connected is my screen
over DVI.
I'm currently running the 3.13 kernel with updated hda directory from
Takashi's tree, but I think it's been this way for a long time.
Note that if a screen is connected to the HDMI card, the problem
disappears and sample rates are normal.
In short, do you think this is a driver bug, or just something we have
to live with as some sort of hw anomaly?
Since nothing is connected, it does not really hurt, except PulseAudio
gets confused (in a way that could potentially cause problems for
low-latency output, should something be connected later on).
For reference, here's lspci of the HDMI card:
01:00.0 VGA compatible controller [0300]: Advanced Micro Devices, Inc.
[AMD/ATI] RV710 [Radeon HD 4550] [1002:9540] (prog-if 00 [VGA controller])
Subsystem: PC Partner Limited / Sapphire Technology Device [174b:e106]
01:00.1 Audio device [0403]: Advanced Micro Devices, Inc. [AMD/ATI]
RV710/730 HDMI Audio [Radeon HD 4000 series] [1002:aa38]
Subsystem: PC Partner Limited / Sapphire Technology Device [174b:aa38]
--
David Henningsson, Canonical Ltd.
https://launchpad.net/~diwic
5
24

[alsa-devel] [PATCH v3 1/2] ASoC: fsl_ssi: Remove unneeded 'i2s-slave' property
by Fabio Estevam 30 Sep '14
by Fabio Estevam 30 Sep '14
30 Sep '14
From: Fabio Estevam <fabio.estevam(a)freescale.com>
There is no need to use 'i2s-slave' property, since master/slave configuration
are passed via machine layer.
This change does not break existing users because they do check for slave
mode inside sound/soc/fsl/mpc8610_hpcd.c/p1022_ds.c/p1022_rdk.c
Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com>
Acked-by: Timur Tabi <timur(a)tabi.org>
---
Changes since v2:
- Added Timur's Ack and CC the alsa-list
Changes since v1:
- None
sound/soc/fsl/fsl_ssi.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index 2fc3e66..0e7ce50 100644
--- a/sound/soc/fsl/fsl_ssi.c
+++ b/sound/soc/fsl/fsl_ssi.c
@@ -1285,9 +1285,6 @@ static int fsl_ssi_probe(struct platform_device *pdev)
if (sprop) {
if (!strcmp(sprop, "ac97-slave"))
ssi_private->dai_fmt = SND_SOC_DAIFMT_AC97;
- else if (!strcmp(sprop, "i2s-slave"))
- ssi_private->dai_fmt = SND_SOC_DAIFMT_I2S |
- SND_SOC_DAIFMT_CBM_CFM;
}
ssi_private->use_dma = !of_property_read_bool(np,
--
1.9.1
2
2

[alsa-devel] [PATCH v2 1/3] ASoC: ssm2602: do not hardcode type to SSM2602
by Stefan Kristiansson 30 Sep '14
by Stefan Kristiansson 30 Sep '14
30 Sep '14
The correct type (SSM2602/SSM2603/SSM2604) is passed down
from the ssm2602_spi_probe()/ssm2602_spi_probe() functions,
so use that instead of hardcoding it to SSM2602 in
ssm2602_probe().
Signed-off-by: Stefan Kristiansson <stefan.kristiansson(a)saunalahti.fi>
---
Changes in v2:
- None, new in series.
---
sound/soc/codecs/ssm2602.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sound/soc/codecs/ssm2602.c b/sound/soc/codecs/ssm2602.c
index 484b3bb..4021cd4 100644
--- a/sound/soc/codecs/ssm2602.c
+++ b/sound/soc/codecs/ssm2602.c
@@ -647,7 +647,7 @@ int ssm2602_probe(struct device *dev, enum ssm2602_type type,
return -ENOMEM;
dev_set_drvdata(dev, ssm2602);
- ssm2602->type = SSM2602;
+ ssm2602->type = type;
ssm2602->regmap = regmap;
return snd_soc_register_codec(dev, &soc_codec_dev_ssm2602,
--
1.9.1
3
2

[alsa-devel] [PATCH v5 1/6] ALSA: ctxfi: changed void * to struct hw *
by Sudip Mukherjee 30 Sep '14
by Sudip Mukherjee 30 Sep '14
30 Sep '14
in the code we have void *hw and while using we are always typecasting
it to (struct hw *). it is better to use void type of pointer when we
store different types of pointer , but in this code we are only having
struct hw.
So changed all the relevant reference of void *hw to struct hw *hw,
without any modification of the existing code logic.
the next patch of the series will remove the typecasting which is
not required now.
Signed-off-by: Sudip Mukherjee <sudip(a)vectorindia.org>
---
sound/pci/ctxfi/ctamixer.c | 4 ++--
sound/pci/ctxfi/ctamixer.h | 4 ++--
sound/pci/ctxfi/ctatc.c | 4 ++--
sound/pci/ctxfi/ctatc.h | 2 +-
sound/pci/ctxfi/ctdaio.c | 4 ++--
sound/pci/ctxfi/ctdaio.h | 6 +++---
sound/pci/ctxfi/ctresource.c | 5 +++--
sound/pci/ctxfi/ctresource.h | 9 +++++----
sound/pci/ctxfi/ctsrc.c | 4 ++--
sound/pci/ctxfi/ctsrc.h | 4 ++--
10 files changed, 24 insertions(+), 22 deletions(-)
diff --git a/sound/pci/ctxfi/ctamixer.c b/sound/pci/ctxfi/ctamixer.c
index fed6e6a..4671cbe7 100644
--- a/sound/pci/ctxfi/ctamixer.c
+++ b/sound/pci/ctxfi/ctamixer.c
@@ -296,7 +296,7 @@ static int put_amixer_rsc(struct amixer_mgr *mgr, struct amixer *amixer)
return 0;
}
-int amixer_mgr_create(void *hw, struct amixer_mgr **ramixer_mgr)
+int amixer_mgr_create(struct hw *hw, struct amixer_mgr **ramixer_mgr)
{
int err;
struct amixer_mgr *amixer_mgr;
@@ -449,7 +449,7 @@ static int put_sum_rsc(struct sum_mgr *mgr, struct sum *sum)
return 0;
}
-int sum_mgr_create(void *hw, struct sum_mgr **rsum_mgr)
+int sum_mgr_create(struct hw *hw, struct sum_mgr **rsum_mgr)
{
int err;
struct sum_mgr *sum_mgr;
diff --git a/sound/pci/ctxfi/ctamixer.h b/sound/pci/ctxfi/ctamixer.h
index cc49e5a..6fa5eff 100644
--- a/sound/pci/ctxfi/ctamixer.h
+++ b/sound/pci/ctxfi/ctamixer.h
@@ -45,7 +45,7 @@ struct sum_mgr {
};
/* Constructor and destructor of daio resource manager */
-int sum_mgr_create(void *hw, struct sum_mgr **rsum_mgr);
+int sum_mgr_create(struct hw *hw, struct sum_mgr **rsum_mgr);
int sum_mgr_destroy(struct sum_mgr *sum_mgr);
/* Define the descriptor of a amixer resource */
@@ -90,7 +90,7 @@ struct amixer_mgr {
};
/* Constructor and destructor of amixer resource manager */
-int amixer_mgr_create(void *hw, struct amixer_mgr **ramixer_mgr);
+int amixer_mgr_create(struct hw *hw, struct amixer_mgr **ramixer_mgr);
int amixer_mgr_destroy(struct amixer_mgr *amixer_mgr);
#endif /* CTAMIXER_H */
diff --git a/sound/pci/ctxfi/ctatc.c b/sound/pci/ctxfi/ctatc.c
index d92a08c..04e54cc 100644
--- a/sound/pci/ctxfi/ctatc.c
+++ b/sound/pci/ctxfi/ctatc.c
@@ -106,11 +106,11 @@ static struct {
.public_name = "Mixer"}
};
-typedef int (*create_t)(void *, void **);
+typedef int (*create_t)(struct hw *, void **);
typedef int (*destroy_t)(void *);
static struct {
- int (*create)(void *hw, void **rmgr);
+ int (*create)(struct hw *hw, void **rmgr);
int (*destroy)(void *mgr);
} rsc_mgr_funcs[NUM_RSCTYP] = {
[SRC] = { .create = (create_t)src_mgr_create,
diff --git a/sound/pci/ctxfi/ctatc.h b/sound/pci/ctxfi/ctatc.h
index 5f11ca2..5641334 100644
--- a/sound/pci/ctxfi/ctatc.h
+++ b/sound/pci/ctxfi/ctatc.h
@@ -131,7 +131,7 @@ struct ct_atc {
/* Don't touch! Used for internal object. */
void *rsc_mgrs[NUM_RSCTYP]; /* chip resource managers */
void *mixer; /* internal mixer object */
- void *hw; /* chip specific hardware access object */
+ struct hw *hw; /* chip specific hardware access object */
void **daios; /* digital audio io resources */
void **pcm; /* SUMs for collecting all pcm stream */
void **srcs; /* Sample Rate Converters for input signal */
diff --git a/sound/pci/ctxfi/ctdaio.c b/sound/pci/ctxfi/ctdaio.c
index 6f0654e..7541641 100644
--- a/sound/pci/ctxfi/ctdaio.c
+++ b/sound/pci/ctxfi/ctdaio.c
@@ -331,7 +331,7 @@ static struct dai_rsc_ops dai_ops = {
static int daio_rsc_init(struct daio *daio,
const struct daio_desc *desc,
- void *hw)
+ struct hw *hw)
{
int err;
unsigned int idx_l, idx_r;
@@ -692,7 +692,7 @@ static int daio_mgr_commit_write(struct daio_mgr *mgr)
return 0;
}
-int daio_mgr_create(void *hw, struct daio_mgr **rdaio_mgr)
+int daio_mgr_create(struct hw *hw, struct daio_mgr **rdaio_mgr)
{
int err, i;
struct daio_mgr *daio_mgr;
diff --git a/sound/pci/ctxfi/ctdaio.h b/sound/pci/ctxfi/ctdaio.h
index 85ccb6e..e4817de 100644
--- a/sound/pci/ctxfi/ctdaio.h
+++ b/sound/pci/ctxfi/ctdaio.h
@@ -53,14 +53,14 @@ struct dao {
struct dao_rsc_ops *ops; /* DAO specific operations */
struct imapper **imappers;
struct daio_mgr *mgr;
- void *hw;
+ struct hw *hw;
void *ctrl_blk;
};
struct dai {
struct daio daio;
struct dai_rsc_ops *ops; /* DAI specific operations */
- void *hw;
+ struct hw *hw;
void *ctrl_blk;
};
@@ -117,7 +117,7 @@ struct daio_mgr {
};
/* Constructor and destructor of daio resource manager */
-int daio_mgr_create(void *hw, struct daio_mgr **rdaio_mgr);
+int daio_mgr_create(struct hw *hw, struct daio_mgr **rdaio_mgr);
int daio_mgr_destroy(struct daio_mgr *daio_mgr);
#endif /* CTDAIO_H */
diff --git a/sound/pci/ctxfi/ctresource.c b/sound/pci/ctxfi/ctresource.c
index e49d2be..f14cbea 100644
--- a/sound/pci/ctxfi/ctresource.c
+++ b/sound/pci/ctxfi/ctresource.c
@@ -134,7 +134,8 @@ static struct rsc_ops rsc_generic_ops = {
.next_conj = rsc_next_conj,
};
-int rsc_init(struct rsc *rsc, u32 idx, enum RSCTYP type, u32 msr, void *hw)
+int
+rsc_init(struct rsc *rsc, u32 idx, enum RSCTYP type, u32 msr, struct hw *hw)
{
int err = 0;
@@ -206,7 +207,7 @@ int rsc_uninit(struct rsc *rsc)
}
int rsc_mgr_init(struct rsc_mgr *mgr, enum RSCTYP type,
- unsigned int amount, void *hw_obj)
+ unsigned int amount, struct hw *hw_obj)
{
int err = 0;
struct hw *hw = hw_obj;
diff --git a/sound/pci/ctxfi/ctresource.h b/sound/pci/ctxfi/ctresource.h
index 0838c2e..9b746c3 100644
--- a/sound/pci/ctxfi/ctresource.h
+++ b/sound/pci/ctxfi/ctresource.h
@@ -38,7 +38,7 @@ struct rsc {
u32 conj:12; /* Current conjugate index */
u32 msr:4; /* The Master Sample Rate a resource working on */
void *ctrl_blk; /* Chip specific control info block for a resource */
- void *hw; /* Chip specific object for hardware access means */
+ struct hw *hw; /* Chip specific object for hardware access means */
struct rsc_ops *ops; /* Generic resource operations */
};
@@ -50,7 +50,8 @@ struct rsc_ops {
int (*output_slot)(const struct rsc *rsc);
};
-int rsc_init(struct rsc *rsc, u32 idx, enum RSCTYP type, u32 msr, void *hw);
+int
+rsc_init(struct rsc *rsc, u32 idx, enum RSCTYP type, u32 msr, struct hw *hw);
int rsc_uninit(struct rsc *rsc);
struct rsc_mgr {
@@ -59,12 +60,12 @@ struct rsc_mgr {
unsigned int avail; /* The amount of currently available resources */
unsigned char *rscs; /* The bit-map for resource allocation */
void *ctrl_blk; /* Chip specific control info block */
- void *hw; /* Chip specific object for hardware access */
+ struct hw *hw; /* Chip specific object for hardware access */
};
/* Resource management is based on bit-map mechanism */
int rsc_mgr_init(struct rsc_mgr *mgr, enum RSCTYP type,
- unsigned int amount, void *hw);
+ unsigned int amount, struct hw *hw);
int rsc_mgr_uninit(struct rsc_mgr *mgr);
int mgr_get_resource(struct rsc_mgr *mgr, unsigned int n, unsigned int *ridx);
int mgr_put_resource(struct rsc_mgr *mgr, unsigned int n, unsigned int idx);
diff --git a/sound/pci/ctxfi/ctsrc.c b/sound/pci/ctxfi/ctsrc.c
index 19df9b4..342008f 100644
--- a/sound/pci/ctxfi/ctsrc.c
+++ b/sound/pci/ctxfi/ctsrc.c
@@ -543,7 +543,7 @@ static int src_mgr_commit_write(struct src_mgr *mgr)
return 0;
}
-int src_mgr_create(void *hw, struct src_mgr **rsrc_mgr)
+int src_mgr_create(struct hw *hw, struct src_mgr **rsrc_mgr)
{
int err, i;
struct src_mgr *src_mgr;
@@ -825,7 +825,7 @@ static int srcimp_imap_delete(struct srcimp_mgr *mgr, struct imapper *entry)
return err;
}
-int srcimp_mgr_create(void *hw, struct srcimp_mgr **rsrcimp_mgr)
+int srcimp_mgr_create(struct hw *hw, struct srcimp_mgr **rsrcimp_mgr)
{
int err;
struct srcimp_mgr *srcimp_mgr;
diff --git a/sound/pci/ctxfi/ctsrc.h b/sound/pci/ctxfi/ctsrc.h
index 259366a..6d95afb 100644
--- a/sound/pci/ctxfi/ctsrc.h
+++ b/sound/pci/ctxfi/ctsrc.h
@@ -140,10 +140,10 @@ struct srcimp_mgr {
};
/* Constructor and destructor of SRC resource manager */
-int src_mgr_create(void *hw, struct src_mgr **rsrc_mgr);
+int src_mgr_create(struct hw *hw, struct src_mgr **rsrc_mgr);
int src_mgr_destroy(struct src_mgr *src_mgr);
/* Constructor and destructor of SRCIMP resource manager */
-int srcimp_mgr_create(void *hw, struct srcimp_mgr **rsrc_mgr);
+int srcimp_mgr_create(struct hw *hw, struct srcimp_mgr **rsrc_mgr);
int srcimp_mgr_destroy(struct srcimp_mgr *srcimp_mgr);
#endif /* CTSRC_H */
--
1.8.1.2
2
6
The following changes since commit 0f33be009b89d2268e94194dc4fd01a7851b6d51:
Linux 3.17-rc6 (2014-09-21 15:43:02 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git tags/asoc-v3.17-rc6
for you to fetch changes up to 82b925c405444b760e743b55a9ad498cb3551afe:
Merge remote-tracking branches 'asoc/fix/atmel', 'asoc/fix/compress', 'asoc/fix/core', 'asoc/fix/fsl-ssi' and 'asoc/fix/rt286' into asoc-linus (2014-09-28 12:25:12 +0100)
----------------------------------------------------------------
ASoC: Fixes for v3.17
A few small driver specific fixes and a couple of error handling fixes
in the core.
----------------------------------------------------------------
Bard Liao (2):
ASoC: rt286: Correct default value
ASoC: rt286: Fix sync function
Bo Shen (1):
MAINTAINERS: add atmel audio alsa driver maintainer entry
Mark Brown (1):
Merge remote-tracking branches 'asoc/fix/atmel', 'asoc/fix/compress', 'asoc/fix/core', 'asoc/fix/fsl-ssi' and 'asoc/fix/rt286' into asoc-linus
Michael Trimarchi (1):
ASoC: fsl_ssi: fix kernel panic in probe function
Qiao Zhou (1):
ASoC: soc-compress: fix double unlock of fe card mutex
Xiubo Li (1):
ASoC: core: fix possible ZERO_SIZE_PTR pointer dereferencing error.
MAINTAINERS | 6 ++++++
sound/soc/codecs/rt286.c | 7 +++----
sound/soc/fsl/fsl_ssi.c | 12 +++++++-----
sound/soc/soc-compress.c | 6 ++----
sound/soc/soc-core.c | 2 +-
5 files changed, 19 insertions(+), 14 deletions(-)
2
1
Raymond Yau wrote:
>Do the automatic gain has any side effect when it normalise the volume?
I am unsure of how to go about testing that, 'alsamixer' does not appear
to allow me to modify automatic gain.
>Do you mean the sound card does not has 7248 steps?
I am not familiar with how to properly check, however dbverify indicates
'Element volume range is 0..151 (-28.37..-0.06 dB).'
Instructions for dbmeasure on the wiki indicates the need for a Line In,
the sound card only provides Line Out and Mic In. Will it automatically
make use of 'Mic In' if 'Line In' is absent? Or do I even need to use it?
>You need to find out the value of c->res
>As you complain dB range -28.37 to -0.06 are not correct
Quick testing done with dbverify: http://ix.io/eyi
>You need to calibrate the dB range
Volume Steps <=3 are mute while volume step 4 is audible,
based on dbverify testing. This 'seems' to indicate that the
minimum volume is somewhere between -27.81 dB to -27.63 dB?
Additional info logs:
Output of 'amixer -c2 contents': http://ix.io/eyq
Alsa info script output: http://ix.io/eyn
2
1
Add support for ES938 3-D Audio Effects Processor found on some ES18xx
(and possibly other) sound cards, doing bass/treble and 3D control.
ES938 is controlled by MIDI SysEx commands sent through card's MPU401 port.
The code opens/closes the MIDI device everytime a mixer control value is
changed so userspace apps can still use the MIDI port. Changing the mixer
controls will fail when the MIDI port is open by an application.
Signed-off-by: Ondrej Zary <linux(a)rainbow-software.org>
---
Changes in v2:
- debug message when ES938 detected
- reworked sysex messages to use structs
- ktime instead of jiffies for timeout
---
sound/isa/Kconfig | 4 +
sound/isa/Makefile | 2 +
sound/isa/es18xx.c | 13 +++-
sound/isa/es938.c | 215 ++++++++++++++++++++++++++++++++++++++++++++++++++++
sound/isa/es938.h | 48 ++++++++++++
5 files changed, 281 insertions(+), 1 deletion(-)
create mode 100644 sound/isa/es938.c
create mode 100644 sound/isa/es938.h
diff --git a/sound/isa/Kconfig b/sound/isa/Kconfig
index 0216475..db0b678 100644
--- a/sound/isa/Kconfig
+++ b/sound/isa/Kconfig
@@ -17,6 +17,9 @@ config SND_SB16_DSP
select SND_PCM
select SND_SB_COMMON
+config SND_ES938
+ tristate
+
menuconfig SND_ISA
bool "ISA sound devices"
depends on ISA && ISA_DMA_API
@@ -183,6 +186,7 @@ config SND_ES18XX
select SND_OPL3_LIB
select SND_MPU401_UART
select SND_PCM
+ select SND_ES938
help
Say Y here to include support for ESS AudioDrive ES18xx chips.
diff --git a/sound/isa/Makefile b/sound/isa/Makefile
index 9a15f14..d59e0bf 100644
--- a/sound/isa/Makefile
+++ b/sound/isa/Makefile
@@ -8,6 +8,7 @@ snd-als100-objs := als100.o
snd-azt2320-objs := azt2320.o
snd-cmi8328-objs := cmi8328.o
snd-cmi8330-objs := cmi8330.o
+snd-es938-objs := es938.o
snd-es18xx-objs := es18xx.o
snd-opl3sa2-objs := opl3sa2.o
snd-sc6000-objs := sc6000.o
@@ -19,6 +20,7 @@ obj-$(CONFIG_SND_ALS100) += snd-als100.o
obj-$(CONFIG_SND_AZT2320) += snd-azt2320.o
obj-$(CONFIG_SND_CMI8328) += snd-cmi8328.o
obj-$(CONFIG_SND_CMI8330) += snd-cmi8330.o
+obj-$(CONFIG_SND_ES938) += snd-es938.o
obj-$(CONFIG_SND_ES18XX) += snd-es18xx.o
obj-$(CONFIG_SND_OPL3SA2) += snd-opl3sa2.o
obj-$(CONFIG_SND_SC6000) += snd-sc6000.o
diff --git a/sound/isa/es18xx.c b/sound/isa/es18xx.c
index 6faaac6..e174e8c 100644
--- a/sound/isa/es18xx.c
+++ b/sound/isa/es18xx.c
@@ -96,6 +96,7 @@
#define SNDRV_LEGACY_FIND_FREE_IRQ
#define SNDRV_LEGACY_FIND_FREE_DMA
#include <sound/initval.h>
+#include "es938.h"
#define PFX "es18xx: "
@@ -122,6 +123,7 @@ struct snd_es18xx {
struct snd_pcm_substream *playback_b_substream;
struct snd_rawmidi *rmidi;
+ struct snd_es938 es938;
struct snd_kcontrol *hw_volume;
struct snd_kcontrol *hw_switch;
@@ -2167,7 +2169,16 @@ static int snd_audiodrive_probe(struct snd_card *card, int dev)
return err;
}
- return snd_card_register(card);
+ err = snd_card_register(card);
+ if (err < 0)
+ return err;
+
+ if (mpu_port[dev] > 0 && mpu_port[dev] != SNDRV_AUTO_PORT)
+ /* no error if this fails because ES938 is optional */
+ if (snd_es938_init(&chip->es938, card, 0, 0) == 0)
+ snd_printk(KERN_DEBUG "found ES938 audio processor\n");
+
+ return 0;
}
static int snd_es18xx_isa_match(struct device *pdev, unsigned int dev)
diff --git a/sound/isa/es938.c b/sound/isa/es938.c
new file mode 100644
index 0000000..07f6ccb
--- /dev/null
+++ b/sound/isa/es938.c
@@ -0,0 +1,215 @@
+/*
+ * Driver for ESS ES938 3-D Audio Effects Processor
+ * Copyright (c) 2014 Ondrej Zary
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#include <linux/module.h>
+#include <sound/asoundef.h>
+#include <sound/control.h>
+#include <sound/core.h>
+#include <sound/rawmidi.h>
+#include "es938.h"
+
+MODULE_AUTHOR("Ondrej Zary");
+MODULE_DESCRIPTION("ESS ES938");
+MODULE_LICENSE("GPL");
+
+static int snd_es938_read_reg(struct snd_es938 *chip, u8 reg, u8 *out)
+{
+ int i = 0, res;
+ struct snd_es938_sysex_reg req = {
+ .midi_cmd = MIDI_CMD_COMMON_SYSEX,
+ .id = ES938_ID,
+ .cmd = ES938_CMD_REG_R,
+ .reg = reg,
+ .midi_end = MIDI_CMD_COMMON_SYSEX_END,
+ };
+ struct snd_es938_sysex_regval reply = { };
+ u8 *p = (void *)&reply;
+ ktime_t end_time;
+
+ snd_rawmidi_kernel_write(chip->rfile.output, (void *)&req, sizeof(req));
+
+ end_time = ktime_add_ms(ktime_get(), 100);
+ while (i < sizeof(reply)) {
+ res = snd_rawmidi_kernel_read(chip->rfile.input, p + i,
+ sizeof(reply) - i);
+ if (res > 0)
+ i += res;
+ if (ktime_after(ktime_get(), end_time))
+ return -1;
+ }
+
+ /* check if the reply is our and has SYSEX_END at the end */
+ if (memcmp(&reply, &req, sizeof(req) - 1) ||
+ reply.midi_end != MIDI_CMD_COMMON_SYSEX_END)
+ return -1;
+
+ if (out)
+ *out = reply.val;
+
+ return 0;
+}
+
+static void snd_es938_write_reg(struct snd_es938 *chip, u8 reg, u8 val)
+{
+ struct snd_es938_sysex_regval req = {
+ .midi_cmd = MIDI_CMD_COMMON_SYSEX,
+ .id = ES938_ID,
+ .cmd = ES938_CMD_REG_W,
+ .reg = reg,
+ .val = val,
+ .midi_end = MIDI_CMD_COMMON_SYSEX_END,
+ };
+
+ snd_rawmidi_kernel_write(chip->rfile.output, (void *)&req, sizeof(req));
+ chip->regs[reg] = val;
+}
+
+#define ES938_MIXER(xname, xindex, reg, shift, mask) \
+{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
+.info = snd_es938_info_mixer, \
+.get = snd_es938_get_mixer, .put = snd_es938_put_mixer, \
+.private_value = reg | (shift << 8) | (mask << 16) }
+
+#define ES938_MIXER_TLV(xname, xindex, reg, shift, mask, xtlv) \
+{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
+.access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
+.info = snd_es938_info_mixer, \
+.get = snd_es938_get_mixer, .put = snd_es938_put_mixer, \
+.private_value = reg | (shift << 8) | (mask << 16), \
+.tlv = { .p = (xtlv) } }
+
+static const DECLARE_TLV_DB_SCALE(db_scale_tone, -900, 300, 0);
+
+static struct snd_kcontrol_new snd_es938_controls[] = {
+ES938_MIXER_TLV("Tone Control - Bass", 0, ES938_REG_TONE, 0, 7, db_scale_tone),
+ES938_MIXER_TLV("Tone Control - Treble", 0, ES938_REG_TONE, 4, 7, db_scale_tone),
+ES938_MIXER("3D Control - Level", 0, ES938_REG_SPATIAL, 1, 63),
+ES938_MIXER("3D Control - Switch", 0, ES938_REG_SPATIAL_EN, 0, 1),
+};
+
+int snd_es938_init(struct snd_es938 *chip, struct snd_card *card, int device,
+ int subdevice)
+{
+ int ret, i;
+
+ ret = snd_rawmidi_kernel_open(card, device, subdevice,
+ SNDRV_RAWMIDI_LFLG_OPEN | SNDRV_RAWMIDI_LFLG_APPEND,
+ &chip->rfile);
+ if (ret < 0) {
+ snd_printk(KERN_WARNING "es938: unable to open MIDI device\n");
+ return ret;
+ }
+
+ /* try to read a register to detect chip presence */
+ if (snd_es938_read_reg(chip, ES938_REG_MISC, NULL) < 0) {
+ ret = -ENODEV;
+ goto err;
+ }
+
+ /* write default values (there's no reset) */
+ snd_es938_write_reg(chip, ES938_REG_MISC, 0x49);
+ snd_es938_write_reg(chip, ES938_REG_TONE, 0x33);
+ /* reserved bit 0 must be set for 3D to work */
+ snd_es938_write_reg(chip, ES938_REG_SPATIAL, 0x01);
+ /* datasheet specifies invalid value 0x00 as default */
+ snd_es938_write_reg(chip, ES938_REG_SPATIAL_EN, 0x02);
+ snd_es938_write_reg(chip, ES938_REG_POWER, 0x0e);
+
+ strlcat(card->mixername, " + ES938", sizeof(card->mixername));
+ for (i = 0; i < ARRAY_SIZE(snd_es938_controls); i++) {
+ ret = snd_ctl_add(card,
+ snd_ctl_new1(&snd_es938_controls[i], chip));
+ if (ret < 0)
+ goto err;
+ }
+
+ chip->card = card;
+ chip->device = device;
+ chip->subdevice = subdevice;
+err:
+ snd_rawmidi_kernel_release(&chip->rfile);
+
+ return ret;
+}
+EXPORT_SYMBOL(snd_es938_init);
+
+int snd_es938_info_mixer(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_info *uinfo)
+{
+ int mask = (kcontrol->private_value >> 16) & 0xff;
+
+ uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN :
+ SNDRV_CTL_ELEM_TYPE_INTEGER;
+ uinfo->count = 1;
+ uinfo->value.integer.min = 0;
+ uinfo->value.integer.max = mask;
+ return 0;
+}
+EXPORT_SYMBOL(snd_es938_info_mixer);
+
+int snd_es938_get_mixer(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_es938 *chip = snd_kcontrol_chip(kcontrol);
+ int reg = kcontrol->private_value & 0xff;
+ int shift = (kcontrol->private_value >> 8) & 0xff;
+ int mask = (kcontrol->private_value >> 16) & 0xff;
+ u8 val = chip->regs[reg];
+
+ ucontrol->value.integer.value[0] = (val >> shift) & mask;
+ return 0;
+}
+EXPORT_SYMBOL(snd_es938_get_mixer);
+
+int snd_es938_put_mixer(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_es938 *chip = snd_kcontrol_chip(kcontrol);
+ int reg = kcontrol->private_value & 0xff;
+ int shift = (kcontrol->private_value >> 8) & 0xff;
+ int mask = (kcontrol->private_value >> 16) & 0xff;
+ u8 val = ucontrol->value.integer.value[0] & mask;
+ u8 oldval = chip->regs[reg];
+ u8 newval;
+ int err;
+
+ mask <<= shift;
+ val <<= shift;
+
+ newval = (oldval & ~mask) | val;
+ if (newval == oldval)
+ return 0;
+
+ /* this will fail if the MIDI port is used by an application */
+ err = snd_rawmidi_kernel_open(chip->card, chip->device,
+ chip->subdevice,
+ SNDRV_RAWMIDI_LFLG_OPEN | SNDRV_RAWMIDI_LFLG_APPEND,
+ &chip->rfile);
+ if (err < 0)
+ return err;
+
+ snd_es938_write_reg(chip, reg, newval);
+
+ snd_rawmidi_kernel_release(&chip->rfile);
+
+ return 1;
+}
+EXPORT_SYMBOL(snd_es938_put_mixer);
diff --git a/sound/isa/es938.h b/sound/isa/es938.h
new file mode 100644
index 0000000..08148ff
--- /dev/null
+++ b/sound/isa/es938.h
@@ -0,0 +1,48 @@
+#include <sound/tlv.h>
+
+#define ES938_ID 0x7b
+
+#define ES938_CMD_REG_R 0x7e
+#define ES938_CMD_REG_W 0x7f
+
+#define ES938_REG_MISC 0
+#define ES938_REG_TONE 1
+#define ES938_REG_SPATIAL 5
+#define ES938_REG_SPATIAL_EN 6
+#define ES938_REG_POWER 7
+
+struct snd_es938 {
+ u8 regs[8];
+ struct snd_card *card;
+ int device;
+ int subdevice;
+ struct snd_rawmidi_file rfile;
+};
+
+struct snd_es938_sysex_reg {
+ u8 midi_cmd;
+ u8 zeros[2];
+ u8 id;
+ u8 cmd;
+ u8 reg;
+ u8 midi_end;
+};
+
+struct snd_es938_sysex_regval {
+ u8 midi_cmd;
+ u8 zeros[2];
+ u8 id;
+ u8 cmd;
+ u8 reg;
+ u8 val;
+ u8 midi_end;
+};
+
+int snd_es938_init(struct snd_es938 *chip, struct snd_card *card, int device,
+ int subdevice);
+int snd_es938_info_mixer(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_info *uinfo);
+int snd_es938_get_mixer(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol);
+int snd_es938_put_mixer(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol);
--
Ondrej Zary
2
1

[alsa-devel] [PATCH v2 2/3] ASoC: ssm2602: add device tree bindings
by Stefan Kristiansson 29 Sep '14
by Stefan Kristiansson 29 Sep '14
29 Sep '14
Allow the ssm2602/ssm2603/ssm2604 codec driver to be
instantiated from the device tree.
Also, add Kconfig prompts to allow manual selection of both the
I2C and SPI configuration versions of the driver.
Signed-off-by: Stefan Kristiansson <stefan.kristiansson(a)saunalahti.fi>
---
Changes in v2:
- Remove "ssm2603" and "ssm2604" from the spi compatible list
---
.../devicetree/bindings/sound/adi,ssm2602.txt | 19 +++++++++++++++++++
sound/soc/codecs/Kconfig | 8 ++++++--
sound/soc/codecs/ssm2602-i2c.c | 9 +++++++++
sound/soc/codecs/ssm2602-spi.c | 7 +++++++
4 files changed, 41 insertions(+), 2 deletions(-)
create mode 100644 Documentation/devicetree/bindings/sound/adi,ssm2602.txt
diff --git a/Documentation/devicetree/bindings/sound/adi,ssm2602.txt b/Documentation/devicetree/bindings/sound/adi,ssm2602.txt
new file mode 100644
index 0000000..3b3302f
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/adi,ssm2602.txt
@@ -0,0 +1,19 @@
+Analog Devices SSM2602, SSM2603 and SSM2604 I2S audio CODEC devices
+
+SSM2602 support both I2C and SPI as the configuration interface,
+the selection is made by the MODE strap-in pin.
+SSM2603 and SSM2604 only support I2C as the configuration interface.
+
+Required properties:
+
+ - compatible : One of "adi,ssm2602", "adi,ssm2603" or "adi,ssm2604"
+
+ - reg : the I2C address of the device for I2C, the chip select
+ number for SPI.
+
+ Example:
+
+ ssm2602: ssm2602@1a {
+ compatible = "adi,ssm2602";
+ reg = <0x1a>;
+ };
diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig
index 8838838e..3649e73 100644
--- a/sound/soc/codecs/Kconfig
+++ b/sound/soc/codecs/Kconfig
@@ -520,12 +520,16 @@ config SND_SOC_SSM2602
tristate
config SND_SOC_SSM2602_SPI
+ tristate "Analog Devices SSM2602 CODEC - SPI"
+ depends on SPI_MASTER
select SND_SOC_SSM2602
- tristate
+ select REGMAP_SPI
config SND_SOC_SSM2602_I2C
+ tristate "Analog Devices SSM2602 CODEC - I2C"
+ depends on I2C
select SND_SOC_SSM2602
- tristate
+ select REGMAP_I2C
config SND_SOC_STA32X
tristate
diff --git a/sound/soc/codecs/ssm2602-i2c.c b/sound/soc/codecs/ssm2602-i2c.c
index abd63d5..0d9779d 100644
--- a/sound/soc/codecs/ssm2602-i2c.c
+++ b/sound/soc/codecs/ssm2602-i2c.c
@@ -41,10 +41,19 @@ static const struct i2c_device_id ssm2602_i2c_id[] = {
};
MODULE_DEVICE_TABLE(i2c, ssm2602_i2c_id);
+static const struct of_device_id ssm2602_of_match[] = {
+ { .compatible = "adi,ssm2602", },
+ { .compatible = "adi,ssm2603", },
+ { .compatible = "adi,ssm2604", },
+ { }
+};
+MODULE_DEVICE_TABLE(of, ssm2602_of_match);
+
static struct i2c_driver ssm2602_i2c_driver = {
.driver = {
.name = "ssm2602",
.owner = THIS_MODULE,
+ .of_match_table = ssm2602_of_match,
},
.probe = ssm2602_i2c_probe,
.remove = ssm2602_i2c_remove,
diff --git a/sound/soc/codecs/ssm2602-spi.c b/sound/soc/codecs/ssm2602-spi.c
index 2bf55e2..b5df14f 100644
--- a/sound/soc/codecs/ssm2602-spi.c
+++ b/sound/soc/codecs/ssm2602-spi.c
@@ -26,10 +26,17 @@ static int ssm2602_spi_remove(struct spi_device *spi)
return 0;
}
+static const struct of_device_id ssm2602_of_match[] = {
+ { .compatible = "adi,ssm2602", },
+ { }
+};
+MODULE_DEVICE_TABLE(of, ssm2602_of_match);
+
static struct spi_driver ssm2602_spi_driver = {
.driver = {
.name = "ssm2602",
.owner = THIS_MODULE,
+ .of_match_table = ssm2602_of_match,
},
.probe = ssm2602_spi_probe,
.remove = ssm2602_spi_remove,
--
1.9.1
2
1

[alsa-devel] [PATCH v2 3/3] ASoC: ssm2602: add support for 11.025kHz and 22.5kHz sample rates
by Stefan Kristiansson 29 Sep '14
by Stefan Kristiansson 29 Sep '14
29 Sep '14
This adds the necessary values to the constraint list and
register values to the coefficient table in order to
configure the device for 11.025kHz and 22.5kHz sample rates.
Signed-off-by: Stefan Kristiansson <stefan.kristiansson(a)saunalahti.fi>
---
Changes in v2:
- Keep SSM2602_RATES sorted.
---
sound/soc/codecs/ssm2602.c | 15 +++++++++++++--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/sound/soc/codecs/ssm2602.c b/sound/soc/codecs/ssm2602.c
index 4021cd4..7c41848 100644
--- a/sound/soc/codecs/ssm2602.c
+++ b/sound/soc/codecs/ssm2602.c
@@ -192,7 +192,7 @@ static const struct snd_pcm_hw_constraint_list ssm2602_constraints_12288000 = {
};
static const unsigned int ssm2602_rates_11289600[] = {
- 8000, 44100, 88200,
+ 8000, 11025, 22050, 44100, 88200,
};
static const struct snd_pcm_hw_constraint_list ssm2602_constraints_11289600 = {
@@ -237,6 +237,16 @@ static const struct ssm2602_coeff ssm2602_coeff_table[] = {
{18432000, 96000, SSM2602_COEFF_SRATE(0x7, 0x1, 0x0)},
{12000000, 96000, SSM2602_COEFF_SRATE(0x7, 0x0, 0x1)},
+ /* 11.025k */
+ {11289600, 11025, SSM2602_COEFF_SRATE(0xc, 0x0, 0x0)},
+ {16934400, 11025, SSM2602_COEFF_SRATE(0xc, 0x1, 0x0)},
+ {12000000, 11025, SSM2602_COEFF_SRATE(0xc, 0x1, 0x1)},
+
+ /* 22.05k */
+ {11289600, 22050, SSM2602_COEFF_SRATE(0xd, 0x0, 0x0)},
+ {16934400, 22050, SSM2602_COEFF_SRATE(0xd, 0x1, 0x0)},
+ {12000000, 22050, SSM2602_COEFF_SRATE(0xd, 0x1, 0x1)},
+
/* 44.1k */
{11289600, 44100, SSM2602_COEFF_SRATE(0x8, 0x0, 0x0)},
{16934400, 44100, SSM2602_COEFF_SRATE(0x8, 0x1, 0x0)},
@@ -467,7 +477,8 @@ static int ssm2602_set_bias_level(struct snd_soc_codec *codec,
return 0;
}
-#define SSM2602_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
+#define SSM2602_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
+ SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\
SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |\
SNDRV_PCM_RATE_96000)
--
1.9.1
2
1

[alsa-devel] [PATCH] ASoC: rt5677: Add dts properties for input/output differential configuration
by Anatol Pomozov 29 Sep '14
by Anatol Pomozov 29 Sep '14
29 Sep '14
Signed-off-by: Anatol Pomozov <anatol.pomozov(a)gmail.com>
---
Documentation/devicetree/bindings/sound/rt5677.txt | 9 +++++++++
include/sound/rt5677.h | 5 ++++-
sound/soc/codecs/rt5677.c | 23 ++++++++++++++++++++++
3 files changed, 36 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/sound/rt5677.txt b/Documentation/devicetree/bindings/sound/rt5677.txt
index bd28df6..0701b83 100644
--- a/Documentation/devicetree/bindings/sound/rt5677.txt
+++ b/Documentation/devicetree/bindings/sound/rt5677.txt
@@ -19,6 +19,14 @@ Optional properties:
- realtek,pow-ldo2-gpio : The GPIO that controls the CODEC's POW_LDO2 pin.
+- realtek,in1-differential
+- realtek,in2-differential
+- realtek,lout1-differential
+- realtek,lout2-differential
+- realtek,lout3-differential
+ Boolean. Indicate MIC1/2 input and LOUT1/2/3 outputs are differential,
+ rather than single-ended.
+
Pins on the device (for linking into audio routes):
* IN1P
@@ -47,4 +55,5 @@ rt5677 {
realtek,pow-ldo2-gpio =
<&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>;
+ realtek,in1-differential = "true";
};
diff --git a/include/sound/rt5677.h b/include/sound/rt5677.h
index a676717..082670e 100644
--- a/include/sound/rt5677.h
+++ b/include/sound/rt5677.h
@@ -19,9 +19,12 @@ enum rt5677_dmic2_clk {
struct rt5677_platform_data {
- /* IN1 IN2 can optionally be differential */
+ /* IN1/IN2/LOUT1/LOUT2/LOUT3 can optionally be differential */
bool in1_diff;
bool in2_diff;
+ bool lout1_diff;
+ bool lout2_diff;
+ bool lout3_diff;
/* DMIC2 clock source selection */
enum rt5677_dmic2_clk dmic2_clk_pin;
};
diff --git a/sound/soc/codecs/rt5677.c b/sound/soc/codecs/rt5677.c
index cecbdb1..16aa4d9 100644
--- a/sound/soc/codecs/rt5677.c
+++ b/sound/soc/codecs/rt5677.c
@@ -3566,6 +3566,17 @@ MODULE_DEVICE_TABLE(i2c, rt5677_i2c_id);
static int rt5677_parse_dt(struct rt5677_priv *rt5677, struct device_node *np)
{
+ rt5677->pdata.in1_diff = of_property_read_bool(np,
+ "realtek,in1-differential");
+ rt5677->pdata.in2_diff = of_property_read_bool(np,
+ "realtek,in2-differential");
+ rt5677->pdata.lout1_diff = of_property_read_bool(np,
+ "realtek,lout1-differential");
+ rt5677->pdata.lout2_diff = of_property_read_bool(np,
+ "realtek,lout2-differential");
+ rt5677->pdata.lout3_diff = of_property_read_bool(np,
+ "realtek,lout3-differential");
+
rt5677->pow_ldo2 = of_get_named_gpio(np,
"realtek,pow-ldo2-gpio", 0);
@@ -3657,6 +3668,18 @@ static int rt5677_i2c_probe(struct i2c_client *i2c,
regmap_update_bits(rt5677->regmap, RT5677_IN1,
RT5677_IN_DF2, RT5677_IN_DF2);
+ if (rt5677->pdata.lout1_diff)
+ regmap_update_bits(rt5677->regmap, RT5677_LOUT1,
+ RT5677_LOUT1_L_DF, RT5677_LOUT1_L_DF);
+
+ if (rt5677->pdata.lout2_diff)
+ regmap_update_bits(rt5677->regmap, RT5677_LOUT1,
+ RT5677_LOUT2_L_DF, RT5677_LOUT2_L_DF);
+
+ if (rt5677->pdata.lout3_diff)
+ regmap_update_bits(rt5677->regmap, RT5677_LOUT1,
+ RT5677_LOUT3_L_DF, RT5677_LOUT3_L_DF);
+
if (rt5677->pdata.dmic2_clk_pin == RT5677_DMIC_CLK2) {
regmap_update_bits(rt5677->regmap, RT5677_GEN_CTRL2,
RT5677_GPIO5_FUNC_MASK,
--
2.1.0.rc2.206.gedb03e5
2
1

[alsa-devel] [PATCH 1/2] ASoC: Intel: byt-rt5640: Remove IN2N pin from DAPM route table
by Jarkko Nikula 29 Sep '14
by Jarkko Nikula 29 Sep '14
29 Sep '14
I tested couple byt-rt5640 based platforms and they have single-ended
headset microphone connection to IN2P only. I guess IN2N was either defined
by accident or some early platform had floating ground for headset. It's
better to remove IN2N and add a custom route for such a platform if needed.
Signed-off-by: Jarkko Nikula <jarkko.nikula(a)linux.intel.com>
---
sound/soc/intel/byt-rt5640.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/sound/soc/intel/byt-rt5640.c b/sound/soc/intel/byt-rt5640.c
index 234a58de3c53..d6d8b19c22dc 100644
--- a/sound/soc/intel/byt-rt5640.c
+++ b/sound/soc/intel/byt-rt5640.c
@@ -36,7 +36,6 @@ static const struct snd_soc_dapm_widget byt_rt5640_widgets[] = {
static const struct snd_soc_dapm_route byt_rt5640_audio_map[] = {
{"Headset Mic", NULL, "MICBIAS1"},
{"IN2P", NULL, "Headset Mic"},
- {"IN2N", NULL, "Headset Mic"},
{"DMIC1", NULL, "Internal Mic"},
{"Headphone", NULL, "HPOL"},
{"Headphone", NULL, "HPOR"},
--
2.1.0
2
2

[alsa-devel] [PATCH 1/3] ASoC: wm8{350, 753, 971}: Use snd_soc_dapm_to_codec() instead of dapm->codec
by Lars-Peter Clausen 29 Sep '14
by Lars-Peter Clausen 29 Sep '14
29 Sep '14
The CODEC struct in the snd_soc_dapm_context struct is deprecated and
scheduled for removal. Use the snd_soc_dapm_to_codec() function instead.
Signed-off-by: Lars-Peter Clausen <lars(a)metafoo.de>
---
sound/soc/codecs/wm8350.c | 2 +-
sound/soc/codecs/wm8753.c | 2 +-
sound/soc/codecs/wm8971.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/sound/soc/codecs/wm8350.c b/sound/soc/codecs/wm8350.c
index 3dfdcc4..628ec77 100644
--- a/sound/soc/codecs/wm8350.c
+++ b/sound/soc/codecs/wm8350.c
@@ -212,7 +212,7 @@ static void wm8350_pga_work(struct work_struct *work)
{
struct snd_soc_dapm_context *dapm =
container_of(work, struct snd_soc_dapm_context, delayed_work.work);
- struct snd_soc_codec *codec = dapm->codec;
+ struct snd_soc_codec *codec = snd_soc_dapm_to_codec(dapm);
struct wm8350_data *wm8350_data = snd_soc_codec_get_drvdata(codec);
struct wm8350_output *out1 = &wm8350_data->out1,
*out2 = &wm8350_data->out2;
diff --git a/sound/soc/codecs/wm8753.c b/sound/soc/codecs/wm8753.c
index e54e097..21ca3a9 100644
--- a/sound/soc/codecs/wm8753.c
+++ b/sound/soc/codecs/wm8753.c
@@ -1433,7 +1433,7 @@ static void wm8753_work(struct work_struct *work)
struct snd_soc_dapm_context *dapm =
container_of(work, struct snd_soc_dapm_context,
delayed_work.work);
- struct snd_soc_codec *codec = dapm->codec;
+ struct snd_soc_codec *codec = snd_soc_dapm_to_codec(dapm);
wm8753_set_bias_level(codec, dapm->bias_level);
}
diff --git a/sound/soc/codecs/wm8971.c b/sound/soc/codecs/wm8971.c
index 0499cd4..39ddb9b 100644
--- a/sound/soc/codecs/wm8971.c
+++ b/sound/soc/codecs/wm8971.c
@@ -615,7 +615,7 @@ static void wm8971_work(struct work_struct *work)
struct snd_soc_dapm_context *dapm =
container_of(work, struct snd_soc_dapm_context,
delayed_work.work);
- struct snd_soc_codec *codec = dapm->codec;
+ struct snd_soc_codec *codec = snd_soc_dapm_to_codec(dapm);
wm8971_set_bias_level(codec, codec->dapm.bias_level);
}
--
1.8.0
4
5

[alsa-devel] [PATCH] ASoC: davinci: vcif must be a module if SND_DAVINCI_SOC is
by Arnd Bergmann 29 Sep '14
by Arnd Bergmann 29 Sep '14
29 Sep '14
It is possible to configure a kernel with SND_DAVINCI_SOC=m and
SND_DM365_VOICE_CODEC=y, which results in a link error:
sound/built-in.o: In function `davinci_vcif_probe':
sound/soc/davinci/davinci-vcif.c:223: undefined reference to `davinci_soc_platform_register'
The best way to avoid this is to make SND_DM365_VOICE_CODEC
a tristate option that depends on SND_DAVINCI_SOC, so it
can only be a module or disabled when the base driver is
a loadable module
Signed-off-by: Arnd Bergmann <arnd(a)arndb.de>
diff --git a/sound/soc/davinci/Kconfig b/sound/soc/davinci/Kconfig
index d69510c53239..8e948c63f3d9 100644
--- a/sound/soc/davinci/Kconfig
+++ b/sound/soc/davinci/Kconfig
@@ -63,7 +63,8 @@ config SND_DM365_AIC3X_CODEC
Say Y if you want to add support for AIC3101 audio codec
config SND_DM365_VOICE_CODEC
- bool "Voice Codec - CQ93VC"
+ tristate "Voice Codec - CQ93VC"
+ depends on SND_DAVINCI_SOC
select MFD_DAVINCI_VOICECODEC
select SND_DAVINCI_SOC_VCIF
select SND_SOC_CQ0093VC
2
1
Clemens Ladisch wrote:
>What is the value of the "Headphone Playback Volume" mixer control
>(as shown by "amixer contents") above and below this threshold?
using "amixer --device hw:Set contents"
36% yields "values=8,8"
34% yields "values=0,0"
interestingly, using "alsamixer" shows that while (default) reports 36%,
the C-media device reports 3%
2
1

29 Sep '14
Allow the ssm2602/ssm2603/ssm2604 codec driver to be
instantiated from the device tree.
Also, add Kconfig prompts to allow manual selection of both the
I2C and SPI configuration versions of the driver.
Signed-off-by: Stefan Kristiansson <stefan.kristiansson(a)saunalahti.fi>
---
.../devicetree/bindings/sound/adi,ssm2602.txt | 19 +++++++++++++++++++
sound/soc/codecs/Kconfig | 8 ++++++--
sound/soc/codecs/ssm2602-i2c.c | 9 +++++++++
sound/soc/codecs/ssm2602-spi.c | 9 +++++++++
4 files changed, 43 insertions(+), 2 deletions(-)
create mode 100644 Documentation/devicetree/bindings/sound/adi,ssm2602.txt
diff --git a/Documentation/devicetree/bindings/sound/adi,ssm2602.txt b/Documentation/devicetree/bindings/sound/adi,ssm2602.txt
new file mode 100644
index 0000000..3b3302f
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/adi,ssm2602.txt
@@ -0,0 +1,19 @@
+Analog Devices SSM2602, SSM2603 and SSM2604 I2S audio CODEC devices
+
+SSM2602 support both I2C and SPI as the configuration interface,
+the selection is made by the MODE strap-in pin.
+SSM2603 and SSM2604 only support I2C as the configuration interface.
+
+Required properties:
+
+ - compatible : One of "adi,ssm2602", "adi,ssm2603" or "adi,ssm2604"
+
+ - reg : the I2C address of the device for I2C, the chip select
+ number for SPI.
+
+ Example:
+
+ ssm2602: ssm2602@1a {
+ compatible = "adi,ssm2602";
+ reg = <0x1a>;
+ };
diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig
index 8838838e..3649e73 100644
--- a/sound/soc/codecs/Kconfig
+++ b/sound/soc/codecs/Kconfig
@@ -520,12 +520,16 @@ config SND_SOC_SSM2602
tristate
config SND_SOC_SSM2602_SPI
+ tristate "Analog Devices SSM2602 CODEC - SPI"
+ depends on SPI_MASTER
select SND_SOC_SSM2602
- tristate
+ select REGMAP_SPI
config SND_SOC_SSM2602_I2C
+ tristate "Analog Devices SSM2602 CODEC - I2C"
+ depends on I2C
select SND_SOC_SSM2602
- tristate
+ select REGMAP_I2C
config SND_SOC_STA32X
tristate
diff --git a/sound/soc/codecs/ssm2602-i2c.c b/sound/soc/codecs/ssm2602-i2c.c
index abd63d5..0d9779d 100644
--- a/sound/soc/codecs/ssm2602-i2c.c
+++ b/sound/soc/codecs/ssm2602-i2c.c
@@ -41,10 +41,19 @@ static const struct i2c_device_id ssm2602_i2c_id[] = {
};
MODULE_DEVICE_TABLE(i2c, ssm2602_i2c_id);
+static const struct of_device_id ssm2602_of_match[] = {
+ { .compatible = "adi,ssm2602", },
+ { .compatible = "adi,ssm2603", },
+ { .compatible = "adi,ssm2604", },
+ { }
+};
+MODULE_DEVICE_TABLE(of, ssm2602_of_match);
+
static struct i2c_driver ssm2602_i2c_driver = {
.driver = {
.name = "ssm2602",
.owner = THIS_MODULE,
+ .of_match_table = ssm2602_of_match,
},
.probe = ssm2602_i2c_probe,
.remove = ssm2602_i2c_remove,
diff --git a/sound/soc/codecs/ssm2602-spi.c b/sound/soc/codecs/ssm2602-spi.c
index 2bf55e2..fb4cc46 100644
--- a/sound/soc/codecs/ssm2602-spi.c
+++ b/sound/soc/codecs/ssm2602-spi.c
@@ -26,10 +26,19 @@ static int ssm2602_spi_remove(struct spi_device *spi)
return 0;
}
+static const struct of_device_id ssm2602_of_match[] = {
+ { .compatible = "adi,ssm2602", },
+ { .compatible = "adi,ssm2603", },
+ { .compatible = "adi,ssm2604", },
+ { }
+};
+MODULE_DEVICE_TABLE(of, ssm2602_of_match);
+
static struct spi_driver ssm2602_spi_driver = {
.driver = {
.name = "ssm2602",
.owner = THIS_MODULE,
+ .of_match_table = ssm2602_of_match,
},
.probe = ssm2602_spi_probe,
.remove = ssm2602_spi_remove,
--
1.9.1
2
4

[alsa-devel] [BUG] AMD vga-switcheroo deactivates GPU+soundcard - ALSA can't handle this.
by Paul Ludwig Konecny 29 Sep '14
by Paul Ludwig Konecny 29 Sep '14
29 Sep '14
Hi all,
I'm an average user and not a programmer. David Henningsson advised me
to contact this mailing-list to report my issue.
As this is my first post here I hope I'm doing everything right.
I'm having a problem with my HP EliteBook 850 G1.
This machine features Intel(i965, HD4400) / AMD(CIK, mesa-radeonsi,
HD8750M) hybrid-graphics
which is handled by vgaswitcheroo/PRIME and runtime power management.
When the discrete GPU and it's soundchip are deactivated by runtime
power management it seems that it is still reported to ALSA as
available. This "hangs" my entire sound system. I don't get any sound
out of this machine anymore.
As you can see in my alsa-info run it took around 400 seconds to access
HDMI2 which is the radeon soundchip. I believe that alsa-info only
finished because I did a "xrandr --listproviders" which breifly powered
up the AMD GPU. As this corresponds with the timespan I stared alsa-info
and issuing the xrandr command.
[ 36.768463] HDMI ATI/AMD: no speaker allocation for ELD
[ 36.804442] hda-intel 0000:03:00.1: Disabling via VGA-switcheroo
[ 36.836422] hda-intel 0000:03:00.1: Cannot lock devices!
[ 37.219319] [drm] Disabling audio 0 support
--
[ 464.855900] status: r
[ 465.620947] hda-intel 0000:03:00.1: Enabling via VGA-switcheroo
[ 465.621063] snd_hda_intel 0000:03:00.1: irq 63 for MSI/MSI-X
[ 465.623672] HDMI ATI/AMD: no speaker allocation for ELD
At first I believed it to be a pulseaudio problem and after several bug
reports I think I have traced the bug to the ALSA drivers.
This bug report is the main/original one:
https://bugs.launchpad.net/ubuntu/+source/alsa-driver/+bug/1310260
David Henningsson pointed out here:
https://bugs.freedesktop.org/show_bug.cgi?id=83446
that he believes the bug to be in the alsa driver used by my machine.
This is why he changed the affected package in launchpad from
"pulseaudio" to "alsa-driver". He is also suggested posting
this issue here as the alsa bug tracker was taken offline.
A workaround that involves disabling the card via etc/modprobe.d (see
ubuntu bugreport) circumvents this issue for the time being but the
problem is that this kills my audio output via the laptop's DisplayPort
(It has no native HDMI Port).
The output of my alsa-info.sh run can be found here:
http://www.alsa-project.org/db/?f=fd4de60706f487ec48e41f7ac451030bbe79a9d7
I hope you can help me!
Thanks in advance!
Paul
P.S.: There is already a message to this list which is awaiting
moderation. David Henningsson told me to subscribe and send it again
this time directly to the list. The message in moderation can therefore
be deleted.
1
0

[alsa-devel] [PATCH 2/2] ASoC: ssm2602: add support for 11.025kHz and 22.5kHz sample rates
by Stefan Kristiansson 29 Sep '14
by Stefan Kristiansson 29 Sep '14
29 Sep '14
This adds the necessary values to the constraint list and
register values to the coefficient table in order to
configure the device for 11.025kHz and 22.5kHz sample rates.
Signed-off-by: Stefan Kristiansson <stefan.kristiansson(a)saunalahti.fi>
---
sound/soc/codecs/ssm2602.c | 15 +++++++++++++--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/sound/soc/codecs/ssm2602.c b/sound/soc/codecs/ssm2602.c
index 484b3bb..da95976 100644
--- a/sound/soc/codecs/ssm2602.c
+++ b/sound/soc/codecs/ssm2602.c
@@ -192,7 +192,7 @@ static const struct snd_pcm_hw_constraint_list ssm2602_constraints_12288000 = {
};
static const unsigned int ssm2602_rates_11289600[] = {
- 8000, 44100, 88200,
+ 8000, 11025, 22050, 44100, 88200,
};
static const struct snd_pcm_hw_constraint_list ssm2602_constraints_11289600 = {
@@ -237,6 +237,16 @@ static const struct ssm2602_coeff ssm2602_coeff_table[] = {
{18432000, 96000, SSM2602_COEFF_SRATE(0x7, 0x1, 0x0)},
{12000000, 96000, SSM2602_COEFF_SRATE(0x7, 0x0, 0x1)},
+ /* 11.025k */
+ {11289600, 11025, SSM2602_COEFF_SRATE(0xc, 0x0, 0x0)},
+ {16934400, 11025, SSM2602_COEFF_SRATE(0xc, 0x1, 0x0)},
+ {12000000, 11025, SSM2602_COEFF_SRATE(0xc, 0x1, 0x1)},
+
+ /* 22.05k */
+ {11289600, 22050, SSM2602_COEFF_SRATE(0xd, 0x0, 0x0)},
+ {16934400, 22050, SSM2602_COEFF_SRATE(0xd, 0x1, 0x0)},
+ {12000000, 22050, SSM2602_COEFF_SRATE(0xd, 0x1, 0x1)},
+
/* 44.1k */
{11289600, 44100, SSM2602_COEFF_SRATE(0x8, 0x0, 0x0)},
{16934400, 44100, SSM2602_COEFF_SRATE(0x8, 0x1, 0x0)},
@@ -467,7 +477,8 @@ static int ssm2602_set_bias_level(struct snd_soc_codec *codec,
return 0;
}
-#define SSM2602_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
+#define SSM2602_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
+ SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_16000 |\
SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\
SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |\
SNDRV_PCM_RATE_96000)
--
1.9.1
2
1
First time bug submitter, forgive me if I'm not following proper procedure.
OS: Arch Linux 64-bit
Kernel version: 3.16.3-1-ARCH
What's happening:
When the Master channel is lowered below 35% in alsamixer,
all audio coming out of the C-Media USB sound card is muted.
Additional info:
PulseAudio is installed
Output of 'lsusb':
Bus 005 Device 002: ID 0d8c:000c C-Media Electronics, Inc. Audio Adapter
Alsa hw ID name:
'Set'
Output of 'cat /proc/asound/Set/usbmixer'
http://ix.io/exb
Any assistance in resolving the issue is greatly appreciated
2
1
Changes since v2:
- Change compatible property from "ti,gpio-clock" to "ti,gpio-gate-clock"
- Some minor cleanups
The code has a functional dependency to:
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg109264.html
Without the above patch the audio card does not probe.
The code has been rebased on top of Linux 3.17-rc5. The patches
bellow, the above dependency, and couple of commits to add BBB HDMI audio
support to omap2plus_defconfig can be pulled from:
https://github.com/jsarha/linux.git linux-master-bbb-hdmi-audio
Cheers,
Jyri
Jyri Sarha (5):
clk: ti: add "ti,gpio-gate-clock" controlled clock
drm/tilcdc: Add I2S HDMI audio config for tda998x
ASoC: davinci-evm: HDMI audio support for TDA998x trough McASP I2S
bus
ASoC: davinci: HDMI audio build for AM33XX and TDA998x
ARM: dts: am335x-boneblack: Add HDMI audio support
.../bindings/clock/ti/gpio-gate-clock.txt | 21 ++
.../bindings/sound/davinci-evm-audio.txt | 6 +-
arch/arm/boot/dts/am335x-boneblack.dts | 52 +++++
drivers/clk/ti/Makefile | 2 +-
drivers/clk/ti/gpio.c | 202 ++++++++++++++++++++
drivers/gpu/drm/tilcdc/tilcdc_slave.c | 24 ++-
sound/soc/davinci/Kconfig | 12 ++
sound/soc/davinci/davinci-evm.c | 82 +++++++-
8 files changed, 395 insertions(+), 6 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/ti/gpio-gate-clock.txt
create mode 100644 drivers/clk/ti/gpio.c
--
1.7.9.5
5
15

28 Sep '14
Hello,
I'm writing an ALSA SoC machine driver for a board that has two mono
codecs (left and right audio channel). Each codec is controlled over I2C
and has itsown address.Both codecs are connected to the same I2S CPU DAI
(as shown below).
+--------- (adr: 0x1a) -----+
| |
| +--------> codec_1 ----> (left channel audio)
| |
I2C I2S ----+
| |
| +--------> codec_2 ----> (right channel audio)
| |
+--------- (adr: 0x1b) -----+
Can someone give me some advice on how to setup the 'snd_soc_card' and 'snd_soc_dai_link' in this case? Do I need two dai_links with the same 'cpu_dai_name' and 'platform_name'?
Are there examples for such a configuration? I didn't had much luck in finding one in the mainline?
Any help would be highly appreciated. Thanks!
Sergej
2
2

28 Sep '14
This patchset is to update my previous series.
http://mailman.alsa-project.org/pipermail/alsa-devel/2014-May/076730.html
The previous series includes some bugs, as a result, playback/capture is
not successfull. I've tested with actual device (TC Electronic, Impact
Twin) and fix so as Dice driver drives the device.
Currently this driver supports:
- up to 192kHz
- PCM playback/capture
- MIDI playback/capture
- Duplex streams with synchronization (with snd-firewire-lib)
This driver doesn't support:
- Synchronization between multiple devices on the same bus
The rest of issue:
- Handling bus reset
Especially, just after powering on. Currently this driver often fails to
probe device. I require more time to investigate. A workasound is to
execute modprobe when the device is powered.
Takashi Sakamoto (13):
ALSA: dice: Rename structure and its members
ALSA: dice: Move file to its own directory
ALSA: dice: Split transaction functionality into a file
ALSA: dice: Split stream functionality into a file
ALSA: dice: Split PCM functionality into a file
ALSA: dice: Split hwdep functionality into a file
ALSA: dice: Split proc functionality into a file
ALSA: dice: Add new functions for limitation of PCM parameters
ALSA: dice: Change the way to start stream
ALSA: dice: Add support for duplex streams with synchronization
ALSA: dice: Support for non SYT-Match sampling clock source mode
ALSA: dice: Add support for PCM capture
ALSA: dice: Add support for MIDI capture/playback
sound/firewire/Kconfig | 3 -
sound/firewire/Makefile | 4 +-
sound/firewire/dice-interface.h | 371 --------
sound/firewire/dice.c | 1511 --------------------------------
sound/firewire/dice/Makefile | 3 +
sound/firewire/dice/dice-hwdep.c | 190 ++++
sound/firewire/dice/dice-interface.h | 371 ++++++++
sound/firewire/dice/dice-midi.c | 173 ++++
sound/firewire/dice/dice-pcm.c | 389 ++++++++
sound/firewire/dice/dice-proc.c | 252 ++++++
sound/firewire/dice/dice-stream.c | 426 +++++++++
sound/firewire/dice/dice-transaction.c | 370 ++++++++
sound/firewire/dice/dice.c | 364 ++++++++
sound/firewire/dice/dice.h | 189 ++++
14 files changed, 2728 insertions(+), 1888 deletions(-)
delete mode 100644 sound/firewire/dice-interface.h
delete mode 100644 sound/firewire/dice.c
create mode 100644 sound/firewire/dice/Makefile
create mode 100644 sound/firewire/dice/dice-hwdep.c
create mode 100644 sound/firewire/dice/dice-interface.h
create mode 100644 sound/firewire/dice/dice-midi.c
create mode 100644 sound/firewire/dice/dice-pcm.c
create mode 100644 sound/firewire/dice/dice-proc.c
create mode 100644 sound/firewire/dice/dice-stream.c
create mode 100644 sound/firewire/dice/dice-transaction.c
create mode 100644 sound/firewire/dice/dice.c
create mode 100644 sound/firewire/dice/dice.h
--
1.9.1
1
15

[alsa-devel] [PATCH] ASoC:kirkwood: Don't raise an error when no DAI format
by Jean-Francois Moine 28 Sep '14
by Jean-Francois Moine 28 Sep '14
28 Sep '14
The two DAIs of the kirkwood controller have a unique PCM format.
The simple-card sets the audio hardware definitions of all CPU DAIs.
The PCM format is defined only when it is present in the DT.
This patch prevents the controller to raise an error when
the DT audio card definition by the simple card contains the PCM
format of one CPU DAI only.
Signed-off-by: Jean-Francois Moine <moinejf(a)free.fr>
---
sound/soc/kirkwood/kirkwood-i2s.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/sound/soc/kirkwood/kirkwood-i2s.c b/sound/soc/kirkwood/kirkwood-i2s.c
index 0704cd6..26d5f85 100644
--- a/sound/soc/kirkwood/kirkwood-i2s.c
+++ b/sound/soc/kirkwood/kirkwood-i2s.c
@@ -45,6 +45,8 @@ static int kirkwood_i2s_set_fmt(struct snd_soc_dai *cpu_dai,
unsigned long value;
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
+ case 0:
+ return 0; /* already done (simple-card) */
case SND_SOC_DAIFMT_RIGHT_J:
mask = KIRKWOOD_I2S_CTL_RJ;
break;
--
2.1.1
1
0

[alsa-devel] [PATCH 1/2] ASoC: max98090: Enable both DMIC channels also when using mono configuration
by Jarkko Nikula 28 Sep '14
by Jarkko Nikula 28 Sep '14
28 Sep '14
According to MAX98090 specification "Digital microphone clock (DMC) is
enabled once both data channels are enabled.". Therefore both digital
microphone data channels must be enabled also when using mono microphone
configuration.
Fix this by moving "DMICL_ENA" and "DMICR_ENA" supply widgets from "DMICL"
and "DMICR" inputs to "DMIC Mux" in order to enable both data channels
whenever there is active mono or stereo digital microphone input path.
Use of "DMICL" and "DMICR" inputs are retained for informative source and in
case the driver would find use for exact digital microphone configuration in
the future.
Signed-off-by: Jarkko Nikula <jarkko.nikula(a)linux.intel.com>
---
for-next, only byt-max98090 uses DMIC and I noticed this after disabling
unused codec pins.
---
sound/soc/codecs/max98090.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/sound/soc/codecs/max98090.c b/sound/soc/codecs/max98090.c
index f2a3f30a5d9f..d519294f57c7 100644
--- a/sound/soc/codecs/max98090.c
+++ b/sound/soc/codecs/max98090.c
@@ -1311,8 +1311,6 @@ static const struct snd_soc_dapm_route max98090_dapm_routes[] = {
{"MIC1 Input", NULL, "MIC1"},
{"MIC2 Input", NULL, "MIC2"},
- {"DMICL", NULL, "DMICL_ENA"},
- {"DMICR", NULL, "DMICR_ENA"},
{"DMICL", NULL, "AHPF"},
{"DMICR", NULL, "AHPF"},
@@ -1370,6 +1368,8 @@ static const struct snd_soc_dapm_route max98090_dapm_routes[] = {
{"DMIC Mux", "ADC", "ADCR"},
{"DMIC Mux", "DMIC", "DMICL"},
{"DMIC Mux", "DMIC", "DMICR"},
+ {"DMIC Mux", "DMIC", "DMICL_ENA"},
+ {"DMIC Mux", "DMIC", "DMICR_ENA"},
{"LBENL Mux", "Normal", "DMIC Mux"},
{"LBENL Mux", "Loopback", "LTENL Mux"},
--
2.1.0
2
3

[alsa-devel] [PATCH] ASoC: core: fix possible ZERO_SIZE_PTR pointer dereferencing error.
by Xiubo Li 28 Sep '14
by Xiubo Li 28 Sep '14
28 Sep '14
Since we cannot make sure the 'params->num_regs' will always be none
zero here, and then if it equals to zero, the kmemdup() will return
ZERO_SIZE_PTR, which equals to ((void *)16).
So this patch fix this with just doing the zero check before calling
kmemdup().
Signed-off-by: Xiubo Li <Li.Xiubo(a)freescale.com>
---
sound/soc/soc-core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c
index 7b5a7ce..263514a 100644
--- a/sound/soc/soc-core.c
+++ b/sound/soc/soc-core.c
@@ -3051,7 +3051,7 @@ int snd_soc_bytes_put(struct snd_kcontrol *kcontrol,
unsigned int val, mask;
void *data;
- if (!component->regmap)
+ if (!component->regmap || !params->num_regs)
return -EINVAL;
len = params->num_regs * component->val_bytes;
--
2.1.0.27.g96db324
2
1

[alsa-devel] [PATCH] ASoC: ssm4567: Add driver for Analog Devices SSM4567 amplifier
by Anatol Pomozov 27 Sep '14
by Anatol Pomozov 27 Sep '14
27 Sep '14
Analog Devices SSM4567 is a boost class-D audio amplifier.
Signed-off-by: Anatol Pomozov <anatol.pomozov(a)gmail.com>
---
.../devicetree/bindings/sound/ssm4567.txt | 15 +
sound/soc/codecs/Kconfig | 4 +
sound/soc/codecs/Makefile | 2 +
sound/soc/codecs/ssm4567.c | 350 +++++++++++++++++++++
4 files changed, 371 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/ssm4567.txt
create mode 100644 sound/soc/codecs/ssm4567.c
diff --git a/Documentation/devicetree/bindings/sound/ssm4567.txt b/Documentation/devicetree/bindings/sound/ssm4567.txt
new file mode 100644
index 0000000..ec3d9e7
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/ssm4567.txt
@@ -0,0 +1,15 @@
+Analog Devices SSM4567 audio amplifier
+
+This device supports I2C only.
+
+Required properties:
+ - compatible : Must be "adi,ssm4567"
+ - reg : the I2C address of the device. This will either be 0x34 (LR_SEL/ADDR connected to AGND),
+ 0x35 (LR_SEL/ADDR connected to IOVDD) or 0x36 (LR_SEL/ADDR open).
+
+Example:
+
+ ssm4567: ssm4567@34 {
+ compatible = "adi,ssm4567";
+ reg = <0x34>;
+ };
diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig
index 8ab1547..da45b5a 100644
--- a/sound/soc/codecs/Kconfig
+++ b/sound/soc/codecs/Kconfig
@@ -94,6 +94,7 @@ config SND_SOC_ALL_CODECS
select SND_SOC_SSM2518 if I2C
select SND_SOC_SSM2602_SPI if SPI_MASTER
select SND_SOC_SSM2602_I2C if I2C
+ select SND_SOC_SSM4567 if I2C
select SND_SOC_STA32X if I2C
select SND_SOC_STA350 if I2C
select SND_SOC_STA529 if I2C
@@ -546,6 +547,9 @@ config SND_SOC_SSM2602_I2C
select SND_SOC_SSM2602
tristate
+config SND_SOC_SSM4567
+ tristate "Analog Devices ssm4567 amplifier driver support"
+
config SND_SOC_STA32X
tristate
diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile
index afba944..5dce451 100644
--- a/sound/soc/codecs/Makefile
+++ b/sound/soc/codecs/Makefile
@@ -95,6 +95,7 @@ snd-soc-ssm2518-objs := ssm2518.o
snd-soc-ssm2602-objs := ssm2602.o
snd-soc-ssm2602-spi-objs := ssm2602-spi.o
snd-soc-ssm2602-i2c-objs := ssm2602-i2c.o
+snd-soc-ssm4567-objs := ssm4567.o
snd-soc-sta32x-objs := sta32x.o
snd-soc-sta350-objs := sta350.o
snd-soc-sta529-objs := sta529.o
@@ -266,6 +267,7 @@ obj-$(CONFIG_SND_SOC_SSM2518) += snd-soc-ssm2518.o
obj-$(CONFIG_SND_SOC_SSM2602) += snd-soc-ssm2602.o
obj-$(CONFIG_SND_SOC_SSM2602_SPI) += snd-soc-ssm2602-spi.o
obj-$(CONFIG_SND_SOC_SSM2602_I2C) += snd-soc-ssm2602-i2c.o
+obj-$(CONFIG_SND_SOC_SSM4567) += snd-soc-ssm4567.o
obj-$(CONFIG_SND_SOC_STA32X) += snd-soc-sta32x.o
obj-$(CONFIG_SND_SOC_STA350) += snd-soc-sta350.o
obj-$(CONFIG_SND_SOC_STA529) += snd-soc-sta529.o
diff --git a/sound/soc/codecs/ssm4567.c b/sound/soc/codecs/ssm4567.c
new file mode 100644
index 0000000..fb92248
--- /dev/null
+++ b/sound/soc/codecs/ssm4567.c
@@ -0,0 +1,350 @@
+/*
+ * SSM4567 amplifier audio driver
+ *
+ * Copyright 2014 Google Chromium project.
+ * Author: Anatol Pomozov <anatol(a)chromium.org>
+ *
+ * Based on code copyright/by:
+ * Copyright 2013 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2.
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/i2c.h>
+#include <linux/regmap.h>
+#include <linux/slab.h>
+#include <linux/gpio.h>
+#include <linux/of_gpio.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
+#include <sound/soc.h>
+#include <sound/initval.h>
+#include <sound/tlv.h>
+
+#define SSM4567_REG_POWER_CTRL 0x00
+#define SSM4567_REG_AMP_SNS_CTRL 0x01
+#define SSM4567_REG_DAC_CTRL 0x02
+#define SSM4567_REG_DAC_VOLUME 0x03
+#define SSM4567_REG_SAI_CTRL_1 0x04
+#define SSM4567_REG_SAI_CTRL_2 0x05
+#define SSM4567_REG_SAI_PLACEMENT_1 0x06
+#define SSM4567_REG_SAI_PLACEMENT_2 0x07
+#define SSM4567_REG_SAI_PLACEMENT_3 0x08
+#define SSM4567_REG_SAI_PLACEMENT_4 0x09
+#define SSM4567_REG_SAI_PLACEMENT_5 0x0a
+#define SSM4567_REG_SAI_PLACEMENT_6 0x0b
+#define SSM4567_REG_BATTERY_V_OUT 0x0c
+#define SSM4567_REG_LIMITER_CTRL_1 0x0d
+#define SSM4567_REG_LIMITER_CTRL_2 0x0e
+#define SSM4567_REG_LIMITER_CTRL_3 0x0f
+#define SSM4567_REG_STATUS_1 0x10
+#define SSM4567_REG_STATUS_2 0x11
+#define SSM4567_REG_FAULT_CTRL 0x12
+#define SSM4567_REG_PDM_CTRL 0x13
+#define SSM4567_REG_MCLK_RATIO 0x14
+#define SSM4567_REG_BOOST_CTRL_1 0x15
+#define SSM4567_REG_BOOST_CTRL_2 0x16
+#define SSM4567_REG_SOFT_RESET 0xff
+
+/* POWER_CTRL */
+#define SSM4567_POWER_APWDN_EN BIT(7)
+#define SSM4567_POWER_BSNS_PWDN BIT(6)
+#define SSM4567_POWER_VSNS_PWDN BIT(5)
+#define SSM4567_POWER_ISNS_PWDN BIT(4)
+#define SSM4567_POWER_BOOST_PWDN BIT(3)
+#define SSM4567_POWER_AMP_PWDN BIT(2)
+#define SSM4567_POWER_VBAT_ONLY BIT(1)
+#define SSM4567_POWER_SPWDN BIT(0)
+
+/* DAC_CTRL */
+#define SSM4567_DAC_HV BIT(7)
+#define SSM4567_DAC_MUTE BIT(6)
+#define SSM4567_DAC_HPF BIT(5)
+#define SSM4567_DAC_LPM BIT(4)
+#define SSM4567_DAC_FS_MASK 0x7
+#define SSM4567_DAC_FS_8000_12000 0x0
+#define SSM4567_DAC_FS_16000_24000 0x1
+#define SSM4567_DAC_FS_32000_48000 0x2
+#define SSM4567_DAC_FS_64000_96000 0x3
+#define SSM4567_DAC_FS_128000_192000 0x4
+
+struct ssm4567 {
+ struct regmap *regmap;
+};
+
+static const struct reg_default ssm4567_reg_defaults[] = {
+ { SSM4567_REG_POWER_CTRL, 0x81 },
+ { SSM4567_REG_AMP_SNS_CTRL, 0x09 },
+ { SSM4567_REG_DAC_CTRL, 0x32 },
+ { SSM4567_REG_DAC_VOLUME, 0x40 },
+ { SSM4567_REG_SAI_CTRL_1, 0x00 },
+ { SSM4567_REG_SAI_CTRL_2, 0x08 },
+ { SSM4567_REG_SAI_PLACEMENT_1, 0x01 },
+ { SSM4567_REG_SAI_PLACEMENT_2, 0x20 },
+ { SSM4567_REG_SAI_PLACEMENT_3, 0x32 },
+ { SSM4567_REG_SAI_PLACEMENT_4, 0x07 },
+ { SSM4567_REG_SAI_PLACEMENT_5, 0x07 },
+ { SSM4567_REG_SAI_PLACEMENT_6, 0x07 },
+ { SSM4567_REG_BATTERY_V_OUT, 0x00 },
+ { SSM4567_REG_LIMITER_CTRL_1, 0xa4 },
+ { SSM4567_REG_LIMITER_CTRL_2, 0x73 },
+ { SSM4567_REG_LIMITER_CTRL_3, 0x00 },
+ { SSM4567_REG_STATUS_1, 0x00 },
+ { SSM4567_REG_STATUS_2, 0x00 },
+ { SSM4567_REG_FAULT_CTRL, 0x30 },
+ { SSM4567_REG_PDM_CTRL, 0x40 },
+ { SSM4567_REG_MCLK_RATIO, 0x11 },
+ { SSM4567_REG_BOOST_CTRL_1, 0x03 },
+ { SSM4567_REG_BOOST_CTRL_2, 0x00 },
+ { SSM4567_REG_SOFT_RESET, 0x00 },
+};
+
+
+static bool ssm4567_readable_reg(struct device *dev, unsigned int reg)
+{
+ switch (reg) {
+ case SSM4567_REG_POWER_CTRL ... SSM4567_REG_BOOST_CTRL_2:
+ return true;
+ default:
+ return false;
+ }
+
+}
+
+static bool ssm4567_writeable_reg(struct device *dev, unsigned int reg)
+{
+ switch (reg) {
+ case SSM4567_REG_POWER_CTRL ... SSM4567_REG_SAI_PLACEMENT_6:
+ case SSM4567_REG_LIMITER_CTRL_1 ... SSM4567_REG_LIMITER_CTRL_3:
+ case SSM4567_REG_FAULT_CTRL ... SSM4567_REG_BOOST_CTRL_2:
+ /* The datasheet states that soft reset register is read-only,
+ * but logically it is write-only. */
+ case SSM4567_REG_SOFT_RESET:
+ return true;
+ default:
+ return false;
+ }
+}
+
+static bool ssm4567_volatile_reg(struct device *dev, unsigned int reg)
+{
+ switch (reg) {
+ case SSM4567_REG_BATTERY_V_OUT:
+ case SSM4567_REG_STATUS_1 ... SSM4567_REG_STATUS_2:
+ case SSM4567_REG_SOFT_RESET:
+ return true;
+ default:
+ return false;
+ }
+}
+
+static const DECLARE_TLV_DB_MINMAX_MUTE(ssm4567_vol_tlv, -7125, 2400);
+
+static const struct snd_kcontrol_new ssm4567_snd_controls[] = {
+ SOC_SINGLE_TLV("Master Playback Volume", SSM4567_REG_DAC_VOLUME, 0,
+ 0xff, 1, ssm4567_vol_tlv),
+ SOC_SINGLE("Master Playback Switch", SSM4567_REG_DAC_CTRL, 6, 1, 1),
+ SOC_SINGLE("DAC Low Power Mode Switch", SSM4567_REG_DAC_CTRL, 4, 1, 0),
+};
+
+static const struct snd_soc_dapm_widget ssm4567_dapm_widgets[] = {
+ SND_SOC_DAPM_DAC("DAC", "HiFi Playback", SSM4567_REG_POWER_CTRL, 2, 1),
+
+ SND_SOC_DAPM_OUTPUT("OUT"),
+};
+
+static const struct snd_soc_dapm_route ssm4567_routes[] = {
+ { "OUT", NULL, "DAC" },
+};
+
+static int ssm4567_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
+{
+ struct snd_soc_codec *codec = dai->codec;
+ struct ssm4567 *ssm4567 = snd_soc_codec_get_drvdata(codec);
+ unsigned int rate = params_rate(params);
+ unsigned int dacfs;
+
+ if (rate >= 8000 && rate <= 12000)
+ dacfs = SSM4567_DAC_FS_8000_12000;
+ else if (rate >= 16000 && rate <= 24000)
+ dacfs = SSM4567_DAC_FS_16000_24000;
+ else if (rate >= 32000 && rate <= 48000)
+ dacfs = SSM4567_DAC_FS_32000_48000;
+ else if (rate >= 64000 && rate <= 96000)
+ dacfs = SSM4567_DAC_FS_64000_96000;
+ else if (rate >= 64000 && rate <= 96000)
+ dacfs = SSM4567_DAC_FS_64000_96000;
+ else if (rate >= 128000 && rate <= 192000)
+ dacfs = SSM4567_DAC_FS_128000_192000;
+ else
+ return -EINVAL;
+
+ return regmap_update_bits(ssm4567->regmap, SSM4567_REG_DAC_CTRL,
+ SSM4567_DAC_FS_MASK, dacfs);
+}
+
+static int ssm4567_mute(struct snd_soc_dai *dai, int mute)
+{
+ struct ssm4567 *ssm4567 = snd_soc_codec_get_drvdata(dai->codec);
+ unsigned int val;
+
+ val = mute ? SSM4567_DAC_MUTE : 0;
+ return regmap_update_bits(ssm4567->regmap, SSM4567_REG_DAC_CTRL,
+ SSM4567_DAC_MUTE, val);
+}
+
+static int ssm4567_set_power(struct ssm4567 *ssm4567, bool enable)
+{
+ int ret = 0;
+
+ if (!enable) {
+ ret = regmap_update_bits(ssm4567->regmap,
+ SSM4567_REG_POWER_CTRL,
+ SSM4567_POWER_SPWDN, SSM4567_POWER_SPWDN);
+ regcache_mark_dirty(ssm4567->regmap);
+ }
+
+ regcache_cache_only(ssm4567->regmap, !enable);
+
+ if (enable) {
+ ret = regmap_update_bits(ssm4567->regmap,
+ SSM4567_REG_POWER_CTRL,
+ SSM4567_POWER_SPWDN, 0x00);
+ regcache_sync(ssm4567->regmap);
+ }
+
+ return ret;
+}
+
+static int ssm4567_set_bias_level(struct snd_soc_codec *codec,
+ enum snd_soc_bias_level level)
+{
+ struct ssm4567 *ssm4567 = snd_soc_codec_get_drvdata(codec);
+ int ret = 0;
+
+ switch (level) {
+ case SND_SOC_BIAS_ON:
+ break;
+ case SND_SOC_BIAS_PREPARE:
+ break;
+ case SND_SOC_BIAS_STANDBY:
+ if (codec->dapm.bias_level == SND_SOC_BIAS_OFF)
+ ret = ssm4567_set_power(ssm4567, true);
+ break;
+ case SND_SOC_BIAS_OFF:
+ ret = ssm4567_set_power(ssm4567, false);
+ break;
+ }
+
+ if (ret)
+ return ret;
+
+ codec->dapm.bias_level = level;
+
+ return 0;
+}
+
+#define SSM4567_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE | \
+ SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32)
+
+static const struct snd_soc_dai_ops ssm4567_dai_ops = {
+ .hw_params = ssm4567_hw_params,
+ .digital_mute = ssm4567_mute,
+};
+
+static struct snd_soc_dai_driver ssm4567_dai = {
+ .name = "ssm4567-hifi",
+ .playback = {
+ .stream_name = "Playback",
+ .channels_min = 2,
+ .channels_max = 2,
+ .rates = SNDRV_PCM_RATE_8000_192000,
+ .formats = SSM4567_FORMATS,
+ },
+ .ops = &ssm4567_dai_ops,
+};
+
+static struct snd_soc_codec_driver ssm4567_codec_driver = {
+ .set_bias_level = ssm4567_set_bias_level,
+ .idle_bias_off = true,
+
+ .controls = ssm4567_snd_controls,
+ .num_controls = ARRAY_SIZE(ssm4567_snd_controls),
+ .dapm_widgets = ssm4567_dapm_widgets,
+ .num_dapm_widgets = ARRAY_SIZE(ssm4567_dapm_widgets),
+ .dapm_routes = ssm4567_routes,
+ .num_dapm_routes = ARRAY_SIZE(ssm4567_routes),
+};
+
+static const struct regmap_config ssm4567_regmap_config = {
+ .val_bits = 8,
+ .reg_bits = 8,
+
+ .max_register = SSM4567_REG_SOFT_RESET,
+ .readable_reg = ssm4567_readable_reg,
+ .writeable_reg = ssm4567_writeable_reg,
+ .volatile_reg = ssm4567_volatile_reg,
+
+ .cache_type = REGCACHE_RBTREE,
+ .reg_defaults = ssm4567_reg_defaults,
+ .num_reg_defaults = ARRAY_SIZE(ssm4567_reg_defaults),
+};
+
+static int ssm4567_i2c_probe(struct i2c_client *i2c,
+ const struct i2c_device_id *id)
+{
+ struct ssm4567 *ssm4567;
+ int ret;
+
+ ssm4567 = devm_kzalloc(&i2c->dev, sizeof(*ssm4567), GFP_KERNEL);
+ if (ssm4567 == NULL)
+ return -ENOMEM;
+
+ i2c_set_clientdata(i2c, ssm4567);
+
+ ssm4567->regmap = devm_regmap_init_i2c(i2c, &ssm4567_regmap_config);
+ if (IS_ERR(ssm4567->regmap))
+ return PTR_ERR(ssm4567->regmap);
+
+ ret = regmap_write(ssm4567->regmap, SSM4567_REG_SOFT_RESET, 0x00);
+ if (ret)
+ return ret;
+
+ ret = ssm4567_set_power(ssm4567, false);
+ if (ret)
+ return ret;
+
+ return snd_soc_register_codec(&i2c->dev, &ssm4567_codec_driver,
+ &ssm4567_dai, 1);
+}
+
+static int ssm4567_i2c_remove(struct i2c_client *client)
+{
+ snd_soc_unregister_codec(&client->dev);
+ return 0;
+}
+
+static const struct i2c_device_id ssm4567_i2c_ids[] = {
+ { "ssm4567", 0 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, ssm4567_i2c_ids);
+
+static struct i2c_driver ssm4567_driver = {
+ .driver = {
+ .name = "ssm4567",
+ .owner = THIS_MODULE,
+ },
+ .probe = ssm4567_i2c_probe,
+ .remove = ssm4567_i2c_remove,
+ .id_table = ssm4567_i2c_ids,
+};
+module_i2c_driver(ssm4567_driver);
+
+MODULE_DESCRIPTION("ASoC SSM4567 driver");
+MODULE_AUTHOR("Anatol Pomozov <anatol(a)chromium.org>");
+MODULE_LICENSE("GPL");
--
2.1.0.rc2.206.gedb03e5
3
7

Re: [alsa-devel] [PATCH v3 1/5] clk: ti: add "ti, gpio-gate-clock" controlled clock
by Tomi Valkeinen 27 Sep '14
by Tomi Valkeinen 27 Sep '14
27 Sep '14
On 19/09/14 16:12, Nishanth Menon wrote:
> On 09/19/2014 08:07 AM, Tomi Valkeinen wrote:
>> On 16/09/14 23:40, Jyri Sarha wrote:
>>> The added ti,gpio-gate-clock is a basic clock that can be enabled and
>>> disabled trough a gpio output. The DT binding document for the clock
>>> is also added. For EPROBE_DEFER handling the registering of the clock
>>> has to be delayed until of_clk_get() call time.
>>>
>>> Signed-off-by: Jyri Sarha <jsarha(a)ti.com>
>>> ---
>>> .../bindings/clock/ti/gpio-gate-clock.txt | 21 ++
>>> drivers/clk/ti/Makefile | 2 +-
>>> drivers/clk/ti/gpio.c | 202 ++++++++++++++++++++
>>> 3 files changed, 224 insertions(+), 1 deletion(-)
>>> create mode 100644 Documentation/devicetree/bindings/clock/ti/gpio-gate-clock.txt
>>> create mode 100644 drivers/clk/ti/gpio.c
>>
>> Why is this a TI clock? Sounds like a generic one to me.
>
> Like thread: https://lkml.org/lkml/2014/9/5/284 ?
Right, I should've read the earlier versions before making any smart
comments =).
Tomi
2
1
Add support for ES938 3-D Audio Effects Processor found on some ES18xx
(and possibly other) sound cards, doing bass/treble and 3D control.
ES938 is controlled by MIDI SysEx commands sent through card's MPU401 port.
The code opens/closes the MIDI device everytime a mixer control value is
changed so userspace apps can still use the MIDI port. Changing the mixer
controls will fail when the MIDI port is open by an application.
Signed-off-by: Ondrej Zary <linux(a)rainbow-software.org>
---
sound/isa/Kconfig | 4 ++
sound/isa/Makefile | 2 +
sound/isa/es18xx.c | 11 ++-
sound/isa/es938.c | 203 ++++++++++++++++++++++++++++++++++++++++++++++++++++
sound/isa/es938.h | 29 ++++++++
5 files changed, 248 insertions(+), 1 deletion(-)
create mode 100644 sound/isa/es938.c
create mode 100644 sound/isa/es938.h
diff --git a/sound/isa/Kconfig b/sound/isa/Kconfig
index 0216475..db0b678 100644
--- a/sound/isa/Kconfig
+++ b/sound/isa/Kconfig
@@ -17,6 +17,9 @@ config SND_SB16_DSP
select SND_PCM
select SND_SB_COMMON
+config SND_ES938
+ tristate
+
menuconfig SND_ISA
bool "ISA sound devices"
depends on ISA && ISA_DMA_API
@@ -183,6 +186,7 @@ config SND_ES18XX
select SND_OPL3_LIB
select SND_MPU401_UART
select SND_PCM
+ select SND_ES938
help
Say Y here to include support for ESS AudioDrive ES18xx chips.
diff --git a/sound/isa/Makefile b/sound/isa/Makefile
index 9a15f14..d59e0bf 100644
--- a/sound/isa/Makefile
+++ b/sound/isa/Makefile
@@ -8,6 +8,7 @@ snd-als100-objs := als100.o
snd-azt2320-objs := azt2320.o
snd-cmi8328-objs := cmi8328.o
snd-cmi8330-objs := cmi8330.o
+snd-es938-objs := es938.o
snd-es18xx-objs := es18xx.o
snd-opl3sa2-objs := opl3sa2.o
snd-sc6000-objs := sc6000.o
@@ -19,6 +20,7 @@ obj-$(CONFIG_SND_ALS100) += snd-als100.o
obj-$(CONFIG_SND_AZT2320) += snd-azt2320.o
obj-$(CONFIG_SND_CMI8328) += snd-cmi8328.o
obj-$(CONFIG_SND_CMI8330) += snd-cmi8330.o
+obj-$(CONFIG_SND_ES938) += snd-es938.o
obj-$(CONFIG_SND_ES18XX) += snd-es18xx.o
obj-$(CONFIG_SND_OPL3SA2) += snd-opl3sa2.o
obj-$(CONFIG_SND_SC6000) += snd-sc6000.o
diff --git a/sound/isa/es18xx.c b/sound/isa/es18xx.c
index 6faaac6..139cd3b 100644
--- a/sound/isa/es18xx.c
+++ b/sound/isa/es18xx.c
@@ -96,6 +96,7 @@
#define SNDRV_LEGACY_FIND_FREE_IRQ
#define SNDRV_LEGACY_FIND_FREE_DMA
#include <sound/initval.h>
+#include "es938.h"
#define PFX "es18xx: "
@@ -122,6 +123,7 @@ struct snd_es18xx {
struct snd_pcm_substream *playback_b_substream;
struct snd_rawmidi *rmidi;
+ struct snd_es938 es938;
struct snd_kcontrol *hw_volume;
struct snd_kcontrol *hw_switch;
@@ -2167,7 +2169,14 @@ static int snd_audiodrive_probe(struct snd_card *card, int dev)
return err;
}
- return snd_card_register(card);
+ err = snd_card_register(card);
+ if (err < 0)
+ return err;
+
+ if (mpu_port[dev] > 0 && mpu_port[dev] != SNDRV_AUTO_PORT)
+ snd_es938_init(&chip->es938, card, 0, 0);
+
+ return 0;
}
static int snd_es18xx_isa_match(struct device *pdev, unsigned int dev)
diff --git a/sound/isa/es938.c b/sound/isa/es938.c
new file mode 100644
index 0000000..ea1b25c
--- /dev/null
+++ b/sound/isa/es938.c
@@ -0,0 +1,203 @@
+/*
+ * Driver for ESS ES938 3-D Audio Effects Processor
+ * Copyright (c) 2014 Ondrej Zary
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#include <linux/module.h>
+#include <sound/asoundef.h>
+#include <sound/control.h>
+#include <sound/core.h>
+#include <sound/rawmidi.h>
+#include "es938.h"
+
+MODULE_AUTHOR("Ondrej Zary");
+MODULE_DESCRIPTION("ESS ES938");
+MODULE_LICENSE("GPL");
+
+static int snd_es938_read_reg(struct snd_es938 *chip, u8 reg, u8 *out)
+{
+ u8 buf[8];
+ int i = 0, res;
+ u8 sysex[] = { MIDI_CMD_COMMON_SYSEX, 0x00, 0x00, ES938_ID,
+ ES938_CMD_REG_R, reg, MIDI_CMD_COMMON_SYSEX_END };
+ unsigned long end_time;
+
+ snd_rawmidi_kernel_write(chip->rfile.output, sysex, sizeof(sysex));
+
+ memset(buf, 0, sizeof(buf));
+ end_time = jiffies + msecs_to_jiffies(100);
+ while (i < sizeof(buf)) {
+ res = snd_rawmidi_kernel_read(chip->rfile.input, buf + i,
+ sizeof(buf) - i);
+ if (res > 0)
+ i += res;
+ if (time_after(jiffies, end_time))
+ return -1;
+ }
+
+ /* check reply */
+ if (memcmp(buf, sysex, 6) || buf[7] != MIDI_CMD_COMMON_SYSEX_END)
+ return -1;
+
+ if (out)
+ *out = buf[6];
+
+ return 0;
+}
+
+static void snd_es938_write_reg(struct snd_es938 *chip, u8 reg, u8 val)
+{
+ u8 sysex[] = { MIDI_CMD_COMMON_SYSEX, 0x00, 0x00, ES938_ID,
+ ES938_CMD_REG_W, reg, val, MIDI_CMD_COMMON_SYSEX_END };
+
+ snd_rawmidi_kernel_write(chip->rfile.output, sysex, sizeof(sysex));
+ chip->regs[reg] = val;
+}
+
+#define ES938_MIXER(xname, xindex, reg, shift, mask) \
+{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
+.info = snd_es938_info_mixer, \
+.get = snd_es938_get_mixer, .put = snd_es938_put_mixer, \
+.private_value = reg | (shift << 8) | (mask << 16) }
+
+#define ES938_MIXER_TLV(xname, xindex, reg, shift, mask, xtlv) \
+{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
+.access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
+.info = snd_es938_info_mixer, \
+.get = snd_es938_get_mixer, .put = snd_es938_put_mixer, \
+.private_value = reg | (shift << 8) | (mask << 16), \
+.tlv = { .p = (xtlv) } }
+
+static const DECLARE_TLV_DB_SCALE(db_scale_tone, -900, 300, 0);
+
+static struct snd_kcontrol_new snd_es938_controls[] = {
+ES938_MIXER_TLV("Tone Control - Bass", 0, ES938_REG_TONE, 0, 7, db_scale_tone),
+ES938_MIXER_TLV("Tone Control - Treble", 0, ES938_REG_TONE, 4, 7, db_scale_tone),
+ES938_MIXER("3D Control - Level", 0, ES938_REG_SPATIAL, 1, 63),
+ES938_MIXER("3D Control - Switch", 0, ES938_REG_SPATIAL_EN, 0, 1),
+};
+
+int snd_es938_init(struct snd_es938 *chip, struct snd_card *card, int device,
+ int subdevice)
+{
+ int ret, i;
+
+ ret = snd_rawmidi_kernel_open(card, device, subdevice,
+ SNDRV_RAWMIDI_LFLG_OPEN | SNDRV_RAWMIDI_LFLG_APPEND,
+ &chip->rfile);
+ if (ret < 0) {
+ snd_printk(KERN_WARNING "es938: unable to open MIDI device\n");
+ return ret;
+ }
+
+ /* try to read a register to detect chip presence */
+ if (snd_es938_read_reg(chip, ES938_REG_MISC, NULL) < 0) {
+ ret = -ENODEV;
+ goto err;
+ }
+
+ /* write default values (there's no reset) */
+ snd_es938_write_reg(chip, ES938_REG_MISC, 0x49);
+ snd_es938_write_reg(chip, ES938_REG_TONE, 0x33);
+ /* reserved bit 0 must be set for 3D to work */
+ snd_es938_write_reg(chip, ES938_REG_SPATIAL, 0x01);
+ /* datasheet specifies invalid value 0x00 as default */
+ snd_es938_write_reg(chip, ES938_REG_SPATIAL_EN, 0x02);
+ snd_es938_write_reg(chip, ES938_REG_POWER, 0x0e);
+
+ strlcat(card->mixername, " + ES938", sizeof(card->mixername));
+ for (i = 0; i < ARRAY_SIZE(snd_es938_controls); i++) {
+ ret = snd_ctl_add(card,
+ snd_ctl_new1(&snd_es938_controls[i], chip));
+ if (ret < 0)
+ goto err;
+ }
+
+ chip->card = card;
+ chip->device = device;
+ chip->subdevice = subdevice;
+err:
+ snd_rawmidi_kernel_release(&chip->rfile);
+
+ return ret;
+}
+EXPORT_SYMBOL(snd_es938_init);
+
+int snd_es938_info_mixer(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_info *uinfo)
+{
+ int mask = (kcontrol->private_value >> 16) & 0xff;
+
+ uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN :
+ SNDRV_CTL_ELEM_TYPE_INTEGER;
+ uinfo->count = 1;
+ uinfo->value.integer.min = 0;
+ uinfo->value.integer.max = mask;
+ return 0;
+}
+EXPORT_SYMBOL(snd_es938_info_mixer);
+
+int snd_es938_get_mixer(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_es938 *chip = snd_kcontrol_chip(kcontrol);
+ int reg = kcontrol->private_value & 0xff;
+ int shift = (kcontrol->private_value >> 8) & 0xff;
+ int mask = (kcontrol->private_value >> 16) & 0xff;
+ u8 val = chip->regs[reg];
+
+ ucontrol->value.integer.value[0] = (val >> shift) & mask;
+ return 0;
+}
+EXPORT_SYMBOL(snd_es938_get_mixer);
+
+int snd_es938_put_mixer(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_es938 *chip = snd_kcontrol_chip(kcontrol);
+ int reg = kcontrol->private_value & 0xff;
+ int shift = (kcontrol->private_value >> 8) & 0xff;
+ int mask = (kcontrol->private_value >> 16) & 0xff;
+ u8 val = ucontrol->value.integer.value[0] & mask;
+ u8 oldval = chip->regs[reg];
+ u8 newval;
+ int err;
+
+ mask <<= shift;
+ val <<= shift;
+
+ newval = (oldval & ~mask) | val;
+ if (newval == oldval)
+ return 0;
+
+ /* this will fail if the MIDI port is used by an application */
+ err = snd_rawmidi_kernel_open(chip->card, chip->device,
+ chip->subdevice,
+ SNDRV_RAWMIDI_LFLG_OPEN | SNDRV_RAWMIDI_LFLG_APPEND,
+ &chip->rfile);
+ if (err < 0)
+ return err;
+
+ snd_es938_write_reg(chip, reg, newval);
+
+ snd_rawmidi_kernel_release(&chip->rfile);
+
+ return 1;
+}
+EXPORT_SYMBOL(snd_es938_put_mixer);
diff --git a/sound/isa/es938.h b/sound/isa/es938.h
new file mode 100644
index 0000000..b67dfc7
--- /dev/null
+++ b/sound/isa/es938.h
@@ -0,0 +1,29 @@
+#include <sound/tlv.h>
+
+#define ES938_ID 0x7b
+
+#define ES938_CMD_REG_R 0x7e
+#define ES938_CMD_REG_W 0x7f
+
+#define ES938_REG_MISC 0
+#define ES938_REG_TONE 1
+#define ES938_REG_SPATIAL 5
+#define ES938_REG_SPATIAL_EN 6
+#define ES938_REG_POWER 7
+
+struct snd_es938 {
+ u8 regs[8];
+ struct snd_card *card;
+ int device;
+ int subdevice;
+ struct snd_rawmidi_file rfile;
+};
+
+int snd_es938_init(struct snd_es938 *chip, struct snd_card *card, int device,
+ int subdevice);
+int snd_es938_info_mixer(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_info *uinfo);
+int snd_es938_get_mixer(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol);
+int snd_es938_put_mixer(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol);
--
Ondrej Zary
2
1
How should I rewrite this to reflect that codec->card has been removed?
This is codec is on the SOC chip, not an external one.
static int sunxi_codec_trigger(struct snd_pcm_substream *substream, int
cmd, struct snd_soc_dai *dai) {
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_dai *codec_dai = rtd->codec_dai;
struct snd_soc_codec *codec = codec_dai->codec;
struct snd_soc_card *card = codec->card;
struct sunxi_priv *priv = snd_soc_card_get_drvdata(card);
...
Complete file...
https://bitbucket.org/emiliolopez/linux/src/fbfc3e9c092c90574aee454062fc465…
--
Jon Smirl
jonsmirl(a)gmail.com
2
4

[alsa-devel] Question about SNDRV_PCM_STATE_DRAINING and DMA transfer
by Kuninori Morimoto 26 Sep '14
by Kuninori Morimoto 26 Sep '14
26 Sep '14
Hi Mark, ALSA ML
We noticed that DMA seems transfered +1 time when Ctrl-C happen.
But, is this correct ? is this our driver bug ?
our buffer_size is 8192, and DMA transfers 2048 in 1 time.
1. Ctrl-C happen
wait_for_avail() of snd_pcm_lib_write1() returns -ERESTARTSYS immediately
no transfer() are called any more.
2. DMA transfer interrupt happen
This is normal from driver point of view
It calls snd_pcm_period_elapsed() and try to transfer next 2048 byte
3. snd_pcm_common_ioctl1() :: SNDRV_PCM_IOCTL_DRAIN is called
it goes to SNDRV_PCM_STATE_DRAINING status in snd_pcm_drain()
and it wait until all drained.
4. DMA transfer interrupt happen
It calls snd_pcm_period_elapsed() and try to transfer next 2048 byte
snd_pcm_playback_avail() in snd_pcm_update_state() return 2048 this time.
5. DMA transfer interrupt happen
It calls snd_pcm_period_elapsed() and try to transfer next 2048 byte
snd_pcm_playback_avail() in snd_pcm_update_state() return 4096 this time.
6. DMA transfer interrupt happen
It calls snd_pcm_period_elapsed() and try to transfer next 2048 byte
snd_pcm_playback_avail() in snd_pcm_update_state() return 6144 this time.
7. DMA transfer interrupt happen
It calls snd_pcm_period_elapsed() and try to transfer next 2048 byte
snd_pcm_playback_avail() in snd_pcm_update_state() return 8192 this time.
then, it calls snd_pcm_drain_done()
9. snd_soc_dai_ops :: trigger called with SNDRV_PCM_TRIGGER_STOP
driver stops DMA transfer
2) / 4) / 5) / 6) / 7) continue DMA transfer.
but, 1) already quited from snd_pcm_lib_write1() I guess.
So, 2) and 7) uses same buffer ?
What/Where is wrong ?
Best regards
---
Kuninori Morimoto
3
6

[alsa-devel] [PATCH] ASoC: Intel: byt-max98090: Set card as fully routed
by Jarkko Nikula 26 Sep '14
by Jarkko Nikula 26 Sep '14
26 Sep '14
All byt-max98090 audio connections are known and described in DAPM routing
table. Set the fully_routed flag in order to disable unused codec pins.
Signed-off-by: Jarkko Nikula <jarkko.nikula(a)linux.intel.com>
---
sound/soc/intel/byt-max98090.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/sound/soc/intel/byt-max98090.c b/sound/soc/intel/byt-max98090.c
index b8b8af571ef1..d52681e7225e 100644
--- a/sound/soc/intel/byt-max98090.c
+++ b/sound/soc/intel/byt-max98090.c
@@ -139,6 +139,7 @@ static struct snd_soc_card byt_max98090_card = {
.num_dapm_routes = ARRAY_SIZE(byt_max98090_audio_map),
.controls = byt_max98090_controls,
.num_controls = ARRAY_SIZE(byt_max98090_controls),
+ .fully_routed = true,
};
static int byt_max98090_probe(struct platform_device *pdev)
--
2.1.0
1
1
This patch corrects some incorrect default value in the cache.
Signed-off-by: Bard Liao <bardliao(a)realtek.com>
---
sound/soc/codecs/rt286.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/sound/soc/codecs/rt286.c b/sound/soc/codecs/rt286.c
index e4f6102..7a66084 100644
--- a/sound/soc/codecs/rt286.c
+++ b/sound/soc/codecs/rt286.c
@@ -51,7 +51,7 @@ static struct reg_default rt286_index_def[] = {
{ 0x04, 0xaf01 },
{ 0x08, 0x000d },
{ 0x09, 0xd810 },
- { 0x0a, 0x0060 },
+ { 0x0a, 0x0120 },
{ 0x0b, 0x0000 },
{ 0x0d, 0x2800 },
{ 0x0f, 0x0000 },
@@ -60,7 +60,7 @@ static struct reg_default rt286_index_def[] = {
{ 0x33, 0x0208 },
{ 0x49, 0x0004 },
{ 0x4f, 0x50e9 },
- { 0x50, 0x2c00 },
+ { 0x50, 0x2000 },
{ 0x63, 0x2902 },
{ 0x67, 0x1111 },
{ 0x68, 0x1016 },
@@ -104,7 +104,6 @@ static const struct reg_default rt286_reg[] = {
{ 0x02170700, 0x00000000 },
{ 0x02270100, 0x00000000 },
{ 0x02370100, 0x00000000 },
- { 0x02040000, 0x00004002 },
{ 0x01870700, 0x00000020 },
{ 0x00830000, 0x000000c3 },
{ 0x00930000, 0x000000c3 },
--
1.8.1.1.439.g50a6b54
2
2

[alsa-devel] ASoC DPCM has issues when multiple FEs links to same type of codec.
by Tan, Joshua Chu Yeaw 26 Sep '14
by Tan, Joshua Chu Yeaw 26 Sep '14
26 Sep '14
Hi,
ALSA ASoC DPCM FE - BE connection doesn't handle the scenario when a machine driver has multiple FEs linking to same codec type.
Let me use dummy codec as example codec:
FE1 - BE1 (connected to dummy codec instance #1)
FE2 - BE2 (connected to dummy codec instance #2)
FE3 - BE3 (connected to dummy codec instance #3)
DPCM will not be able to correctly identify the Back End from the 2nd pair onwards.
This happens as the codec .stream_name is used 3 times to connect to different Back-Ends.
Say I am using the dummy codec that has a playback .stream_name "Dummy Playback" with 3 I2S AIF.
E.g. I have 3 BE dai links:
static struct snd_soc_dai_link xxx_dailink[] = {
...
{
.name = "I2S0-Codec",
.be_id = 1,
.cpu_dai_name = "i2s0-port",
.platform_name = "xxx-platform",
.no_pcm = 1,
.codec_dai_name = "snd-soc-dummy-dai",
.codec_name = "snd-soc-dummy",
}
{
.name = "I2S1-Codec",
.be_id = 2,
.cpu_dai_name = "i2s1-port",
.platform_name = "xxx-platform",
.no_pcm = 1,
.codec_dai_name = "snd-soc-dummy-dai",
.codec_name = "snd-soc-dummy",
}
{
.name = "I2S2-Codec",
.be_id = 3,
.cpu_dai_name = "i2s2-port",
.platform_name = "xxx-platform",
.no_pcm = 1,
.codec_dai_name = "snd-soc-dummy-dai",
.codec_name = "snd-soc-dummy",
}
/*DAPM routing*/
static const struct snd_soc_dapm_route map[] = {
{ "Dummy Playback", NULL, "I2S0 Tx"},
{ "Dummy Playback", NULL, "I2S1 Tx"},
{ "Dummy Playback", NULL, "I2S2 Tx"},
...
}
The order of the DAI Link affects the connection of the codec stream name widget on a first come first serve basis, in this case, first declared DAI link codec is used.
In soc-pcm.c, when dpcm_fe_dai_open tries to add paths for the 2nd(and later) FE, dpcm_add_paths function will always discover the "Dummy Playback" widget belonging to the back-end of the first DAI link and link it incorrectly.
1. dpcm_add_paths() finds "Dummy Playback" is a snd_soc_dapm_dai_in type, and calls dpcm_get_be()
1101 static int dpcm_add_paths(struct snd_soc_pcm_runtime *fe, int stream,
1102 struct snd_soc_dapm_widget_list **list_)
...
1120 /* is there a valid BE rtd for this widget */
1121 be = dpcm_get_be(card, list->widgets[i], stream);
2. The dpcm_get_be will traverse the list for "Dummy Playback" and return the first back end found.
Line 994 below always finds that I2S0-Codec link matches this condition and will not proceed further to match I2S1-Codec
990 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
991 for (i = 0; i < card->num_links; i++) {
992 be = &card->rtd[i];
993
994 if (!be->dai_link->no_pcm)
995 continue;
996
997 if (be->cpu_dai->playback_widget == widget ||
998 be->codec_dai->playback_widget == widget)
999 return be;
1000 }
1001 } else { --> Same effect also happens in the capture path.
E.g. When I try to playback on the i2s1 (2nd playback device), the following fe-be link happens :
Widget = "I2S1 Tx", Back End = "I2S1-Codec" --> This is the intended link.
Widget = "Dummy Playback", Back End = "I2S0-Codec" --> This is additional problematic link because the first discovered "Dummy Playback" is from the codec in the first DAI link.
This results in soc_pcm_open called twice in dpcm_be_dai_startup function; first for the first Back End (undesired), and then only the correct Back End
Is it possible to add some instance id to the codec name, or some check on the intended FE-BE pairing?
Regards,
Joshua
1
0

[alsa-devel] [PATCH] ASoC: wm8741: Remove unused wm8741_suspend define
by Lars-Peter Clausen 25 Sep '14
by Lars-Peter Clausen 25 Sep '14
25 Sep '14
This driver has no suspend callback.
Signed-off-by: Lars-Peter Clausen <lars(a)metafoo.de>
---
sound/soc/codecs/wm8741.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/sound/soc/codecs/wm8741.c b/sound/soc/codecs/wm8741.c
index a237f16..31bb480 100644
--- a/sound/soc/codecs/wm8741.c
+++ b/sound/soc/codecs/wm8741.c
@@ -413,7 +413,6 @@ static int wm8741_resume(struct snd_soc_codec *codec)
return 0;
}
#else
-#define wm8741_suspend NULL
#define wm8741_resume NULL
#endif
--
1.8.0
2
1

25 Sep '14
Bf5xx and bf6xx reused bf5xx-i2s-pcm.c before. Recently tdm driver
has been merged into bf5xx-i2s-pcm.c and it's not compatible with
bf6xx audio. So create this dma driver and add tdm support later.
Signed-off-by: Scott Jiang <scott.jiang.linux(a)gmail.com>
---
sound/soc/blackfin/Kconfig | 22 ++--
sound/soc/blackfin/Makefile | 2 +
sound/soc/blackfin/bf6xx-pcm.c | 230 ++++++++++++++++++++++++++++++++++++++++
3 files changed, 248 insertions(+), 6 deletions(-)
create mode 100644 sound/soc/blackfin/bf6xx-pcm.c
diff --git a/sound/soc/blackfin/Kconfig b/sound/soc/blackfin/Kconfig
index 6410aa2..9d6bd9d 100644
--- a/sound/soc/blackfin/Kconfig
+++ b/sound/soc/blackfin/Kconfig
@@ -1,8 +1,17 @@
config SND_BF5XX_I2S
tristate "SoC I2S Audio for the ADI Blackfin chip"
- depends on BLACKFIN
- select SND_BF5XX_SOC_SPORT if !BF60x
- select SND_BF6XX_SOC_SPORT if BF60x
+ depends on BLACKFIN && !BF60x
+ select SND_BF5XX_SOC_SPORT
+ help
+ Say Y or M if you want to add support for codecs attached to
+ the Blackfin SPORT (synchronous serial ports) interface in I2S
+ mode (supports single stereo In/Out).
+ You will also need to select the audio interfaces to support below.
+
+config SND_BF6XX_PCM
+ tristate "SoC Audio for the ADI Blackfin BF6xx chip"
+ depends on BF60x
+ select SND_BF6XX_SOC_SPORT
help
Say Y or M if you want to add support for codecs attached to
the Blackfin SPORT (synchronous serial ports) interface in I2S
@@ -11,7 +20,7 @@ config SND_BF5XX_I2S
config SND_BF5XX_SOC_SSM2602
tristate "SoC SSM2602 Audio Codec Add-On Card support"
- depends on SND_BF5XX_I2S && SND_SOC_I2C_AND_SPI
+ depends on (SND_BF5XX_I2S || SND_BF6XX_PCM) && SND_SOC_I2C_AND_SPI
select SND_BF5XX_SOC_I2S if !BF60x
select SND_BF6XX_SOC_I2S if BF60x
select SND_SOC_SSM2602_SPI if SPI_MASTER
@@ -45,8 +54,9 @@ config SND_SOC_BFIN_EVAL_ADAU1373
config SND_SOC_BFIN_EVAL_ADAU1X61
tristate "Support for the EVAL-ADAU1X61 board on Blackfin eval boards"
- depends on SND_BF5XX_I2S && I2C
- select SND_BF5XX_SOC_I2S
+ depends on (SND_BF5XX_I2S || SND_BF6XX_PCM) && I2C
+ select SND_BF5XX_SOC_I2S if !BF60x
+ select SND_BF6XX_SOC_I2S if BF60x
select SND_SOC_ADAU1761_I2C
help
Say Y if you want to add support for the Analog Devices EVAL-ADAU1X61
diff --git a/sound/soc/blackfin/Makefile b/sound/soc/blackfin/Makefile
index f21e948..cef39f6 100644
--- a/sound/soc/blackfin/Makefile
+++ b/sound/soc/blackfin/Makefile
@@ -1,6 +1,7 @@
# Blackfin Platform Support
snd-bf5xx-ac97-objs := bf5xx-ac97-pcm.o
snd-bf5xx-i2s-objs := bf5xx-i2s-pcm.o
+snd-bf6xx-pcm-objs := bf6xx-pcm.o
snd-soc-bf5xx-sport-objs := bf5xx-sport.o
snd-soc-bf6xx-sport-objs := bf6xx-sport.o
snd-soc-bf5xx-ac97-objs := bf5xx-ac97.o
@@ -9,6 +10,7 @@ snd-soc-bf6xx-i2s-objs := bf6xx-i2s.o
obj-$(CONFIG_SND_BF5XX_AC97) += snd-bf5xx-ac97.o
obj-$(CONFIG_SND_BF5XX_I2S) += snd-bf5xx-i2s.o
+obj-$(CONFIG_SND_BF6XX_PCM) += snd-bf6xx-pcm.o
obj-$(CONFIG_SND_BF5XX_SOC_SPORT) += snd-soc-bf5xx-sport.o
obj-$(CONFIG_SND_BF6XX_SOC_SPORT) += snd-soc-bf6xx-sport.o
obj-$(CONFIG_SND_BF5XX_SOC_AC97) += snd-soc-bf5xx-ac97.o
diff --git a/sound/soc/blackfin/bf6xx-pcm.c b/sound/soc/blackfin/bf6xx-pcm.c
new file mode 100644
index 0000000..bad9fbf
--- /dev/null
+++ b/sound/soc/blackfin/bf6xx-pcm.c
@@ -0,0 +1,230 @@
+/*
+ * bf6xx-pcm.c - Analog Devices BF6XX audio dma driver
+ *
+ * Copyright (c) 2014 Analog Devices Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/device.h>
+#include <linux/dma-mapping.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
+#include <sound/soc.h>
+#include <sound/soc-dai.h>
+
+#include "bf6xx-sport.h"
+
+static void bf6xx_dma_irq(void *data)
+{
+ struct snd_pcm_substream *pcm = data;
+ snd_pcm_period_elapsed(pcm);
+}
+
+static const struct snd_pcm_hardware bf6xx_pcm_hardware = {
+ .info = SNDRV_PCM_INFO_INTERLEAVED |
+ SNDRV_PCM_INFO_MMAP |
+ SNDRV_PCM_INFO_MMAP_VALID |
+ SNDRV_PCM_INFO_BLOCK_TRANSFER,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE |
+ SNDRV_PCM_FMTBIT_S24_LE |
+ SNDRV_PCM_FMTBIT_S32_LE,
+ .period_bytes_min = 32,
+ .period_bytes_max = 0x10000,
+ .periods_min = 1,
+ .periods_max = PAGE_SIZE/32,
+ .buffer_bytes_max = 0x20000, /* 128 kbytes */
+ .fifo_size = 16,
+};
+
+static int bf6xx_pcm_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *params)
+{
+ size_t size = params_buffer_bytes(params);
+ snd_pcm_lib_malloc_pages(substream, size);
+
+ return 0;
+}
+
+static int bf6xx_pcm_hw_free(struct snd_pcm_substream *substream)
+{
+ snd_pcm_lib_free_pages(substream);
+
+ return 0;
+}
+
+static int bf6xx_pcm_prepare(struct snd_pcm_substream *substream)
+{
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct sport_device *sport = runtime->private_data;
+ int period_bytes = frames_to_bytes(runtime, runtime->period_size);
+
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+ sport_set_tx_callback(sport, bf6xx_dma_irq, substream);
+ sport_config_tx_dma(sport, runtime->dma_area,
+ runtime->periods, period_bytes);
+ } else {
+ sport_set_rx_callback(sport, bf6xx_dma_irq, substream);
+ sport_config_rx_dma(sport, runtime->dma_area,
+ runtime->periods, period_bytes);
+ }
+
+ return 0;
+}
+
+static int bf6xx_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
+{
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct sport_device *sport = runtime->private_data;
+ int ret = 0;
+
+ switch (cmd) {
+ case SNDRV_PCM_TRIGGER_START:
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ sport_tx_start(sport);
+ else
+ sport_rx_start(sport);
+ break;
+ case SNDRV_PCM_TRIGGER_STOP:
+ case SNDRV_PCM_TRIGGER_SUSPEND:
+ case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ sport_tx_stop(sport);
+ else
+ sport_rx_stop(sport);
+ break;
+ default:
+ ret = -EINVAL;
+ }
+
+ return ret;
+}
+
+static snd_pcm_uframes_t bf6xx_pcm_pointer(struct snd_pcm_substream *substream)
+{
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct sport_device *sport = runtime->private_data;
+ unsigned int diff;
+ snd_pcm_uframes_t frames;
+
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ diff = sport_curr_offset_tx(sport);
+ else
+ diff = sport_curr_offset_rx(sport);
+
+ /*
+ * TX at least can report one frame beyond the end of the
+ * buffer if we hit the wraparound case - clamp to within the
+ * buffer as the ALSA APIs require.
+ */
+ if (diff == snd_pcm_lib_buffer_bytes(substream))
+ diff = 0;
+
+ frames = bytes_to_frames(substream->runtime, diff);
+
+ return frames;
+}
+
+static int bf6xx_pcm_open(struct snd_pcm_substream *substream)
+{
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
+ struct sport_device *sport = snd_soc_dai_get_drvdata(cpu_dai);
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct snd_dma_buffer *buf = &substream->dma_buffer;
+ int ret;
+
+ snd_soc_set_runtime_hwparams(substream, &bf6xx_pcm_hardware);
+
+ ret = snd_pcm_hw_constraint_integer(runtime,
+ SNDRV_PCM_HW_PARAM_PERIODS);
+ if (ret < 0)
+ return ret;
+
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ sport->tx_buf = buf->area;
+ else
+ sport->rx_buf = buf->area;
+
+ runtime->private_data = sport;
+ return 0;
+}
+
+static int bf6xx_pcm_mmap(struct snd_pcm_substream *substream,
+ struct vm_area_struct *vma)
+{
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ size_t size = vma->vm_end - vma->vm_start;
+ vma->vm_start = (unsigned long)runtime->dma_area;
+ vma->vm_end = vma->vm_start + size;
+ vma->vm_flags |= VM_SHARED;
+
+ return 0 ;
+}
+
+static struct snd_pcm_ops bf6xx_pcm_ops = {
+ .open = bf6xx_pcm_open,
+ .ioctl = snd_pcm_lib_ioctl,
+ .hw_params = bf6xx_pcm_hw_params,
+ .hw_free = bf6xx_pcm_hw_free,
+ .prepare = bf6xx_pcm_prepare,
+ .trigger = bf6xx_pcm_trigger,
+ .pointer = bf6xx_pcm_pointer,
+ .mmap = bf6xx_pcm_mmap,
+};
+
+static int bf6xx_pcm_new(struct snd_soc_pcm_runtime *rtd)
+{
+ struct snd_card *card = rtd->card->snd_card;
+ size_t size = bf6xx_pcm_hardware.buffer_bytes_max;
+ int ret = 0;
+
+ ret = dma_coerce_mask_and_coherent(card->dev, DMA_BIT_MASK(32));
+ if (ret)
+ return ret;
+
+ return snd_pcm_lib_preallocate_pages_for_all(rtd->pcm,
+ SNDRV_DMA_TYPE_DEV, card->dev, size, size);
+}
+
+static struct snd_soc_platform_driver bf6xx_soc_platform = {
+ .ops = &bf6xx_pcm_ops,
+ .pcm_new = bf6xx_pcm_new,
+};
+
+static int bfin_soc_platform_probe(struct platform_device *pdev)
+{
+ return snd_soc_register_platform(&pdev->dev, &bf6xx_soc_platform);
+}
+
+static int bfin_soc_platform_remove(struct platform_device *pdev)
+{
+ snd_soc_unregister_platform(&pdev->dev);
+ return 0;
+}
+
+static struct platform_driver bfin_pcm_driver = {
+ .driver = {
+ .name = "bfin-i2s-pcm-audio",
+ .owner = THIS_MODULE,
+ },
+
+ .probe = bfin_soc_platform_probe,
+ .remove = bfin_soc_platform_remove,
+};
+
+module_platform_driver(bfin_pcm_driver);
+
+MODULE_DESCRIPTION("Analog Devices BF6XX audio dma driver");
+MODULE_AUTHOR("Scott Jiang <Scott.Jiang.Linux(a)gmail.com>");
+MODULE_LICENSE("GPL v2");
--
1.7.9.5
2
5

[alsa-devel] [PATCH] ASoC: rt5677: Add gpio-controller DTS documentation
by Anatol Pomozov 25 Sep '14
by Anatol Pomozov 25 Sep '14
25 Sep '14
Signed-off-by: Anatol Pomozov <anatol.pomozov(a)gmail.com>
---
Documentation/devicetree/bindings/sound/rt5677.txt | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/Documentation/devicetree/bindings/sound/rt5677.txt b/Documentation/devicetree/bindings/sound/rt5677.txt
index 98509fb..bd28df6 100644
--- a/Documentation/devicetree/bindings/sound/rt5677.txt
+++ b/Documentation/devicetree/bindings/sound/rt5677.txt
@@ -10,6 +10,11 @@ Required properties:
- interrupts : The CODEC's interrupt output.
+- gpio-controller : Indicates this device is a GPIO controller.
+
+- #gpio-cells : Should be two. The first cell is the pin number and the
+ second cell is used to specify optional parameters (currently unused).
+
Optional properties:
- realtek,pow-ldo2-gpio : The GPIO that controls the CODEC's POW_LDO2 pin.
@@ -36,6 +41,10 @@ rt5677 {
reg = <0x2c>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(W, 3) GPIO_ACTIVE_HIGH>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
realtek,pow-ldo2-gpio =
<&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>;
};
--
2.1.0.rc2.206.gedb03e5
2
1

[alsa-devel] [PATCH] ASoC: trace: Remove trailing new-lines in trace messages
by Anatol Pomozov 25 Sep '14
by Anatol Pomozov 25 Sep '14
25 Sep '14
These new-lines add empty lines to trace output
Signed-off-by: Anatol Pomozov <anatol.pomozov(a)gmail.com>
---
include/trace/events/asoc.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/include/trace/events/asoc.h b/include/trace/events/asoc.h
index 0194a64..b04ee7e 100644
--- a/include/trace/events/asoc.h
+++ b/include/trace/events/asoc.h
@@ -175,7 +175,7 @@ TRACE_EVENT(snd_soc_dapm_output_path,
__entry->path_sink = (long)path->sink;
),
- TP_printk("%c%s -> %s -> %s\n",
+ TP_printk("%c%s -> %s -> %s",
(int) __entry->path_sink &&
(int) __entry->path_connect ? '*' : ' ',
__get_str(wname), __get_str(pname), __get_str(psname))
@@ -204,7 +204,7 @@ TRACE_EVENT(snd_soc_dapm_input_path,
__entry->path_source = (long)path->source;
),
- TP_printk("%c%s <- %s <- %s\n",
+ TP_printk("%c%s <- %s <- %s",
(int) __entry->path_source &&
(int) __entry->path_connect ? '*' : ' ',
__get_str(wname), __get_str(pname), __get_str(psname))
@@ -226,7 +226,7 @@ TRACE_EVENT(snd_soc_dapm_connected,
__entry->stream = stream;
),
- TP_printk("%s: found %d paths\n",
+ TP_printk("%s: found %d paths",
__entry->stream ? "capture" : "playback", __entry->paths)
);
--
2.1.0.rc2.206.gedb03e5
2
1
Hi,
We have a need for our process to poll/monitor the sound cards. This
process needs to provide a unique id for the sound card (e.g. some concat
of name+hardware address) which we can get using snd_ctl_t handle.
However, we also need to provide the number or rx/tx channels each sound
card provides. Doing this using the pcm hw_params after snd_pcm_open won't
work as the device may be in use.
Is there a way for this process to get the number of rx/tx channels without
needing to 'open' the device, e.g. using the snd_ctl_t handle?
One observation I have made is that there is a proc file ( cat
/proc/asound/card1/stream0) that seems to only be populated by the USB
soundcards I have and not the Intel builtin. This has all the information I
require but if it isn't a standard file we can't rely on it.
Thanks
2
1
Hi,
(C.C.ed to alsa-devel and ffado-devel, fot information to the others)
On 23 Sep 2014 00:42, José Razafindranaly wrote:
> Hi,
>
> I own a mackie Onyx 400F that works very well with your driver (and which was not supported by ffado).
> So I'm very happy with it now: thank you so much!
> It works for playing and recording sound.
> My computer runs linux Mint Petra, with a 3.10.0-20 lowlatency kernel
>
> Few monthes ago, when I first installed your driver I had some minor issues:
>
> - with the alsa-loop-jack bridge of "cadence" (weird sound after several minutes of video playback or gaming for example), but It may not be your driver's fault. It worked again after stopping and restarting jack.
> - some sampling frequencies didn't work with the jack server.
>
> I recently reinstalled the driver, and these issues seem fixed.
> I still have to do further recording tests with my new setup.
> I'm ready to do more state of the art bug reporting if you want me to. Just keep in mind that I'm quite a rookie regarding command lines.
>
>
> In conclusion, I'm really impressed by your work and I think you can write that the onyx 400F is reported to work with your driver.
>
> Kind regards.
Thanks for your report. It's pretty nice to hear that your 400F works
with my drivers.
Here I have a question. Have you evet tried with FFADO to drive your
400F? If so and FFADO doesn't drive, I want to clear the reason. I would
like you to get teminal dumps of "ffado-debug ffado-test Discover -v 8"
and send it to me. I reccomend to redirect stdout to file by using ">",
like:
$ ffado-debug ffado-test Discover -v 8 > dump_file_name
Regards
Takashi Sakamoto
o-takashi(a)sakamocchi.jp
1
0

24 Sep '14
On Thu, 2014-09-04 at 18:02 +0200, Arnd Bergmann wrote:
> On Thursday 04 September 2014, Paul Bolle wrote:
> > References to MACH_GONI and MACH_AQUILA can still be seen in v3.17-rc3
> > and next-20140903. Note that as consequence SND_SOC_GONI_AQUILA_WM8994
> > can not be set anymore.
> >
> [...]
>
> I think it would be nice if you could submit a patch to remove the
> drivers from ASoC, then we can see if anybody complains.
Same thing for v3.17-rc5 and next-20140918. Let's see if we can remove
the goni or aquila with wm8994 driver.
Done on top of next-20140918. Untested.
--------->8---------
From: Paul Bolle <pebolle(a)tiscali.nl>
Commit 28c8331d386a ("ARM: S5PV210: Remove support for board files")
removed the Kconfig symbols MACH_GONI and MACH_AQUILA. As a result the
dependencies of SND_SOC_GONI_AQUILA_WM8994 can never be met. So remove
the unbuildable "SoC I2S Audio support for AQUILA/GONI - WM8994".
Signed-off-by: Paul Bolle <pebolle(a)tiscali.nl>
---
sound/soc/samsung/Kconfig | 11 --
sound/soc/samsung/Makefile | 2 -
sound/soc/samsung/goni_wm8994.c | 304 ----------------------------------------
3 files changed, 317 deletions(-)
delete mode 100644 sound/soc/samsung/goni_wm8994.c
diff --git a/sound/soc/samsung/Kconfig b/sound/soc/samsung/Kconfig
index 55a38697443d..9d9b149ad977 100644
--- a/sound/soc/samsung/Kconfig
+++ b/sound/soc/samsung/Kconfig
@@ -146,17 +146,6 @@ config SND_SOC_SMARTQ
select SND_SAMSUNG_I2S
select SND_SOC_WM8750
-config SND_SOC_GONI_AQUILA_WM8994
- tristate "SoC I2S Audio support for AQUILA/GONI - WM8994"
- depends on SND_SOC_SAMSUNG && (MACH_GONI || MACH_AQUILA)
- depends on I2C=y
- select SND_SAMSUNG_I2S
- select MFD_WM8994
- select SND_SOC_WM8994
- help
- Say Y if you want to add support for SoC audio on goni or aquila
- with the WM8994.
-
config SND_SOC_SAMSUNG_SMDK_SPDIF
tristate "SoC S/PDIF Audio support for SMDK"
depends on SND_SOC_SAMSUNG
diff --git a/sound/soc/samsung/Makefile b/sound/soc/samsung/Makefile
index 91505ddaaf95..c30293a67176 100644
--- a/sound/soc/samsung/Makefile
+++ b/sound/soc/samsung/Makefile
@@ -35,7 +35,6 @@ snd-soc-smdk-wm8994-objs := smdk_wm8994.o
snd-soc-snow-objs := snow.o
snd-soc-smdk-wm9713-objs := smdk_wm9713.o
snd-soc-s3c64xx-smartq-wm8987-objs := smartq_wm8987.o
-snd-soc-goni-wm8994-objs := goni_wm8994.o
snd-soc-smdk-spdif-objs := smdk_spdif.o
snd-soc-smdk-wm8580pcm-objs := smdk_wm8580pcm.o
snd-soc-smdk-wm8994pcm-objs := smdk_wm8994pcm.o
@@ -62,7 +61,6 @@ obj-$(CONFIG_SND_SOC_SNOW) += snd-soc-snow.o
obj-$(CONFIG_SND_SOC_SAMSUNG_SMDK_WM9713) += snd-soc-smdk-wm9713.o
obj-$(CONFIG_SND_SOC_SMARTQ) += snd-soc-s3c64xx-smartq-wm8987.o
obj-$(CONFIG_SND_SOC_SAMSUNG_SMDK_SPDIF) += snd-soc-smdk-spdif.o
-obj-$(CONFIG_SND_SOC_GONI_AQUILA_WM8994) += snd-soc-goni-wm8994.o
obj-$(CONFIG_SND_SOC_SMDK_WM8580_PCM) += snd-soc-smdk-wm8580pcm.o
obj-$(CONFIG_SND_SOC_SMDK_WM8994_PCM) += snd-soc-smdk-wm8994pcm.o
obj-$(CONFIG_SND_SOC_SPEYSIDE) += snd-soc-speyside.o
diff --git a/sound/soc/samsung/goni_wm8994.c b/sound/soc/samsung/goni_wm8994.c
deleted file mode 100644
index 3b527dcfc0aa..000000000000
--- a/sound/soc/samsung/goni_wm8994.c
+++ /dev/null
@@ -1,304 +0,0 @@
-/*
- * goni_wm8994.c
- *
- * Copyright (C) 2010 Samsung Electronics Co.Ltd
- * Author: Chanwoo Choi <cw00.choi(a)samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-
-#include <linux/module.h>
-#include <sound/soc.h>
-#include <sound/jack.h>
-
-#include <asm/mach-types.h>
-#include <mach/gpio-samsung.h>
-
-#include "../codecs/wm8994.h"
-
-#define MACHINE_NAME 0
-#define CPU_VOICE_DAI 1
-
-static const char *aquila_str[] = {
- [MACHINE_NAME] = "aquila",
- [CPU_VOICE_DAI] = "aquila-voice-dai",
-};
-
-static struct snd_soc_card goni;
-static struct platform_device *goni_snd_device;
-
-/* 3.5 pie jack */
-static struct snd_soc_jack jack;
-
-/* 3.5 pie jack detection DAPM pins */
-static struct snd_soc_jack_pin jack_pins[] = {
- {
- .pin = "Headset Mic",
- .mask = SND_JACK_MICROPHONE,
- }, {
- .pin = "Headset Stereophone",
- .mask = SND_JACK_HEADPHONE | SND_JACK_MECHANICAL |
- SND_JACK_AVOUT,
- },
-};
-
-/* 3.5 pie jack detection gpios */
-static struct snd_soc_jack_gpio jack_gpios[] = {
- {
- .gpio = S5PV210_GPH0(6),
- .name = "DET_3.5",
- .report = SND_JACK_HEADSET | SND_JACK_MECHANICAL |
- SND_JACK_AVOUT,
- .debounce_time = 200,
- },
-};
-
-static const struct snd_soc_dapm_widget goni_dapm_widgets[] = {
- SND_SOC_DAPM_SPK("Ext Left Spk", NULL),
- SND_SOC_DAPM_SPK("Ext Right Spk", NULL),
- SND_SOC_DAPM_SPK("Ext Rcv", NULL),
- SND_SOC_DAPM_HP("Headset Stereophone", NULL),
- SND_SOC_DAPM_MIC("Headset Mic", NULL),
- SND_SOC_DAPM_MIC("Main Mic", NULL),
- SND_SOC_DAPM_MIC("2nd Mic", NULL),
- SND_SOC_DAPM_LINE("Radio In", NULL),
-};
-
-static const struct snd_soc_dapm_route goni_dapm_routes[] = {
- {"Ext Left Spk", NULL, "SPKOUTLP"},
- {"Ext Left Spk", NULL, "SPKOUTLN"},
-
- {"Ext Right Spk", NULL, "SPKOUTRP"},
- {"Ext Right Spk", NULL, "SPKOUTRN"},
-
- {"Ext Rcv", NULL, "HPOUT2N"},
- {"Ext Rcv", NULL, "HPOUT2P"},
-
- {"Headset Stereophone", NULL, "HPOUT1L"},
- {"Headset Stereophone", NULL, "HPOUT1R"},
-
- {"IN1RN", NULL, "Headset Mic"},
- {"IN1RP", NULL, "Headset Mic"},
-
- {"IN1RN", NULL, "2nd Mic"},
- {"IN1RP", NULL, "2nd Mic"},
-
- {"IN1LN", NULL, "Main Mic"},
- {"IN1LP", NULL, "Main Mic"},
-
- {"IN2LN", NULL, "Radio In"},
- {"IN2RN", NULL, "Radio In"},
-};
-
-static int goni_wm8994_init(struct snd_soc_pcm_runtime *rtd)
-{
- struct snd_soc_codec *codec = rtd->codec;
- struct snd_soc_dapm_context *dapm = &codec->dapm;
- int ret;
-
- /* set endpoints to not connected */
- snd_soc_dapm_nc_pin(dapm, "IN2LP:VXRN");
- snd_soc_dapm_nc_pin(dapm, "IN2RP:VXRP");
- snd_soc_dapm_nc_pin(dapm, "LINEOUT1N");
- snd_soc_dapm_nc_pin(dapm, "LINEOUT1P");
- snd_soc_dapm_nc_pin(dapm, "LINEOUT2N");
- snd_soc_dapm_nc_pin(dapm, "LINEOUT2P");
-
- if (machine_is_aquila()) {
- snd_soc_dapm_nc_pin(dapm, "SPKOUTRN");
- snd_soc_dapm_nc_pin(dapm, "SPKOUTRP");
- }
-
- /* Headset jack detection */
- ret = snd_soc_jack_new(codec, "Headset Jack",
- SND_JACK_HEADSET | SND_JACK_MECHANICAL | SND_JACK_AVOUT,
- &jack);
- if (ret)
- return ret;
-
- ret = snd_soc_jack_add_pins(&jack, ARRAY_SIZE(jack_pins), jack_pins);
- if (ret)
- return ret;
-
- ret = snd_soc_jack_add_gpios(&jack, ARRAY_SIZE(jack_gpios), jack_gpios);
- if (ret)
- return ret;
-
- return 0;
-}
-
-static int goni_hifi_hw_params(struct snd_pcm_substream *substream,
- struct snd_pcm_hw_params *params)
-{
- struct snd_soc_pcm_runtime *rtd = substream->private_data;
- struct snd_soc_dai *codec_dai = rtd->codec_dai;
- struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
- unsigned int pll_out = 24000000;
- int ret = 0;
-
- /* set the cpu DAI configuration */
- ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S |
- SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBM_CFM);
- if (ret < 0)
- return ret;
-
- /* set codec DAI configuration */
- ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_I2S |
- SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBM_CFM);
- if (ret < 0)
- return ret;
-
- /* set the codec FLL */
- ret = snd_soc_dai_set_pll(codec_dai, WM8994_FLL1, 0, pll_out,
- params_rate(params) * 256);
- if (ret < 0)
- return ret;
-
- /* set the codec system clock */
- ret = snd_soc_dai_set_sysclk(codec_dai, WM8994_SYSCLK_FLL1,
- params_rate(params) * 256, SND_SOC_CLOCK_IN);
- if (ret < 0)
- return ret;
-
- return 0;
-}
-
-static struct snd_soc_ops goni_hifi_ops = {
- .hw_params = goni_hifi_hw_params,
-};
-
-static int goni_voice_hw_params(struct snd_pcm_substream *substream,
- struct snd_pcm_hw_params *params)
-{
- struct snd_soc_pcm_runtime *rtd = substream->private_data;
- struct snd_soc_dai *codec_dai = rtd->codec_dai;
- unsigned int pll_out = 24000000;
- int ret = 0;
-
- if (params_rate(params) != 8000)
- return -EINVAL;
-
- /* set codec DAI configuration */
- ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_LEFT_J |
- SND_SOC_DAIFMT_IB_IF | SND_SOC_DAIFMT_CBM_CFM);
- if (ret < 0)
- return ret;
-
- /* set the codec FLL */
- ret = snd_soc_dai_set_pll(codec_dai, WM8994_FLL2, 0, pll_out,
- params_rate(params) * 256);
- if (ret < 0)
- return ret;
-
- /* set the codec system clock */
- ret = snd_soc_dai_set_sysclk(codec_dai, WM8994_SYSCLK_FLL2,
- params_rate(params) * 256, SND_SOC_CLOCK_IN);
- if (ret < 0)
- return ret;
-
- return 0;
-}
-
-static struct snd_soc_dai_driver voice_dai = {
- .name = "goni-voice-dai",
- .id = 0,
- .playback = {
- .channels_min = 1,
- .channels_max = 2,
- .rates = SNDRV_PCM_RATE_8000,
- .formats = SNDRV_PCM_FMTBIT_S16_LE,},
- .capture = {
- .channels_min = 1,
- .channels_max = 2,
- .rates = SNDRV_PCM_RATE_8000,
- .formats = SNDRV_PCM_FMTBIT_S16_LE,},
-};
-
-static const struct snd_soc_component_driver voice_component = {
- .name = "goni-voice",
-};
-
-static struct snd_soc_ops goni_voice_ops = {
- .hw_params = goni_voice_hw_params,
-};
-
-static struct snd_soc_dai_link goni_dai[] = {
-{
- .name = "WM8994",
- .stream_name = "WM8994 HiFi",
- .cpu_dai_name = "samsung-i2s.0",
- .codec_dai_name = "wm8994-aif1",
- .platform_name = "samsung-i2s.0",
- .codec_name = "wm8994-codec.0-001a",
- .init = goni_wm8994_init,
- .ops = &goni_hifi_ops,
-}, {
- .name = "WM8994 Voice",
- .stream_name = "Voice",
- .cpu_dai_name = "goni-voice-dai",
- .codec_dai_name = "wm8994-aif2",
- .codec_name = "wm8994-codec.0-001a",
- .ops = &goni_voice_ops,
-},
-};
-
-static struct snd_soc_card goni = {
- .name = "goni",
- .owner = THIS_MODULE,
- .dai_link = goni_dai,
- .num_links = ARRAY_SIZE(goni_dai),
-
- .dapm_widgets = goni_dapm_widgets,
- .num_dapm_widgets = ARRAY_SIZE(goni_dapm_widgets),
- .dapm_routes = goni_dapm_routes,
- .num_dapm_routes = ARRAY_SIZE(goni_dapm_routes),
-};
-
-static int __init goni_init(void)
-{
- int ret;
-
- if (machine_is_aquila()) {
- voice_dai.name = aquila_str[CPU_VOICE_DAI];
- goni_dai[1].cpu_dai_name = aquila_str[CPU_VOICE_DAI];
- goni.name = aquila_str[MACHINE_NAME];
- } else if (!machine_is_goni())
- return -ENODEV;
-
- goni_snd_device = platform_device_alloc("soc-audio", -1);
- if (!goni_snd_device)
- return -ENOMEM;
-
- /* register voice DAI here */
- ret = devm_snd_soc_register_component(&goni_snd_device->dev,
- &voice_component, &voice_dai, 1);
- if (ret) {
- platform_device_put(goni_snd_device);
- return ret;
- }
-
- platform_set_drvdata(goni_snd_device, &goni);
- ret = platform_device_add(goni_snd_device);
-
- if (ret)
- platform_device_put(goni_snd_device);
-
- return ret;
-}
-
-static void __exit goni_exit(void)
-{
- platform_device_unregister(goni_snd_device);
-}
-
-module_init(goni_init);
-module_exit(goni_exit);
-
-/* Module information */
-MODULE_DESCRIPTION("ALSA SoC WM8994 GONI(S5PV210)");
-MODULE_AUTHOR("Chanwoo Choi <cw00.choi(a)samsung.com>");
-MODULE_LICENSE("GPL");
--
1.9.3
2
4

[alsa-devel] [PATCH] ASoC: samsung-i2s: Maintain CDCLK settings across i2s_{shutdown/startup}
by Sylwester Nawrocki 24 Sep '14
by Sylwester Nawrocki 24 Sep '14
24 Sep '14
Currently configuration of the CDCLK pad is being overwritten in
the i2s_shutdown() callback in order to gate the SoC output clock.
However if an ASoC machine driver doesn't restore that clock
settings each time after opening the sound device this results
in the CDCLK pin being permanently configured into input mode.
I.e. the output clock will always stay disabled.
Fix that by saving the CDCLKCON bit state in i2s_shutdown() and
and restoring it in the i2s_startup() callback.
Signed-off-by: Chen Zhen <zhen1.chen(a)samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki(a)samsung.com>
---
sound/soc/samsung/i2s.c | 13 +++++++++++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index 2ac76fa..3cb3e95 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -68,6 +68,8 @@ struct i2s_dai {
#define DAI_OPENED (1 << 0) /* Dai is opened */
#define DAI_MANAGER (1 << 1) /* Dai is the manager */
unsigned mode;
+ /* CDCLK pin direction: 0 - input, 1 - output */
+ unsigned int cdclk_out:1;
/* Driver for this DAI */
struct snd_soc_dai_driver i2s_dai_drv;
/* DMA parameters */
@@ -737,6 +739,9 @@ static int i2s_startup(struct snd_pcm_substream *substream,
spin_unlock_irqrestore(&lock, flags);
+ if (!is_opened(other) && i2s->cdclk_out)
+ i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
+ 0, SND_SOC_CLOCK_OUT);
return 0;
}
@@ -752,9 +757,13 @@ static void i2s_shutdown(struct snd_pcm_substream *substream,
i2s->mode &= ~DAI_OPENED;
i2s->mode &= ~DAI_MANAGER;
- if (is_opened(other))
+ if (is_opened(other)) {
other->mode |= DAI_MANAGER;
-
+ } else {
+ u32 mod = readl(i2s->addr + I2SMOD);
+ i2s->cdclk_out = !(mod & MOD_CDCLKCON);
+ other->cdclk_out = i2s->cdclk_out;
+ }
/* Reset any constraint on RFS and BFS */
i2s->rfs = 0;
i2s->bfs = 0;
--
1.7.9.5
3
2

24 Sep '14
Fix double unlock of fe card mutex introduced by patch 8f70e515a8bb
"ASoC: soc-pcm: fix dpcm_path_get error handling"
The first unlock is at line 106, and the unlock is at line 149. we
should remove the first unlock.
Reported-by: Dan Carpenter <dan.carpenter(a)oracle.com>
Signed-off-by: Qiao Zhou <zhouqiao(a)marvell.com>
---
sound/soc/soc-compress.c | 6 ++----
1 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/sound/soc/soc-compress.c b/sound/soc/soc-compress.c
index 3092b58..cecfab3 100644
--- a/sound/soc/soc-compress.c
+++ b/sound/soc/soc-compress.c
@@ -102,13 +102,11 @@ static int soc_compr_open_fe(struct snd_compr_stream *cstream)
fe->dpcm[stream].runtime = fe_substream->runtime;
ret = dpcm_path_get(fe, stream, &list);
- if (ret < 0) {
- mutex_unlock(&fe->card->mutex);
+ if (ret < 0)
goto fe_err;
- } else if (ret == 0) {
+ else if (ret == 0)
dev_dbg(fe->dev, "ASoC: %s no valid %s route\n",
fe->dai_link->name, stream ? "capture" : "playback");
- }
/* calculate valid and active FE <-> BE dpcms */
dpcm_process_paths(fe, stream, &list, 1);
--
1.7.0.4
2
1

[alsa-devel] [PATCH 1/2] ALSA: hda - Move the function "check_amp_caps" to hda_codec.c
by David Henningsson 24 Sep '14
by David Henningsson 24 Sep '14
24 Sep '14
The next patch will use it, so make it visible across modules.
Signed-off-by: David Henningsson <david.henningsson(a)canonical.com>
---
sound/pci/hda/hda_codec.c | 20 ++++++++++++++++++++
sound/pci/hda/hda_generic.c | 17 -----------------
sound/pci/hda/hda_local.h | 8 ++++++++
3 files changed, 28 insertions(+), 17 deletions(-)
diff --git a/sound/pci/hda/hda_codec.c b/sound/pci/hda/hda_codec.c
index 0aa2e1e..15e0089 100644
--- a/sound/pci/hda/hda_codec.c
+++ b/sound/pci/hda/hda_codec.c
@@ -2002,6 +2002,26 @@ u32 query_amp_caps(struct hda_codec *codec, hda_nid_t nid, int direction)
EXPORT_SYMBOL_GPL(query_amp_caps);
/**
+ * snd_hda_check_amp_caps - query AMP capabilities
+ * @codec: the HD-audio codec
+ * @nid: the NID to query
+ * @dir: either #HDA_INPUT or #HDA_OUTPUT
+ *
+ * Check whether the widget has the given amp capability for the direction.
+ */
+bool snd_hda_check_amp_caps(struct hda_codec *codec, hda_nid_t nid,
+ int dir, unsigned int bits)
+{
+ if (!nid)
+ return false;
+ if (get_wcaps(codec, nid) & (1 << (dir + 1)))
+ if (query_amp_caps(codec, nid, dir) & bits)
+ return true;
+ return false;
+}
+EXPORT_SYMBOL_GPL(snd_hda_check_amp_caps);
+
+/**
* snd_hda_override_amp_caps - Override the AMP capabilities
* @codec: the CODEC to clean up
* @nid: the NID to clean up
diff --git a/sound/pci/hda/hda_generic.c b/sound/pci/hda/hda_generic.c
index 32a85f9..64220c0 100644
--- a/sound/pci/hda/hda_generic.c
+++ b/sound/pci/hda/hda_generic.c
@@ -519,18 +519,6 @@ static unsigned int amp_val_replace_channels(unsigned int val, unsigned int chs)
return val;
}
-/* check whether the widget has the given amp capability for the direction */
-static bool check_amp_caps(struct hda_codec *codec, hda_nid_t nid,
- int dir, unsigned int bits)
-{
- if (!nid)
- return false;
- if (get_wcaps(codec, nid) & (1 << (dir + 1)))
- if (query_amp_caps(codec, nid, dir) & bits)
- return true;
- return false;
-}
-
static bool same_amp_caps(struct hda_codec *codec, hda_nid_t nid1,
hda_nid_t nid2, int dir)
{
@@ -540,11 +528,6 @@ static bool same_amp_caps(struct hda_codec *codec, hda_nid_t nid1,
query_amp_caps(codec, nid2, dir));
}
-#define nid_has_mute(codec, nid, dir) \
- check_amp_caps(codec, nid, dir, (AC_AMPCAP_MUTE | AC_AMPCAP_MIN_MUTE))
-#define nid_has_volume(codec, nid, dir) \
- check_amp_caps(codec, nid, dir, AC_AMPCAP_NUM_STEPS)
-
/* look for a widget suitable for assigning a mute switch in the path */
static hda_nid_t look_for_out_mute_nid(struct hda_codec *codec,
struct nid_path *path)
diff --git a/sound/pci/hda/hda_local.h b/sound/pci/hda/hda_local.h
index 8a018d4..7eb44e7 100644
--- a/sound/pci/hda/hda_local.h
+++ b/sound/pci/hda/hda_local.h
@@ -603,6 +603,14 @@ int snd_hda_override_amp_caps(struct hda_codec *codec, hda_nid_t nid, int dir,
u32 snd_hda_query_pin_caps(struct hda_codec *codec, hda_nid_t nid);
int snd_hda_override_pin_caps(struct hda_codec *codec, hda_nid_t nid,
unsigned int caps);
+bool snd_hda_check_amp_caps(struct hda_codec *codec, hda_nid_t nid,
+ int dir, unsigned int bits);
+
+#define nid_has_mute(codec, nid, dir) \
+ snd_hda_check_amp_caps(codec, nid, dir, (AC_AMPCAP_MUTE | AC_AMPCAP_MIN_MUTE))
+#define nid_has_volume(codec, nid, dir) \
+ snd_hda_check_amp_caps(codec, nid, dir, AC_AMPCAP_NUM_STEPS)
+
/* flags for hda_nid_item */
#define HDA_NID_ITEM_AMP (1<<0)
--
1.9.1
3
5

[alsa-devel] [PATCH] ASoC: rt5677: Add a configuration option for LDO2_POW pin
by Anatol Pomozov 24 Sep '14
by Anatol Pomozov 24 Sep '14
24 Sep '14
Some boards have this pin statically tied and do not require any configuration,
some other boards allow to enable chip using GPIO.
Add an option that tells which GPIO is used to power the audio codec.
Signed-off-by: Anatol Pomozov <anatol.pomozov(a)gmail.com>
---
Documentation/devicetree/bindings/sound/rt5677.txt | 41 ++++++++++++++++
sound/soc/codecs/rt5677.c | 54 ++++++++++++++++++++++
sound/soc/codecs/rt5677.h | 1 +
3 files changed, 96 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/rt5677.txt
diff --git a/Documentation/devicetree/bindings/sound/rt5677.txt b/Documentation/devicetree/bindings/sound/rt5677.txt
new file mode 100644
index 0000000..98509fb
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/rt5677.txt
@@ -0,0 +1,41 @@
+RT5677 audio CODEC
+
+This device supports I2C only.
+
+Required properties:
+
+- compatible : "realtek,rt5677".
+
+- reg : The I2C address of the device.
+
+- interrupts : The CODEC's interrupt output.
+
+Optional properties:
+
+- realtek,pow-ldo2-gpio : The GPIO that controls the CODEC's POW_LDO2 pin.
+
+Pins on the device (for linking into audio routes):
+
+ * IN1P
+ * IN1N
+ * IN2P
+ * IN2N
+ * MICBIAS1
+ * DMIC1
+ * DMIC2
+ * DMIC3
+ * DMIC4
+ * LOUT1
+ * LOUT2
+ * LOUT3
+
+Example:
+
+rt5677 {
+ compatible = "realtek,rt5677";
+ reg = <0x2c>;
+ interrupt-parent = <&gpio>;
+ interrupts = <TEGRA_GPIO(W, 3) GPIO_ACTIVE_HIGH>;
+ realtek,pow-ldo2-gpio =
+ <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>;
+};
diff --git a/sound/soc/codecs/rt5677.c b/sound/soc/codecs/rt5677.c
index 9847473..83785db 100644
--- a/sound/soc/codecs/rt5677.c
+++ b/sound/soc/codecs/rt5677.c
@@ -15,6 +15,7 @@
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pm.h>
+#include <linux/of_gpio.h>
#include <linux/regmap.h>
#include <linux/i2c.h>
#include <linux/platform_device.h>
@@ -3319,6 +3320,8 @@ static int rt5677_remove(struct snd_soc_codec *codec)
struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec);
regmap_write(rt5677->regmap, RT5677_RESET, 0x10ec);
+ if (gpio_is_valid(rt5677->pow_ldo2))
+ gpio_set_value_cansleep(rt5677->pow_ldo2, 0);
return 0;
}
@@ -3330,6 +3333,8 @@ static int rt5677_suspend(struct snd_soc_codec *codec)
regcache_cache_only(rt5677->regmap, true);
regcache_mark_dirty(rt5677->regmap);
+ if (gpio_is_valid(rt5677->pow_ldo2))
+ gpio_set_value_cansleep(rt5677->pow_ldo2, 0);
return 0;
}
@@ -3338,6 +3343,10 @@ static int rt5677_resume(struct snd_soc_codec *codec)
{
struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec);
+ if (gpio_is_valid(rt5677->pow_ldo2)) {
+ gpio_set_value_cansleep(rt5677->pow_ldo2, 1);
+ msleep(10);
+ }
regcache_cache_only(rt5677->regmap, false);
regcache_sync(rt5677->regmap);
@@ -3495,6 +3504,24 @@ static const struct i2c_device_id rt5677_i2c_id[] = {
};
MODULE_DEVICE_TABLE(i2c, rt5677_i2c_id);
+static int rt5677_parse_dt(struct rt5677_priv *rt5677, struct device_node *np)
+{
+ rt5677->pow_ldo2 = of_get_named_gpio(np,
+ "realtek,pow-ldo2-gpio", 0);
+
+ /*
+ * POW_LDO2 is optional (it may be statically tied on the board).
+ * -ENOENT means that the property doesn't exist, i.e. there is no
+ * GPIO, so is not an error. Any other error code means the property
+ * exists, but could not be parsed.
+ */
+ if (!gpio_is_valid(rt5677->pow_ldo2) &&
+ (rt5677->pow_ldo2 != -ENOENT))
+ return rt5677->pow_ldo2;
+
+ return 0;
+}
+
static int rt5677_i2c_probe(struct i2c_client *i2c,
const struct i2c_device_id *id)
{
@@ -3513,6 +3540,33 @@ static int rt5677_i2c_probe(struct i2c_client *i2c,
if (pdata)
rt5677->pdata = *pdata;
+ if (i2c->dev.of_node) {
+ ret = rt5677_parse_dt(rt5677, i2c->dev.of_node);
+ if (ret) {
+ dev_err(&i2c->dev, "Failed to parse device tree: %d\n",
+ ret);
+ return ret;
+ }
+ } else {
+ rt5677->pow_ldo2 = -EINVAL;
+ }
+
+ if (gpio_is_valid(rt5677->pow_ldo2)) {
+ ret = devm_gpio_request_one(&i2c->dev, rt5677->pow_ldo2,
+ GPIOF_OUT_INIT_HIGH,
+ "RT5677 POW_LDO2");
+ if (ret < 0) {
+ dev_err(&i2c->dev, "Failed to request POW_LDO2 %d: %d\n",
+ rt5677->pow_ldo2, ret);
+ return ret;
+ }
+ /* Wait a while until I2C bus becomes available. The datasheet
+ * does not specify the exact we should wait but startup
+ * sequence mentiones at least a few milliseconds.
+ */
+ msleep(10);
+ }
+
rt5677->regmap = devm_regmap_init_i2c(i2c, &rt5677_regmap);
if (IS_ERR(rt5677->regmap)) {
ret = PTR_ERR(rt5677->regmap);
diff --git a/sound/soc/codecs/rt5677.h b/sound/soc/codecs/rt5677.h
index b61b72c..222a4137 100644
--- a/sound/soc/codecs/rt5677.h
+++ b/sound/soc/codecs/rt5677.h
@@ -1550,6 +1550,7 @@ struct rt5677_priv {
int pll_src;
int pll_in;
int pll_out;
+ int pow_ldo2; /* POW_LDO2 pin */
#ifdef CONFIG_GPIOLIB
struct gpio_chip gpio_chip;
#endif
--
2.1.0.rc2.206.gedb03e5
2
1
We try to write index registers into cache when we write an index
register, but we change the reg value before updating the cache.
As a result, the cache is never be updated. This patch will fix
this issue and also correct some incorrect default value in the
cache.
Signed-off-by: Bard Liao <bardliao(a)realtek.com>
---
sound/soc/codecs/rt286.c | 7 +++----
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/sound/soc/codecs/rt286.c b/sound/soc/codecs/rt286.c
index 7dfca82..8ad4b24 100644
--- a/sound/soc/codecs/rt286.c
+++ b/sound/soc/codecs/rt286.c
@@ -51,7 +51,7 @@ static struct reg_default rt286_index_def[] = {
{ 0x04, 0xaf01 },
{ 0x08, 0x000d },
{ 0x09, 0xd810 },
- { 0x0a, 0x0060 },
+ { 0x0a, 0x0120 },
{ 0x0b, 0x0000 },
{ 0x0d, 0x2800 },
{ 0x0f, 0x0000 },
@@ -60,7 +60,7 @@ static struct reg_default rt286_index_def[] = {
{ 0x33, 0x0208 },
{ 0x49, 0x0004 },
{ 0x4f, 0x50e9 },
- { 0x50, 0x2c00 },
+ { 0x50, 0x2000 },
{ 0x63, 0x2902 },
{ 0x67, 0x1111 },
{ 0x68, 0x1016 },
@@ -104,7 +104,6 @@ static const struct reg_default rt286_reg[] = {
{ 0x02170700, 0x00000000 },
{ 0x02270100, 0x00000000 },
{ 0x02370100, 0x00000000 },
- { 0x02040000, 0x00004002 },
{ 0x01870700, 0x00000020 },
{ 0x00830000, 0x000000c3 },
{ 0x00930000, 0x000000c3 },
@@ -192,7 +191,6 @@ static int rt286_hw_write(void *context, unsigned int reg, unsigned int value)
/*handle index registers*/
if (reg <= 0xff) {
rt286_hw_write(client, RT286_COEF_INDEX, reg);
- reg = RT286_PROC_COEF;
for (i = 0; i < INDEX_CACHE_SIZE; i++) {
if (reg == rt286->index_cache[i].reg) {
rt286->index_cache[i].def = value;
@@ -200,6 +198,7 @@ static int rt286_hw_write(void *context, unsigned int reg, unsigned int value)
}
}
+ reg = RT286_PROC_COEF;
}
data[0] = (reg >> 24) & 0xff;
--
1.8.1.1.439.g50a6b54
2
1

[alsa-devel] [PATCH 1/5] ASoC: max98090: Move interrupt request from codec probe to i2c probe
by Jarkko Nikula 24 Sep '14
by Jarkko Nikula 24 Sep '14
24 Sep '14
Keep MAX98090 interrupt requested after i2c device probing as long as the
driver is loaded. This fixes the issue where subsequent codec probe
max98090_probe() call fails in interrupt request since interrupt wasn't
freed over codec remove-reprobe cycle.
Signed-off-by: Jarkko Nikula <jarkko.nikula(a)linux.intel.com>
---
sound/soc/codecs/max98090.c | 29 ++++++++++++++++-------------
1 file changed, 16 insertions(+), 13 deletions(-)
diff --git a/sound/soc/codecs/max98090.c b/sound/soc/codecs/max98090.c
index f1543653a699..fe77df6a76c2 100644
--- a/sound/soc/codecs/max98090.c
+++ b/sound/soc/codecs/max98090.c
@@ -2159,12 +2159,16 @@ static void max98090_jack_work(struct work_struct *work)
static irqreturn_t max98090_interrupt(int irq, void *data)
{
- struct snd_soc_codec *codec = data;
- struct max98090_priv *max98090 = snd_soc_codec_get_drvdata(codec);
+ struct max98090_priv *max98090 = data;
+ struct snd_soc_codec *codec = max98090->codec;
int ret;
unsigned int mask;
unsigned int active;
+ /* Treat interrupt before codec is initialized as spurious */
+ if (codec == NULL)
+ return IRQ_NONE;
+
dev_dbg(codec->dev, "***** max98090_interrupt *****\n");
ret = regmap_read(max98090->regmap, M98090_REG_INTERRUPT_S, &mask);
@@ -2367,17 +2371,6 @@ static int max98090_probe(struct snd_soc_codec *codec)
snd_soc_write(codec, M98090_REG_JACK_DETECT,
M98090_JDETEN_MASK | M98090_JDEB_25MS);
- /* Register for interrupts */
- dev_dbg(codec->dev, "irq = %d\n", max98090->irq);
-
- ret = devm_request_threaded_irq(codec->dev, max98090->irq, NULL,
- max98090_interrupt, IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
- "max98090_interrupt", codec);
- if (ret < 0) {
- dev_err(codec->dev, "request_irq failed: %d\n",
- ret);
- }
-
/*
* Clear any old interrupts.
* An old interrupt ocurring prior to installing the ISR
@@ -2417,6 +2410,7 @@ static int max98090_remove(struct snd_soc_codec *codec)
cancel_delayed_work_sync(&max98090->pll_det_enable_work);
cancel_work_sync(&max98090->pll_det_disable_work);
cancel_work_sync(&max98090->pll_work);
+ max98090->codec = NULL;
return 0;
}
@@ -2478,6 +2472,15 @@ static int max98090_i2c_probe(struct i2c_client *i2c,
goto err_enable;
}
+ ret = devm_request_threaded_irq(&i2c->dev, max98090->irq, NULL,
+ max98090_interrupt, IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
+ "max98090_interrupt", max98090);
+ if (ret < 0) {
+ dev_err(&i2c->dev, "request_irq failed: %d\n",
+ ret);
+ return ret;
+ }
+
ret = snd_soc_register_codec(&i2c->dev,
&soc_codec_dev_max98090, max98090_dai,
ARRAY_SIZE(max98090_dai));
--
2.1.0
2
5

Re: [alsa-devel] [PATCH] soc-core: Fix volsw_range funcs so SOC_DOUBLE_R_RANGE_TLV works.
by Mark Brown 24 Sep '14
by Mark Brown 24 Sep '14
24 Sep '14
On Fri, Sep 19, 2014 at 12:50:31PM +0100, Howard Mitchell wrote:
> This fixes a bug when using the SOC_DOUBLE_R_RANGE_TLV macro in
> the invert mode. In the non-invert case, e.g.
Applied, thanks.
1
0
This patch improves WM8971.
We clean the file through checkpatch.
Signed-off-by: Xavier Hsu <xavier.hsu(a)linaro.org>
Signed-off-by: Andy Green <andy.green(a)linaro.org>
---
Any comments about improving the patch are welcome.
Thanks.
sound/soc/codecs/wm8971.c | 108 +++++++++++++++++++++++----------------------
1 file changed, 56 insertions(+), 52 deletions(-)
diff --git a/sound/soc/codecs/wm8971.c b/sound/soc/codecs/wm8971.c
index 0499cd4..c0f7e9b 100644
--- a/sound/soc/codecs/wm8971.c
+++ b/sound/soc/codecs/wm8971.c
@@ -31,7 +31,7 @@
#define WM8971_REG_COUNT 43
-static struct workqueue_struct *wm8971_workq = NULL;
+static struct workqueue_struct *wm8971_workq;
/* codec private data */
struct wm8971_priv {
@@ -92,25 +92,28 @@ static const struct reg_default wm8971_reg_defaults[] = {
#define wm8971_reset(c) snd_soc_write(c, WM8971_RESET, 0)
/* WM8971 Controls */
-static const char *wm8971_bass[] = { "Linear Control", "Adaptive Boost" };
-static const char *wm8971_bass_filter[] = { "130Hz @ 48kHz",
- "200Hz @ 48kHz" };
-static const char *wm8971_treble[] = { "8kHz", "4kHz" };
-static const char *wm8971_alc_func[] = { "Off", "Right", "Left", "Stereo" };
-static const char *wm8971_ng_type[] = { "Constant PGA Gain",
- "Mute ADC Output" };
-static const char *wm8971_deemp[] = { "None", "32kHz", "44.1kHz", "48kHz" };
-static const char *wm8971_mono_mux[] = {"Stereo", "Mono (Left)",
- "Mono (Right)", "Digital Mono"};
-static const char *wm8971_dac_phase[] = { "Non Inverted", "Inverted" };
-static const char *wm8971_lline_mux[] = {"Line", "NC", "NC", "PGA",
- "Differential"};
-static const char *wm8971_rline_mux[] = {"Line", "Mic", "NC", "PGA",
- "Differential"};
-static const char *wm8971_lpga_sel[] = {"Line", "NC", "NC", "Differential"};
-static const char *wm8971_rpga_sel[] = {"Line", "Mic", "NC", "Differential"};
-static const char *wm8971_adcpol[] = {"Normal", "L Invert", "R Invert",
- "L + R Invert"};
+static const char const *wm8971_bass[] = {"Linear Control", "Adaptive Boost"};
+static const char const *wm8971_bass_filter[] = {"130Hz @ 48kHz",
+ "200Hz @ 48kHz"};
+static const char const *wm8971_treble[] = {"8kHz", "4kHz"};
+static const char const *wm8971_alc_func[] = {"Off", "Right",
+ "Left", "Stereo"};
+static const char const *wm8971_ng_type[] = {"Constant PGA Gain",
+ "Mute ADC Output"};
+static const char const *wm8971_deemp[] = {"None", "32kHz", "44.1kHz", "48kHz"};
+static const char const *wm8971_mono_mux[] = {"Stereo", "Mono (Left)",
+ "Mono (Right)", "Digital Mono"};
+static const char const *wm8971_dac_phase[] = {"Non Inverted", "Inverted"};
+static const char const *wm8971_lline_mux[] = {"Line", "NC", "NC",
+ "PGA", "Differential"};
+static const char const *wm8971_rline_mux[] = {"Line", "Mic", "NC",
+ "PGA", "Differential"};
+static const char const *wm8971_lpga_sel[] = {"Line", "NC", "NC",
+ "Differential"};
+static const char const *wm8971_rpga_sel[] = {"Line", "Mic", "NC",
+ "Differential"};
+static const char const *wm8971_adcpol[] = {"Normal", "L Invert",
+ "R Invert", "L + R Invert"};
static const struct soc_enum wm8971_enum[] = {
SOC_ENUM_SINGLE(WM8971_BASS, 7, 2, wm8971_bass), /* 0 */
@@ -136,24 +139,24 @@ static const struct snd_kcontrol_new wm8971_snd_controls[] = {
SOC_DOUBLE_R("Capture Switch", WM8971_LINVOL, WM8971_RINVOL, 7, 1, 1),
SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8971_LOUT1V,
- WM8971_ROUT1V, 7, 1, 0),
+ WM8971_ROUT1V, 7, 1, 0),
SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8971_LOUT2V,
- WM8971_ROUT2V, 7, 1, 0),
+ WM8971_ROUT2V, 7, 1, 0),
SOC_SINGLE("Mono Playback ZC Switch", WM8971_MOUTV, 7, 1, 0),
SOC_DOUBLE_R("PCM Volume", WM8971_LDAC, WM8971_RDAC, 0, 255, 0),
SOC_DOUBLE_R("Bypass Left Playback Volume", WM8971_LOUTM1,
- WM8971_LOUTM2, 4, 7, 1),
+ WM8971_LOUTM2, 4, 7, 1),
SOC_DOUBLE_R("Bypass Right Playback Volume", WM8971_ROUTM1,
- WM8971_ROUTM2, 4, 7, 1),
+ WM8971_ROUTM2, 4, 7, 1),
SOC_DOUBLE_R("Bypass Mono Playback Volume", WM8971_MOUTM1,
- WM8971_MOUTM2, 4, 7, 1),
+ WM8971_MOUTM2, 4, 7, 1),
SOC_DOUBLE_R("Headphone Playback Volume", WM8971_LOUT1V,
- WM8971_ROUT1V, 0, 127, 0),
+ WM8971_ROUT1V, 0, 127, 0),
SOC_DOUBLE_R("Speaker Playback Volume", WM8971_LOUT2V,
- WM8971_ROUT2V, 0, 127, 0),
+ WM8971_ROUT2V, 0, 127, 0),
SOC_ENUM("Bass Boost", wm8971_enum[0]),
SOC_ENUM("Bass Filter", wm8971_enum[1]),
@@ -238,14 +241,14 @@ SOC_DAPM_ENUM("Route", wm8971_enum[13]);
static const struct snd_soc_dapm_widget wm8971_dapm_widgets[] = {
SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0,
- &wm8971_left_mixer_controls[0],
- ARRAY_SIZE(wm8971_left_mixer_controls)),
+ &wm8971_left_mixer_controls[0],
+ ARRAY_SIZE(wm8971_left_mixer_controls)),
SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0,
- &wm8971_right_mixer_controls[0],
- ARRAY_SIZE(wm8971_right_mixer_controls)),
+ &wm8971_right_mixer_controls[0],
+ ARRAY_SIZE(wm8971_right_mixer_controls)),
SND_SOC_DAPM_MIXER("Mono Mixer", WM8971_PWR2, 2, 0,
- &wm8971_mono_mixer_controls[0],
- ARRAY_SIZE(wm8971_mono_mixer_controls)),
+ &wm8971_mono_mixer_controls[0],
+ ARRAY_SIZE(wm8971_mono_mixer_controls)),
SND_SOC_DAPM_PGA("Right Out 2", WM8971_PWR2, 3, 0, NULL, 0),
SND_SOC_DAPM_PGA("Left Out 2", WM8971_PWR2, 4, 0, NULL, 0),
@@ -260,18 +263,18 @@ static const struct snd_soc_dapm_widget wm8971_dapm_widgets[] = {
SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8971_PWR1, 3, 0),
SND_SOC_DAPM_MUX("Left PGA Mux", WM8971_PWR1, 5, 0,
- &wm8971_left_pga_controls),
+ &wm8971_left_pga_controls),
SND_SOC_DAPM_MUX("Right PGA Mux", WM8971_PWR1, 4, 0,
- &wm8971_right_pga_controls),
+ &wm8971_right_pga_controls),
SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0,
- &wm8971_left_line_controls),
+ &wm8971_left_line_controls),
SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0,
- &wm8971_right_line_controls),
+ &wm8971_right_line_controls),
SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0,
- &wm8971_monomux_controls),
+ &wm8971_monomux_controls),
SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0,
- &wm8971_monomux_controls),
+ &wm8971_monomux_controls),
SND_SOC_DAPM_OUTPUT("LOUT1"),
SND_SOC_DAPM_OUTPUT("ROUT1"),
@@ -431,7 +434,7 @@ static int get_coeff(int mclk, int rate)
}
static int wm8971_set_dai_sysclk(struct snd_soc_dai *codec_dai,
- int clk_id, unsigned int freq, int dir)
+ int clk_id, unsigned int freq, int dir)
{
struct snd_soc_codec *codec = codec_dai->codec;
struct wm8971_priv *wm8971 = snd_soc_codec_get_drvdata(codec);
@@ -449,7 +452,7 @@ static int wm8971_set_dai_sysclk(struct snd_soc_dai *codec_dai,
}
static int wm8971_set_dai_fmt(struct snd_soc_dai *codec_dai,
- unsigned int fmt)
+ unsigned int fmt)
{
struct snd_soc_codec *codec = codec_dai->codec;
u16 iface = 0;
@@ -507,8 +510,8 @@ static int wm8971_set_dai_fmt(struct snd_soc_dai *codec_dai,
}
static int wm8971_pcm_hw_params(struct snd_pcm_substream *substream,
- struct snd_pcm_hw_params *params,
- struct snd_soc_dai *dai)
+ struct snd_pcm_hw_params *params,
+ struct snd_soc_dai *dai)
{
struct snd_soc_codec *codec = dai->codec;
struct wm8971_priv *wm8971 = snd_soc_codec_get_drvdata(codec);
@@ -553,7 +556,7 @@ static int wm8971_mute(struct snd_soc_dai *dai, int mute)
}
static int wm8971_set_bias_level(struct snd_soc_codec *codec,
- enum snd_soc_bias_level level)
+ enum snd_soc_bias_level level)
{
u16 pwr_reg = snd_soc_read(codec, WM8971_PWR1) & 0xfe3e;
@@ -580,11 +583,12 @@ static int wm8971_set_bias_level(struct snd_soc_codec *codec,
}
#define WM8971_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
- SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \
- SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
+ SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
+ SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
+ SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
#define WM8971_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
- SNDRV_PCM_FMTBIT_S24_LE)
+ SNDRV_PCM_FMTBIT_S24_LE)
static const struct snd_soc_dai_ops wm8971_dai_ops = {
.hw_params = wm8971_pcm_hw_params,
@@ -616,6 +620,7 @@ static void wm8971_work(struct work_struct *work)
container_of(work, struct snd_soc_dapm_context,
delayed_work.work);
struct snd_soc_codec *codec = dapm->codec;
+
wm8971_set_bias_level(codec, codec->dapm.bias_level);
}
@@ -637,7 +642,7 @@ static int wm8971_resume(struct snd_soc_codec *codec)
snd_soc_write(codec, WM8971_PWR1, reg | 0x01c0);
codec->dapm.bias_level = SND_SOC_BIAS_ON;
queue_delayed_work(wm8971_workq, &codec->dapm.delayed_work,
- msecs_to_jiffies(1000));
+ msecs_to_jiffies(1000));
}
return 0;
@@ -660,7 +665,7 @@ static int wm8971_probe(struct snd_soc_codec *codec)
snd_soc_write(codec, WM8971_PWR1, reg | 0x01c0);
codec->dapm.bias_level = SND_SOC_BIAS_STANDBY;
queue_delayed_work(wm8971_workq, &codec->dapm.delayed_work,
- msecs_to_jiffies(1000));
+ msecs_to_jiffies(1000));
/* set the update bits */
snd_soc_update_bits(codec, WM8971_LDAC, 0x0100, 0x0100);
@@ -675,7 +680,6 @@ static int wm8971_probe(struct snd_soc_codec *codec)
return ret;
}
-
/* power down chip */
static int wm8971_remove(struct snd_soc_codec *codec)
{
@@ -729,8 +733,8 @@ static int wm8971_i2c_probe(struct i2c_client *i2c,
i2c_set_clientdata(i2c, wm8971);
- ret = snd_soc_register_codec(&i2c->dev,
- &soc_codec_dev_wm8971, &wm8971_dai, 1);
+ ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_wm8971,
+ &wm8971_dai, 1);
return ret;
}
--
1.7.9.5
2
13

23 Sep '14
added a pointer of snd_card in some of the structures to get a
reference of the card from other functions.
these references of snd_card will be initialised in the next patch
of this series and as of now these snd_card will be used to print the
the device information when we convert the pr_* macros to dev_* in a
later patch of this series.
Signed-off-by: Sudip Mukherjee <sudip(a)vectorindia.org>
---
sound/pci/ctxfi/ctamixer.h | 3 +++
sound/pci/ctxfi/ctdaio.h | 2 ++
sound/pci/ctxfi/cthardware.h | 2 ++
sound/pci/ctxfi/ctsrc.h | 3 +++
4 files changed, 10 insertions(+)
diff --git a/sound/pci/ctxfi/ctamixer.h b/sound/pci/ctxfi/ctamixer.h
index cc49e5a..ea81b8a 100644
--- a/sound/pci/ctxfi/ctamixer.h
+++ b/sound/pci/ctxfi/ctamixer.h
@@ -21,6 +21,7 @@
#include "ctresource.h"
#include <linux/spinlock.h>
+#include <sound/core.h>
/* Define the descriptor of a summation node resource */
struct sum {
@@ -35,6 +36,7 @@ struct sum_desc {
struct sum_mgr {
struct rsc_mgr mgr; /* Basic resource manager info */
+ struct snd_card *card; /* pointer to this card */
spinlock_t mgr_lock;
/* request one sum resource */
@@ -79,6 +81,7 @@ struct amixer_desc {
struct amixer_mgr {
struct rsc_mgr mgr; /* Basic resource manager info */
+ struct snd_card *card; /* pointer to this card */
spinlock_t mgr_lock;
/* request one amixer resource */
diff --git a/sound/pci/ctxfi/ctdaio.h b/sound/pci/ctxfi/ctdaio.h
index 85ccb6e..19cb285 100644
--- a/sound/pci/ctxfi/ctdaio.h
+++ b/sound/pci/ctxfi/ctdaio.h
@@ -23,6 +23,7 @@
#include "ctimap.h"
#include <linux/spinlock.h>
#include <linux/list.h>
+#include <sound/core.h>
/* Define the descriptor of a daio resource */
enum DAIOTYP {
@@ -98,6 +99,7 @@ struct daio_desc {
struct daio_mgr {
struct rsc_mgr mgr; /* Basic resource manager info */
+ struct snd_card *card; /* pointer to this card */
spinlock_t mgr_lock;
spinlock_t imap_lock;
struct list_head imappers;
diff --git a/sound/pci/ctxfi/cthardware.h b/sound/pci/ctxfi/cthardware.h
index 5977e9a..940bbd0 100644
--- a/sound/pci/ctxfi/cthardware.h
+++ b/sound/pci/ctxfi/cthardware.h
@@ -20,6 +20,7 @@
#include <linux/types.h>
#include <linux/pci.h>
+#include <sound/core.h>
enum CHIPTYP {
ATC20K1,
@@ -184,6 +185,7 @@ struct hw {
void *irq_callback_data;
struct pci_dev *pci; /* the pci kernel structure of this card */
+ struct snd_card *card; /* pointer to this card */
int irq;
unsigned long io_base;
unsigned long mem_base;
diff --git a/sound/pci/ctxfi/ctsrc.h b/sound/pci/ctxfi/ctsrc.h
index 259366a..7887cc6 100644
--- a/sound/pci/ctxfi/ctsrc.h
+++ b/sound/pci/ctxfi/ctsrc.h
@@ -23,6 +23,7 @@
#include "ctimap.h"
#include <linux/spinlock.h>
#include <linux/list.h>
+#include <sound/core.h>
#define SRC_STATE_OFF 0x0
#define SRC_STATE_INIT 0x4
@@ -85,6 +86,7 @@ struct src_desc {
/* Define src manager object */
struct src_mgr {
struct rsc_mgr mgr; /* Basic resource manager info */
+ struct snd_card *card; /* pointer to this card */
spinlock_t mgr_lock;
/* request src resource */
@@ -123,6 +125,7 @@ struct srcimp_desc {
struct srcimp_mgr {
struct rsc_mgr mgr; /* Basic resource manager info */
+ struct snd_card *card; /* pointer to this card */
spinlock_t mgr_lock;
spinlock_t imap_lock;
struct list_head imappers;
--
1.8.1.2
2
6

[alsa-devel] [PATCH] ASoC: Fix snd_soc_{new, free}_ac97_codec() locking removal
by Lars-Peter Clausen 23 Sep '14
by Lars-Peter Clausen 23 Sep '14
23 Sep '14
Commit e3f205a72c45 ("ASoC: Remove locking in
snd_soc_{new,free}_ac97_codec()") overlooked a unlock on one of the error
paths.
Fixes: e3f205a72c45 ("ASoC: Remove locking in snd_soc_{new,free}_ac97_codec()")
Signed-off-by: Lars-Peter Clausen <lars(a)metafoo.de>
---
sound/soc/soc-core.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c
index f7e4ede..5b88fde 100644
--- a/sound/soc/soc-core.c
+++ b/sound/soc/soc-core.c
@@ -1967,7 +1967,6 @@ int snd_soc_new_ac97_codec(struct snd_soc_codec *codec,
if (codec->ac97->bus == NULL) {
kfree(codec->ac97);
codec->ac97 = NULL;
- mutex_unlock(&codec->mutex);
return -ENOMEM;
}
--
1.8.0
2
1
Hello.
(TL;DR: nothing really new except the strawman proposal about threads
and the note about interaction of variable sample rate with rewindability)
As Takashi Iwai told me that the audio miniconference is for discussion
only, and not for presentation of anything, I guess that I need to
present the plans and options now. That's why this e-mail. The goal
here, besides merely presenting the plan, is to identify points that
everyone agrees upon, so that they are not discussed pointlessly at the
miniconference. Also, this e-mail serves as a justification for the
pending seemingly-destructive work.
First, the status quo. If anyone disagrees with the facts below, please
complain loudly, before I make any conclusions!
1. PulseAudio does not call snd_pcm_rewindable(), because for some ALSA
plugins it crashed. This crash is completely fixed in alsa-lib 1.0.28,
but in some cases snd_pcm_rewindable() still returns wrong results.
2. PulseAudio blindly assumes that it can rewind up to hwbuf_frames -
(snd_pcm_avail() + rewind_safeguard) frames. The rewind safeguard is
needed due to reasons that I don't completely understand, but one of
them is imprecise reporting of the hardware pointer, and another one is
that the hardware transfers several bytes at a time, and the bytes we
need to overwrite may be already cached by the hardware.
3. On the hw plugin, I could demonstrate two other bugs regarding
snd_pcm_rewindable(): stale data and bogus negative return values.
4. There are ALSA plugins like "a52" or the "bluetooth" plugin from old
version of bluez that return non-zero for snd_pcm_rewindable() and
snd_pcm_rewind, but actually don't rewind, and where rewinding is almost
impossible to implement (e.g. because this would seemingly involve
unsending of already-sent bluetooth packets). See below why "almost",
you need to search for "Alternative strawman proposal".
5. PulseAudio contains a workaround for non-rewindability of the a52
plugin that also happens to apply to other ioplug-based plugins.
However, this workaround does not match extplug-based plugins (including
"dca"), and my patch extending the workaround has been rejected with the
argument that this has to be fixed in ALSA.
6. The rate plugin has been made non-rewindable in alsa-lib 1.0.28
because the old implementation was wrong and no simple fix exists.
7. Issues regarding rewindability of PulseAudio internals such as
virtual sinks will be discussed separately.
And now the topics for discussion.
My immediate plan is to fix (3) and, if anyone replies to the rewind
safeguard proposal, maybe start fixing (2) from the alsa-lib side.
For all proposals below, unless I say otherwise, I intend to write the
required alsa-lib code myself if the proposal is accepted.
=== On the rewind safeguard ===
The consensus is that rewind_safeguard is a workaround for an ALSA bug.
This information should come from snd_pcm_rewindable() from the hw
plugin. I.e., on a hw device, it should not be equal to
snd_pcm_mmap_hw_avail(). While the method of dealing with stale data and
negative returns is obvious to me, I am not completely sure about the
safeguard. Where should this value come from?
Proposal (credit goes to Raymond Yau): the safeguard should be ideally
equal to the granularity of hardware pointer updates. However, we don't
know this granularity a priori, and cannot know this because nobody will
find out this information for old cards. Since we can't get this, let's
instead use the upper bound: the minimum possible period size for the
given sample rate, sample format and the number of channels.
On my desktop PC, on snd-hda-intel with analog outputs for S16LE stereo,
the granularity is 32 bytes (= 8 samples), and I get the pointer
granularity of 64 bytes (=16 samples) over HDMI. The minimum period size
is 32 samples in both cases. Thus Raymond's method will overestimate the
required safeguard on my cards, but it is still better than no safeguard
at all, and less than the hard-coded value in PulseAudio.
On ymfpci, the pointer granularity is 5 ms, thus the value currently
hard-coded in PA is insufficient. If I understand the card's limitations
correctly, Raymond's method will yield the spot-on result for this card.
For the allegedly existing cards where the pointer granularity is always
the same as the period size, Raymond's method will not work. However, I
don't know any concrete example of such card (I didn't look at
snd-firewire in detail, though). And in any case, my opinion is that
this "pointer granularity = period size" limitation on such cards can be
treated as a driver bug that needs to be fixed (by someone who knows the
driver, not by me). On cards where pointer updates happen only on
interrupts, the driver should not configure the card in such a way that
one period visible to the userspace corresponds to one interrupt.
Instead, it should always configure the card for the minimum possible
period size, and report only part of the period interrupts to
period_elapsed(). I.e.: userspace asked for 2 periods 64 ms each, but
let's configure the card for, say, 64 periods 2 ms each, and use the
"extra" interrupts only for updating the pointer.
Hopefully, the above heuristic and driver fix will also let PulseAudio
get rid of special treatment of the "batch" cards, simply because they
(in the "pointer granularity = period size" definition which is
currently used in PulseAudio) will no longer exist.
If the heuristic (or something else) is accepted, then the question
remains how to enable the use of snd_pcm_rewindable in PulseAudio. The
problem is compatibility with older ALSA versions that, let me remind
you, crash if snd_pcm_rewindable is called. I don't have proposals or
opinions here. The obvious options are: compile-time alsa-lib version
check with fallback to old code on buggy versions, run-time alsa-lib
version check with the same fallback, add a (both compile-time and
run-time) hard requirement of a fully-fixed alsa-lib version, or do
nothing at all.
Possible discussion: alternative heuristics and, as mentioned, migration
path in PulseAudio.
=== On non-rewindability of the rate plugin ===
I intend to write a rewindable resampler eventually, but don't have time
now. I understand that it is an important task, but issues below (and
the dayjob which you can change by offering me a new one) have higher
priority for me. However, I want everyone to understand the following
point now:
"The resampler has to be written from scratch for the reasons explained
in http://permalink.gmane.org/gmane.linux.alsa.devel/122179 , and
similar arguments apply to all other kinds of sound processing code that
needs history."
For PulseAudio, it is also needed to figure out the desired interaction
between variable rate and rewindability. Should rewinding other than
"discard everything completely" be allowed at all on variable rate
streams when the rewind crosses the sample rate change point? I.e.,
write 100 samples, change rate, write 50 samples, rewind 100 samples,
what should be the resulting rate? Should we special-case small changes
vs big ones?
Slightly off-topic, but still a discussion point.
=== On possibly-incomplete rewindability of the file plugin ===
The file plugin has quite hairy code involving the use of the write
buffer. I have not verified its correctness or studied the code in
detail. Anyway, it looks like it allows rewinding over that buffer only,
even though its slave may allow rewinding further. If true, this would
make the apparent rewindability useless, as the applications depend on
being able to rewind almost everything, and won't like the
apparently-random limitation (random because it depends on some obscure
"wbuf" implementation detail).
I think that the plugin has to be changed to avoid this limitation if it
really exists (which I still need to verify). Namely, I propose keeping
a shadow copy of the slave's buffer, and, at the beginning of each API
call, querying the slave about its hardware pointer. Only the part of
the shadow buffer that corresponds to the distance covered by the
slave's hardware pointer since the last call has to be written to the file.
The same applies to recording. As the code is much simpler there, it is
obvious that the problem exists: if one rewinds in order to look at the
past recorded samples again, the plugin will read further samples from
the file instead of supplying the already-looked-at samples. The same
solution with the slave hardware pointer should be applicable.
The possible discussion here amounts to suggesting alternative proposals.
=== On bogus rewindability of ladspa and extplug plugins ===
For ioplug, see below, because the situation is different enough.
Neither LADSPA nor snd_pcm_extplug_t have an API that allows to tell the
corresponding plugin to forget the last N samples. We cannot fix LADSPA,
as it is beyond our control. And we cannot really fix extplug, because
this just means moving the problem down one level. External libraries
(which are depended upon by the extplug-based plugins) are almost
universally not rewindable, are beyond our control, and will not be made
rewindable, because rewindability is hard and is not needed by anyone
except ALSA and PulseAudio. Still, neither .rewindable not .rewind
currently return 0.
So, I'd argue that the only correct result from snd_pcm_rewindable() is
0 for ladspa and extplug plugins. However, right now, they forward the
result from the slave. This needs to be fixed, and I have a patch.
With snd_pcm_rewind(), the situation is a bit different. It, obviously,
does nothing to tell the LADSPA or extplug plugin that the rewind
happened (because it can't). It also performs a rewind on the slave. So,
assuming that the rewind succeeds and the DSP algorithm in the plugin
uses N samples from the past, we'll end up with the output of the
correct duration but with N corrupted samples. Not ideal. But if we
don't perform the rewind at all and return 0, we'll end up with
regressing PulseAudio: huge latency when applying software volume
changes or starting new streams. By setting up the large buffer size, it
essentially assumes that any rewind will succeed.
So, my hackish proposal is: make the .rewindable callbacks on ladspa and
extplug return 0, keep the current implementation of the .rewind
callback for compatibility with the current versions of PulseAudio,
document this hack. I already have patch for this, will send out if we
agree that the proposal is good.
An alternative proposal (that I would implement if the proposal above is
rejected and someone actively confirms this one - but I don't like it)
would be to keep the current versions of the .rewindable and .rewind
callbacks and add new versions of them (and new user-visible ALSA API)
for the situation when imperfect results are unacceptable.
A completely strawman proposal would be to introduce a low-latency
thread, see below in the ioplug section.
Same for .forwardable and .forward.
Any other alternatives that I missed?
=== On bogus rewindability of some ioplug-based plugins ===
Ioplug-based plugins currently report rewindability according to the
same "appl.ptr - hw.ptr" rule that is used by the hw plugin. However,
this is incorrect.
In fact, there are two types of ioplug-based plugins. The jack plugin
does not even have a .transfer callback, and does all the work of
irrevocably submitting samples to the JACK server in a thread. So, it is
almost completely rewindable (with that "almost" being equal to JACK
buffer size). Proposal: keep this logic for all plugins without the
.transfer callback. Expose the JACK buffer size as the minimum period
size. Then the same rule proposed in the section about the hw plugin
will work for .rewindable.
Other plugins do their irrevocable work in the .transfer callback and
thus are not really rewindable. Proposal: return 0 from .rewindable and
rewind ioplug callbacks for all plugins with a .transfer callback (but
see the next section for an amendment). Document that the best practice
is to have no .transfer callback.
Alternative strawman proposal (speculative): if a .transfer callback
exists, call it from an alsa-lib-created thread (not from
snd_pcm_writei!) at the last possible moment, using the least possible
amount of data (that truly cannot be rewound) in the mmap-style buffer.
The new mantra is: .transfer is the thing that moves the hardware
pointer. This way, previously non-rewindable plugins could become
rewindable. Not sure if this is possible without changing the ABI or
possible at all, though - it essentially forces all plugins to declare
mmap support. Also not sure what to do with the .pointer callback.
For the strawman proposal, the benefit is a possibility to have dmix on
top of a52 (because freewheeling will now work), the downside is that
all programs (not only those intending to do rewinds) now pay the cost
of the background low-latency thread. Can we avoid this (e.g. with a new
flag for snd_pcm_open), so that only programs that intend to do rewinds
pay the price? Can this new flag apply to the batch hw drivers? Won't
that inflate the test matrix for plugin code?
For discussion: do we implement the first proposal or try the strawman
proposal? Any other suggestions regarding ioplug internals? Anyone else
has a problem with two completely different interfaces (with and without
.transfer) being exposed under the same ioplug framework?
=== On the pulse plugin ===
PulseAudio natively supports rewinding on the wire. However, the
ioplug-based plugin doesn't. It pretends that it rewound something, but
always passes 0, 0 as the last two parameters to pa_stream_write().
That's bad.
It looks possible (but I haven't checked) to figure out the correct
arguments (i.e. to detect the rewinds done before the call to
snd_pcm_writei) by looking at the application pointer. This way, it
looks possible to support rewinds, but does not look possible to get the
correct result (and not the result implied by the circular-buffer model)
from the snd_pcm_rewindable() function.
Also, we apply proposals from the previous section, we'll either end up
with a plugin that is truly non-rewindable and doesn't pretend to be
rewindable, or (with a strawman proposal) a rewindable plugin that
forces low latency on the PulseAudio side and causes a lot of wakeups.
Both situations are suboptimal.
So, I see no way around adding the .rewind and .rewindable callbacks to
snd_pcm_ioplug_callback, and treating the plugins with them as
rewindable. I guess .forward and .forwardable should be added, too.
For discussion: do we do the above or declare that ioplug is not really
a suitable infrastructure for the pulse plugin? What other alternatives
can be proposed?
=== On communication of non-rewindability to the program ===
PulseAudio attempts to use timer-based scheduling and rewinds. It makes
a big hardware buffer in expectation that it will be able to rewind -
with the exception of a workaround for ioplug-based plugins. It should
not set big latency for non-rewindable plugins, but currently has no
idea how to get this bit of information. See
http://lists.freedesktop.org/archives/pulseaudio-discuss/2014-April/020457.…
for the initial problem statement.
If all of the proposals above are implemented, then we'll be at a point
where each ALSA plugin is either almost fully rewindable, or not
rewindable at all. So, contrary to the end of
http://permalink.gmane.org/gmane.linux.alsa.devel/122191 , I think we
need just snd_pcm_hw_params_is_seekable() (or rename it if you wish)
with an essentially boolean result.
For discussion:
1. Decide, finally, on this bit of API, so that I can start working.
2. Decide what to do with old alsa-lib versions in PulseAudio. I.e.
transition plan.
=== On the programmer expectations ===
(social issue)
Some people, including at least Andrew Eikum and Clemens Ladisch, at
least once in the past expressed the opinion that amounts to "any plugin
that does not allow random access is, as far as the ALSA API is
concerned, buggy" (quoting
http://permalink.gmane.org/gmane.linux.alsa.devel/122159 ), i.e. they
are maybe asking for the impossible. We need to do something about that.
Choices:
1. Document clearly that there exist non-rewindable plugins, and that it
is not a bug until someone implements a working time machine.
2. Implement a strawman proposal with the background low-latency thread
if it is doable (and I am not sure that it is doable).
3. Remove ioplug, extplug and ladspa as unfixable, fix the rate and
adpcm plugins (or remove adpcm). Do something about pulse and jack
because they rely on the to-be-removed ioplug infrastructure. Then all
remaining plugins will indeed be fully rewindable.
4. Something else?
Sorry for the negative tone here, I know I am bad at formulating and
resolving social issues.
=== Conclusion ===
When all the proposals are implemented, we'll have correct
implementations of the rewind operation in all plugins (where "return 0"
counts as correct), and "return 0" only where it is truly unavoidable.
PulseAudio will be able to use all of that, and avoid doing rewinds on
non-rewindable plugins. On this positive note, I'd like to finish
writing this long e-mail.
--
Alexander E. Patrakov
9
51

23 Sep '14
Since every caller of snd_hda_jack_detect_enable_callback needs to
use the macros from err.h, it makes sense to include it directly
from hda_jack.h.
Signed-off-by: David Henningsson <david.henningsson(a)canonical.com>
---
sound/pci/hda/hda_jack.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/sound/pci/hda/hda_jack.h b/sound/pci/hda/hda_jack.h
index b41e0a3..13cb375 100644
--- a/sound/pci/hda/hda_jack.h
+++ b/sound/pci/hda/hda_jack.h
@@ -12,6 +12,8 @@
#ifndef __SOUND_HDA_JACK_H
#define __SOUND_HDA_JACK_H
+#include <linux/err.h>
+
struct auto_pin_cfg;
struct hda_jack_tbl;
struct hda_jack_callback;
--
1.9.1
2
2
Hi Takashi,
I will prefer "renu tyagi".
I cannot use git send-email from my organization.
I will resubmit patches where I missed email id in signoff. Or you can see the attachments as they are fine.
If any other issues I will be happy to respond.
Thanks
--------------------------------------------
Signed-off-by: renu tyagi <renu.tyagi(a)samsung.com>
---
src/mixer/mixer.c | 4 +---
1 files changed, 1 insertions(+), 3 deletions(-)
diff --git a/src/mixer/mixer.c b/src/mixer/mixer.c
index 56e023d..eee9875 100644
--- a/src/mixer/mixer.c
+++ b/src/mixer/mixer.c
@@ -204,10 +204,8 @@ int snd_mixer_attach(snd_mixer_t *mixer, const char *name)
if (err < 0)
return err;
err = snd_mixer_attach_hctl(mixer, hctl);
- if (err < 0) {
- snd_hctl_close(hctl);
+ if (err < 0)
return err;
- }
return 0;
}
--
1.7.1
2
1
Signed-off-by: renu tyagi <renu.tyagi(a)samsung.com>
---
src/rawmidi/rawmidi.c | 5 ++++-
1 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/src/rawmidi/rawmidi.c b/src/rawmidi/rawmidi.c
index b835b47..ac699b4 100644
--- a/src/rawmidi/rawmidi.c
+++ b/src/rawmidi/rawmidi.c
@@ -256,8 +256,11 @@ static int snd_rawmidi_open_conf(snd_rawmidi_t **inputp, snd_rawmidi_t **outputp
snd_config_delete(type_conf);
if (err >= 0)
err = open_func(inputp, outputp, name, rawmidi_root, rawmidi_conf, mode);
- if (err < 0)
+ if (err < 0) {
+ if (h)
+ snd_dlclose(h);
return err;
+ }
if (inputp) {
(*inputp)->dl_handle = h; h = NULL;
snd_rawmidi_params_default(*inputp, ¶ms);
--
1.7.1
1
0
Signed-off-by: renu tyagi <renu.tyagi(a)samsung.com>
---
modules/mixer/simple/sbase.c | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/modules/mixer/simple/sbase.c b/modules/mixer/simple/sbase.c
index 97feee8..bb2f59d 100644
--- a/modules/mixer/simple/sbase.c
+++ b/modules/mixer/simple/sbase.c
@@ -377,6 +377,7 @@ static int simple_event_add1(snd_mixer_class_t *class,
if (ctype != SND_CTL_ELEM_TYPE_BOOLEAN) {
__invalid_type:
snd_mixer_selem_id_free(id);
+ free(hsimple);
return -EINVAL;
}
break;
--
1.7.1
1
0
Signed-off-by: renu tyagi <renu.tyagi(a)samsung.com>
---
src/pcm/pcm_file.c | 2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/src/pcm/pcm_file.c b/src/pcm/pcm_file.c
index a0b8bf4..f6d222f 100644
--- a/src/pcm/pcm_file.c
+++ b/src/pcm/pcm_file.c
@@ -758,6 +758,7 @@ int snd_pcm_file_open(snd_pcm_t **pcmp, const char *name,
ifd = open(ifname, O_RDONLY); /* TODO: mind blocking mode */
if (ifd < 0) {
SYSERR("open %s for reading failed", ifname);
+ free(file->fname);
free(file);
return -errno;
}
@@ -772,6 +773,7 @@ int snd_pcm_file_open(snd_pcm_t **pcmp, const char *name,
err = snd_pcm_new(&pcm, SND_PCM_TYPE_FILE, name, slave->stream, slave->mode);
if (err < 0) {
free(file->fname);
+ free(file->ifname);
free(file);
return err;
}
--
1.7.1
1
0

Re: [alsa-devel] [PATCH v6 05/10] ASoC: Intel: mrfld: add DSP core controls
by Mark Brown 23 Sep '14
by Mark Brown 23 Sep '14
23 Sep '14
On Wed, Sep 17, 2014 at 04:25:57PM +0530, Subhransu S. Prusty wrote:
> On Tue, Sep 16, 2014 at 12:30:53PM -0700, Mark Brown wrote:
> > This is returning with the lock still held AFAICT. I'm a bit surprised
> > that we don't need to interact with the hardware if we've disabled
> > everything, shouldn't this have some effect on the hardware?
> > Also the coding style thing with the comments again.
> Will fix the locking and comment.
> Regarding interaction with the driver, the slot map is cached and sent in
> sst_set_be_modules event. This is sent only when that particular BE is
> active, otherwise driver will happily cache these values.
> This is the reason why we don't see trigger to DSP when usermode fiddles
> around.
> In our model only when a particular FE/BE/Mixer/Pipe is active we forward
> the settings and parameters, rest we keep the values in driver and forward
> when DAPM enables them.
> I think we can add this explanation here at top of this file to help.
This doesn't really answer my concern - what happens if we're already
active and making a change?
> Power ops in SST takes care of the PM handling.
> Following comment is already added in the code which explains.
> "Send the command only if this call is the first enable or last disable"
> Let us know if it is not clear enough.
No, that comment is orthogonal to the interaction with the DSP which is
what is confusing.
2
6

[alsa-devel] [PATCH] ASoC: fsl_ssi: fix kernel panic in probe function
by Michael Trimarchi 23 Sep '14
by Michael Trimarchi 23 Sep '14
23 Sep '14
code can raise a panic when the ssi_private->pdev is null
[...]
/*
* If codec-handle property is missing from SSI node, we assume
* that the machine driver uses new binding which does not require
* SSI driver to trigger machine driver's probe.
*/
if (!of_get_property(np, "codec-handle", NULL))
goto done;
[...]
ssi_private->pdev =
platform_device_register_data(&pdev->dev, name, 0, NULL, 0);
[...]
done:
if (ssi_private->dai_fmt)
_fsl_ssi_set_dai_fmt(ssi_private, ssi_private->dai_fmt);
Proposal was to not use ssi_private->pdev->dev here but adding a new parameter
of *dev pointer to this _set_dai_fmt() -- passing pdev->dev in probe() and
cpu_dai->dev in fsl_ssi_set_dai_fmt().
Signed-off-by: Michael Trimarchi <michael(a)amarulasolutions.com>
Reported-by: Jean-Michel Hautbois <jean-michel.hautbois(a)vodalys.com>
Cc: Nicolin Chen <nicoleotsuka(a)gmail.com>
---
sound/soc/fsl/fsl_ssi.c | 12 +++++++-----
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index 87eb577..de6ab06 100644
--- a/sound/soc/fsl/fsl_ssi.c
+++ b/sound/soc/fsl/fsl_ssi.c
@@ -748,8 +748,9 @@ static int fsl_ssi_hw_free(struct snd_pcm_substream *substream,
return 0;
}
-static int _fsl_ssi_set_dai_fmt(struct fsl_ssi_private *ssi_private,
- unsigned int fmt)
+static int _fsl_ssi_set_dai_fmt(struct device *dev,
+ struct fsl_ssi_private *ssi_private,
+ unsigned int fmt)
{
struct regmap *regs = ssi_private->regs;
u32 strcr = 0, stcr, srcr, scr, mask;
@@ -758,7 +759,7 @@ static int _fsl_ssi_set_dai_fmt(struct fsl_ssi_private *ssi_private,
ssi_private->dai_fmt = fmt;
if (fsl_ssi_is_i2s_master(ssi_private) && IS_ERR(ssi_private->baudclk)) {
- dev_err(&ssi_private->pdev->dev, "baudclk is missing which is necessary for master mode\n");
+ dev_err(dev, "baudclk is missing which is necessary for master mode\n");
return -EINVAL;
}
@@ -913,7 +914,7 @@ static int fsl_ssi_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt)
{
struct fsl_ssi_private *ssi_private = snd_soc_dai_get_drvdata(cpu_dai);
- return _fsl_ssi_set_dai_fmt(ssi_private, fmt);
+ return _fsl_ssi_set_dai_fmt(cpu_dai->dev, ssi_private, fmt);
}
/**
@@ -1387,7 +1388,8 @@ static int fsl_ssi_probe(struct platform_device *pdev)
done:
if (ssi_private->dai_fmt)
- _fsl_ssi_set_dai_fmt(ssi_private, ssi_private->dai_fmt);
+ _fsl_ssi_set_dai_fmt(&pdev->dev, ssi_private,
+ ssi_private->dai_fmt);
return 0;
--
1.8.1.2
3
2
From: Bard Liao <bardliao(a)realtek.com>
Add dsp part of rt5670 codec driver
Signed-off-by: Bard Liao <bardliao(a)realtek.com>
---
sound/soc/codecs/Makefile | 2 +-
sound/soc/codecs/rt5670-dsp.c | 383 ++++++++++++++++++++++++++++++++++++++++++
sound/soc/codecs/rt5670-dsp.h | 10 +-
sound/soc/codecs/rt5670.c | 43 +++++
sound/soc/codecs/rt5670.h | 3 +
5 files changed, 434 insertions(+), 7 deletions(-)
create mode 100644 sound/soc/codecs/rt5670-dsp.c
diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile
index afba944..3e5bc33 100644
--- a/sound/soc/codecs/Makefile
+++ b/sound/soc/codecs/Makefile
@@ -78,7 +78,7 @@ snd-soc-rt5631-objs := rt5631.o
snd-soc-rt5640-objs := rt5640.o
snd-soc-rt5645-objs := rt5645.o
snd-soc-rt5651-objs := rt5651.o
-snd-soc-rt5670-objs := rt5670.o
+snd-soc-rt5670-objs := rt5670.o rt5670-dsp.o
snd-soc-rt5677-objs := rt5677.o
snd-soc-sgtl5000-objs := sgtl5000.o
snd-soc-alc5623-objs := alc5623.o
diff --git a/sound/soc/codecs/rt5670-dsp.c b/sound/soc/codecs/rt5670-dsp.c
new file mode 100644
index 0000000..bbe039d
--- /dev/null
+++ b/sound/soc/codecs/rt5670-dsp.c
@@ -0,0 +1,383 @@
+/*
+ * rt5670-dsp.c -- RT5670 ALSA SoC DSP driver
+ *
+ * Copyright 2014 Realtek Semiconductor Corp.
+ * Author: Bard Liao <bardliao(a)realtek.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/delay.h>
+#include <linux/i2c.h>
+#include <linux/platform_device.h>
+#include <linux/firmware.h>
+#include <sound/soc.h>
+#include <sound/soc-dapm.h>
+
+#include "rt5670.h"
+#include "rt5670-dsp.h"
+
+#define DSP_CLK_RATE RT5670_DSP_CLK_96K
+
+static const struct firmware *rt5670_dsp_fw;
+
+/**
+ * rt5670_dsp_done - Wait until DSP is ready.
+ * @codec: SoC Audio Codec device.
+ *
+ * To check voice DSP status and confirm it's ready for next work.
+ *
+ * Returns 0 for success or negative error code.
+ */
+static int rt5670_dsp_done(struct snd_soc_codec *codec)
+{
+ unsigned int count = 0, dsp_val;
+
+ dsp_val = snd_soc_read(codec, RT5670_DSP_CTRL1);
+ while (dsp_val & RT5670_DSP_BUSY_MASK) {
+ if (count > 10)
+ return -EBUSY;
+ dsp_val = snd_soc_read(codec, RT5670_DSP_CTRL1);
+ count++;
+ }
+
+ return 0;
+}
+
+/**
+ * rt5670_dsp_write - Write DSP register.
+ * @codec: SoC audio codec device.
+ * @param: DSP parameters.
+ *
+ * Modify voice DSP register for sound effect. The DSP can be controlled
+ * through DSP addr (0xe1), data (0xe2) and cmd (0xe0)
+ * registers. It has to wait until the DSP is ready.
+ *
+ * Returns 0 for success or negative error code.
+ */
+int rt5670_dsp_write(struct snd_soc_codec *codec,
+ unsigned int addr, unsigned int data)
+{
+ unsigned int dsp_val;
+ int ret;
+
+ ret = snd_soc_write(codec, RT5670_DSP_CTRL2, addr);
+ if (ret < 0) {
+ dev_err(codec->dev, "Failed to write DSP addr reg: %d\n", ret);
+ goto err;
+ }
+ ret = snd_soc_write(codec, RT5670_DSP_CTRL3, data);
+ if (ret < 0) {
+ dev_err(codec->dev, "Failed to write DSP data reg: %d\n", ret);
+ goto err;
+ }
+ dsp_val = RT5670_DSP_I2C_AL_16 | RT5670_DSP_DL_2 |
+ RT5670_DSP_CMD_MW | DSP_CLK_RATE | RT5670_DSP_CMD_EN;
+
+ ret = snd_soc_write(codec, RT5670_DSP_CTRL1, dsp_val);
+ if (ret < 0) {
+ dev_err(codec->dev, "Failed to write DSP cmd reg: %d\n", ret);
+ goto err;
+ }
+ ret = rt5670_dsp_done(codec);
+ if (ret < 0) {
+ dev_err(codec->dev, "DSP is busy: %d\n", ret);
+ goto err;
+ }
+
+ return 0;
+
+err:
+ return ret;
+}
+
+/**
+ * rt5670_dsp_read - Read DSP register.
+ * @codec: SoC audio codec device.
+ * @reg: DSP register index.
+ *
+ * Read DSP setting value from voice DSP. The DSP can be controlled
+ * through DSP addr (0xe1), data (0xe2) and cmd (0xe0) registers. Each
+ * command has to wait until the DSP is ready.
+ *
+ * Returns DSP register value or negative error code.
+ */
+unsigned int rt5670_dsp_read(
+ struct snd_soc_codec *codec, unsigned int reg)
+{
+ unsigned int value;
+ unsigned int dsp_val;
+ int ret = 0;
+
+ ret = rt5670_dsp_done(codec);
+ if (ret < 0) {
+ dev_err(codec->dev, "DSP is busy: %d\n", ret);
+ goto err;
+ }
+
+ ret = snd_soc_write(codec, RT5670_DSP_CTRL2, reg);
+ if (ret < 0) {
+ dev_err(codec->dev, "Failed to write DSP addr reg: %d\n", ret);
+ goto err;
+ }
+ dsp_val = RT5670_DSP_I2C_AL_16 | RT5670_DSP_DL_0 | RT5670_DSP_RW_MASK |
+ RT5670_DSP_CMD_MR | DSP_CLK_RATE | RT5670_DSP_CMD_EN;
+
+ ret = snd_soc_write(codec, RT5670_DSP_CTRL1, dsp_val);
+ if (ret < 0) {
+ dev_err(codec->dev, "Failed to write DSP cmd reg: %d\n", ret);
+ goto err;
+ }
+
+ ret = rt5670_dsp_done(codec);
+ if (ret < 0) {
+ dev_err(codec->dev, "DSP is busy: %d\n", ret);
+ goto err;
+ }
+
+ ret = snd_soc_write(codec, RT5670_DSP_CTRL2, 0x26);
+ if (ret < 0) {
+ dev_err(codec->dev, "Failed to write DSP addr reg: %d\n", ret);
+ goto err;
+ }
+ dsp_val = RT5670_DSP_DL_1 | RT5670_DSP_CMD_RR | RT5670_DSP_RW_MASK |
+ DSP_CLK_RATE | RT5670_DSP_CMD_EN;
+
+ ret = snd_soc_write(codec, RT5670_DSP_CTRL1, dsp_val);
+ if (ret < 0) {
+ dev_err(codec->dev, "Failed to write DSP cmd reg: %d\n", ret);
+ goto err;
+ }
+
+ ret = rt5670_dsp_done(codec);
+ if (ret < 0) {
+ dev_err(codec->dev, "DSP is busy: %d\n", ret);
+ goto err;
+ }
+
+ ret = snd_soc_write(codec, RT5670_DSP_CTRL2, 0x25);
+ if (ret < 0) {
+ dev_err(codec->dev, "Failed to write DSP addr reg: %d\n", ret);
+ goto err;
+ }
+
+ dsp_val = RT5670_DSP_DL_1 | RT5670_DSP_CMD_RR | RT5670_DSP_RW_MASK |
+ DSP_CLK_RATE | RT5670_DSP_CMD_EN;
+
+ ret = snd_soc_write(codec, RT5670_DSP_CTRL1, dsp_val);
+ if (ret < 0) {
+ dev_err(codec->dev, "Failed to write DSP cmd reg: %d\n", ret);
+ goto err;
+ }
+
+ ret = rt5670_dsp_done(codec);
+ if (ret < 0) {
+ dev_err(codec->dev, "DSP is busy: %d\n", ret);
+ goto err;
+ }
+
+ ret = snd_soc_read(codec, RT5670_DSP_CTRL5);
+ if (ret < 0) {
+ dev_err(codec->dev, "Failed to read DSP data reg: %d\n", ret);
+ goto err;
+ }
+
+ value = ret;
+ return value;
+
+err:
+ return ret;
+}
+
+static int rt5670_dsp_mode_get(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
+ struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
+
+ ucontrol->value.integer.value[0] = rt5670->dsp_sw;
+
+ return 0;
+}
+
+static int rt5670_dsp_mode_put(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
+ struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
+
+ if (rt5670->dsp_sw != ucontrol->value.integer.value[0])
+ rt5670->dsp_sw = ucontrol->value.integer.value[0];
+
+ return 0;
+}
+
+/* DSP SRC Control */
+static const char * const rt5670_src_rxdp_mode[] = {
+ "Normal", "Divided by 2", "Divided by 3"
+};
+
+static const SOC_ENUM_SINGLE_DECL(
+ rt5670_src_rxdp_enum, RT5670_DSP_PATH1,
+ RT5670_RXDP_SRC_SFT, rt5670_src_rxdp_mode);
+
+static const char * const rt5670_src_txdp_mode[] = {
+ "Normal", "Multiplied by 2", "Multiplied by 3"
+};
+
+static const SOC_ENUM_SINGLE_DECL(
+ rt5670_src_txdp_enum, RT5670_DSP_PATH1,
+ RT5670_TXDP_SRC_SFT, rt5670_src_txdp_mode);
+
+/* DSP Mode */
+static const char * const rt5670_dsp_mode[] = {
+ "Mode 1", "Mode 2", "Mode 3", "Mode 4", "Mode 5"
+};
+
+static const SOC_ENUM_SINGLE_DECL(rt5670_dsp_enum, 0, 0,
+ rt5670_dsp_mode);
+
+static const struct snd_kcontrol_new rt5670_dsp_snd_controls[] = {
+ SOC_ENUM("RxDP SRC Switch", rt5670_src_rxdp_enum),
+ SOC_ENUM("TxDP SRC Switch", rt5670_src_txdp_enum),
+ SOC_ENUM_EXT("DSP Function Switch", rt5670_dsp_enum,
+ rt5670_dsp_mode_get, rt5670_dsp_mode_put),
+};
+
+/**
+ * rt5670_dsp_set_mode - Set DSP mode parameters.
+ *
+ * @codec: SoC audio codec device.
+ * @mode: DSP mode.
+ *
+ * Set parameters of mode to DSP.
+ *
+ * Returns 0 for success or negative error code.
+ */
+static int rt5670_dsp_set_mode(struct snd_soc_codec *codec, int mode)
+{
+ int tab_num, n, ret = -EINVAL;
+ unsigned int pos = 0;
+
+ if (rt5670_dsp_fw) {
+ n = rt5670_dsp_fw->data[0];
+
+ if (mode <= n) {
+ pos = rt5670_dsp_fw->data[mode * 3 + 2] |
+ rt5670_dsp_fw->data[mode * 3 + 1] << 8;
+
+ tab_num = rt5670_dsp_fw->data[mode * 3 + 3];
+ if (pos + tab_num * 5 > rt5670_dsp_fw->size)
+ return -EINVAL;
+ ret = rt5670_write_fw(codec,
+ rt5670_dsp_fw, pos, tab_num);
+ if (ret < 0)
+ dev_err(codec->dev,
+ "Fail to set mode %d parameters: %d\n",
+ mode, ret);
+ }
+ }
+
+ return ret;
+}
+
+static int rt5670_dsp_event(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *k, int event)
+{
+ struct snd_soc_codec *codec = w->codec;
+ struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
+
+ switch (event) {
+ case SND_SOC_DAPM_POST_PMD:
+ rt5670_dsp_write(codec, 0x22f9, 1);
+ break;
+
+ case SND_SOC_DAPM_POST_PMU:
+ snd_soc_update_bits(codec, RT5670_DIG_MISC,
+ RT5670_RST_DSP, RT5670_RST_DSP);
+ snd_soc_update_bits(codec, RT5670_DIG_MISC,
+ RT5670_RST_DSP, 0);
+ mdelay(10);
+ rt5670_dsp_set_mode(codec, rt5670->dsp_sw);
+ break;
+
+ default:
+ return 0;
+ }
+
+ return 0;
+}
+
+static const struct snd_soc_dapm_widget rt5670_dsp_dapm_widgets[] = {
+ SND_SOC_DAPM_SUPPLY_S("Voice DSP", 1, SND_SOC_NOPM,
+ 0, 0, rt5670_dsp_event,
+ SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),
+ SND_SOC_DAPM_PGA("DSP Downstream", SND_SOC_NOPM,
+ 0, 0, NULL, 0),
+ SND_SOC_DAPM_PGA("DSP Upstream", SND_SOC_NOPM,
+ 0, 0, NULL, 0),
+};
+
+static const struct snd_soc_dapm_route rt5670_dsp_dapm_routes[] = {
+ {"DSP Downstream", NULL, "Voice DSP"},
+ {"DSP Downstream", NULL, "RxDP Mux"},
+ {"DSP Upstream", NULL, "Voice DSP"},
+ {"DSP Upstream", NULL, "TDM Data Mux"},
+ {"DSP DL Mux", "DSP", "DSP Downstream"},
+ {"DSP UL Mux", "DSP", "DSP Upstream"},
+};
+
+static void rt5670_dsp_fw_loaded(const struct firmware *fw, void *context)
+{
+ if (fw) {
+ rt5670_dsp_fw = fw;
+ pr_debug("fw->size=%d\n", fw->size);
+ }
+
+}
+
+/**
+ * rt5670_dsp_probe - register DSP for rt5670
+ * @codec: audio codec
+ *
+ * To register DSP function for rt5670.
+ *
+ * Returns 0 for success or negative error code.
+ */
+int rt5670_dsp_probe(struct snd_soc_codec *codec)
+{
+ if (codec == NULL)
+ return -EINVAL;
+
+ snd_soc_update_bits(codec, RT5670_PWR_DIG2,
+ RT5670_PWR_I2S_DSP, RT5670_PWR_I2S_DSP);
+
+ snd_soc_update_bits(codec, RT5670_DIG_MISC, RT5670_RST_DSP,
+ RT5670_RST_DSP);
+ snd_soc_update_bits(codec, RT5670_DIG_MISC, RT5670_RST_DSP, 0);
+
+ mdelay(10);
+
+ rt5670_dsp_set_mode(codec, 0);
+ /* power down DSP */
+ mdelay(15);
+ rt5670_dsp_write(codec, 0x22f9, 1);
+
+ snd_soc_update_bits(codec, RT5670_PWR_DIG2,
+ RT5670_PWR_I2S_DSP, 0);
+
+ snd_soc_add_codec_controls(codec, rt5670_dsp_snd_controls,
+ ARRAY_SIZE(rt5670_dsp_snd_controls));
+ snd_soc_dapm_new_controls(&codec->dapm, rt5670_dsp_dapm_widgets,
+ ARRAY_SIZE(rt5670_dsp_dapm_widgets));
+ snd_soc_dapm_add_routes(&codec->dapm, rt5670_dsp_dapm_routes,
+ ARRAY_SIZE(rt5670_dsp_dapm_routes));
+
+ request_firmware_nowait(THIS_MODULE, FW_ACTION_HOTPLUG,
+ "rt567x_dsp.bin", codec->dev, GFP_KERNEL,
+ codec, rt5670_dsp_fw_loaded);
+
+ return 0;
+}
diff --git a/sound/soc/codecs/rt5670-dsp.h b/sound/soc/codecs/rt5670-dsp.h
index a34d0cd..cd13f61 100644
--- a/sound/soc/codecs/rt5670-dsp.h
+++ b/sound/soc/codecs/rt5670-dsp.h
@@ -43,12 +43,10 @@
#define RT5670_DSP_I2C_AL_16 (0x1 << 1)
#define RT5670_DSP_CMD_EN (0x1)
-struct rt5670_dsp_param {
- u16 cmd_fmt;
- u16 addr;
- u16 data;
- u8 cmd;
-};
+int rt5670_dsp_write(struct snd_soc_codec *codec,
+ unsigned int addr, unsigned int data);
+unsigned int rt5670_dsp_read(
+ struct snd_soc_codec *codec, unsigned int reg);
#endif /* __RT5670_DSP_H__ */
diff --git a/sound/soc/codecs/rt5670.c b/sound/soc/codecs/rt5670.c
index ba9d9b4..da4b689 100644
--- a/sound/soc/codecs/rt5670.c
+++ b/sound/soc/codecs/rt5670.c
@@ -16,6 +16,7 @@
#include <linux/pm.h>
#include <linux/i2c.h>
#include <linux/platform_device.h>
+#include <linux/firmware.h>
#include <linux/spi/spi.h>
#include <sound/core.h>
#include <sound/pcm.h>
@@ -401,6 +402,44 @@ static bool rt5670_readable_register(struct device *dev, unsigned int reg)
}
}
+int rt5670_write_fw(struct snd_soc_codec *codec, const struct firmware *fw,
+ unsigned int pos, unsigned int num)
+{
+ int i, ret;
+
+ for (i = 0; i < num; i++) {
+ switch (fw->data[pos]) {
+ case 1: /*PR*/
+ ret = snd_soc_write(codec, RT5670_PR_BASE +
+ ((fw->data[pos + 1] << 8) | fw->data[pos + 2]),
+ (fw->data[pos + 3] << 8) | fw->data[pos + 4]);
+ if (ret < 0)
+ return -1;
+ break;
+ case 2: /*dsp*/
+ ret = rt5670_dsp_write(codec,
+ (fw->data[pos + 1] << 8) | fw->data[pos + 2],
+ (fw->data[pos + 3] << 8) | fw->data[pos + 4]);
+ if (ret < 0)
+ return -1;
+ break;
+ default: /*register*/
+ ret = snd_soc_write(codec,
+ (fw->data[pos + 1] << 8) | fw->data[pos + 2],
+ (fw->data[pos + 3] << 8) | fw->data[pos + 4]);
+ if (ret < 0)
+ return -1;
+ break;
+ }
+ pos += 5;
+ if (fw->size < pos)
+ return 0;
+ }
+
+ return 0;
+
+}
+
static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
@@ -2332,6 +2371,7 @@ static int rt5670_probe(struct snd_soc_codec *codec)
struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
rt5670->codec = codec;
+ rt5670_dsp_probe(codec);
return 0;
}
@@ -2623,6 +2663,9 @@ static int rt5670_i2c_probe(struct i2c_client *i2c,
}
+ /*Give sysclk a default value*/
+ rt5670->sysclk = 24576000;
+
ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5670,
rt5670_dai, ARRAY_SIZE(rt5670_dai));
if (ret < 0)
diff --git a/sound/soc/codecs/rt5670.h b/sound/soc/codecs/rt5670.h
index a0b5c85..5d2dea5 100644
--- a/sound/soc/codecs/rt5670.h
+++ b/sound/soc/codecs/rt5670.h
@@ -1997,4 +1997,7 @@ struct rt5670_priv {
int jack_type;
};
+int rt5671_write_fw(struct snd_soc_codec *codec, const struct firmware *fw,
+ unsigned int pos, unsigned int num);
+
#endif /* __RT5670_H__ */
--
1.8.1.1.439.g50a6b54
2
1

[alsa-devel] [PATCH] ASoC: Remove locking in snd_soc_{new, free}_ac97_codec()
by Lars-Peter Clausen 23 Sep '14
by Lars-Peter Clausen 23 Sep '14
23 Sep '14
snd_soc_new_ac97_codec() and snd_soc_free_ac97_codec() are called from
within a CODEC's probe() and remove() callbacks. Those will not run
concurrently against each other for the same CODEC instance, hence it is not
necessary to protect the two functions with a mutex.
This removes the last user in the ASoC core of the snd_soc_codec mutex field
and will allow us to eventually remove it.
Signed-off-by: Lars-Peter Clausen <lars(a)metafoo.de>
---
sound/soc/soc-core.c | 9 +--------
1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c
index 889f4e3..5289984 100644
--- a/sound/soc/soc-core.c
+++ b/sound/soc/soc-core.c
@@ -2107,13 +2107,9 @@ static struct platform_driver soc_driver = {
int snd_soc_new_ac97_codec(struct snd_soc_codec *codec,
struct snd_ac97_bus_ops *ops, int num)
{
- mutex_lock(&codec->mutex);
-
codec->ac97 = kzalloc(sizeof(struct snd_ac97), GFP_KERNEL);
- if (codec->ac97 == NULL) {
- mutex_unlock(&codec->mutex);
+ if (codec->ac97 == NULL)
return -ENOMEM;
- }
codec->ac97->bus = kzalloc(sizeof(struct snd_ac97_bus), GFP_KERNEL);
if (codec->ac97->bus == NULL) {
@@ -2132,7 +2128,6 @@ int snd_soc_new_ac97_codec(struct snd_soc_codec *codec,
*/
codec->ac97_created = 1;
- mutex_unlock(&codec->mutex);
return 0;
}
EXPORT_SYMBOL_GPL(snd_soc_new_ac97_codec);
@@ -2302,7 +2297,6 @@ EXPORT_SYMBOL_GPL(snd_soc_set_ac97_ops_of_reset);
*/
void snd_soc_free_ac97_codec(struct snd_soc_codec *codec)
{
- mutex_lock(&codec->mutex);
#ifdef CONFIG_SND_SOC_AC97_BUS
soc_unregister_ac97_codec(codec);
#endif
@@ -2310,7 +2304,6 @@ void snd_soc_free_ac97_codec(struct snd_soc_codec *codec)
kfree(codec->ac97);
codec->ac97 = NULL;
codec->ac97_created = 0;
- mutex_unlock(&codec->mutex);
}
EXPORT_SYMBOL_GPL(snd_soc_free_ac97_codec);
--
1.8.0
2
1
Add sidetone function
Signed-off-by: Anatol Pomozov <anatol.pomozov(a)gmail.com>
Signed-off-by: Oder Chiou <oder_chiou(a)realtek.com>
---
sound/soc/codecs/rt5677.c | 9 +++++++++
sound/soc/codecs/rt5677.h | 4 ++++
2 files changed, 13 insertions(+)
diff --git a/sound/soc/codecs/rt5677.c b/sound/soc/codecs/rt5677.c
index 1d4719f..4a0f3df 100644
--- a/sound/soc/codecs/rt5677.c
+++ b/sound/soc/codecs/rt5677.c
@@ -541,6 +541,7 @@ static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
+static const DECLARE_TLV_DB_SCALE(st_vol_tlv, -4650, 150, 0);
/* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
static unsigned int bst_tlv[] = {
@@ -605,6 +606,10 @@ static const struct snd_kcontrol_new rt5677_snd_controls[] = {
RT5677_MONO_ADC_L_VOL_SFT, RT5677_MONO_ADC_R_VOL_SFT, 127, 0,
adc_vol_tlv),
+ /* Sidetone Control */
+ SOC_SINGLE_TLV("Sidetone Volume", RT5677_SIDETONE_CTRL,
+ RT5677_ST_VOL_SFT, 31, 0, st_vol_tlv),
+
/* ADC Boost Volume Control */
SOC_DOUBLE_TLV("STO1 ADC Boost Volume", RT5677_STO1_2_ADC_BST,
RT5677_STO1_ADC_L_BST_SFT, RT5677_STO1_ADC_R_BST_SFT, 3, 0,
@@ -1993,6 +1998,9 @@ static const struct snd_soc_dapm_widget rt5677_dapm_widgets[] = {
/* Sidetone Mux */
SND_SOC_DAPM_MUX("Sidetone Mux", SND_SOC_NOPM, 0, 0,
&rt5677_sidetone_mux),
+ SND_SOC_DAPM_SUPPLY("Sidetone Power", RT5677_SIDETONE_CTRL,
+ RT5677_ST_EN_SFT, 0, NULL, 0),
+
/* VAD Mux*/
SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM, 0, 0,
&rt5677_vad_src_mux),
@@ -2704,6 +2712,7 @@ static const struct snd_soc_dapm_route rt5677_dapm_routes[] = {
{ "Sidetone Mux", "DMIC4 L", "DMIC L4" },
{ "Sidetone Mux", "ADC1", "ADC 1" },
{ "Sidetone Mux", "ADC2", "ADC 2" },
+ { "Sidetone Mux", NULL, "Sidetone Power" },
{ "Stereo DAC MIXL", "ST L Switch", "Sidetone Mux" },
{ "Stereo DAC MIXL", "DAC1 L Switch", "DAC1 MIXL" },
diff --git a/sound/soc/codecs/rt5677.h b/sound/soc/codecs/rt5677.h
index b61b72c..1fe8872 100644
--- a/sound/soc/codecs/rt5677.h
+++ b/sound/soc/codecs/rt5677.h
@@ -382,6 +382,10 @@
#define RT5677_ST_SEL_SFT 9
#define RT5677_ST_EN (0x1 << 6)
#define RT5677_ST_EN_SFT 6
+#define RT5677_ST_GAIN (0x1 << 5)
+#define RT5677_ST_GAIN_SFT 5
+#define RT5677_ST_VOL_MASK (0x1f << 0)
+#define RT5677_ST_VOL_SFT 0
/* Analog DAC1/2/3 Source Control (0x15) */
#define RT5677_ANA_DAC3_SRC_SEL_MASK (0x3 << 4)
--
1.8.1.1.439.g50a6b54
2
1

22 Sep '14
After the recent addition of more codecs, the journey towards 0 errors
starts over. Here we work around the latest secret stuff the vendors
decided to add.
In particular, it would be interesting to have a little more info on the
secret IDT EQ verbs, which I just labelled "set_eq_*".
David Henningsson (5):
hda-spec: Add fixups for Haswell/Broadwell HDMI
hda-spec: Add access to secret node 0x8 for Haswell/Broadwell HDMI
hda-spec: Add more secret nodes for Realtek codecs
hda-spec: Add secret eq verbs for IDT
hda-spec: Add IDT 92HD95 to IDT verb codec list
hda-spec.c | 93 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++------
1 file changed, 85 insertions(+), 8 deletions(-)
--
1.9.1
2
6

[alsa-devel] [PATCH v3 1/5] sound: pci: ctxfi: added reference of snd_card
by Sudip Mukherjee 22 Sep '14
by Sudip Mukherjee 22 Sep '14
22 Sep '14
added and initialized a pointer of snd_card in the struct hw to get a reference of
the card in other functions
Signed-off-by: Sudip Mukherjee <sudip(a)vectorindia.org>
---
sound/pci/ctxfi/ctatc.c | 1 +
sound/pci/ctxfi/cthardware.h | 2 ++
2 files changed, 3 insertions(+)
diff --git a/sound/pci/ctxfi/ctatc.c b/sound/pci/ctxfi/ctatc.c
index d92a08c..b21eda4 100644
--- a/sound/pci/ctxfi/ctatc.c
+++ b/sound/pci/ctxfi/ctatc.c
@@ -1333,6 +1333,7 @@ static int atc_create_hw_devs(struct ct_atc *atc)
pr_err("Failed to create hw obj!!!\n");
return err;
}
+ hw->card = atc->card;
atc->hw = hw;
/* Initialize card hardware. */
diff --git a/sound/pci/ctxfi/cthardware.h b/sound/pci/ctxfi/cthardware.h
index 5977e9a..940bbd0 100644
--- a/sound/pci/ctxfi/cthardware.h
+++ b/sound/pci/ctxfi/cthardware.h
@@ -20,6 +20,7 @@
#include <linux/types.h>
#include <linux/pci.h>
+#include <sound/core.h>
enum CHIPTYP {
ATC20K1,
@@ -184,6 +185,7 @@ struct hw {
void *irq_callback_data;
struct pci_dev *pci; /* the pci kernel structure of this card */
+ struct snd_card *card; /* pointer to this card */
int irq;
unsigned long io_base;
unsigned long mem_base;
--
1.8.1.2
2
12
At Fri, 19 Sep 2014 10:21:10 +0000 (GMT),
Renu Tyagi wrote:
>
> Hi,
> Ignore previous patches. Resubmiting patch series.
>
> ------------------------------------------------------------------------
>
> Signed-off-by: renu tyagi
The mail address has to be provided in the sign-off line together with
your name. And usually, it's "Renu Tyagi", not "renu tyagi". If you
prefer the latter form, I can take it so, though.
Also, the patch series should be shown like "01/11", not "1/11", to
align with the rest.
You may try git-send-email for submitting a series of patches. This
will do most of things right.
thanks,
Takashi
> ---
> src/mixer/mixer.c | 4 +---
> 1 files changed, 1 insertions(+), 3 deletions(-)
>
> diff --git a/src/mixer/mixer.c b/src/mixer/mixer.c
> index 56e023d..eee9875 100644
> --- a/src/mixer/mixer.c
> +++ b/src/mixer/mixer.c
> @@ -204,10 +204,8 @@ int snd_mixer_attach(snd_mixer_t *mixer, const char *name)
> if (err < 0)
> return err;
> err = snd_mixer_attach_hctl(mixer, hctl);
> - if (err < 0) {
> - snd_hctl_close(hctl);
> + if (err < 0)
> return err;
> - }
> return 0;
> }
>
> --
> 1.7.1
> [2 patch_1.patch <application/octet-stream (base64)>]
>
1
0

[alsa-devel] [PATCH] ALSA: snd-usb-caiaq: Fix LED commands for Kore controller
by Daniel Mack 22 Sep '14
by Daniel Mack 22 Sep '14
22 Sep '14
KoreController and KoreController2 need an EP1_CMD_DIMM_LEDS command to set
their LEDs, not EP1_CMD_WRITE_IO.
Signed-off-by: Daniel Mack <daniel(a)zonque.org>
Reported-and-tested-by: Brad Wilson <brad.wilson.00(a)gmail.com>
---
This bug is acutally ancient, but given that nobody actually noticed it
for so long makes me believe it's not worth flagging the patch for
stable@. Still, it would be good to have it for 3.17.
Thanks,
Daniel
sound/usb/caiaq/control.c | 18 +++++++++++-------
1 file changed, 11 insertions(+), 7 deletions(-)
diff --git a/sound/usb/caiaq/control.c b/sound/usb/caiaq/control.c
index f65fc09..b7a7c80 100644
--- a/sound/usb/caiaq/control.c
+++ b/sound/usb/caiaq/control.c
@@ -100,15 +100,19 @@ static int control_put(struct snd_kcontrol *kcontrol,
struct snd_usb_caiaqdev *cdev = caiaqdev(chip->card);
int pos = kcontrol->private_value;
int v = ucontrol->value.integer.value[0];
- unsigned char cmd = EP1_CMD_WRITE_IO;
+ unsigned char cmd;
- if (cdev->chip.usb_id ==
- USB_ID(USB_VID_NATIVEINSTRUMENTS, USB_PID_TRAKTORKONTROLX1))
- cmd = EP1_CMD_DIMM_LEDS;
-
- if (cdev->chip.usb_id ==
- USB_ID(USB_VID_NATIVEINSTRUMENTS, USB_PID_MASCHINECONTROLLER))
+ switch (cdev->chip.usb_id) {
+ case USB_ID(USB_VID_NATIVEINSTRUMENTS, USB_PID_MASCHINECONTROLLER):
+ case USB_ID(USB_VID_NATIVEINSTRUMENTS, USB_PID_TRAKTORKONTROLX1):
+ case USB_ID(USB_VID_NATIVEINSTRUMENTS, USB_PID_KORECONTROLLER2):
+ case USB_ID(USB_VID_NATIVEINSTRUMENTS, USB_PID_KORECONTROLLER):
cmd = EP1_CMD_DIMM_LEDS;
+ break;
+ default:
+ cmd = EP1_CMD_WRITE_IO;
+ break;
+ }
if (pos & CNT_INTVAL) {
int i = pos & ~CNT_INTVAL;
--
2.1.0
2
1
Allow the driver to report the hardware FIFO size.
Signed-off-by: Clemens Ladisch <clemens(a)ladisch.de>
---
sound/pci/oxygen/oxygen_pcm.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/sound/pci/oxygen/oxygen_pcm.c b/sound/pci/oxygen/oxygen_pcm.c
index cc0bcd9..0282824 100644
--- a/sound/pci/oxygen/oxygen_pcm.c
+++ b/sound/pci/oxygen/oxygen_pcm.c
@@ -29,6 +29,9 @@
/* the multichannel DMA channel has a 24-bit counter */
#define BUFFER_BYTES_MAX_MULTICH ((1 << 24) * 4)
+#define FIFO_BYTES 256
+#define FIFO_BYTES_MULTICH 1024
+
#define PERIOD_BYTES_MIN 64
#define DEFAULT_BUFFER_BYTES (BUFFER_BYTES_MAX / 2)
@@ -60,6 +63,7 @@ static const struct snd_pcm_hardware oxygen_stereo_hardware = {
.period_bytes_max = BUFFER_BYTES_MAX,
.periods_min = 1,
.periods_max = BUFFER_BYTES_MAX / PERIOD_BYTES_MIN,
+ .fifo_size = FIFO_BYTES,
};
static const struct snd_pcm_hardware oxygen_multichannel_hardware = {
.info = SNDRV_PCM_INFO_MMAP |
@@ -87,6 +91,7 @@ static const struct snd_pcm_hardware oxygen_multichannel_hardware = {
.period_bytes_max = BUFFER_BYTES_MAX_MULTICH,
.periods_min = 1,
.periods_max = BUFFER_BYTES_MAX_MULTICH / PERIOD_BYTES_MIN,
+ .fifo_size = FIFO_BYTES_MULTICH,
};
static const struct snd_pcm_hardware oxygen_ac97_hardware = {
.info = SNDRV_PCM_INFO_MMAP |
@@ -106,6 +111,7 @@ static const struct snd_pcm_hardware oxygen_ac97_hardware = {
.period_bytes_max = BUFFER_BYTES_MAX,
.periods_min = 1,
.periods_max = BUFFER_BYTES_MAX / PERIOD_BYTES_MIN,
+ .fifo_size = FIFO_BYTES,
};
static const struct snd_pcm_hardware *const oxygen_hardware[PCM_COUNT] = {
@@ -141,6 +147,10 @@ static int oxygen_open(struct snd_pcm_substream *substream,
runtime->hw.rates &= ~(SNDRV_PCM_RATE_32000 |
SNDRV_PCM_RATE_64000);
runtime->hw.rate_min = 44100;
+ /* fall through */
+ case PCM_A:
+ case PCM_B:
+ runtime->hw.fifo_size = 0;
break;
case PCM_MULTICH:
runtime->hw.channels_max = chip->model.dac_channels_pcm;
2
1
The calculated frame size was wrong because snd_pcm_format_physical_width()
actually returns the number of bits, not bytes.
Use snd_pcm_format_size() instead, which not only returns bytes, but also
simplifies the calculation.
Fixes: 8bea869c5e56 ("ALSA: PCM midlevel: improve fifo_size handling")
Signed-off-by: Clemens Ladisch <clemens(a)ladisch.de>
---
sound/core/pcm_lib.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/sound/core/pcm_lib.c b/sound/core/pcm_lib.c
index b03c7ae..dfc2854 100644
--- a/sound/core/pcm_lib.c
+++ b/sound/core/pcm_lib.c
@@ -1784,14 +1784,16 @@ static int snd_pcm_lib_ioctl_fifo_size(struct snd_pcm_substream *substream,
{
struct snd_pcm_hw_params *params = arg;
snd_pcm_format_t format;
- int channels, width;
+ int channels;
+ ssize_t frame_size;
params->fifo_size = substream->runtime->hw.fifo_size;
if (!(substream->runtime->hw.info & SNDRV_PCM_INFO_FIFO_IN_FRAMES)) {
format = params_format(params);
channels = params_channels(params);
- width = snd_pcm_format_physical_width(format);
- params->fifo_size /= width * channels;
+ frame_size = snd_pcm_format_size(format, channels);
+ if (frame_size > 0)
+ params->fifo_size /= (unsigned)frame_size;
}
return 0;
}
2
1
This patch adds support for the Xonar Xense card. Has been working fine
for over a year and with the latest Xonar patches.
I have not touched the CS4362A (surround), nor am I sure how to go about
it without more code duplication or refactoring.
Signed-off-by: Harley Griggs <hgriggs(a)posteo.co.uk>
---
sound/pci/oxygen/virtuoso.c | 1 +
sound/pci/oxygen/xonar_pcm179x.c | 135 +++++++++++++++++++++++++++++++++++++++
2 files changed, 136 insertions(+)
diff --git a/sound/pci/oxygen/virtuoso.c b/sound/pci/oxygen/virtuoso.c
index 7b317a2..83de6fb 100644
--- a/sound/pci/oxygen/virtuoso.c
+++ b/sound/pci/oxygen/virtuoso.c
@@ -52,6 +52,7 @@ static const struct pci_device_id xonar_ids[] = {
{ OXYGEN_PCI_SUBID(0x1043, 0x835d) },
{ OXYGEN_PCI_SUBID(0x1043, 0x835e) },
{ OXYGEN_PCI_SUBID(0x1043, 0x838e) },
+ { OXYGEN_PCI_SUBID(0x1043, 0x8428) },
{ OXYGEN_PCI_SUBID(0x1043, 0x8522) },
{ OXYGEN_PCI_SUBID(0x1043, 0x85f4) },
{ OXYGEN_PCI_SUBID_BROKEN_EEPROM },
diff --git a/sound/pci/oxygen/xonar_pcm179x.c b/sound/pci/oxygen/xonar_pcm179x.c
index e026059..e06acfc 100644
--- a/sound/pci/oxygen/xonar_pcm179x.c
+++ b/sound/pci/oxygen/xonar_pcm179x.c
@@ -212,6 +212,9 @@
#define GPIO_ST_MAGIC 0x0040
#define GPIO_ST_HP 0x0080
+#define GPIO_XENSE_OUTPUT_ENABLE (0x0001 | 0x0010 | 0x0020)
+#define GPIO_XENSE_SPEAKERS 0x0080
+
#define I2C_DEVICE_PCM1796(i) (0x98 + ((i) << 1)) /* 10011, ii, /W=0 */
#define I2C_DEVICE_CS2000 0x9c /* 100111, 0, /W=0 */
@@ -499,6 +502,52 @@ static void xonar_stx_init(struct oxygen *chip)
xonar_st_init_common(chip);
}
+static void xonar_xense_init(struct oxygen *chip)
+{
+ struct xonar_pcm179x *data = chip->model_data;
+
+ data->generic.ext_power_reg = OXYGEN_GPI_DATA;
+ data->generic.ext_power_int_reg = OXYGEN_GPI_INTERRUPT_MASK;
+ data->generic.ext_power_bit = GPI_EXT_POWER;
+ xonar_init_ext_power(chip);
+
+ data->generic.anti_pop_delay = 100;
+ data->has_cs2000 = 1;
+ data->cs2000_regs[CS2000_FUN_CFG_1] = CS2000_REF_CLK_DIV_1;
+ data->broken_i2c = true;
+
+ oxygen_write16(chip, OXYGEN_I2S_A_FORMAT,
+ OXYGEN_RATE_48000 |
+ OXYGEN_I2S_FORMAT_I2S |
+ OXYGEN_I2S_MCLK(MCLK_512) |
+ OXYGEN_I2S_BITS_16 |
+ OXYGEN_I2S_MASTER |
+ OXYGEN_I2S_BCLK_64);
+
+ xonar_st_init_i2c(chip);
+ cs2000_registers_init(chip);
+
+ data->generic.output_enable_bit = GPIO_XENSE_OUTPUT_ENABLE;
+ data->dacs = chip->model.dac_channels_mixer / 2;
+ data->hp_gain_offset = 2*-18;
+
+ pcm1796_init(chip);
+
+ oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
+ GPIO_INPUT_ROUTE | GPIO_ST_HP_REAR |
+ GPIO_ST_MAGIC | GPIO_XENSE_SPEAKERS);
+ oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA,
+ GPIO_INPUT_ROUTE | GPIO_ST_HP_REAR |
+ GPIO_XENSE_SPEAKERS);
+
+ xonar_init_cs53x1(chip);
+ xonar_enable_output(chip);
+
+ snd_component_add(chip->card, "PCM1796");
+ snd_component_add(chip->card, "CS5381");
+ snd_component_add(chip->card, "CS2000");
+}
+
static void xonar_d2_cleanup(struct oxygen *chip)
{
xonar_disable_output(chip);
@@ -859,6 +908,67 @@ static const struct snd_kcontrol_new st_controls[] = {
},
};
+static int xense_output_switch_get(struct snd_kcontrol *ctl,
+ struct snd_ctl_elem_value *value)
+{
+ struct oxygen *chip = ctl->private_data;
+ u16 gpio;
+
+ gpio = oxygen_read16(chip, OXYGEN_GPIO_DATA);
+ if (gpio & GPIO_XENSE_SPEAKERS)
+ value->value.enumerated.item[0] = 0;
+ else if (!(gpio & GPIO_XENSE_SPEAKERS) && (gpio & GPIO_ST_HP_REAR))
+ value->value.enumerated.item[0] = 1;
+ else
+ value->value.enumerated.item[0] = 2;
+ return 0;
+}
+
+static int xense_output_switch_put(struct snd_kcontrol *ctl,
+ struct snd_ctl_elem_value *value)
+{
+ struct oxygen *chip = ctl->private_data;
+ struct xonar_pcm179x *data = chip->model_data;
+ u16 gpio_old, gpio;
+
+ mutex_lock(&chip->mutex);
+ gpio_old = oxygen_read16(chip, OXYGEN_GPIO_DATA);
+ gpio = gpio_old;
+ switch (value->value.enumerated.item[0]) {
+ case 0:
+ gpio |= GPIO_XENSE_SPEAKERS | GPIO_ST_HP_REAR;
+ break;
+ case 1:
+ gpio = (gpio | GPIO_ST_HP_REAR) & ~GPIO_XENSE_SPEAKERS;
+ break;
+ case 2:
+ gpio &= ~(GPIO_XENSE_SPEAKERS | GPIO_ST_HP_REAR);
+ break;
+ }
+ oxygen_write16(chip, OXYGEN_GPIO_DATA, gpio);
+ data->hp_active = !(gpio & GPIO_XENSE_SPEAKERS);
+ update_pcm1796_volume(chip);
+ mutex_unlock(&chip->mutex);
+ return gpio != gpio_old;
+}
+
+static const struct snd_kcontrol_new xense_controls[] = {
+ {
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .name = "Analog Output",
+ .info = st_output_switch_info,
+ .get = xense_output_switch_get,
+ .put = xense_output_switch_put,
+ },
+ {
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .name = "Headphones Impedance Playback Enum",
+ .info = st_hp_volume_offset_info,
+ .get = st_hp_volume_offset_get,
+ .put = st_hp_volume_offset_put,
+ },
+};
+
static void xonar_line_mic_ac97_switch(struct oxygen *chip,
unsigned int reg, unsigned int mute)
{
@@ -946,6 +1056,23 @@ static int xonar_st_mixer_init(struct oxygen *chip)
return 0;
}
+static int xonar_xense_mixer_init(struct oxygen *chip)
+{
+ unsigned int i;
+ int err;
+
+ for (i = 0; i < ARRAY_SIZE(xense_controls); ++i) {
+ err = snd_ctl_add(chip->card,
+ snd_ctl_new1(&xense_controls[i], chip));
+ if (err < 0)
+ return err;
+ }
+ err = add_pcm1796_controls(chip);
+ if (err < 0)
+ return err;
+ return 0;
+}
+
static void dump_pcm1796_registers(struct oxygen *chip,
struct snd_info_buffer *buffer)
{
@@ -1146,6 +1273,14 @@ int get_xonar_pcm179x_model(struct oxygen *chip,
chip->model.resume = xonar_stx_resume;
chip->model.set_dac_params = set_pcm1796_params;
break;
+ case 0x8428:
+ chip->model = model_xonar_st;
+ chip->model.shortname = "Xonar Xense";
+ chip->model.chip = "AV100";
+ chip->model.init = xonar_xense_init;
+ chip->model.mixer_init = xonar_xense_mixer_init;
+ break;
+
default:
return -EINVAL;
}
--
1.8.5.5
3
10

[alsa-devel] [PATCH] ASoC: fsl-asoc-card: Allow to describe master or slave mode
by Fabio Estevam 22 Sep '14
by Fabio Estevam 22 Sep '14
22 Sep '14
From: Fabio Estevam <fabio.estevam(a)freescale.com>
Provide a mechanism to describe whether the system runs in master or slave mode.
In order to keep compatibilty with existing dtb's let slave mode be default one.
Tested on a imx6q-sabresd board in both modes.
Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com>
---
Documentation/devicetree/bindings/sound/fsl-asoc-card.txt | 5 +++++
sound/soc/fsl/fsl-asoc-card.c | 15 ++++++++++++---
2 files changed, 17 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/sound/fsl-asoc-card.txt b/Documentation/devicetree/bindings/sound/fsl-asoc-card.txt
index a96774c..1bbc828 100644
--- a/Documentation/devicetree/bindings/sound/fsl-asoc-card.txt
+++ b/Documentation/devicetree/bindings/sound/fsl-asoc-card.txt
@@ -59,6 +59,10 @@ Optional properties:
- audio-asrc : The phandle of ASRC. It can be absent if there's no
need to add ASRC support via DPCM.
+ - audio-cpu-mode : The operating mode for the audio cpu interface.
+ "slave" - audio clock comes from the external codec
+ "master" -audio clock is generated from the audio cpu
+
Example:
sound-cs42888 {
compatible = "fsl,imx-audio-cs42888";
@@ -66,6 +70,7 @@ sound-cs42888 {
audio-cpu = <&esai>;
audio-asrc = <&asrc>;
audio-codec = <&cs42888>;
+ audio-cpu-mode = "master";
audio-routing =
"Line Out Jack", "AOUT1L",
"Line Out Jack", "AOUT1R",
diff --git a/sound/soc/fsl/fsl-asoc-card.c b/sound/soc/fsl/fsl-asoc-card.c
index 007c772..bd903cc 100644
--- a/sound/soc/fsl/fsl-asoc-card.c
+++ b/sound/soc/fsl/fsl-asoc-card.c
@@ -393,6 +393,7 @@ static int fsl_asoc_card_probe(struct platform_device *pdev)
struct clk *codec_clk;
u32 width;
int ret;
+ const char *mode;
priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
@@ -441,6 +442,17 @@ static int fsl_asoc_card_probe(struct platform_device *pdev)
/* Assign a default DAI format, and allow each card to overwrite it */
priv->dai_fmt = DAI_FMT_BASE;
+ mode = of_get_property(np, "audio-cpu-mode", NULL);
+ if (mode) {
+ if (!strcmp(mode, "master"))
+ priv->dai_fmt |= SND_SOC_DAIFMT_CBS_CFS;
+ else if (!strcmp(mode, "slave"))
+ priv->dai_fmt |= SND_SOC_DAIFMT_CBM_CFM;
+ } else {
+ /* Assign slave mode by default */
+ priv->dai_fmt |= SND_SOC_DAIFMT_CBM_CFM;
+ }
+
/* Diversify the card configurations */
if (of_device_is_compatible(np, "fsl,imx-audio-cs42888")) {
priv->card.set_bias_level = NULL;
@@ -448,16 +460,13 @@ static int fsl_asoc_card_probe(struct platform_device *pdev)
priv->cpu_priv.sysclk_freq[RX] = priv->codec_priv.mclk_freq;
priv->cpu_priv.sysclk_dir[TX] = SND_SOC_CLOCK_OUT;
priv->cpu_priv.sysclk_dir[RX] = SND_SOC_CLOCK_OUT;
- priv->dai_fmt |= SND_SOC_DAIFMT_CBS_CFS;
} else if (of_device_is_compatible(np, "fsl,imx-audio-sgtl5000")) {
priv->codec_priv.mclk_id = SGTL5000_SYSCLK;
- priv->dai_fmt |= SND_SOC_DAIFMT_CBM_CFM;
} else if (of_device_is_compatible(np, "fsl,imx-audio-wm8962")) {
priv->card.set_bias_level = fsl_asoc_card_set_bias_level;
priv->codec_priv.mclk_id = WM8962_SYSCLK_MCLK;
priv->codec_priv.fll_id = WM8962_SYSCLK_FLL;
priv->codec_priv.pll_id = WM8962_FLL;
- priv->dai_fmt |= SND_SOC_DAIFMT_CBM_CFM;
} else {
dev_err(&pdev->dev, "unknown Device Tree compatible\n");
return -EINVAL;
--
1.9.1
3
2

20 Sep '14
Hi, as mentioned in subject: Production release 0.4.2 planed of Advanced
Gtk+ Sequencer.
Now, comes your part I would like you to test functionality. I'll do for
you a wiki page of aspects to test.
Please visit http://ags.sf.net and wiki page
https://sourceforge.net/p/ags/wiki/testing-cheatsheet/
Happy to hear of you pretty soon!
Joël
1
0

Re: [alsa-devel] [PATCH] ASoC: fsl_ssi: Remove unneeded 'i2s-slave' property
by Fabio.Estevam@freescale.com 20 Sep '14
by Fabio.Estevam@freescale.com 20 Sep '14
20 Sep '14
Sorry, I missed to add alsa-devel(a)alsa-project.org on Cc.
________________________________________
From: Timur Tabi <timur(a)tabi.org>
Sent: Thursday, September 18, 2014 3:37 PM
To: Nicolin Chen
Cc: Estevam Fabio-R49496; broonie(a)kernel.org; Xiubo Li-B47053
Subject: Re: [PATCH] ASoC: fsl_ssi: Remove unneeded 'i2s-slave' property
On 09/18/2014 01:32 PM, Nicolin Chen wrote:
> On Thu, Sep 18, 2014 at 03:11:17PM -0300, Fabio Estevam wrote:
>> There is no need to use 'i2s-slave' property, since master/slave configuration
>> are passed via machine layer.
>>
>> This change does not break existing users because they do check for slave
>> mode inside sound/soc/fsl/mpc8610_hpcd.c/p1022_ds.c and p1022_rdk.c
>
> Besides this change, I'm wondering if we can take a further step to drop
> this entire property from Device Tree binding document as newer platforms
> may no long need this property in their DT bindings.
I think the property is necessary if anyone takes a P1022 or MPC8610 and
uses it in a platform that doesn't support i2s-slave. But currently,
the code doesn't support anything else. So technically, we could remove
it, and if anyone does want to support another configuration, he will
have to add that support the "new" way.
3
7
On Thu, Sep 11, 2014 at 1:33 AM, Sergey <sergemp(a)mail.ru> wrote:
> Sat, 6 Sep 2014 Radoslaw Szkodzinski wrote:
>
>>A recent change in alsa-plugins 1.0.28 alsa-jack has changed the poll semantics.
>>This breaks audacious and mpv, perhaps more applications.
>>
>>The regression is caused by:
>>Commit: 9217377337cdceb62abeb5969112b738bb5cd551
>>jack: fix polling and recovering
>
> I'm initial author of this commit and I'd love to fix the issue,
> but it never happens to me. I need your help to fix it.
>
> Can you provide some steps to reproduce this bug? How much time it
> takes to reproduce it? Can you reproduce it with alsa 1.0.27 and
> alsa-jack plugin 1.0.28? You can download that plugin separately:
I'll test this during the weekend. 1.0.27.x was fine with alsa 1.0.27.
> By the way, what distribution are you using?
> Is there a livecd that I can download to reproduce this problem?
This is actually Gentoo, so not really. However, I think it should be
reproducible anywhere.
>>This might or might not be related to lack of
>>snd_pcm_poll_descriptor_revents call or the use of a timer instead of
>>repolling.
>
> It should not. But we can't be sure until we find what causes it.
I'm not entirely sure myself. The above mentioned applications cause
the problem.
The whole setup consists of:
Highly patched 3.12.x kernel, no RT patches but in full preempt mode.
Jack2 in DBus mode, realtime and mlock enabled. ALSA output to ICE1724
soundcard, sample rate matched everywhere to 44.1kHz.
ALSA set to use speexrate_best and 44.1kHz by default if this is important.
Applications:
Ladish
Carla with Caps equalizers and one other personal LADSPA plugin (RT safe).
Directly connecting to playback also reproduces the issue.
Any period size and nframes, though very long period sizes vastly
reduce the likelihood this is reproducible.
It is not related to xruns directly, but an xrun can precipitate the issue too.
Reproducible in audacious 3.4.1 or older and mpv (git revision, from
this month or older), but not with sox or aplay.
No problems with direct Jack outputs of the above applications whatsoever.
Both of the problematic applications use a sleep timer in addition or
instead of polling. (audacious due to a bug, mpv by design I think)
> I'm sorry for bothering you.
Not a bother at all, I'd like to see this fixed.
R.
1
1
Kukjin,
Your commit 52ad6582ceb2 ("ARM: S5PC100: no more support S5PC100 SoC"
landed in next-20140702. It removed the Kconfig symbol MACH_SMDKC100
(and a lot of other stuff).
Is the trivial patch to also remove the last two references to
MACH_SMDKC100 from sound/soc/samsung/Kconfig/ queued somewhere? I don't
think it was part of the series that included the above commit.
Paul Bolle
3
4
Signed-off-by: renu tyagi <renu.tyagi(a)samsung.com>
---
src/mixer/simple_abst.c | 2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/src/mixer/simple_abst.c b/src/mixer/simple_abst.c
index 9e9aaf5..5297472 100644
--- a/src/mixer/simple_abst.c
+++ b/src/mixer/simple_abst.c
@@ -70,6 +70,8 @@ static int try_open(snd_mixer_class_t *class, const char *lib)
void *h;
int err = 0;
+ if (!lib)
+ return -ENXIO;
path = getenv("ALSA_MIXER_SIMPLE_MODULES");
if (!path)
path = SO_PATH;
--
1.7.1
1
0
Signed-off-by: renu tyagi
---
src/rawmidi/rawmidi.c | 5 ++++-
1 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/src/rawmidi/rawmidi.c b/src/rawmidi/rawmidi.c
index b835b47..ac699b4 100644
--- a/src/rawmidi/rawmidi.c
+++ b/src/rawmidi/rawmidi.c
@@ -256,8 +256,11 @@ static int snd_rawmidi_open_conf(snd_rawmidi_t **inputp, snd_rawmidi_t **outputp
snd_config_delete(type_conf);
if (err >= 0)
err = open_func(inputp, outputp, name, rawmidi_root, rawmidi_conf, mode);
- if (err < 0)
+ if (err < 0) {
+ if (h)
+ snd_dlclose(h);
return err;
+ }
if (inputp) {
(*inputp)->dl_handle = h; h = NULL;
snd_rawmidi_params_default(*inputp, ¶ms);
--
1.7.1
1
0
Signed-off-by: renu tyagi
---
modules/mixer/simple/sbase.c | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/modules/mixer/simple/sbase.c b/modules/mixer/simple/sbase.c
index 97feee8..bb2f59d 100644
--- a/modules/mixer/simple/sbase.c
+++ b/modules/mixer/simple/sbase.c
@@ -377,6 +377,7 @@ static int simple_event_add1(snd_mixer_class_t *class,
if (ctype != SND_CTL_ELEM_TYPE_BOOLEAN) {
__invalid_type:
snd_mixer_selem_id_free(id);
+ free(hsimple);
return -EINVAL;
}
break;
--
1.7.1
1
0
Hello.
Something was broken recently.
http://www.alsa-project.org/alsa-info.sh leads to Error 404.
As well as http://www.alsa-project.org/alsa-info.sh.changelog
It breaks many tutorials and documentation references, e.g.:
http://www.kernel.org/doc/Documentation/sound/alsa/HD-Audio.txt
It also breaks the alsa-info.sh script itself attempting to update from that url.
--
Sergey
2
1
Hello,
I've come across this earlier post from the alsa-devel mailing list :
http://thread.gmane.org/gmane.linux.alsa.devel/126241/focus=126682
It deals with a kernel patch made to support some Focusrite Scarlett
hardware, you can find the github project page is here :
https://github.com/smilingthax/alsa-driver_scarlett
I would be really interested in it being integrated into alsa.
Unfortunately, it appears that the original developer of this patch
cannot put any time into such a thing. Since I'm not skilled enough to
perform this integration, i wanted to know if anyone was willing to work
on this ? I own a Focusrite Scarlett 18i20 and can perform any test to help.
7
10

19 Sep '14
I was blind to see interrupt was requested in codec probe instead of i2c
probe when doing commit 4adeb0ccf86a ("ASoC: max98090: Fix missing free_irq")
and there is still a case where interrupt is kept requested. Although not as
fatal as original issue.
Since codec can be reprobed while driver is loaded the subsequent
max98090_probe() call will fail in interrupt request since it wasn't freed.
Fix this by explicitly freeing irq in max98090_remove().
Signed-off-by: Jarkko Nikula <jarkko.nikula(a)linux.intel.com>
---
for-next, I don't think this is critical enough for stable.
---
sound/soc/codecs/max98090.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/sound/soc/codecs/max98090.c b/sound/soc/codecs/max98090.c
index f1543653a699..ccc1466c0440 100644
--- a/sound/soc/codecs/max98090.c
+++ b/sound/soc/codecs/max98090.c
@@ -2413,6 +2413,7 @@ static int max98090_remove(struct snd_soc_codec *codec)
{
struct max98090_priv *max98090 = snd_soc_codec_get_drvdata(codec);
+ devm_free_irq(codec->dev, max98090->irq, codec);
cancel_delayed_work_sync(&max98090->jack_work);
cancel_delayed_work_sync(&max98090->pll_det_enable_work);
cancel_work_sync(&max98090->pll_det_disable_work);
--
2.1.0
2
2
From 14668184bf5489a0a8398ba51a1a130654cb7d82 Mon Sep 17 00:00:00 2001
From: renu tyagi <renu.tyagi(a)samsung.com>
Date: Fri, 19 Sep 2014 12:59:23 +0530
Subject: [PATCH] [pcm_file] : fixed missing free before return in case of error
Signed-off-by: renu tyagi <renu.tyagi(a)samsung.com>
---
src/pcm/pcm_file.c | 2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/src/pcm/pcm_file.c b/src/pcm/pcm_file.c
index a0b8bf4..f6d222f 100644
--- a/src/pcm/pcm_file.c
+++ b/src/pcm/pcm_file.c
@@ -758,6 +758,7 @@ int snd_pcm_file_open(snd_pcm_t **pcmp, const char *name,
ifd = open(ifname, O_RDONLY); /* TODO: mind blocking mode */
if (ifd < 0) {
SYSERR("open %s for reading failed", ifname);
+ free(file->fname);
free(file);
return -errno;
}
@@ -772,6 +773,7 @@ int snd_pcm_file_open(snd_pcm_t **pcmp, const char *name,
err = snd_pcm_new(&pcm, SND_PCM_TYPE_FILE, name, slave->stream, slave->mode);
if (err < 0) {
free(file->fname);
+ free(file->ifname);
free(file);
return err;
}
--
1.7.1
1
0

[alsa-devel] [PATCH] ALSA: hda - Add fixup model name lookup for Lemote A1205
by Huacai Chen 19 Sep '14
by Huacai Chen 19 Sep '14
19 Sep '14
Lemote A1004 is already added in commit a2dd933d01f (ALSA: hda - Add
fixup name lookup for CX5051 and 5066 codecs), but Lemote A1205 has
missing.
Signed-off-by: Huacai Chen <chenhc(a)lemote.com>
Cc: <stable(a)vger.kernel.org> # 3.15+
---
sound/pci/hda/patch_conexant.c | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/sound/pci/hda/patch_conexant.c b/sound/pci/hda/patch_conexant.c
index 5f214f1..726b7c6 100644
--- a/sound/pci/hda/patch_conexant.c
+++ b/sound/pci/hda/patch_conexant.c
@@ -798,6 +798,7 @@ static const struct hda_model_fixup cxt5066_fixup_models[] = {
{ .id = CXT_PINCFG_LENOVO_TP410, .name = "tp410" },
{ .id = CXT_FIXUP_THINKPAD_ACPI, .name = "thinkpad" },
{ .id = CXT_PINCFG_LEMOTE_A1004, .name = "lemote-a1004" },
+ { .id = CXT_PINCFG_LEMOTE_A1205, .name = "lemote-a1205" },
{ .id = CXT_FIXUP_OLPC_XO, .name = "olpc-xo" },
{}
};
--
1.7.7.3
2
1
At Fri, 19 Sep 2014 04:56:12 +0000 (GMT),
Renu Tyagi wrote:
>
>
> From dc9aaa5d6d7a368dc34e1cbdf3fb79670eba1870 Mon Sep 17 00:00:00 2001
> From: renu tyagi <renu.tyagi(a)samsung.com>
> Date: Fri, 19 Sep 2014 10:17:28 +0530
> Subject: [PATCH] [simple_abst] : adding null check for lib
These are superfluous, but I don't care.
Instead of hanging under the previous thread, could you resubmit your
whole series again (after fixing the issues I suggested -- patch
splitting, subject / changelog reformatting, etc). I have no idea
which one to be taken any longer.
thanks,
Takashi
1
0

18 Sep '14
On Thu, 2014-09-04 at 18:02 +0200, Arnd Bergmann wrote:
> On Thursday 04 September 2014, Paul Bolle wrote:
> > Ditto for [...] MACH_SMDKC110, and MACH_SMDKV210. Note that
> > here SND_SOC_SMDK_WM8580_PCM can not be set anymore.
>>
> [...]
> I think it would be nice if you could submit a patch to remove the
> drivers from ASoC, then we can see if anybody complains.
Also the same thing for v3.17-rc5 and next-20140918. So let's see if we
can remove this driver too.
Done on top of next-20140918. Again untested.
-------->8--------
From: Paul Bolle <pebolle(a)tiscali.nl>
Commit 28c8331d386a ("ARM: S5PV210: Remove support for board files")
removed the Kconfig symbols MACH_SMDKC110 and MACH_SMDKV210. As a result
the dependencies of SND_SOC_SMDK_WM8580_PCM can never be met. So remove
the unbuildable "SoC PCM Audio support for WM8580 on SMDK".
Signed-off-by: Paul Bolle <pebolle(a)tiscali.nl>
---
sound/soc/samsung/Kconfig | 9 --
sound/soc/samsung/Makefile | 2 -
sound/soc/samsung/smdk_wm8580pcm.c | 186 -------------------------------------
3 files changed, 197 deletions(-)
delete mode 100644 sound/soc/samsung/smdk_wm8580pcm.c
diff --git a/sound/soc/samsung/Kconfig b/sound/soc/samsung/Kconfig
index 9d9b149ad977..52fd0a446bdf 100644
--- a/sound/soc/samsung/Kconfig
+++ b/sound/soc/samsung/Kconfig
@@ -153,15 +153,6 @@ config SND_SOC_SAMSUNG_SMDK_SPDIF
help
Say Y if you want to add support for SoC S/PDIF audio on the SMDK.
-config SND_SOC_SMDK_WM8580_PCM
- tristate "SoC PCM Audio support for WM8580 on SMDK"
- depends on SND_SOC_SAMSUNG && (MACH_SMDKV210 || MACH_SMDKC110)
- depends on REGMAP_I2C
- select SND_SOC_WM8580
- select SND_SAMSUNG_PCM
- help
- Say Y if you want to add support for SoC audio on the SMDK.
-
config SND_SOC_SMDK_WM8994_PCM
tristate "SoC PCM Audio support for WM8994 on SMDK"
depends on SND_SOC_SAMSUNG
diff --git a/sound/soc/samsung/Makefile b/sound/soc/samsung/Makefile
index c30293a67176..51b471ace06f 100644
--- a/sound/soc/samsung/Makefile
+++ b/sound/soc/samsung/Makefile
@@ -36,7 +36,6 @@ snd-soc-snow-objs := snow.o
snd-soc-smdk-wm9713-objs := smdk_wm9713.o
snd-soc-s3c64xx-smartq-wm8987-objs := smartq_wm8987.o
snd-soc-smdk-spdif-objs := smdk_spdif.o
-snd-soc-smdk-wm8580pcm-objs := smdk_wm8580pcm.o
snd-soc-smdk-wm8994pcm-objs := smdk_wm8994pcm.o
snd-soc-speyside-objs := speyside.o
snd-soc-tobermory-objs := tobermory.o
@@ -61,7 +60,6 @@ obj-$(CONFIG_SND_SOC_SNOW) += snd-soc-snow.o
obj-$(CONFIG_SND_SOC_SAMSUNG_SMDK_WM9713) += snd-soc-smdk-wm9713.o
obj-$(CONFIG_SND_SOC_SMARTQ) += snd-soc-s3c64xx-smartq-wm8987.o
obj-$(CONFIG_SND_SOC_SAMSUNG_SMDK_SPDIF) += snd-soc-smdk-spdif.o
-obj-$(CONFIG_SND_SOC_SMDK_WM8580_PCM) += snd-soc-smdk-wm8580pcm.o
obj-$(CONFIG_SND_SOC_SMDK_WM8994_PCM) += snd-soc-smdk-wm8994pcm.o
obj-$(CONFIG_SND_SOC_SPEYSIDE) += snd-soc-speyside.o
obj-$(CONFIG_SND_SOC_TOBERMORY) += snd-soc-tobermory.o
diff --git a/sound/soc/samsung/smdk_wm8580pcm.c b/sound/soc/samsung/smdk_wm8580pcm.c
deleted file mode 100644
index 63d079303561..000000000000
--- a/sound/soc/samsung/smdk_wm8580pcm.c
+++ /dev/null
@@ -1,186 +0,0 @@
-/*
- * sound/soc/samsung/smdk_wm8580pcm.c
- *
- * Copyright (c) 2011 Samsung Electronics Co. Ltd
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-#include <linux/module.h>
-#include <sound/soc.h>
-#include <sound/pcm_params.h>
-#include <sound/pcm.h>
-
-#include <asm/mach-types.h>
-
-#include "../codecs/wm8580.h"
-#include "dma.h"
-#include "pcm.h"
-
-/*
- * Board Settings:
- * o '1' means 'ON'
- * o '0' means 'OFF'
- * o 'X' means 'Don't care'
- *
- * SMDK6410 Base B/D: CFG1-0000, CFG2-1111
- * SMDKC110, SMDKV210: CFGB11-100100, CFGB12-0000
- */
-
-#define SMDK_WM8580_EXT_OSC 12000000
-#define SMDK_WM8580_EXT_MCLK 4096000
-#define SMDK_WM8580_EXT_VOICE 2048000
-
-static unsigned long mclk_freq;
-static unsigned long xtal_freq;
-
-/*
- * If MCLK clock directly gets from XTAL, we don't have to use PLL
- * to make MCLK, but if XTAL clock source connects with other codec
- * pin (like XTI), we should have to set codec's PLL to make MCLK.
- * Because Samsung SoC does not support pcmcdclk output like I2S.
- */
-
-static int smdk_wm8580_pcm_hw_params(struct snd_pcm_substream *substream,
- struct snd_pcm_hw_params *params)
-{
- struct snd_soc_pcm_runtime *rtd = substream->private_data;
- struct snd_soc_dai *codec_dai = rtd->codec_dai;
- struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
- int rfs, ret;
-
- switch (params_rate(params)) {
- case 8000:
- break;
- default:
- printk(KERN_ERR "%s:%d Sampling Rate %u not supported!\n",
- __func__, __LINE__, params_rate(params));
- return -EINVAL;
- }
-
- rfs = mclk_freq / params_rate(params) / 2;
-
- /* Set the codec DAI configuration */
- ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_DSP_B
- | SND_SOC_DAIFMT_IB_NF
- | SND_SOC_DAIFMT_CBS_CFS);
- if (ret < 0)
- return ret;
-
- /* Set the cpu DAI configuration */
- ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_DSP_B
- | SND_SOC_DAIFMT_IB_NF
- | SND_SOC_DAIFMT_CBS_CFS);
- if (ret < 0)
- return ret;
-
- if (mclk_freq == xtal_freq) {
- ret = snd_soc_dai_set_sysclk(codec_dai, WM8580_CLKSRC_MCLK,
- mclk_freq, SND_SOC_CLOCK_IN);
- if (ret < 0)
- return ret;
-
- ret = snd_soc_dai_set_clkdiv(codec_dai, WM8580_MCLK,
- WM8580_CLKSRC_MCLK);
- if (ret < 0)
- return ret;
- } else {
- ret = snd_soc_dai_set_sysclk(codec_dai, WM8580_CLKSRC_PLLA,
- mclk_freq, SND_SOC_CLOCK_IN);
- if (ret < 0)
- return ret;
-
- ret = snd_soc_dai_set_clkdiv(codec_dai, WM8580_MCLK,
- WM8580_CLKSRC_PLLA);
- if (ret < 0)
- return ret;
-
- ret = snd_soc_dai_set_pll(codec_dai, WM8580_PLLA, 0,
- xtal_freq, mclk_freq);
- if (ret < 0)
- return ret;
- }
-
- /* Set PCM source clock on CPU */
- ret = snd_soc_dai_set_sysclk(cpu_dai, S3C_PCM_CLKSRC_MUX,
- mclk_freq, SND_SOC_CLOCK_IN);
- if (ret < 0)
- return ret;
-
- /* Set SCLK_DIV for making bclk */
- ret = snd_soc_dai_set_clkdiv(cpu_dai, S3C_PCM_SCLK_PER_FS, rfs);
- if (ret < 0)
- return ret;
-
- return 0;
-}
-
-static struct snd_soc_ops smdk_wm8580_pcm_ops = {
- .hw_params = smdk_wm8580_pcm_hw_params,
-};
-
-static struct snd_soc_dai_link smdk_dai[] = {
- {
- .name = "WM8580 PAIF PCM RX",
- .stream_name = "Playback",
- .cpu_dai_name = "samsung-pcm.0",
- .codec_dai_name = "wm8580-hifi-playback",
- .platform_name = "samsung-audio",
- .codec_name = "wm8580.0-001b",
- .ops = &smdk_wm8580_pcm_ops,
- }, {
- .name = "WM8580 PAIF PCM TX",
- .stream_name = "Capture",
- .cpu_dai_name = "samsung-pcm.0",
- .codec_dai_name = "wm8580-hifi-capture",
- .platform_name = "samsung-pcm.0",
- .codec_name = "wm8580.0-001b",
- .ops = &smdk_wm8580_pcm_ops,
- },
-};
-
-static struct snd_soc_card smdk_pcm = {
- .name = "SMDK-PCM",
- .owner = THIS_MODULE,
- .dai_link = smdk_dai,
- .num_links = 2,
-};
-
-/*
- * After SMDKC110 Base Board's Rev is '0.1', 12MHz External OSC(X1)
- * is absent (or not connected), so we connect EXT_VOICE_CLK(OSC4),
- * 2.0484Mhz, directly with MCLK both Codec and SoC.
- */
-static int snd_smdk_probe(struct platform_device *pdev)
-{
- int ret = 0;
-
- xtal_freq = SMDK_WM8580_EXT_OSC;
- mclk_freq = SMDK_WM8580_EXT_MCLK;
-
- if (machine_is_smdkc110() || machine_is_smdkv210())
- xtal_freq = mclk_freq = SMDK_WM8580_EXT_VOICE;
-
- smdk_pcm.dev = &pdev->dev;
- ret = devm_snd_soc_register_card(&pdev->dev, &smdk_pcm);
- if (ret)
- dev_err(&pdev->dev, "snd_soc_register_card failed %d\n", ret);
-
- return ret;
-}
-
-static struct platform_driver snd_smdk_driver = {
- .driver = {
- .owner = THIS_MODULE,
- .name = "samsung-smdk-pcm",
- },
- .probe = snd_smdk_probe,
-};
-
-module_platform_driver(snd_smdk_driver);
-
-MODULE_AUTHOR("Sangbeom Kim, <sbkim73(a)samsung.com>");
-MODULE_DESCRIPTION("ALSA SoC SMDK WM8580 for PCM");
-MODULE_LICENSE("GPL");
--
1.9.3
2
1
At Thu, 18 Sep 2014 11:29:51 +0000 (GMT),
Renu Tyagi wrote:
>
> Hi,
> Bug Type : If lib is NULL return error to avoid strlen of NULL string
> File changed : simple_abst.c
> PFA patch6
>
> Thanks
> Renu Tyagi
> ----------------------------------------------------------------------------------------
> From 052755ef6fec398f4e49bd31e9e60fe42a14ba53 Mon Sep 17 00:00:00 2001
> From: renu tyagi <renu.tyagi(a)samsung.com>
> Date: Thu, 18 Sep 2014 16:41:43 +0530
> Subject: [PATCH 6/8] [simple_abst] : If lib is NULL return error to avoid strlen of NULL string.
>
>
> Signed-off-by: renu tyagi <renu.tyagi(a)samsung.com>
> ---
> src/mixer/simple_abst.c | 2 ++
> 1 files changed, 2 insertions(+), 0 deletions(-)
>
> diff --git a/src/mixer/simple_abst.c b/src/mixer/simple_abst.c
> index 9e9aaf5..67330c2 100644
> --- a/src/mixer/simple_abst.c
> +++ b/src/mixer/simple_abst.c
> @@ -71,6 +71,8 @@ static int try_open(snd_mixer_class_t *class, const char *lib)
> int err = 0;
>
> path = getenv("ALSA_MIXER_SIMPLE_MODULES");
> + if (!lib)
> + return -ENXIO;
This should be put before getenv() call.
Please fix and resubmit?
Takashi
> if (!path)
> path = SO_PATH;
> xlib = malloc(strlen(lib) + strlen(path) + 1 + 1);
> --
> 1.7.1
1
0
At Thu, 18 Sep 2014 11:24:41 +0000 (GMT),
Renu Tyagi wrote:
>
> Hi,
> Bug Type : Fixing Double free caused by calling snd_hctl_close(hctl) twice as it is called inside snd_mixer_attach_hctl also
> File changed : mixer.c
> PFA patch4
> -------------------------------------------------------
> From 685fba24eeb639e151f126026130cc631741bcad Mon Sep 17 00:00:00 2001
> From: renu tyagi <renu.tyagi(a)samsung.com>
> Date: Thu, 18 Sep 2014 16:26:45 +0530
> Subject: [PATCH 4/8] [mixer] : Fixing Double free caused by calling snd_hctl_close(hctl) twice as it is called inside snd_mixer_attach_hctl also
Please avoid too long subject line. Keep it concise, and put rather
the detailed description in the patch changelog text.
Takashi
>
>
> Signed-off-by: renu tyagi <renu.tyagi(a)samsung.com>
> ---
> src/mixer/mixer.c | 4 +---
> 1 files changed, 1 insertions(+), 3 deletions(-)
>
> diff --git a/src/mixer/mixer.c b/src/mixer/mixer.c
> index 56e023d..eee9875 100644
> --- a/src/mixer/mixer.c
> +++ b/src/mixer/mixer.c
> @@ -204,10 +204,8 @@ int snd_mixer_attach(snd_mixer_t *mixer, const char *name)
> if (err < 0)
> return err;
> err = snd_mixer_attach_hctl(mixer, hctl);
> - if (err < 0) {
> - snd_hctl_close(hctl);
> + if (err < 0)
> return err;
> - }
> return 0;
> }
>
> --
> 1.7.1
>
> Thanks
> Renu Tyagi
1
0
At Thu, 18 Sep 2014 11:15:50 +0000 (GMT),
Renu Tyagi wrote:
>
>
> Hi,
> Bug type : missing freeing resources before returning in case of errors
> Files changed : sbase.c pcm_file.c
> PFA patch
>
> -------------------------------------------------------------------
> From f201df1f5c5d129f21c663c81fdb495d9a3ca51e Mon Sep 17 00:00:00 2001
> From: renu tyagi <renu.tyagi(a)samsung.com>
> Date: Thu, 18 Sep 2014 16:17:55 +0530
> Subject: [PATCH 2/8] [sbase , pcm_file] : freeing resources before returning in case of errors
Please just send the patch as is. We don't need any foreword.
Also, if the changes cover over different areas, split the patch.
thanks,
Takashi
> Signed-off-by: renu tyagi <renu.tyagi(a)samsung.com>
> ---
> modules/mixer/simple/sbase.c | 1 +
> src/pcm/pcm_file.c | 2 ++
> 2 files changed, 3 insertions(+), 0 deletions(-)
>
> diff --git a/modules/mixer/simple/sbase.c b/modules/mixer/simple/sbase.c
> index 97feee8..bb2f59d 100644
> --- a/modules/mixer/simple/sbase.c
> +++ b/modules/mixer/simple/sbase.c
> @@ -377,6 +377,7 @@ static int simple_event_add1(snd_mixer_class_t *class,
> if (ctype != SND_CTL_ELEM_TYPE_BOOLEAN) {
> __invalid_type:
> snd_mixer_selem_id_free(id);
> + free(hsimple);
> return -EINVAL;
> }
> break;
> diff --git a/src/pcm/pcm_file.c b/src/pcm/pcm_file.c
> index a0b8bf4..f6d222f 100644
> --- a/src/pcm/pcm_file.c
> +++ b/src/pcm/pcm_file.c
> @@ -758,6 +758,7 @@ int snd_pcm_file_open(snd_pcm_t **pcmp, const char *name,
> ifd = open(ifname, O_RDONLY); /* TODO: mind blocking mode */
> if (ifd < 0) {
> SYSERR("open %s for reading failed", ifname);
> + free(file->fname);
> free(file);
> return -errno;
> }
> @@ -772,6 +773,7 @@ int snd_pcm_file_open(snd_pcm_t **pcmp, const char *name,
> err = snd_pcm_new(&pcm, SND_PCM_TYPE_FILE, name, slave->stream, slave->mode);
> if (err < 0) {
> free(file->fname);
> + free(file->ifname);
> free(file);
> return err;
> }
> --
> 1.7.1
>
> Thanks
> Renu Tyagi
>
1
0
Hi,
Bug Type : Null check before closing h
Files changed : pcm_hooks.c
PFA patch8
Thanks
Renu Tyagi
-------------------------------------------------------------------------
From 906a8b65911edfd9d8bef48450707685bf4b8980 Mon Sep 17 00:00:00 2001
From: renu tyagi <renu.tyagi(a)samsung.com>
Date: Thu, 18 Sep 2014 16:45:59 +0530
Subject: [PATCH 8/8] [pcm_hooks] : Null check before closing h
Signed-off-by: renu tyagi <renu.tyagi(a)samsung.com>
---
src/pcm/pcm_hooks.c | 3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/src/pcm/pcm_hooks.c b/src/pcm/pcm_hooks.c
index 0b93c64..ce1cf36 100644
--- a/src/pcm/pcm_hooks.c
+++ b/src/pcm/pcm_hooks.c
@@ -457,7 +457,8 @@ static int snd_pcm_hook_add_conf(snd_pcm_t *pcm, snd_config_t *root, snd_config_
err = hook_add_dlobj(pcm, h);
if (err < 0) {
- snd_dlclose(h);
+ if(h)
+ snd_dlclose(h);
return err;
}
return 0;
--
1.7.1
1
0

18 Sep '14
pr_* macros replaced with dev_* as they are more preffered over pr_*.
Signed-off-by: Sudip Mukherjee <sudip(a)vectorindia.org>
---
in v1 Takashi mentioned that now we have card->dev
so v2 is using card->dev as much as possible.
sound/pci/ctxfi/ctatc.c | 24 ++++++++++++++----------
sound/pci/ctxfi/cthw20k1.c | 15 +++++++++------
sound/pci/ctxfi/cthw20k2.c | 22 ++++++++++++++--------
sound/pci/ctxfi/ctmixer.c | 6 ++++--
sound/pci/ctxfi/ctpcm.c | 9 ++++++---
sound/pci/ctxfi/ctresource.c | 20 +++++++++++++-------
sound/pci/ctxfi/xfi.c | 15 +++++++++------
7 files changed, 69 insertions(+), 42 deletions(-)
diff --git a/sound/pci/ctxfi/ctatc.c b/sound/pci/ctxfi/ctatc.c
index d92a08c..a786bc1 100644
--- a/sound/pci/ctxfi/ctatc.c
+++ b/sound/pci/ctxfi/ctatc.c
@@ -1282,8 +1282,8 @@ static int atc_identify_card(struct ct_atc *atc, unsigned int ssid)
p = snd_pci_quirk_lookup_id(vendor_id, device_id, list);
if (p) {
if (p->value < 0) {
- pr_err("ctxfi: Device %04x:%04x is black-listed\n",
- vendor_id, device_id);
+ dev_err(atc->card->dev, "ctxfi: Device %04x:%04x is black-listed\n",
+ vendor_id, device_id);
return -ENOENT;
}
atc->model = p->value;
@@ -1314,7 +1314,8 @@ int ct_atc_create_alsa_devs(struct ct_atc *atc)
err = alsa_dev_funcs[i].create(atc, i,
alsa_dev_funcs[i].public_name);
if (err) {
- pr_err("ctxfi: Creating alsa device %d failed!\n", i);
+ dev_err(atc->card->dev,
+ "ctxfi: Creating alsa device %d failed!\n", i);
return err;
}
}
@@ -1330,7 +1331,7 @@ static int atc_create_hw_devs(struct ct_atc *atc)
err = create_hw_obj(atc->pci, atc->chip_type, atc->model, &hw);
if (err) {
- pr_err("Failed to create hw obj!!!\n");
+ dev_err(atc->card->dev, "Failed to create hw obj!!!\n");
return err;
}
atc->hw = hw;
@@ -1349,7 +1350,8 @@ static int atc_create_hw_devs(struct ct_atc *atc)
err = rsc_mgr_funcs[i].create(atc->hw, &atc->rsc_mgrs[i]);
if (err) {
- pr_err("ctxfi: Failed to create rsc_mgr %d!!!\n", i);
+ dev_err(atc->card->dev,
+ "ctxfi: Failed to create rsc_mgr %d!!!\n", i);
return err;
}
}
@@ -1396,7 +1398,8 @@ static int atc_get_resources(struct ct_atc *atc)
err = daio_mgr->get_daio(daio_mgr, &da_desc,
(struct daio **)&atc->daios[i]);
if (err) {
- pr_err("ctxfi: Failed to get DAIO resource %d!!!\n",
+ dev_err(atc->card->dev,
+ "ctxfi: Failed to get DAIO resource %d!!!\n",
i);
return err;
}
@@ -1600,7 +1603,8 @@ static int atc_resume(struct ct_atc *atc)
/* Do hardware resume. */
err = atc_hw_resume(atc);
if (err < 0) {
- pr_err("ctxfi: pci_enable_device failed, disabling device\n");
+ dev_err(atc->card->dev,
+ "ctxfi: pci_enable_device failed, disabling device\n");
snd_card_disconnect(atc->card);
return err;
}
@@ -1697,7 +1701,7 @@ int ct_atc_create(struct snd_card *card, struct pci_dev *pci,
/* Find card model */
err = atc_identify_card(atc, ssid);
if (err < 0) {
- pr_err("ctatc: Card not recognised\n");
+ dev_err(card->dev, "ctatc: Card not recognised\n");
goto error1;
}
@@ -1713,7 +1717,7 @@ int ct_atc_create(struct snd_card *card, struct pci_dev *pci,
err = ct_mixer_create(atc, (struct ct_mixer **)&atc->mixer);
if (err) {
- pr_err("ctxfi: Failed to create mixer obj!!!\n");
+ dev_err(card->dev, "ctxfi: Failed to create mixer obj!!!\n");
goto error1;
}
@@ -1740,6 +1744,6 @@ int ct_atc_create(struct snd_card *card, struct pci_dev *pci,
error1:
ct_atc_destroy(atc);
- pr_err("ctxfi: Something wrong!!!\n");
+ dev_err(card->dev, "ctxfi: Something wrong!!!\n");
return err;
}
diff --git a/sound/pci/ctxfi/cthw20k1.c b/sound/pci/ctxfi/cthw20k1.c
index 71d496f..1cedfe4 100644
--- a/sound/pci/ctxfi/cthw20k1.c
+++ b/sound/pci/ctxfi/cthw20k1.c
@@ -1268,7 +1268,8 @@ static int hw_trn_init(struct hw *hw, const struct trn_conf *info)
/* Set up device page table */
if ((~0UL) == info->vm_pgt_phys) {
- pr_err("Wrong device page table page address!\n");
+ dev_err(&hw->pci->dev,
+ "Wrong device page table page address!\n");
return -1;
}
@@ -1327,7 +1328,7 @@ static int hw_pll_init(struct hw *hw, unsigned int rsr)
mdelay(40);
}
if (i >= 3) {
- pr_alert("PLL initialization failed!!!\n");
+ dev_alert(&hw->pci->dev, "PLL initialization failed!!!\n");
return -EBUSY;
}
@@ -1351,7 +1352,7 @@ static int hw_auto_init(struct hw *hw)
break;
}
if (!get_field(gctl, GCTL_AID)) {
- pr_alert("Card Auto-init failed!!!\n");
+ dev_alert(&hw->pci->dev, "Card Auto-init failed!!!\n");
return -EBUSY;
}
@@ -1911,8 +1912,9 @@ static int hw_card_start(struct hw *hw)
/* Set DMA transfer mask */
if (pci_set_dma_mask(pci, CT_XFI_DMA_MASK) < 0 ||
pci_set_consistent_dma_mask(pci, CT_XFI_DMA_MASK) < 0) {
- pr_err("architecture does not support PCI busmaster DMA with mask 0x%llx\n",
- CT_XFI_DMA_MASK);
+ dev_err(&pci->dev,
+ "architecture does not support PCI busmaster DMA with mask 0x%llx\n",
+ CT_XFI_DMA_MASK);
err = -ENXIO;
goto error1;
}
@@ -1941,7 +1943,8 @@ static int hw_card_start(struct hw *hw)
err = request_irq(pci->irq, ct_20k1_interrupt, IRQF_SHARED,
KBUILD_MODNAME, hw);
if (err < 0) {
- pr_err("XFi: Cannot get irq %d\n", pci->irq);
+ dev_err(&pci->dev,
+ "XFi: Cannot get irq %d\n", pci->irq);
goto error2;
}
hw->irq = pci->irq;
diff --git a/sound/pci/ctxfi/cthw20k2.c b/sound/pci/ctxfi/cthw20k2.c
index df2d8c5..e67e637 100644
--- a/sound/pci/ctxfi/cthw20k2.c
+++ b/sound/pci/ctxfi/cthw20k2.c
@@ -1187,7 +1187,8 @@ static int hw_daio_init(struct hw *hw, const struct daio_conf *info)
hw_write_20kx(hw, AUDIO_IO_TX_BLRCLK, 0x21212121);
hw_write_20kx(hw, AUDIO_IO_RX_BLRCLK, 0);
} else {
- pr_alert("ctxfi: ERROR!!! Invalid sampling rate!!!\n");
+ dev_alert(&hw->pci->dev,
+ "ctxfi: ERROR!!! Invalid sampling rate!!!\n");
return -EINVAL;
}
@@ -1246,7 +1247,8 @@ static int hw_trn_init(struct hw *hw, const struct trn_conf *info)
/* Set up device page table */
if ((~0UL) == info->vm_pgt_phys) {
- pr_alert("ctxfi: Wrong device page table page address!!!\n");
+ dev_alert(&hw->pci->dev,
+ "ctxfi: Wrong device page table page address!!!\n");
return -1;
}
@@ -1351,7 +1353,8 @@ static int hw_pll_init(struct hw *hw, unsigned int rsr)
break;
}
if (i >= 1000) {
- pr_alert("ctxfi: PLL initialization failed!!!\n");
+ dev_alert(&hw->pci->dev,
+ "ctxfi: PLL initialization failed!!!\n");
return -EBUSY;
}
@@ -1375,7 +1378,7 @@ static int hw_auto_init(struct hw *hw)
break;
}
if (!get_field(gctl, GCTL_AID)) {
- pr_alert("ctxfi: Card Auto-init failed!!!\n");
+ dev_alert(&hw->pci->dev, "ctxfi: Card Auto-init failed!!!\n");
return -EBUSY;
}
@@ -1846,7 +1849,7 @@ static int hw_adc_init(struct hw *hw, const struct adc_conf *info)
/* Initialize I2C */
err = hw20k2_i2c_init(hw, 0x1A, 1, 1);
if (err < 0) {
- pr_alert("ctxfi: Failure to acquire I2C!!!\n");
+ dev_alert(&hw->pci->dev, "ctxfi: Failure to acquire I2C!!!\n");
goto error;
}
@@ -1889,7 +1892,8 @@ static int hw_adc_init(struct hw *hw, const struct adc_conf *info)
hw20k2_i2c_write(hw, MAKE_WM8775_ADDR(WM8775_MMC, 0x0A),
MAKE_WM8775_DATA(0x0A));
} else {
- pr_alert("ctxfi: Invalid master sampling rate (msr %d)!!!\n",
+ dev_alert(&hw->pci->dev,
+ "ctxfi: Invalid master sampling rate (msr %d)!!!\n",
info->msr);
err = -EINVAL;
goto error;
@@ -2033,7 +2037,8 @@ static int hw_card_start(struct hw *hw)
/* Set DMA transfer mask */
if (pci_set_dma_mask(pci, CT_XFI_DMA_MASK) < 0 ||
pci_set_consistent_dma_mask(pci, CT_XFI_DMA_MASK) < 0) {
- pr_err("ctxfi: architecture does not support PCI busmaster DMA with mask 0x%llx\n",
+ dev_err(&pci->dev,
+ "ctxfi: architecture does not support PCI busmaster DMA with mask 0x%llx\n",
CT_XFI_DMA_MASK);
err = -ENXIO;
goto error1;
@@ -2062,7 +2067,8 @@ static int hw_card_start(struct hw *hw)
err = request_irq(pci->irq, ct_20k2_interrupt, IRQF_SHARED,
KBUILD_MODNAME, hw);
if (err < 0) {
- pr_err("XFi: Cannot get irq %d\n", pci->irq);
+ dev_err(&pci->dev,
+ "XFi: Cannot get irq %d\n", pci->irq);
goto error2;
}
hw->irq = pci->irq;
diff --git a/sound/pci/ctxfi/ctmixer.c b/sound/pci/ctxfi/ctmixer.c
index 017fa91..43f3483 100644
--- a/sound/pci/ctxfi/ctmixer.c
+++ b/sound/pci/ctxfi/ctmixer.c
@@ -854,7 +854,8 @@ static int ct_mixer_get_resources(struct ct_mixer *mixer)
for (i = 0; i < (NUM_CT_SUMS * CHN_NUM); i++) {
err = sum_mgr->get_sum(sum_mgr, &sum_desc, &sum);
if (err) {
- pr_err("ctxfi:Failed to get sum resources for front output!\n");
+ dev_err(mixer->atc->card->dev,
+ "ctxfi:Failed to get sum resources for front output!\n");
break;
}
mixer->sums[i] = sum;
@@ -868,7 +869,8 @@ static int ct_mixer_get_resources(struct ct_mixer *mixer)
for (i = 0; i < (NUM_CT_AMIXERS * CHN_NUM); i++) {
err = amixer_mgr->get_amixer(amixer_mgr, &am_desc, &amixer);
if (err) {
- pr_err("ctxfi:Failed to get amixer resources for mixer obj!\n");
+ dev_err(mixer->atc->card->dev,
+ "ctxfi:Failed to get amixer resources for mixer obj!\n");
break;
}
mixer->amixers[i] = amixer;
diff --git a/sound/pci/ctxfi/ctpcm.c b/sound/pci/ctxfi/ctpcm.c
index 6826c2c..2f84348 100644
--- a/sound/pci/ctxfi/ctpcm.c
+++ b/sound/pci/ctxfi/ctpcm.c
@@ -217,7 +217,8 @@ static int ct_pcm_playback_prepare(struct snd_pcm_substream *substream)
err = atc->pcm_playback_prepare(atc, apcm);
if (err < 0) {
- pr_err("ctxfi: Preparing pcm playback failed!!!\n");
+ dev_err(atc->card->dev,
+ "ctxfi: Preparing pcm playback failed!!!\n");
return err;
}
@@ -324,7 +325,8 @@ static int ct_pcm_capture_prepare(struct snd_pcm_substream *substream)
err = atc->pcm_capture_prepare(atc, apcm);
if (err < 0) {
- pr_err("ctxfi: Preparing pcm capture failed!!!\n");
+ dev_err(atc->card->dev,
+ "ctxfi: Preparing pcm capture failed!!!\n");
return err;
}
@@ -435,7 +437,8 @@ int ct_alsa_pcm_create(struct ct_atc *atc,
err = snd_pcm_new(atc->card, "ctxfi", device,
playback_count, capture_count, &pcm);
if (err < 0) {
- pr_err("ctxfi: snd_pcm_new failed!! Err=%d\n", err);
+ dev_err(atc->card->dev,
+ "ctxfi: snd_pcm_new failed!! Err=%d\n", err);
return err;
}
diff --git a/sound/pci/ctxfi/ctresource.c b/sound/pci/ctxfi/ctresource.c
index e49d2be..80beecb 100644
--- a/sound/pci/ctxfi/ctresource.c
+++ b/sound/pci/ctxfi/ctresource.c
@@ -162,12 +162,14 @@ int rsc_init(struct rsc *rsc, u32 idx, enum RSCTYP type, u32 msr, void *hw)
case DAIO:
break;
default:
- pr_err("ctxfi: Invalid resource type value %d!\n", type);
+ dev_err(&(((struct hw *)hw)->pci->dev),
+ "ctxfi: Invalid resource type value %d!\n", type);
return -EINVAL;
}
if (err) {
- pr_err("ctxfi: Failed to get resource control block!\n");
+ dev_err(&(((struct hw *)hw)->pci->dev),
+ "ctxfi: Failed to get resource control block!\n");
return err;
}
@@ -190,7 +192,8 @@ int rsc_uninit(struct rsc *rsc)
case DAIO:
break;
default:
- pr_err("ctxfi: Invalid resource type value %d!\n",
+ dev_err(&(((struct hw *)rsc->hw)->pci->dev),
+ "ctxfi: Invalid resource type value %d!\n",
rsc->type);
break;
}
@@ -233,13 +236,15 @@ int rsc_mgr_init(struct rsc_mgr *mgr, enum RSCTYP type,
case SUM:
break;
default:
- pr_err("ctxfi: Invalid resource type value %d!\n", type);
+ dev_err(&hw->pci->dev,
+ "ctxfi: Invalid resource type value %d!\n", type);
err = -EINVAL;
goto error;
}
if (err) {
- pr_err("ctxfi: Failed to get manager control block!\n");
+ dev_err(&hw->pci->dev,
+ "ctxfi: Failed to get manager control block!\n");
goto error;
}
@@ -282,8 +287,9 @@ int rsc_mgr_uninit(struct rsc_mgr *mgr)
case SUM:
break;
default:
- pr_err("ctxfi: Invalid resource type value %d!\n",
- mgr->type);
+ dev_err(&(((struct hw *)mgr->hw)->pci->dev),
+ "ctxfi: Invalid resource type value %d!\n",
+ mgr->type);
break;
}
diff --git a/sound/pci/ctxfi/xfi.c b/sound/pci/ctxfi/xfi.c
index 35e85ba..2eae617 100644
--- a/sound/pci/ctxfi/xfi.c
+++ b/sound/pci/ctxfi/xfi.c
@@ -76,15 +76,18 @@ ct_card_probe(struct pci_dev *pci, const struct pci_device_id *pci_id)
if (err)
return err;
if ((reference_rate != 48000) && (reference_rate != 44100)) {
- pr_err("ctxfi: Invalid reference_rate value %u!!!\n",
- reference_rate);
- pr_err("ctxfi: The valid values for reference_rate are 48000 and 44100, Value 48000 is assumed.\n");
+ dev_err(card->dev,
+ "ctxfi: Invalid reference_rate value %u!!!\n",
+ reference_rate);
+ dev_err(card->dev,
+ "ctxfi: The valid values for reference_rate are 48000 and 44100, Value 48000 is assumed.\n");
reference_rate = 48000;
}
if ((multiple != 1) && (multiple != 2) && (multiple != 4)) {
- pr_err("ctxfi: Invalid multiple value %u!!!\n",
- multiple);
- pr_err("ctxfi: The valid values for multiple are 1, 2 and 4, Value 2 is assumed.\n");
+ dev_err(card->dev, "ctxfi: Invalid multiple value %u!!!\n",
+ multiple);
+ dev_err(card->dev,
+ "ctxfi: The valid values for multiple are 1, 2 and 4, Value 2 is assumed.\n");
multiple = 2;
}
err = ct_atc_create(card, pci, reference_rate, multiple,
--
1.8.1.2
3
7
Hi,
Bug Type : Fixing Double free caused by calling snd_hctl_close(hctl) twice as it is called inside snd_mixer_attach_hctl also
File changed : mixer.c
PFA patch4
-------------------------------------------------------
From 685fba24eeb639e151f126026130cc631741bcad Mon Sep 17 00:00:00 2001
From: renu tyagi <renu.tyagi(a)samsung.com>
Date: Thu, 18 Sep 2014 16:26:45 +0530
Subject: [PATCH 4/8] [mixer] : Fixing Double free caused by calling snd_hctl_close(hctl) twice as it is called inside snd_mixer_attach_hctl also
Signed-off-by: renu tyagi <renu.tyagi(a)samsung.com>
---
src/mixer/mixer.c | 4 +---
1 files changed, 1 insertions(+), 3 deletions(-)
diff --git a/src/mixer/mixer.c b/src/mixer/mixer.c
index 56e023d..eee9875 100644
--- a/src/mixer/mixer.c
+++ b/src/mixer/mixer.c
@@ -204,10 +204,8 @@ int snd_mixer_attach(snd_mixer_t *mixer, const char *name)
if (err < 0)
return err;
err = snd_mixer_attach_hctl(mixer, hctl);
- if (err < 0) {
- snd_hctl_close(hctl);
+ if (err < 0)
return err;
- }
return 0;
}
--
1.7.1
Thanks
Renu Tyagi
1
0
Hi
Bug type : return negative value in case of error
I caught this error while running coverity on a older version. coverity will not give issue with latest version
But As per my analysis negative error should be returned in these cases, for debugging later on.
File changed : conf.c, control.c , pcm.c
PFA patch
-------------------------------------------------------------------------------------------
From d545d1ebedfbc42041e163536fbe2a6bd43361a0 Mon Sep 17 00:00:00 2001
From: renu tyagi <renu.tyagi(a)samsung.com>
Date: Thu, 18 Sep 2014 16:22:31 +0530
Subject: [PATCH 3/8] [conf, control, pcm] return negative value in case of error
Signed-off-by: renu tyagi <renu.tyagi(a)samsung.com>
---
src/conf.c | 1 +
src/control/control.c | 1 +
src/pcm/pcm.c | 1 +
3 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/src/conf.c b/src/conf.c
index 5ccc8e1..bb256e7 100644
--- a/src/conf.c
+++ b/src/conf.c
@@ -4198,6 +4198,7 @@ static int _snd_config_evaluate(snd_config_t *src,
snd_config_iterator_t i, next;
if (snd_config_get_type(func_conf) != SND_CONFIG_TYPE_COMPOUND) {
SNDERR("Invalid type for func %s definition", str);
+ err = -EINVAL;
goto _err;
}
snd_config_for_each(i, next, func_conf) {
diff --git a/src/control/control.c b/src/control/control.c
index d66ed75..dd428a1 100644
--- a/src/control/control.c
+++ b/src/control/control.c
@@ -864,6 +864,7 @@ static int snd_ctl_open_conf(snd_ctl_t **ctlp, const char *name,
if (err >= 0) {
if (snd_config_get_type(type_conf) != SND_CONFIG_TYPE_COMPOUND) {
SNDERR("Invalid type for CTL type %s definition", str);
+ err = -EINVAL;
goto _err;
}
snd_config_for_each(i, next, type_conf) {
diff --git a/src/pcm/pcm.c b/src/pcm/pcm.c
index 1399a5b..79359dc 100644
--- a/src/pcm/pcm.c
+++ b/src/pcm/pcm.c
@@ -2143,6 +2143,7 @@ static int snd_pcm_open_conf(snd_pcm_t **pcmp, const char *name,
if (err >= 0) {
if (snd_config_get_type(type_conf) != SND_CONFIG_TYPE_COMPOUND) {
SNDERR("Invalid type for PCM type %s definition", str);
+ err = -EINVAL;
goto _err;
}
snd_config_for_each(i, next, type_conf) {
--
1.7.1
Thanks
Renu Tyagi
1
0
At Thu, 18 Sep 2014 08:06:18 +0000 (GMT),
Renu Tyagi wrote:
>
> Hi,
> I have done the cosmetic changes.
> I dont trust my mailers editor so I am attaching it as well :)
Unfortunately your untrusted mailer didn't serve as wished.
The patch itself looks good. Could you post the whole series?
thanks,
Takashi
>
> Thanks
> Renu Tyagi
> -----------------------------------------
> From 66bbcc5e532c24876bd2fa2bc9d86609679e1062 Mon Sep 17 00:00:00 2001
> From: renu tyagi <renu.tyagi(a)samsung.com>
> Date: Thu, 18 Sep 2014 13:23:51 +0530
> Subject: [PATCH] rawmidi : Handle h to be closed in case of error before returning
>
>
> Signed-off-by: renu tyagi <renu.tyagi(a)samsung.com>
> ---
> src/rawmidi/rawmidi.c | 5 ++++-
> 1 files changed, 4 insertions(+), 1 deletions(-)
>
> diff --git a/src/rawmidi/rawmidi.c b/src/rawmidi/rawmidi.c
> index b835b47..ac699b4 100644
> --- a/src/rawmidi/rawmidi.c
> +++ b/src/rawmidi/rawmidi.c
> @@ -256,8 +256,11 @@ static int snd_rawmidi_open_conf(snd_rawmidi_t **inputp, snd_rawmidi_t **outputp
> snd_config_delete(type_conf);
> if (err >= 0)
> err = open_func(inputp, outputp, name, rawmidi_root, rawmidi_conf, mode);
> - if (err < 0)
> + if (err < 0) {
> + if (h)
> + snd_dlclose(h);
> return err;
> + }
> if (inputp) {
> (*inputp)->dl_handle = h; h = NULL;
> snd_rawmidi_params_default(*inputp, ¶ms);
> --
> 1.7.1
1
0
Hi,
I have done the cosmetic changes.
I dont trust my mailers editor so I am attaching it as well :)
Thanks
Renu Tyagi
-----------------------------------------
From 66bbcc5e532c24876bd2fa2bc9d86609679e1062 Mon Sep 17 00:00:00 2001
From: renu tyagi <renu.tyagi(a)samsung.com>
Date: Thu, 18 Sep 2014 13:23:51 +0530
Subject: [PATCH] rawmidi : Handle h to be closed in case of error before returning
Signed-off-by: renu tyagi <renu.tyagi(a)samsung.com>
---
src/rawmidi/rawmidi.c | 5 ++++-
1 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/src/rawmidi/rawmidi.c b/src/rawmidi/rawmidi.c
index b835b47..ac699b4 100644
--- a/src/rawmidi/rawmidi.c
+++ b/src/rawmidi/rawmidi.c
@@ -256,8 +256,11 @@ static int snd_rawmidi_open_conf(snd_rawmidi_t **inputp, snd_rawmidi_t **outputp
snd_config_delete(type_conf);
if (err >= 0)
err = open_func(inputp, outputp, name, rawmidi_root, rawmidi_conf, mode);
- if (err < 0)
+ if (err < 0) {
+ if (h)
+ snd_dlclose(h);
return err;
+ }
if (inputp) {
(*inputp)->dl_handle = h; h = NULL;
snd_rawmidi_params_default(*inputp, ¶ms);
--
1.7.1
1
0
At Thu, 18 Sep 2014 03:57:36 +0000 (GMT),
Renu Tyagi wrote:
>
> Hi,
>
> Sorry for the spam mail. I am sending the mail in plain text now.
> PFA patch.
> File in which changes are being made : rawmidi.c
> Bug type - Handle h to be closed in case of error before returning
> Meanwhile I am looking into the matter why my mails are not visible in ML.
I see now on ML, so the problem was your post in HTML, indeed.
Regarding the patch: I see only a few cosmetic issue.
- Use embedded in the mail as much as possible rather than an
attachment. This makes review much easier.
- Put your real name in sign-off-by (and also From: line). Refer to
Documentation/SubmittingPatches in Linux kernel tree about the
meaning of this line.
- Put a space before the open brace.
- Add some prefix in the subject line to identify the area; in this
case, add like "rawmidi: Handle d to be ...."
thanks,
Takashi
1
0
Hi,
Sorry for the spam mail. I am sending the mail in plain text now.
PFA patch.
File in which changes are being made : rawmidi.c
Bug type - Handle h to be closed in case of error before returning
Meanwhile I am looking into the matter why my mails are not visible in ML.
Thanks
Renu Tyagi
1
0

Re: [alsa-devel] [PATCH] ASoC: rt5677: Add a configuration optionforLDO2_POW pin
by Bard Liao 18 Sep '14
by Bard Liao 18 Sep '14
18 Sep '14
> -----Original Message-----
> From: alsa-devel-bounces(a)alsa-project.org
> [mailto:alsa-devel-bounces@alsa-project.org] On Behalf Of Anatol
> Pomozov
> Sent: Thursday, September 18, 2014 4:14 AM
> To: broonie(a)kernel.org; lgirdwood(a)gmail.com
> Cc: Oder Chiou; alsa-devel(a)alsa-project.org; Anatol Pomozov
> Subject: [alsa-devel] [PATCH] ASoC: rt5677: Add a configuration option
> forLDO2_POW pin
>
> Some boards have this pin statically tied and do not require any
> configuration, some other boards allow to enable chip using GPIO.
>
> Add an option that tells which GPIO is used to power the audio codec.
>
> Signed-off-by: Anatol Pomozov <anatol.pomozov(a)gmail.com>
> ---
Acked-by: Bard Liao <bardliao(a)realtek.com>
Thanks.
>
> _______________________________________________
> Alsa-devel mailing list
> Alsa-devel(a)alsa-project.org
> http://mailman.alsa-project.org/mailman/listinfo/alsa-devel
1
0

[alsa-devel] [PATCH V4] ASoC: fsl_ssi: refine ipg clock usage in this module
by Shengjiu Wang 17 Sep '14
by Shengjiu Wang 17 Sep '14
17 Sep '14
Check if ipg clock is in clock-names property, then we can move the
ipg clock enable and disable operation to startup and shutdown, that
is only enable ipg clock when ssi is working and keep clock is disabled
when ssi is in idle.
But when the checking is failed, remain the clock control as before.
Tested-by: Markus Pargmann <mpa(a)pengutronix.de>
Signed-off-by: Shengjiu Wang <shengjiu.wang(a)freescale.com>
---
v4 change log:
fix the code indent issue.
sound/soc/fsl/fsl_ssi.c | 53 ++++++++++++++++++++++++++++++++++++++++-------
1 file changed, 45 insertions(+), 8 deletions(-)
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index 2fc3e66..16a1361 100644
--- a/sound/soc/fsl/fsl_ssi.c
+++ b/sound/soc/fsl/fsl_ssi.c
@@ -169,6 +169,7 @@ struct fsl_ssi_private {
u8 i2s_mode;
bool use_dma;
bool use_dual_fifo;
+ bool has_ipg_clk_name;
unsigned int fifo_depth;
struct fsl_ssi_rxtx_reg_val rxtx_reg_val;
@@ -530,6 +531,11 @@ static int fsl_ssi_startup(struct snd_pcm_substream *substream,
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct fsl_ssi_private *ssi_private =
snd_soc_dai_get_drvdata(rtd->cpu_dai);
+ int ret;
+
+ ret = clk_prepare_enable(ssi_private->clk);
+ if (ret)
+ return ret;
/* When using dual fifo mode, it is safer to ensure an even period
* size. If appearing to an odd number while DMA always starts its
@@ -544,6 +550,21 @@ static int fsl_ssi_startup(struct snd_pcm_substream *substream,
}
/**
+ * fsl_ssi_shutdown: shutdown the SSI
+ *
+ */
+static void fsl_ssi_shutdown(struct snd_pcm_substream *substream,
+ struct snd_soc_dai *dai)
+{
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
+ struct fsl_ssi_private *ssi_private =
+ snd_soc_dai_get_drvdata(rtd->cpu_dai);
+
+ clk_disable_unprepare(ssi_private->clk);
+
+}
+
+/**
* fsl_ssi_set_bclk - configure Digital Audio Interface bit clock
*
* Note: This function can be only called when using SSI as DAI master
@@ -1043,6 +1064,7 @@ static int fsl_ssi_dai_probe(struct snd_soc_dai *dai)
static const struct snd_soc_dai_ops fsl_ssi_dai_ops = {
.startup = fsl_ssi_startup,
+ .shutdown = fsl_ssi_shutdown,
.hw_params = fsl_ssi_hw_params,
.hw_free = fsl_ssi_hw_free,
.set_fmt = fsl_ssi_set_dai_fmt,
@@ -1168,17 +1190,22 @@ static int fsl_ssi_imx_probe(struct platform_device *pdev,
u32 dmas[4];
int ret;
- ssi_private->clk = devm_clk_get(&pdev->dev, NULL);
+ if (ssi_private->has_ipg_clk_name)
+ ssi_private->clk = devm_clk_get(&pdev->dev, "ipg");
+ else
+ ssi_private->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(ssi_private->clk)) {
ret = PTR_ERR(ssi_private->clk);
dev_err(&pdev->dev, "could not get clock: %d\n", ret);
return ret;
}
- ret = clk_prepare_enable(ssi_private->clk);
- if (ret) {
- dev_err(&pdev->dev, "clk_prepare_enable failed: %d\n", ret);
- return ret;
+ if (!ssi_private->has_ipg_clk_name) {
+ ret = clk_prepare_enable(ssi_private->clk);
+ if (ret) {
+ dev_err(&pdev->dev, "clk_prepare_enable failed: %d\n", ret);
+ return ret;
+ }
}
/* For those SLAVE implementations, we ingore non-baudclk cases
@@ -1236,8 +1263,9 @@ static int fsl_ssi_imx_probe(struct platform_device *pdev,
return 0;
error_pcm:
- clk_disable_unprepare(ssi_private->clk);
+ if (!ssi_private->has_ipg_clk_name)
+ clk_disable_unprepare(ssi_private->clk);
return ret;
}
@@ -1246,7 +1274,8 @@ static void fsl_ssi_imx_clean(struct platform_device *pdev,
{
if (!ssi_private->use_dma)
imx_pcm_fiq_exit(pdev);
- clk_disable_unprepare(ssi_private->clk);
+ if (!ssi_private->has_ipg_clk_name)
+ clk_disable_unprepare(ssi_private->clk);
}
static int fsl_ssi_probe(struct platform_device *pdev)
@@ -1321,8 +1350,16 @@ static int fsl_ssi_probe(struct platform_device *pdev)
return -ENOMEM;
}
- ssi_private->regs = devm_regmap_init_mmio(&pdev->dev, iomem,
+ ret = of_property_match_string(np, "clock-names", "ipg");
+ if (ret < 0) {
+ ssi_private->has_ipg_clk_name = false;
+ ssi_private->regs = devm_regmap_init_mmio(&pdev->dev, iomem,
&fsl_ssi_regconfig);
+ } else {
+ ssi_private->has_ipg_clk_name = true;
+ ssi_private->regs = devm_regmap_init_mmio_clk(&pdev->dev,
+ "ipg", iomem, &fsl_ssi_regconfig);
+ }
if (IS_ERR(ssi_private->regs)) {
dev_err(&pdev->dev, "Failed to init register map\n");
return PTR_ERR(ssi_private->regs);
--
1.7.9.5
3
2

[alsa-devel] [PATCH 1/2] ASoC: rt5677: Add a configuration option for LDO2_POW pin
by Anatol Pomozov 17 Sep '14
by Anatol Pomozov 17 Sep '14
17 Sep '14
Some boards have this pin tied to board and do not require any configuration,
some other boards allow to enable chip using GPIO.
Add an option that tells which GPIO is used to power up the codec.
Signed-off-by: Anatol Pomozov <anatol.pomozov(a)gmail.com>
---
Documentation/devicetree/bindings/sound/rt5677.txt | 41 +++++++++++++++++++++
sound/soc/codecs/rt5677.c | 42 ++++++++++++++++++++++
sound/soc/codecs/rt5677.h | 1 +
3 files changed, 84 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/rt5677.txt
diff --git a/Documentation/devicetree/bindings/sound/rt5677.txt b/Documentation/devicetree/bindings/sound/rt5677.txt
new file mode 100644
index 0000000..98509fb
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/rt5677.txt
@@ -0,0 +1,41 @@
+RT5677 audio CODEC
+
+This device supports I2C only.
+
+Required properties:
+
+- compatible : "realtek,rt5677".
+
+- reg : The I2C address of the device.
+
+- interrupts : The CODEC's interrupt output.
+
+Optional properties:
+
+- realtek,pow-ldo2-gpio : The GPIO that controls the CODEC's POW_LDO2 pin.
+
+Pins on the device (for linking into audio routes):
+
+ * IN1P
+ * IN1N
+ * IN2P
+ * IN2N
+ * MICBIAS1
+ * DMIC1
+ * DMIC2
+ * DMIC3
+ * DMIC4
+ * LOUT1
+ * LOUT2
+ * LOUT3
+
+Example:
+
+rt5677 {
+ compatible = "realtek,rt5677";
+ reg = <0x2c>;
+ interrupt-parent = <&gpio>;
+ interrupts = <TEGRA_GPIO(W, 3) GPIO_ACTIVE_HIGH>;
+ realtek,pow-ldo2-gpio =
+ <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>;
+};
diff --git a/sound/soc/codecs/rt5677.c b/sound/soc/codecs/rt5677.c
index 9847473..fbaceb6 100644
--- a/sound/soc/codecs/rt5677.c
+++ b/sound/soc/codecs/rt5677.c
@@ -15,6 +15,7 @@
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pm.h>
+#include <linux/of_gpio.h>
#include <linux/regmap.h>
#include <linux/i2c.h>
#include <linux/platform_device.h>
@@ -3495,6 +3496,24 @@ static const struct i2c_device_id rt5677_i2c_id[] = {
};
MODULE_DEVICE_TABLE(i2c, rt5677_i2c_id);
+static int rt5677_parse_dt(struct rt5677_priv *rt5677, struct device_node *np)
+{
+ rt5677->pow_ldo2 = of_get_named_gpio(np,
+ "realtek,pow-ldo2-gpio", 0);
+
+ /*
+ * POW_LDO2 is optional (it may be statically tied on the board).
+ * -ENOENT means that the property doesn't exist, i.e. there is no
+ * GPIO, so is not an error. Any other error code means the property
+ * exists, but could not be parsed.
+ */
+ if (!gpio_is_valid(rt5677->pow_ldo2) &&
+ (rt5677->pow_ldo2 != -ENOENT))
+ return rt5677->pow_ldo2;
+
+ return 0;
+}
+
static int rt5677_i2c_probe(struct i2c_client *i2c,
const struct i2c_device_id *id)
{
@@ -3513,6 +3532,29 @@ static int rt5677_i2c_probe(struct i2c_client *i2c,
if (pdata)
rt5677->pdata = *pdata;
+ if (i2c->dev.of_node) {
+ ret = rt5677_parse_dt(rt5677, i2c->dev.of_node);
+ if (ret) {
+ dev_err(&i2c->dev, "Failed to parse device tree: %d\n",
+ ret);
+ return ret;
+ }
+ } else {
+ rt5677->pow_ldo2 = -EINVAL;
+ }
+
+ if (gpio_is_valid(rt5677->pow_ldo2)) {
+ ret = devm_gpio_request_one(&i2c->dev, rt5677->pow_ldo2,
+ GPIOF_OUT_INIT_HIGH,
+ "RT5677 POW_LDO2");
+ if (ret < 0) {
+ dev_err(&i2c->dev, "Failed to request POW_LDO2 %d: %d\n",
+ rt5677->pow_ldo2, ret);
+ return ret;
+ }
+ msleep(10);
+ }
+
rt5677->regmap = devm_regmap_init_i2c(i2c, &rt5677_regmap);
if (IS_ERR(rt5677->regmap)) {
ret = PTR_ERR(rt5677->regmap);
diff --git a/sound/soc/codecs/rt5677.h b/sound/soc/codecs/rt5677.h
index b61b72c..222a4137 100644
--- a/sound/soc/codecs/rt5677.h
+++ b/sound/soc/codecs/rt5677.h
@@ -1550,6 +1550,7 @@ struct rt5677_priv {
int pll_src;
int pll_in;
int pll_out;
+ int pow_ldo2; /* POW_LDO2 pin */
#ifdef CONFIG_GPIOLIB
struct gpio_chip gpio_chip;
#endif
--
2.1.0.rc2.206.gedb03e5
2
3

[alsa-devel] [PATCH] ASoC: Remove return value checking for gpiochip_remove()
by Axel Lin 17 Sep '14
by Axel Lin 17 Sep '14
17 Sep '14
gpiochip_remove() will return void eventually.
Thus this patch removes return value checking for gpiochip_remove().
Signed-off-by: Axel Lin <axel.lin(a)ingics.com>
---
sound/soc/codecs/rt5677.c | 5 +----
sound/soc/codecs/wm5100.c | 5 +----
sound/soc/codecs/wm8903.c | 6 +-----
sound/soc/codecs/wm8962.c | 5 +----
sound/soc/codecs/wm8996.c | 6 +-----
5 files changed, 5 insertions(+), 22 deletions(-)
diff --git a/sound/soc/codecs/rt5677.c b/sound/soc/codecs/rt5677.c
index 9847473..dc978ad 100644
--- a/sound/soc/codecs/rt5677.c
+++ b/sound/soc/codecs/rt5677.c
@@ -3274,11 +3274,8 @@ static void rt5677_init_gpio(struct i2c_client *i2c)
static void rt5677_free_gpio(struct i2c_client *i2c)
{
struct rt5677_priv *rt5677 = i2c_get_clientdata(i2c);
- int ret;
- ret = gpiochip_remove(&rt5677->gpio_chip);
- if (ret != 0)
- dev_err(&i2c->dev, "Failed to remove GPIOs: %d\n", ret);
+ gpiochip_remove(&rt5677->gpio_chip);
}
#else
static void rt5677_init_gpio(struct i2c_client *i2c)
diff --git a/sound/soc/codecs/wm5100.c b/sound/soc/codecs/wm5100.c
index 7bb0d36..a01ad62 100644
--- a/sound/soc/codecs/wm5100.c
+++ b/sound/soc/codecs/wm5100.c
@@ -2319,11 +2319,8 @@ static void wm5100_init_gpio(struct i2c_client *i2c)
static void wm5100_free_gpio(struct i2c_client *i2c)
{
struct wm5100_priv *wm5100 = i2c_get_clientdata(i2c);
- int ret;
- ret = gpiochip_remove(&wm5100->gpio_chip);
- if (ret != 0)
- dev_err(&i2c->dev, "Failed to remove GPIOs: %d\n", ret);
+ gpiochip_remove(&wm5100->gpio_chip);
}
#else
static void wm5100_init_gpio(struct i2c_client *i2c)
diff --git a/sound/soc/codecs/wm8903.c b/sound/soc/codecs/wm8903.c
index aa09848..c038b3e 100644
--- a/sound/soc/codecs/wm8903.c
+++ b/sound/soc/codecs/wm8903.c
@@ -1877,11 +1877,7 @@ static void wm8903_init_gpio(struct wm8903_priv *wm8903)
static void wm8903_free_gpio(struct wm8903_priv *wm8903)
{
- int ret;
-
- ret = gpiochip_remove(&wm8903->gpio_chip);
- if (ret != 0)
- dev_err(wm8903->dev, "Failed to remove GPIOs: %d\n", ret);
+ gpiochip_remove(&wm8903->gpio_chip);
}
#else
static void wm8903_init_gpio(struct wm8903_priv *wm8903)
diff --git a/sound/soc/codecs/wm8962.c b/sound/soc/codecs/wm8962.c
index 1098ae3..9077411 100644
--- a/sound/soc/codecs/wm8962.c
+++ b/sound/soc/codecs/wm8962.c
@@ -3398,11 +3398,8 @@ static void wm8962_init_gpio(struct snd_soc_codec *codec)
static void wm8962_free_gpio(struct snd_soc_codec *codec)
{
struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec);
- int ret;
- ret = gpiochip_remove(&wm8962->gpio_chip);
- if (ret != 0)
- dev_err(codec->dev, "Failed to remove GPIOs: %d\n", ret);
+ gpiochip_remove(&wm8962->gpio_chip);
}
#else
static void wm8962_init_gpio(struct snd_soc_codec *codec)
diff --git a/sound/soc/codecs/wm8996.c b/sound/soc/codecs/wm8996.c
index f16ff4f..b1dcc11 100644
--- a/sound/soc/codecs/wm8996.c
+++ b/sound/soc/codecs/wm8996.c
@@ -2216,11 +2216,7 @@ static void wm8996_init_gpio(struct wm8996_priv *wm8996)
static void wm8996_free_gpio(struct wm8996_priv *wm8996)
{
- int ret;
-
- ret = gpiochip_remove(&wm8996->gpio_chip);
- if (ret != 0)
- dev_err(wm8996->dev, "Failed to remove GPIOs: %d\n", ret);
+ gpiochip_remove(&wm8996->gpio_chip);
}
#else
static void wm8996_init_gpio(struct wm8996_priv *wm8996)
--
1.9.1
2
1

17 Sep '14
This patch series adds DPCM and DAPM widgets to handle DSP topology in the
SST platform driver for merrifield.
Changes in v6:
Removed the init callback as per review comments from Takashi.
Subhransu S. Prusty (2):
ASoC: Export dapm_kcontrol_get_value
ASoC: Intel: mrfld: Use snd_soc_dai_get_drvdata to derive drv data
Vinod Koul (8):
ASoC: Intel: mfld-pcm: don't call trigger ops to DSP for internal
streams
ASoC: Intel: mrfld: add bytes control for modules
ASoC: Intel: mrfld: add the gain controls
ASoC: Intel: mfld-pcm: add control for powering up/down dsp
ASoC: Intel: mrfld: add DSP core controls
ASoC: Intel: mrfld: add the DSP DAPM widgets
ASoC: Intel: mfld-pcm: add FE and BE ops
ASoC: Intel: mrfld: add the DSP mixers
include/sound/soc-dapm.h | 1 +
sound/soc/intel/sst-atom-controls.c | 1259 ++++++++++++++++++++++++++++++-
sound/soc/intel/sst-atom-controls.h | 558 ++++++++++++++
sound/soc/intel/sst-mfld-platform-pcm.c | 179 ++++-
sound/soc/intel/sst-mfld-platform.h | 7 +-
sound/soc/soc-dapm.c | 3 +-
6 files changed, 1970 insertions(+), 37 deletions(-)
--
1.9.0
2
19
Hi,
I have a custom i.MX6 board, and have a sgtl5000 connected on it. I
would like to have it used in master mode (it is used only for audio
capture) but I get a "pcm_read:2031: read error: Input/output error"
when using arecord.
I am wondering if I forgot something in my DT or if I need to do
something else :
sound {
compatible = "fsl,imx6q-vbx3-sgtl5000",
"fsl,imx-audio-sgtl5000";
model = "imx6q-vbx3-sgtl5000";
ssi-controller = <&ssi1>;
audio-codec = <&codec>;
audio-routing =
"LINE_IN", "Line In Jack";
mux-int-port = <1>;
mux-ext-port = <5>;
};
&audmux {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_audmux>;
status = "okay";
};
&i2c2 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
codec: sgtl5000@0a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
clocks = <&clks 201>;
VDDA-supply = <&vgen6_reg>;
VDDIO-supply = <&vgen6_reg>;
sysclk = <24000000>;
};
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
imx6qdl-vbx3 {
pinctrl_audmux: audmuxgrp {
fsl,pins = <
MX6QDL_PAD_DISP0_DAT13__AUD5_RXFS 0x130b0
MX6QDL_PAD_DISP0_DAT14__AUD5_RXC 0x130b0
MX6QDL_PAD_DISP0_DAT16__AUD5_TXC 0x130b0
MX6QDL_PAD_DISP0_DAT18__AUD5_TXFS 0x130b0
MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0
>;
};
};
&ssi1 {
status = "okay";
codec-handle = <&codec>;
fsl,mode = "i2s-master";
fsl,ssi-asynchronous;
};
FYI, AUD5_TXC is wirely connected to AUD5_RXC and AUD5_TXFS is
connected to AUD5_RXFS.
Here is the dmesg part :
[ 6.026803] sgtl5000 1-000a: sgtl5000 revision 0x11
[ 6.129380] imx-sgtl5000 sound: snd_soc_register_card failed (-517)
[ 6.248849] platform sound: Driver imx-sgtl5000 requests probe deferral
[ 6.311643] sgtl5000 1-000a: Using internal LDO instead of VDDD
[ 6.393196] imx-sgtl5000 sound: sgtl5000 <-> 2028000.ssi mapping ok
And the user space commands :
$> arecord -l
**** List of CAPTURE Hardware Devices ****
card 0: imx6qvbx3sgtl50 [imx6q-vbx3-sgtl5000], device 0: HiFi sgtl5000-0 []
Subdevices: 1/1
Subdevice #0: subdevice #0
$> arecord -v -V stereo -fdat -D hw:0,0 somefile.wav
Recording WAVE 'somefile.wav' : Signed 16 bit Little Endian, Rate
48000 Hz, Stereo
Hardware PCM card 0 'imx6q-vbx3-sgtl5000' device 0 subdevice 0
Its setup is:
stream : CAPTURE
access : RW_INTERLEAVED
format : S16_LE
subformat : STD
channels : 2
rate : 48000
exact rate : 48000 (48000/1)
msbits : 16
buffer_size : 16384
period_size : 4096
period_time : 85333
tstamp_mode : NONE
period_step : 1
avail_min : 4096
period_event : 0
start_threshold : 1
stop_threshold : 16384
silence_threshold: 0
silence_size : 0
boundary : 1073741824
appl_ptr : 0
hw_ptr : 0
arecord: pcm_read:2031: read error: Input/output error
The kernel is 3.17-rc5.
Thanks for reading all this, and for any advice :).
JM
1
0
The patch adds the TDM function.
Signed-off-by: Oder Chiou <oder_chiou(a)realtek.com>
---
sound/soc/codecs/rt5677.c | 54 +++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 54 insertions(+)
diff --git a/sound/soc/codecs/rt5677.c b/sound/soc/codecs/rt5677.c
index 02bc8bd..1d4719f 100644
--- a/sound/soc/codecs/rt5677.c
+++ b/sound/soc/codecs/rt5677.c
@@ -3107,6 +3107,59 @@ static int rt5677_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
return 0;
}
+static int rt5677_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
+ unsigned int rx_mask, int slots, int slot_width)
+{
+ struct snd_soc_codec *codec = dai->codec;
+ unsigned int val = 0;
+
+ if (rx_mask || tx_mask)
+ val |= (1 << 12);
+
+ switch (slots) {
+ case 4:
+ val |= (1 << 10);
+ break;
+ case 6:
+ val |= (2 << 10);
+ break;
+ case 8:
+ val |= (3 << 10);
+ break;
+ case 2:
+ default:
+ break;
+ }
+
+ switch (slot_width) {
+ case 20:
+ val |= (1 << 8);
+ break;
+ case 24:
+ val |= (2 << 8);
+ break;
+ case 32:
+ val |= (3 << 8);
+ break;
+ case 16:
+ default:
+ break;
+ }
+
+ switch (dai->id) {
+ case RT5677_AIF1:
+ snd_soc_update_bits(codec, RT5677_TDM1_CTRL1, 0x1f00, val);
+ break;
+ case RT5677_AIF2:
+ snd_soc_update_bits(codec, RT5677_TDM2_CTRL1, 0x1f00, val);
+ break;
+ default:
+ break;
+ }
+
+ return 0;
+}
+
static int rt5677_set_bias_level(struct snd_soc_codec *codec,
enum snd_soc_bias_level level)
{
@@ -3357,6 +3410,7 @@ static struct snd_soc_dai_ops rt5677_aif_dai_ops = {
.set_fmt = rt5677_set_dai_fmt,
.set_sysclk = rt5677_set_dai_sysclk,
.set_pll = rt5677_set_dai_pll,
+ .set_tdm_slot = rt5677_set_tdm_slot,
};
static struct snd_soc_dai_driver rt5677_dai[] = {
--
1.8.1.1.439.g50a6b54
1
0

[alsa-devel] [PATCH/alsa-lib trivial] hwdep: add missing declaration for snd_hwdep_poll_descriptors_count()
by Takashi Sakamoto 17 Sep '14
by Takashi Sakamoto 17 Sep '14
17 Sep '14
The alsa-lib has 'snd_hwdep_poll_descriptors_count()' but hwdep.h has no
declaration for the function. No applications can call the function just
by including the header.
This commit adds a line to the file for this function.
Signed-off-by: Takashi Sakamoto <o-takashi(a)sakamocchi.jp>
---
include/hwdep.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/hwdep.h b/include/hwdep.h
index 6496fa2..ad8bb49 100644
--- a/include/hwdep.h
+++ b/include/hwdep.h
@@ -102,6 +102,7 @@ typedef struct _snd_hwdep snd_hwdep_t;
int snd_hwdep_open(snd_hwdep_t **hwdep, const char *name, int mode);
int snd_hwdep_close(snd_hwdep_t *hwdep);
int snd_hwdep_poll_descriptors(snd_hwdep_t *hwdep, struct pollfd *pfds, unsigned int space);
+int snd_hwdep_poll_descriptors_count(snd_hwdep_t *hwdep);
int snd_hwdep_poll_descriptors_revents(snd_hwdep_t *hwdep, struct pollfd *pfds, unsigned int nfds, unsigned short *revents);
int snd_hwdep_nonblock(snd_hwdep_t *hwdep, int nonblock);
int snd_hwdep_info(snd_hwdep_t *hwdep, snd_hwdep_info_t * info);
--
1.9.1
2
1

[alsa-devel] [PATCH 08/22] ALSA: hda - Replace strnicmp with strncasecmp
by Rasmus Villemoes 17 Sep '14
by Rasmus Villemoes 17 Sep '14
17 Sep '14
The kernel used to contain two functions for length-delimited,
case-insensitive string comparison, strnicmp with correct semantics
and a slightly buggy strncasecmp. The latter is the POSIX name, so
strnicmp was renamed to strncasecmp, and strnicmp made into a wrapper
for the new strncasecmp to avoid breaking existing users.
To allow the compat wrapper strnicmp to be removed at some point in
the future, and to avoid the extra indirection cost, do
s/strnicmp/strncasecmp/g.
Cc: Jaroslav Kysela <perex(a)perex.cz>
Cc: Takashi Iwai <tiwai(a)suse.de>
Cc: alsa-devel(a)alsa-project.org
Signed-off-by: Rasmus Villemoes <linux(a)rasmusvillemoes.dk>
---
sound/pci/hda/hda_sysfs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sound/pci/hda/hda_sysfs.c b/sound/pci/hda/hda_sysfs.c
index e207909..9b49f15 100644
--- a/sound/pci/hda/hda_sysfs.c
+++ b/sound/pci/hda/hda_sysfs.c
@@ -514,7 +514,7 @@ enum {
static inline int strmatch(const char *a, const char *b)
{
- return strnicmp(a, b, strlen(b)) == 0;
+ return strncasecmp(a, b, strlen(b)) == 0;
}
/* parse the contents after the line "[codec]"
--
2.0.4
2
1
At Wed, 17 Sep 2014 03:17:08 +0000 (GMT),
Renu Tyagi wrote:
>
> Hi Takashi,
> File in which changes are being made : rawmidi.c
> Bug type - Handle h to be closed in case of error before returning
> PFA patch.
By some reason, your post doesn't appear on alsa-devel ML.
Did you subscribe the ML? If not, please subscribe and repost.
Also, what about other patches you made?
Last but not least: please prepare a patch to be applicable via
git-am, including subject and from tags and the changelog content, and
don't forget your sign-off to the patch, just like a patch to Linux
kernel.
thanks,
Takashi
>
> Community Code:
> if (err >= 0)
> err = open_func(inputp, outputp, name, rawmidi_root, rawmidi_conf, mode);
> if (err < 0)
> return err;
> if (inputp) {
> (*inputp)->dl_handle = h; h = NULL;
>
> Recommended Code :
> if (err >= 0)
> err = open_func(inputp, outputp, name, rawmidi_root, rawmidi_conf, mode);
> if (err < 0){
> if (h)
> snd_dlclose(h);
> return err;
> }
> if (inputp) {
> (*inputp)->dl_handle = h; h = NULL;
>
>
> Thanks & Regards,
> Renu Tyagi
> [2 22578.patch <application/octet-stream (base64)>]
>
1
0

[alsa-devel] [PATCH] ASoC: fsl_spdif: don't change the root clock rate of spdif in driver
by Shengjiu Wang 17 Sep '14
by Shengjiu Wang 17 Sep '14
17 Sep '14
The spdif root clock may be used by other module or defined with
CLK_SET_RATE_GATE, so we can't change the clock rate in driver.
In this patch remove the clk_set_rate and clk_round_rate to protect the
clock.
Signed-off-by: Shengjiu Wang <shengjiu.wang(a)freescale.com>
---
sound/soc/fsl/fsl_spdif.c | 24 ++----------------------
1 file changed, 2 insertions(+), 22 deletions(-)
diff --git a/sound/soc/fsl/fsl_spdif.c b/sound/soc/fsl/fsl_spdif.c
index 70acfe4..f2e4595 100644
--- a/sound/soc/fsl/fsl_spdif.c
+++ b/sound/soc/fsl/fsl_spdif.c
@@ -377,7 +377,6 @@ static int spdif_set_sample_rate(struct snd_pcm_substream *substream,
unsigned long csfs = 0;
u32 stc, mask, rate;
u8 clk, txclk_df, sysclk_df;
- int ret;
switch (sample_rate) {
case 32000:
@@ -419,21 +418,6 @@ static int spdif_set_sample_rate(struct snd_pcm_substream *substream,
sysclk_df = spdif_priv->sysclk_df[rate];
- /* Don't mess up the clocks from other modules */
- if (clk != STC_TXCLK_SPDIF_ROOT)
- goto clk_set_bypass;
-
- /*
- * The S/PDIF block needs a clock of 64 * fs * txclk_df.
- * So request 64 * fs * (txclk_df + 1) to get rounded.
- */
- ret = clk_set_rate(spdif_priv->txclk[rate], 64 * sample_rate * (txclk_df + 1));
- if (ret) {
- dev_err(&pdev->dev, "failed to set tx clock rate\n");
- return ret;
- }
-
-clk_set_bypass:
dev_dbg(&pdev->dev, "expected clock rate = %d\n",
(64 * sample_rate * txclk_df * sysclk_df));
dev_dbg(&pdev->dev, "actual clock rate = %ld\n",
@@ -1056,7 +1040,7 @@ static u32 fsl_spdif_txclk_caldiv(struct fsl_spdif_priv *spdif_priv,
{
const u32 rate[] = { 32000, 44100, 48000, 96000, 192000 };
bool is_sysclk = clk == spdif_priv->sysclk;
- u64 rate_ideal, rate_actual, sub;
+ u64 rate_actual, sub;
u32 sysclk_dfmin, sysclk_dfmax;
u32 txclk_df, sysclk_df, arate;
@@ -1066,11 +1050,7 @@ static u32 fsl_spdif_txclk_caldiv(struct fsl_spdif_priv *spdif_priv,
for (sysclk_df = sysclk_dfmin; sysclk_df <= sysclk_dfmax; sysclk_df++) {
for (txclk_df = 1; txclk_df <= 128; txclk_df++) {
- rate_ideal = rate[index] * (txclk_df + 1) * 64;
- if (round)
- rate_actual = clk_round_rate(clk, rate_ideal);
- else
- rate_actual = clk_get_rate(clk);
+ rate_actual = clk_get_rate(clk);
arate = rate_actual / 64;
arate /= txclk_df * sysclk_df;
--
1.7.9.5
4
6

[alsa-devel] Using codec pins to configure part of audio routing subsystem
by Anatol Pomozov 17 Sep '14
by Anatol Pomozov 17 Sep '14
17 Sep '14
Hi
Here is reiteration from my previous question [1]
I have following task. I have realtek rt5677 codec. Codec has 6 pins.
Some of the pins are configured as output and used to manipulate part
of audio routing subsystem. In my case one pin enables headphones amp,
another pin gates DMIC clock.
I can easily do it by hard-coding this logic to rt5677 driver. Now I
an trying to pull this board-specific logic out of the codec driver
code and move it to device tree.
I was told (without much explanation) to do it either 2 ways:
1) export codec pins as gpio and then create fixed regulator and tie
it to codec via SND_SOC_DAPM_REGULATOR_SUPPLY. I sent a question [1]
to clarify if it is the right way.
2) create ALSA controls for pins. I believe it means I need to create
controls with names "GPIO1", "GPIO2"..."GPIO6" and then use as part of
audio_routing list.
What is the right way to achieve my goal. Are there examples of
configuration similar to mine? I am sure it is an easy task that was
already implemented by someone, but I can't google any useful result.
[1] http://comments.gmane.org/gmane.linux.alsa.devel/127508
2
2

[alsa-devel] [PATCH 1/1 linux-next] ASoC: cs35l32: remove second linux/slab.h inclusion
by Fabian Frederick 17 Sep '14
by Fabian Frederick 17 Sep '14
17 Sep '14
linux/slab.h was included twice.
Signed-off-by: Fabian Frederick <fabf(a)skynet.be>
---
sound/soc/codecs/cs35l32.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/sound/soc/codecs/cs35l32.c b/sound/soc/codecs/cs35l32.c
index 76f628b..c125925 100644
--- a/sound/soc/codecs/cs35l32.c
+++ b/sound/soc/codecs/cs35l32.c
@@ -25,7 +25,6 @@
#include <linux/regulator/consumer.h>
#include <linux/gpio/consumer.h>
#include <linux/of_device.h>
-#include <linux/slab.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
--
2.1.0
3
2

16 Sep '14
The idea of the series is to fix the two issues that I found [1] for the
hw plugin. snd_pcm_rewindable() sometimes returned negative values that
are actually negative amounts of samples and not error codes. Also, it
bases its calculations on stale hardware position pointer, which is not
what PulseAudio wants (alternatively, we can document the need to call
snd_pcm_avail() before snd_pcm_rewindable(), but I don't like it).
Also, similar issues in other plugins are fixed, except for "share" and
"shm" plugins that I could not really test due to unrelated crashes. I also
fixed miscelanneous cosmetic issues and bugs that I found along the way.
Note: this series touches pcm_dmix.c, but does not make it rewindable. In
other words, a variant of the test in [2] now produces a tone instead of
failing due to snd_pcm_rewind() returning 0. But it should ideally produce
silence. Obviously, there is some bug left that I have not pinpointed yet.
Same for dshare: the test produces a tone, and I don't yet know why.
[1] http://permalink.gmane.org/gmane.linux.alsa.devel/122843 and
http://permalink.gmane.org/gmane.linux.alsa.devel/122848 (modify the
test program to set the stop threshold larger than the buffer size)
[2] http://permalink.gmane.org/gmane.linux.alsa.devel/122179
Alexander E. Patrakov (9):
dmix: actually rewind when running or being drained
pcm: express the rewind size limitation logic better
pcm: handle negative values from snd_pcm_mmap_hw_avail
pcm, rate: use the snd_pcm_mmap_hw_avail function
pcm, null: use the snd_pcm_mmap_avail function
rate: handle negative values from snd_pcm_mmap_playback_hw_avail
dsnoop: rewindable and forwardable logic was swapped
pcm: rewindable, forwardable: don't return stale data
pcm, file: don't recurse in the rewindable and forwardable callbacks
src/pcm/pcm_dmix.c | 20 ++++++++++++++------
src/pcm/pcm_dshare.c | 16 +++++++++-------
src/pcm/pcm_dsnoop.c | 18 ++++++++++--------
src/pcm/pcm_file.c | 4 ++--
src/pcm/pcm_hw.c | 8 +++++++-
src/pcm/pcm_ioplug.c | 4 +++-
src/pcm/pcm_local.h | 18 ++++++++++++++++++
src/pcm/pcm_null.c | 5 +----
src/pcm/pcm_plugin.c | 12 +++++++++---
src/pcm/pcm_rate.c | 9 +++------
10 files changed, 76 insertions(+), 38 deletions(-)
--
2.1.0
4
25
The patch adds the GPIO function.
Signed-off-by: Oder Chiou <oder_chiou(a)realtek.com>
---
sound/soc/codecs/rt5677.c | 133 ++++++++++++++++++++++++++++++++++++++++++++++
sound/soc/codecs/rt5677.h | 112 ++++++++++++++++++++++++++++++++++++++
2 files changed, 245 insertions(+)
diff --git a/sound/soc/codecs/rt5677.c b/sound/soc/codecs/rt5677.c
index f0b751b..02bc8bd 100644
--- a/sound/soc/codecs/rt5677.c
+++ b/sound/soc/codecs/rt5677.c
@@ -19,6 +19,7 @@
#include <linux/i2c.h>
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
+#include <linux/gpio.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
@@ -3160,6 +3161,135 @@ static int rt5677_set_bias_level(struct snd_soc_codec *codec,
return 0;
}
+#ifdef CONFIG_GPIOLIB
+static inline struct rt5677_priv *gpio_to_rt5677(struct gpio_chip *chip)
+{
+ return container_of(chip, struct rt5677_priv, gpio_chip);
+}
+
+static void rt5677_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
+{
+ struct rt5677_priv *rt5677 = gpio_to_rt5677(chip);
+
+ switch (offset) {
+ case RT5677_GPIO1 ... RT5677_GPIO5:
+ regmap_update_bits(rt5677->regmap, RT5677_GPIO_CTRL2,
+ 0x1 << (offset * 3 + 1), !!value << (offset * 3 + 1));
+ break;
+
+ case RT5677_GPIO6:
+ regmap_update_bits(rt5677->regmap, RT5677_GPIO_CTRL3,
+ RT5677_GPIO6_OUT_MASK, !!value << RT5677_GPIO6_OUT_SFT);
+ break;
+
+ default:
+ break;
+ }
+}
+
+static int rt5677_gpio_direction_out(struct gpio_chip *chip,
+ unsigned offset, int value)
+{
+ struct rt5677_priv *rt5677 = gpio_to_rt5677(chip);
+
+ switch (offset) {
+ case RT5677_GPIO1 ... RT5677_GPIO5:
+ regmap_update_bits(rt5677->regmap, RT5677_GPIO_CTRL2,
+ 0x3 << (offset * 3 + 1),
+ (0x2 | !!value) << (offset * 3 + 1));
+ break;
+
+ case RT5677_GPIO6:
+ regmap_update_bits(rt5677->regmap, RT5677_GPIO_CTRL3,
+ RT5677_GPIO6_DIR_MASK | RT5677_GPIO6_OUT_MASK,
+ RT5677_GPIO6_DIR_OUT | !!value << RT5677_GPIO6_OUT_SFT);
+ break;
+
+ default:
+ break;
+ }
+
+ return 0;
+}
+
+static int rt5677_gpio_get(struct gpio_chip *chip, unsigned offset)
+{
+ struct rt5677_priv *rt5677 = gpio_to_rt5677(chip);
+ int value, ret;
+
+ ret = regmap_read(rt5677->regmap, RT5677_GPIO_ST, &value);
+ if (ret < 0)
+ return ret;
+
+ return (value & (0x1 << offset)) >> offset;
+}
+
+static int rt5677_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
+{
+ struct rt5677_priv *rt5677 = gpio_to_rt5677(chip);
+
+ switch (offset) {
+ case RT5677_GPIO1 ... RT5677_GPIO5:
+ regmap_update_bits(rt5677->regmap, RT5677_GPIO_CTRL2,
+ 0x1 << (offset * 3 + 2), 0x0);
+ break;
+
+ case RT5677_GPIO6:
+ regmap_update_bits(rt5677->regmap, RT5677_GPIO_CTRL3,
+ RT5677_GPIO6_DIR_MASK, RT5677_GPIO6_DIR_IN);
+ break;
+
+ default:
+ break;
+ }
+
+ return 0;
+}
+
+static struct gpio_chip rt5677_template_chip = {
+ .label = "rt5677",
+ .owner = THIS_MODULE,
+ .direction_output = rt5677_gpio_direction_out,
+ .set = rt5677_gpio_set,
+ .direction_input = rt5677_gpio_direction_in,
+ .get = rt5677_gpio_get,
+ .can_sleep = 1,
+};
+
+static void rt5677_init_gpio(struct i2c_client *i2c)
+{
+ struct rt5677_priv *rt5677 = i2c_get_clientdata(i2c);
+ int ret;
+
+ rt5677->gpio_chip = rt5677_template_chip;
+ rt5677->gpio_chip.ngpio = RT5677_GPIO_NUM;
+ rt5677->gpio_chip.dev = &i2c->dev;
+ rt5677->gpio_chip.base = -1;
+
+ ret = gpiochip_add(&rt5677->gpio_chip);
+ if (ret != 0)
+ dev_err(&i2c->dev, "Failed to add GPIOs: %d\n", ret);
+}
+
+static void rt5677_free_gpio(struct i2c_client *i2c)
+{
+ struct rt5677_priv *rt5677 = i2c_get_clientdata(i2c);
+ int ret;
+
+ ret = gpiochip_remove(&rt5677->gpio_chip);
+ if (ret != 0)
+ dev_err(&i2c->dev, "Failed to remove GPIOs: %d\n", ret);
+}
+#else
+static void rt5677_init_gpio(struct i2c_client *i2c)
+{
+}
+
+static void rt5677_free_gpio(struct i2c_client *i2c)
+{
+}
+#endif
+
static int rt5677_probe(struct snd_soc_codec *codec)
{
struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec);
@@ -3422,6 +3552,8 @@ static int rt5677_i2c_probe(struct i2c_client *i2c,
RT5677_GPIO5_DIR_OUT);
}
+ rt5677_init_gpio(i2c);
+
return snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5677,
rt5677_dai, ARRAY_SIZE(rt5677_dai));
}
@@ -3429,6 +3561,7 @@ static int rt5677_i2c_probe(struct i2c_client *i2c,
static int rt5677_i2c_remove(struct i2c_client *i2c)
{
snd_soc_unregister_codec(&i2c->dev);
+ rt5677_free_gpio(i2c);
return 0;
}
diff --git a/sound/soc/codecs/rt5677.h b/sound/soc/codecs/rt5677.h
index a334eb6..b61b72c 100644
--- a/sound/soc/codecs/rt5677.h
+++ b/sound/soc/codecs/rt5677.h
@@ -1363,10 +1363,109 @@
#define RT5677_SEL_SRC_IB01 (0x1 << 0)
#define RT5677_SEL_SRC_IB01_SFT 0
+/* GPIO status (0xbf) */
+#define RT5677_GPIO6_STATUS_MASK (0x1 << 5)
+#define RT5677_GPIO6_STATUS_SFT 5
+#define RT5677_GPIO5_STATUS_MASK (0x1 << 4)
+#define RT5677_GPIO5_STATUS_SFT 4
+#define RT5677_GPIO4_STATUS_MASK (0x1 << 3)
+#define RT5677_GPIO4_STATUS_SFT 3
+#define RT5677_GPIO3_STATUS_MASK (0x1 << 2)
+#define RT5677_GPIO3_STATUS_SFT 2
+#define RT5677_GPIO2_STATUS_MASK (0x1 << 1)
+#define RT5677_GPIO2_STATUS_SFT 1
+#define RT5677_GPIO1_STATUS_MASK (0x1 << 0)
+#define RT5677_GPIO1_STATUS_SFT 0
+
+/* GPIO Control 1 (0xc0) */
+#define RT5677_GPIO1_PIN_MASK (0x1 << 15)
+#define RT5677_GPIO1_PIN_SFT 15
+#define RT5677_GPIO1_PIN_GPIO1 (0x0 << 15)
+#define RT5677_GPIO1_PIN_IRQ (0x1 << 15)
+#define RT5677_IPTV_MODE_MASK (0x1 << 14)
+#define RT5677_IPTV_MODE_SFT 14
+#define RT5677_IPTV_MODE_GPIO (0x0 << 14)
+#define RT5677_IPTV_MODE_IPTV (0x1 << 14)
+#define RT5677_FUNC_MODE_MASK (0x1 << 13)
+#define RT5677_FUNC_MODE_SFT 13
+#define RT5677_FUNC_MODE_DMIC_GPIO (0x0 << 13)
+#define RT5677_FUNC_MODE_JTAG (0x1 << 13)
+
/* GPIO Control 2 (0xc1) */
#define RT5677_GPIO5_DIR_MASK (0x1 << 14)
+#define RT5677_GPIO5_DIR_SFT 14
#define RT5677_GPIO5_DIR_IN (0x0 << 14)
#define RT5677_GPIO5_DIR_OUT (0x1 << 14)
+#define RT5677_GPIO5_OUT_MASK (0x1 << 13)
+#define RT5677_GPIO5_OUT_SFT 13
+#define RT5677_GPIO5_OUT_LO (0x0 << 13)
+#define RT5677_GPIO5_OUT_HI (0x1 << 13)
+#define RT5677_GPIO5_P_MASK (0x1 << 12)
+#define RT5677_GPIO5_P_SFT 12
+#define RT5677_GPIO5_P_NOR (0x0 << 12)
+#define RT5677_GPIO5_P_INV (0x1 << 12)
+#define RT5677_GPIO4_DIR_MASK (0x1 << 11)
+#define RT5677_GPIO4_DIR_SFT 11
+#define RT5677_GPIO4_DIR_IN (0x0 << 11)
+#define RT5677_GPIO4_DIR_OUT (0x1 << 11)
+#define RT5677_GPIO4_OUT_MASK (0x1 << 10)
+#define RT5677_GPIO4_OUT_SFT 10
+#define RT5677_GPIO4_OUT_LO (0x0 << 10)
+#define RT5677_GPIO4_OUT_HI (0x1 << 10)
+#define RT5677_GPIO4_P_MASK (0x1 << 9)
+#define RT5677_GPIO4_P_SFT 9
+#define RT5677_GPIO4_P_NOR (0x0 << 9)
+#define RT5677_GPIO4_P_INV (0x1 << 9)
+#define RT5677_GPIO3_DIR_MASK (0x1 << 8)
+#define RT5677_GPIO3_DIR_SFT 8
+#define RT5677_GPIO3_DIR_IN (0x0 << 8)
+#define RT5677_GPIO3_DIR_OUT (0x1 << 8)
+#define RT5677_GPIO3_OUT_MASK (0x1 << 7)
+#define RT5677_GPIO3_OUT_SFT 7
+#define RT5677_GPIO3_OUT_LO (0x0 << 7)
+#define RT5677_GPIO3_OUT_HI (0x1 << 7)
+#define RT5677_GPIO3_P_MASK (0x1 << 6)
+#define RT5677_GPIO3_P_SFT 6
+#define RT5677_GPIO3_P_NOR (0x0 << 6)
+#define RT5677_GPIO3_P_INV (0x1 << 6)
+#define RT5677_GPIO2_DIR_MASK (0x1 << 5)
+#define RT5677_GPIO2_DIR_SFT 5
+#define RT5677_GPIO2_DIR_IN (0x0 << 5)
+#define RT5677_GPIO2_DIR_OUT (0x1 << 5)
+#define RT5677_GPIO2_OUT_MASK (0x1 << 4)
+#define RT5677_GPIO2_OUT_SFT 4
+#define RT5677_GPIO2_OUT_LO (0x0 << 4)
+#define RT5677_GPIO2_OUT_HI (0x1 << 4)
+#define RT5677_GPIO2_P_MASK (0x1 << 3)
+#define RT5677_GPIO2_P_SFT 3
+#define RT5677_GPIO2_P_NOR (0x0 << 3)
+#define RT5677_GPIO2_P_INV (0x1 << 3)
+#define RT5677_GPIO1_DIR_MASK (0x1 << 2)
+#define RT5677_GPIO1_DIR_SFT 2
+#define RT5677_GPIO1_DIR_IN (0x0 << 2)
+#define RT5677_GPIO1_DIR_OUT (0x1 << 2)
+#define RT5677_GPIO1_OUT_MASK (0x1 << 1)
+#define RT5677_GPIO1_OUT_SFT 1
+#define RT5677_GPIO1_OUT_LO (0x0 << 1)
+#define RT5677_GPIO1_OUT_HI (0x1 << 1)
+#define RT5677_GPIO1_P_MASK (0x1 << 0)
+#define RT5677_GPIO1_P_SFT 0
+#define RT5677_GPIO1_P_NOR (0x0 << 0)
+#define RT5677_GPIO1_P_INV (0x1 << 0)
+
+/* GPIO Control 3 (0xc2) */
+#define RT5677_GPIO6_DIR_MASK (0x1 << 2)
+#define RT5677_GPIO6_DIR_SFT 2
+#define RT5677_GPIO6_DIR_IN (0x0 << 2)
+#define RT5677_GPIO6_DIR_OUT (0x1 << 2)
+#define RT5677_GPIO6_OUT_MASK (0x1 << 1)
+#define RT5677_GPIO6_OUT_SFT 1
+#define RT5677_GPIO6_OUT_LO (0x0 << 1)
+#define RT5677_GPIO6_OUT_HI (0x1 << 1)
+#define RT5677_GPIO6_P_MASK (0x1 << 0)
+#define RT5677_GPIO6_P_SFT 0
+#define RT5677_GPIO6_P_NOR (0x0 << 0)
+#define RT5677_GPIO6_P_INV (0x1 << 0)
/* Virtual DSP Mixer Control (0xf7 0xf8 0xf9) */
#define RT5677_DSP_IB_01_H (0x1 << 15)
@@ -1428,6 +1527,16 @@ enum {
RT5677_AIFS,
};
+enum {
+ RT5677_GPIO1,
+ RT5677_GPIO2,
+ RT5677_GPIO3,
+ RT5677_GPIO4,
+ RT5677_GPIO5,
+ RT5677_GPIO6,
+ RT5677_GPIO_NUM,
+};
+
struct rt5677_priv {
struct snd_soc_codec *codec;
struct rt5677_platform_data pdata;
@@ -1441,6 +1550,9 @@ struct rt5677_priv {
int pll_src;
int pll_in;
int pll_out;
+#ifdef CONFIG_GPIOLIB
+ struct gpio_chip gpio_chip;
+#endif
};
#endif /* __RT5677_H__ */
--
1.8.1.1.439.g50a6b54
2
1

16 Sep '14
From: Bard Liao <bardliao(a)realtek.com>
This patch set cbj_en value for ACPI devices.
Signed-off-by: Bard Liao <bardliao(a)realtek.com>
---
sound/soc/codecs/rt286.c | 17 ++++++++++++++++-
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/sound/soc/codecs/rt286.c b/sound/soc/codecs/rt286.c
index e4f6102..7dfca82 100644
--- a/sound/soc/codecs/rt286.c
+++ b/sound/soc/codecs/rt286.c
@@ -1100,8 +1100,14 @@ static const struct i2c_device_id rt286_i2c_id[] = {
};
MODULE_DEVICE_TABLE(i2c, rt286_i2c_id);
+/* the default platform data for acpi devices */
+static struct rt286_platform_data rt286_acpi_data = {
+ .cbj_en = true,
+ .gpio2_en = false,
+};
+
static const struct acpi_device_id rt286_acpi_match[] = {
- { "INT343A", 0 },
+ { "INT343A", (unsigned long)&rt286_acpi_data },
{},
};
MODULE_DEVICE_TABLE(acpi, rt286_acpi_match);
@@ -1111,6 +1117,8 @@ static int rt286_i2c_probe(struct i2c_client *i2c,
{
struct rt286_platform_data *pdata = dev_get_platdata(&i2c->dev);
struct rt286_priv *rt286;
+ struct device *dev = &i2c->dev;
+ const struct acpi_device_id *acpiid;
int i, ret;
rt286 = devm_kzalloc(&i2c->dev, sizeof(*rt286),
@@ -1141,6 +1149,13 @@ static int rt286_i2c_probe(struct i2c_client *i2c,
if (pdata)
rt286->pdata = *pdata;
+ /* enable jack combo mode on supported devices */
+ acpiid = acpi_match_device(dev->driver->acpi_match_table, dev);
+ if (acpiid) {
+ rt286->pdata = *(struct rt286_platform_data *)
+ acpiid->driver_data;
+ }
+
regmap_write(rt286->regmap, RT286_SET_AUDIO_POWER, AC_PWRST_D3);
for (i = 0; i < RT286_POWER_REG_LEN; i++)
--
1.8.1.1.439.g50a6b54
3
3

[alsa-devel] [PATCH] speaker-test: Fix dropped samples at the end of test
by Jarkko Nikula 16 Sep '14
by Jarkko Nikula 16 Sep '14
16 Sep '14
Commit 6d1673526b0f ("Avoid unnecessary drain/restart in speaker-test")
drains only when buffer is bigger than audio sample. This has a drawback
that up to buffer size amount of data may not be heard at the end of audio
sample.
This was noted with "speaker-test -c 2 -t wav -s 2" test on a
hardware that has a buffer size of 24000 samples and 48 kHz sample rate.
Instead of playing "front right" it played something like "front ra".
Reverse buffer size vs sample size test wouldn't work either since then
samples smaller than buffer are dropped.
Fix this by removing buffer_size tests from write_loop() and do
drain/restart always when not aborting.
Signed-off-by: Jarkko Nikula <jarkko.nikula(a)linux.intel.com>
Reported-by: Vidal, Guillaume-florianX <guillaume-florianx.vidal(a)intel.com>
---
This was originally noted on Baytrail ADSP hw (default buffer size 24000)
but can be heard also on Intel HDA (default buffer size 8192) when audio
sample is small enough but bigger than buffer. For instance 100 ms sample
finishes too shortly (buffer size 8192, sample size 9600) but 50 ms plays
ok (buffer size 8192, sample size 4800).
I guess some optimization can be done for snd_pcm_prepare() when not looping
but that's not necessary for this fix.
---
speaker-test/speaker-test.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/speaker-test/speaker-test.c b/speaker-test/speaker-test.c
index 61396f296c65..836fd26d35b1 100644
--- a/speaker-test/speaker-test.c
+++ b/speaker-test/speaker-test.c
@@ -942,7 +942,7 @@ static int write_loop(snd_pcm_t *handle, int channel, int periods, uint8_t *fram
snd_pcm_bytes_to_frames(handle, err * channels))) < 0)
break;
}
- if (buffer_size > n && !in_aborting) {
+ if (!in_aborting) {
snd_pcm_drain(handle);
snd_pcm_prepare(handle);
}
@@ -964,7 +964,7 @@ static int write_loop(snd_pcm_t *handle, int channel, int periods, uint8_t *fram
if ((err = write_buffer(handle, frames, period_size)) < 0)
return err;
}
- if (buffer_size > n * period_size && !in_aborting) {
+ if (!in_aborting) {
snd_pcm_drain(handle);
snd_pcm_prepare(handle);
}
--
2.1.0
3
4
The following changes since commit 9e82bf014195d6f0054982c463575cdce24292be:
Linux 3.17-rc5 (2014-09-14 17:50:12 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git tags/asoc-v3.17-rc4
for you to fetch changes up to f7667af21736eb231e3589d9f91183d325cabfbe:
Merge remote-tracking branches 'asoc/fix/cs4265', 'asoc/fix/davinci', 'asoc/fix/rockchip', 'asoc/fix/samsung' and 'asoc/fix/tlv320aic31xx' into asoc-linus (2014-09-15 15:05:34 -0700)
----------------------------------------------------------------
ASoC: Fixes for v3.17
This is mostly driver fixes, the biggest one being the tlv320aic31xx
which is relatively large but simple and device specific. There's a
small fix in the error handling in DPCM too which is relatively minor
error handling fix.
----------------------------------------------------------------
Charles Keepax (1):
ASoC: samsung-i2s: Check secondary DAI exists before referencing
Jianqun (3):
ASoC: rockchip-i2s: fix master mode set bit error
ASoC: rockchip-i2s: fix registers' property of rockchip i2s controller
ASoC: rockchip-i2s: dt: swap tx and rx channed request number in example
Jyri Sarha (1):
ASoC: tlv320aic31xx: Fix 24bit samples with I2S format and 12MHz mclk
Mark Brown (3):
Merge remote-tracking branch 'asoc/fix/core' into asoc-linus
Merge remote-tracking branch 'asoc/fix/pcm' into asoc-linus
Merge remote-tracking branches 'asoc/fix/cs4265', 'asoc/fix/davinci', 'asoc/fix/rockchip', 'asoc/fix/samsung' and 'asoc/fix/tlv320aic31xx' into asoc-linus
Paul Handrigan (1):
ASoC: cs4265: Fix register address to set the proper data type.
Peter Ujfalusi (1):
ASoC: davinci-mcasp: Correct rx format unit configuration
Qiao Zhou (1):
ASoC: soc-pcm: fix dpcm_path_get error handling
Rajeev Kumar (2):
ASoC: dwc: Update email id of the author
ASoC: Update email id of the author
.../devicetree/bindings/sound/rockchip-i2s.txt | 2 +-
sound/soc/codecs/cs4265.c | 6 +--
sound/soc/codecs/sta529.c | 4 +-
sound/soc/codecs/tlv320aic31xx.c | 51 +++++++++++++++++-----
sound/soc/davinci/davinci-mcasp.c | 11 ++++-
sound/soc/dwc/designware_i2s.c | 4 +-
sound/soc/rockchip/rockchip_i2s.c | 13 +++---
sound/soc/samsung/i2s.c | 5 ++-
sound/soc/soc-compress.c | 6 ++-
sound/soc/soc-pcm.c | 6 ++-
sound/soc/spear/spear_pcm.c | 4 +-
11 files changed, 79 insertions(+), 33 deletions(-)
2
1
At Tue, 16 Sep 2014 04:08:48 +0000 (GMT),
Renu Tyagi wrote:
>
> Hi Takashi,
>
> Here are some more bugs and patches
Could you post one patch per mail? This would make it much easier to
review.
thanks,
Takashi
>
> 1. File in which changes are being made : conf.c
> Value of err to be Negative for correct error handling
> Patch : 22657.patch
>
> Community Code:
> if (err >= 0) {
> snd_config_iterator_t i, next;
> if (snd_config_get_type(func_conf) != SND_CONFIG_TYPE_COMPOUND) {
> SNDERR("Invalid type for func %s definition", str);
> goto _err;
> }
>
> Recommended Code :
> if (err >= 0) {
> snd_config_iterator_t i, next;
> if (snd_config_get_type(func_conf) != SND_CONFIG_TYPE_COMPOUND) {
> SNDERR("Invalid type for func %s definition", str);
> err = -EINVAL;
> goto _err;
> }
>
> ----------------------------------------------------------------------------------------
>
> 2.File in which changes are being made : control.c
> Value of err to be Negative for correct error handling
> Patch : 22658.patch
>
> Community Code:
> if (err >= 0) {
> if (snd_config_get_type(type_conf) != SND_CONFIG_TYPE_COMPOUND) {
> SNDERR("Invalid type for CTL type %s definition", str);
> goto _err;
> }
>
> Recommended Code :
> if (err >= 0) {
> if (snd_config_get_type(type_conf) != SND_CONFIG_TYPE_COMPOUND) {
> SNDERR("Invalid type for CTL type %s definition", str);
> err = -EINVAL;
> goto _err;
> }
> ----------------------------------------------------------------------------------------
>
> 3.File in which changes are being made : mixer.c
> Double free by calling snd_hctl_close(hctl) twice it is called inside snd_mixer_attach_hctl also.
> Patch : 22638.patch
>
> Community Code:
> int snd_mixer_attach(snd_mixer_t *mixer, const char *name)
> {
> snd_hctl_t *hctl;
> int err;
>
> err = snd_hctl_open(&hctl, name, 0);
> if (err < 0)
> return err;
> err = snd_mixer_attach_hctl(mixer, hctl);
> if (err < 0) {
> snd_hctl_close(hctl);
> return err;
> }
> return 0;
> }
>
> Recommended Code :
> int snd_mixer_attach(snd_mixer_t *mixer, const char *name)
> {
> snd_hctl_t *hctl;
> int err;
>
> err = snd_hctl_open(&hctl, name, 0);
> if (err < 0)
> return err;
> err = snd_mixer_attach_hctl(mixer, hctl);
> if (err < 0) {
> /* Removed snd_hctl_close(hctl) to avoid double free, already called in snd_mixer_attach_hctl. */
> return err;
> }
> return 0;
> }
> ----------------------------------------------------------------------------------------
>
> 4.File in which changes are being made : pcm.c
> Value of err to be Negative for correct error handling
> Patch : 22659.patch
>
> Community Code:
> if (err >= 0) {
> if (snd_config_get_type(type_conf) != SND_CONFIG_TYPE_COMPOUND) {
> SNDERR("Invalid type for PCM type %s definition", str);
> goto _err;
> }
> snd_config_for_each(i, next, type_conf) {
> snd_config_t *n = snd_config_iterator_entry(i);
> Recommended Code :
> if (err >= 0) {
> if (snd_config_get_type(type_conf) != SND_CONFIG_TYPE_COMPOUND) {
> SNDERR("Invalid type for PCM type %s definition", str);
> err = -EINVAL;
> goto _err;
> }
> snd_config_for_each(i, next, type_conf) {
> snd_config_t *n = snd_config_iterator_entry(i);
>
> ----------------------------------------------------------------------------------------
>
> 5.File in which changes are being made : pcm_file.c
> Free resources before returning error.
> Patch : 22583.patch
> Patch : 22584.patch
>
> Community Code:
> if (ifname && (stream == SND_PCM_STREAM_CAPTURE)) {
> ifd = open(ifname, O_RDONLY); /* TODO: mind blocking mode */
> if (ifd < 0) {
> SYSERR("open %s for reading failed", ifname);
> free(file);
> return -errno;
> }
> file->ifname = strdup(ifname);
> }
> file->fd = fd;
> file->ifd = ifd;
> file->format = format;
> file->gen.slave = slave;
> file->gen.close_slave = close_slave;
>
> err = snd_pcm_new(&pcm, SND_PCM_TYPE_FILE, name, slave->stream, slave->mode);
> if (err < 0) {
> free(file->fname);
> free(file);
> return err;
> }
>
> Recommended Code :
> if (ifname && (stream == SND_PCM_STREAM_CAPTURE)) {
> ifd = open(ifname, O_RDONLY); /* TODO: mind blocking mode */
> if (ifd < 0) {
> SYSERR("open %s for reading failed", ifname);
> free(file->fname);
> free(file);
> return -errno;
> }
> file->ifname = strdup(ifname);
> }
> file->fd = fd;
> file->ifd = ifd;
> file->format = format;
> file->gen.slave = slave;
> file->gen.close_slave = close_slave;
>
> err = snd_pcm_new(&pcm, SND_PCM_TYPE_FILE, name, slave->stream, slave->mode);
> if (err < 0) {
> free(file->fname);
> free(file->ifname);
> free(file);
> return err;
> }
>
> ----------------------------------------------------------------------------------------
>
> 6.File in which changes are being made : pcm_hooks.c
> Null check before closing h
> Patch :22665.patch
>
> Community Code:
> if (err >= 0)
> err = hook_add_dlobj(pcm, h);
>
> if (err < 0) {
> snd_dlclose(h);
> return err;
> }
> return 0;
> }
> Recommended Code :
> if (err >= 0)
> err = hook_add_dlobj(pcm, h);
>
> if (err < 0) {
> if(h)
> snd_dlclose(h);
> return err;
> }
> return 0;
> }
> ----------------------------------------------------------------------------------------
>
> 7.File in which changes are being made : pcm_share.c
> Mutex unlock before returning
> Patch : 22670.patch
>
> Community Code:
> Pthread_mutex_lock(&slave->mutex);
> err = pipe(slave->poll);
> if (err < 0) {
> SYSERR("can't create a pipe");
> return NULL;
> }
> while (slave->open_count > 0) {
> snd_pcm_uframes_t missing;
> // printf("begin min_missing\n");
> missing = _snd_pcm_share_slave_missing(slave);
> // printf("min_missing=%ld\n", missing);
> if (missing < INT_MAX) {
> snd_pcm_uframes_t hw_ptr;
> snd_pcm_sframes_t avail_min;
> hw_ptr = slave->hw_ptr + missing;
> hw_ptr += spcm->period_size - 1;
> if (hw_ptr >= spcm->boundary)
> hw_ptr -= spcm->boundary;
> hw_ptr -= hw_ptr % spcm->period_size;
> avail_min = hw_ptr - *spcm->appl.ptr;
> if (spcm->stream == SND_PCM_STREAM_PLAYBACK)
> avail_min += spcm->buffer_size;
> if (avail_min < 0)
> avail_min += spcm->boundary;
> // printf("avail_min=%d\n", avail_min);
> if ((snd_pcm_uframes_t)avail_min != spcm->avail_min) {
> snd_pcm_sw_params_set_avail_min(spcm, &slave->sw_params, avail_min);
> err = snd_pcm_sw_params(spcm, &slave->sw_params);
> if (err < 0) {
> SYSERR("snd_pcm_sw_params error");
> return NULL;
> }
> }
>
> Recommended Code :
> Pthread_mutex_lock(&slave->mutex);
> err = pipe(slave->poll);
> if (err < 0) {
> SYSERR("can't create a pipe");
> Pthread_mutex_unlock(&slave->mutex);
> return NULL;
> }
> while (slave->open_count > 0) {
> snd_pcm_uframes_t missing;
> // printf("begin min_missing\n");
> missing = _snd_pcm_share_slave_missing(slave);
> // printf("min_missing=%ld\n", missing);
> if (missing < INT_MAX) {
> snd_pcm_uframes_t hw_ptr;
> snd_pcm_sframes_t avail_min;
> hw_ptr = slave->hw_ptr + missing;
> hw_ptr += spcm->period_size - 1;
> if (hw_ptr >= spcm->boundary)
> hw_ptr -= spcm->boundary;
> hw_ptr -= hw_ptr % spcm->period_size;
> avail_min = hw_ptr - *spcm->appl.ptr;
> if (spcm->stream == SND_PCM_STREAM_PLAYBACK)
> avail_min += spcm->buffer_size;
> if (avail_min < 0)
> avail_min += spcm->boundary;
> // printf("avail_min=%d\n", avail_min);
> if ((snd_pcm_uframes_t)avail_min != spcm->avail_min) {
> snd_pcm_sw_params_set_avail_min(spcm, &slave->sw_params, avail_min);
> err = snd_pcm_sw_params(spcm, &slave->sw_params);
> if (err < 0) {
> SYSERR("snd_pcm_sw_params error");
> Pthread_mutex_unlock(&slave->mutex);
> return NULL;
> }
> }
> ----------------------------------------------------------------------------------------
> 8.File in which changes are being made : rawmidi.c
> Handle h to be closed in case of error before returning
> Patch :22578.patch
>
> Community Code:
> if (err >= 0)
> err = open_func(inputp, outputp, name, rawmidi_root, rawmidi_conf, mode);
> if (err < 0)
> return err;
> if (inputp) {
> (*inputp)->dl_handle = h; h = NULL;
>
> Recommended Code :
> if (err >= 0)
> err = open_func(inputp, outputp, name, rawmidi_root, rawmidi_conf, mode);
> if (err < 0){
> if (h)
> snd_dlclose(h);
> return err;
> }
> if (inputp) {
> (*inputp)->dl_handle = h; h = NULL;
> ----------------------------------------------------------------------------------------
>
> 9.File in which changes are being made : sbase.c
> Freeing the resources before returning in case of error
> Patch : 22579.patch
>
> Community Code:
> hsimple = calloc(1, sizeof(*hsimple));
> if (hsimple == NULL) {
> snd_mixer_selem_id_free(id);
> return -ENOMEM;
> }
> switch (sel->purpose) {
> case PURPOSE_SWITCH:
> if (ctype != SND_CTL_ELEM_TYPE_BOOLEAN) {
> __invalid_type:
> snd_mixer_selem_id_free(id);
> return -EINVAL;
> }
> break;
>
> Recommended Code :
> hsimple = calloc(1, sizeof(*hsimple));
> if (hsimple == NULL) {
> snd_mixer_selem_id_free(id);
> return -ENOMEM;
> }
> switch (sel->purpose) {
> case PURPOSE_SWITCH:
> if (ctype != SND_CTL_ELEM_TYPE_BOOLEAN) {
> __invalid_type:
> snd_mixer_selem_id_free(id);
> free(hsimple);
> return -EINVAL;
> }
> break;
> ---------------------------------------------------------------------------
>
> 10.File in which changes are being made : socket.c
> Socket not closed before returning when error occurs
> Patch :22587.patch
>
> Community Code:
> s = socket(PF_INET, SOCK_STREAM, 0);
> if (s < 0) {
> SYSERR("socket failed");
> return -errno;
> }
>
> conf.ifc_len = numreqs * sizeof(struct ifreq);
> conf.ifc_buf = malloc((unsigned int) conf.ifc_len);
> if (! conf.ifc_buf)
> return -ENOMEM;
> while (1) {
> err = ioctl(s, SIOCGIFCONF, &conf);
> if (err < 0) {
> SYSERR("SIOCGIFCONF failed");
> return -errno;
> }
> if ((size_t)conf.ifc_len < numreqs * sizeof(struct ifreq))
> break;
> numreqs *= 2;
> conf.ifc_len = numreqs * sizeof(struct ifreq);
> conf.ifc_buf = realloc(conf.ifc_buf, (unsigned int) conf.ifc_len);
> if (! conf.ifc_buf)
> return -ENOMEM;
> }
>
> Recommended Code :
> s = socket(PF_INET, SOCK_STREAM, 0);
> if (s < 0) {
> SYSERR("socket failed");
> return -errno;
> }
>
> conf.ifc_len = numreqs * sizeof(struct ifreq);
> conf.ifc_buf = malloc((unsigned int) conf.ifc_len);
> if (! conf.ifc_buf){
> close(s);
> return -ENOMEM;
> }
> while (1) {
> err = ioctl(s, SIOCGIFCONF, &conf);
> if (err < 0) {
> SYSERR("SIOCGIFCONF failed");
> close(s);
> return -errno;
> }
> if ((size_t)conf.ifc_len < numreqs * sizeof(struct ifreq))
> break;
> numreqs *= 2;
> conf.ifc_len = numreqs * sizeof(struct ifreq);
> conf.ifc_buf = realloc(conf.ifc_buf, (unsigned int) conf.ifc_len);
> if (! conf.ifc_buf){
> close(s);
> return -ENOMEM;
> }
> }
> ----------------------------------------------------------------------
>
> 11.File in which changes are being made : simple_abst.c
> If lib is NULL return error to avoid strlen of NULL string.
> Patch :22667.patch
>
> Community Code:
> path = getenv("ALSA_MIXER_SIMPLE_MODULES");
> if (!path)
> path = SO_PATH;
> xlib = malloc(strlen(lib) + strlen(path) + 1 + 1);
> if (xlib == NULL)
> return -ENOMEM;
>
> Recommended Code :
> path = getenv("ALSA_MIXER_SIMPLE_MODULES");
> if (!lib)
> return -ENXIO;
> if (!path)
> path = SO_PATH;
> xlib = malloc(strlen(lib) + strlen(path) + 1 + 1);
> if (xlib == NULL)
> return -ENOMEM;
> ------------------------------------------------------------------------------
>
> ------- Original Message -------
> Sender : Takashi Iwai<tiwai(a)suse.de>
> Date : Sep 15, 2014 17:18 (GMT+05:30)
> Title : Re: [alsa-devel] coverity fix in alsa-libs
>
> At Mon, 15 Sep 2014 17:36:02 +0600,
> Alexander E. Patrakov wrote:
> >
> > 15.09.2014 15:25, Renu Tyagi wrote:
> > > Hi,
> > >
> > > I ran Coverity analysis tool on alsa and found some bugs.
> >
> > May I suggest that we remove aserver and the shm plugin instead of
> > applying the patch? Three days ago I tried to use it for testing my fix
> > to the share plugin, but failed. In other words: if even speaker-test
> > cannot be made to work on it without crashing and/or hanging or valgrind
> > errors, then I'd rather be aggressive here.
> >
> > And next time please CC: Takashi Iwai on all alsa-lib patches :)
>
> I'm for removing aserver & co, too, but let's put it as post-1.0.29
> item, since Jaroslav seems preparing 1.0.29 release now.
>
>
> thanks,
>
> Takashi
>
> >
> > > Bug and Patch description
> > >
> > > 1. Changed file : aserver.c
> > > Socket not closed before returning when bind fails
> > > Community Code:
> > >
> > > if (bind(sock, (struct sockaddr *) addr, size) < 0) {
> > > int result = -errno;
> > > SYSERROR("bind failed");
> > > return result;
> > > }
> > > return sock;
> > > }
> > >
> > > Recommended Code :
> > >
> > > if (bind(sock, (struct sockaddr *) addr, size) < 0) {
> > > int result = -errno;
> > > SYSERROR("bind failed");
> > > close(sock);
> > > return result;
> > > }
> > > return sock;
> > > }
> > >
> > > 2.Changed file : control_shm.c
> > > Socket not closed before returning when connect fails
> > >
> > > Community Code:
> > > if (connect(sock, (struct sockaddr *) addr, size) < 0)
> > > return -errno;
> > > return sock;
> > > }
> > >
> > > Recommended Code :
> > > if (connect(sock, (struct sockaddr *) addr, size) < 0){
> > > SYSERR("connect failed");
> > > close(sock);
> > > return -errno;
> > > }
> > > return sock;
> > > }
> > >
> > > 3.Changed file : pcm_shm.c
> > > Socket not closed before returning when connect fails
> > >
> > > Community Code:
> > > if (connect(sock, (struct sockaddr *) addr, size) < 0) {
> > > SYSERR("connect failed");
> > > return -errno;
> > > }
> > > return sock;
> > > }
> > > Recommended Code :
> > > if (connect(sock, (struct sockaddr *) addr, size) < 0) {
> > > SYSERR("connect failed");
> > > close(sock);
> > > return -errno;
> > > }
> > > return sock;
> > > }
> > >
> > > PFA patch.
> > >
> > >
> > >
> > >
> > >
> > > Thanks & Regards,
> > >
> > > Renu Tyagi
> > >
> > >
> > >
> > > _______________________________________________
> > > Alsa-devel mailing list
> > > Alsa-devel(a)alsa-project.org
> > > http://mailman.alsa-project.org/mailman/listinfo/alsa-devel
> > >
> >
> >
> > --
> > Alexander E. Patrakov
> >
> _______________________________________________
> Alsa-devel mailing list
> Alsa-devel(a)alsa-project.org
> http://mailman.alsa-project.org/mailman/listinfo/alsa-devel
>
>
> Thanks & Regards,
>
> Renu Tyagi
> SRI-Delhi (SW Platform) | Seat Number 3A-157
> Samsung India Electronics Pvt. Ltd.,
> 2A, Sector 126, Noida -201303
> [2 22657.patch <application/octet-stream (base64)>]
>
> [3 22658.patch <application/octet-stream (base64)>]
>
> [4 22638.patch <application/octet-stream (base64)>]
>
> [5 22659.patch <application/octet-stream (base64)>]
>
> [6 22583.patch <application/octet-stream (base64)>]
>
> [7 22584.patch <application/octet-stream (base64)>]
>
> [8 22665.patch <application/octet-stream (base64)>]
>
> [9 22670.patch <application/octet-stream (base64)>]
>
> [10 22578.patch <application/octet-stream (base64)>]
>
> [11 22579.patch <application/octet-stream (base64)>]
>
> [12 22587.patch <application/octet-stream (base64)>]
>
> [13 22667.patch <application/octet-stream (base64)>]
>
1
0

16 Sep '14
Hi,
this is a series of patches I quickly cooked up after the discussion
in this morning: the support of multiple callbacks per jack.
The series is applied on top of the previous fix patch (ALSA: hda -
Fix invalid pin powermap without jack detection). It begins with
a couple of cleanups, then introduces the new hda_jack_callback
struct and the changes along with it, then ends with another
couple of cleanup patches based on the new infrastructure.
I've tested only with a small set of devices, so far.
Takashi
2
16
The patches are based on:
git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux.git for-next
The base, the patches, and couple of additional not-to-be-merged
omap2plus_defconfig patches can be found here:
git://git.ti.com/~jyrisarha/ti-linux-kernel/jyrisarhas-audio-video-linux-fe… omap-hdmi-audio
Changes since v4:
- Turn ASoC parts into a platform device driver
- Some cleaning up
- reorder the patches to keep bisect working
Changes since v3:
- Move ASoC parts into library module under sound/soc/omap
- Come up with API for the library
- Some cleaning up
The patch set fixes OMAP4+ HDMI audio. The structure of the
implementation looks a bit different than before. Instead of creating
a driver specific API for a separate ASoC component driver to connect
to, these patches implement a platform device driver under
sound/soc/omap for ASoC side implementation. This driver should only
be registered from OMAPDSS HDMI code.
The ASoC side driver implements cpu-dai component using the callbacks
provided by OMAPDSS. Omap-pcm is registered for platform component,
dummy hdmi-audio-codec is registered for codec component, and
asoc-simple-card is registered for machine driver.
Big part of the HDMI audio code is still unchanged and there is a need
for a cleanup there. Also there is still probably something wrong with
speaker mapping of multi-channel streams. I will get back to cleaning
up these issues later.
Best regards,
Jyri
Jyri Sarha (15):
OMAPDSS: hdmi.h: Add HDMI_AUDIO_LAYOUT_6CH enum value
OMAPDSS: hdmi: Remove most of OMAP[45]_DSS_HDMI_AUDIO ifdefs
OMAPDSS: hdmi4_core: Remove unused hdmi4_audio_get_dma_port()
OMAPDSS: hdmi_wp: Add function for getting audio dma address
OMAPDSS: hdmi: Make hdmi structure public
OMAPDSS: hdmi: Add pdev pointer for audio_pdev in HDMI DRV data
ASoC: omap-hdmi-audio: Add platfrom device for OMAP HDMI audio
support
OMAPDSS: Kconfig: Remove HDMI audio booleans from Kconfig
OMAPDSS: hdmi: Make hdmi_mode_has_audio() more user friedly
OMAPDSS: hdmi4: Register ASoC platfrom device for omap hdmi audio
OMAPDSS: hdmi5: Register ASoC platfrom device for omap hdmi audio
ASoC: omap: Remove obsolete HDMI audio code and Kconfig options
OMAPDSS: hdmi4: Remove callbacks for the old ASoC DAI driver
OMAPDSS: hdmi5: Remove callbacks for the old ASoC DAI driver
OMAPDSS: Remove all references to obsolete HDMI audio callbacks
.../fbdev/omap2/displays-new/connector-hdmi.c | 99 -----
.../fbdev/omap2/displays-new/encoder-tpd12s015.c | 56 ---
drivers/video/fbdev/omap2/dss/Kconfig | 7 -
drivers/video/fbdev/omap2/dss/hdmi.h | 35 +-
drivers/video/fbdev/omap2/dss/hdmi4.c | 247 ++++++-------
drivers/video/fbdev/omap2/dss/hdmi4_core.c | 14 -
drivers/video/fbdev/omap2/dss/hdmi4_core.h | 4 -
drivers/video/fbdev/omap2/dss/hdmi5.c | 230 +++++-------
drivers/video/fbdev/omap2/dss/hdmi5_core.c | 6 -
drivers/video/fbdev/omap2/dss/hdmi5_core.h | 2 -
drivers/video/fbdev/omap2/dss/hdmi_common.c | 2 -
drivers/video/fbdev/omap2/dss/hdmi_wp.c | 8 +-
include/sound/omap-hdmi-audio.h | 38 ++
include/video/omapdss.h | 31 --
sound/soc/omap/Kconfig | 22 +-
sound/soc/omap/Makefile | 6 +-
sound/soc/omap/omap-hdmi-audio.c | 379 ++++++++++++++++++++
sound/soc/omap/omap-hdmi-card.c | 87 -----
sound/soc/omap/omap-hdmi.c | 364 -------------------
sound/soc/omap/omap-hdmi.h | 38 --
20 files changed, 675 insertions(+), 1000 deletions(-)
create mode 100644 include/sound/omap-hdmi-audio.h
create mode 100644 sound/soc/omap/omap-hdmi-audio.c
delete mode 100644 sound/soc/omap/omap-hdmi-card.c
delete mode 100644 sound/soc/omap/omap-hdmi.c
delete mode 100644 sound/soc/omap/omap-hdmi.h
--
1.7.9.5
1
15

[alsa-devel] [PATCH 0/3] ASoC: simple-card: cleanup simple-card daifmt
by Kuninori Morimoto 16 Sep '14
by Kuninori Morimoto 16 Sep '14
16 Sep '14
Hi Mark
These are cleanup patches for simple-card daifmt.
Kuninori Morimoto (3):
ASoC: simple-card: tidyup use priv in parameter
ASoC: simple-card: tidyup get dai_link/dai_props from priv
ASoC: simple-card: add asoc_simple_card_parse_daifmt()
sound/soc/generic/simple-card.c | 165 +++++++++++++++++++--------------------
1 file changed, 82 insertions(+), 83 deletions(-)
Best regards
---
Kuninori Morimoto
2
7

[alsa-devel] [PATCH 1/2] ASoC: rt5677: Revise the wrong name in the header file
by Oder Chiou 16 Sep '14
by Oder Chiou 16 Sep '14
16 Sep '14
The patch revises the wrong name in the header file.
Signed-off-by: Oder Chiou <oder_chiou(a)realtek.com>
---
sound/soc/codecs/rt5677.h | 44 ++++++++++++++++++++++----------------------
1 file changed, 22 insertions(+), 22 deletions(-)
diff --git a/sound/soc/codecs/rt5677.h b/sound/soc/codecs/rt5677.h
index 8791ab9..a334eb6 100644
--- a/sound/soc/codecs/rt5677.h
+++ b/sound/soc/codecs/rt5677.h
@@ -1287,16 +1287,16 @@
#define RT5677_PLL1_PD_SFT 8
#define RT5677_PLL1_PD_1 (0x0 << 8)
#define RT5677_PLL1_PD_2 (0x1 << 8)
-#define RT5671_DAC_OSR_MASK (0x3 << 6)
-#define RT5671_DAC_OSR_SFT 6
-#define RT5671_DAC_OSR_128 (0x0 << 6)
-#define RT5671_DAC_OSR_64 (0x1 << 6)
-#define RT5671_DAC_OSR_32 (0x2 << 6)
-#define RT5671_ADC_OSR_MASK (0x3 << 4)
-#define RT5671_ADC_OSR_SFT 4
-#define RT5671_ADC_OSR_128 (0x0 << 4)
-#define RT5671_ADC_OSR_64 (0x1 << 4)
-#define RT5671_ADC_OSR_32 (0x2 << 4)
+#define RT5677_DAC_OSR_MASK (0x3 << 6)
+#define RT5677_DAC_OSR_SFT 6
+#define RT5677_DAC_OSR_128 (0x0 << 6)
+#define RT5677_DAC_OSR_64 (0x1 << 6)
+#define RT5677_DAC_OSR_32 (0x2 << 6)
+#define RT5677_ADC_OSR_MASK (0x3 << 4)
+#define RT5677_ADC_OSR_SFT 4
+#define RT5677_ADC_OSR_128 (0x0 << 4)
+#define RT5677_ADC_OSR_64 (0x1 << 4)
+#define RT5677_ADC_OSR_32 (0x2 << 4)
/* Global Clock Control 2 (0x81) */
#define RT5677_PLL2_PR_SRC_MASK (0x1 << 15)
@@ -1312,18 +1312,18 @@
#define RT5677_PLL2_SRC_BCLK4 (0x4 << 12)
#define RT5677_PLL2_SRC_RCCLK (0x5 << 12)
#define RT5677_PLL2_SRC_SLIM (0x6 << 12)
-#define RT5671_DSP_ASRC_O_SRC (0x3 << 10)
-#define RT5671_DSP_ASRC_O_SRC_SFT 10
-#define RT5671_DSP_ASRC_O_MCLK (0x0 << 10)
-#define RT5671_DSP_ASRC_O_PLL1 (0x1 << 10)
-#define RT5671_DSP_ASRC_O_SLIM (0x2 << 10)
-#define RT5671_DSP_ASRC_O_RCCLK (0x3 << 10)
-#define RT5671_DSP_ASRC_I_SRC (0x3 << 8)
-#define RT5671_DSP_ASRC_I_SRC_SFT 8
-#define RT5671_DSP_ASRC_I_MCLK (0x0 << 8)
-#define RT5671_DSP_ASRC_I_PLL1 (0x1 << 8)
-#define RT5671_DSP_ASRC_I_SLIM (0x2 << 8)
-#define RT5671_DSP_ASRC_I_RCCLK (0x3 << 8)
+#define RT5677_DSP_ASRC_O_SRC (0x3 << 10)
+#define RT5677_DSP_ASRC_O_SRC_SFT 10
+#define RT5677_DSP_ASRC_O_MCLK (0x0 << 10)
+#define RT5677_DSP_ASRC_O_PLL1 (0x1 << 10)
+#define RT5677_DSP_ASRC_O_SLIM (0x2 << 10)
+#define RT5677_DSP_ASRC_O_RCCLK (0x3 << 10)
+#define RT5677_DSP_ASRC_I_SRC (0x3 << 8)
+#define RT5677_DSP_ASRC_I_SRC_SFT 8
+#define RT5677_DSP_ASRC_I_MCLK (0x0 << 8)
+#define RT5677_DSP_ASRC_I_PLL1 (0x1 << 8)
+#define RT5677_DSP_ASRC_I_SLIM (0x2 << 8)
+#define RT5677_DSP_ASRC_I_RCCLK (0x3 << 8)
#define RT5677_DSP_CLK_SRC_MASK (0x1 << 7)
#define RT5677_DSP_CLK_SRC_SFT 7
#define RT5677_DSP_CLK_SRC_PLL2 (0x0 << 7)
--
1.8.1.1.439.g50a6b54
2
3

15 Sep '14
These patches to fix rockchip i2s driver bugs, also make driver codes
reasonable.
Tested on RK3288 board.
Jianqun (5):
ASoC: rockchip-i2s: fix rockchip i2s defination more reasonable
ASoC: rockchip-i2s: fix master mode set bit error
ASoC: rockchip-i2s: add dma data to snd_soc_dai
ASoC: rockchip-i2s: fix registers' property of rockchip i2s controller
ASoC: rockchip-i2s: enable "hclk" for rockchip I2S controller
sound/soc/rockchip/Kconfig | 3 +--
sound/soc/rockchip/Makefile | 2 +-
sound/soc/rockchip/rockchip_i2s.c | 41 ++++++++++++++++++++++++---------------
3 files changed, 27 insertions(+), 19 deletions(-)
--
1.9.1
4
19

[alsa-devel] [PATCH] ASoC: rockchip-i2s: dt: swap tx and rx channed request number
by Jianqun 15 Sep '14
by Jianqun 15 Sep '14
15 Sep '14
Reference to RK3288 TRM, fix an error channel id for i2s tx and rx
Table 10-1 DMAC_BUS Request Mapping Table
Req number Source Polarity
0 I2S tx High level
1 I2S rx High level
Tested on RK3288 board.
Signed-off-by: Jianqun <jay.xu(a)rock-chips.com>
---
Documentation/devicetree/bindings/sound/rockchip-i2s.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/sound/rockchip-i2s.txt b/Documentation/devicetree/bindings/sound/rockchip-i2s.txt
index 6c55fcf..9b82c20 100644
--- a/Documentation/devicetree/bindings/sound/rockchip-i2s.txt
+++ b/Documentation/devicetree/bindings/sound/rockchip-i2s.txt
@@ -31,7 +31,7 @@ i2s@ff890000 {
#address-cells = <1>;
#size-cells = <0>;
dmas = <&pdma1 0>, <&pdma1 1>;
- dma-names = "rx", "tx";
+ dma-names = "tx", "rx";
clock-names = "i2s_hclk", "i2s_clk";
clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
};
--
1.9.1
3
4

[alsa-devel] [PATCH] pcm, rate: hw_avail must not be negative before starting the stream
by Alexander E. Patrakov 15 Sep '14
by Alexander E. Patrakov 15 Sep '14
15 Sep '14
If it is, then it means most likely the driver problem, so we should
return error immediately instead.
Signed-off-by: Alexander E. Patrakov <patrakov(a)gmail.com>
---
As suggested by Takashi Iwai.
src/pcm/pcm_rate.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/pcm/pcm_rate.c b/src/pcm/pcm_rate.c
index 736d558..c76db25 100644
--- a/src/pcm/pcm_rate.c
+++ b/src/pcm/pcm_rate.c
@@ -1069,7 +1069,10 @@ static int snd_pcm_rate_start(snd_pcm_t *pcm)
gettimestamp(&rate->trigger_tstamp, pcm->tstamp_type);
avail = snd_pcm_mmap_playback_hw_avail(rate->gen.slave);
- if (avail <= 0) {
+ if (avail < 0) /* can't happen on healthy drivers */
+ return -EBADFD;
+
+ if (avail == 0) {
/* postpone the trigger since we have no data committed yet */
rate->start_pending = 1;
return 0;
--
2.1.0
1
0

15 Sep '14
Hi all, I have the following code snippet (excerpt from pd-l2ork's
g_audio_alsa.c that was inherited from pure-data--full version available
at https://github.com/pd-l2ork/pd/blob/master/pd/src/s_audio_alsa.c):
if (snd_ctl_open(&ctl, devname, 0) >= 0)
{
snd_ctl_card_info_malloc(&info);
snd_ctl_card_info(ctl, info);
desc = snd_ctl_card_info_get_name(info);
snd_ctl_card_info_free(info);
}
With the said implementation are no crashes or noticeable problems other
than when ran through valgrind, I get the following error report:
==6884== Memcheck, a memory error detector
==6884== Copyright (C) 2002-2011, and GNU GPL'd, by Julian Seward et al.
==6884== Using Valgrind-3.7.0 and LibVEX; rerun with -h for copyright info
==6884== Command: pd-l2ork
==6884==
==6884== Invalid read of size 1
==6884== at 0x719F061: vfprintf (vfprintf.c:1630)
==6884== by 0x725D263: __vsprintf_chk (vsprintf_chk.c:86)
==6884== by 0x725D1AC: __sprintf_chk (sprintf_chk.c:33)
==6884== by 0x51412D: alsa_getdevs (stdio2.h:34)
==6884== by 0x4D84DA: sys_set_audio_settings (s_audio.c:209)
==6884== by 0x4D156A: sys_loadpreferences (s_file.c:375)
==6884== by 0x4CD804: sys_main (s_main.c:288)
==6884== by 0x717576C: (below main) (libc-start.c:226)
==6884== Address 0xc1ac488 is 40 bytes inside a block of size 376 free'd
==6884== at 0x4C2A82E: free (in
/usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so)
==6884== by 0x51410F: alsa_getdevs (s_audio_alsa.c:857)
==6884== by 0x4D84DA: sys_set_audio_settings (s_audio.c:209)
==6884== by 0x4D156A: sys_loadpreferences (s_file.c:375)
==6884== by 0x4CD804: sys_main (s_main.c:288)
==6884== by 0x717576C: (below main) (libc-start.c:226)
==6884==
==6884== Invalid read of size 1
==6884== at 0x71CFDB8: _IO_default_xsputn (genops.c:480)
==6884== by 0x719EC31: vfprintf (vfprintf.c:1630)
==6884== by 0x725D263: __vsprintf_chk (vsprintf_chk.c:86)
==6884== by 0x725D1AC: __sprintf_chk (sprintf_chk.c:33)
==6884== by 0x51412D: alsa_getdevs (stdio2.h:34)
==6884== by 0x4D84DA: sys_set_audio_settings (s_audio.c:209)
==6884== by 0x4D156A: sys_loadpreferences (s_file.c:375)
==6884== by 0x4CD804: sys_main (s_main.c:288)
==6884== by 0x717576C: (below main) (libc-start.c:226)
==6884== Address 0xc1ac488 is 40 bytes inside a block of size 376 free'd
==6884== at 0x4C2A82E: free (in
/usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so)
==6884== by 0x51410F: alsa_getdevs (s_audio_alsa.c:857)
==6884== by 0x4D84DA: sys_set_audio_settings (s_audio.c:209)
==6884== by 0x4D156A: sys_loadpreferences (s_file.c:375)
==6884== by 0x4CD804: sys_main (s_main.c:288)
==6884== by 0x717576C: (below main) (libc-start.c:226)
==6884==
==6884== Invalid read of size 1
==6884== at 0x71CFDC7: _IO_default_xsputn (genops.c:479)
==6884== by 0x719EC31: vfprintf (vfprintf.c:1630)
==6884== by 0x725D263: __vsprintf_chk (vsprintf_chk.c:86)
==6884== by 0x725D1AC: __sprintf_chk (sprintf_chk.c:33)
==6884== by 0x51412D: alsa_getdevs (stdio2.h:34)
==6884== by 0x4D84DA: sys_set_audio_settings (s_audio.c:209)
==6884== by 0x4D156A: sys_loadpreferences (s_file.c:375)
==6884== by 0x4CD804: sys_main (s_main.c:288)
==6884== by 0x717576C: (below main) (libc-start.c:226)
==6884== Address 0xc1ac48a is 42 bytes inside a block of size 376 free'd
==6884== at 0x4C2A82E: free (in
/usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so)
==6884== by 0x51410F: alsa_getdevs (s_audio_alsa.c:857)
==6884== by 0x4D84DA: sys_set_audio_settings (s_audio.c:209)
==6884== by 0x4D156A: sys_loadpreferences (s_file.c:375)
==6884== by 0x4CD804: sys_main (s_main.c:288)
==6884== by 0x717576C: (below main) (libc-start.c:226)
==6884==
==6884== Invalid read of size 1
==6884== at 0x719F061: vfprintf (vfprintf.c:1630)
==6884== by 0x725D263: __vsprintf_chk (vsprintf_chk.c:86)
==6884== by 0x725D1AC: __sprintf_chk (sprintf_chk.c:33)
==6884== by 0x51414B: alsa_getdevs (stdio2.h:34)
==6884== by 0x4D84DA: sys_set_audio_settings (s_audio.c:209)
==6884== by 0x4D156A: sys_loadpreferences (s_file.c:375)
==6884== by 0x4CD804: sys_main (s_main.c:288)
==6884== by 0x717576C: (below main) (libc-start.c:226)
==6884== Address 0xc1ac488 is 40 bytes inside a block of size 376 free'd
==6884== at 0x4C2A82E: free (in
/usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so)
==6884== by 0x51410F: alsa_getdevs (s_audio_alsa.c:857)
==6884== by 0x4D84DA: sys_set_audio_settings (s_audio.c:209)
==6884== by 0x4D156A: sys_loadpreferences (s_file.c:375)
==6884== by 0x4CD804: sys_main (s_main.c:288)
==6884== by 0x717576C: (below main) (libc-start.c:226)
==6884==
==6884== Invalid read of size 1
==6884== at 0x719F061: vfprintf (vfprintf.c:1630)
==6884== by 0x725D263: __vsprintf_chk (vsprintf_chk.c:86)
==6884== by 0x725D1AC: __sprintf_chk (sprintf_chk.c:33)
==6884== by 0x51416A: alsa_getdevs (stdio2.h:34)
==6884== by 0x4D84DA: sys_set_audio_settings (s_audio.c:209)
==6884== by 0x4D156A: sys_loadpreferences (s_file.c:375)
==6884== by 0x4CD804: sys_main (s_main.c:288)
==6884== by 0x717576C: (below main) (libc-start.c:226)
==6884== Address 0xc1ac488 is 40 bytes inside a block of size 376 free'd
==6884== at 0x4C2A82E: free (in
/usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so)
==6884== by 0x51410F: alsa_getdevs (s_audio_alsa.c:857)
==6884== by 0x4D84DA: sys_set_audio_settings (s_audio.c:209)
==6884== by 0x4D156A: sys_loadpreferences (s_file.c:375)
==6884== by 0x4CD804: sys_main (s_main.c:288)
==6884== by 0x717576C: (below main) (libc-start.c:226)
==6884==
==6884== Invalid read of size 1
==6884== at 0x719F061: vfprintf (vfprintf.c:1630)
==6884== by 0x725D263: __vsprintf_chk (vsprintf_chk.c:86)
==6884== by 0x725D1AC: __sprintf_chk (sprintf_chk.c:33)
==6884== by 0x514192: alsa_getdevs (stdio2.h:34)
==6884== by 0x4D84DA: sys_set_audio_settings (s_audio.c:209)
==6884== by 0x4D156A: sys_loadpreferences (s_file.c:375)
==6884== by 0x4CD804: sys_main (s_main.c:288)
==6884== by 0x717576C: (below main) (libc-start.c:226)
==6884== Address 0xc1ac488 is 40 bytes inside a block of size 376 free'd
==6884== at 0x4C2A82E: free (in
/usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so)
==6884== by 0x51410F: alsa_getdevs (s_audio_alsa.c:857)
==6884== by 0x4D84DA: sys_set_audio_settings (s_audio.c:209)
==6884== by 0x4D156A: sys_loadpreferences (s_file.c:375)
==6884== by 0x4CD804: sys_main (s_main.c:288)
==6884== by 0x717576C: (below main) (libc-start.c:226)
==6884==
==6884== Invalid read of size 8
==6884== at 0x71CFD95: _IO_default_xsputn (genops.c:480)
==6884== by 0x719EC31: vfprintf (vfprintf.c:1630)
==6884== by 0x725D263: __vsprintf_chk (vsprintf_chk.c:86)
==6884== by 0x725D1AC: __sprintf_chk (sprintf_chk.c:33)
==6884== by 0x51412D: alsa_getdevs (stdio2.h:34)
==6884== by 0x4D84DA: sys_set_audio_settings (s_audio.c:209)
==6884== by 0x4D156A: sys_loadpreferences (s_file.c:375)
==6884== by 0x4CD804: sys_main (s_main.c:288)
==6884== by 0x717576C: (below main) (libc-start.c:226)
==6884== Address 0xc1ada58 is 40 bytes inside a block of size 376 free'd
==6884== at 0x4C2A82E: free (in
/usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so)
==6884== by 0x51410F: alsa_getdevs (s_audio_alsa.c:857)
==6884== by 0x4D84DA: sys_set_audio_settings (s_audio.c:209)
==6884== by 0x4D156A: sys_loadpreferences (s_file.c:375)
==6884== by 0x4CD804: sys_main (s_main.c:288)
==6884== by 0x717576C: (below main) (libc-start.c:226)
==6884==
The repeating error refers to the line 857 which is
snd_ctl_card_info_free(info);
If I read valgrind error report, it appears there is a double free (???)
error taking place even though there is no other place in that code that
the snd_ctl_card_info_free is being called. Now, the loop does cycle
through all the available alsa devices. Could this be beccause some of
them are invalid and if so, how would one go about detecting that before
calling snd_ctl_card_info_free?
If I comment that line (as it is currently in the linked source file on
git), valgrind does not complain any more but I wonder if this means
there is now a memory leak instead?
Any assistance with this is most appreciated. NB: I am not an alsa dev,
so my knowledge of alsa lib API is rather limited beyond what I've
briefly studied to better understand the aforesaid code snippet.
Best,
--
Ivica Ico Bukvic, D.M.A.
Associate Professor
Computer Music
ICAT Senior Fellow
DISIS, L2Ork
Virginia Tech
School of Performing Arts - 0141
Blacksburg, VA 24061
(540) 231-6139
ico(a)vt.edu
www.performingarts.vt.edu
disis.music.vt.edu
l2ork.music.vt.edu
3
2

[alsa-devel] [PATCH V3] ASoC: fsl_ssi: refine ipg clock usage in this module
by Shengjiu Wang 15 Sep '14
by Shengjiu Wang 15 Sep '14
15 Sep '14
Check if ipg clock is in clock-names property, then we can move the
ipg clock enable and disable operation to startup and shutdown, that
is only enable ipg clock when ssi is working and keep clock is disabled
when ssi is in idle.
But when the checking is failed, remain the clock control as before.
Signed-off-by: Shengjiu Wang <shengjiu.wang(a)freescale.com>
---
V3 change log:
update patch according Nicolin and markus's comments
sound/soc/fsl/fsl_ssi.c | 53 ++++++++++++++++++++++++++++++++++++++++-------
1 file changed, 45 insertions(+), 8 deletions(-)
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index 2fc3e66..6d1dfd5 100644
--- a/sound/soc/fsl/fsl_ssi.c
+++ b/sound/soc/fsl/fsl_ssi.c
@@ -169,6 +169,7 @@ struct fsl_ssi_private {
u8 i2s_mode;
bool use_dma;
bool use_dual_fifo;
+ bool has_ipg_clk_name;
unsigned int fifo_depth;
struct fsl_ssi_rxtx_reg_val rxtx_reg_val;
@@ -530,6 +531,11 @@ static int fsl_ssi_startup(struct snd_pcm_substream *substream,
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct fsl_ssi_private *ssi_private =
snd_soc_dai_get_drvdata(rtd->cpu_dai);
+ int ret;
+
+ ret = clk_prepare_enable(ssi_private->clk);
+ if (ret)
+ return ret;
/* When using dual fifo mode, it is safer to ensure an even period
* size. If appearing to an odd number while DMA always starts its
@@ -544,6 +550,21 @@ static int fsl_ssi_startup(struct snd_pcm_substream *substream,
}
/**
+ * fsl_ssi_shutdown: shutdown the SSI
+ *
+ */
+static void fsl_ssi_shutdown(struct snd_pcm_substream *substream,
+ struct snd_soc_dai *dai)
+{
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
+ struct fsl_ssi_private *ssi_private =
+ snd_soc_dai_get_drvdata(rtd->cpu_dai);
+
+ clk_disable_unprepare(ssi_private->clk);
+
+}
+
+/**
* fsl_ssi_set_bclk - configure Digital Audio Interface bit clock
*
* Note: This function can be only called when using SSI as DAI master
@@ -1043,6 +1064,7 @@ static int fsl_ssi_dai_probe(struct snd_soc_dai *dai)
static const struct snd_soc_dai_ops fsl_ssi_dai_ops = {
.startup = fsl_ssi_startup,
+ .shutdown = fsl_ssi_shutdown,
.hw_params = fsl_ssi_hw_params,
.hw_free = fsl_ssi_hw_free,
.set_fmt = fsl_ssi_set_dai_fmt,
@@ -1168,17 +1190,22 @@ static int fsl_ssi_imx_probe(struct platform_device *pdev,
u32 dmas[4];
int ret;
- ssi_private->clk = devm_clk_get(&pdev->dev, NULL);
+ if (ssi_private->has_ipg_clk_name)
+ ssi_private->clk = devm_clk_get(&pdev->dev, "ipg");
+ else
+ ssi_private->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(ssi_private->clk)) {
ret = PTR_ERR(ssi_private->clk);
dev_err(&pdev->dev, "could not get clock: %d\n", ret);
return ret;
}
- ret = clk_prepare_enable(ssi_private->clk);
- if (ret) {
- dev_err(&pdev->dev, "clk_prepare_enable failed: %d\n", ret);
- return ret;
+ if (!ssi_private->has_ipg_clk_name) {
+ ret = clk_prepare_enable(ssi_private->clk);
+ if (ret) {
+ dev_err(&pdev->dev, "clk_prepare_enable failed: %d\n", ret);
+ return ret;
+ }
}
/* For those SLAVE implementations, we ingore non-baudclk cases
@@ -1236,8 +1263,9 @@ static int fsl_ssi_imx_probe(struct platform_device *pdev,
return 0;
error_pcm:
- clk_disable_unprepare(ssi_private->clk);
+ if (!ssi_private->has_ipg_clk_name)
+ clk_disable_unprepare(ssi_private->clk);
return ret;
}
@@ -1246,7 +1274,8 @@ static void fsl_ssi_imx_clean(struct platform_device *pdev,
{
if (!ssi_private->use_dma)
imx_pcm_fiq_exit(pdev);
- clk_disable_unprepare(ssi_private->clk);
+ if (!ssi_private->has_ipg_clk_name)
+ clk_disable_unprepare(ssi_private->clk);
}
static int fsl_ssi_probe(struct platform_device *pdev)
@@ -1321,8 +1350,16 @@ static int fsl_ssi_probe(struct platform_device *pdev)
return -ENOMEM;
}
- ssi_private->regs = devm_regmap_init_mmio(&pdev->dev, iomem,
+ ret = of_property_match_string(np, "clock-names", "ipg");
+ if (ret < 0) {
+ ssi_private->has_ipg_clk_name = false;
+ ssi_private->regs = devm_regmap_init_mmio(&pdev->dev, iomem,
&fsl_ssi_regconfig);
+ } else {
+ ssi_private->has_ipg_clk_name = true;
+ ssi_private->regs = devm_regmap_init_mmio_clk(&pdev->dev,
+ "ipg", iomem, &fsl_ssi_regconfig);
+ }
if (IS_ERR(ssi_private->regs)) {
dev_err(&pdev->dev, "Failed to init register map\n");
return PTR_ERR(ssi_private->regs);
--
1.7.9.5
4
7

15 Sep '14
Signed-off-by: Takashi Iwai <tiwai(a)suse.de>
---
Documentation/DocBook/writing-an-alsa-driver.tmpl | 28 +++++++++++++++++++----
1 file changed, 23 insertions(+), 5 deletions(-)
diff --git a/Documentation/DocBook/writing-an-alsa-driver.tmpl b/Documentation/DocBook/writing-an-alsa-driver.tmpl
index 6f639d9530b5..784793df81ed 100644
--- a/Documentation/DocBook/writing-an-alsa-driver.tmpl
+++ b/Documentation/DocBook/writing-an-alsa-driver.tmpl
@@ -2742,7 +2742,9 @@ struct _snd_pcm_runtime {
<para>
Another note is that this callback is non-atomic
- (schedulable). This is important, because the
+ (schedulable) as default, i.e. when no
+ <structfield>nonatomic</structfield> flag set.
+ This is important, because the
<structfield>trigger</structfield> callback
is atomic (non-schedulable). That is, mutexes or any
schedule-related functions are not available in
@@ -2900,8 +2902,9 @@ struct _snd_pcm_runtime {
</para>
<para>
- As mentioned, this callback is atomic. You cannot call
- functions which may sleep.
+ As mentioned, this callback is atomic as default unless
+ <structfield>nonatomic</structfield> flag set, and
+ you cannot call functions which may sleep.
The trigger callback should be as minimal as possible,
just really triggering the DMA. The other stuff should be
initialized hw_params and prepare callbacks properly
@@ -2936,7 +2939,7 @@ struct _snd_pcm_runtime {
</para>
<para>
- This callback is also atomic.
+ This callback is also atomic as default.
</para>
</section>
@@ -2972,7 +2975,7 @@ struct _snd_pcm_runtime {
is useful only for such a purpose.
</para>
<para>
- This callback is atomic.
+ This callback is atomic as default.
</para>
</section>
@@ -3175,6 +3178,21 @@ struct _snd_pcm_runtime {
called with local interrupts disabled.
</para>
+ <para>
+ The recent changes in PCM core code, however, allow all PCM
+ operations to be non-atomic. This assumes that the all caller
+ sides are in non-atomic contexts. For example, the function
+ <function>snd_pcm_period_elapsed()</function> is called
+ typically from the interrupt handler. But, if you set up the
+ driver to use a threaded interrupt handler, this call can be in
+ non-atomic context, too. In such a case, you can set
+ <structfield>nonatomic</structfield> filed of
+ <structname>snd_pcm</structname> object after creating it.
+ When this flag is set, mutex and rwsem are used internally in
+ the PCM core instead of spin and rwlocks, so that you can call
+ all PCM functions safely in a non-atomic context.
+ </para>
+
</section>
<section id="pcm-interface-constraints">
<title>Constraints</title>
--
2.1.0
1
0

15 Sep '14
Hi,
here is a v2 patchset for allowing multiple callbacks for hda_jack.
The difference from the previous patchset is typo fixes, more
comments on the return value from snd_hda_jack_detect_enable_callback(),
and the missing check of jack->jack_detect flag.
Takashi
1
7
Hi,
I ran Coverity analysis tool on alsa and found some bugs.
Bug and Patch description
1. Changed file : aserver.c
Socket not closed before returning when bind fails
Community Code:
if (bind(sock, (struct sockaddr *) addr, size) < 0) {
int result = -errno;
SYSERROR("bind failed");
return result;
}
return sock;
}
Recommended Code :
if (bind(sock, (struct sockaddr *) addr, size) < 0) {
int result = -errno;
SYSERROR("bind failed");
close(sock);
return result;
}
return sock;
}
2.Changed file : control_shm.c
Socket not closed before returning when connect fails
Community Code:
if (connect(sock, (struct sockaddr *) addr, size) < 0)
return -errno;
return sock;
}
Recommended Code :
if (connect(sock, (struct sockaddr *) addr, size) < 0){
SYSERR("connect failed");
close(sock);
return -errno;
}
return sock;
}
3.Changed file : pcm_shm.c
Socket not closed before returning when connect fails
Community Code:
if (connect(sock, (struct sockaddr *) addr, size) < 0) {
SYSERR("connect failed");
return -errno;
}
return sock;
}
Recommended Code :
if (connect(sock, (struct sockaddr *) addr, size) < 0) {
SYSERR("connect failed");
close(sock);
return -errno;
}
return sock;
}
PFA patch.
Thanks & Regards,
Renu Tyagi
3
3

[alsa-devel] Possible fix for snd-hda-intel model=no-jd failing since ~linux-3.9-rc1
by Adam Richter 15 Sep '14
by Adam Richter 15 Sep '14
15 Sep '14
Hi.
This is a bug and suggested temporary fix that I originally posted to the linux-sound mailing list about a month and a half ago. I am grateful to Takashi Awai for informing me after my follow-up inquiry about it today that I should submit it to the alsa-devel mailing list instead. Please feel free to redirect me further if appropriate. I did not notice any contact information for sound/pci/hda in
linux-3.16-rc4/MAINATINERS.
Anyhow, here is the bug report and a one line proposed temporary fix.
The "model=no-jd" argument has not initialized the analog audio output jack correctly for me since linux-3.9-rc1 (if I recall correctly) through linux-3.17-rc4, although I have not tried every release candidate in between.
The symptom is that, on a computer with an analog audio output jack
that has incorrect jack sense (a hardware bug), audio output is completely muted until I physically replug the cable, even though I specified "model=no-jd" as an argument to the snd-hda-intel kernel module, which is supposed to cause the kernel to ignore the jack sense reported by hardware and just drive the audio output even if the hardware jack sense indicates nothing is plugged in. This problem did not occur until approximate Linux 3.9-rc1.
I have found a few single line workarounds that work, of which my
favorite is the following (also attached to this email, in case any
mailer subjects this message to reformatting), because it does not add
code to anything that gets called frequently.
--- linux-3.17.0-rc4-64bit/sound/pci/hda/hda_jack.c.orig 2014-09-07 16:09:43.000000000 -0700
+++ linux-3.17.0-rc4-64bit/sound/pci/hda/hda_jack.c 2014-09-10 18:41:53.422900040 -0700
@@ -106,6 +106,7 @@ snd_hda_jack_tbl_new(struct hda_codec *c
jack->nid = nid;
jack->jack_dirty = 1;
jack->tag = codec->jacktbl.used;
+ jack->phantom_jack = codec->no_jack_detect;
return jack;
}
EXPORT_SYMBOL_GPL(snd_hda_jack_tbl_new);
Signed-off-by: Adam J. Richter <adam_richter2004(a)yahoo.com>
I consider this a workaround rather than than a perfect fix, because I
think the underlying problem seems to be some kind of initialization
order issue that I don't fully understand. Basically, by the time
jack->phantom_jack was being set, some caller had already called
jack_detect_update(), which loaded the incorrect jack sense result
from hardware and cleared jack->jack_dirty, so the jack sense would
not be set again. At least that is what I think the underlying
problem probably is.
Also, if a change like this is to be integrated, I'd like to know if
it might be better for the line that I added to be:
jack->phantom_jack = !is_jack_detectable(codec, nid);
...which is what add_jack_kctl does (not sure why add_jack_kctls does
not, by the way, at the risk of making a spectacle of my ignorance).
My doubt about this approach is that perhaps is_jack_detectable()
relies on some initialization that has not occurred at that point.
Anyhow, I'd like to get the process started of either pushing this
change upstream or quickly developing a more correct fix. If a more
correct fix does not become apparent in the next few days, I would
recommend pushing the workaround upstream now until some future code
cleanup, so people will no longer be effected by the bug.
Any technical input or advice on how to proceed is welcome. Thanks
for taking the time to consider this.
Adam Richter
3
12

15 Sep '14
pr_* macros replaced with dev_* as they are more preffered over pr_*.
Signed-off-by: Sudip Mukherjee <sudip(a)vectorindia.org>
---
sound/pci/ctxfi/ctamixer.c | 6 ++++--
sound/pci/ctxfi/ctatc.c | 23 ++++++++++++++---------
sound/pci/ctxfi/ctdaio.c | 3 ++-
sound/pci/ctxfi/cthw20k1.c | 13 ++++++++-----
sound/pci/ctxfi/cthw20k2.c | 22 ++++++++++++++--------
sound/pci/ctxfi/ctmixer.c | 6 ++++--
sound/pci/ctxfi/ctpcm.c | 3 ++-
sound/pci/ctxfi/ctresource.c | 20 +++++++++++++-------
sound/pci/ctxfi/ctsrc.c | 6 ++++--
sound/pci/ctxfi/xfi.c | 15 +++++++++------
10 files changed, 74 insertions(+), 43 deletions(-)
diff --git a/sound/pci/ctxfi/ctamixer.c b/sound/pci/ctxfi/ctamixer.c
index fed6e6a..d08b8b6 100644
--- a/sound/pci/ctxfi/ctamixer.c
+++ b/sound/pci/ctxfi/ctamixer.c
@@ -258,7 +258,8 @@ static int get_amixer_rsc(struct amixer_mgr *mgr,
}
spin_unlock_irqrestore(&mgr->mgr_lock, flags);
if (err) {
- pr_err("ctxfi: Can't meet AMIXER resource request!\n");
+ dev_err(&(((struct hw *)(mgr->mgr.hw))->pci->dev),
+ "ctxfi: Can't meet AMIXER resource request!\n");
goto error;
}
@@ -411,7 +412,8 @@ static int get_sum_rsc(struct sum_mgr *mgr,
}
spin_unlock_irqrestore(&mgr->mgr_lock, flags);
if (err) {
- pr_err("ctxfi: Can't meet SUM resource request!\n");
+ dev_err(&(((struct hw *)(mgr->mgr.hw))->pci->dev),
+ "ctxfi: Can't meet SUM resource request!\n");
goto error;
}
diff --git a/sound/pci/ctxfi/ctatc.c b/sound/pci/ctxfi/ctatc.c
index d92a08c..131b8d4 100644
--- a/sound/pci/ctxfi/ctatc.c
+++ b/sound/pci/ctxfi/ctatc.c
@@ -1282,7 +1282,8 @@ static int atc_identify_card(struct ct_atc *atc, unsigned int ssid)
p = snd_pci_quirk_lookup_id(vendor_id, device_id, list);
if (p) {
if (p->value < 0) {
- pr_err("ctxfi: Device %04x:%04x is black-listed\n",
+ dev_err(&atc->pci->dev,
+ "ctxfi: Device %04x:%04x is black-listed\n",
vendor_id, device_id);
return -ENOENT;
}
@@ -1314,7 +1315,8 @@ int ct_atc_create_alsa_devs(struct ct_atc *atc)
err = alsa_dev_funcs[i].create(atc, i,
alsa_dev_funcs[i].public_name);
if (err) {
- pr_err("ctxfi: Creating alsa device %d failed!\n", i);
+ dev_err(&atc->pci->dev,
+ "ctxfi: Creating alsa device %d failed!\n", i);
return err;
}
}
@@ -1330,7 +1332,7 @@ static int atc_create_hw_devs(struct ct_atc *atc)
err = create_hw_obj(atc->pci, atc->chip_type, atc->model, &hw);
if (err) {
- pr_err("Failed to create hw obj!!!\n");
+ dev_err(&atc->pci->dev, "Failed to create hw obj!!!\n");
return err;
}
atc->hw = hw;
@@ -1349,7 +1351,8 @@ static int atc_create_hw_devs(struct ct_atc *atc)
err = rsc_mgr_funcs[i].create(atc->hw, &atc->rsc_mgrs[i]);
if (err) {
- pr_err("ctxfi: Failed to create rsc_mgr %d!!!\n", i);
+ dev_err(&atc->pci->dev,
+ "ctxfi: Failed to create rsc_mgr %d!!!\n", i);
return err;
}
}
@@ -1396,7 +1399,8 @@ static int atc_get_resources(struct ct_atc *atc)
err = daio_mgr->get_daio(daio_mgr, &da_desc,
(struct daio **)&atc->daios[i]);
if (err) {
- pr_err("ctxfi: Failed to get DAIO resource %d!!!\n",
+ dev_err(&atc->pci->dev,
+ "ctxfi: Failed to get DAIO resource %d!!!\n",
i);
return err;
}
@@ -1600,7 +1604,8 @@ static int atc_resume(struct ct_atc *atc)
/* Do hardware resume. */
err = atc_hw_resume(atc);
if (err < 0) {
- pr_err("ctxfi: pci_enable_device failed, disabling device\n");
+ dev_err(&atc->pci->dev,
+ "ctxfi: pci_enable_device failed, disabling device\n");
snd_card_disconnect(atc->card);
return err;
}
@@ -1697,7 +1702,7 @@ int ct_atc_create(struct snd_card *card, struct pci_dev *pci,
/* Find card model */
err = atc_identify_card(atc, ssid);
if (err < 0) {
- pr_err("ctatc: Card not recognised\n");
+ dev_err(&pci->dev, "ctatc: Card not recognised\n");
goto error1;
}
@@ -1713,7 +1718,7 @@ int ct_atc_create(struct snd_card *card, struct pci_dev *pci,
err = ct_mixer_create(atc, (struct ct_mixer **)&atc->mixer);
if (err) {
- pr_err("ctxfi: Failed to create mixer obj!!!\n");
+ dev_err(&pci->dev, "ctxfi: Failed to create mixer obj!!!\n");
goto error1;
}
@@ -1740,6 +1745,6 @@ int ct_atc_create(struct snd_card *card, struct pci_dev *pci,
error1:
ct_atc_destroy(atc);
- pr_err("ctxfi: Something wrong!!!\n");
+ dev_err(&pci->dev, "ctxfi: Something wrong!!!\n");
return err;
}
diff --git a/sound/pci/ctxfi/ctdaio.c b/sound/pci/ctxfi/ctdaio.c
index 6f0654e..fd64c95 100644
--- a/sound/pci/ctxfi/ctdaio.c
+++ b/sound/pci/ctxfi/ctdaio.c
@@ -541,7 +541,8 @@ static int get_daio_rsc(struct daio_mgr *mgr,
err = daio_mgr_get_rsc(&mgr->mgr, desc->type);
spin_unlock_irqrestore(&mgr->mgr_lock, flags);
if (err) {
- pr_err("Can't meet DAIO resource request!\n");
+ dev_err(&(((struct hw *)(mgr->mgr.hw))->pci->dev),
+ "Can't meet DAIO resource request!\n");
return err;
}
diff --git a/sound/pci/ctxfi/cthw20k1.c b/sound/pci/ctxfi/cthw20k1.c
index 71d496f..a3d1dda 100644
--- a/sound/pci/ctxfi/cthw20k1.c
+++ b/sound/pci/ctxfi/cthw20k1.c
@@ -1268,7 +1268,8 @@ static int hw_trn_init(struct hw *hw, const struct trn_conf *info)
/* Set up device page table */
if ((~0UL) == info->vm_pgt_phys) {
- pr_err("Wrong device page table page address!\n");
+ dev_err(&hw->pci->dev,
+ "Wrong device page table page address!\n");
return -1;
}
@@ -1327,7 +1328,7 @@ static int hw_pll_init(struct hw *hw, unsigned int rsr)
mdelay(40);
}
if (i >= 3) {
- pr_alert("PLL initialization failed!!!\n");
+ dev_alert(&hw->pci->dev, "PLL initialization failed!!!\n");
return -EBUSY;
}
@@ -1351,7 +1352,7 @@ static int hw_auto_init(struct hw *hw)
break;
}
if (!get_field(gctl, GCTL_AID)) {
- pr_alert("Card Auto-init failed!!!\n");
+ dev_alert(&hw->pci->dev, "Card Auto-init failed!!!\n");
return -EBUSY;
}
@@ -1911,7 +1912,8 @@ static int hw_card_start(struct hw *hw)
/* Set DMA transfer mask */
if (pci_set_dma_mask(pci, CT_XFI_DMA_MASK) < 0 ||
pci_set_consistent_dma_mask(pci, CT_XFI_DMA_MASK) < 0) {
- pr_err("architecture does not support PCI busmaster DMA with mask 0x%llx\n",
+ dev_err(&pci->dev,
+ "architecture does not support PCI busmaster DMA with mask 0x%llx\n",
CT_XFI_DMA_MASK);
err = -ENXIO;
goto error1;
@@ -1941,7 +1943,8 @@ static int hw_card_start(struct hw *hw)
err = request_irq(pci->irq, ct_20k1_interrupt, IRQF_SHARED,
KBUILD_MODNAME, hw);
if (err < 0) {
- pr_err("XFi: Cannot get irq %d\n", pci->irq);
+ dev_err(&pci->dev, "XFi: Cannot get irq %d\n",
+ pci->irq);
goto error2;
}
hw->irq = pci->irq;
diff --git a/sound/pci/ctxfi/cthw20k2.c b/sound/pci/ctxfi/cthw20k2.c
index df2d8c5..a65f3bb 100644
--- a/sound/pci/ctxfi/cthw20k2.c
+++ b/sound/pci/ctxfi/cthw20k2.c
@@ -1187,7 +1187,8 @@ static int hw_daio_init(struct hw *hw, const struct daio_conf *info)
hw_write_20kx(hw, AUDIO_IO_TX_BLRCLK, 0x21212121);
hw_write_20kx(hw, AUDIO_IO_RX_BLRCLK, 0);
} else {
- pr_alert("ctxfi: ERROR!!! Invalid sampling rate!!!\n");
+ dev_alert(&hw->pci->dev,
+ "ctxfi: ERROR!!! Invalid sampling rate!!!\n");
return -EINVAL;
}
@@ -1246,7 +1247,8 @@ static int hw_trn_init(struct hw *hw, const struct trn_conf *info)
/* Set up device page table */
if ((~0UL) == info->vm_pgt_phys) {
- pr_alert("ctxfi: Wrong device page table page address!!!\n");
+ dev_alert(&hw->pci->dev,
+ "ctxfi: Wrong device page table page address!!!\n");
return -1;
}
@@ -1351,7 +1353,8 @@ static int hw_pll_init(struct hw *hw, unsigned int rsr)
break;
}
if (i >= 1000) {
- pr_alert("ctxfi: PLL initialization failed!!!\n");
+ dev_alert(&hw->pci->dev,
+ "ctxfi: PLL initialization failed!!!\n");
return -EBUSY;
}
@@ -1375,7 +1378,7 @@ static int hw_auto_init(struct hw *hw)
break;
}
if (!get_field(gctl, GCTL_AID)) {
- pr_alert("ctxfi: Card Auto-init failed!!!\n");
+ dev_alert(&hw->pci->dev, "ctxfi: Card Auto-init failed!!!\n");
return -EBUSY;
}
@@ -1846,7 +1849,7 @@ static int hw_adc_init(struct hw *hw, const struct adc_conf *info)
/* Initialize I2C */
err = hw20k2_i2c_init(hw, 0x1A, 1, 1);
if (err < 0) {
- pr_alert("ctxfi: Failure to acquire I2C!!!\n");
+ dev_alert(&hw->pci->dev, "ctxfi: Failure to acquire I2C!!!\n");
goto error;
}
@@ -1889,7 +1892,8 @@ static int hw_adc_init(struct hw *hw, const struct adc_conf *info)
hw20k2_i2c_write(hw, MAKE_WM8775_ADDR(WM8775_MMC, 0x0A),
MAKE_WM8775_DATA(0x0A));
} else {
- pr_alert("ctxfi: Invalid master sampling rate (msr %d)!!!\n",
+ dev_alert(&hw->pci->dev,
+ "ctxfi: Invalid master sampling rate (msr %d)!!!\n",
info->msr);
err = -EINVAL;
goto error;
@@ -2033,7 +2037,8 @@ static int hw_card_start(struct hw *hw)
/* Set DMA transfer mask */
if (pci_set_dma_mask(pci, CT_XFI_DMA_MASK) < 0 ||
pci_set_consistent_dma_mask(pci, CT_XFI_DMA_MASK) < 0) {
- pr_err("ctxfi: architecture does not support PCI busmaster DMA with mask 0x%llx\n",
+ dev_err(&pci->dev,
+ "ctxfi: architecture does not support PCI busmaster DMA with mask 0x%llx\n",
CT_XFI_DMA_MASK);
err = -ENXIO;
goto error1;
@@ -2062,7 +2067,8 @@ static int hw_card_start(struct hw *hw)
err = request_irq(pci->irq, ct_20k2_interrupt, IRQF_SHARED,
KBUILD_MODNAME, hw);
if (err < 0) {
- pr_err("XFi: Cannot get irq %d\n", pci->irq);
+ dev_err(&pci->dev, "XFi: Cannot get irq %d\n",
+ pci->irq);
goto error2;
}
hw->irq = pci->irq;
diff --git a/sound/pci/ctxfi/ctmixer.c b/sound/pci/ctxfi/ctmixer.c
index 017fa91..6807ff1fc 100644
--- a/sound/pci/ctxfi/ctmixer.c
+++ b/sound/pci/ctxfi/ctmixer.c
@@ -854,7 +854,8 @@ static int ct_mixer_get_resources(struct ct_mixer *mixer)
for (i = 0; i < (NUM_CT_SUMS * CHN_NUM); i++) {
err = sum_mgr->get_sum(sum_mgr, &sum_desc, &sum);
if (err) {
- pr_err("ctxfi:Failed to get sum resources for front output!\n");
+ dev_err(&mixer->atc->pci->dev,
+ "ctxfi:Failed to get sum resources for front output!\n");
break;
}
mixer->sums[i] = sum;
@@ -868,7 +869,8 @@ static int ct_mixer_get_resources(struct ct_mixer *mixer)
for (i = 0; i < (NUM_CT_AMIXERS * CHN_NUM); i++) {
err = amixer_mgr->get_amixer(amixer_mgr, &am_desc, &amixer);
if (err) {
- pr_err("ctxfi:Failed to get amixer resources for mixer obj!\n");
+ dev_err(&mixer->atc->pci->dev,
+ "ctxfi:Failed to get amixer resources for mixer obj!\n");
break;
}
mixer->amixers[i] = amixer;
diff --git a/sound/pci/ctxfi/ctpcm.c b/sound/pci/ctxfi/ctpcm.c
index 6826c2c..48f58a5 100644
--- a/sound/pci/ctxfi/ctpcm.c
+++ b/sound/pci/ctxfi/ctpcm.c
@@ -435,7 +435,8 @@ int ct_alsa_pcm_create(struct ct_atc *atc,
err = snd_pcm_new(atc->card, "ctxfi", device,
playback_count, capture_count, &pcm);
if (err < 0) {
- pr_err("ctxfi: snd_pcm_new failed!! Err=%d\n", err);
+ dev_err(&atc->pci->dev, "ctxfi: snd_pcm_new failed!! Err=%d\n",
+ err);
return err;
}
diff --git a/sound/pci/ctxfi/ctresource.c b/sound/pci/ctxfi/ctresource.c
index e49d2be..80beecb 100644
--- a/sound/pci/ctxfi/ctresource.c
+++ b/sound/pci/ctxfi/ctresource.c
@@ -162,12 +162,14 @@ int rsc_init(struct rsc *rsc, u32 idx, enum RSCTYP type, u32 msr, void *hw)
case DAIO:
break;
default:
- pr_err("ctxfi: Invalid resource type value %d!\n", type);
+ dev_err(&(((struct hw *)hw)->pci->dev),
+ "ctxfi: Invalid resource type value %d!\n", type);
return -EINVAL;
}
if (err) {
- pr_err("ctxfi: Failed to get resource control block!\n");
+ dev_err(&(((struct hw *)hw)->pci->dev),
+ "ctxfi: Failed to get resource control block!\n");
return err;
}
@@ -190,7 +192,8 @@ int rsc_uninit(struct rsc *rsc)
case DAIO:
break;
default:
- pr_err("ctxfi: Invalid resource type value %d!\n",
+ dev_err(&(((struct hw *)rsc->hw)->pci->dev),
+ "ctxfi: Invalid resource type value %d!\n",
rsc->type);
break;
}
@@ -233,13 +236,15 @@ int rsc_mgr_init(struct rsc_mgr *mgr, enum RSCTYP type,
case SUM:
break;
default:
- pr_err("ctxfi: Invalid resource type value %d!\n", type);
+ dev_err(&hw->pci->dev,
+ "ctxfi: Invalid resource type value %d!\n", type);
err = -EINVAL;
goto error;
}
if (err) {
- pr_err("ctxfi: Failed to get manager control block!\n");
+ dev_err(&hw->pci->dev,
+ "ctxfi: Failed to get manager control block!\n");
goto error;
}
@@ -282,8 +287,9 @@ int rsc_mgr_uninit(struct rsc_mgr *mgr)
case SUM:
break;
default:
- pr_err("ctxfi: Invalid resource type value %d!\n",
- mgr->type);
+ dev_err(&(((struct hw *)mgr->hw)->pci->dev),
+ "ctxfi: Invalid resource type value %d!\n",
+ mgr->type);
break;
}
diff --git a/sound/pci/ctxfi/ctsrc.c b/sound/pci/ctxfi/ctsrc.c
index 19df9b4..3a6e398 100644
--- a/sound/pci/ctxfi/ctsrc.c
+++ b/sound/pci/ctxfi/ctsrc.c
@@ -431,7 +431,8 @@ get_src_rsc(struct src_mgr *mgr, const struct src_desc *desc, struct src **rsrc)
spin_unlock_irqrestore(&mgr->mgr_lock, flags);
if (err) {
- pr_err("ctxfi: Can't meet SRC resource request!\n");
+ dev_err(&(((struct hw *)(mgr->mgr.hw))->pci->dev),
+ "ctxfi: Can't meet SRC resource request!\n");
return err;
}
@@ -739,7 +740,8 @@ static int get_srcimp_rsc(struct srcimp_mgr *mgr,
}
spin_unlock_irqrestore(&mgr->mgr_lock, flags);
if (err) {
- pr_err("ctxfi: Can't meet SRCIMP resource request!\n");
+ dev_err(&(((struct hw *)(mgr->mgr.hw))->pci->dev),
+ "ctxfi: Can't meet SRCIMP resource request!\n");
goto error1;
}
diff --git a/sound/pci/ctxfi/xfi.c b/sound/pci/ctxfi/xfi.c
index 35e85ba..10c7896 100644
--- a/sound/pci/ctxfi/xfi.c
+++ b/sound/pci/ctxfi/xfi.c
@@ -76,15 +76,18 @@ ct_card_probe(struct pci_dev *pci, const struct pci_device_id *pci_id)
if (err)
return err;
if ((reference_rate != 48000) && (reference_rate != 44100)) {
- pr_err("ctxfi: Invalid reference_rate value %u!!!\n",
- reference_rate);
- pr_err("ctxfi: The valid values for reference_rate are 48000 and 44100, Value 48000 is assumed.\n");
+ dev_err(&pci->dev,
+ "ctxfi: Invalid reference_rate value %u!!\n",
+ reference_rate);
+ dev_err(&pci->dev,
+ "ctxfi: The valid values for reference_rate are 48000 and 44100, Value 48000 is assumed.\n");
reference_rate = 48000;
}
if ((multiple != 1) && (multiple != 2) && (multiple != 4)) {
- pr_err("ctxfi: Invalid multiple value %u!!!\n",
- multiple);
- pr_err("ctxfi: The valid values for multiple are 1, 2 and 4, Value 2 is assumed.\n");
+ dev_err(&pci->dev, "ctxfi: Invalid multiple value %u!!!\n",
+ multiple);
+ dev_err(&pci->dev,
+ "ctxfi: The valid values for multiple are 1, 2 and 4, Value 2 is assumed.\n");
multiple = 2;
}
err = ct_atc_create(card, pci, reference_rate, multiple,
--
1.8.1.2
2
1

[alsa-devel] The best practice to tie platform DAPM widget and codec pin
by Anatol Pomozov 13 Sep '14
by Anatol Pomozov 13 Sep '14
13 Sep '14
Hi
I bringing up a board that has Realtek 5677 codec. The codec has 6
gpios and two of them are used by the board. pin3 is used to enable
headphones amplifier. pin2 is used to gate DMIC clock for 3 of 4 DMICs
- it allows to leave only one DMIC working in low-power mode.
Now I need to configure the codec that when "Headphones" audio path is
enabled then pin3 should go high. The same true for DMIC/pin2. I was
looking for existing similar solutions but cannot find one.
I need something similar to SND_SOC_DAPM_REGULATOR_SUPPLY that allows
to turn on/off part of the system. But instead of manipulating a
voltage regulator I just need to set/unset codec's gpio. What would be
the best way to achieve it?
The problem here is that codec does not know which of the outputs
(LOUT1, LOUT2, LOUT3) corresponds to headphones. It is configured as
audio path in *.dts file.
2
2

12 Sep '14
Add SND_SOC_DAIFMT_CBM_CFS support for Freescale architecture.
Successfully tested on i.MX 6Quad Wandboard and UDOO boards connected to
the pcm1792a codec.
In CBM_CFS mode, when using a sample size of 16 bits, we cannot use
CCSR_SSI_SCR_I2S_MODE_MASTER since we get a frame sync every 16 bits.
Signed-off-by: Michael Trimarchi <michael(a)amarulasolutions.com>
Signed-off-by: Fabio Falzoi <fabio.falzoi84(a)gmail.com>
Tested-by: Angelo Adamo <adamo.a60(a)gmail.com>
---
sound/soc/fsl/fsl_ssi.c | 33 ++++++++++++++++++++++++++++-----
1 file changed, 28 insertions(+), 5 deletions(-)
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index 87eb577..2fc3e66 100644
--- a/sound/soc/fsl/fsl_ssi.c
+++ b/sound/soc/fsl/fsl_ssi.c
@@ -259,6 +259,11 @@ static bool fsl_ssi_is_i2s_master(struct fsl_ssi_private *ssi_private)
SND_SOC_DAIFMT_CBS_CFS;
}
+static bool fsl_ssi_is_i2s_cbm_cfs(struct fsl_ssi_private *ssi_private)
+{
+ return (ssi_private->dai_fmt & SND_SOC_DAIFMT_MASTER_MASK) ==
+ SND_SOC_DAIFMT_CBM_CFS;
+}
/**
* fsl_ssi_isr: SSI interrupt handler
*
@@ -705,6 +710,23 @@ static int fsl_ssi_hw_params(struct snd_pcm_substream *substream,
}
}
+ if (!fsl_ssi_is_ac97(ssi_private)) {
+ u8 i2smode;
+ /*
+ * Switch to normal net mode in order to have a frame sync
+ * signal every 32 bits instead of 16 bits
+ */
+ if (fsl_ssi_is_i2s_cbm_cfs(ssi_private) && sample_size == 16)
+ i2smode = CCSR_SSI_SCR_I2S_MODE_NORMAL |
+ CCSR_SSI_SCR_NET;
+ else
+ i2smode = ssi_private->i2s_mode;
+
+ regmap_update_bits(regs, CCSR_SSI_SCR,
+ CCSR_SSI_SCR_NET | CCSR_SSI_SCR_I2S_MODE_MASK,
+ channels == 1 ? 0 : i2smode);
+ }
+
/*
* FIXME: The documentation says that SxCCR[WL] should not be
* modified while the SSI is enabled. The only time this can
@@ -724,11 +746,6 @@ static int fsl_ssi_hw_params(struct snd_pcm_substream *substream,
regmap_update_bits(regs, CCSR_SSI_SRCCR, CCSR_SSI_SxCCR_WL_MASK,
wl);
- if (!fsl_ssi_is_ac97(ssi_private))
- regmap_update_bits(regs, CCSR_SSI_SCR,
- CCSR_SSI_SCR_NET | CCSR_SSI_SCR_I2S_MODE_MASK,
- channels == 1 ? 0 : ssi_private->i2s_mode);
-
return 0;
}
@@ -780,6 +797,7 @@ static int _fsl_ssi_set_dai_fmt(struct fsl_ssi_private *ssi_private,
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
case SND_SOC_DAIFMT_I2S:
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
+ case SND_SOC_DAIFMT_CBM_CFS:
case SND_SOC_DAIFMT_CBS_CFS:
ssi_private->i2s_mode |= CCSR_SSI_SCR_I2S_MODE_MASTER;
regmap_update_bits(regs, CCSR_SSI_STCCR,
@@ -853,6 +871,11 @@ static int _fsl_ssi_set_dai_fmt(struct fsl_ssi_private *ssi_private,
case SND_SOC_DAIFMT_CBM_CFM:
scr &= ~CCSR_SSI_SCR_SYS_CLK_EN;
break;
+ case SND_SOC_DAIFMT_CBM_CFS:
+ strcr &= ~CCSR_SSI_STCR_TXDIR;
+ strcr |= CCSR_SSI_STCR_TFDIR;
+ scr &= ~CCSR_SSI_SCR_SYS_CLK_EN;
+ break;
default:
return -EINVAL;
}
--
2.0.0
5
8

[alsa-devel] [PATCH v2 0/2] ASoC/ARM: tegra: apalis/colibri t30: sgtl5000 audio
by Marcel Ziswiler 12 Sep '14
by Marcel Ziswiler 12 Sep '14
12 Sep '14
This series adds/integrates Freescale SGTL5000 analogue audio codec
support.
Changes in v2:
- Using simple-audio-card as suggested by Fabio.
Marcel Ziswiler (2):
ARM: tegra: apalis/colibri t30: integrate audio support
ARM: tegra: enable sgtl5000 audio
arch/arm/boot/dts/tegra30-apalis.dtsi | 65 ++++++++++++++++++++++++++++++++++
arch/arm/boot/dts/tegra30-colibri.dtsi | 65 ++++++++++++++++++++++++++++++++++
arch/arm/configs/tegra_defconfig | 2 ++
3 files changed, 132 insertions(+)
--
1.9.3
2
4

[alsa-devel] [PATCH V2] ASoC: fsl_ssi: refine ipg clock usage in this module
by Shengjiu Wang 12 Sep '14
by Shengjiu Wang 12 Sep '14
12 Sep '14
Move the ipg clock enable and disable operation to startup and shutdown,
that is only enable ipg clock when ssi is working. Keep clock is disabled
when ssi is in idle.
otherwise, _fsl_ssi_set_dai_fmt function need to be called in probe,
so add ipg clock control for it.
Signed-off-by: Shengjiu Wang <shengjiu.wang(a)freescale.com>
---
change log
v2: update patch according to maintainer's review comments.
sound/soc/fsl/fsl_ssi.c | 39 +++++++++++++++++++++++++++++++--------
1 file changed, 31 insertions(+), 8 deletions(-)
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index 2fc3e66..4447f95 100644
--- a/sound/soc/fsl/fsl_ssi.c
+++ b/sound/soc/fsl/fsl_ssi.c
@@ -530,6 +530,11 @@ static int fsl_ssi_startup(struct snd_pcm_substream *substream,
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct fsl_ssi_private *ssi_private =
snd_soc_dai_get_drvdata(rtd->cpu_dai);
+ int ret;
+
+ ret = clk_prepare_enable(ssi_private->clk);
+ if (ret)
+ return ret;
/* When using dual fifo mode, it is safer to ensure an even period
* size. If appearing to an odd number while DMA always starts its
@@ -544,6 +549,21 @@ static int fsl_ssi_startup(struct snd_pcm_substream *substream,
}
/**
+ * fsl_ssi_shutdown: shutdown the SSI
+ *
+ */
+static void fsl_ssi_shutdown(struct snd_pcm_substream *substream,
+ struct snd_soc_dai *dai)
+{
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
+ struct fsl_ssi_private *ssi_private =
+ snd_soc_dai_get_drvdata(rtd->cpu_dai);
+
+ clk_disable_unprepare(ssi_private->clk);
+
+}
+
+/**
* fsl_ssi_set_bclk - configure Digital Audio Interface bit clock
*
* Note: This function can be only called when using SSI as DAI master
@@ -771,6 +791,7 @@ static int _fsl_ssi_set_dai_fmt(struct fsl_ssi_private *ssi_private,
struct regmap *regs = ssi_private->regs;
u32 strcr = 0, stcr, srcr, scr, mask;
u8 wm;
+ int ret;
ssi_private->dai_fmt = fmt;
@@ -779,6 +800,10 @@ static int _fsl_ssi_set_dai_fmt(struct fsl_ssi_private *ssi_private,
return -EINVAL;
}
+ ret = clk_prepare_enable(ssi_private->clk);
+ if (ret)
+ return ret;
+
fsl_ssi_setup_reg_vals(ssi_private);
regmap_read(regs, CCSR_SSI_SCR, &scr);
@@ -811,6 +836,7 @@ static int _fsl_ssi_set_dai_fmt(struct fsl_ssi_private *ssi_private,
ssi_private->i2s_mode |= CCSR_SSI_SCR_I2S_MODE_SLAVE;
break;
default:
+ clk_disable_unprepare(ssi_private->clk);
return -EINVAL;
}
@@ -836,6 +862,7 @@ static int _fsl_ssi_set_dai_fmt(struct fsl_ssi_private *ssi_private,
ssi_private->i2s_mode |= CCSR_SSI_SCR_I2S_MODE_NORMAL;
break;
default:
+ clk_disable_unprepare(ssi_private->clk);
return -EINVAL;
}
scr |= ssi_private->i2s_mode;
@@ -859,6 +886,7 @@ static int _fsl_ssi_set_dai_fmt(struct fsl_ssi_private *ssi_private,
strcr ^= CCSR_SSI_STCR_TFSI;
break;
default:
+ clk_disable_unprepare(ssi_private->clk);
return -EINVAL;
}
@@ -877,6 +905,7 @@ static int _fsl_ssi_set_dai_fmt(struct fsl_ssi_private *ssi_private,
scr &= ~CCSR_SSI_SCR_SYS_CLK_EN;
break;
default:
+ clk_disable_unprepare(ssi_private->clk);
return -EINVAL;
}
@@ -925,6 +954,7 @@ static int _fsl_ssi_set_dai_fmt(struct fsl_ssi_private *ssi_private,
if (fmt & SND_SOC_DAIFMT_AC97)
fsl_ssi_setup_ac97(ssi_private);
+ clk_disable_unprepare(ssi_private->clk);
return 0;
}
@@ -1043,6 +1073,7 @@ static int fsl_ssi_dai_probe(struct snd_soc_dai *dai)
static const struct snd_soc_dai_ops fsl_ssi_dai_ops = {
.startup = fsl_ssi_startup,
+ .shutdown = fsl_ssi_shutdown,
.hw_params = fsl_ssi_hw_params,
.hw_free = fsl_ssi_hw_free,
.set_fmt = fsl_ssi_set_dai_fmt,
@@ -1175,12 +1206,6 @@ static int fsl_ssi_imx_probe(struct platform_device *pdev,
return ret;
}
- ret = clk_prepare_enable(ssi_private->clk);
- if (ret) {
- dev_err(&pdev->dev, "clk_prepare_enable failed: %d\n", ret);
- return ret;
- }
-
/* For those SLAVE implementations, we ingore non-baudclk cases
* and, instead, abandon MASTER mode that needs baud clock.
*/
@@ -1236,7 +1261,6 @@ static int fsl_ssi_imx_probe(struct platform_device *pdev,
return 0;
error_pcm:
- clk_disable_unprepare(ssi_private->clk);
return ret;
}
@@ -1246,7 +1270,6 @@ static void fsl_ssi_imx_clean(struct platform_device *pdev,
{
if (!ssi_private->use_dma)
imx_pcm_fiq_exit(pdev);
- clk_disable_unprepare(ssi_private->clk);
}
static int fsl_ssi_probe(struct platform_device *pdev)
--
1.7.9.5
4
8
hi all:
My kernel is 3.8.0.
and when I plug in "microsoft LifeCam", I get message at the end of
mail about cannot get min/max values from camera.
is there any usb audio class initial sequence we need to check when
this message pop out?
Appreciate your help in advance,
usb 3-1: new high-speed USB device number 2 using Platform-ehci
Platform-ehci Platform-ehci.0: port 1 reset complete, port enabled
Platform-ehci Platform-ehci.0: GetStatus port:1 status 00000d 0 ACK
sig=se0 PEC PE CONNECT
usb 3-1: skipped 1 descriptor after configuration
usb 3-1: skipped 6 descriptors after interface
usb 3-1: skipped 1 descriptor after endpoint
usb 3-1: skipped 28 descriptors after interface
usb 3-1: skipped 1 descriptor after endpoint
usb 3-1: skipped 4 descriptors after interface
usb 3-1: skipped 2 descriptors after interface
usb 3-1: skipped 1 descriptor after endpoint
usb 3-1: default language 0x0409
usb 3-1: udev 2, busnum 3, minor = 257
usb 3-1: New USB device found, idVendor=045e, idProduct=075d
usb 3-1: New USB device strings: Mfr=1, Product=2, SerialNumber=0
usb 3-1: Product: Microsoft® LifeCam Cinema(TM)
usb 3-1: Manufacturer: Microsoft
usb 3-1: usb_probe_device
usb 3-1: configuration #1 chosen from 1 choice
usb 3-1: adding 3-1:1.0 (config #1, interface 0)
uvcvideo 3-1:1.0: usb_probe_interface
uvcvideo 3-1:1.0: usb_probe_interface - got id
uvcvideo: Found UVC 1.00 device Microsoft® LifeCam Cinema(TM) (045e:075d)
input: Microsoft® LifeCam Cinema(TM) as
/devices/platform/Platform-ehci.0/usb3/3-1/3-1:1.0/input/input4
usb 3-1: adding 3-1:1.1 (config #1, interface 1)
usb 3-1: adding 3-1:1.2 (config #1, interface 2)
snd-usb-audio 3-1:1.2: usb_probe_interface
snd-usb-audio 3-1:1.2: usb_probe_interface - got id
ALSA sound/usb/stream.c:682 2:3:1: add audio endpoint 0x82
usb 3-1: khubd timed out on ep0in len=0/3
ALSA sound/usb/clock.c:237 2:3:1: cannot get freq at ep 0x82
ALSA sound/usb/mixer.c:1305 [5] FU [Mic Capture Switch] ch = 1, val = 0/1/1
ALSA sound/usb/mixer.c:929 5:2: cannot get min/max values for control 2 (id 5)
ALSA sound/usb/mixer.c:1305 [5] FU [Mic Capture Volume] ch = 1, val = 0/1/1
ALSA sound/usb/mixer.c:929 5:2: cannot get min/max values for control 2 (id 5)
usb 3-1: adding 3-1:1.3 (config #1, interface 3)
hub 3-0:1.0: state 7 ports 1 chg 0000 evt 0002
Platform-ehci Platform-ehci.0: GetStatus port:1 status 00000d 0 ACK
sig=se0 PEC PE CONNECT
hub 3-0:1.0: port 1 enable change, status 00000403
2
3

Re: [alsa-devel] Possible fix for snd-hda-intel model=no-jd failing since ~linux-3.9-rc1
by Adam Richter 12 Sep '14
by Adam Richter 12 Sep '14
12 Sep '14
On Thu, 9/11/14, Takashi Iwai <tiwai(a)suse.de> wrote:
> Could you give alsa-info.sh output on your machine? Otherwise it's difficult to analyze.
OK. I have attached it. In a few places, I replaced text with "[DELETED]" to avoid identifying the product.
> Speaking of your patch: add_jack_kctl() itself has a check of is_jack_detectable() for phantom jacks,
> so basically this shouldn'tmake any difference. So we need to check more deeply why this
> change is really needed.
Right. This is some kind of initialization order problem where the following data flow fails: codec->no_jack_detect ==> jack->phantom_jack ==> jack->pin_sense. The Intel driver has a lot of "codec" sub-drivers, and I wasn't sure if would would really be practical for me to understand and get the relevant codec maintainers to approve if necessary. The fix I proposed is something I see as a temporary very low overhead workaround (only adds a few instructions, and only at initialization) until a correct fix is implemented. However, if this can be fixed properly quicly enoughtso avoid the need for a temporary workaround, that would be great.
>thanks,
>
>Takashi
Thank you for your analysis of this.
Adam
2
3
Hi
I am working on a board that has following configuration:
[SoC] <== I2S1 ==> [RT5677 Codec] <== I2S2 ==> [Speaker Amp]
The right part is the interesting one. Traditionally I2S is used to
connect to SoC, but in my case it is used to connect Speaker. Is there
any board that has similar configuration?
How to configure I2S2? *Where* and when such configuration should be done?
1
0

Re: [alsa-devel] [PATCH v5] ASoC: tda998x: Add a codec to the HDMI transmitter
by Dave Airlie 12 Sep '14
by Dave Airlie 12 Sep '14
12 Sep '14
On 10 September 2014 19:29, Jean-Francois Moine <moinejf(a)free.fr> wrote:
> This patch adds a CODEC function to the NXP TDA998x HDMI transmitter.
>
> The CODEC handles both I2S and S/PDIF inputs.
> It maintains the audio format and rate constraints according
> to the HDMI device parameters (EDID) and does dynamic input
> switch in the TDA998x I2C driver on start/stop audio streaming.
>
You should indicate on subsystem spanning patches what tree you think
should merge it etc.
If other tda998x ppl are okay with it, you can have my ack for merging
via someone else.
Dave.
1
0
Signed-off-by: Anatol Pomozov <anatol.pomozov(a)gmail.com>
---
sound/soc/codecs/rt5677.c | 7 +++++++
sound/soc/codecs/rt5677.h | 4 ++++
2 files changed, 11 insertions(+)
diff --git a/sound/soc/codecs/rt5677.c b/sound/soc/codecs/rt5677.c
index cf41e89..4972b5b 100644
--- a/sound/soc/codecs/rt5677.c
+++ b/sound/soc/codecs/rt5677.c
@@ -541,6 +541,7 @@ static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
+static const DECLARE_TLV_DB_SCALE(st_vol_tlv, -4650, 150, 0);
/* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
static unsigned int bst_tlv[] = {
@@ -577,6 +578,12 @@ static const struct snd_kcontrol_new rt5677_snd_controls[] = {
SOC_SINGLE_TLV("IN1 Boost", RT5677_IN1, RT5677_BST_SFT1, 8, 0, bst_tlv),
SOC_SINGLE_TLV("IN2 Boost", RT5677_IN1, RT5677_BST_SFT2, 8, 0, bst_tlv),
+ /* Sidetone Control */
+ SOC_SINGLE("Sidetone Switch", RT5677_SIDETONE_CTRL,
+ RT5677_ST_EN_SFT, 1, 0),
+ SOC_SINGLE_TLV("Sidetone Volume", RT5677_SIDETONE_CTRL,
+ RT5677_ST_VOL_SFT, 31, 0, st_vol_tlv),
+
/* ADC Digital Volume Control */
SOC_DOUBLE("ADC1 Capture Switch", RT5677_STO1_ADC_DIG_VOL,
RT5677_L_MUTE_SFT, RT5677_R_MUTE_SFT, 1, 1),
diff --git a/sound/soc/codecs/rt5677.h b/sound/soc/codecs/rt5677.h
index 3c1b4dc..f28911d 100644
--- a/sound/soc/codecs/rt5677.h
+++ b/sound/soc/codecs/rt5677.h
@@ -382,6 +382,10 @@
#define RT5677_ST_SEL_SFT 9
#define RT5677_ST_EN (0x1 << 6)
#define RT5677_ST_EN_SFT 6
+#define RT5677_ST_GAIN (0x1 << 5)
+#define RT5677_ST_GAIN_SFT 5
+#define RT5677_ST_VOL_MASK (0x1f << 0)
+#define RT5677_ST_VOL_SFT 0
/* Analog DAC1/2/3 Source Control (0x15) */
#define RT5677_ANA_DAC3_SRC_SEL_MASK (0x3 << 4)
--
2.1.0.rc2.206.gedb03e5
1
0

[alsa-devel] [PATCH v5] ASoC: dapm: add code to configure dai link parameters
by Nikesh Oswal 11 Sep '14
by Nikesh Oswal 11 Sep '14
11 Sep '14
dai-link params for codec-codec links were fixed. The fixed
link between codec and another chip which may be another codec,
baseband, bluetooth codec etc may require run time configuaration
changes. This change provides an optional alsa control to select
one of the params from a list of params.
Signed-off-by: Nikesh Oswal <nikesh(a)opensource.wolfsonmicro.com>
---
include/sound/soc-dapm.h | 3 +
include/sound/soc.h | 1 +
sound/soc/soc-core.c | 6 +-
sound/soc/soc-dapm.c | 143 ++++++++++++++++++++++++++++++++++++++++++++--
4 files changed, 146 insertions(+), 7 deletions(-)
diff --git a/include/sound/soc-dapm.h b/include/sound/soc-dapm.h
index 6b59471..3ee031e 100644
--- a/include/sound/soc-dapm.h
+++ b/include/sound/soc-dapm.h
@@ -378,6 +378,7 @@ int snd_soc_dapm_link_dai_widgets(struct snd_soc_card *card);
void snd_soc_dapm_connect_dai_link_widgets(struct snd_soc_card *card);
int snd_soc_dapm_new_pcm(struct snd_soc_card *card,
const struct snd_soc_pcm_stream *params,
+ unsigned int num_params,
struct snd_soc_dapm_widget *source,
struct snd_soc_dapm_widget *sink);
@@ -531,6 +532,8 @@ struct snd_soc_dapm_widget {
void *priv; /* widget specific data */
struct regulator *regulator; /* attached regulator */
const struct snd_soc_pcm_stream *params; /* params for dai links */
+ unsigned int num_params; /* number of params for dai links */
+ unsigned int params_select; /* currently selected param for dai link */
/* dapm control */
int reg; /* negative reg = no direct dapm */
diff --git a/include/sound/soc.h b/include/sound/soc.h
index ed9e2d7..51c6c4f 100644
--- a/include/sound/soc.h
+++ b/include/sound/soc.h
@@ -906,6 +906,7 @@ struct snd_soc_dai_link {
int be_id; /* optional ID for machine driver BE identification */
const struct snd_soc_pcm_stream *params;
+ unsigned int num_params;
unsigned int dai_fmt; /* format to set on init */
diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c
index b87d7d8..1db2168 100644
--- a/sound/soc/soc-core.c
+++ b/sound/soc/soc-core.c
@@ -1461,7 +1461,8 @@ static int soc_link_dai_widgets(struct snd_soc_card *card,
capture_w = cpu_dai->capture_widget;
if (play_w && capture_w) {
ret = snd_soc_dapm_new_pcm(card, dai_link->params,
- capture_w, play_w);
+ dai_link->num_params, capture_w,
+ play_w);
if (ret != 0) {
dev_err(card->dev, "ASoC: Can't link %s to %s: %d\n",
play_w->name, capture_w->name, ret);
@@ -1473,7 +1474,8 @@ static int soc_link_dai_widgets(struct snd_soc_card *card,
capture_w = codec_dai->capture_widget;
if (play_w && capture_w) {
ret = snd_soc_dapm_new_pcm(card, dai_link->params,
- capture_w, play_w);
+ dai_link->num_params, capture_w,
+ play_w);
if (ret != 0) {
dev_err(card->dev, "ASoC: Can't link %s to %s: %d\n",
play_w->name, capture_w->name, ret);
diff --git a/sound/soc/soc-dapm.c b/sound/soc/soc-dapm.c
index cdc837e..d0323f1 100644
--- a/sound/soc/soc-dapm.c
+++ b/sound/soc/soc-dapm.c
@@ -729,6 +729,36 @@ static int dapm_new_pga(struct snd_soc_dapm_widget *w)
return 0;
}
+/* create new dapm dai link control */
+static int dapm_new_dai_link(struct snd_soc_dapm_widget *w)
+{
+ int i, ret;
+ struct snd_kcontrol *kcontrol;
+ struct snd_soc_dapm_context *dapm = w->dapm;
+ struct snd_card *card = dapm->card->snd_card;
+
+ /* skip control creation for links with 1 config */
+ if (w->num_params == 1)
+ return 0;
+
+ /* add kcontrol */
+ for (i = 0; i < w->num_kcontrols; i++) {
+ kcontrol = snd_soc_cnew(&w->kcontrol_news[i], w,
+ w->name, NULL);
+ ret = snd_ctl_add(card, kcontrol);
+ if (ret < 0) {
+ dev_err(dapm->dev,
+ "ASoC: failed to add widget %s dapm kcontrol %s: %d\n",
+ w->name, w->kcontrol_news[i].name, ret);
+ return ret;
+ }
+ kcontrol->private_data = w;
+ w->kcontrols[i] = kcontrol;
+ }
+
+ return 0;
+}
+
/* reset 'walked' bit for each dapm path */
static void dapm_clear_walk_output(struct snd_soc_dapm_context *dapm,
struct list_head *sink)
@@ -2664,6 +2694,9 @@ int snd_soc_dapm_new_widgets(struct snd_soc_card *card)
case snd_soc_dapm_out_drv:
dapm_new_pga(w);
break;
+ case snd_soc_dapm_dai_link:
+ dapm_new_dai_link(w);
+ break;
default:
break;
}
@@ -3142,6 +3175,9 @@ static int snd_soc_dai_link_event(struct snd_soc_dapm_widget *w,
source = source_p->source->priv;
sink = sink_p->sink->priv;
+ /* Select the configuration set by alsa control */
+ config += w->params_select;
+
/* Be a little careful as we don't want to overflow the mask array */
if (config->formats) {
fmt = ffs(config->formats) - 1;
@@ -3222,8 +3258,35 @@ out:
return ret;
}
+static int snd_soc_dapm_dai_link_get(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_dapm_widget *w = snd_kcontrol_chip(kcontrol);
+
+ ucontrol->value.integer.value[0] = w->params_select;
+
+ return 0;
+}
+
+static int snd_soc_dapm_dai_link_put(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_dapm_widget *w = snd_kcontrol_chip(kcontrol);
+
+ if (ucontrol->value.integer.value[0] == w->params_select)
+ return 0;
+
+ if (ucontrol->value.integer.value[0] >= w->num_params)
+ return -EINVAL;
+
+ w->params_select = ucontrol->value.integer.value[0];
+
+ return 0;
+}
+
int snd_soc_dapm_new_pcm(struct snd_soc_card *card,
const struct snd_soc_pcm_stream *params,
+ unsigned int num_params,
struct snd_soc_dapm_widget *source,
struct snd_soc_dapm_widget *sink)
{
@@ -3231,14 +3294,48 @@ int snd_soc_dapm_new_pcm(struct snd_soc_card *card,
struct snd_soc_dapm_widget *w;
size_t len;
char *link_name;
- int ret;
+ int ret, count;
+ unsigned long private_value;
+ const char **w_param_text;
+ struct soc_enum w_param_enum[] = {
+ SOC_ENUM_SINGLE(0, 0, 0, NULL),
+ };
+ struct snd_kcontrol_new kcontrol_dai_link[] = {
+ SOC_ENUM_EXT(NULL, w_param_enum[0],
+ snd_soc_dapm_dai_link_get,
+ snd_soc_dapm_dai_link_put),
+ };
+ const struct snd_soc_pcm_stream *config = params;
+
+ w_param_text = kcalloc(num_params, sizeof(char *), GFP_KERNEL);
+ if (!w_param_text)
+ return -ENOMEM;
len = strlen(source->name) + strlen(sink->name) + 2;
link_name = devm_kzalloc(card->dev, len, GFP_KERNEL);
- if (!link_name)
- return -ENOMEM;
+ if (!link_name) {
+ ret = -ENOMEM;
+ goto outfree_w_param;
+ }
+
snprintf(link_name, len, "%s-%s", source->name, sink->name);
+ for (count = 0 ; count < num_params; count++) {
+ if (!config->stream_name)
+ dev_warn(card->dapm.dev,
+ "ASoC: anonymous config %d for dai link %s\n",
+ count, link_name);
+ w_param_text[count] = kmemdup((void *)(config->stream_name),
+ strlen(config->stream_name) + 1, GFP_KERNEL);
+ if (!w_param_text[count]) {
+ ret = -ENOMEM;
+ goto outfree_link_name;
+ }
+ config++;
+ }
+ w_param_enum[0].items = num_params;
+ w_param_enum[0].texts = w_param_text;
+
memset(&template, 0, sizeof(template));
template.reg = SND_SOC_NOPM;
template.id = snd_soc_dapm_dai_link;
@@ -3246,6 +3343,25 @@ int snd_soc_dapm_new_pcm(struct snd_soc_card *card,
template.event = snd_soc_dai_link_event;
template.event_flags = SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
SND_SOC_DAPM_PRE_PMD;
+ template.num_kcontrols = 1;
+ private_value =
+ (unsigned long) kmemdup((void *)(kcontrol_dai_link[0].private_value),
+ sizeof(struct soc_enum), GFP_KERNEL);
+ if (!private_value) {
+ dev_err(card->dev, "ASoC: Failed to create control for %s widget\n",
+ link_name);
+ ret = -ENOMEM;
+ goto outfree_link_name;
+ }
+ kcontrol_dai_link[0].private_value = private_value;
+ template.kcontrol_news = kmemdup(&kcontrol_dai_link[0],
+ sizeof(struct snd_kcontrol_new), GFP_KERNEL);
+ if (!template.kcontrol_news) {
+ dev_err(card->dev, "ASoC: Failed to create control for %s widget\n",
+ link_name);
+ ret = -ENOMEM;
+ goto outfree_private_value;
+ }
dev_dbg(card->dev, "ASoC: adding %s widget\n", link_name);
@@ -3253,15 +3369,32 @@ int snd_soc_dapm_new_pcm(struct snd_soc_card *card,
if (!w) {
dev_err(card->dev, "ASoC: Failed to create %s widget\n",
link_name);
- return -ENOMEM;
+ ret = -ENOMEM;
+ goto outfree_kcontrol_news;
}
w->params = params;
+ w->num_params = num_params;
ret = snd_soc_dapm_add_path(&card->dapm, source, w, NULL, NULL);
if (ret)
- return ret;
+ goto outfree_w;
return snd_soc_dapm_add_path(&card->dapm, w, sink, NULL, NULL);
+
+outfree_w:
+ kfree(w);
+outfree_kcontrol_news:
+ kfree(template.kcontrol_news);
+outfree_private_value:
+ kfree((void *)private_value);
+outfree_link_name:
+ kfree(link_name);
+outfree_w_param:
+ for (count = 0 ; count < num_params; count++)
+ kfree(w_param_text[count]);
+ kfree(w_param_text);
+
+ return ret;
}
int snd_soc_dapm_new_dai_widgets(struct snd_soc_dapm_context *dapm,
--
1.7.9.5
2
1

11 Sep '14
ASoC: cs4265: Fix register address to set the proper data type.
The SPDIF control register must be written to set the data type in hw_params
not the ADC control register.
Signed-off-by: Paul Handrigan <Paul.Handrigan(a)cirrus.com>
---
sound/soc/codecs/cs4265.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/sound/soc/codecs/cs4265.c b/sound/soc/codecs/cs4265.c
index e299948..4fdd47d 100644
--- a/sound/soc/codecs/cs4265.c
+++ b/sound/soc/codecs/cs4265.c
@@ -459,12 +459,12 @@ static int cs4265_pcm_hw_params(struct snd_pcm_substream *substream,
if (params_width(params) == 16) {
snd_soc_update_bits(codec, CS4265_DAC_CTL,
CS4265_DAC_CTL_DIF, (1 << 5));
- snd_soc_update_bits(codec, CS4265_ADC_CTL,
+ snd_soc_update_bits(codec, CS4265_SPDIF_CTL2,
CS4265_SPDIF_CTL2_DIF, (1 << 7));
} else {
snd_soc_update_bits(codec, CS4265_DAC_CTL,
CS4265_DAC_CTL_DIF, (3 << 5));
- snd_soc_update_bits(codec, CS4265_ADC_CTL,
+ snd_soc_update_bits(codec, CS4265_SPDIF_CTL2,
CS4265_SPDIF_CTL2_DIF, (1 << 7));
}
break;
@@ -473,7 +473,7 @@ static int cs4265_pcm_hw_params(struct snd_pcm_substream *substream,
CS4265_DAC_CTL_DIF, 0);
snd_soc_update_bits(codec, CS4265_ADC_CTL,
CS4265_ADC_DIF, 0);
- snd_soc_update_bits(codec, CS4265_ADC_CTL,
+ snd_soc_update_bits(codec, CS4265_SPDIF_CTL2,
CS4265_SPDIF_CTL2_DIF, (1 << 6));
break;
--
1.9.1
2
1

[alsa-devel] [PATCH] ASoC: rt5677: Add a configuration option for LDO2_POW pin
by Anatol Pomozov 11 Sep '14
by Anatol Pomozov 11 Sep '14
11 Sep '14
From: Anatol Pomozov <anatol(a)google.com>
Some boards have this pin tied to board and do not require any configuration,
some other boards allow to enable chip using GPIO.
Add an option that tells which GPIO is used to power up the codec.
Signed-off-by: Anatol Pomozov <anatol(a)google.com>
---
Documentation/devicetree/bindings/sound/rt5677.txt | 41 +++++++++++++++++++++
sound/soc/codecs/rt5677.c | 42 ++++++++++++++++++++++
sound/soc/codecs/rt5677.h | 2 ++
3 files changed, 85 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/rt5677.txt
diff --git a/Documentation/devicetree/bindings/sound/rt5677.txt b/Documentation/devicetree/bindings/sound/rt5677.txt
new file mode 100644
index 0000000..572a42c
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/rt5677.txt
@@ -0,0 +1,41 @@
+RT5677 audio CODEC
+
+This device supports I2C only.
+
+Required properties:
+
+- compatible : "realtek,rt5677".
+
+- reg : The I2C address of the device.
+
+- interrupts : The CODEC's interrupt output.
+
+Optional properties:
+
+- realtek,pow-ldo2-gpio : The GPIO that controls the CODEC's POW_LDO2 pin.
+
+Pins on the device (for linking into audio routes):
+
+ * IN1P
+ * IN1N
+ * IN2P
+ * IN2N
+ * MICBIAS1
+ * DMIC1
+ * DMIC2
+ * DMIC3
+ * DMIC4
+ * LOUT1
+ * LOUT2
+ * LOUT3
+
+Example:
+
+rt5677 {
+ compatible = "realtek,rt5677";
+ reg = <0x1c>;
+ interrupt-parent = <&gpio>;
+ interrupts = <TEGRA_GPIO(W, 3) GPIO_ACTIVE_HIGH>;
+ realtek,pow-ldo2-gpio =
+ <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>;
+};
diff --git a/sound/soc/codecs/rt5677.c b/sound/soc/codecs/rt5677.c
index 40a49ef..cf41e89 100644
--- a/sound/soc/codecs/rt5677.c
+++ b/sound/soc/codecs/rt5677.c
@@ -15,6 +15,7 @@
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pm.h>
+#include <linux/of_gpio.h>
#include <linux/regmap.h>
#include <linux/i2c.h>
#include <linux/platform_device.h>
@@ -3365,6 +3366,24 @@ static const struct i2c_device_id rt5677_i2c_id[] = {
};
MODULE_DEVICE_TABLE(i2c, rt5677_i2c_id);
+static int rt5677_parse_dt(struct rt5677_priv *rt5677, struct device_node *np)
+{
+ rt5677->pow_ldo2 = of_get_named_gpio(np,
+ "realtek,pow-ldo2-gpio", 0);
+
+ /*
+ * POW_LDO2 is optional (it may be statically tied on the board).
+ * -ENOENT means that the property doesn't exist, i.e. there is no
+ * GPIO, so is not an error. Any other error code means the property
+ * exists, but could not be parsed.
+ */
+ if (!gpio_is_valid(rt5677->pow_ldo2) &&
+ (rt5677->pow_ldo2 != -ENOENT))
+ return rt5677->pow_ldo2;
+
+ return 0;
+}
+
static int rt5677_i2c_probe(struct i2c_client *i2c,
const struct i2c_device_id *id)
{
@@ -3383,6 +3402,29 @@ static int rt5677_i2c_probe(struct i2c_client *i2c,
if (pdata)
rt5677->pdata = *pdata;
+ if (i2c->dev.of_node) {
+ ret = rt5677_parse_dt(rt5677, i2c->dev.of_node);
+ if (ret) {
+ dev_err(&i2c->dev, "Failed to parse device tree: %d\n",
+ ret);
+ return ret;
+ }
+ } else {
+ rt5677->pow_ldo2 = -EINVAL;
+ }
+
+ if (gpio_is_valid(rt5677->pow_ldo2)) {
+ ret = devm_gpio_request_one(&i2c->dev, rt5677->pow_ldo2,
+ GPIOF_OUT_INIT_HIGH,
+ "RT5677 POW_LDO2");
+ if (ret < 0) {
+ dev_err(&i2c->dev, "Failed to request POW_LDO2 %d: %d\n",
+ rt5677->pow_ldo2, ret);
+ return ret;
+ }
+ msleep(10);
+ }
+
rt5677->regmap = devm_regmap_init_i2c(i2c, &rt5677_regmap);
if (IS_ERR(rt5677->regmap)) {
ret = PTR_ERR(rt5677->regmap);
diff --git a/sound/soc/codecs/rt5677.h b/sound/soc/codecs/rt5677.h
index 8791ab9..3c1b4dc 100644
--- a/sound/soc/codecs/rt5677.h
+++ b/sound/soc/codecs/rt5677.h
@@ -1441,6 +1441,8 @@ struct rt5677_priv {
int pll_src;
int pll_in;
int pll_out;
+
+ int pow_ldo2; /* POW_LDO2 pin */
};
#endif /* __RT5677_H__ */
--
2.1.0.rc2.206.gedb03e5
1
1

11 Sep '14
In preparation to change the public API to return a per-user clk structure,
remove any usage of this public API from the clock implementations.
The reason for having this in a separate commit from the one that introduces
the implementation of the new functions is to separate the changes generated
with Coccinelle from the rest, and keep the patches' size reasonable.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso(a)collabora.com>
Tested-by: Boris Brezillon <boris.brezillon(a)free-electrons.com>
Tested-by: Heiko Stuebner <heiko(a)sntech.de>
Acked-by: Boris Brezillon <boris.brezillon(a)free-electrons.com>
---
v11: * Re-generate the patch on top of 3.17rc4
* Convert include/linux/platform_data/clk-lpss.h
* Don't convert include/asm-generic/clkdev.h
v10: * Add a few more files to be converted
* Re-generate the patch on top of the latest changes
v9: * Fold in changes to mxs-saif.c, so to not break bisectability
* Re-generate the patch on top of the latest changes
* Remove linux/clk.h includes from clk implementations
---
arch/arm/mach-dove/common.c | 10 +-
arch/arm/mach-imx/clk-busy.c | 9 +-
arch/arm/mach-imx/clk-fixup-div.c | 4 +-
arch/arm/mach-imx/clk-fixup-mux.c | 4 +-
arch/arm/mach-imx/clk-gate2.c | 4 +-
arch/arm/mach-imx/clk-imx1.c | 3 +-
arch/arm/mach-imx/clk-imx21.c | 3 +-
arch/arm/mach-imx/clk-imx25.c | 9 +-
arch/arm/mach-imx/clk-imx27.c | 5 +-
arch/arm/mach-imx/clk-imx31.c | 11 +-
arch/arm/mach-imx/clk-imx35.c | 23 +-
arch/arm/mach-imx/clk-imx51-imx53.c | 78 +++---
arch/arm/mach-imx/clk-imx6q.c | 54 ++--
arch/arm/mach-imx/clk-imx6sl.c | 14 +-
arch/arm/mach-imx/clk-imx6sx.c | 98 ++++---
arch/arm/mach-imx/clk-pfd.c | 5 +-
arch/arm/mach-imx/clk-pllv1.c | 5 +-
arch/arm/mach-imx/clk-pllv2.c | 5 +-
arch/arm/mach-imx/clk-pllv3.c | 5 +-
arch/arm/mach-imx/clk-vf610.c | 43 +--
arch/arm/mach-imx/clk.c | 11 +-
arch/arm/mach-imx/clk.h | 42 +--
arch/arm/mach-msm/clock-pcom.c | 2 +-
arch/arm/mach-mv78xx0/common.c | 2 +-
arch/arm/mach-omap2/board-cm-t35.c | 2 +-
arch/arm/mach-omap2/cclock3xxx_data.c | 371 +++++++++++++-------------
arch/arm/mach-omap2/clkt2xxx_dpll.c | 5 +-
arch/arm/mach-omap2/clkt2xxx_dpllcore.c | 5 +-
arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c | 11 +-
arch/arm/mach-omap2/clkt34xx_dpll3m2.c | 3 +-
arch/arm/mach-omap2/clkt_clksel.c | 46 ++--
arch/arm/mach-omap2/clkt_dpll.c | 8 +-
arch/arm/mach-omap2/clock.c | 52 ++--
arch/arm/mach-omap2/clock.h | 18 +-
arch/arm/mach-omap2/clock3xxx.c | 23 +-
arch/arm/mach-omap2/clock3xxx.h | 4 +-
arch/arm/mach-omap2/clock_common_data.c | 2 +-
arch/arm/mach-omap2/clockdomain.c | 9 +-
arch/arm/mach-omap2/clockdomain.h | 4 +-
arch/arm/mach-omap2/display.c | 5 +-
arch/arm/mach-omap2/dpll3xxx.c | 29 +-
arch/arm/mach-omap2/dpll44xx.c | 5 +-
arch/arm/mach-omap2/mcbsp.c | 5 +-
arch/arm/mach-omap2/omap_device.c | 9 +-
arch/arm/mach-omap2/omap_hwmod.c | 42 +--
arch/arm/mach-omap2/omap_hwmod.h | 12 +-
arch/arm/mach-omap2/pm24xx.c | 12 +-
arch/arm/mach-orion5x/common.c | 2 +-
arch/arm/mach-shmobile/clock.c | 9 +-
arch/arm/mach-vexpress/spc.c | 4 +-
arch/arm/plat-orion/common.c | 21 +-
arch/arm/plat-orion/include/plat/common.h | 12 +-
arch/mips/alchemy/common/clock.c | 42 +--
arch/powerpc/platforms/512x/clock-commonclk.c | 48 ++--
drivers/acpi/acpi_lpss.c | 7 +-
drivers/clk/at91/clk-main.c | 24 +-
drivers/clk/at91/clk-master.c | 6 +-
drivers/clk/at91/clk-peripheral.c | 12 +-
drivers/clk/at91/clk-pll.c | 6 +-
drivers/clk/at91/clk-plldiv.c | 6 +-
drivers/clk/at91/clk-programmable.c | 10 +-
drivers/clk/at91/clk-slow.c | 24 +-
drivers/clk/at91/clk-smd.c | 6 +-
drivers/clk/at91/clk-system.c | 6 +-
drivers/clk/at91/clk-usb.c | 18 +-
drivers/clk/at91/clk-utmi.c | 6 +-
drivers/clk/bcm/clk-kona-setup.c | 6 +-
drivers/clk/bcm/clk-kona.c | 12 +-
drivers/clk/bcm/clk-kona.h | 2 +-
drivers/clk/berlin/berlin2-avpll.c | 4 +-
drivers/clk/berlin/berlin2-avpll.h | 4 +-
drivers/clk/berlin/berlin2-div.c | 2 +-
drivers/clk/berlin/berlin2-div.h | 2 +-
drivers/clk/berlin/berlin2-pll.c | 2 +-
drivers/clk/berlin/berlin2-pll.h | 2 +-
drivers/clk/berlin/bg2.c | 13 +-
drivers/clk/berlin/bg2q.c | 9 +-
drivers/clk/clk-axi-clkgen.c | 3 +-
drivers/clk/clk-axm5516.c | 4 +-
drivers/clk/clk-bcm2835.c | 2 +-
drivers/clk/clk-clps711x.c | 3 +-
drivers/clk/clk-composite.c | 11 +-
drivers/clk/clk-conf.c | 17 +-
drivers/clk/clk-divider.c | 8 +-
drivers/clk/clk-efm32gg.c | 3 +-
drivers/clk/clk-fixed-factor.c | 6 +-
drivers/clk/clk-fixed-rate.c | 8 +-
drivers/clk/clk-fractional-divider.c | 4 +-
drivers/clk/clk-gate.c | 4 +-
drivers/clk/clk-highbank.c | 8 +-
drivers/clk/clk-ls1x.c | 16 +-
drivers/clk/clk-max77686.c | 10 +-
drivers/clk/clk-moxart.c | 8 +-
drivers/clk/clk-mux.c | 7 +-
drivers/clk/clk-nomadik.c | 15 +-
drivers/clk/clk-nspire.c | 4 +-
drivers/clk/clk-palmas.c | 7 +-
drivers/clk/clk-ppc-corenet.c | 8 +-
drivers/clk/clk-s2mps11.c | 6 +-
drivers/clk/clk-si5351.c | 17 +-
drivers/clk/clk-si570.c | 4 +-
drivers/clk/clk-twl6040.c | 3 +-
drivers/clk/clk-u300.c | 13 +-
drivers/clk/clk-vt8500.c | 4 +-
drivers/clk/clk-wm831x.c | 7 +-
drivers/clk/clk-xgene.c | 12 +-
drivers/clk/clk.h | 4 +-
drivers/clk/hisilicon/clk-hi3620.c | 9 +-
drivers/clk/hisilicon/clk-hip04.c | 1 -
drivers/clk/hisilicon/clk.c | 17 +-
drivers/clk/hisilicon/clk.h | 2 +-
drivers/clk/hisilicon/clkgate-separated.c | 5 +-
drivers/clk/keystone/gate.c | 7 +-
drivers/clk/keystone/pll.c | 11 +-
drivers/clk/mmp/clk-apbc.c | 5 +-
drivers/clk/mmp/clk-apmu.c | 5 +-
drivers/clk/mmp/clk-frac.c | 4 +-
drivers/clk/mmp/clk-mmp2.c | 14 +-
drivers/clk/mmp/clk-pxa168.c | 12 +-
drivers/clk/mmp/clk-pxa910.c | 12 +-
drivers/clk/mmp/clk.h | 8 +-
drivers/clk/mvebu/clk-corediv.c | 4 +-
drivers/clk/mvebu/clk-cpu.c | 8 +-
drivers/clk/mvebu/common.c | 15 +-
drivers/clk/mxs/clk-div.c | 5 +-
drivers/clk/mxs/clk-frac.c | 5 +-
drivers/clk/mxs/clk-imx23.c | 5 +-
drivers/clk/mxs/clk-imx28.c | 5 +-
drivers/clk/mxs/clk-pll.c | 5 +-
drivers/clk/mxs/clk-ref.c | 5 +-
drivers/clk/mxs/clk-ssp.c | 3 +-
drivers/clk/mxs/clk.h | 17 +-
drivers/clk/qcom/clk-rcg.c | 8 +-
drivers/clk/qcom/clk-rcg2.c | 14 +-
drivers/clk/qcom/clk-regmap.c | 2 +-
drivers/clk/qcom/clk-regmap.h | 2 +-
drivers/clk/qcom/common.c | 6 +-
drivers/clk/qcom/gcc-apq8084.c | 2 +-
drivers/clk/qcom/gcc-ipq806x.c | 2 +-
drivers/clk/qcom/gcc-msm8660.c | 2 +-
drivers/clk/qcom/gcc-msm8960.c | 2 +-
drivers/clk/qcom/gcc-msm8974.c | 2 +-
drivers/clk/qcom/mmcc-msm8960.c | 6 +-
drivers/clk/rockchip/clk-pll.c | 9 +-
drivers/clk/rockchip/clk-rk3188.c | 2 +-
drivers/clk/rockchip/clk-rk3288.c | 2 +-
drivers/clk/rockchip/clk-rockchip.c | 2 +-
drivers/clk/rockchip/clk.c | 15 +-
drivers/clk/rockchip/clk.h | 5 +-
drivers/clk/samsung/clk-exynos-audss.c | 16 +-
drivers/clk/samsung/clk-exynos-clkout.c | 9 +-
drivers/clk/samsung/clk-exynos3250.c | 1 -
drivers/clk/samsung/clk-exynos4.c | 7 +-
drivers/clk/samsung/clk-exynos5250.c | 1 -
drivers/clk/samsung/clk-exynos5260.c | 1 -
drivers/clk/samsung/clk-exynos5410.c | 1 -
drivers/clk/samsung/clk-exynos5420.c | 1 -
drivers/clk/samsung/clk-exynos5440.c | 1 -
drivers/clk/samsung/clk-pll.c | 6 +-
drivers/clk/samsung/clk-pll.h | 2 +-
drivers/clk/samsung/clk-s3c2410-dclk.c | 30 +--
drivers/clk/samsung/clk-s3c2410.c | 1 -
drivers/clk/samsung/clk-s3c2412.c | 1 -
drivers/clk/samsung/clk-s3c2443.c | 1 -
drivers/clk/samsung/clk-s3c64xx.c | 1 -
drivers/clk/samsung/clk-s5pv210-audss.c | 16 +-
drivers/clk/samsung/clk-s5pv210.c | 1 -
drivers/clk/samsung/clk.c | 22 +-
drivers/clk/samsung/clk.h | 3 +-
drivers/clk/shmobile/clk-div6.c | 2 +-
drivers/clk/shmobile/clk-emev2.c | 4 +-
drivers/clk/shmobile/clk-mstp.c | 6 +-
drivers/clk/shmobile/clk-r8a7740.c | 6 +-
drivers/clk/shmobile/clk-r8a7779.c | 6 +-
drivers/clk/shmobile/clk-rcar-gen2.c | 10 +-
drivers/clk/shmobile/clk-rz.c | 6 +-
drivers/clk/sirf/clk-atlas6.c | 3 +-
drivers/clk/sirf/clk-common.c | 30 +--
drivers/clk/sirf/clk-prima2.c | 3 +-
drivers/clk/socfpga/clk-gate.c | 3 +-
drivers/clk/socfpga/clk-periph.c | 3 +-
drivers/clk/socfpga/clk-pll.c | 5 +-
drivers/clk/spear/clk-aux-synth.c | 8 +-
drivers/clk/spear/clk-frac-synth.c | 4 +-
drivers/clk/spear/clk-gpt-synth.c | 4 +-
drivers/clk/spear/clk-vco-pll.c | 8 +-
drivers/clk/spear/clk.h | 14 +-
drivers/clk/spear/spear1310_clock.c | 3 +-
drivers/clk/spear/spear1340_clock.c | 3 +-
drivers/clk/spear/spear3xx_clock.c | 17 +-
drivers/clk/spear/spear6xx_clock.c | 3 +-
drivers/clk/st/clk-flexgen.c | 12 +-
drivers/clk/st/clkgen-fsyn.c | 22 +-
drivers/clk/st/clkgen-mux.c | 32 +--
drivers/clk/st/clkgen-pll.c | 34 +--
drivers/clk/sunxi/clk-a10-hosc.c | 2 +-
drivers/clk/sunxi/clk-a20-gmac.c | 2 +-
drivers/clk/sunxi/clk-factors.c | 4 +-
drivers/clk/sunxi/clk-sun6i-apb0-gates.c | 2 +-
drivers/clk/sunxi/clk-sun6i-apb0.c | 2 +-
drivers/clk/sunxi/clk-sun6i-ar100.c | 6 +-
drivers/clk/sunxi/clk-sun8i-apb0.c | 2 +-
drivers/clk/sunxi/clk-sunxi.c | 18 +-
drivers/clk/tegra/clk-audio-sync.c | 4 +-
drivers/clk/tegra/clk-divider.c | 5 +-
drivers/clk/tegra/clk-periph-gate.c | 5 +-
drivers/clk/tegra/clk-periph.c | 9 +-
drivers/clk/tegra/clk-pll-out.c | 5 +-
drivers/clk/tegra/clk-pll.c | 41 ++-
drivers/clk/tegra/clk-super.c | 5 +-
drivers/clk/tegra/clk-tegra-audio.c | 5 +-
drivers/clk/tegra/clk-tegra-fixed.c | 9 +-
drivers/clk/tegra/clk-tegra-periph.c | 13 +-
drivers/clk/tegra/clk-tegra-pmc.c | 5 +-
drivers/clk/tegra/clk-tegra-super-gen4.c | 9 +-
drivers/clk/tegra/clk-tegra114.c | 11 +-
drivers/clk/tegra/clk-tegra124.c | 7 +-
drivers/clk/tegra/clk-tegra20.c | 13 +-
drivers/clk/tegra/clk-tegra30.c | 9 +-
drivers/clk/tegra/clk.c | 25 +-
drivers/clk/tegra/clk.h | 38 +--
drivers/clk/ti/apll.c | 8 +-
drivers/clk/ti/clk-2xxx.c | 8 +-
drivers/clk/ti/clk-33xx.c | 18 +-
drivers/clk/ti/clk-3xxx.c | 8 +-
drivers/clk/ti/clk-43xx.c | 8 +-
drivers/clk/ti/clk-44xx.c | 16 +-
drivers/clk/ti/clk-54xx.c | 25 +-
drivers/clk/ti/clk-7xx.c | 28 +-
drivers/clk/ti/clk-dra7-atl.c | 6 +-
drivers/clk/ti/clk.c | 2 +-
drivers/clk/ti/clockdomain.c | 4 +-
drivers/clk/ti/composite.c | 2 +-
drivers/clk/ti/divider.c | 6 +-
drivers/clk/ti/dpll.c | 8 +-
drivers/clk/ti/fixed-factor.c | 2 +-
drivers/clk/ti/gate.c | 2 +-
drivers/clk/ti/interface.c | 2 +-
drivers/clk/ti/mux.c | 6 +-
drivers/clk/ux500/abx500-clk.c | 3 +-
drivers/clk/ux500/clk-prcc.c | 8 +-
drivers/clk/ux500/clk-prcmu.c | 16 +-
drivers/clk/ux500/clk-sysctrl.c | 10 +-
drivers/clk/ux500/clk.h | 23 +-
drivers/clk/ux500/u8500_clk.c | 3 +-
drivers/clk/ux500/u8500_of_clk.c | 13 +-
drivers/clk/ux500/u8540_clk.c | 3 +-
drivers/clk/ux500/u9540_clk.c | 1 -
drivers/clk/versatile/clk-icst.c | 5 +-
drivers/clk/versatile/clk-icst.h | 2 +-
drivers/clk/versatile/clk-impd1.c | 19 +-
drivers/clk/versatile/clk-realview.c | 3 +-
drivers/clk/versatile/clk-sp810.c | 30 ++-
drivers/clk/versatile/clk-versatile.c | 3 +-
drivers/clk/versatile/clk-vexpress-osc.c | 2 +-
drivers/clk/versatile/clk-vexpress.c | 6 +-
drivers/clk/x86/clk-lpt.c | 3 +-
drivers/clk/zynq/clkc.c | 22 +-
drivers/clk/zynq/pll.c | 4 +-
drivers/gpu/drm/msm/hdmi/hdmi_phy_8960.c | 3 +-
drivers/media/platform/exynos4-is/media-dev.c | 17 +-
drivers/media/platform/exynos4-is/media-dev.h | 7 +-
drivers/media/platform/omap3isp/isp.h | 2 +-
drivers/rtc/rtc-hym8563.c | 4 +-
drivers/staging/imx-drm/imx-tve.c | 27 +-
include/linux/clk/ti.h | 10 +-
include/linux/clk/zynq.h | 2 +-
include/linux/platform_data/clk-lpss.h | 2 +-
include/linux/platform_data/si5351.h | 4 +-
sound/soc/mxs/mxs-saif.c | 4 +-
270 files changed, 1469 insertions(+), 1536 deletions(-)
diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c
index 0d1a892..4d95685 100644
--- a/arch/arm/mach-dove/common.c
+++ b/arch/arm/mach-dove/common.c
@@ -71,9 +71,9 @@ void __init dove_map_io(void)
static int dove_tclk;
static DEFINE_SPINLOCK(gating_lock);
-static struct clk *tclk;
+static struct clk_core *tclk;
-static struct clk __init *dove_register_gate(const char *name,
+static struct clk_core __init *dove_register_gate(const char *name,
const char *parent, u8 bit_idx)
{
return clk_register_gate(NULL, name, parent, 0,
@@ -83,9 +83,9 @@ static struct clk __init *dove_register_gate(const char *name,
static void __init dove_clk_init(void)
{
- struct clk *usb0, *usb1, *sata, *pex0, *pex1, *sdio0, *sdio1;
- struct clk *nand, *camera, *i2s0, *i2s1, *crypto, *ac97, *pdma;
- struct clk *xor0, *xor1, *ge, *gephy;
+ struct clk_core *usb0, *usb1, *sata, *pex0, *pex1, *sdio0, *sdio1;
+ struct clk_core *nand, *camera, *i2s0, *i2s1, *crypto, *ac97, *pdma;
+ struct clk_core *xor0, *xor1, *ge, *gephy;
tclk = clk_register_fixed_rate(NULL, "tclk", NULL, CLK_IS_ROOT,
dove_tclk);
diff --git a/arch/arm/mach-imx/clk-busy.c b/arch/arm/mach-imx/clk-busy.c
index 4bb1bc4..bb3edc5 100644
--- a/arch/arm/mach-imx/clk-busy.c
+++ b/arch/arm/mach-imx/clk-busy.c
@@ -10,7 +10,6 @@
* http://www.gnu.org/copyleft/gpl.html
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/io.h>
#include <linux/slab.h>
@@ -78,12 +77,12 @@ static struct clk_ops clk_busy_divider_ops = {
.set_rate = clk_busy_divider_set_rate,
};
-struct clk *imx_clk_busy_divider(const char *name, const char *parent_name,
+struct clk_core *imx_clk_busy_divider(const char *name, const char *parent_name,
void __iomem *reg, u8 shift, u8 width,
void __iomem *busy_reg, u8 busy_shift)
{
struct clk_busy_divider *busy;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
busy = kzalloc(sizeof(*busy), GFP_KERNEL);
@@ -152,12 +151,12 @@ static struct clk_ops clk_busy_mux_ops = {
.set_parent = clk_busy_mux_set_parent,
};
-struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift,
+struct clk_core *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift,
u8 width, void __iomem *busy_reg, u8 busy_shift,
const char **parent_names, int num_parents)
{
struct clk_busy_mux *busy;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
busy = kzalloc(sizeof(*busy), GFP_KERNEL);
diff --git a/arch/arm/mach-imx/clk-fixup-div.c b/arch/arm/mach-imx/clk-fixup-div.c
index 21db020..8a62bfd 100644
--- a/arch/arm/mach-imx/clk-fixup-div.c
+++ b/arch/arm/mach-imx/clk-fixup-div.c
@@ -92,12 +92,12 @@ static const struct clk_ops clk_fixup_div_ops = {
.set_rate = clk_fixup_div_set_rate,
};
-struct clk *imx_clk_fixup_divider(const char *name, const char *parent,
+struct clk_core *imx_clk_fixup_divider(const char *name, const char *parent,
void __iomem *reg, u8 shift, u8 width,
void (*fixup)(u32 *val))
{
struct clk_fixup_div *fixup_div;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
if (!fixup)
diff --git a/arch/arm/mach-imx/clk-fixup-mux.c b/arch/arm/mach-imx/clk-fixup-mux.c
index 0d40b35..e29dc62 100644
--- a/arch/arm/mach-imx/clk-fixup-mux.c
+++ b/arch/arm/mach-imx/clk-fixup-mux.c
@@ -71,12 +71,12 @@ static const struct clk_ops clk_fixup_mux_ops = {
.set_parent = clk_fixup_mux_set_parent,
};
-struct clk *imx_clk_fixup_mux(const char *name, void __iomem *reg,
+struct clk_core *imx_clk_fixup_mux(const char *name, void __iomem *reg,
u8 shift, u8 width, const char **parents,
int num_parents, void (*fixup)(u32 *val))
{
struct clk_fixup_mux *fixup_mux;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
if (!fixup)
diff --git a/arch/arm/mach-imx/clk-gate2.c b/arch/arm/mach-imx/clk-gate2.c
index 84acdfd..d78f409 100644
--- a/arch/arm/mach-imx/clk-gate2.c
+++ b/arch/arm/mach-imx/clk-gate2.c
@@ -108,14 +108,14 @@ static struct clk_ops clk_gate2_ops = {
.is_enabled = clk_gate2_is_enabled,
};
-struct clk *clk_register_gate2(struct device *dev, const char *name,
+struct clk_core *clk_register_gate2(struct device *dev, const char *name,
const char *parent_name, unsigned long flags,
void __iomem *reg, u8 bit_idx,
u8 clk_gate2_flags, spinlock_t *lock,
unsigned int *share_count)
{
struct clk_gate2 *gate;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
gate = kzalloc(sizeof(struct clk_gate2), GFP_KERNEL);
diff --git a/arch/arm/mach-imx/clk-imx1.c b/arch/arm/mach-imx/clk-imx1.c
index 37c307a..8459bd7 100644
--- a/arch/arm/mach-imx/clk-imx1.c
+++ b/arch/arm/mach-imx/clk-imx1.c
@@ -15,7 +15,6 @@
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/err.h>
@@ -32,7 +31,7 @@ static const char *prem_sel_clks[] = { "clk32_premult", "clk16m", };
static const char *clko_sel_clks[] = { "per1", "hclk", "clk48m", "clk16m",
"prem", "fclk", };
-static struct clk *clk[IMX1_CLK_MAX];
+static struct clk_core *clk[IMX1_CLK_MAX];
static struct clk_onecell_data clk_data;
static void __iomem *ccm __initdata;
diff --git a/arch/arm/mach-imx/clk-imx21.c b/arch/arm/mach-imx/clk-imx21.c
index 4b4c753..56d799c 100644
--- a/arch/arm/mach-imx/clk-imx21.c
+++ b/arch/arm/mach-imx/clk-imx21.c
@@ -9,7 +9,6 @@
* of the License, or (at your option) any later version.
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/of.h>
@@ -36,7 +35,7 @@ static const char *mpll_sel_clks[] = { "fpm_gate", "mpll_osc_sel", };
static const char *spll_sel_clks[] = { "fpm_gate", "mpll_osc_sel", };
static const char *ssi_sel_clks[] = { "spll_gate", "mpll_gate", };
-static struct clk *clk[IMX21_CLK_MAX];
+static struct clk_core *clk[IMX21_CLK_MAX];
static struct clk_onecell_data clk_data;
static void __init _mx21_clocks_init(unsigned long lref, unsigned long href)
diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c
index 59c0c85..06d2c72 100644
--- a/arch/arm/mach-imx/clk-imx25.c
+++ b/arch/arm/mach-imx/clk-imx25.c
@@ -19,7 +19,6 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/list.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include <linux/clkdev.h>
#include <linux/err.h>
@@ -87,7 +86,7 @@ enum mx25_clks {
wdt_ipg, cko_div, cko_sel, cko, clk_max
};
-static struct clk *clk[clk_max];
+static struct clk_core *clk[clk_max];
static int __init __mx25_clocks_init(unsigned long osc_rate,
void __iomem *ccm_base)
@@ -225,16 +224,16 @@ static int __init __mx25_clocks_init(unsigned long osc_rate,
imx_check_clocks(clk, ARRAY_SIZE(clk));
- clk_prepare_enable(clk[emi_ahb]);
+ clk_provider_prepare_enable(clk[emi_ahb]);
/* Clock source for gpt must be derived from AHB */
- clk_set_parent(clk[per5_sel], clk[ahb]);
+ clk_provider_set_parent(clk[per5_sel], clk[ahb]);
/*
* Let's initially set up CLKO parent as ipg, since this configuration
* is used on some imx25 board designs to clock the audio codec.
*/
- clk_set_parent(clk[cko_sel], clk[ipg]);
+ clk_provider_set_parent(clk[cko_sel], clk[ipg]);
return 0;
}
diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c
index ab6349e..7b0f01c 100644
--- a/arch/arm/mach-imx/clk-imx27.c
+++ b/arch/arm/mach-imx/clk-imx27.c
@@ -1,4 +1,3 @@
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/err.h>
@@ -39,7 +38,7 @@ static const char *clko_sel_clks[] = {
static const char *ssi_sel_clks[] = { "spll_gate", "mpll", };
-static struct clk *clk[IMX27_CLK_MAX];
+static struct clk_core *clk[IMX27_CLK_MAX];
static struct clk_onecell_data clk_data;
static void __init _mx27_clocks_init(unsigned long fref)
@@ -156,7 +155,7 @@ static void __init _mx27_clocks_init(unsigned long fref)
clk_register_clkdev(clk[IMX27_CLK_CPU_DIV], NULL, "cpu0");
- clk_prepare_enable(clk[IMX27_CLK_EMI_AHB_GATE]);
+ clk_provider_prepare_enable(clk[IMX27_CLK_EMI_AHB_GATE]);
imx_print_silicon_rev("i.MX27", mx27_revision());
}
diff --git a/arch/arm/mach-imx/clk-imx31.c b/arch/arm/mach-imx/clk-imx31.c
index 286ef42..c95fc5c 100644
--- a/arch/arm/mach-imx/clk-imx31.c
+++ b/arch/arm/mach-imx/clk-imx31.c
@@ -16,7 +16,6 @@
*/
#include <linux/module.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/io.h>
#include <linux/err.h>
@@ -45,7 +44,7 @@ enum mx31_clks {
gacc_gate, emi_gate, rtic_gate, firi_gate, clk_max
};
-static struct clk *clk[clk_max];
+static struct clk_core *clk[clk_max];
static struct clk_onecell_data clk_data;
int __init mx31_clocks_init(unsigned long fref)
@@ -176,11 +175,11 @@ int __init mx31_clocks_init(unsigned long fref)
clk_register_clkdev(clk[sdma_gate], NULL, "imx31-sdma");
clk_register_clkdev(clk[iim_gate], "iim", NULL);
- clk_set_parent(clk[csi], clk[upll]);
- clk_prepare_enable(clk[emi_gate]);
- clk_prepare_enable(clk[iim_gate]);
+ clk_provider_set_parent(clk[csi], clk[upll]);
+ clk_provider_prepare_enable(clk[emi_gate]);
+ clk_provider_prepare_enable(clk[iim_gate]);
mx31_revision();
- clk_disable_unprepare(clk[iim_gate]);
+ clk_provider_disable_unprepare(clk[iim_gate]);
mxc_timer_init(MX31_IO_ADDRESS(MX31_GPT1_BASE_ADDR), MX31_INT_GPT);
diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c
index a0d2b57..846b2cc 100644
--- a/arch/arm/mach-imx/clk-imx35.c
+++ b/arch/arm/mach-imx/clk-imx35.c
@@ -8,7 +8,6 @@
*/
#include <linux/mm.h>
#include <linux/delay.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include <linux/clkdev.h>
#include <linux/of.h>
@@ -67,7 +66,7 @@ enum mx35_clks {
gpu2d_gate, clk_max
};
-static struct clk *clk[clk_max];
+static struct clk_core *clk[clk_max];
int __init mx35_clocks_init(void)
{
@@ -99,7 +98,7 @@ int __init mx35_clocks_init(void)
else
clk[arm] = imx_clk_fixed_factor("arm", "mpll", 1, aad->arm);
- if (clk_get_rate(clk[arm]) > 400000000)
+ if (clk_provider_get_rate(clk[arm]) > 400000000)
hsp_div = hsp_div_532;
else
hsp_div = hsp_div_400;
@@ -257,14 +256,14 @@ int __init mx35_clocks_init(void)
clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0");
clk_register_clkdev(clk[admux_gate], "audmux", NULL);
- clk_prepare_enable(clk[spba_gate]);
- clk_prepare_enable(clk[gpio1_gate]);
- clk_prepare_enable(clk[gpio2_gate]);
- clk_prepare_enable(clk[gpio3_gate]);
- clk_prepare_enable(clk[iim_gate]);
- clk_prepare_enable(clk[emi_gate]);
- clk_prepare_enable(clk[max_gate]);
- clk_prepare_enable(clk[iomuxc_gate]);
+ clk_provider_prepare_enable(clk[spba_gate]);
+ clk_provider_prepare_enable(clk[gpio1_gate]);
+ clk_provider_prepare_enable(clk[gpio2_gate]);
+ clk_provider_prepare_enable(clk[gpio3_gate]);
+ clk_provider_prepare_enable(clk[iim_gate]);
+ clk_provider_prepare_enable(clk[emi_gate]);
+ clk_provider_prepare_enable(clk[max_gate]);
+ clk_provider_prepare_enable(clk[iomuxc_gate]);
/*
* SCC is needed to boot via mmc after a watchdog reset. The clock code
@@ -272,7 +271,7 @@ int __init mx35_clocks_init(void)
* handled here and not needed for mmc) and IIM (which is enabled
* unconditionally above).
*/
- clk_prepare_enable(clk[scc_gate]);
+ clk_provider_prepare_enable(clk[scc_gate]);
imx_print_silicon_rev("i.MX35", mx35_revision());
diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c
index 72d6521..fa9fc84 100644
--- a/arch/arm/mach-imx/clk-imx51-imx53.c
+++ b/arch/arm/mach-imx/clk-imx51-imx53.c
@@ -8,7 +8,6 @@
*/
#include <linux/mm.h>
#include <linux/delay.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
@@ -126,7 +125,7 @@ static const char *spdif_sel[] = { "pll1_sw", "pll2_sw", "pll3_sw", "spdif_xtal_
static const char *spdif0_com_sel[] = { "spdif0_podf", "ssi1_root_gate", };
static const char *mx51_spdif1_com_sel[] = { "spdif1_podf", "ssi2_root_gate", };
-static struct clk *clk[IMX5_CLK_END];
+static struct clk_core *clk[IMX5_CLK_END];
static struct clk_onecell_data clk_data;
static void __init mx5_clocks_common_init(void __iomem *ccm_base)
@@ -289,26 +288,28 @@ static void __init mx5_clocks_common_init(void __iomem *ccm_base)
clk_register_clkdev(clk[IMX5_CLK_GPC_DVFS], "gpc_dvfs", NULL);
/* Set SDHC parents to be PLL2 */
- clk_set_parent(clk[IMX5_CLK_ESDHC_A_SEL], clk[IMX5_CLK_PLL2_SW]);
- clk_set_parent(clk[IMX5_CLK_ESDHC_B_SEL], clk[IMX5_CLK_PLL2_SW]);
+ clk_provider_set_parent(clk[IMX5_CLK_ESDHC_A_SEL],
+ clk[IMX5_CLK_PLL2_SW]);
+ clk_provider_set_parent(clk[IMX5_CLK_ESDHC_B_SEL],
+ clk[IMX5_CLK_PLL2_SW]);
/* move usb phy clk to 24MHz */
- clk_set_parent(clk[IMX5_CLK_USB_PHY_SEL], clk[IMX5_CLK_OSC]);
-
- clk_prepare_enable(clk[IMX5_CLK_GPC_DVFS]);
- clk_prepare_enable(clk[IMX5_CLK_AHB_MAX]); /* esdhc3 */
- clk_prepare_enable(clk[IMX5_CLK_AIPS_TZ1]);
- clk_prepare_enable(clk[IMX5_CLK_AIPS_TZ2]); /* fec */
- clk_prepare_enable(clk[IMX5_CLK_SPBA]);
- clk_prepare_enable(clk[IMX5_CLK_EMI_FAST_GATE]); /* fec */
- clk_prepare_enable(clk[IMX5_CLK_EMI_SLOW_GATE]); /* eim */
- clk_prepare_enable(clk[IMX5_CLK_MIPI_HSC1_GATE]);
- clk_prepare_enable(clk[IMX5_CLK_MIPI_HSC2_GATE]);
- clk_prepare_enable(clk[IMX5_CLK_MIPI_ESC_GATE]);
- clk_prepare_enable(clk[IMX5_CLK_MIPI_HSP_GATE]);
- clk_prepare_enable(clk[IMX5_CLK_TMAX1]);
- clk_prepare_enable(clk[IMX5_CLK_TMAX2]); /* esdhc2, fec */
- clk_prepare_enable(clk[IMX5_CLK_TMAX3]); /* esdhc1, esdhc4 */
+ clk_provider_set_parent(clk[IMX5_CLK_USB_PHY_SEL], clk[IMX5_CLK_OSC]);
+
+ clk_provider_prepare_enable(clk[IMX5_CLK_GPC_DVFS]);
+ clk_provider_prepare_enable(clk[IMX5_CLK_AHB_MAX]); /* esdhc3 */
+ clk_provider_prepare_enable(clk[IMX5_CLK_AIPS_TZ1]);
+ clk_provider_prepare_enable(clk[IMX5_CLK_AIPS_TZ2]); /* fec */
+ clk_provider_prepare_enable(clk[IMX5_CLK_SPBA]);
+ clk_provider_prepare_enable(clk[IMX5_CLK_EMI_FAST_GATE]); /* fec */
+ clk_provider_prepare_enable(clk[IMX5_CLK_EMI_SLOW_GATE]); /* eim */
+ clk_provider_prepare_enable(clk[IMX5_CLK_MIPI_HSC1_GATE]);
+ clk_provider_prepare_enable(clk[IMX5_CLK_MIPI_HSC2_GATE]);
+ clk_provider_prepare_enable(clk[IMX5_CLK_MIPI_ESC_GATE]);
+ clk_provider_prepare_enable(clk[IMX5_CLK_MIPI_HSP_GATE]);
+ clk_provider_prepare_enable(clk[IMX5_CLK_TMAX1]);
+ clk_provider_prepare_enable(clk[IMX5_CLK_TMAX2]); /* esdhc2, fec */
+ clk_provider_prepare_enable(clk[IMX5_CLK_TMAX3]); /* esdhc1, esdhc4 */
}
static void __init mx50_clocks_init(struct device_node *np)
@@ -361,15 +362,15 @@ static void __init mx50_clocks_init(struct device_node *np)
of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
/* set SDHC root clock to 200MHZ*/
- clk_set_rate(clk[IMX5_CLK_ESDHC_A_PODF], 200000000);
- clk_set_rate(clk[IMX5_CLK_ESDHC_B_PODF], 200000000);
+ clk_provider_set_rate(clk[IMX5_CLK_ESDHC_A_PODF], 200000000);
+ clk_provider_set_rate(clk[IMX5_CLK_ESDHC_B_PODF], 200000000);
- clk_prepare_enable(clk[IMX5_CLK_IIM_GATE]);
+ clk_provider_prepare_enable(clk[IMX5_CLK_IIM_GATE]);
imx_print_silicon_rev("i.MX50", IMX_CHIP_REVISION_1_1);
- clk_disable_unprepare(clk[IMX5_CLK_IIM_GATE]);
+ clk_provider_disable_unprepare(clk[IMX5_CLK_IIM_GATE]);
- r = clk_round_rate(clk[IMX5_CLK_USBOH3_PER_GATE], 54000000);
- clk_set_rate(clk[IMX5_CLK_USBOH3_PER_GATE], r);
+ r = clk_provider_round_rate(clk[IMX5_CLK_USBOH3_PER_GATE], 54000000);
+ clk_provider_set_rate(clk[IMX5_CLK_USBOH3_PER_GATE], r);
}
CLK_OF_DECLARE(imx50_ccm, "fsl,imx50-ccm", mx50_clocks_init);
@@ -435,15 +436,16 @@ static void __init mx51_clocks_init(struct device_node *np)
of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
/* set the usboh3 parent to pll2_sw */
- clk_set_parent(clk[IMX5_CLK_USBOH3_SEL], clk[IMX5_CLK_PLL2_SW]);
+ clk_provider_set_parent(clk[IMX5_CLK_USBOH3_SEL],
+ clk[IMX5_CLK_PLL2_SW]);
/* set SDHC root clock to 166.25MHZ*/
- clk_set_rate(clk[IMX5_CLK_ESDHC_A_PODF], 166250000);
- clk_set_rate(clk[IMX5_CLK_ESDHC_B_PODF], 166250000);
+ clk_provider_set_rate(clk[IMX5_CLK_ESDHC_A_PODF], 166250000);
+ clk_provider_set_rate(clk[IMX5_CLK_ESDHC_B_PODF], 166250000);
- clk_prepare_enable(clk[IMX5_CLK_IIM_GATE]);
+ clk_provider_prepare_enable(clk[IMX5_CLK_IIM_GATE]);
imx_print_silicon_rev("i.MX51", mx51_revision());
- clk_disable_unprepare(clk[IMX5_CLK_IIM_GATE]);
+ clk_provider_disable_unprepare(clk[IMX5_CLK_IIM_GATE]);
/*
* Reference Manual says: Functionality of CCDR[18] and CLPCR[23] is no
@@ -545,17 +547,17 @@ static void __init mx53_clocks_init(struct device_node *np)
of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
/* set SDHC root clock to 200MHZ*/
- clk_set_rate(clk[IMX5_CLK_ESDHC_A_PODF], 200000000);
- clk_set_rate(clk[IMX5_CLK_ESDHC_B_PODF], 200000000);
+ clk_provider_set_rate(clk[IMX5_CLK_ESDHC_A_PODF], 200000000);
+ clk_provider_set_rate(clk[IMX5_CLK_ESDHC_B_PODF], 200000000);
/* move can bus clk to 24MHz */
- clk_set_parent(clk[IMX5_CLK_CAN_SEL], clk[IMX5_CLK_LP_APM]);
+ clk_provider_set_parent(clk[IMX5_CLK_CAN_SEL], clk[IMX5_CLK_LP_APM]);
- clk_prepare_enable(clk[IMX5_CLK_IIM_GATE]);
+ clk_provider_prepare_enable(clk[IMX5_CLK_IIM_GATE]);
imx_print_silicon_rev("i.MX53", mx53_revision());
- clk_disable_unprepare(clk[IMX5_CLK_IIM_GATE]);
+ clk_provider_disable_unprepare(clk[IMX5_CLK_IIM_GATE]);
- r = clk_round_rate(clk[IMX5_CLK_USBOH3_PER_GATE], 54000000);
- clk_set_rate(clk[IMX5_CLK_USBOH3_PER_GATE], r);
+ r = clk_provider_round_rate(clk[IMX5_CLK_USBOH3_PER_GATE], 54000000);
+ clk_provider_set_rate(clk[IMX5_CLK_USBOH3_PER_GATE], r);
}
CLK_OF_DECLARE(imx53_ccm, "fsl,imx53-ccm", mx53_clocks_init);
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index 29d4129..1a816a2 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -12,7 +12,6 @@
#include <linux/init.h>
#include <linux/types.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/err.h>
#include <linux/io.h>
@@ -74,7 +73,7 @@ static const char *lvds_sels[] = {
"pcie_ref_125m", "sata_ref_100m",
};
-static struct clk *clk[IMX6QDL_CLK_END];
+static struct clk_core *clk[IMX6QDL_CLK_END];
static struct clk_onecell_data clk_data;
static unsigned int const clks_init_on[] __initconst = {
@@ -414,50 +413,65 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
if ((imx_get_soc_revision() != IMX_CHIP_REVISION_1_0) ||
cpu_is_imx6dl()) {
- clk_set_parent(clk[IMX6QDL_CLK_LDB_DI0_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
- clk_set_parent(clk[IMX6QDL_CLK_LDB_DI1_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_LDB_DI0_SEL],
+ clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_LDB_DI1_SEL],
+ clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
}
- clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI0_PRE_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
- clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI1_PRE_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
- clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI0_PRE_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
- clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI1_PRE_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
- clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI0_SEL], clk[IMX6QDL_CLK_IPU1_DI0_PRE]);
- clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI1_SEL], clk[IMX6QDL_CLK_IPU1_DI1_PRE]);
- clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI0_SEL], clk[IMX6QDL_CLK_IPU2_DI0_PRE]);
- clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI1_SEL], clk[IMX6QDL_CLK_IPU2_DI1_PRE]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_IPU1_DI0_PRE_SEL],
+ clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_IPU1_DI1_PRE_SEL],
+ clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_IPU2_DI0_PRE_SEL],
+ clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_IPU2_DI1_PRE_SEL],
+ clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_IPU1_DI0_SEL],
+ clk[IMX6QDL_CLK_IPU1_DI0_PRE]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_IPU1_DI1_SEL],
+ clk[IMX6QDL_CLK_IPU1_DI1_PRE]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_IPU2_DI0_SEL],
+ clk[IMX6QDL_CLK_IPU2_DI0_PRE]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_IPU2_DI1_SEL],
+ clk[IMX6QDL_CLK_IPU2_DI1_PRE]);
/*
* The gpmi needs 100MHz frequency in the EDO/Sync mode,
* We can not get the 100MHz from the pll2_pfd0_352m.
* So choose pll2_pfd2_396m as enfc_sel's parent.
*/
- clk_set_parent(clk[IMX6QDL_CLK_ENFC_SEL], clk[IMX6QDL_CLK_PLL2_PFD2_396M]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_ENFC_SEL],
+ clk[IMX6QDL_CLK_PLL2_PFD2_396M]);
for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
- clk_prepare_enable(clk[clks_init_on[i]]);
+ clk_provider_prepare_enable(clk[clks_init_on[i]]);
if (IS_ENABLED(CONFIG_USB_MXS_PHY)) {
- clk_prepare_enable(clk[IMX6QDL_CLK_USBPHY1_GATE]);
- clk_prepare_enable(clk[IMX6QDL_CLK_USBPHY2_GATE]);
+ clk_provider_prepare_enable(clk[IMX6QDL_CLK_USBPHY1_GATE]);
+ clk_provider_prepare_enable(clk[IMX6QDL_CLK_USBPHY2_GATE]);
}
/*
* Let's initially set up CLKO with OSC24M, since this configuration
* is widely used by imx6q board designs to clock audio codec.
*/
- ret = clk_set_parent(clk[IMX6QDL_CLK_CKO2_SEL], clk[IMX6QDL_CLK_OSC]);
+ ret = clk_provider_set_parent(clk[IMX6QDL_CLK_CKO2_SEL],
+ clk[IMX6QDL_CLK_OSC]);
if (!ret)
- ret = clk_set_parent(clk[IMX6QDL_CLK_CKO], clk[IMX6QDL_CLK_CKO2]);
+ ret = clk_provider_set_parent(clk[IMX6QDL_CLK_CKO],
+ clk[IMX6QDL_CLK_CKO2]);
if (ret)
pr_warn("failed to set up CLKO: %d\n", ret);
/* Audio-related clocks configuration */
- clk_set_parent(clk[IMX6QDL_CLK_SPDIF_SEL], clk[IMX6QDL_CLK_PLL3_PFD3_454M]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_SPDIF_SEL],
+ clk[IMX6QDL_CLK_PLL3_PFD3_454M]);
/* All existing boards with PCIe use LVDS1 */
if (IS_ENABLED(CONFIG_PCI_IMX6))
- clk_set_parent(clk[IMX6QDL_CLK_LVDS1_SEL], clk[IMX6QDL_CLK_SATA_REF_100M]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_LVDS1_SEL],
+ clk[IMX6QDL_CLK_SATA_REF_100M]);
/* Set initial power mode */
imx6q_set_lpm(WAIT_CLOCKED);
diff --git a/arch/arm/mach-imx/clk-imx6sl.c b/arch/arm/mach-imx/clk-imx6sl.c
index fef46fa..9f1224d 100644
--- a/arch/arm/mach-imx/clk-imx6sl.c
+++ b/arch/arm/mach-imx/clk-imx6sl.c
@@ -7,7 +7,6 @@
*
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/err.h>
#include <linux/of.h>
@@ -79,7 +78,7 @@ static struct clk_div_table video_div_table[] = {
{ }
};
-static struct clk *clks[IMX6SL_CLK_END];
+static struct clk_core *clks[IMX6SL_CLK_END];
static struct clk_onecell_data clk_data;
static void __iomem *ccm_base;
static void __iomem *anatop_base;
@@ -355,7 +354,7 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node)
of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
/* Ensure the AHB clk is at 132MHz. */
- ret = clk_set_rate(clks[IMX6SL_CLK_AHB], 132000000);
+ ret = clk_provider_set_rate(clks[IMX6SL_CLK_AHB], 132000000);
if (ret)
pr_warn("%s: failed to set AHB clock rate %d!\n",
__func__, ret);
@@ -365,15 +364,16 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node)
* usecount and enabling/disabling of parent PLLs.
*/
for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
- clk_prepare_enable(clks[clks_init_on[i]]);
+ clk_provider_prepare_enable(clks[clks_init_on[i]]);
if (IS_ENABLED(CONFIG_USB_MXS_PHY)) {
- clk_prepare_enable(clks[IMX6SL_CLK_USBPHY1_GATE]);
- clk_prepare_enable(clks[IMX6SL_CLK_USBPHY2_GATE]);
+ clk_provider_prepare_enable(clks[IMX6SL_CLK_USBPHY1_GATE]);
+ clk_provider_prepare_enable(clks[IMX6SL_CLK_USBPHY2_GATE]);
}
/* Audio-related clocks configuration */
- clk_set_parent(clks[IMX6SL_CLK_SPDIF0_SEL], clks[IMX6SL_CLK_PLL3_PFD3]);
+ clk_provider_set_parent(clks[IMX6SL_CLK_SPDIF0_SEL],
+ clks[IMX6SL_CLK_PLL3_PFD3]);
/* Set initial power mode */
imx6q_set_lpm(WAIT_CLOCKED);
diff --git a/arch/arm/mach-imx/clk-imx6sx.c b/arch/arm/mach-imx/clk-imx6sx.c
index ecde72b..1f2bc4b 100644
--- a/arch/arm/mach-imx/clk-imx6sx.c
+++ b/arch/arm/mach-imx/clk-imx6sx.c
@@ -10,7 +10,6 @@
*/
#include <dt-bindings/clock/imx6sx-clock.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/err.h>
#include <linux/init.h>
@@ -82,7 +81,7 @@ static const char *lvds_sels[] = {
"dummy", "dummy", "pcie_ref_125m", "dummy", "usbphy1", "usbphy2",
};
-static struct clk *clks[IMX6SX_CLK_CLK_END];
+static struct clk_core *clks[IMX6SX_CLK_CLK_END];
static struct clk_onecell_data clk_data;
static int const clks_init_on[] __initconst = {
@@ -136,12 +135,14 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
clks[IMX6SX_CLK_DUMMY] = imx_clk_fixed("dummy", 0);
- clks[IMX6SX_CLK_CKIL] = of_clk_get_by_name(ccm_node, "ckil");
- clks[IMX6SX_CLK_OSC] = of_clk_get_by_name(ccm_node, "osc");
+ clks[IMX6SX_CLK_CKIL] = of_clk_provider_get_by_name(ccm_node, "ckil");
+ clks[IMX6SX_CLK_OSC] = of_clk_provider_get_by_name(ccm_node, "osc");
/* ipp_di clock is external input */
- clks[IMX6SX_CLK_IPP_DI0] = of_clk_get_by_name(ccm_node, "ipp_di0");
- clks[IMX6SX_CLK_IPP_DI1] = of_clk_get_by_name(ccm_node, "ipp_di1");
+ clks[IMX6SX_CLK_IPP_DI0] = of_clk_provider_get_by_name(ccm_node,
+ "ipp_di0");
+ clks[IMX6SX_CLK_IPP_DI1] = of_clk_provider_get_by_name(ccm_node,
+ "ipp_di1");
np = of_find_compatible_node(NULL, NULL, "fsl,imx6sx-anatop");
base = of_iomap(np, 0);
@@ -453,65 +454,80 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
- clk_prepare_enable(clks[clks_init_on[i]]);
+ clk_provider_prepare_enable(clks[clks_init_on[i]]);
if (IS_ENABLED(CONFIG_USB_MXS_PHY)) {
- clk_prepare_enable(clks[IMX6SX_CLK_USBPHY1_GATE]);
- clk_prepare_enable(clks[IMX6SX_CLK_USBPHY2_GATE]);
+ clk_provider_prepare_enable(clks[IMX6SX_CLK_USBPHY1_GATE]);
+ clk_provider_prepare_enable(clks[IMX6SX_CLK_USBPHY2_GATE]);
}
/* Set the default 132MHz for EIM module */
- clk_set_parent(clks[IMX6SX_CLK_EIM_SLOW_SEL], clks[IMX6SX_CLK_PLL2_PFD2]);
- clk_set_rate(clks[IMX6SX_CLK_EIM_SLOW], 132000000);
+ clk_provider_set_parent(clks[IMX6SX_CLK_EIM_SLOW_SEL],
+ clks[IMX6SX_CLK_PLL2_PFD2]);
+ clk_provider_set_rate(clks[IMX6SX_CLK_EIM_SLOW], 132000000);
/* set parent clock for LCDIF1 pixel clock */
- clk_set_parent(clks[IMX6SX_CLK_LCDIF1_PRE_SEL], clks[IMX6SX_CLK_PLL5_VIDEO_DIV]);
- clk_set_parent(clks[IMX6SX_CLK_LCDIF1_SEL], clks[IMX6SX_CLK_LCDIF1_PODF]);
+ clk_provider_set_parent(clks[IMX6SX_CLK_LCDIF1_PRE_SEL],
+ clks[IMX6SX_CLK_PLL5_VIDEO_DIV]);
+ clk_provider_set_parent(clks[IMX6SX_CLK_LCDIF1_SEL],
+ clks[IMX6SX_CLK_LCDIF1_PODF]);
/* Set the parent clks of PCIe lvds1 and pcie_axi to be pcie ref, axi */
- if (clk_set_parent(clks[IMX6SX_CLK_LVDS1_SEL], clks[IMX6SX_CLK_PCIE_REF_125M]))
+ if (clk_provider_set_parent(clks[IMX6SX_CLK_LVDS1_SEL], clks[IMX6SX_CLK_PCIE_REF_125M]))
pr_err("Failed to set pcie bus parent clk.\n");
- if (clk_set_parent(clks[IMX6SX_CLK_PCIE_AXI_SEL], clks[IMX6SX_CLK_AXI]))
+ if (clk_provider_set_parent(clks[IMX6SX_CLK_PCIE_AXI_SEL], clks[IMX6SX_CLK_AXI]))
pr_err("Failed to set pcie parent clk.\n");
/*
* Init enet system AHB clock, set to 200Mhz
* pll2_pfd2_396m-> ENET_PODF-> ENET_AHB
*/
- clk_set_parent(clks[IMX6SX_CLK_ENET_PRE_SEL], clks[IMX6SX_CLK_PLL2_PFD2]);
- clk_set_parent(clks[IMX6SX_CLK_ENET_SEL], clks[IMX6SX_CLK_ENET_PODF]);
- clk_set_rate(clks[IMX6SX_CLK_ENET_PODF], 200000000);
- clk_set_rate(clks[IMX6SX_CLK_ENET_REF], 125000000);
- clk_set_rate(clks[IMX6SX_CLK_ENET2_REF], 125000000);
+ clk_provider_set_parent(clks[IMX6SX_CLK_ENET_PRE_SEL],
+ clks[IMX6SX_CLK_PLL2_PFD2]);
+ clk_provider_set_parent(clks[IMX6SX_CLK_ENET_SEL],
+ clks[IMX6SX_CLK_ENET_PODF]);
+ clk_provider_set_rate(clks[IMX6SX_CLK_ENET_PODF], 200000000);
+ clk_provider_set_rate(clks[IMX6SX_CLK_ENET_REF], 125000000);
+ clk_provider_set_rate(clks[IMX6SX_CLK_ENET2_REF], 125000000);
/* Audio clocks */
- clk_set_rate(clks[IMX6SX_CLK_PLL4_AUDIO_DIV], 393216000);
-
- clk_set_parent(clks[IMX6SX_CLK_SPDIF_SEL], clks[IMX6SX_CLK_PLL4_AUDIO_DIV]);
- clk_set_rate(clks[IMX6SX_CLK_SPDIF_PODF], 98304000);
-
- clk_set_parent(clks[IMX6SX_CLK_AUDIO_SEL], clks[IMX6SX_CLK_PLL3_USB_OTG]);
- clk_set_rate(clks[IMX6SX_CLK_AUDIO_PODF], 24000000);
-
- clk_set_parent(clks[IMX6SX_CLK_SSI1_SEL], clks[IMX6SX_CLK_PLL4_AUDIO_DIV]);
- clk_set_parent(clks[IMX6SX_CLK_SSI2_SEL], clks[IMX6SX_CLK_PLL4_AUDIO_DIV]);
- clk_set_parent(clks[IMX6SX_CLK_SSI3_SEL], clks[IMX6SX_CLK_PLL4_AUDIO_DIV]);
- clk_set_rate(clks[IMX6SX_CLK_SSI1_PODF], 24576000);
- clk_set_rate(clks[IMX6SX_CLK_SSI2_PODF], 24576000);
- clk_set_rate(clks[IMX6SX_CLK_SSI3_PODF], 24576000);
-
- clk_set_parent(clks[IMX6SX_CLK_ESAI_SEL], clks[IMX6SX_CLK_PLL4_AUDIO_DIV]);
- clk_set_rate(clks[IMX6SX_CLK_ESAI_PODF], 24576000);
+ clk_provider_set_rate(clks[IMX6SX_CLK_PLL4_AUDIO_DIV], 393216000);
+
+ clk_provider_set_parent(clks[IMX6SX_CLK_SPDIF_SEL],
+ clks[IMX6SX_CLK_PLL4_AUDIO_DIV]);
+ clk_provider_set_rate(clks[IMX6SX_CLK_SPDIF_PODF], 98304000);
+
+ clk_provider_set_parent(clks[IMX6SX_CLK_AUDIO_SEL],
+ clks[IMX6SX_CLK_PLL3_USB_OTG]);
+ clk_provider_set_rate(clks[IMX6SX_CLK_AUDIO_PODF], 24000000);
+
+ clk_provider_set_parent(clks[IMX6SX_CLK_SSI1_SEL],
+ clks[IMX6SX_CLK_PLL4_AUDIO_DIV]);
+ clk_provider_set_parent(clks[IMX6SX_CLK_SSI2_SEL],
+ clks[IMX6SX_CLK_PLL4_AUDIO_DIV]);
+ clk_provider_set_parent(clks[IMX6SX_CLK_SSI3_SEL],
+ clks[IMX6SX_CLK_PLL4_AUDIO_DIV]);
+ clk_provider_set_rate(clks[IMX6SX_CLK_SSI1_PODF], 24576000);
+ clk_provider_set_rate(clks[IMX6SX_CLK_SSI2_PODF], 24576000);
+ clk_provider_set_rate(clks[IMX6SX_CLK_SSI3_PODF], 24576000);
+
+ clk_provider_set_parent(clks[IMX6SX_CLK_ESAI_SEL],
+ clks[IMX6SX_CLK_PLL4_AUDIO_DIV]);
+ clk_provider_set_rate(clks[IMX6SX_CLK_ESAI_PODF], 24576000);
/* Set parent clock for vadc */
- clk_set_parent(clks[IMX6SX_CLK_VID_SEL], clks[IMX6SX_CLK_PLL3_USB_OTG]);
+ clk_provider_set_parent(clks[IMX6SX_CLK_VID_SEL],
+ clks[IMX6SX_CLK_PLL3_USB_OTG]);
/* default parent of can_sel clock is invalid, manually set it here */
- clk_set_parent(clks[IMX6SX_CLK_CAN_SEL], clks[IMX6SX_CLK_PLL3_60M]);
+ clk_provider_set_parent(clks[IMX6SX_CLK_CAN_SEL],
+ clks[IMX6SX_CLK_PLL3_60M]);
/* Update gpu clock from default 528M to 720M */
- clk_set_parent(clks[IMX6SX_CLK_GPU_CORE_SEL], clks[IMX6SX_CLK_PLL3_PFD0]);
- clk_set_parent(clks[IMX6SX_CLK_GPU_AXI_SEL], clks[IMX6SX_CLK_PLL3_PFD0]);
+ clk_provider_set_parent(clks[IMX6SX_CLK_GPU_CORE_SEL],
+ clks[IMX6SX_CLK_PLL3_PFD0]);
+ clk_provider_set_parent(clks[IMX6SX_CLK_GPU_AXI_SEL],
+ clks[IMX6SX_CLK_PLL3_PFD0]);
/* Set initial power mode */
imx6q_set_lpm(WAIT_CLOCKED);
diff --git a/arch/arm/mach-imx/clk-pfd.c b/arch/arm/mach-imx/clk-pfd.c
index 0b0f6f6..7f172a2 100644
--- a/arch/arm/mach-imx/clk-pfd.c
+++ b/arch/arm/mach-imx/clk-pfd.c
@@ -10,7 +10,6 @@
* http://www.gnu.org/copyleft/gpl.html
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/io.h>
#include <linux/slab.h>
@@ -128,11 +127,11 @@ static const struct clk_ops clk_pfd_ops = {
.is_enabled = clk_pfd_is_enabled,
};
-struct clk *imx_clk_pfd(const char *name, const char *parent_name,
+struct clk_core *imx_clk_pfd(const char *name, const char *parent_name,
void __iomem *reg, u8 idx)
{
struct clk_pfd *pfd;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
pfd = kzalloc(sizeof(*pfd), GFP_KERNEL);
diff --git a/arch/arm/mach-imx/clk-pllv1.c b/arch/arm/mach-imx/clk-pllv1.c
index d21d14c..7ef2cab 100644
--- a/arch/arm/mach-imx/clk-pllv1.c
+++ b/arch/arm/mach-imx/clk-pllv1.c
@@ -1,4 +1,3 @@
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/io.h>
#include <linux/slab.h>
@@ -97,11 +96,11 @@ static struct clk_ops clk_pllv1_ops = {
.recalc_rate = clk_pllv1_recalc_rate,
};
-struct clk *imx_clk_pllv1(const char *name, const char *parent,
+struct clk_core *imx_clk_pllv1(const char *name, const char *parent,
void __iomem *base)
{
struct clk_pllv1 *pll;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
pll = kmalloc(sizeof(*pll), GFP_KERNEL);
diff --git a/arch/arm/mach-imx/clk-pllv2.c b/arch/arm/mach-imx/clk-pllv2.c
index 20889d5..3dca7df 100644
--- a/arch/arm/mach-imx/clk-pllv2.c
+++ b/arch/arm/mach-imx/clk-pllv2.c
@@ -1,5 +1,4 @@
#include <linux/kernel.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include <linux/errno.h>
#include <linux/delay.h>
@@ -237,11 +236,11 @@ static struct clk_ops clk_pllv2_ops = {
.set_rate = clk_pllv2_set_rate,
};
-struct clk *imx_clk_pllv2(const char *name, const char *parent,
+struct clk_core *imx_clk_pllv2(const char *name, const char *parent,
void __iomem *base)
{
struct clk_pllv2 *pll;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
pll = kzalloc(sizeof(*pll), GFP_KERNEL);
diff --git a/arch/arm/mach-imx/clk-pllv3.c b/arch/arm/mach-imx/clk-pllv3.c
index 6136405..a07603d 100644
--- a/arch/arm/mach-imx/clk-pllv3.c
+++ b/arch/arm/mach-imx/clk-pllv3.c
@@ -10,7 +10,6 @@
* http://www.gnu.org/copyleft/gpl.html
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/delay.h>
#include <linux/io.h>
@@ -320,13 +319,13 @@ static const struct clk_ops clk_pllv3_enet_ops = {
.recalc_rate = clk_pllv3_enet_recalc_rate,
};
-struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
+struct clk_core *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
const char *parent_name, void __iomem *base,
u32 div_mask)
{
struct clk_pllv3 *pll;
const struct clk_ops *ops;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
pll = kzalloc(sizeof(*pll), GFP_KERNEL);
diff --git a/arch/arm/mach-imx/clk-vf610.c b/arch/arm/mach-imx/clk-vf610.c
index f60d6d5..bd2450b 100644
--- a/arch/arm/mach-imx/clk-vf610.c
+++ b/arch/arm/mach-imx/clk-vf610.c
@@ -9,7 +9,6 @@
*/
#include <linux/of_address.h>
-#include <linux/clk.h>
#include <dt-bindings/clock/vf610-clock.h>
#include "clk.h"
@@ -95,7 +94,7 @@ static struct clk_div_table pll4_main_div_table[] = {
{ }
};
-static struct clk *clk[VF610_CLK_END];
+static struct clk_core *clk[VF610_CLK_END];
static struct clk_onecell_data clk_data;
static void __init vf610_clocks_init(struct device_node *ccm_node)
@@ -307,20 +306,32 @@ static void __init vf610_clocks_init(struct device_node *ccm_node)
imx_check_clocks(clk, ARRAY_SIZE(clk));
- clk_set_parent(clk[VF610_CLK_QSPI0_SEL], clk[VF610_CLK_PLL1_PFD4]);
- clk_set_rate(clk[VF610_CLK_QSPI0_X4_DIV], clk_get_rate(clk[VF610_CLK_QSPI0_SEL]) / 2);
- clk_set_rate(clk[VF610_CLK_QSPI0_X2_DIV], clk_get_rate(clk[VF610_CLK_QSPI0_X4_DIV]) / 2);
- clk_set_rate(clk[VF610_CLK_QSPI0_X1_DIV], clk_get_rate(clk[VF610_CLK_QSPI0_X2_DIV]) / 2);
-
- clk_set_parent(clk[VF610_CLK_QSPI1_SEL], clk[VF610_CLK_PLL1_PFD4]);
- clk_set_rate(clk[VF610_CLK_QSPI1_X4_DIV], clk_get_rate(clk[VF610_CLK_QSPI1_SEL]) / 2);
- clk_set_rate(clk[VF610_CLK_QSPI1_X2_DIV], clk_get_rate(clk[VF610_CLK_QSPI1_X4_DIV]) / 2);
- clk_set_rate(clk[VF610_CLK_QSPI1_X1_DIV], clk_get_rate(clk[VF610_CLK_QSPI1_X2_DIV]) / 2);
-
- clk_set_parent(clk[VF610_CLK_SAI0_SEL], clk[VF610_CLK_AUDIO_EXT]);
- clk_set_parent(clk[VF610_CLK_SAI1_SEL], clk[VF610_CLK_AUDIO_EXT]);
- clk_set_parent(clk[VF610_CLK_SAI2_SEL], clk[VF610_CLK_AUDIO_EXT]);
- clk_set_parent(clk[VF610_CLK_SAI3_SEL], clk[VF610_CLK_AUDIO_EXT]);
+ clk_provider_set_parent(clk[VF610_CLK_QSPI0_SEL],
+ clk[VF610_CLK_PLL1_PFD4]);
+ clk_provider_set_rate(clk[VF610_CLK_QSPI0_X4_DIV],
+ clk_provider_get_rate(clk[VF610_CLK_QSPI0_SEL]) / 2);
+ clk_provider_set_rate(clk[VF610_CLK_QSPI0_X2_DIV],
+ clk_provider_get_rate(clk[VF610_CLK_QSPI0_X4_DIV]) / 2);
+ clk_provider_set_rate(clk[VF610_CLK_QSPI0_X1_DIV],
+ clk_provider_get_rate(clk[VF610_CLK_QSPI0_X2_DIV]) / 2);
+
+ clk_provider_set_parent(clk[VF610_CLK_QSPI1_SEL],
+ clk[VF610_CLK_PLL1_PFD4]);
+ clk_provider_set_rate(clk[VF610_CLK_QSPI1_X4_DIV],
+ clk_provider_get_rate(clk[VF610_CLK_QSPI1_SEL]) / 2);
+ clk_provider_set_rate(clk[VF610_CLK_QSPI1_X2_DIV],
+ clk_provider_get_rate(clk[VF610_CLK_QSPI1_X4_DIV]) / 2);
+ clk_provider_set_rate(clk[VF610_CLK_QSPI1_X1_DIV],
+ clk_provider_get_rate(clk[VF610_CLK_QSPI1_X2_DIV]) / 2);
+
+ clk_provider_set_parent(clk[VF610_CLK_SAI0_SEL],
+ clk[VF610_CLK_AUDIO_EXT]);
+ clk_provider_set_parent(clk[VF610_CLK_SAI1_SEL],
+ clk[VF610_CLK_AUDIO_EXT]);
+ clk_provider_set_parent(clk[VF610_CLK_SAI2_SEL],
+ clk[VF610_CLK_AUDIO_EXT]);
+ clk_provider_set_parent(clk[VF610_CLK_SAI3_SEL],
+ clk[VF610_CLK_AUDIO_EXT]);
/* Add the clocks to provider list */
clk_data.clks = clk;
diff --git a/arch/arm/mach-imx/clk.c b/arch/arm/mach-imx/clk.c
index df12b53..fc54203 100644
--- a/arch/arm/mach-imx/clk.c
+++ b/arch/arm/mach-imx/clk.c
@@ -1,4 +1,3 @@
-#include <linux/clk.h>
#include <linux/err.h>
#include <linux/of.h>
#include <linux/slab.h>
@@ -7,7 +6,7 @@
DEFINE_SPINLOCK(imx_ccm_lock);
-void __init imx_check_clocks(struct clk *clks[], unsigned int count)
+void __init imx_check_clocks(struct clk_core *clks[], unsigned int count)
{
unsigned i;
@@ -17,10 +16,10 @@ void __init imx_check_clocks(struct clk *clks[], unsigned int count)
i, PTR_ERR(clks[i]));
}
-static struct clk * __init imx_obtain_fixed_clock_from_dt(const char *name)
+static struct clk_core * __init imx_obtain_fixed_clock_from_dt(const char *name)
{
struct of_phandle_args phandle;
- struct clk *clk = ERR_PTR(-ENODEV);
+ struct clk_core *clk = ERR_PTR(-ENODEV);
char *path;
path = kasprintf(GFP_KERNEL, "/clocks/%s", name);
@@ -37,10 +36,10 @@ static struct clk * __init imx_obtain_fixed_clock_from_dt(const char *name)
return clk;
}
-struct clk * __init imx_obtain_fixed_clock(
+struct clk_core * __init imx_obtain_fixed_clock(
const char *name, unsigned long rate)
{
- struct clk *clk;
+ struct clk_core *clk;
clk = imx_obtain_fixed_clock_from_dt(name);
if (IS_ERR(clk))
diff --git a/arch/arm/mach-imx/clk.h b/arch/arm/mach-imx/clk.h
index d5ba76f..0926889 100644
--- a/arch/arm/mach-imx/clk.h
+++ b/arch/arm/mach-imx/clk.h
@@ -6,14 +6,14 @@
extern spinlock_t imx_ccm_lock;
-void imx_check_clocks(struct clk *clks[], unsigned int count);
+void imx_check_clocks(struct clk_core *clks[], unsigned int count);
extern void imx_cscmr1_fixup(u32 *val);
-struct clk *imx_clk_pllv1(const char *name, const char *parent,
+struct clk_core *imx_clk_pllv1(const char *name, const char *parent,
void __iomem *base);
-struct clk *imx_clk_pllv2(const char *name, const char *parent,
+struct clk_core *imx_clk_pllv2(const char *name, const char *parent,
void __iomem *base);
enum imx_pllv3_type {
@@ -24,26 +24,26 @@ enum imx_pllv3_type {
IMX_PLLV3_ENET,
};
-struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
+struct clk_core *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
const char *parent_name, void __iomem *base, u32 div_mask);
-struct clk *clk_register_gate2(struct device *dev, const char *name,
+struct clk_core *clk_register_gate2(struct device *dev, const char *name,
const char *parent_name, unsigned long flags,
void __iomem *reg, u8 bit_idx,
u8 clk_gate_flags, spinlock_t *lock,
unsigned int *share_count);
-struct clk * imx_obtain_fixed_clock(
+struct clk_core * imx_obtain_fixed_clock(
const char *name, unsigned long rate);
-static inline struct clk *imx_clk_gate2(const char *name, const char *parent,
+static inline struct clk_core *imx_clk_gate2(const char *name, const char *parent,
void __iomem *reg, u8 shift)
{
return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
shift, 0, &imx_ccm_lock, NULL);
}
-static inline struct clk *imx_clk_gate2_shared(const char *name,
+static inline struct clk_core *imx_clk_gate2_shared(const char *name,
const char *parent, void __iomem *reg, u8 shift,
unsigned int *share_count)
{
@@ -51,38 +51,38 @@ static inline struct clk *imx_clk_gate2_shared(const char *name,
shift, 0, &imx_ccm_lock, share_count);
}
-struct clk *imx_clk_pfd(const char *name, const char *parent_name,
+struct clk_core *imx_clk_pfd(const char *name, const char *parent_name,
void __iomem *reg, u8 idx);
-struct clk *imx_clk_busy_divider(const char *name, const char *parent_name,
+struct clk_core *imx_clk_busy_divider(const char *name, const char *parent_name,
void __iomem *reg, u8 shift, u8 width,
void __iomem *busy_reg, u8 busy_shift);
-struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift,
+struct clk_core *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift,
u8 width, void __iomem *busy_reg, u8 busy_shift,
const char **parent_names, int num_parents);
-struct clk *imx_clk_fixup_divider(const char *name, const char *parent,
+struct clk_core *imx_clk_fixup_divider(const char *name, const char *parent,
void __iomem *reg, u8 shift, u8 width,
void (*fixup)(u32 *val));
-struct clk *imx_clk_fixup_mux(const char *name, void __iomem *reg,
+struct clk_core *imx_clk_fixup_mux(const char *name, void __iomem *reg,
u8 shift, u8 width, const char **parents,
int num_parents, void (*fixup)(u32 *val));
-static inline struct clk *imx_clk_fixed(const char *name, int rate)
+static inline struct clk_core *imx_clk_fixed(const char *name, int rate)
{
return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate);
}
-static inline struct clk *imx_clk_divider(const char *name, const char *parent,
+static inline struct clk_core *imx_clk_divider(const char *name, const char *parent,
void __iomem *reg, u8 shift, u8 width)
{
return clk_register_divider(NULL, name, parent, CLK_SET_RATE_PARENT,
reg, shift, width, 0, &imx_ccm_lock);
}
-static inline struct clk *imx_clk_divider_flags(const char *name,
+static inline struct clk_core *imx_clk_divider_flags(const char *name,
const char *parent, void __iomem *reg, u8 shift, u8 width,
unsigned long flags)
{
@@ -90,21 +90,21 @@ static inline struct clk *imx_clk_divider_flags(const char *name,
reg, shift, width, 0, &imx_ccm_lock);
}
-static inline struct clk *imx_clk_gate(const char *name, const char *parent,
+static inline struct clk_core *imx_clk_gate(const char *name, const char *parent,
void __iomem *reg, u8 shift)
{
return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
shift, 0, &imx_ccm_lock);
}
-static inline struct clk *imx_clk_gate_dis(const char *name, const char *parent,
+static inline struct clk_core *imx_clk_gate_dis(const char *name, const char *parent,
void __iomem *reg, u8 shift)
{
return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
shift, CLK_GATE_SET_TO_DISABLE, &imx_ccm_lock);
}
-static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg,
+static inline struct clk_core *imx_clk_mux(const char *name, void __iomem *reg,
u8 shift, u8 width, const char **parents, int num_parents)
{
return clk_register_mux(NULL, name, parents, num_parents,
@@ -112,7 +112,7 @@ static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg,
width, 0, &imx_ccm_lock);
}
-static inline struct clk *imx_clk_mux_flags(const char *name,
+static inline struct clk_core *imx_clk_mux_flags(const char *name,
void __iomem *reg, u8 shift, u8 width, const char **parents,
int num_parents, unsigned long flags)
{
@@ -121,7 +121,7 @@ static inline struct clk *imx_clk_mux_flags(const char *name,
&imx_ccm_lock);
}
-static inline struct clk *imx_clk_fixed_factor(const char *name,
+static inline struct clk_core *imx_clk_fixed_factor(const char *name,
const char *parent, unsigned int mult, unsigned int div)
{
return clk_register_fixed_factor(NULL, name, parent,
diff --git a/arch/arm/mach-msm/clock-pcom.c b/arch/arm/mach-msm/clock-pcom.c
index 9a80449..14352c4 100644
--- a/arch/arm/mach-msm/clock-pcom.c
+++ b/arch/arm/mach-msm/clock-pcom.c
@@ -132,7 +132,7 @@ static int msm_clock_pcom_probe(struct platform_device *pdev)
for (i = 0; i < pdata->num_lookups; i++) {
const struct clk_pcom_desc *desc = &pdata->lookup[i];
- struct clk *c;
+ struct clk_core *c;
struct clk_pcom *p;
struct clk_hw *hw;
struct clk_init_data init;
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
index e6ac679..fee2643 100644
--- a/arch/arm/mach-mv78xx0/common.c
+++ b/arch/arm/mach-mv78xx0/common.c
@@ -164,7 +164,7 @@ void __init mv78xx0_map_io(void)
/*****************************************************************************
* CLK tree
****************************************************************************/
-static struct clk *tclk;
+static struct clk_core *tclk;
static void __init clk_init(void)
{
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index 018353d..0f41427 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -551,7 +551,7 @@ static struct regulator_consumer_supply cm_t35_camera_supplies[] = {
static void __init cm_t35_init_camera(void)
{
- struct clk *clk;
+ struct clk_core *clk;
clk = clk_register_fixed_rate(NULL, "mt9t001-clkin", NULL, CLK_IS_ROOT,
48000000);
diff --git a/arch/arm/mach-omap2/cclock3xxx_data.c b/arch/arm/mach-omap2/cclock3xxx_data.c
index eb8c75e..1180abe 100644
--- a/arch/arm/mach-omap2/cclock3xxx_data.c
+++ b/arch/arm/mach-omap2/cclock3xxx_data.c
@@ -18,7 +18,6 @@
*/
#include <linux/kernel.h>
-#include <linux/clk.h>
#include <linux/clk-private.h>
#include <linux/list.h>
#include <linux/io.h>
@@ -107,7 +106,7 @@ static struct dpll_data dpll3_dd = {
.max_divider = OMAP3_MAX_DPLL_DIV,
};
-static struct clk dpll3_ck;
+static struct clk_core dpll3_ck;
static const char *dpll3_ck_parent_names[] = {
"sys_ck",
@@ -137,7 +136,7 @@ DEFINE_CLK_DIVIDER(dpll3_m2_ck, "dpll3_ck", &dpll3_ck, 0x0,
OMAP3430_CORE_DPLL_CLKOUT_DIV_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk core_ck;
+static struct clk_core core_ck;
static const char *core_ck_parent_names[] = {
"dpll3_m2_ck",
@@ -158,7 +157,7 @@ DEFINE_CLK_DIVIDER(l4_ick, "l3_ick", &l3_ick, 0x0,
OMAP3430_CLKSEL_L4_SHIFT, OMAP3430_CLKSEL_L4_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk security_l4_ick2;
+static struct clk_core security_l4_ick2;
static const char *security_l4_ick2_parent_names[] = {
"l4_ick",
@@ -167,7 +166,7 @@ static const char *security_l4_ick2_parent_names[] = {
DEFINE_STRUCT_CLK_HW_OMAP(security_l4_ick2, NULL);
DEFINE_STRUCT_CLK(security_l4_ick2, security_l4_ick2_parent_names, core_ck_ops);
-static struct clk aes1_ick;
+static struct clk_core aes1_ick;
static const char *aes1_ick_parent_names[] = {
"security_l4_ick2",
@@ -190,7 +189,7 @@ static struct clk_hw_omap aes1_ick_hw = {
DEFINE_STRUCT_CLK(aes1_ick, aes1_ick_parent_names, aes1_ick_ops);
-static struct clk core_l4_ick;
+static struct clk_core core_l4_ick;
static const struct clk_ops core_l4_ick_ops = {
.init = &omap2_init_clk_clkdm,
@@ -199,7 +198,7 @@ static const struct clk_ops core_l4_ick_ops = {
DEFINE_STRUCT_CLK_HW_OMAP(core_l4_ick, "core_l4_clkdm");
DEFINE_STRUCT_CLK(core_l4_ick, security_l4_ick2_parent_names, core_l4_ick_ops);
-static struct clk aes2_ick;
+static struct clk_core aes2_ick;
static const char *aes2_ick_parent_names[] = {
"core_l4_ick",
@@ -224,7 +223,7 @@ static struct clk_hw_omap aes2_ick_hw = {
DEFINE_STRUCT_CLK(aes2_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk dpll1_fck;
+static struct clk_core dpll1_fck;
static struct dpll_data dpll1_dd = {
.mult_div1_reg = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_CLKSEL1_PLL),
@@ -248,7 +247,7 @@ static struct dpll_data dpll1_dd = {
.max_divider = OMAP3_MAX_DPLL_DIV,
};
-static struct clk dpll1_ck;
+static struct clk_core dpll1_ck;
static const struct clk_ops dpll1_ck_ops = {
.init = &omap2_init_clk_clkdm,
@@ -279,7 +278,7 @@ DEFINE_CLK_DIVIDER(dpll1_x2m2_ck, "dpll1_x2_ck", &dpll1_x2_ck, 0x0,
OMAP3430_MPU_DPLL_CLKOUT_DIV_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk mpu_ck;
+static struct clk_core mpu_ck;
static const char *mpu_ck_parent_names[] = {
"dpll1_x2m2_ck",
@@ -293,7 +292,7 @@ DEFINE_CLK_DIVIDER(arm_fck, "mpu_ck", &mpu_ck, 0x0,
OMAP3430_ST_MPU_CLK_SHIFT, OMAP3430_ST_MPU_CLK_WIDTH,
0x0, NULL);
-static struct clk cam_ick;
+static struct clk_core cam_ick;
static struct clk_hw_omap cam_ick_hw = {
.hw = {
@@ -358,7 +357,7 @@ static struct dpll_data dpll4_dd_3630 __initdata = {
.flags = DPLL_J_TYPE
};
-static struct clk dpll4_ck;
+static struct clk_core dpll4_ck;
static const struct clk_ops dpll4_ck_ops = {
.init = &omap2_init_clk_clkdm,
@@ -422,7 +421,7 @@ DEFINE_CLK_DIVIDER(dpll4_m5_ck, "dpll4_ck", &dpll4_ck, 0x0,
OMAP3430_CLKSEL_CAM_SHIFT, OMAP3630_CLKSEL_CAM_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk dpll4_m5x2_ck;
+static struct clk_core dpll4_m5x2_ck;
static const char *dpll4_m5x2_ck_parent_names[] = {
"dpll4_m5_ck",
@@ -459,7 +458,7 @@ static struct clk_hw_omap dpll4_m5x2_ck_hw = {
DEFINE_STRUCT_CLK_FLAGS(dpll4_m5x2_ck, dpll4_m5x2_ck_parent_names,
dpll4_m5x2_ck_ops, CLK_SET_RATE_PARENT);
-static struct clk dpll4_m5x2_ck_3630 = {
+static struct clk_core dpll4_m5x2_ck_3630 = {
.name = "dpll4_m5x2_ck",
.hw = &dpll4_m5x2_ck_hw.hw,
.parent_names = dpll4_m5x2_ck_parent_names,
@@ -468,7 +467,7 @@ static struct clk dpll4_m5x2_ck_3630 = {
.flags = CLK_SET_RATE_PARENT,
};
-static struct clk cam_mclk;
+static struct clk_core cam_mclk;
static const char *cam_mclk_parent_names[] = {
"dpll4_m5x2_ck",
@@ -483,7 +482,7 @@ static struct clk_hw_omap cam_mclk_hw = {
.clkdm_name = "cam_clkdm",
};
-static struct clk cam_mclk = {
+static struct clk_core cam_mclk = {
.name = "cam_mclk",
.hw = &cam_mclk_hw.hw,
.parent_names = cam_mclk_parent_names,
@@ -512,7 +511,7 @@ DEFINE_CLK_DIVIDER(dpll4_m2_ck, "dpll4_ck", &dpll4_ck, 0x0,
OMAP3430_DIV_96M_SHIFT, OMAP3630_DIV_96M_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk dpll4_m2x2_ck;
+static struct clk_core dpll4_m2x2_ck;
static const char *dpll4_m2x2_ck_parent_names[] = {
"dpll4_m2_ck",
@@ -531,7 +530,7 @@ static struct clk_hw_omap dpll4_m2x2_ck_hw = {
DEFINE_STRUCT_CLK(dpll4_m2x2_ck, dpll4_m2x2_ck_parent_names, dpll4_m5x2_ck_ops);
-static struct clk dpll4_m2x2_ck_3630 = {
+static struct clk_core dpll4_m2x2_ck_3630 = {
.name = "dpll4_m2x2_ck",
.hw = &dpll4_m2x2_ck_hw.hw,
.parent_names = dpll4_m2x2_ck_parent_names,
@@ -539,7 +538,7 @@ static struct clk dpll4_m2x2_ck_3630 = {
.ops = &dpll4_m5x2_ck_3630_ops,
};
-static struct clk omap_96m_alwon_fck;
+static struct clk_core omap_96m_alwon_fck;
static const char *omap_96m_alwon_fck_parent_names[] = {
"dpll4_m2x2_ck",
@@ -549,7 +548,7 @@ DEFINE_STRUCT_CLK_HW_OMAP(omap_96m_alwon_fck, NULL);
DEFINE_STRUCT_CLK(omap_96m_alwon_fck, omap_96m_alwon_fck_parent_names,
core_ck_ops);
-static struct clk cm_96m_fck;
+static struct clk_core cm_96m_fck;
static const char *cm_96m_fck_parent_names[] = {
"omap_96m_alwon_fck",
@@ -568,7 +567,7 @@ DEFINE_CLK_DIVIDER_TABLE(dpll4_m3_ck, "dpll4_ck", &dpll4_ck, 0x0,
OMAP3430_CLKSEL_TV_SHIFT, OMAP3630_CLKSEL_TV_WIDTH,
0, dpll4_mx_ck_div_table, NULL);
-static struct clk dpll4_m3x2_ck;
+static struct clk_core dpll4_m3x2_ck;
static const char *dpll4_m3x2_ck_parent_names[] = {
"dpll4_m3_ck",
@@ -587,7 +586,7 @@ static struct clk_hw_omap dpll4_m3x2_ck_hw = {
DEFINE_STRUCT_CLK(dpll4_m3x2_ck, dpll4_m3x2_ck_parent_names, dpll4_m5x2_ck_ops);
-static struct clk dpll4_m3x2_ck_3630 = {
+static struct clk_core dpll4_m3x2_ck_3630 = {
.name = "dpll4_m3x2_ck",
.hw = &dpll4_m3x2_ck_hw.hw,
.parent_names = dpll4_m3x2_ck_parent_names,
@@ -651,7 +650,7 @@ static const char *omap_48m_fck_parent_names[] = {
"cm_96m_fck", "sys_altclk",
};
-static struct clk omap_48m_fck;
+static struct clk_core omap_48m_fck;
static const struct clk_ops omap_48m_fck_ops = {
.recalc_rate = &omap2_clksel_recalc,
@@ -672,7 +671,7 @@ DEFINE_STRUCT_CLK(omap_48m_fck, omap_48m_fck_parent_names, omap_48m_fck_ops);
DEFINE_CLK_FIXED_FACTOR(omap_12m_fck, "omap_48m_fck", &omap_48m_fck, 0x0, 1, 4);
-static struct clk core_12m_fck;
+static struct clk_core core_12m_fck;
static const char *core_12m_fck_parent_names[] = {
"omap_12m_fck",
@@ -681,7 +680,7 @@ static const char *core_12m_fck_parent_names[] = {
DEFINE_STRUCT_CLK_HW_OMAP(core_12m_fck, "core_l4_clkdm");
DEFINE_STRUCT_CLK(core_12m_fck, core_12m_fck_parent_names, core_l4_ick_ops);
-static struct clk core_48m_fck;
+static struct clk_core core_48m_fck;
static const char *core_48m_fck_parent_names[] = {
"omap_48m_fck",
@@ -698,7 +697,7 @@ DEFINE_CLK_MUX(omap_96m_fck, omap_96m_fck_parent_names, NULL, 0x0,
OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1),
OMAP3430_SOURCE_96M_SHIFT, OMAP3430_SOURCE_96M_WIDTH, 0x0, NULL);
-static struct clk core_96m_fck;
+static struct clk_core core_96m_fck;
static const char *core_96m_fck_parent_names[] = {
"omap_96m_fck",
@@ -707,7 +706,7 @@ static const char *core_96m_fck_parent_names[] = {
DEFINE_STRUCT_CLK_HW_OMAP(core_96m_fck, "core_l4_clkdm");
DEFINE_STRUCT_CLK(core_96m_fck, core_96m_fck_parent_names, core_l4_ick_ops);
-static struct clk core_l3_ick;
+static struct clk_core core_l3_ick;
static const char *core_l3_ick_parent_names[] = {
"l3_ick",
@@ -718,7 +717,7 @@ DEFINE_STRUCT_CLK(core_l3_ick, core_l3_ick_parent_names, core_l4_ick_ops);
DEFINE_CLK_FIXED_FACTOR(dpll3_m2x2_ck, "dpll3_m2_ck", &dpll3_m2_ck, 0x0, 2, 1);
-static struct clk corex2_fck;
+static struct clk_core corex2_fck;
static const char *corex2_fck_parent_names[] = {
"dpll3_m2x2_ck",
@@ -727,7 +726,7 @@ static const char *corex2_fck_parent_names[] = {
DEFINE_STRUCT_CLK_HW_OMAP(corex2_fck, NULL);
DEFINE_STRUCT_CLK(corex2_fck, corex2_fck_parent_names, core_ck_ops);
-static struct clk cpefuse_fck;
+static struct clk_core cpefuse_fck;
static struct clk_hw_omap cpefuse_fck_hw = {
.hw = {
@@ -740,7 +739,7 @@ static struct clk_hw_omap cpefuse_fck_hw = {
DEFINE_STRUCT_CLK(cpefuse_fck, dpll3_ck_parent_names, aes2_ick_ops);
-static struct clk csi2_96m_fck;
+static struct clk_core csi2_96m_fck;
static const char *csi2_96m_fck_parent_names[] = {
"core_96m_fck",
@@ -757,7 +756,7 @@ static struct clk_hw_omap csi2_96m_fck_hw = {
DEFINE_STRUCT_CLK(csi2_96m_fck, csi2_96m_fck_parent_names, aes2_ick_ops);
-static struct clk d2d_26m_fck;
+static struct clk_core d2d_26m_fck;
static struct clk_hw_omap d2d_26m_fck_hw = {
.hw = {
@@ -771,7 +770,7 @@ static struct clk_hw_omap d2d_26m_fck_hw = {
DEFINE_STRUCT_CLK(d2d_26m_fck, dpll3_ck_parent_names, aes2_ick_ops);
-static struct clk des1_ick;
+static struct clk_core des1_ick;
static struct clk_hw_omap des1_ick_hw = {
.hw = {
@@ -784,7 +783,7 @@ static struct clk_hw_omap des1_ick_hw = {
DEFINE_STRUCT_CLK(des1_ick, aes1_ick_parent_names, aes1_ick_ops);
-static struct clk des2_ick;
+static struct clk_core des2_ick;
static struct clk_hw_omap des2_ick_hw = {
.hw = {
@@ -803,7 +802,7 @@ DEFINE_CLK_DIVIDER(dpll1_fck, "core_ck", &core_ck, 0x0,
OMAP3430_MPU_CLK_SRC_SHIFT, OMAP3430_MPU_CLK_SRC_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk dpll2_fck;
+static struct clk_core dpll2_fck;
static struct dpll_data dpll2_dd = {
.mult_div1_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, OMAP3430_CM_CLKSEL1_PLL),
@@ -828,7 +827,7 @@ static struct dpll_data dpll2_dd = {
.max_divider = OMAP3_MAX_DPLL_DIV,
};
-static struct clk dpll2_ck;
+static struct clk_core dpll2_ck;
static struct clk_hw_omap dpll2_ck_hw = {
.hw = {
@@ -857,7 +856,7 @@ DEFINE_CLK_DIVIDER(dpll3_m3_ck, "dpll3_ck", &dpll3_ck, 0x0,
OMAP3430_DIV_DPLL3_SHIFT, OMAP3430_DIV_DPLL3_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk dpll3_m3x2_ck;
+static struct clk_core dpll3_m3x2_ck;
static const char *dpll3_m3x2_ck_parent_names[] = {
"dpll3_m3_ck",
@@ -876,7 +875,7 @@ static struct clk_hw_omap dpll3_m3x2_ck_hw = {
DEFINE_STRUCT_CLK(dpll3_m3x2_ck, dpll3_m3x2_ck_parent_names, dpll4_m5x2_ck_ops);
-static struct clk dpll3_m3x2_ck_3630 = {
+static struct clk_core dpll3_m3x2_ck_3630 = {
.name = "dpll3_m3x2_ck",
.hw = &dpll3_m3x2_ck_hw.hw,
.parent_names = dpll3_m3x2_ck_parent_names,
@@ -891,7 +890,7 @@ DEFINE_CLK_DIVIDER_TABLE(dpll4_m4_ck, "dpll4_ck", &dpll4_ck, 0x0,
OMAP3430_CLKSEL_DSS1_SHIFT, OMAP3630_CLKSEL_DSS1_WIDTH,
0, dpll4_mx_ck_div_table, NULL);
-static struct clk dpll4_m4x2_ck;
+static struct clk_core dpll4_m4x2_ck;
static const char *dpll4_m4x2_ck_parent_names[] = {
"dpll4_m4_ck",
@@ -911,7 +910,7 @@ static struct clk_hw_omap dpll4_m4x2_ck_hw = {
DEFINE_STRUCT_CLK_FLAGS(dpll4_m4x2_ck, dpll4_m4x2_ck_parent_names,
dpll4_m5x2_ck_ops, CLK_SET_RATE_PARENT);
-static struct clk dpll4_m4x2_ck_3630 = {
+static struct clk_core dpll4_m4x2_ck_3630 = {
.name = "dpll4_m4x2_ck",
.hw = &dpll4_m4x2_ck_hw.hw,
.parent_names = dpll4_m4x2_ck_parent_names,
@@ -925,7 +924,7 @@ DEFINE_CLK_DIVIDER(dpll4_m6_ck, "dpll4_ck", &dpll4_ck, 0x0,
OMAP3430_DIV_DPLL4_SHIFT, OMAP3630_DIV_DPLL4_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk dpll4_m6x2_ck;
+static struct clk_core dpll4_m6x2_ck;
static const char *dpll4_m6x2_ck_parent_names[] = {
"dpll4_m6_ck",
@@ -944,7 +943,7 @@ static struct clk_hw_omap dpll4_m6x2_ck_hw = {
DEFINE_STRUCT_CLK(dpll4_m6x2_ck, dpll4_m6x2_ck_parent_names, dpll4_m5x2_ck_ops);
-static struct clk dpll4_m6x2_ck_3630 = {
+static struct clk_core dpll4_m6x2_ck_3630 = {
.name = "dpll4_m6x2_ck",
.hw = &dpll4_m6x2_ck_hw.hw,
.parent_names = dpll4_m6x2_ck_parent_names,
@@ -976,7 +975,7 @@ static struct dpll_data dpll5_dd = {
.max_divider = OMAP3_MAX_DPLL_DIV,
};
-static struct clk dpll5_ck;
+static struct clk_core dpll5_ck;
static struct clk_hw_omap dpll5_ck_hw = {
.hw = {
@@ -994,7 +993,7 @@ DEFINE_CLK_DIVIDER(dpll5_m2_ck, "dpll5_ck", &dpll5_ck, 0x0,
OMAP3430ES2_DIV_120M_SHIFT, OMAP3430ES2_DIV_120M_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk dss1_alwon_fck_3430es1;
+static struct clk_core dss1_alwon_fck_3430es1;
static const char *dss1_alwon_fck_3430es1_parent_names[] = {
"dpll4_m4x2_ck",
@@ -1013,7 +1012,7 @@ DEFINE_STRUCT_CLK_FLAGS(dss1_alwon_fck_3430es1,
dss1_alwon_fck_3430es1_parent_names, aes2_ick_ops,
CLK_SET_RATE_PARENT);
-static struct clk dss1_alwon_fck_3430es2;
+static struct clk_core dss1_alwon_fck_3430es2;
static struct clk_hw_omap dss1_alwon_fck_3430es2_hw = {
.hw = {
@@ -1029,7 +1028,7 @@ DEFINE_STRUCT_CLK_FLAGS(dss1_alwon_fck_3430es2,
dss1_alwon_fck_3430es1_parent_names, aes2_ick_ops,
CLK_SET_RATE_PARENT);
-static struct clk dss2_alwon_fck;
+static struct clk_core dss2_alwon_fck;
static struct clk_hw_omap dss2_alwon_fck_hw = {
.hw = {
@@ -1042,7 +1041,7 @@ static struct clk_hw_omap dss2_alwon_fck_hw = {
DEFINE_STRUCT_CLK(dss2_alwon_fck, dpll3_ck_parent_names, aes2_ick_ops);
-static struct clk dss_96m_fck;
+static struct clk_core dss_96m_fck;
static struct clk_hw_omap dss_96m_fck_hw = {
.hw = {
@@ -1055,7 +1054,7 @@ static struct clk_hw_omap dss_96m_fck_hw = {
DEFINE_STRUCT_CLK(dss_96m_fck, core_96m_fck_parent_names, aes2_ick_ops);
-static struct clk dss_ick_3430es1;
+static struct clk_core dss_ick_3430es1;
static struct clk_hw_omap dss_ick_3430es1_hw = {
.hw = {
@@ -1069,7 +1068,7 @@ static struct clk_hw_omap dss_ick_3430es1_hw = {
DEFINE_STRUCT_CLK(dss_ick_3430es1, security_l4_ick2_parent_names, aes2_ick_ops);
-static struct clk dss_ick_3430es2;
+static struct clk_core dss_ick_3430es2;
static struct clk_hw_omap dss_ick_3430es2_hw = {
.hw = {
@@ -1083,7 +1082,7 @@ static struct clk_hw_omap dss_ick_3430es2_hw = {
DEFINE_STRUCT_CLK(dss_ick_3430es2, security_l4_ick2_parent_names, aes2_ick_ops);
-static struct clk dss_tv_fck;
+static struct clk_core dss_tv_fck;
static const char *dss_tv_fck_parent_names[] = {
"omap_54m_fck",
@@ -1100,7 +1099,7 @@ static struct clk_hw_omap dss_tv_fck_hw = {
DEFINE_STRUCT_CLK(dss_tv_fck, dss_tv_fck_parent_names, aes2_ick_ops);
-static struct clk emac_fck;
+static struct clk_core emac_fck;
static const char *emac_fck_parent_names[] = {
"rmii_ck",
@@ -1116,7 +1115,7 @@ static struct clk_hw_omap emac_fck_hw = {
DEFINE_STRUCT_CLK(emac_fck, emac_fck_parent_names, aes1_ick_ops);
-static struct clk ipss_ick;
+static struct clk_core ipss_ick;
static const char *ipss_ick_parent_names[] = {
"core_l3_ick",
@@ -1134,7 +1133,7 @@ static struct clk_hw_omap ipss_ick_hw = {
DEFINE_STRUCT_CLK(ipss_ick, ipss_ick_parent_names, aes2_ick_ops);
-static struct clk emac_ick;
+static struct clk_core emac_ick;
static const char *emac_ick_parent_names[] = {
"ipss_ick",
@@ -1152,7 +1151,7 @@ static struct clk_hw_omap emac_ick_hw = {
DEFINE_STRUCT_CLK(emac_ick, emac_ick_parent_names, aes2_ick_ops);
-static struct clk emu_core_alwon_ck;
+static struct clk_core emu_core_alwon_ck;
static const char *emu_core_alwon_ck_parent_names[] = {
"dpll3_m3x2_ck",
@@ -1162,7 +1161,7 @@ DEFINE_STRUCT_CLK_HW_OMAP(emu_core_alwon_ck, "dpll3_clkdm");
DEFINE_STRUCT_CLK(emu_core_alwon_ck, emu_core_alwon_ck_parent_names,
core_l4_ick_ops);
-static struct clk emu_mpu_alwon_ck;
+static struct clk_core emu_mpu_alwon_ck;
static const char *emu_mpu_alwon_ck_parent_names[] = {
"mpu_ck",
@@ -1171,7 +1170,7 @@ static const char *emu_mpu_alwon_ck_parent_names[] = {
DEFINE_STRUCT_CLK_HW_OMAP(emu_mpu_alwon_ck, NULL);
DEFINE_STRUCT_CLK(emu_mpu_alwon_ck, emu_mpu_alwon_ck_parent_names, core_ck_ops);
-static struct clk emu_per_alwon_ck;
+static struct clk_core emu_per_alwon_ck;
static const char *emu_per_alwon_ck_parent_names[] = {
"dpll4_m6x2_ck",
@@ -1222,7 +1221,7 @@ static const struct clk_ops emu_src_ck_ops = {
.disable = &omap2_clkops_disable_clkdm,
};
-static struct clk emu_src_ck;
+static struct clk_core emu_src_ck;
static struct clk_hw_omap emu_src_ck_hw = {
.hw = {
@@ -1241,7 +1240,7 @@ DEFINE_CLK_DIVIDER(atclk_fck, "emu_src_ck", &emu_src_ck, 0x0,
OMAP3430_CLKSEL_ATCLK_SHIFT, OMAP3430_CLKSEL_ATCLK_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk fac_ick;
+static struct clk_core fac_ick;
static struct clk_hw_omap fac_ick_hw = {
.hw = {
@@ -1255,7 +1254,7 @@ static struct clk_hw_omap fac_ick_hw = {
DEFINE_STRUCT_CLK(fac_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk fshostusb_fck;
+static struct clk_core fshostusb_fck;
static const char *fshostusb_fck_parent_names[] = {
"core_48m_fck",
@@ -1273,7 +1272,7 @@ static struct clk_hw_omap fshostusb_fck_hw = {
DEFINE_STRUCT_CLK(fshostusb_fck, fshostusb_fck_parent_names, aes2_ick_ops);
-static struct clk gfx_l3_ck;
+static struct clk_core gfx_l3_ck;
static struct clk_hw_omap gfx_l3_ck_hw = {
.hw = {
@@ -1292,7 +1291,7 @@ DEFINE_CLK_DIVIDER(gfx_l3_fck, "l3_ick", &l3_ick, 0x0,
OMAP_CLKSEL_GFX_SHIFT, OMAP_CLKSEL_GFX_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk gfx_cg1_ck;
+static struct clk_core gfx_cg1_ck;
static const char *gfx_cg1_ck_parent_names[] = {
"gfx_l3_fck",
@@ -1310,7 +1309,7 @@ static struct clk_hw_omap gfx_cg1_ck_hw = {
DEFINE_STRUCT_CLK(gfx_cg1_ck, gfx_cg1_ck_parent_names, aes2_ick_ops);
-static struct clk gfx_cg2_ck;
+static struct clk_core gfx_cg2_ck;
static struct clk_hw_omap gfx_cg2_ck_hw = {
.hw = {
@@ -1324,7 +1323,7 @@ static struct clk_hw_omap gfx_cg2_ck_hw = {
DEFINE_STRUCT_CLK(gfx_cg2_ck, gfx_cg1_ck_parent_names, aes2_ick_ops);
-static struct clk gfx_l3_ick;
+static struct clk_core gfx_l3_ick;
static const char *gfx_l3_ick_parent_names[] = {
"gfx_l3_ck",
@@ -1333,7 +1332,7 @@ static const char *gfx_l3_ick_parent_names[] = {
DEFINE_STRUCT_CLK_HW_OMAP(gfx_l3_ick, "gfx_3430es1_clkdm");
DEFINE_STRUCT_CLK(gfx_l3_ick, gfx_l3_ick_parent_names, core_l4_ick_ops);
-static struct clk wkup_32k_fck;
+static struct clk_core wkup_32k_fck;
static const char *wkup_32k_fck_parent_names[] = {
"omap_32k_fck",
@@ -1342,7 +1341,7 @@ static const char *wkup_32k_fck_parent_names[] = {
DEFINE_STRUCT_CLK_HW_OMAP(wkup_32k_fck, "wkup_clkdm");
DEFINE_STRUCT_CLK(wkup_32k_fck, wkup_32k_fck_parent_names, core_l4_ick_ops);
-static struct clk gpio1_dbck;
+static struct clk_core gpio1_dbck;
static const char *gpio1_dbck_parent_names[] = {
"wkup_32k_fck",
@@ -1359,12 +1358,12 @@ static struct clk_hw_omap gpio1_dbck_hw = {
DEFINE_STRUCT_CLK(gpio1_dbck, gpio1_dbck_parent_names, aes2_ick_ops);
-static struct clk wkup_l4_ick;
+static struct clk_core wkup_l4_ick;
DEFINE_STRUCT_CLK_HW_OMAP(wkup_l4_ick, "wkup_clkdm");
DEFINE_STRUCT_CLK(wkup_l4_ick, dpll3_ck_parent_names, core_l4_ick_ops);
-static struct clk gpio1_ick;
+static struct clk_core gpio1_ick;
static const char *gpio1_ick_parent_names[] = {
"wkup_l4_ick",
@@ -1382,13 +1381,13 @@ static struct clk_hw_omap gpio1_ick_hw = {
DEFINE_STRUCT_CLK(gpio1_ick, gpio1_ick_parent_names, aes2_ick_ops);
-static struct clk per_32k_alwon_fck;
+static struct clk_core per_32k_alwon_fck;
DEFINE_STRUCT_CLK_HW_OMAP(per_32k_alwon_fck, "per_clkdm");
DEFINE_STRUCT_CLK(per_32k_alwon_fck, wkup_32k_fck_parent_names,
core_l4_ick_ops);
-static struct clk gpio2_dbck;
+static struct clk_core gpio2_dbck;
static const char *gpio2_dbck_parent_names[] = {
"per_32k_alwon_fck",
@@ -1405,12 +1404,12 @@ static struct clk_hw_omap gpio2_dbck_hw = {
DEFINE_STRUCT_CLK(gpio2_dbck, gpio2_dbck_parent_names, aes2_ick_ops);
-static struct clk per_l4_ick;
+static struct clk_core per_l4_ick;
DEFINE_STRUCT_CLK_HW_OMAP(per_l4_ick, "per_clkdm");
DEFINE_STRUCT_CLK(per_l4_ick, security_l4_ick2_parent_names, core_l4_ick_ops);
-static struct clk gpio2_ick;
+static struct clk_core gpio2_ick;
static const char *gpio2_ick_parent_names[] = {
"per_l4_ick",
@@ -1428,7 +1427,7 @@ static struct clk_hw_omap gpio2_ick_hw = {
DEFINE_STRUCT_CLK(gpio2_ick, gpio2_ick_parent_names, aes2_ick_ops);
-static struct clk gpio3_dbck;
+static struct clk_core gpio3_dbck;
static struct clk_hw_omap gpio3_dbck_hw = {
.hw = {
@@ -1441,7 +1440,7 @@ static struct clk_hw_omap gpio3_dbck_hw = {
DEFINE_STRUCT_CLK(gpio3_dbck, gpio2_dbck_parent_names, aes2_ick_ops);
-static struct clk gpio3_ick;
+static struct clk_core gpio3_ick;
static struct clk_hw_omap gpio3_ick_hw = {
.hw = {
@@ -1455,7 +1454,7 @@ static struct clk_hw_omap gpio3_ick_hw = {
DEFINE_STRUCT_CLK(gpio3_ick, gpio2_ick_parent_names, aes2_ick_ops);
-static struct clk gpio4_dbck;
+static struct clk_core gpio4_dbck;
static struct clk_hw_omap gpio4_dbck_hw = {
.hw = {
@@ -1468,7 +1467,7 @@ static struct clk_hw_omap gpio4_dbck_hw = {
DEFINE_STRUCT_CLK(gpio4_dbck, gpio2_dbck_parent_names, aes2_ick_ops);
-static struct clk gpio4_ick;
+static struct clk_core gpio4_ick;
static struct clk_hw_omap gpio4_ick_hw = {
.hw = {
@@ -1482,7 +1481,7 @@ static struct clk_hw_omap gpio4_ick_hw = {
DEFINE_STRUCT_CLK(gpio4_ick, gpio2_ick_parent_names, aes2_ick_ops);
-static struct clk gpio5_dbck;
+static struct clk_core gpio5_dbck;
static struct clk_hw_omap gpio5_dbck_hw = {
.hw = {
@@ -1495,7 +1494,7 @@ static struct clk_hw_omap gpio5_dbck_hw = {
DEFINE_STRUCT_CLK(gpio5_dbck, gpio2_dbck_parent_names, aes2_ick_ops);
-static struct clk gpio5_ick;
+static struct clk_core gpio5_ick;
static struct clk_hw_omap gpio5_ick_hw = {
.hw = {
@@ -1509,7 +1508,7 @@ static struct clk_hw_omap gpio5_ick_hw = {
DEFINE_STRUCT_CLK(gpio5_ick, gpio2_ick_parent_names, aes2_ick_ops);
-static struct clk gpio6_dbck;
+static struct clk_core gpio6_dbck;
static struct clk_hw_omap gpio6_dbck_hw = {
.hw = {
@@ -1522,7 +1521,7 @@ static struct clk_hw_omap gpio6_dbck_hw = {
DEFINE_STRUCT_CLK(gpio6_dbck, gpio2_dbck_parent_names, aes2_ick_ops);
-static struct clk gpio6_ick;
+static struct clk_core gpio6_ick;
static struct clk_hw_omap gpio6_ick_hw = {
.hw = {
@@ -1536,7 +1535,7 @@ static struct clk_hw_omap gpio6_ick_hw = {
DEFINE_STRUCT_CLK(gpio6_ick, gpio2_ick_parent_names, aes2_ick_ops);
-static struct clk gpmc_fck;
+static struct clk_core gpmc_fck;
static struct clk_hw_omap gpmc_fck_hw = {
.hw = {
@@ -1565,7 +1564,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt10_fck, "core_l4_clkdm", omap343x_gpt_clksel,
OMAP3430_EN_GPT10_SHIFT, &clkhwops_wait,
gpt10_fck_parent_names, clkout2_src_ck_ops);
-static struct clk gpt10_ick;
+static struct clk_core gpt10_ick;
static struct clk_hw_omap gpt10_ick_hw = {
.hw = {
@@ -1586,7 +1585,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt11_fck, "core_l4_clkdm", omap343x_gpt_clksel,
OMAP3430_EN_GPT11_SHIFT, &clkhwops_wait,
gpt10_fck_parent_names, clkout2_src_ck_ops);
-static struct clk gpt11_ick;
+static struct clk_core gpt11_ick;
static struct clk_hw_omap gpt11_ick_hw = {
.hw = {
@@ -1600,7 +1599,7 @@ static struct clk_hw_omap gpt11_ick_hw = {
DEFINE_STRUCT_CLK(gpt11_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk gpt12_fck;
+static struct clk_core gpt12_fck;
static const char *gpt12_fck_parent_names[] = {
"secure_32k_fck",
@@ -1609,7 +1608,7 @@ static const char *gpt12_fck_parent_names[] = {
DEFINE_STRUCT_CLK_HW_OMAP(gpt12_fck, "wkup_clkdm");
DEFINE_STRUCT_CLK(gpt12_fck, gpt12_fck_parent_names, core_l4_ick_ops);
-static struct clk gpt12_ick;
+static struct clk_core gpt12_ick;
static struct clk_hw_omap gpt12_ick_hw = {
.hw = {
@@ -1630,7 +1629,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt1_fck, "wkup_clkdm", omap343x_gpt_clksel,
OMAP3430_EN_GPT1_SHIFT, &clkhwops_wait,
gpt10_fck_parent_names, clkout2_src_ck_ops);
-static struct clk gpt1_ick;
+static struct clk_core gpt1_ick;
static struct clk_hw_omap gpt1_ick_hw = {
.hw = {
@@ -1651,7 +1650,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt2_fck, "per_clkdm", omap343x_gpt_clksel,
OMAP3430_EN_GPT2_SHIFT, &clkhwops_wait,
gpt10_fck_parent_names, clkout2_src_ck_ops);
-static struct clk gpt2_ick;
+static struct clk_core gpt2_ick;
static struct clk_hw_omap gpt2_ick_hw = {
.hw = {
@@ -1672,7 +1671,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt3_fck, "per_clkdm", omap343x_gpt_clksel,
OMAP3430_EN_GPT3_SHIFT, &clkhwops_wait,
gpt10_fck_parent_names, clkout2_src_ck_ops);
-static struct clk gpt3_ick;
+static struct clk_core gpt3_ick;
static struct clk_hw_omap gpt3_ick_hw = {
.hw = {
@@ -1693,7 +1692,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt4_fck, "per_clkdm", omap343x_gpt_clksel,
OMAP3430_EN_GPT4_SHIFT, &clkhwops_wait,
gpt10_fck_parent_names, clkout2_src_ck_ops);
-static struct clk gpt4_ick;
+static struct clk_core gpt4_ick;
static struct clk_hw_omap gpt4_ick_hw = {
.hw = {
@@ -1714,7 +1713,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt5_fck, "per_clkdm", omap343x_gpt_clksel,
OMAP3430_EN_GPT5_SHIFT, &clkhwops_wait,
gpt10_fck_parent_names, clkout2_src_ck_ops);
-static struct clk gpt5_ick;
+static struct clk_core gpt5_ick;
static struct clk_hw_omap gpt5_ick_hw = {
.hw = {
@@ -1735,7 +1734,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt6_fck, "per_clkdm", omap343x_gpt_clksel,
OMAP3430_EN_GPT6_SHIFT, &clkhwops_wait,
gpt10_fck_parent_names, clkout2_src_ck_ops);
-static struct clk gpt6_ick;
+static struct clk_core gpt6_ick;
static struct clk_hw_omap gpt6_ick_hw = {
.hw = {
@@ -1756,7 +1755,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt7_fck, "per_clkdm", omap343x_gpt_clksel,
OMAP3430_EN_GPT7_SHIFT, &clkhwops_wait,
gpt10_fck_parent_names, clkout2_src_ck_ops);
-static struct clk gpt7_ick;
+static struct clk_core gpt7_ick;
static struct clk_hw_omap gpt7_ick_hw = {
.hw = {
@@ -1777,7 +1776,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt8_fck, "per_clkdm", omap343x_gpt_clksel,
OMAP3430_EN_GPT8_SHIFT, &clkhwops_wait,
gpt10_fck_parent_names, clkout2_src_ck_ops);
-static struct clk gpt8_ick;
+static struct clk_core gpt8_ick;
static struct clk_hw_omap gpt8_ick_hw = {
.hw = {
@@ -1798,7 +1797,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt9_fck, "per_clkdm", omap343x_gpt_clksel,
OMAP3430_EN_GPT9_SHIFT, &clkhwops_wait,
gpt10_fck_parent_names, clkout2_src_ck_ops);
-static struct clk gpt9_ick;
+static struct clk_core gpt9_ick;
static struct clk_hw_omap gpt9_ick_hw = {
.hw = {
@@ -1812,7 +1811,7 @@ static struct clk_hw_omap gpt9_ick_hw = {
DEFINE_STRUCT_CLK(gpt9_ick, gpio2_ick_parent_names, aes2_ick_ops);
-static struct clk hdq_fck;
+static struct clk_core hdq_fck;
static const char *hdq_fck_parent_names[] = {
"core_12m_fck",
@@ -1830,7 +1829,7 @@ static struct clk_hw_omap hdq_fck_hw = {
DEFINE_STRUCT_CLK(hdq_fck, hdq_fck_parent_names, aes2_ick_ops);
-static struct clk hdq_ick;
+static struct clk_core hdq_ick;
static struct clk_hw_omap hdq_ick_hw = {
.hw = {
@@ -1844,7 +1843,7 @@ static struct clk_hw_omap hdq_ick_hw = {
DEFINE_STRUCT_CLK(hdq_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk hecc_ck;
+static struct clk_core hecc_ck;
static struct clk_hw_omap hecc_ck_hw = {
.hw = {
@@ -1858,7 +1857,7 @@ static struct clk_hw_omap hecc_ck_hw = {
DEFINE_STRUCT_CLK(hecc_ck, dpll3_ck_parent_names, aes2_ick_ops);
-static struct clk hsotgusb_fck_am35xx;
+static struct clk_core hsotgusb_fck_am35xx;
static struct clk_hw_omap hsotgusb_fck_am35xx_hw = {
.hw = {
@@ -1871,7 +1870,7 @@ static struct clk_hw_omap hsotgusb_fck_am35xx_hw = {
DEFINE_STRUCT_CLK(hsotgusb_fck_am35xx, dpll3_ck_parent_names, aes2_ick_ops);
-static struct clk hsotgusb_ick_3430es1;
+static struct clk_core hsotgusb_ick_3430es1;
static struct clk_hw_omap hsotgusb_ick_3430es1_hw = {
.hw = {
@@ -1885,7 +1884,7 @@ static struct clk_hw_omap hsotgusb_ick_3430es1_hw = {
DEFINE_STRUCT_CLK(hsotgusb_ick_3430es1, ipss_ick_parent_names, aes2_ick_ops);
-static struct clk hsotgusb_ick_3430es2;
+static struct clk_core hsotgusb_ick_3430es2;
static struct clk_hw_omap hsotgusb_ick_3430es2_hw = {
.hw = {
@@ -1899,7 +1898,7 @@ static struct clk_hw_omap hsotgusb_ick_3430es2_hw = {
DEFINE_STRUCT_CLK(hsotgusb_ick_3430es2, ipss_ick_parent_names, aes2_ick_ops);
-static struct clk hsotgusb_ick_am35xx;
+static struct clk_core hsotgusb_ick_am35xx;
static struct clk_hw_omap hsotgusb_ick_am35xx_hw = {
.hw = {
@@ -1913,7 +1912,7 @@ static struct clk_hw_omap hsotgusb_ick_am35xx_hw = {
DEFINE_STRUCT_CLK(hsotgusb_ick_am35xx, emac_ick_parent_names, aes2_ick_ops);
-static struct clk i2c1_fck;
+static struct clk_core i2c1_fck;
static struct clk_hw_omap i2c1_fck_hw = {
.hw = {
@@ -1927,7 +1926,7 @@ static struct clk_hw_omap i2c1_fck_hw = {
DEFINE_STRUCT_CLK(i2c1_fck, csi2_96m_fck_parent_names, aes2_ick_ops);
-static struct clk i2c1_ick;
+static struct clk_core i2c1_ick;
static struct clk_hw_omap i2c1_ick_hw = {
.hw = {
@@ -1941,7 +1940,7 @@ static struct clk_hw_omap i2c1_ick_hw = {
DEFINE_STRUCT_CLK(i2c1_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk i2c2_fck;
+static struct clk_core i2c2_fck;
static struct clk_hw_omap i2c2_fck_hw = {
.hw = {
@@ -1955,7 +1954,7 @@ static struct clk_hw_omap i2c2_fck_hw = {
DEFINE_STRUCT_CLK(i2c2_fck, csi2_96m_fck_parent_names, aes2_ick_ops);
-static struct clk i2c2_ick;
+static struct clk_core i2c2_ick;
static struct clk_hw_omap i2c2_ick_hw = {
.hw = {
@@ -1969,7 +1968,7 @@ static struct clk_hw_omap i2c2_ick_hw = {
DEFINE_STRUCT_CLK(i2c2_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk i2c3_fck;
+static struct clk_core i2c3_fck;
static struct clk_hw_omap i2c3_fck_hw = {
.hw = {
@@ -1983,7 +1982,7 @@ static struct clk_hw_omap i2c3_fck_hw = {
DEFINE_STRUCT_CLK(i2c3_fck, csi2_96m_fck_parent_names, aes2_ick_ops);
-static struct clk i2c3_ick;
+static struct clk_core i2c3_ick;
static struct clk_hw_omap i2c3_ick_hw = {
.hw = {
@@ -1997,7 +1996,7 @@ static struct clk_hw_omap i2c3_ick_hw = {
DEFINE_STRUCT_CLK(i2c3_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk icr_ick;
+static struct clk_core icr_ick;
static struct clk_hw_omap icr_ick_hw = {
.hw = {
@@ -2011,7 +2010,7 @@ static struct clk_hw_omap icr_ick_hw = {
DEFINE_STRUCT_CLK(icr_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk iva2_ck;
+static struct clk_core iva2_ck;
static const char *iva2_ck_parent_names[] = {
"dpll2_m2_ck",
@@ -2029,7 +2028,7 @@ static struct clk_hw_omap iva2_ck_hw = {
DEFINE_STRUCT_CLK(iva2_ck, iva2_ck_parent_names, aes2_ick_ops);
-static struct clk mad2d_ick;
+static struct clk_core mad2d_ick;
static struct clk_hw_omap mad2d_ick_hw = {
.hw = {
@@ -2043,7 +2042,7 @@ static struct clk_hw_omap mad2d_ick_hw = {
DEFINE_STRUCT_CLK(mad2d_ick, core_l3_ick_parent_names, aes2_ick_ops);
-static struct clk mailboxes_ick;
+static struct clk_core mailboxes_ick;
static struct clk_hw_omap mailboxes_ick_hw = {
.hw = {
@@ -2084,7 +2083,7 @@ DEFINE_CLK_OMAP_MUX_GATE(mcbsp1_fck, "core_l4_clkdm", mcbsp_15_clksel,
OMAP3430_EN_MCBSP1_SHIFT, &clkhwops_wait,
mcbsp1_fck_parent_names, clkout2_src_ck_ops);
-static struct clk mcbsp1_ick;
+static struct clk_core mcbsp1_ick;
static struct clk_hw_omap mcbsp1_ick_hw = {
.hw = {
@@ -2098,7 +2097,7 @@ static struct clk_hw_omap mcbsp1_ick_hw = {
DEFINE_STRUCT_CLK(mcbsp1_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk per_96m_fck;
+static struct clk_core per_96m_fck;
DEFINE_STRUCT_CLK_HW_OMAP(per_96m_fck, "per_clkdm");
DEFINE_STRUCT_CLK(per_96m_fck, cm_96m_fck_parent_names, core_l4_ick_ops);
@@ -2120,7 +2119,7 @@ DEFINE_CLK_OMAP_MUX_GATE(mcbsp2_fck, "per_clkdm", mcbsp_234_clksel,
OMAP3430_EN_MCBSP2_SHIFT, &clkhwops_wait,
mcbsp2_fck_parent_names, clkout2_src_ck_ops);
-static struct clk mcbsp2_ick;
+static struct clk_core mcbsp2_ick;
static struct clk_hw_omap mcbsp2_ick_hw = {
.hw = {
@@ -2141,7 +2140,7 @@ DEFINE_CLK_OMAP_MUX_GATE(mcbsp3_fck, "per_clkdm", mcbsp_234_clksel,
OMAP3430_EN_MCBSP3_SHIFT, &clkhwops_wait,
mcbsp2_fck_parent_names, clkout2_src_ck_ops);
-static struct clk mcbsp3_ick;
+static struct clk_core mcbsp3_ick;
static struct clk_hw_omap mcbsp3_ick_hw = {
.hw = {
@@ -2162,7 +2161,7 @@ DEFINE_CLK_OMAP_MUX_GATE(mcbsp4_fck, "per_clkdm", mcbsp_234_clksel,
OMAP3430_EN_MCBSP4_SHIFT, &clkhwops_wait,
mcbsp2_fck_parent_names, clkout2_src_ck_ops);
-static struct clk mcbsp4_ick;
+static struct clk_core mcbsp4_ick;
static struct clk_hw_omap mcbsp4_ick_hw = {
.hw = {
@@ -2183,7 +2182,7 @@ DEFINE_CLK_OMAP_MUX_GATE(mcbsp5_fck, "core_l4_clkdm", mcbsp_15_clksel,
OMAP3430_EN_MCBSP5_SHIFT, &clkhwops_wait,
mcbsp1_fck_parent_names, clkout2_src_ck_ops);
-static struct clk mcbsp5_ick;
+static struct clk_core mcbsp5_ick;
static struct clk_hw_omap mcbsp5_ick_hw = {
.hw = {
@@ -2197,7 +2196,7 @@ static struct clk_hw_omap mcbsp5_ick_hw = {
DEFINE_STRUCT_CLK(mcbsp5_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk mcspi1_fck;
+static struct clk_core mcspi1_fck;
static struct clk_hw_omap mcspi1_fck_hw = {
.hw = {
@@ -2211,7 +2210,7 @@ static struct clk_hw_omap mcspi1_fck_hw = {
DEFINE_STRUCT_CLK(mcspi1_fck, fshostusb_fck_parent_names, aes2_ick_ops);
-static struct clk mcspi1_ick;
+static struct clk_core mcspi1_ick;
static struct clk_hw_omap mcspi1_ick_hw = {
.hw = {
@@ -2225,7 +2224,7 @@ static struct clk_hw_omap mcspi1_ick_hw = {
DEFINE_STRUCT_CLK(mcspi1_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk mcspi2_fck;
+static struct clk_core mcspi2_fck;
static struct clk_hw_omap mcspi2_fck_hw = {
.hw = {
@@ -2239,7 +2238,7 @@ static struct clk_hw_omap mcspi2_fck_hw = {
DEFINE_STRUCT_CLK(mcspi2_fck, fshostusb_fck_parent_names, aes2_ick_ops);
-static struct clk mcspi2_ick;
+static struct clk_core mcspi2_ick;
static struct clk_hw_omap mcspi2_ick_hw = {
.hw = {
@@ -2253,7 +2252,7 @@ static struct clk_hw_omap mcspi2_ick_hw = {
DEFINE_STRUCT_CLK(mcspi2_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk mcspi3_fck;
+static struct clk_core mcspi3_fck;
static struct clk_hw_omap mcspi3_fck_hw = {
.hw = {
@@ -2267,7 +2266,7 @@ static struct clk_hw_omap mcspi3_fck_hw = {
DEFINE_STRUCT_CLK(mcspi3_fck, fshostusb_fck_parent_names, aes2_ick_ops);
-static struct clk mcspi3_ick;
+static struct clk_core mcspi3_ick;
static struct clk_hw_omap mcspi3_ick_hw = {
.hw = {
@@ -2281,7 +2280,7 @@ static struct clk_hw_omap mcspi3_ick_hw = {
DEFINE_STRUCT_CLK(mcspi3_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk mcspi4_fck;
+static struct clk_core mcspi4_fck;
static struct clk_hw_omap mcspi4_fck_hw = {
.hw = {
@@ -2295,7 +2294,7 @@ static struct clk_hw_omap mcspi4_fck_hw = {
DEFINE_STRUCT_CLK(mcspi4_fck, fshostusb_fck_parent_names, aes2_ick_ops);
-static struct clk mcspi4_ick;
+static struct clk_core mcspi4_ick;
static struct clk_hw_omap mcspi4_ick_hw = {
.hw = {
@@ -2309,7 +2308,7 @@ static struct clk_hw_omap mcspi4_ick_hw = {
DEFINE_STRUCT_CLK(mcspi4_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk mmchs1_fck;
+static struct clk_core mmchs1_fck;
static struct clk_hw_omap mmchs1_fck_hw = {
.hw = {
@@ -2323,7 +2322,7 @@ static struct clk_hw_omap mmchs1_fck_hw = {
DEFINE_STRUCT_CLK(mmchs1_fck, csi2_96m_fck_parent_names, aes2_ick_ops);
-static struct clk mmchs1_ick;
+static struct clk_core mmchs1_ick;
static struct clk_hw_omap mmchs1_ick_hw = {
.hw = {
@@ -2337,7 +2336,7 @@ static struct clk_hw_omap mmchs1_ick_hw = {
DEFINE_STRUCT_CLK(mmchs1_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk mmchs2_fck;
+static struct clk_core mmchs2_fck;
static struct clk_hw_omap mmchs2_fck_hw = {
.hw = {
@@ -2351,7 +2350,7 @@ static struct clk_hw_omap mmchs2_fck_hw = {
DEFINE_STRUCT_CLK(mmchs2_fck, csi2_96m_fck_parent_names, aes2_ick_ops);
-static struct clk mmchs2_ick;
+static struct clk_core mmchs2_ick;
static struct clk_hw_omap mmchs2_ick_hw = {
.hw = {
@@ -2365,7 +2364,7 @@ static struct clk_hw_omap mmchs2_ick_hw = {
DEFINE_STRUCT_CLK(mmchs2_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk mmchs3_fck;
+static struct clk_core mmchs3_fck;
static struct clk_hw_omap mmchs3_fck_hw = {
.hw = {
@@ -2379,7 +2378,7 @@ static struct clk_hw_omap mmchs3_fck_hw = {
DEFINE_STRUCT_CLK(mmchs3_fck, csi2_96m_fck_parent_names, aes2_ick_ops);
-static struct clk mmchs3_ick;
+static struct clk_core mmchs3_ick;
static struct clk_hw_omap mmchs3_ick_hw = {
.hw = {
@@ -2393,7 +2392,7 @@ static struct clk_hw_omap mmchs3_ick_hw = {
DEFINE_STRUCT_CLK(mmchs3_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk modem_fck;
+static struct clk_core modem_fck;
static struct clk_hw_omap modem_fck_hw = {
.hw = {
@@ -2407,7 +2406,7 @@ static struct clk_hw_omap modem_fck_hw = {
DEFINE_STRUCT_CLK(modem_fck, dpll3_ck_parent_names, aes2_ick_ops);
-static struct clk mspro_fck;
+static struct clk_core mspro_fck;
static struct clk_hw_omap mspro_fck_hw = {
.hw = {
@@ -2421,7 +2420,7 @@ static struct clk_hw_omap mspro_fck_hw = {
DEFINE_STRUCT_CLK(mspro_fck, csi2_96m_fck_parent_names, aes2_ick_ops);
-static struct clk mspro_ick;
+static struct clk_core mspro_ick;
static struct clk_hw_omap mspro_ick_hw = {
.hw = {
@@ -2435,13 +2434,13 @@ static struct clk_hw_omap mspro_ick_hw = {
DEFINE_STRUCT_CLK(mspro_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk omap_192m_alwon_fck;
+static struct clk_core omap_192m_alwon_fck;
DEFINE_STRUCT_CLK_HW_OMAP(omap_192m_alwon_fck, NULL);
DEFINE_STRUCT_CLK(omap_192m_alwon_fck, omap_96m_alwon_fck_parent_names,
core_ck_ops);
-static struct clk omap_32ksync_ick;
+static struct clk_core omap_32ksync_ick;
static struct clk_hw_omap omap_32ksync_ick_hw = {
.hw = {
@@ -2466,7 +2465,7 @@ static const struct clksel omap_96m_alwon_fck_clksel[] = {
{ .parent = NULL }
};
-static struct clk omap_96m_alwon_fck_3630;
+static struct clk_core omap_96m_alwon_fck_3630;
static const char *omap_96m_alwon_fck_3630_parent_names[] = {
"omap_192m_alwon_fck",
@@ -2487,7 +2486,7 @@ static struct clk_hw_omap omap_96m_alwon_fck_3630_hw = {
.clksel_mask = OMAP3630_CLKSEL_96M_MASK,
};
-static struct clk omap_96m_alwon_fck_3630 = {
+static struct clk_core omap_96m_alwon_fck_3630 = {
.name = "omap_96m_alwon_fck",
.hw = &omap_96m_alwon_fck_3630_hw.hw,
.parent_names = omap_96m_alwon_fck_3630_parent_names,
@@ -2495,7 +2494,7 @@ static struct clk omap_96m_alwon_fck_3630 = {
.ops = &omap_96m_alwon_fck_3630_ops,
};
-static struct clk omapctrl_ick;
+static struct clk_core omapctrl_ick;
static struct clk_hw_omap omapctrl_ick_hw = {
.hw = {
@@ -2520,17 +2519,17 @@ DEFINE_CLK_DIVIDER(pclkx2_fck, "emu_src_ck", &emu_src_ck, 0x0,
OMAP3430_CLKSEL_PCLKX2_SHIFT, OMAP3430_CLKSEL_PCLKX2_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk per_48m_fck;
+static struct clk_core per_48m_fck;
DEFINE_STRUCT_CLK_HW_OMAP(per_48m_fck, "per_clkdm");
DEFINE_STRUCT_CLK(per_48m_fck, core_48m_fck_parent_names, core_l4_ick_ops);
-static struct clk security_l3_ick;
+static struct clk_core security_l3_ick;
DEFINE_STRUCT_CLK_HW_OMAP(security_l3_ick, NULL);
DEFINE_STRUCT_CLK(security_l3_ick, core_l3_ick_parent_names, core_ck_ops);
-static struct clk pka_ick;
+static struct clk_core pka_ick;
static const char *pka_ick_parent_names[] = {
"security_l3_ick",
@@ -2552,7 +2551,7 @@ DEFINE_CLK_DIVIDER(rm_ick, "l4_ick", &l4_ick, 0x0,
OMAP3430_CLKSEL_RM_SHIFT, OMAP3430_CLKSEL_RM_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk rng_ick;
+static struct clk_core rng_ick;
static struct clk_hw_omap rng_ick_hw = {
.hw = {
@@ -2565,7 +2564,7 @@ static struct clk_hw_omap rng_ick_hw = {
DEFINE_STRUCT_CLK(rng_ick, aes1_ick_parent_names, aes1_ick_ops);
-static struct clk sad2d_ick;
+static struct clk_core sad2d_ick;
static struct clk_hw_omap sad2d_ick_hw = {
.hw = {
@@ -2579,7 +2578,7 @@ static struct clk_hw_omap sad2d_ick_hw = {
DEFINE_STRUCT_CLK(sad2d_ick, core_l3_ick_parent_names, aes2_ick_ops);
-static struct clk sdrc_ick;
+static struct clk_core sdrc_ick;
static struct clk_hw_omap sdrc_ick_hw = {
.hw = {
@@ -2630,7 +2629,7 @@ static const char *sgx_fck_parent_names[] = {
"core_ck", "cm_96m_fck", "omap_192m_alwon_fck", "corex2_fck",
};
-static struct clk sgx_fck;
+static struct clk_core sgx_fck;
static const struct clk_ops sgx_fck_ops = {
.init = &omap2_init_clk_clkdm,
@@ -2651,7 +2650,7 @@ DEFINE_CLK_OMAP_MUX_GATE(sgx_fck, "sgx_clkdm", sgx_clksel,
OMAP3430ES2_CM_FCLKEN_SGX_EN_SGX_SHIFT,
&clkhwops_wait, sgx_fck_parent_names, sgx_fck_ops);
-static struct clk sgx_ick;
+static struct clk_core sgx_ick;
static struct clk_hw_omap sgx_ick_hw = {
.hw = {
@@ -2665,7 +2664,7 @@ static struct clk_hw_omap sgx_ick_hw = {
DEFINE_STRUCT_CLK(sgx_ick, core_l3_ick_parent_names, aes2_ick_ops);
-static struct clk sha11_ick;
+static struct clk_core sha11_ick;
static struct clk_hw_omap sha11_ick_hw = {
.hw = {
@@ -2678,7 +2677,7 @@ static struct clk_hw_omap sha11_ick_hw = {
DEFINE_STRUCT_CLK(sha11_ick, aes1_ick_parent_names, aes1_ick_ops);
-static struct clk sha12_ick;
+static struct clk_core sha12_ick;
static struct clk_hw_omap sha12_ick_hw = {
.hw = {
@@ -2692,7 +2691,7 @@ static struct clk_hw_omap sha12_ick_hw = {
DEFINE_STRUCT_CLK(sha12_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk sr1_fck;
+static struct clk_core sr1_fck;
static struct clk_hw_omap sr1_fck_hw = {
.hw = {
@@ -2706,7 +2705,7 @@ static struct clk_hw_omap sr1_fck_hw = {
DEFINE_STRUCT_CLK(sr1_fck, dpll3_ck_parent_names, aes2_ick_ops);
-static struct clk sr2_fck;
+static struct clk_core sr2_fck;
static struct clk_hw_omap sr2_fck_hw = {
.hw = {
@@ -2720,17 +2719,17 @@ static struct clk_hw_omap sr2_fck_hw = {
DEFINE_STRUCT_CLK(sr2_fck, dpll3_ck_parent_names, aes2_ick_ops);
-static struct clk sr_l4_ick;
+static struct clk_core sr_l4_ick;
DEFINE_STRUCT_CLK_HW_OMAP(sr_l4_ick, "core_l4_clkdm");
DEFINE_STRUCT_CLK(sr_l4_ick, security_l4_ick2_parent_names, core_l4_ick_ops);
-static struct clk ssi_l4_ick;
+static struct clk_core ssi_l4_ick;
DEFINE_STRUCT_CLK_HW_OMAP(ssi_l4_ick, "core_l4_clkdm");
DEFINE_STRUCT_CLK(ssi_l4_ick, security_l4_ick2_parent_names, core_l4_ick_ops);
-static struct clk ssi_ick_3430es1;
+static struct clk_core ssi_ick_3430es1;
static const char *ssi_ick_3430es1_parent_names[] = {
"ssi_l4_ick",
@@ -2748,7 +2747,7 @@ static struct clk_hw_omap ssi_ick_3430es1_hw = {
DEFINE_STRUCT_CLK(ssi_ick_3430es1, ssi_ick_3430es1_parent_names, aes2_ick_ops);
-static struct clk ssi_ick_3430es2;
+static struct clk_core ssi_ick_3430es2;
static struct clk_hw_omap ssi_ick_3430es2_hw = {
.hw = {
@@ -2813,7 +2812,7 @@ DEFINE_CLK_FIXED_FACTOR(ssi_sst_fck_3430es1, "ssi_ssr_fck_3430es1",
DEFINE_CLK_FIXED_FACTOR(ssi_sst_fck_3430es2, "ssi_ssr_fck_3430es2",
&ssi_ssr_fck_3430es2, 0x0, 1, 2);
-static struct clk sys_clkout1;
+static struct clk_core sys_clkout1;
static const char *sys_clkout1_parent_names[] = {
"osc_sys_ck",
@@ -2843,7 +2842,7 @@ DEFINE_CLK_DIVIDER(traceclk_fck, "traceclk_src_fck", &traceclk_src_fck, 0x0,
OMAP3430_CLKSEL_TRACECLK_SHIFT,
OMAP3430_CLKSEL_TRACECLK_WIDTH, CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk ts_fck;
+static struct clk_core ts_fck;
static struct clk_hw_omap ts_fck_hw = {
.hw = {
@@ -2856,7 +2855,7 @@ static struct clk_hw_omap ts_fck_hw = {
DEFINE_STRUCT_CLK(ts_fck, wkup_32k_fck_parent_names, aes2_ick_ops);
-static struct clk uart1_fck;
+static struct clk_core uart1_fck;
static struct clk_hw_omap uart1_fck_hw = {
.hw = {
@@ -2870,7 +2869,7 @@ static struct clk_hw_omap uart1_fck_hw = {
DEFINE_STRUCT_CLK(uart1_fck, fshostusb_fck_parent_names, aes2_ick_ops);
-static struct clk uart1_ick;
+static struct clk_core uart1_ick;
static struct clk_hw_omap uart1_ick_hw = {
.hw = {
@@ -2884,7 +2883,7 @@ static struct clk_hw_omap uart1_ick_hw = {
DEFINE_STRUCT_CLK(uart1_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk uart2_fck;
+static struct clk_core uart2_fck;
static struct clk_hw_omap uart2_fck_hw = {
.hw = {
@@ -2898,7 +2897,7 @@ static struct clk_hw_omap uart2_fck_hw = {
DEFINE_STRUCT_CLK(uart2_fck, fshostusb_fck_parent_names, aes2_ick_ops);
-static struct clk uart2_ick;
+static struct clk_core uart2_ick;
static struct clk_hw_omap uart2_ick_hw = {
.hw = {
@@ -2912,7 +2911,7 @@ static struct clk_hw_omap uart2_ick_hw = {
DEFINE_STRUCT_CLK(uart2_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk uart3_fck;
+static struct clk_core uart3_fck;
static const char *uart3_fck_parent_names[] = {
"per_48m_fck",
@@ -2930,7 +2929,7 @@ static struct clk_hw_omap uart3_fck_hw = {
DEFINE_STRUCT_CLK(uart3_fck, uart3_fck_parent_names, aes2_ick_ops);
-static struct clk uart3_ick;
+static struct clk_core uart3_ick;
static struct clk_hw_omap uart3_ick_hw = {
.hw = {
@@ -2944,7 +2943,7 @@ static struct clk_hw_omap uart3_ick_hw = {
DEFINE_STRUCT_CLK(uart3_ick, gpio2_ick_parent_names, aes2_ick_ops);
-static struct clk uart4_fck;
+static struct clk_core uart4_fck;
static struct clk_hw_omap uart4_fck_hw = {
.hw = {
@@ -2958,7 +2957,7 @@ static struct clk_hw_omap uart4_fck_hw = {
DEFINE_STRUCT_CLK(uart4_fck, uart3_fck_parent_names, aes2_ick_ops);
-static struct clk uart4_fck_am35xx;
+static struct clk_core uart4_fck_am35xx;
static struct clk_hw_omap uart4_fck_am35xx_hw = {
.hw = {
@@ -2972,7 +2971,7 @@ static struct clk_hw_omap uart4_fck_am35xx_hw = {
DEFINE_STRUCT_CLK(uart4_fck_am35xx, fshostusb_fck_parent_names, aes2_ick_ops);
-static struct clk uart4_ick;
+static struct clk_core uart4_ick;
static struct clk_hw_omap uart4_ick_hw = {
.hw = {
@@ -2986,7 +2985,7 @@ static struct clk_hw_omap uart4_ick_hw = {
DEFINE_STRUCT_CLK(uart4_ick, gpio2_ick_parent_names, aes2_ick_ops);
-static struct clk uart4_ick_am35xx;
+static struct clk_core uart4_ick_am35xx;
static struct clk_hw_omap uart4_ick_am35xx_hw = {
.hw = {
@@ -3023,7 +3022,7 @@ DEFINE_CLK_OMAP_MUX_GATE(usb_l4_ick, "core_l4_clkdm", usb_l4_clksel,
&clkhwops_iclk_wait, usb_l4_ick_parent_names,
ssi_ssr_fck_3430es1_ops);
-static struct clk usbhost_120m_fck;
+static struct clk_core usbhost_120m_fck;
static const char *usbhost_120m_fck_parent_names[] = {
"dpll5_m2_ck",
@@ -3041,7 +3040,7 @@ static struct clk_hw_omap usbhost_120m_fck_hw = {
DEFINE_STRUCT_CLK(usbhost_120m_fck, usbhost_120m_fck_parent_names,
aes2_ick_ops);
-static struct clk usbhost_48m_fck;
+static struct clk_core usbhost_48m_fck;
static struct clk_hw_omap usbhost_48m_fck_hw = {
.hw = {
@@ -3055,7 +3054,7 @@ static struct clk_hw_omap usbhost_48m_fck_hw = {
DEFINE_STRUCT_CLK(usbhost_48m_fck, core_48m_fck_parent_names, aes2_ick_ops);
-static struct clk usbhost_ick;
+static struct clk_core usbhost_ick;
static struct clk_hw_omap usbhost_ick_hw = {
.hw = {
@@ -3069,7 +3068,7 @@ static struct clk_hw_omap usbhost_ick_hw = {
DEFINE_STRUCT_CLK(usbhost_ick, security_l4_ick2_parent_names, aes2_ick_ops);
-static struct clk usbtll_fck;
+static struct clk_core usbtll_fck;
static struct clk_hw_omap usbtll_fck_hw = {
.hw = {
@@ -3083,7 +3082,7 @@ static struct clk_hw_omap usbtll_fck_hw = {
DEFINE_STRUCT_CLK(usbtll_fck, usbhost_120m_fck_parent_names, aes2_ick_ops);
-static struct clk usbtll_ick;
+static struct clk_core usbtll_ick;
static struct clk_hw_omap usbtll_ick_hw = {
.hw = {
@@ -3124,7 +3123,7 @@ static const char *usim_fck_parent_names[] = {
"omap_96m_fck", "dpll5_m2_ck", "sys_ck",
};
-static struct clk usim_fck;
+static struct clk_core usim_fck;
static const struct clk_ops usim_fck_ops = {
.enable = &omap2_dflt_clk_enable,
@@ -3142,7 +3141,7 @@ DEFINE_CLK_OMAP_MUX_GATE(usim_fck, NULL, usim_clksel,
OMAP3430ES2_EN_USIMOCP_SHIFT, &clkhwops_wait,
usim_fck_parent_names, usim_fck_ops);
-static struct clk usim_ick;
+static struct clk_core usim_ick;
static struct clk_hw_omap usim_ick_hw = {
.hw = {
@@ -3156,7 +3155,7 @@ static struct clk_hw_omap usim_ick_hw = {
DEFINE_STRUCT_CLK(usim_ick, gpio1_ick_parent_names, aes2_ick_ops);
-static struct clk vpfe_fck;
+static struct clk_core vpfe_fck;
static const char *vpfe_fck_parent_names[] = {
"pclk_ck",
@@ -3172,7 +3171,7 @@ static struct clk_hw_omap vpfe_fck_hw = {
DEFINE_STRUCT_CLK(vpfe_fck, vpfe_fck_parent_names, aes1_ick_ops);
-static struct clk vpfe_ick;
+static struct clk_core vpfe_ick;
static struct clk_hw_omap vpfe_ick_hw = {
.hw = {
@@ -3186,12 +3185,12 @@ static struct clk_hw_omap vpfe_ick_hw = {
DEFINE_STRUCT_CLK(vpfe_ick, emac_ick_parent_names, aes2_ick_ops);
-static struct clk wdt1_fck;
+static struct clk_core wdt1_fck;
DEFINE_STRUCT_CLK_HW_OMAP(wdt1_fck, "wkup_clkdm");
DEFINE_STRUCT_CLK(wdt1_fck, gpt12_fck_parent_names, core_l4_ick_ops);
-static struct clk wdt1_ick;
+static struct clk_core wdt1_ick;
static struct clk_hw_omap wdt1_ick_hw = {
.hw = {
@@ -3205,7 +3204,7 @@ static struct clk_hw_omap wdt1_ick_hw = {
DEFINE_STRUCT_CLK(wdt1_ick, gpio1_ick_parent_names, aes2_ick_ops);
-static struct clk wdt2_fck;
+static struct clk_core wdt2_fck;
static struct clk_hw_omap wdt2_fck_hw = {
.hw = {
@@ -3219,7 +3218,7 @@ static struct clk_hw_omap wdt2_fck_hw = {
DEFINE_STRUCT_CLK(wdt2_fck, gpio1_dbck_parent_names, aes2_ick_ops);
-static struct clk wdt2_ick;
+static struct clk_core wdt2_ick;
static struct clk_hw_omap wdt2_ick_hw = {
.hw = {
@@ -3233,7 +3232,7 @@ static struct clk_hw_omap wdt2_ick_hw = {
DEFINE_STRUCT_CLK(wdt2_ick, gpio1_ick_parent_names, aes2_ick_ops);
-static struct clk wdt3_fck;
+static struct clk_core wdt3_fck;
static struct clk_hw_omap wdt3_fck_hw = {
.hw = {
@@ -3247,7 +3246,7 @@ static struct clk_hw_omap wdt3_fck_hw = {
DEFINE_STRUCT_CLK(wdt3_fck, gpio2_dbck_parent_names, aes2_ick_ops);
-static struct clk wdt3_ick;
+static struct clk_core wdt3_ick;
static struct clk_hw_omap wdt3_ick_hw = {
.hw = {
@@ -3661,10 +3660,10 @@ int __init omap3xxx_clk_init(void)
ARRAY_SIZE(enable_init_clks));
pr_info("Clocking rate (Crystal/Core/MPU): %ld.%01ld/%ld/%ld MHz\n",
- (clk_get_rate(&osc_sys_ck) / 1000000),
- (clk_get_rate(&osc_sys_ck) / 100000) % 10,
- (clk_get_rate(&core_ck) / 1000000),
- (clk_get_rate(&arm_fck) / 1000000));
+ (clk_provider_get_rate(&osc_sys_ck) / 1000000),
+ (clk_provider_get_rate(&osc_sys_ck) / 100000) % 10,
+ (clk_provider_get_rate(&core_ck) / 1000000),
+ (clk_provider_get_rate(&arm_fck) / 1000000));
/*
* Lock DPLL5 -- here only until other device init code can
@@ -3674,8 +3673,8 @@ int __init omap3xxx_clk_init(void)
omap3_clk_lock_dpll5();
/* Avoid sleeping during omap3_core_dpll_m2_set_rate() */
- sdrc_ick_p = clk_get(NULL, "sdrc_ick");
- arm_fck_p = clk_get(NULL, "arm_fck");
+ sdrc_ick_p = clk_provider_get(NULL, "sdrc_ick");
+ arm_fck_p = clk_provider_get(NULL, "arm_fck");
return 0;
}
diff --git a/arch/arm/mach-omap2/clkt2xxx_dpll.c b/arch/arm/mach-omap2/clkt2xxx_dpll.c
index 82572e2..d7bbbb6 100644
--- a/arch/arm/mach-omap2/clkt2xxx_dpll.c
+++ b/arch/arm/mach-omap2/clkt2xxx_dpll.c
@@ -11,7 +11,6 @@
#include <linux/kernel.h>
#include <linux/errno.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include "clock.h"
@@ -22,7 +21,7 @@
/**
* _allow_idle - enable DPLL autoidle bits
- * @clk: struct clk * of the DPLL to operate on
+ * @clk: struct clk_core * of the DPLL to operate on
*
* Enable DPLL automatic idle control. The DPLL will enter low-power
* stop when its downstream clocks are gated. No return value.
@@ -39,7 +38,7 @@ static void _allow_idle(struct clk_hw_omap *clk)
/**
* _deny_idle - prevent DPLL from automatically idling
- * @clk: struct clk * of the DPLL to operate on
+ * @clk: struct clk_core * of the DPLL to operate on
*
* Disable DPLL automatic idle control. No return value.
*/
diff --git a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
index 59cf310..9a60ce2 100644
--- a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
+++ b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
@@ -22,7 +22,6 @@
#include <linux/kernel.h>
#include <linux/errno.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include "clock.h"
@@ -48,7 +47,7 @@ static struct clk_hw_omap *dpll_core_ck;
* Returns the CORE_CLK rate. CORE_CLK can have one of three rate
* sources on OMAP2xxx: the DPLL CLKOUT rate, DPLL CLKOUTX2, or 32KHz
* (the latter is unusual). This currently should be called with
- * struct clk *dpll_ck, which is a composite clock of dpll_ck and
+ * struct clk_core *dpll_ck, which is a composite clock of dpll_ck and
* core_ck.
*/
unsigned long omap2xxx_clk_get_core_rate(void)
@@ -179,7 +178,7 @@ int omap2_reprogram_dpllcore(struct clk_hw *hw, unsigned long rate,
/**
* omap2xxx_clkt_dpllcore_init - clk init function for dpll_ck
- * @clk: struct clk *dpll_ck
+ * @clk: struct clk_core *dpll_ck
*
* Store a local copy of @clk in dpll_core_ck so other code can query
* the core rate without having to clk_get(), which can sleep. Must
diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
index 85e0b0c0..d621a4c 100644
--- a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
+++ b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
@@ -28,7 +28,6 @@
#include <linux/kernel.h>
#include <linux/errno.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include <linux/cpufreq.h>
#include <linux/slab.h>
@@ -198,14 +197,14 @@ void omap2xxx_clkt_vps_check_bootloader_rates(void)
*/
void omap2xxx_clkt_vps_late_init(void)
{
- struct clk *c;
+ struct clk_core *c;
- c = clk_get(NULL, "sys_ck");
+ c = clk_provider_get(NULL, "sys_ck");
if (IS_ERR(c)) {
WARN(1, "could not locate sys_ck\n");
} else {
- sys_ck_rate = clk_get_rate(c);
- clk_put(c);
+ sys_ck_rate = clk_provider_get_rate(c);
+ __clk_put(c);
}
}
@@ -230,7 +229,7 @@ void omap2xxx_clkt_vps_init(void)
{
struct clk_init_data init = { NULL };
struct clk_hw_omap *hw = NULL;
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name = "mpu_ck";
struct clk_lookup *lookup = NULL;
diff --git a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
index eb69acf..16ff4ed 100644
--- a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
+++ b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
@@ -18,7 +18,6 @@
#include <linux/kernel.h>
#include <linux/errno.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include "clock.h"
@@ -38,7 +37,7 @@
/**
* omap3_core_dpll_m2_set_rate - set CORE DPLL M2 divider
- * @clk: struct clk * of DPLL to set
+ * @clk: struct clk_core * of DPLL to set
* @rate: rounded target rate
*
* Program the DPLL M2 divider with the rounded target rate. Returns
diff --git a/arch/arm/mach-omap2/clkt_clksel.c b/arch/arm/mach-omap2/clkt_clksel.c
index 7ee2610..b4796b3 100644
--- a/arch/arm/mach-omap2/clkt_clksel.c
+++ b/arch/arm/mach-omap2/clkt_clksel.c
@@ -51,15 +51,15 @@
/**
* _get_clksel_by_parent() - return clksel struct for a given clk & parent
- * @clk: OMAP struct clk ptr to inspect
- * @src_clk: OMAP struct clk ptr of the parent clk to search for
+ * @clk: OMAP struct clk_core ptr to inspect
+ * @src_clk: OMAP struct clk_core ptr of the parent clk to search for
*
* Scan the struct clksel array associated with the clock to find
* the element associated with the supplied parent clock address.
* Returns a pointer to the struct clksel on success or NULL on error.
*/
static const struct clksel *_get_clksel_by_parent(struct clk_hw_omap *clk,
- struct clk *src_clk)
+ struct clk_core *src_clk)
{
const struct clksel *clks;
@@ -82,7 +82,7 @@ static const struct clksel *_get_clksel_by_parent(struct clk_hw_omap *clk,
/**
* _write_clksel_reg() - program a clock's clksel register in hardware
- * @clk: struct clk * to program
+ * @clk: struct clk_core * to program
* @v: clksel bitfield value to program (with LSB at bit 0)
*
* Shift the clksel register bitfield value @v to its appropriate
@@ -107,10 +107,10 @@ static void _write_clksel_reg(struct clk_hw_omap *clk, u32 field_val)
/**
* _clksel_to_divisor() - turn clksel field value into integer divider
- * @clk: OMAP struct clk to use
+ * @clk: OMAP struct clk_core to use
* @field_val: register field value to find
*
- * Given a struct clk of a rate-selectable clksel clock, and a register field
+ * Given a struct clk_core of a rate-selectable clksel clock, and a register field
* value to search for, find the corresponding clock divisor. The register
* field value should be pre-masked and shifted down so the LSB is at bit 0
* before calling. Returns 0 on error or returns the actual integer divisor
@@ -120,7 +120,7 @@ static u32 _clksel_to_divisor(struct clk_hw_omap *clk, u32 field_val)
{
const struct clksel *clks;
const struct clksel_rate *clkr;
- struct clk *parent;
+ struct clk_core *parent;
parent = __clk_get_parent(clk->hw.clk);
@@ -149,10 +149,10 @@ static u32 _clksel_to_divisor(struct clk_hw_omap *clk, u32 field_val)
/**
* _divisor_to_clksel() - turn clksel integer divisor into a field value
- * @clk: OMAP struct clk to use
+ * @clk: OMAP struct clk_core to use
* @div: integer divisor to search for
*
- * Given a struct clk of a rate-selectable clksel clock, and a clock
+ * Given a struct clk_core of a rate-selectable clksel clock, and a clock
* divisor, find the corresponding register field value. Returns the
* register field value _before_ left-shifting (i.e., LSB is at bit
* 0); or returns 0xFFFFFFFF (~0) upon error.
@@ -161,7 +161,7 @@ static u32 _divisor_to_clksel(struct clk_hw_omap *clk, u32 div)
{
const struct clksel *clks;
const struct clksel_rate *clkr;
- struct clk *parent;
+ struct clk_core *parent;
/* should never happen */
WARN_ON(div == 0);
@@ -191,7 +191,7 @@ static u32 _divisor_to_clksel(struct clk_hw_omap *clk, u32 div)
/**
* _read_divisor() - get current divisor applied to parent clock (from hdwr)
- * @clk: OMAP struct clk to use.
+ * @clk: OMAP struct clk_core to use.
*
* Read the current divisor register value for @clk that is programmed
* into the hardware, convert it into the actual divisor value, and
@@ -215,7 +215,7 @@ static u32 _read_divisor(struct clk_hw_omap *clk)
/**
* omap2_clksel_round_rate_div() - find divisor for the given clock and rate
- * @clk: OMAP struct clk to use
+ * @clk: OMAP struct clk_core to use
* @target_rate: desired clock rate
* @new_div: ptr to where we should store the divisor
*
@@ -233,7 +233,7 @@ u32 omap2_clksel_round_rate_div(struct clk_hw_omap *clk,
const struct clksel *clks;
const struct clksel_rate *clkr;
u32 last_div = 0;
- struct clk *parent;
+ struct clk_core *parent;
unsigned long parent_rate;
const char *clk_name;
@@ -286,7 +286,7 @@ u32 omap2_clksel_round_rate_div(struct clk_hw_omap *clk,
/*
* Clocktype interface functions to the OMAP clock code
- * (i.e., those used in struct clk field function pointers, etc.)
+ * (i.e., those used in struct clk_core field function pointers, etc.)
*/
/**
@@ -309,7 +309,7 @@ u8 omap2_clksel_find_parent_index(struct clk_hw *hw)
const struct clksel *clks;
const struct clksel_rate *clkr;
u32 r, found = 0;
- struct clk *parent;
+ struct clk_core *parent;
const char *clk_name;
int ret = 0, f = 0;
@@ -345,11 +345,11 @@ u8 omap2_clksel_find_parent_index(struct clk_hw *hw)
/**
- * omap2_clksel_recalc() - function ptr to pass via struct clk .recalc field
- * @clk: struct clk *
+ * omap2_clksel_recalc() - function ptr to pass via struct clk_core .recalc field
+ * @clk: struct clk_core *
*
* This function is intended to be called only by the clock framework.
- * Each clksel clock should have its struct clk .recalc field set to this
+ * Each clksel clock should have its struct clk_core .recalc field set to this
* function. Returns the clock's current rate, based on its parent's rate
* and its current divisor setting in the hardware.
*/
@@ -376,7 +376,7 @@ unsigned long omap2_clksel_recalc(struct clk_hw *hw, unsigned long parent_rate)
/**
* omap2_clksel_round_rate() - find rounded rate for the given clock and rate
- * @clk: OMAP struct clk to use
+ * @clk: OMAP struct clk_core to use
* @target_rate: desired clock rate
*
* This function is intended to be called only by the clock framework.
@@ -396,7 +396,7 @@ long omap2_clksel_round_rate(struct clk_hw *hw, unsigned long target_rate,
/**
* omap2_clksel_set_rate() - program clock rate in hardware
- * @clk: struct clk * to program rate
+ * @clk: struct clk_core * to program rate
* @rate: target rate to program
*
* This function is intended to be called only by the clock framework.
@@ -435,7 +435,7 @@ int omap2_clksel_set_rate(struct clk_hw *hw, unsigned long rate,
}
/*
- * Clksel parent setting function - not passed in struct clk function
+ * Clksel parent setting function - not passed in struct clk_core function
* pointer - instead, the OMAP clock code currently assumes that any
* parent-setting clock is a clksel clock, and calls
* omap2_clksel_set_parent() by default
@@ -443,8 +443,8 @@ int omap2_clksel_set_rate(struct clk_hw *hw, unsigned long rate,
/**
* omap2_clksel_set_parent() - change a clock's parent clock
- * @clk: struct clk * of the child clock
- * @new_parent: struct clk * of the new parent clock
+ * @clk: struct clk_core * of the child clock
+ * @new_parent: struct clk_core * of the new parent clock
*
* This function is intended to be called only by the clock framework.
* Change the parent clock of clock @clk to @new_parent. This is
diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c
index f251a14..36f263d 100644
--- a/arch/arm/mach-omap2/clkt_dpll.c
+++ b/arch/arm/mach-omap2/clkt_dpll.c
@@ -56,7 +56,7 @@
/*
* _dpll_test_fint - test whether an Fint value is valid for the DPLL
- * @clk: DPLL struct clk to test
+ * @clk: DPLL struct clk_core to test
* @n: divider value (N) to test
*
* Tests whether a particular divider @n will result in a valid DPLL
@@ -215,7 +215,7 @@ u8 omap2_init_dpll_parent(struct clk_hw *hw)
v &= dd->enable_mask;
v >>= __ffs(dd->enable_mask);
- /* Reparent the struct clk in case the dpll is in bypass */
+ /* Reparent the struct clk_core in case the dpll is in bypass */
if (_omap2_dpll_is_in_bypass(v))
return 1;
@@ -224,7 +224,7 @@ u8 omap2_init_dpll_parent(struct clk_hw *hw)
/**
* omap2_get_dpll_rate - returns the current DPLL CLKOUT rate
- * @clk: struct clk * of a DPLL
+ * @clk: struct clk_core * of a DPLL
*
* DPLLs can be locked or bypassed - basically, enabled or disabled.
* When locked, the DPLL output depends on the M and N values. When
@@ -270,7 +270,7 @@ unsigned long omap2_get_dpll_rate(struct clk_hw_omap *clk)
/**
* omap2_dpll_round_rate - round a target rate for an OMAP DPLL
- * @clk: struct clk * for a DPLL
+ * @clk: struct clk_core * for a DPLL
* @target_rate: desired DPLL clock rate
*
* Given a DPLL and a desired target rate, round the target rate to a
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 500530d..ab341e4 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -142,7 +142,7 @@ static int _wait_idlest_generic(struct clk_hw_omap *clk, void __iomem *reg,
/**
* _omap2_module_wait_ready - wait for an OMAP module to leave IDLE
- * @clk: struct clk * belonging to the module
+ * @clk: struct clk_core * belonging to the module
*
* If the necessary clocks for the OMAP hardware IP block that
* corresponds to clock @clk are enabled, then wait for the module to
@@ -181,7 +181,7 @@ static void _omap2_module_wait_ready(struct clk_hw_omap *clk)
* omap2_init_clk_clkdm - look up a clockdomain name, store pointer in clk
* @clk: OMAP clock struct ptr to use
*
- * Convert a clockdomain name stored in a struct clk 'clk' into a
+ * Convert a clockdomain name stored in a struct clk_core 'clk' into a
* clockdomain pointer, and save it into the struct clk. Intended to be
* called during clk_register(). No return value.
*/
@@ -222,7 +222,7 @@ void __init omap2_clk_disable_clkdm_control(void)
/**
* omap2_clk_dflt_find_companion - find companion clock to @clk
- * @clk: struct clk * to find the companion clock of
+ * @clk: struct clk_core * to find the companion clock of
* @other_reg: void __iomem ** to return the companion clock CM_*CLKEN va in
* @other_bit: u8 ** to return the companion clock bit shift in
*
@@ -258,7 +258,7 @@ void omap2_clk_dflt_find_companion(struct clk_hw_omap *clk,
/**
* omap2_clk_dflt_find_idlest - find CM_IDLEST reg va, bit shift for @clk
- * @clk: struct clk * to find IDLEST info for
+ * @clk: struct clk_core * to find IDLEST info for
* @idlest_reg: void __iomem ** to return the CM_IDLEST va in
* @idlest_bit: u8 * to return the CM_IDLEST bit shift in
* @idlest_val: u8 * to return the idle status indicator
@@ -502,14 +502,14 @@ __setup("mpurate=", omap_clk_setup);
/**
* omap2_init_clk_hw_omap_clocks - initialize an OMAP clock
- * @clk: struct clk * to initialize
+ * @clk: struct clk_core * to initialize
*
* Add an OMAP clock @clk to the internal list of OMAP clocks. Used
* temporarily for autoidle handling, until this support can be
* integrated into the common clock framework code in some way. No
* return value.
*/
-void omap2_init_clk_hw_omap_clocks(struct clk *clk)
+void omap2_init_clk_hw_omap_clocks(struct clk_core *clk)
{
struct clk_hw_omap *c;
@@ -566,11 +566,11 @@ int omap2_clk_disable_autoidle_all(void)
/**
* omap2_clk_deny_idle - disable autoidle on an OMAP clock
- * @clk: struct clk * to disable autoidle for
+ * @clk: struct clk_core * to disable autoidle for
*
* Disable autoidle on an OMAP clock.
*/
-int omap2_clk_deny_idle(struct clk *clk)
+int omap2_clk_deny_idle(struct clk_core *clk)
{
struct clk_hw_omap *c;
@@ -585,11 +585,11 @@ int omap2_clk_deny_idle(struct clk *clk)
/**
* omap2_clk_allow_idle - enable autoidle on an OMAP clock
- * @clk: struct clk * to enable autoidle for
+ * @clk: struct clk_core * to enable autoidle for
*
* Enable autoidle on an OMAP clock.
*/
-int omap2_clk_allow_idle(struct clk *clk)
+int omap2_clk_allow_idle(struct clk_core *clk)
{
struct clk_hw_omap *c;
@@ -614,12 +614,12 @@ int omap2_clk_allow_idle(struct clk *clk)
*/
void omap2_clk_enable_init_clocks(const char **clk_names, u8 num_clocks)
{
- struct clk *init_clk;
+ struct clk_core *init_clk;
int i;
for (i = 0; i < num_clocks; i++) {
- init_clk = clk_get(NULL, clk_names[i]);
- clk_prepare_enable(init_clk);
+ init_clk = clk_provider_get(NULL, clk_names[i]);
+ clk_provider_prepare_enable(init_clk);
}
}
@@ -655,31 +655,31 @@ void __init omap_clocks_register(struct omap_clk oclks[], int cnt)
* the OPP layer. XXX This is intended to be handled by the OPP layer
* code in the near future and should be removed from the clock code.
* Returns -EINVAL if 'mpurate' is zero or if clk_set_rate() rejects
- * the rate, -ENOENT if the struct clk referred to by @mpurate_ck_name
+ * the rate, -ENOENT if the struct clk_core referred to by @mpurate_ck_name
* cannot be found, or 0 upon success.
*/
int __init omap2_clk_switch_mpurate_at_boot(const char *mpurate_ck_name)
{
- struct clk *mpurate_ck;
+ struct clk_core *mpurate_ck;
int r;
if (!mpurate)
return -EINVAL;
- mpurate_ck = clk_get(NULL, mpurate_ck_name);
+ mpurate_ck = clk_provider_get(NULL, mpurate_ck_name);
if (WARN(IS_ERR(mpurate_ck), "Failed to get %s.\n", mpurate_ck_name))
return -ENOENT;
- r = clk_set_rate(mpurate_ck, mpurate);
+ r = clk_provider_set_rate(mpurate_ck, mpurate);
if (r < 0) {
WARN(1, "clock: %s: unable to set MPU rate to %d: %d\n",
mpurate_ck_name, mpurate, r);
- clk_put(mpurate_ck);
+ __clk_put(mpurate_ck);
return -EINVAL;
}
calibrate_delay();
- clk_put(mpurate_ck);
+ __clk_put(mpurate_ck);
return 0;
}
@@ -700,27 +700,27 @@ void __init omap2_clk_print_new_rates(const char *hfclkin_ck_name,
const char *core_ck_name,
const char *mpu_ck_name)
{
- struct clk *hfclkin_ck, *core_ck, *mpu_ck;
+ struct clk_core *hfclkin_ck, *core_ck, *mpu_ck;
unsigned long hfclkin_rate;
- mpu_ck = clk_get(NULL, mpu_ck_name);
+ mpu_ck = clk_provider_get(NULL, mpu_ck_name);
if (WARN(IS_ERR(mpu_ck), "clock: failed to get %s.\n", mpu_ck_name))
return;
- core_ck = clk_get(NULL, core_ck_name);
+ core_ck = clk_provider_get(NULL, core_ck_name);
if (WARN(IS_ERR(core_ck), "clock: failed to get %s.\n", core_ck_name))
return;
- hfclkin_ck = clk_get(NULL, hfclkin_ck_name);
+ hfclkin_ck = clk_provider_get(NULL, hfclkin_ck_name);
if (WARN(IS_ERR(hfclkin_ck), "Failed to get %s.\n", hfclkin_ck_name))
return;
- hfclkin_rate = clk_get_rate(hfclkin_ck);
+ hfclkin_rate = clk_provider_get_rate(hfclkin_ck);
pr_info("Switched to new clocking rate (Crystal/Core/MPU): %ld.%01ld/%ld/%ld MHz\n",
(hfclkin_rate / 1000000), ((hfclkin_rate / 100000) % 10),
- (clk_get_rate(core_ck) / 1000000),
- (clk_get_rate(mpu_ck) / 1000000));
+ (clk_provider_get_rate(core_ck) / 1000000),
+ (clk_provider_get_rate(mpu_ck) / 1000000));
}
/**
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index 4592a27..7068684 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -40,7 +40,7 @@ struct omap_clk {
struct clockdomain;
#define DEFINE_STRUCT_CLK(_name, _parent_array_name, _clkops_name) \
- static struct clk _name = { \
+ static struct clk_core _name = { \
.name = #_name, \
.hw = &_name##_hw.hw, \
.parent_names = _parent_array_name, \
@@ -50,7 +50,7 @@ struct clockdomain;
#define DEFINE_STRUCT_CLK_FLAGS(_name, _parent_array_name, \
_clkops_name, _flags) \
- static struct clk _name = { \
+ static struct clk_core _name = { \
.name = #_name, \
.hw = &_name##_hw.hw, \
.parent_names = _parent_array_name, \
@@ -70,7 +70,7 @@ struct clockdomain;
#define DEFINE_CLK_OMAP_MUX(_name, _clkdm_name, _clksel, \
_clksel_reg, _clksel_mask, \
_parent_names, _ops) \
- static struct clk _name; \
+ static struct clk_core _name; \
static struct clk_hw_omap _name##_hw = { \
.hw = { \
.clk = &_name, \
@@ -86,7 +86,7 @@ struct clockdomain;
_clksel_reg, _clksel_mask, \
_enable_reg, _enable_bit, \
_hwops, _parent_names, _ops) \
- static struct clk _name; \
+ static struct clk_core _name; \
static struct clk_hw_omap _name##_hw = { \
.hw = { \
.clk = &_name, \
@@ -142,14 +142,14 @@ struct clksel_rate {
/**
* struct clksel - available parent clocks, and a pointer to their divisors
- * @parent: struct clk * to a possible parent clock
+ * @parent: struct clk_core * to a possible parent clock
* @rates: available divisors for this parent clock
*
* A struct clksel is always associated with one or more struct clks
* and one or more struct clksel_rates.
*/
struct clksel {
- struct clk *parent;
+ struct clk_core *parent;
const struct clksel_rate *rates;
};
@@ -208,8 +208,8 @@ void omap2_clk_dflt_find_idlest(struct clk_hw_omap *clk,
void __iomem **idlest_reg,
u8 *idlest_bit, u8 *idlest_val);
int omap2_clk_enable_autoidle_all(void);
-int omap2_clk_allow_idle(struct clk *clk);
-int omap2_clk_deny_idle(struct clk *clk);
+int omap2_clk_allow_idle(struct clk_core *clk);
+int omap2_clk_deny_idle(struct clk_core *clk);
int omap2_clk_switch_mpurate_at_boot(const char *mpurate_ck_name);
void omap2_clk_print_new_rates(const char *hfclkin_ck_name,
const char *core_ck_name,
@@ -247,7 +247,7 @@ extern const struct clksel_rate gpt_32k_rates[];
extern const struct clksel_rate gpt_sys_rates[];
extern const struct clksel_rate gfx_l3_rates[];
extern const struct clksel_rate dsp_ick_rates[];
-extern struct clk dummy_ck;
+extern struct clk_core dummy_ck;
extern const struct clk_hw_omap_ops clkhwops_iclk_wait;
extern const struct clk_hw_omap_ops clkhwops_wait;
diff --git a/arch/arm/mach-omap2/clock3xxx.c b/arch/arm/mach-omap2/clock3xxx.c
index 0b02b41..8d1b843 100644
--- a/arch/arm/mach-omap2/clock3xxx.c
+++ b/arch/arm/mach-omap2/clock3xxx.c
@@ -18,7 +18,6 @@
#include <linux/kernel.h>
#include <linux/errno.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include "soc.h"
@@ -37,7 +36,7 @@
#define DPLL5_FREQ_FOR_USBHOST 120000000
/* needed by omap3_core_dpll_m2_set_rate() */
-struct clk *sdrc_ick_p, *arm_fck_p;
+struct clk_core *sdrc_ick_p, *arm_fck_p;
int omap3_dpll4_set_rate(struct clk_hw *hw, unsigned long rate,
unsigned long parent_rate)
{
@@ -56,20 +55,20 @@ int omap3_dpll4_set_rate(struct clk_hw *hw, unsigned long rate,
void __init omap3_clk_lock_dpll5(void)
{
- struct clk *dpll5_clk;
- struct clk *dpll5_m2_clk;
+ struct clk_core *dpll5_clk;
+ struct clk_core *dpll5_m2_clk;
- dpll5_clk = clk_get(NULL, "dpll5_ck");
- clk_set_rate(dpll5_clk, DPLL5_FREQ_FOR_USBHOST);
- clk_prepare_enable(dpll5_clk);
+ dpll5_clk = clk_provider_get(NULL, "dpll5_ck");
+ clk_provider_set_rate(dpll5_clk, DPLL5_FREQ_FOR_USBHOST);
+ clk_provider_prepare_enable(dpll5_clk);
/* Program dpll5_m2_clk divider for no division */
- dpll5_m2_clk = clk_get(NULL, "dpll5_m2_ck");
- clk_prepare_enable(dpll5_m2_clk);
- clk_set_rate(dpll5_m2_clk, DPLL5_FREQ_FOR_USBHOST);
+ dpll5_m2_clk = clk_provider_get(NULL, "dpll5_m2_ck");
+ clk_provider_prepare_enable(dpll5_m2_clk);
+ clk_provider_set_rate(dpll5_m2_clk, DPLL5_FREQ_FOR_USBHOST);
- clk_disable_unprepare(dpll5_m2_clk);
- clk_disable_unprepare(dpll5_clk);
+ clk_provider_disable_unprepare(dpll5_m2_clk);
+ clk_provider_disable_unprepare(dpll5_clk);
return;
}
diff --git a/arch/arm/mach-omap2/clock3xxx.h b/arch/arm/mach-omap2/clock3xxx.h
index 78d9f56..063fbf1 100644
--- a/arch/arm/mach-omap2/clock3xxx.h
+++ b/arch/arm/mach-omap2/clock3xxx.h
@@ -12,8 +12,8 @@ int omap3xxx_clk_init(void);
int omap3_core_dpll_m2_set_rate(struct clk_hw *clk, unsigned long rate,
unsigned long parent_rate);
-extern struct clk *sdrc_ick_p;
-extern struct clk *arm_fck_p;
+extern struct clk_core *sdrc_ick_p;
+extern struct clk_core *arm_fck_p;
extern const struct clkops clkops_noncore_dpll_ops;
diff --git a/arch/arm/mach-omap2/clock_common_data.c b/arch/arm/mach-omap2/clock_common_data.c
index ef4d21b..31e3e79 100644
--- a/arch/arm/mach-omap2/clock_common_data.c
+++ b/arch/arm/mach-omap2/clock_common_data.c
@@ -119,7 +119,7 @@ const struct clksel_rate div31_1to31_rates[] = {
static struct clk_ops dummy_ck_ops = {};
-struct clk dummy_ck = {
+struct clk_core dummy_ck = {
.name = "dummy_clk",
.ops = &dummy_ck_ops,
.flags = CLK_IS_BASIC,
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index 2da3b5e..dd89095 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -19,7 +19,6 @@
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/delay.h>
-#include <linux/clk.h>
#include <linux/limits.h>
#include <linux/err.h>
#include <linux/clk-provider.h>
@@ -1141,7 +1140,7 @@ static int _clkdm_clk_hwmod_enable(struct clockdomain *clkdm)
/**
* clkdm_clk_enable - add an enabled downstream clock to this clkdm
* @clkdm: struct clockdomain *
- * @clk: struct clk * of the enabled downstream clock
+ * @clk: struct clk_core * of the enabled downstream clock
*
* Increment the usecount of the clockdomain @clkdm and ensure that it
* is awake before @clk is enabled. Intended to be called by
@@ -1152,7 +1151,7 @@ static int _clkdm_clk_hwmod_enable(struct clockdomain *clkdm)
* by on-chip processors. Returns -EINVAL if passed null pointers;
* returns 0 upon success or if the clockdomain is in hwsup idle mode.
*/
-int clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk)
+int clkdm_clk_enable(struct clockdomain *clkdm, struct clk_core *clk)
{
/*
* XXX Rewrite this code to maintain a list of enabled
@@ -1168,7 +1167,7 @@ int clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk)
/**
* clkdm_clk_disable - remove an enabled downstream clock from this clkdm
* @clkdm: struct clockdomain *
- * @clk: struct clk * of the disabled downstream clock
+ * @clk: struct clk_core * of the disabled downstream clock
*
* Decrement the usecount of this clockdomain @clkdm when @clk is
* disabled. Intended to be called by clk_disable() code. If the
@@ -1178,7 +1177,7 @@ int clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk)
* pointers; -ERANGE if the @clkdm usecount underflows; or returns 0
* upon success or if the clockdomain is in hwsup idle mode.
*/
-int clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk)
+int clkdm_clk_disable(struct clockdomain *clkdm, struct clk_core *clk)
{
if (!clkdm || !clk || !arch_clkdm || !arch_clkdm->clkdm_clk_disable)
return -EINVAL;
diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h
index 82c37b1..f1a2cad 100644
--- a/arch/arm/mach-omap2/clockdomain.h
+++ b/arch/arm/mach-omap2/clockdomain.h
@@ -207,8 +207,8 @@ int clkdm_wakeup(struct clockdomain *clkdm);
int clkdm_sleep_nolock(struct clockdomain *clkdm);
int clkdm_sleep(struct clockdomain *clkdm);
-int clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk);
-int clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk);
+int clkdm_clk_enable(struct clockdomain *clkdm, struct clk_core *clk);
+int clkdm_clk_disable(struct clockdomain *clkdm, struct clk_core *clk);
int clkdm_hwmod_enable(struct clockdomain *clkdm, struct omap_hwmod *oh);
int clkdm_hwmod_disable(struct clockdomain *clkdm, struct omap_hwmod *oh);
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index 0f9e479..ff1f6c1 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -20,7 +20,6 @@
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/err.h>
#include <linux/delay.h>
@@ -524,7 +523,7 @@ int omap_dss_reset(struct omap_hwmod *oh)
for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
if (oc->_clk)
- clk_prepare_enable(oc->_clk);
+ clk_provider_prepare_enable(oc->_clk);
dispc_disable_outputs();
@@ -551,7 +550,7 @@ int omap_dss_reset(struct omap_hwmod *oh)
for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
if (oc->_clk)
- clk_disable_unprepare(oc->_clk);
+ clk_provider_disable_unprepare(oc->_clk);
r = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c
index ac3d789..39c3861 100644
--- a/arch/arm/mach-omap2/dpll3xxx.c
+++ b/arch/arm/mach-omap2/dpll3xxx.c
@@ -23,7 +23,6 @@
#include <linux/list.h>
#include <linux/errno.h>
#include <linux/delay.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include <linux/bitops.h>
#include <linux/clkdev.h>
@@ -288,7 +287,7 @@ static void _lookup_sddiv(struct clk_hw_omap *clk, u8 *sd_div, u16 m, u8 n)
/*
* _omap3_noncore_dpll_program - set non-core DPLL M,N values directly
- * @clk: struct clk * of DPLL to set
+ * @clk: struct clk_core * of DPLL to set
* @freqsel: FREQSEL value to set
*
* Program the DPLL with the last M, N values calculated, and wait for
@@ -410,7 +409,7 @@ int omap3_noncore_dpll_enable(struct clk_hw *hw)
struct clk_hw_omap *clk = to_clk_hw_omap(hw);
int r;
struct dpll_data *dd;
- struct clk *parent;
+ struct clk_core *parent;
dd = clk->dpll_data;
if (!dd)
@@ -461,7 +460,7 @@ void omap3_noncore_dpll_disable(struct clk_hw *hw)
/**
* omap3_noncore_dpll_set_rate - set non-core DPLL rate
- * @clk: struct clk * of DPLL to set
+ * @clk: struct clk_core * of DPLL to set
* @rate: rounded target rate
*
* Set the DPLL CLKOUT to the target rate. If the DPLL can enter
@@ -474,7 +473,7 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate,
unsigned long parent_rate)
{
struct clk_hw_omap *clk = to_clk_hw_omap(hw);
- struct clk *new_parent = NULL;
+ struct clk_core *new_parent = NULL;
unsigned long rrate;
u16 freqsel = 0;
struct dpll_data *dd;
@@ -493,15 +492,15 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate,
__func__, __clk_get_name(hw->clk));
__clk_prepare(dd->clk_bypass);
- clk_enable(dd->clk_bypass);
+ clk_provider_enable(dd->clk_bypass);
ret = _omap3_noncore_dpll_bypass(clk);
if (!ret)
new_parent = dd->clk_bypass;
- clk_disable(dd->clk_bypass);
+ clk_provider_disable(dd->clk_bypass);
__clk_unprepare(dd->clk_bypass);
} else {
__clk_prepare(dd->clk_ref);
- clk_enable(dd->clk_ref);
+ clk_provider_enable(dd->clk_ref);
/* XXX this check is probably pointless in the CCF context */
if (dd->last_rounded_rate != rate) {
@@ -530,7 +529,7 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate,
ret = omap3_noncore_dpll_program(clk, freqsel);
if (!ret)
new_parent = dd->clk_ref;
- clk_disable(dd->clk_ref);
+ clk_provider_disable(dd->clk_ref);
__clk_unprepare(dd->clk_ref);
}
/*
@@ -540,7 +539,7 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate,
* stuff is inherited for free
*/
- if (!ret && clk_get_parent(hw->clk) != new_parent)
+ if (!ret && clk_provider_get_parent(hw->clk) != new_parent)
__clk_reparent(hw->clk, new_parent);
return 0;
@@ -550,10 +549,10 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate,
/**
* omap3_dpll_autoidle_read - read a DPLL's autoidle bits
- * @clk: struct clk * of the DPLL to read
+ * @clk: struct clk_core * of the DPLL to read
*
* Return the DPLL's autoidle bits, shifted down to bit 0. Returns
- * -EINVAL if passed a null pointer or if the struct clk does not
+ * -EINVAL if passed a null pointer or if the struct clk_core does not
* appear to refer to a DPLL.
*/
u32 omap3_dpll_autoidle_read(struct clk_hw_omap *clk)
@@ -578,7 +577,7 @@ u32 omap3_dpll_autoidle_read(struct clk_hw_omap *clk)
/**
* omap3_dpll_allow_idle - enable DPLL autoidle bits
- * @clk: struct clk * of the DPLL to operate on
+ * @clk: struct clk_core * of the DPLL to operate on
*
* Enable DPLL automatic idle control. This automatic idle mode
* switching takes effect only when the DPLL is locked, at least on
@@ -612,7 +611,7 @@ void omap3_dpll_allow_idle(struct clk_hw_omap *clk)
/**
* omap3_dpll_deny_idle - prevent DPLL from automatically idling
- * @clk: struct clk * of the DPLL to operate on
+ * @clk: struct clk_core * of the DPLL to operate on
*
* Disable DPLL automatic idle control. No return value.
*/
@@ -642,7 +641,7 @@ void omap3_dpll_deny_idle(struct clk_hw_omap *clk)
static struct clk_hw_omap *omap3_find_clkoutx2_dpll(struct clk_hw *hw)
{
struct clk_hw_omap *pclk = NULL;
- struct clk *parent;
+ struct clk_core *parent;
/* Walk up the parents of clk, looking for a DPLL */
do {
diff --git a/arch/arm/mach-omap2/dpll44xx.c b/arch/arm/mach-omap2/dpll44xx.c
index 4613f1e..726b254 100644
--- a/arch/arm/mach-omap2/dpll44xx.c
+++ b/arch/arm/mach-omap2/dpll44xx.c
@@ -11,7 +11,6 @@
#include <linux/kernel.h>
#include <linux/errno.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include <linux/bitops.h>
@@ -124,7 +123,7 @@ static void omap4_dpll_lpmode_recalc(struct dpll_data *dd)
/**
* omap4_dpll_regm4xen_recalc - compute DPLL rate, considering REGM4XEN bit
- * @clk: struct clk * of the DPLL to compute the rate for
+ * @clk: struct clk_core * of the DPLL to compute the rate for
*
* Compute the output rate for the OMAP4 DPLL represented by @clk.
* Takes the REGM4XEN bit into consideration, which is needed for the
@@ -156,7 +155,7 @@ unsigned long omap4_dpll_regm4xen_recalc(struct clk_hw *hw,
/**
* omap4_dpll_regm4xen_round_rate - round DPLL rate, considering REGM4XEN bit
- * @clk: struct clk * of the DPLL to round a rate for
+ * @clk: struct clk_core * of the DPLL to round a rate for
* @target_rate: the desired rate of the DPLL
*
* Compute the rate that would be programmed into the DPLL hardware
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index b4ac3af..1424c90 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -12,7 +12,6 @@
*/
#include <linux/module.h>
#include <linux/init.h>
-#include <linux/clk.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/of.h>
@@ -34,7 +33,7 @@
#include "cm3xxx.h"
#include "cm-regbits-34xx.h"
-static struct clk *mcbsp_iclks[5];
+static struct clk_core *mcbsp_iclks[5];
static int omap3_enable_st_clock(unsigned int id, bool enable)
{
@@ -98,7 +97,7 @@ static int __init omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
(struct omap_mcbsp_dev_attr *)(oh->dev_attr))->sidetone);
pdata->enable_st_clock = omap3_enable_st_clock;
sprintf(clk_name, "mcbsp%d_ick", id);
- mcbsp_iclks[id] = clk_get(NULL, clk_name);
+ mcbsp_iclks[id] = clk_provider_get(NULL, clk_name);
count++;
}
pdev = omap_device_build_ss(name, id, oh_device, count, pdata,
diff --git a/arch/arm/mach-omap2/omap_device.c b/arch/arm/mach-omap2/omap_device.c
index f138a62..c5386a4 100644
--- a/arch/arm/mach-omap2/omap_device.c
+++ b/arch/arm/mach-omap2/omap_device.c
@@ -30,7 +30,6 @@
#include <linux/slab.h>
#include <linux/err.h>
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/pm_runtime.h>
@@ -47,7 +46,7 @@
static void _add_clkdev(struct omap_device *od, const char *clk_alias,
const char *clk_name)
{
- struct clk *r;
+ struct clk_core *r;
struct clk_lookup *l;
if (!clk_alias || !clk_name)
@@ -55,15 +54,15 @@ static void _add_clkdev(struct omap_device *od, const char *clk_alias,
dev_dbg(&od->pdev->dev, "Creating %s -> %s\n", clk_alias, clk_name);
- r = clk_get_sys(dev_name(&od->pdev->dev), clk_alias);
+ r = clk_provider_get_sys(dev_name(&od->pdev->dev), clk_alias);
if (!IS_ERR(r)) {
dev_dbg(&od->pdev->dev,
"alias %s already exists\n", clk_alias);
- clk_put(r);
+ __clk_put(r);
return;
}
- r = clk_get(NULL, clk_name);
+ r = clk_provider_get(NULL, clk_name);
if (IS_ERR(r)) {
dev_err(&od->pdev->dev,
"clk_get for %s failed\n", clk_name);
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 8fd87a3..c61b392 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -753,7 +753,7 @@ static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
}
/**
- * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
+ * _init_main_clk - get a struct clk_core * for the the hwmod's main functional clk
* @oh: struct omap_hwmod *
*
* Called from _init_clocks(). Populates the @oh _clk (main
@@ -767,7 +767,7 @@ static int _init_main_clk(struct omap_hwmod *oh)
if (!oh->main_clk)
return 0;
- oh->_clk = clk_get(NULL, oh->main_clk);
+ oh->_clk = clk_provider_get(NULL, oh->main_clk);
if (IS_ERR(oh->_clk)) {
pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
oh->name, oh->main_clk);
@@ -781,7 +781,7 @@ static int _init_main_clk(struct omap_hwmod *oh)
* some point where subsystems like i2c and pmic become
* available.
*/
- clk_prepare(oh->_clk);
+ clk_provider_prepare(oh->_clk);
if (!_get_clkdm(oh))
pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
@@ -791,7 +791,7 @@ static int _init_main_clk(struct omap_hwmod *oh)
}
/**
- * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
+ * _init_interface_clks - get a struct clk_core * for the the hwmod's interface clks
* @oh: struct omap_hwmod *
*
* Called from _init_clocks(). Populates the @oh OCP slave interface
@@ -801,7 +801,7 @@ static int _init_interface_clks(struct omap_hwmod *oh)
{
struct omap_hwmod_ocp_if *os;
struct list_head *p;
- struct clk *c;
+ struct clk_core *c;
int i = 0;
int ret = 0;
@@ -812,7 +812,7 @@ static int _init_interface_clks(struct omap_hwmod *oh)
if (!os->clk)
continue;
- c = clk_get(NULL, os->clk);
+ c = clk_provider_get(NULL, os->clk);
if (IS_ERR(c)) {
pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
oh->name, os->clk);
@@ -828,14 +828,14 @@ static int _init_interface_clks(struct omap_hwmod *oh)
* some point where subsystems like i2c and pmic become
* available.
*/
- clk_prepare(os->_clk);
+ clk_provider_prepare(os->_clk);
}
return ret;
}
/**
- * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
+ * _init_opt_clk - get a struct clk_core * for the the hwmod's optional clocks
* @oh: struct omap_hwmod *
*
* Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
@@ -844,12 +844,12 @@ static int _init_interface_clks(struct omap_hwmod *oh)
static int _init_opt_clks(struct omap_hwmod *oh)
{
struct omap_hwmod_opt_clk *oc;
- struct clk *c;
+ struct clk_core *c;
int i;
int ret = 0;
for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
- c = clk_get(NULL, oc->clk);
+ c = clk_provider_get(NULL, oc->clk);
if (IS_ERR(c)) {
pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
oh->name, oc->clk);
@@ -865,7 +865,7 @@ static int _init_opt_clks(struct omap_hwmod *oh)
* some point where subsystems like i2c and pmic become
* available.
*/
- clk_prepare(oc->_clk);
+ clk_provider_prepare(oc->_clk);
}
return ret;
@@ -887,7 +887,7 @@ static int _enable_clocks(struct omap_hwmod *oh)
pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
if (oh->_clk)
- clk_enable(oh->_clk);
+ clk_provider_enable(oh->_clk);
p = oh->slave_ports.next;
@@ -895,7 +895,7 @@ static int _enable_clocks(struct omap_hwmod *oh)
os = _fetch_next_ocp_if(&p, &i);
if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
- clk_enable(os->_clk);
+ clk_provider_enable(os->_clk);
}
/* The opt clocks are controlled by the device driver. */
@@ -918,7 +918,7 @@ static int _disable_clocks(struct omap_hwmod *oh)
pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
if (oh->_clk)
- clk_disable(oh->_clk);
+ clk_provider_disable(oh->_clk);
p = oh->slave_ports.next;
@@ -926,7 +926,7 @@ static int _disable_clocks(struct omap_hwmod *oh)
os = _fetch_next_ocp_if(&p, &i);
if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
- clk_disable(os->_clk);
+ clk_provider_disable(os->_clk);
}
/* The opt clocks are controlled by the device driver. */
@@ -945,7 +945,7 @@ static void _enable_optional_clocks(struct omap_hwmod *oh)
if (oc->_clk) {
pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
__clk_get_name(oc->_clk));
- clk_enable(oc->_clk);
+ clk_provider_enable(oc->_clk);
}
}
@@ -960,7 +960,7 @@ static void _disable_optional_clocks(struct omap_hwmod *oh)
if (oc->_clk) {
pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
__clk_get_name(oc->_clk));
- clk_disable(oc->_clk);
+ clk_provider_disable(oc->_clk);
}
}
@@ -2589,7 +2589,7 @@ static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
/* XXX omap_iclk_deny_idle(c); */
} else {
/* XXX omap_iclk_allow_idle(c); */
- clk_enable(os->_clk);
+ clk_provider_enable(os->_clk);
}
}
@@ -3396,7 +3396,7 @@ static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
* Initialize and set up a single hwmod. Intended to be used for a
* small number of early devices, such as the timer IP blocks used for
* the scheduler clock. Must be called after omap2_clk_init().
- * Resolves the struct clk names to struct clk pointers for each
+ * Resolves the struct clk_core names to struct clk_core pointers for each
* registered omap_hwmod. Also calls _setup() on each hwmod. Returns
* -EINVAL upon error or 0 upon success.
*/
@@ -3425,7 +3425,7 @@ int __init omap_hwmod_setup_one(const char *oh_name)
*
* Initialize and set up all IP blocks registered with the hwmod code.
* Must be called after omap2_clk_init(). Resolves the struct clk
- * names to struct clk pointers for each registered omap_hwmod. Also
+ * names to struct clk_core pointers for each registered omap_hwmod. Also
* calls _setup() on each hwmod. Returns 0 upon success.
*/
static int __init omap_hwmod_setup_all(void)
@@ -3792,7 +3792,7 @@ int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
*/
struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
{
- struct clk *c;
+ struct clk_core *c;
struct omap_hwmod_ocp_if *oi;
struct clockdomain *clkdm;
struct clk_hw_omap *clk;
diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h
index 0f97d63..46ffd06 100644
--- a/arch/arm/mach-omap2/omap_hwmod.h
+++ b/arch/arm/mach-omap2/omap_hwmod.h
@@ -207,7 +207,7 @@ struct omap_hwmod_rst_info {
* struct omap_hwmod_opt_clk - optional clocks used by this hwmod
* @role: "sys", "32k", "tv", etc -- for use in clk_get()
* @clk: opt clock: OMAP clock name
- * @_clk: pointer to the struct clk (filled in at runtime)
+ * @_clk: pointer to the struct clk_core (filled in at runtime)
*
* The module's interface clock and main functional clock should not
* be added as optional clocks.
@@ -215,7 +215,7 @@ struct omap_hwmod_rst_info {
struct omap_hwmod_opt_clk {
const char *role;
const char *clk;
- struct clk *_clk;
+ struct clk_core *_clk;
};
@@ -289,7 +289,7 @@ struct omap_hwmod_addr_space {
* @slave: struct omap_hwmod that responds to OCP transactions on this link
* @addr: address space associated with this link
* @clk: interface clock: OMAP clock name
- * @_clk: pointer to the interface struct clk (filled in at runtime)
+ * @_clk: pointer to the interface struct clk_core (filled in at runtime)
* @fw: interface firewall data
* @width: OCP data width
* @user: initiators using this interface (see OCP_USER_* macros above)
@@ -306,7 +306,7 @@ struct omap_hwmod_ocp_if {
struct omap_hwmod *slave;
struct omap_hwmod_addr_space *addr;
const char *clk;
- struct clk *_clk;
+ struct clk_core *_clk;
union {
struct omap_hwmod_omap2_firewall omap2;
} fw;
@@ -611,7 +611,7 @@ struct omap_hwmod_link {
* @sdma_reqs: ptr to an array of System DMA request IDs
* @prcm: PRCM data pertaining to this hwmod
* @main_clk: main clock: OMAP clock name
- * @_clk: pointer to the main struct clk (filled in at runtime)
+ * @_clk: pointer to the main struct clk_core (filled in at runtime)
* @opt_clks: other device clocks that drivers can request (0..*)
* @voltdm: pointer to voltage domain (filled in at runtime)
* @dev_attr: arbitrary device attributes that can be passed to the driver
@@ -653,7 +653,7 @@ struct omap_hwmod {
struct omap_hwmod_omap4_prcm omap4;
} prcm;
const char *main_clk;
- struct clk *_clk;
+ struct clk_core *_clk;
struct omap_hwmod_opt_clk *opt_clks;
char *clkdm_name;
struct clockdomain *clkdm;
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index fe01c5a..56e5e77 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -60,7 +60,7 @@ static void (*omap2_sram_suspend)(u32 dllctrl, void __iomem *sdrc_dlla_ctrl,
static struct powerdomain *mpu_pwrdm, *core_pwrdm;
static struct clockdomain *dsp_clkdm, *mpu_clkdm, *wkup_clkdm, *gfx_clkdm;
-static struct clk *osc_ck, *emul_ck;
+static struct clk_core *osc_ck, *emul_ck;
static int omap2_enter_full_retention(void)
{
@@ -71,7 +71,7 @@ static int omap2_enter_full_retention(void)
* oscillator itself it will be disabled if/when we enter retention
* mode.
*/
- clk_disable(osc_ck);
+ clk_provider_disable(osc_ck);
/* Clear old wake-up events */
/* REVISIT: These write to reserved bits? */
@@ -101,7 +101,7 @@ static int omap2_enter_full_retention(void)
no_sleep:
omap2_gpio_resume_after_idle();
- clk_enable(osc_ck);
+ clk_provider_enable(osc_ck);
/* clear CORE wake-up events */
omap2xxx_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0);
@@ -287,17 +287,17 @@ int __init omap2_pm_init(void)
pr_err("PM: gfx_clkdm not found\n");
- osc_ck = clk_get(NULL, "osc_ck");
+ osc_ck = clk_provider_get(NULL, "osc_ck");
if (IS_ERR(osc_ck)) {
printk(KERN_ERR "could not get osc_ck\n");
return -ENODEV;
}
if (cpu_is_omap242x()) {
- emul_ck = clk_get(NULL, "emul_ck");
+ emul_ck = clk_provider_get(NULL, "emul_ck");
if (IS_ERR(emul_ck)) {
printk(KERN_ERR "could not get emul_ck\n");
- clk_put(osc_ck);
+ __clk_put(osc_ck);
return -ENODEV;
}
}
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 6bbb7b5..6be2d2d 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -62,7 +62,7 @@ void __init orion5x_map_io(void)
/*****************************************************************************
* CLK tree
****************************************************************************/
-static struct clk *tclk;
+static struct clk_core *tclk;
void __init clk_init(void)
{
diff --git a/arch/arm/mach-shmobile/clock.c b/arch/arm/mach-shmobile/clock.c
index ed415dc..827f746 100644
--- a/arch/arm/mach-shmobile/clock.c
+++ b/arch/arm/mach-shmobile/clock.c
@@ -23,7 +23,6 @@
#include <linux/init.h>
#ifdef CONFIG_COMMON_CLK
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include "clock.h"
@@ -32,17 +31,17 @@ void __init shmobile_clk_workaround(const struct clk_name *clks,
int nr_clks, bool enable)
{
const struct clk_name *clkn;
- struct clk *clk;
+ struct clk_core *clk;
unsigned int i;
for (i = 0; i < nr_clks; ++i) {
clkn = clks + i;
- clk = clk_get(NULL, clkn->clk);
+ clk = clk_provider_get(NULL, clkn->clk);
if (!IS_ERR(clk)) {
clk_register_clkdev(clk, clkn->con_id, clkn->dev_id);
if (enable)
- clk_prepare_enable(clk);
- clk_put(clk);
+ clk_provider_prepare_enable(clk);
+ __clk_put(clk);
}
}
}
diff --git a/arch/arm/mach-vexpress/spc.c b/arch/arm/mach-vexpress/spc.c
index f61158c..e497df6 100644
--- a/arch/arm/mach-vexpress/spc.c
+++ b/arch/arm/mach-vexpress/spc.c
@@ -529,7 +529,7 @@ static struct clk_ops clk_spc_ops = {
.set_rate = spc_set_rate,
};
-static struct clk *ve_spc_clk_register(struct device *cpu_dev)
+static struct clk_core *ve_spc_clk_register(struct device *cpu_dev)
{
struct clk_init_data init;
struct clk_spc *spc;
@@ -556,7 +556,7 @@ static struct clk *ve_spc_clk_register(struct device *cpu_dev)
static int __init ve_spc_clk_init(void)
{
int cpu;
- struct clk *clk;
+ struct clk_core *clk;
if (!info)
return 0; /* Continue only if SPC is initialised */
diff --git a/arch/arm/plat-orion/common.c b/arch/arm/plat-orion/common.c
index 961b593..abf63ce 100644
--- a/arch/arm/plat-orion/common.c
+++ b/arch/arm/plat-orion/common.c
@@ -14,7 +14,6 @@
#include <linux/dma-mapping.h>
#include <linux/serial_8250.h>
#include <linux/ata_platform.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/mv643xx_eth.h>
@@ -27,7 +26,7 @@
/* Create a clkdev entry for a given device/clk */
void __init orion_clkdev_add(const char *con_id, const char *dev_id,
- struct clk *clk)
+ struct clk_core *clk)
{
struct clk_lookup *cl;
@@ -40,7 +39,7 @@ void __init orion_clkdev_add(const char *con_id, const char *dev_id,
Kirkwood has gated clocks for some of its peripherals, so creates
its own clkdev entries. For all the other orion devices, create
clkdev entries to the tclk. */
-void __init orion_clkdev_init(struct clk *tclk)
+void __init orion_clkdev_init(struct clk_core *tclk)
{
orion_clkdev_add(NULL, "orion_spi.0", tclk);
orion_clkdev_add(NULL, "orion_spi.1", tclk);
@@ -78,10 +77,10 @@ static void fill_resources(struct platform_device *device,
/*****************************************************************************
* UART
****************************************************************************/
-static unsigned long __init uart_get_clk_rate(struct clk *clk)
+static unsigned long __init uart_get_clk_rate(struct clk_core *clk)
{
- clk_prepare_enable(clk);
- return clk_get_rate(clk);
+ clk_provider_prepare_enable(clk);
+ return clk_provider_get_rate(clk);
}
static void __init uart_complete(
@@ -91,7 +90,7 @@ static void __init uart_complete(
void __iomem *membase,
resource_size_t mapbase,
unsigned int irq,
- struct clk *clk)
+ struct clk_core *clk)
{
data->mapbase = mapbase;
data->membase = membase;
@@ -125,7 +124,7 @@ static struct platform_device orion_uart0 = {
void __init orion_uart0_init(void __iomem *membase,
resource_size_t mapbase,
unsigned int irq,
- struct clk *clk)
+ struct clk_core *clk)
{
uart_complete(&orion_uart0, orion_uart0_data, orion_uart0_resources,
membase, mapbase, irq, clk);
@@ -153,7 +152,7 @@ static struct platform_device orion_uart1 = {
void __init orion_uart1_init(void __iomem *membase,
resource_size_t mapbase,
unsigned int irq,
- struct clk *clk)
+ struct clk_core *clk)
{
uart_complete(&orion_uart1, orion_uart1_data, orion_uart1_resources,
membase, mapbase, irq, clk);
@@ -181,7 +180,7 @@ static struct platform_device orion_uart2 = {
void __init orion_uart2_init(void __iomem *membase,
resource_size_t mapbase,
unsigned int irq,
- struct clk *clk)
+ struct clk_core *clk)
{
uart_complete(&orion_uart2, orion_uart2_data, orion_uart2_resources,
membase, mapbase, irq, clk);
@@ -209,7 +208,7 @@ static struct platform_device orion_uart3 = {
void __init orion_uart3_init(void __iomem *membase,
resource_size_t mapbase,
unsigned int irq,
- struct clk *clk)
+ struct clk_core *clk)
{
uart_complete(&orion_uart3, orion_uart3_data, orion_uart3_resources,
membase, mapbase, irq, clk);
diff --git a/arch/arm/plat-orion/include/plat/common.h b/arch/arm/plat-orion/include/plat/common.h
index d9a24f6..44f1bbe 100644
--- a/arch/arm/plat-orion/include/plat/common.h
+++ b/arch/arm/plat-orion/include/plat/common.h
@@ -18,22 +18,22 @@ struct mv_sata_platform_data;
void __init orion_uart0_init(void __iomem *membase,
resource_size_t mapbase,
unsigned int irq,
- struct clk *clk);
+ struct clk_core *clk);
void __init orion_uart1_init(void __iomem *membase,
resource_size_t mapbase,
unsigned int irq,
- struct clk *clk);
+ struct clk_core *clk);
void __init orion_uart2_init(void __iomem *membase,
resource_size_t mapbase,
unsigned int irq,
- struct clk *clk);
+ struct clk_core *clk);
void __init orion_uart3_init(void __iomem *membase,
resource_size_t mapbase,
unsigned int irq,
- struct clk *clk);
+ struct clk_core *clk);
void __init orion_rtc_init(unsigned long mapbase,
unsigned long irq);
@@ -107,7 +107,7 @@ void __init orion_crypto_init(unsigned long mapbase,
unsigned long irq);
void __init orion_clkdev_add(const char *con_id, const char *dev_id,
- struct clk *clk);
+ struct clk_core *clk);
-void __init orion_clkdev_init(struct clk *tclk);
+void __init orion_clkdev_init(struct clk_core *tclk);
#endif
diff --git a/arch/mips/alchemy/common/clock.c b/arch/mips/alchemy/common/clock.c
index d7557cd..46e1c3c 100644
--- a/arch/mips/alchemy/common/clock.c
+++ b/arch/mips/alchemy/common/clock.c
@@ -138,7 +138,7 @@ static struct clk_ops alchemy_clkops_cpu = {
.recalc_rate = alchemy_clk_cpu_recalc,
};
-static struct clk __init *alchemy_clk_setup_cpu(const char *parent_name,
+static struct clk_core __init *alchemy_clk_setup_cpu(const char *parent_name,
int ctype)
{
struct clk_init_data id;
@@ -221,12 +221,12 @@ static struct clk_ops alchemy_clkops_aux = {
.round_rate = alchemy_clk_aux_roundr,
};
-static struct clk __init *alchemy_clk_setup_aux(const char *parent_name,
+static struct clk_core __init *alchemy_clk_setup_aux(const char *parent_name,
char *name, int maxmult,
unsigned long reg)
{
struct clk_init_data id;
- struct clk *c;
+ struct clk_core *c;
struct alchemy_auxpll_clk *a;
a = kzalloc(sizeof(*a), GFP_KERNEL);
@@ -254,10 +254,10 @@ static struct clk __init *alchemy_clk_setup_aux(const char *parent_name,
/* sysbus_clk *********************************************************/
-static struct clk __init *alchemy_clk_setup_sysbus(const char *pn)
+static struct clk_core __init *alchemy_clk_setup_sysbus(const char *pn)
{
unsigned long v = (alchemy_rdsys(AU1000_SYS_POWERCTRL) & 3) + 2;
- struct clk *c;
+ struct clk_core *c;
c = clk_register_fixed_factor(NULL, ALCHEMY_SYSBUS_CLK,
pn, 0, 1, v);
@@ -268,10 +268,10 @@ static struct clk __init *alchemy_clk_setup_sysbus(const char *pn)
/* Peripheral Clock ***************************************************/
-static struct clk __init *alchemy_clk_setup_periph(const char *pn)
+static struct clk_core __init *alchemy_clk_setup_periph(const char *pn)
{
/* Peripheral clock runs at half the rate of sysbus clk */
- struct clk *c;
+ struct clk_core *c;
c = clk_register_fixed_factor(NULL, ALCHEMY_PERIPH_CLK,
pn, 0, 1, 2);
@@ -282,11 +282,11 @@ static struct clk __init *alchemy_clk_setup_periph(const char *pn)
/* mem clock **********************************************************/
-static struct clk __init *alchemy_clk_setup_mem(const char *pn, int ct)
+static struct clk_core __init *alchemy_clk_setup_mem(const char *pn, int ct)
{
void __iomem *addr = IOMEM(AU1000_MEM_PHYS_ADDR);
unsigned long v;
- struct clk *c;
+ struct clk_core *c;
int div;
switch (ct) {
@@ -316,14 +316,14 @@ static struct clk __init *alchemy_clk_setup_mem(const char *pn, int ct)
/* lrclk: external synchronous static bus clock ***********************/
-static struct clk __init *alchemy_clk_setup_lrclk(const char *pn)
+static struct clk_core __init *alchemy_clk_setup_lrclk(const char *pn)
{
/* MEM_STCFG0[15:13] = divisor.
* L/RCLK = periph_clk / (divisor + 1)
* On Au1000, Au1500, Au1100 it's called LCLK,
* on later models it's called RCLK, but it's the same thing.
*/
- struct clk *c;
+ struct clk_core *c;
unsigned long v = alchemy_rdsmem(AU1000_MEM_STCFG0) >> 13;
v = (v & 7) + 1;
@@ -375,10 +375,10 @@ static long alchemy_calc_div(unsigned long rate, unsigned long prate,
static long alchemy_clk_fgcs_detr(struct clk_hw *hw, unsigned long rate,
unsigned long *best_parent_rate,
- struct clk **best_parent_clk,
+ struct clk_core **best_parent_clk,
int scale, int maxdiv)
{
- struct clk *pc, *bpc, *free;
+ struct clk_core *pc, *bpc, *free;
long tdv, tpr, pr, nr, br, bpr, diff, lastdiff;
int j;
@@ -405,7 +405,7 @@ static long alchemy_clk_fgcs_detr(struct clk_hw *hw, unsigned long rate,
free = pc;
}
- pr = clk_get_rate(pc);
+ pr = clk_provider_get_rate(pc);
if (pr < rate)
continue;
@@ -435,7 +435,7 @@ static long alchemy_clk_fgcs_detr(struct clk_hw *hw, unsigned long rate,
tpr = rate * j;
if (tpr < 0)
break;
- pr = clk_round_rate(free, tpr);
+ pr = clk_provider_round_rate(free, tpr);
tdv = alchemy_calc_div(rate, pr, scale, maxdiv, NULL);
nr = pr / tdv;
@@ -548,7 +548,7 @@ static unsigned long alchemy_clk_fgv1_recalc(struct clk_hw *hw,
static long alchemy_clk_fgv1_detr(struct clk_hw *hw, unsigned long rate,
unsigned long *best_parent_rate,
- struct clk **best_parent_clk)
+ struct clk_core **best_parent_clk)
{
return alchemy_clk_fgcs_detr(hw, rate, best_parent_rate,
best_parent_clk, 2, 512);
@@ -680,7 +680,7 @@ static unsigned long alchemy_clk_fgv2_recalc(struct clk_hw *hw,
static long alchemy_clk_fgv2_detr(struct clk_hw *hw, unsigned long rate,
unsigned long *best_parent_rate,
- struct clk **best_parent_clk)
+ struct clk_core **best_parent_clk)
{
struct alchemy_fgcs_clk *c = to_fgcs_clk(hw);
int scale, maxdiv;
@@ -723,7 +723,7 @@ static const char * const alchemy_clk_fgen_names[] = {
static int __init alchemy_clk_init_fgens(int ctype)
{
- struct clk *c;
+ struct clk_core *c;
struct clk_init_data id;
struct alchemy_fgcs_clk *a;
unsigned long v;
@@ -899,7 +899,7 @@ static int alchemy_clk_csrc_setr(struct clk_hw *hw, unsigned long rate,
static long alchemy_clk_csrc_detr(struct clk_hw *hw, unsigned long rate,
unsigned long *best_parent_rate,
- struct clk **best_parent_clk)
+ struct clk_core **best_parent_clk)
{
struct alchemy_fgcs_clk *c = to_fgcs_clk(hw);
int scale = c->dt[2] == 3 ? 1 : 2; /* au1300 check */
@@ -936,7 +936,7 @@ static int __init alchemy_clk_setup_imux(int ctype)
struct clk_init_data id;
unsigned long v;
int i, ret, *dt;
- struct clk *c;
+ struct clk_core *c;
id.ops = &alchemy_clkops_csrc;
id.parent_names = (const char **)alchemy_clk_csrc_parents;
@@ -1023,7 +1023,7 @@ static int __init alchemy_clk_init(void)
{
int ctype = alchemy_get_cputype(), ret, i;
struct clk_aliastable *t = alchemy_clk_aliases;
- struct clk *c;
+ struct clk_core *c;
/* Root of the Alchemy clock tree: external 12MHz crystal osc */
c = clk_register_fixed_rate(NULL, ALCHEMY_ROOT_CLK, NULL,
diff --git a/arch/powerpc/platforms/512x/clock-commonclk.c b/arch/powerpc/platforms/512x/clock-commonclk.c
index 6eb614a..81afe83 100644
--- a/arch/powerpc/platforms/512x/clock-commonclk.c
+++ b/arch/powerpc/platforms/512x/clock-commonclk.c
@@ -70,7 +70,7 @@ enum {
};
/* data required for the OF clock provider registration */
-static struct clk *clks[MPC512x_CLK_LAST_PRIVATE];
+static struct clk_core *clks[MPC512x_CLK_LAST_PRIVATE];
static struct clk_onecell_data clk_data;
/* CCM register access */
@@ -218,12 +218,12 @@ static bool soc_has_mclk_mux0_canin(void)
/* common clk API wrappers {{{ */
/* convenience wrappers around the common clk API */
-static inline struct clk *mpc512x_clk_fixed(const char *name, int rate)
+static inline struct clk_core *mpc512x_clk_fixed(const char *name, int rate)
{
return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate);
}
-static inline struct clk *mpc512x_clk_factor(
+static inline struct clk_core *mpc512x_clk_factor(
const char *name, const char *parent_name,
int mul, int div)
{
@@ -234,7 +234,7 @@ static inline struct clk *mpc512x_clk_factor(
mul, div);
}
-static inline struct clk *mpc512x_clk_divider(
+static inline struct clk_core *mpc512x_clk_divider(
const char *name, const char *parent_name, u8 clkflags,
u32 __iomem *reg, u8 pos, u8 len, int divflags)
{
@@ -242,7 +242,7 @@ static inline struct clk *mpc512x_clk_divider(
reg, pos, len, divflags, &clklock);
}
-static inline struct clk *mpc512x_clk_divtable(
+static inline struct clk_core *mpc512x_clk_divtable(
const char *name, const char *parent_name,
u32 __iomem *reg, u8 pos, u8 len,
const struct clk_div_table *divtab)
@@ -255,7 +255,7 @@ static inline struct clk *mpc512x_clk_divtable(
divtab, &clklock);
}
-static inline struct clk *mpc512x_clk_gated(
+static inline struct clk_core *mpc512x_clk_gated(
const char *name, const char *parent_name,
u32 __iomem *reg, u8 pos)
{
@@ -266,7 +266,7 @@ static inline struct clk *mpc512x_clk_gated(
reg, pos, 0, &clklock);
}
-static inline struct clk *mpc512x_clk_muxed(const char *name,
+static inline struct clk_core *mpc512x_clk_muxed(const char *name,
const char **parent_names, int parent_count,
u32 __iomem *reg, u8 pos, u8 len)
{
@@ -422,7 +422,7 @@ static void mpc512x_clk_setup_ref_clock(struct device_node *np, int bus_freq,
int *sys_mul, int *sys_div,
int *ips_div)
{
- struct clk *osc_clk;
+ struct clk_core *osc_clk;
int calc_freq;
/* fetch mul/div factors from the hardware */
@@ -432,7 +432,7 @@ static void mpc512x_clk_setup_ref_clock(struct device_node *np, int bus_freq,
*ips_div = get_bit_field(&clkregs->scfr1, 23, 3);
/* lookup the oscillator clock for its rate */
- osc_clk = of_clk_get_by_name(np, "osc");
+ osc_clk = of_clk_provider_get_by_name(np, "osc");
/*
* either descend from OSC to REF (and in bypassing verify the
@@ -444,7 +444,7 @@ static void mpc512x_clk_setup_ref_clock(struct device_node *np, int bus_freq,
*/
if (!IS_ERR(osc_clk)) {
clks[MPC512x_CLK_REF] = mpc512x_clk_factor("ref", "osc", 1, 1);
- calc_freq = clk_get_rate(clks[MPC512x_CLK_REF]);
+ calc_freq = clk_provider_get_rate(clks[MPC512x_CLK_REF]);
calc_freq *= *sys_mul;
calc_freq /= *sys_div;
calc_freq /= 2;
@@ -647,8 +647,8 @@ static void mpc512x_clk_setup_mclk(struct mclk_setup_data *entry, size_t idx)
* - MCLK 0 enabled
* - MCLK 1 from MCLK DIV
*/
- div = clk_get_rate(clks[MPC512x_CLK_SYS]);
- div /= clk_get_rate(clks[MPC512x_CLK_IPS]);
+ div = clk_provider_get_rate(clks[MPC512x_CLK_SYS]);
+ div /= clk_provider_get_rate(clks[MPC512x_CLK_IPS]);
out_be32(mccr_reg, (0 << 16));
out_be32(mccr_reg, (0 << 16) | ((div - 1) << 17));
out_be32(mccr_reg, (1 << 16) | ((div - 1) << 17));
@@ -925,12 +925,12 @@ static void mpc512x_clk_setup_clock_tree(struct device_node *np, int busfreq)
* claimed by any peripheral driver, to not have the clock
* subsystem disable them late at startup
*/
- clk_prepare_enable(clks[MPC512x_CLK_DUMMY]);
- clk_prepare_enable(clks[MPC512x_CLK_E300]); /* PowerPC CPU */
- clk_prepare_enable(clks[MPC512x_CLK_DDR]); /* DRAM */
- clk_prepare_enable(clks[MPC512x_CLK_MEM]); /* SRAM */
- clk_prepare_enable(clks[MPC512x_CLK_IPS]); /* SoC periph */
- clk_prepare_enable(clks[MPC512x_CLK_LPC]); /* boot media */
+ clk_provider_prepare_enable(clks[MPC512x_CLK_DUMMY]);
+ clk_provider_prepare_enable(clks[MPC512x_CLK_E300]); /* PowerPC CPU */
+ clk_provider_prepare_enable(clks[MPC512x_CLK_DDR]); /* DRAM */
+ clk_provider_prepare_enable(clks[MPC512x_CLK_MEM]); /* SRAM */
+ clk_provider_prepare_enable(clks[MPC512x_CLK_IPS]); /* SoC periph */
+ clk_provider_prepare_enable(clks[MPC512x_CLK_LPC]); /* boot media */
}
/*
@@ -969,9 +969,9 @@ static void mpc5121_clk_provide_migration_support(void)
* has attached to bridges, otherwise the PCI clock remains
* unused and so it gets disabled
*/
- clk_prepare_enable(clks[MPC512x_CLK_PSC3_MCLK]);/* serial console */
+ clk_provider_prepare_enable(clks[MPC512x_CLK_PSC3_MCLK]);/* serial console */
if (of_find_compatible_node(NULL, "pci", "fsl,mpc5121-pci"))
- clk_prepare_enable(clks[MPC512x_CLK_PCI]);
+ clk_provider_prepare_enable(clks[MPC512x_CLK_PCI]);
}
/*
@@ -988,8 +988,8 @@ static void mpc5121_clk_provide_migration_support(void)
} while (0)
#define NODE_CHK(clkname, clkitem, regnode, regflag) do { \
- struct clk *clk; \
- clk = of_clk_get_by_name(np, clkname); \
+ struct clk_core *clk; \
+ clk = of_clk_provider_get_by_name(np, clkname); \
if (IS_ERR(clk)) { \
clk = clkitem; \
clk_register_clkdev(clk, clkname, devname); \
@@ -999,7 +999,7 @@ static void mpc5121_clk_provide_migration_support(void)
pr_debug("clock alias name '%s' for dev '%s' pointer %p\n", \
clkname, devname, clk); \
} else { \
- clk_put(clk); \
+ __clk_put(clk); \
} \
} while (0)
@@ -1090,7 +1090,7 @@ static void mpc5121_clk_provide_backwards_compat(void)
* workaround obsolete
*/
if (did_register & DID_REG_I2C)
- clk_prepare_enable(clks[MPC512x_CLK_I2C]);
+ clk_provider_prepare_enable(clks[MPC512x_CLK_I2C]);
FOR_NODES("fsl,mpc5121-diu") {
NODE_PREP;
diff --git a/drivers/acpi/acpi_lpss.c b/drivers/acpi/acpi_lpss.c
index 9dfec48..c1dda54 100644
--- a/drivers/acpi/acpi_lpss.c
+++ b/drivers/acpi/acpi_lpss.c
@@ -11,7 +11,6 @@
*/
#include <linux/acpi.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/err.h>
@@ -57,7 +56,7 @@ ACPI_MODULE_NAME("acpi_lpss");
struct lpss_shared_clock {
const char *name;
unsigned long rate;
- struct clk *clk;
+ struct clk_core *clk;
};
struct lpss_private_data;
@@ -83,7 +82,7 @@ static struct lpss_device_desc lpss_dma_desc = {
struct lpss_private_data {
void __iomem *mmio_base;
resource_size_t mmio_size;
- struct clk *clk;
+ struct clk_core *clk;
const struct lpss_device_desc *dev_desc;
u32 prv_reg_ctx[LPSS_PRV_REG_COUNT];
};
@@ -278,7 +277,7 @@ static int register_device_clock(struct acpi_device *adev,
const struct lpss_device_desc *dev_desc = pdata->dev_desc;
struct lpss_shared_clock *shared_clock = dev_desc->shared_clock;
const char *devname = dev_name(&adev->dev);
- struct clk *clk = ERR_PTR(-ENODEV);
+ struct clk_core *clk = ERR_PTR(-ENODEV);
struct lpss_clk_data *clk_data;
const char *parent, *clk_name;
void __iomem *prv_base;
diff --git a/drivers/clk/at91/clk-main.c b/drivers/clk/at91/clk-main.c
index 59fa3cc..11bcdb1 100644
--- a/drivers/clk/at91/clk-main.c
+++ b/drivers/clk/at91/clk-main.c
@@ -138,7 +138,7 @@ static const struct clk_ops main_osc_ops = {
.is_prepared = clk_main_osc_is_prepared,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_main_osc(struct at91_pmc *pmc,
unsigned int irq,
const char *name,
@@ -147,7 +147,7 @@ at91_clk_register_main_osc(struct at91_pmc *pmc,
{
int ret;
struct clk_main_osc *osc;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
if (!pmc || !irq || !name || !parent_name)
@@ -192,7 +192,7 @@ at91_clk_register_main_osc(struct at91_pmc *pmc,
void __init of_at91rm9200_clk_main_osc_setup(struct device_node *np,
struct at91_pmc *pmc)
{
- struct clk *clk;
+ struct clk_core *clk;
unsigned int irq;
const char *name = np->name;
const char *parent_name;
@@ -291,7 +291,7 @@ static const struct clk_ops main_rc_osc_ops = {
.recalc_accuracy = clk_main_rc_osc_recalc_accuracy,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_main_rc_osc(struct at91_pmc *pmc,
unsigned int irq,
const char *name,
@@ -299,7 +299,7 @@ at91_clk_register_main_rc_osc(struct at91_pmc *pmc,
{
int ret;
struct clk_main_rc_osc *osc;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
if (!pmc || !irq || !name || !frequency)
@@ -340,7 +340,7 @@ at91_clk_register_main_rc_osc(struct at91_pmc *pmc,
void __init of_at91sam9x5_clk_main_rc_osc_setup(struct device_node *np,
struct at91_pmc *pmc)
{
- struct clk *clk;
+ struct clk_core *clk;
unsigned int irq;
u32 frequency = 0;
u32 accuracy = 0;
@@ -424,13 +424,13 @@ static const struct clk_ops rm9200_main_ops = {
.recalc_rate = clk_rm9200_main_recalc_rate,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_rm9200_main(struct at91_pmc *pmc,
const char *name,
const char *parent_name)
{
struct clk_rm9200_main *clkmain;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
if (!pmc || !name)
@@ -462,7 +462,7 @@ at91_clk_register_rm9200_main(struct at91_pmc *pmc,
void __init of_at91rm9200_clk_main_setup(struct device_node *np,
struct at91_pmc *pmc)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name;
const char *name = np->name;
@@ -555,7 +555,7 @@ static const struct clk_ops sam9x5_main_ops = {
.get_parent = clk_sam9x5_main_get_parent,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_sam9x5_main(struct at91_pmc *pmc,
unsigned int irq,
const char *name,
@@ -564,7 +564,7 @@ at91_clk_register_sam9x5_main(struct at91_pmc *pmc,
{
int ret;
struct clk_sam9x5_main *clkmain;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
if (!pmc || !irq || !name)
@@ -607,7 +607,7 @@ at91_clk_register_sam9x5_main(struct at91_pmc *pmc,
void __init of_at91sam9x5_clk_main_setup(struct device_node *np,
struct at91_pmc *pmc)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_names[2];
int num_parents;
unsigned int irq;
diff --git a/drivers/clk/at91/clk-master.c b/drivers/clk/at91/clk-master.c
index c1af80b..95ae1b6 100644
--- a/drivers/clk/at91/clk-master.c
+++ b/drivers/clk/at91/clk-master.c
@@ -131,7 +131,7 @@ static const struct clk_ops master_ops = {
.get_parent = clk_master_get_parent,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_master(struct at91_pmc *pmc, unsigned int irq,
const char *name, int num_parents,
const char **parent_names,
@@ -140,7 +140,7 @@ at91_clk_register_master(struct at91_pmc *pmc, unsigned int irq,
{
int ret;
struct clk_master *master;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
if (!pmc || !irq || !name || !num_parents || !parent_names)
@@ -216,7 +216,7 @@ static void __init
of_at91_clk_master_setup(struct device_node *np, struct at91_pmc *pmc,
const struct clk_master_layout *layout)
{
- struct clk *clk;
+ struct clk_core *clk;
int num_parents;
int i;
unsigned int irq;
diff --git a/drivers/clk/at91/clk-peripheral.c b/drivers/clk/at91/clk-peripheral.c
index 597fed4..cdf8e8a 100644
--- a/drivers/clk/at91/clk-peripheral.c
+++ b/drivers/clk/at91/clk-peripheral.c
@@ -100,12 +100,12 @@ static const struct clk_ops peripheral_ops = {
.is_enabled = clk_peripheral_is_enabled,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_peripheral(struct at91_pmc *pmc, const char *name,
const char *parent_name, u32 id)
{
struct clk_peripheral *periph;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
if (!pmc || !name || !parent_name || id > PERIPHERAL_ID_MAX)
@@ -134,7 +134,7 @@ at91_clk_register_peripheral(struct at91_pmc *pmc, const char *name,
static void clk_sam9x5_peripheral_autodiv(struct clk_sam9x5_peripheral *periph)
{
- struct clk *parent;
+ struct clk_core *parent;
unsigned long parent_rate;
int shift = 0;
@@ -309,13 +309,13 @@ static const struct clk_ops sam9x5_peripheral_ops = {
.set_rate = clk_sam9x5_peripheral_set_rate,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_sam9x5_peripheral(struct at91_pmc *pmc, const char *name,
const char *parent_name, u32 id,
const struct clk_range *range)
{
struct clk_sam9x5_peripheral *periph;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
if (!pmc || !name || !parent_name)
@@ -352,7 +352,7 @@ of_at91_clk_periph_setup(struct device_node *np, struct at91_pmc *pmc, u8 type)
{
int num;
u32 id;
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name;
const char *name;
struct device_node *periphclknp;
diff --git a/drivers/clk/at91/clk-pll.c b/drivers/clk/at91/clk-pll.c
index cf6ed02..0d22f65f 100644
--- a/drivers/clk/at91/clk-pll.c
+++ b/drivers/clk/at91/clk-pll.c
@@ -297,14 +297,14 @@ static const struct clk_ops pll_ops = {
.set_rate = clk_pll_set_rate,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_pll(struct at91_pmc *pmc, unsigned int irq, const char *name,
const char *parent_name, u8 id,
const struct clk_pll_layout *layout,
const struct clk_pll_characteristics *characteristics)
{
struct clk_pll *pll;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
int ret;
int offset = PLL_REG(id);
@@ -474,7 +474,7 @@ of_at91_clk_pll_setup(struct device_node *np, struct at91_pmc *pmc,
{
u32 id;
unsigned int irq;
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name;
const char *name = np->name;
struct clk_pll_characteristics *characteristics;
diff --git a/drivers/clk/at91/clk-plldiv.c b/drivers/clk/at91/clk-plldiv.c
index ea22656..f8204d8 100644
--- a/drivers/clk/at91/clk-plldiv.c
+++ b/drivers/clk/at91/clk-plldiv.c
@@ -79,12 +79,12 @@ static const struct clk_ops plldiv_ops = {
.set_rate = clk_plldiv_set_rate,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_plldiv(struct at91_pmc *pmc, const char *name,
const char *parent_name)
{
struct clk_plldiv *plldiv;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
plldiv = kzalloc(sizeof(*plldiv), GFP_KERNEL);
@@ -111,7 +111,7 @@ at91_clk_register_plldiv(struct at91_pmc *pmc, const char *name,
static void __init
of_at91_clk_plldiv_setup(struct device_node *np, struct at91_pmc *pmc)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name;
const char *name = np->name;
diff --git a/drivers/clk/at91/clk-programmable.c b/drivers/clk/at91/clk-programmable.c
index 62e2509..b72e98c 100644
--- a/drivers/clk/at91/clk-programmable.c
+++ b/drivers/clk/at91/clk-programmable.c
@@ -57,9 +57,9 @@ static unsigned long clk_programmable_recalc_rate(struct clk_hw *hw,
static long clk_programmable_determine_rate(struct clk_hw *hw,
unsigned long rate,
unsigned long *best_parent_rate,
- struct clk **best_parent_clk)
+ struct clk_core **best_parent_clk)
{
- struct clk *parent = NULL;
+ struct clk_core *parent = NULL;
long best_rate = -EINVAL;
unsigned long parent_rate;
unsigned long tmp_rate;
@@ -169,14 +169,14 @@ static const struct clk_ops programmable_ops = {
.set_rate = clk_programmable_set_rate,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_programmable(struct at91_pmc *pmc,
const char *name, const char **parent_names,
u8 num_parents, u8 id,
const struct clk_programmable_layout *layout)
{
struct clk_programmable *prog;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
if (id > PROG_ID_MAX)
@@ -229,7 +229,7 @@ of_at91_clk_prog_setup(struct device_node *np, struct at91_pmc *pmc,
int num;
u32 id;
int i;
- struct clk *clk;
+ struct clk_core *clk;
int num_parents;
const char *parent_names[PROG_SOURCE_MAX];
const char *name;
diff --git a/drivers/clk/at91/clk-slow.c b/drivers/clk/at91/clk-slow.c
index 0300c46..d50fe02 100644
--- a/drivers/clk/at91/clk-slow.c
+++ b/drivers/clk/at91/clk-slow.c
@@ -117,7 +117,7 @@ static const struct clk_ops slow_osc_ops = {
.is_prepared = clk_slow_osc_is_prepared,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_slow_osc(void __iomem *sckcr,
const char *name,
const char *parent_name,
@@ -125,7 +125,7 @@ at91_clk_register_slow_osc(void __iomem *sckcr,
bool bypass)
{
struct clk_slow_osc *osc;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
if (!sckcr || !name || !parent_name)
@@ -159,7 +159,7 @@ at91_clk_register_slow_osc(void __iomem *sckcr,
void __init of_at91sam9x5_clk_slow_osc_setup(struct device_node *np,
void __iomem *sckcr)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name;
const char *name = np->name;
u32 startup;
@@ -229,7 +229,7 @@ static const struct clk_ops slow_rc_osc_ops = {
.recalc_accuracy = clk_slow_rc_osc_recalc_accuracy,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_slow_rc_osc(void __iomem *sckcr,
const char *name,
unsigned long frequency,
@@ -237,7 +237,7 @@ at91_clk_register_slow_rc_osc(void __iomem *sckcr,
unsigned long startup)
{
struct clk_slow_rc_osc *osc;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
if (!sckcr || !name)
@@ -269,7 +269,7 @@ at91_clk_register_slow_rc_osc(void __iomem *sckcr,
void __init of_at91sam9x5_clk_slow_rc_osc_setup(struct device_node *np,
void __iomem *sckcr)
{
- struct clk *clk;
+ struct clk_core *clk;
u32 frequency = 0;
u32 accuracy = 0;
u32 startup = 0;
@@ -327,14 +327,14 @@ static const struct clk_ops sam9x5_slow_ops = {
.get_parent = clk_sam9x5_slow_get_parent,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_sam9x5_slow(void __iomem *sckcr,
const char *name,
const char **parent_names,
int num_parents)
{
struct clk_sam9x5_slow *slowck;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
if (!sckcr || !name || !parent_names || !num_parents)
@@ -364,7 +364,7 @@ at91_clk_register_sam9x5_slow(void __iomem *sckcr,
void __init of_at91sam9x5_clk_slow_setup(struct device_node *np,
void __iomem *sckcr)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_names[2];
int num_parents;
const char *name = np->name;
@@ -401,14 +401,14 @@ static const struct clk_ops sam9260_slow_ops = {
.get_parent = clk_sam9260_slow_get_parent,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_sam9260_slow(struct at91_pmc *pmc,
const char *name,
const char **parent_names,
int num_parents)
{
struct clk_sam9260_slow *slowck;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
if (!pmc || !name)
@@ -440,7 +440,7 @@ at91_clk_register_sam9260_slow(struct at91_pmc *pmc,
void __init of_at91sam9260_clk_slow_setup(struct device_node *np,
struct at91_pmc *pmc)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_names[2];
int num_parents;
const char *name = np->name;
diff --git a/drivers/clk/at91/clk-smd.c b/drivers/clk/at91/clk-smd.c
index 144d47e..8820b84 100644
--- a/drivers/clk/at91/clk-smd.c
+++ b/drivers/clk/at91/clk-smd.c
@@ -113,12 +113,12 @@ static const struct clk_ops at91sam9x5_smd_ops = {
.set_rate = at91sam9x5_clk_smd_set_rate,
};
-static struct clk * __init
+static struct clk_core * __init
at91sam9x5_clk_register_smd(struct at91_pmc *pmc, const char *name,
const char **parent_names, u8 num_parents)
{
struct at91sam9x5_clk_smd *smd;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
smd = kzalloc(sizeof(*smd), GFP_KERNEL);
@@ -144,7 +144,7 @@ at91sam9x5_clk_register_smd(struct at91_pmc *pmc, const char *name,
void __init of_at91sam9x5_clk_smd_setup(struct device_node *np,
struct at91_pmc *pmc)
{
- struct clk *clk;
+ struct clk_core *clk;
int i;
int num_parents;
const char *parent_names[SMD_SOURCE_MAX];
diff --git a/drivers/clk/at91/clk-system.c b/drivers/clk/at91/clk-system.c
index 8c96307..770d9bf 100644
--- a/drivers/clk/at91/clk-system.c
+++ b/drivers/clk/at91/clk-system.c
@@ -99,12 +99,12 @@ static const struct clk_ops system_ops = {
.is_prepared = clk_system_is_prepared,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_system(struct at91_pmc *pmc, const char *name,
const char *parent_name, u8 id, int irq)
{
struct clk_system *sys;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
int ret;
@@ -153,7 +153,7 @@ of_at91_clk_sys_setup(struct device_node *np, struct at91_pmc *pmc)
int num;
int irq = 0;
u32 id;
- struct clk *clk;
+ struct clk_core *clk;
const char *name;
struct device_node *sysclknp;
const char *parent_name;
diff --git a/drivers/clk/at91/clk-usb.c b/drivers/clk/at91/clk-usb.c
index 7d1d26a..246989c 100644
--- a/drivers/clk/at91/clk-usb.c
+++ b/drivers/clk/at91/clk-usb.c
@@ -162,12 +162,12 @@ static const struct clk_ops at91sam9n12_usb_ops = {
.set_rate = at91sam9x5_clk_usb_set_rate,
};
-static struct clk * __init
+static struct clk_core * __init
at91sam9x5_clk_register_usb(struct at91_pmc *pmc, const char *name,
const char **parent_names, u8 num_parents)
{
struct at91sam9x5_clk_usb *usb;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
usb = kzalloc(sizeof(*usb), GFP_KERNEL);
@@ -190,12 +190,12 @@ at91sam9x5_clk_register_usb(struct at91_pmc *pmc, const char *name,
return clk;
}
-static struct clk * __init
+static struct clk_core * __init
at91sam9n12_clk_register_usb(struct at91_pmc *pmc, const char *name,
const char *parent_name)
{
struct at91sam9x5_clk_usb *usb;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
usb = kzalloc(sizeof(*usb), GFP_KERNEL);
@@ -295,12 +295,12 @@ static const struct clk_ops at91rm9200_usb_ops = {
.set_rate = at91rm9200_clk_usb_set_rate,
};
-static struct clk * __init
+static struct clk_core * __init
at91rm9200_clk_register_usb(struct at91_pmc *pmc, const char *name,
const char *parent_name, const u32 *divisors)
{
struct at91rm9200_clk_usb *usb;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
usb = kzalloc(sizeof(*usb), GFP_KERNEL);
@@ -327,7 +327,7 @@ at91rm9200_clk_register_usb(struct at91_pmc *pmc, const char *name,
void __init of_at91sam9x5_clk_usb_setup(struct device_node *np,
struct at91_pmc *pmc)
{
- struct clk *clk;
+ struct clk_core *clk;
int i;
int num_parents;
const char *parent_names[USB_SOURCE_MAX];
@@ -355,7 +355,7 @@ void __init of_at91sam9x5_clk_usb_setup(struct device_node *np,
void __init of_at91sam9n12_clk_usb_setup(struct device_node *np,
struct at91_pmc *pmc)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name;
const char *name = np->name;
@@ -375,7 +375,7 @@ void __init of_at91sam9n12_clk_usb_setup(struct device_node *np,
void __init of_at91rm9200_clk_usb_setup(struct device_node *np,
struct at91_pmc *pmc)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name;
const char *name = np->name;
u32 divisors[4] = {0, 0, 0, 0};
diff --git a/drivers/clk/at91/clk-utmi.c b/drivers/clk/at91/clk-utmi.c
index ae3263b..0502050 100644
--- a/drivers/clk/at91/clk-utmi.c
+++ b/drivers/clk/at91/clk-utmi.c
@@ -92,13 +92,13 @@ static const struct clk_ops utmi_ops = {
.recalc_rate = clk_utmi_recalc_rate,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_utmi(struct at91_pmc *pmc, unsigned int irq,
const char *name, const char *parent_name)
{
int ret;
struct clk_utmi *utmi;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
utmi = kzalloc(sizeof(*utmi), GFP_KERNEL);
@@ -132,7 +132,7 @@ static void __init
of_at91_clk_utmi_setup(struct device_node *np, struct at91_pmc *pmc)
{
unsigned int irq;
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name;
const char *name = np->name;
diff --git a/drivers/clk/bcm/clk-kona-setup.c b/drivers/clk/bcm/clk-kona-setup.c
index e5aeded..122e7b0 100644
--- a/drivers/clk/bcm/clk-kona-setup.c
+++ b/drivers/clk/bcm/clk-kona-setup.c
@@ -697,7 +697,7 @@ static void bcm_clk_teardown(struct kona_clk *bcm_clk)
bcm_clk->type = bcm_clk_none;
}
-static void kona_clk_teardown(struct clk *clk)
+static void kona_clk_teardown(struct clk_core *clk)
{
struct clk_hw *hw;
struct kona_clk *bcm_clk;
@@ -716,10 +716,10 @@ static void kona_clk_teardown(struct clk *clk)
bcm_clk_teardown(bcm_clk);
}
-struct clk *kona_clk_setup(struct kona_clk *bcm_clk)
+struct clk_core *kona_clk_setup(struct kona_clk *bcm_clk)
{
struct clk_init_data *init_data = &bcm_clk->init_data;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
switch (bcm_clk->type) {
case bcm_clk_peri:
diff --git a/drivers/clk/bcm/clk-kona.c b/drivers/clk/bcm/clk-kona.c
index 95af2e6..a301aa9 100644
--- a/drivers/clk/bcm/clk-kona.c
+++ b/drivers/clk/bcm/clk-kona.c
@@ -1032,11 +1032,11 @@ static long kona_peri_clk_round_rate(struct clk_hw *hw, unsigned long rate,
}
static long kona_peri_clk_determine_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long *best_parent_rate, struct clk **best_parent)
+ unsigned long *best_parent_rate, struct clk_core **best_parent)
{
struct kona_clk *bcm_clk = to_kona_clk(hw);
- struct clk *clk = hw->clk;
- struct clk *current_parent;
+ struct clk_core *clk = hw->clk;
+ struct clk_core *current_parent;
unsigned long parent_rate;
unsigned long best_delta;
unsigned long best_rate;
@@ -1053,14 +1053,14 @@ static long kona_peri_clk_determine_rate(struct clk_hw *hw, unsigned long rate,
return kona_peri_clk_round_rate(hw, rate, best_parent_rate);
/* Unless we can do better, stick with current parent */
- current_parent = clk_get_parent(clk);
+ current_parent = clk_provider_get_parent(clk);
parent_rate = __clk_get_rate(current_parent);
best_rate = kona_peri_clk_round_rate(hw, rate, &parent_rate);
best_delta = abs(best_rate - rate);
/* Check whether any other parent clock can produce a better result */
for (which = 0; which < parent_count; which++) {
- struct clk *parent = clk_get_parent_by_index(clk, which);
+ struct clk_core *parent = clk_get_parent_by_index(clk, which);
unsigned long delta;
unsigned long other_rate;
@@ -1260,7 +1260,7 @@ bool __init kona_ccu_init(struct ccu_data *ccu)
{
unsigned long flags;
unsigned int which;
- struct clk **clks = ccu->clk_data.clks;
+ struct clk_core **clks = ccu->clk_data.clks;
bool success = true;
flags = ccu_lock(ccu);
diff --git a/drivers/clk/bcm/clk-kona.h b/drivers/clk/bcm/clk-kona.h
index 2537b30..c2d0152 100644
--- a/drivers/clk/bcm/clk-kona.h
+++ b/drivers/clk/bcm/clk-kona.h
@@ -508,7 +508,7 @@ extern u64 scaled_div_max(struct bcm_clk_div *div);
extern u64 scaled_div_build(struct bcm_clk_div *div, u32 div_value,
u32 billionths);
-extern struct clk *kona_clk_setup(struct kona_clk *bcm_clk);
+extern struct clk_core *kona_clk_setup(struct kona_clk *bcm_clk);
extern void __init kona_dt_ccu_setup(struct ccu_data *ccu,
struct device_node *node);
extern bool __init kona_ccu_init(struct ccu_data *ccu);
diff --git a/drivers/clk/berlin/berlin2-avpll.c b/drivers/clk/berlin/berlin2-avpll.c
index fd0f26c..488d986 100644
--- a/drivers/clk/berlin/berlin2-avpll.c
+++ b/drivers/clk/berlin/berlin2-avpll.c
@@ -188,7 +188,7 @@ static const struct clk_ops berlin2_avpll_vco_ops = {
.recalc_rate = berlin2_avpll_vco_recalc_rate,
};
-struct clk * __init berlin2_avpll_vco_register(void __iomem *base,
+struct clk_core * __init berlin2_avpll_vco_register(void __iomem *base,
const char *name, const char *parent_name,
u8 vco_flags, unsigned long flags)
{
@@ -364,7 +364,7 @@ static const struct clk_ops berlin2_avpll_channel_ops = {
*/
static const u8 quirk_index[] __initconst = { 0, 6, 5, 4, 3, 2, 1, 7 };
-struct clk * __init berlin2_avpll_channel_register(void __iomem *base,
+struct clk_core * __init berlin2_avpll_channel_register(void __iomem *base,
const char *name, u8 index, const char *parent_name,
u8 ch_flags, unsigned long flags)
{
diff --git a/drivers/clk/berlin/berlin2-avpll.h b/drivers/clk/berlin/berlin2-avpll.h
index a37f506..216eee7 100644
--- a/drivers/clk/berlin/berlin2-avpll.h
+++ b/drivers/clk/berlin/berlin2-avpll.h
@@ -24,11 +24,11 @@ struct clk;
#define BERLIN2_AVPLL_BIT_QUIRK BIT(0)
#define BERLIN2_AVPLL_SCRAMBLE_QUIRK BIT(1)
-struct clk * __init
+struct clk_core * __init
berlin2_avpll_vco_register(void __iomem *base, const char *name,
const char *parent_name, u8 vco_flags, unsigned long flags);
-struct clk * __init
+struct clk_core * __init
berlin2_avpll_channel_register(void __iomem *base, const char *name,
u8 index, const char *parent_name, u8 ch_flags,
unsigned long flags);
diff --git a/drivers/clk/berlin/berlin2-div.c b/drivers/clk/berlin/berlin2-div.c
index 81ff97f..c673082 100644
--- a/drivers/clk/berlin/berlin2-div.c
+++ b/drivers/clk/berlin/berlin2-div.c
@@ -234,7 +234,7 @@ static const struct clk_ops berlin2_div_mux_ops = {
.get_parent = berlin2_div_get_parent,
};
-struct clk * __init
+struct clk_core * __init
berlin2_div_register(const struct berlin2_div_map *map,
void __iomem *base, const char *name, u8 div_flags,
const char **parent_names, int num_parents,
diff --git a/drivers/clk/berlin/berlin2-div.h b/drivers/clk/berlin/berlin2-div.h
index 15e3384..3ddb87a 100644
--- a/drivers/clk/berlin/berlin2-div.h
+++ b/drivers/clk/berlin/berlin2-div.h
@@ -80,7 +80,7 @@ struct berlin2_div_data {
u8 div_flags;
};
-struct clk * __init
+struct clk_core * __init
berlin2_div_register(const struct berlin2_div_map *map,
void __iomem *base, const char *name, u8 div_flags,
const char **parent_names, int num_parents,
diff --git a/drivers/clk/berlin/berlin2-pll.c b/drivers/clk/berlin/berlin2-pll.c
index bdc506b..b7a3016 100644
--- a/drivers/clk/berlin/berlin2-pll.c
+++ b/drivers/clk/berlin/berlin2-pll.c
@@ -91,7 +91,7 @@ static const struct clk_ops berlin2_pll_ops = {
.recalc_rate = berlin2_pll_recalc_rate,
};
-struct clk * __init
+struct clk_core * __init
berlin2_pll_register(const struct berlin2_pll_map *map,
void __iomem *base, const char *name,
const char *parent_name, unsigned long flags)
diff --git a/drivers/clk/berlin/berlin2-pll.h b/drivers/clk/berlin/berlin2-pll.h
index 8831ce2..6b6a6ed 100644
--- a/drivers/clk/berlin/berlin2-pll.h
+++ b/drivers/clk/berlin/berlin2-pll.h
@@ -29,7 +29,7 @@ struct berlin2_pll_map {
u8 divsel_shift;
};
-struct clk * __init
+struct clk_core * __init
berlin2_pll_register(const struct berlin2_pll_map *map,
void __iomem *base, const char *name,
const char *parent_name, unsigned long flags);
diff --git a/drivers/clk/berlin/bg2.c b/drivers/clk/berlin/bg2.c
index 4c81e09..49ecb3e 100644
--- a/drivers/clk/berlin/bg2.c
+++ b/drivers/clk/berlin/bg2.c
@@ -17,7 +17,6 @@
* this program. If not, see <http://www.gnu.org/licenses/>.
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/kernel.h>
@@ -93,7 +92,7 @@
*/
#define MAX_CLKS 41
-static struct clk *clks[MAX_CLKS];
+static struct clk_core *clks[MAX_CLKS];
static struct clk_onecell_data clk_data;
static DEFINE_SPINLOCK(lock);
static void __iomem *gbase;
@@ -504,7 +503,7 @@ static const struct berlin2_gate_data bg2_gates[] __initconst = {
static void __init berlin2_clock_setup(struct device_node *np)
{
const char *parent_names[9];
- struct clk *clk;
+ struct clk_core *clk;
u8 avpll_flags = 0;
int n;
@@ -513,16 +512,16 @@ static void __init berlin2_clock_setup(struct device_node *np)
return;
/* overwrite default clock names with DT provided ones */
- clk = of_clk_get_by_name(np, clk_names[REFCLK]);
+ clk = of_clk_provider_get_by_name(np, clk_names[REFCLK]);
if (!IS_ERR(clk)) {
clk_names[REFCLK] = __clk_get_name(clk);
- clk_put(clk);
+ __clk_put(clk);
}
- clk = of_clk_get_by_name(np, clk_names[VIDEO_EXT0]);
+ clk = of_clk_provider_get_by_name(np, clk_names[VIDEO_EXT0]);
if (!IS_ERR(clk)) {
clk_names[VIDEO_EXT0] = __clk_get_name(clk);
- clk_put(clk);
+ __clk_put(clk);
}
/* simple register PLLs */
diff --git a/drivers/clk/berlin/bg2q.c b/drivers/clk/berlin/bg2q.c
index 748da9b..33cc08b 100644
--- a/drivers/clk/berlin/bg2q.c
+++ b/drivers/clk/berlin/bg2q.c
@@ -17,7 +17,6 @@
* this program. If not, see <http://www.gnu.org/licenses/>.
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/kernel.h>
@@ -47,7 +46,7 @@
#define REG_SDIO1XIN_CLKCTL 0x015c
#define MAX_CLKS 27
-static struct clk *clks[MAX_CLKS];
+static struct clk_core *clks[MAX_CLKS];
static struct clk_onecell_data clk_data;
static DEFINE_SPINLOCK(lock);
static void __iomem *gbase;
@@ -293,7 +292,7 @@ static const struct berlin2_gate_data bg2q_gates[] __initconst = {
static void __init berlin2q_clock_setup(struct device_node *np)
{
const char *parent_names[9];
- struct clk *clk;
+ struct clk_core *clk;
int n;
gbase = of_iomap(np, 0);
@@ -311,10 +310,10 @@ static void __init berlin2q_clock_setup(struct device_node *np)
}
/* overwrite default clock names with DT provided ones */
- clk = of_clk_get_by_name(np, clk_names[REFCLK]);
+ clk = of_clk_provider_get_by_name(np, clk_names[REFCLK]);
if (!IS_ERR(clk)) {
clk_names[REFCLK] = __clk_get_name(clk);
- clk_put(clk);
+ __clk_put(clk);
}
/* simple register PLLs */
diff --git a/drivers/clk/clk-axi-clkgen.c b/drivers/clk/clk-axi-clkgen.c
index 1127ee4..d91550c 100644
--- a/drivers/clk/clk-axi-clkgen.c
+++ b/drivers/clk/clk-axi-clkgen.c
@@ -10,7 +10,6 @@
#include <linux/platform_device.h>
#include <linux/clk-provider.h>
-#include <linux/clk.h>
#include <linux/slab.h>
#include <linux/io.h>
#include <linux/of.h>
@@ -489,7 +488,7 @@ static int axi_clkgen_probe(struct platform_device *pdev)
const char *parent_name;
const char *clk_name;
struct resource *mem;
- struct clk *clk;
+ struct clk_core *clk;
if (!pdev->dev.of_node)
return -ENODEV;
diff --git a/drivers/clk/clk-axm5516.c b/drivers/clk/clk-axm5516.c
index d2f1e11..3dc6e58 100644
--- a/drivers/clk/clk-axm5516.c
+++ b/drivers/clk/clk-axm5516.c
@@ -532,7 +532,7 @@ MODULE_DEVICE_TABLE(of, axmclk_match_table);
struct axmclk_priv {
struct clk_onecell_data onecell;
- struct clk *clks[];
+ struct clk_core *clks[];
};
static int axmclk_probe(struct platform_device *pdev)
@@ -541,7 +541,7 @@ static int axmclk_probe(struct platform_device *pdev)
struct resource *res;
int i, ret;
struct device *dev = &pdev->dev;
- struct clk *clk;
+ struct clk_core *clk;
struct regmap *regmap;
size_t num_clks;
struct axmclk_priv *priv;
diff --git a/drivers/clk/clk-bcm2835.c b/drivers/clk/clk-bcm2835.c
index 6b950ca..f25e85e 100644
--- a/drivers/clk/clk-bcm2835.c
+++ b/drivers/clk/clk-bcm2835.c
@@ -29,7 +29,7 @@
*/
void __init bcm2835_init_clocks(void)
{
- struct clk *clk;
+ struct clk_core *clk;
int ret;
clk = clk_register_fixed_rate(NULL, "sys_pclk", NULL, CLK_IS_ROOT,
diff --git a/drivers/clk/clk-clps711x.c b/drivers/clk/clk-clps711x.c
index 715eec1..6aa64bb 100644
--- a/drivers/clk/clk-clps711x.c
+++ b/drivers/clk/clk-clps711x.c
@@ -9,7 +9,6 @@
* (at your option) any later version.
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/io.h>
@@ -43,7 +42,7 @@ static const struct clk_div_table timer_div_table[] = {
struct clps711x_clk {
struct clk_onecell_data clk_data;
spinlock_t lock;
- struct clk *clks[CLPS711X_CLK_MAX];
+ struct clk_core *clks[CLPS711X_CLK_MAX];
};
static struct clps711x_clk * __init _clps711x_clk_init(void __iomem *base,
diff --git a/drivers/clk/clk-composite.c b/drivers/clk/clk-composite.c
index b9355da..d7322fa 100644
--- a/drivers/clk/clk-composite.c
+++ b/drivers/clk/clk-composite.c
@@ -14,7 +14,6 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/err.h>
#include <linux/slab.h>
@@ -57,14 +56,14 @@ static unsigned long clk_composite_recalc_rate(struct clk_hw *hw,
static long clk_composite_determine_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *best_parent_rate,
- struct clk **best_parent_p)
+ struct clk_core **best_parent_p)
{
struct clk_composite *composite = to_clk_composite(hw);
const struct clk_ops *rate_ops = composite->rate_ops;
const struct clk_ops *mux_ops = composite->mux_ops;
struct clk_hw *rate_hw = composite->rate_hw;
struct clk_hw *mux_hw = composite->mux_hw;
- struct clk *parent;
+ struct clk_core *parent;
unsigned long parent_rate;
long tmp_rate, best_rate = 0;
unsigned long rate_diff;
@@ -80,7 +79,7 @@ static long clk_composite_determine_rate(struct clk_hw *hw, unsigned long rate,
*best_parent_p = NULL;
if (__clk_get_flags(hw->clk) & CLK_SET_RATE_NO_REPARENT) {
- *best_parent_p = clk_get_parent(mux_hw->clk);
+ *best_parent_p = clk_provider_get_parent(mux_hw->clk);
*best_parent_rate = __clk_get_rate(*best_parent_p);
return rate_ops->round_rate(rate_hw, rate,
@@ -181,14 +180,14 @@ static void clk_composite_disable(struct clk_hw *hw)
gate_ops->disable(gate_hw);
}
-struct clk *clk_register_composite(struct device *dev, const char *name,
+struct clk_core *clk_register_composite(struct device *dev, const char *name,
const char **parent_names, int num_parents,
struct clk_hw *mux_hw, const struct clk_ops *mux_ops,
struct clk_hw *rate_hw, const struct clk_ops *rate_ops,
struct clk_hw *gate_hw, const struct clk_ops *gate_ops,
unsigned long flags)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
struct clk_composite *composite;
struct clk_ops *clk_composite_ops;
diff --git a/drivers/clk/clk-conf.c b/drivers/clk/clk-conf.c
index d36a7b3..c9231cd 100644
--- a/drivers/clk/clk-conf.c
+++ b/drivers/clk/clk-conf.c
@@ -7,7 +7,6 @@
* published by the Free Software Foundation.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/clk/clk-conf.h>
@@ -20,7 +19,7 @@ static int __set_clk_parents(struct device_node *node, bool clk_supplier)
{
struct of_phandle_args clkspec;
int index, rc, num_parents;
- struct clk *clk, *pclk;
+ struct clk_core *clk, *pclk;
num_parents = of_count_phandle_with_args(node, "assigned-clock-parents",
"#clock-cells");
@@ -63,16 +62,16 @@ static int __set_clk_parents(struct device_node *node, bool clk_supplier)
goto err;
}
- rc = clk_set_parent(clk, pclk);
+ rc = clk_provider_set_parent(clk, pclk);
if (rc < 0)
pr_err("clk: failed to reparent %s to %s: %d\n",
__clk_get_name(clk), __clk_get_name(pclk), rc);
- clk_put(clk);
- clk_put(pclk);
+ __clk_put(clk);
+ __clk_put(pclk);
}
return 0;
err:
- clk_put(pclk);
+ __clk_put(pclk);
return rc;
}
@@ -82,7 +81,7 @@ static int __set_clk_rates(struct device_node *node, bool clk_supplier)
struct property *prop;
const __be32 *cur;
int rc, index = 0;
- struct clk *clk;
+ struct clk_core *clk;
u32 rate;
of_property_for_each_u32(node, "assigned-clock-rates", prop, cur, rate) {
@@ -106,11 +105,11 @@ static int __set_clk_rates(struct device_node *node, bool clk_supplier)
return PTR_ERR(clk);
}
- rc = clk_set_rate(clk, rate);
+ rc = clk_provider_set_rate(clk, rate);
if (rc < 0)
pr_err("clk: couldn't set %s clock rate: %d\n",
__clk_get_name(clk), rc);
- clk_put(clk);
+ __clk_put(clk);
}
index++;
}
diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
index 18a9de2..3c78139 100644
--- a/drivers/clk/clk-divider.c
+++ b/drivers/clk/clk-divider.c
@@ -366,14 +366,14 @@ const struct clk_ops clk_divider_ro_ops = {
};
EXPORT_SYMBOL_GPL(clk_divider_ro_ops);
-static struct clk *_register_divider(struct device *dev, const char *name,
+static struct clk_core *_register_divider(struct device *dev, const char *name,
const char *parent_name, unsigned long flags,
void __iomem *reg, u8 shift, u8 width,
u8 clk_divider_flags, const struct clk_div_table *table,
spinlock_t *lock)
{
struct clk_divider *div;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
if (clk_divider_flags & CLK_DIVIDER_HIWORD_MASK) {
@@ -429,7 +429,7 @@ static struct clk *_register_divider(struct device *dev, const char *name,
* @clk_divider_flags: divider-specific flags for this clock
* @lock: shared register lock for this clock
*/
-struct clk *clk_register_divider(struct device *dev, const char *name,
+struct clk_core *clk_register_divider(struct device *dev, const char *name,
const char *parent_name, unsigned long flags,
void __iomem *reg, u8 shift, u8 width,
u8 clk_divider_flags, spinlock_t *lock)
@@ -453,7 +453,7 @@ EXPORT_SYMBOL_GPL(clk_register_divider);
* @table: array of divider/value pairs ending with a div set to 0
* @lock: shared register lock for this clock
*/
-struct clk *clk_register_divider_table(struct device *dev, const char *name,
+struct clk_core *clk_register_divider_table(struct device *dev, const char *name,
const char *parent_name, unsigned long flags,
void __iomem *reg, u8 shift, u8 width,
u8 clk_divider_flags, const struct clk_div_table *table,
diff --git a/drivers/clk/clk-efm32gg.c b/drivers/clk/clk-efm32gg.c
index bac2ddf..3240887 100644
--- a/drivers/clk/clk-efm32gg.c
+++ b/drivers/clk/clk-efm32gg.c
@@ -6,7 +6,6 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
-#include <linux/clk.h>
#include <linux/io.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
@@ -16,7 +15,7 @@
#define CMU_HFPERCLKEN0 0x44
-static struct clk *clk[37];
+static struct clk_core *clk[37];
static struct clk_onecell_data clk_data = {
.clks = clk,
.clk_num = ARRAY_SIZE(clk),
diff --git a/drivers/clk/clk-fixed-factor.c b/drivers/clk/clk-fixed-factor.c
index d9e3f67..ae1fef0 100644
--- a/drivers/clk/clk-fixed-factor.c
+++ b/drivers/clk/clk-fixed-factor.c
@@ -65,13 +65,13 @@ struct clk_ops clk_fixed_factor_ops = {
};
EXPORT_SYMBOL_GPL(clk_fixed_factor_ops);
-struct clk *clk_register_fixed_factor(struct device *dev, const char *name,
+struct clk_core *clk_register_fixed_factor(struct device *dev, const char *name,
const char *parent_name, unsigned long flags,
unsigned int mult, unsigned int div)
{
struct clk_fixed_factor *fix;
struct clk_init_data init;
- struct clk *clk;
+ struct clk_core *clk;
fix = kmalloc(sizeof(*fix), GFP_KERNEL);
if (!fix) {
@@ -105,7 +105,7 @@ EXPORT_SYMBOL_GPL(clk_register_fixed_factor);
*/
void __init of_fixed_factor_clk_setup(struct device_node *node)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name = node->name;
const char *parent_name;
u32 div, mult;
diff --git a/drivers/clk/clk-fixed-rate.c b/drivers/clk/clk-fixed-rate.c
index 0fc56ab..56c0ced 100644
--- a/drivers/clk/clk-fixed-rate.c
+++ b/drivers/clk/clk-fixed-rate.c
@@ -56,12 +56,12 @@ EXPORT_SYMBOL_GPL(clk_fixed_rate_ops);
* @fixed_rate: non-adjustable clock rate
* @fixed_accuracy: non-adjustable clock rate
*/
-struct clk *clk_register_fixed_rate_with_accuracy(struct device *dev,
+struct clk_core *clk_register_fixed_rate_with_accuracy(struct device *dev,
const char *name, const char *parent_name, unsigned long flags,
unsigned long fixed_rate, unsigned long fixed_accuracy)
{
struct clk_fixed_rate *fixed;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
/* allocate fixed-rate clock */
@@ -99,7 +99,7 @@ EXPORT_SYMBOL_GPL(clk_register_fixed_rate_with_accuracy);
* @flags: framework-specific flags
* @fixed_rate: non-adjustable clock rate
*/
-struct clk *clk_register_fixed_rate(struct device *dev, const char *name,
+struct clk_core *clk_register_fixed_rate(struct device *dev, const char *name,
const char *parent_name, unsigned long flags,
unsigned long fixed_rate)
{
@@ -114,7 +114,7 @@ EXPORT_SYMBOL_GPL(clk_register_fixed_rate);
*/
void of_fixed_clk_setup(struct device_node *node)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name = node->name;
u32 rate;
u32 accuracy = 0;
diff --git a/drivers/clk/clk-fractional-divider.c b/drivers/clk/clk-fractional-divider.c
index ede685c..8104683 100644
--- a/drivers/clk/clk-fractional-divider.c
+++ b/drivers/clk/clk-fractional-divider.c
@@ -96,14 +96,14 @@ const struct clk_ops clk_fractional_divider_ops = {
};
EXPORT_SYMBOL_GPL(clk_fractional_divider_ops);
-struct clk *clk_register_fractional_divider(struct device *dev,
+struct clk_core *clk_register_fractional_divider(struct device *dev,
const char *name, const char *parent_name, unsigned long flags,
void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nwidth,
u8 clk_divider_flags, spinlock_t *lock)
{
struct clk_fractional_divider *fd;
struct clk_init_data init;
- struct clk *clk;
+ struct clk_core *clk;
fd = kzalloc(sizeof(*fd), GFP_KERNEL);
if (!fd) {
diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c
index 4a58c55..429d302 100644
--- a/drivers/clk/clk-gate.c
+++ b/drivers/clk/clk-gate.c
@@ -118,13 +118,13 @@ EXPORT_SYMBOL_GPL(clk_gate_ops);
* @clk_gate_flags: gate-specific flags for this clock
* @lock: shared register lock for this clock
*/
-struct clk *clk_register_gate(struct device *dev, const char *name,
+struct clk_core *clk_register_gate(struct device *dev, const char *name,
const char *parent_name, unsigned long flags,
void __iomem *reg, u8 bit_idx,
u8 clk_gate_flags, spinlock_t *lock)
{
struct clk_gate *gate;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
if (clk_gate_flags & CLK_GATE_HIWORD_MASK) {
diff --git a/drivers/clk/clk-highbank.c b/drivers/clk/clk-highbank.c
index 2e7e9d9..cad2fba 100644
--- a/drivers/clk/clk-highbank.c
+++ b/drivers/clk/clk-highbank.c
@@ -271,10 +271,10 @@ static const struct clk_ops periclk_ops = {
.set_rate = clk_periclk_set_rate,
};
-static __init struct clk *hb_clk_init(struct device_node *node, const struct clk_ops *ops)
+static __init struct clk_core *hb_clk_init(struct device_node *node, const struct clk_ops *ops)
{
u32 reg;
- struct clk *clk;
+ struct clk_core *clk;
struct hb_clk *hb_clk;
const char *clk_name = node->name;
const char *parent_name;
@@ -330,8 +330,8 @@ CLK_OF_DECLARE(hb_a9periph, "calxeda,hb-a9periph-clock", hb_a9periph_init);
static void __init hb_a9bus_init(struct device_node *node)
{
- struct clk *clk = hb_clk_init(node, &a9bclk_ops);
- clk_prepare_enable(clk);
+ struct clk_core *clk = hb_clk_init(node, &a9bclk_ops);
+ clk_provider_prepare_enable(clk);
}
CLK_OF_DECLARE(hb_a9bus, "calxeda,hb-a9bus-clock", hb_a9bus_init);
diff --git a/drivers/clk/clk-ls1x.c b/drivers/clk/clk-ls1x.c
index f20b750..796043c 100644
--- a/drivers/clk/clk-ls1x.c
+++ b/drivers/clk/clk-ls1x.c
@@ -48,11 +48,11 @@ static const struct clk_ops ls1x_pll_clk_ops = {
.recalc_rate = ls1x_pll_recalc_rate,
};
-static struct clk * __init clk_register_pll(struct device *dev,
+static struct clk_core * __init clk_register_pll(struct device *dev,
const char *name, const char *parent_name, unsigned long flags)
{
struct clk_hw *hw;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
/* allocate the divider */
@@ -80,32 +80,32 @@ static struct clk * __init clk_register_pll(struct device *dev,
void __init ls1x_clk_init(void)
{
- struct clk *clk;
+ struct clk_core *clk;
clk = clk_register_pll(NULL, "pll_clk", NULL, CLK_IS_ROOT);
- clk_prepare_enable(clk);
+ clk_provider_prepare_enable(clk);
clk = clk_register_divider(NULL, "cpu_clk", "pll_clk",
CLK_SET_RATE_PARENT, LS1X_CLK_PLL_DIV, DIV_CPU_SHIFT,
DIV_CPU_WIDTH, CLK_DIVIDER_ONE_BASED, &_lock);
- clk_prepare_enable(clk);
+ clk_provider_prepare_enable(clk);
clk_register_clkdev(clk, "cpu", NULL);
clk = clk_register_divider(NULL, "dc_clk", "pll_clk",
CLK_SET_RATE_PARENT, LS1X_CLK_PLL_DIV, DIV_DC_SHIFT,
DIV_DC_WIDTH, CLK_DIVIDER_ONE_BASED, &_lock);
- clk_prepare_enable(clk);
+ clk_provider_prepare_enable(clk);
clk_register_clkdev(clk, "dc", NULL);
clk = clk_register_divider(NULL, "ahb_clk", "pll_clk",
CLK_SET_RATE_PARENT, LS1X_CLK_PLL_DIV, DIV_DDR_SHIFT,
DIV_DDR_WIDTH, CLK_DIVIDER_ONE_BASED, &_lock);
- clk_prepare_enable(clk);
+ clk_provider_prepare_enable(clk);
clk_register_clkdev(clk, "ahb", NULL);
clk_register_clkdev(clk, "stmmaceth", NULL);
clk = clk_register_fixed_factor(NULL, "apb_clk", "ahb_clk", 0, 1, 2);
- clk_prepare_enable(clk);
+ clk_provider_prepare_enable(clk);
clk_register_clkdev(clk, "apb", NULL);
clk_register_clkdev(clk, "serial8250", NULL);
}
diff --git a/drivers/clk/clk-max77686.c b/drivers/clk/clk-max77686.c
index 3d7e8dd..42fa43a 100644
--- a/drivers/clk/clk-max77686.c
+++ b/drivers/clk/clk-max77686.c
@@ -112,10 +112,10 @@ static struct clk_init_data max77686_clks_init[MAX77686_CLKS_NUM] = {
},
};
-static struct clk *max77686_clk_register(struct device *dev,
+static struct clk_core *max77686_clk_register(struct device *dev,
struct max77686_clk *max77686)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_hw *hw = &max77686->hw;
clk = clk_register(dev, hw);
@@ -138,10 +138,10 @@ static int max77686_clk_probe(struct platform_device *pdev)
{
struct max77686_dev *iodev = dev_get_drvdata(pdev->dev.parent);
struct max77686_clk *max77686_clks[MAX77686_CLKS_NUM];
- struct clk **clocks;
+ struct clk_core **clocks;
int i, ret;
- clocks = devm_kzalloc(&pdev->dev, sizeof(struct clk *)
+ clocks = devm_kzalloc(&pdev->dev, sizeof(struct clk_core *)
* MAX77686_CLKS_NUM, GFP_KERNEL);
if (!clocks)
return -ENOMEM;
@@ -203,7 +203,7 @@ err_clocks:
static int max77686_clk_remove(struct platform_device *pdev)
{
struct max77686_dev *iodev = dev_get_drvdata(pdev->dev.parent);
- struct clk **clocks = platform_get_drvdata(pdev);
+ struct clk_core **clocks = platform_get_drvdata(pdev);
int i;
if (iodev->dev->of_node)
diff --git a/drivers/clk/clk-moxart.c b/drivers/clk/clk-moxart.c
index 30a3b69..c503c09 100644
--- a/drivers/clk/clk-moxart.c
+++ b/drivers/clk/clk-moxart.c
@@ -18,7 +18,7 @@
void __init moxart_of_pll_clk_init(struct device_node *node)
{
static void __iomem *base;
- struct clk *clk, *ref_clk;
+ struct clk_core *clk, *ref_clk;
unsigned int mul;
const char *name = node->name;
const char *parent_name;
@@ -35,7 +35,7 @@ void __init moxart_of_pll_clk_init(struct device_node *node)
mul = readl(base + 0x30) >> 3 & 0x3f;
iounmap(base);
- ref_clk = of_clk_get(node, 0);
+ ref_clk = of_clk_provider_get(node, 0);
if (IS_ERR(ref_clk)) {
pr_err("%s: of_clk_get failed\n", node->full_name);
return;
@@ -56,7 +56,7 @@ CLK_OF_DECLARE(moxart_pll_clock, "moxa,moxart-pll-clock",
void __init moxart_of_apb_clk_init(struct device_node *node)
{
static void __iomem *base;
- struct clk *clk, *pll_clk;
+ struct clk_core *clk, *pll_clk;
unsigned int div, val;
unsigned int div_idx[] = { 2, 3, 4, 6, 8};
const char *name = node->name;
@@ -78,7 +78,7 @@ void __init moxart_of_apb_clk_init(struct device_node *node)
val = 0;
div = div_idx[val] * 2;
- pll_clk = of_clk_get(node, 0);
+ pll_clk = of_clk_provider_get(node, 0);
if (IS_ERR(pll_clk)) {
pr_err("%s: of_clk_get failed\n", node->full_name);
return;
diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c
index 4f96ff3..538c455 100644
--- a/drivers/clk/clk-mux.c
+++ b/drivers/clk/clk-mux.c
@@ -10,7 +10,6 @@
* Simple multiplexer clock implementation
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/module.h>
#include <linux/slab.h>
@@ -113,13 +112,13 @@ const struct clk_ops clk_mux_ro_ops = {
};
EXPORT_SYMBOL_GPL(clk_mux_ro_ops);
-struct clk *clk_register_mux_table(struct device *dev, const char *name,
+struct clk_core *clk_register_mux_table(struct device *dev, const char *name,
const char **parent_names, u8 num_parents, unsigned long flags,
void __iomem *reg, u8 shift, u32 mask,
u8 clk_mux_flags, u32 *table, spinlock_t *lock)
{
struct clk_mux *mux;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
u8 width = 0;
@@ -165,7 +164,7 @@ struct clk *clk_register_mux_table(struct device *dev, const char *name,
}
EXPORT_SYMBOL_GPL(clk_register_mux_table);
-struct clk *clk_register_mux(struct device *dev, const char *name,
+struct clk_core *clk_register_mux(struct device *dev, const char *name,
const char **parent_names, u8 num_parents, unsigned long flags,
void __iomem *reg, u8 shift, u8 width,
u8 clk_mux_flags, spinlock_t *lock)
diff --git a/drivers/clk/clk-nomadik.c b/drivers/clk/clk-nomadik.c
index 05e04ce..91855d3 100644
--- a/drivers/clk/clk-nomadik.c
+++ b/drivers/clk/clk-nomadik.c
@@ -8,7 +8,6 @@
#define pr_fmt(fmt) "Nomadik SRC clocks: " fmt
#include <linux/bitops.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/err.h>
#include <linux/io.h>
@@ -254,11 +253,11 @@ static const struct clk_ops pll_clk_ops = {
.recalc_rate = pll_clk_recalc_rate,
};
-static struct clk * __init
+static struct clk_core * __init
pll_clk_register(struct device *dev, const char *name,
const char *parent_name, u32 id)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_pll *pll;
struct clk_init_data init;
@@ -346,11 +345,11 @@ static const struct clk_ops src_clk_ops = {
.recalc_rate = src_clk_recalc_rate,
};
-static struct clk * __init
+static struct clk_core * __init
src_clk_register(struct device *dev, const char *name,
const char *parent_name, u8 id)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_src *sclk;
struct clk_init_data init;
@@ -510,7 +509,7 @@ module_init(nomadik_src_clk_init_debugfs);
static void __init of_nomadik_pll_setup(struct device_node *np)
{
- struct clk *clk = ERR_PTR(-EINVAL);
+ struct clk_core *clk = ERR_PTR(-EINVAL);
const char *clk_name = np->name;
const char *parent_name;
u32 pll_id;
@@ -533,7 +532,7 @@ CLK_OF_DECLARE(nomadik_pll_clk,
static void __init of_nomadik_hclk_setup(struct device_node *np)
{
- struct clk *clk = ERR_PTR(-EINVAL);
+ struct clk_core *clk = ERR_PTR(-EINVAL);
const char *clk_name = np->name;
const char *parent_name;
@@ -557,7 +556,7 @@ CLK_OF_DECLARE(nomadik_hclk_clk,
static void __init of_nomadik_src_clk_setup(struct device_node *np)
{
- struct clk *clk = ERR_PTR(-EINVAL);
+ struct clk_core *clk = ERR_PTR(-EINVAL);
const char *clk_name = np->name;
const char *parent_name;
u32 clk_id;
diff --git a/drivers/clk/clk-nspire.c b/drivers/clk/clk-nspire.c
index a378db7..e9c43f4 100644
--- a/drivers/clk/clk-nspire.c
+++ b/drivers/clk/clk-nspire.c
@@ -69,7 +69,7 @@ static void __init nspire_ahbdiv_setup(struct device_node *node,
{
u32 val;
void __iomem *io;
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name = node->name;
const char *parent_name;
struct nspire_clk_info info;
@@ -111,7 +111,7 @@ static void __init nspire_clk_setup(struct device_node *node,
{
u32 val;
void __iomem *io;
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name = node->name;
struct nspire_clk_info info;
diff --git a/drivers/clk/clk-palmas.c b/drivers/clk/clk-palmas.c
index 781630e..8febd8c 100644
--- a/drivers/clk/clk-palmas.c
+++ b/drivers/clk/clk-palmas.c
@@ -17,7 +17,6 @@
* General Public License for more details.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/mfd/palmas.h>
@@ -42,7 +41,7 @@ struct palmas_clk32k_desc {
struct palmas_clock_info {
struct device *dev;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_hw hw;
struct palmas *palmas;
struct palmas_clk32k_desc *clk_desc;
@@ -219,7 +218,7 @@ static int palmas_clks_init_configure(struct palmas_clock_info *cinfo)
}
if (cinfo->ext_control_pin) {
- ret = clk_prepare(cinfo->clk);
+ ret = clk_provider_prepare(cinfo->clk);
if (ret < 0) {
dev_err(cinfo->dev, "Clock prep failed, %d\n", ret);
return ret;
@@ -244,7 +243,7 @@ static int palmas_clks_probe(struct platform_device *pdev)
struct palmas_clks_of_match_data *match_data;
const struct of_device_id *match;
struct palmas_clock_info *cinfo;
- struct clk *clk;
+ struct clk_core *clk;
int ret;
match = of_match_device(palmas_clks_of_match, &pdev->dev);
diff --git a/drivers/clk/clk-ppc-corenet.c b/drivers/clk/clk-ppc-corenet.c
index 8e58edf..5619ee9 100644
--- a/drivers/clk/clk-ppc-corenet.c
+++ b/drivers/clk/clk-ppc-corenet.c
@@ -64,7 +64,7 @@ const struct clk_ops cmux_ops = {
static void __init core_mux_init(struct device_node *np)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
struct cmux_clk *cmux_clk;
struct device_node *node;
@@ -150,7 +150,7 @@ static void __init core_pll_init(struct device_node *np)
int i, rc, count;
const char *clk_name, *parent_name;
struct clk_onecell_data *onecell_data;
- struct clk **subclks;
+ struct clk_core **subclks;
void __iomem *base;
base = of_iomap(np, 0);
@@ -184,7 +184,7 @@ static void __init core_pll_init(struct device_node *np)
/* output clock number per PLL */
clocks_per_pll = count;
- subclks = kzalloc(sizeof(struct clk *) * count, GFP_KERNEL);
+ subclks = kzalloc(sizeof(struct clk_core *) * count, GFP_KERNEL);
if (!subclks) {
pr_err("%s: could not allocate subclks\n", __func__);
goto err_map;
@@ -246,7 +246,7 @@ err_map:
static void __init sysclk_init(struct device_node *node)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name = node->name;
struct device_node *np = of_get_parent(node);
u32 rate;
diff --git a/drivers/clk/clk-s2mps11.c b/drivers/clk/clk-s2mps11.c
index b7797fb..17fc7e1 100644
--- a/drivers/clk/clk-s2mps11.c
+++ b/drivers/clk/clk-s2mps11.c
@@ -29,7 +29,7 @@
#define s2mps11_name(a) (a->hw.init->name)
-static struct clk **clk_table;
+static struct clk_core **clk_table;
static struct clk_onecell_data clk_data;
enum {
@@ -43,7 +43,7 @@ struct s2mps11_clk {
struct sec_pmic_dev *iodev;
struct device_node *clk_np;
struct clk_hw hw;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_lookup *lookup;
u32 mask;
unsigned int reg;
@@ -174,7 +174,7 @@ static int s2mps11_clk_probe(struct platform_device *pdev)
s2mps11_clk = s2mps11_clks;
- clk_table = devm_kzalloc(&pdev->dev, sizeof(struct clk *) *
+ clk_table = devm_kzalloc(&pdev->dev, sizeof(struct clk_core *) *
S2MPS11_CLKS_NUM, GFP_KERNEL);
if (!clk_table)
return -ENOMEM;
diff --git a/drivers/clk/clk-si5351.c b/drivers/clk/clk-si5351.c
index 3b2a66f..57c9eb5 100644
--- a/drivers/clk/clk-si5351.c
+++ b/drivers/clk/clk-si5351.c
@@ -56,10 +56,10 @@ struct si5351_driver_data {
struct regmap *regmap;
struct clk_onecell_data onecell;
- struct clk *pxtal;
+ struct clk_core *pxtal;
const char *pxtal_name;
struct clk_hw xtal;
- struct clk *pclkin;
+ struct clk_core *pclkin;
const char *pclkin_name;
struct clk_hw clkin;
@@ -1128,12 +1128,12 @@ static int si5351_dt_parse(struct i2c_client *client,
if (!pdata)
return -ENOMEM;
- pdata->clk_xtal = of_clk_get(np, 0);
+ pdata->clk_xtal = of_clk_provider_get(np, 0);
if (!IS_ERR(pdata->clk_xtal))
- clk_put(pdata->clk_xtal);
- pdata->clk_clkin = of_clk_get(np, 1);
+ __clk_put(pdata->clk_xtal);
+ pdata->clk_clkin = of_clk_provider_get(np, 1);
if (!IS_ERR(pdata->clk_clkin))
- clk_put(pdata->clk_clkin);
+ __clk_put(pdata->clk_clkin);
/*
* property silabs,pll-source : <num src>, [<..>]
@@ -1306,7 +1306,7 @@ static int si5351_i2c_probe(struct i2c_client *client,
struct si5351_platform_data *pdata;
struct si5351_driver_data *drvdata;
struct clk_init_data init;
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_names[4];
u8 num_parents, num_clocks;
int ret, n;
@@ -1545,7 +1545,8 @@ static int si5351_i2c_probe(struct i2c_client *client,
/* set initial clkout rate */
if (pdata->clkout[n].rate != 0) {
int ret;
- ret = clk_set_rate(clk, pdata->clkout[n].rate);
+ ret = clk_provider_set_rate(clk,
+ pdata->clkout[n].rate);
if (ret != 0) {
dev_err(&client->dev, "Cannot set rate : %d\n",
ret);
diff --git a/drivers/clk/clk-si570.c b/drivers/clk/clk-si570.c
index fc167b3..f0eec4e 100644
--- a/drivers/clk/clk-si570.c
+++ b/drivers/clk/clk-si570.c
@@ -407,7 +407,7 @@ static int si570_probe(struct i2c_client *client,
{
struct clk_si570 *data;
struct clk_init_data init;
- struct clk *clk;
+ struct clk_core *clk;
u32 initial_fout, factory_fout, stability;
int err;
enum clk_si570_variant variant = id->driver_data;
@@ -476,7 +476,7 @@ static int si570_probe(struct i2c_client *client,
/* Read the requested initial output frequency from device tree */
if (!of_property_read_u32(client->dev.of_node, "clock-frequency",
&initial_fout)) {
- err = clk_set_rate(clk, initial_fout);
+ err = clk_provider_set_rate(clk, initial_fout);
if (err) {
of_clk_del_provider(client->dev.of_node);
return err;
diff --git a/drivers/clk/clk-twl6040.c b/drivers/clk/clk-twl6040.c
index 1ada79a..d24a8a2 100644
--- a/drivers/clk/clk-twl6040.c
+++ b/drivers/clk/clk-twl6040.c
@@ -20,7 +20,6 @@
*
*/
-#include <linux/clk.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/platform_device.h>
@@ -31,7 +30,7 @@ struct twl6040_clk {
struct twl6040 *twl6040;
struct device *dev;
struct clk_hw mcpdm_fclk;
- struct clk *clk;
+ struct clk_core *clk;
int enabled;
};
diff --git a/drivers/clk/clk-u300.c b/drivers/clk/clk-u300.c
index 406bfc1..392bcbf 100644
--- a/drivers/clk/clk-u300.c
+++ b/drivers/clk/clk-u300.c
@@ -5,7 +5,6 @@
* Author: Linus Walleij <linus.walleij(a)stericsson.com>
* Author: Jonas Aaberg <jonas.aberg(a)stericsson.com>
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/err.h>
#include <linux/io.h>
@@ -688,7 +687,7 @@ static const struct clk_ops syscon_clk_ops = {
.set_rate = syscon_clk_set_rate,
};
-static struct clk * __init
+static struct clk_core * __init
syscon_clk_register(struct device *dev, const char *name,
const char *parent_name, unsigned long flags,
bool hw_ctrld,
@@ -696,7 +695,7 @@ syscon_clk_register(struct device *dev, const char *name,
void __iomem *en_reg, u8 en_bit,
u16 clk_val)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_syscon *sclk;
struct clk_init_data init;
@@ -867,7 +866,7 @@ static struct u300_clock const u300_clk_lookup[] __initconst = {
static void __init of_u300_syscon_clk_init(struct device_node *np)
{
- struct clk *clk = ERR_PTR(-EINVAL);
+ struct clk_core *clk = ERR_PTR(-EINVAL);
const char *clk_name = np->name;
const char *parent_name;
void __iomem *res_reg;
@@ -1110,11 +1109,11 @@ static const struct clk_ops mclk_ops = {
.set_rate = mclk_clk_set_rate,
};
-static struct clk * __init
+static struct clk_core * __init
mclk_clk_register(struct device *dev, const char *name,
const char *parent_name, bool is_mspro)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_mclk *mclk;
struct clk_init_data init;
@@ -1141,7 +1140,7 @@ mclk_clk_register(struct device *dev, const char *name,
static void __init of_u300_syscon_mclk_init(struct device_node *np)
{
- struct clk *clk = ERR_PTR(-EINVAL);
+ struct clk_core *clk = ERR_PTR(-EINVAL);
const char *clk_name = np->name;
const char *parent_name;
diff --git a/drivers/clk/clk-vt8500.c b/drivers/clk/clk-vt8500.c
index 37e9288..e5fb933 100644
--- a/drivers/clk/clk-vt8500.c
+++ b/drivers/clk/clk-vt8500.c
@@ -232,7 +232,7 @@ static const struct clk_ops vt8500_gated_divisor_clk_ops = {
static __init void vtwm_device_clk_init(struct device_node *node)
{
u32 en_reg, div_reg;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_device *dev_clk;
const char *clk_name = node->name;
const char *parent_name;
@@ -650,7 +650,7 @@ static const struct clk_ops vtwm_pll_ops = {
static __init void vtwm_pll_clk_init(struct device_node *node, int pll_type)
{
u32 reg;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_pll *pll_clk;
const char *clk_name = node->name;
const char *parent_name;
diff --git a/drivers/clk/clk-wm831x.c b/drivers/clk/clk-wm831x.c
index b131041..84ce873 100644
--- a/drivers/clk/clk-wm831x.c
+++ b/drivers/clk/clk-wm831x.c
@@ -12,7 +12,6 @@
*
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/delay.h>
#include <linux/module.h>
@@ -25,9 +24,9 @@ struct wm831x_clk {
struct clk_hw xtal_hw;
struct clk_hw fll_hw;
struct clk_hw clkout_hw;
- struct clk *xtal;
- struct clk *fll;
- struct clk *clkout;
+ struct clk_core *xtal;
+ struct clk_core *fll;
+ struct clk_core *clkout;
bool xtal_ena;
};
diff --git a/drivers/clk/clk-xgene.c b/drivers/clk/clk-xgene.c
index dd8a62d..ce3ed34 100644
--- a/drivers/clk/clk-xgene.c
+++ b/drivers/clk/clk-xgene.c
@@ -124,13 +124,13 @@ const struct clk_ops xgene_clk_pll_ops = {
.recalc_rate = xgene_clk_pll_recalc_rate,
};
-static struct clk *xgene_register_clk_pll(struct device *dev,
+static struct clk_core *xgene_register_clk_pll(struct device *dev,
const char *name, const char *parent_name,
unsigned long flags, void __iomem *reg, u32 pll_offset,
u32 type, spinlock_t *lock)
{
struct xgene_clk_pll *apmclk;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
/* allocate the APM clock structure */
@@ -166,7 +166,7 @@ static struct clk *xgene_register_clk_pll(struct device *dev,
static void xgene_pllclk_init(struct device_node *np, enum xgene_pll_type pll_type)
{
const char *clk_name = np->full_name;
- struct clk *clk;
+ struct clk_core *clk;
void *reg;
reg = of_iomap(np, 0);
@@ -395,12 +395,12 @@ const struct clk_ops xgene_clk_ops = {
.round_rate = xgene_clk_round_rate,
};
-static struct clk *xgene_register_clk(struct device *dev,
+static struct clk_core *xgene_register_clk(struct device *dev,
const char *name, const char *parent_name,
struct xgene_dev_parameters *parameters, spinlock_t *lock)
{
struct xgene_clk *apmclk;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
int rc;
@@ -442,7 +442,7 @@ static struct clk *xgene_register_clk(struct device *dev,
static void __init xgene_devclk_init(struct device_node *np)
{
const char *clk_name = np->full_name;
- struct clk *clk;
+ struct clk_core *clk;
struct resource res;
int rc;
struct xgene_dev_parameters parameters;
diff --git a/drivers/clk/clk.h b/drivers/clk/clk.h
index c798138..d278572 100644
--- a/drivers/clk/clk.h
+++ b/drivers/clk/clk.h
@@ -10,8 +10,8 @@
*/
#if defined(CONFIG_OF) && defined(CONFIG_COMMON_CLK)
-struct clk *of_clk_get_by_clkspec(struct of_phandle_args *clkspec);
-struct clk *__of_clk_get_from_provider(struct of_phandle_args *clkspec);
+struct clk_core *of_clk_get_by_clkspec(struct of_phandle_args *clkspec);
+struct clk_core *__of_clk_get_from_provider(struct of_phandle_args *clkspec);
void of_clk_lock(void);
void of_clk_unlock(void);
#endif
diff --git a/drivers/clk/hisilicon/clk-hi3620.c b/drivers/clk/hisilicon/clk-hi3620.c
index 339945d..26f11a3 100644
--- a/drivers/clk/hisilicon/clk-hi3620.c
+++ b/drivers/clk/hisilicon/clk-hi3620.c
@@ -31,7 +31,6 @@
#include <linux/of_address.h>
#include <linux/of_device.h>
#include <linux/slab.h>
-#include <linux/clk.h>
#include <dt-bindings/clock/hi3620-clock.h>
@@ -296,7 +295,7 @@ static unsigned long mmc_clk_recalc_rate(struct clk_hw *hw,
static long mmc_clk_determine_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *best_parent_rate,
- struct clk **best_parent_p)
+ struct clk_core **best_parent_p)
{
struct clk_mmc *mclk = to_mmc(hw);
unsigned long best = 0;
@@ -427,11 +426,11 @@ static struct clk_ops clk_mmc_ops = {
.recalc_rate = mmc_clk_recalc_rate,
};
-static struct clk *hisi_register_clk_mmc(struct hisi_mmc_clock *mmc_clk,
+static struct clk_core *hisi_register_clk_mmc(struct hisi_mmc_clock *mmc_clk,
void __iomem *base, struct device_node *np)
{
struct clk_mmc *mclk;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
mclk = kzalloc(sizeof(*mclk), GFP_KERNEL);
@@ -487,7 +486,7 @@ static void __init hi3620_mmc_clk_init(struct device_node *node)
if (WARN_ON(!clk_data))
return;
- clk_data->clks = kzalloc(sizeof(struct clk *) * num, GFP_KERNEL);
+ clk_data->clks = kzalloc(sizeof(struct clk_core *) * num, GFP_KERNEL);
if (!clk_data->clks) {
pr_err("%s: fail to allocate mmc clk\n", __func__);
return;
diff --git a/drivers/clk/hisilicon/clk-hip04.c b/drivers/clk/hisilicon/clk-hip04.c
index 132b57a..e8403c0 100644
--- a/drivers/clk/hisilicon/clk-hip04.c
+++ b/drivers/clk/hisilicon/clk-hip04.c
@@ -30,7 +30,6 @@
#include <linux/of_address.h>
#include <linux/of_device.h>
#include <linux/slab.h>
-#include <linux/clk.h>
#include <dt-bindings/clock/hip04-clock.h>
diff --git a/drivers/clk/hisilicon/clk.c b/drivers/clk/hisilicon/clk.c
index a078e84..00b7c9c 100644
--- a/drivers/clk/hisilicon/clk.c
+++ b/drivers/clk/hisilicon/clk.c
@@ -32,7 +32,6 @@
#include <linux/of_address.h>
#include <linux/of_device.h>
#include <linux/slab.h>
-#include <linux/clk.h>
#include "clk.h"
@@ -42,7 +41,7 @@ struct hisi_clock_data __init *hisi_clk_init(struct device_node *np,
int nr_clks)
{
struct hisi_clock_data *clk_data;
- struct clk **clk_table;
+ struct clk_core **clk_table;
void __iomem *base;
if (np) {
@@ -63,7 +62,7 @@ struct hisi_clock_data __init *hisi_clk_init(struct device_node *np,
}
clk_data->base = base;
- clk_table = kzalloc(sizeof(struct clk *) * nr_clks, GFP_KERNEL);
+ clk_table = kzalloc(sizeof(struct clk_core *) * nr_clks, GFP_KERNEL);
if (!clk_table) {
pr_err("%s: could not allocate clock lookup table\n", __func__);
goto err_data;
@@ -81,7 +80,7 @@ err:
void __init hisi_clk_register_fixed_rate(struct hisi_fixed_rate_clock *clks,
int nums, struct hisi_clock_data *data)
{
- struct clk *clk;
+ struct clk_core *clk;
int i;
for (i = 0; i < nums; i++) {
@@ -102,7 +101,7 @@ void __init hisi_clk_register_fixed_factor(struct hisi_fixed_factor_clock *clks,
int nums,
struct hisi_clock_data *data)
{
- struct clk *clk;
+ struct clk_core *clk;
int i;
for (i = 0; i < nums; i++) {
@@ -122,7 +121,7 @@ void __init hisi_clk_register_fixed_factor(struct hisi_fixed_factor_clock *clks,
void __init hisi_clk_register_mux(struct hisi_mux_clock *clks,
int nums, struct hisi_clock_data *data)
{
- struct clk *clk;
+ struct clk_core *clk;
void __iomem *base = data->base;
int i;
@@ -151,7 +150,7 @@ void __init hisi_clk_register_mux(struct hisi_mux_clock *clks,
void __init hisi_clk_register_divider(struct hisi_divider_clock *clks,
int nums, struct hisi_clock_data *data)
{
- struct clk *clk;
+ struct clk_core *clk;
void __iomem *base = data->base;
int i;
@@ -180,7 +179,7 @@ void __init hisi_clk_register_divider(struct hisi_divider_clock *clks,
void __init hisi_clk_register_gate(struct hisi_gate_clock *clks,
int nums, struct hisi_clock_data *data)
{
- struct clk *clk;
+ struct clk_core *clk;
void __iomem *base = data->base;
int i;
@@ -208,7 +207,7 @@ void __init hisi_clk_register_gate(struct hisi_gate_clock *clks,
void __init hisi_clk_register_gate_sep(struct hisi_gate_clock *clks,
int nums, struct hisi_clock_data *data)
{
- struct clk *clk;
+ struct clk_core *clk;
void __iomem *base = data->base;
int i;
diff --git a/drivers/clk/hisilicon/clk.h b/drivers/clk/hisilicon/clk.h
index 31083ff..f7fc4b9 100644
--- a/drivers/clk/hisilicon/clk.h
+++ b/drivers/clk/hisilicon/clk.h
@@ -90,7 +90,7 @@ struct hisi_gate_clock {
const char *alias;
};
-struct clk *hisi_register_clkgate_sep(struct device *, const char *,
+struct clk_core *hisi_register_clkgate_sep(struct device *, const char *,
const char *, unsigned long,
void __iomem *, u8,
u8, spinlock_t *);
diff --git a/drivers/clk/hisilicon/clkgate-separated.c b/drivers/clk/hisilicon/clkgate-separated.c
index b03d5a7..5db5ba6 100644
--- a/drivers/clk/hisilicon/clkgate-separated.c
+++ b/drivers/clk/hisilicon/clkgate-separated.c
@@ -28,7 +28,6 @@
#include <linux/clkdev.h>
#include <linux/io.h>
#include <linux/slab.h>
-#include <linux/clk.h>
#include "clk.h"
@@ -96,14 +95,14 @@ static struct clk_ops clkgate_separated_ops = {
.is_enabled = clkgate_separated_is_enabled,
};
-struct clk *hisi_register_clkgate_sep(struct device *dev, const char *name,
+struct clk_core *hisi_register_clkgate_sep(struct device *dev, const char *name,
const char *parent_name,
unsigned long flags,
void __iomem *reg, u8 bit_idx,
u8 clk_gate_flags, spinlock_t *lock)
{
struct clkgate_separated *sclk;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
sclk = kzalloc(sizeof(*sclk), GFP_KERNEL);
diff --git a/drivers/clk/keystone/gate.c b/drivers/clk/keystone/gate.c
index 86f1e36..6bb211a 100644
--- a/drivers/clk/keystone/gate.c
+++ b/drivers/clk/keystone/gate.c
@@ -10,7 +10,6 @@
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/err.h>
#include <linux/io.h>
@@ -163,7 +162,7 @@ static const struct clk_ops clk_psc_ops = {
* @psc_data: platform data to configure this clock
* @lock: spinlock used by this clock
*/
-static struct clk *clk_register_psc(struct device *dev,
+static struct clk_core *clk_register_psc(struct device *dev,
const char *name,
const char *parent_name,
struct clk_psc_data *psc_data,
@@ -171,7 +170,7 @@ static struct clk *clk_register_psc(struct device *dev,
{
struct clk_init_data init;
struct clk_psc *psc;
- struct clk *clk;
+ struct clk_core *clk;
psc = kzalloc(sizeof(*psc), GFP_KERNEL);
if (!psc)
@@ -204,7 +203,7 @@ static void __init of_psc_clk_init(struct device_node *node, spinlock_t *lock)
const char *clk_name = node->name;
const char *parent_name;
struct clk_psc_data *data;
- struct clk *clk;
+ struct clk_core *clk;
int i;
data = kzalloc(sizeof(*data), GFP_KERNEL);
diff --git a/drivers/clk/keystone/pll.c b/drivers/clk/keystone/pll.c
index 0dd8a4b..2e31895 100644
--- a/drivers/clk/keystone/pll.c
+++ b/drivers/clk/keystone/pll.c
@@ -10,7 +10,6 @@
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/err.h>
#include <linux/io.h>
@@ -116,14 +115,14 @@ static const struct clk_ops clk_pll_ops = {
.recalc_rate = clk_pllclk_recalc,
};
-static struct clk *clk_register_pll(struct device *dev,
+static struct clk_core *clk_register_pll(struct device *dev,
const char *name,
const char *parent_name,
struct clk_pll_data *pll_data)
{
struct clk_init_data init;
struct clk_pll *pll;
- struct clk *clk;
+ struct clk_core *clk;
pll = kzalloc(sizeof(*pll), GFP_KERNEL);
if (!pll)
@@ -158,7 +157,7 @@ static void __init _of_pll_clk_init(struct device_node *node, bool pllctrl)
{
struct clk_pll_data *pll_data;
const char *parent_name;
- struct clk *clk;
+ struct clk_core *clk;
int i;
pll_data = kzalloc(sizeof(*pll_data), GFP_KERNEL);
@@ -239,7 +238,7 @@ static void __init of_pll_div_clk_init(struct device_node *node)
const char *parent_name;
void __iomem *reg;
u32 shift, mask;
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name = node->name;
of_property_read_string(node, "clock-output-names", &clk_name);
@@ -282,7 +281,7 @@ static void __init of_pll_mux_clk_init(struct device_node *node)
{
void __iomem *reg;
u32 shift, mask;
- struct clk *clk;
+ struct clk_core *clk;
const char *parents[2];
const char *clk_name = node->name;
diff --git a/drivers/clk/mmp/clk-apbc.c b/drivers/clk/mmp/clk-apbc.c
index d14120e..4a1de49 100644
--- a/drivers/clk/mmp/clk-apbc.c
+++ b/drivers/clk/mmp/clk-apbc.c
@@ -10,7 +10,6 @@
*/
#include <linux/kernel.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include <linux/err.h>
#include <linux/delay.h>
@@ -120,12 +119,12 @@ struct clk_ops clk_apbc_ops = {
.unprepare = clk_apbc_unprepare,
};
-struct clk *mmp_clk_register_apbc(const char *name, const char *parent_name,
+struct clk_core *mmp_clk_register_apbc(const char *name, const char *parent_name,
void __iomem *base, unsigned int delay,
unsigned int apbc_flags, spinlock_t *lock)
{
struct clk_apbc *apbc;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
apbc = kzalloc(sizeof(*apbc), GFP_KERNEL);
diff --git a/drivers/clk/mmp/clk-apmu.c b/drivers/clk/mmp/clk-apmu.c
index abe182b..cbc0712 100644
--- a/drivers/clk/mmp/clk-apmu.c
+++ b/drivers/clk/mmp/clk-apmu.c
@@ -10,7 +10,6 @@
*/
#include <linux/kernel.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include <linux/err.h>
#include <linux/delay.h>
@@ -66,11 +65,11 @@ struct clk_ops clk_apmu_ops = {
.disable = clk_apmu_disable,
};
-struct clk *mmp_clk_register_apmu(const char *name, const char *parent_name,
+struct clk_core *mmp_clk_register_apmu(const char *name, const char *parent_name,
void __iomem *base, u32 enable_mask, spinlock_t *lock)
{
struct clk_apmu *apmu;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
apmu = kzalloc(sizeof(*apmu), GFP_KERNEL);
diff --git a/drivers/clk/mmp/clk-frac.c b/drivers/clk/mmp/clk-frac.c
index 23a56f5..0386cdd 100644
--- a/drivers/clk/mmp/clk-frac.c
+++ b/drivers/clk/mmp/clk-frac.c
@@ -116,14 +116,14 @@ static struct clk_ops clk_factor_ops = {
.set_rate = clk_factor_set_rate,
};
-struct clk *mmp_clk_register_factor(const char *name, const char *parent_name,
+struct clk_core *mmp_clk_register_factor(const char *name, const char *parent_name,
unsigned long flags, void __iomem *base,
struct clk_factor_masks *masks, struct clk_factor_tbl *ftbl,
unsigned int ftbl_cnt)
{
struct clk_factor *factor;
struct clk_init_data init;
- struct clk *clk;
+ struct clk_core *clk;
if (!masks) {
pr_err("%s: must pass a clk_factor_mask\n", __func__);
diff --git a/drivers/clk/mmp/clk-mmp2.c b/drivers/clk/mmp/clk-mmp2.c
index b2721ca..98bd73f 100644
--- a/drivers/clk/mmp/clk-mmp2.c
+++ b/drivers/clk/mmp/clk-mmp2.c
@@ -77,8 +77,8 @@ static const char *ccic_parent[] = {"pll1_2", "pll1_16", "vctcxo"};
void __init mmp2_clk_init(void)
{
- struct clk *clk;
- struct clk *vctcxo;
+ struct clk_core *clk;
+ struct clk_core *vctcxo;
void __iomem *mpmu_base;
void __iomem *apmu_base;
void __iomem *apbc_base;
@@ -192,7 +192,7 @@ void __init mmp2_clk_init(void)
mpmu_base + MPMU_UART_PLL,
&uart_factor_masks, uart_factor_tbl,
ARRAY_SIZE(uart_factor_tbl));
- clk_set_rate(clk, 14745600);
+ clk_provider_set_rate(clk, 14745600);
clk_register_clkdev(clk, "uart_pll", NULL);
clk = mmp_clk_register_apbc("twsi0", "vctcxo",
@@ -251,7 +251,7 @@ void __init mmp2_clk_init(void)
ARRAY_SIZE(uart_parent),
CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
apbc_base + APBC_UART0, 4, 3, 0, &clk_lock);
- clk_set_parent(clk, vctcxo);
+ clk_provider_set_parent(clk, vctcxo);
clk_register_clkdev(clk, "uart_mux.0", NULL);
clk = mmp_clk_register_apbc("uart0", "uart0_mux",
@@ -262,7 +262,7 @@ void __init mmp2_clk_init(void)
ARRAY_SIZE(uart_parent),
CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
apbc_base + APBC_UART1, 4, 3, 0, &clk_lock);
- clk_set_parent(clk, vctcxo);
+ clk_provider_set_parent(clk, vctcxo);
clk_register_clkdev(clk, "uart_mux.1", NULL);
clk = mmp_clk_register_apbc("uart1", "uart1_mux",
@@ -273,7 +273,7 @@ void __init mmp2_clk_init(void)
ARRAY_SIZE(uart_parent),
CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
apbc_base + APBC_UART2, 4, 3, 0, &clk_lock);
- clk_set_parent(clk, vctcxo);
+ clk_provider_set_parent(clk, vctcxo);
clk_register_clkdev(clk, "uart_mux.2", NULL);
clk = mmp_clk_register_apbc("uart2", "uart2_mux",
@@ -284,7 +284,7 @@ void __init mmp2_clk_init(void)
ARRAY_SIZE(uart_parent),
CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
apbc_base + APBC_UART3, 4, 3, 0, &clk_lock);
- clk_set_parent(clk, vctcxo);
+ clk_provider_set_parent(clk, vctcxo);
clk_register_clkdev(clk, "uart_mux.3", NULL);
clk = mmp_clk_register_apbc("uart3", "uart3_mux",
diff --git a/drivers/clk/mmp/clk-pxa168.c b/drivers/clk/mmp/clk-pxa168.c
index 014396b..e4f50ab 100644
--- a/drivers/clk/mmp/clk-pxa168.c
+++ b/drivers/clk/mmp/clk-pxa168.c
@@ -68,8 +68,8 @@ static const char *ccic_phy_parent[] = {"pll1_6", "pll1_12"};
void __init pxa168_clk_init(void)
{
- struct clk *clk;
- struct clk *uart_pll;
+ struct clk_core *clk;
+ struct clk_core *uart_pll;
void __iomem *mpmu_base;
void __iomem *apmu_base;
void __iomem *apbc_base;
@@ -159,7 +159,7 @@ void __init pxa168_clk_init(void)
mpmu_base + MPMU_UART_PLL,
&uart_factor_masks, uart_factor_tbl,
ARRAY_SIZE(uart_factor_tbl));
- clk_set_rate(uart_pll, 14745600);
+ clk_provider_set_rate(uart_pll, 14745600);
clk_register_clkdev(uart_pll, "uart_pll", NULL);
clk = mmp_clk_register_apbc("twsi0", "pll1_13_1_5",
@@ -202,7 +202,7 @@ void __init pxa168_clk_init(void)
ARRAY_SIZE(uart_parent),
CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
apbc_base + APBC_UART0, 4, 3, 0, &clk_lock);
- clk_set_parent(clk, uart_pll);
+ clk_provider_set_parent(clk, uart_pll);
clk_register_clkdev(clk, "uart_mux.0", NULL);
clk = mmp_clk_register_apbc("uart0", "uart0_mux",
@@ -213,7 +213,7 @@ void __init pxa168_clk_init(void)
ARRAY_SIZE(uart_parent),
CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
apbc_base + APBC_UART1, 4, 3, 0, &clk_lock);
- clk_set_parent(clk, uart_pll);
+ clk_provider_set_parent(clk, uart_pll);
clk_register_clkdev(clk, "uart_mux.1", NULL);
clk = mmp_clk_register_apbc("uart1", "uart1_mux",
@@ -224,7 +224,7 @@ void __init pxa168_clk_init(void)
ARRAY_SIZE(uart_parent),
CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
apbc_base + APBC_UART2, 4, 3, 0, &clk_lock);
- clk_set_parent(clk, uart_pll);
+ clk_provider_set_parent(clk, uart_pll);
clk_register_clkdev(clk, "uart_mux.2", NULL);
clk = mmp_clk_register_apbc("uart2", "uart2_mux",
diff --git a/drivers/clk/mmp/clk-pxa910.c b/drivers/clk/mmp/clk-pxa910.c
index 9efc6a4..b5c215e 100644
--- a/drivers/clk/mmp/clk-pxa910.c
+++ b/drivers/clk/mmp/clk-pxa910.c
@@ -66,8 +66,8 @@ static const char *ccic_phy_parent[] = {"pll1_6", "pll1_12"};
void __init pxa910_clk_init(void)
{
- struct clk *clk;
- struct clk *uart_pll;
+ struct clk_core *clk;
+ struct clk_core *uart_pll;
void __iomem *mpmu_base;
void __iomem *apmu_base;
void __iomem *apbcp_base;
@@ -164,7 +164,7 @@ void __init pxa910_clk_init(void)
mpmu_base + MPMU_UART_PLL,
&uart_factor_masks, uart_factor_tbl,
ARRAY_SIZE(uart_factor_tbl));
- clk_set_rate(uart_pll, 14745600);
+ clk_provider_set_rate(uart_pll, 14745600);
clk_register_clkdev(uart_pll, "uart_pll", NULL);
clk = mmp_clk_register_apbc("twsi0", "pll1_13_1_5",
@@ -207,7 +207,7 @@ void __init pxa910_clk_init(void)
ARRAY_SIZE(uart_parent),
CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
apbc_base + APBC_UART0, 4, 3, 0, &clk_lock);
- clk_set_parent(clk, uart_pll);
+ clk_provider_set_parent(clk, uart_pll);
clk_register_clkdev(clk, "uart_mux.0", NULL);
clk = mmp_clk_register_apbc("uart0", "uart0_mux",
@@ -218,7 +218,7 @@ void __init pxa910_clk_init(void)
ARRAY_SIZE(uart_parent),
CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
apbc_base + APBC_UART1, 4, 3, 0, &clk_lock);
- clk_set_parent(clk, uart_pll);
+ clk_provider_set_parent(clk, uart_pll);
clk_register_clkdev(clk, "uart_mux.1", NULL);
clk = mmp_clk_register_apbc("uart1", "uart1_mux",
@@ -229,7 +229,7 @@ void __init pxa910_clk_init(void)
ARRAY_SIZE(uart_parent),
CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
apbcp_base + APBCP_UART2, 4, 3, 0, &clk_lock);
- clk_set_parent(clk, uart_pll);
+ clk_provider_set_parent(clk, uart_pll);
clk_register_clkdev(clk, "uart_mux.2", NULL);
clk = mmp_clk_register_apbc("uart2", "uart2_mux",
diff --git a/drivers/clk/mmp/clk.h b/drivers/clk/mmp/clk.h
index ab86dd4..1477e61 100644
--- a/drivers/clk/mmp/clk.h
+++ b/drivers/clk/mmp/clk.h
@@ -20,15 +20,15 @@ struct clk_factor_tbl {
unsigned int den;
};
-extern struct clk *mmp_clk_register_pll2(const char *name,
+extern struct clk_core *mmp_clk_register_pll2(const char *name,
const char *parent_name, unsigned long flags);
-extern struct clk *mmp_clk_register_apbc(const char *name,
+extern struct clk_core *mmp_clk_register_apbc(const char *name,
const char *parent_name, void __iomem *base,
unsigned int delay, unsigned int apbc_flags, spinlock_t *lock);
-extern struct clk *mmp_clk_register_apmu(const char *name,
+extern struct clk_core *mmp_clk_register_apmu(const char *name,
const char *parent_name, void __iomem *base, u32 enable_mask,
spinlock_t *lock);
-extern struct clk *mmp_clk_register_factor(const char *name,
+extern struct clk_core *mmp_clk_register_factor(const char *name,
const char *parent_name, unsigned long flags,
void __iomem *base, struct clk_factor_masks *masks,
struct clk_factor_tbl *ftbl, unsigned int ftbl_cnt);
diff --git a/drivers/clk/mvebu/clk-corediv.c b/drivers/clk/mvebu/clk-corediv.c
index d1e5863..1be15c4 100644
--- a/drivers/clk/mvebu/clk-corediv.c
+++ b/drivers/clk/mvebu/clk-corediv.c
@@ -238,7 +238,7 @@ mvebu_corediv_clk_init(struct device_node *node,
{
struct clk_init_data init;
struct clk_corediv *corediv;
- struct clk **clks;
+ struct clk_core **clks;
void __iomem *base;
const char *parent_name;
const char *clk_name;
@@ -253,7 +253,7 @@ mvebu_corediv_clk_init(struct device_node *node,
clk_data.clk_num = soc_desc->ndescs;
/* clks holds the clock array */
- clks = kcalloc(clk_data.clk_num, sizeof(struct clk *),
+ clks = kcalloc(clk_data.clk_num, sizeof(struct clk_core *),
GFP_KERNEL);
if (WARN_ON(!clks))
goto err_unmap;
diff --git a/drivers/clk/mvebu/clk-cpu.c b/drivers/clk/mvebu/clk-cpu.c
index 3821a88..59a40c7 100644
--- a/drivers/clk/mvebu/clk-cpu.c
+++ b/drivers/clk/mvebu/clk-cpu.c
@@ -40,7 +40,7 @@ struct cpu_clk {
void __iomem *pmu_dfs;
};
-static struct clk **clks;
+static struct clk_core **clks;
static struct clk_onecell_data clk_data;
@@ -195,8 +195,8 @@ static void __init of_cpu_clk_setup(struct device_node *node)
for_each_node_by_type(dn, "cpu") {
struct clk_init_data init;
- struct clk *clk;
- struct clk *parent_clk;
+ struct clk_core *clk;
+ struct clk_core *parent_clk;
char *clk_name = kzalloc(5, GFP_KERNEL);
int cpu, err;
@@ -208,7 +208,7 @@ static void __init of_cpu_clk_setup(struct device_node *node)
goto bail_out;
sprintf(clk_name, "cpu%d", cpu);
- parent_clk = of_clk_get(node, 0);
+ parent_clk = of_clk_provider_get(node, 0);
cpuclk[cpu].parent_name = __clk_get_name(parent_clk);
cpuclk[cpu].clk_name = clk_name;
diff --git a/drivers/clk/mvebu/common.c b/drivers/clk/mvebu/common.c
index 25ceccf..7a51004 100644
--- a/drivers/clk/mvebu/common.c
+++ b/drivers/clk/mvebu/common.c
@@ -13,7 +13,6 @@
*/
#include <linux/kernel.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/io.h>
@@ -43,7 +42,7 @@ void __init mvebu_coreclk_setup(struct device_node *np,
/* Allocate struct for TCLK, cpu clk, and core ratio clocks */
clk_data.clk_num = 2 + desc->num_ratios;
- clk_data.clks = kzalloc(clk_data.clk_num * sizeof(struct clk *),
+ clk_data.clks = kzalloc(clk_data.clk_num * sizeof(struct clk_core *),
GFP_KERNEL);
if (WARN_ON(!clk_data.clks)) {
iounmap(base);
@@ -91,13 +90,13 @@ void __init mvebu_coreclk_setup(struct device_node *np,
struct clk_gating_ctrl {
spinlock_t lock;
- struct clk **gates;
+ struct clk_core **gates;
int num_gates;
};
#define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw)
-static struct clk *clk_gating_get_src(
+static struct clk_core *clk_gating_get_src(
struct of_phandle_args *clkspec, void *data)
{
struct clk_gating_ctrl *ctrl = (struct clk_gating_ctrl *)data;
@@ -119,7 +118,7 @@ void __init mvebu_clk_gating_setup(struct device_node *np,
const struct clk_gating_soc_desc *desc)
{
struct clk_gating_ctrl *ctrl;
- struct clk *clk;
+ struct clk_core *clk;
void __iomem *base;
const char *default_parent = NULL;
int n;
@@ -128,10 +127,10 @@ void __init mvebu_clk_gating_setup(struct device_node *np,
if (WARN_ON(!base))
return;
- clk = of_clk_get(np, 0);
+ clk = of_clk_provider_get(np, 0);
if (!IS_ERR(clk)) {
default_parent = __clk_get_name(clk);
- clk_put(clk);
+ __clk_put(clk);
}
ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL);
@@ -145,7 +144,7 @@ void __init mvebu_clk_gating_setup(struct device_node *np,
n++;
ctrl->num_gates = n;
- ctrl->gates = kzalloc(ctrl->num_gates * sizeof(struct clk *),
+ ctrl->gates = kzalloc(ctrl->num_gates * sizeof(struct clk_core *),
GFP_KERNEL);
if (WARN_ON(!ctrl->gates))
goto gates_out;
diff --git a/drivers/clk/mxs/clk-div.c b/drivers/clk/mxs/clk-div.c
index 90e1da9..73ca1e8 100644
--- a/drivers/clk/mxs/clk-div.c
+++ b/drivers/clk/mxs/clk-div.c
@@ -9,7 +9,6 @@
* http://www.gnu.org/copyleft/gpl.html
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/err.h>
#include <linux/slab.h>
@@ -74,11 +73,11 @@ static struct clk_ops clk_div_ops = {
.set_rate = clk_div_set_rate,
};
-struct clk *mxs_clk_div(const char *name, const char *parent_name,
+struct clk_core *mxs_clk_div(const char *name, const char *parent_name,
void __iomem *reg, u8 shift, u8 width, u8 busy)
{
struct clk_div *div;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
div = kzalloc(sizeof(*div), GFP_KERNEL);
diff --git a/drivers/clk/mxs/clk-frac.c b/drivers/clk/mxs/clk-frac.c
index e6aa6b5..65cedf8 100644
--- a/drivers/clk/mxs/clk-frac.c
+++ b/drivers/clk/mxs/clk-frac.c
@@ -9,7 +9,6 @@
* http://www.gnu.org/copyleft/gpl.html
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/err.h>
#include <linux/io.h>
@@ -108,11 +107,11 @@ static struct clk_ops clk_frac_ops = {
.set_rate = clk_frac_set_rate,
};
-struct clk *mxs_clk_frac(const char *name, const char *parent_name,
+struct clk_core *mxs_clk_frac(const char *name, const char *parent_name,
void __iomem *reg, u8 shift, u8 width, u8 busy)
{
struct clk_frac *frac;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
frac = kzalloc(sizeof(*frac), GFP_KERNEL);
diff --git a/drivers/clk/mxs/clk-imx23.c b/drivers/clk/mxs/clk-imx23.c
index 9fc9359..43f2d31 100644
--- a/drivers/clk/mxs/clk-imx23.c
+++ b/drivers/clk/mxs/clk-imx23.c
@@ -9,7 +9,6 @@
* http://www.gnu.org/copyleft/gpl.html
*/
-#include <linux/clk.h>
#include <linux/clk/mxs.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
@@ -94,7 +93,7 @@ enum imx23_clk {
clk_max
};
-static struct clk *clks[clk_max];
+static struct clk_core *clks[clk_max];
static struct clk_onecell_data clk_data;
static enum imx23_clk clks_init_on[] __initdata = {
@@ -171,7 +170,7 @@ static void __init mx23_clocks_init(struct device_node *np)
of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
- clk_prepare_enable(clks[clks_init_on[i]]);
+ clk_provider_prepare_enable(clks[clks_init_on[i]]);
}
CLK_OF_DECLARE(imx23_clkctrl, "fsl,imx23-clkctrl", mx23_clocks_init);
diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c
index a6c3501..e6d70ac 100644
--- a/drivers/clk/mxs/clk-imx28.c
+++ b/drivers/clk/mxs/clk-imx28.c
@@ -9,7 +9,6 @@
* http://www.gnu.org/copyleft/gpl.html
*/
-#include <linux/clk.h>
#include <linux/clk/mxs.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
@@ -148,7 +147,7 @@ enum imx28_clk {
clk_max
};
-static struct clk *clks[clk_max];
+static struct clk_core *clks[clk_max];
static struct clk_onecell_data clk_data;
static enum imx28_clk clks_init_on[] __initdata = {
@@ -250,6 +249,6 @@ static void __init mx28_clocks_init(struct device_node *np)
clk_register_clkdev(clks[enet_out], NULL, "enet_out");
for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
- clk_prepare_enable(clks[clks_init_on[i]]);
+ clk_provider_prepare_enable(clks[clks_init_on[i]]);
}
CLK_OF_DECLARE(imx28_clkctrl, "fsl,imx28-clkctrl", mx28_clocks_init);
diff --git a/drivers/clk/mxs/clk-pll.c b/drivers/clk/mxs/clk-pll.c
index fadae41..e0f94ac 100644
--- a/drivers/clk/mxs/clk-pll.c
+++ b/drivers/clk/mxs/clk-pll.c
@@ -9,7 +9,6 @@
* http://www.gnu.org/copyleft/gpl.html
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/delay.h>
#include <linux/err.h>
@@ -86,11 +85,11 @@ static const struct clk_ops clk_pll_ops = {
.recalc_rate = clk_pll_recalc_rate,
};
-struct clk *mxs_clk_pll(const char *name, const char *parent_name,
+struct clk_core *mxs_clk_pll(const char *name, const char *parent_name,
void __iomem *base, u8 power, unsigned long rate)
{
struct clk_pll *pll;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
pll = kzalloc(sizeof(*pll), GFP_KERNEL);
diff --git a/drivers/clk/mxs/clk-ref.c b/drivers/clk/mxs/clk-ref.c
index 4adeed6..af75c3f 100644
--- a/drivers/clk/mxs/clk-ref.c
+++ b/drivers/clk/mxs/clk-ref.c
@@ -9,7 +9,6 @@
* http://www.gnu.org/copyleft/gpl.html
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/err.h>
#include <linux/io.h>
@@ -125,11 +124,11 @@ static const struct clk_ops clk_ref_ops = {
.set_rate = clk_ref_set_rate,
};
-struct clk *mxs_clk_ref(const char *name, const char *parent_name,
+struct clk_core *mxs_clk_ref(const char *name, const char *parent_name,
void __iomem *reg, u8 idx)
{
struct clk_ref *ref;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
ref = kzalloc(sizeof(*ref), GFP_KERNEL);
diff --git a/drivers/clk/mxs/clk-ssp.c b/drivers/clk/mxs/clk-ssp.c
index af7bdbf..5f9b0c3 100644
--- a/drivers/clk/mxs/clk-ssp.c
+++ b/drivers/clk/mxs/clk-ssp.c
@@ -18,7 +18,6 @@
#include <linux/kernel.h>
#include <linux/init.h>
-#include <linux/clk.h>
#include <linux/module.h>
#include <linux/device.h>
#include <linux/io.h>
@@ -30,7 +29,7 @@ void mxs_ssp_set_clk_rate(struct mxs_ssp *ssp, unsigned int rate)
u32 clock_divide, clock_rate;
u32 val;
- ssp_clk = clk_get_rate(ssp->clk);
+ ssp_clk = clk_provider_get_rate(ssp->clk);
for (clock_divide = 2; clock_divide <= 254; clock_divide += 2) {
clock_rate = DIV_ROUND_UP(ssp_clk, rate * clock_divide);
diff --git a/drivers/clk/mxs/clk.h b/drivers/clk/mxs/clk.h
index ef10ad9..19b9dc3 100644
--- a/drivers/clk/mxs/clk.h
+++ b/drivers/clk/mxs/clk.h
@@ -12,7 +12,6 @@
#ifndef __MXS_CLK_H
#define __MXS_CLK_H
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/spinlock.h>
@@ -23,24 +22,24 @@ extern spinlock_t mxs_lock;
int mxs_clk_wait(void __iomem *reg, u8 shift);
-struct clk *mxs_clk_pll(const char *name, const char *parent_name,
+struct clk_core *mxs_clk_pll(const char *name, const char *parent_name,
void __iomem *base, u8 power, unsigned long rate);
-struct clk *mxs_clk_ref(const char *name, const char *parent_name,
+struct clk_core *mxs_clk_ref(const char *name, const char *parent_name,
void __iomem *reg, u8 idx);
-struct clk *mxs_clk_div(const char *name, const char *parent_name,
+struct clk_core *mxs_clk_div(const char *name, const char *parent_name,
void __iomem *reg, u8 shift, u8 width, u8 busy);
-struct clk *mxs_clk_frac(const char *name, const char *parent_name,
+struct clk_core *mxs_clk_frac(const char *name, const char *parent_name,
void __iomem *reg, u8 shift, u8 width, u8 busy);
-static inline struct clk *mxs_clk_fixed(const char *name, int rate)
+static inline struct clk_core *mxs_clk_fixed(const char *name, int rate)
{
return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate);
}
-static inline struct clk *mxs_clk_gate(const char *name,
+static inline struct clk_core *mxs_clk_gate(const char *name,
const char *parent_name, void __iomem *reg, u8 shift)
{
return clk_register_gate(NULL, name, parent_name, CLK_SET_RATE_PARENT,
@@ -48,7 +47,7 @@ static inline struct clk *mxs_clk_gate(const char *name,
&mxs_lock);
}
-static inline struct clk *mxs_clk_mux(const char *name, void __iomem *reg,
+static inline struct clk_core *mxs_clk_mux(const char *name, void __iomem *reg,
u8 shift, u8 width, const char **parent_names, int num_parents)
{
return clk_register_mux(NULL, name, parent_names, num_parents,
@@ -56,7 +55,7 @@ static inline struct clk *mxs_clk_mux(const char *name, void __iomem *reg,
reg, shift, width, 0, &mxs_lock);
}
-static inline struct clk *mxs_clk_fixed_factor(const char *name,
+static inline struct clk_core *mxs_clk_fixed_factor(const char *name,
const char *parent_name, unsigned int mult, unsigned int div)
{
return clk_register_fixed_factor(NULL, name, parent_name,
diff --git a/drivers/clk/qcom/clk-rcg.c b/drivers/clk/qcom/clk-rcg.c
index b638c58..59f118c 100644
--- a/drivers/clk/qcom/clk-rcg.c
+++ b/drivers/clk/qcom/clk-rcg.c
@@ -375,7 +375,7 @@ struct freq_tbl *find_freq(const struct freq_tbl *f, unsigned long rate)
static long _freq_tbl_determine_rate(struct clk_hw *hw,
const struct freq_tbl *f, unsigned long rate,
- unsigned long *p_rate, struct clk **p)
+ unsigned long *p_rate, struct clk_core **p)
{
unsigned long clk_flags;
@@ -402,7 +402,7 @@ static long _freq_tbl_determine_rate(struct clk_hw *hw,
}
static long clk_rcg_determine_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long *p_rate, struct clk **p)
+ unsigned long *p_rate, struct clk_core **p)
{
struct clk_rcg *rcg = to_clk_rcg(hw);
@@ -410,7 +410,7 @@ static long clk_rcg_determine_rate(struct clk_hw *hw, unsigned long rate,
}
static long clk_dyn_rcg_determine_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long *p_rate, struct clk **p)
+ unsigned long *p_rate, struct clk_core **p)
{
struct clk_dyn_rcg *rcg = to_clk_dyn_rcg(hw);
@@ -418,7 +418,7 @@ static long clk_dyn_rcg_determine_rate(struct clk_hw *hw, unsigned long rate,
}
static long clk_rcg_bypass_determine_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long *p_rate, struct clk **p)
+ unsigned long *p_rate, struct clk_core **p)
{
struct clk_rcg *rcg = to_clk_rcg(hw);
const struct freq_tbl *f = rcg->freq_tbl;
diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c
index cd185d5..6aac1ec 100644
--- a/drivers/clk/qcom/clk-rcg2.c
+++ b/drivers/clk/qcom/clk-rcg2.c
@@ -188,7 +188,7 @@ struct freq_tbl *find_freq(const struct freq_tbl *f, unsigned long rate)
static long _freq_tbl_determine_rate(struct clk_hw *hw,
const struct freq_tbl *f, unsigned long rate,
- unsigned long *p_rate, struct clk **p)
+ unsigned long *p_rate, struct clk_core **p)
{
unsigned long clk_flags;
@@ -219,7 +219,7 @@ static long _freq_tbl_determine_rate(struct clk_hw *hw,
}
static long clk_rcg2_determine_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long *p_rate, struct clk **p)
+ unsigned long *p_rate, struct clk_core **p)
{
struct clk_rcg2 *rcg = to_clk_rcg2(hw);
@@ -372,7 +372,7 @@ static int clk_edp_pixel_set_rate_and_parent(struct clk_hw *hw,
}
static long clk_edp_pixel_determine_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long *p_rate, struct clk **p)
+ unsigned long *p_rate, struct clk_core **p)
{
struct clk_rcg2 *rcg = to_clk_rcg2(hw);
const struct freq_tbl *f = rcg->freq_tbl;
@@ -423,7 +423,7 @@ const struct clk_ops clk_edp_pixel_ops = {
EXPORT_SYMBOL_GPL(clk_edp_pixel_ops);
static long clk_byte_determine_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long *p_rate, struct clk **p)
+ unsigned long *p_rate, struct clk_core **p)
{
struct clk_rcg2 *rcg = to_clk_rcg2(hw);
const struct freq_tbl *f = rcg->freq_tbl;
@@ -485,14 +485,14 @@ static const struct frac_entry frac_table_pixel[] = {
};
static long clk_pixel_determine_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long *p_rate, struct clk **p)
+ unsigned long *p_rate, struct clk_core **p)
{
struct clk_rcg2 *rcg = to_clk_rcg2(hw);
unsigned long request, src_rate;
int delta = 100000;
const struct freq_tbl *f = rcg->freq_tbl;
const struct frac_entry *frac = frac_table_pixel;
- struct clk *parent = *p = clk_get_parent_by_index(hw->clk, f->src);
+ struct clk_core *parent = *p = clk_get_parent_by_index(hw->clk, f->src);
for (; frac->num; frac++) {
request = (rate * frac->den) / frac->num;
@@ -519,7 +519,7 @@ static int clk_pixel_set_rate(struct clk_hw *hw, unsigned long rate,
int delta = 100000;
u32 mask = BIT(rcg->hid_width) - 1;
u32 hid_div;
- struct clk *parent = clk_get_parent_by_index(hw->clk, f.src);
+ struct clk_core *parent = clk_get_parent_by_index(hw->clk, f.src);
for (; frac->num; frac++) {
request = (rate * frac->den) / frac->num;
diff --git a/drivers/clk/qcom/clk-regmap.c b/drivers/clk/qcom/clk-regmap.c
index a58ba39..2a98040 100644
--- a/drivers/clk/qcom/clk-regmap.c
+++ b/drivers/clk/qcom/clk-regmap.c
@@ -101,7 +101,7 @@ EXPORT_SYMBOL_GPL(clk_disable_regmap);
* clk_regmap struct via this function so that the regmap is initialized
* and so that the clock is registered with the common clock framework.
*/
-struct clk *devm_clk_register_regmap(struct device *dev,
+struct clk_core *devm_clk_register_regmap(struct device *dev,
struct clk_regmap *rclk)
{
if (dev && dev_get_regmap(dev, NULL))
diff --git a/drivers/clk/qcom/clk-regmap.h b/drivers/clk/qcom/clk-regmap.h
index 491a63d..89258cb 100644
--- a/drivers/clk/qcom/clk-regmap.h
+++ b/drivers/clk/qcom/clk-regmap.h
@@ -39,7 +39,7 @@ struct clk_regmap {
int clk_is_enabled_regmap(struct clk_hw *hw);
int clk_enable_regmap(struct clk_hw *hw);
void clk_disable_regmap(struct clk_hw *hw);
-struct clk *
+struct clk_core *
devm_clk_register_regmap(struct device *dev, struct clk_regmap *rclk);
#endif
diff --git a/drivers/clk/qcom/common.c b/drivers/clk/qcom/common.c
index eeb3eea..afd40ea 100644
--- a/drivers/clk/qcom/common.c
+++ b/drivers/clk/qcom/common.c
@@ -24,7 +24,7 @@
struct qcom_cc {
struct qcom_reset_controller reset;
struct clk_onecell_data data;
- struct clk *clks[];
+ struct clk_core *clks[];
};
struct regmap *
@@ -48,9 +48,9 @@ int qcom_cc_really_probe(struct platform_device *pdev,
{
int i, ret;
struct device *dev = &pdev->dev;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_onecell_data *data;
- struct clk **clks;
+ struct clk_core **clks;
struct qcom_reset_controller *reset;
struct qcom_cc *cc;
size_t num_clks = desc->num_clks;
diff --git a/drivers/clk/qcom/gcc-apq8084.c b/drivers/clk/qcom/gcc-apq8084.c
index ee52eb1..27af0cd 100644
--- a/drivers/clk/qcom/gcc-apq8084.c
+++ b/drivers/clk/qcom/gcc-apq8084.c
@@ -3562,7 +3562,7 @@ MODULE_DEVICE_TABLE(of, gcc_apq8084_match_table);
static int gcc_apq8084_probe(struct platform_device *pdev)
{
- struct clk *clk;
+ struct clk_core *clk;
struct device *dev = &pdev->dev;
/* Temporary until RPM clocks supported */
diff --git a/drivers/clk/qcom/gcc-ipq806x.c b/drivers/clk/qcom/gcc-ipq806x.c
index 4032e51..f31f095 100644
--- a/drivers/clk/qcom/gcc-ipq806x.c
+++ b/drivers/clk/qcom/gcc-ipq806x.c
@@ -2376,7 +2376,7 @@ MODULE_DEVICE_TABLE(of, gcc_ipq806x_match_table);
static int gcc_ipq806x_probe(struct platform_device *pdev)
{
- struct clk *clk;
+ struct clk_core *clk;
struct device *dev = &pdev->dev;
/* Temporary until RPM clocks supported */
diff --git a/drivers/clk/qcom/gcc-msm8660.c b/drivers/clk/qcom/gcc-msm8660.c
index 0c4b727..2d41fdb 100644
--- a/drivers/clk/qcom/gcc-msm8660.c
+++ b/drivers/clk/qcom/gcc-msm8660.c
@@ -2718,7 +2718,7 @@ MODULE_DEVICE_TABLE(of, gcc_msm8660_match_table);
static int gcc_msm8660_probe(struct platform_device *pdev)
{
- struct clk *clk;
+ struct clk_core *clk;
struct device *dev = &pdev->dev;
/* Temporary until RPM clocks supported */
diff --git a/drivers/clk/qcom/gcc-msm8960.c b/drivers/clk/qcom/gcc-msm8960.c
index 007534f..ed8f8f5 100644
--- a/drivers/clk/qcom/gcc-msm8960.c
+++ b/drivers/clk/qcom/gcc-msm8960.c
@@ -3488,7 +3488,7 @@ MODULE_DEVICE_TABLE(of, gcc_msm8960_match_table);
static int gcc_msm8960_probe(struct platform_device *pdev)
{
- struct clk *clk;
+ struct clk_core *clk;
struct device *dev = &pdev->dev;
const struct of_device_id *match;
diff --git a/drivers/clk/qcom/gcc-msm8974.c b/drivers/clk/qcom/gcc-msm8974.c
index 7af7c18..8326b1f 100644
--- a/drivers/clk/qcom/gcc-msm8974.c
+++ b/drivers/clk/qcom/gcc-msm8974.c
@@ -2699,7 +2699,7 @@ static void msm8974_pro_clock_override(void)
static int gcc_msm8974_probe(struct platform_device *pdev)
{
- struct clk *clk;
+ struct clk_core *clk;
struct device *dev = &pdev->dev;
bool pro;
const struct of_device_id *id;
diff --git a/drivers/clk/qcom/mmcc-msm8960.c b/drivers/clk/qcom/mmcc-msm8960.c
index 2e80a21..bb60d61 100644
--- a/drivers/clk/qcom/mmcc-msm8960.c
+++ b/drivers/clk/qcom/mmcc-msm8960.c
@@ -505,7 +505,7 @@ static int pix_rdi_set_parent(struct clk_hw *hw, u8 index)
int ret = 0;
u32 val;
struct clk_pix_rdi *rdi = to_clk_pix_rdi(hw);
- struct clk *clk = hw->clk;
+ struct clk_core *clk = hw->clk;
int num_parents = __clk_get_num_parents(hw->clk);
/*
@@ -517,7 +517,7 @@ static int pix_rdi_set_parent(struct clk_hw *hw, u8 index)
* needs to be on at what time.
*/
for (i = 0; i < num_parents; i++) {
- ret = clk_prepare_enable(clk_get_parent_by_index(clk, i));
+ ret = clk_provider_prepare_enable(clk_get_parent_by_index(clk, i));
if (ret)
goto err;
}
@@ -546,7 +546,7 @@ static int pix_rdi_set_parent(struct clk_hw *hw, u8 index)
err:
for (i--; i >= 0; i--)
- clk_disable_unprepare(clk_get_parent_by_index(clk, i));
+ clk_provider_disable_unprepare(clk_get_parent_by_index(clk, i));
return ret;
}
diff --git a/drivers/clk/rockchip/clk-pll.c b/drivers/clk/rockchip/clk-pll.c
index f2a1c7a..414bff2 100644
--- a/drivers/clk/rockchip/clk-pll.c
+++ b/drivers/clk/rockchip/clk-pll.c
@@ -17,7 +17,6 @@
#include <linux/slab.h>
#include <linux/io.h>
#include <linux/delay.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/regmap.h>
#include "clk.h"
@@ -297,7 +296,7 @@ static const struct clk_ops rockchip_rk3066_pll_clk_ops = {
* Common registering of pll clocks
*/
-struct clk *rockchip_clk_register_pll(enum rockchip_pll_type pll_type,
+struct clk_core *rockchip_clk_register_pll(enum rockchip_pll_type pll_type,
const char *name, const char **parent_names, u8 num_parents,
void __iomem *base, int con_offset, int grf_lock_offset,
int lock_shift, int mode_offset, int mode_shift,
@@ -308,7 +307,7 @@ struct clk *rockchip_clk_register_pll(enum rockchip_pll_type pll_type,
struct clk_init_data init;
struct rockchip_clk_pll *pll;
struct clk_mux *pll_mux;
- struct clk *pll_clk, *mux_clk;
+ struct clk_core *pll_clk, *mux_clk;
char pll_name[20];
int ret;
@@ -377,7 +376,7 @@ struct clk *rockchip_clk_register_pll(enum rockchip_pll_type pll_type,
goto err_pll;
}
- ret = clk_notifier_register(pll_clk, &pll->clk_nb);
+ ret = clk_provider_notifier_register(pll_clk, &pll->clk_nb);
if (ret) {
pr_err("%s: failed to register clock notifier for %s : %d\n",
__func__, name, ret);
@@ -417,7 +416,7 @@ struct clk *rockchip_clk_register_pll(enum rockchip_pll_type pll_type,
return mux_clk;
err_mux:
- ret = clk_notifier_unregister(pll_clk, &pll->clk_nb);
+ ret = clk_provider_notifier_unregister(pll_clk, &pll->clk_nb);
if (ret) {
pr_err("%s: could not unregister clock notifier in error path : %d\n",
__func__, ret);
diff --git a/drivers/clk/rockchip/clk-rk3188.c b/drivers/clk/rockchip/clk-rk3188.c
index a83a6d8..89b2a17 100644
--- a/drivers/clk/rockchip/clk-rk3188.c
+++ b/drivers/clk/rockchip/clk-rk3188.c
@@ -602,7 +602,7 @@ static struct rockchip_clk_branch rk3188_clk_branches[] __initdata = {
static void __init rk3188_common_clk_init(struct device_node *np)
{
void __iomem *reg_base;
- struct clk *clk;
+ struct clk_core *clk;
reg_base = of_iomap(np, 0);
if (!reg_base) {
diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
index 0d8c6c5..f52f73e 100644
--- a/drivers/clk/rockchip/clk-rk3288.c
+++ b/drivers/clk/rockchip/clk-rk3288.c
@@ -683,7 +683,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
static void __init rk3288_clk_init(struct device_node *np)
{
void __iomem *reg_base;
- struct clk *clk;
+ struct clk_core *clk;
reg_base = of_iomap(np, 0);
if (!reg_base) {
diff --git a/drivers/clk/rockchip/clk-rockchip.c b/drivers/clk/rockchip/clk-rockchip.c
index 4cf838d5..faa8dfa 100644
--- a/drivers/clk/rockchip/clk-rockchip.c
+++ b/drivers/clk/rockchip/clk-rockchip.c
@@ -54,7 +54,7 @@ static void __init rk2928_gate_clk_init(struct device_node *node)
if (!clk_data)
return;
- clk_data->clks = kzalloc(qty * sizeof(struct clk *), GFP_KERNEL);
+ clk_data->clks = kzalloc(qty * sizeof(struct clk_core *), GFP_KERNEL);
if (!clk_data->clks) {
kfree(clk_data);
return;
diff --git a/drivers/clk/rockchip/clk.c b/drivers/clk/rockchip/clk.c
index 278cf9d..ce38756 100644
--- a/drivers/clk/rockchip/clk.c
+++ b/drivers/clk/rockchip/clk.c
@@ -21,7 +21,6 @@
*/
#include <linux/slab.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/mfd/syscon.h>
#include <linux/regmap.h>
@@ -37,7 +36,7 @@
*
* sometimes without one of those components.
*/
-struct clk *rockchip_clk_register_branch(const char *name,
+struct clk_core *rockchip_clk_register_branch(const char *name,
const char **parent_names, u8 num_parents, void __iomem *base,
int muxdiv_offset, u8 mux_shift, u8 mux_width, u8 mux_flags,
u8 div_shift, u8 div_width, u8 div_flags,
@@ -45,7 +44,7 @@ struct clk *rockchip_clk_register_branch(const char *name,
u8 gate_shift, u8 gate_flags, unsigned long flags,
spinlock_t *lock)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_mux *mux = NULL;
struct clk_gate *gate = NULL;
struct clk_divider *div = NULL;
@@ -104,7 +103,7 @@ struct clk *rockchip_clk_register_branch(const char *name,
}
static DEFINE_SPINLOCK(clk_lock);
-static struct clk **clk_table;
+static struct clk_core **clk_table;
static void __iomem *reg_base;
static struct clk_onecell_data clk_data;
static struct device_node *cru_node;
@@ -117,7 +116,7 @@ void __init rockchip_clk_init(struct device_node *np, void __iomem *base,
cru_node = np;
grf = ERR_PTR(-EPROBE_DEFER);
- clk_table = kcalloc(nr_clks, sizeof(struct clk *), GFP_KERNEL);
+ clk_table = kcalloc(nr_clks, sizeof(struct clk_core *), GFP_KERNEL);
if (!clk_table)
pr_err("%s: could not allocate clock lookup table\n", __func__);
@@ -133,7 +132,7 @@ struct regmap *rockchip_clk_get_grf(void)
return grf;
}
-void rockchip_clk_add_lookup(struct clk *clk, unsigned int id)
+void rockchip_clk_add_lookup(struct clk_core *clk, unsigned int id)
{
if (clk_table && id)
clk_table[id] = clk;
@@ -142,7 +141,7 @@ void rockchip_clk_add_lookup(struct clk *clk, unsigned int id)
void __init rockchip_clk_register_plls(struct rockchip_pll_clock *list,
unsigned int nr_pll, int grf_lock_offset)
{
- struct clk *clk;
+ struct clk_core *clk;
int idx;
for (idx = 0; idx < nr_pll; idx++, list++) {
@@ -165,7 +164,7 @@ void __init rockchip_clk_register_branches(
struct rockchip_clk_branch *list,
unsigned int nr_clk)
{
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
unsigned int idx;
unsigned long flags;
diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h
index 887cbde..4ea36ab 100644
--- a/drivers/clk/rockchip/clk.h
+++ b/drivers/clk/rockchip/clk.h
@@ -24,7 +24,6 @@
#define CLK_ROCKCHIP_CLK_H
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#define HIWORD_UPDATE(val, mask, shift) \
@@ -113,7 +112,7 @@ struct rockchip_pll_clock {
.rate_table = _rtable, \
}
-struct clk *rockchip_clk_register_pll(enum rockchip_pll_type pll_type,
+struct clk_core *rockchip_clk_register_pll(enum rockchip_pll_type pll_type,
const char *name, const char **parent_names, u8 num_parents,
void __iomem *base, int con_offset, int grf_lock_offset,
int lock_shift, int reg_mode, int mode_shift,
@@ -324,7 +323,7 @@ struct rockchip_clk_branch {
void rockchip_clk_init(struct device_node *np, void __iomem *base,
unsigned long nr_clks);
struct regmap *rockchip_clk_get_grf(void);
-void rockchip_clk_add_lookup(struct clk *clk, unsigned int id);
+void rockchip_clk_add_lookup(struct clk_core *clk, unsigned int id);
void rockchip_clk_register_branches(struct rockchip_clk_branch *clk_list,
unsigned int nr_clk);
void rockchip_clk_register_plls(struct rockchip_pll_clock *pll_list,
diff --git a/drivers/clk/samsung/clk-exynos-audss.c b/drivers/clk/samsung/clk-exynos-audss.c
index 13eae14c..f5639bf 100644
--- a/drivers/clk/samsung/clk-exynos-audss.c
+++ b/drivers/clk/samsung/clk-exynos-audss.c
@@ -26,7 +26,7 @@ enum exynos_audss_clk_type {
};
static DEFINE_SPINLOCK(lock);
-static struct clk **clk_table;
+static struct clk_core **clk_table;
static void __iomem *reg_base;
static struct clk_onecell_data clk_data;
@@ -83,7 +83,7 @@ static int exynos_audss_clk_probe(struct platform_device *pdev)
const char *mout_audss_p[] = {"fin_pll", "fout_epll"};
const char *mout_i2s_p[] = {"mout_audss", "cdclk0", "sclk_audio0"};
const char *sclk_pcm_p = "sclk_pcm0";
- struct clk *pll_ref, *pll_in, *cdclk, *sclk_audio, *sclk_pcm_in;
+ struct clk_core *pll_ref, *pll_in, *cdclk, *sclk_audio, *sclk_pcm_in;
const struct of_device_id *match;
enum exynos_audss_clk_type variant;
@@ -100,7 +100,7 @@ static int exynos_audss_clk_probe(struct platform_device *pdev)
}
clk_table = devm_kzalloc(&pdev->dev,
- sizeof(struct clk *) * EXYNOS_AUDSS_MAX_CLKS,
+ sizeof(struct clk_core *) * EXYNOS_AUDSS_MAX_CLKS,
GFP_KERNEL);
if (!clk_table)
return -ENOMEM;
@@ -111,8 +111,8 @@ static int exynos_audss_clk_probe(struct platform_device *pdev)
else
clk_data.clk_num = EXYNOS_AUDSS_MAX_CLKS - 1;
- pll_ref = devm_clk_get(&pdev->dev, "pll_ref");
- pll_in = devm_clk_get(&pdev->dev, "pll_in");
+ pll_ref = devm_clk_provider_get(&pdev->dev, "pll_ref");
+ pll_in = devm_clk_provider_get(&pdev->dev, "pll_in");
if (!IS_ERR(pll_ref))
mout_audss_p[0] = __clk_get_name(pll_ref);
if (!IS_ERR(pll_in))
@@ -122,8 +122,8 @@ static int exynos_audss_clk_probe(struct platform_device *pdev)
CLK_SET_RATE_NO_REPARENT,
reg_base + ASS_CLK_SRC, 0, 1, 0, &lock);
- cdclk = devm_clk_get(&pdev->dev, "cdclk");
- sclk_audio = devm_clk_get(&pdev->dev, "sclk_audio");
+ cdclk = devm_clk_provider_get(&pdev->dev, "cdclk");
+ sclk_audio = devm_clk_provider_get(&pdev->dev, "sclk_audio");
if (!IS_ERR(cdclk))
mout_i2s_p[1] = __clk_get_name(cdclk);
if (!IS_ERR(sclk_audio))
@@ -161,7 +161,7 @@ static int exynos_audss_clk_probe(struct platform_device *pdev)
"sclk_pcm", CLK_SET_RATE_PARENT,
reg_base + ASS_CLK_GATE, 4, 0, &lock);
- sclk_pcm_in = devm_clk_get(&pdev->dev, "sclk_pcm_in");
+ sclk_pcm_in = devm_clk_provider_get(&pdev->dev, "sclk_pcm_in");
if (!IS_ERR(sclk_pcm_in))
sclk_pcm_p = __clk_get_name(sclk_pcm_in);
clk_table[EXYNOS_SCLK_PCM] = clk_register_gate(NULL, "sclk_pcm",
diff --git a/drivers/clk/samsung/clk-exynos-clkout.c b/drivers/clk/samsung/clk-exynos-clkout.c
index 3a7cb25..0ad7dee 100644
--- a/drivers/clk/samsung/clk-exynos-clkout.c
+++ b/drivers/clk/samsung/clk-exynos-clkout.c
@@ -9,7 +9,6 @@
* Clock driver for Exynos clock output
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
@@ -30,7 +29,7 @@ struct exynos_clkout {
struct clk_mux mux;
spinlock_t slock;
struct clk_onecell_data data;
- struct clk *clk_table[EXYNOS_CLKOUT_NR_CLKS];
+ struct clk_core *clk_table[EXYNOS_CLKOUT_NR_CLKS];
void __iomem *reg;
u32 pmu_debug_save;
};
@@ -57,7 +56,7 @@ static struct syscore_ops exynos_clkout_syscore_ops = {
static void __init exynos_clkout_init(struct device_node *node, u32 mux_mask)
{
const char *parent_names[EXYNOS_CLKOUT_PARENTS];
- struct clk *parents[EXYNOS_CLKOUT_PARENTS];
+ struct clk_core *parents[EXYNOS_CLKOUT_PARENTS];
int parent_count;
int ret;
int i;
@@ -73,7 +72,7 @@ static void __init exynos_clkout_init(struct device_node *node, u32 mux_mask)
char name[] = "clkoutXX";
snprintf(name, sizeof(name), "clkout%d", i);
- parents[i] = of_clk_get_by_name(node, name);
+ parents[i] = of_clk_provider_get_by_name(node, name);
if (IS_ERR(parents[i])) {
parent_names[i] = "none";
continue;
@@ -125,7 +124,7 @@ err_unmap:
clks_put:
for (i = 0; i < EXYNOS_CLKOUT_PARENTS; ++i)
if (!IS_ERR(parents[i]))
- clk_put(parents[i]);
+ __clk_put(parents[i]);
free_clkout:
kfree(clkout);
diff --git a/drivers/clk/samsung/clk-exynos3250.c b/drivers/clk/samsung/clk-exynos3250.c
index dc85f8e..5742e76 100644
--- a/drivers/clk/samsung/clk-exynos3250.c
+++ b/drivers/clk/samsung/clk-exynos3250.c
@@ -8,7 +8,6 @@
* Common Clock Framework support for Exynos3250 SoC.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c
index ac163d7..5d77da2 100644
--- a/drivers/clk/samsung/clk-exynos4.c
+++ b/drivers/clk/samsung/clk-exynos4.c
@@ -11,7 +11,6 @@
*/
#include <dt-bindings/clock/exynos4.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
@@ -1230,19 +1229,19 @@ static unsigned long exynos4_get_xom(void)
static void __init exynos4_clk_register_finpll(struct samsung_clk_provider *ctx)
{
struct samsung_fixed_rate_clock fclk;
- struct clk *clk;
+ struct clk_core *clk;
unsigned long finpll_f = 24000000;
char *parent_name;
unsigned int xom = exynos4_get_xom();
parent_name = xom & 1 ? "xusbxti" : "xxti";
- clk = clk_get(NULL, parent_name);
+ clk = clk_provider_get(NULL, parent_name);
if (IS_ERR(clk)) {
pr_err("%s: failed to lookup parent clock %s, assuming "
"fin_pll clock frequency is 24MHz\n", __func__,
parent_name);
} else {
- finpll_f = clk_get_rate(clk);
+ finpll_f = clk_provider_get_rate(clk);
}
fclk.id = CLK_FIN_PLL;
diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c
index 70ec3d2..623e68f 100644
--- a/drivers/clk/samsung/clk-exynos5250.c
+++ b/drivers/clk/samsung/clk-exynos5250.c
@@ -11,7 +11,6 @@
*/
#include <dt-bindings/clock/exynos5250.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
diff --git a/drivers/clk/samsung/clk-exynos5260.c b/drivers/clk/samsung/clk-exynos5260.c
index ce3de97..5a3d623 100644
--- a/drivers/clk/samsung/clk-exynos5260.c
+++ b/drivers/clk/samsung/clk-exynos5260.c
@@ -9,7 +9,6 @@
* Common Clock Framework support for Exynos5260 SoC.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
diff --git a/drivers/clk/samsung/clk-exynos5410.c b/drivers/clk/samsung/clk-exynos5410.c
index 231475b..546b32f 100644
--- a/drivers/clk/samsung/clk-exynos5410.c
+++ b/drivers/clk/samsung/clk-exynos5410.c
@@ -11,7 +11,6 @@
#include <dt-bindings/clock/exynos5410.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c
index 848d602..0229cc9 100644
--- a/drivers/clk/samsung/clk-exynos5420.c
+++ b/drivers/clk/samsung/clk-exynos5420.c
@@ -11,7 +11,6 @@
*/
#include <dt-bindings/clock/exynos5420.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
diff --git a/drivers/clk/samsung/clk-exynos5440.c b/drivers/clk/samsung/clk-exynos5440.c
index 00d1d00..8adeaa1 100644
--- a/drivers/clk/samsung/clk-exynos5440.c
+++ b/drivers/clk/samsung/clk-exynos5440.c
@@ -10,7 +10,6 @@
*/
#include <dt-bindings/clock/exynos5440.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
diff --git a/drivers/clk/samsung/clk-pll.c b/drivers/clk/samsung/clk-pll.c
index b07fad2..aaf234a 100644
--- a/drivers/clk/samsung/clk-pll.c
+++ b/drivers/clk/samsung/clk-pll.c
@@ -910,12 +910,12 @@ static const struct clk_ops samsung_pll2550x_clk_ops = {
.recalc_rate = samsung_pll2550x_recalc_rate,
};
-struct clk * __init samsung_clk_register_pll2550x(const char *name,
+struct clk_core * __init samsung_clk_register_pll2550x(const char *name,
const char *pname, const void __iomem *reg_base,
const unsigned long offset)
{
struct samsung_clk_pll2550x *pll;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
pll = kzalloc(sizeof(*pll), GFP_KERNEL);
@@ -1149,7 +1149,7 @@ static void __init _samsung_clk_register_pll(struct samsung_clk_provider *ctx,
void __iomem *base)
{
struct samsung_clk_pll *pll;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
int ret, len;
diff --git a/drivers/clk/samsung/clk-pll.h b/drivers/clk/samsung/clk-pll.h
index c0ed4d4..81af344 100644
--- a/drivers/clk/samsung/clk-pll.h
+++ b/drivers/clk/samsung/clk-pll.h
@@ -97,7 +97,7 @@ struct samsung_pll_rate_table {
unsigned int vsel;
};
-extern struct clk * __init samsung_clk_register_pll2550x(const char *name,
+extern struct clk_core * __init samsung_clk_register_pll2550x(const char *name,
const char *pname, const void __iomem *reg_base,
const unsigned long offset);
diff --git a/drivers/clk/samsung/clk-s3c2410-dclk.c b/drivers/clk/samsung/clk-s3c2410-dclk.c
index 0449cc0..05354bd 100644
--- a/drivers/clk/samsung/clk-s3c2410-dclk.c
+++ b/drivers/clk/samsung/clk-s3c2410-dclk.c
@@ -87,12 +87,12 @@ const struct clk_ops s3c24xx_clkout_ops = {
.determine_rate = __clk_mux_determine_rate,
};
-struct clk *s3c24xx_register_clkout(struct device *dev, const char *name,
+struct clk_core *s3c24xx_register_clkout(struct device *dev, const char *name,
const char **parent_names, u8 num_parents,
u8 shift, u32 mask)
{
struct s3c24xx_clkout *clkout;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
/* allocate the clkout */
@@ -237,7 +237,7 @@ static int s3c24xx_dclk_probe(struct platform_device *pdev)
{
struct s3c24xx_dclk *s3c24xx_dclk;
struct resource *mem;
- struct clk **clk_table;
+ struct clk_core **clk_table;
struct s3c24xx_dclk_drv_data *dclk_variant;
int ret, i;
@@ -251,7 +251,7 @@ static int s3c24xx_dclk_probe(struct platform_device *pdev)
spin_lock_init(&s3c24xx_dclk->dclk_lock);
clk_table = devm_kzalloc(&pdev->dev,
- sizeof(struct clk *) * DCLK_MAX_CLKS,
+ sizeof(struct clk_core *) * DCLK_MAX_CLKS,
GFP_KERNEL);
if (!clk_table)
return -ENOMEM;
@@ -329,21 +329,21 @@ static int s3c24xx_dclk_probe(struct platform_device *pdev)
s3c24xx_dclk->dclk1_div_change_nb.notifier_call =
s3c24xx_dclk1_div_notify;
- ret = clk_notifier_register(clk_table[DIV_DCLK0],
- &s3c24xx_dclk->dclk0_div_change_nb);
+ ret = clk_provider_notifier_register(clk_table[DIV_DCLK0],
+ &s3c24xx_dclk->dclk0_div_change_nb);
if (ret)
goto err_clk_register;
- ret = clk_notifier_register(clk_table[DIV_DCLK1],
- &s3c24xx_dclk->dclk1_div_change_nb);
+ ret = clk_provider_notifier_register(clk_table[DIV_DCLK1],
+ &s3c24xx_dclk->dclk1_div_change_nb);
if (ret)
goto err_dclk_notify;
return 0;
err_dclk_notify:
- clk_notifier_unregister(clk_table[DIV_DCLK0],
- &s3c24xx_dclk->dclk0_div_change_nb);
+ clk_provider_notifier_unregister(clk_table[DIV_DCLK0],
+ &s3c24xx_dclk->dclk0_div_change_nb);
err_clk_register:
for (i = 0; i < DCLK_MAX_CLKS; i++)
if (clk_table[i] && !IS_ERR(clk_table[i]))
@@ -355,13 +355,13 @@ err_clk_register:
static int s3c24xx_dclk_remove(struct platform_device *pdev)
{
struct s3c24xx_dclk *s3c24xx_dclk = platform_get_drvdata(pdev);
- struct clk **clk_table = s3c24xx_dclk->clk_data.clks;
+ struct clk_core **clk_table = s3c24xx_dclk->clk_data.clks;
int i;
- clk_notifier_unregister(clk_table[DIV_DCLK1],
- &s3c24xx_dclk->dclk1_div_change_nb);
- clk_notifier_unregister(clk_table[DIV_DCLK0],
- &s3c24xx_dclk->dclk0_div_change_nb);
+ clk_provider_notifier_unregister(clk_table[DIV_DCLK1],
+ &s3c24xx_dclk->dclk1_div_change_nb);
+ clk_provider_notifier_unregister(clk_table[DIV_DCLK0],
+ &s3c24xx_dclk->dclk0_div_change_nb);
for (i = 0; i < DCLK_MAX_CLKS; i++)
clk_unregister(clk_table[i]);
diff --git a/drivers/clk/samsung/clk-s3c2410.c b/drivers/clk/samsung/clk-s3c2410.c
index 5d2f034..af15156 100644
--- a/drivers/clk/samsung/clk-s3c2410.c
+++ b/drivers/clk/samsung/clk-s3c2410.c
@@ -8,7 +8,6 @@
* Common Clock Framework support for S3C2410 and following SoCs.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
diff --git a/drivers/clk/samsung/clk-s3c2412.c b/drivers/clk/samsung/clk-s3c2412.c
index 34af09f..7e6cc95 100644
--- a/drivers/clk/samsung/clk-s3c2412.c
+++ b/drivers/clk/samsung/clk-s3c2412.c
@@ -8,7 +8,6 @@
* Common Clock Framework support for S3C2412 and S3C2413.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
diff --git a/drivers/clk/samsung/clk-s3c2443.c b/drivers/clk/samsung/clk-s3c2443.c
index c92f853..7eaaa68 100644
--- a/drivers/clk/samsung/clk-s3c2443.c
+++ b/drivers/clk/samsung/clk-s3c2443.c
@@ -8,7 +8,6 @@
* Common Clock Framework support for S3C2443 and following SoCs.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
diff --git a/drivers/clk/samsung/clk-s3c64xx.c b/drivers/clk/samsung/clk-s3c64xx.c
index 0f590e5..7dad675 100644
--- a/drivers/clk/samsung/clk-s3c64xx.c
+++ b/drivers/clk/samsung/clk-s3c64xx.c
@@ -8,7 +8,6 @@
* Common Clock Framework support for all S3C64xx SoCs.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
diff --git a/drivers/clk/samsung/clk-s5pv210-audss.c b/drivers/clk/samsung/clk-s5pv210-audss.c
index a8053b4..f7b77e5 100644
--- a/drivers/clk/samsung/clk-s5pv210-audss.c
+++ b/drivers/clk/samsung/clk-s5pv210-audss.c
@@ -24,7 +24,7 @@
#include <dt-bindings/clock/s5pv210-audss.h>
static DEFINE_SPINLOCK(lock);
-static struct clk **clk_table;
+static struct clk_core **clk_table;
static void __iomem *reg_base;
static struct clk_onecell_data clk_data;
@@ -71,7 +71,7 @@ static int s5pv210_audss_clk_probe(struct platform_device *pdev)
const char *mout_audss_p[2];
const char *mout_i2s_p[3];
const char *hclk_p;
- struct clk *hclk, *pll_ref, *pll_in, *cdclk, *sclk_audio;
+ struct clk_core *hclk, *pll_ref, *pll_in, *cdclk, *sclk_audio;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
reg_base = devm_ioremap_resource(&pdev->dev, res);
@@ -81,7 +81,7 @@ static int s5pv210_audss_clk_probe(struct platform_device *pdev)
}
clk_table = devm_kzalloc(&pdev->dev,
- sizeof(struct clk *) * AUDSS_MAX_CLKS,
+ sizeof(struct clk_core *) * AUDSS_MAX_CLKS,
GFP_KERNEL);
if (!clk_table)
return -ENOMEM;
@@ -89,27 +89,27 @@ static int s5pv210_audss_clk_probe(struct platform_device *pdev)
clk_data.clks = clk_table;
clk_data.clk_num = AUDSS_MAX_CLKS;
- hclk = devm_clk_get(&pdev->dev, "hclk");
+ hclk = devm_clk_provider_get(&pdev->dev, "hclk");
if (IS_ERR(hclk)) {
dev_err(&pdev->dev, "failed to get hclk clock\n");
return PTR_ERR(hclk);
}
- pll_in = devm_clk_get(&pdev->dev, "fout_epll");
+ pll_in = devm_clk_provider_get(&pdev->dev, "fout_epll");
if (IS_ERR(pll_in)) {
dev_err(&pdev->dev, "failed to get fout_epll clock\n");
return PTR_ERR(pll_in);
}
- sclk_audio = devm_clk_get(&pdev->dev, "sclk_audio0");
+ sclk_audio = devm_clk_provider_get(&pdev->dev, "sclk_audio0");
if (IS_ERR(sclk_audio)) {
dev_err(&pdev->dev, "failed to get sclk_audio0 clock\n");
return PTR_ERR(sclk_audio);
}
/* iiscdclk0 is an optional external I2S codec clock */
- cdclk = devm_clk_get(&pdev->dev, "iiscdclk0");
- pll_ref = devm_clk_get(&pdev->dev, "xxti");
+ cdclk = devm_clk_provider_get(&pdev->dev, "iiscdclk0");
+ pll_ref = devm_clk_provider_get(&pdev->dev, "xxti");
if (!IS_ERR(pll_ref))
mout_audss_p[0] = __clk_get_name(pll_ref);
diff --git a/drivers/clk/samsung/clk-s5pv210.c b/drivers/clk/samsung/clk-s5pv210.c
index d270a20..517032f 100644
--- a/drivers/clk/samsung/clk-s5pv210.c
+++ b/drivers/clk/samsung/clk-s5pv210.c
@@ -11,7 +11,6 @@
* Common Clock Framework support for all S5PC110/S5PV210 SoCs.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
diff --git a/drivers/clk/samsung/clk.c b/drivers/clk/samsung/clk.c
index deab84d..68133fa 100644
--- a/drivers/clk/samsung/clk.c
+++ b/drivers/clk/samsung/clk.c
@@ -52,14 +52,14 @@ struct samsung_clk_provider *__init samsung_clk_init(struct device_node *np,
void __iomem *base, unsigned long nr_clks)
{
struct samsung_clk_provider *ctx;
- struct clk **clk_table;
+ struct clk_core **clk_table;
int i;
ctx = kzalloc(sizeof(struct samsung_clk_provider), GFP_KERNEL);
if (!ctx)
panic("could not allocate clock provider context.\n");
- clk_table = kcalloc(nr_clks, sizeof(struct clk *), GFP_KERNEL);
+ clk_table = kcalloc(nr_clks, sizeof(struct clk_core *), GFP_KERNEL);
if (!clk_table)
panic("could not allocate clock lookup table\n");
@@ -85,7 +85,7 @@ void __init samsung_clk_of_add_provider(struct device_node *np,
}
/* add a clock instance to the clock lookup table used for dt based lookup */
-void samsung_clk_add_lookup(struct samsung_clk_provider *ctx, struct clk *clk,
+void samsung_clk_add_lookup(struct samsung_clk_provider *ctx, struct clk_core *clk,
unsigned int id)
{
if (ctx->clk_data.clks && id)
@@ -97,7 +97,7 @@ void __init samsung_clk_register_alias(struct samsung_clk_provider *ctx,
struct samsung_clock_alias *list,
unsigned int nr_clk)
{
- struct clk *clk;
+ struct clk_core *clk;
unsigned int idx, ret;
if (!ctx->clk_data.clks) {
@@ -130,7 +130,7 @@ void __init samsung_clk_register_alias(struct samsung_clk_provider *ctx,
void __init samsung_clk_register_fixed_rate(struct samsung_clk_provider *ctx,
struct samsung_fixed_rate_clock *list, unsigned int nr_clk)
{
- struct clk *clk;
+ struct clk_core *clk;
unsigned int idx, ret;
for (idx = 0; idx < nr_clk; idx++, list++) {
@@ -159,7 +159,7 @@ void __init samsung_clk_register_fixed_rate(struct samsung_clk_provider *ctx,
void __init samsung_clk_register_fixed_factor(struct samsung_clk_provider *ctx,
struct samsung_fixed_factor_clock *list, unsigned int nr_clk)
{
- struct clk *clk;
+ struct clk_core *clk;
unsigned int idx;
for (idx = 0; idx < nr_clk; idx++, list++) {
@@ -180,7 +180,7 @@ void __init samsung_clk_register_mux(struct samsung_clk_provider *ctx,
struct samsung_mux_clock *list,
unsigned int nr_clk)
{
- struct clk *clk;
+ struct clk_core *clk;
unsigned int idx, ret;
for (idx = 0; idx < nr_clk; idx++, list++) {
@@ -212,7 +212,7 @@ void __init samsung_clk_register_div(struct samsung_clk_provider *ctx,
struct samsung_div_clock *list,
unsigned int nr_clk)
{
- struct clk *clk;
+ struct clk_core *clk;
unsigned int idx, ret;
for (idx = 0; idx < nr_clk; idx++, list++) {
@@ -251,7 +251,7 @@ void __init samsung_clk_register_gate(struct samsung_clk_provider *ctx,
struct samsung_gate_clock *list,
unsigned int nr_clk)
{
- struct clk *clk;
+ struct clk_core *clk;
unsigned int idx, ret;
for (idx = 0; idx < nr_clk; idx++, list++) {
@@ -303,7 +303,7 @@ void __init samsung_clk_of_register_fixed_ext(struct samsung_clk_provider *ctx,
/* utility function to get the rate of a specified clock */
unsigned long _get_rate(const char *clk_name)
{
- struct clk *clk;
+ struct clk_core *clk;
clk = __clk_lookup(clk_name);
if (!clk) {
@@ -311,5 +311,5 @@ unsigned long _get_rate(const char *clk_name)
return 0;
}
- return clk_get_rate(clk);
+ return clk_provider_get_rate(clk);
}
diff --git a/drivers/clk/samsung/clk.h b/drivers/clk/samsung/clk.h
index 66ab36b..58b1215 100644
--- a/drivers/clk/samsung/clk.h
+++ b/drivers/clk/samsung/clk.h
@@ -13,7 +13,6 @@
#ifndef __SAMSUNG_CLK_H
#define __SAMSUNG_CLK_H
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/io.h>
#include <linux/clk-provider.h>
@@ -336,7 +335,7 @@ extern void __init samsung_clk_of_register_fixed_ext(
const struct of_device_id *clk_matches);
extern void samsung_clk_add_lookup(struct samsung_clk_provider *ctx,
- struct clk *clk, unsigned int id);
+ struct clk_core *clk, unsigned int id);
extern void samsung_clk_register_alias(struct samsung_clk_provider *ctx,
struct samsung_clock_alias *list,
diff --git a/drivers/clk/shmobile/clk-div6.c b/drivers/clk/shmobile/clk-div6.c
index f065f69..c6712fb 100644
--- a/drivers/clk/shmobile/clk-div6.c
+++ b/drivers/clk/shmobile/clk-div6.c
@@ -119,7 +119,7 @@ static void __init cpg_div6_clock_init(struct device_node *np)
struct div6_clock *clock;
const char *parent_name;
const char *name;
- struct clk *clk;
+ struct clk_core *clk;
int ret;
clock = kzalloc(sizeof(*clock), GFP_KERNEL);
diff --git a/drivers/clk/shmobile/clk-emev2.c b/drivers/clk/shmobile/clk-emev2.c
index 6c7c929..2e3a45b 100644
--- a/drivers/clk/shmobile/clk-emev2.c
+++ b/drivers/clk/shmobile/clk-emev2.c
@@ -71,7 +71,7 @@ static void __init emev2_smu_init(void)
static void __init emev2_smu_clkdiv_init(struct device_node *np)
{
u32 reg[2];
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name = of_clk_get_parent_name(np, 0);
if (WARN_ON(of_property_read_u32_array(np, "reg", reg, 2)))
return;
@@ -89,7 +89,7 @@ CLK_OF_DECLARE(emev2_smu_clkdiv, "renesas,emev2-smu-clkdiv",
static void __init emev2_smu_gclk_init(struct device_node *np)
{
u32 reg[2];
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name = of_clk_get_parent_name(np, 0);
if (WARN_ON(of_property_read_u32_array(np, "reg", reg, 2)))
return;
diff --git a/drivers/clk/shmobile/clk-mstp.c b/drivers/clk/shmobile/clk-mstp.c
index 2d2fe77..2659676 100644
--- a/drivers/clk/shmobile/clk-mstp.c
+++ b/drivers/clk/shmobile/clk-mstp.c
@@ -121,13 +121,13 @@ static const struct clk_ops cpg_mstp_clock_ops = {
.is_enabled = cpg_mstp_clock_is_enabled,
};
-static struct clk * __init
+static struct clk_core * __init
cpg_mstp_clock_register(const char *name, const char *parent_name,
unsigned int index, struct mstp_clock_group *group)
{
struct clk_init_data init;
struct mstp_clock *clock;
- struct clk *clk;
+ struct clk_core *clk;
clock = kzalloc(sizeof(*clock), GFP_KERNEL);
if (!clock) {
@@ -157,7 +157,7 @@ static void __init cpg_mstp_clocks_init(struct device_node *np)
{
struct mstp_clock_group *group;
const char *idxname;
- struct clk **clks;
+ struct clk_core **clks;
unsigned int i;
group = kzalloc(sizeof(*group), GFP_KERNEL);
diff --git a/drivers/clk/shmobile/clk-r8a7740.c b/drivers/clk/shmobile/clk-r8a7740.c
index 1e2eaae..8889e6a 100644
--- a/drivers/clk/shmobile/clk-r8a7740.c
+++ b/drivers/clk/shmobile/clk-r8a7740.c
@@ -61,7 +61,7 @@ static const struct clk_div_table div4_div_table[] = {
static u32 cpg_mode __initdata;
-static struct clk * __init
+static struct clk_core * __init
r8a7740_cpg_register_clock(struct device_node *np, struct r8a7740_cpg *cpg,
const char *name)
{
@@ -147,7 +147,7 @@ r8a7740_cpg_register_clock(struct device_node *np, struct r8a7740_cpg *cpg,
static void __init r8a7740_cpg_clocks_init(struct device_node *np)
{
struct r8a7740_cpg *cpg;
- struct clk **clks;
+ struct clk_core **clks;
unsigned int i;
int num_clks;
@@ -180,7 +180,7 @@ static void __init r8a7740_cpg_clocks_init(struct device_node *np)
for (i = 0; i < num_clks; ++i) {
const char *name;
- struct clk *clk;
+ struct clk_core *clk;
of_property_read_string_index(np, "clock-output-names", i,
&name);
diff --git a/drivers/clk/shmobile/clk-r8a7779.c b/drivers/clk/shmobile/clk-r8a7779.c
index 652ecac..96b51b1 100644
--- a/drivers/clk/shmobile/clk-r8a7779.c
+++ b/drivers/clk/shmobile/clk-r8a7779.c
@@ -90,7 +90,7 @@ static const unsigned int cpg_plla_mult[4] __initconst = { 42, 48, 56, 64 };
static u32 cpg_mode __initdata;
-static struct clk * __init
+static struct clk_core * __init
r8a7779_cpg_register_clock(struct device_node *np, struct r8a7779_cpg *cpg,
const struct cpg_clk_config *config,
unsigned int plla_mult, const char *name)
@@ -124,7 +124,7 @@ static void __init r8a7779_cpg_clocks_init(struct device_node *np)
{
const struct cpg_clk_config *config;
struct r8a7779_cpg *cpg;
- struct clk **clks;
+ struct clk_core **clks;
unsigned int i, plla_mult;
int num_clks;
@@ -153,7 +153,7 @@ static void __init r8a7779_cpg_clocks_init(struct device_node *np)
for (i = 0; i < num_clks; ++i) {
const char *name;
- struct clk *clk;
+ struct clk_core *clk;
of_property_read_string_index(np, "clock-output-names", i,
&name);
diff --git a/drivers/clk/shmobile/clk-rcar-gen2.c b/drivers/clk/shmobile/clk-rcar-gen2.c
index dff7f79..d8bdeb8 100644
--- a/drivers/clk/shmobile/clk-rcar-gen2.c
+++ b/drivers/clk/shmobile/clk-rcar-gen2.c
@@ -133,12 +133,12 @@ static const struct clk_ops cpg_z_clk_ops = {
.set_rate = cpg_z_clk_set_rate,
};
-static struct clk * __init cpg_z_clk_register(struct rcar_gen2_cpg *cpg)
+static struct clk_core * __init cpg_z_clk_register(struct rcar_gen2_cpg *cpg)
{
static const char *parent_name = "pll0";
struct clk_init_data init;
struct cpg_z_clk *zclk;
- struct clk *clk;
+ struct clk_core *clk;
zclk = kzalloc(sizeof(*zclk), GFP_KERNEL);
if (!zclk)
@@ -212,7 +212,7 @@ static const struct clk_div_table cpg_sd01_div_table[] = {
static u32 cpg_mode __initdata;
-static struct clk * __init
+static struct clk_core * __init
rcar_gen2_cpg_register_clock(struct device_node *np, struct rcar_gen2_cpg *cpg,
const struct cpg_pll_config *config,
const char *name)
@@ -279,7 +279,7 @@ static void __init rcar_gen2_cpg_clocks_init(struct device_node *np)
{
const struct cpg_pll_config *config;
struct rcar_gen2_cpg *cpg;
- struct clk **clks;
+ struct clk_core **clks;
unsigned int i;
int num_clks;
@@ -312,7 +312,7 @@ static void __init rcar_gen2_cpg_clocks_init(struct device_node *np)
for (i = 0; i < num_clks; ++i) {
const char *name;
- struct clk *clk;
+ struct clk_core *clk;
of_property_read_string_index(np, "clock-output-names", i,
&name);
diff --git a/drivers/clk/shmobile/clk-rz.c b/drivers/clk/shmobile/clk-rz.c
index 7e68e86..414e20e 100644
--- a/drivers/clk/shmobile/clk-rz.c
+++ b/drivers/clk/shmobile/clk-rz.c
@@ -28,7 +28,7 @@ struct rz_cpg {
* Initialization
*/
-static struct clk * __init
+static struct clk_core * __init
rz_cpg_register_clock(struct device_node *np, struct rz_cpg *cpg, const char *name)
{
u32 val;
@@ -67,7 +67,7 @@ rz_cpg_register_clock(struct device_node *np, struct rz_cpg *cpg, const char *na
static void __init rz_cpg_clocks_init(struct device_node *np)
{
struct rz_cpg *cpg;
- struct clk **clks;
+ struct clk_core **clks;
unsigned i;
int num_clks;
@@ -86,7 +86,7 @@ static void __init rz_cpg_clocks_init(struct device_node *np)
for (i = 0; i < num_clks; ++i) {
const char *name;
- struct clk *clk;
+ struct clk_core *clk;
of_property_read_string_index(np, "clock-output-names", i, &name);
diff --git a/drivers/clk/sirf/clk-atlas6.c b/drivers/clk/sirf/clk-atlas6.c
index d63b76c..3b07a02 100644
--- a/drivers/clk/sirf/clk-atlas6.c
+++ b/drivers/clk/sirf/clk-atlas6.c
@@ -10,7 +10,6 @@
#include <linux/module.h>
#include <linux/bitops.h>
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of_address.h>
@@ -113,7 +112,7 @@ static __initdata struct clk_hw *atlas6_clk_hw_array[maxclk] = {
&clk_cphif.hw,
};
-static struct clk *atlas6_clks[maxclk];
+static struct clk_core *atlas6_clks[maxclk];
static void __init atlas6_clk_init(struct device_node *np)
{
diff --git a/drivers/clk/sirf/clk-common.c b/drivers/clk/sirf/clk-common.c
index 37af51c..05f5040 100644
--- a/drivers/clk/sirf/clk-common.c
+++ b/drivers/clk/sirf/clk-common.c
@@ -165,9 +165,9 @@ static long cpu_clk_round_rate(struct clk_hw *hw, unsigned long rate,
* SiRF SoC has not cpu clock control,
* So bypass to it's parent pll.
*/
- struct clk *parent_clk = clk_get_parent(hw->clk);
- struct clk *pll_parent_clk = clk_get_parent(parent_clk);
- unsigned long pll_parent_rate = clk_get_rate(pll_parent_clk);
+ struct clk_core *parent_clk = clk_provider_get_parent(hw->clk);
+ struct clk_core *pll_parent_clk = clk_provider_get_parent(parent_clk);
+ unsigned long pll_parent_rate = clk_provider_get_rate(pll_parent_clk);
return pll_clk_round_rate(__clk_get_hw(parent_clk), rate, &pll_parent_rate);
}
@@ -178,7 +178,7 @@ static unsigned long cpu_clk_recalc_rate(struct clk_hw *hw,
* SiRF SoC has not cpu clock control,
* So return the parent pll rate.
*/
- struct clk *parent_clk = clk_get_parent(hw->clk);
+ struct clk_core *parent_clk = clk_provider_get_parent(hw->clk);
return __clk_get_rate(parent_clk);
}
@@ -403,34 +403,34 @@ static int cpu_clk_set_rate(struct clk_hw *hw, unsigned long rate,
unsigned long parent_rate)
{
int ret1, ret2;
- struct clk *cur_parent;
+ struct clk_core *cur_parent;
- if (rate == clk_get_rate(clk_pll1.hw.clk)) {
- ret1 = clk_set_parent(hw->clk, clk_pll1.hw.clk);
+ if (rate == clk_provider_get_rate(clk_pll1.hw.clk)) {
+ ret1 = clk_provider_set_parent(hw->clk, clk_pll1.hw.clk);
return ret1;
}
- if (rate == clk_get_rate(clk_pll2.hw.clk)) {
- ret1 = clk_set_parent(hw->clk, clk_pll2.hw.clk);
+ if (rate == clk_provider_get_rate(clk_pll2.hw.clk)) {
+ ret1 = clk_provider_set_parent(hw->clk, clk_pll2.hw.clk);
return ret1;
}
- if (rate == clk_get_rate(clk_pll3.hw.clk)) {
- ret1 = clk_set_parent(hw->clk, clk_pll3.hw.clk);
+ if (rate == clk_provider_get_rate(clk_pll3.hw.clk)) {
+ ret1 = clk_provider_set_parent(hw->clk, clk_pll3.hw.clk);
return ret1;
}
- cur_parent = clk_get_parent(hw->clk);
+ cur_parent = clk_provider_get_parent(hw->clk);
/* switch to tmp pll before setting parent clock's rate */
if (cur_parent == clk_pll1.hw.clk) {
- ret1 = clk_set_parent(hw->clk, clk_pll2.hw.clk);
+ ret1 = clk_provider_set_parent(hw->clk, clk_pll2.hw.clk);
BUG_ON(ret1);
}
- ret2 = clk_set_rate(clk_pll1.hw.clk, rate);
+ ret2 = clk_provider_set_rate(clk_pll1.hw.clk, rate);
- ret1 = clk_set_parent(hw->clk, clk_pll1.hw.clk);
+ ret1 = clk_provider_set_parent(hw->clk, clk_pll1.hw.clk);
return ret2 ? ret2 : ret1;
}
diff --git a/drivers/clk/sirf/clk-prima2.c b/drivers/clk/sirf/clk-prima2.c
index 6968e2e..869bc8c 100644
--- a/drivers/clk/sirf/clk-prima2.c
+++ b/drivers/clk/sirf/clk-prima2.c
@@ -10,7 +10,6 @@
#include <linux/module.h>
#include <linux/bitops.h>
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of_address.h>
@@ -112,7 +111,7 @@ static __initdata struct clk_hw *prima2_clk_hw_array[maxclk] = {
&clk_cphif.hw,
};
-static struct clk *prima2_clks[maxclk];
+static struct clk_core *prima2_clks[maxclk];
static void __init prima2_clk_init(struct device_node *np)
{
diff --git a/drivers/clk/socfpga/clk-gate.c b/drivers/clk/socfpga/clk-gate.c
index dd3a78c..5d00dee 100644
--- a/drivers/clk/socfpga/clk-gate.c
+++ b/drivers/clk/socfpga/clk-gate.c
@@ -15,7 +15,6 @@
* Based from clk-highbank.c
*
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/io.h>
@@ -188,7 +187,7 @@ static void __init __socfpga_gate_init(struct device_node *node,
u32 div_reg[3];
u32 clk_phase[2];
u32 fixed_div;
- struct clk *clk;
+ struct clk_core *clk;
struct socfpga_gate_clk *socfpga_clk;
const char *clk_name = node->name;
const char *parent_name[SOCFPGA_MAX_PARENTS];
diff --git a/drivers/clk/socfpga/clk-periph.c b/drivers/clk/socfpga/clk-periph.c
index 46531c3..1bcb275 100644
--- a/drivers/clk/socfpga/clk-periph.c
+++ b/drivers/clk/socfpga/clk-periph.c
@@ -15,7 +15,6 @@
* Based from clk-highbank.c
*
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/io.h>
@@ -53,7 +52,7 @@ static __init void __socfpga_periph_init(struct device_node *node,
const struct clk_ops *ops)
{
u32 reg;
- struct clk *clk;
+ struct clk_core *clk;
struct socfpga_periph_clk *periph_clk;
const char *clk_name = node->name;
const char *parent_name;
diff --git a/drivers/clk/socfpga/clk-pll.c b/drivers/clk/socfpga/clk-pll.c
index de6da95..ba7073f 100644
--- a/drivers/clk/socfpga/clk-pll.c
+++ b/drivers/clk/socfpga/clk-pll.c
@@ -15,7 +15,6 @@
* Based from clk-highbank.c
*
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/io.h>
@@ -81,11 +80,11 @@ static struct clk_ops clk_pll_ops = {
.get_parent = clk_pll_get_parent,
};
-static __init struct clk *__socfpga_pll_init(struct device_node *node,
+static __init struct clk_core *__socfpga_pll_init(struct device_node *node,
const struct clk_ops *ops)
{
u32 reg;
- struct clk *clk;
+ struct clk_core *clk;
struct socfpga_pll *pll_clk;
const char *clk_name = node->name;
const char *parent_name[SOCFPGA_MAX_PARENTS];
diff --git a/drivers/clk/spear/clk-aux-synth.c b/drivers/clk/spear/clk-aux-synth.c
index bdfb442..18334c3 100644
--- a/drivers/clk/spear/clk-aux-synth.c
+++ b/drivers/clk/spear/clk-aux-synth.c
@@ -134,14 +134,14 @@ static struct clk_ops clk_aux_ops = {
.set_rate = clk_aux_set_rate,
};
-struct clk *clk_register_aux(const char *aux_name, const char *gate_name,
+struct clk_core *clk_register_aux(const char *aux_name, const char *gate_name,
const char *parent_name, unsigned long flags, void __iomem *reg,
struct aux_clk_masks *masks, struct aux_rate_tbl *rtbl,
- u8 rtbl_cnt, spinlock_t *lock, struct clk **gate_clk)
+ u8 rtbl_cnt, spinlock_t *lock, struct clk_core **gate_clk)
{
struct clk_aux *aux;
struct clk_init_data init;
- struct clk *clk;
+ struct clk_core *clk;
if (!aux_name || !parent_name || !reg || !rtbl || !rtbl_cnt) {
pr_err("Invalid arguments passed");
@@ -177,7 +177,7 @@ struct clk *clk_register_aux(const char *aux_name, const char *gate_name,
goto free_aux;
if (gate_name) {
- struct clk *tgate_clk;
+ struct clk_core *tgate_clk;
tgate_clk = clk_register_gate(NULL, gate_name, aux_name,
CLK_SET_RATE_PARENT, reg,
diff --git a/drivers/clk/spear/clk-frac-synth.c b/drivers/clk/spear/clk-frac-synth.c
index dffd4ce..bce2c0e 100644
--- a/drivers/clk/spear/clk-frac-synth.c
+++ b/drivers/clk/spear/clk-frac-synth.c
@@ -122,13 +122,13 @@ static struct clk_ops clk_frac_ops = {
.set_rate = clk_frac_set_rate,
};
-struct clk *clk_register_frac(const char *name, const char *parent_name,
+struct clk_core *clk_register_frac(const char *name, const char *parent_name,
unsigned long flags, void __iomem *reg,
struct frac_rate_tbl *rtbl, u8 rtbl_cnt, spinlock_t *lock)
{
struct clk_init_data init;
struct clk_frac *frac;
- struct clk *clk;
+ struct clk_core *clk;
if (!name || !parent_name || !reg || !rtbl || !rtbl_cnt) {
pr_err("Invalid arguments passed");
diff --git a/drivers/clk/spear/clk-gpt-synth.c b/drivers/clk/spear/clk-gpt-synth.c
index 1afc18c..f8e13f3 100644
--- a/drivers/clk/spear/clk-gpt-synth.c
+++ b/drivers/clk/spear/clk-gpt-synth.c
@@ -111,13 +111,13 @@ static struct clk_ops clk_gpt_ops = {
.set_rate = clk_gpt_set_rate,
};
-struct clk *clk_register_gpt(const char *name, const char *parent_name, unsigned
+struct clk_core *clk_register_gpt(const char *name, const char *parent_name, unsigned
long flags, void __iomem *reg, struct gpt_rate_tbl *rtbl, u8
rtbl_cnt, spinlock_t *lock)
{
struct clk_init_data init;
struct clk_gpt *gpt;
- struct clk *clk;
+ struct clk_core *clk;
if (!name || !parent_name || !reg || !rtbl || !rtbl_cnt) {
pr_err("Invalid arguments passed");
diff --git a/drivers/clk/spear/clk-vco-pll.c b/drivers/clk/spear/clk-vco-pll.c
index 1b9b65b..226f2ec 100644
--- a/drivers/clk/spear/clk-vco-pll.c
+++ b/drivers/clk/spear/clk-vco-pll.c
@@ -272,16 +272,16 @@ static struct clk_ops clk_vco_ops = {
.set_rate = clk_vco_set_rate,
};
-struct clk *clk_register_vco_pll(const char *vco_name, const char *pll_name,
+struct clk_core *clk_register_vco_pll(const char *vco_name, const char *pll_name,
const char *vco_gate_name, const char *parent_name,
unsigned long flags, void __iomem *mode_reg, void __iomem
*cfg_reg, struct pll_rate_tbl *rtbl, u8 rtbl_cnt,
- spinlock_t *lock, struct clk **pll_clk,
- struct clk **vco_gate_clk)
+ spinlock_t *lock, struct clk_core **pll_clk,
+ struct clk_core **vco_gate_clk)
{
struct clk_vco *vco;
struct clk_pll *pll;
- struct clk *vco_clk, *tpll_clk, *tvco_gate_clk;
+ struct clk_core *vco_clk, *tpll_clk, *tvco_gate_clk;
struct clk_init_data vco_init, pll_init;
const char **vco_parent_name;
diff --git a/drivers/clk/spear/clk.h b/drivers/clk/spear/clk.h
index 9317376..777322e 100644
--- a/drivers/clk/spear/clk.h
+++ b/drivers/clk/spear/clk.h
@@ -110,22 +110,22 @@ typedef unsigned long (*clk_calc_rate)(struct clk_hw *hw, unsigned long prate,
int index);
/* clk register routines */
-struct clk *clk_register_aux(const char *aux_name, const char *gate_name,
+struct clk_core *clk_register_aux(const char *aux_name, const char *gate_name,
const char *parent_name, unsigned long flags, void __iomem *reg,
struct aux_clk_masks *masks, struct aux_rate_tbl *rtbl,
- u8 rtbl_cnt, spinlock_t *lock, struct clk **gate_clk);
-struct clk *clk_register_frac(const char *name, const char *parent_name,
+ u8 rtbl_cnt, spinlock_t *lock, struct clk_core **gate_clk);
+struct clk_core *clk_register_frac(const char *name, const char *parent_name,
unsigned long flags, void __iomem *reg,
struct frac_rate_tbl *rtbl, u8 rtbl_cnt, spinlock_t *lock);
-struct clk *clk_register_gpt(const char *name, const char *parent_name, unsigned
+struct clk_core *clk_register_gpt(const char *name, const char *parent_name, unsigned
long flags, void __iomem *reg, struct gpt_rate_tbl *rtbl, u8
rtbl_cnt, spinlock_t *lock);
-struct clk *clk_register_vco_pll(const char *vco_name, const char *pll_name,
+struct clk_core *clk_register_vco_pll(const char *vco_name, const char *pll_name,
const char *vco_gate_name, const char *parent_name,
unsigned long flags, void __iomem *mode_reg, void __iomem
*cfg_reg, struct pll_rate_tbl *rtbl, u8 rtbl_cnt,
- spinlock_t *lock, struct clk **pll_clk,
- struct clk **vco_gate_clk);
+ spinlock_t *lock, struct clk_core **pll_clk,
+ struct clk_core **vco_gate_clk);
long clk_round_rate_index(struct clk_hw *hw, unsigned long drate,
unsigned long parent_rate, clk_calc_rate calc_rate, u8 rtbl_cnt,
diff --git a/drivers/clk/spear/spear1310_clock.c b/drivers/clk/spear/spear1310_clock.c
index 4daa597..58206e0 100644
--- a/drivers/clk/spear/spear1310_clock.c
+++ b/drivers/clk/spear/spear1310_clock.c
@@ -11,7 +11,6 @@
* warranty of any kind, whether express or implied.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/err.h>
#include <linux/io.h>
@@ -385,7 +384,7 @@ static const char *tdm_parents[] = { "ras_pll3_clk", "gen_syn1_clk", };
void __init spear1310_clk_init(void __iomem *misc_base, void __iomem *ras_base)
{
- struct clk *clk, *clk1;
+ struct clk_core *clk, *clk1;
clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT,
32000);
diff --git a/drivers/clk/spear/spear1340_clock.c b/drivers/clk/spear/spear1340_clock.c
index 5a5c664..704301c 100644
--- a/drivers/clk/spear/spear1340_clock.c
+++ b/drivers/clk/spear/spear1340_clock.c
@@ -11,7 +11,6 @@
* warranty of any kind, whether express or implied.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/err.h>
#include <linux/io.h>
@@ -442,7 +441,7 @@ static const char *gen_synth2_3_parents[] = { "vco1div4_clk", "vco2div2_clk",
void __init spear1340_clk_init(void __iomem *misc_base)
{
- struct clk *clk, *clk1;
+ struct clk_core *clk, *clk1;
clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT,
32000);
diff --git a/drivers/clk/spear/spear3xx_clock.c b/drivers/clk/spear/spear3xx_clock.c
index bb5f387..40d1b08 100644
--- a/drivers/clk/spear/spear3xx_clock.c
+++ b/drivers/clk/spear/spear3xx_clock.c
@@ -9,7 +9,6 @@
* warranty of any kind, whether express or implied.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/err.h>
#include <linux/io.h>
@@ -140,7 +139,7 @@ static const char *ddr_parents[] = { "ahb_clk", "ahbmult2_clk", "none",
#ifdef CONFIG_MACH_SPEAR300
static void __init spear300_clk_init(void)
{
- struct clk *clk;
+ struct clk_core *clk;
clk = clk_register_fixed_factor(NULL, "clcd_clk", "ras_pll3_clk", 0,
1, 1);
@@ -170,7 +169,7 @@ static inline void spear300_clk_init(void) { }
#ifdef CONFIG_MACH_SPEAR310
static void __init spear310_clk_init(void)
{
- struct clk *clk;
+ struct clk_core *clk;
clk = clk_register_fixed_factor(NULL, "emi_clk", "ras_ahb_clk", 0, 1,
1);
@@ -246,9 +245,9 @@ static const char *smii0_parents[] = { "smii_125m_pad", "ras_pll2_clk",
static const char *uartx_parents[] = { "ras_syn1_gclk", "ras_apb_clk", };
static void __init spear320_clk_init(void __iomem *soc_config_base,
- struct clk *ras_apb_clk)
+ struct clk_core *ras_apb_clk)
{
- struct clk *clk;
+ struct clk_core *clk;
clk = clk_register_fixed_rate(NULL, "smii_125m_pad_clk", NULL,
CLK_IS_ROOT, 125000000);
@@ -344,7 +343,7 @@ static void __init spear320_clk_init(void __iomem *soc_config_base,
0, &_lock);
clk_register_clkdev(clk, NULL, "a3000000.serial");
/* Enforce ras_apb_clk */
- clk_set_parent(clk, ras_apb_clk);
+ clk_provider_set_parent(clk, ras_apb_clk);
clk = clk_register_mux(NULL, "uart2_clk", uartx_parents,
ARRAY_SIZE(uartx_parents),
@@ -353,7 +352,7 @@ static void __init spear320_clk_init(void __iomem *soc_config_base,
SPEAR320_UARTX_PCLK_MASK, 0, &_lock);
clk_register_clkdev(clk, NULL, "a4000000.serial");
/* Enforce ras_apb_clk */
- clk_set_parent(clk, ras_apb_clk);
+ clk_provider_set_parent(clk, ras_apb_clk);
clk = clk_register_mux(NULL, "uart3_clk", uartx_parents,
ARRAY_SIZE(uartx_parents),
@@ -384,12 +383,12 @@ static void __init spear320_clk_init(void __iomem *soc_config_base,
clk_register_clkdev(clk, NULL, "60100000.serial");
}
#else
-static inline void spear320_clk_init(void __iomem *sb, struct clk *rc) { }
+static inline void spear320_clk_init(void __iomem *sb, struct clk_core *rc) { }
#endif
void __init spear3xx_clk_init(void __iomem *misc_base, void __iomem *soc_config_base)
{
- struct clk *clk, *clk1, *ras_apb_clk;
+ struct clk_core *clk, *clk1, *ras_apb_clk;
clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT,
32000);
diff --git a/drivers/clk/spear/spear6xx_clock.c b/drivers/clk/spear/spear6xx_clock.c
index 4f649c9..364a8d3 100644
--- a/drivers/clk/spear/spear6xx_clock.c
+++ b/drivers/clk/spear/spear6xx_clock.c
@@ -9,7 +9,6 @@
* warranty of any kind, whether express or implied.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/io.h>
#include <linux/spinlock_types.h>
@@ -116,7 +115,7 @@ static struct gpt_rate_tbl gpt_rtbl[] = {
void __init spear6xx_clk_init(void __iomem *misc_base)
{
- struct clk *clk, *clk1;
+ struct clk_core *clk, *clk1;
clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT,
32000);
diff --git a/drivers/clk/st/clk-flexgen.c b/drivers/clk/st/clk-flexgen.c
index 2282cef..699f7a1 100644
--- a/drivers/clk/st/clk-flexgen.c
+++ b/drivers/clk/st/clk-flexgen.c
@@ -163,12 +163,12 @@ static const struct clk_ops flexgen_ops = {
.set_rate = flexgen_set_rate,
};
-struct clk *clk_register_flexgen(const char *name,
+struct clk_core *clk_register_flexgen(const char *name,
const char **parent_names, u8 num_parents,
void __iomem *reg, spinlock_t *lock, u32 idx,
unsigned long flexgen_flags) {
struct flexgen *fgxbar;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
u32 xbar_shift;
void __iomem *xbar_reg, *fdiv_reg;
@@ -223,8 +223,8 @@ struct clk *clk_register_flexgen(const char *name,
else
pr_debug("%s: parent %s rate %u\n",
__clk_get_name(clk),
- __clk_get_name(clk_get_parent(clk)),
- (unsigned int)clk_get_rate(clk));
+ __clk_get_name(clk_provider_get_parent(clk)),
+ (unsigned int)clk_provider_get_rate(clk));
return clk;
}
@@ -283,7 +283,7 @@ void __init st_of_flexgen_setup(struct device_node *np)
goto err;
}
- clk_data->clks = kcalloc(clk_data->clk_num, sizeof(struct clk *),
+ clk_data->clks = kcalloc(clk_data->clk_num, sizeof(struct clk_core *),
GFP_KERNEL);
if (!clk_data->clks)
goto err;
@@ -293,7 +293,7 @@ void __init st_of_flexgen_setup(struct device_node *np)
goto err;
for (i = 0; i < clk_data->clk_num; i++) {
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name;
if (of_property_read_string_index(np, "clock-output-names",
diff --git a/drivers/clk/st/clkgen-fsyn.c b/drivers/clk/st/clkgen-fsyn.c
index af94ed8..ceda1f2 100644
--- a/drivers/clk/st/clkgen-fsyn.c
+++ b/drivers/clk/st/clkgen-fsyn.c
@@ -614,13 +614,13 @@ static const struct clk_ops st_quadfs_pll_c32_ops = {
.set_rate = quadfs_pll_fs660c32_set_rate,
};
-static struct clk * __init st_clk_register_quadfs_pll(
+static struct clk_core * __init st_clk_register_quadfs_pll(
const char *name, const char *parent_name,
struct clkgen_quadfs_data *quadfs, void __iomem *reg,
spinlock_t *lock)
{
struct st_clk_quadfs_pll *pll;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
/*
@@ -1018,13 +1018,13 @@ static const struct clk_ops st_quadfs_ops = {
.recalc_rate = quadfs_recalc_rate,
};
-static struct clk * __init st_clk_register_quadfs_fsynth(
+static struct clk_core * __init st_clk_register_quadfs_fsynth(
const char *name, const char *parent_name,
struct clkgen_quadfs_data *quadfs, void __iomem *reg, u32 chan,
spinlock_t *lock)
{
struct st_clk_quadfs_fsynth *fs;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
/*
@@ -1102,7 +1102,7 @@ static void __init st_of_create_quadfs_fsynths(
return;
clk_data->clk_num = QUADFS_MAX_CHAN;
- clk_data->clks = kzalloc(QUADFS_MAX_CHAN * sizeof(struct clk *),
+ clk_data->clks = kzalloc(QUADFS_MAX_CHAN * sizeof(struct clk_core *),
GFP_KERNEL);
if (!clk_data->clks) {
@@ -1111,7 +1111,7 @@ static void __init st_of_create_quadfs_fsynths(
}
for (fschan = 0; fschan < QUADFS_MAX_CHAN; fschan++) {
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name;
if (of_property_read_string_index(np, "clock-output-names",
@@ -1136,8 +1136,8 @@ static void __init st_of_create_quadfs_fsynths(
clk_data->clks[fschan] = clk;
pr_debug("%s: parent %s rate %u\n",
__clk_get_name(clk),
- __clk_get_name(clk_get_parent(clk)),
- (unsigned int)clk_get_rate(clk));
+ __clk_get_name(clk_provider_get_parent(clk)),
+ (unsigned int)clk_provider_get_rate(clk));
}
}
@@ -1147,7 +1147,7 @@ static void __init st_of_create_quadfs_fsynths(
static void __init st_of_quadfs_setup(struct device_node *np)
{
const struct of_device_id *match;
- struct clk *clk;
+ struct clk_core *clk;
const char *pll_name, *clk_parent_name;
void __iomem *reg;
spinlock_t *lock;
@@ -1181,8 +1181,8 @@ static void __init st_of_quadfs_setup(struct device_node *np)
else
pr_debug("%s: parent %s rate %u\n",
__clk_get_name(clk),
- __clk_get_name(clk_get_parent(clk)),
- (unsigned int)clk_get_rate(clk));
+ __clk_get_name(clk_provider_get_parent(clk)),
+ (unsigned int)clk_provider_get_rate(clk));
st_of_create_quadfs_fsynths(np, pll_name,
(struct clkgen_quadfs_data *)match->data,
diff --git a/drivers/clk/st/clkgen-mux.c b/drivers/clk/st/clkgen-mux.c
index 79dc40b..d2a951f 100644
--- a/drivers/clk/st/clkgen-mux.c
+++ b/drivers/clk/st/clkgen-mux.c
@@ -215,7 +215,7 @@ static const struct clk_ops clkgena_divmux_ops = {
/**
* clk_register_genamux - register a genamux clock with the clock framework
*/
-struct clk *clk_register_genamux(const char *name,
+struct clk_core *clk_register_genamux(const char *name,
const char **parent_names, u8 num_parents,
void __iomem *reg,
const struct clkgena_divmux_data *muxdata,
@@ -227,7 +227,7 @@ struct clk *clk_register_genamux(const char *name,
const int mux_width = 2;
const int divider_width = 5;
struct clkgena_divmux *genamux;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
int i;
@@ -280,8 +280,8 @@ struct clk *clk_register_genamux(const char *name,
pr_debug("%s: parent %s rate %lu\n",
__clk_get_name(clk),
- __clk_get_name(clk_get_parent(clk)),
- clk_get_rate(clk));
+ __clk_get_name(clk_provider_get_parent(clk)),
+ clk_provider_get_rate(clk));
err:
return clk;
}
@@ -413,14 +413,14 @@ void __init st_of_clkgena_divmux_setup(struct device_node *np)
goto err;
clk_data->clk_num = data->num_outputs;
- clk_data->clks = kzalloc(clk_data->clk_num * sizeof(struct clk *),
+ clk_data->clks = kzalloc(clk_data->clk_num * sizeof(struct clk_core *),
GFP_KERNEL);
if (!clk_data->clks)
goto err;
for (i = 0; i < clk_data->clk_num; i++) {
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name;
if (of_property_read_string_index(np, "clock-output-names",
@@ -490,7 +490,7 @@ void __init st_of_clkgena_prediv_setup(struct device_node *np)
const struct of_device_id *match;
void __iomem *reg;
const char *parent_name, *clk_name;
- struct clk *clk;
+ struct clk_core *clk;
struct clkgena_prediv_data *data;
match = of_match_node(clkgena_prediv_of_match, np);
@@ -522,8 +522,8 @@ void __init st_of_clkgena_prediv_setup(struct device_node *np)
of_clk_add_provider(np, of_clk_src_simple_get, clk);
pr_debug("%s: parent %s rate %u\n",
__clk_get_name(clk),
- __clk_get_name(clk_get_parent(clk)),
- (unsigned int)clk_get_rate(clk));
+ __clk_get_name(clk_provider_get_parent(clk)),
+ (unsigned int)clk_provider_get_rate(clk));
return;
}
@@ -625,7 +625,7 @@ static struct of_device_id mux_of_match[] = {
void __init st_of_clkgen_mux_setup(struct device_node *np)
{
const struct of_device_id *match;
- struct clk *clk;
+ struct clk_core *clk;
void __iomem *reg;
const char **parents;
int num_parents;
@@ -662,8 +662,8 @@ void __init st_of_clkgen_mux_setup(struct device_node *np)
pr_debug("%s: parent %s rate %u\n",
__clk_get_name(clk),
- __clk_get_name(clk_get_parent(clk)),
- (unsigned int)clk_get_rate(clk));
+ __clk_get_name(clk_provider_get_parent(clk)),
+ (unsigned int)clk_provider_get_rate(clk));
of_clk_add_provider(np, of_clk_src_simple_get, clk);
@@ -726,14 +726,14 @@ void __init st_of_clkgen_vcc_setup(struct device_node *np)
goto err;
clk_data->clk_num = VCC_MAX_CHANNELS;
- clk_data->clks = kzalloc(clk_data->clk_num * sizeof(struct clk *),
+ clk_data->clks = kzalloc(clk_data->clk_num * sizeof(struct clk_core *),
GFP_KERNEL);
if (!clk_data->clks)
goto err;
for (i = 0; i < clk_data->clk_num; i++) {
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name;
struct clk_gate *gate;
struct clk_divider *div;
@@ -796,8 +796,8 @@ void __init st_of_clkgen_vcc_setup(struct device_node *np)
pr_debug("%s: parent %s rate %u\n",
__clk_get_name(clk),
- __clk_get_name(clk_get_parent(clk)),
- (unsigned int)clk_get_rate(clk));
+ __clk_get_name(clk_provider_get_parent(clk)),
+ (unsigned int)clk_provider_get_rate(clk));
clk_data->clks[i] = clk;
}
diff --git a/drivers/clk/st/clkgen-pll.c b/drivers/clk/st/clkgen-pll.c
index 29769d7..32bac02 100644
--- a/drivers/clk/st/clkgen-pll.c
+++ b/drivers/clk/st/clkgen-pll.c
@@ -390,13 +390,13 @@ static const struct clk_ops st_pll1200c32_ops = {
.recalc_rate = recalc_stm_pll1200c32,
};
-static struct clk * __init clkgen_pll_register(const char *parent_name,
+static struct clk_core * __init clkgen_pll_register(const char *parent_name,
struct clkgen_pll_data *pll_data,
void __iomem *reg,
const char *clk_name)
{
struct clkgen_pll *pll;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
pll = kzalloc(sizeof(*pll), GFP_KERNEL);
@@ -422,16 +422,16 @@ static struct clk * __init clkgen_pll_register(const char *parent_name,
pr_debug("%s: parent %s rate %lu\n",
__clk_get_name(clk),
- __clk_get_name(clk_get_parent(clk)),
- clk_get_rate(clk));
+ __clk_get_name(clk_provider_get_parent(clk)),
+ clk_provider_get_rate(clk));
return clk;
}
-static struct clk * __init clkgen_c65_lsdiv_register(const char *parent_name,
+static struct clk_core * __init clkgen_c65_lsdiv_register(const char *parent_name,
const char *clk_name)
{
- struct clk *clk;
+ struct clk_core *clk;
clk = clk_register_fixed_factor(NULL, clk_name, parent_name, 0, 1, 2);
if (IS_ERR(clk))
@@ -439,8 +439,8 @@ static struct clk * __init clkgen_c65_lsdiv_register(const char *parent_name,
pr_debug("%s: parent %s rate %lu\n",
__clk_get_name(clk),
- __clk_get_name(clk_get_parent(clk)),
- clk_get_rate(clk));
+ __clk_get_name(clk_provider_get_parent(clk)),
+ clk_provider_get_rate(clk));
return clk;
}
@@ -484,7 +484,7 @@ static void __init clkgena_c65_pll_setup(struct device_node *np)
return;
clk_data->clk_num = num_pll_outputs;
- clk_data->clks = kzalloc(clk_data->clk_num * sizeof(struct clk *),
+ clk_data->clks = kzalloc(clk_data->clk_num * sizeof(struct clk_core *),
GFP_KERNEL);
if (!clk_data->clks)
@@ -543,14 +543,14 @@ err:
CLK_OF_DECLARE(clkgena_c65_plls,
"st,clkgena-plls-c65", clkgena_c65_pll_setup);
-static struct clk * __init clkgen_odf_register(const char *parent_name,
+static struct clk_core * __init clkgen_odf_register(const char *parent_name,
void * __iomem reg,
struct clkgen_pll_data *pll_data,
int odf,
spinlock_t *odf_lock,
const char *odf_name)
{
- struct clk *clk;
+ struct clk_core *clk;
unsigned long flags;
struct clk_gate *gate;
struct clk_divider *div;
@@ -588,8 +588,8 @@ static struct clk * __init clkgen_odf_register(const char *parent_name,
pr_debug("%s: parent %s rate %lu\n",
__clk_get_name(clk),
- __clk_get_name(clk_get_parent(clk)),
- clk_get_rate(clk));
+ __clk_get_name(clk_provider_get_parent(clk)),
+ clk_provider_get_rate(clk));
return clk;
}
@@ -640,7 +640,7 @@ static struct of_device_id c32_pll_of_match[] = {
static void __init clkgen_c32_pll_setup(struct device_node *np)
{
const struct of_device_id *match;
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name, *pll_name;
void __iomem *pll_base;
int num_odfs, odf;
@@ -676,14 +676,14 @@ static void __init clkgen_c32_pll_setup(struct device_node *np)
return;
clk_data->clk_num = num_odfs;
- clk_data->clks = kzalloc(clk_data->clk_num * sizeof(struct clk *),
+ clk_data->clks = kzalloc(clk_data->clk_num * sizeof(struct clk_core *),
GFP_KERNEL);
if (!clk_data->clks)
goto err;
for (odf = 0; odf < num_odfs; odf++) {
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name;
if (of_property_read_string_index(np, "clock-output-names",
@@ -723,7 +723,7 @@ static struct of_device_id c32_gpu_pll_of_match[] = {
static void __init clkgengpu_c32_pll_setup(struct device_node *np)
{
const struct of_device_id *match;
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name;
void __iomem *reg;
const char *clk_name;
diff --git a/drivers/clk/sunxi/clk-a10-hosc.c b/drivers/clk/sunxi/clk-a10-hosc.c
index 0481d5d..c5e4c41 100644
--- a/drivers/clk/sunxi/clk-a10-hosc.c
+++ b/drivers/clk/sunxi/clk-a10-hosc.c
@@ -25,7 +25,7 @@ static DEFINE_SPINLOCK(hosc_lock);
static void __init sun4i_osc_clk_setup(struct device_node *node)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_fixed_rate *fixed;
struct clk_gate *gate;
const char *clk_name = node->name;
diff --git a/drivers/clk/sunxi/clk-a20-gmac.c b/drivers/clk/sunxi/clk-a20-gmac.c
index 5296fd6..63c7dd5 100644
--- a/drivers/clk/sunxi/clk-a20-gmac.c
+++ b/drivers/clk/sunxi/clk-a20-gmac.c
@@ -55,7 +55,7 @@ static DEFINE_SPINLOCK(gmac_lock);
static void __init sun7i_a20_gmac_clk_setup(struct device_node *node)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_mux *mux;
struct clk_gate *gate;
const char *clk_name = node->name;
diff --git a/drivers/clk/sunxi/clk-factors.c b/drivers/clk/sunxi/clk-factors.c
index 2057c8a..bb2d4b2 100644
--- a/drivers/clk/sunxi/clk-factors.c
+++ b/drivers/clk/sunxi/clk-factors.c
@@ -79,9 +79,9 @@ static long clk_factors_round_rate(struct clk_hw *hw, unsigned long rate,
static long clk_factors_determine_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *best_parent_rate,
- struct clk **best_parent_p)
+ struct clk_core **best_parent_p)
{
- struct clk *clk = hw->clk, *parent, *best_parent = NULL;
+ struct clk_core *clk = hw->clk, *parent, *best_parent = NULL;
int i, num_parents;
unsigned long parent_rate, best = 0, child_rate, best_child_rate = 0;
diff --git a/drivers/clk/sunxi/clk-sun6i-apb0-gates.c b/drivers/clk/sunxi/clk-sun6i-apb0-gates.c
index e10d052..f29b06e 100644
--- a/drivers/clk/sunxi/clk-sun6i-apb0-gates.c
+++ b/drivers/clk/sunxi/clk-sun6i-apb0-gates.c
@@ -74,7 +74,7 @@ static int sun6i_a31_apb0_gates_clk_probe(struct platform_device *pdev)
/* Worst-case size approximation and memory allocation */
ngates = find_last_bit(data->mask, SUN6I_APB0_GATES_MAX_SIZE);
clk_data->clks = devm_kcalloc(&pdev->dev, (ngates + 1),
- sizeof(struct clk *), GFP_KERNEL);
+ sizeof(struct clk_core *), GFP_KERNEL);
if (!clk_data->clks)
return -ENOMEM;
diff --git a/drivers/clk/sunxi/clk-sun6i-apb0.c b/drivers/clk/sunxi/clk-sun6i-apb0.c
index 1fa2337..5e4649e 100644
--- a/drivers/clk/sunxi/clk-sun6i-apb0.c
+++ b/drivers/clk/sunxi/clk-sun6i-apb0.c
@@ -35,7 +35,7 @@ static int sun6i_a31_apb0_clk_probe(struct platform_device *pdev)
const char *clk_parent;
struct resource *r;
void __iomem *reg;
- struct clk *clk;
+ struct clk_core *clk;
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
reg = devm_ioremap_resource(&pdev->dev, r);
diff --git a/drivers/clk/sunxi/clk-sun6i-ar100.c b/drivers/clk/sunxi/clk-sun6i-ar100.c
index eca8ca0..984d5d0 100644
--- a/drivers/clk/sunxi/clk-sun6i-ar100.c
+++ b/drivers/clk/sunxi/clk-sun6i-ar100.c
@@ -46,7 +46,7 @@ static unsigned long ar100_recalc_rate(struct clk_hw *hw,
static long ar100_determine_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *best_parent_rate,
- struct clk **best_parent_clk)
+ struct clk_core **best_parent_clk)
{
int nparents = __clk_get_num_parents(hw->clk);
long best_rate = -EINVAL;
@@ -57,7 +57,7 @@ static long ar100_determine_rate(struct clk_hw *hw, unsigned long rate,
for (i = 0; i < nparents; i++) {
unsigned long parent_rate;
unsigned long tmp_rate;
- struct clk *parent;
+ struct clk_core *parent;
unsigned long div;
int shift;
@@ -176,7 +176,7 @@ static int sun6i_a31_ar100_clk_probe(struct platform_device *pdev)
struct clk_init_data init;
struct ar100_clk *ar100;
struct resource *r;
- struct clk *clk;
+ struct clk_core *clk;
int nparents;
int i;
diff --git a/drivers/clk/sunxi/clk-sun8i-apb0.c b/drivers/clk/sunxi/clk-sun8i-apb0.c
index 1f5ba9b..fa308fd 100644
--- a/drivers/clk/sunxi/clk-sun8i-apb0.c
+++ b/drivers/clk/sunxi/clk-sun8i-apb0.c
@@ -26,7 +26,7 @@ static int sun8i_a23_apb0_clk_probe(struct platform_device *pdev)
const char *clk_parent;
struct resource *r;
void __iomem *reg;
- struct clk *clk;
+ struct clk_core *clk;
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
reg = devm_ioremap_resource(&pdev->dev, r);
diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
index b654b7b..44c4470 100644
--- a/drivers/clk/sunxi/clk-sunxi.c
+++ b/drivers/clk/sunxi/clk-sunxi.c
@@ -403,7 +403,7 @@ static void sun7i_a20_get_out_factors(u32 *freq, u32 parent_rate,
* clk_sunxi_mmc_phase_control() - configures MMC clock phase control
*/
-void clk_sunxi_mmc_phase_control(struct clk *clk, u8 sample, u8 output)
+void clk_sunxi_mmc_phase_control(struct clk_core *clk, u8 sample, u8 output)
{
#define to_clk_composite(_hw) container_of(_hw, struct clk_composite, hw)
#define to_clk_factors(_hw) container_of(_hw, struct clk_factors, hw)
@@ -582,10 +582,10 @@ static const struct factors_data sun7i_a20_out_data __initconst = {
.getter = sun7i_a20_get_out_factors,
};
-static struct clk * __init sunxi_factors_clk_setup(struct device_node *node,
+static struct clk_core * __init sunxi_factors_clk_setup(struct device_node *node,
const struct factors_data *data)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_factors *factors;
struct clk_gate *gate = NULL;
struct clk_mux *mux = NULL;
@@ -695,7 +695,7 @@ static const struct mux_data sun4i_apb1_mux_data __initconst = {
static void __init sunxi_mux_clk_setup(struct device_node *node,
struct mux_data *data)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name = node->name;
const char *parents[SUNXI_MAX_PARENTS];
void __iomem *reg;
@@ -777,7 +777,7 @@ static const struct div_data sun6i_a31_apb2_div_data __initconst = {
static void __init sunxi_divider_clk_setup(struct device_node *node,
struct div_data *data)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name = node->name;
const char *clk_parent;
void __iomem *reg;
@@ -976,7 +976,7 @@ static void __init sunxi_gates_clk_setup(struct device_node *node,
clk_data = kmalloc(sizeof(struct clk_onecell_data), GFP_KERNEL);
if (!clk_data)
return;
- clk_data->clks = kzalloc((qty+1) * sizeof(struct clk *), GFP_KERNEL);
+ clk_data->clks = kzalloc((qty+1) * sizeof(struct clk_core *), GFP_KERNEL);
if (!clk_data->clks) {
kfree(clk_data);
return;
@@ -1078,7 +1078,7 @@ static void __init sunxi_divs_clk_setup(struct device_node *node,
struct clk_onecell_data *clk_data;
const char *parent;
const char *clk_name;
- struct clk **clks, *pclk;
+ struct clk_core **clks, *pclk;
struct clk_hw *gate_hw, *rate_hw;
const struct clk_ops *rate_ops;
struct clk_gate *gate = NULL;
@@ -1291,10 +1291,10 @@ static void __init sunxi_init_clocks(const char *clocks[], int nclocks)
/* Protect the clocks that needs to stay on */
for (i = 0; i < nclocks; i++) {
- struct clk *clk = clk_get(NULL, clocks[i]);
+ struct clk_core *clk = clk_provider_get(NULL, clocks[i]);
if (!IS_ERR(clk))
- clk_prepare_enable(clk);
+ clk_provider_prepare_enable(clk);
}
}
diff --git a/drivers/clk/tegra/clk-audio-sync.c b/drivers/clk/tegra/clk-audio-sync.c
index c0f7843..53c3488 100644
--- a/drivers/clk/tegra/clk-audio-sync.c
+++ b/drivers/clk/tegra/clk-audio-sync.c
@@ -54,12 +54,12 @@ const struct clk_ops tegra_clk_sync_source_ops = {
.recalc_rate = clk_sync_source_recalc_rate,
};
-struct clk *tegra_clk_register_sync_source(const char *name,
+struct clk_core *tegra_clk_register_sync_source(const char *name,
unsigned long rate, unsigned long max_rate)
{
struct tegra_clk_sync_source *sync;
struct clk_init_data init;
- struct clk *clk;
+ struct clk_core *clk;
sync = kzalloc(sizeof(*sync), GFP_KERNEL);
if (!sync) {
diff --git a/drivers/clk/tegra/clk-divider.c b/drivers/clk/tegra/clk-divider.c
index 290f9c1..c69a728 100644
--- a/drivers/clk/tegra/clk-divider.c
+++ b/drivers/clk/tegra/clk-divider.c
@@ -19,7 +19,6 @@
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/clk-provider.h>
-#include <linux/clk.h>
#include "clk.h"
@@ -147,13 +146,13 @@ const struct clk_ops tegra_clk_frac_div_ops = {
.round_rate = clk_frac_div_round_rate,
};
-struct clk *tegra_clk_register_divider(const char *name,
+struct clk_core *tegra_clk_register_divider(const char *name,
const char *parent_name, void __iomem *reg,
unsigned long flags, u8 clk_divider_flags, u8 shift, u8 width,
u8 frac_width, spinlock_t *lock)
{
struct tegra_clk_frac_div *divider;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
divider = kzalloc(sizeof(*divider), GFP_KERNEL);
diff --git a/drivers/clk/tegra/clk-periph-gate.c b/drivers/clk/tegra/clk-periph-gate.c
index 0aa8830..d59200f 100644
--- a/drivers/clk/tegra/clk-periph-gate.c
+++ b/drivers/clk/tegra/clk-periph-gate.c
@@ -14,7 +14,6 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/slab.h>
#include <linux/io.h>
@@ -128,12 +127,12 @@ const struct clk_ops tegra_clk_periph_gate_ops = {
.disable = clk_periph_disable,
};
-struct clk *tegra_clk_register_periph_gate(const char *name,
+struct clk_core *tegra_clk_register_periph_gate(const char *name,
const char *parent_name, u8 gate_flags, void __iomem *clk_base,
unsigned long flags, int clk_num, int *enable_refcnt)
{
struct tegra_clk_periph_gate *gate;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
struct tegra_clk_periph_regs *pregs;
diff --git a/drivers/clk/tegra/clk-periph.c b/drivers/clk/tegra/clk-periph.c
index 9e899c18..34a60fd 100644
--- a/drivers/clk/tegra/clk-periph.c
+++ b/drivers/clk/tegra/clk-periph.c
@@ -14,7 +14,6 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/export.h>
#include <linux/slab.h>
@@ -138,13 +137,13 @@ static const struct clk_ops tegra_clk_periph_no_gate_ops = {
.set_rate = clk_periph_set_rate,
};
-static struct clk *_tegra_clk_register_periph(const char *name,
+static struct clk_core *_tegra_clk_register_periph(const char *name,
const char **parent_names, int num_parents,
struct tegra_clk_periph *periph,
void __iomem *clk_base, u32 offset,
unsigned long flags)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
struct tegra_clk_periph_regs *bank;
bool div = !(periph->gate.flags & TEGRA_PERIPH_NO_DIV);
@@ -186,7 +185,7 @@ static struct clk *_tegra_clk_register_periph(const char *name,
return clk;
}
-struct clk *tegra_clk_register_periph(const char *name,
+struct clk_core *tegra_clk_register_periph(const char *name,
const char **parent_names, int num_parents,
struct tegra_clk_periph *periph, void __iomem *clk_base,
u32 offset, unsigned long flags)
@@ -195,7 +194,7 @@ struct clk *tegra_clk_register_periph(const char *name,
periph, clk_base, offset, flags);
}
-struct clk *tegra_clk_register_periph_nodiv(const char *name,
+struct clk_core *tegra_clk_register_periph_nodiv(const char *name,
const char **parent_names, int num_parents,
struct tegra_clk_periph *periph, void __iomem *clk_base,
u32 offset)
diff --git a/drivers/clk/tegra/clk-pll-out.c b/drivers/clk/tegra/clk-pll-out.c
index 3598987..3adbc24 100644
--- a/drivers/clk/tegra/clk-pll-out.c
+++ b/drivers/clk/tegra/clk-pll-out.c
@@ -20,7 +20,6 @@
#include <linux/delay.h>
#include <linux/slab.h>
#include <linux/clk-provider.h>
-#include <linux/clk.h>
#include "clk.h"
@@ -87,13 +86,13 @@ const struct clk_ops tegra_clk_pll_out_ops = {
.disable = clk_pll_out_disable,
};
-struct clk *tegra_clk_register_pll_out(const char *name,
+struct clk_core *tegra_clk_register_pll_out(const char *name,
const char *parent_name, void __iomem *reg, u8 enb_bit_idx,
u8 rst_bit_idx, unsigned long flags, u8 pll_out_flags,
spinlock_t *lock)
{
struct tegra_clk_pll_out *pll_out;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
pll_out = kzalloc(sizeof(*pll_out), GFP_KERNEL);
diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c
index c7c6d8f..aa18eab 100644
--- a/drivers/clk/tegra/clk-pll.c
+++ b/drivers/clk/tegra/clk-pll.c
@@ -19,7 +19,6 @@
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/clk-provider.h>
-#include <linux/clk.h>
#include "clk.h"
@@ -729,7 +728,7 @@ static int clk_plle_training(struct tegra_clk_pll *pll)
static int clk_plle_enable(struct clk_hw *hw)
{
struct tegra_clk_pll *pll = to_clk_pll(hw);
- unsigned long input_rate = clk_get_rate(clk_get_parent(hw->clk));
+ unsigned long input_rate = clk_provider_get_rate(clk_provider_get_parent(hw->clk));
struct tegra_clk_pll_freq_table sel;
u32 val;
int err;
@@ -1033,7 +1032,7 @@ static int clk_pllm_set_rate(struct clk_hw *hw, unsigned long rate,
state = clk_pll_is_enabled(hw);
if (state) {
- if (rate != clk_get_rate(hw->clk)) {
+ if (rate != clk_provider_get_rate(hw->clk)) {
pr_err("%s: Cannot change active PLLM\n", __func__);
ret = -EINVAL;
goto out;
@@ -1285,7 +1284,7 @@ static int clk_plle_tegra114_enable(struct clk_hw *hw)
u32 val;
int ret;
unsigned long flags = 0;
- unsigned long input_rate = clk_get_rate(clk_get_parent(hw->clk));
+ unsigned long input_rate = clk_provider_get_rate(clk_provider_get_parent(hw->clk));
if (_get_table_rate(hw, &sel, pll->params->fixed_rate, input_rate))
return -EINVAL;
@@ -1430,7 +1429,7 @@ static struct tegra_clk_pll *_tegra_init_pll(void __iomem *clk_base,
return pll;
}
-static struct clk *_tegra_clk_register_pll(struct tegra_clk_pll *pll,
+static struct clk_core *_tegra_clk_register_pll(struct tegra_clk_pll *pll,
const char *name, const char *parent_name, unsigned long flags,
const struct clk_ops *ops)
{
@@ -1448,13 +1447,13 @@ static struct clk *_tegra_clk_register_pll(struct tegra_clk_pll *pll,
return clk_register(NULL, &pll->hw);
}
-struct clk *tegra_clk_register_pll(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_pll(const char *name, const char *parent_name,
void __iomem *clk_base, void __iomem *pmc,
unsigned long flags, struct tegra_clk_pll_params *pll_params,
spinlock_t *lock)
{
struct tegra_clk_pll *pll;
- struct clk *clk;
+ struct clk_core *clk;
pll_params->flags |= TEGRA_PLL_BYPASS;
pll_params->flags |= TEGRA_PLL_HAS_LOCK_ENABLE;
@@ -1479,13 +1478,13 @@ static struct div_nmp pll_e_nmp = {
.divp_width = PLLE_BASE_DIVP_WIDTH,
};
-struct clk *tegra_clk_register_plle(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_plle(const char *name, const char *parent_name,
void __iomem *clk_base, void __iomem *pmc,
unsigned long flags, struct tegra_clk_pll_params *pll_params,
spinlock_t *lock)
{
struct tegra_clk_pll *pll;
- struct clk *clk;
+ struct clk_core *clk;
pll_params->flags |= TEGRA_PLL_LOCK_MISC | TEGRA_PLL_BYPASS;
pll_params->flags |= TEGRA_PLL_HAS_LOCK_ENABLE;
@@ -1550,14 +1549,14 @@ static const struct clk_ops tegra_clk_plle_tegra114_ops = {
};
-struct clk *tegra_clk_register_pllxc(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_pllxc(const char *name, const char *parent_name,
void __iomem *clk_base, void __iomem *pmc,
unsigned long flags,
struct tegra_clk_pll_params *pll_params,
spinlock_t *lock)
{
struct tegra_clk_pll *pll;
- struct clk *clk, *parent;
+ struct clk_core *clk, *parent;
unsigned long parent_rate;
int err;
u32 val, val_iddq;
@@ -1603,7 +1602,7 @@ struct clk *tegra_clk_register_pllxc(const char *name, const char *parent_name,
return clk;
}
-struct clk *tegra_clk_register_pllre(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_pllre(const char *name, const char *parent_name,
void __iomem *clk_base, void __iomem *pmc,
unsigned long flags,
struct tegra_clk_pll_params *pll_params,
@@ -1611,7 +1610,7 @@ struct clk *tegra_clk_register_pllre(const char *name, const char *parent_name,
{
u32 val;
struct tegra_clk_pll *pll;
- struct clk *clk;
+ struct clk_core *clk;
pll_params->flags |= TEGRA_PLL_HAS_LOCK_ENABLE | TEGRA_PLL_LOCK_MISC;
@@ -1649,14 +1648,14 @@ struct clk *tegra_clk_register_pllre(const char *name, const char *parent_name,
return clk;
}
-struct clk *tegra_clk_register_pllm(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_pllm(const char *name, const char *parent_name,
void __iomem *clk_base, void __iomem *pmc,
unsigned long flags,
struct tegra_clk_pll_params *pll_params,
spinlock_t *lock)
{
struct tegra_clk_pll *pll;
- struct clk *clk, *parent;
+ struct clk_core *clk, *parent;
unsigned long parent_rate;
if (!pll_params->pdiv_tohw)
@@ -1688,13 +1687,13 @@ struct clk *tegra_clk_register_pllm(const char *name, const char *parent_name,
return clk;
}
-struct clk *tegra_clk_register_pllc(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_pllc(const char *name, const char *parent_name,
void __iomem *clk_base, void __iomem *pmc,
unsigned long flags,
struct tegra_clk_pll_params *pll_params,
spinlock_t *lock)
{
- struct clk *parent, *clk;
+ struct clk_core *parent, *clk;
struct pdiv_map *p_tohw = pll_params->pdiv_tohw;
struct tegra_clk_pll *pll;
struct tegra_clk_pll_freq_table cfg;
@@ -1762,14 +1761,14 @@ struct clk *tegra_clk_register_pllc(const char *name, const char *parent_name,
return clk;
}
-struct clk *tegra_clk_register_plle_tegra114(const char *name,
+struct clk_core *tegra_clk_register_plle_tegra114(const char *name,
const char *parent_name,
void __iomem *clk_base, unsigned long flags,
struct tegra_clk_pll_params *pll_params,
spinlock_t *lock)
{
struct tegra_clk_pll *pll;
- struct clk *clk;
+ struct clk_core *clk;
u32 val, val_aux;
pll_params->flags |= TEGRA_PLL_HAS_LOCK_ENABLE;
@@ -1812,13 +1811,13 @@ static const struct clk_ops tegra_clk_pllss_ops = {
.set_rate = clk_pllxc_set_rate,
};
-struct clk *tegra_clk_register_pllss(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_pllss(const char *name, const char *parent_name,
void __iomem *clk_base, unsigned long flags,
struct tegra_clk_pll_params *pll_params,
spinlock_t *lock)
{
struct tegra_clk_pll *pll;
- struct clk *clk, *parent;
+ struct clk_core *clk, *parent;
struct tegra_clk_pll_freq_table cfg;
unsigned long parent_rate;
u32 val;
diff --git a/drivers/clk/tegra/clk-super.c b/drivers/clk/tegra/clk-super.c
index 2fd924d..0d11346 100644
--- a/drivers/clk/tegra/clk-super.c
+++ b/drivers/clk/tegra/clk-super.c
@@ -20,7 +20,6 @@
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/clk-provider.h>
-#include <linux/clk.h>
#include "clk.h"
@@ -127,13 +126,13 @@ const struct clk_ops tegra_clk_super_ops = {
.set_parent = clk_super_set_parent,
};
-struct clk *tegra_clk_register_super_mux(const char *name,
+struct clk_core *tegra_clk_register_super_mux(const char *name,
const char **parent_names, u8 num_parents,
unsigned long flags, void __iomem *reg, u8 clk_super_flags,
u8 width, u8 pllx_index, u8 div2_index, spinlock_t *lock)
{
struct tegra_clk_super_mux *super;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
super = kzalloc(sizeof(*super), GFP_KERNEL);
diff --git a/drivers/clk/tegra/clk-tegra-audio.c b/drivers/clk/tegra/clk-tegra-audio.c
index 5c38aab..038a22e 100644
--- a/drivers/clk/tegra/clk-tegra-audio.c
+++ b/drivers/clk/tegra/clk-tegra-audio.c
@@ -15,7 +15,6 @@
*/
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
#include <linux/of_address.h>
@@ -128,8 +127,8 @@ void __init tegra_audio_clk_init(void __iomem *clk_base,
void __iomem *pmc_base, struct tegra_clk *tegra_clks,
struct tegra_clk_pll_params *pll_a_params)
{
- struct clk *clk;
- struct clk **dt_clk;
+ struct clk_core *clk;
+ struct clk_core **dt_clk;
int i;
/* PLLA */
diff --git a/drivers/clk/tegra/clk-tegra-fixed.c b/drivers/clk/tegra/clk-tegra-fixed.c
index f3b7738..5ee486a 100644
--- a/drivers/clk/tegra/clk-tegra-fixed.c
+++ b/drivers/clk/tegra/clk-tegra-fixed.c
@@ -15,7 +15,6 @@
*/
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
#include <linux/of_address.h>
@@ -36,8 +35,8 @@ int __init tegra_osc_clk_init(void __iomem *clk_base,
unsigned long *osc_freq,
unsigned long *pll_ref_freq)
{
- struct clk *clk;
- struct clk **dt_clk;
+ struct clk_core *clk;
+ struct clk_core **dt_clk;
u32 val, pll_ref_div;
unsigned osc_idx;
@@ -81,8 +80,8 @@ int __init tegra_osc_clk_init(void __iomem *clk_base,
void __init tegra_fixed_clk_init(struct tegra_clk *tegra_clks)
{
- struct clk *clk;
- struct clk **dt_clk;
+ struct clk_core *clk;
+ struct clk_core **dt_clk;
/* clk_32k */
dt_clk = tegra_lookup_dt_id(tegra_clk_clk_32k, tegra_clks);
diff --git a/drivers/clk/tegra/clk-tegra-periph.c b/drivers/clk/tegra/clk-tegra-periph.c
index 37f32c4..5e17ad4 100644
--- a/drivers/clk/tegra/clk-tegra-periph.c
+++ b/drivers/clk/tegra/clk-tegra-periph.c
@@ -15,7 +15,6 @@
*/
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/of.h>
@@ -585,8 +584,8 @@ static void __init periph_clk_init(void __iomem *clk_base,
struct tegra_clk *tegra_clks)
{
int i;
- struct clk *clk;
- struct clk **dt_clk;
+ struct clk_core *clk;
+ struct clk_core **dt_clk;
for (i = 0; i < ARRAY_SIZE(periph_clks); i++) {
struct tegra_clk_periph_regs *bank;
@@ -615,8 +614,8 @@ static void __init gate_clk_init(void __iomem *clk_base,
struct tegra_clk *tegra_clks)
{
int i;
- struct clk *clk;
- struct clk **dt_clk;
+ struct clk_core *clk;
+ struct clk_core **dt_clk;
for (i = 0; i < ARRAY_SIZE(gate_clks); i++) {
struct tegra_periph_init_data *data;
@@ -640,8 +639,8 @@ static void __init init_pllp(void __iomem *clk_base, void __iomem *pmc_base,
struct tegra_clk *tegra_clks,
struct tegra_clk_pll_params *pll_params)
{
- struct clk *clk;
- struct clk **dt_clk;
+ struct clk_core *clk;
+ struct clk_core **dt_clk;
int i;
dt_clk = tegra_lookup_dt_id(tegra_clk_pll_p, tegra_clks);
diff --git a/drivers/clk/tegra/clk-tegra-pmc.c b/drivers/clk/tegra/clk-tegra-pmc.c
index 08b21c1..ddd39ca 100644
--- a/drivers/clk/tegra/clk-tegra-pmc.c
+++ b/drivers/clk/tegra/clk-tegra-pmc.c
@@ -15,7 +15,6 @@
*/
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/of.h>
@@ -82,8 +81,8 @@ static struct pmc_clk_init_data pmc_clks[] = {
void __init tegra_pmc_clk_init(void __iomem *pmc_base,
struct tegra_clk *tegra_clks)
{
- struct clk *clk;
- struct clk **dt_clk;
+ struct clk_core *clk;
+ struct clk_core **dt_clk;
int i;
for (i = 0; i < ARRAY_SIZE(pmc_clks); i++) {
diff --git a/drivers/clk/tegra/clk-tegra-super-gen4.c b/drivers/clk/tegra/clk-tegra-super-gen4.c
index feb3201..9d1cdaa 100644
--- a/drivers/clk/tegra/clk-tegra-super-gen4.c
+++ b/drivers/clk/tegra/clk-tegra-super-gen4.c
@@ -15,7 +15,6 @@
*/
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
#include <linux/of_address.h>
@@ -53,8 +52,8 @@ static const char *cclk_lp_parents[] = { "clk_m", "pll_c", "clk_32k", "pll_m",
static void __init tegra_sclk_init(void __iomem *clk_base,
struct tegra_clk *tegra_clks)
{
- struct clk *clk;
- struct clk **dt_clk;
+ struct clk_core *clk;
+ struct clk_core **dt_clk;
/* SCLK */
dt_clk = tegra_lookup_dt_id(tegra_clk_sclk, tegra_clks);
@@ -99,8 +98,8 @@ void __init tegra_super_clk_gen4_init(void __iomem *clk_base,
struct tegra_clk *tegra_clks,
struct tegra_clk_pll_params *params)
{
- struct clk *clk;
- struct clk **dt_clk;
+ struct clk_core *clk;
+ struct clk_core **dt_clk;
/* CCLKG */
dt_clk = tegra_lookup_dt_id(tegra_clk_cclk_g, tegra_clks);
diff --git a/drivers/clk/tegra/clk-tegra114.c b/drivers/clk/tegra/clk-tegra114.c
index f760f31..00a2897 100644
--- a/drivers/clk/tegra/clk-tegra114.c
+++ b/drivers/clk/tegra/clk-tegra114.c
@@ -15,7 +15,6 @@
*/
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/of.h>
@@ -936,14 +935,14 @@ static u32 mux_pllm_pllc2_c_c3_pllp_plla_idx[] = {
[0] = 0, [1] = 1, [2] = 2, [3] = 3, [4] = 4, [5] = 6,
};
-static struct clk **clks;
+static struct clk_core **clks;
static unsigned long osc_freq;
static unsigned long pll_ref_freq;
static int __init tegra114_osc_clk_init(void __iomem *clk_base)
{
- struct clk *clk;
+ struct clk_core *clk;
u32 val, pll_ref_div;
val = readl_relaxed(clk_base + OSC_CTRL);
@@ -973,7 +972,7 @@ static int __init tegra114_osc_clk_init(void __iomem *clk_base)
static void __init tegra114_fixed_clk_init(void __iomem *clk_base)
{
- struct clk *clk;
+ struct clk_core *clk;
/* clk_32k */
clk = clk_register_fixed_rate(NULL, "clk_32k", NULL, CLK_IS_ROOT,
@@ -1078,7 +1077,7 @@ static void __init tegra114_pll_init(void __iomem *clk_base,
void __iomem *pmc)
{
u32 val;
- struct clk *clk;
+ struct clk_core *clk;
/* PLLC */
clk = tegra_clk_register_pllxc("pll_c", "pll_ref", clk_base,
@@ -1200,7 +1199,7 @@ static struct tegra_periph_init_data tegra_periph_clk_list[] = {
static __init void tegra114_periph_clk_init(void __iomem *clk_base,
void __iomem *pmc_base)
{
- struct clk *clk;
+ struct clk_core *clk;
struct tegra_periph_init_data *data;
int i;
diff --git a/drivers/clk/tegra/clk-tegra124.c b/drivers/clk/tegra/clk-tegra124.c
index 9525c68..bf481c8 100644
--- a/drivers/clk/tegra/clk-tegra124.c
+++ b/drivers/clk/tegra/clk-tegra124.c
@@ -15,7 +15,6 @@
*/
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/of.h>
@@ -1017,7 +1016,7 @@ static struct tegra_devclk devclks[] __initdata = {
{ .dev_id = "timer", .dt_id = TEGRA124_CLK_TIMER },
};
-static struct clk **clks;
+static struct clk_core **clks;
static void tegra124_utmi_param_configure(void __iomem *clk_base)
{
@@ -1104,7 +1103,7 @@ static void tegra124_utmi_param_configure(void __iomem *clk_base)
static __init void tegra124_periph_clk_init(void __iomem *clk_base,
void __iomem *pmc_base)
{
- struct clk *clk;
+ struct clk_core *clk;
/* xusb_ss_div2 */
clk = clk_register_fixed_factor(NULL, "xusb_ss_div2", "xusb_ss_src", 0,
@@ -1148,7 +1147,7 @@ static void __init tegra124_pll_init(void __iomem *clk_base,
void __iomem *pmc)
{
u32 val;
- struct clk *clk;
+ struct clk_core *clk;
/* PLLC */
clk = tegra_clk_register_pllxc("pll_c", "pll_ref", clk_base,
diff --git a/drivers/clk/tegra/clk-tegra20.c b/drivers/clk/tegra/clk-tegra20.c
index dace2b1..6e7d5e2 100644
--- a/drivers/clk/tegra/clk-tegra20.c
+++ b/drivers/clk/tegra/clk-tegra20.c
@@ -15,7 +15,6 @@
*/
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/of.h>
@@ -162,7 +161,7 @@ static void __iomem *pmc_base;
_clk_num, _gate_flags, \
_clk_id)
-static struct clk **clks;
+static struct clk_core **clks;
static struct tegra_clk_pll_freq_table pll_c_freq_table[] = {
{ 12000000, 600000000, 600, 12, 0, 8 },
@@ -633,7 +632,7 @@ static unsigned int tegra20_get_pll_ref_div(void)
static void tegra20_pll_init(void)
{
- struct clk *clk;
+ struct clk_core *clk;
/* PLLC */
clk = tegra_clk_register_pll("pll_c", "pll_ref", clk_base, NULL, 0,
@@ -713,7 +712,7 @@ static const char *sclk_parents[] = { "clk_m", "pll_c_out1", "pll_p_out4",
static void tegra20_super_clk_init(void)
{
- struct clk *clk;
+ struct clk_core *clk;
/* CCLK */
clk = tegra_clk_register_super_mux("cclk", cclk_parents,
@@ -738,7 +737,7 @@ static const char *audio_parents[] = {"spdif_in", "i2s1", "i2s2", "unused",
static void __init tegra20_audio_clk_init(void)
{
- struct clk *clk;
+ struct clk_core *clk;
/* audio */
clk = clk_register_mux(NULL, "audio_mux", audio_parents,
@@ -800,7 +799,7 @@ static struct tegra_periph_init_data tegra_periph_nodiv_clk_list[] = {
static void __init tegra20_periph_clk_init(void)
{
struct tegra_periph_init_data *data;
- struct clk *clk;
+ struct clk_core *clk;
int i;
/* ac97 */
@@ -871,7 +870,7 @@ static void __init tegra20_periph_clk_init(void)
static void __init tegra20_osc_clk_init(void)
{
- struct clk *clk;
+ struct clk_core *clk;
unsigned long input_freq;
unsigned int pll_ref_div;
diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c
index 5bbacd0..1e9f733 100644
--- a/drivers/clk/tegra/clk-tegra30.c
+++ b/drivers/clk/tegra/clk-tegra30.c
@@ -16,7 +16,6 @@
#include <linux/io.h>
#include <linux/delay.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/of.h>
@@ -205,7 +204,7 @@ static DEFINE_SPINLOCK(pll_d_lock);
_clk_num, _gate_flags, \
_clk_id)
-static struct clk **clks;
+static struct clk_core **clks;
/*
* Structure defining the fields for USB UTMI clocks Parameters.
@@ -921,7 +920,7 @@ static const char *pll_e_parents[] = {"pll_ref", "pll_p"};
static void __init tegra30_pll_init(void)
{
- struct clk *clk;
+ struct clk_core *clk;
/* PLLC */
clk = tegra_clk_register_pll("pll_c", "pll_ref", clk_base, pmc_base, 0,
@@ -1012,7 +1011,7 @@ static const char *sclk_parents[] = { "clk_m", "pll_c_out1", "pll_p_out4",
static void __init tegra30_super_clk_init(void)
{
- struct clk *clk;
+ struct clk_core *clk;
/*
* Clock input to cclk_g divided from pll_p using
@@ -1134,7 +1133,7 @@ static struct tegra_periph_init_data tegra_periph_nodiv_clk_list[] = {
static void __init tegra30_periph_clk_init(void)
{
struct tegra_periph_init_data *data;
- struct clk *clk;
+ struct clk_core *clk;
int i;
/* dsia */
diff --git a/drivers/clk/tegra/clk.c b/drivers/clk/tegra/clk.c
index f87c609..d5963f6 100644
--- a/drivers/clk/tegra/clk.c
+++ b/drivers/clk/tegra/clk.c
@@ -14,7 +14,6 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
#include <linux/clk/tegra.h>
@@ -69,7 +68,7 @@ struct tegra_cpu_car_ops *tegra_cpu_car_ops = &dummy_car_ops;
int *periph_clk_enb_refcnt;
static int periph_banks;
-static struct clk **clks;
+static struct clk_core **clks;
static int clk_num;
static struct clk_onecell_data clk_data;
@@ -165,7 +164,7 @@ struct tegra_clk_periph_regs *get_reg_bank(int clkid)
}
}
-struct clk ** __init tegra_clk_init(void __iomem *regs, int num, int banks)
+struct clk_core ** __init tegra_clk_init(void __iomem *regs, int num, int banks)
{
clk_base = regs;
@@ -179,7 +178,7 @@ struct clk ** __init tegra_clk_init(void __iomem *regs, int num, int banks)
periph_banks = banks;
- clks = kzalloc(num * sizeof(struct clk *), GFP_KERNEL);
+ clks = kzalloc(num * sizeof(struct clk_core *), GFP_KERNEL);
if (!clks)
kfree(periph_clk_enb_refcnt);
@@ -189,9 +188,9 @@ struct clk ** __init tegra_clk_init(void __iomem *regs, int num, int banks)
}
void __init tegra_init_dup_clks(struct tegra_clk_duplicate *dup_list,
- struct clk *clks[], int clk_max)
+ struct clk_core *clks[], int clk_max)
{
- struct clk *clk;
+ struct clk_core *clk;
for (; dup_list->clk_id < clk_max; dup_list++) {
clk = clks[dup_list->clk_id];
@@ -201,9 +200,9 @@ void __init tegra_init_dup_clks(struct tegra_clk_duplicate *dup_list,
}
void __init tegra_init_from_table(struct tegra_clk_init_table *tbl,
- struct clk *clks[], int clk_max)
+ struct clk_core *clks[], int clk_max)
{
- struct clk *clk;
+ struct clk_core *clk;
for (; tbl->clk_id < clk_max; tbl++) {
clk = clks[tbl->clk_id];
@@ -211,8 +210,8 @@ void __init tegra_init_from_table(struct tegra_clk_init_table *tbl,
return;
if (tbl->parent_id < clk_max) {
- struct clk *parent = clks[tbl->parent_id];
- if (clk_set_parent(clk, parent)) {
+ struct clk_core *parent = clks[tbl->parent_id];
+ if (clk_provider_set_parent(clk, parent)) {
pr_err("%s: Failed to set parent %s of %s\n",
__func__, __clk_get_name(parent),
__clk_get_name(clk));
@@ -221,7 +220,7 @@ void __init tegra_init_from_table(struct tegra_clk_init_table *tbl,
}
if (tbl->rate)
- if (clk_set_rate(clk, tbl->rate)) {
+ if (clk_provider_set_rate(clk, tbl->rate)) {
pr_err("%s: Failed to set rate %lu of %s\n",
__func__, tbl->rate,
__clk_get_name(clk));
@@ -229,7 +228,7 @@ void __init tegra_init_from_table(struct tegra_clk_init_table *tbl,
}
if (tbl->state)
- if (clk_prepare_enable(clk)) {
+ if (clk_provider_prepare_enable(clk)) {
pr_err("%s: Failed to enable %s\n", __func__,
__clk_get_name(clk));
WARN_ON(1);
@@ -286,7 +285,7 @@ void __init tegra_register_devclks(struct tegra_devclk *dev_clks, int num)
}
}
-struct clk ** __init tegra_lookup_dt_id(int clk_id,
+struct clk_core ** __init tegra_lookup_dt_id(int clk_id,
struct tegra_clk *tegra_clk)
{
if (tegra_clk[clk_id].present)
diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h
index 16ec8d6..3093aa4 100644
--- a/drivers/clk/tegra/clk.h
+++ b/drivers/clk/tegra/clk.h
@@ -39,7 +39,7 @@ struct tegra_clk_sync_source {
extern const struct clk_ops tegra_clk_sync_source_ops;
extern int *periph_clk_enb_refcnt;
-struct clk *tegra_clk_register_sync_source(const char *name,
+struct clk_core *tegra_clk_register_sync_source(const char *name,
unsigned long fixed_rate, unsigned long max_rate);
/**
@@ -82,7 +82,7 @@ struct tegra_clk_frac_div {
#define TEGRA_DIVIDER_UART BIT(3)
extern const struct clk_ops tegra_clk_frac_div_ops;
-struct clk *tegra_clk_register_divider(const char *name,
+struct clk_core *tegra_clk_register_divider(const char *name,
const char *parent_name, void __iomem *reg,
unsigned long flags, u8 clk_divider_flags, u8 shift, u8 width,
u8 frac_width, spinlock_t *lock);
@@ -258,47 +258,47 @@ struct tegra_clk_pll {
extern const struct clk_ops tegra_clk_pll_ops;
extern const struct clk_ops tegra_clk_plle_ops;
-struct clk *tegra_clk_register_pll(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_pll(const char *name, const char *parent_name,
void __iomem *clk_base, void __iomem *pmc,
unsigned long flags, struct tegra_clk_pll_params *pll_params,
spinlock_t *lock);
-struct clk *tegra_clk_register_plle(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_plle(const char *name, const char *parent_name,
void __iomem *clk_base, void __iomem *pmc,
unsigned long flags, struct tegra_clk_pll_params *pll_params,
spinlock_t *lock);
-struct clk *tegra_clk_register_pllxc(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_pllxc(const char *name, const char *parent_name,
void __iomem *clk_base, void __iomem *pmc,
unsigned long flags,
struct tegra_clk_pll_params *pll_params,
spinlock_t *lock);
-struct clk *tegra_clk_register_pllm(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_pllm(const char *name, const char *parent_name,
void __iomem *clk_base, void __iomem *pmc,
unsigned long flags,
struct tegra_clk_pll_params *pll_params,
spinlock_t *lock);
-struct clk *tegra_clk_register_pllc(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_pllc(const char *name, const char *parent_name,
void __iomem *clk_base, void __iomem *pmc,
unsigned long flags,
struct tegra_clk_pll_params *pll_params,
spinlock_t *lock);
-struct clk *tegra_clk_register_pllre(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_pllre(const char *name, const char *parent_name,
void __iomem *clk_base, void __iomem *pmc,
unsigned long flags,
struct tegra_clk_pll_params *pll_params,
spinlock_t *lock, unsigned long parent_rate);
-struct clk *tegra_clk_register_plle_tegra114(const char *name,
+struct clk_core *tegra_clk_register_plle_tegra114(const char *name,
const char *parent_name,
void __iomem *clk_base, unsigned long flags,
struct tegra_clk_pll_params *pll_params,
spinlock_t *lock);
-struct clk *tegra_clk_register_pllss(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_pllss(const char *name, const char *parent_name,
void __iomem *clk_base, unsigned long flags,
struct tegra_clk_pll_params *pll_params,
spinlock_t *lock);
@@ -325,7 +325,7 @@ struct tegra_clk_pll_out {
#define to_clk_pll_out(_hw) container_of(_hw, struct tegra_clk_pll_out, hw)
extern const struct clk_ops tegra_clk_pll_out_ops;
-struct clk *tegra_clk_register_pll_out(const char *name,
+struct clk_core *tegra_clk_register_pll_out(const char *name,
const char *parent_name, void __iomem *reg, u8 enb_bit_idx,
u8 rst_bit_idx, unsigned long flags, u8 pll_div_flags,
spinlock_t *lock);
@@ -394,7 +394,7 @@ struct tegra_clk_periph_gate {
#define TEGRA_PERIPH_NO_GATE BIT(5)
extern const struct clk_ops tegra_clk_periph_gate_ops;
-struct clk *tegra_clk_register_periph_gate(const char *name,
+struct clk_core *tegra_clk_register_periph_gate(const char *name,
const char *parent_name, u8 gate_flags, void __iomem *clk_base,
unsigned long flags, int clk_num, int *enable_refcnt);
@@ -427,11 +427,11 @@ struct tegra_clk_periph {
#define TEGRA_CLK_PERIPH_MAGIC 0x18221223
extern const struct clk_ops tegra_clk_periph_ops;
-struct clk *tegra_clk_register_periph(const char *name,
+struct clk_core *tegra_clk_register_periph(const char *name,
const char **parent_names, int num_parents,
struct tegra_clk_periph *periph, void __iomem *clk_base,
u32 offset, unsigned long flags);
-struct clk *tegra_clk_register_periph_nodiv(const char *name,
+struct clk_core *tegra_clk_register_periph_nodiv(const char *name,
const char **parent_names, int num_parents,
struct tegra_clk_periph *periph, void __iomem *clk_base,
u32 offset);
@@ -540,7 +540,7 @@ struct tegra_clk_super_mux {
#define TEGRA_DIVIDER_2 BIT(0)
extern const struct clk_ops tegra_clk_super_ops;
-struct clk *tegra_clk_register_super_mux(const char *name,
+struct clk_core *tegra_clk_register_super_mux(const char *name,
const char **parent_names, u8 num_parents,
unsigned long flags, void __iomem *reg, u8 clk_super_flags,
u8 width, u8 pllx_index, u8 div2_index, spinlock_t *lock);
@@ -590,15 +590,15 @@ struct tegra_devclk {
};
void tegra_init_from_table(struct tegra_clk_init_table *tbl,
- struct clk *clks[], int clk_max);
+ struct clk_core *clks[], int clk_max);
void tegra_init_dup_clks(struct tegra_clk_duplicate *dup_list,
- struct clk *clks[], int clk_max);
+ struct clk_core *clks[], int clk_max);
struct tegra_clk_periph_regs *get_reg_bank(int clkid);
-struct clk **tegra_clk_init(void __iomem *clk_base, int num, int periph_banks);
+struct clk_core **tegra_clk_init(void __iomem *clk_base, int num, int periph_banks);
-struct clk **tegra_lookup_dt_id(int clk_id, struct tegra_clk *tegra_clk);
+struct clk_core **tegra_lookup_dt_id(int clk_id, struct tegra_clk *tegra_clk);
void tegra_add_of_provider(struct device_node *np);
void tegra_register_devclks(struct tegra_devclk *dev_clks, int num);
diff --git a/drivers/clk/ti/apll.c b/drivers/clk/ti/apll.c
index 72d9727..a162c21 100644
--- a/drivers/clk/ti/apll.c
+++ b/drivers/clk/ti/apll.c
@@ -135,10 +135,10 @@ static void __init omap_clk_register_apll(struct clk_hw *hw,
{
struct clk_hw_omap *clk_hw = to_clk_hw_omap(hw);
struct dpll_data *ad = clk_hw->dpll_data;
- struct clk *clk;
+ struct clk_core *clk;
- ad->clk_ref = of_clk_get(node, 0);
- ad->clk_bypass = of_clk_get(node, 1);
+ ad->clk_ref = of_clk_provider_get(node, 0);
+ ad->clk_bypass = of_clk_provider_get(node, 1);
if (IS_ERR(ad->clk_ref) || IS_ERR(ad->clk_bypass)) {
pr_debug("clk-ref or clk-bypass for %s not ready, retry\n",
@@ -332,7 +332,7 @@ static void __init of_omap2_apll_setup(struct device_node *node)
struct dpll_data *ad = NULL;
struct clk_hw_omap *clk_hw = NULL;
struct clk_init_data *init = NULL;
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name;
u32 val;
diff --git a/drivers/clk/ti/clk-2xxx.c b/drivers/clk/ti/clk-2xxx.c
index c808ab3..a48fe6f 100644
--- a/drivers/clk/ti/clk-2xxx.c
+++ b/drivers/clk/ti/clk-2xxx.c
@@ -237,10 +237,10 @@ static int __init omap2xxx_dt_clk_init(int soc_type)
ARRAY_SIZE(enable_init_clks));
pr_info("Clocking rate (Crystal/DPLL/MPU): %ld.%01ld/%ld/%ld MHz\n",
- (clk_get_rate(clk_get_sys(NULL, "sys_ck")) / 1000000),
- (clk_get_rate(clk_get_sys(NULL, "sys_ck")) / 100000) % 10,
- (clk_get_rate(clk_get_sys(NULL, "dpll_ck")) / 1000000),
- (clk_get_rate(clk_get_sys(NULL, "mpu_ck")) / 1000000));
+ (clk_provider_get_rate(clk_provider_get_sys(NULL, "sys_ck")) / 1000000),
+ (clk_provider_get_rate(clk_provider_get_sys(NULL, "sys_ck")) / 100000) % 10,
+ (clk_provider_get_rate(clk_provider_get_sys(NULL, "dpll_ck")) / 1000000),
+ (clk_provider_get_rate(clk_provider_get_sys(NULL, "mpu_ck")) / 1000000));
return 0;
}
diff --git a/drivers/clk/ti/clk-33xx.c b/drivers/clk/ti/clk-33xx.c
index 028b337..0988f1e 100644
--- a/drivers/clk/ti/clk-33xx.c
+++ b/drivers/clk/ti/clk-33xx.c
@@ -121,7 +121,7 @@ static const char *enable_init_clks[] = {
int __init am33xx_dt_clk_init(void)
{
- struct clk *clk1, *clk2;
+ struct clk_core *clk1, *clk2;
ti_dt_clocks_register(am33xx_clks);
@@ -139,12 +139,12 @@ int __init am33xx_dt_clk_init(void)
* oscillator clock.
*/
- clk1 = clk_get_sys(NULL, "sys_clkin_ck");
- clk2 = clk_get_sys(NULL, "timer3_fck");
- clk_set_parent(clk2, clk1);
+ clk1 = clk_provider_get_sys(NULL, "sys_clkin_ck");
+ clk2 = clk_provider_get_sys(NULL, "timer3_fck");
+ clk_provider_set_parent(clk2, clk1);
- clk2 = clk_get_sys(NULL, "timer6_fck");
- clk_set_parent(clk2, clk1);
+ clk2 = clk_provider_get_sys(NULL, "timer6_fck");
+ clk_provider_set_parent(clk2, clk1);
/*
* The On-Chip 32K RC Osc clock is not an accurate clock-source as per
* the design/spec, so as a result, for example, timer which supposed
@@ -152,9 +152,9 @@ int __init am33xx_dt_clk_init(void)
* not expected by any use-case, so change WDT1 clock source to PRCM
* 32KHz clock.
*/
- clk1 = clk_get_sys(NULL, "wdt1_fck");
- clk2 = clk_get_sys(NULL, "clkdiv32k_ick");
- clk_set_parent(clk1, clk2);
+ clk1 = clk_provider_get_sys(NULL, "wdt1_fck");
+ clk2 = clk_provider_get_sys(NULL, "clkdiv32k_ick");
+ clk_provider_set_parent(clk1, clk2);
return 0;
}
diff --git a/drivers/clk/ti/clk-3xxx.c b/drivers/clk/ti/clk-3xxx.c
index 0d1750a..58ef20e 100644
--- a/drivers/clk/ti/clk-3xxx.c
+++ b/drivers/clk/ti/clk-3xxx.c
@@ -365,10 +365,10 @@ static int __init omap3xxx_dt_clk_init(int soc_type)
ARRAY_SIZE(enable_init_clks));
pr_info("Clocking rate (Crystal/Core/MPU): %ld.%01ld/%ld/%ld MHz\n",
- (clk_get_rate(clk_get_sys(NULL, "osc_sys_ck")) / 1000000),
- (clk_get_rate(clk_get_sys(NULL, "osc_sys_ck")) / 100000) % 10,
- (clk_get_rate(clk_get_sys(NULL, "core_ck")) / 1000000),
- (clk_get_rate(clk_get_sys(NULL, "arm_fck")) / 1000000));
+ (clk_provider_get_rate(clk_provider_get_sys(NULL, "osc_sys_ck")) / 1000000),
+ (clk_provider_get_rate(clk_provider_get_sys(NULL, "osc_sys_ck")) / 100000) % 10,
+ (clk_provider_get_rate(clk_provider_get_sys(NULL, "core_ck")) / 1000000),
+ (clk_provider_get_rate(clk_provider_get_sys(NULL, "arm_fck")) / 1000000));
if (soc_type != OMAP3_SOC_TI81XX && soc_type != OMAP3_SOC_OMAP3430_ES1)
omap3_clk_lock_dpll5();
diff --git a/drivers/clk/ti/clk-43xx.c b/drivers/clk/ti/clk-43xx.c
index 3795fce..1277452 100644
--- a/drivers/clk/ti/clk-43xx.c
+++ b/drivers/clk/ti/clk-43xx.c
@@ -116,7 +116,7 @@ static struct ti_dt_clk am43xx_clks[] = {
int __init am43xx_dt_clk_init(void)
{
- struct clk *clk1, *clk2;
+ struct clk_core *clk1, *clk2;
ti_dt_clocks_register(am43xx_clks);
@@ -132,9 +132,9 @@ int __init am43xx_dt_clk_init(void)
* By selecting dpll_core_m5_ck as the clocksource fixes this issue.
* In AM335x dpll_core_m5_ck is the default clocksource.
*/
- clk1 = clk_get_sys(NULL, "cpsw_cpts_rft_clk");
- clk2 = clk_get_sys(NULL, "dpll_core_m5_ck");
- clk_set_parent(clk1, clk2);
+ clk1 = clk_provider_get_sys(NULL, "cpsw_cpts_rft_clk");
+ clk2 = clk_provider_get_sys(NULL, "dpll_core_m5_ck");
+ clk_provider_set_parent(clk1, clk2);
return 0;
}
diff --git a/drivers/clk/ti/clk-44xx.c b/drivers/clk/ti/clk-44xx.c
index 02517a8..1adc399 100644
--- a/drivers/clk/ti/clk-44xx.c
+++ b/drivers/clk/ti/clk-44xx.c
@@ -281,7 +281,7 @@ static struct ti_dt_clk omap44xx_clks[] = {
int __init omap4xxx_dt_clk_init(void)
{
int rc;
- struct clk *abe_dpll_ref, *abe_dpll, *sys_32k_ck, *usb_dpll;
+ struct clk_core *abe_dpll_ref, *abe_dpll, *sys_32k_ck, *usb_dpll;
ti_dt_clocks_register(omap44xx_clks);
@@ -291,8 +291,8 @@ int __init omap4xxx_dt_clk_init(void)
* Lock USB DPLL on OMAP4 devices so that the L3INIT power
* domain can transition to retention state when not in use.
*/
- usb_dpll = clk_get_sys(NULL, "dpll_usb_ck");
- rc = clk_set_rate(usb_dpll, OMAP4_DPLL_USB_DEFFREQ);
+ usb_dpll = clk_provider_get_sys(NULL, "dpll_usb_ck");
+ rc = clk_provider_set_rate(usb_dpll, OMAP4_DPLL_USB_DEFFREQ);
if (rc)
pr_err("%s: failed to configure USB DPLL!\n", __func__);
@@ -302,12 +302,12 @@ int __init omap4xxx_dt_clk_init(void)
* locking the ABE DPLL on boot.
* Lock the ABE DPLL in any case to avoid issues with audio.
*/
- abe_dpll_ref = clk_get_sys(NULL, "abe_dpll_refclk_mux_ck");
- sys_32k_ck = clk_get_sys(NULL, "sys_32k_ck");
- rc = clk_set_parent(abe_dpll_ref, sys_32k_ck);
- abe_dpll = clk_get_sys(NULL, "dpll_abe_ck");
+ abe_dpll_ref = clk_provider_get_sys(NULL, "abe_dpll_refclk_mux_ck");
+ sys_32k_ck = clk_provider_get_sys(NULL, "sys_32k_ck");
+ rc = clk_provider_set_parent(abe_dpll_ref, sys_32k_ck);
+ abe_dpll = clk_provider_get_sys(NULL, "dpll_abe_ck");
if (!rc)
- rc = clk_set_rate(abe_dpll, OMAP4_DPLL_ABE_DEFFREQ);
+ rc = clk_provider_set_rate(abe_dpll, OMAP4_DPLL_ABE_DEFFREQ);
if (rc)
pr_err("%s: failed to configure ABE DPLL!\n", __func__);
diff --git a/drivers/clk/ti/clk-54xx.c b/drivers/clk/ti/clk-54xx.c
index 5e18399..5b603b5 100644
--- a/drivers/clk/ti/clk-54xx.c
+++ b/drivers/clk/ti/clk-54xx.c
@@ -225,34 +225,35 @@ static struct ti_dt_clk omap54xx_clks[] = {
int __init omap5xxx_dt_clk_init(void)
{
int rc;
- struct clk *abe_dpll_ref, *abe_dpll, *sys_32k_ck, *usb_dpll;
+ struct clk_core *abe_dpll_ref, *abe_dpll, *sys_32k_ck, *usb_dpll;
ti_dt_clocks_register(omap54xx_clks);
omap2_clk_disable_autoidle_all();
- abe_dpll_ref = clk_get_sys(NULL, "abe_dpll_clk_mux");
- sys_32k_ck = clk_get_sys(NULL, "sys_32k_ck");
- rc = clk_set_parent(abe_dpll_ref, sys_32k_ck);
- abe_dpll = clk_get_sys(NULL, "dpll_abe_ck");
+ abe_dpll_ref = clk_provider_get_sys(NULL, "abe_dpll_clk_mux");
+ sys_32k_ck = clk_provider_get_sys(NULL, "sys_32k_ck");
+ rc = clk_provider_set_parent(abe_dpll_ref, sys_32k_ck);
+ abe_dpll = clk_provider_get_sys(NULL, "dpll_abe_ck");
if (!rc)
- rc = clk_set_rate(abe_dpll, OMAP5_DPLL_ABE_DEFFREQ);
+ rc = clk_provider_set_rate(abe_dpll, OMAP5_DPLL_ABE_DEFFREQ);
if (rc)
pr_err("%s: failed to configure ABE DPLL!\n", __func__);
- abe_dpll = clk_get_sys(NULL, "dpll_abe_m2x2_ck");
+ abe_dpll = clk_provider_get_sys(NULL, "dpll_abe_m2x2_ck");
if (!rc)
- rc = clk_set_rate(abe_dpll, OMAP5_DPLL_ABE_DEFFREQ * 2);
+ rc = clk_provider_set_rate(abe_dpll,
+ OMAP5_DPLL_ABE_DEFFREQ * 2);
if (rc)
pr_err("%s: failed to configure ABE m2x2 DPLL!\n", __func__);
- usb_dpll = clk_get_sys(NULL, "dpll_usb_ck");
- rc = clk_set_rate(usb_dpll, OMAP5_DPLL_USB_DEFFREQ);
+ usb_dpll = clk_provider_get_sys(NULL, "dpll_usb_ck");
+ rc = clk_provider_set_rate(usb_dpll, OMAP5_DPLL_USB_DEFFREQ);
if (rc)
pr_err("%s: failed to configure USB DPLL!\n", __func__);
- usb_dpll = clk_get_sys(NULL, "dpll_usb_m2_ck");
- rc = clk_set_rate(usb_dpll, OMAP5_DPLL_USB_DEFFREQ/2);
+ usb_dpll = clk_provider_get_sys(NULL, "dpll_usb_m2_ck");
+ rc = clk_provider_set_rate(usb_dpll, OMAP5_DPLL_USB_DEFFREQ / 2);
if (rc)
pr_err("%s: failed to set USB_DPLL M2 OUT\n", __func__);
diff --git a/drivers/clk/ti/clk-7xx.c b/drivers/clk/ti/clk-7xx.c
index 62ac8f6..9dba0bb 100644
--- a/drivers/clk/ti/clk-7xx.c
+++ b/drivers/clk/ti/clk-7xx.c
@@ -307,39 +307,39 @@ static struct ti_dt_clk dra7xx_clks[] = {
int __init dra7xx_dt_clk_init(void)
{
int rc;
- struct clk *abe_dpll_mux, *sys_clkin2, *dpll_ck;
+ struct clk_core *abe_dpll_mux, *sys_clkin2, *dpll_ck;
ti_dt_clocks_register(dra7xx_clks);
omap2_clk_disable_autoidle_all();
- abe_dpll_mux = clk_get_sys(NULL, "abe_dpll_sys_clk_mux");
- sys_clkin2 = clk_get_sys(NULL, "sys_clkin2");
- dpll_ck = clk_get_sys(NULL, "dpll_abe_ck");
+ abe_dpll_mux = clk_provider_get_sys(NULL, "abe_dpll_sys_clk_mux");
+ sys_clkin2 = clk_provider_get_sys(NULL, "sys_clkin2");
+ dpll_ck = clk_provider_get_sys(NULL, "dpll_abe_ck");
- rc = clk_set_parent(abe_dpll_mux, sys_clkin2);
+ rc = clk_provider_set_parent(abe_dpll_mux, sys_clkin2);
if (!rc)
- rc = clk_set_rate(dpll_ck, DRA7_DPLL_ABE_DEFFREQ);
+ rc = clk_provider_set_rate(dpll_ck, DRA7_DPLL_ABE_DEFFREQ);
if (rc)
pr_err("%s: failed to configure ABE DPLL!\n", __func__);
- dpll_ck = clk_get_sys(NULL, "dpll_abe_m2x2_ck");
- rc = clk_set_rate(dpll_ck, DRA7_DPLL_ABE_DEFFREQ * 2);
+ dpll_ck = clk_provider_get_sys(NULL, "dpll_abe_m2x2_ck");
+ rc = clk_provider_set_rate(dpll_ck, DRA7_DPLL_ABE_DEFFREQ * 2);
if (rc)
pr_err("%s: failed to configure ABE DPLL m2x2!\n", __func__);
- dpll_ck = clk_get_sys(NULL, "dpll_gmac_ck");
- rc = clk_set_rate(dpll_ck, DRA7_DPLL_GMAC_DEFFREQ);
+ dpll_ck = clk_provider_get_sys(NULL, "dpll_gmac_ck");
+ rc = clk_provider_set_rate(dpll_ck, DRA7_DPLL_GMAC_DEFFREQ);
if (rc)
pr_err("%s: failed to configure GMAC DPLL!\n", __func__);
- dpll_ck = clk_get_sys(NULL, "dpll_usb_ck");
- rc = clk_set_rate(dpll_ck, DRA7_DPLL_USB_DEFFREQ);
+ dpll_ck = clk_provider_get_sys(NULL, "dpll_usb_ck");
+ rc = clk_provider_set_rate(dpll_ck, DRA7_DPLL_USB_DEFFREQ);
if (rc)
pr_err("%s: failed to configure USB DPLL!\n", __func__);
- dpll_ck = clk_get_sys(NULL, "dpll_usb_m2_ck");
- rc = clk_set_rate(dpll_ck, DRA7_DPLL_USB_DEFFREQ/2);
+ dpll_ck = clk_provider_get_sys(NULL, "dpll_usb_m2_ck");
+ rc = clk_provider_set_rate(dpll_ck, DRA7_DPLL_USB_DEFFREQ / 2);
if (rc)
pr_err("%s: failed to set USB_DPLL M2 OUT\n", __func__);
diff --git a/drivers/clk/ti/clk-dra7-atl.c b/drivers/clk/ti/clk-dra7-atl.c
index 4a65b41..029a0d3 100644
--- a/drivers/clk/ti/clk-dra7-atl.c
+++ b/drivers/clk/ti/clk-dra7-atl.c
@@ -40,7 +40,7 @@
struct dra7_atl_clock_info;
struct dra7_atl_desc {
- struct clk *clk;
+ struct clk_core *clk;
struct clk_hw hw;
struct dra7_atl_clock_info *cinfo;
int id;
@@ -165,7 +165,7 @@ static void __init of_dra7_atl_clock_setup(struct device_node *node)
struct dra7_atl_desc *clk_hw = NULL;
struct clk_init_data init = { 0 };
const char **parent_names = NULL;
- struct clk *clk;
+ struct clk_core *clk;
clk_hw = kzalloc(sizeof(*clk_hw), GFP_KERNEL);
if (!clk_hw) {
@@ -233,7 +233,7 @@ static int of_dra7_atl_clk_probe(struct platform_device *pdev)
char prop[5];
struct dra7_atl_desc *cdesc;
struct of_phandle_args clkspec;
- struct clk *clk;
+ struct clk_core *clk;
int rc;
rc = of_parse_phandle_with_args(node, "ti,provided-clocks",
diff --git a/drivers/clk/ti/clk.c b/drivers/clk/ti/clk.c
index b1a6f71..d88a70d0 100644
--- a/drivers/clk/ti/clk.c
+++ b/drivers/clk/ti/clk.c
@@ -41,7 +41,7 @@ void __init ti_dt_clocks_register(struct ti_dt_clk oclks[])
{
struct ti_dt_clk *c;
struct device_node *node;
- struct clk *clk;
+ struct clk_core *clk;
struct of_phandle_args clkspec;
for (c = oclks; c->node_name != NULL; c++) {
diff --git a/drivers/clk/ti/clockdomain.c b/drivers/clk/ti/clockdomain.c
index f1e0038..6bc75d8 100644
--- a/drivers/clk/ti/clockdomain.c
+++ b/drivers/clk/ti/clockdomain.c
@@ -26,7 +26,7 @@
static void __init of_ti_clockdomain_setup(struct device_node *node)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_hw *clk_hw;
const char *clkdm_name = node->name;
int i;
@@ -35,7 +35,7 @@ static void __init of_ti_clockdomain_setup(struct device_node *node)
num_clks = of_count_phandle_with_args(node, "clocks", "#clock-cells");
for (i = 0; i < num_clks; i++) {
- clk = of_clk_get(node, i);
+ clk = of_clk_provider_get(node, i);
if (__clk_get_flags(clk) & CLK_IS_BASIC) {
pr_warn("can't setup clkdm for basic clk %s\n",
__clk_get_name(clk));
diff --git a/drivers/clk/ti/composite.c b/drivers/clk/ti/composite.c
index 19d8980..2cbee34 100644
--- a/drivers/clk/ti/composite.c
+++ b/drivers/clk/ti/composite.c
@@ -119,7 +119,7 @@ static inline struct clk_hw *_get_hw(struct clk_hw_omap_comp *clk, int idx)
static void __init ti_clk_register_composite(struct clk_hw *hw,
struct device_node *node)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_hw_omap_comp *cclk = to_clk_hw_comp(hw);
struct component_clk *comp;
int num_parents = 0;
diff --git a/drivers/clk/ti/divider.c b/drivers/clk/ti/divider.c
index e6aa10d..1c41515 100644
--- a/drivers/clk/ti/divider.c
+++ b/drivers/clk/ti/divider.c
@@ -246,7 +246,7 @@ const struct clk_ops ti_clk_divider_ops = {
.set_rate = ti_clk_divider_set_rate,
};
-static struct clk *_register_divider(struct device *dev, const char *name,
+static struct clk_core *_register_divider(struct device *dev, const char *name,
const char *parent_name,
unsigned long flags, void __iomem *reg,
u8 shift, u8 width, u8 clk_divider_flags,
@@ -254,7 +254,7 @@ static struct clk *_register_divider(struct device *dev, const char *name,
spinlock_t *lock)
{
struct clk_divider *div;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
if (clk_divider_flags & CLK_DIVIDER_HIWORD_MASK) {
@@ -434,7 +434,7 @@ static int __init ti_clk_divider_populate(struct device_node *node,
*/
static void __init of_ti_divider_clk_setup(struct device_node *node)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name;
void __iomem *reg;
u8 clk_divider_flags = 0;
diff --git a/drivers/clk/ti/dpll.c b/drivers/clk/ti/dpll.c
index 79791e1..e1f74cc 100644
--- a/drivers/clk/ti/dpll.c
+++ b/drivers/clk/ti/dpll.c
@@ -128,10 +128,10 @@ static void __init ti_clk_register_dpll(struct clk_hw *hw,
{
struct clk_hw_omap *clk_hw = to_clk_hw_omap(hw);
struct dpll_data *dd = clk_hw->dpll_data;
- struct clk *clk;
+ struct clk_core *clk;
- dd->clk_ref = of_clk_get(node, 0);
- dd->clk_bypass = of_clk_get(node, 1);
+ dd->clk_ref = of_clk_provider_get(node, 0);
+ dd->clk_bypass = of_clk_provider_get(node, 1);
if (IS_ERR(dd->clk_ref) || IS_ERR(dd->clk_bypass)) {
pr_debug("clk-ref or clk-bypass missing for %s, retry later\n",
@@ -175,7 +175,7 @@ static void ti_clk_register_dpll_x2(struct device_node *node,
const struct clk_ops *ops,
const struct clk_hw_omap_ops *hw_ops)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init = { NULL };
struct clk_hw_omap *clk_hw;
const char *name = node->name;
diff --git a/drivers/clk/ti/fixed-factor.c b/drivers/clk/ti/fixed-factor.c
index c2c8a28..2aa2701 100644
--- a/drivers/clk/ti/fixed-factor.c
+++ b/drivers/clk/ti/fixed-factor.c
@@ -33,7 +33,7 @@
*/
static void __init of_ti_fixed_factor_clk_setup(struct device_node *node)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name = node->name;
const char *parent_name;
u32 div, mult;
diff --git a/drivers/clk/ti/gate.c b/drivers/clk/ti/gate.c
index b326d27..dd1b813 100644
--- a/drivers/clk/ti/gate.c
+++ b/drivers/clk/ti/gate.c
@@ -94,7 +94,7 @@ static void __init _of_ti_gate_clk_setup(struct device_node *node,
const struct clk_ops *ops,
const struct clk_hw_omap_ops *hw_ops)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init = { NULL };
struct clk_hw_omap *clk_hw;
const char *clk_name = node->name;
diff --git a/drivers/clk/ti/interface.c b/drivers/clk/ti/interface.c
index 9c3e8c4..e2f2bc0 100644
--- a/drivers/clk/ti/interface.c
+++ b/drivers/clk/ti/interface.c
@@ -34,7 +34,7 @@ static const struct clk_ops ti_interface_clk_ops = {
static void __init _of_ti_interface_clk_setup(struct device_node *node,
const struct clk_hw_omap_ops *ops)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init = { NULL };
struct clk_hw_omap *clk_hw;
const char *parent_name;
diff --git a/drivers/clk/ti/mux.c b/drivers/clk/ti/mux.c
index e9d650e..7456198 100644
--- a/drivers/clk/ti/mux.c
+++ b/drivers/clk/ti/mux.c
@@ -104,14 +104,14 @@ const struct clk_ops ti_clk_mux_ops = {
.determine_rate = __clk_mux_determine_rate,
};
-static struct clk *_register_mux(struct device *dev, const char *name,
+static struct clk_core *_register_mux(struct device *dev, const char *name,
const char **parent_names, u8 num_parents,
unsigned long flags, void __iomem *reg,
u8 shift, u32 mask, u8 clk_mux_flags,
u32 *table, spinlock_t *lock)
{
struct clk_mux *mux;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
/* allocate the mux */
@@ -152,7 +152,7 @@ static struct clk *_register_mux(struct device *dev, const char *name,
*/
static void of_mux_clk_setup(struct device_node *node)
{
- struct clk *clk;
+ struct clk_core *clk;
void __iomem *reg;
int num_parents;
const char **parent_names;
diff --git a/drivers/clk/ux500/abx500-clk.c b/drivers/clk/ux500/abx500-clk.c
index e7bd62c..f27be78 100644
--- a/drivers/clk/ux500/abx500-clk.c
+++ b/drivers/clk/ux500/abx500-clk.c
@@ -13,7 +13,6 @@
#include <linux/platform_device.h>
#include <linux/mfd/abx500/ab8500.h>
#include <linux/mfd/abx500/ab8500-sysctrl.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/mfd/dbx500-prcmu.h>
@@ -23,7 +22,7 @@
static int ab8500_reg_clks(struct device *dev)
{
int ret;
- struct clk *clk;
+ struct clk_core *clk;
const char *intclk_parents[] = {"ab8500_sysclk", "ulpclk"};
u16 intclk_reg_sel[] = {0 , AB8500_SYSULPCLKCTRL1};
diff --git a/drivers/clk/ux500/clk-prcc.c b/drivers/clk/ux500/clk-prcc.c
index bd4769a..7eb055f 100644
--- a/drivers/clk/ux500/clk-prcc.c
+++ b/drivers/clk/ux500/clk-prcc.c
@@ -92,7 +92,7 @@ static struct clk_ops clk_prcc_kclk_ops = {
.is_enabled = clk_prcc_is_enabled,
};
-static struct clk *clk_reg_prcc(const char *name,
+static struct clk_core *clk_reg_prcc(const char *name,
const char *parent_name,
resource_size_t phy_base,
u32 cg_sel,
@@ -101,7 +101,7 @@ static struct clk *clk_reg_prcc(const char *name,
{
struct clk_prcc *clk;
struct clk_init_data clk_prcc_init;
- struct clk *clk_reg;
+ struct clk_core *clk_reg;
if (!name) {
pr_err("clk_prcc: %s invalid arguments passed\n", __func__);
@@ -142,7 +142,7 @@ free_clk:
return ERR_PTR(-ENOMEM);
}
-struct clk *clk_reg_prcc_pclk(const char *name,
+struct clk_core *clk_reg_prcc_pclk(const char *name,
const char *parent_name,
resource_size_t phy_base,
u32 cg_sel,
@@ -152,7 +152,7 @@ struct clk *clk_reg_prcc_pclk(const char *name,
&clk_prcc_pclk_ops);
}
-struct clk *clk_reg_prcc_kclk(const char *name,
+struct clk_core *clk_reg_prcc_kclk(const char *name,
const char *parent_name,
resource_size_t phy_base,
u32 cg_sel,
diff --git a/drivers/clk/ux500/clk-prcmu.c b/drivers/clk/ux500/clk-prcmu.c
index e2d63bc..bac54c9 100644
--- a/drivers/clk/ux500/clk-prcmu.c
+++ b/drivers/clk/ux500/clk-prcmu.c
@@ -243,7 +243,7 @@ static struct clk_ops clk_prcmu_opp_volt_scalable_ops = {
.set_rate = clk_prcmu_set_rate,
};
-static struct clk *clk_reg_prcmu(const char *name,
+static struct clk_core *clk_reg_prcmu(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long rate,
@@ -252,7 +252,7 @@ static struct clk *clk_reg_prcmu(const char *name,
{
struct clk_prcmu *clk;
struct clk_init_data clk_prcmu_init;
- struct clk *clk_reg;
+ struct clk_core *clk_reg;
if (!name) {
pr_err("clk_prcmu: %s invalid arguments passed\n", __func__);
@@ -292,7 +292,7 @@ free_clk:
return ERR_PTR(-ENOMEM);
}
-struct clk *clk_reg_prcmu_scalable(const char *name,
+struct clk_core *clk_reg_prcmu_scalable(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long rate,
@@ -302,7 +302,7 @@ struct clk *clk_reg_prcmu_scalable(const char *name,
&clk_prcmu_scalable_ops);
}
-struct clk *clk_reg_prcmu_gate(const char *name,
+struct clk_core *clk_reg_prcmu_gate(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long flags)
@@ -311,7 +311,7 @@ struct clk *clk_reg_prcmu_gate(const char *name,
&clk_prcmu_gate_ops);
}
-struct clk *clk_reg_prcmu_scalable_rate(const char *name,
+struct clk_core *clk_reg_prcmu_scalable_rate(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long rate,
@@ -321,7 +321,7 @@ struct clk *clk_reg_prcmu_scalable_rate(const char *name,
&clk_prcmu_scalable_rate_ops);
}
-struct clk *clk_reg_prcmu_rate(const char *name,
+struct clk_core *clk_reg_prcmu_rate(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long flags)
@@ -330,7 +330,7 @@ struct clk *clk_reg_prcmu_rate(const char *name,
&clk_prcmu_rate_ops);
}
-struct clk *clk_reg_prcmu_opp_gate(const char *name,
+struct clk_core *clk_reg_prcmu_opp_gate(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long flags)
@@ -339,7 +339,7 @@ struct clk *clk_reg_prcmu_opp_gate(const char *name,
&clk_prcmu_opp_gate_ops);
}
-struct clk *clk_reg_prcmu_opp_volt_scalable(const char *name,
+struct clk_core *clk_reg_prcmu_opp_volt_scalable(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long rate,
diff --git a/drivers/clk/ux500/clk-sysctrl.c b/drivers/clk/ux500/clk-sysctrl.c
index e364c9d..dc6608a 100644
--- a/drivers/clk/ux500/clk-sysctrl.c
+++ b/drivers/clk/ux500/clk-sysctrl.c
@@ -114,7 +114,7 @@ static struct clk_ops clk_sysctrl_set_parent_ops = {
.get_parent = clk_sysctrl_get_parent,
};
-static struct clk *clk_reg_sysctrl(struct device *dev,
+static struct clk_core *clk_reg_sysctrl(struct device *dev,
const char *name,
const char **parent_names,
u8 num_parents,
@@ -128,7 +128,7 @@ static struct clk *clk_reg_sysctrl(struct device *dev,
{
struct clk_sysctrl *clk;
struct clk_init_data clk_sysctrl_init;
- struct clk *clk_reg;
+ struct clk_core *clk_reg;
int i;
if (!dev)
@@ -176,7 +176,7 @@ static struct clk *clk_reg_sysctrl(struct device *dev,
return clk_reg;
}
-struct clk *clk_reg_sysctrl_gate(struct device *dev,
+struct clk_core *clk_reg_sysctrl_gate(struct device *dev,
const char *name,
const char *parent_name,
u16 reg_sel,
@@ -193,7 +193,7 @@ struct clk *clk_reg_sysctrl_gate(struct device *dev,
flags, &clk_sysctrl_gate_ops);
}
-struct clk *clk_reg_sysctrl_gate_fixed_rate(struct device *dev,
+struct clk_core *clk_reg_sysctrl_gate_fixed_rate(struct device *dev,
const char *name,
const char *parent_name,
u16 reg_sel,
@@ -212,7 +212,7 @@ struct clk *clk_reg_sysctrl_gate_fixed_rate(struct device *dev,
&clk_sysctrl_gate_fixed_rate_ops);
}
-struct clk *clk_reg_sysctrl_set_parent(struct device *dev,
+struct clk_core *clk_reg_sysctrl_set_parent(struct device *dev,
const char *name,
const char **parent_names,
u8 num_parents,
diff --git a/drivers/clk/ux500/clk.h b/drivers/clk/ux500/clk.h
index a2bb92d..acb50f8 100644
--- a/drivers/clk/ux500/clk.h
+++ b/drivers/clk/ux500/clk.h
@@ -10,56 +10,55 @@
#ifndef __UX500_CLK_H
#define __UX500_CLK_H
-#include <linux/clk.h>
#include <linux/device.h>
#include <linux/types.h>
-struct clk *clk_reg_prcc_pclk(const char *name,
+struct clk_core *clk_reg_prcc_pclk(const char *name,
const char *parent_name,
resource_size_t phy_base,
u32 cg_sel,
unsigned long flags);
-struct clk *clk_reg_prcc_kclk(const char *name,
+struct clk_core *clk_reg_prcc_kclk(const char *name,
const char *parent_name,
resource_size_t phy_base,
u32 cg_sel,
unsigned long flags);
-struct clk *clk_reg_prcmu_scalable(const char *name,
+struct clk_core *clk_reg_prcmu_scalable(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long rate,
unsigned long flags);
-struct clk *clk_reg_prcmu_gate(const char *name,
+struct clk_core *clk_reg_prcmu_gate(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long flags);
-struct clk *clk_reg_prcmu_scalable_rate(const char *name,
+struct clk_core *clk_reg_prcmu_scalable_rate(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long rate,
unsigned long flags);
-struct clk *clk_reg_prcmu_rate(const char *name,
+struct clk_core *clk_reg_prcmu_rate(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long flags);
-struct clk *clk_reg_prcmu_opp_gate(const char *name,
+struct clk_core *clk_reg_prcmu_opp_gate(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long flags);
-struct clk *clk_reg_prcmu_opp_volt_scalable(const char *name,
+struct clk_core *clk_reg_prcmu_opp_volt_scalable(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long rate,
unsigned long flags);
-struct clk *clk_reg_sysctrl_gate(struct device *dev,
+struct clk_core *clk_reg_sysctrl_gate(struct device *dev,
const char *name,
const char *parent_name,
u16 reg_sel,
@@ -68,7 +67,7 @@ struct clk *clk_reg_sysctrl_gate(struct device *dev,
unsigned long enable_delay_us,
unsigned long flags);
-struct clk *clk_reg_sysctrl_gate_fixed_rate(struct device *dev,
+struct clk_core *clk_reg_sysctrl_gate_fixed_rate(struct device *dev,
const char *name,
const char *parent_name,
u16 reg_sel,
@@ -78,7 +77,7 @@ struct clk *clk_reg_sysctrl_gate_fixed_rate(struct device *dev,
unsigned long enable_delay_us,
unsigned long flags);
-struct clk *clk_reg_sysctrl_set_parent(struct device *dev,
+struct clk_core *clk_reg_sysctrl_set_parent(struct device *dev,
const char *name,
const char **parent_names,
u8 num_parents,
diff --git a/drivers/clk/ux500/u8500_clk.c b/drivers/clk/ux500/u8500_clk.c
index 80069c3..708589f 100644
--- a/drivers/clk/ux500/u8500_clk.c
+++ b/drivers/clk/ux500/u8500_clk.c
@@ -7,7 +7,6 @@
* License terms: GNU General Public License (GPL) version 2
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/mfd/dbx500-prcmu.h>
@@ -19,7 +18,7 @@ void u8500_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
{
struct prcmu_fw_version *fw_version;
const char *sgaclk_parent = NULL;
- struct clk *clk;
+ struct clk_core *clk;
/* Clock sources */
clk = clk_reg_prcmu_gate("soc0_pll", NULL, PRCMU_PLLSOC0,
diff --git a/drivers/clk/ux500/u8500_of_clk.c b/drivers/clk/ux500/u8500_of_clk.c
index 7b55ef8..61efb85 100644
--- a/drivers/clk/ux500/u8500_of_clk.c
+++ b/drivers/clk/ux500/u8500_of_clk.c
@@ -8,7 +8,6 @@
*/
#include <linux/of.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/mfd/dbx500-prcmu.h>
@@ -18,9 +17,9 @@
#define PRCC_NUM_PERIPH_CLUSTERS 6
#define PRCC_PERIPHS_PER_CLUSTER 32
-static struct clk *prcmu_clk[PRCMU_NUM_CLKS];
-static struct clk *prcc_pclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) * PRCC_PERIPHS_PER_CLUSTER];
-static struct clk *prcc_kclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) * PRCC_PERIPHS_PER_CLUSTER];
+static struct clk_core *prcmu_clk[PRCMU_NUM_CLKS];
+static struct clk_core *prcc_pclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) * PRCC_PERIPHS_PER_CLUSTER];
+static struct clk_core *prcc_kclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) * PRCC_PERIPHS_PER_CLUSTER];
#define PRCC_SHOW(clk, base, bit) \
clk[(base * PRCC_PERIPHS_PER_CLUSTER) + bit]
@@ -29,10 +28,10 @@ static struct clk *prcc_kclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) * PRCC_PERIPHS_PER_C
#define PRCC_KCLK_STORE(clk, base, bit) \
prcc_kclk[(base * PRCC_PERIPHS_PER_CLUSTER) + bit] = clk
-static struct clk *ux500_twocell_get(struct of_phandle_args *clkspec,
+static struct clk_core *ux500_twocell_get(struct of_phandle_args *clkspec,
void *data)
{
- struct clk **clk_data = data;
+ struct clk_core **clk_data = data;
unsigned int base, bit;
if (clkspec->args_count != 2)
@@ -61,7 +60,7 @@ void u8500_of_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
struct device_node *np = NULL;
struct device_node *child = NULL;
const char *sgaclk_parent = NULL;
- struct clk *clk, *rtc_clk, *twd_clk;
+ struct clk_core *clk, *rtc_clk, *twd_clk;
if (of_have_populated_dt())
np = of_find_matching_node(NULL, u8500_clk_of_match);
diff --git a/drivers/clk/ux500/u8540_clk.c b/drivers/clk/ux500/u8540_clk.c
index 20c8add..a508845 100644
--- a/drivers/clk/ux500/u8540_clk.c
+++ b/drivers/clk/ux500/u8540_clk.c
@@ -7,7 +7,6 @@
* License terms: GNU General Public License (GPL) version 2
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/mfd/dbx500-prcmu.h>
@@ -17,7 +16,7 @@
void u8540_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
u32 clkrst5_base, u32 clkrst6_base)
{
- struct clk *clk;
+ struct clk_core *clk;
/* Clock sources. */
/* Fixed ClockGen */
diff --git a/drivers/clk/ux500/u9540_clk.c b/drivers/clk/ux500/u9540_clk.c
index 4479478..89055ae 100644
--- a/drivers/clk/ux500/u9540_clk.c
+++ b/drivers/clk/ux500/u9540_clk.c
@@ -7,7 +7,6 @@
* License terms: GNU General Public License (GPL) version 2
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/mfd/dbx500-prcmu.h>
diff --git a/drivers/clk/versatile/clk-icst.c b/drivers/clk/versatile/clk-icst.c
index bc96f10..d5719e0 100644
--- a/drivers/clk/versatile/clk-icst.c
+++ b/drivers/clk/versatile/clk-icst.c
@@ -13,7 +13,6 @@
* ICST clock code from the ARM tree should probably be merged into this
* file.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/err.h>
#include <linux/clk-provider.h>
@@ -121,13 +120,13 @@ static const struct clk_ops icst_ops = {
.set_rate = icst_set_rate,
};
-struct clk *icst_clk_register(struct device *dev,
+struct clk_core *icst_clk_register(struct device *dev,
const struct clk_icst_desc *desc,
const char *name,
const char *parent_name,
void __iomem *base)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_icst *icst;
struct clk_init_data init;
struct icst_params *pclone;
diff --git a/drivers/clk/versatile/clk-icst.h b/drivers/clk/versatile/clk-icst.h
index 04e6f0a..ede867b 100644
--- a/drivers/clk/versatile/clk-icst.h
+++ b/drivers/clk/versatile/clk-icst.h
@@ -13,7 +13,7 @@ struct clk_icst_desc {
u32 lock_offset;
};
-struct clk *icst_clk_register(struct device *dev,
+struct clk_core *icst_clk_register(struct device *dev,
const struct clk_icst_desc *desc,
const char *name,
const char *parent_name,
diff --git a/drivers/clk/versatile/clk-impd1.c b/drivers/clk/versatile/clk-impd1.c
index 1cc1330..46680db 100644
--- a/drivers/clk/versatile/clk-impd1.c
+++ b/drivers/clk/versatile/clk-impd1.c
@@ -7,7 +7,6 @@
* published by the Free Software Foundation.
*/
#include <linux/clk-provider.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/err.h>
#include <linux/io.h>
@@ -21,18 +20,18 @@
struct impd1_clk {
char *pclkname;
- struct clk *pclk;
+ struct clk_core *pclk;
char *vco1name;
- struct clk *vco1clk;
+ struct clk_core *vco1clk;
char *vco2name;
- struct clk *vco2clk;
- struct clk *mmciclk;
+ struct clk_core *vco2clk;
+ struct clk_core *mmciclk;
char *uartname;
- struct clk *uartclk;
+ struct clk_core *uartclk;
char *spiname;
- struct clk *spiclk;
+ struct clk_core *spiclk;
char *scname;
- struct clk *scclk;
+ struct clk_core *scclk;
struct clk_lookup *clks[15];
};
@@ -87,8 +86,8 @@ static const struct clk_icst_desc impd1_icst2_desc = {
void integrator_impd1_clk_init(void __iomem *base, unsigned int id)
{
struct impd1_clk *imc;
- struct clk *clk;
- struct clk *pclk;
+ struct clk_core *clk;
+ struct clk_core *pclk;
int i;
if (id > 3) {
diff --git a/drivers/clk/versatile/clk-realview.c b/drivers/clk/versatile/clk-realview.c
index c8b5231..524cba5 100644
--- a/drivers/clk/versatile/clk-realview.c
+++ b/drivers/clk/versatile/clk-realview.c
@@ -6,7 +6,6 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/err.h>
#include <linux/io.h>
@@ -50,7 +49,7 @@ static const struct clk_icst_desc __initdata realview_osc4_desc = {
*/
void __init realview_clk_init(void __iomem *sysbase, bool is_pb1176)
{
- struct clk *clk;
+ struct clk_core *clk;
/* APB clock dummy */
clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT, 0);
diff --git a/drivers/clk/versatile/clk-sp810.c b/drivers/clk/versatile/clk-sp810.c
index c6e86a9..9256d25 100644
--- a/drivers/clk/versatile/clk-sp810.c
+++ b/drivers/clk/versatile/clk-sp810.c
@@ -25,7 +25,7 @@ struct clk_sp810;
struct clk_sp810_timerclken {
struct clk_hw hw;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_sp810 *sp810;
int channel;
};
@@ -36,8 +36,8 @@ struct clk_sp810 {
void __iomem *base;
spinlock_t lock;
struct clk_sp810_timerclken timerclken[4];
- struct clk *refclk;
- struct clk *timclk;
+ struct clk_core *refclk;
+ struct clk_core *timclk;
};
static u8 clk_sp810_timerclken_get_parent(struct clk_hw *hw)
@@ -79,29 +79,31 @@ static int clk_sp810_timerclken_prepare(struct clk_hw *hw)
{
struct clk_sp810_timerclken *timerclken = to_clk_sp810_timerclken(hw);
struct clk_sp810 *sp810 = timerclken->sp810;
- struct clk *old_parent = __clk_get_parent(hw->clk);
- struct clk *new_parent;
+ struct clk_core *old_parent = __clk_get_parent(hw->clk);
+ struct clk_core *new_parent;
if (!sp810->refclk)
- sp810->refclk = of_clk_get(sp810->node, sp810->refclk_index);
+ sp810->refclk = of_clk_provider_get(sp810->node,
+ sp810->refclk_index);
if (!sp810->timclk)
- sp810->timclk = of_clk_get(sp810->node, sp810->timclk_index);
+ sp810->timclk = of_clk_provider_get(sp810->node,
+ sp810->timclk_index);
if (WARN_ON(IS_ERR(sp810->refclk) || IS_ERR(sp810->timclk)))
return -ENOENT;
/* Select fastest parent */
- if (clk_get_rate(sp810->refclk) > clk_get_rate(sp810->timclk))
+ if (clk_provider_get_rate(sp810->refclk) > clk_provider_get_rate(sp810->timclk))
new_parent = sp810->refclk;
else
new_parent = sp810->timclk;
/* Switch the parent if necessary */
if (old_parent != new_parent) {
- clk_prepare(new_parent);
- clk_set_parent(hw->clk, new_parent);
- clk_unprepare(old_parent);
+ clk_provider_prepare(new_parent);
+ clk_provider_set_parent(hw->clk, new_parent);
+ clk_provider_unprepare(old_parent);
}
return 0;
@@ -112,8 +114,8 @@ static void clk_sp810_timerclken_unprepare(struct clk_hw *hw)
struct clk_sp810_timerclken *timerclken = to_clk_sp810_timerclken(hw);
struct clk_sp810 *sp810 = timerclken->sp810;
- clk_put(sp810->timclk);
- clk_put(sp810->refclk);
+ __clk_put(sp810->timclk);
+ __clk_put(sp810->refclk);
}
static const struct clk_ops clk_sp810_timerclken_ops = {
@@ -123,7 +125,7 @@ static const struct clk_ops clk_sp810_timerclken_ops = {
.set_parent = clk_sp810_timerclken_set_parent,
};
-static struct clk *clk_sp810_timerclken_of_get(struct of_phandle_args *clkspec,
+static struct clk_core *clk_sp810_timerclken_of_get(struct of_phandle_args *clkspec,
void *data)
{
struct clk_sp810 *sp810 = data;
diff --git a/drivers/clk/versatile/clk-versatile.c b/drivers/clk/versatile/clk-versatile.c
index a76981e..1bdd542 100644
--- a/drivers/clk/versatile/clk-versatile.c
+++ b/drivers/clk/versatile/clk-versatile.c
@@ -8,7 +8,6 @@
* published by the Free Software Foundation.
*/
#include <linux/clk-provider.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/err.h>
#include <linux/of.h>
@@ -60,7 +59,7 @@ static const struct clk_icst_desc versatile_auxosc_desc __initconst = {
static void __init cm_osc_setup(struct device_node *np,
const struct clk_icst_desc *desc)
{
- struct clk *clk = ERR_PTR(-EINVAL);
+ struct clk_core *clk = ERR_PTR(-EINVAL);
const char *clk_name = np->name;
const char *parent_name;
diff --git a/drivers/clk/versatile/clk-vexpress-osc.c b/drivers/clk/versatile/clk-vexpress-osc.c
index 529a59c..c9e175f 100644
--- a/drivers/clk/versatile/clk-vexpress-osc.c
+++ b/drivers/clk/versatile/clk-vexpress-osc.c
@@ -73,7 +73,7 @@ static int vexpress_osc_probe(struct platform_device *pdev)
struct clk_lookup *cl = pdev->dev.platform_data; /* Non-DT lookup */
struct clk_init_data init;
struct vexpress_osc *osc;
- struct clk *clk;
+ struct clk_core *clk;
u32 range[2];
osc = devm_kzalloc(&pdev->dev, sizeof(*osc), GFP_KERNEL);
diff --git a/drivers/clk/versatile/clk-vexpress.c b/drivers/clk/versatile/clk-vexpress.c
index 2d5e1b4..e77f3d5 100644
--- a/drivers/clk/versatile/clk-vexpress.c
+++ b/drivers/clk/versatile/clk-vexpress.c
@@ -17,7 +17,7 @@
#include <linux/err.h>
#include <linux/vexpress.h>
-static struct clk *vexpress_sp810_timerclken[4];
+static struct clk_core *vexpress_sp810_timerclken[4];
static DEFINE_SPINLOCK(vexpress_sp810_lock);
static void __init vexpress_sp810_init(void __iomem *base)
@@ -54,7 +54,7 @@ static const char * const vexpress_clk_24mhz_periphs[] __initconst = {
void __init vexpress_clk_init(void __iomem *sp810_base)
{
- struct clk *clk;
+ struct clk_core *clk;
int i;
clk = clk_register_fixed_rate(NULL, "dummy_apb_pclk", NULL,
@@ -77,7 +77,7 @@ void __init vexpress_clk_init(void __iomem *sp810_base)
vexpress_sp810_init(sp810_base);
for (i = 0; i < ARRAY_SIZE(vexpress_sp810_timerclken); i++)
- WARN_ON(clk_set_parent(vexpress_sp810_timerclken[i], clk));
+ WARN_ON(clk_provider_set_parent(vexpress_sp810_timerclken[i], clk));
WARN_ON(clk_register_clkdev(vexpress_sp810_timerclken[0],
"v2m-timer0", "sp804"));
diff --git a/drivers/clk/x86/clk-lpt.c b/drivers/clk/x86/clk-lpt.c
index 812f83f..fbb6807 100644
--- a/drivers/clk/x86/clk-lpt.c
+++ b/drivers/clk/x86/clk-lpt.c
@@ -10,7 +10,6 @@
* published by the Free Software Foundation.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/err.h>
@@ -21,7 +20,7 @@
static int lpt_clk_probe(struct platform_device *pdev)
{
struct lpss_clk_data *drvdata;
- struct clk *clk;
+ struct clk_core *clk;
drvdata = devm_kzalloc(&pdev->dev, sizeof(*drvdata), GFP_KERNEL);
if (!drvdata)
diff --git a/drivers/clk/zynq/clkc.c b/drivers/clk/zynq/clkc.c
index 246cf12..0efdd9a 100644
--- a/drivers/clk/zynq/clkc.c
+++ b/drivers/clk/zynq/clkc.c
@@ -67,8 +67,8 @@ enum zynq_clk {
i2c0_aper, i2c1_aper, uart0_aper, uart1_aper, gpio_aper, lqspi_aper,
smc_aper, swdt, dbg_trc, dbg_apb, clk_max};
-static struct clk *ps_clk;
-static struct clk *clks[clk_max];
+static struct clk_core *ps_clk;
+static struct clk_core *clks[clk_max];
static struct clk_onecell_data clk_data;
static DEFINE_SPINLOCK(armpll_lock);
@@ -108,7 +108,7 @@ static void __init zynq_clk_register_fclk(enum zynq_clk fclk,
const char *clk_name, void __iomem *fclk_ctrl_reg,
const char **parents, int enable)
{
- struct clk *clk;
+ struct clk_core *clk;
u32 enable_reg;
char *mux_name;
char *div0_name;
@@ -154,7 +154,7 @@ static void __init zynq_clk_register_fclk(enum zynq_clk fclk,
0, CLK_GATE_SET_TO_DISABLE, fclk_gate_lock);
enable_reg = clk_readl(fclk_gate_reg) & 1;
if (enable && !enable_reg) {
- if (clk_prepare_enable(clks[fclk]))
+ if (clk_provider_prepare_enable(clks[fclk]))
pr_warn("%s: FCLK%u enable failed\n", __func__,
fclk - fclk0);
}
@@ -181,7 +181,7 @@ static void __init zynq_clk_register_periph_clk(enum zynq_clk clk0,
const char *clk_name1, void __iomem *clk_ctrl,
const char **parents, unsigned int two_gates)
{
- struct clk *clk;
+ struct clk_core *clk;
char *mux_name;
char *div_name;
spinlock_t *lock;
@@ -222,7 +222,7 @@ static void __init zynq_clk_setup(struct device_node *np)
int i;
u32 tmp;
int ret;
- struct clk *clk;
+ struct clk_core *clk;
char *clk_name;
unsigned int fclk_enable = 0;
const char *clk_output_name[clk_max];
@@ -333,13 +333,13 @@ static void __init zynq_clk_setup(struct device_node *np)
CLK_DIVIDER_ALLOW_ZERO, &ddrclk_lock);
clks[ddr2x] = clk_register_gate(NULL, clk_output_name[ddr2x],
"ddr2x_div", 0, SLCR_DDR_CLK_CTRL, 1, 0, &ddrclk_lock);
- clk_prepare_enable(clks[ddr2x]);
+ clk_provider_prepare_enable(clks[ddr2x]);
clk = clk_register_divider(NULL, "ddr3x_div", "ddrpll", 0,
SLCR_DDR_CLK_CTRL, 20, 6, CLK_DIVIDER_ONE_BASED |
CLK_DIVIDER_ALLOW_ZERO, &ddrclk_lock);
clks[ddr3x] = clk_register_gate(NULL, clk_output_name[ddr3x],
"ddr3x_div", 0, SLCR_DDR_CLK_CTRL, 0, 0, &ddrclk_lock);
- clk_prepare_enable(clks[ddr3x]);
+ clk_provider_prepare_enable(clks[ddr3x]);
clk = clk_register_divider(NULL, "dci_div0", "ddrpll", 0,
SLCR_DCI_CLK_CTRL, 8, 6, CLK_DIVIDER_ONE_BASED |
@@ -351,7 +351,7 @@ static void __init zynq_clk_setup(struct device_node *np)
clks[dci] = clk_register_gate(NULL, clk_output_name[dci], "dci_div1",
CLK_SET_RATE_PARENT, SLCR_DCI_CLK_CTRL, 0, 0,
&dciclk_lock);
- clk_prepare_enable(clks[dci]);
+ clk_provider_prepare_enable(clks[dci]);
/* Peripheral clocks */
for (i = fclk0; i <= fclk3; i++) {
@@ -505,10 +505,10 @@ static void __init zynq_clk_setup(struct device_node *np)
/* leave debug clocks in the state the bootloader set them up to */
tmp = clk_readl(SLCR_DBG_CLK_CTRL);
if (tmp & DBG_CLK_CTRL_CLKACT_TRC)
- if (clk_prepare_enable(clks[dbg_trc]))
+ if (clk_provider_prepare_enable(clks[dbg_trc]))
pr_warn("%s: trace clk enable failed\n", __func__);
if (tmp & DBG_CLK_CTRL_CPU_1XCLKACT)
- if (clk_prepare_enable(clks[dbg_apb]))
+ if (clk_provider_prepare_enable(clks[dbg_apb]))
pr_warn("%s: debug APB clk enable failed\n", __func__);
/* One gated clock for all APER clocks. */
diff --git a/drivers/clk/zynq/pll.c b/drivers/clk/zynq/pll.c
index cec9759..5176f65 100644
--- a/drivers/clk/zynq/pll.c
+++ b/drivers/clk/zynq/pll.c
@@ -193,12 +193,12 @@ static const struct clk_ops zynq_pll_ops = {
* @lock Register lock
* Returns handle to the registered clock.
*/
-struct clk *clk_register_zynq_pll(const char *name, const char *parent,
+struct clk_core *clk_register_zynq_pll(const char *name, const char *parent,
void __iomem *pll_ctrl, void __iomem *pll_status, u8 lock_index,
spinlock_t *lock)
{
struct zynq_pll *pll;
- struct clk *clk;
+ struct clk_core *clk;
u32 reg;
const char *parent_arr[1] = {parent};
unsigned long flags = 0;
diff --git a/drivers/gpu/drm/msm/hdmi/hdmi_phy_8960.c b/drivers/gpu/drm/msm/hdmi/hdmi_phy_8960.c
index 902d768..8e97702 100644
--- a/drivers/gpu/drm/msm/hdmi/hdmi_phy_8960.c
+++ b/drivers/gpu/drm/msm/hdmi/hdmi_phy_8960.c
@@ -15,7 +15,6 @@
* this program. If not, see <http://www.gnu.org/licenses/>.
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include "hdmi.h"
@@ -24,7 +23,7 @@ struct hdmi_phy_8960 {
struct hdmi_phy base;
struct hdmi *hdmi;
struct clk_hw pll_hw;
- struct clk *pll;
+ struct clk_core *pll;
unsigned long pixclk;
};
#define to_hdmi_phy_8960(x) container_of(x, struct hdmi_phy_8960, base)
diff --git a/drivers/media/platform/exynos4-is/media-dev.c b/drivers/media/platform/exynos4-is/media-dev.c
index 2620c48..2fdadd8 100644
--- a/drivers/media/platform/exynos4-is/media-dev.c
+++ b/drivers/media/platform/exynos4-is/media-dev.c
@@ -11,7 +11,6 @@
*/
#include <linux/bug.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/device.h>
@@ -215,7 +214,7 @@ static int __fimc_pipeline_open(struct exynos_media_pipeline *ep,
/* Disable PXLASYNC clock if this pipeline includes FIMC-IS */
if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) {
- ret = clk_prepare_enable(fmd->wbclk[CLK_IDX_WB_B]);
+ ret = clk_provider_prepare_enable(fmd->wbclk[CLK_IDX_WB_B]);
if (ret < 0)
return ret;
}
@@ -225,7 +224,7 @@ static int __fimc_pipeline_open(struct exynos_media_pipeline *ep,
return 0;
if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP])
- clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]);
+ clk_provider_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]);
return ret;
}
@@ -254,7 +253,7 @@ static int __fimc_pipeline_close(struct exynos_media_pipeline *ep)
/* Disable PXLASYNC clock if this pipeline includes FIMC-IS */
if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP])
- clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]);
+ clk_provider_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]);
return ret == -ENXIO ? 0 : ret;
}
@@ -954,7 +953,7 @@ static void fimc_md_put_clocks(struct fimc_md *fmd)
while (--i >= 0) {
if (IS_ERR(fmd->camclk[i].clock))
continue;
- clk_put(fmd->camclk[i].clock);
+ __clk_put(fmd->camclk[i].clock);
fmd->camclk[i].clock = ERR_PTR(-EINVAL);
}
@@ -962,7 +961,7 @@ static void fimc_md_put_clocks(struct fimc_md *fmd)
for (i = 0; i < FIMC_MAX_WBCLKS; i++) {
if (IS_ERR(fmd->wbclk[i]))
continue;
- clk_put(fmd->wbclk[i]);
+ __clk_put(fmd->wbclk[i]);
fmd->wbclk[i] = ERR_PTR(-EINVAL);
}
}
@@ -971,7 +970,7 @@ static int fimc_md_get_clocks(struct fimc_md *fmd)
{
struct device *dev = &fmd->pdev->dev;
char clk_name[32];
- struct clk *clock;
+ struct clk_core *clock;
int i, ret = 0;
for (i = 0; i < FIMC_MAX_CAMCLKS; i++)
@@ -979,7 +978,7 @@ static int fimc_md_get_clocks(struct fimc_md *fmd)
for (i = 0; i < FIMC_MAX_CAMCLKS; i++) {
snprintf(clk_name, sizeof(clk_name), "sclk_cam%u", i);
- clock = clk_get(dev, clk_name);
+ clock = clk_provider_get(dev, clk_name);
if (IS_ERR(clock)) {
dev_err(dev, "Failed to get clock: %s\n", clk_name);
@@ -1001,7 +1000,7 @@ static int fimc_md_get_clocks(struct fimc_md *fmd)
for (i = CLK_IDX_WB_B; i < FIMC_MAX_WBCLKS; i++) {
snprintf(clk_name, sizeof(clk_name), "pxl_async%u", i);
- clock = clk_get(dev, clk_name);
+ clock = clk_provider_get(dev, clk_name);
if (IS_ERR(clock)) {
v4l2_err(&fmd->v4l2_dev, "Failed to get clock: %s\n",
clk_name);
diff --git a/drivers/media/platform/exynos4-is/media-dev.h b/drivers/media/platform/exynos4-is/media-dev.h
index 0321454..f24dac6 100644
--- a/drivers/media/platform/exynos4-is/media-dev.h
+++ b/drivers/media/platform/exynos4-is/media-dev.h
@@ -9,7 +9,6 @@
#ifndef FIMC_MDEVICE_H_
#define FIMC_MDEVICE_H_
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/platform_device.h>
#include <linux/mutex.h>
@@ -72,7 +71,7 @@ struct fimc_csis_info {
};
struct fimc_camclk_info {
- struct clk *clock;
+ struct clk_core *clock;
int use_count;
unsigned long frequency;
};
@@ -124,7 +123,7 @@ struct fimc_md {
struct fimc_sensor_info sensor[FIMC_MAX_SENSORS];
int num_sensors;
struct fimc_camclk_info camclk[FIMC_MAX_CAMCLKS];
- struct clk *wbclk[FIMC_MAX_WBCLKS];
+ struct clk_core *wbclk[FIMC_MAX_WBCLKS];
struct fimc_lite *fimc_lite[FIMC_LITE_MAX_DEVS];
struct fimc_dev *fimc[FIMC_MAX_DEVS];
struct fimc_is *fimc_is;
@@ -141,7 +140,7 @@ struct fimc_md {
} pinctl;
struct cam_clk_provider {
- struct clk *clks[FIMC_MAX_CAMCLKS];
+ struct clk_core *clks[FIMC_MAX_CAMCLKS];
struct clk_onecell_data clk_data;
struct device_node *of_node;
struct cam_clk camclk[FIMC_MAX_CAMCLKS];
diff --git a/drivers/media/platform/omap3isp/isp.h b/drivers/media/platform/omap3isp/isp.h
index 2c314ee..5fcedd6 100644
--- a/drivers/media/platform/omap3isp/isp.h
+++ b/drivers/media/platform/omap3isp/isp.h
@@ -133,7 +133,7 @@ struct isp_xclk {
struct isp_device *isp;
struct clk_hw hw;
struct clk_lookup *lookup;
- struct clk *clk;
+ struct clk_core *clk;
enum isp_xclk_id id;
spinlock_t lock; /* Protects enabled and divider */
diff --git a/drivers/rtc/rtc-hym8563.c b/drivers/rtc/rtc-hym8563.c
index b936bb4..ea21bd1 100644
--- a/drivers/rtc/rtc-hym8563.c
+++ b/drivers/rtc/rtc-hym8563.c
@@ -398,11 +398,11 @@ static const struct clk_ops hym8563_clkout_ops = {
.set_rate = hym8563_clkout_set_rate,
};
-static struct clk *hym8563_clkout_register_clk(struct hym8563 *hym8563)
+static struct clk_core *hym8563_clkout_register_clk(struct hym8563 *hym8563)
{
struct i2c_client *client = hym8563->client;
struct device_node *node = client->dev.of_node;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
int ret;
diff --git a/drivers/staging/imx-drm/imx-tve.c b/drivers/staging/imx-drm/imx-tve.c
index c628fcd..458170b 100644
--- a/drivers/staging/imx-drm/imx-tve.c
+++ b/drivers/staging/imx-drm/imx-tve.c
@@ -18,7 +18,6 @@
* MA 02110-1301, USA.
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/component.h>
#include <linux/module.h>
@@ -121,10 +120,10 @@ struct imx_tve {
struct regmap *regmap;
struct regulator *dac_reg;
struct i2c_adapter *ddc;
- struct clk *clk;
- struct clk *di_sel_clk;
+ struct clk_core *clk;
+ struct clk_core *di_sel_clk;
struct clk_hw clk_hw_di;
- struct clk *di_clk;
+ struct clk_core *di_clk;
int vsync_pin;
int hsync_pin;
};
@@ -149,7 +148,7 @@ static void tve_enable(struct imx_tve *tve)
if (!tve->enabled) {
tve->enabled = true;
- clk_prepare_enable(tve->clk);
+ clk_provider_prepare_enable(tve->clk);
ret = regmap_update_bits(tve->regmap, TVE_COM_CONF_REG,
TVE_IPU_CLK_EN | TVE_EN,
TVE_IPU_CLK_EN | TVE_EN);
@@ -176,7 +175,7 @@ static void tve_disable(struct imx_tve *tve)
tve->enabled = false;
ret = regmap_update_bits(tve->regmap, TVE_COM_CONF_REG,
TVE_IPU_CLK_EN | TVE_EN, 0);
- clk_disable_unprepare(tve->clk);
+ clk_provider_disable_unprepare(tve->clk);
}
}
@@ -251,12 +250,12 @@ static int imx_tve_connector_mode_valid(struct drm_connector *connector,
unsigned long rate;
/* pixel clock with 2x oversampling */
- rate = clk_round_rate(tve->clk, 2000UL * mode->clock) / 2000;
+ rate = clk_provider_round_rate(tve->clk, 2000UL * mode->clock) / 2000;
if (rate == mode->clock)
return MODE_OK;
/* pixel clock without oversampling */
- rate = clk_round_rate(tve->clk, 1000UL * mode->clock) / 1000;
+ rate = clk_provider_round_rate(tve->clk, 1000UL * mode->clock) / 1000;
if (rate == mode->clock)
return MODE_OK;
@@ -325,13 +324,13 @@ static void imx_tve_encoder_mode_set(struct drm_encoder *encoder,
* and enable 4x oversampling for lower resolutions
*/
rate = 2000UL * mode->clock;
- clk_set_rate(tve->clk, rate);
- rounded_rate = clk_get_rate(tve->clk);
+ clk_provider_set_rate(tve->clk, rate);
+ rounded_rate = clk_provider_get_rate(tve->clk);
if (rounded_rate >= rate)
div = 2;
- clk_set_rate(tve->di_clk, rounded_rate / div);
+ clk_provider_set_rate(tve->di_clk, rounded_rate / div);
- ret = clk_set_parent(tve->di_sel_clk, tve->di_clk);
+ ret = clk_provider_set_parent(tve->di_sel_clk, tve->di_clk);
if (ret < 0) {
dev_err(tve->dev, "failed to set di_sel parent to tve_di: %d\n",
ret);
@@ -643,7 +642,7 @@ static int imx_tve_bind(struct device *dev, struct device *master, void *data)
return ret;
}
- tve->clk = devm_clk_get(dev, "tve");
+ tve->clk = devm_clk_provider_get(dev, "tve");
if (IS_ERR(tve->clk)) {
dev_err(dev, "failed to get high speed tve clock: %ld\n",
PTR_ERR(tve->clk));
@@ -651,7 +650,7 @@ static int imx_tve_bind(struct device *dev, struct device *master, void *data)
}
/* this is the IPU DI clock input selector, can be parented to tve_di */
- tve->di_sel_clk = devm_clk_get(dev, "di_sel");
+ tve->di_sel_clk = devm_clk_provider_get(dev, "di_sel");
if (IS_ERR(tve->di_sel_clk)) {
dev_err(dev, "failed to get ipu di mux clock: %ld\n",
PTR_ERR(tve->di_sel_clk));
diff --git a/include/linux/clk/ti.h b/include/linux/clk/ti.h
index e8d8a35..6b9e6b4 100644
--- a/include/linux/clk/ti.h
+++ b/include/linux/clk/ti.h
@@ -22,8 +22,8 @@
* @mult_div1_reg: register containing the DPLL M and N bitfields
* @mult_mask: mask of the DPLL M bitfield in @mult_div1_reg
* @div1_mask: mask of the DPLL N bitfield in @mult_div1_reg
- * @clk_bypass: struct clk pointer to the clock's bypass clock input
- * @clk_ref: struct clk pointer to the clock's reference clock input
+ * @clk_bypass: struct clk_core pointer to the clock's bypass clock input
+ * @clk_ref: struct clk_core pointer to the clock's reference clock input
* @control_reg: register containing the DPLL mode bitfield
* @enable_mask: mask of the DPLL mode bitfield in @control_reg
* @last_rounded_rate: cache of the last rate result of omap2_dpll_round_rate()
@@ -68,8 +68,8 @@ struct dpll_data {
void __iomem *mult_div1_reg;
u32 mult_mask;
u32 div1_mask;
- struct clk *clk_bypass;
- struct clk *clk_ref;
+ struct clk_core *clk_bypass;
+ struct clk_core *clk_ref;
void __iomem *control_reg;
u32 enable_mask;
unsigned long last_rounded_rate;
@@ -251,7 +251,7 @@ extern const struct clk_ops ti_clk_mux_ops;
#define to_clk_hw_omap(_hw) container_of(_hw, struct clk_hw_omap, hw)
-void omap2_init_clk_hw_omap_clocks(struct clk *clk);
+void omap2_init_clk_hw_omap_clocks(struct clk_core *clk);
int omap3_noncore_dpll_enable(struct clk_hw *hw);
void omap3_noncore_dpll_disable(struct clk_hw *hw);
int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate,
diff --git a/include/linux/clk/zynq.h b/include/linux/clk/zynq.h
index a990a59..6c35291 100644
--- a/include/linux/clk/zynq.h
+++ b/include/linux/clk/zynq.h
@@ -25,7 +25,7 @@
void zynq_clock_init(void);
-struct clk *clk_register_zynq_pll(const char *name, const char *parent,
+struct clk_core *clk_register_zynq_pll(const char *name, const char *parent,
void __iomem *pll_ctrl, void __iomem *pll_status, u8 lock_index,
spinlock_t *lock);
#endif
diff --git a/include/linux/platform_data/clk-lpss.h b/include/linux/platform_data/clk-lpss.h
index 2390199..3c3237c 100644
--- a/include/linux/platform_data/clk-lpss.h
+++ b/include/linux/platform_data/clk-lpss.h
@@ -15,7 +15,7 @@
struct lpss_clk_data {
const char *name;
- struct clk *clk;
+ struct clk_core *clk;
};
extern int lpt_clk_init(void);
diff --git a/include/linux/platform_data/si5351.h b/include/linux/platform_data/si5351.h
index a947ab8..4b34c69 100644
--- a/include/linux/platform_data/si5351.h
+++ b/include/linux/platform_data/si5351.h
@@ -107,8 +107,8 @@ struct si5351_clkout_config {
* @clkout: array of clkout configuration
*/
struct si5351_platform_data {
- struct clk *clk_xtal;
- struct clk *clk_clkin;
+ struct clk_core *clk_xtal;
+ struct clk_core *clk_clkin;
enum si5351_pll_src pll_src[2];
struct si5351_clkout_config clkout[8];
};
diff --git a/sound/soc/mxs/mxs-saif.c b/sound/soc/mxs/mxs-saif.c
index 231d7e7..a24367d 100644
--- a/sound/soc/mxs/mxs-saif.c
+++ b/sound/soc/mxs/mxs-saif.c
@@ -682,11 +682,11 @@ static int mxs_saif_mclk_init(struct platform_device *pdev)
{
struct mxs_saif *saif = platform_get_drvdata(pdev);
struct device_node *np = pdev->dev.of_node;
- struct clk *clk;
+ struct clk_core *clk;
int ret;
clk = clk_register_divider(&pdev->dev, "mxs_saif_mclk",
- __clk_get_name(saif->clk), 0,
+ clk_get_name(saif->clk), 0,
saif->base + SAIF_CTRL,
BP_SAIF_CTRL_BITCLK_MULT_RATE, 3,
0, NULL);
--
1.9.3
1
0

[alsa-devel] [PATCH] ALSA: hda - Fix invalid pin powermap without jack detection
by Takashi Iwai 11 Sep '14
by Takashi Iwai 11 Sep '14
11 Sep '14
When a driver is set up without the jack detection explicitly (either
by passing a model option or via a specific fixup), the pin powermap
of IDT/STAC codecs is set up wrongly, resulting in the silence
output. It's because of a logic failure in stac_init_power_map().
It tries to avoid creating a callback for the pins that have other
auto-hp and auto-mic callbacks, but the check is done in a wrong way
at a wrong time. The stac_init_power_map() should be called after
creating other jack detection ctls, and the jack callback should be
created only for jack-detectable widgets.
This patch fixes the check in stac_init_power_map() and its callee
at the right place, after snd_hda_gen_build_controls().
Reported-by: Adam Richter <adam_richter2004(a)yahoo.com>
Cc: <stable(a)vger.kernel.org>
Signed-off-by: Takashi Iwai <tiwai(a)suse.de>
---
This is the patch with a proper changelog.
Adam, let me know if this really works for you. Once after confirmed,
I'll queue it to for-linus branch.
thanks,
Takashi
sound/pci/hda/patch_sigmatel.c | 17 ++++++++++++-----
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git a/sound/pci/hda/patch_sigmatel.c b/sound/pci/hda/patch_sigmatel.c
index ea823e1100da..98cd1908c039 100644
--- a/sound/pci/hda/patch_sigmatel.c
+++ b/sound/pci/hda/patch_sigmatel.c
@@ -566,8 +566,8 @@ static void stac_init_power_map(struct hda_codec *codec)
if (snd_hda_jack_tbl_get(codec, nid))
continue;
if (def_conf == AC_JACK_PORT_COMPLEX &&
- !(spec->vref_mute_led_nid == nid ||
- is_jack_detectable(codec, nid))) {
+ spec->vref_mute_led_nid != nid &&
+ is_jack_detectable(codec, nid)) {
snd_hda_jack_detect_enable_callback(codec, nid,
STAC_PWR_EVENT,
jack_update_power);
@@ -4276,11 +4276,18 @@ static int stac_parse_auto_config(struct hda_codec *codec)
return err;
}
- stac_init_power_map(codec);
-
return 0;
}
+static int stac_build_controls(struct hda_codec *codec)
+{
+ int err = snd_hda_gen_build_controls(codec);
+
+ if (err < 0)
+ return err;
+ stac_init_power_map(codec);
+ return 0;
+}
static int stac_init(struct hda_codec *codec)
{
@@ -4392,7 +4399,7 @@ static int stac_suspend(struct hda_codec *codec)
#endif /* CONFIG_PM */
static const struct hda_codec_ops stac_patch_ops = {
- .build_controls = snd_hda_gen_build_controls,
+ .build_controls = stac_build_controls,
.build_pcms = snd_hda_gen_build_pcms,
.init = stac_init,
.free = stac_free,
--
2.1.0
1
0

11 Sep '14
Hi,
here is a series of patches that can be applied on the top of my
for-next branch including the patches for nonatomic PCM ops
support. They rewrite a few drivers to use this new feature,
mostly by converting to the threaded irq from tasklet and merging
the code into the original trigger callback.
I've tested a few Digigram devices I have, but some are just
compile-tested.
[PATCH 1/6] pcmcia: Add pcmcia_request_threaded_irq()
[PATCH 2/6] ALSA: vx: Use nonatomic PCM ops
[PATCH 3/6] ALSA: mixart: Use nonatomic PCM ops
[PATCH 4/6] ALSA: pcxhr: Use nonatomic PCM ops
[PATCH 5/6] ALSA: lx6464es: Use nonatomic PCM ops
[PATCH 6/6] ALSA: pdaudiocf: Use nonatomic PCM ops
Takashi
1
6

11 Sep '14
Hello Qiao Zhou,
The patch 8f70e515a8bb: "ASoC: soc-pcm: fix dpcm_path_get error
handling" from Sep 10, 2014, leads to the following static checker
warning:
sound/soc/soc-compress.c:149 soc_compr_open_fe()
error: double unlock 'mutex:&fe->card->mutex'
sound/soc/soc-compress.c
104 ret = dpcm_path_get(fe, stream, &list);
105 if (ret < 0) {
106 mutex_unlock(&fe->card->mutex);
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
First unlock.
107 goto fe_err;
108 } else if (ret == 0) {
109 dev_dbg(fe->dev, "ASoC: %s no valid %s route\n",
110 fe->dai_link->name, stream ? "capture" : "playback");
111 }
112
[ snip ]
140
141 fe_err:
142 if (fe->dai_link->compr_ops && fe->dai_link->compr_ops->shutdown)
143 fe->dai_link->compr_ops->shutdown(cstream);
144 machine_err:
145 if (platform->driver->compr_ops && platform->driver->compr_ops->free)
146 platform->driver->compr_ops->free(cstream);
147 out:
148 fe->dpcm[stream].runtime_update = SND_SOC_DPCM_UPDATE_NO;
149 mutex_unlock(&fe->card->mutex);
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Second unlock.
150 return ret;
151 }
regards,
dan carpenter
2
1

Re: [alsa-devel] ALSA Core: Sound Card registration (CPU --> CODEC_1 --> CODEC_2)
by noman pouigt 11 Sep '14
by noman pouigt 11 Sep '14
11 Sep '14
> We have a question regarding how sound card can be registered for the
> following scenario:
>
> CPU connecting to Audio CODEC_1 and then CODEC_1 connecting to another
> Audio CODEC_2 (over some bus like i2c). CODEC_1 can be represented as a
so you mean codec_1 is controlling codec_2 ? or you mean
the CPU is going to control both the codecs?
> codec_dai and can be registered to ASoC framework (with
> snd_soc_register_codec()) during system boot up. However, for end-to-end
> audio to work on this system, we also need CODEC_2 somehow registered to
> ASoC framework so that audio path on CODEC_2 can configured.
>From this i understand that your CPU is going to configure the codec_2
but then why it is connected to codec_1 with i2c?
>
> Could you please let us know if CODEC_2 can also registered as another dai
> and if yes, how it can be achieved ? Or is there any other way to
> probe_defer sound card registration till CODEC_2 is enumerated on the bus.
why not register both as codecs to the ALSA? Anyway i think
ALSA can support multiple codecs.
> In this case, to what component of the sound card dailink structure, the
> Audio CODEC_2 can be represented ?
as a codec. However this would not work if there is a dependecny in detection
i.e. if you have a requirement where codec_1 needs to be detected first
and then codec_2 then probably you need a different approach as there
is no way to set dependency.
>
> Please share your thoughts on this.
I would explain more about the setup if i were you to get ideas from
ALSA experts.
>
> Best Regards,
> Phani
>
> The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
> hosted by The Linux Foundation
>
>
>
> ------------------------------
>
> Message: 2
> Date: Thu, 4 Sep 2014 12:03:52 +0530
> From: Vinod Koul <vinod.koul(a)intel.com>
> To: Lars-Peter Clausen <lars(a)metafoo.de>
> Cc: alsa-devel(a)alsa-project.org, Mark Brown <broonie(a)kernel.org>,
> "Subhransu S. Prusty" <subhransu.s.prusty(a)intel.com>, Liam Girdwood
> <lgirdwood(a)gmail.com>
> Subject: Re: [alsa-devel] [PATCH 1/4] ASoC: Add
> snd_soc_component_{get, set}_drvdata()
> Message-ID: <20140904063352.GC1610(a)intel.com>
> Content-Type: text/plain; charset=us-ascii
>
> On Wed, Sep 03, 2014 at 09:06:49PM +0200, Lars-Peter Clausen wrote:
>> On 09/03/2014 02:22 PM, Vinod Koul wrote:
>> >On Wed, Aug 20, 2014 at 01:08:46PM +0200, Lars-Peter Clausen wrote:
>> >>Add Add snd_soc_component_{get,set}_drvdata() similar to
>> >>snd_soc_codec_{get,set}_drvdata() and
>> >> snd_soc_platform_{get,set}_drvdata().
>> >>Also update them to use the new functions internally.
>> >>
>> >>Signed-off-by: Lars-Peter Clausen <lars(a)metafoo.de>
>> >Reviewed-by: Vinod Koul <vinod.koul(a)intel.com>
>>
>> Is this for the first patch or for the whole series?
> Patch only. The HSW driver changes, I think Liam should ack
>
> --
> ~Vinod
>
>
>
> ------------------------------
>
> Message: 3
> Date: Thu, 4 Sep 2014 10:52:53 +0300
> From: Peter Ujfalusi <peter.ujfalusi(a)ti.com>
> To: Mark Brown <broonie(a)kernel.org>, Liam Girdwood
> <lgirdwood(a)gmail.com>
> Cc: alsa-devel(a)alsa-project.org, jsarha(a)ti.com, zonque(a)gmail.com
> Subject: [alsa-devel] [PATCH] ASoC: davinci-mcasp: Correct rx format
> unit configuration
> Message-ID: <1409817173-29234-1-git-send-email-peter.ujfalusi(a)ti.com>
> Content-Type: text/plain
>
> In case of capture we should not use rotation. The reverse and mask is
> enough to get the data align correctly from the bus to MCU:
> Format data from bus after reverse (XRBUF)
> S16_LE: |LSB|MSB|xxx|xxx| |xxx|xxx|MSB|LSB|
> S24_3LE: |LSB|DAT|MSB|xxx| |xxx|MSB|DAT|LSB|
> S24_LE: |LSB|DAT|MSB|xxx| |xxx|MSB|DAT|LSB|
> S32_LE: |LSB|DAT|DAT|MSB| |MSB|DAT|DAT|LSB|
>
> With this patch all supported formats will work for playback and capture.
>
> Reported-by: Jyri Sarha <jsarha(a)ti.com> (broken S24_3LE capture)
> Signed-off-by: Peter Ujfalusi <peter.ujfalusi(a)ti.com>
> ---
> sound/soc/davinci/davinci-mcasp.c | 11 ++++++++++-
> 1 file changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/sound/soc/davinci/davinci-mcasp.c
> b/sound/soc/davinci/davinci-mcasp.c
> index 6a6b2ff7d7d7..68347b55f6e1 100644
> --- a/sound/soc/davinci/davinci-mcasp.c
> +++ b/sound/soc/davinci/davinci-mcasp.c
> @@ -467,8 +467,17 @@ static int davinci_config_channel_size(struct
> davinci_mcasp *mcasp,
> {
> u32 fmt;
> u32 tx_rotate = (word_length / 4) & 0x7;
> - u32 rx_rotate = (32 - word_length) / 4;
> u32 mask = (1ULL << word_length) - 1;
> + /*
> + * For captured data we should not rotate, inversion and masking is
> + * enoguh to get the data to the right position:
> + * Format data from bus after reverse (XRBUF)
> + * S16_LE: |LSB|MSB|xxx|xxx| |xxx|xxx|MSB|LSB|
> + * S24_3LE: |LSB|DAT|MSB|xxx| |xxx|MSB|DAT|LSB|
> + * S24_LE: |LSB|DAT|MSB|xxx| |xxx|MSB|DAT|LSB|
> + * S32_LE: |LSB|DAT|DAT|MSB| |MSB|DAT|DAT|LSB|
> + */
> + u32 rx_rotate = 0;
>
> /*
> * if s BCLK-to-LRCLK ratio has been configured via the set_clkdiv()
> --
> 2.1.0
>
>
>
> ------------------------------
>
> Message: 4
> Date: Thu, 4 Sep 2014 10:59:41 +0300
> From: Peter Ujfalusi <peter.ujfalusi(a)ti.com>
> To: Mark Brown <broonie(a)kernel.org>, Liam Girdwood
> <lgirdwood(a)gmail.com>
> Cc: alsa-devel(a)alsa-project.org, jsarha(a)ti.com
> Subject: [alsa-devel] [PATCH] ASoC: tlv320aic31xx: Enable support for
> S24_LE format
> Message-ID: <1409817581-29496-1-git-send-email-peter.ujfalusi(a)ti.com>
> Content-Type: text/plain
>
> S24_LE is the same on the bus as S24_3LE, which means the codec can support
> it.
>
> Signed-off-by: Peter Ujfalusi <peter.ujfalusi(a)ti.com>
> ---
> sound/soc/codecs/tlv320aic31xx.h | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/sound/soc/codecs/tlv320aic31xx.h
> b/sound/soc/codecs/tlv320aic31xx.h
> index 52ed57c69dfa..fe16c34607bb 100644
> --- a/sound/soc/codecs/tlv320aic31xx.h
> +++ b/sound/soc/codecs/tlv320aic31xx.h
> @@ -18,7 +18,8 @@
> #define AIC31XX_RATES SNDRV_PCM_RATE_8000_192000
>
> #define AIC31XX_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |
> SNDRV_PCM_FMTBIT_S20_3LE \
> - | SNDRV_PCM_FMTBIT_S24_3LE |
> SNDRV_PCM_FMTBIT_S32_LE)
> + | SNDRV_PCM_FMTBIT_S24_3LE |
> SNDRV_PCM_FMTBIT_S24_LE \
> + | SNDRV_PCM_FMTBIT_S32_LE)
>
>
> #define AIC31XX_STEREO_CLASS_D_BIT 0x1
> --
> 2.1.0
>
>
>
> ------------------------------
>
> Message: 5
> Date: Thu, 4 Sep 2014 17:13:06 +0800
> From: Xavier Hsu <xavier.hsu(a)linaro.org>
> To: Charles Keepax <ckeepax(a)opensource.wolfsonmicro.com>
> Cc: Andy Green <andy.green(a)linaro.org>, alsa-devel(a)alsa-project.org,
> patches(a)opensource.wolfsonmicro.com, Patch Tracking
> <patches(a)linaro.org>
> Subject: Re: [alsa-devel] [PATCHv3 5/9] Using the constraint based on
> wm8971_set_dai_sysclk
> Message-ID:
> <CAHa2TOYHbA7nEQQeqxB+r3KyA=BxXOmfQ6psuouZgqWomb=pEg(a)mail.gmail.com>
> Content-Type: text/plain; charset=UTF-8
>
> Hi Charles :
> Thanks for yours feedback.
>
> According your suggestion, I combine the redundant codes and fix some
> mistakes.
> (rates_12288[] and rates_18432[] => rates_48000[]
> rates_112896[] and rates_169344[] => rates_44100[]
> 2400 => 24000
> )
> I also add snd_pcm_hw_constraint_list() to restrict sysclk.
>
> Thanks.
>
> BR,
> Xavier
>
>
> 2014-09-02 17:28 GMT+08:00 Charles Keepax <
> ckeepax(a)opensource.wolfsonmicro.com>:
>
>> On Tue, Sep 02, 2014 at 11:27:46AM +0800, Xavier Hsu wrote:
>> > This patch improves WM8971.
>> > We use the constraint based on the function of
>> > wm8971_set_dai_sysclk().
>> >
>> > Any comments about improving the patch are welcome.
>> > Thanks.
>>
>> Comments like this are probably best put after the --- as they
>> don't need to appear in the change log.
>>
>> >
>> > Signed-off-by: Xavier Hsu <xavier.hsu(a)linaro.org>
>> > Signed-off-by: Andy Green <andy.green(a)linaro.org>
>> > ---
>> > sound/soc/codecs/wm8971.c | 77
>> +++++++++++++++++++++++++++++++++++++++++----
>> > 1 file changed, 71 insertions(+), 6 deletions(-)
>> >
>> > diff --git a/sound/soc/codecs/wm8971.c b/sound/soc/codecs/wm8971.c
>> > index 64ed226..20cfdd3 100755
>> > --- a/sound/soc/codecs/wm8971.c
>> > +++ b/sound/soc/codecs/wm8971.c
>> > @@ -41,6 +41,7 @@ static struct workqueue_struct *wm8971_workq;
>> > /* codec private data */
>> > struct wm8971_priv {
>> > unsigned int sysclk;
>> > + struct snd_pcm_hw_constraint_list *sysclk_constraints;
>> > int playback_fs;
>> > bool deemph;
>> > };
>> > @@ -528,6 +529,53 @@ static int get_coeff(int mclk, int rate)
>> > return -EINVAL;
>> > }
>> >
>> > +/* The set of rates we can generate from the above for each SYSCLK */
>> > +static const unsigned int rates_12288[] = {
>> > + 8000, 12000, 16000, 24000, 32000, 48000, 96000
>> > +};
>> > +
>> > +static struct snd_pcm_hw_constraint_list constraints_12288 = {
>> > + .count = ARRAY_SIZE(rates_12288),
>> > + .list = rates_12288,
>> > +};
>> > +
>> > +static const unsigned int rates_112896[] = {
>> > + 8000, 11025, 22050, 44100, 88200
>> > +};
>> > +
>> > +static struct snd_pcm_hw_constraint_list constraints_112896 = {
>> > + .count = ARRAY_SIZE(rates_112896),
>> > + .list = rates_112896,
>> > +};
>> > +
>> > +static const unsigned int rates_18432[] = {
>> > + 8000, 12000, 16000, 24000, 32000, 48000, 96000
>> > +};
>> > +
>> > +static struct snd_pcm_hw_constraint_list constraints_18432 = {
>> > + .count = ARRAY_SIZE(rates_18432),
>> > + .list = rates_18432,
>> > +};
>>
>> This one is identical to the 12288 array, why not combine them
>> and call them the 48k array?
>>
>> > +
>> > +static const unsigned int rates_169344[] = {
>> > + 8000, 11025, 22050, 44100, 88200
>> > +};
>>
>> This one is identical to the 112896 array, why not combine them
>> and call them the 44k1 array?
>>
>> > +
>> > +static struct snd_pcm_hw_constraint_list constraints_169344 = {
>> > + .count = ARRAY_SIZE(rates_169344),
>> > + .list = rates_169344,
>> > +};
>> > +
>> > +static const unsigned int rates_12[] = {
>> > + 8000, 11025, 12000, 16000, 22050, 2400, 32000, 41100, 48000,
>>
>> Typo 0 missing ^^^^
>>
>> > + 48000, 88235, 96000,
>> > +};
>> > +
>> > +static struct snd_pcm_hw_constraint_list constraints_12 = {
>> > + .count = ARRAY_SIZE(rates_12),
>> > + .list = rates_12,
>> > +};
>> > +
>> > static int wm8971_set_dai_sysclk(struct snd_soc_dai *codec_dai,
>> > int clk_id, unsigned int freq, int dir)
>> > {
>> > @@ -535,15 +583,32 @@ static int wm8971_set_dai_sysclk(struct
>> snd_soc_dai *codec_dai,
>> > struct wm8971_priv *wm8971 = snd_soc_codec_get_drvdata(codec);
>> >
>> > switch (freq) {
>> > - case 11289600:
>> > - case 12000000:
>> > case 12288000:
>> > - case 16934400:
>> > + case 24576000:
>> > + wm8971->sysclk_constraints = &constraints_12288;
>> > + break;
>> > + case 11289600:
>> > + case 22579200:
>> > + wm8971->sysclk_constraints = &constraints_112896;
>> > + break;
>> > case 18432000:
>> > - wm8971->sysclk = freq;
>> > - return 0;
>> > + wm8971->sysclk_constraints = &constraints_18432;
>> > + break;
>> > + case 16934400:
>> > + case 33868800:
>> > + wm8971->sysclk_constraints = &constraints_169344;
>> > + break;
>> > + case 12000000:
>> > + case 24000000:
>> > + wm8971->sysclk_constraints = &constraints_12;
>> > + break;
>> > + default:
>> > + return -EINVAL;
>> > }
>> > - return -EINVAL;
>>
>> You pick out the constraints here but you never actually set them
>> with snd_pcm_hw_constraint_list?
>>
>> > +
>> > + wm8971->sysclk = freq;
>> > +
>> > + return 0;
>> > }
>> >
>> > static int wm8971_set_dai_fmt(struct snd_soc_dai *codec_dai,
>> > --
>>
>> Thanks,
>> Charles
>>
>
>
> ------------------------------
>
> _______________________________________________
> Alsa-devel mailing list
> Alsa-devel(a)alsa-project.org
> http://mailman.alsa-project.org/mailman/listinfo/alsa-devel
>
>
> End of Alsa-devel Digest, Vol 91, Issue 41
> ******************************************
>
1
0

[alsa-devel] [PATCH V1] ASoC: fsl_ssi: refine ipg clock usage in this module
by Shengjiu Wang 11 Sep '14
by Shengjiu Wang 11 Sep '14
11 Sep '14
Move the ipg clock enable and disable operation to startup and shutdown,
that is only enable ipg clock when ssi is working. we don't need to enable
ipg clock in probe.
Another register accessing need the ipg clock, so use devm_regmap_init_mmio_clk
instead of devm_regmap_init_mmio.
Signed-off-by: Shengjiu Wang <shengjiu.wang(a)freescale.com>
---
sound/soc/fsl/fsl_ssi.c | 38 +++++++++++++++++++++++++++-----------
1 file changed, 27 insertions(+), 11 deletions(-)
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index 2fc3e66..d32d0f5 100644
--- a/sound/soc/fsl/fsl_ssi.c
+++ b/sound/soc/fsl/fsl_ssi.c
@@ -531,6 +531,9 @@ static int fsl_ssi_startup(struct snd_pcm_substream *substream,
struct fsl_ssi_private *ssi_private =
snd_soc_dai_get_drvdata(rtd->cpu_dai);
+ if (ssi_private->soc->imx)
+ clk_prepare_enable(ssi_private->clk);
+
/* When using dual fifo mode, it is safer to ensure an even period
* size. If appearing to an odd number while DMA always starts its
* task from fifo0, fifo1 would be neglected at the end of each
@@ -544,6 +547,22 @@ static int fsl_ssi_startup(struct snd_pcm_substream *substream,
}
/**
+ * fsl_ssi_shutdown: shutdown the SSI
+ *
+ */
+static void fsl_ssi_shutdown(struct snd_pcm_substream *substream,
+ struct snd_soc_dai *dai)
+{
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
+ struct fsl_ssi_private *ssi_private =
+ snd_soc_dai_get_drvdata(rtd->cpu_dai);
+
+ if (ssi_private->soc->imx)
+ clk_disable_unprepare(ssi_private->clk);
+
+}
+
+/**
* fsl_ssi_set_bclk - configure Digital Audio Interface bit clock
*
* Note: This function can be only called when using SSI as DAI master
@@ -1043,6 +1062,7 @@ static int fsl_ssi_dai_probe(struct snd_soc_dai *dai)
static const struct snd_soc_dai_ops fsl_ssi_dai_ops = {
.startup = fsl_ssi_startup,
+ .shutdown = fsl_ssi_shutdown,
.hw_params = fsl_ssi_hw_params,
.hw_free = fsl_ssi_hw_free,
.set_fmt = fsl_ssi_set_dai_fmt,
@@ -1168,16 +1188,10 @@ static int fsl_ssi_imx_probe(struct platform_device *pdev,
u32 dmas[4];
int ret;
- ssi_private->clk = devm_clk_get(&pdev->dev, NULL);
+ ssi_private->clk = devm_clk_get(&pdev->dev, "ipg");
if (IS_ERR(ssi_private->clk)) {
ret = PTR_ERR(ssi_private->clk);
- dev_err(&pdev->dev, "could not get clock: %d\n", ret);
- return ret;
- }
-
- ret = clk_prepare_enable(ssi_private->clk);
- if (ret) {
- dev_err(&pdev->dev, "clk_prepare_enable failed: %d\n", ret);
+ dev_err(&pdev->dev, "could not get ipg clock: %d\n", ret);
return ret;
}
@@ -1236,7 +1250,6 @@ static int fsl_ssi_imx_probe(struct platform_device *pdev,
return 0;
error_pcm:
- clk_disable_unprepare(ssi_private->clk);
return ret;
}
@@ -1246,7 +1259,6 @@ static void fsl_ssi_imx_clean(struct platform_device *pdev,
{
if (!ssi_private->use_dma)
imx_pcm_fiq_exit(pdev);
- clk_disable_unprepare(ssi_private->clk);
}
static int fsl_ssi_probe(struct platform_device *pdev)
@@ -1321,7 +1333,11 @@ static int fsl_ssi_probe(struct platform_device *pdev)
return -ENOMEM;
}
- ssi_private->regs = devm_regmap_init_mmio(&pdev->dev, iomem,
+ if (ssi_private->soc->imx)
+ ssi_private->regs = devm_regmap_init_mmio_clk(&pdev->dev,
+ "ipg", iomem, &fsl_ssi_regconfig);
+ else
+ ssi_private->regs = devm_regmap_init_mmio(&pdev->dev, iomem,
&fsl_ssi_regconfig);
if (IS_ERR(ssi_private->regs)) {
dev_err(&pdev->dev, "Failed to init register map\n");
--
1.7.9.5
6
25
This patch improves WM8971.
We clean the file through checkpatch.
Any comments about improving the patch are welcome.
Thanks.
Signed-off-by: Xavier Hsu <xavier.hsu(a)linaro.org>
Signed-off-by: Andy Green <andy.green(a)linaro.org>
---
sound/soc/codecs/wm8971.c | 107 ++++++++++++++++++++++++---------------------
1 file changed, 56 insertions(+), 51 deletions(-)
diff --git a/sound/soc/codecs/wm8971.c b/sound/soc/codecs/wm8971.c
index 0499cd4..064278f 100644
--- a/sound/soc/codecs/wm8971.c
+++ b/sound/soc/codecs/wm8971.c
@@ -31,7 +31,7 @@
#define WM8971_REG_COUNT 43
-static struct workqueue_struct *wm8971_workq = NULL;
+static struct workqueue_struct *wm8971_workq;
/* codec private data */
struct wm8971_priv {
@@ -92,25 +92,28 @@ static const struct reg_default wm8971_reg_defaults[] = {
#define wm8971_reset(c) snd_soc_write(c, WM8971_RESET, 0)
/* WM8971 Controls */
-static const char *wm8971_bass[] = { "Linear Control", "Adaptive Boost" };
-static const char *wm8971_bass_filter[] = { "130Hz @ 48kHz",
- "200Hz @ 48kHz" };
-static const char *wm8971_treble[] = { "8kHz", "4kHz" };
-static const char *wm8971_alc_func[] = { "Off", "Right", "Left", "Stereo" };
-static const char *wm8971_ng_type[] = { "Constant PGA Gain",
- "Mute ADC Output" };
-static const char *wm8971_deemp[] = { "None", "32kHz", "44.1kHz", "48kHz" };
-static const char *wm8971_mono_mux[] = {"Stereo", "Mono (Left)",
- "Mono (Right)", "Digital Mono"};
-static const char *wm8971_dac_phase[] = { "Non Inverted", "Inverted" };
-static const char *wm8971_lline_mux[] = {"Line", "NC", "NC", "PGA",
- "Differential"};
-static const char *wm8971_rline_mux[] = {"Line", "Mic", "NC", "PGA",
- "Differential"};
-static const char *wm8971_lpga_sel[] = {"Line", "NC", "NC", "Differential"};
-static const char *wm8971_rpga_sel[] = {"Line", "Mic", "NC", "Differential"};
-static const char *wm8971_adcpol[] = {"Normal", "L Invert", "R Invert",
- "L + R Invert"};
+static const char const *wm8971_bass[] = {"Linear Control", "Adaptive Boost"};
+static const char const *wm8971_bass_filter[] = {"130Hz @ 48kHz",
+ "200Hz @ 48kHz"};
+static const char const *wm8971_treble[] = {"8kHz", "4kHz"};
+static const char const *wm8971_alc_func[] = {"Off", "Right",
+ "Left", "Stereo"};
+static const char const *wm8971_ng_type[] = {"Constant PGA Gain",
+ "Mute ADC Output"};
+static const char const *wm8971_deemp[] = {"None", "32kHz", "44.1kHz", "48kHz"};
+static const char const *wm8971_mono_mux[] = {"Stereo", "Mono (Left)",
+ "Mono (Right)", "Digital Mono"};
+static const char const *wm8971_dac_phase[] = {"Non Inverted", "Inverted"};
+static const char const *wm8971_lline_mux[] = {"Line", "NC", "NC",
+ "PGA", "Differential"};
+static const char const *wm8971_rline_mux[] = {"Line", "Mic", "NC",
+ "PGA", "Differential"};
+static const char const *wm8971_lpga_sel[] = {"Line", "NC", "NC",
+ "Differential"};
+static const char const *wm8971_rpga_sel[] = {"Line", "Mic", "NC",
+ "Differential"};
+static const char const *wm8971_adcpol[] = {"Normal", "L Invert",
+ "R Invert", "L + R Invert"};
static const struct soc_enum wm8971_enum[] = {
SOC_ENUM_SINGLE(WM8971_BASS, 7, 2, wm8971_bass), /* 0 */
@@ -136,24 +139,24 @@ static const struct snd_kcontrol_new wm8971_snd_controls[] = {
SOC_DOUBLE_R("Capture Switch", WM8971_LINVOL, WM8971_RINVOL, 7, 1, 1),
SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8971_LOUT1V,
- WM8971_ROUT1V, 7, 1, 0),
+ WM8971_ROUT1V, 7, 1, 0),
SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8971_LOUT2V,
- WM8971_ROUT2V, 7, 1, 0),
+ WM8971_ROUT2V, 7, 1, 0),
SOC_SINGLE("Mono Playback ZC Switch", WM8971_MOUTV, 7, 1, 0),
SOC_DOUBLE_R("PCM Volume", WM8971_LDAC, WM8971_RDAC, 0, 255, 0),
SOC_DOUBLE_R("Bypass Left Playback Volume", WM8971_LOUTM1,
- WM8971_LOUTM2, 4, 7, 1),
+ WM8971_LOUTM2, 4, 7, 1),
SOC_DOUBLE_R("Bypass Right Playback Volume", WM8971_ROUTM1,
- WM8971_ROUTM2, 4, 7, 1),
+ WM8971_ROUTM2, 4, 7, 1),
SOC_DOUBLE_R("Bypass Mono Playback Volume", WM8971_MOUTM1,
- WM8971_MOUTM2, 4, 7, 1),
+ WM8971_MOUTM2, 4, 7, 1),
SOC_DOUBLE_R("Headphone Playback Volume", WM8971_LOUT1V,
- WM8971_ROUT1V, 0, 127, 0),
+ WM8971_ROUT1V, 0, 127, 0),
SOC_DOUBLE_R("Speaker Playback Volume", WM8971_LOUT2V,
- WM8971_ROUT2V, 0, 127, 0),
+ WM8971_ROUT2V, 0, 127, 0),
SOC_ENUM("Bass Boost", wm8971_enum[0]),
SOC_ENUM("Bass Filter", wm8971_enum[1]),
@@ -238,14 +241,14 @@ SOC_DAPM_ENUM("Route", wm8971_enum[13]);
static const struct snd_soc_dapm_widget wm8971_dapm_widgets[] = {
SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0,
- &wm8971_left_mixer_controls[0],
- ARRAY_SIZE(wm8971_left_mixer_controls)),
+ &wm8971_left_mixer_controls[0],
+ ARRAY_SIZE(wm8971_left_mixer_controls)),
SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0,
- &wm8971_right_mixer_controls[0],
- ARRAY_SIZE(wm8971_right_mixer_controls)),
+ &wm8971_right_mixer_controls[0],
+ ARRAY_SIZE(wm8971_right_mixer_controls)),
SND_SOC_DAPM_MIXER("Mono Mixer", WM8971_PWR2, 2, 0,
- &wm8971_mono_mixer_controls[0],
- ARRAY_SIZE(wm8971_mono_mixer_controls)),
+ &wm8971_mono_mixer_controls[0],
+ ARRAY_SIZE(wm8971_mono_mixer_controls)),
SND_SOC_DAPM_PGA("Right Out 2", WM8971_PWR2, 3, 0, NULL, 0),
SND_SOC_DAPM_PGA("Left Out 2", WM8971_PWR2, 4, 0, NULL, 0),
@@ -260,18 +263,18 @@ static const struct snd_soc_dapm_widget wm8971_dapm_widgets[] = {
SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8971_PWR1, 3, 0),
SND_SOC_DAPM_MUX("Left PGA Mux", WM8971_PWR1, 5, 0,
- &wm8971_left_pga_controls),
+ &wm8971_left_pga_controls),
SND_SOC_DAPM_MUX("Right PGA Mux", WM8971_PWR1, 4, 0,
- &wm8971_right_pga_controls),
+ &wm8971_right_pga_controls),
SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0,
- &wm8971_left_line_controls),
+ &wm8971_left_line_controls),
SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0,
- &wm8971_right_line_controls),
+ &wm8971_right_line_controls),
SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0,
- &wm8971_monomux_controls),
+ &wm8971_monomux_controls),
SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0,
- &wm8971_monomux_controls),
+ &wm8971_monomux_controls),
SND_SOC_DAPM_OUTPUT("LOUT1"),
SND_SOC_DAPM_OUTPUT("ROUT1"),
@@ -431,7 +434,7 @@ static int get_coeff(int mclk, int rate)
}
static int wm8971_set_dai_sysclk(struct snd_soc_dai *codec_dai,
- int clk_id, unsigned int freq, int dir)
+ int clk_id, unsigned int freq, int dir)
{
struct snd_soc_codec *codec = codec_dai->codec;
struct wm8971_priv *wm8971 = snd_soc_codec_get_drvdata(codec);
@@ -449,7 +452,7 @@ static int wm8971_set_dai_sysclk(struct snd_soc_dai *codec_dai,
}
static int wm8971_set_dai_fmt(struct snd_soc_dai *codec_dai,
- unsigned int fmt)
+ unsigned int fmt)
{
struct snd_soc_codec *codec = codec_dai->codec;
u16 iface = 0;
@@ -507,8 +510,8 @@ static int wm8971_set_dai_fmt(struct snd_soc_dai *codec_dai,
}
static int wm8971_pcm_hw_params(struct snd_pcm_substream *substream,
- struct snd_pcm_hw_params *params,
- struct snd_soc_dai *dai)
+ struct snd_pcm_hw_params *params,
+ struct snd_soc_dai *dai)
{
struct snd_soc_codec *codec = dai->codec;
struct wm8971_priv *wm8971 = snd_soc_codec_get_drvdata(codec);
@@ -553,7 +556,7 @@ static int wm8971_mute(struct snd_soc_dai *dai, int mute)
}
static int wm8971_set_bias_level(struct snd_soc_codec *codec,
- enum snd_soc_bias_level level)
+ enum snd_soc_bias_level level)
{
u16 pwr_reg = snd_soc_read(codec, WM8971_PWR1) & 0xfe3e;
@@ -580,11 +583,12 @@ static int wm8971_set_bias_level(struct snd_soc_codec *codec,
}
#define WM8971_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
- SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \
- SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
+ SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
+ SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
+ SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
#define WM8971_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
- SNDRV_PCM_FMTBIT_S24_LE)
+ SNDRV_PCM_FMTBIT_S24_LE)
static const struct snd_soc_dai_ops wm8971_dai_ops = {
.hw_params = wm8971_pcm_hw_params,
@@ -616,6 +620,7 @@ static void wm8971_work(struct work_struct *work)
container_of(work, struct snd_soc_dapm_context,
delayed_work.work);
struct snd_soc_codec *codec = dapm->codec;
+
wm8971_set_bias_level(codec, codec->dapm.bias_level);
}
@@ -637,7 +642,7 @@ static int wm8971_resume(struct snd_soc_codec *codec)
snd_soc_write(codec, WM8971_PWR1, reg | 0x01c0);
codec->dapm.bias_level = SND_SOC_BIAS_ON;
queue_delayed_work(wm8971_workq, &codec->dapm.delayed_work,
- msecs_to_jiffies(1000));
+ msecs_to_jiffies(1000));
}
return 0;
@@ -660,7 +665,7 @@ static int wm8971_probe(struct snd_soc_codec *codec)
snd_soc_write(codec, WM8971_PWR1, reg | 0x01c0);
codec->dapm.bias_level = SND_SOC_BIAS_STANDBY;
queue_delayed_work(wm8971_workq, &codec->dapm.delayed_work,
- msecs_to_jiffies(1000));
+ msecs_to_jiffies(1000));
/* set the update bits */
snd_soc_update_bits(codec, WM8971_LDAC, 0x0100, 0x0100);
@@ -729,8 +734,8 @@ static int wm8971_i2c_probe(struct i2c_client *i2c,
i2c_set_clientdata(i2c, wm8971);
- ret = snd_soc_register_codec(&i2c->dev,
- &soc_codec_dev_wm8971, &wm8971_dai, 1);
+ ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_wm8971,
+ &wm8971_dai, 1);
return ret;
}
--
1.7.9.5
3
24

11 Sep '14
add DMA_PREP_INTERRUPT flag to support no_period_wakeup, in which
user space app doesn't want audio interrupt to wake up audio threads.
Signed-off-by: Qiao Zhou <zhouqiao(a)marvell.com>
---
drivers/dma/mmp_tdma.c | 19 ++++++++++++++-----
1 files changed, 14 insertions(+), 5 deletions(-)
diff --git a/drivers/dma/mmp_tdma.c b/drivers/dma/mmp_tdma.c
index 6ad30e2..c6bd015 100644
--- a/drivers/dma/mmp_tdma.c
+++ b/drivers/dma/mmp_tdma.c
@@ -148,10 +148,16 @@ static void mmp_tdma_chan_set_desc(struct mmp_tdma_chan *tdmac, dma_addr_t phys)
tdmac->reg_base + TDCR);
}
+static void mmp_tdma_enable_irq(struct mmp_tdma_chan *tdmac, bool enable)
+{
+ if (enable)
+ writel(TDIMR_COMP, tdmac->reg_base + TDIMR);
+ else
+ writel(0, tdmac->reg_base + TDIMR);
+}
+
static void mmp_tdma_enable_chan(struct mmp_tdma_chan *tdmac)
{
- /* enable irq */
- writel(TDIMR_COMP, tdmac->reg_base + TDIMR);
/* enable dma chan */
writel(readl(tdmac->reg_base + TDCR) | TDCR_CHANEN,
tdmac->reg_base + TDCR);
@@ -163,9 +169,6 @@ static void mmp_tdma_disable_chan(struct mmp_tdma_chan *tdmac)
writel(readl(tdmac->reg_base + TDCR) & ~TDCR_CHANEN,
tdmac->reg_base + TDCR);
- /* disable irq */
- writel(0, tdmac->reg_base + TDIMR);
-
tdmac->status = DMA_COMPLETE;
}
@@ -434,6 +437,10 @@ static struct dma_async_tx_descriptor *mmp_tdma_prep_dma_cyclic(
i++;
}
+ /* enable interrupt */
+ if (flags & DMA_PREP_INTERRUPT)
+ mmp_tdma_enable_irq(tdmac, true);
+
tdmac->buf_len = buf_len;
tdmac->period_len = period_len;
tdmac->pos = 0;
@@ -455,6 +462,8 @@ static int mmp_tdma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
switch (cmd) {
case DMA_TERMINATE_ALL:
mmp_tdma_disable_chan(tdmac);
+ /* disable interrupt */
+ mmp_tdma_enable_irq(tdmac, false);
break;
case DMA_PAUSE:
mmp_tdma_pause_chan(tdmac);
--
1.7.0.4
3
4

Re: [alsa-devel] [pulseaudio-discuss] PulseAudio miniconference 2014, Oct 15, Düsseldorf, Germany
by Arun Raghavan 11 Sep '14
by Arun Raghavan 11 Sep '14
11 Sep '14
Looping in the ALSA and GStreamer lists in case someone is interested.
On 9 September 2014 16:52, Tanu Kaskinen <tanu.kaskinen(a)linux.intel.com> wrote:
> Hi,
>
> In addition to the "Linux Audio Mini Summit" that Takashi announced recently
> (which focuses more on ALSA topics), we will also have a "PulseAudio
> miniconference" in the same conference center, day after the ALSA event. The
> PulseAudio event will be on Wednesday, starting at 14:00. Registering isn't
> mandatory, but if we run out of seats, those who were fastest to register
> will get preference.
>
> More details are in the wiki:
> http://www.freedesktop.org/wiki/Software/PulseAudio/Events/2014_Dusseldorf/
>
> We don't yet have discussion topics for the miniconference, so if you plan
> to attend, topic ideas would be very welcome! Send them to the list, and
> I'll collect them to the wiki.
>
> If you have any questions or comments, feel free to send them to the list or
> privately to me.
>
> See you in Düsseldorf!
>
> --
> Tanu
> _______________________________________________
> pulseaudio-discuss mailing list
> pulseaudio-discuss(a)lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/pulseaudio-discuss
1
0

[alsa-devel] [PATCH 0/3] ASoC/ARM: tegra: apalis/colibri t30: sgtl5000 audio
by Marcel Ziswiler 10 Sep '14
by Marcel Ziswiler 10 Sep '14
10 Sep '14
This series adds/integrates Freescale SGTL5000 analogue audio codec
support.
Marcel Ziswiler (3):
ASoC: tegra: add tegra sgtl5000 machine driver
ARM: tegra: apalis/colibri t30: integrate audio support
ARM: tegra: enable sgtl5000 audio
.../bindings/sound/nvidia,tegra-audio-sgtl5000.txt | 45 +++++
arch/arm/boot/dts/tegra30-apalis.dtsi | 49 +++++
arch/arm/boot/dts/tegra30-colibri.dtsi | 49 +++++
arch/arm/configs/tegra_defconfig | 1 +
sound/soc/tegra/Kconfig | 10 +
sound/soc/tegra/Makefile | 2 +
sound/soc/tegra/tegra_sgtl5000.c | 216 +++++++++++++++++++++
7 files changed, 372 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/nvidia,tegra-audio-sgtl5000.txt
create mode 100644 sound/soc/tegra/tegra_sgtl5000.c
--
1.9.3
3
9

[alsa-devel] [PATCH RESEND] Documentation: fsl, ssi.txt: Avoid cryptic acronyms
by Fabio Estevam 10 Sep '14
by Fabio Estevam 10 Sep '14
10 Sep '14
From: Fabio Estevam <fabio.estevam(a)freescale.com>
It is much clearer to use the full terms here: left-justified/right-justified.
Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com>
---
Documentation/devicetree/bindings/sound/fsl,ssi.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/sound/fsl,ssi.txt b/Documentation/devicetree/bindings/sound/fsl,ssi.txt
index 3aa4a8f..ceca880 100644
--- a/Documentation/devicetree/bindings/sound/fsl,ssi.txt
+++ b/Documentation/devicetree/bindings/sound/fsl,ssi.txt
@@ -62,9 +62,9 @@ Optional properties:
"i2s-slave" - I2S mode, SSI is clock slave
"i2s-master" - I2S mode, SSI is clock master
"lj-slave" - left-justified mode, SSI is clock slave
- "lj-master" - l.j. mode, SSI is clock master
+ "lj-master" - left-justified mode, SSI is clock master
"rj-slave" - right-justified mode, SSI is clock slave
- "rj-master" - r.j., SSI is clock master
+ "rj-master" - right-justified mode, SSI is clock master
"ac97-slave" - AC97 mode, SSI is clock slave
"ac97-master" - AC97 mode, SSI is clock master
--
1.9.1
1
0
(I'm cross-posting this to the linux-arm-kernel and alsa-devel lists, as
recommended):
I'm looking for anyone who has successfully used the EP93XX/EDB9315A
demo board's sound infrastructure. I have been working with Hartley
Sweeten on patching some DMA coherency mask issues (successfully), and
while this makes the kernel stop complaining (and allows the userspace
to "appear" to work) I never actually get any sound out of the machine
on newer kernels.
I do, however, have an existing (binary-only) 2.6.21 kernel from the
client where sound _IS_ functional; thus, I know the system can
POTENTIALLY work, and that the problem is software-based.
At this point, I have a mountain of information I can provide about the
state of my EDB9315A board, but what I'm really looking for is someone
to connect with and/or have consult with us to get sound working on
newer kernels with this board exactly (although other EP93XX boards
might be similar, I'm so mistrustful of everything at this point I'm
looking for someone else with this hardware EXACTLY).
I've tried 3.15-3.17, all with the same results. aplay/alsamixer see the
device, appear to interact with it in a normal fashion (it even
mutes/unmutes the device every time you touch it), but no sound is ever
produced. It is possible, of course, the problem is in userspace (I'm
using a custom Yocto-based image), but I'm doubtful of that.
At any rate, any help would be greatly appreciate, although i realize
this is fringe hardware. :)
1
0

10 Sep '14
Hi Jean-Francois,
On 10/09/2014 13:28, Jean-Francois Moine wrote:
> This patch adds multi-CODEC support to the simple-card.
>
> Signed-off-by: Jean-Francois Moine <moinejf(a)free.fr>
> ---
> .../devicetree/bindings/sound/simple-card.txt | 28 +++++++--------
> sound/soc/generic/simple-card.c | 41 +++++++++++++++++++++-
> 2 files changed, 52 insertions(+), 17 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/sound/simple-card.txt b/Documentation/devicetree/bindings/sound/simple-card.txt
> index c2e9841..c217687 100644
> --- a/Documentation/devicetree/bindings/sound/simple-card.txt
> +++ b/Documentation/devicetree/bindings/sound/simple-card.txt
> @@ -37,6 +37,8 @@ Required dai-link subnodes:
>
> - cpu : CPU sub-node
> - codec : CODEC sub-node
> + In case of multi-CODECs, there may
> + be many of such sub-nodes.
>
> Optional dai-link subnode properties:
>
> @@ -115,37 +117,31 @@ sh_fsi2: sh_fsi2@ec230000 {
> interrupts = <0 146 0x4>;
> };
>
> -Example 2 - many DAI links:
> +Example 2 - many DAI links and multi-CODECs:
>
> sound {
> compatible = "simple-audio-card";
> simple-audio-card,name = "Cubox Audio";
>
> - simple-audio-card,dai-link@0 { /* I2S - HDMI */
> + simple-audio-card,dai-link@0 { /* S/PDIF - HDMI & S/PDIF */
> format = "i2s";
> cpu {
> - sound-dai = <&audio1 0>;
> - };
> - codec {
> - sound-dai = <&tda998x 0>;
> - };
> - };
> -
> - simple-audio-card,dai-link@1 { /* S/PDIF - HDMI */
> - cpu {
> sound-dai = <&audio1 1>;
> };
> - codec {
> - sound-dai = <&tda998x 1>;
> + codec@0 {
> + sound-dai = <&hdmi 0>;
> + };
> + codec@1 {
> + sound-dai = <&spdif_codec>;
> };
I don't have strong opinion on that, but in my case, I was considering
using a simple list instead of several nodes.
I don't like having to add fake address just to ensure uniqueness.
Something like that:
sound-dais = <&spdif_codec 1>, <&hdmi 0>;
That being said, it will require changing the name with a plural form,
and ensuring we have the same number of parameters for each codec.
That was just my .2 cents.
Regards,
Benoit
> };
>
> - simple-audio-card,dai-link@2 { /* S/PDIF - S/PDIF */
> + simple-audio-card,dai-link@1 { /* I2S - HDMI */
> cpu {
> - sound-dai = <&audio1 1>;
> + sound-dai = <&audio1 0>;
> };
> codec {
> - sound-dai = <&spdif_codec>;
> + sound-dai = <&hdmi 1>;
> };
> };
> };
> diff --git a/sound/soc/generic/simple-card.c b/sound/soc/generic/simple-card.c
> index 4053152..bf0ce08 100644
> --- a/sound/soc/generic/simple-card.c
> +++ b/sound/soc/generic/simple-card.c
> @@ -179,11 +179,12 @@ static int asoc_simple_card_dai_link_of(struct device_node *node,
> struct device_node *np = NULL;
> struct device_node *bitclkmaster = NULL;
> struct device_node *framemaster = NULL;
> + struct snd_soc_dai_link_component *component;
> unsigned int daifmt;
> char *name;
> char prop[128];
> char *prefix = "";
> - int ret, cpu_args;
> + int ret, cpu_args, num_codec_dais;
>
> /* For single DAI link & old style of DT node */
> if (is_top_level_node)
> @@ -225,7 +226,16 @@ static int asoc_simple_card_dai_link_of(struct device_node *node,
> }
>
> of_node_put(np);
> +
> + /* count the number of codec DAIs */
> snprintf(prop, sizeof(prop), "%scodec", prefix);
> + num_codec_dais = 0;
> + for_each_child_of_node(node, np) {
> + if (strcmp(np->name, prop) == 0)
> + num_codec_dais++;
> + }
> +
> + /* treat the first DAI */
> np = of_get_child_by_name(node, prop);
> if (!np) {
> ret = -EINVAL;
> @@ -307,6 +317,35 @@ static int asoc_simple_card_dai_link_of(struct device_node *node,
> if (!cpu_args)
> dai_link->cpu_dai_name = NULL;
>
> + /* handle multi-codec DAIs */
> + if (num_codec_dais == 1)
> + goto out;
> + dai_link->codecs = component =
> + devm_kzalloc(dev,
> + sizeof *component * num_codec_dais,
> + GFP_KERNEL);
> + dai_link->num_codecs = num_codec_dais;
> + component->of_node = dai_link->codec_of_node;
> + dai_link->codec_of_node = NULL;
> + component->dai_name = dai_link->codec_dai_name;
> + dai_link->codec_dai_name = NULL;
> + for (;;) {
> + np = of_get_next_child(node, np);
> + if (!np)
> + break;
> + component++;
> + component->of_node = of_parse_phandle(np, "sound-dai", 0);
> + if (!component->of_node) {
> + ret = -ENODEV;
> + dev_err(dev, "Bad sound-dai\n");
> + goto dai_link_of_err;
> + }
> + ret = snd_soc_of_get_dai_name(np, &component->dai_name);
> + if (ret < 0)
> + goto dai_link_of_err;
> + }
> +
> +out:
> dai_link_of_err:
> if (np)
> of_node_put(np);
>
--
Benoît Cousson
BayLibre
Embedded Linux Technology Lab
www.baylibre.com
2
3
as pr_* macros are more preffered over printk, so printk replaced
with corresponding pr_* macros.
this patch will generate warning from checkpatch as it only did printk
replacement and didnot fixed the other warning of :
Alignment should match open parenthesis and
Possible unnecessary 'out of memory' message
Signed-off-by: Sudip Mukherjee <sudip(a)vectorindia.org>
---
The replacement was done by a bash script to avoid copy paste error. The script is as follows :
OLD1="printk(KERN_DEBUG \?"
OLD2="printk(KERN_ERR \?"
OLD3="printk(KERN_INFO \?"
OLD4="printk(KERN_WARNING \?"
OLD5="printk(KERN_ALERT \?"
NEW1="pr_debug("
NEW2="pr_err("
NEW3="pr_info("
NEW4="pr_warn("
NEW5="pr_alert("
find . -type d -mindepth 0 -maxdepth 2 | while read DIR
do
for f in "${DIR}"/*.c
do
sed -i -e "s/$OLD1/$NEW1/g" -e "s/$OLD2/$NEW2/g" -e "s/$OLD3/$NEW3/g" -e "s/$OLD4/$NEW4/g" -e "s/$OLD5/$NEW5/g" "$f"
done
done
Takashi : thanks for the -i option.
for the codecs section another future patch can define proper pr_fmt
and eliminate the use of PFX while printing.
this patch is not build tested and i understand that you can reject the patch without even seeing at it.
sound/aoa/codecs/onyx.c | 16 ++++++++--------
sound/aoa/codecs/tas.c | 10 +++++-----
sound/aoa/codecs/toonie.c | 6 +++---
sound/aoa/core/alsa.c | 10 +++++-----
sound/aoa/core/core.c | 6 +++---
sound/aoa/core/gpio-pmf.c | 6 +++---
sound/aoa/fabrics/layout.c | 16 ++++++++--------
sound/aoa/soundbus/core.c | 2 +-
sound/aoa/soundbus/i2sbus/control.c | 4 ++--
sound/aoa/soundbus/i2sbus/core.c | 8 ++++----
sound/aoa/soundbus/i2sbus/pcm.c | 28 ++++++++++++++--------------
11 files changed, 56 insertions(+), 56 deletions(-)
diff --git a/sound/aoa/codecs/onyx.c b/sound/aoa/codecs/onyx.c
index 401107b..55aa69f 100644
--- a/sound/aoa/codecs/onyx.c
+++ b/sound/aoa/codecs/onyx.c
@@ -873,7 +873,7 @@ static int onyx_init_codec(struct aoa_codec *codec)
int err;
if (!onyx->codec.gpio || !onyx->codec.gpio->methods) {
- printk(KERN_ERR PFX "gpios not assigned!!\n");
+ pr_err(PFX "gpios not assigned!!\n");
return -EINVAL;
}
@@ -885,12 +885,12 @@ static int onyx_init_codec(struct aoa_codec *codec)
msleep(1);
if (onyx_register_init(onyx)) {
- printk(KERN_ERR PFX "failed to initialise onyx registers\n");
+ pr_err(PFX "failed to initialise onyx registers\n");
return -ENODEV;
}
if (aoa_snd_device_new(SNDRV_DEV_CODEC, onyx, &ops)) {
- printk(KERN_ERR PFX "failed to create onyx snd device!\n");
+ pr_err(PFX "failed to create onyx snd device!\n");
return -ENODEV;
}
@@ -925,7 +925,7 @@ static int onyx_init_codec(struct aoa_codec *codec)
if (onyx->codec.soundbus_dev->attach_codec(onyx->codec.soundbus_dev,
aoa_get_card(),
ci, onyx)) {
- printk(KERN_ERR PFX "error creating onyx pcm\n");
+ pr_err(PFX "error creating onyx pcm\n");
return -ENODEV;
}
#define ADDCTL(n) \
@@ -977,7 +977,7 @@ static int onyx_init_codec(struct aoa_codec *codec)
}
}
#undef ADDCTL
- printk(KERN_INFO PFX "attached to onyx codec via i2c\n");
+ pr_info(PFX "attached to onyx codec via i2c\n");
return 0;
error:
@@ -991,7 +991,7 @@ static void onyx_exit_codec(struct aoa_codec *codec)
struct onyx *onyx = codec_to_onyx(codec);
if (!onyx->codec.soundbus_dev) {
- printk(KERN_ERR PFX "onyx_exit_codec called without soundbus_dev!\n");
+ pr_err(PFX "onyx_exit_codec called without soundbus_dev!\n");
return;
}
onyx->codec.soundbus_dev->detach_codec(onyx->codec.soundbus_dev, onyx);
@@ -1016,7 +1016,7 @@ static int onyx_i2c_probe(struct i2c_client *client,
/* we try to read from register ONYX_REG_CONTROL
* to check if the codec is present */
if (onyx_read_register(onyx, ONYX_REG_CONTROL, &dummy) != 0) {
- printk(KERN_ERR PFX "failed to read control register\n");
+ pr_err(PFX "failed to read control register\n");
goto fail;
}
@@ -1029,7 +1029,7 @@ static int onyx_i2c_probe(struct i2c_client *client,
if (aoa_codec_register(&onyx->codec)) {
goto fail;
}
- printk(KERN_DEBUG PFX "created and attached onyx instance\n");
+ pr_debug(PFX "created and attached onyx instance\n");
return 0;
fail:
kfree(onyx);
diff --git a/sound/aoa/codecs/tas.c b/sound/aoa/codecs/tas.c
index cf3c630..abf6e8a 100644
--- a/sound/aoa/codecs/tas.c
+++ b/sound/aoa/codecs/tas.c
@@ -806,13 +806,13 @@ static int tas_init_codec(struct aoa_codec *codec)
int err;
if (!tas->codec.gpio || !tas->codec.gpio->methods) {
- printk(KERN_ERR PFX "gpios not assigned!!\n");
+ pr_err(PFX "gpios not assigned!!\n");
return -EINVAL;
}
mutex_lock(&tas->mtx);
if (tas_reset_init(tas)) {
- printk(KERN_ERR PFX "tas failed to initialise\n");
+ pr_err(PFX "tas failed to initialise\n");
mutex_unlock(&tas->mtx);
return -ENXIO;
}
@@ -822,12 +822,12 @@ static int tas_init_codec(struct aoa_codec *codec)
if (tas->codec.soundbus_dev->attach_codec(tas->codec.soundbus_dev,
aoa_get_card(),
&tas_codec_info, tas)) {
- printk(KERN_ERR PFX "error attaching tas to soundbus\n");
+ pr_err(PFX "error attaching tas to soundbus\n");
return -ENODEV;
}
if (aoa_snd_device_new(SNDRV_DEV_CODEC, tas, &ops)) {
- printk(KERN_ERR PFX "failed to create tas snd device!\n");
+ pr_err(PFX "failed to create tas snd device!\n");
return -ENODEV;
}
err = aoa_snd_ctl_add(snd_ctl_new1(&volume_control, tas));
@@ -910,7 +910,7 @@ static int tas_i2c_probe(struct i2c_client *client,
if (aoa_codec_register(&tas->codec)) {
goto fail;
}
- printk(KERN_DEBUG
+ pr_debug(
"snd-aoa-codec-tas: tas found, addr 0x%02x on %s\n",
(unsigned int)client->addr, node->full_name);
return 0;
diff --git a/sound/aoa/codecs/toonie.c b/sound/aoa/codecs/toonie.c
index 7e8c341..f382d7f 100644
--- a/sound/aoa/codecs/toonie.c
+++ b/sound/aoa/codecs/toonie.c
@@ -93,14 +93,14 @@ static int toonie_init_codec(struct aoa_codec *codec)
return -ENOTCONN;
if (aoa_snd_device_new(SNDRV_DEV_CODEC, toonie, &ops)) {
- printk(KERN_ERR PFX "failed to create toonie snd device!\n");
+ pr_err(PFX "failed to create toonie snd device!\n");
return -ENODEV;
}
if (toonie->codec.soundbus_dev->attach_codec(toonie->codec.soundbus_dev,
aoa_get_card(),
&toonie_codec_info, toonie)) {
- printk(KERN_ERR PFX "error creating toonie pcm\n");
+ pr_err(PFX "error creating toonie pcm\n");
snd_device_free(aoa_get_card(), toonie);
return -ENODEV;
}
@@ -113,7 +113,7 @@ static void toonie_exit_codec(struct aoa_codec *codec)
struct toonie *toonie = codec_to_toonie(codec);
if (!toonie->codec.soundbus_dev) {
- printk(KERN_ERR PFX "toonie_exit_codec called without soundbus_dev!\n");
+ pr_err(PFX "toonie_exit_codec called without soundbus_dev!\n");
return;
}
toonie->codec.soundbus_dev->detach_codec(toonie->codec.soundbus_dev, toonie);
diff --git a/sound/aoa/core/alsa.c b/sound/aoa/core/alsa.c
index 4a7e4e6..65367c3 100644
--- a/sound/aoa/core/alsa.c
+++ b/sound/aoa/core/alsa.c
@@ -35,7 +35,7 @@ int aoa_alsa_init(char *name, struct module *mod, struct device *dev)
strlcpy(alsa_card->mixername, name, sizeof(alsa_card->mixername));
err = snd_card_register(aoa_card->alsa_card);
if (err < 0) {
- printk(KERN_ERR "snd-aoa: couldn't register alsa card\n");
+ pr_err("snd-aoa: couldn't register alsa card\n");
snd_card_free(aoa_card->alsa_card);
aoa_card = NULL;
return err;
@@ -69,14 +69,14 @@ int aoa_snd_device_new(enum snd_device_type type,
err = snd_device_new(card, type, device_data, ops);
if (err) {
- printk(KERN_ERR "snd-aoa: failed to create snd device (%d)\n", err);
+ pr_err("snd-aoa: failed to create snd device (%d)\n", err);
return err;
}
err = snd_device_register(card, device_data);
if (err) {
- printk(KERN_ERR "snd-aoa: failed to register "
+ pr_err("snd-aoa: failed to register "
"snd device (%d)\n", err);
- printk(KERN_ERR "snd-aoa: have you forgotten the "
+ pr_err("snd-aoa: have you forgotten the "
"dev_register callback?\n");
snd_device_free(card, device_data);
}
@@ -92,7 +92,7 @@ int aoa_snd_ctl_add(struct snd_kcontrol* control)
err = snd_ctl_add(aoa_card->alsa_card, control);
if (err)
- printk(KERN_ERR "snd-aoa: failed to add alsa control (%d)\n",
+ pr_err("snd-aoa: failed to add alsa control (%d)\n",
err);
return err;
}
diff --git a/sound/aoa/core/core.c b/sound/aoa/core/core.c
index 10bec6c..263ea80 100644
--- a/sound/aoa/core/core.c
+++ b/sound/aoa/core/core.c
@@ -33,7 +33,7 @@ static int attach_codec_to_fabric(struct aoa_codec *c)
err = fabric->found_codec(c);
if (err) {
module_put(c->owner);
- printk(KERN_ERR "snd-aoa: fabric didn't like codec %s\n",
+ pr_err("snd-aoa: fabric didn't like codec %s\n",
c->name);
return err;
}
@@ -43,7 +43,7 @@ static int attach_codec_to_fabric(struct aoa_codec *c)
if (c->init)
err = c->init(c);
if (err) {
- printk(KERN_ERR "snd-aoa: codec %s didn't init\n", c->name);
+ pr_err("snd-aoa: codec %s didn't init\n", c->name);
c->fabric = NULL;
if (fabric->remove_codec)
fabric->remove_codec(c);
@@ -134,7 +134,7 @@ EXPORT_SYMBOL_GPL(aoa_fabric_unregister);
void aoa_fabric_unlink_codec(struct aoa_codec *codec)
{
if (!codec->fabric) {
- printk(KERN_ERR "snd-aoa: fabric unassigned "
+ pr_err("snd-aoa: fabric unassigned "
"in aoa_fabric_unlink_codec\n");
dump_stack();
return;
diff --git a/sound/aoa/core/gpio-pmf.c b/sound/aoa/core/gpio-pmf.c
index c8d8a1a..4a34f7b6 100644
--- a/sound/aoa/core/gpio-pmf.c
+++ b/sound/aoa/core/gpio-pmf.c
@@ -20,7 +20,7 @@ static void pmf_gpio_set_##name(struct gpio_runtime *rt, int on)\
if (unlikely(!rt)) return; \
rc = pmf_call_function(rt->node, #name "-mute", &args); \
if (rc && rc != -ENODEV) \
- printk(KERN_WARNING "pmf_gpio_set_" #name \
+ pr_warn("pmf_gpio_set_" #name \
" failed, rc: %d\n", rc); \
rt->implementation_private &= ~(1<<bit); \
rt->implementation_private |= (!!on << bit); \
@@ -43,7 +43,7 @@ static void pmf_gpio_set_hw_reset(struct gpio_runtime *rt, int on)
if (unlikely(!rt)) return;
rc = pmf_call_function(rt->node, "hw-reset", &args);
if (rc)
- printk(KERN_WARNING "pmf_gpio_set_hw_reset"
+ pr_warn("pmf_gpio_set_hw_reset"
" failed, rc: %d\n", rc);
}
@@ -190,7 +190,7 @@ static int pmf_set_notify(struct gpio_runtime *rt,
name,
irq_client);
if (err) {
- printk(KERN_ERR "snd-aoa: gpio layer failed to"
+ pr_err("snd-aoa: gpio layer failed to"
" register %s irq (%d)\n", name, err);
kfree(irq_client);
goto out_unlock;
diff --git a/sound/aoa/fabrics/layout.c b/sound/aoa/fabrics/layout.c
index 9dc5806..c9d1956 100644
--- a/sound/aoa/fabrics/layout.c
+++ b/sound/aoa/fabrics/layout.c
@@ -773,18 +773,18 @@ static int check_codec(struct aoa_codec *codec,
"platform-%s-codec-ref", codec->name);
ref = of_get_property(ldev->sound, propname, NULL);
if (!ref) {
- printk(KERN_INFO "snd-aoa-fabric-layout: "
+ pr_info("snd-aoa-fabric-layout: "
"required property %s not present\n", propname);
return -ENODEV;
}
if (*ref != codec->node->phandle) {
- printk(KERN_INFO "snd-aoa-fabric-layout: "
+ pr_info("snd-aoa-fabric-layout: "
"%s doesn't match!\n", propname);
return -ENODEV;
}
} else {
if (layouts_list_items != 1) {
- printk(KERN_INFO "snd-aoa-fabric-layout: "
+ pr_info("snd-aoa-fabric-layout: "
"more than one soundbus, but no references.\n");
return -ENODEV;
}
@@ -796,7 +796,7 @@ static int check_codec(struct aoa_codec *codec,
if (!cc)
return -EINVAL;
- printk(KERN_INFO "snd-aoa-fabric-layout: can use this codec\n");
+ pr_info("snd-aoa-fabric-layout: can use this codec\n");
codec->connected = 0;
codec->fabric_data = cc;
@@ -1017,7 +1017,7 @@ static int aoa_fabric_layout_probe(struct soundbus_dev *sdev)
}
if (!layout) {
- printk(KERN_ERR "snd-aoa-fabric-layout: unknown layout\n");
+ pr_err("snd-aoa-fabric-layout: unknown layout\n");
goto outnodev;
}
@@ -1036,12 +1036,12 @@ static int aoa_fabric_layout_probe(struct soundbus_dev *sdev)
case 51: /* PowerBook5,4 */
case 58: /* Mac Mini */
ldev->gpio.methods = ftr_gpio_methods;
- printk(KERN_DEBUG
+ pr_debug(
"snd-aoa-fabric-layout: Using direct GPIOs\n");
break;
default:
ldev->gpio.methods = pmf_gpio_methods;
- printk(KERN_DEBUG
+ pr_debug(
"snd-aoa-fabric-layout: Using PMF GPIOs\n");
}
ldev->selfptr_headphone.ptr = ldev;
@@ -1064,7 +1064,7 @@ static int aoa_fabric_layout_probe(struct soundbus_dev *sdev)
err = aoa_fabric_register(&layout_fabric, &sdev->ofdev.dev);
if (err && err != -EALREADY) {
- printk(KERN_INFO "snd-aoa-fabric-layout: can't use,"
+ pr_info("snd-aoa-fabric-layout: can't use,"
" another fabric is active!\n");
goto outlistdel;
}
diff --git a/sound/aoa/soundbus/core.c b/sound/aoa/soundbus/core.c
index 7487eb7..c1438eb 100644
--- a/sound/aoa/soundbus/core.c
+++ b/sound/aoa/soundbus/core.c
@@ -172,7 +172,7 @@ int soundbus_add_one(struct soundbus_dev *dev)
!dev->ofdev.dev.of_node ||
dev->pcmname ||
dev->pcmid != -1) {
- printk(KERN_ERR "soundbus: adding device failed sanity check!\n");
+ pr_err("soundbus: adding device failed sanity check!\n");
return -EINVAL;
}
diff --git a/sound/aoa/soundbus/i2sbus/control.c b/sound/aoa/soundbus/i2sbus/control.c
index 4dc9b49..2672d1c 100644
--- a/sound/aoa/soundbus/i2sbus/control.c
+++ b/sound/aoa/soundbus/i2sbus/control.c
@@ -124,7 +124,7 @@ int i2sbus_control_cell(struct i2sbus_control *c,
return pmf_call_one(i2sdev->cell_enable, &args);
break;
default:
- printk(KERN_ERR "i2sbus: INVALID CELL ENABLE VALUE\n");
+ pr_err("i2sbus: INVALID CELL ENABLE VALUE\n");
return -ENODEV;
}
@@ -167,7 +167,7 @@ int i2sbus_control_clock(struct i2sbus_control *c,
return pmf_call_one(i2sdev->clock_enable, &args);
break;
default:
- printk(KERN_ERR "i2sbus: INVALID CLOCK ENABLE VALUE\n");
+ pr_err("i2sbus: INVALID CLOCK ENABLE VALUE\n");
return -ENODEV;
}
diff --git a/sound/aoa/soundbus/i2sbus/core.c b/sound/aoa/soundbus/i2sbus/core.c
index a80d5ea..d7bb0de 100644
--- a/sound/aoa/soundbus/i2sbus/core.c
+++ b/sound/aoa/soundbus/i2sbus/core.c
@@ -264,7 +264,7 @@ static int i2sbus_add_dev(struct macio_dev *macio,
resource_size(&dev->resources[i]),
dev->rnames[i]);
if (!dev->allocated_resource[i]) {
- printk(KERN_ERR "i2sbus: failed to claim resource %d!\n", i);
+ pr_err("i2sbus: failed to claim resource %d!\n", i);
goto err;
}
}
@@ -298,12 +298,12 @@ static int i2sbus_add_dev(struct macio_dev *macio,
goto err;
if (i2sbus_control_add_dev(dev->control, dev)) {
- printk(KERN_ERR "i2sbus: control layer didn't like bus\n");
+ pr_err("i2sbus: control layer didn't like bus\n");
goto err;
}
if (soundbus_add_one(&dev->sound)) {
- printk(KERN_DEBUG "i2sbus: device registration error!\n");
+ pr_debug("i2sbus: device registration error!\n");
goto err;
}
@@ -340,7 +340,7 @@ static int i2sbus_probe(struct macio_dev* dev, const struct of_device_id *match)
if (err)
return err;
if (!control) {
- printk(KERN_ERR "i2sbus_control_init API breakage\n");
+ pr_err("i2sbus_control_init API breakage\n");
return -ENODEV;
}
diff --git a/sound/aoa/soundbus/i2sbus/pcm.c b/sound/aoa/soundbus/i2sbus/pcm.c
index 7b74a4b..f9e272c 100644
--- a/sound/aoa/soundbus/i2sbus/pcm.c
+++ b/sound/aoa/soundbus/i2sbus/pcm.c
@@ -268,7 +268,7 @@ static void i2sbus_wait_for_stop(struct i2sbus_dev *i2sdev,
pi->stop_completion = NULL;
if (timeout == 0) {
/* timeout expired, stop dbdma forcefully */
- printk(KERN_ERR "i2sbus_wait_for_stop: timed out\n");
+ pr_err("i2sbus_wait_for_stop: timed out\n");
/* make sure RUN, PAUSE and S0 bits are cleared */
out_le32(&pi->dbdma->control, (RUN | PAUSE | 1) << 16);
pi->dbdma_ring.stopping = 0;
@@ -681,7 +681,7 @@ static inline void handle_interrupt(struct i2sbus_dev *i2sdev, int in)
if (!(status & ACTIVE) && (!in || (status & 0x80)))
break;
if (--timeout <= 0) {
- printk(KERN_ERR "i2sbus: timed out "
+ pr_err("i2sbus: timed out "
"waiting for DMA to stop!\n");
break;
}
@@ -868,7 +868,7 @@ static void i2sbus_private_free(struct snd_pcm *pcm)
i2sdev->out.created = 0;
i2sdev->in.created = 0;
list_for_each_entry_safe(p, tmp, &i2sdev->sound.codec_list, list) {
- printk(KERN_ERR "i2sbus: a codec didn't unregister!\n");
+ pr_err("i2sbus: a codec didn't unregister!\n");
list_del(&p->list);
module_put(p->codec->owner);
kfree(p);
@@ -887,7 +887,7 @@ i2sbus_attach_codec(struct soundbus_dev *dev, struct snd_card *card,
struct codec_info_item *cii;
if (!dev->pcmname || dev->pcmid == -1) {
- printk(KERN_ERR "i2sbus: pcm name and id must be set!\n");
+ pr_err("i2sbus: pcm name and id must be set!\n");
return -EINVAL;
}
@@ -910,12 +910,12 @@ i2sbus_attach_codec(struct soundbus_dev *dev, struct snd_card *card,
* sysclock/busclock stuff above to depend on which is usable */
list_for_each_entry(cii, &dev->codec_list, list) {
if (cii->codec->sysclock_factor != ci->sysclock_factor) {
- printk(KERN_DEBUG
+ pr_debug(
"cannot yet handle multiple different sysclocks!\n");
return -EINVAL;
}
if (cii->codec->bus_factor != ci->bus_factor) {
- printk(KERN_DEBUG
+ pr_debug(
"cannot yet handle multiple different bus clocks!\n");
return -EINVAL;
}
@@ -932,7 +932,7 @@ i2sbus_attach_codec(struct soundbus_dev *dev, struct snd_card *card,
cii = kzalloc(sizeof(struct codec_info_item), GFP_KERNEL);
if (!cii) {
- printk(KERN_DEBUG "i2sbus: failed to allocate cii\n");
+ pr_debug("i2sbus: failed to allocate cii\n");
return -ENOMEM;
}
@@ -942,20 +942,20 @@ i2sbus_attach_codec(struct soundbus_dev *dev, struct snd_card *card,
cii->codec_data = data;
if (!cii->sdev) {
- printk(KERN_DEBUG
+ pr_debug(
"i2sbus: failed to get soundbus dev reference\n");
err = -ENODEV;
goto out_free_cii;
}
if (!try_module_get(THIS_MODULE)) {
- printk(KERN_DEBUG "i2sbus: failed to get module reference!\n");
+ pr_debug("i2sbus: failed to get module reference!\n");
err = -EBUSY;
goto out_put_sdev;
}
if (!try_module_get(ci->owner)) {
- printk(KERN_DEBUG
+ pr_debug(
"i2sbus: failed to get module reference to codec owner!\n");
err = -EBUSY;
goto out_put_this_module;
@@ -965,7 +965,7 @@ i2sbus_attach_codec(struct soundbus_dev *dev, struct snd_card *card,
err = snd_pcm_new(card, dev->pcmname, dev->pcmid, 0, 0,
&dev->pcm);
if (err) {
- printk(KERN_DEBUG "i2sbus: failed to create pcm\n");
+ pr_debug("i2sbus: failed to create pcm\n");
goto out_put_ci_module;
}
dev->pcm->dev = &dev->ofdev.dev;
@@ -978,7 +978,7 @@ i2sbus_attach_codec(struct soundbus_dev *dev, struct snd_card *card,
if (!i2sdev->out.created && out) {
if (dev->pcm->card != card) {
/* eh? */
- printk(KERN_ERR
+ pr_err(
"Can't attach same bus to different cards!\n");
err = -EINVAL;
goto out_put_ci_module;
@@ -993,7 +993,7 @@ i2sbus_attach_codec(struct soundbus_dev *dev, struct snd_card *card,
if (!i2sdev->in.created && in) {
if (dev->pcm->card != card) {
- printk(KERN_ERR
+ pr_err(
"Can't attach same bus to different cards!\n");
err = -EINVAL;
goto out_put_ci_module;
@@ -1014,7 +1014,7 @@ i2sbus_attach_codec(struct soundbus_dev *dev, struct snd_card *card,
*/
err = snd_device_register(card, dev->pcm);
if (err) {
- printk(KERN_ERR "i2sbus: error registering new pcm\n");
+ pr_err("i2sbus: error registering new pcm\n");
goto out_put_ci_module;
}
/* no errors any more, so let's add this to our list */
--
1.8.1.2
3
6

10 Sep '14
This patch adds multi-CODEC support to the simple-card.
Signed-off-by: Jean-Francois Moine <moinejf(a)free.fr>
---
.../devicetree/bindings/sound/simple-card.txt | 28 +++++++--------
sound/soc/generic/simple-card.c | 41 +++++++++++++++++++++-
2 files changed, 52 insertions(+), 17 deletions(-)
diff --git a/Documentation/devicetree/bindings/sound/simple-card.txt b/Documentation/devicetree/bindings/sound/simple-card.txt
index c2e9841..c217687 100644
--- a/Documentation/devicetree/bindings/sound/simple-card.txt
+++ b/Documentation/devicetree/bindings/sound/simple-card.txt
@@ -37,6 +37,8 @@ Required dai-link subnodes:
- cpu : CPU sub-node
- codec : CODEC sub-node
+ In case of multi-CODECs, there may
+ be many of such sub-nodes.
Optional dai-link subnode properties:
@@ -115,37 +117,31 @@ sh_fsi2: sh_fsi2@ec230000 {
interrupts = <0 146 0x4>;
};
-Example 2 - many DAI links:
+Example 2 - many DAI links and multi-CODECs:
sound {
compatible = "simple-audio-card";
simple-audio-card,name = "Cubox Audio";
- simple-audio-card,dai-link@0 { /* I2S - HDMI */
+ simple-audio-card,dai-link@0 { /* S/PDIF - HDMI & S/PDIF */
format = "i2s";
cpu {
- sound-dai = <&audio1 0>;
- };
- codec {
- sound-dai = <&tda998x 0>;
- };
- };
-
- simple-audio-card,dai-link@1 { /* S/PDIF - HDMI */
- cpu {
sound-dai = <&audio1 1>;
};
- codec {
- sound-dai = <&tda998x 1>;
+ codec@0 {
+ sound-dai = <&hdmi 0>;
+ };
+ codec@1 {
+ sound-dai = <&spdif_codec>;
};
};
- simple-audio-card,dai-link@2 { /* S/PDIF - S/PDIF */
+ simple-audio-card,dai-link@1 { /* I2S - HDMI */
cpu {
- sound-dai = <&audio1 1>;
+ sound-dai = <&audio1 0>;
};
codec {
- sound-dai = <&spdif_codec>;
+ sound-dai = <&hdmi 1>;
};
};
};
diff --git a/sound/soc/generic/simple-card.c b/sound/soc/generic/simple-card.c
index 4053152..bf0ce08 100644
--- a/sound/soc/generic/simple-card.c
+++ b/sound/soc/generic/simple-card.c
@@ -179,11 +179,12 @@ static int asoc_simple_card_dai_link_of(struct device_node *node,
struct device_node *np = NULL;
struct device_node *bitclkmaster = NULL;
struct device_node *framemaster = NULL;
+ struct snd_soc_dai_link_component *component;
unsigned int daifmt;
char *name;
char prop[128];
char *prefix = "";
- int ret, cpu_args;
+ int ret, cpu_args, num_codec_dais;
/* For single DAI link & old style of DT node */
if (is_top_level_node)
@@ -225,7 +226,16 @@ static int asoc_simple_card_dai_link_of(struct device_node *node,
}
of_node_put(np);
+
+ /* count the number of codec DAIs */
snprintf(prop, sizeof(prop), "%scodec", prefix);
+ num_codec_dais = 0;
+ for_each_child_of_node(node, np) {
+ if (strcmp(np->name, prop) == 0)
+ num_codec_dais++;
+ }
+
+ /* treat the first DAI */
np = of_get_child_by_name(node, prop);
if (!np) {
ret = -EINVAL;
@@ -307,6 +317,35 @@ static int asoc_simple_card_dai_link_of(struct device_node *node,
if (!cpu_args)
dai_link->cpu_dai_name = NULL;
+ /* handle multi-codec DAIs */
+ if (num_codec_dais == 1)
+ goto out;
+ dai_link->codecs = component =
+ devm_kzalloc(dev,
+ sizeof *component * num_codec_dais,
+ GFP_KERNEL);
+ dai_link->num_codecs = num_codec_dais;
+ component->of_node = dai_link->codec_of_node;
+ dai_link->codec_of_node = NULL;
+ component->dai_name = dai_link->codec_dai_name;
+ dai_link->codec_dai_name = NULL;
+ for (;;) {
+ np = of_get_next_child(node, np);
+ if (!np)
+ break;
+ component++;
+ component->of_node = of_parse_phandle(np, "sound-dai", 0);
+ if (!component->of_node) {
+ ret = -ENODEV;
+ dev_err(dev, "Bad sound-dai\n");
+ goto dai_link_of_err;
+ }
+ ret = snd_soc_of_get_dai_name(np, &component->dai_name);
+ if (ret < 0)
+ goto dai_link_of_err;
+ }
+
+out:
dai_link_of_err:
if (np)
of_node_put(np);
--
2.1.0
1
0

[alsa-devel] [PATCH] ASoC: simple-card: fix regression in clock rate lookup
by Arnd Bergmann 10 Sep '14
by Arnd Bergmann 10 Sep '14
10 Sep '14
Commit 7c7b9cf53d284f ("ASoC: simple-card: fixup cpu_dai_name
clear case") changed the way that "sound-dai" properties are handled,
which leads to the clock frequency not being picked up from the
node that the phandle points to, as correctly identified by gcc
with this warning:
sound/soc/generic/simple-card.c: In function 'asoc_simple_card_sub_parse_of':
sound/soc/generic/simple-card.c:165:7: warning: 'node' may be used uninitialized in this function [-Wmaybe-uninitialized]
This restores the previous behavior by using the node from
of_parse_phandle_with_args() that was previously being
returned from of_parse_phandle().
Signed-off-by: Arnd Bergmann <arnd(a)arndb.de>
diff --git a/sound/soc/generic/simple-card.c b/sound/soc/generic/simple-card.c
index b563850c43f4..a0440bd533d5 100644
--- a/sound/soc/generic/simple-card.c
+++ b/sound/soc/generic/simple-card.c
@@ -116,7 +116,6 @@ asoc_simple_card_sub_parse_of(struct device_node *np,
int *args_count)
{
struct of_phandle_args args;
- struct device_node *node;
struct clk *clk;
u32 val;
int ret;
@@ -162,7 +161,7 @@ asoc_simple_card_sub_parse_of(struct device_node *np,
} else if (!of_property_read_u32(np, "system-clock-frequency", &val)) {
dai->sysclk = val;
} else {
- clk = of_clk_get(node, 0);
+ clk = of_clk_get(args.np, 0);
if (!IS_ERR(clk))
dai->sysclk = clk_get_rate(clk);
}
2
1

[alsa-devel] [PATCHv4] ASoC: simple-card: Adjust the comments of simple card.
by Xiubo Li 10 Sep '14
by Xiubo Li 10 Sep '14
10 Sep '14
Signed-off-by: Xiubo Li <Li.Xiubo(a)freescale.com>
---
Changes in V4:
- To apply against current code.
sound/soc/generic/simple-card.c | 48 ++++++++++++++++++++---------------------
1 file changed, 24 insertions(+), 24 deletions(-)
diff --git a/sound/soc/generic/simple-card.c b/sound/soc/generic/simple-card.c
index 4053152..f20feb4 100644
--- a/sound/soc/generic/simple-card.c
+++ b/sound/soc/generic/simple-card.c
@@ -122,7 +122,7 @@ asoc_simple_card_sub_parse_of(struct device_node *np,
int ret;
/*
- * get node via "sound-dai = <&phandle port>"
+ * Get node via "sound-dai = <&phandle port>"
* it will be used as xxx_of_node on soc_bind_dai_link()
*/
ret = of_parse_phandle_with_args(np, "sound-dai",
@@ -135,19 +135,19 @@ asoc_simple_card_sub_parse_of(struct device_node *np,
if (args_count)
*args_count = args.args_count;
- /* get dai->name */
+ /* Get dai->name */
ret = snd_soc_of_get_dai_name(np, name);
if (ret < 0)
return ret;
- /* parse TDM slot */
+ /* Parse TDM slot */
ret = snd_soc_of_parse_tdm_slot(np, &dai->slots, &dai->slot_width);
if (ret)
return ret;
/*
- * dai->sysclk come from
- * "clocks = <&xxx>" (if system has common clock)
+ * Parse dai->sysclk come from "clocks = <&xxx>"
+ * (if system has common clock)
* or "system-clock-frequency = <xxx>"
* or device's module clock.
*/
@@ -240,9 +240,11 @@ static int asoc_simple_card_dai_link_of(struct device_node *node,
goto dai_link_of_err;
if (strlen(prefix) && !bitclkmaster && !framemaster) {
- /* No dai-link level and master setting was not found from
- sound node level, revert back to legacy DT parsing and
- take the settings from codec node. */
+ /*
+ * No DAI link level and master setting was found
+ * from sound node level, revert back to legacy DT
+ * parsing and take the settings from codec node.
+ */
dev_dbg(dev, "%s: Revert to legacy daifmt parsing\n",
__func__);
dai_props->cpu_dai.fmt = dai_props->codec_dai.fmt =
@@ -271,10 +273,10 @@ static int asoc_simple_card_dai_link_of(struct device_node *node,
goto dai_link_of_err;
}
- /* simple-card assumes platform == cpu */
+ /* Simple Card assumes platform == cpu */
dai_link->platform_of_node = dai_link->cpu_of_node;
- /* Link name is created from CPU/CODEC dai name */
+ /* DAI link name is created from CPU/CODEC dai name */
name = devm_kzalloc(dev,
strlen(dai_link->cpu_dai_name) +
strlen(dai_link->codec_dai_name) + 2,
@@ -296,11 +298,11 @@ static int asoc_simple_card_dai_link_of(struct device_node *node,
dai_props->codec_dai.sysclk);
/*
- * soc_bind_dai_link() will check cpu name
- * after of_node matching if dai_link has cpu_dai_name.
- * but, it will never match if name was created by fmt_single_name()
- * remove cpu_dai_name if cpu_args was 0.
- * see
+ * In soc_bind_dai_link() will check cpu name after
+ * of_node matching if dai_link has cpu_dai_name.
+ * but, it will never match if name was created by
+ * fmt_single_name() remove cpu_dai_name if cpu_args
+ * was 0. See:
* fmt_single_name()
* fmt_multiple_name()
*/
@@ -329,10 +331,10 @@ static int asoc_simple_card_parse_of(struct device_node *node,
if (!node)
return -EINVAL;
- /* parsing the card name from DT */
+ /* Parse the card name from DT */
snd_soc_of_parse_card_name(&priv->snd_card, "simple-audio-card,name");
- /* off-codec widgets */
+ /* The off-codec widgets */
if (of_property_read_bool(node, "simple-audio-card,widgets")) {
ret = snd_soc_of_parse_audio_simple_widgets(&priv->snd_card,
"simple-audio-card,widgets");
@@ -387,7 +389,7 @@ static int asoc_simple_card_parse_of(struct device_node *node,
return 0;
}
-/* update the reference count of the devices nodes at end of probe */
+/* Decrease the reference count of the device nodes */
static int asoc_simple_card_unref(struct platform_device *pdev)
{
struct snd_soc_card *card = platform_get_drvdata(pdev);
@@ -416,29 +418,27 @@ static int asoc_simple_card_probe(struct platform_device *pdev)
struct device *dev = &pdev->dev;
int num_links, ret;
- /* get the number of DAI links */
+ /* Get the number of DAI links */
if (np && of_get_child_by_name(np, "simple-audio-card,dai-link"))
num_links = of_get_child_count(np);
else
num_links = 1;
- /* allocate the private data and the DAI link array */
+ /* Allocate the private data and the DAI link array */
priv = devm_kzalloc(dev,
sizeof(*priv) + sizeof(*dai_link) * num_links,
GFP_KERNEL);
if (!priv)
return -ENOMEM;
- /*
- * init snd_soc_card
- */
+ /* Init snd_soc_card */
priv->snd_card.owner = THIS_MODULE;
priv->snd_card.dev = dev;
dai_link = priv->dai_link;
priv->snd_card.dai_link = dai_link;
priv->snd_card.num_links = num_links;
- /* get room for the other properties */
+ /* Get room for the other properties */
priv->dai_props = devm_kzalloc(dev,
sizeof(*priv->dai_props) * num_links,
GFP_KERNEL);
--
2.1.0.27.g96db324
2
1

10 Sep '14
per Mark's suggestion, add braces to the else if branch
Qiao Zhou (1):
ASoC: soc-pcm: fix dpcm_path_get error handling
sound/soc/soc-compress.c | 6 +++++-
sound/soc/soc-pcm.c | 6 +++++-
2 files changed, 10 insertions(+), 2 deletions(-)
2
3
Hi Mark
From: Mark Brown [mailto:broonie@kernel.org] Sent: Tuesday, September
09, 2014 7:20 PM To: Wang, Jiada (ESD) Cc: Liam Girdwood; Jaroslav
Kysela; Takashi Iwai; Frkuska, Joshua; alsa-devel(a)alsa-project.org;
linux-kernel(a)vger.kernel.org Subject: Re: question about two ASoC
commits On Tue, Sep 09, 2014 at 05:36:36PM +0900, jiwang wrote:
>> Can anyone tell me what is the reasoning of the following two commits
>> commit: 5d16333 ASoC: SND_SOC_DAIFMT_NB_NF become 0 as default
>> settings
>> commit: eef28e1 ASoC: SND_SOC_DAIFMT_GATED become 0 as default
>> settings
>> with these two commits, now we have
>> #define SND_SOC_DAIFMT_GATED (0 << 4)
>> #define SND_SOC_DAIFMT_NB_NF (0 << 8)
>> in soc-dai.h
>> what's the good to shift 0 with different numbers?
>> no matter the number, they both equal to 0.
>> IMO all bit flags which share same variable (in this case
>> SND_SOC_DAIFMT) should have different value, isn't it?
> As the commit message says this is so that we have a default value which does something sensible.
Yes I can read this from commit message,
But I am not very sure why not initialize dai format variable in driver
itself.
further more, by having
commit: 5d16333 ASoC: SND_SOC_DAIFMT_NB_NF become 0 as default
DAI hardware signal inversions Macros are declared as following
#define SND_SOC_DAIFMT_NB_NF (0 << 8) /* normal bit clock + frame */
#define SND_SOC_DAIFMT_NB_IF (2 << 8) /* normal BCLK + inv FRM */
#define SND_SOC_DAIFMT_IB_NF (3 << 8) /* invert BCLK + nor FRM */
#define SND_SOC_DAIFMT_IB_IF (4 << 8) /* invert BCLK + FRM */
Now we are having undefined hole between NB_NF and NB_IF,
don't you think it's better to shift all the others down by 1, to keep them coherent?
so that when new mode (although it's likely there won't be) needs to be added,
it can be appended to the last,otherwise it may cause confuse, either to choose (1 << 8)
or (5 << 8)
Thanks,
Jiada
2
1

10 Sep '14
From: Bard Liao <bardliao(a)realtek.com>
This patch set cbj_en value for ACPI devices.
Signed-off-by: Bard Liao <bardliao(a)realtek.com>
---
sound/soc/codecs/rt286.c | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/sound/soc/codecs/rt286.c b/sound/soc/codecs/rt286.c
index e4f6102..d04616b 100644
--- a/sound/soc/codecs/rt286.c
+++ b/sound/soc/codecs/rt286.c
@@ -1106,11 +1106,25 @@ static const struct acpi_device_id rt286_acpi_match[] = {
};
MODULE_DEVICE_TABLE(acpi, rt286_acpi_match);
+struct rt286_acpi_jack {
+ const char *acpi_id;
+ bool jack_combo;
+};
+
+/* list of devices using jack combo mode */
+static struct rt286_acpi_jack rt286_jack_combo[] = {
+ { "INT343A", true },
+ {},
+};
+
static int rt286_i2c_probe(struct i2c_client *i2c,
const struct i2c_device_id *id)
{
struct rt286_platform_data *pdata = dev_get_platdata(&i2c->dev);
struct rt286_priv *rt286;
+ struct device *dev = &i2c->dev;
+ const struct acpi_device_id *acpiid;
+ struct rt286_acpi_jack *mach;
int i, ret;
rt286 = devm_kzalloc(&i2c->dev, sizeof(*rt286),
@@ -1141,6 +1155,17 @@ static int rt286_i2c_probe(struct i2c_client *i2c,
if (pdata)
rt286->pdata = *pdata;
+ /* enable jack combo mode on supported devices */
+ acpiid = acpi_match_device(dev->driver->acpi_match_table, dev);
+ if (acpiid) {
+ for (mach = rt286_jack_combo; mach->acpi_id; mach++) {
+ if (!strcmp(mach->acpi_id, acpiid->id))
+ rt286->pdata.cbj_en =
+ rt286_jack_combo->jack_combo;
+
+ }
+ }
+
regmap_write(rt286->regmap, RT286_SET_AUDIO_POWER, AC_PWRST_D3);
for (i = 0; i < RT286_POWER_REG_LEN; i++)
--
1.8.1.1.439.g50a6b54
3
2
Hi List,
I am trying to get Beaglebone workign with the audio extension board
(aka cape) that is using tlv320aic3x codec. I want it to run 3.14 and
use vanilla kernel without dynamic DT overlay patches.
So I have take the current overlay DT [1] and made converted it [2].
The result is that it boots and detects the Davinci module, but
doesn't get the codec.
[1]: https://github.com/beagleboard/devicetree-source/blob/d46bcc20ef98d69eea34c…
[2]: https://gist.github.com/errordeveloper/cba5145960bdeb0126d5
My kernel config includes this:
CONFIG_SND_OMAP_SOC=m
CONFIG_SND_OMAP_SOC_MCBSP=m
CONFIG_SND_OMAP_SOC_OMAP_TWL4030=m
CONFIG_SND_SOC_TWL4030=m
CONFIG_SND_DAVINCI_SOC=m
CONFIG_SND_AM33XX_SOC_EVM=m
CONFIG_SND_DAVINCI_SOC_MCASP=m
CONFIG_SND_HRTIMER=m
2
2

10 Sep '14
dpcm_path_get may return -ENOMEM when allocating memory for list
fails. We should not keep processing path or start up dpcm dai in
this case.
Signed-off-by: Qiao Zhou <zhouqiao(a)marvell.com>
---
sound/soc/soc-compress.c | 7 +++++--
sound/soc/soc-pcm.c | 7 +++++--
2 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/sound/soc/soc-compress.c b/sound/soc/soc-compress.c
index 27c06ac..b969a13 100644
--- a/sound/soc/soc-compress.c
+++ b/sound/soc/soc-compress.c
@@ -101,10 +101,13 @@ static int soc_compr_open_fe(struct snd_compr_stream *cstream)
fe->dpcm[stream].runtime = fe_substream->runtime;
- if (dpcm_path_get(fe, stream, &list) <= 0) {
+ ret = dpcm_path_get(fe, stream, &list);
+ if (ret < 0) {
+ mutex_unlock(&fe->card->mutex);
+ goto fe_err;
+ } else if (ret == 0)
dev_dbg(fe->dev, "ASoC: %s no valid %s route\n",
fe->dai_link->name, stream ? "capture" : "playback");
- }
/* calculate valid and active FE <-> BE dpcms */
dpcm_process_paths(fe, stream, &list, 1);
diff --git a/sound/soc/soc-pcm.c b/sound/soc/soc-pcm.c
index 731fdb5..d341777 100644
--- a/sound/soc/soc-pcm.c
+++ b/sound/soc/soc-pcm.c
@@ -2352,10 +2352,13 @@ static int dpcm_fe_dai_open(struct snd_pcm_substream *fe_substream)
mutex_lock_nested(&fe->card->mutex, SND_SOC_CARD_CLASS_RUNTIME);
fe->dpcm[stream].runtime = fe_substream->runtime;
- if (dpcm_path_get(fe, stream, &list) <= 0) {
+ ret = dpcm_path_get(fe, stream, &list);
+ if (ret < 0) {
+ mutex_unlock(&fe->card->mutex);
+ return ret;
+ } else if (ret == 0)
dev_dbg(fe->dev, "ASoC: %s no valid %s route\n",
fe->dai_link->name, stream ? "capture" : "playback");
- }
/* calculate valid and active FE <-> BE dpcms */
dpcm_process_paths(fe, stream, &list, 1);
--
1.7.0.4
3
2

[alsa-devel] [PATCH v5] ASoC: tda998x: Add a codec to the HDMI transmitter
by Jean-Francois Moine 10 Sep '14
by Jean-Francois Moine 10 Sep '14
10 Sep '14
This patch adds a CODEC function to the NXP TDA998x HDMI transmitter.
The CODEC handles both I2S and S/PDIF inputs.
It maintains the audio format and rate constraints according
to the HDMI device parameters (EDID) and does dynamic input
switch in the TDA998x I2C driver on start/stop audio streaming.
Signed-off-by: Jean-Francois Moine <moinejf(a)free.fr>
---
v5:
- use the TDA998x private data instead of a specific area
for the CODEC interface
- the CODEC is TDA998x specific (Mark Brown)
v4:
- remove all the TDA998x specific stuff from the CODEC
- move the EDID scan from the CODEC to the TDA998x
- move the CODEC to sound/soc (Mark Brown)
- update the audio_sample_rate from the EDID (Andrew Jackson)
v3: fix bad rate (Andrew Jackson)
v2: check double stream start (Mark Brown)
---
.../devicetree/bindings/drm/i2c/tda998x.txt | 18 ++
drivers/gpu/drm/i2c/Kconfig | 1 +
drivers/gpu/drm/i2c/tda998x_drv.c | 234 +++++++++++++++++++--
include/drm/i2c/tda998x.h | 12 ++
sound/soc/codecs/Kconfig | 3 +
sound/soc/codecs/Makefile | 2 +
sound/soc/codecs/tda998x.c | 163 ++++++++++++++
7 files changed, 415 insertions(+), 18 deletions(-)
create mode 100644 sound/soc/codecs/tda998x.c
diff --git a/Documentation/devicetree/bindings/drm/i2c/tda998x.txt b/Documentation/devicetree/bindings/drm/i2c/tda998x.txt
index e9e4bce..e50e7cd 100644
--- a/Documentation/devicetree/bindings/drm/i2c/tda998x.txt
+++ b/Documentation/devicetree/bindings/drm/i2c/tda998x.txt
@@ -17,6 +17,20 @@ Optional properties:
- video-ports: 24 bits value which defines how the video controller
output is wired to the TDA998x input - default: <0x230145>
+ - audio-ports: must contain one or two values selecting the source
+ in the audio port.
+ The source type is given by the corresponding entry in
+ the audio-port-names property.
+
+ - audio-port-names: must contain entries matching the entries in
+ the audio-ports property.
+ Each value may be "i2s" or "spdif", giving the type of
+ the audio source.
+
+ - #sound-dai-cells: must be set to <1> for use with the simple-card.
+ The TDA998x audio CODEC always defines two DAIs.
+ The DAI 0 is the S/PDIF input and the DAI 1 is the I2S input.
+
Example:
tda998x: hdmi-encoder {
@@ -26,4 +40,8 @@ Example:
interrupts = <27 2>; /* falling edge */
pinctrl-0 = <&pmx_camera>;
pinctrl-names = "default";
+
+ audio-ports = <0x04>, <0x03>;
+ audio-port-names = "spdif", "i2s";
+ #sound-dai-cells = <1>;
};
diff --git a/drivers/gpu/drm/i2c/Kconfig b/drivers/gpu/drm/i2c/Kconfig
index 4d341db..01b4f95 100644
--- a/drivers/gpu/drm/i2c/Kconfig
+++ b/drivers/gpu/drm/i2c/Kconfig
@@ -22,6 +22,7 @@ config DRM_I2C_SIL164
config DRM_I2C_NXP_TDA998X
tristate "NXP Semiconductors TDA998X HDMI encoder"
default m if DRM_TILCDC
+ select SND_SOC_TDA998x
help
Support for NXP Semiconductors TDA998X HDMI encoders.
diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c b/drivers/gpu/drm/i2c/tda998x_drv.c
index d476279..7db681f 100644
--- a/drivers/gpu/drm/i2c/tda998x_drv.c
+++ b/drivers/gpu/drm/i2c/tda998x_drv.c
@@ -20,6 +20,7 @@
#include <linux/module.h>
#include <linux/irq.h>
#include <sound/asoundef.h>
+#include <linux/platform_device.h>
#include <drm/drmP.h>
#include <drm/drm_crtc_helper.h>
@@ -44,6 +45,23 @@ struct tda998x_priv {
wait_queue_head_t wq_edid;
volatile int wq_edid_wait;
struct drm_encoder *encoder;
+
+ /* audio variables */
+ struct platform_device *pdev_codec;
+ u8 audio_ports[2];
+
+ u8 max_channels; /* EDID parameters */
+ u8 rate_mask;
+ u8 fmt;
+
+ int audio_sample_format;
+ struct snd_pcm_hw_constraint_list rate_constraints;
+};
+
+struct tda998x_priv2 {
+ struct tda998x_priv base;
+ struct drm_encoder encoder;
+ struct drm_connector connector;
};
#define to_tda998x_priv(x) ((struct tda998x_priv *)to_encoder_slave(x)->slave_priv)
@@ -639,12 +657,11 @@ static void
tda998x_configure_audio(struct tda998x_priv *priv,
struct drm_display_mode *mode, struct tda998x_encoder_params *p)
{
- uint8_t buf[6], clksel_aip, clksel_fs, cts_n, adiv;
+ uint8_t buf[6], clksel_aip, clksel_fs, cts_n, adiv, aclk;
uint32_t n;
/* Enable audio ports */
reg_write(priv, REG_ENA_AP, p->audio_cfg);
- reg_write(priv, REG_ENA_ACLK, p->audio_clk_cfg);
/* Set audio input source */
switch (p->audio_format) {
@@ -653,13 +670,29 @@ tda998x_configure_audio(struct tda998x_priv *priv,
clksel_aip = AIP_CLKSEL_AIP_SPDIF;
clksel_fs = AIP_CLKSEL_FS_FS64SPDIF;
cts_n = CTS_N_M(3) | CTS_N_K(3);
+ aclk = 0; /* no clock */
break;
case AFMT_I2S:
reg_write(priv, REG_MUX_AP, MUX_AP_SELECT_I2S);
clksel_aip = AIP_CLKSEL_AIP_I2S;
clksel_fs = AIP_CLKSEL_FS_ACLK;
- cts_n = CTS_N_M(3) | CTS_N_K(3);
+
+ /* with I2S input, the CTS_N predivider depends on
+ * the sample width */
+ switch (priv->audio_sample_format) {
+ case SNDRV_PCM_FORMAT_S16_LE:
+ cts_n = CTS_N_M(3) | CTS_N_K(1);
+ break;
+ default:
+ case SNDRV_PCM_FORMAT_S24_LE:
+ cts_n = CTS_N_M(3) | CTS_N_K(2);
+ break;
+ case SNDRV_PCM_FORMAT_S32_LE:
+ cts_n = CTS_N_M(3) | CTS_N_K(3);
+ break;
+ }
+ aclk = 1; /* clock enable */
break;
default:
@@ -671,6 +704,7 @@ tda998x_configure_audio(struct tda998x_priv *priv,
reg_clear(priv, REG_AIP_CNTRL_0, AIP_CNTRL_0_LAYOUT |
AIP_CNTRL_0_ACR_MAN); /* auto CTS */
reg_write(priv, REG_CTS_N, cts_n);
+ reg_write(priv, REG_ENA_ACLK, aclk);
/*
* Audio input somehow depends on HDMI line rate which is
@@ -727,6 +761,67 @@ tda998x_configure_audio(struct tda998x_priv *priv,
tda998x_write_aif(priv, p);
}
+/* tda998x audio codec interface */
+
+/* return the audio parameters extracted from the last EDID */
+int tda998x_get_audio(struct device *dev,
+ int *max_channels,
+ int *rate_mask,
+ int *fmt,
+ struct snd_pcm_hw_constraint_list **rate_constraints)
+{
+ struct tda998x_priv2 *priv2 = dev_get_drvdata(dev);
+ struct tda998x_priv *priv = &priv2->base;
+
+ if (!priv->encoder->crtc)
+ return -ENODEV;
+
+ *max_channels = priv->max_channels;
+ *rate_mask = priv->rate_mask;
+ *fmt = priv->fmt;
+ *rate_constraints = &priv->rate_constraints;
+ return 0;
+}
+EXPORT_SYMBOL(tda998x_get_audio);
+
+/* switch the audio port and initialize the audio parameters for streaming */
+void tda998x_audio_switch(struct device *dev,
+ int port_index,
+ unsigned sample_rate,
+ int sample_format)
+{
+ struct tda998x_priv2 *priv2 = dev_get_drvdata(dev);
+ struct tda998x_priv *priv = &priv2->base;
+ struct tda998x_encoder_params *p = &priv->params;
+
+ if (!priv->encoder->crtc)
+ return;
+
+ /*
+ * if port_index is negative (streaming stop),
+ * disable the audio port
+ */
+ if (port_index < 0) {
+ reg_write(priv, REG_ENA_AP, 0);
+ return;
+ }
+
+ /* if same audio parameters, just enable the audio port */
+ if (p->audio_cfg == priv->audio_ports[port_index] &&
+ p->audio_sample_rate == sample_rate &&
+ priv->audio_sample_format == sample_format) {
+ reg_write(priv, REG_ENA_AP, p->audio_cfg);
+ return;
+ }
+
+ p->audio_format = port_index;
+ p->audio_cfg = priv->audio_ports[port_index];
+ p->audio_sample_rate = sample_rate;
+ priv->audio_sample_format = sample_format;
+ tda998x_configure_audio(priv, &priv->encoder->crtc->hwmode, p);
+}
+EXPORT_SYMBOL(tda998x_audio_switch);
+
/* DRM encoder functions */
static void tda998x_encoder_set_config(struct tda998x_priv *priv,
@@ -746,6 +841,8 @@ static void tda998x_encoder_set_config(struct tda998x_priv *priv,
(p->mirr_f ? VIP_CNTRL_2_MIRR_F : 0);
priv->params = *p;
+ priv->audio_ports[p->audio_format] = p->audio_cfg;
+ priv->audio_sample_format = SNDRV_PCM_FORMAT_S24_LE;
}
static void tda998x_encoder_dpms(struct tda998x_priv *priv, int mode)
@@ -1128,6 +1225,47 @@ fail:
return NULL;
}
+static void tda998x_set_audio(struct tda998x_priv *priv,
+ struct drm_connector *connector)
+{
+ u8 *eld = connector->eld;
+ u8 *sad;
+ int sad_count;
+ unsigned eld_ver, mnl, rate_mask;
+ unsigned max_channels, fmt;
+
+ /* adjust the hw params from the ELD (EDID) */
+ eld_ver = eld[0] >> 3;
+ if (eld_ver != 2 && eld_ver != 31)
+ return;
+
+ mnl = eld[4] & 0x1f;
+ if (mnl > 16)
+ return;
+
+ sad_count = eld[5] >> 4;
+ sad = eld + 20 + mnl;
+
+ /* Start from the basic audio settings */
+ max_channels = 2;
+ rate_mask = 0;
+ fmt = 0;
+ while (sad_count--) {
+ switch (sad[0] & 0x78) {
+ case 0x08: /* PCM */
+ max_channels = max(max_channels, (sad[0] & 7) + 1u);
+ rate_mask |= sad[1];
+ fmt |= sad[2] & 0x07;
+ break;
+ }
+ sad += 3;
+ }
+
+ priv->max_channels = max_channels;
+ priv->rate_mask = rate_mask;
+ priv->fmt = fmt;
+}
+
static int
tda998x_encoder_get_modes(struct tda998x_priv *priv,
struct drm_connector *connector)
@@ -1139,6 +1277,12 @@ tda998x_encoder_get_modes(struct tda998x_priv *priv,
drm_mode_connector_update_edid_property(connector, edid);
n = drm_add_edid_modes(connector, edid);
priv->is_hdmi_sink = drm_detect_hdmi_monitor(edid);
+
+ /* set the audio parameters from the EDID */
+ if (priv->is_hdmi_sink) {
+ drm_edid_to_eld(connector, edid);
+ tda998x_set_audio(priv, connector);
+ }
kfree(edid);
}
@@ -1173,6 +1317,8 @@ static void tda998x_destroy(struct tda998x_priv *priv)
if (priv->hdmi->irq)
free_irq(priv->hdmi->irq, priv);
+ if (priv->pdev_codec)
+ platform_device_del(priv->pdev_codec);
i2c_unregister_device(priv->cec);
}
@@ -1250,16 +1396,38 @@ static struct drm_encoder_slave_funcs tda998x_encoder_slave_funcs = {
/* I2C driver functions */
+static void tda998x_create_audio_codec(struct tda998x_priv *priv)
+{
+ struct platform_device *pdev;
+
+ request_module("snd-soc-tda998x");
+ pdev = platform_device_register_resndata(&priv->hdmi->dev,
+ "tda998x-codec",
+ PLATFORM_DEVID_NONE,
+ NULL, 0,
+ NULL, 0);
+ if (IS_ERR(pdev)) {
+ dev_err(&priv->hdmi->dev, "cannot create codec: %ld\n",
+ PTR_ERR(pdev));
+ return;
+ }
+
+ priv->pdev_codec = pdev;
+}
+
static int tda998x_create(struct i2c_client *client, struct tda998x_priv *priv)
{
struct device_node *np = client->dev.of_node;
u32 video;
- int rev_lo, rev_hi, ret;
+ int i, j, rev_lo, rev_hi, ret;
priv->vip_cntrl_0 = VIP_CNTRL_0_SWAP_A(2) | VIP_CNTRL_0_SWAP_B(3);
priv->vip_cntrl_1 = VIP_CNTRL_1_SWAP_C(0) | VIP_CNTRL_1_SWAP_D(1);
priv->vip_cntrl_2 = VIP_CNTRL_2_SWAP_E(4) | VIP_CNTRL_2_SWAP_F(5);
+ priv->params.audio_frame[1] = 1; /* channels - 1 */
+ priv->params.audio_sample_rate = 48000; /* 48kHz */
+
priv->current_page = 0xff;
priv->hdmi = client;
priv->cec = i2c_new_dummy(client->adapter, 0x34);
@@ -1351,17 +1519,49 @@ static int tda998x_create(struct i2c_client *client, struct tda998x_priv *priv)
/* enable EDID read irq: */
reg_set(priv, REG_INT_FLAGS_2, INT_FLAGS_2_EDID_BLK_RD);
- if (!np)
- return 0; /* non-DT */
+ /* get the device tree parameters */
+ if (np) {
+
+ /* optional video properties */
+ ret = of_property_read_u32(np, "video-ports", &video);
+ if (ret == 0) {
+ priv->vip_cntrl_0 = video >> 16;
+ priv->vip_cntrl_1 = video >> 8;
+ priv->vip_cntrl_2 = video;
+ }
+
+ /* optional audio properties */
+ for (i = 0; i < 2; i++) {
+ u32 port;
+ const char *p;
- /* get the optional video properties */
- ret = of_property_read_u32(np, "video-ports", &video);
- if (ret == 0) {
- priv->vip_cntrl_0 = video >> 16;
- priv->vip_cntrl_1 = video >> 8;
- priv->vip_cntrl_2 = video;
+ ret = of_property_read_u32_index(np, "audio-ports",
+ i, &port);
+ if (ret)
+ break;
+ ret = of_property_read_string_index(np,
+ "audio-port-names",
+ i, &p);
+ if (ret) {
+ dev_err(&client->dev,
+ "missing audio-port-names[%d]\n", i);
+ break;
+ }
+ if (strcmp(p, "spdif") == 0) {
+ j = AFMT_SPDIF;
+ } else if (strcmp(p, "i2s") == 0) {
+ j = AFMT_I2S;
+ } else {
+ dev_err(&client->dev,
+ "bad audio-port-names '%s'\n", p);
+ break;
+ }
+ priv->audio_ports[j] = port;
+ }
}
+ tda998x_create_audio_codec(priv);
+
return 0;
fail:
@@ -1395,15 +1595,13 @@ static int tda998x_encoder_init(struct i2c_client *client,
encoder_slave->slave_priv = priv;
encoder_slave->slave_funcs = &tda998x_encoder_slave_funcs;
+ /* set the drvdata pointer to priv2 for CODEC calls */
+ dev_set_drvdata(&client->dev,
+ container_of(priv, struct tda998x_priv2, base));
+
return 0;
}
-struct tda998x_priv2 {
- struct tda998x_priv base;
- struct drm_encoder encoder;
- struct drm_connector connector;
-};
-
#define conn_to_tda998x_priv2(x) \
container_of(x, struct tda998x_priv2, connector);
diff --git a/include/drm/i2c/tda998x.h b/include/drm/i2c/tda998x.h
index 3e419d9..7db4c64 100644
--- a/include/drm/i2c/tda998x.h
+++ b/include/drm/i2c/tda998x.h
@@ -1,6 +1,8 @@
#ifndef __DRM_I2C_TDA998X_H__
#define __DRM_I2C_TDA998X_H__
+#include <sound/pcm_params.h>
+
struct tda998x_encoder_params {
u8 swap_b:3;
u8 mirr_b:1;
@@ -27,4 +29,14 @@ struct tda998x_encoder_params {
unsigned audio_sample_rate;
};
+/* audio codec interface */
+int tda998x_get_audio(struct device *dev,
+ int *max_channels,
+ int *rate_mask,
+ int *fmt,
+ struct snd_pcm_hw_constraint_list **rate_constraints);
+void tda998x_audio_switch(struct device *dev,
+ int port_index,
+ unsigned sample_rate,
+ int sample_format);
#endif
diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig
index 8ab1547..5928c4f 100644
--- a/sound/soc/codecs/Kconfig
+++ b/sound/soc/codecs/Kconfig
@@ -567,6 +567,9 @@ config SND_SOC_TAS5086
tristate "Texas Instruments TAS5086 speaker amplifier"
depends on I2C
+config SND_SOC_TDA998x
+ tristate
+
config SND_SOC_TLV320AIC23
tristate
diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile
index afba944..e7c2bec 100644
--- a/sound/soc/codecs/Makefile
+++ b/sound/soc/codecs/Makefile
@@ -100,6 +100,7 @@ snd-soc-sta350-objs := sta350.o
snd-soc-sta529-objs := sta529.o
snd-soc-stac9766-objs := stac9766.o
snd-soc-tas5086-objs := tas5086.o
+snd-soc-tda998x-objs := tda998x.o
snd-soc-tlv320aic23-objs := tlv320aic23.o
snd-soc-tlv320aic23-i2c-objs := tlv320aic23-i2c.o
snd-soc-tlv320aic23-spi-objs := tlv320aic23-spi.o
@@ -272,6 +273,7 @@ obj-$(CONFIG_SND_SOC_STA529) += snd-soc-sta529.o
obj-$(CONFIG_SND_SOC_STAC9766) += snd-soc-stac9766.o
obj-$(CONFIG_SND_SOC_TAS2552) += snd-soc-tas2552.o
obj-$(CONFIG_SND_SOC_TAS5086) += snd-soc-tas5086.o
+obj-$(CONFIG_SND_SOC_TDA998x) += snd-soc-tda998x.o
obj-$(CONFIG_SND_SOC_TLV320AIC23) += snd-soc-tlv320aic23.o
obj-$(CONFIG_SND_SOC_TLV320AIC23_I2C) += snd-soc-tlv320aic23-i2c.o
obj-$(CONFIG_SND_SOC_TLV320AIC23_SPI) += snd-soc-tlv320aic23-spi.o
diff --git a/sound/soc/codecs/tda998x.c b/sound/soc/codecs/tda998x.c
new file mode 100644
index 0000000..e5c3dce
--- /dev/null
+++ b/sound/soc/codecs/tda998x.c
@@ -0,0 +1,163 @@
+/*
+ * ALSA SoC TDA998X CODEC
+ *
+ * Copyright (C) 2014 Jean-Francois Moine
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <sound/soc.h>
+#include <linux/of.h>
+#include <linux/i2c.h>
+#include <drm/i2c/tda998x.h>
+
+#define TDA998X_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
+ SNDRV_PCM_FMTBIT_S20_3LE | \
+ SNDRV_PCM_FMTBIT_S24_LE | \
+ SNDRV_PCM_FMTBIT_S32_LE)
+
+static int tda_startup(struct snd_pcm_substream *substream,
+ struct snd_soc_dai *dai)
+{
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct device *dev = dai->dev;
+ int ret, max_channels, rate_mask, fmt;
+ u64 formats;
+ struct snd_pcm_hw_constraint_list *rate_constraints;
+ static const u32 hdmi_rates[] = {
+ 32000, 44100, 48000, 88200, 96000, 176400, 192000
+ };
+
+ /* get the EDID values and the rate constraints buffer */
+ ret = tda998x_get_audio(dev, &max_channels, &rate_mask, &fmt,
+ &rate_constraints);
+ if (ret < 0)
+ return ret; /* no screen */
+
+ /* convert the EDID values to audio constraints */
+ rate_constraints->list = hdmi_rates;
+ rate_constraints->count = ARRAY_SIZE(hdmi_rates);
+ rate_constraints->mask = rate_mask;
+ snd_pcm_hw_constraint_list(runtime, 0,
+ SNDRV_PCM_HW_PARAM_RATE,
+ rate_constraints);
+
+ formats = 0;
+ if (fmt & 1)
+ formats |= SNDRV_PCM_FMTBIT_S16_LE;
+ if (fmt & 2)
+ formats |= SNDRV_PCM_FMTBIT_S20_3LE;
+ if (fmt & 4)
+ formats |= SNDRV_PCM_FMTBIT_S24_LE;
+ snd_pcm_hw_constraint_mask64(runtime,
+ SNDRV_PCM_HW_PARAM_FORMAT,
+ formats);
+
+ snd_pcm_hw_constraint_minmax(runtime,
+ SNDRV_PCM_HW_PARAM_CHANNELS,
+ 1, max_channels);
+ return 0;
+}
+
+static int tda_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *params,
+ struct snd_soc_dai *dai)
+{
+ struct device *dev = dai->dev;
+
+ tda998x_audio_switch(dev, dai->id,
+ params_rate(params), params_format(params));
+ return 0;
+}
+
+static void tda_shutdown(struct snd_pcm_substream *substream,
+ struct snd_soc_dai *dai)
+{
+ struct device *dev = dai->dev;
+
+ tda998x_audio_switch(dev, -1, 0, 0); /* stop */
+}
+
+static const struct snd_soc_dai_ops tda_ops = {
+ .startup = tda_startup,
+ .hw_params = tda_hw_params,
+ .shutdown = tda_shutdown,
+};
+
+static struct snd_soc_dai_driver tda998x_dais[] = {
+ {
+ .name = "spdif-hifi",
+ .id = AFMT_SPDIF,
+ .playback = {
+ .stream_name = "HDMI SPDIF Playback",
+ .channels_min = 1,
+ .channels_max = 2,
+ .rates = SNDRV_PCM_RATE_CONTINUOUS,
+ .rate_min = 22050,
+ .rate_max = 192000,
+ .formats = TDA998X_FORMATS,
+ },
+ .ops = &tda_ops,
+ },
+ {
+ .name = "i2s-hifi",
+ .id = AFMT_I2S,
+ .playback = {
+ .stream_name = "HDMI I2S Playback",
+ .channels_min = 1,
+ .channels_max = 8,
+ .rates = SNDRV_PCM_RATE_CONTINUOUS,
+ .rate_min = 5512,
+ .rate_max = 192000,
+ .formats = TDA998X_FORMATS,
+ },
+ .ops = &tda_ops,
+ },
+};
+
+static const struct snd_soc_dapm_widget tda_widgets[] = {
+ SND_SOC_DAPM_OUTPUT("hdmi-out"),
+};
+static const struct snd_soc_dapm_route tda_routes[] = {
+ { "hdmi-out", NULL, "HDMI I2S Playback" },
+ { "hdmi-out", NULL, "HDMI SPDIF Playback" },
+};
+
+static struct snd_soc_codec_driver soc_codec_tda998x = {
+ .dapm_widgets = tda_widgets,
+ .num_dapm_widgets = ARRAY_SIZE(tda_widgets),
+ .dapm_routes = tda_routes,
+ .num_dapm_routes = ARRAY_SIZE(tda_routes),
+};
+
+static int tda998x_codec_dev_probe(struct platform_device *pdev)
+{
+ return snd_soc_register_codec(pdev->dev.parent,
+ &soc_codec_tda998x,
+ tda998x_dais, ARRAY_SIZE(tda998x_dais));
+}
+
+static int tda998x_codec_dev_remove(struct platform_device *pdev)
+{
+ snd_soc_unregister_codec(pdev->dev.parent);
+ return 0;
+}
+
+static struct platform_driver tda998x_codec = {
+ .driver = {
+ .name = "tda998x-codec",
+ .owner = THIS_MODULE,
+ },
+ .probe = tda998x_codec_dev_probe,
+ .remove = tda998x_codec_dev_remove,
+};
+
+module_platform_driver(tda998x_codec);
+
+MODULE_AUTHOR("Jean-Francois Moine <moinejf(a)free.fr>");
+MODULE_DESCRIPTION("NXP TDA998X CODEC");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:tda998x-codec");
--
2.1.0
1
0

10 Sep '14
This patch series adds DPCM and DAPM widgets to handle DSP topology
in the SST platform driver for merrifield.
Changes in v5:
* Added init callback for controls to initialize some private data
* Replaced pr_ with dev_ for logging
* Handle return values
* Addressed review comments
Subhransu S. Prusty (4):
ASoC: mfld: pcm: Replace pr_ with dev_
ALSA: control: Add init callback for kcontrol
ASoC: Export dapm_kcontrol_get_value
ASoC: Intel: mrfld: Use snd_soc_dai_get_drvdata to derive drv data
Vinod Koul (8):
ASoC: Intel: mfld-pcm: don't call trigger ops to DSP for internal
streams
ASoC: Intel: mrfld: add bytes control for modules
ASoC: Intel: mrfld: add the gain controls
ASoC: Intel: mfld-pcm: add control for powering up/down dsp
ASoC: Intel: mrfld: add DSP core controls
ASoC: Intel: mrfld: add the DSP DAPM widgets
ASoC: Intel: mfld-pcm: add FE and BE ops
ASoC: Intel: mrfld: add the DSP mixers
include/sound/control.h | 3 +
include/sound/soc-dapm.h | 1 +
sound/core/control.c | 7 +
sound/soc/intel/sst-atom-controls.c | 1242 ++++++++++++++++++++++++++++++-
sound/soc/intel/sst-atom-controls.h | 558 ++++++++++++++
sound/soc/intel/sst-mfld-platform-pcm.c | 221 ++++--
sound/soc/intel/sst-mfld-platform.h | 7 +-
sound/soc/soc-dapm.c | 3 +-
8 files changed, 1985 insertions(+), 57 deletions(-)
--
1.9.0
4
22
Hi there,
I have an ASIC running on an ASoC with a custom rate @ 18750 Hz.
I would like ALSA to report the correct rate.
If I do nothing, then the following reports 16000 Hz :
cat /proc/asound/card0/pcm0c/sub0/hw_params
I have verified that the hardware is running at the expected 18750 Hz.
I am wondering what/where is the correct place to setup the actual rate ?
I am trying to set the rates at startup like so but ALSA will not work
with the driver when I do this :
static int implant_startup(struct snd_pcm_substream *substream, struct
snd_soc_dai *dai)
{
snd_pcm_hw_constraint_minmax(substream->runtime,
SNDRV_PCM_HW_PARAM_RATE, 18750, 18750);
snd_pcm_hw_constraint_minmax(substream->runtime,
SNDRV_PCM_HW_PARAM_CHANNELS, 2, 2);
snd_pcm_hw_constraint_minmax(substream->runtime,
SNDRV_PCM_HW_PARAM_SAMPLE_BITS, 16, 16);
return 0;
}
static const struct snd_soc_dai_ops implant_dai_ops = {
.set_fmt = implant_set_dai_fmt,
.startup = implant_startup,
};
thanks
Matt
2
3
Any comment and advice are welcome.
Change in v3:
- Fix binding from Jean's comment.
- Remove 'ASoC: simple-card: add asoc_simple_card_fmt_master() to simplify the code.'
and will send it separately later.
Change in v2:
- Maintian compatibility with the old DTs.
Change in v1:
- Add simple-card dts node patches.
- Fix format parsing bug from Jean-Francois's comment.
- Rebase to Kuninori-san's newest changes in next branch.
Xiubo Li (3):
ASoC: simple-card: Merge single and muti DAI link(s) code.
ASoC: simple-card: Adjust the comments of simple card.
ASoC: simple-card: binding: update binding to support the new style.
.../devicetree/bindings/sound/simple-card.txt | 183 ++++++++++++++-------
sound/soc/generic/simple-card.c | 70 ++++----
2 files changed, 161 insertions(+), 92 deletions(-)
--
1.8.4
4
9
Hi Mark, Lars
I want to add DPCM support on simle-card driver.
1st reason is for "sampling-rate-convert".
And, 2nd reason, our customer want to use 2 cpu 1 codec style.
It works in my local environment.
but, I need to know what is the good style for DT.
I guss Xiubo's clean up patch seems good for me,
so, below approach is based on his style.
What do you think this ?
-- normal style --
sound {
compatible = "simple-audio-card";
...
simple-audio-card,dai-link {
...
cpu {
...
};
codec {
...
};
}
}
-- use DPCM for sampling-rate-convert --
sound {
compatible = "simple-audio-card";
...
simple-audio-card,dai-link {
...
cpu {
...
};
codec {
...
fixed-sampling-rate = <xxx>;
};
}
}
FE-cpu : cpu
FE-codec : dummy
BE-cpu : dummy
BE-codec : codec
-- use DPCM for multi DAI --
sound {
compatible = "simple-audio-card";
...
simple-audio-card,dai-link {
...
cpu@0 {
...
};
cpu@1 {
...
};
codec@1 {
...
};
}
}
FE-cpu : cpu@0
FE-codec : dummy
BE-cpu : cpu@1
BE-codec : codec@1
Best regards
---
Kuninori Morimoto
3
11

[alsa-devel] [PATCH 1/5] ASoC: 88pm860x-codec: Cleanup manual bias level transitions
by Lars-Peter Clausen 09 Sep '14
by Lars-Peter Clausen 09 Sep '14
09 Sep '14
Since the ASoC core now takes care of setting the bias level to
SND_SOC_BIAS_OFF when removing the CODEC there is no need to do it manually
anymore either.
The manual transition to SND_SOC_BIAS_STANDBY at the end of CODEC probe()
can also be removed as the core will automatically do this after the CODEC
has been probed.
Signed-off-by: Lars-Peter Clausen <lars(a)metafoo.de>
---
sound/soc/codecs/88pm860x-codec.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/sound/soc/codecs/88pm860x-codec.c b/sound/soc/codecs/88pm860x-codec.c
index 922006d..4c3b0af 100644
--- a/sound/soc/codecs/88pm860x-codec.c
+++ b/sound/soc/codecs/88pm860x-codec.c
@@ -1337,8 +1337,6 @@ static int pm860x_probe(struct snd_soc_codec *codec)
}
}
- pm860x_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
-
return 0;
out:
@@ -1354,7 +1352,6 @@ static int pm860x_remove(struct snd_soc_codec *codec)
for (i = 3; i >= 0; i--)
free_irq(pm860x->irq[i], pm860x);
- pm860x_set_bias_level(codec, SND_SOC_BIAS_OFF);
return 0;
}
--
1.8.0
3
6

[alsa-devel] [PATCH 1/6] ASoC: cs42l52: Cleanup manual bias level transitions
by Lars-Peter Clausen 09 Sep '14
by Lars-Peter Clausen 09 Sep '14
09 Sep '14
Set the CODEC driver's suspend_bias_off flag rather than manually going to
SND_SOC_BIAS_OFF in suspend and SND_SOC_BIAS_STANDBY in resume. This makes
the code a bit shorter and cleaner.
Since the ASoC core now takes care of setting the bias level to
SND_SOC_BIAS_OFF when removing the CODEC there is no need to do it manually
anymore either.
The manual transition to SND_SOC_BIAS_STANDBY at the end of CODEC probe()
can also be removed as the core will automatically do this after the CODEC
has been probed.
Signed-off-by: Lars-Peter Clausen <lars(a)metafoo.de>
---
sound/soc/codecs/cs42l52.c | 20 +-------------------
1 file changed, 1 insertion(+), 19 deletions(-)
diff --git a/sound/soc/codecs/cs42l52.c b/sound/soc/codecs/cs42l52.c
index da4f758..35fbef7 100644
--- a/sound/soc/codecs/cs42l52.c
+++ b/sound/soc/codecs/cs42l52.c
@@ -946,20 +946,6 @@ static struct snd_soc_dai_driver cs42l52_dai = {
.ops = &cs42l52_ops,
};
-static int cs42l52_suspend(struct snd_soc_codec *codec)
-{
- cs42l52_set_bias_level(codec, SND_SOC_BIAS_OFF);
-
- return 0;
-}
-
-static int cs42l52_resume(struct snd_soc_codec *codec)
-{
- cs42l52_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
-
- return 0;
-}
-
static int beep_rates[] = {
261, 522, 585, 667, 706, 774, 889, 1000,
1043, 1200, 1333, 1412, 1600, 1714, 2000, 2182
@@ -1104,8 +1090,6 @@ static int cs42l52_probe(struct snd_soc_codec *codec)
cs42l52_init_beep(codec);
- cs42l52_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
-
cs42l52->sysclk = CS42L52_DEFAULT_CLK;
cs42l52->config.format = CS42L52_DEFAULT_FORMAT;
@@ -1115,7 +1099,6 @@ static int cs42l52_probe(struct snd_soc_codec *codec)
static int cs42l52_remove(struct snd_soc_codec *codec)
{
cs42l52_free_beep(codec);
- cs42l52_set_bias_level(codec, SND_SOC_BIAS_OFF);
return 0;
}
@@ -1123,9 +1106,8 @@ static int cs42l52_remove(struct snd_soc_codec *codec)
static struct snd_soc_codec_driver soc_codec_dev_cs42l52 = {
.probe = cs42l52_probe,
.remove = cs42l52_remove,
- .suspend = cs42l52_suspend,
- .resume = cs42l52_resume,
.set_bias_level = cs42l52_set_bias_level,
+ .suspend_bias_off = true,
.dapm_widgets = cs42l52_dapm_widgets,
.num_dapm_widgets = ARRAY_SIZE(cs42l52_dapm_widgets),
--
1.8.0
3
7

09 Sep '14
Hi. I have board with SGTl5000 codec connected to DM365 via McBSP
(FSR/CLKR/DX/DR), I2C and CLKOUT1.
DM365-EVM has TVL320AIC3101 connected to DM365 like SGTL5000 on my board.
I try to patch DM365-EVM code but something went wrong.
There is what I do:
1. arch/arm/mach-davinci/board-dm365-evm.c
static struct i2c_board_info i2c_info[] = {{ I2C_BOARD_INFO("sgtl5000",
0x0a), }, };
...
i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
...
prepare_enable(clkout1_clk);
__raw_writel(__raw_readl(davinci_sysmod_base + 0x0d48) | 0x00000002,
davinci_sysmod_base + 0x0d48);
__raw_writel(0, davinci_sysmod_base + 0x0d04);
__raw_writel(0x8000, davinci_sysmod_base + 0x0d24); // 24/1=> 24Mhz
2. sound/soc/codecs/sgtl5000.c - removed mclk-related code
3. sound/soc/davinci/davinci-evm.c - all AIC3x data structures changed to
sgtl5000
I know that I need to copy davinci-evm to different file and that work with
it. I patch davinci-evm only for test purposes.
There is a questions:
1. I need a right way to describe clock source for sgtl5000.
2. During kernel initialization I see output:
Registering platform device 'davinci-mcbsp'. Parent at platform
Advanced Linux Sound Architecture Driver Initialized.
sgtl5000-codec 1-000a: sgtl5000 revision 0x11
Registering platform device 'soc-audio.0'. Parent at platform
soc-audio soc-audio.0: ASoC: machine DaVinci DM365 EVM should use
snd_soc_register_card()
soc-audio soc-audio.0: ASoC: CPU DAI davinci-mcbsp not registered
platform soc-audio.0: Driver soc-audio requests probe deferral
soc-audio: probe of soc-audio.0 failed with error -22
ALSA device list:
No soundcards found.
I don't know what I need to do with "ASoC: machine DaVinci DM365 EVM should
use snd_soc_register_card()" (may be, just ignore?) and "ASoC: CPU DAI
davinci-mcbsp not registered" (looks like a problem).
May be anyone has step-by-step tutorial?
Thanks.
Andrew Kuksov
2
1

[alsa-devel] [PATCH] ASoC: samsung-i2s: Check secondary DAI exists before referencing
by Charles Keepax 09 Sep '14
by Charles Keepax 09 Sep '14
09 Sep '14
In a couple of places the driver is missing a check to ensure there is a
secondary DAI before it de-references the pointer to it, causing a null
pointer de-reference. This patch adds a check to avoid this.
Signed-off-by: Charles Keepax <ckeepax(a)opensource.wolfsonmicro.com>
---
sound/soc/samsung/i2s.c | 5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index 03eec22..9d51347 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -462,7 +462,7 @@ static int i2s_set_sysclk(struct snd_soc_dai *dai,
if (dir == SND_SOC_CLOCK_IN)
rfs = 0;
- if ((rfs && other->rfs && (other->rfs != rfs)) ||
+ if ((rfs && other && other->rfs && (other->rfs != rfs)) ||
(any_active(i2s) &&
(((dir == SND_SOC_CLOCK_IN)
&& !(mod & MOD_CDCLKCON)) ||
@@ -762,7 +762,8 @@ static void i2s_shutdown(struct snd_pcm_substream *substream,
} else {
u32 mod = readl(i2s->addr + I2SMOD);
i2s->cdclk_out = !(mod & MOD_CDCLKCON);
- other->cdclk_out = i2s->cdclk_out;
+ if (other)
+ other->cdclk_out = i2s->cdclk_out;
}
/* Reset any constraint on RFS and BFS */
i2s->rfs = 0;
--
1.7.2.5
3
2

09 Sep '14
In preparation to change the public API to return a per-user clk structure,
remove any usage of this public API from the clock implementations.
The reason for having this in a separate commit from the one that introduces
the implementation of the new functions is to separate the changes generated
with Coccinelle from the rest, and keep the patches' size reasonable.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso(a)collabora.com>
Tested-by: Boris Brezillon <boris.brezillon(a)free-electrons.com>
Tested-by: Heiko Stuebner <heiko(a)sntech.de>
Acked-by: Boris Brezillon <boris.brezillon(a)free-electrons.com>
---
v10: * Add a few more files to be converted
* Re-generate the patch on top of the latest changes
v9: * Fold in changes to mxs-saif.c, so to not break bisectability
* Re-generate the patch on top of the latest changes
* Remove linux/clk.h includes from clk implementations
---
arch/arm/mach-dove/common.c | 10 +-
arch/arm/mach-imx/clk-busy.c | 9 +-
arch/arm/mach-imx/clk-fixup-div.c | 4 +-
arch/arm/mach-imx/clk-fixup-mux.c | 4 +-
arch/arm/mach-imx/clk-gate-exclusive.c | 4 +-
arch/arm/mach-imx/clk-gate2.c | 4 +-
arch/arm/mach-imx/clk-imx1.c | 3 +-
arch/arm/mach-imx/clk-imx21.c | 3 +-
arch/arm/mach-imx/clk-imx25.c | 9 +-
arch/arm/mach-imx/clk-imx27.c | 5 +-
arch/arm/mach-imx/clk-imx31.c | 11 +-
arch/arm/mach-imx/clk-imx35.c | 23 +-
arch/arm/mach-imx/clk-imx51-imx53.c | 78 +++---
arch/arm/mach-imx/clk-imx6q.c | 75 ++++--
arch/arm/mach-imx/clk-imx6sl.c | 43 +--
arch/arm/mach-imx/clk-imx6sx.c | 119 +++++----
arch/arm/mach-imx/clk-pfd.c | 5 +-
arch/arm/mach-imx/clk-pllv1.c | 5 +-
arch/arm/mach-imx/clk-pllv2.c | 5 +-
arch/arm/mach-imx/clk-pllv3.c | 5 +-
arch/arm/mach-imx/clk-vf610.c | 45 ++--
arch/arm/mach-imx/clk.c | 11 +-
arch/arm/mach-imx/clk.h | 44 +--
arch/arm/mach-msm/clock-pcom.c | 2 +-
arch/arm/mach-mv78xx0/common.c | 2 +-
arch/arm/mach-omap2/board-cm-t35.c | 2 +-
arch/arm/mach-omap2/cclock3xxx_data.c | 371 +++++++++++++-------------
arch/arm/mach-omap2/clkt2xxx_dpll.c | 5 +-
arch/arm/mach-omap2/clkt2xxx_dpllcore.c | 5 +-
arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c | 11 +-
arch/arm/mach-omap2/clkt34xx_dpll3m2.c | 3 +-
arch/arm/mach-omap2/clkt_clksel.c | 46 ++--
arch/arm/mach-omap2/clkt_dpll.c | 8 +-
arch/arm/mach-omap2/clock.c | 52 ++--
arch/arm/mach-omap2/clock.h | 18 +-
arch/arm/mach-omap2/clock3xxx.c | 23 +-
arch/arm/mach-omap2/clock3xxx.h | 4 +-
arch/arm/mach-omap2/clock_common_data.c | 2 +-
arch/arm/mach-omap2/clockdomain.c | 9 +-
arch/arm/mach-omap2/clockdomain.h | 4 +-
arch/arm/mach-omap2/display.c | 5 +-
arch/arm/mach-omap2/dpll3xxx.c | 29 +-
arch/arm/mach-omap2/dpll44xx.c | 5 +-
arch/arm/mach-omap2/mcbsp.c | 5 +-
arch/arm/mach-omap2/omap_device.c | 9 +-
arch/arm/mach-omap2/omap_hwmod.c | 42 +--
arch/arm/mach-omap2/omap_hwmod.h | 12 +-
arch/arm/mach-omap2/pm24xx.c | 12 +-
arch/arm/mach-orion5x/common.c | 2 +-
arch/arm/mach-shmobile/clock.c | 9 +-
arch/arm/mach-vexpress/spc.c | 4 +-
arch/arm/plat-orion/common.c | 21 +-
arch/arm/plat-orion/include/plat/common.h | 12 +-
arch/mips/alchemy/common/clock.c | 42 +--
arch/powerpc/platforms/512x/clock-commonclk.c | 48 ++--
drivers/acpi/acpi_lpss.c | 5 +-
drivers/clk/at91/clk-main.c | 24 +-
drivers/clk/at91/clk-master.c | 6 +-
drivers/clk/at91/clk-peripheral.c | 12 +-
drivers/clk/at91/clk-pll.c | 6 +-
drivers/clk/at91/clk-plldiv.c | 6 +-
drivers/clk/at91/clk-programmable.c | 10 +-
drivers/clk/at91/clk-slow.c | 24 +-
drivers/clk/at91/clk-smd.c | 6 +-
drivers/clk/at91/clk-system.c | 6 +-
drivers/clk/at91/clk-usb.c | 20 +-
drivers/clk/at91/clk-utmi.c | 6 +-
drivers/clk/bcm/clk-kona-setup.c | 6 +-
drivers/clk/bcm/clk-kona.c | 12 +-
drivers/clk/bcm/clk-kona.h | 2 +-
drivers/clk/berlin/berlin2-avpll.c | 4 +-
drivers/clk/berlin/berlin2-avpll.h | 4 +-
drivers/clk/berlin/berlin2-div.c | 2 +-
drivers/clk/berlin/berlin2-div.h | 2 +-
drivers/clk/berlin/berlin2-pll.c | 2 +-
drivers/clk/berlin/berlin2-pll.h | 2 +-
drivers/clk/berlin/bg2.c | 13 +-
drivers/clk/berlin/bg2q.c | 9 +-
drivers/clk/clk-axi-clkgen.c | 3 +-
drivers/clk/clk-axm5516.c | 4 +-
drivers/clk/clk-bcm2835.c | 2 +-
drivers/clk/clk-clps711x.c | 3 +-
drivers/clk/clk-composite.c | 11 +-
drivers/clk/clk-conf.c | 17 +-
drivers/clk/clk-divider.c | 8 +-
drivers/clk/clk-efm32gg.c | 3 +-
drivers/clk/clk-fixed-factor.c | 6 +-
drivers/clk/clk-fixed-rate.c | 8 +-
drivers/clk/clk-fractional-divider.c | 4 +-
drivers/clk/clk-gate.c | 4 +-
drivers/clk/clk-highbank.c | 8 +-
drivers/clk/clk-ls1x.c | 16 +-
drivers/clk/clk-max77686.c | 10 +-
drivers/clk/clk-moxart.c | 8 +-
drivers/clk/clk-mux.c | 7 +-
drivers/clk/clk-nomadik.c | 15 +-
drivers/clk/clk-nspire.c | 4 +-
drivers/clk/clk-palmas.c | 7 +-
drivers/clk/clk-ppc-corenet.c | 8 +-
drivers/clk/clk-s2mps11.c | 6 +-
drivers/clk/clk-si5351.c | 17 +-
drivers/clk/clk-si570.c | 4 +-
drivers/clk/clk-twl6040.c | 3 +-
drivers/clk/clk-u300.c | 13 +-
drivers/clk/clk-vt8500.c | 4 +-
drivers/clk/clk-wm831x.c | 7 +-
drivers/clk/clk-xgene.c | 12 +-
drivers/clk/clk.h | 4 +-
drivers/clk/hisilicon/clk-hi3620.c | 9 +-
drivers/clk/hisilicon/clk-hip04.c | 1 -
drivers/clk/hisilicon/clk.c | 17 +-
drivers/clk/hisilicon/clk.h | 2 +-
drivers/clk/hisilicon/clkgate-separated.c | 5 +-
drivers/clk/keystone/gate.c | 7 +-
drivers/clk/keystone/pll.c | 11 +-
drivers/clk/mmp/clk-apbc.c | 5 +-
drivers/clk/mmp/clk-apmu.c | 5 +-
drivers/clk/mmp/clk-frac.c | 4 +-
drivers/clk/mmp/clk-mmp2.c | 14 +-
drivers/clk/mmp/clk-pxa168.c | 12 +-
drivers/clk/mmp/clk-pxa910.c | 12 +-
drivers/clk/mmp/clk.h | 8 +-
drivers/clk/mvebu/clk-corediv.c | 4 +-
drivers/clk/mvebu/clk-cpu.c | 8 +-
drivers/clk/mvebu/common.c | 15 +-
drivers/clk/mvebu/kirkwood.c | 6 +-
drivers/clk/mxs/clk-div.c | 5 +-
drivers/clk/mxs/clk-frac.c | 5 +-
drivers/clk/mxs/clk-imx23.c | 5 +-
drivers/clk/mxs/clk-imx28.c | 5 +-
drivers/clk/mxs/clk-pll.c | 5 +-
drivers/clk/mxs/clk-ref.c | 5 +-
drivers/clk/mxs/clk-ssp.c | 3 +-
drivers/clk/mxs/clk.h | 17 +-
drivers/clk/qcom/clk-rcg.c | 8 +-
drivers/clk/qcom/clk-rcg2.c | 14 +-
drivers/clk/qcom/clk-regmap.c | 2 +-
drivers/clk/qcom/clk-regmap.h | 2 +-
drivers/clk/qcom/common.c | 6 +-
drivers/clk/qcom/gcc-apq8084.c | 2 +-
drivers/clk/qcom/gcc-ipq806x.c | 2 +-
drivers/clk/qcom/gcc-msm8660.c | 2 +-
drivers/clk/qcom/gcc-msm8960.c | 2 +-
drivers/clk/qcom/gcc-msm8974.c | 2 +-
drivers/clk/qcom/mmcc-msm8960.c | 6 +-
drivers/clk/rockchip/clk-pll.c | 9 +-
drivers/clk/rockchip/clk-rk3188.c | 2 +-
drivers/clk/rockchip/clk-rk3288.c | 2 +-
drivers/clk/rockchip/clk-rockchip.c | 2 +-
drivers/clk/rockchip/clk.c | 23 +-
drivers/clk/rockchip/clk.h | 5 +-
drivers/clk/samsung/clk-exynos-audss.c | 16 +-
drivers/clk/samsung/clk-exynos-clkout.c | 9 +-
drivers/clk/samsung/clk-exynos3250.c | 1 -
drivers/clk/samsung/clk-exynos4.c | 7 +-
drivers/clk/samsung/clk-exynos5250.c | 1 -
drivers/clk/samsung/clk-exynos5260.c | 1 -
drivers/clk/samsung/clk-exynos5410.c | 1 -
drivers/clk/samsung/clk-exynos5420.c | 1 -
drivers/clk/samsung/clk-exynos5440.c | 1 -
drivers/clk/samsung/clk-pll.c | 6 +-
drivers/clk/samsung/clk-pll.h | 2 +-
drivers/clk/samsung/clk-s3c2410-dclk.c | 30 +--
drivers/clk/samsung/clk-s3c2410.c | 1 -
drivers/clk/samsung/clk-s3c2412.c | 1 -
drivers/clk/samsung/clk-s3c2443.c | 1 -
drivers/clk/samsung/clk-s3c64xx.c | 1 -
drivers/clk/samsung/clk-s5pv210-audss.c | 16 +-
drivers/clk/samsung/clk-s5pv210.c | 1 -
drivers/clk/samsung/clk.c | 22 +-
drivers/clk/samsung/clk.h | 3 +-
drivers/clk/shmobile/clk-div6.c | 2 +-
drivers/clk/shmobile/clk-emev2.c | 4 +-
drivers/clk/shmobile/clk-mstp.c | 6 +-
drivers/clk/shmobile/clk-r8a7740.c | 6 +-
drivers/clk/shmobile/clk-r8a7779.c | 6 +-
drivers/clk/shmobile/clk-rcar-gen2.c | 10 +-
drivers/clk/shmobile/clk-rz.c | 6 +-
drivers/clk/sirf/clk-atlas6.c | 3 +-
drivers/clk/sirf/clk-common.c | 30 +--
drivers/clk/sirf/clk-prima2.c | 3 +-
drivers/clk/socfpga/clk-gate.c | 3 +-
drivers/clk/socfpga/clk-periph.c | 3 +-
drivers/clk/socfpga/clk-pll.c | 5 +-
drivers/clk/spear/clk-aux-synth.c | 8 +-
drivers/clk/spear/clk-frac-synth.c | 4 +-
drivers/clk/spear/clk-gpt-synth.c | 4 +-
drivers/clk/spear/clk-vco-pll.c | 8 +-
drivers/clk/spear/clk.h | 14 +-
drivers/clk/spear/spear1310_clock.c | 3 +-
drivers/clk/spear/spear1340_clock.c | 3 +-
drivers/clk/spear/spear3xx_clock.c | 17 +-
drivers/clk/spear/spear6xx_clock.c | 3 +-
drivers/clk/st/clk-flexgen.c | 12 +-
drivers/clk/st/clkgen-fsyn.c | 22 +-
drivers/clk/st/clkgen-mux.c | 32 +--
drivers/clk/st/clkgen-pll.c | 34 +--
drivers/clk/sunxi/clk-a10-hosc.c | 2 +-
drivers/clk/sunxi/clk-a20-gmac.c | 2 +-
drivers/clk/sunxi/clk-factors.c | 4 +-
drivers/clk/sunxi/clk-sun6i-apb0-gates.c | 2 +-
drivers/clk/sunxi/clk-sun6i-apb0.c | 2 +-
drivers/clk/sunxi/clk-sun6i-ar100.c | 6 +-
drivers/clk/sunxi/clk-sun8i-apb0.c | 2 +-
drivers/clk/sunxi/clk-sunxi.c | 18 +-
drivers/clk/tegra/clk-audio-sync.c | 4 +-
drivers/clk/tegra/clk-divider.c | 5 +-
drivers/clk/tegra/clk-periph-gate.c | 5 +-
drivers/clk/tegra/clk-periph.c | 9 +-
drivers/clk/tegra/clk-pll-out.c | 5 +-
drivers/clk/tegra/clk-pll.c | 41 ++-
drivers/clk/tegra/clk-super.c | 5 +-
drivers/clk/tegra/clk-tegra-audio.c | 5 +-
drivers/clk/tegra/clk-tegra-fixed.c | 9 +-
drivers/clk/tegra/clk-tegra-periph.c | 13 +-
drivers/clk/tegra/clk-tegra-pmc.c | 5 +-
drivers/clk/tegra/clk-tegra-super-gen4.c | 9 +-
drivers/clk/tegra/clk-tegra114.c | 11 +-
drivers/clk/tegra/clk-tegra124.c | 7 +-
drivers/clk/tegra/clk-tegra20.c | 13 +-
drivers/clk/tegra/clk-tegra30.c | 9 +-
drivers/clk/tegra/clk.c | 25 +-
drivers/clk/tegra/clk.h | 38 +--
drivers/clk/ti/apll.c | 8 +-
drivers/clk/ti/clk-2xxx.c | 8 +-
drivers/clk/ti/clk-33xx.c | 18 +-
drivers/clk/ti/clk-3xxx.c | 8 +-
drivers/clk/ti/clk-43xx.c | 8 +-
drivers/clk/ti/clk-44xx.c | 16 +-
drivers/clk/ti/clk-54xx.c | 25 +-
drivers/clk/ti/clk-7xx.c | 28 +-
drivers/clk/ti/clk-dra7-atl.c | 6 +-
drivers/clk/ti/clk.c | 2 +-
drivers/clk/ti/clockdomain.c | 4 +-
drivers/clk/ti/composite.c | 2 +-
drivers/clk/ti/divider.c | 6 +-
drivers/clk/ti/dpll.c | 8 +-
drivers/clk/ti/fixed-factor.c | 2 +-
drivers/clk/ti/gate.c | 2 +-
drivers/clk/ti/interface.c | 2 +-
drivers/clk/ti/mux.c | 6 +-
drivers/clk/ux500/abx500-clk.c | 3 +-
drivers/clk/ux500/clk-prcc.c | 8 +-
drivers/clk/ux500/clk-prcmu.c | 16 +-
drivers/clk/ux500/clk-sysctrl.c | 10 +-
drivers/clk/ux500/clk.h | 23 +-
drivers/clk/ux500/u8500_clk.c | 3 +-
drivers/clk/ux500/u8500_of_clk.c | 13 +-
drivers/clk/ux500/u8540_clk.c | 3 +-
drivers/clk/ux500/u9540_clk.c | 1 -
drivers/clk/versatile/clk-icst.c | 5 +-
drivers/clk/versatile/clk-icst.h | 2 +-
drivers/clk/versatile/clk-impd1.c | 19 +-
drivers/clk/versatile/clk-realview.c | 3 +-
drivers/clk/versatile/clk-sp810.c | 30 ++-
drivers/clk/versatile/clk-versatile.c | 3 +-
drivers/clk/versatile/clk-vexpress-osc.c | 2 +-
drivers/clk/versatile/clk-vexpress.c | 6 +-
drivers/clk/x86/clk-lpt.c | 3 +-
drivers/clk/zynq/clkc.c | 22 +-
drivers/clk/zynq/pll.c | 4 +-
drivers/gpu/drm/msm/hdmi/hdmi_phy_8960.c | 3 +-
drivers/media/platform/exynos4-is/media-dev.c | 17 +-
drivers/media/platform/exynos4-is/media-dev.h | 7 +-
drivers/media/platform/omap3isp/isp.h | 2 +-
drivers/rtc/rtc-hym8563.c | 4 +-
drivers/spi/spi-pxa2xx-pci.c | 1 -
drivers/staging/imx-drm/imx-tve.c | 27 +-
include/asm-generic/clkdev.h | 6 +-
include/linux/clk/ti.h | 10 +-
include/linux/clk/zynq.h | 2 +-
include/linux/platform_data/si5351.h | 4 +-
sound/soc/mxs/mxs-saif.c | 4 +-
273 files changed, 1528 insertions(+), 1575 deletions(-)
diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c
index 0d1a892..4d95685 100644
--- a/arch/arm/mach-dove/common.c
+++ b/arch/arm/mach-dove/common.c
@@ -71,9 +71,9 @@ void __init dove_map_io(void)
static int dove_tclk;
static DEFINE_SPINLOCK(gating_lock);
-static struct clk *tclk;
+static struct clk_core *tclk;
-static struct clk __init *dove_register_gate(const char *name,
+static struct clk_core __init *dove_register_gate(const char *name,
const char *parent, u8 bit_idx)
{
return clk_register_gate(NULL, name, parent, 0,
@@ -83,9 +83,9 @@ static struct clk __init *dove_register_gate(const char *name,
static void __init dove_clk_init(void)
{
- struct clk *usb0, *usb1, *sata, *pex0, *pex1, *sdio0, *sdio1;
- struct clk *nand, *camera, *i2s0, *i2s1, *crypto, *ac97, *pdma;
- struct clk *xor0, *xor1, *ge, *gephy;
+ struct clk_core *usb0, *usb1, *sata, *pex0, *pex1, *sdio0, *sdio1;
+ struct clk_core *nand, *camera, *i2s0, *i2s1, *crypto, *ac97, *pdma;
+ struct clk_core *xor0, *xor1, *ge, *gephy;
tclk = clk_register_fixed_rate(NULL, "tclk", NULL, CLK_IS_ROOT,
dove_tclk);
diff --git a/arch/arm/mach-imx/clk-busy.c b/arch/arm/mach-imx/clk-busy.c
index 4bb1bc4..bb3edc5 100644
--- a/arch/arm/mach-imx/clk-busy.c
+++ b/arch/arm/mach-imx/clk-busy.c
@@ -10,7 +10,6 @@
* http://www.gnu.org/copyleft/gpl.html
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/io.h>
#include <linux/slab.h>
@@ -78,12 +77,12 @@ static struct clk_ops clk_busy_divider_ops = {
.set_rate = clk_busy_divider_set_rate,
};
-struct clk *imx_clk_busy_divider(const char *name, const char *parent_name,
+struct clk_core *imx_clk_busy_divider(const char *name, const char *parent_name,
void __iomem *reg, u8 shift, u8 width,
void __iomem *busy_reg, u8 busy_shift)
{
struct clk_busy_divider *busy;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
busy = kzalloc(sizeof(*busy), GFP_KERNEL);
@@ -152,12 +151,12 @@ static struct clk_ops clk_busy_mux_ops = {
.set_parent = clk_busy_mux_set_parent,
};
-struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift,
+struct clk_core *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift,
u8 width, void __iomem *busy_reg, u8 busy_shift,
const char **parent_names, int num_parents)
{
struct clk_busy_mux *busy;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
busy = kzalloc(sizeof(*busy), GFP_KERNEL);
diff --git a/arch/arm/mach-imx/clk-fixup-div.c b/arch/arm/mach-imx/clk-fixup-div.c
index 21db020..8a62bfd 100644
--- a/arch/arm/mach-imx/clk-fixup-div.c
+++ b/arch/arm/mach-imx/clk-fixup-div.c
@@ -92,12 +92,12 @@ static const struct clk_ops clk_fixup_div_ops = {
.set_rate = clk_fixup_div_set_rate,
};
-struct clk *imx_clk_fixup_divider(const char *name, const char *parent,
+struct clk_core *imx_clk_fixup_divider(const char *name, const char *parent,
void __iomem *reg, u8 shift, u8 width,
void (*fixup)(u32 *val))
{
struct clk_fixup_div *fixup_div;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
if (!fixup)
diff --git a/arch/arm/mach-imx/clk-fixup-mux.c b/arch/arm/mach-imx/clk-fixup-mux.c
index 0d40b35..e29dc62 100644
--- a/arch/arm/mach-imx/clk-fixup-mux.c
+++ b/arch/arm/mach-imx/clk-fixup-mux.c
@@ -71,12 +71,12 @@ static const struct clk_ops clk_fixup_mux_ops = {
.set_parent = clk_fixup_mux_set_parent,
};
-struct clk *imx_clk_fixup_mux(const char *name, void __iomem *reg,
+struct clk_core *imx_clk_fixup_mux(const char *name, void __iomem *reg,
u8 shift, u8 width, const char **parents,
int num_parents, void (*fixup)(u32 *val))
{
struct clk_fixup_mux *fixup_mux;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
if (!fixup)
diff --git a/arch/arm/mach-imx/clk-gate-exclusive.c b/arch/arm/mach-imx/clk-gate-exclusive.c
index c12f5f2..b036646 100644
--- a/arch/arm/mach-imx/clk-gate-exclusive.c
+++ b/arch/arm/mach-imx/clk-gate-exclusive.c
@@ -58,12 +58,12 @@ static const struct clk_ops clk_gate_exclusive_ops = {
.is_enabled = clk_gate_exclusive_is_enabled,
};
-struct clk *imx_clk_gate_exclusive(const char *name, const char *parent,
+struct clk_core *imx_clk_gate_exclusive(const char *name, const char *parent,
void __iomem *reg, u8 shift, u32 exclusive_mask)
{
struct clk_gate_exclusive *exgate;
struct clk_gate *gate;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
if (exclusive_mask == 0)
diff --git a/arch/arm/mach-imx/clk-gate2.c b/arch/arm/mach-imx/clk-gate2.c
index 84acdfd..d78f409 100644
--- a/arch/arm/mach-imx/clk-gate2.c
+++ b/arch/arm/mach-imx/clk-gate2.c
@@ -108,14 +108,14 @@ static struct clk_ops clk_gate2_ops = {
.is_enabled = clk_gate2_is_enabled,
};
-struct clk *clk_register_gate2(struct device *dev, const char *name,
+struct clk_core *clk_register_gate2(struct device *dev, const char *name,
const char *parent_name, unsigned long flags,
void __iomem *reg, u8 bit_idx,
u8 clk_gate2_flags, spinlock_t *lock,
unsigned int *share_count)
{
struct clk_gate2 *gate;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
gate = kzalloc(sizeof(struct clk_gate2), GFP_KERNEL);
diff --git a/arch/arm/mach-imx/clk-imx1.c b/arch/arm/mach-imx/clk-imx1.c
index 37c307a..8459bd7 100644
--- a/arch/arm/mach-imx/clk-imx1.c
+++ b/arch/arm/mach-imx/clk-imx1.c
@@ -15,7 +15,6 @@
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/err.h>
@@ -32,7 +31,7 @@ static const char *prem_sel_clks[] = { "clk32_premult", "clk16m", };
static const char *clko_sel_clks[] = { "per1", "hclk", "clk48m", "clk16m",
"prem", "fclk", };
-static struct clk *clk[IMX1_CLK_MAX];
+static struct clk_core *clk[IMX1_CLK_MAX];
static struct clk_onecell_data clk_data;
static void __iomem *ccm __initdata;
diff --git a/arch/arm/mach-imx/clk-imx21.c b/arch/arm/mach-imx/clk-imx21.c
index 4b4c753..56d799c 100644
--- a/arch/arm/mach-imx/clk-imx21.c
+++ b/arch/arm/mach-imx/clk-imx21.c
@@ -9,7 +9,6 @@
* of the License, or (at your option) any later version.
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/of.h>
@@ -36,7 +35,7 @@ static const char *mpll_sel_clks[] = { "fpm_gate", "mpll_osc_sel", };
static const char *spll_sel_clks[] = { "fpm_gate", "mpll_osc_sel", };
static const char *ssi_sel_clks[] = { "spll_gate", "mpll_gate", };
-static struct clk *clk[IMX21_CLK_MAX];
+static struct clk_core *clk[IMX21_CLK_MAX];
static struct clk_onecell_data clk_data;
static void __init _mx21_clocks_init(unsigned long lref, unsigned long href)
diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c
index 59c0c85..06d2c72 100644
--- a/arch/arm/mach-imx/clk-imx25.c
+++ b/arch/arm/mach-imx/clk-imx25.c
@@ -19,7 +19,6 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/list.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include <linux/clkdev.h>
#include <linux/err.h>
@@ -87,7 +86,7 @@ enum mx25_clks {
wdt_ipg, cko_div, cko_sel, cko, clk_max
};
-static struct clk *clk[clk_max];
+static struct clk_core *clk[clk_max];
static int __init __mx25_clocks_init(unsigned long osc_rate,
void __iomem *ccm_base)
@@ -225,16 +224,16 @@ static int __init __mx25_clocks_init(unsigned long osc_rate,
imx_check_clocks(clk, ARRAY_SIZE(clk));
- clk_prepare_enable(clk[emi_ahb]);
+ clk_provider_prepare_enable(clk[emi_ahb]);
/* Clock source for gpt must be derived from AHB */
- clk_set_parent(clk[per5_sel], clk[ahb]);
+ clk_provider_set_parent(clk[per5_sel], clk[ahb]);
/*
* Let's initially set up CLKO parent as ipg, since this configuration
* is used on some imx25 board designs to clock the audio codec.
*/
- clk_set_parent(clk[cko_sel], clk[ipg]);
+ clk_provider_set_parent(clk[cko_sel], clk[ipg]);
return 0;
}
diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c
index ab6349e..7b0f01c 100644
--- a/arch/arm/mach-imx/clk-imx27.c
+++ b/arch/arm/mach-imx/clk-imx27.c
@@ -1,4 +1,3 @@
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/err.h>
@@ -39,7 +38,7 @@ static const char *clko_sel_clks[] = {
static const char *ssi_sel_clks[] = { "spll_gate", "mpll", };
-static struct clk *clk[IMX27_CLK_MAX];
+static struct clk_core *clk[IMX27_CLK_MAX];
static struct clk_onecell_data clk_data;
static void __init _mx27_clocks_init(unsigned long fref)
@@ -156,7 +155,7 @@ static void __init _mx27_clocks_init(unsigned long fref)
clk_register_clkdev(clk[IMX27_CLK_CPU_DIV], NULL, "cpu0");
- clk_prepare_enable(clk[IMX27_CLK_EMI_AHB_GATE]);
+ clk_provider_prepare_enable(clk[IMX27_CLK_EMI_AHB_GATE]);
imx_print_silicon_rev("i.MX27", mx27_revision());
}
diff --git a/arch/arm/mach-imx/clk-imx31.c b/arch/arm/mach-imx/clk-imx31.c
index 286ef42..c95fc5c 100644
--- a/arch/arm/mach-imx/clk-imx31.c
+++ b/arch/arm/mach-imx/clk-imx31.c
@@ -16,7 +16,6 @@
*/
#include <linux/module.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/io.h>
#include <linux/err.h>
@@ -45,7 +44,7 @@ enum mx31_clks {
gacc_gate, emi_gate, rtic_gate, firi_gate, clk_max
};
-static struct clk *clk[clk_max];
+static struct clk_core *clk[clk_max];
static struct clk_onecell_data clk_data;
int __init mx31_clocks_init(unsigned long fref)
@@ -176,11 +175,11 @@ int __init mx31_clocks_init(unsigned long fref)
clk_register_clkdev(clk[sdma_gate], NULL, "imx31-sdma");
clk_register_clkdev(clk[iim_gate], "iim", NULL);
- clk_set_parent(clk[csi], clk[upll]);
- clk_prepare_enable(clk[emi_gate]);
- clk_prepare_enable(clk[iim_gate]);
+ clk_provider_set_parent(clk[csi], clk[upll]);
+ clk_provider_prepare_enable(clk[emi_gate]);
+ clk_provider_prepare_enable(clk[iim_gate]);
mx31_revision();
- clk_disable_unprepare(clk[iim_gate]);
+ clk_provider_disable_unprepare(clk[iim_gate]);
mxc_timer_init(MX31_IO_ADDRESS(MX31_GPT1_BASE_ADDR), MX31_INT_GPT);
diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c
index a0d2b57..846b2cc 100644
--- a/arch/arm/mach-imx/clk-imx35.c
+++ b/arch/arm/mach-imx/clk-imx35.c
@@ -8,7 +8,6 @@
*/
#include <linux/mm.h>
#include <linux/delay.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include <linux/clkdev.h>
#include <linux/of.h>
@@ -67,7 +66,7 @@ enum mx35_clks {
gpu2d_gate, clk_max
};
-static struct clk *clk[clk_max];
+static struct clk_core *clk[clk_max];
int __init mx35_clocks_init(void)
{
@@ -99,7 +98,7 @@ int __init mx35_clocks_init(void)
else
clk[arm] = imx_clk_fixed_factor("arm", "mpll", 1, aad->arm);
- if (clk_get_rate(clk[arm]) > 400000000)
+ if (clk_provider_get_rate(clk[arm]) > 400000000)
hsp_div = hsp_div_532;
else
hsp_div = hsp_div_400;
@@ -257,14 +256,14 @@ int __init mx35_clocks_init(void)
clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0");
clk_register_clkdev(clk[admux_gate], "audmux", NULL);
- clk_prepare_enable(clk[spba_gate]);
- clk_prepare_enable(clk[gpio1_gate]);
- clk_prepare_enable(clk[gpio2_gate]);
- clk_prepare_enable(clk[gpio3_gate]);
- clk_prepare_enable(clk[iim_gate]);
- clk_prepare_enable(clk[emi_gate]);
- clk_prepare_enable(clk[max_gate]);
- clk_prepare_enable(clk[iomuxc_gate]);
+ clk_provider_prepare_enable(clk[spba_gate]);
+ clk_provider_prepare_enable(clk[gpio1_gate]);
+ clk_provider_prepare_enable(clk[gpio2_gate]);
+ clk_provider_prepare_enable(clk[gpio3_gate]);
+ clk_provider_prepare_enable(clk[iim_gate]);
+ clk_provider_prepare_enable(clk[emi_gate]);
+ clk_provider_prepare_enable(clk[max_gate]);
+ clk_provider_prepare_enable(clk[iomuxc_gate]);
/*
* SCC is needed to boot via mmc after a watchdog reset. The clock code
@@ -272,7 +271,7 @@ int __init mx35_clocks_init(void)
* handled here and not needed for mmc) and IIM (which is enabled
* unconditionally above).
*/
- clk_prepare_enable(clk[scc_gate]);
+ clk_provider_prepare_enable(clk[scc_gate]);
imx_print_silicon_rev("i.MX35", mx35_revision());
diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c
index 72d6521..fa9fc84 100644
--- a/arch/arm/mach-imx/clk-imx51-imx53.c
+++ b/arch/arm/mach-imx/clk-imx51-imx53.c
@@ -8,7 +8,6 @@
*/
#include <linux/mm.h>
#include <linux/delay.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
@@ -126,7 +125,7 @@ static const char *spdif_sel[] = { "pll1_sw", "pll2_sw", "pll3_sw", "spdif_xtal_
static const char *spdif0_com_sel[] = { "spdif0_podf", "ssi1_root_gate", };
static const char *mx51_spdif1_com_sel[] = { "spdif1_podf", "ssi2_root_gate", };
-static struct clk *clk[IMX5_CLK_END];
+static struct clk_core *clk[IMX5_CLK_END];
static struct clk_onecell_data clk_data;
static void __init mx5_clocks_common_init(void __iomem *ccm_base)
@@ -289,26 +288,28 @@ static void __init mx5_clocks_common_init(void __iomem *ccm_base)
clk_register_clkdev(clk[IMX5_CLK_GPC_DVFS], "gpc_dvfs", NULL);
/* Set SDHC parents to be PLL2 */
- clk_set_parent(clk[IMX5_CLK_ESDHC_A_SEL], clk[IMX5_CLK_PLL2_SW]);
- clk_set_parent(clk[IMX5_CLK_ESDHC_B_SEL], clk[IMX5_CLK_PLL2_SW]);
+ clk_provider_set_parent(clk[IMX5_CLK_ESDHC_A_SEL],
+ clk[IMX5_CLK_PLL2_SW]);
+ clk_provider_set_parent(clk[IMX5_CLK_ESDHC_B_SEL],
+ clk[IMX5_CLK_PLL2_SW]);
/* move usb phy clk to 24MHz */
- clk_set_parent(clk[IMX5_CLK_USB_PHY_SEL], clk[IMX5_CLK_OSC]);
-
- clk_prepare_enable(clk[IMX5_CLK_GPC_DVFS]);
- clk_prepare_enable(clk[IMX5_CLK_AHB_MAX]); /* esdhc3 */
- clk_prepare_enable(clk[IMX5_CLK_AIPS_TZ1]);
- clk_prepare_enable(clk[IMX5_CLK_AIPS_TZ2]); /* fec */
- clk_prepare_enable(clk[IMX5_CLK_SPBA]);
- clk_prepare_enable(clk[IMX5_CLK_EMI_FAST_GATE]); /* fec */
- clk_prepare_enable(clk[IMX5_CLK_EMI_SLOW_GATE]); /* eim */
- clk_prepare_enable(clk[IMX5_CLK_MIPI_HSC1_GATE]);
- clk_prepare_enable(clk[IMX5_CLK_MIPI_HSC2_GATE]);
- clk_prepare_enable(clk[IMX5_CLK_MIPI_ESC_GATE]);
- clk_prepare_enable(clk[IMX5_CLK_MIPI_HSP_GATE]);
- clk_prepare_enable(clk[IMX5_CLK_TMAX1]);
- clk_prepare_enable(clk[IMX5_CLK_TMAX2]); /* esdhc2, fec */
- clk_prepare_enable(clk[IMX5_CLK_TMAX3]); /* esdhc1, esdhc4 */
+ clk_provider_set_parent(clk[IMX5_CLK_USB_PHY_SEL], clk[IMX5_CLK_OSC]);
+
+ clk_provider_prepare_enable(clk[IMX5_CLK_GPC_DVFS]);
+ clk_provider_prepare_enable(clk[IMX5_CLK_AHB_MAX]); /* esdhc3 */
+ clk_provider_prepare_enable(clk[IMX5_CLK_AIPS_TZ1]);
+ clk_provider_prepare_enable(clk[IMX5_CLK_AIPS_TZ2]); /* fec */
+ clk_provider_prepare_enable(clk[IMX5_CLK_SPBA]);
+ clk_provider_prepare_enable(clk[IMX5_CLK_EMI_FAST_GATE]); /* fec */
+ clk_provider_prepare_enable(clk[IMX5_CLK_EMI_SLOW_GATE]); /* eim */
+ clk_provider_prepare_enable(clk[IMX5_CLK_MIPI_HSC1_GATE]);
+ clk_provider_prepare_enable(clk[IMX5_CLK_MIPI_HSC2_GATE]);
+ clk_provider_prepare_enable(clk[IMX5_CLK_MIPI_ESC_GATE]);
+ clk_provider_prepare_enable(clk[IMX5_CLK_MIPI_HSP_GATE]);
+ clk_provider_prepare_enable(clk[IMX5_CLK_TMAX1]);
+ clk_provider_prepare_enable(clk[IMX5_CLK_TMAX2]); /* esdhc2, fec */
+ clk_provider_prepare_enable(clk[IMX5_CLK_TMAX3]); /* esdhc1, esdhc4 */
}
static void __init mx50_clocks_init(struct device_node *np)
@@ -361,15 +362,15 @@ static void __init mx50_clocks_init(struct device_node *np)
of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
/* set SDHC root clock to 200MHZ*/
- clk_set_rate(clk[IMX5_CLK_ESDHC_A_PODF], 200000000);
- clk_set_rate(clk[IMX5_CLK_ESDHC_B_PODF], 200000000);
+ clk_provider_set_rate(clk[IMX5_CLK_ESDHC_A_PODF], 200000000);
+ clk_provider_set_rate(clk[IMX5_CLK_ESDHC_B_PODF], 200000000);
- clk_prepare_enable(clk[IMX5_CLK_IIM_GATE]);
+ clk_provider_prepare_enable(clk[IMX5_CLK_IIM_GATE]);
imx_print_silicon_rev("i.MX50", IMX_CHIP_REVISION_1_1);
- clk_disable_unprepare(clk[IMX5_CLK_IIM_GATE]);
+ clk_provider_disable_unprepare(clk[IMX5_CLK_IIM_GATE]);
- r = clk_round_rate(clk[IMX5_CLK_USBOH3_PER_GATE], 54000000);
- clk_set_rate(clk[IMX5_CLK_USBOH3_PER_GATE], r);
+ r = clk_provider_round_rate(clk[IMX5_CLK_USBOH3_PER_GATE], 54000000);
+ clk_provider_set_rate(clk[IMX5_CLK_USBOH3_PER_GATE], r);
}
CLK_OF_DECLARE(imx50_ccm, "fsl,imx50-ccm", mx50_clocks_init);
@@ -435,15 +436,16 @@ static void __init mx51_clocks_init(struct device_node *np)
of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
/* set the usboh3 parent to pll2_sw */
- clk_set_parent(clk[IMX5_CLK_USBOH3_SEL], clk[IMX5_CLK_PLL2_SW]);
+ clk_provider_set_parent(clk[IMX5_CLK_USBOH3_SEL],
+ clk[IMX5_CLK_PLL2_SW]);
/* set SDHC root clock to 166.25MHZ*/
- clk_set_rate(clk[IMX5_CLK_ESDHC_A_PODF], 166250000);
- clk_set_rate(clk[IMX5_CLK_ESDHC_B_PODF], 166250000);
+ clk_provider_set_rate(clk[IMX5_CLK_ESDHC_A_PODF], 166250000);
+ clk_provider_set_rate(clk[IMX5_CLK_ESDHC_B_PODF], 166250000);
- clk_prepare_enable(clk[IMX5_CLK_IIM_GATE]);
+ clk_provider_prepare_enable(clk[IMX5_CLK_IIM_GATE]);
imx_print_silicon_rev("i.MX51", mx51_revision());
- clk_disable_unprepare(clk[IMX5_CLK_IIM_GATE]);
+ clk_provider_disable_unprepare(clk[IMX5_CLK_IIM_GATE]);
/*
* Reference Manual says: Functionality of CCDR[18] and CLPCR[23] is no
@@ -545,17 +547,17 @@ static void __init mx53_clocks_init(struct device_node *np)
of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
/* set SDHC root clock to 200MHZ*/
- clk_set_rate(clk[IMX5_CLK_ESDHC_A_PODF], 200000000);
- clk_set_rate(clk[IMX5_CLK_ESDHC_B_PODF], 200000000);
+ clk_provider_set_rate(clk[IMX5_CLK_ESDHC_A_PODF], 200000000);
+ clk_provider_set_rate(clk[IMX5_CLK_ESDHC_B_PODF], 200000000);
/* move can bus clk to 24MHz */
- clk_set_parent(clk[IMX5_CLK_CAN_SEL], clk[IMX5_CLK_LP_APM]);
+ clk_provider_set_parent(clk[IMX5_CLK_CAN_SEL], clk[IMX5_CLK_LP_APM]);
- clk_prepare_enable(clk[IMX5_CLK_IIM_GATE]);
+ clk_provider_prepare_enable(clk[IMX5_CLK_IIM_GATE]);
imx_print_silicon_rev("i.MX53", mx53_revision());
- clk_disable_unprepare(clk[IMX5_CLK_IIM_GATE]);
+ clk_provider_disable_unprepare(clk[IMX5_CLK_IIM_GATE]);
- r = clk_round_rate(clk[IMX5_CLK_USBOH3_PER_GATE], 54000000);
- clk_set_rate(clk[IMX5_CLK_USBOH3_PER_GATE], r);
+ r = clk_provider_round_rate(clk[IMX5_CLK_USBOH3_PER_GATE], 54000000);
+ clk_provider_set_rate(clk[IMX5_CLK_USBOH3_PER_GATE], r);
}
CLK_OF_DECLARE(imx53_ccm, "fsl,imx53-ccm", mx53_clocks_init);
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index 4ee6e77..2171ebf 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -12,7 +12,6 @@
#include <linux/init.h>
#include <linux/types.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/err.h>
#include <linux/io.h>
@@ -82,7 +81,7 @@ static const char *pll5_bypass_sels[] = { "pll5", "pll5_bypass_src", };
static const char *pll6_bypass_sels[] = { "pll6", "pll6_bypass_src", };
static const char *pll7_bypass_sels[] = { "pll7", "pll7_bypass_src", };
-static struct clk *clk[IMX6QDL_CLK_END];
+static struct clk_core *clk[IMX6QDL_CLK_END];
static struct clk_onecell_data clk_data;
static unsigned int const clks_init_on[] __initconst = {
@@ -173,13 +172,20 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
clk[IMX6QDL_PLL7_BYPASS] = imx_clk_mux_flags("pll7_bypass", base + 0x20, 16, 1, pll7_bypass_sels, ARRAY_SIZE(pll7_bypass_sels), CLK_SET_RATE_PARENT);
/* Do not bypass PLLs initially */
- clk_set_parent(clk[IMX6QDL_PLL1_BYPASS], clk[IMX6QDL_CLK_PLL1]);
- clk_set_parent(clk[IMX6QDL_PLL2_BYPASS], clk[IMX6QDL_CLK_PLL2]);
- clk_set_parent(clk[IMX6QDL_PLL3_BYPASS], clk[IMX6QDL_CLK_PLL3]);
- clk_set_parent(clk[IMX6QDL_PLL4_BYPASS], clk[IMX6QDL_CLK_PLL4]);
- clk_set_parent(clk[IMX6QDL_PLL5_BYPASS], clk[IMX6QDL_CLK_PLL5]);
- clk_set_parent(clk[IMX6QDL_PLL6_BYPASS], clk[IMX6QDL_CLK_PLL6]);
- clk_set_parent(clk[IMX6QDL_PLL7_BYPASS], clk[IMX6QDL_CLK_PLL7]);
+ clk_provider_set_parent(clk[IMX6QDL_PLL1_BYPASS],
+ clk[IMX6QDL_CLK_PLL1]);
+ clk_provider_set_parent(clk[IMX6QDL_PLL2_BYPASS],
+ clk[IMX6QDL_CLK_PLL2]);
+ clk_provider_set_parent(clk[IMX6QDL_PLL3_BYPASS],
+ clk[IMX6QDL_CLK_PLL3]);
+ clk_provider_set_parent(clk[IMX6QDL_PLL4_BYPASS],
+ clk[IMX6QDL_CLK_PLL4]);
+ clk_provider_set_parent(clk[IMX6QDL_PLL5_BYPASS],
+ clk[IMX6QDL_CLK_PLL5]);
+ clk_provider_set_parent(clk[IMX6QDL_PLL6_BYPASS],
+ clk[IMX6QDL_CLK_PLL6]);
+ clk_provider_set_parent(clk[IMX6QDL_PLL7_BYPASS],
+ clk[IMX6QDL_CLK_PLL7]);
clk[IMX6QDL_CLK_PLL1_SYS] = imx_clk_gate("pll1_sys", "pll1_bypass", base + 0x00, 13);
clk[IMX6QDL_CLK_PLL2_BUS] = imx_clk_gate("pll2_bus", "pll2_bypass", base + 0x30, 13);
@@ -471,50 +477,65 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
if ((imx_get_soc_revision() != IMX_CHIP_REVISION_1_0) ||
cpu_is_imx6dl()) {
- clk_set_parent(clk[IMX6QDL_CLK_LDB_DI0_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
- clk_set_parent(clk[IMX6QDL_CLK_LDB_DI1_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_LDB_DI0_SEL],
+ clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_LDB_DI1_SEL],
+ clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
}
- clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI0_PRE_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
- clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI1_PRE_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
- clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI0_PRE_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
- clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI1_PRE_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
- clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI0_SEL], clk[IMX6QDL_CLK_IPU1_DI0_PRE]);
- clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI1_SEL], clk[IMX6QDL_CLK_IPU1_DI1_PRE]);
- clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI0_SEL], clk[IMX6QDL_CLK_IPU2_DI0_PRE]);
- clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI1_SEL], clk[IMX6QDL_CLK_IPU2_DI1_PRE]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_IPU1_DI0_PRE_SEL],
+ clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_IPU1_DI1_PRE_SEL],
+ clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_IPU2_DI0_PRE_SEL],
+ clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_IPU2_DI1_PRE_SEL],
+ clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_IPU1_DI0_SEL],
+ clk[IMX6QDL_CLK_IPU1_DI0_PRE]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_IPU1_DI1_SEL],
+ clk[IMX6QDL_CLK_IPU1_DI1_PRE]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_IPU2_DI0_SEL],
+ clk[IMX6QDL_CLK_IPU2_DI0_PRE]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_IPU2_DI1_SEL],
+ clk[IMX6QDL_CLK_IPU2_DI1_PRE]);
/*
* The gpmi needs 100MHz frequency in the EDO/Sync mode,
* We can not get the 100MHz from the pll2_pfd0_352m.
* So choose pll2_pfd2_396m as enfc_sel's parent.
*/
- clk_set_parent(clk[IMX6QDL_CLK_ENFC_SEL], clk[IMX6QDL_CLK_PLL2_PFD2_396M]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_ENFC_SEL],
+ clk[IMX6QDL_CLK_PLL2_PFD2_396M]);
for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
- clk_prepare_enable(clk[clks_init_on[i]]);
+ clk_provider_prepare_enable(clk[clks_init_on[i]]);
if (IS_ENABLED(CONFIG_USB_MXS_PHY)) {
- clk_prepare_enable(clk[IMX6QDL_CLK_USBPHY1_GATE]);
- clk_prepare_enable(clk[IMX6QDL_CLK_USBPHY2_GATE]);
+ clk_provider_prepare_enable(clk[IMX6QDL_CLK_USBPHY1_GATE]);
+ clk_provider_prepare_enable(clk[IMX6QDL_CLK_USBPHY2_GATE]);
}
/*
* Let's initially set up CLKO with OSC24M, since this configuration
* is widely used by imx6q board designs to clock audio codec.
*/
- ret = clk_set_parent(clk[IMX6QDL_CLK_CKO2_SEL], clk[IMX6QDL_CLK_OSC]);
+ ret = clk_provider_set_parent(clk[IMX6QDL_CLK_CKO2_SEL],
+ clk[IMX6QDL_CLK_OSC]);
if (!ret)
- ret = clk_set_parent(clk[IMX6QDL_CLK_CKO], clk[IMX6QDL_CLK_CKO2]);
+ ret = clk_provider_set_parent(clk[IMX6QDL_CLK_CKO],
+ clk[IMX6QDL_CLK_CKO2]);
if (ret)
pr_warn("failed to set up CLKO: %d\n", ret);
/* Audio-related clocks configuration */
- clk_set_parent(clk[IMX6QDL_CLK_SPDIF_SEL], clk[IMX6QDL_CLK_PLL3_PFD3_454M]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_SPDIF_SEL],
+ clk[IMX6QDL_CLK_PLL3_PFD3_454M]);
/* All existing boards with PCIe use LVDS1 */
if (IS_ENABLED(CONFIG_PCI_IMX6))
- clk_set_parent(clk[IMX6QDL_CLK_LVDS1_SEL], clk[IMX6QDL_CLK_SATA_REF_100M]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_LVDS1_SEL],
+ clk[IMX6QDL_CLK_SATA_REF_100M]);
/* Set initial power mode */
imx6q_set_lpm(WAIT_CLOCKED);
diff --git a/arch/arm/mach-imx/clk-imx6sl.c b/arch/arm/mach-imx/clk-imx6sl.c
index 6791ff3..23e6d10 100644
--- a/arch/arm/mach-imx/clk-imx6sl.c
+++ b/arch/arm/mach-imx/clk-imx6sl.c
@@ -7,7 +7,6 @@
*
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/err.h>
#include <linux/of.h>
@@ -95,7 +94,7 @@ static struct clk_div_table video_div_table[] = {
{ }
};
-static struct clk *clks[IMX6SL_CLK_END];
+static struct clk_core *clks[IMX6SL_CLK_END];
static struct clk_onecell_data clk_data;
static void __iomem *ccm_base;
static void __iomem *anatop_base;
@@ -225,13 +224,20 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node)
clks[IMX6SL_PLL7_BYPASS] = imx_clk_mux_flags("pll7_bypass", base + 0x20, 16, 1, pll7_bypass_sels, ARRAY_SIZE(pll7_bypass_sels), CLK_SET_RATE_PARENT);
/* Do not bypass PLLs initially */
- clk_set_parent(clks[IMX6SL_PLL1_BYPASS], clks[IMX6SL_CLK_PLL1]);
- clk_set_parent(clks[IMX6SL_PLL2_BYPASS], clks[IMX6SL_CLK_PLL2]);
- clk_set_parent(clks[IMX6SL_PLL3_BYPASS], clks[IMX6SL_CLK_PLL3]);
- clk_set_parent(clks[IMX6SL_PLL4_BYPASS], clks[IMX6SL_CLK_PLL4]);
- clk_set_parent(clks[IMX6SL_PLL5_BYPASS], clks[IMX6SL_CLK_PLL5]);
- clk_set_parent(clks[IMX6SL_PLL6_BYPASS], clks[IMX6SL_CLK_PLL6]);
- clk_set_parent(clks[IMX6SL_PLL7_BYPASS], clks[IMX6SL_CLK_PLL7]);
+ clk_provider_set_parent(clks[IMX6SL_PLL1_BYPASS],
+ clks[IMX6SL_CLK_PLL1]);
+ clk_provider_set_parent(clks[IMX6SL_PLL2_BYPASS],
+ clks[IMX6SL_CLK_PLL2]);
+ clk_provider_set_parent(clks[IMX6SL_PLL3_BYPASS],
+ clks[IMX6SL_CLK_PLL3]);
+ clk_provider_set_parent(clks[IMX6SL_PLL4_BYPASS],
+ clks[IMX6SL_CLK_PLL4]);
+ clk_provider_set_parent(clks[IMX6SL_PLL5_BYPASS],
+ clks[IMX6SL_CLK_PLL5]);
+ clk_provider_set_parent(clks[IMX6SL_PLL6_BYPASS],
+ clks[IMX6SL_CLK_PLL6]);
+ clk_provider_set_parent(clks[IMX6SL_PLL7_BYPASS],
+ clks[IMX6SL_CLK_PLL7]);
clks[IMX6SL_CLK_PLL1_SYS] = imx_clk_gate("pll1_sys", "pll1_bypass", base + 0x00, 13);
clks[IMX6SL_CLK_PLL2_BUS] = imx_clk_gate("pll2_bus", "pll2_bypass", base + 0x30, 13);
@@ -410,7 +416,7 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node)
of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
/* Ensure the AHB clk is at 132MHz. */
- ret = clk_set_rate(clks[IMX6SL_CLK_AHB], 132000000);
+ ret = clk_provider_set_rate(clks[IMX6SL_CLK_AHB], 132000000);
if (ret)
pr_warn("%s: failed to set AHB clock rate %d!\n",
__func__, ret);
@@ -420,22 +426,23 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node)
* usecount and enabling/disabling of parent PLLs.
*/
for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
- clk_prepare_enable(clks[clks_init_on[i]]);
+ clk_provider_prepare_enable(clks[clks_init_on[i]]);
if (IS_ENABLED(CONFIG_USB_MXS_PHY)) {
- clk_prepare_enable(clks[IMX6SL_CLK_USBPHY1_GATE]);
- clk_prepare_enable(clks[IMX6SL_CLK_USBPHY2_GATE]);
+ clk_provider_prepare_enable(clks[IMX6SL_CLK_USBPHY1_GATE]);
+ clk_provider_prepare_enable(clks[IMX6SL_CLK_USBPHY2_GATE]);
}
/* Audio-related clocks configuration */
- clk_set_parent(clks[IMX6SL_CLK_SPDIF0_SEL], clks[IMX6SL_CLK_PLL3_PFD3]);
+ clk_provider_set_parent(clks[IMX6SL_CLK_SPDIF0_SEL],
+ clks[IMX6SL_CLK_PLL3_PFD3]);
/* set PLL5 video as lcdif pix parent clock */
- clk_set_parent(clks[IMX6SL_CLK_LCDIF_PIX_SEL],
- clks[IMX6SL_CLK_PLL5_VIDEO_DIV]);
+ clk_provider_set_parent(clks[IMX6SL_CLK_LCDIF_PIX_SEL],
+ clks[IMX6SL_CLK_PLL5_VIDEO_DIV]);
- clk_set_parent(clks[IMX6SL_CLK_LCDIF_AXI_SEL],
- clks[IMX6SL_CLK_PLL2_PFD2]);
+ clk_provider_set_parent(clks[IMX6SL_CLK_LCDIF_AXI_SEL],
+ clks[IMX6SL_CLK_PLL2_PFD2]);
/* Set initial power mode */
imx6q_set_lpm(WAIT_CLOCKED);
diff --git a/arch/arm/mach-imx/clk-imx6sx.c b/arch/arm/mach-imx/clk-imx6sx.c
index 27070a7..5fe643f 100644
--- a/arch/arm/mach-imx/clk-imx6sx.c
+++ b/arch/arm/mach-imx/clk-imx6sx.c
@@ -10,7 +10,6 @@
*/
#include <dt-bindings/clock/imx6sx-clock.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/err.h>
#include <linux/init.h>
@@ -90,7 +89,7 @@ static const char *pll5_bypass_sels[] = { "pll5", "pll5_bypass_src", };
static const char *pll6_bypass_sels[] = { "pll6", "pll6_bypass_src", };
static const char *pll7_bypass_sels[] = { "pll7", "pll7_bypass_src", };
-static struct clk *clks[IMX6SX_CLK_CLK_END];
+static struct clk_core *clks[IMX6SX_CLK_CLK_END];
static struct clk_onecell_data clk_data;
static int const clks_init_on[] __initconst = {
@@ -144,12 +143,14 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
clks[IMX6SX_CLK_DUMMY] = imx_clk_fixed("dummy", 0);
- clks[IMX6SX_CLK_CKIL] = of_clk_get_by_name(ccm_node, "ckil");
- clks[IMX6SX_CLK_OSC] = of_clk_get_by_name(ccm_node, "osc");
+ clks[IMX6SX_CLK_CKIL] = of_clk_provider_get_by_name(ccm_node, "ckil");
+ clks[IMX6SX_CLK_OSC] = of_clk_provider_get_by_name(ccm_node, "osc");
/* ipp_di clock is external input */
- clks[IMX6SX_CLK_IPP_DI0] = of_clk_get_by_name(ccm_node, "ipp_di0");
- clks[IMX6SX_CLK_IPP_DI1] = of_clk_get_by_name(ccm_node, "ipp_di1");
+ clks[IMX6SX_CLK_IPP_DI0] = of_clk_provider_get_by_name(ccm_node,
+ "ipp_di0");
+ clks[IMX6SX_CLK_IPP_DI1] = of_clk_provider_get_by_name(ccm_node,
+ "ipp_di1");
/* Clock source from external clock via CLK1 PAD */
clks[IMX6SX_CLK_ANACLK1] = imx_obtain_fixed_clock("anaclk1", 0);
@@ -184,13 +185,20 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
clks[IMX6SX_PLL7_BYPASS] = imx_clk_mux_flags("pll7_bypass", base + 0x20, 16, 1, pll7_bypass_sels, ARRAY_SIZE(pll7_bypass_sels), CLK_SET_RATE_PARENT);
/* Do not bypass PLLs initially */
- clk_set_parent(clks[IMX6SX_PLL1_BYPASS], clks[IMX6SX_CLK_PLL1]);
- clk_set_parent(clks[IMX6SX_PLL2_BYPASS], clks[IMX6SX_CLK_PLL2]);
- clk_set_parent(clks[IMX6SX_PLL3_BYPASS], clks[IMX6SX_CLK_PLL3]);
- clk_set_parent(clks[IMX6SX_PLL4_BYPASS], clks[IMX6SX_CLK_PLL4]);
- clk_set_parent(clks[IMX6SX_PLL5_BYPASS], clks[IMX6SX_CLK_PLL5]);
- clk_set_parent(clks[IMX6SX_PLL6_BYPASS], clks[IMX6SX_CLK_PLL6]);
- clk_set_parent(clks[IMX6SX_PLL7_BYPASS], clks[IMX6SX_CLK_PLL7]);
+ clk_provider_set_parent(clks[IMX6SX_PLL1_BYPASS],
+ clks[IMX6SX_CLK_PLL1]);
+ clk_provider_set_parent(clks[IMX6SX_PLL2_BYPASS],
+ clks[IMX6SX_CLK_PLL2]);
+ clk_provider_set_parent(clks[IMX6SX_PLL3_BYPASS],
+ clks[IMX6SX_CLK_PLL3]);
+ clk_provider_set_parent(clks[IMX6SX_PLL4_BYPASS],
+ clks[IMX6SX_CLK_PLL4]);
+ clk_provider_set_parent(clks[IMX6SX_PLL5_BYPASS],
+ clks[IMX6SX_CLK_PLL5]);
+ clk_provider_set_parent(clks[IMX6SX_PLL6_BYPASS],
+ clks[IMX6SX_CLK_PLL6]);
+ clk_provider_set_parent(clks[IMX6SX_PLL7_BYPASS],
+ clks[IMX6SX_CLK_PLL7]);
clks[IMX6SX_CLK_PLL1_SYS] = imx_clk_gate("pll1_sys", "pll1_bypass", base + 0x00, 13);
clks[IMX6SX_CLK_PLL2_BUS] = imx_clk_gate("pll2_bus", "pll2_bypass", base + 0x30, 13);
@@ -498,65 +506,80 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
- clk_prepare_enable(clks[clks_init_on[i]]);
+ clk_provider_prepare_enable(clks[clks_init_on[i]]);
if (IS_ENABLED(CONFIG_USB_MXS_PHY)) {
- clk_prepare_enable(clks[IMX6SX_CLK_USBPHY1_GATE]);
- clk_prepare_enable(clks[IMX6SX_CLK_USBPHY2_GATE]);
+ clk_provider_prepare_enable(clks[IMX6SX_CLK_USBPHY1_GATE]);
+ clk_provider_prepare_enable(clks[IMX6SX_CLK_USBPHY2_GATE]);
}
/* Set the default 132MHz for EIM module */
- clk_set_parent(clks[IMX6SX_CLK_EIM_SLOW_SEL], clks[IMX6SX_CLK_PLL2_PFD2]);
- clk_set_rate(clks[IMX6SX_CLK_EIM_SLOW], 132000000);
+ clk_provider_set_parent(clks[IMX6SX_CLK_EIM_SLOW_SEL],
+ clks[IMX6SX_CLK_PLL2_PFD2]);
+ clk_provider_set_rate(clks[IMX6SX_CLK_EIM_SLOW], 132000000);
/* set parent clock for LCDIF1 pixel clock */
- clk_set_parent(clks[IMX6SX_CLK_LCDIF1_PRE_SEL], clks[IMX6SX_CLK_PLL5_VIDEO_DIV]);
- clk_set_parent(clks[IMX6SX_CLK_LCDIF1_SEL], clks[IMX6SX_CLK_LCDIF1_PODF]);
+ clk_provider_set_parent(clks[IMX6SX_CLK_LCDIF1_PRE_SEL],
+ clks[IMX6SX_CLK_PLL5_VIDEO_DIV]);
+ clk_provider_set_parent(clks[IMX6SX_CLK_LCDIF1_SEL],
+ clks[IMX6SX_CLK_LCDIF1_PODF]);
/* Set the parent clks of PCIe lvds1 and pcie_axi to be pcie ref, axi */
- if (clk_set_parent(clks[IMX6SX_CLK_LVDS1_SEL], clks[IMX6SX_CLK_PCIE_REF_125M]))
+ if (clk_provider_set_parent(clks[IMX6SX_CLK_LVDS1_SEL], clks[IMX6SX_CLK_PCIE_REF_125M]))
pr_err("Failed to set pcie bus parent clk.\n");
- if (clk_set_parent(clks[IMX6SX_CLK_PCIE_AXI_SEL], clks[IMX6SX_CLK_AXI]))
+ if (clk_provider_set_parent(clks[IMX6SX_CLK_PCIE_AXI_SEL], clks[IMX6SX_CLK_AXI]))
pr_err("Failed to set pcie parent clk.\n");
/*
* Init enet system AHB clock, set to 200Mhz
* pll2_pfd2_396m-> ENET_PODF-> ENET_AHB
*/
- clk_set_parent(clks[IMX6SX_CLK_ENET_PRE_SEL], clks[IMX6SX_CLK_PLL2_PFD2]);
- clk_set_parent(clks[IMX6SX_CLK_ENET_SEL], clks[IMX6SX_CLK_ENET_PODF]);
- clk_set_rate(clks[IMX6SX_CLK_ENET_PODF], 200000000);
- clk_set_rate(clks[IMX6SX_CLK_ENET_REF], 125000000);
- clk_set_rate(clks[IMX6SX_CLK_ENET2_REF], 125000000);
+ clk_provider_set_parent(clks[IMX6SX_CLK_ENET_PRE_SEL],
+ clks[IMX6SX_CLK_PLL2_PFD2]);
+ clk_provider_set_parent(clks[IMX6SX_CLK_ENET_SEL],
+ clks[IMX6SX_CLK_ENET_PODF]);
+ clk_provider_set_rate(clks[IMX6SX_CLK_ENET_PODF], 200000000);
+ clk_provider_set_rate(clks[IMX6SX_CLK_ENET_REF], 125000000);
+ clk_provider_set_rate(clks[IMX6SX_CLK_ENET2_REF], 125000000);
/* Audio clocks */
- clk_set_rate(clks[IMX6SX_CLK_PLL4_AUDIO_DIV], 393216000);
-
- clk_set_parent(clks[IMX6SX_CLK_SPDIF_SEL], clks[IMX6SX_CLK_PLL4_AUDIO_DIV]);
- clk_set_rate(clks[IMX6SX_CLK_SPDIF_PODF], 98304000);
-
- clk_set_parent(clks[IMX6SX_CLK_AUDIO_SEL], clks[IMX6SX_CLK_PLL3_USB_OTG]);
- clk_set_rate(clks[IMX6SX_CLK_AUDIO_PODF], 24000000);
-
- clk_set_parent(clks[IMX6SX_CLK_SSI1_SEL], clks[IMX6SX_CLK_PLL4_AUDIO_DIV]);
- clk_set_parent(clks[IMX6SX_CLK_SSI2_SEL], clks[IMX6SX_CLK_PLL4_AUDIO_DIV]);
- clk_set_parent(clks[IMX6SX_CLK_SSI3_SEL], clks[IMX6SX_CLK_PLL4_AUDIO_DIV]);
- clk_set_rate(clks[IMX6SX_CLK_SSI1_PODF], 24576000);
- clk_set_rate(clks[IMX6SX_CLK_SSI2_PODF], 24576000);
- clk_set_rate(clks[IMX6SX_CLK_SSI3_PODF], 24576000);
-
- clk_set_parent(clks[IMX6SX_CLK_ESAI_SEL], clks[IMX6SX_CLK_PLL4_AUDIO_DIV]);
- clk_set_rate(clks[IMX6SX_CLK_ESAI_PODF], 24576000);
+ clk_provider_set_rate(clks[IMX6SX_CLK_PLL4_AUDIO_DIV], 393216000);
+
+ clk_provider_set_parent(clks[IMX6SX_CLK_SPDIF_SEL],
+ clks[IMX6SX_CLK_PLL4_AUDIO_DIV]);
+ clk_provider_set_rate(clks[IMX6SX_CLK_SPDIF_PODF], 98304000);
+
+ clk_provider_set_parent(clks[IMX6SX_CLK_AUDIO_SEL],
+ clks[IMX6SX_CLK_PLL3_USB_OTG]);
+ clk_provider_set_rate(clks[IMX6SX_CLK_AUDIO_PODF], 24000000);
+
+ clk_provider_set_parent(clks[IMX6SX_CLK_SSI1_SEL],
+ clks[IMX6SX_CLK_PLL4_AUDIO_DIV]);
+ clk_provider_set_parent(clks[IMX6SX_CLK_SSI2_SEL],
+ clks[IMX6SX_CLK_PLL4_AUDIO_DIV]);
+ clk_provider_set_parent(clks[IMX6SX_CLK_SSI3_SEL],
+ clks[IMX6SX_CLK_PLL4_AUDIO_DIV]);
+ clk_provider_set_rate(clks[IMX6SX_CLK_SSI1_PODF], 24576000);
+ clk_provider_set_rate(clks[IMX6SX_CLK_SSI2_PODF], 24576000);
+ clk_provider_set_rate(clks[IMX6SX_CLK_SSI3_PODF], 24576000);
+
+ clk_provider_set_parent(clks[IMX6SX_CLK_ESAI_SEL],
+ clks[IMX6SX_CLK_PLL4_AUDIO_DIV]);
+ clk_provider_set_rate(clks[IMX6SX_CLK_ESAI_PODF], 24576000);
/* Set parent clock for vadc */
- clk_set_parent(clks[IMX6SX_CLK_VID_SEL], clks[IMX6SX_CLK_PLL3_USB_OTG]);
+ clk_provider_set_parent(clks[IMX6SX_CLK_VID_SEL],
+ clks[IMX6SX_CLK_PLL3_USB_OTG]);
/* default parent of can_sel clock is invalid, manually set it here */
- clk_set_parent(clks[IMX6SX_CLK_CAN_SEL], clks[IMX6SX_CLK_PLL3_60M]);
+ clk_provider_set_parent(clks[IMX6SX_CLK_CAN_SEL],
+ clks[IMX6SX_CLK_PLL3_60M]);
/* Update gpu clock from default 528M to 720M */
- clk_set_parent(clks[IMX6SX_CLK_GPU_CORE_SEL], clks[IMX6SX_CLK_PLL3_PFD0]);
- clk_set_parent(clks[IMX6SX_CLK_GPU_AXI_SEL], clks[IMX6SX_CLK_PLL3_PFD0]);
+ clk_provider_set_parent(clks[IMX6SX_CLK_GPU_CORE_SEL],
+ clks[IMX6SX_CLK_PLL3_PFD0]);
+ clk_provider_set_parent(clks[IMX6SX_CLK_GPU_AXI_SEL],
+ clks[IMX6SX_CLK_PLL3_PFD0]);
/* Set initial power mode */
imx6q_set_lpm(WAIT_CLOCKED);
diff --git a/arch/arm/mach-imx/clk-pfd.c b/arch/arm/mach-imx/clk-pfd.c
index 0b0f6f6..7f172a2 100644
--- a/arch/arm/mach-imx/clk-pfd.c
+++ b/arch/arm/mach-imx/clk-pfd.c
@@ -10,7 +10,6 @@
* http://www.gnu.org/copyleft/gpl.html
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/io.h>
#include <linux/slab.h>
@@ -128,11 +127,11 @@ static const struct clk_ops clk_pfd_ops = {
.is_enabled = clk_pfd_is_enabled,
};
-struct clk *imx_clk_pfd(const char *name, const char *parent_name,
+struct clk_core *imx_clk_pfd(const char *name, const char *parent_name,
void __iomem *reg, u8 idx)
{
struct clk_pfd *pfd;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
pfd = kzalloc(sizeof(*pfd), GFP_KERNEL);
diff --git a/arch/arm/mach-imx/clk-pllv1.c b/arch/arm/mach-imx/clk-pllv1.c
index d21d14c..7ef2cab 100644
--- a/arch/arm/mach-imx/clk-pllv1.c
+++ b/arch/arm/mach-imx/clk-pllv1.c
@@ -1,4 +1,3 @@
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/io.h>
#include <linux/slab.h>
@@ -97,11 +96,11 @@ static struct clk_ops clk_pllv1_ops = {
.recalc_rate = clk_pllv1_recalc_rate,
};
-struct clk *imx_clk_pllv1(const char *name, const char *parent,
+struct clk_core *imx_clk_pllv1(const char *name, const char *parent,
void __iomem *base)
{
struct clk_pllv1 *pll;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
pll = kmalloc(sizeof(*pll), GFP_KERNEL);
diff --git a/arch/arm/mach-imx/clk-pllv2.c b/arch/arm/mach-imx/clk-pllv2.c
index 20889d5..3dca7df 100644
--- a/arch/arm/mach-imx/clk-pllv2.c
+++ b/arch/arm/mach-imx/clk-pllv2.c
@@ -1,5 +1,4 @@
#include <linux/kernel.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include <linux/errno.h>
#include <linux/delay.h>
@@ -237,11 +236,11 @@ static struct clk_ops clk_pllv2_ops = {
.set_rate = clk_pllv2_set_rate,
};
-struct clk *imx_clk_pllv2(const char *name, const char *parent,
+struct clk_core *imx_clk_pllv2(const char *name, const char *parent,
void __iomem *base)
{
struct clk_pllv2 *pll;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
pll = kzalloc(sizeof(*pll), GFP_KERNEL);
diff --git a/arch/arm/mach-imx/clk-pllv3.c b/arch/arm/mach-imx/clk-pllv3.c
index 57de74d..eabcdcd 100644
--- a/arch/arm/mach-imx/clk-pllv3.c
+++ b/arch/arm/mach-imx/clk-pllv3.c
@@ -10,7 +10,6 @@
* http://www.gnu.org/copyleft/gpl.html
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/delay.h>
#include <linux/io.h>
@@ -283,13 +282,13 @@ static const struct clk_ops clk_pllv3_enet_ops = {
.recalc_rate = clk_pllv3_enet_recalc_rate,
};
-struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
+struct clk_core *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
const char *parent_name, void __iomem *base,
u32 div_mask)
{
struct clk_pllv3 *pll;
const struct clk_ops *ops;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
pll = kzalloc(sizeof(*pll), GFP_KERNEL);
diff --git a/arch/arm/mach-imx/clk-vf610.c b/arch/arm/mach-imx/clk-vf610.c
index a178184..d631305 100644
--- a/arch/arm/mach-imx/clk-vf610.c
+++ b/arch/arm/mach-imx/clk-vf610.c
@@ -9,7 +9,6 @@
*/
#include <linux/of_address.h>
-#include <linux/clk.h>
#include <dt-bindings/clock/vf610-clock.h>
#include "clk.h"
@@ -97,7 +96,7 @@ static struct clk_div_table pll4_main_div_table[] = {
{ }
};
-static struct clk *clk[VF610_CLK_END];
+static struct clk_core *clk[VF610_CLK_END];
static struct clk_onecell_data clk_data;
static unsigned int const clks_init_on[] __initconst = {
@@ -321,23 +320,35 @@ static void __init vf610_clocks_init(struct device_node *ccm_node)
imx_check_clocks(clk, ARRAY_SIZE(clk));
- clk_set_parent(clk[VF610_CLK_QSPI0_SEL], clk[VF610_CLK_PLL1_PFD4]);
- clk_set_rate(clk[VF610_CLK_QSPI0_X4_DIV], clk_get_rate(clk[VF610_CLK_QSPI0_SEL]) / 2);
- clk_set_rate(clk[VF610_CLK_QSPI0_X2_DIV], clk_get_rate(clk[VF610_CLK_QSPI0_X4_DIV]) / 2);
- clk_set_rate(clk[VF610_CLK_QSPI0_X1_DIV], clk_get_rate(clk[VF610_CLK_QSPI0_X2_DIV]) / 2);
-
- clk_set_parent(clk[VF610_CLK_QSPI1_SEL], clk[VF610_CLK_PLL1_PFD4]);
- clk_set_rate(clk[VF610_CLK_QSPI1_X4_DIV], clk_get_rate(clk[VF610_CLK_QSPI1_SEL]) / 2);
- clk_set_rate(clk[VF610_CLK_QSPI1_X2_DIV], clk_get_rate(clk[VF610_CLK_QSPI1_X4_DIV]) / 2);
- clk_set_rate(clk[VF610_CLK_QSPI1_X1_DIV], clk_get_rate(clk[VF610_CLK_QSPI1_X2_DIV]) / 2);
-
- clk_set_parent(clk[VF610_CLK_SAI0_SEL], clk[VF610_CLK_AUDIO_EXT]);
- clk_set_parent(clk[VF610_CLK_SAI1_SEL], clk[VF610_CLK_AUDIO_EXT]);
- clk_set_parent(clk[VF610_CLK_SAI2_SEL], clk[VF610_CLK_AUDIO_EXT]);
- clk_set_parent(clk[VF610_CLK_SAI3_SEL], clk[VF610_CLK_AUDIO_EXT]);
+ clk_provider_set_parent(clk[VF610_CLK_QSPI0_SEL],
+ clk[VF610_CLK_PLL1_PFD4]);
+ clk_provider_set_rate(clk[VF610_CLK_QSPI0_X4_DIV],
+ clk_provider_get_rate(clk[VF610_CLK_QSPI0_SEL]) / 2);
+ clk_provider_set_rate(clk[VF610_CLK_QSPI0_X2_DIV],
+ clk_provider_get_rate(clk[VF610_CLK_QSPI0_X4_DIV]) / 2);
+ clk_provider_set_rate(clk[VF610_CLK_QSPI0_X1_DIV],
+ clk_provider_get_rate(clk[VF610_CLK_QSPI0_X2_DIV]) / 2);
+
+ clk_provider_set_parent(clk[VF610_CLK_QSPI1_SEL],
+ clk[VF610_CLK_PLL1_PFD4]);
+ clk_provider_set_rate(clk[VF610_CLK_QSPI1_X4_DIV],
+ clk_provider_get_rate(clk[VF610_CLK_QSPI1_SEL]) / 2);
+ clk_provider_set_rate(clk[VF610_CLK_QSPI1_X2_DIV],
+ clk_provider_get_rate(clk[VF610_CLK_QSPI1_X4_DIV]) / 2);
+ clk_provider_set_rate(clk[VF610_CLK_QSPI1_X1_DIV],
+ clk_provider_get_rate(clk[VF610_CLK_QSPI1_X2_DIV]) / 2);
+
+ clk_provider_set_parent(clk[VF610_CLK_SAI0_SEL],
+ clk[VF610_CLK_AUDIO_EXT]);
+ clk_provider_set_parent(clk[VF610_CLK_SAI1_SEL],
+ clk[VF610_CLK_AUDIO_EXT]);
+ clk_provider_set_parent(clk[VF610_CLK_SAI2_SEL],
+ clk[VF610_CLK_AUDIO_EXT]);
+ clk_provider_set_parent(clk[VF610_CLK_SAI3_SEL],
+ clk[VF610_CLK_AUDIO_EXT]);
for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
- clk_prepare_enable(clk[clks_init_on[i]]);
+ clk_provider_prepare_enable(clk[clks_init_on[i]]);
/* Add the clocks to provider list */
clk_data.clks = clk;
diff --git a/arch/arm/mach-imx/clk.c b/arch/arm/mach-imx/clk.c
index df12b53..fc54203 100644
--- a/arch/arm/mach-imx/clk.c
+++ b/arch/arm/mach-imx/clk.c
@@ -1,4 +1,3 @@
-#include <linux/clk.h>
#include <linux/err.h>
#include <linux/of.h>
#include <linux/slab.h>
@@ -7,7 +6,7 @@
DEFINE_SPINLOCK(imx_ccm_lock);
-void __init imx_check_clocks(struct clk *clks[], unsigned int count)
+void __init imx_check_clocks(struct clk_core *clks[], unsigned int count)
{
unsigned i;
@@ -17,10 +16,10 @@ void __init imx_check_clocks(struct clk *clks[], unsigned int count)
i, PTR_ERR(clks[i]));
}
-static struct clk * __init imx_obtain_fixed_clock_from_dt(const char *name)
+static struct clk_core * __init imx_obtain_fixed_clock_from_dt(const char *name)
{
struct of_phandle_args phandle;
- struct clk *clk = ERR_PTR(-ENODEV);
+ struct clk_core *clk = ERR_PTR(-ENODEV);
char *path;
path = kasprintf(GFP_KERNEL, "/clocks/%s", name);
@@ -37,10 +36,10 @@ static struct clk * __init imx_obtain_fixed_clock_from_dt(const char *name)
return clk;
}
-struct clk * __init imx_obtain_fixed_clock(
+struct clk_core * __init imx_obtain_fixed_clock(
const char *name, unsigned long rate)
{
- struct clk *clk;
+ struct clk_core *clk;
clk = imx_obtain_fixed_clock_from_dt(name);
if (IS_ERR(clk))
diff --git a/arch/arm/mach-imx/clk.h b/arch/arm/mach-imx/clk.h
index 4cdf8b6..d4d234c 100644
--- a/arch/arm/mach-imx/clk.h
+++ b/arch/arm/mach-imx/clk.h
@@ -6,14 +6,14 @@
extern spinlock_t imx_ccm_lock;
-void imx_check_clocks(struct clk *clks[], unsigned int count);
+void imx_check_clocks(struct clk_core *clks[], unsigned int count);
extern void imx_cscmr1_fixup(u32 *val);
-struct clk *imx_clk_pllv1(const char *name, const char *parent,
+struct clk_core *imx_clk_pllv1(const char *name, const char *parent,
void __iomem *base);
-struct clk *imx_clk_pllv2(const char *name, const char *parent,
+struct clk_core *imx_clk_pllv2(const char *name, const char *parent,
void __iomem *base);
enum imx_pllv3_type {
@@ -24,29 +24,29 @@ enum imx_pllv3_type {
IMX_PLLV3_ENET,
};
-struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
+struct clk_core *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
const char *parent_name, void __iomem *base, u32 div_mask);
-struct clk *clk_register_gate2(struct device *dev, const char *name,
+struct clk_core *clk_register_gate2(struct device *dev, const char *name,
const char *parent_name, unsigned long flags,
void __iomem *reg, u8 bit_idx,
u8 clk_gate_flags, spinlock_t *lock,
unsigned int *share_count);
-struct clk * imx_obtain_fixed_clock(
+struct clk_core * imx_obtain_fixed_clock(
const char *name, unsigned long rate);
-struct clk *imx_clk_gate_exclusive(const char *name, const char *parent,
+struct clk_core *imx_clk_gate_exclusive(const char *name, const char *parent,
void __iomem *reg, u8 shift, u32 exclusive_mask);
-static inline struct clk *imx_clk_gate2(const char *name, const char *parent,
+static inline struct clk_core *imx_clk_gate2(const char *name, const char *parent,
void __iomem *reg, u8 shift)
{
return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
shift, 0, &imx_ccm_lock, NULL);
}
-static inline struct clk *imx_clk_gate2_shared(const char *name,
+static inline struct clk_core *imx_clk_gate2_shared(const char *name,
const char *parent, void __iomem *reg, u8 shift,
unsigned int *share_count)
{
@@ -54,38 +54,38 @@ static inline struct clk *imx_clk_gate2_shared(const char *name,
shift, 0, &imx_ccm_lock, share_count);
}
-struct clk *imx_clk_pfd(const char *name, const char *parent_name,
+struct clk_core *imx_clk_pfd(const char *name, const char *parent_name,
void __iomem *reg, u8 idx);
-struct clk *imx_clk_busy_divider(const char *name, const char *parent_name,
+struct clk_core *imx_clk_busy_divider(const char *name, const char *parent_name,
void __iomem *reg, u8 shift, u8 width,
void __iomem *busy_reg, u8 busy_shift);
-struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift,
+struct clk_core *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift,
u8 width, void __iomem *busy_reg, u8 busy_shift,
const char **parent_names, int num_parents);
-struct clk *imx_clk_fixup_divider(const char *name, const char *parent,
+struct clk_core *imx_clk_fixup_divider(const char *name, const char *parent,
void __iomem *reg, u8 shift, u8 width,
void (*fixup)(u32 *val));
-struct clk *imx_clk_fixup_mux(const char *name, void __iomem *reg,
+struct clk_core *imx_clk_fixup_mux(const char *name, void __iomem *reg,
u8 shift, u8 width, const char **parents,
int num_parents, void (*fixup)(u32 *val));
-static inline struct clk *imx_clk_fixed(const char *name, int rate)
+static inline struct clk_core *imx_clk_fixed(const char *name, int rate)
{
return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate);
}
-static inline struct clk *imx_clk_divider(const char *name, const char *parent,
+static inline struct clk_core *imx_clk_divider(const char *name, const char *parent,
void __iomem *reg, u8 shift, u8 width)
{
return clk_register_divider(NULL, name, parent, CLK_SET_RATE_PARENT,
reg, shift, width, 0, &imx_ccm_lock);
}
-static inline struct clk *imx_clk_divider_flags(const char *name,
+static inline struct clk_core *imx_clk_divider_flags(const char *name,
const char *parent, void __iomem *reg, u8 shift, u8 width,
unsigned long flags)
{
@@ -93,21 +93,21 @@ static inline struct clk *imx_clk_divider_flags(const char *name,
reg, shift, width, 0, &imx_ccm_lock);
}
-static inline struct clk *imx_clk_gate(const char *name, const char *parent,
+static inline struct clk_core *imx_clk_gate(const char *name, const char *parent,
void __iomem *reg, u8 shift)
{
return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
shift, 0, &imx_ccm_lock);
}
-static inline struct clk *imx_clk_gate_dis(const char *name, const char *parent,
+static inline struct clk_core *imx_clk_gate_dis(const char *name, const char *parent,
void __iomem *reg, u8 shift)
{
return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
shift, CLK_GATE_SET_TO_DISABLE, &imx_ccm_lock);
}
-static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg,
+static inline struct clk_core *imx_clk_mux(const char *name, void __iomem *reg,
u8 shift, u8 width, const char **parents, int num_parents)
{
return clk_register_mux(NULL, name, parents, num_parents,
@@ -115,7 +115,7 @@ static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg,
width, 0, &imx_ccm_lock);
}
-static inline struct clk *imx_clk_mux_flags(const char *name,
+static inline struct clk_core *imx_clk_mux_flags(const char *name,
void __iomem *reg, u8 shift, u8 width, const char **parents,
int num_parents, unsigned long flags)
{
@@ -124,7 +124,7 @@ static inline struct clk *imx_clk_mux_flags(const char *name,
&imx_ccm_lock);
}
-static inline struct clk *imx_clk_fixed_factor(const char *name,
+static inline struct clk_core *imx_clk_fixed_factor(const char *name,
const char *parent, unsigned int mult, unsigned int div)
{
return clk_register_fixed_factor(NULL, name, parent,
diff --git a/arch/arm/mach-msm/clock-pcom.c b/arch/arm/mach-msm/clock-pcom.c
index 9a80449..14352c4 100644
--- a/arch/arm/mach-msm/clock-pcom.c
+++ b/arch/arm/mach-msm/clock-pcom.c
@@ -132,7 +132,7 @@ static int msm_clock_pcom_probe(struct platform_device *pdev)
for (i = 0; i < pdata->num_lookups; i++) {
const struct clk_pcom_desc *desc = &pdata->lookup[i];
- struct clk *c;
+ struct clk_core *c;
struct clk_pcom *p;
struct clk_hw *hw;
struct clk_init_data init;
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
index e6ac679..fee2643 100644
--- a/arch/arm/mach-mv78xx0/common.c
+++ b/arch/arm/mach-mv78xx0/common.c
@@ -164,7 +164,7 @@ void __init mv78xx0_map_io(void)
/*****************************************************************************
* CLK tree
****************************************************************************/
-static struct clk *tclk;
+static struct clk_core *tclk;
static void __init clk_init(void)
{
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index 018353d..0f41427 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -551,7 +551,7 @@ static struct regulator_consumer_supply cm_t35_camera_supplies[] = {
static void __init cm_t35_init_camera(void)
{
- struct clk *clk;
+ struct clk_core *clk;
clk = clk_register_fixed_rate(NULL, "mt9t001-clkin", NULL, CLK_IS_ROOT,
48000000);
diff --git a/arch/arm/mach-omap2/cclock3xxx_data.c b/arch/arm/mach-omap2/cclock3xxx_data.c
index eb8c75e..1180abe 100644
--- a/arch/arm/mach-omap2/cclock3xxx_data.c
+++ b/arch/arm/mach-omap2/cclock3xxx_data.c
@@ -18,7 +18,6 @@
*/
#include <linux/kernel.h>
-#include <linux/clk.h>
#include <linux/clk-private.h>
#include <linux/list.h>
#include <linux/io.h>
@@ -107,7 +106,7 @@ static struct dpll_data dpll3_dd = {
.max_divider = OMAP3_MAX_DPLL_DIV,
};
-static struct clk dpll3_ck;
+static struct clk_core dpll3_ck;
static const char *dpll3_ck_parent_names[] = {
"sys_ck",
@@ -137,7 +136,7 @@ DEFINE_CLK_DIVIDER(dpll3_m2_ck, "dpll3_ck", &dpll3_ck, 0x0,
OMAP3430_CORE_DPLL_CLKOUT_DIV_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk core_ck;
+static struct clk_core core_ck;
static const char *core_ck_parent_names[] = {
"dpll3_m2_ck",
@@ -158,7 +157,7 @@ DEFINE_CLK_DIVIDER(l4_ick, "l3_ick", &l3_ick, 0x0,
OMAP3430_CLKSEL_L4_SHIFT, OMAP3430_CLKSEL_L4_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk security_l4_ick2;
+static struct clk_core security_l4_ick2;
static const char *security_l4_ick2_parent_names[] = {
"l4_ick",
@@ -167,7 +166,7 @@ static const char *security_l4_ick2_parent_names[] = {
DEFINE_STRUCT_CLK_HW_OMAP(security_l4_ick2, NULL);
DEFINE_STRUCT_CLK(security_l4_ick2, security_l4_ick2_parent_names, core_ck_ops);
-static struct clk aes1_ick;
+static struct clk_core aes1_ick;
static const char *aes1_ick_parent_names[] = {
"security_l4_ick2",
@@ -190,7 +189,7 @@ static struct clk_hw_omap aes1_ick_hw = {
DEFINE_STRUCT_CLK(aes1_ick, aes1_ick_parent_names, aes1_ick_ops);
-static struct clk core_l4_ick;
+static struct clk_core core_l4_ick;
static const struct clk_ops core_l4_ick_ops = {
.init = &omap2_init_clk_clkdm,
@@ -199,7 +198,7 @@ static const struct clk_ops core_l4_ick_ops = {
DEFINE_STRUCT_CLK_HW_OMAP(core_l4_ick, "core_l4_clkdm");
DEFINE_STRUCT_CLK(core_l4_ick, security_l4_ick2_parent_names, core_l4_ick_ops);
-static struct clk aes2_ick;
+static struct clk_core aes2_ick;
static const char *aes2_ick_parent_names[] = {
"core_l4_ick",
@@ -224,7 +223,7 @@ static struct clk_hw_omap aes2_ick_hw = {
DEFINE_STRUCT_CLK(aes2_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk dpll1_fck;
+static struct clk_core dpll1_fck;
static struct dpll_data dpll1_dd = {
.mult_div1_reg = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_CLKSEL1_PLL),
@@ -248,7 +247,7 @@ static struct dpll_data dpll1_dd = {
.max_divider = OMAP3_MAX_DPLL_DIV,
};
-static struct clk dpll1_ck;
+static struct clk_core dpll1_ck;
static const struct clk_ops dpll1_ck_ops = {
.init = &omap2_init_clk_clkdm,
@@ -279,7 +278,7 @@ DEFINE_CLK_DIVIDER(dpll1_x2m2_ck, "dpll1_x2_ck", &dpll1_x2_ck, 0x0,
OMAP3430_MPU_DPLL_CLKOUT_DIV_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk mpu_ck;
+static struct clk_core mpu_ck;
static const char *mpu_ck_parent_names[] = {
"dpll1_x2m2_ck",
@@ -293,7 +292,7 @@ DEFINE_CLK_DIVIDER(arm_fck, "mpu_ck", &mpu_ck, 0x0,
OMAP3430_ST_MPU_CLK_SHIFT, OMAP3430_ST_MPU_CLK_WIDTH,
0x0, NULL);
-static struct clk cam_ick;
+static struct clk_core cam_ick;
static struct clk_hw_omap cam_ick_hw = {
.hw = {
@@ -358,7 +357,7 @@ static struct dpll_data dpll4_dd_3630 __initdata = {
.flags = DPLL_J_TYPE
};
-static struct clk dpll4_ck;
+static struct clk_core dpll4_ck;
static const struct clk_ops dpll4_ck_ops = {
.init = &omap2_init_clk_clkdm,
@@ -422,7 +421,7 @@ DEFINE_CLK_DIVIDER(dpll4_m5_ck, "dpll4_ck", &dpll4_ck, 0x0,
OMAP3430_CLKSEL_CAM_SHIFT, OMAP3630_CLKSEL_CAM_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk dpll4_m5x2_ck;
+static struct clk_core dpll4_m5x2_ck;
static const char *dpll4_m5x2_ck_parent_names[] = {
"dpll4_m5_ck",
@@ -459,7 +458,7 @@ static struct clk_hw_omap dpll4_m5x2_ck_hw = {
DEFINE_STRUCT_CLK_FLAGS(dpll4_m5x2_ck, dpll4_m5x2_ck_parent_names,
dpll4_m5x2_ck_ops, CLK_SET_RATE_PARENT);
-static struct clk dpll4_m5x2_ck_3630 = {
+static struct clk_core dpll4_m5x2_ck_3630 = {
.name = "dpll4_m5x2_ck",
.hw = &dpll4_m5x2_ck_hw.hw,
.parent_names = dpll4_m5x2_ck_parent_names,
@@ -468,7 +467,7 @@ static struct clk dpll4_m5x2_ck_3630 = {
.flags = CLK_SET_RATE_PARENT,
};
-static struct clk cam_mclk;
+static struct clk_core cam_mclk;
static const char *cam_mclk_parent_names[] = {
"dpll4_m5x2_ck",
@@ -483,7 +482,7 @@ static struct clk_hw_omap cam_mclk_hw = {
.clkdm_name = "cam_clkdm",
};
-static struct clk cam_mclk = {
+static struct clk_core cam_mclk = {
.name = "cam_mclk",
.hw = &cam_mclk_hw.hw,
.parent_names = cam_mclk_parent_names,
@@ -512,7 +511,7 @@ DEFINE_CLK_DIVIDER(dpll4_m2_ck, "dpll4_ck", &dpll4_ck, 0x0,
OMAP3430_DIV_96M_SHIFT, OMAP3630_DIV_96M_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk dpll4_m2x2_ck;
+static struct clk_core dpll4_m2x2_ck;
static const char *dpll4_m2x2_ck_parent_names[] = {
"dpll4_m2_ck",
@@ -531,7 +530,7 @@ static struct clk_hw_omap dpll4_m2x2_ck_hw = {
DEFINE_STRUCT_CLK(dpll4_m2x2_ck, dpll4_m2x2_ck_parent_names, dpll4_m5x2_ck_ops);
-static struct clk dpll4_m2x2_ck_3630 = {
+static struct clk_core dpll4_m2x2_ck_3630 = {
.name = "dpll4_m2x2_ck",
.hw = &dpll4_m2x2_ck_hw.hw,
.parent_names = dpll4_m2x2_ck_parent_names,
@@ -539,7 +538,7 @@ static struct clk dpll4_m2x2_ck_3630 = {
.ops = &dpll4_m5x2_ck_3630_ops,
};
-static struct clk omap_96m_alwon_fck;
+static struct clk_core omap_96m_alwon_fck;
static const char *omap_96m_alwon_fck_parent_names[] = {
"dpll4_m2x2_ck",
@@ -549,7 +548,7 @@ DEFINE_STRUCT_CLK_HW_OMAP(omap_96m_alwon_fck, NULL);
DEFINE_STRUCT_CLK(omap_96m_alwon_fck, omap_96m_alwon_fck_parent_names,
core_ck_ops);
-static struct clk cm_96m_fck;
+static struct clk_core cm_96m_fck;
static const char *cm_96m_fck_parent_names[] = {
"omap_96m_alwon_fck",
@@ -568,7 +567,7 @@ DEFINE_CLK_DIVIDER_TABLE(dpll4_m3_ck, "dpll4_ck", &dpll4_ck, 0x0,
OMAP3430_CLKSEL_TV_SHIFT, OMAP3630_CLKSEL_TV_WIDTH,
0, dpll4_mx_ck_div_table, NULL);
-static struct clk dpll4_m3x2_ck;
+static struct clk_core dpll4_m3x2_ck;
static const char *dpll4_m3x2_ck_parent_names[] = {
"dpll4_m3_ck",
@@ -587,7 +586,7 @@ static struct clk_hw_omap dpll4_m3x2_ck_hw = {
DEFINE_STRUCT_CLK(dpll4_m3x2_ck, dpll4_m3x2_ck_parent_names, dpll4_m5x2_ck_ops);
-static struct clk dpll4_m3x2_ck_3630 = {
+static struct clk_core dpll4_m3x2_ck_3630 = {
.name = "dpll4_m3x2_ck",
.hw = &dpll4_m3x2_ck_hw.hw,
.parent_names = dpll4_m3x2_ck_parent_names,
@@ -651,7 +650,7 @@ static const char *omap_48m_fck_parent_names[] = {
"cm_96m_fck", "sys_altclk",
};
-static struct clk omap_48m_fck;
+static struct clk_core omap_48m_fck;
static const struct clk_ops omap_48m_fck_ops = {
.recalc_rate = &omap2_clksel_recalc,
@@ -672,7 +671,7 @@ DEFINE_STRUCT_CLK(omap_48m_fck, omap_48m_fck_parent_names, omap_48m_fck_ops);
DEFINE_CLK_FIXED_FACTOR(omap_12m_fck, "omap_48m_fck", &omap_48m_fck, 0x0, 1, 4);
-static struct clk core_12m_fck;
+static struct clk_core core_12m_fck;
static const char *core_12m_fck_parent_names[] = {
"omap_12m_fck",
@@ -681,7 +680,7 @@ static const char *core_12m_fck_parent_names[] = {
DEFINE_STRUCT_CLK_HW_OMAP(core_12m_fck, "core_l4_clkdm");
DEFINE_STRUCT_CLK(core_12m_fck, core_12m_fck_parent_names, core_l4_ick_ops);
-static struct clk core_48m_fck;
+static struct clk_core core_48m_fck;
static const char *core_48m_fck_parent_names[] = {
"omap_48m_fck",
@@ -698,7 +697,7 @@ DEFINE_CLK_MUX(omap_96m_fck, omap_96m_fck_parent_names, NULL, 0x0,
OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1),
OMAP3430_SOURCE_96M_SHIFT, OMAP3430_SOURCE_96M_WIDTH, 0x0, NULL);
-static struct clk core_96m_fck;
+static struct clk_core core_96m_fck;
static const char *core_96m_fck_parent_names[] = {
"omap_96m_fck",
@@ -707,7 +706,7 @@ static const char *core_96m_fck_parent_names[] = {
DEFINE_STRUCT_CLK_HW_OMAP(core_96m_fck, "core_l4_clkdm");
DEFINE_STRUCT_CLK(core_96m_fck, core_96m_fck_parent_names, core_l4_ick_ops);
-static struct clk core_l3_ick;
+static struct clk_core core_l3_ick;
static const char *core_l3_ick_parent_names[] = {
"l3_ick",
@@ -718,7 +717,7 @@ DEFINE_STRUCT_CLK(core_l3_ick, core_l3_ick_parent_names, core_l4_ick_ops);
DEFINE_CLK_FIXED_FACTOR(dpll3_m2x2_ck, "dpll3_m2_ck", &dpll3_m2_ck, 0x0, 2, 1);
-static struct clk corex2_fck;
+static struct clk_core corex2_fck;
static const char *corex2_fck_parent_names[] = {
"dpll3_m2x2_ck",
@@ -727,7 +726,7 @@ static const char *corex2_fck_parent_names[] = {
DEFINE_STRUCT_CLK_HW_OMAP(corex2_fck, NULL);
DEFINE_STRUCT_CLK(corex2_fck, corex2_fck_parent_names, core_ck_ops);
-static struct clk cpefuse_fck;
+static struct clk_core cpefuse_fck;
static struct clk_hw_omap cpefuse_fck_hw = {
.hw = {
@@ -740,7 +739,7 @@ static struct clk_hw_omap cpefuse_fck_hw = {
DEFINE_STRUCT_CLK(cpefuse_fck, dpll3_ck_parent_names, aes2_ick_ops);
-static struct clk csi2_96m_fck;
+static struct clk_core csi2_96m_fck;
static const char *csi2_96m_fck_parent_names[] = {
"core_96m_fck",
@@ -757,7 +756,7 @@ static struct clk_hw_omap csi2_96m_fck_hw = {
DEFINE_STRUCT_CLK(csi2_96m_fck, csi2_96m_fck_parent_names, aes2_ick_ops);
-static struct clk d2d_26m_fck;
+static struct clk_core d2d_26m_fck;
static struct clk_hw_omap d2d_26m_fck_hw = {
.hw = {
@@ -771,7 +770,7 @@ static struct clk_hw_omap d2d_26m_fck_hw = {
DEFINE_STRUCT_CLK(d2d_26m_fck, dpll3_ck_parent_names, aes2_ick_ops);
-static struct clk des1_ick;
+static struct clk_core des1_ick;
static struct clk_hw_omap des1_ick_hw = {
.hw = {
@@ -784,7 +783,7 @@ static struct clk_hw_omap des1_ick_hw = {
DEFINE_STRUCT_CLK(des1_ick, aes1_ick_parent_names, aes1_ick_ops);
-static struct clk des2_ick;
+static struct clk_core des2_ick;
static struct clk_hw_omap des2_ick_hw = {
.hw = {
@@ -803,7 +802,7 @@ DEFINE_CLK_DIVIDER(dpll1_fck, "core_ck", &core_ck, 0x0,
OMAP3430_MPU_CLK_SRC_SHIFT, OMAP3430_MPU_CLK_SRC_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk dpll2_fck;
+static struct clk_core dpll2_fck;
static struct dpll_data dpll2_dd = {
.mult_div1_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, OMAP3430_CM_CLKSEL1_PLL),
@@ -828,7 +827,7 @@ static struct dpll_data dpll2_dd = {
.max_divider = OMAP3_MAX_DPLL_DIV,
};
-static struct clk dpll2_ck;
+static struct clk_core dpll2_ck;
static struct clk_hw_omap dpll2_ck_hw = {
.hw = {
@@ -857,7 +856,7 @@ DEFINE_CLK_DIVIDER(dpll3_m3_ck, "dpll3_ck", &dpll3_ck, 0x0,
OMAP3430_DIV_DPLL3_SHIFT, OMAP3430_DIV_DPLL3_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk dpll3_m3x2_ck;
+static struct clk_core dpll3_m3x2_ck;
static const char *dpll3_m3x2_ck_parent_names[] = {
"dpll3_m3_ck",
@@ -876,7 +875,7 @@ static struct clk_hw_omap dpll3_m3x2_ck_hw = {
DEFINE_STRUCT_CLK(dpll3_m3x2_ck, dpll3_m3x2_ck_parent_names, dpll4_m5x2_ck_ops);
-static struct clk dpll3_m3x2_ck_3630 = {
+static struct clk_core dpll3_m3x2_ck_3630 = {
.name = "dpll3_m3x2_ck",
.hw = &dpll3_m3x2_ck_hw.hw,
.parent_names = dpll3_m3x2_ck_parent_names,
@@ -891,7 +890,7 @@ DEFINE_CLK_DIVIDER_TABLE(dpll4_m4_ck, "dpll4_ck", &dpll4_ck, 0x0,
OMAP3430_CLKSEL_DSS1_SHIFT, OMAP3630_CLKSEL_DSS1_WIDTH,
0, dpll4_mx_ck_div_table, NULL);
-static struct clk dpll4_m4x2_ck;
+static struct clk_core dpll4_m4x2_ck;
static const char *dpll4_m4x2_ck_parent_names[] = {
"dpll4_m4_ck",
@@ -911,7 +910,7 @@ static struct clk_hw_omap dpll4_m4x2_ck_hw = {
DEFINE_STRUCT_CLK_FLAGS(dpll4_m4x2_ck, dpll4_m4x2_ck_parent_names,
dpll4_m5x2_ck_ops, CLK_SET_RATE_PARENT);
-static struct clk dpll4_m4x2_ck_3630 = {
+static struct clk_core dpll4_m4x2_ck_3630 = {
.name = "dpll4_m4x2_ck",
.hw = &dpll4_m4x2_ck_hw.hw,
.parent_names = dpll4_m4x2_ck_parent_names,
@@ -925,7 +924,7 @@ DEFINE_CLK_DIVIDER(dpll4_m6_ck, "dpll4_ck", &dpll4_ck, 0x0,
OMAP3430_DIV_DPLL4_SHIFT, OMAP3630_DIV_DPLL4_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk dpll4_m6x2_ck;
+static struct clk_core dpll4_m6x2_ck;
static const char *dpll4_m6x2_ck_parent_names[] = {
"dpll4_m6_ck",
@@ -944,7 +943,7 @@ static struct clk_hw_omap dpll4_m6x2_ck_hw = {
DEFINE_STRUCT_CLK(dpll4_m6x2_ck, dpll4_m6x2_ck_parent_names, dpll4_m5x2_ck_ops);
-static struct clk dpll4_m6x2_ck_3630 = {
+static struct clk_core dpll4_m6x2_ck_3630 = {
.name = "dpll4_m6x2_ck",
.hw = &dpll4_m6x2_ck_hw.hw,
.parent_names = dpll4_m6x2_ck_parent_names,
@@ -976,7 +975,7 @@ static struct dpll_data dpll5_dd = {
.max_divider = OMAP3_MAX_DPLL_DIV,
};
-static struct clk dpll5_ck;
+static struct clk_core dpll5_ck;
static struct clk_hw_omap dpll5_ck_hw = {
.hw = {
@@ -994,7 +993,7 @@ DEFINE_CLK_DIVIDER(dpll5_m2_ck, "dpll5_ck", &dpll5_ck, 0x0,
OMAP3430ES2_DIV_120M_SHIFT, OMAP3430ES2_DIV_120M_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk dss1_alwon_fck_3430es1;
+static struct clk_core dss1_alwon_fck_3430es1;
static const char *dss1_alwon_fck_3430es1_parent_names[] = {
"dpll4_m4x2_ck",
@@ -1013,7 +1012,7 @@ DEFINE_STRUCT_CLK_FLAGS(dss1_alwon_fck_3430es1,
dss1_alwon_fck_3430es1_parent_names, aes2_ick_ops,
CLK_SET_RATE_PARENT);
-static struct clk dss1_alwon_fck_3430es2;
+static struct clk_core dss1_alwon_fck_3430es2;
static struct clk_hw_omap dss1_alwon_fck_3430es2_hw = {
.hw = {
@@ -1029,7 +1028,7 @@ DEFINE_STRUCT_CLK_FLAGS(dss1_alwon_fck_3430es2,
dss1_alwon_fck_3430es1_parent_names, aes2_ick_ops,
CLK_SET_RATE_PARENT);
-static struct clk dss2_alwon_fck;
+static struct clk_core dss2_alwon_fck;
static struct clk_hw_omap dss2_alwon_fck_hw = {
.hw = {
@@ -1042,7 +1041,7 @@ static struct clk_hw_omap dss2_alwon_fck_hw = {
DEFINE_STRUCT_CLK(dss2_alwon_fck, dpll3_ck_parent_names, aes2_ick_ops);
-static struct clk dss_96m_fck;
+static struct clk_core dss_96m_fck;
static struct clk_hw_omap dss_96m_fck_hw = {
.hw = {
@@ -1055,7 +1054,7 @@ static struct clk_hw_omap dss_96m_fck_hw = {
DEFINE_STRUCT_CLK(dss_96m_fck, core_96m_fck_parent_names, aes2_ick_ops);
-static struct clk dss_ick_3430es1;
+static struct clk_core dss_ick_3430es1;
static struct clk_hw_omap dss_ick_3430es1_hw = {
.hw = {
@@ -1069,7 +1068,7 @@ static struct clk_hw_omap dss_ick_3430es1_hw = {
DEFINE_STRUCT_CLK(dss_ick_3430es1, security_l4_ick2_parent_names, aes2_ick_ops);
-static struct clk dss_ick_3430es2;
+static struct clk_core dss_ick_3430es2;
static struct clk_hw_omap dss_ick_3430es2_hw = {
.hw = {
@@ -1083,7 +1082,7 @@ static struct clk_hw_omap dss_ick_3430es2_hw = {
DEFINE_STRUCT_CLK(dss_ick_3430es2, security_l4_ick2_parent_names, aes2_ick_ops);
-static struct clk dss_tv_fck;
+static struct clk_core dss_tv_fck;
static const char *dss_tv_fck_parent_names[] = {
"omap_54m_fck",
@@ -1100,7 +1099,7 @@ static struct clk_hw_omap dss_tv_fck_hw = {
DEFINE_STRUCT_CLK(dss_tv_fck, dss_tv_fck_parent_names, aes2_ick_ops);
-static struct clk emac_fck;
+static struct clk_core emac_fck;
static const char *emac_fck_parent_names[] = {
"rmii_ck",
@@ -1116,7 +1115,7 @@ static struct clk_hw_omap emac_fck_hw = {
DEFINE_STRUCT_CLK(emac_fck, emac_fck_parent_names, aes1_ick_ops);
-static struct clk ipss_ick;
+static struct clk_core ipss_ick;
static const char *ipss_ick_parent_names[] = {
"core_l3_ick",
@@ -1134,7 +1133,7 @@ static struct clk_hw_omap ipss_ick_hw = {
DEFINE_STRUCT_CLK(ipss_ick, ipss_ick_parent_names, aes2_ick_ops);
-static struct clk emac_ick;
+static struct clk_core emac_ick;
static const char *emac_ick_parent_names[] = {
"ipss_ick",
@@ -1152,7 +1151,7 @@ static struct clk_hw_omap emac_ick_hw = {
DEFINE_STRUCT_CLK(emac_ick, emac_ick_parent_names, aes2_ick_ops);
-static struct clk emu_core_alwon_ck;
+static struct clk_core emu_core_alwon_ck;
static const char *emu_core_alwon_ck_parent_names[] = {
"dpll3_m3x2_ck",
@@ -1162,7 +1161,7 @@ DEFINE_STRUCT_CLK_HW_OMAP(emu_core_alwon_ck, "dpll3_clkdm");
DEFINE_STRUCT_CLK(emu_core_alwon_ck, emu_core_alwon_ck_parent_names,
core_l4_ick_ops);
-static struct clk emu_mpu_alwon_ck;
+static struct clk_core emu_mpu_alwon_ck;
static const char *emu_mpu_alwon_ck_parent_names[] = {
"mpu_ck",
@@ -1171,7 +1170,7 @@ static const char *emu_mpu_alwon_ck_parent_names[] = {
DEFINE_STRUCT_CLK_HW_OMAP(emu_mpu_alwon_ck, NULL);
DEFINE_STRUCT_CLK(emu_mpu_alwon_ck, emu_mpu_alwon_ck_parent_names, core_ck_ops);
-static struct clk emu_per_alwon_ck;
+static struct clk_core emu_per_alwon_ck;
static const char *emu_per_alwon_ck_parent_names[] = {
"dpll4_m6x2_ck",
@@ -1222,7 +1221,7 @@ static const struct clk_ops emu_src_ck_ops = {
.disable = &omap2_clkops_disable_clkdm,
};
-static struct clk emu_src_ck;
+static struct clk_core emu_src_ck;
static struct clk_hw_omap emu_src_ck_hw = {
.hw = {
@@ -1241,7 +1240,7 @@ DEFINE_CLK_DIVIDER(atclk_fck, "emu_src_ck", &emu_src_ck, 0x0,
OMAP3430_CLKSEL_ATCLK_SHIFT, OMAP3430_CLKSEL_ATCLK_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk fac_ick;
+static struct clk_core fac_ick;
static struct clk_hw_omap fac_ick_hw = {
.hw = {
@@ -1255,7 +1254,7 @@ static struct clk_hw_omap fac_ick_hw = {
DEFINE_STRUCT_CLK(fac_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk fshostusb_fck;
+static struct clk_core fshostusb_fck;
static const char *fshostusb_fck_parent_names[] = {
"core_48m_fck",
@@ -1273,7 +1272,7 @@ static struct clk_hw_omap fshostusb_fck_hw = {
DEFINE_STRUCT_CLK(fshostusb_fck, fshostusb_fck_parent_names, aes2_ick_ops);
-static struct clk gfx_l3_ck;
+static struct clk_core gfx_l3_ck;
static struct clk_hw_omap gfx_l3_ck_hw = {
.hw = {
@@ -1292,7 +1291,7 @@ DEFINE_CLK_DIVIDER(gfx_l3_fck, "l3_ick", &l3_ick, 0x0,
OMAP_CLKSEL_GFX_SHIFT, OMAP_CLKSEL_GFX_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk gfx_cg1_ck;
+static struct clk_core gfx_cg1_ck;
static const char *gfx_cg1_ck_parent_names[] = {
"gfx_l3_fck",
@@ -1310,7 +1309,7 @@ static struct clk_hw_omap gfx_cg1_ck_hw = {
DEFINE_STRUCT_CLK(gfx_cg1_ck, gfx_cg1_ck_parent_names, aes2_ick_ops);
-static struct clk gfx_cg2_ck;
+static struct clk_core gfx_cg2_ck;
static struct clk_hw_omap gfx_cg2_ck_hw = {
.hw = {
@@ -1324,7 +1323,7 @@ static struct clk_hw_omap gfx_cg2_ck_hw = {
DEFINE_STRUCT_CLK(gfx_cg2_ck, gfx_cg1_ck_parent_names, aes2_ick_ops);
-static struct clk gfx_l3_ick;
+static struct clk_core gfx_l3_ick;
static const char *gfx_l3_ick_parent_names[] = {
"gfx_l3_ck",
@@ -1333,7 +1332,7 @@ static const char *gfx_l3_ick_parent_names[] = {
DEFINE_STRUCT_CLK_HW_OMAP(gfx_l3_ick, "gfx_3430es1_clkdm");
DEFINE_STRUCT_CLK(gfx_l3_ick, gfx_l3_ick_parent_names, core_l4_ick_ops);
-static struct clk wkup_32k_fck;
+static struct clk_core wkup_32k_fck;
static const char *wkup_32k_fck_parent_names[] = {
"omap_32k_fck",
@@ -1342,7 +1341,7 @@ static const char *wkup_32k_fck_parent_names[] = {
DEFINE_STRUCT_CLK_HW_OMAP(wkup_32k_fck, "wkup_clkdm");
DEFINE_STRUCT_CLK(wkup_32k_fck, wkup_32k_fck_parent_names, core_l4_ick_ops);
-static struct clk gpio1_dbck;
+static struct clk_core gpio1_dbck;
static const char *gpio1_dbck_parent_names[] = {
"wkup_32k_fck",
@@ -1359,12 +1358,12 @@ static struct clk_hw_omap gpio1_dbck_hw = {
DEFINE_STRUCT_CLK(gpio1_dbck, gpio1_dbck_parent_names, aes2_ick_ops);
-static struct clk wkup_l4_ick;
+static struct clk_core wkup_l4_ick;
DEFINE_STRUCT_CLK_HW_OMAP(wkup_l4_ick, "wkup_clkdm");
DEFINE_STRUCT_CLK(wkup_l4_ick, dpll3_ck_parent_names, core_l4_ick_ops);
-static struct clk gpio1_ick;
+static struct clk_core gpio1_ick;
static const char *gpio1_ick_parent_names[] = {
"wkup_l4_ick",
@@ -1382,13 +1381,13 @@ static struct clk_hw_omap gpio1_ick_hw = {
DEFINE_STRUCT_CLK(gpio1_ick, gpio1_ick_parent_names, aes2_ick_ops);
-static struct clk per_32k_alwon_fck;
+static struct clk_core per_32k_alwon_fck;
DEFINE_STRUCT_CLK_HW_OMAP(per_32k_alwon_fck, "per_clkdm");
DEFINE_STRUCT_CLK(per_32k_alwon_fck, wkup_32k_fck_parent_names,
core_l4_ick_ops);
-static struct clk gpio2_dbck;
+static struct clk_core gpio2_dbck;
static const char *gpio2_dbck_parent_names[] = {
"per_32k_alwon_fck",
@@ -1405,12 +1404,12 @@ static struct clk_hw_omap gpio2_dbck_hw = {
DEFINE_STRUCT_CLK(gpio2_dbck, gpio2_dbck_parent_names, aes2_ick_ops);
-static struct clk per_l4_ick;
+static struct clk_core per_l4_ick;
DEFINE_STRUCT_CLK_HW_OMAP(per_l4_ick, "per_clkdm");
DEFINE_STRUCT_CLK(per_l4_ick, security_l4_ick2_parent_names, core_l4_ick_ops);
-static struct clk gpio2_ick;
+static struct clk_core gpio2_ick;
static const char *gpio2_ick_parent_names[] = {
"per_l4_ick",
@@ -1428,7 +1427,7 @@ static struct clk_hw_omap gpio2_ick_hw = {
DEFINE_STRUCT_CLK(gpio2_ick, gpio2_ick_parent_names, aes2_ick_ops);
-static struct clk gpio3_dbck;
+static struct clk_core gpio3_dbck;
static struct clk_hw_omap gpio3_dbck_hw = {
.hw = {
@@ -1441,7 +1440,7 @@ static struct clk_hw_omap gpio3_dbck_hw = {
DEFINE_STRUCT_CLK(gpio3_dbck, gpio2_dbck_parent_names, aes2_ick_ops);
-static struct clk gpio3_ick;
+static struct clk_core gpio3_ick;
static struct clk_hw_omap gpio3_ick_hw = {
.hw = {
@@ -1455,7 +1454,7 @@ static struct clk_hw_omap gpio3_ick_hw = {
DEFINE_STRUCT_CLK(gpio3_ick, gpio2_ick_parent_names, aes2_ick_ops);
-static struct clk gpio4_dbck;
+static struct clk_core gpio4_dbck;
static struct clk_hw_omap gpio4_dbck_hw = {
.hw = {
@@ -1468,7 +1467,7 @@ static struct clk_hw_omap gpio4_dbck_hw = {
DEFINE_STRUCT_CLK(gpio4_dbck, gpio2_dbck_parent_names, aes2_ick_ops);
-static struct clk gpio4_ick;
+static struct clk_core gpio4_ick;
static struct clk_hw_omap gpio4_ick_hw = {
.hw = {
@@ -1482,7 +1481,7 @@ static struct clk_hw_omap gpio4_ick_hw = {
DEFINE_STRUCT_CLK(gpio4_ick, gpio2_ick_parent_names, aes2_ick_ops);
-static struct clk gpio5_dbck;
+static struct clk_core gpio5_dbck;
static struct clk_hw_omap gpio5_dbck_hw = {
.hw = {
@@ -1495,7 +1494,7 @@ static struct clk_hw_omap gpio5_dbck_hw = {
DEFINE_STRUCT_CLK(gpio5_dbck, gpio2_dbck_parent_names, aes2_ick_ops);
-static struct clk gpio5_ick;
+static struct clk_core gpio5_ick;
static struct clk_hw_omap gpio5_ick_hw = {
.hw = {
@@ -1509,7 +1508,7 @@ static struct clk_hw_omap gpio5_ick_hw = {
DEFINE_STRUCT_CLK(gpio5_ick, gpio2_ick_parent_names, aes2_ick_ops);
-static struct clk gpio6_dbck;
+static struct clk_core gpio6_dbck;
static struct clk_hw_omap gpio6_dbck_hw = {
.hw = {
@@ -1522,7 +1521,7 @@ static struct clk_hw_omap gpio6_dbck_hw = {
DEFINE_STRUCT_CLK(gpio6_dbck, gpio2_dbck_parent_names, aes2_ick_ops);
-static struct clk gpio6_ick;
+static struct clk_core gpio6_ick;
static struct clk_hw_omap gpio6_ick_hw = {
.hw = {
@@ -1536,7 +1535,7 @@ static struct clk_hw_omap gpio6_ick_hw = {
DEFINE_STRUCT_CLK(gpio6_ick, gpio2_ick_parent_names, aes2_ick_ops);
-static struct clk gpmc_fck;
+static struct clk_core gpmc_fck;
static struct clk_hw_omap gpmc_fck_hw = {
.hw = {
@@ -1565,7 +1564,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt10_fck, "core_l4_clkdm", omap343x_gpt_clksel,
OMAP3430_EN_GPT10_SHIFT, &clkhwops_wait,
gpt10_fck_parent_names, clkout2_src_ck_ops);
-static struct clk gpt10_ick;
+static struct clk_core gpt10_ick;
static struct clk_hw_omap gpt10_ick_hw = {
.hw = {
@@ -1586,7 +1585,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt11_fck, "core_l4_clkdm", omap343x_gpt_clksel,
OMAP3430_EN_GPT11_SHIFT, &clkhwops_wait,
gpt10_fck_parent_names, clkout2_src_ck_ops);
-static struct clk gpt11_ick;
+static struct clk_core gpt11_ick;
static struct clk_hw_omap gpt11_ick_hw = {
.hw = {
@@ -1600,7 +1599,7 @@ static struct clk_hw_omap gpt11_ick_hw = {
DEFINE_STRUCT_CLK(gpt11_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk gpt12_fck;
+static struct clk_core gpt12_fck;
static const char *gpt12_fck_parent_names[] = {
"secure_32k_fck",
@@ -1609,7 +1608,7 @@ static const char *gpt12_fck_parent_names[] = {
DEFINE_STRUCT_CLK_HW_OMAP(gpt12_fck, "wkup_clkdm");
DEFINE_STRUCT_CLK(gpt12_fck, gpt12_fck_parent_names, core_l4_ick_ops);
-static struct clk gpt12_ick;
+static struct clk_core gpt12_ick;
static struct clk_hw_omap gpt12_ick_hw = {
.hw = {
@@ -1630,7 +1629,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt1_fck, "wkup_clkdm", omap343x_gpt_clksel,
OMAP3430_EN_GPT1_SHIFT, &clkhwops_wait,
gpt10_fck_parent_names, clkout2_src_ck_ops);
-static struct clk gpt1_ick;
+static struct clk_core gpt1_ick;
static struct clk_hw_omap gpt1_ick_hw = {
.hw = {
@@ -1651,7 +1650,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt2_fck, "per_clkdm", omap343x_gpt_clksel,
OMAP3430_EN_GPT2_SHIFT, &clkhwops_wait,
gpt10_fck_parent_names, clkout2_src_ck_ops);
-static struct clk gpt2_ick;
+static struct clk_core gpt2_ick;
static struct clk_hw_omap gpt2_ick_hw = {
.hw = {
@@ -1672,7 +1671,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt3_fck, "per_clkdm", omap343x_gpt_clksel,
OMAP3430_EN_GPT3_SHIFT, &clkhwops_wait,
gpt10_fck_parent_names, clkout2_src_ck_ops);
-static struct clk gpt3_ick;
+static struct clk_core gpt3_ick;
static struct clk_hw_omap gpt3_ick_hw = {
.hw = {
@@ -1693,7 +1692,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt4_fck, "per_clkdm", omap343x_gpt_clksel,
OMAP3430_EN_GPT4_SHIFT, &clkhwops_wait,
gpt10_fck_parent_names, clkout2_src_ck_ops);
-static struct clk gpt4_ick;
+static struct clk_core gpt4_ick;
static struct clk_hw_omap gpt4_ick_hw = {
.hw = {
@@ -1714,7 +1713,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt5_fck, "per_clkdm", omap343x_gpt_clksel,
OMAP3430_EN_GPT5_SHIFT, &clkhwops_wait,
gpt10_fck_parent_names, clkout2_src_ck_ops);
-static struct clk gpt5_ick;
+static struct clk_core gpt5_ick;
static struct clk_hw_omap gpt5_ick_hw = {
.hw = {
@@ -1735,7 +1734,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt6_fck, "per_clkdm", omap343x_gpt_clksel,
OMAP3430_EN_GPT6_SHIFT, &clkhwops_wait,
gpt10_fck_parent_names, clkout2_src_ck_ops);
-static struct clk gpt6_ick;
+static struct clk_core gpt6_ick;
static struct clk_hw_omap gpt6_ick_hw = {
.hw = {
@@ -1756,7 +1755,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt7_fck, "per_clkdm", omap343x_gpt_clksel,
OMAP3430_EN_GPT7_SHIFT, &clkhwops_wait,
gpt10_fck_parent_names, clkout2_src_ck_ops);
-static struct clk gpt7_ick;
+static struct clk_core gpt7_ick;
static struct clk_hw_omap gpt7_ick_hw = {
.hw = {
@@ -1777,7 +1776,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt8_fck, "per_clkdm", omap343x_gpt_clksel,
OMAP3430_EN_GPT8_SHIFT, &clkhwops_wait,
gpt10_fck_parent_names, clkout2_src_ck_ops);
-static struct clk gpt8_ick;
+static struct clk_core gpt8_ick;
static struct clk_hw_omap gpt8_ick_hw = {
.hw = {
@@ -1798,7 +1797,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt9_fck, "per_clkdm", omap343x_gpt_clksel,
OMAP3430_EN_GPT9_SHIFT, &clkhwops_wait,
gpt10_fck_parent_names, clkout2_src_ck_ops);
-static struct clk gpt9_ick;
+static struct clk_core gpt9_ick;
static struct clk_hw_omap gpt9_ick_hw = {
.hw = {
@@ -1812,7 +1811,7 @@ static struct clk_hw_omap gpt9_ick_hw = {
DEFINE_STRUCT_CLK(gpt9_ick, gpio2_ick_parent_names, aes2_ick_ops);
-static struct clk hdq_fck;
+static struct clk_core hdq_fck;
static const char *hdq_fck_parent_names[] = {
"core_12m_fck",
@@ -1830,7 +1829,7 @@ static struct clk_hw_omap hdq_fck_hw = {
DEFINE_STRUCT_CLK(hdq_fck, hdq_fck_parent_names, aes2_ick_ops);
-static struct clk hdq_ick;
+static struct clk_core hdq_ick;
static struct clk_hw_omap hdq_ick_hw = {
.hw = {
@@ -1844,7 +1843,7 @@ static struct clk_hw_omap hdq_ick_hw = {
DEFINE_STRUCT_CLK(hdq_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk hecc_ck;
+static struct clk_core hecc_ck;
static struct clk_hw_omap hecc_ck_hw = {
.hw = {
@@ -1858,7 +1857,7 @@ static struct clk_hw_omap hecc_ck_hw = {
DEFINE_STRUCT_CLK(hecc_ck, dpll3_ck_parent_names, aes2_ick_ops);
-static struct clk hsotgusb_fck_am35xx;
+static struct clk_core hsotgusb_fck_am35xx;
static struct clk_hw_omap hsotgusb_fck_am35xx_hw = {
.hw = {
@@ -1871,7 +1870,7 @@ static struct clk_hw_omap hsotgusb_fck_am35xx_hw = {
DEFINE_STRUCT_CLK(hsotgusb_fck_am35xx, dpll3_ck_parent_names, aes2_ick_ops);
-static struct clk hsotgusb_ick_3430es1;
+static struct clk_core hsotgusb_ick_3430es1;
static struct clk_hw_omap hsotgusb_ick_3430es1_hw = {
.hw = {
@@ -1885,7 +1884,7 @@ static struct clk_hw_omap hsotgusb_ick_3430es1_hw = {
DEFINE_STRUCT_CLK(hsotgusb_ick_3430es1, ipss_ick_parent_names, aes2_ick_ops);
-static struct clk hsotgusb_ick_3430es2;
+static struct clk_core hsotgusb_ick_3430es2;
static struct clk_hw_omap hsotgusb_ick_3430es2_hw = {
.hw = {
@@ -1899,7 +1898,7 @@ static struct clk_hw_omap hsotgusb_ick_3430es2_hw = {
DEFINE_STRUCT_CLK(hsotgusb_ick_3430es2, ipss_ick_parent_names, aes2_ick_ops);
-static struct clk hsotgusb_ick_am35xx;
+static struct clk_core hsotgusb_ick_am35xx;
static struct clk_hw_omap hsotgusb_ick_am35xx_hw = {
.hw = {
@@ -1913,7 +1912,7 @@ static struct clk_hw_omap hsotgusb_ick_am35xx_hw = {
DEFINE_STRUCT_CLK(hsotgusb_ick_am35xx, emac_ick_parent_names, aes2_ick_ops);
-static struct clk i2c1_fck;
+static struct clk_core i2c1_fck;
static struct clk_hw_omap i2c1_fck_hw = {
.hw = {
@@ -1927,7 +1926,7 @@ static struct clk_hw_omap i2c1_fck_hw = {
DEFINE_STRUCT_CLK(i2c1_fck, csi2_96m_fck_parent_names, aes2_ick_ops);
-static struct clk i2c1_ick;
+static struct clk_core i2c1_ick;
static struct clk_hw_omap i2c1_ick_hw = {
.hw = {
@@ -1941,7 +1940,7 @@ static struct clk_hw_omap i2c1_ick_hw = {
DEFINE_STRUCT_CLK(i2c1_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk i2c2_fck;
+static struct clk_core i2c2_fck;
static struct clk_hw_omap i2c2_fck_hw = {
.hw = {
@@ -1955,7 +1954,7 @@ static struct clk_hw_omap i2c2_fck_hw = {
DEFINE_STRUCT_CLK(i2c2_fck, csi2_96m_fck_parent_names, aes2_ick_ops);
-static struct clk i2c2_ick;
+static struct clk_core i2c2_ick;
static struct clk_hw_omap i2c2_ick_hw = {
.hw = {
@@ -1969,7 +1968,7 @@ static struct clk_hw_omap i2c2_ick_hw = {
DEFINE_STRUCT_CLK(i2c2_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk i2c3_fck;
+static struct clk_core i2c3_fck;
static struct clk_hw_omap i2c3_fck_hw = {
.hw = {
@@ -1983,7 +1982,7 @@ static struct clk_hw_omap i2c3_fck_hw = {
DEFINE_STRUCT_CLK(i2c3_fck, csi2_96m_fck_parent_names, aes2_ick_ops);
-static struct clk i2c3_ick;
+static struct clk_core i2c3_ick;
static struct clk_hw_omap i2c3_ick_hw = {
.hw = {
@@ -1997,7 +1996,7 @@ static struct clk_hw_omap i2c3_ick_hw = {
DEFINE_STRUCT_CLK(i2c3_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk icr_ick;
+static struct clk_core icr_ick;
static struct clk_hw_omap icr_ick_hw = {
.hw = {
@@ -2011,7 +2010,7 @@ static struct clk_hw_omap icr_ick_hw = {
DEFINE_STRUCT_CLK(icr_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk iva2_ck;
+static struct clk_core iva2_ck;
static const char *iva2_ck_parent_names[] = {
"dpll2_m2_ck",
@@ -2029,7 +2028,7 @@ static struct clk_hw_omap iva2_ck_hw = {
DEFINE_STRUCT_CLK(iva2_ck, iva2_ck_parent_names, aes2_ick_ops);
-static struct clk mad2d_ick;
+static struct clk_core mad2d_ick;
static struct clk_hw_omap mad2d_ick_hw = {
.hw = {
@@ -2043,7 +2042,7 @@ static struct clk_hw_omap mad2d_ick_hw = {
DEFINE_STRUCT_CLK(mad2d_ick, core_l3_ick_parent_names, aes2_ick_ops);
-static struct clk mailboxes_ick;
+static struct clk_core mailboxes_ick;
static struct clk_hw_omap mailboxes_ick_hw = {
.hw = {
@@ -2084,7 +2083,7 @@ DEFINE_CLK_OMAP_MUX_GATE(mcbsp1_fck, "core_l4_clkdm", mcbsp_15_clksel,
OMAP3430_EN_MCBSP1_SHIFT, &clkhwops_wait,
mcbsp1_fck_parent_names, clkout2_src_ck_ops);
-static struct clk mcbsp1_ick;
+static struct clk_core mcbsp1_ick;
static struct clk_hw_omap mcbsp1_ick_hw = {
.hw = {
@@ -2098,7 +2097,7 @@ static struct clk_hw_omap mcbsp1_ick_hw = {
DEFINE_STRUCT_CLK(mcbsp1_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk per_96m_fck;
+static struct clk_core per_96m_fck;
DEFINE_STRUCT_CLK_HW_OMAP(per_96m_fck, "per_clkdm");
DEFINE_STRUCT_CLK(per_96m_fck, cm_96m_fck_parent_names, core_l4_ick_ops);
@@ -2120,7 +2119,7 @@ DEFINE_CLK_OMAP_MUX_GATE(mcbsp2_fck, "per_clkdm", mcbsp_234_clksel,
OMAP3430_EN_MCBSP2_SHIFT, &clkhwops_wait,
mcbsp2_fck_parent_names, clkout2_src_ck_ops);
-static struct clk mcbsp2_ick;
+static struct clk_core mcbsp2_ick;
static struct clk_hw_omap mcbsp2_ick_hw = {
.hw = {
@@ -2141,7 +2140,7 @@ DEFINE_CLK_OMAP_MUX_GATE(mcbsp3_fck, "per_clkdm", mcbsp_234_clksel,
OMAP3430_EN_MCBSP3_SHIFT, &clkhwops_wait,
mcbsp2_fck_parent_names, clkout2_src_ck_ops);
-static struct clk mcbsp3_ick;
+static struct clk_core mcbsp3_ick;
static struct clk_hw_omap mcbsp3_ick_hw = {
.hw = {
@@ -2162,7 +2161,7 @@ DEFINE_CLK_OMAP_MUX_GATE(mcbsp4_fck, "per_clkdm", mcbsp_234_clksel,
OMAP3430_EN_MCBSP4_SHIFT, &clkhwops_wait,
mcbsp2_fck_parent_names, clkout2_src_ck_ops);
-static struct clk mcbsp4_ick;
+static struct clk_core mcbsp4_ick;
static struct clk_hw_omap mcbsp4_ick_hw = {
.hw = {
@@ -2183,7 +2182,7 @@ DEFINE_CLK_OMAP_MUX_GATE(mcbsp5_fck, "core_l4_clkdm", mcbsp_15_clksel,
OMAP3430_EN_MCBSP5_SHIFT, &clkhwops_wait,
mcbsp1_fck_parent_names, clkout2_src_ck_ops);
-static struct clk mcbsp5_ick;
+static struct clk_core mcbsp5_ick;
static struct clk_hw_omap mcbsp5_ick_hw = {
.hw = {
@@ -2197,7 +2196,7 @@ static struct clk_hw_omap mcbsp5_ick_hw = {
DEFINE_STRUCT_CLK(mcbsp5_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk mcspi1_fck;
+static struct clk_core mcspi1_fck;
static struct clk_hw_omap mcspi1_fck_hw = {
.hw = {
@@ -2211,7 +2210,7 @@ static struct clk_hw_omap mcspi1_fck_hw = {
DEFINE_STRUCT_CLK(mcspi1_fck, fshostusb_fck_parent_names, aes2_ick_ops);
-static struct clk mcspi1_ick;
+static struct clk_core mcspi1_ick;
static struct clk_hw_omap mcspi1_ick_hw = {
.hw = {
@@ -2225,7 +2224,7 @@ static struct clk_hw_omap mcspi1_ick_hw = {
DEFINE_STRUCT_CLK(mcspi1_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk mcspi2_fck;
+static struct clk_core mcspi2_fck;
static struct clk_hw_omap mcspi2_fck_hw = {
.hw = {
@@ -2239,7 +2238,7 @@ static struct clk_hw_omap mcspi2_fck_hw = {
DEFINE_STRUCT_CLK(mcspi2_fck, fshostusb_fck_parent_names, aes2_ick_ops);
-static struct clk mcspi2_ick;
+static struct clk_core mcspi2_ick;
static struct clk_hw_omap mcspi2_ick_hw = {
.hw = {
@@ -2253,7 +2252,7 @@ static struct clk_hw_omap mcspi2_ick_hw = {
DEFINE_STRUCT_CLK(mcspi2_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk mcspi3_fck;
+static struct clk_core mcspi3_fck;
static struct clk_hw_omap mcspi3_fck_hw = {
.hw = {
@@ -2267,7 +2266,7 @@ static struct clk_hw_omap mcspi3_fck_hw = {
DEFINE_STRUCT_CLK(mcspi3_fck, fshostusb_fck_parent_names, aes2_ick_ops);
-static struct clk mcspi3_ick;
+static struct clk_core mcspi3_ick;
static struct clk_hw_omap mcspi3_ick_hw = {
.hw = {
@@ -2281,7 +2280,7 @@ static struct clk_hw_omap mcspi3_ick_hw = {
DEFINE_STRUCT_CLK(mcspi3_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk mcspi4_fck;
+static struct clk_core mcspi4_fck;
static struct clk_hw_omap mcspi4_fck_hw = {
.hw = {
@@ -2295,7 +2294,7 @@ static struct clk_hw_omap mcspi4_fck_hw = {
DEFINE_STRUCT_CLK(mcspi4_fck, fshostusb_fck_parent_names, aes2_ick_ops);
-static struct clk mcspi4_ick;
+static struct clk_core mcspi4_ick;
static struct clk_hw_omap mcspi4_ick_hw = {
.hw = {
@@ -2309,7 +2308,7 @@ static struct clk_hw_omap mcspi4_ick_hw = {
DEFINE_STRUCT_CLK(mcspi4_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk mmchs1_fck;
+static struct clk_core mmchs1_fck;
static struct clk_hw_omap mmchs1_fck_hw = {
.hw = {
@@ -2323,7 +2322,7 @@ static struct clk_hw_omap mmchs1_fck_hw = {
DEFINE_STRUCT_CLK(mmchs1_fck, csi2_96m_fck_parent_names, aes2_ick_ops);
-static struct clk mmchs1_ick;
+static struct clk_core mmchs1_ick;
static struct clk_hw_omap mmchs1_ick_hw = {
.hw = {
@@ -2337,7 +2336,7 @@ static struct clk_hw_omap mmchs1_ick_hw = {
DEFINE_STRUCT_CLK(mmchs1_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk mmchs2_fck;
+static struct clk_core mmchs2_fck;
static struct clk_hw_omap mmchs2_fck_hw = {
.hw = {
@@ -2351,7 +2350,7 @@ static struct clk_hw_omap mmchs2_fck_hw = {
DEFINE_STRUCT_CLK(mmchs2_fck, csi2_96m_fck_parent_names, aes2_ick_ops);
-static struct clk mmchs2_ick;
+static struct clk_core mmchs2_ick;
static struct clk_hw_omap mmchs2_ick_hw = {
.hw = {
@@ -2365,7 +2364,7 @@ static struct clk_hw_omap mmchs2_ick_hw = {
DEFINE_STRUCT_CLK(mmchs2_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk mmchs3_fck;
+static struct clk_core mmchs3_fck;
static struct clk_hw_omap mmchs3_fck_hw = {
.hw = {
@@ -2379,7 +2378,7 @@ static struct clk_hw_omap mmchs3_fck_hw = {
DEFINE_STRUCT_CLK(mmchs3_fck, csi2_96m_fck_parent_names, aes2_ick_ops);
-static struct clk mmchs3_ick;
+static struct clk_core mmchs3_ick;
static struct clk_hw_omap mmchs3_ick_hw = {
.hw = {
@@ -2393,7 +2392,7 @@ static struct clk_hw_omap mmchs3_ick_hw = {
DEFINE_STRUCT_CLK(mmchs3_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk modem_fck;
+static struct clk_core modem_fck;
static struct clk_hw_omap modem_fck_hw = {
.hw = {
@@ -2407,7 +2406,7 @@ static struct clk_hw_omap modem_fck_hw = {
DEFINE_STRUCT_CLK(modem_fck, dpll3_ck_parent_names, aes2_ick_ops);
-static struct clk mspro_fck;
+static struct clk_core mspro_fck;
static struct clk_hw_omap mspro_fck_hw = {
.hw = {
@@ -2421,7 +2420,7 @@ static struct clk_hw_omap mspro_fck_hw = {
DEFINE_STRUCT_CLK(mspro_fck, csi2_96m_fck_parent_names, aes2_ick_ops);
-static struct clk mspro_ick;
+static struct clk_core mspro_ick;
static struct clk_hw_omap mspro_ick_hw = {
.hw = {
@@ -2435,13 +2434,13 @@ static struct clk_hw_omap mspro_ick_hw = {
DEFINE_STRUCT_CLK(mspro_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk omap_192m_alwon_fck;
+static struct clk_core omap_192m_alwon_fck;
DEFINE_STRUCT_CLK_HW_OMAP(omap_192m_alwon_fck, NULL);
DEFINE_STRUCT_CLK(omap_192m_alwon_fck, omap_96m_alwon_fck_parent_names,
core_ck_ops);
-static struct clk omap_32ksync_ick;
+static struct clk_core omap_32ksync_ick;
static struct clk_hw_omap omap_32ksync_ick_hw = {
.hw = {
@@ -2466,7 +2465,7 @@ static const struct clksel omap_96m_alwon_fck_clksel[] = {
{ .parent = NULL }
};
-static struct clk omap_96m_alwon_fck_3630;
+static struct clk_core omap_96m_alwon_fck_3630;
static const char *omap_96m_alwon_fck_3630_parent_names[] = {
"omap_192m_alwon_fck",
@@ -2487,7 +2486,7 @@ static struct clk_hw_omap omap_96m_alwon_fck_3630_hw = {
.clksel_mask = OMAP3630_CLKSEL_96M_MASK,
};
-static struct clk omap_96m_alwon_fck_3630 = {
+static struct clk_core omap_96m_alwon_fck_3630 = {
.name = "omap_96m_alwon_fck",
.hw = &omap_96m_alwon_fck_3630_hw.hw,
.parent_names = omap_96m_alwon_fck_3630_parent_names,
@@ -2495,7 +2494,7 @@ static struct clk omap_96m_alwon_fck_3630 = {
.ops = &omap_96m_alwon_fck_3630_ops,
};
-static struct clk omapctrl_ick;
+static struct clk_core omapctrl_ick;
static struct clk_hw_omap omapctrl_ick_hw = {
.hw = {
@@ -2520,17 +2519,17 @@ DEFINE_CLK_DIVIDER(pclkx2_fck, "emu_src_ck", &emu_src_ck, 0x0,
OMAP3430_CLKSEL_PCLKX2_SHIFT, OMAP3430_CLKSEL_PCLKX2_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk per_48m_fck;
+static struct clk_core per_48m_fck;
DEFINE_STRUCT_CLK_HW_OMAP(per_48m_fck, "per_clkdm");
DEFINE_STRUCT_CLK(per_48m_fck, core_48m_fck_parent_names, core_l4_ick_ops);
-static struct clk security_l3_ick;
+static struct clk_core security_l3_ick;
DEFINE_STRUCT_CLK_HW_OMAP(security_l3_ick, NULL);
DEFINE_STRUCT_CLK(security_l3_ick, core_l3_ick_parent_names, core_ck_ops);
-static struct clk pka_ick;
+static struct clk_core pka_ick;
static const char *pka_ick_parent_names[] = {
"security_l3_ick",
@@ -2552,7 +2551,7 @@ DEFINE_CLK_DIVIDER(rm_ick, "l4_ick", &l4_ick, 0x0,
OMAP3430_CLKSEL_RM_SHIFT, OMAP3430_CLKSEL_RM_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk rng_ick;
+static struct clk_core rng_ick;
static struct clk_hw_omap rng_ick_hw = {
.hw = {
@@ -2565,7 +2564,7 @@ static struct clk_hw_omap rng_ick_hw = {
DEFINE_STRUCT_CLK(rng_ick, aes1_ick_parent_names, aes1_ick_ops);
-static struct clk sad2d_ick;
+static struct clk_core sad2d_ick;
static struct clk_hw_omap sad2d_ick_hw = {
.hw = {
@@ -2579,7 +2578,7 @@ static struct clk_hw_omap sad2d_ick_hw = {
DEFINE_STRUCT_CLK(sad2d_ick, core_l3_ick_parent_names, aes2_ick_ops);
-static struct clk sdrc_ick;
+static struct clk_core sdrc_ick;
static struct clk_hw_omap sdrc_ick_hw = {
.hw = {
@@ -2630,7 +2629,7 @@ static const char *sgx_fck_parent_names[] = {
"core_ck", "cm_96m_fck", "omap_192m_alwon_fck", "corex2_fck",
};
-static struct clk sgx_fck;
+static struct clk_core sgx_fck;
static const struct clk_ops sgx_fck_ops = {
.init = &omap2_init_clk_clkdm,
@@ -2651,7 +2650,7 @@ DEFINE_CLK_OMAP_MUX_GATE(sgx_fck, "sgx_clkdm", sgx_clksel,
OMAP3430ES2_CM_FCLKEN_SGX_EN_SGX_SHIFT,
&clkhwops_wait, sgx_fck_parent_names, sgx_fck_ops);
-static struct clk sgx_ick;
+static struct clk_core sgx_ick;
static struct clk_hw_omap sgx_ick_hw = {
.hw = {
@@ -2665,7 +2664,7 @@ static struct clk_hw_omap sgx_ick_hw = {
DEFINE_STRUCT_CLK(sgx_ick, core_l3_ick_parent_names, aes2_ick_ops);
-static struct clk sha11_ick;
+static struct clk_core sha11_ick;
static struct clk_hw_omap sha11_ick_hw = {
.hw = {
@@ -2678,7 +2677,7 @@ static struct clk_hw_omap sha11_ick_hw = {
DEFINE_STRUCT_CLK(sha11_ick, aes1_ick_parent_names, aes1_ick_ops);
-static struct clk sha12_ick;
+static struct clk_core sha12_ick;
static struct clk_hw_omap sha12_ick_hw = {
.hw = {
@@ -2692,7 +2691,7 @@ static struct clk_hw_omap sha12_ick_hw = {
DEFINE_STRUCT_CLK(sha12_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk sr1_fck;
+static struct clk_core sr1_fck;
static struct clk_hw_omap sr1_fck_hw = {
.hw = {
@@ -2706,7 +2705,7 @@ static struct clk_hw_omap sr1_fck_hw = {
DEFINE_STRUCT_CLK(sr1_fck, dpll3_ck_parent_names, aes2_ick_ops);
-static struct clk sr2_fck;
+static struct clk_core sr2_fck;
static struct clk_hw_omap sr2_fck_hw = {
.hw = {
@@ -2720,17 +2719,17 @@ static struct clk_hw_omap sr2_fck_hw = {
DEFINE_STRUCT_CLK(sr2_fck, dpll3_ck_parent_names, aes2_ick_ops);
-static struct clk sr_l4_ick;
+static struct clk_core sr_l4_ick;
DEFINE_STRUCT_CLK_HW_OMAP(sr_l4_ick, "core_l4_clkdm");
DEFINE_STRUCT_CLK(sr_l4_ick, security_l4_ick2_parent_names, core_l4_ick_ops);
-static struct clk ssi_l4_ick;
+static struct clk_core ssi_l4_ick;
DEFINE_STRUCT_CLK_HW_OMAP(ssi_l4_ick, "core_l4_clkdm");
DEFINE_STRUCT_CLK(ssi_l4_ick, security_l4_ick2_parent_names, core_l4_ick_ops);
-static struct clk ssi_ick_3430es1;
+static struct clk_core ssi_ick_3430es1;
static const char *ssi_ick_3430es1_parent_names[] = {
"ssi_l4_ick",
@@ -2748,7 +2747,7 @@ static struct clk_hw_omap ssi_ick_3430es1_hw = {
DEFINE_STRUCT_CLK(ssi_ick_3430es1, ssi_ick_3430es1_parent_names, aes2_ick_ops);
-static struct clk ssi_ick_3430es2;
+static struct clk_core ssi_ick_3430es2;
static struct clk_hw_omap ssi_ick_3430es2_hw = {
.hw = {
@@ -2813,7 +2812,7 @@ DEFINE_CLK_FIXED_FACTOR(ssi_sst_fck_3430es1, "ssi_ssr_fck_3430es1",
DEFINE_CLK_FIXED_FACTOR(ssi_sst_fck_3430es2, "ssi_ssr_fck_3430es2",
&ssi_ssr_fck_3430es2, 0x0, 1, 2);
-static struct clk sys_clkout1;
+static struct clk_core sys_clkout1;
static const char *sys_clkout1_parent_names[] = {
"osc_sys_ck",
@@ -2843,7 +2842,7 @@ DEFINE_CLK_DIVIDER(traceclk_fck, "traceclk_src_fck", &traceclk_src_fck, 0x0,
OMAP3430_CLKSEL_TRACECLK_SHIFT,
OMAP3430_CLKSEL_TRACECLK_WIDTH, CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk ts_fck;
+static struct clk_core ts_fck;
static struct clk_hw_omap ts_fck_hw = {
.hw = {
@@ -2856,7 +2855,7 @@ static struct clk_hw_omap ts_fck_hw = {
DEFINE_STRUCT_CLK(ts_fck, wkup_32k_fck_parent_names, aes2_ick_ops);
-static struct clk uart1_fck;
+static struct clk_core uart1_fck;
static struct clk_hw_omap uart1_fck_hw = {
.hw = {
@@ -2870,7 +2869,7 @@ static struct clk_hw_omap uart1_fck_hw = {
DEFINE_STRUCT_CLK(uart1_fck, fshostusb_fck_parent_names, aes2_ick_ops);
-static struct clk uart1_ick;
+static struct clk_core uart1_ick;
static struct clk_hw_omap uart1_ick_hw = {
.hw = {
@@ -2884,7 +2883,7 @@ static struct clk_hw_omap uart1_ick_hw = {
DEFINE_STRUCT_CLK(uart1_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk uart2_fck;
+static struct clk_core uart2_fck;
static struct clk_hw_omap uart2_fck_hw = {
.hw = {
@@ -2898,7 +2897,7 @@ static struct clk_hw_omap uart2_fck_hw = {
DEFINE_STRUCT_CLK(uart2_fck, fshostusb_fck_parent_names, aes2_ick_ops);
-static struct clk uart2_ick;
+static struct clk_core uart2_ick;
static struct clk_hw_omap uart2_ick_hw = {
.hw = {
@@ -2912,7 +2911,7 @@ static struct clk_hw_omap uart2_ick_hw = {
DEFINE_STRUCT_CLK(uart2_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk uart3_fck;
+static struct clk_core uart3_fck;
static const char *uart3_fck_parent_names[] = {
"per_48m_fck",
@@ -2930,7 +2929,7 @@ static struct clk_hw_omap uart3_fck_hw = {
DEFINE_STRUCT_CLK(uart3_fck, uart3_fck_parent_names, aes2_ick_ops);
-static struct clk uart3_ick;
+static struct clk_core uart3_ick;
static struct clk_hw_omap uart3_ick_hw = {
.hw = {
@@ -2944,7 +2943,7 @@ static struct clk_hw_omap uart3_ick_hw = {
DEFINE_STRUCT_CLK(uart3_ick, gpio2_ick_parent_names, aes2_ick_ops);
-static struct clk uart4_fck;
+static struct clk_core uart4_fck;
static struct clk_hw_omap uart4_fck_hw = {
.hw = {
@@ -2958,7 +2957,7 @@ static struct clk_hw_omap uart4_fck_hw = {
DEFINE_STRUCT_CLK(uart4_fck, uart3_fck_parent_names, aes2_ick_ops);
-static struct clk uart4_fck_am35xx;
+static struct clk_core uart4_fck_am35xx;
static struct clk_hw_omap uart4_fck_am35xx_hw = {
.hw = {
@@ -2972,7 +2971,7 @@ static struct clk_hw_omap uart4_fck_am35xx_hw = {
DEFINE_STRUCT_CLK(uart4_fck_am35xx, fshostusb_fck_parent_names, aes2_ick_ops);
-static struct clk uart4_ick;
+static struct clk_core uart4_ick;
static struct clk_hw_omap uart4_ick_hw = {
.hw = {
@@ -2986,7 +2985,7 @@ static struct clk_hw_omap uart4_ick_hw = {
DEFINE_STRUCT_CLK(uart4_ick, gpio2_ick_parent_names, aes2_ick_ops);
-static struct clk uart4_ick_am35xx;
+static struct clk_core uart4_ick_am35xx;
static struct clk_hw_omap uart4_ick_am35xx_hw = {
.hw = {
@@ -3023,7 +3022,7 @@ DEFINE_CLK_OMAP_MUX_GATE(usb_l4_ick, "core_l4_clkdm", usb_l4_clksel,
&clkhwops_iclk_wait, usb_l4_ick_parent_names,
ssi_ssr_fck_3430es1_ops);
-static struct clk usbhost_120m_fck;
+static struct clk_core usbhost_120m_fck;
static const char *usbhost_120m_fck_parent_names[] = {
"dpll5_m2_ck",
@@ -3041,7 +3040,7 @@ static struct clk_hw_omap usbhost_120m_fck_hw = {
DEFINE_STRUCT_CLK(usbhost_120m_fck, usbhost_120m_fck_parent_names,
aes2_ick_ops);
-static struct clk usbhost_48m_fck;
+static struct clk_core usbhost_48m_fck;
static struct clk_hw_omap usbhost_48m_fck_hw = {
.hw = {
@@ -3055,7 +3054,7 @@ static struct clk_hw_omap usbhost_48m_fck_hw = {
DEFINE_STRUCT_CLK(usbhost_48m_fck, core_48m_fck_parent_names, aes2_ick_ops);
-static struct clk usbhost_ick;
+static struct clk_core usbhost_ick;
static struct clk_hw_omap usbhost_ick_hw = {
.hw = {
@@ -3069,7 +3068,7 @@ static struct clk_hw_omap usbhost_ick_hw = {
DEFINE_STRUCT_CLK(usbhost_ick, security_l4_ick2_parent_names, aes2_ick_ops);
-static struct clk usbtll_fck;
+static struct clk_core usbtll_fck;
static struct clk_hw_omap usbtll_fck_hw = {
.hw = {
@@ -3083,7 +3082,7 @@ static struct clk_hw_omap usbtll_fck_hw = {
DEFINE_STRUCT_CLK(usbtll_fck, usbhost_120m_fck_parent_names, aes2_ick_ops);
-static struct clk usbtll_ick;
+static struct clk_core usbtll_ick;
static struct clk_hw_omap usbtll_ick_hw = {
.hw = {
@@ -3124,7 +3123,7 @@ static const char *usim_fck_parent_names[] = {
"omap_96m_fck", "dpll5_m2_ck", "sys_ck",
};
-static struct clk usim_fck;
+static struct clk_core usim_fck;
static const struct clk_ops usim_fck_ops = {
.enable = &omap2_dflt_clk_enable,
@@ -3142,7 +3141,7 @@ DEFINE_CLK_OMAP_MUX_GATE(usim_fck, NULL, usim_clksel,
OMAP3430ES2_EN_USIMOCP_SHIFT, &clkhwops_wait,
usim_fck_parent_names, usim_fck_ops);
-static struct clk usim_ick;
+static struct clk_core usim_ick;
static struct clk_hw_omap usim_ick_hw = {
.hw = {
@@ -3156,7 +3155,7 @@ static struct clk_hw_omap usim_ick_hw = {
DEFINE_STRUCT_CLK(usim_ick, gpio1_ick_parent_names, aes2_ick_ops);
-static struct clk vpfe_fck;
+static struct clk_core vpfe_fck;
static const char *vpfe_fck_parent_names[] = {
"pclk_ck",
@@ -3172,7 +3171,7 @@ static struct clk_hw_omap vpfe_fck_hw = {
DEFINE_STRUCT_CLK(vpfe_fck, vpfe_fck_parent_names, aes1_ick_ops);
-static struct clk vpfe_ick;
+static struct clk_core vpfe_ick;
static struct clk_hw_omap vpfe_ick_hw = {
.hw = {
@@ -3186,12 +3185,12 @@ static struct clk_hw_omap vpfe_ick_hw = {
DEFINE_STRUCT_CLK(vpfe_ick, emac_ick_parent_names, aes2_ick_ops);
-static struct clk wdt1_fck;
+static struct clk_core wdt1_fck;
DEFINE_STRUCT_CLK_HW_OMAP(wdt1_fck, "wkup_clkdm");
DEFINE_STRUCT_CLK(wdt1_fck, gpt12_fck_parent_names, core_l4_ick_ops);
-static struct clk wdt1_ick;
+static struct clk_core wdt1_ick;
static struct clk_hw_omap wdt1_ick_hw = {
.hw = {
@@ -3205,7 +3204,7 @@ static struct clk_hw_omap wdt1_ick_hw = {
DEFINE_STRUCT_CLK(wdt1_ick, gpio1_ick_parent_names, aes2_ick_ops);
-static struct clk wdt2_fck;
+static struct clk_core wdt2_fck;
static struct clk_hw_omap wdt2_fck_hw = {
.hw = {
@@ -3219,7 +3218,7 @@ static struct clk_hw_omap wdt2_fck_hw = {
DEFINE_STRUCT_CLK(wdt2_fck, gpio1_dbck_parent_names, aes2_ick_ops);
-static struct clk wdt2_ick;
+static struct clk_core wdt2_ick;
static struct clk_hw_omap wdt2_ick_hw = {
.hw = {
@@ -3233,7 +3232,7 @@ static struct clk_hw_omap wdt2_ick_hw = {
DEFINE_STRUCT_CLK(wdt2_ick, gpio1_ick_parent_names, aes2_ick_ops);
-static struct clk wdt3_fck;
+static struct clk_core wdt3_fck;
static struct clk_hw_omap wdt3_fck_hw = {
.hw = {
@@ -3247,7 +3246,7 @@ static struct clk_hw_omap wdt3_fck_hw = {
DEFINE_STRUCT_CLK(wdt3_fck, gpio2_dbck_parent_names, aes2_ick_ops);
-static struct clk wdt3_ick;
+static struct clk_core wdt3_ick;
static struct clk_hw_omap wdt3_ick_hw = {
.hw = {
@@ -3661,10 +3660,10 @@ int __init omap3xxx_clk_init(void)
ARRAY_SIZE(enable_init_clks));
pr_info("Clocking rate (Crystal/Core/MPU): %ld.%01ld/%ld/%ld MHz\n",
- (clk_get_rate(&osc_sys_ck) / 1000000),
- (clk_get_rate(&osc_sys_ck) / 100000) % 10,
- (clk_get_rate(&core_ck) / 1000000),
- (clk_get_rate(&arm_fck) / 1000000));
+ (clk_provider_get_rate(&osc_sys_ck) / 1000000),
+ (clk_provider_get_rate(&osc_sys_ck) / 100000) % 10,
+ (clk_provider_get_rate(&core_ck) / 1000000),
+ (clk_provider_get_rate(&arm_fck) / 1000000));
/*
* Lock DPLL5 -- here only until other device init code can
@@ -3674,8 +3673,8 @@ int __init omap3xxx_clk_init(void)
omap3_clk_lock_dpll5();
/* Avoid sleeping during omap3_core_dpll_m2_set_rate() */
- sdrc_ick_p = clk_get(NULL, "sdrc_ick");
- arm_fck_p = clk_get(NULL, "arm_fck");
+ sdrc_ick_p = clk_provider_get(NULL, "sdrc_ick");
+ arm_fck_p = clk_provider_get(NULL, "arm_fck");
return 0;
}
diff --git a/arch/arm/mach-omap2/clkt2xxx_dpll.c b/arch/arm/mach-omap2/clkt2xxx_dpll.c
index 82572e2..d7bbbb6 100644
--- a/arch/arm/mach-omap2/clkt2xxx_dpll.c
+++ b/arch/arm/mach-omap2/clkt2xxx_dpll.c
@@ -11,7 +11,6 @@
#include <linux/kernel.h>
#include <linux/errno.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include "clock.h"
@@ -22,7 +21,7 @@
/**
* _allow_idle - enable DPLL autoidle bits
- * @clk: struct clk * of the DPLL to operate on
+ * @clk: struct clk_core * of the DPLL to operate on
*
* Enable DPLL automatic idle control. The DPLL will enter low-power
* stop when its downstream clocks are gated. No return value.
@@ -39,7 +38,7 @@ static void _allow_idle(struct clk_hw_omap *clk)
/**
* _deny_idle - prevent DPLL from automatically idling
- * @clk: struct clk * of the DPLL to operate on
+ * @clk: struct clk_core * of the DPLL to operate on
*
* Disable DPLL automatic idle control. No return value.
*/
diff --git a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
index 59cf310..9a60ce2 100644
--- a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
+++ b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
@@ -22,7 +22,6 @@
#include <linux/kernel.h>
#include <linux/errno.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include "clock.h"
@@ -48,7 +47,7 @@ static struct clk_hw_omap *dpll_core_ck;
* Returns the CORE_CLK rate. CORE_CLK can have one of three rate
* sources on OMAP2xxx: the DPLL CLKOUT rate, DPLL CLKOUTX2, or 32KHz
* (the latter is unusual). This currently should be called with
- * struct clk *dpll_ck, which is a composite clock of dpll_ck and
+ * struct clk_core *dpll_ck, which is a composite clock of dpll_ck and
* core_ck.
*/
unsigned long omap2xxx_clk_get_core_rate(void)
@@ -179,7 +178,7 @@ int omap2_reprogram_dpllcore(struct clk_hw *hw, unsigned long rate,
/**
* omap2xxx_clkt_dpllcore_init - clk init function for dpll_ck
- * @clk: struct clk *dpll_ck
+ * @clk: struct clk_core *dpll_ck
*
* Store a local copy of @clk in dpll_core_ck so other code can query
* the core rate without having to clk_get(), which can sleep. Must
diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
index 85e0b0c0..d621a4c 100644
--- a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
+++ b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
@@ -28,7 +28,6 @@
#include <linux/kernel.h>
#include <linux/errno.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include <linux/cpufreq.h>
#include <linux/slab.h>
@@ -198,14 +197,14 @@ void omap2xxx_clkt_vps_check_bootloader_rates(void)
*/
void omap2xxx_clkt_vps_late_init(void)
{
- struct clk *c;
+ struct clk_core *c;
- c = clk_get(NULL, "sys_ck");
+ c = clk_provider_get(NULL, "sys_ck");
if (IS_ERR(c)) {
WARN(1, "could not locate sys_ck\n");
} else {
- sys_ck_rate = clk_get_rate(c);
- clk_put(c);
+ sys_ck_rate = clk_provider_get_rate(c);
+ __clk_put(c);
}
}
@@ -230,7 +229,7 @@ void omap2xxx_clkt_vps_init(void)
{
struct clk_init_data init = { NULL };
struct clk_hw_omap *hw = NULL;
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name = "mpu_ck";
struct clk_lookup *lookup = NULL;
diff --git a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
index eb69acf..16ff4ed 100644
--- a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
+++ b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
@@ -18,7 +18,6 @@
#include <linux/kernel.h>
#include <linux/errno.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include "clock.h"
@@ -38,7 +37,7 @@
/**
* omap3_core_dpll_m2_set_rate - set CORE DPLL M2 divider
- * @clk: struct clk * of DPLL to set
+ * @clk: struct clk_core * of DPLL to set
* @rate: rounded target rate
*
* Program the DPLL M2 divider with the rounded target rate. Returns
diff --git a/arch/arm/mach-omap2/clkt_clksel.c b/arch/arm/mach-omap2/clkt_clksel.c
index 7ee2610..b4796b3 100644
--- a/arch/arm/mach-omap2/clkt_clksel.c
+++ b/arch/arm/mach-omap2/clkt_clksel.c
@@ -51,15 +51,15 @@
/**
* _get_clksel_by_parent() - return clksel struct for a given clk & parent
- * @clk: OMAP struct clk ptr to inspect
- * @src_clk: OMAP struct clk ptr of the parent clk to search for
+ * @clk: OMAP struct clk_core ptr to inspect
+ * @src_clk: OMAP struct clk_core ptr of the parent clk to search for
*
* Scan the struct clksel array associated with the clock to find
* the element associated with the supplied parent clock address.
* Returns a pointer to the struct clksel on success or NULL on error.
*/
static const struct clksel *_get_clksel_by_parent(struct clk_hw_omap *clk,
- struct clk *src_clk)
+ struct clk_core *src_clk)
{
const struct clksel *clks;
@@ -82,7 +82,7 @@ static const struct clksel *_get_clksel_by_parent(struct clk_hw_omap *clk,
/**
* _write_clksel_reg() - program a clock's clksel register in hardware
- * @clk: struct clk * to program
+ * @clk: struct clk_core * to program
* @v: clksel bitfield value to program (with LSB at bit 0)
*
* Shift the clksel register bitfield value @v to its appropriate
@@ -107,10 +107,10 @@ static void _write_clksel_reg(struct clk_hw_omap *clk, u32 field_val)
/**
* _clksel_to_divisor() - turn clksel field value into integer divider
- * @clk: OMAP struct clk to use
+ * @clk: OMAP struct clk_core to use
* @field_val: register field value to find
*
- * Given a struct clk of a rate-selectable clksel clock, and a register field
+ * Given a struct clk_core of a rate-selectable clksel clock, and a register field
* value to search for, find the corresponding clock divisor. The register
* field value should be pre-masked and shifted down so the LSB is at bit 0
* before calling. Returns 0 on error or returns the actual integer divisor
@@ -120,7 +120,7 @@ static u32 _clksel_to_divisor(struct clk_hw_omap *clk, u32 field_val)
{
const struct clksel *clks;
const struct clksel_rate *clkr;
- struct clk *parent;
+ struct clk_core *parent;
parent = __clk_get_parent(clk->hw.clk);
@@ -149,10 +149,10 @@ static u32 _clksel_to_divisor(struct clk_hw_omap *clk, u32 field_val)
/**
* _divisor_to_clksel() - turn clksel integer divisor into a field value
- * @clk: OMAP struct clk to use
+ * @clk: OMAP struct clk_core to use
* @div: integer divisor to search for
*
- * Given a struct clk of a rate-selectable clksel clock, and a clock
+ * Given a struct clk_core of a rate-selectable clksel clock, and a clock
* divisor, find the corresponding register field value. Returns the
* register field value _before_ left-shifting (i.e., LSB is at bit
* 0); or returns 0xFFFFFFFF (~0) upon error.
@@ -161,7 +161,7 @@ static u32 _divisor_to_clksel(struct clk_hw_omap *clk, u32 div)
{
const struct clksel *clks;
const struct clksel_rate *clkr;
- struct clk *parent;
+ struct clk_core *parent;
/* should never happen */
WARN_ON(div == 0);
@@ -191,7 +191,7 @@ static u32 _divisor_to_clksel(struct clk_hw_omap *clk, u32 div)
/**
* _read_divisor() - get current divisor applied to parent clock (from hdwr)
- * @clk: OMAP struct clk to use.
+ * @clk: OMAP struct clk_core to use.
*
* Read the current divisor register value for @clk that is programmed
* into the hardware, convert it into the actual divisor value, and
@@ -215,7 +215,7 @@ static u32 _read_divisor(struct clk_hw_omap *clk)
/**
* omap2_clksel_round_rate_div() - find divisor for the given clock and rate
- * @clk: OMAP struct clk to use
+ * @clk: OMAP struct clk_core to use
* @target_rate: desired clock rate
* @new_div: ptr to where we should store the divisor
*
@@ -233,7 +233,7 @@ u32 omap2_clksel_round_rate_div(struct clk_hw_omap *clk,
const struct clksel *clks;
const struct clksel_rate *clkr;
u32 last_div = 0;
- struct clk *parent;
+ struct clk_core *parent;
unsigned long parent_rate;
const char *clk_name;
@@ -286,7 +286,7 @@ u32 omap2_clksel_round_rate_div(struct clk_hw_omap *clk,
/*
* Clocktype interface functions to the OMAP clock code
- * (i.e., those used in struct clk field function pointers, etc.)
+ * (i.e., those used in struct clk_core field function pointers, etc.)
*/
/**
@@ -309,7 +309,7 @@ u8 omap2_clksel_find_parent_index(struct clk_hw *hw)
const struct clksel *clks;
const struct clksel_rate *clkr;
u32 r, found = 0;
- struct clk *parent;
+ struct clk_core *parent;
const char *clk_name;
int ret = 0, f = 0;
@@ -345,11 +345,11 @@ u8 omap2_clksel_find_parent_index(struct clk_hw *hw)
/**
- * omap2_clksel_recalc() - function ptr to pass via struct clk .recalc field
- * @clk: struct clk *
+ * omap2_clksel_recalc() - function ptr to pass via struct clk_core .recalc field
+ * @clk: struct clk_core *
*
* This function is intended to be called only by the clock framework.
- * Each clksel clock should have its struct clk .recalc field set to this
+ * Each clksel clock should have its struct clk_core .recalc field set to this
* function. Returns the clock's current rate, based on its parent's rate
* and its current divisor setting in the hardware.
*/
@@ -376,7 +376,7 @@ unsigned long omap2_clksel_recalc(struct clk_hw *hw, unsigned long parent_rate)
/**
* omap2_clksel_round_rate() - find rounded rate for the given clock and rate
- * @clk: OMAP struct clk to use
+ * @clk: OMAP struct clk_core to use
* @target_rate: desired clock rate
*
* This function is intended to be called only by the clock framework.
@@ -396,7 +396,7 @@ long omap2_clksel_round_rate(struct clk_hw *hw, unsigned long target_rate,
/**
* omap2_clksel_set_rate() - program clock rate in hardware
- * @clk: struct clk * to program rate
+ * @clk: struct clk_core * to program rate
* @rate: target rate to program
*
* This function is intended to be called only by the clock framework.
@@ -435,7 +435,7 @@ int omap2_clksel_set_rate(struct clk_hw *hw, unsigned long rate,
}
/*
- * Clksel parent setting function - not passed in struct clk function
+ * Clksel parent setting function - not passed in struct clk_core function
* pointer - instead, the OMAP clock code currently assumes that any
* parent-setting clock is a clksel clock, and calls
* omap2_clksel_set_parent() by default
@@ -443,8 +443,8 @@ int omap2_clksel_set_rate(struct clk_hw *hw, unsigned long rate,
/**
* omap2_clksel_set_parent() - change a clock's parent clock
- * @clk: struct clk * of the child clock
- * @new_parent: struct clk * of the new parent clock
+ * @clk: struct clk_core * of the child clock
+ * @new_parent: struct clk_core * of the new parent clock
*
* This function is intended to be called only by the clock framework.
* Change the parent clock of clock @clk to @new_parent. This is
diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c
index f251a14..36f263d 100644
--- a/arch/arm/mach-omap2/clkt_dpll.c
+++ b/arch/arm/mach-omap2/clkt_dpll.c
@@ -56,7 +56,7 @@
/*
* _dpll_test_fint - test whether an Fint value is valid for the DPLL
- * @clk: DPLL struct clk to test
+ * @clk: DPLL struct clk_core to test
* @n: divider value (N) to test
*
* Tests whether a particular divider @n will result in a valid DPLL
@@ -215,7 +215,7 @@ u8 omap2_init_dpll_parent(struct clk_hw *hw)
v &= dd->enable_mask;
v >>= __ffs(dd->enable_mask);
- /* Reparent the struct clk in case the dpll is in bypass */
+ /* Reparent the struct clk_core in case the dpll is in bypass */
if (_omap2_dpll_is_in_bypass(v))
return 1;
@@ -224,7 +224,7 @@ u8 omap2_init_dpll_parent(struct clk_hw *hw)
/**
* omap2_get_dpll_rate - returns the current DPLL CLKOUT rate
- * @clk: struct clk * of a DPLL
+ * @clk: struct clk_core * of a DPLL
*
* DPLLs can be locked or bypassed - basically, enabled or disabled.
* When locked, the DPLL output depends on the M and N values. When
@@ -270,7 +270,7 @@ unsigned long omap2_get_dpll_rate(struct clk_hw_omap *clk)
/**
* omap2_dpll_round_rate - round a target rate for an OMAP DPLL
- * @clk: struct clk * for a DPLL
+ * @clk: struct clk_core * for a DPLL
* @target_rate: desired DPLL clock rate
*
* Given a DPLL and a desired target rate, round the target rate to a
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 500530d..ab341e4 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -142,7 +142,7 @@ static int _wait_idlest_generic(struct clk_hw_omap *clk, void __iomem *reg,
/**
* _omap2_module_wait_ready - wait for an OMAP module to leave IDLE
- * @clk: struct clk * belonging to the module
+ * @clk: struct clk_core * belonging to the module
*
* If the necessary clocks for the OMAP hardware IP block that
* corresponds to clock @clk are enabled, then wait for the module to
@@ -181,7 +181,7 @@ static void _omap2_module_wait_ready(struct clk_hw_omap *clk)
* omap2_init_clk_clkdm - look up a clockdomain name, store pointer in clk
* @clk: OMAP clock struct ptr to use
*
- * Convert a clockdomain name stored in a struct clk 'clk' into a
+ * Convert a clockdomain name stored in a struct clk_core 'clk' into a
* clockdomain pointer, and save it into the struct clk. Intended to be
* called during clk_register(). No return value.
*/
@@ -222,7 +222,7 @@ void __init omap2_clk_disable_clkdm_control(void)
/**
* omap2_clk_dflt_find_companion - find companion clock to @clk
- * @clk: struct clk * to find the companion clock of
+ * @clk: struct clk_core * to find the companion clock of
* @other_reg: void __iomem ** to return the companion clock CM_*CLKEN va in
* @other_bit: u8 ** to return the companion clock bit shift in
*
@@ -258,7 +258,7 @@ void omap2_clk_dflt_find_companion(struct clk_hw_omap *clk,
/**
* omap2_clk_dflt_find_idlest - find CM_IDLEST reg va, bit shift for @clk
- * @clk: struct clk * to find IDLEST info for
+ * @clk: struct clk_core * to find IDLEST info for
* @idlest_reg: void __iomem ** to return the CM_IDLEST va in
* @idlest_bit: u8 * to return the CM_IDLEST bit shift in
* @idlest_val: u8 * to return the idle status indicator
@@ -502,14 +502,14 @@ __setup("mpurate=", omap_clk_setup);
/**
* omap2_init_clk_hw_omap_clocks - initialize an OMAP clock
- * @clk: struct clk * to initialize
+ * @clk: struct clk_core * to initialize
*
* Add an OMAP clock @clk to the internal list of OMAP clocks. Used
* temporarily for autoidle handling, until this support can be
* integrated into the common clock framework code in some way. No
* return value.
*/
-void omap2_init_clk_hw_omap_clocks(struct clk *clk)
+void omap2_init_clk_hw_omap_clocks(struct clk_core *clk)
{
struct clk_hw_omap *c;
@@ -566,11 +566,11 @@ int omap2_clk_disable_autoidle_all(void)
/**
* omap2_clk_deny_idle - disable autoidle on an OMAP clock
- * @clk: struct clk * to disable autoidle for
+ * @clk: struct clk_core * to disable autoidle for
*
* Disable autoidle on an OMAP clock.
*/
-int omap2_clk_deny_idle(struct clk *clk)
+int omap2_clk_deny_idle(struct clk_core *clk)
{
struct clk_hw_omap *c;
@@ -585,11 +585,11 @@ int omap2_clk_deny_idle(struct clk *clk)
/**
* omap2_clk_allow_idle - enable autoidle on an OMAP clock
- * @clk: struct clk * to enable autoidle for
+ * @clk: struct clk_core * to enable autoidle for
*
* Enable autoidle on an OMAP clock.
*/
-int omap2_clk_allow_idle(struct clk *clk)
+int omap2_clk_allow_idle(struct clk_core *clk)
{
struct clk_hw_omap *c;
@@ -614,12 +614,12 @@ int omap2_clk_allow_idle(struct clk *clk)
*/
void omap2_clk_enable_init_clocks(const char **clk_names, u8 num_clocks)
{
- struct clk *init_clk;
+ struct clk_core *init_clk;
int i;
for (i = 0; i < num_clocks; i++) {
- init_clk = clk_get(NULL, clk_names[i]);
- clk_prepare_enable(init_clk);
+ init_clk = clk_provider_get(NULL, clk_names[i]);
+ clk_provider_prepare_enable(init_clk);
}
}
@@ -655,31 +655,31 @@ void __init omap_clocks_register(struct omap_clk oclks[], int cnt)
* the OPP layer. XXX This is intended to be handled by the OPP layer
* code in the near future and should be removed from the clock code.
* Returns -EINVAL if 'mpurate' is zero or if clk_set_rate() rejects
- * the rate, -ENOENT if the struct clk referred to by @mpurate_ck_name
+ * the rate, -ENOENT if the struct clk_core referred to by @mpurate_ck_name
* cannot be found, or 0 upon success.
*/
int __init omap2_clk_switch_mpurate_at_boot(const char *mpurate_ck_name)
{
- struct clk *mpurate_ck;
+ struct clk_core *mpurate_ck;
int r;
if (!mpurate)
return -EINVAL;
- mpurate_ck = clk_get(NULL, mpurate_ck_name);
+ mpurate_ck = clk_provider_get(NULL, mpurate_ck_name);
if (WARN(IS_ERR(mpurate_ck), "Failed to get %s.\n", mpurate_ck_name))
return -ENOENT;
- r = clk_set_rate(mpurate_ck, mpurate);
+ r = clk_provider_set_rate(mpurate_ck, mpurate);
if (r < 0) {
WARN(1, "clock: %s: unable to set MPU rate to %d: %d\n",
mpurate_ck_name, mpurate, r);
- clk_put(mpurate_ck);
+ __clk_put(mpurate_ck);
return -EINVAL;
}
calibrate_delay();
- clk_put(mpurate_ck);
+ __clk_put(mpurate_ck);
return 0;
}
@@ -700,27 +700,27 @@ void __init omap2_clk_print_new_rates(const char *hfclkin_ck_name,
const char *core_ck_name,
const char *mpu_ck_name)
{
- struct clk *hfclkin_ck, *core_ck, *mpu_ck;
+ struct clk_core *hfclkin_ck, *core_ck, *mpu_ck;
unsigned long hfclkin_rate;
- mpu_ck = clk_get(NULL, mpu_ck_name);
+ mpu_ck = clk_provider_get(NULL, mpu_ck_name);
if (WARN(IS_ERR(mpu_ck), "clock: failed to get %s.\n", mpu_ck_name))
return;
- core_ck = clk_get(NULL, core_ck_name);
+ core_ck = clk_provider_get(NULL, core_ck_name);
if (WARN(IS_ERR(core_ck), "clock: failed to get %s.\n", core_ck_name))
return;
- hfclkin_ck = clk_get(NULL, hfclkin_ck_name);
+ hfclkin_ck = clk_provider_get(NULL, hfclkin_ck_name);
if (WARN(IS_ERR(hfclkin_ck), "Failed to get %s.\n", hfclkin_ck_name))
return;
- hfclkin_rate = clk_get_rate(hfclkin_ck);
+ hfclkin_rate = clk_provider_get_rate(hfclkin_ck);
pr_info("Switched to new clocking rate (Crystal/Core/MPU): %ld.%01ld/%ld/%ld MHz\n",
(hfclkin_rate / 1000000), ((hfclkin_rate / 100000) % 10),
- (clk_get_rate(core_ck) / 1000000),
- (clk_get_rate(mpu_ck) / 1000000));
+ (clk_provider_get_rate(core_ck) / 1000000),
+ (clk_provider_get_rate(mpu_ck) / 1000000));
}
/**
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index 4592a27..7068684 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -40,7 +40,7 @@ struct omap_clk {
struct clockdomain;
#define DEFINE_STRUCT_CLK(_name, _parent_array_name, _clkops_name) \
- static struct clk _name = { \
+ static struct clk_core _name = { \
.name = #_name, \
.hw = &_name##_hw.hw, \
.parent_names = _parent_array_name, \
@@ -50,7 +50,7 @@ struct clockdomain;
#define DEFINE_STRUCT_CLK_FLAGS(_name, _parent_array_name, \
_clkops_name, _flags) \
- static struct clk _name = { \
+ static struct clk_core _name = { \
.name = #_name, \
.hw = &_name##_hw.hw, \
.parent_names = _parent_array_name, \
@@ -70,7 +70,7 @@ struct clockdomain;
#define DEFINE_CLK_OMAP_MUX(_name, _clkdm_name, _clksel, \
_clksel_reg, _clksel_mask, \
_parent_names, _ops) \
- static struct clk _name; \
+ static struct clk_core _name; \
static struct clk_hw_omap _name##_hw = { \
.hw = { \
.clk = &_name, \
@@ -86,7 +86,7 @@ struct clockdomain;
_clksel_reg, _clksel_mask, \
_enable_reg, _enable_bit, \
_hwops, _parent_names, _ops) \
- static struct clk _name; \
+ static struct clk_core _name; \
static struct clk_hw_omap _name##_hw = { \
.hw = { \
.clk = &_name, \
@@ -142,14 +142,14 @@ struct clksel_rate {
/**
* struct clksel - available parent clocks, and a pointer to their divisors
- * @parent: struct clk * to a possible parent clock
+ * @parent: struct clk_core * to a possible parent clock
* @rates: available divisors for this parent clock
*
* A struct clksel is always associated with one or more struct clks
* and one or more struct clksel_rates.
*/
struct clksel {
- struct clk *parent;
+ struct clk_core *parent;
const struct clksel_rate *rates;
};
@@ -208,8 +208,8 @@ void omap2_clk_dflt_find_idlest(struct clk_hw_omap *clk,
void __iomem **idlest_reg,
u8 *idlest_bit, u8 *idlest_val);
int omap2_clk_enable_autoidle_all(void);
-int omap2_clk_allow_idle(struct clk *clk);
-int omap2_clk_deny_idle(struct clk *clk);
+int omap2_clk_allow_idle(struct clk_core *clk);
+int omap2_clk_deny_idle(struct clk_core *clk);
int omap2_clk_switch_mpurate_at_boot(const char *mpurate_ck_name);
void omap2_clk_print_new_rates(const char *hfclkin_ck_name,
const char *core_ck_name,
@@ -247,7 +247,7 @@ extern const struct clksel_rate gpt_32k_rates[];
extern const struct clksel_rate gpt_sys_rates[];
extern const struct clksel_rate gfx_l3_rates[];
extern const struct clksel_rate dsp_ick_rates[];
-extern struct clk dummy_ck;
+extern struct clk_core dummy_ck;
extern const struct clk_hw_omap_ops clkhwops_iclk_wait;
extern const struct clk_hw_omap_ops clkhwops_wait;
diff --git a/arch/arm/mach-omap2/clock3xxx.c b/arch/arm/mach-omap2/clock3xxx.c
index 0b02b41..8d1b843 100644
--- a/arch/arm/mach-omap2/clock3xxx.c
+++ b/arch/arm/mach-omap2/clock3xxx.c
@@ -18,7 +18,6 @@
#include <linux/kernel.h>
#include <linux/errno.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include "soc.h"
@@ -37,7 +36,7 @@
#define DPLL5_FREQ_FOR_USBHOST 120000000
/* needed by omap3_core_dpll_m2_set_rate() */
-struct clk *sdrc_ick_p, *arm_fck_p;
+struct clk_core *sdrc_ick_p, *arm_fck_p;
int omap3_dpll4_set_rate(struct clk_hw *hw, unsigned long rate,
unsigned long parent_rate)
{
@@ -56,20 +55,20 @@ int omap3_dpll4_set_rate(struct clk_hw *hw, unsigned long rate,
void __init omap3_clk_lock_dpll5(void)
{
- struct clk *dpll5_clk;
- struct clk *dpll5_m2_clk;
+ struct clk_core *dpll5_clk;
+ struct clk_core *dpll5_m2_clk;
- dpll5_clk = clk_get(NULL, "dpll5_ck");
- clk_set_rate(dpll5_clk, DPLL5_FREQ_FOR_USBHOST);
- clk_prepare_enable(dpll5_clk);
+ dpll5_clk = clk_provider_get(NULL, "dpll5_ck");
+ clk_provider_set_rate(dpll5_clk, DPLL5_FREQ_FOR_USBHOST);
+ clk_provider_prepare_enable(dpll5_clk);
/* Program dpll5_m2_clk divider for no division */
- dpll5_m2_clk = clk_get(NULL, "dpll5_m2_ck");
- clk_prepare_enable(dpll5_m2_clk);
- clk_set_rate(dpll5_m2_clk, DPLL5_FREQ_FOR_USBHOST);
+ dpll5_m2_clk = clk_provider_get(NULL, "dpll5_m2_ck");
+ clk_provider_prepare_enable(dpll5_m2_clk);
+ clk_provider_set_rate(dpll5_m2_clk, DPLL5_FREQ_FOR_USBHOST);
- clk_disable_unprepare(dpll5_m2_clk);
- clk_disable_unprepare(dpll5_clk);
+ clk_provider_disable_unprepare(dpll5_m2_clk);
+ clk_provider_disable_unprepare(dpll5_clk);
return;
}
diff --git a/arch/arm/mach-omap2/clock3xxx.h b/arch/arm/mach-omap2/clock3xxx.h
index 78d9f56..063fbf1 100644
--- a/arch/arm/mach-omap2/clock3xxx.h
+++ b/arch/arm/mach-omap2/clock3xxx.h
@@ -12,8 +12,8 @@ int omap3xxx_clk_init(void);
int omap3_core_dpll_m2_set_rate(struct clk_hw *clk, unsigned long rate,
unsigned long parent_rate);
-extern struct clk *sdrc_ick_p;
-extern struct clk *arm_fck_p;
+extern struct clk_core *sdrc_ick_p;
+extern struct clk_core *arm_fck_p;
extern const struct clkops clkops_noncore_dpll_ops;
diff --git a/arch/arm/mach-omap2/clock_common_data.c b/arch/arm/mach-omap2/clock_common_data.c
index ef4d21b..31e3e79 100644
--- a/arch/arm/mach-omap2/clock_common_data.c
+++ b/arch/arm/mach-omap2/clock_common_data.c
@@ -119,7 +119,7 @@ const struct clksel_rate div31_1to31_rates[] = {
static struct clk_ops dummy_ck_ops = {};
-struct clk dummy_ck = {
+struct clk_core dummy_ck = {
.name = "dummy_clk",
.ops = &dummy_ck_ops,
.flags = CLK_IS_BASIC,
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index 2da3b5e..dd89095 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -19,7 +19,6 @@
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/delay.h>
-#include <linux/clk.h>
#include <linux/limits.h>
#include <linux/err.h>
#include <linux/clk-provider.h>
@@ -1141,7 +1140,7 @@ static int _clkdm_clk_hwmod_enable(struct clockdomain *clkdm)
/**
* clkdm_clk_enable - add an enabled downstream clock to this clkdm
* @clkdm: struct clockdomain *
- * @clk: struct clk * of the enabled downstream clock
+ * @clk: struct clk_core * of the enabled downstream clock
*
* Increment the usecount of the clockdomain @clkdm and ensure that it
* is awake before @clk is enabled. Intended to be called by
@@ -1152,7 +1151,7 @@ static int _clkdm_clk_hwmod_enable(struct clockdomain *clkdm)
* by on-chip processors. Returns -EINVAL if passed null pointers;
* returns 0 upon success or if the clockdomain is in hwsup idle mode.
*/
-int clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk)
+int clkdm_clk_enable(struct clockdomain *clkdm, struct clk_core *clk)
{
/*
* XXX Rewrite this code to maintain a list of enabled
@@ -1168,7 +1167,7 @@ int clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk)
/**
* clkdm_clk_disable - remove an enabled downstream clock from this clkdm
* @clkdm: struct clockdomain *
- * @clk: struct clk * of the disabled downstream clock
+ * @clk: struct clk_core * of the disabled downstream clock
*
* Decrement the usecount of this clockdomain @clkdm when @clk is
* disabled. Intended to be called by clk_disable() code. If the
@@ -1178,7 +1177,7 @@ int clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk)
* pointers; -ERANGE if the @clkdm usecount underflows; or returns 0
* upon success or if the clockdomain is in hwsup idle mode.
*/
-int clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk)
+int clkdm_clk_disable(struct clockdomain *clkdm, struct clk_core *clk)
{
if (!clkdm || !clk || !arch_clkdm || !arch_clkdm->clkdm_clk_disable)
return -EINVAL;
diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h
index 82c37b1..f1a2cad 100644
--- a/arch/arm/mach-omap2/clockdomain.h
+++ b/arch/arm/mach-omap2/clockdomain.h
@@ -207,8 +207,8 @@ int clkdm_wakeup(struct clockdomain *clkdm);
int clkdm_sleep_nolock(struct clockdomain *clkdm);
int clkdm_sleep(struct clockdomain *clkdm);
-int clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk);
-int clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk);
+int clkdm_clk_enable(struct clockdomain *clkdm, struct clk_core *clk);
+int clkdm_clk_disable(struct clockdomain *clkdm, struct clk_core *clk);
int clkdm_hwmod_enable(struct clockdomain *clkdm, struct omap_hwmod *oh);
int clkdm_hwmod_disable(struct clockdomain *clkdm, struct omap_hwmod *oh);
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index 0f9e479..ff1f6c1 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -20,7 +20,6 @@
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/err.h>
#include <linux/delay.h>
@@ -524,7 +523,7 @@ int omap_dss_reset(struct omap_hwmod *oh)
for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
if (oc->_clk)
- clk_prepare_enable(oc->_clk);
+ clk_provider_prepare_enable(oc->_clk);
dispc_disable_outputs();
@@ -551,7 +550,7 @@ int omap_dss_reset(struct omap_hwmod *oh)
for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
if (oc->_clk)
- clk_disable_unprepare(oc->_clk);
+ clk_provider_disable_unprepare(oc->_clk);
r = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c
index ac3d789..39c3861 100644
--- a/arch/arm/mach-omap2/dpll3xxx.c
+++ b/arch/arm/mach-omap2/dpll3xxx.c
@@ -23,7 +23,6 @@
#include <linux/list.h>
#include <linux/errno.h>
#include <linux/delay.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include <linux/bitops.h>
#include <linux/clkdev.h>
@@ -288,7 +287,7 @@ static void _lookup_sddiv(struct clk_hw_omap *clk, u8 *sd_div, u16 m, u8 n)
/*
* _omap3_noncore_dpll_program - set non-core DPLL M,N values directly
- * @clk: struct clk * of DPLL to set
+ * @clk: struct clk_core * of DPLL to set
* @freqsel: FREQSEL value to set
*
* Program the DPLL with the last M, N values calculated, and wait for
@@ -410,7 +409,7 @@ int omap3_noncore_dpll_enable(struct clk_hw *hw)
struct clk_hw_omap *clk = to_clk_hw_omap(hw);
int r;
struct dpll_data *dd;
- struct clk *parent;
+ struct clk_core *parent;
dd = clk->dpll_data;
if (!dd)
@@ -461,7 +460,7 @@ void omap3_noncore_dpll_disable(struct clk_hw *hw)
/**
* omap3_noncore_dpll_set_rate - set non-core DPLL rate
- * @clk: struct clk * of DPLL to set
+ * @clk: struct clk_core * of DPLL to set
* @rate: rounded target rate
*
* Set the DPLL CLKOUT to the target rate. If the DPLL can enter
@@ -474,7 +473,7 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate,
unsigned long parent_rate)
{
struct clk_hw_omap *clk = to_clk_hw_omap(hw);
- struct clk *new_parent = NULL;
+ struct clk_core *new_parent = NULL;
unsigned long rrate;
u16 freqsel = 0;
struct dpll_data *dd;
@@ -493,15 +492,15 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate,
__func__, __clk_get_name(hw->clk));
__clk_prepare(dd->clk_bypass);
- clk_enable(dd->clk_bypass);
+ clk_provider_enable(dd->clk_bypass);
ret = _omap3_noncore_dpll_bypass(clk);
if (!ret)
new_parent = dd->clk_bypass;
- clk_disable(dd->clk_bypass);
+ clk_provider_disable(dd->clk_bypass);
__clk_unprepare(dd->clk_bypass);
} else {
__clk_prepare(dd->clk_ref);
- clk_enable(dd->clk_ref);
+ clk_provider_enable(dd->clk_ref);
/* XXX this check is probably pointless in the CCF context */
if (dd->last_rounded_rate != rate) {
@@ -530,7 +529,7 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate,
ret = omap3_noncore_dpll_program(clk, freqsel);
if (!ret)
new_parent = dd->clk_ref;
- clk_disable(dd->clk_ref);
+ clk_provider_disable(dd->clk_ref);
__clk_unprepare(dd->clk_ref);
}
/*
@@ -540,7 +539,7 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate,
* stuff is inherited for free
*/
- if (!ret && clk_get_parent(hw->clk) != new_parent)
+ if (!ret && clk_provider_get_parent(hw->clk) != new_parent)
__clk_reparent(hw->clk, new_parent);
return 0;
@@ -550,10 +549,10 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate,
/**
* omap3_dpll_autoidle_read - read a DPLL's autoidle bits
- * @clk: struct clk * of the DPLL to read
+ * @clk: struct clk_core * of the DPLL to read
*
* Return the DPLL's autoidle bits, shifted down to bit 0. Returns
- * -EINVAL if passed a null pointer or if the struct clk does not
+ * -EINVAL if passed a null pointer or if the struct clk_core does not
* appear to refer to a DPLL.
*/
u32 omap3_dpll_autoidle_read(struct clk_hw_omap *clk)
@@ -578,7 +577,7 @@ u32 omap3_dpll_autoidle_read(struct clk_hw_omap *clk)
/**
* omap3_dpll_allow_idle - enable DPLL autoidle bits
- * @clk: struct clk * of the DPLL to operate on
+ * @clk: struct clk_core * of the DPLL to operate on
*
* Enable DPLL automatic idle control. This automatic idle mode
* switching takes effect only when the DPLL is locked, at least on
@@ -612,7 +611,7 @@ void omap3_dpll_allow_idle(struct clk_hw_omap *clk)
/**
* omap3_dpll_deny_idle - prevent DPLL from automatically idling
- * @clk: struct clk * of the DPLL to operate on
+ * @clk: struct clk_core * of the DPLL to operate on
*
* Disable DPLL automatic idle control. No return value.
*/
@@ -642,7 +641,7 @@ void omap3_dpll_deny_idle(struct clk_hw_omap *clk)
static struct clk_hw_omap *omap3_find_clkoutx2_dpll(struct clk_hw *hw)
{
struct clk_hw_omap *pclk = NULL;
- struct clk *parent;
+ struct clk_core *parent;
/* Walk up the parents of clk, looking for a DPLL */
do {
diff --git a/arch/arm/mach-omap2/dpll44xx.c b/arch/arm/mach-omap2/dpll44xx.c
index 4613f1e..726b254 100644
--- a/arch/arm/mach-omap2/dpll44xx.c
+++ b/arch/arm/mach-omap2/dpll44xx.c
@@ -11,7 +11,6 @@
#include <linux/kernel.h>
#include <linux/errno.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include <linux/bitops.h>
@@ -124,7 +123,7 @@ static void omap4_dpll_lpmode_recalc(struct dpll_data *dd)
/**
* omap4_dpll_regm4xen_recalc - compute DPLL rate, considering REGM4XEN bit
- * @clk: struct clk * of the DPLL to compute the rate for
+ * @clk: struct clk_core * of the DPLL to compute the rate for
*
* Compute the output rate for the OMAP4 DPLL represented by @clk.
* Takes the REGM4XEN bit into consideration, which is needed for the
@@ -156,7 +155,7 @@ unsigned long omap4_dpll_regm4xen_recalc(struct clk_hw *hw,
/**
* omap4_dpll_regm4xen_round_rate - round DPLL rate, considering REGM4XEN bit
- * @clk: struct clk * of the DPLL to round a rate for
+ * @clk: struct clk_core * of the DPLL to round a rate for
* @target_rate: the desired rate of the DPLL
*
* Compute the rate that would be programmed into the DPLL hardware
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index b4ac3af..1424c90 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -12,7 +12,6 @@
*/
#include <linux/module.h>
#include <linux/init.h>
-#include <linux/clk.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/of.h>
@@ -34,7 +33,7 @@
#include "cm3xxx.h"
#include "cm-regbits-34xx.h"
-static struct clk *mcbsp_iclks[5];
+static struct clk_core *mcbsp_iclks[5];
static int omap3_enable_st_clock(unsigned int id, bool enable)
{
@@ -98,7 +97,7 @@ static int __init omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
(struct omap_mcbsp_dev_attr *)(oh->dev_attr))->sidetone);
pdata->enable_st_clock = omap3_enable_st_clock;
sprintf(clk_name, "mcbsp%d_ick", id);
- mcbsp_iclks[id] = clk_get(NULL, clk_name);
+ mcbsp_iclks[id] = clk_provider_get(NULL, clk_name);
count++;
}
pdev = omap_device_build_ss(name, id, oh_device, count, pdata,
diff --git a/arch/arm/mach-omap2/omap_device.c b/arch/arm/mach-omap2/omap_device.c
index f138a62..c5386a4 100644
--- a/arch/arm/mach-omap2/omap_device.c
+++ b/arch/arm/mach-omap2/omap_device.c
@@ -30,7 +30,6 @@
#include <linux/slab.h>
#include <linux/err.h>
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/pm_runtime.h>
@@ -47,7 +46,7 @@
static void _add_clkdev(struct omap_device *od, const char *clk_alias,
const char *clk_name)
{
- struct clk *r;
+ struct clk_core *r;
struct clk_lookup *l;
if (!clk_alias || !clk_name)
@@ -55,15 +54,15 @@ static void _add_clkdev(struct omap_device *od, const char *clk_alias,
dev_dbg(&od->pdev->dev, "Creating %s -> %s\n", clk_alias, clk_name);
- r = clk_get_sys(dev_name(&od->pdev->dev), clk_alias);
+ r = clk_provider_get_sys(dev_name(&od->pdev->dev), clk_alias);
if (!IS_ERR(r)) {
dev_dbg(&od->pdev->dev,
"alias %s already exists\n", clk_alias);
- clk_put(r);
+ __clk_put(r);
return;
}
- r = clk_get(NULL, clk_name);
+ r = clk_provider_get(NULL, clk_name);
if (IS_ERR(r)) {
dev_err(&od->pdev->dev,
"clk_get for %s failed\n", clk_name);
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 8fd87a3..c61b392 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -753,7 +753,7 @@ static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
}
/**
- * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
+ * _init_main_clk - get a struct clk_core * for the the hwmod's main functional clk
* @oh: struct omap_hwmod *
*
* Called from _init_clocks(). Populates the @oh _clk (main
@@ -767,7 +767,7 @@ static int _init_main_clk(struct omap_hwmod *oh)
if (!oh->main_clk)
return 0;
- oh->_clk = clk_get(NULL, oh->main_clk);
+ oh->_clk = clk_provider_get(NULL, oh->main_clk);
if (IS_ERR(oh->_clk)) {
pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
oh->name, oh->main_clk);
@@ -781,7 +781,7 @@ static int _init_main_clk(struct omap_hwmod *oh)
* some point where subsystems like i2c and pmic become
* available.
*/
- clk_prepare(oh->_clk);
+ clk_provider_prepare(oh->_clk);
if (!_get_clkdm(oh))
pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
@@ -791,7 +791,7 @@ static int _init_main_clk(struct omap_hwmod *oh)
}
/**
- * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
+ * _init_interface_clks - get a struct clk_core * for the the hwmod's interface clks
* @oh: struct omap_hwmod *
*
* Called from _init_clocks(). Populates the @oh OCP slave interface
@@ -801,7 +801,7 @@ static int _init_interface_clks(struct omap_hwmod *oh)
{
struct omap_hwmod_ocp_if *os;
struct list_head *p;
- struct clk *c;
+ struct clk_core *c;
int i = 0;
int ret = 0;
@@ -812,7 +812,7 @@ static int _init_interface_clks(struct omap_hwmod *oh)
if (!os->clk)
continue;
- c = clk_get(NULL, os->clk);
+ c = clk_provider_get(NULL, os->clk);
if (IS_ERR(c)) {
pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
oh->name, os->clk);
@@ -828,14 +828,14 @@ static int _init_interface_clks(struct omap_hwmod *oh)
* some point where subsystems like i2c and pmic become
* available.
*/
- clk_prepare(os->_clk);
+ clk_provider_prepare(os->_clk);
}
return ret;
}
/**
- * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
+ * _init_opt_clk - get a struct clk_core * for the the hwmod's optional clocks
* @oh: struct omap_hwmod *
*
* Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
@@ -844,12 +844,12 @@ static int _init_interface_clks(struct omap_hwmod *oh)
static int _init_opt_clks(struct omap_hwmod *oh)
{
struct omap_hwmod_opt_clk *oc;
- struct clk *c;
+ struct clk_core *c;
int i;
int ret = 0;
for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
- c = clk_get(NULL, oc->clk);
+ c = clk_provider_get(NULL, oc->clk);
if (IS_ERR(c)) {
pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
oh->name, oc->clk);
@@ -865,7 +865,7 @@ static int _init_opt_clks(struct omap_hwmod *oh)
* some point where subsystems like i2c and pmic become
* available.
*/
- clk_prepare(oc->_clk);
+ clk_provider_prepare(oc->_clk);
}
return ret;
@@ -887,7 +887,7 @@ static int _enable_clocks(struct omap_hwmod *oh)
pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
if (oh->_clk)
- clk_enable(oh->_clk);
+ clk_provider_enable(oh->_clk);
p = oh->slave_ports.next;
@@ -895,7 +895,7 @@ static int _enable_clocks(struct omap_hwmod *oh)
os = _fetch_next_ocp_if(&p, &i);
if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
- clk_enable(os->_clk);
+ clk_provider_enable(os->_clk);
}
/* The opt clocks are controlled by the device driver. */
@@ -918,7 +918,7 @@ static int _disable_clocks(struct omap_hwmod *oh)
pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
if (oh->_clk)
- clk_disable(oh->_clk);
+ clk_provider_disable(oh->_clk);
p = oh->slave_ports.next;
@@ -926,7 +926,7 @@ static int _disable_clocks(struct omap_hwmod *oh)
os = _fetch_next_ocp_if(&p, &i);
if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
- clk_disable(os->_clk);
+ clk_provider_disable(os->_clk);
}
/* The opt clocks are controlled by the device driver. */
@@ -945,7 +945,7 @@ static void _enable_optional_clocks(struct omap_hwmod *oh)
if (oc->_clk) {
pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
__clk_get_name(oc->_clk));
- clk_enable(oc->_clk);
+ clk_provider_enable(oc->_clk);
}
}
@@ -960,7 +960,7 @@ static void _disable_optional_clocks(struct omap_hwmod *oh)
if (oc->_clk) {
pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
__clk_get_name(oc->_clk));
- clk_disable(oc->_clk);
+ clk_provider_disable(oc->_clk);
}
}
@@ -2589,7 +2589,7 @@ static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
/* XXX omap_iclk_deny_idle(c); */
} else {
/* XXX omap_iclk_allow_idle(c); */
- clk_enable(os->_clk);
+ clk_provider_enable(os->_clk);
}
}
@@ -3396,7 +3396,7 @@ static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
* Initialize and set up a single hwmod. Intended to be used for a
* small number of early devices, such as the timer IP blocks used for
* the scheduler clock. Must be called after omap2_clk_init().
- * Resolves the struct clk names to struct clk pointers for each
+ * Resolves the struct clk_core names to struct clk_core pointers for each
* registered omap_hwmod. Also calls _setup() on each hwmod. Returns
* -EINVAL upon error or 0 upon success.
*/
@@ -3425,7 +3425,7 @@ int __init omap_hwmod_setup_one(const char *oh_name)
*
* Initialize and set up all IP blocks registered with the hwmod code.
* Must be called after omap2_clk_init(). Resolves the struct clk
- * names to struct clk pointers for each registered omap_hwmod. Also
+ * names to struct clk_core pointers for each registered omap_hwmod. Also
* calls _setup() on each hwmod. Returns 0 upon success.
*/
static int __init omap_hwmod_setup_all(void)
@@ -3792,7 +3792,7 @@ int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
*/
struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
{
- struct clk *c;
+ struct clk_core *c;
struct omap_hwmod_ocp_if *oi;
struct clockdomain *clkdm;
struct clk_hw_omap *clk;
diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h
index 0f97d63..46ffd06 100644
--- a/arch/arm/mach-omap2/omap_hwmod.h
+++ b/arch/arm/mach-omap2/omap_hwmod.h
@@ -207,7 +207,7 @@ struct omap_hwmod_rst_info {
* struct omap_hwmod_opt_clk - optional clocks used by this hwmod
* @role: "sys", "32k", "tv", etc -- for use in clk_get()
* @clk: opt clock: OMAP clock name
- * @_clk: pointer to the struct clk (filled in at runtime)
+ * @_clk: pointer to the struct clk_core (filled in at runtime)
*
* The module's interface clock and main functional clock should not
* be added as optional clocks.
@@ -215,7 +215,7 @@ struct omap_hwmod_rst_info {
struct omap_hwmod_opt_clk {
const char *role;
const char *clk;
- struct clk *_clk;
+ struct clk_core *_clk;
};
@@ -289,7 +289,7 @@ struct omap_hwmod_addr_space {
* @slave: struct omap_hwmod that responds to OCP transactions on this link
* @addr: address space associated with this link
* @clk: interface clock: OMAP clock name
- * @_clk: pointer to the interface struct clk (filled in at runtime)
+ * @_clk: pointer to the interface struct clk_core (filled in at runtime)
* @fw: interface firewall data
* @width: OCP data width
* @user: initiators using this interface (see OCP_USER_* macros above)
@@ -306,7 +306,7 @@ struct omap_hwmod_ocp_if {
struct omap_hwmod *slave;
struct omap_hwmod_addr_space *addr;
const char *clk;
- struct clk *_clk;
+ struct clk_core *_clk;
union {
struct omap_hwmod_omap2_firewall omap2;
} fw;
@@ -611,7 +611,7 @@ struct omap_hwmod_link {
* @sdma_reqs: ptr to an array of System DMA request IDs
* @prcm: PRCM data pertaining to this hwmod
* @main_clk: main clock: OMAP clock name
- * @_clk: pointer to the main struct clk (filled in at runtime)
+ * @_clk: pointer to the main struct clk_core (filled in at runtime)
* @opt_clks: other device clocks that drivers can request (0..*)
* @voltdm: pointer to voltage domain (filled in at runtime)
* @dev_attr: arbitrary device attributes that can be passed to the driver
@@ -653,7 +653,7 @@ struct omap_hwmod {
struct omap_hwmod_omap4_prcm omap4;
} prcm;
const char *main_clk;
- struct clk *_clk;
+ struct clk_core *_clk;
struct omap_hwmod_opt_clk *opt_clks;
char *clkdm_name;
struct clockdomain *clkdm;
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index fe01c5a..56e5e77 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -60,7 +60,7 @@ static void (*omap2_sram_suspend)(u32 dllctrl, void __iomem *sdrc_dlla_ctrl,
static struct powerdomain *mpu_pwrdm, *core_pwrdm;
static struct clockdomain *dsp_clkdm, *mpu_clkdm, *wkup_clkdm, *gfx_clkdm;
-static struct clk *osc_ck, *emul_ck;
+static struct clk_core *osc_ck, *emul_ck;
static int omap2_enter_full_retention(void)
{
@@ -71,7 +71,7 @@ static int omap2_enter_full_retention(void)
* oscillator itself it will be disabled if/when we enter retention
* mode.
*/
- clk_disable(osc_ck);
+ clk_provider_disable(osc_ck);
/* Clear old wake-up events */
/* REVISIT: These write to reserved bits? */
@@ -101,7 +101,7 @@ static int omap2_enter_full_retention(void)
no_sleep:
omap2_gpio_resume_after_idle();
- clk_enable(osc_ck);
+ clk_provider_enable(osc_ck);
/* clear CORE wake-up events */
omap2xxx_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0);
@@ -287,17 +287,17 @@ int __init omap2_pm_init(void)
pr_err("PM: gfx_clkdm not found\n");
- osc_ck = clk_get(NULL, "osc_ck");
+ osc_ck = clk_provider_get(NULL, "osc_ck");
if (IS_ERR(osc_ck)) {
printk(KERN_ERR "could not get osc_ck\n");
return -ENODEV;
}
if (cpu_is_omap242x()) {
- emul_ck = clk_get(NULL, "emul_ck");
+ emul_ck = clk_provider_get(NULL, "emul_ck");
if (IS_ERR(emul_ck)) {
printk(KERN_ERR "could not get emul_ck\n");
- clk_put(osc_ck);
+ __clk_put(osc_ck);
return -ENODEV;
}
}
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 6bbb7b5..6be2d2d 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -62,7 +62,7 @@ void __init orion5x_map_io(void)
/*****************************************************************************
* CLK tree
****************************************************************************/
-static struct clk *tclk;
+static struct clk_core *tclk;
void __init clk_init(void)
{
diff --git a/arch/arm/mach-shmobile/clock.c b/arch/arm/mach-shmobile/clock.c
index ed415dc..827f746 100644
--- a/arch/arm/mach-shmobile/clock.c
+++ b/arch/arm/mach-shmobile/clock.c
@@ -23,7 +23,6 @@
#include <linux/init.h>
#ifdef CONFIG_COMMON_CLK
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include "clock.h"
@@ -32,17 +31,17 @@ void __init shmobile_clk_workaround(const struct clk_name *clks,
int nr_clks, bool enable)
{
const struct clk_name *clkn;
- struct clk *clk;
+ struct clk_core *clk;
unsigned int i;
for (i = 0; i < nr_clks; ++i) {
clkn = clks + i;
- clk = clk_get(NULL, clkn->clk);
+ clk = clk_provider_get(NULL, clkn->clk);
if (!IS_ERR(clk)) {
clk_register_clkdev(clk, clkn->con_id, clkn->dev_id);
if (enable)
- clk_prepare_enable(clk);
- clk_put(clk);
+ clk_provider_prepare_enable(clk);
+ __clk_put(clk);
}
}
}
diff --git a/arch/arm/mach-vexpress/spc.c b/arch/arm/mach-vexpress/spc.c
index f61158c..e497df6 100644
--- a/arch/arm/mach-vexpress/spc.c
+++ b/arch/arm/mach-vexpress/spc.c
@@ -529,7 +529,7 @@ static struct clk_ops clk_spc_ops = {
.set_rate = spc_set_rate,
};
-static struct clk *ve_spc_clk_register(struct device *cpu_dev)
+static struct clk_core *ve_spc_clk_register(struct device *cpu_dev)
{
struct clk_init_data init;
struct clk_spc *spc;
@@ -556,7 +556,7 @@ static struct clk *ve_spc_clk_register(struct device *cpu_dev)
static int __init ve_spc_clk_init(void)
{
int cpu;
- struct clk *clk;
+ struct clk_core *clk;
if (!info)
return 0; /* Continue only if SPC is initialised */
diff --git a/arch/arm/plat-orion/common.c b/arch/arm/plat-orion/common.c
index 961b593..abf63ce 100644
--- a/arch/arm/plat-orion/common.c
+++ b/arch/arm/plat-orion/common.c
@@ -14,7 +14,6 @@
#include <linux/dma-mapping.h>
#include <linux/serial_8250.h>
#include <linux/ata_platform.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/mv643xx_eth.h>
@@ -27,7 +26,7 @@
/* Create a clkdev entry for a given device/clk */
void __init orion_clkdev_add(const char *con_id, const char *dev_id,
- struct clk *clk)
+ struct clk_core *clk)
{
struct clk_lookup *cl;
@@ -40,7 +39,7 @@ void __init orion_clkdev_add(const char *con_id, const char *dev_id,
Kirkwood has gated clocks for some of its peripherals, so creates
its own clkdev entries. For all the other orion devices, create
clkdev entries to the tclk. */
-void __init orion_clkdev_init(struct clk *tclk)
+void __init orion_clkdev_init(struct clk_core *tclk)
{
orion_clkdev_add(NULL, "orion_spi.0", tclk);
orion_clkdev_add(NULL, "orion_spi.1", tclk);
@@ -78,10 +77,10 @@ static void fill_resources(struct platform_device *device,
/*****************************************************************************
* UART
****************************************************************************/
-static unsigned long __init uart_get_clk_rate(struct clk *clk)
+static unsigned long __init uart_get_clk_rate(struct clk_core *clk)
{
- clk_prepare_enable(clk);
- return clk_get_rate(clk);
+ clk_provider_prepare_enable(clk);
+ return clk_provider_get_rate(clk);
}
static void __init uart_complete(
@@ -91,7 +90,7 @@ static void __init uart_complete(
void __iomem *membase,
resource_size_t mapbase,
unsigned int irq,
- struct clk *clk)
+ struct clk_core *clk)
{
data->mapbase = mapbase;
data->membase = membase;
@@ -125,7 +124,7 @@ static struct platform_device orion_uart0 = {
void __init orion_uart0_init(void __iomem *membase,
resource_size_t mapbase,
unsigned int irq,
- struct clk *clk)
+ struct clk_core *clk)
{
uart_complete(&orion_uart0, orion_uart0_data, orion_uart0_resources,
membase, mapbase, irq, clk);
@@ -153,7 +152,7 @@ static struct platform_device orion_uart1 = {
void __init orion_uart1_init(void __iomem *membase,
resource_size_t mapbase,
unsigned int irq,
- struct clk *clk)
+ struct clk_core *clk)
{
uart_complete(&orion_uart1, orion_uart1_data, orion_uart1_resources,
membase, mapbase, irq, clk);
@@ -181,7 +180,7 @@ static struct platform_device orion_uart2 = {
void __init orion_uart2_init(void __iomem *membase,
resource_size_t mapbase,
unsigned int irq,
- struct clk *clk)
+ struct clk_core *clk)
{
uart_complete(&orion_uart2, orion_uart2_data, orion_uart2_resources,
membase, mapbase, irq, clk);
@@ -209,7 +208,7 @@ static struct platform_device orion_uart3 = {
void __init orion_uart3_init(void __iomem *membase,
resource_size_t mapbase,
unsigned int irq,
- struct clk *clk)
+ struct clk_core *clk)
{
uart_complete(&orion_uart3, orion_uart3_data, orion_uart3_resources,
membase, mapbase, irq, clk);
diff --git a/arch/arm/plat-orion/include/plat/common.h b/arch/arm/plat-orion/include/plat/common.h
index d9a24f6..44f1bbe 100644
--- a/arch/arm/plat-orion/include/plat/common.h
+++ b/arch/arm/plat-orion/include/plat/common.h
@@ -18,22 +18,22 @@ struct mv_sata_platform_data;
void __init orion_uart0_init(void __iomem *membase,
resource_size_t mapbase,
unsigned int irq,
- struct clk *clk);
+ struct clk_core *clk);
void __init orion_uart1_init(void __iomem *membase,
resource_size_t mapbase,
unsigned int irq,
- struct clk *clk);
+ struct clk_core *clk);
void __init orion_uart2_init(void __iomem *membase,
resource_size_t mapbase,
unsigned int irq,
- struct clk *clk);
+ struct clk_core *clk);
void __init orion_uart3_init(void __iomem *membase,
resource_size_t mapbase,
unsigned int irq,
- struct clk *clk);
+ struct clk_core *clk);
void __init orion_rtc_init(unsigned long mapbase,
unsigned long irq);
@@ -107,7 +107,7 @@ void __init orion_crypto_init(unsigned long mapbase,
unsigned long irq);
void __init orion_clkdev_add(const char *con_id, const char *dev_id,
- struct clk *clk);
+ struct clk_core *clk);
-void __init orion_clkdev_init(struct clk *tclk);
+void __init orion_clkdev_init(struct clk_core *tclk);
#endif
diff --git a/arch/mips/alchemy/common/clock.c b/arch/mips/alchemy/common/clock.c
index d7557cd..46e1c3c 100644
--- a/arch/mips/alchemy/common/clock.c
+++ b/arch/mips/alchemy/common/clock.c
@@ -138,7 +138,7 @@ static struct clk_ops alchemy_clkops_cpu = {
.recalc_rate = alchemy_clk_cpu_recalc,
};
-static struct clk __init *alchemy_clk_setup_cpu(const char *parent_name,
+static struct clk_core __init *alchemy_clk_setup_cpu(const char *parent_name,
int ctype)
{
struct clk_init_data id;
@@ -221,12 +221,12 @@ static struct clk_ops alchemy_clkops_aux = {
.round_rate = alchemy_clk_aux_roundr,
};
-static struct clk __init *alchemy_clk_setup_aux(const char *parent_name,
+static struct clk_core __init *alchemy_clk_setup_aux(const char *parent_name,
char *name, int maxmult,
unsigned long reg)
{
struct clk_init_data id;
- struct clk *c;
+ struct clk_core *c;
struct alchemy_auxpll_clk *a;
a = kzalloc(sizeof(*a), GFP_KERNEL);
@@ -254,10 +254,10 @@ static struct clk __init *alchemy_clk_setup_aux(const char *parent_name,
/* sysbus_clk *********************************************************/
-static struct clk __init *alchemy_clk_setup_sysbus(const char *pn)
+static struct clk_core __init *alchemy_clk_setup_sysbus(const char *pn)
{
unsigned long v = (alchemy_rdsys(AU1000_SYS_POWERCTRL) & 3) + 2;
- struct clk *c;
+ struct clk_core *c;
c = clk_register_fixed_factor(NULL, ALCHEMY_SYSBUS_CLK,
pn, 0, 1, v);
@@ -268,10 +268,10 @@ static struct clk __init *alchemy_clk_setup_sysbus(const char *pn)
/* Peripheral Clock ***************************************************/
-static struct clk __init *alchemy_clk_setup_periph(const char *pn)
+static struct clk_core __init *alchemy_clk_setup_periph(const char *pn)
{
/* Peripheral clock runs at half the rate of sysbus clk */
- struct clk *c;
+ struct clk_core *c;
c = clk_register_fixed_factor(NULL, ALCHEMY_PERIPH_CLK,
pn, 0, 1, 2);
@@ -282,11 +282,11 @@ static struct clk __init *alchemy_clk_setup_periph(const char *pn)
/* mem clock **********************************************************/
-static struct clk __init *alchemy_clk_setup_mem(const char *pn, int ct)
+static struct clk_core __init *alchemy_clk_setup_mem(const char *pn, int ct)
{
void __iomem *addr = IOMEM(AU1000_MEM_PHYS_ADDR);
unsigned long v;
- struct clk *c;
+ struct clk_core *c;
int div;
switch (ct) {
@@ -316,14 +316,14 @@ static struct clk __init *alchemy_clk_setup_mem(const char *pn, int ct)
/* lrclk: external synchronous static bus clock ***********************/
-static struct clk __init *alchemy_clk_setup_lrclk(const char *pn)
+static struct clk_core __init *alchemy_clk_setup_lrclk(const char *pn)
{
/* MEM_STCFG0[15:13] = divisor.
* L/RCLK = periph_clk / (divisor + 1)
* On Au1000, Au1500, Au1100 it's called LCLK,
* on later models it's called RCLK, but it's the same thing.
*/
- struct clk *c;
+ struct clk_core *c;
unsigned long v = alchemy_rdsmem(AU1000_MEM_STCFG0) >> 13;
v = (v & 7) + 1;
@@ -375,10 +375,10 @@ static long alchemy_calc_div(unsigned long rate, unsigned long prate,
static long alchemy_clk_fgcs_detr(struct clk_hw *hw, unsigned long rate,
unsigned long *best_parent_rate,
- struct clk **best_parent_clk,
+ struct clk_core **best_parent_clk,
int scale, int maxdiv)
{
- struct clk *pc, *bpc, *free;
+ struct clk_core *pc, *bpc, *free;
long tdv, tpr, pr, nr, br, bpr, diff, lastdiff;
int j;
@@ -405,7 +405,7 @@ static long alchemy_clk_fgcs_detr(struct clk_hw *hw, unsigned long rate,
free = pc;
}
- pr = clk_get_rate(pc);
+ pr = clk_provider_get_rate(pc);
if (pr < rate)
continue;
@@ -435,7 +435,7 @@ static long alchemy_clk_fgcs_detr(struct clk_hw *hw, unsigned long rate,
tpr = rate * j;
if (tpr < 0)
break;
- pr = clk_round_rate(free, tpr);
+ pr = clk_provider_round_rate(free, tpr);
tdv = alchemy_calc_div(rate, pr, scale, maxdiv, NULL);
nr = pr / tdv;
@@ -548,7 +548,7 @@ static unsigned long alchemy_clk_fgv1_recalc(struct clk_hw *hw,
static long alchemy_clk_fgv1_detr(struct clk_hw *hw, unsigned long rate,
unsigned long *best_parent_rate,
- struct clk **best_parent_clk)
+ struct clk_core **best_parent_clk)
{
return alchemy_clk_fgcs_detr(hw, rate, best_parent_rate,
best_parent_clk, 2, 512);
@@ -680,7 +680,7 @@ static unsigned long alchemy_clk_fgv2_recalc(struct clk_hw *hw,
static long alchemy_clk_fgv2_detr(struct clk_hw *hw, unsigned long rate,
unsigned long *best_parent_rate,
- struct clk **best_parent_clk)
+ struct clk_core **best_parent_clk)
{
struct alchemy_fgcs_clk *c = to_fgcs_clk(hw);
int scale, maxdiv;
@@ -723,7 +723,7 @@ static const char * const alchemy_clk_fgen_names[] = {
static int __init alchemy_clk_init_fgens(int ctype)
{
- struct clk *c;
+ struct clk_core *c;
struct clk_init_data id;
struct alchemy_fgcs_clk *a;
unsigned long v;
@@ -899,7 +899,7 @@ static int alchemy_clk_csrc_setr(struct clk_hw *hw, unsigned long rate,
static long alchemy_clk_csrc_detr(struct clk_hw *hw, unsigned long rate,
unsigned long *best_parent_rate,
- struct clk **best_parent_clk)
+ struct clk_core **best_parent_clk)
{
struct alchemy_fgcs_clk *c = to_fgcs_clk(hw);
int scale = c->dt[2] == 3 ? 1 : 2; /* au1300 check */
@@ -936,7 +936,7 @@ static int __init alchemy_clk_setup_imux(int ctype)
struct clk_init_data id;
unsigned long v;
int i, ret, *dt;
- struct clk *c;
+ struct clk_core *c;
id.ops = &alchemy_clkops_csrc;
id.parent_names = (const char **)alchemy_clk_csrc_parents;
@@ -1023,7 +1023,7 @@ static int __init alchemy_clk_init(void)
{
int ctype = alchemy_get_cputype(), ret, i;
struct clk_aliastable *t = alchemy_clk_aliases;
- struct clk *c;
+ struct clk_core *c;
/* Root of the Alchemy clock tree: external 12MHz crystal osc */
c = clk_register_fixed_rate(NULL, ALCHEMY_ROOT_CLK, NULL,
diff --git a/arch/powerpc/platforms/512x/clock-commonclk.c b/arch/powerpc/platforms/512x/clock-commonclk.c
index 6eb614a..81afe83 100644
--- a/arch/powerpc/platforms/512x/clock-commonclk.c
+++ b/arch/powerpc/platforms/512x/clock-commonclk.c
@@ -70,7 +70,7 @@ enum {
};
/* data required for the OF clock provider registration */
-static struct clk *clks[MPC512x_CLK_LAST_PRIVATE];
+static struct clk_core *clks[MPC512x_CLK_LAST_PRIVATE];
static struct clk_onecell_data clk_data;
/* CCM register access */
@@ -218,12 +218,12 @@ static bool soc_has_mclk_mux0_canin(void)
/* common clk API wrappers {{{ */
/* convenience wrappers around the common clk API */
-static inline struct clk *mpc512x_clk_fixed(const char *name, int rate)
+static inline struct clk_core *mpc512x_clk_fixed(const char *name, int rate)
{
return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate);
}
-static inline struct clk *mpc512x_clk_factor(
+static inline struct clk_core *mpc512x_clk_factor(
const char *name, const char *parent_name,
int mul, int div)
{
@@ -234,7 +234,7 @@ static inline struct clk *mpc512x_clk_factor(
mul, div);
}
-static inline struct clk *mpc512x_clk_divider(
+static inline struct clk_core *mpc512x_clk_divider(
const char *name, const char *parent_name, u8 clkflags,
u32 __iomem *reg, u8 pos, u8 len, int divflags)
{
@@ -242,7 +242,7 @@ static inline struct clk *mpc512x_clk_divider(
reg, pos, len, divflags, &clklock);
}
-static inline struct clk *mpc512x_clk_divtable(
+static inline struct clk_core *mpc512x_clk_divtable(
const char *name, const char *parent_name,
u32 __iomem *reg, u8 pos, u8 len,
const struct clk_div_table *divtab)
@@ -255,7 +255,7 @@ static inline struct clk *mpc512x_clk_divtable(
divtab, &clklock);
}
-static inline struct clk *mpc512x_clk_gated(
+static inline struct clk_core *mpc512x_clk_gated(
const char *name, const char *parent_name,
u32 __iomem *reg, u8 pos)
{
@@ -266,7 +266,7 @@ static inline struct clk *mpc512x_clk_gated(
reg, pos, 0, &clklock);
}
-static inline struct clk *mpc512x_clk_muxed(const char *name,
+static inline struct clk_core *mpc512x_clk_muxed(const char *name,
const char **parent_names, int parent_count,
u32 __iomem *reg, u8 pos, u8 len)
{
@@ -422,7 +422,7 @@ static void mpc512x_clk_setup_ref_clock(struct device_node *np, int bus_freq,
int *sys_mul, int *sys_div,
int *ips_div)
{
- struct clk *osc_clk;
+ struct clk_core *osc_clk;
int calc_freq;
/* fetch mul/div factors from the hardware */
@@ -432,7 +432,7 @@ static void mpc512x_clk_setup_ref_clock(struct device_node *np, int bus_freq,
*ips_div = get_bit_field(&clkregs->scfr1, 23, 3);
/* lookup the oscillator clock for its rate */
- osc_clk = of_clk_get_by_name(np, "osc");
+ osc_clk = of_clk_provider_get_by_name(np, "osc");
/*
* either descend from OSC to REF (and in bypassing verify the
@@ -444,7 +444,7 @@ static void mpc512x_clk_setup_ref_clock(struct device_node *np, int bus_freq,
*/
if (!IS_ERR(osc_clk)) {
clks[MPC512x_CLK_REF] = mpc512x_clk_factor("ref", "osc", 1, 1);
- calc_freq = clk_get_rate(clks[MPC512x_CLK_REF]);
+ calc_freq = clk_provider_get_rate(clks[MPC512x_CLK_REF]);
calc_freq *= *sys_mul;
calc_freq /= *sys_div;
calc_freq /= 2;
@@ -647,8 +647,8 @@ static void mpc512x_clk_setup_mclk(struct mclk_setup_data *entry, size_t idx)
* - MCLK 0 enabled
* - MCLK 1 from MCLK DIV
*/
- div = clk_get_rate(clks[MPC512x_CLK_SYS]);
- div /= clk_get_rate(clks[MPC512x_CLK_IPS]);
+ div = clk_provider_get_rate(clks[MPC512x_CLK_SYS]);
+ div /= clk_provider_get_rate(clks[MPC512x_CLK_IPS]);
out_be32(mccr_reg, (0 << 16));
out_be32(mccr_reg, (0 << 16) | ((div - 1) << 17));
out_be32(mccr_reg, (1 << 16) | ((div - 1) << 17));
@@ -925,12 +925,12 @@ static void mpc512x_clk_setup_clock_tree(struct device_node *np, int busfreq)
* claimed by any peripheral driver, to not have the clock
* subsystem disable them late at startup
*/
- clk_prepare_enable(clks[MPC512x_CLK_DUMMY]);
- clk_prepare_enable(clks[MPC512x_CLK_E300]); /* PowerPC CPU */
- clk_prepare_enable(clks[MPC512x_CLK_DDR]); /* DRAM */
- clk_prepare_enable(clks[MPC512x_CLK_MEM]); /* SRAM */
- clk_prepare_enable(clks[MPC512x_CLK_IPS]); /* SoC periph */
- clk_prepare_enable(clks[MPC512x_CLK_LPC]); /* boot media */
+ clk_provider_prepare_enable(clks[MPC512x_CLK_DUMMY]);
+ clk_provider_prepare_enable(clks[MPC512x_CLK_E300]); /* PowerPC CPU */
+ clk_provider_prepare_enable(clks[MPC512x_CLK_DDR]); /* DRAM */
+ clk_provider_prepare_enable(clks[MPC512x_CLK_MEM]); /* SRAM */
+ clk_provider_prepare_enable(clks[MPC512x_CLK_IPS]); /* SoC periph */
+ clk_provider_prepare_enable(clks[MPC512x_CLK_LPC]); /* boot media */
}
/*
@@ -969,9 +969,9 @@ static void mpc5121_clk_provide_migration_support(void)
* has attached to bridges, otherwise the PCI clock remains
* unused and so it gets disabled
*/
- clk_prepare_enable(clks[MPC512x_CLK_PSC3_MCLK]);/* serial console */
+ clk_provider_prepare_enable(clks[MPC512x_CLK_PSC3_MCLK]);/* serial console */
if (of_find_compatible_node(NULL, "pci", "fsl,mpc5121-pci"))
- clk_prepare_enable(clks[MPC512x_CLK_PCI]);
+ clk_provider_prepare_enable(clks[MPC512x_CLK_PCI]);
}
/*
@@ -988,8 +988,8 @@ static void mpc5121_clk_provide_migration_support(void)
} while (0)
#define NODE_CHK(clkname, clkitem, regnode, regflag) do { \
- struct clk *clk; \
- clk = of_clk_get_by_name(np, clkname); \
+ struct clk_core *clk; \
+ clk = of_clk_provider_get_by_name(np, clkname); \
if (IS_ERR(clk)) { \
clk = clkitem; \
clk_register_clkdev(clk, clkname, devname); \
@@ -999,7 +999,7 @@ static void mpc5121_clk_provide_migration_support(void)
pr_debug("clock alias name '%s' for dev '%s' pointer %p\n", \
clkname, devname, clk); \
} else { \
- clk_put(clk); \
+ __clk_put(clk); \
} \
} while (0)
@@ -1090,7 +1090,7 @@ static void mpc5121_clk_provide_backwards_compat(void)
* workaround obsolete
*/
if (did_register & DID_REG_I2C)
- clk_prepare_enable(clks[MPC512x_CLK_I2C]);
+ clk_provider_prepare_enable(clks[MPC512x_CLK_I2C]);
FOR_NODES("fsl,mpc5121-diu") {
NODE_PREP;
diff --git a/drivers/acpi/acpi_lpss.c b/drivers/acpi/acpi_lpss.c
index bcbdbd2..f4c6ccf 100644
--- a/drivers/acpi/acpi_lpss.c
+++ b/drivers/acpi/acpi_lpss.c
@@ -11,7 +11,6 @@
*/
#include <linux/acpi.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/err.h>
@@ -78,7 +77,7 @@ struct lpss_private_data {
void __iomem *mmio_base;
resource_size_t mmio_size;
unsigned int fixed_clk_rate;
- struct clk *clk;
+ struct clk_core *clk;
const struct lpss_device_desc *dev_desc;
u32 prv_reg_ctx[LPSS_PRV_REG_COUNT];
};
@@ -229,7 +228,7 @@ static int register_device_clock(struct acpi_device *adev,
{
const struct lpss_device_desc *dev_desc = pdata->dev_desc;
const char *devname = dev_name(&adev->dev);
- struct clk *clk = ERR_PTR(-ENODEV);
+ struct clk_core *clk = ERR_PTR(-ENODEV);
struct lpss_clk_data *clk_data;
const char *parent, *clk_name;
void __iomem *prv_base;
diff --git a/drivers/clk/at91/clk-main.c b/drivers/clk/at91/clk-main.c
index 59fa3cc..11bcdb1 100644
--- a/drivers/clk/at91/clk-main.c
+++ b/drivers/clk/at91/clk-main.c
@@ -138,7 +138,7 @@ static const struct clk_ops main_osc_ops = {
.is_prepared = clk_main_osc_is_prepared,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_main_osc(struct at91_pmc *pmc,
unsigned int irq,
const char *name,
@@ -147,7 +147,7 @@ at91_clk_register_main_osc(struct at91_pmc *pmc,
{
int ret;
struct clk_main_osc *osc;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
if (!pmc || !irq || !name || !parent_name)
@@ -192,7 +192,7 @@ at91_clk_register_main_osc(struct at91_pmc *pmc,
void __init of_at91rm9200_clk_main_osc_setup(struct device_node *np,
struct at91_pmc *pmc)
{
- struct clk *clk;
+ struct clk_core *clk;
unsigned int irq;
const char *name = np->name;
const char *parent_name;
@@ -291,7 +291,7 @@ static const struct clk_ops main_rc_osc_ops = {
.recalc_accuracy = clk_main_rc_osc_recalc_accuracy,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_main_rc_osc(struct at91_pmc *pmc,
unsigned int irq,
const char *name,
@@ -299,7 +299,7 @@ at91_clk_register_main_rc_osc(struct at91_pmc *pmc,
{
int ret;
struct clk_main_rc_osc *osc;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
if (!pmc || !irq || !name || !frequency)
@@ -340,7 +340,7 @@ at91_clk_register_main_rc_osc(struct at91_pmc *pmc,
void __init of_at91sam9x5_clk_main_rc_osc_setup(struct device_node *np,
struct at91_pmc *pmc)
{
- struct clk *clk;
+ struct clk_core *clk;
unsigned int irq;
u32 frequency = 0;
u32 accuracy = 0;
@@ -424,13 +424,13 @@ static const struct clk_ops rm9200_main_ops = {
.recalc_rate = clk_rm9200_main_recalc_rate,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_rm9200_main(struct at91_pmc *pmc,
const char *name,
const char *parent_name)
{
struct clk_rm9200_main *clkmain;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
if (!pmc || !name)
@@ -462,7 +462,7 @@ at91_clk_register_rm9200_main(struct at91_pmc *pmc,
void __init of_at91rm9200_clk_main_setup(struct device_node *np,
struct at91_pmc *pmc)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name;
const char *name = np->name;
@@ -555,7 +555,7 @@ static const struct clk_ops sam9x5_main_ops = {
.get_parent = clk_sam9x5_main_get_parent,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_sam9x5_main(struct at91_pmc *pmc,
unsigned int irq,
const char *name,
@@ -564,7 +564,7 @@ at91_clk_register_sam9x5_main(struct at91_pmc *pmc,
{
int ret;
struct clk_sam9x5_main *clkmain;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
if (!pmc || !irq || !name)
@@ -607,7 +607,7 @@ at91_clk_register_sam9x5_main(struct at91_pmc *pmc,
void __init of_at91sam9x5_clk_main_setup(struct device_node *np,
struct at91_pmc *pmc)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_names[2];
int num_parents;
unsigned int irq;
diff --git a/drivers/clk/at91/clk-master.c b/drivers/clk/at91/clk-master.c
index c1af80b..95ae1b6 100644
--- a/drivers/clk/at91/clk-master.c
+++ b/drivers/clk/at91/clk-master.c
@@ -131,7 +131,7 @@ static const struct clk_ops master_ops = {
.get_parent = clk_master_get_parent,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_master(struct at91_pmc *pmc, unsigned int irq,
const char *name, int num_parents,
const char **parent_names,
@@ -140,7 +140,7 @@ at91_clk_register_master(struct at91_pmc *pmc, unsigned int irq,
{
int ret;
struct clk_master *master;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
if (!pmc || !irq || !name || !num_parents || !parent_names)
@@ -216,7 +216,7 @@ static void __init
of_at91_clk_master_setup(struct device_node *np, struct at91_pmc *pmc,
const struct clk_master_layout *layout)
{
- struct clk *clk;
+ struct clk_core *clk;
int num_parents;
int i;
unsigned int irq;
diff --git a/drivers/clk/at91/clk-peripheral.c b/drivers/clk/at91/clk-peripheral.c
index 597fed4..cdf8e8a 100644
--- a/drivers/clk/at91/clk-peripheral.c
+++ b/drivers/clk/at91/clk-peripheral.c
@@ -100,12 +100,12 @@ static const struct clk_ops peripheral_ops = {
.is_enabled = clk_peripheral_is_enabled,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_peripheral(struct at91_pmc *pmc, const char *name,
const char *parent_name, u32 id)
{
struct clk_peripheral *periph;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
if (!pmc || !name || !parent_name || id > PERIPHERAL_ID_MAX)
@@ -134,7 +134,7 @@ at91_clk_register_peripheral(struct at91_pmc *pmc, const char *name,
static void clk_sam9x5_peripheral_autodiv(struct clk_sam9x5_peripheral *periph)
{
- struct clk *parent;
+ struct clk_core *parent;
unsigned long parent_rate;
int shift = 0;
@@ -309,13 +309,13 @@ static const struct clk_ops sam9x5_peripheral_ops = {
.set_rate = clk_sam9x5_peripheral_set_rate,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_sam9x5_peripheral(struct at91_pmc *pmc, const char *name,
const char *parent_name, u32 id,
const struct clk_range *range)
{
struct clk_sam9x5_peripheral *periph;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
if (!pmc || !name || !parent_name)
@@ -352,7 +352,7 @@ of_at91_clk_periph_setup(struct device_node *np, struct at91_pmc *pmc, u8 type)
{
int num;
u32 id;
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name;
const char *name;
struct device_node *periphclknp;
diff --git a/drivers/clk/at91/clk-pll.c b/drivers/clk/at91/clk-pll.c
index 6ec79db..6a1b900 100644
--- a/drivers/clk/at91/clk-pll.c
+++ b/drivers/clk/at91/clk-pll.c
@@ -299,14 +299,14 @@ static const struct clk_ops pll_ops = {
.set_rate = clk_pll_set_rate,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_pll(struct at91_pmc *pmc, unsigned int irq, const char *name,
const char *parent_name, u8 id,
const struct clk_pll_layout *layout,
const struct clk_pll_characteristics *characteristics)
{
struct clk_pll *pll;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
int ret;
int offset = PLL_REG(id);
@@ -476,7 +476,7 @@ of_at91_clk_pll_setup(struct device_node *np, struct at91_pmc *pmc,
{
u32 id;
unsigned int irq;
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name;
const char *name = np->name;
struct clk_pll_characteristics *characteristics;
diff --git a/drivers/clk/at91/clk-plldiv.c b/drivers/clk/at91/clk-plldiv.c
index ea22656..f8204d8 100644
--- a/drivers/clk/at91/clk-plldiv.c
+++ b/drivers/clk/at91/clk-plldiv.c
@@ -79,12 +79,12 @@ static const struct clk_ops plldiv_ops = {
.set_rate = clk_plldiv_set_rate,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_plldiv(struct at91_pmc *pmc, const char *name,
const char *parent_name)
{
struct clk_plldiv *plldiv;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
plldiv = kzalloc(sizeof(*plldiv), GFP_KERNEL);
@@ -111,7 +111,7 @@ at91_clk_register_plldiv(struct at91_pmc *pmc, const char *name,
static void __init
of_at91_clk_plldiv_setup(struct device_node *np, struct at91_pmc *pmc)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name;
const char *name = np->name;
diff --git a/drivers/clk/at91/clk-programmable.c b/drivers/clk/at91/clk-programmable.c
index 62e2509..b72e98c 100644
--- a/drivers/clk/at91/clk-programmable.c
+++ b/drivers/clk/at91/clk-programmable.c
@@ -57,9 +57,9 @@ static unsigned long clk_programmable_recalc_rate(struct clk_hw *hw,
static long clk_programmable_determine_rate(struct clk_hw *hw,
unsigned long rate,
unsigned long *best_parent_rate,
- struct clk **best_parent_clk)
+ struct clk_core **best_parent_clk)
{
- struct clk *parent = NULL;
+ struct clk_core *parent = NULL;
long best_rate = -EINVAL;
unsigned long parent_rate;
unsigned long tmp_rate;
@@ -169,14 +169,14 @@ static const struct clk_ops programmable_ops = {
.set_rate = clk_programmable_set_rate,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_programmable(struct at91_pmc *pmc,
const char *name, const char **parent_names,
u8 num_parents, u8 id,
const struct clk_programmable_layout *layout)
{
struct clk_programmable *prog;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
if (id > PROG_ID_MAX)
@@ -229,7 +229,7 @@ of_at91_clk_prog_setup(struct device_node *np, struct at91_pmc *pmc,
int num;
u32 id;
int i;
- struct clk *clk;
+ struct clk_core *clk;
int num_parents;
const char *parent_names[PROG_SOURCE_MAX];
const char *name;
diff --git a/drivers/clk/at91/clk-slow.c b/drivers/clk/at91/clk-slow.c
index 0300c46..d50fe02 100644
--- a/drivers/clk/at91/clk-slow.c
+++ b/drivers/clk/at91/clk-slow.c
@@ -117,7 +117,7 @@ static const struct clk_ops slow_osc_ops = {
.is_prepared = clk_slow_osc_is_prepared,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_slow_osc(void __iomem *sckcr,
const char *name,
const char *parent_name,
@@ -125,7 +125,7 @@ at91_clk_register_slow_osc(void __iomem *sckcr,
bool bypass)
{
struct clk_slow_osc *osc;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
if (!sckcr || !name || !parent_name)
@@ -159,7 +159,7 @@ at91_clk_register_slow_osc(void __iomem *sckcr,
void __init of_at91sam9x5_clk_slow_osc_setup(struct device_node *np,
void __iomem *sckcr)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name;
const char *name = np->name;
u32 startup;
@@ -229,7 +229,7 @@ static const struct clk_ops slow_rc_osc_ops = {
.recalc_accuracy = clk_slow_rc_osc_recalc_accuracy,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_slow_rc_osc(void __iomem *sckcr,
const char *name,
unsigned long frequency,
@@ -237,7 +237,7 @@ at91_clk_register_slow_rc_osc(void __iomem *sckcr,
unsigned long startup)
{
struct clk_slow_rc_osc *osc;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
if (!sckcr || !name)
@@ -269,7 +269,7 @@ at91_clk_register_slow_rc_osc(void __iomem *sckcr,
void __init of_at91sam9x5_clk_slow_rc_osc_setup(struct device_node *np,
void __iomem *sckcr)
{
- struct clk *clk;
+ struct clk_core *clk;
u32 frequency = 0;
u32 accuracy = 0;
u32 startup = 0;
@@ -327,14 +327,14 @@ static const struct clk_ops sam9x5_slow_ops = {
.get_parent = clk_sam9x5_slow_get_parent,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_sam9x5_slow(void __iomem *sckcr,
const char *name,
const char **parent_names,
int num_parents)
{
struct clk_sam9x5_slow *slowck;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
if (!sckcr || !name || !parent_names || !num_parents)
@@ -364,7 +364,7 @@ at91_clk_register_sam9x5_slow(void __iomem *sckcr,
void __init of_at91sam9x5_clk_slow_setup(struct device_node *np,
void __iomem *sckcr)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_names[2];
int num_parents;
const char *name = np->name;
@@ -401,14 +401,14 @@ static const struct clk_ops sam9260_slow_ops = {
.get_parent = clk_sam9260_slow_get_parent,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_sam9260_slow(struct at91_pmc *pmc,
const char *name,
const char **parent_names,
int num_parents)
{
struct clk_sam9260_slow *slowck;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
if (!pmc || !name)
@@ -440,7 +440,7 @@ at91_clk_register_sam9260_slow(struct at91_pmc *pmc,
void __init of_at91sam9260_clk_slow_setup(struct device_node *np,
struct at91_pmc *pmc)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_names[2];
int num_parents;
const char *name = np->name;
diff --git a/drivers/clk/at91/clk-smd.c b/drivers/clk/at91/clk-smd.c
index 144d47e..8820b84 100644
--- a/drivers/clk/at91/clk-smd.c
+++ b/drivers/clk/at91/clk-smd.c
@@ -113,12 +113,12 @@ static const struct clk_ops at91sam9x5_smd_ops = {
.set_rate = at91sam9x5_clk_smd_set_rate,
};
-static struct clk * __init
+static struct clk_core * __init
at91sam9x5_clk_register_smd(struct at91_pmc *pmc, const char *name,
const char **parent_names, u8 num_parents)
{
struct at91sam9x5_clk_smd *smd;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
smd = kzalloc(sizeof(*smd), GFP_KERNEL);
@@ -144,7 +144,7 @@ at91sam9x5_clk_register_smd(struct at91_pmc *pmc, const char *name,
void __init of_at91sam9x5_clk_smd_setup(struct device_node *np,
struct at91_pmc *pmc)
{
- struct clk *clk;
+ struct clk_core *clk;
int i;
int num_parents;
const char *parent_names[SMD_SOURCE_MAX];
diff --git a/drivers/clk/at91/clk-system.c b/drivers/clk/at91/clk-system.c
index a76d03f..7f48cde 100644
--- a/drivers/clk/at91/clk-system.c
+++ b/drivers/clk/at91/clk-system.c
@@ -99,12 +99,12 @@ static const struct clk_ops system_ops = {
.is_prepared = clk_system_is_prepared,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_system(struct at91_pmc *pmc, const char *name,
const char *parent_name, u8 id, int irq)
{
struct clk_system *sys;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
int ret;
@@ -147,7 +147,7 @@ of_at91_clk_sys_setup(struct device_node *np, struct at91_pmc *pmc)
int num;
int irq = 0;
u32 id;
- struct clk *clk;
+ struct clk_core *clk;
const char *name;
struct device_node *sysclknp;
const char *parent_name;
diff --git a/drivers/clk/at91/clk-usb.c b/drivers/clk/at91/clk-usb.c
index 24b5b02..94b5871 100644
--- a/drivers/clk/at91/clk-usb.c
+++ b/drivers/clk/at91/clk-usb.c
@@ -162,12 +162,12 @@ static const struct clk_ops at91sam9n12_usb_ops = {
.set_rate = at91sam9x5_clk_usb_set_rate,
};
-static struct clk * __init
+static struct clk_core * __init
at91sam9x5_clk_register_usb(struct at91_pmc *pmc, const char *name,
const char **parent_names, u8 num_parents)
{
struct at91sam9x5_clk_usb *usb;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
usb = kzalloc(sizeof(*usb), GFP_KERNEL);
@@ -190,12 +190,12 @@ at91sam9x5_clk_register_usb(struct at91_pmc *pmc, const char *name,
return clk;
}
-static struct clk * __init
+static struct clk_core * __init
at91sam9n12_clk_register_usb(struct at91_pmc *pmc, const char *name,
const char *parent_name)
{
struct at91sam9x5_clk_usb *usb;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
usb = kzalloc(sizeof(*usb), GFP_KERNEL);
@@ -238,7 +238,7 @@ static long at91rm9200_clk_usb_round_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *parent_rate)
{
struct at91rm9200_clk_usb *usb = to_at91rm9200_clk_usb(hw);
- struct clk *parent = __clk_get_parent(hw->clk);
+ struct clk_core *parent = __clk_get_parent(hw->clk);
unsigned long bestrate = 0;
int bestdiff = -1;
unsigned long tmprate;
@@ -305,12 +305,12 @@ static const struct clk_ops at91rm9200_usb_ops = {
.set_rate = at91rm9200_clk_usb_set_rate,
};
-static struct clk * __init
+static struct clk_core * __init
at91rm9200_clk_register_usb(struct at91_pmc *pmc, const char *name,
const char *parent_name, const u32 *divisors)
{
struct at91rm9200_clk_usb *usb;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
usb = kzalloc(sizeof(*usb), GFP_KERNEL);
@@ -337,7 +337,7 @@ at91rm9200_clk_register_usb(struct at91_pmc *pmc, const char *name,
void __init of_at91sam9x5_clk_usb_setup(struct device_node *np,
struct at91_pmc *pmc)
{
- struct clk *clk;
+ struct clk_core *clk;
int i;
int num_parents;
const char *parent_names[USB_SOURCE_MAX];
@@ -365,7 +365,7 @@ void __init of_at91sam9x5_clk_usb_setup(struct device_node *np,
void __init of_at91sam9n12_clk_usb_setup(struct device_node *np,
struct at91_pmc *pmc)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name;
const char *name = np->name;
@@ -385,7 +385,7 @@ void __init of_at91sam9n12_clk_usb_setup(struct device_node *np,
void __init of_at91rm9200_clk_usb_setup(struct device_node *np,
struct at91_pmc *pmc)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name;
const char *name = np->name;
u32 divisors[4] = {0, 0, 0, 0};
diff --git a/drivers/clk/at91/clk-utmi.c b/drivers/clk/at91/clk-utmi.c
index ae3263b..0502050 100644
--- a/drivers/clk/at91/clk-utmi.c
+++ b/drivers/clk/at91/clk-utmi.c
@@ -92,13 +92,13 @@ static const struct clk_ops utmi_ops = {
.recalc_rate = clk_utmi_recalc_rate,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_utmi(struct at91_pmc *pmc, unsigned int irq,
const char *name, const char *parent_name)
{
int ret;
struct clk_utmi *utmi;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
utmi = kzalloc(sizeof(*utmi), GFP_KERNEL);
@@ -132,7 +132,7 @@ static void __init
of_at91_clk_utmi_setup(struct device_node *np, struct at91_pmc *pmc)
{
unsigned int irq;
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name;
const char *name = np->name;
diff --git a/drivers/clk/bcm/clk-kona-setup.c b/drivers/clk/bcm/clk-kona-setup.c
index e5aeded..122e7b0 100644
--- a/drivers/clk/bcm/clk-kona-setup.c
+++ b/drivers/clk/bcm/clk-kona-setup.c
@@ -697,7 +697,7 @@ static void bcm_clk_teardown(struct kona_clk *bcm_clk)
bcm_clk->type = bcm_clk_none;
}
-static void kona_clk_teardown(struct clk *clk)
+static void kona_clk_teardown(struct clk_core *clk)
{
struct clk_hw *hw;
struct kona_clk *bcm_clk;
@@ -716,10 +716,10 @@ static void kona_clk_teardown(struct clk *clk)
bcm_clk_teardown(bcm_clk);
}
-struct clk *kona_clk_setup(struct kona_clk *bcm_clk)
+struct clk_core *kona_clk_setup(struct kona_clk *bcm_clk)
{
struct clk_init_data *init_data = &bcm_clk->init_data;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
switch (bcm_clk->type) {
case bcm_clk_peri:
diff --git a/drivers/clk/bcm/clk-kona.c b/drivers/clk/bcm/clk-kona.c
index 95af2e6..a301aa9 100644
--- a/drivers/clk/bcm/clk-kona.c
+++ b/drivers/clk/bcm/clk-kona.c
@@ -1032,11 +1032,11 @@ static long kona_peri_clk_round_rate(struct clk_hw *hw, unsigned long rate,
}
static long kona_peri_clk_determine_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long *best_parent_rate, struct clk **best_parent)
+ unsigned long *best_parent_rate, struct clk_core **best_parent)
{
struct kona_clk *bcm_clk = to_kona_clk(hw);
- struct clk *clk = hw->clk;
- struct clk *current_parent;
+ struct clk_core *clk = hw->clk;
+ struct clk_core *current_parent;
unsigned long parent_rate;
unsigned long best_delta;
unsigned long best_rate;
@@ -1053,14 +1053,14 @@ static long kona_peri_clk_determine_rate(struct clk_hw *hw, unsigned long rate,
return kona_peri_clk_round_rate(hw, rate, best_parent_rate);
/* Unless we can do better, stick with current parent */
- current_parent = clk_get_parent(clk);
+ current_parent = clk_provider_get_parent(clk);
parent_rate = __clk_get_rate(current_parent);
best_rate = kona_peri_clk_round_rate(hw, rate, &parent_rate);
best_delta = abs(best_rate - rate);
/* Check whether any other parent clock can produce a better result */
for (which = 0; which < parent_count; which++) {
- struct clk *parent = clk_get_parent_by_index(clk, which);
+ struct clk_core *parent = clk_get_parent_by_index(clk, which);
unsigned long delta;
unsigned long other_rate;
@@ -1260,7 +1260,7 @@ bool __init kona_ccu_init(struct ccu_data *ccu)
{
unsigned long flags;
unsigned int which;
- struct clk **clks = ccu->clk_data.clks;
+ struct clk_core **clks = ccu->clk_data.clks;
bool success = true;
flags = ccu_lock(ccu);
diff --git a/drivers/clk/bcm/clk-kona.h b/drivers/clk/bcm/clk-kona.h
index 2537b30..c2d0152 100644
--- a/drivers/clk/bcm/clk-kona.h
+++ b/drivers/clk/bcm/clk-kona.h
@@ -508,7 +508,7 @@ extern u64 scaled_div_max(struct bcm_clk_div *div);
extern u64 scaled_div_build(struct bcm_clk_div *div, u32 div_value,
u32 billionths);
-extern struct clk *kona_clk_setup(struct kona_clk *bcm_clk);
+extern struct clk_core *kona_clk_setup(struct kona_clk *bcm_clk);
extern void __init kona_dt_ccu_setup(struct ccu_data *ccu,
struct device_node *node);
extern bool __init kona_ccu_init(struct ccu_data *ccu);
diff --git a/drivers/clk/berlin/berlin2-avpll.c b/drivers/clk/berlin/berlin2-avpll.c
index fd0f26c..488d986 100644
--- a/drivers/clk/berlin/berlin2-avpll.c
+++ b/drivers/clk/berlin/berlin2-avpll.c
@@ -188,7 +188,7 @@ static const struct clk_ops berlin2_avpll_vco_ops = {
.recalc_rate = berlin2_avpll_vco_recalc_rate,
};
-struct clk * __init berlin2_avpll_vco_register(void __iomem *base,
+struct clk_core * __init berlin2_avpll_vco_register(void __iomem *base,
const char *name, const char *parent_name,
u8 vco_flags, unsigned long flags)
{
@@ -364,7 +364,7 @@ static const struct clk_ops berlin2_avpll_channel_ops = {
*/
static const u8 quirk_index[] __initconst = { 0, 6, 5, 4, 3, 2, 1, 7 };
-struct clk * __init berlin2_avpll_channel_register(void __iomem *base,
+struct clk_core * __init berlin2_avpll_channel_register(void __iomem *base,
const char *name, u8 index, const char *parent_name,
u8 ch_flags, unsigned long flags)
{
diff --git a/drivers/clk/berlin/berlin2-avpll.h b/drivers/clk/berlin/berlin2-avpll.h
index a37f506..216eee7 100644
--- a/drivers/clk/berlin/berlin2-avpll.h
+++ b/drivers/clk/berlin/berlin2-avpll.h
@@ -24,11 +24,11 @@ struct clk;
#define BERLIN2_AVPLL_BIT_QUIRK BIT(0)
#define BERLIN2_AVPLL_SCRAMBLE_QUIRK BIT(1)
-struct clk * __init
+struct clk_core * __init
berlin2_avpll_vco_register(void __iomem *base, const char *name,
const char *parent_name, u8 vco_flags, unsigned long flags);
-struct clk * __init
+struct clk_core * __init
berlin2_avpll_channel_register(void __iomem *base, const char *name,
u8 index, const char *parent_name, u8 ch_flags,
unsigned long flags);
diff --git a/drivers/clk/berlin/berlin2-div.c b/drivers/clk/berlin/berlin2-div.c
index 81ff97f..c673082 100644
--- a/drivers/clk/berlin/berlin2-div.c
+++ b/drivers/clk/berlin/berlin2-div.c
@@ -234,7 +234,7 @@ static const struct clk_ops berlin2_div_mux_ops = {
.get_parent = berlin2_div_get_parent,
};
-struct clk * __init
+struct clk_core * __init
berlin2_div_register(const struct berlin2_div_map *map,
void __iomem *base, const char *name, u8 div_flags,
const char **parent_names, int num_parents,
diff --git a/drivers/clk/berlin/berlin2-div.h b/drivers/clk/berlin/berlin2-div.h
index 15e3384..3ddb87a 100644
--- a/drivers/clk/berlin/berlin2-div.h
+++ b/drivers/clk/berlin/berlin2-div.h
@@ -80,7 +80,7 @@ struct berlin2_div_data {
u8 div_flags;
};
-struct clk * __init
+struct clk_core * __init
berlin2_div_register(const struct berlin2_div_map *map,
void __iomem *base, const char *name, u8 div_flags,
const char **parent_names, int num_parents,
diff --git a/drivers/clk/berlin/berlin2-pll.c b/drivers/clk/berlin/berlin2-pll.c
index bdc506b..b7a3016 100644
--- a/drivers/clk/berlin/berlin2-pll.c
+++ b/drivers/clk/berlin/berlin2-pll.c
@@ -91,7 +91,7 @@ static const struct clk_ops berlin2_pll_ops = {
.recalc_rate = berlin2_pll_recalc_rate,
};
-struct clk * __init
+struct clk_core * __init
berlin2_pll_register(const struct berlin2_pll_map *map,
void __iomem *base, const char *name,
const char *parent_name, unsigned long flags)
diff --git a/drivers/clk/berlin/berlin2-pll.h b/drivers/clk/berlin/berlin2-pll.h
index 8831ce2..6b6a6ed 100644
--- a/drivers/clk/berlin/berlin2-pll.h
+++ b/drivers/clk/berlin/berlin2-pll.h
@@ -29,7 +29,7 @@ struct berlin2_pll_map {
u8 divsel_shift;
};
-struct clk * __init
+struct clk_core * __init
berlin2_pll_register(const struct berlin2_pll_map *map,
void __iomem *base, const char *name,
const char *parent_name, unsigned long flags);
diff --git a/drivers/clk/berlin/bg2.c b/drivers/clk/berlin/bg2.c
index 4c81e09..49ecb3e 100644
--- a/drivers/clk/berlin/bg2.c
+++ b/drivers/clk/berlin/bg2.c
@@ -17,7 +17,6 @@
* this program. If not, see <http://www.gnu.org/licenses/>.
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/kernel.h>
@@ -93,7 +92,7 @@
*/
#define MAX_CLKS 41
-static struct clk *clks[MAX_CLKS];
+static struct clk_core *clks[MAX_CLKS];
static struct clk_onecell_data clk_data;
static DEFINE_SPINLOCK(lock);
static void __iomem *gbase;
@@ -504,7 +503,7 @@ static const struct berlin2_gate_data bg2_gates[] __initconst = {
static void __init berlin2_clock_setup(struct device_node *np)
{
const char *parent_names[9];
- struct clk *clk;
+ struct clk_core *clk;
u8 avpll_flags = 0;
int n;
@@ -513,16 +512,16 @@ static void __init berlin2_clock_setup(struct device_node *np)
return;
/* overwrite default clock names with DT provided ones */
- clk = of_clk_get_by_name(np, clk_names[REFCLK]);
+ clk = of_clk_provider_get_by_name(np, clk_names[REFCLK]);
if (!IS_ERR(clk)) {
clk_names[REFCLK] = __clk_get_name(clk);
- clk_put(clk);
+ __clk_put(clk);
}
- clk = of_clk_get_by_name(np, clk_names[VIDEO_EXT0]);
+ clk = of_clk_provider_get_by_name(np, clk_names[VIDEO_EXT0]);
if (!IS_ERR(clk)) {
clk_names[VIDEO_EXT0] = __clk_get_name(clk);
- clk_put(clk);
+ __clk_put(clk);
}
/* simple register PLLs */
diff --git a/drivers/clk/berlin/bg2q.c b/drivers/clk/berlin/bg2q.c
index 748da9b..33cc08b 100644
--- a/drivers/clk/berlin/bg2q.c
+++ b/drivers/clk/berlin/bg2q.c
@@ -17,7 +17,6 @@
* this program. If not, see <http://www.gnu.org/licenses/>.
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/kernel.h>
@@ -47,7 +46,7 @@
#define REG_SDIO1XIN_CLKCTL 0x015c
#define MAX_CLKS 27
-static struct clk *clks[MAX_CLKS];
+static struct clk_core *clks[MAX_CLKS];
static struct clk_onecell_data clk_data;
static DEFINE_SPINLOCK(lock);
static void __iomem *gbase;
@@ -293,7 +292,7 @@ static const struct berlin2_gate_data bg2q_gates[] __initconst = {
static void __init berlin2q_clock_setup(struct device_node *np)
{
const char *parent_names[9];
- struct clk *clk;
+ struct clk_core *clk;
int n;
gbase = of_iomap(np, 0);
@@ -311,10 +310,10 @@ static void __init berlin2q_clock_setup(struct device_node *np)
}
/* overwrite default clock names with DT provided ones */
- clk = of_clk_get_by_name(np, clk_names[REFCLK]);
+ clk = of_clk_provider_get_by_name(np, clk_names[REFCLK]);
if (!IS_ERR(clk)) {
clk_names[REFCLK] = __clk_get_name(clk);
- clk_put(clk);
+ __clk_put(clk);
}
/* simple register PLLs */
diff --git a/drivers/clk/clk-axi-clkgen.c b/drivers/clk/clk-axi-clkgen.c
index 1127ee4..d91550c 100644
--- a/drivers/clk/clk-axi-clkgen.c
+++ b/drivers/clk/clk-axi-clkgen.c
@@ -10,7 +10,6 @@
#include <linux/platform_device.h>
#include <linux/clk-provider.h>
-#include <linux/clk.h>
#include <linux/slab.h>
#include <linux/io.h>
#include <linux/of.h>
@@ -489,7 +488,7 @@ static int axi_clkgen_probe(struct platform_device *pdev)
const char *parent_name;
const char *clk_name;
struct resource *mem;
- struct clk *clk;
+ struct clk_core *clk;
if (!pdev->dev.of_node)
return -ENODEV;
diff --git a/drivers/clk/clk-axm5516.c b/drivers/clk/clk-axm5516.c
index d2f1e11..3dc6e58 100644
--- a/drivers/clk/clk-axm5516.c
+++ b/drivers/clk/clk-axm5516.c
@@ -532,7 +532,7 @@ MODULE_DEVICE_TABLE(of, axmclk_match_table);
struct axmclk_priv {
struct clk_onecell_data onecell;
- struct clk *clks[];
+ struct clk_core *clks[];
};
static int axmclk_probe(struct platform_device *pdev)
@@ -541,7 +541,7 @@ static int axmclk_probe(struct platform_device *pdev)
struct resource *res;
int i, ret;
struct device *dev = &pdev->dev;
- struct clk *clk;
+ struct clk_core *clk;
struct regmap *regmap;
size_t num_clks;
struct axmclk_priv *priv;
diff --git a/drivers/clk/clk-bcm2835.c b/drivers/clk/clk-bcm2835.c
index 6b950ca..f25e85e 100644
--- a/drivers/clk/clk-bcm2835.c
+++ b/drivers/clk/clk-bcm2835.c
@@ -29,7 +29,7 @@
*/
void __init bcm2835_init_clocks(void)
{
- struct clk *clk;
+ struct clk_core *clk;
int ret;
clk = clk_register_fixed_rate(NULL, "sys_pclk", NULL, CLK_IS_ROOT,
diff --git a/drivers/clk/clk-clps711x.c b/drivers/clk/clk-clps711x.c
index 715eec1..6aa64bb 100644
--- a/drivers/clk/clk-clps711x.c
+++ b/drivers/clk/clk-clps711x.c
@@ -9,7 +9,6 @@
* (at your option) any later version.
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/io.h>
@@ -43,7 +42,7 @@ static const struct clk_div_table timer_div_table[] = {
struct clps711x_clk {
struct clk_onecell_data clk_data;
spinlock_t lock;
- struct clk *clks[CLPS711X_CLK_MAX];
+ struct clk_core *clks[CLPS711X_CLK_MAX];
};
static struct clps711x_clk * __init _clps711x_clk_init(void __iomem *base,
diff --git a/drivers/clk/clk-composite.c b/drivers/clk/clk-composite.c
index b9355da..d7322fa 100644
--- a/drivers/clk/clk-composite.c
+++ b/drivers/clk/clk-composite.c
@@ -14,7 +14,6 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/err.h>
#include <linux/slab.h>
@@ -57,14 +56,14 @@ static unsigned long clk_composite_recalc_rate(struct clk_hw *hw,
static long clk_composite_determine_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *best_parent_rate,
- struct clk **best_parent_p)
+ struct clk_core **best_parent_p)
{
struct clk_composite *composite = to_clk_composite(hw);
const struct clk_ops *rate_ops = composite->rate_ops;
const struct clk_ops *mux_ops = composite->mux_ops;
struct clk_hw *rate_hw = composite->rate_hw;
struct clk_hw *mux_hw = composite->mux_hw;
- struct clk *parent;
+ struct clk_core *parent;
unsigned long parent_rate;
long tmp_rate, best_rate = 0;
unsigned long rate_diff;
@@ -80,7 +79,7 @@ static long clk_composite_determine_rate(struct clk_hw *hw, unsigned long rate,
*best_parent_p = NULL;
if (__clk_get_flags(hw->clk) & CLK_SET_RATE_NO_REPARENT) {
- *best_parent_p = clk_get_parent(mux_hw->clk);
+ *best_parent_p = clk_provider_get_parent(mux_hw->clk);
*best_parent_rate = __clk_get_rate(*best_parent_p);
return rate_ops->round_rate(rate_hw, rate,
@@ -181,14 +180,14 @@ static void clk_composite_disable(struct clk_hw *hw)
gate_ops->disable(gate_hw);
}
-struct clk *clk_register_composite(struct device *dev, const char *name,
+struct clk_core *clk_register_composite(struct device *dev, const char *name,
const char **parent_names, int num_parents,
struct clk_hw *mux_hw, const struct clk_ops *mux_ops,
struct clk_hw *rate_hw, const struct clk_ops *rate_ops,
struct clk_hw *gate_hw, const struct clk_ops *gate_ops,
unsigned long flags)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
struct clk_composite *composite;
struct clk_ops *clk_composite_ops;
diff --git a/drivers/clk/clk-conf.c b/drivers/clk/clk-conf.c
index d36a7b3..c9231cd 100644
--- a/drivers/clk/clk-conf.c
+++ b/drivers/clk/clk-conf.c
@@ -7,7 +7,6 @@
* published by the Free Software Foundation.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/clk/clk-conf.h>
@@ -20,7 +19,7 @@ static int __set_clk_parents(struct device_node *node, bool clk_supplier)
{
struct of_phandle_args clkspec;
int index, rc, num_parents;
- struct clk *clk, *pclk;
+ struct clk_core *clk, *pclk;
num_parents = of_count_phandle_with_args(node, "assigned-clock-parents",
"#clock-cells");
@@ -63,16 +62,16 @@ static int __set_clk_parents(struct device_node *node, bool clk_supplier)
goto err;
}
- rc = clk_set_parent(clk, pclk);
+ rc = clk_provider_set_parent(clk, pclk);
if (rc < 0)
pr_err("clk: failed to reparent %s to %s: %d\n",
__clk_get_name(clk), __clk_get_name(pclk), rc);
- clk_put(clk);
- clk_put(pclk);
+ __clk_put(clk);
+ __clk_put(pclk);
}
return 0;
err:
- clk_put(pclk);
+ __clk_put(pclk);
return rc;
}
@@ -82,7 +81,7 @@ static int __set_clk_rates(struct device_node *node, bool clk_supplier)
struct property *prop;
const __be32 *cur;
int rc, index = 0;
- struct clk *clk;
+ struct clk_core *clk;
u32 rate;
of_property_for_each_u32(node, "assigned-clock-rates", prop, cur, rate) {
@@ -106,11 +105,11 @@ static int __set_clk_rates(struct device_node *node, bool clk_supplier)
return PTR_ERR(clk);
}
- rc = clk_set_rate(clk, rate);
+ rc = clk_provider_set_rate(clk, rate);
if (rc < 0)
pr_err("clk: couldn't set %s clock rate: %d\n",
__clk_get_name(clk), rc);
- clk_put(clk);
+ __clk_put(clk);
}
index++;
}
diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
index 18a9de2..3c78139 100644
--- a/drivers/clk/clk-divider.c
+++ b/drivers/clk/clk-divider.c
@@ -366,14 +366,14 @@ const struct clk_ops clk_divider_ro_ops = {
};
EXPORT_SYMBOL_GPL(clk_divider_ro_ops);
-static struct clk *_register_divider(struct device *dev, const char *name,
+static struct clk_core *_register_divider(struct device *dev, const char *name,
const char *parent_name, unsigned long flags,
void __iomem *reg, u8 shift, u8 width,
u8 clk_divider_flags, const struct clk_div_table *table,
spinlock_t *lock)
{
struct clk_divider *div;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
if (clk_divider_flags & CLK_DIVIDER_HIWORD_MASK) {
@@ -429,7 +429,7 @@ static struct clk *_register_divider(struct device *dev, const char *name,
* @clk_divider_flags: divider-specific flags for this clock
* @lock: shared register lock for this clock
*/
-struct clk *clk_register_divider(struct device *dev, const char *name,
+struct clk_core *clk_register_divider(struct device *dev, const char *name,
const char *parent_name, unsigned long flags,
void __iomem *reg, u8 shift, u8 width,
u8 clk_divider_flags, spinlock_t *lock)
@@ -453,7 +453,7 @@ EXPORT_SYMBOL_GPL(clk_register_divider);
* @table: array of divider/value pairs ending with a div set to 0
* @lock: shared register lock for this clock
*/
-struct clk *clk_register_divider_table(struct device *dev, const char *name,
+struct clk_core *clk_register_divider_table(struct device *dev, const char *name,
const char *parent_name, unsigned long flags,
void __iomem *reg, u8 shift, u8 width,
u8 clk_divider_flags, const struct clk_div_table *table,
diff --git a/drivers/clk/clk-efm32gg.c b/drivers/clk/clk-efm32gg.c
index bac2ddf..3240887 100644
--- a/drivers/clk/clk-efm32gg.c
+++ b/drivers/clk/clk-efm32gg.c
@@ -6,7 +6,6 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
-#include <linux/clk.h>
#include <linux/io.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
@@ -16,7 +15,7 @@
#define CMU_HFPERCLKEN0 0x44
-static struct clk *clk[37];
+static struct clk_core *clk[37];
static struct clk_onecell_data clk_data = {
.clks = clk,
.clk_num = ARRAY_SIZE(clk),
diff --git a/drivers/clk/clk-fixed-factor.c b/drivers/clk/clk-fixed-factor.c
index d9e3f67..ae1fef0 100644
--- a/drivers/clk/clk-fixed-factor.c
+++ b/drivers/clk/clk-fixed-factor.c
@@ -65,13 +65,13 @@ struct clk_ops clk_fixed_factor_ops = {
};
EXPORT_SYMBOL_GPL(clk_fixed_factor_ops);
-struct clk *clk_register_fixed_factor(struct device *dev, const char *name,
+struct clk_core *clk_register_fixed_factor(struct device *dev, const char *name,
const char *parent_name, unsigned long flags,
unsigned int mult, unsigned int div)
{
struct clk_fixed_factor *fix;
struct clk_init_data init;
- struct clk *clk;
+ struct clk_core *clk;
fix = kmalloc(sizeof(*fix), GFP_KERNEL);
if (!fix) {
@@ -105,7 +105,7 @@ EXPORT_SYMBOL_GPL(clk_register_fixed_factor);
*/
void __init of_fixed_factor_clk_setup(struct device_node *node)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name = node->name;
const char *parent_name;
u32 div, mult;
diff --git a/drivers/clk/clk-fixed-rate.c b/drivers/clk/clk-fixed-rate.c
index 0fc56ab..56c0ced 100644
--- a/drivers/clk/clk-fixed-rate.c
+++ b/drivers/clk/clk-fixed-rate.c
@@ -56,12 +56,12 @@ EXPORT_SYMBOL_GPL(clk_fixed_rate_ops);
* @fixed_rate: non-adjustable clock rate
* @fixed_accuracy: non-adjustable clock rate
*/
-struct clk *clk_register_fixed_rate_with_accuracy(struct device *dev,
+struct clk_core *clk_register_fixed_rate_with_accuracy(struct device *dev,
const char *name, const char *parent_name, unsigned long flags,
unsigned long fixed_rate, unsigned long fixed_accuracy)
{
struct clk_fixed_rate *fixed;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
/* allocate fixed-rate clock */
@@ -99,7 +99,7 @@ EXPORT_SYMBOL_GPL(clk_register_fixed_rate_with_accuracy);
* @flags: framework-specific flags
* @fixed_rate: non-adjustable clock rate
*/
-struct clk *clk_register_fixed_rate(struct device *dev, const char *name,
+struct clk_core *clk_register_fixed_rate(struct device *dev, const char *name,
const char *parent_name, unsigned long flags,
unsigned long fixed_rate)
{
@@ -114,7 +114,7 @@ EXPORT_SYMBOL_GPL(clk_register_fixed_rate);
*/
void of_fixed_clk_setup(struct device_node *node)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name = node->name;
u32 rate;
u32 accuracy = 0;
diff --git a/drivers/clk/clk-fractional-divider.c b/drivers/clk/clk-fractional-divider.c
index ede685c..8104683 100644
--- a/drivers/clk/clk-fractional-divider.c
+++ b/drivers/clk/clk-fractional-divider.c
@@ -96,14 +96,14 @@ const struct clk_ops clk_fractional_divider_ops = {
};
EXPORT_SYMBOL_GPL(clk_fractional_divider_ops);
-struct clk *clk_register_fractional_divider(struct device *dev,
+struct clk_core *clk_register_fractional_divider(struct device *dev,
const char *name, const char *parent_name, unsigned long flags,
void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nwidth,
u8 clk_divider_flags, spinlock_t *lock)
{
struct clk_fractional_divider *fd;
struct clk_init_data init;
- struct clk *clk;
+ struct clk_core *clk;
fd = kzalloc(sizeof(*fd), GFP_KERNEL);
if (!fd) {
diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c
index 4a58c55..429d302 100644
--- a/drivers/clk/clk-gate.c
+++ b/drivers/clk/clk-gate.c
@@ -118,13 +118,13 @@ EXPORT_SYMBOL_GPL(clk_gate_ops);
* @clk_gate_flags: gate-specific flags for this clock
* @lock: shared register lock for this clock
*/
-struct clk *clk_register_gate(struct device *dev, const char *name,
+struct clk_core *clk_register_gate(struct device *dev, const char *name,
const char *parent_name, unsigned long flags,
void __iomem *reg, u8 bit_idx,
u8 clk_gate_flags, spinlock_t *lock)
{
struct clk_gate *gate;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
if (clk_gate_flags & CLK_GATE_HIWORD_MASK) {
diff --git a/drivers/clk/clk-highbank.c b/drivers/clk/clk-highbank.c
index 2e7e9d9..cad2fba 100644
--- a/drivers/clk/clk-highbank.c
+++ b/drivers/clk/clk-highbank.c
@@ -271,10 +271,10 @@ static const struct clk_ops periclk_ops = {
.set_rate = clk_periclk_set_rate,
};
-static __init struct clk *hb_clk_init(struct device_node *node, const struct clk_ops *ops)
+static __init struct clk_core *hb_clk_init(struct device_node *node, const struct clk_ops *ops)
{
u32 reg;
- struct clk *clk;
+ struct clk_core *clk;
struct hb_clk *hb_clk;
const char *clk_name = node->name;
const char *parent_name;
@@ -330,8 +330,8 @@ CLK_OF_DECLARE(hb_a9periph, "calxeda,hb-a9periph-clock", hb_a9periph_init);
static void __init hb_a9bus_init(struct device_node *node)
{
- struct clk *clk = hb_clk_init(node, &a9bclk_ops);
- clk_prepare_enable(clk);
+ struct clk_core *clk = hb_clk_init(node, &a9bclk_ops);
+ clk_provider_prepare_enable(clk);
}
CLK_OF_DECLARE(hb_a9bus, "calxeda,hb-a9bus-clock", hb_a9bus_init);
diff --git a/drivers/clk/clk-ls1x.c b/drivers/clk/clk-ls1x.c
index f20b750..796043c 100644
--- a/drivers/clk/clk-ls1x.c
+++ b/drivers/clk/clk-ls1x.c
@@ -48,11 +48,11 @@ static const struct clk_ops ls1x_pll_clk_ops = {
.recalc_rate = ls1x_pll_recalc_rate,
};
-static struct clk * __init clk_register_pll(struct device *dev,
+static struct clk_core * __init clk_register_pll(struct device *dev,
const char *name, const char *parent_name, unsigned long flags)
{
struct clk_hw *hw;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
/* allocate the divider */
@@ -80,32 +80,32 @@ static struct clk * __init clk_register_pll(struct device *dev,
void __init ls1x_clk_init(void)
{
- struct clk *clk;
+ struct clk_core *clk;
clk = clk_register_pll(NULL, "pll_clk", NULL, CLK_IS_ROOT);
- clk_prepare_enable(clk);
+ clk_provider_prepare_enable(clk);
clk = clk_register_divider(NULL, "cpu_clk", "pll_clk",
CLK_SET_RATE_PARENT, LS1X_CLK_PLL_DIV, DIV_CPU_SHIFT,
DIV_CPU_WIDTH, CLK_DIVIDER_ONE_BASED, &_lock);
- clk_prepare_enable(clk);
+ clk_provider_prepare_enable(clk);
clk_register_clkdev(clk, "cpu", NULL);
clk = clk_register_divider(NULL, "dc_clk", "pll_clk",
CLK_SET_RATE_PARENT, LS1X_CLK_PLL_DIV, DIV_DC_SHIFT,
DIV_DC_WIDTH, CLK_DIVIDER_ONE_BASED, &_lock);
- clk_prepare_enable(clk);
+ clk_provider_prepare_enable(clk);
clk_register_clkdev(clk, "dc", NULL);
clk = clk_register_divider(NULL, "ahb_clk", "pll_clk",
CLK_SET_RATE_PARENT, LS1X_CLK_PLL_DIV, DIV_DDR_SHIFT,
DIV_DDR_WIDTH, CLK_DIVIDER_ONE_BASED, &_lock);
- clk_prepare_enable(clk);
+ clk_provider_prepare_enable(clk);
clk_register_clkdev(clk, "ahb", NULL);
clk_register_clkdev(clk, "stmmaceth", NULL);
clk = clk_register_fixed_factor(NULL, "apb_clk", "ahb_clk", 0, 1, 2);
- clk_prepare_enable(clk);
+ clk_provider_prepare_enable(clk);
clk_register_clkdev(clk, "apb", NULL);
clk_register_clkdev(clk, "serial8250", NULL);
}
diff --git a/drivers/clk/clk-max77686.c b/drivers/clk/clk-max77686.c
index 3d7e8dd..42fa43a 100644
--- a/drivers/clk/clk-max77686.c
+++ b/drivers/clk/clk-max77686.c
@@ -112,10 +112,10 @@ static struct clk_init_data max77686_clks_init[MAX77686_CLKS_NUM] = {
},
};
-static struct clk *max77686_clk_register(struct device *dev,
+static struct clk_core *max77686_clk_register(struct device *dev,
struct max77686_clk *max77686)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_hw *hw = &max77686->hw;
clk = clk_register(dev, hw);
@@ -138,10 +138,10 @@ static int max77686_clk_probe(struct platform_device *pdev)
{
struct max77686_dev *iodev = dev_get_drvdata(pdev->dev.parent);
struct max77686_clk *max77686_clks[MAX77686_CLKS_NUM];
- struct clk **clocks;
+ struct clk_core **clocks;
int i, ret;
- clocks = devm_kzalloc(&pdev->dev, sizeof(struct clk *)
+ clocks = devm_kzalloc(&pdev->dev, sizeof(struct clk_core *)
* MAX77686_CLKS_NUM, GFP_KERNEL);
if (!clocks)
return -ENOMEM;
@@ -203,7 +203,7 @@ err_clocks:
static int max77686_clk_remove(struct platform_device *pdev)
{
struct max77686_dev *iodev = dev_get_drvdata(pdev->dev.parent);
- struct clk **clocks = platform_get_drvdata(pdev);
+ struct clk_core **clocks = platform_get_drvdata(pdev);
int i;
if (iodev->dev->of_node)
diff --git a/drivers/clk/clk-moxart.c b/drivers/clk/clk-moxart.c
index 30a3b69..c503c09 100644
--- a/drivers/clk/clk-moxart.c
+++ b/drivers/clk/clk-moxart.c
@@ -18,7 +18,7 @@
void __init moxart_of_pll_clk_init(struct device_node *node)
{
static void __iomem *base;
- struct clk *clk, *ref_clk;
+ struct clk_core *clk, *ref_clk;
unsigned int mul;
const char *name = node->name;
const char *parent_name;
@@ -35,7 +35,7 @@ void __init moxart_of_pll_clk_init(struct device_node *node)
mul = readl(base + 0x30) >> 3 & 0x3f;
iounmap(base);
- ref_clk = of_clk_get(node, 0);
+ ref_clk = of_clk_provider_get(node, 0);
if (IS_ERR(ref_clk)) {
pr_err("%s: of_clk_get failed\n", node->full_name);
return;
@@ -56,7 +56,7 @@ CLK_OF_DECLARE(moxart_pll_clock, "moxa,moxart-pll-clock",
void __init moxart_of_apb_clk_init(struct device_node *node)
{
static void __iomem *base;
- struct clk *clk, *pll_clk;
+ struct clk_core *clk, *pll_clk;
unsigned int div, val;
unsigned int div_idx[] = { 2, 3, 4, 6, 8};
const char *name = node->name;
@@ -78,7 +78,7 @@ void __init moxart_of_apb_clk_init(struct device_node *node)
val = 0;
div = div_idx[val] * 2;
- pll_clk = of_clk_get(node, 0);
+ pll_clk = of_clk_provider_get(node, 0);
if (IS_ERR(pll_clk)) {
pr_err("%s: of_clk_get failed\n", node->full_name);
return;
diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c
index 4f96ff3..538c455 100644
--- a/drivers/clk/clk-mux.c
+++ b/drivers/clk/clk-mux.c
@@ -10,7 +10,6 @@
* Simple multiplexer clock implementation
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/module.h>
#include <linux/slab.h>
@@ -113,13 +112,13 @@ const struct clk_ops clk_mux_ro_ops = {
};
EXPORT_SYMBOL_GPL(clk_mux_ro_ops);
-struct clk *clk_register_mux_table(struct device *dev, const char *name,
+struct clk_core *clk_register_mux_table(struct device *dev, const char *name,
const char **parent_names, u8 num_parents, unsigned long flags,
void __iomem *reg, u8 shift, u32 mask,
u8 clk_mux_flags, u32 *table, spinlock_t *lock)
{
struct clk_mux *mux;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
u8 width = 0;
@@ -165,7 +164,7 @@ struct clk *clk_register_mux_table(struct device *dev, const char *name,
}
EXPORT_SYMBOL_GPL(clk_register_mux_table);
-struct clk *clk_register_mux(struct device *dev, const char *name,
+struct clk_core *clk_register_mux(struct device *dev, const char *name,
const char **parent_names, u8 num_parents, unsigned long flags,
void __iomem *reg, u8 shift, u8 width,
u8 clk_mux_flags, spinlock_t *lock)
diff --git a/drivers/clk/clk-nomadik.c b/drivers/clk/clk-nomadik.c
index 05e04ce..91855d3 100644
--- a/drivers/clk/clk-nomadik.c
+++ b/drivers/clk/clk-nomadik.c
@@ -8,7 +8,6 @@
#define pr_fmt(fmt) "Nomadik SRC clocks: " fmt
#include <linux/bitops.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/err.h>
#include <linux/io.h>
@@ -254,11 +253,11 @@ static const struct clk_ops pll_clk_ops = {
.recalc_rate = pll_clk_recalc_rate,
};
-static struct clk * __init
+static struct clk_core * __init
pll_clk_register(struct device *dev, const char *name,
const char *parent_name, u32 id)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_pll *pll;
struct clk_init_data init;
@@ -346,11 +345,11 @@ static const struct clk_ops src_clk_ops = {
.recalc_rate = src_clk_recalc_rate,
};
-static struct clk * __init
+static struct clk_core * __init
src_clk_register(struct device *dev, const char *name,
const char *parent_name, u8 id)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_src *sclk;
struct clk_init_data init;
@@ -510,7 +509,7 @@ module_init(nomadik_src_clk_init_debugfs);
static void __init of_nomadik_pll_setup(struct device_node *np)
{
- struct clk *clk = ERR_PTR(-EINVAL);
+ struct clk_core *clk = ERR_PTR(-EINVAL);
const char *clk_name = np->name;
const char *parent_name;
u32 pll_id;
@@ -533,7 +532,7 @@ CLK_OF_DECLARE(nomadik_pll_clk,
static void __init of_nomadik_hclk_setup(struct device_node *np)
{
- struct clk *clk = ERR_PTR(-EINVAL);
+ struct clk_core *clk = ERR_PTR(-EINVAL);
const char *clk_name = np->name;
const char *parent_name;
@@ -557,7 +556,7 @@ CLK_OF_DECLARE(nomadik_hclk_clk,
static void __init of_nomadik_src_clk_setup(struct device_node *np)
{
- struct clk *clk = ERR_PTR(-EINVAL);
+ struct clk_core *clk = ERR_PTR(-EINVAL);
const char *clk_name = np->name;
const char *parent_name;
u32 clk_id;
diff --git a/drivers/clk/clk-nspire.c b/drivers/clk/clk-nspire.c
index a378db7..e9c43f4 100644
--- a/drivers/clk/clk-nspire.c
+++ b/drivers/clk/clk-nspire.c
@@ -69,7 +69,7 @@ static void __init nspire_ahbdiv_setup(struct device_node *node,
{
u32 val;
void __iomem *io;
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name = node->name;
const char *parent_name;
struct nspire_clk_info info;
@@ -111,7 +111,7 @@ static void __init nspire_clk_setup(struct device_node *node,
{
u32 val;
void __iomem *io;
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name = node->name;
struct nspire_clk_info info;
diff --git a/drivers/clk/clk-palmas.c b/drivers/clk/clk-palmas.c
index 781630e..8febd8c 100644
--- a/drivers/clk/clk-palmas.c
+++ b/drivers/clk/clk-palmas.c
@@ -17,7 +17,6 @@
* General Public License for more details.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/mfd/palmas.h>
@@ -42,7 +41,7 @@ struct palmas_clk32k_desc {
struct palmas_clock_info {
struct device *dev;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_hw hw;
struct palmas *palmas;
struct palmas_clk32k_desc *clk_desc;
@@ -219,7 +218,7 @@ static int palmas_clks_init_configure(struct palmas_clock_info *cinfo)
}
if (cinfo->ext_control_pin) {
- ret = clk_prepare(cinfo->clk);
+ ret = clk_provider_prepare(cinfo->clk);
if (ret < 0) {
dev_err(cinfo->dev, "Clock prep failed, %d\n", ret);
return ret;
@@ -244,7 +243,7 @@ static int palmas_clks_probe(struct platform_device *pdev)
struct palmas_clks_of_match_data *match_data;
const struct of_device_id *match;
struct palmas_clock_info *cinfo;
- struct clk *clk;
+ struct clk_core *clk;
int ret;
match = of_match_device(palmas_clks_of_match, &pdev->dev);
diff --git a/drivers/clk/clk-ppc-corenet.c b/drivers/clk/clk-ppc-corenet.c
index 8e58edf..5619ee9 100644
--- a/drivers/clk/clk-ppc-corenet.c
+++ b/drivers/clk/clk-ppc-corenet.c
@@ -64,7 +64,7 @@ const struct clk_ops cmux_ops = {
static void __init core_mux_init(struct device_node *np)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
struct cmux_clk *cmux_clk;
struct device_node *node;
@@ -150,7 +150,7 @@ static void __init core_pll_init(struct device_node *np)
int i, rc, count;
const char *clk_name, *parent_name;
struct clk_onecell_data *onecell_data;
- struct clk **subclks;
+ struct clk_core **subclks;
void __iomem *base;
base = of_iomap(np, 0);
@@ -184,7 +184,7 @@ static void __init core_pll_init(struct device_node *np)
/* output clock number per PLL */
clocks_per_pll = count;
- subclks = kzalloc(sizeof(struct clk *) * count, GFP_KERNEL);
+ subclks = kzalloc(sizeof(struct clk_core *) * count, GFP_KERNEL);
if (!subclks) {
pr_err("%s: could not allocate subclks\n", __func__);
goto err_map;
@@ -246,7 +246,7 @@ err_map:
static void __init sysclk_init(struct device_node *node)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name = node->name;
struct device_node *np = of_get_parent(node);
u32 rate;
diff --git a/drivers/clk/clk-s2mps11.c b/drivers/clk/clk-s2mps11.c
index b7797fb..17fc7e1 100644
--- a/drivers/clk/clk-s2mps11.c
+++ b/drivers/clk/clk-s2mps11.c
@@ -29,7 +29,7 @@
#define s2mps11_name(a) (a->hw.init->name)
-static struct clk **clk_table;
+static struct clk_core **clk_table;
static struct clk_onecell_data clk_data;
enum {
@@ -43,7 +43,7 @@ struct s2mps11_clk {
struct sec_pmic_dev *iodev;
struct device_node *clk_np;
struct clk_hw hw;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_lookup *lookup;
u32 mask;
unsigned int reg;
@@ -174,7 +174,7 @@ static int s2mps11_clk_probe(struct platform_device *pdev)
s2mps11_clk = s2mps11_clks;
- clk_table = devm_kzalloc(&pdev->dev, sizeof(struct clk *) *
+ clk_table = devm_kzalloc(&pdev->dev, sizeof(struct clk_core *) *
S2MPS11_CLKS_NUM, GFP_KERNEL);
if (!clk_table)
return -ENOMEM;
diff --git a/drivers/clk/clk-si5351.c b/drivers/clk/clk-si5351.c
index 3b2a66f..57c9eb5 100644
--- a/drivers/clk/clk-si5351.c
+++ b/drivers/clk/clk-si5351.c
@@ -56,10 +56,10 @@ struct si5351_driver_data {
struct regmap *regmap;
struct clk_onecell_data onecell;
- struct clk *pxtal;
+ struct clk_core *pxtal;
const char *pxtal_name;
struct clk_hw xtal;
- struct clk *pclkin;
+ struct clk_core *pclkin;
const char *pclkin_name;
struct clk_hw clkin;
@@ -1128,12 +1128,12 @@ static int si5351_dt_parse(struct i2c_client *client,
if (!pdata)
return -ENOMEM;
- pdata->clk_xtal = of_clk_get(np, 0);
+ pdata->clk_xtal = of_clk_provider_get(np, 0);
if (!IS_ERR(pdata->clk_xtal))
- clk_put(pdata->clk_xtal);
- pdata->clk_clkin = of_clk_get(np, 1);
+ __clk_put(pdata->clk_xtal);
+ pdata->clk_clkin = of_clk_provider_get(np, 1);
if (!IS_ERR(pdata->clk_clkin))
- clk_put(pdata->clk_clkin);
+ __clk_put(pdata->clk_clkin);
/*
* property silabs,pll-source : <num src>, [<..>]
@@ -1306,7 +1306,7 @@ static int si5351_i2c_probe(struct i2c_client *client,
struct si5351_platform_data *pdata;
struct si5351_driver_data *drvdata;
struct clk_init_data init;
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_names[4];
u8 num_parents, num_clocks;
int ret, n;
@@ -1545,7 +1545,8 @@ static int si5351_i2c_probe(struct i2c_client *client,
/* set initial clkout rate */
if (pdata->clkout[n].rate != 0) {
int ret;
- ret = clk_set_rate(clk, pdata->clkout[n].rate);
+ ret = clk_provider_set_rate(clk,
+ pdata->clkout[n].rate);
if (ret != 0) {
dev_err(&client->dev, "Cannot set rate : %d\n",
ret);
diff --git a/drivers/clk/clk-si570.c b/drivers/clk/clk-si570.c
index fc167b3..f0eec4e 100644
--- a/drivers/clk/clk-si570.c
+++ b/drivers/clk/clk-si570.c
@@ -407,7 +407,7 @@ static int si570_probe(struct i2c_client *client,
{
struct clk_si570 *data;
struct clk_init_data init;
- struct clk *clk;
+ struct clk_core *clk;
u32 initial_fout, factory_fout, stability;
int err;
enum clk_si570_variant variant = id->driver_data;
@@ -476,7 +476,7 @@ static int si570_probe(struct i2c_client *client,
/* Read the requested initial output frequency from device tree */
if (!of_property_read_u32(client->dev.of_node, "clock-frequency",
&initial_fout)) {
- err = clk_set_rate(clk, initial_fout);
+ err = clk_provider_set_rate(clk, initial_fout);
if (err) {
of_clk_del_provider(client->dev.of_node);
return err;
diff --git a/drivers/clk/clk-twl6040.c b/drivers/clk/clk-twl6040.c
index 1ada79a..d24a8a2 100644
--- a/drivers/clk/clk-twl6040.c
+++ b/drivers/clk/clk-twl6040.c
@@ -20,7 +20,6 @@
*
*/
-#include <linux/clk.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/platform_device.h>
@@ -31,7 +30,7 @@ struct twl6040_clk {
struct twl6040 *twl6040;
struct device *dev;
struct clk_hw mcpdm_fclk;
- struct clk *clk;
+ struct clk_core *clk;
int enabled;
};
diff --git a/drivers/clk/clk-u300.c b/drivers/clk/clk-u300.c
index 406bfc1..392bcbf 100644
--- a/drivers/clk/clk-u300.c
+++ b/drivers/clk/clk-u300.c
@@ -5,7 +5,6 @@
* Author: Linus Walleij <linus.walleij(a)stericsson.com>
* Author: Jonas Aaberg <jonas.aberg(a)stericsson.com>
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/err.h>
#include <linux/io.h>
@@ -688,7 +687,7 @@ static const struct clk_ops syscon_clk_ops = {
.set_rate = syscon_clk_set_rate,
};
-static struct clk * __init
+static struct clk_core * __init
syscon_clk_register(struct device *dev, const char *name,
const char *parent_name, unsigned long flags,
bool hw_ctrld,
@@ -696,7 +695,7 @@ syscon_clk_register(struct device *dev, const char *name,
void __iomem *en_reg, u8 en_bit,
u16 clk_val)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_syscon *sclk;
struct clk_init_data init;
@@ -867,7 +866,7 @@ static struct u300_clock const u300_clk_lookup[] __initconst = {
static void __init of_u300_syscon_clk_init(struct device_node *np)
{
- struct clk *clk = ERR_PTR(-EINVAL);
+ struct clk_core *clk = ERR_PTR(-EINVAL);
const char *clk_name = np->name;
const char *parent_name;
void __iomem *res_reg;
@@ -1110,11 +1109,11 @@ static const struct clk_ops mclk_ops = {
.set_rate = mclk_clk_set_rate,
};
-static struct clk * __init
+static struct clk_core * __init
mclk_clk_register(struct device *dev, const char *name,
const char *parent_name, bool is_mspro)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_mclk *mclk;
struct clk_init_data init;
@@ -1141,7 +1140,7 @@ mclk_clk_register(struct device *dev, const char *name,
static void __init of_u300_syscon_mclk_init(struct device_node *np)
{
- struct clk *clk = ERR_PTR(-EINVAL);
+ struct clk_core *clk = ERR_PTR(-EINVAL);
const char *clk_name = np->name;
const char *parent_name;
diff --git a/drivers/clk/clk-vt8500.c b/drivers/clk/clk-vt8500.c
index 37e9288..e5fb933 100644
--- a/drivers/clk/clk-vt8500.c
+++ b/drivers/clk/clk-vt8500.c
@@ -232,7 +232,7 @@ static const struct clk_ops vt8500_gated_divisor_clk_ops = {
static __init void vtwm_device_clk_init(struct device_node *node)
{
u32 en_reg, div_reg;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_device *dev_clk;
const char *clk_name = node->name;
const char *parent_name;
@@ -650,7 +650,7 @@ static const struct clk_ops vtwm_pll_ops = {
static __init void vtwm_pll_clk_init(struct device_node *node, int pll_type)
{
u32 reg;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_pll *pll_clk;
const char *clk_name = node->name;
const char *parent_name;
diff --git a/drivers/clk/clk-wm831x.c b/drivers/clk/clk-wm831x.c
index b131041..84ce873 100644
--- a/drivers/clk/clk-wm831x.c
+++ b/drivers/clk/clk-wm831x.c
@@ -12,7 +12,6 @@
*
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/delay.h>
#include <linux/module.h>
@@ -25,9 +24,9 @@ struct wm831x_clk {
struct clk_hw xtal_hw;
struct clk_hw fll_hw;
struct clk_hw clkout_hw;
- struct clk *xtal;
- struct clk *fll;
- struct clk *clkout;
+ struct clk_core *xtal;
+ struct clk_core *fll;
+ struct clk_core *clkout;
bool xtal_ena;
};
diff --git a/drivers/clk/clk-xgene.c b/drivers/clk/clk-xgene.c
index dd8a62d..ce3ed34 100644
--- a/drivers/clk/clk-xgene.c
+++ b/drivers/clk/clk-xgene.c
@@ -124,13 +124,13 @@ const struct clk_ops xgene_clk_pll_ops = {
.recalc_rate = xgene_clk_pll_recalc_rate,
};
-static struct clk *xgene_register_clk_pll(struct device *dev,
+static struct clk_core *xgene_register_clk_pll(struct device *dev,
const char *name, const char *parent_name,
unsigned long flags, void __iomem *reg, u32 pll_offset,
u32 type, spinlock_t *lock)
{
struct xgene_clk_pll *apmclk;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
/* allocate the APM clock structure */
@@ -166,7 +166,7 @@ static struct clk *xgene_register_clk_pll(struct device *dev,
static void xgene_pllclk_init(struct device_node *np, enum xgene_pll_type pll_type)
{
const char *clk_name = np->full_name;
- struct clk *clk;
+ struct clk_core *clk;
void *reg;
reg = of_iomap(np, 0);
@@ -395,12 +395,12 @@ const struct clk_ops xgene_clk_ops = {
.round_rate = xgene_clk_round_rate,
};
-static struct clk *xgene_register_clk(struct device *dev,
+static struct clk_core *xgene_register_clk(struct device *dev,
const char *name, const char *parent_name,
struct xgene_dev_parameters *parameters, spinlock_t *lock)
{
struct xgene_clk *apmclk;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
int rc;
@@ -442,7 +442,7 @@ static struct clk *xgene_register_clk(struct device *dev,
static void __init xgene_devclk_init(struct device_node *np)
{
const char *clk_name = np->full_name;
- struct clk *clk;
+ struct clk_core *clk;
struct resource res;
int rc;
struct xgene_dev_parameters parameters;
diff --git a/drivers/clk/clk.h b/drivers/clk/clk.h
index c798138..d278572 100644
--- a/drivers/clk/clk.h
+++ b/drivers/clk/clk.h
@@ -10,8 +10,8 @@
*/
#if defined(CONFIG_OF) && defined(CONFIG_COMMON_CLK)
-struct clk *of_clk_get_by_clkspec(struct of_phandle_args *clkspec);
-struct clk *__of_clk_get_from_provider(struct of_phandle_args *clkspec);
+struct clk_core *of_clk_get_by_clkspec(struct of_phandle_args *clkspec);
+struct clk_core *__of_clk_get_from_provider(struct of_phandle_args *clkspec);
void of_clk_lock(void);
void of_clk_unlock(void);
#endif
diff --git a/drivers/clk/hisilicon/clk-hi3620.c b/drivers/clk/hisilicon/clk-hi3620.c
index 339945d..26f11a3 100644
--- a/drivers/clk/hisilicon/clk-hi3620.c
+++ b/drivers/clk/hisilicon/clk-hi3620.c
@@ -31,7 +31,6 @@
#include <linux/of_address.h>
#include <linux/of_device.h>
#include <linux/slab.h>
-#include <linux/clk.h>
#include <dt-bindings/clock/hi3620-clock.h>
@@ -296,7 +295,7 @@ static unsigned long mmc_clk_recalc_rate(struct clk_hw *hw,
static long mmc_clk_determine_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *best_parent_rate,
- struct clk **best_parent_p)
+ struct clk_core **best_parent_p)
{
struct clk_mmc *mclk = to_mmc(hw);
unsigned long best = 0;
@@ -427,11 +426,11 @@ static struct clk_ops clk_mmc_ops = {
.recalc_rate = mmc_clk_recalc_rate,
};
-static struct clk *hisi_register_clk_mmc(struct hisi_mmc_clock *mmc_clk,
+static struct clk_core *hisi_register_clk_mmc(struct hisi_mmc_clock *mmc_clk,
void __iomem *base, struct device_node *np)
{
struct clk_mmc *mclk;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
mclk = kzalloc(sizeof(*mclk), GFP_KERNEL);
@@ -487,7 +486,7 @@ static void __init hi3620_mmc_clk_init(struct device_node *node)
if (WARN_ON(!clk_data))
return;
- clk_data->clks = kzalloc(sizeof(struct clk *) * num, GFP_KERNEL);
+ clk_data->clks = kzalloc(sizeof(struct clk_core *) * num, GFP_KERNEL);
if (!clk_data->clks) {
pr_err("%s: fail to allocate mmc clk\n", __func__);
return;
diff --git a/drivers/clk/hisilicon/clk-hip04.c b/drivers/clk/hisilicon/clk-hip04.c
index 132b57a..e8403c0 100644
--- a/drivers/clk/hisilicon/clk-hip04.c
+++ b/drivers/clk/hisilicon/clk-hip04.c
@@ -30,7 +30,6 @@
#include <linux/of_address.h>
#include <linux/of_device.h>
#include <linux/slab.h>
-#include <linux/clk.h>
#include <dt-bindings/clock/hip04-clock.h>
diff --git a/drivers/clk/hisilicon/clk.c b/drivers/clk/hisilicon/clk.c
index a078e84..00b7c9c 100644
--- a/drivers/clk/hisilicon/clk.c
+++ b/drivers/clk/hisilicon/clk.c
@@ -32,7 +32,6 @@
#include <linux/of_address.h>
#include <linux/of_device.h>
#include <linux/slab.h>
-#include <linux/clk.h>
#include "clk.h"
@@ -42,7 +41,7 @@ struct hisi_clock_data __init *hisi_clk_init(struct device_node *np,
int nr_clks)
{
struct hisi_clock_data *clk_data;
- struct clk **clk_table;
+ struct clk_core **clk_table;
void __iomem *base;
if (np) {
@@ -63,7 +62,7 @@ struct hisi_clock_data __init *hisi_clk_init(struct device_node *np,
}
clk_data->base = base;
- clk_table = kzalloc(sizeof(struct clk *) * nr_clks, GFP_KERNEL);
+ clk_table = kzalloc(sizeof(struct clk_core *) * nr_clks, GFP_KERNEL);
if (!clk_table) {
pr_err("%s: could not allocate clock lookup table\n", __func__);
goto err_data;
@@ -81,7 +80,7 @@ err:
void __init hisi_clk_register_fixed_rate(struct hisi_fixed_rate_clock *clks,
int nums, struct hisi_clock_data *data)
{
- struct clk *clk;
+ struct clk_core *clk;
int i;
for (i = 0; i < nums; i++) {
@@ -102,7 +101,7 @@ void __init hisi_clk_register_fixed_factor(struct hisi_fixed_factor_clock *clks,
int nums,
struct hisi_clock_data *data)
{
- struct clk *clk;
+ struct clk_core *clk;
int i;
for (i = 0; i < nums; i++) {
@@ -122,7 +121,7 @@ void __init hisi_clk_register_fixed_factor(struct hisi_fixed_factor_clock *clks,
void __init hisi_clk_register_mux(struct hisi_mux_clock *clks,
int nums, struct hisi_clock_data *data)
{
- struct clk *clk;
+ struct clk_core *clk;
void __iomem *base = data->base;
int i;
@@ -151,7 +150,7 @@ void __init hisi_clk_register_mux(struct hisi_mux_clock *clks,
void __init hisi_clk_register_divider(struct hisi_divider_clock *clks,
int nums, struct hisi_clock_data *data)
{
- struct clk *clk;
+ struct clk_core *clk;
void __iomem *base = data->base;
int i;
@@ -180,7 +179,7 @@ void __init hisi_clk_register_divider(struct hisi_divider_clock *clks,
void __init hisi_clk_register_gate(struct hisi_gate_clock *clks,
int nums, struct hisi_clock_data *data)
{
- struct clk *clk;
+ struct clk_core *clk;
void __iomem *base = data->base;
int i;
@@ -208,7 +207,7 @@ void __init hisi_clk_register_gate(struct hisi_gate_clock *clks,
void __init hisi_clk_register_gate_sep(struct hisi_gate_clock *clks,
int nums, struct hisi_clock_data *data)
{
- struct clk *clk;
+ struct clk_core *clk;
void __iomem *base = data->base;
int i;
diff --git a/drivers/clk/hisilicon/clk.h b/drivers/clk/hisilicon/clk.h
index 31083ff..f7fc4b9 100644
--- a/drivers/clk/hisilicon/clk.h
+++ b/drivers/clk/hisilicon/clk.h
@@ -90,7 +90,7 @@ struct hisi_gate_clock {
const char *alias;
};
-struct clk *hisi_register_clkgate_sep(struct device *, const char *,
+struct clk_core *hisi_register_clkgate_sep(struct device *, const char *,
const char *, unsigned long,
void __iomem *, u8,
u8, spinlock_t *);
diff --git a/drivers/clk/hisilicon/clkgate-separated.c b/drivers/clk/hisilicon/clkgate-separated.c
index b03d5a7..5db5ba6 100644
--- a/drivers/clk/hisilicon/clkgate-separated.c
+++ b/drivers/clk/hisilicon/clkgate-separated.c
@@ -28,7 +28,6 @@
#include <linux/clkdev.h>
#include <linux/io.h>
#include <linux/slab.h>
-#include <linux/clk.h>
#include "clk.h"
@@ -96,14 +95,14 @@ static struct clk_ops clkgate_separated_ops = {
.is_enabled = clkgate_separated_is_enabled,
};
-struct clk *hisi_register_clkgate_sep(struct device *dev, const char *name,
+struct clk_core *hisi_register_clkgate_sep(struct device *dev, const char *name,
const char *parent_name,
unsigned long flags,
void __iomem *reg, u8 bit_idx,
u8 clk_gate_flags, spinlock_t *lock)
{
struct clkgate_separated *sclk;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
sclk = kzalloc(sizeof(*sclk), GFP_KERNEL);
diff --git a/drivers/clk/keystone/gate.c b/drivers/clk/keystone/gate.c
index 86f1e36..6bb211a 100644
--- a/drivers/clk/keystone/gate.c
+++ b/drivers/clk/keystone/gate.c
@@ -10,7 +10,6 @@
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/err.h>
#include <linux/io.h>
@@ -163,7 +162,7 @@ static const struct clk_ops clk_psc_ops = {
* @psc_data: platform data to configure this clock
* @lock: spinlock used by this clock
*/
-static struct clk *clk_register_psc(struct device *dev,
+static struct clk_core *clk_register_psc(struct device *dev,
const char *name,
const char *parent_name,
struct clk_psc_data *psc_data,
@@ -171,7 +170,7 @@ static struct clk *clk_register_psc(struct device *dev,
{
struct clk_init_data init;
struct clk_psc *psc;
- struct clk *clk;
+ struct clk_core *clk;
psc = kzalloc(sizeof(*psc), GFP_KERNEL);
if (!psc)
@@ -204,7 +203,7 @@ static void __init of_psc_clk_init(struct device_node *node, spinlock_t *lock)
const char *clk_name = node->name;
const char *parent_name;
struct clk_psc_data *data;
- struct clk *clk;
+ struct clk_core *clk;
int i;
data = kzalloc(sizeof(*data), GFP_KERNEL);
diff --git a/drivers/clk/keystone/pll.c b/drivers/clk/keystone/pll.c
index 0dd8a4b..2e31895 100644
--- a/drivers/clk/keystone/pll.c
+++ b/drivers/clk/keystone/pll.c
@@ -10,7 +10,6 @@
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/err.h>
#include <linux/io.h>
@@ -116,14 +115,14 @@ static const struct clk_ops clk_pll_ops = {
.recalc_rate = clk_pllclk_recalc,
};
-static struct clk *clk_register_pll(struct device *dev,
+static struct clk_core *clk_register_pll(struct device *dev,
const char *name,
const char *parent_name,
struct clk_pll_data *pll_data)
{
struct clk_init_data init;
struct clk_pll *pll;
- struct clk *clk;
+ struct clk_core *clk;
pll = kzalloc(sizeof(*pll), GFP_KERNEL);
if (!pll)
@@ -158,7 +157,7 @@ static void __init _of_pll_clk_init(struct device_node *node, bool pllctrl)
{
struct clk_pll_data *pll_data;
const char *parent_name;
- struct clk *clk;
+ struct clk_core *clk;
int i;
pll_data = kzalloc(sizeof(*pll_data), GFP_KERNEL);
@@ -239,7 +238,7 @@ static void __init of_pll_div_clk_init(struct device_node *node)
const char *parent_name;
void __iomem *reg;
u32 shift, mask;
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name = node->name;
of_property_read_string(node, "clock-output-names", &clk_name);
@@ -282,7 +281,7 @@ static void __init of_pll_mux_clk_init(struct device_node *node)
{
void __iomem *reg;
u32 shift, mask;
- struct clk *clk;
+ struct clk_core *clk;
const char *parents[2];
const char *clk_name = node->name;
diff --git a/drivers/clk/mmp/clk-apbc.c b/drivers/clk/mmp/clk-apbc.c
index d14120e..4a1de49 100644
--- a/drivers/clk/mmp/clk-apbc.c
+++ b/drivers/clk/mmp/clk-apbc.c
@@ -10,7 +10,6 @@
*/
#include <linux/kernel.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include <linux/err.h>
#include <linux/delay.h>
@@ -120,12 +119,12 @@ struct clk_ops clk_apbc_ops = {
.unprepare = clk_apbc_unprepare,
};
-struct clk *mmp_clk_register_apbc(const char *name, const char *parent_name,
+struct clk_core *mmp_clk_register_apbc(const char *name, const char *parent_name,
void __iomem *base, unsigned int delay,
unsigned int apbc_flags, spinlock_t *lock)
{
struct clk_apbc *apbc;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
apbc = kzalloc(sizeof(*apbc), GFP_KERNEL);
diff --git a/drivers/clk/mmp/clk-apmu.c b/drivers/clk/mmp/clk-apmu.c
index abe182b..cbc0712 100644
--- a/drivers/clk/mmp/clk-apmu.c
+++ b/drivers/clk/mmp/clk-apmu.c
@@ -10,7 +10,6 @@
*/
#include <linux/kernel.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include <linux/err.h>
#include <linux/delay.h>
@@ -66,11 +65,11 @@ struct clk_ops clk_apmu_ops = {
.disable = clk_apmu_disable,
};
-struct clk *mmp_clk_register_apmu(const char *name, const char *parent_name,
+struct clk_core *mmp_clk_register_apmu(const char *name, const char *parent_name,
void __iomem *base, u32 enable_mask, spinlock_t *lock)
{
struct clk_apmu *apmu;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
apmu = kzalloc(sizeof(*apmu), GFP_KERNEL);
diff --git a/drivers/clk/mmp/clk-frac.c b/drivers/clk/mmp/clk-frac.c
index 23a56f5..0386cdd 100644
--- a/drivers/clk/mmp/clk-frac.c
+++ b/drivers/clk/mmp/clk-frac.c
@@ -116,14 +116,14 @@ static struct clk_ops clk_factor_ops = {
.set_rate = clk_factor_set_rate,
};
-struct clk *mmp_clk_register_factor(const char *name, const char *parent_name,
+struct clk_core *mmp_clk_register_factor(const char *name, const char *parent_name,
unsigned long flags, void __iomem *base,
struct clk_factor_masks *masks, struct clk_factor_tbl *ftbl,
unsigned int ftbl_cnt)
{
struct clk_factor *factor;
struct clk_init_data init;
- struct clk *clk;
+ struct clk_core *clk;
if (!masks) {
pr_err("%s: must pass a clk_factor_mask\n", __func__);
diff --git a/drivers/clk/mmp/clk-mmp2.c b/drivers/clk/mmp/clk-mmp2.c
index b2721ca..98bd73f 100644
--- a/drivers/clk/mmp/clk-mmp2.c
+++ b/drivers/clk/mmp/clk-mmp2.c
@@ -77,8 +77,8 @@ static const char *ccic_parent[] = {"pll1_2", "pll1_16", "vctcxo"};
void __init mmp2_clk_init(void)
{
- struct clk *clk;
- struct clk *vctcxo;
+ struct clk_core *clk;
+ struct clk_core *vctcxo;
void __iomem *mpmu_base;
void __iomem *apmu_base;
void __iomem *apbc_base;
@@ -192,7 +192,7 @@ void __init mmp2_clk_init(void)
mpmu_base + MPMU_UART_PLL,
&uart_factor_masks, uart_factor_tbl,
ARRAY_SIZE(uart_factor_tbl));
- clk_set_rate(clk, 14745600);
+ clk_provider_set_rate(clk, 14745600);
clk_register_clkdev(clk, "uart_pll", NULL);
clk = mmp_clk_register_apbc("twsi0", "vctcxo",
@@ -251,7 +251,7 @@ void __init mmp2_clk_init(void)
ARRAY_SIZE(uart_parent),
CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
apbc_base + APBC_UART0, 4, 3, 0, &clk_lock);
- clk_set_parent(clk, vctcxo);
+ clk_provider_set_parent(clk, vctcxo);
clk_register_clkdev(clk, "uart_mux.0", NULL);
clk = mmp_clk_register_apbc("uart0", "uart0_mux",
@@ -262,7 +262,7 @@ void __init mmp2_clk_init(void)
ARRAY_SIZE(uart_parent),
CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
apbc_base + APBC_UART1, 4, 3, 0, &clk_lock);
- clk_set_parent(clk, vctcxo);
+ clk_provider_set_parent(clk, vctcxo);
clk_register_clkdev(clk, "uart_mux.1", NULL);
clk = mmp_clk_register_apbc("uart1", "uart1_mux",
@@ -273,7 +273,7 @@ void __init mmp2_clk_init(void)
ARRAY_SIZE(uart_parent),
CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
apbc_base + APBC_UART2, 4, 3, 0, &clk_lock);
- clk_set_parent(clk, vctcxo);
+ clk_provider_set_parent(clk, vctcxo);
clk_register_clkdev(clk, "uart_mux.2", NULL);
clk = mmp_clk_register_apbc("uart2", "uart2_mux",
@@ -284,7 +284,7 @@ void __init mmp2_clk_init(void)
ARRAY_SIZE(uart_parent),
CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
apbc_base + APBC_UART3, 4, 3, 0, &clk_lock);
- clk_set_parent(clk, vctcxo);
+ clk_provider_set_parent(clk, vctcxo);
clk_register_clkdev(clk, "uart_mux.3", NULL);
clk = mmp_clk_register_apbc("uart3", "uart3_mux",
diff --git a/drivers/clk/mmp/clk-pxa168.c b/drivers/clk/mmp/clk-pxa168.c
index 014396b..e4f50ab 100644
--- a/drivers/clk/mmp/clk-pxa168.c
+++ b/drivers/clk/mmp/clk-pxa168.c
@@ -68,8 +68,8 @@ static const char *ccic_phy_parent[] = {"pll1_6", "pll1_12"};
void __init pxa168_clk_init(void)
{
- struct clk *clk;
- struct clk *uart_pll;
+ struct clk_core *clk;
+ struct clk_core *uart_pll;
void __iomem *mpmu_base;
void __iomem *apmu_base;
void __iomem *apbc_base;
@@ -159,7 +159,7 @@ void __init pxa168_clk_init(void)
mpmu_base + MPMU_UART_PLL,
&uart_factor_masks, uart_factor_tbl,
ARRAY_SIZE(uart_factor_tbl));
- clk_set_rate(uart_pll, 14745600);
+ clk_provider_set_rate(uart_pll, 14745600);
clk_register_clkdev(uart_pll, "uart_pll", NULL);
clk = mmp_clk_register_apbc("twsi0", "pll1_13_1_5",
@@ -202,7 +202,7 @@ void __init pxa168_clk_init(void)
ARRAY_SIZE(uart_parent),
CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
apbc_base + APBC_UART0, 4, 3, 0, &clk_lock);
- clk_set_parent(clk, uart_pll);
+ clk_provider_set_parent(clk, uart_pll);
clk_register_clkdev(clk, "uart_mux.0", NULL);
clk = mmp_clk_register_apbc("uart0", "uart0_mux",
@@ -213,7 +213,7 @@ void __init pxa168_clk_init(void)
ARRAY_SIZE(uart_parent),
CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
apbc_base + APBC_UART1, 4, 3, 0, &clk_lock);
- clk_set_parent(clk, uart_pll);
+ clk_provider_set_parent(clk, uart_pll);
clk_register_clkdev(clk, "uart_mux.1", NULL);
clk = mmp_clk_register_apbc("uart1", "uart1_mux",
@@ -224,7 +224,7 @@ void __init pxa168_clk_init(void)
ARRAY_SIZE(uart_parent),
CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
apbc_base + APBC_UART2, 4, 3, 0, &clk_lock);
- clk_set_parent(clk, uart_pll);
+ clk_provider_set_parent(clk, uart_pll);
clk_register_clkdev(clk, "uart_mux.2", NULL);
clk = mmp_clk_register_apbc("uart2", "uart2_mux",
diff --git a/drivers/clk/mmp/clk-pxa910.c b/drivers/clk/mmp/clk-pxa910.c
index 9efc6a4..b5c215e 100644
--- a/drivers/clk/mmp/clk-pxa910.c
+++ b/drivers/clk/mmp/clk-pxa910.c
@@ -66,8 +66,8 @@ static const char *ccic_phy_parent[] = {"pll1_6", "pll1_12"};
void __init pxa910_clk_init(void)
{
- struct clk *clk;
- struct clk *uart_pll;
+ struct clk_core *clk;
+ struct clk_core *uart_pll;
void __iomem *mpmu_base;
void __iomem *apmu_base;
void __iomem *apbcp_base;
@@ -164,7 +164,7 @@ void __init pxa910_clk_init(void)
mpmu_base + MPMU_UART_PLL,
&uart_factor_masks, uart_factor_tbl,
ARRAY_SIZE(uart_factor_tbl));
- clk_set_rate(uart_pll, 14745600);
+ clk_provider_set_rate(uart_pll, 14745600);
clk_register_clkdev(uart_pll, "uart_pll", NULL);
clk = mmp_clk_register_apbc("twsi0", "pll1_13_1_5",
@@ -207,7 +207,7 @@ void __init pxa910_clk_init(void)
ARRAY_SIZE(uart_parent),
CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
apbc_base + APBC_UART0, 4, 3, 0, &clk_lock);
- clk_set_parent(clk, uart_pll);
+ clk_provider_set_parent(clk, uart_pll);
clk_register_clkdev(clk, "uart_mux.0", NULL);
clk = mmp_clk_register_apbc("uart0", "uart0_mux",
@@ -218,7 +218,7 @@ void __init pxa910_clk_init(void)
ARRAY_SIZE(uart_parent),
CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
apbc_base + APBC_UART1, 4, 3, 0, &clk_lock);
- clk_set_parent(clk, uart_pll);
+ clk_provider_set_parent(clk, uart_pll);
clk_register_clkdev(clk, "uart_mux.1", NULL);
clk = mmp_clk_register_apbc("uart1", "uart1_mux",
@@ -229,7 +229,7 @@ void __init pxa910_clk_init(void)
ARRAY_SIZE(uart_parent),
CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
apbcp_base + APBCP_UART2, 4, 3, 0, &clk_lock);
- clk_set_parent(clk, uart_pll);
+ clk_provider_set_parent(clk, uart_pll);
clk_register_clkdev(clk, "uart_mux.2", NULL);
clk = mmp_clk_register_apbc("uart2", "uart2_mux",
diff --git a/drivers/clk/mmp/clk.h b/drivers/clk/mmp/clk.h
index ab86dd4..1477e61 100644
--- a/drivers/clk/mmp/clk.h
+++ b/drivers/clk/mmp/clk.h
@@ -20,15 +20,15 @@ struct clk_factor_tbl {
unsigned int den;
};
-extern struct clk *mmp_clk_register_pll2(const char *name,
+extern struct clk_core *mmp_clk_register_pll2(const char *name,
const char *parent_name, unsigned long flags);
-extern struct clk *mmp_clk_register_apbc(const char *name,
+extern struct clk_core *mmp_clk_register_apbc(const char *name,
const char *parent_name, void __iomem *base,
unsigned int delay, unsigned int apbc_flags, spinlock_t *lock);
-extern struct clk *mmp_clk_register_apmu(const char *name,
+extern struct clk_core *mmp_clk_register_apmu(const char *name,
const char *parent_name, void __iomem *base, u32 enable_mask,
spinlock_t *lock);
-extern struct clk *mmp_clk_register_factor(const char *name,
+extern struct clk_core *mmp_clk_register_factor(const char *name,
const char *parent_name, unsigned long flags,
void __iomem *base, struct clk_factor_masks *masks,
struct clk_factor_tbl *ftbl, unsigned int ftbl_cnt);
diff --git a/drivers/clk/mvebu/clk-corediv.c b/drivers/clk/mvebu/clk-corediv.c
index d1e5863..1be15c4 100644
--- a/drivers/clk/mvebu/clk-corediv.c
+++ b/drivers/clk/mvebu/clk-corediv.c
@@ -238,7 +238,7 @@ mvebu_corediv_clk_init(struct device_node *node,
{
struct clk_init_data init;
struct clk_corediv *corediv;
- struct clk **clks;
+ struct clk_core **clks;
void __iomem *base;
const char *parent_name;
const char *clk_name;
@@ -253,7 +253,7 @@ mvebu_corediv_clk_init(struct device_node *node,
clk_data.clk_num = soc_desc->ndescs;
/* clks holds the clock array */
- clks = kcalloc(clk_data.clk_num, sizeof(struct clk *),
+ clks = kcalloc(clk_data.clk_num, sizeof(struct clk_core *),
GFP_KERNEL);
if (WARN_ON(!clks))
goto err_unmap;
diff --git a/drivers/clk/mvebu/clk-cpu.c b/drivers/clk/mvebu/clk-cpu.c
index 3821a88..59a40c7 100644
--- a/drivers/clk/mvebu/clk-cpu.c
+++ b/drivers/clk/mvebu/clk-cpu.c
@@ -40,7 +40,7 @@ struct cpu_clk {
void __iomem *pmu_dfs;
};
-static struct clk **clks;
+static struct clk_core **clks;
static struct clk_onecell_data clk_data;
@@ -195,8 +195,8 @@ static void __init of_cpu_clk_setup(struct device_node *node)
for_each_node_by_type(dn, "cpu") {
struct clk_init_data init;
- struct clk *clk;
- struct clk *parent_clk;
+ struct clk_core *clk;
+ struct clk_core *parent_clk;
char *clk_name = kzalloc(5, GFP_KERNEL);
int cpu, err;
@@ -208,7 +208,7 @@ static void __init of_cpu_clk_setup(struct device_node *node)
goto bail_out;
sprintf(clk_name, "cpu%d", cpu);
- parent_clk = of_clk_get(node, 0);
+ parent_clk = of_clk_provider_get(node, 0);
cpuclk[cpu].parent_name = __clk_get_name(parent_clk);
cpuclk[cpu].clk_name = clk_name;
diff --git a/drivers/clk/mvebu/common.c b/drivers/clk/mvebu/common.c
index 8145c4e..f6e14f8 100644
--- a/drivers/clk/mvebu/common.c
+++ b/drivers/clk/mvebu/common.c
@@ -13,7 +13,6 @@
*/
#include <linux/kernel.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/io.h>
@@ -43,7 +42,7 @@ void __init mvebu_coreclk_setup(struct device_node *np,
/* Allocate struct for TCLK, cpu clk, and core ratio clocks */
clk_data.clk_num = 2 + desc->num_ratios;
- clk_data.clks = kzalloc(clk_data.clk_num * sizeof(struct clk *),
+ clk_data.clks = kzalloc(clk_data.clk_num * sizeof(struct clk_core *),
GFP_KERNEL);
if (WARN_ON(!clk_data.clks)) {
iounmap(base);
@@ -93,13 +92,13 @@ DEFINE_SPINLOCK(ctrl_gating_lock);
struct clk_gating_ctrl {
spinlock_t *lock;
- struct clk **gates;
+ struct clk_core **gates;
int num_gates;
};
#define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw)
-static struct clk *clk_gating_get_src(
+static struct clk_core *clk_gating_get_src(
struct of_phandle_args *clkspec, void *data)
{
struct clk_gating_ctrl *ctrl = (struct clk_gating_ctrl *)data;
@@ -121,7 +120,7 @@ void __init mvebu_clk_gating_setup(struct device_node *np,
const struct clk_gating_soc_desc *desc)
{
struct clk_gating_ctrl *ctrl;
- struct clk *clk;
+ struct clk_core *clk;
void __iomem *base;
const char *default_parent = NULL;
int n;
@@ -130,10 +129,10 @@ void __init mvebu_clk_gating_setup(struct device_node *np,
if (WARN_ON(!base))
return;
- clk = of_clk_get(np, 0);
+ clk = of_clk_provider_get(np, 0);
if (!IS_ERR(clk)) {
default_parent = __clk_get_name(clk);
- clk_put(clk);
+ __clk_put(clk);
}
ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL);
@@ -148,7 +147,7 @@ void __init mvebu_clk_gating_setup(struct device_node *np,
n++;
ctrl->num_gates = n;
- ctrl->gates = kzalloc(ctrl->num_gates * sizeof(struct clk *),
+ ctrl->gates = kzalloc(ctrl->num_gates * sizeof(struct clk_core *),
GFP_KERNEL);
if (WARN_ON(!ctrl->gates))
goto gates_out;
diff --git a/drivers/clk/mvebu/kirkwood.c b/drivers/clk/mvebu/kirkwood.c
index 99550f2..5d0978b 100644
--- a/drivers/clk/mvebu/kirkwood.c
+++ b/drivers/clk/mvebu/kirkwood.c
@@ -242,7 +242,7 @@ struct clk_muxing_soc_desc {
struct clk_muxing_ctrl {
spinlock_t *lock;
- struct clk **muxes;
+ struct clk_core **muxes;
int num_muxes;
};
@@ -258,7 +258,7 @@ static const struct clk_muxing_soc_desc kirkwood_mux_desc[] __initconst = {
#define to_clk_mux(_hw) container_of(_hw, struct clk_mux, hw)
-static struct clk *clk_muxing_get_src(
+static struct clk_core *clk_muxing_get_src(
struct of_phandle_args *clkspec, void *data)
{
struct clk_muxing_ctrl *ctrl = (struct clk_muxing_ctrl *)data;
@@ -299,7 +299,7 @@ static void __init kirkwood_clk_muxing_setup(struct device_node *np,
n++;
ctrl->num_muxes = n;
- ctrl->muxes = kcalloc(ctrl->num_muxes, sizeof(struct clk *),
+ ctrl->muxes = kcalloc(ctrl->num_muxes, sizeof(struct clk_core *),
GFP_KERNEL);
if (WARN_ON(!ctrl->muxes))
goto muxes_out;
diff --git a/drivers/clk/mxs/clk-div.c b/drivers/clk/mxs/clk-div.c
index 90e1da9..73ca1e8 100644
--- a/drivers/clk/mxs/clk-div.c
+++ b/drivers/clk/mxs/clk-div.c
@@ -9,7 +9,6 @@
* http://www.gnu.org/copyleft/gpl.html
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/err.h>
#include <linux/slab.h>
@@ -74,11 +73,11 @@ static struct clk_ops clk_div_ops = {
.set_rate = clk_div_set_rate,
};
-struct clk *mxs_clk_div(const char *name, const char *parent_name,
+struct clk_core *mxs_clk_div(const char *name, const char *parent_name,
void __iomem *reg, u8 shift, u8 width, u8 busy)
{
struct clk_div *div;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
div = kzalloc(sizeof(*div), GFP_KERNEL);
diff --git a/drivers/clk/mxs/clk-frac.c b/drivers/clk/mxs/clk-frac.c
index e6aa6b5..65cedf8 100644
--- a/drivers/clk/mxs/clk-frac.c
+++ b/drivers/clk/mxs/clk-frac.c
@@ -9,7 +9,6 @@
* http://www.gnu.org/copyleft/gpl.html
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/err.h>
#include <linux/io.h>
@@ -108,11 +107,11 @@ static struct clk_ops clk_frac_ops = {
.set_rate = clk_frac_set_rate,
};
-struct clk *mxs_clk_frac(const char *name, const char *parent_name,
+struct clk_core *mxs_clk_frac(const char *name, const char *parent_name,
void __iomem *reg, u8 shift, u8 width, u8 busy)
{
struct clk_frac *frac;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
frac = kzalloc(sizeof(*frac), GFP_KERNEL);
diff --git a/drivers/clk/mxs/clk-imx23.c b/drivers/clk/mxs/clk-imx23.c
index 9fc9359..43f2d31 100644
--- a/drivers/clk/mxs/clk-imx23.c
+++ b/drivers/clk/mxs/clk-imx23.c
@@ -9,7 +9,6 @@
* http://www.gnu.org/copyleft/gpl.html
*/
-#include <linux/clk.h>
#include <linux/clk/mxs.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
@@ -94,7 +93,7 @@ enum imx23_clk {
clk_max
};
-static struct clk *clks[clk_max];
+static struct clk_core *clks[clk_max];
static struct clk_onecell_data clk_data;
static enum imx23_clk clks_init_on[] __initdata = {
@@ -171,7 +170,7 @@ static void __init mx23_clocks_init(struct device_node *np)
of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
- clk_prepare_enable(clks[clks_init_on[i]]);
+ clk_provider_prepare_enable(clks[clks_init_on[i]]);
}
CLK_OF_DECLARE(imx23_clkctrl, "fsl,imx23-clkctrl", mx23_clocks_init);
diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c
index a6c3501..e6d70ac 100644
--- a/drivers/clk/mxs/clk-imx28.c
+++ b/drivers/clk/mxs/clk-imx28.c
@@ -9,7 +9,6 @@
* http://www.gnu.org/copyleft/gpl.html
*/
-#include <linux/clk.h>
#include <linux/clk/mxs.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
@@ -148,7 +147,7 @@ enum imx28_clk {
clk_max
};
-static struct clk *clks[clk_max];
+static struct clk_core *clks[clk_max];
static struct clk_onecell_data clk_data;
static enum imx28_clk clks_init_on[] __initdata = {
@@ -250,6 +249,6 @@ static void __init mx28_clocks_init(struct device_node *np)
clk_register_clkdev(clks[enet_out], NULL, "enet_out");
for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
- clk_prepare_enable(clks[clks_init_on[i]]);
+ clk_provider_prepare_enable(clks[clks_init_on[i]]);
}
CLK_OF_DECLARE(imx28_clkctrl, "fsl,imx28-clkctrl", mx28_clocks_init);
diff --git a/drivers/clk/mxs/clk-pll.c b/drivers/clk/mxs/clk-pll.c
index fadae41..e0f94ac 100644
--- a/drivers/clk/mxs/clk-pll.c
+++ b/drivers/clk/mxs/clk-pll.c
@@ -9,7 +9,6 @@
* http://www.gnu.org/copyleft/gpl.html
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/delay.h>
#include <linux/err.h>
@@ -86,11 +85,11 @@ static const struct clk_ops clk_pll_ops = {
.recalc_rate = clk_pll_recalc_rate,
};
-struct clk *mxs_clk_pll(const char *name, const char *parent_name,
+struct clk_core *mxs_clk_pll(const char *name, const char *parent_name,
void __iomem *base, u8 power, unsigned long rate)
{
struct clk_pll *pll;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
pll = kzalloc(sizeof(*pll), GFP_KERNEL);
diff --git a/drivers/clk/mxs/clk-ref.c b/drivers/clk/mxs/clk-ref.c
index 4adeed6..af75c3f 100644
--- a/drivers/clk/mxs/clk-ref.c
+++ b/drivers/clk/mxs/clk-ref.c
@@ -9,7 +9,6 @@
* http://www.gnu.org/copyleft/gpl.html
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/err.h>
#include <linux/io.h>
@@ -125,11 +124,11 @@ static const struct clk_ops clk_ref_ops = {
.set_rate = clk_ref_set_rate,
};
-struct clk *mxs_clk_ref(const char *name, const char *parent_name,
+struct clk_core *mxs_clk_ref(const char *name, const char *parent_name,
void __iomem *reg, u8 idx)
{
struct clk_ref *ref;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
ref = kzalloc(sizeof(*ref), GFP_KERNEL);
diff --git a/drivers/clk/mxs/clk-ssp.c b/drivers/clk/mxs/clk-ssp.c
index af7bdbf..5f9b0c3 100644
--- a/drivers/clk/mxs/clk-ssp.c
+++ b/drivers/clk/mxs/clk-ssp.c
@@ -18,7 +18,6 @@
#include <linux/kernel.h>
#include <linux/init.h>
-#include <linux/clk.h>
#include <linux/module.h>
#include <linux/device.h>
#include <linux/io.h>
@@ -30,7 +29,7 @@ void mxs_ssp_set_clk_rate(struct mxs_ssp *ssp, unsigned int rate)
u32 clock_divide, clock_rate;
u32 val;
- ssp_clk = clk_get_rate(ssp->clk);
+ ssp_clk = clk_provider_get_rate(ssp->clk);
for (clock_divide = 2; clock_divide <= 254; clock_divide += 2) {
clock_rate = DIV_ROUND_UP(ssp_clk, rate * clock_divide);
diff --git a/drivers/clk/mxs/clk.h b/drivers/clk/mxs/clk.h
index ef10ad9..19b9dc3 100644
--- a/drivers/clk/mxs/clk.h
+++ b/drivers/clk/mxs/clk.h
@@ -12,7 +12,6 @@
#ifndef __MXS_CLK_H
#define __MXS_CLK_H
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/spinlock.h>
@@ -23,24 +22,24 @@ extern spinlock_t mxs_lock;
int mxs_clk_wait(void __iomem *reg, u8 shift);
-struct clk *mxs_clk_pll(const char *name, const char *parent_name,
+struct clk_core *mxs_clk_pll(const char *name, const char *parent_name,
void __iomem *base, u8 power, unsigned long rate);
-struct clk *mxs_clk_ref(const char *name, const char *parent_name,
+struct clk_core *mxs_clk_ref(const char *name, const char *parent_name,
void __iomem *reg, u8 idx);
-struct clk *mxs_clk_div(const char *name, const char *parent_name,
+struct clk_core *mxs_clk_div(const char *name, const char *parent_name,
void __iomem *reg, u8 shift, u8 width, u8 busy);
-struct clk *mxs_clk_frac(const char *name, const char *parent_name,
+struct clk_core *mxs_clk_frac(const char *name, const char *parent_name,
void __iomem *reg, u8 shift, u8 width, u8 busy);
-static inline struct clk *mxs_clk_fixed(const char *name, int rate)
+static inline struct clk_core *mxs_clk_fixed(const char *name, int rate)
{
return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate);
}
-static inline struct clk *mxs_clk_gate(const char *name,
+static inline struct clk_core *mxs_clk_gate(const char *name,
const char *parent_name, void __iomem *reg, u8 shift)
{
return clk_register_gate(NULL, name, parent_name, CLK_SET_RATE_PARENT,
@@ -48,7 +47,7 @@ static inline struct clk *mxs_clk_gate(const char *name,
&mxs_lock);
}
-static inline struct clk *mxs_clk_mux(const char *name, void __iomem *reg,
+static inline struct clk_core *mxs_clk_mux(const char *name, void __iomem *reg,
u8 shift, u8 width, const char **parent_names, int num_parents)
{
return clk_register_mux(NULL, name, parent_names, num_parents,
@@ -56,7 +55,7 @@ static inline struct clk *mxs_clk_mux(const char *name, void __iomem *reg,
reg, shift, width, 0, &mxs_lock);
}
-static inline struct clk *mxs_clk_fixed_factor(const char *name,
+static inline struct clk_core *mxs_clk_fixed_factor(const char *name,
const char *parent_name, unsigned int mult, unsigned int div)
{
return clk_register_fixed_factor(NULL, name, parent_name,
diff --git a/drivers/clk/qcom/clk-rcg.c b/drivers/clk/qcom/clk-rcg.c
index b638c58..59f118c 100644
--- a/drivers/clk/qcom/clk-rcg.c
+++ b/drivers/clk/qcom/clk-rcg.c
@@ -375,7 +375,7 @@ struct freq_tbl *find_freq(const struct freq_tbl *f, unsigned long rate)
static long _freq_tbl_determine_rate(struct clk_hw *hw,
const struct freq_tbl *f, unsigned long rate,
- unsigned long *p_rate, struct clk **p)
+ unsigned long *p_rate, struct clk_core **p)
{
unsigned long clk_flags;
@@ -402,7 +402,7 @@ static long _freq_tbl_determine_rate(struct clk_hw *hw,
}
static long clk_rcg_determine_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long *p_rate, struct clk **p)
+ unsigned long *p_rate, struct clk_core **p)
{
struct clk_rcg *rcg = to_clk_rcg(hw);
@@ -410,7 +410,7 @@ static long clk_rcg_determine_rate(struct clk_hw *hw, unsigned long rate,
}
static long clk_dyn_rcg_determine_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long *p_rate, struct clk **p)
+ unsigned long *p_rate, struct clk_core **p)
{
struct clk_dyn_rcg *rcg = to_clk_dyn_rcg(hw);
@@ -418,7 +418,7 @@ static long clk_dyn_rcg_determine_rate(struct clk_hw *hw, unsigned long rate,
}
static long clk_rcg_bypass_determine_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long *p_rate, struct clk **p)
+ unsigned long *p_rate, struct clk_core **p)
{
struct clk_rcg *rcg = to_clk_rcg(hw);
const struct freq_tbl *f = rcg->freq_tbl;
diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c
index cd185d5..6aac1ec 100644
--- a/drivers/clk/qcom/clk-rcg2.c
+++ b/drivers/clk/qcom/clk-rcg2.c
@@ -188,7 +188,7 @@ struct freq_tbl *find_freq(const struct freq_tbl *f, unsigned long rate)
static long _freq_tbl_determine_rate(struct clk_hw *hw,
const struct freq_tbl *f, unsigned long rate,
- unsigned long *p_rate, struct clk **p)
+ unsigned long *p_rate, struct clk_core **p)
{
unsigned long clk_flags;
@@ -219,7 +219,7 @@ static long _freq_tbl_determine_rate(struct clk_hw *hw,
}
static long clk_rcg2_determine_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long *p_rate, struct clk **p)
+ unsigned long *p_rate, struct clk_core **p)
{
struct clk_rcg2 *rcg = to_clk_rcg2(hw);
@@ -372,7 +372,7 @@ static int clk_edp_pixel_set_rate_and_parent(struct clk_hw *hw,
}
static long clk_edp_pixel_determine_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long *p_rate, struct clk **p)
+ unsigned long *p_rate, struct clk_core **p)
{
struct clk_rcg2 *rcg = to_clk_rcg2(hw);
const struct freq_tbl *f = rcg->freq_tbl;
@@ -423,7 +423,7 @@ const struct clk_ops clk_edp_pixel_ops = {
EXPORT_SYMBOL_GPL(clk_edp_pixel_ops);
static long clk_byte_determine_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long *p_rate, struct clk **p)
+ unsigned long *p_rate, struct clk_core **p)
{
struct clk_rcg2 *rcg = to_clk_rcg2(hw);
const struct freq_tbl *f = rcg->freq_tbl;
@@ -485,14 +485,14 @@ static const struct frac_entry frac_table_pixel[] = {
};
static long clk_pixel_determine_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long *p_rate, struct clk **p)
+ unsigned long *p_rate, struct clk_core **p)
{
struct clk_rcg2 *rcg = to_clk_rcg2(hw);
unsigned long request, src_rate;
int delta = 100000;
const struct freq_tbl *f = rcg->freq_tbl;
const struct frac_entry *frac = frac_table_pixel;
- struct clk *parent = *p = clk_get_parent_by_index(hw->clk, f->src);
+ struct clk_core *parent = *p = clk_get_parent_by_index(hw->clk, f->src);
for (; frac->num; frac++) {
request = (rate * frac->den) / frac->num;
@@ -519,7 +519,7 @@ static int clk_pixel_set_rate(struct clk_hw *hw, unsigned long rate,
int delta = 100000;
u32 mask = BIT(rcg->hid_width) - 1;
u32 hid_div;
- struct clk *parent = clk_get_parent_by_index(hw->clk, f.src);
+ struct clk_core *parent = clk_get_parent_by_index(hw->clk, f.src);
for (; frac->num; frac++) {
request = (rate * frac->den) / frac->num;
diff --git a/drivers/clk/qcom/clk-regmap.c b/drivers/clk/qcom/clk-regmap.c
index a58ba39..2a98040 100644
--- a/drivers/clk/qcom/clk-regmap.c
+++ b/drivers/clk/qcom/clk-regmap.c
@@ -101,7 +101,7 @@ EXPORT_SYMBOL_GPL(clk_disable_regmap);
* clk_regmap struct via this function so that the regmap is initialized
* and so that the clock is registered with the common clock framework.
*/
-struct clk *devm_clk_register_regmap(struct device *dev,
+struct clk_core *devm_clk_register_regmap(struct device *dev,
struct clk_regmap *rclk)
{
if (dev && dev_get_regmap(dev, NULL))
diff --git a/drivers/clk/qcom/clk-regmap.h b/drivers/clk/qcom/clk-regmap.h
index 491a63d..89258cb 100644
--- a/drivers/clk/qcom/clk-regmap.h
+++ b/drivers/clk/qcom/clk-regmap.h
@@ -39,7 +39,7 @@ struct clk_regmap {
int clk_is_enabled_regmap(struct clk_hw *hw);
int clk_enable_regmap(struct clk_hw *hw);
void clk_disable_regmap(struct clk_hw *hw);
-struct clk *
+struct clk_core *
devm_clk_register_regmap(struct device *dev, struct clk_regmap *rclk);
#endif
diff --git a/drivers/clk/qcom/common.c b/drivers/clk/qcom/common.c
index eeb3eea..afd40ea 100644
--- a/drivers/clk/qcom/common.c
+++ b/drivers/clk/qcom/common.c
@@ -24,7 +24,7 @@
struct qcom_cc {
struct qcom_reset_controller reset;
struct clk_onecell_data data;
- struct clk *clks[];
+ struct clk_core *clks[];
};
struct regmap *
@@ -48,9 +48,9 @@ int qcom_cc_really_probe(struct platform_device *pdev,
{
int i, ret;
struct device *dev = &pdev->dev;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_onecell_data *data;
- struct clk **clks;
+ struct clk_core **clks;
struct qcom_reset_controller *reset;
struct qcom_cc *cc;
size_t num_clks = desc->num_clks;
diff --git a/drivers/clk/qcom/gcc-apq8084.c b/drivers/clk/qcom/gcc-apq8084.c
index ee52eb1..27af0cd 100644
--- a/drivers/clk/qcom/gcc-apq8084.c
+++ b/drivers/clk/qcom/gcc-apq8084.c
@@ -3562,7 +3562,7 @@ MODULE_DEVICE_TABLE(of, gcc_apq8084_match_table);
static int gcc_apq8084_probe(struct platform_device *pdev)
{
- struct clk *clk;
+ struct clk_core *clk;
struct device *dev = &pdev->dev;
/* Temporary until RPM clocks supported */
diff --git a/drivers/clk/qcom/gcc-ipq806x.c b/drivers/clk/qcom/gcc-ipq806x.c
index 4032e51..f31f095 100644
--- a/drivers/clk/qcom/gcc-ipq806x.c
+++ b/drivers/clk/qcom/gcc-ipq806x.c
@@ -2376,7 +2376,7 @@ MODULE_DEVICE_TABLE(of, gcc_ipq806x_match_table);
static int gcc_ipq806x_probe(struct platform_device *pdev)
{
- struct clk *clk;
+ struct clk_core *clk;
struct device *dev = &pdev->dev;
/* Temporary until RPM clocks supported */
diff --git a/drivers/clk/qcom/gcc-msm8660.c b/drivers/clk/qcom/gcc-msm8660.c
index 0c4b727..2d41fdb 100644
--- a/drivers/clk/qcom/gcc-msm8660.c
+++ b/drivers/clk/qcom/gcc-msm8660.c
@@ -2718,7 +2718,7 @@ MODULE_DEVICE_TABLE(of, gcc_msm8660_match_table);
static int gcc_msm8660_probe(struct platform_device *pdev)
{
- struct clk *clk;
+ struct clk_core *clk;
struct device *dev = &pdev->dev;
/* Temporary until RPM clocks supported */
diff --git a/drivers/clk/qcom/gcc-msm8960.c b/drivers/clk/qcom/gcc-msm8960.c
index 007534f..ed8f8f5 100644
--- a/drivers/clk/qcom/gcc-msm8960.c
+++ b/drivers/clk/qcom/gcc-msm8960.c
@@ -3488,7 +3488,7 @@ MODULE_DEVICE_TABLE(of, gcc_msm8960_match_table);
static int gcc_msm8960_probe(struct platform_device *pdev)
{
- struct clk *clk;
+ struct clk_core *clk;
struct device *dev = &pdev->dev;
const struct of_device_id *match;
diff --git a/drivers/clk/qcom/gcc-msm8974.c b/drivers/clk/qcom/gcc-msm8974.c
index 7af7c18..8326b1f 100644
--- a/drivers/clk/qcom/gcc-msm8974.c
+++ b/drivers/clk/qcom/gcc-msm8974.c
@@ -2699,7 +2699,7 @@ static void msm8974_pro_clock_override(void)
static int gcc_msm8974_probe(struct platform_device *pdev)
{
- struct clk *clk;
+ struct clk_core *clk;
struct device *dev = &pdev->dev;
bool pro;
const struct of_device_id *id;
diff --git a/drivers/clk/qcom/mmcc-msm8960.c b/drivers/clk/qcom/mmcc-msm8960.c
index 2e80a21..bb60d61 100644
--- a/drivers/clk/qcom/mmcc-msm8960.c
+++ b/drivers/clk/qcom/mmcc-msm8960.c
@@ -505,7 +505,7 @@ static int pix_rdi_set_parent(struct clk_hw *hw, u8 index)
int ret = 0;
u32 val;
struct clk_pix_rdi *rdi = to_clk_pix_rdi(hw);
- struct clk *clk = hw->clk;
+ struct clk_core *clk = hw->clk;
int num_parents = __clk_get_num_parents(hw->clk);
/*
@@ -517,7 +517,7 @@ static int pix_rdi_set_parent(struct clk_hw *hw, u8 index)
* needs to be on at what time.
*/
for (i = 0; i < num_parents; i++) {
- ret = clk_prepare_enable(clk_get_parent_by_index(clk, i));
+ ret = clk_provider_prepare_enable(clk_get_parent_by_index(clk, i));
if (ret)
goto err;
}
@@ -546,7 +546,7 @@ static int pix_rdi_set_parent(struct clk_hw *hw, u8 index)
err:
for (i--; i >= 0; i--)
- clk_disable_unprepare(clk_get_parent_by_index(clk, i));
+ clk_provider_disable_unprepare(clk_get_parent_by_index(clk, i));
return ret;
}
diff --git a/drivers/clk/rockchip/clk-pll.c b/drivers/clk/rockchip/clk-pll.c
index f2a1c7a..414bff2 100644
--- a/drivers/clk/rockchip/clk-pll.c
+++ b/drivers/clk/rockchip/clk-pll.c
@@ -17,7 +17,6 @@
#include <linux/slab.h>
#include <linux/io.h>
#include <linux/delay.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/regmap.h>
#include "clk.h"
@@ -297,7 +296,7 @@ static const struct clk_ops rockchip_rk3066_pll_clk_ops = {
* Common registering of pll clocks
*/
-struct clk *rockchip_clk_register_pll(enum rockchip_pll_type pll_type,
+struct clk_core *rockchip_clk_register_pll(enum rockchip_pll_type pll_type,
const char *name, const char **parent_names, u8 num_parents,
void __iomem *base, int con_offset, int grf_lock_offset,
int lock_shift, int mode_offset, int mode_shift,
@@ -308,7 +307,7 @@ struct clk *rockchip_clk_register_pll(enum rockchip_pll_type pll_type,
struct clk_init_data init;
struct rockchip_clk_pll *pll;
struct clk_mux *pll_mux;
- struct clk *pll_clk, *mux_clk;
+ struct clk_core *pll_clk, *mux_clk;
char pll_name[20];
int ret;
@@ -377,7 +376,7 @@ struct clk *rockchip_clk_register_pll(enum rockchip_pll_type pll_type,
goto err_pll;
}
- ret = clk_notifier_register(pll_clk, &pll->clk_nb);
+ ret = clk_provider_notifier_register(pll_clk, &pll->clk_nb);
if (ret) {
pr_err("%s: failed to register clock notifier for %s : %d\n",
__func__, name, ret);
@@ -417,7 +416,7 @@ struct clk *rockchip_clk_register_pll(enum rockchip_pll_type pll_type,
return mux_clk;
err_mux:
- ret = clk_notifier_unregister(pll_clk, &pll->clk_nb);
+ ret = clk_provider_notifier_unregister(pll_clk, &pll->clk_nb);
if (ret) {
pr_err("%s: could not unregister clock notifier in error path : %d\n",
__func__, ret);
diff --git a/drivers/clk/rockchip/clk-rk3188.c b/drivers/clk/rockchip/clk-rk3188.c
index 1892c66..ae4cf82 100644
--- a/drivers/clk/rockchip/clk-rk3188.c
+++ b/drivers/clk/rockchip/clk-rk3188.c
@@ -607,7 +607,7 @@ static const char *rk3188_critical_clocks[] __initconst = {
static void __init rk3188_common_clk_init(struct device_node *np)
{
void __iomem *reg_base;
- struct clk *clk;
+ struct clk_core *clk;
reg_base = of_iomap(np, 0);
if (!reg_base) {
diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
index 43e0ad0..7f29295 100644
--- a/drivers/clk/rockchip/clk-rk3288.c
+++ b/drivers/clk/rockchip/clk-rk3288.c
@@ -688,7 +688,7 @@ static const char *rk3288_critical_clocks[] __initconst = {
static void __init rk3288_clk_init(struct device_node *np)
{
void __iomem *reg_base;
- struct clk *clk;
+ struct clk_core *clk;
reg_base = of_iomap(np, 0);
if (!reg_base) {
diff --git a/drivers/clk/rockchip/clk-rockchip.c b/drivers/clk/rockchip/clk-rockchip.c
index 4cf838d5..faa8dfa 100644
--- a/drivers/clk/rockchip/clk-rockchip.c
+++ b/drivers/clk/rockchip/clk-rockchip.c
@@ -54,7 +54,7 @@ static void __init rk2928_gate_clk_init(struct device_node *node)
if (!clk_data)
return;
- clk_data->clks = kzalloc(qty * sizeof(struct clk *), GFP_KERNEL);
+ clk_data->clks = kzalloc(qty * sizeof(struct clk_core *), GFP_KERNEL);
if (!clk_data->clks) {
kfree(clk_data);
return;
diff --git a/drivers/clk/rockchip/clk.c b/drivers/clk/rockchip/clk.c
index cad52ab..a4518ba 100644
--- a/drivers/clk/rockchip/clk.c
+++ b/drivers/clk/rockchip/clk.c
@@ -21,7 +21,6 @@
*/
#include <linux/slab.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/mfd/syscon.h>
#include <linux/regmap.h>
@@ -38,7 +37,7 @@
*
* sometimes without one of those components.
*/
-static struct clk *rockchip_clk_register_branch(const char *name,
+static struct clk_core *rockchip_clk_register_branch(const char *name,
const char **parent_names, u8 num_parents, void __iomem *base,
int muxdiv_offset, u8 mux_shift, u8 mux_width, u8 mux_flags,
u8 div_shift, u8 div_width, u8 div_flags,
@@ -46,7 +45,7 @@ static struct clk *rockchip_clk_register_branch(const char *name,
u8 gate_shift, u8 gate_flags, unsigned long flags,
spinlock_t *lock)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_mux *mux = NULL;
struct clk_gate *gate = NULL;
struct clk_divider *div = NULL;
@@ -104,13 +103,13 @@ static struct clk *rockchip_clk_register_branch(const char *name,
return clk;
}
-static struct clk *rockchip_clk_register_frac_branch(const char *name,
+static struct clk_core *rockchip_clk_register_frac_branch(const char *name,
const char **parent_names, u8 num_parents, void __iomem *base,
int muxdiv_offset, u8 div_flags,
int gate_offset, u8 gate_shift, u8 gate_flags,
unsigned long flags, spinlock_t *lock)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_gate *gate = NULL;
struct clk_fractional_divider *div = NULL;
const struct clk_ops *div_ops = NULL, *gate_ops = NULL;
@@ -153,7 +152,7 @@ static struct clk *rockchip_clk_register_frac_branch(const char *name,
}
static DEFINE_SPINLOCK(clk_lock);
-static struct clk **clk_table;
+static struct clk_core **clk_table;
static void __iomem *reg_base;
static struct clk_onecell_data clk_data;
static struct device_node *cru_node;
@@ -166,7 +165,7 @@ void __init rockchip_clk_init(struct device_node *np, void __iomem *base,
cru_node = np;
grf = ERR_PTR(-EPROBE_DEFER);
- clk_table = kcalloc(nr_clks, sizeof(struct clk *), GFP_KERNEL);
+ clk_table = kcalloc(nr_clks, sizeof(struct clk_core *), GFP_KERNEL);
if (!clk_table)
pr_err("%s: could not allocate clock lookup table\n", __func__);
@@ -182,7 +181,7 @@ struct regmap *rockchip_clk_get_grf(void)
return grf;
}
-void rockchip_clk_add_lookup(struct clk *clk, unsigned int id)
+void rockchip_clk_add_lookup(struct clk_core *clk, unsigned int id)
{
if (clk_table && id)
clk_table[id] = clk;
@@ -191,7 +190,7 @@ void rockchip_clk_add_lookup(struct clk *clk, unsigned int id)
void __init rockchip_clk_register_plls(struct rockchip_pll_clock *list,
unsigned int nr_pll, int grf_lock_offset)
{
- struct clk *clk;
+ struct clk_core *clk;
int idx;
for (idx = 0; idx < nr_pll; idx++, list++) {
@@ -214,7 +213,7 @@ void __init rockchip_clk_register_branches(
struct rockchip_clk_branch *list,
unsigned int nr_clk)
{
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
unsigned int idx;
unsigned long flags;
@@ -304,10 +303,10 @@ void __init rockchip_clk_protect_critical(const char *clocks[], int nclocks)
/* Protect the clocks that needs to stay on */
for (i = 0; i < nclocks; i++) {
- struct clk *clk = __clk_lookup(clocks[i]);
+ struct clk_core *clk = __clk_lookup(clocks[i]);
if (clk)
- clk_prepare_enable(clk);
+ clk_provider_prepare_enable(clk);
}
}
diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h
index 3965200..ac92bf9 100644
--- a/drivers/clk/rockchip/clk.h
+++ b/drivers/clk/rockchip/clk.h
@@ -24,7 +24,6 @@
#define CLK_ROCKCHIP_CLK_H
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#define HIWORD_UPDATE(val, mask, shift) \
@@ -113,7 +112,7 @@ struct rockchip_pll_clock {
.rate_table = _rtable, \
}
-struct clk *rockchip_clk_register_pll(enum rockchip_pll_type pll_type,
+struct clk_core *rockchip_clk_register_pll(enum rockchip_pll_type pll_type,
const char *name, const char **parent_names, u8 num_parents,
void __iomem *base, int con_offset, int grf_lock_offset,
int lock_shift, int reg_mode, int mode_shift,
@@ -324,7 +323,7 @@ struct rockchip_clk_branch {
void rockchip_clk_init(struct device_node *np, void __iomem *base,
unsigned long nr_clks);
struct regmap *rockchip_clk_get_grf(void);
-void rockchip_clk_add_lookup(struct clk *clk, unsigned int id);
+void rockchip_clk_add_lookup(struct clk_core *clk, unsigned int id);
void rockchip_clk_register_branches(struct rockchip_clk_branch *clk_list,
unsigned int nr_clk);
void rockchip_clk_register_plls(struct rockchip_pll_clock *pll_list,
diff --git a/drivers/clk/samsung/clk-exynos-audss.c b/drivers/clk/samsung/clk-exynos-audss.c
index 13eae14c..f5639bf 100644
--- a/drivers/clk/samsung/clk-exynos-audss.c
+++ b/drivers/clk/samsung/clk-exynos-audss.c
@@ -26,7 +26,7 @@ enum exynos_audss_clk_type {
};
static DEFINE_SPINLOCK(lock);
-static struct clk **clk_table;
+static struct clk_core **clk_table;
static void __iomem *reg_base;
static struct clk_onecell_data clk_data;
@@ -83,7 +83,7 @@ static int exynos_audss_clk_probe(struct platform_device *pdev)
const char *mout_audss_p[] = {"fin_pll", "fout_epll"};
const char *mout_i2s_p[] = {"mout_audss", "cdclk0", "sclk_audio0"};
const char *sclk_pcm_p = "sclk_pcm0";
- struct clk *pll_ref, *pll_in, *cdclk, *sclk_audio, *sclk_pcm_in;
+ struct clk_core *pll_ref, *pll_in, *cdclk, *sclk_audio, *sclk_pcm_in;
const struct of_device_id *match;
enum exynos_audss_clk_type variant;
@@ -100,7 +100,7 @@ static int exynos_audss_clk_probe(struct platform_device *pdev)
}
clk_table = devm_kzalloc(&pdev->dev,
- sizeof(struct clk *) * EXYNOS_AUDSS_MAX_CLKS,
+ sizeof(struct clk_core *) * EXYNOS_AUDSS_MAX_CLKS,
GFP_KERNEL);
if (!clk_table)
return -ENOMEM;
@@ -111,8 +111,8 @@ static int exynos_audss_clk_probe(struct platform_device *pdev)
else
clk_data.clk_num = EXYNOS_AUDSS_MAX_CLKS - 1;
- pll_ref = devm_clk_get(&pdev->dev, "pll_ref");
- pll_in = devm_clk_get(&pdev->dev, "pll_in");
+ pll_ref = devm_clk_provider_get(&pdev->dev, "pll_ref");
+ pll_in = devm_clk_provider_get(&pdev->dev, "pll_in");
if (!IS_ERR(pll_ref))
mout_audss_p[0] = __clk_get_name(pll_ref);
if (!IS_ERR(pll_in))
@@ -122,8 +122,8 @@ static int exynos_audss_clk_probe(struct platform_device *pdev)
CLK_SET_RATE_NO_REPARENT,
reg_base + ASS_CLK_SRC, 0, 1, 0, &lock);
- cdclk = devm_clk_get(&pdev->dev, "cdclk");
- sclk_audio = devm_clk_get(&pdev->dev, "sclk_audio");
+ cdclk = devm_clk_provider_get(&pdev->dev, "cdclk");
+ sclk_audio = devm_clk_provider_get(&pdev->dev, "sclk_audio");
if (!IS_ERR(cdclk))
mout_i2s_p[1] = __clk_get_name(cdclk);
if (!IS_ERR(sclk_audio))
@@ -161,7 +161,7 @@ static int exynos_audss_clk_probe(struct platform_device *pdev)
"sclk_pcm", CLK_SET_RATE_PARENT,
reg_base + ASS_CLK_GATE, 4, 0, &lock);
- sclk_pcm_in = devm_clk_get(&pdev->dev, "sclk_pcm_in");
+ sclk_pcm_in = devm_clk_provider_get(&pdev->dev, "sclk_pcm_in");
if (!IS_ERR(sclk_pcm_in))
sclk_pcm_p = __clk_get_name(sclk_pcm_in);
clk_table[EXYNOS_SCLK_PCM] = clk_register_gate(NULL, "sclk_pcm",
diff --git a/drivers/clk/samsung/clk-exynos-clkout.c b/drivers/clk/samsung/clk-exynos-clkout.c
index 3a7cb25..0ad7dee 100644
--- a/drivers/clk/samsung/clk-exynos-clkout.c
+++ b/drivers/clk/samsung/clk-exynos-clkout.c
@@ -9,7 +9,6 @@
* Clock driver for Exynos clock output
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
@@ -30,7 +29,7 @@ struct exynos_clkout {
struct clk_mux mux;
spinlock_t slock;
struct clk_onecell_data data;
- struct clk *clk_table[EXYNOS_CLKOUT_NR_CLKS];
+ struct clk_core *clk_table[EXYNOS_CLKOUT_NR_CLKS];
void __iomem *reg;
u32 pmu_debug_save;
};
@@ -57,7 +56,7 @@ static struct syscore_ops exynos_clkout_syscore_ops = {
static void __init exynos_clkout_init(struct device_node *node, u32 mux_mask)
{
const char *parent_names[EXYNOS_CLKOUT_PARENTS];
- struct clk *parents[EXYNOS_CLKOUT_PARENTS];
+ struct clk_core *parents[EXYNOS_CLKOUT_PARENTS];
int parent_count;
int ret;
int i;
@@ -73,7 +72,7 @@ static void __init exynos_clkout_init(struct device_node *node, u32 mux_mask)
char name[] = "clkoutXX";
snprintf(name, sizeof(name), "clkout%d", i);
- parents[i] = of_clk_get_by_name(node, name);
+ parents[i] = of_clk_provider_get_by_name(node, name);
if (IS_ERR(parents[i])) {
parent_names[i] = "none";
continue;
@@ -125,7 +124,7 @@ err_unmap:
clks_put:
for (i = 0; i < EXYNOS_CLKOUT_PARENTS; ++i)
if (!IS_ERR(parents[i]))
- clk_put(parents[i]);
+ __clk_put(parents[i]);
free_clkout:
kfree(clkout);
diff --git a/drivers/clk/samsung/clk-exynos3250.c b/drivers/clk/samsung/clk-exynos3250.c
index dc85f8e..5742e76 100644
--- a/drivers/clk/samsung/clk-exynos3250.c
+++ b/drivers/clk/samsung/clk-exynos3250.c
@@ -8,7 +8,6 @@
* Common Clock Framework support for Exynos3250 SoC.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c
index ac163d7..5d77da2 100644
--- a/drivers/clk/samsung/clk-exynos4.c
+++ b/drivers/clk/samsung/clk-exynos4.c
@@ -11,7 +11,6 @@
*/
#include <dt-bindings/clock/exynos4.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
@@ -1230,19 +1229,19 @@ static unsigned long exynos4_get_xom(void)
static void __init exynos4_clk_register_finpll(struct samsung_clk_provider *ctx)
{
struct samsung_fixed_rate_clock fclk;
- struct clk *clk;
+ struct clk_core *clk;
unsigned long finpll_f = 24000000;
char *parent_name;
unsigned int xom = exynos4_get_xom();
parent_name = xom & 1 ? "xusbxti" : "xxti";
- clk = clk_get(NULL, parent_name);
+ clk = clk_provider_get(NULL, parent_name);
if (IS_ERR(clk)) {
pr_err("%s: failed to lookup parent clock %s, assuming "
"fin_pll clock frequency is 24MHz\n", __func__,
parent_name);
} else {
- finpll_f = clk_get_rate(clk);
+ finpll_f = clk_provider_get_rate(clk);
}
fclk.id = CLK_FIN_PLL;
diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c
index 70ec3d2..623e68f 100644
--- a/drivers/clk/samsung/clk-exynos5250.c
+++ b/drivers/clk/samsung/clk-exynos5250.c
@@ -11,7 +11,6 @@
*/
#include <dt-bindings/clock/exynos5250.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
diff --git a/drivers/clk/samsung/clk-exynos5260.c b/drivers/clk/samsung/clk-exynos5260.c
index ce3de97..5a3d623 100644
--- a/drivers/clk/samsung/clk-exynos5260.c
+++ b/drivers/clk/samsung/clk-exynos5260.c
@@ -9,7 +9,6 @@
* Common Clock Framework support for Exynos5260 SoC.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
diff --git a/drivers/clk/samsung/clk-exynos5410.c b/drivers/clk/samsung/clk-exynos5410.c
index 231475b..546b32f 100644
--- a/drivers/clk/samsung/clk-exynos5410.c
+++ b/drivers/clk/samsung/clk-exynos5410.c
@@ -11,7 +11,6 @@
#include <dt-bindings/clock/exynos5410.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c
index 848d602..0229cc9 100644
--- a/drivers/clk/samsung/clk-exynos5420.c
+++ b/drivers/clk/samsung/clk-exynos5420.c
@@ -11,7 +11,6 @@
*/
#include <dt-bindings/clock/exynos5420.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
diff --git a/drivers/clk/samsung/clk-exynos5440.c b/drivers/clk/samsung/clk-exynos5440.c
index 00d1d00..8adeaa1 100644
--- a/drivers/clk/samsung/clk-exynos5440.c
+++ b/drivers/clk/samsung/clk-exynos5440.c
@@ -10,7 +10,6 @@
*/
#include <dt-bindings/clock/exynos5440.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
diff --git a/drivers/clk/samsung/clk-pll.c b/drivers/clk/samsung/clk-pll.c
index b07fad2..aaf234a 100644
--- a/drivers/clk/samsung/clk-pll.c
+++ b/drivers/clk/samsung/clk-pll.c
@@ -910,12 +910,12 @@ static const struct clk_ops samsung_pll2550x_clk_ops = {
.recalc_rate = samsung_pll2550x_recalc_rate,
};
-struct clk * __init samsung_clk_register_pll2550x(const char *name,
+struct clk_core * __init samsung_clk_register_pll2550x(const char *name,
const char *pname, const void __iomem *reg_base,
const unsigned long offset)
{
struct samsung_clk_pll2550x *pll;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
pll = kzalloc(sizeof(*pll), GFP_KERNEL);
@@ -1149,7 +1149,7 @@ static void __init _samsung_clk_register_pll(struct samsung_clk_provider *ctx,
void __iomem *base)
{
struct samsung_clk_pll *pll;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
int ret, len;
diff --git a/drivers/clk/samsung/clk-pll.h b/drivers/clk/samsung/clk-pll.h
index c0ed4d4..81af344 100644
--- a/drivers/clk/samsung/clk-pll.h
+++ b/drivers/clk/samsung/clk-pll.h
@@ -97,7 +97,7 @@ struct samsung_pll_rate_table {
unsigned int vsel;
};
-extern struct clk * __init samsung_clk_register_pll2550x(const char *name,
+extern struct clk_core * __init samsung_clk_register_pll2550x(const char *name,
const char *pname, const void __iomem *reg_base,
const unsigned long offset);
diff --git a/drivers/clk/samsung/clk-s3c2410-dclk.c b/drivers/clk/samsung/clk-s3c2410-dclk.c
index 0449cc0..05354bd 100644
--- a/drivers/clk/samsung/clk-s3c2410-dclk.c
+++ b/drivers/clk/samsung/clk-s3c2410-dclk.c
@@ -87,12 +87,12 @@ const struct clk_ops s3c24xx_clkout_ops = {
.determine_rate = __clk_mux_determine_rate,
};
-struct clk *s3c24xx_register_clkout(struct device *dev, const char *name,
+struct clk_core *s3c24xx_register_clkout(struct device *dev, const char *name,
const char **parent_names, u8 num_parents,
u8 shift, u32 mask)
{
struct s3c24xx_clkout *clkout;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
/* allocate the clkout */
@@ -237,7 +237,7 @@ static int s3c24xx_dclk_probe(struct platform_device *pdev)
{
struct s3c24xx_dclk *s3c24xx_dclk;
struct resource *mem;
- struct clk **clk_table;
+ struct clk_core **clk_table;
struct s3c24xx_dclk_drv_data *dclk_variant;
int ret, i;
@@ -251,7 +251,7 @@ static int s3c24xx_dclk_probe(struct platform_device *pdev)
spin_lock_init(&s3c24xx_dclk->dclk_lock);
clk_table = devm_kzalloc(&pdev->dev,
- sizeof(struct clk *) * DCLK_MAX_CLKS,
+ sizeof(struct clk_core *) * DCLK_MAX_CLKS,
GFP_KERNEL);
if (!clk_table)
return -ENOMEM;
@@ -329,21 +329,21 @@ static int s3c24xx_dclk_probe(struct platform_device *pdev)
s3c24xx_dclk->dclk1_div_change_nb.notifier_call =
s3c24xx_dclk1_div_notify;
- ret = clk_notifier_register(clk_table[DIV_DCLK0],
- &s3c24xx_dclk->dclk0_div_change_nb);
+ ret = clk_provider_notifier_register(clk_table[DIV_DCLK0],
+ &s3c24xx_dclk->dclk0_div_change_nb);
if (ret)
goto err_clk_register;
- ret = clk_notifier_register(clk_table[DIV_DCLK1],
- &s3c24xx_dclk->dclk1_div_change_nb);
+ ret = clk_provider_notifier_register(clk_table[DIV_DCLK1],
+ &s3c24xx_dclk->dclk1_div_change_nb);
if (ret)
goto err_dclk_notify;
return 0;
err_dclk_notify:
- clk_notifier_unregister(clk_table[DIV_DCLK0],
- &s3c24xx_dclk->dclk0_div_change_nb);
+ clk_provider_notifier_unregister(clk_table[DIV_DCLK0],
+ &s3c24xx_dclk->dclk0_div_change_nb);
err_clk_register:
for (i = 0; i < DCLK_MAX_CLKS; i++)
if (clk_table[i] && !IS_ERR(clk_table[i]))
@@ -355,13 +355,13 @@ err_clk_register:
static int s3c24xx_dclk_remove(struct platform_device *pdev)
{
struct s3c24xx_dclk *s3c24xx_dclk = platform_get_drvdata(pdev);
- struct clk **clk_table = s3c24xx_dclk->clk_data.clks;
+ struct clk_core **clk_table = s3c24xx_dclk->clk_data.clks;
int i;
- clk_notifier_unregister(clk_table[DIV_DCLK1],
- &s3c24xx_dclk->dclk1_div_change_nb);
- clk_notifier_unregister(clk_table[DIV_DCLK0],
- &s3c24xx_dclk->dclk0_div_change_nb);
+ clk_provider_notifier_unregister(clk_table[DIV_DCLK1],
+ &s3c24xx_dclk->dclk1_div_change_nb);
+ clk_provider_notifier_unregister(clk_table[DIV_DCLK0],
+ &s3c24xx_dclk->dclk0_div_change_nb);
for (i = 0; i < DCLK_MAX_CLKS; i++)
clk_unregister(clk_table[i]);
diff --git a/drivers/clk/samsung/clk-s3c2410.c b/drivers/clk/samsung/clk-s3c2410.c
index 5d2f034..af15156 100644
--- a/drivers/clk/samsung/clk-s3c2410.c
+++ b/drivers/clk/samsung/clk-s3c2410.c
@@ -8,7 +8,6 @@
* Common Clock Framework support for S3C2410 and following SoCs.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
diff --git a/drivers/clk/samsung/clk-s3c2412.c b/drivers/clk/samsung/clk-s3c2412.c
index 2ceedaf..bb349fa 100644
--- a/drivers/clk/samsung/clk-s3c2412.c
+++ b/drivers/clk/samsung/clk-s3c2412.c
@@ -8,7 +8,6 @@
* Common Clock Framework support for S3C2412 and S3C2413.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
diff --git a/drivers/clk/samsung/clk-s3c2443.c b/drivers/clk/samsung/clk-s3c2443.c
index 0c3c182..5819553 100644
--- a/drivers/clk/samsung/clk-s3c2443.c
+++ b/drivers/clk/samsung/clk-s3c2443.c
@@ -8,7 +8,6 @@
* Common Clock Framework support for S3C2443 and following SoCs.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
diff --git a/drivers/clk/samsung/clk-s3c64xx.c b/drivers/clk/samsung/clk-s3c64xx.c
index 0f590e5..7dad675 100644
--- a/drivers/clk/samsung/clk-s3c64xx.c
+++ b/drivers/clk/samsung/clk-s3c64xx.c
@@ -8,7 +8,6 @@
* Common Clock Framework support for all S3C64xx SoCs.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
diff --git a/drivers/clk/samsung/clk-s5pv210-audss.c b/drivers/clk/samsung/clk-s5pv210-audss.c
index a8053b4..f7b77e5 100644
--- a/drivers/clk/samsung/clk-s5pv210-audss.c
+++ b/drivers/clk/samsung/clk-s5pv210-audss.c
@@ -24,7 +24,7 @@
#include <dt-bindings/clock/s5pv210-audss.h>
static DEFINE_SPINLOCK(lock);
-static struct clk **clk_table;
+static struct clk_core **clk_table;
static void __iomem *reg_base;
static struct clk_onecell_data clk_data;
@@ -71,7 +71,7 @@ static int s5pv210_audss_clk_probe(struct platform_device *pdev)
const char *mout_audss_p[2];
const char *mout_i2s_p[3];
const char *hclk_p;
- struct clk *hclk, *pll_ref, *pll_in, *cdclk, *sclk_audio;
+ struct clk_core *hclk, *pll_ref, *pll_in, *cdclk, *sclk_audio;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
reg_base = devm_ioremap_resource(&pdev->dev, res);
@@ -81,7 +81,7 @@ static int s5pv210_audss_clk_probe(struct platform_device *pdev)
}
clk_table = devm_kzalloc(&pdev->dev,
- sizeof(struct clk *) * AUDSS_MAX_CLKS,
+ sizeof(struct clk_core *) * AUDSS_MAX_CLKS,
GFP_KERNEL);
if (!clk_table)
return -ENOMEM;
@@ -89,27 +89,27 @@ static int s5pv210_audss_clk_probe(struct platform_device *pdev)
clk_data.clks = clk_table;
clk_data.clk_num = AUDSS_MAX_CLKS;
- hclk = devm_clk_get(&pdev->dev, "hclk");
+ hclk = devm_clk_provider_get(&pdev->dev, "hclk");
if (IS_ERR(hclk)) {
dev_err(&pdev->dev, "failed to get hclk clock\n");
return PTR_ERR(hclk);
}
- pll_in = devm_clk_get(&pdev->dev, "fout_epll");
+ pll_in = devm_clk_provider_get(&pdev->dev, "fout_epll");
if (IS_ERR(pll_in)) {
dev_err(&pdev->dev, "failed to get fout_epll clock\n");
return PTR_ERR(pll_in);
}
- sclk_audio = devm_clk_get(&pdev->dev, "sclk_audio0");
+ sclk_audio = devm_clk_provider_get(&pdev->dev, "sclk_audio0");
if (IS_ERR(sclk_audio)) {
dev_err(&pdev->dev, "failed to get sclk_audio0 clock\n");
return PTR_ERR(sclk_audio);
}
/* iiscdclk0 is an optional external I2S codec clock */
- cdclk = devm_clk_get(&pdev->dev, "iiscdclk0");
- pll_ref = devm_clk_get(&pdev->dev, "xxti");
+ cdclk = devm_clk_provider_get(&pdev->dev, "iiscdclk0");
+ pll_ref = devm_clk_provider_get(&pdev->dev, "xxti");
if (!IS_ERR(pll_ref))
mout_audss_p[0] = __clk_get_name(pll_ref);
diff --git a/drivers/clk/samsung/clk-s5pv210.c b/drivers/clk/samsung/clk-s5pv210.c
index d270a20..517032f 100644
--- a/drivers/clk/samsung/clk-s5pv210.c
+++ b/drivers/clk/samsung/clk-s5pv210.c
@@ -11,7 +11,6 @@
* Common Clock Framework support for all S5PC110/S5PV210 SoCs.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
diff --git a/drivers/clk/samsung/clk.c b/drivers/clk/samsung/clk.c
index deab84d..68133fa 100644
--- a/drivers/clk/samsung/clk.c
+++ b/drivers/clk/samsung/clk.c
@@ -52,14 +52,14 @@ struct samsung_clk_provider *__init samsung_clk_init(struct device_node *np,
void __iomem *base, unsigned long nr_clks)
{
struct samsung_clk_provider *ctx;
- struct clk **clk_table;
+ struct clk_core **clk_table;
int i;
ctx = kzalloc(sizeof(struct samsung_clk_provider), GFP_KERNEL);
if (!ctx)
panic("could not allocate clock provider context.\n");
- clk_table = kcalloc(nr_clks, sizeof(struct clk *), GFP_KERNEL);
+ clk_table = kcalloc(nr_clks, sizeof(struct clk_core *), GFP_KERNEL);
if (!clk_table)
panic("could not allocate clock lookup table\n");
@@ -85,7 +85,7 @@ void __init samsung_clk_of_add_provider(struct device_node *np,
}
/* add a clock instance to the clock lookup table used for dt based lookup */
-void samsung_clk_add_lookup(struct samsung_clk_provider *ctx, struct clk *clk,
+void samsung_clk_add_lookup(struct samsung_clk_provider *ctx, struct clk_core *clk,
unsigned int id)
{
if (ctx->clk_data.clks && id)
@@ -97,7 +97,7 @@ void __init samsung_clk_register_alias(struct samsung_clk_provider *ctx,
struct samsung_clock_alias *list,
unsigned int nr_clk)
{
- struct clk *clk;
+ struct clk_core *clk;
unsigned int idx, ret;
if (!ctx->clk_data.clks) {
@@ -130,7 +130,7 @@ void __init samsung_clk_register_alias(struct samsung_clk_provider *ctx,
void __init samsung_clk_register_fixed_rate(struct samsung_clk_provider *ctx,
struct samsung_fixed_rate_clock *list, unsigned int nr_clk)
{
- struct clk *clk;
+ struct clk_core *clk;
unsigned int idx, ret;
for (idx = 0; idx < nr_clk; idx++, list++) {
@@ -159,7 +159,7 @@ void __init samsung_clk_register_fixed_rate(struct samsung_clk_provider *ctx,
void __init samsung_clk_register_fixed_factor(struct samsung_clk_provider *ctx,
struct samsung_fixed_factor_clock *list, unsigned int nr_clk)
{
- struct clk *clk;
+ struct clk_core *clk;
unsigned int idx;
for (idx = 0; idx < nr_clk; idx++, list++) {
@@ -180,7 +180,7 @@ void __init samsung_clk_register_mux(struct samsung_clk_provider *ctx,
struct samsung_mux_clock *list,
unsigned int nr_clk)
{
- struct clk *clk;
+ struct clk_core *clk;
unsigned int idx, ret;
for (idx = 0; idx < nr_clk; idx++, list++) {
@@ -212,7 +212,7 @@ void __init samsung_clk_register_div(struct samsung_clk_provider *ctx,
struct samsung_div_clock *list,
unsigned int nr_clk)
{
- struct clk *clk;
+ struct clk_core *clk;
unsigned int idx, ret;
for (idx = 0; idx < nr_clk; idx++, list++) {
@@ -251,7 +251,7 @@ void __init samsung_clk_register_gate(struct samsung_clk_provider *ctx,
struct samsung_gate_clock *list,
unsigned int nr_clk)
{
- struct clk *clk;
+ struct clk_core *clk;
unsigned int idx, ret;
for (idx = 0; idx < nr_clk; idx++, list++) {
@@ -303,7 +303,7 @@ void __init samsung_clk_of_register_fixed_ext(struct samsung_clk_provider *ctx,
/* utility function to get the rate of a specified clock */
unsigned long _get_rate(const char *clk_name)
{
- struct clk *clk;
+ struct clk_core *clk;
clk = __clk_lookup(clk_name);
if (!clk) {
@@ -311,5 +311,5 @@ unsigned long _get_rate(const char *clk_name)
return 0;
}
- return clk_get_rate(clk);
+ return clk_provider_get_rate(clk);
}
diff --git a/drivers/clk/samsung/clk.h b/drivers/clk/samsung/clk.h
index 66ab36b..58b1215 100644
--- a/drivers/clk/samsung/clk.h
+++ b/drivers/clk/samsung/clk.h
@@ -13,7 +13,6 @@
#ifndef __SAMSUNG_CLK_H
#define __SAMSUNG_CLK_H
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/io.h>
#include <linux/clk-provider.h>
@@ -336,7 +335,7 @@ extern void __init samsung_clk_of_register_fixed_ext(
const struct of_device_id *clk_matches);
extern void samsung_clk_add_lookup(struct samsung_clk_provider *ctx,
- struct clk *clk, unsigned int id);
+ struct clk_core *clk, unsigned int id);
extern void samsung_clk_register_alias(struct samsung_clk_provider *ctx,
struct samsung_clock_alias *list,
diff --git a/drivers/clk/shmobile/clk-div6.c b/drivers/clk/shmobile/clk-div6.c
index f065f69..c6712fb 100644
--- a/drivers/clk/shmobile/clk-div6.c
+++ b/drivers/clk/shmobile/clk-div6.c
@@ -119,7 +119,7 @@ static void __init cpg_div6_clock_init(struct device_node *np)
struct div6_clock *clock;
const char *parent_name;
const char *name;
- struct clk *clk;
+ struct clk_core *clk;
int ret;
clock = kzalloc(sizeof(*clock), GFP_KERNEL);
diff --git a/drivers/clk/shmobile/clk-emev2.c b/drivers/clk/shmobile/clk-emev2.c
index 6c7c929..2e3a45b 100644
--- a/drivers/clk/shmobile/clk-emev2.c
+++ b/drivers/clk/shmobile/clk-emev2.c
@@ -71,7 +71,7 @@ static void __init emev2_smu_init(void)
static void __init emev2_smu_clkdiv_init(struct device_node *np)
{
u32 reg[2];
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name = of_clk_get_parent_name(np, 0);
if (WARN_ON(of_property_read_u32_array(np, "reg", reg, 2)))
return;
@@ -89,7 +89,7 @@ CLK_OF_DECLARE(emev2_smu_clkdiv, "renesas,emev2-smu-clkdiv",
static void __init emev2_smu_gclk_init(struct device_node *np)
{
u32 reg[2];
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name = of_clk_get_parent_name(np, 0);
if (WARN_ON(of_property_read_u32_array(np, "reg", reg, 2)))
return;
diff --git a/drivers/clk/shmobile/clk-mstp.c b/drivers/clk/shmobile/clk-mstp.c
index 2d2fe77..2659676 100644
--- a/drivers/clk/shmobile/clk-mstp.c
+++ b/drivers/clk/shmobile/clk-mstp.c
@@ -121,13 +121,13 @@ static const struct clk_ops cpg_mstp_clock_ops = {
.is_enabled = cpg_mstp_clock_is_enabled,
};
-static struct clk * __init
+static struct clk_core * __init
cpg_mstp_clock_register(const char *name, const char *parent_name,
unsigned int index, struct mstp_clock_group *group)
{
struct clk_init_data init;
struct mstp_clock *clock;
- struct clk *clk;
+ struct clk_core *clk;
clock = kzalloc(sizeof(*clock), GFP_KERNEL);
if (!clock) {
@@ -157,7 +157,7 @@ static void __init cpg_mstp_clocks_init(struct device_node *np)
{
struct mstp_clock_group *group;
const char *idxname;
- struct clk **clks;
+ struct clk_core **clks;
unsigned int i;
group = kzalloc(sizeof(*group), GFP_KERNEL);
diff --git a/drivers/clk/shmobile/clk-r8a7740.c b/drivers/clk/shmobile/clk-r8a7740.c
index 1e2eaae..8889e6a 100644
--- a/drivers/clk/shmobile/clk-r8a7740.c
+++ b/drivers/clk/shmobile/clk-r8a7740.c
@@ -61,7 +61,7 @@ static const struct clk_div_table div4_div_table[] = {
static u32 cpg_mode __initdata;
-static struct clk * __init
+static struct clk_core * __init
r8a7740_cpg_register_clock(struct device_node *np, struct r8a7740_cpg *cpg,
const char *name)
{
@@ -147,7 +147,7 @@ r8a7740_cpg_register_clock(struct device_node *np, struct r8a7740_cpg *cpg,
static void __init r8a7740_cpg_clocks_init(struct device_node *np)
{
struct r8a7740_cpg *cpg;
- struct clk **clks;
+ struct clk_core **clks;
unsigned int i;
int num_clks;
@@ -180,7 +180,7 @@ static void __init r8a7740_cpg_clocks_init(struct device_node *np)
for (i = 0; i < num_clks; ++i) {
const char *name;
- struct clk *clk;
+ struct clk_core *clk;
of_property_read_string_index(np, "clock-output-names", i,
&name);
diff --git a/drivers/clk/shmobile/clk-r8a7779.c b/drivers/clk/shmobile/clk-r8a7779.c
index 652ecac..96b51b1 100644
--- a/drivers/clk/shmobile/clk-r8a7779.c
+++ b/drivers/clk/shmobile/clk-r8a7779.c
@@ -90,7 +90,7 @@ static const unsigned int cpg_plla_mult[4] __initconst = { 42, 48, 56, 64 };
static u32 cpg_mode __initdata;
-static struct clk * __init
+static struct clk_core * __init
r8a7779_cpg_register_clock(struct device_node *np, struct r8a7779_cpg *cpg,
const struct cpg_clk_config *config,
unsigned int plla_mult, const char *name)
@@ -124,7 +124,7 @@ static void __init r8a7779_cpg_clocks_init(struct device_node *np)
{
const struct cpg_clk_config *config;
struct r8a7779_cpg *cpg;
- struct clk **clks;
+ struct clk_core **clks;
unsigned int i, plla_mult;
int num_clks;
@@ -153,7 +153,7 @@ static void __init r8a7779_cpg_clocks_init(struct device_node *np)
for (i = 0; i < num_clks; ++i) {
const char *name;
- struct clk *clk;
+ struct clk_core *clk;
of_property_read_string_index(np, "clock-output-names", i,
&name);
diff --git a/drivers/clk/shmobile/clk-rcar-gen2.c b/drivers/clk/shmobile/clk-rcar-gen2.c
index e996425..45a0712 100644
--- a/drivers/clk/shmobile/clk-rcar-gen2.c
+++ b/drivers/clk/shmobile/clk-rcar-gen2.c
@@ -133,12 +133,12 @@ static const struct clk_ops cpg_z_clk_ops = {
.set_rate = cpg_z_clk_set_rate,
};
-static struct clk * __init cpg_z_clk_register(struct rcar_gen2_cpg *cpg)
+static struct clk_core * __init cpg_z_clk_register(struct rcar_gen2_cpg *cpg)
{
static const char *parent_name = "pll0";
struct clk_init_data init;
struct cpg_z_clk *zclk;
- struct clk *clk;
+ struct clk_core *clk;
zclk = kzalloc(sizeof(*zclk), GFP_KERNEL);
if (!zclk)
@@ -213,7 +213,7 @@ static const struct clk_div_table cpg_sd01_div_table[] = {
static u32 cpg_mode __initdata;
-static struct clk * __init
+static struct clk_core * __init
rcar_gen2_cpg_register_clock(struct device_node *np, struct rcar_gen2_cpg *cpg,
const struct cpg_pll_config *config,
const char *name)
@@ -280,7 +280,7 @@ static void __init rcar_gen2_cpg_clocks_init(struct device_node *np)
{
const struct cpg_pll_config *config;
struct rcar_gen2_cpg *cpg;
- struct clk **clks;
+ struct clk_core **clks;
unsigned int i;
int num_clks;
@@ -313,7 +313,7 @@ static void __init rcar_gen2_cpg_clocks_init(struct device_node *np)
for (i = 0; i < num_clks; ++i) {
const char *name;
- struct clk *clk;
+ struct clk_core *clk;
of_property_read_string_index(np, "clock-output-names", i,
&name);
diff --git a/drivers/clk/shmobile/clk-rz.c b/drivers/clk/shmobile/clk-rz.c
index 7e68e86..414e20e 100644
--- a/drivers/clk/shmobile/clk-rz.c
+++ b/drivers/clk/shmobile/clk-rz.c
@@ -28,7 +28,7 @@ struct rz_cpg {
* Initialization
*/
-static struct clk * __init
+static struct clk_core * __init
rz_cpg_register_clock(struct device_node *np, struct rz_cpg *cpg, const char *name)
{
u32 val;
@@ -67,7 +67,7 @@ rz_cpg_register_clock(struct device_node *np, struct rz_cpg *cpg, const char *na
static void __init rz_cpg_clocks_init(struct device_node *np)
{
struct rz_cpg *cpg;
- struct clk **clks;
+ struct clk_core **clks;
unsigned i;
int num_clks;
@@ -86,7 +86,7 @@ static void __init rz_cpg_clocks_init(struct device_node *np)
for (i = 0; i < num_clks; ++i) {
const char *name;
- struct clk *clk;
+ struct clk_core *clk;
of_property_read_string_index(np, "clock-output-names", i, &name);
diff --git a/drivers/clk/sirf/clk-atlas6.c b/drivers/clk/sirf/clk-atlas6.c
index d63b76c..3b07a02 100644
--- a/drivers/clk/sirf/clk-atlas6.c
+++ b/drivers/clk/sirf/clk-atlas6.c
@@ -10,7 +10,6 @@
#include <linux/module.h>
#include <linux/bitops.h>
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of_address.h>
@@ -113,7 +112,7 @@ static __initdata struct clk_hw *atlas6_clk_hw_array[maxclk] = {
&clk_cphif.hw,
};
-static struct clk *atlas6_clks[maxclk];
+static struct clk_core *atlas6_clks[maxclk];
static void __init atlas6_clk_init(struct device_node *np)
{
diff --git a/drivers/clk/sirf/clk-common.c b/drivers/clk/sirf/clk-common.c
index 37af51c..05f5040 100644
--- a/drivers/clk/sirf/clk-common.c
+++ b/drivers/clk/sirf/clk-common.c
@@ -165,9 +165,9 @@ static long cpu_clk_round_rate(struct clk_hw *hw, unsigned long rate,
* SiRF SoC has not cpu clock control,
* So bypass to it's parent pll.
*/
- struct clk *parent_clk = clk_get_parent(hw->clk);
- struct clk *pll_parent_clk = clk_get_parent(parent_clk);
- unsigned long pll_parent_rate = clk_get_rate(pll_parent_clk);
+ struct clk_core *parent_clk = clk_provider_get_parent(hw->clk);
+ struct clk_core *pll_parent_clk = clk_provider_get_parent(parent_clk);
+ unsigned long pll_parent_rate = clk_provider_get_rate(pll_parent_clk);
return pll_clk_round_rate(__clk_get_hw(parent_clk), rate, &pll_parent_rate);
}
@@ -178,7 +178,7 @@ static unsigned long cpu_clk_recalc_rate(struct clk_hw *hw,
* SiRF SoC has not cpu clock control,
* So return the parent pll rate.
*/
- struct clk *parent_clk = clk_get_parent(hw->clk);
+ struct clk_core *parent_clk = clk_provider_get_parent(hw->clk);
return __clk_get_rate(parent_clk);
}
@@ -403,34 +403,34 @@ static int cpu_clk_set_rate(struct clk_hw *hw, unsigned long rate,
unsigned long parent_rate)
{
int ret1, ret2;
- struct clk *cur_parent;
+ struct clk_core *cur_parent;
- if (rate == clk_get_rate(clk_pll1.hw.clk)) {
- ret1 = clk_set_parent(hw->clk, clk_pll1.hw.clk);
+ if (rate == clk_provider_get_rate(clk_pll1.hw.clk)) {
+ ret1 = clk_provider_set_parent(hw->clk, clk_pll1.hw.clk);
return ret1;
}
- if (rate == clk_get_rate(clk_pll2.hw.clk)) {
- ret1 = clk_set_parent(hw->clk, clk_pll2.hw.clk);
+ if (rate == clk_provider_get_rate(clk_pll2.hw.clk)) {
+ ret1 = clk_provider_set_parent(hw->clk, clk_pll2.hw.clk);
return ret1;
}
- if (rate == clk_get_rate(clk_pll3.hw.clk)) {
- ret1 = clk_set_parent(hw->clk, clk_pll3.hw.clk);
+ if (rate == clk_provider_get_rate(clk_pll3.hw.clk)) {
+ ret1 = clk_provider_set_parent(hw->clk, clk_pll3.hw.clk);
return ret1;
}
- cur_parent = clk_get_parent(hw->clk);
+ cur_parent = clk_provider_get_parent(hw->clk);
/* switch to tmp pll before setting parent clock's rate */
if (cur_parent == clk_pll1.hw.clk) {
- ret1 = clk_set_parent(hw->clk, clk_pll2.hw.clk);
+ ret1 = clk_provider_set_parent(hw->clk, clk_pll2.hw.clk);
BUG_ON(ret1);
}
- ret2 = clk_set_rate(clk_pll1.hw.clk, rate);
+ ret2 = clk_provider_set_rate(clk_pll1.hw.clk, rate);
- ret1 = clk_set_parent(hw->clk, clk_pll1.hw.clk);
+ ret1 = clk_provider_set_parent(hw->clk, clk_pll1.hw.clk);
return ret2 ? ret2 : ret1;
}
diff --git a/drivers/clk/sirf/clk-prima2.c b/drivers/clk/sirf/clk-prima2.c
index 6968e2e..869bc8c 100644
--- a/drivers/clk/sirf/clk-prima2.c
+++ b/drivers/clk/sirf/clk-prima2.c
@@ -10,7 +10,6 @@
#include <linux/module.h>
#include <linux/bitops.h>
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of_address.h>
@@ -112,7 +111,7 @@ static __initdata struct clk_hw *prima2_clk_hw_array[maxclk] = {
&clk_cphif.hw,
};
-static struct clk *prima2_clks[maxclk];
+static struct clk_core *prima2_clks[maxclk];
static void __init prima2_clk_init(struct device_node *np)
{
diff --git a/drivers/clk/socfpga/clk-gate.c b/drivers/clk/socfpga/clk-gate.c
index dd3a78c..5d00dee 100644
--- a/drivers/clk/socfpga/clk-gate.c
+++ b/drivers/clk/socfpga/clk-gate.c
@@ -15,7 +15,6 @@
* Based from clk-highbank.c
*
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/io.h>
@@ -188,7 +187,7 @@ static void __init __socfpga_gate_init(struct device_node *node,
u32 div_reg[3];
u32 clk_phase[2];
u32 fixed_div;
- struct clk *clk;
+ struct clk_core *clk;
struct socfpga_gate_clk *socfpga_clk;
const char *clk_name = node->name;
const char *parent_name[SOCFPGA_MAX_PARENTS];
diff --git a/drivers/clk/socfpga/clk-periph.c b/drivers/clk/socfpga/clk-periph.c
index 46531c3..1bcb275 100644
--- a/drivers/clk/socfpga/clk-periph.c
+++ b/drivers/clk/socfpga/clk-periph.c
@@ -15,7 +15,6 @@
* Based from clk-highbank.c
*
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/io.h>
@@ -53,7 +52,7 @@ static __init void __socfpga_periph_init(struct device_node *node,
const struct clk_ops *ops)
{
u32 reg;
- struct clk *clk;
+ struct clk_core *clk;
struct socfpga_periph_clk *periph_clk;
const char *clk_name = node->name;
const char *parent_name;
diff --git a/drivers/clk/socfpga/clk-pll.c b/drivers/clk/socfpga/clk-pll.c
index de6da95..ba7073f 100644
--- a/drivers/clk/socfpga/clk-pll.c
+++ b/drivers/clk/socfpga/clk-pll.c
@@ -15,7 +15,6 @@
* Based from clk-highbank.c
*
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/io.h>
@@ -81,11 +80,11 @@ static struct clk_ops clk_pll_ops = {
.get_parent = clk_pll_get_parent,
};
-static __init struct clk *__socfpga_pll_init(struct device_node *node,
+static __init struct clk_core *__socfpga_pll_init(struct device_node *node,
const struct clk_ops *ops)
{
u32 reg;
- struct clk *clk;
+ struct clk_core *clk;
struct socfpga_pll *pll_clk;
const char *clk_name = node->name;
const char *parent_name[SOCFPGA_MAX_PARENTS];
diff --git a/drivers/clk/spear/clk-aux-synth.c b/drivers/clk/spear/clk-aux-synth.c
index bdfb442..18334c3 100644
--- a/drivers/clk/spear/clk-aux-synth.c
+++ b/drivers/clk/spear/clk-aux-synth.c
@@ -134,14 +134,14 @@ static struct clk_ops clk_aux_ops = {
.set_rate = clk_aux_set_rate,
};
-struct clk *clk_register_aux(const char *aux_name, const char *gate_name,
+struct clk_core *clk_register_aux(const char *aux_name, const char *gate_name,
const char *parent_name, unsigned long flags, void __iomem *reg,
struct aux_clk_masks *masks, struct aux_rate_tbl *rtbl,
- u8 rtbl_cnt, spinlock_t *lock, struct clk **gate_clk)
+ u8 rtbl_cnt, spinlock_t *lock, struct clk_core **gate_clk)
{
struct clk_aux *aux;
struct clk_init_data init;
- struct clk *clk;
+ struct clk_core *clk;
if (!aux_name || !parent_name || !reg || !rtbl || !rtbl_cnt) {
pr_err("Invalid arguments passed");
@@ -177,7 +177,7 @@ struct clk *clk_register_aux(const char *aux_name, const char *gate_name,
goto free_aux;
if (gate_name) {
- struct clk *tgate_clk;
+ struct clk_core *tgate_clk;
tgate_clk = clk_register_gate(NULL, gate_name, aux_name,
CLK_SET_RATE_PARENT, reg,
diff --git a/drivers/clk/spear/clk-frac-synth.c b/drivers/clk/spear/clk-frac-synth.c
index dffd4ce..bce2c0e 100644
--- a/drivers/clk/spear/clk-frac-synth.c
+++ b/drivers/clk/spear/clk-frac-synth.c
@@ -122,13 +122,13 @@ static struct clk_ops clk_frac_ops = {
.set_rate = clk_frac_set_rate,
};
-struct clk *clk_register_frac(const char *name, const char *parent_name,
+struct clk_core *clk_register_frac(const char *name, const char *parent_name,
unsigned long flags, void __iomem *reg,
struct frac_rate_tbl *rtbl, u8 rtbl_cnt, spinlock_t *lock)
{
struct clk_init_data init;
struct clk_frac *frac;
- struct clk *clk;
+ struct clk_core *clk;
if (!name || !parent_name || !reg || !rtbl || !rtbl_cnt) {
pr_err("Invalid arguments passed");
diff --git a/drivers/clk/spear/clk-gpt-synth.c b/drivers/clk/spear/clk-gpt-synth.c
index 1afc18c..f8e13f3 100644
--- a/drivers/clk/spear/clk-gpt-synth.c
+++ b/drivers/clk/spear/clk-gpt-synth.c
@@ -111,13 +111,13 @@ static struct clk_ops clk_gpt_ops = {
.set_rate = clk_gpt_set_rate,
};
-struct clk *clk_register_gpt(const char *name, const char *parent_name, unsigned
+struct clk_core *clk_register_gpt(const char *name, const char *parent_name, unsigned
long flags, void __iomem *reg, struct gpt_rate_tbl *rtbl, u8
rtbl_cnt, spinlock_t *lock)
{
struct clk_init_data init;
struct clk_gpt *gpt;
- struct clk *clk;
+ struct clk_core *clk;
if (!name || !parent_name || !reg || !rtbl || !rtbl_cnt) {
pr_err("Invalid arguments passed");
diff --git a/drivers/clk/spear/clk-vco-pll.c b/drivers/clk/spear/clk-vco-pll.c
index 1b9b65b..226f2ec 100644
--- a/drivers/clk/spear/clk-vco-pll.c
+++ b/drivers/clk/spear/clk-vco-pll.c
@@ -272,16 +272,16 @@ static struct clk_ops clk_vco_ops = {
.set_rate = clk_vco_set_rate,
};
-struct clk *clk_register_vco_pll(const char *vco_name, const char *pll_name,
+struct clk_core *clk_register_vco_pll(const char *vco_name, const char *pll_name,
const char *vco_gate_name, const char *parent_name,
unsigned long flags, void __iomem *mode_reg, void __iomem
*cfg_reg, struct pll_rate_tbl *rtbl, u8 rtbl_cnt,
- spinlock_t *lock, struct clk **pll_clk,
- struct clk **vco_gate_clk)
+ spinlock_t *lock, struct clk_core **pll_clk,
+ struct clk_core **vco_gate_clk)
{
struct clk_vco *vco;
struct clk_pll *pll;
- struct clk *vco_clk, *tpll_clk, *tvco_gate_clk;
+ struct clk_core *vco_clk, *tpll_clk, *tvco_gate_clk;
struct clk_init_data vco_init, pll_init;
const char **vco_parent_name;
diff --git a/drivers/clk/spear/clk.h b/drivers/clk/spear/clk.h
index 9317376..777322e 100644
--- a/drivers/clk/spear/clk.h
+++ b/drivers/clk/spear/clk.h
@@ -110,22 +110,22 @@ typedef unsigned long (*clk_calc_rate)(struct clk_hw *hw, unsigned long prate,
int index);
/* clk register routines */
-struct clk *clk_register_aux(const char *aux_name, const char *gate_name,
+struct clk_core *clk_register_aux(const char *aux_name, const char *gate_name,
const char *parent_name, unsigned long flags, void __iomem *reg,
struct aux_clk_masks *masks, struct aux_rate_tbl *rtbl,
- u8 rtbl_cnt, spinlock_t *lock, struct clk **gate_clk);
-struct clk *clk_register_frac(const char *name, const char *parent_name,
+ u8 rtbl_cnt, spinlock_t *lock, struct clk_core **gate_clk);
+struct clk_core *clk_register_frac(const char *name, const char *parent_name,
unsigned long flags, void __iomem *reg,
struct frac_rate_tbl *rtbl, u8 rtbl_cnt, spinlock_t *lock);
-struct clk *clk_register_gpt(const char *name, const char *parent_name, unsigned
+struct clk_core *clk_register_gpt(const char *name, const char *parent_name, unsigned
long flags, void __iomem *reg, struct gpt_rate_tbl *rtbl, u8
rtbl_cnt, spinlock_t *lock);
-struct clk *clk_register_vco_pll(const char *vco_name, const char *pll_name,
+struct clk_core *clk_register_vco_pll(const char *vco_name, const char *pll_name,
const char *vco_gate_name, const char *parent_name,
unsigned long flags, void __iomem *mode_reg, void __iomem
*cfg_reg, struct pll_rate_tbl *rtbl, u8 rtbl_cnt,
- spinlock_t *lock, struct clk **pll_clk,
- struct clk **vco_gate_clk);
+ spinlock_t *lock, struct clk_core **pll_clk,
+ struct clk_core **vco_gate_clk);
long clk_round_rate_index(struct clk_hw *hw, unsigned long drate,
unsigned long parent_rate, clk_calc_rate calc_rate, u8 rtbl_cnt,
diff --git a/drivers/clk/spear/spear1310_clock.c b/drivers/clk/spear/spear1310_clock.c
index 4daa597..58206e0 100644
--- a/drivers/clk/spear/spear1310_clock.c
+++ b/drivers/clk/spear/spear1310_clock.c
@@ -11,7 +11,6 @@
* warranty of any kind, whether express or implied.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/err.h>
#include <linux/io.h>
@@ -385,7 +384,7 @@ static const char *tdm_parents[] = { "ras_pll3_clk", "gen_syn1_clk", };
void __init spear1310_clk_init(void __iomem *misc_base, void __iomem *ras_base)
{
- struct clk *clk, *clk1;
+ struct clk_core *clk, *clk1;
clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT,
32000);
diff --git a/drivers/clk/spear/spear1340_clock.c b/drivers/clk/spear/spear1340_clock.c
index 5a5c664..704301c 100644
--- a/drivers/clk/spear/spear1340_clock.c
+++ b/drivers/clk/spear/spear1340_clock.c
@@ -11,7 +11,6 @@
* warranty of any kind, whether express or implied.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/err.h>
#include <linux/io.h>
@@ -442,7 +441,7 @@ static const char *gen_synth2_3_parents[] = { "vco1div4_clk", "vco2div2_clk",
void __init spear1340_clk_init(void __iomem *misc_base)
{
- struct clk *clk, *clk1;
+ struct clk_core *clk, *clk1;
clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT,
32000);
diff --git a/drivers/clk/spear/spear3xx_clock.c b/drivers/clk/spear/spear3xx_clock.c
index bb5f387..40d1b08 100644
--- a/drivers/clk/spear/spear3xx_clock.c
+++ b/drivers/clk/spear/spear3xx_clock.c
@@ -9,7 +9,6 @@
* warranty of any kind, whether express or implied.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/err.h>
#include <linux/io.h>
@@ -140,7 +139,7 @@ static const char *ddr_parents[] = { "ahb_clk", "ahbmult2_clk", "none",
#ifdef CONFIG_MACH_SPEAR300
static void __init spear300_clk_init(void)
{
- struct clk *clk;
+ struct clk_core *clk;
clk = clk_register_fixed_factor(NULL, "clcd_clk", "ras_pll3_clk", 0,
1, 1);
@@ -170,7 +169,7 @@ static inline void spear300_clk_init(void) { }
#ifdef CONFIG_MACH_SPEAR310
static void __init spear310_clk_init(void)
{
- struct clk *clk;
+ struct clk_core *clk;
clk = clk_register_fixed_factor(NULL, "emi_clk", "ras_ahb_clk", 0, 1,
1);
@@ -246,9 +245,9 @@ static const char *smii0_parents[] = { "smii_125m_pad", "ras_pll2_clk",
static const char *uartx_parents[] = { "ras_syn1_gclk", "ras_apb_clk", };
static void __init spear320_clk_init(void __iomem *soc_config_base,
- struct clk *ras_apb_clk)
+ struct clk_core *ras_apb_clk)
{
- struct clk *clk;
+ struct clk_core *clk;
clk = clk_register_fixed_rate(NULL, "smii_125m_pad_clk", NULL,
CLK_IS_ROOT, 125000000);
@@ -344,7 +343,7 @@ static void __init spear320_clk_init(void __iomem *soc_config_base,
0, &_lock);
clk_register_clkdev(clk, NULL, "a3000000.serial");
/* Enforce ras_apb_clk */
- clk_set_parent(clk, ras_apb_clk);
+ clk_provider_set_parent(clk, ras_apb_clk);
clk = clk_register_mux(NULL, "uart2_clk", uartx_parents,
ARRAY_SIZE(uartx_parents),
@@ -353,7 +352,7 @@ static void __init spear320_clk_init(void __iomem *soc_config_base,
SPEAR320_UARTX_PCLK_MASK, 0, &_lock);
clk_register_clkdev(clk, NULL, "a4000000.serial");
/* Enforce ras_apb_clk */
- clk_set_parent(clk, ras_apb_clk);
+ clk_provider_set_parent(clk, ras_apb_clk);
clk = clk_register_mux(NULL, "uart3_clk", uartx_parents,
ARRAY_SIZE(uartx_parents),
@@ -384,12 +383,12 @@ static void __init spear320_clk_init(void __iomem *soc_config_base,
clk_register_clkdev(clk, NULL, "60100000.serial");
}
#else
-static inline void spear320_clk_init(void __iomem *sb, struct clk *rc) { }
+static inline void spear320_clk_init(void __iomem *sb, struct clk_core *rc) { }
#endif
void __init spear3xx_clk_init(void __iomem *misc_base, void __iomem *soc_config_base)
{
- struct clk *clk, *clk1, *ras_apb_clk;
+ struct clk_core *clk, *clk1, *ras_apb_clk;
clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT,
32000);
diff --git a/drivers/clk/spear/spear6xx_clock.c b/drivers/clk/spear/spear6xx_clock.c
index 4f649c9..364a8d3 100644
--- a/drivers/clk/spear/spear6xx_clock.c
+++ b/drivers/clk/spear/spear6xx_clock.c
@@ -9,7 +9,6 @@
* warranty of any kind, whether express or implied.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/io.h>
#include <linux/spinlock_types.h>
@@ -116,7 +115,7 @@ static struct gpt_rate_tbl gpt_rtbl[] = {
void __init spear6xx_clk_init(void __iomem *misc_base)
{
- struct clk *clk, *clk1;
+ struct clk_core *clk, *clk1;
clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT,
32000);
diff --git a/drivers/clk/st/clk-flexgen.c b/drivers/clk/st/clk-flexgen.c
index 2282cef..699f7a1 100644
--- a/drivers/clk/st/clk-flexgen.c
+++ b/drivers/clk/st/clk-flexgen.c
@@ -163,12 +163,12 @@ static const struct clk_ops flexgen_ops = {
.set_rate = flexgen_set_rate,
};
-struct clk *clk_register_flexgen(const char *name,
+struct clk_core *clk_register_flexgen(const char *name,
const char **parent_names, u8 num_parents,
void __iomem *reg, spinlock_t *lock, u32 idx,
unsigned long flexgen_flags) {
struct flexgen *fgxbar;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
u32 xbar_shift;
void __iomem *xbar_reg, *fdiv_reg;
@@ -223,8 +223,8 @@ struct clk *clk_register_flexgen(const char *name,
else
pr_debug("%s: parent %s rate %u\n",
__clk_get_name(clk),
- __clk_get_name(clk_get_parent(clk)),
- (unsigned int)clk_get_rate(clk));
+ __clk_get_name(clk_provider_get_parent(clk)),
+ (unsigned int)clk_provider_get_rate(clk));
return clk;
}
@@ -283,7 +283,7 @@ void __init st_of_flexgen_setup(struct device_node *np)
goto err;
}
- clk_data->clks = kcalloc(clk_data->clk_num, sizeof(struct clk *),
+ clk_data->clks = kcalloc(clk_data->clk_num, sizeof(struct clk_core *),
GFP_KERNEL);
if (!clk_data->clks)
goto err;
@@ -293,7 +293,7 @@ void __init st_of_flexgen_setup(struct device_node *np)
goto err;
for (i = 0; i < clk_data->clk_num; i++) {
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name;
if (of_property_read_string_index(np, "clock-output-names",
diff --git a/drivers/clk/st/clkgen-fsyn.c b/drivers/clk/st/clkgen-fsyn.c
index af94ed8..ceda1f2 100644
--- a/drivers/clk/st/clkgen-fsyn.c
+++ b/drivers/clk/st/clkgen-fsyn.c
@@ -614,13 +614,13 @@ static const struct clk_ops st_quadfs_pll_c32_ops = {
.set_rate = quadfs_pll_fs660c32_set_rate,
};
-static struct clk * __init st_clk_register_quadfs_pll(
+static struct clk_core * __init st_clk_register_quadfs_pll(
const char *name, const char *parent_name,
struct clkgen_quadfs_data *quadfs, void __iomem *reg,
spinlock_t *lock)
{
struct st_clk_quadfs_pll *pll;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
/*
@@ -1018,13 +1018,13 @@ static const struct clk_ops st_quadfs_ops = {
.recalc_rate = quadfs_recalc_rate,
};
-static struct clk * __init st_clk_register_quadfs_fsynth(
+static struct clk_core * __init st_clk_register_quadfs_fsynth(
const char *name, const char *parent_name,
struct clkgen_quadfs_data *quadfs, void __iomem *reg, u32 chan,
spinlock_t *lock)
{
struct st_clk_quadfs_fsynth *fs;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
/*
@@ -1102,7 +1102,7 @@ static void __init st_of_create_quadfs_fsynths(
return;
clk_data->clk_num = QUADFS_MAX_CHAN;
- clk_data->clks = kzalloc(QUADFS_MAX_CHAN * sizeof(struct clk *),
+ clk_data->clks = kzalloc(QUADFS_MAX_CHAN * sizeof(struct clk_core *),
GFP_KERNEL);
if (!clk_data->clks) {
@@ -1111,7 +1111,7 @@ static void __init st_of_create_quadfs_fsynths(
}
for (fschan = 0; fschan < QUADFS_MAX_CHAN; fschan++) {
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name;
if (of_property_read_string_index(np, "clock-output-names",
@@ -1136,8 +1136,8 @@ static void __init st_of_create_quadfs_fsynths(
clk_data->clks[fschan] = clk;
pr_debug("%s: parent %s rate %u\n",
__clk_get_name(clk),
- __clk_get_name(clk_get_parent(clk)),
- (unsigned int)clk_get_rate(clk));
+ __clk_get_name(clk_provider_get_parent(clk)),
+ (unsigned int)clk_provider_get_rate(clk));
}
}
@@ -1147,7 +1147,7 @@ static void __init st_of_create_quadfs_fsynths(
static void __init st_of_quadfs_setup(struct device_node *np)
{
const struct of_device_id *match;
- struct clk *clk;
+ struct clk_core *clk;
const char *pll_name, *clk_parent_name;
void __iomem *reg;
spinlock_t *lock;
@@ -1181,8 +1181,8 @@ static void __init st_of_quadfs_setup(struct device_node *np)
else
pr_debug("%s: parent %s rate %u\n",
__clk_get_name(clk),
- __clk_get_name(clk_get_parent(clk)),
- (unsigned int)clk_get_rate(clk));
+ __clk_get_name(clk_provider_get_parent(clk)),
+ (unsigned int)clk_provider_get_rate(clk));
st_of_create_quadfs_fsynths(np, pll_name,
(struct clkgen_quadfs_data *)match->data,
diff --git a/drivers/clk/st/clkgen-mux.c b/drivers/clk/st/clkgen-mux.c
index 79dc40b..d2a951f 100644
--- a/drivers/clk/st/clkgen-mux.c
+++ b/drivers/clk/st/clkgen-mux.c
@@ -215,7 +215,7 @@ static const struct clk_ops clkgena_divmux_ops = {
/**
* clk_register_genamux - register a genamux clock with the clock framework
*/
-struct clk *clk_register_genamux(const char *name,
+struct clk_core *clk_register_genamux(const char *name,
const char **parent_names, u8 num_parents,
void __iomem *reg,
const struct clkgena_divmux_data *muxdata,
@@ -227,7 +227,7 @@ struct clk *clk_register_genamux(const char *name,
const int mux_width = 2;
const int divider_width = 5;
struct clkgena_divmux *genamux;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
int i;
@@ -280,8 +280,8 @@ struct clk *clk_register_genamux(const char *name,
pr_debug("%s: parent %s rate %lu\n",
__clk_get_name(clk),
- __clk_get_name(clk_get_parent(clk)),
- clk_get_rate(clk));
+ __clk_get_name(clk_provider_get_parent(clk)),
+ clk_provider_get_rate(clk));
err:
return clk;
}
@@ -413,14 +413,14 @@ void __init st_of_clkgena_divmux_setup(struct device_node *np)
goto err;
clk_data->clk_num = data->num_outputs;
- clk_data->clks = kzalloc(clk_data->clk_num * sizeof(struct clk *),
+ clk_data->clks = kzalloc(clk_data->clk_num * sizeof(struct clk_core *),
GFP_KERNEL);
if (!clk_data->clks)
goto err;
for (i = 0; i < clk_data->clk_num; i++) {
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name;
if (of_property_read_string_index(np, "clock-output-names",
@@ -490,7 +490,7 @@ void __init st_of_clkgena_prediv_setup(struct device_node *np)
const struct of_device_id *match;
void __iomem *reg;
const char *parent_name, *clk_name;
- struct clk *clk;
+ struct clk_core *clk;
struct clkgena_prediv_data *data;
match = of_match_node(clkgena_prediv_of_match, np);
@@ -522,8 +522,8 @@ void __init st_of_clkgena_prediv_setup(struct device_node *np)
of_clk_add_provider(np, of_clk_src_simple_get, clk);
pr_debug("%s: parent %s rate %u\n",
__clk_get_name(clk),
- __clk_get_name(clk_get_parent(clk)),
- (unsigned int)clk_get_rate(clk));
+ __clk_get_name(clk_provider_get_parent(clk)),
+ (unsigned int)clk_provider_get_rate(clk));
return;
}
@@ -625,7 +625,7 @@ static struct of_device_id mux_of_match[] = {
void __init st_of_clkgen_mux_setup(struct device_node *np)
{
const struct of_device_id *match;
- struct clk *clk;
+ struct clk_core *clk;
void __iomem *reg;
const char **parents;
int num_parents;
@@ -662,8 +662,8 @@ void __init st_of_clkgen_mux_setup(struct device_node *np)
pr_debug("%s: parent %s rate %u\n",
__clk_get_name(clk),
- __clk_get_name(clk_get_parent(clk)),
- (unsigned int)clk_get_rate(clk));
+ __clk_get_name(clk_provider_get_parent(clk)),
+ (unsigned int)clk_provider_get_rate(clk));
of_clk_add_provider(np, of_clk_src_simple_get, clk);
@@ -726,14 +726,14 @@ void __init st_of_clkgen_vcc_setup(struct device_node *np)
goto err;
clk_data->clk_num = VCC_MAX_CHANNELS;
- clk_data->clks = kzalloc(clk_data->clk_num * sizeof(struct clk *),
+ clk_data->clks = kzalloc(clk_data->clk_num * sizeof(struct clk_core *),
GFP_KERNEL);
if (!clk_data->clks)
goto err;
for (i = 0; i < clk_data->clk_num; i++) {
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name;
struct clk_gate *gate;
struct clk_divider *div;
@@ -796,8 +796,8 @@ void __init st_of_clkgen_vcc_setup(struct device_node *np)
pr_debug("%s: parent %s rate %u\n",
__clk_get_name(clk),
- __clk_get_name(clk_get_parent(clk)),
- (unsigned int)clk_get_rate(clk));
+ __clk_get_name(clk_provider_get_parent(clk)),
+ (unsigned int)clk_provider_get_rate(clk));
clk_data->clks[i] = clk;
}
diff --git a/drivers/clk/st/clkgen-pll.c b/drivers/clk/st/clkgen-pll.c
index 29769d7..32bac02 100644
--- a/drivers/clk/st/clkgen-pll.c
+++ b/drivers/clk/st/clkgen-pll.c
@@ -390,13 +390,13 @@ static const struct clk_ops st_pll1200c32_ops = {
.recalc_rate = recalc_stm_pll1200c32,
};
-static struct clk * __init clkgen_pll_register(const char *parent_name,
+static struct clk_core * __init clkgen_pll_register(const char *parent_name,
struct clkgen_pll_data *pll_data,
void __iomem *reg,
const char *clk_name)
{
struct clkgen_pll *pll;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
pll = kzalloc(sizeof(*pll), GFP_KERNEL);
@@ -422,16 +422,16 @@ static struct clk * __init clkgen_pll_register(const char *parent_name,
pr_debug("%s: parent %s rate %lu\n",
__clk_get_name(clk),
- __clk_get_name(clk_get_parent(clk)),
- clk_get_rate(clk));
+ __clk_get_name(clk_provider_get_parent(clk)),
+ clk_provider_get_rate(clk));
return clk;
}
-static struct clk * __init clkgen_c65_lsdiv_register(const char *parent_name,
+static struct clk_core * __init clkgen_c65_lsdiv_register(const char *parent_name,
const char *clk_name)
{
- struct clk *clk;
+ struct clk_core *clk;
clk = clk_register_fixed_factor(NULL, clk_name, parent_name, 0, 1, 2);
if (IS_ERR(clk))
@@ -439,8 +439,8 @@ static struct clk * __init clkgen_c65_lsdiv_register(const char *parent_name,
pr_debug("%s: parent %s rate %lu\n",
__clk_get_name(clk),
- __clk_get_name(clk_get_parent(clk)),
- clk_get_rate(clk));
+ __clk_get_name(clk_provider_get_parent(clk)),
+ clk_provider_get_rate(clk));
return clk;
}
@@ -484,7 +484,7 @@ static void __init clkgena_c65_pll_setup(struct device_node *np)
return;
clk_data->clk_num = num_pll_outputs;
- clk_data->clks = kzalloc(clk_data->clk_num * sizeof(struct clk *),
+ clk_data->clks = kzalloc(clk_data->clk_num * sizeof(struct clk_core *),
GFP_KERNEL);
if (!clk_data->clks)
@@ -543,14 +543,14 @@ err:
CLK_OF_DECLARE(clkgena_c65_plls,
"st,clkgena-plls-c65", clkgena_c65_pll_setup);
-static struct clk * __init clkgen_odf_register(const char *parent_name,
+static struct clk_core * __init clkgen_odf_register(const char *parent_name,
void * __iomem reg,
struct clkgen_pll_data *pll_data,
int odf,
spinlock_t *odf_lock,
const char *odf_name)
{
- struct clk *clk;
+ struct clk_core *clk;
unsigned long flags;
struct clk_gate *gate;
struct clk_divider *div;
@@ -588,8 +588,8 @@ static struct clk * __init clkgen_odf_register(const char *parent_name,
pr_debug("%s: parent %s rate %lu\n",
__clk_get_name(clk),
- __clk_get_name(clk_get_parent(clk)),
- clk_get_rate(clk));
+ __clk_get_name(clk_provider_get_parent(clk)),
+ clk_provider_get_rate(clk));
return clk;
}
@@ -640,7 +640,7 @@ static struct of_device_id c32_pll_of_match[] = {
static void __init clkgen_c32_pll_setup(struct device_node *np)
{
const struct of_device_id *match;
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name, *pll_name;
void __iomem *pll_base;
int num_odfs, odf;
@@ -676,14 +676,14 @@ static void __init clkgen_c32_pll_setup(struct device_node *np)
return;
clk_data->clk_num = num_odfs;
- clk_data->clks = kzalloc(clk_data->clk_num * sizeof(struct clk *),
+ clk_data->clks = kzalloc(clk_data->clk_num * sizeof(struct clk_core *),
GFP_KERNEL);
if (!clk_data->clks)
goto err;
for (odf = 0; odf < num_odfs; odf++) {
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name;
if (of_property_read_string_index(np, "clock-output-names",
@@ -723,7 +723,7 @@ static struct of_device_id c32_gpu_pll_of_match[] = {
static void __init clkgengpu_c32_pll_setup(struct device_node *np)
{
const struct of_device_id *match;
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name;
void __iomem *reg;
const char *clk_name;
diff --git a/drivers/clk/sunxi/clk-a10-hosc.c b/drivers/clk/sunxi/clk-a10-hosc.c
index 0481d5d..c5e4c41 100644
--- a/drivers/clk/sunxi/clk-a10-hosc.c
+++ b/drivers/clk/sunxi/clk-a10-hosc.c
@@ -25,7 +25,7 @@ static DEFINE_SPINLOCK(hosc_lock);
static void __init sun4i_osc_clk_setup(struct device_node *node)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_fixed_rate *fixed;
struct clk_gate *gate;
const char *clk_name = node->name;
diff --git a/drivers/clk/sunxi/clk-a20-gmac.c b/drivers/clk/sunxi/clk-a20-gmac.c
index 5296fd6..63c7dd5 100644
--- a/drivers/clk/sunxi/clk-a20-gmac.c
+++ b/drivers/clk/sunxi/clk-a20-gmac.c
@@ -55,7 +55,7 @@ static DEFINE_SPINLOCK(gmac_lock);
static void __init sun7i_a20_gmac_clk_setup(struct device_node *node)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_mux *mux;
struct clk_gate *gate;
const char *clk_name = node->name;
diff --git a/drivers/clk/sunxi/clk-factors.c b/drivers/clk/sunxi/clk-factors.c
index 2057c8a..bb2d4b2 100644
--- a/drivers/clk/sunxi/clk-factors.c
+++ b/drivers/clk/sunxi/clk-factors.c
@@ -79,9 +79,9 @@ static long clk_factors_round_rate(struct clk_hw *hw, unsigned long rate,
static long clk_factors_determine_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *best_parent_rate,
- struct clk **best_parent_p)
+ struct clk_core **best_parent_p)
{
- struct clk *clk = hw->clk, *parent, *best_parent = NULL;
+ struct clk_core *clk = hw->clk, *parent, *best_parent = NULL;
int i, num_parents;
unsigned long parent_rate, best = 0, child_rate, best_child_rate = 0;
diff --git a/drivers/clk/sunxi/clk-sun6i-apb0-gates.c b/drivers/clk/sunxi/clk-sun6i-apb0-gates.c
index e10d052..f29b06e 100644
--- a/drivers/clk/sunxi/clk-sun6i-apb0-gates.c
+++ b/drivers/clk/sunxi/clk-sun6i-apb0-gates.c
@@ -74,7 +74,7 @@ static int sun6i_a31_apb0_gates_clk_probe(struct platform_device *pdev)
/* Worst-case size approximation and memory allocation */
ngates = find_last_bit(data->mask, SUN6I_APB0_GATES_MAX_SIZE);
clk_data->clks = devm_kcalloc(&pdev->dev, (ngates + 1),
- sizeof(struct clk *), GFP_KERNEL);
+ sizeof(struct clk_core *), GFP_KERNEL);
if (!clk_data->clks)
return -ENOMEM;
diff --git a/drivers/clk/sunxi/clk-sun6i-apb0.c b/drivers/clk/sunxi/clk-sun6i-apb0.c
index 1fa2337..5e4649e 100644
--- a/drivers/clk/sunxi/clk-sun6i-apb0.c
+++ b/drivers/clk/sunxi/clk-sun6i-apb0.c
@@ -35,7 +35,7 @@ static int sun6i_a31_apb0_clk_probe(struct platform_device *pdev)
const char *clk_parent;
struct resource *r;
void __iomem *reg;
- struct clk *clk;
+ struct clk_core *clk;
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
reg = devm_ioremap_resource(&pdev->dev, r);
diff --git a/drivers/clk/sunxi/clk-sun6i-ar100.c b/drivers/clk/sunxi/clk-sun6i-ar100.c
index eca8ca0..984d5d0 100644
--- a/drivers/clk/sunxi/clk-sun6i-ar100.c
+++ b/drivers/clk/sunxi/clk-sun6i-ar100.c
@@ -46,7 +46,7 @@ static unsigned long ar100_recalc_rate(struct clk_hw *hw,
static long ar100_determine_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *best_parent_rate,
- struct clk **best_parent_clk)
+ struct clk_core **best_parent_clk)
{
int nparents = __clk_get_num_parents(hw->clk);
long best_rate = -EINVAL;
@@ -57,7 +57,7 @@ static long ar100_determine_rate(struct clk_hw *hw, unsigned long rate,
for (i = 0; i < nparents; i++) {
unsigned long parent_rate;
unsigned long tmp_rate;
- struct clk *parent;
+ struct clk_core *parent;
unsigned long div;
int shift;
@@ -176,7 +176,7 @@ static int sun6i_a31_ar100_clk_probe(struct platform_device *pdev)
struct clk_init_data init;
struct ar100_clk *ar100;
struct resource *r;
- struct clk *clk;
+ struct clk_core *clk;
int nparents;
int i;
diff --git a/drivers/clk/sunxi/clk-sun8i-apb0.c b/drivers/clk/sunxi/clk-sun8i-apb0.c
index 1f5ba9b..fa308fd 100644
--- a/drivers/clk/sunxi/clk-sun8i-apb0.c
+++ b/drivers/clk/sunxi/clk-sun8i-apb0.c
@@ -26,7 +26,7 @@ static int sun8i_a23_apb0_clk_probe(struct platform_device *pdev)
const char *clk_parent;
struct resource *r;
void __iomem *reg;
- struct clk *clk;
+ struct clk_core *clk;
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
reg = devm_ioremap_resource(&pdev->dev, r);
diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
index b654b7b..44c4470 100644
--- a/drivers/clk/sunxi/clk-sunxi.c
+++ b/drivers/clk/sunxi/clk-sunxi.c
@@ -403,7 +403,7 @@ static void sun7i_a20_get_out_factors(u32 *freq, u32 parent_rate,
* clk_sunxi_mmc_phase_control() - configures MMC clock phase control
*/
-void clk_sunxi_mmc_phase_control(struct clk *clk, u8 sample, u8 output)
+void clk_sunxi_mmc_phase_control(struct clk_core *clk, u8 sample, u8 output)
{
#define to_clk_composite(_hw) container_of(_hw, struct clk_composite, hw)
#define to_clk_factors(_hw) container_of(_hw, struct clk_factors, hw)
@@ -582,10 +582,10 @@ static const struct factors_data sun7i_a20_out_data __initconst = {
.getter = sun7i_a20_get_out_factors,
};
-static struct clk * __init sunxi_factors_clk_setup(struct device_node *node,
+static struct clk_core * __init sunxi_factors_clk_setup(struct device_node *node,
const struct factors_data *data)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_factors *factors;
struct clk_gate *gate = NULL;
struct clk_mux *mux = NULL;
@@ -695,7 +695,7 @@ static const struct mux_data sun4i_apb1_mux_data __initconst = {
static void __init sunxi_mux_clk_setup(struct device_node *node,
struct mux_data *data)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name = node->name;
const char *parents[SUNXI_MAX_PARENTS];
void __iomem *reg;
@@ -777,7 +777,7 @@ static const struct div_data sun6i_a31_apb2_div_data __initconst = {
static void __init sunxi_divider_clk_setup(struct device_node *node,
struct div_data *data)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name = node->name;
const char *clk_parent;
void __iomem *reg;
@@ -976,7 +976,7 @@ static void __init sunxi_gates_clk_setup(struct device_node *node,
clk_data = kmalloc(sizeof(struct clk_onecell_data), GFP_KERNEL);
if (!clk_data)
return;
- clk_data->clks = kzalloc((qty+1) * sizeof(struct clk *), GFP_KERNEL);
+ clk_data->clks = kzalloc((qty+1) * sizeof(struct clk_core *), GFP_KERNEL);
if (!clk_data->clks) {
kfree(clk_data);
return;
@@ -1078,7 +1078,7 @@ static void __init sunxi_divs_clk_setup(struct device_node *node,
struct clk_onecell_data *clk_data;
const char *parent;
const char *clk_name;
- struct clk **clks, *pclk;
+ struct clk_core **clks, *pclk;
struct clk_hw *gate_hw, *rate_hw;
const struct clk_ops *rate_ops;
struct clk_gate *gate = NULL;
@@ -1291,10 +1291,10 @@ static void __init sunxi_init_clocks(const char *clocks[], int nclocks)
/* Protect the clocks that needs to stay on */
for (i = 0; i < nclocks; i++) {
- struct clk *clk = clk_get(NULL, clocks[i]);
+ struct clk_core *clk = clk_provider_get(NULL, clocks[i]);
if (!IS_ERR(clk))
- clk_prepare_enable(clk);
+ clk_provider_prepare_enable(clk);
}
}
diff --git a/drivers/clk/tegra/clk-audio-sync.c b/drivers/clk/tegra/clk-audio-sync.c
index c0f7843..53c3488 100644
--- a/drivers/clk/tegra/clk-audio-sync.c
+++ b/drivers/clk/tegra/clk-audio-sync.c
@@ -54,12 +54,12 @@ const struct clk_ops tegra_clk_sync_source_ops = {
.recalc_rate = clk_sync_source_recalc_rate,
};
-struct clk *tegra_clk_register_sync_source(const char *name,
+struct clk_core *tegra_clk_register_sync_source(const char *name,
unsigned long rate, unsigned long max_rate)
{
struct tegra_clk_sync_source *sync;
struct clk_init_data init;
- struct clk *clk;
+ struct clk_core *clk;
sync = kzalloc(sizeof(*sync), GFP_KERNEL);
if (!sync) {
diff --git a/drivers/clk/tegra/clk-divider.c b/drivers/clk/tegra/clk-divider.c
index 290f9c1..c69a728 100644
--- a/drivers/clk/tegra/clk-divider.c
+++ b/drivers/clk/tegra/clk-divider.c
@@ -19,7 +19,6 @@
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/clk-provider.h>
-#include <linux/clk.h>
#include "clk.h"
@@ -147,13 +146,13 @@ const struct clk_ops tegra_clk_frac_div_ops = {
.round_rate = clk_frac_div_round_rate,
};
-struct clk *tegra_clk_register_divider(const char *name,
+struct clk_core *tegra_clk_register_divider(const char *name,
const char *parent_name, void __iomem *reg,
unsigned long flags, u8 clk_divider_flags, u8 shift, u8 width,
u8 frac_width, spinlock_t *lock)
{
struct tegra_clk_frac_div *divider;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
divider = kzalloc(sizeof(*divider), GFP_KERNEL);
diff --git a/drivers/clk/tegra/clk-periph-gate.c b/drivers/clk/tegra/clk-periph-gate.c
index 0aa8830..d59200f 100644
--- a/drivers/clk/tegra/clk-periph-gate.c
+++ b/drivers/clk/tegra/clk-periph-gate.c
@@ -14,7 +14,6 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/slab.h>
#include <linux/io.h>
@@ -128,12 +127,12 @@ const struct clk_ops tegra_clk_periph_gate_ops = {
.disable = clk_periph_disable,
};
-struct clk *tegra_clk_register_periph_gate(const char *name,
+struct clk_core *tegra_clk_register_periph_gate(const char *name,
const char *parent_name, u8 gate_flags, void __iomem *clk_base,
unsigned long flags, int clk_num, int *enable_refcnt)
{
struct tegra_clk_periph_gate *gate;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
struct tegra_clk_periph_regs *pregs;
diff --git a/drivers/clk/tegra/clk-periph.c b/drivers/clk/tegra/clk-periph.c
index 9e899c18..34a60fd 100644
--- a/drivers/clk/tegra/clk-periph.c
+++ b/drivers/clk/tegra/clk-periph.c
@@ -14,7 +14,6 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/export.h>
#include <linux/slab.h>
@@ -138,13 +137,13 @@ static const struct clk_ops tegra_clk_periph_no_gate_ops = {
.set_rate = clk_periph_set_rate,
};
-static struct clk *_tegra_clk_register_periph(const char *name,
+static struct clk_core *_tegra_clk_register_periph(const char *name,
const char **parent_names, int num_parents,
struct tegra_clk_periph *periph,
void __iomem *clk_base, u32 offset,
unsigned long flags)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
struct tegra_clk_periph_regs *bank;
bool div = !(periph->gate.flags & TEGRA_PERIPH_NO_DIV);
@@ -186,7 +185,7 @@ static struct clk *_tegra_clk_register_periph(const char *name,
return clk;
}
-struct clk *tegra_clk_register_periph(const char *name,
+struct clk_core *tegra_clk_register_periph(const char *name,
const char **parent_names, int num_parents,
struct tegra_clk_periph *periph, void __iomem *clk_base,
u32 offset, unsigned long flags)
@@ -195,7 +194,7 @@ struct clk *tegra_clk_register_periph(const char *name,
periph, clk_base, offset, flags);
}
-struct clk *tegra_clk_register_periph_nodiv(const char *name,
+struct clk_core *tegra_clk_register_periph_nodiv(const char *name,
const char **parent_names, int num_parents,
struct tegra_clk_periph *periph, void __iomem *clk_base,
u32 offset)
diff --git a/drivers/clk/tegra/clk-pll-out.c b/drivers/clk/tegra/clk-pll-out.c
index 3598987..3adbc24 100644
--- a/drivers/clk/tegra/clk-pll-out.c
+++ b/drivers/clk/tegra/clk-pll-out.c
@@ -20,7 +20,6 @@
#include <linux/delay.h>
#include <linux/slab.h>
#include <linux/clk-provider.h>
-#include <linux/clk.h>
#include "clk.h"
@@ -87,13 +86,13 @@ const struct clk_ops tegra_clk_pll_out_ops = {
.disable = clk_pll_out_disable,
};
-struct clk *tegra_clk_register_pll_out(const char *name,
+struct clk_core *tegra_clk_register_pll_out(const char *name,
const char *parent_name, void __iomem *reg, u8 enb_bit_idx,
u8 rst_bit_idx, unsigned long flags, u8 pll_out_flags,
spinlock_t *lock)
{
struct tegra_clk_pll_out *pll_out;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
pll_out = kzalloc(sizeof(*pll_out), GFP_KERNEL);
diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c
index c7c6d8f..aa18eab 100644
--- a/drivers/clk/tegra/clk-pll.c
+++ b/drivers/clk/tegra/clk-pll.c
@@ -19,7 +19,6 @@
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/clk-provider.h>
-#include <linux/clk.h>
#include "clk.h"
@@ -729,7 +728,7 @@ static int clk_plle_training(struct tegra_clk_pll *pll)
static int clk_plle_enable(struct clk_hw *hw)
{
struct tegra_clk_pll *pll = to_clk_pll(hw);
- unsigned long input_rate = clk_get_rate(clk_get_parent(hw->clk));
+ unsigned long input_rate = clk_provider_get_rate(clk_provider_get_parent(hw->clk));
struct tegra_clk_pll_freq_table sel;
u32 val;
int err;
@@ -1033,7 +1032,7 @@ static int clk_pllm_set_rate(struct clk_hw *hw, unsigned long rate,
state = clk_pll_is_enabled(hw);
if (state) {
- if (rate != clk_get_rate(hw->clk)) {
+ if (rate != clk_provider_get_rate(hw->clk)) {
pr_err("%s: Cannot change active PLLM\n", __func__);
ret = -EINVAL;
goto out;
@@ -1285,7 +1284,7 @@ static int clk_plle_tegra114_enable(struct clk_hw *hw)
u32 val;
int ret;
unsigned long flags = 0;
- unsigned long input_rate = clk_get_rate(clk_get_parent(hw->clk));
+ unsigned long input_rate = clk_provider_get_rate(clk_provider_get_parent(hw->clk));
if (_get_table_rate(hw, &sel, pll->params->fixed_rate, input_rate))
return -EINVAL;
@@ -1430,7 +1429,7 @@ static struct tegra_clk_pll *_tegra_init_pll(void __iomem *clk_base,
return pll;
}
-static struct clk *_tegra_clk_register_pll(struct tegra_clk_pll *pll,
+static struct clk_core *_tegra_clk_register_pll(struct tegra_clk_pll *pll,
const char *name, const char *parent_name, unsigned long flags,
const struct clk_ops *ops)
{
@@ -1448,13 +1447,13 @@ static struct clk *_tegra_clk_register_pll(struct tegra_clk_pll *pll,
return clk_register(NULL, &pll->hw);
}
-struct clk *tegra_clk_register_pll(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_pll(const char *name, const char *parent_name,
void __iomem *clk_base, void __iomem *pmc,
unsigned long flags, struct tegra_clk_pll_params *pll_params,
spinlock_t *lock)
{
struct tegra_clk_pll *pll;
- struct clk *clk;
+ struct clk_core *clk;
pll_params->flags |= TEGRA_PLL_BYPASS;
pll_params->flags |= TEGRA_PLL_HAS_LOCK_ENABLE;
@@ -1479,13 +1478,13 @@ static struct div_nmp pll_e_nmp = {
.divp_width = PLLE_BASE_DIVP_WIDTH,
};
-struct clk *tegra_clk_register_plle(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_plle(const char *name, const char *parent_name,
void __iomem *clk_base, void __iomem *pmc,
unsigned long flags, struct tegra_clk_pll_params *pll_params,
spinlock_t *lock)
{
struct tegra_clk_pll *pll;
- struct clk *clk;
+ struct clk_core *clk;
pll_params->flags |= TEGRA_PLL_LOCK_MISC | TEGRA_PLL_BYPASS;
pll_params->flags |= TEGRA_PLL_HAS_LOCK_ENABLE;
@@ -1550,14 +1549,14 @@ static const struct clk_ops tegra_clk_plle_tegra114_ops = {
};
-struct clk *tegra_clk_register_pllxc(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_pllxc(const char *name, const char *parent_name,
void __iomem *clk_base, void __iomem *pmc,
unsigned long flags,
struct tegra_clk_pll_params *pll_params,
spinlock_t *lock)
{
struct tegra_clk_pll *pll;
- struct clk *clk, *parent;
+ struct clk_core *clk, *parent;
unsigned long parent_rate;
int err;
u32 val, val_iddq;
@@ -1603,7 +1602,7 @@ struct clk *tegra_clk_register_pllxc(const char *name, const char *parent_name,
return clk;
}
-struct clk *tegra_clk_register_pllre(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_pllre(const char *name, const char *parent_name,
void __iomem *clk_base, void __iomem *pmc,
unsigned long flags,
struct tegra_clk_pll_params *pll_params,
@@ -1611,7 +1610,7 @@ struct clk *tegra_clk_register_pllre(const char *name, const char *parent_name,
{
u32 val;
struct tegra_clk_pll *pll;
- struct clk *clk;
+ struct clk_core *clk;
pll_params->flags |= TEGRA_PLL_HAS_LOCK_ENABLE | TEGRA_PLL_LOCK_MISC;
@@ -1649,14 +1648,14 @@ struct clk *tegra_clk_register_pllre(const char *name, const char *parent_name,
return clk;
}
-struct clk *tegra_clk_register_pllm(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_pllm(const char *name, const char *parent_name,
void __iomem *clk_base, void __iomem *pmc,
unsigned long flags,
struct tegra_clk_pll_params *pll_params,
spinlock_t *lock)
{
struct tegra_clk_pll *pll;
- struct clk *clk, *parent;
+ struct clk_core *clk, *parent;
unsigned long parent_rate;
if (!pll_params->pdiv_tohw)
@@ -1688,13 +1687,13 @@ struct clk *tegra_clk_register_pllm(const char *name, const char *parent_name,
return clk;
}
-struct clk *tegra_clk_register_pllc(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_pllc(const char *name, const char *parent_name,
void __iomem *clk_base, void __iomem *pmc,
unsigned long flags,
struct tegra_clk_pll_params *pll_params,
spinlock_t *lock)
{
- struct clk *parent, *clk;
+ struct clk_core *parent, *clk;
struct pdiv_map *p_tohw = pll_params->pdiv_tohw;
struct tegra_clk_pll *pll;
struct tegra_clk_pll_freq_table cfg;
@@ -1762,14 +1761,14 @@ struct clk *tegra_clk_register_pllc(const char *name, const char *parent_name,
return clk;
}
-struct clk *tegra_clk_register_plle_tegra114(const char *name,
+struct clk_core *tegra_clk_register_plle_tegra114(const char *name,
const char *parent_name,
void __iomem *clk_base, unsigned long flags,
struct tegra_clk_pll_params *pll_params,
spinlock_t *lock)
{
struct tegra_clk_pll *pll;
- struct clk *clk;
+ struct clk_core *clk;
u32 val, val_aux;
pll_params->flags |= TEGRA_PLL_HAS_LOCK_ENABLE;
@@ -1812,13 +1811,13 @@ static const struct clk_ops tegra_clk_pllss_ops = {
.set_rate = clk_pllxc_set_rate,
};
-struct clk *tegra_clk_register_pllss(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_pllss(const char *name, const char *parent_name,
void __iomem *clk_base, unsigned long flags,
struct tegra_clk_pll_params *pll_params,
spinlock_t *lock)
{
struct tegra_clk_pll *pll;
- struct clk *clk, *parent;
+ struct clk_core *clk, *parent;
struct tegra_clk_pll_freq_table cfg;
unsigned long parent_rate;
u32 val;
diff --git a/drivers/clk/tegra/clk-super.c b/drivers/clk/tegra/clk-super.c
index 2fd924d..0d11346 100644
--- a/drivers/clk/tegra/clk-super.c
+++ b/drivers/clk/tegra/clk-super.c
@@ -20,7 +20,6 @@
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/clk-provider.h>
-#include <linux/clk.h>
#include "clk.h"
@@ -127,13 +126,13 @@ const struct clk_ops tegra_clk_super_ops = {
.set_parent = clk_super_set_parent,
};
-struct clk *tegra_clk_register_super_mux(const char *name,
+struct clk_core *tegra_clk_register_super_mux(const char *name,
const char **parent_names, u8 num_parents,
unsigned long flags, void __iomem *reg, u8 clk_super_flags,
u8 width, u8 pllx_index, u8 div2_index, spinlock_t *lock)
{
struct tegra_clk_super_mux *super;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
super = kzalloc(sizeof(*super), GFP_KERNEL);
diff --git a/drivers/clk/tegra/clk-tegra-audio.c b/drivers/clk/tegra/clk-tegra-audio.c
index 5c38aab..038a22e 100644
--- a/drivers/clk/tegra/clk-tegra-audio.c
+++ b/drivers/clk/tegra/clk-tegra-audio.c
@@ -15,7 +15,6 @@
*/
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
#include <linux/of_address.h>
@@ -128,8 +127,8 @@ void __init tegra_audio_clk_init(void __iomem *clk_base,
void __iomem *pmc_base, struct tegra_clk *tegra_clks,
struct tegra_clk_pll_params *pll_a_params)
{
- struct clk *clk;
- struct clk **dt_clk;
+ struct clk_core *clk;
+ struct clk_core **dt_clk;
int i;
/* PLLA */
diff --git a/drivers/clk/tegra/clk-tegra-fixed.c b/drivers/clk/tegra/clk-tegra-fixed.c
index f3b7738..5ee486a 100644
--- a/drivers/clk/tegra/clk-tegra-fixed.c
+++ b/drivers/clk/tegra/clk-tegra-fixed.c
@@ -15,7 +15,6 @@
*/
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
#include <linux/of_address.h>
@@ -36,8 +35,8 @@ int __init tegra_osc_clk_init(void __iomem *clk_base,
unsigned long *osc_freq,
unsigned long *pll_ref_freq)
{
- struct clk *clk;
- struct clk **dt_clk;
+ struct clk_core *clk;
+ struct clk_core **dt_clk;
u32 val, pll_ref_div;
unsigned osc_idx;
@@ -81,8 +80,8 @@ int __init tegra_osc_clk_init(void __iomem *clk_base,
void __init tegra_fixed_clk_init(struct tegra_clk *tegra_clks)
{
- struct clk *clk;
- struct clk **dt_clk;
+ struct clk_core *clk;
+ struct clk_core **dt_clk;
/* clk_32k */
dt_clk = tegra_lookup_dt_id(tegra_clk_clk_32k, tegra_clks);
diff --git a/drivers/clk/tegra/clk-tegra-periph.c b/drivers/clk/tegra/clk-tegra-periph.c
index 37f32c4..5e17ad4 100644
--- a/drivers/clk/tegra/clk-tegra-periph.c
+++ b/drivers/clk/tegra/clk-tegra-periph.c
@@ -15,7 +15,6 @@
*/
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/of.h>
@@ -585,8 +584,8 @@ static void __init periph_clk_init(void __iomem *clk_base,
struct tegra_clk *tegra_clks)
{
int i;
- struct clk *clk;
- struct clk **dt_clk;
+ struct clk_core *clk;
+ struct clk_core **dt_clk;
for (i = 0; i < ARRAY_SIZE(periph_clks); i++) {
struct tegra_clk_periph_regs *bank;
@@ -615,8 +614,8 @@ static void __init gate_clk_init(void __iomem *clk_base,
struct tegra_clk *tegra_clks)
{
int i;
- struct clk *clk;
- struct clk **dt_clk;
+ struct clk_core *clk;
+ struct clk_core **dt_clk;
for (i = 0; i < ARRAY_SIZE(gate_clks); i++) {
struct tegra_periph_init_data *data;
@@ -640,8 +639,8 @@ static void __init init_pllp(void __iomem *clk_base, void __iomem *pmc_base,
struct tegra_clk *tegra_clks,
struct tegra_clk_pll_params *pll_params)
{
- struct clk *clk;
- struct clk **dt_clk;
+ struct clk_core *clk;
+ struct clk_core **dt_clk;
int i;
dt_clk = tegra_lookup_dt_id(tegra_clk_pll_p, tegra_clks);
diff --git a/drivers/clk/tegra/clk-tegra-pmc.c b/drivers/clk/tegra/clk-tegra-pmc.c
index 08b21c1..ddd39ca 100644
--- a/drivers/clk/tegra/clk-tegra-pmc.c
+++ b/drivers/clk/tegra/clk-tegra-pmc.c
@@ -15,7 +15,6 @@
*/
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/of.h>
@@ -82,8 +81,8 @@ static struct pmc_clk_init_data pmc_clks[] = {
void __init tegra_pmc_clk_init(void __iomem *pmc_base,
struct tegra_clk *tegra_clks)
{
- struct clk *clk;
- struct clk **dt_clk;
+ struct clk_core *clk;
+ struct clk_core **dt_clk;
int i;
for (i = 0; i < ARRAY_SIZE(pmc_clks); i++) {
diff --git a/drivers/clk/tegra/clk-tegra-super-gen4.c b/drivers/clk/tegra/clk-tegra-super-gen4.c
index feb3201..9d1cdaa 100644
--- a/drivers/clk/tegra/clk-tegra-super-gen4.c
+++ b/drivers/clk/tegra/clk-tegra-super-gen4.c
@@ -15,7 +15,6 @@
*/
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
#include <linux/of_address.h>
@@ -53,8 +52,8 @@ static const char *cclk_lp_parents[] = { "clk_m", "pll_c", "clk_32k", "pll_m",
static void __init tegra_sclk_init(void __iomem *clk_base,
struct tegra_clk *tegra_clks)
{
- struct clk *clk;
- struct clk **dt_clk;
+ struct clk_core *clk;
+ struct clk_core **dt_clk;
/* SCLK */
dt_clk = tegra_lookup_dt_id(tegra_clk_sclk, tegra_clks);
@@ -99,8 +98,8 @@ void __init tegra_super_clk_gen4_init(void __iomem *clk_base,
struct tegra_clk *tegra_clks,
struct tegra_clk_pll_params *params)
{
- struct clk *clk;
- struct clk **dt_clk;
+ struct clk_core *clk;
+ struct clk_core **dt_clk;
/* CCLKG */
dt_clk = tegra_lookup_dt_id(tegra_clk_cclk_g, tegra_clks);
diff --git a/drivers/clk/tegra/clk-tegra114.c b/drivers/clk/tegra/clk-tegra114.c
index f760f31..00a2897 100644
--- a/drivers/clk/tegra/clk-tegra114.c
+++ b/drivers/clk/tegra/clk-tegra114.c
@@ -15,7 +15,6 @@
*/
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/of.h>
@@ -936,14 +935,14 @@ static u32 mux_pllm_pllc2_c_c3_pllp_plla_idx[] = {
[0] = 0, [1] = 1, [2] = 2, [3] = 3, [4] = 4, [5] = 6,
};
-static struct clk **clks;
+static struct clk_core **clks;
static unsigned long osc_freq;
static unsigned long pll_ref_freq;
static int __init tegra114_osc_clk_init(void __iomem *clk_base)
{
- struct clk *clk;
+ struct clk_core *clk;
u32 val, pll_ref_div;
val = readl_relaxed(clk_base + OSC_CTRL);
@@ -973,7 +972,7 @@ static int __init tegra114_osc_clk_init(void __iomem *clk_base)
static void __init tegra114_fixed_clk_init(void __iomem *clk_base)
{
- struct clk *clk;
+ struct clk_core *clk;
/* clk_32k */
clk = clk_register_fixed_rate(NULL, "clk_32k", NULL, CLK_IS_ROOT,
@@ -1078,7 +1077,7 @@ static void __init tegra114_pll_init(void __iomem *clk_base,
void __iomem *pmc)
{
u32 val;
- struct clk *clk;
+ struct clk_core *clk;
/* PLLC */
clk = tegra_clk_register_pllxc("pll_c", "pll_ref", clk_base,
@@ -1200,7 +1199,7 @@ static struct tegra_periph_init_data tegra_periph_clk_list[] = {
static __init void tegra114_periph_clk_init(void __iomem *clk_base,
void __iomem *pmc_base)
{
- struct clk *clk;
+ struct clk_core *clk;
struct tegra_periph_init_data *data;
int i;
diff --git a/drivers/clk/tegra/clk-tegra124.c b/drivers/clk/tegra/clk-tegra124.c
index 9525c68..bf481c8 100644
--- a/drivers/clk/tegra/clk-tegra124.c
+++ b/drivers/clk/tegra/clk-tegra124.c
@@ -15,7 +15,6 @@
*/
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/of.h>
@@ -1017,7 +1016,7 @@ static struct tegra_devclk devclks[] __initdata = {
{ .dev_id = "timer", .dt_id = TEGRA124_CLK_TIMER },
};
-static struct clk **clks;
+static struct clk_core **clks;
static void tegra124_utmi_param_configure(void __iomem *clk_base)
{
@@ -1104,7 +1103,7 @@ static void tegra124_utmi_param_configure(void __iomem *clk_base)
static __init void tegra124_periph_clk_init(void __iomem *clk_base,
void __iomem *pmc_base)
{
- struct clk *clk;
+ struct clk_core *clk;
/* xusb_ss_div2 */
clk = clk_register_fixed_factor(NULL, "xusb_ss_div2", "xusb_ss_src", 0,
@@ -1148,7 +1147,7 @@ static void __init tegra124_pll_init(void __iomem *clk_base,
void __iomem *pmc)
{
u32 val;
- struct clk *clk;
+ struct clk_core *clk;
/* PLLC */
clk = tegra_clk_register_pllxc("pll_c", "pll_ref", clk_base,
diff --git a/drivers/clk/tegra/clk-tegra20.c b/drivers/clk/tegra/clk-tegra20.c
index dace2b1..6e7d5e2 100644
--- a/drivers/clk/tegra/clk-tegra20.c
+++ b/drivers/clk/tegra/clk-tegra20.c
@@ -15,7 +15,6 @@
*/
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/of.h>
@@ -162,7 +161,7 @@ static void __iomem *pmc_base;
_clk_num, _gate_flags, \
_clk_id)
-static struct clk **clks;
+static struct clk_core **clks;
static struct tegra_clk_pll_freq_table pll_c_freq_table[] = {
{ 12000000, 600000000, 600, 12, 0, 8 },
@@ -633,7 +632,7 @@ static unsigned int tegra20_get_pll_ref_div(void)
static void tegra20_pll_init(void)
{
- struct clk *clk;
+ struct clk_core *clk;
/* PLLC */
clk = tegra_clk_register_pll("pll_c", "pll_ref", clk_base, NULL, 0,
@@ -713,7 +712,7 @@ static const char *sclk_parents[] = { "clk_m", "pll_c_out1", "pll_p_out4",
static void tegra20_super_clk_init(void)
{
- struct clk *clk;
+ struct clk_core *clk;
/* CCLK */
clk = tegra_clk_register_super_mux("cclk", cclk_parents,
@@ -738,7 +737,7 @@ static const char *audio_parents[] = {"spdif_in", "i2s1", "i2s2", "unused",
static void __init tegra20_audio_clk_init(void)
{
- struct clk *clk;
+ struct clk_core *clk;
/* audio */
clk = clk_register_mux(NULL, "audio_mux", audio_parents,
@@ -800,7 +799,7 @@ static struct tegra_periph_init_data tegra_periph_nodiv_clk_list[] = {
static void __init tegra20_periph_clk_init(void)
{
struct tegra_periph_init_data *data;
- struct clk *clk;
+ struct clk_core *clk;
int i;
/* ac97 */
@@ -871,7 +870,7 @@ static void __init tegra20_periph_clk_init(void)
static void __init tegra20_osc_clk_init(void)
{
- struct clk *clk;
+ struct clk_core *clk;
unsigned long input_freq;
unsigned int pll_ref_div;
diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c
index 5bbacd0..1e9f733 100644
--- a/drivers/clk/tegra/clk-tegra30.c
+++ b/drivers/clk/tegra/clk-tegra30.c
@@ -16,7 +16,6 @@
#include <linux/io.h>
#include <linux/delay.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/of.h>
@@ -205,7 +204,7 @@ static DEFINE_SPINLOCK(pll_d_lock);
_clk_num, _gate_flags, \
_clk_id)
-static struct clk **clks;
+static struct clk_core **clks;
/*
* Structure defining the fields for USB UTMI clocks Parameters.
@@ -921,7 +920,7 @@ static const char *pll_e_parents[] = {"pll_ref", "pll_p"};
static void __init tegra30_pll_init(void)
{
- struct clk *clk;
+ struct clk_core *clk;
/* PLLC */
clk = tegra_clk_register_pll("pll_c", "pll_ref", clk_base, pmc_base, 0,
@@ -1012,7 +1011,7 @@ static const char *sclk_parents[] = { "clk_m", "pll_c_out1", "pll_p_out4",
static void __init tegra30_super_clk_init(void)
{
- struct clk *clk;
+ struct clk_core *clk;
/*
* Clock input to cclk_g divided from pll_p using
@@ -1134,7 +1133,7 @@ static struct tegra_periph_init_data tegra_periph_nodiv_clk_list[] = {
static void __init tegra30_periph_clk_init(void)
{
struct tegra_periph_init_data *data;
- struct clk *clk;
+ struct clk_core *clk;
int i;
/* dsia */
diff --git a/drivers/clk/tegra/clk.c b/drivers/clk/tegra/clk.c
index f87c609..d5963f6 100644
--- a/drivers/clk/tegra/clk.c
+++ b/drivers/clk/tegra/clk.c
@@ -14,7 +14,6 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
#include <linux/clk/tegra.h>
@@ -69,7 +68,7 @@ struct tegra_cpu_car_ops *tegra_cpu_car_ops = &dummy_car_ops;
int *periph_clk_enb_refcnt;
static int periph_banks;
-static struct clk **clks;
+static struct clk_core **clks;
static int clk_num;
static struct clk_onecell_data clk_data;
@@ -165,7 +164,7 @@ struct tegra_clk_periph_regs *get_reg_bank(int clkid)
}
}
-struct clk ** __init tegra_clk_init(void __iomem *regs, int num, int banks)
+struct clk_core ** __init tegra_clk_init(void __iomem *regs, int num, int banks)
{
clk_base = regs;
@@ -179,7 +178,7 @@ struct clk ** __init tegra_clk_init(void __iomem *regs, int num, int banks)
periph_banks = banks;
- clks = kzalloc(num * sizeof(struct clk *), GFP_KERNEL);
+ clks = kzalloc(num * sizeof(struct clk_core *), GFP_KERNEL);
if (!clks)
kfree(periph_clk_enb_refcnt);
@@ -189,9 +188,9 @@ struct clk ** __init tegra_clk_init(void __iomem *regs, int num, int banks)
}
void __init tegra_init_dup_clks(struct tegra_clk_duplicate *dup_list,
- struct clk *clks[], int clk_max)
+ struct clk_core *clks[], int clk_max)
{
- struct clk *clk;
+ struct clk_core *clk;
for (; dup_list->clk_id < clk_max; dup_list++) {
clk = clks[dup_list->clk_id];
@@ -201,9 +200,9 @@ void __init tegra_init_dup_clks(struct tegra_clk_duplicate *dup_list,
}
void __init tegra_init_from_table(struct tegra_clk_init_table *tbl,
- struct clk *clks[], int clk_max)
+ struct clk_core *clks[], int clk_max)
{
- struct clk *clk;
+ struct clk_core *clk;
for (; tbl->clk_id < clk_max; tbl++) {
clk = clks[tbl->clk_id];
@@ -211,8 +210,8 @@ void __init tegra_init_from_table(struct tegra_clk_init_table *tbl,
return;
if (tbl->parent_id < clk_max) {
- struct clk *parent = clks[tbl->parent_id];
- if (clk_set_parent(clk, parent)) {
+ struct clk_core *parent = clks[tbl->parent_id];
+ if (clk_provider_set_parent(clk, parent)) {
pr_err("%s: Failed to set parent %s of %s\n",
__func__, __clk_get_name(parent),
__clk_get_name(clk));
@@ -221,7 +220,7 @@ void __init tegra_init_from_table(struct tegra_clk_init_table *tbl,
}
if (tbl->rate)
- if (clk_set_rate(clk, tbl->rate)) {
+ if (clk_provider_set_rate(clk, tbl->rate)) {
pr_err("%s: Failed to set rate %lu of %s\n",
__func__, tbl->rate,
__clk_get_name(clk));
@@ -229,7 +228,7 @@ void __init tegra_init_from_table(struct tegra_clk_init_table *tbl,
}
if (tbl->state)
- if (clk_prepare_enable(clk)) {
+ if (clk_provider_prepare_enable(clk)) {
pr_err("%s: Failed to enable %s\n", __func__,
__clk_get_name(clk));
WARN_ON(1);
@@ -286,7 +285,7 @@ void __init tegra_register_devclks(struct tegra_devclk *dev_clks, int num)
}
}
-struct clk ** __init tegra_lookup_dt_id(int clk_id,
+struct clk_core ** __init tegra_lookup_dt_id(int clk_id,
struct tegra_clk *tegra_clk)
{
if (tegra_clk[clk_id].present)
diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h
index 16ec8d6..3093aa4 100644
--- a/drivers/clk/tegra/clk.h
+++ b/drivers/clk/tegra/clk.h
@@ -39,7 +39,7 @@ struct tegra_clk_sync_source {
extern const struct clk_ops tegra_clk_sync_source_ops;
extern int *periph_clk_enb_refcnt;
-struct clk *tegra_clk_register_sync_source(const char *name,
+struct clk_core *tegra_clk_register_sync_source(const char *name,
unsigned long fixed_rate, unsigned long max_rate);
/**
@@ -82,7 +82,7 @@ struct tegra_clk_frac_div {
#define TEGRA_DIVIDER_UART BIT(3)
extern const struct clk_ops tegra_clk_frac_div_ops;
-struct clk *tegra_clk_register_divider(const char *name,
+struct clk_core *tegra_clk_register_divider(const char *name,
const char *parent_name, void __iomem *reg,
unsigned long flags, u8 clk_divider_flags, u8 shift, u8 width,
u8 frac_width, spinlock_t *lock);
@@ -258,47 +258,47 @@ struct tegra_clk_pll {
extern const struct clk_ops tegra_clk_pll_ops;
extern const struct clk_ops tegra_clk_plle_ops;
-struct clk *tegra_clk_register_pll(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_pll(const char *name, const char *parent_name,
void __iomem *clk_base, void __iomem *pmc,
unsigned long flags, struct tegra_clk_pll_params *pll_params,
spinlock_t *lock);
-struct clk *tegra_clk_register_plle(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_plle(const char *name, const char *parent_name,
void __iomem *clk_base, void __iomem *pmc,
unsigned long flags, struct tegra_clk_pll_params *pll_params,
spinlock_t *lock);
-struct clk *tegra_clk_register_pllxc(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_pllxc(const char *name, const char *parent_name,
void __iomem *clk_base, void __iomem *pmc,
unsigned long flags,
struct tegra_clk_pll_params *pll_params,
spinlock_t *lock);
-struct clk *tegra_clk_register_pllm(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_pllm(const char *name, const char *parent_name,
void __iomem *clk_base, void __iomem *pmc,
unsigned long flags,
struct tegra_clk_pll_params *pll_params,
spinlock_t *lock);
-struct clk *tegra_clk_register_pllc(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_pllc(const char *name, const char *parent_name,
void __iomem *clk_base, void __iomem *pmc,
unsigned long flags,
struct tegra_clk_pll_params *pll_params,
spinlock_t *lock);
-struct clk *tegra_clk_register_pllre(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_pllre(const char *name, const char *parent_name,
void __iomem *clk_base, void __iomem *pmc,
unsigned long flags,
struct tegra_clk_pll_params *pll_params,
spinlock_t *lock, unsigned long parent_rate);
-struct clk *tegra_clk_register_plle_tegra114(const char *name,
+struct clk_core *tegra_clk_register_plle_tegra114(const char *name,
const char *parent_name,
void __iomem *clk_base, unsigned long flags,
struct tegra_clk_pll_params *pll_params,
spinlock_t *lock);
-struct clk *tegra_clk_register_pllss(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_pllss(const char *name, const char *parent_name,
void __iomem *clk_base, unsigned long flags,
struct tegra_clk_pll_params *pll_params,
spinlock_t *lock);
@@ -325,7 +325,7 @@ struct tegra_clk_pll_out {
#define to_clk_pll_out(_hw) container_of(_hw, struct tegra_clk_pll_out, hw)
extern const struct clk_ops tegra_clk_pll_out_ops;
-struct clk *tegra_clk_register_pll_out(const char *name,
+struct clk_core *tegra_clk_register_pll_out(const char *name,
const char *parent_name, void __iomem *reg, u8 enb_bit_idx,
u8 rst_bit_idx, unsigned long flags, u8 pll_div_flags,
spinlock_t *lock);
@@ -394,7 +394,7 @@ struct tegra_clk_periph_gate {
#define TEGRA_PERIPH_NO_GATE BIT(5)
extern const struct clk_ops tegra_clk_periph_gate_ops;
-struct clk *tegra_clk_register_periph_gate(const char *name,
+struct clk_core *tegra_clk_register_periph_gate(const char *name,
const char *parent_name, u8 gate_flags, void __iomem *clk_base,
unsigned long flags, int clk_num, int *enable_refcnt);
@@ -427,11 +427,11 @@ struct tegra_clk_periph {
#define TEGRA_CLK_PERIPH_MAGIC 0x18221223
extern const struct clk_ops tegra_clk_periph_ops;
-struct clk *tegra_clk_register_periph(const char *name,
+struct clk_core *tegra_clk_register_periph(const char *name,
const char **parent_names, int num_parents,
struct tegra_clk_periph *periph, void __iomem *clk_base,
u32 offset, unsigned long flags);
-struct clk *tegra_clk_register_periph_nodiv(const char *name,
+struct clk_core *tegra_clk_register_periph_nodiv(const char *name,
const char **parent_names, int num_parents,
struct tegra_clk_periph *periph, void __iomem *clk_base,
u32 offset);
@@ -540,7 +540,7 @@ struct tegra_clk_super_mux {
#define TEGRA_DIVIDER_2 BIT(0)
extern const struct clk_ops tegra_clk_super_ops;
-struct clk *tegra_clk_register_super_mux(const char *name,
+struct clk_core *tegra_clk_register_super_mux(const char *name,
const char **parent_names, u8 num_parents,
unsigned long flags, void __iomem *reg, u8 clk_super_flags,
u8 width, u8 pllx_index, u8 div2_index, spinlock_t *lock);
@@ -590,15 +590,15 @@ struct tegra_devclk {
};
void tegra_init_from_table(struct tegra_clk_init_table *tbl,
- struct clk *clks[], int clk_max);
+ struct clk_core *clks[], int clk_max);
void tegra_init_dup_clks(struct tegra_clk_duplicate *dup_list,
- struct clk *clks[], int clk_max);
+ struct clk_core *clks[], int clk_max);
struct tegra_clk_periph_regs *get_reg_bank(int clkid);
-struct clk **tegra_clk_init(void __iomem *clk_base, int num, int periph_banks);
+struct clk_core **tegra_clk_init(void __iomem *clk_base, int num, int periph_banks);
-struct clk **tegra_lookup_dt_id(int clk_id, struct tegra_clk *tegra_clk);
+struct clk_core **tegra_lookup_dt_id(int clk_id, struct tegra_clk *tegra_clk);
void tegra_add_of_provider(struct device_node *np);
void tegra_register_devclks(struct tegra_devclk *dev_clks, int num);
diff --git a/drivers/clk/ti/apll.c b/drivers/clk/ti/apll.c
index 72d9727..a162c21 100644
--- a/drivers/clk/ti/apll.c
+++ b/drivers/clk/ti/apll.c
@@ -135,10 +135,10 @@ static void __init omap_clk_register_apll(struct clk_hw *hw,
{
struct clk_hw_omap *clk_hw = to_clk_hw_omap(hw);
struct dpll_data *ad = clk_hw->dpll_data;
- struct clk *clk;
+ struct clk_core *clk;
- ad->clk_ref = of_clk_get(node, 0);
- ad->clk_bypass = of_clk_get(node, 1);
+ ad->clk_ref = of_clk_provider_get(node, 0);
+ ad->clk_bypass = of_clk_provider_get(node, 1);
if (IS_ERR(ad->clk_ref) || IS_ERR(ad->clk_bypass)) {
pr_debug("clk-ref or clk-bypass for %s not ready, retry\n",
@@ -332,7 +332,7 @@ static void __init of_omap2_apll_setup(struct device_node *node)
struct dpll_data *ad = NULL;
struct clk_hw_omap *clk_hw = NULL;
struct clk_init_data *init = NULL;
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name;
u32 val;
diff --git a/drivers/clk/ti/clk-2xxx.c b/drivers/clk/ti/clk-2xxx.c
index c808ab3..a48fe6f 100644
--- a/drivers/clk/ti/clk-2xxx.c
+++ b/drivers/clk/ti/clk-2xxx.c
@@ -237,10 +237,10 @@ static int __init omap2xxx_dt_clk_init(int soc_type)
ARRAY_SIZE(enable_init_clks));
pr_info("Clocking rate (Crystal/DPLL/MPU): %ld.%01ld/%ld/%ld MHz\n",
- (clk_get_rate(clk_get_sys(NULL, "sys_ck")) / 1000000),
- (clk_get_rate(clk_get_sys(NULL, "sys_ck")) / 100000) % 10,
- (clk_get_rate(clk_get_sys(NULL, "dpll_ck")) / 1000000),
- (clk_get_rate(clk_get_sys(NULL, "mpu_ck")) / 1000000));
+ (clk_provider_get_rate(clk_provider_get_sys(NULL, "sys_ck")) / 1000000),
+ (clk_provider_get_rate(clk_provider_get_sys(NULL, "sys_ck")) / 100000) % 10,
+ (clk_provider_get_rate(clk_provider_get_sys(NULL, "dpll_ck")) / 1000000),
+ (clk_provider_get_rate(clk_provider_get_sys(NULL, "mpu_ck")) / 1000000));
return 0;
}
diff --git a/drivers/clk/ti/clk-33xx.c b/drivers/clk/ti/clk-33xx.c
index 028b337..0988f1e 100644
--- a/drivers/clk/ti/clk-33xx.c
+++ b/drivers/clk/ti/clk-33xx.c
@@ -121,7 +121,7 @@ static const char *enable_init_clks[] = {
int __init am33xx_dt_clk_init(void)
{
- struct clk *clk1, *clk2;
+ struct clk_core *clk1, *clk2;
ti_dt_clocks_register(am33xx_clks);
@@ -139,12 +139,12 @@ int __init am33xx_dt_clk_init(void)
* oscillator clock.
*/
- clk1 = clk_get_sys(NULL, "sys_clkin_ck");
- clk2 = clk_get_sys(NULL, "timer3_fck");
- clk_set_parent(clk2, clk1);
+ clk1 = clk_provider_get_sys(NULL, "sys_clkin_ck");
+ clk2 = clk_provider_get_sys(NULL, "timer3_fck");
+ clk_provider_set_parent(clk2, clk1);
- clk2 = clk_get_sys(NULL, "timer6_fck");
- clk_set_parent(clk2, clk1);
+ clk2 = clk_provider_get_sys(NULL, "timer6_fck");
+ clk_provider_set_parent(clk2, clk1);
/*
* The On-Chip 32K RC Osc clock is not an accurate clock-source as per
* the design/spec, so as a result, for example, timer which supposed
@@ -152,9 +152,9 @@ int __init am33xx_dt_clk_init(void)
* not expected by any use-case, so change WDT1 clock source to PRCM
* 32KHz clock.
*/
- clk1 = clk_get_sys(NULL, "wdt1_fck");
- clk2 = clk_get_sys(NULL, "clkdiv32k_ick");
- clk_set_parent(clk1, clk2);
+ clk1 = clk_provider_get_sys(NULL, "wdt1_fck");
+ clk2 = clk_provider_get_sys(NULL, "clkdiv32k_ick");
+ clk_provider_set_parent(clk1, clk2);
return 0;
}
diff --git a/drivers/clk/ti/clk-3xxx.c b/drivers/clk/ti/clk-3xxx.c
index 0d1750a..58ef20e 100644
--- a/drivers/clk/ti/clk-3xxx.c
+++ b/drivers/clk/ti/clk-3xxx.c
@@ -365,10 +365,10 @@ static int __init omap3xxx_dt_clk_init(int soc_type)
ARRAY_SIZE(enable_init_clks));
pr_info("Clocking rate (Crystal/Core/MPU): %ld.%01ld/%ld/%ld MHz\n",
- (clk_get_rate(clk_get_sys(NULL, "osc_sys_ck")) / 1000000),
- (clk_get_rate(clk_get_sys(NULL, "osc_sys_ck")) / 100000) % 10,
- (clk_get_rate(clk_get_sys(NULL, "core_ck")) / 1000000),
- (clk_get_rate(clk_get_sys(NULL, "arm_fck")) / 1000000));
+ (clk_provider_get_rate(clk_provider_get_sys(NULL, "osc_sys_ck")) / 1000000),
+ (clk_provider_get_rate(clk_provider_get_sys(NULL, "osc_sys_ck")) / 100000) % 10,
+ (clk_provider_get_rate(clk_provider_get_sys(NULL, "core_ck")) / 1000000),
+ (clk_provider_get_rate(clk_provider_get_sys(NULL, "arm_fck")) / 1000000));
if (soc_type != OMAP3_SOC_TI81XX && soc_type != OMAP3_SOC_OMAP3430_ES1)
omap3_clk_lock_dpll5();
diff --git a/drivers/clk/ti/clk-43xx.c b/drivers/clk/ti/clk-43xx.c
index 3795fce..1277452 100644
--- a/drivers/clk/ti/clk-43xx.c
+++ b/drivers/clk/ti/clk-43xx.c
@@ -116,7 +116,7 @@ static struct ti_dt_clk am43xx_clks[] = {
int __init am43xx_dt_clk_init(void)
{
- struct clk *clk1, *clk2;
+ struct clk_core *clk1, *clk2;
ti_dt_clocks_register(am43xx_clks);
@@ -132,9 +132,9 @@ int __init am43xx_dt_clk_init(void)
* By selecting dpll_core_m5_ck as the clocksource fixes this issue.
* In AM335x dpll_core_m5_ck is the default clocksource.
*/
- clk1 = clk_get_sys(NULL, "cpsw_cpts_rft_clk");
- clk2 = clk_get_sys(NULL, "dpll_core_m5_ck");
- clk_set_parent(clk1, clk2);
+ clk1 = clk_provider_get_sys(NULL, "cpsw_cpts_rft_clk");
+ clk2 = clk_provider_get_sys(NULL, "dpll_core_m5_ck");
+ clk_provider_set_parent(clk1, clk2);
return 0;
}
diff --git a/drivers/clk/ti/clk-44xx.c b/drivers/clk/ti/clk-44xx.c
index 02517a8..1adc399 100644
--- a/drivers/clk/ti/clk-44xx.c
+++ b/drivers/clk/ti/clk-44xx.c
@@ -281,7 +281,7 @@ static struct ti_dt_clk omap44xx_clks[] = {
int __init omap4xxx_dt_clk_init(void)
{
int rc;
- struct clk *abe_dpll_ref, *abe_dpll, *sys_32k_ck, *usb_dpll;
+ struct clk_core *abe_dpll_ref, *abe_dpll, *sys_32k_ck, *usb_dpll;
ti_dt_clocks_register(omap44xx_clks);
@@ -291,8 +291,8 @@ int __init omap4xxx_dt_clk_init(void)
* Lock USB DPLL on OMAP4 devices so that the L3INIT power
* domain can transition to retention state when not in use.
*/
- usb_dpll = clk_get_sys(NULL, "dpll_usb_ck");
- rc = clk_set_rate(usb_dpll, OMAP4_DPLL_USB_DEFFREQ);
+ usb_dpll = clk_provider_get_sys(NULL, "dpll_usb_ck");
+ rc = clk_provider_set_rate(usb_dpll, OMAP4_DPLL_USB_DEFFREQ);
if (rc)
pr_err("%s: failed to configure USB DPLL!\n", __func__);
@@ -302,12 +302,12 @@ int __init omap4xxx_dt_clk_init(void)
* locking the ABE DPLL on boot.
* Lock the ABE DPLL in any case to avoid issues with audio.
*/
- abe_dpll_ref = clk_get_sys(NULL, "abe_dpll_refclk_mux_ck");
- sys_32k_ck = clk_get_sys(NULL, "sys_32k_ck");
- rc = clk_set_parent(abe_dpll_ref, sys_32k_ck);
- abe_dpll = clk_get_sys(NULL, "dpll_abe_ck");
+ abe_dpll_ref = clk_provider_get_sys(NULL, "abe_dpll_refclk_mux_ck");
+ sys_32k_ck = clk_provider_get_sys(NULL, "sys_32k_ck");
+ rc = clk_provider_set_parent(abe_dpll_ref, sys_32k_ck);
+ abe_dpll = clk_provider_get_sys(NULL, "dpll_abe_ck");
if (!rc)
- rc = clk_set_rate(abe_dpll, OMAP4_DPLL_ABE_DEFFREQ);
+ rc = clk_provider_set_rate(abe_dpll, OMAP4_DPLL_ABE_DEFFREQ);
if (rc)
pr_err("%s: failed to configure ABE DPLL!\n", __func__);
diff --git a/drivers/clk/ti/clk-54xx.c b/drivers/clk/ti/clk-54xx.c
index 5e18399..5b603b5 100644
--- a/drivers/clk/ti/clk-54xx.c
+++ b/drivers/clk/ti/clk-54xx.c
@@ -225,34 +225,35 @@ static struct ti_dt_clk omap54xx_clks[] = {
int __init omap5xxx_dt_clk_init(void)
{
int rc;
- struct clk *abe_dpll_ref, *abe_dpll, *sys_32k_ck, *usb_dpll;
+ struct clk_core *abe_dpll_ref, *abe_dpll, *sys_32k_ck, *usb_dpll;
ti_dt_clocks_register(omap54xx_clks);
omap2_clk_disable_autoidle_all();
- abe_dpll_ref = clk_get_sys(NULL, "abe_dpll_clk_mux");
- sys_32k_ck = clk_get_sys(NULL, "sys_32k_ck");
- rc = clk_set_parent(abe_dpll_ref, sys_32k_ck);
- abe_dpll = clk_get_sys(NULL, "dpll_abe_ck");
+ abe_dpll_ref = clk_provider_get_sys(NULL, "abe_dpll_clk_mux");
+ sys_32k_ck = clk_provider_get_sys(NULL, "sys_32k_ck");
+ rc = clk_provider_set_parent(abe_dpll_ref, sys_32k_ck);
+ abe_dpll = clk_provider_get_sys(NULL, "dpll_abe_ck");
if (!rc)
- rc = clk_set_rate(abe_dpll, OMAP5_DPLL_ABE_DEFFREQ);
+ rc = clk_provider_set_rate(abe_dpll, OMAP5_DPLL_ABE_DEFFREQ);
if (rc)
pr_err("%s: failed to configure ABE DPLL!\n", __func__);
- abe_dpll = clk_get_sys(NULL, "dpll_abe_m2x2_ck");
+ abe_dpll = clk_provider_get_sys(NULL, "dpll_abe_m2x2_ck");
if (!rc)
- rc = clk_set_rate(abe_dpll, OMAP5_DPLL_ABE_DEFFREQ * 2);
+ rc = clk_provider_set_rate(abe_dpll,
+ OMAP5_DPLL_ABE_DEFFREQ * 2);
if (rc)
pr_err("%s: failed to configure ABE m2x2 DPLL!\n", __func__);
- usb_dpll = clk_get_sys(NULL, "dpll_usb_ck");
- rc = clk_set_rate(usb_dpll, OMAP5_DPLL_USB_DEFFREQ);
+ usb_dpll = clk_provider_get_sys(NULL, "dpll_usb_ck");
+ rc = clk_provider_set_rate(usb_dpll, OMAP5_DPLL_USB_DEFFREQ);
if (rc)
pr_err("%s: failed to configure USB DPLL!\n", __func__);
- usb_dpll = clk_get_sys(NULL, "dpll_usb_m2_ck");
- rc = clk_set_rate(usb_dpll, OMAP5_DPLL_USB_DEFFREQ/2);
+ usb_dpll = clk_provider_get_sys(NULL, "dpll_usb_m2_ck");
+ rc = clk_provider_set_rate(usb_dpll, OMAP5_DPLL_USB_DEFFREQ / 2);
if (rc)
pr_err("%s: failed to set USB_DPLL M2 OUT\n", __func__);
diff --git a/drivers/clk/ti/clk-7xx.c b/drivers/clk/ti/clk-7xx.c
index 62ac8f6..9dba0bb 100644
--- a/drivers/clk/ti/clk-7xx.c
+++ b/drivers/clk/ti/clk-7xx.c
@@ -307,39 +307,39 @@ static struct ti_dt_clk dra7xx_clks[] = {
int __init dra7xx_dt_clk_init(void)
{
int rc;
- struct clk *abe_dpll_mux, *sys_clkin2, *dpll_ck;
+ struct clk_core *abe_dpll_mux, *sys_clkin2, *dpll_ck;
ti_dt_clocks_register(dra7xx_clks);
omap2_clk_disable_autoidle_all();
- abe_dpll_mux = clk_get_sys(NULL, "abe_dpll_sys_clk_mux");
- sys_clkin2 = clk_get_sys(NULL, "sys_clkin2");
- dpll_ck = clk_get_sys(NULL, "dpll_abe_ck");
+ abe_dpll_mux = clk_provider_get_sys(NULL, "abe_dpll_sys_clk_mux");
+ sys_clkin2 = clk_provider_get_sys(NULL, "sys_clkin2");
+ dpll_ck = clk_provider_get_sys(NULL, "dpll_abe_ck");
- rc = clk_set_parent(abe_dpll_mux, sys_clkin2);
+ rc = clk_provider_set_parent(abe_dpll_mux, sys_clkin2);
if (!rc)
- rc = clk_set_rate(dpll_ck, DRA7_DPLL_ABE_DEFFREQ);
+ rc = clk_provider_set_rate(dpll_ck, DRA7_DPLL_ABE_DEFFREQ);
if (rc)
pr_err("%s: failed to configure ABE DPLL!\n", __func__);
- dpll_ck = clk_get_sys(NULL, "dpll_abe_m2x2_ck");
- rc = clk_set_rate(dpll_ck, DRA7_DPLL_ABE_DEFFREQ * 2);
+ dpll_ck = clk_provider_get_sys(NULL, "dpll_abe_m2x2_ck");
+ rc = clk_provider_set_rate(dpll_ck, DRA7_DPLL_ABE_DEFFREQ * 2);
if (rc)
pr_err("%s: failed to configure ABE DPLL m2x2!\n", __func__);
- dpll_ck = clk_get_sys(NULL, "dpll_gmac_ck");
- rc = clk_set_rate(dpll_ck, DRA7_DPLL_GMAC_DEFFREQ);
+ dpll_ck = clk_provider_get_sys(NULL, "dpll_gmac_ck");
+ rc = clk_provider_set_rate(dpll_ck, DRA7_DPLL_GMAC_DEFFREQ);
if (rc)
pr_err("%s: failed to configure GMAC DPLL!\n", __func__);
- dpll_ck = clk_get_sys(NULL, "dpll_usb_ck");
- rc = clk_set_rate(dpll_ck, DRA7_DPLL_USB_DEFFREQ);
+ dpll_ck = clk_provider_get_sys(NULL, "dpll_usb_ck");
+ rc = clk_provider_set_rate(dpll_ck, DRA7_DPLL_USB_DEFFREQ);
if (rc)
pr_err("%s: failed to configure USB DPLL!\n", __func__);
- dpll_ck = clk_get_sys(NULL, "dpll_usb_m2_ck");
- rc = clk_set_rate(dpll_ck, DRA7_DPLL_USB_DEFFREQ/2);
+ dpll_ck = clk_provider_get_sys(NULL, "dpll_usb_m2_ck");
+ rc = clk_provider_set_rate(dpll_ck, DRA7_DPLL_USB_DEFFREQ / 2);
if (rc)
pr_err("%s: failed to set USB_DPLL M2 OUT\n", __func__);
diff --git a/drivers/clk/ti/clk-dra7-atl.c b/drivers/clk/ti/clk-dra7-atl.c
index 4a65b41..029a0d3 100644
--- a/drivers/clk/ti/clk-dra7-atl.c
+++ b/drivers/clk/ti/clk-dra7-atl.c
@@ -40,7 +40,7 @@
struct dra7_atl_clock_info;
struct dra7_atl_desc {
- struct clk *clk;
+ struct clk_core *clk;
struct clk_hw hw;
struct dra7_atl_clock_info *cinfo;
int id;
@@ -165,7 +165,7 @@ static void __init of_dra7_atl_clock_setup(struct device_node *node)
struct dra7_atl_desc *clk_hw = NULL;
struct clk_init_data init = { 0 };
const char **parent_names = NULL;
- struct clk *clk;
+ struct clk_core *clk;
clk_hw = kzalloc(sizeof(*clk_hw), GFP_KERNEL);
if (!clk_hw) {
@@ -233,7 +233,7 @@ static int of_dra7_atl_clk_probe(struct platform_device *pdev)
char prop[5];
struct dra7_atl_desc *cdesc;
struct of_phandle_args clkspec;
- struct clk *clk;
+ struct clk_core *clk;
int rc;
rc = of_parse_phandle_with_args(node, "ti,provided-clocks",
diff --git a/drivers/clk/ti/clk.c b/drivers/clk/ti/clk.c
index b1a6f71..d88a70d0 100644
--- a/drivers/clk/ti/clk.c
+++ b/drivers/clk/ti/clk.c
@@ -41,7 +41,7 @@ void __init ti_dt_clocks_register(struct ti_dt_clk oclks[])
{
struct ti_dt_clk *c;
struct device_node *node;
- struct clk *clk;
+ struct clk_core *clk;
struct of_phandle_args clkspec;
for (c = oclks; c->node_name != NULL; c++) {
diff --git a/drivers/clk/ti/clockdomain.c b/drivers/clk/ti/clockdomain.c
index f1e0038..6bc75d8 100644
--- a/drivers/clk/ti/clockdomain.c
+++ b/drivers/clk/ti/clockdomain.c
@@ -26,7 +26,7 @@
static void __init of_ti_clockdomain_setup(struct device_node *node)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_hw *clk_hw;
const char *clkdm_name = node->name;
int i;
@@ -35,7 +35,7 @@ static void __init of_ti_clockdomain_setup(struct device_node *node)
num_clks = of_count_phandle_with_args(node, "clocks", "#clock-cells");
for (i = 0; i < num_clks; i++) {
- clk = of_clk_get(node, i);
+ clk = of_clk_provider_get(node, i);
if (__clk_get_flags(clk) & CLK_IS_BASIC) {
pr_warn("can't setup clkdm for basic clk %s\n",
__clk_get_name(clk));
diff --git a/drivers/clk/ti/composite.c b/drivers/clk/ti/composite.c
index 19d8980..2cbee34 100644
--- a/drivers/clk/ti/composite.c
+++ b/drivers/clk/ti/composite.c
@@ -119,7 +119,7 @@ static inline struct clk_hw *_get_hw(struct clk_hw_omap_comp *clk, int idx)
static void __init ti_clk_register_composite(struct clk_hw *hw,
struct device_node *node)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_hw_omap_comp *cclk = to_clk_hw_comp(hw);
struct component_clk *comp;
int num_parents = 0;
diff --git a/drivers/clk/ti/divider.c b/drivers/clk/ti/divider.c
index e6aa10d..1c41515 100644
--- a/drivers/clk/ti/divider.c
+++ b/drivers/clk/ti/divider.c
@@ -246,7 +246,7 @@ const struct clk_ops ti_clk_divider_ops = {
.set_rate = ti_clk_divider_set_rate,
};
-static struct clk *_register_divider(struct device *dev, const char *name,
+static struct clk_core *_register_divider(struct device *dev, const char *name,
const char *parent_name,
unsigned long flags, void __iomem *reg,
u8 shift, u8 width, u8 clk_divider_flags,
@@ -254,7 +254,7 @@ static struct clk *_register_divider(struct device *dev, const char *name,
spinlock_t *lock)
{
struct clk_divider *div;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
if (clk_divider_flags & CLK_DIVIDER_HIWORD_MASK) {
@@ -434,7 +434,7 @@ static int __init ti_clk_divider_populate(struct device_node *node,
*/
static void __init of_ti_divider_clk_setup(struct device_node *node)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name;
void __iomem *reg;
u8 clk_divider_flags = 0;
diff --git a/drivers/clk/ti/dpll.c b/drivers/clk/ti/dpll.c
index 79791e1..e1f74cc 100644
--- a/drivers/clk/ti/dpll.c
+++ b/drivers/clk/ti/dpll.c
@@ -128,10 +128,10 @@ static void __init ti_clk_register_dpll(struct clk_hw *hw,
{
struct clk_hw_omap *clk_hw = to_clk_hw_omap(hw);
struct dpll_data *dd = clk_hw->dpll_data;
- struct clk *clk;
+ struct clk_core *clk;
- dd->clk_ref = of_clk_get(node, 0);
- dd->clk_bypass = of_clk_get(node, 1);
+ dd->clk_ref = of_clk_provider_get(node, 0);
+ dd->clk_bypass = of_clk_provider_get(node, 1);
if (IS_ERR(dd->clk_ref) || IS_ERR(dd->clk_bypass)) {
pr_debug("clk-ref or clk-bypass missing for %s, retry later\n",
@@ -175,7 +175,7 @@ static void ti_clk_register_dpll_x2(struct device_node *node,
const struct clk_ops *ops,
const struct clk_hw_omap_ops *hw_ops)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init = { NULL };
struct clk_hw_omap *clk_hw;
const char *name = node->name;
diff --git a/drivers/clk/ti/fixed-factor.c b/drivers/clk/ti/fixed-factor.c
index c2c8a28..2aa2701 100644
--- a/drivers/clk/ti/fixed-factor.c
+++ b/drivers/clk/ti/fixed-factor.c
@@ -33,7 +33,7 @@
*/
static void __init of_ti_fixed_factor_clk_setup(struct device_node *node)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name = node->name;
const char *parent_name;
u32 div, mult;
diff --git a/drivers/clk/ti/gate.c b/drivers/clk/ti/gate.c
index b326d27..dd1b813 100644
--- a/drivers/clk/ti/gate.c
+++ b/drivers/clk/ti/gate.c
@@ -94,7 +94,7 @@ static void __init _of_ti_gate_clk_setup(struct device_node *node,
const struct clk_ops *ops,
const struct clk_hw_omap_ops *hw_ops)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init = { NULL };
struct clk_hw_omap *clk_hw;
const char *clk_name = node->name;
diff --git a/drivers/clk/ti/interface.c b/drivers/clk/ti/interface.c
index 9c3e8c4..e2f2bc0 100644
--- a/drivers/clk/ti/interface.c
+++ b/drivers/clk/ti/interface.c
@@ -34,7 +34,7 @@ static const struct clk_ops ti_interface_clk_ops = {
static void __init _of_ti_interface_clk_setup(struct device_node *node,
const struct clk_hw_omap_ops *ops)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init = { NULL };
struct clk_hw_omap *clk_hw;
const char *parent_name;
diff --git a/drivers/clk/ti/mux.c b/drivers/clk/ti/mux.c
index e9d650e..7456198 100644
--- a/drivers/clk/ti/mux.c
+++ b/drivers/clk/ti/mux.c
@@ -104,14 +104,14 @@ const struct clk_ops ti_clk_mux_ops = {
.determine_rate = __clk_mux_determine_rate,
};
-static struct clk *_register_mux(struct device *dev, const char *name,
+static struct clk_core *_register_mux(struct device *dev, const char *name,
const char **parent_names, u8 num_parents,
unsigned long flags, void __iomem *reg,
u8 shift, u32 mask, u8 clk_mux_flags,
u32 *table, spinlock_t *lock)
{
struct clk_mux *mux;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
/* allocate the mux */
@@ -152,7 +152,7 @@ static struct clk *_register_mux(struct device *dev, const char *name,
*/
static void of_mux_clk_setup(struct device_node *node)
{
- struct clk *clk;
+ struct clk_core *clk;
void __iomem *reg;
int num_parents;
const char **parent_names;
diff --git a/drivers/clk/ux500/abx500-clk.c b/drivers/clk/ux500/abx500-clk.c
index e7bd62c..f27be78 100644
--- a/drivers/clk/ux500/abx500-clk.c
+++ b/drivers/clk/ux500/abx500-clk.c
@@ -13,7 +13,6 @@
#include <linux/platform_device.h>
#include <linux/mfd/abx500/ab8500.h>
#include <linux/mfd/abx500/ab8500-sysctrl.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/mfd/dbx500-prcmu.h>
@@ -23,7 +22,7 @@
static int ab8500_reg_clks(struct device *dev)
{
int ret;
- struct clk *clk;
+ struct clk_core *clk;
const char *intclk_parents[] = {"ab8500_sysclk", "ulpclk"};
u16 intclk_reg_sel[] = {0 , AB8500_SYSULPCLKCTRL1};
diff --git a/drivers/clk/ux500/clk-prcc.c b/drivers/clk/ux500/clk-prcc.c
index bd4769a..7eb055f 100644
--- a/drivers/clk/ux500/clk-prcc.c
+++ b/drivers/clk/ux500/clk-prcc.c
@@ -92,7 +92,7 @@ static struct clk_ops clk_prcc_kclk_ops = {
.is_enabled = clk_prcc_is_enabled,
};
-static struct clk *clk_reg_prcc(const char *name,
+static struct clk_core *clk_reg_prcc(const char *name,
const char *parent_name,
resource_size_t phy_base,
u32 cg_sel,
@@ -101,7 +101,7 @@ static struct clk *clk_reg_prcc(const char *name,
{
struct clk_prcc *clk;
struct clk_init_data clk_prcc_init;
- struct clk *clk_reg;
+ struct clk_core *clk_reg;
if (!name) {
pr_err("clk_prcc: %s invalid arguments passed\n", __func__);
@@ -142,7 +142,7 @@ free_clk:
return ERR_PTR(-ENOMEM);
}
-struct clk *clk_reg_prcc_pclk(const char *name,
+struct clk_core *clk_reg_prcc_pclk(const char *name,
const char *parent_name,
resource_size_t phy_base,
u32 cg_sel,
@@ -152,7 +152,7 @@ struct clk *clk_reg_prcc_pclk(const char *name,
&clk_prcc_pclk_ops);
}
-struct clk *clk_reg_prcc_kclk(const char *name,
+struct clk_core *clk_reg_prcc_kclk(const char *name,
const char *parent_name,
resource_size_t phy_base,
u32 cg_sel,
diff --git a/drivers/clk/ux500/clk-prcmu.c b/drivers/clk/ux500/clk-prcmu.c
index e2d63bc..bac54c9 100644
--- a/drivers/clk/ux500/clk-prcmu.c
+++ b/drivers/clk/ux500/clk-prcmu.c
@@ -243,7 +243,7 @@ static struct clk_ops clk_prcmu_opp_volt_scalable_ops = {
.set_rate = clk_prcmu_set_rate,
};
-static struct clk *clk_reg_prcmu(const char *name,
+static struct clk_core *clk_reg_prcmu(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long rate,
@@ -252,7 +252,7 @@ static struct clk *clk_reg_prcmu(const char *name,
{
struct clk_prcmu *clk;
struct clk_init_data clk_prcmu_init;
- struct clk *clk_reg;
+ struct clk_core *clk_reg;
if (!name) {
pr_err("clk_prcmu: %s invalid arguments passed\n", __func__);
@@ -292,7 +292,7 @@ free_clk:
return ERR_PTR(-ENOMEM);
}
-struct clk *clk_reg_prcmu_scalable(const char *name,
+struct clk_core *clk_reg_prcmu_scalable(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long rate,
@@ -302,7 +302,7 @@ struct clk *clk_reg_prcmu_scalable(const char *name,
&clk_prcmu_scalable_ops);
}
-struct clk *clk_reg_prcmu_gate(const char *name,
+struct clk_core *clk_reg_prcmu_gate(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long flags)
@@ -311,7 +311,7 @@ struct clk *clk_reg_prcmu_gate(const char *name,
&clk_prcmu_gate_ops);
}
-struct clk *clk_reg_prcmu_scalable_rate(const char *name,
+struct clk_core *clk_reg_prcmu_scalable_rate(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long rate,
@@ -321,7 +321,7 @@ struct clk *clk_reg_prcmu_scalable_rate(const char *name,
&clk_prcmu_scalable_rate_ops);
}
-struct clk *clk_reg_prcmu_rate(const char *name,
+struct clk_core *clk_reg_prcmu_rate(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long flags)
@@ -330,7 +330,7 @@ struct clk *clk_reg_prcmu_rate(const char *name,
&clk_prcmu_rate_ops);
}
-struct clk *clk_reg_prcmu_opp_gate(const char *name,
+struct clk_core *clk_reg_prcmu_opp_gate(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long flags)
@@ -339,7 +339,7 @@ struct clk *clk_reg_prcmu_opp_gate(const char *name,
&clk_prcmu_opp_gate_ops);
}
-struct clk *clk_reg_prcmu_opp_volt_scalable(const char *name,
+struct clk_core *clk_reg_prcmu_opp_volt_scalable(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long rate,
diff --git a/drivers/clk/ux500/clk-sysctrl.c b/drivers/clk/ux500/clk-sysctrl.c
index e364c9d..dc6608a 100644
--- a/drivers/clk/ux500/clk-sysctrl.c
+++ b/drivers/clk/ux500/clk-sysctrl.c
@@ -114,7 +114,7 @@ static struct clk_ops clk_sysctrl_set_parent_ops = {
.get_parent = clk_sysctrl_get_parent,
};
-static struct clk *clk_reg_sysctrl(struct device *dev,
+static struct clk_core *clk_reg_sysctrl(struct device *dev,
const char *name,
const char **parent_names,
u8 num_parents,
@@ -128,7 +128,7 @@ static struct clk *clk_reg_sysctrl(struct device *dev,
{
struct clk_sysctrl *clk;
struct clk_init_data clk_sysctrl_init;
- struct clk *clk_reg;
+ struct clk_core *clk_reg;
int i;
if (!dev)
@@ -176,7 +176,7 @@ static struct clk *clk_reg_sysctrl(struct device *dev,
return clk_reg;
}
-struct clk *clk_reg_sysctrl_gate(struct device *dev,
+struct clk_core *clk_reg_sysctrl_gate(struct device *dev,
const char *name,
const char *parent_name,
u16 reg_sel,
@@ -193,7 +193,7 @@ struct clk *clk_reg_sysctrl_gate(struct device *dev,
flags, &clk_sysctrl_gate_ops);
}
-struct clk *clk_reg_sysctrl_gate_fixed_rate(struct device *dev,
+struct clk_core *clk_reg_sysctrl_gate_fixed_rate(struct device *dev,
const char *name,
const char *parent_name,
u16 reg_sel,
@@ -212,7 +212,7 @@ struct clk *clk_reg_sysctrl_gate_fixed_rate(struct device *dev,
&clk_sysctrl_gate_fixed_rate_ops);
}
-struct clk *clk_reg_sysctrl_set_parent(struct device *dev,
+struct clk_core *clk_reg_sysctrl_set_parent(struct device *dev,
const char *name,
const char **parent_names,
u8 num_parents,
diff --git a/drivers/clk/ux500/clk.h b/drivers/clk/ux500/clk.h
index a2bb92d..acb50f8 100644
--- a/drivers/clk/ux500/clk.h
+++ b/drivers/clk/ux500/clk.h
@@ -10,56 +10,55 @@
#ifndef __UX500_CLK_H
#define __UX500_CLK_H
-#include <linux/clk.h>
#include <linux/device.h>
#include <linux/types.h>
-struct clk *clk_reg_prcc_pclk(const char *name,
+struct clk_core *clk_reg_prcc_pclk(const char *name,
const char *parent_name,
resource_size_t phy_base,
u32 cg_sel,
unsigned long flags);
-struct clk *clk_reg_prcc_kclk(const char *name,
+struct clk_core *clk_reg_prcc_kclk(const char *name,
const char *parent_name,
resource_size_t phy_base,
u32 cg_sel,
unsigned long flags);
-struct clk *clk_reg_prcmu_scalable(const char *name,
+struct clk_core *clk_reg_prcmu_scalable(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long rate,
unsigned long flags);
-struct clk *clk_reg_prcmu_gate(const char *name,
+struct clk_core *clk_reg_prcmu_gate(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long flags);
-struct clk *clk_reg_prcmu_scalable_rate(const char *name,
+struct clk_core *clk_reg_prcmu_scalable_rate(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long rate,
unsigned long flags);
-struct clk *clk_reg_prcmu_rate(const char *name,
+struct clk_core *clk_reg_prcmu_rate(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long flags);
-struct clk *clk_reg_prcmu_opp_gate(const char *name,
+struct clk_core *clk_reg_prcmu_opp_gate(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long flags);
-struct clk *clk_reg_prcmu_opp_volt_scalable(const char *name,
+struct clk_core *clk_reg_prcmu_opp_volt_scalable(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long rate,
unsigned long flags);
-struct clk *clk_reg_sysctrl_gate(struct device *dev,
+struct clk_core *clk_reg_sysctrl_gate(struct device *dev,
const char *name,
const char *parent_name,
u16 reg_sel,
@@ -68,7 +67,7 @@ struct clk *clk_reg_sysctrl_gate(struct device *dev,
unsigned long enable_delay_us,
unsigned long flags);
-struct clk *clk_reg_sysctrl_gate_fixed_rate(struct device *dev,
+struct clk_core *clk_reg_sysctrl_gate_fixed_rate(struct device *dev,
const char *name,
const char *parent_name,
u16 reg_sel,
@@ -78,7 +77,7 @@ struct clk *clk_reg_sysctrl_gate_fixed_rate(struct device *dev,
unsigned long enable_delay_us,
unsigned long flags);
-struct clk *clk_reg_sysctrl_set_parent(struct device *dev,
+struct clk_core *clk_reg_sysctrl_set_parent(struct device *dev,
const char *name,
const char **parent_names,
u8 num_parents,
diff --git a/drivers/clk/ux500/u8500_clk.c b/drivers/clk/ux500/u8500_clk.c
index 80069c3..708589f 100644
--- a/drivers/clk/ux500/u8500_clk.c
+++ b/drivers/clk/ux500/u8500_clk.c
@@ -7,7 +7,6 @@
* License terms: GNU General Public License (GPL) version 2
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/mfd/dbx500-prcmu.h>
@@ -19,7 +18,7 @@ void u8500_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
{
struct prcmu_fw_version *fw_version;
const char *sgaclk_parent = NULL;
- struct clk *clk;
+ struct clk_core *clk;
/* Clock sources */
clk = clk_reg_prcmu_gate("soc0_pll", NULL, PRCMU_PLLSOC0,
diff --git a/drivers/clk/ux500/u8500_of_clk.c b/drivers/clk/ux500/u8500_of_clk.c
index 7b55ef8..61efb85 100644
--- a/drivers/clk/ux500/u8500_of_clk.c
+++ b/drivers/clk/ux500/u8500_of_clk.c
@@ -8,7 +8,6 @@
*/
#include <linux/of.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/mfd/dbx500-prcmu.h>
@@ -18,9 +17,9 @@
#define PRCC_NUM_PERIPH_CLUSTERS 6
#define PRCC_PERIPHS_PER_CLUSTER 32
-static struct clk *prcmu_clk[PRCMU_NUM_CLKS];
-static struct clk *prcc_pclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) * PRCC_PERIPHS_PER_CLUSTER];
-static struct clk *prcc_kclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) * PRCC_PERIPHS_PER_CLUSTER];
+static struct clk_core *prcmu_clk[PRCMU_NUM_CLKS];
+static struct clk_core *prcc_pclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) * PRCC_PERIPHS_PER_CLUSTER];
+static struct clk_core *prcc_kclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) * PRCC_PERIPHS_PER_CLUSTER];
#define PRCC_SHOW(clk, base, bit) \
clk[(base * PRCC_PERIPHS_PER_CLUSTER) + bit]
@@ -29,10 +28,10 @@ static struct clk *prcc_kclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) * PRCC_PERIPHS_PER_C
#define PRCC_KCLK_STORE(clk, base, bit) \
prcc_kclk[(base * PRCC_PERIPHS_PER_CLUSTER) + bit] = clk
-static struct clk *ux500_twocell_get(struct of_phandle_args *clkspec,
+static struct clk_core *ux500_twocell_get(struct of_phandle_args *clkspec,
void *data)
{
- struct clk **clk_data = data;
+ struct clk_core **clk_data = data;
unsigned int base, bit;
if (clkspec->args_count != 2)
@@ -61,7 +60,7 @@ void u8500_of_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
struct device_node *np = NULL;
struct device_node *child = NULL;
const char *sgaclk_parent = NULL;
- struct clk *clk, *rtc_clk, *twd_clk;
+ struct clk_core *clk, *rtc_clk, *twd_clk;
if (of_have_populated_dt())
np = of_find_matching_node(NULL, u8500_clk_of_match);
diff --git a/drivers/clk/ux500/u8540_clk.c b/drivers/clk/ux500/u8540_clk.c
index 20c8add..a508845 100644
--- a/drivers/clk/ux500/u8540_clk.c
+++ b/drivers/clk/ux500/u8540_clk.c
@@ -7,7 +7,6 @@
* License terms: GNU General Public License (GPL) version 2
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/mfd/dbx500-prcmu.h>
@@ -17,7 +16,7 @@
void u8540_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
u32 clkrst5_base, u32 clkrst6_base)
{
- struct clk *clk;
+ struct clk_core *clk;
/* Clock sources. */
/* Fixed ClockGen */
diff --git a/drivers/clk/ux500/u9540_clk.c b/drivers/clk/ux500/u9540_clk.c
index 4479478..89055ae 100644
--- a/drivers/clk/ux500/u9540_clk.c
+++ b/drivers/clk/ux500/u9540_clk.c
@@ -7,7 +7,6 @@
* License terms: GNU General Public License (GPL) version 2
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/mfd/dbx500-prcmu.h>
diff --git a/drivers/clk/versatile/clk-icst.c b/drivers/clk/versatile/clk-icst.c
index bc96f10..d5719e0 100644
--- a/drivers/clk/versatile/clk-icst.c
+++ b/drivers/clk/versatile/clk-icst.c
@@ -13,7 +13,6 @@
* ICST clock code from the ARM tree should probably be merged into this
* file.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/err.h>
#include <linux/clk-provider.h>
@@ -121,13 +120,13 @@ static const struct clk_ops icst_ops = {
.set_rate = icst_set_rate,
};
-struct clk *icst_clk_register(struct device *dev,
+struct clk_core *icst_clk_register(struct device *dev,
const struct clk_icst_desc *desc,
const char *name,
const char *parent_name,
void __iomem *base)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_icst *icst;
struct clk_init_data init;
struct icst_params *pclone;
diff --git a/drivers/clk/versatile/clk-icst.h b/drivers/clk/versatile/clk-icst.h
index 04e6f0a..ede867b 100644
--- a/drivers/clk/versatile/clk-icst.h
+++ b/drivers/clk/versatile/clk-icst.h
@@ -13,7 +13,7 @@ struct clk_icst_desc {
u32 lock_offset;
};
-struct clk *icst_clk_register(struct device *dev,
+struct clk_core *icst_clk_register(struct device *dev,
const struct clk_icst_desc *desc,
const char *name,
const char *parent_name,
diff --git a/drivers/clk/versatile/clk-impd1.c b/drivers/clk/versatile/clk-impd1.c
index 1cc1330..46680db 100644
--- a/drivers/clk/versatile/clk-impd1.c
+++ b/drivers/clk/versatile/clk-impd1.c
@@ -7,7 +7,6 @@
* published by the Free Software Foundation.
*/
#include <linux/clk-provider.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/err.h>
#include <linux/io.h>
@@ -21,18 +20,18 @@
struct impd1_clk {
char *pclkname;
- struct clk *pclk;
+ struct clk_core *pclk;
char *vco1name;
- struct clk *vco1clk;
+ struct clk_core *vco1clk;
char *vco2name;
- struct clk *vco2clk;
- struct clk *mmciclk;
+ struct clk_core *vco2clk;
+ struct clk_core *mmciclk;
char *uartname;
- struct clk *uartclk;
+ struct clk_core *uartclk;
char *spiname;
- struct clk *spiclk;
+ struct clk_core *spiclk;
char *scname;
- struct clk *scclk;
+ struct clk_core *scclk;
struct clk_lookup *clks[15];
};
@@ -87,8 +86,8 @@ static const struct clk_icst_desc impd1_icst2_desc = {
void integrator_impd1_clk_init(void __iomem *base, unsigned int id)
{
struct impd1_clk *imc;
- struct clk *clk;
- struct clk *pclk;
+ struct clk_core *clk;
+ struct clk_core *pclk;
int i;
if (id > 3) {
diff --git a/drivers/clk/versatile/clk-realview.c b/drivers/clk/versatile/clk-realview.c
index c8b5231..524cba5 100644
--- a/drivers/clk/versatile/clk-realview.c
+++ b/drivers/clk/versatile/clk-realview.c
@@ -6,7 +6,6 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/err.h>
#include <linux/io.h>
@@ -50,7 +49,7 @@ static const struct clk_icst_desc __initdata realview_osc4_desc = {
*/
void __init realview_clk_init(void __iomem *sysbase, bool is_pb1176)
{
- struct clk *clk;
+ struct clk_core *clk;
/* APB clock dummy */
clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT, 0);
diff --git a/drivers/clk/versatile/clk-sp810.c b/drivers/clk/versatile/clk-sp810.c
index c6e86a9..9256d25 100644
--- a/drivers/clk/versatile/clk-sp810.c
+++ b/drivers/clk/versatile/clk-sp810.c
@@ -25,7 +25,7 @@ struct clk_sp810;
struct clk_sp810_timerclken {
struct clk_hw hw;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_sp810 *sp810;
int channel;
};
@@ -36,8 +36,8 @@ struct clk_sp810 {
void __iomem *base;
spinlock_t lock;
struct clk_sp810_timerclken timerclken[4];
- struct clk *refclk;
- struct clk *timclk;
+ struct clk_core *refclk;
+ struct clk_core *timclk;
};
static u8 clk_sp810_timerclken_get_parent(struct clk_hw *hw)
@@ -79,29 +79,31 @@ static int clk_sp810_timerclken_prepare(struct clk_hw *hw)
{
struct clk_sp810_timerclken *timerclken = to_clk_sp810_timerclken(hw);
struct clk_sp810 *sp810 = timerclken->sp810;
- struct clk *old_parent = __clk_get_parent(hw->clk);
- struct clk *new_parent;
+ struct clk_core *old_parent = __clk_get_parent(hw->clk);
+ struct clk_core *new_parent;
if (!sp810->refclk)
- sp810->refclk = of_clk_get(sp810->node, sp810->refclk_index);
+ sp810->refclk = of_clk_provider_get(sp810->node,
+ sp810->refclk_index);
if (!sp810->timclk)
- sp810->timclk = of_clk_get(sp810->node, sp810->timclk_index);
+ sp810->timclk = of_clk_provider_get(sp810->node,
+ sp810->timclk_index);
if (WARN_ON(IS_ERR(sp810->refclk) || IS_ERR(sp810->timclk)))
return -ENOENT;
/* Select fastest parent */
- if (clk_get_rate(sp810->refclk) > clk_get_rate(sp810->timclk))
+ if (clk_provider_get_rate(sp810->refclk) > clk_provider_get_rate(sp810->timclk))
new_parent = sp810->refclk;
else
new_parent = sp810->timclk;
/* Switch the parent if necessary */
if (old_parent != new_parent) {
- clk_prepare(new_parent);
- clk_set_parent(hw->clk, new_parent);
- clk_unprepare(old_parent);
+ clk_provider_prepare(new_parent);
+ clk_provider_set_parent(hw->clk, new_parent);
+ clk_provider_unprepare(old_parent);
}
return 0;
@@ -112,8 +114,8 @@ static void clk_sp810_timerclken_unprepare(struct clk_hw *hw)
struct clk_sp810_timerclken *timerclken = to_clk_sp810_timerclken(hw);
struct clk_sp810 *sp810 = timerclken->sp810;
- clk_put(sp810->timclk);
- clk_put(sp810->refclk);
+ __clk_put(sp810->timclk);
+ __clk_put(sp810->refclk);
}
static const struct clk_ops clk_sp810_timerclken_ops = {
@@ -123,7 +125,7 @@ static const struct clk_ops clk_sp810_timerclken_ops = {
.set_parent = clk_sp810_timerclken_set_parent,
};
-static struct clk *clk_sp810_timerclken_of_get(struct of_phandle_args *clkspec,
+static struct clk_core *clk_sp810_timerclken_of_get(struct of_phandle_args *clkspec,
void *data)
{
struct clk_sp810 *sp810 = data;
diff --git a/drivers/clk/versatile/clk-versatile.c b/drivers/clk/versatile/clk-versatile.c
index a76981e..1bdd542 100644
--- a/drivers/clk/versatile/clk-versatile.c
+++ b/drivers/clk/versatile/clk-versatile.c
@@ -8,7 +8,6 @@
* published by the Free Software Foundation.
*/
#include <linux/clk-provider.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/err.h>
#include <linux/of.h>
@@ -60,7 +59,7 @@ static const struct clk_icst_desc versatile_auxosc_desc __initconst = {
static void __init cm_osc_setup(struct device_node *np,
const struct clk_icst_desc *desc)
{
- struct clk *clk = ERR_PTR(-EINVAL);
+ struct clk_core *clk = ERR_PTR(-EINVAL);
const char *clk_name = np->name;
const char *parent_name;
diff --git a/drivers/clk/versatile/clk-vexpress-osc.c b/drivers/clk/versatile/clk-vexpress-osc.c
index 529a59c..c9e175f 100644
--- a/drivers/clk/versatile/clk-vexpress-osc.c
+++ b/drivers/clk/versatile/clk-vexpress-osc.c
@@ -73,7 +73,7 @@ static int vexpress_osc_probe(struct platform_device *pdev)
struct clk_lookup *cl = pdev->dev.platform_data; /* Non-DT lookup */
struct clk_init_data init;
struct vexpress_osc *osc;
- struct clk *clk;
+ struct clk_core *clk;
u32 range[2];
osc = devm_kzalloc(&pdev->dev, sizeof(*osc), GFP_KERNEL);
diff --git a/drivers/clk/versatile/clk-vexpress.c b/drivers/clk/versatile/clk-vexpress.c
index 2d5e1b4..e77f3d5 100644
--- a/drivers/clk/versatile/clk-vexpress.c
+++ b/drivers/clk/versatile/clk-vexpress.c
@@ -17,7 +17,7 @@
#include <linux/err.h>
#include <linux/vexpress.h>
-static struct clk *vexpress_sp810_timerclken[4];
+static struct clk_core *vexpress_sp810_timerclken[4];
static DEFINE_SPINLOCK(vexpress_sp810_lock);
static void __init vexpress_sp810_init(void __iomem *base)
@@ -54,7 +54,7 @@ static const char * const vexpress_clk_24mhz_periphs[] __initconst = {
void __init vexpress_clk_init(void __iomem *sp810_base)
{
- struct clk *clk;
+ struct clk_core *clk;
int i;
clk = clk_register_fixed_rate(NULL, "dummy_apb_pclk", NULL,
@@ -77,7 +77,7 @@ void __init vexpress_clk_init(void __iomem *sp810_base)
vexpress_sp810_init(sp810_base);
for (i = 0; i < ARRAY_SIZE(vexpress_sp810_timerclken); i++)
- WARN_ON(clk_set_parent(vexpress_sp810_timerclken[i], clk));
+ WARN_ON(clk_provider_set_parent(vexpress_sp810_timerclken[i], clk));
WARN_ON(clk_register_clkdev(vexpress_sp810_timerclken[0],
"v2m-timer0", "sp804"));
diff --git a/drivers/clk/x86/clk-lpt.c b/drivers/clk/x86/clk-lpt.c
index 812f83f..fbb6807 100644
--- a/drivers/clk/x86/clk-lpt.c
+++ b/drivers/clk/x86/clk-lpt.c
@@ -10,7 +10,6 @@
* published by the Free Software Foundation.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/err.h>
@@ -21,7 +20,7 @@
static int lpt_clk_probe(struct platform_device *pdev)
{
struct lpss_clk_data *drvdata;
- struct clk *clk;
+ struct clk_core *clk;
drvdata = devm_kzalloc(&pdev->dev, sizeof(*drvdata), GFP_KERNEL);
if (!drvdata)
diff --git a/drivers/clk/zynq/clkc.c b/drivers/clk/zynq/clkc.c
index 246cf12..0efdd9a 100644
--- a/drivers/clk/zynq/clkc.c
+++ b/drivers/clk/zynq/clkc.c
@@ -67,8 +67,8 @@ enum zynq_clk {
i2c0_aper, i2c1_aper, uart0_aper, uart1_aper, gpio_aper, lqspi_aper,
smc_aper, swdt, dbg_trc, dbg_apb, clk_max};
-static struct clk *ps_clk;
-static struct clk *clks[clk_max];
+static struct clk_core *ps_clk;
+static struct clk_core *clks[clk_max];
static struct clk_onecell_data clk_data;
static DEFINE_SPINLOCK(armpll_lock);
@@ -108,7 +108,7 @@ static void __init zynq_clk_register_fclk(enum zynq_clk fclk,
const char *clk_name, void __iomem *fclk_ctrl_reg,
const char **parents, int enable)
{
- struct clk *clk;
+ struct clk_core *clk;
u32 enable_reg;
char *mux_name;
char *div0_name;
@@ -154,7 +154,7 @@ static void __init zynq_clk_register_fclk(enum zynq_clk fclk,
0, CLK_GATE_SET_TO_DISABLE, fclk_gate_lock);
enable_reg = clk_readl(fclk_gate_reg) & 1;
if (enable && !enable_reg) {
- if (clk_prepare_enable(clks[fclk]))
+ if (clk_provider_prepare_enable(clks[fclk]))
pr_warn("%s: FCLK%u enable failed\n", __func__,
fclk - fclk0);
}
@@ -181,7 +181,7 @@ static void __init zynq_clk_register_periph_clk(enum zynq_clk clk0,
const char *clk_name1, void __iomem *clk_ctrl,
const char **parents, unsigned int two_gates)
{
- struct clk *clk;
+ struct clk_core *clk;
char *mux_name;
char *div_name;
spinlock_t *lock;
@@ -222,7 +222,7 @@ static void __init zynq_clk_setup(struct device_node *np)
int i;
u32 tmp;
int ret;
- struct clk *clk;
+ struct clk_core *clk;
char *clk_name;
unsigned int fclk_enable = 0;
const char *clk_output_name[clk_max];
@@ -333,13 +333,13 @@ static void __init zynq_clk_setup(struct device_node *np)
CLK_DIVIDER_ALLOW_ZERO, &ddrclk_lock);
clks[ddr2x] = clk_register_gate(NULL, clk_output_name[ddr2x],
"ddr2x_div", 0, SLCR_DDR_CLK_CTRL, 1, 0, &ddrclk_lock);
- clk_prepare_enable(clks[ddr2x]);
+ clk_provider_prepare_enable(clks[ddr2x]);
clk = clk_register_divider(NULL, "ddr3x_div", "ddrpll", 0,
SLCR_DDR_CLK_CTRL, 20, 6, CLK_DIVIDER_ONE_BASED |
CLK_DIVIDER_ALLOW_ZERO, &ddrclk_lock);
clks[ddr3x] = clk_register_gate(NULL, clk_output_name[ddr3x],
"ddr3x_div", 0, SLCR_DDR_CLK_CTRL, 0, 0, &ddrclk_lock);
- clk_prepare_enable(clks[ddr3x]);
+ clk_provider_prepare_enable(clks[ddr3x]);
clk = clk_register_divider(NULL, "dci_div0", "ddrpll", 0,
SLCR_DCI_CLK_CTRL, 8, 6, CLK_DIVIDER_ONE_BASED |
@@ -351,7 +351,7 @@ static void __init zynq_clk_setup(struct device_node *np)
clks[dci] = clk_register_gate(NULL, clk_output_name[dci], "dci_div1",
CLK_SET_RATE_PARENT, SLCR_DCI_CLK_CTRL, 0, 0,
&dciclk_lock);
- clk_prepare_enable(clks[dci]);
+ clk_provider_prepare_enable(clks[dci]);
/* Peripheral clocks */
for (i = fclk0; i <= fclk3; i++) {
@@ -505,10 +505,10 @@ static void __init zynq_clk_setup(struct device_node *np)
/* leave debug clocks in the state the bootloader set them up to */
tmp = clk_readl(SLCR_DBG_CLK_CTRL);
if (tmp & DBG_CLK_CTRL_CLKACT_TRC)
- if (clk_prepare_enable(clks[dbg_trc]))
+ if (clk_provider_prepare_enable(clks[dbg_trc]))
pr_warn("%s: trace clk enable failed\n", __func__);
if (tmp & DBG_CLK_CTRL_CPU_1XCLKACT)
- if (clk_prepare_enable(clks[dbg_apb]))
+ if (clk_provider_prepare_enable(clks[dbg_apb]))
pr_warn("%s: debug APB clk enable failed\n", __func__);
/* One gated clock for all APER clocks. */
diff --git a/drivers/clk/zynq/pll.c b/drivers/clk/zynq/pll.c
index cec9759..5176f65 100644
--- a/drivers/clk/zynq/pll.c
+++ b/drivers/clk/zynq/pll.c
@@ -193,12 +193,12 @@ static const struct clk_ops zynq_pll_ops = {
* @lock Register lock
* Returns handle to the registered clock.
*/
-struct clk *clk_register_zynq_pll(const char *name, const char *parent,
+struct clk_core *clk_register_zynq_pll(const char *name, const char *parent,
void __iomem *pll_ctrl, void __iomem *pll_status, u8 lock_index,
spinlock_t *lock)
{
struct zynq_pll *pll;
- struct clk *clk;
+ struct clk_core *clk;
u32 reg;
const char *parent_arr[1] = {parent};
unsigned long flags = 0;
diff --git a/drivers/gpu/drm/msm/hdmi/hdmi_phy_8960.c b/drivers/gpu/drm/msm/hdmi/hdmi_phy_8960.c
index 902d768..8e97702 100644
--- a/drivers/gpu/drm/msm/hdmi/hdmi_phy_8960.c
+++ b/drivers/gpu/drm/msm/hdmi/hdmi_phy_8960.c
@@ -15,7 +15,6 @@
* this program. If not, see <http://www.gnu.org/licenses/>.
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include "hdmi.h"
@@ -24,7 +23,7 @@ struct hdmi_phy_8960 {
struct hdmi_phy base;
struct hdmi *hdmi;
struct clk_hw pll_hw;
- struct clk *pll;
+ struct clk_core *pll;
unsigned long pixclk;
};
#define to_hdmi_phy_8960(x) container_of(x, struct hdmi_phy_8960, base)
diff --git a/drivers/media/platform/exynos4-is/media-dev.c b/drivers/media/platform/exynos4-is/media-dev.c
index 2620c48..2fdadd8 100644
--- a/drivers/media/platform/exynos4-is/media-dev.c
+++ b/drivers/media/platform/exynos4-is/media-dev.c
@@ -11,7 +11,6 @@
*/
#include <linux/bug.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/device.h>
@@ -215,7 +214,7 @@ static int __fimc_pipeline_open(struct exynos_media_pipeline *ep,
/* Disable PXLASYNC clock if this pipeline includes FIMC-IS */
if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) {
- ret = clk_prepare_enable(fmd->wbclk[CLK_IDX_WB_B]);
+ ret = clk_provider_prepare_enable(fmd->wbclk[CLK_IDX_WB_B]);
if (ret < 0)
return ret;
}
@@ -225,7 +224,7 @@ static int __fimc_pipeline_open(struct exynos_media_pipeline *ep,
return 0;
if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP])
- clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]);
+ clk_provider_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]);
return ret;
}
@@ -254,7 +253,7 @@ static int __fimc_pipeline_close(struct exynos_media_pipeline *ep)
/* Disable PXLASYNC clock if this pipeline includes FIMC-IS */
if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP])
- clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]);
+ clk_provider_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]);
return ret == -ENXIO ? 0 : ret;
}
@@ -954,7 +953,7 @@ static void fimc_md_put_clocks(struct fimc_md *fmd)
while (--i >= 0) {
if (IS_ERR(fmd->camclk[i].clock))
continue;
- clk_put(fmd->camclk[i].clock);
+ __clk_put(fmd->camclk[i].clock);
fmd->camclk[i].clock = ERR_PTR(-EINVAL);
}
@@ -962,7 +961,7 @@ static void fimc_md_put_clocks(struct fimc_md *fmd)
for (i = 0; i < FIMC_MAX_WBCLKS; i++) {
if (IS_ERR(fmd->wbclk[i]))
continue;
- clk_put(fmd->wbclk[i]);
+ __clk_put(fmd->wbclk[i]);
fmd->wbclk[i] = ERR_PTR(-EINVAL);
}
}
@@ -971,7 +970,7 @@ static int fimc_md_get_clocks(struct fimc_md *fmd)
{
struct device *dev = &fmd->pdev->dev;
char clk_name[32];
- struct clk *clock;
+ struct clk_core *clock;
int i, ret = 0;
for (i = 0; i < FIMC_MAX_CAMCLKS; i++)
@@ -979,7 +978,7 @@ static int fimc_md_get_clocks(struct fimc_md *fmd)
for (i = 0; i < FIMC_MAX_CAMCLKS; i++) {
snprintf(clk_name, sizeof(clk_name), "sclk_cam%u", i);
- clock = clk_get(dev, clk_name);
+ clock = clk_provider_get(dev, clk_name);
if (IS_ERR(clock)) {
dev_err(dev, "Failed to get clock: %s\n", clk_name);
@@ -1001,7 +1000,7 @@ static int fimc_md_get_clocks(struct fimc_md *fmd)
for (i = CLK_IDX_WB_B; i < FIMC_MAX_WBCLKS; i++) {
snprintf(clk_name, sizeof(clk_name), "pxl_async%u", i);
- clock = clk_get(dev, clk_name);
+ clock = clk_provider_get(dev, clk_name);
if (IS_ERR(clock)) {
v4l2_err(&fmd->v4l2_dev, "Failed to get clock: %s\n",
clk_name);
diff --git a/drivers/media/platform/exynos4-is/media-dev.h b/drivers/media/platform/exynos4-is/media-dev.h
index 0321454..f24dac6 100644
--- a/drivers/media/platform/exynos4-is/media-dev.h
+++ b/drivers/media/platform/exynos4-is/media-dev.h
@@ -9,7 +9,6 @@
#ifndef FIMC_MDEVICE_H_
#define FIMC_MDEVICE_H_
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/platform_device.h>
#include <linux/mutex.h>
@@ -72,7 +71,7 @@ struct fimc_csis_info {
};
struct fimc_camclk_info {
- struct clk *clock;
+ struct clk_core *clock;
int use_count;
unsigned long frequency;
};
@@ -124,7 +123,7 @@ struct fimc_md {
struct fimc_sensor_info sensor[FIMC_MAX_SENSORS];
int num_sensors;
struct fimc_camclk_info camclk[FIMC_MAX_CAMCLKS];
- struct clk *wbclk[FIMC_MAX_WBCLKS];
+ struct clk_core *wbclk[FIMC_MAX_WBCLKS];
struct fimc_lite *fimc_lite[FIMC_LITE_MAX_DEVS];
struct fimc_dev *fimc[FIMC_MAX_DEVS];
struct fimc_is *fimc_is;
@@ -141,7 +140,7 @@ struct fimc_md {
} pinctl;
struct cam_clk_provider {
- struct clk *clks[FIMC_MAX_CAMCLKS];
+ struct clk_core *clks[FIMC_MAX_CAMCLKS];
struct clk_onecell_data clk_data;
struct device_node *of_node;
struct cam_clk camclk[FIMC_MAX_CAMCLKS];
diff --git a/drivers/media/platform/omap3isp/isp.h b/drivers/media/platform/omap3isp/isp.h
index 2c314ee..5fcedd6 100644
--- a/drivers/media/platform/omap3isp/isp.h
+++ b/drivers/media/platform/omap3isp/isp.h
@@ -133,7 +133,7 @@ struct isp_xclk {
struct isp_device *isp;
struct clk_hw hw;
struct clk_lookup *lookup;
- struct clk *clk;
+ struct clk_core *clk;
enum isp_xclk_id id;
spinlock_t lock; /* Protects enabled and divider */
diff --git a/drivers/rtc/rtc-hym8563.c b/drivers/rtc/rtc-hym8563.c
index b936bb4..ea21bd1 100644
--- a/drivers/rtc/rtc-hym8563.c
+++ b/drivers/rtc/rtc-hym8563.c
@@ -398,11 +398,11 @@ static const struct clk_ops hym8563_clkout_ops = {
.set_rate = hym8563_clkout_set_rate,
};
-static struct clk *hym8563_clkout_register_clk(struct hym8563 *hym8563)
+static struct clk_core *hym8563_clkout_register_clk(struct hym8563 *hym8563)
{
struct i2c_client *client = hym8563->client;
struct device_node *node = client->dev.of_node;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
int ret;
diff --git a/drivers/spi/spi-pxa2xx-pci.c b/drivers/spi/spi-pxa2xx-pci.c
index 536c863..f590e00 100644
--- a/drivers/spi/spi-pxa2xx-pci.c
+++ b/drivers/spi/spi-pxa2xx-pci.c
@@ -7,7 +7,6 @@
#include <linux/of_device.h>
#include <linux/module.h>
#include <linux/spi/pxa2xx_spi.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
enum {
diff --git a/drivers/staging/imx-drm/imx-tve.c b/drivers/staging/imx-drm/imx-tve.c
index 31fe7cf..4fcb4d8 100644
--- a/drivers/staging/imx-drm/imx-tve.c
+++ b/drivers/staging/imx-drm/imx-tve.c
@@ -18,7 +18,6 @@
* MA 02110-1301, USA.
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/component.h>
#include <linux/module.h>
@@ -121,10 +120,10 @@ struct imx_tve {
struct regmap *regmap;
struct regulator *dac_reg;
struct i2c_adapter *ddc;
- struct clk *clk;
- struct clk *di_sel_clk;
+ struct clk_core *clk;
+ struct clk_core *di_sel_clk;
struct clk_hw clk_hw_di;
- struct clk *di_clk;
+ struct clk_core *di_clk;
int vsync_pin;
int hsync_pin;
};
@@ -151,7 +150,7 @@ static void tve_enable(struct imx_tve *tve)
if (!tve->enabled) {
tve->enabled = true;
- clk_prepare_enable(tve->clk);
+ clk_provider_prepare_enable(tve->clk);
ret = regmap_update_bits(tve->regmap, TVE_COM_CONF_REG,
TVE_IPU_CLK_EN | TVE_EN,
TVE_IPU_CLK_EN | TVE_EN);
@@ -178,7 +177,7 @@ static void tve_disable(struct imx_tve *tve)
tve->enabled = false;
ret = regmap_update_bits(tve->regmap, TVE_COM_CONF_REG,
TVE_IPU_CLK_EN | TVE_EN, 0);
- clk_disable_unprepare(tve->clk);
+ clk_provider_disable_unprepare(tve->clk);
}
}
@@ -253,12 +252,12 @@ static int imx_tve_connector_mode_valid(struct drm_connector *connector,
unsigned long rate;
/* pixel clock with 2x oversampling */
- rate = clk_round_rate(tve->clk, 2000UL * mode->clock) / 2000;
+ rate = clk_provider_round_rate(tve->clk, 2000UL * mode->clock) / 2000;
if (rate == mode->clock)
return MODE_OK;
/* pixel clock without oversampling */
- rate = clk_round_rate(tve->clk, 1000UL * mode->clock) / 1000;
+ rate = clk_provider_round_rate(tve->clk, 1000UL * mode->clock) / 1000;
if (rate == mode->clock)
return MODE_OK;
@@ -327,13 +326,13 @@ static void imx_tve_encoder_mode_set(struct drm_encoder *encoder,
* and enable 4x oversampling for lower resolutions
*/
rate = 2000UL * mode->clock;
- clk_set_rate(tve->clk, rate);
- rounded_rate = clk_get_rate(tve->clk);
+ clk_provider_set_rate(tve->clk, rate);
+ rounded_rate = clk_provider_get_rate(tve->clk);
if (rounded_rate >= rate)
div = 2;
- clk_set_rate(tve->di_clk, rounded_rate / div);
+ clk_provider_set_rate(tve->di_clk, rounded_rate / div);
- ret = clk_set_parent(tve->di_sel_clk, tve->di_clk);
+ ret = clk_provider_set_parent(tve->di_sel_clk, tve->di_clk);
if (ret < 0) {
dev_err(tve->dev, "failed to set di_sel parent to tve_di: %d\n",
ret);
@@ -645,7 +644,7 @@ static int imx_tve_bind(struct device *dev, struct device *master, void *data)
return ret;
}
- tve->clk = devm_clk_get(dev, "tve");
+ tve->clk = devm_clk_provider_get(dev, "tve");
if (IS_ERR(tve->clk)) {
dev_err(dev, "failed to get high speed tve clock: %ld\n",
PTR_ERR(tve->clk));
@@ -653,7 +652,7 @@ static int imx_tve_bind(struct device *dev, struct device *master, void *data)
}
/* this is the IPU DI clock input selector, can be parented to tve_di */
- tve->di_sel_clk = devm_clk_get(dev, "di_sel");
+ tve->di_sel_clk = devm_clk_provider_get(dev, "di_sel");
if (IS_ERR(tve->di_sel_clk)) {
dev_err(dev, "failed to get ipu di mux clock: %ld\n",
PTR_ERR(tve->di_sel_clk));
diff --git a/include/asm-generic/clkdev.h b/include/asm-generic/clkdev.h
index 90a32a6..4320225 100644
--- a/include/asm-generic/clkdev.h
+++ b/include/asm-generic/clkdev.h
@@ -15,10 +15,10 @@
#include <linux/slab.h>
-struct clk;
+struct clk_core;
-static inline int __clk_get(struct clk *clk) { return 1; }
-static inline void __clk_put(struct clk *clk) { }
+static inline int __clk_get(struct clk_core *clk) { return 1; }
+static inline void __clk_put(struct clk_core *clk) { }
static inline struct clk_lookup_alloc *__clkdev_alloc(size_t size)
{
diff --git a/include/linux/clk/ti.h b/include/linux/clk/ti.h
index e8d8a35..6b9e6b4 100644
--- a/include/linux/clk/ti.h
+++ b/include/linux/clk/ti.h
@@ -22,8 +22,8 @@
* @mult_div1_reg: register containing the DPLL M and N bitfields
* @mult_mask: mask of the DPLL M bitfield in @mult_div1_reg
* @div1_mask: mask of the DPLL N bitfield in @mult_div1_reg
- * @clk_bypass: struct clk pointer to the clock's bypass clock input
- * @clk_ref: struct clk pointer to the clock's reference clock input
+ * @clk_bypass: struct clk_core pointer to the clock's bypass clock input
+ * @clk_ref: struct clk_core pointer to the clock's reference clock input
* @control_reg: register containing the DPLL mode bitfield
* @enable_mask: mask of the DPLL mode bitfield in @control_reg
* @last_rounded_rate: cache of the last rate result of omap2_dpll_round_rate()
@@ -68,8 +68,8 @@ struct dpll_data {
void __iomem *mult_div1_reg;
u32 mult_mask;
u32 div1_mask;
- struct clk *clk_bypass;
- struct clk *clk_ref;
+ struct clk_core *clk_bypass;
+ struct clk_core *clk_ref;
void __iomem *control_reg;
u32 enable_mask;
unsigned long last_rounded_rate;
@@ -251,7 +251,7 @@ extern const struct clk_ops ti_clk_mux_ops;
#define to_clk_hw_omap(_hw) container_of(_hw, struct clk_hw_omap, hw)
-void omap2_init_clk_hw_omap_clocks(struct clk *clk);
+void omap2_init_clk_hw_omap_clocks(struct clk_core *clk);
int omap3_noncore_dpll_enable(struct clk_hw *hw);
void omap3_noncore_dpll_disable(struct clk_hw *hw);
int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate,
diff --git a/include/linux/clk/zynq.h b/include/linux/clk/zynq.h
index a990a59..6c35291 100644
--- a/include/linux/clk/zynq.h
+++ b/include/linux/clk/zynq.h
@@ -25,7 +25,7 @@
void zynq_clock_init(void);
-struct clk *clk_register_zynq_pll(const char *name, const char *parent,
+struct clk_core *clk_register_zynq_pll(const char *name, const char *parent,
void __iomem *pll_ctrl, void __iomem *pll_status, u8 lock_index,
spinlock_t *lock);
#endif
diff --git a/include/linux/platform_data/si5351.h b/include/linux/platform_data/si5351.h
index a947ab8..4b34c69 100644
--- a/include/linux/platform_data/si5351.h
+++ b/include/linux/platform_data/si5351.h
@@ -107,8 +107,8 @@ struct si5351_clkout_config {
* @clkout: array of clkout configuration
*/
struct si5351_platform_data {
- struct clk *clk_xtal;
- struct clk *clk_clkin;
+ struct clk_core *clk_xtal;
+ struct clk_core *clk_clkin;
enum si5351_pll_src pll_src[2];
struct si5351_clkout_config clkout[8];
};
diff --git a/sound/soc/mxs/mxs-saif.c b/sound/soc/mxs/mxs-saif.c
index 231d7e7..a24367d 100644
--- a/sound/soc/mxs/mxs-saif.c
+++ b/sound/soc/mxs/mxs-saif.c
@@ -682,11 +682,11 @@ static int mxs_saif_mclk_init(struct platform_device *pdev)
{
struct mxs_saif *saif = platform_get_drvdata(pdev);
struct device_node *np = pdev->dev.of_node;
- struct clk *clk;
+ struct clk_core *clk;
int ret;
clk = clk_register_divider(&pdev->dev, "mxs_saif_mclk",
- __clk_get_name(saif->clk), 0,
+ clk_get_name(saif->clk), 0,
saif->base + SAIF_CTRL,
BP_SAIF_CTRL_BITCLK_MULT_RATE, 3,
0, NULL);
--
1.9.3
1
0
I moved from ST Microelectronics and so updating email-id to personal one.
Signed-off-by: Rajeev Kumar <rajeevkumar.linux(a)gmail.com>
---
sound/soc/codecs/sta529.c | 4 ++--
sound/soc/dwc/designware_i2s.c | 2 +-
sound/soc/spear/spear_pcm.c | 4 ++--
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/sound/soc/codecs/sta529.c b/sound/soc/codecs/sta529.c
index 9aa1323..89c748d 100644
--- a/sound/soc/codecs/sta529.c
+++ b/sound/soc/codecs/sta529.c
@@ -4,7 +4,7 @@
* sound/soc/codecs/sta529.c -- spear ALSA Soc codec driver
*
* Copyright (C) 2012 ST Microelectronics
- * Rajeev Kumar <rajeev-dlh.kumar(a)st.com>
+ * Rajeev Kumar <rajeevkumar.linux(a)gmail.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
@@ -426,5 +426,5 @@ static struct i2c_driver sta529_i2c_driver = {
module_i2c_driver(sta529_i2c_driver);
MODULE_DESCRIPTION("ASoC STA529 codec driver");
-MODULE_AUTHOR("Rajeev Kumar <rajeev-dlh.kumar(a)st.com>");
+MODULE_AUTHOR("Rajeev Kumar <rajeevkumar.linux(a)gmail.com>");
MODULE_LICENSE("GPL");
diff --git a/sound/soc/dwc/designware_i2s.c b/sound/soc/dwc/designware_i2s.c
index 25c31f1..17b5cee 100644
--- a/sound/soc/dwc/designware_i2s.c
+++ b/sound/soc/dwc/designware_i2s.c
@@ -455,7 +455,7 @@ static struct platform_driver dw_i2s_driver = {
module_platform_driver(dw_i2s_driver);
-MODULE_AUTHOR("Rajeev Kumar <rajeev-dlh.kumar(a)st.com>");
+MODULE_AUTHOR("Rajeev Kumar <rajeevkumar.linux(a)gmail.com>");
MODULE_DESCRIPTION("DESIGNWARE I2S SoC Interface");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:designware_i2s");
diff --git a/sound/soc/spear/spear_pcm.c b/sound/soc/spear/spear_pcm.c
index 0e5a8f3..a7dc3c5 100644
--- a/sound/soc/spear/spear_pcm.c
+++ b/sound/soc/spear/spear_pcm.c
@@ -4,7 +4,7 @@
* sound/soc/spear/spear_pcm.c
*
* Copyright (C) 2012 ST Microelectronics
- * Rajeev Kumar<rajeev-dlh.kumar(a)st.com>
+ * Rajeev Kumar<rajeevkumar.linux(a)gmail.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
@@ -50,6 +50,6 @@ int devm_spear_pcm_platform_register(struct device *dev,
}
EXPORT_SYMBOL_GPL(devm_spear_pcm_platform_register);
-MODULE_AUTHOR("Rajeev Kumar <rajeev-dlh.kumar(a)st.com>");
+MODULE_AUTHOR("Rajeev Kumar <rajeevkumar.linux(a)gmail.com>");
MODULE_DESCRIPTION("SPEAr PCM DMA module");
MODULE_LICENSE("GPL");
--
1.7.9.5
2
1
Hello all,
I’m using ALSA for building a performance musical instrument, so I’m after
low-latency audio output.
I have some questions (since I'm fairly new to ALSA and to Linux they may be a
big n00by, so please bear with me)…
1. I’m using asynchronous audio output (i.e. using a callback). Sometimes the
system simply stops calling the callback function without giving an error. In
case of an xrun I would expect there to be an underrun message (which I
sometimes also get) so I can handle it properly. So I guess something else is
causing the issue? Any pointers?
2. What does “File descriptor is in a bad state” mean, when it is returned by
snd_pcm_writei? I notice that I can often avoid getting it by increasing the
size of my buffer but the message doesn't make sense to me.
3. Occasionally my application grinds to a halt with a “I/O is possible” message
– presumably this is triggered by the ALSA callback mechanism?
4. My last question is a bit more conceptual: what determines the playback
latency of my audio stream? The period size? The total ring buffer size? I
assume it should be the difference between the hardware playback pointer and the
software write pointer, but I can’t figure out how they are determined.
Thanks for any help.
System info: Raspberry Pi B+ (non-overclocked), Raspbian Wheezy, USB PnP CM108
audio device
3
5
Hi
Can anyone tell me what is the reasoning of the following two commits
commit: 5d16333 ASoC: SND_SOC_DAIFMT_NB_NF become 0 as default settings
commit: eef28e1 ASoC: SND_SOC_DAIFMT_GATED become 0 as default settings
with these two commits, now we have
#define SND_SOC_DAIFMT_GATED (0 << 4)
#define SND_SOC_DAIFMT_NB_NF (0 << 8)
in soc-dai.h
what's the good to shift 0 with different numbers?
no matter the number, they both equal to 0.
IMO all bit flags which share same variable (in this case SND_SOC_DAIFMT)
should have different value, isn't it?
Thanks,
Jiada
2
1
Changes since v1 of the patch set:
- Move gpio-clock under drivers drivers/clk/ti/ and change compatible
string to "ti,gpio-clock" to get it accepted
- Drop already applied "ASoC: mcasp: Fix implicit BLCK divider setting"
- Fix typo from "ARM: dts: am33xx: Add external clock provider" commit
message
The code has a functional dependency to:
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg108199.html
Without the above patch the audio card does not probe.
The code has been rebased on top of Linux 3.17-rc1 merged with
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next
with http://www.mail-archive.com/linux-omap@vger.kernel.org/msg108199.html
cherry-picked on top.
Cheers,
Jyri
Jyri Sarha (8):
clk: ti: add gpio controlled clock
drm/tilcdc: Add I2S HDMI audio config for tda998x
ASoC: davinci-evm: HDMI audio support for TDA998x trough McASP I2S
bus
ASoC: davinci: HDMI audio build for AM33XX and TDA998x
ARM: dts: am33xx: Add external clock provider
ARM: dts: am335x-boneblack: Add HDMI audio support
ARM: OMAP2+: omap2plus_defconfig: TDA998X HDMI trough tilcdc,slave
ARM: OMAP2+: omap2plus_defconfig: Enable BeagleBone Black HDMI audio
support
.../devicetree/bindings/clock/ti/gpio-clock.txt | 21 ++
.../bindings/sound/davinci-evm-audio.txt | 4 +-
arch/arm/boot/dts/am335x-boneblack.dts | 54 ++++++
arch/arm/boot/dts/am33xx.dtsi | 10 +
arch/arm/configs/omap2plus_defconfig | 5 +
drivers/clk/ti/Makefile | 2 +-
drivers/clk/ti/gpio.c | 202 ++++++++++++++++++++
drivers/gpu/drm/tilcdc/tilcdc_slave.c | 24 ++-
sound/soc/davinci/Kconfig | 12 ++
sound/soc/davinci/davinci-evm.c | 82 +++++++-
10 files changed, 411 insertions(+), 5 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/ti/gpio-clock.txt
create mode 100644 drivers/clk/ti/gpio.c
--
1.7.9.5
5
18

09 Sep '14
as pr_* macros are more preffered over printk, so printk replaced
with corresponding pr_* macros.
this patch will generate warning from checkpatch as it only did printk
replacement and didnot fixed other style issues.
Signed-off-by: Sudip Mukherjee <sudip(a)vectorindia.org>
---
The replacement was done by a bash script to avoid copy paste error. The script is as follows :
OLD1="[^_//]printk(KERN_DEBUG"
OLD2="[^_//]printk(KERN_ERR"
OLD3="[^_//]printk(KERN_INFO"
OLD4="[^_//]printk(KERN_WARNING"
OLD5="[^_//]printk(KERN_ALERT"
NEW1="pr_debug("
NEW2="pr_err("
NEW3="pr_info("
NEW4="pr_warn("
NEW5="pr_alert("
TFILE="/tmp/out.tmp.$$"
for f in *.c
do
sed -e "s/$OLD1/$NEW1/g" -e "s/$OLD2/$NEW2/g" -e "s/$OLD3/$NEW3/g" -e "s/$OLD4/$NEW4/g" -e "s/$OLD5/$NEW5/g" "$f" > $TFILE && mv $TFILE "$f"
done
Frankly speaking this script has missed few instances of printk(warning) which was edited manually.
sound/pci/au88x0/au88x0.c | 22 ++++++------
sound/pci/au88x0/au88x0_a3d.c | 10 +++---
sound/pci/au88x0/au88x0_core.c | 76 ++++++++++++++++++++--------------------
sound/pci/au88x0/au88x0_eq.c | 2 +-
sound/pci/au88x0/au88x0_game.c | 2 +-
sound/pci/au88x0/au88x0_mpu401.c | 2 +-
sound/pci/au88x0/au88x0_pcm.c | 8 ++---
sound/pci/au88x0/au88x0_synth.c | 26 +++++++-------
8 files changed, 74 insertions(+), 74 deletions(-)
diff --git a/sound/pci/au88x0/au88x0.c b/sound/pci/au88x0/au88x0.c
index afb1b44..8e40153 100644
--- a/sound/pci/au88x0/au88x0.c
+++ b/sound/pci/au88x0/au88x0.c
@@ -48,10 +48,10 @@ static void vortex_fix_latency(struct pci_dev *vortex)
{
int rc;
if (!(rc = pci_write_config_byte(vortex, 0x40, 0xff))) {
- printk(KERN_INFO CARD_NAME
+ pr_info( CARD_NAME
": vortex latency is 0xff\n");
} else {
- printk(KERN_WARNING CARD_NAME
+ pr_warn( CARD_NAME
": could not set vortex latency: pci error 0x%x\n", rc);
}
}
@@ -70,10 +70,10 @@ static void vortex_fix_agp_bridge(struct pci_dev *via)
if (!(rc = pci_read_config_byte(via, 0x42, &value))
&& ((value & 0x10)
|| !(rc = pci_write_config_byte(via, 0x42, value | 0x10)))) {
- printk(KERN_INFO CARD_NAME
+ pr_info( CARD_NAME
": bridge config is 0x%x\n", value | 0x10);
} else {
- printk(KERN_WARNING CARD_NAME
+ pr_warn( CARD_NAME
": could not set vortex latency: pci error 0x%x\n", rc);
}
}
@@ -97,7 +97,7 @@ static void snd_vortex_workaround(struct pci_dev *vortex, int fix)
PCI_DEVICE_ID_AMD_FE_GATE_7007, NULL);
}
if (via) {
- printk(KERN_INFO CARD_NAME ": Activating latency workaround...\n");
+ pr_info( CARD_NAME ": Activating latency workaround...\n");
vortex_fix_latency(vortex);
vortex_fix_agp_bridge(via);
}
@@ -153,7 +153,7 @@ snd_vortex_create(struct snd_card *card, struct pci_dev *pci, vortex_t ** rchip)
return err;
if (pci_set_dma_mask(pci, DMA_BIT_MASK(32)) < 0 ||
pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(32)) < 0) {
- printk(KERN_ERR "error to set DMA mask\n");
+ pr_err( "error to set DMA mask\n");
pci_disable_device(pci);
return -ENXIO;
}
@@ -182,7 +182,7 @@ snd_vortex_create(struct snd_card *card, struct pci_dev *pci, vortex_t ** rchip)
chip->mmio = pci_ioremap_bar(pci, 0);
if (!chip->mmio) {
- printk(KERN_ERR "MMIO area remap failed.\n");
+ pr_err( "MMIO area remap failed.\n");
err = -ENOMEM;
goto ioremap_out;
}
@@ -191,14 +191,14 @@ snd_vortex_create(struct snd_card *card, struct pci_dev *pci, vortex_t ** rchip)
* This must be done before we do request_irq otherwise we can get spurious
* interrupts that we do not handle properly and make a mess of things */
if ((err = vortex_core_init(chip)) != 0) {
- printk(KERN_ERR "hw core init failed\n");
+ pr_err( "hw core init failed\n");
goto core_out;
}
if ((err = request_irq(pci->irq, vortex_interrupt,
IRQF_SHARED, KBUILD_MODNAME,
chip)) != 0) {
- printk(KERN_ERR "cannot grab irq\n");
+ pr_err( "cannot grab irq\n");
goto irq_out;
}
chip->irq = pci->irq;
@@ -342,10 +342,10 @@ snd_vortex_probe(struct pci_dev *pci, const struct pci_device_id *pci_id)
chip->rev = pci->revision;
#ifdef CHIP_AU8830
if ((chip->rev) != 0xfe && (chip->rev) != 0xfa) {
- printk(KERN_ALERT
+ pr_alert(
"vortex: The revision (%x) of your card has not been seen before.\n",
chip->rev);
- printk(KERN_ALERT
+ pr_alert(
"vortex: Please email the results of 'lspci -vv' to openvortex-dev(a)nongnu.org.\n");
snd_card_free(card);
err = -ENODEV;
diff --git a/sound/pci/au88x0/au88x0_a3d.c b/sound/pci/au88x0/au88x0_a3d.c
index aad831a..a5d6752 100644
--- a/sound/pci/au88x0/au88x0_a3d.c
+++ b/sound/pci/au88x0/au88x0_a3d.c
@@ -463,7 +463,7 @@ static void a3dsrc_ZeroSliceIO(a3dsrc_t * a)
static void a3dsrc_ZeroState(a3dsrc_t * a)
{
/*
- printk(KERN_DEBUG "vortex: ZeroState slice: %d, source %d\n",
+ pr_debug( "vortex: ZeroState slice: %d, source %d\n",
a->slice, a->source);
*/
a3dsrc_SetAtmosState(a, 0, 0, 0, 0);
@@ -489,7 +489,7 @@ static void a3dsrc_ZeroStateA3D(a3dsrc_t * a)
int i, var, var2;
if ((a->vortex) == NULL) {
- printk(KERN_ERR "vortex: ZeroStateA3D: ERROR: a->vortex is NULL\n");
+ pr_err( "vortex: ZeroStateA3D: ERROR: a->vortex is NULL\n");
return;
}
@@ -628,14 +628,14 @@ static void vortex_Vort3D_connect(vortex_t * v, int en)
v->mixxtlk[0] =
vortex_adb_checkinout(v, v->fixed_res, en, VORTEX_RESOURCE_MIXIN);
if (v->mixxtlk[0] < 0) {
- printk
+ pr_warn
("vortex: vortex_Vort3D: ERROR: not enough free mixer resources.\n");
return;
}
v->mixxtlk[1] =
vortex_adb_checkinout(v, v->fixed_res, en, VORTEX_RESOURCE_MIXIN);
if (v->mixxtlk[1] < 0) {
- printk
+ pr_warn
("vortex: vortex_Vort3D: ERROR: not enough free mixer resources.\n");
return;
}
@@ -679,7 +679,7 @@ static void vortex_Vort3D_connect(vortex_t * v, int en)
static void vortex_Vort3D_InitializeSource(a3dsrc_t * a, int en)
{
if (a->vortex == NULL) {
- printk
+ pr_warn
("vortex: Vort3D_InitializeSource: A3D source not initialized\n");
return;
}
diff --git a/sound/pci/au88x0/au88x0_core.c b/sound/pci/au88x0/au88x0_core.c
index ae59dba..4014a02 100644
--- a/sound/pci/au88x0/au88x0_core.c
+++ b/sound/pci/au88x0/au88x0_core.c
@@ -285,7 +285,7 @@ vortex_mixer_addWTD(vortex_t * vortex, unsigned char mix, unsigned char ch)
temp = hwread(vortex->mmio, prev);
//printk(KERN_INFO "vortex: mixAddWTD: while addr=%x, val=%x\n", prev, temp);
if ((++lifeboat) > 0xf) {
- printk(KERN_ERR
+ pr_err(
"vortex_mixer_addWTD: lifeboat overflow\n");
return 0;
}
@@ -303,7 +303,7 @@ vortex_mixer_delWTD(vortex_t * vortex, unsigned char mix, unsigned char ch)
eax = hwread(vortex->mmio, VORTEX_MIXER_SR);
if (((1 << ch) & eax) == 0) {
- printk(KERN_ERR "mix ALARM %x\n", eax);
+ pr_err( "mix ALARM %x\n", eax);
return 0;
}
ebp = VORTEX_MIXER_CHNBASE + (ch << 2);
@@ -324,7 +324,7 @@ vortex_mixer_delWTD(vortex_t * vortex, unsigned char mix, unsigned char ch)
//printk(KERN_INFO "vortex: mixdelWTD: 1 addr=%x, val=%x, src=%x\n", ebx, edx, src);
while ((edx & 0xf) != mix) {
if ((esi) > 0xf) {
- printk(KERN_ERR
+ pr_err(
"vortex: mixdelWTD: error lifeboat overflow\n");
return 0;
}
@@ -492,7 +492,7 @@ vortex_src_persist_convratio(vortex_t * vortex, unsigned char src, int ratio)
hwwrite(vortex->mmio, VORTEX_SRC_CONVRATIO + (src << 2), ratio);
temp = hwread(vortex->mmio, VORTEX_SRC_CONVRATIO + (src << 2));
if ((++lifeboat) > 0x9) {
- printk(KERN_ERR "Vortex: Src cvr fail\n");
+ pr_err( "Vortex: Src cvr fail\n");
break;
}
}
@@ -545,7 +545,7 @@ vortex_src_checkratio(vortex_t * vortex, unsigned char src,
hwwrite(vortex->mmio, VORTEX_SRC_CONVRATIO + (src << 2), desired_ratio);
if ((lifeboat++) > 15) {
- printk(KERN_ERR "Vortex: could not set src-%d from %d to %d\n",
+ pr_err( "Vortex: could not set src-%d from %d to %d\n",
src, hw_ratio, desired_ratio);
break;
}
@@ -684,7 +684,7 @@ vortex_src_addWTD(vortex_t * vortex, unsigned char src, unsigned char ch)
temp = hwread(vortex->mmio, prev);
//printk(KERN_INFO "vortex: srcAddWTD: while addr=%x, val=%x\n", prev, temp);
if ((++lifeboat) > 0xf) {
- printk(KERN_ERR
+ pr_err(
"vortex_src_addWTD: lifeboat overflow\n");
return 0;
}
@@ -703,7 +703,7 @@ vortex_src_delWTD(vortex_t * vortex, unsigned char src, unsigned char ch)
eax = hwread(vortex->mmio, VORTEX_SRCBLOCK_SR);
if (((1 << ch) & eax) == 0) {
- printk(KERN_ERR "src alarm\n");
+ pr_err( "src alarm\n");
return 0;
}
ebp = VORTEX_SRC_CHNBASE + (ch << 2);
@@ -724,7 +724,7 @@ vortex_src_delWTD(vortex_t * vortex, unsigned char src, unsigned char ch)
//printk(KERN_INFO "vortex: srcdelWTD: 1 addr=%x, val=%x, src=%x\n", ebx, edx, src);
while ((edx & 0xf) != src) {
if ((esi) > 0xf) {
- printk
+ pr_warn
("vortex: srcdelWTD: error, lifeboat overflow\n");
return 0;
}
@@ -819,7 +819,7 @@ vortex_fifo_setadbctrl(vortex_t * vortex, int fifo, int stereo, int priority,
do {
temp = hwread(vortex->mmio, VORTEX_FIFO_ADBCTRL + (fifo << 2));
if (lifeboat++ > 0xbb8) {
- printk(KERN_ERR
+ pr_err(
"Vortex: vortex_fifo_setadbctrl fail\n");
break;
}
@@ -915,7 +915,7 @@ vortex_fifo_setwtctrl(vortex_t * vortex, int fifo, int ctrl, int priority,
do {
temp = hwread(vortex->mmio, VORTEX_FIFO_WTCTRL + (fifo << 2));
if (lifeboat++ > 0xbb8) {
- printk(KERN_ERR "Vortex: vortex_fifo_setwtctrl fail\n");
+ pr_err( "Vortex: vortex_fifo_setwtctrl fail\n");
break;
}
}
@@ -970,7 +970,7 @@ vortex_fifo_setwtctrl(vortex_t * vortex, int fifo, int ctrl, int priority,
do {
temp = hwread(vortex->mmio, VORTEX_FIFO_WTCTRL + (fifo << 2));
if (lifeboat++ > 0xbb8) {
- printk(KERN_ERR "Vortex: vortex_fifo_setwtctrl fail (hanging)\n");
+ pr_err( "Vortex: vortex_fifo_setwtctrl fail (hanging)\n");
break;
}
} while ((temp & FIFO_RDONLY)&&(temp & FIFO_VALID)&&(temp != 0xFFFFFFFF));
@@ -1042,7 +1042,7 @@ static void vortex_fifo_init(vortex_t * vortex)
for (x = NR_ADB - 1; x >= 0; x--) {
hwwrite(vortex->mmio, addr, (FIFO_U0 | FIFO_U1));
if (hwread(vortex->mmio, addr) != (FIFO_U0 | FIFO_U1))
- printk(KERN_ERR "bad adb fifo reset!");
+ pr_err( "bad adb fifo reset!");
vortex_fifo_clearadbdata(vortex, x, FIFO_SIZE);
addr -= 4;
}
@@ -1053,7 +1053,7 @@ static void vortex_fifo_init(vortex_t * vortex)
for (x = NR_WT - 1; x >= 0; x--) {
hwwrite(vortex->mmio, addr, FIFO_U0);
if (hwread(vortex->mmio, addr) != FIFO_U0)
- printk(KERN_ERR
+ pr_err(
"bad wt fifo reset (0x%08x, 0x%08x)!\n",
addr, hwread(vortex->mmio, addr));
vortex_fifo_clearwtdata(vortex, x, FIFO_SIZE);
@@ -1136,7 +1136,7 @@ vortex_adbdma_setbuffers(vortex_t * vortex, int adbdma,
break;
}
/*
- printk(KERN_DEBUG "vortex: cfg0 = 0x%x\nvortex: cfg1=0x%x\n",
+ pr_debug( "vortex: cfg0 = 0x%x\nvortex: cfg1=0x%x\n",
dma->cfg0, dma->cfg1);
*/
hwwrite(vortex->mmio, VORTEX_ADBDMA_BUFCFG0 + (adbdma << 3), dma->cfg0);
@@ -1213,7 +1213,7 @@ static int vortex_adbdma_bufshift(vortex_t * vortex, int adbdma)
if (dma->period_virt >= dma->nr_periods)
dma->period_virt -= dma->nr_periods;
if (delta != 1)
- printk(KERN_INFO "vortex: %d virt=%d, real=%d, delta=%d\n",
+ pr_info( "vortex: %d virt=%d, real=%d, delta=%d\n",
adbdma, dma->period_virt, dma->period_real, delta);
return delta;
@@ -1482,7 +1482,7 @@ static int vortex_wtdma_bufshift(vortex_t * vortex, int wtdma)
dma->period_real = page;
if (delta != 1)
- printk(KERN_WARNING "vortex: wt virt = %d, delta = %d\n",
+ pr_warn( "vortex: wt virt = %d, delta = %d\n",
dma->period_virt, delta);
return delta;
@@ -1667,7 +1667,7 @@ vortex_adb_addroutes(vortex_t * vortex, unsigned char channel,
hwread(vortex->mmio,
VORTEX_ADB_RTBASE + (temp << 2)) & ADB_MASK;
if ((lifeboat++) > ADB_MASK) {
- printk(KERN_ERR
+ pr_err(
"vortex_adb_addroutes: unending route! 0x%x\n",
*route);
return;
@@ -1703,7 +1703,7 @@ vortex_adb_delroutes(vortex_t * vortex, unsigned char channel,
hwread(vortex->mmio,
VORTEX_ADB_RTBASE + (prev << 2)) & ADB_MASK;
if (((lifeboat++) > ADB_MASK) || (temp == ADB_MASK)) {
- printk(KERN_ERR
+ pr_err(
"vortex_adb_delroutes: route not found! 0x%x\n",
route0);
return;
@@ -1967,7 +1967,7 @@ vortex_connect_codecplay(vortex_t * vortex, int en, unsigned char mixers[])
ADB_CODECOUT(0 + 4));
vortex_connection_mix_adb(vortex, en, 0x11, mixers[3],
ADB_CODECOUT(1 + 4));
- /* printk(KERN_DEBUG "SDAC detected "); */
+ /* pr_debug( "SDAC detected "); */
}
#else
// Use plain direct output to codec.
@@ -2022,7 +2022,7 @@ vortex_adb_checkinout(vortex_t * vortex, int resmap[], int out, int restype)
else
vortex->dma_adb[i].resources[restype] |= (1 << i);
/*
- printk(KERN_DEBUG
+ pr_debug(
"vortex: ResManager: type %d out %d\n",
restype, i);
*/
@@ -2037,7 +2037,7 @@ vortex_adb_checkinout(vortex_t * vortex, int resmap[], int out, int restype)
if (resmap[restype] & (1 << i)) {
resmap[restype] &= ~(1 << i);
/*
- printk(KERN_DEBUG
+ pr_debug(
"vortex: ResManager: type %d in %d\n",
restype, i);
*/
@@ -2045,7 +2045,7 @@ vortex_adb_checkinout(vortex_t * vortex, int resmap[], int out, int restype)
}
}
}
- printk(KERN_ERR "vortex: FATAL: ResManager: resource type %d exhausted.\n", restype);
+ pr_err( "vortex: FATAL: ResManager: resource type %d exhausted.\n", restype);
return -ENOMEM;
}
@@ -2173,7 +2173,7 @@ vortex_adb_allocroute(vortex_t *vortex, int dma, int nr_ch, int dir,
memset(stream->resources, 0,
sizeof(unsigned char) *
VORTEX_RESOURCE_LAST);
- printk(KERN_ERR "vortex: out of A3D sources. Sorry\n");
+ pr_err( "vortex: out of A3D sources. Sorry\n");
return -EBUSY;
}
/* (De)Initialize A3D hardware source. */
@@ -2421,7 +2421,7 @@ static irqreturn_t vortex_interrupt(int irq, void *dev_id)
hwread(vortex->mmio, VORTEX_IRQ_SOURCE);
// Is at least one IRQ flag set?
if (source == 0) {
- printk(KERN_ERR "vortex: missing irq source\n");
+ pr_err( "vortex: missing irq source\n");
return IRQ_NONE;
}
@@ -2429,19 +2429,19 @@ static irqreturn_t vortex_interrupt(int irq, void *dev_id)
// Attend every interrupt source.
if (unlikely(source & IRQ_ERR_MASK)) {
if (source & IRQ_FATAL) {
- printk(KERN_ERR "vortex: IRQ fatal error\n");
+ pr_err( "vortex: IRQ fatal error\n");
}
if (source & IRQ_PARITY) {
- printk(KERN_ERR "vortex: IRQ parity error\n");
+ pr_err( "vortex: IRQ parity error\n");
}
if (source & IRQ_REG) {
- printk(KERN_ERR "vortex: IRQ reg error\n");
+ pr_err( "vortex: IRQ reg error\n");
}
if (source & IRQ_FIFO) {
- printk(KERN_ERR "vortex: IRQ fifo error\n");
+ pr_err( "vortex: IRQ fifo error\n");
}
if (source & IRQ_DMA) {
- printk(KERN_ERR "vortex: IRQ dma error\n");
+ pr_err( "vortex: IRQ dma error\n");
}
handled = 1;
}
@@ -2489,7 +2489,7 @@ static irqreturn_t vortex_interrupt(int irq, void *dev_id)
}
if (!handled) {
- printk(KERN_ERR "vortex: unknown irq source %x\n", source);
+ pr_err( "vortex: unknown irq source %x\n", source);
}
return IRQ_RETVAL(handled);
}
@@ -2546,7 +2546,7 @@ vortex_codec_write(struct snd_ac97 * codec, unsigned short addr, unsigned short
while (!(hwread(card->mmio, VORTEX_CODEC_CTRL) & 0x100)) {
udelay(100);
if (lifeboat++ > POLL_COUNT) {
- printk(KERN_ERR "vortex: ac97 codec stuck busy\n");
+ pr_err( "vortex: ac97 codec stuck busy\n");
return;
}
}
@@ -2572,7 +2572,7 @@ static unsigned short vortex_codec_read(struct snd_ac97 * codec, unsigned short
while (!(hwread(card->mmio, VORTEX_CODEC_CTRL) & 0x100)) {
udelay(100);
if (lifeboat++ > POLL_COUNT) {
- printk(KERN_ERR "vortex: ac97 codec stuck busy\n");
+ pr_err( "vortex: ac97 codec stuck busy\n");
return 0xffff;
}
}
@@ -2586,7 +2586,7 @@ static unsigned short vortex_codec_read(struct snd_ac97 * codec, unsigned short
udelay(100);
data = hwread(card->mmio, VORTEX_CODEC_IO);
if (lifeboat++ > POLL_COUNT) {
- printk(KERN_ERR "vortex: ac97 address never arrived\n");
+ pr_err( "vortex: ac97 address never arrived\n");
return 0xffff;
}
} while ((data & VORTEX_CODEC_ADDMASK) !=
@@ -2683,7 +2683,7 @@ static void vortex_spdif_init(vortex_t * vortex, int spdif_sr, int spdif_mode)
static int vortex_core_init(vortex_t *vortex)
{
- printk(KERN_INFO "Vortex: init.... ");
+ pr_info( "Vortex: init.... ");
/* Hardware Init. */
hwwrite(vortex->mmio, VORTEX_CTRL, 0xffffffff);
msleep(5);
@@ -2728,7 +2728,7 @@ static int vortex_core_init(vortex_t *vortex)
//vortex_enable_timer_int(vortex);
//vortex_disable_timer_int(vortex);
- printk(KERN_INFO "done.\n");
+ pr_info( "done.\n");
spin_lock_init(&vortex->lock);
return 0;
@@ -2737,7 +2737,7 @@ static int vortex_core_init(vortex_t *vortex)
static int vortex_core_shutdown(vortex_t * vortex)
{
- printk(KERN_INFO "Vortex: shutdown...");
+ pr_info( "Vortex: shutdown...");
#ifndef CHIP_AU8820
vortex_eq_free(vortex);
vortex_Vort3D_disable(vortex);
@@ -2759,7 +2759,7 @@ static int vortex_core_shutdown(vortex_t * vortex)
msleep(5);
hwwrite(vortex->mmio, VORTEX_IRQ_SOURCE, 0xffff);
- printk(KERN_INFO "done.\n");
+ pr_info( "done.\n");
return 0;
}
@@ -2793,7 +2793,7 @@ static int vortex_alsafmt_aspfmt(int alsafmt)
break;
default:
fmt = 0x8;
- printk(KERN_ERR "vortex: format unsupported %d\n", alsafmt);
+ pr_err( "vortex: format unsupported %d\n", alsafmt);
break;
}
return fmt;
diff --git a/sound/pci/au88x0/au88x0_eq.c b/sound/pci/au88x0/au88x0_eq.c
index e722053..13ac919 100644
--- a/sound/pci/au88x0/au88x0_eq.c
+++ b/sound/pci/au88x0/au88x0_eq.c
@@ -845,7 +845,7 @@ snd_vortex_peaks_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *u
vortex_Eqlzr_GetAllPeaks(vortex, peaks, &count);
if (count != 20) {
- printk(KERN_ERR "vortex: peak count error 20 != %d \n", count);
+ pr_err( "vortex: peak count error 20 != %d \n", count);
return -1;
}
for (i = 0; i < 20; i++)
diff --git a/sound/pci/au88x0/au88x0_game.c b/sound/pci/au88x0/au88x0_game.c
index 280f86d..47485ec 100644
--- a/sound/pci/au88x0/au88x0_game.c
+++ b/sound/pci/au88x0/au88x0_game.c
@@ -98,7 +98,7 @@ static int vortex_gameport_register(vortex_t *vortex)
vortex->gameport = gp = gameport_allocate_port();
if (!gp) {
- printk(KERN_ERR "vortex: cannot allocate memory for gameport\n");
+ pr_err( "vortex: cannot allocate memory for gameport\n");
return -ENOMEM;
}
diff --git a/sound/pci/au88x0/au88x0_mpu401.c b/sound/pci/au88x0/au88x0_mpu401.c
index 29e5945..f929c20 100644
--- a/sound/pci/au88x0/au88x0_mpu401.c
+++ b/sound/pci/au88x0/au88x0_mpu401.c
@@ -73,7 +73,7 @@ static int snd_vortex_midi(vortex_t *vortex)
/* Check if anything is OK. */
temp = hwread(vortex->mmio, VORTEX_MIDI_DATA);
if (temp != MPU401_ACK /*0xfe */ ) {
- printk(KERN_ERR "midi port doesn't acknowledge!\n");
+ pr_err( "midi port doesn't acknowledge!\n");
return -ENODEV;
}
/* Enable MPU401 interrupts. */
diff --git a/sound/pci/au88x0/au88x0_pcm.c b/sound/pci/au88x0/au88x0_pcm.c
index 9fb03b4..d992e9b 100644
--- a/sound/pci/au88x0/au88x0_pcm.c
+++ b/sound/pci/au88x0/au88x0_pcm.c
@@ -227,11 +227,11 @@ snd_vortex_pcm_hw_params(struct snd_pcm_substream *substream,
err =
snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
if (err < 0) {
- printk(KERN_ERR "Vortex: pcm page alloc failed!\n");
+ pr_err( "Vortex: pcm page alloc failed!\n");
return err;
}
/*
- printk(KERN_INFO "Vortex: periods %d, period_bytes %d, channels = %d\n", params_periods(hw_params),
+ pr_info( "Vortex: periods %d, period_bytes %d, channels = %d\n", params_periods(hw_params),
params_period_bytes(hw_params), params_channels(hw_params));
*/
spin_lock_irq(&chip->lock);
@@ -371,7 +371,7 @@ static int snd_vortex_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
}
#ifndef CHIP_AU8810
else {
- printk(KERN_INFO "vortex: wt start %d\n", dma);
+ pr_info( "vortex: wt start %d\n", dma);
vortex_wtdma_startfifo(chip, dma);
}
#endif
@@ -384,7 +384,7 @@ static int snd_vortex_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
vortex_adbdma_stopfifo(chip, dma);
#ifndef CHIP_AU8810
else {
- printk(KERN_INFO "vortex: wt stop %d\n", dma);
+ pr_info( "vortex: wt stop %d\n", dma);
vortex_wtdma_stopfifo(chip, dma);
}
#endif
diff --git a/sound/pci/au88x0/au88x0_synth.c b/sound/pci/au88x0/au88x0_synth.c
index 922a84b..1bf060c 100644
--- a/sound/pci/au88x0/au88x0_synth.c
+++ b/sound/pci/au88x0/au88x0_synth.c
@@ -90,7 +90,7 @@ static int vortex_wt_allocroute(vortex_t * vortex, int wt, int nr_ch)
hwwrite(vortex->mmio, WT_PARM(wt, 2), 0);
temp = hwread(vortex->mmio, WT_PARM(wt, 3));
- printk(KERN_DEBUG "vortex: WT PARM3: %x\n", temp);
+ pr_debug( "vortex: WT PARM3: %x\n", temp);
//hwwrite(vortex->mmio, WT_PARM(wt, 3), temp);
hwwrite(vortex->mmio, WT_DELAY(wt, 0), 0);
@@ -98,7 +98,7 @@ static int vortex_wt_allocroute(vortex_t * vortex, int wt, int nr_ch)
hwwrite(vortex->mmio, WT_DELAY(wt, 2), 0);
hwwrite(vortex->mmio, WT_DELAY(wt, 3), 0);
- printk(KERN_DEBUG "vortex: WT GMODE: %x\n", hwread(vortex->mmio, WT_GMODE(wt)));
+ pr_debug( "vortex: WT GMODE: %x\n", hwread(vortex->mmio, WT_GMODE(wt)));
hwwrite(vortex->mmio, WT_PARM(wt, 2), 0xffffffff);
hwwrite(vortex->mmio, WT_PARM(wt, 3), 0xcff1c810);
@@ -106,7 +106,7 @@ static int vortex_wt_allocroute(vortex_t * vortex, int wt, int nr_ch)
voice->parm0 = voice->parm1 = 0xcfb23e2f;
hwwrite(vortex->mmio, WT_PARM(wt, 0), voice->parm0);
hwwrite(vortex->mmio, WT_PARM(wt, 1), voice->parm1);
- printk(KERN_DEBUG "vortex: WT GMODE 2 : %x\n", hwread(vortex->mmio, WT_GMODE(wt)));
+ pr_debug( "vortex: WT GMODE 2 : %x\n", hwread(vortex->mmio, WT_GMODE(wt)));
return 0;
}
@@ -196,14 +196,14 @@ vortex_wt_SetReg(vortex_t * vortex, unsigned char reg, int wt,
if ((reg == 5) || ((reg >= 7) && (reg <= 10)) || (reg == 0xc)) {
if (wt >= (NR_WT / NR_WT_PB)) {
- printk
+ pr_warn
("vortex: WT SetReg: bank out of range. reg=0x%x, wt=%d\n",
reg, wt);
return 0;
}
} else {
if (wt >= NR_WT) {
- printk(KERN_ERR "vortex: WT SetReg: voice out of range\n");
+ pr_err( "vortex: WT SetReg: voice out of range\n");
return 0;
}
}
@@ -214,42 +214,42 @@ vortex_wt_SetReg(vortex_t * vortex, unsigned char reg, int wt,
/* Voice specific parameters */
case 0: /* running */
/*
- printk(KERN_DEBUG "vortex: WT SetReg(0x%x) = 0x%08x\n",
+ pr_debug( "vortex: WT SetReg(0x%x) = 0x%08x\n",
WT_RUN(wt), (int)val);
*/
hwwrite(vortex->mmio, WT_RUN(wt), val);
return 0xc;
case 1: /* param 0 */
/*
- printk(KERN_DEBUG "vortex: WT SetReg(0x%x) = 0x%08x\n",
+ pr_debug( "vortex: WT SetReg(0x%x) = 0x%08x\n",
WT_PARM(wt,0), (int)val);
*/
hwwrite(vortex->mmio, WT_PARM(wt, 0), val);
return 0xc;
case 2: /* param 1 */
/*
- printk(KERN_DEBUG "vortex: WT SetReg(0x%x) = 0x%08x\n",
+ pr_debug( "vortex: WT SetReg(0x%x) = 0x%08x\n",
WT_PARM(wt,1), (int)val);
*/
hwwrite(vortex->mmio, WT_PARM(wt, 1), val);
return 0xc;
case 3: /* param 2 */
/*
- printk(KERN_DEBUG "vortex: WT SetReg(0x%x) = 0x%08x\n",
+ pr_debug( "vortex: WT SetReg(0x%x) = 0x%08x\n",
WT_PARM(wt,2), (int)val);
*/
hwwrite(vortex->mmio, WT_PARM(wt, 2), val);
return 0xc;
case 4: /* param 3 */
/*
- printk(KERN_DEBUG "vortex: WT SetReg(0x%x) = 0x%08x\n",
+ pr_debug( "vortex: WT SetReg(0x%x) = 0x%08x\n",
WT_PARM(wt,3), (int)val);
*/
hwwrite(vortex->mmio, WT_PARM(wt, 3), val);
return 0xc;
case 6: /* mute */
/*
- printk(KERN_DEBUG "vortex: WT SetReg(0x%x) = 0x%08x\n",
+ pr_debug( "vortex: WT SetReg(0x%x) = 0x%08x\n",
WT_MUTE(wt), (int)val);
*/
hwwrite(vortex->mmio, WT_MUTE(wt), val);
@@ -257,7 +257,7 @@ vortex_wt_SetReg(vortex_t * vortex, unsigned char reg, int wt,
case 0xb:
/* delay */
/*
- printk(KERN_DEBUG "vortex: WT SetReg(0x%x) = 0x%08x\n",
+ pr_debug( "vortex: WT SetReg(0x%x) = 0x%08x\n",
WT_DELAY(wt,0), (int)val);
*/
hwwrite(vortex->mmio, WT_DELAY(wt, 3), val);
@@ -285,7 +285,7 @@ vortex_wt_SetReg(vortex_t * vortex, unsigned char reg, int wt,
return 0;
}
/*
- printk(KERN_DEBUG "vortex: WT SetReg(0x%x) = 0x%08x\n", ecx, (int)val);
+ pr_debug( "vortex: WT SetReg(0x%x) = 0x%08x\n", ecx, (int)val);
*/
hwwrite(vortex->mmio, ecx, val);
return 1;
--
1.8.1.2
2
1

08 Sep '14
Add quirks for XMOS based DACs for native DSD playback support using the new
DSD_U32_LE sample format.
This version adds native DSD support for:
- iFi Audio micro iDSD/nano iDSD (they use the same prod. id)
- DIYINHK USB to I2S/DSD converter
Changes from v2:
- fix and simplify switch statement
Changes from v1:
- use specific product id and alt setting per XMOS based device
Signed-off-by: Jurgen Kramer <gtmkramer(a)xs4all.nl>
---
sound/usb/quirks.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/sound/usb/quirks.c b/sound/usb/quirks.c
index 19a921e..bd5a95e 100644
--- a/sound/usb/quirks.c
+++ b/sound/usb/quirks.c
@@ -1174,5 +1174,21 @@ u64 snd_usb_interface_dsd_format_quirks(struct snd_usb_audio *chip,
}
}
+ /* XMOS based USB DACs */
+ switch(chip->usb_id) {
+ /* iFi Audio micro/nano iDSD */
+ case USB_ID(0x20b1, 0x3008):
+ if (fp->altsetting == 2)
+ return SNDRV_PCM_FMTBIT_DSD_U32_LE;
+ break;
+ /* DIYINHK DSD DXD 384kHz USB to I2S/DSD */
+ case USB_ID(0x20b1, 0x2009):
+ if (fp->altsetting == 3)
+ return SNDRV_PCM_FMTBIT_DSD_U32_LE;
+ break;
+ default:
+ break;
+ }
+
return 0;
}
--
1.9.3
2
2
sound/core/pcm_lib.c | 10 ++++++----
sound/pci/oxygen/xonar_pcm179x.c | 33 +++++++++++++++++++++++----------
sound/usb/midi.c | 11 +++++++++++
3 files changed, 40 insertions(+), 14 deletions(-)
2
6
Hello,
A recent change in alsa-plugins 1.0.28 alsa-jack has changed the poll semantics.
This breaks audacious and mpv, perhaps more applications.
The regression is caused by:
Commit: 9217377337cdceb62abeb5969112b738bb5cd551
jack: fix polling and recovering
This might or might not be related to lack of
snd_pcm_poll_descriptor_revents call or the use of a timer instead of
repolling.
Another major problem is the lack of handling of DRAINING state. This
breaks short sample playback with aplay and possibly other
applications. That also was present in older alsa-jack and is not a
regression.
--
Radosław Szkodziński
2
1

08 Sep '14
In preparation to change the public API to return a per-user clk structure,
remove any usage of this public API from the clock implementations.
The reason for having this in a separate commit from the one that introduces
the implementation of the new functions is to separate the changes generated
with Coccinelle from the rest, and keep the patches' size reasonable.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso(a)collabora.com>
Tested-by: Boris Brezillon <boris.brezillon(a)free-electrons.com>
Tested-by: Heiko Stuebner <heiko(a)sntech.de>
Acked-by: Boris Brezillon <boris.brezillon(a)free-electrons.com>
---
v9: * Fold in changes to mxs-saif.c, so to not break bisectability
* Re-generate the patch on top of the latest changes
* Remove linux/clk.h includes from clk implementations
---
arch/arm/mach-dove/common.c | 10 +-
arch/arm/mach-imx/clk-busy.c | 9 +-
arch/arm/mach-imx/clk-fixup-div.c | 4 +-
arch/arm/mach-imx/clk-fixup-mux.c | 4 +-
arch/arm/mach-imx/clk-gate2.c | 4 +-
arch/arm/mach-imx/clk-imx1.c | 3 +-
arch/arm/mach-imx/clk-imx21.c | 3 +-
arch/arm/mach-imx/clk-imx25.c | 9 +-
arch/arm/mach-imx/clk-imx27.c | 5 +-
arch/arm/mach-imx/clk-imx31.c | 11 +-
arch/arm/mach-imx/clk-imx35.c | 23 +-
arch/arm/mach-imx/clk-imx51-imx53.c | 78 +++---
arch/arm/mach-imx/clk-imx6q.c | 54 ++--
arch/arm/mach-imx/clk-imx6sl.c | 14 +-
arch/arm/mach-imx/clk-imx6sx.c | 98 ++++---
arch/arm/mach-imx/clk-pfd.c | 5 +-
arch/arm/mach-imx/clk-pllv1.c | 5 +-
arch/arm/mach-imx/clk-pllv2.c | 5 +-
arch/arm/mach-imx/clk-pllv3.c | 5 +-
arch/arm/mach-imx/clk-vf610.c | 43 +--
arch/arm/mach-imx/clk.c | 11 +-
arch/arm/mach-imx/clk.h | 42 +--
arch/arm/mach-msm/clock-pcom.c | 2 +-
arch/arm/mach-mv78xx0/common.c | 2 +-
arch/arm/mach-omap2/board-cm-t35.c | 2 +-
arch/arm/mach-omap2/cclock3xxx_data.c | 371 +++++++++++++-------------
arch/arm/mach-omap2/clkt2xxx_dpll.c | 5 +-
arch/arm/mach-omap2/clkt2xxx_dpllcore.c | 5 +-
arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c | 11 +-
arch/arm/mach-omap2/clkt34xx_dpll3m2.c | 3 +-
arch/arm/mach-omap2/clkt_clksel.c | 46 ++--
arch/arm/mach-omap2/clkt_dpll.c | 8 +-
arch/arm/mach-omap2/clock.c | 52 ++--
arch/arm/mach-omap2/clock.h | 18 +-
arch/arm/mach-omap2/clock3xxx.c | 23 +-
arch/arm/mach-omap2/clock3xxx.h | 4 +-
arch/arm/mach-omap2/clock_common_data.c | 2 +-
arch/arm/mach-omap2/clockdomain.c | 9 +-
arch/arm/mach-omap2/clockdomain.h | 4 +-
arch/arm/mach-omap2/display.c | 5 +-
arch/arm/mach-omap2/dpll3xxx.c | 29 +-
arch/arm/mach-omap2/dpll44xx.c | 5 +-
arch/arm/mach-omap2/mcbsp.c | 5 +-
arch/arm/mach-omap2/omap_device.c | 9 +-
arch/arm/mach-omap2/omap_hwmod.c | 42 +--
arch/arm/mach-omap2/omap_hwmod.h | 12 +-
arch/arm/mach-omap2/pm24xx.c | 12 +-
arch/arm/mach-orion5x/common.c | 2 +-
arch/arm/mach-shmobile/clock.c | 9 +-
arch/arm/mach-vexpress/spc.c | 4 +-
arch/arm/plat-orion/common.c | 21 +-
arch/arm/plat-orion/include/plat/common.h | 12 +-
arch/powerpc/platforms/512x/clock-commonclk.c | 48 ++--
drivers/clk/at91/clk-main.c | 24 +-
drivers/clk/at91/clk-master.c | 6 +-
drivers/clk/at91/clk-peripheral.c | 12 +-
drivers/clk/at91/clk-pll.c | 6 +-
drivers/clk/at91/clk-plldiv.c | 6 +-
drivers/clk/at91/clk-programmable.c | 10 +-
drivers/clk/at91/clk-slow.c | 24 +-
drivers/clk/at91/clk-smd.c | 6 +-
drivers/clk/at91/clk-system.c | 6 +-
drivers/clk/at91/clk-usb.c | 20 +-
drivers/clk/at91/clk-utmi.c | 6 +-
drivers/clk/bcm/clk-kona-setup.c | 6 +-
drivers/clk/bcm/clk-kona.c | 12 +-
drivers/clk/bcm/clk-kona.h | 2 +-
drivers/clk/berlin/berlin2-avpll.c | 4 +-
drivers/clk/berlin/berlin2-avpll.h | 4 +-
drivers/clk/berlin/berlin2-div.c | 2 +-
drivers/clk/berlin/berlin2-div.h | 2 +-
drivers/clk/berlin/berlin2-pll.c | 2 +-
drivers/clk/berlin/berlin2-pll.h | 2 +-
drivers/clk/berlin/bg2.c | 13 +-
drivers/clk/berlin/bg2q.c | 9 +-
drivers/clk/clk-axi-clkgen.c | 3 +-
drivers/clk/clk-axm5516.c | 4 +-
drivers/clk/clk-bcm2835.c | 2 +-
drivers/clk/clk-composite.c | 11 +-
drivers/clk/clk-conf.c | 17 +-
drivers/clk/clk-divider.c | 8 +-
drivers/clk/clk-efm32gg.c | 3 +-
drivers/clk/clk-fixed-factor.c | 6 +-
drivers/clk/clk-fixed-rate.c | 8 +-
drivers/clk/clk-fractional-divider.c | 4 +-
drivers/clk/clk-gate.c | 4 +-
drivers/clk/clk-highbank.c | 8 +-
drivers/clk/clk-ls1x.c | 16 +-
drivers/clk/clk-max77686.c | 10 +-
drivers/clk/clk-moxart.c | 8 +-
drivers/clk/clk-mux.c | 7 +-
drivers/clk/clk-nomadik.c | 15 +-
drivers/clk/clk-nspire.c | 4 +-
drivers/clk/clk-palmas.c | 7 +-
drivers/clk/clk-ppc-corenet.c | 8 +-
drivers/clk/clk-s2mps11.c | 6 +-
drivers/clk/clk-si5351.c | 17 +-
drivers/clk/clk-si570.c | 4 +-
drivers/clk/clk-twl6040.c | 3 +-
drivers/clk/clk-u300.c | 13 +-
drivers/clk/clk-vt8500.c | 4 +-
drivers/clk/clk-wm831x.c | 7 +-
drivers/clk/clk-xgene.c | 12 +-
drivers/clk/clk.h | 4 +-
drivers/clk/hisilicon/clk-hi3620.c | 9 +-
drivers/clk/hisilicon/clk-hip04.c | 1 -
drivers/clk/hisilicon/clk.c | 17 +-
drivers/clk/hisilicon/clk.h | 2 +-
drivers/clk/hisilicon/clkgate-separated.c | 5 +-
drivers/clk/keystone/gate.c | 7 +-
drivers/clk/keystone/pll.c | 11 +-
drivers/clk/mmp/clk-apbc.c | 5 +-
drivers/clk/mmp/clk-apmu.c | 5 +-
drivers/clk/mmp/clk-frac.c | 4 +-
drivers/clk/mmp/clk-mmp2.c | 14 +-
drivers/clk/mmp/clk-pxa168.c | 12 +-
drivers/clk/mmp/clk-pxa910.c | 12 +-
drivers/clk/mmp/clk.h | 8 +-
drivers/clk/mvebu/clk-corediv.c | 4 +-
drivers/clk/mvebu/clk-cpu.c | 8 +-
drivers/clk/mvebu/common.c | 15 +-
drivers/clk/mvebu/kirkwood.c | 6 +-
drivers/clk/mxs/clk-div.c | 5 +-
drivers/clk/mxs/clk-frac.c | 5 +-
drivers/clk/mxs/clk-imx23.c | 5 +-
drivers/clk/mxs/clk-imx28.c | 5 +-
drivers/clk/mxs/clk-pll.c | 5 +-
drivers/clk/mxs/clk-ref.c | 5 +-
drivers/clk/mxs/clk.h | 17 +-
drivers/clk/qcom/clk-rcg.c | 8 +-
drivers/clk/qcom/clk-rcg2.c | 14 +-
drivers/clk/qcom/clk-regmap.c | 2 +-
drivers/clk/qcom/clk-regmap.h | 2 +-
drivers/clk/qcom/common.c | 6 +-
drivers/clk/qcom/gcc-apq8084.c | 2 +-
drivers/clk/qcom/gcc-ipq806x.c | 2 +-
drivers/clk/qcom/gcc-msm8660.c | 2 +-
drivers/clk/qcom/gcc-msm8960.c | 2 +-
drivers/clk/qcom/gcc-msm8974.c | 2 +-
drivers/clk/qcom/mmcc-msm8960.c | 6 +-
drivers/clk/rockchip/clk-pll.c | 9 +-
drivers/clk/rockchip/clk-rk3188.c | 2 +-
drivers/clk/rockchip/clk-rk3288.c | 2 +-
drivers/clk/rockchip/clk-rockchip.c | 2 +-
drivers/clk/rockchip/clk.c | 23 +-
drivers/clk/rockchip/clk.h | 5 +-
drivers/clk/samsung/clk-exynos-audss.c | 16 +-
drivers/clk/samsung/clk-exynos-clkout.c | 9 +-
drivers/clk/samsung/clk-exynos3250.c | 1 -
drivers/clk/samsung/clk-exynos4.c | 7 +-
drivers/clk/samsung/clk-exynos5250.c | 1 -
drivers/clk/samsung/clk-exynos5260.c | 1 -
drivers/clk/samsung/clk-exynos5410.c | 1 -
drivers/clk/samsung/clk-exynos5420.c | 1 -
drivers/clk/samsung/clk-exynos5440.c | 1 -
drivers/clk/samsung/clk-pll.c | 6 +-
drivers/clk/samsung/clk-pll.h | 2 +-
drivers/clk/samsung/clk-s3c2410-dclk.c | 30 +--
drivers/clk/samsung/clk-s3c2410.c | 1 -
drivers/clk/samsung/clk-s3c2412.c | 1 -
drivers/clk/samsung/clk-s3c2443.c | 1 -
drivers/clk/samsung/clk-s3c64xx.c | 1 -
drivers/clk/samsung/clk-s5pv210-audss.c | 16 +-
drivers/clk/samsung/clk.c | 22 +-
drivers/clk/samsung/clk.h | 3 +-
drivers/clk/shmobile/clk-div6.c | 2 +-
drivers/clk/shmobile/clk-emev2.c | 4 +-
drivers/clk/shmobile/clk-mstp.c | 6 +-
drivers/clk/shmobile/clk-r8a7740.c | 6 +-
drivers/clk/shmobile/clk-r8a7779.c | 6 +-
drivers/clk/shmobile/clk-rcar-gen2.c | 10 +-
drivers/clk/shmobile/clk-rz.c | 6 +-
drivers/clk/sirf/clk-atlas6.c | 3 +-
drivers/clk/sirf/clk-common.c | 30 +--
drivers/clk/sirf/clk-prima2.c | 3 +-
drivers/clk/socfpga/clk-gate.c | 3 +-
drivers/clk/socfpga/clk-periph.c | 3 +-
drivers/clk/socfpga/clk-pll.c | 5 +-
drivers/clk/spear/clk-aux-synth.c | 8 +-
drivers/clk/spear/clk-frac-synth.c | 4 +-
drivers/clk/spear/clk-gpt-synth.c | 4 +-
drivers/clk/spear/clk-vco-pll.c | 8 +-
drivers/clk/spear/clk.h | 14 +-
drivers/clk/spear/spear1310_clock.c | 3 +-
drivers/clk/spear/spear1340_clock.c | 3 +-
drivers/clk/spear/spear3xx_clock.c | 17 +-
drivers/clk/spear/spear6xx_clock.c | 3 +-
drivers/clk/st/clk-flexgen.c | 12 +-
drivers/clk/st/clkgen-fsyn.c | 22 +-
drivers/clk/st/clkgen-mux.c | 32 +--
drivers/clk/st/clkgen-pll.c | 34 +--
drivers/clk/sunxi/clk-a10-hosc.c | 2 +-
drivers/clk/sunxi/clk-a20-gmac.c | 2 +-
drivers/clk/sunxi/clk-factors.c | 4 +-
drivers/clk/sunxi/clk-sun6i-apb0-gates.c | 2 +-
drivers/clk/sunxi/clk-sun6i-apb0.c | 2 +-
drivers/clk/sunxi/clk-sun6i-ar100.c | 6 +-
drivers/clk/sunxi/clk-sun8i-apb0.c | 2 +-
drivers/clk/sunxi/clk-sunxi.c | 18 +-
drivers/clk/tegra/clk-audio-sync.c | 4 +-
drivers/clk/tegra/clk-divider.c | 5 +-
drivers/clk/tegra/clk-periph-gate.c | 5 +-
drivers/clk/tegra/clk-periph.c | 9 +-
drivers/clk/tegra/clk-pll-out.c | 5 +-
drivers/clk/tegra/clk-pll.c | 41 ++-
drivers/clk/tegra/clk-super.c | 5 +-
drivers/clk/tegra/clk-tegra-audio.c | 5 +-
drivers/clk/tegra/clk-tegra-fixed.c | 9 +-
drivers/clk/tegra/clk-tegra-periph.c | 13 +-
drivers/clk/tegra/clk-tegra-pmc.c | 5 +-
drivers/clk/tegra/clk-tegra-super-gen4.c | 9 +-
drivers/clk/tegra/clk-tegra114.c | 11 +-
drivers/clk/tegra/clk-tegra124.c | 7 +-
drivers/clk/tegra/clk-tegra20.c | 13 +-
drivers/clk/tegra/clk-tegra30.c | 9 +-
drivers/clk/tegra/clk.c | 25 +-
drivers/clk/tegra/clk.h | 38 +--
drivers/clk/ti/apll.c | 8 +-
drivers/clk/ti/clk-2xxx.c | 8 +-
drivers/clk/ti/clk-33xx.c | 18 +-
drivers/clk/ti/clk-3xxx.c | 8 +-
drivers/clk/ti/clk-43xx.c | 8 +-
drivers/clk/ti/clk-44xx.c | 16 +-
drivers/clk/ti/clk-54xx.c | 25 +-
drivers/clk/ti/clk-7xx.c | 28 +-
drivers/clk/ti/clk-dra7-atl.c | 6 +-
drivers/clk/ti/clk.c | 2 +-
drivers/clk/ti/clockdomain.c | 4 +-
drivers/clk/ti/composite.c | 2 +-
drivers/clk/ti/divider.c | 6 +-
drivers/clk/ti/dpll.c | 8 +-
drivers/clk/ti/fixed-factor.c | 2 +-
drivers/clk/ti/gate.c | 2 +-
drivers/clk/ti/interface.c | 2 +-
drivers/clk/ti/mux.c | 6 +-
drivers/clk/ux500/abx500-clk.c | 3 +-
drivers/clk/ux500/clk-prcc.c | 8 +-
drivers/clk/ux500/clk-prcmu.c | 16 +-
drivers/clk/ux500/clk-sysctrl.c | 10 +-
drivers/clk/ux500/clk.h | 23 +-
drivers/clk/ux500/u8500_clk.c | 3 +-
drivers/clk/ux500/u8500_of_clk.c | 13 +-
drivers/clk/ux500/u8540_clk.c | 3 +-
drivers/clk/ux500/u9540_clk.c | 1 -
drivers/clk/versatile/clk-icst.c | 5 +-
drivers/clk/versatile/clk-icst.h | 2 +-
drivers/clk/versatile/clk-impd1.c | 19 +-
drivers/clk/versatile/clk-realview.c | 3 +-
drivers/clk/versatile/clk-sp810.c | 30 ++-
drivers/clk/versatile/clk-versatile.c | 3 +-
drivers/clk/versatile/clk-vexpress-osc.c | 2 +-
drivers/clk/versatile/clk-vexpress.c | 6 +-
drivers/clk/x86/clk-lpt.c | 3 +-
drivers/clk/zynq/clkc.c | 22 +-
drivers/clk/zynq/pll.c | 4 +-
drivers/gpu/drm/msm/hdmi/hdmi_phy_8960.c | 3 +-
drivers/media/platform/exynos4-is/media-dev.c | 17 +-
drivers/media/platform/exynos4-is/media-dev.h | 7 +-
drivers/media/platform/omap3isp/isp.h | 2 +-
drivers/rtc/rtc-hym8563.c | 4 +-
drivers/staging/imx-drm/imx-tve.c | 27 +-
include/asm-generic/clkdev.h | 6 +-
include/linux/clk/ti.h | 10 +-
include/linux/clk/zynq.h | 2 +-
include/linux/platform_data/si5351.h | 4 +-
sound/soc/mxs/mxs-saif.c | 4 +-
266 files changed, 1453 insertions(+), 1516 deletions(-)
diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c
index 0d1a892..4d95685 100644
--- a/arch/arm/mach-dove/common.c
+++ b/arch/arm/mach-dove/common.c
@@ -71,9 +71,9 @@ void __init dove_map_io(void)
static int dove_tclk;
static DEFINE_SPINLOCK(gating_lock);
-static struct clk *tclk;
+static struct clk_core *tclk;
-static struct clk __init *dove_register_gate(const char *name,
+static struct clk_core __init *dove_register_gate(const char *name,
const char *parent, u8 bit_idx)
{
return clk_register_gate(NULL, name, parent, 0,
@@ -83,9 +83,9 @@ static struct clk __init *dove_register_gate(const char *name,
static void __init dove_clk_init(void)
{
- struct clk *usb0, *usb1, *sata, *pex0, *pex1, *sdio0, *sdio1;
- struct clk *nand, *camera, *i2s0, *i2s1, *crypto, *ac97, *pdma;
- struct clk *xor0, *xor1, *ge, *gephy;
+ struct clk_core *usb0, *usb1, *sata, *pex0, *pex1, *sdio0, *sdio1;
+ struct clk_core *nand, *camera, *i2s0, *i2s1, *crypto, *ac97, *pdma;
+ struct clk_core *xor0, *xor1, *ge, *gephy;
tclk = clk_register_fixed_rate(NULL, "tclk", NULL, CLK_IS_ROOT,
dove_tclk);
diff --git a/arch/arm/mach-imx/clk-busy.c b/arch/arm/mach-imx/clk-busy.c
index 4bb1bc4..bb3edc5 100644
--- a/arch/arm/mach-imx/clk-busy.c
+++ b/arch/arm/mach-imx/clk-busy.c
@@ -10,7 +10,6 @@
* http://www.gnu.org/copyleft/gpl.html
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/io.h>
#include <linux/slab.h>
@@ -78,12 +77,12 @@ static struct clk_ops clk_busy_divider_ops = {
.set_rate = clk_busy_divider_set_rate,
};
-struct clk *imx_clk_busy_divider(const char *name, const char *parent_name,
+struct clk_core *imx_clk_busy_divider(const char *name, const char *parent_name,
void __iomem *reg, u8 shift, u8 width,
void __iomem *busy_reg, u8 busy_shift)
{
struct clk_busy_divider *busy;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
busy = kzalloc(sizeof(*busy), GFP_KERNEL);
@@ -152,12 +151,12 @@ static struct clk_ops clk_busy_mux_ops = {
.set_parent = clk_busy_mux_set_parent,
};
-struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift,
+struct clk_core *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift,
u8 width, void __iomem *busy_reg, u8 busy_shift,
const char **parent_names, int num_parents)
{
struct clk_busy_mux *busy;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
busy = kzalloc(sizeof(*busy), GFP_KERNEL);
diff --git a/arch/arm/mach-imx/clk-fixup-div.c b/arch/arm/mach-imx/clk-fixup-div.c
index 21db020..8a62bfd 100644
--- a/arch/arm/mach-imx/clk-fixup-div.c
+++ b/arch/arm/mach-imx/clk-fixup-div.c
@@ -92,12 +92,12 @@ static const struct clk_ops clk_fixup_div_ops = {
.set_rate = clk_fixup_div_set_rate,
};
-struct clk *imx_clk_fixup_divider(const char *name, const char *parent,
+struct clk_core *imx_clk_fixup_divider(const char *name, const char *parent,
void __iomem *reg, u8 shift, u8 width,
void (*fixup)(u32 *val))
{
struct clk_fixup_div *fixup_div;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
if (!fixup)
diff --git a/arch/arm/mach-imx/clk-fixup-mux.c b/arch/arm/mach-imx/clk-fixup-mux.c
index 0d40b35..e29dc62 100644
--- a/arch/arm/mach-imx/clk-fixup-mux.c
+++ b/arch/arm/mach-imx/clk-fixup-mux.c
@@ -71,12 +71,12 @@ static const struct clk_ops clk_fixup_mux_ops = {
.set_parent = clk_fixup_mux_set_parent,
};
-struct clk *imx_clk_fixup_mux(const char *name, void __iomem *reg,
+struct clk_core *imx_clk_fixup_mux(const char *name, void __iomem *reg,
u8 shift, u8 width, const char **parents,
int num_parents, void (*fixup)(u32 *val))
{
struct clk_fixup_mux *fixup_mux;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
if (!fixup)
diff --git a/arch/arm/mach-imx/clk-gate2.c b/arch/arm/mach-imx/clk-gate2.c
index 84acdfd..d78f409 100644
--- a/arch/arm/mach-imx/clk-gate2.c
+++ b/arch/arm/mach-imx/clk-gate2.c
@@ -108,14 +108,14 @@ static struct clk_ops clk_gate2_ops = {
.is_enabled = clk_gate2_is_enabled,
};
-struct clk *clk_register_gate2(struct device *dev, const char *name,
+struct clk_core *clk_register_gate2(struct device *dev, const char *name,
const char *parent_name, unsigned long flags,
void __iomem *reg, u8 bit_idx,
u8 clk_gate2_flags, spinlock_t *lock,
unsigned int *share_count)
{
struct clk_gate2 *gate;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
gate = kzalloc(sizeof(struct clk_gate2), GFP_KERNEL);
diff --git a/arch/arm/mach-imx/clk-imx1.c b/arch/arm/mach-imx/clk-imx1.c
index 37c307a..8459bd7 100644
--- a/arch/arm/mach-imx/clk-imx1.c
+++ b/arch/arm/mach-imx/clk-imx1.c
@@ -15,7 +15,6 @@
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/err.h>
@@ -32,7 +31,7 @@ static const char *prem_sel_clks[] = { "clk32_premult", "clk16m", };
static const char *clko_sel_clks[] = { "per1", "hclk", "clk48m", "clk16m",
"prem", "fclk", };
-static struct clk *clk[IMX1_CLK_MAX];
+static struct clk_core *clk[IMX1_CLK_MAX];
static struct clk_onecell_data clk_data;
static void __iomem *ccm __initdata;
diff --git a/arch/arm/mach-imx/clk-imx21.c b/arch/arm/mach-imx/clk-imx21.c
index 4b4c753..56d799c 100644
--- a/arch/arm/mach-imx/clk-imx21.c
+++ b/arch/arm/mach-imx/clk-imx21.c
@@ -9,7 +9,6 @@
* of the License, or (at your option) any later version.
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/of.h>
@@ -36,7 +35,7 @@ static const char *mpll_sel_clks[] = { "fpm_gate", "mpll_osc_sel", };
static const char *spll_sel_clks[] = { "fpm_gate", "mpll_osc_sel", };
static const char *ssi_sel_clks[] = { "spll_gate", "mpll_gate", };
-static struct clk *clk[IMX21_CLK_MAX];
+static struct clk_core *clk[IMX21_CLK_MAX];
static struct clk_onecell_data clk_data;
static void __init _mx21_clocks_init(unsigned long lref, unsigned long href)
diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c
index 59c0c85..06d2c72 100644
--- a/arch/arm/mach-imx/clk-imx25.c
+++ b/arch/arm/mach-imx/clk-imx25.c
@@ -19,7 +19,6 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/list.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include <linux/clkdev.h>
#include <linux/err.h>
@@ -87,7 +86,7 @@ enum mx25_clks {
wdt_ipg, cko_div, cko_sel, cko, clk_max
};
-static struct clk *clk[clk_max];
+static struct clk_core *clk[clk_max];
static int __init __mx25_clocks_init(unsigned long osc_rate,
void __iomem *ccm_base)
@@ -225,16 +224,16 @@ static int __init __mx25_clocks_init(unsigned long osc_rate,
imx_check_clocks(clk, ARRAY_SIZE(clk));
- clk_prepare_enable(clk[emi_ahb]);
+ clk_provider_prepare_enable(clk[emi_ahb]);
/* Clock source for gpt must be derived from AHB */
- clk_set_parent(clk[per5_sel], clk[ahb]);
+ clk_provider_set_parent(clk[per5_sel], clk[ahb]);
/*
* Let's initially set up CLKO parent as ipg, since this configuration
* is used on some imx25 board designs to clock the audio codec.
*/
- clk_set_parent(clk[cko_sel], clk[ipg]);
+ clk_provider_set_parent(clk[cko_sel], clk[ipg]);
return 0;
}
diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c
index ab6349e..7b0f01c 100644
--- a/arch/arm/mach-imx/clk-imx27.c
+++ b/arch/arm/mach-imx/clk-imx27.c
@@ -1,4 +1,3 @@
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/err.h>
@@ -39,7 +38,7 @@ static const char *clko_sel_clks[] = {
static const char *ssi_sel_clks[] = { "spll_gate", "mpll", };
-static struct clk *clk[IMX27_CLK_MAX];
+static struct clk_core *clk[IMX27_CLK_MAX];
static struct clk_onecell_data clk_data;
static void __init _mx27_clocks_init(unsigned long fref)
@@ -156,7 +155,7 @@ static void __init _mx27_clocks_init(unsigned long fref)
clk_register_clkdev(clk[IMX27_CLK_CPU_DIV], NULL, "cpu0");
- clk_prepare_enable(clk[IMX27_CLK_EMI_AHB_GATE]);
+ clk_provider_prepare_enable(clk[IMX27_CLK_EMI_AHB_GATE]);
imx_print_silicon_rev("i.MX27", mx27_revision());
}
diff --git a/arch/arm/mach-imx/clk-imx31.c b/arch/arm/mach-imx/clk-imx31.c
index 286ef42..c95fc5c 100644
--- a/arch/arm/mach-imx/clk-imx31.c
+++ b/arch/arm/mach-imx/clk-imx31.c
@@ -16,7 +16,6 @@
*/
#include <linux/module.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/io.h>
#include <linux/err.h>
@@ -45,7 +44,7 @@ enum mx31_clks {
gacc_gate, emi_gate, rtic_gate, firi_gate, clk_max
};
-static struct clk *clk[clk_max];
+static struct clk_core *clk[clk_max];
static struct clk_onecell_data clk_data;
int __init mx31_clocks_init(unsigned long fref)
@@ -176,11 +175,11 @@ int __init mx31_clocks_init(unsigned long fref)
clk_register_clkdev(clk[sdma_gate], NULL, "imx31-sdma");
clk_register_clkdev(clk[iim_gate], "iim", NULL);
- clk_set_parent(clk[csi], clk[upll]);
- clk_prepare_enable(clk[emi_gate]);
- clk_prepare_enable(clk[iim_gate]);
+ clk_provider_set_parent(clk[csi], clk[upll]);
+ clk_provider_prepare_enable(clk[emi_gate]);
+ clk_provider_prepare_enable(clk[iim_gate]);
mx31_revision();
- clk_disable_unprepare(clk[iim_gate]);
+ clk_provider_disable_unprepare(clk[iim_gate]);
mxc_timer_init(MX31_IO_ADDRESS(MX31_GPT1_BASE_ADDR), MX31_INT_GPT);
diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c
index a0d2b57..846b2cc 100644
--- a/arch/arm/mach-imx/clk-imx35.c
+++ b/arch/arm/mach-imx/clk-imx35.c
@@ -8,7 +8,6 @@
*/
#include <linux/mm.h>
#include <linux/delay.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include <linux/clkdev.h>
#include <linux/of.h>
@@ -67,7 +66,7 @@ enum mx35_clks {
gpu2d_gate, clk_max
};
-static struct clk *clk[clk_max];
+static struct clk_core *clk[clk_max];
int __init mx35_clocks_init(void)
{
@@ -99,7 +98,7 @@ int __init mx35_clocks_init(void)
else
clk[arm] = imx_clk_fixed_factor("arm", "mpll", 1, aad->arm);
- if (clk_get_rate(clk[arm]) > 400000000)
+ if (clk_provider_get_rate(clk[arm]) > 400000000)
hsp_div = hsp_div_532;
else
hsp_div = hsp_div_400;
@@ -257,14 +256,14 @@ int __init mx35_clocks_init(void)
clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0");
clk_register_clkdev(clk[admux_gate], "audmux", NULL);
- clk_prepare_enable(clk[spba_gate]);
- clk_prepare_enable(clk[gpio1_gate]);
- clk_prepare_enable(clk[gpio2_gate]);
- clk_prepare_enable(clk[gpio3_gate]);
- clk_prepare_enable(clk[iim_gate]);
- clk_prepare_enable(clk[emi_gate]);
- clk_prepare_enable(clk[max_gate]);
- clk_prepare_enable(clk[iomuxc_gate]);
+ clk_provider_prepare_enable(clk[spba_gate]);
+ clk_provider_prepare_enable(clk[gpio1_gate]);
+ clk_provider_prepare_enable(clk[gpio2_gate]);
+ clk_provider_prepare_enable(clk[gpio3_gate]);
+ clk_provider_prepare_enable(clk[iim_gate]);
+ clk_provider_prepare_enable(clk[emi_gate]);
+ clk_provider_prepare_enable(clk[max_gate]);
+ clk_provider_prepare_enable(clk[iomuxc_gate]);
/*
* SCC is needed to boot via mmc after a watchdog reset. The clock code
@@ -272,7 +271,7 @@ int __init mx35_clocks_init(void)
* handled here and not needed for mmc) and IIM (which is enabled
* unconditionally above).
*/
- clk_prepare_enable(clk[scc_gate]);
+ clk_provider_prepare_enable(clk[scc_gate]);
imx_print_silicon_rev("i.MX35", mx35_revision());
diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c
index 72d6521..fa9fc84 100644
--- a/arch/arm/mach-imx/clk-imx51-imx53.c
+++ b/arch/arm/mach-imx/clk-imx51-imx53.c
@@ -8,7 +8,6 @@
*/
#include <linux/mm.h>
#include <linux/delay.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
@@ -126,7 +125,7 @@ static const char *spdif_sel[] = { "pll1_sw", "pll2_sw", "pll3_sw", "spdif_xtal_
static const char *spdif0_com_sel[] = { "spdif0_podf", "ssi1_root_gate", };
static const char *mx51_spdif1_com_sel[] = { "spdif1_podf", "ssi2_root_gate", };
-static struct clk *clk[IMX5_CLK_END];
+static struct clk_core *clk[IMX5_CLK_END];
static struct clk_onecell_data clk_data;
static void __init mx5_clocks_common_init(void __iomem *ccm_base)
@@ -289,26 +288,28 @@ static void __init mx5_clocks_common_init(void __iomem *ccm_base)
clk_register_clkdev(clk[IMX5_CLK_GPC_DVFS], "gpc_dvfs", NULL);
/* Set SDHC parents to be PLL2 */
- clk_set_parent(clk[IMX5_CLK_ESDHC_A_SEL], clk[IMX5_CLK_PLL2_SW]);
- clk_set_parent(clk[IMX5_CLK_ESDHC_B_SEL], clk[IMX5_CLK_PLL2_SW]);
+ clk_provider_set_parent(clk[IMX5_CLK_ESDHC_A_SEL],
+ clk[IMX5_CLK_PLL2_SW]);
+ clk_provider_set_parent(clk[IMX5_CLK_ESDHC_B_SEL],
+ clk[IMX5_CLK_PLL2_SW]);
/* move usb phy clk to 24MHz */
- clk_set_parent(clk[IMX5_CLK_USB_PHY_SEL], clk[IMX5_CLK_OSC]);
-
- clk_prepare_enable(clk[IMX5_CLK_GPC_DVFS]);
- clk_prepare_enable(clk[IMX5_CLK_AHB_MAX]); /* esdhc3 */
- clk_prepare_enable(clk[IMX5_CLK_AIPS_TZ1]);
- clk_prepare_enable(clk[IMX5_CLK_AIPS_TZ2]); /* fec */
- clk_prepare_enable(clk[IMX5_CLK_SPBA]);
- clk_prepare_enable(clk[IMX5_CLK_EMI_FAST_GATE]); /* fec */
- clk_prepare_enable(clk[IMX5_CLK_EMI_SLOW_GATE]); /* eim */
- clk_prepare_enable(clk[IMX5_CLK_MIPI_HSC1_GATE]);
- clk_prepare_enable(clk[IMX5_CLK_MIPI_HSC2_GATE]);
- clk_prepare_enable(clk[IMX5_CLK_MIPI_ESC_GATE]);
- clk_prepare_enable(clk[IMX5_CLK_MIPI_HSP_GATE]);
- clk_prepare_enable(clk[IMX5_CLK_TMAX1]);
- clk_prepare_enable(clk[IMX5_CLK_TMAX2]); /* esdhc2, fec */
- clk_prepare_enable(clk[IMX5_CLK_TMAX3]); /* esdhc1, esdhc4 */
+ clk_provider_set_parent(clk[IMX5_CLK_USB_PHY_SEL], clk[IMX5_CLK_OSC]);
+
+ clk_provider_prepare_enable(clk[IMX5_CLK_GPC_DVFS]);
+ clk_provider_prepare_enable(clk[IMX5_CLK_AHB_MAX]); /* esdhc3 */
+ clk_provider_prepare_enable(clk[IMX5_CLK_AIPS_TZ1]);
+ clk_provider_prepare_enable(clk[IMX5_CLK_AIPS_TZ2]); /* fec */
+ clk_provider_prepare_enable(clk[IMX5_CLK_SPBA]);
+ clk_provider_prepare_enable(clk[IMX5_CLK_EMI_FAST_GATE]); /* fec */
+ clk_provider_prepare_enable(clk[IMX5_CLK_EMI_SLOW_GATE]); /* eim */
+ clk_provider_prepare_enable(clk[IMX5_CLK_MIPI_HSC1_GATE]);
+ clk_provider_prepare_enable(clk[IMX5_CLK_MIPI_HSC2_GATE]);
+ clk_provider_prepare_enable(clk[IMX5_CLK_MIPI_ESC_GATE]);
+ clk_provider_prepare_enable(clk[IMX5_CLK_MIPI_HSP_GATE]);
+ clk_provider_prepare_enable(clk[IMX5_CLK_TMAX1]);
+ clk_provider_prepare_enable(clk[IMX5_CLK_TMAX2]); /* esdhc2, fec */
+ clk_provider_prepare_enable(clk[IMX5_CLK_TMAX3]); /* esdhc1, esdhc4 */
}
static void __init mx50_clocks_init(struct device_node *np)
@@ -361,15 +362,15 @@ static void __init mx50_clocks_init(struct device_node *np)
of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
/* set SDHC root clock to 200MHZ*/
- clk_set_rate(clk[IMX5_CLK_ESDHC_A_PODF], 200000000);
- clk_set_rate(clk[IMX5_CLK_ESDHC_B_PODF], 200000000);
+ clk_provider_set_rate(clk[IMX5_CLK_ESDHC_A_PODF], 200000000);
+ clk_provider_set_rate(clk[IMX5_CLK_ESDHC_B_PODF], 200000000);
- clk_prepare_enable(clk[IMX5_CLK_IIM_GATE]);
+ clk_provider_prepare_enable(clk[IMX5_CLK_IIM_GATE]);
imx_print_silicon_rev("i.MX50", IMX_CHIP_REVISION_1_1);
- clk_disable_unprepare(clk[IMX5_CLK_IIM_GATE]);
+ clk_provider_disable_unprepare(clk[IMX5_CLK_IIM_GATE]);
- r = clk_round_rate(clk[IMX5_CLK_USBOH3_PER_GATE], 54000000);
- clk_set_rate(clk[IMX5_CLK_USBOH3_PER_GATE], r);
+ r = clk_provider_round_rate(clk[IMX5_CLK_USBOH3_PER_GATE], 54000000);
+ clk_provider_set_rate(clk[IMX5_CLK_USBOH3_PER_GATE], r);
}
CLK_OF_DECLARE(imx50_ccm, "fsl,imx50-ccm", mx50_clocks_init);
@@ -435,15 +436,16 @@ static void __init mx51_clocks_init(struct device_node *np)
of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
/* set the usboh3 parent to pll2_sw */
- clk_set_parent(clk[IMX5_CLK_USBOH3_SEL], clk[IMX5_CLK_PLL2_SW]);
+ clk_provider_set_parent(clk[IMX5_CLK_USBOH3_SEL],
+ clk[IMX5_CLK_PLL2_SW]);
/* set SDHC root clock to 166.25MHZ*/
- clk_set_rate(clk[IMX5_CLK_ESDHC_A_PODF], 166250000);
- clk_set_rate(clk[IMX5_CLK_ESDHC_B_PODF], 166250000);
+ clk_provider_set_rate(clk[IMX5_CLK_ESDHC_A_PODF], 166250000);
+ clk_provider_set_rate(clk[IMX5_CLK_ESDHC_B_PODF], 166250000);
- clk_prepare_enable(clk[IMX5_CLK_IIM_GATE]);
+ clk_provider_prepare_enable(clk[IMX5_CLK_IIM_GATE]);
imx_print_silicon_rev("i.MX51", mx51_revision());
- clk_disable_unprepare(clk[IMX5_CLK_IIM_GATE]);
+ clk_provider_disable_unprepare(clk[IMX5_CLK_IIM_GATE]);
/*
* Reference Manual says: Functionality of CCDR[18] and CLPCR[23] is no
@@ -545,17 +547,17 @@ static void __init mx53_clocks_init(struct device_node *np)
of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
/* set SDHC root clock to 200MHZ*/
- clk_set_rate(clk[IMX5_CLK_ESDHC_A_PODF], 200000000);
- clk_set_rate(clk[IMX5_CLK_ESDHC_B_PODF], 200000000);
+ clk_provider_set_rate(clk[IMX5_CLK_ESDHC_A_PODF], 200000000);
+ clk_provider_set_rate(clk[IMX5_CLK_ESDHC_B_PODF], 200000000);
/* move can bus clk to 24MHz */
- clk_set_parent(clk[IMX5_CLK_CAN_SEL], clk[IMX5_CLK_LP_APM]);
+ clk_provider_set_parent(clk[IMX5_CLK_CAN_SEL], clk[IMX5_CLK_LP_APM]);
- clk_prepare_enable(clk[IMX5_CLK_IIM_GATE]);
+ clk_provider_prepare_enable(clk[IMX5_CLK_IIM_GATE]);
imx_print_silicon_rev("i.MX53", mx53_revision());
- clk_disable_unprepare(clk[IMX5_CLK_IIM_GATE]);
+ clk_provider_disable_unprepare(clk[IMX5_CLK_IIM_GATE]);
- r = clk_round_rate(clk[IMX5_CLK_USBOH3_PER_GATE], 54000000);
- clk_set_rate(clk[IMX5_CLK_USBOH3_PER_GATE], r);
+ r = clk_provider_round_rate(clk[IMX5_CLK_USBOH3_PER_GATE], 54000000);
+ clk_provider_set_rate(clk[IMX5_CLK_USBOH3_PER_GATE], r);
}
CLK_OF_DECLARE(imx53_ccm, "fsl,imx53-ccm", mx53_clocks_init);
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index 29d4129..1a816a2 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -12,7 +12,6 @@
#include <linux/init.h>
#include <linux/types.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/err.h>
#include <linux/io.h>
@@ -74,7 +73,7 @@ static const char *lvds_sels[] = {
"pcie_ref_125m", "sata_ref_100m",
};
-static struct clk *clk[IMX6QDL_CLK_END];
+static struct clk_core *clk[IMX6QDL_CLK_END];
static struct clk_onecell_data clk_data;
static unsigned int const clks_init_on[] __initconst = {
@@ -414,50 +413,65 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
if ((imx_get_soc_revision() != IMX_CHIP_REVISION_1_0) ||
cpu_is_imx6dl()) {
- clk_set_parent(clk[IMX6QDL_CLK_LDB_DI0_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
- clk_set_parent(clk[IMX6QDL_CLK_LDB_DI1_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_LDB_DI0_SEL],
+ clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_LDB_DI1_SEL],
+ clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
}
- clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI0_PRE_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
- clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI1_PRE_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
- clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI0_PRE_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
- clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI1_PRE_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
- clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI0_SEL], clk[IMX6QDL_CLK_IPU1_DI0_PRE]);
- clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI1_SEL], clk[IMX6QDL_CLK_IPU1_DI1_PRE]);
- clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI0_SEL], clk[IMX6QDL_CLK_IPU2_DI0_PRE]);
- clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI1_SEL], clk[IMX6QDL_CLK_IPU2_DI1_PRE]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_IPU1_DI0_PRE_SEL],
+ clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_IPU1_DI1_PRE_SEL],
+ clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_IPU2_DI0_PRE_SEL],
+ clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_IPU2_DI1_PRE_SEL],
+ clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_IPU1_DI0_SEL],
+ clk[IMX6QDL_CLK_IPU1_DI0_PRE]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_IPU1_DI1_SEL],
+ clk[IMX6QDL_CLK_IPU1_DI1_PRE]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_IPU2_DI0_SEL],
+ clk[IMX6QDL_CLK_IPU2_DI0_PRE]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_IPU2_DI1_SEL],
+ clk[IMX6QDL_CLK_IPU2_DI1_PRE]);
/*
* The gpmi needs 100MHz frequency in the EDO/Sync mode,
* We can not get the 100MHz from the pll2_pfd0_352m.
* So choose pll2_pfd2_396m as enfc_sel's parent.
*/
- clk_set_parent(clk[IMX6QDL_CLK_ENFC_SEL], clk[IMX6QDL_CLK_PLL2_PFD2_396M]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_ENFC_SEL],
+ clk[IMX6QDL_CLK_PLL2_PFD2_396M]);
for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
- clk_prepare_enable(clk[clks_init_on[i]]);
+ clk_provider_prepare_enable(clk[clks_init_on[i]]);
if (IS_ENABLED(CONFIG_USB_MXS_PHY)) {
- clk_prepare_enable(clk[IMX6QDL_CLK_USBPHY1_GATE]);
- clk_prepare_enable(clk[IMX6QDL_CLK_USBPHY2_GATE]);
+ clk_provider_prepare_enable(clk[IMX6QDL_CLK_USBPHY1_GATE]);
+ clk_provider_prepare_enable(clk[IMX6QDL_CLK_USBPHY2_GATE]);
}
/*
* Let's initially set up CLKO with OSC24M, since this configuration
* is widely used by imx6q board designs to clock audio codec.
*/
- ret = clk_set_parent(clk[IMX6QDL_CLK_CKO2_SEL], clk[IMX6QDL_CLK_OSC]);
+ ret = clk_provider_set_parent(clk[IMX6QDL_CLK_CKO2_SEL],
+ clk[IMX6QDL_CLK_OSC]);
if (!ret)
- ret = clk_set_parent(clk[IMX6QDL_CLK_CKO], clk[IMX6QDL_CLK_CKO2]);
+ ret = clk_provider_set_parent(clk[IMX6QDL_CLK_CKO],
+ clk[IMX6QDL_CLK_CKO2]);
if (ret)
pr_warn("failed to set up CLKO: %d\n", ret);
/* Audio-related clocks configuration */
- clk_set_parent(clk[IMX6QDL_CLK_SPDIF_SEL], clk[IMX6QDL_CLK_PLL3_PFD3_454M]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_SPDIF_SEL],
+ clk[IMX6QDL_CLK_PLL3_PFD3_454M]);
/* All existing boards with PCIe use LVDS1 */
if (IS_ENABLED(CONFIG_PCI_IMX6))
- clk_set_parent(clk[IMX6QDL_CLK_LVDS1_SEL], clk[IMX6QDL_CLK_SATA_REF_100M]);
+ clk_provider_set_parent(clk[IMX6QDL_CLK_LVDS1_SEL],
+ clk[IMX6QDL_CLK_SATA_REF_100M]);
/* Set initial power mode */
imx6q_set_lpm(WAIT_CLOCKED);
diff --git a/arch/arm/mach-imx/clk-imx6sl.c b/arch/arm/mach-imx/clk-imx6sl.c
index fef46fa..9f1224d 100644
--- a/arch/arm/mach-imx/clk-imx6sl.c
+++ b/arch/arm/mach-imx/clk-imx6sl.c
@@ -7,7 +7,6 @@
*
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/err.h>
#include <linux/of.h>
@@ -79,7 +78,7 @@ static struct clk_div_table video_div_table[] = {
{ }
};
-static struct clk *clks[IMX6SL_CLK_END];
+static struct clk_core *clks[IMX6SL_CLK_END];
static struct clk_onecell_data clk_data;
static void __iomem *ccm_base;
static void __iomem *anatop_base;
@@ -355,7 +354,7 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node)
of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
/* Ensure the AHB clk is at 132MHz. */
- ret = clk_set_rate(clks[IMX6SL_CLK_AHB], 132000000);
+ ret = clk_provider_set_rate(clks[IMX6SL_CLK_AHB], 132000000);
if (ret)
pr_warn("%s: failed to set AHB clock rate %d!\n",
__func__, ret);
@@ -365,15 +364,16 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node)
* usecount and enabling/disabling of parent PLLs.
*/
for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
- clk_prepare_enable(clks[clks_init_on[i]]);
+ clk_provider_prepare_enable(clks[clks_init_on[i]]);
if (IS_ENABLED(CONFIG_USB_MXS_PHY)) {
- clk_prepare_enable(clks[IMX6SL_CLK_USBPHY1_GATE]);
- clk_prepare_enable(clks[IMX6SL_CLK_USBPHY2_GATE]);
+ clk_provider_prepare_enable(clks[IMX6SL_CLK_USBPHY1_GATE]);
+ clk_provider_prepare_enable(clks[IMX6SL_CLK_USBPHY2_GATE]);
}
/* Audio-related clocks configuration */
- clk_set_parent(clks[IMX6SL_CLK_SPDIF0_SEL], clks[IMX6SL_CLK_PLL3_PFD3]);
+ clk_provider_set_parent(clks[IMX6SL_CLK_SPDIF0_SEL],
+ clks[IMX6SL_CLK_PLL3_PFD3]);
/* Set initial power mode */
imx6q_set_lpm(WAIT_CLOCKED);
diff --git a/arch/arm/mach-imx/clk-imx6sx.c b/arch/arm/mach-imx/clk-imx6sx.c
index ecde72b..1f2bc4b 100644
--- a/arch/arm/mach-imx/clk-imx6sx.c
+++ b/arch/arm/mach-imx/clk-imx6sx.c
@@ -10,7 +10,6 @@
*/
#include <dt-bindings/clock/imx6sx-clock.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/err.h>
#include <linux/init.h>
@@ -82,7 +81,7 @@ static const char *lvds_sels[] = {
"dummy", "dummy", "pcie_ref_125m", "dummy", "usbphy1", "usbphy2",
};
-static struct clk *clks[IMX6SX_CLK_CLK_END];
+static struct clk_core *clks[IMX6SX_CLK_CLK_END];
static struct clk_onecell_data clk_data;
static int const clks_init_on[] __initconst = {
@@ -136,12 +135,14 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
clks[IMX6SX_CLK_DUMMY] = imx_clk_fixed("dummy", 0);
- clks[IMX6SX_CLK_CKIL] = of_clk_get_by_name(ccm_node, "ckil");
- clks[IMX6SX_CLK_OSC] = of_clk_get_by_name(ccm_node, "osc");
+ clks[IMX6SX_CLK_CKIL] = of_clk_provider_get_by_name(ccm_node, "ckil");
+ clks[IMX6SX_CLK_OSC] = of_clk_provider_get_by_name(ccm_node, "osc");
/* ipp_di clock is external input */
- clks[IMX6SX_CLK_IPP_DI0] = of_clk_get_by_name(ccm_node, "ipp_di0");
- clks[IMX6SX_CLK_IPP_DI1] = of_clk_get_by_name(ccm_node, "ipp_di1");
+ clks[IMX6SX_CLK_IPP_DI0] = of_clk_provider_get_by_name(ccm_node,
+ "ipp_di0");
+ clks[IMX6SX_CLK_IPP_DI1] = of_clk_provider_get_by_name(ccm_node,
+ "ipp_di1");
np = of_find_compatible_node(NULL, NULL, "fsl,imx6sx-anatop");
base = of_iomap(np, 0);
@@ -453,65 +454,80 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
- clk_prepare_enable(clks[clks_init_on[i]]);
+ clk_provider_prepare_enable(clks[clks_init_on[i]]);
if (IS_ENABLED(CONFIG_USB_MXS_PHY)) {
- clk_prepare_enable(clks[IMX6SX_CLK_USBPHY1_GATE]);
- clk_prepare_enable(clks[IMX6SX_CLK_USBPHY2_GATE]);
+ clk_provider_prepare_enable(clks[IMX6SX_CLK_USBPHY1_GATE]);
+ clk_provider_prepare_enable(clks[IMX6SX_CLK_USBPHY2_GATE]);
}
/* Set the default 132MHz for EIM module */
- clk_set_parent(clks[IMX6SX_CLK_EIM_SLOW_SEL], clks[IMX6SX_CLK_PLL2_PFD2]);
- clk_set_rate(clks[IMX6SX_CLK_EIM_SLOW], 132000000);
+ clk_provider_set_parent(clks[IMX6SX_CLK_EIM_SLOW_SEL],
+ clks[IMX6SX_CLK_PLL2_PFD2]);
+ clk_provider_set_rate(clks[IMX6SX_CLK_EIM_SLOW], 132000000);
/* set parent clock for LCDIF1 pixel clock */
- clk_set_parent(clks[IMX6SX_CLK_LCDIF1_PRE_SEL], clks[IMX6SX_CLK_PLL5_VIDEO_DIV]);
- clk_set_parent(clks[IMX6SX_CLK_LCDIF1_SEL], clks[IMX6SX_CLK_LCDIF1_PODF]);
+ clk_provider_set_parent(clks[IMX6SX_CLK_LCDIF1_PRE_SEL],
+ clks[IMX6SX_CLK_PLL5_VIDEO_DIV]);
+ clk_provider_set_parent(clks[IMX6SX_CLK_LCDIF1_SEL],
+ clks[IMX6SX_CLK_LCDIF1_PODF]);
/* Set the parent clks of PCIe lvds1 and pcie_axi to be pcie ref, axi */
- if (clk_set_parent(clks[IMX6SX_CLK_LVDS1_SEL], clks[IMX6SX_CLK_PCIE_REF_125M]))
+ if (clk_provider_set_parent(clks[IMX6SX_CLK_LVDS1_SEL], clks[IMX6SX_CLK_PCIE_REF_125M]))
pr_err("Failed to set pcie bus parent clk.\n");
- if (clk_set_parent(clks[IMX6SX_CLK_PCIE_AXI_SEL], clks[IMX6SX_CLK_AXI]))
+ if (clk_provider_set_parent(clks[IMX6SX_CLK_PCIE_AXI_SEL], clks[IMX6SX_CLK_AXI]))
pr_err("Failed to set pcie parent clk.\n");
/*
* Init enet system AHB clock, set to 200Mhz
* pll2_pfd2_396m-> ENET_PODF-> ENET_AHB
*/
- clk_set_parent(clks[IMX6SX_CLK_ENET_PRE_SEL], clks[IMX6SX_CLK_PLL2_PFD2]);
- clk_set_parent(clks[IMX6SX_CLK_ENET_SEL], clks[IMX6SX_CLK_ENET_PODF]);
- clk_set_rate(clks[IMX6SX_CLK_ENET_PODF], 200000000);
- clk_set_rate(clks[IMX6SX_CLK_ENET_REF], 125000000);
- clk_set_rate(clks[IMX6SX_CLK_ENET2_REF], 125000000);
+ clk_provider_set_parent(clks[IMX6SX_CLK_ENET_PRE_SEL],
+ clks[IMX6SX_CLK_PLL2_PFD2]);
+ clk_provider_set_parent(clks[IMX6SX_CLK_ENET_SEL],
+ clks[IMX6SX_CLK_ENET_PODF]);
+ clk_provider_set_rate(clks[IMX6SX_CLK_ENET_PODF], 200000000);
+ clk_provider_set_rate(clks[IMX6SX_CLK_ENET_REF], 125000000);
+ clk_provider_set_rate(clks[IMX6SX_CLK_ENET2_REF], 125000000);
/* Audio clocks */
- clk_set_rate(clks[IMX6SX_CLK_PLL4_AUDIO_DIV], 393216000);
-
- clk_set_parent(clks[IMX6SX_CLK_SPDIF_SEL], clks[IMX6SX_CLK_PLL4_AUDIO_DIV]);
- clk_set_rate(clks[IMX6SX_CLK_SPDIF_PODF], 98304000);
-
- clk_set_parent(clks[IMX6SX_CLK_AUDIO_SEL], clks[IMX6SX_CLK_PLL3_USB_OTG]);
- clk_set_rate(clks[IMX6SX_CLK_AUDIO_PODF], 24000000);
-
- clk_set_parent(clks[IMX6SX_CLK_SSI1_SEL], clks[IMX6SX_CLK_PLL4_AUDIO_DIV]);
- clk_set_parent(clks[IMX6SX_CLK_SSI2_SEL], clks[IMX6SX_CLK_PLL4_AUDIO_DIV]);
- clk_set_parent(clks[IMX6SX_CLK_SSI3_SEL], clks[IMX6SX_CLK_PLL4_AUDIO_DIV]);
- clk_set_rate(clks[IMX6SX_CLK_SSI1_PODF], 24576000);
- clk_set_rate(clks[IMX6SX_CLK_SSI2_PODF], 24576000);
- clk_set_rate(clks[IMX6SX_CLK_SSI3_PODF], 24576000);
-
- clk_set_parent(clks[IMX6SX_CLK_ESAI_SEL], clks[IMX6SX_CLK_PLL4_AUDIO_DIV]);
- clk_set_rate(clks[IMX6SX_CLK_ESAI_PODF], 24576000);
+ clk_provider_set_rate(clks[IMX6SX_CLK_PLL4_AUDIO_DIV], 393216000);
+
+ clk_provider_set_parent(clks[IMX6SX_CLK_SPDIF_SEL],
+ clks[IMX6SX_CLK_PLL4_AUDIO_DIV]);
+ clk_provider_set_rate(clks[IMX6SX_CLK_SPDIF_PODF], 98304000);
+
+ clk_provider_set_parent(clks[IMX6SX_CLK_AUDIO_SEL],
+ clks[IMX6SX_CLK_PLL3_USB_OTG]);
+ clk_provider_set_rate(clks[IMX6SX_CLK_AUDIO_PODF], 24000000);
+
+ clk_provider_set_parent(clks[IMX6SX_CLK_SSI1_SEL],
+ clks[IMX6SX_CLK_PLL4_AUDIO_DIV]);
+ clk_provider_set_parent(clks[IMX6SX_CLK_SSI2_SEL],
+ clks[IMX6SX_CLK_PLL4_AUDIO_DIV]);
+ clk_provider_set_parent(clks[IMX6SX_CLK_SSI3_SEL],
+ clks[IMX6SX_CLK_PLL4_AUDIO_DIV]);
+ clk_provider_set_rate(clks[IMX6SX_CLK_SSI1_PODF], 24576000);
+ clk_provider_set_rate(clks[IMX6SX_CLK_SSI2_PODF], 24576000);
+ clk_provider_set_rate(clks[IMX6SX_CLK_SSI3_PODF], 24576000);
+
+ clk_provider_set_parent(clks[IMX6SX_CLK_ESAI_SEL],
+ clks[IMX6SX_CLK_PLL4_AUDIO_DIV]);
+ clk_provider_set_rate(clks[IMX6SX_CLK_ESAI_PODF], 24576000);
/* Set parent clock for vadc */
- clk_set_parent(clks[IMX6SX_CLK_VID_SEL], clks[IMX6SX_CLK_PLL3_USB_OTG]);
+ clk_provider_set_parent(clks[IMX6SX_CLK_VID_SEL],
+ clks[IMX6SX_CLK_PLL3_USB_OTG]);
/* default parent of can_sel clock is invalid, manually set it here */
- clk_set_parent(clks[IMX6SX_CLK_CAN_SEL], clks[IMX6SX_CLK_PLL3_60M]);
+ clk_provider_set_parent(clks[IMX6SX_CLK_CAN_SEL],
+ clks[IMX6SX_CLK_PLL3_60M]);
/* Update gpu clock from default 528M to 720M */
- clk_set_parent(clks[IMX6SX_CLK_GPU_CORE_SEL], clks[IMX6SX_CLK_PLL3_PFD0]);
- clk_set_parent(clks[IMX6SX_CLK_GPU_AXI_SEL], clks[IMX6SX_CLK_PLL3_PFD0]);
+ clk_provider_set_parent(clks[IMX6SX_CLK_GPU_CORE_SEL],
+ clks[IMX6SX_CLK_PLL3_PFD0]);
+ clk_provider_set_parent(clks[IMX6SX_CLK_GPU_AXI_SEL],
+ clks[IMX6SX_CLK_PLL3_PFD0]);
/* Set initial power mode */
imx6q_set_lpm(WAIT_CLOCKED);
diff --git a/arch/arm/mach-imx/clk-pfd.c b/arch/arm/mach-imx/clk-pfd.c
index 0b0f6f6..7f172a2 100644
--- a/arch/arm/mach-imx/clk-pfd.c
+++ b/arch/arm/mach-imx/clk-pfd.c
@@ -10,7 +10,6 @@
* http://www.gnu.org/copyleft/gpl.html
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/io.h>
#include <linux/slab.h>
@@ -128,11 +127,11 @@ static const struct clk_ops clk_pfd_ops = {
.is_enabled = clk_pfd_is_enabled,
};
-struct clk *imx_clk_pfd(const char *name, const char *parent_name,
+struct clk_core *imx_clk_pfd(const char *name, const char *parent_name,
void __iomem *reg, u8 idx)
{
struct clk_pfd *pfd;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
pfd = kzalloc(sizeof(*pfd), GFP_KERNEL);
diff --git a/arch/arm/mach-imx/clk-pllv1.c b/arch/arm/mach-imx/clk-pllv1.c
index d21d14c..7ef2cab 100644
--- a/arch/arm/mach-imx/clk-pllv1.c
+++ b/arch/arm/mach-imx/clk-pllv1.c
@@ -1,4 +1,3 @@
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/io.h>
#include <linux/slab.h>
@@ -97,11 +96,11 @@ static struct clk_ops clk_pllv1_ops = {
.recalc_rate = clk_pllv1_recalc_rate,
};
-struct clk *imx_clk_pllv1(const char *name, const char *parent,
+struct clk_core *imx_clk_pllv1(const char *name, const char *parent,
void __iomem *base)
{
struct clk_pllv1 *pll;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
pll = kmalloc(sizeof(*pll), GFP_KERNEL);
diff --git a/arch/arm/mach-imx/clk-pllv2.c b/arch/arm/mach-imx/clk-pllv2.c
index 20889d5..3dca7df 100644
--- a/arch/arm/mach-imx/clk-pllv2.c
+++ b/arch/arm/mach-imx/clk-pllv2.c
@@ -1,5 +1,4 @@
#include <linux/kernel.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include <linux/errno.h>
#include <linux/delay.h>
@@ -237,11 +236,11 @@ static struct clk_ops clk_pllv2_ops = {
.set_rate = clk_pllv2_set_rate,
};
-struct clk *imx_clk_pllv2(const char *name, const char *parent,
+struct clk_core *imx_clk_pllv2(const char *name, const char *parent,
void __iomem *base)
{
struct clk_pllv2 *pll;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
pll = kzalloc(sizeof(*pll), GFP_KERNEL);
diff --git a/arch/arm/mach-imx/clk-pllv3.c b/arch/arm/mach-imx/clk-pllv3.c
index 6136405..a07603d 100644
--- a/arch/arm/mach-imx/clk-pllv3.c
+++ b/arch/arm/mach-imx/clk-pllv3.c
@@ -10,7 +10,6 @@
* http://www.gnu.org/copyleft/gpl.html
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/delay.h>
#include <linux/io.h>
@@ -320,13 +319,13 @@ static const struct clk_ops clk_pllv3_enet_ops = {
.recalc_rate = clk_pllv3_enet_recalc_rate,
};
-struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
+struct clk_core *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
const char *parent_name, void __iomem *base,
u32 div_mask)
{
struct clk_pllv3 *pll;
const struct clk_ops *ops;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
pll = kzalloc(sizeof(*pll), GFP_KERNEL);
diff --git a/arch/arm/mach-imx/clk-vf610.c b/arch/arm/mach-imx/clk-vf610.c
index f60d6d5..bd2450b 100644
--- a/arch/arm/mach-imx/clk-vf610.c
+++ b/arch/arm/mach-imx/clk-vf610.c
@@ -9,7 +9,6 @@
*/
#include <linux/of_address.h>
-#include <linux/clk.h>
#include <dt-bindings/clock/vf610-clock.h>
#include "clk.h"
@@ -95,7 +94,7 @@ static struct clk_div_table pll4_main_div_table[] = {
{ }
};
-static struct clk *clk[VF610_CLK_END];
+static struct clk_core *clk[VF610_CLK_END];
static struct clk_onecell_data clk_data;
static void __init vf610_clocks_init(struct device_node *ccm_node)
@@ -307,20 +306,32 @@ static void __init vf610_clocks_init(struct device_node *ccm_node)
imx_check_clocks(clk, ARRAY_SIZE(clk));
- clk_set_parent(clk[VF610_CLK_QSPI0_SEL], clk[VF610_CLK_PLL1_PFD4]);
- clk_set_rate(clk[VF610_CLK_QSPI0_X4_DIV], clk_get_rate(clk[VF610_CLK_QSPI0_SEL]) / 2);
- clk_set_rate(clk[VF610_CLK_QSPI0_X2_DIV], clk_get_rate(clk[VF610_CLK_QSPI0_X4_DIV]) / 2);
- clk_set_rate(clk[VF610_CLK_QSPI0_X1_DIV], clk_get_rate(clk[VF610_CLK_QSPI0_X2_DIV]) / 2);
-
- clk_set_parent(clk[VF610_CLK_QSPI1_SEL], clk[VF610_CLK_PLL1_PFD4]);
- clk_set_rate(clk[VF610_CLK_QSPI1_X4_DIV], clk_get_rate(clk[VF610_CLK_QSPI1_SEL]) / 2);
- clk_set_rate(clk[VF610_CLK_QSPI1_X2_DIV], clk_get_rate(clk[VF610_CLK_QSPI1_X4_DIV]) / 2);
- clk_set_rate(clk[VF610_CLK_QSPI1_X1_DIV], clk_get_rate(clk[VF610_CLK_QSPI1_X2_DIV]) / 2);
-
- clk_set_parent(clk[VF610_CLK_SAI0_SEL], clk[VF610_CLK_AUDIO_EXT]);
- clk_set_parent(clk[VF610_CLK_SAI1_SEL], clk[VF610_CLK_AUDIO_EXT]);
- clk_set_parent(clk[VF610_CLK_SAI2_SEL], clk[VF610_CLK_AUDIO_EXT]);
- clk_set_parent(clk[VF610_CLK_SAI3_SEL], clk[VF610_CLK_AUDIO_EXT]);
+ clk_provider_set_parent(clk[VF610_CLK_QSPI0_SEL],
+ clk[VF610_CLK_PLL1_PFD4]);
+ clk_provider_set_rate(clk[VF610_CLK_QSPI0_X4_DIV],
+ clk_provider_get_rate(clk[VF610_CLK_QSPI0_SEL]) / 2);
+ clk_provider_set_rate(clk[VF610_CLK_QSPI0_X2_DIV],
+ clk_provider_get_rate(clk[VF610_CLK_QSPI0_X4_DIV]) / 2);
+ clk_provider_set_rate(clk[VF610_CLK_QSPI0_X1_DIV],
+ clk_provider_get_rate(clk[VF610_CLK_QSPI0_X2_DIV]) / 2);
+
+ clk_provider_set_parent(clk[VF610_CLK_QSPI1_SEL],
+ clk[VF610_CLK_PLL1_PFD4]);
+ clk_provider_set_rate(clk[VF610_CLK_QSPI1_X4_DIV],
+ clk_provider_get_rate(clk[VF610_CLK_QSPI1_SEL]) / 2);
+ clk_provider_set_rate(clk[VF610_CLK_QSPI1_X2_DIV],
+ clk_provider_get_rate(clk[VF610_CLK_QSPI1_X4_DIV]) / 2);
+ clk_provider_set_rate(clk[VF610_CLK_QSPI1_X1_DIV],
+ clk_provider_get_rate(clk[VF610_CLK_QSPI1_X2_DIV]) / 2);
+
+ clk_provider_set_parent(clk[VF610_CLK_SAI0_SEL],
+ clk[VF610_CLK_AUDIO_EXT]);
+ clk_provider_set_parent(clk[VF610_CLK_SAI1_SEL],
+ clk[VF610_CLK_AUDIO_EXT]);
+ clk_provider_set_parent(clk[VF610_CLK_SAI2_SEL],
+ clk[VF610_CLK_AUDIO_EXT]);
+ clk_provider_set_parent(clk[VF610_CLK_SAI3_SEL],
+ clk[VF610_CLK_AUDIO_EXT]);
/* Add the clocks to provider list */
clk_data.clks = clk;
diff --git a/arch/arm/mach-imx/clk.c b/arch/arm/mach-imx/clk.c
index df12b53..fc54203 100644
--- a/arch/arm/mach-imx/clk.c
+++ b/arch/arm/mach-imx/clk.c
@@ -1,4 +1,3 @@
-#include <linux/clk.h>
#include <linux/err.h>
#include <linux/of.h>
#include <linux/slab.h>
@@ -7,7 +6,7 @@
DEFINE_SPINLOCK(imx_ccm_lock);
-void __init imx_check_clocks(struct clk *clks[], unsigned int count)
+void __init imx_check_clocks(struct clk_core *clks[], unsigned int count)
{
unsigned i;
@@ -17,10 +16,10 @@ void __init imx_check_clocks(struct clk *clks[], unsigned int count)
i, PTR_ERR(clks[i]));
}
-static struct clk * __init imx_obtain_fixed_clock_from_dt(const char *name)
+static struct clk_core * __init imx_obtain_fixed_clock_from_dt(const char *name)
{
struct of_phandle_args phandle;
- struct clk *clk = ERR_PTR(-ENODEV);
+ struct clk_core *clk = ERR_PTR(-ENODEV);
char *path;
path = kasprintf(GFP_KERNEL, "/clocks/%s", name);
@@ -37,10 +36,10 @@ static struct clk * __init imx_obtain_fixed_clock_from_dt(const char *name)
return clk;
}
-struct clk * __init imx_obtain_fixed_clock(
+struct clk_core * __init imx_obtain_fixed_clock(
const char *name, unsigned long rate)
{
- struct clk *clk;
+ struct clk_core *clk;
clk = imx_obtain_fixed_clock_from_dt(name);
if (IS_ERR(clk))
diff --git a/arch/arm/mach-imx/clk.h b/arch/arm/mach-imx/clk.h
index d5ba76f..0926889 100644
--- a/arch/arm/mach-imx/clk.h
+++ b/arch/arm/mach-imx/clk.h
@@ -6,14 +6,14 @@
extern spinlock_t imx_ccm_lock;
-void imx_check_clocks(struct clk *clks[], unsigned int count);
+void imx_check_clocks(struct clk_core *clks[], unsigned int count);
extern void imx_cscmr1_fixup(u32 *val);
-struct clk *imx_clk_pllv1(const char *name, const char *parent,
+struct clk_core *imx_clk_pllv1(const char *name, const char *parent,
void __iomem *base);
-struct clk *imx_clk_pllv2(const char *name, const char *parent,
+struct clk_core *imx_clk_pllv2(const char *name, const char *parent,
void __iomem *base);
enum imx_pllv3_type {
@@ -24,26 +24,26 @@ enum imx_pllv3_type {
IMX_PLLV3_ENET,
};
-struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
+struct clk_core *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
const char *parent_name, void __iomem *base, u32 div_mask);
-struct clk *clk_register_gate2(struct device *dev, const char *name,
+struct clk_core *clk_register_gate2(struct device *dev, const char *name,
const char *parent_name, unsigned long flags,
void __iomem *reg, u8 bit_idx,
u8 clk_gate_flags, spinlock_t *lock,
unsigned int *share_count);
-struct clk * imx_obtain_fixed_clock(
+struct clk_core * imx_obtain_fixed_clock(
const char *name, unsigned long rate);
-static inline struct clk *imx_clk_gate2(const char *name, const char *parent,
+static inline struct clk_core *imx_clk_gate2(const char *name, const char *parent,
void __iomem *reg, u8 shift)
{
return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
shift, 0, &imx_ccm_lock, NULL);
}
-static inline struct clk *imx_clk_gate2_shared(const char *name,
+static inline struct clk_core *imx_clk_gate2_shared(const char *name,
const char *parent, void __iomem *reg, u8 shift,
unsigned int *share_count)
{
@@ -51,38 +51,38 @@ static inline struct clk *imx_clk_gate2_shared(const char *name,
shift, 0, &imx_ccm_lock, share_count);
}
-struct clk *imx_clk_pfd(const char *name, const char *parent_name,
+struct clk_core *imx_clk_pfd(const char *name, const char *parent_name,
void __iomem *reg, u8 idx);
-struct clk *imx_clk_busy_divider(const char *name, const char *parent_name,
+struct clk_core *imx_clk_busy_divider(const char *name, const char *parent_name,
void __iomem *reg, u8 shift, u8 width,
void __iomem *busy_reg, u8 busy_shift);
-struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift,
+struct clk_core *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift,
u8 width, void __iomem *busy_reg, u8 busy_shift,
const char **parent_names, int num_parents);
-struct clk *imx_clk_fixup_divider(const char *name, const char *parent,
+struct clk_core *imx_clk_fixup_divider(const char *name, const char *parent,
void __iomem *reg, u8 shift, u8 width,
void (*fixup)(u32 *val));
-struct clk *imx_clk_fixup_mux(const char *name, void __iomem *reg,
+struct clk_core *imx_clk_fixup_mux(const char *name, void __iomem *reg,
u8 shift, u8 width, const char **parents,
int num_parents, void (*fixup)(u32 *val));
-static inline struct clk *imx_clk_fixed(const char *name, int rate)
+static inline struct clk_core *imx_clk_fixed(const char *name, int rate)
{
return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate);
}
-static inline struct clk *imx_clk_divider(const char *name, const char *parent,
+static inline struct clk_core *imx_clk_divider(const char *name, const char *parent,
void __iomem *reg, u8 shift, u8 width)
{
return clk_register_divider(NULL, name, parent, CLK_SET_RATE_PARENT,
reg, shift, width, 0, &imx_ccm_lock);
}
-static inline struct clk *imx_clk_divider_flags(const char *name,
+static inline struct clk_core *imx_clk_divider_flags(const char *name,
const char *parent, void __iomem *reg, u8 shift, u8 width,
unsigned long flags)
{
@@ -90,21 +90,21 @@ static inline struct clk *imx_clk_divider_flags(const char *name,
reg, shift, width, 0, &imx_ccm_lock);
}
-static inline struct clk *imx_clk_gate(const char *name, const char *parent,
+static inline struct clk_core *imx_clk_gate(const char *name, const char *parent,
void __iomem *reg, u8 shift)
{
return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
shift, 0, &imx_ccm_lock);
}
-static inline struct clk *imx_clk_gate_dis(const char *name, const char *parent,
+static inline struct clk_core *imx_clk_gate_dis(const char *name, const char *parent,
void __iomem *reg, u8 shift)
{
return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
shift, CLK_GATE_SET_TO_DISABLE, &imx_ccm_lock);
}
-static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg,
+static inline struct clk_core *imx_clk_mux(const char *name, void __iomem *reg,
u8 shift, u8 width, const char **parents, int num_parents)
{
return clk_register_mux(NULL, name, parents, num_parents,
@@ -112,7 +112,7 @@ static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg,
width, 0, &imx_ccm_lock);
}
-static inline struct clk *imx_clk_mux_flags(const char *name,
+static inline struct clk_core *imx_clk_mux_flags(const char *name,
void __iomem *reg, u8 shift, u8 width, const char **parents,
int num_parents, unsigned long flags)
{
@@ -121,7 +121,7 @@ static inline struct clk *imx_clk_mux_flags(const char *name,
&imx_ccm_lock);
}
-static inline struct clk *imx_clk_fixed_factor(const char *name,
+static inline struct clk_core *imx_clk_fixed_factor(const char *name,
const char *parent, unsigned int mult, unsigned int div)
{
return clk_register_fixed_factor(NULL, name, parent,
diff --git a/arch/arm/mach-msm/clock-pcom.c b/arch/arm/mach-msm/clock-pcom.c
index 9a80449..14352c4 100644
--- a/arch/arm/mach-msm/clock-pcom.c
+++ b/arch/arm/mach-msm/clock-pcom.c
@@ -132,7 +132,7 @@ static int msm_clock_pcom_probe(struct platform_device *pdev)
for (i = 0; i < pdata->num_lookups; i++) {
const struct clk_pcom_desc *desc = &pdata->lookup[i];
- struct clk *c;
+ struct clk_core *c;
struct clk_pcom *p;
struct clk_hw *hw;
struct clk_init_data init;
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
index e6ac679..fee2643 100644
--- a/arch/arm/mach-mv78xx0/common.c
+++ b/arch/arm/mach-mv78xx0/common.c
@@ -164,7 +164,7 @@ void __init mv78xx0_map_io(void)
/*****************************************************************************
* CLK tree
****************************************************************************/
-static struct clk *tclk;
+static struct clk_core *tclk;
static void __init clk_init(void)
{
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index 018353d..0f41427 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -551,7 +551,7 @@ static struct regulator_consumer_supply cm_t35_camera_supplies[] = {
static void __init cm_t35_init_camera(void)
{
- struct clk *clk;
+ struct clk_core *clk;
clk = clk_register_fixed_rate(NULL, "mt9t001-clkin", NULL, CLK_IS_ROOT,
48000000);
diff --git a/arch/arm/mach-omap2/cclock3xxx_data.c b/arch/arm/mach-omap2/cclock3xxx_data.c
index eb8c75e..1180abe 100644
--- a/arch/arm/mach-omap2/cclock3xxx_data.c
+++ b/arch/arm/mach-omap2/cclock3xxx_data.c
@@ -18,7 +18,6 @@
*/
#include <linux/kernel.h>
-#include <linux/clk.h>
#include <linux/clk-private.h>
#include <linux/list.h>
#include <linux/io.h>
@@ -107,7 +106,7 @@ static struct dpll_data dpll3_dd = {
.max_divider = OMAP3_MAX_DPLL_DIV,
};
-static struct clk dpll3_ck;
+static struct clk_core dpll3_ck;
static const char *dpll3_ck_parent_names[] = {
"sys_ck",
@@ -137,7 +136,7 @@ DEFINE_CLK_DIVIDER(dpll3_m2_ck, "dpll3_ck", &dpll3_ck, 0x0,
OMAP3430_CORE_DPLL_CLKOUT_DIV_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk core_ck;
+static struct clk_core core_ck;
static const char *core_ck_parent_names[] = {
"dpll3_m2_ck",
@@ -158,7 +157,7 @@ DEFINE_CLK_DIVIDER(l4_ick, "l3_ick", &l3_ick, 0x0,
OMAP3430_CLKSEL_L4_SHIFT, OMAP3430_CLKSEL_L4_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk security_l4_ick2;
+static struct clk_core security_l4_ick2;
static const char *security_l4_ick2_parent_names[] = {
"l4_ick",
@@ -167,7 +166,7 @@ static const char *security_l4_ick2_parent_names[] = {
DEFINE_STRUCT_CLK_HW_OMAP(security_l4_ick2, NULL);
DEFINE_STRUCT_CLK(security_l4_ick2, security_l4_ick2_parent_names, core_ck_ops);
-static struct clk aes1_ick;
+static struct clk_core aes1_ick;
static const char *aes1_ick_parent_names[] = {
"security_l4_ick2",
@@ -190,7 +189,7 @@ static struct clk_hw_omap aes1_ick_hw = {
DEFINE_STRUCT_CLK(aes1_ick, aes1_ick_parent_names, aes1_ick_ops);
-static struct clk core_l4_ick;
+static struct clk_core core_l4_ick;
static const struct clk_ops core_l4_ick_ops = {
.init = &omap2_init_clk_clkdm,
@@ -199,7 +198,7 @@ static const struct clk_ops core_l4_ick_ops = {
DEFINE_STRUCT_CLK_HW_OMAP(core_l4_ick, "core_l4_clkdm");
DEFINE_STRUCT_CLK(core_l4_ick, security_l4_ick2_parent_names, core_l4_ick_ops);
-static struct clk aes2_ick;
+static struct clk_core aes2_ick;
static const char *aes2_ick_parent_names[] = {
"core_l4_ick",
@@ -224,7 +223,7 @@ static struct clk_hw_omap aes2_ick_hw = {
DEFINE_STRUCT_CLK(aes2_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk dpll1_fck;
+static struct clk_core dpll1_fck;
static struct dpll_data dpll1_dd = {
.mult_div1_reg = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_CLKSEL1_PLL),
@@ -248,7 +247,7 @@ static struct dpll_data dpll1_dd = {
.max_divider = OMAP3_MAX_DPLL_DIV,
};
-static struct clk dpll1_ck;
+static struct clk_core dpll1_ck;
static const struct clk_ops dpll1_ck_ops = {
.init = &omap2_init_clk_clkdm,
@@ -279,7 +278,7 @@ DEFINE_CLK_DIVIDER(dpll1_x2m2_ck, "dpll1_x2_ck", &dpll1_x2_ck, 0x0,
OMAP3430_MPU_DPLL_CLKOUT_DIV_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk mpu_ck;
+static struct clk_core mpu_ck;
static const char *mpu_ck_parent_names[] = {
"dpll1_x2m2_ck",
@@ -293,7 +292,7 @@ DEFINE_CLK_DIVIDER(arm_fck, "mpu_ck", &mpu_ck, 0x0,
OMAP3430_ST_MPU_CLK_SHIFT, OMAP3430_ST_MPU_CLK_WIDTH,
0x0, NULL);
-static struct clk cam_ick;
+static struct clk_core cam_ick;
static struct clk_hw_omap cam_ick_hw = {
.hw = {
@@ -358,7 +357,7 @@ static struct dpll_data dpll4_dd_3630 __initdata = {
.flags = DPLL_J_TYPE
};
-static struct clk dpll4_ck;
+static struct clk_core dpll4_ck;
static const struct clk_ops dpll4_ck_ops = {
.init = &omap2_init_clk_clkdm,
@@ -422,7 +421,7 @@ DEFINE_CLK_DIVIDER(dpll4_m5_ck, "dpll4_ck", &dpll4_ck, 0x0,
OMAP3430_CLKSEL_CAM_SHIFT, OMAP3630_CLKSEL_CAM_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk dpll4_m5x2_ck;
+static struct clk_core dpll4_m5x2_ck;
static const char *dpll4_m5x2_ck_parent_names[] = {
"dpll4_m5_ck",
@@ -459,7 +458,7 @@ static struct clk_hw_omap dpll4_m5x2_ck_hw = {
DEFINE_STRUCT_CLK_FLAGS(dpll4_m5x2_ck, dpll4_m5x2_ck_parent_names,
dpll4_m5x2_ck_ops, CLK_SET_RATE_PARENT);
-static struct clk dpll4_m5x2_ck_3630 = {
+static struct clk_core dpll4_m5x2_ck_3630 = {
.name = "dpll4_m5x2_ck",
.hw = &dpll4_m5x2_ck_hw.hw,
.parent_names = dpll4_m5x2_ck_parent_names,
@@ -468,7 +467,7 @@ static struct clk dpll4_m5x2_ck_3630 = {
.flags = CLK_SET_RATE_PARENT,
};
-static struct clk cam_mclk;
+static struct clk_core cam_mclk;
static const char *cam_mclk_parent_names[] = {
"dpll4_m5x2_ck",
@@ -483,7 +482,7 @@ static struct clk_hw_omap cam_mclk_hw = {
.clkdm_name = "cam_clkdm",
};
-static struct clk cam_mclk = {
+static struct clk_core cam_mclk = {
.name = "cam_mclk",
.hw = &cam_mclk_hw.hw,
.parent_names = cam_mclk_parent_names,
@@ -512,7 +511,7 @@ DEFINE_CLK_DIVIDER(dpll4_m2_ck, "dpll4_ck", &dpll4_ck, 0x0,
OMAP3430_DIV_96M_SHIFT, OMAP3630_DIV_96M_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk dpll4_m2x2_ck;
+static struct clk_core dpll4_m2x2_ck;
static const char *dpll4_m2x2_ck_parent_names[] = {
"dpll4_m2_ck",
@@ -531,7 +530,7 @@ static struct clk_hw_omap dpll4_m2x2_ck_hw = {
DEFINE_STRUCT_CLK(dpll4_m2x2_ck, dpll4_m2x2_ck_parent_names, dpll4_m5x2_ck_ops);
-static struct clk dpll4_m2x2_ck_3630 = {
+static struct clk_core dpll4_m2x2_ck_3630 = {
.name = "dpll4_m2x2_ck",
.hw = &dpll4_m2x2_ck_hw.hw,
.parent_names = dpll4_m2x2_ck_parent_names,
@@ -539,7 +538,7 @@ static struct clk dpll4_m2x2_ck_3630 = {
.ops = &dpll4_m5x2_ck_3630_ops,
};
-static struct clk omap_96m_alwon_fck;
+static struct clk_core omap_96m_alwon_fck;
static const char *omap_96m_alwon_fck_parent_names[] = {
"dpll4_m2x2_ck",
@@ -549,7 +548,7 @@ DEFINE_STRUCT_CLK_HW_OMAP(omap_96m_alwon_fck, NULL);
DEFINE_STRUCT_CLK(omap_96m_alwon_fck, omap_96m_alwon_fck_parent_names,
core_ck_ops);
-static struct clk cm_96m_fck;
+static struct clk_core cm_96m_fck;
static const char *cm_96m_fck_parent_names[] = {
"omap_96m_alwon_fck",
@@ -568,7 +567,7 @@ DEFINE_CLK_DIVIDER_TABLE(dpll4_m3_ck, "dpll4_ck", &dpll4_ck, 0x0,
OMAP3430_CLKSEL_TV_SHIFT, OMAP3630_CLKSEL_TV_WIDTH,
0, dpll4_mx_ck_div_table, NULL);
-static struct clk dpll4_m3x2_ck;
+static struct clk_core dpll4_m3x2_ck;
static const char *dpll4_m3x2_ck_parent_names[] = {
"dpll4_m3_ck",
@@ -587,7 +586,7 @@ static struct clk_hw_omap dpll4_m3x2_ck_hw = {
DEFINE_STRUCT_CLK(dpll4_m3x2_ck, dpll4_m3x2_ck_parent_names, dpll4_m5x2_ck_ops);
-static struct clk dpll4_m3x2_ck_3630 = {
+static struct clk_core dpll4_m3x2_ck_3630 = {
.name = "dpll4_m3x2_ck",
.hw = &dpll4_m3x2_ck_hw.hw,
.parent_names = dpll4_m3x2_ck_parent_names,
@@ -651,7 +650,7 @@ static const char *omap_48m_fck_parent_names[] = {
"cm_96m_fck", "sys_altclk",
};
-static struct clk omap_48m_fck;
+static struct clk_core omap_48m_fck;
static const struct clk_ops omap_48m_fck_ops = {
.recalc_rate = &omap2_clksel_recalc,
@@ -672,7 +671,7 @@ DEFINE_STRUCT_CLK(omap_48m_fck, omap_48m_fck_parent_names, omap_48m_fck_ops);
DEFINE_CLK_FIXED_FACTOR(omap_12m_fck, "omap_48m_fck", &omap_48m_fck, 0x0, 1, 4);
-static struct clk core_12m_fck;
+static struct clk_core core_12m_fck;
static const char *core_12m_fck_parent_names[] = {
"omap_12m_fck",
@@ -681,7 +680,7 @@ static const char *core_12m_fck_parent_names[] = {
DEFINE_STRUCT_CLK_HW_OMAP(core_12m_fck, "core_l4_clkdm");
DEFINE_STRUCT_CLK(core_12m_fck, core_12m_fck_parent_names, core_l4_ick_ops);
-static struct clk core_48m_fck;
+static struct clk_core core_48m_fck;
static const char *core_48m_fck_parent_names[] = {
"omap_48m_fck",
@@ -698,7 +697,7 @@ DEFINE_CLK_MUX(omap_96m_fck, omap_96m_fck_parent_names, NULL, 0x0,
OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1),
OMAP3430_SOURCE_96M_SHIFT, OMAP3430_SOURCE_96M_WIDTH, 0x0, NULL);
-static struct clk core_96m_fck;
+static struct clk_core core_96m_fck;
static const char *core_96m_fck_parent_names[] = {
"omap_96m_fck",
@@ -707,7 +706,7 @@ static const char *core_96m_fck_parent_names[] = {
DEFINE_STRUCT_CLK_HW_OMAP(core_96m_fck, "core_l4_clkdm");
DEFINE_STRUCT_CLK(core_96m_fck, core_96m_fck_parent_names, core_l4_ick_ops);
-static struct clk core_l3_ick;
+static struct clk_core core_l3_ick;
static const char *core_l3_ick_parent_names[] = {
"l3_ick",
@@ -718,7 +717,7 @@ DEFINE_STRUCT_CLK(core_l3_ick, core_l3_ick_parent_names, core_l4_ick_ops);
DEFINE_CLK_FIXED_FACTOR(dpll3_m2x2_ck, "dpll3_m2_ck", &dpll3_m2_ck, 0x0, 2, 1);
-static struct clk corex2_fck;
+static struct clk_core corex2_fck;
static const char *corex2_fck_parent_names[] = {
"dpll3_m2x2_ck",
@@ -727,7 +726,7 @@ static const char *corex2_fck_parent_names[] = {
DEFINE_STRUCT_CLK_HW_OMAP(corex2_fck, NULL);
DEFINE_STRUCT_CLK(corex2_fck, corex2_fck_parent_names, core_ck_ops);
-static struct clk cpefuse_fck;
+static struct clk_core cpefuse_fck;
static struct clk_hw_omap cpefuse_fck_hw = {
.hw = {
@@ -740,7 +739,7 @@ static struct clk_hw_omap cpefuse_fck_hw = {
DEFINE_STRUCT_CLK(cpefuse_fck, dpll3_ck_parent_names, aes2_ick_ops);
-static struct clk csi2_96m_fck;
+static struct clk_core csi2_96m_fck;
static const char *csi2_96m_fck_parent_names[] = {
"core_96m_fck",
@@ -757,7 +756,7 @@ static struct clk_hw_omap csi2_96m_fck_hw = {
DEFINE_STRUCT_CLK(csi2_96m_fck, csi2_96m_fck_parent_names, aes2_ick_ops);
-static struct clk d2d_26m_fck;
+static struct clk_core d2d_26m_fck;
static struct clk_hw_omap d2d_26m_fck_hw = {
.hw = {
@@ -771,7 +770,7 @@ static struct clk_hw_omap d2d_26m_fck_hw = {
DEFINE_STRUCT_CLK(d2d_26m_fck, dpll3_ck_parent_names, aes2_ick_ops);
-static struct clk des1_ick;
+static struct clk_core des1_ick;
static struct clk_hw_omap des1_ick_hw = {
.hw = {
@@ -784,7 +783,7 @@ static struct clk_hw_omap des1_ick_hw = {
DEFINE_STRUCT_CLK(des1_ick, aes1_ick_parent_names, aes1_ick_ops);
-static struct clk des2_ick;
+static struct clk_core des2_ick;
static struct clk_hw_omap des2_ick_hw = {
.hw = {
@@ -803,7 +802,7 @@ DEFINE_CLK_DIVIDER(dpll1_fck, "core_ck", &core_ck, 0x0,
OMAP3430_MPU_CLK_SRC_SHIFT, OMAP3430_MPU_CLK_SRC_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk dpll2_fck;
+static struct clk_core dpll2_fck;
static struct dpll_data dpll2_dd = {
.mult_div1_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, OMAP3430_CM_CLKSEL1_PLL),
@@ -828,7 +827,7 @@ static struct dpll_data dpll2_dd = {
.max_divider = OMAP3_MAX_DPLL_DIV,
};
-static struct clk dpll2_ck;
+static struct clk_core dpll2_ck;
static struct clk_hw_omap dpll2_ck_hw = {
.hw = {
@@ -857,7 +856,7 @@ DEFINE_CLK_DIVIDER(dpll3_m3_ck, "dpll3_ck", &dpll3_ck, 0x0,
OMAP3430_DIV_DPLL3_SHIFT, OMAP3430_DIV_DPLL3_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk dpll3_m3x2_ck;
+static struct clk_core dpll3_m3x2_ck;
static const char *dpll3_m3x2_ck_parent_names[] = {
"dpll3_m3_ck",
@@ -876,7 +875,7 @@ static struct clk_hw_omap dpll3_m3x2_ck_hw = {
DEFINE_STRUCT_CLK(dpll3_m3x2_ck, dpll3_m3x2_ck_parent_names, dpll4_m5x2_ck_ops);
-static struct clk dpll3_m3x2_ck_3630 = {
+static struct clk_core dpll3_m3x2_ck_3630 = {
.name = "dpll3_m3x2_ck",
.hw = &dpll3_m3x2_ck_hw.hw,
.parent_names = dpll3_m3x2_ck_parent_names,
@@ -891,7 +890,7 @@ DEFINE_CLK_DIVIDER_TABLE(dpll4_m4_ck, "dpll4_ck", &dpll4_ck, 0x0,
OMAP3430_CLKSEL_DSS1_SHIFT, OMAP3630_CLKSEL_DSS1_WIDTH,
0, dpll4_mx_ck_div_table, NULL);
-static struct clk dpll4_m4x2_ck;
+static struct clk_core dpll4_m4x2_ck;
static const char *dpll4_m4x2_ck_parent_names[] = {
"dpll4_m4_ck",
@@ -911,7 +910,7 @@ static struct clk_hw_omap dpll4_m4x2_ck_hw = {
DEFINE_STRUCT_CLK_FLAGS(dpll4_m4x2_ck, dpll4_m4x2_ck_parent_names,
dpll4_m5x2_ck_ops, CLK_SET_RATE_PARENT);
-static struct clk dpll4_m4x2_ck_3630 = {
+static struct clk_core dpll4_m4x2_ck_3630 = {
.name = "dpll4_m4x2_ck",
.hw = &dpll4_m4x2_ck_hw.hw,
.parent_names = dpll4_m4x2_ck_parent_names,
@@ -925,7 +924,7 @@ DEFINE_CLK_DIVIDER(dpll4_m6_ck, "dpll4_ck", &dpll4_ck, 0x0,
OMAP3430_DIV_DPLL4_SHIFT, OMAP3630_DIV_DPLL4_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk dpll4_m6x2_ck;
+static struct clk_core dpll4_m6x2_ck;
static const char *dpll4_m6x2_ck_parent_names[] = {
"dpll4_m6_ck",
@@ -944,7 +943,7 @@ static struct clk_hw_omap dpll4_m6x2_ck_hw = {
DEFINE_STRUCT_CLK(dpll4_m6x2_ck, dpll4_m6x2_ck_parent_names, dpll4_m5x2_ck_ops);
-static struct clk dpll4_m6x2_ck_3630 = {
+static struct clk_core dpll4_m6x2_ck_3630 = {
.name = "dpll4_m6x2_ck",
.hw = &dpll4_m6x2_ck_hw.hw,
.parent_names = dpll4_m6x2_ck_parent_names,
@@ -976,7 +975,7 @@ static struct dpll_data dpll5_dd = {
.max_divider = OMAP3_MAX_DPLL_DIV,
};
-static struct clk dpll5_ck;
+static struct clk_core dpll5_ck;
static struct clk_hw_omap dpll5_ck_hw = {
.hw = {
@@ -994,7 +993,7 @@ DEFINE_CLK_DIVIDER(dpll5_m2_ck, "dpll5_ck", &dpll5_ck, 0x0,
OMAP3430ES2_DIV_120M_SHIFT, OMAP3430ES2_DIV_120M_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk dss1_alwon_fck_3430es1;
+static struct clk_core dss1_alwon_fck_3430es1;
static const char *dss1_alwon_fck_3430es1_parent_names[] = {
"dpll4_m4x2_ck",
@@ -1013,7 +1012,7 @@ DEFINE_STRUCT_CLK_FLAGS(dss1_alwon_fck_3430es1,
dss1_alwon_fck_3430es1_parent_names, aes2_ick_ops,
CLK_SET_RATE_PARENT);
-static struct clk dss1_alwon_fck_3430es2;
+static struct clk_core dss1_alwon_fck_3430es2;
static struct clk_hw_omap dss1_alwon_fck_3430es2_hw = {
.hw = {
@@ -1029,7 +1028,7 @@ DEFINE_STRUCT_CLK_FLAGS(dss1_alwon_fck_3430es2,
dss1_alwon_fck_3430es1_parent_names, aes2_ick_ops,
CLK_SET_RATE_PARENT);
-static struct clk dss2_alwon_fck;
+static struct clk_core dss2_alwon_fck;
static struct clk_hw_omap dss2_alwon_fck_hw = {
.hw = {
@@ -1042,7 +1041,7 @@ static struct clk_hw_omap dss2_alwon_fck_hw = {
DEFINE_STRUCT_CLK(dss2_alwon_fck, dpll3_ck_parent_names, aes2_ick_ops);
-static struct clk dss_96m_fck;
+static struct clk_core dss_96m_fck;
static struct clk_hw_omap dss_96m_fck_hw = {
.hw = {
@@ -1055,7 +1054,7 @@ static struct clk_hw_omap dss_96m_fck_hw = {
DEFINE_STRUCT_CLK(dss_96m_fck, core_96m_fck_parent_names, aes2_ick_ops);
-static struct clk dss_ick_3430es1;
+static struct clk_core dss_ick_3430es1;
static struct clk_hw_omap dss_ick_3430es1_hw = {
.hw = {
@@ -1069,7 +1068,7 @@ static struct clk_hw_omap dss_ick_3430es1_hw = {
DEFINE_STRUCT_CLK(dss_ick_3430es1, security_l4_ick2_parent_names, aes2_ick_ops);
-static struct clk dss_ick_3430es2;
+static struct clk_core dss_ick_3430es2;
static struct clk_hw_omap dss_ick_3430es2_hw = {
.hw = {
@@ -1083,7 +1082,7 @@ static struct clk_hw_omap dss_ick_3430es2_hw = {
DEFINE_STRUCT_CLK(dss_ick_3430es2, security_l4_ick2_parent_names, aes2_ick_ops);
-static struct clk dss_tv_fck;
+static struct clk_core dss_tv_fck;
static const char *dss_tv_fck_parent_names[] = {
"omap_54m_fck",
@@ -1100,7 +1099,7 @@ static struct clk_hw_omap dss_tv_fck_hw = {
DEFINE_STRUCT_CLK(dss_tv_fck, dss_tv_fck_parent_names, aes2_ick_ops);
-static struct clk emac_fck;
+static struct clk_core emac_fck;
static const char *emac_fck_parent_names[] = {
"rmii_ck",
@@ -1116,7 +1115,7 @@ static struct clk_hw_omap emac_fck_hw = {
DEFINE_STRUCT_CLK(emac_fck, emac_fck_parent_names, aes1_ick_ops);
-static struct clk ipss_ick;
+static struct clk_core ipss_ick;
static const char *ipss_ick_parent_names[] = {
"core_l3_ick",
@@ -1134,7 +1133,7 @@ static struct clk_hw_omap ipss_ick_hw = {
DEFINE_STRUCT_CLK(ipss_ick, ipss_ick_parent_names, aes2_ick_ops);
-static struct clk emac_ick;
+static struct clk_core emac_ick;
static const char *emac_ick_parent_names[] = {
"ipss_ick",
@@ -1152,7 +1151,7 @@ static struct clk_hw_omap emac_ick_hw = {
DEFINE_STRUCT_CLK(emac_ick, emac_ick_parent_names, aes2_ick_ops);
-static struct clk emu_core_alwon_ck;
+static struct clk_core emu_core_alwon_ck;
static const char *emu_core_alwon_ck_parent_names[] = {
"dpll3_m3x2_ck",
@@ -1162,7 +1161,7 @@ DEFINE_STRUCT_CLK_HW_OMAP(emu_core_alwon_ck, "dpll3_clkdm");
DEFINE_STRUCT_CLK(emu_core_alwon_ck, emu_core_alwon_ck_parent_names,
core_l4_ick_ops);
-static struct clk emu_mpu_alwon_ck;
+static struct clk_core emu_mpu_alwon_ck;
static const char *emu_mpu_alwon_ck_parent_names[] = {
"mpu_ck",
@@ -1171,7 +1170,7 @@ static const char *emu_mpu_alwon_ck_parent_names[] = {
DEFINE_STRUCT_CLK_HW_OMAP(emu_mpu_alwon_ck, NULL);
DEFINE_STRUCT_CLK(emu_mpu_alwon_ck, emu_mpu_alwon_ck_parent_names, core_ck_ops);
-static struct clk emu_per_alwon_ck;
+static struct clk_core emu_per_alwon_ck;
static const char *emu_per_alwon_ck_parent_names[] = {
"dpll4_m6x2_ck",
@@ -1222,7 +1221,7 @@ static const struct clk_ops emu_src_ck_ops = {
.disable = &omap2_clkops_disable_clkdm,
};
-static struct clk emu_src_ck;
+static struct clk_core emu_src_ck;
static struct clk_hw_omap emu_src_ck_hw = {
.hw = {
@@ -1241,7 +1240,7 @@ DEFINE_CLK_DIVIDER(atclk_fck, "emu_src_ck", &emu_src_ck, 0x0,
OMAP3430_CLKSEL_ATCLK_SHIFT, OMAP3430_CLKSEL_ATCLK_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk fac_ick;
+static struct clk_core fac_ick;
static struct clk_hw_omap fac_ick_hw = {
.hw = {
@@ -1255,7 +1254,7 @@ static struct clk_hw_omap fac_ick_hw = {
DEFINE_STRUCT_CLK(fac_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk fshostusb_fck;
+static struct clk_core fshostusb_fck;
static const char *fshostusb_fck_parent_names[] = {
"core_48m_fck",
@@ -1273,7 +1272,7 @@ static struct clk_hw_omap fshostusb_fck_hw = {
DEFINE_STRUCT_CLK(fshostusb_fck, fshostusb_fck_parent_names, aes2_ick_ops);
-static struct clk gfx_l3_ck;
+static struct clk_core gfx_l3_ck;
static struct clk_hw_omap gfx_l3_ck_hw = {
.hw = {
@@ -1292,7 +1291,7 @@ DEFINE_CLK_DIVIDER(gfx_l3_fck, "l3_ick", &l3_ick, 0x0,
OMAP_CLKSEL_GFX_SHIFT, OMAP_CLKSEL_GFX_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk gfx_cg1_ck;
+static struct clk_core gfx_cg1_ck;
static const char *gfx_cg1_ck_parent_names[] = {
"gfx_l3_fck",
@@ -1310,7 +1309,7 @@ static struct clk_hw_omap gfx_cg1_ck_hw = {
DEFINE_STRUCT_CLK(gfx_cg1_ck, gfx_cg1_ck_parent_names, aes2_ick_ops);
-static struct clk gfx_cg2_ck;
+static struct clk_core gfx_cg2_ck;
static struct clk_hw_omap gfx_cg2_ck_hw = {
.hw = {
@@ -1324,7 +1323,7 @@ static struct clk_hw_omap gfx_cg2_ck_hw = {
DEFINE_STRUCT_CLK(gfx_cg2_ck, gfx_cg1_ck_parent_names, aes2_ick_ops);
-static struct clk gfx_l3_ick;
+static struct clk_core gfx_l3_ick;
static const char *gfx_l3_ick_parent_names[] = {
"gfx_l3_ck",
@@ -1333,7 +1332,7 @@ static const char *gfx_l3_ick_parent_names[] = {
DEFINE_STRUCT_CLK_HW_OMAP(gfx_l3_ick, "gfx_3430es1_clkdm");
DEFINE_STRUCT_CLK(gfx_l3_ick, gfx_l3_ick_parent_names, core_l4_ick_ops);
-static struct clk wkup_32k_fck;
+static struct clk_core wkup_32k_fck;
static const char *wkup_32k_fck_parent_names[] = {
"omap_32k_fck",
@@ -1342,7 +1341,7 @@ static const char *wkup_32k_fck_parent_names[] = {
DEFINE_STRUCT_CLK_HW_OMAP(wkup_32k_fck, "wkup_clkdm");
DEFINE_STRUCT_CLK(wkup_32k_fck, wkup_32k_fck_parent_names, core_l4_ick_ops);
-static struct clk gpio1_dbck;
+static struct clk_core gpio1_dbck;
static const char *gpio1_dbck_parent_names[] = {
"wkup_32k_fck",
@@ -1359,12 +1358,12 @@ static struct clk_hw_omap gpio1_dbck_hw = {
DEFINE_STRUCT_CLK(gpio1_dbck, gpio1_dbck_parent_names, aes2_ick_ops);
-static struct clk wkup_l4_ick;
+static struct clk_core wkup_l4_ick;
DEFINE_STRUCT_CLK_HW_OMAP(wkup_l4_ick, "wkup_clkdm");
DEFINE_STRUCT_CLK(wkup_l4_ick, dpll3_ck_parent_names, core_l4_ick_ops);
-static struct clk gpio1_ick;
+static struct clk_core gpio1_ick;
static const char *gpio1_ick_parent_names[] = {
"wkup_l4_ick",
@@ -1382,13 +1381,13 @@ static struct clk_hw_omap gpio1_ick_hw = {
DEFINE_STRUCT_CLK(gpio1_ick, gpio1_ick_parent_names, aes2_ick_ops);
-static struct clk per_32k_alwon_fck;
+static struct clk_core per_32k_alwon_fck;
DEFINE_STRUCT_CLK_HW_OMAP(per_32k_alwon_fck, "per_clkdm");
DEFINE_STRUCT_CLK(per_32k_alwon_fck, wkup_32k_fck_parent_names,
core_l4_ick_ops);
-static struct clk gpio2_dbck;
+static struct clk_core gpio2_dbck;
static const char *gpio2_dbck_parent_names[] = {
"per_32k_alwon_fck",
@@ -1405,12 +1404,12 @@ static struct clk_hw_omap gpio2_dbck_hw = {
DEFINE_STRUCT_CLK(gpio2_dbck, gpio2_dbck_parent_names, aes2_ick_ops);
-static struct clk per_l4_ick;
+static struct clk_core per_l4_ick;
DEFINE_STRUCT_CLK_HW_OMAP(per_l4_ick, "per_clkdm");
DEFINE_STRUCT_CLK(per_l4_ick, security_l4_ick2_parent_names, core_l4_ick_ops);
-static struct clk gpio2_ick;
+static struct clk_core gpio2_ick;
static const char *gpio2_ick_parent_names[] = {
"per_l4_ick",
@@ -1428,7 +1427,7 @@ static struct clk_hw_omap gpio2_ick_hw = {
DEFINE_STRUCT_CLK(gpio2_ick, gpio2_ick_parent_names, aes2_ick_ops);
-static struct clk gpio3_dbck;
+static struct clk_core gpio3_dbck;
static struct clk_hw_omap gpio3_dbck_hw = {
.hw = {
@@ -1441,7 +1440,7 @@ static struct clk_hw_omap gpio3_dbck_hw = {
DEFINE_STRUCT_CLK(gpio3_dbck, gpio2_dbck_parent_names, aes2_ick_ops);
-static struct clk gpio3_ick;
+static struct clk_core gpio3_ick;
static struct clk_hw_omap gpio3_ick_hw = {
.hw = {
@@ -1455,7 +1454,7 @@ static struct clk_hw_omap gpio3_ick_hw = {
DEFINE_STRUCT_CLK(gpio3_ick, gpio2_ick_parent_names, aes2_ick_ops);
-static struct clk gpio4_dbck;
+static struct clk_core gpio4_dbck;
static struct clk_hw_omap gpio4_dbck_hw = {
.hw = {
@@ -1468,7 +1467,7 @@ static struct clk_hw_omap gpio4_dbck_hw = {
DEFINE_STRUCT_CLK(gpio4_dbck, gpio2_dbck_parent_names, aes2_ick_ops);
-static struct clk gpio4_ick;
+static struct clk_core gpio4_ick;
static struct clk_hw_omap gpio4_ick_hw = {
.hw = {
@@ -1482,7 +1481,7 @@ static struct clk_hw_omap gpio4_ick_hw = {
DEFINE_STRUCT_CLK(gpio4_ick, gpio2_ick_parent_names, aes2_ick_ops);
-static struct clk gpio5_dbck;
+static struct clk_core gpio5_dbck;
static struct clk_hw_omap gpio5_dbck_hw = {
.hw = {
@@ -1495,7 +1494,7 @@ static struct clk_hw_omap gpio5_dbck_hw = {
DEFINE_STRUCT_CLK(gpio5_dbck, gpio2_dbck_parent_names, aes2_ick_ops);
-static struct clk gpio5_ick;
+static struct clk_core gpio5_ick;
static struct clk_hw_omap gpio5_ick_hw = {
.hw = {
@@ -1509,7 +1508,7 @@ static struct clk_hw_omap gpio5_ick_hw = {
DEFINE_STRUCT_CLK(gpio5_ick, gpio2_ick_parent_names, aes2_ick_ops);
-static struct clk gpio6_dbck;
+static struct clk_core gpio6_dbck;
static struct clk_hw_omap gpio6_dbck_hw = {
.hw = {
@@ -1522,7 +1521,7 @@ static struct clk_hw_omap gpio6_dbck_hw = {
DEFINE_STRUCT_CLK(gpio6_dbck, gpio2_dbck_parent_names, aes2_ick_ops);
-static struct clk gpio6_ick;
+static struct clk_core gpio6_ick;
static struct clk_hw_omap gpio6_ick_hw = {
.hw = {
@@ -1536,7 +1535,7 @@ static struct clk_hw_omap gpio6_ick_hw = {
DEFINE_STRUCT_CLK(gpio6_ick, gpio2_ick_parent_names, aes2_ick_ops);
-static struct clk gpmc_fck;
+static struct clk_core gpmc_fck;
static struct clk_hw_omap gpmc_fck_hw = {
.hw = {
@@ -1565,7 +1564,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt10_fck, "core_l4_clkdm", omap343x_gpt_clksel,
OMAP3430_EN_GPT10_SHIFT, &clkhwops_wait,
gpt10_fck_parent_names, clkout2_src_ck_ops);
-static struct clk gpt10_ick;
+static struct clk_core gpt10_ick;
static struct clk_hw_omap gpt10_ick_hw = {
.hw = {
@@ -1586,7 +1585,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt11_fck, "core_l4_clkdm", omap343x_gpt_clksel,
OMAP3430_EN_GPT11_SHIFT, &clkhwops_wait,
gpt10_fck_parent_names, clkout2_src_ck_ops);
-static struct clk gpt11_ick;
+static struct clk_core gpt11_ick;
static struct clk_hw_omap gpt11_ick_hw = {
.hw = {
@@ -1600,7 +1599,7 @@ static struct clk_hw_omap gpt11_ick_hw = {
DEFINE_STRUCT_CLK(gpt11_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk gpt12_fck;
+static struct clk_core gpt12_fck;
static const char *gpt12_fck_parent_names[] = {
"secure_32k_fck",
@@ -1609,7 +1608,7 @@ static const char *gpt12_fck_parent_names[] = {
DEFINE_STRUCT_CLK_HW_OMAP(gpt12_fck, "wkup_clkdm");
DEFINE_STRUCT_CLK(gpt12_fck, gpt12_fck_parent_names, core_l4_ick_ops);
-static struct clk gpt12_ick;
+static struct clk_core gpt12_ick;
static struct clk_hw_omap gpt12_ick_hw = {
.hw = {
@@ -1630,7 +1629,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt1_fck, "wkup_clkdm", omap343x_gpt_clksel,
OMAP3430_EN_GPT1_SHIFT, &clkhwops_wait,
gpt10_fck_parent_names, clkout2_src_ck_ops);
-static struct clk gpt1_ick;
+static struct clk_core gpt1_ick;
static struct clk_hw_omap gpt1_ick_hw = {
.hw = {
@@ -1651,7 +1650,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt2_fck, "per_clkdm", omap343x_gpt_clksel,
OMAP3430_EN_GPT2_SHIFT, &clkhwops_wait,
gpt10_fck_parent_names, clkout2_src_ck_ops);
-static struct clk gpt2_ick;
+static struct clk_core gpt2_ick;
static struct clk_hw_omap gpt2_ick_hw = {
.hw = {
@@ -1672,7 +1671,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt3_fck, "per_clkdm", omap343x_gpt_clksel,
OMAP3430_EN_GPT3_SHIFT, &clkhwops_wait,
gpt10_fck_parent_names, clkout2_src_ck_ops);
-static struct clk gpt3_ick;
+static struct clk_core gpt3_ick;
static struct clk_hw_omap gpt3_ick_hw = {
.hw = {
@@ -1693,7 +1692,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt4_fck, "per_clkdm", omap343x_gpt_clksel,
OMAP3430_EN_GPT4_SHIFT, &clkhwops_wait,
gpt10_fck_parent_names, clkout2_src_ck_ops);
-static struct clk gpt4_ick;
+static struct clk_core gpt4_ick;
static struct clk_hw_omap gpt4_ick_hw = {
.hw = {
@@ -1714,7 +1713,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt5_fck, "per_clkdm", omap343x_gpt_clksel,
OMAP3430_EN_GPT5_SHIFT, &clkhwops_wait,
gpt10_fck_parent_names, clkout2_src_ck_ops);
-static struct clk gpt5_ick;
+static struct clk_core gpt5_ick;
static struct clk_hw_omap gpt5_ick_hw = {
.hw = {
@@ -1735,7 +1734,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt6_fck, "per_clkdm", omap343x_gpt_clksel,
OMAP3430_EN_GPT6_SHIFT, &clkhwops_wait,
gpt10_fck_parent_names, clkout2_src_ck_ops);
-static struct clk gpt6_ick;
+static struct clk_core gpt6_ick;
static struct clk_hw_omap gpt6_ick_hw = {
.hw = {
@@ -1756,7 +1755,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt7_fck, "per_clkdm", omap343x_gpt_clksel,
OMAP3430_EN_GPT7_SHIFT, &clkhwops_wait,
gpt10_fck_parent_names, clkout2_src_ck_ops);
-static struct clk gpt7_ick;
+static struct clk_core gpt7_ick;
static struct clk_hw_omap gpt7_ick_hw = {
.hw = {
@@ -1777,7 +1776,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt8_fck, "per_clkdm", omap343x_gpt_clksel,
OMAP3430_EN_GPT8_SHIFT, &clkhwops_wait,
gpt10_fck_parent_names, clkout2_src_ck_ops);
-static struct clk gpt8_ick;
+static struct clk_core gpt8_ick;
static struct clk_hw_omap gpt8_ick_hw = {
.hw = {
@@ -1798,7 +1797,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt9_fck, "per_clkdm", omap343x_gpt_clksel,
OMAP3430_EN_GPT9_SHIFT, &clkhwops_wait,
gpt10_fck_parent_names, clkout2_src_ck_ops);
-static struct clk gpt9_ick;
+static struct clk_core gpt9_ick;
static struct clk_hw_omap gpt9_ick_hw = {
.hw = {
@@ -1812,7 +1811,7 @@ static struct clk_hw_omap gpt9_ick_hw = {
DEFINE_STRUCT_CLK(gpt9_ick, gpio2_ick_parent_names, aes2_ick_ops);
-static struct clk hdq_fck;
+static struct clk_core hdq_fck;
static const char *hdq_fck_parent_names[] = {
"core_12m_fck",
@@ -1830,7 +1829,7 @@ static struct clk_hw_omap hdq_fck_hw = {
DEFINE_STRUCT_CLK(hdq_fck, hdq_fck_parent_names, aes2_ick_ops);
-static struct clk hdq_ick;
+static struct clk_core hdq_ick;
static struct clk_hw_omap hdq_ick_hw = {
.hw = {
@@ -1844,7 +1843,7 @@ static struct clk_hw_omap hdq_ick_hw = {
DEFINE_STRUCT_CLK(hdq_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk hecc_ck;
+static struct clk_core hecc_ck;
static struct clk_hw_omap hecc_ck_hw = {
.hw = {
@@ -1858,7 +1857,7 @@ static struct clk_hw_omap hecc_ck_hw = {
DEFINE_STRUCT_CLK(hecc_ck, dpll3_ck_parent_names, aes2_ick_ops);
-static struct clk hsotgusb_fck_am35xx;
+static struct clk_core hsotgusb_fck_am35xx;
static struct clk_hw_omap hsotgusb_fck_am35xx_hw = {
.hw = {
@@ -1871,7 +1870,7 @@ static struct clk_hw_omap hsotgusb_fck_am35xx_hw = {
DEFINE_STRUCT_CLK(hsotgusb_fck_am35xx, dpll3_ck_parent_names, aes2_ick_ops);
-static struct clk hsotgusb_ick_3430es1;
+static struct clk_core hsotgusb_ick_3430es1;
static struct clk_hw_omap hsotgusb_ick_3430es1_hw = {
.hw = {
@@ -1885,7 +1884,7 @@ static struct clk_hw_omap hsotgusb_ick_3430es1_hw = {
DEFINE_STRUCT_CLK(hsotgusb_ick_3430es1, ipss_ick_parent_names, aes2_ick_ops);
-static struct clk hsotgusb_ick_3430es2;
+static struct clk_core hsotgusb_ick_3430es2;
static struct clk_hw_omap hsotgusb_ick_3430es2_hw = {
.hw = {
@@ -1899,7 +1898,7 @@ static struct clk_hw_omap hsotgusb_ick_3430es2_hw = {
DEFINE_STRUCT_CLK(hsotgusb_ick_3430es2, ipss_ick_parent_names, aes2_ick_ops);
-static struct clk hsotgusb_ick_am35xx;
+static struct clk_core hsotgusb_ick_am35xx;
static struct clk_hw_omap hsotgusb_ick_am35xx_hw = {
.hw = {
@@ -1913,7 +1912,7 @@ static struct clk_hw_omap hsotgusb_ick_am35xx_hw = {
DEFINE_STRUCT_CLK(hsotgusb_ick_am35xx, emac_ick_parent_names, aes2_ick_ops);
-static struct clk i2c1_fck;
+static struct clk_core i2c1_fck;
static struct clk_hw_omap i2c1_fck_hw = {
.hw = {
@@ -1927,7 +1926,7 @@ static struct clk_hw_omap i2c1_fck_hw = {
DEFINE_STRUCT_CLK(i2c1_fck, csi2_96m_fck_parent_names, aes2_ick_ops);
-static struct clk i2c1_ick;
+static struct clk_core i2c1_ick;
static struct clk_hw_omap i2c1_ick_hw = {
.hw = {
@@ -1941,7 +1940,7 @@ static struct clk_hw_omap i2c1_ick_hw = {
DEFINE_STRUCT_CLK(i2c1_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk i2c2_fck;
+static struct clk_core i2c2_fck;
static struct clk_hw_omap i2c2_fck_hw = {
.hw = {
@@ -1955,7 +1954,7 @@ static struct clk_hw_omap i2c2_fck_hw = {
DEFINE_STRUCT_CLK(i2c2_fck, csi2_96m_fck_parent_names, aes2_ick_ops);
-static struct clk i2c2_ick;
+static struct clk_core i2c2_ick;
static struct clk_hw_omap i2c2_ick_hw = {
.hw = {
@@ -1969,7 +1968,7 @@ static struct clk_hw_omap i2c2_ick_hw = {
DEFINE_STRUCT_CLK(i2c2_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk i2c3_fck;
+static struct clk_core i2c3_fck;
static struct clk_hw_omap i2c3_fck_hw = {
.hw = {
@@ -1983,7 +1982,7 @@ static struct clk_hw_omap i2c3_fck_hw = {
DEFINE_STRUCT_CLK(i2c3_fck, csi2_96m_fck_parent_names, aes2_ick_ops);
-static struct clk i2c3_ick;
+static struct clk_core i2c3_ick;
static struct clk_hw_omap i2c3_ick_hw = {
.hw = {
@@ -1997,7 +1996,7 @@ static struct clk_hw_omap i2c3_ick_hw = {
DEFINE_STRUCT_CLK(i2c3_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk icr_ick;
+static struct clk_core icr_ick;
static struct clk_hw_omap icr_ick_hw = {
.hw = {
@@ -2011,7 +2010,7 @@ static struct clk_hw_omap icr_ick_hw = {
DEFINE_STRUCT_CLK(icr_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk iva2_ck;
+static struct clk_core iva2_ck;
static const char *iva2_ck_parent_names[] = {
"dpll2_m2_ck",
@@ -2029,7 +2028,7 @@ static struct clk_hw_omap iva2_ck_hw = {
DEFINE_STRUCT_CLK(iva2_ck, iva2_ck_parent_names, aes2_ick_ops);
-static struct clk mad2d_ick;
+static struct clk_core mad2d_ick;
static struct clk_hw_omap mad2d_ick_hw = {
.hw = {
@@ -2043,7 +2042,7 @@ static struct clk_hw_omap mad2d_ick_hw = {
DEFINE_STRUCT_CLK(mad2d_ick, core_l3_ick_parent_names, aes2_ick_ops);
-static struct clk mailboxes_ick;
+static struct clk_core mailboxes_ick;
static struct clk_hw_omap mailboxes_ick_hw = {
.hw = {
@@ -2084,7 +2083,7 @@ DEFINE_CLK_OMAP_MUX_GATE(mcbsp1_fck, "core_l4_clkdm", mcbsp_15_clksel,
OMAP3430_EN_MCBSP1_SHIFT, &clkhwops_wait,
mcbsp1_fck_parent_names, clkout2_src_ck_ops);
-static struct clk mcbsp1_ick;
+static struct clk_core mcbsp1_ick;
static struct clk_hw_omap mcbsp1_ick_hw = {
.hw = {
@@ -2098,7 +2097,7 @@ static struct clk_hw_omap mcbsp1_ick_hw = {
DEFINE_STRUCT_CLK(mcbsp1_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk per_96m_fck;
+static struct clk_core per_96m_fck;
DEFINE_STRUCT_CLK_HW_OMAP(per_96m_fck, "per_clkdm");
DEFINE_STRUCT_CLK(per_96m_fck, cm_96m_fck_parent_names, core_l4_ick_ops);
@@ -2120,7 +2119,7 @@ DEFINE_CLK_OMAP_MUX_GATE(mcbsp2_fck, "per_clkdm", mcbsp_234_clksel,
OMAP3430_EN_MCBSP2_SHIFT, &clkhwops_wait,
mcbsp2_fck_parent_names, clkout2_src_ck_ops);
-static struct clk mcbsp2_ick;
+static struct clk_core mcbsp2_ick;
static struct clk_hw_omap mcbsp2_ick_hw = {
.hw = {
@@ -2141,7 +2140,7 @@ DEFINE_CLK_OMAP_MUX_GATE(mcbsp3_fck, "per_clkdm", mcbsp_234_clksel,
OMAP3430_EN_MCBSP3_SHIFT, &clkhwops_wait,
mcbsp2_fck_parent_names, clkout2_src_ck_ops);
-static struct clk mcbsp3_ick;
+static struct clk_core mcbsp3_ick;
static struct clk_hw_omap mcbsp3_ick_hw = {
.hw = {
@@ -2162,7 +2161,7 @@ DEFINE_CLK_OMAP_MUX_GATE(mcbsp4_fck, "per_clkdm", mcbsp_234_clksel,
OMAP3430_EN_MCBSP4_SHIFT, &clkhwops_wait,
mcbsp2_fck_parent_names, clkout2_src_ck_ops);
-static struct clk mcbsp4_ick;
+static struct clk_core mcbsp4_ick;
static struct clk_hw_omap mcbsp4_ick_hw = {
.hw = {
@@ -2183,7 +2182,7 @@ DEFINE_CLK_OMAP_MUX_GATE(mcbsp5_fck, "core_l4_clkdm", mcbsp_15_clksel,
OMAP3430_EN_MCBSP5_SHIFT, &clkhwops_wait,
mcbsp1_fck_parent_names, clkout2_src_ck_ops);
-static struct clk mcbsp5_ick;
+static struct clk_core mcbsp5_ick;
static struct clk_hw_omap mcbsp5_ick_hw = {
.hw = {
@@ -2197,7 +2196,7 @@ static struct clk_hw_omap mcbsp5_ick_hw = {
DEFINE_STRUCT_CLK(mcbsp5_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk mcspi1_fck;
+static struct clk_core mcspi1_fck;
static struct clk_hw_omap mcspi1_fck_hw = {
.hw = {
@@ -2211,7 +2210,7 @@ static struct clk_hw_omap mcspi1_fck_hw = {
DEFINE_STRUCT_CLK(mcspi1_fck, fshostusb_fck_parent_names, aes2_ick_ops);
-static struct clk mcspi1_ick;
+static struct clk_core mcspi1_ick;
static struct clk_hw_omap mcspi1_ick_hw = {
.hw = {
@@ -2225,7 +2224,7 @@ static struct clk_hw_omap mcspi1_ick_hw = {
DEFINE_STRUCT_CLK(mcspi1_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk mcspi2_fck;
+static struct clk_core mcspi2_fck;
static struct clk_hw_omap mcspi2_fck_hw = {
.hw = {
@@ -2239,7 +2238,7 @@ static struct clk_hw_omap mcspi2_fck_hw = {
DEFINE_STRUCT_CLK(mcspi2_fck, fshostusb_fck_parent_names, aes2_ick_ops);
-static struct clk mcspi2_ick;
+static struct clk_core mcspi2_ick;
static struct clk_hw_omap mcspi2_ick_hw = {
.hw = {
@@ -2253,7 +2252,7 @@ static struct clk_hw_omap mcspi2_ick_hw = {
DEFINE_STRUCT_CLK(mcspi2_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk mcspi3_fck;
+static struct clk_core mcspi3_fck;
static struct clk_hw_omap mcspi3_fck_hw = {
.hw = {
@@ -2267,7 +2266,7 @@ static struct clk_hw_omap mcspi3_fck_hw = {
DEFINE_STRUCT_CLK(mcspi3_fck, fshostusb_fck_parent_names, aes2_ick_ops);
-static struct clk mcspi3_ick;
+static struct clk_core mcspi3_ick;
static struct clk_hw_omap mcspi3_ick_hw = {
.hw = {
@@ -2281,7 +2280,7 @@ static struct clk_hw_omap mcspi3_ick_hw = {
DEFINE_STRUCT_CLK(mcspi3_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk mcspi4_fck;
+static struct clk_core mcspi4_fck;
static struct clk_hw_omap mcspi4_fck_hw = {
.hw = {
@@ -2295,7 +2294,7 @@ static struct clk_hw_omap mcspi4_fck_hw = {
DEFINE_STRUCT_CLK(mcspi4_fck, fshostusb_fck_parent_names, aes2_ick_ops);
-static struct clk mcspi4_ick;
+static struct clk_core mcspi4_ick;
static struct clk_hw_omap mcspi4_ick_hw = {
.hw = {
@@ -2309,7 +2308,7 @@ static struct clk_hw_omap mcspi4_ick_hw = {
DEFINE_STRUCT_CLK(mcspi4_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk mmchs1_fck;
+static struct clk_core mmchs1_fck;
static struct clk_hw_omap mmchs1_fck_hw = {
.hw = {
@@ -2323,7 +2322,7 @@ static struct clk_hw_omap mmchs1_fck_hw = {
DEFINE_STRUCT_CLK(mmchs1_fck, csi2_96m_fck_parent_names, aes2_ick_ops);
-static struct clk mmchs1_ick;
+static struct clk_core mmchs1_ick;
static struct clk_hw_omap mmchs1_ick_hw = {
.hw = {
@@ -2337,7 +2336,7 @@ static struct clk_hw_omap mmchs1_ick_hw = {
DEFINE_STRUCT_CLK(mmchs1_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk mmchs2_fck;
+static struct clk_core mmchs2_fck;
static struct clk_hw_omap mmchs2_fck_hw = {
.hw = {
@@ -2351,7 +2350,7 @@ static struct clk_hw_omap mmchs2_fck_hw = {
DEFINE_STRUCT_CLK(mmchs2_fck, csi2_96m_fck_parent_names, aes2_ick_ops);
-static struct clk mmchs2_ick;
+static struct clk_core mmchs2_ick;
static struct clk_hw_omap mmchs2_ick_hw = {
.hw = {
@@ -2365,7 +2364,7 @@ static struct clk_hw_omap mmchs2_ick_hw = {
DEFINE_STRUCT_CLK(mmchs2_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk mmchs3_fck;
+static struct clk_core mmchs3_fck;
static struct clk_hw_omap mmchs3_fck_hw = {
.hw = {
@@ -2379,7 +2378,7 @@ static struct clk_hw_omap mmchs3_fck_hw = {
DEFINE_STRUCT_CLK(mmchs3_fck, csi2_96m_fck_parent_names, aes2_ick_ops);
-static struct clk mmchs3_ick;
+static struct clk_core mmchs3_ick;
static struct clk_hw_omap mmchs3_ick_hw = {
.hw = {
@@ -2393,7 +2392,7 @@ static struct clk_hw_omap mmchs3_ick_hw = {
DEFINE_STRUCT_CLK(mmchs3_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk modem_fck;
+static struct clk_core modem_fck;
static struct clk_hw_omap modem_fck_hw = {
.hw = {
@@ -2407,7 +2406,7 @@ static struct clk_hw_omap modem_fck_hw = {
DEFINE_STRUCT_CLK(modem_fck, dpll3_ck_parent_names, aes2_ick_ops);
-static struct clk mspro_fck;
+static struct clk_core mspro_fck;
static struct clk_hw_omap mspro_fck_hw = {
.hw = {
@@ -2421,7 +2420,7 @@ static struct clk_hw_omap mspro_fck_hw = {
DEFINE_STRUCT_CLK(mspro_fck, csi2_96m_fck_parent_names, aes2_ick_ops);
-static struct clk mspro_ick;
+static struct clk_core mspro_ick;
static struct clk_hw_omap mspro_ick_hw = {
.hw = {
@@ -2435,13 +2434,13 @@ static struct clk_hw_omap mspro_ick_hw = {
DEFINE_STRUCT_CLK(mspro_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk omap_192m_alwon_fck;
+static struct clk_core omap_192m_alwon_fck;
DEFINE_STRUCT_CLK_HW_OMAP(omap_192m_alwon_fck, NULL);
DEFINE_STRUCT_CLK(omap_192m_alwon_fck, omap_96m_alwon_fck_parent_names,
core_ck_ops);
-static struct clk omap_32ksync_ick;
+static struct clk_core omap_32ksync_ick;
static struct clk_hw_omap omap_32ksync_ick_hw = {
.hw = {
@@ -2466,7 +2465,7 @@ static const struct clksel omap_96m_alwon_fck_clksel[] = {
{ .parent = NULL }
};
-static struct clk omap_96m_alwon_fck_3630;
+static struct clk_core omap_96m_alwon_fck_3630;
static const char *omap_96m_alwon_fck_3630_parent_names[] = {
"omap_192m_alwon_fck",
@@ -2487,7 +2486,7 @@ static struct clk_hw_omap omap_96m_alwon_fck_3630_hw = {
.clksel_mask = OMAP3630_CLKSEL_96M_MASK,
};
-static struct clk omap_96m_alwon_fck_3630 = {
+static struct clk_core omap_96m_alwon_fck_3630 = {
.name = "omap_96m_alwon_fck",
.hw = &omap_96m_alwon_fck_3630_hw.hw,
.parent_names = omap_96m_alwon_fck_3630_parent_names,
@@ -2495,7 +2494,7 @@ static struct clk omap_96m_alwon_fck_3630 = {
.ops = &omap_96m_alwon_fck_3630_ops,
};
-static struct clk omapctrl_ick;
+static struct clk_core omapctrl_ick;
static struct clk_hw_omap omapctrl_ick_hw = {
.hw = {
@@ -2520,17 +2519,17 @@ DEFINE_CLK_DIVIDER(pclkx2_fck, "emu_src_ck", &emu_src_ck, 0x0,
OMAP3430_CLKSEL_PCLKX2_SHIFT, OMAP3430_CLKSEL_PCLKX2_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk per_48m_fck;
+static struct clk_core per_48m_fck;
DEFINE_STRUCT_CLK_HW_OMAP(per_48m_fck, "per_clkdm");
DEFINE_STRUCT_CLK(per_48m_fck, core_48m_fck_parent_names, core_l4_ick_ops);
-static struct clk security_l3_ick;
+static struct clk_core security_l3_ick;
DEFINE_STRUCT_CLK_HW_OMAP(security_l3_ick, NULL);
DEFINE_STRUCT_CLK(security_l3_ick, core_l3_ick_parent_names, core_ck_ops);
-static struct clk pka_ick;
+static struct clk_core pka_ick;
static const char *pka_ick_parent_names[] = {
"security_l3_ick",
@@ -2552,7 +2551,7 @@ DEFINE_CLK_DIVIDER(rm_ick, "l4_ick", &l4_ick, 0x0,
OMAP3430_CLKSEL_RM_SHIFT, OMAP3430_CLKSEL_RM_WIDTH,
CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk rng_ick;
+static struct clk_core rng_ick;
static struct clk_hw_omap rng_ick_hw = {
.hw = {
@@ -2565,7 +2564,7 @@ static struct clk_hw_omap rng_ick_hw = {
DEFINE_STRUCT_CLK(rng_ick, aes1_ick_parent_names, aes1_ick_ops);
-static struct clk sad2d_ick;
+static struct clk_core sad2d_ick;
static struct clk_hw_omap sad2d_ick_hw = {
.hw = {
@@ -2579,7 +2578,7 @@ static struct clk_hw_omap sad2d_ick_hw = {
DEFINE_STRUCT_CLK(sad2d_ick, core_l3_ick_parent_names, aes2_ick_ops);
-static struct clk sdrc_ick;
+static struct clk_core sdrc_ick;
static struct clk_hw_omap sdrc_ick_hw = {
.hw = {
@@ -2630,7 +2629,7 @@ static const char *sgx_fck_parent_names[] = {
"core_ck", "cm_96m_fck", "omap_192m_alwon_fck", "corex2_fck",
};
-static struct clk sgx_fck;
+static struct clk_core sgx_fck;
static const struct clk_ops sgx_fck_ops = {
.init = &omap2_init_clk_clkdm,
@@ -2651,7 +2650,7 @@ DEFINE_CLK_OMAP_MUX_GATE(sgx_fck, "sgx_clkdm", sgx_clksel,
OMAP3430ES2_CM_FCLKEN_SGX_EN_SGX_SHIFT,
&clkhwops_wait, sgx_fck_parent_names, sgx_fck_ops);
-static struct clk sgx_ick;
+static struct clk_core sgx_ick;
static struct clk_hw_omap sgx_ick_hw = {
.hw = {
@@ -2665,7 +2664,7 @@ static struct clk_hw_omap sgx_ick_hw = {
DEFINE_STRUCT_CLK(sgx_ick, core_l3_ick_parent_names, aes2_ick_ops);
-static struct clk sha11_ick;
+static struct clk_core sha11_ick;
static struct clk_hw_omap sha11_ick_hw = {
.hw = {
@@ -2678,7 +2677,7 @@ static struct clk_hw_omap sha11_ick_hw = {
DEFINE_STRUCT_CLK(sha11_ick, aes1_ick_parent_names, aes1_ick_ops);
-static struct clk sha12_ick;
+static struct clk_core sha12_ick;
static struct clk_hw_omap sha12_ick_hw = {
.hw = {
@@ -2692,7 +2691,7 @@ static struct clk_hw_omap sha12_ick_hw = {
DEFINE_STRUCT_CLK(sha12_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk sr1_fck;
+static struct clk_core sr1_fck;
static struct clk_hw_omap sr1_fck_hw = {
.hw = {
@@ -2706,7 +2705,7 @@ static struct clk_hw_omap sr1_fck_hw = {
DEFINE_STRUCT_CLK(sr1_fck, dpll3_ck_parent_names, aes2_ick_ops);
-static struct clk sr2_fck;
+static struct clk_core sr2_fck;
static struct clk_hw_omap sr2_fck_hw = {
.hw = {
@@ -2720,17 +2719,17 @@ static struct clk_hw_omap sr2_fck_hw = {
DEFINE_STRUCT_CLK(sr2_fck, dpll3_ck_parent_names, aes2_ick_ops);
-static struct clk sr_l4_ick;
+static struct clk_core sr_l4_ick;
DEFINE_STRUCT_CLK_HW_OMAP(sr_l4_ick, "core_l4_clkdm");
DEFINE_STRUCT_CLK(sr_l4_ick, security_l4_ick2_parent_names, core_l4_ick_ops);
-static struct clk ssi_l4_ick;
+static struct clk_core ssi_l4_ick;
DEFINE_STRUCT_CLK_HW_OMAP(ssi_l4_ick, "core_l4_clkdm");
DEFINE_STRUCT_CLK(ssi_l4_ick, security_l4_ick2_parent_names, core_l4_ick_ops);
-static struct clk ssi_ick_3430es1;
+static struct clk_core ssi_ick_3430es1;
static const char *ssi_ick_3430es1_parent_names[] = {
"ssi_l4_ick",
@@ -2748,7 +2747,7 @@ static struct clk_hw_omap ssi_ick_3430es1_hw = {
DEFINE_STRUCT_CLK(ssi_ick_3430es1, ssi_ick_3430es1_parent_names, aes2_ick_ops);
-static struct clk ssi_ick_3430es2;
+static struct clk_core ssi_ick_3430es2;
static struct clk_hw_omap ssi_ick_3430es2_hw = {
.hw = {
@@ -2813,7 +2812,7 @@ DEFINE_CLK_FIXED_FACTOR(ssi_sst_fck_3430es1, "ssi_ssr_fck_3430es1",
DEFINE_CLK_FIXED_FACTOR(ssi_sst_fck_3430es2, "ssi_ssr_fck_3430es2",
&ssi_ssr_fck_3430es2, 0x0, 1, 2);
-static struct clk sys_clkout1;
+static struct clk_core sys_clkout1;
static const char *sys_clkout1_parent_names[] = {
"osc_sys_ck",
@@ -2843,7 +2842,7 @@ DEFINE_CLK_DIVIDER(traceclk_fck, "traceclk_src_fck", &traceclk_src_fck, 0x0,
OMAP3430_CLKSEL_TRACECLK_SHIFT,
OMAP3430_CLKSEL_TRACECLK_WIDTH, CLK_DIVIDER_ONE_BASED, NULL);
-static struct clk ts_fck;
+static struct clk_core ts_fck;
static struct clk_hw_omap ts_fck_hw = {
.hw = {
@@ -2856,7 +2855,7 @@ static struct clk_hw_omap ts_fck_hw = {
DEFINE_STRUCT_CLK(ts_fck, wkup_32k_fck_parent_names, aes2_ick_ops);
-static struct clk uart1_fck;
+static struct clk_core uart1_fck;
static struct clk_hw_omap uart1_fck_hw = {
.hw = {
@@ -2870,7 +2869,7 @@ static struct clk_hw_omap uart1_fck_hw = {
DEFINE_STRUCT_CLK(uart1_fck, fshostusb_fck_parent_names, aes2_ick_ops);
-static struct clk uart1_ick;
+static struct clk_core uart1_ick;
static struct clk_hw_omap uart1_ick_hw = {
.hw = {
@@ -2884,7 +2883,7 @@ static struct clk_hw_omap uart1_ick_hw = {
DEFINE_STRUCT_CLK(uart1_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk uart2_fck;
+static struct clk_core uart2_fck;
static struct clk_hw_omap uart2_fck_hw = {
.hw = {
@@ -2898,7 +2897,7 @@ static struct clk_hw_omap uart2_fck_hw = {
DEFINE_STRUCT_CLK(uart2_fck, fshostusb_fck_parent_names, aes2_ick_ops);
-static struct clk uart2_ick;
+static struct clk_core uart2_ick;
static struct clk_hw_omap uart2_ick_hw = {
.hw = {
@@ -2912,7 +2911,7 @@ static struct clk_hw_omap uart2_ick_hw = {
DEFINE_STRUCT_CLK(uart2_ick, aes2_ick_parent_names, aes2_ick_ops);
-static struct clk uart3_fck;
+static struct clk_core uart3_fck;
static const char *uart3_fck_parent_names[] = {
"per_48m_fck",
@@ -2930,7 +2929,7 @@ static struct clk_hw_omap uart3_fck_hw = {
DEFINE_STRUCT_CLK(uart3_fck, uart3_fck_parent_names, aes2_ick_ops);
-static struct clk uart3_ick;
+static struct clk_core uart3_ick;
static struct clk_hw_omap uart3_ick_hw = {
.hw = {
@@ -2944,7 +2943,7 @@ static struct clk_hw_omap uart3_ick_hw = {
DEFINE_STRUCT_CLK(uart3_ick, gpio2_ick_parent_names, aes2_ick_ops);
-static struct clk uart4_fck;
+static struct clk_core uart4_fck;
static struct clk_hw_omap uart4_fck_hw = {
.hw = {
@@ -2958,7 +2957,7 @@ static struct clk_hw_omap uart4_fck_hw = {
DEFINE_STRUCT_CLK(uart4_fck, uart3_fck_parent_names, aes2_ick_ops);
-static struct clk uart4_fck_am35xx;
+static struct clk_core uart4_fck_am35xx;
static struct clk_hw_omap uart4_fck_am35xx_hw = {
.hw = {
@@ -2972,7 +2971,7 @@ static struct clk_hw_omap uart4_fck_am35xx_hw = {
DEFINE_STRUCT_CLK(uart4_fck_am35xx, fshostusb_fck_parent_names, aes2_ick_ops);
-static struct clk uart4_ick;
+static struct clk_core uart4_ick;
static struct clk_hw_omap uart4_ick_hw = {
.hw = {
@@ -2986,7 +2985,7 @@ static struct clk_hw_omap uart4_ick_hw = {
DEFINE_STRUCT_CLK(uart4_ick, gpio2_ick_parent_names, aes2_ick_ops);
-static struct clk uart4_ick_am35xx;
+static struct clk_core uart4_ick_am35xx;
static struct clk_hw_omap uart4_ick_am35xx_hw = {
.hw = {
@@ -3023,7 +3022,7 @@ DEFINE_CLK_OMAP_MUX_GATE(usb_l4_ick, "core_l4_clkdm", usb_l4_clksel,
&clkhwops_iclk_wait, usb_l4_ick_parent_names,
ssi_ssr_fck_3430es1_ops);
-static struct clk usbhost_120m_fck;
+static struct clk_core usbhost_120m_fck;
static const char *usbhost_120m_fck_parent_names[] = {
"dpll5_m2_ck",
@@ -3041,7 +3040,7 @@ static struct clk_hw_omap usbhost_120m_fck_hw = {
DEFINE_STRUCT_CLK(usbhost_120m_fck, usbhost_120m_fck_parent_names,
aes2_ick_ops);
-static struct clk usbhost_48m_fck;
+static struct clk_core usbhost_48m_fck;
static struct clk_hw_omap usbhost_48m_fck_hw = {
.hw = {
@@ -3055,7 +3054,7 @@ static struct clk_hw_omap usbhost_48m_fck_hw = {
DEFINE_STRUCT_CLK(usbhost_48m_fck, core_48m_fck_parent_names, aes2_ick_ops);
-static struct clk usbhost_ick;
+static struct clk_core usbhost_ick;
static struct clk_hw_omap usbhost_ick_hw = {
.hw = {
@@ -3069,7 +3068,7 @@ static struct clk_hw_omap usbhost_ick_hw = {
DEFINE_STRUCT_CLK(usbhost_ick, security_l4_ick2_parent_names, aes2_ick_ops);
-static struct clk usbtll_fck;
+static struct clk_core usbtll_fck;
static struct clk_hw_omap usbtll_fck_hw = {
.hw = {
@@ -3083,7 +3082,7 @@ static struct clk_hw_omap usbtll_fck_hw = {
DEFINE_STRUCT_CLK(usbtll_fck, usbhost_120m_fck_parent_names, aes2_ick_ops);
-static struct clk usbtll_ick;
+static struct clk_core usbtll_ick;
static struct clk_hw_omap usbtll_ick_hw = {
.hw = {
@@ -3124,7 +3123,7 @@ static const char *usim_fck_parent_names[] = {
"omap_96m_fck", "dpll5_m2_ck", "sys_ck",
};
-static struct clk usim_fck;
+static struct clk_core usim_fck;
static const struct clk_ops usim_fck_ops = {
.enable = &omap2_dflt_clk_enable,
@@ -3142,7 +3141,7 @@ DEFINE_CLK_OMAP_MUX_GATE(usim_fck, NULL, usim_clksel,
OMAP3430ES2_EN_USIMOCP_SHIFT, &clkhwops_wait,
usim_fck_parent_names, usim_fck_ops);
-static struct clk usim_ick;
+static struct clk_core usim_ick;
static struct clk_hw_omap usim_ick_hw = {
.hw = {
@@ -3156,7 +3155,7 @@ static struct clk_hw_omap usim_ick_hw = {
DEFINE_STRUCT_CLK(usim_ick, gpio1_ick_parent_names, aes2_ick_ops);
-static struct clk vpfe_fck;
+static struct clk_core vpfe_fck;
static const char *vpfe_fck_parent_names[] = {
"pclk_ck",
@@ -3172,7 +3171,7 @@ static struct clk_hw_omap vpfe_fck_hw = {
DEFINE_STRUCT_CLK(vpfe_fck, vpfe_fck_parent_names, aes1_ick_ops);
-static struct clk vpfe_ick;
+static struct clk_core vpfe_ick;
static struct clk_hw_omap vpfe_ick_hw = {
.hw = {
@@ -3186,12 +3185,12 @@ static struct clk_hw_omap vpfe_ick_hw = {
DEFINE_STRUCT_CLK(vpfe_ick, emac_ick_parent_names, aes2_ick_ops);
-static struct clk wdt1_fck;
+static struct clk_core wdt1_fck;
DEFINE_STRUCT_CLK_HW_OMAP(wdt1_fck, "wkup_clkdm");
DEFINE_STRUCT_CLK(wdt1_fck, gpt12_fck_parent_names, core_l4_ick_ops);
-static struct clk wdt1_ick;
+static struct clk_core wdt1_ick;
static struct clk_hw_omap wdt1_ick_hw = {
.hw = {
@@ -3205,7 +3204,7 @@ static struct clk_hw_omap wdt1_ick_hw = {
DEFINE_STRUCT_CLK(wdt1_ick, gpio1_ick_parent_names, aes2_ick_ops);
-static struct clk wdt2_fck;
+static struct clk_core wdt2_fck;
static struct clk_hw_omap wdt2_fck_hw = {
.hw = {
@@ -3219,7 +3218,7 @@ static struct clk_hw_omap wdt2_fck_hw = {
DEFINE_STRUCT_CLK(wdt2_fck, gpio1_dbck_parent_names, aes2_ick_ops);
-static struct clk wdt2_ick;
+static struct clk_core wdt2_ick;
static struct clk_hw_omap wdt2_ick_hw = {
.hw = {
@@ -3233,7 +3232,7 @@ static struct clk_hw_omap wdt2_ick_hw = {
DEFINE_STRUCT_CLK(wdt2_ick, gpio1_ick_parent_names, aes2_ick_ops);
-static struct clk wdt3_fck;
+static struct clk_core wdt3_fck;
static struct clk_hw_omap wdt3_fck_hw = {
.hw = {
@@ -3247,7 +3246,7 @@ static struct clk_hw_omap wdt3_fck_hw = {
DEFINE_STRUCT_CLK(wdt3_fck, gpio2_dbck_parent_names, aes2_ick_ops);
-static struct clk wdt3_ick;
+static struct clk_core wdt3_ick;
static struct clk_hw_omap wdt3_ick_hw = {
.hw = {
@@ -3661,10 +3660,10 @@ int __init omap3xxx_clk_init(void)
ARRAY_SIZE(enable_init_clks));
pr_info("Clocking rate (Crystal/Core/MPU): %ld.%01ld/%ld/%ld MHz\n",
- (clk_get_rate(&osc_sys_ck) / 1000000),
- (clk_get_rate(&osc_sys_ck) / 100000) % 10,
- (clk_get_rate(&core_ck) / 1000000),
- (clk_get_rate(&arm_fck) / 1000000));
+ (clk_provider_get_rate(&osc_sys_ck) / 1000000),
+ (clk_provider_get_rate(&osc_sys_ck) / 100000) % 10,
+ (clk_provider_get_rate(&core_ck) / 1000000),
+ (clk_provider_get_rate(&arm_fck) / 1000000));
/*
* Lock DPLL5 -- here only until other device init code can
@@ -3674,8 +3673,8 @@ int __init omap3xxx_clk_init(void)
omap3_clk_lock_dpll5();
/* Avoid sleeping during omap3_core_dpll_m2_set_rate() */
- sdrc_ick_p = clk_get(NULL, "sdrc_ick");
- arm_fck_p = clk_get(NULL, "arm_fck");
+ sdrc_ick_p = clk_provider_get(NULL, "sdrc_ick");
+ arm_fck_p = clk_provider_get(NULL, "arm_fck");
return 0;
}
diff --git a/arch/arm/mach-omap2/clkt2xxx_dpll.c b/arch/arm/mach-omap2/clkt2xxx_dpll.c
index 82572e2..d7bbbb6 100644
--- a/arch/arm/mach-omap2/clkt2xxx_dpll.c
+++ b/arch/arm/mach-omap2/clkt2xxx_dpll.c
@@ -11,7 +11,6 @@
#include <linux/kernel.h>
#include <linux/errno.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include "clock.h"
@@ -22,7 +21,7 @@
/**
* _allow_idle - enable DPLL autoidle bits
- * @clk: struct clk * of the DPLL to operate on
+ * @clk: struct clk_core * of the DPLL to operate on
*
* Enable DPLL automatic idle control. The DPLL will enter low-power
* stop when its downstream clocks are gated. No return value.
@@ -39,7 +38,7 @@ static void _allow_idle(struct clk_hw_omap *clk)
/**
* _deny_idle - prevent DPLL from automatically idling
- * @clk: struct clk * of the DPLL to operate on
+ * @clk: struct clk_core * of the DPLL to operate on
*
* Disable DPLL automatic idle control. No return value.
*/
diff --git a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
index 59cf310..9a60ce2 100644
--- a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
+++ b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
@@ -22,7 +22,6 @@
#include <linux/kernel.h>
#include <linux/errno.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include "clock.h"
@@ -48,7 +47,7 @@ static struct clk_hw_omap *dpll_core_ck;
* Returns the CORE_CLK rate. CORE_CLK can have one of three rate
* sources on OMAP2xxx: the DPLL CLKOUT rate, DPLL CLKOUTX2, or 32KHz
* (the latter is unusual). This currently should be called with
- * struct clk *dpll_ck, which is a composite clock of dpll_ck and
+ * struct clk_core *dpll_ck, which is a composite clock of dpll_ck and
* core_ck.
*/
unsigned long omap2xxx_clk_get_core_rate(void)
@@ -179,7 +178,7 @@ int omap2_reprogram_dpllcore(struct clk_hw *hw, unsigned long rate,
/**
* omap2xxx_clkt_dpllcore_init - clk init function for dpll_ck
- * @clk: struct clk *dpll_ck
+ * @clk: struct clk_core *dpll_ck
*
* Store a local copy of @clk in dpll_core_ck so other code can query
* the core rate without having to clk_get(), which can sleep. Must
diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
index 85e0b0c0..d621a4c 100644
--- a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
+++ b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
@@ -28,7 +28,6 @@
#include <linux/kernel.h>
#include <linux/errno.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include <linux/cpufreq.h>
#include <linux/slab.h>
@@ -198,14 +197,14 @@ void omap2xxx_clkt_vps_check_bootloader_rates(void)
*/
void omap2xxx_clkt_vps_late_init(void)
{
- struct clk *c;
+ struct clk_core *c;
- c = clk_get(NULL, "sys_ck");
+ c = clk_provider_get(NULL, "sys_ck");
if (IS_ERR(c)) {
WARN(1, "could not locate sys_ck\n");
} else {
- sys_ck_rate = clk_get_rate(c);
- clk_put(c);
+ sys_ck_rate = clk_provider_get_rate(c);
+ __clk_put(c);
}
}
@@ -230,7 +229,7 @@ void omap2xxx_clkt_vps_init(void)
{
struct clk_init_data init = { NULL };
struct clk_hw_omap *hw = NULL;
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name = "mpu_ck";
struct clk_lookup *lookup = NULL;
diff --git a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
index eb69acf..16ff4ed 100644
--- a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
+++ b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
@@ -18,7 +18,6 @@
#include <linux/kernel.h>
#include <linux/errno.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include "clock.h"
@@ -38,7 +37,7 @@
/**
* omap3_core_dpll_m2_set_rate - set CORE DPLL M2 divider
- * @clk: struct clk * of DPLL to set
+ * @clk: struct clk_core * of DPLL to set
* @rate: rounded target rate
*
* Program the DPLL M2 divider with the rounded target rate. Returns
diff --git a/arch/arm/mach-omap2/clkt_clksel.c b/arch/arm/mach-omap2/clkt_clksel.c
index 7ee2610..b4796b3 100644
--- a/arch/arm/mach-omap2/clkt_clksel.c
+++ b/arch/arm/mach-omap2/clkt_clksel.c
@@ -51,15 +51,15 @@
/**
* _get_clksel_by_parent() - return clksel struct for a given clk & parent
- * @clk: OMAP struct clk ptr to inspect
- * @src_clk: OMAP struct clk ptr of the parent clk to search for
+ * @clk: OMAP struct clk_core ptr to inspect
+ * @src_clk: OMAP struct clk_core ptr of the parent clk to search for
*
* Scan the struct clksel array associated with the clock to find
* the element associated with the supplied parent clock address.
* Returns a pointer to the struct clksel on success or NULL on error.
*/
static const struct clksel *_get_clksel_by_parent(struct clk_hw_omap *clk,
- struct clk *src_clk)
+ struct clk_core *src_clk)
{
const struct clksel *clks;
@@ -82,7 +82,7 @@ static const struct clksel *_get_clksel_by_parent(struct clk_hw_omap *clk,
/**
* _write_clksel_reg() - program a clock's clksel register in hardware
- * @clk: struct clk * to program
+ * @clk: struct clk_core * to program
* @v: clksel bitfield value to program (with LSB at bit 0)
*
* Shift the clksel register bitfield value @v to its appropriate
@@ -107,10 +107,10 @@ static void _write_clksel_reg(struct clk_hw_omap *clk, u32 field_val)
/**
* _clksel_to_divisor() - turn clksel field value into integer divider
- * @clk: OMAP struct clk to use
+ * @clk: OMAP struct clk_core to use
* @field_val: register field value to find
*
- * Given a struct clk of a rate-selectable clksel clock, and a register field
+ * Given a struct clk_core of a rate-selectable clksel clock, and a register field
* value to search for, find the corresponding clock divisor. The register
* field value should be pre-masked and shifted down so the LSB is at bit 0
* before calling. Returns 0 on error or returns the actual integer divisor
@@ -120,7 +120,7 @@ static u32 _clksel_to_divisor(struct clk_hw_omap *clk, u32 field_val)
{
const struct clksel *clks;
const struct clksel_rate *clkr;
- struct clk *parent;
+ struct clk_core *parent;
parent = __clk_get_parent(clk->hw.clk);
@@ -149,10 +149,10 @@ static u32 _clksel_to_divisor(struct clk_hw_omap *clk, u32 field_val)
/**
* _divisor_to_clksel() - turn clksel integer divisor into a field value
- * @clk: OMAP struct clk to use
+ * @clk: OMAP struct clk_core to use
* @div: integer divisor to search for
*
- * Given a struct clk of a rate-selectable clksel clock, and a clock
+ * Given a struct clk_core of a rate-selectable clksel clock, and a clock
* divisor, find the corresponding register field value. Returns the
* register field value _before_ left-shifting (i.e., LSB is at bit
* 0); or returns 0xFFFFFFFF (~0) upon error.
@@ -161,7 +161,7 @@ static u32 _divisor_to_clksel(struct clk_hw_omap *clk, u32 div)
{
const struct clksel *clks;
const struct clksel_rate *clkr;
- struct clk *parent;
+ struct clk_core *parent;
/* should never happen */
WARN_ON(div == 0);
@@ -191,7 +191,7 @@ static u32 _divisor_to_clksel(struct clk_hw_omap *clk, u32 div)
/**
* _read_divisor() - get current divisor applied to parent clock (from hdwr)
- * @clk: OMAP struct clk to use.
+ * @clk: OMAP struct clk_core to use.
*
* Read the current divisor register value for @clk that is programmed
* into the hardware, convert it into the actual divisor value, and
@@ -215,7 +215,7 @@ static u32 _read_divisor(struct clk_hw_omap *clk)
/**
* omap2_clksel_round_rate_div() - find divisor for the given clock and rate
- * @clk: OMAP struct clk to use
+ * @clk: OMAP struct clk_core to use
* @target_rate: desired clock rate
* @new_div: ptr to where we should store the divisor
*
@@ -233,7 +233,7 @@ u32 omap2_clksel_round_rate_div(struct clk_hw_omap *clk,
const struct clksel *clks;
const struct clksel_rate *clkr;
u32 last_div = 0;
- struct clk *parent;
+ struct clk_core *parent;
unsigned long parent_rate;
const char *clk_name;
@@ -286,7 +286,7 @@ u32 omap2_clksel_round_rate_div(struct clk_hw_omap *clk,
/*
* Clocktype interface functions to the OMAP clock code
- * (i.e., those used in struct clk field function pointers, etc.)
+ * (i.e., those used in struct clk_core field function pointers, etc.)
*/
/**
@@ -309,7 +309,7 @@ u8 omap2_clksel_find_parent_index(struct clk_hw *hw)
const struct clksel *clks;
const struct clksel_rate *clkr;
u32 r, found = 0;
- struct clk *parent;
+ struct clk_core *parent;
const char *clk_name;
int ret = 0, f = 0;
@@ -345,11 +345,11 @@ u8 omap2_clksel_find_parent_index(struct clk_hw *hw)
/**
- * omap2_clksel_recalc() - function ptr to pass via struct clk .recalc field
- * @clk: struct clk *
+ * omap2_clksel_recalc() - function ptr to pass via struct clk_core .recalc field
+ * @clk: struct clk_core *
*
* This function is intended to be called only by the clock framework.
- * Each clksel clock should have its struct clk .recalc field set to this
+ * Each clksel clock should have its struct clk_core .recalc field set to this
* function. Returns the clock's current rate, based on its parent's rate
* and its current divisor setting in the hardware.
*/
@@ -376,7 +376,7 @@ unsigned long omap2_clksel_recalc(struct clk_hw *hw, unsigned long parent_rate)
/**
* omap2_clksel_round_rate() - find rounded rate for the given clock and rate
- * @clk: OMAP struct clk to use
+ * @clk: OMAP struct clk_core to use
* @target_rate: desired clock rate
*
* This function is intended to be called only by the clock framework.
@@ -396,7 +396,7 @@ long omap2_clksel_round_rate(struct clk_hw *hw, unsigned long target_rate,
/**
* omap2_clksel_set_rate() - program clock rate in hardware
- * @clk: struct clk * to program rate
+ * @clk: struct clk_core * to program rate
* @rate: target rate to program
*
* This function is intended to be called only by the clock framework.
@@ -435,7 +435,7 @@ int omap2_clksel_set_rate(struct clk_hw *hw, unsigned long rate,
}
/*
- * Clksel parent setting function - not passed in struct clk function
+ * Clksel parent setting function - not passed in struct clk_core function
* pointer - instead, the OMAP clock code currently assumes that any
* parent-setting clock is a clksel clock, and calls
* omap2_clksel_set_parent() by default
@@ -443,8 +443,8 @@ int omap2_clksel_set_rate(struct clk_hw *hw, unsigned long rate,
/**
* omap2_clksel_set_parent() - change a clock's parent clock
- * @clk: struct clk * of the child clock
- * @new_parent: struct clk * of the new parent clock
+ * @clk: struct clk_core * of the child clock
+ * @new_parent: struct clk_core * of the new parent clock
*
* This function is intended to be called only by the clock framework.
* Change the parent clock of clock @clk to @new_parent. This is
diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c
index f251a14..36f263d 100644
--- a/arch/arm/mach-omap2/clkt_dpll.c
+++ b/arch/arm/mach-omap2/clkt_dpll.c
@@ -56,7 +56,7 @@
/*
* _dpll_test_fint - test whether an Fint value is valid for the DPLL
- * @clk: DPLL struct clk to test
+ * @clk: DPLL struct clk_core to test
* @n: divider value (N) to test
*
* Tests whether a particular divider @n will result in a valid DPLL
@@ -215,7 +215,7 @@ u8 omap2_init_dpll_parent(struct clk_hw *hw)
v &= dd->enable_mask;
v >>= __ffs(dd->enable_mask);
- /* Reparent the struct clk in case the dpll is in bypass */
+ /* Reparent the struct clk_core in case the dpll is in bypass */
if (_omap2_dpll_is_in_bypass(v))
return 1;
@@ -224,7 +224,7 @@ u8 omap2_init_dpll_parent(struct clk_hw *hw)
/**
* omap2_get_dpll_rate - returns the current DPLL CLKOUT rate
- * @clk: struct clk * of a DPLL
+ * @clk: struct clk_core * of a DPLL
*
* DPLLs can be locked or bypassed - basically, enabled or disabled.
* When locked, the DPLL output depends on the M and N values. When
@@ -270,7 +270,7 @@ unsigned long omap2_get_dpll_rate(struct clk_hw_omap *clk)
/**
* omap2_dpll_round_rate - round a target rate for an OMAP DPLL
- * @clk: struct clk * for a DPLL
+ * @clk: struct clk_core * for a DPLL
* @target_rate: desired DPLL clock rate
*
* Given a DPLL and a desired target rate, round the target rate to a
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 500530d..ab341e4 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -142,7 +142,7 @@ static int _wait_idlest_generic(struct clk_hw_omap *clk, void __iomem *reg,
/**
* _omap2_module_wait_ready - wait for an OMAP module to leave IDLE
- * @clk: struct clk * belonging to the module
+ * @clk: struct clk_core * belonging to the module
*
* If the necessary clocks for the OMAP hardware IP block that
* corresponds to clock @clk are enabled, then wait for the module to
@@ -181,7 +181,7 @@ static void _omap2_module_wait_ready(struct clk_hw_omap *clk)
* omap2_init_clk_clkdm - look up a clockdomain name, store pointer in clk
* @clk: OMAP clock struct ptr to use
*
- * Convert a clockdomain name stored in a struct clk 'clk' into a
+ * Convert a clockdomain name stored in a struct clk_core 'clk' into a
* clockdomain pointer, and save it into the struct clk. Intended to be
* called during clk_register(). No return value.
*/
@@ -222,7 +222,7 @@ void __init omap2_clk_disable_clkdm_control(void)
/**
* omap2_clk_dflt_find_companion - find companion clock to @clk
- * @clk: struct clk * to find the companion clock of
+ * @clk: struct clk_core * to find the companion clock of
* @other_reg: void __iomem ** to return the companion clock CM_*CLKEN va in
* @other_bit: u8 ** to return the companion clock bit shift in
*
@@ -258,7 +258,7 @@ void omap2_clk_dflt_find_companion(struct clk_hw_omap *clk,
/**
* omap2_clk_dflt_find_idlest - find CM_IDLEST reg va, bit shift for @clk
- * @clk: struct clk * to find IDLEST info for
+ * @clk: struct clk_core * to find IDLEST info for
* @idlest_reg: void __iomem ** to return the CM_IDLEST va in
* @idlest_bit: u8 * to return the CM_IDLEST bit shift in
* @idlest_val: u8 * to return the idle status indicator
@@ -502,14 +502,14 @@ __setup("mpurate=", omap_clk_setup);
/**
* omap2_init_clk_hw_omap_clocks - initialize an OMAP clock
- * @clk: struct clk * to initialize
+ * @clk: struct clk_core * to initialize
*
* Add an OMAP clock @clk to the internal list of OMAP clocks. Used
* temporarily for autoidle handling, until this support can be
* integrated into the common clock framework code in some way. No
* return value.
*/
-void omap2_init_clk_hw_omap_clocks(struct clk *clk)
+void omap2_init_clk_hw_omap_clocks(struct clk_core *clk)
{
struct clk_hw_omap *c;
@@ -566,11 +566,11 @@ int omap2_clk_disable_autoidle_all(void)
/**
* omap2_clk_deny_idle - disable autoidle on an OMAP clock
- * @clk: struct clk * to disable autoidle for
+ * @clk: struct clk_core * to disable autoidle for
*
* Disable autoidle on an OMAP clock.
*/
-int omap2_clk_deny_idle(struct clk *clk)
+int omap2_clk_deny_idle(struct clk_core *clk)
{
struct clk_hw_omap *c;
@@ -585,11 +585,11 @@ int omap2_clk_deny_idle(struct clk *clk)
/**
* omap2_clk_allow_idle - enable autoidle on an OMAP clock
- * @clk: struct clk * to enable autoidle for
+ * @clk: struct clk_core * to enable autoidle for
*
* Enable autoidle on an OMAP clock.
*/
-int omap2_clk_allow_idle(struct clk *clk)
+int omap2_clk_allow_idle(struct clk_core *clk)
{
struct clk_hw_omap *c;
@@ -614,12 +614,12 @@ int omap2_clk_allow_idle(struct clk *clk)
*/
void omap2_clk_enable_init_clocks(const char **clk_names, u8 num_clocks)
{
- struct clk *init_clk;
+ struct clk_core *init_clk;
int i;
for (i = 0; i < num_clocks; i++) {
- init_clk = clk_get(NULL, clk_names[i]);
- clk_prepare_enable(init_clk);
+ init_clk = clk_provider_get(NULL, clk_names[i]);
+ clk_provider_prepare_enable(init_clk);
}
}
@@ -655,31 +655,31 @@ void __init omap_clocks_register(struct omap_clk oclks[], int cnt)
* the OPP layer. XXX This is intended to be handled by the OPP layer
* code in the near future and should be removed from the clock code.
* Returns -EINVAL if 'mpurate' is zero or if clk_set_rate() rejects
- * the rate, -ENOENT if the struct clk referred to by @mpurate_ck_name
+ * the rate, -ENOENT if the struct clk_core referred to by @mpurate_ck_name
* cannot be found, or 0 upon success.
*/
int __init omap2_clk_switch_mpurate_at_boot(const char *mpurate_ck_name)
{
- struct clk *mpurate_ck;
+ struct clk_core *mpurate_ck;
int r;
if (!mpurate)
return -EINVAL;
- mpurate_ck = clk_get(NULL, mpurate_ck_name);
+ mpurate_ck = clk_provider_get(NULL, mpurate_ck_name);
if (WARN(IS_ERR(mpurate_ck), "Failed to get %s.\n", mpurate_ck_name))
return -ENOENT;
- r = clk_set_rate(mpurate_ck, mpurate);
+ r = clk_provider_set_rate(mpurate_ck, mpurate);
if (r < 0) {
WARN(1, "clock: %s: unable to set MPU rate to %d: %d\n",
mpurate_ck_name, mpurate, r);
- clk_put(mpurate_ck);
+ __clk_put(mpurate_ck);
return -EINVAL;
}
calibrate_delay();
- clk_put(mpurate_ck);
+ __clk_put(mpurate_ck);
return 0;
}
@@ -700,27 +700,27 @@ void __init omap2_clk_print_new_rates(const char *hfclkin_ck_name,
const char *core_ck_name,
const char *mpu_ck_name)
{
- struct clk *hfclkin_ck, *core_ck, *mpu_ck;
+ struct clk_core *hfclkin_ck, *core_ck, *mpu_ck;
unsigned long hfclkin_rate;
- mpu_ck = clk_get(NULL, mpu_ck_name);
+ mpu_ck = clk_provider_get(NULL, mpu_ck_name);
if (WARN(IS_ERR(mpu_ck), "clock: failed to get %s.\n", mpu_ck_name))
return;
- core_ck = clk_get(NULL, core_ck_name);
+ core_ck = clk_provider_get(NULL, core_ck_name);
if (WARN(IS_ERR(core_ck), "clock: failed to get %s.\n", core_ck_name))
return;
- hfclkin_ck = clk_get(NULL, hfclkin_ck_name);
+ hfclkin_ck = clk_provider_get(NULL, hfclkin_ck_name);
if (WARN(IS_ERR(hfclkin_ck), "Failed to get %s.\n", hfclkin_ck_name))
return;
- hfclkin_rate = clk_get_rate(hfclkin_ck);
+ hfclkin_rate = clk_provider_get_rate(hfclkin_ck);
pr_info("Switched to new clocking rate (Crystal/Core/MPU): %ld.%01ld/%ld/%ld MHz\n",
(hfclkin_rate / 1000000), ((hfclkin_rate / 100000) % 10),
- (clk_get_rate(core_ck) / 1000000),
- (clk_get_rate(mpu_ck) / 1000000));
+ (clk_provider_get_rate(core_ck) / 1000000),
+ (clk_provider_get_rate(mpu_ck) / 1000000));
}
/**
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index 4592a27..7068684 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -40,7 +40,7 @@ struct omap_clk {
struct clockdomain;
#define DEFINE_STRUCT_CLK(_name, _parent_array_name, _clkops_name) \
- static struct clk _name = { \
+ static struct clk_core _name = { \
.name = #_name, \
.hw = &_name##_hw.hw, \
.parent_names = _parent_array_name, \
@@ -50,7 +50,7 @@ struct clockdomain;
#define DEFINE_STRUCT_CLK_FLAGS(_name, _parent_array_name, \
_clkops_name, _flags) \
- static struct clk _name = { \
+ static struct clk_core _name = { \
.name = #_name, \
.hw = &_name##_hw.hw, \
.parent_names = _parent_array_name, \
@@ -70,7 +70,7 @@ struct clockdomain;
#define DEFINE_CLK_OMAP_MUX(_name, _clkdm_name, _clksel, \
_clksel_reg, _clksel_mask, \
_parent_names, _ops) \
- static struct clk _name; \
+ static struct clk_core _name; \
static struct clk_hw_omap _name##_hw = { \
.hw = { \
.clk = &_name, \
@@ -86,7 +86,7 @@ struct clockdomain;
_clksel_reg, _clksel_mask, \
_enable_reg, _enable_bit, \
_hwops, _parent_names, _ops) \
- static struct clk _name; \
+ static struct clk_core _name; \
static struct clk_hw_omap _name##_hw = { \
.hw = { \
.clk = &_name, \
@@ -142,14 +142,14 @@ struct clksel_rate {
/**
* struct clksel - available parent clocks, and a pointer to their divisors
- * @parent: struct clk * to a possible parent clock
+ * @parent: struct clk_core * to a possible parent clock
* @rates: available divisors for this parent clock
*
* A struct clksel is always associated with one or more struct clks
* and one or more struct clksel_rates.
*/
struct clksel {
- struct clk *parent;
+ struct clk_core *parent;
const struct clksel_rate *rates;
};
@@ -208,8 +208,8 @@ void omap2_clk_dflt_find_idlest(struct clk_hw_omap *clk,
void __iomem **idlest_reg,
u8 *idlest_bit, u8 *idlest_val);
int omap2_clk_enable_autoidle_all(void);
-int omap2_clk_allow_idle(struct clk *clk);
-int omap2_clk_deny_idle(struct clk *clk);
+int omap2_clk_allow_idle(struct clk_core *clk);
+int omap2_clk_deny_idle(struct clk_core *clk);
int omap2_clk_switch_mpurate_at_boot(const char *mpurate_ck_name);
void omap2_clk_print_new_rates(const char *hfclkin_ck_name,
const char *core_ck_name,
@@ -247,7 +247,7 @@ extern const struct clksel_rate gpt_32k_rates[];
extern const struct clksel_rate gpt_sys_rates[];
extern const struct clksel_rate gfx_l3_rates[];
extern const struct clksel_rate dsp_ick_rates[];
-extern struct clk dummy_ck;
+extern struct clk_core dummy_ck;
extern const struct clk_hw_omap_ops clkhwops_iclk_wait;
extern const struct clk_hw_omap_ops clkhwops_wait;
diff --git a/arch/arm/mach-omap2/clock3xxx.c b/arch/arm/mach-omap2/clock3xxx.c
index 0b02b41..8d1b843 100644
--- a/arch/arm/mach-omap2/clock3xxx.c
+++ b/arch/arm/mach-omap2/clock3xxx.c
@@ -18,7 +18,6 @@
#include <linux/kernel.h>
#include <linux/errno.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include "soc.h"
@@ -37,7 +36,7 @@
#define DPLL5_FREQ_FOR_USBHOST 120000000
/* needed by omap3_core_dpll_m2_set_rate() */
-struct clk *sdrc_ick_p, *arm_fck_p;
+struct clk_core *sdrc_ick_p, *arm_fck_p;
int omap3_dpll4_set_rate(struct clk_hw *hw, unsigned long rate,
unsigned long parent_rate)
{
@@ -56,20 +55,20 @@ int omap3_dpll4_set_rate(struct clk_hw *hw, unsigned long rate,
void __init omap3_clk_lock_dpll5(void)
{
- struct clk *dpll5_clk;
- struct clk *dpll5_m2_clk;
+ struct clk_core *dpll5_clk;
+ struct clk_core *dpll5_m2_clk;
- dpll5_clk = clk_get(NULL, "dpll5_ck");
- clk_set_rate(dpll5_clk, DPLL5_FREQ_FOR_USBHOST);
- clk_prepare_enable(dpll5_clk);
+ dpll5_clk = clk_provider_get(NULL, "dpll5_ck");
+ clk_provider_set_rate(dpll5_clk, DPLL5_FREQ_FOR_USBHOST);
+ clk_provider_prepare_enable(dpll5_clk);
/* Program dpll5_m2_clk divider for no division */
- dpll5_m2_clk = clk_get(NULL, "dpll5_m2_ck");
- clk_prepare_enable(dpll5_m2_clk);
- clk_set_rate(dpll5_m2_clk, DPLL5_FREQ_FOR_USBHOST);
+ dpll5_m2_clk = clk_provider_get(NULL, "dpll5_m2_ck");
+ clk_provider_prepare_enable(dpll5_m2_clk);
+ clk_provider_set_rate(dpll5_m2_clk, DPLL5_FREQ_FOR_USBHOST);
- clk_disable_unprepare(dpll5_m2_clk);
- clk_disable_unprepare(dpll5_clk);
+ clk_provider_disable_unprepare(dpll5_m2_clk);
+ clk_provider_disable_unprepare(dpll5_clk);
return;
}
diff --git a/arch/arm/mach-omap2/clock3xxx.h b/arch/arm/mach-omap2/clock3xxx.h
index 78d9f56..063fbf1 100644
--- a/arch/arm/mach-omap2/clock3xxx.h
+++ b/arch/arm/mach-omap2/clock3xxx.h
@@ -12,8 +12,8 @@ int omap3xxx_clk_init(void);
int omap3_core_dpll_m2_set_rate(struct clk_hw *clk, unsigned long rate,
unsigned long parent_rate);
-extern struct clk *sdrc_ick_p;
-extern struct clk *arm_fck_p;
+extern struct clk_core *sdrc_ick_p;
+extern struct clk_core *arm_fck_p;
extern const struct clkops clkops_noncore_dpll_ops;
diff --git a/arch/arm/mach-omap2/clock_common_data.c b/arch/arm/mach-omap2/clock_common_data.c
index ef4d21b..31e3e79 100644
--- a/arch/arm/mach-omap2/clock_common_data.c
+++ b/arch/arm/mach-omap2/clock_common_data.c
@@ -119,7 +119,7 @@ const struct clksel_rate div31_1to31_rates[] = {
static struct clk_ops dummy_ck_ops = {};
-struct clk dummy_ck = {
+struct clk_core dummy_ck = {
.name = "dummy_clk",
.ops = &dummy_ck_ops,
.flags = CLK_IS_BASIC,
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index 2da3b5e..dd89095 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -19,7 +19,6 @@
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/delay.h>
-#include <linux/clk.h>
#include <linux/limits.h>
#include <linux/err.h>
#include <linux/clk-provider.h>
@@ -1141,7 +1140,7 @@ static int _clkdm_clk_hwmod_enable(struct clockdomain *clkdm)
/**
* clkdm_clk_enable - add an enabled downstream clock to this clkdm
* @clkdm: struct clockdomain *
- * @clk: struct clk * of the enabled downstream clock
+ * @clk: struct clk_core * of the enabled downstream clock
*
* Increment the usecount of the clockdomain @clkdm and ensure that it
* is awake before @clk is enabled. Intended to be called by
@@ -1152,7 +1151,7 @@ static int _clkdm_clk_hwmod_enable(struct clockdomain *clkdm)
* by on-chip processors. Returns -EINVAL if passed null pointers;
* returns 0 upon success or if the clockdomain is in hwsup idle mode.
*/
-int clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk)
+int clkdm_clk_enable(struct clockdomain *clkdm, struct clk_core *clk)
{
/*
* XXX Rewrite this code to maintain a list of enabled
@@ -1168,7 +1167,7 @@ int clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk)
/**
* clkdm_clk_disable - remove an enabled downstream clock from this clkdm
* @clkdm: struct clockdomain *
- * @clk: struct clk * of the disabled downstream clock
+ * @clk: struct clk_core * of the disabled downstream clock
*
* Decrement the usecount of this clockdomain @clkdm when @clk is
* disabled. Intended to be called by clk_disable() code. If the
@@ -1178,7 +1177,7 @@ int clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk)
* pointers; -ERANGE if the @clkdm usecount underflows; or returns 0
* upon success or if the clockdomain is in hwsup idle mode.
*/
-int clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk)
+int clkdm_clk_disable(struct clockdomain *clkdm, struct clk_core *clk)
{
if (!clkdm || !clk || !arch_clkdm || !arch_clkdm->clkdm_clk_disable)
return -EINVAL;
diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h
index 82c37b1..f1a2cad 100644
--- a/arch/arm/mach-omap2/clockdomain.h
+++ b/arch/arm/mach-omap2/clockdomain.h
@@ -207,8 +207,8 @@ int clkdm_wakeup(struct clockdomain *clkdm);
int clkdm_sleep_nolock(struct clockdomain *clkdm);
int clkdm_sleep(struct clockdomain *clkdm);
-int clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk);
-int clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk);
+int clkdm_clk_enable(struct clockdomain *clkdm, struct clk_core *clk);
+int clkdm_clk_disable(struct clockdomain *clkdm, struct clk_core *clk);
int clkdm_hwmod_enable(struct clockdomain *clkdm, struct omap_hwmod *oh);
int clkdm_hwmod_disable(struct clockdomain *clkdm, struct omap_hwmod *oh);
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index 0f9e479..ff1f6c1 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -20,7 +20,6 @@
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/err.h>
#include <linux/delay.h>
@@ -524,7 +523,7 @@ int omap_dss_reset(struct omap_hwmod *oh)
for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
if (oc->_clk)
- clk_prepare_enable(oc->_clk);
+ clk_provider_prepare_enable(oc->_clk);
dispc_disable_outputs();
@@ -551,7 +550,7 @@ int omap_dss_reset(struct omap_hwmod *oh)
for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
if (oc->_clk)
- clk_disable_unprepare(oc->_clk);
+ clk_provider_disable_unprepare(oc->_clk);
r = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c
index ac3d789..39c3861 100644
--- a/arch/arm/mach-omap2/dpll3xxx.c
+++ b/arch/arm/mach-omap2/dpll3xxx.c
@@ -23,7 +23,6 @@
#include <linux/list.h>
#include <linux/errno.h>
#include <linux/delay.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include <linux/bitops.h>
#include <linux/clkdev.h>
@@ -288,7 +287,7 @@ static void _lookup_sddiv(struct clk_hw_omap *clk, u8 *sd_div, u16 m, u8 n)
/*
* _omap3_noncore_dpll_program - set non-core DPLL M,N values directly
- * @clk: struct clk * of DPLL to set
+ * @clk: struct clk_core * of DPLL to set
* @freqsel: FREQSEL value to set
*
* Program the DPLL with the last M, N values calculated, and wait for
@@ -410,7 +409,7 @@ int omap3_noncore_dpll_enable(struct clk_hw *hw)
struct clk_hw_omap *clk = to_clk_hw_omap(hw);
int r;
struct dpll_data *dd;
- struct clk *parent;
+ struct clk_core *parent;
dd = clk->dpll_data;
if (!dd)
@@ -461,7 +460,7 @@ void omap3_noncore_dpll_disable(struct clk_hw *hw)
/**
* omap3_noncore_dpll_set_rate - set non-core DPLL rate
- * @clk: struct clk * of DPLL to set
+ * @clk: struct clk_core * of DPLL to set
* @rate: rounded target rate
*
* Set the DPLL CLKOUT to the target rate. If the DPLL can enter
@@ -474,7 +473,7 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate,
unsigned long parent_rate)
{
struct clk_hw_omap *clk = to_clk_hw_omap(hw);
- struct clk *new_parent = NULL;
+ struct clk_core *new_parent = NULL;
unsigned long rrate;
u16 freqsel = 0;
struct dpll_data *dd;
@@ -493,15 +492,15 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate,
__func__, __clk_get_name(hw->clk));
__clk_prepare(dd->clk_bypass);
- clk_enable(dd->clk_bypass);
+ clk_provider_enable(dd->clk_bypass);
ret = _omap3_noncore_dpll_bypass(clk);
if (!ret)
new_parent = dd->clk_bypass;
- clk_disable(dd->clk_bypass);
+ clk_provider_disable(dd->clk_bypass);
__clk_unprepare(dd->clk_bypass);
} else {
__clk_prepare(dd->clk_ref);
- clk_enable(dd->clk_ref);
+ clk_provider_enable(dd->clk_ref);
/* XXX this check is probably pointless in the CCF context */
if (dd->last_rounded_rate != rate) {
@@ -530,7 +529,7 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate,
ret = omap3_noncore_dpll_program(clk, freqsel);
if (!ret)
new_parent = dd->clk_ref;
- clk_disable(dd->clk_ref);
+ clk_provider_disable(dd->clk_ref);
__clk_unprepare(dd->clk_ref);
}
/*
@@ -540,7 +539,7 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate,
* stuff is inherited for free
*/
- if (!ret && clk_get_parent(hw->clk) != new_parent)
+ if (!ret && clk_provider_get_parent(hw->clk) != new_parent)
__clk_reparent(hw->clk, new_parent);
return 0;
@@ -550,10 +549,10 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate,
/**
* omap3_dpll_autoidle_read - read a DPLL's autoidle bits
- * @clk: struct clk * of the DPLL to read
+ * @clk: struct clk_core * of the DPLL to read
*
* Return the DPLL's autoidle bits, shifted down to bit 0. Returns
- * -EINVAL if passed a null pointer or if the struct clk does not
+ * -EINVAL if passed a null pointer or if the struct clk_core does not
* appear to refer to a DPLL.
*/
u32 omap3_dpll_autoidle_read(struct clk_hw_omap *clk)
@@ -578,7 +577,7 @@ u32 omap3_dpll_autoidle_read(struct clk_hw_omap *clk)
/**
* omap3_dpll_allow_idle - enable DPLL autoidle bits
- * @clk: struct clk * of the DPLL to operate on
+ * @clk: struct clk_core * of the DPLL to operate on
*
* Enable DPLL automatic idle control. This automatic idle mode
* switching takes effect only when the DPLL is locked, at least on
@@ -612,7 +611,7 @@ void omap3_dpll_allow_idle(struct clk_hw_omap *clk)
/**
* omap3_dpll_deny_idle - prevent DPLL from automatically idling
- * @clk: struct clk * of the DPLL to operate on
+ * @clk: struct clk_core * of the DPLL to operate on
*
* Disable DPLL automatic idle control. No return value.
*/
@@ -642,7 +641,7 @@ void omap3_dpll_deny_idle(struct clk_hw_omap *clk)
static struct clk_hw_omap *omap3_find_clkoutx2_dpll(struct clk_hw *hw)
{
struct clk_hw_omap *pclk = NULL;
- struct clk *parent;
+ struct clk_core *parent;
/* Walk up the parents of clk, looking for a DPLL */
do {
diff --git a/arch/arm/mach-omap2/dpll44xx.c b/arch/arm/mach-omap2/dpll44xx.c
index 4613f1e..726b254 100644
--- a/arch/arm/mach-omap2/dpll44xx.c
+++ b/arch/arm/mach-omap2/dpll44xx.c
@@ -11,7 +11,6 @@
#include <linux/kernel.h>
#include <linux/errno.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include <linux/bitops.h>
@@ -124,7 +123,7 @@ static void omap4_dpll_lpmode_recalc(struct dpll_data *dd)
/**
* omap4_dpll_regm4xen_recalc - compute DPLL rate, considering REGM4XEN bit
- * @clk: struct clk * of the DPLL to compute the rate for
+ * @clk: struct clk_core * of the DPLL to compute the rate for
*
* Compute the output rate for the OMAP4 DPLL represented by @clk.
* Takes the REGM4XEN bit into consideration, which is needed for the
@@ -156,7 +155,7 @@ unsigned long omap4_dpll_regm4xen_recalc(struct clk_hw *hw,
/**
* omap4_dpll_regm4xen_round_rate - round DPLL rate, considering REGM4XEN bit
- * @clk: struct clk * of the DPLL to round a rate for
+ * @clk: struct clk_core * of the DPLL to round a rate for
* @target_rate: the desired rate of the DPLL
*
* Compute the rate that would be programmed into the DPLL hardware
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index b4ac3af..1424c90 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -12,7 +12,6 @@
*/
#include <linux/module.h>
#include <linux/init.h>
-#include <linux/clk.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/of.h>
@@ -34,7 +33,7 @@
#include "cm3xxx.h"
#include "cm-regbits-34xx.h"
-static struct clk *mcbsp_iclks[5];
+static struct clk_core *mcbsp_iclks[5];
static int omap3_enable_st_clock(unsigned int id, bool enable)
{
@@ -98,7 +97,7 @@ static int __init omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
(struct omap_mcbsp_dev_attr *)(oh->dev_attr))->sidetone);
pdata->enable_st_clock = omap3_enable_st_clock;
sprintf(clk_name, "mcbsp%d_ick", id);
- mcbsp_iclks[id] = clk_get(NULL, clk_name);
+ mcbsp_iclks[id] = clk_provider_get(NULL, clk_name);
count++;
}
pdev = omap_device_build_ss(name, id, oh_device, count, pdata,
diff --git a/arch/arm/mach-omap2/omap_device.c b/arch/arm/mach-omap2/omap_device.c
index f138a62..c5386a4 100644
--- a/arch/arm/mach-omap2/omap_device.c
+++ b/arch/arm/mach-omap2/omap_device.c
@@ -30,7 +30,6 @@
#include <linux/slab.h>
#include <linux/err.h>
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/pm_runtime.h>
@@ -47,7 +46,7 @@
static void _add_clkdev(struct omap_device *od, const char *clk_alias,
const char *clk_name)
{
- struct clk *r;
+ struct clk_core *r;
struct clk_lookup *l;
if (!clk_alias || !clk_name)
@@ -55,15 +54,15 @@ static void _add_clkdev(struct omap_device *od, const char *clk_alias,
dev_dbg(&od->pdev->dev, "Creating %s -> %s\n", clk_alias, clk_name);
- r = clk_get_sys(dev_name(&od->pdev->dev), clk_alias);
+ r = clk_provider_get_sys(dev_name(&od->pdev->dev), clk_alias);
if (!IS_ERR(r)) {
dev_dbg(&od->pdev->dev,
"alias %s already exists\n", clk_alias);
- clk_put(r);
+ __clk_put(r);
return;
}
- r = clk_get(NULL, clk_name);
+ r = clk_provider_get(NULL, clk_name);
if (IS_ERR(r)) {
dev_err(&od->pdev->dev,
"clk_get for %s failed\n", clk_name);
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 8fd87a3..c61b392 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -753,7 +753,7 @@ static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
}
/**
- * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
+ * _init_main_clk - get a struct clk_core * for the the hwmod's main functional clk
* @oh: struct omap_hwmod *
*
* Called from _init_clocks(). Populates the @oh _clk (main
@@ -767,7 +767,7 @@ static int _init_main_clk(struct omap_hwmod *oh)
if (!oh->main_clk)
return 0;
- oh->_clk = clk_get(NULL, oh->main_clk);
+ oh->_clk = clk_provider_get(NULL, oh->main_clk);
if (IS_ERR(oh->_clk)) {
pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
oh->name, oh->main_clk);
@@ -781,7 +781,7 @@ static int _init_main_clk(struct omap_hwmod *oh)
* some point where subsystems like i2c and pmic become
* available.
*/
- clk_prepare(oh->_clk);
+ clk_provider_prepare(oh->_clk);
if (!_get_clkdm(oh))
pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
@@ -791,7 +791,7 @@ static int _init_main_clk(struct omap_hwmod *oh)
}
/**
- * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
+ * _init_interface_clks - get a struct clk_core * for the the hwmod's interface clks
* @oh: struct omap_hwmod *
*
* Called from _init_clocks(). Populates the @oh OCP slave interface
@@ -801,7 +801,7 @@ static int _init_interface_clks(struct omap_hwmod *oh)
{
struct omap_hwmod_ocp_if *os;
struct list_head *p;
- struct clk *c;
+ struct clk_core *c;
int i = 0;
int ret = 0;
@@ -812,7 +812,7 @@ static int _init_interface_clks(struct omap_hwmod *oh)
if (!os->clk)
continue;
- c = clk_get(NULL, os->clk);
+ c = clk_provider_get(NULL, os->clk);
if (IS_ERR(c)) {
pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
oh->name, os->clk);
@@ -828,14 +828,14 @@ static int _init_interface_clks(struct omap_hwmod *oh)
* some point where subsystems like i2c and pmic become
* available.
*/
- clk_prepare(os->_clk);
+ clk_provider_prepare(os->_clk);
}
return ret;
}
/**
- * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
+ * _init_opt_clk - get a struct clk_core * for the the hwmod's optional clocks
* @oh: struct omap_hwmod *
*
* Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
@@ -844,12 +844,12 @@ static int _init_interface_clks(struct omap_hwmod *oh)
static int _init_opt_clks(struct omap_hwmod *oh)
{
struct omap_hwmod_opt_clk *oc;
- struct clk *c;
+ struct clk_core *c;
int i;
int ret = 0;
for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
- c = clk_get(NULL, oc->clk);
+ c = clk_provider_get(NULL, oc->clk);
if (IS_ERR(c)) {
pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
oh->name, oc->clk);
@@ -865,7 +865,7 @@ static int _init_opt_clks(struct omap_hwmod *oh)
* some point where subsystems like i2c and pmic become
* available.
*/
- clk_prepare(oc->_clk);
+ clk_provider_prepare(oc->_clk);
}
return ret;
@@ -887,7 +887,7 @@ static int _enable_clocks(struct omap_hwmod *oh)
pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
if (oh->_clk)
- clk_enable(oh->_clk);
+ clk_provider_enable(oh->_clk);
p = oh->slave_ports.next;
@@ -895,7 +895,7 @@ static int _enable_clocks(struct omap_hwmod *oh)
os = _fetch_next_ocp_if(&p, &i);
if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
- clk_enable(os->_clk);
+ clk_provider_enable(os->_clk);
}
/* The opt clocks are controlled by the device driver. */
@@ -918,7 +918,7 @@ static int _disable_clocks(struct omap_hwmod *oh)
pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
if (oh->_clk)
- clk_disable(oh->_clk);
+ clk_provider_disable(oh->_clk);
p = oh->slave_ports.next;
@@ -926,7 +926,7 @@ static int _disable_clocks(struct omap_hwmod *oh)
os = _fetch_next_ocp_if(&p, &i);
if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
- clk_disable(os->_clk);
+ clk_provider_disable(os->_clk);
}
/* The opt clocks are controlled by the device driver. */
@@ -945,7 +945,7 @@ static void _enable_optional_clocks(struct omap_hwmod *oh)
if (oc->_clk) {
pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
__clk_get_name(oc->_clk));
- clk_enable(oc->_clk);
+ clk_provider_enable(oc->_clk);
}
}
@@ -960,7 +960,7 @@ static void _disable_optional_clocks(struct omap_hwmod *oh)
if (oc->_clk) {
pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
__clk_get_name(oc->_clk));
- clk_disable(oc->_clk);
+ clk_provider_disable(oc->_clk);
}
}
@@ -2589,7 +2589,7 @@ static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
/* XXX omap_iclk_deny_idle(c); */
} else {
/* XXX omap_iclk_allow_idle(c); */
- clk_enable(os->_clk);
+ clk_provider_enable(os->_clk);
}
}
@@ -3396,7 +3396,7 @@ static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
* Initialize and set up a single hwmod. Intended to be used for a
* small number of early devices, such as the timer IP blocks used for
* the scheduler clock. Must be called after omap2_clk_init().
- * Resolves the struct clk names to struct clk pointers for each
+ * Resolves the struct clk_core names to struct clk_core pointers for each
* registered omap_hwmod. Also calls _setup() on each hwmod. Returns
* -EINVAL upon error or 0 upon success.
*/
@@ -3425,7 +3425,7 @@ int __init omap_hwmod_setup_one(const char *oh_name)
*
* Initialize and set up all IP blocks registered with the hwmod code.
* Must be called after omap2_clk_init(). Resolves the struct clk
- * names to struct clk pointers for each registered omap_hwmod. Also
+ * names to struct clk_core pointers for each registered omap_hwmod. Also
* calls _setup() on each hwmod. Returns 0 upon success.
*/
static int __init omap_hwmod_setup_all(void)
@@ -3792,7 +3792,7 @@ int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
*/
struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
{
- struct clk *c;
+ struct clk_core *c;
struct omap_hwmod_ocp_if *oi;
struct clockdomain *clkdm;
struct clk_hw_omap *clk;
diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h
index 0f97d63..46ffd06 100644
--- a/arch/arm/mach-omap2/omap_hwmod.h
+++ b/arch/arm/mach-omap2/omap_hwmod.h
@@ -207,7 +207,7 @@ struct omap_hwmod_rst_info {
* struct omap_hwmod_opt_clk - optional clocks used by this hwmod
* @role: "sys", "32k", "tv", etc -- for use in clk_get()
* @clk: opt clock: OMAP clock name
- * @_clk: pointer to the struct clk (filled in at runtime)
+ * @_clk: pointer to the struct clk_core (filled in at runtime)
*
* The module's interface clock and main functional clock should not
* be added as optional clocks.
@@ -215,7 +215,7 @@ struct omap_hwmod_rst_info {
struct omap_hwmod_opt_clk {
const char *role;
const char *clk;
- struct clk *_clk;
+ struct clk_core *_clk;
};
@@ -289,7 +289,7 @@ struct omap_hwmod_addr_space {
* @slave: struct omap_hwmod that responds to OCP transactions on this link
* @addr: address space associated with this link
* @clk: interface clock: OMAP clock name
- * @_clk: pointer to the interface struct clk (filled in at runtime)
+ * @_clk: pointer to the interface struct clk_core (filled in at runtime)
* @fw: interface firewall data
* @width: OCP data width
* @user: initiators using this interface (see OCP_USER_* macros above)
@@ -306,7 +306,7 @@ struct omap_hwmod_ocp_if {
struct omap_hwmod *slave;
struct omap_hwmod_addr_space *addr;
const char *clk;
- struct clk *_clk;
+ struct clk_core *_clk;
union {
struct omap_hwmod_omap2_firewall omap2;
} fw;
@@ -611,7 +611,7 @@ struct omap_hwmod_link {
* @sdma_reqs: ptr to an array of System DMA request IDs
* @prcm: PRCM data pertaining to this hwmod
* @main_clk: main clock: OMAP clock name
- * @_clk: pointer to the main struct clk (filled in at runtime)
+ * @_clk: pointer to the main struct clk_core (filled in at runtime)
* @opt_clks: other device clocks that drivers can request (0..*)
* @voltdm: pointer to voltage domain (filled in at runtime)
* @dev_attr: arbitrary device attributes that can be passed to the driver
@@ -653,7 +653,7 @@ struct omap_hwmod {
struct omap_hwmod_omap4_prcm omap4;
} prcm;
const char *main_clk;
- struct clk *_clk;
+ struct clk_core *_clk;
struct omap_hwmod_opt_clk *opt_clks;
char *clkdm_name;
struct clockdomain *clkdm;
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index fe01c5a..56e5e77 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -60,7 +60,7 @@ static void (*omap2_sram_suspend)(u32 dllctrl, void __iomem *sdrc_dlla_ctrl,
static struct powerdomain *mpu_pwrdm, *core_pwrdm;
static struct clockdomain *dsp_clkdm, *mpu_clkdm, *wkup_clkdm, *gfx_clkdm;
-static struct clk *osc_ck, *emul_ck;
+static struct clk_core *osc_ck, *emul_ck;
static int omap2_enter_full_retention(void)
{
@@ -71,7 +71,7 @@ static int omap2_enter_full_retention(void)
* oscillator itself it will be disabled if/when we enter retention
* mode.
*/
- clk_disable(osc_ck);
+ clk_provider_disable(osc_ck);
/* Clear old wake-up events */
/* REVISIT: These write to reserved bits? */
@@ -101,7 +101,7 @@ static int omap2_enter_full_retention(void)
no_sleep:
omap2_gpio_resume_after_idle();
- clk_enable(osc_ck);
+ clk_provider_enable(osc_ck);
/* clear CORE wake-up events */
omap2xxx_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0);
@@ -287,17 +287,17 @@ int __init omap2_pm_init(void)
pr_err("PM: gfx_clkdm not found\n");
- osc_ck = clk_get(NULL, "osc_ck");
+ osc_ck = clk_provider_get(NULL, "osc_ck");
if (IS_ERR(osc_ck)) {
printk(KERN_ERR "could not get osc_ck\n");
return -ENODEV;
}
if (cpu_is_omap242x()) {
- emul_ck = clk_get(NULL, "emul_ck");
+ emul_ck = clk_provider_get(NULL, "emul_ck");
if (IS_ERR(emul_ck)) {
printk(KERN_ERR "could not get emul_ck\n");
- clk_put(osc_ck);
+ __clk_put(osc_ck);
return -ENODEV;
}
}
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 6bbb7b5..6be2d2d 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -62,7 +62,7 @@ void __init orion5x_map_io(void)
/*****************************************************************************
* CLK tree
****************************************************************************/
-static struct clk *tclk;
+static struct clk_core *tclk;
void __init clk_init(void)
{
diff --git a/arch/arm/mach-shmobile/clock.c b/arch/arm/mach-shmobile/clock.c
index ed415dc..827f746 100644
--- a/arch/arm/mach-shmobile/clock.c
+++ b/arch/arm/mach-shmobile/clock.c
@@ -23,7 +23,6 @@
#include <linux/init.h>
#ifdef CONFIG_COMMON_CLK
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include "clock.h"
@@ -32,17 +31,17 @@ void __init shmobile_clk_workaround(const struct clk_name *clks,
int nr_clks, bool enable)
{
const struct clk_name *clkn;
- struct clk *clk;
+ struct clk_core *clk;
unsigned int i;
for (i = 0; i < nr_clks; ++i) {
clkn = clks + i;
- clk = clk_get(NULL, clkn->clk);
+ clk = clk_provider_get(NULL, clkn->clk);
if (!IS_ERR(clk)) {
clk_register_clkdev(clk, clkn->con_id, clkn->dev_id);
if (enable)
- clk_prepare_enable(clk);
- clk_put(clk);
+ clk_provider_prepare_enable(clk);
+ __clk_put(clk);
}
}
}
diff --git a/arch/arm/mach-vexpress/spc.c b/arch/arm/mach-vexpress/spc.c
index f61158c..e497df6 100644
--- a/arch/arm/mach-vexpress/spc.c
+++ b/arch/arm/mach-vexpress/spc.c
@@ -529,7 +529,7 @@ static struct clk_ops clk_spc_ops = {
.set_rate = spc_set_rate,
};
-static struct clk *ve_spc_clk_register(struct device *cpu_dev)
+static struct clk_core *ve_spc_clk_register(struct device *cpu_dev)
{
struct clk_init_data init;
struct clk_spc *spc;
@@ -556,7 +556,7 @@ static struct clk *ve_spc_clk_register(struct device *cpu_dev)
static int __init ve_spc_clk_init(void)
{
int cpu;
- struct clk *clk;
+ struct clk_core *clk;
if (!info)
return 0; /* Continue only if SPC is initialised */
diff --git a/arch/arm/plat-orion/common.c b/arch/arm/plat-orion/common.c
index 961b593..abf63ce 100644
--- a/arch/arm/plat-orion/common.c
+++ b/arch/arm/plat-orion/common.c
@@ -14,7 +14,6 @@
#include <linux/dma-mapping.h>
#include <linux/serial_8250.h>
#include <linux/ata_platform.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/mv643xx_eth.h>
@@ -27,7 +26,7 @@
/* Create a clkdev entry for a given device/clk */
void __init orion_clkdev_add(const char *con_id, const char *dev_id,
- struct clk *clk)
+ struct clk_core *clk)
{
struct clk_lookup *cl;
@@ -40,7 +39,7 @@ void __init orion_clkdev_add(const char *con_id, const char *dev_id,
Kirkwood has gated clocks for some of its peripherals, so creates
its own clkdev entries. For all the other orion devices, create
clkdev entries to the tclk. */
-void __init orion_clkdev_init(struct clk *tclk)
+void __init orion_clkdev_init(struct clk_core *tclk)
{
orion_clkdev_add(NULL, "orion_spi.0", tclk);
orion_clkdev_add(NULL, "orion_spi.1", tclk);
@@ -78,10 +77,10 @@ static void fill_resources(struct platform_device *device,
/*****************************************************************************
* UART
****************************************************************************/
-static unsigned long __init uart_get_clk_rate(struct clk *clk)
+static unsigned long __init uart_get_clk_rate(struct clk_core *clk)
{
- clk_prepare_enable(clk);
- return clk_get_rate(clk);
+ clk_provider_prepare_enable(clk);
+ return clk_provider_get_rate(clk);
}
static void __init uart_complete(
@@ -91,7 +90,7 @@ static void __init uart_complete(
void __iomem *membase,
resource_size_t mapbase,
unsigned int irq,
- struct clk *clk)
+ struct clk_core *clk)
{
data->mapbase = mapbase;
data->membase = membase;
@@ -125,7 +124,7 @@ static struct platform_device orion_uart0 = {
void __init orion_uart0_init(void __iomem *membase,
resource_size_t mapbase,
unsigned int irq,
- struct clk *clk)
+ struct clk_core *clk)
{
uart_complete(&orion_uart0, orion_uart0_data, orion_uart0_resources,
membase, mapbase, irq, clk);
@@ -153,7 +152,7 @@ static struct platform_device orion_uart1 = {
void __init orion_uart1_init(void __iomem *membase,
resource_size_t mapbase,
unsigned int irq,
- struct clk *clk)
+ struct clk_core *clk)
{
uart_complete(&orion_uart1, orion_uart1_data, orion_uart1_resources,
membase, mapbase, irq, clk);
@@ -181,7 +180,7 @@ static struct platform_device orion_uart2 = {
void __init orion_uart2_init(void __iomem *membase,
resource_size_t mapbase,
unsigned int irq,
- struct clk *clk)
+ struct clk_core *clk)
{
uart_complete(&orion_uart2, orion_uart2_data, orion_uart2_resources,
membase, mapbase, irq, clk);
@@ -209,7 +208,7 @@ static struct platform_device orion_uart3 = {
void __init orion_uart3_init(void __iomem *membase,
resource_size_t mapbase,
unsigned int irq,
- struct clk *clk)
+ struct clk_core *clk)
{
uart_complete(&orion_uart3, orion_uart3_data, orion_uart3_resources,
membase, mapbase, irq, clk);
diff --git a/arch/arm/plat-orion/include/plat/common.h b/arch/arm/plat-orion/include/plat/common.h
index d9a24f6..44f1bbe 100644
--- a/arch/arm/plat-orion/include/plat/common.h
+++ b/arch/arm/plat-orion/include/plat/common.h
@@ -18,22 +18,22 @@ struct mv_sata_platform_data;
void __init orion_uart0_init(void __iomem *membase,
resource_size_t mapbase,
unsigned int irq,
- struct clk *clk);
+ struct clk_core *clk);
void __init orion_uart1_init(void __iomem *membase,
resource_size_t mapbase,
unsigned int irq,
- struct clk *clk);
+ struct clk_core *clk);
void __init orion_uart2_init(void __iomem *membase,
resource_size_t mapbase,
unsigned int irq,
- struct clk *clk);
+ struct clk_core *clk);
void __init orion_uart3_init(void __iomem *membase,
resource_size_t mapbase,
unsigned int irq,
- struct clk *clk);
+ struct clk_core *clk);
void __init orion_rtc_init(unsigned long mapbase,
unsigned long irq);
@@ -107,7 +107,7 @@ void __init orion_crypto_init(unsigned long mapbase,
unsigned long irq);
void __init orion_clkdev_add(const char *con_id, const char *dev_id,
- struct clk *clk);
+ struct clk_core *clk);
-void __init orion_clkdev_init(struct clk *tclk);
+void __init orion_clkdev_init(struct clk_core *tclk);
#endif
diff --git a/arch/powerpc/platforms/512x/clock-commonclk.c b/arch/powerpc/platforms/512x/clock-commonclk.c
index 6eb614a..81afe83 100644
--- a/arch/powerpc/platforms/512x/clock-commonclk.c
+++ b/arch/powerpc/platforms/512x/clock-commonclk.c
@@ -70,7 +70,7 @@ enum {
};
/* data required for the OF clock provider registration */
-static struct clk *clks[MPC512x_CLK_LAST_PRIVATE];
+static struct clk_core *clks[MPC512x_CLK_LAST_PRIVATE];
static struct clk_onecell_data clk_data;
/* CCM register access */
@@ -218,12 +218,12 @@ static bool soc_has_mclk_mux0_canin(void)
/* common clk API wrappers {{{ */
/* convenience wrappers around the common clk API */
-static inline struct clk *mpc512x_clk_fixed(const char *name, int rate)
+static inline struct clk_core *mpc512x_clk_fixed(const char *name, int rate)
{
return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate);
}
-static inline struct clk *mpc512x_clk_factor(
+static inline struct clk_core *mpc512x_clk_factor(
const char *name, const char *parent_name,
int mul, int div)
{
@@ -234,7 +234,7 @@ static inline struct clk *mpc512x_clk_factor(
mul, div);
}
-static inline struct clk *mpc512x_clk_divider(
+static inline struct clk_core *mpc512x_clk_divider(
const char *name, const char *parent_name, u8 clkflags,
u32 __iomem *reg, u8 pos, u8 len, int divflags)
{
@@ -242,7 +242,7 @@ static inline struct clk *mpc512x_clk_divider(
reg, pos, len, divflags, &clklock);
}
-static inline struct clk *mpc512x_clk_divtable(
+static inline struct clk_core *mpc512x_clk_divtable(
const char *name, const char *parent_name,
u32 __iomem *reg, u8 pos, u8 len,
const struct clk_div_table *divtab)
@@ -255,7 +255,7 @@ static inline struct clk *mpc512x_clk_divtable(
divtab, &clklock);
}
-static inline struct clk *mpc512x_clk_gated(
+static inline struct clk_core *mpc512x_clk_gated(
const char *name, const char *parent_name,
u32 __iomem *reg, u8 pos)
{
@@ -266,7 +266,7 @@ static inline struct clk *mpc512x_clk_gated(
reg, pos, 0, &clklock);
}
-static inline struct clk *mpc512x_clk_muxed(const char *name,
+static inline struct clk_core *mpc512x_clk_muxed(const char *name,
const char **parent_names, int parent_count,
u32 __iomem *reg, u8 pos, u8 len)
{
@@ -422,7 +422,7 @@ static void mpc512x_clk_setup_ref_clock(struct device_node *np, int bus_freq,
int *sys_mul, int *sys_div,
int *ips_div)
{
- struct clk *osc_clk;
+ struct clk_core *osc_clk;
int calc_freq;
/* fetch mul/div factors from the hardware */
@@ -432,7 +432,7 @@ static void mpc512x_clk_setup_ref_clock(struct device_node *np, int bus_freq,
*ips_div = get_bit_field(&clkregs->scfr1, 23, 3);
/* lookup the oscillator clock for its rate */
- osc_clk = of_clk_get_by_name(np, "osc");
+ osc_clk = of_clk_provider_get_by_name(np, "osc");
/*
* either descend from OSC to REF (and in bypassing verify the
@@ -444,7 +444,7 @@ static void mpc512x_clk_setup_ref_clock(struct device_node *np, int bus_freq,
*/
if (!IS_ERR(osc_clk)) {
clks[MPC512x_CLK_REF] = mpc512x_clk_factor("ref", "osc", 1, 1);
- calc_freq = clk_get_rate(clks[MPC512x_CLK_REF]);
+ calc_freq = clk_provider_get_rate(clks[MPC512x_CLK_REF]);
calc_freq *= *sys_mul;
calc_freq /= *sys_div;
calc_freq /= 2;
@@ -647,8 +647,8 @@ static void mpc512x_clk_setup_mclk(struct mclk_setup_data *entry, size_t idx)
* - MCLK 0 enabled
* - MCLK 1 from MCLK DIV
*/
- div = clk_get_rate(clks[MPC512x_CLK_SYS]);
- div /= clk_get_rate(clks[MPC512x_CLK_IPS]);
+ div = clk_provider_get_rate(clks[MPC512x_CLK_SYS]);
+ div /= clk_provider_get_rate(clks[MPC512x_CLK_IPS]);
out_be32(mccr_reg, (0 << 16));
out_be32(mccr_reg, (0 << 16) | ((div - 1) << 17));
out_be32(mccr_reg, (1 << 16) | ((div - 1) << 17));
@@ -925,12 +925,12 @@ static void mpc512x_clk_setup_clock_tree(struct device_node *np, int busfreq)
* claimed by any peripheral driver, to not have the clock
* subsystem disable them late at startup
*/
- clk_prepare_enable(clks[MPC512x_CLK_DUMMY]);
- clk_prepare_enable(clks[MPC512x_CLK_E300]); /* PowerPC CPU */
- clk_prepare_enable(clks[MPC512x_CLK_DDR]); /* DRAM */
- clk_prepare_enable(clks[MPC512x_CLK_MEM]); /* SRAM */
- clk_prepare_enable(clks[MPC512x_CLK_IPS]); /* SoC periph */
- clk_prepare_enable(clks[MPC512x_CLK_LPC]); /* boot media */
+ clk_provider_prepare_enable(clks[MPC512x_CLK_DUMMY]);
+ clk_provider_prepare_enable(clks[MPC512x_CLK_E300]); /* PowerPC CPU */
+ clk_provider_prepare_enable(clks[MPC512x_CLK_DDR]); /* DRAM */
+ clk_provider_prepare_enable(clks[MPC512x_CLK_MEM]); /* SRAM */
+ clk_provider_prepare_enable(clks[MPC512x_CLK_IPS]); /* SoC periph */
+ clk_provider_prepare_enable(clks[MPC512x_CLK_LPC]); /* boot media */
}
/*
@@ -969,9 +969,9 @@ static void mpc5121_clk_provide_migration_support(void)
* has attached to bridges, otherwise the PCI clock remains
* unused and so it gets disabled
*/
- clk_prepare_enable(clks[MPC512x_CLK_PSC3_MCLK]);/* serial console */
+ clk_provider_prepare_enable(clks[MPC512x_CLK_PSC3_MCLK]);/* serial console */
if (of_find_compatible_node(NULL, "pci", "fsl,mpc5121-pci"))
- clk_prepare_enable(clks[MPC512x_CLK_PCI]);
+ clk_provider_prepare_enable(clks[MPC512x_CLK_PCI]);
}
/*
@@ -988,8 +988,8 @@ static void mpc5121_clk_provide_migration_support(void)
} while (0)
#define NODE_CHK(clkname, clkitem, regnode, regflag) do { \
- struct clk *clk; \
- clk = of_clk_get_by_name(np, clkname); \
+ struct clk_core *clk; \
+ clk = of_clk_provider_get_by_name(np, clkname); \
if (IS_ERR(clk)) { \
clk = clkitem; \
clk_register_clkdev(clk, clkname, devname); \
@@ -999,7 +999,7 @@ static void mpc5121_clk_provide_migration_support(void)
pr_debug("clock alias name '%s' for dev '%s' pointer %p\n", \
clkname, devname, clk); \
} else { \
- clk_put(clk); \
+ __clk_put(clk); \
} \
} while (0)
@@ -1090,7 +1090,7 @@ static void mpc5121_clk_provide_backwards_compat(void)
* workaround obsolete
*/
if (did_register & DID_REG_I2C)
- clk_prepare_enable(clks[MPC512x_CLK_I2C]);
+ clk_provider_prepare_enable(clks[MPC512x_CLK_I2C]);
FOR_NODES("fsl,mpc5121-diu") {
NODE_PREP;
diff --git a/drivers/clk/at91/clk-main.c b/drivers/clk/at91/clk-main.c
index 59fa3cc..11bcdb1 100644
--- a/drivers/clk/at91/clk-main.c
+++ b/drivers/clk/at91/clk-main.c
@@ -138,7 +138,7 @@ static const struct clk_ops main_osc_ops = {
.is_prepared = clk_main_osc_is_prepared,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_main_osc(struct at91_pmc *pmc,
unsigned int irq,
const char *name,
@@ -147,7 +147,7 @@ at91_clk_register_main_osc(struct at91_pmc *pmc,
{
int ret;
struct clk_main_osc *osc;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
if (!pmc || !irq || !name || !parent_name)
@@ -192,7 +192,7 @@ at91_clk_register_main_osc(struct at91_pmc *pmc,
void __init of_at91rm9200_clk_main_osc_setup(struct device_node *np,
struct at91_pmc *pmc)
{
- struct clk *clk;
+ struct clk_core *clk;
unsigned int irq;
const char *name = np->name;
const char *parent_name;
@@ -291,7 +291,7 @@ static const struct clk_ops main_rc_osc_ops = {
.recalc_accuracy = clk_main_rc_osc_recalc_accuracy,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_main_rc_osc(struct at91_pmc *pmc,
unsigned int irq,
const char *name,
@@ -299,7 +299,7 @@ at91_clk_register_main_rc_osc(struct at91_pmc *pmc,
{
int ret;
struct clk_main_rc_osc *osc;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
if (!pmc || !irq || !name || !frequency)
@@ -340,7 +340,7 @@ at91_clk_register_main_rc_osc(struct at91_pmc *pmc,
void __init of_at91sam9x5_clk_main_rc_osc_setup(struct device_node *np,
struct at91_pmc *pmc)
{
- struct clk *clk;
+ struct clk_core *clk;
unsigned int irq;
u32 frequency = 0;
u32 accuracy = 0;
@@ -424,13 +424,13 @@ static const struct clk_ops rm9200_main_ops = {
.recalc_rate = clk_rm9200_main_recalc_rate,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_rm9200_main(struct at91_pmc *pmc,
const char *name,
const char *parent_name)
{
struct clk_rm9200_main *clkmain;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
if (!pmc || !name)
@@ -462,7 +462,7 @@ at91_clk_register_rm9200_main(struct at91_pmc *pmc,
void __init of_at91rm9200_clk_main_setup(struct device_node *np,
struct at91_pmc *pmc)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name;
const char *name = np->name;
@@ -555,7 +555,7 @@ static const struct clk_ops sam9x5_main_ops = {
.get_parent = clk_sam9x5_main_get_parent,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_sam9x5_main(struct at91_pmc *pmc,
unsigned int irq,
const char *name,
@@ -564,7 +564,7 @@ at91_clk_register_sam9x5_main(struct at91_pmc *pmc,
{
int ret;
struct clk_sam9x5_main *clkmain;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
if (!pmc || !irq || !name)
@@ -607,7 +607,7 @@ at91_clk_register_sam9x5_main(struct at91_pmc *pmc,
void __init of_at91sam9x5_clk_main_setup(struct device_node *np,
struct at91_pmc *pmc)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_names[2];
int num_parents;
unsigned int irq;
diff --git a/drivers/clk/at91/clk-master.c b/drivers/clk/at91/clk-master.c
index c1af80b..95ae1b6 100644
--- a/drivers/clk/at91/clk-master.c
+++ b/drivers/clk/at91/clk-master.c
@@ -131,7 +131,7 @@ static const struct clk_ops master_ops = {
.get_parent = clk_master_get_parent,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_master(struct at91_pmc *pmc, unsigned int irq,
const char *name, int num_parents,
const char **parent_names,
@@ -140,7 +140,7 @@ at91_clk_register_master(struct at91_pmc *pmc, unsigned int irq,
{
int ret;
struct clk_master *master;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
if (!pmc || !irq || !name || !num_parents || !parent_names)
@@ -216,7 +216,7 @@ static void __init
of_at91_clk_master_setup(struct device_node *np, struct at91_pmc *pmc,
const struct clk_master_layout *layout)
{
- struct clk *clk;
+ struct clk_core *clk;
int num_parents;
int i;
unsigned int irq;
diff --git a/drivers/clk/at91/clk-peripheral.c b/drivers/clk/at91/clk-peripheral.c
index 597fed4..cdf8e8a 100644
--- a/drivers/clk/at91/clk-peripheral.c
+++ b/drivers/clk/at91/clk-peripheral.c
@@ -100,12 +100,12 @@ static const struct clk_ops peripheral_ops = {
.is_enabled = clk_peripheral_is_enabled,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_peripheral(struct at91_pmc *pmc, const char *name,
const char *parent_name, u32 id)
{
struct clk_peripheral *periph;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
if (!pmc || !name || !parent_name || id > PERIPHERAL_ID_MAX)
@@ -134,7 +134,7 @@ at91_clk_register_peripheral(struct at91_pmc *pmc, const char *name,
static void clk_sam9x5_peripheral_autodiv(struct clk_sam9x5_peripheral *periph)
{
- struct clk *parent;
+ struct clk_core *parent;
unsigned long parent_rate;
int shift = 0;
@@ -309,13 +309,13 @@ static const struct clk_ops sam9x5_peripheral_ops = {
.set_rate = clk_sam9x5_peripheral_set_rate,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_sam9x5_peripheral(struct at91_pmc *pmc, const char *name,
const char *parent_name, u32 id,
const struct clk_range *range)
{
struct clk_sam9x5_peripheral *periph;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
if (!pmc || !name || !parent_name)
@@ -352,7 +352,7 @@ of_at91_clk_periph_setup(struct device_node *np, struct at91_pmc *pmc, u8 type)
{
int num;
u32 id;
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name;
const char *name;
struct device_node *periphclknp;
diff --git a/drivers/clk/at91/clk-pll.c b/drivers/clk/at91/clk-pll.c
index 6ec79db..6a1b900 100644
--- a/drivers/clk/at91/clk-pll.c
+++ b/drivers/clk/at91/clk-pll.c
@@ -299,14 +299,14 @@ static const struct clk_ops pll_ops = {
.set_rate = clk_pll_set_rate,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_pll(struct at91_pmc *pmc, unsigned int irq, const char *name,
const char *parent_name, u8 id,
const struct clk_pll_layout *layout,
const struct clk_pll_characteristics *characteristics)
{
struct clk_pll *pll;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
int ret;
int offset = PLL_REG(id);
@@ -476,7 +476,7 @@ of_at91_clk_pll_setup(struct device_node *np, struct at91_pmc *pmc,
{
u32 id;
unsigned int irq;
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name;
const char *name = np->name;
struct clk_pll_characteristics *characteristics;
diff --git a/drivers/clk/at91/clk-plldiv.c b/drivers/clk/at91/clk-plldiv.c
index ea22656..f8204d8 100644
--- a/drivers/clk/at91/clk-plldiv.c
+++ b/drivers/clk/at91/clk-plldiv.c
@@ -79,12 +79,12 @@ static const struct clk_ops plldiv_ops = {
.set_rate = clk_plldiv_set_rate,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_plldiv(struct at91_pmc *pmc, const char *name,
const char *parent_name)
{
struct clk_plldiv *plldiv;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
plldiv = kzalloc(sizeof(*plldiv), GFP_KERNEL);
@@ -111,7 +111,7 @@ at91_clk_register_plldiv(struct at91_pmc *pmc, const char *name,
static void __init
of_at91_clk_plldiv_setup(struct device_node *np, struct at91_pmc *pmc)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name;
const char *name = np->name;
diff --git a/drivers/clk/at91/clk-programmable.c b/drivers/clk/at91/clk-programmable.c
index 62e2509..b72e98c 100644
--- a/drivers/clk/at91/clk-programmable.c
+++ b/drivers/clk/at91/clk-programmable.c
@@ -57,9 +57,9 @@ static unsigned long clk_programmable_recalc_rate(struct clk_hw *hw,
static long clk_programmable_determine_rate(struct clk_hw *hw,
unsigned long rate,
unsigned long *best_parent_rate,
- struct clk **best_parent_clk)
+ struct clk_core **best_parent_clk)
{
- struct clk *parent = NULL;
+ struct clk_core *parent = NULL;
long best_rate = -EINVAL;
unsigned long parent_rate;
unsigned long tmp_rate;
@@ -169,14 +169,14 @@ static const struct clk_ops programmable_ops = {
.set_rate = clk_programmable_set_rate,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_programmable(struct at91_pmc *pmc,
const char *name, const char **parent_names,
u8 num_parents, u8 id,
const struct clk_programmable_layout *layout)
{
struct clk_programmable *prog;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
if (id > PROG_ID_MAX)
@@ -229,7 +229,7 @@ of_at91_clk_prog_setup(struct device_node *np, struct at91_pmc *pmc,
int num;
u32 id;
int i;
- struct clk *clk;
+ struct clk_core *clk;
int num_parents;
const char *parent_names[PROG_SOURCE_MAX];
const char *name;
diff --git a/drivers/clk/at91/clk-slow.c b/drivers/clk/at91/clk-slow.c
index 0300c46..d50fe02 100644
--- a/drivers/clk/at91/clk-slow.c
+++ b/drivers/clk/at91/clk-slow.c
@@ -117,7 +117,7 @@ static const struct clk_ops slow_osc_ops = {
.is_prepared = clk_slow_osc_is_prepared,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_slow_osc(void __iomem *sckcr,
const char *name,
const char *parent_name,
@@ -125,7 +125,7 @@ at91_clk_register_slow_osc(void __iomem *sckcr,
bool bypass)
{
struct clk_slow_osc *osc;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
if (!sckcr || !name || !parent_name)
@@ -159,7 +159,7 @@ at91_clk_register_slow_osc(void __iomem *sckcr,
void __init of_at91sam9x5_clk_slow_osc_setup(struct device_node *np,
void __iomem *sckcr)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name;
const char *name = np->name;
u32 startup;
@@ -229,7 +229,7 @@ static const struct clk_ops slow_rc_osc_ops = {
.recalc_accuracy = clk_slow_rc_osc_recalc_accuracy,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_slow_rc_osc(void __iomem *sckcr,
const char *name,
unsigned long frequency,
@@ -237,7 +237,7 @@ at91_clk_register_slow_rc_osc(void __iomem *sckcr,
unsigned long startup)
{
struct clk_slow_rc_osc *osc;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
if (!sckcr || !name)
@@ -269,7 +269,7 @@ at91_clk_register_slow_rc_osc(void __iomem *sckcr,
void __init of_at91sam9x5_clk_slow_rc_osc_setup(struct device_node *np,
void __iomem *sckcr)
{
- struct clk *clk;
+ struct clk_core *clk;
u32 frequency = 0;
u32 accuracy = 0;
u32 startup = 0;
@@ -327,14 +327,14 @@ static const struct clk_ops sam9x5_slow_ops = {
.get_parent = clk_sam9x5_slow_get_parent,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_sam9x5_slow(void __iomem *sckcr,
const char *name,
const char **parent_names,
int num_parents)
{
struct clk_sam9x5_slow *slowck;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
if (!sckcr || !name || !parent_names || !num_parents)
@@ -364,7 +364,7 @@ at91_clk_register_sam9x5_slow(void __iomem *sckcr,
void __init of_at91sam9x5_clk_slow_setup(struct device_node *np,
void __iomem *sckcr)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_names[2];
int num_parents;
const char *name = np->name;
@@ -401,14 +401,14 @@ static const struct clk_ops sam9260_slow_ops = {
.get_parent = clk_sam9260_slow_get_parent,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_sam9260_slow(struct at91_pmc *pmc,
const char *name,
const char **parent_names,
int num_parents)
{
struct clk_sam9260_slow *slowck;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
if (!pmc || !name)
@@ -440,7 +440,7 @@ at91_clk_register_sam9260_slow(struct at91_pmc *pmc,
void __init of_at91sam9260_clk_slow_setup(struct device_node *np,
struct at91_pmc *pmc)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_names[2];
int num_parents;
const char *name = np->name;
diff --git a/drivers/clk/at91/clk-smd.c b/drivers/clk/at91/clk-smd.c
index 144d47e..8820b84 100644
--- a/drivers/clk/at91/clk-smd.c
+++ b/drivers/clk/at91/clk-smd.c
@@ -113,12 +113,12 @@ static const struct clk_ops at91sam9x5_smd_ops = {
.set_rate = at91sam9x5_clk_smd_set_rate,
};
-static struct clk * __init
+static struct clk_core * __init
at91sam9x5_clk_register_smd(struct at91_pmc *pmc, const char *name,
const char **parent_names, u8 num_parents)
{
struct at91sam9x5_clk_smd *smd;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
smd = kzalloc(sizeof(*smd), GFP_KERNEL);
@@ -144,7 +144,7 @@ at91sam9x5_clk_register_smd(struct at91_pmc *pmc, const char *name,
void __init of_at91sam9x5_clk_smd_setup(struct device_node *np,
struct at91_pmc *pmc)
{
- struct clk *clk;
+ struct clk_core *clk;
int i;
int num_parents;
const char *parent_names[SMD_SOURCE_MAX];
diff --git a/drivers/clk/at91/clk-system.c b/drivers/clk/at91/clk-system.c
index 8c96307..770d9bf 100644
--- a/drivers/clk/at91/clk-system.c
+++ b/drivers/clk/at91/clk-system.c
@@ -99,12 +99,12 @@ static const struct clk_ops system_ops = {
.is_prepared = clk_system_is_prepared,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_system(struct at91_pmc *pmc, const char *name,
const char *parent_name, u8 id, int irq)
{
struct clk_system *sys;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
int ret;
@@ -153,7 +153,7 @@ of_at91_clk_sys_setup(struct device_node *np, struct at91_pmc *pmc)
int num;
int irq = 0;
u32 id;
- struct clk *clk;
+ struct clk_core *clk;
const char *name;
struct device_node *sysclknp;
const char *parent_name;
diff --git a/drivers/clk/at91/clk-usb.c b/drivers/clk/at91/clk-usb.c
index 24b5b02..94b5871 100644
--- a/drivers/clk/at91/clk-usb.c
+++ b/drivers/clk/at91/clk-usb.c
@@ -162,12 +162,12 @@ static const struct clk_ops at91sam9n12_usb_ops = {
.set_rate = at91sam9x5_clk_usb_set_rate,
};
-static struct clk * __init
+static struct clk_core * __init
at91sam9x5_clk_register_usb(struct at91_pmc *pmc, const char *name,
const char **parent_names, u8 num_parents)
{
struct at91sam9x5_clk_usb *usb;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
usb = kzalloc(sizeof(*usb), GFP_KERNEL);
@@ -190,12 +190,12 @@ at91sam9x5_clk_register_usb(struct at91_pmc *pmc, const char *name,
return clk;
}
-static struct clk * __init
+static struct clk_core * __init
at91sam9n12_clk_register_usb(struct at91_pmc *pmc, const char *name,
const char *parent_name)
{
struct at91sam9x5_clk_usb *usb;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
usb = kzalloc(sizeof(*usb), GFP_KERNEL);
@@ -238,7 +238,7 @@ static long at91rm9200_clk_usb_round_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *parent_rate)
{
struct at91rm9200_clk_usb *usb = to_at91rm9200_clk_usb(hw);
- struct clk *parent = __clk_get_parent(hw->clk);
+ struct clk_core *parent = __clk_get_parent(hw->clk);
unsigned long bestrate = 0;
int bestdiff = -1;
unsigned long tmprate;
@@ -305,12 +305,12 @@ static const struct clk_ops at91rm9200_usb_ops = {
.set_rate = at91rm9200_clk_usb_set_rate,
};
-static struct clk * __init
+static struct clk_core * __init
at91rm9200_clk_register_usb(struct at91_pmc *pmc, const char *name,
const char *parent_name, const u32 *divisors)
{
struct at91rm9200_clk_usb *usb;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
usb = kzalloc(sizeof(*usb), GFP_KERNEL);
@@ -337,7 +337,7 @@ at91rm9200_clk_register_usb(struct at91_pmc *pmc, const char *name,
void __init of_at91sam9x5_clk_usb_setup(struct device_node *np,
struct at91_pmc *pmc)
{
- struct clk *clk;
+ struct clk_core *clk;
int i;
int num_parents;
const char *parent_names[USB_SOURCE_MAX];
@@ -365,7 +365,7 @@ void __init of_at91sam9x5_clk_usb_setup(struct device_node *np,
void __init of_at91sam9n12_clk_usb_setup(struct device_node *np,
struct at91_pmc *pmc)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name;
const char *name = np->name;
@@ -385,7 +385,7 @@ void __init of_at91sam9n12_clk_usb_setup(struct device_node *np,
void __init of_at91rm9200_clk_usb_setup(struct device_node *np,
struct at91_pmc *pmc)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name;
const char *name = np->name;
u32 divisors[4] = {0, 0, 0, 0};
diff --git a/drivers/clk/at91/clk-utmi.c b/drivers/clk/at91/clk-utmi.c
index ae3263b..0502050 100644
--- a/drivers/clk/at91/clk-utmi.c
+++ b/drivers/clk/at91/clk-utmi.c
@@ -92,13 +92,13 @@ static const struct clk_ops utmi_ops = {
.recalc_rate = clk_utmi_recalc_rate,
};
-static struct clk * __init
+static struct clk_core * __init
at91_clk_register_utmi(struct at91_pmc *pmc, unsigned int irq,
const char *name, const char *parent_name)
{
int ret;
struct clk_utmi *utmi;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
struct clk_init_data init;
utmi = kzalloc(sizeof(*utmi), GFP_KERNEL);
@@ -132,7 +132,7 @@ static void __init
of_at91_clk_utmi_setup(struct device_node *np, struct at91_pmc *pmc)
{
unsigned int irq;
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name;
const char *name = np->name;
diff --git a/drivers/clk/bcm/clk-kona-setup.c b/drivers/clk/bcm/clk-kona-setup.c
index e5aeded..122e7b0 100644
--- a/drivers/clk/bcm/clk-kona-setup.c
+++ b/drivers/clk/bcm/clk-kona-setup.c
@@ -697,7 +697,7 @@ static void bcm_clk_teardown(struct kona_clk *bcm_clk)
bcm_clk->type = bcm_clk_none;
}
-static void kona_clk_teardown(struct clk *clk)
+static void kona_clk_teardown(struct clk_core *clk)
{
struct clk_hw *hw;
struct kona_clk *bcm_clk;
@@ -716,10 +716,10 @@ static void kona_clk_teardown(struct clk *clk)
bcm_clk_teardown(bcm_clk);
}
-struct clk *kona_clk_setup(struct kona_clk *bcm_clk)
+struct clk_core *kona_clk_setup(struct kona_clk *bcm_clk)
{
struct clk_init_data *init_data = &bcm_clk->init_data;
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
switch (bcm_clk->type) {
case bcm_clk_peri:
diff --git a/drivers/clk/bcm/clk-kona.c b/drivers/clk/bcm/clk-kona.c
index 95af2e6..a301aa9 100644
--- a/drivers/clk/bcm/clk-kona.c
+++ b/drivers/clk/bcm/clk-kona.c
@@ -1032,11 +1032,11 @@ static long kona_peri_clk_round_rate(struct clk_hw *hw, unsigned long rate,
}
static long kona_peri_clk_determine_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long *best_parent_rate, struct clk **best_parent)
+ unsigned long *best_parent_rate, struct clk_core **best_parent)
{
struct kona_clk *bcm_clk = to_kona_clk(hw);
- struct clk *clk = hw->clk;
- struct clk *current_parent;
+ struct clk_core *clk = hw->clk;
+ struct clk_core *current_parent;
unsigned long parent_rate;
unsigned long best_delta;
unsigned long best_rate;
@@ -1053,14 +1053,14 @@ static long kona_peri_clk_determine_rate(struct clk_hw *hw, unsigned long rate,
return kona_peri_clk_round_rate(hw, rate, best_parent_rate);
/* Unless we can do better, stick with current parent */
- current_parent = clk_get_parent(clk);
+ current_parent = clk_provider_get_parent(clk);
parent_rate = __clk_get_rate(current_parent);
best_rate = kona_peri_clk_round_rate(hw, rate, &parent_rate);
best_delta = abs(best_rate - rate);
/* Check whether any other parent clock can produce a better result */
for (which = 0; which < parent_count; which++) {
- struct clk *parent = clk_get_parent_by_index(clk, which);
+ struct clk_core *parent = clk_get_parent_by_index(clk, which);
unsigned long delta;
unsigned long other_rate;
@@ -1260,7 +1260,7 @@ bool __init kona_ccu_init(struct ccu_data *ccu)
{
unsigned long flags;
unsigned int which;
- struct clk **clks = ccu->clk_data.clks;
+ struct clk_core **clks = ccu->clk_data.clks;
bool success = true;
flags = ccu_lock(ccu);
diff --git a/drivers/clk/bcm/clk-kona.h b/drivers/clk/bcm/clk-kona.h
index 2537b30..c2d0152 100644
--- a/drivers/clk/bcm/clk-kona.h
+++ b/drivers/clk/bcm/clk-kona.h
@@ -508,7 +508,7 @@ extern u64 scaled_div_max(struct bcm_clk_div *div);
extern u64 scaled_div_build(struct bcm_clk_div *div, u32 div_value,
u32 billionths);
-extern struct clk *kona_clk_setup(struct kona_clk *bcm_clk);
+extern struct clk_core *kona_clk_setup(struct kona_clk *bcm_clk);
extern void __init kona_dt_ccu_setup(struct ccu_data *ccu,
struct device_node *node);
extern bool __init kona_ccu_init(struct ccu_data *ccu);
diff --git a/drivers/clk/berlin/berlin2-avpll.c b/drivers/clk/berlin/berlin2-avpll.c
index fd0f26c..488d986 100644
--- a/drivers/clk/berlin/berlin2-avpll.c
+++ b/drivers/clk/berlin/berlin2-avpll.c
@@ -188,7 +188,7 @@ static const struct clk_ops berlin2_avpll_vco_ops = {
.recalc_rate = berlin2_avpll_vco_recalc_rate,
};
-struct clk * __init berlin2_avpll_vco_register(void __iomem *base,
+struct clk_core * __init berlin2_avpll_vco_register(void __iomem *base,
const char *name, const char *parent_name,
u8 vco_flags, unsigned long flags)
{
@@ -364,7 +364,7 @@ static const struct clk_ops berlin2_avpll_channel_ops = {
*/
static const u8 quirk_index[] __initconst = { 0, 6, 5, 4, 3, 2, 1, 7 };
-struct clk * __init berlin2_avpll_channel_register(void __iomem *base,
+struct clk_core * __init berlin2_avpll_channel_register(void __iomem *base,
const char *name, u8 index, const char *parent_name,
u8 ch_flags, unsigned long flags)
{
diff --git a/drivers/clk/berlin/berlin2-avpll.h b/drivers/clk/berlin/berlin2-avpll.h
index a37f506..216eee7 100644
--- a/drivers/clk/berlin/berlin2-avpll.h
+++ b/drivers/clk/berlin/berlin2-avpll.h
@@ -24,11 +24,11 @@ struct clk;
#define BERLIN2_AVPLL_BIT_QUIRK BIT(0)
#define BERLIN2_AVPLL_SCRAMBLE_QUIRK BIT(1)
-struct clk * __init
+struct clk_core * __init
berlin2_avpll_vco_register(void __iomem *base, const char *name,
const char *parent_name, u8 vco_flags, unsigned long flags);
-struct clk * __init
+struct clk_core * __init
berlin2_avpll_channel_register(void __iomem *base, const char *name,
u8 index, const char *parent_name, u8 ch_flags,
unsigned long flags);
diff --git a/drivers/clk/berlin/berlin2-div.c b/drivers/clk/berlin/berlin2-div.c
index 81ff97f..c673082 100644
--- a/drivers/clk/berlin/berlin2-div.c
+++ b/drivers/clk/berlin/berlin2-div.c
@@ -234,7 +234,7 @@ static const struct clk_ops berlin2_div_mux_ops = {
.get_parent = berlin2_div_get_parent,
};
-struct clk * __init
+struct clk_core * __init
berlin2_div_register(const struct berlin2_div_map *map,
void __iomem *base, const char *name, u8 div_flags,
const char **parent_names, int num_parents,
diff --git a/drivers/clk/berlin/berlin2-div.h b/drivers/clk/berlin/berlin2-div.h
index 15e3384..3ddb87a 100644
--- a/drivers/clk/berlin/berlin2-div.h
+++ b/drivers/clk/berlin/berlin2-div.h
@@ -80,7 +80,7 @@ struct berlin2_div_data {
u8 div_flags;
};
-struct clk * __init
+struct clk_core * __init
berlin2_div_register(const struct berlin2_div_map *map,
void __iomem *base, const char *name, u8 div_flags,
const char **parent_names, int num_parents,
diff --git a/drivers/clk/berlin/berlin2-pll.c b/drivers/clk/berlin/berlin2-pll.c
index bdc506b..b7a3016 100644
--- a/drivers/clk/berlin/berlin2-pll.c
+++ b/drivers/clk/berlin/berlin2-pll.c
@@ -91,7 +91,7 @@ static const struct clk_ops berlin2_pll_ops = {
.recalc_rate = berlin2_pll_recalc_rate,
};
-struct clk * __init
+struct clk_core * __init
berlin2_pll_register(const struct berlin2_pll_map *map,
void __iomem *base, const char *name,
const char *parent_name, unsigned long flags)
diff --git a/drivers/clk/berlin/berlin2-pll.h b/drivers/clk/berlin/berlin2-pll.h
index 8831ce2..6b6a6ed 100644
--- a/drivers/clk/berlin/berlin2-pll.h
+++ b/drivers/clk/berlin/berlin2-pll.h
@@ -29,7 +29,7 @@ struct berlin2_pll_map {
u8 divsel_shift;
};
-struct clk * __init
+struct clk_core * __init
berlin2_pll_register(const struct berlin2_pll_map *map,
void __iomem *base, const char *name,
const char *parent_name, unsigned long flags);
diff --git a/drivers/clk/berlin/bg2.c b/drivers/clk/berlin/bg2.c
index 4c81e09..49ecb3e 100644
--- a/drivers/clk/berlin/bg2.c
+++ b/drivers/clk/berlin/bg2.c
@@ -17,7 +17,6 @@
* this program. If not, see <http://www.gnu.org/licenses/>.
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/kernel.h>
@@ -93,7 +92,7 @@
*/
#define MAX_CLKS 41
-static struct clk *clks[MAX_CLKS];
+static struct clk_core *clks[MAX_CLKS];
static struct clk_onecell_data clk_data;
static DEFINE_SPINLOCK(lock);
static void __iomem *gbase;
@@ -504,7 +503,7 @@ static const struct berlin2_gate_data bg2_gates[] __initconst = {
static void __init berlin2_clock_setup(struct device_node *np)
{
const char *parent_names[9];
- struct clk *clk;
+ struct clk_core *clk;
u8 avpll_flags = 0;
int n;
@@ -513,16 +512,16 @@ static void __init berlin2_clock_setup(struct device_node *np)
return;
/* overwrite default clock names with DT provided ones */
- clk = of_clk_get_by_name(np, clk_names[REFCLK]);
+ clk = of_clk_provider_get_by_name(np, clk_names[REFCLK]);
if (!IS_ERR(clk)) {
clk_names[REFCLK] = __clk_get_name(clk);
- clk_put(clk);
+ __clk_put(clk);
}
- clk = of_clk_get_by_name(np, clk_names[VIDEO_EXT0]);
+ clk = of_clk_provider_get_by_name(np, clk_names[VIDEO_EXT0]);
if (!IS_ERR(clk)) {
clk_names[VIDEO_EXT0] = __clk_get_name(clk);
- clk_put(clk);
+ __clk_put(clk);
}
/* simple register PLLs */
diff --git a/drivers/clk/berlin/bg2q.c b/drivers/clk/berlin/bg2q.c
index 748da9b..33cc08b 100644
--- a/drivers/clk/berlin/bg2q.c
+++ b/drivers/clk/berlin/bg2q.c
@@ -17,7 +17,6 @@
* this program. If not, see <http://www.gnu.org/licenses/>.
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/kernel.h>
@@ -47,7 +46,7 @@
#define REG_SDIO1XIN_CLKCTL 0x015c
#define MAX_CLKS 27
-static struct clk *clks[MAX_CLKS];
+static struct clk_core *clks[MAX_CLKS];
static struct clk_onecell_data clk_data;
static DEFINE_SPINLOCK(lock);
static void __iomem *gbase;
@@ -293,7 +292,7 @@ static const struct berlin2_gate_data bg2q_gates[] __initconst = {
static void __init berlin2q_clock_setup(struct device_node *np)
{
const char *parent_names[9];
- struct clk *clk;
+ struct clk_core *clk;
int n;
gbase = of_iomap(np, 0);
@@ -311,10 +310,10 @@ static void __init berlin2q_clock_setup(struct device_node *np)
}
/* overwrite default clock names with DT provided ones */
- clk = of_clk_get_by_name(np, clk_names[REFCLK]);
+ clk = of_clk_provider_get_by_name(np, clk_names[REFCLK]);
if (!IS_ERR(clk)) {
clk_names[REFCLK] = __clk_get_name(clk);
- clk_put(clk);
+ __clk_put(clk);
}
/* simple register PLLs */
diff --git a/drivers/clk/clk-axi-clkgen.c b/drivers/clk/clk-axi-clkgen.c
index 1127ee4..d91550c 100644
--- a/drivers/clk/clk-axi-clkgen.c
+++ b/drivers/clk/clk-axi-clkgen.c
@@ -10,7 +10,6 @@
#include <linux/platform_device.h>
#include <linux/clk-provider.h>
-#include <linux/clk.h>
#include <linux/slab.h>
#include <linux/io.h>
#include <linux/of.h>
@@ -489,7 +488,7 @@ static int axi_clkgen_probe(struct platform_device *pdev)
const char *parent_name;
const char *clk_name;
struct resource *mem;
- struct clk *clk;
+ struct clk_core *clk;
if (!pdev->dev.of_node)
return -ENODEV;
diff --git a/drivers/clk/clk-axm5516.c b/drivers/clk/clk-axm5516.c
index d2f1e11..3dc6e58 100644
--- a/drivers/clk/clk-axm5516.c
+++ b/drivers/clk/clk-axm5516.c
@@ -532,7 +532,7 @@ MODULE_DEVICE_TABLE(of, axmclk_match_table);
struct axmclk_priv {
struct clk_onecell_data onecell;
- struct clk *clks[];
+ struct clk_core *clks[];
};
static int axmclk_probe(struct platform_device *pdev)
@@ -541,7 +541,7 @@ static int axmclk_probe(struct platform_device *pdev)
struct resource *res;
int i, ret;
struct device *dev = &pdev->dev;
- struct clk *clk;
+ struct clk_core *clk;
struct regmap *regmap;
size_t num_clks;
struct axmclk_priv *priv;
diff --git a/drivers/clk/clk-bcm2835.c b/drivers/clk/clk-bcm2835.c
index 6b950ca..f25e85e 100644
--- a/drivers/clk/clk-bcm2835.c
+++ b/drivers/clk/clk-bcm2835.c
@@ -29,7 +29,7 @@
*/
void __init bcm2835_init_clocks(void)
{
- struct clk *clk;
+ struct clk_core *clk;
int ret;
clk = clk_register_fixed_rate(NULL, "sys_pclk", NULL, CLK_IS_ROOT,
diff --git a/drivers/clk/clk-composite.c b/drivers/clk/clk-composite.c
index b9355da..d7322fa 100644
--- a/drivers/clk/clk-composite.c
+++ b/drivers/clk/clk-composite.c
@@ -14,7 +14,6 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/err.h>
#include <linux/slab.h>
@@ -57,14 +56,14 @@ static unsigned long clk_composite_recalc_rate(struct clk_hw *hw,
static long clk_composite_determine_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *best_parent_rate,
- struct clk **best_parent_p)
+ struct clk_core **best_parent_p)
{
struct clk_composite *composite = to_clk_composite(hw);
const struct clk_ops *rate_ops = composite->rate_ops;
const struct clk_ops *mux_ops = composite->mux_ops;
struct clk_hw *rate_hw = composite->rate_hw;
struct clk_hw *mux_hw = composite->mux_hw;
- struct clk *parent;
+ struct clk_core *parent;
unsigned long parent_rate;
long tmp_rate, best_rate = 0;
unsigned long rate_diff;
@@ -80,7 +79,7 @@ static long clk_composite_determine_rate(struct clk_hw *hw, unsigned long rate,
*best_parent_p = NULL;
if (__clk_get_flags(hw->clk) & CLK_SET_RATE_NO_REPARENT) {
- *best_parent_p = clk_get_parent(mux_hw->clk);
+ *best_parent_p = clk_provider_get_parent(mux_hw->clk);
*best_parent_rate = __clk_get_rate(*best_parent_p);
return rate_ops->round_rate(rate_hw, rate,
@@ -181,14 +180,14 @@ static void clk_composite_disable(struct clk_hw *hw)
gate_ops->disable(gate_hw);
}
-struct clk *clk_register_composite(struct device *dev, const char *name,
+struct clk_core *clk_register_composite(struct device *dev, const char *name,
const char **parent_names, int num_parents,
struct clk_hw *mux_hw, const struct clk_ops *mux_ops,
struct clk_hw *rate_hw, const struct clk_ops *rate_ops,
struct clk_hw *gate_hw, const struct clk_ops *gate_ops,
unsigned long flags)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
struct clk_composite *composite;
struct clk_ops *clk_composite_ops;
diff --git a/drivers/clk/clk-conf.c b/drivers/clk/clk-conf.c
index d36a7b3..c9231cd 100644
--- a/drivers/clk/clk-conf.c
+++ b/drivers/clk/clk-conf.c
@@ -7,7 +7,6 @@
* published by the Free Software Foundation.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/clk/clk-conf.h>
@@ -20,7 +19,7 @@ static int __set_clk_parents(struct device_node *node, bool clk_supplier)
{
struct of_phandle_args clkspec;
int index, rc, num_parents;
- struct clk *clk, *pclk;
+ struct clk_core *clk, *pclk;
num_parents = of_count_phandle_with_args(node, "assigned-clock-parents",
"#clock-cells");
@@ -63,16 +62,16 @@ static int __set_clk_parents(struct device_node *node, bool clk_supplier)
goto err;
}
- rc = clk_set_parent(clk, pclk);
+ rc = clk_provider_set_parent(clk, pclk);
if (rc < 0)
pr_err("clk: failed to reparent %s to %s: %d\n",
__clk_get_name(clk), __clk_get_name(pclk), rc);
- clk_put(clk);
- clk_put(pclk);
+ __clk_put(clk);
+ __clk_put(pclk);
}
return 0;
err:
- clk_put(pclk);
+ __clk_put(pclk);
return rc;
}
@@ -82,7 +81,7 @@ static int __set_clk_rates(struct device_node *node, bool clk_supplier)
struct property *prop;
const __be32 *cur;
int rc, index = 0;
- struct clk *clk;
+ struct clk_core *clk;
u32 rate;
of_property_for_each_u32(node, "assigned-clock-rates", prop, cur, rate) {
@@ -106,11 +105,11 @@ static int __set_clk_rates(struct device_node *node, bool clk_supplier)
return PTR_ERR(clk);
}
- rc = clk_set_rate(clk, rate);
+ rc = clk_provider_set_rate(clk, rate);
if (rc < 0)
pr_err("clk: couldn't set %s clock rate: %d\n",
__clk_get_name(clk), rc);
- clk_put(clk);
+ __clk_put(clk);
}
index++;
}
diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
index 18a9de2..3c78139 100644
--- a/drivers/clk/clk-divider.c
+++ b/drivers/clk/clk-divider.c
@@ -366,14 +366,14 @@ const struct clk_ops clk_divider_ro_ops = {
};
EXPORT_SYMBOL_GPL(clk_divider_ro_ops);
-static struct clk *_register_divider(struct device *dev, const char *name,
+static struct clk_core *_register_divider(struct device *dev, const char *name,
const char *parent_name, unsigned long flags,
void __iomem *reg, u8 shift, u8 width,
u8 clk_divider_flags, const struct clk_div_table *table,
spinlock_t *lock)
{
struct clk_divider *div;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
if (clk_divider_flags & CLK_DIVIDER_HIWORD_MASK) {
@@ -429,7 +429,7 @@ static struct clk *_register_divider(struct device *dev, const char *name,
* @clk_divider_flags: divider-specific flags for this clock
* @lock: shared register lock for this clock
*/
-struct clk *clk_register_divider(struct device *dev, const char *name,
+struct clk_core *clk_register_divider(struct device *dev, const char *name,
const char *parent_name, unsigned long flags,
void __iomem *reg, u8 shift, u8 width,
u8 clk_divider_flags, spinlock_t *lock)
@@ -453,7 +453,7 @@ EXPORT_SYMBOL_GPL(clk_register_divider);
* @table: array of divider/value pairs ending with a div set to 0
* @lock: shared register lock for this clock
*/
-struct clk *clk_register_divider_table(struct device *dev, const char *name,
+struct clk_core *clk_register_divider_table(struct device *dev, const char *name,
const char *parent_name, unsigned long flags,
void __iomem *reg, u8 shift, u8 width,
u8 clk_divider_flags, const struct clk_div_table *table,
diff --git a/drivers/clk/clk-efm32gg.c b/drivers/clk/clk-efm32gg.c
index bac2ddf..3240887 100644
--- a/drivers/clk/clk-efm32gg.c
+++ b/drivers/clk/clk-efm32gg.c
@@ -6,7 +6,6 @@
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
-#include <linux/clk.h>
#include <linux/io.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
@@ -16,7 +15,7 @@
#define CMU_HFPERCLKEN0 0x44
-static struct clk *clk[37];
+static struct clk_core *clk[37];
static struct clk_onecell_data clk_data = {
.clks = clk,
.clk_num = ARRAY_SIZE(clk),
diff --git a/drivers/clk/clk-fixed-factor.c b/drivers/clk/clk-fixed-factor.c
index d9e3f67..ae1fef0 100644
--- a/drivers/clk/clk-fixed-factor.c
+++ b/drivers/clk/clk-fixed-factor.c
@@ -65,13 +65,13 @@ struct clk_ops clk_fixed_factor_ops = {
};
EXPORT_SYMBOL_GPL(clk_fixed_factor_ops);
-struct clk *clk_register_fixed_factor(struct device *dev, const char *name,
+struct clk_core *clk_register_fixed_factor(struct device *dev, const char *name,
const char *parent_name, unsigned long flags,
unsigned int mult, unsigned int div)
{
struct clk_fixed_factor *fix;
struct clk_init_data init;
- struct clk *clk;
+ struct clk_core *clk;
fix = kmalloc(sizeof(*fix), GFP_KERNEL);
if (!fix) {
@@ -105,7 +105,7 @@ EXPORT_SYMBOL_GPL(clk_register_fixed_factor);
*/
void __init of_fixed_factor_clk_setup(struct device_node *node)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name = node->name;
const char *parent_name;
u32 div, mult;
diff --git a/drivers/clk/clk-fixed-rate.c b/drivers/clk/clk-fixed-rate.c
index 0fc56ab..56c0ced 100644
--- a/drivers/clk/clk-fixed-rate.c
+++ b/drivers/clk/clk-fixed-rate.c
@@ -56,12 +56,12 @@ EXPORT_SYMBOL_GPL(clk_fixed_rate_ops);
* @fixed_rate: non-adjustable clock rate
* @fixed_accuracy: non-adjustable clock rate
*/
-struct clk *clk_register_fixed_rate_with_accuracy(struct device *dev,
+struct clk_core *clk_register_fixed_rate_with_accuracy(struct device *dev,
const char *name, const char *parent_name, unsigned long flags,
unsigned long fixed_rate, unsigned long fixed_accuracy)
{
struct clk_fixed_rate *fixed;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
/* allocate fixed-rate clock */
@@ -99,7 +99,7 @@ EXPORT_SYMBOL_GPL(clk_register_fixed_rate_with_accuracy);
* @flags: framework-specific flags
* @fixed_rate: non-adjustable clock rate
*/
-struct clk *clk_register_fixed_rate(struct device *dev, const char *name,
+struct clk_core *clk_register_fixed_rate(struct device *dev, const char *name,
const char *parent_name, unsigned long flags,
unsigned long fixed_rate)
{
@@ -114,7 +114,7 @@ EXPORT_SYMBOL_GPL(clk_register_fixed_rate);
*/
void of_fixed_clk_setup(struct device_node *node)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name = node->name;
u32 rate;
u32 accuracy = 0;
diff --git a/drivers/clk/clk-fractional-divider.c b/drivers/clk/clk-fractional-divider.c
index ede685c..8104683 100644
--- a/drivers/clk/clk-fractional-divider.c
+++ b/drivers/clk/clk-fractional-divider.c
@@ -96,14 +96,14 @@ const struct clk_ops clk_fractional_divider_ops = {
};
EXPORT_SYMBOL_GPL(clk_fractional_divider_ops);
-struct clk *clk_register_fractional_divider(struct device *dev,
+struct clk_core *clk_register_fractional_divider(struct device *dev,
const char *name, const char *parent_name, unsigned long flags,
void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nwidth,
u8 clk_divider_flags, spinlock_t *lock)
{
struct clk_fractional_divider *fd;
struct clk_init_data init;
- struct clk *clk;
+ struct clk_core *clk;
fd = kzalloc(sizeof(*fd), GFP_KERNEL);
if (!fd) {
diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c
index 4a58c55..429d302 100644
--- a/drivers/clk/clk-gate.c
+++ b/drivers/clk/clk-gate.c
@@ -118,13 +118,13 @@ EXPORT_SYMBOL_GPL(clk_gate_ops);
* @clk_gate_flags: gate-specific flags for this clock
* @lock: shared register lock for this clock
*/
-struct clk *clk_register_gate(struct device *dev, const char *name,
+struct clk_core *clk_register_gate(struct device *dev, const char *name,
const char *parent_name, unsigned long flags,
void __iomem *reg, u8 bit_idx,
u8 clk_gate_flags, spinlock_t *lock)
{
struct clk_gate *gate;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
if (clk_gate_flags & CLK_GATE_HIWORD_MASK) {
diff --git a/drivers/clk/clk-highbank.c b/drivers/clk/clk-highbank.c
index 2e7e9d9..cad2fba 100644
--- a/drivers/clk/clk-highbank.c
+++ b/drivers/clk/clk-highbank.c
@@ -271,10 +271,10 @@ static const struct clk_ops periclk_ops = {
.set_rate = clk_periclk_set_rate,
};
-static __init struct clk *hb_clk_init(struct device_node *node, const struct clk_ops *ops)
+static __init struct clk_core *hb_clk_init(struct device_node *node, const struct clk_ops *ops)
{
u32 reg;
- struct clk *clk;
+ struct clk_core *clk;
struct hb_clk *hb_clk;
const char *clk_name = node->name;
const char *parent_name;
@@ -330,8 +330,8 @@ CLK_OF_DECLARE(hb_a9periph, "calxeda,hb-a9periph-clock", hb_a9periph_init);
static void __init hb_a9bus_init(struct device_node *node)
{
- struct clk *clk = hb_clk_init(node, &a9bclk_ops);
- clk_prepare_enable(clk);
+ struct clk_core *clk = hb_clk_init(node, &a9bclk_ops);
+ clk_provider_prepare_enable(clk);
}
CLK_OF_DECLARE(hb_a9bus, "calxeda,hb-a9bus-clock", hb_a9bus_init);
diff --git a/drivers/clk/clk-ls1x.c b/drivers/clk/clk-ls1x.c
index f20b750..796043c 100644
--- a/drivers/clk/clk-ls1x.c
+++ b/drivers/clk/clk-ls1x.c
@@ -48,11 +48,11 @@ static const struct clk_ops ls1x_pll_clk_ops = {
.recalc_rate = ls1x_pll_recalc_rate,
};
-static struct clk * __init clk_register_pll(struct device *dev,
+static struct clk_core * __init clk_register_pll(struct device *dev,
const char *name, const char *parent_name, unsigned long flags)
{
struct clk_hw *hw;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
/* allocate the divider */
@@ -80,32 +80,32 @@ static struct clk * __init clk_register_pll(struct device *dev,
void __init ls1x_clk_init(void)
{
- struct clk *clk;
+ struct clk_core *clk;
clk = clk_register_pll(NULL, "pll_clk", NULL, CLK_IS_ROOT);
- clk_prepare_enable(clk);
+ clk_provider_prepare_enable(clk);
clk = clk_register_divider(NULL, "cpu_clk", "pll_clk",
CLK_SET_RATE_PARENT, LS1X_CLK_PLL_DIV, DIV_CPU_SHIFT,
DIV_CPU_WIDTH, CLK_DIVIDER_ONE_BASED, &_lock);
- clk_prepare_enable(clk);
+ clk_provider_prepare_enable(clk);
clk_register_clkdev(clk, "cpu", NULL);
clk = clk_register_divider(NULL, "dc_clk", "pll_clk",
CLK_SET_RATE_PARENT, LS1X_CLK_PLL_DIV, DIV_DC_SHIFT,
DIV_DC_WIDTH, CLK_DIVIDER_ONE_BASED, &_lock);
- clk_prepare_enable(clk);
+ clk_provider_prepare_enable(clk);
clk_register_clkdev(clk, "dc", NULL);
clk = clk_register_divider(NULL, "ahb_clk", "pll_clk",
CLK_SET_RATE_PARENT, LS1X_CLK_PLL_DIV, DIV_DDR_SHIFT,
DIV_DDR_WIDTH, CLK_DIVIDER_ONE_BASED, &_lock);
- clk_prepare_enable(clk);
+ clk_provider_prepare_enable(clk);
clk_register_clkdev(clk, "ahb", NULL);
clk_register_clkdev(clk, "stmmaceth", NULL);
clk = clk_register_fixed_factor(NULL, "apb_clk", "ahb_clk", 0, 1, 2);
- clk_prepare_enable(clk);
+ clk_provider_prepare_enable(clk);
clk_register_clkdev(clk, "apb", NULL);
clk_register_clkdev(clk, "serial8250", NULL);
}
diff --git a/drivers/clk/clk-max77686.c b/drivers/clk/clk-max77686.c
index 3d7e8dd..42fa43a 100644
--- a/drivers/clk/clk-max77686.c
+++ b/drivers/clk/clk-max77686.c
@@ -112,10 +112,10 @@ static struct clk_init_data max77686_clks_init[MAX77686_CLKS_NUM] = {
},
};
-static struct clk *max77686_clk_register(struct device *dev,
+static struct clk_core *max77686_clk_register(struct device *dev,
struct max77686_clk *max77686)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_hw *hw = &max77686->hw;
clk = clk_register(dev, hw);
@@ -138,10 +138,10 @@ static int max77686_clk_probe(struct platform_device *pdev)
{
struct max77686_dev *iodev = dev_get_drvdata(pdev->dev.parent);
struct max77686_clk *max77686_clks[MAX77686_CLKS_NUM];
- struct clk **clocks;
+ struct clk_core **clocks;
int i, ret;
- clocks = devm_kzalloc(&pdev->dev, sizeof(struct clk *)
+ clocks = devm_kzalloc(&pdev->dev, sizeof(struct clk_core *)
* MAX77686_CLKS_NUM, GFP_KERNEL);
if (!clocks)
return -ENOMEM;
@@ -203,7 +203,7 @@ err_clocks:
static int max77686_clk_remove(struct platform_device *pdev)
{
struct max77686_dev *iodev = dev_get_drvdata(pdev->dev.parent);
- struct clk **clocks = platform_get_drvdata(pdev);
+ struct clk_core **clocks = platform_get_drvdata(pdev);
int i;
if (iodev->dev->of_node)
diff --git a/drivers/clk/clk-moxart.c b/drivers/clk/clk-moxart.c
index 30a3b69..c503c09 100644
--- a/drivers/clk/clk-moxart.c
+++ b/drivers/clk/clk-moxart.c
@@ -18,7 +18,7 @@
void __init moxart_of_pll_clk_init(struct device_node *node)
{
static void __iomem *base;
- struct clk *clk, *ref_clk;
+ struct clk_core *clk, *ref_clk;
unsigned int mul;
const char *name = node->name;
const char *parent_name;
@@ -35,7 +35,7 @@ void __init moxart_of_pll_clk_init(struct device_node *node)
mul = readl(base + 0x30) >> 3 & 0x3f;
iounmap(base);
- ref_clk = of_clk_get(node, 0);
+ ref_clk = of_clk_provider_get(node, 0);
if (IS_ERR(ref_clk)) {
pr_err("%s: of_clk_get failed\n", node->full_name);
return;
@@ -56,7 +56,7 @@ CLK_OF_DECLARE(moxart_pll_clock, "moxa,moxart-pll-clock",
void __init moxart_of_apb_clk_init(struct device_node *node)
{
static void __iomem *base;
- struct clk *clk, *pll_clk;
+ struct clk_core *clk, *pll_clk;
unsigned int div, val;
unsigned int div_idx[] = { 2, 3, 4, 6, 8};
const char *name = node->name;
@@ -78,7 +78,7 @@ void __init moxart_of_apb_clk_init(struct device_node *node)
val = 0;
div = div_idx[val] * 2;
- pll_clk = of_clk_get(node, 0);
+ pll_clk = of_clk_provider_get(node, 0);
if (IS_ERR(pll_clk)) {
pr_err("%s: of_clk_get failed\n", node->full_name);
return;
diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c
index 4f96ff3..538c455 100644
--- a/drivers/clk/clk-mux.c
+++ b/drivers/clk/clk-mux.c
@@ -10,7 +10,6 @@
* Simple multiplexer clock implementation
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/module.h>
#include <linux/slab.h>
@@ -113,13 +112,13 @@ const struct clk_ops clk_mux_ro_ops = {
};
EXPORT_SYMBOL_GPL(clk_mux_ro_ops);
-struct clk *clk_register_mux_table(struct device *dev, const char *name,
+struct clk_core *clk_register_mux_table(struct device *dev, const char *name,
const char **parent_names, u8 num_parents, unsigned long flags,
void __iomem *reg, u8 shift, u32 mask,
u8 clk_mux_flags, u32 *table, spinlock_t *lock)
{
struct clk_mux *mux;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
u8 width = 0;
@@ -165,7 +164,7 @@ struct clk *clk_register_mux_table(struct device *dev, const char *name,
}
EXPORT_SYMBOL_GPL(clk_register_mux_table);
-struct clk *clk_register_mux(struct device *dev, const char *name,
+struct clk_core *clk_register_mux(struct device *dev, const char *name,
const char **parent_names, u8 num_parents, unsigned long flags,
void __iomem *reg, u8 shift, u8 width,
u8 clk_mux_flags, spinlock_t *lock)
diff --git a/drivers/clk/clk-nomadik.c b/drivers/clk/clk-nomadik.c
index 05e04ce..91855d3 100644
--- a/drivers/clk/clk-nomadik.c
+++ b/drivers/clk/clk-nomadik.c
@@ -8,7 +8,6 @@
#define pr_fmt(fmt) "Nomadik SRC clocks: " fmt
#include <linux/bitops.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/err.h>
#include <linux/io.h>
@@ -254,11 +253,11 @@ static const struct clk_ops pll_clk_ops = {
.recalc_rate = pll_clk_recalc_rate,
};
-static struct clk * __init
+static struct clk_core * __init
pll_clk_register(struct device *dev, const char *name,
const char *parent_name, u32 id)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_pll *pll;
struct clk_init_data init;
@@ -346,11 +345,11 @@ static const struct clk_ops src_clk_ops = {
.recalc_rate = src_clk_recalc_rate,
};
-static struct clk * __init
+static struct clk_core * __init
src_clk_register(struct device *dev, const char *name,
const char *parent_name, u8 id)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_src *sclk;
struct clk_init_data init;
@@ -510,7 +509,7 @@ module_init(nomadik_src_clk_init_debugfs);
static void __init of_nomadik_pll_setup(struct device_node *np)
{
- struct clk *clk = ERR_PTR(-EINVAL);
+ struct clk_core *clk = ERR_PTR(-EINVAL);
const char *clk_name = np->name;
const char *parent_name;
u32 pll_id;
@@ -533,7 +532,7 @@ CLK_OF_DECLARE(nomadik_pll_clk,
static void __init of_nomadik_hclk_setup(struct device_node *np)
{
- struct clk *clk = ERR_PTR(-EINVAL);
+ struct clk_core *clk = ERR_PTR(-EINVAL);
const char *clk_name = np->name;
const char *parent_name;
@@ -557,7 +556,7 @@ CLK_OF_DECLARE(nomadik_hclk_clk,
static void __init of_nomadik_src_clk_setup(struct device_node *np)
{
- struct clk *clk = ERR_PTR(-EINVAL);
+ struct clk_core *clk = ERR_PTR(-EINVAL);
const char *clk_name = np->name;
const char *parent_name;
u32 clk_id;
diff --git a/drivers/clk/clk-nspire.c b/drivers/clk/clk-nspire.c
index a378db7..e9c43f4 100644
--- a/drivers/clk/clk-nspire.c
+++ b/drivers/clk/clk-nspire.c
@@ -69,7 +69,7 @@ static void __init nspire_ahbdiv_setup(struct device_node *node,
{
u32 val;
void __iomem *io;
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name = node->name;
const char *parent_name;
struct nspire_clk_info info;
@@ -111,7 +111,7 @@ static void __init nspire_clk_setup(struct device_node *node,
{
u32 val;
void __iomem *io;
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name = node->name;
struct nspire_clk_info info;
diff --git a/drivers/clk/clk-palmas.c b/drivers/clk/clk-palmas.c
index 781630e..8febd8c 100644
--- a/drivers/clk/clk-palmas.c
+++ b/drivers/clk/clk-palmas.c
@@ -17,7 +17,6 @@
* General Public License for more details.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/mfd/palmas.h>
@@ -42,7 +41,7 @@ struct palmas_clk32k_desc {
struct palmas_clock_info {
struct device *dev;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_hw hw;
struct palmas *palmas;
struct palmas_clk32k_desc *clk_desc;
@@ -219,7 +218,7 @@ static int palmas_clks_init_configure(struct palmas_clock_info *cinfo)
}
if (cinfo->ext_control_pin) {
- ret = clk_prepare(cinfo->clk);
+ ret = clk_provider_prepare(cinfo->clk);
if (ret < 0) {
dev_err(cinfo->dev, "Clock prep failed, %d\n", ret);
return ret;
@@ -244,7 +243,7 @@ static int palmas_clks_probe(struct platform_device *pdev)
struct palmas_clks_of_match_data *match_data;
const struct of_device_id *match;
struct palmas_clock_info *cinfo;
- struct clk *clk;
+ struct clk_core *clk;
int ret;
match = of_match_device(palmas_clks_of_match, &pdev->dev);
diff --git a/drivers/clk/clk-ppc-corenet.c b/drivers/clk/clk-ppc-corenet.c
index 8e58edf..5619ee9 100644
--- a/drivers/clk/clk-ppc-corenet.c
+++ b/drivers/clk/clk-ppc-corenet.c
@@ -64,7 +64,7 @@ const struct clk_ops cmux_ops = {
static void __init core_mux_init(struct device_node *np)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
struct cmux_clk *cmux_clk;
struct device_node *node;
@@ -150,7 +150,7 @@ static void __init core_pll_init(struct device_node *np)
int i, rc, count;
const char *clk_name, *parent_name;
struct clk_onecell_data *onecell_data;
- struct clk **subclks;
+ struct clk_core **subclks;
void __iomem *base;
base = of_iomap(np, 0);
@@ -184,7 +184,7 @@ static void __init core_pll_init(struct device_node *np)
/* output clock number per PLL */
clocks_per_pll = count;
- subclks = kzalloc(sizeof(struct clk *) * count, GFP_KERNEL);
+ subclks = kzalloc(sizeof(struct clk_core *) * count, GFP_KERNEL);
if (!subclks) {
pr_err("%s: could not allocate subclks\n", __func__);
goto err_map;
@@ -246,7 +246,7 @@ err_map:
static void __init sysclk_init(struct device_node *node)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name = node->name;
struct device_node *np = of_get_parent(node);
u32 rate;
diff --git a/drivers/clk/clk-s2mps11.c b/drivers/clk/clk-s2mps11.c
index b7797fb..17fc7e1 100644
--- a/drivers/clk/clk-s2mps11.c
+++ b/drivers/clk/clk-s2mps11.c
@@ -29,7 +29,7 @@
#define s2mps11_name(a) (a->hw.init->name)
-static struct clk **clk_table;
+static struct clk_core **clk_table;
static struct clk_onecell_data clk_data;
enum {
@@ -43,7 +43,7 @@ struct s2mps11_clk {
struct sec_pmic_dev *iodev;
struct device_node *clk_np;
struct clk_hw hw;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_lookup *lookup;
u32 mask;
unsigned int reg;
@@ -174,7 +174,7 @@ static int s2mps11_clk_probe(struct platform_device *pdev)
s2mps11_clk = s2mps11_clks;
- clk_table = devm_kzalloc(&pdev->dev, sizeof(struct clk *) *
+ clk_table = devm_kzalloc(&pdev->dev, sizeof(struct clk_core *) *
S2MPS11_CLKS_NUM, GFP_KERNEL);
if (!clk_table)
return -ENOMEM;
diff --git a/drivers/clk/clk-si5351.c b/drivers/clk/clk-si5351.c
index 3b2a66f..57c9eb5 100644
--- a/drivers/clk/clk-si5351.c
+++ b/drivers/clk/clk-si5351.c
@@ -56,10 +56,10 @@ struct si5351_driver_data {
struct regmap *regmap;
struct clk_onecell_data onecell;
- struct clk *pxtal;
+ struct clk_core *pxtal;
const char *pxtal_name;
struct clk_hw xtal;
- struct clk *pclkin;
+ struct clk_core *pclkin;
const char *pclkin_name;
struct clk_hw clkin;
@@ -1128,12 +1128,12 @@ static int si5351_dt_parse(struct i2c_client *client,
if (!pdata)
return -ENOMEM;
- pdata->clk_xtal = of_clk_get(np, 0);
+ pdata->clk_xtal = of_clk_provider_get(np, 0);
if (!IS_ERR(pdata->clk_xtal))
- clk_put(pdata->clk_xtal);
- pdata->clk_clkin = of_clk_get(np, 1);
+ __clk_put(pdata->clk_xtal);
+ pdata->clk_clkin = of_clk_provider_get(np, 1);
if (!IS_ERR(pdata->clk_clkin))
- clk_put(pdata->clk_clkin);
+ __clk_put(pdata->clk_clkin);
/*
* property silabs,pll-source : <num src>, [<..>]
@@ -1306,7 +1306,7 @@ static int si5351_i2c_probe(struct i2c_client *client,
struct si5351_platform_data *pdata;
struct si5351_driver_data *drvdata;
struct clk_init_data init;
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_names[4];
u8 num_parents, num_clocks;
int ret, n;
@@ -1545,7 +1545,8 @@ static int si5351_i2c_probe(struct i2c_client *client,
/* set initial clkout rate */
if (pdata->clkout[n].rate != 0) {
int ret;
- ret = clk_set_rate(clk, pdata->clkout[n].rate);
+ ret = clk_provider_set_rate(clk,
+ pdata->clkout[n].rate);
if (ret != 0) {
dev_err(&client->dev, "Cannot set rate : %d\n",
ret);
diff --git a/drivers/clk/clk-si570.c b/drivers/clk/clk-si570.c
index fc167b3..f0eec4e 100644
--- a/drivers/clk/clk-si570.c
+++ b/drivers/clk/clk-si570.c
@@ -407,7 +407,7 @@ static int si570_probe(struct i2c_client *client,
{
struct clk_si570 *data;
struct clk_init_data init;
- struct clk *clk;
+ struct clk_core *clk;
u32 initial_fout, factory_fout, stability;
int err;
enum clk_si570_variant variant = id->driver_data;
@@ -476,7 +476,7 @@ static int si570_probe(struct i2c_client *client,
/* Read the requested initial output frequency from device tree */
if (!of_property_read_u32(client->dev.of_node, "clock-frequency",
&initial_fout)) {
- err = clk_set_rate(clk, initial_fout);
+ err = clk_provider_set_rate(clk, initial_fout);
if (err) {
of_clk_del_provider(client->dev.of_node);
return err;
diff --git a/drivers/clk/clk-twl6040.c b/drivers/clk/clk-twl6040.c
index 1ada79a..d24a8a2 100644
--- a/drivers/clk/clk-twl6040.c
+++ b/drivers/clk/clk-twl6040.c
@@ -20,7 +20,6 @@
*
*/
-#include <linux/clk.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/platform_device.h>
@@ -31,7 +30,7 @@ struct twl6040_clk {
struct twl6040 *twl6040;
struct device *dev;
struct clk_hw mcpdm_fclk;
- struct clk *clk;
+ struct clk_core *clk;
int enabled;
};
diff --git a/drivers/clk/clk-u300.c b/drivers/clk/clk-u300.c
index 406bfc1..392bcbf 100644
--- a/drivers/clk/clk-u300.c
+++ b/drivers/clk/clk-u300.c
@@ -5,7 +5,6 @@
* Author: Linus Walleij <linus.walleij(a)stericsson.com>
* Author: Jonas Aaberg <jonas.aberg(a)stericsson.com>
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/err.h>
#include <linux/io.h>
@@ -688,7 +687,7 @@ static const struct clk_ops syscon_clk_ops = {
.set_rate = syscon_clk_set_rate,
};
-static struct clk * __init
+static struct clk_core * __init
syscon_clk_register(struct device *dev, const char *name,
const char *parent_name, unsigned long flags,
bool hw_ctrld,
@@ -696,7 +695,7 @@ syscon_clk_register(struct device *dev, const char *name,
void __iomem *en_reg, u8 en_bit,
u16 clk_val)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_syscon *sclk;
struct clk_init_data init;
@@ -867,7 +866,7 @@ static struct u300_clock const u300_clk_lookup[] __initconst = {
static void __init of_u300_syscon_clk_init(struct device_node *np)
{
- struct clk *clk = ERR_PTR(-EINVAL);
+ struct clk_core *clk = ERR_PTR(-EINVAL);
const char *clk_name = np->name;
const char *parent_name;
void __iomem *res_reg;
@@ -1110,11 +1109,11 @@ static const struct clk_ops mclk_ops = {
.set_rate = mclk_clk_set_rate,
};
-static struct clk * __init
+static struct clk_core * __init
mclk_clk_register(struct device *dev, const char *name,
const char *parent_name, bool is_mspro)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_mclk *mclk;
struct clk_init_data init;
@@ -1141,7 +1140,7 @@ mclk_clk_register(struct device *dev, const char *name,
static void __init of_u300_syscon_mclk_init(struct device_node *np)
{
- struct clk *clk = ERR_PTR(-EINVAL);
+ struct clk_core *clk = ERR_PTR(-EINVAL);
const char *clk_name = np->name;
const char *parent_name;
diff --git a/drivers/clk/clk-vt8500.c b/drivers/clk/clk-vt8500.c
index 37e9288..e5fb933 100644
--- a/drivers/clk/clk-vt8500.c
+++ b/drivers/clk/clk-vt8500.c
@@ -232,7 +232,7 @@ static const struct clk_ops vt8500_gated_divisor_clk_ops = {
static __init void vtwm_device_clk_init(struct device_node *node)
{
u32 en_reg, div_reg;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_device *dev_clk;
const char *clk_name = node->name;
const char *parent_name;
@@ -650,7 +650,7 @@ static const struct clk_ops vtwm_pll_ops = {
static __init void vtwm_pll_clk_init(struct device_node *node, int pll_type)
{
u32 reg;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_pll *pll_clk;
const char *clk_name = node->name;
const char *parent_name;
diff --git a/drivers/clk/clk-wm831x.c b/drivers/clk/clk-wm831x.c
index b131041..84ce873 100644
--- a/drivers/clk/clk-wm831x.c
+++ b/drivers/clk/clk-wm831x.c
@@ -12,7 +12,6 @@
*
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/delay.h>
#include <linux/module.h>
@@ -25,9 +24,9 @@ struct wm831x_clk {
struct clk_hw xtal_hw;
struct clk_hw fll_hw;
struct clk_hw clkout_hw;
- struct clk *xtal;
- struct clk *fll;
- struct clk *clkout;
+ struct clk_core *xtal;
+ struct clk_core *fll;
+ struct clk_core *clkout;
bool xtal_ena;
};
diff --git a/drivers/clk/clk-xgene.c b/drivers/clk/clk-xgene.c
index dd8a62d..ce3ed34 100644
--- a/drivers/clk/clk-xgene.c
+++ b/drivers/clk/clk-xgene.c
@@ -124,13 +124,13 @@ const struct clk_ops xgene_clk_pll_ops = {
.recalc_rate = xgene_clk_pll_recalc_rate,
};
-static struct clk *xgene_register_clk_pll(struct device *dev,
+static struct clk_core *xgene_register_clk_pll(struct device *dev,
const char *name, const char *parent_name,
unsigned long flags, void __iomem *reg, u32 pll_offset,
u32 type, spinlock_t *lock)
{
struct xgene_clk_pll *apmclk;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
/* allocate the APM clock structure */
@@ -166,7 +166,7 @@ static struct clk *xgene_register_clk_pll(struct device *dev,
static void xgene_pllclk_init(struct device_node *np, enum xgene_pll_type pll_type)
{
const char *clk_name = np->full_name;
- struct clk *clk;
+ struct clk_core *clk;
void *reg;
reg = of_iomap(np, 0);
@@ -395,12 +395,12 @@ const struct clk_ops xgene_clk_ops = {
.round_rate = xgene_clk_round_rate,
};
-static struct clk *xgene_register_clk(struct device *dev,
+static struct clk_core *xgene_register_clk(struct device *dev,
const char *name, const char *parent_name,
struct xgene_dev_parameters *parameters, spinlock_t *lock)
{
struct xgene_clk *apmclk;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
int rc;
@@ -442,7 +442,7 @@ static struct clk *xgene_register_clk(struct device *dev,
static void __init xgene_devclk_init(struct device_node *np)
{
const char *clk_name = np->full_name;
- struct clk *clk;
+ struct clk_core *clk;
struct resource res;
int rc;
struct xgene_dev_parameters parameters;
diff --git a/drivers/clk/clk.h b/drivers/clk/clk.h
index c798138..d278572 100644
--- a/drivers/clk/clk.h
+++ b/drivers/clk/clk.h
@@ -10,8 +10,8 @@
*/
#if defined(CONFIG_OF) && defined(CONFIG_COMMON_CLK)
-struct clk *of_clk_get_by_clkspec(struct of_phandle_args *clkspec);
-struct clk *__of_clk_get_from_provider(struct of_phandle_args *clkspec);
+struct clk_core *of_clk_get_by_clkspec(struct of_phandle_args *clkspec);
+struct clk_core *__of_clk_get_from_provider(struct of_phandle_args *clkspec);
void of_clk_lock(void);
void of_clk_unlock(void);
#endif
diff --git a/drivers/clk/hisilicon/clk-hi3620.c b/drivers/clk/hisilicon/clk-hi3620.c
index 339945d..26f11a3 100644
--- a/drivers/clk/hisilicon/clk-hi3620.c
+++ b/drivers/clk/hisilicon/clk-hi3620.c
@@ -31,7 +31,6 @@
#include <linux/of_address.h>
#include <linux/of_device.h>
#include <linux/slab.h>
-#include <linux/clk.h>
#include <dt-bindings/clock/hi3620-clock.h>
@@ -296,7 +295,7 @@ static unsigned long mmc_clk_recalc_rate(struct clk_hw *hw,
static long mmc_clk_determine_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *best_parent_rate,
- struct clk **best_parent_p)
+ struct clk_core **best_parent_p)
{
struct clk_mmc *mclk = to_mmc(hw);
unsigned long best = 0;
@@ -427,11 +426,11 @@ static struct clk_ops clk_mmc_ops = {
.recalc_rate = mmc_clk_recalc_rate,
};
-static struct clk *hisi_register_clk_mmc(struct hisi_mmc_clock *mmc_clk,
+static struct clk_core *hisi_register_clk_mmc(struct hisi_mmc_clock *mmc_clk,
void __iomem *base, struct device_node *np)
{
struct clk_mmc *mclk;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
mclk = kzalloc(sizeof(*mclk), GFP_KERNEL);
@@ -487,7 +486,7 @@ static void __init hi3620_mmc_clk_init(struct device_node *node)
if (WARN_ON(!clk_data))
return;
- clk_data->clks = kzalloc(sizeof(struct clk *) * num, GFP_KERNEL);
+ clk_data->clks = kzalloc(sizeof(struct clk_core *) * num, GFP_KERNEL);
if (!clk_data->clks) {
pr_err("%s: fail to allocate mmc clk\n", __func__);
return;
diff --git a/drivers/clk/hisilicon/clk-hip04.c b/drivers/clk/hisilicon/clk-hip04.c
index 132b57a..e8403c0 100644
--- a/drivers/clk/hisilicon/clk-hip04.c
+++ b/drivers/clk/hisilicon/clk-hip04.c
@@ -30,7 +30,6 @@
#include <linux/of_address.h>
#include <linux/of_device.h>
#include <linux/slab.h>
-#include <linux/clk.h>
#include <dt-bindings/clock/hip04-clock.h>
diff --git a/drivers/clk/hisilicon/clk.c b/drivers/clk/hisilicon/clk.c
index a078e84..00b7c9c 100644
--- a/drivers/clk/hisilicon/clk.c
+++ b/drivers/clk/hisilicon/clk.c
@@ -32,7 +32,6 @@
#include <linux/of_address.h>
#include <linux/of_device.h>
#include <linux/slab.h>
-#include <linux/clk.h>
#include "clk.h"
@@ -42,7 +41,7 @@ struct hisi_clock_data __init *hisi_clk_init(struct device_node *np,
int nr_clks)
{
struct hisi_clock_data *clk_data;
- struct clk **clk_table;
+ struct clk_core **clk_table;
void __iomem *base;
if (np) {
@@ -63,7 +62,7 @@ struct hisi_clock_data __init *hisi_clk_init(struct device_node *np,
}
clk_data->base = base;
- clk_table = kzalloc(sizeof(struct clk *) * nr_clks, GFP_KERNEL);
+ clk_table = kzalloc(sizeof(struct clk_core *) * nr_clks, GFP_KERNEL);
if (!clk_table) {
pr_err("%s: could not allocate clock lookup table\n", __func__);
goto err_data;
@@ -81,7 +80,7 @@ err:
void __init hisi_clk_register_fixed_rate(struct hisi_fixed_rate_clock *clks,
int nums, struct hisi_clock_data *data)
{
- struct clk *clk;
+ struct clk_core *clk;
int i;
for (i = 0; i < nums; i++) {
@@ -102,7 +101,7 @@ void __init hisi_clk_register_fixed_factor(struct hisi_fixed_factor_clock *clks,
int nums,
struct hisi_clock_data *data)
{
- struct clk *clk;
+ struct clk_core *clk;
int i;
for (i = 0; i < nums; i++) {
@@ -122,7 +121,7 @@ void __init hisi_clk_register_fixed_factor(struct hisi_fixed_factor_clock *clks,
void __init hisi_clk_register_mux(struct hisi_mux_clock *clks,
int nums, struct hisi_clock_data *data)
{
- struct clk *clk;
+ struct clk_core *clk;
void __iomem *base = data->base;
int i;
@@ -151,7 +150,7 @@ void __init hisi_clk_register_mux(struct hisi_mux_clock *clks,
void __init hisi_clk_register_divider(struct hisi_divider_clock *clks,
int nums, struct hisi_clock_data *data)
{
- struct clk *clk;
+ struct clk_core *clk;
void __iomem *base = data->base;
int i;
@@ -180,7 +179,7 @@ void __init hisi_clk_register_divider(struct hisi_divider_clock *clks,
void __init hisi_clk_register_gate(struct hisi_gate_clock *clks,
int nums, struct hisi_clock_data *data)
{
- struct clk *clk;
+ struct clk_core *clk;
void __iomem *base = data->base;
int i;
@@ -208,7 +207,7 @@ void __init hisi_clk_register_gate(struct hisi_gate_clock *clks,
void __init hisi_clk_register_gate_sep(struct hisi_gate_clock *clks,
int nums, struct hisi_clock_data *data)
{
- struct clk *clk;
+ struct clk_core *clk;
void __iomem *base = data->base;
int i;
diff --git a/drivers/clk/hisilicon/clk.h b/drivers/clk/hisilicon/clk.h
index 31083ff..f7fc4b9 100644
--- a/drivers/clk/hisilicon/clk.h
+++ b/drivers/clk/hisilicon/clk.h
@@ -90,7 +90,7 @@ struct hisi_gate_clock {
const char *alias;
};
-struct clk *hisi_register_clkgate_sep(struct device *, const char *,
+struct clk_core *hisi_register_clkgate_sep(struct device *, const char *,
const char *, unsigned long,
void __iomem *, u8,
u8, spinlock_t *);
diff --git a/drivers/clk/hisilicon/clkgate-separated.c b/drivers/clk/hisilicon/clkgate-separated.c
index b03d5a7..5db5ba6 100644
--- a/drivers/clk/hisilicon/clkgate-separated.c
+++ b/drivers/clk/hisilicon/clkgate-separated.c
@@ -28,7 +28,6 @@
#include <linux/clkdev.h>
#include <linux/io.h>
#include <linux/slab.h>
-#include <linux/clk.h>
#include "clk.h"
@@ -96,14 +95,14 @@ static struct clk_ops clkgate_separated_ops = {
.is_enabled = clkgate_separated_is_enabled,
};
-struct clk *hisi_register_clkgate_sep(struct device *dev, const char *name,
+struct clk_core *hisi_register_clkgate_sep(struct device *dev, const char *name,
const char *parent_name,
unsigned long flags,
void __iomem *reg, u8 bit_idx,
u8 clk_gate_flags, spinlock_t *lock)
{
struct clkgate_separated *sclk;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
sclk = kzalloc(sizeof(*sclk), GFP_KERNEL);
diff --git a/drivers/clk/keystone/gate.c b/drivers/clk/keystone/gate.c
index 86f1e36..6bb211a 100644
--- a/drivers/clk/keystone/gate.c
+++ b/drivers/clk/keystone/gate.c
@@ -10,7 +10,6 @@
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/err.h>
#include <linux/io.h>
@@ -163,7 +162,7 @@ static const struct clk_ops clk_psc_ops = {
* @psc_data: platform data to configure this clock
* @lock: spinlock used by this clock
*/
-static struct clk *clk_register_psc(struct device *dev,
+static struct clk_core *clk_register_psc(struct device *dev,
const char *name,
const char *parent_name,
struct clk_psc_data *psc_data,
@@ -171,7 +170,7 @@ static struct clk *clk_register_psc(struct device *dev,
{
struct clk_init_data init;
struct clk_psc *psc;
- struct clk *clk;
+ struct clk_core *clk;
psc = kzalloc(sizeof(*psc), GFP_KERNEL);
if (!psc)
@@ -204,7 +203,7 @@ static void __init of_psc_clk_init(struct device_node *node, spinlock_t *lock)
const char *clk_name = node->name;
const char *parent_name;
struct clk_psc_data *data;
- struct clk *clk;
+ struct clk_core *clk;
int i;
data = kzalloc(sizeof(*data), GFP_KERNEL);
diff --git a/drivers/clk/keystone/pll.c b/drivers/clk/keystone/pll.c
index 0dd8a4b..2e31895 100644
--- a/drivers/clk/keystone/pll.c
+++ b/drivers/clk/keystone/pll.c
@@ -10,7 +10,6 @@
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/err.h>
#include <linux/io.h>
@@ -116,14 +115,14 @@ static const struct clk_ops clk_pll_ops = {
.recalc_rate = clk_pllclk_recalc,
};
-static struct clk *clk_register_pll(struct device *dev,
+static struct clk_core *clk_register_pll(struct device *dev,
const char *name,
const char *parent_name,
struct clk_pll_data *pll_data)
{
struct clk_init_data init;
struct clk_pll *pll;
- struct clk *clk;
+ struct clk_core *clk;
pll = kzalloc(sizeof(*pll), GFP_KERNEL);
if (!pll)
@@ -158,7 +157,7 @@ static void __init _of_pll_clk_init(struct device_node *node, bool pllctrl)
{
struct clk_pll_data *pll_data;
const char *parent_name;
- struct clk *clk;
+ struct clk_core *clk;
int i;
pll_data = kzalloc(sizeof(*pll_data), GFP_KERNEL);
@@ -239,7 +238,7 @@ static void __init of_pll_div_clk_init(struct device_node *node)
const char *parent_name;
void __iomem *reg;
u32 shift, mask;
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name = node->name;
of_property_read_string(node, "clock-output-names", &clk_name);
@@ -282,7 +281,7 @@ static void __init of_pll_mux_clk_init(struct device_node *node)
{
void __iomem *reg;
u32 shift, mask;
- struct clk *clk;
+ struct clk_core *clk;
const char *parents[2];
const char *clk_name = node->name;
diff --git a/drivers/clk/mmp/clk-apbc.c b/drivers/clk/mmp/clk-apbc.c
index d14120e..4a1de49 100644
--- a/drivers/clk/mmp/clk-apbc.c
+++ b/drivers/clk/mmp/clk-apbc.c
@@ -10,7 +10,6 @@
*/
#include <linux/kernel.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include <linux/err.h>
#include <linux/delay.h>
@@ -120,12 +119,12 @@ struct clk_ops clk_apbc_ops = {
.unprepare = clk_apbc_unprepare,
};
-struct clk *mmp_clk_register_apbc(const char *name, const char *parent_name,
+struct clk_core *mmp_clk_register_apbc(const char *name, const char *parent_name,
void __iomem *base, unsigned int delay,
unsigned int apbc_flags, spinlock_t *lock)
{
struct clk_apbc *apbc;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
apbc = kzalloc(sizeof(*apbc), GFP_KERNEL);
diff --git a/drivers/clk/mmp/clk-apmu.c b/drivers/clk/mmp/clk-apmu.c
index abe182b..cbc0712 100644
--- a/drivers/clk/mmp/clk-apmu.c
+++ b/drivers/clk/mmp/clk-apmu.c
@@ -10,7 +10,6 @@
*/
#include <linux/kernel.h>
-#include <linux/clk.h>
#include <linux/io.h>
#include <linux/err.h>
#include <linux/delay.h>
@@ -66,11 +65,11 @@ struct clk_ops clk_apmu_ops = {
.disable = clk_apmu_disable,
};
-struct clk *mmp_clk_register_apmu(const char *name, const char *parent_name,
+struct clk_core *mmp_clk_register_apmu(const char *name, const char *parent_name,
void __iomem *base, u32 enable_mask, spinlock_t *lock)
{
struct clk_apmu *apmu;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
apmu = kzalloc(sizeof(*apmu), GFP_KERNEL);
diff --git a/drivers/clk/mmp/clk-frac.c b/drivers/clk/mmp/clk-frac.c
index 23a56f5..0386cdd 100644
--- a/drivers/clk/mmp/clk-frac.c
+++ b/drivers/clk/mmp/clk-frac.c
@@ -116,14 +116,14 @@ static struct clk_ops clk_factor_ops = {
.set_rate = clk_factor_set_rate,
};
-struct clk *mmp_clk_register_factor(const char *name, const char *parent_name,
+struct clk_core *mmp_clk_register_factor(const char *name, const char *parent_name,
unsigned long flags, void __iomem *base,
struct clk_factor_masks *masks, struct clk_factor_tbl *ftbl,
unsigned int ftbl_cnt)
{
struct clk_factor *factor;
struct clk_init_data init;
- struct clk *clk;
+ struct clk_core *clk;
if (!masks) {
pr_err("%s: must pass a clk_factor_mask\n", __func__);
diff --git a/drivers/clk/mmp/clk-mmp2.c b/drivers/clk/mmp/clk-mmp2.c
index b2721ca..98bd73f 100644
--- a/drivers/clk/mmp/clk-mmp2.c
+++ b/drivers/clk/mmp/clk-mmp2.c
@@ -77,8 +77,8 @@ static const char *ccic_parent[] = {"pll1_2", "pll1_16", "vctcxo"};
void __init mmp2_clk_init(void)
{
- struct clk *clk;
- struct clk *vctcxo;
+ struct clk_core *clk;
+ struct clk_core *vctcxo;
void __iomem *mpmu_base;
void __iomem *apmu_base;
void __iomem *apbc_base;
@@ -192,7 +192,7 @@ void __init mmp2_clk_init(void)
mpmu_base + MPMU_UART_PLL,
&uart_factor_masks, uart_factor_tbl,
ARRAY_SIZE(uart_factor_tbl));
- clk_set_rate(clk, 14745600);
+ clk_provider_set_rate(clk, 14745600);
clk_register_clkdev(clk, "uart_pll", NULL);
clk = mmp_clk_register_apbc("twsi0", "vctcxo",
@@ -251,7 +251,7 @@ void __init mmp2_clk_init(void)
ARRAY_SIZE(uart_parent),
CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
apbc_base + APBC_UART0, 4, 3, 0, &clk_lock);
- clk_set_parent(clk, vctcxo);
+ clk_provider_set_parent(clk, vctcxo);
clk_register_clkdev(clk, "uart_mux.0", NULL);
clk = mmp_clk_register_apbc("uart0", "uart0_mux",
@@ -262,7 +262,7 @@ void __init mmp2_clk_init(void)
ARRAY_SIZE(uart_parent),
CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
apbc_base + APBC_UART1, 4, 3, 0, &clk_lock);
- clk_set_parent(clk, vctcxo);
+ clk_provider_set_parent(clk, vctcxo);
clk_register_clkdev(clk, "uart_mux.1", NULL);
clk = mmp_clk_register_apbc("uart1", "uart1_mux",
@@ -273,7 +273,7 @@ void __init mmp2_clk_init(void)
ARRAY_SIZE(uart_parent),
CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
apbc_base + APBC_UART2, 4, 3, 0, &clk_lock);
- clk_set_parent(clk, vctcxo);
+ clk_provider_set_parent(clk, vctcxo);
clk_register_clkdev(clk, "uart_mux.2", NULL);
clk = mmp_clk_register_apbc("uart2", "uart2_mux",
@@ -284,7 +284,7 @@ void __init mmp2_clk_init(void)
ARRAY_SIZE(uart_parent),
CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
apbc_base + APBC_UART3, 4, 3, 0, &clk_lock);
- clk_set_parent(clk, vctcxo);
+ clk_provider_set_parent(clk, vctcxo);
clk_register_clkdev(clk, "uart_mux.3", NULL);
clk = mmp_clk_register_apbc("uart3", "uart3_mux",
diff --git a/drivers/clk/mmp/clk-pxa168.c b/drivers/clk/mmp/clk-pxa168.c
index 014396b..e4f50ab 100644
--- a/drivers/clk/mmp/clk-pxa168.c
+++ b/drivers/clk/mmp/clk-pxa168.c
@@ -68,8 +68,8 @@ static const char *ccic_phy_parent[] = {"pll1_6", "pll1_12"};
void __init pxa168_clk_init(void)
{
- struct clk *clk;
- struct clk *uart_pll;
+ struct clk_core *clk;
+ struct clk_core *uart_pll;
void __iomem *mpmu_base;
void __iomem *apmu_base;
void __iomem *apbc_base;
@@ -159,7 +159,7 @@ void __init pxa168_clk_init(void)
mpmu_base + MPMU_UART_PLL,
&uart_factor_masks, uart_factor_tbl,
ARRAY_SIZE(uart_factor_tbl));
- clk_set_rate(uart_pll, 14745600);
+ clk_provider_set_rate(uart_pll, 14745600);
clk_register_clkdev(uart_pll, "uart_pll", NULL);
clk = mmp_clk_register_apbc("twsi0", "pll1_13_1_5",
@@ -202,7 +202,7 @@ void __init pxa168_clk_init(void)
ARRAY_SIZE(uart_parent),
CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
apbc_base + APBC_UART0, 4, 3, 0, &clk_lock);
- clk_set_parent(clk, uart_pll);
+ clk_provider_set_parent(clk, uart_pll);
clk_register_clkdev(clk, "uart_mux.0", NULL);
clk = mmp_clk_register_apbc("uart0", "uart0_mux",
@@ -213,7 +213,7 @@ void __init pxa168_clk_init(void)
ARRAY_SIZE(uart_parent),
CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
apbc_base + APBC_UART1, 4, 3, 0, &clk_lock);
- clk_set_parent(clk, uart_pll);
+ clk_provider_set_parent(clk, uart_pll);
clk_register_clkdev(clk, "uart_mux.1", NULL);
clk = mmp_clk_register_apbc("uart1", "uart1_mux",
@@ -224,7 +224,7 @@ void __init pxa168_clk_init(void)
ARRAY_SIZE(uart_parent),
CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
apbc_base + APBC_UART2, 4, 3, 0, &clk_lock);
- clk_set_parent(clk, uart_pll);
+ clk_provider_set_parent(clk, uart_pll);
clk_register_clkdev(clk, "uart_mux.2", NULL);
clk = mmp_clk_register_apbc("uart2", "uart2_mux",
diff --git a/drivers/clk/mmp/clk-pxa910.c b/drivers/clk/mmp/clk-pxa910.c
index 9efc6a4..b5c215e 100644
--- a/drivers/clk/mmp/clk-pxa910.c
+++ b/drivers/clk/mmp/clk-pxa910.c
@@ -66,8 +66,8 @@ static const char *ccic_phy_parent[] = {"pll1_6", "pll1_12"};
void __init pxa910_clk_init(void)
{
- struct clk *clk;
- struct clk *uart_pll;
+ struct clk_core *clk;
+ struct clk_core *uart_pll;
void __iomem *mpmu_base;
void __iomem *apmu_base;
void __iomem *apbcp_base;
@@ -164,7 +164,7 @@ void __init pxa910_clk_init(void)
mpmu_base + MPMU_UART_PLL,
&uart_factor_masks, uart_factor_tbl,
ARRAY_SIZE(uart_factor_tbl));
- clk_set_rate(uart_pll, 14745600);
+ clk_provider_set_rate(uart_pll, 14745600);
clk_register_clkdev(uart_pll, "uart_pll", NULL);
clk = mmp_clk_register_apbc("twsi0", "pll1_13_1_5",
@@ -207,7 +207,7 @@ void __init pxa910_clk_init(void)
ARRAY_SIZE(uart_parent),
CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
apbc_base + APBC_UART0, 4, 3, 0, &clk_lock);
- clk_set_parent(clk, uart_pll);
+ clk_provider_set_parent(clk, uart_pll);
clk_register_clkdev(clk, "uart_mux.0", NULL);
clk = mmp_clk_register_apbc("uart0", "uart0_mux",
@@ -218,7 +218,7 @@ void __init pxa910_clk_init(void)
ARRAY_SIZE(uart_parent),
CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
apbc_base + APBC_UART1, 4, 3, 0, &clk_lock);
- clk_set_parent(clk, uart_pll);
+ clk_provider_set_parent(clk, uart_pll);
clk_register_clkdev(clk, "uart_mux.1", NULL);
clk = mmp_clk_register_apbc("uart1", "uart1_mux",
@@ -229,7 +229,7 @@ void __init pxa910_clk_init(void)
ARRAY_SIZE(uart_parent),
CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
apbcp_base + APBCP_UART2, 4, 3, 0, &clk_lock);
- clk_set_parent(clk, uart_pll);
+ clk_provider_set_parent(clk, uart_pll);
clk_register_clkdev(clk, "uart_mux.2", NULL);
clk = mmp_clk_register_apbc("uart2", "uart2_mux",
diff --git a/drivers/clk/mmp/clk.h b/drivers/clk/mmp/clk.h
index ab86dd4..1477e61 100644
--- a/drivers/clk/mmp/clk.h
+++ b/drivers/clk/mmp/clk.h
@@ -20,15 +20,15 @@ struct clk_factor_tbl {
unsigned int den;
};
-extern struct clk *mmp_clk_register_pll2(const char *name,
+extern struct clk_core *mmp_clk_register_pll2(const char *name,
const char *parent_name, unsigned long flags);
-extern struct clk *mmp_clk_register_apbc(const char *name,
+extern struct clk_core *mmp_clk_register_apbc(const char *name,
const char *parent_name, void __iomem *base,
unsigned int delay, unsigned int apbc_flags, spinlock_t *lock);
-extern struct clk *mmp_clk_register_apmu(const char *name,
+extern struct clk_core *mmp_clk_register_apmu(const char *name,
const char *parent_name, void __iomem *base, u32 enable_mask,
spinlock_t *lock);
-extern struct clk *mmp_clk_register_factor(const char *name,
+extern struct clk_core *mmp_clk_register_factor(const char *name,
const char *parent_name, unsigned long flags,
void __iomem *base, struct clk_factor_masks *masks,
struct clk_factor_tbl *ftbl, unsigned int ftbl_cnt);
diff --git a/drivers/clk/mvebu/clk-corediv.c b/drivers/clk/mvebu/clk-corediv.c
index d1e5863..1be15c4 100644
--- a/drivers/clk/mvebu/clk-corediv.c
+++ b/drivers/clk/mvebu/clk-corediv.c
@@ -238,7 +238,7 @@ mvebu_corediv_clk_init(struct device_node *node,
{
struct clk_init_data init;
struct clk_corediv *corediv;
- struct clk **clks;
+ struct clk_core **clks;
void __iomem *base;
const char *parent_name;
const char *clk_name;
@@ -253,7 +253,7 @@ mvebu_corediv_clk_init(struct device_node *node,
clk_data.clk_num = soc_desc->ndescs;
/* clks holds the clock array */
- clks = kcalloc(clk_data.clk_num, sizeof(struct clk *),
+ clks = kcalloc(clk_data.clk_num, sizeof(struct clk_core *),
GFP_KERNEL);
if (WARN_ON(!clks))
goto err_unmap;
diff --git a/drivers/clk/mvebu/clk-cpu.c b/drivers/clk/mvebu/clk-cpu.c
index 3821a88..59a40c7 100644
--- a/drivers/clk/mvebu/clk-cpu.c
+++ b/drivers/clk/mvebu/clk-cpu.c
@@ -40,7 +40,7 @@ struct cpu_clk {
void __iomem *pmu_dfs;
};
-static struct clk **clks;
+static struct clk_core **clks;
static struct clk_onecell_data clk_data;
@@ -195,8 +195,8 @@ static void __init of_cpu_clk_setup(struct device_node *node)
for_each_node_by_type(dn, "cpu") {
struct clk_init_data init;
- struct clk *clk;
- struct clk *parent_clk;
+ struct clk_core *clk;
+ struct clk_core *parent_clk;
char *clk_name = kzalloc(5, GFP_KERNEL);
int cpu, err;
@@ -208,7 +208,7 @@ static void __init of_cpu_clk_setup(struct device_node *node)
goto bail_out;
sprintf(clk_name, "cpu%d", cpu);
- parent_clk = of_clk_get(node, 0);
+ parent_clk = of_clk_provider_get(node, 0);
cpuclk[cpu].parent_name = __clk_get_name(parent_clk);
cpuclk[cpu].clk_name = clk_name;
diff --git a/drivers/clk/mvebu/common.c b/drivers/clk/mvebu/common.c
index 8145c4e..f6e14f8 100644
--- a/drivers/clk/mvebu/common.c
+++ b/drivers/clk/mvebu/common.c
@@ -13,7 +13,6 @@
*/
#include <linux/kernel.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/io.h>
@@ -43,7 +42,7 @@ void __init mvebu_coreclk_setup(struct device_node *np,
/* Allocate struct for TCLK, cpu clk, and core ratio clocks */
clk_data.clk_num = 2 + desc->num_ratios;
- clk_data.clks = kzalloc(clk_data.clk_num * sizeof(struct clk *),
+ clk_data.clks = kzalloc(clk_data.clk_num * sizeof(struct clk_core *),
GFP_KERNEL);
if (WARN_ON(!clk_data.clks)) {
iounmap(base);
@@ -93,13 +92,13 @@ DEFINE_SPINLOCK(ctrl_gating_lock);
struct clk_gating_ctrl {
spinlock_t *lock;
- struct clk **gates;
+ struct clk_core **gates;
int num_gates;
};
#define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw)
-static struct clk *clk_gating_get_src(
+static struct clk_core *clk_gating_get_src(
struct of_phandle_args *clkspec, void *data)
{
struct clk_gating_ctrl *ctrl = (struct clk_gating_ctrl *)data;
@@ -121,7 +120,7 @@ void __init mvebu_clk_gating_setup(struct device_node *np,
const struct clk_gating_soc_desc *desc)
{
struct clk_gating_ctrl *ctrl;
- struct clk *clk;
+ struct clk_core *clk;
void __iomem *base;
const char *default_parent = NULL;
int n;
@@ -130,10 +129,10 @@ void __init mvebu_clk_gating_setup(struct device_node *np,
if (WARN_ON(!base))
return;
- clk = of_clk_get(np, 0);
+ clk = of_clk_provider_get(np, 0);
if (!IS_ERR(clk)) {
default_parent = __clk_get_name(clk);
- clk_put(clk);
+ __clk_put(clk);
}
ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL);
@@ -148,7 +147,7 @@ void __init mvebu_clk_gating_setup(struct device_node *np,
n++;
ctrl->num_gates = n;
- ctrl->gates = kzalloc(ctrl->num_gates * sizeof(struct clk *),
+ ctrl->gates = kzalloc(ctrl->num_gates * sizeof(struct clk_core *),
GFP_KERNEL);
if (WARN_ON(!ctrl->gates))
goto gates_out;
diff --git a/drivers/clk/mvebu/kirkwood.c b/drivers/clk/mvebu/kirkwood.c
index 99550f2..5d0978b 100644
--- a/drivers/clk/mvebu/kirkwood.c
+++ b/drivers/clk/mvebu/kirkwood.c
@@ -242,7 +242,7 @@ struct clk_muxing_soc_desc {
struct clk_muxing_ctrl {
spinlock_t *lock;
- struct clk **muxes;
+ struct clk_core **muxes;
int num_muxes;
};
@@ -258,7 +258,7 @@ static const struct clk_muxing_soc_desc kirkwood_mux_desc[] __initconst = {
#define to_clk_mux(_hw) container_of(_hw, struct clk_mux, hw)
-static struct clk *clk_muxing_get_src(
+static struct clk_core *clk_muxing_get_src(
struct of_phandle_args *clkspec, void *data)
{
struct clk_muxing_ctrl *ctrl = (struct clk_muxing_ctrl *)data;
@@ -299,7 +299,7 @@ static void __init kirkwood_clk_muxing_setup(struct device_node *np,
n++;
ctrl->num_muxes = n;
- ctrl->muxes = kcalloc(ctrl->num_muxes, sizeof(struct clk *),
+ ctrl->muxes = kcalloc(ctrl->num_muxes, sizeof(struct clk_core *),
GFP_KERNEL);
if (WARN_ON(!ctrl->muxes))
goto muxes_out;
diff --git a/drivers/clk/mxs/clk-div.c b/drivers/clk/mxs/clk-div.c
index 90e1da9..73ca1e8 100644
--- a/drivers/clk/mxs/clk-div.c
+++ b/drivers/clk/mxs/clk-div.c
@@ -9,7 +9,6 @@
* http://www.gnu.org/copyleft/gpl.html
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/err.h>
#include <linux/slab.h>
@@ -74,11 +73,11 @@ static struct clk_ops clk_div_ops = {
.set_rate = clk_div_set_rate,
};
-struct clk *mxs_clk_div(const char *name, const char *parent_name,
+struct clk_core *mxs_clk_div(const char *name, const char *parent_name,
void __iomem *reg, u8 shift, u8 width, u8 busy)
{
struct clk_div *div;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
div = kzalloc(sizeof(*div), GFP_KERNEL);
diff --git a/drivers/clk/mxs/clk-frac.c b/drivers/clk/mxs/clk-frac.c
index e6aa6b5..65cedf8 100644
--- a/drivers/clk/mxs/clk-frac.c
+++ b/drivers/clk/mxs/clk-frac.c
@@ -9,7 +9,6 @@
* http://www.gnu.org/copyleft/gpl.html
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/err.h>
#include <linux/io.h>
@@ -108,11 +107,11 @@ static struct clk_ops clk_frac_ops = {
.set_rate = clk_frac_set_rate,
};
-struct clk *mxs_clk_frac(const char *name, const char *parent_name,
+struct clk_core *mxs_clk_frac(const char *name, const char *parent_name,
void __iomem *reg, u8 shift, u8 width, u8 busy)
{
struct clk_frac *frac;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
frac = kzalloc(sizeof(*frac), GFP_KERNEL);
diff --git a/drivers/clk/mxs/clk-imx23.c b/drivers/clk/mxs/clk-imx23.c
index 9fc9359..43f2d31 100644
--- a/drivers/clk/mxs/clk-imx23.c
+++ b/drivers/clk/mxs/clk-imx23.c
@@ -9,7 +9,6 @@
* http://www.gnu.org/copyleft/gpl.html
*/
-#include <linux/clk.h>
#include <linux/clk/mxs.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
@@ -94,7 +93,7 @@ enum imx23_clk {
clk_max
};
-static struct clk *clks[clk_max];
+static struct clk_core *clks[clk_max];
static struct clk_onecell_data clk_data;
static enum imx23_clk clks_init_on[] __initdata = {
@@ -171,7 +170,7 @@ static void __init mx23_clocks_init(struct device_node *np)
of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
- clk_prepare_enable(clks[clks_init_on[i]]);
+ clk_provider_prepare_enable(clks[clks_init_on[i]]);
}
CLK_OF_DECLARE(imx23_clkctrl, "fsl,imx23-clkctrl", mx23_clocks_init);
diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c
index a6c3501..e6d70ac 100644
--- a/drivers/clk/mxs/clk-imx28.c
+++ b/drivers/clk/mxs/clk-imx28.c
@@ -9,7 +9,6 @@
* http://www.gnu.org/copyleft/gpl.html
*/
-#include <linux/clk.h>
#include <linux/clk/mxs.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
@@ -148,7 +147,7 @@ enum imx28_clk {
clk_max
};
-static struct clk *clks[clk_max];
+static struct clk_core *clks[clk_max];
static struct clk_onecell_data clk_data;
static enum imx28_clk clks_init_on[] __initdata = {
@@ -250,6 +249,6 @@ static void __init mx28_clocks_init(struct device_node *np)
clk_register_clkdev(clks[enet_out], NULL, "enet_out");
for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
- clk_prepare_enable(clks[clks_init_on[i]]);
+ clk_provider_prepare_enable(clks[clks_init_on[i]]);
}
CLK_OF_DECLARE(imx28_clkctrl, "fsl,imx28-clkctrl", mx28_clocks_init);
diff --git a/drivers/clk/mxs/clk-pll.c b/drivers/clk/mxs/clk-pll.c
index fadae41..e0f94ac 100644
--- a/drivers/clk/mxs/clk-pll.c
+++ b/drivers/clk/mxs/clk-pll.c
@@ -9,7 +9,6 @@
* http://www.gnu.org/copyleft/gpl.html
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/delay.h>
#include <linux/err.h>
@@ -86,11 +85,11 @@ static const struct clk_ops clk_pll_ops = {
.recalc_rate = clk_pll_recalc_rate,
};
-struct clk *mxs_clk_pll(const char *name, const char *parent_name,
+struct clk_core *mxs_clk_pll(const char *name, const char *parent_name,
void __iomem *base, u8 power, unsigned long rate)
{
struct clk_pll *pll;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
pll = kzalloc(sizeof(*pll), GFP_KERNEL);
diff --git a/drivers/clk/mxs/clk-ref.c b/drivers/clk/mxs/clk-ref.c
index 4adeed6..af75c3f 100644
--- a/drivers/clk/mxs/clk-ref.c
+++ b/drivers/clk/mxs/clk-ref.c
@@ -9,7 +9,6 @@
* http://www.gnu.org/copyleft/gpl.html
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/err.h>
#include <linux/io.h>
@@ -125,11 +124,11 @@ static const struct clk_ops clk_ref_ops = {
.set_rate = clk_ref_set_rate,
};
-struct clk *mxs_clk_ref(const char *name, const char *parent_name,
+struct clk_core *mxs_clk_ref(const char *name, const char *parent_name,
void __iomem *reg, u8 idx)
{
struct clk_ref *ref;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
ref = kzalloc(sizeof(*ref), GFP_KERNEL);
diff --git a/drivers/clk/mxs/clk.h b/drivers/clk/mxs/clk.h
index ef10ad9..19b9dc3 100644
--- a/drivers/clk/mxs/clk.h
+++ b/drivers/clk/mxs/clk.h
@@ -12,7 +12,6 @@
#ifndef __MXS_CLK_H
#define __MXS_CLK_H
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/spinlock.h>
@@ -23,24 +22,24 @@ extern spinlock_t mxs_lock;
int mxs_clk_wait(void __iomem *reg, u8 shift);
-struct clk *mxs_clk_pll(const char *name, const char *parent_name,
+struct clk_core *mxs_clk_pll(const char *name, const char *parent_name,
void __iomem *base, u8 power, unsigned long rate);
-struct clk *mxs_clk_ref(const char *name, const char *parent_name,
+struct clk_core *mxs_clk_ref(const char *name, const char *parent_name,
void __iomem *reg, u8 idx);
-struct clk *mxs_clk_div(const char *name, const char *parent_name,
+struct clk_core *mxs_clk_div(const char *name, const char *parent_name,
void __iomem *reg, u8 shift, u8 width, u8 busy);
-struct clk *mxs_clk_frac(const char *name, const char *parent_name,
+struct clk_core *mxs_clk_frac(const char *name, const char *parent_name,
void __iomem *reg, u8 shift, u8 width, u8 busy);
-static inline struct clk *mxs_clk_fixed(const char *name, int rate)
+static inline struct clk_core *mxs_clk_fixed(const char *name, int rate)
{
return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate);
}
-static inline struct clk *mxs_clk_gate(const char *name,
+static inline struct clk_core *mxs_clk_gate(const char *name,
const char *parent_name, void __iomem *reg, u8 shift)
{
return clk_register_gate(NULL, name, parent_name, CLK_SET_RATE_PARENT,
@@ -48,7 +47,7 @@ static inline struct clk *mxs_clk_gate(const char *name,
&mxs_lock);
}
-static inline struct clk *mxs_clk_mux(const char *name, void __iomem *reg,
+static inline struct clk_core *mxs_clk_mux(const char *name, void __iomem *reg,
u8 shift, u8 width, const char **parent_names, int num_parents)
{
return clk_register_mux(NULL, name, parent_names, num_parents,
@@ -56,7 +55,7 @@ static inline struct clk *mxs_clk_mux(const char *name, void __iomem *reg,
reg, shift, width, 0, &mxs_lock);
}
-static inline struct clk *mxs_clk_fixed_factor(const char *name,
+static inline struct clk_core *mxs_clk_fixed_factor(const char *name,
const char *parent_name, unsigned int mult, unsigned int div)
{
return clk_register_fixed_factor(NULL, name, parent_name,
diff --git a/drivers/clk/qcom/clk-rcg.c b/drivers/clk/qcom/clk-rcg.c
index b638c58..59f118c 100644
--- a/drivers/clk/qcom/clk-rcg.c
+++ b/drivers/clk/qcom/clk-rcg.c
@@ -375,7 +375,7 @@ struct freq_tbl *find_freq(const struct freq_tbl *f, unsigned long rate)
static long _freq_tbl_determine_rate(struct clk_hw *hw,
const struct freq_tbl *f, unsigned long rate,
- unsigned long *p_rate, struct clk **p)
+ unsigned long *p_rate, struct clk_core **p)
{
unsigned long clk_flags;
@@ -402,7 +402,7 @@ static long _freq_tbl_determine_rate(struct clk_hw *hw,
}
static long clk_rcg_determine_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long *p_rate, struct clk **p)
+ unsigned long *p_rate, struct clk_core **p)
{
struct clk_rcg *rcg = to_clk_rcg(hw);
@@ -410,7 +410,7 @@ static long clk_rcg_determine_rate(struct clk_hw *hw, unsigned long rate,
}
static long clk_dyn_rcg_determine_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long *p_rate, struct clk **p)
+ unsigned long *p_rate, struct clk_core **p)
{
struct clk_dyn_rcg *rcg = to_clk_dyn_rcg(hw);
@@ -418,7 +418,7 @@ static long clk_dyn_rcg_determine_rate(struct clk_hw *hw, unsigned long rate,
}
static long clk_rcg_bypass_determine_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long *p_rate, struct clk **p)
+ unsigned long *p_rate, struct clk_core **p)
{
struct clk_rcg *rcg = to_clk_rcg(hw);
const struct freq_tbl *f = rcg->freq_tbl;
diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c
index cd185d5..6aac1ec 100644
--- a/drivers/clk/qcom/clk-rcg2.c
+++ b/drivers/clk/qcom/clk-rcg2.c
@@ -188,7 +188,7 @@ struct freq_tbl *find_freq(const struct freq_tbl *f, unsigned long rate)
static long _freq_tbl_determine_rate(struct clk_hw *hw,
const struct freq_tbl *f, unsigned long rate,
- unsigned long *p_rate, struct clk **p)
+ unsigned long *p_rate, struct clk_core **p)
{
unsigned long clk_flags;
@@ -219,7 +219,7 @@ static long _freq_tbl_determine_rate(struct clk_hw *hw,
}
static long clk_rcg2_determine_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long *p_rate, struct clk **p)
+ unsigned long *p_rate, struct clk_core **p)
{
struct clk_rcg2 *rcg = to_clk_rcg2(hw);
@@ -372,7 +372,7 @@ static int clk_edp_pixel_set_rate_and_parent(struct clk_hw *hw,
}
static long clk_edp_pixel_determine_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long *p_rate, struct clk **p)
+ unsigned long *p_rate, struct clk_core **p)
{
struct clk_rcg2 *rcg = to_clk_rcg2(hw);
const struct freq_tbl *f = rcg->freq_tbl;
@@ -423,7 +423,7 @@ const struct clk_ops clk_edp_pixel_ops = {
EXPORT_SYMBOL_GPL(clk_edp_pixel_ops);
static long clk_byte_determine_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long *p_rate, struct clk **p)
+ unsigned long *p_rate, struct clk_core **p)
{
struct clk_rcg2 *rcg = to_clk_rcg2(hw);
const struct freq_tbl *f = rcg->freq_tbl;
@@ -485,14 +485,14 @@ static const struct frac_entry frac_table_pixel[] = {
};
static long clk_pixel_determine_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long *p_rate, struct clk **p)
+ unsigned long *p_rate, struct clk_core **p)
{
struct clk_rcg2 *rcg = to_clk_rcg2(hw);
unsigned long request, src_rate;
int delta = 100000;
const struct freq_tbl *f = rcg->freq_tbl;
const struct frac_entry *frac = frac_table_pixel;
- struct clk *parent = *p = clk_get_parent_by_index(hw->clk, f->src);
+ struct clk_core *parent = *p = clk_get_parent_by_index(hw->clk, f->src);
for (; frac->num; frac++) {
request = (rate * frac->den) / frac->num;
@@ -519,7 +519,7 @@ static int clk_pixel_set_rate(struct clk_hw *hw, unsigned long rate,
int delta = 100000;
u32 mask = BIT(rcg->hid_width) - 1;
u32 hid_div;
- struct clk *parent = clk_get_parent_by_index(hw->clk, f.src);
+ struct clk_core *parent = clk_get_parent_by_index(hw->clk, f.src);
for (; frac->num; frac++) {
request = (rate * frac->den) / frac->num;
diff --git a/drivers/clk/qcom/clk-regmap.c b/drivers/clk/qcom/clk-regmap.c
index a58ba39..2a98040 100644
--- a/drivers/clk/qcom/clk-regmap.c
+++ b/drivers/clk/qcom/clk-regmap.c
@@ -101,7 +101,7 @@ EXPORT_SYMBOL_GPL(clk_disable_regmap);
* clk_regmap struct via this function so that the regmap is initialized
* and so that the clock is registered with the common clock framework.
*/
-struct clk *devm_clk_register_regmap(struct device *dev,
+struct clk_core *devm_clk_register_regmap(struct device *dev,
struct clk_regmap *rclk)
{
if (dev && dev_get_regmap(dev, NULL))
diff --git a/drivers/clk/qcom/clk-regmap.h b/drivers/clk/qcom/clk-regmap.h
index 491a63d..89258cb 100644
--- a/drivers/clk/qcom/clk-regmap.h
+++ b/drivers/clk/qcom/clk-regmap.h
@@ -39,7 +39,7 @@ struct clk_regmap {
int clk_is_enabled_regmap(struct clk_hw *hw);
int clk_enable_regmap(struct clk_hw *hw);
void clk_disable_regmap(struct clk_hw *hw);
-struct clk *
+struct clk_core *
devm_clk_register_regmap(struct device *dev, struct clk_regmap *rclk);
#endif
diff --git a/drivers/clk/qcom/common.c b/drivers/clk/qcom/common.c
index eeb3eea..afd40ea 100644
--- a/drivers/clk/qcom/common.c
+++ b/drivers/clk/qcom/common.c
@@ -24,7 +24,7 @@
struct qcom_cc {
struct qcom_reset_controller reset;
struct clk_onecell_data data;
- struct clk *clks[];
+ struct clk_core *clks[];
};
struct regmap *
@@ -48,9 +48,9 @@ int qcom_cc_really_probe(struct platform_device *pdev,
{
int i, ret;
struct device *dev = &pdev->dev;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_onecell_data *data;
- struct clk **clks;
+ struct clk_core **clks;
struct qcom_reset_controller *reset;
struct qcom_cc *cc;
size_t num_clks = desc->num_clks;
diff --git a/drivers/clk/qcom/gcc-apq8084.c b/drivers/clk/qcom/gcc-apq8084.c
index ee52eb1..27af0cd 100644
--- a/drivers/clk/qcom/gcc-apq8084.c
+++ b/drivers/clk/qcom/gcc-apq8084.c
@@ -3562,7 +3562,7 @@ MODULE_DEVICE_TABLE(of, gcc_apq8084_match_table);
static int gcc_apq8084_probe(struct platform_device *pdev)
{
- struct clk *clk;
+ struct clk_core *clk;
struct device *dev = &pdev->dev;
/* Temporary until RPM clocks supported */
diff --git a/drivers/clk/qcom/gcc-ipq806x.c b/drivers/clk/qcom/gcc-ipq806x.c
index 4032e51..f31f095 100644
--- a/drivers/clk/qcom/gcc-ipq806x.c
+++ b/drivers/clk/qcom/gcc-ipq806x.c
@@ -2376,7 +2376,7 @@ MODULE_DEVICE_TABLE(of, gcc_ipq806x_match_table);
static int gcc_ipq806x_probe(struct platform_device *pdev)
{
- struct clk *clk;
+ struct clk_core *clk;
struct device *dev = &pdev->dev;
/* Temporary until RPM clocks supported */
diff --git a/drivers/clk/qcom/gcc-msm8660.c b/drivers/clk/qcom/gcc-msm8660.c
index 0c4b727..2d41fdb 100644
--- a/drivers/clk/qcom/gcc-msm8660.c
+++ b/drivers/clk/qcom/gcc-msm8660.c
@@ -2718,7 +2718,7 @@ MODULE_DEVICE_TABLE(of, gcc_msm8660_match_table);
static int gcc_msm8660_probe(struct platform_device *pdev)
{
- struct clk *clk;
+ struct clk_core *clk;
struct device *dev = &pdev->dev;
/* Temporary until RPM clocks supported */
diff --git a/drivers/clk/qcom/gcc-msm8960.c b/drivers/clk/qcom/gcc-msm8960.c
index 007534f..ed8f8f5 100644
--- a/drivers/clk/qcom/gcc-msm8960.c
+++ b/drivers/clk/qcom/gcc-msm8960.c
@@ -3488,7 +3488,7 @@ MODULE_DEVICE_TABLE(of, gcc_msm8960_match_table);
static int gcc_msm8960_probe(struct platform_device *pdev)
{
- struct clk *clk;
+ struct clk_core *clk;
struct device *dev = &pdev->dev;
const struct of_device_id *match;
diff --git a/drivers/clk/qcom/gcc-msm8974.c b/drivers/clk/qcom/gcc-msm8974.c
index 7af7c18..8326b1f 100644
--- a/drivers/clk/qcom/gcc-msm8974.c
+++ b/drivers/clk/qcom/gcc-msm8974.c
@@ -2699,7 +2699,7 @@ static void msm8974_pro_clock_override(void)
static int gcc_msm8974_probe(struct platform_device *pdev)
{
- struct clk *clk;
+ struct clk_core *clk;
struct device *dev = &pdev->dev;
bool pro;
const struct of_device_id *id;
diff --git a/drivers/clk/qcom/mmcc-msm8960.c b/drivers/clk/qcom/mmcc-msm8960.c
index 2e80a21..bb60d61 100644
--- a/drivers/clk/qcom/mmcc-msm8960.c
+++ b/drivers/clk/qcom/mmcc-msm8960.c
@@ -505,7 +505,7 @@ static int pix_rdi_set_parent(struct clk_hw *hw, u8 index)
int ret = 0;
u32 val;
struct clk_pix_rdi *rdi = to_clk_pix_rdi(hw);
- struct clk *clk = hw->clk;
+ struct clk_core *clk = hw->clk;
int num_parents = __clk_get_num_parents(hw->clk);
/*
@@ -517,7 +517,7 @@ static int pix_rdi_set_parent(struct clk_hw *hw, u8 index)
* needs to be on at what time.
*/
for (i = 0; i < num_parents; i++) {
- ret = clk_prepare_enable(clk_get_parent_by_index(clk, i));
+ ret = clk_provider_prepare_enable(clk_get_parent_by_index(clk, i));
if (ret)
goto err;
}
@@ -546,7 +546,7 @@ static int pix_rdi_set_parent(struct clk_hw *hw, u8 index)
err:
for (i--; i >= 0; i--)
- clk_disable_unprepare(clk_get_parent_by_index(clk, i));
+ clk_provider_disable_unprepare(clk_get_parent_by_index(clk, i));
return ret;
}
diff --git a/drivers/clk/rockchip/clk-pll.c b/drivers/clk/rockchip/clk-pll.c
index f2a1c7a..414bff2 100644
--- a/drivers/clk/rockchip/clk-pll.c
+++ b/drivers/clk/rockchip/clk-pll.c
@@ -17,7 +17,6 @@
#include <linux/slab.h>
#include <linux/io.h>
#include <linux/delay.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/regmap.h>
#include "clk.h"
@@ -297,7 +296,7 @@ static const struct clk_ops rockchip_rk3066_pll_clk_ops = {
* Common registering of pll clocks
*/
-struct clk *rockchip_clk_register_pll(enum rockchip_pll_type pll_type,
+struct clk_core *rockchip_clk_register_pll(enum rockchip_pll_type pll_type,
const char *name, const char **parent_names, u8 num_parents,
void __iomem *base, int con_offset, int grf_lock_offset,
int lock_shift, int mode_offset, int mode_shift,
@@ -308,7 +307,7 @@ struct clk *rockchip_clk_register_pll(enum rockchip_pll_type pll_type,
struct clk_init_data init;
struct rockchip_clk_pll *pll;
struct clk_mux *pll_mux;
- struct clk *pll_clk, *mux_clk;
+ struct clk_core *pll_clk, *mux_clk;
char pll_name[20];
int ret;
@@ -377,7 +376,7 @@ struct clk *rockchip_clk_register_pll(enum rockchip_pll_type pll_type,
goto err_pll;
}
- ret = clk_notifier_register(pll_clk, &pll->clk_nb);
+ ret = clk_provider_notifier_register(pll_clk, &pll->clk_nb);
if (ret) {
pr_err("%s: failed to register clock notifier for %s : %d\n",
__func__, name, ret);
@@ -417,7 +416,7 @@ struct clk *rockchip_clk_register_pll(enum rockchip_pll_type pll_type,
return mux_clk;
err_mux:
- ret = clk_notifier_unregister(pll_clk, &pll->clk_nb);
+ ret = clk_provider_notifier_unregister(pll_clk, &pll->clk_nb);
if (ret) {
pr_err("%s: could not unregister clock notifier in error path : %d\n",
__func__, ret);
diff --git a/drivers/clk/rockchip/clk-rk3188.c b/drivers/clk/rockchip/clk-rk3188.c
index 732118e..b0ca609 100644
--- a/drivers/clk/rockchip/clk-rk3188.c
+++ b/drivers/clk/rockchip/clk-rk3188.c
@@ -607,7 +607,7 @@ static const char *rk3188_critical_clocks[] __initconst = {
static void __init rk3188_common_clk_init(struct device_node *np)
{
void __iomem *reg_base;
- struct clk *clk;
+ struct clk_core *clk;
reg_base = of_iomap(np, 0);
if (!reg_base) {
diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
index 038b1aa..b8992dd 100644
--- a/drivers/clk/rockchip/clk-rk3288.c
+++ b/drivers/clk/rockchip/clk-rk3288.c
@@ -688,7 +688,7 @@ static const char *rk3288_critical_clocks[] __initconst = {
static void __init rk3288_clk_init(struct device_node *np)
{
void __iomem *reg_base;
- struct clk *clk;
+ struct clk_core *clk;
reg_base = of_iomap(np, 0);
if (!reg_base) {
diff --git a/drivers/clk/rockchip/clk-rockchip.c b/drivers/clk/rockchip/clk-rockchip.c
index 4cf838d5..faa8dfa 100644
--- a/drivers/clk/rockchip/clk-rockchip.c
+++ b/drivers/clk/rockchip/clk-rockchip.c
@@ -54,7 +54,7 @@ static void __init rk2928_gate_clk_init(struct device_node *node)
if (!clk_data)
return;
- clk_data->clks = kzalloc(qty * sizeof(struct clk *), GFP_KERNEL);
+ clk_data->clks = kzalloc(qty * sizeof(struct clk_core *), GFP_KERNEL);
if (!clk_data->clks) {
kfree(clk_data);
return;
diff --git a/drivers/clk/rockchip/clk.c b/drivers/clk/rockchip/clk.c
index d9c6db2..dfe3ddb 100644
--- a/drivers/clk/rockchip/clk.c
+++ b/drivers/clk/rockchip/clk.c
@@ -21,7 +21,6 @@
*/
#include <linux/slab.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/mfd/syscon.h>
#include <linux/regmap.h>
@@ -37,7 +36,7 @@
*
* sometimes without one of those components.
*/
-static struct clk *rockchip_clk_register_branch(const char *name,
+static struct clk_core *rockchip_clk_register_branch(const char *name,
const char **parent_names, u8 num_parents, void __iomem *base,
int muxdiv_offset, u8 mux_shift, u8 mux_width, u8 mux_flags,
u8 div_shift, u8 div_width, u8 div_flags,
@@ -45,7 +44,7 @@ static struct clk *rockchip_clk_register_branch(const char *name,
u8 gate_shift, u8 gate_flags, unsigned long flags,
spinlock_t *lock)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_mux *mux = NULL;
struct clk_gate *gate = NULL;
struct clk_divider *div = NULL;
@@ -103,13 +102,13 @@ static struct clk *rockchip_clk_register_branch(const char *name,
return clk;
}
-static struct clk *rockchip_clk_register_frac_branch(const char *name,
+static struct clk_core *rockchip_clk_register_frac_branch(const char *name,
const char **parent_names, u8 num_parents, void __iomem *base,
int muxdiv_offset, u8 div_flags,
int gate_offset, u8 gate_shift, u8 gate_flags,
unsigned long flags, spinlock_t *lock)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_gate *gate = NULL;
struct clk_fractional_divider *div = NULL;
const struct clk_ops *div_ops = NULL, *gate_ops = NULL;
@@ -152,7 +151,7 @@ static struct clk *rockchip_clk_register_frac_branch(const char *name,
}
static DEFINE_SPINLOCK(clk_lock);
-static struct clk **clk_table;
+static struct clk_core **clk_table;
static void __iomem *reg_base;
static struct clk_onecell_data clk_data;
static struct device_node *cru_node;
@@ -165,7 +164,7 @@ void __init rockchip_clk_init(struct device_node *np, void __iomem *base,
cru_node = np;
grf = ERR_PTR(-EPROBE_DEFER);
- clk_table = kcalloc(nr_clks, sizeof(struct clk *), GFP_KERNEL);
+ clk_table = kcalloc(nr_clks, sizeof(struct clk_core *), GFP_KERNEL);
if (!clk_table)
pr_err("%s: could not allocate clock lookup table\n", __func__);
@@ -181,7 +180,7 @@ struct regmap *rockchip_clk_get_grf(void)
return grf;
}
-void rockchip_clk_add_lookup(struct clk *clk, unsigned int id)
+void rockchip_clk_add_lookup(struct clk_core *clk, unsigned int id)
{
if (clk_table && id)
clk_table[id] = clk;
@@ -190,7 +189,7 @@ void rockchip_clk_add_lookup(struct clk *clk, unsigned int id)
void __init rockchip_clk_register_plls(struct rockchip_pll_clock *list,
unsigned int nr_pll, int grf_lock_offset)
{
- struct clk *clk;
+ struct clk_core *clk;
int idx;
for (idx = 0; idx < nr_pll; idx++, list++) {
@@ -213,7 +212,7 @@ void __init rockchip_clk_register_branches(
struct rockchip_clk_branch *list,
unsigned int nr_clk)
{
- struct clk *clk = NULL;
+ struct clk_core *clk = NULL;
unsigned int idx;
unsigned long flags;
@@ -303,9 +302,9 @@ void __init rockchip_clk_protect_critical(const char *clocks[], int nclocks)
/* Protect the clocks that needs to stay on */
for (i = 0; i < nclocks; i++) {
- struct clk *clk = __clk_lookup(clocks[i]);
+ struct clk_core *clk = __clk_lookup(clocks[i]);
if (clk)
- clk_prepare_enable(clk);
+ clk_provider_prepare_enable(clk);
}
}
diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h
index 2b0bca1..7f713eb 100644
--- a/drivers/clk/rockchip/clk.h
+++ b/drivers/clk/rockchip/clk.h
@@ -24,7 +24,6 @@
#define CLK_ROCKCHIP_CLK_H
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#define HIWORD_UPDATE(val, mask, shift) \
@@ -113,7 +112,7 @@ struct rockchip_pll_clock {
.rate_table = _rtable, \
}
-struct clk *rockchip_clk_register_pll(enum rockchip_pll_type pll_type,
+struct clk_core *rockchip_clk_register_pll(enum rockchip_pll_type pll_type,
const char *name, const char **parent_names, u8 num_parents,
void __iomem *base, int con_offset, int grf_lock_offset,
int lock_shift, int reg_mode, int mode_shift,
@@ -324,7 +323,7 @@ struct rockchip_clk_branch {
void rockchip_clk_init(struct device_node *np, void __iomem *base,
unsigned long nr_clks);
struct regmap *rockchip_clk_get_grf(void);
-void rockchip_clk_add_lookup(struct clk *clk, unsigned int id);
+void rockchip_clk_add_lookup(struct clk_core *clk, unsigned int id);
void rockchip_clk_register_branches(struct rockchip_clk_branch *clk_list,
unsigned int nr_clk);
void rockchip_clk_register_plls(struct rockchip_pll_clock *pll_list,
diff --git a/drivers/clk/samsung/clk-exynos-audss.c b/drivers/clk/samsung/clk-exynos-audss.c
index 13eae14c..f5639bf 100644
--- a/drivers/clk/samsung/clk-exynos-audss.c
+++ b/drivers/clk/samsung/clk-exynos-audss.c
@@ -26,7 +26,7 @@ enum exynos_audss_clk_type {
};
static DEFINE_SPINLOCK(lock);
-static struct clk **clk_table;
+static struct clk_core **clk_table;
static void __iomem *reg_base;
static struct clk_onecell_data clk_data;
@@ -83,7 +83,7 @@ static int exynos_audss_clk_probe(struct platform_device *pdev)
const char *mout_audss_p[] = {"fin_pll", "fout_epll"};
const char *mout_i2s_p[] = {"mout_audss", "cdclk0", "sclk_audio0"};
const char *sclk_pcm_p = "sclk_pcm0";
- struct clk *pll_ref, *pll_in, *cdclk, *sclk_audio, *sclk_pcm_in;
+ struct clk_core *pll_ref, *pll_in, *cdclk, *sclk_audio, *sclk_pcm_in;
const struct of_device_id *match;
enum exynos_audss_clk_type variant;
@@ -100,7 +100,7 @@ static int exynos_audss_clk_probe(struct platform_device *pdev)
}
clk_table = devm_kzalloc(&pdev->dev,
- sizeof(struct clk *) * EXYNOS_AUDSS_MAX_CLKS,
+ sizeof(struct clk_core *) * EXYNOS_AUDSS_MAX_CLKS,
GFP_KERNEL);
if (!clk_table)
return -ENOMEM;
@@ -111,8 +111,8 @@ static int exynos_audss_clk_probe(struct platform_device *pdev)
else
clk_data.clk_num = EXYNOS_AUDSS_MAX_CLKS - 1;
- pll_ref = devm_clk_get(&pdev->dev, "pll_ref");
- pll_in = devm_clk_get(&pdev->dev, "pll_in");
+ pll_ref = devm_clk_provider_get(&pdev->dev, "pll_ref");
+ pll_in = devm_clk_provider_get(&pdev->dev, "pll_in");
if (!IS_ERR(pll_ref))
mout_audss_p[0] = __clk_get_name(pll_ref);
if (!IS_ERR(pll_in))
@@ -122,8 +122,8 @@ static int exynos_audss_clk_probe(struct platform_device *pdev)
CLK_SET_RATE_NO_REPARENT,
reg_base + ASS_CLK_SRC, 0, 1, 0, &lock);
- cdclk = devm_clk_get(&pdev->dev, "cdclk");
- sclk_audio = devm_clk_get(&pdev->dev, "sclk_audio");
+ cdclk = devm_clk_provider_get(&pdev->dev, "cdclk");
+ sclk_audio = devm_clk_provider_get(&pdev->dev, "sclk_audio");
if (!IS_ERR(cdclk))
mout_i2s_p[1] = __clk_get_name(cdclk);
if (!IS_ERR(sclk_audio))
@@ -161,7 +161,7 @@ static int exynos_audss_clk_probe(struct platform_device *pdev)
"sclk_pcm", CLK_SET_RATE_PARENT,
reg_base + ASS_CLK_GATE, 4, 0, &lock);
- sclk_pcm_in = devm_clk_get(&pdev->dev, "sclk_pcm_in");
+ sclk_pcm_in = devm_clk_provider_get(&pdev->dev, "sclk_pcm_in");
if (!IS_ERR(sclk_pcm_in))
sclk_pcm_p = __clk_get_name(sclk_pcm_in);
clk_table[EXYNOS_SCLK_PCM] = clk_register_gate(NULL, "sclk_pcm",
diff --git a/drivers/clk/samsung/clk-exynos-clkout.c b/drivers/clk/samsung/clk-exynos-clkout.c
index 3a7cb25..0ad7dee 100644
--- a/drivers/clk/samsung/clk-exynos-clkout.c
+++ b/drivers/clk/samsung/clk-exynos-clkout.c
@@ -9,7 +9,6 @@
* Clock driver for Exynos clock output
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
@@ -30,7 +29,7 @@ struct exynos_clkout {
struct clk_mux mux;
spinlock_t slock;
struct clk_onecell_data data;
- struct clk *clk_table[EXYNOS_CLKOUT_NR_CLKS];
+ struct clk_core *clk_table[EXYNOS_CLKOUT_NR_CLKS];
void __iomem *reg;
u32 pmu_debug_save;
};
@@ -57,7 +56,7 @@ static struct syscore_ops exynos_clkout_syscore_ops = {
static void __init exynos_clkout_init(struct device_node *node, u32 mux_mask)
{
const char *parent_names[EXYNOS_CLKOUT_PARENTS];
- struct clk *parents[EXYNOS_CLKOUT_PARENTS];
+ struct clk_core *parents[EXYNOS_CLKOUT_PARENTS];
int parent_count;
int ret;
int i;
@@ -73,7 +72,7 @@ static void __init exynos_clkout_init(struct device_node *node, u32 mux_mask)
char name[] = "clkoutXX";
snprintf(name, sizeof(name), "clkout%d", i);
- parents[i] = of_clk_get_by_name(node, name);
+ parents[i] = of_clk_provider_get_by_name(node, name);
if (IS_ERR(parents[i])) {
parent_names[i] = "none";
continue;
@@ -125,7 +124,7 @@ err_unmap:
clks_put:
for (i = 0; i < EXYNOS_CLKOUT_PARENTS; ++i)
if (!IS_ERR(parents[i]))
- clk_put(parents[i]);
+ __clk_put(parents[i]);
free_clkout:
kfree(clkout);
diff --git a/drivers/clk/samsung/clk-exynos3250.c b/drivers/clk/samsung/clk-exynos3250.c
index dc85f8e..5742e76 100644
--- a/drivers/clk/samsung/clk-exynos3250.c
+++ b/drivers/clk/samsung/clk-exynos3250.c
@@ -8,7 +8,6 @@
* Common Clock Framework support for Exynos3250 SoC.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c
index ac163d7..5d77da2 100644
--- a/drivers/clk/samsung/clk-exynos4.c
+++ b/drivers/clk/samsung/clk-exynos4.c
@@ -11,7 +11,6 @@
*/
#include <dt-bindings/clock/exynos4.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
@@ -1230,19 +1229,19 @@ static unsigned long exynos4_get_xom(void)
static void __init exynos4_clk_register_finpll(struct samsung_clk_provider *ctx)
{
struct samsung_fixed_rate_clock fclk;
- struct clk *clk;
+ struct clk_core *clk;
unsigned long finpll_f = 24000000;
char *parent_name;
unsigned int xom = exynos4_get_xom();
parent_name = xom & 1 ? "xusbxti" : "xxti";
- clk = clk_get(NULL, parent_name);
+ clk = clk_provider_get(NULL, parent_name);
if (IS_ERR(clk)) {
pr_err("%s: failed to lookup parent clock %s, assuming "
"fin_pll clock frequency is 24MHz\n", __func__,
parent_name);
} else {
- finpll_f = clk_get_rate(clk);
+ finpll_f = clk_provider_get_rate(clk);
}
fclk.id = CLK_FIN_PLL;
diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c
index 70ec3d2..623e68f 100644
--- a/drivers/clk/samsung/clk-exynos5250.c
+++ b/drivers/clk/samsung/clk-exynos5250.c
@@ -11,7 +11,6 @@
*/
#include <dt-bindings/clock/exynos5250.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
diff --git a/drivers/clk/samsung/clk-exynos5260.c b/drivers/clk/samsung/clk-exynos5260.c
index ce3de97..5a3d623 100644
--- a/drivers/clk/samsung/clk-exynos5260.c
+++ b/drivers/clk/samsung/clk-exynos5260.c
@@ -9,7 +9,6 @@
* Common Clock Framework support for Exynos5260 SoC.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
diff --git a/drivers/clk/samsung/clk-exynos5410.c b/drivers/clk/samsung/clk-exynos5410.c
index 231475b..546b32f 100644
--- a/drivers/clk/samsung/clk-exynos5410.c
+++ b/drivers/clk/samsung/clk-exynos5410.c
@@ -11,7 +11,6 @@
#include <dt-bindings/clock/exynos5410.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c
index 848d602..0229cc9 100644
--- a/drivers/clk/samsung/clk-exynos5420.c
+++ b/drivers/clk/samsung/clk-exynos5420.c
@@ -11,7 +11,6 @@
*/
#include <dt-bindings/clock/exynos5420.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
diff --git a/drivers/clk/samsung/clk-exynos5440.c b/drivers/clk/samsung/clk-exynos5440.c
index 00d1d00..8adeaa1 100644
--- a/drivers/clk/samsung/clk-exynos5440.c
+++ b/drivers/clk/samsung/clk-exynos5440.c
@@ -10,7 +10,6 @@
*/
#include <dt-bindings/clock/exynos5440.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
diff --git a/drivers/clk/samsung/clk-pll.c b/drivers/clk/samsung/clk-pll.c
index b07fad2..aaf234a 100644
--- a/drivers/clk/samsung/clk-pll.c
+++ b/drivers/clk/samsung/clk-pll.c
@@ -910,12 +910,12 @@ static const struct clk_ops samsung_pll2550x_clk_ops = {
.recalc_rate = samsung_pll2550x_recalc_rate,
};
-struct clk * __init samsung_clk_register_pll2550x(const char *name,
+struct clk_core * __init samsung_clk_register_pll2550x(const char *name,
const char *pname, const void __iomem *reg_base,
const unsigned long offset)
{
struct samsung_clk_pll2550x *pll;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
pll = kzalloc(sizeof(*pll), GFP_KERNEL);
@@ -1149,7 +1149,7 @@ static void __init _samsung_clk_register_pll(struct samsung_clk_provider *ctx,
void __iomem *base)
{
struct samsung_clk_pll *pll;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
int ret, len;
diff --git a/drivers/clk/samsung/clk-pll.h b/drivers/clk/samsung/clk-pll.h
index c0ed4d4..81af344 100644
--- a/drivers/clk/samsung/clk-pll.h
+++ b/drivers/clk/samsung/clk-pll.h
@@ -97,7 +97,7 @@ struct samsung_pll_rate_table {
unsigned int vsel;
};
-extern struct clk * __init samsung_clk_register_pll2550x(const char *name,
+extern struct clk_core * __init samsung_clk_register_pll2550x(const char *name,
const char *pname, const void __iomem *reg_base,
const unsigned long offset);
diff --git a/drivers/clk/samsung/clk-s3c2410-dclk.c b/drivers/clk/samsung/clk-s3c2410-dclk.c
index 0449cc0..05354bd 100644
--- a/drivers/clk/samsung/clk-s3c2410-dclk.c
+++ b/drivers/clk/samsung/clk-s3c2410-dclk.c
@@ -87,12 +87,12 @@ const struct clk_ops s3c24xx_clkout_ops = {
.determine_rate = __clk_mux_determine_rate,
};
-struct clk *s3c24xx_register_clkout(struct device *dev, const char *name,
+struct clk_core *s3c24xx_register_clkout(struct device *dev, const char *name,
const char **parent_names, u8 num_parents,
u8 shift, u32 mask)
{
struct s3c24xx_clkout *clkout;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
/* allocate the clkout */
@@ -237,7 +237,7 @@ static int s3c24xx_dclk_probe(struct platform_device *pdev)
{
struct s3c24xx_dclk *s3c24xx_dclk;
struct resource *mem;
- struct clk **clk_table;
+ struct clk_core **clk_table;
struct s3c24xx_dclk_drv_data *dclk_variant;
int ret, i;
@@ -251,7 +251,7 @@ static int s3c24xx_dclk_probe(struct platform_device *pdev)
spin_lock_init(&s3c24xx_dclk->dclk_lock);
clk_table = devm_kzalloc(&pdev->dev,
- sizeof(struct clk *) * DCLK_MAX_CLKS,
+ sizeof(struct clk_core *) * DCLK_MAX_CLKS,
GFP_KERNEL);
if (!clk_table)
return -ENOMEM;
@@ -329,21 +329,21 @@ static int s3c24xx_dclk_probe(struct platform_device *pdev)
s3c24xx_dclk->dclk1_div_change_nb.notifier_call =
s3c24xx_dclk1_div_notify;
- ret = clk_notifier_register(clk_table[DIV_DCLK0],
- &s3c24xx_dclk->dclk0_div_change_nb);
+ ret = clk_provider_notifier_register(clk_table[DIV_DCLK0],
+ &s3c24xx_dclk->dclk0_div_change_nb);
if (ret)
goto err_clk_register;
- ret = clk_notifier_register(clk_table[DIV_DCLK1],
- &s3c24xx_dclk->dclk1_div_change_nb);
+ ret = clk_provider_notifier_register(clk_table[DIV_DCLK1],
+ &s3c24xx_dclk->dclk1_div_change_nb);
if (ret)
goto err_dclk_notify;
return 0;
err_dclk_notify:
- clk_notifier_unregister(clk_table[DIV_DCLK0],
- &s3c24xx_dclk->dclk0_div_change_nb);
+ clk_provider_notifier_unregister(clk_table[DIV_DCLK0],
+ &s3c24xx_dclk->dclk0_div_change_nb);
err_clk_register:
for (i = 0; i < DCLK_MAX_CLKS; i++)
if (clk_table[i] && !IS_ERR(clk_table[i]))
@@ -355,13 +355,13 @@ err_clk_register:
static int s3c24xx_dclk_remove(struct platform_device *pdev)
{
struct s3c24xx_dclk *s3c24xx_dclk = platform_get_drvdata(pdev);
- struct clk **clk_table = s3c24xx_dclk->clk_data.clks;
+ struct clk_core **clk_table = s3c24xx_dclk->clk_data.clks;
int i;
- clk_notifier_unregister(clk_table[DIV_DCLK1],
- &s3c24xx_dclk->dclk1_div_change_nb);
- clk_notifier_unregister(clk_table[DIV_DCLK0],
- &s3c24xx_dclk->dclk0_div_change_nb);
+ clk_provider_notifier_unregister(clk_table[DIV_DCLK1],
+ &s3c24xx_dclk->dclk1_div_change_nb);
+ clk_provider_notifier_unregister(clk_table[DIV_DCLK0],
+ &s3c24xx_dclk->dclk0_div_change_nb);
for (i = 0; i < DCLK_MAX_CLKS; i++)
clk_unregister(clk_table[i]);
diff --git a/drivers/clk/samsung/clk-s3c2410.c b/drivers/clk/samsung/clk-s3c2410.c
index 5d2f034..af15156 100644
--- a/drivers/clk/samsung/clk-s3c2410.c
+++ b/drivers/clk/samsung/clk-s3c2410.c
@@ -8,7 +8,6 @@
* Common Clock Framework support for S3C2410 and following SoCs.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
diff --git a/drivers/clk/samsung/clk-s3c2412.c b/drivers/clk/samsung/clk-s3c2412.c
index 34af09f..7e6cc95 100644
--- a/drivers/clk/samsung/clk-s3c2412.c
+++ b/drivers/clk/samsung/clk-s3c2412.c
@@ -8,7 +8,6 @@
* Common Clock Framework support for S3C2412 and S3C2413.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
diff --git a/drivers/clk/samsung/clk-s3c2443.c b/drivers/clk/samsung/clk-s3c2443.c
index c92f853..7eaaa68 100644
--- a/drivers/clk/samsung/clk-s3c2443.c
+++ b/drivers/clk/samsung/clk-s3c2443.c
@@ -8,7 +8,6 @@
* Common Clock Framework support for S3C2443 and following SoCs.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
diff --git a/drivers/clk/samsung/clk-s3c64xx.c b/drivers/clk/samsung/clk-s3c64xx.c
index 0f590e5..7dad675 100644
--- a/drivers/clk/samsung/clk-s3c64xx.c
+++ b/drivers/clk/samsung/clk-s3c64xx.c
@@ -8,7 +8,6 @@
* Common Clock Framework support for all S3C64xx SoCs.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
diff --git a/drivers/clk/samsung/clk-s5pv210-audss.c b/drivers/clk/samsung/clk-s5pv210-audss.c
index a8053b4..f7b77e5 100644
--- a/drivers/clk/samsung/clk-s5pv210-audss.c
+++ b/drivers/clk/samsung/clk-s5pv210-audss.c
@@ -24,7 +24,7 @@
#include <dt-bindings/clock/s5pv210-audss.h>
static DEFINE_SPINLOCK(lock);
-static struct clk **clk_table;
+static struct clk_core **clk_table;
static void __iomem *reg_base;
static struct clk_onecell_data clk_data;
@@ -71,7 +71,7 @@ static int s5pv210_audss_clk_probe(struct platform_device *pdev)
const char *mout_audss_p[2];
const char *mout_i2s_p[3];
const char *hclk_p;
- struct clk *hclk, *pll_ref, *pll_in, *cdclk, *sclk_audio;
+ struct clk_core *hclk, *pll_ref, *pll_in, *cdclk, *sclk_audio;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
reg_base = devm_ioremap_resource(&pdev->dev, res);
@@ -81,7 +81,7 @@ static int s5pv210_audss_clk_probe(struct platform_device *pdev)
}
clk_table = devm_kzalloc(&pdev->dev,
- sizeof(struct clk *) * AUDSS_MAX_CLKS,
+ sizeof(struct clk_core *) * AUDSS_MAX_CLKS,
GFP_KERNEL);
if (!clk_table)
return -ENOMEM;
@@ -89,27 +89,27 @@ static int s5pv210_audss_clk_probe(struct platform_device *pdev)
clk_data.clks = clk_table;
clk_data.clk_num = AUDSS_MAX_CLKS;
- hclk = devm_clk_get(&pdev->dev, "hclk");
+ hclk = devm_clk_provider_get(&pdev->dev, "hclk");
if (IS_ERR(hclk)) {
dev_err(&pdev->dev, "failed to get hclk clock\n");
return PTR_ERR(hclk);
}
- pll_in = devm_clk_get(&pdev->dev, "fout_epll");
+ pll_in = devm_clk_provider_get(&pdev->dev, "fout_epll");
if (IS_ERR(pll_in)) {
dev_err(&pdev->dev, "failed to get fout_epll clock\n");
return PTR_ERR(pll_in);
}
- sclk_audio = devm_clk_get(&pdev->dev, "sclk_audio0");
+ sclk_audio = devm_clk_provider_get(&pdev->dev, "sclk_audio0");
if (IS_ERR(sclk_audio)) {
dev_err(&pdev->dev, "failed to get sclk_audio0 clock\n");
return PTR_ERR(sclk_audio);
}
/* iiscdclk0 is an optional external I2S codec clock */
- cdclk = devm_clk_get(&pdev->dev, "iiscdclk0");
- pll_ref = devm_clk_get(&pdev->dev, "xxti");
+ cdclk = devm_clk_provider_get(&pdev->dev, "iiscdclk0");
+ pll_ref = devm_clk_provider_get(&pdev->dev, "xxti");
if (!IS_ERR(pll_ref))
mout_audss_p[0] = __clk_get_name(pll_ref);
diff --git a/drivers/clk/samsung/clk.c b/drivers/clk/samsung/clk.c
index deab84d..68133fa 100644
--- a/drivers/clk/samsung/clk.c
+++ b/drivers/clk/samsung/clk.c
@@ -52,14 +52,14 @@ struct samsung_clk_provider *__init samsung_clk_init(struct device_node *np,
void __iomem *base, unsigned long nr_clks)
{
struct samsung_clk_provider *ctx;
- struct clk **clk_table;
+ struct clk_core **clk_table;
int i;
ctx = kzalloc(sizeof(struct samsung_clk_provider), GFP_KERNEL);
if (!ctx)
panic("could not allocate clock provider context.\n");
- clk_table = kcalloc(nr_clks, sizeof(struct clk *), GFP_KERNEL);
+ clk_table = kcalloc(nr_clks, sizeof(struct clk_core *), GFP_KERNEL);
if (!clk_table)
panic("could not allocate clock lookup table\n");
@@ -85,7 +85,7 @@ void __init samsung_clk_of_add_provider(struct device_node *np,
}
/* add a clock instance to the clock lookup table used for dt based lookup */
-void samsung_clk_add_lookup(struct samsung_clk_provider *ctx, struct clk *clk,
+void samsung_clk_add_lookup(struct samsung_clk_provider *ctx, struct clk_core *clk,
unsigned int id)
{
if (ctx->clk_data.clks && id)
@@ -97,7 +97,7 @@ void __init samsung_clk_register_alias(struct samsung_clk_provider *ctx,
struct samsung_clock_alias *list,
unsigned int nr_clk)
{
- struct clk *clk;
+ struct clk_core *clk;
unsigned int idx, ret;
if (!ctx->clk_data.clks) {
@@ -130,7 +130,7 @@ void __init samsung_clk_register_alias(struct samsung_clk_provider *ctx,
void __init samsung_clk_register_fixed_rate(struct samsung_clk_provider *ctx,
struct samsung_fixed_rate_clock *list, unsigned int nr_clk)
{
- struct clk *clk;
+ struct clk_core *clk;
unsigned int idx, ret;
for (idx = 0; idx < nr_clk; idx++, list++) {
@@ -159,7 +159,7 @@ void __init samsung_clk_register_fixed_rate(struct samsung_clk_provider *ctx,
void __init samsung_clk_register_fixed_factor(struct samsung_clk_provider *ctx,
struct samsung_fixed_factor_clock *list, unsigned int nr_clk)
{
- struct clk *clk;
+ struct clk_core *clk;
unsigned int idx;
for (idx = 0; idx < nr_clk; idx++, list++) {
@@ -180,7 +180,7 @@ void __init samsung_clk_register_mux(struct samsung_clk_provider *ctx,
struct samsung_mux_clock *list,
unsigned int nr_clk)
{
- struct clk *clk;
+ struct clk_core *clk;
unsigned int idx, ret;
for (idx = 0; idx < nr_clk; idx++, list++) {
@@ -212,7 +212,7 @@ void __init samsung_clk_register_div(struct samsung_clk_provider *ctx,
struct samsung_div_clock *list,
unsigned int nr_clk)
{
- struct clk *clk;
+ struct clk_core *clk;
unsigned int idx, ret;
for (idx = 0; idx < nr_clk; idx++, list++) {
@@ -251,7 +251,7 @@ void __init samsung_clk_register_gate(struct samsung_clk_provider *ctx,
struct samsung_gate_clock *list,
unsigned int nr_clk)
{
- struct clk *clk;
+ struct clk_core *clk;
unsigned int idx, ret;
for (idx = 0; idx < nr_clk; idx++, list++) {
@@ -303,7 +303,7 @@ void __init samsung_clk_of_register_fixed_ext(struct samsung_clk_provider *ctx,
/* utility function to get the rate of a specified clock */
unsigned long _get_rate(const char *clk_name)
{
- struct clk *clk;
+ struct clk_core *clk;
clk = __clk_lookup(clk_name);
if (!clk) {
@@ -311,5 +311,5 @@ unsigned long _get_rate(const char *clk_name)
return 0;
}
- return clk_get_rate(clk);
+ return clk_provider_get_rate(clk);
}
diff --git a/drivers/clk/samsung/clk.h b/drivers/clk/samsung/clk.h
index 66ab36b..58b1215 100644
--- a/drivers/clk/samsung/clk.h
+++ b/drivers/clk/samsung/clk.h
@@ -13,7 +13,6 @@
#ifndef __SAMSUNG_CLK_H
#define __SAMSUNG_CLK_H
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/io.h>
#include <linux/clk-provider.h>
@@ -336,7 +335,7 @@ extern void __init samsung_clk_of_register_fixed_ext(
const struct of_device_id *clk_matches);
extern void samsung_clk_add_lookup(struct samsung_clk_provider *ctx,
- struct clk *clk, unsigned int id);
+ struct clk_core *clk, unsigned int id);
extern void samsung_clk_register_alias(struct samsung_clk_provider *ctx,
struct samsung_clock_alias *list,
diff --git a/drivers/clk/shmobile/clk-div6.c b/drivers/clk/shmobile/clk-div6.c
index f065f69..c6712fb 100644
--- a/drivers/clk/shmobile/clk-div6.c
+++ b/drivers/clk/shmobile/clk-div6.c
@@ -119,7 +119,7 @@ static void __init cpg_div6_clock_init(struct device_node *np)
struct div6_clock *clock;
const char *parent_name;
const char *name;
- struct clk *clk;
+ struct clk_core *clk;
int ret;
clock = kzalloc(sizeof(*clock), GFP_KERNEL);
diff --git a/drivers/clk/shmobile/clk-emev2.c b/drivers/clk/shmobile/clk-emev2.c
index 6c7c929..2e3a45b 100644
--- a/drivers/clk/shmobile/clk-emev2.c
+++ b/drivers/clk/shmobile/clk-emev2.c
@@ -71,7 +71,7 @@ static void __init emev2_smu_init(void)
static void __init emev2_smu_clkdiv_init(struct device_node *np)
{
u32 reg[2];
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name = of_clk_get_parent_name(np, 0);
if (WARN_ON(of_property_read_u32_array(np, "reg", reg, 2)))
return;
@@ -89,7 +89,7 @@ CLK_OF_DECLARE(emev2_smu_clkdiv, "renesas,emev2-smu-clkdiv",
static void __init emev2_smu_gclk_init(struct device_node *np)
{
u32 reg[2];
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name = of_clk_get_parent_name(np, 0);
if (WARN_ON(of_property_read_u32_array(np, "reg", reg, 2)))
return;
diff --git a/drivers/clk/shmobile/clk-mstp.c b/drivers/clk/shmobile/clk-mstp.c
index 2d2fe77..2659676 100644
--- a/drivers/clk/shmobile/clk-mstp.c
+++ b/drivers/clk/shmobile/clk-mstp.c
@@ -121,13 +121,13 @@ static const struct clk_ops cpg_mstp_clock_ops = {
.is_enabled = cpg_mstp_clock_is_enabled,
};
-static struct clk * __init
+static struct clk_core * __init
cpg_mstp_clock_register(const char *name, const char *parent_name,
unsigned int index, struct mstp_clock_group *group)
{
struct clk_init_data init;
struct mstp_clock *clock;
- struct clk *clk;
+ struct clk_core *clk;
clock = kzalloc(sizeof(*clock), GFP_KERNEL);
if (!clock) {
@@ -157,7 +157,7 @@ static void __init cpg_mstp_clocks_init(struct device_node *np)
{
struct mstp_clock_group *group;
const char *idxname;
- struct clk **clks;
+ struct clk_core **clks;
unsigned int i;
group = kzalloc(sizeof(*group), GFP_KERNEL);
diff --git a/drivers/clk/shmobile/clk-r8a7740.c b/drivers/clk/shmobile/clk-r8a7740.c
index 1e2eaae..8889e6a 100644
--- a/drivers/clk/shmobile/clk-r8a7740.c
+++ b/drivers/clk/shmobile/clk-r8a7740.c
@@ -61,7 +61,7 @@ static const struct clk_div_table div4_div_table[] = {
static u32 cpg_mode __initdata;
-static struct clk * __init
+static struct clk_core * __init
r8a7740_cpg_register_clock(struct device_node *np, struct r8a7740_cpg *cpg,
const char *name)
{
@@ -147,7 +147,7 @@ r8a7740_cpg_register_clock(struct device_node *np, struct r8a7740_cpg *cpg,
static void __init r8a7740_cpg_clocks_init(struct device_node *np)
{
struct r8a7740_cpg *cpg;
- struct clk **clks;
+ struct clk_core **clks;
unsigned int i;
int num_clks;
@@ -180,7 +180,7 @@ static void __init r8a7740_cpg_clocks_init(struct device_node *np)
for (i = 0; i < num_clks; ++i) {
const char *name;
- struct clk *clk;
+ struct clk_core *clk;
of_property_read_string_index(np, "clock-output-names", i,
&name);
diff --git a/drivers/clk/shmobile/clk-r8a7779.c b/drivers/clk/shmobile/clk-r8a7779.c
index 652ecac..96b51b1 100644
--- a/drivers/clk/shmobile/clk-r8a7779.c
+++ b/drivers/clk/shmobile/clk-r8a7779.c
@@ -90,7 +90,7 @@ static const unsigned int cpg_plla_mult[4] __initconst = { 42, 48, 56, 64 };
static u32 cpg_mode __initdata;
-static struct clk * __init
+static struct clk_core * __init
r8a7779_cpg_register_clock(struct device_node *np, struct r8a7779_cpg *cpg,
const struct cpg_clk_config *config,
unsigned int plla_mult, const char *name)
@@ -124,7 +124,7 @@ static void __init r8a7779_cpg_clocks_init(struct device_node *np)
{
const struct cpg_clk_config *config;
struct r8a7779_cpg *cpg;
- struct clk **clks;
+ struct clk_core **clks;
unsigned int i, plla_mult;
int num_clks;
@@ -153,7 +153,7 @@ static void __init r8a7779_cpg_clocks_init(struct device_node *np)
for (i = 0; i < num_clks; ++i) {
const char *name;
- struct clk *clk;
+ struct clk_core *clk;
of_property_read_string_index(np, "clock-output-names", i,
&name);
diff --git a/drivers/clk/shmobile/clk-rcar-gen2.c b/drivers/clk/shmobile/clk-rcar-gen2.c
index e996425..45a0712 100644
--- a/drivers/clk/shmobile/clk-rcar-gen2.c
+++ b/drivers/clk/shmobile/clk-rcar-gen2.c
@@ -133,12 +133,12 @@ static const struct clk_ops cpg_z_clk_ops = {
.set_rate = cpg_z_clk_set_rate,
};
-static struct clk * __init cpg_z_clk_register(struct rcar_gen2_cpg *cpg)
+static struct clk_core * __init cpg_z_clk_register(struct rcar_gen2_cpg *cpg)
{
static const char *parent_name = "pll0";
struct clk_init_data init;
struct cpg_z_clk *zclk;
- struct clk *clk;
+ struct clk_core *clk;
zclk = kzalloc(sizeof(*zclk), GFP_KERNEL);
if (!zclk)
@@ -213,7 +213,7 @@ static const struct clk_div_table cpg_sd01_div_table[] = {
static u32 cpg_mode __initdata;
-static struct clk * __init
+static struct clk_core * __init
rcar_gen2_cpg_register_clock(struct device_node *np, struct rcar_gen2_cpg *cpg,
const struct cpg_pll_config *config,
const char *name)
@@ -280,7 +280,7 @@ static void __init rcar_gen2_cpg_clocks_init(struct device_node *np)
{
const struct cpg_pll_config *config;
struct rcar_gen2_cpg *cpg;
- struct clk **clks;
+ struct clk_core **clks;
unsigned int i;
int num_clks;
@@ -313,7 +313,7 @@ static void __init rcar_gen2_cpg_clocks_init(struct device_node *np)
for (i = 0; i < num_clks; ++i) {
const char *name;
- struct clk *clk;
+ struct clk_core *clk;
of_property_read_string_index(np, "clock-output-names", i,
&name);
diff --git a/drivers/clk/shmobile/clk-rz.c b/drivers/clk/shmobile/clk-rz.c
index 7e68e86..414e20e 100644
--- a/drivers/clk/shmobile/clk-rz.c
+++ b/drivers/clk/shmobile/clk-rz.c
@@ -28,7 +28,7 @@ struct rz_cpg {
* Initialization
*/
-static struct clk * __init
+static struct clk_core * __init
rz_cpg_register_clock(struct device_node *np, struct rz_cpg *cpg, const char *name)
{
u32 val;
@@ -67,7 +67,7 @@ rz_cpg_register_clock(struct device_node *np, struct rz_cpg *cpg, const char *na
static void __init rz_cpg_clocks_init(struct device_node *np)
{
struct rz_cpg *cpg;
- struct clk **clks;
+ struct clk_core **clks;
unsigned i;
int num_clks;
@@ -86,7 +86,7 @@ static void __init rz_cpg_clocks_init(struct device_node *np)
for (i = 0; i < num_clks; ++i) {
const char *name;
- struct clk *clk;
+ struct clk_core *clk;
of_property_read_string_index(np, "clock-output-names", i, &name);
diff --git a/drivers/clk/sirf/clk-atlas6.c b/drivers/clk/sirf/clk-atlas6.c
index d63b76c..3b07a02 100644
--- a/drivers/clk/sirf/clk-atlas6.c
+++ b/drivers/clk/sirf/clk-atlas6.c
@@ -10,7 +10,6 @@
#include <linux/module.h>
#include <linux/bitops.h>
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of_address.h>
@@ -113,7 +112,7 @@ static __initdata struct clk_hw *atlas6_clk_hw_array[maxclk] = {
&clk_cphif.hw,
};
-static struct clk *atlas6_clks[maxclk];
+static struct clk_core *atlas6_clks[maxclk];
static void __init atlas6_clk_init(struct device_node *np)
{
diff --git a/drivers/clk/sirf/clk-common.c b/drivers/clk/sirf/clk-common.c
index 37af51c..05f5040 100644
--- a/drivers/clk/sirf/clk-common.c
+++ b/drivers/clk/sirf/clk-common.c
@@ -165,9 +165,9 @@ static long cpu_clk_round_rate(struct clk_hw *hw, unsigned long rate,
* SiRF SoC has not cpu clock control,
* So bypass to it's parent pll.
*/
- struct clk *parent_clk = clk_get_parent(hw->clk);
- struct clk *pll_parent_clk = clk_get_parent(parent_clk);
- unsigned long pll_parent_rate = clk_get_rate(pll_parent_clk);
+ struct clk_core *parent_clk = clk_provider_get_parent(hw->clk);
+ struct clk_core *pll_parent_clk = clk_provider_get_parent(parent_clk);
+ unsigned long pll_parent_rate = clk_provider_get_rate(pll_parent_clk);
return pll_clk_round_rate(__clk_get_hw(parent_clk), rate, &pll_parent_rate);
}
@@ -178,7 +178,7 @@ static unsigned long cpu_clk_recalc_rate(struct clk_hw *hw,
* SiRF SoC has not cpu clock control,
* So return the parent pll rate.
*/
- struct clk *parent_clk = clk_get_parent(hw->clk);
+ struct clk_core *parent_clk = clk_provider_get_parent(hw->clk);
return __clk_get_rate(parent_clk);
}
@@ -403,34 +403,34 @@ static int cpu_clk_set_rate(struct clk_hw *hw, unsigned long rate,
unsigned long parent_rate)
{
int ret1, ret2;
- struct clk *cur_parent;
+ struct clk_core *cur_parent;
- if (rate == clk_get_rate(clk_pll1.hw.clk)) {
- ret1 = clk_set_parent(hw->clk, clk_pll1.hw.clk);
+ if (rate == clk_provider_get_rate(clk_pll1.hw.clk)) {
+ ret1 = clk_provider_set_parent(hw->clk, clk_pll1.hw.clk);
return ret1;
}
- if (rate == clk_get_rate(clk_pll2.hw.clk)) {
- ret1 = clk_set_parent(hw->clk, clk_pll2.hw.clk);
+ if (rate == clk_provider_get_rate(clk_pll2.hw.clk)) {
+ ret1 = clk_provider_set_parent(hw->clk, clk_pll2.hw.clk);
return ret1;
}
- if (rate == clk_get_rate(clk_pll3.hw.clk)) {
- ret1 = clk_set_parent(hw->clk, clk_pll3.hw.clk);
+ if (rate == clk_provider_get_rate(clk_pll3.hw.clk)) {
+ ret1 = clk_provider_set_parent(hw->clk, clk_pll3.hw.clk);
return ret1;
}
- cur_parent = clk_get_parent(hw->clk);
+ cur_parent = clk_provider_get_parent(hw->clk);
/* switch to tmp pll before setting parent clock's rate */
if (cur_parent == clk_pll1.hw.clk) {
- ret1 = clk_set_parent(hw->clk, clk_pll2.hw.clk);
+ ret1 = clk_provider_set_parent(hw->clk, clk_pll2.hw.clk);
BUG_ON(ret1);
}
- ret2 = clk_set_rate(clk_pll1.hw.clk, rate);
+ ret2 = clk_provider_set_rate(clk_pll1.hw.clk, rate);
- ret1 = clk_set_parent(hw->clk, clk_pll1.hw.clk);
+ ret1 = clk_provider_set_parent(hw->clk, clk_pll1.hw.clk);
return ret2 ? ret2 : ret1;
}
diff --git a/drivers/clk/sirf/clk-prima2.c b/drivers/clk/sirf/clk-prima2.c
index 6968e2e..869bc8c 100644
--- a/drivers/clk/sirf/clk-prima2.c
+++ b/drivers/clk/sirf/clk-prima2.c
@@ -10,7 +10,6 @@
#include <linux/module.h>
#include <linux/bitops.h>
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of_address.h>
@@ -112,7 +111,7 @@ static __initdata struct clk_hw *prima2_clk_hw_array[maxclk] = {
&clk_cphif.hw,
};
-static struct clk *prima2_clks[maxclk];
+static struct clk_core *prima2_clks[maxclk];
static void __init prima2_clk_init(struct device_node *np)
{
diff --git a/drivers/clk/socfpga/clk-gate.c b/drivers/clk/socfpga/clk-gate.c
index dd3a78c..5d00dee 100644
--- a/drivers/clk/socfpga/clk-gate.c
+++ b/drivers/clk/socfpga/clk-gate.c
@@ -15,7 +15,6 @@
* Based from clk-highbank.c
*
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/io.h>
@@ -188,7 +187,7 @@ static void __init __socfpga_gate_init(struct device_node *node,
u32 div_reg[3];
u32 clk_phase[2];
u32 fixed_div;
- struct clk *clk;
+ struct clk_core *clk;
struct socfpga_gate_clk *socfpga_clk;
const char *clk_name = node->name;
const char *parent_name[SOCFPGA_MAX_PARENTS];
diff --git a/drivers/clk/socfpga/clk-periph.c b/drivers/clk/socfpga/clk-periph.c
index 46531c3..1bcb275 100644
--- a/drivers/clk/socfpga/clk-periph.c
+++ b/drivers/clk/socfpga/clk-periph.c
@@ -15,7 +15,6 @@
* Based from clk-highbank.c
*
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/io.h>
@@ -53,7 +52,7 @@ static __init void __socfpga_periph_init(struct device_node *node,
const struct clk_ops *ops)
{
u32 reg;
- struct clk *clk;
+ struct clk_core *clk;
struct socfpga_periph_clk *periph_clk;
const char *clk_name = node->name;
const char *parent_name;
diff --git a/drivers/clk/socfpga/clk-pll.c b/drivers/clk/socfpga/clk-pll.c
index de6da95..ba7073f 100644
--- a/drivers/clk/socfpga/clk-pll.c
+++ b/drivers/clk/socfpga/clk-pll.c
@@ -15,7 +15,6 @@
* Based from clk-highbank.c
*
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/io.h>
@@ -81,11 +80,11 @@ static struct clk_ops clk_pll_ops = {
.get_parent = clk_pll_get_parent,
};
-static __init struct clk *__socfpga_pll_init(struct device_node *node,
+static __init struct clk_core *__socfpga_pll_init(struct device_node *node,
const struct clk_ops *ops)
{
u32 reg;
- struct clk *clk;
+ struct clk_core *clk;
struct socfpga_pll *pll_clk;
const char *clk_name = node->name;
const char *parent_name[SOCFPGA_MAX_PARENTS];
diff --git a/drivers/clk/spear/clk-aux-synth.c b/drivers/clk/spear/clk-aux-synth.c
index bdfb442..18334c3 100644
--- a/drivers/clk/spear/clk-aux-synth.c
+++ b/drivers/clk/spear/clk-aux-synth.c
@@ -134,14 +134,14 @@ static struct clk_ops clk_aux_ops = {
.set_rate = clk_aux_set_rate,
};
-struct clk *clk_register_aux(const char *aux_name, const char *gate_name,
+struct clk_core *clk_register_aux(const char *aux_name, const char *gate_name,
const char *parent_name, unsigned long flags, void __iomem *reg,
struct aux_clk_masks *masks, struct aux_rate_tbl *rtbl,
- u8 rtbl_cnt, spinlock_t *lock, struct clk **gate_clk)
+ u8 rtbl_cnt, spinlock_t *lock, struct clk_core **gate_clk)
{
struct clk_aux *aux;
struct clk_init_data init;
- struct clk *clk;
+ struct clk_core *clk;
if (!aux_name || !parent_name || !reg || !rtbl || !rtbl_cnt) {
pr_err("Invalid arguments passed");
@@ -177,7 +177,7 @@ struct clk *clk_register_aux(const char *aux_name, const char *gate_name,
goto free_aux;
if (gate_name) {
- struct clk *tgate_clk;
+ struct clk_core *tgate_clk;
tgate_clk = clk_register_gate(NULL, gate_name, aux_name,
CLK_SET_RATE_PARENT, reg,
diff --git a/drivers/clk/spear/clk-frac-synth.c b/drivers/clk/spear/clk-frac-synth.c
index dffd4ce..bce2c0e 100644
--- a/drivers/clk/spear/clk-frac-synth.c
+++ b/drivers/clk/spear/clk-frac-synth.c
@@ -122,13 +122,13 @@ static struct clk_ops clk_frac_ops = {
.set_rate = clk_frac_set_rate,
};
-struct clk *clk_register_frac(const char *name, const char *parent_name,
+struct clk_core *clk_register_frac(const char *name, const char *parent_name,
unsigned long flags, void __iomem *reg,
struct frac_rate_tbl *rtbl, u8 rtbl_cnt, spinlock_t *lock)
{
struct clk_init_data init;
struct clk_frac *frac;
- struct clk *clk;
+ struct clk_core *clk;
if (!name || !parent_name || !reg || !rtbl || !rtbl_cnt) {
pr_err("Invalid arguments passed");
diff --git a/drivers/clk/spear/clk-gpt-synth.c b/drivers/clk/spear/clk-gpt-synth.c
index 1afc18c..f8e13f3 100644
--- a/drivers/clk/spear/clk-gpt-synth.c
+++ b/drivers/clk/spear/clk-gpt-synth.c
@@ -111,13 +111,13 @@ static struct clk_ops clk_gpt_ops = {
.set_rate = clk_gpt_set_rate,
};
-struct clk *clk_register_gpt(const char *name, const char *parent_name, unsigned
+struct clk_core *clk_register_gpt(const char *name, const char *parent_name, unsigned
long flags, void __iomem *reg, struct gpt_rate_tbl *rtbl, u8
rtbl_cnt, spinlock_t *lock)
{
struct clk_init_data init;
struct clk_gpt *gpt;
- struct clk *clk;
+ struct clk_core *clk;
if (!name || !parent_name || !reg || !rtbl || !rtbl_cnt) {
pr_err("Invalid arguments passed");
diff --git a/drivers/clk/spear/clk-vco-pll.c b/drivers/clk/spear/clk-vco-pll.c
index 1b9b65b..226f2ec 100644
--- a/drivers/clk/spear/clk-vco-pll.c
+++ b/drivers/clk/spear/clk-vco-pll.c
@@ -272,16 +272,16 @@ static struct clk_ops clk_vco_ops = {
.set_rate = clk_vco_set_rate,
};
-struct clk *clk_register_vco_pll(const char *vco_name, const char *pll_name,
+struct clk_core *clk_register_vco_pll(const char *vco_name, const char *pll_name,
const char *vco_gate_name, const char *parent_name,
unsigned long flags, void __iomem *mode_reg, void __iomem
*cfg_reg, struct pll_rate_tbl *rtbl, u8 rtbl_cnt,
- spinlock_t *lock, struct clk **pll_clk,
- struct clk **vco_gate_clk)
+ spinlock_t *lock, struct clk_core **pll_clk,
+ struct clk_core **vco_gate_clk)
{
struct clk_vco *vco;
struct clk_pll *pll;
- struct clk *vco_clk, *tpll_clk, *tvco_gate_clk;
+ struct clk_core *vco_clk, *tpll_clk, *tvco_gate_clk;
struct clk_init_data vco_init, pll_init;
const char **vco_parent_name;
diff --git a/drivers/clk/spear/clk.h b/drivers/clk/spear/clk.h
index 9317376..777322e 100644
--- a/drivers/clk/spear/clk.h
+++ b/drivers/clk/spear/clk.h
@@ -110,22 +110,22 @@ typedef unsigned long (*clk_calc_rate)(struct clk_hw *hw, unsigned long prate,
int index);
/* clk register routines */
-struct clk *clk_register_aux(const char *aux_name, const char *gate_name,
+struct clk_core *clk_register_aux(const char *aux_name, const char *gate_name,
const char *parent_name, unsigned long flags, void __iomem *reg,
struct aux_clk_masks *masks, struct aux_rate_tbl *rtbl,
- u8 rtbl_cnt, spinlock_t *lock, struct clk **gate_clk);
-struct clk *clk_register_frac(const char *name, const char *parent_name,
+ u8 rtbl_cnt, spinlock_t *lock, struct clk_core **gate_clk);
+struct clk_core *clk_register_frac(const char *name, const char *parent_name,
unsigned long flags, void __iomem *reg,
struct frac_rate_tbl *rtbl, u8 rtbl_cnt, spinlock_t *lock);
-struct clk *clk_register_gpt(const char *name, const char *parent_name, unsigned
+struct clk_core *clk_register_gpt(const char *name, const char *parent_name, unsigned
long flags, void __iomem *reg, struct gpt_rate_tbl *rtbl, u8
rtbl_cnt, spinlock_t *lock);
-struct clk *clk_register_vco_pll(const char *vco_name, const char *pll_name,
+struct clk_core *clk_register_vco_pll(const char *vco_name, const char *pll_name,
const char *vco_gate_name, const char *parent_name,
unsigned long flags, void __iomem *mode_reg, void __iomem
*cfg_reg, struct pll_rate_tbl *rtbl, u8 rtbl_cnt,
- spinlock_t *lock, struct clk **pll_clk,
- struct clk **vco_gate_clk);
+ spinlock_t *lock, struct clk_core **pll_clk,
+ struct clk_core **vco_gate_clk);
long clk_round_rate_index(struct clk_hw *hw, unsigned long drate,
unsigned long parent_rate, clk_calc_rate calc_rate, u8 rtbl_cnt,
diff --git a/drivers/clk/spear/spear1310_clock.c b/drivers/clk/spear/spear1310_clock.c
index 4daa597..58206e0 100644
--- a/drivers/clk/spear/spear1310_clock.c
+++ b/drivers/clk/spear/spear1310_clock.c
@@ -11,7 +11,6 @@
* warranty of any kind, whether express or implied.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/err.h>
#include <linux/io.h>
@@ -385,7 +384,7 @@ static const char *tdm_parents[] = { "ras_pll3_clk", "gen_syn1_clk", };
void __init spear1310_clk_init(void __iomem *misc_base, void __iomem *ras_base)
{
- struct clk *clk, *clk1;
+ struct clk_core *clk, *clk1;
clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT,
32000);
diff --git a/drivers/clk/spear/spear1340_clock.c b/drivers/clk/spear/spear1340_clock.c
index 5a5c664..704301c 100644
--- a/drivers/clk/spear/spear1340_clock.c
+++ b/drivers/clk/spear/spear1340_clock.c
@@ -11,7 +11,6 @@
* warranty of any kind, whether express or implied.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/err.h>
#include <linux/io.h>
@@ -442,7 +441,7 @@ static const char *gen_synth2_3_parents[] = { "vco1div4_clk", "vco2div2_clk",
void __init spear1340_clk_init(void __iomem *misc_base)
{
- struct clk *clk, *clk1;
+ struct clk_core *clk, *clk1;
clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT,
32000);
diff --git a/drivers/clk/spear/spear3xx_clock.c b/drivers/clk/spear/spear3xx_clock.c
index bb5f387..40d1b08 100644
--- a/drivers/clk/spear/spear3xx_clock.c
+++ b/drivers/clk/spear/spear3xx_clock.c
@@ -9,7 +9,6 @@
* warranty of any kind, whether express or implied.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/err.h>
#include <linux/io.h>
@@ -140,7 +139,7 @@ static const char *ddr_parents[] = { "ahb_clk", "ahbmult2_clk", "none",
#ifdef CONFIG_MACH_SPEAR300
static void __init spear300_clk_init(void)
{
- struct clk *clk;
+ struct clk_core *clk;
clk = clk_register_fixed_factor(NULL, "clcd_clk", "ras_pll3_clk", 0,
1, 1);
@@ -170,7 +169,7 @@ static inline void spear300_clk_init(void) { }
#ifdef CONFIG_MACH_SPEAR310
static void __init spear310_clk_init(void)
{
- struct clk *clk;
+ struct clk_core *clk;
clk = clk_register_fixed_factor(NULL, "emi_clk", "ras_ahb_clk", 0, 1,
1);
@@ -246,9 +245,9 @@ static const char *smii0_parents[] = { "smii_125m_pad", "ras_pll2_clk",
static const char *uartx_parents[] = { "ras_syn1_gclk", "ras_apb_clk", };
static void __init spear320_clk_init(void __iomem *soc_config_base,
- struct clk *ras_apb_clk)
+ struct clk_core *ras_apb_clk)
{
- struct clk *clk;
+ struct clk_core *clk;
clk = clk_register_fixed_rate(NULL, "smii_125m_pad_clk", NULL,
CLK_IS_ROOT, 125000000);
@@ -344,7 +343,7 @@ static void __init spear320_clk_init(void __iomem *soc_config_base,
0, &_lock);
clk_register_clkdev(clk, NULL, "a3000000.serial");
/* Enforce ras_apb_clk */
- clk_set_parent(clk, ras_apb_clk);
+ clk_provider_set_parent(clk, ras_apb_clk);
clk = clk_register_mux(NULL, "uart2_clk", uartx_parents,
ARRAY_SIZE(uartx_parents),
@@ -353,7 +352,7 @@ static void __init spear320_clk_init(void __iomem *soc_config_base,
SPEAR320_UARTX_PCLK_MASK, 0, &_lock);
clk_register_clkdev(clk, NULL, "a4000000.serial");
/* Enforce ras_apb_clk */
- clk_set_parent(clk, ras_apb_clk);
+ clk_provider_set_parent(clk, ras_apb_clk);
clk = clk_register_mux(NULL, "uart3_clk", uartx_parents,
ARRAY_SIZE(uartx_parents),
@@ -384,12 +383,12 @@ static void __init spear320_clk_init(void __iomem *soc_config_base,
clk_register_clkdev(clk, NULL, "60100000.serial");
}
#else
-static inline void spear320_clk_init(void __iomem *sb, struct clk *rc) { }
+static inline void spear320_clk_init(void __iomem *sb, struct clk_core *rc) { }
#endif
void __init spear3xx_clk_init(void __iomem *misc_base, void __iomem *soc_config_base)
{
- struct clk *clk, *clk1, *ras_apb_clk;
+ struct clk_core *clk, *clk1, *ras_apb_clk;
clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT,
32000);
diff --git a/drivers/clk/spear/spear6xx_clock.c b/drivers/clk/spear/spear6xx_clock.c
index 4f649c9..364a8d3 100644
--- a/drivers/clk/spear/spear6xx_clock.c
+++ b/drivers/clk/spear/spear6xx_clock.c
@@ -9,7 +9,6 @@
* warranty of any kind, whether express or implied.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/io.h>
#include <linux/spinlock_types.h>
@@ -116,7 +115,7 @@ static struct gpt_rate_tbl gpt_rtbl[] = {
void __init spear6xx_clk_init(void __iomem *misc_base)
{
- struct clk *clk, *clk1;
+ struct clk_core *clk, *clk1;
clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT,
32000);
diff --git a/drivers/clk/st/clk-flexgen.c b/drivers/clk/st/clk-flexgen.c
index 2282cef..699f7a1 100644
--- a/drivers/clk/st/clk-flexgen.c
+++ b/drivers/clk/st/clk-flexgen.c
@@ -163,12 +163,12 @@ static const struct clk_ops flexgen_ops = {
.set_rate = flexgen_set_rate,
};
-struct clk *clk_register_flexgen(const char *name,
+struct clk_core *clk_register_flexgen(const char *name,
const char **parent_names, u8 num_parents,
void __iomem *reg, spinlock_t *lock, u32 idx,
unsigned long flexgen_flags) {
struct flexgen *fgxbar;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
u32 xbar_shift;
void __iomem *xbar_reg, *fdiv_reg;
@@ -223,8 +223,8 @@ struct clk *clk_register_flexgen(const char *name,
else
pr_debug("%s: parent %s rate %u\n",
__clk_get_name(clk),
- __clk_get_name(clk_get_parent(clk)),
- (unsigned int)clk_get_rate(clk));
+ __clk_get_name(clk_provider_get_parent(clk)),
+ (unsigned int)clk_provider_get_rate(clk));
return clk;
}
@@ -283,7 +283,7 @@ void __init st_of_flexgen_setup(struct device_node *np)
goto err;
}
- clk_data->clks = kcalloc(clk_data->clk_num, sizeof(struct clk *),
+ clk_data->clks = kcalloc(clk_data->clk_num, sizeof(struct clk_core *),
GFP_KERNEL);
if (!clk_data->clks)
goto err;
@@ -293,7 +293,7 @@ void __init st_of_flexgen_setup(struct device_node *np)
goto err;
for (i = 0; i < clk_data->clk_num; i++) {
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name;
if (of_property_read_string_index(np, "clock-output-names",
diff --git a/drivers/clk/st/clkgen-fsyn.c b/drivers/clk/st/clkgen-fsyn.c
index af94ed8..ceda1f2 100644
--- a/drivers/clk/st/clkgen-fsyn.c
+++ b/drivers/clk/st/clkgen-fsyn.c
@@ -614,13 +614,13 @@ static const struct clk_ops st_quadfs_pll_c32_ops = {
.set_rate = quadfs_pll_fs660c32_set_rate,
};
-static struct clk * __init st_clk_register_quadfs_pll(
+static struct clk_core * __init st_clk_register_quadfs_pll(
const char *name, const char *parent_name,
struct clkgen_quadfs_data *quadfs, void __iomem *reg,
spinlock_t *lock)
{
struct st_clk_quadfs_pll *pll;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
/*
@@ -1018,13 +1018,13 @@ static const struct clk_ops st_quadfs_ops = {
.recalc_rate = quadfs_recalc_rate,
};
-static struct clk * __init st_clk_register_quadfs_fsynth(
+static struct clk_core * __init st_clk_register_quadfs_fsynth(
const char *name, const char *parent_name,
struct clkgen_quadfs_data *quadfs, void __iomem *reg, u32 chan,
spinlock_t *lock)
{
struct st_clk_quadfs_fsynth *fs;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
/*
@@ -1102,7 +1102,7 @@ static void __init st_of_create_quadfs_fsynths(
return;
clk_data->clk_num = QUADFS_MAX_CHAN;
- clk_data->clks = kzalloc(QUADFS_MAX_CHAN * sizeof(struct clk *),
+ clk_data->clks = kzalloc(QUADFS_MAX_CHAN * sizeof(struct clk_core *),
GFP_KERNEL);
if (!clk_data->clks) {
@@ -1111,7 +1111,7 @@ static void __init st_of_create_quadfs_fsynths(
}
for (fschan = 0; fschan < QUADFS_MAX_CHAN; fschan++) {
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name;
if (of_property_read_string_index(np, "clock-output-names",
@@ -1136,8 +1136,8 @@ static void __init st_of_create_quadfs_fsynths(
clk_data->clks[fschan] = clk;
pr_debug("%s: parent %s rate %u\n",
__clk_get_name(clk),
- __clk_get_name(clk_get_parent(clk)),
- (unsigned int)clk_get_rate(clk));
+ __clk_get_name(clk_provider_get_parent(clk)),
+ (unsigned int)clk_provider_get_rate(clk));
}
}
@@ -1147,7 +1147,7 @@ static void __init st_of_create_quadfs_fsynths(
static void __init st_of_quadfs_setup(struct device_node *np)
{
const struct of_device_id *match;
- struct clk *clk;
+ struct clk_core *clk;
const char *pll_name, *clk_parent_name;
void __iomem *reg;
spinlock_t *lock;
@@ -1181,8 +1181,8 @@ static void __init st_of_quadfs_setup(struct device_node *np)
else
pr_debug("%s: parent %s rate %u\n",
__clk_get_name(clk),
- __clk_get_name(clk_get_parent(clk)),
- (unsigned int)clk_get_rate(clk));
+ __clk_get_name(clk_provider_get_parent(clk)),
+ (unsigned int)clk_provider_get_rate(clk));
st_of_create_quadfs_fsynths(np, pll_name,
(struct clkgen_quadfs_data *)match->data,
diff --git a/drivers/clk/st/clkgen-mux.c b/drivers/clk/st/clkgen-mux.c
index 79dc40b..d2a951f 100644
--- a/drivers/clk/st/clkgen-mux.c
+++ b/drivers/clk/st/clkgen-mux.c
@@ -215,7 +215,7 @@ static const struct clk_ops clkgena_divmux_ops = {
/**
* clk_register_genamux - register a genamux clock with the clock framework
*/
-struct clk *clk_register_genamux(const char *name,
+struct clk_core *clk_register_genamux(const char *name,
const char **parent_names, u8 num_parents,
void __iomem *reg,
const struct clkgena_divmux_data *muxdata,
@@ -227,7 +227,7 @@ struct clk *clk_register_genamux(const char *name,
const int mux_width = 2;
const int divider_width = 5;
struct clkgena_divmux *genamux;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
int i;
@@ -280,8 +280,8 @@ struct clk *clk_register_genamux(const char *name,
pr_debug("%s: parent %s rate %lu\n",
__clk_get_name(clk),
- __clk_get_name(clk_get_parent(clk)),
- clk_get_rate(clk));
+ __clk_get_name(clk_provider_get_parent(clk)),
+ clk_provider_get_rate(clk));
err:
return clk;
}
@@ -413,14 +413,14 @@ void __init st_of_clkgena_divmux_setup(struct device_node *np)
goto err;
clk_data->clk_num = data->num_outputs;
- clk_data->clks = kzalloc(clk_data->clk_num * sizeof(struct clk *),
+ clk_data->clks = kzalloc(clk_data->clk_num * sizeof(struct clk_core *),
GFP_KERNEL);
if (!clk_data->clks)
goto err;
for (i = 0; i < clk_data->clk_num; i++) {
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name;
if (of_property_read_string_index(np, "clock-output-names",
@@ -490,7 +490,7 @@ void __init st_of_clkgena_prediv_setup(struct device_node *np)
const struct of_device_id *match;
void __iomem *reg;
const char *parent_name, *clk_name;
- struct clk *clk;
+ struct clk_core *clk;
struct clkgena_prediv_data *data;
match = of_match_node(clkgena_prediv_of_match, np);
@@ -522,8 +522,8 @@ void __init st_of_clkgena_prediv_setup(struct device_node *np)
of_clk_add_provider(np, of_clk_src_simple_get, clk);
pr_debug("%s: parent %s rate %u\n",
__clk_get_name(clk),
- __clk_get_name(clk_get_parent(clk)),
- (unsigned int)clk_get_rate(clk));
+ __clk_get_name(clk_provider_get_parent(clk)),
+ (unsigned int)clk_provider_get_rate(clk));
return;
}
@@ -625,7 +625,7 @@ static struct of_device_id mux_of_match[] = {
void __init st_of_clkgen_mux_setup(struct device_node *np)
{
const struct of_device_id *match;
- struct clk *clk;
+ struct clk_core *clk;
void __iomem *reg;
const char **parents;
int num_parents;
@@ -662,8 +662,8 @@ void __init st_of_clkgen_mux_setup(struct device_node *np)
pr_debug("%s: parent %s rate %u\n",
__clk_get_name(clk),
- __clk_get_name(clk_get_parent(clk)),
- (unsigned int)clk_get_rate(clk));
+ __clk_get_name(clk_provider_get_parent(clk)),
+ (unsigned int)clk_provider_get_rate(clk));
of_clk_add_provider(np, of_clk_src_simple_get, clk);
@@ -726,14 +726,14 @@ void __init st_of_clkgen_vcc_setup(struct device_node *np)
goto err;
clk_data->clk_num = VCC_MAX_CHANNELS;
- clk_data->clks = kzalloc(clk_data->clk_num * sizeof(struct clk *),
+ clk_data->clks = kzalloc(clk_data->clk_num * sizeof(struct clk_core *),
GFP_KERNEL);
if (!clk_data->clks)
goto err;
for (i = 0; i < clk_data->clk_num; i++) {
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name;
struct clk_gate *gate;
struct clk_divider *div;
@@ -796,8 +796,8 @@ void __init st_of_clkgen_vcc_setup(struct device_node *np)
pr_debug("%s: parent %s rate %u\n",
__clk_get_name(clk),
- __clk_get_name(clk_get_parent(clk)),
- (unsigned int)clk_get_rate(clk));
+ __clk_get_name(clk_provider_get_parent(clk)),
+ (unsigned int)clk_provider_get_rate(clk));
clk_data->clks[i] = clk;
}
diff --git a/drivers/clk/st/clkgen-pll.c b/drivers/clk/st/clkgen-pll.c
index 29769d7..32bac02 100644
--- a/drivers/clk/st/clkgen-pll.c
+++ b/drivers/clk/st/clkgen-pll.c
@@ -390,13 +390,13 @@ static const struct clk_ops st_pll1200c32_ops = {
.recalc_rate = recalc_stm_pll1200c32,
};
-static struct clk * __init clkgen_pll_register(const char *parent_name,
+static struct clk_core * __init clkgen_pll_register(const char *parent_name,
struct clkgen_pll_data *pll_data,
void __iomem *reg,
const char *clk_name)
{
struct clkgen_pll *pll;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
pll = kzalloc(sizeof(*pll), GFP_KERNEL);
@@ -422,16 +422,16 @@ static struct clk * __init clkgen_pll_register(const char *parent_name,
pr_debug("%s: parent %s rate %lu\n",
__clk_get_name(clk),
- __clk_get_name(clk_get_parent(clk)),
- clk_get_rate(clk));
+ __clk_get_name(clk_provider_get_parent(clk)),
+ clk_provider_get_rate(clk));
return clk;
}
-static struct clk * __init clkgen_c65_lsdiv_register(const char *parent_name,
+static struct clk_core * __init clkgen_c65_lsdiv_register(const char *parent_name,
const char *clk_name)
{
- struct clk *clk;
+ struct clk_core *clk;
clk = clk_register_fixed_factor(NULL, clk_name, parent_name, 0, 1, 2);
if (IS_ERR(clk))
@@ -439,8 +439,8 @@ static struct clk * __init clkgen_c65_lsdiv_register(const char *parent_name,
pr_debug("%s: parent %s rate %lu\n",
__clk_get_name(clk),
- __clk_get_name(clk_get_parent(clk)),
- clk_get_rate(clk));
+ __clk_get_name(clk_provider_get_parent(clk)),
+ clk_provider_get_rate(clk));
return clk;
}
@@ -484,7 +484,7 @@ static void __init clkgena_c65_pll_setup(struct device_node *np)
return;
clk_data->clk_num = num_pll_outputs;
- clk_data->clks = kzalloc(clk_data->clk_num * sizeof(struct clk *),
+ clk_data->clks = kzalloc(clk_data->clk_num * sizeof(struct clk_core *),
GFP_KERNEL);
if (!clk_data->clks)
@@ -543,14 +543,14 @@ err:
CLK_OF_DECLARE(clkgena_c65_plls,
"st,clkgena-plls-c65", clkgena_c65_pll_setup);
-static struct clk * __init clkgen_odf_register(const char *parent_name,
+static struct clk_core * __init clkgen_odf_register(const char *parent_name,
void * __iomem reg,
struct clkgen_pll_data *pll_data,
int odf,
spinlock_t *odf_lock,
const char *odf_name)
{
- struct clk *clk;
+ struct clk_core *clk;
unsigned long flags;
struct clk_gate *gate;
struct clk_divider *div;
@@ -588,8 +588,8 @@ static struct clk * __init clkgen_odf_register(const char *parent_name,
pr_debug("%s: parent %s rate %lu\n",
__clk_get_name(clk),
- __clk_get_name(clk_get_parent(clk)),
- clk_get_rate(clk));
+ __clk_get_name(clk_provider_get_parent(clk)),
+ clk_provider_get_rate(clk));
return clk;
}
@@ -640,7 +640,7 @@ static struct of_device_id c32_pll_of_match[] = {
static void __init clkgen_c32_pll_setup(struct device_node *np)
{
const struct of_device_id *match;
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name, *pll_name;
void __iomem *pll_base;
int num_odfs, odf;
@@ -676,14 +676,14 @@ static void __init clkgen_c32_pll_setup(struct device_node *np)
return;
clk_data->clk_num = num_odfs;
- clk_data->clks = kzalloc(clk_data->clk_num * sizeof(struct clk *),
+ clk_data->clks = kzalloc(clk_data->clk_num * sizeof(struct clk_core *),
GFP_KERNEL);
if (!clk_data->clks)
goto err;
for (odf = 0; odf < num_odfs; odf++) {
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name;
if (of_property_read_string_index(np, "clock-output-names",
@@ -723,7 +723,7 @@ static struct of_device_id c32_gpu_pll_of_match[] = {
static void __init clkgengpu_c32_pll_setup(struct device_node *np)
{
const struct of_device_id *match;
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name;
void __iomem *reg;
const char *clk_name;
diff --git a/drivers/clk/sunxi/clk-a10-hosc.c b/drivers/clk/sunxi/clk-a10-hosc.c
index 0481d5d..c5e4c41 100644
--- a/drivers/clk/sunxi/clk-a10-hosc.c
+++ b/drivers/clk/sunxi/clk-a10-hosc.c
@@ -25,7 +25,7 @@ static DEFINE_SPINLOCK(hosc_lock);
static void __init sun4i_osc_clk_setup(struct device_node *node)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_fixed_rate *fixed;
struct clk_gate *gate;
const char *clk_name = node->name;
diff --git a/drivers/clk/sunxi/clk-a20-gmac.c b/drivers/clk/sunxi/clk-a20-gmac.c
index 5296fd6..63c7dd5 100644
--- a/drivers/clk/sunxi/clk-a20-gmac.c
+++ b/drivers/clk/sunxi/clk-a20-gmac.c
@@ -55,7 +55,7 @@ static DEFINE_SPINLOCK(gmac_lock);
static void __init sun7i_a20_gmac_clk_setup(struct device_node *node)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_mux *mux;
struct clk_gate *gate;
const char *clk_name = node->name;
diff --git a/drivers/clk/sunxi/clk-factors.c b/drivers/clk/sunxi/clk-factors.c
index 2057c8a..bb2d4b2 100644
--- a/drivers/clk/sunxi/clk-factors.c
+++ b/drivers/clk/sunxi/clk-factors.c
@@ -79,9 +79,9 @@ static long clk_factors_round_rate(struct clk_hw *hw, unsigned long rate,
static long clk_factors_determine_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *best_parent_rate,
- struct clk **best_parent_p)
+ struct clk_core **best_parent_p)
{
- struct clk *clk = hw->clk, *parent, *best_parent = NULL;
+ struct clk_core *clk = hw->clk, *parent, *best_parent = NULL;
int i, num_parents;
unsigned long parent_rate, best = 0, child_rate, best_child_rate = 0;
diff --git a/drivers/clk/sunxi/clk-sun6i-apb0-gates.c b/drivers/clk/sunxi/clk-sun6i-apb0-gates.c
index e10d052..f29b06e 100644
--- a/drivers/clk/sunxi/clk-sun6i-apb0-gates.c
+++ b/drivers/clk/sunxi/clk-sun6i-apb0-gates.c
@@ -74,7 +74,7 @@ static int sun6i_a31_apb0_gates_clk_probe(struct platform_device *pdev)
/* Worst-case size approximation and memory allocation */
ngates = find_last_bit(data->mask, SUN6I_APB0_GATES_MAX_SIZE);
clk_data->clks = devm_kcalloc(&pdev->dev, (ngates + 1),
- sizeof(struct clk *), GFP_KERNEL);
+ sizeof(struct clk_core *), GFP_KERNEL);
if (!clk_data->clks)
return -ENOMEM;
diff --git a/drivers/clk/sunxi/clk-sun6i-apb0.c b/drivers/clk/sunxi/clk-sun6i-apb0.c
index 1fa2337..5e4649e 100644
--- a/drivers/clk/sunxi/clk-sun6i-apb0.c
+++ b/drivers/clk/sunxi/clk-sun6i-apb0.c
@@ -35,7 +35,7 @@ static int sun6i_a31_apb0_clk_probe(struct platform_device *pdev)
const char *clk_parent;
struct resource *r;
void __iomem *reg;
- struct clk *clk;
+ struct clk_core *clk;
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
reg = devm_ioremap_resource(&pdev->dev, r);
diff --git a/drivers/clk/sunxi/clk-sun6i-ar100.c b/drivers/clk/sunxi/clk-sun6i-ar100.c
index eca8ca0..984d5d0 100644
--- a/drivers/clk/sunxi/clk-sun6i-ar100.c
+++ b/drivers/clk/sunxi/clk-sun6i-ar100.c
@@ -46,7 +46,7 @@ static unsigned long ar100_recalc_rate(struct clk_hw *hw,
static long ar100_determine_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *best_parent_rate,
- struct clk **best_parent_clk)
+ struct clk_core **best_parent_clk)
{
int nparents = __clk_get_num_parents(hw->clk);
long best_rate = -EINVAL;
@@ -57,7 +57,7 @@ static long ar100_determine_rate(struct clk_hw *hw, unsigned long rate,
for (i = 0; i < nparents; i++) {
unsigned long parent_rate;
unsigned long tmp_rate;
- struct clk *parent;
+ struct clk_core *parent;
unsigned long div;
int shift;
@@ -176,7 +176,7 @@ static int sun6i_a31_ar100_clk_probe(struct platform_device *pdev)
struct clk_init_data init;
struct ar100_clk *ar100;
struct resource *r;
- struct clk *clk;
+ struct clk_core *clk;
int nparents;
int i;
diff --git a/drivers/clk/sunxi/clk-sun8i-apb0.c b/drivers/clk/sunxi/clk-sun8i-apb0.c
index 1f5ba9b..fa308fd 100644
--- a/drivers/clk/sunxi/clk-sun8i-apb0.c
+++ b/drivers/clk/sunxi/clk-sun8i-apb0.c
@@ -26,7 +26,7 @@ static int sun8i_a23_apb0_clk_probe(struct platform_device *pdev)
const char *clk_parent;
struct resource *r;
void __iomem *reg;
- struct clk *clk;
+ struct clk_core *clk;
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
reg = devm_ioremap_resource(&pdev->dev, r);
diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
index b654b7b..44c4470 100644
--- a/drivers/clk/sunxi/clk-sunxi.c
+++ b/drivers/clk/sunxi/clk-sunxi.c
@@ -403,7 +403,7 @@ static void sun7i_a20_get_out_factors(u32 *freq, u32 parent_rate,
* clk_sunxi_mmc_phase_control() - configures MMC clock phase control
*/
-void clk_sunxi_mmc_phase_control(struct clk *clk, u8 sample, u8 output)
+void clk_sunxi_mmc_phase_control(struct clk_core *clk, u8 sample, u8 output)
{
#define to_clk_composite(_hw) container_of(_hw, struct clk_composite, hw)
#define to_clk_factors(_hw) container_of(_hw, struct clk_factors, hw)
@@ -582,10 +582,10 @@ static const struct factors_data sun7i_a20_out_data __initconst = {
.getter = sun7i_a20_get_out_factors,
};
-static struct clk * __init sunxi_factors_clk_setup(struct device_node *node,
+static struct clk_core * __init sunxi_factors_clk_setup(struct device_node *node,
const struct factors_data *data)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_factors *factors;
struct clk_gate *gate = NULL;
struct clk_mux *mux = NULL;
@@ -695,7 +695,7 @@ static const struct mux_data sun4i_apb1_mux_data __initconst = {
static void __init sunxi_mux_clk_setup(struct device_node *node,
struct mux_data *data)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name = node->name;
const char *parents[SUNXI_MAX_PARENTS];
void __iomem *reg;
@@ -777,7 +777,7 @@ static const struct div_data sun6i_a31_apb2_div_data __initconst = {
static void __init sunxi_divider_clk_setup(struct device_node *node,
struct div_data *data)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name = node->name;
const char *clk_parent;
void __iomem *reg;
@@ -976,7 +976,7 @@ static void __init sunxi_gates_clk_setup(struct device_node *node,
clk_data = kmalloc(sizeof(struct clk_onecell_data), GFP_KERNEL);
if (!clk_data)
return;
- clk_data->clks = kzalloc((qty+1) * sizeof(struct clk *), GFP_KERNEL);
+ clk_data->clks = kzalloc((qty+1) * sizeof(struct clk_core *), GFP_KERNEL);
if (!clk_data->clks) {
kfree(clk_data);
return;
@@ -1078,7 +1078,7 @@ static void __init sunxi_divs_clk_setup(struct device_node *node,
struct clk_onecell_data *clk_data;
const char *parent;
const char *clk_name;
- struct clk **clks, *pclk;
+ struct clk_core **clks, *pclk;
struct clk_hw *gate_hw, *rate_hw;
const struct clk_ops *rate_ops;
struct clk_gate *gate = NULL;
@@ -1291,10 +1291,10 @@ static void __init sunxi_init_clocks(const char *clocks[], int nclocks)
/* Protect the clocks that needs to stay on */
for (i = 0; i < nclocks; i++) {
- struct clk *clk = clk_get(NULL, clocks[i]);
+ struct clk_core *clk = clk_provider_get(NULL, clocks[i]);
if (!IS_ERR(clk))
- clk_prepare_enable(clk);
+ clk_provider_prepare_enable(clk);
}
}
diff --git a/drivers/clk/tegra/clk-audio-sync.c b/drivers/clk/tegra/clk-audio-sync.c
index c0f7843..53c3488 100644
--- a/drivers/clk/tegra/clk-audio-sync.c
+++ b/drivers/clk/tegra/clk-audio-sync.c
@@ -54,12 +54,12 @@ const struct clk_ops tegra_clk_sync_source_ops = {
.recalc_rate = clk_sync_source_recalc_rate,
};
-struct clk *tegra_clk_register_sync_source(const char *name,
+struct clk_core *tegra_clk_register_sync_source(const char *name,
unsigned long rate, unsigned long max_rate)
{
struct tegra_clk_sync_source *sync;
struct clk_init_data init;
- struct clk *clk;
+ struct clk_core *clk;
sync = kzalloc(sizeof(*sync), GFP_KERNEL);
if (!sync) {
diff --git a/drivers/clk/tegra/clk-divider.c b/drivers/clk/tegra/clk-divider.c
index 290f9c1..c69a728 100644
--- a/drivers/clk/tegra/clk-divider.c
+++ b/drivers/clk/tegra/clk-divider.c
@@ -19,7 +19,6 @@
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/clk-provider.h>
-#include <linux/clk.h>
#include "clk.h"
@@ -147,13 +146,13 @@ const struct clk_ops tegra_clk_frac_div_ops = {
.round_rate = clk_frac_div_round_rate,
};
-struct clk *tegra_clk_register_divider(const char *name,
+struct clk_core *tegra_clk_register_divider(const char *name,
const char *parent_name, void __iomem *reg,
unsigned long flags, u8 clk_divider_flags, u8 shift, u8 width,
u8 frac_width, spinlock_t *lock)
{
struct tegra_clk_frac_div *divider;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
divider = kzalloc(sizeof(*divider), GFP_KERNEL);
diff --git a/drivers/clk/tegra/clk-periph-gate.c b/drivers/clk/tegra/clk-periph-gate.c
index 0aa8830..d59200f 100644
--- a/drivers/clk/tegra/clk-periph-gate.c
+++ b/drivers/clk/tegra/clk-periph-gate.c
@@ -14,7 +14,6 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/slab.h>
#include <linux/io.h>
@@ -128,12 +127,12 @@ const struct clk_ops tegra_clk_periph_gate_ops = {
.disable = clk_periph_disable,
};
-struct clk *tegra_clk_register_periph_gate(const char *name,
+struct clk_core *tegra_clk_register_periph_gate(const char *name,
const char *parent_name, u8 gate_flags, void __iomem *clk_base,
unsigned long flags, int clk_num, int *enable_refcnt)
{
struct tegra_clk_periph_gate *gate;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
struct tegra_clk_periph_regs *pregs;
diff --git a/drivers/clk/tegra/clk-periph.c b/drivers/clk/tegra/clk-periph.c
index 9e899c18..34a60fd 100644
--- a/drivers/clk/tegra/clk-periph.c
+++ b/drivers/clk/tegra/clk-periph.c
@@ -14,7 +14,6 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/export.h>
#include <linux/slab.h>
@@ -138,13 +137,13 @@ static const struct clk_ops tegra_clk_periph_no_gate_ops = {
.set_rate = clk_periph_set_rate,
};
-static struct clk *_tegra_clk_register_periph(const char *name,
+static struct clk_core *_tegra_clk_register_periph(const char *name,
const char **parent_names, int num_parents,
struct tegra_clk_periph *periph,
void __iomem *clk_base, u32 offset,
unsigned long flags)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
struct tegra_clk_periph_regs *bank;
bool div = !(periph->gate.flags & TEGRA_PERIPH_NO_DIV);
@@ -186,7 +185,7 @@ static struct clk *_tegra_clk_register_periph(const char *name,
return clk;
}
-struct clk *tegra_clk_register_periph(const char *name,
+struct clk_core *tegra_clk_register_periph(const char *name,
const char **parent_names, int num_parents,
struct tegra_clk_periph *periph, void __iomem *clk_base,
u32 offset, unsigned long flags)
@@ -195,7 +194,7 @@ struct clk *tegra_clk_register_periph(const char *name,
periph, clk_base, offset, flags);
}
-struct clk *tegra_clk_register_periph_nodiv(const char *name,
+struct clk_core *tegra_clk_register_periph_nodiv(const char *name,
const char **parent_names, int num_parents,
struct tegra_clk_periph *periph, void __iomem *clk_base,
u32 offset)
diff --git a/drivers/clk/tegra/clk-pll-out.c b/drivers/clk/tegra/clk-pll-out.c
index 3598987..3adbc24 100644
--- a/drivers/clk/tegra/clk-pll-out.c
+++ b/drivers/clk/tegra/clk-pll-out.c
@@ -20,7 +20,6 @@
#include <linux/delay.h>
#include <linux/slab.h>
#include <linux/clk-provider.h>
-#include <linux/clk.h>
#include "clk.h"
@@ -87,13 +86,13 @@ const struct clk_ops tegra_clk_pll_out_ops = {
.disable = clk_pll_out_disable,
};
-struct clk *tegra_clk_register_pll_out(const char *name,
+struct clk_core *tegra_clk_register_pll_out(const char *name,
const char *parent_name, void __iomem *reg, u8 enb_bit_idx,
u8 rst_bit_idx, unsigned long flags, u8 pll_out_flags,
spinlock_t *lock)
{
struct tegra_clk_pll_out *pll_out;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
pll_out = kzalloc(sizeof(*pll_out), GFP_KERNEL);
diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c
index c7c6d8f..aa18eab 100644
--- a/drivers/clk/tegra/clk-pll.c
+++ b/drivers/clk/tegra/clk-pll.c
@@ -19,7 +19,6 @@
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/clk-provider.h>
-#include <linux/clk.h>
#include "clk.h"
@@ -729,7 +728,7 @@ static int clk_plle_training(struct tegra_clk_pll *pll)
static int clk_plle_enable(struct clk_hw *hw)
{
struct tegra_clk_pll *pll = to_clk_pll(hw);
- unsigned long input_rate = clk_get_rate(clk_get_parent(hw->clk));
+ unsigned long input_rate = clk_provider_get_rate(clk_provider_get_parent(hw->clk));
struct tegra_clk_pll_freq_table sel;
u32 val;
int err;
@@ -1033,7 +1032,7 @@ static int clk_pllm_set_rate(struct clk_hw *hw, unsigned long rate,
state = clk_pll_is_enabled(hw);
if (state) {
- if (rate != clk_get_rate(hw->clk)) {
+ if (rate != clk_provider_get_rate(hw->clk)) {
pr_err("%s: Cannot change active PLLM\n", __func__);
ret = -EINVAL;
goto out;
@@ -1285,7 +1284,7 @@ static int clk_plle_tegra114_enable(struct clk_hw *hw)
u32 val;
int ret;
unsigned long flags = 0;
- unsigned long input_rate = clk_get_rate(clk_get_parent(hw->clk));
+ unsigned long input_rate = clk_provider_get_rate(clk_provider_get_parent(hw->clk));
if (_get_table_rate(hw, &sel, pll->params->fixed_rate, input_rate))
return -EINVAL;
@@ -1430,7 +1429,7 @@ static struct tegra_clk_pll *_tegra_init_pll(void __iomem *clk_base,
return pll;
}
-static struct clk *_tegra_clk_register_pll(struct tegra_clk_pll *pll,
+static struct clk_core *_tegra_clk_register_pll(struct tegra_clk_pll *pll,
const char *name, const char *parent_name, unsigned long flags,
const struct clk_ops *ops)
{
@@ -1448,13 +1447,13 @@ static struct clk *_tegra_clk_register_pll(struct tegra_clk_pll *pll,
return clk_register(NULL, &pll->hw);
}
-struct clk *tegra_clk_register_pll(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_pll(const char *name, const char *parent_name,
void __iomem *clk_base, void __iomem *pmc,
unsigned long flags, struct tegra_clk_pll_params *pll_params,
spinlock_t *lock)
{
struct tegra_clk_pll *pll;
- struct clk *clk;
+ struct clk_core *clk;
pll_params->flags |= TEGRA_PLL_BYPASS;
pll_params->flags |= TEGRA_PLL_HAS_LOCK_ENABLE;
@@ -1479,13 +1478,13 @@ static struct div_nmp pll_e_nmp = {
.divp_width = PLLE_BASE_DIVP_WIDTH,
};
-struct clk *tegra_clk_register_plle(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_plle(const char *name, const char *parent_name,
void __iomem *clk_base, void __iomem *pmc,
unsigned long flags, struct tegra_clk_pll_params *pll_params,
spinlock_t *lock)
{
struct tegra_clk_pll *pll;
- struct clk *clk;
+ struct clk_core *clk;
pll_params->flags |= TEGRA_PLL_LOCK_MISC | TEGRA_PLL_BYPASS;
pll_params->flags |= TEGRA_PLL_HAS_LOCK_ENABLE;
@@ -1550,14 +1549,14 @@ static const struct clk_ops tegra_clk_plle_tegra114_ops = {
};
-struct clk *tegra_clk_register_pllxc(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_pllxc(const char *name, const char *parent_name,
void __iomem *clk_base, void __iomem *pmc,
unsigned long flags,
struct tegra_clk_pll_params *pll_params,
spinlock_t *lock)
{
struct tegra_clk_pll *pll;
- struct clk *clk, *parent;
+ struct clk_core *clk, *parent;
unsigned long parent_rate;
int err;
u32 val, val_iddq;
@@ -1603,7 +1602,7 @@ struct clk *tegra_clk_register_pllxc(const char *name, const char *parent_name,
return clk;
}
-struct clk *tegra_clk_register_pllre(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_pllre(const char *name, const char *parent_name,
void __iomem *clk_base, void __iomem *pmc,
unsigned long flags,
struct tegra_clk_pll_params *pll_params,
@@ -1611,7 +1610,7 @@ struct clk *tegra_clk_register_pllre(const char *name, const char *parent_name,
{
u32 val;
struct tegra_clk_pll *pll;
- struct clk *clk;
+ struct clk_core *clk;
pll_params->flags |= TEGRA_PLL_HAS_LOCK_ENABLE | TEGRA_PLL_LOCK_MISC;
@@ -1649,14 +1648,14 @@ struct clk *tegra_clk_register_pllre(const char *name, const char *parent_name,
return clk;
}
-struct clk *tegra_clk_register_pllm(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_pllm(const char *name, const char *parent_name,
void __iomem *clk_base, void __iomem *pmc,
unsigned long flags,
struct tegra_clk_pll_params *pll_params,
spinlock_t *lock)
{
struct tegra_clk_pll *pll;
- struct clk *clk, *parent;
+ struct clk_core *clk, *parent;
unsigned long parent_rate;
if (!pll_params->pdiv_tohw)
@@ -1688,13 +1687,13 @@ struct clk *tegra_clk_register_pllm(const char *name, const char *parent_name,
return clk;
}
-struct clk *tegra_clk_register_pllc(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_pllc(const char *name, const char *parent_name,
void __iomem *clk_base, void __iomem *pmc,
unsigned long flags,
struct tegra_clk_pll_params *pll_params,
spinlock_t *lock)
{
- struct clk *parent, *clk;
+ struct clk_core *parent, *clk;
struct pdiv_map *p_tohw = pll_params->pdiv_tohw;
struct tegra_clk_pll *pll;
struct tegra_clk_pll_freq_table cfg;
@@ -1762,14 +1761,14 @@ struct clk *tegra_clk_register_pllc(const char *name, const char *parent_name,
return clk;
}
-struct clk *tegra_clk_register_plle_tegra114(const char *name,
+struct clk_core *tegra_clk_register_plle_tegra114(const char *name,
const char *parent_name,
void __iomem *clk_base, unsigned long flags,
struct tegra_clk_pll_params *pll_params,
spinlock_t *lock)
{
struct tegra_clk_pll *pll;
- struct clk *clk;
+ struct clk_core *clk;
u32 val, val_aux;
pll_params->flags |= TEGRA_PLL_HAS_LOCK_ENABLE;
@@ -1812,13 +1811,13 @@ static const struct clk_ops tegra_clk_pllss_ops = {
.set_rate = clk_pllxc_set_rate,
};
-struct clk *tegra_clk_register_pllss(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_pllss(const char *name, const char *parent_name,
void __iomem *clk_base, unsigned long flags,
struct tegra_clk_pll_params *pll_params,
spinlock_t *lock)
{
struct tegra_clk_pll *pll;
- struct clk *clk, *parent;
+ struct clk_core *clk, *parent;
struct tegra_clk_pll_freq_table cfg;
unsigned long parent_rate;
u32 val;
diff --git a/drivers/clk/tegra/clk-super.c b/drivers/clk/tegra/clk-super.c
index 2fd924d..0d11346 100644
--- a/drivers/clk/tegra/clk-super.c
+++ b/drivers/clk/tegra/clk-super.c
@@ -20,7 +20,6 @@
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/clk-provider.h>
-#include <linux/clk.h>
#include "clk.h"
@@ -127,13 +126,13 @@ const struct clk_ops tegra_clk_super_ops = {
.set_parent = clk_super_set_parent,
};
-struct clk *tegra_clk_register_super_mux(const char *name,
+struct clk_core *tegra_clk_register_super_mux(const char *name,
const char **parent_names, u8 num_parents,
unsigned long flags, void __iomem *reg, u8 clk_super_flags,
u8 width, u8 pllx_index, u8 div2_index, spinlock_t *lock)
{
struct tegra_clk_super_mux *super;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
super = kzalloc(sizeof(*super), GFP_KERNEL);
diff --git a/drivers/clk/tegra/clk-tegra-audio.c b/drivers/clk/tegra/clk-tegra-audio.c
index 5c38aab..038a22e 100644
--- a/drivers/clk/tegra/clk-tegra-audio.c
+++ b/drivers/clk/tegra/clk-tegra-audio.c
@@ -15,7 +15,6 @@
*/
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
#include <linux/of_address.h>
@@ -128,8 +127,8 @@ void __init tegra_audio_clk_init(void __iomem *clk_base,
void __iomem *pmc_base, struct tegra_clk *tegra_clks,
struct tegra_clk_pll_params *pll_a_params)
{
- struct clk *clk;
- struct clk **dt_clk;
+ struct clk_core *clk;
+ struct clk_core **dt_clk;
int i;
/* PLLA */
diff --git a/drivers/clk/tegra/clk-tegra-fixed.c b/drivers/clk/tegra/clk-tegra-fixed.c
index f3b7738..5ee486a 100644
--- a/drivers/clk/tegra/clk-tegra-fixed.c
+++ b/drivers/clk/tegra/clk-tegra-fixed.c
@@ -15,7 +15,6 @@
*/
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
#include <linux/of_address.h>
@@ -36,8 +35,8 @@ int __init tegra_osc_clk_init(void __iomem *clk_base,
unsigned long *osc_freq,
unsigned long *pll_ref_freq)
{
- struct clk *clk;
- struct clk **dt_clk;
+ struct clk_core *clk;
+ struct clk_core **dt_clk;
u32 val, pll_ref_div;
unsigned osc_idx;
@@ -81,8 +80,8 @@ int __init tegra_osc_clk_init(void __iomem *clk_base,
void __init tegra_fixed_clk_init(struct tegra_clk *tegra_clks)
{
- struct clk *clk;
- struct clk **dt_clk;
+ struct clk_core *clk;
+ struct clk_core **dt_clk;
/* clk_32k */
dt_clk = tegra_lookup_dt_id(tegra_clk_clk_32k, tegra_clks);
diff --git a/drivers/clk/tegra/clk-tegra-periph.c b/drivers/clk/tegra/clk-tegra-periph.c
index 37f32c4..5e17ad4 100644
--- a/drivers/clk/tegra/clk-tegra-periph.c
+++ b/drivers/clk/tegra/clk-tegra-periph.c
@@ -15,7 +15,6 @@
*/
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/of.h>
@@ -585,8 +584,8 @@ static void __init periph_clk_init(void __iomem *clk_base,
struct tegra_clk *tegra_clks)
{
int i;
- struct clk *clk;
- struct clk **dt_clk;
+ struct clk_core *clk;
+ struct clk_core **dt_clk;
for (i = 0; i < ARRAY_SIZE(periph_clks); i++) {
struct tegra_clk_periph_regs *bank;
@@ -615,8 +614,8 @@ static void __init gate_clk_init(void __iomem *clk_base,
struct tegra_clk *tegra_clks)
{
int i;
- struct clk *clk;
- struct clk **dt_clk;
+ struct clk_core *clk;
+ struct clk_core **dt_clk;
for (i = 0; i < ARRAY_SIZE(gate_clks); i++) {
struct tegra_periph_init_data *data;
@@ -640,8 +639,8 @@ static void __init init_pllp(void __iomem *clk_base, void __iomem *pmc_base,
struct tegra_clk *tegra_clks,
struct tegra_clk_pll_params *pll_params)
{
- struct clk *clk;
- struct clk **dt_clk;
+ struct clk_core *clk;
+ struct clk_core **dt_clk;
int i;
dt_clk = tegra_lookup_dt_id(tegra_clk_pll_p, tegra_clks);
diff --git a/drivers/clk/tegra/clk-tegra-pmc.c b/drivers/clk/tegra/clk-tegra-pmc.c
index 08b21c1..ddd39ca 100644
--- a/drivers/clk/tegra/clk-tegra-pmc.c
+++ b/drivers/clk/tegra/clk-tegra-pmc.c
@@ -15,7 +15,6 @@
*/
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/of.h>
@@ -82,8 +81,8 @@ static struct pmc_clk_init_data pmc_clks[] = {
void __init tegra_pmc_clk_init(void __iomem *pmc_base,
struct tegra_clk *tegra_clks)
{
- struct clk *clk;
- struct clk **dt_clk;
+ struct clk_core *clk;
+ struct clk_core **dt_clk;
int i;
for (i = 0; i < ARRAY_SIZE(pmc_clks); i++) {
diff --git a/drivers/clk/tegra/clk-tegra-super-gen4.c b/drivers/clk/tegra/clk-tegra-super-gen4.c
index feb3201..9d1cdaa 100644
--- a/drivers/clk/tegra/clk-tegra-super-gen4.c
+++ b/drivers/clk/tegra/clk-tegra-super-gen4.c
@@ -15,7 +15,6 @@
*/
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
#include <linux/of_address.h>
@@ -53,8 +52,8 @@ static const char *cclk_lp_parents[] = { "clk_m", "pll_c", "clk_32k", "pll_m",
static void __init tegra_sclk_init(void __iomem *clk_base,
struct tegra_clk *tegra_clks)
{
- struct clk *clk;
- struct clk **dt_clk;
+ struct clk_core *clk;
+ struct clk_core **dt_clk;
/* SCLK */
dt_clk = tegra_lookup_dt_id(tegra_clk_sclk, tegra_clks);
@@ -99,8 +98,8 @@ void __init tegra_super_clk_gen4_init(void __iomem *clk_base,
struct tegra_clk *tegra_clks,
struct tegra_clk_pll_params *params)
{
- struct clk *clk;
- struct clk **dt_clk;
+ struct clk_core *clk;
+ struct clk_core **dt_clk;
/* CCLKG */
dt_clk = tegra_lookup_dt_id(tegra_clk_cclk_g, tegra_clks);
diff --git a/drivers/clk/tegra/clk-tegra114.c b/drivers/clk/tegra/clk-tegra114.c
index f760f31..00a2897 100644
--- a/drivers/clk/tegra/clk-tegra114.c
+++ b/drivers/clk/tegra/clk-tegra114.c
@@ -15,7 +15,6 @@
*/
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/of.h>
@@ -936,14 +935,14 @@ static u32 mux_pllm_pllc2_c_c3_pllp_plla_idx[] = {
[0] = 0, [1] = 1, [2] = 2, [3] = 3, [4] = 4, [5] = 6,
};
-static struct clk **clks;
+static struct clk_core **clks;
static unsigned long osc_freq;
static unsigned long pll_ref_freq;
static int __init tegra114_osc_clk_init(void __iomem *clk_base)
{
- struct clk *clk;
+ struct clk_core *clk;
u32 val, pll_ref_div;
val = readl_relaxed(clk_base + OSC_CTRL);
@@ -973,7 +972,7 @@ static int __init tegra114_osc_clk_init(void __iomem *clk_base)
static void __init tegra114_fixed_clk_init(void __iomem *clk_base)
{
- struct clk *clk;
+ struct clk_core *clk;
/* clk_32k */
clk = clk_register_fixed_rate(NULL, "clk_32k", NULL, CLK_IS_ROOT,
@@ -1078,7 +1077,7 @@ static void __init tegra114_pll_init(void __iomem *clk_base,
void __iomem *pmc)
{
u32 val;
- struct clk *clk;
+ struct clk_core *clk;
/* PLLC */
clk = tegra_clk_register_pllxc("pll_c", "pll_ref", clk_base,
@@ -1200,7 +1199,7 @@ static struct tegra_periph_init_data tegra_periph_clk_list[] = {
static __init void tegra114_periph_clk_init(void __iomem *clk_base,
void __iomem *pmc_base)
{
- struct clk *clk;
+ struct clk_core *clk;
struct tegra_periph_init_data *data;
int i;
diff --git a/drivers/clk/tegra/clk-tegra124.c b/drivers/clk/tegra/clk-tegra124.c
index 9525c68..bf481c8 100644
--- a/drivers/clk/tegra/clk-tegra124.c
+++ b/drivers/clk/tegra/clk-tegra124.c
@@ -15,7 +15,6 @@
*/
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/of.h>
@@ -1017,7 +1016,7 @@ static struct tegra_devclk devclks[] __initdata = {
{ .dev_id = "timer", .dt_id = TEGRA124_CLK_TIMER },
};
-static struct clk **clks;
+static struct clk_core **clks;
static void tegra124_utmi_param_configure(void __iomem *clk_base)
{
@@ -1104,7 +1103,7 @@ static void tegra124_utmi_param_configure(void __iomem *clk_base)
static __init void tegra124_periph_clk_init(void __iomem *clk_base,
void __iomem *pmc_base)
{
- struct clk *clk;
+ struct clk_core *clk;
/* xusb_ss_div2 */
clk = clk_register_fixed_factor(NULL, "xusb_ss_div2", "xusb_ss_src", 0,
@@ -1148,7 +1147,7 @@ static void __init tegra124_pll_init(void __iomem *clk_base,
void __iomem *pmc)
{
u32 val;
- struct clk *clk;
+ struct clk_core *clk;
/* PLLC */
clk = tegra_clk_register_pllxc("pll_c", "pll_ref", clk_base,
diff --git a/drivers/clk/tegra/clk-tegra20.c b/drivers/clk/tegra/clk-tegra20.c
index dace2b1..6e7d5e2 100644
--- a/drivers/clk/tegra/clk-tegra20.c
+++ b/drivers/clk/tegra/clk-tegra20.c
@@ -15,7 +15,6 @@
*/
#include <linux/io.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/of.h>
@@ -162,7 +161,7 @@ static void __iomem *pmc_base;
_clk_num, _gate_flags, \
_clk_id)
-static struct clk **clks;
+static struct clk_core **clks;
static struct tegra_clk_pll_freq_table pll_c_freq_table[] = {
{ 12000000, 600000000, 600, 12, 0, 8 },
@@ -633,7 +632,7 @@ static unsigned int tegra20_get_pll_ref_div(void)
static void tegra20_pll_init(void)
{
- struct clk *clk;
+ struct clk_core *clk;
/* PLLC */
clk = tegra_clk_register_pll("pll_c", "pll_ref", clk_base, NULL, 0,
@@ -713,7 +712,7 @@ static const char *sclk_parents[] = { "clk_m", "pll_c_out1", "pll_p_out4",
static void tegra20_super_clk_init(void)
{
- struct clk *clk;
+ struct clk_core *clk;
/* CCLK */
clk = tegra_clk_register_super_mux("cclk", cclk_parents,
@@ -738,7 +737,7 @@ static const char *audio_parents[] = {"spdif_in", "i2s1", "i2s2", "unused",
static void __init tegra20_audio_clk_init(void)
{
- struct clk *clk;
+ struct clk_core *clk;
/* audio */
clk = clk_register_mux(NULL, "audio_mux", audio_parents,
@@ -800,7 +799,7 @@ static struct tegra_periph_init_data tegra_periph_nodiv_clk_list[] = {
static void __init tegra20_periph_clk_init(void)
{
struct tegra_periph_init_data *data;
- struct clk *clk;
+ struct clk_core *clk;
int i;
/* ac97 */
@@ -871,7 +870,7 @@ static void __init tegra20_periph_clk_init(void)
static void __init tegra20_osc_clk_init(void)
{
- struct clk *clk;
+ struct clk_core *clk;
unsigned long input_freq;
unsigned int pll_ref_div;
diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c
index 5bbacd0..1e9f733 100644
--- a/drivers/clk/tegra/clk-tegra30.c
+++ b/drivers/clk/tegra/clk-tegra30.c
@@ -16,7 +16,6 @@
#include <linux/io.h>
#include <linux/delay.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/of.h>
@@ -205,7 +204,7 @@ static DEFINE_SPINLOCK(pll_d_lock);
_clk_num, _gate_flags, \
_clk_id)
-static struct clk **clks;
+static struct clk_core **clks;
/*
* Structure defining the fields for USB UTMI clocks Parameters.
@@ -921,7 +920,7 @@ static const char *pll_e_parents[] = {"pll_ref", "pll_p"};
static void __init tegra30_pll_init(void)
{
- struct clk *clk;
+ struct clk_core *clk;
/* PLLC */
clk = tegra_clk_register_pll("pll_c", "pll_ref", clk_base, pmc_base, 0,
@@ -1012,7 +1011,7 @@ static const char *sclk_parents[] = { "clk_m", "pll_c_out1", "pll_p_out4",
static void __init tegra30_super_clk_init(void)
{
- struct clk *clk;
+ struct clk_core *clk;
/*
* Clock input to cclk_g divided from pll_p using
@@ -1134,7 +1133,7 @@ static struct tegra_periph_init_data tegra_periph_nodiv_clk_list[] = {
static void __init tegra30_periph_clk_init(void)
{
struct tegra_periph_init_data *data;
- struct clk *clk;
+ struct clk_core *clk;
int i;
/* dsia */
diff --git a/drivers/clk/tegra/clk.c b/drivers/clk/tegra/clk.c
index f87c609..d5963f6 100644
--- a/drivers/clk/tegra/clk.c
+++ b/drivers/clk/tegra/clk.c
@@ -14,7 +14,6 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
#include <linux/clk/tegra.h>
@@ -69,7 +68,7 @@ struct tegra_cpu_car_ops *tegra_cpu_car_ops = &dummy_car_ops;
int *periph_clk_enb_refcnt;
static int periph_banks;
-static struct clk **clks;
+static struct clk_core **clks;
static int clk_num;
static struct clk_onecell_data clk_data;
@@ -165,7 +164,7 @@ struct tegra_clk_periph_regs *get_reg_bank(int clkid)
}
}
-struct clk ** __init tegra_clk_init(void __iomem *regs, int num, int banks)
+struct clk_core ** __init tegra_clk_init(void __iomem *regs, int num, int banks)
{
clk_base = regs;
@@ -179,7 +178,7 @@ struct clk ** __init tegra_clk_init(void __iomem *regs, int num, int banks)
periph_banks = banks;
- clks = kzalloc(num * sizeof(struct clk *), GFP_KERNEL);
+ clks = kzalloc(num * sizeof(struct clk_core *), GFP_KERNEL);
if (!clks)
kfree(periph_clk_enb_refcnt);
@@ -189,9 +188,9 @@ struct clk ** __init tegra_clk_init(void __iomem *regs, int num, int banks)
}
void __init tegra_init_dup_clks(struct tegra_clk_duplicate *dup_list,
- struct clk *clks[], int clk_max)
+ struct clk_core *clks[], int clk_max)
{
- struct clk *clk;
+ struct clk_core *clk;
for (; dup_list->clk_id < clk_max; dup_list++) {
clk = clks[dup_list->clk_id];
@@ -201,9 +200,9 @@ void __init tegra_init_dup_clks(struct tegra_clk_duplicate *dup_list,
}
void __init tegra_init_from_table(struct tegra_clk_init_table *tbl,
- struct clk *clks[], int clk_max)
+ struct clk_core *clks[], int clk_max)
{
- struct clk *clk;
+ struct clk_core *clk;
for (; tbl->clk_id < clk_max; tbl++) {
clk = clks[tbl->clk_id];
@@ -211,8 +210,8 @@ void __init tegra_init_from_table(struct tegra_clk_init_table *tbl,
return;
if (tbl->parent_id < clk_max) {
- struct clk *parent = clks[tbl->parent_id];
- if (clk_set_parent(clk, parent)) {
+ struct clk_core *parent = clks[tbl->parent_id];
+ if (clk_provider_set_parent(clk, parent)) {
pr_err("%s: Failed to set parent %s of %s\n",
__func__, __clk_get_name(parent),
__clk_get_name(clk));
@@ -221,7 +220,7 @@ void __init tegra_init_from_table(struct tegra_clk_init_table *tbl,
}
if (tbl->rate)
- if (clk_set_rate(clk, tbl->rate)) {
+ if (clk_provider_set_rate(clk, tbl->rate)) {
pr_err("%s: Failed to set rate %lu of %s\n",
__func__, tbl->rate,
__clk_get_name(clk));
@@ -229,7 +228,7 @@ void __init tegra_init_from_table(struct tegra_clk_init_table *tbl,
}
if (tbl->state)
- if (clk_prepare_enable(clk)) {
+ if (clk_provider_prepare_enable(clk)) {
pr_err("%s: Failed to enable %s\n", __func__,
__clk_get_name(clk));
WARN_ON(1);
@@ -286,7 +285,7 @@ void __init tegra_register_devclks(struct tegra_devclk *dev_clks, int num)
}
}
-struct clk ** __init tegra_lookup_dt_id(int clk_id,
+struct clk_core ** __init tegra_lookup_dt_id(int clk_id,
struct tegra_clk *tegra_clk)
{
if (tegra_clk[clk_id].present)
diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h
index 16ec8d6..3093aa4 100644
--- a/drivers/clk/tegra/clk.h
+++ b/drivers/clk/tegra/clk.h
@@ -39,7 +39,7 @@ struct tegra_clk_sync_source {
extern const struct clk_ops tegra_clk_sync_source_ops;
extern int *periph_clk_enb_refcnt;
-struct clk *tegra_clk_register_sync_source(const char *name,
+struct clk_core *tegra_clk_register_sync_source(const char *name,
unsigned long fixed_rate, unsigned long max_rate);
/**
@@ -82,7 +82,7 @@ struct tegra_clk_frac_div {
#define TEGRA_DIVIDER_UART BIT(3)
extern const struct clk_ops tegra_clk_frac_div_ops;
-struct clk *tegra_clk_register_divider(const char *name,
+struct clk_core *tegra_clk_register_divider(const char *name,
const char *parent_name, void __iomem *reg,
unsigned long flags, u8 clk_divider_flags, u8 shift, u8 width,
u8 frac_width, spinlock_t *lock);
@@ -258,47 +258,47 @@ struct tegra_clk_pll {
extern const struct clk_ops tegra_clk_pll_ops;
extern const struct clk_ops tegra_clk_plle_ops;
-struct clk *tegra_clk_register_pll(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_pll(const char *name, const char *parent_name,
void __iomem *clk_base, void __iomem *pmc,
unsigned long flags, struct tegra_clk_pll_params *pll_params,
spinlock_t *lock);
-struct clk *tegra_clk_register_plle(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_plle(const char *name, const char *parent_name,
void __iomem *clk_base, void __iomem *pmc,
unsigned long flags, struct tegra_clk_pll_params *pll_params,
spinlock_t *lock);
-struct clk *tegra_clk_register_pllxc(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_pllxc(const char *name, const char *parent_name,
void __iomem *clk_base, void __iomem *pmc,
unsigned long flags,
struct tegra_clk_pll_params *pll_params,
spinlock_t *lock);
-struct clk *tegra_clk_register_pllm(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_pllm(const char *name, const char *parent_name,
void __iomem *clk_base, void __iomem *pmc,
unsigned long flags,
struct tegra_clk_pll_params *pll_params,
spinlock_t *lock);
-struct clk *tegra_clk_register_pllc(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_pllc(const char *name, const char *parent_name,
void __iomem *clk_base, void __iomem *pmc,
unsigned long flags,
struct tegra_clk_pll_params *pll_params,
spinlock_t *lock);
-struct clk *tegra_clk_register_pllre(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_pllre(const char *name, const char *parent_name,
void __iomem *clk_base, void __iomem *pmc,
unsigned long flags,
struct tegra_clk_pll_params *pll_params,
spinlock_t *lock, unsigned long parent_rate);
-struct clk *tegra_clk_register_plle_tegra114(const char *name,
+struct clk_core *tegra_clk_register_plle_tegra114(const char *name,
const char *parent_name,
void __iomem *clk_base, unsigned long flags,
struct tegra_clk_pll_params *pll_params,
spinlock_t *lock);
-struct clk *tegra_clk_register_pllss(const char *name, const char *parent_name,
+struct clk_core *tegra_clk_register_pllss(const char *name, const char *parent_name,
void __iomem *clk_base, unsigned long flags,
struct tegra_clk_pll_params *pll_params,
spinlock_t *lock);
@@ -325,7 +325,7 @@ struct tegra_clk_pll_out {
#define to_clk_pll_out(_hw) container_of(_hw, struct tegra_clk_pll_out, hw)
extern const struct clk_ops tegra_clk_pll_out_ops;
-struct clk *tegra_clk_register_pll_out(const char *name,
+struct clk_core *tegra_clk_register_pll_out(const char *name,
const char *parent_name, void __iomem *reg, u8 enb_bit_idx,
u8 rst_bit_idx, unsigned long flags, u8 pll_div_flags,
spinlock_t *lock);
@@ -394,7 +394,7 @@ struct tegra_clk_periph_gate {
#define TEGRA_PERIPH_NO_GATE BIT(5)
extern const struct clk_ops tegra_clk_periph_gate_ops;
-struct clk *tegra_clk_register_periph_gate(const char *name,
+struct clk_core *tegra_clk_register_periph_gate(const char *name,
const char *parent_name, u8 gate_flags, void __iomem *clk_base,
unsigned long flags, int clk_num, int *enable_refcnt);
@@ -427,11 +427,11 @@ struct tegra_clk_periph {
#define TEGRA_CLK_PERIPH_MAGIC 0x18221223
extern const struct clk_ops tegra_clk_periph_ops;
-struct clk *tegra_clk_register_periph(const char *name,
+struct clk_core *tegra_clk_register_periph(const char *name,
const char **parent_names, int num_parents,
struct tegra_clk_periph *periph, void __iomem *clk_base,
u32 offset, unsigned long flags);
-struct clk *tegra_clk_register_periph_nodiv(const char *name,
+struct clk_core *tegra_clk_register_periph_nodiv(const char *name,
const char **parent_names, int num_parents,
struct tegra_clk_periph *periph, void __iomem *clk_base,
u32 offset);
@@ -540,7 +540,7 @@ struct tegra_clk_super_mux {
#define TEGRA_DIVIDER_2 BIT(0)
extern const struct clk_ops tegra_clk_super_ops;
-struct clk *tegra_clk_register_super_mux(const char *name,
+struct clk_core *tegra_clk_register_super_mux(const char *name,
const char **parent_names, u8 num_parents,
unsigned long flags, void __iomem *reg, u8 clk_super_flags,
u8 width, u8 pllx_index, u8 div2_index, spinlock_t *lock);
@@ -590,15 +590,15 @@ struct tegra_devclk {
};
void tegra_init_from_table(struct tegra_clk_init_table *tbl,
- struct clk *clks[], int clk_max);
+ struct clk_core *clks[], int clk_max);
void tegra_init_dup_clks(struct tegra_clk_duplicate *dup_list,
- struct clk *clks[], int clk_max);
+ struct clk_core *clks[], int clk_max);
struct tegra_clk_periph_regs *get_reg_bank(int clkid);
-struct clk **tegra_clk_init(void __iomem *clk_base, int num, int periph_banks);
+struct clk_core **tegra_clk_init(void __iomem *clk_base, int num, int periph_banks);
-struct clk **tegra_lookup_dt_id(int clk_id, struct tegra_clk *tegra_clk);
+struct clk_core **tegra_lookup_dt_id(int clk_id, struct tegra_clk *tegra_clk);
void tegra_add_of_provider(struct device_node *np);
void tegra_register_devclks(struct tegra_devclk *dev_clks, int num);
diff --git a/drivers/clk/ti/apll.c b/drivers/clk/ti/apll.c
index 72d9727..a162c21 100644
--- a/drivers/clk/ti/apll.c
+++ b/drivers/clk/ti/apll.c
@@ -135,10 +135,10 @@ static void __init omap_clk_register_apll(struct clk_hw *hw,
{
struct clk_hw_omap *clk_hw = to_clk_hw_omap(hw);
struct dpll_data *ad = clk_hw->dpll_data;
- struct clk *clk;
+ struct clk_core *clk;
- ad->clk_ref = of_clk_get(node, 0);
- ad->clk_bypass = of_clk_get(node, 1);
+ ad->clk_ref = of_clk_provider_get(node, 0);
+ ad->clk_bypass = of_clk_provider_get(node, 1);
if (IS_ERR(ad->clk_ref) || IS_ERR(ad->clk_bypass)) {
pr_debug("clk-ref or clk-bypass for %s not ready, retry\n",
@@ -332,7 +332,7 @@ static void __init of_omap2_apll_setup(struct device_node *node)
struct dpll_data *ad = NULL;
struct clk_hw_omap *clk_hw = NULL;
struct clk_init_data *init = NULL;
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name;
u32 val;
diff --git a/drivers/clk/ti/clk-2xxx.c b/drivers/clk/ti/clk-2xxx.c
index c808ab3..a48fe6f 100644
--- a/drivers/clk/ti/clk-2xxx.c
+++ b/drivers/clk/ti/clk-2xxx.c
@@ -237,10 +237,10 @@ static int __init omap2xxx_dt_clk_init(int soc_type)
ARRAY_SIZE(enable_init_clks));
pr_info("Clocking rate (Crystal/DPLL/MPU): %ld.%01ld/%ld/%ld MHz\n",
- (clk_get_rate(clk_get_sys(NULL, "sys_ck")) / 1000000),
- (clk_get_rate(clk_get_sys(NULL, "sys_ck")) / 100000) % 10,
- (clk_get_rate(clk_get_sys(NULL, "dpll_ck")) / 1000000),
- (clk_get_rate(clk_get_sys(NULL, "mpu_ck")) / 1000000));
+ (clk_provider_get_rate(clk_provider_get_sys(NULL, "sys_ck")) / 1000000),
+ (clk_provider_get_rate(clk_provider_get_sys(NULL, "sys_ck")) / 100000) % 10,
+ (clk_provider_get_rate(clk_provider_get_sys(NULL, "dpll_ck")) / 1000000),
+ (clk_provider_get_rate(clk_provider_get_sys(NULL, "mpu_ck")) / 1000000));
return 0;
}
diff --git a/drivers/clk/ti/clk-33xx.c b/drivers/clk/ti/clk-33xx.c
index 028b337..0988f1e 100644
--- a/drivers/clk/ti/clk-33xx.c
+++ b/drivers/clk/ti/clk-33xx.c
@@ -121,7 +121,7 @@ static const char *enable_init_clks[] = {
int __init am33xx_dt_clk_init(void)
{
- struct clk *clk1, *clk2;
+ struct clk_core *clk1, *clk2;
ti_dt_clocks_register(am33xx_clks);
@@ -139,12 +139,12 @@ int __init am33xx_dt_clk_init(void)
* oscillator clock.
*/
- clk1 = clk_get_sys(NULL, "sys_clkin_ck");
- clk2 = clk_get_sys(NULL, "timer3_fck");
- clk_set_parent(clk2, clk1);
+ clk1 = clk_provider_get_sys(NULL, "sys_clkin_ck");
+ clk2 = clk_provider_get_sys(NULL, "timer3_fck");
+ clk_provider_set_parent(clk2, clk1);
- clk2 = clk_get_sys(NULL, "timer6_fck");
- clk_set_parent(clk2, clk1);
+ clk2 = clk_provider_get_sys(NULL, "timer6_fck");
+ clk_provider_set_parent(clk2, clk1);
/*
* The On-Chip 32K RC Osc clock is not an accurate clock-source as per
* the design/spec, so as a result, for example, timer which supposed
@@ -152,9 +152,9 @@ int __init am33xx_dt_clk_init(void)
* not expected by any use-case, so change WDT1 clock source to PRCM
* 32KHz clock.
*/
- clk1 = clk_get_sys(NULL, "wdt1_fck");
- clk2 = clk_get_sys(NULL, "clkdiv32k_ick");
- clk_set_parent(clk1, clk2);
+ clk1 = clk_provider_get_sys(NULL, "wdt1_fck");
+ clk2 = clk_provider_get_sys(NULL, "clkdiv32k_ick");
+ clk_provider_set_parent(clk1, clk2);
return 0;
}
diff --git a/drivers/clk/ti/clk-3xxx.c b/drivers/clk/ti/clk-3xxx.c
index 0d1750a..58ef20e 100644
--- a/drivers/clk/ti/clk-3xxx.c
+++ b/drivers/clk/ti/clk-3xxx.c
@@ -365,10 +365,10 @@ static int __init omap3xxx_dt_clk_init(int soc_type)
ARRAY_SIZE(enable_init_clks));
pr_info("Clocking rate (Crystal/Core/MPU): %ld.%01ld/%ld/%ld MHz\n",
- (clk_get_rate(clk_get_sys(NULL, "osc_sys_ck")) / 1000000),
- (clk_get_rate(clk_get_sys(NULL, "osc_sys_ck")) / 100000) % 10,
- (clk_get_rate(clk_get_sys(NULL, "core_ck")) / 1000000),
- (clk_get_rate(clk_get_sys(NULL, "arm_fck")) / 1000000));
+ (clk_provider_get_rate(clk_provider_get_sys(NULL, "osc_sys_ck")) / 1000000),
+ (clk_provider_get_rate(clk_provider_get_sys(NULL, "osc_sys_ck")) / 100000) % 10,
+ (clk_provider_get_rate(clk_provider_get_sys(NULL, "core_ck")) / 1000000),
+ (clk_provider_get_rate(clk_provider_get_sys(NULL, "arm_fck")) / 1000000));
if (soc_type != OMAP3_SOC_TI81XX && soc_type != OMAP3_SOC_OMAP3430_ES1)
omap3_clk_lock_dpll5();
diff --git a/drivers/clk/ti/clk-43xx.c b/drivers/clk/ti/clk-43xx.c
index 3795fce..1277452 100644
--- a/drivers/clk/ti/clk-43xx.c
+++ b/drivers/clk/ti/clk-43xx.c
@@ -116,7 +116,7 @@ static struct ti_dt_clk am43xx_clks[] = {
int __init am43xx_dt_clk_init(void)
{
- struct clk *clk1, *clk2;
+ struct clk_core *clk1, *clk2;
ti_dt_clocks_register(am43xx_clks);
@@ -132,9 +132,9 @@ int __init am43xx_dt_clk_init(void)
* By selecting dpll_core_m5_ck as the clocksource fixes this issue.
* In AM335x dpll_core_m5_ck is the default clocksource.
*/
- clk1 = clk_get_sys(NULL, "cpsw_cpts_rft_clk");
- clk2 = clk_get_sys(NULL, "dpll_core_m5_ck");
- clk_set_parent(clk1, clk2);
+ clk1 = clk_provider_get_sys(NULL, "cpsw_cpts_rft_clk");
+ clk2 = clk_provider_get_sys(NULL, "dpll_core_m5_ck");
+ clk_provider_set_parent(clk1, clk2);
return 0;
}
diff --git a/drivers/clk/ti/clk-44xx.c b/drivers/clk/ti/clk-44xx.c
index 02517a8..1adc399 100644
--- a/drivers/clk/ti/clk-44xx.c
+++ b/drivers/clk/ti/clk-44xx.c
@@ -281,7 +281,7 @@ static struct ti_dt_clk omap44xx_clks[] = {
int __init omap4xxx_dt_clk_init(void)
{
int rc;
- struct clk *abe_dpll_ref, *abe_dpll, *sys_32k_ck, *usb_dpll;
+ struct clk_core *abe_dpll_ref, *abe_dpll, *sys_32k_ck, *usb_dpll;
ti_dt_clocks_register(omap44xx_clks);
@@ -291,8 +291,8 @@ int __init omap4xxx_dt_clk_init(void)
* Lock USB DPLL on OMAP4 devices so that the L3INIT power
* domain can transition to retention state when not in use.
*/
- usb_dpll = clk_get_sys(NULL, "dpll_usb_ck");
- rc = clk_set_rate(usb_dpll, OMAP4_DPLL_USB_DEFFREQ);
+ usb_dpll = clk_provider_get_sys(NULL, "dpll_usb_ck");
+ rc = clk_provider_set_rate(usb_dpll, OMAP4_DPLL_USB_DEFFREQ);
if (rc)
pr_err("%s: failed to configure USB DPLL!\n", __func__);
@@ -302,12 +302,12 @@ int __init omap4xxx_dt_clk_init(void)
* locking the ABE DPLL on boot.
* Lock the ABE DPLL in any case to avoid issues with audio.
*/
- abe_dpll_ref = clk_get_sys(NULL, "abe_dpll_refclk_mux_ck");
- sys_32k_ck = clk_get_sys(NULL, "sys_32k_ck");
- rc = clk_set_parent(abe_dpll_ref, sys_32k_ck);
- abe_dpll = clk_get_sys(NULL, "dpll_abe_ck");
+ abe_dpll_ref = clk_provider_get_sys(NULL, "abe_dpll_refclk_mux_ck");
+ sys_32k_ck = clk_provider_get_sys(NULL, "sys_32k_ck");
+ rc = clk_provider_set_parent(abe_dpll_ref, sys_32k_ck);
+ abe_dpll = clk_provider_get_sys(NULL, "dpll_abe_ck");
if (!rc)
- rc = clk_set_rate(abe_dpll, OMAP4_DPLL_ABE_DEFFREQ);
+ rc = clk_provider_set_rate(abe_dpll, OMAP4_DPLL_ABE_DEFFREQ);
if (rc)
pr_err("%s: failed to configure ABE DPLL!\n", __func__);
diff --git a/drivers/clk/ti/clk-54xx.c b/drivers/clk/ti/clk-54xx.c
index 5e18399..5b603b5 100644
--- a/drivers/clk/ti/clk-54xx.c
+++ b/drivers/clk/ti/clk-54xx.c
@@ -225,34 +225,35 @@ static struct ti_dt_clk omap54xx_clks[] = {
int __init omap5xxx_dt_clk_init(void)
{
int rc;
- struct clk *abe_dpll_ref, *abe_dpll, *sys_32k_ck, *usb_dpll;
+ struct clk_core *abe_dpll_ref, *abe_dpll, *sys_32k_ck, *usb_dpll;
ti_dt_clocks_register(omap54xx_clks);
omap2_clk_disable_autoidle_all();
- abe_dpll_ref = clk_get_sys(NULL, "abe_dpll_clk_mux");
- sys_32k_ck = clk_get_sys(NULL, "sys_32k_ck");
- rc = clk_set_parent(abe_dpll_ref, sys_32k_ck);
- abe_dpll = clk_get_sys(NULL, "dpll_abe_ck");
+ abe_dpll_ref = clk_provider_get_sys(NULL, "abe_dpll_clk_mux");
+ sys_32k_ck = clk_provider_get_sys(NULL, "sys_32k_ck");
+ rc = clk_provider_set_parent(abe_dpll_ref, sys_32k_ck);
+ abe_dpll = clk_provider_get_sys(NULL, "dpll_abe_ck");
if (!rc)
- rc = clk_set_rate(abe_dpll, OMAP5_DPLL_ABE_DEFFREQ);
+ rc = clk_provider_set_rate(abe_dpll, OMAP5_DPLL_ABE_DEFFREQ);
if (rc)
pr_err("%s: failed to configure ABE DPLL!\n", __func__);
- abe_dpll = clk_get_sys(NULL, "dpll_abe_m2x2_ck");
+ abe_dpll = clk_provider_get_sys(NULL, "dpll_abe_m2x2_ck");
if (!rc)
- rc = clk_set_rate(abe_dpll, OMAP5_DPLL_ABE_DEFFREQ * 2);
+ rc = clk_provider_set_rate(abe_dpll,
+ OMAP5_DPLL_ABE_DEFFREQ * 2);
if (rc)
pr_err("%s: failed to configure ABE m2x2 DPLL!\n", __func__);
- usb_dpll = clk_get_sys(NULL, "dpll_usb_ck");
- rc = clk_set_rate(usb_dpll, OMAP5_DPLL_USB_DEFFREQ);
+ usb_dpll = clk_provider_get_sys(NULL, "dpll_usb_ck");
+ rc = clk_provider_set_rate(usb_dpll, OMAP5_DPLL_USB_DEFFREQ);
if (rc)
pr_err("%s: failed to configure USB DPLL!\n", __func__);
- usb_dpll = clk_get_sys(NULL, "dpll_usb_m2_ck");
- rc = clk_set_rate(usb_dpll, OMAP5_DPLL_USB_DEFFREQ/2);
+ usb_dpll = clk_provider_get_sys(NULL, "dpll_usb_m2_ck");
+ rc = clk_provider_set_rate(usb_dpll, OMAP5_DPLL_USB_DEFFREQ / 2);
if (rc)
pr_err("%s: failed to set USB_DPLL M2 OUT\n", __func__);
diff --git a/drivers/clk/ti/clk-7xx.c b/drivers/clk/ti/clk-7xx.c
index 62ac8f6..9dba0bb 100644
--- a/drivers/clk/ti/clk-7xx.c
+++ b/drivers/clk/ti/clk-7xx.c
@@ -307,39 +307,39 @@ static struct ti_dt_clk dra7xx_clks[] = {
int __init dra7xx_dt_clk_init(void)
{
int rc;
- struct clk *abe_dpll_mux, *sys_clkin2, *dpll_ck;
+ struct clk_core *abe_dpll_mux, *sys_clkin2, *dpll_ck;
ti_dt_clocks_register(dra7xx_clks);
omap2_clk_disable_autoidle_all();
- abe_dpll_mux = clk_get_sys(NULL, "abe_dpll_sys_clk_mux");
- sys_clkin2 = clk_get_sys(NULL, "sys_clkin2");
- dpll_ck = clk_get_sys(NULL, "dpll_abe_ck");
+ abe_dpll_mux = clk_provider_get_sys(NULL, "abe_dpll_sys_clk_mux");
+ sys_clkin2 = clk_provider_get_sys(NULL, "sys_clkin2");
+ dpll_ck = clk_provider_get_sys(NULL, "dpll_abe_ck");
- rc = clk_set_parent(abe_dpll_mux, sys_clkin2);
+ rc = clk_provider_set_parent(abe_dpll_mux, sys_clkin2);
if (!rc)
- rc = clk_set_rate(dpll_ck, DRA7_DPLL_ABE_DEFFREQ);
+ rc = clk_provider_set_rate(dpll_ck, DRA7_DPLL_ABE_DEFFREQ);
if (rc)
pr_err("%s: failed to configure ABE DPLL!\n", __func__);
- dpll_ck = clk_get_sys(NULL, "dpll_abe_m2x2_ck");
- rc = clk_set_rate(dpll_ck, DRA7_DPLL_ABE_DEFFREQ * 2);
+ dpll_ck = clk_provider_get_sys(NULL, "dpll_abe_m2x2_ck");
+ rc = clk_provider_set_rate(dpll_ck, DRA7_DPLL_ABE_DEFFREQ * 2);
if (rc)
pr_err("%s: failed to configure ABE DPLL m2x2!\n", __func__);
- dpll_ck = clk_get_sys(NULL, "dpll_gmac_ck");
- rc = clk_set_rate(dpll_ck, DRA7_DPLL_GMAC_DEFFREQ);
+ dpll_ck = clk_provider_get_sys(NULL, "dpll_gmac_ck");
+ rc = clk_provider_set_rate(dpll_ck, DRA7_DPLL_GMAC_DEFFREQ);
if (rc)
pr_err("%s: failed to configure GMAC DPLL!\n", __func__);
- dpll_ck = clk_get_sys(NULL, "dpll_usb_ck");
- rc = clk_set_rate(dpll_ck, DRA7_DPLL_USB_DEFFREQ);
+ dpll_ck = clk_provider_get_sys(NULL, "dpll_usb_ck");
+ rc = clk_provider_set_rate(dpll_ck, DRA7_DPLL_USB_DEFFREQ);
if (rc)
pr_err("%s: failed to configure USB DPLL!\n", __func__);
- dpll_ck = clk_get_sys(NULL, "dpll_usb_m2_ck");
- rc = clk_set_rate(dpll_ck, DRA7_DPLL_USB_DEFFREQ/2);
+ dpll_ck = clk_provider_get_sys(NULL, "dpll_usb_m2_ck");
+ rc = clk_provider_set_rate(dpll_ck, DRA7_DPLL_USB_DEFFREQ / 2);
if (rc)
pr_err("%s: failed to set USB_DPLL M2 OUT\n", __func__);
diff --git a/drivers/clk/ti/clk-dra7-atl.c b/drivers/clk/ti/clk-dra7-atl.c
index 4a65b41..029a0d3 100644
--- a/drivers/clk/ti/clk-dra7-atl.c
+++ b/drivers/clk/ti/clk-dra7-atl.c
@@ -40,7 +40,7 @@
struct dra7_atl_clock_info;
struct dra7_atl_desc {
- struct clk *clk;
+ struct clk_core *clk;
struct clk_hw hw;
struct dra7_atl_clock_info *cinfo;
int id;
@@ -165,7 +165,7 @@ static void __init of_dra7_atl_clock_setup(struct device_node *node)
struct dra7_atl_desc *clk_hw = NULL;
struct clk_init_data init = { 0 };
const char **parent_names = NULL;
- struct clk *clk;
+ struct clk_core *clk;
clk_hw = kzalloc(sizeof(*clk_hw), GFP_KERNEL);
if (!clk_hw) {
@@ -233,7 +233,7 @@ static int of_dra7_atl_clk_probe(struct platform_device *pdev)
char prop[5];
struct dra7_atl_desc *cdesc;
struct of_phandle_args clkspec;
- struct clk *clk;
+ struct clk_core *clk;
int rc;
rc = of_parse_phandle_with_args(node, "ti,provided-clocks",
diff --git a/drivers/clk/ti/clk.c b/drivers/clk/ti/clk.c
index b1a6f71..d88a70d0 100644
--- a/drivers/clk/ti/clk.c
+++ b/drivers/clk/ti/clk.c
@@ -41,7 +41,7 @@ void __init ti_dt_clocks_register(struct ti_dt_clk oclks[])
{
struct ti_dt_clk *c;
struct device_node *node;
- struct clk *clk;
+ struct clk_core *clk;
struct of_phandle_args clkspec;
for (c = oclks; c->node_name != NULL; c++) {
diff --git a/drivers/clk/ti/clockdomain.c b/drivers/clk/ti/clockdomain.c
index f1e0038..6bc75d8 100644
--- a/drivers/clk/ti/clockdomain.c
+++ b/drivers/clk/ti/clockdomain.c
@@ -26,7 +26,7 @@
static void __init of_ti_clockdomain_setup(struct device_node *node)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_hw *clk_hw;
const char *clkdm_name = node->name;
int i;
@@ -35,7 +35,7 @@ static void __init of_ti_clockdomain_setup(struct device_node *node)
num_clks = of_count_phandle_with_args(node, "clocks", "#clock-cells");
for (i = 0; i < num_clks; i++) {
- clk = of_clk_get(node, i);
+ clk = of_clk_provider_get(node, i);
if (__clk_get_flags(clk) & CLK_IS_BASIC) {
pr_warn("can't setup clkdm for basic clk %s\n",
__clk_get_name(clk));
diff --git a/drivers/clk/ti/composite.c b/drivers/clk/ti/composite.c
index 19d8980..2cbee34 100644
--- a/drivers/clk/ti/composite.c
+++ b/drivers/clk/ti/composite.c
@@ -119,7 +119,7 @@ static inline struct clk_hw *_get_hw(struct clk_hw_omap_comp *clk, int idx)
static void __init ti_clk_register_composite(struct clk_hw *hw,
struct device_node *node)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_hw_omap_comp *cclk = to_clk_hw_comp(hw);
struct component_clk *comp;
int num_parents = 0;
diff --git a/drivers/clk/ti/divider.c b/drivers/clk/ti/divider.c
index e6aa10d..1c41515 100644
--- a/drivers/clk/ti/divider.c
+++ b/drivers/clk/ti/divider.c
@@ -246,7 +246,7 @@ const struct clk_ops ti_clk_divider_ops = {
.set_rate = ti_clk_divider_set_rate,
};
-static struct clk *_register_divider(struct device *dev, const char *name,
+static struct clk_core *_register_divider(struct device *dev, const char *name,
const char *parent_name,
unsigned long flags, void __iomem *reg,
u8 shift, u8 width, u8 clk_divider_flags,
@@ -254,7 +254,7 @@ static struct clk *_register_divider(struct device *dev, const char *name,
spinlock_t *lock)
{
struct clk_divider *div;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
if (clk_divider_flags & CLK_DIVIDER_HIWORD_MASK) {
@@ -434,7 +434,7 @@ static int __init ti_clk_divider_populate(struct device_node *node,
*/
static void __init of_ti_divider_clk_setup(struct device_node *node)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *parent_name;
void __iomem *reg;
u8 clk_divider_flags = 0;
diff --git a/drivers/clk/ti/dpll.c b/drivers/clk/ti/dpll.c
index 79791e1..e1f74cc 100644
--- a/drivers/clk/ti/dpll.c
+++ b/drivers/clk/ti/dpll.c
@@ -128,10 +128,10 @@ static void __init ti_clk_register_dpll(struct clk_hw *hw,
{
struct clk_hw_omap *clk_hw = to_clk_hw_omap(hw);
struct dpll_data *dd = clk_hw->dpll_data;
- struct clk *clk;
+ struct clk_core *clk;
- dd->clk_ref = of_clk_get(node, 0);
- dd->clk_bypass = of_clk_get(node, 1);
+ dd->clk_ref = of_clk_provider_get(node, 0);
+ dd->clk_bypass = of_clk_provider_get(node, 1);
if (IS_ERR(dd->clk_ref) || IS_ERR(dd->clk_bypass)) {
pr_debug("clk-ref or clk-bypass missing for %s, retry later\n",
@@ -175,7 +175,7 @@ static void ti_clk_register_dpll_x2(struct device_node *node,
const struct clk_ops *ops,
const struct clk_hw_omap_ops *hw_ops)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init = { NULL };
struct clk_hw_omap *clk_hw;
const char *name = node->name;
diff --git a/drivers/clk/ti/fixed-factor.c b/drivers/clk/ti/fixed-factor.c
index c2c8a28..2aa2701 100644
--- a/drivers/clk/ti/fixed-factor.c
+++ b/drivers/clk/ti/fixed-factor.c
@@ -33,7 +33,7 @@
*/
static void __init of_ti_fixed_factor_clk_setup(struct device_node *node)
{
- struct clk *clk;
+ struct clk_core *clk;
const char *clk_name = node->name;
const char *parent_name;
u32 div, mult;
diff --git a/drivers/clk/ti/gate.c b/drivers/clk/ti/gate.c
index b326d27..dd1b813 100644
--- a/drivers/clk/ti/gate.c
+++ b/drivers/clk/ti/gate.c
@@ -94,7 +94,7 @@ static void __init _of_ti_gate_clk_setup(struct device_node *node,
const struct clk_ops *ops,
const struct clk_hw_omap_ops *hw_ops)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init = { NULL };
struct clk_hw_omap *clk_hw;
const char *clk_name = node->name;
diff --git a/drivers/clk/ti/interface.c b/drivers/clk/ti/interface.c
index 9c3e8c4..e2f2bc0 100644
--- a/drivers/clk/ti/interface.c
+++ b/drivers/clk/ti/interface.c
@@ -34,7 +34,7 @@ static const struct clk_ops ti_interface_clk_ops = {
static void __init _of_ti_interface_clk_setup(struct device_node *node,
const struct clk_hw_omap_ops *ops)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init = { NULL };
struct clk_hw_omap *clk_hw;
const char *parent_name;
diff --git a/drivers/clk/ti/mux.c b/drivers/clk/ti/mux.c
index e9d650e..7456198 100644
--- a/drivers/clk/ti/mux.c
+++ b/drivers/clk/ti/mux.c
@@ -104,14 +104,14 @@ const struct clk_ops ti_clk_mux_ops = {
.determine_rate = __clk_mux_determine_rate,
};
-static struct clk *_register_mux(struct device *dev, const char *name,
+static struct clk_core *_register_mux(struct device *dev, const char *name,
const char **parent_names, u8 num_parents,
unsigned long flags, void __iomem *reg,
u8 shift, u32 mask, u8 clk_mux_flags,
u32 *table, spinlock_t *lock)
{
struct clk_mux *mux;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
/* allocate the mux */
@@ -152,7 +152,7 @@ static struct clk *_register_mux(struct device *dev, const char *name,
*/
static void of_mux_clk_setup(struct device_node *node)
{
- struct clk *clk;
+ struct clk_core *clk;
void __iomem *reg;
int num_parents;
const char **parent_names;
diff --git a/drivers/clk/ux500/abx500-clk.c b/drivers/clk/ux500/abx500-clk.c
index e7bd62c..f27be78 100644
--- a/drivers/clk/ux500/abx500-clk.c
+++ b/drivers/clk/ux500/abx500-clk.c
@@ -13,7 +13,6 @@
#include <linux/platform_device.h>
#include <linux/mfd/abx500/ab8500.h>
#include <linux/mfd/abx500/ab8500-sysctrl.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/mfd/dbx500-prcmu.h>
@@ -23,7 +22,7 @@
static int ab8500_reg_clks(struct device *dev)
{
int ret;
- struct clk *clk;
+ struct clk_core *clk;
const char *intclk_parents[] = {"ab8500_sysclk", "ulpclk"};
u16 intclk_reg_sel[] = {0 , AB8500_SYSULPCLKCTRL1};
diff --git a/drivers/clk/ux500/clk-prcc.c b/drivers/clk/ux500/clk-prcc.c
index bd4769a..7eb055f 100644
--- a/drivers/clk/ux500/clk-prcc.c
+++ b/drivers/clk/ux500/clk-prcc.c
@@ -92,7 +92,7 @@ static struct clk_ops clk_prcc_kclk_ops = {
.is_enabled = clk_prcc_is_enabled,
};
-static struct clk *clk_reg_prcc(const char *name,
+static struct clk_core *clk_reg_prcc(const char *name,
const char *parent_name,
resource_size_t phy_base,
u32 cg_sel,
@@ -101,7 +101,7 @@ static struct clk *clk_reg_prcc(const char *name,
{
struct clk_prcc *clk;
struct clk_init_data clk_prcc_init;
- struct clk *clk_reg;
+ struct clk_core *clk_reg;
if (!name) {
pr_err("clk_prcc: %s invalid arguments passed\n", __func__);
@@ -142,7 +142,7 @@ free_clk:
return ERR_PTR(-ENOMEM);
}
-struct clk *clk_reg_prcc_pclk(const char *name,
+struct clk_core *clk_reg_prcc_pclk(const char *name,
const char *parent_name,
resource_size_t phy_base,
u32 cg_sel,
@@ -152,7 +152,7 @@ struct clk *clk_reg_prcc_pclk(const char *name,
&clk_prcc_pclk_ops);
}
-struct clk *clk_reg_prcc_kclk(const char *name,
+struct clk_core *clk_reg_prcc_kclk(const char *name,
const char *parent_name,
resource_size_t phy_base,
u32 cg_sel,
diff --git a/drivers/clk/ux500/clk-prcmu.c b/drivers/clk/ux500/clk-prcmu.c
index e2d63bc..bac54c9 100644
--- a/drivers/clk/ux500/clk-prcmu.c
+++ b/drivers/clk/ux500/clk-prcmu.c
@@ -243,7 +243,7 @@ static struct clk_ops clk_prcmu_opp_volt_scalable_ops = {
.set_rate = clk_prcmu_set_rate,
};
-static struct clk *clk_reg_prcmu(const char *name,
+static struct clk_core *clk_reg_prcmu(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long rate,
@@ -252,7 +252,7 @@ static struct clk *clk_reg_prcmu(const char *name,
{
struct clk_prcmu *clk;
struct clk_init_data clk_prcmu_init;
- struct clk *clk_reg;
+ struct clk_core *clk_reg;
if (!name) {
pr_err("clk_prcmu: %s invalid arguments passed\n", __func__);
@@ -292,7 +292,7 @@ free_clk:
return ERR_PTR(-ENOMEM);
}
-struct clk *clk_reg_prcmu_scalable(const char *name,
+struct clk_core *clk_reg_prcmu_scalable(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long rate,
@@ -302,7 +302,7 @@ struct clk *clk_reg_prcmu_scalable(const char *name,
&clk_prcmu_scalable_ops);
}
-struct clk *clk_reg_prcmu_gate(const char *name,
+struct clk_core *clk_reg_prcmu_gate(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long flags)
@@ -311,7 +311,7 @@ struct clk *clk_reg_prcmu_gate(const char *name,
&clk_prcmu_gate_ops);
}
-struct clk *clk_reg_prcmu_scalable_rate(const char *name,
+struct clk_core *clk_reg_prcmu_scalable_rate(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long rate,
@@ -321,7 +321,7 @@ struct clk *clk_reg_prcmu_scalable_rate(const char *name,
&clk_prcmu_scalable_rate_ops);
}
-struct clk *clk_reg_prcmu_rate(const char *name,
+struct clk_core *clk_reg_prcmu_rate(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long flags)
@@ -330,7 +330,7 @@ struct clk *clk_reg_prcmu_rate(const char *name,
&clk_prcmu_rate_ops);
}
-struct clk *clk_reg_prcmu_opp_gate(const char *name,
+struct clk_core *clk_reg_prcmu_opp_gate(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long flags)
@@ -339,7 +339,7 @@ struct clk *clk_reg_prcmu_opp_gate(const char *name,
&clk_prcmu_opp_gate_ops);
}
-struct clk *clk_reg_prcmu_opp_volt_scalable(const char *name,
+struct clk_core *clk_reg_prcmu_opp_volt_scalable(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long rate,
diff --git a/drivers/clk/ux500/clk-sysctrl.c b/drivers/clk/ux500/clk-sysctrl.c
index e364c9d..dc6608a 100644
--- a/drivers/clk/ux500/clk-sysctrl.c
+++ b/drivers/clk/ux500/clk-sysctrl.c
@@ -114,7 +114,7 @@ static struct clk_ops clk_sysctrl_set_parent_ops = {
.get_parent = clk_sysctrl_get_parent,
};
-static struct clk *clk_reg_sysctrl(struct device *dev,
+static struct clk_core *clk_reg_sysctrl(struct device *dev,
const char *name,
const char **parent_names,
u8 num_parents,
@@ -128,7 +128,7 @@ static struct clk *clk_reg_sysctrl(struct device *dev,
{
struct clk_sysctrl *clk;
struct clk_init_data clk_sysctrl_init;
- struct clk *clk_reg;
+ struct clk_core *clk_reg;
int i;
if (!dev)
@@ -176,7 +176,7 @@ static struct clk *clk_reg_sysctrl(struct device *dev,
return clk_reg;
}
-struct clk *clk_reg_sysctrl_gate(struct device *dev,
+struct clk_core *clk_reg_sysctrl_gate(struct device *dev,
const char *name,
const char *parent_name,
u16 reg_sel,
@@ -193,7 +193,7 @@ struct clk *clk_reg_sysctrl_gate(struct device *dev,
flags, &clk_sysctrl_gate_ops);
}
-struct clk *clk_reg_sysctrl_gate_fixed_rate(struct device *dev,
+struct clk_core *clk_reg_sysctrl_gate_fixed_rate(struct device *dev,
const char *name,
const char *parent_name,
u16 reg_sel,
@@ -212,7 +212,7 @@ struct clk *clk_reg_sysctrl_gate_fixed_rate(struct device *dev,
&clk_sysctrl_gate_fixed_rate_ops);
}
-struct clk *clk_reg_sysctrl_set_parent(struct device *dev,
+struct clk_core *clk_reg_sysctrl_set_parent(struct device *dev,
const char *name,
const char **parent_names,
u8 num_parents,
diff --git a/drivers/clk/ux500/clk.h b/drivers/clk/ux500/clk.h
index a2bb92d..acb50f8 100644
--- a/drivers/clk/ux500/clk.h
+++ b/drivers/clk/ux500/clk.h
@@ -10,56 +10,55 @@
#ifndef __UX500_CLK_H
#define __UX500_CLK_H
-#include <linux/clk.h>
#include <linux/device.h>
#include <linux/types.h>
-struct clk *clk_reg_prcc_pclk(const char *name,
+struct clk_core *clk_reg_prcc_pclk(const char *name,
const char *parent_name,
resource_size_t phy_base,
u32 cg_sel,
unsigned long flags);
-struct clk *clk_reg_prcc_kclk(const char *name,
+struct clk_core *clk_reg_prcc_kclk(const char *name,
const char *parent_name,
resource_size_t phy_base,
u32 cg_sel,
unsigned long flags);
-struct clk *clk_reg_prcmu_scalable(const char *name,
+struct clk_core *clk_reg_prcmu_scalable(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long rate,
unsigned long flags);
-struct clk *clk_reg_prcmu_gate(const char *name,
+struct clk_core *clk_reg_prcmu_gate(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long flags);
-struct clk *clk_reg_prcmu_scalable_rate(const char *name,
+struct clk_core *clk_reg_prcmu_scalable_rate(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long rate,
unsigned long flags);
-struct clk *clk_reg_prcmu_rate(const char *name,
+struct clk_core *clk_reg_prcmu_rate(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long flags);
-struct clk *clk_reg_prcmu_opp_gate(const char *name,
+struct clk_core *clk_reg_prcmu_opp_gate(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long flags);
-struct clk *clk_reg_prcmu_opp_volt_scalable(const char *name,
+struct clk_core *clk_reg_prcmu_opp_volt_scalable(const char *name,
const char *parent_name,
u8 cg_sel,
unsigned long rate,
unsigned long flags);
-struct clk *clk_reg_sysctrl_gate(struct device *dev,
+struct clk_core *clk_reg_sysctrl_gate(struct device *dev,
const char *name,
const char *parent_name,
u16 reg_sel,
@@ -68,7 +67,7 @@ struct clk *clk_reg_sysctrl_gate(struct device *dev,
unsigned long enable_delay_us,
unsigned long flags);
-struct clk *clk_reg_sysctrl_gate_fixed_rate(struct device *dev,
+struct clk_core *clk_reg_sysctrl_gate_fixed_rate(struct device *dev,
const char *name,
const char *parent_name,
u16 reg_sel,
@@ -78,7 +77,7 @@ struct clk *clk_reg_sysctrl_gate_fixed_rate(struct device *dev,
unsigned long enable_delay_us,
unsigned long flags);
-struct clk *clk_reg_sysctrl_set_parent(struct device *dev,
+struct clk_core *clk_reg_sysctrl_set_parent(struct device *dev,
const char *name,
const char **parent_names,
u8 num_parents,
diff --git a/drivers/clk/ux500/u8500_clk.c b/drivers/clk/ux500/u8500_clk.c
index 80069c3..708589f 100644
--- a/drivers/clk/ux500/u8500_clk.c
+++ b/drivers/clk/ux500/u8500_clk.c
@@ -7,7 +7,6 @@
* License terms: GNU General Public License (GPL) version 2
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/mfd/dbx500-prcmu.h>
@@ -19,7 +18,7 @@ void u8500_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
{
struct prcmu_fw_version *fw_version;
const char *sgaclk_parent = NULL;
- struct clk *clk;
+ struct clk_core *clk;
/* Clock sources */
clk = clk_reg_prcmu_gate("soc0_pll", NULL, PRCMU_PLLSOC0,
diff --git a/drivers/clk/ux500/u8500_of_clk.c b/drivers/clk/ux500/u8500_of_clk.c
index 7b55ef8..61efb85 100644
--- a/drivers/clk/ux500/u8500_of_clk.c
+++ b/drivers/clk/ux500/u8500_of_clk.c
@@ -8,7 +8,6 @@
*/
#include <linux/of.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/mfd/dbx500-prcmu.h>
@@ -18,9 +17,9 @@
#define PRCC_NUM_PERIPH_CLUSTERS 6
#define PRCC_PERIPHS_PER_CLUSTER 32
-static struct clk *prcmu_clk[PRCMU_NUM_CLKS];
-static struct clk *prcc_pclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) * PRCC_PERIPHS_PER_CLUSTER];
-static struct clk *prcc_kclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) * PRCC_PERIPHS_PER_CLUSTER];
+static struct clk_core *prcmu_clk[PRCMU_NUM_CLKS];
+static struct clk_core *prcc_pclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) * PRCC_PERIPHS_PER_CLUSTER];
+static struct clk_core *prcc_kclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) * PRCC_PERIPHS_PER_CLUSTER];
#define PRCC_SHOW(clk, base, bit) \
clk[(base * PRCC_PERIPHS_PER_CLUSTER) + bit]
@@ -29,10 +28,10 @@ static struct clk *prcc_kclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) * PRCC_PERIPHS_PER_C
#define PRCC_KCLK_STORE(clk, base, bit) \
prcc_kclk[(base * PRCC_PERIPHS_PER_CLUSTER) + bit] = clk
-static struct clk *ux500_twocell_get(struct of_phandle_args *clkspec,
+static struct clk_core *ux500_twocell_get(struct of_phandle_args *clkspec,
void *data)
{
- struct clk **clk_data = data;
+ struct clk_core **clk_data = data;
unsigned int base, bit;
if (clkspec->args_count != 2)
@@ -61,7 +60,7 @@ void u8500_of_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
struct device_node *np = NULL;
struct device_node *child = NULL;
const char *sgaclk_parent = NULL;
- struct clk *clk, *rtc_clk, *twd_clk;
+ struct clk_core *clk, *rtc_clk, *twd_clk;
if (of_have_populated_dt())
np = of_find_matching_node(NULL, u8500_clk_of_match);
diff --git a/drivers/clk/ux500/u8540_clk.c b/drivers/clk/ux500/u8540_clk.c
index 20c8add..a508845 100644
--- a/drivers/clk/ux500/u8540_clk.c
+++ b/drivers/clk/ux500/u8540_clk.c
@@ -7,7 +7,6 @@
* License terms: GNU General Public License (GPL) version 2
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/mfd/dbx500-prcmu.h>
@@ -17,7 +16,7 @@
void u8540_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
u32 clkrst5_base, u32 clkrst6_base)
{
- struct clk *clk;
+ struct clk_core *clk;
/* Clock sources. */
/* Fixed ClockGen */
diff --git a/drivers/clk/ux500/u9540_clk.c b/drivers/clk/ux500/u9540_clk.c
index 4479478..89055ae 100644
--- a/drivers/clk/ux500/u9540_clk.c
+++ b/drivers/clk/ux500/u9540_clk.c
@@ -7,7 +7,6 @@
* License terms: GNU General Public License (GPL) version 2
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/mfd/dbx500-prcmu.h>
diff --git a/drivers/clk/versatile/clk-icst.c b/drivers/clk/versatile/clk-icst.c
index bc96f10..d5719e0 100644
--- a/drivers/clk/versatile/clk-icst.c
+++ b/drivers/clk/versatile/clk-icst.c
@@ -13,7 +13,6 @@
* ICST clock code from the ARM tree should probably be merged into this
* file.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/err.h>
#include <linux/clk-provider.h>
@@ -121,13 +120,13 @@ static const struct clk_ops icst_ops = {
.set_rate = icst_set_rate,
};
-struct clk *icst_clk_register(struct device *dev,
+struct clk_core *icst_clk_register(struct device *dev,
const struct clk_icst_desc *desc,
const char *name,
const char *parent_name,
void __iomem *base)
{
- struct clk *clk;
+ struct clk_core *clk;
struct clk_icst *icst;
struct clk_init_data init;
struct icst_params *pclone;
diff --git a/drivers/clk/versatile/clk-icst.h b/drivers/clk/versatile/clk-icst.h
index 04e6f0a..ede867b 100644
--- a/drivers/clk/versatile/clk-icst.h
+++ b/drivers/clk/versatile/clk-icst.h
@@ -13,7 +13,7 @@ struct clk_icst_desc {
u32 lock_offset;
};
-struct clk *icst_clk_register(struct device *dev,
+struct clk_core *icst_clk_register(struct device *dev,
const struct clk_icst_desc *desc,
const char *name,
const char *parent_name,
diff --git a/drivers/clk/versatile/clk-impd1.c b/drivers/clk/versatile/clk-impd1.c
index 1cc1330..46680db 100644
--- a/drivers/clk/versatile/clk-impd1.c
+++ b/drivers/clk/versatile/clk-impd1.c
@@ -7,7 +7,6 @@
* published by the Free Software Foundation.
*/
#include <linux/clk-provider.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/err.h>
#include <linux/io.h>
@@ -21,18 +20,18 @@
struct impd1_clk {
char *pclkname;
- struct clk *pclk;
+ struct clk_core *pclk;
char *vco1name;
- struct clk *vco1clk;
+ struct clk_core *vco1clk;
char *vco2name;
- struct clk *vco2clk;
- struct clk *mmciclk;
+ struct clk_core *vco2clk;
+ struct clk_core *mmciclk;
char *uartname;
- struct clk *uartclk;
+ struct clk_core *uartclk;
char *spiname;
- struct clk *spiclk;
+ struct clk_core *spiclk;
char *scname;
- struct clk *scclk;
+ struct clk_core *scclk;
struct clk_lookup *clks[15];
};
@@ -87,8 +86,8 @@ static const struct clk_icst_desc impd1_icst2_desc = {
void integrator_impd1_clk_init(void __iomem *base, unsigned int id)
{
struct impd1_clk *imc;
- struct clk *clk;
- struct clk *pclk;
+ struct clk_core *clk;
+ struct clk_core *pclk;
int i;
if (id > 3) {
diff --git a/drivers/clk/versatile/clk-realview.c b/drivers/clk/versatile/clk-realview.c
index c8b5231..524cba5 100644
--- a/drivers/clk/versatile/clk-realview.c
+++ b/drivers/clk/versatile/clk-realview.c
@@ -6,7 +6,6 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/err.h>
#include <linux/io.h>
@@ -50,7 +49,7 @@ static const struct clk_icst_desc __initdata realview_osc4_desc = {
*/
void __init realview_clk_init(void __iomem *sysbase, bool is_pb1176)
{
- struct clk *clk;
+ struct clk_core *clk;
/* APB clock dummy */
clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT, 0);
diff --git a/drivers/clk/versatile/clk-sp810.c b/drivers/clk/versatile/clk-sp810.c
index c6e86a9..9256d25 100644
--- a/drivers/clk/versatile/clk-sp810.c
+++ b/drivers/clk/versatile/clk-sp810.c
@@ -25,7 +25,7 @@ struct clk_sp810;
struct clk_sp810_timerclken {
struct clk_hw hw;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_sp810 *sp810;
int channel;
};
@@ -36,8 +36,8 @@ struct clk_sp810 {
void __iomem *base;
spinlock_t lock;
struct clk_sp810_timerclken timerclken[4];
- struct clk *refclk;
- struct clk *timclk;
+ struct clk_core *refclk;
+ struct clk_core *timclk;
};
static u8 clk_sp810_timerclken_get_parent(struct clk_hw *hw)
@@ -79,29 +79,31 @@ static int clk_sp810_timerclken_prepare(struct clk_hw *hw)
{
struct clk_sp810_timerclken *timerclken = to_clk_sp810_timerclken(hw);
struct clk_sp810 *sp810 = timerclken->sp810;
- struct clk *old_parent = __clk_get_parent(hw->clk);
- struct clk *new_parent;
+ struct clk_core *old_parent = __clk_get_parent(hw->clk);
+ struct clk_core *new_parent;
if (!sp810->refclk)
- sp810->refclk = of_clk_get(sp810->node, sp810->refclk_index);
+ sp810->refclk = of_clk_provider_get(sp810->node,
+ sp810->refclk_index);
if (!sp810->timclk)
- sp810->timclk = of_clk_get(sp810->node, sp810->timclk_index);
+ sp810->timclk = of_clk_provider_get(sp810->node,
+ sp810->timclk_index);
if (WARN_ON(IS_ERR(sp810->refclk) || IS_ERR(sp810->timclk)))
return -ENOENT;
/* Select fastest parent */
- if (clk_get_rate(sp810->refclk) > clk_get_rate(sp810->timclk))
+ if (clk_provider_get_rate(sp810->refclk) > clk_provider_get_rate(sp810->timclk))
new_parent = sp810->refclk;
else
new_parent = sp810->timclk;
/* Switch the parent if necessary */
if (old_parent != new_parent) {
- clk_prepare(new_parent);
- clk_set_parent(hw->clk, new_parent);
- clk_unprepare(old_parent);
+ clk_provider_prepare(new_parent);
+ clk_provider_set_parent(hw->clk, new_parent);
+ clk_provider_unprepare(old_parent);
}
return 0;
@@ -112,8 +114,8 @@ static void clk_sp810_timerclken_unprepare(struct clk_hw *hw)
struct clk_sp810_timerclken *timerclken = to_clk_sp810_timerclken(hw);
struct clk_sp810 *sp810 = timerclken->sp810;
- clk_put(sp810->timclk);
- clk_put(sp810->refclk);
+ __clk_put(sp810->timclk);
+ __clk_put(sp810->refclk);
}
static const struct clk_ops clk_sp810_timerclken_ops = {
@@ -123,7 +125,7 @@ static const struct clk_ops clk_sp810_timerclken_ops = {
.set_parent = clk_sp810_timerclken_set_parent,
};
-static struct clk *clk_sp810_timerclken_of_get(struct of_phandle_args *clkspec,
+static struct clk_core *clk_sp810_timerclken_of_get(struct of_phandle_args *clkspec,
void *data)
{
struct clk_sp810 *sp810 = data;
diff --git a/drivers/clk/versatile/clk-versatile.c b/drivers/clk/versatile/clk-versatile.c
index a76981e..1bdd542 100644
--- a/drivers/clk/versatile/clk-versatile.c
+++ b/drivers/clk/versatile/clk-versatile.c
@@ -8,7 +8,6 @@
* published by the Free Software Foundation.
*/
#include <linux/clk-provider.h>
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/err.h>
#include <linux/of.h>
@@ -60,7 +59,7 @@ static const struct clk_icst_desc versatile_auxosc_desc __initconst = {
static void __init cm_osc_setup(struct device_node *np,
const struct clk_icst_desc *desc)
{
- struct clk *clk = ERR_PTR(-EINVAL);
+ struct clk_core *clk = ERR_PTR(-EINVAL);
const char *clk_name = np->name;
const char *parent_name;
diff --git a/drivers/clk/versatile/clk-vexpress-osc.c b/drivers/clk/versatile/clk-vexpress-osc.c
index 529a59c..c9e175f 100644
--- a/drivers/clk/versatile/clk-vexpress-osc.c
+++ b/drivers/clk/versatile/clk-vexpress-osc.c
@@ -73,7 +73,7 @@ static int vexpress_osc_probe(struct platform_device *pdev)
struct clk_lookup *cl = pdev->dev.platform_data; /* Non-DT lookup */
struct clk_init_data init;
struct vexpress_osc *osc;
- struct clk *clk;
+ struct clk_core *clk;
u32 range[2];
osc = devm_kzalloc(&pdev->dev, sizeof(*osc), GFP_KERNEL);
diff --git a/drivers/clk/versatile/clk-vexpress.c b/drivers/clk/versatile/clk-vexpress.c
index 2d5e1b4..e77f3d5 100644
--- a/drivers/clk/versatile/clk-vexpress.c
+++ b/drivers/clk/versatile/clk-vexpress.c
@@ -17,7 +17,7 @@
#include <linux/err.h>
#include <linux/vexpress.h>
-static struct clk *vexpress_sp810_timerclken[4];
+static struct clk_core *vexpress_sp810_timerclken[4];
static DEFINE_SPINLOCK(vexpress_sp810_lock);
static void __init vexpress_sp810_init(void __iomem *base)
@@ -54,7 +54,7 @@ static const char * const vexpress_clk_24mhz_periphs[] __initconst = {
void __init vexpress_clk_init(void __iomem *sp810_base)
{
- struct clk *clk;
+ struct clk_core *clk;
int i;
clk = clk_register_fixed_rate(NULL, "dummy_apb_pclk", NULL,
@@ -77,7 +77,7 @@ void __init vexpress_clk_init(void __iomem *sp810_base)
vexpress_sp810_init(sp810_base);
for (i = 0; i < ARRAY_SIZE(vexpress_sp810_timerclken); i++)
- WARN_ON(clk_set_parent(vexpress_sp810_timerclken[i], clk));
+ WARN_ON(clk_provider_set_parent(vexpress_sp810_timerclken[i], clk));
WARN_ON(clk_register_clkdev(vexpress_sp810_timerclken[0],
"v2m-timer0", "sp804"));
diff --git a/drivers/clk/x86/clk-lpt.c b/drivers/clk/x86/clk-lpt.c
index 812f83f..fbb6807 100644
--- a/drivers/clk/x86/clk-lpt.c
+++ b/drivers/clk/x86/clk-lpt.c
@@ -10,7 +10,6 @@
* published by the Free Software Foundation.
*/
-#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/err.h>
@@ -21,7 +20,7 @@
static int lpt_clk_probe(struct platform_device *pdev)
{
struct lpss_clk_data *drvdata;
- struct clk *clk;
+ struct clk_core *clk;
drvdata = devm_kzalloc(&pdev->dev, sizeof(*drvdata), GFP_KERNEL);
if (!drvdata)
diff --git a/drivers/clk/zynq/clkc.c b/drivers/clk/zynq/clkc.c
index 246cf12..0efdd9a 100644
--- a/drivers/clk/zynq/clkc.c
+++ b/drivers/clk/zynq/clkc.c
@@ -67,8 +67,8 @@ enum zynq_clk {
i2c0_aper, i2c1_aper, uart0_aper, uart1_aper, gpio_aper, lqspi_aper,
smc_aper, swdt, dbg_trc, dbg_apb, clk_max};
-static struct clk *ps_clk;
-static struct clk *clks[clk_max];
+static struct clk_core *ps_clk;
+static struct clk_core *clks[clk_max];
static struct clk_onecell_data clk_data;
static DEFINE_SPINLOCK(armpll_lock);
@@ -108,7 +108,7 @@ static void __init zynq_clk_register_fclk(enum zynq_clk fclk,
const char *clk_name, void __iomem *fclk_ctrl_reg,
const char **parents, int enable)
{
- struct clk *clk;
+ struct clk_core *clk;
u32 enable_reg;
char *mux_name;
char *div0_name;
@@ -154,7 +154,7 @@ static void __init zynq_clk_register_fclk(enum zynq_clk fclk,
0, CLK_GATE_SET_TO_DISABLE, fclk_gate_lock);
enable_reg = clk_readl(fclk_gate_reg) & 1;
if (enable && !enable_reg) {
- if (clk_prepare_enable(clks[fclk]))
+ if (clk_provider_prepare_enable(clks[fclk]))
pr_warn("%s: FCLK%u enable failed\n", __func__,
fclk - fclk0);
}
@@ -181,7 +181,7 @@ static void __init zynq_clk_register_periph_clk(enum zynq_clk clk0,
const char *clk_name1, void __iomem *clk_ctrl,
const char **parents, unsigned int two_gates)
{
- struct clk *clk;
+ struct clk_core *clk;
char *mux_name;
char *div_name;
spinlock_t *lock;
@@ -222,7 +222,7 @@ static void __init zynq_clk_setup(struct device_node *np)
int i;
u32 tmp;
int ret;
- struct clk *clk;
+ struct clk_core *clk;
char *clk_name;
unsigned int fclk_enable = 0;
const char *clk_output_name[clk_max];
@@ -333,13 +333,13 @@ static void __init zynq_clk_setup(struct device_node *np)
CLK_DIVIDER_ALLOW_ZERO, &ddrclk_lock);
clks[ddr2x] = clk_register_gate(NULL, clk_output_name[ddr2x],
"ddr2x_div", 0, SLCR_DDR_CLK_CTRL, 1, 0, &ddrclk_lock);
- clk_prepare_enable(clks[ddr2x]);
+ clk_provider_prepare_enable(clks[ddr2x]);
clk = clk_register_divider(NULL, "ddr3x_div", "ddrpll", 0,
SLCR_DDR_CLK_CTRL, 20, 6, CLK_DIVIDER_ONE_BASED |
CLK_DIVIDER_ALLOW_ZERO, &ddrclk_lock);
clks[ddr3x] = clk_register_gate(NULL, clk_output_name[ddr3x],
"ddr3x_div", 0, SLCR_DDR_CLK_CTRL, 0, 0, &ddrclk_lock);
- clk_prepare_enable(clks[ddr3x]);
+ clk_provider_prepare_enable(clks[ddr3x]);
clk = clk_register_divider(NULL, "dci_div0", "ddrpll", 0,
SLCR_DCI_CLK_CTRL, 8, 6, CLK_DIVIDER_ONE_BASED |
@@ -351,7 +351,7 @@ static void __init zynq_clk_setup(struct device_node *np)
clks[dci] = clk_register_gate(NULL, clk_output_name[dci], "dci_div1",
CLK_SET_RATE_PARENT, SLCR_DCI_CLK_CTRL, 0, 0,
&dciclk_lock);
- clk_prepare_enable(clks[dci]);
+ clk_provider_prepare_enable(clks[dci]);
/* Peripheral clocks */
for (i = fclk0; i <= fclk3; i++) {
@@ -505,10 +505,10 @@ static void __init zynq_clk_setup(struct device_node *np)
/* leave debug clocks in the state the bootloader set them up to */
tmp = clk_readl(SLCR_DBG_CLK_CTRL);
if (tmp & DBG_CLK_CTRL_CLKACT_TRC)
- if (clk_prepare_enable(clks[dbg_trc]))
+ if (clk_provider_prepare_enable(clks[dbg_trc]))
pr_warn("%s: trace clk enable failed\n", __func__);
if (tmp & DBG_CLK_CTRL_CPU_1XCLKACT)
- if (clk_prepare_enable(clks[dbg_apb]))
+ if (clk_provider_prepare_enable(clks[dbg_apb]))
pr_warn("%s: debug APB clk enable failed\n", __func__);
/* One gated clock for all APER clocks. */
diff --git a/drivers/clk/zynq/pll.c b/drivers/clk/zynq/pll.c
index cec9759..5176f65 100644
--- a/drivers/clk/zynq/pll.c
+++ b/drivers/clk/zynq/pll.c
@@ -193,12 +193,12 @@ static const struct clk_ops zynq_pll_ops = {
* @lock Register lock
* Returns handle to the registered clock.
*/
-struct clk *clk_register_zynq_pll(const char *name, const char *parent,
+struct clk_core *clk_register_zynq_pll(const char *name, const char *parent,
void __iomem *pll_ctrl, void __iomem *pll_status, u8 lock_index,
spinlock_t *lock)
{
struct zynq_pll *pll;
- struct clk *clk;
+ struct clk_core *clk;
u32 reg;
const char *parent_arr[1] = {parent};
unsigned long flags = 0;
diff --git a/drivers/gpu/drm/msm/hdmi/hdmi_phy_8960.c b/drivers/gpu/drm/msm/hdmi/hdmi_phy_8960.c
index 902d768..8e97702 100644
--- a/drivers/gpu/drm/msm/hdmi/hdmi_phy_8960.c
+++ b/drivers/gpu/drm/msm/hdmi/hdmi_phy_8960.c
@@ -15,7 +15,6 @@
* this program. If not, see <http://www.gnu.org/licenses/>.
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include "hdmi.h"
@@ -24,7 +23,7 @@ struct hdmi_phy_8960 {
struct hdmi_phy base;
struct hdmi *hdmi;
struct clk_hw pll_hw;
- struct clk *pll;
+ struct clk_core *pll;
unsigned long pixclk;
};
#define to_hdmi_phy_8960(x) container_of(x, struct hdmi_phy_8960, base)
diff --git a/drivers/media/platform/exynos4-is/media-dev.c b/drivers/media/platform/exynos4-is/media-dev.c
index 2620c48..2fdadd8 100644
--- a/drivers/media/platform/exynos4-is/media-dev.c
+++ b/drivers/media/platform/exynos4-is/media-dev.c
@@ -11,7 +11,6 @@
*/
#include <linux/bug.h>
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/device.h>
@@ -215,7 +214,7 @@ static int __fimc_pipeline_open(struct exynos_media_pipeline *ep,
/* Disable PXLASYNC clock if this pipeline includes FIMC-IS */
if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) {
- ret = clk_prepare_enable(fmd->wbclk[CLK_IDX_WB_B]);
+ ret = clk_provider_prepare_enable(fmd->wbclk[CLK_IDX_WB_B]);
if (ret < 0)
return ret;
}
@@ -225,7 +224,7 @@ static int __fimc_pipeline_open(struct exynos_media_pipeline *ep,
return 0;
if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP])
- clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]);
+ clk_provider_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]);
return ret;
}
@@ -254,7 +253,7 @@ static int __fimc_pipeline_close(struct exynos_media_pipeline *ep)
/* Disable PXLASYNC clock if this pipeline includes FIMC-IS */
if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP])
- clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]);
+ clk_provider_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]);
return ret == -ENXIO ? 0 : ret;
}
@@ -954,7 +953,7 @@ static void fimc_md_put_clocks(struct fimc_md *fmd)
while (--i >= 0) {
if (IS_ERR(fmd->camclk[i].clock))
continue;
- clk_put(fmd->camclk[i].clock);
+ __clk_put(fmd->camclk[i].clock);
fmd->camclk[i].clock = ERR_PTR(-EINVAL);
}
@@ -962,7 +961,7 @@ static void fimc_md_put_clocks(struct fimc_md *fmd)
for (i = 0; i < FIMC_MAX_WBCLKS; i++) {
if (IS_ERR(fmd->wbclk[i]))
continue;
- clk_put(fmd->wbclk[i]);
+ __clk_put(fmd->wbclk[i]);
fmd->wbclk[i] = ERR_PTR(-EINVAL);
}
}
@@ -971,7 +970,7 @@ static int fimc_md_get_clocks(struct fimc_md *fmd)
{
struct device *dev = &fmd->pdev->dev;
char clk_name[32];
- struct clk *clock;
+ struct clk_core *clock;
int i, ret = 0;
for (i = 0; i < FIMC_MAX_CAMCLKS; i++)
@@ -979,7 +978,7 @@ static int fimc_md_get_clocks(struct fimc_md *fmd)
for (i = 0; i < FIMC_MAX_CAMCLKS; i++) {
snprintf(clk_name, sizeof(clk_name), "sclk_cam%u", i);
- clock = clk_get(dev, clk_name);
+ clock = clk_provider_get(dev, clk_name);
if (IS_ERR(clock)) {
dev_err(dev, "Failed to get clock: %s\n", clk_name);
@@ -1001,7 +1000,7 @@ static int fimc_md_get_clocks(struct fimc_md *fmd)
for (i = CLK_IDX_WB_B; i < FIMC_MAX_WBCLKS; i++) {
snprintf(clk_name, sizeof(clk_name), "pxl_async%u", i);
- clock = clk_get(dev, clk_name);
+ clock = clk_provider_get(dev, clk_name);
if (IS_ERR(clock)) {
v4l2_err(&fmd->v4l2_dev, "Failed to get clock: %s\n",
clk_name);
diff --git a/drivers/media/platform/exynos4-is/media-dev.h b/drivers/media/platform/exynos4-is/media-dev.h
index 0321454..f24dac6 100644
--- a/drivers/media/platform/exynos4-is/media-dev.h
+++ b/drivers/media/platform/exynos4-is/media-dev.h
@@ -9,7 +9,6 @@
#ifndef FIMC_MDEVICE_H_
#define FIMC_MDEVICE_H_
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/platform_device.h>
#include <linux/mutex.h>
@@ -72,7 +71,7 @@ struct fimc_csis_info {
};
struct fimc_camclk_info {
- struct clk *clock;
+ struct clk_core *clock;
int use_count;
unsigned long frequency;
};
@@ -124,7 +123,7 @@ struct fimc_md {
struct fimc_sensor_info sensor[FIMC_MAX_SENSORS];
int num_sensors;
struct fimc_camclk_info camclk[FIMC_MAX_CAMCLKS];
- struct clk *wbclk[FIMC_MAX_WBCLKS];
+ struct clk_core *wbclk[FIMC_MAX_WBCLKS];
struct fimc_lite *fimc_lite[FIMC_LITE_MAX_DEVS];
struct fimc_dev *fimc[FIMC_MAX_DEVS];
struct fimc_is *fimc_is;
@@ -141,7 +140,7 @@ struct fimc_md {
} pinctl;
struct cam_clk_provider {
- struct clk *clks[FIMC_MAX_CAMCLKS];
+ struct clk_core *clks[FIMC_MAX_CAMCLKS];
struct clk_onecell_data clk_data;
struct device_node *of_node;
struct cam_clk camclk[FIMC_MAX_CAMCLKS];
diff --git a/drivers/media/platform/omap3isp/isp.h b/drivers/media/platform/omap3isp/isp.h
index 2c314ee..5fcedd6 100644
--- a/drivers/media/platform/omap3isp/isp.h
+++ b/drivers/media/platform/omap3isp/isp.h
@@ -133,7 +133,7 @@ struct isp_xclk {
struct isp_device *isp;
struct clk_hw hw;
struct clk_lookup *lookup;
- struct clk *clk;
+ struct clk_core *clk;
enum isp_xclk_id id;
spinlock_t lock; /* Protects enabled and divider */
diff --git a/drivers/rtc/rtc-hym8563.c b/drivers/rtc/rtc-hym8563.c
index b936bb4..ea21bd1 100644
--- a/drivers/rtc/rtc-hym8563.c
+++ b/drivers/rtc/rtc-hym8563.c
@@ -398,11 +398,11 @@ static const struct clk_ops hym8563_clkout_ops = {
.set_rate = hym8563_clkout_set_rate,
};
-static struct clk *hym8563_clkout_register_clk(struct hym8563 *hym8563)
+static struct clk_core *hym8563_clkout_register_clk(struct hym8563 *hym8563)
{
struct i2c_client *client = hym8563->client;
struct device_node *node = client->dev.of_node;
- struct clk *clk;
+ struct clk_core *clk;
struct clk_init_data init;
int ret;
diff --git a/drivers/staging/imx-drm/imx-tve.c b/drivers/staging/imx-drm/imx-tve.c
index c628fcd..458170b 100644
--- a/drivers/staging/imx-drm/imx-tve.c
+++ b/drivers/staging/imx-drm/imx-tve.c
@@ -18,7 +18,6 @@
* MA 02110-1301, USA.
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/component.h>
#include <linux/module.h>
@@ -121,10 +120,10 @@ struct imx_tve {
struct regmap *regmap;
struct regulator *dac_reg;
struct i2c_adapter *ddc;
- struct clk *clk;
- struct clk *di_sel_clk;
+ struct clk_core *clk;
+ struct clk_core *di_sel_clk;
struct clk_hw clk_hw_di;
- struct clk *di_clk;
+ struct clk_core *di_clk;
int vsync_pin;
int hsync_pin;
};
@@ -149,7 +148,7 @@ static void tve_enable(struct imx_tve *tve)
if (!tve->enabled) {
tve->enabled = true;
- clk_prepare_enable(tve->clk);
+ clk_provider_prepare_enable(tve->clk);
ret = regmap_update_bits(tve->regmap, TVE_COM_CONF_REG,
TVE_IPU_CLK_EN | TVE_EN,
TVE_IPU_CLK_EN | TVE_EN);
@@ -176,7 +175,7 @@ static void tve_disable(struct imx_tve *tve)
tve->enabled = false;
ret = regmap_update_bits(tve->regmap, TVE_COM_CONF_REG,
TVE_IPU_CLK_EN | TVE_EN, 0);
- clk_disable_unprepare(tve->clk);
+ clk_provider_disable_unprepare(tve->clk);
}
}
@@ -251,12 +250,12 @@ static int imx_tve_connector_mode_valid(struct drm_connector *connector,
unsigned long rate;
/* pixel clock with 2x oversampling */
- rate = clk_round_rate(tve->clk, 2000UL * mode->clock) / 2000;
+ rate = clk_provider_round_rate(tve->clk, 2000UL * mode->clock) / 2000;
if (rate == mode->clock)
return MODE_OK;
/* pixel clock without oversampling */
- rate = clk_round_rate(tve->clk, 1000UL * mode->clock) / 1000;
+ rate = clk_provider_round_rate(tve->clk, 1000UL * mode->clock) / 1000;
if (rate == mode->clock)
return MODE_OK;
@@ -325,13 +324,13 @@ static void imx_tve_encoder_mode_set(struct drm_encoder *encoder,
* and enable 4x oversampling for lower resolutions
*/
rate = 2000UL * mode->clock;
- clk_set_rate(tve->clk, rate);
- rounded_rate = clk_get_rate(tve->clk);
+ clk_provider_set_rate(tve->clk, rate);
+ rounded_rate = clk_provider_get_rate(tve->clk);
if (rounded_rate >= rate)
div = 2;
- clk_set_rate(tve->di_clk, rounded_rate / div);
+ clk_provider_set_rate(tve->di_clk, rounded_rate / div);
- ret = clk_set_parent(tve->di_sel_clk, tve->di_clk);
+ ret = clk_provider_set_parent(tve->di_sel_clk, tve->di_clk);
if (ret < 0) {
dev_err(tve->dev, "failed to set di_sel parent to tve_di: %d\n",
ret);
@@ -643,7 +642,7 @@ static int imx_tve_bind(struct device *dev, struct device *master, void *data)
return ret;
}
- tve->clk = devm_clk_get(dev, "tve");
+ tve->clk = devm_clk_provider_get(dev, "tve");
if (IS_ERR(tve->clk)) {
dev_err(dev, "failed to get high speed tve clock: %ld\n",
PTR_ERR(tve->clk));
@@ -651,7 +650,7 @@ static int imx_tve_bind(struct device *dev, struct device *master, void *data)
}
/* this is the IPU DI clock input selector, can be parented to tve_di */
- tve->di_sel_clk = devm_clk_get(dev, "di_sel");
+ tve->di_sel_clk = devm_clk_provider_get(dev, "di_sel");
if (IS_ERR(tve->di_sel_clk)) {
dev_err(dev, "failed to get ipu di mux clock: %ld\n",
PTR_ERR(tve->di_sel_clk));
diff --git a/include/asm-generic/clkdev.h b/include/asm-generic/clkdev.h
index 90a32a6..4320225 100644
--- a/include/asm-generic/clkdev.h
+++ b/include/asm-generic/clkdev.h
@@ -15,10 +15,10 @@
#include <linux/slab.h>
-struct clk;
+struct clk_core;
-static inline int __clk_get(struct clk *clk) { return 1; }
-static inline void __clk_put(struct clk *clk) { }
+static inline int __clk_get(struct clk_core *clk) { return 1; }
+static inline void __clk_put(struct clk_core *clk) { }
static inline struct clk_lookup_alloc *__clkdev_alloc(size_t size)
{
diff --git a/include/linux/clk/ti.h b/include/linux/clk/ti.h
index e8d8a35..6b9e6b4 100644
--- a/include/linux/clk/ti.h
+++ b/include/linux/clk/ti.h
@@ -22,8 +22,8 @@
* @mult_div1_reg: register containing the DPLL M and N bitfields
* @mult_mask: mask of the DPLL M bitfield in @mult_div1_reg
* @div1_mask: mask of the DPLL N bitfield in @mult_div1_reg
- * @clk_bypass: struct clk pointer to the clock's bypass clock input
- * @clk_ref: struct clk pointer to the clock's reference clock input
+ * @clk_bypass: struct clk_core pointer to the clock's bypass clock input
+ * @clk_ref: struct clk_core pointer to the clock's reference clock input
* @control_reg: register containing the DPLL mode bitfield
* @enable_mask: mask of the DPLL mode bitfield in @control_reg
* @last_rounded_rate: cache of the last rate result of omap2_dpll_round_rate()
@@ -68,8 +68,8 @@ struct dpll_data {
void __iomem *mult_div1_reg;
u32 mult_mask;
u32 div1_mask;
- struct clk *clk_bypass;
- struct clk *clk_ref;
+ struct clk_core *clk_bypass;
+ struct clk_core *clk_ref;
void __iomem *control_reg;
u32 enable_mask;
unsigned long last_rounded_rate;
@@ -251,7 +251,7 @@ extern const struct clk_ops ti_clk_mux_ops;
#define to_clk_hw_omap(_hw) container_of(_hw, struct clk_hw_omap, hw)
-void omap2_init_clk_hw_omap_clocks(struct clk *clk);
+void omap2_init_clk_hw_omap_clocks(struct clk_core *clk);
int omap3_noncore_dpll_enable(struct clk_hw *hw);
void omap3_noncore_dpll_disable(struct clk_hw *hw);
int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate,
diff --git a/include/linux/clk/zynq.h b/include/linux/clk/zynq.h
index a990a59..6c35291 100644
--- a/include/linux/clk/zynq.h
+++ b/include/linux/clk/zynq.h
@@ -25,7 +25,7 @@
void zynq_clock_init(void);
-struct clk *clk_register_zynq_pll(const char *name, const char *parent,
+struct clk_core *clk_register_zynq_pll(const char *name, const char *parent,
void __iomem *pll_ctrl, void __iomem *pll_status, u8 lock_index,
spinlock_t *lock);
#endif
diff --git a/include/linux/platform_data/si5351.h b/include/linux/platform_data/si5351.h
index a947ab8..4b34c69 100644
--- a/include/linux/platform_data/si5351.h
+++ b/include/linux/platform_data/si5351.h
@@ -107,8 +107,8 @@ struct si5351_clkout_config {
* @clkout: array of clkout configuration
*/
struct si5351_platform_data {
- struct clk *clk_xtal;
- struct clk *clk_clkin;
+ struct clk_core *clk_xtal;
+ struct clk_core *clk_clkin;
enum si5351_pll_src pll_src[2];
struct si5351_clkout_config clkout[8];
};
diff --git a/sound/soc/mxs/mxs-saif.c b/sound/soc/mxs/mxs-saif.c
index 231d7e7..a24367d 100644
--- a/sound/soc/mxs/mxs-saif.c
+++ b/sound/soc/mxs/mxs-saif.c
@@ -682,11 +682,11 @@ static int mxs_saif_mclk_init(struct platform_device *pdev)
{
struct mxs_saif *saif = platform_get_drvdata(pdev);
struct device_node *np = pdev->dev.of_node;
- struct clk *clk;
+ struct clk_core *clk;
int ret;
clk = clk_register_divider(&pdev->dev, "mxs_saif_mclk",
- __clk_get_name(saif->clk), 0,
+ clk_get_name(saif->clk), 0,
saif->base + SAIF_CTRL,
BP_SAIF_CTRL_BITCLK_MULT_RATE, 3,
0, NULL);
--
1.9.3
2
1
Hello,
I found driver for vt1613 (which is part of udoo arm computer) at https://github.com/UDOOboard/Kernel_Unico/blob/master/sound/soc/codecs/vt16…, but it's not compatibile with current kernel. Below you can find my patch that makes it possible to compile and load this driver. It probably has memory leak on unload (commented kfree), but the worst thing is that Linux still doesn't see sound card. I suppose that volatile register should be changed to reg_default, but I'm not programmer (I only had C course a few years ago and oboiously I've never touched any driver code) therefore this is far beyond my abilities. Can you help me with getting this driver to work on recent kernel please?
Regards,
Adrian
1
0
Hello !
I'm implementing a USB Audio Class 2 device using a Cortex-M4 with high
speed USB. So far it works well, the device is recognized by ALSA,
playback, capture, sample rate change, and all controls like volume and
mute work. I'm using explicit feedback.
I'd like to use implicit feedback instead, and had some problems...
With implicit feedback, when playback starts, ALSA should start capture
automatically (even if there are no applications requesting capture at the
moment) to use the number of capture samples as feedback. But it doesn't.
So, I'd like to know :
- Is it actually supported ?
- If it is, what descriptors should I use to make it work ?
Thanks for any info, have a nice day !
Pierre
2
4

[alsa-devel] [PATCH v4] ASOC: dapm: add code to configure dai link parameters
by Nikesh Oswal 06 Sep '14
by Nikesh Oswal 06 Sep '14
06 Sep '14
dai-link params for codec-codec links were fixed. The fixed
link between codec and another chip which may be another codec,
baseband, bluetooth codec etc may require run time configuaration
changes. This change provides an optional alsa control to select
one of the params from a list of params.
Signed-off-by: Nikesh Oswal <nikesh(a)opensource.wolfsonmicro.com>
---
include/sound/soc-dapm.h | 3 +
include/sound/soc.h | 1 +
sound/soc/soc-core.c | 6 +-
sound/soc/soc-dapm.c | 139 ++++++++++++++++++++++++++++++++++++++++++++--
4 files changed, 142 insertions(+), 7 deletions(-)
diff --git a/include/sound/soc-dapm.h b/include/sound/soc-dapm.h
index 6b59471..3ee031e 100644
--- a/include/sound/soc-dapm.h
+++ b/include/sound/soc-dapm.h
@@ -378,6 +378,7 @@ int snd_soc_dapm_link_dai_widgets(struct snd_soc_card *card);
void snd_soc_dapm_connect_dai_link_widgets(struct snd_soc_card *card);
int snd_soc_dapm_new_pcm(struct snd_soc_card *card,
const struct snd_soc_pcm_stream *params,
+ unsigned int num_params,
struct snd_soc_dapm_widget *source,
struct snd_soc_dapm_widget *sink);
@@ -531,6 +532,8 @@ struct snd_soc_dapm_widget {
void *priv; /* widget specific data */
struct regulator *regulator; /* attached regulator */
const struct snd_soc_pcm_stream *params; /* params for dai links */
+ unsigned int num_params; /* number of params for dai links */
+ unsigned int params_select; /* currently selected param for dai link */
/* dapm control */
int reg; /* negative reg = no direct dapm */
diff --git a/include/sound/soc.h b/include/sound/soc.h
index ed9e2d7..51c6c4f 100644
--- a/include/sound/soc.h
+++ b/include/sound/soc.h
@@ -906,6 +906,7 @@ struct snd_soc_dai_link {
int be_id; /* optional ID for machine driver BE identification */
const struct snd_soc_pcm_stream *params;
+ unsigned int num_params;
unsigned int dai_fmt; /* format to set on init */
diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c
index b87d7d8..1db2168 100644
--- a/sound/soc/soc-core.c
+++ b/sound/soc/soc-core.c
@@ -1461,7 +1461,8 @@ static int soc_link_dai_widgets(struct snd_soc_card *card,
capture_w = cpu_dai->capture_widget;
if (play_w && capture_w) {
ret = snd_soc_dapm_new_pcm(card, dai_link->params,
- capture_w, play_w);
+ dai_link->num_params, capture_w,
+ play_w);
if (ret != 0) {
dev_err(card->dev, "ASoC: Can't link %s to %s: %d\n",
play_w->name, capture_w->name, ret);
@@ -1473,7 +1474,8 @@ static int soc_link_dai_widgets(struct snd_soc_card *card,
capture_w = codec_dai->capture_widget;
if (play_w && capture_w) {
ret = snd_soc_dapm_new_pcm(card, dai_link->params,
- capture_w, play_w);
+ dai_link->num_params, capture_w,
+ play_w);
if (ret != 0) {
dev_err(card->dev, "ASoC: Can't link %s to %s: %d\n",
play_w->name, capture_w->name, ret);
diff --git a/sound/soc/soc-dapm.c b/sound/soc/soc-dapm.c
index cdc837e..a9c4c2e 100644
--- a/sound/soc/soc-dapm.c
+++ b/sound/soc/soc-dapm.c
@@ -729,6 +729,36 @@ static int dapm_new_pga(struct snd_soc_dapm_widget *w)
return 0;
}
+/* create new dapm dai link control */
+static int dapm_new_dai_link(struct snd_soc_dapm_widget *w)
+{
+ int i, ret;
+ struct snd_kcontrol *kcontrol;
+ struct snd_soc_dapm_context *dapm = w->dapm;
+ struct snd_card *card = dapm->card->snd_card;
+
+ /* skip control creation for links with 1 config */
+ if (w->num_params == 1)
+ return 0;
+
+ /* add kcontrol */
+ for (i = 0; i < w->num_kcontrols; i++) {
+ kcontrol = snd_soc_cnew(&w->kcontrol_news[i], w,
+ w->name, NULL);
+ ret = snd_ctl_add(card, kcontrol);
+ if (ret < 0) {
+ dev_err(dapm->dev,
+ "ASoC: failed to add widget %s dapm kcontrol %s: %d\n",
+ w->name, w->kcontrol_news[i].name, ret);
+ return ret;
+ }
+ kcontrol->private_data = w;
+ w->kcontrols[i] = kcontrol;
+ }
+
+ return 0;
+}
+
/* reset 'walked' bit for each dapm path */
static void dapm_clear_walk_output(struct snd_soc_dapm_context *dapm,
struct list_head *sink)
@@ -2664,6 +2694,9 @@ int snd_soc_dapm_new_widgets(struct snd_soc_card *card)
case snd_soc_dapm_out_drv:
dapm_new_pga(w);
break;
+ case snd_soc_dapm_dai_link:
+ dapm_new_dai_link(w);
+ break;
default:
break;
}
@@ -3142,6 +3175,9 @@ static int snd_soc_dai_link_event(struct snd_soc_dapm_widget *w,
source = source_p->source->priv;
sink = sink_p->sink->priv;
+ /* Select the configuration set by alsa control */
+ config += w->params_select;
+
/* Be a little careful as we don't want to overflow the mask array */
if (config->formats) {
fmt = ffs(config->formats) - 1;
@@ -3222,8 +3258,35 @@ out:
return ret;
}
+static int snd_soc_dapm_dai_link_get(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_dapm_widget *w = snd_kcontrol_chip(kcontrol);
+
+ ucontrol->value.integer.value[0] = w->params_select;
+
+ return 0;
+}
+
+static int snd_soc_dapm_dai_link_put(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_dapm_widget *w = snd_kcontrol_chip(kcontrol);
+
+ if (ucontrol->value.integer.value[0] == w->params_select)
+ return 0;
+
+ if (ucontrol->value.integer.value[0] >= w->num_params)
+ return -EINVAL;
+
+ w->params_select = ucontrol->value.integer.value[0];
+
+ return 0;
+}
+
int snd_soc_dapm_new_pcm(struct snd_soc_card *card,
const struct snd_soc_pcm_stream *params,
+ unsigned int num_params,
struct snd_soc_dapm_widget *source,
struct snd_soc_dapm_widget *sink)
{
@@ -3231,12 +3294,42 @@ int snd_soc_dapm_new_pcm(struct snd_soc_card *card,
struct snd_soc_dapm_widget *w;
size_t len;
char *link_name;
- int ret;
+ int ret, count;
+ unsigned long private_value;
+ char **w_param_text;
+ struct soc_enum w_param_enum[] = {
+ SOC_ENUM_SINGLE(0, 0, 0, NULL),
+ };
+ struct snd_kcontrol_new kcontrol_dai_link[] = {
+ SOC_ENUM_EXT(NULL, w_param_enum[0],
+ snd_soc_dapm_dai_link_get,
+ snd_soc_dapm_dai_link_put),
+ };
+ const struct snd_soc_pcm_stream *config = params;
+
+ w_param_text = kcalloc(num_params, sizeof(char *), GFP_KERNEL);
+ if (!w_param_text)
+ return -ENOMEM;
+
+ for (count = 0 ; count < num_params; count++) {
+ w_param_text[count] = kmemdup((void *)(config->stream_name),
+ strlen(config->stream_name) + 1, GFP_KERNEL);
+ if (!w_param_text[count]) {
+ ret = -ENOMEM;
+ goto outfree_w_param;
+ }
+ config++;
+ }
+ w_param_enum[0].items = num_params;
+ w_param_enum[0].texts = (const char * const *) w_param_text;
len = strlen(source->name) + strlen(sink->name) + 2;
link_name = devm_kzalloc(card->dev, len, GFP_KERNEL);
- if (!link_name)
- return -ENOMEM;
+ if (!link_name) {
+ ret = -ENOMEM;
+ goto outfree_w_param;
+ }
+
snprintf(link_name, len, "%s-%s", source->name, sink->name);
memset(&template, 0, sizeof(template));
@@ -3246,6 +3339,25 @@ int snd_soc_dapm_new_pcm(struct snd_soc_card *card,
template.event = snd_soc_dai_link_event;
template.event_flags = SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
SND_SOC_DAPM_PRE_PMD;
+ template.num_kcontrols = 1;
+ private_value =
+ (unsigned long) kmemdup((void *)(kcontrol_dai_link[0].private_value),
+ sizeof(struct soc_enum), GFP_KERNEL);
+ if (!private_value) {
+ dev_err(card->dev, "ASoC: Failed to create control for %s widget\n",
+ link_name);
+ ret = -ENOMEM;
+ goto outfree_link_name;
+ }
+ kcontrol_dai_link[0].private_value = private_value;
+ template.kcontrol_news = kmemdup(&kcontrol_dai_link[0],
+ sizeof(struct snd_kcontrol_new), GFP_KERNEL);
+ if (!template.kcontrol_news) {
+ dev_err(card->dev, "ASoC: Failed to create control for %s widget\n",
+ link_name);
+ ret = -ENOMEM;
+ goto outfree_private_value;
+ }
dev_dbg(card->dev, "ASoC: adding %s widget\n", link_name);
@@ -3253,15 +3365,32 @@ int snd_soc_dapm_new_pcm(struct snd_soc_card *card,
if (!w) {
dev_err(card->dev, "ASoC: Failed to create %s widget\n",
link_name);
- return -ENOMEM;
+ ret = -ENOMEM;
+ goto outfree_kcontrol_news;
}
w->params = params;
+ w->num_params = num_params;
ret = snd_soc_dapm_add_path(&card->dapm, source, w, NULL, NULL);
if (ret)
- return ret;
+ goto outfree_w;
return snd_soc_dapm_add_path(&card->dapm, w, sink, NULL, NULL);
+
+outfree_w:
+ kfree(w);
+outfree_kcontrol_news:
+ kfree(template.kcontrol_news);
+outfree_private_value:
+ kfree((void *)private_value);
+outfree_link_name:
+ kfree(link_name);
+outfree_w_param:
+ for (count = 0 ; count < num_params; count++)
+ kfree(w_param_text[count]);
+ kfree(w_param_text);
+
+ return ret;
}
int snd_soc_dapm_new_dai_widgets(struct snd_soc_dapm_context *dapm,
--
1.7.9.5
2
1

[alsa-devel] [PATCH 0/4] ASoC: sst-haswell-pcm: Move controls and DAPM elements to component
by Lars-Peter Clausen 06 Sep '14
by Lars-Peter Clausen 06 Sep '14
06 Sep '14
The sst-haswell-pcm driver is the only one that registers controls and DAPM
elements for a snd_soc_platform_driver. Moving them over to the component that
is registered by the same driver make it possible to remove the
steal_silbling_dai_hack in the core as well as the extra indirection that is
used to register the controls and DAPM elements.
Vinod, Subhransu, can you take a look at this and make sure it works as expected
and also keep this in mind for the new DPCM drivers?
Thanks,
- Lars
Lars-Peter Clausen (4):
ASoC: Add snd_soc_component_{get,set}_drvdata()
ASoC: sst-haswell-pcm: Alloc state struct in driver probe()
ASoC: sst-haswell-pcm: Move controls and DAPM elements to component
ASoC: Remove table based DAPM/control setup support from
snd_soc_platform_driver
include/sound/soc.h | 28 ++++++++++---------
sound/soc/intel/sst-haswell-pcm.c | 56 ++++++++++++++++++-------------------
sound/soc/soc-core.c | 58 ++++-----------------------------------
3 files changed, 49 insertions(+), 93 deletions(-)
--
1.8.0
3
8
I moved from ST Microelectronics and the email-id no longer
exists. Update email-id to personal one,
Signed-off-by: Rajeev Kumar <rajeevkumar.linux(a)gmail.com>
---
sound/soc/dwc/designware_i2s.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sound/soc/dwc/designware_i2s.c b/sound/soc/dwc/designware_i2s.c
index 25c31f1..a97d27f 100644
--- a/sound/soc/dwc/designware_i2s.c
+++ b/sound/soc/dwc/designware_i2s.c
@@ -4,7 +4,7 @@
* sound/soc/dwc/designware_i2s.c
*
* Copyright (C) 2010 ST Microelectronics
- * Rajeev Kumar <rajeev-dlh.kumar(a)st.com>
+ * Rajeev Kumar <rajeevkumar.linux(a)gmail.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
--
1.7.9.5
2
1
Hi,
I'm developing an audio stream player application with ALSA output, the
player has a large software buffer. The trouble is that the stream can
potentially change the sampling rate (e.g. streaming RTP from a VLC
playlist created from different MP3 songs). How to properly handle this?
I'm thinking of the following concept:
The codec feeds data into the software buffer together with markers for
sample rate changes. The ALSA playback is asynchronous, using a callback
function feeding the data from the software buffer into ALSA. If a
samplerate marker is hit the new rate is set.
Can the sample rate be set from a callback? What other constraints are
there? And how does the HW FIFO handle samplerate changes?
Or is there a better way of implementing?
Thanks a lot!
Petr
--
Petr Kulhavy, MSc
System Architect
*BARIX*
petr(a)barix.com <mailto:petr@barix.com> | Skype: brain.barix
Barix AG, Seefeldstrasse 303 | 8008 Zurich, Switzerland
T +41 43 43322 11 | www.barix.com <http://www.barix.com>
You have received this email because of your relationship Barix AG and
its affiliated companies. Barix AG and its affiliated companies do not
sell or exchange email addresses, or any other personal contact
information provided by you with any third parties. All email
distributions are managed and controlled by Barix AG and its affiliated
companies.
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CH-020.3.023.869-8, VAT Reg. No: CHE-105.687.663.
2
1

Re: [alsa-devel] [PATCH] ALSA: virtuoso: add Xonar Essence STX II support
by Andreas Allacher 06 Sep '14
by Andreas Allacher 06 Sep '14
06 Sep '14
Hi,
as I have tested the patch and it works, shouldn't someone merge it with
kernel git?
Am 29.08.2014 21:08, schrieb Clemens Ladisch:
> Andreas Allacher wrote:
>> Is the path already in the kernel source git or do I have to apply it manually?
> This patch is completely untested and not yet in any git.
>
>
> Regards,
> Clemens
>
1
0

05 Sep '14
Add quirks for XMOS based DACs for native DSD playback support using the new
DSD_U32_LE sample format.
This version adds native DSD support for:
- iFi Audio micro iDSD/nano iDSD (they use the same prod. id)
- DIYINHK USB to I2S/DSD converter
Changes from v1:
- use specific product id and alt setting per XMOS based device
Signed-off-by: Jurgen Kramer <gtmkramer(a)xs4all.nl>
---
sound/usb/quirks.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/sound/usb/quirks.c b/sound/usb/quirks.c
index 19a921e..5ae0536 100644
--- a/sound/usb/quirks.c
+++ b/sound/usb/quirks.c
@@ -1174,5 +1174,20 @@ u64 snd_usb_interface_dsd_format_quirks(struct snd_usb_audio *chip,
}
}
+ /* XMOS based USB DACs */
+ if (le16_to_cpu(chip->dev->descriptor.idVendor) == 0x20b1) {
+ switch (le16_to_cpu(chip->dev->descriptor.idProduct)) {
+ /* iFi Audio micro/nano iDSD */
+ case 0x3008:
+ if (fp->altsetting == 2)
+ return SNDRV_PCM_FMTBIT_DSD_U32_LE;
+ /* DIYINHK DSD DXD 384kHz USB to I2S/DSD */
+ case 0x2009:
+ if (fp->altsetting == 3)
+ return SNDRV_PCM_FMTBIT_DSD_U32_LE;
+ default:
+ return 0;
+ }
+ }
return 0;
}
--
1.9.3
3
8

05 Sep '14
Add quirk for XMOS based DACs for native DSD playback support using the new DSD_U32_LE sample
format. Works for all DAC vendors which use XMOS as idVendor. E.g. iFi Audio
with their micro iDSD and nano iDSD.
Signed-off-by: Jurgen Kramer <gtmkramer(a)xs4all.nl>
---
sound/usb/quirks.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/sound/usb/quirks.c b/sound/usb/quirks.c
index 19a921e..e0efffb 100644
--- a/sound/usb/quirks.c
+++ b/sound/usb/quirks.c
@@ -1174,5 +1174,15 @@ u64 snd_usb_interface_dsd_format_quirks(struct snd_usb_audio *chip,
}
}
+ /* XMOS based DACs, e.g. iFi Audio micro/nano iDSD */
+ if (le16_to_cpu(chip->dev->descriptor.idVendor) == 0x20b1) {
+ switch (fp->altsetting) {
+ case 2:
+ return SNDRV_PCM_FMTBIT_DSD_U32_LE;
+ default:
+ return 0;
+ }
+ }
+
return 0;
}
--
1.9.3
2
4

[alsa-devel] [PATCH] pcm: add new DSD sampleformat for native DSD playback on XMOS based devices
by Jurgen Kramer 05 Sep '14
by Jurgen Kramer 05 Sep '14
05 Sep '14
XMOS based USB DACs with native DSD support expose this feature via a USB
alternate setting. The audio format is either 32-bit raw or a 32-bit PCM format.
To utilize this feature on linux this patch introduces a new 32-bit DSD
sampleformat DSD_U32_LE.
A follow up patch will add a quirk for XMOS based devices to utilize the new format.
Further patches will add support to alsa-lib.
Signed-off-by: Jurgen Kramer <gtmkramer(a)xs4all.nl>
---
include/sound/pcm.h | 1 +
include/uapi/sound/asound.h | 3 ++-
sound/core/pcm.c | 1 +
sound/core/pcm_misc.c | 4 ++++
4 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/include/sound/pcm.h b/include/sound/pcm.h
index 6f3e10c..faefd83 100644
--- a/include/sound/pcm.h
+++ b/include/sound/pcm.h
@@ -183,6 +183,7 @@ struct snd_pcm_ops {
#define SNDRV_PCM_FMTBIT_G723_40_1B _SNDRV_PCM_FMTBIT(G723_40_1B)
#define SNDRV_PCM_FMTBIT_DSD_U8 _SNDRV_PCM_FMTBIT(DSD_U8)
#define SNDRV_PCM_FMTBIT_DSD_U16_LE _SNDRV_PCM_FMTBIT(DSD_U16_LE)
+#define SNDRV_PCM_FMTBIT_DSD_U32_LE _SNDRV_PCM_FMTBIT(DSD_U32_LE)
#ifdef SNDRV_LITTLE_ENDIAN
#define SNDRV_PCM_FMTBIT_S16 SNDRV_PCM_FMTBIT_S16_LE
diff --git a/include/uapi/sound/asound.h b/include/uapi/sound/asound.h
index 32168f7..6ee5867 100644
--- a/include/uapi/sound/asound.h
+++ b/include/uapi/sound/asound.h
@@ -219,7 +219,8 @@ typedef int __bitwise snd_pcm_format_t;
#define SNDRV_PCM_FORMAT_G723_40_1B ((__force snd_pcm_format_t) 47) /* 1 sample in 1 byte */
#define SNDRV_PCM_FORMAT_DSD_U8 ((__force snd_pcm_format_t) 48) /* DSD, 1-byte samples DSD (x8) */
#define SNDRV_PCM_FORMAT_DSD_U16_LE ((__force snd_pcm_format_t) 49) /* DSD, 2-byte samples DSD (x16), little endian */
-#define SNDRV_PCM_FORMAT_LAST SNDRV_PCM_FORMAT_DSD_U16_LE
+#define SNDRV_PCM_FORMAT_DSD_U32_LE ((__force snd_pcm_format_t) 50) /* DSD, 4-byte samples DSD (x32), little endian */
+#define SNDRV_PCM_FORMAT_LAST SNDRV_PCM_FORMAT_DSD_U32_LE
#ifdef SNDRV_LITTLE_ENDIAN
#define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_LE
diff --git a/sound/core/pcm.c b/sound/core/pcm.c
index 43932e8..72eb20a 100644
--- a/sound/core/pcm.c
+++ b/sound/core/pcm.c
@@ -215,6 +215,7 @@ static char *snd_pcm_format_names[] = {
FORMAT(G723_40_1B),
FORMAT(DSD_U8),
FORMAT(DSD_U16_LE),
+ FORMAT(DSD_U32_LE),
};
const char *snd_pcm_format_name(snd_pcm_format_t format)
diff --git a/sound/core/pcm_misc.c b/sound/core/pcm_misc.c
index 2c6fd80..ae7a0fe 100644
--- a/sound/core/pcm_misc.c
+++ b/sound/core/pcm_misc.c
@@ -148,6 +148,10 @@ static struct pcm_format_data pcm_formats[(INT)SNDRV_PCM_FORMAT_LAST+1] = {
.width = 16, .phys = 16, .le = 1, .signd = 0,
.silence = { 0x69, 0x69 },
},
+ [SNDRV_PCM_FORMAT_DSD_U32_LE] = {
+ .width = 32, .phys = 32, .le = 1, .signd = 0,
+ .silence = { 0x69, 0x69, 0x69, 0x69 },
+ },
/* FIXME: the following three formats are not defined properly yet */
[SNDRV_PCM_FORMAT_MPEG] = {
.le = -1, .signd = -1,
--
1.9.3
1
0

[alsa-devel] [PATCH 0/9] ASoC: probe/remove and suspend/resume manual bias level transitions cleanup
by Lars-Peter Clausen 04 Sep '14
by Lars-Peter Clausen 04 Sep '14
04 Sep '14
The goal of this series is to allow to cut back the number of manual bias level
transitions that drivers have to do.
We do have a lot of drivers which manually go to SND_SOC_BIAS_OFF on suspend and
go back to SND_SOC_BIAS_STANDBY on resume. Often this is even the only thing
done in the suspend and resume handlers. This leads to a lot of drivers with
identical suspend and resume code. In this series a new flag called
suspend_bias_off is introduced. When this flag is set for a driver the ASoC core
will automatically switch to SND_SOC_BIAS_OFF during suspend. This allows to
remove the manual transitions (and often the suspend and resume handlers
altogether).
Similarly a lot of drivers also go to SND_SOC_BIAS_STANDBY at the end of their
probe() callback and a lot of drivers go to SND_SOC_BIAS_OFF at the beginning in
their remove() handler. The first one is already unnecessary as things are today
since the core will make sure to set the DAPM context to SND_SOC_BIAS_STANDBY
when the first snd_soc_dapm_sync() is executed during card instantiation after
all components have been probed. To be able to remove the later from individual
drivers this series introduces a call to snd_soc_dapm_shutdown() when the card
is removed. This not only makes sure that the bias level of all components is at
SND_SOC_BIAS_OFF, but also makes sure that all widgets are properly powered
down.
This series only converts a small set of drivers for now to keep small and clear
and to be able to focus on the core changes, but I do have patches for cleaning
up most of the drivers which in total removes over a 1000 lines of redundant
code.
The series depends on topic/suspend.
- Lars
Lars-Peter Clausen (9):
ASoC: Set card->instantiated to false when removing the card
ASoC: Shutdown DAPM contexts when removing a card
ASoC: Add support for automatically going to BIAS_OFF on suspend
ASoC: Always run default suspend/resume code
ASoC: adau1373: Cleanup manual bias level transitions
ASoC: adau17x1: Cleanup manual bias level transitions
ASoC: adav80x: Cleanup manual bias level transitions
ASoC: ssm2518: Cleanup manual bias level transitions
ASoC: ssm2602: Cleanup manual bias level transitions
include/sound/soc-dapm.h | 3 ++-
include/sound/soc.h | 1 +
sound/soc/codecs/adau1373.c | 7 -------
sound/soc/codecs/adau1761.c | 2 +-
sound/soc/codecs/adau1781.c | 2 +-
sound/soc/codecs/adau17x1.c | 8 --------
sound/soc/codecs/adau17x1.h | 1 -
sound/soc/codecs/adav80x.c | 23 ++---------------------
sound/soc/codecs/ssm2518.c | 13 -------------
sound/soc/codecs/ssm2602.c | 24 ++----------------------
sound/soc/soc-core.c | 17 ++++++++++++-----
sound/soc/soc-dapm.c | 20 ++++++++++++++++++--
12 files changed, 39 insertions(+), 82 deletions(-)
--
1.8.0
2
10

[alsa-devel] [PATCH v2] ASoC: rt5670: add clock source selection controls
by bardliao@realtek.com 04 Sep '14
by bardliao@realtek.com 04 Sep '14
04 Sep '14
From: Bard Liao <bardliao(a)realtek.com>
We can select the clock source of some digital widgets in rt5670.
This patch adds the controls of those selections.
Signed-off-by: Bard Liao <bardliao(a)realtek.com>
---
Mark,
I write the changelog at the beginning of rt5670.c. But I am not
sure if it is a regular way to make a changelog.
---
sound/soc/codecs/rt5670.c | 121 ++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 121 insertions(+)
diff --git a/sound/soc/codecs/rt5670.c b/sound/soc/codecs/rt5670.c
index ba9d9b4..87131a1 100644
--- a/sound/soc/codecs/rt5670.c
+++ b/sound/soc/codecs/rt5670.c
@@ -7,6 +7,10 @@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
+ *
+ * Changelog:
+ *
+ * - Add clock source selections for some digital widgets.
*/
#include <linux/module.h>
@@ -430,6 +434,105 @@ static SOC_ENUM_SINGLE_DECL(rt5670_if2_dac_enum, RT5670_DIG_INF1_DATA,
static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_enum, RT5670_DIG_INF1_DATA,
RT5670_IF2_ADC_SEL_SFT, rt5670_data_select);
+static const char * const rt5670_asrc_clk_source[] = {
+ "clk_sysy_div_out", "clk_i2s1_track", "clk_i2s2_track",
+ "clk_i2s3_track", "clk_i2s4_track", "clk_sys2", "clk_sys3",
+ "clk_sys4", "clk_sys5"
+};
+
+static const SOC_ENUM_SINGLE_DECL(rt5670_da_sto_asrc_enum, RT5670_ASRC_2,
+ 12, rt5670_asrc_clk_source);
+
+static const SOC_ENUM_SINGLE_DECL(rt5670_da_monol_asrc_enum, RT5670_ASRC_2,
+ 8, rt5670_asrc_clk_source);
+
+static const SOC_ENUM_SINGLE_DECL(rt5670_da_monor_asrc_enum, RT5670_ASRC_2,
+ 4, rt5670_asrc_clk_source);
+
+static const SOC_ENUM_SINGLE_DECL(rt5670_ad_sto1_asrc_enum, RT5670_ASRC_2,
+ 0, rt5670_asrc_clk_source);
+
+static const SOC_ENUM_SINGLE_DECL(rt5670_up_filter_asrc_enum, RT5670_ASRC_3,
+ 12, rt5670_asrc_clk_source);
+
+static const SOC_ENUM_SINGLE_DECL(rt5670_down_filter_asrc_enum, RT5670_ASRC_3,
+ 8, rt5670_asrc_clk_source);
+
+static const SOC_ENUM_SINGLE_DECL(rt5670_ad_monol_asrc_enum, RT5670_ASRC_3,
+ 4, rt5670_asrc_clk_source);
+
+static const SOC_ENUM_SINGLE_DECL(rt5670_ad_monor_asrc_enum, RT5670_ASRC_3,
+ 0, rt5670_asrc_clk_source);
+
+static const SOC_ENUM_SINGLE_DECL(rt5670_ad_sto2_asrc_enum, RT5670_ASRC_5,
+ 12, rt5670_asrc_clk_source);
+
+static const SOC_ENUM_SINGLE_DECL(rt5670_dsp_asrc_enum, RT5670_DSP_CLK,
+ 0, rt5670_asrc_clk_source);
+
+static int rt5670_clk_sel_put(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
+ unsigned int u_bit = 0, p_bit = 0;
+ struct soc_enum *em =
+ (struct soc_enum *)kcontrol->private_value;
+
+ switch (em->reg) {
+ case RT5670_ASRC_2:
+ switch (em->shift_l) {
+ case 0:
+ u_bit = 0x8;
+ p_bit = RT5670_PWR_ADC_S1F;
+ break;
+ case 4:
+ u_bit = 0x100;
+ p_bit = RT5670_PWR_DAC_MF_R;
+ break;
+ case 8:
+ u_bit = 0x200;
+ p_bit = RT5670_PWR_DAC_MF_L;
+ break;
+ case 12:
+ u_bit = 0x400;
+ p_bit = RT5670_PWR_DAC_S1F;
+ break;
+ }
+ break;
+ case RT5670_ASRC_3:
+ switch (em->shift_l) {
+ case 0:
+ u_bit = 0x1;
+ p_bit = RT5670_PWR_ADC_MF_R;
+ break;
+ case 4:
+ u_bit = 0x2;
+ p_bit = RT5670_PWR_ADC_MF_L;
+ break;
+ }
+ break;
+ case RT5670_ASRC_5:
+ u_bit = 0x4;
+ p_bit = RT5670_PWR_ADC_S2F;
+ break;
+ }
+
+ if (u_bit || p_bit) {
+ switch (ucontrol->value.integer.value[0]) {
+ case 1 ... 4: /*enable*/
+ if (snd_soc_read(codec, RT5670_PWR_DIG2) & p_bit)
+ snd_soc_update_bits(codec,
+ RT5670_ASRC_1, u_bit, u_bit);
+ break;
+ default: /*disable*/
+ snd_soc_update_bits(codec, RT5670_ASRC_1, u_bit, 0);
+ break;
+ }
+ }
+
+ return snd_soc_put_enum_double(kcontrol, ucontrol);
+}
+
static const struct snd_kcontrol_new rt5670_snd_controls[] = {
/* Headphone Output Volume */
SOC_DOUBLE("HP Playback Switch", RT5670_HP_VOL,
@@ -482,6 +585,24 @@ static const struct snd_kcontrol_new rt5670_snd_controls[] = {
SOC_ENUM("ADC IF2 Data Switch", rt5670_if2_adc_enum),
SOC_ENUM("DAC IF2 Data Switch", rt5670_if2_dac_enum),
+
+ SOC_ENUM_EXT("DA STO Clk Sel", rt5670_da_sto_asrc_enum,
+ snd_soc_get_enum_double, rt5670_clk_sel_put),
+ SOC_ENUM_EXT("DA MONOL Clk Sel", rt5670_da_monol_asrc_enum,
+ snd_soc_get_enum_double, rt5670_clk_sel_put),
+ SOC_ENUM_EXT("DA MONOR Clk Sel", rt5670_da_monor_asrc_enum,
+ snd_soc_get_enum_double, rt5670_clk_sel_put),
+ SOC_ENUM_EXT("AD STO1 Clk Sel", rt5670_ad_sto1_asrc_enum,
+ snd_soc_get_enum_double, rt5670_clk_sel_put),
+ SOC_ENUM_EXT("AD MONOL Clk Sel", rt5670_ad_monol_asrc_enum,
+ snd_soc_get_enum_double, rt5670_clk_sel_put),
+ SOC_ENUM_EXT("AD MONOR Clk Sel", rt5670_ad_monor_asrc_enum,
+ snd_soc_get_enum_double, rt5670_clk_sel_put),
+ SOC_ENUM("UP Clk Sel", rt5670_up_filter_asrc_enum),
+ SOC_ENUM("DOWN Clk Sel", rt5670_down_filter_asrc_enum),
+ SOC_ENUM_EXT("AD STO2 Clk Sel", rt5670_ad_sto2_asrc_enum,
+ snd_soc_get_enum_double, rt5670_clk_sel_put),
+ SOC_ENUM("DSP Clk Sel", rt5670_dsp_asrc_enum),
};
/**
--
1.8.1.1.439.g50a6b54
3
3

[alsa-devel] [PATCH 0/4] Fixup hda-emu so David's test suite does not fail
by David Henningsson 04 Sep '14
by David Henningsson 04 Sep '14
04 Sep '14
So; from what I can see, all newly discovered errors looked like errors
in hda-emu rather than errors in the codec. But I don't mind having a
second confirmation on that, because I'm not totally sure.
With these patches, my test suite is again back to 0 errors. :-)
David Henningsson (4):
hda-emu: Enable CONFIG_SND_DYNAMIC_MINORS
hda-emu: Add verbs for old Nvidia HDMI 8ch 7x
hda-emu: Allow some more codec IDs to use ATI HDMI special verbs
hda-emu/tester: Fix calculation of machines
hda-spec.c | 17 +++++++++++++++++
include/codec_config.h | 2 ++
tester/summary.py | 4 +++-
3 files changed, 22 insertions(+), 1 deletion(-)
--
1.9.1
2
5

[alsa-devel] [PATCH 0/5] hda-emu: Test all codecs, not just the first one
by David Henningsson 04 Sep '14
by David Henningsson 04 Sep '14
04 Sep '14
I've improved my test suite to test all the codecs of an alsa-info file,
instead of just testing the first one.
However, this means that some errors started to show up in my test
suite again, so it also means more work to do...but hopefully it's all
leading better quality HDA driver in the end!
David Henningsson (5):
hda-emu: Deal with two cards with one codec each
hda-emu: Quit early if requested codec index is above limit
hda-emu: Improve error message for modem codecs
hda-emu/tester: Add codec index parameter to hda-emu-tester
hda-emu/tester: Test all codecs, not just one
hda-parse.c | 29 +++++++++++++++-------
tester/hda-emu-tester.py | 2 ++
tester/runner.py | 14 +++++++++--
tester/summary.py | 62 ++++++++++++++++++++++++++++++++++++++----------
4 files changed, 83 insertions(+), 24 deletions(-)
--
1.9.1
2
6

[alsa-devel] [PATCH] ASoC: tlv320aic31xx: Enable support for S24_LE format
by Peter Ujfalusi 04 Sep '14
by Peter Ujfalusi 04 Sep '14
04 Sep '14
S24_LE is the same on the bus as S24_3LE, which means the codec can support
it.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi(a)ti.com>
---
sound/soc/codecs/tlv320aic31xx.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/sound/soc/codecs/tlv320aic31xx.h b/sound/soc/codecs/tlv320aic31xx.h
index 52ed57c69dfa..fe16c34607bb 100644
--- a/sound/soc/codecs/tlv320aic31xx.h
+++ b/sound/soc/codecs/tlv320aic31xx.h
@@ -18,7 +18,8 @@
#define AIC31XX_RATES SNDRV_PCM_RATE_8000_192000
#define AIC31XX_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE \
- | SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S32_LE)
+ | SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_LE \
+ | SNDRV_PCM_FMTBIT_S32_LE)
#define AIC31XX_STEREO_CLASS_D_BIT 0x1
--
2.1.0
2
1