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[alsa-devel] [PATCH v4 00/14] ASoC: hdac_hdmi: Add DP & notification support
by Subhransu S. Prusty 14 Jan '16

14 Jan '16

This patch series adds DP audio and hotplug notification support. On Skylake two DP ports are available and to enable DP on both ports all pins need to be enabled. There is a special vendor widget which need to be programmed to enable all pins and converters. This series adds hotplug notification, read/set constraint based on ELD, enable all pin/cvts, DP1.2, programs the audio infoframe for DP. There is a one to one mapping between converter and stream, so the dais are created based on the no of streams supported on hdmi codec. Even though cvts can be mapped dynamically to the streams, currently it is statically mapped as simultaneous playback on both DP and HDMI is not supported as of now. Pin muxes and controls are created dynamically to map converter to pin widget. So at run time specific pin is mapped to the dai based on the control selected (based on the display type DP/HDMI connected). Finally the DP audio infoframe programming is added to support the DP feature. Also with hotplug notification support, ELD is read and capabilities are set for rate, formats and channels. drm_eld sound/core framework is updated to limit the formats based on ELD. There are few fixes one fixing the static checker warning and other one not to fail if no connection list is found for a pin widget. Pls note, the 10th patch is adding a small macro for getting connection type in drm header, we have CCed drm folks on that and this one. Pls ack so that we can have this series merged thru sound trees changes in v4: - Added NULL check - Dropped the Jack reporting patch for now. Jeeja KP (2): ASoC: hdac_hdmi: Add codec suspend/resume handler ASoC: hdac_hdmi: Fix to enable device configuration in hw_params Ramesh Babu (1): ASoC: hdac_hdmi: Fix to keep display active while enumerating codec Subhransu S. Prusty (11): ASoC: hdac_hdmi: Fix to check num nodes correctly ASoC: hdac_hdmi: Fix to warn instead of err for no connected nids ASoC: hdac_hdmi: Use list to add pins and converters ASoC: hdac_hdmi: Add hotplug notification and read eld ASoC: hdac_hdmi: Apply constraints based on ELD ASoC: hdac_hdmi: Enable DP1.2 and all converters/pins ASoC: hdac_hdmi: create dais based on number of streams ASoC: hdac_hdmi: Create widget/route based on nodes enumerated ASoC: hdac_hdmi: Assign pin for stream based on dapm connection drm/edid: Add API to help find connection type ASoC: hdac_hdmi: Add infoframe support for dp audio include/drm/drm_edid.h | 12 + sound/soc/codecs/Kconfig | 1 + sound/soc/codecs/hdac_hdmi.c | 1113 +++++++++++++++++++++++++++++++++++------- 3 files changed, 948 insertions(+), 178 deletions(-) -- 1.9.1

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[alsa-devel] sound: spinlock lockup in sound/core/timer.c
by Dmitry Vyukov 13 Jan '16

13 Jan '16

Hello, The following program hangs kernel dead: // autogenerated by syzkaller (http://github.com/google/syzkaller) #include <unistd.h> #include <sys/syscall.h> #include <string.h> #include <stdint.h> #include <pthread.h> long r[42]; void *thr(void *arg) { switch ((long)arg) { case 0: r[0] = syscall(SYS_mmap, 0x20000000ul, 0x2000ul, 0x3ul, 0x32ul, 0xfffffffffffffffful, 0x0ul); break; case 1: memcpy((void*)0x20000000, "\x2f\x64\x65\x76\x2f\x73\x6e\x64\x2f\x74\x69\x6d\x65\x72", 14); r[2] = open("/dev/snd/timer", 0x181400ul, 0); break; case 2: *(uint32_t*)0x20001000 = (uint32_t)0x1; *(uint32_t*)0x20001004 = (uint32_t)0xfffffffffffffffe; *(uint32_t*)0x20001008 = (uint32_t)0x0; *(uint32_t*)0x2000100c = (uint32_t)0x3; *(uint32_t*)0x20001010 = (uint32_t)0x0; *(uint8_t*)0x20001014 = (uint8_t)0x0; *(uint8_t*)0x20001015 = (uint8_t)0x0; *(uint8_t*)0x20001016 = (uint8_t)0x0; *(uint8_t*)0x20001017 = (uint8_t)0x0; *(uint8_t*)0x20001018 = (uint8_t)0x0; *(uint8_t*)0x20001019 = (uint8_t)0x0; *(uint8_t*)0x2000101a = (uint8_t)0x0; *(uint8_t*)0x2000101b = (uint8_t)0x0; *(uint8_t*)0x2000101c = (uint8_t)0x0; *(uint8_t*)0x2000101d = (uint8_t)0x0; *(uint8_t*)0x2000101e = (uint8_t)0x0; *(uint8_t*)0x2000101f = (uint8_t)0x0; *(uint8_t*)0x20001020 = (uint8_t)0x0; *(uint8_t*)0x20001021 = (uint8_t)0x0; *(uint8_t*)0x20001022 = (uint8_t)0x0; *(uint8_t*)0x20001023 = (uint8_t)0x0; *(uint8_t*)0x20001024 = (uint8_t)0x0; *(uint8_t*)0x20001025 = (uint8_t)0x0; *(uint8_t*)0x20001026 = (uint8_t)0x0; *(uint8_t*)0x20001027 = (uint8_t)0x0; *(uint8_t*)0x20001028 = (uint8_t)0x0; *(uint8_t*)0x20001029 = (uint8_t)0x0; *(uint8_t*)0x2000102a = (uint8_t)0x0; *(uint8_t*)0x2000102b = (uint8_t)0x0; *(uint8_t*)0x2000102c = (uint8_t)0x0; *(uint8_t*)0x2000102d = (uint8_t)0x0; *(uint8_t*)0x2000102e = (uint8_t)0x0; *(uint8_t*)0x2000102f = (uint8_t)0x0; *(uint8_t*)0x20001030 = (uint8_t)0x0; *(uint8_t*)0x20001031 = (uint8_t)0x0; *(uint8_t*)0x20001032 = (uint8_t)0x0; *(uint8_t*)0x20001033 = (uint8_t)0x0; r[40] = syscall(SYS_ioctl, r[2], 0x40345410ul, 0x20001000ul, 0, 0, 0); break; case 3: r[41] = syscall(SYS_ioctl, r[2], 0x54a0ul, 0, 0, 0, 0); break; } return 0; } int main() { long i; pthread_t th[4]; memset(r, -1, sizeof(r)); for (i = 0; i < 4; i++) { pthread_create(&th[i], 0, thr, (void*)i); usleep(10000); } for (i = 0; i < 4; i++) { pthread_create(&th[i], 0, thr, (void*)i); if (i%2==0) usleep(10000); } usleep(100000); return 0; } INFO: rcu_sched detected stalls on CPUs/tasks: (detected by 1, t=26002 jiffies, g=16336, c=16335, q=82) All QSes seen, last rcu_sched kthread activity 26002 (4294782026-4294756024), jiffies_till_next_fqs=3, root ->qsmask 0x0 a.out R running task 30168 32322 30913 0x0000000a ffff880034627600 ffff88003ed07ca8 ffffffff813e63b9 00000000fffcc6b8 00000000fffcc6b8 ffff88003ed20f40 00000000fffd2c4a dffffc0000000000 0000000000000000 ffff88003ed07d80 ffffffff814b21ca 0000000000000000 Call Trace: <IRQ> [<ffffffff813e63b9>] sched_show_task+0x269/0x3b0 kernel/sched/core.c:5036 [< inline >] print_other_cpu_stall kernel/rcu/tree.c:1318 [< inline >] check_cpu_stall kernel/rcu/tree.c:1424 [< inline >] __rcu_pending kernel/rcu/tree.c:3906 [< inline >] rcu_pending kernel/rcu/tree.c:3970 [<ffffffff814b21ca>] rcu_check_callbacks+0x1dfa/0x1e10 kernel/rcu/tree.c:2795 [<ffffffff814c195a>] update_process_times+0x3a/0x70 kernel/time/timer.c:1420 [<ffffffff814eaebf>] tick_sched_handle.isra.20+0xaf/0xe0 kernel/time/tick-sched.c:151 [<ffffffff814eb5e5>] tick_sched_timer+0x75/0x100 kernel/time/tick-sched.c:1086 [< inline >] __run_hrtimer kernel/time/hrtimer.c:1229 [<ffffffff814c3723>] __hrtimer_run_queues+0x363/0xc10 kernel/time/hrtimer.c:1293 [<ffffffff814c5732>] hrtimer_interrupt+0x182/0x430 kernel/time/hrtimer.c:1327 [<ffffffff8124e10f>] local_apic_timer_interrupt+0x6f/0xe0 arch/x86/kernel/apic/apic.c:907 [<ffffffff81251576>] smp_apic_timer_interrupt+0x76/0xa0 arch/x86/kernel/apic/apic.c:931 [<ffffffff86273dec>] apic_timer_interrupt+0x8c/0xa0 arch/x86/entry/entry_64.S:520 [<ffffffff814f99bc>] smp_call_function_many+0x59c/0x720 kernel/smp.c:435 [<ffffffff81291e96>] native_flush_tlb_others+0xd6/0x370 arch/x86/mm/tlb.c:154 [< inline >] flush_tlb_others ./arch/x86/include/asm/paravirt.h:329 [<ffffffff812925fc>] flush_tlb_mm_range+0x10c/0x550 arch/x86/mm/tlb.c:220 [<ffffffff816d3a32>] tlb_flush_mmu_tlbonly+0x1e2/0x3f0 mm/memory.c:242 [< inline >] tlb_flush_mmu mm/memory.c:263 [<ffffffff816d6acb>] tlb_finish_mmu+0x1b/0xa0 mm/memory.c:275 [<ffffffff816ea5ad>] unmap_region+0x22d/0x300 mm/mmap.c:2418 [<ffffffff816f2682>] do_munmap+0x712/0xf60 mm/mmap.c:2612 [<ffffffff816f3e90>] mmap_region+0x1d0/0x11a0 mm/mmap.c:1566 [<ffffffff816f55b3>] do_mmap+0x753/0x980 mm/mmap.c:1402 [< inline >] do_mmap_pgoff include/linux/mm.h:1925 [<ffffffff816aa44f>] vm_mmap_pgoff+0x15f/0x1b0 mm/util.c:328 [< inline >] SYSC_mmap_pgoff mm/mmap.c:1452 [<ffffffff816ef9b8>] SyS_mmap_pgoff+0xc8/0x580 mm/mmap.c:1410 [< inline >] SYSC_mmap arch/x86/kernel/sys_x86_64.c:95 [<ffffffff811afa46>] SyS_mmap+0x16/0x20 arch/x86/kernel/sys_x86_64.c:86 [<ffffffff86272ff6>] entry_SYSCALL_64_fastpath+0x16/0x7a arch/x86/entry/entry_64.S:185 rcu_sched kthread starved for 26002 jiffies! g16336 c16335 f0x2 RCU_GP_WAIT_FQS(3) ->state=0x100 rcu_sched W ffff88003dfdfa98 29272 8 2 0x00000000 ffff88003dfdfa98 ffff88003ec16d40 ffff88003dfc6718 00ffed0007bfbf6f ffff88003ec20a70 ffff88003ec20a48 ffff88003ec200d8 ffff88003dfc5f08 ffff88003ec200c0 ffffffff874ddc40 ffff88003dfc5f00 ffff88003dfd8000 Call Trace: [<ffffffff86263a57>] schedule+0x97/0x1c0 kernel/sched/core.c:3311 [<ffffffff8626fbbb>] schedule_timeout+0x36b/0x920 kernel/time/timer.c:1531 [<ffffffff814ae693>] rcu_gp_kthread+0xae3/0x1b70 kernel/rcu/tree.c:2125 [<ffffffff813b2cef>] kthread+0x23f/0x2d0 drivers/block/aoe/aoecmd.c:1303 [<ffffffff862733af>] ret_from_fork+0x3f/0x70 arch/x86/entry/entry_64.S:468 BUG: spinlock lockup suspected on CPU#2, a.out/32321 lock: 0xffff88006928dc18, .magic: dead4ead, .owner: a.out/32313, .owner_cpu: 0 CPU: 2 PID: 32321 Comm: a.out Not tainted 4.4.0+ #242 Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS Bochs 01/01/2011 00000000ffffffff ffff8800339879b8 ffffffff82926eed ffff88006928dc18 ffff880063472f80 ffff8800333c4740 ffff8800339879f0 ffffffff81462f0d ffffffff84ebd130 0000000000000000 ffff88006928dc18 ffff88006928dc28 Call Trace: [< inline >] __dump_stack lib/dump_stack.c:15 [<ffffffff82926eed>] dump_stack+0x6f/0xa2 lib/dump_stack.c:50 [<ffffffff81462f0d>] spin_dump+0x14d/0x280 kernel/locking/spinlock_debug.c:67 [< inline >] __spin_lock_debug kernel/locking/spinlock_debug.c:117 [<ffffffff8146322d>] do_raw_spin_lock+0x15d/0x2b0 kernel/locking/spinlock_debug.c:137 [< inline >] __raw_spin_lock_irqsave include/linux/spinlock_api_smp.h:119 [<ffffffff862729c7>] _raw_spin_lock_irqsave+0xa7/0xd0 kernel/locking/spinlock.c:159 [<ffffffff84ebd130>] _snd_timer_stop+0xa0/0x450 sound/core/timer.c:499 [<ffffffff84ebd504>] snd_timer_stop+0x24/0x140 sound/core/timer.c:535 [< inline >] snd_timer_user_start sound/core/timer.c:1725 [<ffffffff84ec4224>] snd_timer_user_ioctl+0x684/0x2540 sound/core/timer.c:1818 [< inline >] vfs_ioctl fs/ioctl.c:43 [<ffffffff817cbd3c>] do_vfs_ioctl+0x18c/0xfa0 fs/ioctl.c:674 [< inline >] SYSC_ioctl fs/ioctl.c:689 [<ffffffff817ccbdf>] SyS_ioctl+0x8f/0xc0 fs/ioctl.c:680 [<ffffffff86272ff6>] entry_SYSCALL_64_fastpath+0x16/0x7a arch/x86/entry/entry_64.S:185 Sending NMI to all CPUs: NMI backtrace for cpu 0 CPU: 0 PID: 32313 Comm: a.out Not tainted 4.4.0+ #242 Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS Bochs 01/01/2011 task: ffff880063472f80 ti: ffff880064cd8000 task.ti: ffff880064cd8000 RIP: 0010:[<ffffffff8144b9b0>] [<ffffffff8144b9b0>] trace_hardirqs_off_caller+0x80/0x3d0 RSP: 0018:ffff880064cdf918 EFLAGS: 00000002 RAX: 0000000000000004 RBX: ffff880063472f80 RCX: ffff880063472f80 RDX: 0000000000000000 RSI: ffff880063473798 RDI: ffff88006347379c RBP: ffff880064cdf930 R08: 0000000000000001 R09: 0000000000000002 R10: 0000000000000001 R11: 0000000000000001 R12: ffff880063472f80 R13: ffffffff86272b66 R14: 00000000ffffffff R15: ffff88006d717dc0 FS: 00007fcc8e404700(0000) GS:ffff88003ec00000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 000000008005003b CR2: 00007f274232de78 CR3: 000000006698e000 CR4: 00000000000006f0 Stack: 0000000000000086 ffff88006d717dc0 ffff880033a05c58 ffff880064cdf940 ffffffff8144bd0d ffff880064cdf960 ffffffff86272b66 1ffff1000c99bf30 ffff880033a05c28 ffff880064cdfa08 ffffffff814c2f00 ffff8800324ed998 Call Trace: [<ffffffff8144bd0d>] trace_hardirqs_off+0xd/0x10 kernel/locking/lockdep.c:2657 [< inline >] __raw_spin_unlock_irqrestore include/linux/spinlock_api_smp.h:162 [<ffffffff86272b66>] _raw_spin_unlock_irqrestore+0xa6/0xc0 kernel/locking/spinlock.c:191 [< inline >] unlock_hrtimer_base kernel/time/hrtimer.c:813 [<ffffffff814c2f00>] hrtimer_try_to_cancel+0x160/0x4a0 kernel/time/hrtimer.c:1047 [<ffffffff814c3262>] hrtimer_cancel+0x22/0x40 kernel/time/hrtimer.c:1065 [<ffffffff84ec6881>] snd_hrtimer_start+0x81/0x120 sound/core/hrtimer.c:93 [<ffffffff84ec0602>] snd_timer_start1+0x212/0x2b0 sound/core/timer.c:430 [<ffffffff84ec0c71>] snd_timer_start+0x121/0x1d0 sound/core/timer.c:473 [< inline >] snd_timer_user_start sound/core/timer.c:1728 [<ffffffff84ec42c0>] snd_timer_user_ioctl+0x720/0x2540 sound/core/timer.c:1818 [< inline >] vfs_ioctl fs/ioctl.c:43 [<ffffffff817cbd3c>] do_vfs_ioctl+0x18c/0xfa0 fs/ioctl.c:674 [< inline >] SYSC_ioctl fs/ioctl.c:689 [<ffffffff817ccbdf>] SyS_ioctl+0x8f/0xc0 fs/ioctl.c:680 [<ffffffff86272ff6>] entry_SYSCALL_64_fastpath+0x16/0x7a arch/x86/entry/entry_64.S:185 Code: 4c 8b 24 25 c0 4e 01 00 49 8d bc 24 1c 08 00 00 48 b8 00 00 00 00 00 fc ff df 48 89 fa 48 c1 ea 03 0f b6 14 02 48 89 f8 83 e0 07 <83> c0 03 38 d0 7c 08 84 d2 0f 85 bf 02 00 00 41 8b b4 24 1c 08 NMI backtrace for cpu 1 CPU: 1 PID: 32322 Comm: a.out Not tainted 4.4.0+ #242 Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS Bochs 01/01/2011 task: ffff8800355fc740 ti: ffff880034620000 task.ti: ffff880034620000 RIP: 0010:[<ffffffff814f8f27>] [<ffffffff814f8f27>] smp_call_function_single+0x227/0x340 RSP: 0018:ffff880034627878 EFLAGS: 00000297 RAX: ffff8800355fc740 RBX: ffff8800346278f0 RCX: ffff8800355fcf60 RDX: 0000000000000000 RSI: ffff8800355fcf60 RDI: 0000000000000286 RBP: ffff880034627918 R08: 0000000000000007 R09: 0000000000000000 R10: 0000000000000000 R11: 0000000000000000 R12: 0000000000000000 R13: 00000000ffffffff R14: 1ffff100068c4f12 R15: dffffc0000000000 FS: 00007fd5c724e700(0000) GS:ffff88003ed00000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 000000008005003b CR2: 00007fd5c724de78 CR3: 0000000035627000 CR4: 00000000000006e0 Stack: ffff8800346279e0 ffffffff81291720 0000000200000040 0000000041b58ab3 ffffffff8733ad2f ffffffff814f8d00 ffffffff881ca238 0000000000000000 BUG: spinlock lockup suspected on CPU#3, a.out/32311 lock: 0xffff88006928dc18, .magic: dead4ead, .owner: a.out/32313, .owner_cpu: 0 CPU: 3 PID: 32311 Comm: a.out Not tainted 4.4.0+ #242 Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS Bochs 01/01/2011 00000000ffffffff ffff88006d707c60 ffffffff82926eed ffff88006928dc18 ffff880063472f80 ffff8800634717c0 ffff88006d707c98 ffffffff81462f0d ffffffff84ebe3b7 ffffffff00000000 ffff88006928dc18 ffff88006928dc28 Call Trace: <IRQ> [< inline >] __dump_stack lib/dump_stack.c:15 <IRQ> [<ffffffff82926eed>] dump_stack+0x6f/0xa2 lib/dump_stack.c:50 [<ffffffff81462f0d>] spin_dump+0x14d/0x280 kernel/locking/spinlock_debug.c:67 [< inline >] __spin_lock_debug kernel/locking/spinlock_debug.c:117 [<ffffffff8146322d>] do_raw_spin_lock+0x15d/0x2b0 kernel/locking/spinlock_debug.c:137 [< inline >] __raw_spin_lock include/linux/spinlock_api_smp.h:145 [<ffffffff86271f2b>] _raw_spin_lock+0x3b/0x50 kernel/locking/spinlock.c:151 [< inline >] spin_lock include/linux/spinlock.h:302 [<ffffffff84ebe3b7>] snd_timer_interrupt+0x677/0xbf0 sound/core/timer.c:745 [<ffffffff84ec6b26>] snd_hrtimer_callback+0x166/0x230 sound/core/hrtimer.c:54 [< inline >] __run_hrtimer kernel/time/hrtimer.c:1229 [<ffffffff814c3723>] __hrtimer_run_queues+0x363/0xc10 kernel/time/hrtimer.c:1293 [<ffffffff814c5732>] hrtimer_interrupt+0x182/0x430 kernel/time/hrtimer.c:1327 [<ffffffff8124e10f>] local_apic_timer_interrupt+0x6f/0xe0 arch/x86/kernel/apic/apic.c:907 [<ffffffff81251576>] smp_apic_timer_interrupt+0x76/0xa0 arch/x86/kernel/apic/apic.c:931 [<ffffffff86273dec>] apic_timer_interrupt+0x8c/0xa0 arch/x86/entry/entry_64.S:520 [< inline >] spin_unlock_irqrestore include/linux/spinlock.h:362 [<ffffffff84ec0c7f>] snd_timer_start+0x12f/0x1d0 sound/core/timer.c:474 [< inline >] snd_timer_user_start sound/core/timer.c:1728 [<ffffffff84ec42c0>] snd_timer_user_ioctl+0x720/0x2540 sound/core/timer.c:1818 [< inline >] vfs_ioctl fs/ioctl.c:43 [<ffffffff817cbd3c>] do_vfs_ioctl+0x18c/0xfa0 fs/ioctl.c:674 [< inline >] SYSC_ioctl fs/ioctl.c:689 [<ffffffff817ccbdf>] SyS_ioctl+0x8f/0xc0 fs/ioctl.c:680 [<ffffffff86272ff6>] entry_SYSCALL_64_fastpath+0x16/0x7a arch/x86/entry/entry_64.S:185 ffffffff81291720 ffff8800346279e0 0000000000000003 fffffbfff1039670 Call Trace: [<ffffffff814f99bc>] smp_call_function_many+0x59c/0x720 kernel/smp.c:435 [<ffffffff81291e96>] native_flush_tlb_others+0xd6/0x370 arch/x86/mm/tlb.c:154 [< inline >] flush_tlb_others ./arch/x86/include/asm/paravirt.h:329 [<ffffffff812925fc>] flush_tlb_mm_range+0x10c/0x550 arch/x86/mm/tlb.c:220 [<ffffffff816d3a32>] tlb_flush_mmu_tlbonly+0x1e2/0x3f0 mm/memory.c:242 [< inline >] tlb_flush_mmu mm/memory.c:263 [<ffffffff816d6acb>] tlb_finish_mmu+0x1b/0xa0 mm/memory.c:275 [<ffffffff816ea5ad>] unmap_region+0x22d/0x300 mm/mmap.c:2418 [<ffffffff816f2682>] do_munmap+0x712/0xf60 mm/mmap.c:2612 [<ffffffff816f3e90>] mmap_region+0x1d0/0x11a0 mm/mmap.c:1566 [<ffffffff816f55b3>] do_mmap+0x753/0x980 mm/mmap.c:1402 [< inline >] do_mmap_pgoff include/linux/mm.h:1925 [<ffffffff816aa44f>] vm_mmap_pgoff+0x15f/0x1b0 mm/util.c:328 [< inline >] SYSC_mmap_pgoff mm/mmap.c:1452 [<ffffffff816ef9b8>] SyS_mmap_pgoff+0xc8/0x580 mm/mmap.c:1410 [< inline >] SYSC_mmap arch/x86/kernel/sys_x86_64.c:95 [<ffffffff811afa46>] SyS_mmap+0x16/0x20 arch/x86/kernel/sys_x86_64.c:86 [<ffffffff86272ff6>] entry_SYSCALL_64_fastpath+0x16/0x7a arch/x86/entry/entry_64.S:185 Code: 60 ff ff ff 48 8b 95 68 ff ff ff 48 8d 73 c0 8b bd 74 ff ff ff e8 9a f9 ff ff 41 89 c4 8b 43 d8 a8 01 74 9a e8 1b b3 07 00 f3 90 <8b> 43 d8 a8 01 75 f2 eb 8a e8 0b b3 07 00 48 c7 c7 60 57 56 87 NMI backtrace for cpu 2 CPU: 2 PID: 32321 Comm: a.out Not tainted 4.4.0+ #242 Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS Bochs 01/01/2011 task: ffff8800333c4740 ti: ffff880033980000 task.ti: ffff880033980000 RIP: 0010:[<ffffffff81261bb6>] [<ffffffff81261bb6>] flat_send_IPI_mask+0x156/0x290 RSP: 0018:ffff880033987940 EFLAGS: 00000046 RAX: 0000000000000000 RBX: 0000000000000c00 RCX: 0000000000000000 RDX: 0000000000000c00 RSI: 0000000000000000 RDI: ffffffffff5fc300 RBP: ffff880033987968 R08: 0000000000000001 R09: 0000000000000000 R10: fffffbfff10e18f2 R11: 1ffffffff12758b5 R12: 0000000000000086 R13: 000000000f000000 R14: ffffffff87561c60 R15: 0000000000000002 FS: 00007fd5c7a4f700(0000) GS:ffff88006d600000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 000000008005003b CR2: 00007f2a48ebde78 CR3: 0000000035627000 CR4: 00000000000006e0 Stack: ffffffff87561c60 ffffffff881ce320 0000000000000040 fffffbfff1039670 ffff88006d71a460 ffff880033987988 ffffffff812576bb ffffffff86603680 dffffc0000000000 ffff8800339879e0 ffffffff82932402 ffffffff82926f05 Call Trace: [<ffffffff812576bb>] nmi_raise_cpu_backtrace+0x5b/0x70 arch/x86/kernel/apic/hw_nmi.c:33 [<ffffffff82932402>] nmi_trigger_all_cpu_backtrace+0x4b2/0x540 lib/nmi_backtrace.c:85 [<ffffffff81257704>] arch_trigger_all_cpu_backtrace+0x14/0x20 arch/x86/kernel/apic/hw_nmi.c:38 [< inline >] trigger_all_cpu_backtrace include/linux/nmi.h:41 [< inline >] __spin_lock_debug kernel/locking/spinlock_debug.c:119 [<ffffffff81463237>] do_raw_spin_lock+0x167/0x2b0 kernel/locking/spinlock_debug.c:137 [< inline >] __raw_spin_lock_irqsave include/linux/spinlock_api_smp.h:119 [<ffffffff862729c7>] _raw_spin_lock_irqsave+0xa7/0xd0 kernel/locking/spinlock.c:159 [<ffffffff84ebd130>] _snd_timer_stop+0xa0/0x450 sound/core/timer.c:499 [<ffffffff84ebd504>] snd_timer_stop+0x24/0x140 sound/core/timer.c:535 [< inline >] snd_timer_user_start sound/core/timer.c:1725 [<ffffffff84ec4224>] snd_timer_user_ioctl+0x684/0x2540 sound/core/timer.c:1818 [< inline >] vfs_ioctl fs/ioctl.c:43 [<ffffffff817cbd3c>] do_vfs_ioctl+0x18c/0xfa0 fs/ioctl.c:674 [< inline >] SYSC_ioctl fs/ioctl.c:689 [<ffffffff817ccbdf>] SyS_ioctl+0x8f/0xc0 fs/ioctl.c:680 [<ffffffff86272ff6>] entry_SYSCALL_64_fastpath+0x16/0x7a arch/x86/entry/entry_64.S:185 Code: 00 c3 5f ff 80 e6 10 75 e1 41 c1 e5 18 44 89 2c 25 10 c3 5f ff 44 89 fa 09 da 80 cf 04 41 83 ff 02 0f 44 d3 89 14 25 00 c3 5f ff <41> f7 c4 00 02 00 00 74 4a e8 fc fd 1e 00 48 c7 c7 68 57 56 87 NMI backtrace for cpu 3 CPU: 3 PID: 32311 Comm: a.out Not tainted 4.4.0+ #242 Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS Bochs 01/01/2011 task: ffff8800634717c0 ti: ffff880065f40000 task.ti: ffff880065f40000 RIP: 0010:[<ffffffff82953fb8>] [<ffffffff82953fb8>] delay_tsc+0x18/0x70 RSP: 0018:ffff88006d707c88 EFLAGS: 00000086 RAX: 0000000071a66e06 RBX: ffff88006928dc18 RCX: 000000000000001e RDX: 0000000000000064 RSI: 0000006471a66dc4 RDI: 0000000000000001 RBP: ffff88006d707c88 R08: 0000000000000003 R09: 0000000000000001 R10: ffff8800634717c0 R11: 0000000000000000 R12: ffff88006928dc28 R13: 000000009a9d2d40 R14: ffff88006928dc20 R15: 000000009a8c7d02 FS: 00007fbb31057700(0000) GS:ffff88006d700000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 000000008005003b CR2: 00007fcc8e403e78 CR3: 0000000032e86000 CR4: 00000000000006e0 Stack: ffff88006d707c98 ffffffff82953f0a ffff88006d707cd0 ffffffff81463219 ffff88006928dc18 ffff8800324ee230 ffffed000d251b90 ffff8800324ee220 ffff8800324ee2b0 ffff88006d707cf0 ffffffff86271f2b ffffffff84ebe3b7 Call Trace: <IRQ> d [<ffffffff82953f0a>] __delay+0xa/0x10 arch/x86/lib/delay.c:153 [< inline >] __spin_lock_debug kernel/locking/spinlock_debug.c:114 [<ffffffff81463219>] do_raw_spin_lock+0x149/0x2b0 kernel/locking/spinlock_debug.c:137 [< inline >] __raw_spin_lock include/linux/spinlock_api_smp.h:145 [<ffffffff86271f2b>] _raw_spin_lock+0x3b/0x50 kernel/locking/spinlock.c:151 [< inline >] spin_lock include/linux/spinlock.h:302 [<ffffffff84ebe3b7>] snd_timer_interrupt+0x677/0xbf0 sound/core/timer.c:745 [<ffffffff84ec6b26>] snd_hrtimer_callback+0x166/0x230 sound/core/hrtimer.c:54 [< inline >] __run_hrtimer kernel/time/hrtimer.c:1229 [<ffffffff814c3723>] __hrtimer_run_queues+0x363/0xc10 kernel/time/hrtimer.c:1293 [<ffffffff814c5732>] hrtimer_interrupt+0x182/0x430 kernel/time/hrtimer.c:1327 [<ffffffff8124e10f>] local_apic_timer_interrupt+0x6f/0xe0 arch/x86/kernel/apic/apic.c:907 [<ffffffff81251576>] smp_apic_timer_interrupt+0x76/0xa0 arch/x86/kernel/apic/apic.c:931 [<ffffffff86273dec>] apic_timer_interrupt+0x8c/0xa0 arch/x86/entry/entry_64.S:520 [< inline >] spin_unlock_irqrestore include/linux/spinlock.h:362 [<ffffffff84ec0c7f>] snd_timer_start+0x12f/0x1d0 sound/core/timer.c:474 [< inline >] snd_timer_user_start sound/core/timer.c:1728 [<ffffffff84ec42c0>] snd_timer_user_ioctl+0x720/0x2540 sound/core/timer.c:1818 [< inline >] vfs_ioctl fs/ioctl.c:43 [<ffffffff817cbd3c>] do_vfs_ioctl+0x18c/0xfa0 fs/ioctl.c:674 [< inline >] SYSC_ioctl fs/ioctl.c:689 [<ffffffff817ccbdf>] SyS_ioctl+0x8f/0xc0 fs/ioctl.c:680 [<ffffffff86272ff6>] entry_SYSCALL_64_fastpath+0x16/0x7a arch/x86/entry/entry_64.S:185 Code: 48 8d 7a 01 ff 15 a9 ad f8 04 5d c3 0f 1f 80 00 00 00 00 55 65 ff 05 a8 0e 6c 7d 48 89 e5 65 44 8b 05 6d f1 6b 7d 0f ae e8 0f 31 <48> c1 e2 20 48 89 d6 48 09 c6 0f ae e8 0f 31 48 c1 e2 20 48 09 On commit 67990608c8b95d2b8ccc29932376ae73d5818727 (Jan 12).

1 0

[alsa-devel] Additions to simple-audio-card
by Ricard Wanderlof 13 Jan '16

13 Jan '16

I'm trying to use simple-audio-card in a system with an ADAU1361, as it seems that the basic functionality is what I need without resort to writing a specialized machine driver, however there are a couple of shortcomings related to my particular patch which I want to discuss before venturing off on a tangent: 1. The ADAU1361 needs its PLL set up using snd_soc_dai_ops.set_pll, however simple-audio-card has no support for this. Would it be a good idea to augment simple-audio-card with this? After all, it does set_sysclk. 2. simple-audio-card unconditionally uses clk_prepare_enable to start the CPU DAI and CODEC DAI clocks. In the particular system I have here however, the clock hierarchy is not modelled in DT. I would rather make these calls conditional on the corresponding clk variable, i.e. if no clock has been defined for the DAI in question, no attempt is done to do clk_prepare_enable either. 3. It would be nice if simple-audio-card could support off-codec widgets, e.g. switches that are not built into the codec, via the gpio framework. That is, you could set up ALSA controls which control a feature via gpio. I'm prepared to do the actual work, but it warrants a bit of discussion whether or not these things are a good idea to start with. If too much features are added to simple-audio-card it might not be so simple any more, on the other hand, it would do very nicely as a more and more general device tree based machine driver which is simple to use. /Ricard -- Ricard Wolf Wanderlöf ricardw(at)axis.com Axis Communications AB, Lund, Sweden www.axis.com Phone +46 46 272 2016 Fax +46 46 13 61 30

1 0

[alsa-devel] sound: GPF in snd_timer_user_params
by Dmitry Vyukov 13 Jan '16

13 Jan '16

Hello, The following program triggers GPF in snd_timer_user_params: // autogenerated by syzkaller (http://github.com/google/syzkaller) #include <unistd.h> #include <sys/syscall.h> #include <string.h> #include <stdint.h> #include <pthread.h> long r[108]; void *thr(void *arg) { switch ((long)arg) { case 0: r[0] = syscall(SYS_mmap, 0x20000000ul, 0xf000ul, 0x3ul, 0x32ul, 0xfffffffffffffffful, 0x0ul); break; case 1: memcpy((void*)0x20000990, "\x2f\x64\x65\x76\x2f\x73\x6e\x64\x2f\x74\x69\x6d\x65\x72", 14); r[2] = syscall(SYS_open, 0x20000990ul, 0x40ul, 0x0ul, 0, 0, 0); break; case 2: r[3] = syscall(SYS_ioctl, r[2], 0x54a0ul, 0, 0, 0, 0); break; case 3: *(uint32_t*)0x20000000 = (uint32_t)0x1; *(uint32_t*)0x20000004 = (uint32_t)0x7; *(uint32_t*)0x20000008 = (uint32_t)0x3; *(uint32_t*)0x2000000c = (uint32_t)0x0; *(uint32_t*)0x20000010 = (uint32_t)0x0; *(uint8_t*)0x20000014 = (uint8_t)0x0; *(uint8_t*)0x20000015 = (uint8_t)0x0; *(uint8_t*)0x20000016 = (uint8_t)0x0; *(uint8_t*)0x20000017 = (uint8_t)0x0; *(uint8_t*)0x20000018 = (uint8_t)0x0; *(uint8_t*)0x20000019 = (uint8_t)0x0; *(uint8_t*)0x2000001a = (uint8_t)0x0; *(uint8_t*)0x2000001b = (uint8_t)0x0; *(uint8_t*)0x2000001c = (uint8_t)0x0; *(uint8_t*)0x2000001d = (uint8_t)0x0; *(uint8_t*)0x2000001e = (uint8_t)0x0; *(uint8_t*)0x2000001f = (uint8_t)0x0; *(uint8_t*)0x20000020 = (uint8_t)0x0; *(uint8_t*)0x20000021 = (uint8_t)0x0; *(uint8_t*)0x20000022 = (uint8_t)0x0; *(uint8_t*)0x20000023 = (uint8_t)0x0; *(uint8_t*)0x20000024 = (uint8_t)0x0; *(uint8_t*)0x20000025 = (uint8_t)0x0; *(uint8_t*)0x20000026 = (uint8_t)0x0; *(uint8_t*)0x20000027 = (uint8_t)0x0; *(uint8_t*)0x20000028 = (uint8_t)0x0; *(uint8_t*)0x20000029 = (uint8_t)0x0; *(uint8_t*)0x2000002a = (uint8_t)0x0; *(uint8_t*)0x2000002b = (uint8_t)0x0; *(uint8_t*)0x2000002c = (uint8_t)0x0; *(uint8_t*)0x2000002d = (uint8_t)0x0; *(uint8_t*)0x2000002e = (uint8_t)0x0; *(uint8_t*)0x2000002f = (uint8_t)0x0; *(uint8_t*)0x20000030 = (uint8_t)0x0; *(uint8_t*)0x20000031 = (uint8_t)0x0; *(uint8_t*)0x20000032 = (uint8_t)0x0; *(uint8_t*)0x20000033 = (uint8_t)0x0; r[41] = syscall(SYS_ioctl, r[2], 0x40345410ul, 0x20000000ul, 0, 0, 0); break; case 4: *(uint32_t*)0x20005731 = (uint32_t)0x5; *(uint32_t*)0x20005735 = (uint32_t)0x7; *(uint32_t*)0x20005739 = (uint32_t)0x0; *(uint32_t*)0x2000573d = (uint32_t)0x0; *(uint32_t*)0x20005741 = (uint32_t)0x5; *(uint8_t*)0x20005745 = (uint8_t)0x0; *(uint8_t*)0x20005746 = (uint8_t)0x0; *(uint8_t*)0x20005747 = (uint8_t)0x0; *(uint8_t*)0x20005748 = (uint8_t)0x0; *(uint8_t*)0x20005749 = (uint8_t)0x0; *(uint8_t*)0x2000574a = (uint8_t)0x0; *(uint8_t*)0x2000574b = (uint8_t)0x0; *(uint8_t*)0x2000574c = (uint8_t)0x0; *(uint8_t*)0x2000574d = (uint8_t)0x0; *(uint8_t*)0x2000574e = (uint8_t)0x0; *(uint8_t*)0x2000574f = (uint8_t)0x0; *(uint8_t*)0x20005750 = (uint8_t)0x0; *(uint8_t*)0x20005751 = (uint8_t)0x0; *(uint8_t*)0x20005752 = (uint8_t)0x0; *(uint8_t*)0x20005753 = (uint8_t)0x0; *(uint8_t*)0x20005754 = (uint8_t)0x0; *(uint8_t*)0x20005755 = (uint8_t)0x0; *(uint8_t*)0x20005756 = (uint8_t)0x0; *(uint8_t*)0x20005757 = (uint8_t)0x0; *(uint8_t*)0x20005758 = (uint8_t)0x0; *(uint8_t*)0x20005759 = (uint8_t)0x0; *(uint8_t*)0x2000575a = (uint8_t)0x0; *(uint8_t*)0x2000575b = (uint8_t)0x0; *(uint8_t*)0x2000575c = (uint8_t)0x0; *(uint8_t*)0x2000575d = (uint8_t)0x0; *(uint8_t*)0x2000575e = (uint8_t)0x0; *(uint8_t*)0x2000575f = (uint8_t)0x0; *(uint8_t*)0x20005760 = (uint8_t)0x0; *(uint8_t*)0x20005761 = (uint8_t)0x0; *(uint8_t*)0x20005762 = (uint8_t)0x0; *(uint8_t*)0x20005763 = (uint8_t)0x0; *(uint8_t*)0x20005764 = (uint8_t)0x0; *(uint8_t*)0x20005765 = (uint8_t)0x0; *(uint8_t*)0x20005766 = (uint8_t)0x0; *(uint8_t*)0x20005767 = (uint8_t)0x0; *(uint8_t*)0x20005768 = (uint8_t)0x0; *(uint8_t*)0x20005769 = (uint8_t)0x0; *(uint8_t*)0x2000576a = (uint8_t)0x0; *(uint8_t*)0x2000576b = (uint8_t)0x0; *(uint8_t*)0x2000576c = (uint8_t)0x0; *(uint8_t*)0x2000576d = (uint8_t)0x0; *(uint8_t*)0x2000576e = (uint8_t)0x0; *(uint8_t*)0x2000576f = (uint8_t)0x0; *(uint8_t*)0x20005770 = (uint8_t)0x0; *(uint8_t*)0x20005771 = (uint8_t)0x0; *(uint8_t*)0x20005772 = (uint8_t)0x0; *(uint8_t*)0x20005773 = (uint8_t)0x0; *(uint8_t*)0x20005774 = (uint8_t)0x0; *(uint8_t*)0x20005775 = (uint8_t)0x0; *(uint8_t*)0x20005776 = (uint8_t)0x0; *(uint8_t*)0x20005777 = (uint8_t)0x0; *(uint8_t*)0x20005778 = (uint8_t)0x0; *(uint8_t*)0x20005779 = (uint8_t)0x0; *(uint8_t*)0x2000577a = (uint8_t)0x0; *(uint8_t*)0x2000577b = (uint8_t)0x0; *(uint8_t*)0x2000577c = (uint8_t)0x0; *(uint8_t*)0x2000577d = (uint8_t)0x0; *(uint8_t*)0x2000577e = (uint8_t)0x0; *(uint8_t*)0x2000577f = (uint8_t)0x0; *(uint8_t*)0x20005780 = (uint8_t)0x0; r[107] = syscall(SYS_ioctl, r[2], 0x40505412ul, 0x20005731ul, 0, 0, 0); break; } return 0; } int main() { long i; pthread_t th[5]; memset(r, -1, sizeof(r)); for (i = 0; i < 5; i++) { pthread_create(&th[i], 0, thr, (void*)i); usleep(10000); } for (i = 0; i < 5; i++) { pthread_create(&th[i], 0, thr, (void*)i); if (i%2==0) usleep(10000); } usleep(100000); return 0; } kasan: GPF could be caused by NULL-ptr deref or user memory accessgeneral protection fault: 0000 [#1] SMP DEBUG_PAGEALLOC KASAN Modules linked in: CPU: 3 PID: 6811 Comm: syz-executor Not tainted 4.4.0+ #240 Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS Bochs 01/01/2011 task: ffff880033ca97c0 ti: ffff8800337b8000 task.ti: ffff8800337b8000 RIP: 0010:[<ffffffff84ec20fb>] [<ffffffff84ec20fb>] snd_timer_user_params.isra.17+0x5fb/0x9f0 RSP: 0018:ffff8800337bf9a0 EFLAGS: 00010246 RAX: dffffc0000000000 RBX: ffff88003578c000 RCX: ffff880033ca97c0 RDX: 0000000000000000 RSI: 0000000000000001 RDI: ffff88003578c030 RBP: ffff8800337bfad0 R08: 0000000000000001 R09: 0000000000000000 R10: 0000000000000000 R11: 0000000000000000 R12: 1ffff100066f7f39 R13: ffff8800337bfaa8 R14: 0000000000000000 R15: 0000000020005731 FS: 00007fd5971aa700(0000) GS:ffff88006d700000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 000000008005003b CR2: 0000000020000990 CR3: 0000000063509000 CR4: 00000000000006e0 Stack: dffffc0000000000 ffffffff814ef860 ffff8800337bfbc0 ffff88003607c508 ffff8800337bfa28 0000000041b58ab3 ffffffff873dff68 ffffffff84ec1b00 ffffffff00000000 0000000000000000 1ffff100067952f9 ffff880033ca97c0 Call Trace: [<ffffffff84ec51ca>] snd_timer_user_ioctl+0x163a/0x2540 sound/core/timer.c:1813 [< inline >] vfs_ioctl fs/ioctl.c:43 [<ffffffff817cbd3c>] do_vfs_ioctl+0x18c/0xfa0 fs/ioctl.c:674 [< inline >] SYSC_ioctl fs/ioctl.c:689 [<ffffffff817ccbdf>] SyS_ioctl+0x8f/0xc0 fs/ioctl.c:680 [<ffffffff86272ff6>] entry_SYSCALL_64_fastpath+0x16/0x7a arch/x86/entry/entry_64.S:185 Code: 00 00 fc ff df 48 89 fa 48 c1 ea 03 80 3c 02 00 0f 85 60 03 00 00 4c 8b 73 30 48 b8 00 00 00 00 00 fc ff df 4c 89 f2 48 c1 ea 03 <0f> b6 14 02 4c 89 f0 83 e0 07 83 c0 03 38 d0 7c 08 84 d2 0f 85 RIP [<ffffffff84ec20fb>] snd_timer_user_params.isra.17+0x5fb/0x9f0 sound/core/timer.c:1680 RSP <ffff8800337bf9a0> ---[ end trace 34f31d6e8ce26f6b ]--- On commit 67990608c8b95d2b8ccc29932376ae73d5818727 (Jan 12).

1 0

[alsa-devel] Regression in Traktor Audio10 driver (snd-usb-audio) mixer flags
by Owen Williams 13 Jan '16

13 Jan '16

Sometime between kernels 3.13 (ubuntu 14.04) and 3.19 (15.04) there was a regression that caused the mixer elements of the Traktor Audio10 driver to stop responding to changes to True. I have an older machine still running 14.04, and if I open alsamixer I can see and interact with the 8 basic boolean switches: numid=3,iface=MIXER,name='Direct Thru Channel A' ; type=BOOLEAN,access=rw------,values=1 : values=off numid=4,iface=MIXER,name='Direct Thru Channel B' ; type=BOOLEAN,access=rw------,values=1 : values=off numid=5,iface=MIXER,name='Direct Thru Channel C' ; type=BOOLEAN,access=rw------,values=1 : values=off numid=6,iface=MIXER,name='Direct Thru Channel D' ; type=BOOLEAN,access=rw------,values=1 : values=off numid=7,iface=MIXER,name='Phono Input Channel A' ; type=BOOLEAN,access=rw------,values=1 : values=off numid=8,iface=MIXER,name='Phono Input Channel B' ; type=BOOLEAN,access=rw------,values=1 : values=off numid=9,iface=MIXER,name='Phono Input Channel C' ; type=BOOLEAN,access=rw------,values=1 : values=off numid=10,iface=MIXER,name='Phono Input Channel D' ; type=BOOLEAN,access=rw------,values=1 : values=off or I can use amixer: amixer -c T10 cset numid=8 on however on my newer machine, with ubuntu 15.04 and 15.10, I am unable to change the values to true. I am a member of the audio group and I have also tried with sudo, but when I try to set the value on nothing happens: $ amixer -c T10 cset numid=8 on numid=8,iface=MIXER,name='Phono Input Channel B' ; type=BOOLEAN,access=rw------,values=1 : values=off The fun part is, if I connect the card to my mac I can set startup conditions for these flags. I can set them to true, and when I connect to my linux machines the flags start up as true. And then, even on the newer kernel, I can turn them off! But I can't turn them back on again. This sound card is the one I'd like to recommend officially for the Mixxx DJ project so I'd really like to get to the bottom of this issue. thanks, Owen Williams A Lead Developer, Mixxx.org

2 10

[alsa-devel] sound: use-after-free in snd_timer_user_ioctl
by Dmitry Vyukov 13 Jan '16

13 Jan '16

Hello, The following syzkaller-generated program triggers use-after-free in snd_timer_user_ioctl: https://gist.githubusercontent.com/dvyukov/e833610757b098956b50/raw/d819cd1… ------------[ cut here ]------------ WARNING: CPU: 1 PID: 2066 at lib/list_debug.c:53 __list_del_entry+0x10b/0x1e0() list_del corruption, ffff8800359fd740->next is LIST_POISON1 (dead000000000100) Modules linked in: CPU: 1 PID: 2066 Comm: syz-executor Not tainted 4.4.0+ #240 Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS Bochs 01/01/2011 00000000ffffffff ffff880034b67938 ffffffff82926eed ffff880034b679a8 ffff880034a00000 ffffffff8660b640 ffff880034b67978 ffffffff81350c89 ffffffff8298e77b ffffed000696cf31 ffffffff8660b640 0000000000000035 Call Trace: [< inline >] __dump_stack lib/dump_stack.c:15 [<ffffffff82926eed>] dump_stack+0x6f/0xa2 lib/dump_stack.c:50 [<ffffffff81350c89>] warn_slowpath_common+0xd9/0x140 kernel/panic.c:483 [<ffffffff81350d99>] warn_slowpath_fmt+0xa9/0xd0 kernel/panic.c:495 [<ffffffff8298e77b>] __list_del_entry+0x10b/0x1e0 lib/list_debug.c:51 [< inline >] list_move_tail include/linux/list.h:168 [<ffffffff84ec0411>] snd_timer_start1+0x31/0x2b0 sound/core/timer.c:421 [<ffffffff84ec07b0>] snd_timer_continue+0x120/0x1b0 sound/core/timer.c:568 [< inline >] snd_timer_user_continue sound/core/timer.c:1751 [<ffffffff84ec493b>] snd_timer_user_ioctl+0xdab/0x2540 sound/core/timer.c:1824 [< inline >] vfs_ioctl fs/ioctl.c:43 [<ffffffff817cbd3c>] do_vfs_ioctl+0x18c/0xfa0 fs/ioctl.c:674 [< inline >] SYSC_ioctl fs/ioctl.c:689 [<ffffffff817ccbdf>] SyS_ioctl+0x8f/0xc0 fs/ioctl.c:680 [<ffffffff86272ff6>] entry_SYSCALL_64_fastpath+0x16/0x7a arch/x86/entry/entry_64.S:185 ---[ end trace 384a7ce57530be36 ]--- ------------[ cut here ]------------ On commit 67990608c8b95d2b8ccc29932376ae73d5818727 (Jan 12).

1 0

[alsa-devel] [PATCH 0/2] ASoC: fsl: make snd-soc-imx-sgtl5000 driver useable on i.MX6UL
by Lothar Waßmann 13 Jan '16

13 Jan '16

This patchset adds support for the i.MX6UL SoC to the imx-sgtl5000 sound driver. The first patch makes the audmux setup optional for the driver, since i.MX6UL does not have this unit. The second patch selects the SAI interface rather than the SSI interface for the i.MX6UL SoC. A patch to make the corresponding DTB changes has been sent separately.

4 9

[alsa-devel] [PATCH] ALSA: hda - fix the headset mic detection problem for a Dell laptop
by Hui Wang 13 Jan '16

13 Jan '16

The machine uses codec alc255, and the pin configuration value for pin 0x14 on this machine is 0x90171130 which is not in the pin quirk table yet. Cc: stable(a)vger.kernel.org BugLink: https://bugs.launchpad.net/bugs/1533461 Signed-off-by: Hui Wang <hui.wang(a)canonical.com> --- sound/pci/hda/patch_realtek.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index f0ed41e..61d8502 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -5626,6 +5626,10 @@ static const struct snd_hda_pin_quirk alc269_pin_fixup_tbl[] = { {0x21, 0x02211040}), SND_HDA_PIN_QUIRK(0x10ec0255, 0x1028, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE, {0x12, 0x90a60170}, + {0x14, 0x90171130}, + {0x21, 0x02211040}), + SND_HDA_PIN_QUIRK(0x10ec0255, 0x1028, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE, + {0x12, 0x90a60170}, {0x14, 0x90170140}, {0x21, 0x02211050}), SND_HDA_PIN_QUIRK(0x10ec0255, 0x1028, "Dell Inspiron 5548", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE, -- 1.9.1

2 1

[alsa-devel] Managing Android vs. UCM configuration
by Arun Raghavan 13 Jan '16

13 Jan '16

Hi folks, I'd spoken briefly about this at the Audio mini-summit at Dublin, and promised to send out a link. I've been working on a tool to automate translating Android mixer_paths.xml to UCM that PulseAudion (or CrAS or anything else) can consume. I've now written a bit about it at: http://arunraghavan.net/2016/01/audio-devices-and-configuration/ The code is up at: https://github.com/ford-prefect/xml2ucm I'll try to provide a quicker way to take this stuff out for a spin than building it yourself soon. Cheers, Arun

1 0

[alsa-devel] ASoC: multicodec: How to specify one codec as master and all others as slave
by Caleb Crome 13 Jan '16

13 Jan '16

Hi there, With a multi-codec setup, what's the 'correct' way to tell one codec to be master (i.e. send bit/word clock) and all the others to be slave? For example, I've got 8 stereo codecs (4x aic34), labeled, say aic_a, aic_b, aic_c, aic_d, aic_e, aic_f, aic_g, aic_h, and I want aic_a: SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_DSP_A and all others to see SND_SOC_DAIFMT_CBS_CFS | SND_SOC_DAIFMT_DSP_A Is there an elegant way to do that? I see in soc-core.c:snd_soc_runtime_set_dai_fmt(rtd, dai_fmt) that it sets all codecs to the same format, then flips the polarity for the CPU. It seems this is not really correct behavior in multicodec mode when the codec is master, right? Should there be some way to mark one of the many possibilities as the master? My current thinking is to not set snd_soc_dai_link.dai_fmt to prevent snd_soc_runtime_set_dai_fmt from doing the wrong thing, then call each individual snd_soc_dai_set_fmt from the init function. Thanks, --Caleb

1 0

[alsa-devel] [PATCH v2] sound: hda_intel: add card number to irq description
by Heiner Kallweit 12 Jan '16

12 Jan '16

Currently the info in /proc/interrupts doesn't allow to figure out which interrupt belongs to which card (HDMI, PCH, ..). Therefore add card details to the interrupt description. With the patch the info in /proc/interrupts looks like this: PCI-MSI 442368-edge snd_hda_intel:card1 PCI-MSI 49152-edge snd_hda_intel:card0 Signed-off-by: Heiner Kallweit <hkallweit1(a)gmail.com> --- v2: Make extension more generic and implement it in snd_card. This way every driver using struct snd_card can easily be switched to using the more descriptive irq describer. --- include/sound/core.h | 1 + sound/core/init.c | 3 +++ sound/pci/hda/hda_intel.c | 2 +- 3 files changed, 5 insertions(+), 1 deletion(-) diff --git a/include/sound/core.h b/include/sound/core.h index cdfecaf..31079ea 100644 --- a/include/sound/core.h +++ b/include/sound/core.h @@ -99,6 +99,7 @@ struct snd_card { char driver[16]; /* driver name */ char shortname[32]; /* short name of this soundcard */ char longname[80]; /* name of this soundcard */ + char irq_descr[32]; /* Interrupt description */ char mixername[80]; /* mixer name */ char components[128]; /* card components delimited with space */ diff --git a/sound/core/init.c b/sound/core/init.c index 20f37fb..6bda843 100644 --- a/sound/core/init.c +++ b/sound/core/init.c @@ -268,6 +268,9 @@ int snd_card_new(struct device *parent, int idx, const char *xid, if (err < 0) goto __error; + snprintf(card->irq_descr, sizeof(card->irq_descr), "%s:%s", + dev_driver_string(card->dev), dev_name(&card->card_dev)); + /* the control interface cannot be accessed from the user space until */ /* snd_cards_bitmask and snd_cards are set with snd_card_register */ err = snd_ctl_create(card); diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index 83800ac..c0bef11 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c @@ -725,7 +725,7 @@ static int azx_acquire_irq(struct azx *chip, int do_disconnect) if (request_irq(chip->pci->irq, azx_interrupt, chip->msi ? 0 : IRQF_SHARED, - KBUILD_MODNAME, chip)) { + chip->card->irq_descr, chip)) { dev_err(chip->card->dev, "unable to grab IRQ %d, disabling device\n", chip->pci->irq); -- 2.6.4

3 6

[alsa-devel] [PATCH] ALSA: hda - Fix white noise on Dell Latitude E5550
by Takashi Iwai 12 Jan '16

12 Jan '16

Dell Latitude E5550 (1028:062c) has a white noise problem like other Latitude E models, and it gets fixed by the very same quirk as well. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=110591 Cc: <stable(a)vger.kernel.org> # v4.1+ Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- sound/pci/hda/patch_realtek.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index 2fdda51d07c4..f0ed41e1a884 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -5339,6 +5339,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { SND_PCI_QUIRK(0x1028, 0x05f6, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE), SND_PCI_QUIRK(0x1028, 0x0615, "Dell Vostro 5470", ALC290_FIXUP_SUBWOOFER_HSJACK), SND_PCI_QUIRK(0x1028, 0x0616, "Dell Vostro 5470", ALC290_FIXUP_SUBWOOFER_HSJACK), + SND_PCI_QUIRK(0x1028, 0x062c, "Dell Latitude E5550", ALC292_FIXUP_DELL_E7X), SND_PCI_QUIRK(0x1028, 0x062e, "Dell Latitude E7450", ALC292_FIXUP_DELL_E7X), SND_PCI_QUIRK(0x1028, 0x0638, "Dell Inspiron 5439", ALC290_FIXUP_MONO_SPEAKERS_HSJACK), SND_PCI_QUIRK(0x1028, 0x064a, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE), -- 2.7.0

1 0

[alsa-devel] sound: use-after-free in snd_timer_stop
by Dmitry Vyukov 12 Jan '16

12 Jan '16

Hello, I've hit the following use-after-free while running syzkaller fuzzer. It is followed by a splat of other reports and finally kernel death. I wasn't able to reproduce it with a standalone C program (there is probably some global state involved). But it reproduces by replaying fuzzer logs in a loop (you will need Go toolchain): $ go get github.com/google/syzkaller $ cd $GOPATH/src/github.com/google/syzkaller $ make executor execprog $ scp bin/syz-executor bin/syz-execprog your@machine $ scp snd_timer_stop your@machine # the attached file on test machine: $ ./syz-execprog -executor ./syz-executor -cover=0 -repeat=0 -procs=16 snd_timer_stop ================================================================== BUG: KASAN: use-after-free in _snd_timer_stop+0x394/0x450 at addr ffff8800356d0b70 Read of size 4 by task syz-executor/6313 ============================================================================= BUG kmalloc-256 (Not tainted): kasan: bad access detected ----------------------------------------------------------------------------- INFO: Allocated in snd_timer_instance_new+0x52/0x3a0 age=20 cpu=1 pid=6312 [< none >] ___slab_alloc+0x486/0x4e0 mm/slub.c:2468 [< none >] __slab_alloc+0x66/0xc0 mm/slub.c:2497 [< inline >] slab_alloc_node mm/slub.c:2560 [< inline >] slab_alloc mm/slub.c:2602 [< none >] kmem_cache_alloc_trace+0x284/0x310 mm/slub.c:2619 [< inline >] kmalloc include/linux/slab.h:458 [< inline >] kzalloc include/linux/slab.h:602 [< none >] snd_timer_instance_new+0x52/0x3a0 sound/core/timer.c:105 [< none >] snd_timer_open+0x4ff/0xc50 sound/core/timer.c:286 [< none >] snd_seq_timer_open+0x223/0x540 sound/core/seq/seq_timer.c:279 [< none >] snd_seq_queue_use+0x147/0x230 sound/core/seq/seq_queue.c:526 [< none >] snd_seq_queue_alloc+0x36a/0x4d0 sound/core/seq/seq_queue.c:197 [< none >] snd_seq_ioctl_create_queue+0xdb/0x2b0 sound/core/seq/seq_clientmgr.c:1536 [< none >] snd_seq_do_ioctl+0x19a/0x1c0 sound/core/seq/seq_clientmgr.c:2209 [< none >] snd_seq_ioctl+0x5d/0x80 sound/core/seq/seq_clientmgr.c:2224 [< inline >] vfs_ioctl fs/ioctl.c:43 [< none >] do_vfs_ioctl+0x681/0xe40 fs/ioctl.c:607 [< inline >] SYSC_ioctl fs/ioctl.c:622 [< none >] SyS_ioctl+0x8f/0xc0 fs/ioctl.c:613 [< none >] entry_SYSCALL_64_fastpath+0x16/0x7a arch/x86/entry/entry_64.S:185 INFO: Freed in snd_timer_close+0x351/0x5e0 age=10 cpu=3 pid=6345 [< none >] __slab_free+0x1fc/0x320 mm/slub.c:2678 [< inline >] slab_free mm/slub.c:2833 [< none >] kfree+0x2a8/0x2d0 mm/slub.c:3662 [< none >] snd_timer_close+0x351/0x5e0 sound/core/timer.c:364 [< none >] snd_seq_timer_close+0x9e/0x100 sound/core/seq/seq_timer.c:312 [< none >] snd_seq_queue_timer_close+0x28/0x50 sound/core/seq/seq_queue.c:473 [< none >] snd_seq_ioctl_set_queue_timer+0x159/0x300 sound/core/seq/seq_clientmgr.c:1809 [< none >] snd_seq_do_ioctl+0x19a/0x1c0 sound/core/seq/seq_clientmgr.c:2209 [< none >] snd_seq_ioctl+0x5d/0x80 sound/core/seq/seq_clientmgr.c:2224 [< inline >] vfs_ioctl fs/ioctl.c:43 [< none >] do_vfs_ioctl+0x681/0xe40 fs/ioctl.c:607 [< inline >] SYSC_ioctl fs/ioctl.c:622 [< none >] SyS_ioctl+0x8f/0xc0 fs/ioctl.c:613 [< none >] entry_SYSCALL_64_fastpath+0x16/0x7a arch/x86/entry/entry_64.S:185 INFO: Slab 0xffffea0000d5b400 objects=22 used=8 fp=0xffff8800356d0b60 flags=0x1fffc0000004080 INFO: Object 0xffff8800356d0b60 @offset=2912 fp=0xffff8800356d27d0 CPU: 0 PID: 6313 Comm: syz-executor Tainted: G B 4.4.0+ #222 Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS Bochs 01/01/2011 00000000ffffffff ffff880036757748 ffffffff82904add ffff88003e807000 ffff8800356d0b60 ffff8800356d0000 ffff880036757778 ffffffff8172af94 ffff88003e807000 ffffea0000d5b400 ffff8800356d0b60 ffff8800356d0b60 Call Trace: [<ffffffff817344ae>] __asan_report_load4_noabort+0x3e/0x40 mm/kasan/report.c:294 [<ffffffff84aefda4>] _snd_timer_stop+0x394/0x450 sound/core/timer.c:488 [<ffffffff84aefe84>] snd_timer_stop+0x24/0x140 sound/core/timer.c:535 [<ffffffff84b6947e>] snd_seq_timer_close+0x7e/0x100 sound/core/seq/seq_timer.c:311 [<ffffffff84b6235b>] queue_delete+0x3b/0x90 sound/core/seq/seq_queue.c:146 [<ffffffff84b63f86>] snd_seq_queue_client_leave+0x36/0x130 sound/core/seq/seq_queue.c:593 [<ffffffff84b558a8>] seq_free_client1+0x58/0x290 sound/core/seq/seq_clientmgr.c:273 [<ffffffff84b55b45>] seq_free_client+0x65/0x160 sound/core/seq/seq_clientmgr.c:299 [<ffffffff84b5882d>] snd_seq_release+0x4d/0xb0 sound/core/seq/seq_clientmgr.c:380 [<ffffffff8177b453>] __fput+0x233/0x780 fs/file_table.c:208 [<ffffffff8177ba25>] ____fput+0x15/0x20 fs/file_table.c:244 [<ffffffff8139a8fb>] task_work_run+0x16b/0x200 kernel/task_work.c:115 [< inline >] exit_task_work include/linux/task_work.h:21 [<ffffffff81347b4b>] do_exit+0x8bb/0x2b20 kernel/exit.c:750 [<ffffffff81349f28>] do_group_exit+0x108/0x320 kernel/exit.c:880 [<ffffffff8136d124>] get_signal+0x5e4/0x1500 kernel/signal.c:2307 [<ffffffff81192d83>] do_signal+0x83/0x1c90 arch/x86/kernel/signal.c:712 [<ffffffff81006685>] exit_to_usermode_loop+0x1a5/0x210 arch/x86/entry/common.c:247 [< inline >] prepare_exit_to_usermode arch/x86/entry/common.c:282 [<ffffffff8100851a>] syscall_return_slowpath+0x2ba/0x340 arch/x86/entry/common.c:344 [<ffffffff85e74a62>] int_ret_from_sys_call+0x25/0x9f arch/x86/entry/entry_64.S:281 ================================================================== On commit afd2ff9b7e1b367172f18ba7f693dfb62bdcb2dc (Jan 10).

2 4

[alsa-devel] sound: GPF in snd_seq_fifo_clear
by Dmitry Vyukov 12 Jan '16

12 Jan '16

Hello, The following program triggers GPF in snd_seq_fifo_clear: // autogenerated by syzkaller (http://github.com/google/syzkaller) #include <unistd.h> #include <sys/syscall.h> #include <string.h> #include <stdlib.h> #include <stdint.h> #include <pthread.h> int fd; void *thr(void *arg) { switch ((long)arg) { case 0: *(uint32_t*)0x20001fb0 = (uint32_t)0x1; *(uint64_t*)0x20001fc8 = (uint64_t)0x0; *(uint64_t*)0x20001fd0 = (uint64_t)0x0; *(uint8_t*)0x20001fd8 = (uint8_t)0x3; *(uint8_t*)0x20001fd9 = (uint8_t)0x32be; *(uint8_t*)0x20001fda = (uint8_t)0x36; *(uint8_t*)0x20001fdb = (uint8_t)0x5120; *(uint32_t*)0x20001fdc = (uint32_t)0x0; *(uint8_t*)0x20001fe0 = (uint8_t)0x4; *(uint32_t*)0x20001fe4 = (uint32_t)0x0; *(uint32_t*)0x20001fe8 = (uint32_t)0x0; *(uint32_t*)0x20001fec = (uint32_t)0x0; *(uint32_t*)0x20001ff0 = (uint32_t)0x0; *(uint32_t*)0x20001ff4 = (uint32_t)0x0; *(uint32_t*)0x20001ff8 = (uint32_t)0x0; *(uint32_t*)0x20001ffc = (uint32_t)0x0; *(uint32_t*)0x20002000 = (uint32_t)0x0; *(uint32_t*)0x20002004 = (uint32_t)0x0; *(uint32_t*)0x20002008 = (uint32_t)0x0; syscall(SYS_ioctl, fd, 0x4040534eul, 0x20001fb0ul, 0, 0, 0); break; case 1: *(uint32_t*)0x20006000 = (uint32_t)0xaff; *(uint32_t*)0x20006004 = (uint32_t)0x5; *(uint32_t*)0x20006008 = (uint32_t)0x101; *(uint64_t*)0x20006010 = (uint64_t)0x0; *(uint64_t*)0x20006018 = (uint64_t)0x989680; *(uint32_t*)0x20006020 = (uint32_t)0x3; *(uint32_t*)0x20006024 = (uint32_t)0x4; *(uint8_t*)0x20006028 = (uint8_t)0x0; *(uint8_t*)0x20006029 = (uint8_t)0x0; *(uint8_t*)0x2000602a = (uint8_t)0x0; *(uint8_t*)0x2000602b = (uint8_t)0x0; *(uint8_t*)0x2000602c = (uint8_t)0x0; *(uint8_t*)0x2000602d = (uint8_t)0x0; *(uint8_t*)0x2000602e = (uint8_t)0x0; *(uint8_t*)0x2000602f = (uint8_t)0x0; *(uint8_t*)0x20006030 = (uint8_t)0x0; *(uint8_t*)0x20006031 = (uint8_t)0x0; *(uint8_t*)0x20006032 = (uint8_t)0x0; *(uint8_t*)0x20006033 = (uint8_t)0x0; *(uint8_t*)0x20006034 = (uint8_t)0x0; *(uint8_t*)0x20006035 = (uint8_t)0x0; *(uint8_t*)0x20006036 = (uint8_t)0x0; *(uint8_t*)0x20006037 = (uint8_t)0x0; *(uint8_t*)0x20006038 = (uint8_t)0x0; *(uint8_t*)0x20006039 = (uint8_t)0x0; *(uint8_t*)0x2000603a = (uint8_t)0x0; *(uint8_t*)0x2000603b = (uint8_t)0x0; *(uint8_t*)0x2000603c = (uint8_t)0x0; *(uint8_t*)0x2000603d = (uint8_t)0x0; *(uint8_t*)0x2000603e = (uint8_t)0x0; *(uint8_t*)0x2000603f = (uint8_t)0x0; *(uint8_t*)0x20006040 = (uint8_t)0x0; *(uint8_t*)0x20006041 = (uint8_t)0x0; *(uint8_t*)0x20006042 = (uint8_t)0x0; *(uint8_t*)0x20006043 = (uint8_t)0x0; *(uint8_t*)0x20006044 = (uint8_t)0x0; *(uint8_t*)0x20006045 = (uint8_t)0x0; *(uint8_t*)0x20006046 = (uint8_t)0x0; *(uint8_t*)0x20006047 = (uint8_t)0x0; *(uint8_t*)0x20006048 = (uint8_t)0x0; *(uint8_t*)0x20006049 = (uint8_t)0x0; *(uint8_t*)0x2000604a = (uint8_t)0x0; *(uint8_t*)0x2000604b = (uint8_t)0x0; *(uint8_t*)0x2000604c = (uint8_t)0x0; *(uint8_t*)0x2000604d = (uint8_t)0x0; *(uint8_t*)0x2000604e = (uint8_t)0x0; *(uint8_t*)0x2000604f = (uint8_t)0x0; *(uint8_t*)0x20006050 = (uint8_t)0x0; *(uint8_t*)0x20006051 = (uint8_t)0x0; *(uint8_t*)0x20006052 = (uint8_t)0x0; *(uint8_t*)0x20006053 = (uint8_t)0x0; *(uint8_t*)0x20006054 = (uint8_t)0x0; *(uint8_t*)0x20006055 = (uint8_t)0x0; *(uint8_t*)0x20006056 = (uint8_t)0x0; *(uint8_t*)0x20006057 = (uint8_t)0x0; *(uint8_t*)0x20006058 = (uint8_t)0x0; *(uint8_t*)0x20006059 = (uint8_t)0x0; *(uint8_t*)0x2000605a = (uint8_t)0x0; *(uint8_t*)0x2000605b = (uint8_t)0x0; *(uint8_t*)0x2000605c = (uint8_t)0x0; *(uint8_t*)0x2000605d = (uint8_t)0x0; *(uint8_t*)0x2000605e = (uint8_t)0x0; *(uint8_t*)0x2000605f = (uint8_t)0x0; *(uint8_t*)0x20006060 = (uint8_t)0x0; *(uint8_t*)0x20006061 = (uint8_t)0x0; *(uint8_t*)0x20006062 = (uint8_t)0x0; *(uint8_t*)0x20006063 = (uint8_t)0x0; *(uint8_t*)0x20006064 = (uint8_t)0x0; *(uint8_t*)0x20006065 = (uint8_t)0x0; *(uint8_t*)0x20006066 = (uint8_t)0x0; *(uint8_t*)0x20006067 = (uint8_t)0x0; syscall(SYS_ioctl, fd, 0x402c5342ul, 0x20006000ul, 0, 0, 0); break; case 2: *(uint8_t*)0x20007fb0 = (uint8_t)0x1037; *(uint8_t*)0x20007fb1 = (uint8_t)0x7; *(uint8_t*)0x20007fb2 = (uint8_t)0x30b; *(uint8_t*)0x20007fb3 = (uint8_t)0x34b0; *(uint32_t*)0x20007fb4 = (uint32_t)0x5; *(uint32_t*)0x20007fb8 = (uint32_t)0x7; *(uint8_t*)0x20007fbc = (uint8_t)0x75d; *(uint8_t*)0x20007fbd = (uint8_t)0x0; *(uint8_t*)0x20007fbe = (uint8_t)0x0; *(uint8_t*)0x20007fbf = (uint8_t)0x0; *(uint8_t*)0x20007fc0 = (uint8_t)0x0; *(uint8_t*)0x20007fc1 = (uint8_t)0x0; *(uint8_t*)0x20007fc2 = (uint8_t)0x0; *(uint8_t*)0x20007fc3 = (uint8_t)0x0; *(uint8_t*)0x20007fc4 = (uint8_t)0x0; *(uint8_t*)0x20007fc5 = (uint8_t)0x0; *(uint8_t*)0x20007fc6 = (uint8_t)0x0; *(uint8_t*)0x20007fc7 = (uint8_t)0x0; *(uint8_t*)0x20007fc8 = (uint8_t)0x0; *(uint8_t*)0x20007fc9 = (uint8_t)0x0; *(uint8_t*)0x20007fca = (uint8_t)0x0; *(uint8_t*)0x20007fcb = (uint8_t)0x0; *(uint8_t*)0x20007fcc = (uint8_t)0x0; *(uint8_t*)0x20007fcd = (uint8_t)0x0; *(uint8_t*)0x20007fce = (uint8_t)0x0; *(uint8_t*)0x20007fcf = (uint8_t)0x0; *(uint8_t*)0x20007fd0 = (uint8_t)0x0; *(uint8_t*)0x20007fd1 = (uint8_t)0x0; *(uint8_t*)0x20007fd2 = (uint8_t)0x0; *(uint8_t*)0x20007fd3 = (uint8_t)0x0; *(uint8_t*)0x20007fd4 = (uint8_t)0x0; *(uint8_t*)0x20007fd5 = (uint8_t)0x0; *(uint8_t*)0x20007fd6 = (uint8_t)0x0; *(uint8_t*)0x20007fd7 = (uint8_t)0x0; *(uint8_t*)0x20007fd8 = (uint8_t)0x0; *(uint8_t*)0x20007fd9 = (uint8_t)0x0; *(uint8_t*)0x20007fda = (uint8_t)0x0; *(uint8_t*)0x20007fdb = (uint8_t)0x0; *(uint8_t*)0x20007fdc = (uint8_t)0x0; *(uint8_t*)0x20007fdd = (uint8_t)0x0; *(uint8_t*)0x20007fde = (uint8_t)0x0; *(uint8_t*)0x20007fdf = (uint8_t)0x0; *(uint8_t*)0x20007fe0 = (uint8_t)0x0; *(uint8_t*)0x20007fe1 = (uint8_t)0x0; *(uint8_t*)0x20007fe2 = (uint8_t)0x0; *(uint8_t*)0x20007fe3 = (uint8_t)0x0; *(uint8_t*)0x20007fe4 = (uint8_t)0x0; *(uint8_t*)0x20007fe5 = (uint8_t)0x0; *(uint8_t*)0x20007fe6 = (uint8_t)0x0; *(uint8_t*)0x20007fe7 = (uint8_t)0x0; *(uint8_t*)0x20007fe8 = (uint8_t)0x0; *(uint8_t*)0x20007fe9 = (uint8_t)0x0; *(uint8_t*)0x20007fea = (uint8_t)0x0; *(uint8_t*)0x20007feb = (uint8_t)0x0; *(uint8_t*)0x20007fec = (uint8_t)0x0; *(uint8_t*)0x20007fed = (uint8_t)0x0; *(uint8_t*)0x20007fee = (uint8_t)0x0; *(uint8_t*)0x20007fef = (uint8_t)0x0; *(uint8_t*)0x20007ff0 = (uint8_t)0x0; *(uint8_t*)0x20007ff1 = (uint8_t)0x0; *(uint8_t*)0x20007ff2 = (uint8_t)0x0; *(uint8_t*)0x20007ff3 = (uint8_t)0x0; *(uint8_t*)0x20007ff4 = (uint8_t)0x0; *(uint8_t*)0x20007ff5 = (uint8_t)0x0; *(uint8_t*)0x20007ff6 = (uint8_t)0x0; *(uint8_t*)0x20007ff7 = (uint8_t)0x0; *(uint8_t*)0x20007ff8 = (uint8_t)0x0; *(uint8_t*)0x20007ff9 = (uint8_t)0x0; *(uint8_t*)0x20007ffa = (uint8_t)0x0; *(uint8_t*)0x20007ffb = (uint8_t)0x0; *(uint8_t*)0x20007ffc = (uint8_t)0x0; *(uint8_t*)0x20007ffd = (uint8_t)0x0; *(uint8_t*)0x20007ffe = (uint8_t)0x0; *(uint8_t*)0x20007fff = (uint8_t)0x0; syscall(SYS_ioctl, fd, 0x40505331ul, 0x20007fb0ul, 0, 0, 0); break; } return 0; } int main() { long i; pthread_t th; srand(getpid()); syscall(SYS_mmap, 0x20000000ul, 0x8000ul, 0x3ul, 0x32ul, 0xfffffffffffffffful, 0x0ul); memcpy((void*)0x20005000, "\x2f\x64\x65\x76\x2f\x73\x6e\x64\x2f\x73\x65\x71", 12); fd = syscall(SYS_open, 0x20005000ul, 0x1ul, 0x0ul, 0, 0, 0); for (i = 0; i < 6; i++) { pthread_create(&th, 0, thr, (void*)(i%3)); if (rand()%2==0) usleep(rand()%1000); } usleep(10000); return 0; } kasan: CONFIG_KASAN_INLINE enabled[ 146.589109] kasan: CONFIG_KASAN_INLINE enabledkasan: GPF could be caused by NULL-ptr deref or user memory accessgeneral protection fault: 0000 [#1] SMP DEBUG_PAGEALLOC KASAN Modules linked in: CPU: 2 PID: 6540 Comm: a.out Not tainted 4.4.0+ #222 Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS Bochs 01/01/2011 task: ffff880064ed0000 ti: ffff880063620000 task.ti: ffff880063620000 RIP: 0010:[<ffffffff84b65301>] [<ffffffff84b65301>] snd_seq_fifo_clear+0x31/0x1d0 RSP: 0018:ffff880063627c48 EFLAGS: 00010202 RAX: dffffc0000000000 RBX: 0000000000000000 RCX: 0000000000000000 RDX: 0000000000000015 RSI: 0000000020001ff0 RDI: 00000000000000a8 RBP: ffff880063627c98 R08: 0000000000000001 R09: 0000000000000001 R10: 0000000000000000 R11: 0000000000000001 R12: ffff880064de1ec0 R13: dffffc0000000000 R14: ffff880063627d28 R15: 0000000000000001 FS: 00007fc371e37700(0000) GS:ffff88006d600000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 000000008005003b CR2: 0000000020002000 CR3: 0000000062a62000 CR4: 00000000000006e0 Stack: ffffffff867a5ce0 00000000000002b9 000000004040534e 0000000020001fb0 ffff880063627c98 1ffff1000c6c4f95 ffff880064de1ec0 dffffc0000000000 ffff880063627d28 0000000000000001 ffff880063627d50 ffffffff84b56918 Call Trace: [<ffffffff84b56918>] snd_seq_ioctl_remove_events+0x178/0x1b0 sound/core/seq/seq_clientmgr.c:1966 [<ffffffff84b5954a>] snd_seq_do_ioctl+0x19a/0x1c0 sound/core/seq/seq_clientmgr.c:2209 [<ffffffff84b5973d>] snd_seq_ioctl+0x5d/0x80 sound/core/seq/seq_clientmgr.c:2224 [< inline >] vfs_ioctl fs/ioctl.c:43 [<ffffffff817b3531>] do_vfs_ioctl+0x681/0xe40 fs/ioctl.c:607 [< inline >] SYSC_ioctl fs/ioctl.c:622 [<ffffffff817b3d7f>] SyS_ioctl+0x8f/0xc0 fs/ioctl.c:613 [<ffffffff85e748f6>] entry_SYSCALL_64_fastpath+0x16/0x7a arch/x86/entry/entry_64.S:185 Code: 41 56 41 55 41 54 53 48 89 fb 48 83 ec 28 e8 47 aa 9f fc 48 8d bb a8 00 00 00 48 b8 00 00 00 00 00 fc ff df 48 89 fa 48 c1 ea 03 <0f> b6 14 02 48 89 f8 83 e0 07 83 c0 03 38 d0 7c 08 84 d2 0f 85 RIP [< inline >] __write_once_size include/linux/compiler.h:246 RIP [< inline >] atomic_set ./arch/x86/include/asm/atomic.h:39 RIP [<ffffffff84b65301>] snd_seq_fifo_clear+0x31/0x1d0 sound/core/seq/seq_fifo.c:99 RSP <ffff880063627c48> ---[ end trace 3ee37e6a5304c762 ]--- On commit afd2ff9b7e1b367172f18ba7f693dfb62bdcb2dc (Jan 10).

2 3

[alsa-devel] [PATCH] ALSA: usb-audio: Avoid calling usb_autopm_put_interface() at disconnect
by Takashi Iwai 12 Jan '16

12 Jan '16

ALSA PCM may still have a leftover instance after disconnection and it delays its release. The problem is that the PCM close code path of USB-audio driver has a call of snd_usb_autosuspend(). This involves with the call of usb_autopm_put_interface() and it may lead to a kernel Oops due to the NULL object like: BUG: unable to handle kernel NULL pointer dereference at 0000000000000190 IP: [<ffffffff815ae7ef>] usb_autopm_put_interface+0xf/0x30 PGD 0 Call Trace: [<ffffffff8173bd94>] snd_usb_autosuspend+0x14/0x20 [<ffffffff817461bc>] snd_usb_pcm_close.isra.14+0x5c/0x90 [<ffffffff8174621f>] snd_usb_playback_close+0xf/0x20 [<ffffffff816ef58a>] snd_pcm_release_substream.part.36+0x3a/0x90 [<ffffffff816ef6b3>] snd_pcm_release+0xa3/0xb0 [<ffffffff816debb0>] snd_disconnect_release+0xd0/0xe0 [<ffffffff8114d417>] __fput+0x97/0x1d0 [<ffffffff8114d589>] ____fput+0x9/0x10 [<ffffffff8109e452>] task_work_run+0x72/0x90 [<ffffffff81088510>] do_exit+0x280/0xa80 [<ffffffff8108996a>] do_group_exit+0x3a/0xa0 [<ffffffff8109261f>] get_signal+0x1df/0x540 [<ffffffff81040903>] do_signal+0x23/0x620 [<ffffffff8114c128>] ? do_readv_writev+0x128/0x200 [<ffffffff810012e1>] prepare_exit_to_usermode+0x91/0xd0 [<ffffffff810013ba>] syscall_return_slowpath+0x9a/0x120 [<ffffffff817587cd>] ? __sys_recvmsg+0x5d/0x70 [<ffffffff810d2765>] ? ktime_get_ts64+0x45/0xe0 [<ffffffff8115dea0>] ? SyS_poll+0x60/0xf0 [<ffffffff818d2327>] int_ret_from_sys_call+0x25/0x8f We have already a check of disconnection in snd_usb_autoresume(), but the check is missing its counterpart. The fix is just to put the same check in snd_usb_autosuspend(), too. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=109431 Cc: <stable(a)vger.kernel.org> Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- sound/usb/card.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sound/usb/card.c b/sound/usb/card.c index 18f56646ce86..1f09d9591276 100644 --- a/sound/usb/card.c +++ b/sound/usb/card.c @@ -675,6 +675,8 @@ int snd_usb_autoresume(struct snd_usb_audio *chip) void snd_usb_autosuspend(struct snd_usb_audio *chip) { + if (atomic_read(&chip->shutdown)) + return; if (atomic_dec_and_test(&chip->active)) usb_autopm_put_interface(chip->pm_intf); } -- 2.7.0

1 0

[alsa-devel] [PATCH - a52 plugin 1/1] fix reported input channel order
by tom.ty89＠gmail.com 12 Jan '16

12 Jan '16

From: Tom Yan <tom.ty89(a)gmail.com> a52 plugin expects the input to be in ALSA order and remaps it to general order when encoding. However it reports that the input it takes should be in general order. This fix should make programs (e.g. mpv) that is aware of channel layout reported by ALSA remap sources appropriately before sending when necessary. It should not cause any regression to programs (e.g. mplayer) that does not check the reported channel layout (hence not affected by the issue) and remaps sources anyway. Signed-off-by: Tom Yan <tom.ty89(a)gmail.com> diff --git a/a52/pcm_a52.c b/a52/pcm_a52.c index 4e4c5f7..88529eb 100644 --- a/a52/pcm_a52.c +++ b/a52/pcm_a52.c @@ -663,8 +663,8 @@ static unsigned int chmap4[4] = { }; static unsigned int chmap6[6] = { SND_CHMAP_FL, SND_CHMAP_FR, - SND_CHMAP_FC, SND_CHMAP_LFE, SND_CHMAP_RL, SND_CHMAP_RR, + SND_CHMAP_FC, SND_CHMAP_LFE, }; static snd_pcm_chmap_query_t **a52_query_chmaps(snd_pcm_ioplug_t *io ATTRIBUTE_UNUSED) -- 2.7.0

2 1

[alsa-devel] [PATCH v2 0/3] ALSA: hda - hdmi jack support for dynamic pcm assignment
by libin.yang＠linux.intel.com 12 Jan '16

12 Jan '16

From: Libin Yang <libin.yang(a)linux.intel.com> The patchset adds hdmi jack support for dynamic pcm assignment Libin Yang (3): ALSA: Add documentation about HD-audio DP MST ALSA: hda - add hdmi_pcm to manage hdmi pcm related features ALSA: hda - hdmi jack created based on pcm Documentation/sound/alsa/HD-Audio-DP-MST-audio.txt | 74 ++++++++++++ sound/pci/hda/patch_hdmi.c | 132 ++++++++++++++------- 2 files changed, 164 insertions(+), 42 deletions(-) create mode 100644 Documentation/sound/alsa/HD-Audio-DP-MST-audio.txt -- 1.9.1

3 5

[alsa-devel] [PATCH] ASoC: mediatek: Enable 33bit memory address to support 4GB DRAM
by PC Liao 12 Jan '16

12 Jan '16

If platform is embedded with memory more than 3GB, the address will go out of the scope that 32-bit can handle with. This patch sets the dma_mask and MSB properly to describe its address to 33-bit. Signed-off-by: Hidalgo Huang <hidalgo.huang(a)mediatek.com> Signed-off-by: PC Liao <pc.liao(a)mediatek.com> --- sound/soc/mediatek/mtk-afe-common.h | 1 + sound/soc/mediatek/mtk-afe-pcm.c | 24 +++++++++++++++++++++++- 2 files changed, 24 insertions(+), 1 deletion(-) diff --git a/sound/soc/mediatek/mtk-afe-common.h b/sound/soc/mediatek/mtk-afe-common.h index 9b1af1a..f341f62 100644 --- a/sound/soc/mediatek/mtk-afe-common.h +++ b/sound/soc/mediatek/mtk-afe-common.h @@ -87,6 +87,7 @@ struct mtk_afe_memif_data { int irq_en_shift; int irq_fs_shift; int irq_clr_shift; + int msb_shift; }; struct mtk_afe_memif { diff --git a/sound/soc/mediatek/mtk-afe-pcm.c b/sound/soc/mediatek/mtk-afe-pcm.c index 08af9f5..60c38db 100644 --- a/sound/soc/mediatek/mtk-afe-pcm.c +++ b/sound/soc/mediatek/mtk-afe-pcm.c @@ -21,6 +21,7 @@ #include <linux/module.h> #include <linux/of.h> #include <linux/of_address.h> +#include <linux/dma-mapping.h> #include <linux/pm_runtime.h> #include <sound/soc.h> #include "mtk-afe-common.h" @@ -35,6 +36,7 @@ #define AFE_I2S_CON1 0x0034 #define AFE_I2S_CON2 0x0038 #define AFE_CONN_24BIT 0x006c +#define AFE_MEMIF_MSB 0x00cc #define AFE_CONN1 0x0024 #define AFE_CONN2 0x0028 @@ -592,6 +594,7 @@ static int mtk_afe_dais_hw_params(struct snd_pcm_substream *substream, struct snd_soc_pcm_runtime *rtd = substream->private_data; struct mtk_afe *afe = snd_soc_platform_get_drvdata(rtd->platform); struct mtk_afe_memif *memif = &afe->memif[rtd->cpu_dai->id]; + int msb_at_bit33 = 0; int ret; dev_dbg(afe->dev, @@ -603,7 +606,10 @@ static int mtk_afe_dais_hw_params(struct snd_pcm_substream *substream, if (ret < 0) return ret; - memif->phys_buf_addr = substream->runtime->dma_addr; + if (sizeof(dma_addr_t) > 4) + msb_at_bit33 = (substream->runtime->dma_addr & 0x100000000) ? 1 : 0; + + memif->phys_buf_addr = substream->runtime->dma_addr & 0xffffffff; memif->buffer_size = substream->runtime->dma_bytes; /* start */ @@ -614,6 +620,11 @@ static int mtk_afe_dais_hw_params(struct snd_pcm_substream *substream, memif->data->reg_ofs_base + AFE_BASE_END_OFFSET, memif->phys_buf_addr + memif->buffer_size - 1); + /* set MSB to 33-bit */ + regmap_update_bits(afe->regmap, AFE_MEMIF_MSB, + 1 << memif->data->msb_shift, + msb_at_bit33 << memif->data->msb_shift); + /* set channel */ if (memif->data->mono_shift >= 0) { unsigned int mono = (params_channels(params) == 1) ? 1 : 0; @@ -978,6 +989,7 @@ static const struct mtk_afe_memif_data memif_data[MTK_AFE_MEMIF_NUM] = { .irq_en_shift = 0, .irq_fs_shift = 4, .irq_clr_shift = 0, + .msb_shift = 0, }, { .name = "DL2", .id = MTK_AFE_MEMIF_DL2, @@ -991,6 +1003,7 @@ static const struct mtk_afe_memif_data memif_data[MTK_AFE_MEMIF_NUM] = { .irq_en_shift = 2, .irq_fs_shift = 16, .irq_clr_shift = 2, + .msb_shift = 1, }, { .name = "VUL", .id = MTK_AFE_MEMIF_VUL, @@ -1004,6 +1017,7 @@ static const struct mtk_afe_memif_data memif_data[MTK_AFE_MEMIF_NUM] = { .irq_en_shift = 1, .irq_fs_shift = 8, .irq_clr_shift = 1, + .msb_shift = 6, }, { .name = "DAI", .id = MTK_AFE_MEMIF_DAI, @@ -1017,6 +1031,7 @@ static const struct mtk_afe_memif_data memif_data[MTK_AFE_MEMIF_NUM] = { .irq_en_shift = 3, .irq_fs_shift = 20, .irq_clr_shift = 3, + .msb_shift = 5, }, { .name = "AWB", .id = MTK_AFE_MEMIF_AWB, @@ -1030,6 +1045,7 @@ static const struct mtk_afe_memif_data memif_data[MTK_AFE_MEMIF_NUM] = { .irq_en_shift = 14, .irq_fs_shift = 24, .irq_clr_shift = 6, + .msb_shift = 3, }, { .name = "MOD_DAI", .id = MTK_AFE_MEMIF_MOD_DAI, @@ -1043,6 +1059,7 @@ static const struct mtk_afe_memif_data memif_data[MTK_AFE_MEMIF_NUM] = { .irq_en_shift = 3, .irq_fs_shift = 20, .irq_clr_shift = 3, + .msb_shift = 4, }, { .name = "HDMI", .id = MTK_AFE_MEMIF_HDMI, @@ -1056,6 +1073,7 @@ static const struct mtk_afe_memif_data memif_data[MTK_AFE_MEMIF_NUM] = { .irq_en_shift = 12, .irq_fs_shift = -1, .irq_clr_shift = 4, + .msb_shift = 8, }, }; @@ -1189,6 +1207,10 @@ static int mtk_afe_pcm_dev_probe(struct platform_device *pdev) struct mtk_afe *afe; struct resource *res; + ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(33)); + if (ret) + return ret; + afe = devm_kzalloc(&pdev->dev, sizeof(*afe), GFP_KERNEL); if (!afe) return -ENOMEM; -- 1.7.9.5

2 3

[alsa-devel] bat: naming conflict in distribution packages with Bareos/Bacula
by Jörg Steffens 12 Jan '16

12 Jan '16

Hello, my name is Jörg Steffens and I'm one of the maintainers of the Bareos backup software project. Bareos is a fork Bacula. Bareos includes a GUI program called bat (bareos administration tool). bat have been around since 2007. alsa-utils as well as bareos-bat (as well a some Bacula packages) all contain a program called /usr/bin/bat, which causes conflicts on various distributions ("basic audio tester" vs "bareos administration tool" ("bacula administration tool")). See http://pkgs.org/search//usr/bin/bat We received a bug report/feature request https://bugs.bareos.org/view.php?id=576 from Michel, the maintainer of Bareos for Arch Linux about how to solve the naming conflict with we latest ALSA 1.1.0. I wanted to raise the question, if you are aware of this potential problem? Maybe you have guidelines for package maintainers how to solve this. Some distributions have separated "basic audio tester" from the alsa-utils package, like Fedora with alsa-utils-bat. I think, this will work out well, as I assume "basic audio tester" is not stricly required on all systems. "bareos administration tool" at least is optional and typical installed on administrative workstations. regards, Jörg -- Jörg Steffens joerg.steffens(a)bareos.com Bareos GmbH & Co. KG Phone: +49 221 630693-91 http://www.bareos.com Fax: +49 221 630693-10 Sitz der Gesellschaft: Köln | Amtsgericht Köln: HRA 29646 Komplementär: Bareos Verwaltungs-GmbH Geschäftsführer: S. Dühr, M. Außendorf, Jörg Steffens, P. Storz, M. v. Wieringen

5 4

[alsa-devel] [PATCH] ASoC: nau8825: fix interrupt fails and unstable after resume
by John Hsu 12 Jan '16

12 Jan '16

This patch is to fix interrupt fails when resume back. In solution, we add IRQ re-initiation, and reconstruct suspend and resume with set_bias_level function. Signed-off-by: John Hsu <KCHSU0(a)nuvoton.com> --- sound/soc/codecs/nau8825.c | 42 ++++++++++++++++++++++++++++++++++++------ 1 file changed, 36 insertions(+), 6 deletions(-) diff --git a/sound/soc/codecs/nau8825.c b/sound/soc/codecs/nau8825.c index 504c969..2e2e11a 100644 --- a/sound/soc/codecs/nau8825.c +++ b/sound/soc/codecs/nau8825.c @@ -1092,6 +1092,36 @@ static int nau8825_set_sysclk(struct snd_soc_codec *codec, int clk_id, return nau8825_configure_sysclk(nau8825, clk_id, freq); } +static int nau8825_resume_setup(struct nau8825 *nau8825) +{ + struct regmap *regmap = nau8825->regmap; + + /* IRQ Output Enable */ + regmap_update_bits(regmap, NAU8825_REG_INTERRUPT_MASK, + NAU8825_IRQ_OUTPUT_EN, NAU8825_IRQ_OUTPUT_EN); + + /* Enable internal VCO needed for interruptions */ + nau8825_configure_sysclk(nau8825, NAU8825_CLK_INTERNAL, 0); + + /* Enable DDACR needed for interrupts */ + regmap_update_bits(regmap, NAU8825_REG_ENA_CTRL, + NAU8825_ENABLE_DACR, NAU8825_ENABLE_DACR); + + /* Chip needs one FSCLK cycle in order to generate interrupts, + * as we cannot guarantee one will be provided by the system. Turning + * master mode on then off enables us to generate that FSCLK cycle + * with a minimum of contention on the clock bus. + */ + regmap_update_bits(regmap, NAU8825_REG_I2S_PCM_CTRL2, + NAU8825_I2S_MS_MASK, NAU8825_I2S_MS_MASTER); + regmap_update_bits(regmap, NAU8825_REG_I2S_PCM_CTRL2, + NAU8825_I2S_MS_MASK, NAU8825_I2S_MS_SLAVE); + + nau8825_restart_jack_detection(regmap); + + return 0; +} + static int nau8825_set_bias_level(struct snd_soc_codec *codec, enum snd_soc_bias_level level) { @@ -1121,6 +1151,8 @@ static int nau8825_set_bias_level(struct snd_soc_codec *codec, "Failed to sync cache: %d\n", ret); return ret; } + if (nau8825->irq) + nau8825_resume_setup(nau8825); } break; @@ -1330,24 +1362,22 @@ static int nau8825_i2c_remove(struct i2c_client *client) #ifdef CONFIG_PM_SLEEP static int nau8825_suspend(struct device *dev) { - struct i2c_client *client = to_i2c_client(dev); struct nau8825 *nau8825 = dev_get_drvdata(dev); + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(nau8825->dapm); - disable_irq(client->irq); + disable_irq(nau8825->irq); + snd_soc_codec_force_bias_level(codec, SND_SOC_BIAS_OFF); regcache_cache_only(nau8825->regmap, true); - regcache_mark_dirty(nau8825->regmap); return 0; } static int nau8825_resume(struct device *dev) { - struct i2c_client *client = to_i2c_client(dev); struct nau8825 *nau8825 = dev_get_drvdata(dev); regcache_cache_only(nau8825->regmap, false); - regcache_sync(nau8825->regmap); - enable_irq(client->irq); + enable_irq(nau8825->irq); return 0; } -- 2.6.4

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[alsa-devel] Applied "ASoC: qcom: use correct device pointer in dma allocation" to the asoc tree
by Mark Brown 11 Jan '16

11 Jan '16

The patch ASoC: qcom: use correct device pointer in dma allocation has been applied to the asoc tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From f5f76ea75dce553631ffb08abc44dcecb68e74d4 Mon Sep 17 00:00:00 2001 From: Srinivas Kandagatla <srinivas.kandagatla(a)linaro.org> Date: Mon, 11 Jan 2016 15:17:23 +0000 Subject: [PATCH] ASoC: qcom: use correct device pointer in dma allocation dev pointer in struct snd_soc_pcm_runtime does not have dma_ops set. In v4.4 kernel dma_ops would end up pointing to dummy_dma_ops in such cases. So attempting to use such device in allocating coherent memory on aarch64 would fail. According to commit 1dccb598df549d892b6450c261da54cdd7af44b4 ("arm64: simplify dma_get_ops") The current behavior of dma_get_ops is to fall back to the global dma_ops when a device has not set its own dma_ops, but only for DT based systems. So, this patch fixes the driver to use correct device pointer while allocating coherent memory, and also deletes un-necessary dma_mask setup on soc_runtime->dev. Without this patch lpass driver would fail with below log: ... [ 6.541542] ADV7533: lpass_platform_alloc_buffer: Could not allocate DMA buffer [ 6.541914] apq8016-lpass-cpu 7708000.lpass-cpu: ASoC: pcm constructor failed: -12 [ 6.548216] qcom-apq8016-sbc 7702000.sound: ASoC: can't create pcm ADV7533 :-12 [ 6.555581] qcom-apq8016-sbc 7702000.sound: ASoC: failed to instantiate card -12 [ 6.566072] qcom-apq8016-sbc: probe of 7702000.sound failed with error -12 ... Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla(a)linaro.org> Signed-off-by: Mark Brown <broonie(a)kernel.org> --- sound/soc/qcom/lpass-platform.c | 15 ++++++--------- 1 file changed, 6 insertions(+), 9 deletions(-) diff --git a/sound/soc/qcom/lpass-platform.c b/sound/soc/qcom/lpass-platform.c index 79688aa1941a..4aeb8e1a7160 100644 --- a/sound/soc/qcom/lpass-platform.c +++ b/sound/soc/qcom/lpass-platform.c @@ -440,18 +440,18 @@ static irqreturn_t lpass_platform_lpaif_irq(int irq, void *data) } static int lpass_platform_alloc_buffer(struct snd_pcm_substream *substream, - struct snd_soc_pcm_runtime *soc_runtime) + struct snd_soc_pcm_runtime *rt) { struct snd_dma_buffer *buf = &substream->dma_buffer; size_t size = lpass_platform_pcm_hardware.buffer_bytes_max; buf->dev.type = SNDRV_DMA_TYPE_DEV; - buf->dev.dev = soc_runtime->dev; + buf->dev.dev = rt->platform->dev; buf->private_data = NULL; - buf->area = dma_alloc_coherent(soc_runtime->dev, size, &buf->addr, + buf->area = dma_alloc_coherent(rt->platform->dev, size, &buf->addr, GFP_KERNEL); if (!buf->area) { - dev_err(soc_runtime->dev, "%s: Could not allocate DMA buffer\n", + dev_err(rt->platform->dev, "%s: Could not allocate DMA buffer\n", __func__); return -ENOMEM; } @@ -461,12 +461,12 @@ static int lpass_platform_alloc_buffer(struct snd_pcm_substream *substream, } static void lpass_platform_free_buffer(struct snd_pcm_substream *substream, - struct snd_soc_pcm_runtime *soc_runtime) + struct snd_soc_pcm_runtime *rt) { struct snd_dma_buffer *buf = &substream->dma_buffer; if (buf->area) { - dma_free_coherent(soc_runtime->dev, buf->bytes, buf->area, + dma_free_coherent(rt->dev, buf->bytes, buf->area, buf->addr); } buf->area = NULL; @@ -499,9 +499,6 @@ static int lpass_platform_pcm_new(struct snd_soc_pcm_runtime *soc_runtime) snd_soc_pcm_set_drvdata(soc_runtime, data); - soc_runtime->dev->coherent_dma_mask = DMA_BIT_MASK(32); - soc_runtime->dev->dma_mask = &soc_runtime->dev->coherent_dma_mask; - ret = lpass_platform_alloc_buffer(substream, soc_runtime); if (ret) return ret; -- 2.7.0.rc3

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[alsa-devel] [PATCH RFC 0/3] Add USB-audio quirk alias option
by Takashi Iwai 11 Jan '16

11 Jan '16

Hi, this is an experimental patchset to add a new option, quirk_alias, to snd-usb-audio driver. It allows to use the existing quirk for the given vendor:product id pair matching with the new device. Passing like: quirk_alias=1234abcd:5678beef will make the driver applying the quirk for 5678:beef against to the new device 1234:abcd. Obviously, this is for helping to find a workaround for a new device that may need the same / similar quirk for the previous models. Then you can apply the quirk without recompiling the kernel driver with a manual patch. Takashi === Takashi Iwai (3): ALSA: usb-audio: Refer to chip->usb_id for quirks and MIDI creation ALSA: usb-audio: Add quirk_alias option ALSA: doc: Update option descriptions for snd-usb-audio Documentation/sound/alsa/ALSA-Configuration.txt | 9 ++++ sound/usb/card.c | 56 +++++++++++++++++++++++-- sound/usb/midi.c | 15 ++++--- sound/usb/midi.h | 14 ++++++- sound/usb/quirks.c | 34 ++++++++------- sound/usb/quirks.h | 3 +- 6 files changed, 105 insertions(+), 26 deletions(-) -- 2.7.0

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[alsa-devel] [GIT PULL] ASoC updates for v4.5
by Mark Brown 11 Jan '16

11 Jan '16

The following changes since commit bc42f363da213b4bf7c15a2dc87b2b1a85cde867: Merge remote-tracking branch 'asoc/fix/intel' into asoc-linus (2016-01-05 23:07:33 +0000) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git tags/asoc-v4.4-rc8 for you to fetch changes up to d0021d3bdfe9d551859bca1f58da0e6be8e26043: Merge remote-tracking branch 'asoc/topic/wm8960' into asoc-next (2016-01-11 13:54:40 +0000) ---------------------------------------------------------------- ASoC: Last updates for v4.5 A bunch more updates for v4.5, mainly driver work: - More topology API enhancements from Mengdong Lin working towards making everything more component based and being able to specify PCM links via topology. - Large sets driver updates from Cirrus, Intel (mainly more Skylake support) and Renesas. - New drivers for AMD ACP, Atmel PDMIC, Dialog DA7218, Imagination Technologies SoC IPs, Rockchip RK3036 Inno CODEC and Texas Instruments PCM3168A. ---------------------------------------------------------------- I missed the RT5659 out of the list of drivers there, sorry. Adam Thomson (12): ASoC: da7218: Add bindings documentation for DA7218 audio codec ASoC: da7218: Add da7218 codec driver ASoC: da7218: Enable mic level detection reporting to user-space ASoC: da7219: Fix Sidetone to work regardless of DAI capture ASoC: da7219: Disable regulators on probe() failure ASoC: da7219: Update REFERENCES reg default, in-line with HW ASoC: da7219: Remove internal LDO features of codec ASoC: da7219: Add support for 1.6V micbias level ASoC: da7219: Remove support for 32KHz PLL mode ASoC: da7219: Add regmap patch to support old silicon ASoC: da7219: Correct BCLK inversion for DSP DAI format mode ASoC: da7218: Correct BCLK inversion for DSP DAI format mode Anatol Pomozov (1): ASoC: rt5677: use 'active low' logic for reset pin Andrzej Hajda (1): ASoC: rsnd: fix usrcnt decrementing bug Arnd Bergmann (9): ASoC: samsung: pass DMA channels as pointers ASoC: s3c24xx-i2s: pass DMA channels as platform data ASoC: pxa: remove incorrect do_div() call ASoC: sh: fix fsi build warnings for 64 bit ASoC: samsung: pass filter function as pointer ASoC: rcar: remove unused variable ASoC: fsl: use correct format string for dma_addr_t ASoC: da7218: avoid 64-bit compile warning ASoC: hdac_hdmi: remove unused hdac_hdmi_query_pin_connlist Axel Lin (3): ASoC: da7219: Use logical instead of bitwise OR for boolean expression ASoC: wm8904: Make undocumented registers non-readable ASoC: rt5616: Return error if device ID mismatch Bard Liao (10): ASoC: rt298: fix remove unnedded clk setting ASoC: rt5645: Separate regmap for rt5645 and rt5650 ASoC: rt5659: add rt5659 codec driver ASoC: rt5645: merge DMI tables of google projects ASoC: rt5616: add rt5616 codec driver ASoC: rt5616: rename some alsa control names ASoC: rt5677: set PLL_CTRL2 non-volatile ASoC: rt5651: add ACPI and OF support ASoC: rt5645: use polling to support HS button ASoC: rt5645: improve IRQ reaction time for HS button Ben Zhang (1): ASoC: rt5677: Reconfigure PLL1 after resume Caesar Wang (5): ASoC: rockchip: i2s: change bclk and lrck according to sample rates ASoC: rockchip-max98090: Allow more sample rates ASoC: rockchip-rt5645: Allow more sample rates ASoC: rt5616: add an of_match table ASoC: rt5616: add devicetree document for rt5616 Charles Keepax (22): ASoC: wm5110: Add DAPM/routing hookup for the ANC block ASoC: wm_adsp: Expand the list of available firmwares ASoC: arizona: Add 32uS delay after putting FLL into freerun ASoC: dapm: Make enable/disable_pin work with always on widgets ASoC: arizona: Correct types of mixer texts and values ASoC: arizona: Fix type of clock rate pointer in arizona_set_sysclk ASoC: wm_adsp: Replace debugfs lock with more general DSP power lock ASoC: wm_adsp: Add power lock for firmware change control ASoC: wm_adsp: Fixup some minor formatting and checkpatch errors ASoC: wm_adsp: Add locking to DSP firmware controls ASoC: wm_adsp: Mimic legacy behaviour of reading controls when DSP is on ASoC: wm5110: Provide basic hookup for voice control ASoC: wm_adsp: Factor out finding the location of an algorithm region ALSA: compress: Add SND_AUDIOCODEC_BESPOKE ASoC: wm_adsp: Add support for opening a compressed stream ASoC: wm_adsp: Add code to locate and initialise compressed buffer ASoC: wm_adsp: Attach buffers and streams together ASoC: wm5110: Use helper function to lock the DAPM mutex ASoC: arizona: Exit startup early if no runtime ASoC: wm5110: Fix PGA clear when disabling DRE ASoC: wm_adsp: Add a handler for the compressed IRQ ASoC: wm_adsp: Pull data through compressed read Damien.Horsley (17): ASoC: img: Add binding document for I2S input controller ASoC: img: Add driver for I2S input controller ASoC: img: Add binding document for I2S output controller ASoC: img: Add driver for I2S output controller ASoC: img: Add binding document for parallel output controller ASoC: img: Add driver for parallel output controller ASoC: img: Add binding document for SPDIF input controller ASoC: img: Add driver for SPDIF input controller ASoC: img: Add documentation for SPDIF in controls ASoC: img: Add binding document for SPDIF output controller ASoC: img: Add driver for SPDIF output controller ASoC: img: parallel out: Add missing initialiser ASoC: Add SOC_DOUBLE_STS macro ASoC: pcm3168a: Add binding document for pcm3168a codec ASoC: pcm3168a: Add driver for pcm3168a codec ASoC: img: Add binding document for Pistachio internal DAC ASoC: img: Add driver for Pistachio internal DAC Dan Carpenter (4): ASoC: Intel: pass correct parameter in sst_alloc_stream_mrfld() ASoC: Intel: Skylake: Fix a couple signedness bugs ASoC: Intel: Skylake: pointer math issue ASoC: rsnd: precedence error in rsnd_ssiu_init() Dharageswari R (2): ASoC: Intel: Skylake: Add support for Loadable modules ASoC: Intel: Skylake: Add support for Mic Select module Dharageswari.R (1): ASoC: Intel: Skylake: Use CGCTL.MISCBDCGE for Phrase detection notification Fang, Yang A (3): ASoC: Intel: Skylake: add adi + nau8825 machine driver entry ASoc: Intel: boards: fix dapm map of nau88l25_ssm4567 machine ASoc: Intel: boards: Add HDMI/DP links for nau88l25_ssm4567 machine Geert Uytterhoeven (2): ASoC: rsnd: Add missing initialization of ADG req_rate ASoC: rsrc-card: Clarify compatible value Geliang Tang (2): ASoC: twl6040, fsl: use to_platform_device ASoC: hdac_hdmi: use dev_to_hdac_dev and to_ehdac_device Guenter Roeck (1): ASoC: AMD: Add missing include file Hans de Goede (3): ASoC: sun4i-codec: Rename codec dapm widgets and routes ASoC: sun4i-codec: Add support for PA gpio pin ASoC: sun4i-codec: Use proper output for external amp routes Hardik T Shah (3): ASoC: Intel: Skylake: Add multiple pin formats ASoC: Intel: Skylake: Update the topology interface structure ASoC: Intel: Skylake: Add support for module GUIDs Harsha Priya (1): ASoC: Intel: Skylake: Adding nau88l25+ssm4567 machine driver Jack Yu (1): ASoC: rt5640: add ASRC support Jayachandran B (2): ALSA: hdac: Increase timeout value for link power check ASoC: Intel: Skylake: fix reset controller sequencing Jeeja KP (45): ASoC: Intel: Skylake: Fix to correct check for non DSP widget ASoC: Intel: Skylake: Fix not to ignore return value in be hw_params ASoC: Intel: Skylake: Fix to add 32 bit in update FE params ASoC: Intel: Skylake: Fix to ignore codec_mask check in probe ASoC: Intel: Skylake: Fix to ignore blob check if link type is HDA ASoC: Intel: Skylake: Fix support for multiple pins in a module ASoC: Intel: Skylake: Fix bit depth when querying the NHLT blob ASoC: Intel: Skylake: use module_pin info for unbind ASoC: Intel: Skylake: Add support for virtual dsp widgets ASoC: Intel: Skylake: Fix DSP pipe underrun/overrun issue ASoC: Intel: Skylake: Fix to remove be copier widget power check ASoC: Intel: Skylake: Ignore rate check for DMIC link ASoC: Intel: Skylake: Fix to remove channel_map calculation ASoC: Intel: Skylake: Fix PM behaviour ASoC: Intel: Skylake: Fix the SSP0 Fmt fixup to 24 bit ASoC: Intel: Skylake: Add support for SSP1 BE cpu dai ASoC: Intel: Skylake: remove pm_runtime_get/put calls ASoC: Intel: Skylake: Don't enable WAKEENABLE on suspend ASoC: Intel: Skylake: Remove redundant init in resume ASoC: Intel: Skylake: Fix cleanup of dma buffer ASoC: Intel: Skylake: Reset the DSP when set D3 fails ASoC: Intel: Skylake: Fix CLDMA buffer wrap case ASoC: Intel: Skylake: Fix null ptr dereferenced in skl_tplg_bind_sinks ASoC: Intel: Skylake: Add pm ops for skl_rt286 machine ASoC: Intel: Skylake: Reconfigure HDA stream register in prepare/resume ASoC: Intel: Skylake: Fix to update bit depth for module params ASoC: Intel: Skylake: Update pcm capability ASoC: Intel: Skylake: Poll CLDMA RUN bit when set ASoC: Intel: Skylake: Update DMIC DAIs and capabilities ASoC: Intel: Skylake: Add helper routines to handle module params ASoC: Intel: Skylake: Add helper routine to handle Algo parameter ASoC: Intel: Skylake: Add support to configure module params ASoC: Intel: Skylake: Add tlv byte kcontrols ASoC: Intel: Skylake: Add memory pages to widget data. ASoC: Intel: Skylake: Fix module init data correctly ASoC: Intel: Skylake: Add dai link for DMIC capture ASoC: Intel: Skylake: Add support for active suspend ASoC: Intel: Skylake: Clear stream registers before stream setup ASoC: Intel: Skylake: Fix to set pipe state to invalid when deleting ALSA: hdac: Add support for hda DMA Resume capability ALSA: hdac: couple the hda DMA stream in cleanup ASoC: Intel: Skylake: enable interrupt as wake source in active suspend ASoC: Intel: Skylake: Add DMA resume position in Trigger resume/suspend ASoC: Intel: Skylake: Reconfigure Link stream on suspend/resume ASoC: Intel: Skylake: Add Resume capability in PCM info. Jiada Wang (1): ASoC: wm8962: set ALC2 as non-volatile register Jie Yang (2): ASoC: Intel: sst: only select sst-firmware when DW DMAC is built-in ASoC: Intel: sst: fix sst_memcpy32 wrong with non-4x bytes issue John Keeping (2): ASoC: rockchip: i2s: separate capture and playback ASoC: rockchip: i2s: remove unused variables Jorge Fernandez Monteagudo (1): ASoC: Intel: Atom: Add support for HP ElitePad 1000 G2 Julia Lawall (4): ASoC: Intel: constify sst_block_ops structures ASoC: imx-pcm-dma: add NULL test ASoC: omap-hdmi-audio: add NULL test ASoC: Intel: add NULL test Koro Chen (4): ASoC: dpcm: Make BE prepare possible in suspend state ASoC: mediatek: Move 22M/24M clock control into I2S ops ASoC: mediatek: Use current HW pointer for pointer callback ASoC: mediatek: Turn AFE on/off in runtime resume/suspend Kuninori Morimoto (82): ASoC: rsnd: DMA become SSI/SRC member ASoC: rsnd: DMA related definition goes to dma.c ASoC: rsnd: rename rsnd_dma_init() to rsnd_dma_attach() ASoC: rsnd: enable to use rsnd_dai_connect() from each mod ASoC: rsnd: remove all modules when PIO fallback ASoC: rsnd: fixup rsnd_dma_of_path method for mod base common method ASoC: rsnd: move rsnd_src_ssi_irq_enable/disable() to ssi.c ASoC: rsnd: disable SRC.out only when stop timing ASoC: rsnd: rsnd_dai_stream has each mod's status insted of rsnd_mod ASoC: rsnd: Don't stop HW even if a large number of errors occur ASoC: rsnd: avoid pointless loop in rsnd_mod_interrupt() ASoC: rsnd: use common rsnd_ssi_status_xxx() ASoC: rsnd: use mod base common method on DMA phase1 ASoC: rsnd: use mod base common method on DMA phase2 ASoC: rsnd: use mod base common method on DMA phase3 ASoC: rsnd: use mod base common method on CMD ASoC: rsnd: use mod base common method on SSIU ASoC: rsnd: use mod base common method on SSI-parent ASoC: rsnd: call rsnd_src_quit() from rsnd_src_quit_gen2() ASoC: rsnd: fixup rsnd_dmapp_stop() return value ASoC: rsnd: audio_clkout0/1/2/3 are optional properties ASoC: rsnd: move CMD related operation to cmd.c ASoC: rsnd: DVC settings matches to datasheet ASoC: rsnd: MIX settings matches to datasheet ASoC: rsnd: tidyup comment position of rsnd_mod_xxx ASoC: rsnd: call clk_prepare()/clk_enable() for AUDIO_CLKx ASoC: ak4613: add single-end optional property for IN/OUT pins ASoC: ak4613: tidyup CTRL1 value selection method ASoC: rsnd: SND_SOC_RCAR doesn't depend on DMA_OF ASoC: rsnd: ssi: 24bit data needs right-aligned settings ASoC: ak4613: don't overwrite CTRL2 register ASoC: rsnd: remove Gen1 support from SRC ASoC: rsnd: cleanup RSND_REG_xxx ASoC: rsnd: SRC settings matches to datasheet ASoC: rsnd: remove platform boot support from core.c ASoC: rsnd: remove platform boot support from ssi.c ASoC: rsnd: remove platform boot support from src.c ASoC: rsnd: remove platform boot support from ctu.c ASoC: rsnd: remove platform boot support from mix.c ASoC: rsnd: remove platform boot support from dvc.c ASoC: rsnd: remove platform boot support from gen.c ASoC: rsnd: remove struct rsnd_of_data ASoC: rsnd: remove struct rcar_snd_info ASoC: rsnd: remove struct platform_device from probe/remove parameter ASoC: ak4613: tidyup vendor prefix from ak4613 to asahi-kasei ASoC: rsnd: tidyup void* cast for 64bit compiler ASoC: rsnd: indicate register name for debug ASoC: rsnd: tidyup semantics of rsnd_src_record_error() ASoC: rsnd: tidyup semantics of rsnd_ssi_record_error() ASoC: rsnd: don't use normal *mod in adg.c ASoC: rsnd: add missing ADINR::CHNUM on DVC/SRC/SSIU ASoC: rsnd: add missing SRC_O_BUSIF_MODE register ASoC: rsnd: src: rename rsnd_src_soft_reset() to rsnd_src_activation() ASoC: rsnd: mix: rename rsnd_mix_soft_reset() to rsnd_mix_activation() ASoC: rsnd: dvc: rename rsnd_dvc_soft_reset() to rsnd_dvc_activation() ASoC: rsnd: src: add rsnd_src_halt() ASoC: rsnd: mix: add rsnd_mix_halt() ASoC: rsnd: dvc: add rsnd_dvc_halt() ASoC: rsnd: add rsnd_ssi_config_init() ASoC: rsnd: set SSIWSR setting on rsnd_ssi_config_init() ASoC: rsnd: ssi enables non-stereo sound ASoC: rsnd: dvc enables non-stereo sound ASoC: rsnd: add TDM Extend Mode support ASoC: rsnd: fixup wrong snd_soc_dai_driver pointer access ASoC: rsnd: rsrc-card: check return value of snd_soc_of_get_dai_name() ASoC: rsnd: care SWSP bit for TDM/non-TDM ASoC: rsnd: tidyup data align position for capture ASoC: rsrc-card: enable to use tdm_slot on DT ASoC: rsrc-card: Remove support for setting differing DAI formats ASoC: rsrc-card: tidyup dai format for DPCM ASoC: rsnd: fixup SSIU control timing ASoC: rsnd: tidyup return value of rsnd_get_adinr_bit() ASoC: rsnd: tidyup debug print position on rsnd_dma_attach() ASoC: rsnd: rsnd_dai_connect() returns error if it connect to existing mod ASoC: rsnd: SSI/SSIU use rsnd_get_slot_extend() to check TDM ASoC: rsnd: remove rsnd_get_slot_runtime() ASoC: rsnd: tidyup rsnd_get_slot_xxx() naming ASoC: rsnd: add rsnd_set_slot() / rsnd_get_slot_num() ASoC: rsnd: add rsnd_parse_connect_common() and remove complex macro ASoC: rsnd: add missing DT example for Simple Card ASoC: rsnd: add missing DT example for Simple Card with TDM ASoC: rsnd: add Multi channel support Liam Girdwood (1): ASoC: Intel: sst: fix the IRQ locked issue Linus Walleij (2): ASoC: wm8903: Be sure to clamp return value ASoC: ac97: Be sure to clamp return value Maciej S. Szmigiero (3): ASoC: fsl-asoc-card: use different route map for AC'97 mode ASoC: fsl_ssi: mark SACNT register volatile ASoC: fsl_ssi: mark some registers precious Mans Rullgard (2): ASoC: wm8974: add devicetree support ASoC: wm8974: add binding for WM8974 codec Mark Brown (56): Merge branch 'fix/rt5645' of git://git.kernel.org/.../broonie/sound into HEAD Merge branch 'fix/arizona' of git://git.kernel.org/.../broonie/sound into asoc-arizona Merge branch 'fix/rt5645' of git://git.kernel.org/.../broonie/sound into asoc-rt5645 Merge branch 'topic/pcm-list' of git://git.kernel.org/.../broonie/sound into asoc-intel Merge branch 'topic/hdac' of git://git.kernel.org/.../broonie/sound into asoc-intel ASoC: hdac: Fix Makefile and Kconfig sorting Merge branch 'topic/fsl-sai' of git://git.kernel.org/.../broonie/sound into asoc-fsl Merge branch 'fix/rt5645' of git://git.kernel.org/.../broonie/sound into asoc-rt5645 Merge branch 'topic/sink' of git://git.kernel.org/.../broonie/sound into asoc-dapm Merge branch 'fix/sun4i-codec' of git://git.kernel.org/.../broonie/sound into asoc-sunxi Merge branch 'topic/sink' of git://git.kernel.org/.../broonie/sound into asoc-intel rcar: ctu: Avoid use of ret uninitialised rcar: dvc: Avoid use of ret uninitialised rcar: mux: Avoid use of ret uninitialised Merge branch 'topic/arizona' of git://git.kernel.org/.../broonie/sound into asoc-adsp Merge branch 'topic/cs47l24' of git://git.kernel.org/.../broonie/sound into asoc-adsp Merge remote-tracking branch 'asoc/topic/arizona' into asoc-next Merge remote-tracking branch 'asoc/topic/dapm' into asoc-next Merge remote-tracking branch 'asoc/topic/pcm-list' into asoc-next Merge remote-tracking branch 'asoc/topic/pcm3168a' into asoc-next Merge remote-tracking branch 'asoc/topic/rt5645' into asoc-next Merge remote-tracking branch 'asoc/topic/sunxi' into asoc-next Merge remote-tracking branches 'asoc/topic/ac97', 'asoc/topic/adsp', 'asoc/topic/ak4613' and 'asoc/topic/atmel' into asoc-next Merge remote-tracking branches 'asoc/topic/atmel-classd', 'asoc/topic/const' and 'asoc/topic/da7218' into asoc-next Merge remote-tracking branches 'asoc/topic/da7219', 'asoc/topic/dai-link' and 'asoc/topic/doc' into asoc-next Merge remote-tracking branches 'asoc/topic/dpcm', 'asoc/topic/dwc', 'asoc/topic/fsl', 'asoc/topic/fsl-asrc' and 'asoc/topic/fsl-esai' into asoc-next Merge remote-tracking branches 'asoc/topic/fsl-spdif', 'asoc/topic/img' and 'asoc/topic/intel' into asoc-next Merge remote-tracking branches 'asoc/topic/kcontrol', 'asoc/topic/max98357a' and 'asoc/topic/mtk' into asoc-next Merge remote-tracking branches 'asoc/topic/pxa', 'asoc/topic/qcom', 'asoc/topic/rcar', 'asoc/topic/rk3036' and 'asoc/topic/rockchip' into asoc-next Merge remote-tracking branches 'asoc/topic/rt286', 'asoc/topic/rt5616' and 'asoc/topic/rt5677' into asoc-next Merge remote-tracking branches 'asoc/topic/samsung', 'asoc/topic/sh', 'asoc/topic/ssm2518' and 'asoc/topic/sti' into asoc-next Merge remote-tracking branches 'asoc/topic/tegra', 'asoc/topic/topology', 'asoc/topic/wm8903' and 'asoc/topic/wm8904' into asoc-next Merge remote-tracking branches 'asoc/topic/wm8962', 'asoc/topic/wm8974' and 'asoc/topic/wm9713' into asoc-next Merge tag 'asoc-fix-v4.4-rc6' into asoc-linus Merge tag 'asoc-v4.5' into asoc-next Merge remote-tracking branch 'asoc/topic/rt5677' into asoc-next Merge branch 'topic/rt5640' of git://git.kernel.org/.../broonie/sound into asoc-intel Merge branch 'fix/intel' of git://git.kernel.org/.../broonie/sound into asoc-intel Merge branch 'topic/hdac' of git://git.kernel.org/.../broonie/sound into asoc-intel Merge tag 'asoc-fix-v4.4-rc8' into asoc-linus Merge remote-tracking branch 'asoc/fix/arizona' into asoc-linus Merge remote-tracking branch 'asoc/fix/compress' into asoc-linus Merge remote-tracking branch 'asoc/topic/intel' into asoc-next Merge tag 'asoc-v4.5' into asoc-next Merge remote-tracking branch 'asoc/topic/arizona' into asoc-next Merge remote-tracking branch 'asoc/topic/pcm' into asoc-next Merge remote-tracking branch 'asoc/topic/pcm-list' into asoc-next Merge remote-tracking branch 'asoc/topic/pcm1792a' into asoc-next Merge remote-tracking branch 'asoc/topic/rt5645' into asoc-next Merge remote-tracking branches 'asoc/topic/adsp' and 'asoc/topic/amd' into asoc-next Merge remote-tracking branches 'asoc/topic/bcm2835' and 'asoc/topic/cleanup' into asoc-next Merge remote-tracking branches 'asoc/topic/da7218' and 'asoc/topic/da7219' into asoc-next Merge remote-tracking branches 'asoc/topic/fsl-asrc' and 'asoc/topic/fsl-ssi' into asoc-next Merge remote-tracking branches 'asoc/topic/rcar' and 'asoc/topic/rockchip' into asoc-next Merge remote-tracking branch 'asoc/topic/rt5651' into asoc-next Merge remote-tracking branch 'asoc/topic/wm8960' into asoc-next Markus Elfring (1): ASoC: ssm2518: Use a signed return type for ssm2518_lookup_mcs() Martin Sperl (1): ASoC: bcm2835: cleanup includes by ordering them alphabetically Maruthi Srinivas Bayyavarapu (8): ASoC: dwc: add runtime suspend/resume functionality ASoC: dwc: add quirk for different register offset ASoC: dwc: reconfigure dwc in 'resume' from 'suspend' ASoC: dwc: add quirk to override COMP_PARAM_1 register ASoC: AMD : add ACP 2.2 register headers ASoC: AMD: add AMD ASoC ACP 2.x DMA driver ASoC: AMD: add pm ops ASoC: AMD: Manage ACP 2.x SRAM banks power Mathias Krause (1): ASoC: rt5645: Constify ACPI device ids Maxime Ripard (3): ASoC: sun4i: Implement MIC1 capture ASoC: sunxi: Remove useless comments and variable ASoC: sun4i-codec: pass through clk_set_rate error Mengdong Lin (12): ASoC: topology: ABI - Rename dai_elems to pcm_elems in manifest ASoC: Vendor drivers get a link's runtime by snd_soc_get_pcm_runtime() ASoC: Change the PCM runtime array to a list ASoC: Define soc_init_dai_link() to wrap link intialization. ASoC: Change 2nd argument of soc_bind_dai_link() to DAI link pointer ASoC: Implement DAI links in a list & define API to add/remove a link ASoC: Define add/remove_dai_link ops for a soc card ASoC: soc_bind_dai_link() directly returns success for a bound DAI link ASoC: Bind new DAI links after probing components ASoC: Define soc_add_dai() to add a DAI to a component ASoC: Support registering a DAI dynamically ASoC: Make aux_dev more like a generic component Michael Trimarchi (3): ASoC: rockchip: i2s: Add SNDRV_PCM_FMTBIT_S32_LE support ASoC: pcm1792a: Rename internal data and function to pcm179x ASoC: pcm1792a: Rename pcm1792a to pcm179x Moise Gergaud (1): ASoC: sti: set iec958 channel status sampling freq Mousami Jana (1): ASoC: Intel: Skylake: add LARGE_CONFIG_GET IPC support Mythri P K (1): ASoC: core: Pass kcontrol to bytes tlv callbacks Oder Chiou (1): ASoC: rt5645: Use the mod_delayed_work instead of the queue_delayed_work and cancel_delayed_work_sync Omair M Abdullah (2): ASoC: Intel: Skylake: update mailbox uplink window offset and size ASoC: Intel: Skylake: read params from DSP if module is on PC Liao (1): ASoC: dpcm: Apply symmetry for DPCM Pierre-Louis Bossart (14): ASoC: Intel: boards: align pin names between byt-rt5640 drivers ASoC: Intel: boards: start merging byt-rt5640 drivers ASoC: Intel: boards: merge DMI-based quirks in bytcr-rt5640 driver ASoC: Intel: tag byt-rt5640 machine driver as deprecated ASoc: Intel: Atom: add deep buffer definitions for atom platforms ASoC: Intel: boards: add DEEP_BUFFER support for BYT/CHT/BSW ASoC: Intel: Atom: add 24-bit support for media playback and capture ASoC: Intel: Atom: clean-up compressed DAI definition ASoC: Intel: Atom: flip logic for gain Switch ASoC: Intel: bytcr-rt5640: enable ASRC ASoC: Intel: fix ACPI probe regression with Atom DPCM driver ASoC: Intel: add bytct-rt5651 machine driver ASoC: Intel: bytcr_rt5640: fixup DAI codec_name with HID ASoC: Intel: Atom: add support for RT5642 Praveen Diwakar (1): ASoC: Intel: Skylake: Update ignore suspend for rt286 machine Richard Fitzgerald (3): ASoC: wm8998: Remove duplicated consts ASoC: cs47l24: Add driver for Cirrus Logic CS47L24 and WM1831 codecs ASoC: arizona: In arizona_calc_fratio make new codecs the default case Robert Jarzmik (3): ASoC: wm9713: convert to regmap ASoC: wm9713: use snd_soc_*() calls to update ac97 registers ASoC: ac97: add gpio chip Rohit Ainapure (3): ASoC: max98357a: Add ACPI ID for Maxim ASoC: Intel: Add Nuvoton+Maxim machine driver entry ASoC: Intel: Skylake: Add Nuvoton Maxim machine driver Sanyog Kale (1): ASoC: pcm: allow delayed suspending request by users Sathyanarayana Nujella (1): ASoc: Intel: boards: Add WOV as sink for nau88l25_ssm4567 machine Sebastien Guiriec (1): ASoC: Intel: bytcr_rt5640: set SSP to I2S mode 2ch Shengjiu Wang (3): ASoC: fsl_esai: spba clock is needed by esai device ASoC: fsl_spdif: spba clk is needed by spdif device ASoC: fsl_asrc: spba clock is needed by asrc device Simon Horman (1): ASoC: rsnd: Add device tree support for r8a77{79,93,94} Songjun Wu (6): ASoC: Atmel: ClassD: supports mono audio ASoC: Atmel: ClassD: add GCK's parent clock in DT binding ASoC: Atmel: ClassD: unregister codec when error occurs ASoC: atmel-pdmic: add the Pulse Density Modulation Interface Controller ASoC: atmel-classd: DT binding for PDMIC driver ASoC: atmel_wm8904: add snd_soc_pm_ops Stephen Boyd (1): ASoC: qcom: Specify LE device endianness Subhransu S. Prusty (10): ASoC: Intel: Skylake: Fix to cleanup if skl_sst_dsp_init fails ALSA: hdac: structure definition for ext_dma_params ASoC: hdac-hdmi: Add hdmi driver ASoC: hdac_hdmi: Add PM support for HDMI ASoC: hdac_hdmi: Add hdac hdmi dai ops ASoC: hdac_hdmi: Setup and start infoframe ASoC: hdac_hdmi: Use i915 component framework for PM ASoC: hdac_hdmi: Fix to check num nodes correctly ASoC: hdac_hdmi: Fix to warn instead of err for no connected nids ASoC: hdac_hdmi: Use list to add pins and converters Sudip Mukherjee (3): ASoC: hdac_hdmi: fix possible NULL dereference ASoC: tegra_alc5632: check return value ASoC: hdac_hdmi: check error return Sugar Zhang (2): ASoC: rockchip: i2s: compatible with different chips ASoC: rockchip: add playback property Takashi Iwai (1): ASoC: Fix typo in kernel doc comment for snd_soc_put_volsw_sx() Vincent Stehlé (1): ASoC: Intel: Skylake: fix typo in sizeof Vinod Koul (23): ASoC: Intel: Skylake: Fix substream dereference before check ASoC: Intel: Skylake: Fix resource cleanup on teardown ASoC: Intel: Move apci find machine routines ASoC: Intel: Atom: move atom driver to common acpi match ASoC: Intel: Skylake: Fix skl machine driver creation ASoC: Intel: add fw name to common dsp context ASoC: Intel: Skylake: Use the fw name from ACPI mach table ASoC: rt286: set combo jack for Skylake ASoC: core: refactor soc_link_dai_widgets() ASoC: Intel: Skylake: Add I2C depends for SKL machine ASoC: Intel: Skylake: Constrain the audio devices ASoC: fsl-asoc-card: Update the rtd query ASoC: Intel: Skylake: Update the rtd query ASoC: Intel: Skylake: Fix test of a field address ASoC: hdac-hdmi: make driver select CONFIG_HDMI ASoC: dapm: add a dapm sink widget ASoC: core: mark SND_SOC_BYTES_EXT as deprecated ASoC: Intel: Skylake: Move up pipe mem free ASoC: Intel: Skylake: add wov as int sink ASoC: Intel: Skylake: Fix the dapm machine map ASoC: compress: Fix compress device direction check ALSA: hdac: add snd_hdac_ext_bus_link_power_up_all ASoC: Intel: Skylake: manage link power in active suspend Yong Zhi (2): ASoc: Intel: boards: update ignore suspend for nau88l25_ssm4567 machine ASoc: Intel: boards: update constraints for nau88l25_ssm4567 machine ZhengShunQian (2): ASoC: rk3036: Inno codec driver for RK3036 SoC ASoC: rk3036: Add binding doc of inno-rk3036 codec driver Zidan Wang (13): ASoC: fsl_esai: ETDR and TX0~5 registers are non volatile ASoC: fsl-sai: add default register map for regmap cache ASoC: fsl_spdif: STL and STR registers are non volatile ASoC: fsl_ssi: using macro for default register map ASoC: fsl-sai: don't set bclk for Tx/Rx Synchronous with another SAI mode ASoC: fsl-sai: set xCR4/xCR5/xMR for SAI master mode ASoC: fsl_sai: add tdm slots operation support ASoC: fsl: using params_width function to simplify code ASoC: fsl_asrc: add support for 8-30kHz output sample rate ASoC: wm8960: add kcontrol to select ADC data output ASoC: fsl_asrc: sound is wrong after suspend/resume ASoC: wm8960: add DAC mono mix kcontrol ASoC: wm8960: boost switch should be closed when using L/RINPUT1 kbuild test robot (2): ASoC: rk3036: fix platform_no_drv_owner.cocci warnings ASoC: da7218: fix boolreturn.cocci warnings Documentation/devicetree/bindings/sound/ak4613.txt | 10 + .../devicetree/bindings/sound/atmel-classd.txt | 6 + .../devicetree/bindings/sound/atmel-pdmic.txt | 55 + Documentation/devicetree/bindings/sound/da7218.txt | 104 + Documentation/devicetree/bindings/sound/da7219.txt | 8 +- .../devicetree/bindings/sound/fsl,asrc.txt | 5 + .../devicetree/bindings/sound/fsl,esai.txt | 5 + .../devicetree/bindings/sound/fsl,spdif.txt | 5 + .../devicetree/bindings/sound/img,i2s-in.txt | 47 + .../devicetree/bindings/sound/img,i2s-out.txt | 51 + .../devicetree/bindings/sound/img,parallel-out.txt | 44 + .../bindings/sound/img,pistachio-internal-dac.txt | 18 + .../devicetree/bindings/sound/img,spdif-in.txt | 41 + .../devicetree/bindings/sound/img,spdif-out.txt | 44 + .../devicetree/bindings/sound/inno-rk3036.txt | 20 + .../bindings/sound/{pcm1792a.txt => pcm179x.txt} | 2 +- .../devicetree/bindings/sound/renesas,rsnd.txt | 82 + .../bindings/sound/renesas,rsrc-card.txt | 4 +- .../devicetree/bindings/sound/rockchip-i2s.txt | 2 + Documentation/devicetree/bindings/sound/rt5616.txt | 26 + Documentation/devicetree/bindings/sound/rt5651.txt | 41 + Documentation/devicetree/bindings/sound/rt5659.txt | 75 + Documentation/devicetree/bindings/sound/rt5677.txt | 2 +- .../devicetree/bindings/sound/sun4i-codec.txt | 3 + .../devicetree/bindings/sound/ti,pcm3168a.txt | 48 + .../devicetree/bindings/sound/wlf,wm8974.txt | 15 + Documentation/sound/alsa/img,spdif-in.txt | 49 + arch/arm/mach-s3c64xx/dev-audio.c | 47 +- arch/arm/mach-s3c64xx/include/mach/dma.h | 52 +- arch/arm/plat-samsung/devs.c | 23 +- arch/x86/include/asm/platform_sst_audio.h | 1 + drivers/dma/Kconfig | 2 +- include/linux/platform_data/asoc-s3c.h | 8 + include/sound/ac97_codec.h | 3 + include/sound/da7218.h | 109 + include/sound/da7219.h | 14 +- include/sound/designware_i2s.h | 6 + include/sound/hda_register.h | 9 + include/sound/hdaudio_ext.h | 21 + include/sound/rt5659.h | 49 + include/sound/soc-dai.h | 1 + include/sound/soc-dapm.h | 4 + include/sound/soc-topology.h | 6 +- include/sound/soc.h | 53 +- include/uapi/sound/asoc.h | 2 +- include/uapi/sound/compress_params.h | 5 +- sound/hda/ext/hdac_ext_controller.c | 29 +- sound/hda/ext/hdac_ext_stream.c | 72 + sound/soc/Kconfig | 2 + sound/soc/Makefile | 2 + sound/soc/amd/Kconfig | 4 + sound/soc/amd/Makefile | 3 + sound/soc/amd/acp-pcm-dma.c | 1043 +++++ sound/soc/amd/acp.h | 118 + sound/soc/amd/include/acp_2_2_d.h | 609 +++ sound/soc/amd/include/acp_2_2_enum.h | 1068 +++++ sound/soc/amd/include/acp_2_2_sh_mask.h | 2292 +++++++++++ sound/soc/atmel/Kconfig | 9 + sound/soc/atmel/Makefile | 2 + sound/soc/atmel/atmel-classd.c | 26 +- sound/soc/atmel/atmel-pdmic.c | 738 ++++ sound/soc/atmel/atmel-pdmic.h | 80 + sound/soc/atmel/atmel_wm8904.c | 1 + sound/soc/bcm/bcm2835-i2s.c | 12 +- sound/soc/codecs/Kconfig | 62 +- sound/soc/codecs/Makefile | 22 +- sound/soc/codecs/ak4613.c | 118 +- sound/soc/codecs/arizona.c | 146 +- sound/soc/codecs/arizona.h | 17 +- sound/soc/codecs/cs47l24.c | 1148 ++++++ sound/soc/codecs/cs47l24.h | 23 + sound/soc/codecs/da7218.c | 3341 ++++++++++++++++ sound/soc/codecs/da7218.h | 1414 +++++++ sound/soc/codecs/da7219.c | 163 +- sound/soc/codecs/da7219.h | 9 - sound/soc/codecs/hdac_hdmi.c | 697 ++++ sound/soc/codecs/inno_rk3036.c | 490 +++ sound/soc/codecs/inno_rk3036.h | 123 + sound/soc/codecs/max98357a.c | 10 + sound/soc/codecs/pcm1792a.c | 271 -- sound/soc/codecs/pcm179x.c | 271 ++ sound/soc/codecs/{pcm1792a.h => pcm179x.h} | 6 +- sound/soc/codecs/pcm3168a-i2c.c | 66 + sound/soc/codecs/pcm3168a-spi.c | 65 + sound/soc/codecs/pcm3168a.c | 767 ++++ sound/soc/codecs/pcm3168a.h | 100 + sound/soc/codecs/rt286.c | 6 + sound/soc/codecs/rt298.c | 2 - sound/soc/codecs/rt5616.c | 1381 +++++++ sound/soc/codecs/rt5616.h | 1819 +++++++++ sound/soc/codecs/rt5640.c | 103 + sound/soc/codecs/rt5640.h | 17 + sound/soc/codecs/rt5645.c | 322 +- sound/soc/codecs/rt5651.c | 31 + sound/soc/codecs/rt5659.c | 4223 ++++++++++++++++++++ sound/soc/codecs/rt5659.h | 1819 +++++++++ sound/soc/codecs/rt5677.c | 13 +- sound/soc/codecs/ssm2518.c | 2 +- sound/soc/codecs/twl6040.c | 3 +- sound/soc/codecs/wm5110.c | 252 +- sound/soc/codecs/wm8903.c | 2 +- sound/soc/codecs/wm8904.c | 2 +- sound/soc/codecs/wm8960.c | 24 +- sound/soc/codecs/wm8962.c | 3 +- sound/soc/codecs/wm8974.c | 7 + sound/soc/codecs/wm8998.c | 46 +- sound/soc/codecs/wm9713.c | 296 +- sound/soc/codecs/wm_adsp.c | 1095 ++++- sound/soc/codecs/wm_adsp.h | 28 +- sound/soc/dwc/designware_i2s.c | 117 +- sound/soc/fsl/fsl-asoc-card.c | 21 +- sound/soc/fsl/fsl_asrc.c | 62 +- sound/soc/fsl/fsl_asrc.h | 9 + sound/soc/fsl/fsl_esai.c | 63 +- sound/soc/fsl/fsl_sai.c | 98 +- sound/soc/fsl/fsl_sai.h | 3 + sound/soc/fsl/fsl_spdif.c | 35 +- sound/soc/fsl/fsl_ssi.c | 49 +- sound/soc/fsl/imx-pcm-dma.c | 2 + sound/soc/fsl/imx-pcm-fiq.c | 4 +- sound/soc/fsl/imx-wm8962.c | 10 +- sound/soc/fsl/mpc8610_hpcd.c | 3 +- sound/soc/fsl/p1022_ds.c | 3 +- sound/soc/fsl/p1022_rdk.c | 3 +- sound/soc/generic/simple-card.c | 12 +- sound/soc/img/Kconfig | 52 + sound/soc/img/Makefile | 7 + sound/soc/img/img-i2s-in.c | 516 +++ sound/soc/img/img-i2s-out.c | 565 +++ sound/soc/img/img-parallel-out.c | 327 ++ sound/soc/img/img-spdif-in.c | 806 ++++ sound/soc/img/img-spdif-out.c | 441 ++ sound/soc/img/pistachio-internal-dac.c | 287 ++ sound/soc/intel/Kconfig | 58 +- sound/soc/intel/atom/sst-atom-controls.c | 5 +- sound/soc/intel/atom/sst-atom-controls.h | 1 + sound/soc/intel/atom/sst-mfld-platform-pcm.c | 32 +- sound/soc/intel/atom/sst/sst_acpi.c | 82 +- sound/soc/intel/atom/sst/sst_stream.c | 2 +- sound/soc/intel/baytrail/sst-baytrail-pcm.c | 2 + sound/soc/intel/boards/Makefile | 6 + sound/soc/intel/boards/bytcr_rt5640.c | 266 +- sound/soc/intel/boards/bytcr_rt5651.c | 332 ++ sound/soc/intel/boards/cht_bsw_max98090_ti.c | 19 +- sound/soc/intel/boards/cht_bsw_rt5645.c | 19 +- sound/soc/intel/boards/cht_bsw_rt5672.c | 19 +- sound/soc/intel/boards/skl_nau88l25_max98357a.c | 485 +++ sound/soc/intel/boards/skl_nau88l25_ssm4567.c | 536 +++ sound/soc/intel/boards/skl_rt286.c | 128 +- sound/soc/intel/common/Makefile | 12 +- sound/soc/intel/common/sst-acpi.c | 41 +- sound/soc/intel/common/sst-acpi.h | 33 + sound/soc/intel/common/sst-dsp-priv.h | 8 +- sound/soc/intel/common/sst-dsp.c | 2 +- sound/soc/intel/common/sst-dsp.h | 2 +- sound/soc/intel/common/sst-firmware.c | 20 +- sound/soc/intel/common/sst-match-acpi.c | 43 + sound/soc/intel/haswell/sst-haswell-dsp.c | 2 +- sound/soc/intel/haswell/sst-haswell-ipc.c | 31 +- sound/soc/intel/skylake/skl-messages.c | 280 +- sound/soc/intel/skylake/skl-nhlt.c | 19 +- sound/soc/intel/skylake/skl-pcm.c | 310 +- sound/soc/intel/skylake/skl-sst-cldma.c | 97 +- sound/soc/intel/skylake/skl-sst-dsp.h | 21 +- sound/soc/intel/skylake/skl-sst-ipc.c | 123 +- sound/soc/intel/skylake/skl-sst-ipc.h | 14 + sound/soc/intel/skylake/skl-sst.c | 217 +- sound/soc/intel/skylake/skl-topology.c | 658 ++- sound/soc/intel/skylake/skl-topology.h | 63 +- sound/soc/intel/skylake/skl-tplg-interface.h | 105 +- sound/soc/intel/skylake/skl.c | 213 +- sound/soc/intel/skylake/skl.h | 8 +- sound/soc/mediatek/mtk-afe-common.h | 1 - sound/soc/mediatek/mtk-afe-pcm.c | 59 +- sound/soc/omap/omap-hdmi-audio.c | 2 + sound/soc/pxa/brownstone.c | 3 +- sound/soc/pxa/mioa701_wm9713.c | 6 +- sound/soc/qcom/lpass-cpu.c | 1 + sound/soc/rockchip/rockchip_i2s.c | 139 +- sound/soc/rockchip/rockchip_max98090.c | 6 + sound/soc/rockchip/rockchip_rt5645.c | 6 + sound/soc/samsung/Kconfig | 2 - sound/soc/samsung/ac97.c | 29 +- sound/soc/samsung/bells.c | 40 +- sound/soc/samsung/dma.h | 6 +- sound/soc/samsung/dmaengine.c | 20 +- sound/soc/samsung/i2s.c | 31 +- sound/soc/samsung/littlemill.c | 32 +- sound/soc/samsung/odroidx2_max98090.c | 9 +- sound/soc/samsung/pcm.c | 25 +- sound/soc/samsung/s3c2412-i2s.c | 16 +- sound/soc/samsung/s3c24xx-i2s.c | 16 +- sound/soc/samsung/snow.c | 9 +- sound/soc/samsung/spdif.c | 17 +- sound/soc/samsung/speyside.c | 12 +- sound/soc/samsung/tobermory.c | 21 +- sound/soc/sh/Kconfig | 1 - sound/soc/sh/fsi.c | 11 +- sound/soc/sh/rcar/Makefile | 2 +- sound/soc/sh/rcar/adg.c | 118 +- sound/soc/sh/rcar/cmd.c | 171 + sound/soc/sh/rcar/core.c | 586 +-- sound/soc/sh/rcar/ctu.c | 99 +- sound/soc/sh/rcar/dma.c | 245 +- sound/soc/sh/rcar/dvc.c | 273 +- sound/soc/sh/rcar/gen.c | 133 +- sound/soc/sh/rcar/mix.c | 158 +- sound/soc/sh/rcar/rcar_snd.h | 117 - sound/soc/sh/rcar/rsnd.h | 335 +- sound/soc/sh/rcar/rsrc-card.c | 129 +- sound/soc/sh/rcar/src.c | 898 ++--- sound/soc/sh/rcar/ssi.c | 755 ++-- sound/soc/sh/rcar/ssiu.c | 225 ++ sound/soc/soc-ac97.c | 125 + sound/soc/soc-compress.c | 23 +- sound/soc/soc-core.c | 866 ++-- sound/soc/soc-dapm.c | 14 +- sound/soc/soc-ops.c | 4 +- sound/soc/soc-pcm.c | 110 +- sound/soc/sti/uniperif_player.c | 3 +- sound/soc/sunxi/sun4i-codec.c | 279 +- sound/soc/tegra/tegra_alc5632.c | 12 +- sound/soc/tegra/tegra_wm8903.c | 3 +- 223 files changed, 37552 insertions(+), 4622 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/atmel-pdmic.txt create mode 100644 Documentation/devicetree/bindings/sound/da7218.txt create mode 100644 Documentation/devicetree/bindings/sound/img,i2s-in.txt create mode 100644 Documentation/devicetree/bindings/sound/img,i2s-out.txt create mode 100644 Documentation/devicetree/bindings/sound/img,parallel-out.txt create mode 100644 Documentation/devicetree/bindings/sound/img,pistachio-internal-dac.txt create mode 100644 Documentation/devicetree/bindings/sound/img,spdif-in.txt create mode 100644 Documentation/devicetree/bindings/sound/img,spdif-out.txt create mode 100644 Documentation/devicetree/bindings/sound/inno-rk3036.txt rename Documentation/devicetree/bindings/sound/{pcm1792a.txt => pcm179x.txt} (88%) create mode 100644 Documentation/devicetree/bindings/sound/rt5616.txt create mode 100644 Documentation/devicetree/bindings/sound/rt5651.txt create mode 100644 Documentation/devicetree/bindings/sound/rt5659.txt create mode 100644 Documentation/devicetree/bindings/sound/ti,pcm3168a.txt create mode 100644 Documentation/devicetree/bindings/sound/wlf,wm8974.txt create mode 100644 Documentation/sound/alsa/img,spdif-in.txt create mode 100644 include/sound/da7218.h create mode 100644 include/sound/rt5659.h create mode 100644 sound/soc/amd/Kconfig create mode 100644 sound/soc/amd/Makefile create mode 100644 sound/soc/amd/acp-pcm-dma.c create mode 100644 sound/soc/amd/acp.h create mode 100644 sound/soc/amd/include/acp_2_2_d.h create mode 100644 sound/soc/amd/include/acp_2_2_enum.h create mode 100644 sound/soc/amd/include/acp_2_2_sh_mask.h create mode 100644 sound/soc/atmel/atmel-pdmic.c create mode 100644 sound/soc/atmel/atmel-pdmic.h create mode 100644 sound/soc/codecs/cs47l24.c create mode 100644 sound/soc/codecs/cs47l24.h create mode 100644 sound/soc/codecs/da7218.c create mode 100644 sound/soc/codecs/da7218.h create mode 100644 sound/soc/codecs/hdac_hdmi.c create mode 100644 sound/soc/codecs/inno_rk3036.c create mode 100644 sound/soc/codecs/inno_rk3036.h delete mode 100644 sound/soc/codecs/pcm1792a.c create mode 100644 sound/soc/codecs/pcm179x.c rename sound/soc/codecs/{pcm1792a.h => pcm179x.h} (91%) create mode 100644 sound/soc/codecs/pcm3168a-i2c.c create mode 100644 sound/soc/codecs/pcm3168a-spi.c create mode 100644 sound/soc/codecs/pcm3168a.c create mode 100644 sound/soc/codecs/pcm3168a.h create mode 100644 sound/soc/codecs/rt5616.c create mode 100644 sound/soc/codecs/rt5616.h create mode 100644 sound/soc/codecs/rt5659.c create mode 100644 sound/soc/codecs/rt5659.h create mode 100644 sound/soc/img/Kconfig create mode 100644 sound/soc/img/Makefile create mode 100644 sound/soc/img/img-i2s-in.c create mode 100644 sound/soc/img/img-i2s-out.c create mode 100644 sound/soc/img/img-parallel-out.c create mode 100644 sound/soc/img/img-spdif-in.c create mode 100644 sound/soc/img/img-spdif-out.c create mode 100644 sound/soc/img/pistachio-internal-dac.c create mode 100644 sound/soc/intel/boards/bytcr_rt5651.c create mode 100644 sound/soc/intel/boards/skl_nau88l25_max98357a.c create mode 100644 sound/soc/intel/boards/skl_nau88l25_ssm4567.c create mode 100644 sound/soc/intel/common/sst-acpi.h create mode 100644 sound/soc/intel/common/sst-match-acpi.c create mode 100644 sound/soc/sh/rcar/cmd.c delete mode 100644 sound/soc/sh/rcar/rcar_snd.h create mode 100644 sound/soc/sh/rcar/ssiu.c

2 4

[alsa-devel] [PATCH 1/3] ASoC: fsl_ssi: mark SACNT register volatile
by Maciej S. Szmigiero 11 Jan '16

11 Jan '16

SACNT register should be marked volatile since its WR and RD bits are cleared by SSI after completing the relevant operation. This unbreaks AC'97 register access. Fixes: 05cf237972fe ("ASoC: fsl_ssi: Add driver suspend and resume to support MEGA Fast") Signed-off-by: Maciej S. Szmigiero <mail(a)maciej.szmigiero.name> --- sound/soc/fsl/fsl_ssi.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c index e3abad5f980a..cc22354d7758 100644 --- a/sound/soc/fsl/fsl_ssi.c +++ b/sound/soc/fsl/fsl_ssi.c @@ -146,6 +146,7 @@ static bool fsl_ssi_volatile_reg(struct device *dev, unsigned int reg) case CCSR_SSI_SRX1: case CCSR_SSI_SISR: case CCSR_SSI_SFCSR: + case CCSR_SSI_SACNT: case CCSR_SSI_SACADD: case CCSR_SSI_SACDAT: case CCSR_SSI_SATAG: @@ -239,8 +240,9 @@ struct fsl_ssi_private { unsigned int baudclk_streams; unsigned int bitclk_freq; - /*regcache for SFCSR*/ + /* regcache for volatile regs */ u32 regcache_sfcsr; + u32 regcache_sacnt; /* DMA params */ struct snd_dmaengine_dai_dma_data dma_params_tx; @@ -1587,6 +1589,8 @@ static int fsl_ssi_suspend(struct device *dev) regmap_read(regs, CCSR_SSI_SFCSR, &ssi_private->regcache_sfcsr); + regmap_read(regs, CCSR_SSI_SACNT, + &ssi_private->regcache_sacnt); regcache_cache_only(regs, true); regcache_mark_dirty(regs); @@ -1605,6 +1609,8 @@ static int fsl_ssi_resume(struct device *dev) CCSR_SSI_SFCSR_RFWM1_MASK | CCSR_SSI_SFCSR_TFWM1_MASK | CCSR_SSI_SFCSR_RFWM0_MASK | CCSR_SSI_SFCSR_TFWM0_MASK, ssi_private->regcache_sfcsr); + regmap_write(regs, CCSR_SSI_SACNT, + ssi_private->regcache_sacnt); return regcache_sync(regs); }

4 6

[alsa-devel] [PATCH 0/5] ASOC: bcm2835: move bcm2835-i2s to use clock framework
by kernel＠martin.sperl.org 11 Jan '16

11 Jan '16

From: Martin Sperl <kernel(a)martin.sperl.org> This patchset enables the bcm2835-i2s driver to use the clock framework which was introduced with commit 94cb7f76caa0b337 ("Switch to using the new clock driver support"). This commit resulted in the fact that the bcm2835-i2s driver was no longer working due to some register addresses used by 2 drivers (clk-bcm2835 and bcm2835-i2s). To make it all possible this also required the introduction of the PCM clock into the clk-bcm2835 driver. This patchset relies on the patch by Remi Pommarel <repk(a)triplefau.lt> that introduces the ability to set parent clocks ("clk: bcm2835: Support for clock parent selection"), which is (as far as I understood) in clk-next and slated for 4.5. Note that there is one regression: the clk-bcm2835 does not yet support the mash functionality which the SOC-Hw supports, this may result in slightly more "audiable noise" than the original driver. But as this is more about making the driver functional again, this is - I believe - a drawback we can accept for now. Martin Sperl (5): ASoC: bcm2835: cleanup includes by ordering them alphabetically clk: bcm2835: enable management of PCM clock ASoC: bcm2835: move to use the clock framework ARM: bcm2835: I2S: use new register-range and clock framework dt-bindings: bsm2835: fix bindings documentation to use new clock framework .../devicetree/bindings/sound/brcm,bcm2835-i2s.txt | 7 +- arch/arm/boot/dts/bcm2835.dtsi | 5 +- drivers/clk/bcm/clk-bcm2835.c | 15 + include/dt-bindings/clock/bcm2835.h | 3 +- sound/soc/bcm/bcm2835-i2s.c | 293 +++++--------------- 5 files changed, 91 insertions(+), 232 deletions(-) -- 1.7.10.4

7 20

[alsa-devel] [PATCH -next] ASoC: AMD: Add missing include file
by Guenter Roeck 11 Jan '16

11 Jan '16

arm:allmodconfig, s390:allmodconfig, sparc64:allmodconfig, and probably other builds fail with sound/soc/amd/acp-pcm-dma.c:83:2: error: implicit declaration of function ‘readl’ sound/soc/amd/acp-pcm-dma.c:88:2: error: implicit declaration of function ‘writel’ Include linux/io.h explicitly to fix the problem. Fixes: 7c31335a03b6a ("ASoC: AMD: add AMD ASoC ACP 2.x DMA driver") Cc: Maruthi Srinivas Bayyavarapu <Maruthi.Bayyavarapu(a)amd.com> Signed-off-by: Guenter Roeck <linux(a)roeck-us.net> --- sound/soc/amd/acp-pcm-dma.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/soc/amd/acp-pcm-dma.c b/sound/soc/amd/acp-pcm-dma.c index cc8b841b69b6..3191e0a7d273 100644 --- a/sound/soc/amd/acp-pcm-dma.c +++ b/sound/soc/amd/acp-pcm-dma.c @@ -15,6 +15,7 @@ #include <linux/module.h> #include <linux/delay.h> +#include <linux/io.h> #include <linux/sizes.h> #include <linux/pm_runtime.h> -- 2.1.4

2 1

[alsa-devel] [PATCH] ASoC: hdac_hdmi: remove unused hdac_hdmi_query_pin_connlist
by Arnd Bergmann 11 Jan '16

11 Jan '16

A recent rework removed the only user of the hdac_hdmi_query_pin_connlist function, so we now get a warning when building the hdac_hdmi driver: hdac_hdmi.c:313:12: warning: 'hdac_hdmi_query_pin_connlist' defined but not used [-Wunused-function] This removes the function, which makes the file build cleanly again. Signed-off-by: Arnd Bergmann <arnd(a)arndb.de> Fixes: 15b914476bf2 ("ASoC: hdac_hdmi: Use list to add pins and converters") --- I saw this warning the first time on today's linux-next with ARM randconfig builds diff --git a/sound/soc/codecs/hdac_hdmi.c b/sound/soc/codecs/hdac_hdmi.c index f5df7232405b..5a1ec0f7a1a6 100644 --- a/sound/soc/codecs/hdac_hdmi.c +++ b/sound/soc/codecs/hdac_hdmi.c @@ -310,28 +310,6 @@ hdac_hdmi_query_cvt_params(struct hdac_device *hdac, struct hdac_hdmi_cvt *cvt) return err; } -static int hdac_hdmi_query_pin_connlist(struct hdac_ext_device *hdac, - struct hdac_hdmi_pin *pin) -{ - if (!(get_wcaps(&hdac->hdac, pin->nid) & AC_WCAP_CONN_LIST)) { - dev_warn(&hdac->hdac.dev, - "HDMI: pin %d wcaps %#x does not support connection list\n", - pin->nid, get_wcaps(&hdac->hdac, pin->nid)); - return -EINVAL; - } - - pin->num_mux_nids = snd_hdac_get_connections(&hdac->hdac, pin->nid, - pin->mux_nids, HDA_MAX_CONNECTIONS); - if (pin->num_mux_nids == 0) - dev_warn(&hdac->hdac.dev, "No connections found for pin: %d\n", - pin->nid); - - dev_dbg(&hdac->hdac.dev, "num_mux_nids %d for pin: %d\n", - pin->num_mux_nids, pin->nid); - - return pin->num_mux_nids; -} - static void hdac_hdmi_fill_widget_info(struct snd_soc_dapm_widget *w, enum snd_soc_dapm_type id, const char *wname, const char *stream)

2 1

[alsa-devel] [PATCH] ASoC: AMD: add missing include
by Arnd Bergmann 11 Jan '16

11 Jan '16

The newly added AMD acp driver is missing an include for linux/io.h and fails to build on ARM: sound/soc/amd/acp-pcm-dma.c: In function 'acp_reg_read': sound/soc/amd/acp-pcm-dma.c:83:9: error: implicit declaration of function 'readl' [-Werror=implicit-function-declaration] This adds the missing line. Signed-off-by: Arnd Bergmann <arnd(a)arndb.de> --- This build error also appeared today on linux-next with ARM randconfig diff --git a/sound/soc/amd/acp-pcm-dma.c b/sound/soc/amd/acp-pcm-dma.c index cc8b841b69b6..fa0311e4faed 100644 --- a/sound/soc/amd/acp-pcm-dma.c +++ b/sound/soc/amd/acp-pcm-dma.c @@ -17,6 +17,7 @@ #include <linux/delay.h> #include <linux/sizes.h> #include <linux/pm_runtime.h> +#include <linux/io.h> #include <sound/soc.h>

2 1

[alsa-devel] [PATCH] ALSA: hda - Fixup inverted internal mic for Lenovo E50-80
by David Henningsson 11 Jan '16

11 Jan '16

Inform userspace that one channel of the internal mic has reversed polarity, so it does not attempt to add both channels together and end up with silence. Cc: stable(a)vger.kernel.org Reported-by: Andrzej Mendel <andrzej.mendel(a)gmail.com> Alsa-info: http://www.alsa-project.org/db/?f=3088f82a0cf977855f92af9db8ad406c04f71efa BugLink: https://bugs.launchpad.net/bugs/1529624 Signed-off-by: David Henningsson <david.henningsson(a)canonical.com> --- sound/pci/hda/patch_realtek.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index 3a89d82..2fdda51 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -4666,6 +4666,7 @@ enum { ALC290_FIXUP_SUBWOOFER, ALC290_FIXUP_SUBWOOFER_HSJACK, ALC269_FIXUP_THINKPAD_ACPI, + ALC269_FIXUP_DMIC_THINKPAD_ACPI, ALC255_FIXUP_DELL1_MIC_NO_PRESENCE, ALC255_FIXUP_DELL2_MIC_NO_PRESENCE, ALC255_FIXUP_HEADSET_MODE, @@ -5103,6 +5104,12 @@ static const struct hda_fixup alc269_fixups[] = { .type = HDA_FIXUP_FUNC, .v.func = hda_fixup_thinkpad_acpi, }, + [ALC269_FIXUP_DMIC_THINKPAD_ACPI] = { + .type = HDA_FIXUP_FUNC, + .v.func = alc_fixup_inv_dmic, + .chained = true, + .chain_id = ALC269_FIXUP_THINKPAD_ACPI, + }, [ALC255_FIXUP_DELL1_MIC_NO_PRESENCE] = { .type = HDA_FIXUP_PINS, .v.pins = (const struct hda_pintbl[]) { @@ -5457,6 +5464,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { SND_PCI_QUIRK(0x17aa, 0x2226, "ThinkPad X250", ALC292_FIXUP_TPT440_DOCK), SND_PCI_QUIRK(0x17aa, 0x2233, "Thinkpad", ALC293_FIXUP_LENOVO_SPK_NOISE), SND_PCI_QUIRK(0x17aa, 0x30bb, "ThinkCentre AIO", ALC233_FIXUP_LENOVO_LINE2_MIC_HOTKEY), + SND_PCI_QUIRK(0x17aa, 0x3902, "Lenovo E50-80", ALC269_FIXUP_DMIC_THINKPAD_ACPI), SND_PCI_QUIRK(0x17aa, 0x3977, "IdeaPad S210", ALC283_FIXUP_INT_MIC), SND_PCI_QUIRK(0x17aa, 0x3978, "IdeaPad Y410P", ALC269_FIXUP_NO_SHUTUP), SND_PCI_QUIRK(0x17aa, 0x5013, "Thinkpad", ALC269_FIXUP_LIMIT_INT_MIC_BOOST), -- 1.9.1

2 1

[alsa-devel] [PATCH] usb: Add native DSD support for Oppo HA-1
by Jurgen Kramer 11 Jan '16

11 Jan '16

This patch adds native DSD support for the Oppo HA-1. It uses a XMOS chipset but they use their own vendor ID. Signed-off-by: Jurgen Kramer <gtmkramer(a)xs4all.nl> --- sound/usb/quirks.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/usb/quirks.c b/sound/usb/quirks.c index b6c0c8e..23ea6d8 100644 --- a/sound/usb/quirks.c +++ b/sound/usb/quirks.c @@ -1269,6 +1269,7 @@ u64 snd_usb_interface_dsd_format_quirks(struct snd_usb_audio *chip, case USB_ID(0x20b1, 0x3008): /* iFi Audio micro/nano iDSD */ case USB_ID(0x20b1, 0x2008): /* Matrix Audio X-Sabre */ case USB_ID(0x20b1, 0x300a): /* Matrix Audio Mini-i Pro */ + case USB_ID(0x22d8, 0x0416): /* OPPO HA-1*/ if (fp->altsetting == 2) return SNDRV_PCM_FMTBIT_DSD_U32_BE; break; -- 2.5.0

2 1

[alsa-devel] [PATCH] hda-emu: Add keycode* to input_dev
by David Henningsson 11 Jan '16

11 Jan '16

Signed-off-by: David Henningsson <david.henningsson(a)canonical.com> --- include/linux/input.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/include/linux/input.h b/include/linux/input.h index 213c12b..c710fe4 100644 --- a/include/linux/input.h +++ b/include/linux/input.h @@ -26,6 +26,11 @@ struct input_dev { unsigned long keybit[0x300 / (sizeof(long) * 8)]; /* ... */ + unsigned int keycodemax; + unsigned int keycodesize; + void *keycode; + /* ... */ + int (*open)(struct input_dev *dev); void (*close)(struct input_dev *dev); int (*flush)(struct input_dev *dev, struct file *file); -- 1.9.1

2 1

[alsa-devel] [PATCH v3 0/5] Add support for Cirrus Logic CS47L24 and WM1831 codecs
by Richard Fitzgerald 11 Jan '16

11 Jan '16

---- Changes since v2 MFD: - Make binding doc a separate patch, add updates to supply bindings - Fix review comments ASoC:: - Fix sort order in KConfig and Makefile MAINTAINERS: - Add patch to update MAINTAINERS ---- mfd patch based on Lee Jones's for-next gpio patch based on Linus Walleij's for-next ASoC patch based on Mark Brown's for-next Lee/Mark - can one of you take all three patches (with maintainer acks) so that the patch set is kept together? Richard Fitzgerald (5): mfd: arizona: Support Cirrus Logic CS47L24 and WM1831 mfd: arizona: Update DT bindings to add CS47L24 and WM1831 gpio: arizona: Support Cirrus Logic CS47L24 and WM1831 ASoC: cs47l24: Add driver for Cirrus Logic CS47L24 and WM1831 codecs MAINTAINERS: Update Wolfson Micro section to include CS47L24 source Documentation/devicetree/bindings/mfd/arizona.txt | 9 +- MAINTAINERS | 2 + drivers/gpio/gpio-arizona.c | 4 + drivers/mfd/Kconfig | 18 +- drivers/mfd/Makefile | 3 + drivers/mfd/arizona-core.c | 74 +- drivers/mfd/arizona-irq.c | 40 +- drivers/mfd/arizona-spi.c | 7 + drivers/mfd/arizona.h | 4 + drivers/mfd/cs47l24-tables.c | 1629 +++++++++++++++++++++ include/linux/mfd/arizona/core.h | 3 + sound/soc/codecs/Kconfig | 8 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/cs47l24.c | 1148 +++++++++++++++ sound/soc/codecs/cs47l24.h | 23 + 15 files changed, 2948 insertions(+), 26 deletions(-) create mode 100644 drivers/mfd/cs47l24-tables.c create mode 100644 sound/soc/codecs/cs47l24.c create mode 100644 sound/soc/codecs/cs47l24.h -- 1.9.1

4 9

[alsa-devel] [PATCH] add power management S3 solution
by John Hsu 11 Jan '16

11 Jan '16

This patch is to fix interrupt fails when resume back. In solution, we add IRQ re-initiation, and reconstruct suspend and resume with set_bias_level function. Signed-off-by: John Hsu <KCHSU0(a)nuvoton.com> --- sound/soc/codecs/nau8825.c | 42 ++++++++++++++++++++++++++++++++++++------ 1 file changed, 36 insertions(+), 6 deletions(-) diff --git a/sound/soc/codecs/nau8825.c b/sound/soc/codecs/nau8825.c index 504c969..2e2e11a 100644 --- a/sound/soc/codecs/nau8825.c +++ b/sound/soc/codecs/nau8825.c @@ -1092,6 +1092,36 @@ static int nau8825_set_sysclk(struct snd_soc_codec *codec, int clk_id, return nau8825_configure_sysclk(nau8825, clk_id, freq); } +static int nau8825_resume_setup(struct nau8825 *nau8825) +{ + struct regmap *regmap = nau8825->regmap; + + /* IRQ Output Enable */ + regmap_update_bits(regmap, NAU8825_REG_INTERRUPT_MASK, + NAU8825_IRQ_OUTPUT_EN, NAU8825_IRQ_OUTPUT_EN); + + /* Enable internal VCO needed for interruptions */ + nau8825_configure_sysclk(nau8825, NAU8825_CLK_INTERNAL, 0); + + /* Enable DDACR needed for interrupts */ + regmap_update_bits(regmap, NAU8825_REG_ENA_CTRL, + NAU8825_ENABLE_DACR, NAU8825_ENABLE_DACR); + + /* Chip needs one FSCLK cycle in order to generate interrupts, + * as we cannot guarantee one will be provided by the system. Turning + * master mode on then off enables us to generate that FSCLK cycle + * with a minimum of contention on the clock bus. + */ + regmap_update_bits(regmap, NAU8825_REG_I2S_PCM_CTRL2, + NAU8825_I2S_MS_MASK, NAU8825_I2S_MS_MASTER); + regmap_update_bits(regmap, NAU8825_REG_I2S_PCM_CTRL2, + NAU8825_I2S_MS_MASK, NAU8825_I2S_MS_SLAVE); + + nau8825_restart_jack_detection(regmap); + + return 0; +} + static int nau8825_set_bias_level(struct snd_soc_codec *codec, enum snd_soc_bias_level level) { @@ -1121,6 +1151,8 @@ static int nau8825_set_bias_level(struct snd_soc_codec *codec, "Failed to sync cache: %d\n", ret); return ret; } + if (nau8825->irq) + nau8825_resume_setup(nau8825); } break; @@ -1330,24 +1362,22 @@ static int nau8825_i2c_remove(struct i2c_client *client) #ifdef CONFIG_PM_SLEEP static int nau8825_suspend(struct device *dev) { - struct i2c_client *client = to_i2c_client(dev); struct nau8825 *nau8825 = dev_get_drvdata(dev); + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(nau8825->dapm); - disable_irq(client->irq); + disable_irq(nau8825->irq); + snd_soc_codec_force_bias_level(codec, SND_SOC_BIAS_OFF); regcache_cache_only(nau8825->regmap, true); - regcache_mark_dirty(nau8825->regmap); return 0; } static int nau8825_resume(struct device *dev) { - struct i2c_client *client = to_i2c_client(dev); struct nau8825 *nau8825 = dev_get_drvdata(dev); regcache_cache_only(nau8825->regmap, false); - regcache_sync(nau8825->regmap); - enable_irq(client->irq); + enable_irq(nau8825->irq); return 0; } -- 2.6.4

1 0

[alsa-devel] wrong channel mapping in a52 plugin
by Tom Yan 11 Jan '16

11 Jan '16

I am using alsa-lib/alsa-utils/alsa-plugins 1.1.0 and ffmpeg 2.8.4 and in Arch Linux. So I ran `speaker-test -D wav -c 6 -l 1` with the following .asoundrc: pcm.file { type file file st.ac3 } pcm.a52 { type plug slave { pcm { type a52 slavepcm file } } } pcm.wav { type file slave { pcm a52 } file st.wav format wav } [tom@localhost ~]$ speaker-test -D wav -c 6 -l 1 speaker-test 1.1.0 Playback device is wav Stream parameters are 48000Hz, S16_LE, 6 channels Using 16 octaves of pink noise Rate set to 48000Hz (requested 48000Hz) Buffer size range from 3072 to 206157312 Period size range from 1536 to 1536 Using max buffer size 206157312 Periods = 4 was set period_size = 1536 was set buffer_size = 206157312 0 - Front Left 2 - Front Center 1 - Front Right 5 - Rear Right 4 - Rear Left 3 - LFE Time per period = 0.203625 Then, I encode "st.wav" manually with `ffmpeg -i st.wav ff.ac3`. This shows a comparison between the wav file written directly from the speaker-test directly (st.wav) and the ac3 file I encode with a manual ffmpeg command (ff.ac3): https://ptpb.pw/5XJR.png As you can see, everything is preserved but the LFE is made LFE. And this shows a comparision between the the ac3 file from ffmpeg and the one written from the output of a52 plugin: https://ptpb.pw/YaKg.png If you compare carefully, you can see that Front Center and Rear Left is swapped, LFE and Rear Right is also swapped. Here is a pair of ac3 samples that shows the problem clearly (a lady will be telling the channels one by one): Original: https://ptpb.pw/9XdC.ac3 ALSA a52 plugin re-encoded from mpv output: https://ptpb.pw/SQ_7.ac3

1 2

[alsa-devel] [PATCH 2/3] ASoC: fsl_ssi: mark some registers precious
by Maciej S. Szmigiero 10 Jan '16

10 Jan '16

Mark some registers precious since their reads have side effects (like clearing flags). Signed-off-by: Maciej S. Szmigiero <mail(a)maciej.szmigiero.name> --- sound/soc/fsl/fsl_ssi.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c index cc22354d7758..40dfd8a36484 100644 --- a/sound/soc/fsl/fsl_ssi.c +++ b/sound/soc/fsl/fsl_ssi.c @@ -157,6 +157,21 @@ static bool fsl_ssi_volatile_reg(struct device *dev, unsigned int reg) } } +static bool fsl_ssi_precious_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case CCSR_SSI_SRX0: + case CCSR_SSI_SRX1: + case CCSR_SSI_SISR: + case CCSR_SSI_SACADD: + case CCSR_SSI_SACDAT: + case CCSR_SSI_SATAG: + return true; + default: + return false; + } +} + static bool fsl_ssi_writeable_reg(struct device *dev, unsigned int reg) { switch (reg) { @@ -179,6 +194,7 @@ static const struct regmap_config fsl_ssi_regconfig = { .num_reg_defaults = ARRAY_SIZE(fsl_ssi_reg_defaults), .readable_reg = fsl_ssi_readable_reg, .volatile_reg = fsl_ssi_volatile_reg, + .precious_reg = fsl_ssi_precious_reg, .writeable_reg = fsl_ssi_writeable_reg, .cache_type = REGCACHE_RBTREE, };

4 3

[alsa-devel] [GIT PULL]: Update sst audio firmware for Skylake
by Vinod Koul 10 Jan '16

10 Jan '16

Hello Linux firmware maintainers, Please PULL to receive the updated version of Skylake audio firmware. This version contains some odd fixes and support for MCLK configuration. The following changes since commit bbe4917c054eb0a73e250c6363341e3bf6725839: WHENCE: use https://linuxtv.org for LinuxTV URLs (2015-12-07 02:17:20 +0000) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/firmware.git skl for you to fetch changes up to 177d9f030b4eef981570fc2ef0bf9b0b922d99df: linux-firmware: Update Skylake audio firmware (2016-01-05 19:07:52 +0530) ---------------------------------------------------------------- Vinod Koul (1): linux-firmware: Update Skylake audio firmware WHENCE | 4 ++-- intel/dsp_fw_release.bin | Bin 233472 -> 233472 bytes 2 files changed, 2 insertions(+), 2 deletions(-) Thanks -- ~Vinod

2 1

[alsa-devel] [PATCH] ASoC: Add max98926 codec driver
by anish kumar 10 Jan '16

10 Jan '16

Signed-off-by: anish kumar <yesanishhere(a)gmail.com> --- Changes since v1: Made some widgets as supply widgets Changed the names a bit Moved some registers to volatile struct Some coding style changes added the print for diagnostics Changes in this version: Arranged kconfig and make file entries. Renamed kcontrols Moved probing of the device before registration of codec .../devicetree/bindings/sound/max98926.txt | 32 + sound/soc/codecs/Kconfig | 4 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/max98926.c | 604 +++++++++++++++ sound/soc/codecs/max98926.h | 848 +++++++++++++++++++++ 5 files changed, 1490 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/max98926.txt create mode 100644 sound/soc/codecs/max98926.c create mode 100644 sound/soc/codecs/max98926.h diff --git a/Documentation/devicetree/bindings/sound/max98926.txt b/Documentation/devicetree/bindings/sound/max98926.txt new file mode 100644 index 0000000..0b7f4e4 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/max98926.txt @@ -0,0 +1,32 @@ +max98926 audio CODEC + +This device supports I2C. + +Required properties: + + - compatible : "maxim,max98926" + + - vmon-slot-no : slot number used to send voltage information + or in inteleave mode this will be used as + interleave slot. + + - imon-slot-no : slot number used to send current information + + - interleave-mode : When using two MAX98926 in a system it is + possible to create ADC data that that will + overflow the frame size. Digital Audio Interleave + mode provides a means to output VMON and IMON data + from two devices on a single DOUT line when running + smaller frames sizes such as 32 BCLKS per LRCLK or + 48 BCLKS per LRCLK. + + - reg : the I2C address of the device for I2C + +Example: + +codec: max98926@1a { + compatible = "maxim,max98926"; + vmon-slot-no = <0>; + imon-slot-no = <2>; + reg = <0x1a>; +}; diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index cfdafc4..c3178e3 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -76,6 +76,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_MAX98095 if I2C select SND_SOC_MAX98357A if GPIOLIB select SND_SOC_MAX98925 if I2C + select SND_SOC_MAX98926 if I2C select SND_SOC_MAX9850 if I2C select SND_SOC_MAX9768 if I2C select SND_SOC_MAX9877 if I2C @@ -492,6 +493,9 @@ config SND_SOC_MAX98357A config SND_SOC_MAX98925 tristate +config SND_SOC_MAX98926 + tristate + config SND_SOC_MAX9850 tristate diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index f632fc4..84843f3 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -71,6 +71,7 @@ snd-soc-max98090-objs := max98090.o snd-soc-max98095-objs := max98095.o snd-soc-max98357a-objs := max98357a.o snd-soc-max98925-objs := max98925.o +snd-soc-max98926-objs := max98926.o snd-soc-max9850-objs := max9850.o snd-soc-mc13783-objs := mc13783.o snd-soc-ml26124-objs := ml26124.o @@ -266,6 +267,7 @@ obj-$(CONFIG_SND_SOC_MAX98090) += snd-soc-max98090.o obj-$(CONFIG_SND_SOC_MAX98095) += snd-soc-max98095.o obj-$(CONFIG_SND_SOC_MAX98357A) += snd-soc-max98357a.o obj-$(CONFIG_SND_SOC_MAX98925) += snd-soc-max98925.o +obj-$(CONFIG_SND_SOC_MAX98926) += snd-soc-max98926.o obj-$(CONFIG_SND_SOC_MAX9850) += snd-soc-max9850.o obj-$(CONFIG_SND_SOC_MC13783) += snd-soc-mc13783.o obj-$(CONFIG_SND_SOC_ML26124) += snd-soc-ml26124.o diff --git a/sound/soc/codecs/max98926.c b/sound/soc/codecs/max98926.c new file mode 100644 index 0000000..302272d --- /dev/null +++ b/sound/soc/codecs/max98926.c @@ -0,0 +1,604 @@ +/* + * max98926.c -- ALSA SoC MAX98926 driver + * Copyright 2013-15 Maxim Integrated Products + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include <linux/delay.h> +#include <linux/i2c.h> +#include <linux/module.h> +#include <linux/regmap.h> +#include <linux/slab.h> +#include <linux/cdev.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/soc.h> +#include <sound/tlv.h> +#include "max98926.h" + +static const char * const max98926_boost_voltage_txt[] = { + "8.5V", "8.25V", "8.0V", "7.75V", "7.5V", "7.25V", "7.0V", "6.75V", + "6.5V", "6.5V", "6.5V", "6.5V", "6.5V", "6.5V", "6.5V", "6.5V" +}; + +static const char * const max98926_boost_current_txt[] = { + "0.6", "0.8", "1.0", "1.2", "1.4", "1.6", "1.8", "2.0", + "2.2", "2.4", "2.6", "2.8", "3.2", "3.6", "4.0", "4.4" +}; + +static const char *const max98926_dai_txt[] = { + "Left", "Right", "LeftRight", "LeftRightDiv2", +}; + +static const char *const max98926_pdm_ch_text[] = { + "Current", "Voltage", +}; + +static const char *const max98926_hpf_cutoff_txt[] = { + "Disable", "DC Block", "100Hz", + "200Hz", "400Hz", "800Hz", +}; + +static struct reg_default max98926_reg[] = { + { 0x0B, 0x00 }, /* IRQ Enable0 */ + { 0x0C, 0x00 }, /* IRQ Enable1 */ + { 0x0D, 0x00 }, /* IRQ Enable2 */ + { 0x0E, 0x00 }, /* IRQ Clear0 */ + { 0x0F, 0x00 }, /* IRQ Clear1 */ + { 0x10, 0x00 }, /* IRQ Clear2 */ + { 0x11, 0xC0 }, /* Map0 */ + { 0x12, 0x00 }, /* Map1 */ + { 0x13, 0x00 }, /* Map2 */ + { 0x14, 0xF0 }, /* Map3 */ + { 0x15, 0x00 }, /* Map4 */ + { 0x16, 0xAB }, /* Map5 */ + { 0x17, 0x89 }, /* Map6 */ + { 0x18, 0x00 }, /* Map7 */ + { 0x19, 0x00 }, /* Map8 */ + { 0x1A, 0x04 }, /* DAI Clock Mode 1 */ + { 0x1B, 0x00 }, /* DAI Clock Mode 2 */ + { 0x1C, 0x00 }, /* DAI Clock Divider Denominator MSBs */ + { 0x1D, 0x00 }, /* DAI Clock Divider Denominator LSBs */ + { 0x1E, 0xF0 }, /* DAI Clock Divider Numerator MSBs */ + { 0x1F, 0x00 }, /* DAI Clock Divider Numerator LSBs */ + { 0x20, 0x50 }, /* Format */ + { 0x21, 0x00 }, /* TDM Slot Select */ + { 0x22, 0x00 }, /* DOUT Configuration VMON */ + { 0x23, 0x00 }, /* DOUT Configuration IMON */ + { 0x24, 0x00 }, /* DOUT Configuration VBAT */ + { 0x25, 0x00 }, /* DOUT Configuration VBST */ + { 0x26, 0x00 }, /* DOUT Configuration FLAG */ + { 0x27, 0xFF }, /* DOUT HiZ Configuration 1 */ + { 0x28, 0xFF }, /* DOUT HiZ Configuration 2 */ + { 0x29, 0xFF }, /* DOUT HiZ Configuration 3 */ + { 0x2A, 0xFF }, /* DOUT HiZ Configuration 4 */ + { 0x2B, 0x02 }, /* DOUT Drive Strength */ + { 0x2C, 0x90 }, /* Filters */ + { 0x2D, 0x00 }, /* Gain */ + { 0x2E, 0x02 }, /* Gain Ramping */ + { 0x2F, 0x00 }, /* Speaker Amplifier */ + { 0x30, 0x0A }, /* Threshold */ + { 0x31, 0x00 }, /* ALC Attack */ + { 0x32, 0x80 }, /* ALC Atten and Release */ + { 0x33, 0x00 }, /* ALC Infinite Hold Release */ + { 0x34, 0x92 }, /* ALC Configuration */ + { 0x35, 0x01 }, /* Boost Converter */ + { 0x36, 0x00 }, /* Block Enable */ + { 0x37, 0x00 }, /* Configuration */ + { 0x38, 0x00 }, /* Global Enable */ + { 0x3A, 0x00 }, /* Boost Limiter */ +}; + +static const struct soc_enum max98926_voltage_enum[] = { + SOC_ENUM_SINGLE(MAX98926_DAI_CLK_DIV_N_LSBS, 0, + ARRAY_SIZE(max98926_pdm_ch_text), + max98926_pdm_ch_text), +}; + +static const struct snd_kcontrol_new max98926_voltage_control = + SOC_DAPM_ENUM("Route", max98926_voltage_enum); + +static const struct soc_enum max98926_current_enum[] = { + SOC_ENUM_SINGLE(MAX98926_DAI_CLK_DIV_N_LSBS, + MAX98926_PDM_SOURCE_1_SHIFT, + ARRAY_SIZE(max98926_pdm_ch_text), + max98926_pdm_ch_text), +}; + +static const struct snd_kcontrol_new max98926_current_control = + SOC_DAPM_ENUM("Route", max98926_current_enum); + +static const struct snd_kcontrol_new max98926_mixer_controls[] = { + SOC_DAPM_SINGLE("PCM Single", MAX98926_SPK_AMP, + MAX98926_INSELECT_MODE_SHIFT, 0, 0), + SOC_DAPM_SINGLE("PDM Single", MAX98926_SPK_AMP, + MAX98926_INSELECT_MODE_SHIFT, 1, 0), +}; + +static const struct snd_kcontrol_new max98926_dai_controls[] = { + SOC_DAPM_SINGLE("Left", MAX98926_GAIN, + MAX98926_DAC_IN_SEL_SHIFT, 0, 0), + SOC_DAPM_SINGLE("Right", MAX98926_GAIN, + MAX98926_DAC_IN_SEL_SHIFT, 1, 0), + SOC_DAPM_SINGLE("LeftRight", MAX98926_GAIN, + MAX98926_DAC_IN_SEL_SHIFT, 2, 0), + SOC_DAPM_SINGLE("(Left+Right)/2 Switch", MAX98926_GAIN, + MAX98926_DAC_IN_SEL_SHIFT, 3, 0), +}; + +static const struct snd_soc_dapm_widget max98926_dapm_widgets[] = { + SND_SOC_DAPM_AIF_IN("DAI_OUT", "HiFi Playback", 0, + SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_DAC("Amp Enable", NULL, MAX98926_BLOCK_ENABLE, + MAX98926_SPK_EN_SHIFT, 0), + SND_SOC_DAPM_SUPPLY("Global Enable", MAX98926_GLOBAL_ENABLE, + MAX98926_EN_SHIFT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("VI Enable", MAX98926_BLOCK_ENABLE, + MAX98926_ADC_IMON_EN_WIDTH | + MAX98926_ADC_VMON_EN_SHIFT, + 0, NULL, 0), + SND_SOC_DAPM_PGA("BST Enable", MAX98926_BLOCK_ENABLE, + MAX98926_BST_EN_SHIFT, 0, NULL, 0), + SND_SOC_DAPM_OUTPUT("BE_OUT"), + SND_SOC_DAPM_MIXER("PCM Sel", MAX98926_SPK_AMP, + MAX98926_INSELECT_MODE_SHIFT, 0, + &max98926_mixer_controls[0], + ARRAY_SIZE(max98926_mixer_controls)), + SND_SOC_DAPM_MIXER("DAI Sel", + MAX98926_GAIN, MAX98926_DAC_IN_SEL_SHIFT, 0, + &max98926_dai_controls[0], + ARRAY_SIZE(max98926_dai_controls)), + SND_SOC_DAPM_MUX("PDM CH1 Source", + MAX98926_DAI_CLK_DIV_N_LSBS, + MAX98926_PDM_CURRENT_SHIFT, + 0, &max98926_current_control), + SND_SOC_DAPM_MUX("PDM CH0 Source", + MAX98926_DAI_CLK_DIV_N_LSBS, + MAX98926_PDM_VOLTAGE_SHIFT, + 0, &max98926_voltage_control), +}; + +static const struct snd_soc_dapm_route max98926_audio_map[] = { + {"VI Enable", NULL, "DAI_OUT"}, + {"DAI Sel", "Left", "VI Enable"}, + {"DAI Sel", "Right", "VI Enable"}, + {"DAI Sel", "LeftRight", "VI Enable"}, + {"DAI Sel", "LeftRightDiv2", "VI Enable"}, + {"PCM Sel", "PCM", "DAI Sel"}, + + {"PDM CH1 Source", "Current", "DAI_OUT"}, + {"PDM CH1 Source", "Voltage", "DAI_OUT"}, + {"PDM CH0 Source", "Current", "DAI_OUT"}, + {"PDM CH0 Source", "Voltage", "DAI_OUT"}, + {"PCM Sel", "Analog", "PDM CH1 Source"}, + {"PCM Sel", "Analog", "PDM CH0 Source"}, + {"Amp Enable", NULL, "PCM Sel"}, + + {"BST Enable", NULL, "Amp Enable"}, + {"BE_OUT", NULL, "BST Enable"}, +}; + +static bool max98926_volatile_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case MAX98926_VBAT_DATA: + case MAX98926_VBST_DATA: + case MAX98926_LIVE_STATUS0: + case MAX98926_LIVE_STATUS1: + case MAX98926_LIVE_STATUS2: + case MAX98926_STATE0: + case MAX98926_STATE1: + case MAX98926_STATE2: + case MAX98926_FLAG0: + case MAX98926_FLAG1: + case MAX98926_FLAG2: + case MAX98926_VERSION: + return true; + default: + return false; + } +} + +static bool max98926_readable_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case MAX98926_IRQ_CLEAR0: + case MAX98926_IRQ_CLEAR1: + case MAX98926_IRQ_CLEAR2: + case MAX98926_ALC_HOLD_RLS: + return false; + default: + return true; + } +}; + +DECLARE_TLV_DB_SCALE(max98926_spk_tlv, -600, 100, 0); +DECLARE_TLV_DB_RANGE(max98926_current_tlv, + 0, 11, TLV_DB_SCALE_ITEM(20, 20, 0), + 12, 15, TLV_DB_SCALE_ITEM(320, 40, 0), +); + +static SOC_ENUM_SINGLE_DECL(max98926_dac_hpf_cutoff, + MAX98926_FILTERS, MAX98926_DAC_HPF_SHIFT, + max98926_hpf_cutoff_txt); + +static SOC_ENUM_SINGLE_DECL(max98926_boost_voltage, + MAX98926_CONFIGURATION, MAX98926_BST_VOUT_SHIFT, + max98926_boost_voltage_txt); + +static const struct snd_kcontrol_new max98926_snd_controls[] = { + SOC_SINGLE_TLV("Speaker Volume", MAX98926_GAIN, + MAX98926_SPK_GAIN_SHIFT, + (1<<MAX98926_SPK_GAIN_WIDTH)-1, 0, + max98926_spk_tlv), + SOC_SINGLE("Ramp Switch", MAX98926_GAIN_RAMPING, + MAX98926_SPK_RMP_EN_SHIFT, 1, 0), + SOC_SINGLE("ZCD Switch", MAX98926_GAIN_RAMPING, + MAX98926_SPK_ZCD_EN_SHIFT, 1, 0), + SOC_SINGLE("ALC Switch", MAX98926_THRESHOLD, + MAX98926_ALC_EN_SHIFT, 1, 0), + SOC_SINGLE("ALC Threshold", MAX98926_THRESHOLD, + MAX98926_ALC_TH_SHIFT, + (1<<MAX98926_ALC_TH_WIDTH)-1, 0), + SOC_ENUM("Boost Output Voltage", max98926_boost_voltage), + SOC_SINGLE_TLV("Boost Current Limit", MAX98926_BOOST_LIMITER, + MAX98926_BST_ILIM_SHIFT, + (1<<MAX98926_BST_ILIM_SHIFT)-1, 0, + max98926_current_tlv), + SOC_ENUM("DAC HPF Cutoff", max98926_dac_hpf_cutoff), + SOC_DOUBLE("PDM Channel One", MAX98926_DAI_CLK_DIV_N_LSBS, + MAX98926_PDM_CHANNEL_1_SHIFT, + MAX98926_PDM_CHANNEL_1_HIZ, 1, 0), + SOC_DOUBLE("PDM Channel Zero", MAX98926_DAI_CLK_DIV_N_LSBS, + MAX98926_PDM_CHANNEL_0_SHIFT, + MAX98926_PDM_CHANNEL_0_HIZ, 1, 0), +}; + +static const struct { + int rate; + int sr; +} rate_table[] = { + { + .rate = 8000, + .sr = 0, + }, + { + .rate = 11025, + .sr = 1, + }, + { + .rate = 12000, + .sr = 2, + }, + { + .rate = 16000, + .sr = 3, + }, + { + .rate = 22050, + .sr = 4, + }, + { + .rate = 24000, + .sr = 5, + }, + { + .rate = 32000, + .sr = 6, + }, + { + .rate = 44100, + .sr = 7, + }, + { + .rate = 48000, + .sr = 8, + }, +}; + +static void max98926_set_sense_data(struct max98926_priv *max98926) +{ + regmap_update_bits(max98926->regmap, + MAX98926_DOUT_CFG_VMON, + MAX98926_DAI_VMON_EN_MASK, + MAX98926_DAI_VMON_EN_MASK); + regmap_update_bits(max98926->regmap, + MAX98926_DOUT_CFG_IMON, + MAX98926_DAI_IMON_EN_MASK, + MAX98926_DAI_IMON_EN_MASK); + + if (!max98926->interleave_mode) { + /* set VMON slots */ + regmap_update_bits(max98926->regmap, + MAX98926_DOUT_CFG_VMON, + MAX98926_DAI_VMON_SLOT_MASK, + max98926->v_slot); + /* set IMON slots */ + regmap_update_bits(max98926->regmap, + MAX98926_DOUT_CFG_IMON, + MAX98926_DAI_IMON_SLOT_MASK, + max98926->i_slot); + } else { + /* enable interleave mode */ + regmap_update_bits(max98926->regmap, + MAX98926_FORMAT, + MAX98926_DAI_INTERLEAVE_MASK, + MAX98926_DAI_INTERLEAVE_MASK); + /* set interleave slots */ + regmap_update_bits(max98926->regmap, + MAX98926_DOUT_CFG_VBAT, + MAX98926_DAI_INTERLEAVE_SLOT_MASK, + max98926->v_slot); + } +} + +static int max98926_dai_set_fmt(struct snd_soc_dai *codec_dai, + unsigned int fmt) +{ + struct snd_soc_codec *codec = codec_dai->codec; + struct max98926_priv *max98926 = snd_soc_codec_get_drvdata(codec); + unsigned int invert = 0; + + dev_dbg(codec->dev, "%s: fmt 0x%08X\n", __func__, fmt); + + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBS_CFS: + max98926_set_sense_data(max98926); + break; + default: + dev_err(codec->dev, "DAI clock mode unsupported"); + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + break; + case SND_SOC_DAIFMT_NB_IF: + invert = MAX98926_DAI_WCI_MASK; + break; + case SND_SOC_DAIFMT_IB_NF: + invert = MAX98926_DAI_BCI_MASK; + break; + case SND_SOC_DAIFMT_IB_IF: + invert = MAX98926_DAI_BCI_MASK | MAX98926_DAI_WCI_MASK; + break; + default: + dev_err(codec->dev, "DAI invert mode unsupported"); + return -EINVAL; + } + + regmap_write(max98926->regmap, + MAX98926_FORMAT, MAX98926_DAI_DLY_MASK); + regmap_update_bits(max98926->regmap, MAX98926_FORMAT, + MAX98926_DAI_BCI_MASK, invert); + return 0; +} + +static int max98926_dai_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + int dai_sr = -EINVAL; + int rate = params_rate(params), i; + struct snd_soc_codec *codec = dai->codec; + struct max98926_priv *max98926 = snd_soc_codec_get_drvdata(codec); + /* BCLK/LRCLK ratio calculation */ + int blr_clk_ratio = params_channels(params) * max98926->ch_size; + + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_S16_LE: + regmap_update_bits(max98926->regmap, + MAX98926_FORMAT, + MAX98926_DAI_CHANSZ_MASK, + MAX98926_DAI_CHANSZ_16); + max98926->ch_size = 16; + break; + case SNDRV_PCM_FORMAT_S24_LE: + regmap_update_bits(max98926->regmap, + MAX98926_FORMAT, + MAX98926_DAI_CHANSZ_MASK, + MAX98926_DAI_CHANSZ_24); + max98926->ch_size = 24; + break; + case SNDRV_PCM_FORMAT_S32_LE: + regmap_update_bits(max98926->regmap, + MAX98926_FORMAT, + MAX98926_DAI_CHANSZ_MASK, + MAX98926_DAI_CHANSZ_32); + max98926->ch_size = 32; + break; + default: + dev_dbg(codec->dev, "format unsupported %d", + params_format(params)); + return -EINVAL; + } + + switch (blr_clk_ratio) { + case 32: + regmap_update_bits(max98926->regmap, + MAX98926_DAI_CLK_MODE2, + MAX98926_DAI_BSEL_MASK, + MAX98926_DAI_BSEL_32); + break; + case 48: + regmap_update_bits(max98926->regmap, + MAX98926_DAI_CLK_MODE2, + MAX98926_DAI_BSEL_MASK, + MAX98926_DAI_BSEL_48); + break; + case 64: + regmap_update_bits(max98926->regmap, + MAX98926_DAI_CLK_MODE2, + MAX98926_DAI_BSEL_MASK, + MAX98926_DAI_BSEL_64); + break; + default: + return -EINVAL; + } + + /* find the closest rate */ + for (i = 0; i < ARRAY_SIZE(rate_table); i++) { + if (rate_table[i].rate >= rate) { + dai_sr = rate_table[i].sr; + break; + } + } + if (dai_sr < 0) + return -EINVAL; + + /* set DAI_SR to correct LRCLK frequency */ + regmap_update_bits(max98926->regmap, + MAX98926_DAI_CLK_MODE2, + MAX98926_DAI_SR_MASK, dai_sr << MAX98926_DAI_SR_SHIFT); + return 0; +} + +#define MAX98926_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \ + SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) + +static struct snd_soc_dai_ops max98926_dai_ops = { + .set_fmt = max98926_dai_set_fmt, + .hw_params = max98926_dai_hw_params, +}; + +static struct snd_soc_dai_driver max98926_dai[] = { +{ + .name = "max98926-aif1", + .playback = { + .stream_name = "HiFi Playback", + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000_48000, + .formats = MAX98926_FORMATS, + }, + .capture = { + .stream_name = "HiFi Capture", + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000_48000, + .formats = MAX98926_FORMATS, + }, + .ops = &max98926_dai_ops, +} +}; + +static int max98926_probe(struct snd_soc_codec *codec) +{ + struct max98926_priv *max98926 = snd_soc_codec_get_drvdata(codec); + + max98926->codec = codec; + codec->control_data = max98926->regmap; + /* Hi-Z all the slots */ + regmap_write(max98926->regmap, MAX98926_DOUT_HIZ_CFG4, 0xF0); + return 0; +} + +static struct snd_soc_codec_driver soc_codec_dev_max98926 = { + .probe = max98926_probe, + .controls = max98926_snd_controls, + .num_controls = ARRAY_SIZE(max98926_snd_controls), + .dapm_routes = max98926_audio_map, + .num_dapm_routes = ARRAY_SIZE(max98926_audio_map), + .dapm_widgets = max98926_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(max98926_dapm_widgets), +}; + +static struct regmap_config max98926_regmap = { + .reg_bits = 8, + .val_bits = 8, + .max_register = MAX98926_VERSION, + .reg_defaults = max98926_reg, + .num_reg_defaults = ARRAY_SIZE(max98926_reg), + .volatile_reg = max98926_volatile_register, + .readable_reg = max98926_readable_register, + .cache_type = REGCACHE_RBTREE, +}; + +static int max98926_i2c_probe(struct i2c_client *i2c, + const struct i2c_device_id *id) +{ + int ret, reg; + u32 value; + struct max98926_priv *max98926; + + max98926 = devm_kzalloc(&i2c->dev, + sizeof(*max98926), GFP_KERNEL); + if (!max98926) + return -ENOMEM; + + i2c_set_clientdata(i2c, max98926); + max98926->regmap = devm_regmap_init_i2c(i2c, &max98926_regmap); + if (IS_ERR(max98926->regmap)) { + ret = PTR_ERR(max98926->regmap); + dev_err(&i2c->dev, + "Failed to allocate regmap: %d\n", ret); + goto err_out; + } + if (of_property_read_bool(i2c->dev.of_node, "interleave-mode")) + max98926->interleave_mode = true; + + if (!of_property_read_u32(i2c->dev.of_node, "vmon-slot-no", &value)) { + if (value > MAX98926_DAI_VMON_SLOT_1E_1F) { + dev_err(&i2c->dev, "vmon slot number is wrong:\n"); + return -EINVAL; + } + max98926->v_slot = value; + } + if (!of_property_read_u32(i2c->dev.of_node, "imon-slot-no", &value)) { + if (value > MAX98926_DAI_IMON_SLOT_1E_1F) { + dev_err(&i2c->dev, "imon slot number is wrong:\n"); + return -EINVAL; + } + max98926->i_slot = value; + } + ret = regmap_read(max98926->regmap, + MAX98926_VERSION, &reg); + if (ret < 0) { + dev_err(&i2c->dev, "Failed to read: %x\n", reg); + return ret; + } + + ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_max98926, + max98926_dai, ARRAY_SIZE(max98926_dai)); + if (ret < 0) + dev_err(&i2c->dev, + "Failed to register codec: %d\n", ret); + dev_info(&i2c->dev, "device version: %x\n", reg); +err_out: + return ret; +} + +static int max98926_i2c_remove(struct i2c_client *client) +{ + snd_soc_unregister_codec(&client->dev); + return 0; +} + +static const struct i2c_device_id max98926_i2c_id[] = { + { "max98926", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, max98926_i2c_id); + +static const struct of_device_id max98926_of_match[] = { + { .compatible = "maxim, max98926", }, + { } +}; +MODULE_DEVICE_TABLE(of, max98926_of_match); + +static struct i2c_driver max98926_i2c_driver = { + .driver = { + .name = "max98926", + .of_match_table = of_match_ptr(max98926_of_match), + .pm = NULL, + }, + .probe = max98926_i2c_probe, + .remove = max98926_i2c_remove, + .id_table = max98926_i2c_id, +}; + +module_i2c_driver(max98926_i2c_driver) +MODULE_DESCRIPTION("ALSA SoC MAX98926 driver"); +MODULE_AUTHOR("Anish kumar <anish.kumar(a)maximintegrated.com>"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/codecs/max98926.h b/sound/soc/codecs/max98926.h new file mode 100644 index 0000000..9d7ab6d --- /dev/null +++ b/sound/soc/codecs/max98926.h @@ -0,0 +1,848 @@ +/* + * max98926.h -- MAX98926 ALSA SoC Audio driver + * Copyright 2013-2015 Maxim Integrated Products + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef _MAX98926_H +#define _MAX98926_H + +#define MAX98926_CHIP_VERSION 0x40 +#define MAX98926_CHIP_VERSION1 0x50 + +#define MAX98926_VBAT_DATA 0x00 +#define MAX98926_VBST_DATA 0x01 +#define MAX98926_LIVE_STATUS0 0x02 +#define MAX98926_LIVE_STATUS1 0x03 +#define MAX98926_LIVE_STATUS2 0x04 +#define MAX98926_STATE0 0x05 +#define MAX98926_STATE1 0x06 +#define MAX98926_STATE2 0x07 +#define MAX98926_FLAG0 0x08 +#define MAX98926_FLAG1 0x09 +#define MAX98926_FLAG2 0x0A +#define MAX98926_IRQ_ENABLE0 0x0B +#define MAX98926_IRQ_ENABLE1 0x0C +#define MAX98926_IRQ_ENABLE2 0x0D +#define MAX98926_IRQ_CLEAR0 0x0E +#define MAX98926_IRQ_CLEAR1 0x0F +#define MAX98926_IRQ_CLEAR2 0x10 +#define MAX98926_MAP0 0x11 +#define MAX98926_MAP1 0x12 +#define MAX98926_MAP2 0x13 +#define MAX98926_MAP3 0x14 +#define MAX98926_MAP4 0x15 +#define MAX98926_MAP5 0x16 +#define MAX98926_MAP6 0x17 +#define MAX98926_MAP7 0x18 +#define MAX98926_MAP8 0x19 +#define MAX98926_DAI_CLK_MODE1 0x1A +#define MAX98926_DAI_CLK_MODE2 0x1B +#define MAX98926_DAI_CLK_DIV_M_MSBS 0x1C +#define MAX98926_DAI_CLK_DIV_M_LSBS 0x1D +#define MAX98926_DAI_CLK_DIV_N_MSBS 0x1E +#define MAX98926_DAI_CLK_DIV_N_LSBS 0x1F +#define MAX98926_FORMAT 0x20 +#define MAX98926_TDM_SLOT_SELECT 0x21 +#define MAX98926_DOUT_CFG_VMON 0x22 +#define MAX98926_DOUT_CFG_IMON 0x23 +#define MAX98926_DOUT_CFG_VBAT 0x24 +#define MAX98926_DOUT_CFG_VBST 0x25 +#define MAX98926_DOUT_CFG_FLAG 0x26 +#define MAX98926_DOUT_HIZ_CFG1 0x27 +#define MAX98926_DOUT_HIZ_CFG2 0x28 +#define MAX98926_DOUT_HIZ_CFG3 0x29 +#define MAX98926_DOUT_HIZ_CFG4 0x2A +#define MAX98926_DOUT_DRV_STRENGTH 0x2B +#define MAX98926_FILTERS 0x2C +#define MAX98926_GAIN 0x2D +#define MAX98926_GAIN_RAMPING 0x2E +#define MAX98926_SPK_AMP 0x2F +#define MAX98926_THRESHOLD 0x30 +#define MAX98926_ALC_ATTACK 0x31 +#define MAX98926_ALC_ATTEN_RLS 0x32 +#define MAX98926_ALC_HOLD_RLS 0x33 +#define MAX98926_ALC_CONFIGURATION 0x34 +#define MAX98926_BOOST_CONVERTER 0x35 +#define MAX98926_BLOCK_ENABLE 0x36 +#define MAX98926_CONFIGURATION 0x37 +#define MAX98926_GLOBAL_ENABLE 0x38 +#define MAX98926_BOOST_LIMITER 0x3A +#define MAX98926_VERSION 0xFF + +#define MAX98926_REG_CNT (MAX98926_R03A_BOOST_LIMITER+1) + +#define MAX98926_PDM_CURRENT_MASK (1<<7) +#define MAX98926_PDM_CURRENT_SHIFT 7 +#define MAX98926_PDM_VOLTAGE_MASK (1<<3) +#define MAX98926_PDM_VOLTAGE_SHIFT 3 +#define MAX98926_PDM_CHANNEL_0_MASK (1<<2) +#define MAX98926_PDM_CHANNEL_0_SHIFT 2 +#define MAX98926_PDM_CHANNEL_1_MASK (1<<6) +#define MAX98926_PDM_CHANNEL_1_SHIFT 6 +#define MAX98926_PDM_CHANNEL_1_HIZ 5 +#define MAX98926_PDM_CHANNEL_0_HIZ 1 +#define MAX98926_PDM_SOURCE_0_SHIFT 0 +#define MAX98926_PDM_SOURCE_0_MASK (1<<0) +#define MAX98926_PDM_SOURCE_1_MASK (1<<4) +#define MAX98926_PDM_SOURCE_1_SHIFT 4 + +/* MAX98926 Register Bit Fields */ + +/* MAX98926_R002_LIVE_STATUS0 */ +#define MAX98926_THERMWARN_STATUS_MASK (1<<3) +#define MAX98926_THERMWARN_STATUS_SHIFT 3 +#define MAX98926_THERMWARN_STATUS_WIDTH 1 +#define MAX98926_THERMSHDN_STATUS_MASK (1<<1) +#define MAX98926_THERMSHDN_STATUS_SHIFT 1 +#define MAX98926_THERMSHDN_STATUS_WIDTH 1 + +/* MAX98926_R003_LIVE_STATUS1 */ +#define MAX98926_SPKCURNT_STATUS_MASK (1<<5) +#define MAX98926_SPKCURNT_STATUS_SHIFT 5 +#define MAX98926_SPKCURNT_STATUS_WIDTH 1 +#define MAX98926_WATCHFAIL_STATUS_MASK (1<<4) +#define MAX98926_WATCHFAIL_STATUS_SHIFT 4 +#define MAX98926_WATCHFAIL_STATUS_WIDTH 1 +#define MAX98926_ALCINFH_STATUS_MASK (1<<3) +#define MAX98926_ALCINFH_STATUS_SHIFT 3 +#define MAX98926_ALCINFH_STATUS_WIDTH 1 +#define MAX98926_ALCACT_STATUS_MASK (1<<2) +#define MAX98926_ALCACT_STATUS_SHIFT 2 +#define MAX98926_ALCACT_STATUS_WIDTH 1 +#define MAX98926_ALCMUT_STATUS_MASK (1<<1) +#define MAX98926_ALCMUT_STATUS_SHIFT 1 +#define MAX98926_ALCMUT_STATUS_WIDTH 1 +#define MAX98926_ACLP_STATUS_MASK (1<<0) +#define MAX98926_ACLP_STATUS_SHIFT 0 +#define MAX98926_ACLP_STATUS_WIDTH 1 + +/* MAX98926_R004_LIVE_STATUS2 */ +#define MAX98926_SLOTOVRN_STATUS_MASK (1<<6) +#define MAX98926_SLOTOVRN_STATUS_SHIFT 6 +#define MAX98926_SLOTOVRN_STATUS_WIDTH 1 +#define MAX98926_INVALSLOT_STATUS_MASK (1<<5) +#define MAX98926_INVALSLOT_STATUS_SHIFT 5 +#define MAX98926_INVALSLOT_STATUS_WIDTH 1 +#define MAX98926_SLOTCNFLT_STATUS_MASK (1<<4) +#define MAX98926_SLOTCNFLT_STATUS_SHIFT 4 +#define MAX98926_SLOTCNFLT_STATUS_WIDTH 1 +#define MAX98926_VBSTOVFL_STATUS_MASK (1<<3) +#define MAX98926_VBSTOVFL_STATUS_SHIFT 3 +#define MAX98926_VBSTOVFL_STATUS_WIDTH 1 +#define MAX98926_VBATOVFL_STATUS_MASK (1<<2) +#define MAX98926_VBATOVFL_STATUS_SHIFT 2 +#define MAX98926_VBATOVFL_STATUS_WIDTH 1 +#define MAX98926_IMONOVFL_STATUS_MASK (1<<1) +#define MAX98926_IMONOVFL_STATUS_SHIFT 1 +#define MAX98926_IMONOVFL_STATUS_WIDTH 1 +#define MAX98926_VMONOVFL_STATUS_MASK (1<<0) +#define MAX98926_VMONOVFL_STATUS_SHIFT 0 +#define MAX98926_VMONOVFL_STATUS_WIDTH 1 + +/* MAX98926_R005_STATE0 */ +#define MAX98926_THERMWARN_END_STATE_MASK (1<<3) +#define MAX98926_THERMWARN_END_STATE_SHIFT 3 +#define MAX98926_THERMWARN_END_STATE_WIDTH 1 +#define MAX98926_THERMWARN_BGN_STATE_MASK (1<<2) +#define MAX98926_THERMWARN_BGN_STATE_SHIFT 1 +#define MAX98926_THERMWARN_BGN_STATE_WIDTH 1 +#define MAX98926_THERMSHDN_END_STATE_MASK (1<<1) +#define MAX98926_THERMSHDN_END_STATE_SHIFT 1 +#define MAX98926_THERMSHDN_END_STATE_WIDTH 1 +#define MAX98926_THERMSHDN_BGN_STATE_MASK (1<<0) +#define MAX98926_THERMSHDN_BGN_STATE_SHIFT 0 +#define MAX98926_THERMSHDN_BGN_STATE_WIDTH 1 + +/* MAX98926_R006_STATE1 */ +#define MAX98926_SPRCURNT_STATE_MASK (1<<5) +#define MAX98926_SPRCURNT_STATE_SHIFT 5 +#define MAX98926_SPRCURNT_STATE_WIDTH 1 +#define MAX98926_WATCHFAIL_STATE_MASK (1<<4) +#define MAX98926_WATCHFAIL_STATE_SHIFT 4 +#define MAX98926_WATCHFAIL_STATE_WIDTH 1 +#define MAX98926_ALCINFH_STATE_MASK (1<<3) +#define MAX98926_ALCINFH_STATE_SHIFT 3 +#define MAX98926_ALCINFH_STATE_WIDTH 1 +#define MAX98926_ALCACT_STATE_MASK (1<<2) +#define MAX98926_ALCACT_STATE_SHIFT 2 +#define MAX98926_ALCACT_STATE_WIDTH 1 +#define MAX98926_ALCMUT_STATE_MASK (1<<1) +#define MAX98926_ALCMUT_STATE_SHIFT 1 +#define MAX98926_ALCMUT_STATE_WIDTH 1 +#define MAX98926_ALCP_STATE_MASK (1<<0) +#define MAX98926_ALCP_STATE_SHIFT 0 +#define MAX98926_ALCP_STATE_WIDTH 1 + +/* MAX98926_R007_STATE2 */ +#define MAX98926_SLOTOVRN_STATE_MASK (1<<6) +#define MAX98926_SLOTOVRN_STATE_SHIFT 6 +#define MAX98926_SLOTOVRN_STATE_WIDTH 1 +#define MAX98926_INVALSLOT_STATE_MASK (1<<5) +#define MAX98926_INVALSLOT_STATE_SHIFT 5 +#define MAX98926_INVALSLOT_STATE_WIDTH 1 +#define MAX98926_SLOTCNFLT_STATE_MASK (1<<4) +#define MAX98926_SLOTCNFLT_STATE_SHIFT 4 +#define MAX98926_SLOTCNFLT_STATE_WIDTH 1 +#define MAX98926_VBSTOVFL_STATE_MASK (1<<3) +#define MAX98926_VBSTOVFL_STATE_SHIFT 3 +#define MAX98926_VBSTOVFL_STATE_WIDTH 1 +#define MAX98926_VBATOVFL_STATE_MASK (1<<2) +#define MAX98926_VBATOVFL_STATE_SHIFT 2 +#define MAX98926_VBATOVFL_STATE_WIDTH 1 +#define MAX98926_IMONOVFL_STATE_MASK (1<<1) +#define MAX98926_IMONOVFL_STATE_SHIFT 1 +#define MAX98926_IMONOVFL_STATE_WIDTH 1 +#define MAX98926_VMONOVFL_STATE_MASK (1<<0) +#define MAX98926_VMONOVFL_STATE_SHIFT 0 +#define MAX98926_VMONOVFL_STATE_WIDTH 1 + +/* MAX98926_R008_FLAG0 */ +#define MAX98926_THERMWARN_END_FLAG_MASK (1<<3) +#define MAX98926_THERMWARN_END_FLAG_SHIFT 3 +#define MAX98926_THERMWARN_END_FLAG_WIDTH 1 +#define MAX98926_THERMWARN_BGN_FLAG_MASK (1<<2) +#define MAX98926_THERMWARN_BGN_FLAG_SHIFT 2 +#define MAX98926_THERMWARN_BGN_FLAG_WIDTH 1 +#define MAX98926_THERMSHDN_END_FLAG_MASK (1<<1) +#define MAX98926_THERMSHDN_END_FLAG_SHIFT 1 +#define MAX98926_THERMSHDN_END_FLAG_WIDTH 1 +#define MAX98926_THERMSHDN_BGN_FLAG_MASK (1<<0) +#define MAX98926_THERMSHDN_BGN_FLAG_SHIFT 0 +#define MAX98926_THERMSHDN_BGN_FLAG_WIDTH 1 + +/* MAX98926_R009_FLAG1 */ +#define MAX98926_SPKCURNT_FLAG_MASK (1<<5) +#define MAX98926_SPKCURNT_FLAG_SHIFT 5 +#define MAX98926_SPKCURNT_FLAG_WIDTH 1 +#define MAX98926_WATCHFAIL_FLAG_MASK (1<<4) +#define MAX98926_WATCHFAIL_FLAG_SHIFT 4 +#define MAX98926_WATCHFAIL_FLAG_WIDTH 1 +#define MAX98926_ALCINFH_FLAG_MASK (1<<3) +#define MAX98926_ALCINFH_FLAG_SHIFT 3 +#define MAX98926_ALCINFH_FLAG_WIDTH 1 +#define MAX98926_ALCACT_FLAG_MASK (1<<2) +#define MAX98926_ALCACT_FLAG_SHIFT 2 +#define MAX98926_ALCACT_FLAG_WIDTH 1 +#define MAX98926_ALCMUT_FLAG_MASK (1<<1) +#define MAX98926_ALCMUT_FLAG_SHIFT 1 +#define MAX98926_ALCMUT_FLAG_WIDTH 1 +#define MAX98926_ALCP_FLAG_MASK (1<<0) +#define MAX98926_ALCP_FLAG_SHIFT 0 +#define MAX98926_ALCP_FLAG_WIDTH 1 + +/* MAX98926_R00A_FLAG2 */ +#define MAX98926_SLOTOVRN_FLAG_MASK (1<<6) +#define MAX98926_SLOTOVRN_FLAG_SHIFT 6 +#define MAX98926_SLOTOVRN_FLAG_WIDTH 1 +#define MAX98926_INVALSLOT_FLAG_MASK (1<<5) +#define MAX98926_INVALSLOT_FLAG_SHIFT 5 +#define MAX98926_INVALSLOT_FLAG_WIDTH 1 +#define MAX98926_SLOTCNFLT_FLAG_MASK (1<<4) +#define MAX98926_SLOTCNFLT_FLAG_SHIFT 4 +#define MAX98926_SLOTCNFLT_FLAG_WIDTH 1 +#define MAX98926_VBSTOVFL_FLAG_MASK (1<<3) +#define MAX98926_VBSTOVFL_FLAG_SHIFT 3 +#define MAX98926_VBSTOVFL_FLAG_WIDTH 1 +#define MAX98926_VBATOVFL_FLAG_MASK (1<<2) +#define MAX98926_VBATOVFL_FLAG_SHIFT 2 +#define MAX98926_VBATOVFL_FLAG_WIDTH 1 +#define MAX98926_IMONOVFL_FLAG_MASK (1<<1) +#define MAX98926_IMONOVFL_FLAG_SHIFT 1 +#define MAX98926_IMONOVFL_FLAG_WIDTH 1 +#define MAX98926_VMONOVFL_FLAG_MASK (1<<0) +#define MAX98926_VMONOVFL_FLAG_SHIFT 0 +#define MAX98926_VMONOVFL_FLAG_WIDTH 1 + +/* MAX98926_R00B_IRQ_ENABLE0 */ +#define MAX98926_THERMWARN_END_EN_MASK (1<<3) +#define MAX98926_THERMWARN_END_EN_SHIFT 3 +#define MAX98926_THERMWARN_END_EN_WIDTH 1 +#define MAX98926_THERMWARN_BGN_EN_MASK (1<<2) +#define MAX98926_THERMWARN_BGN_EN_SHIFT 2 +#define MAX98926_THERMWARN_BGN_EN_WIDTH 1 +#define MAX98926_THERMSHDN_END_EN_MASK (1<<1) +#define MAX98926_THERMSHDN_END_EN_SHIFT 1 +#define MAX98926_THERMSHDN_END_EN_WIDTH 1 +#define MAX98926_THERMSHDN_BGN_EN_MASK (1<<0) +#define MAX98926_THERMSHDN_BGN_EN_SHIFT 0 +#define MAX98926_THERMSHDN_BGN_EN_WIDTH 1 + +/* MAX98926_R00C_IRQ_ENABLE1 */ +#define MAX98926_SPKCURNT_EN_MASK (1<<5) +#define MAX98926_SPKCURNT_EN_SHIFT 5 +#define MAX98926_SPKCURNT_EN_WIDTH 1 +#define MAX98926_WATCHFAIL_EN_MASK (1<<4) +#define MAX98926_WATCHFAIL_EN_SHIFT 4 +#define MAX98926_WATCHFAIL_EN_WIDTH 1 +#define MAX98926_ALCINFH_EN_MASK (1<<3) +#define MAX98926_ALCINFH_EN_SHIFT 3 +#define MAX98926_ALCINFH_EN_WIDTH 1 +#define MAX98926_ALCACT_EN_MASK (1<<2) +#define MAX98926_ALCACT_EN_SHIFT 2 +#define MAX98926_ALCACT_EN_WIDTH 1 +#define MAX98926_ALCMUT_EN_MASK (1<<1) +#define MAX98926_ALCMUT_EN_SHIFT 1 +#define MAX98926_ALCMUT_EN_WIDTH 1 +#define MAX98926_ALCP_EN_MASK (1<<0) +#define MAX98926_ALCP_EN_SHIFT 0 +#define MAX98926_ALCP_EN_WIDTH 1 + +/* MAX98926_R00D_IRQ_ENABLE2 */ +#define MAX98926_SLOTOVRN_EN_MASK (1<<6) +#define MAX98926_SLOTOVRN_EN_SHIFT 6 +#define MAX98926_SLOTOVRN_EN_WIDTH 1 +#define MAX98926_INVALSLOT_EN_MASK (1<<5) +#define MAX98926_INVALSLOT_EN_SHIFT 5 +#define MAX98926_INVALSLOT_EN_WIDTH 1 +#define MAX98926_SLOTCNFLT_EN_MASK (1<<4) +#define MAX98926_SLOTCNFLT_EN_SHIFT 4 +#define MAX98926_SLOTCNFLT_EN_WIDTH 1 +#define MAX98926_VBSTOVFL_EN_MASK (1<<3) +#define MAX98926_VBSTOVFL_EN_SHIFT 3 +#define MAX98926_VBSTOVFL_EN_WIDTH 1 +#define MAX98926_VBATOVFL_EN_MASK (1<<2) +#define MAX98926_VBATOVFL_EN_SHIFT 2 +#define MAX98926_VBATOVFL_EN_WIDTH 1 +#define MAX98926_IMONOVFL_EN_MASK (1<<1) +#define MAX98926_IMONOVFL_EN_SHIFT 1 +#define MAX98926_IMONOVFL_EN_WIDTH 1 +#define MAX98926_VMONOVFL_EN_MASK (1<<0) +#define MAX98926_VMONOVFL_EN_SHIFT 0 +#define MAX98926_VMONOVFL_EN_WIDTH 1 + +/* MAX98926_R00E_IRQ_CLEAR0 */ +#define MAX98926_THERMWARN_END_CLR_MASK (1<<3) +#define MAX98926_THERMWARN_END_CLR_SHIFT 3 +#define MAX98926_THERMWARN_END_CLR_WIDTH 1 +#define MAX98926_THERMWARN_BGN_CLR_MASK (1<<2) +#define MAX98926_THERMWARN_BGN_CLR_SHIFT 2 +#define MAX98926_THERMWARN_BGN_CLR_WIDTH 1 +#define MAX98926_THERMSHDN_END_CLR_MASK (1<<1) +#define MAX98926_THERMSHDN_END_CLR_SHIFT 1 +#define MAX98926_THERMSHDN_END_CLR_WIDTH 1 +#define MAX98926_THERMSHDN_BGN_CLR_MASK (1<<0) +#define MAX98926_THERMSHDN_BGN_CLR_SHIFT 0 +#define MAX98926_THERMSHDN_BGN_CLR_WIDTH 1 + +/* MAX98926_R00F_IRQ_CLEAR1 */ +#define MAX98926_SPKCURNT_CLR_MASK (1<<5) +#define MAX98926_SPKCURNT_CLR_SHIFT 5 +#define MAX98926_SPKCURNT_CLR_WIDTH 1 +#define MAX98926_WATCHFAIL_CLR_MASK (1<<4) +#define MAX98926_WATCHFAIL_CLR_SHIFT 4 +#define MAX98926_WATCHFAIL_CLR_WIDTH 1 +#define MAX98926_ALCINFH_CLR_MASK (1<<3) +#define MAX98926_ALCINFH_CLR_SHIFT 3 +#define MAX98926_ALCINFH_CLR_WIDTH 1 +#define MAX98926_ALCACT_CLR_MASK (1<<2) +#define MAX98926_ALCACT_CLR_SHIFT 2 +#define MAX98926_ALCACT_CLR_WIDTH 1 +#define MAX98926_ALCMUT_CLR_MASK (1<<1) +#define MAX98926_ALCMUT_CLR_SHIFT 1 +#define MAX98926_ALCMUT_CLR_WIDTH 1 +#define MAX98926_ALCP_CLR_MASK (1<<0) +#define MAX98926_ALCP_CLR_SHIFT 0 +#define MAX98926_ALCP_CLR_WIDTH 1 + +/* MAX98926_R010_IRQ_CLEAR2 */ +#define MAX98926_SLOTOVRN_CLR_MASK (1<<6) +#define MAX98926_SLOTOVRN_CLR_SHIFT 6 +#define MAX98926_SLOTOVRN_CLR_WIDTH 1 +#define MAX98926_INVALSLOT_CLR_MASK (1<<5) +#define MAX98926_INVALSLOT_CLR_SHIFT 5 +#define MAX98926_INVALSLOT_CLR_WIDTH 1 +#define MAX98926_SLOTCNFLT_CLR_MASK (1<<4) +#define MAX98926_SLOTCNFLT_CLR_SHIFT 4 +#define MAX98926_SLOTCNFLT_CLR_WIDTH 1 +#define MAX98926_VBSTOVFL_CLR_MASK (1<<3) +#define MAX98926_VBSTOVFL_CLR_SHIFT 3 +#define MAX98926_VBSTOVFL_CLR_WIDTH 1 +#define MAX98926_VBATOVFL_CLR_MASK (1<<2) +#define MAX98926_VBATOVFL_CLR_SHIFT 2 +#define MAX98926_VBATOVFL_CLR_WIDTH 1 +#define MAX98926_IMONOVFL_CLR_MASK (1<<1) +#define MAX98926_IMONOVFL_CLR_SHIFT 1 +#define MAX98926_IMONOVFL_CLR_WIDTH 1 +#define MAX98926_VMONOVFL_CLR_MASK (1<<0) +#define MAX98926_VMONOVFL_CLR_SHIFT 0 +#define MAX98926_VMONOVFL_CLR_WIDTH 1 + +/* MAX98926_R011_MAP0 */ +#define MAX98926_ER_THERMWARN_EN_MASK (1<<7) +#define MAX98926_ER_THERMWARN_EN_SHIFT 7 +#define MAX98926_ER_THERMWARN_EN_WIDTH 1 +#define MAX98926_ER_THERMWARN_MAP_MASK (0x07<<4) +#define MAX98926_ER_THERMWARN_MAP_SHIFT 4 +#define MAX98926_ER_THERMWARN_MAP_WIDTH 3 + +/* MAX98926_R012_MAP1 */ +#define MAX98926_ER_ALCMUT_EN_MASK (1<<7) +#define MAX98926_ER_ALCMUT_EN_SHIFT 7 +#define MAX98926_ER_ALCMUT_EN_WIDTH 1 +#define MAX98926_ER_ALCMUT_MAP_MASK (0x07<<4) +#define MAX98926_ER_ALCMUT_MAP_SHIFT 4 +#define MAX98926_ER_ALCMUT_MAP_WIDTH 3 +#define MAX98926_ER_ALCP_EN_MASK (1<<3) +#define MAX98926_ER_ALCP_EN_SHIFT 3 +#define MAX98926_ER_ALCP_EN_WIDTH 1 +#define MAX98926_ER_ALCP_MAP_MASK (0x07<<0) +#define MAX98926_ER_ALCP_MAP_SHIFT 0 +#define MAX98926_ER_ALCP_MAP_WIDTH 3 + +/* MAX98926_R013_MAP2 */ +#define MAX98926_ER_ALCINFH_EN_MASK (1<<7) +#define MAX98926_ER_ALCINFH_EN_SHIFT 7 +#define MAX98926_ER_ALCINFH_EN_WIDTH 1 +#define MAX98926_ER_ALCINFH_MAP_MASK (0x07<<4) +#define MAX98926_ER_ALCINFH_MAP_SHIFT 4 +#define MAX98926_ER_ALCINFH_MAP_WIDTH 3 +#define MAX98926_ER_ALCACT_EN_MASK (1<<3) +#define MAX98926_ER_ALCACT_EN_SHIFT 3 +#define MAX98926_ER_ALCACT_EN_WIDTH 1 +#define MAX98926_ER_ALCACT_MAP_MASK (0x07<<0) +#define MAX98926_ER_ALCACT_MAP_SHIFT 0 +#define MAX98926_ER_ALCACT_MAP_WIDTH 3 + +/* MAX98926_R014_MAP3 */ +#define MAX98926_ER_SPKCURNT_EN_MASK (1<<7) +#define MAX98926_ER_SPKCURNT_EN_SHIFT 7 +#define MAX98926_ER_SPKCURNT_EN_WIDTH 1 +#define MAX98926_ER_SPKCURNT_MAP_MASK (0x07<<4) +#define MAX98926_ER_SPKCURNT_MAP_SHIFT 4 +#define MAX98926_ER_SPKCURNT_MAP_WIDTH 3 + +/* MAX98926_R015_MAP4 */ +/* RESERVED */ + +/* MAX98926_R016_MAP5 */ +#define MAX98926_ER_IMONOVFL_EN_MASK (1<<7) +#define MAX98926_ER_IMONOVFL_EN_SHIFT 7 +#define MAX98926_ER_IMONOVFL_EN_WIDTH 1 +#define MAX98926_ER_IMONOVFL_MAP_MASK (0x07<<4) +#define MAX98926_ER_IMONOVFL_MAP_SHIFT 4 +#define MAX98926_ER_IMONOVFL_MAP_WIDTH 3 +#define MAX98926_ER_VMONOVFL_EN_MASK (1<<3) +#define MAX98926_ER_VMONOVFL_EN_SHIFT 3 +#define MAX98926_ER_VMONOVFL_EN_WIDTH 1 +#define MAX98926_ER_VMONOVFL_MAP_MASK (0x07<<0) +#define MAX98926_ER_VMONOVFL_MAP_SHIFT 0 +#define MAX98926_ER_VMONOVFL_MAP_WIDTH 3 + +/* MAX98926_R017_MAP6 */ +#define MAX98926_ER_VBSTOVFL_EN_MASK (1<<7) +#define MAX98926_ER_VBSTOVFL_EN_SHIFT 7 +#define MAX98926_ER_VBSTOVFL_EN_WIDTH 1 +#define MAX98926_ER_VBSTOVFL_MAP_MASK (0x07<<4) +#define MAX98926_ER_VBSTOVFL_MAP_SHIFT 4 +#define MAX98926_ER_VBSTOVFL_MAP_WIDTH 3 +#define MAX98926_ER_VBATOVFL_EN_MASK (1<<3) +#define MAX98926_ER_VBATOVFL_EN_SHIFT 3 +#define MAX98926_ER_VBATOVFL_EN_WIDTH 1 +#define MAX98926_ER_VBATOVFL_MAP_MASK (0x07<<0) +#define MAX98926_ER_VBATOVFL_MAP_SHIFT 0 +#define MAX98926_ER_VBATOVFL_MAP_WIDTH 3 + +/* MAX98926_R018_MAP7 */ +#define MAX98926_ER_INVALSLOT_EN_MASK (1<<7) +#define MAX98926_ER_INVALSLOT_EN_SHIFT 7 +#define MAX98926_ER_INVALSLOT_EN_WIDTH 1 +#define MAX98926_ER_INVALSLOT_MAP_MASK (0x07<<4) +#define MAX98926_ER_INVALSLOT_MAP_SHIFT 4 +#define MAX98926_ER_INVALSLOT_MAP_WIDTH 3 +#define MAX98926_ER_SLOTCNFLT_EN_MASK (1<<3) +#define MAX98926_ER_SLOTCNFLT_EN_SHIFT 3 +#define MAX98926_ER_SLOTCNFLT_EN_WIDTH 1 +#define MAX98926_ER_SLOTCNFLT_MAP_MASK (0x07<<0) +#define MAX98926_ER_SLOTCNFLT_MAP_SHIFT 0 +#define MAX98926_ER_SLOTCNFLT_MAP_WIDTH 3 + +/* MAX98926_R019_MAP8 */ +#define MAX98926_ER_SLOTOVRN_EN_MASK (1<<3) +#define MAX98926_ER_SLOTOVRN_EN_SHIFT 3 +#define MAX98926_ER_SLOTOVRN_EN_WIDTH 1 +#define MAX98926_ER_SLOTOVRN_MAP_MASK (0x07<<0) +#define MAX98926_ER_SLOTOVRN_MAP_SHIFT 0 +#define MAX98926_ER_SLOTOVRN_MAP_WIDTH 3 + +/* MAX98926_R01A_DAI_CLK_MODE1 */ +#define MAX98926_DAI_CLK_SOURCE_MASK (1<<6) +#define MAX98926_DAI_CLK_SOURCE_SHIFT 6 +#define MAX98926_DAI_CLK_SOURCE_WIDTH 1 +#define MAX98926_MDLL_MULT_MASK (0x0F<<0) +#define MAX98926_MDLL_MULT_SHIFT 0 +#define MAX98926_MDLL_MULT_WIDTH 4 + +#define MAX98926_MDLL_MULT_MCLKx8 6 +#define MAX98926_MDLL_MULT_MCLKx16 8 + +/* MAX98926_R01B_DAI_CLK_MODE2 */ +#define MAX98926_DAI_SR_MASK (0x0F<<4) +#define MAX98926_DAI_SR_SHIFT 4 +#define MAX98926_DAI_SR_WIDTH 4 +#define MAX98926_DAI_MAS_MASK (1<<3) +#define MAX98926_DAI_MAS_SHIFT 3 +#define MAX98926_DAI_MAS_WIDTH 1 +#define MAX98926_DAI_BSEL_MASK (0x07<<0) +#define MAX98926_DAI_BSEL_SHIFT 0 +#define MAX98926_DAI_BSEL_WIDTH 3 + +#define MAX98926_DAI_BSEL_32 (0 << MAX98926_DAI_BSEL_SHIFT) +#define MAX98926_DAI_BSEL_48 (1 << MAX98926_DAI_BSEL_SHIFT) +#define MAX98926_DAI_BSEL_64 (2 << MAX98926_DAI_BSEL_SHIFT) +#define MAX98926_DAI_BSEL_256 (6 << MAX98926_DAI_BSEL_SHIFT) + +/* MAX98926_R01C_DAI_CLK_DIV_M_MSBS */ +#define MAX98926_DAI_M_MSBS_MASK (0xFF<<0) +#define MAX98926_DAI_M_MSBS_SHIFT 0 +#define MAX98926_DAI_M_MSBS_WIDTH 8 + +/* MAX98926_R01D_DAI_CLK_DIV_M_LSBS */ +#define MAX98926_DAI_M_LSBS_MASK (0xFF<<0) +#define MAX98926_DAI_M_LSBS_SHIFT 0 +#define MAX98926_DAI_M_LSBS_WIDTH 8 + +/* MAX98926_R01E_DAI_CLK_DIV_N_MSBS */ +#define MAX98926_DAI_N_MSBS_MASK (0x7F<<0) +#define MAX98926_DAI_N_MSBS_SHIFT 0 +#define MAX98926_DAI_N_MSBS_WIDTH 7 + +/* MAX98926_R01F_DAI_CLK_DIV_N_LSBS */ +#define MAX98926_DAI_N_LSBS_MASK (0xFF<<0) +#define MAX98926_DAI_N_LSBS_SHIFT 0 +#define MAX98926_DAI_N_LSBS_WIDTH 8 + +/* MAX98926_R020_FORMAT */ +#define MAX98926_DAI_CHANSZ_MASK (0x03<<6) +#define MAX98926_DAI_CHANSZ_SHIFT 6 +#define MAX98926_DAI_CHANSZ_WIDTH 2 +#define MAX98926_DAI_INTERLEAVE_MASK (1<<5) +#define MAX98926_DAI_INTERLEAVE_SHIFT 5 +#define MAX98926_DAI_INTERLEAVE_WIDTH 1 +#define MAX98926_DAI_EXTBCLK_HIZ_MASK (1<<4) +#define MAX98926_DAI_EXTBCLK_HIZ_SHIFT 4 +#define MAX98926_DAI_EXTBCLK_HIZ_WIDTH 1 +#define MAX98926_DAI_WCI_MASK (1<<3) +#define MAX98926_DAI_WCI_SHIFT 3 +#define MAX98926_DAI_WCI_WIDTH 1 +#define MAX98926_DAI_BCI_MASK (1<<2) +#define MAX98926_DAI_BCI_SHIFT 2 +#define MAX98926_DAI_BCI_WIDTH 1 +#define MAX98926_DAI_DLY_MASK (1<<1) +#define MAX98926_DAI_DLY_SHIFT 1 +#define MAX98926_DAI_DLY_WIDTH 1 +#define MAX98926_DAI_TDM_MASK (1<<0) +#define MAX98926_DAI_TDM_SHIFT 0 +#define MAX98926_DAI_TDM_WIDTH 1 + +#define MAX98926_DAI_CHANSZ_16 (1 << MAX98926_DAI_CHANSZ_SHIFT) +#define MAX98926_DAI_CHANSZ_24 (2 << MAX98926_DAI_CHANSZ_SHIFT) +#define MAX98926_DAI_CHANSZ_32 (3 << MAX98926_DAI_CHANSZ_SHIFT) + +/* MAX98926_R021_TDM_SLOT_SELECT */ +#define MAX98926_DAI_DO_EN_MASK (1<<7) +#define MAX98926_DAI_DO_EN_SHIFT 7 +#define MAX98926_DAI_DO_EN_WIDTH 1 +#define MAX98926_DAI_DIN_EN_MASK (1<<6) +#define MAX98926_DAI_DIN_EN_SHIFT 6 +#define MAX98926_DAI_DIN_EN_WIDTH 1 +#define MAX98926_DAI_INR_SOURCE_MASK (0x07<<3) +#define MAX98926_DAI_INR_SOURCE_SHIFT 3 +#define MAX98926_DAI_INR_SOURCE_WIDTH 3 +#define MAX98926_DAI_INL_SOURCE_MASK (0x07<<0) +#define MAX98926_DAI_INL_SOURCE_SHIFT 0 +#define MAX98926_DAI_INL_SOURCE_WIDTH 3 + +/* MAX98926_R022_DOUT_CFG_VMON */ +#define MAX98926_DAI_VMON_EN_MASK (1<<5) +#define MAX98926_DAI_VMON_EN_SHIFT 5 +#define MAX98926_DAI_VMON_EN_WIDTH 1 +#define MAX98926_DAI_VMON_SLOT_MASK (0x1F<<0) +#define MAX98926_DAI_VMON_SLOT_SHIFT 0 +#define MAX98926_DAI_VMON_SLOT_WIDTH 5 + +#define MAX98926_DAI_VMON_SLOT_00_01 (0 << MAX98926_DAI_VMON_SLOT_SHIFT) +#define MAX98926_DAI_VMON_SLOT_01_02 (1 << MAX98926_DAI_VMON_SLOT_SHIFT) +#define MAX98926_DAI_VMON_SLOT_02_03 (2 << MAX98926_DAI_VMON_SLOT_SHIFT) +#define MAX98926_DAI_VMON_SLOT_03_04 (3 << MAX98926_DAI_VMON_SLOT_SHIFT) +#define MAX98926_DAI_VMON_SLOT_04_05 (4 << MAX98926_DAI_VMON_SLOT_SHIFT) +#define MAX98926_DAI_VMON_SLOT_05_06 (5 << MAX98926_DAI_VMON_SLOT_SHIFT) +#define MAX98926_DAI_VMON_SLOT_06_07 (6 << MAX98926_DAI_VMON_SLOT_SHIFT) +#define MAX98926_DAI_VMON_SLOT_07_08 (7 << MAX98926_DAI_VMON_SLOT_SHIFT) +#define MAX98926_DAI_VMON_SLOT_08_09 (8 << MAX98926_DAI_VMON_SLOT_SHIFT) +#define MAX98926_DAI_VMON_SLOT_09_0A (9 << MAX98926_DAI_VMON_SLOT_SHIFT) +#define MAX98926_DAI_VMON_SLOT_0A_0B (10 << MAX98926_DAI_VMON_SLOT_SHIFT) +#define MAX98926_DAI_VMON_SLOT_0B_0C (11 << MAX98926_DAI_VMON_SLOT_SHIFT) +#define MAX98926_DAI_VMON_SLOT_0C_0D (12 << MAX98926_DAI_VMON_SLOT_SHIFT) +#define MAX98926_DAI_VMON_SLOT_0D_0E (13 << MAX98926_DAI_VMON_SLOT_SHIFT) +#define MAX98926_DAI_VMON_SLOT_0E_0F (14 << MAX98926_DAI_VMON_SLOT_SHIFT) +#define MAX98926_DAI_VMON_SLOT_0F_10 (15 << MAX98926_DAI_VMON_SLOT_SHIFT) +#define MAX98926_DAI_VMON_SLOT_10_11 (16 << MAX98926_DAI_VMON_SLOT_SHIFT) +#define MAX98926_DAI_VMON_SLOT_11_12 (17 << MAX98926_DAI_VMON_SLOT_SHIFT) +#define MAX98926_DAI_VMON_SLOT_12_13 (18 << MAX98926_DAI_VMON_SLOT_SHIFT) +#define MAX98926_DAI_VMON_SLOT_13_14 (19 << MAX98926_DAI_VMON_SLOT_SHIFT) +#define MAX98926_DAI_VMON_SLOT_14_15 (20 << MAX98926_DAI_VMON_SLOT_SHIFT) +#define MAX98926_DAI_VMON_SLOT_15_16 (21 << MAX98926_DAI_VMON_SLOT_SHIFT) +#define MAX98926_DAI_VMON_SLOT_16_17 (22 << MAX98926_DAI_VMON_SLOT_SHIFT) +#define MAX98926_DAI_VMON_SLOT_17_18 (23 << MAX98926_DAI_VMON_SLOT_SHIFT) +#define MAX98926_DAI_VMON_SLOT_18_19 (24 << MAX98926_DAI_VMON_SLOT_SHIFT) +#define MAX98926_DAI_VMON_SLOT_19_1A (25 << MAX98926_DAI_VMON_SLOT_SHIFT) +#define MAX98926_DAI_VMON_SLOT_1A_1B (26 << MAX98926_DAI_VMON_SLOT_SHIFT) +#define MAX98926_DAI_VMON_SLOT_1B_1C (27 << MAX98926_DAI_VMON_SLOT_SHIFT) +#define MAX98926_DAI_VMON_SLOT_1C_1D (28 << MAX98926_DAI_VMON_SLOT_SHIFT) +#define MAX98926_DAI_VMON_SLOT_1D_1E (29 << MAX98926_DAI_VMON_SLOT_SHIFT) +#define MAX98926_DAI_VMON_SLOT_1E_1F (30 << MAX98926_DAI_VMON_SLOT_SHIFT) + +/* MAX98926_R023_DOUT_CFG_IMON */ +#define MAX98926_DAI_IMON_EN_MASK (1<<5) +#define MAX98926_DAI_IMON_EN_SHIFT 5 +#define MAX98926_DAI_IMON_EN_WIDTH 1 +#define MAX98926_DAI_IMON_SLOT_MASK (0x1F<<0) +#define MAX98926_DAI_IMON_SLOT_SHIFT 0 +#define MAX98926_DAI_IMON_SLOT_WIDTH 5 + +#define MAX98926_DAI_IMON_SLOT_00_01 (0 << MAX98926_DAI_IMON_SLOT_SHIFT) +#define MAX98926_DAI_IMON_SLOT_01_02 (1 << MAX98926_DAI_IMON_SLOT_SHIFT) +#define MAX98926_DAI_IMON_SLOT_02_03 (2 << MAX98926_DAI_IMON_SLOT_SHIFT) +#define MAX98926_DAI_IMON_SLOT_03_04 (3 << MAX98926_DAI_IMON_SLOT_SHIFT) +#define MAX98926_DAI_IMON_SLOT_04_05 (4 << MAX98926_DAI_IMON_SLOT_SHIFT) +#define MAX98926_DAI_IMON_SLOT_05_06 (5 << MAX98926_DAI_IMON_SLOT_SHIFT) +#define MAX98926_DAI_IMON_SLOT_06_07 (6 << MAX98926_DAI_IMON_SLOT_SHIFT) +#define MAX98926_DAI_IMON_SLOT_07_08 (7 << MAX98926_DAI_IMON_SLOT_SHIFT) +#define MAX98926_DAI_IMON_SLOT_08_09 (8 << MAX98926_DAI_IMON_SLOT_SHIFT) +#define MAX98926_DAI_IMON_SLOT_09_0A (9 << MAX98926_DAI_IMON_SLOT_SHIFT) +#define MAX98926_DAI_IMON_SLOT_0A_0B (10 << MAX98926_DAI_IMON_SLOT_SHIFT) +#define MAX98926_DAI_IMON_SLOT_0B_0C (11 << MAX98926_DAI_IMON_SLOT_SHIFT) +#define MAX98926_DAI_IMON_SLOT_0C_0D (12 << MAX98926_DAI_IMON_SLOT_SHIFT) +#define MAX98926_DAI_IMON_SLOT_0D_0E (13 << MAX98926_DAI_IMON_SLOT_SHIFT) +#define MAX98926_DAI_IMON_SLOT_0E_0F (14 << MAX98926_DAI_IMON_SLOT_SHIFT) +#define MAX98926_DAI_IMON_SLOT_0F_10 (15 << MAX98926_DAI_IMON_SLOT_SHIFT) +#define MAX98926_DAI_IMON_SLOT_10_11 (16 << MAX98926_DAI_IMON_SLOT_SHIFT) +#define MAX98926_DAI_IMON_SLOT_11_12 (17 << MAX98926_DAI_IMON_SLOT_SHIFT) +#define MAX98926_DAI_IMON_SLOT_12_13 (18 << MAX98926_DAI_IMON_SLOT_SHIFT) +#define MAX98926_DAI_IMON_SLOT_13_14 (19 << MAX98926_DAI_IMON_SLOT_SHIFT) +#define MAX98926_DAI_IMON_SLOT_14_15 (20 << MAX98926_DAI_IMON_SLOT_SHIFT) +#define MAX98926_DAI_IMON_SLOT_15_16 (21 << MAX98926_DAI_IMON_SLOT_SHIFT) +#define MAX98926_DAI_IMON_SLOT_16_17 (22 << MAX98926_DAI_IMON_SLOT_SHIFT) +#define MAX98926_DAI_IMON_SLOT_17_18 (23 << MAX98926_DAI_IMON_SLOT_SHIFT) +#define MAX98926_DAI_IMON_SLOT_18_19 (24 << MAX98926_DAI_IMON_SLOT_SHIFT) +#define MAX98926_DAI_IMON_SLOT_19_1A (25 << MAX98926_DAI_IMON_SLOT_SHIFT) +#define MAX98926_DAI_IMON_SLOT_1A_1B (26 << MAX98926_DAI_IMON_SLOT_SHIFT) +#define MAX98926_DAI_IMON_SLOT_1B_1C (27 << MAX98926_DAI_IMON_SLOT_SHIFT) +#define MAX98926_DAI_IMON_SLOT_1C_1D (28 << MAX98926_DAI_IMON_SLOT_SHIFT) +#define MAX98926_DAI_IMON_SLOT_1D_1E (29 << MAX98926_DAI_IMON_SLOT_SHIFT) +#define MAX98926_DAI_IMON_SLOT_1E_1F (30 << MAX98926_DAI_IMON_SLOT_SHIFT) + +/* MAX98926_R024_DOUT_CFG_VBAT */ +#define MAX98926_DAI_INTERLEAVE_SLOT_MASK (0x1F<<0) +#define MAX98926_DAI_INTERLEAVE_SLOT_SHIFT 0 +#define MAX98926_DAI_INTERLEAVE_SLOT_WIDTH 5 + +/* MAX98926_R025_DOUT_CFG_VBST */ +#define MAX98926_DAI_VBST_EN_MASK (1<<5) +#define MAX98926_DAI_VBST_EN_SHIFT 5 +#define MAX98926_DAI_VBST_EN_WIDTH 1 +#define MAX98926_DAI_VBST_SLOT_MASK (0x1F<<0) +#define MAX98926_DAI_VBST_SLOT_SHIFT 0 +#define MAX98926_DAI_VBST_SLOT_WIDTH 5 + +/* MAX98926_R026_DOUT_CFG_FLAG */ +#define MAX98926_DAI_FLAG_EN_MASK (1<<5) +#define MAX98926_DAI_FLAG_EN_SHIFT 5 +#define MAX98926_DAI_FLAG_EN_WIDTH 1 +#define MAX98926_DAI_FLAG_SLOT_MASK (0x1F<<0) +#define MAX98926_DAI_FLAG_SLOT_SHIFT 0 +#define MAX98926_DAI_FLAG_SLOT_WIDTH 5 + +/* MAX98926_R027_DOUT_HIZ_CFG1 */ +#define MAX98926_DAI_SLOT_HIZ_CFG1_MASK (0xFF<<0) +#define MAX98926_DAI_SLOT_HIZ_CFG1_SHIFT 0 +#define MAX98926_DAI_SLOT_HIZ_CFG1_WIDTH 8 + +/* MAX98926_R028_DOUT_HIZ_CFG2 */ +#define MAX98926_DAI_SLOT_HIZ_CFG2_MASK (0xFF<<0) +#define MAX98926_DAI_SLOT_HIZ_CFG2_SHIFT 0 +#define MAX98926_DAI_SLOT_HIZ_CFG2_WIDTH 8 + +/* MAX98926_R029_DOUT_HIZ_CFG3 */ +#define MAX98926_DAI_SLOT_HIZ_CFG3_MASK (0xFF<<0) +#define MAX98926_DAI_SLOT_HIZ_CFG3_SHIFT 0 +#define MAX98926_DAI_SLOT_HIZ_CFG3_WIDTH 8 + +/* MAX98926_R02A_DOUT_HIZ_CFG4 */ +#define MAX98926_DAI_SLOT_HIZ_CFG4_MASK (0xFF<<0) +#define MAX98926_DAI_SLOT_HIZ_CFG4_SHIFT 0 +#define MAX98926_DAI_SLOT_HIZ_CFG4_WIDTH 8 + +/* MAX98926_R02B_DOUT_DRV_STRENGTH */ +#define MAX98926_DAI_OUT_DRIVE_MASK (0x03<<0) +#define MAX98926_DAI_OUT_DRIVE_SHIFT 0 +#define MAX98926_DAI_OUT_DRIVE_WIDTH 2 + +/* MAX98926_R02C_FILTERS */ +#define MAX98926_ADC_DITHER_EN_MASK (1<<7) +#define MAX98926_ADC_DITHER_EN_SHIFT 7 +#define MAX98926_ADC_DITHER_EN_WIDTH 1 +#define MAX98926_IV_DCB_EN_MASK (1<<6) +#define MAX98926_IV_DCB_EN_SHIFT 6 +#define MAX98926_IV_DCB_EN_WIDTH 1 +#define MAX98926_DAC_DITHER_EN_MASK (1<<4) +#define MAX98926_DAC_DITHER_EN_SHIFT 4 +#define MAX98926_DAC_DITHER_EN_WIDTH 1 +#define MAX98926_DAC_FILTER_MODE_MASK (1<<3) +#define MAX98926_DAC_FILTER_MODE_SHIFT 3 +#define MAX98926_DAC_FILTER_MODE_WIDTH 1 +#define MAX98926_DAC_HPF_MASK (0x07<<0) +#define MAX98926_DAC_HPF_SHIFT 0 +#define MAX98926_DAC_HPF_WIDTH 3 +#define MAX98926_DAC_HPF_DISABLE (0 << MAX98926_DAC_HPF_SHIFT) +#define MAX98926_DAC_HPF_DC_BLOCK (1 << MAX98926_DAC_HPF_SHIFT) +#define MAX98926_DAC_HPF_EN_100 (2 << MAX98926_DAC_HPF_SHIFT) +#define MAX98926_DAC_HPF_EN_200 (3 << MAX98926_DAC_HPF_SHIFT) +#define MAX98926_DAC_HPF_EN_400 (4 << MAX98926_DAC_HPF_SHIFT) +#define MAX98926_DAC_HPF_EN_800 (5 << MAX98926_DAC_HPF_SHIFT) + +/* MAX98926_R02D_GAIN */ +#define MAX98926_DAC_IN_SEL_MASK (0x03<<5) +#define MAX98926_DAC_IN_SEL_SHIFT 5 +#define MAX98926_DAC_IN_SEL_WIDTH 2 +#define MAX98926_SPK_GAIN_MASK (0x1F<<0) +#define MAX98926_SPK_GAIN_SHIFT 0 +#define MAX98926_SPK_GAIN_WIDTH 5 + +#define MAX98926_DAC_IN_SEL_LEFT_DAI (0 << MAX98926_DAC_IN_SEL_SHIFT) +#define MAX98926_DAC_IN_SEL_RIGHT_DAI (1 << MAX98926_DAC_IN_SEL_SHIFT) +#define MAX98926_DAC_IN_SEL_SUMMED_DAI (2 << MAX98926_DAC_IN_SEL_SHIFT) +#define MAX98926_DAC_IN_SEL_DIV2_SUMMED_DAI (3 << MAX98926_DAC_IN_SEL_SHIFT) + +/* MAX98926_R02E_GAIN_RAMPING */ +#define MAX98926_SPK_RMP_EN_MASK (1<<1) +#define MAX98926_SPK_RMP_EN_SHIFT 1 +#define MAX98926_SPK_RMP_EN_WIDTH 1 +#define MAX98926_SPK_ZCD_EN_MASK (1<<0) +#define MAX98926_SPK_ZCD_EN_SHIFT 0 +#define MAX98926_SPK_ZCD_EN_WIDTH 1 + +/* MAX98926_R02F_SPK_AMP */ +#define MAX98926_SPK_MODE_MASK (1<<0) +#define MAX98926_SPK_MODE_SHIFT 0 +#define MAX98926_SPK_MODE_WIDTH 1 +#define MAX98926_INSELECT_MODE_MASK (1<<1) +#define MAX98926_INSELECT_MODE_SHIFT 1 +#define MAX98926_INSELECT_MODE_WIDTH 1 + +/* MAX98926_R030_THRESHOLD */ +#define MAX98926_ALC_EN_MASK (1<<5) +#define MAX98926_ALC_EN_SHIFT 5 +#define MAX98926_ALC_EN_WIDTH 1 +#define MAX98926_ALC_TH_MASK (0x1F<<0) +#define MAX98926_ALC_TH_SHIFT 0 +#define MAX98926_ALC_TH_WIDTH 5 + +/* MAX98926_R031_ALC_ATTACK */ +#define MAX98926_ALC_ATK_STEP_MASK (0x0F<<4) +#define MAX98926_ALC_ATK_STEP_SHIFT 4 +#define MAX98926_ALC_ATK_STEP_WIDTH 4 +#define MAX98926_ALC_ATK_RATE_MASK (0x7<<0) +#define MAX98926_ALC_ATK_RATE_SHIFT 0 +#define MAX98926_ALC_ATK_RATE_WIDTH 3 + +/* MAX98926_R032_ALC_ATTEN_RLS */ +#define MAX98926_ALC_MAX_ATTEN_MASK (0x0F<<4) +#define MAX98926_ALC_MAX_ATTEN_SHIFT 4 +#define MAX98926_ALC_MAX_ATTEN_WIDTH 4 +#define MAX98926_ALC_RLS_RATE_MASK (0x7<<0) +#define MAX98926_ALC_RLS_RATE_SHIFT 0 +#define MAX98926_ALC_RLS_RATE_WIDTH 3 + +/* MAX98926_R033_ALC_HOLD_RLS */ +#define MAX98926_ALC_RLS_TGR_MASK (1<<0) +#define MAX98926_ALC_RLS_TGR_SHIFT 0 +#define MAX98926_ALC_RLS_TGR_WIDTH 1 + +/* MAX98926_R034_ALC_CONFIGURATION */ +#define MAX98926_ALC_MUTE_EN_MASK (1<<7) +#define MAX98926_ALC_MUTE_EN_SHIFT 7 +#define MAX98926_ALC_MUTE_EN_WIDTH 1 +#define MAX98926_ALC_MUTE_DLY_MASK (0x07<<4) +#define MAX98926_ALC_MUTE_DLY_SHIFT 4 +#define MAX98926_ALC_MUTE_DLY_WIDTH 3 +#define MAX98926_ALC_RLS_DBT_MASK (0x07<<0) +#define MAX98926_ALC_RLS_DBT_SHIFT 0 +#define MAX98926_ALC_RLS_DBT_WIDTH 3 + +/* MAX98926_R035_BOOST_CONVERTER */ +#define MAX98926_BST_SYNC_MASK (1<<7) +#define MAX98926_BST_SYNC_SHIFT 7 +#define MAX98926_BST_SYNC_WIDTH 1 +#define MAX98926_BST_PHASE_MASK (0x03<<4) +#define MAX98926_BST_PHASE_SHIFT 4 +#define MAX98926_BST_PHASE_WIDTH 2 +#define MAX98926_BST_SKIP_MODE_MASK (0x03<<0) +#define MAX98926_BST_SKIP_MODE_SHIFT 0 +#define MAX98926_BST_SKIP_MODE_WIDTH 2 + +/* MAX98926_R036_BLOCK_ENABLE */ +#define MAX98926_BST_EN_MASK (1<<7) +#define MAX98926_BST_EN_SHIFT 7 +#define MAX98926_BST_EN_WIDTH 1 +#define MAX98926_WATCH_EN_MASK (1<<6) +#define MAX98926_WATCH_EN_SHIFT 6 +#define MAX98926_WATCH_EN_WIDTH 1 +#define MAX98926_CLKMON_EN_MASK (1<<5) +#define MAX98926_CLKMON_EN_SHIFT 5 +#define MAX98926_CLKMON_EN_WIDTH 1 +#define MAX98926_SPK_EN_MASK (1<<4) +#define MAX98926_SPK_EN_SHIFT 4 +#define MAX98926_SPK_EN_WIDTH 1 +#define MAX98926_ADC_VBST_EN_MASK (1<<3) +#define MAX98926_ADC_VBST_EN_SHIFT 3 +#define MAX98926_ADC_VBST_EN_WIDTH 1 +#define MAX98926_ADC_VBAT_EN_MASK (1<<2) +#define MAX98926_ADC_VBAT_EN_SHIFT 2 +#define MAX98926_ADC_VBAT_EN_WIDTH 1 +#define MAX98926_ADC_IMON_EN_MASK (1<<1) +#define MAX98926_ADC_IMON_EN_SHIFT 1 +#define MAX98926_ADC_IMON_EN_WIDTH 1 +#define MAX98926_ADC_VMON_EN_MASK (1<<0) +#define MAX98926_ADC_VMON_EN_SHIFT 0 +#define MAX98926_ADC_VMON_EN_WIDTH 1 + +/* MAX98926_R037_CONFIGURATION */ +#define MAX98926_BST_VOUT_MASK (0x0F<<4) +#define MAX98926_BST_VOUT_SHIFT 4 +#define MAX98926_BST_VOUT_WIDTH 4 +#define MAX98926_THERMWARN_LEVEL_MASK (0x03<<2) +#define MAX98926_THERMWARN_LEVEL_SHIFT 2 +#define MAX98926_THERMWARN_LEVEL_WIDTH 2 +#define MAX98926_WATCH_TIME_MASK (0x03<<0) +#define MAX98926_WATCH_TIME_SHIFT 0 +#define MAX98926_WATCH_TIME_WIDTH 2 + +/* MAX98926_R038_GLOBAL_ENABLE */ +#define MAX98926_EN_MASK (1<<7) +#define MAX98926_EN_SHIFT 7 +#define MAX98926_EN_WIDTH 1 + +/* MAX98926_R03A_BOOST_LIMITER */ +#define MAX98926_BST_ILIM_MASK (0xF<<4) +#define MAX98926_BST_ILIM_SHIFT 4 +#define MAX98926_BST_ILIM_WIDTH 4 + +/* MAX98926_R0FF_VERSION */ +#define MAX98926_REV_ID_MASK (0xFF<<0) +#define MAX98926_REV_ID_SHIFT 0 +#define MAX98926_REV_ID_WIDTH 8 + +struct max98926_priv { + struct regmap *regmap; + struct snd_soc_codec *codec; + unsigned int sysclk; + unsigned int v_slot; + unsigned int i_slot; + unsigned int ch_size; + unsigned int interleave_mode; +}; +#endif -- 1.9.3

2 1

[alsa-devel] Applied "ASoC: AMD : add ACP 2.2 register headers" to the asoc tree
by Mark Brown 10 Jan '16

10 Jan '16

The patch ASoC: AMD : add ACP 2.2 register headers has been applied to the asoc tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From 2fa86e94a383cd6dd6e34a10950ddc93c0bb173b Mon Sep 17 00:00:00 2001 From: Maruthi Srinivas Bayyavarapu <Maruthi.Bayyavarapu(a)amd.com> Date: Fri, 8 Jan 2016 18:22:08 -0500 Subject: [PATCH] ASoC: AMD : add ACP 2.2 register headers These are register headers for the ACP (Audio CoProcessor) v2.2 Signed-off-by: Maruthi Bayyavarapu <maruthi.bayyavarapu(a)amd.com> Reviewed-by: Alex Deucher <alexander.deucher(a)amd.com> Signed-off-by: Alex Deucher <alexander.deucher(a)amd.com> Signed-off-by: Mark Brown <broonie(a)kernel.org> --- sound/soc/amd/include/acp_2_2_d.h | 609 ++++++++ sound/soc/amd/include/acp_2_2_enum.h | 1068 ++++++++++++++ sound/soc/amd/include/acp_2_2_sh_mask.h | 2292 +++++++++++++++++++++++++++++++ 3 files changed, 3969 insertions(+) create mode 100644 sound/soc/amd/include/acp_2_2_d.h create mode 100644 sound/soc/amd/include/acp_2_2_enum.h create mode 100644 sound/soc/amd/include/acp_2_2_sh_mask.h diff --git a/sound/soc/amd/include/acp_2_2_d.h b/sound/soc/amd/include/acp_2_2_d.h new file mode 100644 index 000000000000..0118fe9e6a87 --- /dev/null +++ b/sound/soc/amd/include/acp_2_2_d.h @@ -0,0 +1,609 @@ +/* + * ACP_2_2 Register documentation + * + * Copyright (C) 2014 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN + * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef ACP_2_2_D_H +#define ACP_2_2_D_H + +#define mmACP_DMA_CNTL_0 0x5000 +#define mmACP_DMA_CNTL_1 0x5001 +#define mmACP_DMA_CNTL_2 0x5002 +#define mmACP_DMA_CNTL_3 0x5003 +#define mmACP_DMA_CNTL_4 0x5004 +#define mmACP_DMA_CNTL_5 0x5005 +#define mmACP_DMA_CNTL_6 0x5006 +#define mmACP_DMA_CNTL_7 0x5007 +#define mmACP_DMA_CNTL_8 0x5008 +#define mmACP_DMA_CNTL_9 0x5009 +#define mmACP_DMA_CNTL_10 0x500a +#define mmACP_DMA_CNTL_11 0x500b +#define mmACP_DMA_CNTL_12 0x500c +#define mmACP_DMA_CNTL_13 0x500d +#define mmACP_DMA_CNTL_14 0x500e +#define mmACP_DMA_CNTL_15 0x500f +#define mmACP_DMA_DSCR_STRT_IDX_0 0x5010 +#define mmACP_DMA_DSCR_STRT_IDX_1 0x5011 +#define mmACP_DMA_DSCR_STRT_IDX_2 0x5012 +#define mmACP_DMA_DSCR_STRT_IDX_3 0x5013 +#define mmACP_DMA_DSCR_STRT_IDX_4 0x5014 +#define mmACP_DMA_DSCR_STRT_IDX_5 0x5015 +#define mmACP_DMA_DSCR_STRT_IDX_6 0x5016 +#define mmACP_DMA_DSCR_STRT_IDX_7 0x5017 +#define mmACP_DMA_DSCR_STRT_IDX_8 0x5018 +#define mmACP_DMA_DSCR_STRT_IDX_9 0x5019 +#define mmACP_DMA_DSCR_STRT_IDX_10 0x501a +#define mmACP_DMA_DSCR_STRT_IDX_11 0x501b +#define mmACP_DMA_DSCR_STRT_IDX_12 0x501c +#define mmACP_DMA_DSCR_STRT_IDX_13 0x501d +#define mmACP_DMA_DSCR_STRT_IDX_14 0x501e +#define mmACP_DMA_DSCR_STRT_IDX_15 0x501f +#define mmACP_DMA_DSCR_CNT_0 0x5020 +#define mmACP_DMA_DSCR_CNT_1 0x5021 +#define mmACP_DMA_DSCR_CNT_2 0x5022 +#define mmACP_DMA_DSCR_CNT_3 0x5023 +#define mmACP_DMA_DSCR_CNT_4 0x5024 +#define mmACP_DMA_DSCR_CNT_5 0x5025 +#define mmACP_DMA_DSCR_CNT_6 0x5026 +#define mmACP_DMA_DSCR_CNT_7 0x5027 +#define mmACP_DMA_DSCR_CNT_8 0x5028 +#define mmACP_DMA_DSCR_CNT_9 0x5029 +#define mmACP_DMA_DSCR_CNT_10 0x502a +#define mmACP_DMA_DSCR_CNT_11 0x502b +#define mmACP_DMA_DSCR_CNT_12 0x502c +#define mmACP_DMA_DSCR_CNT_13 0x502d +#define mmACP_DMA_DSCR_CNT_14 0x502e +#define mmACP_DMA_DSCR_CNT_15 0x502f +#define mmACP_DMA_PRIO_0 0x5030 +#define mmACP_DMA_PRIO_1 0x5031 +#define mmACP_DMA_PRIO_2 0x5032 +#define mmACP_DMA_PRIO_3 0x5033 +#define mmACP_DMA_PRIO_4 0x5034 +#define mmACP_DMA_PRIO_5 0x5035 +#define mmACP_DMA_PRIO_6 0x5036 +#define mmACP_DMA_PRIO_7 0x5037 +#define mmACP_DMA_PRIO_8 0x5038 +#define mmACP_DMA_PRIO_9 0x5039 +#define mmACP_DMA_PRIO_10 0x503a +#define mmACP_DMA_PRIO_11 0x503b +#define mmACP_DMA_PRIO_12 0x503c +#define mmACP_DMA_PRIO_13 0x503d +#define mmACP_DMA_PRIO_14 0x503e +#define mmACP_DMA_PRIO_15 0x503f +#define mmACP_DMA_CUR_DSCR_0 0x5040 +#define mmACP_DMA_CUR_DSCR_1 0x5041 +#define mmACP_DMA_CUR_DSCR_2 0x5042 +#define mmACP_DMA_CUR_DSCR_3 0x5043 +#define mmACP_DMA_CUR_DSCR_4 0x5044 +#define mmACP_DMA_CUR_DSCR_5 0x5045 +#define mmACP_DMA_CUR_DSCR_6 0x5046 +#define mmACP_DMA_CUR_DSCR_7 0x5047 +#define mmACP_DMA_CUR_DSCR_8 0x5048 +#define mmACP_DMA_CUR_DSCR_9 0x5049 +#define mmACP_DMA_CUR_DSCR_10 0x504a +#define mmACP_DMA_CUR_DSCR_11 0x504b +#define mmACP_DMA_CUR_DSCR_12 0x504c +#define mmACP_DMA_CUR_DSCR_13 0x504d +#define mmACP_DMA_CUR_DSCR_14 0x504e +#define mmACP_DMA_CUR_DSCR_15 0x504f +#define mmACP_DMA_CUR_TRANS_CNT_0 0x5050 +#define mmACP_DMA_CUR_TRANS_CNT_1 0x5051 +#define mmACP_DMA_CUR_TRANS_CNT_2 0x5052 +#define mmACP_DMA_CUR_TRANS_CNT_3 0x5053 +#define mmACP_DMA_CUR_TRANS_CNT_4 0x5054 +#define mmACP_DMA_CUR_TRANS_CNT_5 0x5055 +#define mmACP_DMA_CUR_TRANS_CNT_6 0x5056 +#define mmACP_DMA_CUR_TRANS_CNT_7 0x5057 +#define mmACP_DMA_CUR_TRANS_CNT_8 0x5058 +#define mmACP_DMA_CUR_TRANS_CNT_9 0x5059 +#define mmACP_DMA_CUR_TRANS_CNT_10 0x505a +#define mmACP_DMA_CUR_TRANS_CNT_11 0x505b +#define mmACP_DMA_CUR_TRANS_CNT_12 0x505c +#define mmACP_DMA_CUR_TRANS_CNT_13 0x505d +#define mmACP_DMA_CUR_TRANS_CNT_14 0x505e +#define mmACP_DMA_CUR_TRANS_CNT_15 0x505f +#define mmACP_DMA_ERR_STS_0 0x5060 +#define mmACP_DMA_ERR_STS_1 0x5061 +#define mmACP_DMA_ERR_STS_2 0x5062 +#define mmACP_DMA_ERR_STS_3 0x5063 +#define mmACP_DMA_ERR_STS_4 0x5064 +#define mmACP_DMA_ERR_STS_5 0x5065 +#define mmACP_DMA_ERR_STS_6 0x5066 +#define mmACP_DMA_ERR_STS_7 0x5067 +#define mmACP_DMA_ERR_STS_8 0x5068 +#define mmACP_DMA_ERR_STS_9 0x5069 +#define mmACP_DMA_ERR_STS_10 0x506a +#define mmACP_DMA_ERR_STS_11 0x506b +#define mmACP_DMA_ERR_STS_12 0x506c +#define mmACP_DMA_ERR_STS_13 0x506d +#define mmACP_DMA_ERR_STS_14 0x506e +#define mmACP_DMA_ERR_STS_15 0x506f +#define mmACP_DMA_DESC_BASE_ADDR 0x5070 +#define mmACP_DMA_DESC_MAX_NUM_DSCR 0x5071 +#define mmACP_DMA_CH_STS 0x5072 +#define mmACP_DMA_CH_GROUP 0x5073 +#define mmACP_DSP0_CACHE_OFFSET0 0x5078 +#define mmACP_DSP0_CACHE_SIZE0 0x5079 +#define mmACP_DSP0_CACHE_OFFSET1 0x507a +#define mmACP_DSP0_CACHE_SIZE1 0x507b +#define mmACP_DSP0_CACHE_OFFSET2 0x507c +#define mmACP_DSP0_CACHE_SIZE2 0x507d +#define mmACP_DSP0_CACHE_OFFSET3 0x507e +#define mmACP_DSP0_CACHE_SIZE3 0x507f +#define mmACP_DSP0_CACHE_OFFSET4 0x5080 +#define mmACP_DSP0_CACHE_SIZE4 0x5081 +#define mmACP_DSP0_CACHE_OFFSET5 0x5082 +#define mmACP_DSP0_CACHE_SIZE5 0x5083 +#define mmACP_DSP0_CACHE_OFFSET6 0x5084 +#define mmACP_DSP0_CACHE_SIZE6 0x5085 +#define mmACP_DSP0_CACHE_OFFSET7 0x5086 +#define mmACP_DSP0_CACHE_SIZE7 0x5087 +#define mmACP_DSP0_CACHE_OFFSET8 0x5088 +#define mmACP_DSP0_CACHE_SIZE8 0x5089 +#define mmACP_DSP0_NONCACHE_OFFSET0 0x508a +#define mmACP_DSP0_NONCACHE_SIZE0 0x508b +#define mmACP_DSP0_NONCACHE_OFFSET1 0x508c +#define mmACP_DSP0_NONCACHE_SIZE1 0x508d +#define mmACP_DSP0_DEBUG_PC 0x508e +#define mmACP_DSP0_NMI_SEL 0x508f +#define mmACP_DSP0_CLKRST_CNTL 0x5090 +#define mmACP_DSP0_RUNSTALL 0x5091 +#define mmACP_DSP0_OCD_HALT_ON_RST 0x5092 +#define mmACP_DSP0_WAIT_MODE 0x5093 +#define mmACP_DSP0_VECT_SEL 0x5094 +#define mmACP_DSP0_DEBUG_REG1 0x5095 +#define mmACP_DSP0_DEBUG_REG2 0x5096 +#define mmACP_DSP0_DEBUG_REG3 0x5097 +#define mmACP_DSP1_CACHE_OFFSET0 0x509d +#define mmACP_DSP1_CACHE_SIZE0 0x509e +#define mmACP_DSP1_CACHE_OFFSET1 0x509f +#define mmACP_DSP1_CACHE_SIZE1 0x50a0 +#define mmACP_DSP1_CACHE_OFFSET2 0x50a1 +#define mmACP_DSP1_CACHE_SIZE2 0x50a2 +#define mmACP_DSP1_CACHE_OFFSET3 0x50a3 +#define mmACP_DSP1_CACHE_SIZE3 0x50a4 +#define mmACP_DSP1_CACHE_OFFSET4 0x50a5 +#define mmACP_DSP1_CACHE_SIZE4 0x50a6 +#define mmACP_DSP1_CACHE_OFFSET5 0x50a7 +#define mmACP_DSP1_CACHE_SIZE5 0x50a8 +#define mmACP_DSP1_CACHE_OFFSET6 0x50a9 +#define mmACP_DSP1_CACHE_SIZE6 0x50aa +#define mmACP_DSP1_CACHE_OFFSET7 0x50ab +#define mmACP_DSP1_CACHE_SIZE7 0x50ac +#define mmACP_DSP1_CACHE_OFFSET8 0x50ad +#define mmACP_DSP1_CACHE_SIZE8 0x50ae +#define mmACP_DSP1_NONCACHE_OFFSET0 0x50af +#define mmACP_DSP1_NONCACHE_SIZE0 0x50b0 +#define mmACP_DSP1_NONCACHE_OFFSET1 0x50b1 +#define mmACP_DSP1_NONCACHE_SIZE1 0x50b2 +#define mmACP_DSP1_DEBUG_PC 0x50b3 +#define mmACP_DSP1_NMI_SEL 0x50b4 +#define mmACP_DSP1_CLKRST_CNTL 0x50b5 +#define mmACP_DSP1_RUNSTALL 0x50b6 +#define mmACP_DSP1_OCD_HALT_ON_RST 0x50b7 +#define mmACP_DSP1_WAIT_MODE 0x50b8 +#define mmACP_DSP1_VECT_SEL 0x50b9 +#define mmACP_DSP1_DEBUG_REG1 0x50ba +#define mmACP_DSP1_DEBUG_REG2 0x50bb +#define mmACP_DSP1_DEBUG_REG3 0x50bc +#define mmACP_DSP2_CACHE_OFFSET0 0x50c2 +#define mmACP_DSP2_CACHE_SIZE0 0x50c3 +#define mmACP_DSP2_CACHE_OFFSET1 0x50c4 +#define mmACP_DSP2_CACHE_SIZE1 0x50c5 +#define mmACP_DSP2_CACHE_OFFSET2 0x50c6 +#define mmACP_DSP2_CACHE_SIZE2 0x50c7 +#define mmACP_DSP2_CACHE_OFFSET3 0x50c8 +#define mmACP_DSP2_CACHE_SIZE3 0x50c9 +#define mmACP_DSP2_CACHE_OFFSET4 0x50ca +#define mmACP_DSP2_CACHE_SIZE4 0x50cb +#define mmACP_DSP2_CACHE_OFFSET5 0x50cc +#define mmACP_DSP2_CACHE_SIZE5 0x50cd +#define mmACP_DSP2_CACHE_OFFSET6 0x50ce +#define mmACP_DSP2_CACHE_SIZE6 0x50cf +#define mmACP_DSP2_CACHE_OFFSET7 0x50d0 +#define mmACP_DSP2_CACHE_SIZE7 0x50d1 +#define mmACP_DSP2_CACHE_OFFSET8 0x50d2 +#define mmACP_DSP2_CACHE_SIZE8 0x50d3 +#define mmACP_DSP2_NONCACHE_OFFSET0 0x50d4 +#define mmACP_DSP2_NONCACHE_SIZE0 0x50d5 +#define mmACP_DSP2_NONCACHE_OFFSET1 0x50d6 +#define mmACP_DSP2_NONCACHE_SIZE1 0x50d7 +#define mmACP_DSP2_DEBUG_PC 0x50d8 +#define mmACP_DSP2_NMI_SEL 0x50d9 +#define mmACP_DSP2_CLKRST_CNTL 0x50da +#define mmACP_DSP2_RUNSTALL 0x50db +#define mmACP_DSP2_OCD_HALT_ON_RST 0x50dc +#define mmACP_DSP2_WAIT_MODE 0x50dd +#define mmACP_DSP2_VECT_SEL 0x50de +#define mmACP_DSP2_DEBUG_REG1 0x50df +#define mmACP_DSP2_DEBUG_REG2 0x50e0 +#define mmACP_DSP2_DEBUG_REG3 0x50e1 +#define mmACP_AXI2DAGB_ONION_CNTL 0x50e7 +#define mmACP_AXI2DAGB_ONION_ERR_STATUS_WR 0x50e8 +#define mmACP_AXI2DAGB_ONION_ERR_STATUS_RD 0x50e9 +#define mmACP_DAGB_Onion_TransPerf_Counter_Control 0x50ea +#define mmACP_DAGB_Onion_Wr_TransPerf_Counter_Current 0x50eb +#define mmACP_DAGB_Onion_Wr_TransPerf_Counter_Peak 0x50ec +#define mmACP_DAGB_Onion_Rd_TransPerf_Counter_Current 0x50ed +#define mmACP_DAGB_Onion_Rd_TransPerf_Counter_Peak 0x50ee +#define mmACP_AXI2DAGB_GARLIC_CNTL 0x50f3 +#define mmACP_AXI2DAGB_GARLIC_ERR_STATUS_WR 0x50f4 +#define mmACP_AXI2DAGB_GARLIC_ERR_STATUS_RD 0x50f5 +#define mmACP_DAGB_Garlic_TransPerf_Counter_Control 0x50f6 +#define mmACP_DAGB_Garlic_Wr_TransPerf_Counter_Current 0x50f7 +#define mmACP_DAGB_Garlic_Wr_TransPerf_Counter_Peak 0x50f8 +#define mmACP_DAGB_Garlic_Rd_TransPerf_Counter_Current 0x50f9 +#define mmACP_DAGB_Garlic_Rd_TransPerf_Counter_Peak 0x50fa +#define mmACP_DAGB_PAGE_SIZE_GRP_1 0x50ff +#define mmACP_DAGB_BASE_ADDR_GRP_1 0x5100 +#define mmACP_DAGB_PAGE_SIZE_GRP_2 0x5101 +#define mmACP_DAGB_BASE_ADDR_GRP_2 0x5102 +#define mmACP_DAGB_PAGE_SIZE_GRP_3 0x5103 +#define mmACP_DAGB_BASE_ADDR_GRP_3 0x5104 +#define mmACP_DAGB_PAGE_SIZE_GRP_4 0x5105 +#define mmACP_DAGB_BASE_ADDR_GRP_4 0x5106 +#define mmACP_DAGB_PAGE_SIZE_GRP_5 0x5107 +#define mmACP_DAGB_BASE_ADDR_GRP_5 0x5108 +#define mmACP_DAGB_PAGE_SIZE_GRP_6 0x5109 +#define mmACP_DAGB_BASE_ADDR_GRP_6 0x510a +#define mmACP_DAGB_PAGE_SIZE_GRP_7 0x510b +#define mmACP_DAGB_BASE_ADDR_GRP_7 0x510c +#define mmACP_DAGB_PAGE_SIZE_GRP_8 0x510d +#define mmACP_DAGB_BASE_ADDR_GRP_8 0x510e +#define mmACP_DAGB_ATU_CTRL 0x510f +#define mmACP_CONTROL 0x5131 +#define mmACP_STATUS 0x5133 +#define mmACP_SOFT_RESET 0x5134 +#define mmACP_PwrMgmt_CNTL 0x5135 +#define mmACP_CAC_INDICATOR_CONTROL 0x5136 +#define mmACP_SMU_MAILBOX 0x5137 +#define mmACP_FUTURE_REG_SCLK_0 0x5138 +#define mmACP_FUTURE_REG_SCLK_1 0x5139 +#define mmACP_FUTURE_REG_SCLK_2 0x513a +#define mmACP_FUTURE_REG_SCLK_3 0x513b +#define mmACP_FUTURE_REG_SCLK_4 0x513c +#define mmACP_DAGB_DEBUG_CNT_ENABLE 0x513d +#define mmACP_DAGBG_WR_ASK_CNT 0x513e +#define mmACP_DAGBG_WR_GO_CNT 0x513f +#define mmACP_DAGBG_WR_EXP_RESP_CNT 0x5140 +#define mmACP_DAGBG_WR_ACTUAL_RESP_CNT 0x5141 +#define mmACP_DAGBG_RD_ASK_CNT 0x5142 +#define mmACP_DAGBG_RD_GO_CNT 0x5143 +#define mmACP_DAGBG_RD_EXP_RESP_CNT 0x5144 +#define mmACP_DAGBG_RD_ACTUAL_RESP_CNT 0x5145 +#define mmACP_DAGBO_WR_ASK_CNT 0x5146 +#define mmACP_DAGBO_WR_GO_CNT 0x5147 +#define mmACP_DAGBO_WR_EXP_RESP_CNT 0x5148 +#define mmACP_DAGBO_WR_ACTUAL_RESP_CNT 0x5149 +#define mmACP_DAGBO_RD_ASK_CNT 0x514a +#define mmACP_DAGBO_RD_GO_CNT 0x514b +#define mmACP_DAGBO_RD_EXP_RESP_CNT 0x514c +#define mmACP_DAGBO_RD_ACTUAL_RESP_CNT 0x514d +#define mmACP_BRB_CONTROL 0x5156 +#define mmACP_EXTERNAL_INTR_ENB 0x5157 +#define mmACP_EXTERNAL_INTR_CNTL 0x5158 +#define mmACP_ERROR_SOURCE_STS 0x5159 +#define mmACP_DSP_SW_INTR_TRIG 0x515a +#define mmACP_DSP_SW_INTR_CNTL 0x515b +#define mmACP_DAGBG_TIMEOUT_CNTL 0x515c +#define mmACP_DAGBO_TIMEOUT_CNTL 0x515d +#define mmACP_EXTERNAL_INTR_STAT 0x515e +#define mmACP_DSP_SW_INTR_STAT 0x515f +#define mmACP_DSP0_INTR_CNTL 0x5160 +#define mmACP_DSP0_INTR_STAT 0x5161 +#define mmACP_DSP0_TIMEOUT_CNTL 0x5162 +#define mmACP_DSP1_INTR_CNTL 0x5163 +#define mmACP_DSP1_INTR_STAT 0x5164 +#define mmACP_DSP1_TIMEOUT_CNTL 0x5165 +#define mmACP_DSP2_INTR_CNTL 0x5166 +#define mmACP_DSP2_INTR_STAT 0x5167 +#define mmACP_DSP2_TIMEOUT_CNTL 0x5168 +#define mmACP_DSP0_EXT_TIMER_CNTL 0x5169 +#define mmACP_DSP1_EXT_TIMER_CNTL 0x516a +#define mmACP_DSP2_EXT_TIMER_CNTL 0x516b +#define mmACP_AXI2DAGB_SEM_0 0x516c +#define mmACP_AXI2DAGB_SEM_1 0x516d +#define mmACP_AXI2DAGB_SEM_2 0x516e +#define mmACP_AXI2DAGB_SEM_3 0x516f +#define mmACP_AXI2DAGB_SEM_4 0x5170 +#define mmACP_AXI2DAGB_SEM_5 0x5171 +#define mmACP_AXI2DAGB_SEM_6 0x5172 +#define mmACP_AXI2DAGB_SEM_7 0x5173 +#define mmACP_AXI2DAGB_SEM_8 0x5174 +#define mmACP_AXI2DAGB_SEM_9 0x5175 +#define mmACP_AXI2DAGB_SEM_10 0x5176 +#define mmACP_AXI2DAGB_SEM_11 0x5177 +#define mmACP_AXI2DAGB_SEM_12 0x5178 +#define mmACP_AXI2DAGB_SEM_13 0x5179 +#define mmACP_AXI2DAGB_SEM_14 0x517a +#define mmACP_AXI2DAGB_SEM_15 0x517b +#define mmACP_AXI2DAGB_SEM_16 0x517c +#define mmACP_AXI2DAGB_SEM_17 0x517d +#define mmACP_AXI2DAGB_SEM_18 0x517e +#define mmACP_AXI2DAGB_SEM_19 0x517f +#define mmACP_AXI2DAGB_SEM_20 0x5180 +#define mmACP_AXI2DAGB_SEM_21 0x5181 +#define mmACP_AXI2DAGB_SEM_22 0x5182 +#define mmACP_AXI2DAGB_SEM_23 0x5183 +#define mmACP_AXI2DAGB_SEM_24 0x5184 +#define mmACP_AXI2DAGB_SEM_25 0x5185 +#define mmACP_AXI2DAGB_SEM_26 0x5186 +#define mmACP_AXI2DAGB_SEM_27 0x5187 +#define mmACP_AXI2DAGB_SEM_28 0x5188 +#define mmACP_AXI2DAGB_SEM_29 0x5189 +#define mmACP_AXI2DAGB_SEM_30 0x518a +#define mmACP_AXI2DAGB_SEM_31 0x518b +#define mmACP_AXI2DAGB_SEM_32 0x518c +#define mmACP_AXI2DAGB_SEM_33 0x518d +#define mmACP_AXI2DAGB_SEM_34 0x518e +#define mmACP_AXI2DAGB_SEM_35 0x518f +#define mmACP_AXI2DAGB_SEM_36 0x5190 +#define mmACP_AXI2DAGB_SEM_37 0x5191 +#define mmACP_AXI2DAGB_SEM_38 0x5192 +#define mmACP_AXI2DAGB_SEM_39 0x5193 +#define mmACP_AXI2DAGB_SEM_40 0x5194 +#define mmACP_AXI2DAGB_SEM_41 0x5195 +#define mmACP_AXI2DAGB_SEM_42 0x5196 +#define mmACP_AXI2DAGB_SEM_43 0x5197 +#define mmACP_AXI2DAGB_SEM_44 0x5198 +#define mmACP_AXI2DAGB_SEM_45 0x5199 +#define mmACP_AXI2DAGB_SEM_46 0x519a +#define mmACP_AXI2DAGB_SEM_47 0x519b +#define mmACP_SRBM_Client_Base_Addr 0x519c +#define mmACP_SRBM_Client_RDDATA 0x519d +#define mmACP_SRBM_Cycle_Sts 0x519e +#define mmACP_SRBM_Targ_Idx_Addr 0x519f +#define mmACP_SRBM_Targ_Idx_Data 0x51a0 +#define mmACP_SEMA_ADDR_LOW 0x51a1 +#define mmACP_SEMA_ADDR_HIGH 0x51a2 +#define mmACP_SEMA_CMD 0x51a3 +#define mmACP_SEMA_STS 0x51a4 +#define mmACP_SEMA_REQ 0x51a5 +#define mmACP_FW_STATUS 0x51a6 +#define mmACP_FUTURE_REG_ACLK_0 0x51a7 +#define mmACP_FUTURE_REG_ACLK_1 0x51a8 +#define mmACP_FUTURE_REG_ACLK_2 0x51a9 +#define mmACP_FUTURE_REG_ACLK_3 0x51aa +#define mmACP_FUTURE_REG_ACLK_4 0x51ab +#define mmACP_TIMER 0x51ac +#define mmACP_TIMER_CNTL 0x51ad +#define mmACP_DSP0_TIMER 0x51ae +#define mmACP_DSP1_TIMER 0x51af +#define mmACP_DSP2_TIMER 0x51b0 +#define mmACP_I2S_TRANSMIT_BYTE_CNT_HIGH 0x51b1 +#define mmACP_I2S_TRANSMIT_BYTE_CNT_LOW 0x51b2 +#define mmACP_I2S_BT_TRANSMIT_BYTE_CNT_HIGH 0x51b3 +#define mmACP_I2S_BT_TRANSMIT_BYTE_CNT_LOW 0x51b4 +#define mmACP_I2S_BT_RECEIVE_BYTE_CNT_HIGH 0x51b5 +#define mmACP_I2S_BT_RECEIVE_BYTE_CNT_LOW 0x51b6 +#define mmACP_DSP0_CS_STATE 0x51b7 +#define mmACP_DSP1_CS_STATE 0x51b8 +#define mmACP_DSP2_CS_STATE 0x51b9 +#define mmACP_SCRATCH_REG_BASE_ADDR 0x51ba +#define mmCC_ACP_EFUSE 0x51c8 +#define mmACP_PGFSM_RETAIN_REG 0x51c9 +#define mmACP_PGFSM_CONFIG_REG 0x51ca +#define mmACP_PGFSM_WRITE_REG 0x51cb +#define mmACP_PGFSM_READ_REG_0 0x51cc +#define mmACP_PGFSM_READ_REG_1 0x51cd +#define mmACP_PGFSM_READ_REG_2 0x51ce +#define mmACP_PGFSM_READ_REG_3 0x51cf +#define mmACP_PGFSM_READ_REG_4 0x51d0 +#define mmACP_PGFSM_READ_REG_5 0x51d1 +#define mmACP_IP_PGFSM_ENABLE 0x51d2 +#define mmACP_I2S_PIN_CONFIG 0x51d3 +#define mmACP_AZALIA_I2S_SELECT 0x51d4 +#define mmACP_CHIP_PKG_FOR_PAD_ISOLATION 0x51d5 +#define mmACP_AUDIO_PAD_PULLUP_PULLDOWN_CTRL 0x51d6 +#define mmACP_BT_UART_PAD_SEL 0x51d7 +#define mmACP_SCRATCH_REG_0 0x52c0 +#define mmACP_SCRATCH_REG_1 0x52c1 +#define mmACP_SCRATCH_REG_2 0x52c2 +#define mmACP_SCRATCH_REG_3 0x52c3 +#define mmACP_SCRATCH_REG_4 0x52c4 +#define mmACP_SCRATCH_REG_5 0x52c5 +#define mmACP_SCRATCH_REG_6 0x52c6 +#define mmACP_SCRATCH_REG_7 0x52c7 +#define mmACP_SCRATCH_REG_8 0x52c8 +#define mmACP_SCRATCH_REG_9 0x52c9 +#define mmACP_SCRATCH_REG_10 0x52ca +#define mmACP_SCRATCH_REG_11 0x52cb +#define mmACP_SCRATCH_REG_12 0x52cc +#define mmACP_SCRATCH_REG_13 0x52cd +#define mmACP_SCRATCH_REG_14 0x52ce +#define mmACP_SCRATCH_REG_15 0x52cf +#define mmACP_SCRATCH_REG_16 0x52d0 +#define mmACP_SCRATCH_REG_17 0x52d1 +#define mmACP_SCRATCH_REG_18 0x52d2 +#define mmACP_SCRATCH_REG_19 0x52d3 +#define mmACP_SCRATCH_REG_20 0x52d4 +#define mmACP_SCRATCH_REG_21 0x52d5 +#define mmACP_SCRATCH_REG_22 0x52d6 +#define mmACP_SCRATCH_REG_23 0x52d7 +#define mmACP_SCRATCH_REG_24 0x52d8 +#define mmACP_SCRATCH_REG_25 0x52d9 +#define mmACP_SCRATCH_REG_26 0x52da +#define mmACP_SCRATCH_REG_27 0x52db +#define mmACP_SCRATCH_REG_28 0x52dc +#define mmACP_SCRATCH_REG_29 0x52dd +#define mmACP_SCRATCH_REG_30 0x52de +#define mmACP_SCRATCH_REG_31 0x52df +#define mmACP_SCRATCH_REG_32 0x52e0 +#define mmACP_SCRATCH_REG_33 0x52e1 +#define mmACP_SCRATCH_REG_34 0x52e2 +#define mmACP_SCRATCH_REG_35 0x52e3 +#define mmACP_SCRATCH_REG_36 0x52e4 +#define mmACP_SCRATCH_REG_37 0x52e5 +#define mmACP_SCRATCH_REG_38 0x52e6 +#define mmACP_SCRATCH_REG_39 0x52e7 +#define mmACP_SCRATCH_REG_40 0x52e8 +#define mmACP_SCRATCH_REG_41 0x52e9 +#define mmACP_SCRATCH_REG_42 0x52ea +#define mmACP_SCRATCH_REG_43 0x52eb +#define mmACP_SCRATCH_REG_44 0x52ec +#define mmACP_SCRATCH_REG_45 0x52ed +#define mmACP_SCRATCH_REG_46 0x52ee +#define mmACP_SCRATCH_REG_47 0x52ef +#define mmACP_VOICE_WAKEUP_ENABLE 0x51e8 +#define mmACP_VOICE_WAKEUP_STATUS 0x51e9 +#define mmI2S_VOICE_WAKEUP_LOWER_THRESHOLD 0x51ea +#define mmI2S_VOICE_WAKEUP_HIGHER_THRESHOLD 0x51eb +#define mmI2S_VOICE_WAKEUP_NO_OF_SAMPLES 0x51ec +#define mmI2S_VOICE_WAKEUP_NO_OF_PEAKS 0x51ed +#define mmI2S_VOICE_WAKEUP_DURATION_OF_N_PEAKS 0x51ee +#define mmI2S_VOICE_WAKEUP_BITCLK_TOGGLE_DETECTION 0x51ef +#define mmI2S_VOICE_WAKEUP_DATA_PATH_SWITCH 0x51f0 +#define mmI2S_VOICE_WAKEUP_DATA_POINTER 0x51f1 +#define mmI2S_VOICE_WAKEUP_AUTH_MATCH 0x51f2 +#define mmI2S_VOICE_WAKEUP_8KB_WRAP 0x51f3 +#define mmACP_I2S_RECEIVED_BYTE_CNT_HIGH 0x51f4 +#define mmACP_I2S_RECEIVED_BYTE_CNT_LOW 0x51f5 +#define mmACP_I2S_MICSP_TRANSMIT_BYTE_CNT_HIGH 0x51f6 +#define mmACP_I2S_MICSP_TRANSMIT_BYTE_CNT_LOW 0x51f7 +#define mmACP_MEM_SHUT_DOWN_REQ_LO 0x51f8 +#define mmACP_MEM_SHUT_DOWN_REQ_HI 0x51f9 +#define mmACP_MEM_SHUT_DOWN_STS_LO 0x51fa +#define mmACP_MEM_SHUT_DOWN_STS_HI 0x51fb +#define mmACP_MEM_DEEP_SLEEP_REQ_LO 0x51fc +#define mmACP_MEM_DEEP_SLEEP_REQ_HI 0x51fd +#define mmACP_MEM_DEEP_SLEEP_STS_LO 0x51fe +#define mmACP_MEM_DEEP_SLEEP_STS_HI 0x51ff +#define mmACP_MEM_WAKEUP_FROM_SHUT_DOWN_LO 0x5200 +#define mmACP_MEM_WAKEUP_FROM_SHUT_DOWN_HI 0x5201 +#define mmACP_MEM_WAKEUP_FROM_SLEEP_LO 0x5202 +#define mmACP_MEM_WAKEUP_FROM_SLEEP_HI 0x5203 +#define mmACP_I2SSP_IER 0x5210 +#define mmACP_I2SSP_IRER 0x5211 +#define mmACP_I2SSP_ITER 0x5212 +#define mmACP_I2SSP_CER 0x5213 +#define mmACP_I2SSP_CCR 0x5214 +#define mmACP_I2SSP_RXFFR 0x5215 +#define mmACP_I2SSP_TXFFR 0x5216 +#define mmACP_I2SSP_LRBR0 0x5218 +#define mmACP_I2SSP_RRBR0 0x5219 +#define mmACP_I2SSP_RER0 0x521a +#define mmACP_I2SSP_TER0 0x521b +#define mmACP_I2SSP_RCR0 0x521c +#define mmACP_I2SSP_TCR0 0x521d +#define mmACP_I2SSP_ISR0 0x521e +#define mmACP_I2SSP_IMR0 0x521f +#define mmACP_I2SSP_ROR0 0x5220 +#define mmACP_I2SSP_TOR0 0x5221 +#define mmACP_I2SSP_RFCR0 0x5222 +#define mmACP_I2SSP_TFCR0 0x5223 +#define mmACP_I2SSP_RFF0 0x5224 +#define mmACP_I2SSP_TFF0 0x5225 +#define mmACP_I2SSP_RXDMA 0x5226 +#define mmACP_I2SSP_RRXDMA 0x5227 +#define mmACP_I2SSP_TXDMA 0x5228 +#define mmACP_I2SSP_RTXDMA 0x5229 +#define mmACP_I2SSP_COMP_PARAM_2 0x522a +#define mmACP_I2SSP_COMP_PARAM_1 0x522b +#define mmACP_I2SSP_COMP_VERSION 0x522c +#define mmACP_I2SSP_COMP_TYPE 0x522d +#define mmACP_I2SMICSP_IER 0x522e +#define mmACP_I2SMICSP_IRER 0x522f +#define mmACP_I2SMICSP_ITER 0x5230 +#define mmACP_I2SMICSP_CER 0x5231 +#define mmACP_I2SMICSP_CCR 0x5232 +#define mmACP_I2SMICSP_RXFFR 0x5233 +#define mmACP_I2SMICSP_TXFFR 0x5234 +#define mmACP_I2SMICSP_LRBR0 0x5236 +#define mmACP_I2SMICSP_RRBR0 0x5237 +#define mmACP_I2SMICSP_RER0 0x5238 +#define mmACP_I2SMICSP_TER0 0x5239 +#define mmACP_I2SMICSP_RCR0 0x523a +#define mmACP_I2SMICSP_TCR0 0x523b +#define mmACP_I2SMICSP_ISR0 0x523c +#define mmACP_I2SMICSP_IMR0 0x523d +#define mmACP_I2SMICSP_ROR0 0x523e +#define mmACP_I2SMICSP_TOR0 0x523f +#define mmACP_I2SMICSP_RFCR0 0x5240 +#define mmACP_I2SMICSP_TFCR0 0x5241 +#define mmACP_I2SMICSP_RFF0 0x5242 +#define mmACP_I2SMICSP_TFF0 0x5243 +#define mmACP_I2SMICSP_LRBR1 0x5246 +#define mmACP_I2SMICSP_RRBR1 0x5247 +#define mmACP_I2SMICSP_RER1 0x5248 +#define mmACP_I2SMICSP_TER1 0x5249 +#define mmACP_I2SMICSP_RCR1 0x524a +#define mmACP_I2SMICSP_TCR1 0x524b +#define mmACP_I2SMICSP_ISR1 0x524c +#define mmACP_I2SMICSP_IMR1 0x524d +#define mmACP_I2SMICSP_ROR1 0x524e +#define mmACP_I2SMICSP_TOR1 0x524f +#define mmACP_I2SMICSP_RFCR1 0x5250 +#define mmACP_I2SMICSP_TFCR1 0x5251 +#define mmACP_I2SMICSP_RFF1 0x5252 +#define mmACP_I2SMICSP_TFF1 0x5253 +#define mmACP_I2SMICSP_RXDMA 0x5254 +#define mmACP_I2SMICSP_RRXDMA 0x5255 +#define mmACP_I2SMICSP_TXDMA 0x5256 +#define mmACP_I2SMICSP_RTXDMA 0x5257 +#define mmACP_I2SMICSP_COMP_PARAM_2 0x5258 +#define mmACP_I2SMICSP_COMP_PARAM_1 0x5259 +#define mmACP_I2SMICSP_COMP_VERSION 0x525a +#define mmACP_I2SMICSP_COMP_TYPE 0x525b +#define mmACP_I2SBT_IER 0x525c +#define mmACP_I2SBT_IRER 0x525d +#define mmACP_I2SBT_ITER 0x525e +#define mmACP_I2SBT_CER 0x525f +#define mmACP_I2SBT_CCR 0x5260 +#define mmACP_I2SBT_RXFFR 0x5261 +#define mmACP_I2SBT_TXFFR 0x5262 +#define mmACP_I2SBT_LRBR0 0x5264 +#define mmACP_I2SBT_RRBR0 0x5265 +#define mmACP_I2SBT_RER0 0x5266 +#define mmACP_I2SBT_TER0 0x5267 +#define mmACP_I2SBT_RCR0 0x5268 +#define mmACP_I2SBT_TCR0 0x5269 +#define mmACP_I2SBT_ISR0 0x526a +#define mmACP_I2SBT_IMR0 0x526b +#define mmACP_I2SBT_ROR0 0x526c +#define mmACP_I2SBT_TOR0 0x526d +#define mmACP_I2SBT_RFCR0 0x526e +#define mmACP_I2SBT_TFCR0 0x526f +#define mmACP_I2SBT_RFF0 0x5270 +#define mmACP_I2SBT_TFF0 0x5271 +#define mmACP_I2SBT_LRBR1 0x5274 +#define mmACP_I2SBT_RRBR1 0x5275 +#define mmACP_I2SBT_RER1 0x5276 +#define mmACP_I2SBT_TER1 0x5277 +#define mmACP_I2SBT_RCR1 0x5278 +#define mmACP_I2SBT_TCR1 0x5279 +#define mmACP_I2SBT_ISR1 0x527a +#define mmACP_I2SBT_IMR1 0x527b +#define mmACP_I2SBT_ROR1 0x527c +#define mmACP_I2SBT_TOR1 0x527d +#define mmACP_I2SBT_RFCR1 0x527e +#define mmACP_I2SBT_TFCR1 0x527f +#define mmACP_I2SBT_RFF1 0x5280 +#define mmACP_I2SBT_TFF1 0x5281 +#define mmACP_I2SBT_RXDMA 0x5282 +#define mmACP_I2SBT_RRXDMA 0x5283 +#define mmACP_I2SBT_TXDMA 0x5284 +#define mmACP_I2SBT_RTXDMA 0x5285 +#define mmACP_I2SBT_COMP_PARAM_2 0x5286 +#define mmACP_I2SBT_COMP_PARAM_1 0x5287 +#define mmACP_I2SBT_COMP_VERSION 0x5288 +#define mmACP_I2SBT_COMP_TYPE 0x5289 + +#endif /* ACP_2_2_D_H */ diff --git a/sound/soc/amd/include/acp_2_2_enum.h b/sound/soc/amd/include/acp_2_2_enum.h new file mode 100644 index 000000000000..f3577c851086 --- /dev/null +++ b/sound/soc/amd/include/acp_2_2_enum.h @@ -0,0 +1,1068 @@ +/* + * ACP_2_2 Register documentation + * + * Copyright (C) 2014 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN + * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef ACP_2_2_ENUM_H +#define ACP_2_2_ENUM_H + +typedef enum DebugBlockId { + DBG_BLOCK_ID_RESERVED = 0x0, + DBG_BLOCK_ID_DBG = 0x1, + DBG_BLOCK_ID_VMC = 0x2, + DBG_BLOCK_ID_PDMA = 0x3, + DBG_BLOCK_ID_CG = 0x4, + DBG_BLOCK_ID_SRBM = 0x5, + DBG_BLOCK_ID_GRBM = 0x6, + DBG_BLOCK_ID_RLC = 0x7, + DBG_BLOCK_ID_CSC = 0x8, + DBG_BLOCK_ID_SEM = 0x9, + DBG_BLOCK_ID_IH = 0xa, + DBG_BLOCK_ID_SC = 0xb, + DBG_BLOCK_ID_SQ = 0xc, + DBG_BLOCK_ID_UVDU = 0xd, + DBG_BLOCK_ID_SQA = 0xe, + DBG_BLOCK_ID_SDMA0 = 0xf, + DBG_BLOCK_ID_SDMA1 = 0x10, + DBG_BLOCK_ID_SPIM = 0x11, + DBG_BLOCK_ID_GDS = 0x12, + DBG_BLOCK_ID_VC0 = 0x13, + DBG_BLOCK_ID_VC1 = 0x14, + DBG_BLOCK_ID_PA0 = 0x15, + DBG_BLOCK_ID_PA1 = 0x16, + DBG_BLOCK_ID_CP0 = 0x17, + DBG_BLOCK_ID_CP1 = 0x18, + DBG_BLOCK_ID_CP2 = 0x19, + DBG_BLOCK_ID_XBR = 0x1a, + DBG_BLOCK_ID_UVDM = 0x1b, + DBG_BLOCK_ID_VGT0 = 0x1c, + DBG_BLOCK_ID_VGT1 = 0x1d, + DBG_BLOCK_ID_IA = 0x1e, + DBG_BLOCK_ID_SXM0 = 0x1f, + DBG_BLOCK_ID_SXM1 = 0x20, + DBG_BLOCK_ID_SCT0 = 0x21, + DBG_BLOCK_ID_SCT1 = 0x22, + DBG_BLOCK_ID_SPM0 = 0x23, + DBG_BLOCK_ID_SPM1 = 0x24, + DBG_BLOCK_ID_UNUSED0 = 0x25, + DBG_BLOCK_ID_UNUSED1 = 0x26, + DBG_BLOCK_ID_TCAA = 0x27, + DBG_BLOCK_ID_TCAB = 0x28, + DBG_BLOCK_ID_TCCA = 0x29, + DBG_BLOCK_ID_TCCB = 0x2a, + DBG_BLOCK_ID_MCC0 = 0x2b, + DBG_BLOCK_ID_MCC1 = 0x2c, + DBG_BLOCK_ID_MCC2 = 0x2d, + DBG_BLOCK_ID_MCC3 = 0x2e, + DBG_BLOCK_ID_SXS0 = 0x2f, + DBG_BLOCK_ID_SXS1 = 0x30, + DBG_BLOCK_ID_SXS2 = 0x31, + DBG_BLOCK_ID_SXS3 = 0x32, + DBG_BLOCK_ID_SXS4 = 0x33, + DBG_BLOCK_ID_SXS5 = 0x34, + DBG_BLOCK_ID_SXS6 = 0x35, + DBG_BLOCK_ID_SXS7 = 0x36, + DBG_BLOCK_ID_SXS8 = 0x37, + DBG_BLOCK_ID_SXS9 = 0x38, + DBG_BLOCK_ID_BCI0 = 0x39, + DBG_BLOCK_ID_BCI1 = 0x3a, + DBG_BLOCK_ID_BCI2 = 0x3b, + DBG_BLOCK_ID_BCI3 = 0x3c, + DBG_BLOCK_ID_MCB = 0x3d, + DBG_BLOCK_ID_UNUSED6 = 0x3e, + DBG_BLOCK_ID_SQA00 = 0x3f, + DBG_BLOCK_ID_SQA01 = 0x40, + DBG_BLOCK_ID_SQA02 = 0x41, + DBG_BLOCK_ID_SQA10 = 0x42, + DBG_BLOCK_ID_SQA11 = 0x43, + DBG_BLOCK_ID_SQA12 = 0x44, + DBG_BLOCK_ID_UNUSED7 = 0x45, + DBG_BLOCK_ID_UNUSED8 = 0x46, + DBG_BLOCK_ID_SQB00 = 0x47, + DBG_BLOCK_ID_SQB01 = 0x48, + DBG_BLOCK_ID_SQB10 = 0x49, + DBG_BLOCK_ID_SQB11 = 0x4a, + DBG_BLOCK_ID_SQ00 = 0x4b, + DBG_BLOCK_ID_SQ01 = 0x4c, + DBG_BLOCK_ID_SQ10 = 0x4d, + DBG_BLOCK_ID_SQ11 = 0x4e, + DBG_BLOCK_ID_CB00 = 0x4f, + DBG_BLOCK_ID_CB01 = 0x50, + DBG_BLOCK_ID_CB02 = 0x51, + DBG_BLOCK_ID_CB03 = 0x52, + DBG_BLOCK_ID_CB04 = 0x53, + DBG_BLOCK_ID_UNUSED9 = 0x54, + DBG_BLOCK_ID_UNUSED10 = 0x55, + DBG_BLOCK_ID_UNUSED11 = 0x56, + DBG_BLOCK_ID_CB10 = 0x57, + DBG_BLOCK_ID_CB11 = 0x58, + DBG_BLOCK_ID_CB12 = 0x59, + DBG_BLOCK_ID_CB13 = 0x5a, + DBG_BLOCK_ID_CB14 = 0x5b, + DBG_BLOCK_ID_UNUSED12 = 0x5c, + DBG_BLOCK_ID_UNUSED13 = 0x5d, + DBG_BLOCK_ID_UNUSED14 = 0x5e, + DBG_BLOCK_ID_TCP0 = 0x5f, + DBG_BLOCK_ID_TCP1 = 0x60, + DBG_BLOCK_ID_TCP2 = 0x61, + DBG_BLOCK_ID_TCP3 = 0x62, + DBG_BLOCK_ID_TCP4 = 0x63, + DBG_BLOCK_ID_TCP5 = 0x64, + DBG_BLOCK_ID_TCP6 = 0x65, + DBG_BLOCK_ID_TCP7 = 0x66, + DBG_BLOCK_ID_TCP8 = 0x67, + DBG_BLOCK_ID_TCP9 = 0x68, + DBG_BLOCK_ID_TCP10 = 0x69, + DBG_BLOCK_ID_TCP11 = 0x6a, + DBG_BLOCK_ID_TCP12 = 0x6b, + DBG_BLOCK_ID_TCP13 = 0x6c, + DBG_BLOCK_ID_TCP14 = 0x6d, + DBG_BLOCK_ID_TCP15 = 0x6e, + DBG_BLOCK_ID_TCP16 = 0x6f, + DBG_BLOCK_ID_TCP17 = 0x70, + DBG_BLOCK_ID_TCP18 = 0x71, + DBG_BLOCK_ID_TCP19 = 0x72, + DBG_BLOCK_ID_TCP20 = 0x73, + DBG_BLOCK_ID_TCP21 = 0x74, + DBG_BLOCK_ID_TCP22 = 0x75, + DBG_BLOCK_ID_TCP23 = 0x76, + DBG_BLOCK_ID_TCP_RESERVED0 = 0x77, + DBG_BLOCK_ID_TCP_RESERVED1 = 0x78, + DBG_BLOCK_ID_TCP_RESERVED2 = 0x79, + DBG_BLOCK_ID_TCP_RESERVED3 = 0x7a, + DBG_BLOCK_ID_TCP_RESERVED4 = 0x7b, + DBG_BLOCK_ID_TCP_RESERVED5 = 0x7c, + DBG_BLOCK_ID_TCP_RESERVED6 = 0x7d, + DBG_BLOCK_ID_TCP_RESERVED7 = 0x7e, + DBG_BLOCK_ID_DB00 = 0x7f, + DBG_BLOCK_ID_DB01 = 0x80, + DBG_BLOCK_ID_DB02 = 0x81, + DBG_BLOCK_ID_DB03 = 0x82, + DBG_BLOCK_ID_DB04 = 0x83, + DBG_BLOCK_ID_UNUSED15 = 0x84, + DBG_BLOCK_ID_UNUSED16 = 0x85, + DBG_BLOCK_ID_UNUSED17 = 0x86, + DBG_BLOCK_ID_DB10 = 0x87, + DBG_BLOCK_ID_DB11 = 0x88, + DBG_BLOCK_ID_DB12 = 0x89, + DBG_BLOCK_ID_DB13 = 0x8a, + DBG_BLOCK_ID_DB14 = 0x8b, + DBG_BLOCK_ID_UNUSED18 = 0x8c, + DBG_BLOCK_ID_UNUSED19 = 0x8d, + DBG_BLOCK_ID_UNUSED20 = 0x8e, + DBG_BLOCK_ID_TCC0 = 0x8f, + DBG_BLOCK_ID_TCC1 = 0x90, + DBG_BLOCK_ID_TCC2 = 0x91, + DBG_BLOCK_ID_TCC3 = 0x92, + DBG_BLOCK_ID_TCC4 = 0x93, + DBG_BLOCK_ID_TCC5 = 0x94, + DBG_BLOCK_ID_TCC6 = 0x95, + DBG_BLOCK_ID_TCC7 = 0x96, + DBG_BLOCK_ID_SPS00 = 0x97, + DBG_BLOCK_ID_SPS01 = 0x98, + DBG_BLOCK_ID_SPS02 = 0x99, + DBG_BLOCK_ID_SPS10 = 0x9a, + DBG_BLOCK_ID_SPS11 = 0x9b, + DBG_BLOCK_ID_SPS12 = 0x9c, + DBG_BLOCK_ID_UNUSED21 = 0x9d, + DBG_BLOCK_ID_UNUSED22 = 0x9e, + DBG_BLOCK_ID_TA00 = 0x9f, + DBG_BLOCK_ID_TA01 = 0xa0, + DBG_BLOCK_ID_TA02 = 0xa1, + DBG_BLOCK_ID_TA03 = 0xa2, + DBG_BLOCK_ID_TA04 = 0xa3, + DBG_BLOCK_ID_TA05 = 0xa4, + DBG_BLOCK_ID_TA06 = 0xa5, + DBG_BLOCK_ID_TA07 = 0xa6, + DBG_BLOCK_ID_TA08 = 0xa7, + DBG_BLOCK_ID_TA09 = 0xa8, + DBG_BLOCK_ID_TA0A = 0xa9, + DBG_BLOCK_ID_TA0B = 0xaa, + DBG_BLOCK_ID_UNUSED23 = 0xab, + DBG_BLOCK_ID_UNUSED24 = 0xac, + DBG_BLOCK_ID_UNUSED25 = 0xad, + DBG_BLOCK_ID_UNUSED26 = 0xae, + DBG_BLOCK_ID_TA10 = 0xaf, + DBG_BLOCK_ID_TA11 = 0xb0, + DBG_BLOCK_ID_TA12 = 0xb1, + DBG_BLOCK_ID_TA13 = 0xb2, + DBG_BLOCK_ID_TA14 = 0xb3, + DBG_BLOCK_ID_TA15 = 0xb4, + DBG_BLOCK_ID_TA16 = 0xb5, + DBG_BLOCK_ID_TA17 = 0xb6, + DBG_BLOCK_ID_TA18 = 0xb7, + DBG_BLOCK_ID_TA19 = 0xb8, + DBG_BLOCK_ID_TA1A = 0xb9, + DBG_BLOCK_ID_TA1B = 0xba, + DBG_BLOCK_ID_UNUSED27 = 0xbb, + DBG_BLOCK_ID_UNUSED28 = 0xbc, + DBG_BLOCK_ID_UNUSED29 = 0xbd, + DBG_BLOCK_ID_UNUSED30 = 0xbe, + DBG_BLOCK_ID_TD00 = 0xbf, + DBG_BLOCK_ID_TD01 = 0xc0, + DBG_BLOCK_ID_TD02 = 0xc1, + DBG_BLOCK_ID_TD03 = 0xc2, + DBG_BLOCK_ID_TD04 = 0xc3, + DBG_BLOCK_ID_TD05 = 0xc4, + DBG_BLOCK_ID_TD06 = 0xc5, + DBG_BLOCK_ID_TD07 = 0xc6, + DBG_BLOCK_ID_TD08 = 0xc7, + DBG_BLOCK_ID_TD09 = 0xc8, + DBG_BLOCK_ID_TD0A = 0xc9, + DBG_BLOCK_ID_TD0B = 0xca, + DBG_BLOCK_ID_UNUSED31 = 0xcb, + DBG_BLOCK_ID_UNUSED32 = 0xcc, + DBG_BLOCK_ID_UNUSED33 = 0xcd, + DBG_BLOCK_ID_UNUSED34 = 0xce, + DBG_BLOCK_ID_TD10 = 0xcf, + DBG_BLOCK_ID_TD11 = 0xd0, + DBG_BLOCK_ID_TD12 = 0xd1, + DBG_BLOCK_ID_TD13 = 0xd2, + DBG_BLOCK_ID_TD14 = 0xd3, + DBG_BLOCK_ID_TD15 = 0xd4, + DBG_BLOCK_ID_TD16 = 0xd5, + DBG_BLOCK_ID_TD17 = 0xd6, + DBG_BLOCK_ID_TD18 = 0xd7, + DBG_BLOCK_ID_TD19 = 0xd8, + DBG_BLOCK_ID_TD1A = 0xd9, + DBG_BLOCK_ID_TD1B = 0xda, + DBG_BLOCK_ID_UNUSED35 = 0xdb, + DBG_BLOCK_ID_UNUSED36 = 0xdc, + DBG_BLOCK_ID_UNUSED37 = 0xdd, + DBG_BLOCK_ID_UNUSED38 = 0xde, + DBG_BLOCK_ID_LDS00 = 0xdf, + DBG_BLOCK_ID_LDS01 = 0xe0, + DBG_BLOCK_ID_LDS02 = 0xe1, + DBG_BLOCK_ID_LDS03 = 0xe2, + DBG_BLOCK_ID_LDS04 = 0xe3, + DBG_BLOCK_ID_LDS05 = 0xe4, + DBG_BLOCK_ID_LDS06 = 0xe5, + DBG_BLOCK_ID_LDS07 = 0xe6, + DBG_BLOCK_ID_LDS08 = 0xe7, + DBG_BLOCK_ID_LDS09 = 0xe8, + DBG_BLOCK_ID_LDS0A = 0xe9, + DBG_BLOCK_ID_LDS0B = 0xea, + DBG_BLOCK_ID_UNUSED39 = 0xeb, + DBG_BLOCK_ID_UNUSED40 = 0xec, + DBG_BLOCK_ID_UNUSED41 = 0xed, + DBG_BLOCK_ID_UNUSED42 = 0xee, + DBG_BLOCK_ID_LDS10 = 0xef, + DBG_BLOCK_ID_LDS11 = 0xf0, + DBG_BLOCK_ID_LDS12 = 0xf1, + DBG_BLOCK_ID_LDS13 = 0xf2, + DBG_BLOCK_ID_LDS14 = 0xf3, + DBG_BLOCK_ID_LDS15 = 0xf4, + DBG_BLOCK_ID_LDS16 = 0xf5, + DBG_BLOCK_ID_LDS17 = 0xf6, + DBG_BLOCK_ID_LDS18 = 0xf7, + DBG_BLOCK_ID_LDS19 = 0xf8, + DBG_BLOCK_ID_LDS1A = 0xf9, + DBG_BLOCK_ID_LDS1B = 0xfa, + DBG_BLOCK_ID_UNUSED43 = 0xfb, + DBG_BLOCK_ID_UNUSED44 = 0xfc, + DBG_BLOCK_ID_UNUSED45 = 0xfd, + DBG_BLOCK_ID_UNUSED46 = 0xfe, +} DebugBlockId; +typedef enum DebugBlockId_BY2 { + DBG_BLOCK_ID_RESERVED_BY2 = 0x0, + DBG_BLOCK_ID_VMC_BY2 = 0x1, + DBG_BLOCK_ID_UNUSED0_BY2 = 0x2, + DBG_BLOCK_ID_GRBM_BY2 = 0x3, + DBG_BLOCK_ID_CSC_BY2 = 0x4, + DBG_BLOCK_ID_IH_BY2 = 0x5, + DBG_BLOCK_ID_SQ_BY2 = 0x6, + DBG_BLOCK_ID_UVD_BY2 = 0x7, + DBG_BLOCK_ID_SDMA0_BY2 = 0x8, + DBG_BLOCK_ID_SPIM_BY2 = 0x9, + DBG_BLOCK_ID_VC0_BY2 = 0xa, + DBG_BLOCK_ID_PA_BY2 = 0xb, + DBG_BLOCK_ID_CP0_BY2 = 0xc, + DBG_BLOCK_ID_CP2_BY2 = 0xd, + DBG_BLOCK_ID_PC0_BY2 = 0xe, + DBG_BLOCK_ID_BCI0_BY2 = 0xf, + DBG_BLOCK_ID_SXM0_BY2 = 0x10, + DBG_BLOCK_ID_SCT0_BY2 = 0x11, + DBG_BLOCK_ID_SPM0_BY2 = 0x12, + DBG_BLOCK_ID_BCI2_BY2 = 0x13, + DBG_BLOCK_ID_TCA_BY2 = 0x14, + DBG_BLOCK_ID_TCCA_BY2 = 0x15, + DBG_BLOCK_ID_MCC_BY2 = 0x16, + DBG_BLOCK_ID_MCC2_BY2 = 0x17, + DBG_BLOCK_ID_MCD_BY2 = 0x18, + DBG_BLOCK_ID_MCD2_BY2 = 0x19, + DBG_BLOCK_ID_MCD4_BY2 = 0x1a, + DBG_BLOCK_ID_MCB_BY2 = 0x1b, + DBG_BLOCK_ID_SQA_BY2 = 0x1c, + DBG_BLOCK_ID_SQA02_BY2 = 0x1d, + DBG_BLOCK_ID_SQA11_BY2 = 0x1e, + DBG_BLOCK_ID_UNUSED8_BY2 = 0x1f, + DBG_BLOCK_ID_SQB_BY2 = 0x20, + DBG_BLOCK_ID_SQB10_BY2 = 0x21, + DBG_BLOCK_ID_UNUSED10_BY2 = 0x22, + DBG_BLOCK_ID_UNUSED12_BY2 = 0x23, + DBG_BLOCK_ID_CB_BY2 = 0x24, + DBG_BLOCK_ID_CB02_BY2 = 0x25, + DBG_BLOCK_ID_CB10_BY2 = 0x26, + DBG_BLOCK_ID_CB12_BY2 = 0x27, + DBG_BLOCK_ID_SXS_BY2 = 0x28, + DBG_BLOCK_ID_SXS2_BY2 = 0x29, + DBG_BLOCK_ID_SXS4_BY2 = 0x2a, + DBG_BLOCK_ID_SXS6_BY2 = 0x2b, + DBG_BLOCK_ID_DB_BY2 = 0x2c, + DBG_BLOCK_ID_DB02_BY2 = 0x2d, + DBG_BLOCK_ID_DB10_BY2 = 0x2e, + DBG_BLOCK_ID_DB12_BY2 = 0x2f, + DBG_BLOCK_ID_TCP_BY2 = 0x30, + DBG_BLOCK_ID_TCP2_BY2 = 0x31, + DBG_BLOCK_ID_TCP4_BY2 = 0x32, + DBG_BLOCK_ID_TCP6_BY2 = 0x33, + DBG_BLOCK_ID_TCP8_BY2 = 0x34, + DBG_BLOCK_ID_TCP10_BY2 = 0x35, + DBG_BLOCK_ID_TCP12_BY2 = 0x36, + DBG_BLOCK_ID_TCP14_BY2 = 0x37, + DBG_BLOCK_ID_TCP16_BY2 = 0x38, + DBG_BLOCK_ID_TCP18_BY2 = 0x39, + DBG_BLOCK_ID_TCP20_BY2 = 0x3a, + DBG_BLOCK_ID_TCP22_BY2 = 0x3b, + DBG_BLOCK_ID_TCP_RESERVED0_BY2 = 0x3c, + DBG_BLOCK_ID_TCP_RESERVED2_BY2 = 0x3d, + DBG_BLOCK_ID_TCP_RESERVED4_BY2 = 0x3e, + DBG_BLOCK_ID_TCP_RESERVED6_BY2 = 0x3f, + DBG_BLOCK_ID_TCC_BY2 = 0x40, + DBG_BLOCK_ID_TCC2_BY2 = 0x41, + DBG_BLOCK_ID_TCC4_BY2 = 0x42, + DBG_BLOCK_ID_TCC6_BY2 = 0x43, + DBG_BLOCK_ID_SPS_BY2 = 0x44, + DBG_BLOCK_ID_SPS02_BY2 = 0x45, + DBG_BLOCK_ID_SPS11_BY2 = 0x46, + DBG_BLOCK_ID_UNUSED14_BY2 = 0x47, + DBG_BLOCK_ID_TA_BY2 = 0x48, + DBG_BLOCK_ID_TA02_BY2 = 0x49, + DBG_BLOCK_ID_TA04_BY2 = 0x4a, + DBG_BLOCK_ID_TA06_BY2 = 0x4b, + DBG_BLOCK_ID_TA08_BY2 = 0x4c, + DBG_BLOCK_ID_TA0A_BY2 = 0x4d, + DBG_BLOCK_ID_UNUSED20_BY2 = 0x4e, + DBG_BLOCK_ID_UNUSED22_BY2 = 0x4f, + DBG_BLOCK_ID_TA10_BY2 = 0x50, + DBG_BLOCK_ID_TA12_BY2 = 0x51, + DBG_BLOCK_ID_TA14_BY2 = 0x52, + DBG_BLOCK_ID_TA16_BY2 = 0x53, + DBG_BLOCK_ID_TA18_BY2 = 0x54, + DBG_BLOCK_ID_TA1A_BY2 = 0x55, + DBG_BLOCK_ID_UNUSED24_BY2 = 0x56, + DBG_BLOCK_ID_UNUSED26_BY2 = 0x57, + DBG_BLOCK_ID_TD_BY2 = 0x58, + DBG_BLOCK_ID_TD02_BY2 = 0x59, + DBG_BLOCK_ID_TD04_BY2 = 0x5a, + DBG_BLOCK_ID_TD06_BY2 = 0x5b, + DBG_BLOCK_ID_TD08_BY2 = 0x5c, + DBG_BLOCK_ID_TD0A_BY2 = 0x5d, + DBG_BLOCK_ID_UNUSED28_BY2 = 0x5e, + DBG_BLOCK_ID_UNUSED30_BY2 = 0x5f, + DBG_BLOCK_ID_TD10_BY2 = 0x60, + DBG_BLOCK_ID_TD12_BY2 = 0x61, + DBG_BLOCK_ID_TD14_BY2 = 0x62, + DBG_BLOCK_ID_TD16_BY2 = 0x63, + DBG_BLOCK_ID_TD18_BY2 = 0x64, + DBG_BLOCK_ID_TD1A_BY2 = 0x65, + DBG_BLOCK_ID_UNUSED32_BY2 = 0x66, + DBG_BLOCK_ID_UNUSED34_BY2 = 0x67, + DBG_BLOCK_ID_LDS_BY2 = 0x68, + DBG_BLOCK_ID_LDS02_BY2 = 0x69, + DBG_BLOCK_ID_LDS04_BY2 = 0x6a, + DBG_BLOCK_ID_LDS06_BY2 = 0x6b, + DBG_BLOCK_ID_LDS08_BY2 = 0x6c, + DBG_BLOCK_ID_LDS0A_BY2 = 0x6d, + DBG_BLOCK_ID_UNUSED36_BY2 = 0x6e, + DBG_BLOCK_ID_UNUSED38_BY2 = 0x6f, + DBG_BLOCK_ID_LDS10_BY2 = 0x70, + DBG_BLOCK_ID_LDS12_BY2 = 0x71, + DBG_BLOCK_ID_LDS14_BY2 = 0x72, + DBG_BLOCK_ID_LDS16_BY2 = 0x73, + DBG_BLOCK_ID_LDS18_BY2 = 0x74, + DBG_BLOCK_ID_LDS1A_BY2 = 0x75, + DBG_BLOCK_ID_UNUSED40_BY2 = 0x76, + DBG_BLOCK_ID_UNUSED42_BY2 = 0x77, +} DebugBlockId_BY2; +typedef enum DebugBlockId_BY4 { + DBG_BLOCK_ID_RESERVED_BY4 = 0x0, + DBG_BLOCK_ID_UNUSED0_BY4 = 0x1, + DBG_BLOCK_ID_CSC_BY4 = 0x2, + DBG_BLOCK_ID_SQ_BY4 = 0x3, + DBG_BLOCK_ID_SDMA0_BY4 = 0x4, + DBG_BLOCK_ID_VC0_BY4 = 0x5, + DBG_BLOCK_ID_CP0_BY4 = 0x6, + DBG_BLOCK_ID_UNUSED1_BY4 = 0x7, + DBG_BLOCK_ID_SXM0_BY4 = 0x8, + DBG_BLOCK_ID_SPM0_BY4 = 0x9, + DBG_BLOCK_ID_TCAA_BY4 = 0xa, + DBG_BLOCK_ID_MCC_BY4 = 0xb, + DBG_BLOCK_ID_MCD_BY4 = 0xc, + DBG_BLOCK_ID_MCD4_BY4 = 0xd, + DBG_BLOCK_ID_SQA_BY4 = 0xe, + DBG_BLOCK_ID_SQA11_BY4 = 0xf, + DBG_BLOCK_ID_SQB_BY4 = 0x10, + DBG_BLOCK_ID_UNUSED10_BY4 = 0x11, + DBG_BLOCK_ID_CB_BY4 = 0x12, + DBG_BLOCK_ID_CB10_BY4 = 0x13, + DBG_BLOCK_ID_SXS_BY4 = 0x14, + DBG_BLOCK_ID_SXS4_BY4 = 0x15, + DBG_BLOCK_ID_DB_BY4 = 0x16, + DBG_BLOCK_ID_DB10_BY4 = 0x17, + DBG_BLOCK_ID_TCP_BY4 = 0x18, + DBG_BLOCK_ID_TCP4_BY4 = 0x19, + DBG_BLOCK_ID_TCP8_BY4 = 0x1a, + DBG_BLOCK_ID_TCP12_BY4 = 0x1b, + DBG_BLOCK_ID_TCP16_BY4 = 0x1c, + DBG_BLOCK_ID_TCP20_BY4 = 0x1d, + DBG_BLOCK_ID_TCP_RESERVED0_BY4 = 0x1e, + DBG_BLOCK_ID_TCP_RESERVED4_BY4 = 0x1f, + DBG_BLOCK_ID_TCC_BY4 = 0x20, + DBG_BLOCK_ID_TCC4_BY4 = 0x21, + DBG_BLOCK_ID_SPS_BY4 = 0x22, + DBG_BLOCK_ID_SPS11_BY4 = 0x23, + DBG_BLOCK_ID_TA_BY4 = 0x24, + DBG_BLOCK_ID_TA04_BY4 = 0x25, + DBG_BLOCK_ID_TA08_BY4 = 0x26, + DBG_BLOCK_ID_UNUSED20_BY4 = 0x27, + DBG_BLOCK_ID_TA10_BY4 = 0x28, + DBG_BLOCK_ID_TA14_BY4 = 0x29, + DBG_BLOCK_ID_TA18_BY4 = 0x2a, + DBG_BLOCK_ID_UNUSED24_BY4 = 0x2b, + DBG_BLOCK_ID_TD_BY4 = 0x2c, + DBG_BLOCK_ID_TD04_BY4 = 0x2d, + DBG_BLOCK_ID_TD08_BY4 = 0x2e, + DBG_BLOCK_ID_UNUSED28_BY4 = 0x2f, + DBG_BLOCK_ID_TD10_BY4 = 0x30, + DBG_BLOCK_ID_TD14_BY4 = 0x31, + DBG_BLOCK_ID_TD18_BY4 = 0x32, + DBG_BLOCK_ID_UNUSED32_BY4 = 0x33, + DBG_BLOCK_ID_LDS_BY4 = 0x34, + DBG_BLOCK_ID_LDS04_BY4 = 0x35, + DBG_BLOCK_ID_LDS08_BY4 = 0x36, + DBG_BLOCK_ID_UNUSED36_BY4 = 0x37, + DBG_BLOCK_ID_LDS10_BY4 = 0x38, + DBG_BLOCK_ID_LDS14_BY4 = 0x39, + DBG_BLOCK_ID_LDS18_BY4 = 0x3a, + DBG_BLOCK_ID_UNUSED40_BY4 = 0x3b, +} DebugBlockId_BY4; +typedef enum DebugBlockId_BY8 { + DBG_BLOCK_ID_RESERVED_BY8 = 0x0, + DBG_BLOCK_ID_CSC_BY8 = 0x1, + DBG_BLOCK_ID_SDMA0_BY8 = 0x2, + DBG_BLOCK_ID_CP0_BY8 = 0x3, + DBG_BLOCK_ID_SXM0_BY8 = 0x4, + DBG_BLOCK_ID_TCA_BY8 = 0x5, + DBG_BLOCK_ID_MCD_BY8 = 0x6, + DBG_BLOCK_ID_SQA_BY8 = 0x7, + DBG_BLOCK_ID_SQB_BY8 = 0x8, + DBG_BLOCK_ID_CB_BY8 = 0x9, + DBG_BLOCK_ID_SXS_BY8 = 0xa, + DBG_BLOCK_ID_DB_BY8 = 0xb, + DBG_BLOCK_ID_TCP_BY8 = 0xc, + DBG_BLOCK_ID_TCP8_BY8 = 0xd, + DBG_BLOCK_ID_TCP16_BY8 = 0xe, + DBG_BLOCK_ID_TCP_RESERVED0_BY8 = 0xf, + DBG_BLOCK_ID_TCC_BY8 = 0x10, + DBG_BLOCK_ID_SPS_BY8 = 0x11, + DBG_BLOCK_ID_TA_BY8 = 0x12, + DBG_BLOCK_ID_TA08_BY8 = 0x13, + DBG_BLOCK_ID_TA10_BY8 = 0x14, + DBG_BLOCK_ID_TA18_BY8 = 0x15, + DBG_BLOCK_ID_TD_BY8 = 0x16, + DBG_BLOCK_ID_TD08_BY8 = 0x17, + DBG_BLOCK_ID_TD10_BY8 = 0x18, + DBG_BLOCK_ID_TD18_BY8 = 0x19, + DBG_BLOCK_ID_LDS_BY8 = 0x1a, + DBG_BLOCK_ID_LDS08_BY8 = 0x1b, + DBG_BLOCK_ID_LDS10_BY8 = 0x1c, + DBG_BLOCK_ID_LDS18_BY8 = 0x1d, +} DebugBlockId_BY8; +typedef enum DebugBlockId_BY16 { + DBG_BLOCK_ID_RESERVED_BY16 = 0x0, + DBG_BLOCK_ID_SDMA0_BY16 = 0x1, + DBG_BLOCK_ID_SXM_BY16 = 0x2, + DBG_BLOCK_ID_MCD_BY16 = 0x3, + DBG_BLOCK_ID_SQB_BY16 = 0x4, + DBG_BLOCK_ID_SXS_BY16 = 0x5, + DBG_BLOCK_ID_TCP_BY16 = 0x6, + DBG_BLOCK_ID_TCP16_BY16 = 0x7, + DBG_BLOCK_ID_TCC_BY16 = 0x8, + DBG_BLOCK_ID_TA_BY16 = 0x9, + DBG_BLOCK_ID_TA10_BY16 = 0xa, + DBG_BLOCK_ID_TD_BY16 = 0xb, + DBG_BLOCK_ID_TD10_BY16 = 0xc, + DBG_BLOCK_ID_LDS_BY16 = 0xd, + DBG_BLOCK_ID_LDS10_BY16 = 0xe, +} DebugBlockId_BY16; +typedef enum SurfaceEndian { + ENDIAN_NONE = 0x0, + ENDIAN_8IN16 = 0x1, + ENDIAN_8IN32 = 0x2, + ENDIAN_8IN64 = 0x3, +} SurfaceEndian; +typedef enum ArrayMode { + ARRAY_LINEAR_GENERAL = 0x0, + ARRAY_LINEAR_ALIGNED = 0x1, + ARRAY_1D_TILED_THIN1 = 0x2, + ARRAY_1D_TILED_THICK = 0x3, + ARRAY_2D_TILED_THIN1 = 0x4, + ARRAY_PRT_TILED_THIN1 = 0x5, + ARRAY_PRT_2D_TILED_THIN1 = 0x6, + ARRAY_2D_TILED_THICK = 0x7, + ARRAY_2D_TILED_XTHICK = 0x8, + ARRAY_PRT_TILED_THICK = 0x9, + ARRAY_PRT_2D_TILED_THICK = 0xa, + ARRAY_PRT_3D_TILED_THIN1 = 0xb, + ARRAY_3D_TILED_THIN1 = 0xc, + ARRAY_3D_TILED_THICK = 0xd, + ARRAY_3D_TILED_XTHICK = 0xe, + ARRAY_PRT_3D_TILED_THICK = 0xf, +} ArrayMode; +typedef enum PipeTiling { + CONFIG_1_PIPE = 0x0, + CONFIG_2_PIPE = 0x1, + CONFIG_4_PIPE = 0x2, + CONFIG_8_PIPE = 0x3, +} PipeTiling; +typedef enum BankTiling { + CONFIG_4_BANK = 0x0, + CONFIG_8_BANK = 0x1, +} BankTiling; +typedef enum GroupInterleave { + CONFIG_256B_GROUP = 0x0, + CONFIG_512B_GROUP = 0x1, +} GroupInterleave; +typedef enum RowTiling { + CONFIG_1KB_ROW = 0x0, + CONFIG_2KB_ROW = 0x1, + CONFIG_4KB_ROW = 0x2, + CONFIG_8KB_ROW = 0x3, + CONFIG_1KB_ROW_OPT = 0x4, + CONFIG_2KB_ROW_OPT = 0x5, + CONFIG_4KB_ROW_OPT = 0x6, + CONFIG_8KB_ROW_OPT = 0x7, +} RowTiling; +typedef enum BankSwapBytes { + CONFIG_128B_SWAPS = 0x0, + CONFIG_256B_SWAPS = 0x1, + CONFIG_512B_SWAPS = 0x2, + CONFIG_1KB_SWAPS = 0x3, +} BankSwapBytes; +typedef enum SampleSplitBytes { + CONFIG_1KB_SPLIT = 0x0, + CONFIG_2KB_SPLIT = 0x1, + CONFIG_4KB_SPLIT = 0x2, + CONFIG_8KB_SPLIT = 0x3, +} SampleSplitBytes; +typedef enum NumPipes { + ADDR_CONFIG_1_PIPE = 0x0, + ADDR_CONFIG_2_PIPE = 0x1, + ADDR_CONFIG_4_PIPE = 0x2, + ADDR_CONFIG_8_PIPE = 0x3, +} NumPipes; +typedef enum PipeInterleaveSize { + ADDR_CONFIG_PIPE_INTERLEAVE_256B = 0x0, + ADDR_CONFIG_PIPE_INTERLEAVE_512B = 0x1, +} PipeInterleaveSize; +typedef enum BankInterleaveSize { + ADDR_CONFIG_BANK_INTERLEAVE_1 = 0x0, + ADDR_CONFIG_BANK_INTERLEAVE_2 = 0x1, + ADDR_CONFIG_BANK_INTERLEAVE_4 = 0x2, + ADDR_CONFIG_BANK_INTERLEAVE_8 = 0x3, +} BankInterleaveSize; +typedef enum NumShaderEngines { + ADDR_CONFIG_1_SHADER_ENGINE = 0x0, + ADDR_CONFIG_2_SHADER_ENGINE = 0x1, +} NumShaderEngines; +typedef enum ShaderEngineTileSize { + ADDR_CONFIG_SE_TILE_16 = 0x0, + ADDR_CONFIG_SE_TILE_32 = 0x1, +} ShaderEngineTileSize; +typedef enum NumGPUs { + ADDR_CONFIG_1_GPU = 0x0, + ADDR_CONFIG_2_GPU = 0x1, + ADDR_CONFIG_4_GPU = 0x2, +} NumGPUs; +typedef enum MultiGPUTileSize { + ADDR_CONFIG_GPU_TILE_16 = 0x0, + ADDR_CONFIG_GPU_TILE_32 = 0x1, + ADDR_CONFIG_GPU_TILE_64 = 0x2, + ADDR_CONFIG_GPU_TILE_128 = 0x3, +} MultiGPUTileSize; +typedef enum RowSize { + ADDR_CONFIG_1KB_ROW = 0x0, + ADDR_CONFIG_2KB_ROW = 0x1, + ADDR_CONFIG_4KB_ROW = 0x2, +} RowSize; +typedef enum NumLowerPipes { + ADDR_CONFIG_1_LOWER_PIPES = 0x0, + ADDR_CONFIG_2_LOWER_PIPES = 0x1, +} NumLowerPipes; +typedef enum ColorTransform { + DCC_CT_AUTO = 0x0, + DCC_CT_NONE = 0x1, + ABGR_TO_A_BG_G_RB = 0x2, + BGRA_TO_BG_G_RB_A = 0x3, +} ColorTransform; +typedef enum CompareRef { + REF_NEVER = 0x0, + REF_LESS = 0x1, + REF_EQUAL = 0x2, + REF_LEQUAL = 0x3, + REF_GREATER = 0x4, + REF_NOTEQUAL = 0x5, + REF_GEQUAL = 0x6, + REF_ALWAYS = 0x7, +} CompareRef; +typedef enum ReadSize { + READ_256_BITS = 0x0, + READ_512_BITS = 0x1, +} ReadSize; +typedef enum DepthFormat { + DEPTH_INVALID = 0x0, + DEPTH_16 = 0x1, + DEPTH_X8_24 = 0x2, + DEPTH_8_24 = 0x3, + DEPTH_X8_24_FLOAT = 0x4, + DEPTH_8_24_FLOAT = 0x5, + DEPTH_32_FLOAT = 0x6, + DEPTH_X24_8_32_FLOAT = 0x7, +} DepthFormat; +typedef enum ZFormat { + Z_INVALID = 0x0, + Z_16 = 0x1, + Z_24 = 0x2, + Z_32_FLOAT = 0x3, +} ZFormat; +typedef enum StencilFormat { + STENCIL_INVALID = 0x0, + STENCIL_8 = 0x1, +} StencilFormat; +typedef enum CmaskMode { + CMASK_CLEAR_NONE = 0x0, + CMASK_CLEAR_ONE = 0x1, + CMASK_CLEAR_ALL = 0x2, + CMASK_ANY_EXPANDED = 0x3, + CMASK_ALPHA0_FRAG1 = 0x4, + CMASK_ALPHA0_FRAG2 = 0x5, + CMASK_ALPHA0_FRAG4 = 0x6, + CMASK_ALPHA0_FRAGS = 0x7, + CMASK_ALPHA1_FRAG1 = 0x8, + CMASK_ALPHA1_FRAG2 = 0x9, + CMASK_ALPHA1_FRAG4 = 0xa, + CMASK_ALPHA1_FRAGS = 0xb, + CMASK_ALPHAX_FRAG1 = 0xc, + CMASK_ALPHAX_FRAG2 = 0xd, + CMASK_ALPHAX_FRAG4 = 0xe, + CMASK_ALPHAX_FRAGS = 0xf, +} CmaskMode; +typedef enum QuadExportFormat { + EXPORT_UNUSED = 0x0, + EXPORT_32_R = 0x1, + EXPORT_32_GR = 0x2, + EXPORT_32_AR = 0x3, + EXPORT_FP16_ABGR = 0x4, + EXPORT_UNSIGNED16_ABGR = 0x5, + EXPORT_SIGNED16_ABGR = 0x6, + EXPORT_32_ABGR = 0x7, +} QuadExportFormat; +typedef enum QuadExportFormatOld { + EXPORT_4P_32BPC_ABGR = 0x0, + EXPORT_4P_16BPC_ABGR = 0x1, + EXPORT_4P_32BPC_GR = 0x2, + EXPORT_4P_32BPC_AR = 0x3, + EXPORT_2P_32BPC_ABGR = 0x4, + EXPORT_8P_32BPC_R = 0x5, +} QuadExportFormatOld; +typedef enum ColorFormat { + COLOR_INVALID = 0x0, + COLOR_8 = 0x1, + COLOR_16 = 0x2, + COLOR_8_8 = 0x3, + COLOR_32 = 0x4, + COLOR_16_16 = 0x5, + COLOR_10_11_11 = 0x6, + COLOR_11_11_10 = 0x7, + COLOR_10_10_10_2 = 0x8, + COLOR_2_10_10_10 = 0x9, + COLOR_8_8_8_8 = 0xa, + COLOR_32_32 = 0xb, + COLOR_16_16_16_16 = 0xc, + COLOR_RESERVED_13 = 0xd, + COLOR_32_32_32_32 = 0xe, + COLOR_RESERVED_15 = 0xf, + COLOR_5_6_5 = 0x10, + COLOR_1_5_5_5 = 0x11, + COLOR_5_5_5_1 = 0x12, + COLOR_4_4_4_4 = 0x13, + COLOR_8_24 = 0x14, + COLOR_24_8 = 0x15, + COLOR_X24_8_32_FLOAT = 0x16, + COLOR_RESERVED_23 = 0x17, +} ColorFormat; +typedef enum SurfaceFormat { + FMT_INVALID = 0x0, + FMT_8 = 0x1, + FMT_16 = 0x2, + FMT_8_8 = 0x3, + FMT_32 = 0x4, + FMT_16_16 = 0x5, + FMT_10_11_11 = 0x6, + FMT_11_11_10 = 0x7, + FMT_10_10_10_2 = 0x8, + FMT_2_10_10_10 = 0x9, + FMT_8_8_8_8 = 0xa, + FMT_32_32 = 0xb, + FMT_16_16_16_16 = 0xc, + FMT_32_32_32 = 0xd, + FMT_32_32_32_32 = 0xe, + FMT_RESERVED_4 = 0xf, + FMT_5_6_5 = 0x10, + FMT_1_5_5_5 = 0x11, + FMT_5_5_5_1 = 0x12, + FMT_4_4_4_4 = 0x13, + FMT_8_24 = 0x14, + FMT_24_8 = 0x15, + FMT_X24_8_32_FLOAT = 0x16, + FMT_RESERVED_33 = 0x17, + FMT_11_11_10_FLOAT = 0x18, + FMT_16_FLOAT = 0x19, + FMT_32_FLOAT = 0x1a, + FMT_16_16_FLOAT = 0x1b, + FMT_8_24_FLOAT = 0x1c, + FMT_24_8_FLOAT = 0x1d, + FMT_32_32_FLOAT = 0x1e, + FMT_10_11_11_FLOAT = 0x1f, + FMT_16_16_16_16_FLOAT = 0x20, + FMT_3_3_2 = 0x21, + FMT_6_5_5 = 0x22, + FMT_32_32_32_32_FLOAT = 0x23, + FMT_RESERVED_36 = 0x24, + FMT_1 = 0x25, + FMT_1_REVERSED = 0x26, + FMT_GB_GR = 0x27, + FMT_BG_RG = 0x28, + FMT_32_AS_8 = 0x29, + FMT_32_AS_8_8 = 0x2a, + FMT_5_9_9_9_SHAREDEXP = 0x2b, + FMT_8_8_8 = 0x2c, + FMT_16_16_16 = 0x2d, + FMT_16_16_16_FLOAT = 0x2e, + FMT_4_4 = 0x2f, + FMT_32_32_32_FLOAT = 0x30, + FMT_BC1 = 0x31, + FMT_BC2 = 0x32, + FMT_BC3 = 0x33, + FMT_BC4 = 0x34, + FMT_BC5 = 0x35, + FMT_BC6 = 0x36, + FMT_BC7 = 0x37, + FMT_32_AS_32_32_32_32 = 0x38, + FMT_APC3 = 0x39, + FMT_APC4 = 0x3a, + FMT_APC5 = 0x3b, + FMT_APC6 = 0x3c, + FMT_APC7 = 0x3d, + FMT_CTX1 = 0x3e, + FMT_RESERVED_63 = 0x3f, +} SurfaceFormat; +typedef enum BUF_DATA_FORMAT { + BUF_DATA_FORMAT_INVALID = 0x0, + BUF_DATA_FORMAT_8 = 0x1, + BUF_DATA_FORMAT_16 = 0x2, + BUF_DATA_FORMAT_8_8 = 0x3, + BUF_DATA_FORMAT_32 = 0x4, + BUF_DATA_FORMAT_16_16 = 0x5, + BUF_DATA_FORMAT_10_11_11 = 0x6, + BUF_DATA_FORMAT_11_11_10 = 0x7, + BUF_DATA_FORMAT_10_10_10_2 = 0x8, + BUF_DATA_FORMAT_2_10_10_10 = 0x9, + BUF_DATA_FORMAT_8_8_8_8 = 0xa, + BUF_DATA_FORMAT_32_32 = 0xb, + BUF_DATA_FORMAT_16_16_16_16 = 0xc, + BUF_DATA_FORMAT_32_32_32 = 0xd, + BUF_DATA_FORMAT_32_32_32_32 = 0xe, + BUF_DATA_FORMAT_RESERVED_15 = 0xf, +} BUF_DATA_FORMAT; +typedef enum IMG_DATA_FORMAT { + IMG_DATA_FORMAT_INVALID = 0x0, + IMG_DATA_FORMAT_8 = 0x1, + IMG_DATA_FORMAT_16 = 0x2, + IMG_DATA_FORMAT_8_8 = 0x3, + IMG_DATA_FORMAT_32 = 0x4, + IMG_DATA_FORMAT_16_16 = 0x5, + IMG_DATA_FORMAT_10_11_11 = 0x6, + IMG_DATA_FORMAT_11_11_10 = 0x7, + IMG_DATA_FORMAT_10_10_10_2 = 0x8, + IMG_DATA_FORMAT_2_10_10_10 = 0x9, + IMG_DATA_FORMAT_8_8_8_8 = 0xa, + IMG_DATA_FORMAT_32_32 = 0xb, + IMG_DATA_FORMAT_16_16_16_16 = 0xc, + IMG_DATA_FORMAT_32_32_32 = 0xd, + IMG_DATA_FORMAT_32_32_32_32 = 0xe, + IMG_DATA_FORMAT_RESERVED_15 = 0xf, + IMG_DATA_FORMAT_5_6_5 = 0x10, + IMG_DATA_FORMAT_1_5_5_5 = 0x11, + IMG_DATA_FORMAT_5_5_5_1 = 0x12, + IMG_DATA_FORMAT_4_4_4_4 = 0x13, + IMG_DATA_FORMAT_8_24 = 0x14, + IMG_DATA_FORMAT_24_8 = 0x15, + IMG_DATA_FORMAT_X24_8_32 = 0x16, + IMG_DATA_FORMAT_RESERVED_23 = 0x17, + IMG_DATA_FORMAT_RESERVED_24 = 0x18, + IMG_DATA_FORMAT_RESERVED_25 = 0x19, + IMG_DATA_FORMAT_RESERVED_26 = 0x1a, + IMG_DATA_FORMAT_RESERVED_27 = 0x1b, + IMG_DATA_FORMAT_RESERVED_28 = 0x1c, + IMG_DATA_FORMAT_RESERVED_29 = 0x1d, + IMG_DATA_FORMAT_RESERVED_30 = 0x1e, + IMG_DATA_FORMAT_RESERVED_31 = 0x1f, + IMG_DATA_FORMAT_GB_GR = 0x20, + IMG_DATA_FORMAT_BG_RG = 0x21, + IMG_DATA_FORMAT_5_9_9_9 = 0x22, + IMG_DATA_FORMAT_BC1 = 0x23, + IMG_DATA_FORMAT_BC2 = 0x24, + IMG_DATA_FORMAT_BC3 = 0x25, + IMG_DATA_FORMAT_BC4 = 0x26, + IMG_DATA_FORMAT_BC5 = 0x27, + IMG_DATA_FORMAT_BC6 = 0x28, + IMG_DATA_FORMAT_BC7 = 0x29, + IMG_DATA_FORMAT_RESERVED_42 = 0x2a, + IMG_DATA_FORMAT_RESERVED_43 = 0x2b, + IMG_DATA_FORMAT_FMASK8_S2_F1 = 0x2c, + IMG_DATA_FORMAT_FMASK8_S4_F1 = 0x2d, + IMG_DATA_FORMAT_FMASK8_S8_F1 = 0x2e, + IMG_DATA_FORMAT_FMASK8_S2_F2 = 0x2f, + IMG_DATA_FORMAT_FMASK8_S4_F2 = 0x30, + IMG_DATA_FORMAT_FMASK8_S4_F4 = 0x31, + IMG_DATA_FORMAT_FMASK16_S16_F1 = 0x32, + IMG_DATA_FORMAT_FMASK16_S8_F2 = 0x33, + IMG_DATA_FORMAT_FMASK32_S16_F2 = 0x34, + IMG_DATA_FORMAT_FMASK32_S8_F4 = 0x35, + IMG_DATA_FORMAT_FMASK32_S8_F8 = 0x36, + IMG_DATA_FORMAT_FMASK64_S16_F4 = 0x37, + IMG_DATA_FORMAT_FMASK64_S16_F8 = 0x38, + IMG_DATA_FORMAT_4_4 = 0x39, + IMG_DATA_FORMAT_6_5_5 = 0x3a, + IMG_DATA_FORMAT_1 = 0x3b, + IMG_DATA_FORMAT_1_REVERSED = 0x3c, + IMG_DATA_FORMAT_32_AS_8 = 0x3d, + IMG_DATA_FORMAT_32_AS_8_8 = 0x3e, + IMG_DATA_FORMAT_32_AS_32_32_32_32 = 0x3f, +} IMG_DATA_FORMAT; +typedef enum BUF_NUM_FORMAT { + BUF_NUM_FORMAT_UNORM = 0x0, + BUF_NUM_FORMAT_SNORM = 0x1, + BUF_NUM_FORMAT_USCALED = 0x2, + BUF_NUM_FORMAT_SSCALED = 0x3, + BUF_NUM_FORMAT_UINT = 0x4, + BUF_NUM_FORMAT_SINT = 0x5, + BUF_NUM_FORMAT_RESERVED_6 = 0x6, + BUF_NUM_FORMAT_FLOAT = 0x7, +} BUF_NUM_FORMAT; +typedef enum IMG_NUM_FORMAT { + IMG_NUM_FORMAT_UNORM = 0x0, + IMG_NUM_FORMAT_SNORM = 0x1, + IMG_NUM_FORMAT_USCALED = 0x2, + IMG_NUM_FORMAT_SSCALED = 0x3, + IMG_NUM_FORMAT_UINT = 0x4, + IMG_NUM_FORMAT_SINT = 0x5, + IMG_NUM_FORMAT_RESERVED_6 = 0x6, + IMG_NUM_FORMAT_FLOAT = 0x7, + IMG_NUM_FORMAT_RESERVED_8 = 0x8, + IMG_NUM_FORMAT_SRGB = 0x9, + IMG_NUM_FORMAT_RESERVED_10 = 0xa, + IMG_NUM_FORMAT_RESERVED_11 = 0xb, + IMG_NUM_FORMAT_RESERVED_12 = 0xc, + IMG_NUM_FORMAT_RESERVED_13 = 0xd, + IMG_NUM_FORMAT_RESERVED_14 = 0xe, + IMG_NUM_FORMAT_RESERVED_15 = 0xf, +} IMG_NUM_FORMAT; +typedef enum TileType { + ARRAY_COLOR_TILE = 0x0, + ARRAY_DEPTH_TILE = 0x1, +} TileType; +typedef enum NonDispTilingOrder { + ADDR_SURF_MICRO_TILING_DISPLAY = 0x0, + ADDR_SURF_MICRO_TILING_NON_DISPLAY = 0x1, +} NonDispTilingOrder; +typedef enum MicroTileMode { + ADDR_SURF_DISPLAY_MICRO_TILING = 0x0, + ADDR_SURF_THIN_MICRO_TILING = 0x1, + ADDR_SURF_DEPTH_MICRO_TILING = 0x2, + ADDR_SURF_ROTATED_MICRO_TILING = 0x3, + ADDR_SURF_THICK_MICRO_TILING = 0x4, +} MicroTileMode; +typedef enum TileSplit { + ADDR_SURF_TILE_SPLIT_64B = 0x0, + ADDR_SURF_TILE_SPLIT_128B = 0x1, + ADDR_SURF_TILE_SPLIT_256B = 0x2, + ADDR_SURF_TILE_SPLIT_512B = 0x3, + ADDR_SURF_TILE_SPLIT_1KB = 0x4, + ADDR_SURF_TILE_SPLIT_2KB = 0x5, + ADDR_SURF_TILE_SPLIT_4KB = 0x6, +} TileSplit; +typedef enum SampleSplit { + ADDR_SURF_SAMPLE_SPLIT_1 = 0x0, + ADDR_SURF_SAMPLE_SPLIT_2 = 0x1, + ADDR_SURF_SAMPLE_SPLIT_4 = 0x2, + ADDR_SURF_SAMPLE_SPLIT_8 = 0x3, +} SampleSplit; +typedef enum PipeConfig { + ADDR_SURF_P2 = 0x0, + ADDR_SURF_P2_RESERVED0 = 0x1, + ADDR_SURF_P2_RESERVED1 = 0x2, + ADDR_SURF_P2_RESERVED2 = 0x3, + ADDR_SURF_P4_8x16 = 0x4, + ADDR_SURF_P4_16x16 = 0x5, + ADDR_SURF_P4_16x32 = 0x6, + ADDR_SURF_P4_32x32 = 0x7, + ADDR_SURF_P8_16x16_8x16 = 0x8, + ADDR_SURF_P8_16x32_8x16 = 0x9, + ADDR_SURF_P8_32x32_8x16 = 0xa, + ADDR_SURF_P8_16x32_16x16 = 0xb, + ADDR_SURF_P8_32x32_16x16 = 0xc, + ADDR_SURF_P8_32x32_16x32 = 0xd, + ADDR_SURF_P8_32x64_32x32 = 0xe, + ADDR_SURF_P8_RESERVED0 = 0xf, + ADDR_SURF_P16_32x32_8x16 = 0x10, + ADDR_SURF_P16_32x32_16x16 = 0x11, +} PipeConfig; +typedef enum NumBanks { + ADDR_SURF_2_BANK = 0x0, + ADDR_SURF_4_BANK = 0x1, + ADDR_SURF_8_BANK = 0x2, + ADDR_SURF_16_BANK = 0x3, +} NumBanks; +typedef enum BankWidth { + ADDR_SURF_BANK_WIDTH_1 = 0x0, + ADDR_SURF_BANK_WIDTH_2 = 0x1, + ADDR_SURF_BANK_WIDTH_4 = 0x2, + ADDR_SURF_BANK_WIDTH_8 = 0x3, +} BankWidth; +typedef enum BankHeight { + ADDR_SURF_BANK_HEIGHT_1 = 0x0, + ADDR_SURF_BANK_HEIGHT_2 = 0x1, + ADDR_SURF_BANK_HEIGHT_4 = 0x2, + ADDR_SURF_BANK_HEIGHT_8 = 0x3, +} BankHeight; +typedef enum BankWidthHeight { + ADDR_SURF_BANK_WH_1 = 0x0, + ADDR_SURF_BANK_WH_2 = 0x1, + ADDR_SURF_BANK_WH_4 = 0x2, + ADDR_SURF_BANK_WH_8 = 0x3, +} BankWidthHeight; +typedef enum MacroTileAspect { + ADDR_SURF_MACRO_ASPECT_1 = 0x0, + ADDR_SURF_MACRO_ASPECT_2 = 0x1, + ADDR_SURF_MACRO_ASPECT_4 = 0x2, + ADDR_SURF_MACRO_ASPECT_8 = 0x3, +} MacroTileAspect; +typedef enum GATCL1RequestType { + GATCL1_TYPE_NORMAL = 0x0, + GATCL1_TYPE_SHOOTDOWN = 0x1, + GATCL1_TYPE_BYPASS = 0x2, +} GATCL1RequestType; +typedef enum TCC_CACHE_POLICIES { + TCC_CACHE_POLICY_LRU = 0x0, + TCC_CACHE_POLICY_STREAM = 0x1, +} TCC_CACHE_POLICIES; +typedef enum MTYPE { + MTYPE_NC_NV = 0x0, + MTYPE_NC = 0x1, + MTYPE_CC = 0x2, + MTYPE_UC = 0x3, +} MTYPE; +typedef enum PERFMON_COUNTER_MODE { + PERFMON_COUNTER_MODE_ACCUM = 0x0, + PERFMON_COUNTER_MODE_ACTIVE_CYCLES = 0x1, + PERFMON_COUNTER_MODE_MAX = 0x2, + PERFMON_COUNTER_MODE_DIRTY = 0x3, + PERFMON_COUNTER_MODE_SAMPLE = 0x4, + PERFMON_COUNTER_MODE_CYCLES_SINCE_FIRST_EVENT = 0x5, + PERFMON_COUNTER_MODE_CYCLES_SINCE_LAST_EVENT = 0x6, + PERFMON_COUNTER_MODE_CYCLES_GE_HI = 0x7, + PERFMON_COUNTER_MODE_CYCLES_EQ_HI = 0x8, + PERFMON_COUNTER_MODE_INACTIVE_CYCLES = 0x9, + PERFMON_COUNTER_MODE_RESERVED = 0xf, +} PERFMON_COUNTER_MODE; +typedef enum PERFMON_SPM_MODE { + PERFMON_SPM_MODE_OFF = 0x0, + PERFMON_SPM_MODE_16BIT_CLAMP = 0x1, + PERFMON_SPM_MODE_16BIT_NO_CLAMP = 0x2, + PERFMON_SPM_MODE_32BIT_CLAMP = 0x3, + PERFMON_SPM_MODE_32BIT_NO_CLAMP = 0x4, + PERFMON_SPM_MODE_RESERVED_5 = 0x5, + PERFMON_SPM_MODE_RESERVED_6 = 0x6, + PERFMON_SPM_MODE_RESERVED_7 = 0x7, + PERFMON_SPM_MODE_TEST_MODE_0 = 0x8, + PERFMON_SPM_MODE_TEST_MODE_1 = 0x9, + PERFMON_SPM_MODE_TEST_MODE_2 = 0xa, +} PERFMON_SPM_MODE; +typedef enum SurfaceTiling { + ARRAY_LINEAR = 0x0, + ARRAY_TILED = 0x1, +} SurfaceTiling; +typedef enum SurfaceArray { + ARRAY_1D = 0x0, + ARRAY_2D = 0x1, + ARRAY_3D = 0x2, + ARRAY_3D_SLICE = 0x3, +} SurfaceArray; +typedef enum ColorArray { + ARRAY_2D_ALT_COLOR = 0x0, + ARRAY_2D_COLOR = 0x1, + ARRAY_3D_SLICE_COLOR = 0x3, +} ColorArray; +typedef enum DepthArray { + ARRAY_2D_ALT_DEPTH = 0x0, + ARRAY_2D_DEPTH = 0x1, +} DepthArray; +typedef enum ENUM_NUM_SIMD_PER_CU { + NUM_SIMD_PER_CU = 0x4, +} ENUM_NUM_SIMD_PER_CU; +typedef enum MEM_PWR_FORCE_CTRL { + NO_FORCE_REQUEST = 0x0, + FORCE_LIGHT_SLEEP_REQUEST = 0x1, + FORCE_DEEP_SLEEP_REQUEST = 0x2, + FORCE_SHUT_DOWN_REQUEST = 0x3, +} MEM_PWR_FORCE_CTRL; +typedef enum MEM_PWR_FORCE_CTRL2 { + NO_FORCE_REQ = 0x0, + FORCE_LIGHT_SLEEP_REQ = 0x1, +} MEM_PWR_FORCE_CTRL2; +typedef enum MEM_PWR_DIS_CTRL { + ENABLE_MEM_PWR_CTRL = 0x0, + DISABLE_MEM_PWR_CTRL = 0x1, +} MEM_PWR_DIS_CTRL; +typedef enum MEM_PWR_SEL_CTRL { + DYNAMIC_SHUT_DOWN_ENABLE = 0x0, + DYNAMIC_DEEP_SLEEP_ENABLE = 0x1, + DYNAMIC_LIGHT_SLEEP_ENABLE = 0x2, +} MEM_PWR_SEL_CTRL; +typedef enum MEM_PWR_SEL_CTRL2 { + DYNAMIC_DEEP_SLEEP_EN = 0x0, + DYNAMIC_LIGHT_SLEEP_EN = 0x1, +} MEM_PWR_SEL_CTRL2; + +#endif /* ACP_2_2_ENUM_H */ diff --git a/sound/soc/amd/include/acp_2_2_sh_mask.h b/sound/soc/amd/include/acp_2_2_sh_mask.h new file mode 100644 index 000000000000..32d2d4104309 --- /dev/null +++ b/sound/soc/amd/include/acp_2_2_sh_mask.h @@ -0,0 +1,2292 @@ +/* + * ACP_2_2 Register documentation + * + * Copyright (C) 2014 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN + * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef ACP_2_2_SH_MASK_H +#define ACP_2_2_SH_MASK_H + +#define ACP_DMA_CNTL_0__DMAChRst_MASK 0x1 +#define ACP_DMA_CNTL_0__DMAChRst__SHIFT 0x0 +#define ACP_DMA_CNTL_0__DMAChRun_MASK 0x2 +#define ACP_DMA_CNTL_0__DMAChRun__SHIFT 0x1 +#define ACP_DMA_CNTL_0__DMAChIOCEn_MASK 0x4 +#define ACP_DMA_CNTL_0__DMAChIOCEn__SHIFT 0x2 +#define ACP_DMA_CNTL_0__Circular_DMA_En_MASK 0x8 +#define ACP_DMA_CNTL_0__Circular_DMA_En__SHIFT 0x3 +#define ACP_DMA_CNTL_0__DMAChGracefulRstEn_MASK 0x10 +#define ACP_DMA_CNTL_0__DMAChGracefulRstEn__SHIFT 0x4 +#define ACP_DMA_CNTL_1__DMAChRst_MASK 0x1 +#define ACP_DMA_CNTL_1__DMAChRst__SHIFT 0x0 +#define ACP_DMA_CNTL_1__DMAChRun_MASK 0x2 +#define ACP_DMA_CNTL_1__DMAChRun__SHIFT 0x1 +#define ACP_DMA_CNTL_1__DMAChIOCEn_MASK 0x4 +#define ACP_DMA_CNTL_1__DMAChIOCEn__SHIFT 0x2 +#define ACP_DMA_CNTL_1__Circular_DMA_En_MASK 0x8 +#define ACP_DMA_CNTL_1__Circular_DMA_En__SHIFT 0x3 +#define ACP_DMA_CNTL_1__DMAChGracefulRstEn_MASK 0x10 +#define ACP_DMA_CNTL_1__DMAChGracefulRstEn__SHIFT 0x4 +#define ACP_DMA_CNTL_2__DMAChRst_MASK 0x1 +#define ACP_DMA_CNTL_2__DMAChRst__SHIFT 0x0 +#define ACP_DMA_CNTL_2__DMAChRun_MASK 0x2 +#define ACP_DMA_CNTL_2__DMAChRun__SHIFT 0x1 +#define ACP_DMA_CNTL_2__DMAChIOCEn_MASK 0x4 +#define ACP_DMA_CNTL_2__DMAChIOCEn__SHIFT 0x2 +#define ACP_DMA_CNTL_2__Circular_DMA_En_MASK 0x8 +#define ACP_DMA_CNTL_2__Circular_DMA_En__SHIFT 0x3 +#define ACP_DMA_CNTL_2__DMAChGracefulRstEn_MASK 0x10 +#define ACP_DMA_CNTL_2__DMAChGracefulRstEn__SHIFT 0x4 +#define ACP_DMA_CNTL_3__DMAChRst_MASK 0x1 +#define ACP_DMA_CNTL_3__DMAChRst__SHIFT 0x0 +#define ACP_DMA_CNTL_3__DMAChRun_MASK 0x2 +#define ACP_DMA_CNTL_3__DMAChRun__SHIFT 0x1 +#define ACP_DMA_CNTL_3__DMAChIOCEn_MASK 0x4 +#define ACP_DMA_CNTL_3__DMAChIOCEn__SHIFT 0x2 +#define ACP_DMA_CNTL_3__Circular_DMA_En_MASK 0x8 +#define ACP_DMA_CNTL_3__Circular_DMA_En__SHIFT 0x3 +#define ACP_DMA_CNTL_3__DMAChGracefulRstEn_MASK 0x10 +#define ACP_DMA_CNTL_3__DMAChGracefulRstEn__SHIFT 0x4 +#define ACP_DMA_CNTL_4__DMAChRst_MASK 0x1 +#define ACP_DMA_CNTL_4__DMAChRst__SHIFT 0x0 +#define ACP_DMA_CNTL_4__DMAChRun_MASK 0x2 +#define ACP_DMA_CNTL_4__DMAChRun__SHIFT 0x1 +#define ACP_DMA_CNTL_4__DMAChIOCEn_MASK 0x4 +#define ACP_DMA_CNTL_4__DMAChIOCEn__SHIFT 0x2 +#define ACP_DMA_CNTL_4__Circular_DMA_En_MASK 0x8 +#define ACP_DMA_CNTL_4__Circular_DMA_En__SHIFT 0x3 +#define ACP_DMA_CNTL_4__DMAChGracefulRstEn_MASK 0x10 +#define ACP_DMA_CNTL_4__DMAChGracefulRstEn__SHIFT 0x4 +#define ACP_DMA_CNTL_5__DMAChRst_MASK 0x1 +#define ACP_DMA_CNTL_5__DMAChRst__SHIFT 0x0 +#define ACP_DMA_CNTL_5__DMAChRun_MASK 0x2 +#define ACP_DMA_CNTL_5__DMAChRun__SHIFT 0x1 +#define ACP_DMA_CNTL_5__DMAChIOCEn_MASK 0x4 +#define ACP_DMA_CNTL_5__DMAChIOCEn__SHIFT 0x2 +#define ACP_DMA_CNTL_5__Circular_DMA_En_MASK 0x8 +#define ACP_DMA_CNTL_5__Circular_DMA_En__SHIFT 0x3 +#define ACP_DMA_CNTL_5__DMAChGracefulRstEn_MASK 0x10 +#define ACP_DMA_CNTL_5__DMAChGracefulRstEn__SHIFT 0x4 +#define ACP_DMA_CNTL_6__DMAChRst_MASK 0x1 +#define ACP_DMA_CNTL_6__DMAChRst__SHIFT 0x0 +#define ACP_DMA_CNTL_6__DMAChRun_MASK 0x2 +#define ACP_DMA_CNTL_6__DMAChRun__SHIFT 0x1 +#define ACP_DMA_CNTL_6__DMAChIOCEn_MASK 0x4 +#define ACP_DMA_CNTL_6__DMAChIOCEn__SHIFT 0x2 +#define ACP_DMA_CNTL_6__Circular_DMA_En_MASK 0x8 +#define ACP_DMA_CNTL_6__Circular_DMA_En__SHIFT 0x3 +#define ACP_DMA_CNTL_6__DMAChGracefulRstEn_MASK 0x10 +#define ACP_DMA_CNTL_6__DMAChGracefulRstEn__SHIFT 0x4 +#define ACP_DMA_CNTL_7__DMAChRst_MASK 0x1 +#define ACP_DMA_CNTL_7__DMAChRst__SHIFT 0x0 +#define ACP_DMA_CNTL_7__DMAChRun_MASK 0x2 +#define ACP_DMA_CNTL_7__DMAChRun__SHIFT 0x1 +#define ACP_DMA_CNTL_7__DMAChIOCEn_MASK 0x4 +#define ACP_DMA_CNTL_7__DMAChIOCEn__SHIFT 0x2 +#define ACP_DMA_CNTL_7__Circular_DMA_En_MASK 0x8 +#define ACP_DMA_CNTL_7__Circular_DMA_En__SHIFT 0x3 +#define ACP_DMA_CNTL_7__DMAChGracefulRstEn_MASK 0x10 +#define ACP_DMA_CNTL_7__DMAChGracefulRstEn__SHIFT 0x4 +#define ACP_DMA_CNTL_8__DMAChRst_MASK 0x1 +#define ACP_DMA_CNTL_8__DMAChRst__SHIFT 0x0 +#define ACP_DMA_CNTL_8__DMAChRun_MASK 0x2 +#define ACP_DMA_CNTL_8__DMAChRun__SHIFT 0x1 +#define ACP_DMA_CNTL_8__DMAChIOCEn_MASK 0x4 +#define ACP_DMA_CNTL_8__DMAChIOCEn__SHIFT 0x2 +#define ACP_DMA_CNTL_8__Circular_DMA_En_MASK 0x8 +#define ACP_DMA_CNTL_8__Circular_DMA_En__SHIFT 0x3 +#define ACP_DMA_CNTL_8__DMAChGracefulRstEn_MASK 0x10 +#define ACP_DMA_CNTL_8__DMAChGracefulRstEn__SHIFT 0x4 +#define ACP_DMA_CNTL_9__DMAChRst_MASK 0x1 +#define ACP_DMA_CNTL_9__DMAChRst__SHIFT 0x0 +#define ACP_DMA_CNTL_9__DMAChRun_MASK 0x2 +#define ACP_DMA_CNTL_9__DMAChRun__SHIFT 0x1 +#define ACP_DMA_CNTL_9__DMAChIOCEn_MASK 0x4 +#define ACP_DMA_CNTL_9__DMAChIOCEn__SHIFT 0x2 +#define ACP_DMA_CNTL_9__Circular_DMA_En_MASK 0x8 +#define ACP_DMA_CNTL_9__Circular_DMA_En__SHIFT 0x3 +#define ACP_DMA_CNTL_9__DMAChGracefulRstEn_MASK 0x10 +#define ACP_DMA_CNTL_9__DMAChGracefulRstEn__SHIFT 0x4 +#define ACP_DMA_CNTL_10__DMAChRst_MASK 0x1 +#define ACP_DMA_CNTL_10__DMAChRst__SHIFT 0x0 +#define ACP_DMA_CNTL_10__DMAChRun_MASK 0x2 +#define ACP_DMA_CNTL_10__DMAChRun__SHIFT 0x1 +#define ACP_DMA_CNTL_10__DMAChIOCEn_MASK 0x4 +#define ACP_DMA_CNTL_10__DMAChIOCEn__SHIFT 0x2 +#define ACP_DMA_CNTL_10__Circular_DMA_En_MASK 0x8 +#define ACP_DMA_CNTL_10__Circular_DMA_En__SHIFT 0x3 +#define ACP_DMA_CNTL_10__DMAChGracefulRstEn_MASK 0x10 +#define ACP_DMA_CNTL_10__DMAChGracefulRstEn__SHIFT 0x4 +#define ACP_DMA_CNTL_11__DMAChRst_MASK 0x1 +#define ACP_DMA_CNTL_11__DMAChRst__SHIFT 0x0 +#define ACP_DMA_CNTL_11__DMAChRun_MASK 0x2 +#define ACP_DMA_CNTL_11__DMAChRun__SHIFT 0x1 +#define ACP_DMA_CNTL_11__DMAChIOCEn_MASK 0x4 +#define ACP_DMA_CNTL_11__DMAChIOCEn__SHIFT 0x2 +#define ACP_DMA_CNTL_11__Circular_DMA_En_MASK 0x8 +#define ACP_DMA_CNTL_11__Circular_DMA_En__SHIFT 0x3 +#define ACP_DMA_CNTL_11__DMAChGracefulRstEn_MASK 0x10 +#define ACP_DMA_CNTL_11__DMAChGracefulRstEn__SHIFT 0x4 +#define ACP_DMA_CNTL_12__DMAChRst_MASK 0x1 +#define ACP_DMA_CNTL_12__DMAChRst__SHIFT 0x0 +#define ACP_DMA_CNTL_12__DMAChRun_MASK 0x2 +#define ACP_DMA_CNTL_12__DMAChRun__SHIFT 0x1 +#define ACP_DMA_CNTL_12__DMAChIOCEn_MASK 0x4 +#define ACP_DMA_CNTL_12__DMAChIOCEn__SHIFT 0x2 +#define ACP_DMA_CNTL_12__Circular_DMA_En_MASK 0x8 +#define ACP_DMA_CNTL_12__Circular_DMA_En__SHIFT 0x3 +#define ACP_DMA_CNTL_12__DMAChGracefulRstEn_MASK 0x10 +#define ACP_DMA_CNTL_12__DMAChGracefulRstEn__SHIFT 0x4 +#define ACP_DMA_CNTL_13__DMAChRst_MASK 0x1 +#define ACP_DMA_CNTL_13__DMAChRst__SHIFT 0x0 +#define ACP_DMA_CNTL_13__DMAChRun_MASK 0x2 +#define ACP_DMA_CNTL_13__DMAChRun__SHIFT 0x1 +#define ACP_DMA_CNTL_13__DMAChIOCEn_MASK 0x4 +#define ACP_DMA_CNTL_13__DMAChIOCEn__SHIFT 0x2 +#define ACP_DMA_CNTL_13__Circular_DMA_En_MASK 0x8 +#define ACP_DMA_CNTL_13__Circular_DMA_En__SHIFT 0x3 +#define ACP_DMA_CNTL_13__DMAChGracefulRstEn_MASK 0x10 +#define ACP_DMA_CNTL_13__DMAChGracefulRstEn__SHIFT 0x4 +#define ACP_DMA_CNTL_14__DMAChRst_MASK 0x1 +#define ACP_DMA_CNTL_14__DMAChRst__SHIFT 0x0 +#define ACP_DMA_CNTL_14__DMAChRun_MASK 0x2 +#define ACP_DMA_CNTL_14__DMAChRun__SHIFT 0x1 +#define ACP_DMA_CNTL_14__DMAChIOCEn_MASK 0x4 +#define ACP_DMA_CNTL_14__DMAChIOCEn__SHIFT 0x2 +#define ACP_DMA_CNTL_14__Circular_DMA_En_MASK 0x8 +#define ACP_DMA_CNTL_14__Circular_DMA_En__SHIFT 0x3 +#define ACP_DMA_CNTL_14__DMAChGracefulRstEn_MASK 0x10 +#define ACP_DMA_CNTL_14__DMAChGracefulRstEn__SHIFT 0x4 +#define ACP_DMA_CNTL_15__DMAChRst_MASK 0x1 +#define ACP_DMA_CNTL_15__DMAChRst__SHIFT 0x0 +#define ACP_DMA_CNTL_15__DMAChRun_MASK 0x2 +#define ACP_DMA_CNTL_15__DMAChRun__SHIFT 0x1 +#define ACP_DMA_CNTL_15__DMAChIOCEn_MASK 0x4 +#define ACP_DMA_CNTL_15__DMAChIOCEn__SHIFT 0x2 +#define ACP_DMA_CNTL_15__Circular_DMA_En_MASK 0x8 +#define ACP_DMA_CNTL_15__Circular_DMA_En__SHIFT 0x3 +#define ACP_DMA_CNTL_15__DMAChGracefulRstEn_MASK 0x10 +#define ACP_DMA_CNTL_15__DMAChGracefulRstEn__SHIFT 0x4 +#define ACP_DMA_DSCR_STRT_IDX_0__DMAChDscrStrtIdx_MASK 0x3ff +#define ACP_DMA_DSCR_STRT_IDX_0__DMAChDscrStrtIdx__SHIFT 0x0 +#define ACP_DMA_DSCR_STRT_IDX_1__DMAChDscrStrtIdx_MASK 0x3ff +#define ACP_DMA_DSCR_STRT_IDX_1__DMAChDscrStrtIdx__SHIFT 0x0 +#define ACP_DMA_DSCR_STRT_IDX_2__DMAChDscrStrtIdx_MASK 0x3ff +#define ACP_DMA_DSCR_STRT_IDX_2__DMAChDscrStrtIdx__SHIFT 0x0 +#define ACP_DMA_DSCR_STRT_IDX_3__DMAChDscrStrtIdx_MASK 0x3ff +#define ACP_DMA_DSCR_STRT_IDX_3__DMAChDscrStrtIdx__SHIFT 0x0 +#define ACP_DMA_DSCR_STRT_IDX_4__DMAChDscrStrtIdx_MASK 0x3ff +#define ACP_DMA_DSCR_STRT_IDX_4__DMAChDscrStrtIdx__SHIFT 0x0 +#define ACP_DMA_DSCR_STRT_IDX_5__DMAChDscrStrtIdx_MASK 0x3ff +#define ACP_DMA_DSCR_STRT_IDX_5__DMAChDscrStrtIdx__SHIFT 0x0 +#define ACP_DMA_DSCR_STRT_IDX_6__DMAChDscrStrtIdx_MASK 0x3ff +#define ACP_DMA_DSCR_STRT_IDX_6__DMAChDscrStrtIdx__SHIFT 0x0 +#define ACP_DMA_DSCR_STRT_IDX_7__DMAChDscrStrtIdx_MASK 0x3ff +#define ACP_DMA_DSCR_STRT_IDX_7__DMAChDscrStrtIdx__SHIFT 0x0 +#define ACP_DMA_DSCR_STRT_IDX_8__DMAChDscrStrtIdx_MASK 0x3ff +#define ACP_DMA_DSCR_STRT_IDX_8__DMAChDscrStrtIdx__SHIFT 0x0 +#define ACP_DMA_DSCR_STRT_IDX_9__DMAChDscrStrtIdx_MASK 0x3ff +#define ACP_DMA_DSCR_STRT_IDX_9__DMAChDscrStrtIdx__SHIFT 0x0 +#define ACP_DMA_DSCR_STRT_IDX_10__DMAChDscrStrtIdx_MASK 0x3ff +#define ACP_DMA_DSCR_STRT_IDX_10__DMAChDscrStrtIdx__SHIFT 0x0 +#define ACP_DMA_DSCR_STRT_IDX_11__DMAChDscrStrtIdx_MASK 0x3ff +#define ACP_DMA_DSCR_STRT_IDX_11__DMAChDscrStrtIdx__SHIFT 0x0 +#define ACP_DMA_DSCR_STRT_IDX_12__DMAChDscrStrtIdx_MASK 0x3ff +#define ACP_DMA_DSCR_STRT_IDX_12__DMAChDscrStrtIdx__SHIFT 0x0 +#define ACP_DMA_DSCR_STRT_IDX_13__DMAChDscrStrtIdx_MASK 0x3ff +#define ACP_DMA_DSCR_STRT_IDX_13__DMAChDscrStrtIdx__SHIFT 0x0 +#define ACP_DMA_DSCR_STRT_IDX_14__DMAChDscrStrtIdx_MASK 0x3ff +#define ACP_DMA_DSCR_STRT_IDX_14__DMAChDscrStrtIdx__SHIFT 0x0 +#define ACP_DMA_DSCR_STRT_IDX_15__DMAChDscrStrtIdx_MASK 0x3ff +#define ACP_DMA_DSCR_STRT_IDX_15__DMAChDscrStrtIdx__SHIFT 0x0 +#define ACP_DMA_DSCR_CNT_0__DMAChDscrCnt_MASK 0x3ff +#define ACP_DMA_DSCR_CNT_0__DMAChDscrCnt__SHIFT 0x0 +#define ACP_DMA_DSCR_CNT_1__DMAChDscrCnt_MASK 0x3ff +#define ACP_DMA_DSCR_CNT_1__DMAChDscrCnt__SHIFT 0x0 +#define ACP_DMA_DSCR_CNT_2__DMAChDscrCnt_MASK 0x3ff +#define ACP_DMA_DSCR_CNT_2__DMAChDscrCnt__SHIFT 0x0 +#define ACP_DMA_DSCR_CNT_3__DMAChDscrCnt_MASK 0x3ff +#define ACP_DMA_DSCR_CNT_3__DMAChDscrCnt__SHIFT 0x0 +#define ACP_DMA_DSCR_CNT_4__DMAChDscrCnt_MASK 0x3ff +#define ACP_DMA_DSCR_CNT_4__DMAChDscrCnt__SHIFT 0x0 +#define ACP_DMA_DSCR_CNT_5__DMAChDscrCnt_MASK 0x3ff +#define ACP_DMA_DSCR_CNT_5__DMAChDscrCnt__SHIFT 0x0 +#define ACP_DMA_DSCR_CNT_6__DMAChDscrCnt_MASK 0x3ff +#define ACP_DMA_DSCR_CNT_6__DMAChDscrCnt__SHIFT 0x0 +#define ACP_DMA_DSCR_CNT_7__DMAChDscrCnt_MASK 0x3ff +#define ACP_DMA_DSCR_CNT_7__DMAChDscrCnt__SHIFT 0x0 +#define ACP_DMA_DSCR_CNT_8__DMAChDscrCnt_MASK 0x3ff +#define ACP_DMA_DSCR_CNT_8__DMAChDscrCnt__SHIFT 0x0 +#define ACP_DMA_DSCR_CNT_9__DMAChDscrCnt_MASK 0x3ff +#define ACP_DMA_DSCR_CNT_9__DMAChDscrCnt__SHIFT 0x0 +#define ACP_DMA_DSCR_CNT_10__DMAChDscrCnt_MASK 0x3ff +#define ACP_DMA_DSCR_CNT_10__DMAChDscrCnt__SHIFT 0x0 +#define ACP_DMA_DSCR_CNT_11__DMAChDscrCnt_MASK 0x3ff +#define ACP_DMA_DSCR_CNT_11__DMAChDscrCnt__SHIFT 0x0 +#define ACP_DMA_DSCR_CNT_12__DMAChDscrCnt_MASK 0x3ff +#define ACP_DMA_DSCR_CNT_12__DMAChDscrCnt__SHIFT 0x0 +#define ACP_DMA_DSCR_CNT_13__DMAChDscrCnt_MASK 0x3ff +#define ACP_DMA_DSCR_CNT_13__DMAChDscrCnt__SHIFT 0x0 +#define ACP_DMA_DSCR_CNT_14__DMAChDscrCnt_MASK 0x3ff +#define ACP_DMA_DSCR_CNT_14__DMAChDscrCnt__SHIFT 0x0 +#define ACP_DMA_DSCR_CNT_15__DMAChDscrCnt_MASK 0x3ff +#define ACP_DMA_DSCR_CNT_15__DMAChDscrCnt__SHIFT 0x0 +#define ACP_DMA_PRIO_0__DMAChPrioLvl_MASK 0x1 +#define ACP_DMA_PRIO_0__DMAChPrioLvl__SHIFT 0x0 +#define ACP_DMA_PRIO_1__DMAChPrioLvl_MASK 0x1 +#define ACP_DMA_PRIO_1__DMAChPrioLvl__SHIFT 0x0 +#define ACP_DMA_PRIO_2__DMAChPrioLvl_MASK 0x1 +#define ACP_DMA_PRIO_2__DMAChPrioLvl__SHIFT 0x0 +#define ACP_DMA_PRIO_3__DMAChPrioLvl_MASK 0x1 +#define ACP_DMA_PRIO_3__DMAChPrioLvl__SHIFT 0x0 +#define ACP_DMA_PRIO_4__DMAChPrioLvl_MASK 0x1 +#define ACP_DMA_PRIO_4__DMAChPrioLvl__SHIFT 0x0 +#define ACP_DMA_PRIO_5__DMAChPrioLvl_MASK 0x1 +#define ACP_DMA_PRIO_5__DMAChPrioLvl__SHIFT 0x0 +#define ACP_DMA_PRIO_6__DMAChPrioLvl_MASK 0x1 +#define ACP_DMA_PRIO_6__DMAChPrioLvl__SHIFT 0x0 +#define ACP_DMA_PRIO_7__DMAChPrioLvl_MASK 0x1 +#define ACP_DMA_PRIO_7__DMAChPrioLvl__SHIFT 0x0 +#define ACP_DMA_PRIO_8__DMAChPrioLvl_MASK 0x1 +#define ACP_DMA_PRIO_8__DMAChPrioLvl__SHIFT 0x0 +#define ACP_DMA_PRIO_9__DMAChPrioLvl_MASK 0x1 +#define ACP_DMA_PRIO_9__DMAChPrioLvl__SHIFT 0x0 +#define ACP_DMA_PRIO_10__DMAChPrioLvl_MASK 0x1 +#define ACP_DMA_PRIO_10__DMAChPrioLvl__SHIFT 0x0 +#define ACP_DMA_PRIO_11__DMAChPrioLvl_MASK 0x1 +#define ACP_DMA_PRIO_11__DMAChPrioLvl__SHIFT 0x0 +#define ACP_DMA_PRIO_12__DMAChPrioLvl_MASK 0x1 +#define ACP_DMA_PRIO_12__DMAChPrioLvl__SHIFT 0x0 +#define ACP_DMA_PRIO_13__DMAChPrioLvl_MASK 0x1 +#define ACP_DMA_PRIO_13__DMAChPrioLvl__SHIFT 0x0 +#define ACP_DMA_PRIO_14__DMAChPrioLvl_MASK 0x1 +#define ACP_DMA_PRIO_14__DMAChPrioLvl__SHIFT 0x0 +#define ACP_DMA_PRIO_15__DMAChPrioLvl_MASK 0x1 +#define ACP_DMA_PRIO_15__DMAChPrioLvl__SHIFT 0x0 +#define ACP_DMA_CUR_DSCR_0__DMAChCurDscrIdx_MASK 0x3ff +#define ACP_DMA_CUR_DSCR_0__DMAChCurDscrIdx__SHIFT 0x0 +#define ACP_DMA_CUR_DSCR_1__DMAChCurDscrIdx_MASK 0x3ff +#define ACP_DMA_CUR_DSCR_1__DMAChCurDscrIdx__SHIFT 0x0 +#define ACP_DMA_CUR_DSCR_2__DMAChCurDscrIdx_MASK 0x3ff +#define ACP_DMA_CUR_DSCR_2__DMAChCurDscrIdx__SHIFT 0x0 +#define ACP_DMA_CUR_DSCR_3__DMAChCurDscrIdx_MASK 0x3ff +#define ACP_DMA_CUR_DSCR_3__DMAChCurDscrIdx__SHIFT 0x0 +#define ACP_DMA_CUR_DSCR_4__DMAChCurDscrIdx_MASK 0x3ff +#define ACP_DMA_CUR_DSCR_4__DMAChCurDscrIdx__SHIFT 0x0 +#define ACP_DMA_CUR_DSCR_5__DMAChCurDscrIdx_MASK 0x3ff +#define ACP_DMA_CUR_DSCR_5__DMAChCurDscrIdx__SHIFT 0x0 +#define ACP_DMA_CUR_DSCR_6__DMAChCurDscrIdx_MASK 0x3ff +#define ACP_DMA_CUR_DSCR_6__DMAChCurDscrIdx__SHIFT 0x0 +#define ACP_DMA_CUR_DSCR_7__DMAChCurDscrIdx_MASK 0x3ff +#define ACP_DMA_CUR_DSCR_7__DMAChCurDscrIdx__SHIFT 0x0 +#define ACP_DMA_CUR_DSCR_8__DMAChCurDscrIdx_MASK 0x3ff +#define ACP_DMA_CUR_DSCR_8__DMAChCurDscrIdx__SHIFT 0x0 +#define ACP_DMA_CUR_DSCR_9__DMAChCurDscrIdx_MASK 0x3ff +#define ACP_DMA_CUR_DSCR_9__DMAChCurDscrIdx__SHIFT 0x0 +#define ACP_DMA_CUR_DSCR_10__DMAChCurDscrIdx_MASK 0x3ff +#define ACP_DMA_CUR_DSCR_10__DMAChCurDscrIdx__SHIFT 0x0 +#define ACP_DMA_CUR_DSCR_11__DMAChCurDscrIdx_MASK 0x3ff +#define ACP_DMA_CUR_DSCR_11__DMAChCurDscrIdx__SHIFT 0x0 +#define ACP_DMA_CUR_DSCR_12__DMAChCurDscrIdx_MASK 0x3ff +#define ACP_DMA_CUR_DSCR_12__DMAChCurDscrIdx__SHIFT 0x0 +#define ACP_DMA_CUR_DSCR_13__DMAChCurDscrIdx_MASK 0x3ff +#define ACP_DMA_CUR_DSCR_13__DMAChCurDscrIdx__SHIFT 0x0 +#define ACP_DMA_CUR_DSCR_14__DMAChCurDscrIdx_MASK 0x3ff +#define ACP_DMA_CUR_DSCR_14__DMAChCurDscrIdx__SHIFT 0x0 +#define ACP_DMA_CUR_DSCR_15__DMAChCurDscrIdx_MASK 0x3ff +#define ACP_DMA_CUR_DSCR_15__DMAChCurDscrIdx__SHIFT 0x0 +#define ACP_DMA_CUR_TRANS_CNT_0__DMAChCurTransCnt_MASK 0x1ffff +#define ACP_DMA_CUR_TRANS_CNT_0__DMAChCurTransCnt__SHIFT 0x0 +#define ACP_DMA_CUR_TRANS_CNT_1__DMAChCurTransCnt_MASK 0x1ffff +#define ACP_DMA_CUR_TRANS_CNT_1__DMAChCurTransCnt__SHIFT 0x0 +#define ACP_DMA_CUR_TRANS_CNT_2__DMAChCurTransCnt_MASK 0x1ffff +#define ACP_DMA_CUR_TRANS_CNT_2__DMAChCurTransCnt__SHIFT 0x0 +#define ACP_DMA_CUR_TRANS_CNT_3__DMAChCurTransCnt_MASK 0x1ffff +#define ACP_DMA_CUR_TRANS_CNT_3__DMAChCurTransCnt__SHIFT 0x0 +#define ACP_DMA_CUR_TRANS_CNT_4__DMAChCurTransCnt_MASK 0x1ffff +#define ACP_DMA_CUR_TRANS_CNT_4__DMAChCurTransCnt__SHIFT 0x0 +#define ACP_DMA_CUR_TRANS_CNT_5__DMAChCurTransCnt_MASK 0x1ffff +#define ACP_DMA_CUR_TRANS_CNT_5__DMAChCurTransCnt__SHIFT 0x0 +#define ACP_DMA_CUR_TRANS_CNT_6__DMAChCurTransCnt_MASK 0x1ffff +#define ACP_DMA_CUR_TRANS_CNT_6__DMAChCurTransCnt__SHIFT 0x0 +#define ACP_DMA_CUR_TRANS_CNT_7__DMAChCurTransCnt_MASK 0x1ffff +#define ACP_DMA_CUR_TRANS_CNT_7__DMAChCurTransCnt__SHIFT 0x0 +#define ACP_DMA_CUR_TRANS_CNT_8__DMAChCurTransCnt_MASK 0x1ffff +#define ACP_DMA_CUR_TRANS_CNT_8__DMAChCurTransCnt__SHIFT 0x0 +#define ACP_DMA_CUR_TRANS_CNT_9__DMAChCurTransCnt_MASK 0x1ffff +#define ACP_DMA_CUR_TRANS_CNT_9__DMAChCurTransCnt__SHIFT 0x0 +#define ACP_DMA_CUR_TRANS_CNT_10__DMAChCurTransCnt_MASK 0x1ffff +#define ACP_DMA_CUR_TRANS_CNT_10__DMAChCurTransCnt__SHIFT 0x0 +#define ACP_DMA_CUR_TRANS_CNT_11__DMAChCurTransCnt_MASK 0x1ffff +#define ACP_DMA_CUR_TRANS_CNT_11__DMAChCurTransCnt__SHIFT 0x0 +#define ACP_DMA_CUR_TRANS_CNT_12__DMAChCurTransCnt_MASK 0x1ffff +#define ACP_DMA_CUR_TRANS_CNT_12__DMAChCurTransCnt__SHIFT 0x0 +#define ACP_DMA_CUR_TRANS_CNT_13__DMAChCurTransCnt_MASK 0x1ffff +#define ACP_DMA_CUR_TRANS_CNT_13__DMAChCurTransCnt__SHIFT 0x0 +#define ACP_DMA_CUR_TRANS_CNT_14__DMAChCurTransCnt_MASK 0x1ffff +#define ACP_DMA_CUR_TRANS_CNT_14__DMAChCurTransCnt__SHIFT 0x0 +#define ACP_DMA_CUR_TRANS_CNT_15__DMAChCurTransCnt_MASK 0x1ffff +#define ACP_DMA_CUR_TRANS_CNT_15__DMAChCurTransCnt__SHIFT 0x0 +#define ACP_DMA_ERR_STS_0__DMAChTermErr_MASK 0x1 +#define ACP_DMA_ERR_STS_0__DMAChTermErr__SHIFT 0x0 +#define ACP_DMA_ERR_STS_0__DMAChErrCode_MASK 0x1e +#define ACP_DMA_ERR_STS_0__DMAChErrCode__SHIFT 0x1 +#define ACP_DMA_ERR_STS_1__DMAChTermErr_MASK 0x1 +#define ACP_DMA_ERR_STS_1__DMAChTermErr__SHIFT 0x0 +#define ACP_DMA_ERR_STS_1__DMAChErrCode_MASK 0x1e +#define ACP_DMA_ERR_STS_1__DMAChErrCode__SHIFT 0x1 +#define ACP_DMA_ERR_STS_2__DMAChTermErr_MASK 0x1 +#define ACP_DMA_ERR_STS_2__DMAChTermErr__SHIFT 0x0 +#define ACP_DMA_ERR_STS_2__DMAChErrCode_MASK 0x1e +#define ACP_DMA_ERR_STS_2__DMAChErrCode__SHIFT 0x1 +#define ACP_DMA_ERR_STS_3__DMAChTermErr_MASK 0x1 +#define ACP_DMA_ERR_STS_3__DMAChTermErr__SHIFT 0x0 +#define ACP_DMA_ERR_STS_3__DMAChErrCode_MASK 0x1e +#define ACP_DMA_ERR_STS_3__DMAChErrCode__SHIFT 0x1 +#define ACP_DMA_ERR_STS_4__DMAChTermErr_MASK 0x1 +#define ACP_DMA_ERR_STS_4__DMAChTermErr__SHIFT 0x0 +#define ACP_DMA_ERR_STS_4__DMAChErrCode_MASK 0x1e +#define ACP_DMA_ERR_STS_4__DMAChErrCode__SHIFT 0x1 +#define ACP_DMA_ERR_STS_5__DMAChTermErr_MASK 0x1 +#define ACP_DMA_ERR_STS_5__DMAChTermErr__SHIFT 0x0 +#define ACP_DMA_ERR_STS_5__DMAChErrCode_MASK 0x1e +#define ACP_DMA_ERR_STS_5__DMAChErrCode__SHIFT 0x1 +#define ACP_DMA_ERR_STS_6__DMAChTermErr_MASK 0x1 +#define ACP_DMA_ERR_STS_6__DMAChTermErr__SHIFT 0x0 +#define ACP_DMA_ERR_STS_6__DMAChErrCode_MASK 0x1e +#define ACP_DMA_ERR_STS_6__DMAChErrCode__SHIFT 0x1 +#define ACP_DMA_ERR_STS_7__DMAChTermErr_MASK 0x1 +#define ACP_DMA_ERR_STS_7__DMAChTermErr__SHIFT 0x0 +#define ACP_DMA_ERR_STS_7__DMAChErrCode_MASK 0x1e +#define ACP_DMA_ERR_STS_7__DMAChErrCode__SHIFT 0x1 +#define ACP_DMA_ERR_STS_8__DMAChTermErr_MASK 0x1 +#define ACP_DMA_ERR_STS_8__DMAChTermErr__SHIFT 0x0 +#define ACP_DMA_ERR_STS_8__DMAChErrCode_MASK 0x1e +#define ACP_DMA_ERR_STS_8__DMAChErrCode__SHIFT 0x1 +#define ACP_DMA_ERR_STS_9__DMAChTermErr_MASK 0x1 +#define ACP_DMA_ERR_STS_9__DMAChTermErr__SHIFT 0x0 +#define ACP_DMA_ERR_STS_9__DMAChErrCode_MASK 0x1e +#define ACP_DMA_ERR_STS_9__DMAChErrCode__SHIFT 0x1 +#define ACP_DMA_ERR_STS_10__DMAChTermErr_MASK 0x1 +#define ACP_DMA_ERR_STS_10__DMAChTermErr__SHIFT 0x0 +#define ACP_DMA_ERR_STS_10__DMAChErrCode_MASK 0x1e +#define ACP_DMA_ERR_STS_10__DMAChErrCode__SHIFT 0x1 +#define ACP_DMA_ERR_STS_11__DMAChTermErr_MASK 0x1 +#define ACP_DMA_ERR_STS_11__DMAChTermErr__SHIFT 0x0 +#define ACP_DMA_ERR_STS_11__DMAChErrCode_MASK 0x1e +#define ACP_DMA_ERR_STS_11__DMAChErrCode__SHIFT 0x1 +#define ACP_DMA_ERR_STS_12__DMAChTermErr_MASK 0x1 +#define ACP_DMA_ERR_STS_12__DMAChTermErr__SHIFT 0x0 +#define ACP_DMA_ERR_STS_12__DMAChErrCode_MASK 0x1e +#define ACP_DMA_ERR_STS_12__DMAChErrCode__SHIFT 0x1 +#define ACP_DMA_ERR_STS_13__DMAChTermErr_MASK 0x1 +#define ACP_DMA_ERR_STS_13__DMAChTermErr__SHIFT 0x0 +#define ACP_DMA_ERR_STS_13__DMAChErrCode_MASK 0x1e +#define ACP_DMA_ERR_STS_13__DMAChErrCode__SHIFT 0x1 +#define ACP_DMA_ERR_STS_14__DMAChTermErr_MASK 0x1 +#define ACP_DMA_ERR_STS_14__DMAChTermErr__SHIFT 0x0 +#define ACP_DMA_ERR_STS_14__DMAChErrCode_MASK 0x1e +#define ACP_DMA_ERR_STS_14__DMAChErrCode__SHIFT 0x1 +#define ACP_DMA_ERR_STS_15__DMAChTermErr_MASK 0x1 +#define ACP_DMA_ERR_STS_15__DMAChTermErr__SHIFT 0x0 +#define ACP_DMA_ERR_STS_15__DMAChErrCode_MASK 0x1e +#define ACP_DMA_ERR_STS_15__DMAChErrCode__SHIFT 0x1 +#define ACP_DMA_DESC_BASE_ADDR__DescriptorBaseAddr_MASK 0xffffffff +#define ACP_DMA_DESC_BASE_ADDR__DescriptorBaseAddr__SHIFT 0x0 +#define ACP_DMA_DESC_MAX_NUM_DSCR__MaximumNumberDescr_MASK 0xf +#define ACP_DMA_DESC_MAX_NUM_DSCR__MaximumNumberDescr__SHIFT 0x0 +#define ACP_DMA_CH_STS__DMAChSts_MASK 0xffff +#define ACP_DMA_CH_STS__DMAChSts__SHIFT 0x0 +#define ACP_DMA_CH_GROUP__DMAChanelGrouping_MASK 0x1 +#define ACP_DMA_CH_GROUP__DMAChanelGrouping__SHIFT 0x0 +#define ACP_DSP0_CACHE_OFFSET0__Offset_MASK 0xfffffff +#define ACP_DSP0_CACHE_OFFSET0__Offset__SHIFT 0x0 +#define ACP_DSP0_CACHE_OFFSET0__OnionGarlicSel_MASK 0x80000000 +#define ACP_DSP0_CACHE_OFFSET0__OnionGarlicSel__SHIFT 0x1f +#define ACP_DSP0_CACHE_SIZE0__Size_MASK 0xffffff +#define ACP_DSP0_CACHE_SIZE0__Size__SHIFT 0x0 +#define ACP_DSP0_CACHE_SIZE0__PageEnable_MASK 0x80000000 +#define ACP_DSP0_CACHE_SIZE0__PageEnable__SHIFT 0x1f +#define ACP_DSP0_CACHE_OFFSET1__Offset_MASK 0xfffffff +#define ACP_DSP0_CACHE_OFFSET1__Offset__SHIFT 0x0 +#define ACP_DSP0_CACHE_OFFSET1__OnionGarlicSel_MASK 0x80000000 +#define ACP_DSP0_CACHE_OFFSET1__OnionGarlicSel__SHIFT 0x1f +#define ACP_DSP0_CACHE_SIZE1__Size_MASK 0xffffff +#define ACP_DSP0_CACHE_SIZE1__Size__SHIFT 0x0 +#define ACP_DSP0_CACHE_SIZE1__PageEnable_MASK 0x80000000 +#define ACP_DSP0_CACHE_SIZE1__PageEnable__SHIFT 0x1f +#define ACP_DSP0_CACHE_OFFSET2__Offset_MASK 0xfffffff +#define ACP_DSP0_CACHE_OFFSET2__Offset__SHIFT 0x0 +#define ACP_DSP0_CACHE_OFFSET2__OnionGarlicSel_MASK 0x80000000 +#define ACP_DSP0_CACHE_OFFSET2__OnionGarlicSel__SHIFT 0x1f +#define ACP_DSP0_CACHE_SIZE2__Size_MASK 0xffffff +#define ACP_DSP0_CACHE_SIZE2__Size__SHIFT 0x0 +#define ACP_DSP0_CACHE_SIZE2__PageEnable_MASK 0x80000000 +#define ACP_DSP0_CACHE_SIZE2__PageEnable__SHIFT 0x1f +#define ACP_DSP0_CACHE_OFFSET3__Offset_MASK 0xfffffff +#define ACP_DSP0_CACHE_OFFSET3__Offset__SHIFT 0x0 +#define ACP_DSP0_CACHE_OFFSET3__OnionGarlicSel_MASK 0x80000000 +#define ACP_DSP0_CACHE_OFFSET3__OnionGarlicSel__SHIFT 0x1f +#define ACP_DSP0_CACHE_SIZE3__Size_MASK 0xffffff +#define ACP_DSP0_CACHE_SIZE3__Size__SHIFT 0x0 +#define ACP_DSP0_CACHE_SIZE3__PageEnable_MASK 0x80000000 +#define ACP_DSP0_CACHE_SIZE3__PageEnable__SHIFT 0x1f +#define ACP_DSP0_CACHE_OFFSET4__Offset_MASK 0xfffffff +#define ACP_DSP0_CACHE_OFFSET4__Offset__SHIFT 0x0 +#define ACP_DSP0_CACHE_OFFSET4__OnionGarlicSel_MASK 0x80000000 +#define ACP_DSP0_CACHE_OFFSET4__OnionGarlicSel__SHIFT 0x1f +#define ACP_DSP0_CACHE_SIZE4__Size_MASK 0xffffff +#define ACP_DSP0_CACHE_SIZE4__Size__SHIFT 0x0 +#define ACP_DSP0_CACHE_SIZE4__PageEnable_MASK 0x80000000 +#define ACP_DSP0_CACHE_SIZE4__PageEnable__SHIFT 0x1f +#define ACP_DSP0_CACHE_OFFSET5__Offset_MASK 0xfffffff +#define ACP_DSP0_CACHE_OFFSET5__Offset__SHIFT 0x0 +#define ACP_DSP0_CACHE_OFFSET5__OnionGarlicSel_MASK 0x80000000 +#define ACP_DSP0_CACHE_OFFSET5__OnionGarlicSel__SHIFT 0x1f +#define ACP_DSP0_CACHE_SIZE5__Size_MASK 0xffffff +#define ACP_DSP0_CACHE_SIZE5__Size__SHIFT 0x0 +#define ACP_DSP0_CACHE_SIZE5__PageEnable_MASK 0x80000000 +#define ACP_DSP0_CACHE_SIZE5__PageEnable__SHIFT 0x1f +#define ACP_DSP0_CACHE_OFFSET6__Offset_MASK 0xfffffff +#define ACP_DSP0_CACHE_OFFSET6__Offset__SHIFT 0x0 +#define ACP_DSP0_CACHE_OFFSET6__OnionGarlicSel_MASK 0x80000000 +#define ACP_DSP0_CACHE_OFFSET6__OnionGarlicSel__SHIFT 0x1f +#define ACP_DSP0_CACHE_SIZE6__Size_MASK 0xffffff +#define ACP_DSP0_CACHE_SIZE6__Size__SHIFT 0x0 +#define ACP_DSP0_CACHE_SIZE6__PageEnable_MASK 0x80000000 +#define ACP_DSP0_CACHE_SIZE6__PageEnable__SHIFT 0x1f +#define ACP_DSP0_CACHE_OFFSET7__Offset_MASK 0xfffffff +#define ACP_DSP0_CACHE_OFFSET7__Offset__SHIFT 0x0 +#define ACP_DSP0_CACHE_OFFSET7__OnionGarlicSel_MASK 0x80000000 +#define ACP_DSP0_CACHE_OFFSET7__OnionGarlicSel__SHIFT 0x1f +#define ACP_DSP0_CACHE_SIZE7__Size_MASK 0xffffff +#define ACP_DSP0_CACHE_SIZE7__Size__SHIFT 0x0 +#define ACP_DSP0_CACHE_SIZE7__PageEnable_MASK 0x80000000 +#define ACP_DSP0_CACHE_SIZE7__PageEnable__SHIFT 0x1f +#define ACP_DSP0_CACHE_OFFSET8__Offset_MASK 0xfffffff +#define ACP_DSP0_CACHE_OFFSET8__Offset__SHIFT 0x0 +#define ACP_DSP0_CACHE_OFFSET8__OnionGarlicSel_MASK 0x80000000 +#define ACP_DSP0_CACHE_OFFSET8__OnionGarlicSel__SHIFT 0x1f +#define ACP_DSP0_CACHE_SIZE8__Size_MASK 0xffffff +#define ACP_DSP0_CACHE_SIZE8__Size__SHIFT 0x0 +#define ACP_DSP0_CACHE_SIZE8__PageEnable_MASK 0x80000000 +#define ACP_DSP0_CACHE_SIZE8__PageEnable__SHIFT 0x1f +#define ACP_DSP0_NONCACHE_OFFSET0__Offset_MASK 0xfffffff +#define ACP_DSP0_NONCACHE_OFFSET0__Offset__SHIFT 0x0 +#define ACP_DSP0_NONCACHE_OFFSET0__OnionGarlicSel_MASK 0x80000000 +#define ACP_DSP0_NONCACHE_OFFSET0__OnionGarlicSel__SHIFT 0x1f +#define ACP_DSP0_NONCACHE_SIZE0__Size_MASK 0xffffff +#define ACP_DSP0_NONCACHE_SIZE0__Size__SHIFT 0x0 +#define ACP_DSP0_NONCACHE_SIZE0__PageEnable_MASK 0x80000000 +#define ACP_DSP0_NONCACHE_SIZE0__PageEnable__SHIFT 0x1f +#define ACP_DSP0_NONCACHE_OFFSET1__Offset_MASK 0xfffffff +#define ACP_DSP0_NONCACHE_OFFSET1__Offset__SHIFT 0x0 +#define ACP_DSP0_NONCACHE_OFFSET1__OnionGarlicSel_MASK 0x80000000 +#define ACP_DSP0_NONCACHE_OFFSET1__OnionGarlicSel__SHIFT 0x1f +#define ACP_DSP0_NONCACHE_SIZE1__Size_MASK 0xffffff +#define ACP_DSP0_NONCACHE_SIZE1__Size__SHIFT 0x0 +#define ACP_DSP0_NONCACHE_SIZE1__PageEnable_MASK 0x80000000 +#define ACP_DSP0_NONCACHE_SIZE1__PageEnable__SHIFT 0x1f +#define ACP_DSP0_DEBUG_PC__DebugPC_MASK 0xffffffff +#define ACP_DSP0_DEBUG_PC__DebugPC__SHIFT 0x0 +#define ACP_DSP0_NMI_SEL__NMISel_MASK 0x1 +#define ACP_DSP0_NMI_SEL__NMISel__SHIFT 0x0 +#define ACP_DSP0_CLKRST_CNTL__ClkEn_MASK 0x1 +#define ACP_DSP0_CLKRST_CNTL__ClkEn__SHIFT 0x0 +#define ACP_DSP0_CLKRST_CNTL__SoftResetDSP_MASK 0x2 +#define ACP_DSP0_CLKRST_CNTL__SoftResetDSP__SHIFT 0x1 +#define ACP_DSP0_CLKRST_CNTL__InternalSoftResetMode_MASK 0x4 +#define ACP_DSP0_CLKRST_CNTL__InternalSoftResetMode__SHIFT 0x2 +#define ACP_DSP0_CLKRST_CNTL__ExternalSoftResetMode_MASK 0x8 +#define ACP_DSP0_CLKRST_CNTL__ExternalSoftResetMode__SHIFT 0x3 +#define ACP_DSP0_CLKRST_CNTL__SoftResetDSPDone_MASK 0x10 +#define ACP_DSP0_CLKRST_CNTL__SoftResetDSPDone__SHIFT 0x4 +#define ACP_DSP0_CLKRST_CNTL__Clk_ON_Status_MASK 0x20 +#define ACP_DSP0_CLKRST_CNTL__Clk_ON_Status__SHIFT 0x5 +#define ACP_DSP0_RUNSTALL__RunStallCntl_MASK 0x1 +#define ACP_DSP0_RUNSTALL__RunStallCntl__SHIFT 0x0 +#define ACP_DSP0_OCD_HALT_ON_RST__OCD_HALT_ON_RST_MASK 0x1 +#define ACP_DSP0_OCD_HALT_ON_RST__OCD_HALT_ON_RST__SHIFT 0x0 +#define ACP_DSP0_WAIT_MODE__WaitMode_MASK 0x1 +#define ACP_DSP0_WAIT_MODE__WaitMode__SHIFT 0x0 +#define ACP_DSP0_VECT_SEL__StaticVectorSel_MASK 0x1 +#define ACP_DSP0_VECT_SEL__StaticVectorSel__SHIFT 0x0 +#define ACP_DSP0_DEBUG_REG1__ACP_DSP_DEBUG_REG1_MASK 0xffffffff +#define ACP_DSP0_DEBUG_REG1__ACP_DSP_DEBUG_REG1__SHIFT 0x0 +#define ACP_DSP0_DEBUG_REG2__ACP_DSP_DEBUG_REG2_MASK 0xffffffff +#define ACP_DSP0_DEBUG_REG2__ACP_DSP_DEBUG_REG2__SHIFT 0x0 +#define ACP_DSP0_DEBUG_REG3__ACP_DSP_DEBUG_REG3_MASK 0xffffffff +#define ACP_DSP0_DEBUG_REG3__ACP_DSP_DEBUG_REG3__SHIFT 0x0 +#define ACP_DSP1_CACHE_OFFSET0__Offset_MASK 0xfffffff +#define ACP_DSP1_CACHE_OFFSET0__Offset__SHIFT 0x0 +#define ACP_DSP1_CACHE_OFFSET0__OnionGarlicSel_MASK 0x80000000 +#define ACP_DSP1_CACHE_OFFSET0__OnionGarlicSel__SHIFT 0x1f +#define ACP_DSP1_CACHE_SIZE0__Size_MASK 0xffffff +#define ACP_DSP1_CACHE_SIZE0__Size__SHIFT 0x0 +#define ACP_DSP1_CACHE_SIZE0__PageEnable_MASK 0x80000000 +#define ACP_DSP1_CACHE_SIZE0__PageEnable__SHIFT 0x1f +#define ACP_DSP1_CACHE_OFFSET1__Offset_MASK 0xfffffff +#define ACP_DSP1_CACHE_OFFSET1__Offset__SHIFT 0x0 +#define ACP_DSP1_CACHE_OFFSET1__OnionGarlicSel_MASK 0x80000000 +#define ACP_DSP1_CACHE_OFFSET1__OnionGarlicSel__SHIFT 0x1f +#define ACP_DSP1_CACHE_SIZE1__Size_MASK 0xffffff +#define ACP_DSP1_CACHE_SIZE1__Size__SHIFT 0x0 +#define ACP_DSP1_CACHE_SIZE1__PageEnable_MASK 0x80000000 +#define ACP_DSP1_CACHE_SIZE1__PageEnable__SHIFT 0x1f +#define ACP_DSP1_CACHE_OFFSET2__Offset_MASK 0xfffffff +#define ACP_DSP1_CACHE_OFFSET2__Offset__SHIFT 0x0 +#define ACP_DSP1_CACHE_OFFSET2__OnionGarlicSel_MASK 0x80000000 +#define ACP_DSP1_CACHE_OFFSET2__OnionGarlicSel__SHIFT 0x1f +#define ACP_DSP1_CACHE_SIZE2__Size_MASK 0xffffff +#define ACP_DSP1_CACHE_SIZE2__Size__SHIFT 0x0 +#define ACP_DSP1_CACHE_SIZE2__PageEnable_MASK 0x80000000 +#define ACP_DSP1_CACHE_SIZE2__PageEnable__SHIFT 0x1f +#define ACP_DSP1_CACHE_OFFSET3__Offset_MASK 0xfffffff +#define ACP_DSP1_CACHE_OFFSET3__Offset__SHIFT 0x0 +#define ACP_DSP1_CACHE_OFFSET3__OnionGarlicSel_MASK 0x80000000 +#define ACP_DSP1_CACHE_OFFSET3__OnionGarlicSel__SHIFT 0x1f +#define ACP_DSP1_CACHE_SIZE3__Size_MASK 0xffffff +#define ACP_DSP1_CACHE_SIZE3__Size__SHIFT 0x0 +#define ACP_DSP1_CACHE_SIZE3__PageEnable_MASK 0x80000000 +#define ACP_DSP1_CACHE_SIZE3__PageEnable__SHIFT 0x1f +#define ACP_DSP1_CACHE_OFFSET4__Offset_MASK 0xfffffff +#define ACP_DSP1_CACHE_OFFSET4__Offset__SHIFT 0x0 +#define ACP_DSP1_CACHE_OFFSET4__OnionGarlicSel_MASK 0x80000000 +#define ACP_DSP1_CACHE_OFFSET4__OnionGarlicSel__SHIFT 0x1f +#define ACP_DSP1_CACHE_SIZE4__Size_MASK 0xffffff +#define ACP_DSP1_CACHE_SIZE4__Size__SHIFT 0x0 +#define ACP_DSP1_CACHE_SIZE4__PageEnable_MASK 0x80000000 +#define ACP_DSP1_CACHE_SIZE4__PageEnable__SHIFT 0x1f +#define ACP_DSP1_CACHE_OFFSET5__Offset_MASK 0xfffffff +#define ACP_DSP1_CACHE_OFFSET5__Offset__SHIFT 0x0 +#define ACP_DSP1_CACHE_OFFSET5__OnionGarlicSel_MASK 0x80000000 +#define ACP_DSP1_CACHE_OFFSET5__OnionGarlicSel__SHIFT 0x1f +#define ACP_DSP1_CACHE_SIZE5__Size_MASK 0xffffff +#define ACP_DSP1_CACHE_SIZE5__Size__SHIFT 0x0 +#define ACP_DSP1_CACHE_SIZE5__PageEnable_MASK 0x80000000 +#define ACP_DSP1_CACHE_SIZE5__PageEnable__SHIFT 0x1f +#define ACP_DSP1_CACHE_OFFSET6__Offset_MASK 0xfffffff +#define ACP_DSP1_CACHE_OFFSET6__Offset__SHIFT 0x0 +#define ACP_DSP1_CACHE_OFFSET6__OnionGarlicSel_MASK 0x80000000 +#define ACP_DSP1_CACHE_OFFSET6__OnionGarlicSel__SHIFT 0x1f +#define ACP_DSP1_CACHE_SIZE6__Size_MASK 0xffffff +#define ACP_DSP1_CACHE_SIZE6__Size__SHIFT 0x0 +#define ACP_DSP1_CACHE_SIZE6__PageEnable_MASK 0x80000000 +#define ACP_DSP1_CACHE_SIZE6__PageEnable__SHIFT 0x1f +#define ACP_DSP1_CACHE_OFFSET7__Offset_MASK 0xfffffff +#define ACP_DSP1_CACHE_OFFSET7__Offset__SHIFT 0x0 +#define ACP_DSP1_CACHE_OFFSET7__OnionGarlicSel_MASK 0x80000000 +#define ACP_DSP1_CACHE_OFFSET7__OnionGarlicSel__SHIFT 0x1f +#define ACP_DSP1_CACHE_SIZE7__Size_MASK 0xffffff +#define ACP_DSP1_CACHE_SIZE7__Size__SHIFT 0x0 +#define ACP_DSP1_CACHE_SIZE7__PageEnable_MASK 0x80000000 +#define ACP_DSP1_CACHE_SIZE7__PageEnable__SHIFT 0x1f +#define ACP_DSP1_CACHE_OFFSET8__Offset_MASK 0xfffffff +#define ACP_DSP1_CACHE_OFFSET8__Offset__SHIFT 0x0 +#define ACP_DSP1_CACHE_OFFSET8__OnionGarlicSel_MASK 0x80000000 +#define ACP_DSP1_CACHE_OFFSET8__OnionGarlicSel__SHIFT 0x1f +#define ACP_DSP1_CACHE_SIZE8__Size_MASK 0xffffff +#define ACP_DSP1_CACHE_SIZE8__Size__SHIFT 0x0 +#define ACP_DSP1_CACHE_SIZE8__PageEnable_MASK 0x80000000 +#define ACP_DSP1_CACHE_SIZE8__PageEnable__SHIFT 0x1f +#define ACP_DSP1_NONCACHE_OFFSET0__Offset_MASK 0xfffffff +#define ACP_DSP1_NONCACHE_OFFSET0__Offset__SHIFT 0x0 +#define ACP_DSP1_NONCACHE_OFFSET0__OnionGarlicSel_MASK 0x80000000 +#define ACP_DSP1_NONCACHE_OFFSET0__OnionGarlicSel__SHIFT 0x1f +#define ACP_DSP1_NONCACHE_SIZE0__Size_MASK 0xffffff +#define ACP_DSP1_NONCACHE_SIZE0__Size__SHIFT 0x0 +#define ACP_DSP1_NONCACHE_SIZE0__PageEnable_MASK 0x80000000 +#define ACP_DSP1_NONCACHE_SIZE0__PageEnable__SHIFT 0x1f +#define ACP_DSP1_NONCACHE_OFFSET1__Offset_MASK 0xfffffff +#define ACP_DSP1_NONCACHE_OFFSET1__Offset__SHIFT 0x0 +#define ACP_DSP1_NONCACHE_OFFSET1__OnionGarlicSel_MASK 0x80000000 +#define ACP_DSP1_NONCACHE_OFFSET1__OnionGarlicSel__SHIFT 0x1f +#define ACP_DSP1_NONCACHE_SIZE1__Size_MASK 0xffffff +#define ACP_DSP1_NONCACHE_SIZE1__Size__SHIFT 0x0 +#define ACP_DSP1_NONCACHE_SIZE1__PageEnable_MASK 0x80000000 +#define ACP_DSP1_NONCACHE_SIZE1__PageEnable__SHIFT 0x1f +#define ACP_DSP1_DEBUG_PC__DebugPC_MASK 0xffffffff +#define ACP_DSP1_DEBUG_PC__DebugPC__SHIFT 0x0 +#define ACP_DSP1_NMI_SEL__NMISel_MASK 0x1 +#define ACP_DSP1_NMI_SEL__NMISel__SHIFT 0x0 +#define ACP_DSP1_CLKRST_CNTL__ClkEn_MASK 0x1 +#define ACP_DSP1_CLKRST_CNTL__ClkEn__SHIFT 0x0 +#define ACP_DSP1_CLKRST_CNTL__SoftResetDSP_MASK 0x2 +#define ACP_DSP1_CLKRST_CNTL__SoftResetDSP__SHIFT 0x1 +#define ACP_DSP1_CLKRST_CNTL__InternalSoftResetMode_MASK 0x4 +#define ACP_DSP1_CLKRST_CNTL__InternalSoftResetMode__SHIFT 0x2 +#define ACP_DSP1_CLKRST_CNTL__ExternalSoftResetMode_MASK 0x8 +#define ACP_DSP1_CLKRST_CNTL__ExternalSoftResetMode__SHIFT 0x3 +#define ACP_DSP1_CLKRST_CNTL__SoftResetDSPDone_MASK 0x10 +#define ACP_DSP1_CLKRST_CNTL__SoftResetDSPDone__SHIFT 0x4 +#define ACP_DSP1_CLKRST_CNTL__Clk_ON_Status_MASK 0x20 +#define ACP_DSP1_CLKRST_CNTL__Clk_ON_Status__SHIFT 0x5 +#define ACP_DSP1_RUNSTALL__RunStallCntl_MASK 0x1 +#define ACP_DSP1_RUNSTALL__RunStallCntl__SHIFT 0x0 +#define ACP_DSP1_OCD_HALT_ON_RST__OCD_HALT_ON_RST_MASK 0x1 +#define ACP_DSP1_OCD_HALT_ON_RST__OCD_HALT_ON_RST__SHIFT 0x0 +#define ACP_DSP1_WAIT_MODE__WaitMode_MASK 0x1 +#define ACP_DSP1_WAIT_MODE__WaitMode__SHIFT 0x0 +#define ACP_DSP1_VECT_SEL__StaticVectorSel_MASK 0x1 +#define ACP_DSP1_VECT_SEL__StaticVectorSel__SHIFT 0x0 +#define ACP_DSP1_DEBUG_REG1__ACP_DSP_DEBUG_REG1_MASK 0xffffffff +#define ACP_DSP1_DEBUG_REG1__ACP_DSP_DEBUG_REG1__SHIFT 0x0 +#define ACP_DSP1_DEBUG_REG2__ACP_DSP_DEBUG_REG2_MASK 0xffffffff +#define ACP_DSP1_DEBUG_REG2__ACP_DSP_DEBUG_REG2__SHIFT 0x0 +#define ACP_DSP1_DEBUG_REG3__ACP_DSP_DEBUG_REG3_MASK 0xffffffff +#define ACP_DSP1_DEBUG_REG3__ACP_DSP_DEBUG_REG3__SHIFT 0x0 +#define ACP_DSP2_CACHE_OFFSET0__Offset_MASK 0xfffffff +#define ACP_DSP2_CACHE_OFFSET0__Offset__SHIFT 0x0 +#define ACP_DSP2_CACHE_OFFSET0__OnionGarlicSel_MASK 0x80000000 +#define ACP_DSP2_CACHE_OFFSET0__OnionGarlicSel__SHIFT 0x1f +#define ACP_DSP2_CACHE_SIZE0__Size_MASK 0xffffff +#define ACP_DSP2_CACHE_SIZE0__Size__SHIFT 0x0 +#define ACP_DSP2_CACHE_SIZE0__PageEnable_MASK 0x80000000 +#define ACP_DSP2_CACHE_SIZE0__PageEnable__SHIFT 0x1f +#define ACP_DSP2_CACHE_OFFSET1__Offset_MASK 0xfffffff +#define ACP_DSP2_CACHE_OFFSET1__Offset__SHIFT 0x0 +#define ACP_DSP2_CACHE_OFFSET1__OnionGarlicSel_MASK 0x80000000 +#define ACP_DSP2_CACHE_OFFSET1__OnionGarlicSel__SHIFT 0x1f +#define ACP_DSP2_CACHE_SIZE1__Size_MASK 0xffffff +#define ACP_DSP2_CACHE_SIZE1__Size__SHIFT 0x0 +#define ACP_DSP2_CACHE_SIZE1__PageEnable_MASK 0x80000000 +#define ACP_DSP2_CACHE_SIZE1__PageEnable__SHIFT 0x1f +#define ACP_DSP2_CACHE_OFFSET2__Offset_MASK 0xfffffff +#define ACP_DSP2_CACHE_OFFSET2__Offset__SHIFT 0x0 +#define ACP_DSP2_CACHE_OFFSET2__OnionGarlicSel_MASK 0x80000000 +#define ACP_DSP2_CACHE_OFFSET2__OnionGarlicSel__SHIFT 0x1f +#define ACP_DSP2_CACHE_SIZE2__Size_MASK 0xffffff +#define ACP_DSP2_CACHE_SIZE2__Size__SHIFT 0x0 +#define ACP_DSP2_CACHE_SIZE2__PageEnable_MASK 0x80000000 +#define ACP_DSP2_CACHE_SIZE2__PageEnable__SHIFT 0x1f +#define ACP_DSP2_CACHE_OFFSET3__Offset_MASK 0xfffffff +#define ACP_DSP2_CACHE_OFFSET3__Offset__SHIFT 0x0 +#define ACP_DSP2_CACHE_OFFSET3__OnionGarlicSel_MASK 0x80000000 +#define ACP_DSP2_CACHE_OFFSET3__OnionGarlicSel__SHIFT 0x1f +#define ACP_DSP2_CACHE_SIZE3__Size_MASK 0xffffff +#define ACP_DSP2_CACHE_SIZE3__Size__SHIFT 0x0 +#define ACP_DSP2_CACHE_SIZE3__PageEnable_MASK 0x80000000 +#define ACP_DSP2_CACHE_SIZE3__PageEnable__SHIFT 0x1f +#define ACP_DSP2_CACHE_OFFSET4__Offset_MASK 0xfffffff +#define ACP_DSP2_CACHE_OFFSET4__Offset__SHIFT 0x0 +#define ACP_DSP2_CACHE_OFFSET4__OnionGarlicSel_MASK 0x80000000 +#define ACP_DSP2_CACHE_OFFSET4__OnionGarlicSel__SHIFT 0x1f +#define ACP_DSP2_CACHE_SIZE4__Size_MASK 0xffffff +#define ACP_DSP2_CACHE_SIZE4__Size__SHIFT 0x0 +#define ACP_DSP2_CACHE_SIZE4__PageEnable_MASK 0x80000000 +#define ACP_DSP2_CACHE_SIZE4__PageEnable__SHIFT 0x1f +#define ACP_DSP2_CACHE_OFFSET5__Offset_MASK 0xfffffff +#define ACP_DSP2_CACHE_OFFSET5__Offset__SHIFT 0x0 +#define ACP_DSP2_CACHE_OFFSET5__OnionGarlicSel_MASK 0x80000000 +#define ACP_DSP2_CACHE_OFFSET5__OnionGarlicSel__SHIFT 0x1f +#define ACP_DSP2_CACHE_SIZE5__Size_MASK 0xffffff +#define ACP_DSP2_CACHE_SIZE5__Size__SHIFT 0x0 +#define ACP_DSP2_CACHE_SIZE5__PageEnable_MASK 0x80000000 +#define ACP_DSP2_CACHE_SIZE5__PageEnable__SHIFT 0x1f +#define ACP_DSP2_CACHE_OFFSET6__Offset_MASK 0xfffffff +#define ACP_DSP2_CACHE_OFFSET6__Offset__SHIFT 0x0 +#define ACP_DSP2_CACHE_OFFSET6__OnionGarlicSel_MASK 0x80000000 +#define ACP_DSP2_CACHE_OFFSET6__OnionGarlicSel__SHIFT 0x1f +#define ACP_DSP2_CACHE_SIZE6__Size_MASK 0xffffff +#define ACP_DSP2_CACHE_SIZE6__Size__SHIFT 0x0 +#define ACP_DSP2_CACHE_SIZE6__PageEnable_MASK 0x80000000 +#define ACP_DSP2_CACHE_SIZE6__PageEnable__SHIFT 0x1f +#define ACP_DSP2_CACHE_OFFSET7__Offset_MASK 0xfffffff +#define ACP_DSP2_CACHE_OFFSET7__Offset__SHIFT 0x0 +#define ACP_DSP2_CACHE_OFFSET7__OnionGarlicSel_MASK 0x80000000 +#define ACP_DSP2_CACHE_OFFSET7__OnionGarlicSel__SHIFT 0x1f +#define ACP_DSP2_CACHE_SIZE7__Size_MASK 0xffffff +#define ACP_DSP2_CACHE_SIZE7__Size__SHIFT 0x0 +#define ACP_DSP2_CACHE_SIZE7__PageEnable_MASK 0x80000000 +#define ACP_DSP2_CACHE_SIZE7__PageEnable__SHIFT 0x1f +#define ACP_DSP2_CACHE_OFFSET8__Offset_MASK 0xfffffff +#define ACP_DSP2_CACHE_OFFSET8__Offset__SHIFT 0x0 +#define ACP_DSP2_CACHE_OFFSET8__OnionGarlicSel_MASK 0x80000000 +#define ACP_DSP2_CACHE_OFFSET8__OnionGarlicSel__SHIFT 0x1f +#define ACP_DSP2_CACHE_SIZE8__Size_MASK 0xffffff +#define ACP_DSP2_CACHE_SIZE8__Size__SHIFT 0x0 +#define ACP_DSP2_CACHE_SIZE8__PageEnable_MASK 0x80000000 +#define ACP_DSP2_CACHE_SIZE8__PageEnable__SHIFT 0x1f +#define ACP_DSP2_NONCACHE_OFFSET0__Offset_MASK 0xfffffff +#define ACP_DSP2_NONCACHE_OFFSET0__Offset__SHIFT 0x0 +#define ACP_DSP2_NONCACHE_OFFSET0__OnionGarlicSel_MASK 0x80000000 +#define ACP_DSP2_NONCACHE_OFFSET0__OnionGarlicSel__SHIFT 0x1f +#define ACP_DSP2_NONCACHE_SIZE0__Size_MASK 0xffffff +#define ACP_DSP2_NONCACHE_SIZE0__Size__SHIFT 0x0 +#define ACP_DSP2_NONCACHE_SIZE0__PageEnable_MASK 0x80000000 +#define ACP_DSP2_NONCACHE_SIZE0__PageEnable__SHIFT 0x1f +#define ACP_DSP2_NONCACHE_OFFSET1__Offset_MASK 0xfffffff +#define ACP_DSP2_NONCACHE_OFFSET1__Offset__SHIFT 0x0 +#define ACP_DSP2_NONCACHE_OFFSET1__OnionGarlicSel_MASK 0x80000000 +#define ACP_DSP2_NONCACHE_OFFSET1__OnionGarlicSel__SHIFT 0x1f +#define ACP_DSP2_NONCACHE_SIZE1__Size_MASK 0xffffff +#define ACP_DSP2_NONCACHE_SIZE1__Size__SHIFT 0x0 +#define ACP_DSP2_NONCACHE_SIZE1__PageEnable_MASK 0x80000000 +#define ACP_DSP2_NONCACHE_SIZE1__PageEnable__SHIFT 0x1f +#define ACP_DSP2_DEBUG_PC__DebugPC_MASK 0xffffffff +#define ACP_DSP2_DEBUG_PC__DebugPC__SHIFT 0x0 +#define ACP_DSP2_NMI_SEL__NMISel_MASK 0x1 +#define ACP_DSP2_NMI_SEL__NMISel__SHIFT 0x0 +#define ACP_DSP2_CLKRST_CNTL__ClkEn_MASK 0x1 +#define ACP_DSP2_CLKRST_CNTL__ClkEn__SHIFT 0x0 +#define ACP_DSP2_CLKRST_CNTL__SoftResetDSP_MASK 0x2 +#define ACP_DSP2_CLKRST_CNTL__SoftResetDSP__SHIFT 0x1 +#define ACP_DSP2_CLKRST_CNTL__InternalSoftResetMode_MASK 0x4 +#define ACP_DSP2_CLKRST_CNTL__InternalSoftResetMode__SHIFT 0x2 +#define ACP_DSP2_CLKRST_CNTL__ExternalSoftResetMode_MASK 0x8 +#define ACP_DSP2_CLKRST_CNTL__ExternalSoftResetMode__SHIFT 0x3 +#define ACP_DSP2_CLKRST_CNTL__SoftResetDSPDone_MASK 0x10 +#define ACP_DSP2_CLKRST_CNTL__SoftResetDSPDone__SHIFT 0x4 +#define ACP_DSP2_CLKRST_CNTL__Clk_ON_Status_MASK 0x20 +#define ACP_DSP2_CLKRST_CNTL__Clk_ON_Status__SHIFT 0x5 +#define ACP_DSP2_RUNSTALL__RunStallCntl_MASK 0x1 +#define ACP_DSP2_RUNSTALL__RunStallCntl__SHIFT 0x0 +#define ACP_DSP2_OCD_HALT_ON_RST__OCD_HALT_ON_RST_MASK 0x1 +#define ACP_DSP2_OCD_HALT_ON_RST__OCD_HALT_ON_RST__SHIFT 0x0 +#define ACP_DSP2_WAIT_MODE__WaitMode_MASK 0x1 +#define ACP_DSP2_WAIT_MODE__WaitMode__SHIFT 0x0 +#define ACP_DSP2_VECT_SEL__StaticVectorSel_MASK 0x1 +#define ACP_DSP2_VECT_SEL__StaticVectorSel__SHIFT 0x0 +#define ACP_DSP2_DEBUG_REG1__ACP_DSP_DEBUG_REG1_MASK 0xffffffff +#define ACP_DSP2_DEBUG_REG1__ACP_DSP_DEBUG_REG1__SHIFT 0x0 +#define ACP_DSP2_DEBUG_REG2__ACP_DSP_DEBUG_REG2_MASK 0xffffffff +#define ACP_DSP2_DEBUG_REG2__ACP_DSP_DEBUG_REG2__SHIFT 0x0 +#define ACP_DSP2_DEBUG_REG3__ACP_DSP_DEBUG_REG3_MASK 0xffffffff +#define ACP_DSP2_DEBUG_REG3__ACP_DSP_DEBUG_REG3__SHIFT 0x0 +#define ACP_AXI2DAGB_ONION_CNTL__AXI2DAGBDataSwap_MASK 0x3 +#define ACP_AXI2DAGB_ONION_CNTL__AXI2DAGBDataSwap__SHIFT 0x0 +#define ACP_AXI2DAGB_ONION_CNTL__AXI2DAGBEnbMultRdReq_MASK 0x4 +#define ACP_AXI2DAGB_ONION_CNTL__AXI2DAGBEnbMultRdReq__SHIFT 0x2 +#define ACP_AXI2DAGB_ONION_CNTL__AXI2DAGBEnbMultWrReq_MASK 0x18 +#define ACP_AXI2DAGB_ONION_CNTL__AXI2DAGBEnbMultWrReq__SHIFT 0x3 +#define ACP_AXI2DAGB_ONION_CNTL__AXI2DAGBMaxReadBurst_MASK 0x60 +#define ACP_AXI2DAGB_ONION_CNTL__AXI2DAGBMaxReadBurst__SHIFT 0x5 +#define ACP_AXI2DAGB_ONION_CNTL__AXI2DAGBStallEnb_MASK 0x80 +#define ACP_AXI2DAGB_ONION_CNTL__AXI2DAGBStallEnb__SHIFT 0x7 +#define ACP_AXI2DAGB_ONION_CNTL__AXI2DAGBNackChkEnb_MASK 0x100 +#define ACP_AXI2DAGB_ONION_CNTL__AXI2DAGBNackChkEnb__SHIFT 0x8 +#define ACP_AXI2DAGB_ONION_CNTL__AXI2DAGBAdrWinViolChkEnb_MASK 0x200 +#define ACP_AXI2DAGB_ONION_CNTL__AXI2DAGBAdrWinViolChkEnb__SHIFT 0x9 +#define ACP_AXI2DAGB_ONION_CNTL__AXI2DAGBUrgEnb_MASK 0x400 +#define ACP_AXI2DAGB_ONION_CNTL__AXI2DAGBUrgEnb__SHIFT 0xa +#define ACP_AXI2DAGB_ONION_CNTL__AXI2DAGBUrgCntMult_MASK 0x1800 +#define ACP_AXI2DAGB_ONION_CNTL__AXI2DAGBUrgCntMult__SHIFT 0xb +#define ACP_AXI2DAGB_ONION_CNTL__AXI2DAGBStallMode_MASK 0x2000 +#define ACP_AXI2DAGB_ONION_CNTL__AXI2DAGBStallMode__SHIFT 0xd +#define ACP_AXI2DAGB_ONION_ERR_STATUS_WR__AXI2DAGBAdrWinViolOver_MASK 0x2000000 +#define ACP_AXI2DAGB_ONION_ERR_STATUS_WR__AXI2DAGBAdrWinViolOver__SHIFT 0x19 +#define ACP_AXI2DAGB_ONION_ERR_STATUS_WR__AXI2DAGBAdrWinViolSource_MASK 0x1c000000 +#define ACP_AXI2DAGB_ONION_ERR_STATUS_WR__AXI2DAGBAdrWinViolSource__SHIFT 0x1a +#define ACP_AXI2DAGB_ONION_ERR_STATUS_WR__AXI2DAGBAdrWinViol_MASK 0x20000000 +#define ACP_AXI2DAGB_ONION_ERR_STATUS_WR__AXI2DAGBAdrWinViol__SHIFT 0x1d +#define ACP_AXI2DAGB_ONION_ERR_STATUS_WR__AXI2DAGBNackOver_MASK 0x40000000 +#define ACP_AXI2DAGB_ONION_ERR_STATUS_WR__AXI2DAGBNackOver__SHIFT 0x1e +#define ACP_AXI2DAGB_ONION_ERR_STATUS_WR__AXI2DAGBNackVal_MASK 0x80000000 +#define ACP_AXI2DAGB_ONION_ERR_STATUS_WR__AXI2DAGBNackVal__SHIFT 0x1f +#define ACP_AXI2DAGB_ONION_ERR_STATUS_RD__AXI2DAGBAdrWinViolOver_MASK 0x2000000 +#define ACP_AXI2DAGB_ONION_ERR_STATUS_RD__AXI2DAGBAdrWinViolOver__SHIFT 0x19 +#define ACP_AXI2DAGB_ONION_ERR_STATUS_RD__AXI2DAGBAdrWinViolSource_MASK 0x1c000000 +#define ACP_AXI2DAGB_ONION_ERR_STATUS_RD__AXI2DAGBAdrWinViolSource__SHIFT 0x1a +#define ACP_AXI2DAGB_ONION_ERR_STATUS_RD__AXI2DAGBAdrWinViol_MASK 0x20000000 +#define ACP_AXI2DAGB_ONION_ERR_STATUS_RD__AXI2DAGBAdrWinViol__SHIFT 0x1d +#define ACP_AXI2DAGB_ONION_ERR_STATUS_RD__AXI2DAGBNackOver_MASK 0x40000000 +#define ACP_AXI2DAGB_ONION_ERR_STATUS_RD__AXI2DAGBNackOver__SHIFT 0x1e +#define ACP_AXI2DAGB_ONION_ERR_STATUS_RD__AXI2DAGBNackVal_MASK 0x80000000 +#define ACP_AXI2DAGB_ONION_ERR_STATUS_RD__AXI2DAGBNackVal__SHIFT 0x1f +#define ACP_DAGB_Onion_TransPerf_Counter_Control__EnbDAGBTransPerfCntr_MASK 0x1 +#define ACP_DAGB_Onion_TransPerf_Counter_Control__EnbDAGBTransPerfCntr__SHIFT 0x0 +#define ACP_DAGB_Onion_Wr_TransPerf_Counter_Current__CurDAGBTransPerfCntrTime_MASK 0x1ffff +#define ACP_DAGB_Onion_Wr_TransPerf_Counter_Current__CurDAGBTransPerfCntrTime__SHIFT 0x0 +#define ACP_DAGB_Onion_Wr_TransPerf_Counter_Current__ClrCurDAGBTransPerfCntr_MASK 0x80000000 +#define ACP_DAGB_Onion_Wr_TransPerf_Counter_Current__ClrCurDAGBTransPerfCntr__SHIFT 0x1f +#define ACP_DAGB_Onion_Wr_TransPerf_Counter_Peak__PeakDAGBTransPerfCntrTime_MASK 0x1ffff +#define ACP_DAGB_Onion_Wr_TransPerf_Counter_Peak__PeakDAGBTransPerfCntrTime__SHIFT 0x0 +#define ACP_DAGB_Onion_Wr_TransPerf_Counter_Peak__ClrPeakDAGBTransPerfCntr_MASK 0x80000000 +#define ACP_DAGB_Onion_Wr_TransPerf_Counter_Peak__ClrPeakDAGBTransPerfCntr__SHIFT 0x1f +#define ACP_DAGB_Onion_Rd_TransPerf_Counter_Current__CurDAGBTransPerfCntrTime_MASK 0x1ffff +#define ACP_DAGB_Onion_Rd_TransPerf_Counter_Current__CurDAGBTransPerfCntrTime__SHIFT 0x0 +#define ACP_DAGB_Onion_Rd_TransPerf_Counter_Current__ClrCurDAGBTransPerfCntr_MASK 0x80000000 +#define ACP_DAGB_Onion_Rd_TransPerf_Counter_Current__ClrCurDAGBTransPerfCntr__SHIFT 0x1f +#define ACP_DAGB_Onion_Rd_TransPerf_Counter_Peak__PeakDAGBTransPerfCntrTime_MASK 0x1ffff +#define ACP_DAGB_Onion_Rd_TransPerf_Counter_Peak__PeakDAGBTransPerfCntrTime__SHIFT 0x0 +#define ACP_DAGB_Onion_Rd_TransPerf_Counter_Peak__ClrPeakDAGBTransPerfCntr_MASK 0x80000000 +#define ACP_DAGB_Onion_Rd_TransPerf_Counter_Peak__ClrPeakDAGBTransPerfCntr__SHIFT 0x1f +#define ACP_AXI2DAGB_GARLIC_CNTL__AXI2DAGBDataSwap_MASK 0x3 +#define ACP_AXI2DAGB_GARLIC_CNTL__AXI2DAGBDataSwap__SHIFT 0x0 +#define ACP_AXI2DAGB_GARLIC_CNTL__AXI2DAGBEnbMultRdReq_MASK 0x4 +#define ACP_AXI2DAGB_GARLIC_CNTL__AXI2DAGBEnbMultRdReq__SHIFT 0x2 +#define ACP_AXI2DAGB_GARLIC_CNTL__AXI2DAGBEnbMultWrReq_MASK 0x18 +#define ACP_AXI2DAGB_GARLIC_CNTL__AXI2DAGBEnbMultWrReq__SHIFT 0x3 +#define ACP_AXI2DAGB_GARLIC_CNTL__AXI2DAGBMaxReadBurst_MASK 0x60 +#define ACP_AXI2DAGB_GARLIC_CNTL__AXI2DAGBMaxReadBurst__SHIFT 0x5 +#define ACP_AXI2DAGB_GARLIC_CNTL__AXI2DAGBStallEnb_MASK 0x80 +#define ACP_AXI2DAGB_GARLIC_CNTL__AXI2DAGBStallEnb__SHIFT 0x7 +#define ACP_AXI2DAGB_GARLIC_CNTL__AXI2DAGBNackChkEnb_MASK 0x100 +#define ACP_AXI2DAGB_GARLIC_CNTL__AXI2DAGBNackChkEnb__SHIFT 0x8 +#define ACP_AXI2DAGB_GARLIC_CNTL__AXI2DAGBAdrWinViolChkEnb_MASK 0x200 +#define ACP_AXI2DAGB_GARLIC_CNTL__AXI2DAGBAdrWinViolChkEnb__SHIFT 0x9 +#define ACP_AXI2DAGB_GARLIC_CNTL__AXI2DAGBUrgEnb_MASK 0x400 +#define ACP_AXI2DAGB_GARLIC_CNTL__AXI2DAGBUrgEnb__SHIFT 0xa +#define ACP_AXI2DAGB_GARLIC_CNTL__AXI2DAGBUrgCntMult_MASK 0x1800 +#define ACP_AXI2DAGB_GARLIC_CNTL__AXI2DAGBUrgCntMult__SHIFT 0xb +#define ACP_AXI2DAGB_GARLIC_CNTL__AXI2DAGBStallMode_MASK 0x2000 +#define ACP_AXI2DAGB_GARLIC_CNTL__AXI2DAGBStallMode__SHIFT 0xd +#define ACP_AXI2DAGB_GARLIC_ERR_STATUS_WR__AXI2DAGBAdrWinViolOver_MASK 0x2000000 +#define ACP_AXI2DAGB_GARLIC_ERR_STATUS_WR__AXI2DAGBAdrWinViolOver__SHIFT 0x19 +#define ACP_AXI2DAGB_GARLIC_ERR_STATUS_WR__AXI2DAGBAdrWinViolSource_MASK 0x1c000000 +#define ACP_AXI2DAGB_GARLIC_ERR_STATUS_WR__AXI2DAGBAdrWinViolSource__SHIFT 0x1a +#define ACP_AXI2DAGB_GARLIC_ERR_STATUS_WR__AXI2DAGBAdrWinViol_MASK 0x20000000 +#define ACP_AXI2DAGB_GARLIC_ERR_STATUS_WR__AXI2DAGBAdrWinViol__SHIFT 0x1d +#define ACP_AXI2DAGB_GARLIC_ERR_STATUS_WR__AXI2DAGBNackOver_MASK 0x40000000 +#define ACP_AXI2DAGB_GARLIC_ERR_STATUS_WR__AXI2DAGBNackOver__SHIFT 0x1e +#define ACP_AXI2DAGB_GARLIC_ERR_STATUS_WR__AXI2DAGBNackVal_MASK 0x80000000 +#define ACP_AXI2DAGB_GARLIC_ERR_STATUS_WR__AXI2DAGBNackVal__SHIFT 0x1f +#define ACP_AXI2DAGB_GARLIC_ERR_STATUS_RD__AXI2DAGBAdrWinViolOver_MASK 0x2000000 +#define ACP_AXI2DAGB_GARLIC_ERR_STATUS_RD__AXI2DAGBAdrWinViolOver__SHIFT 0x19 +#define ACP_AXI2DAGB_GARLIC_ERR_STATUS_RD__AXI2DAGBAdrWinViolSource_MASK 0x1c000000 +#define ACP_AXI2DAGB_GARLIC_ERR_STATUS_RD__AXI2DAGBAdrWinViolSource__SHIFT 0x1a +#define ACP_AXI2DAGB_GARLIC_ERR_STATUS_RD__AXI2DAGBAdrWinViol_MASK 0x20000000 +#define ACP_AXI2DAGB_GARLIC_ERR_STATUS_RD__AXI2DAGBAdrWinViol__SHIFT 0x1d +#define ACP_AXI2DAGB_GARLIC_ERR_STATUS_RD__AXI2DAGBNackOver_MASK 0x40000000 +#define ACP_AXI2DAGB_GARLIC_ERR_STATUS_RD__AXI2DAGBNackOver__SHIFT 0x1e +#define ACP_AXI2DAGB_GARLIC_ERR_STATUS_RD__AXI2DAGBNackVal_MASK 0x80000000 +#define ACP_AXI2DAGB_GARLIC_ERR_STATUS_RD__AXI2DAGBNackVal__SHIFT 0x1f +#define ACP_DAGB_Garlic_TransPerf_Counter_Control__EnbDAGBTransPerfCntr_MASK 0x1 +#define ACP_DAGB_Garlic_TransPerf_Counter_Control__EnbDAGBTransPerfCntr__SHIFT 0x0 +#define ACP_DAGB_Garlic_Wr_TransPerf_Counter_Current__CurDAGBTransPerfCntrTime_MASK 0x1ffff +#define ACP_DAGB_Garlic_Wr_TransPerf_Counter_Current__CurDAGBTransPerfCntrTime__SHIFT 0x0 +#define ACP_DAGB_Garlic_Wr_TransPerf_Counter_Current__ClrCurDAGBTransPerfCntr_MASK 0x80000000 +#define ACP_DAGB_Garlic_Wr_TransPerf_Counter_Current__ClrCurDAGBTransPerfCntr__SHIFT 0x1f +#define ACP_DAGB_Garlic_Wr_TransPerf_Counter_Peak__PeakDAGBTransPerfCntrTime_MASK 0x1ffff +#define ACP_DAGB_Garlic_Wr_TransPerf_Counter_Peak__PeakDAGBTransPerfCntrTime__SHIFT 0x0 +#define ACP_DAGB_Garlic_Wr_TransPerf_Counter_Peak__ClrPeakDAGBTransPerfCntr_MASK 0x80000000 +#define ACP_DAGB_Garlic_Wr_TransPerf_Counter_Peak__ClrPeakDAGBTransPerfCntr__SHIFT 0x1f +#define ACP_DAGB_Garlic_Rd_TransPerf_Counter_Current__CurDAGBTransPerfCntrTime_MASK 0x1ffff +#define ACP_DAGB_Garlic_Rd_TransPerf_Counter_Current__CurDAGBTransPerfCntrTime__SHIFT 0x0 +#define ACP_DAGB_Garlic_Rd_TransPerf_Counter_Current__ClrCurDAGBTransPerfCntr_MASK 0x80000000 +#define ACP_DAGB_Garlic_Rd_TransPerf_Counter_Current__ClrCurDAGBTransPerfCntr__SHIFT 0x1f +#define ACP_DAGB_Garlic_Rd_TransPerf_Counter_Peak__PeakDAGBTransPerfCntrTime_MASK 0x1ffff +#define ACP_DAGB_Garlic_Rd_TransPerf_Counter_Peak__PeakDAGBTransPerfCntrTime__SHIFT 0x0 +#define ACP_DAGB_Garlic_Rd_TransPerf_Counter_Peak__ClrPeakDAGBTransPerfCntr_MASK 0x80000000 +#define ACP_DAGB_Garlic_Rd_TransPerf_Counter_Peak__ClrPeakDAGBTransPerfCntr__SHIFT 0x1f +#define ACP_DAGB_PAGE_SIZE_GRP_1__AXI2DAGBPageSize_MASK 0x3 +#define ACP_DAGB_PAGE_SIZE_GRP_1__AXI2DAGBPageSize__SHIFT 0x0 +#define ACP_DAGB_BASE_ADDR_GRP_1__AXI2DAGBBaseAddr_MASK 0xfffffff +#define ACP_DAGB_BASE_ADDR_GRP_1__AXI2DAGBBaseAddr__SHIFT 0x0 +#define ACP_DAGB_BASE_ADDR_GRP_1__AXI2DAGBSnoopSel_MASK 0x20000000 +#define ACP_DAGB_BASE_ADDR_GRP_1__AXI2DAGBSnoopSel__SHIFT 0x1d +#define ACP_DAGB_BASE_ADDR_GRP_1__AXI2DAGBTargetMemSel_MASK 0x40000000 +#define ACP_DAGB_BASE_ADDR_GRP_1__AXI2DAGBTargetMemSel__SHIFT 0x1e +#define ACP_DAGB_BASE_ADDR_GRP_1__AXI2DAGBGrpEnable_MASK 0x80000000 +#define ACP_DAGB_BASE_ADDR_GRP_1__AXI2DAGBGrpEnable__SHIFT 0x1f +#define ACP_DAGB_PAGE_SIZE_GRP_2__AXI2DAGBPageSize_MASK 0x3 +#define ACP_DAGB_PAGE_SIZE_GRP_2__AXI2DAGBPageSize__SHIFT 0x0 +#define ACP_DAGB_BASE_ADDR_GRP_2__AXI2DAGBBaseAddr_MASK 0xfffffff +#define ACP_DAGB_BASE_ADDR_GRP_2__AXI2DAGBBaseAddr__SHIFT 0x0 +#define ACP_DAGB_BASE_ADDR_GRP_2__AXI2DAGBSnoopSel_MASK 0x20000000 +#define ACP_DAGB_BASE_ADDR_GRP_2__AXI2DAGBSnoopSel__SHIFT 0x1d +#define ACP_DAGB_BASE_ADDR_GRP_2__AXI2DAGBTargetMemSel_MASK 0x40000000 +#define ACP_DAGB_BASE_ADDR_GRP_2__AXI2DAGBTargetMemSel__SHIFT 0x1e +#define ACP_DAGB_BASE_ADDR_GRP_2__AXI2DAGBGrpEnable_MASK 0x80000000 +#define ACP_DAGB_BASE_ADDR_GRP_2__AXI2DAGBGrpEnable__SHIFT 0x1f +#define ACP_DAGB_PAGE_SIZE_GRP_3__AXI2DAGBPageSize_MASK 0x3 +#define ACP_DAGB_PAGE_SIZE_GRP_3__AXI2DAGBPageSize__SHIFT 0x0 +#define ACP_DAGB_BASE_ADDR_GRP_3__AXI2DAGBBaseAddr_MASK 0xfffffff +#define ACP_DAGB_BASE_ADDR_GRP_3__AXI2DAGBBaseAddr__SHIFT 0x0 +#define ACP_DAGB_BASE_ADDR_GRP_3__AXI2DAGBSnoopSel_MASK 0x20000000 +#define ACP_DAGB_BASE_ADDR_GRP_3__AXI2DAGBSnoopSel__SHIFT 0x1d +#define ACP_DAGB_BASE_ADDR_GRP_3__AXI2DAGBTargetMemSel_MASK 0x40000000 +#define ACP_DAGB_BASE_ADDR_GRP_3__AXI2DAGBTargetMemSel__SHIFT 0x1e +#define ACP_DAGB_BASE_ADDR_GRP_3__AXI2DAGBGrpEnable_MASK 0x80000000 +#define ACP_DAGB_BASE_ADDR_GRP_3__AXI2DAGBGrpEnable__SHIFT 0x1f +#define ACP_DAGB_PAGE_SIZE_GRP_4__AXI2DAGBPageSize_MASK 0x3 +#define ACP_DAGB_PAGE_SIZE_GRP_4__AXI2DAGBPageSize__SHIFT 0x0 +#define ACP_DAGB_BASE_ADDR_GRP_4__AXI2DAGBBaseAddr_MASK 0xfffffff +#define ACP_DAGB_BASE_ADDR_GRP_4__AXI2DAGBBaseAddr__SHIFT 0x0 +#define ACP_DAGB_BASE_ADDR_GRP_4__AXI2DAGBSnoopSel_MASK 0x20000000 +#define ACP_DAGB_BASE_ADDR_GRP_4__AXI2DAGBSnoopSel__SHIFT 0x1d +#define ACP_DAGB_BASE_ADDR_GRP_4__AXI2DAGBTargetMemSel_MASK 0x40000000 +#define ACP_DAGB_BASE_ADDR_GRP_4__AXI2DAGBTargetMemSel__SHIFT 0x1e +#define ACP_DAGB_BASE_ADDR_GRP_4__AXI2DAGBGrpEnable_MASK 0x80000000 +#define ACP_DAGB_BASE_ADDR_GRP_4__AXI2DAGBGrpEnable__SHIFT 0x1f +#define ACP_DAGB_PAGE_SIZE_GRP_5__AXI2DAGBPageSize_MASK 0x3 +#define ACP_DAGB_PAGE_SIZE_GRP_5__AXI2DAGBPageSize__SHIFT 0x0 +#define ACP_DAGB_BASE_ADDR_GRP_5__AXI2DAGBBaseAddr_MASK 0xfffffff +#define ACP_DAGB_BASE_ADDR_GRP_5__AXI2DAGBBaseAddr__SHIFT 0x0 +#define ACP_DAGB_BASE_ADDR_GRP_5__AXI2DAGBSnoopSel_MASK 0x20000000 +#define ACP_DAGB_BASE_ADDR_GRP_5__AXI2DAGBSnoopSel__SHIFT 0x1d +#define ACP_DAGB_BASE_ADDR_GRP_5__AXI2DAGBTargetMemSel_MASK 0x40000000 +#define ACP_DAGB_BASE_ADDR_GRP_5__AXI2DAGBTargetMemSel__SHIFT 0x1e +#define ACP_DAGB_BASE_ADDR_GRP_5__AXI2DAGBGrpEnable_MASK 0x80000000 +#define ACP_DAGB_BASE_ADDR_GRP_5__AXI2DAGBGrpEnable__SHIFT 0x1f +#define ACP_DAGB_PAGE_SIZE_GRP_6__AXI2DAGBPageSize_MASK 0x3 +#define ACP_DAGB_PAGE_SIZE_GRP_6__AXI2DAGBPageSize__SHIFT 0x0 +#define ACP_DAGB_BASE_ADDR_GRP_6__AXI2DAGBBaseAddr_MASK 0xfffffff +#define ACP_DAGB_BASE_ADDR_GRP_6__AXI2DAGBBaseAddr__SHIFT 0x0 +#define ACP_DAGB_BASE_ADDR_GRP_6__AXI2DAGBSnoopSel_MASK 0x20000000 +#define ACP_DAGB_BASE_ADDR_GRP_6__AXI2DAGBSnoopSel__SHIFT 0x1d +#define ACP_DAGB_BASE_ADDR_GRP_6__AXI2DAGBTargetMemSel_MASK 0x40000000 +#define ACP_DAGB_BASE_ADDR_GRP_6__AXI2DAGBTargetMemSel__SHIFT 0x1e +#define ACP_DAGB_BASE_ADDR_GRP_6__AXI2DAGBGrpEnable_MASK 0x80000000 +#define ACP_DAGB_BASE_ADDR_GRP_6__AXI2DAGBGrpEnable__SHIFT 0x1f +#define ACP_DAGB_PAGE_SIZE_GRP_7__AXI2DAGBPageSize_MASK 0x3 +#define ACP_DAGB_PAGE_SIZE_GRP_7__AXI2DAGBPageSize__SHIFT 0x0 +#define ACP_DAGB_BASE_ADDR_GRP_7__AXI2DAGBBaseAddr_MASK 0xfffffff +#define ACP_DAGB_BASE_ADDR_GRP_7__AXI2DAGBBaseAddr__SHIFT 0x0 +#define ACP_DAGB_BASE_ADDR_GRP_7__AXI2DAGBSnoopSel_MASK 0x20000000 +#define ACP_DAGB_BASE_ADDR_GRP_7__AXI2DAGBSnoopSel__SHIFT 0x1d +#define ACP_DAGB_BASE_ADDR_GRP_7__AXI2DAGBTargetMemSel_MASK 0x40000000 +#define ACP_DAGB_BASE_ADDR_GRP_7__AXI2DAGBTargetMemSel__SHIFT 0x1e +#define ACP_DAGB_BASE_ADDR_GRP_7__AXI2DAGBGrpEnable_MASK 0x80000000 +#define ACP_DAGB_BASE_ADDR_GRP_7__AXI2DAGBGrpEnable__SHIFT 0x1f +#define ACP_DAGB_PAGE_SIZE_GRP_8__AXI2DAGBPageSize_MASK 0x3 +#define ACP_DAGB_PAGE_SIZE_GRP_8__AXI2DAGBPageSize__SHIFT 0x0 +#define ACP_DAGB_BASE_ADDR_GRP_8__AXI2DAGBBaseAddr_MASK 0xfffffff +#define ACP_DAGB_BASE_ADDR_GRP_8__AXI2DAGBBaseAddr__SHIFT 0x0 +#define ACP_DAGB_BASE_ADDR_GRP_8__AXI2DAGBSnoopSel_MASK 0x20000000 +#define ACP_DAGB_BASE_ADDR_GRP_8__AXI2DAGBSnoopSel__SHIFT 0x1d +#define ACP_DAGB_BASE_ADDR_GRP_8__AXI2DAGBTargetMemSel_MASK 0x40000000 +#define ACP_DAGB_BASE_ADDR_GRP_8__AXI2DAGBTargetMemSel__SHIFT 0x1e +#define ACP_DAGB_BASE_ADDR_GRP_8__AXI2DAGBGrpEnable_MASK 0x80000000 +#define ACP_DAGB_BASE_ADDR_GRP_8__AXI2DAGBGrpEnable__SHIFT 0x1f +#define ACP_DAGB_ATU_CTRL__AXI2DAGBCacheInvalidate_MASK 0x1 +#define ACP_DAGB_ATU_CTRL__AXI2DAGBCacheInvalidate__SHIFT 0x0 +#define ACP_CONTROL__ClkEn_MASK 0x1 +#define ACP_CONTROL__ClkEn__SHIFT 0x0 +#define ACP_CONTROL__JtagEn_MASK 0x400 +#define ACP_CONTROL__JtagEn__SHIFT 0xa +#define ACP_STATUS__ClkOn_MASK 0x1 +#define ACP_STATUS__ClkOn__SHIFT 0x0 +#define ACP_STATUS__ACPRefClkSpd_MASK 0x2 +#define ACP_STATUS__ACPRefClkSpd__SHIFT 0x1 +#define ACP_STATUS__SMUStutterLastEdge_MASK 0x4 +#define ACP_STATUS__SMUStutterLastEdge__SHIFT 0x2 +#define ACP_STATUS__MCStutterLastEdge_MASK 0x8 +#define ACP_STATUS__MCStutterLastEdge__SHIFT 0x3 +#define ACP_SOFT_RESET__SoftResetAud_MASK 0x100 +#define ACP_SOFT_RESET__SoftResetAud__SHIFT 0x8 +#define ACP_SOFT_RESET__SoftResetDMA_MASK 0x200 +#define ACP_SOFT_RESET__SoftResetDMA__SHIFT 0x9 +#define ACP_SOFT_RESET__InternalSoftResetMode_MASK 0x4000 +#define ACP_SOFT_RESET__InternalSoftResetMode__SHIFT 0xe +#define ACP_SOFT_RESET__ExternalSoftResetMode_MASK 0x8000 +#define ACP_SOFT_RESET__ExternalSoftResetMode__SHIFT 0xf +#define ACP_SOFT_RESET__SoftResetAudDone_MASK 0x1000000 +#define ACP_SOFT_RESET__SoftResetAudDone__SHIFT 0x18 +#define ACP_SOFT_RESET__SoftResetDMADone_MASK 0x2000000 +#define ACP_SOFT_RESET__SoftResetDMADone__SHIFT 0x19 +#define ACP_PwrMgmt_CNTL__SCLKSleepCntl_MASK 0x3 +#define ACP_PwrMgmt_CNTL__SCLKSleepCntl__SHIFT 0x0 +#define ACP_CAC_INDICATOR_CONTROL__ACP_Cac_Indicator_Counter_MASK 0xffff +#define ACP_CAC_INDICATOR_CONTROL__ACP_Cac_Indicator_Counter__SHIFT 0x0 +#define ACP_SMU_MAILBOX__ACP_SMU_Mailbox_MASK 0xffffffff +#define ACP_SMU_MAILBOX__ACP_SMU_Mailbox__SHIFT 0x0 +#define ACP_FUTURE_REG_SCLK_0__ACPFutureReg_MASK 0xffffffff +#define ACP_FUTURE_REG_SCLK_0__ACPFutureReg__SHIFT 0x0 +#define ACP_FUTURE_REG_SCLK_1__ACPFutureReg_MASK 0xffffffff +#define ACP_FUTURE_REG_SCLK_1__ACPFutureReg__SHIFT 0x0 +#define ACP_FUTURE_REG_SCLK_2__ACPFutureReg_MASK 0xffffffff +#define ACP_FUTURE_REG_SCLK_2__ACPFutureReg__SHIFT 0x0 +#define ACP_FUTURE_REG_SCLK_3__ACPFutureReg_MASK 0xffffffff +#define ACP_FUTURE_REG_SCLK_3__ACPFutureReg__SHIFT 0x0 +#define ACP_FUTURE_REG_SCLK_4__ACPFutureReg_MASK 0xffffffff +#define ACP_FUTURE_REG_SCLK_4__ACPFutureReg__SHIFT 0x0 +#define ACP_DAGB_DEBUG_CNT_ENABLE__garlic_wr_ask_cnt_enable_MASK 0x1 +#define ACP_DAGB_DEBUG_CNT_ENABLE__garlic_wr_ask_cnt_enable__SHIFT 0x0 +#define ACP_DAGB_DEBUG_CNT_ENABLE__garlic_wr_go_cnt_enable_MASK 0x2 +#define ACP_DAGB_DEBUG_CNT_ENABLE__garlic_wr_go_cnt_enable__SHIFT 0x1 +#define ACP_DAGB_DEBUG_CNT_ENABLE__garlic_wr_exp_respcnt_enable_MASK 0x4 +#define ACP_DAGB_DEBUG_CNT_ENABLE__garlic_wr_exp_respcnt_enable__SHIFT 0x2 +#define ACP_DAGB_DEBUG_CNT_ENABLE__garlic_wr_actual_respcnt_enable_MASK 0x8 +#define ACP_DAGB_DEBUG_CNT_ENABLE__garlic_wr_actual_respcnt_enable__SHIFT 0x3 +#define ACP_DAGB_DEBUG_CNT_ENABLE__garlic_rd_ask_cnt_enable_MASK 0x10 +#define ACP_DAGB_DEBUG_CNT_ENABLE__garlic_rd_ask_cnt_enable__SHIFT 0x4 +#define ACP_DAGB_DEBUG_CNT_ENABLE__garlic_rd_go_cnt_enable_MASK 0x20 +#define ACP_DAGB_DEBUG_CNT_ENABLE__garlic_rd_go_cnt_enable__SHIFT 0x5 +#define ACP_DAGB_DEBUG_CNT_ENABLE__garlic_rd_exp_respcnt_enable_MASK 0x40 +#define ACP_DAGB_DEBUG_CNT_ENABLE__garlic_rd_exp_respcnt_enable__SHIFT 0x6 +#define ACP_DAGB_DEBUG_CNT_ENABLE__garlic_rd_actual_respcnt_enable_MASK 0x80 +#define ACP_DAGB_DEBUG_CNT_ENABLE__garlic_rd_actual_respcnt_enable__SHIFT 0x7 +#define ACP_DAGB_DEBUG_CNT_ENABLE__onion_wr_ask_cnt_enable_MASK 0x100 +#define ACP_DAGB_DEBUG_CNT_ENABLE__onion_wr_ask_cnt_enable__SHIFT 0x8 +#define ACP_DAGB_DEBUG_CNT_ENABLE__onion_wr_go_cnt_enable_MASK 0x200 +#define ACP_DAGB_DEBUG_CNT_ENABLE__onion_wr_go_cnt_enable__SHIFT 0x9 +#define ACP_DAGB_DEBUG_CNT_ENABLE__onion_wr_exp_respcnt_enable_MASK 0x400 +#define ACP_DAGB_DEBUG_CNT_ENABLE__onion_wr_exp_respcnt_enable__SHIFT 0xa +#define ACP_DAGB_DEBUG_CNT_ENABLE__onion_wr_actual_respcnt_enable_MASK 0x800 +#define ACP_DAGB_DEBUG_CNT_ENABLE__onion_wr_actual_respcnt_enable__SHIFT 0xb +#define ACP_DAGB_DEBUG_CNT_ENABLE__onion_rd_ask_cnt_enable_MASK 0x1000 +#define ACP_DAGB_DEBUG_CNT_ENABLE__onion_rd_ask_cnt_enable__SHIFT 0xc +#define ACP_DAGB_DEBUG_CNT_ENABLE__onion_rd_go_cnt_enable_MASK 0x2000 +#define ACP_DAGB_DEBUG_CNT_ENABLE__onion_rd_go_cnt_enable__SHIFT 0xd +#define ACP_DAGB_DEBUG_CNT_ENABLE__onion_rd_exp_respcnt_enable_MASK 0x4000 +#define ACP_DAGB_DEBUG_CNT_ENABLE__onion_rd_exp_respcnt_enable__SHIFT 0xe +#define ACP_DAGB_DEBUG_CNT_ENABLE__onion_rd_actual_respcnt_enable_MASK 0x8000 +#define ACP_DAGB_DEBUG_CNT_ENABLE__onion_rd_actual_respcnt_enable__SHIFT 0xf +#define ACP_DAGBG_WR_ASK_CNT__garlic_wr_only_ask_cnt_MASK 0xffff +#define ACP_DAGBG_WR_ASK_CNT__garlic_wr_only_ask_cnt__SHIFT 0x0 +#define ACP_DAGBG_WR_GO_CNT__garlic_wr_only_go_cnt_MASK 0xffff +#define ACP_DAGBG_WR_GO_CNT__garlic_wr_only_go_cnt__SHIFT 0x0 +#define ACP_DAGBG_WR_EXP_RESP_CNT__garlic_wr_exp_resp_cnt_MASK 0xffff +#define ACP_DAGBG_WR_EXP_RESP_CNT__garlic_wr_exp_resp_cnt__SHIFT 0x0 +#define ACP_DAGBG_WR_ACTUAL_RESP_CNT__garlic_wr_actual_resp_cnt_MASK 0xffff +#define ACP_DAGBG_WR_ACTUAL_RESP_CNT__garlic_wr_actual_resp_cnt__SHIFT 0x0 +#define ACP_DAGBG_RD_ASK_CNT__garlic_rd_only_ask_cnt_MASK 0xffff +#define ACP_DAGBG_RD_ASK_CNT__garlic_rd_only_ask_cnt__SHIFT 0x0 +#define ACP_DAGBG_RD_GO_CNT__garlic_rd_only_go_cnt_MASK 0xffff +#define ACP_DAGBG_RD_GO_CNT__garlic_rd_only_go_cnt__SHIFT 0x0 +#define ACP_DAGBG_RD_EXP_RESP_CNT__garlic_rd_exp_resp_cnt_MASK 0xffff +#define ACP_DAGBG_RD_EXP_RESP_CNT__garlic_rd_exp_resp_cnt__SHIFT 0x0 +#define ACP_DAGBG_RD_ACTUAL_RESP_CNT__garlic_rd_actual_resp_cnt_MASK 0xffff +#define ACP_DAGBG_RD_ACTUAL_RESP_CNT__garlic_rd_actual_resp_cnt__SHIFT 0x0 +#define ACP_DAGBO_WR_ASK_CNT__onion_wr_only_ask_cnt_MASK 0xffff +#define ACP_DAGBO_WR_ASK_CNT__onion_wr_only_ask_cnt__SHIFT 0x0 +#define ACP_DAGBO_WR_GO_CNT__onion_wr_only_go_cnt_MASK 0xffff +#define ACP_DAGBO_WR_GO_CNT__onion_wr_only_go_cnt__SHIFT 0x0 +#define ACP_DAGBO_WR_EXP_RESP_CNT__onion_wr_exp_resp_cnt_MASK 0xffff +#define ACP_DAGBO_WR_EXP_RESP_CNT__onion_wr_exp_resp_cnt__SHIFT 0x0 +#define ACP_DAGBO_WR_ACTUAL_RESP_CNT__onion_wr_actual_resp_cnt_MASK 0xffff +#define ACP_DAGBO_WR_ACTUAL_RESP_CNT__onion_wr_actual_resp_cnt__SHIFT 0x0 +#define ACP_DAGBO_RD_ASK_CNT__onion_rd_only_ask_cnt_MASK 0xffff +#define ACP_DAGBO_RD_ASK_CNT__onion_rd_only_ask_cnt__SHIFT 0x0 +#define ACP_DAGBO_RD_GO_CNT__onion_rd_only_go_cnt_MASK 0xffff +#define ACP_DAGBO_RD_GO_CNT__onion_rd_only_go_cnt__SHIFT 0x0 +#define ACP_DAGBO_RD_EXP_RESP_CNT__onion_rd_exp_resp_cnt_MASK 0xffff +#define ACP_DAGBO_RD_EXP_RESP_CNT__onion_rd_exp_resp_cnt__SHIFT 0x0 +#define ACP_DAGBO_RD_ACTUAL_RESP_CNT__onion_rd_actual_resp_cnt_MASK 0xffff +#define ACP_DAGBO_RD_ACTUAL_RESP_CNT__onion_rd_actual_resp_cnt__SHIFT 0x0 +#define ACP_BRB_CONTROL__BRB_BlockSharedRAMArbCntrl_MASK 0xf +#define ACP_BRB_CONTROL__BRB_BlockSharedRAMArbCntrl__SHIFT 0x0 +#define ACP_EXTERNAL_INTR_ENB__ACPExtIntrEnb_MASK 0x1 +#define ACP_EXTERNAL_INTR_ENB__ACPExtIntrEnb__SHIFT 0x0 +#define ACP_EXTERNAL_INTR_CNTL__ACPErrMask_MASK 0x1 +#define ACP_EXTERNAL_INTR_CNTL__ACPErrMask__SHIFT 0x0 +#define ACP_EXTERNAL_INTR_CNTL__I2SMicDataAvMask_MASK 0x2 +#define ACP_EXTERNAL_INTR_CNTL__I2SMicDataAvMask__SHIFT 0x1 +#define ACP_EXTERNAL_INTR_CNTL__I2SSpkr0DataEmptyMask_MASK 0x4 +#define ACP_EXTERNAL_INTR_CNTL__I2SSpkr0DataEmptyMask__SHIFT 0x2 +#define ACP_EXTERNAL_INTR_CNTL__I2SSpkr1DataEmptyMask_MASK 0x8 +#define ACP_EXTERNAL_INTR_CNTL__I2SSpkr1DataEmptyMask__SHIFT 0x3 +#define ACP_EXTERNAL_INTR_CNTL__I2SBTDataAvMask_MASK 0x10 +#define ACP_EXTERNAL_INTR_CNTL__I2SBTDataAvMask__SHIFT 0x4 +#define ACP_EXTERNAL_INTR_CNTL__AzaliaIntrMask_MASK 0x40 +#define ACP_EXTERNAL_INTR_CNTL__AzaliaIntrMask__SHIFT 0x6 +#define ACP_EXTERNAL_INTR_CNTL__DSP0TimeoutMask_MASK 0x100 +#define ACP_EXTERNAL_INTR_CNTL__DSP0TimeoutMask__SHIFT 0x8 +#define ACP_EXTERNAL_INTR_CNTL__DSP1TimeoutMask_MASK 0x200 +#define ACP_EXTERNAL_INTR_CNTL__DSP1TimeoutMask__SHIFT 0x9 +#define ACP_EXTERNAL_INTR_CNTL__DSP2TimeoutMask_MASK 0x400 +#define ACP_EXTERNAL_INTR_CNTL__DSP2TimeoutMask__SHIFT 0xa +#define ACP_EXTERNAL_INTR_CNTL__I2SBTDataEmptyMask_MASK 0x800 +#define ACP_EXTERNAL_INTR_CNTL__I2SBTDataEmptyMask__SHIFT 0xb +#define ACP_EXTERNAL_INTR_CNTL__DMAIOCMask_MASK 0xffff0000 +#define ACP_EXTERNAL_INTR_CNTL__DMAIOCMask__SHIFT 0x10 +#define ACP_ERROR_SOURCE_STS__ACPRegUdefADDRErr_MASK 0x1 +#define ACP_ERROR_SOURCE_STS__ACPRegUdefADDRErr__SHIFT 0x0 +#define ACP_ERROR_SOURCE_STS__ACPRegUdefADDRErrSource_MASK 0xe +#define ACP_ERROR_SOURCE_STS__ACPRegUdefADDRErrSource__SHIFT 0x1 +#define ACP_ERROR_SOURCE_STS__ACPRegUdefADDRErrSourceOver_MASK 0x10 +#define ACP_ERROR_SOURCE_STS__ACPRegUdefADDRErrSourceOver__SHIFT 0x4 +#define ACP_ERROR_SOURCE_STS__BRBAddrErr_MASK 0x20 +#define ACP_ERROR_SOURCE_STS__BRBAddrErr__SHIFT 0x5 +#define ACP_ERROR_SOURCE_STS__BRBAddrErrSource_MASK 0x3c0 +#define ACP_ERROR_SOURCE_STS__BRBAddrErrSource__SHIFT 0x6 +#define ACP_ERROR_SOURCE_STS__BRBAddrErrSourceOver_MASK 0x400 +#define ACP_ERROR_SOURCE_STS__BRBAddrErrSourceOver__SHIFT 0xa +#define ACP_ERROR_SOURCE_STS__I2SMicOverFlowErr_MASK 0x800 +#define ACP_ERROR_SOURCE_STS__I2SMicOverFlowErr__SHIFT 0xb +#define ACP_ERROR_SOURCE_STS__I2SSpeaker0OverFlowErr_MASK 0x1000 +#define ACP_ERROR_SOURCE_STS__I2SSpeaker0OverFlowErr__SHIFT 0xc +#define ACP_ERROR_SOURCE_STS__I2SSpeaker1OverFlowErr_MASK 0x2000 +#define ACP_ERROR_SOURCE_STS__I2SSpeaker1OverFlowErr__SHIFT 0xd +#define ACP_ERROR_SOURCE_STS__I2SBTRxFifoOverFlowErr_MASK 0x4000 +#define ACP_ERROR_SOURCE_STS__I2SBTRxFifoOverFlowErr__SHIFT 0xe +#define ACP_ERROR_SOURCE_STS__DSPAdrTransRangeErr_MASK 0x8000 +#define ACP_ERROR_SOURCE_STS__DSPAdrTransRangeErr__SHIFT 0xf +#define ACP_ERROR_SOURCE_STS__DSPAdrTransRangeErrSource_MASK 0x70000 +#define ACP_ERROR_SOURCE_STS__DSPAdrTransRangeErrSource__SHIFT 0x10 +#define ACP_ERROR_SOURCE_STS__DSPAdrTransRangeErrSourceOver_MASK 0x80000 +#define ACP_ERROR_SOURCE_STS__DSPAdrTransRangeErrSourceOver__SHIFT 0x13 +#define ACP_ERROR_SOURCE_STS__DAGBErr_MASK 0x100000 +#define ACP_ERROR_SOURCE_STS__DAGBErr__SHIFT 0x14 +#define ACP_ERROR_SOURCE_STS__DAGBErrSource_MASK 0x1e00000 +#define ACP_ERROR_SOURCE_STS__DAGBErrSource__SHIFT 0x15 +#define ACP_ERROR_SOURCE_STS__DAGBErrSourceOver_MASK 0x2000000 +#define ACP_ERROR_SOURCE_STS__DAGBErrSourceOver__SHIFT 0x19 +#define ACP_ERROR_SOURCE_STS__DMATermOnErr_MASK 0x4000000 +#define ACP_ERROR_SOURCE_STS__DMATermOnErr__SHIFT 0x1a +#define ACP_ERROR_SOURCE_STS__I2SBTTxFifoOverFlowErr_MASK 0x10000000 +#define ACP_ERROR_SOURCE_STS__I2SBTTxFifoOverFlowErr__SHIFT 0x1c +#define ACP_DSP_SW_INTR_TRIG__TrigSWIntHostDSP0_MASK 0x1 +#define ACP_DSP_SW_INTR_TRIG__TrigSWIntHostDSP0__SHIFT 0x0 +#define ACP_DSP_SW_INTR_TRIG__TrigSWIntHostDSP1_MASK 0x2 +#define ACP_DSP_SW_INTR_TRIG__TrigSWIntHostDSP1__SHIFT 0x1 +#define ACP_DSP_SW_INTR_TRIG__TrigSWIntHostDSP2_MASK 0x4 +#define ACP_DSP_SW_INTR_TRIG__TrigSWIntHostDSP2__SHIFT 0x2 +#define ACP_DSP_SW_INTR_TRIG__TrigSWIntDSPnDSP0_MASK 0x100 +#define ACP_DSP_SW_INTR_TRIG__TrigSWIntDSPnDSP0__SHIFT 0x8 +#define ACP_DSP_SW_INTR_TRIG__TrigSWIntDSPnDSP1_MASK 0x200 +#define ACP_DSP_SW_INTR_TRIG__TrigSWIntDSPnDSP1__SHIFT 0x9 +#define ACP_DSP_SW_INTR_TRIG__TrigSWIntDSPnDSP2_MASK 0x400 +#define ACP_DSP_SW_INTR_TRIG__TrigSWIntDSPnDSP2__SHIFT 0xa +#define ACP_DSP_SW_INTR_TRIG__TrigSWIntDSP0Host_MASK 0x10000 +#define ACP_DSP_SW_INTR_TRIG__TrigSWIntDSP0Host__SHIFT 0x10 +#define ACP_DSP_SW_INTR_TRIG__TrigSWIntDSP1Host_MASK 0x20000 +#define ACP_DSP_SW_INTR_TRIG__TrigSWIntDSP1Host__SHIFT 0x11 +#define ACP_DSP_SW_INTR_TRIG__TrigSWIntDSP2Host_MASK 0x40000 +#define ACP_DSP_SW_INTR_TRIG__TrigSWIntDSP2Host__SHIFT 0x12 +#define ACP_DSP_SW_INTR_CNTL__EnbSWIntHostDSP0_MASK 0x1 +#define ACP_DSP_SW_INTR_CNTL__EnbSWIntHostDSP0__SHIFT 0x0 +#define ACP_DSP_SW_INTR_CNTL__EnbSWIntHostDSP1_MASK 0x2 +#define ACP_DSP_SW_INTR_CNTL__EnbSWIntHostDSP1__SHIFT 0x1 +#define ACP_DSP_SW_INTR_CNTL__EnbSWIntHostDSP2_MASK 0x4 +#define ACP_DSP_SW_INTR_CNTL__EnbSWIntHostDSP2__SHIFT 0x2 +#define ACP_DSP_SW_INTR_CNTL__EnbSWIntDSPnDSP0_MASK 0x100 +#define ACP_DSP_SW_INTR_CNTL__EnbSWIntDSPnDSP0__SHIFT 0x8 +#define ACP_DSP_SW_INTR_CNTL__EnbSWIntDSPnDSP1_MASK 0x200 +#define ACP_DSP_SW_INTR_CNTL__EnbSWIntDSPnDSP1__SHIFT 0x9 +#define ACP_DSP_SW_INTR_CNTL__EnbSWIntDSPnDSP2_MASK 0x400 +#define ACP_DSP_SW_INTR_CNTL__EnbSWIntDSPnDSP2__SHIFT 0xa +#define ACP_DSP_SW_INTR_CNTL__EnbKernelIntrDSP0Mask_MASK 0x10000 +#define ACP_DSP_SW_INTR_CNTL__EnbKernelIntrDSP0Mask__SHIFT 0x10 +#define ACP_DSP_SW_INTR_CNTL__EmbKernelIntrDSP1Mask_MASK 0x20000 +#define ACP_DSP_SW_INTR_CNTL__EmbKernelIntrDSP1Mask__SHIFT 0x11 +#define ACP_DSP_SW_INTR_CNTL__EmbKernelIntrDSP2Mask_MASK 0x40000 +#define ACP_DSP_SW_INTR_CNTL__EmbKernelIntrDSP2Mask__SHIFT 0x12 +#define ACP_DAGBG_TIMEOUT_CNTL__DAGBGTimeoutValue_MASK 0x3ffff +#define ACP_DAGBG_TIMEOUT_CNTL__DAGBGTimeoutValue__SHIFT 0x0 +#define ACP_DAGBG_TIMEOUT_CNTL__CntEn_MASK 0x80000000 +#define ACP_DAGBG_TIMEOUT_CNTL__CntEn__SHIFT 0x1f +#define ACP_DAGBO_TIMEOUT_CNTL__DAGBOTimeoutValue_MASK 0x3ffff +#define ACP_DAGBO_TIMEOUT_CNTL__DAGBOTimeoutValue__SHIFT 0x0 +#define ACP_DAGBO_TIMEOUT_CNTL__CntEn_MASK 0x80000000 +#define ACP_DAGBO_TIMEOUT_CNTL__CntEn__SHIFT 0x1f +#define ACP_EXTERNAL_INTR_STAT__ACPErrStat_MASK 0x1 +#define ACP_EXTERNAL_INTR_STAT__ACPErrStat__SHIFT 0x0 +#define ACP_EXTERNAL_INTR_STAT__ACPErrAck_MASK 0x1 +#define ACP_EXTERNAL_INTR_STAT__ACPErrAck__SHIFT 0x0 +#define ACP_EXTERNAL_INTR_STAT__I2SMicDataAvStat_MASK 0x2 +#define ACP_EXTERNAL_INTR_STAT__I2SMicDataAvStat__SHIFT 0x1 +#define ACP_EXTERNAL_INTR_STAT__I2SMicDataAvAck_MASK 0x2 +#define ACP_EXTERNAL_INTR_STAT__I2SMicDataAvAck__SHIFT 0x1 +#define ACP_EXTERNAL_INTR_STAT__I2SSpkr0DataEmptyStat_MASK 0x4 +#define ACP_EXTERNAL_INTR_STAT__I2SSpkr0DataEmptyStat__SHIFT 0x2 +#define ACP_EXTERNAL_INTR_STAT__I2SSpkr0DataEmptyAck_MASK 0x4 +#define ACP_EXTERNAL_INTR_STAT__I2SSpkr0DataEmptyAck__SHIFT 0x2 +#define ACP_EXTERNAL_INTR_STAT__I2SSpkr1DataEmptyStat_MASK 0x8 +#define ACP_EXTERNAL_INTR_STAT__I2SSpkr1DataEmptyStat__SHIFT 0x3 +#define ACP_EXTERNAL_INTR_STAT__I2SSpkr1DataEmptyAck_MASK 0x8 +#define ACP_EXTERNAL_INTR_STAT__I2SSpkr1DataEmptyAck__SHIFT 0x3 +#define ACP_EXTERNAL_INTR_STAT__I2SBTDataAvStat_MASK 0x10 +#define ACP_EXTERNAL_INTR_STAT__I2SBTDataAvStat__SHIFT 0x4 +#define ACP_EXTERNAL_INTR_STAT__I2SBTDataAvAck_MASK 0x10 +#define ACP_EXTERNAL_INTR_STAT__I2SBTDataAvAck__SHIFT 0x4 +#define ACP_EXTERNAL_INTR_STAT__AzaliaIntrStat_MASK 0x40 +#define ACP_EXTERNAL_INTR_STAT__AzaliaIntrStat__SHIFT 0x6 +#define ACP_EXTERNAL_INTR_STAT__AzaliaIntrAck_MASK 0x40 +#define ACP_EXTERNAL_INTR_STAT__AzaliaIntrAck__SHIFT 0x6 +#define ACP_EXTERNAL_INTR_STAT__DSP0TimeoutStat_MASK 0x100 +#define ACP_EXTERNAL_INTR_STAT__DSP0TimeoutStat__SHIFT 0x8 +#define ACP_EXTERNAL_INTR_STAT__DSP0TimeoutAck_MASK 0x100 +#define ACP_EXTERNAL_INTR_STAT__DSP0TimeoutAck__SHIFT 0x8 +#define ACP_EXTERNAL_INTR_STAT__DSP1TimeoutStat_MASK 0x200 +#define ACP_EXTERNAL_INTR_STAT__DSP1TimeoutStat__SHIFT 0x9 +#define ACP_EXTERNAL_INTR_STAT__DSP1TimeoutAck_MASK 0x200 +#define ACP_EXTERNAL_INTR_STAT__DSP1TimeoutAck__SHIFT 0x9 +#define ACP_EXTERNAL_INTR_STAT__DSP2TimeoutStat_MASK 0x400 +#define ACP_EXTERNAL_INTR_STAT__DSP2TimeoutStat__SHIFT 0xa +#define ACP_EXTERNAL_INTR_STAT__DSP2TimeoutAck_MASK 0x400 +#define ACP_EXTERNAL_INTR_STAT__DSP2TimeoutAck__SHIFT 0xa +#define ACP_EXTERNAL_INTR_STAT__I2SBTDataEmptyStat_MASK 0x800 +#define ACP_EXTERNAL_INTR_STAT__I2SBTDataEmptyStat__SHIFT 0xb +#define ACP_EXTERNAL_INTR_STAT__I2SBTDataEmptyAck_MASK 0x800 +#define ACP_EXTERNAL_INTR_STAT__I2SBTDataEmptyAck__SHIFT 0xb +#define ACP_EXTERNAL_INTR_STAT__DMAIOCStat_MASK 0xffff0000 +#define ACP_EXTERNAL_INTR_STAT__DMAIOCStat__SHIFT 0x10 +#define ACP_EXTERNAL_INTR_STAT__DMAIOCAck_MASK 0xffff0000 +#define ACP_EXTERNAL_INTR_STAT__DMAIOCAck__SHIFT 0x10 +#define ACP_DSP_SW_INTR_STAT__SWIntHostDSP0Stat_MASK 0x1 +#define ACP_DSP_SW_INTR_STAT__SWIntHostDSP0Stat__SHIFT 0x0 +#define ACP_DSP_SW_INTR_STAT__SWIntHostDSP0Ack_MASK 0x1 +#define ACP_DSP_SW_INTR_STAT__SWIntHostDSP0Ack__SHIFT 0x0 +#define ACP_DSP_SW_INTR_STAT__SWIntHostDSP1Stat_MASK 0x2 +#define ACP_DSP_SW_INTR_STAT__SWIntHostDSP1Stat__SHIFT 0x1 +#define ACP_DSP_SW_INTR_STAT__SWIntHostDSP1Ack_MASK 0x2 +#define ACP_DSP_SW_INTR_STAT__SWIntHostDSP1Ack__SHIFT 0x1 +#define ACP_DSP_SW_INTR_STAT__SWIntHostDSP2Stat_MASK 0x4 +#define ACP_DSP_SW_INTR_STAT__SWIntHostDSP2Stat__SHIFT 0x2 +#define ACP_DSP_SW_INTR_STAT__SWIntHostDSP2Ack_MASK 0x4 +#define ACP_DSP_SW_INTR_STAT__SWIntHostDSP2Ack__SHIFT 0x2 +#define ACP_DSP_SW_INTR_STAT__SWIntDSPnDSP0Stat_MASK 0x100 +#define ACP_DSP_SW_INTR_STAT__SWIntDSPnDSP0Stat__SHIFT 0x8 +#define ACP_DSP_SW_INTR_STAT__SWIntDSPnDSP0Ack_MASK 0x100 +#define ACP_DSP_SW_INTR_STAT__SWIntDSPnDSP0Ack__SHIFT 0x8 +#define ACP_DSP_SW_INTR_STAT__SWIntDSPnDSP1Stat_MASK 0x200 +#define ACP_DSP_SW_INTR_STAT__SWIntDSPnDSP1Stat__SHIFT 0x9 +#define ACP_DSP_SW_INTR_STAT__SWIntDSPnDSP1Ack_MASK 0x200 +#define ACP_DSP_SW_INTR_STAT__SWIntDSPnDSP1Ack__SHIFT 0x9 +#define ACP_DSP_SW_INTR_STAT__SWIntDSPnDSP2Stat_MASK 0x400 +#define ACP_DSP_SW_INTR_STAT__SWIntDSPnDSP2Stat__SHIFT 0xa +#define ACP_DSP_SW_INTR_STAT__SWIntDSPnDSP2Ack_MASK 0x400 +#define ACP_DSP_SW_INTR_STAT__SWIntDSPnDSP2Ack__SHIFT 0xa +#define ACP_DSP_SW_INTR_STAT__SWKernelIntrDSP0Stat_MASK 0x10000 +#define ACP_DSP_SW_INTR_STAT__SWKernelIntrDSP0Stat__SHIFT 0x10 +#define ACP_DSP_SW_INTR_STAT__SWKernelIntrDSP0Ack_MASK 0x10000 +#define ACP_DSP_SW_INTR_STAT__SWKernelIntrDSP0Ack__SHIFT 0x10 +#define ACP_DSP_SW_INTR_STAT__SWKernelIntrDSP1Stat_MASK 0x20000 +#define ACP_DSP_SW_INTR_STAT__SWKernelIntrDSP1Stat__SHIFT 0x11 +#define ACP_DSP_SW_INTR_STAT__SWKernelIntrDSP1Ack_MASK 0x20000 +#define ACP_DSP_SW_INTR_STAT__SWKernelIntrDSP1Ack__SHIFT 0x11 +#define ACP_DSP_SW_INTR_STAT__SWKernelIntrDSP2Stat_MASK 0x40000 +#define ACP_DSP_SW_INTR_STAT__SWKernelIntrDSP2Stat__SHIFT 0x12 +#define ACP_DSP_SW_INTR_STAT__SWKernelIntrDSP2Ack_MASK 0x40000 +#define ACP_DSP_SW_INTR_STAT__SWKernelIntrDSP2Ack__SHIFT 0x12 +#define ACP_DSP0_INTR_CNTL__ACPErrMask_MASK 0x1 +#define ACP_DSP0_INTR_CNTL__ACPErrMask__SHIFT 0x0 +#define ACP_DSP0_INTR_CNTL__I2SMicDataAvMask_MASK 0x2 +#define ACP_DSP0_INTR_CNTL__I2SMicDataAvMask__SHIFT 0x1 +#define ACP_DSP0_INTR_CNTL__I2SSpkr0DataEmptyMask_MASK 0x4 +#define ACP_DSP0_INTR_CNTL__I2SSpkr0DataEmptyMask__SHIFT 0x2 +#define ACP_DSP0_INTR_CNTL__I2SSpkr1DataEmptyMask_MASK 0x8 +#define ACP_DSP0_INTR_CNTL__I2SSpkr1DataEmptyMask__SHIFT 0x3 +#define ACP_DSP0_INTR_CNTL__I2SBTDataAvMask_MASK 0x10 +#define ACP_DSP0_INTR_CNTL__I2SBTDataAvMask__SHIFT 0x4 +#define ACP_DSP0_INTR_CNTL__AzaliaIntrMask_MASK 0x40 +#define ACP_DSP0_INTR_CNTL__AzaliaIntrMask__SHIFT 0x6 +#define ACP_DSP0_INTR_CNTL__SMUMailboxWriteMask_MASK 0x100 +#define ACP_DSP0_INTR_CNTL__SMUMailboxWriteMask__SHIFT 0x8 +#define ACP_DSP0_INTR_CNTL__SMUStutterStatusMask_MASK 0x200 +#define ACP_DSP0_INTR_CNTL__SMUStutterStatusMask__SHIFT 0x9 +#define ACP_DSP0_INTR_CNTL__MCStutterStatusMask_MASK 0x400 +#define ACP_DSP0_INTR_CNTL__MCStutterStatusMask__SHIFT 0xa +#define ACP_DSP0_INTR_CNTL__DSPExtTimerMask_MASK 0x800 +#define ACP_DSP0_INTR_CNTL__DSPExtTimerMask__SHIFT 0xb +#define ACP_DSP0_INTR_CNTL__DSPSemRespMask_MASK 0x1000 +#define ACP_DSP0_INTR_CNTL__DSPSemRespMask__SHIFT 0xc +#define ACP_DSP0_INTR_CNTL__I2SBTDataEmptyMask_MASK 0x2000 +#define ACP_DSP0_INTR_CNTL__I2SBTDataEmptyMask__SHIFT 0xd +#define ACP_DSP0_INTR_CNTL__DMAIOCMask_MASK 0xffff0000 +#define ACP_DSP0_INTR_CNTL__DMAIOCMask__SHIFT 0x10 +#define ACP_DSP0_INTR_STAT__ACPErrStat_MASK 0x1 +#define ACP_DSP0_INTR_STAT__ACPErrStat__SHIFT 0x0 +#define ACP_DSP0_INTR_STAT__ACPErrAck_MASK 0x1 +#define ACP_DSP0_INTR_STAT__ACPErrAck__SHIFT 0x0 +#define ACP_DSP0_INTR_STAT__I2SMicDataAvStat_MASK 0x2 +#define ACP_DSP0_INTR_STAT__I2SMicDataAvStat__SHIFT 0x1 +#define ACP_DSP0_INTR_STAT__I2SMicDataAvAck_MASK 0x2 +#define ACP_DSP0_INTR_STAT__I2SMicDataAvAck__SHIFT 0x1 +#define ACP_DSP0_INTR_STAT__I2SSpkr0DataEmptyStat_MASK 0x4 +#define ACP_DSP0_INTR_STAT__I2SSpkr0DataEmptyStat__SHIFT 0x2 +#define ACP_DSP0_INTR_STAT__I2SSpkr0DataEmptyAck_MASK 0x4 +#define ACP_DSP0_INTR_STAT__I2SSpkr0DataEmptyAck__SHIFT 0x2 +#define ACP_DSP0_INTR_STAT__I2SSpkr1DataEmptyStat_MASK 0x8 +#define ACP_DSP0_INTR_STAT__I2SSpkr1DataEmptyStat__SHIFT 0x3 +#define ACP_DSP0_INTR_STAT__I2SSpkr1DataEmptyAck_MASK 0x8 +#define ACP_DSP0_INTR_STAT__I2SSpkr1DataEmptyAck__SHIFT 0x3 +#define ACP_DSP0_INTR_STAT__I2SBTDataAvStat_MASK 0x10 +#define ACP_DSP0_INTR_STAT__I2SBTDataAvStat__SHIFT 0x4 +#define ACP_DSP0_INTR_STAT__I2SBTDataAvAck_MASK 0x10 +#define ACP_DSP0_INTR_STAT__I2SBTDataAvAck__SHIFT 0x4 +#define ACP_DSP0_INTR_STAT__AzaliaIntrStat_MASK 0x40 +#define ACP_DSP0_INTR_STAT__AzaliaIntrStat__SHIFT 0x6 +#define ACP_DSP0_INTR_STAT__AzaliaIntrAck_MASK 0x40 +#define ACP_DSP0_INTR_STAT__AzaliaIntrAck__SHIFT 0x6 +#define ACP_DSP0_INTR_STAT__SMUMailboxWriteStat_MASK 0x100 +#define ACP_DSP0_INTR_STAT__SMUMailboxWriteStat__SHIFT 0x8 +#define ACP_DSP0_INTR_STAT__SMUMailboxWriteAck_MASK 0x100 +#define ACP_DSP0_INTR_STAT__SMUMailboxWriteAck__SHIFT 0x8 +#define ACP_DSP0_INTR_STAT__SMUStutterStatusStat_MASK 0x200 +#define ACP_DSP0_INTR_STAT__SMUStutterStatusStat__SHIFT 0x9 +#define ACP_DSP0_INTR_STAT__SMUStutterStatusAck_MASK 0x200 +#define ACP_DSP0_INTR_STAT__SMUStutterStatusAck__SHIFT 0x9 +#define ACP_DSP0_INTR_STAT__MCStutterStatusStat_MASK 0x400 +#define ACP_DSP0_INTR_STAT__MCStutterStatusStat__SHIFT 0xa +#define ACP_DSP0_INTR_STAT__MCStutterStatusAck_MASK 0x400 +#define ACP_DSP0_INTR_STAT__MCStutterStatusAck__SHIFT 0xa +#define ACP_DSP0_INTR_STAT__DSPExtTimerStat_MASK 0x800 +#define ACP_DSP0_INTR_STAT__DSPExtTimerStat__SHIFT 0xb +#define ACP_DSP0_INTR_STAT__DSPExtTimerAck_MASK 0x800 +#define ACP_DSP0_INTR_STAT__DSPExtTimerAck__SHIFT 0xb +#define ACP_DSP0_INTR_STAT__DSPSemRespStat_MASK 0x1000 +#define ACP_DSP0_INTR_STAT__DSPSemRespStat__SHIFT 0xc +#define ACP_DSP0_INTR_STAT__DSPSemRespAck_MASK 0x1000 +#define ACP_DSP0_INTR_STAT__DSPSemRespAck__SHIFT 0xc +#define ACP_DSP0_INTR_STAT__I2SBTDataEmptyStat_MASK 0x2000 +#define ACP_DSP0_INTR_STAT__I2SBTDataEmptyStat__SHIFT 0xd +#define ACP_DSP0_INTR_STAT__I2SBTDataEmptyAck_MASK 0x2000 +#define ACP_DSP0_INTR_STAT__I2SBTDataEmptyAck__SHIFT 0xd +#define ACP_DSP0_INTR_STAT__DMAIOCStat_MASK 0xffff0000 +#define ACP_DSP0_INTR_STAT__DMAIOCStat__SHIFT 0x10 +#define ACP_DSP0_INTR_STAT__DMAIOCAck_MASK 0xffff0000 +#define ACP_DSP0_INTR_STAT__DMAIOCAck__SHIFT 0x10 +#define ACP_DSP0_TIMEOUT_CNTL__DSP0TimeoutValue_MASK 0x3ffff +#define ACP_DSP0_TIMEOUT_CNTL__DSP0TimeoutValue__SHIFT 0x0 +#define ACP_DSP0_TIMEOUT_CNTL__CntEn_MASK 0x80000000 +#define ACP_DSP0_TIMEOUT_CNTL__CntEn__SHIFT 0x1f +#define ACP_DSP1_INTR_CNTL__ACPErrMask_MASK 0x1 +#define ACP_DSP1_INTR_CNTL__ACPErrMask__SHIFT 0x0 +#define ACP_DSP1_INTR_CNTL__I2SMicDataAvMask_MASK 0x2 +#define ACP_DSP1_INTR_CNTL__I2SMicDataAvMask__SHIFT 0x1 +#define ACP_DSP1_INTR_CNTL__I2SSpkr0DataEmptyMask_MASK 0x4 +#define ACP_DSP1_INTR_CNTL__I2SSpkr0DataEmptyMask__SHIFT 0x2 +#define ACP_DSP1_INTR_CNTL__I2SSpkr1DataEmptyMask_MASK 0x8 +#define ACP_DSP1_INTR_CNTL__I2SSpkr1DataEmptyMask__SHIFT 0x3 +#define ACP_DSP1_INTR_CNTL__I2SBTDataAvMask_MASK 0x10 +#define ACP_DSP1_INTR_CNTL__I2SBTDataAvMask__SHIFT 0x4 +#define ACP_DSP1_INTR_CNTL__AzaliaIntrMask_MASK 0x40 +#define ACP_DSP1_INTR_CNTL__AzaliaIntrMask__SHIFT 0x6 +#define ACP_DSP1_INTR_CNTL__SMUMailboxWriteMask_MASK 0x100 +#define ACP_DSP1_INTR_CNTL__SMUMailboxWriteMask__SHIFT 0x8 +#define ACP_DSP1_INTR_CNTL__SMUStutterStatusMask_MASK 0x200 +#define ACP_DSP1_INTR_CNTL__SMUStutterStatusMask__SHIFT 0x9 +#define ACP_DSP1_INTR_CNTL__MCStutterStatusMask_MASK 0x400 +#define ACP_DSP1_INTR_CNTL__MCStutterStatusMask__SHIFT 0xa +#define ACP_DSP1_INTR_CNTL__DSPExtTimerMask_MASK 0x800 +#define ACP_DSP1_INTR_CNTL__DSPExtTimerMask__SHIFT 0xb +#define ACP_DSP1_INTR_CNTL__DSPSemRespMask_MASK 0x1000 +#define ACP_DSP1_INTR_CNTL__DSPSemRespMask__SHIFT 0xc +#define ACP_DSP1_INTR_CNTL__I2SBTDataEmptyMask_MASK 0x2000 +#define ACP_DSP1_INTR_CNTL__I2SBTDataEmptyMask__SHIFT 0xd +#define ACP_DSP1_INTR_CNTL__DMAIOCMask_MASK 0xffff0000 +#define ACP_DSP1_INTR_CNTL__DMAIOCMask__SHIFT 0x10 +#define ACP_DSP1_INTR_STAT__ACPErrStat_MASK 0x1 +#define ACP_DSP1_INTR_STAT__ACPErrStat__SHIFT 0x0 +#define ACP_DSP1_INTR_STAT__ACPErrAck_MASK 0x1 +#define ACP_DSP1_INTR_STAT__ACPErrAck__SHIFT 0x0 +#define ACP_DSP1_INTR_STAT__I2SMicDataAvStat_MASK 0x2 +#define ACP_DSP1_INTR_STAT__I2SMicDataAvStat__SHIFT 0x1 +#define ACP_DSP1_INTR_STAT__I2SMicDataAvAck_MASK 0x2 +#define ACP_DSP1_INTR_STAT__I2SMicDataAvAck__SHIFT 0x1 +#define ACP_DSP1_INTR_STAT__I2SSpkr0DataEmptyStat_MASK 0x4 +#define ACP_DSP1_INTR_STAT__I2SSpkr0DataEmptyStat__SHIFT 0x2 +#define ACP_DSP1_INTR_STAT__I2SSpkr0DataEmptyAck_MASK 0x4 +#define ACP_DSP1_INTR_STAT__I2SSpkr0DataEmptyAck__SHIFT 0x2 +#define ACP_DSP1_INTR_STAT__I2SSpkr1DataEmptyStat_MASK 0x8 +#define ACP_DSP1_INTR_STAT__I2SSpkr1DataEmptyStat__SHIFT 0x3 +#define ACP_DSP1_INTR_STAT__I2SSpkr1DataEmptyAck_MASK 0x8 +#define ACP_DSP1_INTR_STAT__I2SSpkr1DataEmptyAck__SHIFT 0x3 +#define ACP_DSP1_INTR_STAT__I2SBTDataAvStat_MASK 0x10 +#define ACP_DSP1_INTR_STAT__I2SBTDataAvStat__SHIFT 0x4 +#define ACP_DSP1_INTR_STAT__I2SBTDataAvAck_MASK 0x10 +#define ACP_DSP1_INTR_STAT__I2SBTDataAvAck__SHIFT 0x4 +#define ACP_DSP1_INTR_STAT__AzaliaIntrStat_MASK 0x40 +#define ACP_DSP1_INTR_STAT__AzaliaIntrStat__SHIFT 0x6 +#define ACP_DSP1_INTR_STAT__AzaliaIntrAck_MASK 0x40 +#define ACP_DSP1_INTR_STAT__AzaliaIntrAck__SHIFT 0x6 +#define ACP_DSP1_INTR_STAT__SMUMailboxWriteStat_MASK 0x100 +#define ACP_DSP1_INTR_STAT__SMUMailboxWriteStat__SHIFT 0x8 +#define ACP_DSP1_INTR_STAT__SMUMailboxWriteAck_MASK 0x100 +#define ACP_DSP1_INTR_STAT__SMUMailboxWriteAck__SHIFT 0x8 +#define ACP_DSP1_INTR_STAT__SMUStutterStatusStat_MASK 0x200 +#define ACP_DSP1_INTR_STAT__SMUStutterStatusStat__SHIFT 0x9 +#define ACP_DSP1_INTR_STAT__SMUStutterStatusAck_MASK 0x200 +#define ACP_DSP1_INTR_STAT__SMUStutterStatusAck__SHIFT 0x9 +#define ACP_DSP1_INTR_STAT__MCStutterStatusStat_MASK 0x400 +#define ACP_DSP1_INTR_STAT__MCStutterStatusStat__SHIFT 0xa +#define ACP_DSP1_INTR_STAT__MCStutterStatusAck_MASK 0x400 +#define ACP_DSP1_INTR_STAT__MCStutterStatusAck__SHIFT 0xa +#define ACP_DSP1_INTR_STAT__DSPExtTimerStat_MASK 0x800 +#define ACP_DSP1_INTR_STAT__DSPExtTimerStat__SHIFT 0xb +#define ACP_DSP1_INTR_STAT__DSPExtTimerAck_MASK 0x800 +#define ACP_DSP1_INTR_STAT__DSPExtTimerAck__SHIFT 0xb +#define ACP_DSP1_INTR_STAT__DSPSemRespStat_MASK 0x1000 +#define ACP_DSP1_INTR_STAT__DSPSemRespStat__SHIFT 0xc +#define ACP_DSP1_INTR_STAT__DSPSemRespAck_MASK 0x1000 +#define ACP_DSP1_INTR_STAT__DSPSemRespAck__SHIFT 0xc +#define ACP_DSP1_INTR_STAT__I2SBTDataEmptyStat_MASK 0x2000 +#define ACP_DSP1_INTR_STAT__I2SBTDataEmptyStat__SHIFT 0xd +#define ACP_DSP1_INTR_STAT__I2SBTDataEmptyAck_MASK 0x2000 +#define ACP_DSP1_INTR_STAT__I2SBTDataEmptyAck__SHIFT 0xd +#define ACP_DSP1_INTR_STAT__DMAIOCStat_MASK 0xffff0000 +#define ACP_DSP1_INTR_STAT__DMAIOCStat__SHIFT 0x10 +#define ACP_DSP1_INTR_STAT__DMAIOCAck_MASK 0xffff0000 +#define ACP_DSP1_INTR_STAT__DMAIOCAck__SHIFT 0x10 +#define ACP_DSP1_TIMEOUT_CNTL__DSP1TimeoutValue_MASK 0x3ffff +#define ACP_DSP1_TIMEOUT_CNTL__DSP1TimeoutValue__SHIFT 0x0 +#define ACP_DSP1_TIMEOUT_CNTL__CntEn_MASK 0x80000000 +#define ACP_DSP1_TIMEOUT_CNTL__CntEn__SHIFT 0x1f +#define ACP_DSP2_INTR_CNTL__ACPErrMask_MASK 0x1 +#define ACP_DSP2_INTR_CNTL__ACPErrMask__SHIFT 0x0 +#define ACP_DSP2_INTR_CNTL__I2SMicDataAvMask_MASK 0x2 +#define ACP_DSP2_INTR_CNTL__I2SMicDataAvMask__SHIFT 0x1 +#define ACP_DSP2_INTR_CNTL__I2SSpkr0DataEmptyMask_MASK 0x4 +#define ACP_DSP2_INTR_CNTL__I2SSpkr0DataEmptyMask__SHIFT 0x2 +#define ACP_DSP2_INTR_CNTL__I2SSpkr1DataEmptyMask_MASK 0x8 +#define ACP_DSP2_INTR_CNTL__I2SSpkr1DataEmptyMask__SHIFT 0x3 +#define ACP_DSP2_INTR_CNTL__I2SBTDataAvMask_MASK 0x10 +#define ACP_DSP2_INTR_CNTL__I2SBTDataAvMask__SHIFT 0x4 +#define ACP_DSP2_INTR_CNTL__AzaliaIntrMask_MASK 0x40 +#define ACP_DSP2_INTR_CNTL__AzaliaIntrMask__SHIFT 0x6 +#define ACP_DSP2_INTR_CNTL__SMUMailboxWriteMask_MASK 0x100 +#define ACP_DSP2_INTR_CNTL__SMUMailboxWriteMask__SHIFT 0x8 +#define ACP_DSP2_INTR_CNTL__SMUStutterStatusMask_MASK 0x200 +#define ACP_DSP2_INTR_CNTL__SMUStutterStatusMask__SHIFT 0x9 +#define ACP_DSP2_INTR_CNTL__MCStutterStatusMask_MASK 0x400 +#define ACP_DSP2_INTR_CNTL__MCStutterStatusMask__SHIFT 0xa +#define ACP_DSP2_INTR_CNTL__DSPExtTimerMask_MASK 0x800 +#define ACP_DSP2_INTR_CNTL__DSPExtTimerMask__SHIFT 0xb +#define ACP_DSP2_INTR_CNTL__DSPSemRespMask_MASK 0x1000 +#define ACP_DSP2_INTR_CNTL__DSPSemRespMask__SHIFT 0xc +#define ACP_DSP2_INTR_CNTL__I2SBTDataEmptyMask_MASK 0x2000 +#define ACP_DSP2_INTR_CNTL__I2SBTDataEmptyMask__SHIFT 0xd +#define ACP_DSP2_INTR_CNTL__DMAIOCMask_MASK 0xffff0000 +#define ACP_DSP2_INTR_CNTL__DMAIOCMask__SHIFT 0x10 +#define ACP_DSP2_INTR_STAT__ACPErrStat_MASK 0x1 +#define ACP_DSP2_INTR_STAT__ACPErrStat__SHIFT 0x0 +#define ACP_DSP2_INTR_STAT__ACPErrAck_MASK 0x1 +#define ACP_DSP2_INTR_STAT__ACPErrAck__SHIFT 0x0 +#define ACP_DSP2_INTR_STAT__I2SMicDataAvStat_MASK 0x2 +#define ACP_DSP2_INTR_STAT__I2SMicDataAvStat__SHIFT 0x1 +#define ACP_DSP2_INTR_STAT__I2SMicDataAvAck_MASK 0x2 +#define ACP_DSP2_INTR_STAT__I2SMicDataAvAck__SHIFT 0x1 +#define ACP_DSP2_INTR_STAT__I2SSpkr0DataEmptyStat_MASK 0x4 +#define ACP_DSP2_INTR_STAT__I2SSpkr0DataEmptyStat__SHIFT 0x2 +#define ACP_DSP2_INTR_STAT__I2SSpkr0DataEmptyAck_MASK 0x4 +#define ACP_DSP2_INTR_STAT__I2SSpkr0DataEmptyAck__SHIFT 0x2 +#define ACP_DSP2_INTR_STAT__I2SSpkr1DataEmptyStat_MASK 0x8 +#define ACP_DSP2_INTR_STAT__I2SSpkr1DataEmptyStat__SHIFT 0x3 +#define ACP_DSP2_INTR_STAT__I2SSpkr1DataEmptyAck_MASK 0x8 +#define ACP_DSP2_INTR_STAT__I2SSpkr1DataEmptyAck__SHIFT 0x3 +#define ACP_DSP2_INTR_STAT__I2SBTDataAvStat_MASK 0x10 +#define ACP_DSP2_INTR_STAT__I2SBTDataAvStat__SHIFT 0x4 +#define ACP_DSP2_INTR_STAT__I2SBTDataAvAck_MASK 0x10 +#define ACP_DSP2_INTR_STAT__I2SBTDataAvAck__SHIFT 0x4 +#define ACP_DSP2_INTR_STAT__AzaliaIntrStat_MASK 0x40 +#define ACP_DSP2_INTR_STAT__AzaliaIntrStat__SHIFT 0x6 +#define ACP_DSP2_INTR_STAT__AzaliaIntrAck_MASK 0x40 +#define ACP_DSP2_INTR_STAT__AzaliaIntrAck__SHIFT 0x6 +#define ACP_DSP2_INTR_STAT__SMUMailboxWriteStat_MASK 0x100 +#define ACP_DSP2_INTR_STAT__SMUMailboxWriteStat__SHIFT 0x8 +#define ACP_DSP2_INTR_STAT__SMUMailboxWriteAck_MASK 0x100 +#define ACP_DSP2_INTR_STAT__SMUMailboxWriteAck__SHIFT 0x8 +#define ACP_DSP2_INTR_STAT__SMUStutterStatusStat_MASK 0x200 +#define ACP_DSP2_INTR_STAT__SMUStutterStatusStat__SHIFT 0x9 +#define ACP_DSP2_INTR_STAT__SMUStutterStatusAck_MASK 0x200 +#define ACP_DSP2_INTR_STAT__SMUStutterStatusAck__SHIFT 0x9 +#define ACP_DSP2_INTR_STAT__MCStutterStatusStat_MASK 0x400 +#define ACP_DSP2_INTR_STAT__MCStutterStatusStat__SHIFT 0xa +#define ACP_DSP2_INTR_STAT__MCStutterStatusAck_MASK 0x400 +#define ACP_DSP2_INTR_STAT__MCStutterStatusAck__SHIFT 0xa +#define ACP_DSP2_INTR_STAT__DSPExtTimerStat_MASK 0x800 +#define ACP_DSP2_INTR_STAT__DSPExtTimerStat__SHIFT 0xb +#define ACP_DSP2_INTR_STAT__DSPExtTimerAck_MASK 0x800 +#define ACP_DSP2_INTR_STAT__DSPExtTimerAck__SHIFT 0xb +#define ACP_DSP2_INTR_STAT__DSPSemRespStat_MASK 0x1000 +#define ACP_DSP2_INTR_STAT__DSPSemRespStat__SHIFT 0xc +#define ACP_DSP2_INTR_STAT__DSPSemRespAck_MASK 0x1000 +#define ACP_DSP2_INTR_STAT__DSPSemRespAck__SHIFT 0xc +#define ACP_DSP2_INTR_STAT__I2SBTDataEmptyStat_MASK 0x2000 +#define ACP_DSP2_INTR_STAT__I2SBTDataEmptyStat__SHIFT 0xd +#define ACP_DSP2_INTR_STAT__I2SBTDataEmptyAck_MASK 0x2000 +#define ACP_DSP2_INTR_STAT__I2SBTDataEmptyAck__SHIFT 0xd +#define ACP_DSP2_INTR_STAT__DMAIOCStat_MASK 0xffff0000 +#define ACP_DSP2_INTR_STAT__DMAIOCStat__SHIFT 0x10 +#define ACP_DSP2_INTR_STAT__DMAIOCAck_MASK 0xffff0000 +#define ACP_DSP2_INTR_STAT__DMAIOCAck__SHIFT 0x10 +#define ACP_DSP2_TIMEOUT_CNTL__DSP2TimeoutValue_MASK 0x3ffff +#define ACP_DSP2_TIMEOUT_CNTL__DSP2TimeoutValue__SHIFT 0x0 +#define ACP_DSP2_TIMEOUT_CNTL__CntEn_MASK 0x80000000 +#define ACP_DSP2_TIMEOUT_CNTL__CntEn__SHIFT 0x1f +#define ACP_DSP0_EXT_TIMER_CNTL__TimerCount_MASK 0xffffff +#define ACP_DSP0_EXT_TIMER_CNTL__TimerCount__SHIFT 0x0 +#define ACP_DSP0_EXT_TIMER_CNTL__TimerCntl_MASK 0xc0000000 +#define ACP_DSP0_EXT_TIMER_CNTL__TimerCntl__SHIFT 0x1e +#define ACP_DSP1_EXT_TIMER_CNTL__TimerCount_MASK 0xffffff +#define ACP_DSP1_EXT_TIMER_CNTL__TimerCount__SHIFT 0x0 +#define ACP_DSP1_EXT_TIMER_CNTL__TimerCntl_MASK 0xc0000000 +#define ACP_DSP1_EXT_TIMER_CNTL__TimerCntl__SHIFT 0x1e +#define ACP_DSP2_EXT_TIMER_CNTL__TimerCount_MASK 0xffffff +#define ACP_DSP2_EXT_TIMER_CNTL__TimerCount__SHIFT 0x0 +#define ACP_DSP2_EXT_TIMER_CNTL__TimerCntl_MASK 0xc0000000 +#define ACP_DSP2_EXT_TIMER_CNTL__TimerCntl__SHIFT 0x1e +#define ACP_AXI2DAGB_SEM_0__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_0__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_1__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_1__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_2__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_2__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_3__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_3__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_4__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_4__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_5__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_5__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_6__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_6__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_7__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_7__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_8__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_8__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_9__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_9__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_10__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_10__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_11__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_11__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_12__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_12__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_13__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_13__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_14__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_14__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_15__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_15__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_16__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_16__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_17__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_17__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_18__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_18__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_19__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_19__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_20__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_20__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_21__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_21__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_22__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_22__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_23__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_23__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_24__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_24__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_25__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_25__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_26__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_26__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_27__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_27__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_28__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_28__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_29__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_29__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_30__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_30__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_31__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_31__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_32__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_32__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_33__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_33__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_34__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_34__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_35__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_35__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_36__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_36__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_37__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_37__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_38__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_38__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_39__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_39__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_40__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_40__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_41__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_41__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_42__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_42__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_43__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_43__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_44__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_44__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_45__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_45__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_46__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_46__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_AXI2DAGB_SEM_47__AXI2DAGBGblSemReg_MASK 0x1 +#define ACP_AXI2DAGB_SEM_47__AXI2DAGBGblSemReg__SHIFT 0x0 +#define ACP_SRBM_Client_Base_Addr__SRBM_Client_base_addr_MASK 0xff +#define ACP_SRBM_Client_Base_Addr__SRBM_Client_base_addr__SHIFT 0x0 +#define ACP_SRBM_Client_RDDATA__ReadData_MASK 0xffffffff +#define ACP_SRBM_Client_RDDATA__ReadData__SHIFT 0x0 +#define ACP_SRBM_Cycle_Sts__SRBM_Client_Sts_MASK 0x1 +#define ACP_SRBM_Cycle_Sts__SRBM_Client_Sts__SHIFT 0x0 +#define ACP_SRBM_Targ_Idx_Addr__SRBM_Targ_Idx_addr_MASK 0x7ffffff +#define ACP_SRBM_Targ_Idx_Addr__SRBM_Targ_Idx_addr__SHIFT 0x0 +#define ACP_SRBM_Targ_Idx_Data__SRBM_Targ_Idx_Data_MASK 0xffffffff +#define ACP_SRBM_Targ_Idx_Data__SRBM_Targ_Idx_Data__SHIFT 0x0 +#define ACP_SEMA_ADDR_LOW__ADDR_9_3_MASK 0x7f +#define ACP_SEMA_ADDR_LOW__ADDR_9_3__SHIFT 0x0 +#define ACP_SEMA_ADDR_HIGH__ADDR_39_10_MASK 0x3fffffff +#define ACP_SEMA_ADDR_HIGH__ADDR_39_10__SHIFT 0x0 +#define ACP_SEMA_CMD__REQ_CMD_MASK 0xf +#define ACP_SEMA_CMD__REQ_CMD__SHIFT 0x0 +#define ACP_SEMA_CMD__WR_PHASE_MASK 0x30 +#define ACP_SEMA_CMD__WR_PHASE__SHIFT 0x4 +#define ACP_SEMA_CMD__VMID_EN_MASK 0x80 +#define ACP_SEMA_CMD__VMID_EN__SHIFT 0x7 +#define ACP_SEMA_CMD__VMID_MASK 0xf00 +#define ACP_SEMA_CMD__VMID__SHIFT 0x8 +#define ACP_SEMA_CMD__ATC_MASK 0x1000 +#define ACP_SEMA_CMD__ATC__SHIFT 0xc +#define ACP_SEMA_STS__REQ_STS_MASK 0x3 +#define ACP_SEMA_STS__REQ_STS__SHIFT 0x0 +#define ACP_SEMA_STS__REQ_RESP_AVAIL_MASK 0x100 +#define ACP_SEMA_STS__REQ_RESP_AVAIL__SHIFT 0x8 +#define ACP_SEMA_REQ__ISSUE_POLL_REQ_MASK 0x1 +#define ACP_SEMA_REQ__ISSUE_POLL_REQ__SHIFT 0x0 +#define ACP_FW_STATUS__RUN_MASK 0x1 +#define ACP_FW_STATUS__RUN__SHIFT 0x0 +#define ACP_FUTURE_REG_ACLK_0__ACPFutureReg_MASK 0xffffffff +#define ACP_FUTURE_REG_ACLK_0__ACPFutureReg__SHIFT 0x0 +#define ACP_FUTURE_REG_ACLK_1__ACPFutureReg_MASK 0xffffffff +#define ACP_FUTURE_REG_ACLK_1__ACPFutureReg__SHIFT 0x0 +#define ACP_FUTURE_REG_ACLK_2__ACPFutureReg_MASK 0xffffffff +#define ACP_FUTURE_REG_ACLK_2__ACPFutureReg__SHIFT 0x0 +#define ACP_FUTURE_REG_ACLK_3__ACPFutureReg_MASK 0xffffffff +#define ACP_FUTURE_REG_ACLK_3__ACPFutureReg__SHIFT 0x0 +#define ACP_FUTURE_REG_ACLK_4__ACPFutureReg_MASK 0xffffffff +#define ACP_FUTURE_REG_ACLK_4__ACPFutureReg__SHIFT 0x0 +#define ACP_TIMER__ACP_Timer_count_MASK 0xffffffff +#define ACP_TIMER__ACP_Timer_count__SHIFT 0x0 +#define ACP_TIMER_CNTL__ACP_Timer_control_MASK 0x1 +#define ACP_TIMER_CNTL__ACP_Timer_control__SHIFT 0x0 +#define ACP_DSP0_TIMER__ACP_DSP0_timer_MASK 0xffffff +#define ACP_DSP0_TIMER__ACP_DSP0_timer__SHIFT 0x0 +#define ACP_DSP1_TIMER__ACP_DSP1_timer_MASK 0xffffff +#define ACP_DSP1_TIMER__ACP_DSP1_timer__SHIFT 0x0 +#define ACP_DSP2_TIMER__ACP_DSP2_timer_MASK 0xffffff +#define ACP_DSP2_TIMER__ACP_DSP2_timer__SHIFT 0x0 +#define ACP_I2S_TRANSMIT_BYTE_CNT_HIGH__i2s_sp_tx_byte_cnt_high_MASK 0xffffffff +#define ACP_I2S_TRANSMIT_BYTE_CNT_HIGH__i2s_sp_tx_byte_cnt_high__SHIFT 0x0 +#define ACP_I2S_TRANSMIT_BYTE_CNT_LOW__i2s_sp_tx_byte_cnt_low_MASK 0xffffffff +#define ACP_I2S_TRANSMIT_BYTE_CNT_LOW__i2s_sp_tx_byte_cnt_low__SHIFT 0x0 +#define ACP_I2S_BT_TRANSMIT_BYTE_CNT_HIGH__i2s_bt_tx_byte_cnt_high_MASK 0xffffffff +#define ACP_I2S_BT_TRANSMIT_BYTE_CNT_HIGH__i2s_bt_tx_byte_cnt_high__SHIFT 0x0 +#define ACP_I2S_BT_TRANSMIT_BYTE_CNT_LOW__i2s_bt_tx_byte_cnt_low_MASK 0xffffffff +#define ACP_I2S_BT_TRANSMIT_BYTE_CNT_LOW__i2s_bt_tx_byte_cnt_low__SHIFT 0x0 +#define ACP_I2S_BT_RECEIVE_BYTE_CNT_HIGH__i2s_bt_rx_byte_cnt_high_MASK 0xffffffff +#define ACP_I2S_BT_RECEIVE_BYTE_CNT_HIGH__i2s_bt_rx_byte_cnt_high__SHIFT 0x0 +#define ACP_I2S_BT_RECEIVE_BYTE_CNT_LOW__i2s_bt_rx_byte_cnt_low_MASK 0xffffffff +#define ACP_I2S_BT_RECEIVE_BYTE_CNT_LOW__i2s_bt_rx_byte_cnt_low__SHIFT 0x0 +#define ACP_DSP0_CS_STATE__DSP0_CS_state_MASK 0x1 +#define ACP_DSP0_CS_STATE__DSP0_CS_state__SHIFT 0x0 +#define ACP_DSP1_CS_STATE__DSP1_CS_state_MASK 0x1 +#define ACP_DSP1_CS_STATE__DSP1_CS_state__SHIFT 0x0 +#define ACP_DSP2_CS_STATE__DSP2_CS_state_MASK 0x1 +#define ACP_DSP2_CS_STATE__DSP2_CS_state__SHIFT 0x0 +#define ACP_SCRATCH_REG_BASE_ADDR__SCRATCH_REG_BASE_ADDR_MASK 0x7ffff +#define ACP_SCRATCH_REG_BASE_ADDR__SCRATCH_REG_BASE_ADDR__SHIFT 0x0 +#define CC_ACP_EFUSE__DSP0_DISABLE_MASK 0x2 +#define CC_ACP_EFUSE__DSP0_DISABLE__SHIFT 0x1 +#define CC_ACP_EFUSE__DSP1_DISABLE_MASK 0x4 +#define CC_ACP_EFUSE__DSP1_DISABLE__SHIFT 0x2 +#define CC_ACP_EFUSE__DSP2_DISABLE_MASK 0x8 +#define CC_ACP_EFUSE__DSP2_DISABLE__SHIFT 0x3 +#define CC_ACP_EFUSE__ACP_DISABLE_MASK 0x10 +#define CC_ACP_EFUSE__ACP_DISABLE__SHIFT 0x4 +#define ACP_PGFSM_RETAIN_REG__ACP_P1_ON_OFF_MASK 0x1 +#define ACP_PGFSM_RETAIN_REG__ACP_P1_ON_OFF__SHIFT 0x0 +#define ACP_PGFSM_RETAIN_REG__ACP_P2_ON_OFF_MASK 0x2 +#define ACP_PGFSM_RETAIN_REG__ACP_P2_ON_OFF__SHIFT 0x1 +#define ACP_PGFSM_RETAIN_REG__ACP_DSP0_ON_OFF_MASK 0x4 +#define ACP_PGFSM_RETAIN_REG__ACP_DSP0_ON_OFF__SHIFT 0x2 +#define ACP_PGFSM_RETAIN_REG__ACP_DSP1_ON_OFF_MASK 0x8 +#define ACP_PGFSM_RETAIN_REG__ACP_DSP1_ON_OFF__SHIFT 0x3 +#define ACP_PGFSM_RETAIN_REG__ACP_DSP2_ON_OFF_MASK 0x10 +#define ACP_PGFSM_RETAIN_REG__ACP_DSP2_ON_OFF__SHIFT 0x4 +#define ACP_PGFSM_RETAIN_REG__ACP_AZ_ON_OFF_MASK 0x20 +#define ACP_PGFSM_RETAIN_REG__ACP_AZ_ON_OFF__SHIFT 0x5 +#define ACP_PGFSM_CONFIG_REG__FSM_ADDR_MASK 0xff +#define ACP_PGFSM_CONFIG_REG__FSM_ADDR__SHIFT 0x0 +#define ACP_PGFSM_CONFIG_REG__Power_Down_MASK 0x100 +#define ACP_PGFSM_CONFIG_REG__Power_Down__SHIFT 0x8 +#define ACP_PGFSM_CONFIG_REG__Power_Up_MASK 0x200 +#define ACP_PGFSM_CONFIG_REG__Power_Up__SHIFT 0x9 +#define ACP_PGFSM_CONFIG_REG__P1_Select_MASK 0x400 +#define ACP_PGFSM_CONFIG_REG__P1_Select__SHIFT 0xa +#define ACP_PGFSM_CONFIG_REG__P2_Select_MASK 0x800 +#define ACP_PGFSM_CONFIG_REG__P2_Select__SHIFT 0xb +#define ACP_PGFSM_CONFIG_REG__Wr_MASK 0x1000 +#define ACP_PGFSM_CONFIG_REG__Wr__SHIFT 0xc +#define ACP_PGFSM_CONFIG_REG__Rd_MASK 0x2000 +#define ACP_PGFSM_CONFIG_REG__Rd__SHIFT 0xd +#define ACP_PGFSM_CONFIG_REG__RdData_Reset_MASK 0x4000 +#define ACP_PGFSM_CONFIG_REG__RdData_Reset__SHIFT 0xe +#define ACP_PGFSM_CONFIG_REG__Short_Format_MASK 0x8000 +#define ACP_PGFSM_CONFIG_REG__Short_Format__SHIFT 0xf +#define ACP_PGFSM_CONFIG_REG__BPM_CG_MG_FGCG_MASK 0x3ff0000 +#define ACP_PGFSM_CONFIG_REG__BPM_CG_MG_FGCG__SHIFT 0x10 +#define ACP_PGFSM_CONFIG_REG__SRBM_override_MASK 0x4000000 +#define ACP_PGFSM_CONFIG_REG__SRBM_override__SHIFT 0x1a +#define ACP_PGFSM_CONFIG_REG__Rsvd_BPM_Addr_MASK 0x8000000 +#define ACP_PGFSM_CONFIG_REG__Rsvd_BPM_Addr__SHIFT 0x1b +#define ACP_PGFSM_CONFIG_REG__REG_ADDR_MASK 0xf0000000 +#define ACP_PGFSM_CONFIG_REG__REG_ADDR__SHIFT 0x1c +#define ACP_PGFSM_WRITE_REG__Write_value_MASK 0xffffffff +#define ACP_PGFSM_WRITE_REG__Write_value__SHIFT 0x0 +#define ACP_PGFSM_READ_REG_0__Read_value_MASK 0xffffff +#define ACP_PGFSM_READ_REG_0__Read_value__SHIFT 0x0 +#define ACP_PGFSM_READ_REG_1__Read_value_MASK 0xffffff +#define ACP_PGFSM_READ_REG_1__Read_value__SHIFT 0x0 +#define ACP_PGFSM_READ_REG_2__Read_value_MASK 0xffffff +#define ACP_PGFSM_READ_REG_2__Read_value__SHIFT 0x0 +#define ACP_PGFSM_READ_REG_3__Read_value_MASK 0xffffff +#define ACP_PGFSM_READ_REG_3__Read_value__SHIFT 0x0 +#define ACP_PGFSM_READ_REG_4__Read_value_MASK 0xffffff +#define ACP_PGFSM_READ_REG_4__Read_value__SHIFT 0x0 +#define ACP_PGFSM_READ_REG_5__Read_value_MASK 0xffffff +#define ACP_PGFSM_READ_REG_5__Read_value__SHIFT 0x0 +#define ACP_IP_PGFSM_ENABLE__ACP_IP_ACCESS_MASK 0x1 +#define ACP_IP_PGFSM_ENABLE__ACP_IP_ACCESS__SHIFT 0x0 +#define ACP_I2S_PIN_CONFIG__ACP_I2S_PIN_CONFIG_MASK 0x3 +#define ACP_I2S_PIN_CONFIG__ACP_I2S_PIN_CONFIG__SHIFT 0x0 +#define ACP_AZALIA_I2S_SELECT__AZ_I2S_SELECT_MASK 0x1 +#define ACP_AZALIA_I2S_SELECT__AZ_I2S_SELECT__SHIFT 0x0 +#define ACP_CHIP_PKG_FOR_PAD_ISOLATION__external_fch_package_MASK 0x1 +#define ACP_CHIP_PKG_FOR_PAD_ISOLATION__external_fch_package__SHIFT 0x0 +#define ACP_AUDIO_PAD_PULLUP_PULLDOWN_CTRL__ACP_AUDIO_PAD_pullup_disable_MASK 0x7ff +#define ACP_AUDIO_PAD_PULLUP_PULLDOWN_CTRL__ACP_AUDIO_PAD_pullup_disable__SHIFT 0x0 +#define ACP_AUDIO_PAD_PULLUP_PULLDOWN_CTRL__ACP_AUDIO_PAD_pulldown_enable_MASK 0x7ff0000 +#define ACP_AUDIO_PAD_PULLUP_PULLDOWN_CTRL__ACP_AUDIO_PAD_pulldown_enable__SHIFT 0x10 +#define ACP_BT_UART_PAD_SEL__ACP_BT_UART_PAD_SEL_MASK 0x1 +#define ACP_BT_UART_PAD_SEL__ACP_BT_UART_PAD_SEL__SHIFT 0x0 +#define ACP_SCRATCH_REG_0__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_0__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_1__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_1__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_2__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_2__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_3__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_3__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_4__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_4__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_5__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_5__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_6__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_6__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_7__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_7__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_8__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_8__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_9__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_9__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_10__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_10__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_11__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_11__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_12__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_12__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_13__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_13__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_14__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_14__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_15__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_15__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_16__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_16__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_17__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_17__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_18__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_18__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_19__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_19__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_20__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_20__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_21__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_21__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_22__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_22__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_23__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_23__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_24__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_24__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_25__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_25__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_26__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_26__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_27__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_27__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_28__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_28__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_29__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_29__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_30__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_30__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_31__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_31__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_32__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_32__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_33__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_33__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_34__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_34__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_35__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_35__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_36__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_36__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_37__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_37__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_38__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_38__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_39__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_39__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_40__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_40__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_41__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_41__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_42__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_42__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_43__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_43__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_44__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_44__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_45__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_45__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_46__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_46__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_SCRATCH_REG_47__ACP_SCRATCH_REG_MASK 0xffffffff +#define ACP_SCRATCH_REG_47__ACP_SCRATCH_REG__SHIFT 0x0 +#define ACP_VOICE_WAKEUP_ENABLE__voice_wakeup_enable_MASK 0x1 +#define ACP_VOICE_WAKEUP_ENABLE__voice_wakeup_enable__SHIFT 0x0 +#define ACP_VOICE_WAKEUP_STATUS__voice_wakeup_status_MASK 0x1 +#define ACP_VOICE_WAKEUP_STATUS__voice_wakeup_status__SHIFT 0x0 +#define I2S_VOICE_WAKEUP_LOWER_THRESHOLD__i2s_voice_wakeup_lower_threshold_MASK 0xffffffff +#define I2S_VOICE_WAKEUP_LOWER_THRESHOLD__i2s_voice_wakeup_lower_threshold__SHIFT 0x0 +#define I2S_VOICE_WAKEUP_HIGHER_THRESHOLD__i2s_voice_wakeup_higher_threshold_MASK 0xffffffff +#define I2S_VOICE_WAKEUP_HIGHER_THRESHOLD__i2s_voice_wakeup_higher_threshold__SHIFT 0x0 +#define I2S_VOICE_WAKEUP_NO_OF_SAMPLES__i2s_voice_wakeup_no_of_samples_MASK 0xffff +#define I2S_VOICE_WAKEUP_NO_OF_SAMPLES__i2s_voice_wakeup_no_of_samples__SHIFT 0x0 +#define I2S_VOICE_WAKEUP_NO_OF_PEAKS__i2s_voice_wakeup_no_of_peaks_MASK 0xffff +#define I2S_VOICE_WAKEUP_NO_OF_PEAKS__i2s_voice_wakeup_no_of_peaks__SHIFT 0x0 +#define I2S_VOICE_WAKEUP_DURATION_OF_N_PEAKS__i2s_voice_wakeup_duration_of_n_peaks_MASK 0xffffffff +#define I2S_VOICE_WAKEUP_DURATION_OF_N_PEAKS__i2s_voice_wakeup_duration_of_n_peaks__SHIFT 0x0 +#define I2S_VOICE_WAKEUP_BITCLK_TOGGLE_DETECTION__i2s_voice_wakeup_bitclk_toggle_wakeup_en_MASK 0x1 +#define I2S_VOICE_WAKEUP_BITCLK_TOGGLE_DETECTION__i2s_voice_wakeup_bitclk_toggle_wakeup_en__SHIFT 0x0 +#define I2S_VOICE_WAKEUP_DATA_PATH_SWITCH__i2s_voice_wakeup_data_path_switch_req_MASK 0x1 +#define I2S_VOICE_WAKEUP_DATA_PATH_SWITCH__i2s_voice_wakeup_data_path_switch_req__SHIFT 0x0 +#define I2S_VOICE_WAKEUP_DATA_PATH_SWITCH__i2s_voice_wakeup_data_path_switch_ack_MASK 0x2 +#define I2S_VOICE_WAKEUP_DATA_PATH_SWITCH__i2s_voice_wakeup_data_path_switch_ack__SHIFT 0x1 +#define I2S_VOICE_WAKEUP_DATA_POINTER__i2s_voice_wakeup_data_pointer_MASK 0xffffffff +#define I2S_VOICE_WAKEUP_DATA_POINTER__i2s_voice_wakeup_data_pointer__SHIFT 0x0 +#define I2S_VOICE_WAKEUP_AUTH_MATCH__i2s_voice_wakeup_authentication_valid_MASK 0x1 +#define I2S_VOICE_WAKEUP_AUTH_MATCH__i2s_voice_wakeup_authentication_valid__SHIFT 0x0 +#define I2S_VOICE_WAKEUP_AUTH_MATCH__i2s_voice_wakeup_authentication_match_MASK 0x2 +#define I2S_VOICE_WAKEUP_AUTH_MATCH__i2s_voice_wakeup_authentication_match__SHIFT 0x1 +#define I2S_VOICE_WAKEUP_8KB_WRAP__i2s_voice_wakeup_8kb_wrap_MASK 0x1 +#define I2S_VOICE_WAKEUP_8KB_WRAP__i2s_voice_wakeup_8kb_wrap__SHIFT 0x0 +#define ACP_I2S_RECEIVED_BYTE_CNT_HIGH__i2s_mic_rx_byte_cnt_high_MASK 0xffffffff +#define ACP_I2S_RECEIVED_BYTE_CNT_HIGH__i2s_mic_rx_byte_cnt_high__SHIFT 0x0 +#define ACP_I2S_RECEIVED_BYTE_CNT_LOW__i2s_mic_rx_byte_cnt_low_MASK 0xffffffff +#define ACP_I2S_RECEIVED_BYTE_CNT_LOW__i2s_mic_rx_byte_cnt_low__SHIFT 0x0 +#define ACP_I2S_MICSP_TRANSMIT_BYTE_CNT_HIGH__i2s_micsp_tx_byte_cnt_high_MASK 0xffffffff +#define ACP_I2S_MICSP_TRANSMIT_BYTE_CNT_HIGH__i2s_micsp_tx_byte_cnt_high__SHIFT 0x0 +#define ACP_I2S_MICSP_TRANSMIT_BYTE_CNT_LOW__i2s_micsp_tx_byte_cnt_low_MASK 0xffffffff +#define ACP_I2S_MICSP_TRANSMIT_BYTE_CNT_LOW__i2s_micsp_tx_byte_cnt_low__SHIFT 0x0 +#define ACP_MEM_SHUT_DOWN_REQ_LO__ACP_ShutDownReq_RAML_MASK 0xffffffff +#define ACP_MEM_SHUT_DOWN_REQ_LO__ACP_ShutDownReq_RAML__SHIFT 0x0 +#define ACP_MEM_SHUT_DOWN_REQ_HI__ACP_ShutDownReq_RAMH_MASK 0xffff +#define ACP_MEM_SHUT_DOWN_REQ_HI__ACP_ShutDownReq_RAMH__SHIFT 0x0 +#define ACP_MEM_SHUT_DOWN_STS_LO__ACP_ShutDownSts_RAML_MASK 0xffffffff +#define ACP_MEM_SHUT_DOWN_STS_LO__ACP_ShutDownSts_RAML__SHIFT 0x0 +#define ACP_MEM_SHUT_DOWN_STS_HI__ACP_ShutDownSts_RAMH_MASK 0xffff +#define ACP_MEM_SHUT_DOWN_STS_HI__ACP_ShutDownSts_RAMH__SHIFT 0x0 +#define ACP_MEM_DEEP_SLEEP_REQ_LO__ACP_DeepSleepReq_RAML_MASK 0xffffffff +#define ACP_MEM_DEEP_SLEEP_REQ_LO__ACP_DeepSleepReq_RAML__SHIFT 0x0 +#define ACP_MEM_DEEP_SLEEP_REQ_HI__ACP_DeepSleepReq_RAMH_MASK 0xffff +#define ACP_MEM_DEEP_SLEEP_REQ_HI__ACP_DeepSleepReq_RAMH__SHIFT 0x0 +#define ACP_MEM_DEEP_SLEEP_STS_LO__ACP_DeepSleepSts_RAML_MASK 0xffffffff +#define ACP_MEM_DEEP_SLEEP_STS_LO__ACP_DeepSleepSts_RAML__SHIFT 0x0 +#define ACP_MEM_DEEP_SLEEP_STS_HI__ACP_DeepSleepSts_RAMH_MASK 0xffff +#define ACP_MEM_DEEP_SLEEP_STS_HI__ACP_DeepSleepSts_RAMH__SHIFT 0x0 +#define ACP_MEM_WAKEUP_FROM_SHUT_DOWN_LO__acp_mem_wakeup_from_shut_down_lo_MASK 0xffffffff +#define ACP_MEM_WAKEUP_FROM_SHUT_DOWN_LO__acp_mem_wakeup_from_shut_down_lo__SHIFT 0x0 +#define ACP_MEM_WAKEUP_FROM_SHUT_DOWN_HI__acp_mem_wakeup_from_shut_down_hi_MASK 0xffff +#define ACP_MEM_WAKEUP_FROM_SHUT_DOWN_HI__acp_mem_wakeup_from_shut_down_hi__SHIFT 0x0 +#define ACP_MEM_WAKEUP_FROM_SLEEP_LO__acp_mem_wakeup_from_sleep_lo_MASK 0xffffffff +#define ACP_MEM_WAKEUP_FROM_SLEEP_LO__acp_mem_wakeup_from_sleep_lo__SHIFT 0x0 +#define ACP_MEM_WAKEUP_FROM_SLEEP_HI__acp_mem_wakeup_from_sleep_hi_MASK 0xffff +#define ACP_MEM_WAKEUP_FROM_SLEEP_HI__acp_mem_wakeup_from_sleep_hi__SHIFT 0x0 +#define ACP_I2SSP_IER__I2SSP_IEN_MASK 0x1 +#define ACP_I2SSP_IER__I2SSP_IEN__SHIFT 0x0 +#define ACP_I2SSP_IRER__I2SSP_RXEN_MASK 0x1 +#define ACP_I2SSP_IRER__I2SSP_RXEN__SHIFT 0x0 +#define ACP_I2SSP_ITER__I2SSP_TXEN_MASK 0x1 +#define ACP_I2SSP_ITER__I2SSP_TXEN__SHIFT 0x0 +#define ACP_I2SSP_CER__I2SSP_CLKEN_MASK 0x1 +#define ACP_I2SSP_CER__I2SSP_CLKEN__SHIFT 0x0 +#define ACP_I2SSP_CCR__I2SSP_SCLKG_MASK 0x7 +#define ACP_I2SSP_CCR__I2SSP_SCLKG__SHIFT 0x0 +#define ACP_I2SSP_CCR__I2SSP_WSS_MASK 0x18 +#define ACP_I2SSP_CCR__I2SSP_WSS__SHIFT 0x3 +#define ACP_I2SSP_RXFFR__I2SSP_RXFFR_MASK 0x1 +#define ACP_I2SSP_RXFFR__I2SSP_RXFFR__SHIFT 0x0 +#define ACP_I2SSP_TXFFR__I2SSP_TXFFR_MASK 0x1 +#define ACP_I2SSP_TXFFR__I2SSP_TXFFR__SHIFT 0x0 +#define ACP_I2SSP_LRBR0__I2SSP_LRBR0_MASK 0xffffffff +#define ACP_I2SSP_LRBR0__I2SSP_LRBR0__SHIFT 0x0 +#define ACP_I2SSP_RRBR0__I2SSP_RRBR0_MASK 0xffffffff +#define ACP_I2SSP_RRBR0__I2SSP_RRBR0__SHIFT 0x0 +#define ACP_I2SSP_RER0__I2SSP_RXCHEN0_MASK 0x1 +#define ACP_I2SSP_RER0__I2SSP_RXCHEN0__SHIFT 0x0 +#define ACP_I2SSP_TER0__I2SSP_TXCHEN0_MASK 0x1 +#define ACP_I2SSP_TER0__I2SSP_TXCHEN0__SHIFT 0x0 +#define ACP_I2SSP_RCR0__I2SSP_WLEN_MASK 0x7 +#define ACP_I2SSP_RCR0__I2SSP_WLEN__SHIFT 0x0 +#define ACP_I2SSP_TCR0__I2SSP_WLEN_MASK 0x7 +#define ACP_I2SSP_TCR0__I2SSP_WLEN__SHIFT 0x0 +#define ACP_I2SSP_ISR0__I2SSP_RXDA_MASK 0x1 +#define ACP_I2SSP_ISR0__I2SSP_RXDA__SHIFT 0x0 +#define ACP_I2SSP_ISR0__I2SSP_RXFO_MASK 0x2 +#define ACP_I2SSP_ISR0__I2SSP_RXFO__SHIFT 0x1 +#define ACP_I2SSP_ISR0__I2SSP_TXFE_MASK 0x10 +#define ACP_I2SSP_ISR0__I2SSP_TXFE__SHIFT 0x4 +#define ACP_I2SSP_ISR0__I2SSP_TXFO_MASK 0x20 +#define ACP_I2SSP_ISR0__I2SSP_TXFO__SHIFT 0x5 +#define ACP_I2SSP_IMR0__I2SSP_RXDAM_MASK 0x1 +#define ACP_I2SSP_IMR0__I2SSP_RXDAM__SHIFT 0x0 +#define ACP_I2SSP_IMR0__I2SSP_RXFOM_MASK 0x2 +#define ACP_I2SSP_IMR0__I2SSP_RXFOM__SHIFT 0x1 +#define ACP_I2SSP_IMR0__I2SSP_TXFEM_MASK 0x10 +#define ACP_I2SSP_IMR0__I2SSP_TXFEM__SHIFT 0x4 +#define ACP_I2SSP_IMR0__I2SSP_TXFOM_MASK 0x20 +#define ACP_I2SSP_IMR0__I2SSP_TXFOM__SHIFT 0x5 +#define ACP_I2SSP_ROR0__I2SSP_RXCHO_MASK 0x1 +#define ACP_I2SSP_ROR0__I2SSP_RXCHO__SHIFT 0x0 +#define ACP_I2SSP_TOR0__I2SSP_TXCHO_MASK 0x1 +#define ACP_I2SSP_TOR0__I2SSP_TXCHO__SHIFT 0x0 +#define ACP_I2SSP_RFCR0__I2SSP_RXCHDT_MASK 0xf +#define ACP_I2SSP_RFCR0__I2SSP_RXCHDT__SHIFT 0x0 +#define ACP_I2SSP_TFCR0__I2SSP_TXCHET_MASK 0xf +#define ACP_I2SSP_TFCR0__I2SSP_TXCHET__SHIFT 0x0 +#define ACP_I2SSP_RFF0__I2SSP_RXCHFR_MASK 0x1 +#define ACP_I2SSP_RFF0__I2SSP_RXCHFR__SHIFT 0x0 +#define ACP_I2SSP_TFF0__I2SSP_TXCHFR_MASK 0x1 +#define ACP_I2SSP_TFF0__I2SSP_TXCHFR__SHIFT 0x0 +#define ACP_I2SSP_RXDMA__I2SSP_RXDMA_MASK 0xffffffff +#define ACP_I2SSP_RXDMA__I2SSP_RXDMA__SHIFT 0x0 +#define ACP_I2SSP_RRXDMA__I2SSP_RRXDMA_MASK 0x1 +#define ACP_I2SSP_RRXDMA__I2SSP_RRXDMA__SHIFT 0x0 +#define ACP_I2SSP_TXDMA__I2SSP_TXDMA_MASK 0xffffffff +#define ACP_I2SSP_TXDMA__I2SSP_TXDMA__SHIFT 0x0 +#define ACP_I2SSP_RTXDMA__I2SSP_RTXDMA_MASK 0x1 +#define ACP_I2SSP_RTXDMA__I2SSP_RTXDMA__SHIFT 0x0 +#define ACP_I2SSP_COMP_PARAM_2__I2SSP_RX_WPRDSIZE_0_MASK 0x7 +#define ACP_I2SSP_COMP_PARAM_2__I2SSP_RX_WPRDSIZE_0__SHIFT 0x0 +#define ACP_I2SSP_COMP_PARAM_2__I2SSP_RX_WPRDSIZE_1_MASK 0x38 +#define ACP_I2SSP_COMP_PARAM_2__I2SSP_RX_WPRDSIZE_1__SHIFT 0x3 +#define ACP_I2SSP_COMP_PARAM_2__I2SSP_RX_WPRDSIZE_2_MASK 0x380 +#define ACP_I2SSP_COMP_PARAM_2__I2SSP_RX_WPRDSIZE_2__SHIFT 0x7 +#define ACP_I2SSP_COMP_PARAM_2__I2SSP_RX_WPRDSIZE_3_MASK 0x1c00 +#define ACP_I2SSP_COMP_PARAM_2__I2SSP_RX_WPRDSIZE_3__SHIFT 0xa +#define ACP_I2SSP_COMP_PARAM_1__I2SSP_APB_DATA_WIDTH_MASK 0x3 +#define ACP_I2SSP_COMP_PARAM_1__I2SSP_APB_DATA_WIDTH__SHIFT 0x0 +#define ACP_I2SSP_COMP_PARAM_1__I2SSP_FIFO_DEPTH_GLOBAL_MASK 0xc +#define ACP_I2SSP_COMP_PARAM_1__I2SSP_FIFO_DEPTH_GLOBAL__SHIFT 0x2 +#define ACP_I2SSP_COMP_PARAM_1__I2SSP_MODE_EN_MASK 0x10 +#define ACP_I2SSP_COMP_PARAM_1__I2SSP_MODE_EN__SHIFT 0x4 +#define ACP_I2SSP_COMP_PARAM_1__I2SSP_TRANSMITTER_BLOCK_MASK 0x20 +#define ACP_I2SSP_COMP_PARAM_1__I2SSP_TRANSMITTER_BLOCK__SHIFT 0x5 +#define ACP_I2SSP_COMP_PARAM_1__I2SSP_RECEIVER_BLOCK_MASK 0x40 +#define ACP_I2SSP_COMP_PARAM_1__I2SSP_RECEIVER_BLOCK__SHIFT 0x6 +#define ACP_I2SSP_COMP_PARAM_1__I2SSP_RX_CHANNLES_MASK 0x180 +#define ACP_I2SSP_COMP_PARAM_1__I2SSP_RX_CHANNLES__SHIFT 0x7 +#define ACP_I2SSP_COMP_PARAM_1__I2SSP_TX_CHANNLES_MASK 0x600 +#define ACP_I2SSP_COMP_PARAM_1__I2SSP_TX_CHANNLES__SHIFT 0x9 +#define ACP_I2SSP_COMP_PARAM_1__I2SSP_TX_WORDSIZE_0_MASK 0x70000 +#define ACP_I2SSP_COMP_PARAM_1__I2SSP_TX_WORDSIZE_0__SHIFT 0x10 +#define ACP_I2SSP_COMP_PARAM_1__I2SSP_TX_WORDSIZE_1_MASK 0x380000 +#define ACP_I2SSP_COMP_PARAM_1__I2SSP_TX_WORDSIZE_1__SHIFT 0x13 +#define ACP_I2SSP_COMP_PARAM_1__I2SSP_TX_WORDSIZE_2_MASK 0x1c00000 +#define ACP_I2SSP_COMP_PARAM_1__I2SSP_TX_WORDSIZE_2__SHIFT 0x16 +#define ACP_I2SSP_COMP_PARAM_1__I2SSP_TX_WORDSIZE_3_MASK 0xe000000 +#define ACP_I2SSP_COMP_PARAM_1__I2SSP_TX_WORDSIZE_3__SHIFT 0x19 +#define ACP_I2SSP_COMP_VERSION__I2SSP_APB_DATA_WIDTH_MASK 0xffffffff +#define ACP_I2SSP_COMP_VERSION__I2SSP_APB_DATA_WIDTH__SHIFT 0x0 +#define ACP_I2SSP_COMP_TYPE__I2SSP_COMP_TYPE_MASK 0xffffffff +#define ACP_I2SSP_COMP_TYPE__I2SSP_COMP_TYPE__SHIFT 0x0 +#define ACP_I2SMICSP_IER__I2SMICSP_IEN_MASK 0x1 +#define ACP_I2SMICSP_IER__I2SMICSP_IEN__SHIFT 0x0 +#define ACP_I2SMICSP_IRER__I2SMICSP_RXEN_MASK 0x1 +#define ACP_I2SMICSP_IRER__I2SMICSP_RXEN__SHIFT 0x0 +#define ACP_I2SMICSP_ITER__I2SMICSP_TXEN_MASK 0x1 +#define ACP_I2SMICSP_ITER__I2SMICSP_TXEN__SHIFT 0x0 +#define ACP_I2SMICSP_CER__I2SMICSP_CLKEN_MASK 0x1 +#define ACP_I2SMICSP_CER__I2SMICSP_CLKEN__SHIFT 0x0 +#define ACP_I2SMICSP_CCR__I2SMICSP_SCLKG_MASK 0x7 +#define ACP_I2SMICSP_CCR__I2SMICSP_SCLKG__SHIFT 0x0 +#define ACP_I2SMICSP_CCR__I2SMICSP_WSS_MASK 0x18 +#define ACP_I2SMICSP_CCR__I2SMICSP_WSS__SHIFT 0x3 +#define ACP_I2SMICSP_RXFFR__I2SMICSP_RXFFR_MASK 0x1 +#define ACP_I2SMICSP_RXFFR__I2SMICSP_RXFFR__SHIFT 0x0 +#define ACP_I2SMICSP_TXFFR__I2SMICSP_TXFFR_MASK 0x1 +#define ACP_I2SMICSP_TXFFR__I2SMICSP_TXFFR__SHIFT 0x0 +#define ACP_I2SMICSP_LRBR0__I2SMICSP_LRBR0_MASK 0xffffffff +#define ACP_I2SMICSP_LRBR0__I2SMICSP_LRBR0__SHIFT 0x0 +#define ACP_I2SMICSP_RRBR0__I2SMICSP_RRBR0_MASK 0xffffffff +#define ACP_I2SMICSP_RRBR0__I2SMICSP_RRBR0__SHIFT 0x0 +#define ACP_I2SMICSP_RER0__I2SMICSP_RXCHEN0_MASK 0x1 +#define ACP_I2SMICSP_RER0__I2SMICSP_RXCHEN0__SHIFT 0x0 +#define ACP_I2SMICSP_TER0__I2SMICSP_TXCHEN0_MASK 0x1 +#define ACP_I2SMICSP_TER0__I2SMICSP_TXCHEN0__SHIFT 0x0 +#define ACP_I2SMICSP_RCR0__I2SMICSP_WLEN_MASK 0x7 +#define ACP_I2SMICSP_RCR0__I2SMICSP_WLEN__SHIFT 0x0 +#define ACP_I2SMICSP_TCR0__I2SMICSP_WLEN_MASK 0x7 +#define ACP_I2SMICSP_TCR0__I2SMICSP_WLEN__SHIFT 0x0 +#define ACP_I2SMICSP_ISR0__I2SMICSP_RXDA_MASK 0x1 +#define ACP_I2SMICSP_ISR0__I2SMICSP_RXDA__SHIFT 0x0 +#define ACP_I2SMICSP_ISR0__I2SMICSP_RXFO_MASK 0x2 +#define ACP_I2SMICSP_ISR0__I2SMICSP_RXFO__SHIFT 0x1 +#define ACP_I2SMICSP_ISR0__I2SMICSP_TXFE_MASK 0x10 +#define ACP_I2SMICSP_ISR0__I2SMICSP_TXFE__SHIFT 0x4 +#define ACP_I2SMICSP_ISR0__I2SMICSP_TXFO_MASK 0x20 +#define ACP_I2SMICSP_ISR0__I2SMICSP_TXFO__SHIFT 0x5 +#define ACP_I2SMICSP_IMR0__I2SMICSP_RXDAM_MASK 0x1 +#define ACP_I2SMICSP_IMR0__I2SMICSP_RXDAM__SHIFT 0x0 +#define ACP_I2SMICSP_IMR0__I2SMICSP_RXFOM_MASK 0x2 +#define ACP_I2SMICSP_IMR0__I2SMICSP_RXFOM__SHIFT 0x1 +#define ACP_I2SMICSP_IMR0__I2SMICSP_TXFEM_MASK 0x10 +#define ACP_I2SMICSP_IMR0__I2SMICSP_TXFEM__SHIFT 0x4 +#define ACP_I2SMICSP_IMR0__I2SMICSP_TXFOM_MASK 0x20 +#define ACP_I2SMICSP_IMR0__I2SMICSP_TXFOM__SHIFT 0x5 +#define ACP_I2SMICSP_ROR0__I2SMICSP_RXCHO_MASK 0x1 +#define ACP_I2SMICSP_ROR0__I2SMICSP_RXCHO__SHIFT 0x0 +#define ACP_I2SMICSP_TOR0__I2SMICSP_TXCHO_MASK 0x1 +#define ACP_I2SMICSP_TOR0__I2SMICSP_TXCHO__SHIFT 0x0 +#define ACP_I2SMICSP_RFCR0__I2SMICSP_RXCHDT_MASK 0xf +#define ACP_I2SMICSP_RFCR0__I2SMICSP_RXCHDT__SHIFT 0x0 +#define ACP_I2SMICSP_TFCR0__I2SMICSP_TXCHET_MASK 0xf +#define ACP_I2SMICSP_TFCR0__I2SMICSP_TXCHET__SHIFT 0x0 +#define ACP_I2SMICSP_RFF0__I2SMICSP_RXCHFR_MASK 0x1 +#define ACP_I2SMICSP_RFF0__I2SMICSP_RXCHFR__SHIFT 0x0 +#define ACP_I2SMICSP_TFF0__I2SMICSP_TXCHFR_MASK 0x1 +#define ACP_I2SMICSP_TFF0__I2SMICSP_TXCHFR__SHIFT 0x0 +#define ACP_I2SMICSP_LRBR1__I2SMICSP_LRBR1_MASK 0xffffffff +#define ACP_I2SMICSP_LRBR1__I2SMICSP_LRBR1__SHIFT 0x0 +#define ACP_I2SMICSP_RRBR1__I2SMICSP_RRBR1_MASK 0xffffffff +#define ACP_I2SMICSP_RRBR1__I2SMICSP_RRBR1__SHIFT 0x0 +#define ACP_I2SMICSP_RER1__I2SMICSP_RXCHEN1_MASK 0x1 +#define ACP_I2SMICSP_RER1__I2SMICSP_RXCHEN1__SHIFT 0x0 +#define ACP_I2SMICSP_TER1__I2SMICSP_TXCHEN1_MASK 0x1 +#define ACP_I2SMICSP_TER1__I2SMICSP_TXCHEN1__SHIFT 0x0 +#define ACP_I2SMICSP_RCR1__I2SMICSP_WLEN_MASK 0x7 +#define ACP_I2SMICSP_RCR1__I2SMICSP_WLEN__SHIFT 0x0 +#define ACP_I2SMICSP_TCR1__I2SMICSP_WLEN_MASK 0x7 +#define ACP_I2SMICSP_TCR1__I2SMICSP_WLEN__SHIFT 0x0 +#define ACP_I2SMICSP_ISR1__I2SMICSP_RXDA_MASK 0x1 +#define ACP_I2SMICSP_ISR1__I2SMICSP_RXDA__SHIFT 0x0 +#define ACP_I2SMICSP_ISR1__I2SMICSP_RXFO_MASK 0x2 +#define ACP_I2SMICSP_ISR1__I2SMICSP_RXFO__SHIFT 0x1 +#define ACP_I2SMICSP_ISR1__I2SMICSP_TXFE_MASK 0x10 +#define ACP_I2SMICSP_ISR1__I2SMICSP_TXFE__SHIFT 0x4 +#define ACP_I2SMICSP_ISR1__I2SMICSP_TXFO_MASK 0x20 +#define ACP_I2SMICSP_ISR1__I2SMICSP_TXFO__SHIFT 0x5 +#define ACP_I2SMICSP_IMR1__I2SMICSP_RXDAM_MASK 0x1 +#define ACP_I2SMICSP_IMR1__I2SMICSP_RXDAM__SHIFT 0x0 +#define ACP_I2SMICSP_IMR1__I2SMICSP_RXFOM_MASK 0x2 +#define ACP_I2SMICSP_IMR1__I2SMICSP_RXFOM__SHIFT 0x1 +#define ACP_I2SMICSP_IMR1__I2SMICSP_TXFEM_MASK 0x10 +#define ACP_I2SMICSP_IMR1__I2SMICSP_TXFEM__SHIFT 0x4 +#define ACP_I2SMICSP_IMR1__I2SMICSP_TXFOM_MASK 0x20 +#define ACP_I2SMICSP_IMR1__I2SMICSP_TXFOM__SHIFT 0x5 +#define ACP_I2SMICSP_ROR1__I2SMICSP_RXCHO_MASK 0x1 +#define ACP_I2SMICSP_ROR1__I2SMICSP_RXCHO__SHIFT 0x0 +#define ACP_I2SMICSP_TOR1__I2SMICSP_TXCHO_MASK 0x1 +#define ACP_I2SMICSP_TOR1__I2SMICSP_TXCHO__SHIFT 0x0 +#define ACP_I2SMICSP_RFCR1__I2SMICSP_RXCHDT_MASK 0xf +#define ACP_I2SMICSP_RFCR1__I2SMICSP_RXCHDT__SHIFT 0x0 +#define ACP_I2SMICSP_TFCR1__I2SMICSP_TXCHET_MASK 0xf +#define ACP_I2SMICSP_TFCR1__I2SMICSP_TXCHET__SHIFT 0x0 +#define ACP_I2SMICSP_RFF1__I2SMICSP_RXCHFR_MASK 0x1 +#define ACP_I2SMICSP_RFF1__I2SMICSP_RXCHFR__SHIFT 0x0 +#define ACP_I2SMICSP_TFF1__I2SMICSP_TXCHFR_MASK 0x1 +#define ACP_I2SMICSP_TFF1__I2SMICSP_TXCHFR__SHIFT 0x0 +#define ACP_I2SMICSP_RXDMA__I2SMICSP_RXDMA_MASK 0xffffffff +#define ACP_I2SMICSP_RXDMA__I2SMICSP_RXDMA__SHIFT 0x0 +#define ACP_I2SMICSP_RRXDMA__I2SMICSP_RRXDMA_MASK 0x1 +#define ACP_I2SMICSP_RRXDMA__I2SMICSP_RRXDMA__SHIFT 0x0 +#define ACP_I2SMICSP_TXDMA__I2SMICSP_TXDMA_MASK 0xffffffff +#define ACP_I2SMICSP_TXDMA__I2SMICSP_TXDMA__SHIFT 0x0 +#define ACP_I2SMICSP_RTXDMA__I2SMICSP_RTXDMA_MASK 0x1 +#define ACP_I2SMICSP_RTXDMA__I2SMICSP_RTXDMA__SHIFT 0x0 +#define ACP_I2SMICSP_COMP_PARAM_2__I2SMICSP_RX_WPRDSIZE_0_MASK 0x7 +#define ACP_I2SMICSP_COMP_PARAM_2__I2SMICSP_RX_WPRDSIZE_0__SHIFT 0x0 +#define ACP_I2SMICSP_COMP_PARAM_2__I2SMICSP_RX_WPRDSIZE_1_MASK 0x38 +#define ACP_I2SMICSP_COMP_PARAM_2__I2SMICSP_RX_WPRDSIZE_1__SHIFT 0x3 +#define ACP_I2SMICSP_COMP_PARAM_2__I2SMICSP_RX_WPRDSIZE_2_MASK 0x380 +#define ACP_I2SMICSP_COMP_PARAM_2__I2SMICSP_RX_WPRDSIZE_2__SHIFT 0x7 +#define ACP_I2SMICSP_COMP_PARAM_2__I2SMICSP_RX_WPRDSIZE_3_MASK 0x1c00 +#define ACP_I2SMICSP_COMP_PARAM_2__I2SMICSP_RX_WPRDSIZE_3__SHIFT 0xa +#define ACP_I2SMICSP_COMP_PARAM_1__I2SMICSP_APB_DATA_WIDTH_MASK 0x3 +#define ACP_I2SMICSP_COMP_PARAM_1__I2SMICSP_APB_DATA_WIDTH__SHIFT 0x0 +#define ACP_I2SMICSP_COMP_PARAM_1__I2SMICSP_FIFO_DEPTH_GLOBAL_MASK 0xc +#define ACP_I2SMICSP_COMP_PARAM_1__I2SMICSP_FIFO_DEPTH_GLOBAL__SHIFT 0x2 +#define ACP_I2SMICSP_COMP_PARAM_1__I2SMICSP_MODE_EN_MASK 0x10 +#define ACP_I2SMICSP_COMP_PARAM_1__I2SMICSP_MODE_EN__SHIFT 0x4 +#define ACP_I2SMICSP_COMP_PARAM_1__I2SMICSP_TRANSMITTER_BLOCK_MASK 0x20 +#define ACP_I2SMICSP_COMP_PARAM_1__I2SMICSP_TRANSMITTER_BLOCK__SHIFT 0x5 +#define ACP_I2SMICSP_COMP_PARAM_1__I2SMICSP_RECEIVER_BLOCK_MASK 0x40 +#define ACP_I2SMICSP_COMP_PARAM_1__I2SMICSP_RECEIVER_BLOCK__SHIFT 0x6 +#define ACP_I2SMICSP_COMP_PARAM_1__I2SMICSP_RX_CHANNLES_MASK 0x180 +#define ACP_I2SMICSP_COMP_PARAM_1__I2SMICSP_RX_CHANNLES__SHIFT 0x7 +#define ACP_I2SMICSP_COMP_PARAM_1__I2SMICSP_TX_CHANNLES_MASK 0x600 +#define ACP_I2SMICSP_COMP_PARAM_1__I2SMICSP_TX_CHANNLES__SHIFT 0x9 +#define ACP_I2SMICSP_COMP_PARAM_1__I2SMICSP_TX_WORDSIZE_0_MASK 0x70000 +#define ACP_I2SMICSP_COMP_PARAM_1__I2SMICSP_TX_WORDSIZE_0__SHIFT 0x10 +#define ACP_I2SMICSP_COMP_PARAM_1__I2SMICSP_TX_WORDSIZE_1_MASK 0x380000 +#define ACP_I2SMICSP_COMP_PARAM_1__I2SMICSP_TX_WORDSIZE_1__SHIFT 0x13 +#define ACP_I2SMICSP_COMP_PARAM_1__I2SMICSP_TX_WORDSIZE_2_MASK 0x1c00000 +#define ACP_I2SMICSP_COMP_PARAM_1__I2SMICSP_TX_WORDSIZE_2__SHIFT 0x16 +#define ACP_I2SMICSP_COMP_PARAM_1__I2SMICSP_TX_WORDSIZE_3_MASK 0xe000000 +#define ACP_I2SMICSP_COMP_PARAM_1__I2SMICSP_TX_WORDSIZE_3__SHIFT 0x19 +#define ACP_I2SMICSP_COMP_VERSION__I2SMICSP_APB_DATA_WIDTH_MASK 0xffffffff +#define ACP_I2SMICSP_COMP_VERSION__I2SMICSP_APB_DATA_WIDTH__SHIFT 0x0 +#define ACP_I2SMICSP_COMP_TYPE__I2SMICSP_COMP_TYPE_MASK 0xffffffff +#define ACP_I2SMICSP_COMP_TYPE__I2SMICSP_COMP_TYPE__SHIFT 0x0 +#define ACP_I2SBT_IER__I2SBT_IEN_MASK 0x1 +#define ACP_I2SBT_IER__I2SBT_IEN__SHIFT 0x0 +#define ACP_I2SBT_IRER__I2SBT_RXEN_MASK 0x1 +#define ACP_I2SBT_IRER__I2SBT_RXEN__SHIFT 0x0 +#define ACP_I2SBT_ITER__I2SBT_TXEN_MASK 0x1 +#define ACP_I2SBT_ITER__I2SBT_TXEN__SHIFT 0x0 +#define ACP_I2SBT_CER__I2SBT_CLKEN_MASK 0x1 +#define ACP_I2SBT_CER__I2SBT_CLKEN__SHIFT 0x0 +#define ACP_I2SBT_CCR__I2SBT_SCLKG_MASK 0x7 +#define ACP_I2SBT_CCR__I2SBT_SCLKG__SHIFT 0x0 +#define ACP_I2SBT_CCR__I2SBT_WSS_MASK 0x18 +#define ACP_I2SBT_CCR__I2SBT_WSS__SHIFT 0x3 +#define ACP_I2SBT_RXFFR__I2SBT_RXFFR_MASK 0x1 +#define ACP_I2SBT_RXFFR__I2SBT_RXFFR__SHIFT 0x0 +#define ACP_I2SBT_TXFFR__I2SBT_TXFFR_MASK 0x1 +#define ACP_I2SBT_TXFFR__I2SBT_TXFFR__SHIFT 0x0 +#define ACP_I2SBT_LRBR0__I2SBT_LRBR0_MASK 0xffffffff +#define ACP_I2SBT_LRBR0__I2SBT_LRBR0__SHIFT 0x0 +#define ACP_I2SBT_RRBR0__I2SBT_RRBR0_MASK 0xffffffff +#define ACP_I2SBT_RRBR0__I2SBT_RRBR0__SHIFT 0x0 +#define ACP_I2SBT_RER0__I2SBT_RXCHEN0_MASK 0x1 +#define ACP_I2SBT_RER0__I2SBT_RXCHEN0__SHIFT 0x0 +#define ACP_I2SBT_TER0__I2SBT_TXCHEN0_MASK 0x1 +#define ACP_I2SBT_TER0__I2SBT_TXCHEN0__SHIFT 0x0 +#define ACP_I2SBT_RCR0__I2SBT_WLEN_MASK 0x7 +#define ACP_I2SBT_RCR0__I2SBT_WLEN__SHIFT 0x0 +#define ACP_I2SBT_TCR0__I2SBT_WLEN_MASK 0x7 +#define ACP_I2SBT_TCR0__I2SBT_WLEN__SHIFT 0x0 +#define ACP_I2SBT_ISR0__I2SBT_RXDA_MASK 0x1 +#define ACP_I2SBT_ISR0__I2SBT_RXDA__SHIFT 0x0 +#define ACP_I2SBT_ISR0__I2SBT_RXFO_MASK 0x2 +#define ACP_I2SBT_ISR0__I2SBT_RXFO__SHIFT 0x1 +#define ACP_I2SBT_ISR0__I2SBT_TXFE_MASK 0x10 +#define ACP_I2SBT_ISR0__I2SBT_TXFE__SHIFT 0x4 +#define ACP_I2SBT_ISR0__I2SBT_TXFO_MASK 0x20 +#define ACP_I2SBT_ISR0__I2SBT_TXFO__SHIFT 0x5 +#define ACP_I2SBT_IMR0__I2SBT_RXDAM_MASK 0x1 +#define ACP_I2SBT_IMR0__I2SBT_RXDAM__SHIFT 0x0 +#define ACP_I2SBT_IMR0__I2SBT_RXFOM_MASK 0x2 +#define ACP_I2SBT_IMR0__I2SBT_RXFOM__SHIFT 0x1 +#define ACP_I2SBT_IMR0__I2SBT_TXFEM_MASK 0x10 +#define ACP_I2SBT_IMR0__I2SBT_TXFEM__SHIFT 0x4 +#define ACP_I2SBT_IMR0__I2SBT_TXFOM_MASK 0x20 +#define ACP_I2SBT_IMR0__I2SBT_TXFOM__SHIFT 0x5 +#define ACP_I2SBT_ROR0__I2SBT_RXCHO_MASK 0x1 +#define ACP_I2SBT_ROR0__I2SBT_RXCHO__SHIFT 0x0 +#define ACP_I2SBT_TOR0__I2SBT_TXCHO_MASK 0x1 +#define ACP_I2SBT_TOR0__I2SBT_TXCHO__SHIFT 0x0 +#define ACP_I2SBT_RFCR0__I2SBT_RXCHDT_MASK 0xf +#define ACP_I2SBT_RFCR0__I2SBT_RXCHDT__SHIFT 0x0 +#define ACP_I2SBT_TFCR0__I2SBT_TXCHET_MASK 0xf +#define ACP_I2SBT_TFCR0__I2SBT_TXCHET__SHIFT 0x0 +#define ACP_I2SBT_RFF0__I2SBT_RXCHFR_MASK 0x1 +#define ACP_I2SBT_RFF0__I2SBT_RXCHFR__SHIFT 0x0 +#define ACP_I2SBT_TFF0__I2SBT_TXCHFR_MASK 0x1 +#define ACP_I2SBT_TFF0__I2SBT_TXCHFR__SHIFT 0x0 +#define ACP_I2SBT_LRBR1__I2SBT_LRBR1_MASK 0xffffffff +#define ACP_I2SBT_LRBR1__I2SBT_LRBR1__SHIFT 0x0 +#define ACP_I2SBT_RRBR1__I2SBT_RRBR1_MASK 0xffffffff +#define ACP_I2SBT_RRBR1__I2SBT_RRBR1__SHIFT 0x0 +#define ACP_I2SBT_RER1__I2SBT_RXCHEN1_MASK 0x1 +#define ACP_I2SBT_RER1__I2SBT_RXCHEN1__SHIFT 0x0 +#define ACP_I2SBT_TER1__I2SBT_TXCHEN1_MASK 0x1 +#define ACP_I2SBT_TER1__I2SBT_TXCHEN1__SHIFT 0x0 +#define ACP_I2SBT_RCR1__I2SBT_WLEN_MASK 0x7 +#define ACP_I2SBT_RCR1__I2SBT_WLEN__SHIFT 0x0 +#define ACP_I2SBT_TCR1__I2SBT_WLEN_MASK 0x7 +#define ACP_I2SBT_TCR1__I2SBT_WLEN__SHIFT 0x0 +#define ACP_I2SBT_ISR1__I2SBT_RXDA_MASK 0x1 +#define ACP_I2SBT_ISR1__I2SBT_RXDA__SHIFT 0x0 +#define ACP_I2SBT_ISR1__I2SBT_RXFO_MASK 0x2 +#define ACP_I2SBT_ISR1__I2SBT_RXFO__SHIFT 0x1 +#define ACP_I2SBT_ISR1__I2SBT_TXFE_MASK 0x10 +#define ACP_I2SBT_ISR1__I2SBT_TXFE__SHIFT 0x4 +#define ACP_I2SBT_ISR1__I2SBT_TXFO_MASK 0x20 +#define ACP_I2SBT_ISR1__I2SBT_TXFO__SHIFT 0x5 +#define ACP_I2SBT_IMR1__I2SBT_RXDAM_MASK 0x1 +#define ACP_I2SBT_IMR1__I2SBT_RXDAM__SHIFT 0x0 +#define ACP_I2SBT_IMR1__I2SBT_RXFOM_MASK 0x2 +#define ACP_I2SBT_IMR1__I2SBT_RXFOM__SHIFT 0x1 +#define ACP_I2SBT_IMR1__I2SBT_TXFEM_MASK 0x10 +#define ACP_I2SBT_IMR1__I2SBT_TXFEM__SHIFT 0x4 +#define ACP_I2SBT_IMR1__I2SBT_TXFOM_MASK 0x20 +#define ACP_I2SBT_IMR1__I2SBT_TXFOM__SHIFT 0x5 +#define ACP_I2SBT_ROR1__I2SBT_RXCHO_MASK 0x1 +#define ACP_I2SBT_ROR1__I2SBT_RXCHO__SHIFT 0x0 +#define ACP_I2SBT_TOR1__I2SBT_TXCHO_MASK 0x1 +#define ACP_I2SBT_TOR1__I2SBT_TXCHO__SHIFT 0x0 +#define ACP_I2SBT_RFCR1__I2SBT_RXCHDT_MASK 0xf +#define ACP_I2SBT_RFCR1__I2SBT_RXCHDT__SHIFT 0x0 +#define ACP_I2SBT_TFCR1__I2SBT_TXCHET_MASK 0xf +#define ACP_I2SBT_TFCR1__I2SBT_TXCHET__SHIFT 0x0 +#define ACP_I2SBT_RFF1__I2SBT_RXCHFR_MASK 0x1 +#define ACP_I2SBT_RFF1__I2SBT_RXCHFR__SHIFT 0x0 +#define ACP_I2SBT_TFF1__I2SBT_TXCHFR_MASK 0x1 +#define ACP_I2SBT_TFF1__I2SBT_TXCHFR__SHIFT 0x0 +#define ACP_I2SBT_RXDMA__I2SBT_RXDMA_MASK 0xffffffff +#define ACP_I2SBT_RXDMA__I2SBT_RXDMA__SHIFT 0x0 +#define ACP_I2SBT_RRXDMA__I2SBT_RRXDMA_MASK 0x1 +#define ACP_I2SBT_RRXDMA__I2SBT_RRXDMA__SHIFT 0x0 +#define ACP_I2SBT_TXDMA__I2SBT_TXDMA_MASK 0xffffffff +#define ACP_I2SBT_TXDMA__I2SBT_TXDMA__SHIFT 0x0 +#define ACP_I2SBT_RTXDMA__I2SBT_RTXDMA_MASK 0x1 +#define ACP_I2SBT_RTXDMA__I2SBT_RTXDMA__SHIFT 0x0 +#define ACP_I2SBT_COMP_PARAM_2__I2SBT_RX_WPRDSIZE_0_MASK 0x7 +#define ACP_I2SBT_COMP_PARAM_2__I2SBT_RX_WPRDSIZE_0__SHIFT 0x0 +#define ACP_I2SBT_COMP_PARAM_2__I2SBT_RX_WPRDSIZE_1_MASK 0x38 +#define ACP_I2SBT_COMP_PARAM_2__I2SBT_RX_WPRDSIZE_1__SHIFT 0x3 +#define ACP_I2SBT_COMP_PARAM_2__I2SBT_RX_WPRDSIZE_2_MASK 0x380 +#define ACP_I2SBT_COMP_PARAM_2__I2SBT_RX_WPRDSIZE_2__SHIFT 0x7 +#define ACP_I2SBT_COMP_PARAM_2__I2SBT_RX_WPRDSIZE_3_MASK 0x1c00 +#define ACP_I2SBT_COMP_PARAM_2__I2SBT_RX_WPRDSIZE_3__SHIFT 0xa +#define ACP_I2SBT_COMP_PARAM_1__I2SBT_APB_DATA_WIDTH_MASK 0x3 +#define ACP_I2SBT_COMP_PARAM_1__I2SBT_APB_DATA_WIDTH__SHIFT 0x0 +#define ACP_I2SBT_COMP_PARAM_1__I2SBT_FIFO_DEPTH_GLOBAL_MASK 0xc +#define ACP_I2SBT_COMP_PARAM_1__I2SBT_FIFO_DEPTH_GLOBAL__SHIFT 0x2 +#define ACP_I2SBT_COMP_PARAM_1__I2SBT_MODE_EN_MASK 0x10 +#define ACP_I2SBT_COMP_PARAM_1__I2SBT_MODE_EN__SHIFT 0x4 +#define ACP_I2SBT_COMP_PARAM_1__I2SBT_TRANSMITTER_BLOCK_MASK 0x20 +#define ACP_I2SBT_COMP_PARAM_1__I2SBT_TRANSMITTER_BLOCK__SHIFT 0x5 +#define ACP_I2SBT_COMP_PARAM_1__I2SBT_RECEIVER_BLOCK_MASK 0x40 +#define ACP_I2SBT_COMP_PARAM_1__I2SBT_RECEIVER_BLOCK__SHIFT 0x6 +#define ACP_I2SBT_COMP_PARAM_1__I2SBT_RX_CHANNLES_MASK 0x180 +#define ACP_I2SBT_COMP_PARAM_1__I2SBT_RX_CHANNLES__SHIFT 0x7 +#define ACP_I2SBT_COMP_PARAM_1__I2SBT_TX_CHANNLES_MASK 0x600 +#define ACP_I2SBT_COMP_PARAM_1__I2SBT_TX_CHANNLES__SHIFT 0x9 +#define ACP_I2SBT_COMP_PARAM_1__I2SBT_TX_WORDSIZE_0_MASK 0x70000 +#define ACP_I2SBT_COMP_PARAM_1__I2SBT_TX_WORDSIZE_0__SHIFT 0x10 +#define ACP_I2SBT_COMP_PARAM_1__I2SBT_TX_WORDSIZE_1_MASK 0x380000 +#define ACP_I2SBT_COMP_PARAM_1__I2SBT_TX_WORDSIZE_1__SHIFT 0x13 +#define ACP_I2SBT_COMP_PARAM_1__I2SBT_TX_WORDSIZE_2_MASK 0x1c00000 +#define ACP_I2SBT_COMP_PARAM_1__I2SBT_TX_WORDSIZE_2__SHIFT 0x16 +#define ACP_I2SBT_COMP_PARAM_1__I2SBT_TX_WORDSIZE_3_MASK 0xe000000 +#define ACP_I2SBT_COMP_PARAM_1__I2SBT_TX_WORDSIZE_3__SHIFT 0x19 +#define ACP_I2SBT_COMP_VERSION__I2SBT_APB_DATA_WIDTH_MASK 0xffffffff +#define ACP_I2SBT_COMP_VERSION__I2SBT_APB_DATA_WIDTH__SHIFT 0x0 +#define ACP_I2SBT_COMP_TYPE__I2SBT_COMP_TYPE_MASK 0xffffffff +#define ACP_I2SBT_COMP_TYPE__I2SBT_COMP_TYPE__SHIFT 0x0 + +#endif /* ACP_2_2_SH_MASK_H */ -- 2.7.0.rc3

1 0

[alsa-devel] Applied "ASoC: bcm2835: cleanup includes by ordering them alphabetically" to the asoc tree
by Mark Brown 10 Jan '16

10 Jan '16

The patch ASoC: bcm2835: cleanup includes by ordering them alphabetically has been applied to the asoc tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From 7905f08247131ac5d5c0e2f057e0cf19da40e5da Mon Sep 17 00:00:00 2001 From: Martin Sperl <kernel(a)martin.sperl.org> Date: Sat, 9 Jan 2016 09:25:53 +0000 Subject: [PATCH] ASoC: bcm2835: cleanup includes by ordering them alphabetically Cleanup of includes so that they are ordered alphabetically. Signed-off-by: Martin Sperl <kernel(a)martin.sperl.org> Signed-off-by: Mark Brown <broonie(a)kernel.org> --- sound/soc/bcm/bcm2835-i2s.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/sound/soc/bcm/bcm2835-i2s.c b/sound/soc/bcm/bcm2835-i2s.c index 8c435beb263d..3303d5f58082 100644 --- a/sound/soc/bcm/bcm2835-i2s.c +++ b/sound/soc/bcm/bcm2835-i2s.c @@ -31,20 +31,20 @@ * General Public License for more details. */ +#include <linux/clk.h> +#include <linux/delay.h> +#include <linux/device.h> #include <linux/init.h> +#include <linux/io.h> #include <linux/module.h> -#include <linux/device.h> #include <linux/slab.h> -#include <linux/delay.h> -#include <linux/io.h> -#include <linux/clk.h> #include <sound/core.h> +#include <sound/dmaengine_pcm.h> +#include <sound/initval.h> #include <sound/pcm.h> #include <sound/pcm_params.h> -#include <sound/initval.h> #include <sound/soc.h> -#include <sound/dmaengine_pcm.h> /* Clock registers */ #define BCM2835_CLK_PCMCTL_REG 0x00 -- 2.7.0.rc3

1 0

[alsa-devel] [PATCH v4 00/13] ASoC: Intel: Skylake: Update to SKL driver
by Vinod Koul 10 Jan '16

10 Jan '16

This update bring in new APIs in core and usage of those in SKL driver. The series is broadly of three parts - first two are fixes on the driver - then we add DMA resume capability in HDA core and use it to save restore DMA link values and add DMA resume capability in driver - lastly, we add support for MISCBDCGE configuration in core and use it while resetting and also for phrase detection per HW recommendation This should be merged thru ASoC tree due to obvious dependencies. Takashi would need your ack on core patches change in v4: - fix the circular depends on two ko's change is v3: - fix the missing export symbol, reported by lkp changes in v2: - move msicbdge api to driver and as a consequence sqash into into first use - fix lkp warning Dharageswari.R (1): ASoC: Intel: Skylake: Use CGCTL.MISCBDCGE for Phrase detection notification Jayachandran B (2): ALSA: hdac: Increase timeout value for link power check ASoC: Intel: Skylake: fix reset controller sequencing Jeeja KP (8): ASoC: Intel: Skylake: Clear stream registers before stream setup ASoC: Intel: Skylake: Fix to set pipe state to invalid when deleting ALSA: hdac: Add support for hda DMA Resume capability ALSA: hdac: couple the hda DMA stream in cleanup ASoC: Intel: Skylake: enable interrupt as wake source in active suspend ASoC: Intel: Skylake: Add DMA resume position in Trigger resume/suspend ASoC: Intel: Skylake: Reconfigure Link stream on suspend/resume ASoC: Intel: Skylake: Add Resume capability in PCM info. Vinod Koul (2): ALSA: hdac: add snd_hdac_ext_bus_link_power_up_all ASoC: Intel: Skylake: manage link power in active suspend include/sound/hda_register.h | 9 +++++ include/sound/hdaudio_ext.h | 15 +++++++ sound/hda/ext/hdac_ext_controller.c | 29 ++++++++++++- sound/hda/ext/hdac_ext_stream.c | 72 +++++++++++++++++++++++++++++++++ sound/soc/intel/skylake/skl-messages.c | 2 + sound/soc/intel/skylake/skl-pcm.c | 56 ++++++++++++++++++++----- sound/soc/intel/skylake/skl-sst-cldma.c | 38 ++++++++++------- sound/soc/intel/skylake/skl-sst-ipc.c | 15 +++++++ sound/soc/intel/skylake/skl-sst-ipc.h | 5 +++ sound/soc/intel/skylake/skl.c | 61 ++++++++++++++++++++++++++-- sound/soc/intel/skylake/skl.h | 3 ++ 11 files changed, 275 insertions(+), 30 deletions(-) -- 1.9.1

3 21

[alsa-devel] [PATCH 00/14] ASoC: Intel: Skylake: Update to SKL driver
by Vinod Koul 10 Jan '16

10 Jan '16

This update bring in new APIs in core and usage of those in SKL driver. The series is broadly of three parts - first two are fixes on the driver - then we add DMA resume capability in HDA core and use it to save restore DMA link values and add DMA resume capability in driver - lastly, we add support for MISCBDCGE configuration in core and use it while resetting and also for phrase detection per HW recommendation This should be merged thru ASoC tree due to obvious dependencies. Takashi would need your ack on core patches Dharageswari.R (1): ASoC: Intel: Skylake: Use CGCTL.MISCBDCGE for Phrase detection notification Jayachandran B (3): ALSA: hdac: Add MISCBDCGE support ALSA: hdac: Increase timeout value for link power check ASoC: Intel: Skylake: fix reset controller sequencing Jeeja KP (8): ASoC: Intel: Skylake: Clear stream registers before stream setup ASoC: Intel: Skylake: Fix to set pipe state to invalid when deleting ALSA: hdac: Add support for hda DMA Resume capability ALSA: hdac: couple the hda DMA stream in cleanup ASoC: Intel: Skylake: enable interrupt as wake source in active suspend ASoC: Intel: Skylake: Add DMA resume position in Trigger resume/suspend ASoC: Intel: Skylake: Reconfigure Link stream on suspend/resume ASoC: Intel: Skylake: Add Resume capability in PCM info. Vinod Koul (2): ALSA: hdac: add snd_hdac_ext_bus_link_power_up_all ASoC: Intel: Skylake: manage link power in active suspend include/sound/hda_register.h | 12 ++++++ include/sound/hdaudio_ext.h | 16 ++++++++ sound/hda/ext/hdac_ext_controller.c | 52 +++++++++++++++++++++++- sound/hda/ext/hdac_ext_stream.c | 72 +++++++++++++++++++++++++++++++++ sound/soc/intel/skylake/skl-messages.c | 2 + sound/soc/intel/skylake/skl-pcm.c | 56 ++++++++++++++++++++----- sound/soc/intel/skylake/skl-sst-cldma.c | 38 ++++++++++------- sound/soc/intel/skylake/skl-sst-ipc.c | 14 +++++++ sound/soc/intel/skylake/skl-sst-ipc.h | 3 ++ sound/soc/intel/skylake/skl.c | 30 ++++++++++++-- 10 files changed, 265 insertions(+), 30 deletions(-) -- 1.9.1

3 27

[alsa-devel] [PATCH 0/7] ASoC: Intel: Skylake: Fix suspend issues
by Vinod Koul 10 Jan '16

10 Jan '16

While testing legacy Suspend on Skylake, we found few issues that require driver changes. This was tested with usermode apps and aplay. We need to add RESUME capability in driver to let ALSA resume us, then HDA was not getting reconfigured upon resume so that is updated. CLDMA needs to be polled as that takes a little while like HDA DMA, also clear of registers is required per spec upon setup Last one fixes resource leak upon failures by movng free call up (not related to suspend though but observed when we saw failures) Jeeja KP (6): ASoC: Intel: Skylake: Add Resume capability in PCM info. ASoC: Intel: Skylake: Reconfigure HDA stream register in prepare/resume ASoC: Intel: Skylake: Fix to update bit depth for module params ASoC: Intel: Skylake: Add pcm capability to support 16/8k rates. ASoC: Intel: Skylake: Poll CLDMA RUN bit when set ASoC: Intel: Skylake: Clear stream registers before setting up stream Vinod Koul (1): ASoC: Intel: Skylake: Move up pipe mem free sound/soc/intel/skylake/skl-pcm.c | 22 +++++---- sound/soc/intel/skylake/skl-sst-cldma.c | 82 +++++++++++++++++++++------------ sound/soc/intel/skylake/skl-topology.c | 22 +++++++-- 3 files changed, 86 insertions(+), 40 deletions(-) -- 1.9.1

3 18

[alsa-devel] [PATCH] ASoC: rockchip: i2s: Add SNDRV_PCM_FMTBIT_S32_LE support
by Michael Trimarchi 10 Jan '16

10 Jan '16

Signed-off-by: Michael Trimarchi <michael(a)amarulasolutions.com> --- sound/soc/rockchip/rockchip_i2s.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/sound/soc/rockchip/rockchip_i2s.c b/sound/soc/rockchip/rockchip_i2s.c index 58ee645..c35700f 100644 --- a/sound/soc/rockchip/rockchip_i2s.c +++ b/sound/soc/rockchip/rockchip_i2s.c @@ -242,6 +242,9 @@ static int rockchip_i2s_hw_params(struct snd_pcm_substream *substream, case SNDRV_PCM_FORMAT_S24_LE: val |= I2S_TXCR_VDW(24); break; + case SNDRV_PCM_FORMAT_S32_LE: + val |= I2S_TXCR_VDW(32); + break; default: return -EINVAL; } @@ -360,7 +363,8 @@ static struct snd_soc_dai_driver rockchip_i2s_dai = { .formats = (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | - SNDRV_PCM_FMTBIT_S24_LE), + SNDRV_PCM_FMTBIT_S24_LE | + SNDRV_PCM_FMTBIT_S32_LE), }, .capture = { .stream_name = "Capture", @@ -370,7 +374,8 @@ static struct snd_soc_dai_driver rockchip_i2s_dai = { .formats = (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | - SNDRV_PCM_FMTBIT_S24_LE), + SNDRV_PCM_FMTBIT_S24_LE | + SNDRV_PCM_FMTBIT_S32_LE), }, .ops = &rockchip_i2s_dai_ops, .symmetric_rates = 1, -- 2.7.0

2 1

[alsa-devel] Applied "ASoC: pcm1792a: Rename pcm1792a to pcm179x" to the asoc tree
by Mark Brown 10 Jan '16

10 Jan '16

The patch ASoC: pcm1792a: Rename pcm1792a to pcm179x has been applied to the asoc tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From 0471cd938e244e22f3ead77d2b82230f83e35f69 Mon Sep 17 00:00:00 2001 From: Michael Trimarchi <michael(a)amarulasolutions.com> Date: Sun, 10 Jan 2016 00:38:04 +0100 Subject: [PATCH] ASoC: pcm1792a: Rename pcm1792a to pcm179x pcm1792a is compatible with pcm1795 and pcm1796 so it's better to have them under the common name pcm179x Signed-off-by: Michael Trimarchi <michael(a)amarulasolutions.com> Signed-off-by: Mark Brown <broonie(a)kernel.org> --- .../devicetree/bindings/sound/{pcm1792a.txt => pcm179x.txt} | 2 +- sound/soc/codecs/Kconfig | 6 +++--- sound/soc/codecs/Makefile | 4 ++-- sound/soc/codecs/{pcm1792a.c => pcm179x.c} | 0 sound/soc/codecs/{pcm1792a.h => pcm179x.h} | 0 5 files changed, 6 insertions(+), 6 deletions(-) rename Documentation/devicetree/bindings/sound/{pcm1792a.txt => pcm179x.txt} (88%) rename sound/soc/codecs/{pcm1792a.c => pcm179x.c} (100%) rename sound/soc/codecs/{pcm1792a.h => pcm179x.h} (100%) diff --git a/Documentation/devicetree/bindings/sound/pcm1792a.txt b/Documentation/devicetree/bindings/sound/pcm179x.txt similarity index 88% rename from Documentation/devicetree/bindings/sound/pcm1792a.txt rename to Documentation/devicetree/bindings/sound/pcm179x.txt index 970ba1ed576f..4ae70d3462d6 100644 --- a/Documentation/devicetree/bindings/sound/pcm1792a.txt +++ b/Documentation/devicetree/bindings/sound/pcm179x.txt @@ -1,4 +1,4 @@ -Texas Instruments pcm1792a DT bindings +Texas Instruments pcm179x DT bindings This driver supports the SPI bus. diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index cfdafc4c11ea..b28060e55006 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -83,7 +83,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_ML26124 if I2C select SND_SOC_NAU8825 if I2C select SND_SOC_PCM1681 if I2C - select SND_SOC_PCM1792A if SPI_MASTER + select SND_SOC_PCM179X if SPI_MASTER select SND_SOC_PCM3008 select SND_SOC_PCM512x_I2C if I2C select SND_SOC_PCM512x_SPI if SPI_MASTER @@ -499,8 +499,8 @@ config SND_SOC_PCM1681 tristate "Texas Instruments PCM1681 CODEC" depends on I2C -config SND_SOC_PCM1792A - tristate "Texas Instruments PCM1792A CODEC" +config SND_SOC_PCM179X + tristate "Texas Instruments PCM179X CODEC" depends on SPI_MASTER config SND_SOC_PCM3008 diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index f632fc42f59f..e4256039ff80 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -76,7 +76,7 @@ snd-soc-mc13783-objs := mc13783.o snd-soc-ml26124-objs := ml26124.o snd-soc-nau8825-objs := nau8825.o snd-soc-pcm1681-objs := pcm1681.o -snd-soc-pcm1792a-codec-objs := pcm1792a.o +snd-soc-pcm179x-codec-objs := pcm179x.o snd-soc-pcm3008-objs := pcm3008.o snd-soc-pcm512x-objs := pcm512x.o snd-soc-pcm512x-i2c-objs := pcm512x-i2c.o @@ -271,7 +271,7 @@ obj-$(CONFIG_SND_SOC_MC13783) += snd-soc-mc13783.o obj-$(CONFIG_SND_SOC_ML26124) += snd-soc-ml26124.o obj-$(CONFIG_SND_SOC_NAU8825) += snd-soc-nau8825.o obj-$(CONFIG_SND_SOC_PCM1681) += snd-soc-pcm1681.o -obj-$(CONFIG_SND_SOC_PCM1792A) += snd-soc-pcm1792a-codec.o +obj-$(CONFIG_SND_SOC_PCM179X) += snd-soc-pcm179x-codec.o obj-$(CONFIG_SND_SOC_PCM3008) += snd-soc-pcm3008.o obj-$(CONFIG_SND_SOC_PCM512x) += snd-soc-pcm512x.o obj-$(CONFIG_SND_SOC_PCM512x_I2C) += snd-soc-pcm512x-i2c.o diff --git a/sound/soc/codecs/pcm1792a.c b/sound/soc/codecs/pcm179x.c similarity index 100% rename from sound/soc/codecs/pcm1792a.c rename to sound/soc/codecs/pcm179x.c diff --git a/sound/soc/codecs/pcm1792a.h b/sound/soc/codecs/pcm179x.h similarity index 100% rename from sound/soc/codecs/pcm1792a.h rename to sound/soc/codecs/pcm179x.h -- 2.7.0.rc3

1 0

[alsa-devel] [PATCH 0/8] Add ASoC support for AMD APUs [v6]
by Alex Deucher 09 Jan '16

09 Jan '16

This patch set implements support for i2s audio and new AMD GPUs. The i2s codec is fed by a DMA engine on the GPU. To handle this we create mfd cells which we hang the i2s codec and DMA engine on. Because of this, this patch set covers two subsystems: drm and alsa. The drm patches add support for the ACP hw block which provides the DMA engine for the i2s codec. The alsa patches add the ASoC driver for the i2s codec. Since the alsa changes depend on the drm changes, I'd like to take the alsa patches in via the drm tree. This patch set depends on the following patch from the linux-pm tree: PM / Domains: export symbols to add/remove devices from genpd And the following patches from the audio tree: ASoC: dwc: add runtime suspend/resume functionality ASoC: dwc: add quirk for different register offset ASoC: dwc: reconfigure dwc in 'resume' from 'suspend' I talked to Dave Airlie on IRC and he has acked the drm side. V2 changes: - Use the MFD subsystem rather than adding our own bus - Squash all sub-feature patches together - fix comments mentioned in previous review V3 changes: - Update the designware driver to handle slave mode, amd specific features - Use the designware driver directly for i2s - Move the DMA handling from the GPU driver into the AMD ASoC driver - Change the license on the ASoC driver to GPL v4 changes: - patch "ASoC : dwc : support dw i2s in slave mode" accepted - Add a _dai_fmt() operation that checks to make sure that the mode we're setting corresponds to what we read back from the hardware. - Split specific quirks into separate patches - Set the specific quirks that apply to AMD chips in the acp driver v5 changes: - patch "ASoC : dwc : add check for master/slave format" accepted - Fix MFD_CORE selection in ACP Kconfig - Add irq domain support to amdgpu driver - Use genirq in ACP DMA driver - Export some genpd symbols to support ACP powergating (Acked by PM maintainer) - Use genpd for ACP powergating - add separate capture and playback instances of dws in ACP init - add runtime suspend support for dws in master mode v6 changes: - Squash ACP DMA and abstraction layer patches into one - Drop dependent patches from other trees - Fix ACP DMA irq none case - ACP DMA coding style cleanups - Add timeouts to wait loops - Clarify ACP powergating banks handling Patch 5 adds the register headers for the ACP block which is a pretty big patch so I've excluded it from email. The entire patch set can be viewed here: http://cgit.freedesktop.org/~agd5f/linux/log/?h=acp-upstream9 Thanks, Alex Alex Deucher (2): drm/amdgpu/cgs: add an interface to access PCI resources drm/amdgpu: add irq domain support Maruthi Bayyavarapu (1): drm/amd: add ACP driver support Maruthi Srinivas Bayyavarapu (5): drm/amd: add pm domain for ACP IP sub blocks ASoC: AMD: add ACP 2.2 register headers ASoC: AMD: add AMD ASoC ACP 2.x DMA driver ASoC: AMD: add pm ops ASoC: AMD: Manage ACP 2.x SRAM banks power drivers/gpu/drm/Kconfig | 2 + drivers/gpu/drm/amd/acp/Kconfig | 11 + drivers/gpu/drm/amd/acp/Makefile | 8 + drivers/gpu/drm/amd/acp/acp_hw.c | 50 + drivers/gpu/drm/amd/acp/include/acp_gfx_if.h | 34 + drivers/gpu/drm/amd/amdgpu/Makefile | 13 +- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 12 + drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c | 501 ++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_acp.h | 42 + drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c | 36 + drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 108 +- drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h | 9 + drivers/gpu/drm/amd/amdgpu/cik_ih.c | 6 + drivers/gpu/drm/amd/amdgpu/cz_ih.c | 7 + drivers/gpu/drm/amd/amdgpu/iceland_ih.c | 7 + drivers/gpu/drm/amd/amdgpu/tonga_ih.c | 7 + drivers/gpu/drm/amd/amdgpu/vi.c | 12 + drivers/gpu/drm/amd/include/amd_shared.h | 1 + drivers/gpu/drm/amd/include/cgs_common.h | 34 + sound/soc/Kconfig | 1 + sound/soc/Makefile | 1 + sound/soc/amd/Kconfig | 4 + sound/soc/amd/Makefile | 3 + sound/soc/amd/acp-pcm-dma.c | 1066 ++++++++++++ sound/soc/amd/acp.h | 119 ++ sound/soc/amd/include/acp_2_2_d.h | 609 +++++++ sound/soc/amd/include/acp_2_2_enum.h | 1068 ++++++++++++ sound/soc/amd/include/acp_2_2_sh_mask.h | 2292 ++++++++++++++++++++++++++ 28 files changed, 6054 insertions(+), 9 deletions(-) create mode 100644 drivers/gpu/drm/amd/acp/Kconfig create mode 100644 drivers/gpu/drm/amd/acp/Makefile create mode 100644 drivers/gpu/drm/amd/acp/acp_hw.c create mode 100644 drivers/gpu/drm/amd/acp/include/acp_gfx_if.h create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.h create mode 100644 sound/soc/amd/Kconfig create mode 100644 sound/soc/amd/Makefile create mode 100644 sound/soc/amd/acp-pcm-dma.c create mode 100644 sound/soc/amd/acp.h create mode 100644 sound/soc/amd/include/acp_2_2_d.h create mode 100644 sound/soc/amd/include/acp_2_2_enum.h create mode 100644 sound/soc/amd/include/acp_2_2_sh_mask.h -- 2.5.0

2 16

[alsa-devel] [PATCH 0/9] Add ASoC support for AMD APUs [v7]
by Alex Deucher 09 Jan '16

09 Jan '16

This patch set implements support for i2s audio and new AMD GPUs. The i2s codec is fed by a DMA engine on the GPU. To handle this we create mfd cells which we hang the i2s codec and DMA engine on. Because of this, this patch set covers two subsystems: drm and alsa. The drm patches add support for the ACP hw block which provides the DMA engine for the i2s codec. The alsa patches add the ASoC driver for the i2s codec. Since the alsa changes depend on the drm changes, I'd like to take the alsa patches in via the drm tree. This patch set depends on the following patch from the linux-pm tree: PM / Domains: export symbols to add/remove devices from genpd And the following patches from the audio tree: ASoC: dwc: add runtime suspend/resume functionality ASoC: dwc: add quirk for different register offset ASoC: dwc: reconfigure dwc in 'resume' from 'suspend' V2 changes: - Use the MFD subsystem rather than adding our own bus - Squash all sub-feature patches together - fix comments mentioned in previous review V3 changes: - Update the designware driver to handle slave mode, amd specific features - Use the designware driver directly for i2s - Move the DMA handling from the GPU driver into the AMD ASoC driver - Change the license on the ASoC driver to GPL v4 changes: - patch "ASoC : dwc : support dw i2s in slave mode" accepted - Add a _dai_fmt() operation that checks to make sure that the mode we're setting corresponds to what we read back from the hardware. - Split specific quirks into separate patches - Set the specific quirks that apply to AMD chips in the acp driver v5 changes: - patch "ASoC : dwc : add check for master/slave format" accepted - Fix MFD_CORE selection in ACP Kconfig - Add irq domain support to amdgpu driver - Use genirq in ACP DMA driver - Export some genpd symbols to support ACP powergating (Acked by PM maintainer) - Use genpd for ACP powergating - add separate capture and playback instances of dws in ACP init - add runtime suspend support for dws in master mode v6 changes: - Squash ACP DMA and abstraction layer patches into one - Drop dependent patches from other trees - Fix ACP DMA irq none case - ACP DMA coding style cleanups - Add timeouts to wait loops - Clarify ACP powergating banks handling v7 changes: - Send out register header patch as well - Add another dwc quirk for acp - fix ternery operator usage The entire patch set can be viewed here: http://cgit.freedesktop.org/~agd5f/linux/log/?h=acp-upstream10 Thanks, Alex Alex Deucher (2): drm/amdgpu/cgs: add an interface to access PCI resources drm/amdgpu: add irq domain support Maruthi Bayyavarapu (1): drm/amd: add ACP driver support Maruthi Srinivas Bayyavarapu (6): ASoC: dwc: add quirk to override COMP_PARAM_1 register drm/amd: add pm domain for ACP IP sub blocks ASoC : AMD : add ACP 2.2 register headers ASoC: AMD: add AMD ASoC ACP 2.x DMA driver ASoC: AMD: add pm ops ASoC: AMD: Manage ACP 2.x SRAM banks power drivers/gpu/drm/Kconfig | 2 + drivers/gpu/drm/amd/acp/Kconfig | 11 + drivers/gpu/drm/amd/acp/Makefile | 8 + drivers/gpu/drm/amd/acp/acp_hw.c | 50 + drivers/gpu/drm/amd/acp/include/acp_gfx_if.h | 34 + drivers/gpu/drm/amd/amdgpu/Makefile | 13 +- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 12 + drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c | 502 ++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_acp.h | 42 + drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c | 36 + drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 108 +- drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h | 9 + drivers/gpu/drm/amd/amdgpu/cik_ih.c | 6 + drivers/gpu/drm/amd/amdgpu/cz_ih.c | 7 + drivers/gpu/drm/amd/amdgpu/iceland_ih.c | 7 + drivers/gpu/drm/amd/amdgpu/tonga_ih.c | 7 + drivers/gpu/drm/amd/amdgpu/vi.c | 12 + drivers/gpu/drm/amd/include/amd_shared.h | 1 + drivers/gpu/drm/amd/include/cgs_common.h | 34 + include/sound/designware_i2s.h | 1 + sound/soc/Kconfig | 1 + sound/soc/Makefile | 1 + sound/soc/amd/Kconfig | 4 + sound/soc/amd/Makefile | 3 + sound/soc/amd/acp-pcm-dma.c | 1042 ++++++++++++ sound/soc/amd/acp.h | 118 ++ sound/soc/amd/include/acp_2_2_d.h | 609 +++++++ sound/soc/amd/include/acp_2_2_enum.h | 1068 ++++++++++++ sound/soc/amd/include/acp_2_2_sh_mask.h | 2292 ++++++++++++++++++++++++++ sound/soc/dwc/designware_i2s.c | 4 + 30 files changed, 6035 insertions(+), 9 deletions(-) create mode 100644 drivers/gpu/drm/amd/acp/Kconfig create mode 100644 drivers/gpu/drm/amd/acp/Makefile create mode 100644 drivers/gpu/drm/amd/acp/acp_hw.c create mode 100644 drivers/gpu/drm/amd/acp/include/acp_gfx_if.h create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.h create mode 100644 sound/soc/amd/Kconfig create mode 100644 sound/soc/amd/Makefile create mode 100644 sound/soc/amd/acp-pcm-dma.c create mode 100644 sound/soc/amd/acp.h create mode 100644 sound/soc/amd/include/acp_2_2_d.h create mode 100644 sound/soc/amd/include/acp_2_2_enum.h create mode 100644 sound/soc/amd/include/acp_2_2_sh_mask.h -- 2.5.0

2 13

[alsa-devel] [PATCH 00/15] ASoC: hdac_hdmi: Add DP & notification support
by Subhransu S. Prusty 08 Jan '16

08 Jan '16

This patch series adds DP audio and hotplug notification support. On Skylake two DP ports are available and to enable DP on both ports all pins need to be enabled. There is a special vendor widget which need to be programmed to enable all pins and converters. This series adds hotplug notification, read/set constraint based on ELD, enable all pin/cvts, DP1.2, programs the audio infoframe for DP. There is a one to one mapping between converter and stream, so the dais are created based on the no of streams supported on hdmi codec. Even though cvts can be mapped dynamically to the streams, currently it is statically mapped as simultaneous playback on both DP and HDMI is not supported as of now. Pin muxes and controls are created dynamically to map converter to pin widget. So at run time specific pin is mapped to the dai based on the control selected (based on the display type DP/HDMI connected). Finally the DP audio infoframe programming is added to support the DP feature. Also with hotplug notification support, ELD is read and capabilities are set for rate, formats and channels. drm_eld sound/core framework is updated to limit the formats based on ELD. There are few fixes one fixing the static checker warning and other one not to fail if no connection list is found for a pin widget. Pls note, the 12th patch is adding a small macro for getting connection type in drm header, we have CCed drm folks on that and this one. Pls ack so that we can have this series merged thru sound trees Jeeja KP (1): ASoC: hdac_hdmi: Add codec suspend/resume handler Ramesh Babu (1): ASoC: hdac_hdmi: Keep display active while enumerating codec Subhransu S. Prusty (13): ASoC: hdac_hdmi: Fix to check num nodes correctly ASoC: hdac_hdmi: Fix to warn instead of err for no connected nids ASoC: hdac_hdmi - Use list to add pins and converters ALSA: hda - Add helper to read eld data ASoC: hdac_hdmi: Add hotplug notification and read eld ALSA: pcm: Add DRM helper to set constraint for format ASoC: hdac_hdmi: Apply constraints based on ELD ASoC: hdac_hdmi: Enable DP1.2 and all converters/pins ASoC: hdac_hdmi - create dais based on number of streams ASoC: hdac_hdmi: Create widget/route based on nodes enumerated ASoC: hdac_hdmi: Assign pin for stream based on dapm connection drm/edid: Add API to help find connection type ASoC: hdac_hdmi: Add infoframe support for dp audio include/drm/drm_edid.h | 10 + include/sound/hdaudio.h | 3 + sound/core/pcm_drm_eld.c | 42 +- sound/hda/Makefile | 2 +- sound/hda/hdac_eld.c | 95 +++++ sound/soc/codecs/Kconfig | 1 + sound/soc/codecs/hdac_hdmi.c | 908 ++++++++++++++++++++++++++++++++++++------- 7 files changed, 908 insertions(+), 153 deletions(-) create mode 100644 sound/hda/hdac_eld.c -- 1.9.1

6 47

[alsa-devel] [PATCH] ASoC: wm8960: add DAC mono mix kcontrol
by Zidan Wang 08 Jan '16

08 Jan '16

In normal operation, the left and right channel digital audio data is converted to analogue in two separate DACs. There is a mono-mix mode where the two audio channels are mixed together digitally and then converted to analogue using only one DAC, while the other DAC is switched off. The mono-mix signal can be selected to appear on both analogue output channels. The mono mix is automatically attenuated by 6dB to prevent clipping. Signed-off-by: Zidan Wang <zidan.wang(a)freescale.com> --- sound/soc/codecs/wm8960.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/sound/soc/codecs/wm8960.c b/sound/soc/codecs/wm8960.c index 162def8..029031b 100644 --- a/sound/soc/codecs/wm8960.c +++ b/sound/soc/codecs/wm8960.c @@ -153,6 +153,7 @@ static const char *wm8960_adc_data_output_sel[] = { "Left Data = Right ADC; Right Data = Right ADC", "Left Data = Right ADC; Right Data = Left ADC", }; +static const char *wm8960_dmonomix[] = {"Stereo", "Mono"}; static const struct soc_enum wm8960_enum[] = { SOC_ENUM_SINGLE(WM8960_DACCTL1, 5, 4, wm8960_polarity), @@ -162,6 +163,7 @@ static const struct soc_enum wm8960_enum[] = { SOC_ENUM_SINGLE(WM8960_ALC1, 7, 4, wm8960_alcfunc), SOC_ENUM_SINGLE(WM8960_ALC3, 8, 2, wm8960_alcmode), SOC_ENUM_SINGLE(WM8960_ADDCTL1, 2, 4, wm8960_adc_data_output_sel), + SOC_ENUM_SINGLE(WM8960_ADDCTL1, 4, 2, wm8960_dmonomix), }; static const int deemph_settings[] = { 0, 32000, 44100, 48000 }; @@ -304,6 +306,7 @@ SOC_SINGLE_TLV("Right Output Mixer RINPUT3 Volume", WM8960_ROUTMIX, 4, 7, 1, bypass_tlv), SOC_ENUM("ADC Data Output Select", wm8960_enum[6]), +SOC_ENUM("DAC Mono Mix", wm8960_enum[7]), }; static const struct snd_kcontrol_new wm8960_lin_boost[] = { -- 1.9.1

3 5

[alsa-devel] [PATCH v3 00/15] ASoC: hdac_hdmi: Add DP & notification support
by Subhransu S. Prusty 08 Jan '16

08 Jan '16

This patch series adds DP audio and hotplug notification support. On Skylake two DP ports are available and to enable DP on both ports all pins need to be enabled. There is a special vendor widget which need to be programmed to enable all pins and converters. This series adds hotplug notification, read/set constraint based on ELD, enable all pin/cvts, DP1.2, programs the audio infoframe for DP. There is a one to one mapping between converter and stream, so the dais are created based on the no of streams supported on hdmi codec. Even though cvts can be mapped dynamically to the streams, currently it is statically mapped as simultaneous playback on both DP and HDMI is not supported as of now. Pin muxes and controls are created dynamically to map converter to pin widget. So at run time specific pin is mapped to the dai based on the control selected (based on the display type DP/HDMI connected). Finally the DP audio infoframe programming is added to support the DP feature. Also with hotplug notification support, ELD is read and capabilities are set for rate, formats and channels. drm_eld sound/core framework is updated to limit the formats based on ELD. There are few fixes one fixing the static checker warning and other one not to fail if no connection list is found for a pin widget. Pls note, the 10th patch is adding a small macro for getting connection type in drm header, we have CCed drm folks on that and this one. Pls ack so that we can have this series merged thru sound trees changes in v3: - Addressed review comments - Use of list_for_each_entry_safe for node deletion. - Moved the format constraint based on ELD to driver - Fix constant as per kernel doc for connection type in drm helper - Fix dp infoframe - Add hotplug event reporting to user space - Move device configuration from dai startup to hw_params as the user space can keep the device open always. Jeeja KP (2): ASoC: hdac_hdmi: Add codec suspend/resume handler ASoC: hdac_hdmi: Fix to enable device configuration in hw_params Ramesh Babu (1): ASoC: hdac_hdmi: Fix to keep display active while enumerating codec Subhransu S. Prusty (12): ASoC: hdac_hdmi: Fix to check num nodes correctly ASoC: hdac_hdmi: Fix to warn instead of err for no connected nids ASoC: hdac_hdmi: Use list to add pins and converters ASoC: hdac_hdmi: Add hotplug notification and read eld ASoC: hdac_hdmi: Apply constraints based on ELD ASoC: hdac_hdmi: Enable DP1.2 and all converters/pins ASoC: hdac_hdmi: create dais based on number of streams ASoC: hdac_hdmi: Create widget/route based on nodes enumerated ASoC: hdac_hdmi: Assign pin for stream based on dapm connection drm/edid: Add API to help find connection type ASoC: hdac_hdmi: Add infoframe support for dp audio ASoC: hdac_hdmi: Add jack reporting for user space include/drm/drm_edid.h | 12 + sound/soc/codecs/Kconfig | 1 + sound/soc/codecs/hdac_hdmi.c | 1101 +++++++++++++++++++++++++++++++++++------- 3 files changed, 936 insertions(+), 178 deletions(-) -- 1.9.1

5 39

[alsa-devel] [PATCH v2] ASoC: compress: Fix compress device direction check
by Vinod Koul 08 Jan '16

08 Jan '16

The detection of direction for compress was only taking into account codec capabilities and not CPU ones. Fix this by checking the CPU side capabilities as well Cc: <stable(a)vger.kernel.org> Tested-by: Ashish Panwar <ashish.panwar(a)intel.com> Signed-off-by: Vinod Koul <vinod.koul(a)intel.com> --- v2: fix xor check sound/soc/soc-compress.c | 23 ++++++++++++++++++++--- 1 file changed, 20 insertions(+), 3 deletions(-) diff --git a/sound/soc/soc-compress.c b/sound/soc/soc-compress.c index 12a9820feac1..bb82bb966000 100644 --- a/sound/soc/soc-compress.c +++ b/sound/soc/soc-compress.c @@ -630,6 +630,7 @@ int snd_soc_new_compress(struct snd_soc_pcm_runtime *rtd, int num) struct snd_pcm *be_pcm; char new_name[64]; int ret = 0, direction = 0; + int playback = 0, capture = 0; if (rtd->num_codecs > 1) { dev_err(rtd->card->dev, "Multicodec not supported for compressed stream\n"); @@ -641,11 +642,27 @@ int snd_soc_new_compress(struct snd_soc_pcm_runtime *rtd, int num) rtd->dai_link->stream_name, codec_dai->name, num); if (codec_dai->driver->playback.channels_min) + playback = 1; + if (codec_dai->driver->capture.channels_min) + capture = 1; + + capture = capture && cpu_dai->driver->capture.channels_min; + playback = playback && cpu_dai->driver->playback.channels_min; + + /* + * Compress devices are unidirectional so only one of the directions + * should be set, check for that (xor) + */ + if (playback + capture != 1) { + dev_err(rtd->card->dev, "Invalid direction for compress P %d, C %d\n", + playback, capture); + return -EINVAL; + } + + if(playback) direction = SND_COMPRESS_PLAYBACK; - else if (codec_dai->driver->capture.channels_min) - direction = SND_COMPRESS_CAPTURE; else - return -EINVAL; + direction = SND_COMPRESS_CAPTURE; compr = kzalloc(sizeof(*compr), GFP_KERNEL); if (compr == NULL) { -- 1.9.1

2 1

[alsa-devel] [PATCH] ASoC: nau8825: Modify power management and add interrupt wakeup
by John Hsu 08 Jan '16

08 Jan '16

1. Enhance codec suspend and resume sequence 2. Add interrupt wakeup function Signed-off-by: John Hsu <KCHSU0(a)nuvoton.com> --- sound/soc/codecs/nau8825.c | 86 ++++++++++++++++++++++++++++++++++++++++++---- sound/soc/codecs/nau8825.h | 2 ++ 2 files changed, 81 insertions(+), 7 deletions(-) diff --git a/sound/soc/codecs/nau8825.c b/sound/soc/codecs/nau8825.c index 504c969..9a02d05 100644 --- a/sound/soc/codecs/nau8825.c +++ b/sound/soc/codecs/nau8825.c @@ -543,6 +543,45 @@ int nau8825_enable_jack_detect(struct snd_soc_codec *codec, } EXPORT_SYMBOL_GPL(nau8825_enable_jack_detect); +/** + * nau8825_init_wakeup - set wakeup capability for codec + * + * @codec: codec device component + * + * After this function done, codec can support system wakeup by button. + */ +int nau8825_init_wakeup(struct snd_soc_codec *codec) +{ + struct nau8825 *nau8825 = snd_soc_codec_get_drvdata(codec); + + device_init_wakeup(nau8825->dev, true); + + return 0; +} +EXPORT_SYMBOL_GPL(nau8825_init_wakeup); + +/** + * nau8825_irq_wakeup - set interrupt can wakeup or not + * + * @codec: codec device component + * @on: switch interrupt wakeup on/off + * + * This function can enable or disable interrupt wakeup. + */ +int nau8825_irq_wakeup(struct snd_soc_codec *codec, int on) +{ + struct nau8825 *nau8825 = snd_soc_codec_get_drvdata(codec); + + if (device_may_wakeup(nau8825->dev)) { + if (on) + enable_irq_wake(nau8825->irq); + else + disable_irq_wake(nau8825->irq); + } + + return 0; +} +EXPORT_SYMBOL_GPL(nau8825_irq_wakeup); static bool nau8825_is_jack_inserted(struct regmap *regmap) { @@ -676,7 +715,10 @@ static irqreturn_t nau8825_interrupt(int irq, void *data) struct regmap *regmap = nau8825->regmap; int active_irq, clear_irq = 0, event = 0, event_mask = 0; - regmap_read(regmap, NAU8825_REG_IRQ_STATUS, &active_irq); + if (regmap_read(regmap, NAU8825_REG_IRQ_STATUS, &active_irq)) { + dev_err(nau8825->dev, "failed to clear interrupt\n"); + return IRQ_NONE; + } if ((active_irq & NAU8825_JACK_EJECTION_IRQ_MASK) == NAU8825_JACK_EJECTION_DETECTED) { @@ -1092,6 +1134,36 @@ static int nau8825_set_sysclk(struct snd_soc_codec *codec, int clk_id, return nau8825_configure_sysclk(nau8825, clk_id, freq); } +static int nau8825_resume_setup(struct nau8825 *nau8825) +{ + struct regmap *regmap = nau8825->regmap; + + /* IRQ Output Enable */ + regmap_update_bits(regmap, NAU8825_REG_INTERRUPT_MASK, + NAU8825_IRQ_OUTPUT_EN, NAU8825_IRQ_OUTPUT_EN); + + /* Enable internal VCO needed for interruptions */ + nau8825_configure_sysclk(nau8825, NAU8825_CLK_INTERNAL, 0); + + /* Enable DDACR needed for interrupts */ + regmap_update_bits(regmap, NAU8825_REG_ENA_CTRL, + NAU8825_ENABLE_DACR, NAU8825_ENABLE_DACR); + + /* Chip needs one FSCLK cycle in order to generate interrupts, + * as we cannot guarantee one will be provided by the system. Turning + * master mode on then off enables us to generate that FSCLK cycle + * with a minimum of contention on the clock bus. + */ + regmap_update_bits(regmap, NAU8825_REG_I2S_PCM_CTRL2, + NAU8825_I2S_MS_MASK, NAU8825_I2S_MS_MASTER); + regmap_update_bits(regmap, NAU8825_REG_I2S_PCM_CTRL2, + NAU8825_I2S_MS_MASK, NAU8825_I2S_MS_SLAVE); + + nau8825_restart_jack_detection(regmap); + + return 0; +} + static int nau8825_set_bias_level(struct snd_soc_codec *codec, enum snd_soc_bias_level level) { @@ -1121,6 +1193,8 @@ static int nau8825_set_bias_level(struct snd_soc_codec *codec, "Failed to sync cache: %d\n", ret); return ret; } + if (nau8825->irq) + nau8825_resume_setup(nau8825); } break; @@ -1330,24 +1404,22 @@ static int nau8825_i2c_remove(struct i2c_client *client) #ifdef CONFIG_PM_SLEEP static int nau8825_suspend(struct device *dev) { - struct i2c_client *client = to_i2c_client(dev); struct nau8825 *nau8825 = dev_get_drvdata(dev); + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(nau8825->dapm); - disable_irq(client->irq); + disable_irq(nau8825->irq); + snd_soc_codec_force_bias_level(codec, SND_SOC_BIAS_OFF); regcache_cache_only(nau8825->regmap, true); - regcache_mark_dirty(nau8825->regmap); return 0; } static int nau8825_resume(struct device *dev) { - struct i2c_client *client = to_i2c_client(dev); struct nau8825 *nau8825 = dev_get_drvdata(dev); regcache_cache_only(nau8825->regmap, false); - regcache_sync(nau8825->regmap); - enable_irq(client->irq); + enable_irq(nau8825->irq); return 0; } diff --git a/sound/soc/codecs/nau8825.h b/sound/soc/codecs/nau8825.h index 8237693..00e7661 100644 --- a/sound/soc/codecs/nau8825.h +++ b/sound/soc/codecs/nau8825.h @@ -347,6 +347,8 @@ struct nau8825 { int nau8825_enable_jack_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack); +int nau8825_init_wakeup(struct snd_soc_codec *codec); +int nau8825_irq_wakeup(struct snd_soc_codec *codec, int on); #endif /* __NAU8825_H__ */ -- 2.6.4

2 1

[alsa-devel] [PATCH 0/4] ALSA: hda - hdmi jack support for dynamic pcm assignment
by libin.yang＠linux.intel.com 08 Jan '16

08 Jan '16

From: Libin Yang <libin.yang(a)linux.intel.com> The patchset adds hdmi jack support for dynamic pcm assignment Libin Yang (4): ALSA: Add documentation about HD-audio DP MST ALSA: hda - add hdmi_pcm to manage hdmi pcm related features ALSA: hda - hdmi jack created based on pcm ALSA: hda - hdmi monitor hotplug support for dynamic pcm assignment Documentation/sound/alsa/HD-Audio-DP-MST-audio.txt | 75 +++++++ sound/pci/hda/patch_hdmi.c | 229 +++++++++++++++------ 2 files changed, 243 insertions(+), 61 deletions(-) create mode 100644 Documentation/sound/alsa/HD-Audio-DP-MST-audio.txt -- 1.9.1

3 20

Re: [alsa-devel] PCM3168 alsa driver for beaglebone black (Pablo Fonovich)
by Pablo Fonovich 07 Jan '16

07 Jan '16

Hi: Now my driver is working (just) a bit better, but is still not functional... when i try to play something it says: davinci_evm sound: ASoC: machine hw_params failed: -524 aplay: set_params:1297: Unable to install hw params: ACCESS: RW_INTERLEAVED FORMAT: S16_LE SUBFORMAT: STD SAMPLE_BITS: 16 FRAME_BITS: 32 CHANNELS: 2 RATE: 44100 PERIOD_TIME: (125011 125012) PERIOD_SIZE: 5513 PERIOD_BYTES: 22052 PERIODS: 4 BUFFER_TIME: (500045 500046) BUFFER_SIZE: 22052 BUFFER_BYTES: 88208 TICK_TIME: 0 Some hints or docummentation of this? remember i'm a noob Thanks > Message: 2 > Date: Tue, 5 Jan 2016 21:35:12 -0300 > From: Pablo Fonovich <pablo_f_7(a)hotmail.com> > To: "alsa-devel(a)alsa-project.org" <alsa-devel(a)alsa-project.org> > Subject: [alsa-devel] PCM3168 alsa driver for beaglebone black > Message-ID: <BAY169-W8142231FA115FDA205200FEEF40(a)phx.gbl> > Content-Type: text/plain; charset="iso-8859-1" > > Hi: > I'm working in a project of making an audio cape for beaglebone black with pcm3168 codec... so far i've written the driver i've attached based on pcm1681.c available in linux kernel. > Im a noob in this subjets, so i would like to know how can now make it work in my custom system for the beaglebone. > I followed the guide in this link http://processors.wiki.ti.com/index.php/Sitara_Linux_Audio_DAC_Example, but it makes me write the ops and hw structures that i already have in my pcm3168.c file, in the davinci_evm.c file. > > The drivers compiles and is detected at boot time, as it says in the guide. But when i type aplay command to play some wav, the message "ALSA lib pcm.c:2267:(snd_pcm_open_noupdate) Unknown PCM default > aplay: main:722: audio open error: No such file or directory" appears, so i'm missing something... > > I don't knwo if this post belongs to this list, but any help would be great... > If some docummentation about writing a driver for an embedded system is available, please tell me... > Also, if someone can suggest me some guidelines of work i would be grateful, cause i just can't get organized with the information i found > > Thanks very Much... > > Pablo > > >

1 0

[alsa-devel] [PATCH] ASoC: compress: Fix compress device direction check
by Vinod Koul 07 Jan '16

07 Jan '16

The detection of direction for compress takes into account codec capabilities only and not the CPU ones. Fix this by checking the CPU side capabilities as well. Cc: <stable(a)vger.kernel.org> Tested-by: Ashish Panwar <ashish.panwar(a)intel.com> Signed-off-by: Vinod Koul <vinod.koul(a)intel.com> --- sound/soc/soc-compress.c | 23 ++++++++++++++++++++--- 1 file changed, 20 insertions(+), 3 deletions(-) diff --git a/sound/soc/soc-compress.c b/sound/soc/soc-compress.c index 12a9820feac1..b5737945bcc3 100644 --- a/sound/soc/soc-compress.c +++ b/sound/soc/soc-compress.c @@ -630,6 +630,7 @@ int snd_soc_new_compress(struct snd_soc_pcm_runtime *rtd, int num) struct snd_pcm *be_pcm; char new_name[64]; int ret = 0, direction = 0; + int playback = 0, capture = 0; if (rtd->num_codecs > 1) { dev_err(rtd->card->dev, "Multicodec not supported for compressed stream\n"); @@ -641,11 +642,27 @@ int snd_soc_new_compress(struct snd_soc_pcm_runtime *rtd, int num) rtd->dai_link->stream_name, codec_dai->name, num); if (codec_dai->driver->playback.channels_min) + playback = 1; + if (codec_dai->driver->capture.channels_min) + capture = 1; + + capture = capture && cpu_dai->driver->capture.channels_min; + playback = playback && cpu_dai->driver->playback.channels_min; + + /* + * Compress devices are unidirectional so only one of the directions + * should be set, check for that (xor) + */ + if (!(playback || capture)) { + dev_err(rtd->card->dev, "Invalid direction for compress P %d, C %d\n", + playback, capture); + return -EINVAL; + } + + if (playback) direction = SND_COMPRESS_PLAYBACK; - else if (codec_dai->driver->capture.channels_min) - direction = SND_COMPRESS_CAPTURE; else - return -EINVAL; + direction = SND_COMPRESS_CAPTURE; compr = kzalloc(sizeof(*compr), GFP_KERNEL); if (compr == NULL) { -- 1.9.1

2 2

[alsa-devel] [PATCH 1/6] [ALSA] portman2x4 - fix trailing whitespace
by Sudip Mukherjee 07 Jan '16

07 Jan '16

Trailing whitespace is not encouraged by Kernel coding style. Signed-off-by: Sudip Mukherjee <sudip(a)vectorindia.org> --- sound/drivers/portman2x4.c | 50 +++++++++++++++++++++++----------------------- 1 file changed, 25 insertions(+), 25 deletions(-) diff --git a/sound/drivers/portman2x4.c b/sound/drivers/portman2x4.c index 464385a..ba0860d 100644 --- a/sound/drivers/portman2x4.c +++ b/sound/drivers/portman2x4.c @@ -57,7 +57,7 @@ static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; -static struct platform_device *platform_devices[SNDRV_CARDS]; +static struct platform_device *platform_devices[SNDRV_CARDS]; static int device_count; module_param_array(index, int, NULL, S_IRUGO); @@ -105,7 +105,7 @@ static int portman_create(struct snd_card *card, *rchip = NULL; pm = kzalloc(sizeof(struct portman), GFP_KERNEL); - if (pm == NULL) + if (pm == NULL) return -ENOMEM; /* Init chip specific data */ @@ -140,7 +140,7 @@ static int portman_create(struct snd_card *card, #define INT_EN PP_CMD_IEN /* Interrupt enable. */ #define STROBE PP_CMD_STB /* Command strobe. */ -/* The parallel port command register field (b1..b3) selects the +/* The parallel port command register field (b1..b3) selects the * various "registers" within the PC/P 2x4. These are the internal * address of these "registers" that must be written to the parallel * port command register. @@ -218,7 +218,7 @@ static inline void portman_write_data(struct portman *pm, u8 value) parport_write_data(pm->pardev->port, value); } -static void portman_write_midi(struct portman *pm, +static void portman_write_midi(struct portman *pm, int port, u8 mididata) { int command = ((port + 4) << 1); @@ -234,20 +234,20 @@ static void portman_write_midi(struct portman *pm, */ command |= INT_EN; - /* Disable interrupts so that the process is not interrupted, then - * write the address associated with the current Tx channel to the + /* Disable interrupts so that the process is not interrupted, then + * write the address associated with the current Tx channel to the * PP Command Reg. Do not set the Strobe signal yet. */ do { portman_write_command(pm, command); - /* While the address lines settle, write parallel output data to + /* While the address lines settle, write parallel output data to * PP Data Reg. This has no effect until Strobe signal is asserted. */ portman_write_data(pm, mididata); - + /* If PCP channel's TxEmpty is set (TxEmpty is read through the PP * Status Register), then go write data. Else go back and wait. */ @@ -370,7 +370,7 @@ static int portman_read_midi(struct portman *pm, int port) /* * Checks if any input data on the given channel is available - * Checks RxAvail + * Checks RxAvail */ static int portman_data_avail(struct portman *pm, int channel) { @@ -456,7 +456,7 @@ static int portman_probe(struct parport *p) * hardware handshake lines to midi box: * * Strobe = 0 - * Interrupt Enable = 0 + * Interrupt Enable = 0 */ /* 2 */ parport_write_control(p, 0); @@ -481,7 +481,7 @@ static int portman_probe(struct parport *p) /* 7 */ parport_write_control(p, 0); /* Reset Strobe=0. */ - /* Check if Tx circuitry is functioning properly. If initialized + /* Check if Tx circuitry is functioning properly. If initialized * unit TxEmpty is false, send out char and see if if goes true. */ /* 8 */ @@ -567,12 +567,12 @@ static int snd_portman_rawmidi_create(struct snd_card *card) struct snd_rawmidi *rmidi; struct snd_rawmidi_substream *substream; int err; - - err = snd_rawmidi_new(card, CARD_NAME, 0, - PORTMAN_NUM_OUTPUT_PORTS, - PORTMAN_NUM_INPUT_PORTS, + + err = snd_rawmidi_new(card, CARD_NAME, 0, + PORTMAN_NUM_OUTPUT_PORTS, + PORTMAN_NUM_INPUT_PORTS, &rmidi); - if (err < 0) + if (err < 0) return err; rmidi->private_data = pm; @@ -584,9 +584,9 @@ static int snd_portman_rawmidi_create(struct snd_card *card) pm->rmidi = rmidi; /* register rawmidi ops */ - snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, + snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, &snd_portman_midi_output); - snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT, + snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT, &snd_portman_midi_input); /* name substreams */ @@ -621,7 +621,7 @@ static void snd_portman_interrupt(void *userdata) /* While any input data is waiting */ while ((portman_read_status(pm) & INT_REQ) == INT_REQ) { - /* If data available on channel 0, + /* If data available on channel 0, read it and stuff it into the queue. */ if (portman_data_avail(pm, 0)) { /* Read Midi */ @@ -632,7 +632,7 @@ static void snd_portman_interrupt(void *userdata) &midivalue, 1); } - /* If data available on channel 1, + /* If data available on channel 1, read it and stuff it into the queue. */ if (portman_data_avail(pm, 1)) { /* Read Midi */ @@ -658,7 +658,7 @@ static int snd_portman_probe_port(struct parport *p) 0, NULL); if (!pardev) return -EIO; - + if (parport_claim(pardev)) { parport_unregister_device(pardev); return -EIO; @@ -742,7 +742,7 @@ static int snd_portman_probe(struct platform_device *pdev) if (dev >= SNDRV_CARDS) return -ENODEV; - if (!enable[dev]) + if (!enable[dev]) return -ENOENT; if ((err = snd_portman_probe_port(p)) < 0) @@ -756,7 +756,7 @@ static int snd_portman_probe(struct platform_device *pdev) } strcpy(card->driver, DRIVER_NAME); strcpy(card->shortname, CARD_NAME); - sprintf(card->longname, "%s at 0x%lx, irq %i", + sprintf(card->longname, "%s at 0x%lx, irq %i", card->shortname, p->base, p->irq); pardev = parport_register_device(p, /* port */ @@ -779,7 +779,7 @@ static int snd_portman_probe(struct platform_device *pdev) } card->private_data = pm; card->private_free = snd_portman_card_private_free; - + if ((err = snd_portman_rawmidi_create(card)) < 0) { snd_printd("Creating Rawmidi component failed\n"); goto __err; @@ -844,7 +844,7 @@ static void snd_portman_unregister_all(void) platform_device_unregister(platform_devices[i]); platform_devices[i] = NULL; } - } + } platform_driver_unregister(&snd_portman_driver); parport_unregister_driver(&portman_parport_driver); } -- 1.9.1

2 11

[alsa-devel] [PATCH 1/5] ALSA: mts64: fix trailing whitespace
by Sudip Mukherjee 07 Jan '16

07 Jan '16

Trailing whitespace is not encouraged by Kernel coding style. Signed-off-by: Sudip Mukherjee <sudip(a)vectorindia.org> --- sound/drivers/mts64.c | 100 +++++++++++++++++++++++++------------------------- 1 file changed, 50 insertions(+), 50 deletions(-) diff --git a/sound/drivers/mts64.c b/sound/drivers/mts64.c index 2a008a9..0f91e8e 100644 --- a/sound/drivers/mts64.c +++ b/sound/drivers/mts64.c @@ -1,14 +1,14 @@ -/* +/* * ALSA Driver for Ego Systems Inc. (ESI) Miditerminal 4140 * Copyright (c) 2006 by Matthias König <mk(a)phasorlab.de> * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * @@ -38,7 +38,7 @@ static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; -static struct platform_device *platform_devices[SNDRV_CARDS]; +static struct platform_device *platform_devices[SNDRV_CARDS]; static int device_count; module_param_array(index, int, NULL, S_IRUGO); @@ -92,7 +92,7 @@ static int snd_mts64_create(struct snd_card *card, *rchip = NULL; mts = kzalloc(sizeof(struct mts64), GFP_KERNEL); - if (mts == NULL) + if (mts == NULL) return -ENOMEM; /* Init chip specific data */ @@ -118,9 +118,9 @@ static int snd_mts64_create(struct snd_card *card, /* Control Bits */ #define MTS64_CTL_READOUT 0x08 /* enable readout */ -#define MTS64_CTL_WRITE_CMD 0x06 -#define MTS64_CTL_WRITE_DATA 0x02 -#define MTS64_CTL_STROBE 0x01 +#define MTS64_CTL_WRITE_CMD 0x06 +#define MTS64_CTL_WRITE_DATA 0x02 +#define MTS64_CTL_STROBE 0x01 /* Command */ #define MTS64_CMD_RESET 0xfe @@ -130,7 +130,7 @@ static int snd_mts64_create(struct snd_card *card, #define MTS64_CMD_SMPTE_STOP 0xef #define MTS64_CMD_SMPTE_FPS_24 0xe3 #define MTS64_CMD_SMPTE_FPS_25 0xe2 -#define MTS64_CMD_SMPTE_FPS_2997 0xe4 +#define MTS64_CMD_SMPTE_FPS_2997 0xe4 #define MTS64_CMD_SMPTE_FPS_30D 0xe1 #define MTS64_CMD_SMPTE_FPS_30 0xe0 #define MTS64_CMD_COM_OPEN 0xf8 /* setting the communication mode */ @@ -171,10 +171,10 @@ static void mts64_enable_readout(struct parport *p) c = parport_read_control(p); c |= MTS64_CTL_READOUT; - parport_write_control(p, c); + parport_write_control(p, c); } -/* Disables readout +/* Disables readout * * Readout is disabled by clearing bit 3 of control */ @@ -201,9 +201,9 @@ static int mts64_device_ready(struct parport *p) for (i = 0; i < 0xffff; ++i) { c = parport_read_status(p); c &= MTS64_STAT_BSY; - if (c != 0) + if (c != 0) return 1; - } + } return 0; } @@ -234,7 +234,7 @@ static int mts64_device_init(struct parport *p) return -EIO; } -/* +/* * Opens the device (set communication mode) */ static int mts64_device_open(struct mts64 *mts) @@ -248,7 +248,7 @@ static int mts64_device_open(struct mts64 *mts) return 0; } -/* +/* * Close device (clear communication mode) */ static int mts64_device_close(struct mts64 *mts) @@ -265,14 +265,14 @@ static int mts64_device_close(struct mts64 *mts) } /* map hardware port to substream number - * + * * When reading a byte from the device, the device tells us * on what port the byte is. This HW port has to be mapped to * the midiport (substream number). * substream 0-3 are Midiports 1-4 * substream 4 is SMPTE Timecode * The mapping is done by the table: - * HW | 0 | 1 | 2 | 3 | 4 + * HW | 0 | 1 | 2 | 3 | 4 * SW | 0 | 1 | 4 | 2 | 3 */ static u8 mts64_map_midi_input(u8 c) @@ -285,7 +285,7 @@ static u8 mts64_map_midi_input(u8 c) /* Probe parport for device * - * Do we have a Miditerminal 4140 on parport? + * Do we have a Miditerminal 4140 on parport? * Returns: * 0 device found * -ENODEV no device @@ -298,13 +298,13 @@ static int mts64_probe(struct parport *p) mts64_write_command(p, MTS64_CMD_PROBE); msleep(50); - + c = mts64_read(p); c &= 0x00ff; - if (c != MTS64_CMD_PROBE) + if (c != MTS64_CMD_PROBE) return -ENODEV; - else + else return 0; } @@ -330,7 +330,7 @@ static u16 mts64_read(struct parport *p) /* Read a byte from device * * Note, that readout mode has to be enabled. - * readout procedure is as follows: + * readout procedure is as follows: * - Write number of the Bit to read to DATA * - Read STATUS * - Bit 5 of STATUS indicates if Bit is set @@ -348,10 +348,10 @@ static u8 mts64_read_char(struct parport *p) parport_write_data(p, i); c >>= 1; status = parport_read_status(p); - if (status & MTS64_STAT_BIT_SET) + if (status & MTS64_STAT_BIT_SET) c |= 0x80; } - + return c; } @@ -369,9 +369,9 @@ static void mts64_smpte_start(struct parport *p, u8 seconds, u8 frames, u8 idx) { - static u8 fps[5] = { MTS64_CMD_SMPTE_FPS_24, + static u8 fps[5] = { MTS64_CMD_SMPTE_FPS_24, MTS64_CMD_SMPTE_FPS_25, - MTS64_CMD_SMPTE_FPS_2997, + MTS64_CMD_SMPTE_FPS_2997, MTS64_CMD_SMPTE_FPS_30D, MTS64_CMD_SMPTE_FPS_30 }; @@ -405,7 +405,7 @@ static void mts64_write_command(struct parport *p, u8 c) parport_write_control(p, MTS64_CTL_WRITE_CMD); } -/* Write a data byte to device +/* Write a data byte to device */ static void mts64_write_data(struct parport *p, u8 c) { @@ -669,7 +669,7 @@ static int snd_mts64_ctl_create(struct snd_card *card, for (i = 0; control[i]; ++i) { err = snd_ctl_add(card, snd_ctl_new1(control[i], mts)); if (err < 0) { - snd_printd("Cannot create control: %s\n", + snd_printd("Cannot create control: %s\n", control[i]->name); return err; } @@ -688,8 +688,8 @@ static int snd_mts64_rawmidi_open(struct snd_rawmidi_substream *substream) struct mts64 *mts = substream->rmidi->private_data; if (mts->open_count == 0) { - /* We don't need a spinlock here, because this is just called - if the device has not been opened before. + /* We don't need a spinlock here, because this is just called + if the device has not been opened before. So there aren't any IRQs from the device */ mts64_device_open(mts); @@ -747,7 +747,7 @@ static void snd_mts64_rawmidi_input_trigger(struct snd_rawmidi_substream *substr mts->mode[substream->number] |= MTS64_MODE_INPUT_TRIGGERED; else mts->mode[substream->number] &= ~MTS64_MODE_INPUT_TRIGGERED; - + spin_unlock_irqrestore(&mts->lock, flags); } @@ -771,12 +771,12 @@ static int snd_mts64_rawmidi_create(struct snd_card *card) struct snd_rawmidi_substream *substream; struct list_head *list; int err; - - err = snd_rawmidi_new(card, CARD_NAME, 0, - MTS64_NUM_OUTPUT_PORTS, - MTS64_NUM_INPUT_PORTS, + + err = snd_rawmidi_new(card, CARD_NAME, 0, + MTS64_NUM_OUTPUT_PORTS, + MTS64_NUM_INPUT_PORTS, &rmidi); - if (err < 0) + if (err < 0) return err; rmidi->private_data = mts; @@ -788,21 +788,21 @@ static int snd_mts64_rawmidi_create(struct snd_card *card) mts->rmidi = rmidi; /* register rawmidi ops */ - snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, + snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, &snd_mts64_rawmidi_output_ops); - snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT, + snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT, &snd_mts64_rawmidi_input_ops); /* name substreams */ /* output */ - list_for_each(list, + list_for_each(list, &rmidi->streams[SNDRV_RAWMIDI_STREAM_OUTPUT].substreams) { substream = list_entry(list, struct snd_rawmidi_substream, list); sprintf(substream->name, "Miditerminal %d", substream->number+1); } /* input */ - list_for_each(list, + list_for_each(list, &rmidi->streams[SNDRV_RAWMIDI_STREAM_INPUT].substreams) { substream = list_entry(list, struct snd_rawmidi_substream, list); mts->midi_input_substream[substream->number] = substream; @@ -840,7 +840,7 @@ static void snd_mts64_interrupt(void *private) if (status & MTS64_STAT_PORT) { mts->current_midi_input_port = mts64_map_midi_input(data); } else { - if (mts->current_midi_input_port == -1) + if (mts->current_midi_input_port == -1) goto __out; substream = mts->midi_input_substream[mts->current_midi_input_port]; if (mts->mode[substream->number] & MTS64_MODE_INPUT_TRIGGERED) @@ -860,7 +860,7 @@ static int snd_mts64_probe_port(struct parport *p) 0, NULL); if (!pardev) return -EIO; - + if (parport_claim(pardev)) { parport_unregister_device(pardev); return -EIO; @@ -944,7 +944,7 @@ static int snd_mts64_probe(struct platform_device *pdev) if (dev >= SNDRV_CARDS) return -ENODEV; - if (!enable[dev]) + if (!enable[dev]) return -ENOENT; if ((err = snd_mts64_probe_port(p)) < 0) return err; @@ -957,7 +957,7 @@ static int snd_mts64_probe(struct platform_device *pdev) } strcpy(card->driver, DRIVER_NAME); strcpy(card->shortname, "ESI " CARD_NAME); - sprintf(card->longname, "%s at 0x%lx, irq %i", + sprintf(card->longname, "%s at 0x%lx, irq %i", card->shortname, p->base, p->irq); pardev = parport_register_device(p, /* port */ @@ -980,7 +980,7 @@ static int snd_mts64_probe(struct platform_device *pdev) } card->private_data = mts; card->private_free = snd_mts64_card_private_free; - + if ((err = snd_mts64_rawmidi_create(card)) < 0) { snd_printd("Creating Rawmidi component failed\n"); goto __err; @@ -1045,7 +1045,7 @@ static void snd_mts64_unregister_all(void) platform_device_unregister(platform_devices[i]); platform_devices[i] = NULL; } - } + } platform_driver_unregister(&snd_mts64_driver); parport_unregister_driver(&mts64_parport_driver); } -- 1.9.1

1 4

[alsa-devel] [PATCH] ASoC: pcm: allow delayed suspending request by users
by Vinod Koul 07 Jan '16

07 Jan '16

From: Sanyog Kale <sanyog.r.kale(a)intel.com> If a device would like to use delayed suspending then PM recommendation is to set ‘power.use_autosuspend’ flag. To allow users to do so we need to change runtime calls in core to use autosuspend counterparts. For user who do not wish to use delayed suspend not setting the device's ‘power.use_autosuspend’ flag will result in non-delayed suspend even with these APIs which incidentally is also the default behaviour, so only users will be impacted who opt in for this. Signed-off-by: Sanyog Kale <sanyog.r.kale(a)intel.com> Signed-off-by: Vinod Koul <vinod.koul(a)intel.com> --- sound/soc/soc-pcm.c | 28 ++++++++++++++++++++-------- 1 file changed, 20 insertions(+), 8 deletions(-) diff --git a/sound/soc/soc-pcm.c b/sound/soc/soc-pcm.c index c86dc96e8986..efad248efd4f 100644 --- a/sound/soc/soc-pcm.c +++ b/sound/soc/soc-pcm.c @@ -599,10 +599,15 @@ platform_err: out: mutex_unlock(&rtd->pcm_mutex); - pm_runtime_put(platform->dev); - for (i = 0; i < rtd->num_codecs; i++) - pm_runtime_put(rtd->codec_dais[i]->dev); - pm_runtime_put(cpu_dai->dev); + pm_runtime_mark_last_busy(platform->dev); + pm_runtime_put_autosuspend(platform->dev); + for (i = 0; i < rtd->num_codecs; i++) { + pm_runtime_mark_last_busy(rtd->codec_dais[i]->dev); + pm_runtime_put_autosuspend(rtd->codec_dais[i]->dev); + } + + pm_runtime_mark_last_busy(cpu_dai->dev); + pm_runtime_put_autosuspend(cpu_dai->dev); for (i = 0; i < rtd->num_codecs; i++) { if (!rtd->codec_dais[i]->active) pinctrl_pm_select_sleep_state(rtd->codec_dais[i]->dev); @@ -706,10 +711,17 @@ static int soc_pcm_close(struct snd_pcm_substream *substream) mutex_unlock(&rtd->pcm_mutex); - pm_runtime_put(platform->dev); - for (i = 0; i < rtd->num_codecs; i++) - pm_runtime_put(rtd->codec_dais[i]->dev); - pm_runtime_put(cpu_dai->dev); + pm_runtime_mark_last_busy(platform->dev); + pm_runtime_put_autosuspend(platform->dev); + + for (i = 0; i < rtd->num_codecs; i++) { + pm_runtime_mark_last_busy(rtd->codec_dais[i]->dev); + pm_runtime_put_autosuspend(rtd->codec_dais[i]->dev); + } + + pm_runtime_mark_last_busy(cpu_dai->dev); + pm_runtime_put_autosuspend(cpu_dai->dev); + for (i = 0; i < rtd->num_codecs; i++) { if (!rtd->codec_dais[i]->active) pinctrl_pm_select_sleep_state(rtd->codec_dais[i]->dev); -- 1.9.1

3 3

[alsa-devel] [PATCH 00/12] dw-hdmi development
by Russell King - ARM Linux 07 Jan '16

07 Jan '16

This sub-series is a mixture of development: * Removing the incorrect pixel repetition configuration code * Preventing pixel-doubled modes from being used * Adding interlaced video support * Implementing the sink_is_hdmi/sink_has_audio flags I suggested a few months ago * Only enabling audio support if the sink indicates it has audio * Avoiding double-enabling the HDMI interface * Fixing the mis-leading name of "dw_hdmi_phy_enable_power" * Adding connector mode forcing (important if your monitor bounces RXSENSE and HPD signals while in low-power mode.) * Improving the HDMI enable/disabling on sink status For review (and testing if people feel like it). Acks/tested-bys etc welcome. It applies on top of my drm-dwhdmi-devel branch, which is waiting for David Airlie to pull (see pull request on dri-devel, 15th July.) drivers/gpu/drm/bridge/dw_hdmi.c | 275 ++++++++++++++++++++++++++++++--------- drivers/gpu/ipu-v3/ipu-dc.c | 18 ++- drivers/gpu/ipu-v3/ipu-di.c | 129 +++++++++--------- 3 files changed, 291 insertions(+), 131 deletions(-) -- FTTC broadband for 0.8mile line: currently at 10.5Mbps down 400kbps up according to speedtest.net.

10 50

[alsa-devel] [PATCH 0/4 v5] ALSA: dice: improve card registration processing
by Takashi Sakamoto 07 Jan '16

07 Jan '16

Hi, This patchset updates my previous one: [alsa-devel] [PATCH 0/5 v4] ALSA: dice: improve card registration processing http://mailman.alsa-project.org/pipermail/alsa-devel/2015-December/102504.h… Changes: * Merge patch 02 and 03 in v4. * Allocate sound card instance in sound card registration work, independently of dice instance, allocated in .probe callback and set as driver_data of device structure. * Use __be32 type for __be32 data. In this version, sound card instance is not allocated in .probe callback. In the callback, dice instance is allocated independently of the card instance. Thus, in .probe callback, this driver reserve no slot of sound card. The allocation of sound card instance is performed in a scheduled work. When processing in the work fails, the work can be re-scheduled again according to bus reset. Takashi Sakamoto (4): ALSA: dice: split subaddress check from category check ALSA: dice: postpone card registration ALSA: dice: purge transaction initialization at timeout of Dice notification ALSA: dice: expand timeout to wait for Dice notification sound/firewire/dice/dice-transaction.c | 123 +++++++++++------- sound/firewire/dice/dice.c | 227 +++++++++++++++++---------------- sound/firewire/dice/dice.h | 3 + 3 files changed, 202 insertions(+), 151 deletions(-) -- 2.5.0

2 9

[alsa-devel] [PATCH] ASoC: extend FLL function
by John Hsu 07 Jan '16

07 Jan '16

Extend FLL clock source from MCLK/BCLK/FS. Modify FLL calculation and parameter setting. Signed-off-by: John Hsu <KCHSU0(a)nuvoton.com> --- sound/soc/codecs/nau8825.c | 128 ++++++++++++++++++++++++++++++++------------- sound/soc/codecs/nau8825.h | 21 ++++++-- 2 files changed, 108 insertions(+), 41 deletions(-) diff --git a/sound/soc/codecs/nau8825.c b/sound/soc/codecs/nau8825.c index c1b87c5..504c969 100644 --- a/sound/soc/codecs/nau8825.c +++ b/sound/soc/codecs/nau8825.c @@ -31,7 +31,7 @@ #include "nau8825.h" #define NAU_FREF_MAX 13500000 -#define NAU_FVCO_MAX 100000000 +#define NAU_FVCO_MAX 124000000 #define NAU_FVCO_MIN 90000000 struct nau8825_fll { @@ -874,8 +874,8 @@ static int nau8825_codec_probe(struct snd_soc_codec *codec) static int nau8825_calc_fll_param(unsigned int fll_in, unsigned int fs, struct nau8825_fll *fll_param) { - u64 fvco; - unsigned int fref, i; + u64 fvco, fvco_max; + unsigned int fref, i, fvco_sel; /* Ensure the reference clock frequency (FREF) is <= 13.5MHz by dividing * freq_in by 1, 2, 4, or 8 using FLL pre-scalar. @@ -900,18 +900,23 @@ static int nau8825_calc_fll_param(unsigned int fll_in, unsigned int fs, fll_param->ratio = fll_ratio[i].val; /* Calculate the frequency of DCO (FDCO) given freq_out = 256 * Fs. - * FDCO must be within the 90MHz - 100MHz or the FFL cannot be + * FDCO must be within the 90MHz - 124MHz or the FFL cannot be * guaranteed across the full range of operation. * FDCO = freq_out * 2 * mclk_src_scaling */ + fvco_max = 0; + fvco_sel = ARRAY_SIZE(mclk_src_scaling); for (i = 0; i < ARRAY_SIZE(mclk_src_scaling); i++) { fvco = 256 * fs * 2 * mclk_src_scaling[i].param; - if (NAU_FVCO_MIN < fvco && fvco < NAU_FVCO_MAX) - break; + if (fvco > NAU_FVCO_MIN && fvco < NAU_FVCO_MAX && + fvco_max < fvco) { + fvco_max = fvco; + fvco_sel = i; + } } - if (i == ARRAY_SIZE(mclk_src_scaling)) + if (ARRAY_SIZE(mclk_src_scaling) == fvco_sel) return -EINVAL; - fll_param->mclk_src = mclk_src_scaling[i].val; + fll_param->mclk_src = mclk_src_scaling[fvco_sel].val; /* Calculate the FLL 10-bit integer input and the FLL 16-bit fractional * input based on FDCO, FREF and FLL ratio. @@ -926,7 +931,8 @@ static void nau8825_fll_apply(struct nau8825 *nau8825, struct nau8825_fll *fll_param) { regmap_update_bits(nau8825->regmap, NAU8825_REG_CLK_DIVIDER, - NAU8825_CLK_MCLK_SRC_MASK, fll_param->mclk_src); + NAU8825_CLK_SRC_MASK | NAU8825_CLK_MCLK_SRC_MASK, + NAU8825_CLK_SRC_MCLK | fll_param->mclk_src); regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL1, NAU8825_FLL_RATIO_MASK, fll_param->ratio); /* FLL 16-bit fractional input */ @@ -939,10 +945,25 @@ static void nau8825_fll_apply(struct nau8825 *nau8825, NAU8825_FLL_REF_DIV_MASK, fll_param->clk_ref_div); /* select divided VCO input */ regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL5, - NAU8825_FLL_FILTER_SW_MASK, 0x0000); - /* FLL sigma delta modulator enable */ - regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL6, - NAU8825_SDM_EN_MASK, NAU8825_SDM_EN); + NAU8825_FLL_CLK_SW_MASK, NAU8825_FLL_CLK_SW_REF); + /* Disable free-running mode */ + regmap_update_bits(nau8825->regmap, + NAU8825_REG_FLL6, NAU8825_DCO_EN, 0); + if (fll_param->fll_frac) { + regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL5, + NAU8825_FLL_PDB_DAC_EN | NAU8825_FLL_LOOP_FTR_EN | + NAU8825_FLL_FTR_SW_MASK, + NAU8825_FLL_PDB_DAC_EN | NAU8825_FLL_LOOP_FTR_EN | + NAU8825_FLL_FTR_SW_FILTER); + regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL6, + NAU8825_SDM_EN, NAU8825_SDM_EN); + } else { + regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL5, + NAU8825_FLL_PDB_DAC_EN | NAU8825_FLL_LOOP_FTR_EN | + NAU8825_FLL_FTR_SW_MASK, NAU8825_FLL_FTR_SW_ACCU); + regmap_update_bits(nau8825->regmap, + NAU8825_REG_FLL6, NAU8825_SDM_EN, 0); + } } /* freq_out must be 256*Fs in order to achieve the best performance */ @@ -970,6 +991,36 @@ static int nau8825_set_pll(struct snd_soc_codec *codec, int pll_id, int source, return 0; } +static int nau8825_mclk_prepare(struct nau8825 *nau8825, unsigned int freq) +{ + int ret = 0; + + /* We selected MCLK source but the clock itself managed externally */ + if (!nau8825->mclk) + return 0; + + if (!nau8825->mclk_freq) { + ret = clk_prepare_enable(nau8825->mclk); + if (ret) { + dev_err(nau8825->dev, "Unable to prepare codec mclk\n"); + return ret; + } + } + + if (nau8825->mclk_freq != freq) { + nau8825->mclk_freq = freq; + + freq = clk_round_rate(nau8825->mclk, freq); + ret = clk_set_rate(nau8825->mclk, freq); + if (ret) { + dev_err(nau8825->dev, "Unable to set mclk rate\n"); + return ret; + } + } + + return 0; +} + static int nau8825_configure_sysclk(struct nau8825 *nau8825, int clk_id, unsigned int freq) { @@ -981,29 +1032,9 @@ static int nau8825_configure_sysclk(struct nau8825 *nau8825, int clk_id, regmap_update_bits(regmap, NAU8825_REG_CLK_DIVIDER, NAU8825_CLK_SRC_MASK, NAU8825_CLK_SRC_MCLK); regmap_update_bits(regmap, NAU8825_REG_FLL6, NAU8825_DCO_EN, 0); - - /* We selected MCLK source but the clock itself managed externally */ - if (!nau8825->mclk) - break; - - if (!nau8825->mclk_freq) { - ret = clk_prepare_enable(nau8825->mclk); - if (ret) { - dev_err(nau8825->dev, "Unable to prepare codec mclk\n"); - return ret; - } - } - - if (nau8825->mclk_freq != freq) { - nau8825->mclk_freq = freq; - - freq = clk_round_rate(nau8825->mclk, freq); - ret = clk_set_rate(nau8825->mclk, freq); - if (ret) { - dev_err(nau8825->dev, "Unable to set mclk rate\n"); - return ret; - } - } + ret = nau8825_mclk_prepare(nau8825, freq); + if (ret) + return ret; break; case NAU8825_CLK_INTERNAL: @@ -1011,7 +1042,32 @@ static int nau8825_configure_sysclk(struct nau8825 *nau8825, int clk_id, NAU8825_DCO_EN); regmap_update_bits(regmap, NAU8825_REG_CLK_DIVIDER, NAU8825_CLK_SRC_MASK, NAU8825_CLK_SRC_VCO); + if (nau8825->mclk_freq) { + clk_disable_unprepare(nau8825->mclk); + nau8825->mclk_freq = 0; + } + + break; + case NAU8825_CLK_FLL_MCLK: + regmap_update_bits(regmap, NAU8825_REG_FLL3, + NAU8825_FLL_CLK_SRC_MASK, NAU8825_FLL_CLK_SRC_MCLK); + ret = nau8825_mclk_prepare(nau8825, freq); + if (ret) + return ret; + + break; + case NAU8825_CLK_FLL_BLK: + regmap_update_bits(regmap, NAU8825_REG_FLL3, + NAU8825_FLL_CLK_SRC_MASK, NAU8825_FLL_CLK_SRC_BLK); + if (nau8825->mclk_freq) { + clk_disable_unprepare(nau8825->mclk); + nau8825->mclk_freq = 0; + } + break; + case NAU8825_CLK_FLL_FS: + regmap_update_bits(regmap, NAU8825_REG_FLL3, + NAU8825_FLL_CLK_SRC_MASK, NAU8825_FLL_CLK_SRC_FS); if (nau8825->mclk_freq) { clk_disable_unprepare(nau8825->mclk); nau8825->mclk_freq = 0; diff --git a/sound/soc/codecs/nau8825.h b/sound/soc/codecs/nau8825.h index dff8edb..8237693 100644 --- a/sound/soc/codecs/nau8825.h +++ b/sound/soc/codecs/nau8825.h @@ -112,20 +112,28 @@ /* FLL3 (0x06) */ #define NAU8825_FLL_INTEGER_MASK (0x3ff << 0) +#define NAU8825_FLL_CLK_SRC_SFT 10 +#define NAU8825_FLL_CLK_SRC_MASK (0x3 << NAU8825_FLL_CLK_SRC_SFT) +#define NAU8825_FLL_CLK_SRC_MCLK (0 << NAU8825_FLL_CLK_SRC_SFT) +#define NAU8825_FLL_CLK_SRC_BLK (0x2 << NAU8825_FLL_CLK_SRC_SFT) +#define NAU8825_FLL_CLK_SRC_FS (0x3 << NAU8825_FLL_CLK_SRC_SFT) /* FLL4 (0x07) */ #define NAU8825_FLL_REF_DIV_MASK (0x3 << 10) /* FLL5 (0x08) */ -#define NAU8825_FLL_FILTER_SW_MASK (0x1 << 14) +#define NAU8825_FLL_PDB_DAC_EN (0x1 << 15) +#define NAU8825_FLL_LOOP_FTR_EN (0x1 << 14) +#define NAU8825_FLL_CLK_SW_MASK (0x1 << 13) +#define NAU8825_FLL_CLK_SW_N2 (0x1 << 13) +#define NAU8825_FLL_CLK_SW_REF (0x0 << 13) +#define NAU8825_FLL_FTR_SW_MASK (0x1 << 12) +#define NAU8825_FLL_FTR_SW_ACCU (0x1 << 12) +#define NAU8825_FLL_FTR_SW_FILTER (0x0 << 12) /* FLL6 (0x9) */ -#define NAU8825_DCO_EN_MASK (0x1 << 15) #define NAU8825_DCO_EN (0x1 << 15) -#define NAU8825_DCO_DIS (0x0 << 15) -#define NAU8825_SDM_EN_MASK (0x1 << 14) #define NAU8825_SDM_EN (0x1 << 14) -#define NAU8825_SDM_DIS (0x0 << 14) /* HSD_CTRL (0xc) */ #define NAU8825_HSD_AUTO_MODE (1 << 6) @@ -306,6 +314,9 @@ enum { NAU8825_CLK_MCLK = 0, NAU8825_CLK_INTERNAL, + NAU8825_CLK_FLL_MCLK, + NAU8825_CLK_FLL_BLK, + NAU8825_CLK_FLL_FS, }; struct nau8825 { -- 2.6.4

2 1

[alsa-devel] [PATCH v2 0/8] Baytrail followup
by Pierre-Louis Bossart 06 Jan '16

06 Jan '16

Thanks to Mark for merging most of the patches in the first batch. Resending update for patches that where not merged. No additional functionalitity, only correction in first patch to refer to correct SHA1 and copy/paste fixes in bytcr_rt5651 machine driver Acknowledgements: Keyon Jie for his MinnowBoard validation Francisco Mendez for his help with the MCLK and jack detection Jack Yu and Bard Liao for their codec support Known issues: noise on startup when using speakers Once this batch is merged, the following updates will be provided: MCLK support to fix noise issues BYT-CR fixes jack detection Jack Yu (1): ASoC: rt5640: add ASRC support Jorge Fernandez Monteagudo (1): ASoC: Intel: Atom: Add support for HP ElitePad 1000 G2 Pierre-Louis Bossart (6): ASoC: Intel: fix ACPI probe regression with Atom DPCM driver ASoC: Intel: add bytct-rt5651 machine driver ASoC: intel: boards: add card for MinnowBoard I2S access ASoC: Intel: bytcr-rt5640: enable ASRC ASoC: Intel: bytcr_rt5640: fixup DAI codec_name with HID ASoC: Intel: Atom: add support for RT5642 sound/soc/codecs/rt5640.c | 103 ++++++++++ sound/soc/codecs/rt5640.h | 17 ++ sound/soc/intel/Kconfig | 24 +++ sound/soc/intel/atom/sst/sst_acpi.c | 23 ++- sound/soc/intel/boards/Makefile | 4 + sound/soc/intel/boards/bytcr_nocodec.c | 233 +++++++++++++++++++++++ sound/soc/intel/boards/bytcr_rt5640.c | 25 ++- sound/soc/intel/boards/bytcr_rt5651.c | 332 +++++++++++++++++++++++++++++++++ sound/soc/intel/common/Makefile | 5 + 9 files changed, 760 insertions(+), 6 deletions(-) create mode 100644 sound/soc/intel/boards/bytcr_nocodec.c create mode 100644 sound/soc/intel/boards/bytcr_rt5651.c -- 1.9.1

2 15

[alsa-devel] [GIT PULL] ASoC fixes for v4.4
by Mark Brown 06 Jan '16

06 Jan '16

The following changes since commit 168309855a7d1e16db751e9c647119fe2d2dc878: Linux 4.4-rc8 (2016-01-03 15:15:37 -0800) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git tags/asoc-fix-v4.4-rc8 for you to fetch changes up to bc42f363da213b4bf7c15a2dc87b2b1a85cde867: Merge remote-tracking branch 'asoc/fix/intel' into asoc-linus (2016-01-05 23:07:33 +0000) ---------------------------------------------------------------- ASoC: Last minute fixes for v4.4 A few final fixes for v4.4, the main one being the two patches to the new Sky Lake drivers which fix a previous incorrect fix that went in during an earlier -rc. ---------------------------------------------------------------- Bard Liao (1): ASoC: rt5645: add sys clk detection Charles Keepax (1): ASoC: Use nested lock for snd_soc_dapm_mutex_lock Mark Brown (4): Merge remote-tracking branch 'asoc/fix/arizona' into asoc-linus Merge remote-tracking branch 'asoc/fix/dapm' into asoc-linus Merge remote-tracking branch 'asoc/fix/rt5645' into asoc-linus Merge remote-tracking branch 'asoc/fix/intel' into asoc-linus Nikesh Oswal (1): ASoC: arizona: Fix bclk for sample rates that are multiple of 4kHz Vinod Koul (2): ASoC: Intel: Skylake: Revert previous broken fix memory leak fix ASoC: Intel: Skylake: Fix the memory leak include/sound/soc.h | 2 +- sound/soc/codecs/arizona.c | 2 +- sound/soc/codecs/rt5645.c | 4 ++++ sound/soc/codecs/rt5645.h | 4 ++++ sound/soc/intel/skylake/skl-topology.c | 3 ++- sound/soc/intel/skylake/skl.c | 4 ++++ sound/soc/intel/skylake/skl.h | 2 ++ 7 files changed, 18 insertions(+), 3 deletions(-)

2 1

[alsa-devel] [patch] ASoC: rsnd: precedence error in rsnd_ssiu_init()
by Dan Carpenter 06 Jan '16

06 Jan '16

The bitwise OR has higher precedence than ?: so the val2 was always set to 0x2. Fixes: b4c83b171557 ('ASoC: rsnd: add Multi channel support') Signed-off-by: Dan Carpenter <dan.carpenter(a)oracle.com> diff --git a/sound/soc/sh/rcar/ssiu.c b/sound/soc/sh/rcar/ssiu.c index 3fe9e08..06d7282 100644 --- a/sound/soc/sh/rcar/ssiu.c +++ b/sound/soc/sh/rcar/ssiu.c @@ -73,7 +73,7 @@ static int rsnd_ssiu_init(struct rsnd_mod *mod, switch (multi_ssi_slaves) { case 0x0206: /* SSI0/1/2/9 */ val2 = (1 << 4) | /* SSI0129 sync */ - rsnd_rdai_is_clk_master(rdai) ? 0x2 : 0x1; + (rsnd_rdai_is_clk_master(rdai) ? 0x2 : 0x1); /* fall through */ case 0x0006: /* SSI0/1/2 */ val1 = rsnd_rdai_is_clk_master(rdai) ?

2 1

[alsa-devel] [PATCH] ASoC: wm5110: Fix PGA clear when disabling DRE
by Charles Keepax 06 Jan '16

06 Jan '16

We don't want to use a bypassed write in wm5110_clear_pga_volume, we might disable the DRE whilst the CODEC is powered down. A normal regmap_write will always go to the hardware (when not on cache_only) even if the written value matches the cache. As using a normal write will still achieve the desired behaviour of bring the cache and hardware in sync, this patch updates the function to use a normal write, which avoids issues when the CODEC is powered down. Signed-off-by: Charles Keepax <ckeepax(a)opensource.wolfsonmicro.com> --- sound/soc/codecs/wm5110.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index ee11b97..6088d30 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -360,15 +360,13 @@ static int wm5110_hp_ev(struct snd_soc_dapm_widget *w, static int wm5110_clear_pga_volume(struct arizona *arizona, int output) { - struct reg_sequence clear_pga = { - ARIZONA_OUTPUT_PATH_CONFIG_1L + output * 4, 0x80 - }; + unsigned int reg = ARIZONA_OUTPUT_PATH_CONFIG_1L + output * 4; int ret; - ret = regmap_multi_reg_write_bypassed(arizona->regmap, &clear_pga, 1); + ret = regmap_write(arizona->regmap, reg, 0x80); if (ret) dev_err(arizona->dev, "Failed to clear PGA (0x%x): %d\n", - clear_pga.reg, ret); + reg, ret); return ret; } -- 2.1.4

2 1

[alsa-devel] [PATCH v4 1/2] ASoC: wm_adsp: Add a handler for the compressed IRQ
by Charles Keepax 06 Jan '16

06 Jan '16

Here support is added for responding to DSP IRQs that are used to indicate data being available on the DSP. The idea is that we check the amount of data available upon receipt of an IRQ and on subsequent calls to the pointer callback we recheck once less than one fragment is available (to avoid excessive SPI traffic), if there is truely less than one fragment available we ack the last IRQ and wait for a new one. Signed-off-by: Charles Keepax <ckeepax(a)opensource.wolfsonmicro.com> --- Changes since v3: - Rename wm_adsp_buffer_ack_irq to wm_adsp_buffer_reenable_irq, and irq_ack to irq_count to make functionality more clear. - Remove the comment from wm_adsp_buffer_ack_irq that is no longer required with the new naming Thanks, Charles sound/soc/codecs/wm5110.c | 27 +++++++ sound/soc/codecs/wm_adsp.c | 188 +++++++++++++++++++++++++++++++++++++++++++++ sound/soc/codecs/wm_adsp.h | 3 + 3 files changed, 218 insertions(+) diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index eb1e665..23b811c 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -2175,10 +2175,23 @@ static int wm5110_open(struct snd_compr_stream *stream) return wm_adsp_compr_open(&priv->core.adsp[n_adsp], stream); } +static irqreturn_t wm5110_adsp2_irq(int irq, void *data) +{ + struct wm5110_priv *florida = data; + int ret; + + ret = wm_adsp_compr_handle_irq(&florida->core.adsp[2]); + if (ret == -ENODEV) + return IRQ_NONE; + + return IRQ_HANDLED; +} + static int wm5110_codec_probe(struct snd_soc_codec *codec) { struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); struct wm5110_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->core.arizona; int i, ret; priv->core.arizona->dapm = dapm; @@ -2187,6 +2200,14 @@ static int wm5110_codec_probe(struct snd_soc_codec *codec) arizona_init_gpio(codec); arizona_init_mono(codec); + ret = arizona_request_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, + "ADSP2 Compressed IRQ", wm5110_adsp2_irq, + priv); + if (ret != 0) { + dev_err(codec->dev, "Failed to request DSP IRQ: %d\n", ret); + return ret; + } + for (i = 0; i < WM5110_NUM_ADSP; ++i) { ret = wm_adsp2_codec_probe(&priv->core.adsp[i], codec); if (ret) @@ -2207,12 +2228,15 @@ err_adsp2_codec_probe: for (--i; i >= 0; --i) wm_adsp2_codec_remove(&priv->core.adsp[i], codec); + arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv); + return ret; } static int wm5110_codec_remove(struct snd_soc_codec *codec) { struct wm5110_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->core.arizona; int i; for (i = 0; i < WM5110_NUM_ADSP; ++i) @@ -2220,6 +2244,8 @@ static int wm5110_codec_remove(struct snd_soc_codec *codec) priv->core.arizona->dapm = NULL; + arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv); + return 0; } @@ -2271,6 +2297,7 @@ static struct snd_compr_ops wm5110_compr_ops = { .set_params = wm_adsp_compr_set_params, .get_caps = wm_adsp_compr_get_caps, .trigger = wm_adsp_compr_trigger, + .pointer = wm_adsp_compr_pointer, }; static struct snd_soc_platform_driver wm5110_compr_platform = { diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index ac879d1..49ef0bb 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -279,6 +279,11 @@ struct wm_adsp_compr_buf { struct wm_adsp_buffer_region *regions; u32 host_buf_ptr; + + u32 error; + u32 irq_count; + int read_index; + int avail; }; struct wm_adsp_compr { @@ -287,6 +292,8 @@ struct wm_adsp_compr { struct snd_compr_stream *stream; struct snd_compressed_buffer size; + + unsigned int copied_total; }; #define WM_ADSP_DATA_WORD_SIZE 3 @@ -2436,6 +2443,11 @@ static int wm_adsp_compr_check_params(struct snd_compr_stream *stream, return -EINVAL; } +static inline unsigned int wm_adsp_compr_frag_words(struct wm_adsp_compr *compr) +{ + return compr->size.fragment_size / WM_ADSP_DATA_WORD_SIZE; +} + int wm_adsp_compr_set_params(struct snd_compr_stream *stream, struct snd_compr_params *params) { @@ -2622,6 +2634,8 @@ static int wm_adsp_buffer_init(struct wm_adsp *dsp) return -ENOMEM; buf->dsp = dsp; + buf->read_index = -1; + buf->irq_count = 0xFFFFFFFF; ret = wm_adsp_buffer_locate(buf); if (ret < 0) { @@ -2705,6 +2719,16 @@ int wm_adsp_compr_trigger(struct snd_compr_stream *stream, int cmd) ret); break; } + + /* Trigger the IRQ at one fragment of data */ + ret = wm_adsp_buffer_write(compr->buf, + HOST_BUFFER_FIELD(high_water_mark), + wm_adsp_compr_frag_words(compr)); + if (ret < 0) { + adsp_err(dsp, "Failed to set high water mark: %d\n", + ret); + break; + } break; case SNDRV_PCM_TRIGGER_STOP: break; @@ -2719,4 +2743,168 @@ int wm_adsp_compr_trigger(struct snd_compr_stream *stream, int cmd) } EXPORT_SYMBOL_GPL(wm_adsp_compr_trigger); +static inline int wm_adsp_buffer_size(struct wm_adsp_compr_buf *buf) +{ + int last_region = wm_adsp_fw[buf->dsp->fw].caps->num_regions - 1; + + return buf->regions[last_region].cumulative_size; +} + +static int wm_adsp_buffer_update_avail(struct wm_adsp_compr_buf *buf) +{ + u32 next_read_index, next_write_index; + int write_index, read_index, avail; + int ret; + + /* Only sync read index if we haven't already read a valid index */ + if (buf->read_index < 0) { + ret = wm_adsp_buffer_read(buf, + HOST_BUFFER_FIELD(next_read_index), + &next_read_index); + if (ret < 0) + return ret; + + read_index = sign_extend32(next_read_index, 23); + + if (read_index < 0) { + adsp_dbg(buf->dsp, "Avail check on unstarted stream\n"); + return 0; + } + + buf->read_index = read_index; + } + + ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(next_write_index), + &next_write_index); + if (ret < 0) + return ret; + + write_index = sign_extend32(next_write_index, 23); + + avail = write_index - buf->read_index; + if (avail < 0) + avail += wm_adsp_buffer_size(buf); + + adsp_dbg(buf->dsp, "readindex=0x%x, writeindex=0x%x, avail=%d\n", + buf->read_index, write_index, avail); + + buf->avail = avail; + + return 0; +} + +int wm_adsp_compr_handle_irq(struct wm_adsp *dsp) +{ + struct wm_adsp_compr_buf *buf = dsp->buffer; + int ret = 0; + + mutex_lock(&dsp->pwr_lock); + + if (!buf) { + adsp_err(dsp, "Spurious buffer IRQ\n"); + ret = -ENODEV; + goto out; + } + + adsp_dbg(dsp, "Handling buffer IRQ\n"); + + ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(error), &buf->error); + if (ret < 0) { + adsp_err(dsp, "Failed to check buffer error: %d\n", ret); + goto out; + } + if (buf->error != 0) { + adsp_err(dsp, "Buffer error occurred: %d\n", buf->error); + ret = -EIO; + goto out; + } + + ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(irq_count), + &buf->irq_count); + if (ret < 0) { + adsp_err(dsp, "Failed to get irq_count: %d\n", ret); + goto out; + } + + ret = wm_adsp_buffer_update_avail(buf); + if (ret < 0) { + adsp_err(dsp, "Error reading avail: %d\n", ret); + goto out; + } + +out: + mutex_unlock(&dsp->pwr_lock); + + return ret; +} +EXPORT_SYMBOL_GPL(wm_adsp_compr_handle_irq); + +static int wm_adsp_buffer_reenable_irq(struct wm_adsp_compr_buf *buf) +{ + if (buf->irq_count & 0x01) + return 0; + + adsp_dbg(buf->dsp, "Enable IRQ(0x%x) for next fragment\n", + buf->irq_count); + + buf->irq_count |= 0x01; + + return wm_adsp_buffer_write(buf, HOST_BUFFER_FIELD(irq_ack), + buf->irq_count); +} + +int wm_adsp_compr_pointer(struct snd_compr_stream *stream, + struct snd_compr_tstamp *tstamp) +{ + struct wm_adsp_compr *compr = stream->runtime->private_data; + struct wm_adsp_compr_buf *buf = compr->buf; + struct wm_adsp *dsp = compr->dsp; + int ret = 0; + + adsp_dbg(dsp, "Pointer request\n"); + + mutex_lock(&dsp->pwr_lock); + + if (!compr->buf) { + ret = -ENXIO; + goto out; + } + + if (compr->buf->error) { + ret = -EIO; + goto out; + } + + if (buf->avail < wm_adsp_compr_frag_words(compr)) { + ret = wm_adsp_buffer_update_avail(buf); + if (ret < 0) { + adsp_err(dsp, "Error reading avail: %d\n", ret); + goto out; + } + + /* + * If we really have less than 1 fragment available tell the + * DSP to inform us once a whole fragment is available. + */ + if (buf->avail < wm_adsp_compr_frag_words(compr)) { + ret = wm_adsp_buffer_reenable_irq(buf); + if (ret < 0) { + adsp_err(dsp, + "Failed to re-enable buffer IRQ: %d\n", + ret); + goto out; + } + } + } + + tstamp->copied_total = compr->copied_total; + tstamp->copied_total += buf->avail * WM_ADSP_DATA_WORD_SIZE; + +out: + mutex_unlock(&dsp->pwr_lock); + + return ret; +} +EXPORT_SYMBOL_GPL(wm_adsp_compr_pointer); + MODULE_LICENSE("GPL v2"); diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 43af093..522fa1a 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -112,5 +112,8 @@ extern int wm_adsp_compr_set_params(struct snd_compr_stream *stream, extern int wm_adsp_compr_get_caps(struct snd_compr_stream *stream, struct snd_compr_caps *caps); extern int wm_adsp_compr_trigger(struct snd_compr_stream *stream, int cmd); +extern int wm_adsp_compr_handle_irq(struct wm_adsp *dsp); +extern int wm_adsp_compr_pointer(struct snd_compr_stream *stream, + struct snd_compr_tstamp *tstamp); #endif -- 2.1.4

2 2

[alsa-devel] [PATCH v3 0/8] Add support for voice control on Arizona ADSP
by Charles Keepax 06 Jan '16

06 Jan '16

This series add support for voice control on wm8280/5110. This is done by opening a compressed record channel, upon which data will be available once the voice control functionality has been triggered on the DSP. Changes since v2: - Fix specified using in printf for size_t in wm_adsp_compr_read, as reported by the kbuild test robot. Thanks, Charles Charles Keepax (8): ASoC: wm5110: Provide basic hookup for voice control ASoC: wm_adsp: Factor out finding the location of an algorithm region ALSA: compress: Add SND_AUDIOCODEC_BESPOKE ASoC: wm_adsp: Add support for opening a compressed stream ASoC: wm_adsp: Add code to locate and initialise compressed buffer ASoC: wm_adsp: Attach buffers and streams together ASoC: wm_adsp: Add a handler for the compressed IRQ ASoC: wm_adsp: Pull data through compressed read include/uapi/sound/compress_params.h | 5 +- sound/soc/codecs/Kconfig | 1 + sound/soc/codecs/arizona.h | 2 +- sound/soc/codecs/wm5110.c | 95 +++- sound/soc/codecs/wm_adsp.c | 907 ++++++++++++++++++++++++++++++++++- sound/soc/codecs/wm_adsp.h | 21 + 6 files changed, 1010 insertions(+), 21 deletions(-) -- 2.1.4

2 19

[alsa-devel] Applied "Linux 4.4-rc8" to the asoc tree
by Mark Brown 06 Jan '16

06 Jan '16

The patch Linux 4.4-rc8 has been applied to the asoc tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From 168309855a7d1e16db751e9c647119fe2d2dc878 Mon Sep 17 00:00:00 2001 From: Linus Torvalds <torvalds(a)linux-foundation.org> Date: Sun, 3 Jan 2016 15:15:37 -0800 Subject: [PATCH] Linux 4.4-rc8 --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 1122433a5cd5..9d94adeceab6 100644 --- a/Makefile +++ b/Makefile @@ -1,7 +1,7 @@ VERSION = 4 PATCHLEVEL = 4 SUBLEVEL = 0 -EXTRAVERSION = -rc7 +EXTRAVERSION = -rc8 NAME = Blurry Fish Butt # *DOCUMENTATION* -- 2.6.2

2 2

[alsa-devel] [PATCH] ASoC: rt5645: Constify ACPI device ids
by Mathias Krause 06 Jan '16

06 Jan '16

Constify the ACPI device ID array, no need to have it writable at runtime. Also drop the unused RT5645_INIT_REG_LEN define. Signed-off-by: Mathias Krause <minipli(a)googlemail.com> Cc: Bard Liao <bardliao(a)realtek.com> Cc: Oder Chiou <oder_chiou(a)realtek.com> Cc: John Lin <john.lin(a)realtek.com> --- sound/soc/codecs/rt5645.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/sound/soc/codecs/rt5645.c b/sound/soc/codecs/rt5645.c index ef76940f9dcb..38a0b60a7f6e 100644 --- a/sound/soc/codecs/rt5645.c +++ b/sound/soc/codecs/rt5645.c @@ -64,7 +64,6 @@ static const struct reg_sequence init_list[] = { {RT5645_PR_BASE + 0x21, 0x4040}, {RT5645_PR_BASE + 0x23, 0x0004}, }; -#define RT5645_INIT_REG_LEN ARRAY_SIZE(init_list) static const struct reg_sequence rt5650_init_list[] = { {0xf6, 0x0100}, @@ -3326,7 +3325,7 @@ static const struct i2c_device_id rt5645_i2c_id[] = { MODULE_DEVICE_TABLE(i2c, rt5645_i2c_id); #ifdef CONFIG_ACPI -static struct acpi_device_id rt5645_acpi_match[] = { +static const struct acpi_device_id rt5645_acpi_match[] = { { "10EC5645", 0 }, { "10EC5650", 0 }, {}, -- 1.7.10.4

2 4

[alsa-devel] [PATCH] ALSA: emux: constify nrpn_conv_table structures
by Julia Lawall 06 Jan '16

06 Jan '16

The nrpn_conv_table structures are never modified, so declare them as const. Done with the help of Coccinelle. Signed-off-by: Julia Lawall <Julia.Lawall(a)lip6.fr> --- sound/synth/emux/emux_nrpn.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/sound/synth/emux/emux_nrpn.c b/sound/synth/emux/emux_nrpn.c index 00fc005..9729a15 100644 --- a/sound/synth/emux/emux_nrpn.c +++ b/sound/synth/emux/emux_nrpn.c @@ -48,7 +48,8 @@ struct nrpn_conv_table { * convert NRPN/control values */ -static int send_converted_effect(struct nrpn_conv_table *table, int num_tables, +static int send_converted_effect(const struct nrpn_conv_table *table, + int num_tables, struct snd_emux_port *port, struct snd_midi_channel *chan, int type, int val, int mode) @@ -179,7 +180,7 @@ static int fx_conv_Q(int val) } -static struct nrpn_conv_table awe_effects[] = +static const struct nrpn_conv_table awe_effects[] = { { 0, EMUX_FX_LFO1_DELAY, fx_lfo1_delay}, { 1, EMUX_FX_LFO1_FREQ, fx_lfo1_freq}, @@ -266,7 +267,7 @@ static int gs_vib_delay(int val) return -(val - 64) * gs_sense[FX_VIBDELAY] / 50; } -static struct nrpn_conv_table gs_effects[] = +static const struct nrpn_conv_table gs_effects[] = { {32, EMUX_FX_CUTOFF, gs_cutoff}, {33, EMUX_FX_FILTERQ, gs_filterQ}, @@ -350,7 +351,7 @@ static int xg_release(int val) return -(val - 64) * xg_sense[FX_RELEASE] / 64; } -static struct nrpn_conv_table xg_effects[] = +static const struct nrpn_conv_table xg_effects[] = { {71, EMUX_FX_CUTOFF, xg_cutoff}, {74, EMUX_FX_FILTERQ, xg_filterQ},

2 1

[alsa-devel] PCM3168 alsa driver for beaglebone black
by Pablo Fonovich 06 Jan '16

06 Jan '16

Hi: I'm working in a project of making an audio cape for beaglebone black with pcm3168 codec... so far i've written the driver i've attached based on pcm1681.c available in linux kernel. Im a noob in this subjets, so i would like to know how can now make it work in my custom system for the beaglebone. I followed the guide in this link http://processors.wiki.ti.com/index.php/Sitara_Linux_Audio_DAC_Example, but it makes me write the ops and hw structures that i already have in my pcm3168.c file, in the davinci_evm.c file. The drivers compiles and is detected at boot time, as it says in the guide. But when i type aplay command to play some wav, the message "ALSA lib pcm.c:2267:(snd_pcm_open_noupdate) Unknown PCM default aplay: main:722: audio open error: No such file or directory" appears, so i'm missing something... I don't knwo if this post belongs to this list, but any help would be great... If some docummentation about writing a driver for an embedded system is available, please tell me... Also, if someone can suggest me some guidelines of work i would be grateful, cause i just can't get organized with the information i found Thanks very Much... Pablo

1 0

[alsa-devel] Applied "ASoC: da7218: Correct BCLK inversion for DSP DAI format mode" to the asoc tree
by Mark Brown 05 Jan '16

05 Jan '16

The patch ASoC: da7218: Correct BCLK inversion for DSP DAI format mode has been applied to the asoc tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From f644eb62fe88a2414e5e5c1bd80e20c881f5d86a Mon Sep 17 00:00:00 2001 From: Adam Thomson <Adam.Thomson.Opensource(a)diasemi.com> Date: Tue, 5 Jan 2016 18:15:33 +0000 Subject: [PATCH] ASoC: da7218: Correct BCLK inversion for DSP DAI format mode By default the device latches data on the falling edge of the BCLK in DSP mode, whereas the expectation for normal BCLK is to latch on the rising edge. This updates the driver to invert the BCLK configuration for DSP mode, to align with expected behaviour. Signed-off-by: Adam Thomson <Adam.Thomson.Opensource(a)diasemi.com> Signed-off-by: Mark Brown <broonie(a)kernel.org> --- sound/soc/codecs/da7218.c | 47 +++++++++++++++++++++++++++++++++++++---------- 1 file changed, 37 insertions(+), 10 deletions(-) diff --git a/sound/soc/codecs/da7218.c b/sound/soc/codecs/da7218.c index 72686517ff54..93575f251866 100644 --- a/sound/soc/codecs/da7218.c +++ b/sound/soc/codecs/da7218.c @@ -1954,17 +1954,44 @@ static int da7218_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) return -EINVAL; } - switch (fmt & SND_SOC_DAIFMT_INV_MASK) { - case SND_SOC_DAIFMT_NB_NF: - break; - case SND_SOC_DAIFMT_NB_IF: - dai_clk_mode |= DA7218_DAI_WCLK_POL_INV; - break; - case SND_SOC_DAIFMT_IB_NF: - dai_clk_mode |= DA7218_DAI_CLK_POL_INV; + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + case SND_SOC_DAIFMT_LEFT_J: + case SND_SOC_DAIFMT_RIGHT_J: + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + break; + case SND_SOC_DAIFMT_NB_IF: + dai_clk_mode |= DA7218_DAI_WCLK_POL_INV; + break; + case SND_SOC_DAIFMT_IB_NF: + dai_clk_mode |= DA7218_DAI_CLK_POL_INV; + break; + case SND_SOC_DAIFMT_IB_IF: + dai_clk_mode |= DA7218_DAI_WCLK_POL_INV | + DA7218_DAI_CLK_POL_INV; + break; + default: + return -EINVAL; + } break; - case SND_SOC_DAIFMT_IB_IF: - dai_clk_mode |= DA7218_DAI_WCLK_POL_INV | DA7218_DAI_CLK_POL_INV; + case SND_SOC_DAIFMT_DSP_B: + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + dai_clk_mode |= DA7218_DAI_CLK_POL_INV; + break; + case SND_SOC_DAIFMT_NB_IF: + dai_clk_mode |= DA7218_DAI_WCLK_POL_INV | + DA7218_DAI_CLK_POL_INV; + break; + case SND_SOC_DAIFMT_IB_NF: + break; + case SND_SOC_DAIFMT_IB_IF: + dai_clk_mode |= DA7218_DAI_WCLK_POL_INV; + break; + default: + return -EINVAL; + } break; default: return -EINVAL; -- 2.7.0.rc3

1 0

[alsa-devel] [PATCH] ASoC: da7218: Correct BCLK inversion for DSP DAI format mode
by Adam Thomson 05 Jan '16

05 Jan '16

By default the device latches data on the falling edge of the BCLK in DSP mode, whereas the expectation for normal BCLK is to latch on the rising edge. This updates the driver to invert the BCLK configuration for DSP mode, to align with expected behaviour. Signed-off-by: Adam Thomson <Adam.Thomson.Opensource(a)diasemi.com> --- This patch is based on the following commit: 'ASoC: da7218: Enable mic level detection reporting to user-space' (Commit e05c25a1af29d65260ed1458f2cc4a959030ebd2, kernel/git/broonie/sound.git) sound/soc/codecs/da7218.c | 47 +++++++++++++++++++++++++++++++++++++---------- 1 file changed, 37 insertions(+), 10 deletions(-) diff --git a/sound/soc/codecs/da7218.c b/sound/soc/codecs/da7218.c index 752ed04..c7cc88a 100644 --- a/sound/soc/codecs/da7218.c +++ b/sound/soc/codecs/da7218.c @@ -1954,17 +1954,44 @@ static int da7218_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) return -EINVAL; } - switch (fmt & SND_SOC_DAIFMT_INV_MASK) { - case SND_SOC_DAIFMT_NB_NF: - break; - case SND_SOC_DAIFMT_NB_IF: - dai_clk_mode |= DA7218_DAI_WCLK_POL_INV; - break; - case SND_SOC_DAIFMT_IB_NF: - dai_clk_mode |= DA7218_DAI_CLK_POL_INV; + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + case SND_SOC_DAIFMT_LEFT_J: + case SND_SOC_DAIFMT_RIGHT_J: + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + break; + case SND_SOC_DAIFMT_NB_IF: + dai_clk_mode |= DA7218_DAI_WCLK_POL_INV; + break; + case SND_SOC_DAIFMT_IB_NF: + dai_clk_mode |= DA7218_DAI_CLK_POL_INV; + break; + case SND_SOC_DAIFMT_IB_IF: + dai_clk_mode |= DA7218_DAI_WCLK_POL_INV | + DA7218_DAI_CLK_POL_INV; + break; + default: + return -EINVAL; + } break; - case SND_SOC_DAIFMT_IB_IF: - dai_clk_mode |= DA7218_DAI_WCLK_POL_INV | DA7218_DAI_CLK_POL_INV; + case SND_SOC_DAIFMT_DSP_B: + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + dai_clk_mode |= DA7218_DAI_CLK_POL_INV; + break; + case SND_SOC_DAIFMT_NB_IF: + dai_clk_mode |= DA7218_DAI_WCLK_POL_INV | + DA7218_DAI_CLK_POL_INV; + break; + case SND_SOC_DAIFMT_IB_NF: + break; + case SND_SOC_DAIFMT_IB_IF: + dai_clk_mode |= DA7218_DAI_WCLK_POL_INV; + break; + default: + return -EINVAL; + } break; default: return -EINVAL; -- 1.9.3

1 0

[alsa-devel] [PATCH 00/19] Baytrail/Cherrytrail cleanups and fixes
by Pierre-Louis Bossart 05 Jan '16

05 Jan '16

Set of patches to provide better upstream support for BYT/CHT platforms (24 bit, Deep-buffer, DPCM). This was tested on Asus T100 and Minnowboard. A set of UCM files is available at https://github.com/plbossart/UCM.git for better integration with Ubuntu/pulseaudio (no need for asound.state or asound.conf) Acknowledgements: Keyon Jie for his MinnowBoard validation Sebastien Guiriec for pointing out the switch logic issue and fixing SSP configs Vinod Koul for providing codec/mixer configurations Francisco Mendez for his help with the MCLK and jack detection Jack Yu and Bard Liao for their codec support Known issues: noise on startup when using speakers Once this batch is merged, the following updates will be provided: MCLK support to fix noise issues BYT-CR fixes jack detection Jack Yu (1): ASoC: rt5640: add ASRC support Jorge Fernandez Monteagudo (1): ASoC: Intel: Atom: Add support for HP ElitePad 1000 G2 Pierre-Louis Bossart (16): ASoC: Intel: fix ACPI probe regression with Atom DPCM driver ASoC: Intel: boards: align pin names between byt-rt5640 drivers ASoC: Intel: boards: start merging byt-rt5640 drivers ASoC: Intel: boards: merge DMI-based quirks in bytcr-rt5640 driver ASoC: Intel: tag byt-rt5640 machine driver as deprecated ASoc: Intel: Atom: add deep buffer definitions for atom platforms ASoC: Intel: boards: add DEEP_BUFFER support for BYT/CHT/BSW ASoC: Intel: Atom: add 24-bit support for media playback and capture ASoC: Intel: Atom: clean-up compressed DAI definition ASoC: Intel: Atom: flip logic for gain Switch ASoC: codec: rt5651: add ACPI and OF support ASoC: Intel: add bytct-rt5651 machine driver ASoC: intel: boards: add card for MinnowBoard I2S access ASoC: Intel: bytcr-rt5640: enable ASRC ASoC: Intel: bytcr_rt5640: fixup DAI codec_name with HID ASoC: Intel: Atom: add support for RT5642 Sebastien Guiriec (1): ASoC: Intel: bytcr_rt5640: set SSP to I2S mode 2ch arch/x86/include/asm/platform_sst_audio.h | 1 + sound/soc/codecs/rt5640.c | 103 ++++++++ sound/soc/codecs/rt5640.h | 17 ++ sound/soc/codecs/rt5651.c | 19 ++ sound/soc/intel/Kconfig | 35 ++- sound/soc/intel/atom/sst-atom-controls.c | 5 +- sound/soc/intel/atom/sst-atom-controls.h | 1 + sound/soc/intel/atom/sst-mfld-platform-pcm.c | 20 +- sound/soc/intel/atom/sst/sst_acpi.c | 25 +- sound/soc/intel/boards/Makefile | 4 + sound/soc/intel/boards/bytcr_nocodec.c | 233 ++++++++++++++++++ sound/soc/intel/boards/bytcr_rt5640.c | 266 ++++++++++++++++----- sound/soc/intel/boards/bytcr_rt5651.c | 338 +++++++++++++++++++++++++++ sound/soc/intel/boards/cht_bsw_max98090_ti.c | 12 + sound/soc/intel/boards/cht_bsw_rt5645.c | 12 + sound/soc/intel/boards/cht_bsw_rt5672.c | 12 + sound/soc/intel/common/Makefile | 5 + 17 files changed, 1036 insertions(+), 72 deletions(-) create mode 100644 sound/soc/intel/boards/bytcr_nocodec.c create mode 100644 sound/soc/intel/boards/bytcr_rt5651.c -- 1.9.1

4 40

[alsa-devel] [PATCH v2] ASoC: fsl_asrc: old version asrc only support even numbered channels
by Zidan Wang 05 Jan '16

05 Jan '16

The latest asrc's channel bits is 4 bit, the old asrc's channel bits is 3. For the old version asrc, channel should be a even number. Signed-off-by: Zidan Wang <zidan.wang(a)freescale.com> --- v1->v2: 1. add an extra else if for the new condition. sound/soc/fsl/fsl_asrc.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/sound/soc/fsl/fsl_asrc.c b/sound/soc/fsl/fsl_asrc.c index be78dc9..d7d81cf 100644 --- a/sound/soc/fsl/fsl_asrc.c +++ b/sound/soc/fsl/fsl_asrc.c @@ -116,6 +116,9 @@ static int fsl_asrc_request_pair(int channels, struct fsl_asrc_pair *pair) } else if (asrc_priv->channel_avail < channels) { dev_err(dev, "can't afford required channels: %d\n", channels); ret = -EINVAL; + } else if (asrc_priv->channel_bits < 4 && channels % 2 != 0) { + dev_err(dev, "old version asrc can't support an odd channel number"); + ret = -EINVAL; } else { asrc_priv->channel_avail -= channels; asrc_priv->pair[index] = pair; -- 1.9.1

2 3

[alsa-devel] Applied "ASoC: da7219: Correct BCLK inversion for DSP DAI format mode" to the asoc tree
by Mark Brown 05 Jan '16

05 Jan '16

The patch ASoC: da7219: Correct BCLK inversion for DSP DAI format mode has been applied to the asoc tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From 4acfa36be618eb8ac3aa39f473e7550710216435 Mon Sep 17 00:00:00 2001 From: Adam Thomson <Adam.Thomson.Opensource(a)diasemi.com> Date: Tue, 5 Jan 2016 15:05:36 +0000 Subject: [PATCH] ASoC: da7219: Correct BCLK inversion for DSP DAI format mode By default the device latches data on the falling edge of the BCLK in DSP mode, whereas the expectation for normal BCLK is to latch on the rising edge. This updates the driver to invert the BCLK configuration for DSP mode, to align with expected behaviour. Signed-off-by: Adam Thomson <Adam.Thomson.Opensource(a)diasemi.com> Signed-off-by: Mark Brown <broonie(a)kernel.org> --- sound/soc/codecs/da7219.c | 48 ++++++++++++++++++++++++++++++++++++----------- 1 file changed, 37 insertions(+), 11 deletions(-) diff --git a/sound/soc/codecs/da7219.c b/sound/soc/codecs/da7219.c index 9c7e8ec68b94..81c0708b85c1 100644 --- a/sound/soc/codecs/da7219.c +++ b/sound/soc/codecs/da7219.c @@ -1156,18 +1156,44 @@ static int da7219_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) return -EINVAL; } - switch (fmt & SND_SOC_DAIFMT_INV_MASK) { - case SND_SOC_DAIFMT_NB_NF: - break; - case SND_SOC_DAIFMT_NB_IF: - dai_clk_mode |= DA7219_DAI_WCLK_POL_INV; - break; - case SND_SOC_DAIFMT_IB_NF: - dai_clk_mode |= DA7219_DAI_CLK_POL_INV; + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + case SND_SOC_DAIFMT_LEFT_J: + case SND_SOC_DAIFMT_RIGHT_J: + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + break; + case SND_SOC_DAIFMT_NB_IF: + dai_clk_mode |= DA7219_DAI_WCLK_POL_INV; + break; + case SND_SOC_DAIFMT_IB_NF: + dai_clk_mode |= DA7219_DAI_CLK_POL_INV; + break; + case SND_SOC_DAIFMT_IB_IF: + dai_clk_mode |= DA7219_DAI_WCLK_POL_INV | + DA7219_DAI_CLK_POL_INV; + break; + default: + return -EINVAL; + } break; - case SND_SOC_DAIFMT_IB_IF: - dai_clk_mode |= DA7219_DAI_WCLK_POL_INV | - DA7219_DAI_CLK_POL_INV; + case SND_SOC_DAIFMT_DSP_B: + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + dai_clk_mode |= DA7219_DAI_CLK_POL_INV; + break; + case SND_SOC_DAIFMT_NB_IF: + dai_clk_mode |= DA7219_DAI_WCLK_POL_INV | + DA7219_DAI_CLK_POL_INV; + break; + case SND_SOC_DAIFMT_IB_NF: + break; + case SND_SOC_DAIFMT_IB_IF: + dai_clk_mode |= DA7219_DAI_WCLK_POL_INV; + break; + default: + return -EINVAL; + } break; default: return -EINVAL; -- 2.7.0.rc3

1 0

[alsa-devel] [PATCH 1/2] ASoC: imx-wm8958: add imx-wm8958 machine driver
by Zidan Wang 05 Jan '16

05 Jan '16

This is the initial imx-wm8958 device-tree-only machine driver working with fsl_sai driver. This sound card has three dai link, hifi, voice and bt. Hifi dai link will support codec dai master and slave mode. Voice an bt dai link have dummy cpu dai, and just support codec dai master mode. Signed-off-by: Zidan Wang <zidan.wang(a)freescale.com> --- .../devicetree/bindings/sound/imx-audio-wm8958.txt | 74 ++++ sound/soc/fsl/Kconfig | 14 + sound/soc/fsl/Makefile | 2 + sound/soc/fsl/imx-wm8958.c | 418 +++++++++++++++++++++ 4 files changed, 508 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/imx-audio-wm8958.txt create mode 100644 sound/soc/fsl/imx-wm8958.c diff --git a/Documentation/devicetree/bindings/sound/imx-audio-wm8958.txt b/Documentation/devicetree/bindings/sound/imx-audio-wm8958.txt new file mode 100644 index 0000000..81775e4 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/imx-audio-wm8958.txt @@ -0,0 +1,74 @@ +Freescale i.MX audio complex with WM8958 codec + +Required properties: + + - compatible : "fsl,imx-audio-wm8958" + + - model : The user-visible name of this sound complex + + - cpu-dai : The phandle of an CPU DAI controller + + - audio-codec : The phandle of the WM8958 audio codec + + - audio-routing : A list of the connections between audio components. + Each entry is a pair of strings, the first being + the connection's sink, the second being the + connection's source. Valid names could be power + supplies, WM8958 pins, and the jacks on the board: + + Power supplies: + * MICBIAS1 + * MICBIAS2 + + Board connectors: + * Headphone Jack + * Ext Spk + + - aifx-format : set format for aifx, such as "i2s", "left_j", + "dsp_a", "dsp_b". + + - aifx-bitclock-master : If present, aifx wroks as bit clock master. + Otherwise, aifx works as bit clock slave. + + - aifx-frame-master : If present, aifx wroks as frame clock master. + Otherwise, aifx works as frame clock slave. + + - aifx-bitclock-inversion : If present, bit clock will invert polarity. + + - aifx-frame-inversion : If present, frame clock will invert polarity. + + - aifx-continuous-clock : If present, bit clock will be continuous. + Otherwise, dai bit clocks can be be gated + (disabled) when the dai is not sending or + receiving PCM data in a frame. + +Example: + +sound { + compatible = "fsl,imx6ul-evk-wm8958", + "fsl,imx-audio-wm8958"; + model = "wm8960-audio"; + cpu-dai = <&sai1>; + audio-codec = <&codec>; + audio-routing = + "Headphone Jack", "HPOUT1L", + "Headphone Jack", "HPOUT1R", + "Ext Spk", "SPKOUTLP", + "Ext Spk", "SPKOUTLN", + "Ext Spk", "SPKOUTRP", + "Ext Spk", "SPKOUTRN", + "IN1LN", "MICBIAS2"; + + /* set aif1 dai format */ + aif1-format = "i2s"; + aif1-bitclock-master; + aif1-frame-master; + /* set aif2 dai format */ + aif2-format = "i2s"; + aif2-bitclock-master; + aif2-frame-master; + /* set aif3 dai format */ + aif3-format = "i2s"; + aif3-bitclock-master; + aif3-frame-master; +}; diff --git a/sound/soc/fsl/Kconfig b/sound/soc/fsl/Kconfig index 14dfdee..53041cc 100644 --- a/sound/soc/fsl/Kconfig +++ b/sound/soc/fsl/Kconfig @@ -229,6 +229,20 @@ config SND_SOC_EUKREA_TLV320 Enable I2S based access to the TLV320AIC23B codec attached to the SSI interface +config SND_SOC_IMX_WM8958 + tristate "SoC Audio support for i.MX boards with wm8958" + depends on OF && I2C + select MFD_WM8994 + select SND_SOC_WM8994 + select SND_SOC_IMX_PCM_DMA + select SND_SOC_FSL_SAI + select SND_SOC_FSL_UTILS + select SND_KCTL_JACK + help + SoC Audio support for i.MX boards with WM8958 + Say Y if you want to add support for SoC audio on an i.MX board with + a wm8958 codec. + config SND_SOC_IMX_WM8962 tristate "SoC Audio support for i.MX boards with wm8962" depends on OF && I2C && INPUT diff --git a/sound/soc/fsl/Makefile b/sound/soc/fsl/Makefile index d28dc25..2a781c0 100644 --- a/sound/soc/fsl/Makefile +++ b/sound/soc/fsl/Makefile @@ -54,6 +54,7 @@ snd-soc-mx27vis-aic32x4-objs := mx27vis-aic32x4.o snd-soc-wm1133-ev1-objs := wm1133-ev1.o snd-soc-imx-es8328-objs := imx-es8328.o snd-soc-imx-sgtl5000-objs := imx-sgtl5000.o +snd-soc-imx-wm8958-objs := imx-wm8958.o snd-soc-imx-wm8962-objs := imx-wm8962.o snd-soc-imx-spdif-objs := imx-spdif.o snd-soc-imx-mc13783-objs := imx-mc13783.o @@ -64,6 +65,7 @@ obj-$(CONFIG_SND_SOC_MX27VIS_AIC32X4) += snd-soc-mx27vis-aic32x4.o obj-$(CONFIG_SND_MXC_SOC_WM1133_EV1) += snd-soc-wm1133-ev1.o obj-$(CONFIG_SND_SOC_IMX_ES8328) += snd-soc-imx-es8328.o obj-$(CONFIG_SND_SOC_IMX_SGTL5000) += snd-soc-imx-sgtl5000.o +obj-$(CONFIG_SND_SOC_IMX_WM8958) += snd-soc-imx-wm8958.o obj-$(CONFIG_SND_SOC_IMX_WM8962) += snd-soc-imx-wm8962.o obj-$(CONFIG_SND_SOC_IMX_SPDIF) += snd-soc-imx-spdif.o obj-$(CONFIG_SND_SOC_IMX_MC13783) += snd-soc-imx-mc13783.o diff --git a/sound/soc/fsl/imx-wm8958.c b/sound/soc/fsl/imx-wm8958.c new file mode 100644 index 0000000..920bc9e --- /dev/null +++ b/sound/soc/fsl/imx-wm8958.c @@ -0,0 +1,418 @@ +/* + * Copyright (C) 2015 Freescale Semiconductor, Inc. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include <linux/module.h> +#include <linux/of_platform.h> +#include <linux/i2c.h> +#include <linux/of_gpio.h> +#include <linux/gpio.h> +#include <linux/clk.h> +#include <sound/soc.h> +#include <sound/jack.h> +#include <sound/control.h> +#include <sound/pcm_params.h> +#include <sound/soc-dapm.h> +#include <linux/mfd/wm8994/registers.h> +#include "../fsl/fsl_sai.h" +#include "../codecs/wm8994.h" + +#define DAI_NAME_SIZE 32 + +#define DAI_LINK_NUM (3) +#define HIFI_DAI (0) +#define VOICE_DAI (1) +#define BT_DAI (2) + +#define WM8958_MCLK_MAX (2) + +#define WM8994_FLL(id) (id == HIFI_DAI ? WM8994_FLL1 : WM8994_FLL2) +#define WM8994_SYSCLK_FLL(id) (id == HIFI_DAI ? WM8994_SYSCLK_FLL1 : WM8994_SYSCLK_FLL2) +#define WM8994_FLL_SRC_MCLK(id) (id == HIFI_DAI ? WM8994_FLL_SRC_MCLK1: WM8994_FLL_SRC_MCLK2) + +struct imx_wm8958_data { + struct snd_soc_dai_link *dai_link;; + struct snd_soc_card card; + struct clk *mclk[WM8958_MCLK_MAX]; + u32 mclk_freq[WM8958_MCLK_MAX]; + bool is_hifi_dai_master; + bool is_stream_in_use[DAI_LINK_NUM][2]; +}; + +static const struct snd_soc_dapm_widget imx_wm8958_dapm_widgets[] = { + SND_SOC_DAPM_HP("Headphone Jack", NULL), + SND_SOC_DAPM_SPK("Ext Spk", NULL), +}; + +static int imx_wm8958_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *codec_dai = rtd->codec_dai; + struct snd_soc_dai *cpu_dai = rtd->cpu_dai; + struct snd_soc_codec *codec = rtd->codec; + struct snd_soc_card *card = rtd->card; + struct device *dev = card->dev; + struct imx_wm8958_data *data = snd_soc_card_get_drvdata(card); + bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK; + bool hifi_dai_sysclk_dir = SND_SOC_CLOCK_OUT; + u32 mclk_id, id = codec_dai->id - 1; + u32 pll_out; + int ret; + + data->is_stream_in_use[id][tx] = true; + + if (data->mclk_freq[id]) + mclk_id = WM8994_FLL_SRC_MCLK(id); + else if (id == HIFI_DAI) + mclk_id = WM8994_FLL_SRC_MCLK2; + else + mclk_id = WM8994_FLL_SRC_MCLK1; + + if (id == HIFI_DAI) { + /* + * Set GPIO1 pin function to reserve, so that DAC1 and ADC1 + * using shared LRCLK from DACLRCK1. + */ + snd_soc_update_bits(codec, WM8994_GPIO_1, 0x1f, 0x2); + + if (!data->is_hifi_dai_master) + hifi_dai_sysclk_dir = SND_SOC_CLOCK_IN; + + ret = snd_soc_dai_set_sysclk(cpu_dai, 0, 0, !hifi_dai_sysclk_dir); + + if (ret) { + dev_err(dev, "failed to set cpu sysclk: %d\n", ret); + return ret; + } + + if (!data->is_hifi_dai_master) { + ret = snd_soc_dai_set_sysclk(codec_dai, mclk_id, + data->mclk_freq[mclk_id - 1], + hifi_dai_sysclk_dir); + if (ret) { + dev_err(dev, "failed to set codec sysclk: %d\n", ret); + return ret; + } + + return 0; + } + } else if (id == VOICE_DAI) { + /* + * Set GPIO6 pin function to reserve, so that DAC2 and ADC2 + * using shared LRCLK from DACLRCK2. + */ + snd_soc_update_bits(codec, WM8994_GPIO_6, 0x1f, 0x2); + } + + if (params_width(params) == 24) + pll_out = params_rate(params) * 384; + else + pll_out = params_rate(params) * 256; + + ret = snd_soc_dai_set_pll(codec_dai, + WM8994_FLL(id), + mclk_id, + data->mclk_freq[mclk_id - 1], + pll_out); + if (ret) { + dev_err(dev, "failed to set codec pll: %d\n", ret); + return ret; + } + + ret = snd_soc_dai_set_sysclk(codec_dai, + WM8994_SYSCLK_FLL(id), + pll_out, + SND_SOC_CLOCK_OUT); + if (ret) { + dev_err(dev, "failed to set codec sysclk: %d\n", ret); + return ret; + } + + return 0; +} + +static int imx_wm8958_hw_free(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *codec_dai = rtd->codec_dai; + struct snd_soc_card *card = rtd->card; + struct imx_wm8958_data *data = snd_soc_card_get_drvdata(card); + bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK; + int id = codec_dai->id - 1; + + data->is_stream_in_use[id][tx] = false; + + if (id == HIFI_DAI && !data->is_hifi_dai_master) + return 0; + + if (!data->is_stream_in_use[id][!tx]) { + /* + * We should connect AIFxCLK source to FLL after enable FLL, and + * disconnet AIF1CLK source to FLL before disable FLL, otherwise + * FLL worked abnormal. + */ + snd_soc_dai_set_sysclk(codec_dai, WM8994_FLL_SRC_MCLK(id), + data->mclk_freq[id], SND_SOC_CLOCK_OUT); + + /* Disable FLL1 after all stream finished. */ + snd_soc_dai_set_pll(codec_dai, WM8994_FLL(id), 0, 0, 0); + } + + return 0; +} + +static int imx_wm8958_set_bias_level(struct snd_soc_card *card, + struct snd_soc_dapm_context *dapm, + enum snd_soc_bias_level level) +{ + struct snd_soc_pcm_runtime *rtd; + struct snd_soc_dai *codec_dai; + struct imx_wm8958_data *data = snd_soc_card_get_drvdata(card); + int ret, i; + + rtd = snd_soc_get_pcm_runtime(card, card->dai_link[0].name); + codec_dai = rtd->codec_dai; + + if (dapm->dev != codec_dai->dev) + return 0; + + switch (level) { + case SND_SOC_BIAS_STANDBY: + if (card->dapm.bias_level == SND_SOC_BIAS_OFF) { + /* need to enable mclk to write/read wm8958 register */ + for (i = 0; i < WM8958_MCLK_MAX; i++) { + if (!IS_ERR(data->mclk[i])) { + ret = clk_prepare_enable(data->mclk[i]); + if (ret) + dev_warn(card->dev, "Failed to enable MCLK%d: %d\n", i + 1, ret); + } + } + } + break; + default: + break; + } + + return 0; +} + +static int imx_wm8958_set_bias_level_post(struct snd_soc_card *card, + struct snd_soc_dapm_context *dapm, + enum snd_soc_bias_level level) +{ + struct snd_soc_pcm_runtime *rtd; + struct snd_soc_dai *codec_dai; + struct imx_wm8958_data *data = snd_soc_card_get_drvdata(card); + int i; + + rtd = snd_soc_get_pcm_runtime(card, card->dai_link[0].name); + codec_dai = rtd->codec_dai; + + if (dapm->dev != codec_dai->dev) + return 0; + + switch (level) { + case SND_SOC_BIAS_OFF: + if (card->dapm.bias_level == SND_SOC_BIAS_STANDBY) + for (i = 0; i < WM8958_MCLK_MAX; i++) { + if (!IS_ERR(data->mclk[i])) + clk_disable_unprepare(data->mclk[i]); + } + break; + default: + break; + } + + card->dapm.bias_level = level; + + return 0; +} + +static struct snd_soc_ops imx_hifi_ops = { + .hw_params = imx_wm8958_hw_params, + .hw_free = imx_wm8958_hw_free, +}; + +static struct snd_soc_ops imx_voice_ops = { + .hw_params = imx_wm8958_hw_params, + .hw_free = imx_wm8958_hw_free, +}; + +static struct snd_soc_dai_link imx_wm8958_dai_link[] = { + [HIFI_DAI] = { + .name = "HiFi", + .stream_name = "HiFi", + .codec_name = "wm8994-codec", + .codec_dai_name = "wm8994-aif1", + .ops = &imx_hifi_ops, + }, + [VOICE_DAI] = { + .name = "Voice", + .stream_name = "Voice", + .cpu_dai_name = "snd-soc-dummy-dai", + .codec_name = "wm8994-codec", + .codec_dai_name = "wm8994-aif2", + .platform_name = "snd-soc-dummy", + .ignore_pmdown_time = 1, + .ops = &imx_voice_ops, + }, + [BT_DAI] = { + .name = "Bluetooth", + .stream_name = "Bluetooth", + .cpu_dai_name = "snd-soc-dummy-dai", + .codec_name = "wm8994-codec", + .codec_dai_name = "wm8994-aif3", + .platform_name = "snd-soc-dummy", + .ignore_pmdown_time = 1, + }, +}; + +static int imx_wm8958_probe(struct platform_device *pdev) +{ + struct device_node *cpu_np, *codec_np; + struct device_node *np = pdev->dev.of_node; + struct platform_device *cpu_pdev; + struct i2c_client *codec_dev; + struct imx_wm8958_data *data; + char tmp[8]; + u32 dai_fmt; + int ret, i; + + cpu_np = of_parse_phandle(np, "cpu-dai", 0); + if (!cpu_np) { + dev_err(&pdev->dev, "cpu dai phandle missing or invalid\n"); + return -EINVAL; + } + + codec_np = of_parse_phandle(np, "audio-codec", 0); + if (!codec_np) { + dev_err(&pdev->dev, "phandle missing or invalid\n"); + ret = -EINVAL; + goto fail; + } + + cpu_pdev = of_find_device_by_node(cpu_np); + if (!cpu_pdev) { + dev_err(&pdev->dev, "failed to find cpu dai platform device\n"); + ret = -EINVAL; + goto fail; + } + + codec_dev = of_find_i2c_device_by_node(codec_np); + if (!codec_dev || !codec_dev->dev.driver) { + dev_err(&pdev->dev, "failed to find codec platform device\n"); + ret = -EINVAL; + goto fail; + } + + data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + data->dai_link = imx_wm8958_dai_link; + + /* + * AIF1 support codec master and slave mode + * AIF2 and AIF3 just support codec master mode + */ + for (i = 0; i < DAI_LINK_NUM; i++) { + sprintf(tmp, "aif%d-", i + 1); + dai_fmt = snd_soc_of_parse_daifmt(np, tmp, NULL, NULL); + + if (!(dai_fmt & SND_SOC_DAIFMT_FORMAT_MASK)) { + dev_warn(&pdev->dev, + "failed to get format, default to i2s mode\n"); + dai_fmt |= SND_SOC_DAIFMT_I2S; + } + + if (i == HIFI_DAI) { + switch (dai_fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBS_CFS: + data->is_hifi_dai_master = false; + break; + default: + data->is_hifi_dai_master = true; + break; + } + } else { + dai_fmt &= ~SND_SOC_DAIFMT_MASTER_MASK; + dai_fmt |= SND_SOC_DAIFMT_CBM_CFM; + } + data->dai_link[i].dai_fmt = dai_fmt; + } + + for (i = 0; i < WM8958_MCLK_MAX; i++) { + sprintf(tmp, "mclk%d", i + 1); + data->mclk[i] = devm_clk_get(&codec_dev->dev, tmp); + if (IS_ERR(data->mclk[i])) { + ret = PTR_ERR(data->mclk[i]); + dev_err(&pdev->dev, "failed to get mclk%d clock: %d\n", + i + 1, ret); + } else { + data->mclk_freq[i] = clk_get_rate(data->mclk[i]); + } + } + + data->dai_link[HIFI_DAI].cpu_dai_name = dev_name(&cpu_pdev->dev); + data->dai_link[HIFI_DAI].platform_of_node = cpu_np; + + data->card.set_bias_level = imx_wm8958_set_bias_level; + data->card.set_bias_level_post = imx_wm8958_set_bias_level_post; + data->card.dev = &pdev->dev; + ret = snd_soc_of_parse_card_name(&data->card, "model"); + if (ret) + goto fail; + + data->card.num_links = DAI_LINK_NUM; + data->card.dai_link = data->dai_link; + data->card.dapm_widgets = imx_wm8958_dapm_widgets; + data->card.num_dapm_widgets = ARRAY_SIZE(imx_wm8958_dapm_widgets); + + ret = snd_soc_of_parse_audio_routing(&data->card, "audio-routing"); + if (ret) + goto fail; + + platform_set_drvdata(pdev, &data->card); + snd_soc_card_set_drvdata(&data->card, data); + + ret = devm_snd_soc_register_card(&pdev->dev, &data->card); + if (ret) { + dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n", ret); + goto fail; + } + +fail: + of_node_put(cpu_np); + of_node_put(codec_np); + + return ret; +} + +static const struct of_device_id imx_wm8958_dt_ids[] = { + { .compatible = "fsl,imx-audio-wm8958", }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, imx_wm8958_dt_ids); + +static struct platform_driver imx_wm8958_driver = { + .driver = { + .name = "imx-wm8958", + .pm = &snd_soc_pm_ops, + .of_match_table = imx_wm8958_dt_ids, + }, + .probe = imx_wm8958_probe, +}; +module_platform_driver(imx_wm8958_driver); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("Freescale i.MX WM8958 ASoC machine driver"); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:imx-wm8958"); -- 1.9.1

2 4

[alsa-devel] [PATCH] ASoC: da7219: Correct BCLK inversion for DSP DAI format mode
by Adam Thomson 05 Jan '16

05 Jan '16

By default the device latches data on the falling edge of the BCLK in DSP mode, whereas the expectation for normal BCLK is to latch on the rising edge. This updates the driver to invert the BCLK configuration for DSP mode, to align with expected behaviour. Signed-off-by: Adam Thomson <Adam.Thomson.Opensource(a)diasemi.com> --- This patch is based on the following commit: 'ASoC: da7219: Add regmap patch to support old silicon' (Commit abd7c894fc41a9a674354e10ed6c55413e1db077, kernel/git/broonie/sound.git) sound/soc/codecs/da7219.c | 48 ++++++++++++++++++++++++++++++++++++----------- 1 file changed, 37 insertions(+), 11 deletions(-) diff --git a/sound/soc/codecs/da7219.c b/sound/soc/codecs/da7219.c index 341a191..0d7a897 100644 --- a/sound/soc/codecs/da7219.c +++ b/sound/soc/codecs/da7219.c @@ -1156,18 +1156,44 @@ static int da7219_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) return -EINVAL; } - switch (fmt & SND_SOC_DAIFMT_INV_MASK) { - case SND_SOC_DAIFMT_NB_NF: - break; - case SND_SOC_DAIFMT_NB_IF: - dai_clk_mode |= DA7219_DAI_WCLK_POL_INV; - break; - case SND_SOC_DAIFMT_IB_NF: - dai_clk_mode |= DA7219_DAI_CLK_POL_INV; + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + case SND_SOC_DAIFMT_LEFT_J: + case SND_SOC_DAIFMT_RIGHT_J: + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + break; + case SND_SOC_DAIFMT_NB_IF: + dai_clk_mode |= DA7219_DAI_WCLK_POL_INV; + break; + case SND_SOC_DAIFMT_IB_NF: + dai_clk_mode |= DA7219_DAI_CLK_POL_INV; + break; + case SND_SOC_DAIFMT_IB_IF: + dai_clk_mode |= DA7219_DAI_WCLK_POL_INV | + DA7219_DAI_CLK_POL_INV; + break; + default: + return -EINVAL; + } break; - case SND_SOC_DAIFMT_IB_IF: - dai_clk_mode |= DA7219_DAI_WCLK_POL_INV | - DA7219_DAI_CLK_POL_INV; + case SND_SOC_DAIFMT_DSP_B: + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + dai_clk_mode |= DA7219_DAI_CLK_POL_INV; + break; + case SND_SOC_DAIFMT_NB_IF: + dai_clk_mode |= DA7219_DAI_WCLK_POL_INV | + DA7219_DAI_CLK_POL_INV; + break; + case SND_SOC_DAIFMT_IB_NF: + break; + case SND_SOC_DAIFMT_IB_IF: + dai_clk_mode |= DA7219_DAI_WCLK_POL_INV; + break; + default: + return -EINVAL; + } break; default: return -EINVAL; -- 1.9.3

1 0

[alsa-devel] [PATCH 1/2] Revert "ASoC: Intel: Skylake: fix memory leak"
by Vinod Koul 05 Jan '16

05 Jan '16

This reverts commit 87b5ed8ecb9fe05a696e1c0b53c7a49ea66432c1 ("ASoC: Intel: Skylake: fix memory leak") as it causes regression on Skylake devices The SKL drivers can be deferred probe. The topology file based widgets can have references to topology file so this can't be freed until card is fully created, so revert this patch for now [ 66.682767] BUG: unable to handle kernel paging request at ffffc900001363fc [ 66.690735] IP: [<ffffffff806c94dd>] strnlen+0xd/0x40 [ 66.696509] PGD 16e035067 PUD 16e036067 PMD 16e038067 PTE 0 [ 66.702925] Oops: 0000 [#1] PREEMPT SMP [ 66.768390] CPU: 3 PID: 57 Comm: kworker/u16:3 Tainted: G O 4.4.0-rc7-skl #62 [ 66.778869] Hardware name: Intel Corporation Skylake Client platform [ 66.793201] Workqueue: deferwq deferred_probe_work_func [ 66.799173] task: ffff88008b700f40 ti: ffff88008b704000 task.ti: ffff88008b704000 [ 66.807692] RIP: 0010:[<ffffffff806c94dd>] [<ffffffff806c94dd>] strnlen+0xd/0x40 [ 66.816243] RSP: 0018:ffff88008b707878 EFLAGS: 00010286 [ 66.822293] RAX: ffffffff80e60a82 RBX: 000000000000000e RCX: fffffffffffffffe [ 66.830406] RDX: ffffc900001363fc RSI: ffffffffffffffff RDI: ffffc900001363fc [ 66.838520] RBP: ffff88008b707878 R08: 000000000000ffff R09: 000000000000ffff [ 66.846649] R10: 0000000000000001 R11: ffffffffa01c6368 R12: ffffc900001363fc [ 66.854765] R13: 0000000000000000 R14: 00000000ffffffff R15: 0000000000000000 [ 66.862910] FS: 0000000000000000(0000) GS:ffff88016ecc0000(0000) knlGS:0000000000000000 [ 66.872150] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 66.878696] CR2: ffffc900001363fc CR3: 0000000002c09000 CR4: 00000000003406e0 [ 66.886820] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 [ 66.894938] DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 [ 66.903052] Stack: [ 66.905346] ffff88008b7078b0 ffffffff806cb1db 000000000000000e 0000000000000000 [ 66.913854] ffff88008b707928 ffffffffa00d1050 ffffffffa00d104e ffff88008b707918 [ 66.922353] ffffffff806ccbd6 ffff88008b707948 0000000000000046 ffff88008b707940 [ 66.930855] Call Trace: [ 66.933646] [<ffffffff806cb1db>] string.isra.4+0x3b/0xd0 [ 66.939793] [<ffffffff806ccbd6>] vsnprintf+0x116/0x540 [ 66.945742] [<ffffffff806d02f0>] kvasprintf+0x40/0x80 [ 66.951591] [<ffffffff806d0370>] kasprintf+0x40/0x50 [ 66.957359] [<ffffffffa00c085f>] dapm_create_or_share_kcontrol+0x1cf/0x300 [snd_soc_core] [ 66.966771] [<ffffffff8057dd1e>] ? __kmalloc+0x16e/0x2a0 [ 66.972931] [<ffffffffa00c0dab>] snd_soc_dapm_new_widgets+0x41b/0x4b0 [snd_soc_core] [ 66.981857] [<ffffffffa00be8c0>] ? snd_soc_dapm_add_routes+0xb0/0xd0 [snd_soc_core] [ 67.007828] [<ffffffffa00b92ed>] soc_probe_component+0x23d/0x360 [snd_soc_core] [ 67.016244] [<ffffffff80b14e69>] ? mutex_unlock+0x9/0x10 [ 67.022405] [<ffffffffa00ba02f>] snd_soc_instantiate_card+0x47f/0xd10 [snd_soc_core] [ 67.031329] [<ffffffff8049eeb2>] ? debug_mutex_init+0x32/0x40 [ 67.037973] [<ffffffffa00baa92>] snd_soc_register_card+0x1d2/0x2b0 [snd_soc_core] [ 67.046619] [<ffffffffa00c8b54>] devm_snd_soc_register_card+0x44/0x80 [snd_soc_core] [ 67.055539] [<ffffffffa01c303b>] skylake_audio_probe+0x1b/0x20 [snd_soc_skl_rt286] [ 67.064292] [<ffffffff808aa887>] platform_drv_probe+0x37/0x90 Signed-off-by: Vinod Koul <vinod.koul(a)intel.com> --- sound/soc/intel/skylake/skl-topology.c | 1 - 1 file changed, 1 deletion(-) diff --git a/sound/soc/intel/skylake/skl-topology.c b/sound/soc/intel/skylake/skl-topology.c index ffea427aeca8..a7854c8fc523 100644 --- a/sound/soc/intel/skylake/skl-topology.c +++ b/sound/soc/intel/skylake/skl-topology.c @@ -1240,7 +1240,6 @@ int skl_tplg_init(struct snd_soc_platform *platform, struct hdac_ext_bus *ebus) */ ret = snd_soc_tplg_component_load(&platform->component, &skl_tplg_ops, fw, 0); - release_firmware(fw); if (ret < 0) { dev_err(bus->dev, "tplg component load failed%d\n", ret); return -EINVAL; -- 1.9.1

2 7

[alsa-devel] Applied "drm/i915: Unbreak check_digital_port_conflicts()" to the asoc tree
by Mark Brown 05 Jan '16

05 Jan '16

The patch drm/i915: Unbreak check_digital_port_conflicts() has been applied to the asoc tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From ae35b56e367b9fef7f5de701cf8c1c3dd954dded Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala(a)linux.intel.com> Date: Thu, 10 Dec 2015 18:22:31 +0200 Subject: [PATCH] drm/i915: Unbreak check_digital_port_conflicts() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Atomic changes broke check_digital_port_conflicts(). It needs to look at the global situation instead of just trying to find a conflict within the current atomic state. This bug made my HSW explode spectacularly after I had split the DDI encoders into separate DP and HDMI encoders. With the fix, things seem much more solid. I hope holding the connection_mutex is enough protection that we can actually walk the connectors even if they're not part of the current atomic state... v2: Regenerate the patch so that it actually applies (Jani) Cc: stable(a)vger.kernel.org Cc: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira(a)intel.com> Fixes: 5448a00d3f06 ("drm/i915: Don't use staged config in check_digital_port_conflicts()") Signed-off-by: Ville Syrjälä <ville.syrjala(a)linux.intel.com> Reviewed-by: Daniel Vetter <daniel.vetter(a)ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1449764551-12466-1-git-send-em… (cherry picked from commit 0bff4858653312a10c83709e0009c3adb87e6f1e) Signed-off-by: Jani Nikula <jani.nikula(a)intel.com> --- drivers/gpu/drm/i915/intel_display.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index beb0374a19f1..32cf97346978 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -12123,18 +12123,22 @@ static void intel_dump_pipe_config(struct intel_crtc *crtc, static bool check_digital_port_conflicts(struct drm_atomic_state *state) { struct drm_device *dev = state->dev; - struct intel_encoder *encoder; struct drm_connector *connector; - struct drm_connector_state *connector_state; unsigned int used_ports = 0; - int i; /* * Walk the connector list instead of the encoder * list to detect the problem on ddi platforms * where there's just one encoder per digital port. */ - for_each_connector_in_state(state, connector, connector_state, i) { + drm_for_each_connector(connector, dev) { + struct drm_connector_state *connector_state; + struct intel_encoder *encoder; + + connector_state = drm_atomic_get_existing_connector_state(state, connector); + if (!connector_state) + connector_state = connector->state; + if (!connector_state->best_encoder) continue; -- 2.6.2

1 0

[alsa-devel] Applied "drm/i915: increase the tries for HDMI hotplug live status checking" to the asoc tree
by Mark Brown 05 Jan '16

05 Jan '16

The patch drm/i915: increase the tries for HDMI hotplug live status checking has been applied to the asoc tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From 3d8acd1f667b45c531401c8f0c2033072e32a05d Mon Sep 17 00:00:00 2001 From: Gary Wang <gary.c.wang(a)intel.com> Date: Wed, 23 Dec 2015 16:11:35 +0800 Subject: [PATCH] drm/i915: increase the tries for HDMI hotplug live status checking The total delay of HDMI hotplug detecting with 30ms is sometimes not enoughtfor HDMI live status up with specific HDMI monitors in BSW platform. After doing experiments for following monitors, it needs 80ms at least for those worst cases. Lenovo L246 1xwA (4 failed, necessary hot-plug delay: 58/40/60/40ms) Philips HH2AP (9 failed, necessary hot-plug delay: 80/50/50/60/46/40/58/58/39ms) BENQ ET-0035-N (6 failed, necessary hot-plug delay: 60/50/50/80/80/40ms) DELL U2713HM (2 failed, necessary hot-plug delay: 58/59ms) HP HP-LP2475w (5 failed, necessary hot-plug delay: 70/50/40/60/40ms) It looks like 70-80 ms is BSW platform needs in some bad cases of the monitors at this end (8 times delay at most). Keep less than 100ms for HDCP pulse HPD low (with at least 100ms) to respond a plug out. Reviewed-by: Cooper Chiou <cooper.chiou(a)intel.com> Tested-by: Gary Wang <gary.c.wang(a)intel.com> Cc: Gavin Hindman <gavin.hindman(a)intel.com> Cc: Sonika Jindal <sonika.jindal(a)intel.com> Cc: Shashank Sharma <shashank.sharma(a)intel.com> Cc: Shobhit Kumar <shobhit.kumar(a)intel.com> Signed-off-by: Gary Wang <gary.c.wang(a)intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1450858295-12804-1-git-send-em… Tested-by: Shobhit Kumar <shobhit.kumar(a)intel.com> Cc: drm-intel-fixes(a)lists.freedesktop.org Fixes: 237ed86c693d ("drm/i915: Check live status before reading edid") Signed-off-by: Daniel Vetter <daniel.vetter(a)ffwll.ch> (cherry picked from commit f8d03ea0053b23de42c828d559016eabe0b91523) [Jani: undo the file mode change of the original commit] Signed-off-by: Jani Nikula <jani.nikula(a)intel.com> --- drivers/gpu/drm/i915/intel_hdmi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index 64086f2d4e26..e6c035b0fc1c 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c @@ -1381,7 +1381,7 @@ intel_hdmi_detect(struct drm_connector *connector, bool force) intel_display_power_get(dev_priv, POWER_DOMAIN_GMBUS); - for (try = 0; !live_status && try < 4; try++) { + for (try = 0; !live_status && try < 9; try++) { if (try) msleep(10); live_status = intel_digital_port_connected(dev_priv, -- 2.6.2

1 0

[alsa-devel] Applied "MIPS: VDSO: Fix build error with binutils 2.24 and earlier" to the asoc tree
by Mark Brown 05 Jan '16

05 Jan '16

The patch MIPS: VDSO: Fix build error with binutils 2.24 and earlier has been applied to the asoc tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From 398c7500a1f5f74e207bd2edca1b1721b3cc1f1e Mon Sep 17 00:00:00 2001 From: Guenter Roeck <linux(a)roeck-us.net> Date: Wed, 23 Dec 2015 21:04:31 -0800 Subject: [PATCH] MIPS: VDSO: Fix build error with binutils 2.24 and earlier Commit 2a037f310bab ("MIPS: VDSO: Fix build error") tries to fix a build error seen with binutils 2.24 and earlier. However, the fix does not work, and again results in the already known build errors if the kernel is built with an earlier version of binutils. CC arch/mips/vdso/gettimeofday.o /tmp/ccnOVbHT.s: Assembler messages: /tmp/ccnOVbHT.s:50: Error: can't resolve `_start' {*UND* section} - `L0 {.text section} /tmp/ccnOVbHT.s:374: Error: can't resolve `_start' {*UND* section} - `L0 {.text section} scripts/Makefile.build:258: recipe for target 'arch/mips/vdso/gettimeofday.o' failed make[2]: *** [arch/mips/vdso/gettimeofday.o] Error 1 Fixes: 2a037f310bab ("MIPS: VDSO: Fix build error") Cc: Qais Yousef <qais.yousef(a)imgtec.com> Cc: linux-mips(a)linux-mips.org Cc: linux-kernel(a)vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/11926/ Signed-off-by: Guenter Roeck <linux(a)roeck-us.net> Signed-off-by: Ralf Baechle <ralf(a)linux-mips.org> --- arch/mips/vdso/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/vdso/Makefile b/arch/mips/vdso/Makefile index 018f8c7b94f2..14568900fc1d 100644 --- a/arch/mips/vdso/Makefile +++ b/arch/mips/vdso/Makefile @@ -26,7 +26,7 @@ aflags-vdso := $(ccflags-vdso) \ # the comments on that file. # ifndef CONFIG_CPU_MIPSR6 - ifeq ($(call ld-ifversion, -lt, 22500000, y),) + ifeq ($(call ld-ifversion, -lt, 22500000, y),y) $(warning MIPS VDSO requires binutils >= 2.25) obj-vdso-y := $(filter-out gettimeofday.o, $(obj-vdso-y)) ccflags-vdso += -DDISABLE_MIPS_VDSO -- 2.6.2

1 0

[alsa-devel] [PATCH] ASoC: rt5645: improve IRQ reaction time for HS button
by Bard Liao 05 Jan '16

05 Jan '16

IRQ reaction time is not immediate when headset putton is pressed. This patch shortens the reaction time. Signed-off-by: John Lin <john.lin(a)realtek.com> Signed-off-by: Bard Liao <bardliao(a)realtek.com> --- sound/soc/codecs/rt5645.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/soc/codecs/rt5645.c b/sound/soc/codecs/rt5645.c index 72d3ca5..c61d38b 100644 --- a/sound/soc/codecs/rt5645.c +++ b/sound/soc/codecs/rt5645.c @@ -3066,6 +3066,7 @@ static void rt5645_enable_push_button_irq(struct snd_soc_codec *codec, snd_soc_dapm_force_enable_pin(dapm, "ADC R power"); snd_soc_dapm_sync(dapm); + snd_soc_update_bits(codec, RT5650_4BTN_IL_CMD1, 0x3, 0x3); snd_soc_update_bits(codec, RT5645_INT_IRQ_ST, 0x8, 0x8); snd_soc_update_bits(codec, -- 1.8.1.1.439.g50a6b54

2 1

[alsa-devel] [PATCH 1/4] ALSA: core: use dev_to_snd_card
by Geliang Tang 05 Jan '16

05 Jan '16

Use dev_to_snd_card() instead of open-coding it. Signed-off-by: Geliang Tang <geliangtang(a)163.com> --- sound/core/init.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/sound/core/init.c b/sound/core/init.c index 20f37fb..fcb84e1 100644 --- a/sound/core/init.c +++ b/sound/core/init.c @@ -639,7 +639,7 @@ static ssize_t card_id_show_attr(struct device *dev, struct device_attribute *attr, char *buf) { - struct snd_card *card = container_of(dev, struct snd_card, card_dev); + struct snd_card *card = dev_to_snd_card(dev); return snprintf(buf, PAGE_SIZE, "%s\n", card->id); } @@ -647,7 +647,7 @@ static ssize_t card_id_store_attr(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { - struct snd_card *card = container_of(dev, struct snd_card, card_dev); + struct snd_card *card = dev_to_snd_card(dev); char buf1[sizeof(card->id)]; size_t copy = count > sizeof(card->id) - 1 ? sizeof(card->id) - 1 : count; @@ -679,7 +679,7 @@ static ssize_t card_number_show_attr(struct device *dev, struct device_attribute *attr, char *buf) { - struct snd_card *card = container_of(dev, struct snd_card, card_dev); + struct snd_card *card = dev_to_snd_card(dev); return snprintf(buf, PAGE_SIZE, "%i\n", card->number); } -- 2.5.0

3 8

[alsa-devel] [PATCH 0/4] ASoC: core: Update for DSP systems
by Vinod Koul 04 Jan '16

04 Jan '16

This patch series tried to do two things 1. Add support to have cpu based loopback dai_links supported, so the CPU based DSPs can have non hostless streams 2. Add kcontrol to bytes tlv callbacks and fix the topology core info callback for TLV byte controls Comments welcome... Jeeja KP (1): ASoC: core: Adds support for cpu loopback dai_link Mythri P K (1): ASoC: core: Pass kcontrol to bytes tlv callbacks Omair M Abdullah (1): ASoC: topology: fix info callback for TLV byte control Vinod Koul (1): ASoC: core: refactor soc_link_dai_widgets() include/sound/soc-topology.h | 6 ++++-- include/sound/soc.h | 9 +++++++-- sound/soc/soc-core.c | 38 +++++++++++++++++++++++++------------- sound/soc/soc-ops.c | 4 ++-- sound/soc/soc-topology.c | 2 +- 5 files changed, 39 insertions(+), 20 deletions(-) -- 1.9.1

2 18

[alsa-devel] [PATCH v4 REPOST 00/14] ASoC: hdac_hdmi: Add DP & notification support
by Subhransu S. Prusty 04 Jan '16

04 Jan '16

This patch series adds DP audio and hotplug notification support. On Skylake two DP ports are available and to enable DP on both ports all pins need to be enabled. There is a special vendor widget which need to be programmed to enable all pins and converters. This series adds hotplug notification, read/set constraint based on ELD, enable all pin/cvts, DP1.2, programs the audio infoframe for DP. There is a one to one mapping between converter and stream, so the dais are created based on the no of streams supported on hdmi codec. Even though cvts can be mapped dynamically to the streams, currently it is statically mapped as simultaneous playback on both DP and HDMI is not supported as of now. Pin muxes and controls are created dynamically to map converter to pin widget. So at run time specific pin is mapped to the dai based on the control selected (based on the display type DP/HDMI connected). Finally the DP audio infoframe programming is added to support the DP feature. Also with hotplug notification support, ELD is read and capabilities are set for rate, formats and channels. drm_eld sound/core framework is updated to limit the formats based on ELD. There are few fixes one fixing the static checker warning and other one not to fail if no connection list is found for a pin widget. Pls note, the 10th patch is adding a small macro for getting connection type in drm header, we have CCed drm folks on that and this one. Pls ack so that we can have this series merged thru sound trees changes in v4: - Added NULL check - Dropped the Jack reporting patch for now. Cc: Jani Nikula <jani.nikula(a)intel.com> Cc: David Airlie <airlied(a)linux.ie> Cc: dri-devel(a)lists.freedesktop.org Cc: Daniel Vetter <daniel.vetter(a)intel.com> Jeeja KP (2): ASoC: hdac_hdmi: Add codec suspend/resume handler ASoC: hdac_hdmi: Fix to enable device configuration in hw_params Ramesh Babu (1): ASoC: hdac_hdmi: Fix to keep display active while enumerating codec Subhransu S. Prusty (11): ASoC: hdac_hdmi: Fix to check num nodes correctly ASoC: hdac_hdmi: Fix to warn instead of err for no connected nids ASoC: hdac_hdmi: Use list to add pins and converters ASoC: hdac_hdmi: Add hotplug notification and read eld ASoC: hdac_hdmi: Apply constraints based on ELD ASoC: hdac_hdmi: Enable DP1.2 and all converters/pins ASoC: hdac_hdmi: create dais based on number of streams ASoC: hdac_hdmi: Create widget/route based on nodes enumerated ASoC: hdac_hdmi: Assign pin for stream based on dapm connection drm/edid: Add API to help find connection type ASoC: hdac_hdmi: Add infoframe support for dp audio include/drm/drm_edid.h | 12 + sound/soc/codecs/Kconfig | 1 + sound/soc/codecs/hdac_hdmi.c | 1116 +++++++++++++++++++++++++++++++++++------- 3 files changed, 951 insertions(+), 178 deletions(-) -- 1.9.1

1 14

[alsa-devel] How to set a new name on rawmidi?
by Daniel Viksporre 03 Jan '16

03 Jan '16

Hi! I opened a MIDI connection with... snd_rawmidi_open(&read_handle, &write_handle, "virtual", 0); But how do i set a useful name on it, that can be seen in other programs? // Daniel

2 1

[alsa-devel] [PATCH] ALSA: dummy: constify dummy_timer_ops structures
by Julia Lawall 30 Dec '15

30 Dec '15

The dummy_timer_ops structures are never modified, so declare them as const. Done with the help of Coccinelle. Signed-off-by: Julia Lawall <Julia.Lawall(a)lip6.fr> --- sound/drivers/dummy.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/drivers/dummy.c b/sound/drivers/dummy.c index 016e451..75b7485 100644 --- a/sound/drivers/dummy.c +++ b/sound/drivers/dummy.c @@ -351,7 +351,7 @@ static void dummy_systimer_free(struct snd_pcm_substream *substream) kfree(substream->runtime->private_data); } -static struct dummy_timer_ops dummy_systimer_ops = { +static const struct dummy_timer_ops dummy_systimer_ops = { .create = dummy_systimer_create, .free = dummy_systimer_free, .prepare = dummy_systimer_prepare, @@ -475,7 +475,7 @@ static void dummy_hrtimer_free(struct snd_pcm_substream *substream) kfree(dpcm); } -static struct dummy_timer_ops dummy_hrtimer_ops = { +static const struct dummy_timer_ops dummy_hrtimer_ops = { .create = dummy_hrtimer_create, .free = dummy_hrtimer_free, .prepare = dummy_hrtimer_prepare,

2 1

[alsa-devel] [PATCH] ALSA: cs5535audio: constify cs5535audio_dma_ops structures
by Julia Lawall 30 Dec '15

30 Dec '15

The cs5535audio_dma_ops structures are never modified, so declare them as const. Done with the help of Coccinelle. Signed-off-by: Julia Lawall <Julia.Lawall(a)lip6.fr> --- sound/pci/cs5535audio/cs5535audio_pcm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/pci/cs5535audio/cs5535audio_pcm.c b/sound/pci/cs5535audio/cs5535audio_pcm.c index 9c2dc91..27fa57d 100644 --- a/sound/pci/cs5535audio/cs5535audio_pcm.c +++ b/sound/pci/cs5535audio/cs5535audio_pcm.c @@ -402,7 +402,7 @@ static struct snd_pcm_ops snd_cs5535audio_capture_ops = { .pointer = snd_cs5535audio_pcm_pointer, }; -static struct cs5535audio_dma_ops snd_cs5535audio_playback_dma_ops = { +static const struct cs5535audio_dma_ops snd_cs5535audio_playback_dma_ops = { .type = CS5535AUDIO_DMA_PLAYBACK, .enable_dma = cs5535audio_playback_enable_dma, .disable_dma = cs5535audio_playback_disable_dma, @@ -412,7 +412,7 @@ static struct cs5535audio_dma_ops snd_cs5535audio_playback_dma_ops = { .read_dma_pntr = cs5535audio_playback_read_dma_pntr, }; -static struct cs5535audio_dma_ops snd_cs5535audio_capture_dma_ops = { +static const struct cs5535audio_dma_ops snd_cs5535audio_capture_dma_ops = { .type = CS5535AUDIO_DMA_CAPTURE, .enable_dma = cs5535audio_capture_enable_dma, .disable_dma = cs5535audio_capture_disable_dma,

2 1

[alsa-devel] [PATCH] ALSA: atiixp: constify atiixp_dma_ops structures
by Julia Lawall 30 Dec '15

30 Dec '15

The atiixp_dma_ops structures are never modified, so declare them as const. Done with the help of Coccinelle. Signed-off-by: Julia Lawall <Julia.Lawall(a)lip6.fr> --- sound/pci/atiixp.c | 6 +++--- sound/pci/atiixp_modem.c | 4 ++-- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/sound/pci/atiixp.c b/sound/pci/atiixp.c index 1028fc8..2ce0022 100644 --- a/sound/pci/atiixp.c +++ b/sound/pci/atiixp.c @@ -1219,7 +1219,7 @@ static struct ac97_pcm atiixp_pcm_defs[] = { }, }; -static struct atiixp_dma_ops snd_atiixp_playback_dma_ops = { +static const struct atiixp_dma_ops snd_atiixp_playback_dma_ops = { .type = ATI_DMA_PLAYBACK, .llp_offset = ATI_REG_OUT_DMA_LINKPTR, .dt_cur = ATI_REG_OUT_DMA_DT_CUR, @@ -1228,7 +1228,7 @@ static struct atiixp_dma_ops snd_atiixp_playback_dma_ops = { .flush_dma = atiixp_out_flush_dma, }; -static struct atiixp_dma_ops snd_atiixp_capture_dma_ops = { +static const struct atiixp_dma_ops snd_atiixp_capture_dma_ops = { .type = ATI_DMA_CAPTURE, .llp_offset = ATI_REG_IN_DMA_LINKPTR, .dt_cur = ATI_REG_IN_DMA_DT_CUR, @@ -1237,7 +1237,7 @@ static struct atiixp_dma_ops snd_atiixp_capture_dma_ops = { .flush_dma = atiixp_in_flush_dma, }; -static struct atiixp_dma_ops snd_atiixp_spdif_dma_ops = { +static const struct atiixp_dma_ops snd_atiixp_spdif_dma_ops = { .type = ATI_DMA_SPDIF, .llp_offset = ATI_REG_SPDF_DMA_LINKPTR, .dt_cur = ATI_REG_SPDF_DMA_DT_CUR, diff --git a/sound/pci/atiixp_modem.c b/sound/pci/atiixp_modem.c index 27ed678..c534552 100644 --- a/sound/pci/atiixp_modem.c +++ b/sound/pci/atiixp_modem.c @@ -970,7 +970,7 @@ static struct snd_pcm_ops snd_atiixp_capture_ops = { .pointer = snd_atiixp_pcm_pointer, }; -static struct atiixp_dma_ops snd_atiixp_playback_dma_ops = { +static const struct atiixp_dma_ops snd_atiixp_playback_dma_ops = { .type = ATI_DMA_PLAYBACK, .llp_offset = ATI_REG_MODEM_OUT_DMA1_LINKPTR, .dt_cur = ATI_REG_MODEM_OUT_DMA1_DT_CUR, @@ -979,7 +979,7 @@ static struct atiixp_dma_ops snd_atiixp_playback_dma_ops = { .flush_dma = atiixp_out_flush_dma, }; -static struct atiixp_dma_ops snd_atiixp_capture_dma_ops = { +static const struct atiixp_dma_ops snd_atiixp_capture_dma_ops = { .type = ATI_DMA_CAPTURE, .llp_offset = ATI_REG_MODEM_IN_DMA_LINKPTR, .dt_cur = ATI_REG_MODEM_IN_DMA_DT_CUR,

2 1

[alsa-devel] [PATCH 1/2] ASoC: rt5645: use polling to support HS button
by Bard Liao 30 Dec '15

30 Dec '15

The IRQ pin will keep high when the headset button is pressed. And keep low when the headset button is released. So, we need irq trigger at both edges. However, some platform can't support it. Therefore, we polling the register to report the button release event once a button presse event is received. To support the headset button detection function for those can't support both edges trigger platforms, we also need to invert the polarity of jack detection irq since we need to keep the IRQ pin low in normal case. Signed-off-by: John Lin <john.lin(a)realtek.com> Signed-off-by: Bard Liao <bardliao(a)realtek.com> --- sound/soc/codecs/rt5645.c | 26 ++++++++++++++++++++++++-- 1 file changed, 24 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/rt5645.c b/sound/soc/codecs/rt5645.c index 3e8d666..57c8d9e 100644 --- a/sound/soc/codecs/rt5645.c +++ b/sound/soc/codecs/rt5645.c @@ -405,6 +405,7 @@ struct rt5645_priv { struct delayed_work jack_detect_work, rcclock_work; struct regulator_bulk_data supplies[ARRAY_SIZE(rt5645_supply_names)]; struct rt5645_eq_param_s *eq_param; + struct timer_list btn_check_timer; int codec_type; int sysclk; @@ -3130,7 +3131,7 @@ static int rt5645_jack_detect(struct snd_soc_codec *codec, int jack_insert) } if (rt5645->pdata.jd_invert) regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2, - RT5645_JD_1_1_MASK, RT5645_JD_1_1_INV); + RT5645_JD_1_1_MASK, RT5645_JD_1_1_NOR); } else { /* jack out */ rt5645->jack_type = 0; @@ -3151,7 +3152,7 @@ static int rt5645_jack_detect(struct snd_soc_codec *codec, int jack_insert) snd_soc_dapm_sync(dapm); if (rt5645->pdata.jd_invert) regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2, - RT5645_JD_1_1_MASK, RT5645_JD_1_1_NOR); + RT5645_JD_1_1_MASK, RT5645_JD_1_1_INV); } return rt5645->jack_type; @@ -3275,6 +3276,12 @@ static void rt5645_jack_detect_work(struct work_struct *work) } if (btn_type == 0)/* button release */ report = rt5645->jack_type; + else { + if (rt5645->pdata.jd_invert) { + mod_timer(&rt5645->btn_check_timer, + msecs_to_jiffies(100)); + } + } break; /* jack out */ @@ -3317,6 +3324,14 @@ static irqreturn_t rt5645_irq(int irq, void *data) return IRQ_HANDLED; } +static void rt5645_btn_check_callback(unsigned long data) +{ + struct rt5645_priv *rt5645 = (struct rt5645_priv *)data; + + queue_delayed_work(system_power_efficient_wq, + &rt5645->jack_detect_work, msecs_to_jiffies(5)); +} + static int rt5645_probe(struct snd_soc_codec *codec) { struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); @@ -3783,6 +3798,13 @@ static int rt5645_i2c_probe(struct i2c_client *i2c, } } + if (rt5645->pdata.jd_invert) { + regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2, + RT5645_JD_1_1_MASK, RT5645_JD_1_1_INV); + setup_timer(&rt5645->btn_check_timer, + rt5645_btn_check_callback, (unsigned long)rt5645); + } + INIT_DELAYED_WORK(&rt5645->jack_detect_work, rt5645_jack_detect_work); INIT_DELAYED_WORK(&rt5645->rcclock_work, rt5645_rcclock_work); -- 1.8.1.1.439.g50a6b54

2 3

[alsa-devel] [PATCH 1/2] ASoC: Use nested lock for snd_soc_dapm_mutex_lock
by Charles Keepax 30 Dec '15

30 Dec '15

snd_soc_dapm_mutex_lock currently uses the un-nested call which can cause lockdep warnings when called from control handlers (a relatively common usage) and using modules. As creating the control causes a potential mutex inversion with the handler, creating the control will take the controls_rwsem under the dapm_mutex and accessing the control will take the dapm_mutex under controls_rwsem. All the users look like they want to be using the runtime class of the lock anyway, so this patch just changes snd_soc_dapm_mutex_lock to use the nested call, with the SND_SOC_DAPM_CLASS_RUNTIME class. Fixes: f6d5e586b416 ("ASoC: dapm: Add helpers to lock/unlock DAPM mutex") Signed-off-by: Charles Keepax <ckeepax(a)opensource.wolfsonmicro.com> --- include/sound/soc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/sound/soc.h b/include/sound/soc.h index a2deeb9..aae55d0 100644 --- a/include/sound/soc.h +++ b/include/sound/soc.h @@ -1687,7 +1687,7 @@ extern const struct dev_pm_ops snd_soc_pm_ops; /* Helper functions */ static inline void snd_soc_dapm_mutex_lock(struct snd_soc_dapm_context *dapm) { - mutex_lock(&dapm->card->dapm_mutex); + mutex_lock_nested(&dapm->card->dapm_mutex, SND_SOC_DAPM_CLASS_RUNTIME); } static inline void snd_soc_dapm_mutex_unlock(struct snd_soc_dapm_context *dapm) -- 2.1.4

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[alsa-devel] [PATCH] ASoC: rsnd: fix usrcnt decrementing bug
by Andrzej Hajda 30 Dec '15

30 Dec '15

Field usrcnt is unsigned so it cannot be lesser than zero. The problem has been detected using proposed semantic patch scripts/coccinelle/tests/unsigned_lesser_than_zero.cocci [1]. [1]: http://permalink.gmane.org/gmane.linux.kernel/2038576 Signed-off-by: Andrzej Hajda <a.hajda(a)samsung.com> --- sound/soc/sh/rcar/ssi.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/sound/soc/sh/rcar/ssi.c b/sound/soc/sh/rcar/ssi.c index 0b91692..8ca30fd 100644 --- a/sound/soc/sh/rcar/ssi.c +++ b/sound/soc/sh/rcar/ssi.c @@ -381,9 +381,9 @@ rsnd_ssi_quit_end: rsnd_mod_power_off(mod); - ssi->usrcnt--; - - if (ssi->usrcnt < 0) + if (ssi->usrcnt > 0) + ssi->usrcnt--; + else dev_err(dev, "%s[%d] usrcnt error\n", rsnd_mod_name(mod), rsnd_mod_id(mod)); -- 1.9.1

3 7

[alsa-devel] [PATCH] ASoC: arizona: Exit startup early if no runtime
by Charles Keepax 30 Dec '15

30 Dec '15

commit 9b8ef9f6b3fc ("ASoC: dapm: Add startup & shutdown for dai_links") Added support for calling startup on CODEC to CODEC links, however this is called with a NULL runtime pointer. There isn't really a sensible way to pass a valid runtime pointer to a CODEC to CODEC link at the moment, so we need to make the startup function safe for NULL runtimes. This patch returns from the Arizona startup function early if there is no runtime. Signed-off-by: Charles Keepax <ckeepax(a)opensource.wolfsonmicro.com> --- I will fixup the other users as well if everyone is happy with this approach? Thanks, Charles sound/soc/codecs/arizona.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 38a73e3..88e2c74 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1494,6 +1494,9 @@ static int arizona_startup(struct snd_pcm_substream *substream, const struct snd_pcm_hw_constraint_list *constraint; unsigned int base_rate; + if (!substream->runtime) + return 0; + switch (dai_priv->clk) { case ARIZONA_CLK_SYSCLK: base_rate = priv->sysclk; -- 2.1.4

2 3

[alsa-devel] [PATCH 0/5 v4] ALSA: dice: improve card registration processing
by Takashi Sakamoto 30 Dec '15

30 Dec '15

Hi, This patchset updates my previous one: [alsa-devel] [PATCH 0/5 v3] ALSA: dice: improve card registration processing http://mailman.alsa-project.org/pipermail/alsa-devel/2015-December/102501.h… The patch 02 included a bug of missing 'end' tag. This v4 patchset includes fixes of the bug. Additionally, this patchset adds to output information message when registration work encounters any errors. Furthermore, I use mod_delayed_work() to queue and postpone work for sound card registration. I've reported system freeze in previous patchset, but I had a mistake not to use any actual workqueus as a first argument of the function. Takashi Sakamoto (5): ALSA: dice: split subaddress check from category check ALSA: dice: postpone card registration ALSA: dice: ensure to release sound devices after sound card registration fails ALSA: dice: purge transaction initialization at timeout of Dice notification ALSA: dice: expand timeout to wait for Dice notification sound/firewire/dice/dice-midi.c | 2 + sound/firewire/dice/dice-pcm.c | 2 + sound/firewire/dice/dice-transaction.c | 122 ++++++++++++-------- sound/firewire/dice/dice.c | 197 +++++++++++++++++---------------- sound/firewire/dice/dice.h | 5 + 5 files changed, 189 insertions(+), 139 deletions(-) -- 2.5.0

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[alsa-devel] Rawmidi
by Daniel Viksporre 29 Dec '15

29 Dec '15

I cant compile example programs that use rawmidi. When I look on my harddrive, I have many rawmidi.h files, but since 2015 they are all 0 bytes. Can that be the reason I cant compile. But why is those files 0 bytes from the repository Im using? I get the following error messages... test.c:(.text+0x507): undefined reference to `snd_rawmidi_open' test.c:(.text+0x5d8): undefined reference to `snd_rawmidi_open' test.c:(.text+0x75e): undefined reference to `snd_rawmidi_read' test.c:(.text+0x846): undefined reference to `snd_rawmidi_write' test.c:(.text+0x867): undefined reference to `snd_rawmidi_write' test.c:(.text+0x888): undefined reference to `snd_rawmidi_write' test.c:(.text+0x894): undefined reference to `snd_rawmidi_drain' test.c:(.text+0x8c1): undefined reference to `snd_rawmidi_write' test.c:(.text+0x8e2): undefined reference to `snd_rawmidi_write' test.c:(.text+0x903): undefined reference to `snd_rawmidi_write' test.c:(.text+0x90f): undefined reference to `snd_rawmidi_drain' test.c:(.text+0xa71): undefined reference to `snd_rawmidi_read' test.c:(.text+0xae0): undefined reference to `snd_rawmidi_write' test.c:(.text+0xaec): undefined reference to `snd_rawmidi_drain' test.c:(.text+0xb8f): undefined reference to `snd_rawmidi_drain' test.c:(.text+0xb9b): undefined reference to `snd_rawmidi_close' test.c:(.text+0xbaf): undefined reference to `snd_rawmidi_drain' test.c:(.text+0xbbb): undefined reference to `snd_rawmidi_close'

4 6

[alsa-devel] [PATCH] ASoC: arizona: Exit startup early if no runtime
by Charles Keepax 29 Dec '15

29 Dec '15

commit 9b8ef9f6b3fc ("ASoC: dapm: Add startup & shutdown for dai_links") Added support for calling startup on CODEC to CODEC links, however this is called with a NULL runtime pointer. There isn't really a sensible way to pass a valid runtime pointer to a CODEC to CODEC link at the moment, so we need to make the startup function safe for NULL runtimes. This patch returns from the Arizona startup function early if there is no runtime, this is perfectly safe as all the startup function does is set the PCM constraints for user-space which arn't relevant to a CODEC to CODEC link anyway. Signed-off-by: Charles Keepax <ckeepax(a)opensource.wolfsonmicro.com> --- sound/soc/codecs/arizona.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index fb8f188..33143fe 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1494,6 +1494,9 @@ static int arizona_startup(struct snd_pcm_substream *substream, const struct snd_pcm_hw_constraint_list *constraint; unsigned int base_rate; + if (!substream->runtime) + return 0; + switch (dai_priv->clk) { case ARIZONA_CLK_SYSCLK: base_rate = priv->sysclk; -- 2.1.4

1 0

[alsa-devel] [PATCH v2 1/2] ALSA: hda - Add mic mute hotkey quirk for Lenovo ThinkCentre AIO
by Hui Wang 29 Dec '15

29 Dec '15

From: Kailang <kailang(a)realtek.com> The Lenovo ThinkCenter AIO uses Line2 (NID 0x1b) to implement the micmute hotkey, here we register an input device and use Line2 unsol event to collect the hotkey pressing or releasing. In the meanwhile, the micmute led is controlled by GPIO2, so we use an existing function alc_fixup_gpio_mic_mute_hook() to control the led. [Hui: And there are two places to register the input device, to make the code simple and clean, move the two same code sections into a function.] Cc: <stable(a)vger.kernel.org> Signed-off-by: Kailang <kailang(a)realtek.com> Signed-off-by: Hui Wang <hui.wang(a)canonical.com> --- sound/pci/hda/patch_realtek.c | 84 ++++++++++++++++++++++++++++++++++++------- 1 file changed, 71 insertions(+), 13 deletions(-) diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index fe96428..257b839 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -3468,6 +3468,29 @@ static void gpio2_mic_hotkey_event(struct hda_codec *codec, input_sync(spec->kb_dev); } +static int alc_register_micmute_input_device(struct hda_codec *codec) +{ + struct alc_spec *spec = codec->spec; + + spec->kb_dev = input_allocate_device(); + if (!spec->kb_dev) { + codec_err(codec, "Out of memory (input_allocate_device)\n"); + return -ENOMEM; + } + spec->kb_dev->name = "Microphone Mute Button"; + spec->kb_dev->evbit[0] = BIT_MASK(EV_KEY); + spec->kb_dev->keybit[BIT_WORD(KEY_MICMUTE)] = BIT_MASK(KEY_MICMUTE); + + if (input_register_device(spec->kb_dev)) { + codec_err(codec, "input_register_device failed\n"); + input_free_device(spec->kb_dev); + spec->kb_dev = NULL; + return -ENOMEM; + } + + return 0; +} + static void alc280_fixup_hp_gpio2_mic_hotkey(struct hda_codec *codec, const struct hda_fixup *fix, int action) { @@ -3485,20 +3508,8 @@ static void alc280_fixup_hp_gpio2_mic_hotkey(struct hda_codec *codec, struct alc_spec *spec = codec->spec; if (action == HDA_FIXUP_ACT_PRE_PROBE) { - spec->kb_dev = input_allocate_device(); - if (!spec->kb_dev) { - codec_err(codec, "Out of memory (input_allocate_device)\n"); + if (alc_register_micmute_input_device(codec) != 0) return; - } - spec->kb_dev->name = "Microphone Mute Button"; - spec->kb_dev->evbit[0] = BIT_MASK(EV_KEY); - spec->kb_dev->keybit[BIT_WORD(KEY_MICMUTE)] = BIT_MASK(KEY_MICMUTE); - if (input_register_device(spec->kb_dev)) { - codec_err(codec, "input_register_device failed\n"); - input_free_device(spec->kb_dev); - spec->kb_dev = NULL; - return; - } snd_hda_add_verbs(codec, gpio_init); snd_hda_codec_write_cache(codec, codec->core.afg, 0, @@ -3528,6 +3539,47 @@ static void alc280_fixup_hp_gpio2_mic_hotkey(struct hda_codec *codec, } } +static void alc233_fixup_lenovo_line2_mic_hotkey(struct hda_codec *codec, + const struct hda_fixup *fix, int action) +{ + /* Line2 = mic mute hotkey + GPIO2 = mic mute LED */ + static const struct hda_verb gpio_init[] = { + { 0x01, AC_VERB_SET_GPIO_MASK, 0x04 }, + { 0x01, AC_VERB_SET_GPIO_DIRECTION, 0x04 }, + {} + }; + + struct alc_spec *spec = codec->spec; + + if (action == HDA_FIXUP_ACT_PRE_PROBE) { + if (alc_register_micmute_input_device(codec) != 0) + return; + + snd_hda_add_verbs(codec, gpio_init); + snd_hda_jack_detect_enable_callback(codec, 0x1b, + gpio2_mic_hotkey_event); + + spec->gen.cap_sync_hook = alc_fixup_gpio_mic_mute_hook; + spec->gpio_led = 0; + spec->mute_led_polarity = 0; + spec->gpio_mic_led_mask = 0x04; + return; + } + + if (!spec->kb_dev) + return; + + switch (action) { + case HDA_FIXUP_ACT_PROBE: + spec->init_amp = ALC_INIT_DEFAULT; + break; + case HDA_FIXUP_ACT_FREE: + input_unregister_device(spec->kb_dev); + spec->kb_dev = NULL; + } +} + static void alc269_fixup_hp_line1_mic1_led(struct hda_codec *codec, const struct hda_fixup *fix, int action) { @@ -4628,6 +4680,7 @@ enum { ALC275_FIXUP_DELL_XPS, ALC256_FIXUP_DELL_XPS_13_HEADPHONE_NOISE, ALC293_FIXUP_LENOVO_SPK_NOISE, + ALC233_FIXUP_LENOVO_LINE2_MIC_HOTKEY, }; static const struct hda_fixup alc269_fixups[] = { @@ -5237,6 +5290,10 @@ static const struct hda_fixup alc269_fixups[] = { .chained = true, .chain_id = ALC269_FIXUP_THINKPAD_ACPI }, + [ALC233_FIXUP_LENOVO_LINE2_MIC_HOTKEY] = { + .type = HDA_FIXUP_FUNC, + .v.func = alc233_fixup_lenovo_line2_mic_hotkey, + }, }; static const struct snd_pci_quirk alc269_fixup_tbl[] = { @@ -5386,6 +5443,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { SND_PCI_QUIRK(0x17aa, 0x2223, "ThinkPad T550", ALC292_FIXUP_TPT440_DOCK), SND_PCI_QUIRK(0x17aa, 0x2226, "ThinkPad X250", ALC292_FIXUP_TPT440_DOCK), SND_PCI_QUIRK(0x17aa, 0x2233, "Thinkpad", ALC293_FIXUP_LENOVO_SPK_NOISE), + SND_PCI_QUIRK(0x17aa, 0x30bb, "ThinkCentre AIO", ALC233_FIXUP_LENOVO_LINE2_MIC_HOTKEY), SND_PCI_QUIRK(0x17aa, 0x3977, "IdeaPad S210", ALC283_FIXUP_INT_MIC), SND_PCI_QUIRK(0x17aa, 0x3978, "IdeaPad Y410P", ALC269_FIXUP_NO_SHUTUP), SND_PCI_QUIRK(0x17aa, 0x5013, "Thinkpad", ALC269_FIXUP_LIMIT_INT_MIC_BOOST), -- 1.9.1

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[alsa-devel] [PATCH 1/2] ALSA: hda - Add mic mute hotkey quirk for Lenovo ThinkCentre AIO
by Hui Wang 28 Dec '15

28 Dec '15

From: Kailang <kailang(a)realtek.com> The Lenovo ThinkCenter AIO uses Line2 (NID 0x1b) to implement the micmute hotkey, here we register an input device and use Line2 unsol event to collect the hotkey pressing or releasing. In the meanwhile, the micmute led is controlled by GPIO2, so we use an existing function alc_fixup_gpio_mic_mute_hook() to control the led. Cc: <stable(a)vger.kernel.org> Signed-off-by: Kailang <kailang(a)realtek.com> --- sound/pci/hda/patch_realtek.c | 59 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index fe96428..8adff4f 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -3528,6 +3528,59 @@ static void alc280_fixup_hp_gpio2_mic_hotkey(struct hda_codec *codec, } } +static void alc233_fixup_lenovo_line2_mic_hotkey(struct hda_codec *codec, + const struct hda_fixup *fix, int action) +{ + /* Line2 = mic mute hotkey + GPIO2 = mic mute LED */ + static const struct hda_verb gpio_init[] = { + { 0x01, AC_VERB_SET_GPIO_MASK, 0x04 }, + { 0x01, AC_VERB_SET_GPIO_DIRECTION, 0x04 }, + {} + }; + + struct alc_spec *spec = codec->spec; + + if (action == HDA_FIXUP_ACT_PRE_PROBE) { + spec->kb_dev = input_allocate_device(); + if (!spec->kb_dev) { + codec_err(codec, "Out of memory (input_allocate_device)\n"); + return; + } + spec->kb_dev->name = "Microphone Mute Button"; + spec->kb_dev->evbit[0] = BIT_MASK(EV_KEY); + spec->kb_dev->keybit[BIT_WORD(KEY_MICMUTE)] = BIT_MASK(KEY_MICMUTE); + if (input_register_device(spec->kb_dev)) { + codec_err(codec, "input_register_device failed\n"); + input_free_device(spec->kb_dev); + spec->kb_dev = NULL; + return; + } + + snd_hda_add_verbs(codec, gpio_init); + snd_hda_jack_detect_enable_callback(codec, 0x1b, + gpio2_mic_hotkey_event); + + spec->gen.cap_sync_hook = alc_fixup_gpio_mic_mute_hook; + spec->gpio_led = 0; + spec->mute_led_polarity = 0; + spec->gpio_mic_led_mask = 0x04; + return; + } + + if (!spec->kb_dev) + return; + + switch (action) { + case HDA_FIXUP_ACT_PROBE: + spec->init_amp = ALC_INIT_DEFAULT; + break; + case HDA_FIXUP_ACT_FREE: + input_unregister_device(spec->kb_dev); + spec->kb_dev = NULL; + } +} + static void alc269_fixup_hp_line1_mic1_led(struct hda_codec *codec, const struct hda_fixup *fix, int action) { @@ -4628,6 +4681,7 @@ enum { ALC275_FIXUP_DELL_XPS, ALC256_FIXUP_DELL_XPS_13_HEADPHONE_NOISE, ALC293_FIXUP_LENOVO_SPK_NOISE, + ALC233_FIXUP_LENOVO_LINE2_MIC_HOTKEY, }; static const struct hda_fixup alc269_fixups[] = { @@ -5237,6 +5291,10 @@ static const struct hda_fixup alc269_fixups[] = { .chained = true, .chain_id = ALC269_FIXUP_THINKPAD_ACPI }, + [ALC233_FIXUP_LENOVO_LINE2_MIC_HOTKEY] = { + .type = HDA_FIXUP_FUNC, + .v.func = alc233_fixup_lenovo_line2_mic_hotkey, + }, }; static const struct snd_pci_quirk alc269_fixup_tbl[] = { @@ -5386,6 +5444,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { SND_PCI_QUIRK(0x17aa, 0x2223, "ThinkPad T550", ALC292_FIXUP_TPT440_DOCK), SND_PCI_QUIRK(0x17aa, 0x2226, "ThinkPad X250", ALC292_FIXUP_TPT440_DOCK), SND_PCI_QUIRK(0x17aa, 0x2233, "Thinkpad", ALC293_FIXUP_LENOVO_SPK_NOISE), + SND_PCI_QUIRK(0x17aa, 0x30bb, "ThinkCentre AIO", ALC233_FIXUP_LENOVO_LINE2_MIC_HOTKEY), SND_PCI_QUIRK(0x17aa, 0x3977, "IdeaPad S210", ALC283_FIXUP_INT_MIC), SND_PCI_QUIRK(0x17aa, 0x3978, "IdeaPad Y410P", ALC269_FIXUP_NO_SHUTUP), SND_PCI_QUIRK(0x17aa, 0x5013, "Thinkpad", ALC269_FIXUP_LIMIT_INT_MIC_BOOST), -- 1.9.1

2 8

[alsa-devel] [PATCH] ASoC: sun4i-codec: Use proper output for external amp routes
by Hans de Goede 27 Dec '15

27 Dec '15

An external amp (if any) is connected to the external outputs of the SoC of course, rather then directly to the internal amp. Signed-off-by: Hans de Goede <hdegoede(a)redhat.com> --- sound/soc/sunxi/sun4i-codec.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/sound/soc/sunxi/sun4i-codec.c b/sound/soc/sunxi/sun4i-codec.c index e6cc6a1..44f170c 100644 --- a/sound/soc/sunxi/sun4i-codec.c +++ b/sound/soc/sunxi/sun4i-codec.c @@ -728,7 +728,8 @@ static const struct snd_soc_dapm_widget sun4i_codec_card_dapm_widgets[] = { }; static const struct snd_soc_dapm_route sun4i_codec_card_dapm_routes[] = { - { "Speaker", NULL, "Power Amplifier" }, + { "Speaker", NULL, "HP Right" }, + { "Speaker", NULL, "HP Left" }, }; static struct snd_soc_card *sun4i_codec_create_card(struct device *dev) -- 2.5.0

3 2

[alsa-devel] [PATCH 0/5 v3] ALSA: dice: improve card registration processing
by Takashi Sakamoto 25 Dec '15

25 Dec '15

Hi, This patchset updates my previous post. [alsa-devel] [PATCH 0/4 v2] ALSA: dice: improve card registration processing http://mailman.alsa-project.org/pipermail/alsa-devel/2015-December/102460.h… The previous patchset includes some bugs. * Mutex structure can be destroyed within critical section with it in releasing sound card. * Bus reset handler doesn't execute transaction re-initialization as long as sound card instance is not registered. * Work of sound card registration is not postpone even if bus reset occurs. * Devices in sound card are not released when sound card registration fails. This version fixes these bugs, according to discussions between Takash Iwai and Stefan Richter. Thanks for them. Changes: * Use delayed workqueue API correctly. * Wait for registration work in .remove callback, instead of sound card free callback. * Obsolete mutex_lock()/mutex_unlock() for sound card registration purpose. * Keep devices of sound card and release them at registration failure. In kerneldoc of 'mod_delayed_work', this function call has a side effect to queueing the work. It seems that this function can be used instead of schedule_delayed_work. https://www.kernel.org/doc/htmldocs/device-drivers/API-mod-delayed-work.html But as long as I tested, my Linux 4.2 system is freezed. I have no further investigation. I use both of schedule_delayed_work() and mod_delayed_work() in this patchset. Takashi Sakamoto (5): ALSA: dice: split subaddress check from category check ALSA: dice: postpone card registration ALSA: dice: ensure to release sound devices after sound card registration fails ALSA: dice: purge transaction initialization at timeout of Dice notification ALSA: dice: expand timeout to wait for Dice notification sound/firewire/dice/dice-midi.c | 2 + sound/firewire/dice/dice-pcm.c | 2 + sound/firewire/dice/dice-transaction.c | 122 ++++++++++++-------- sound/firewire/dice/dice.c | 199 +++++++++++++++++---------------- sound/firewire/dice/dice.h | 5 + 5 files changed, 191 insertions(+), 139 deletions(-) -- 2.5.0

1 5

[alsa-devel] [PATCH 0/4 v2] ALSA: dice: improve card registration processing
by Takashi Sakamoto 25 Dec '15

25 Dec '15

Hi, This patchset is to update my previous one: [alsa-devel] [PATCH 0/4] ALSA: dice: improve card registration processing http://mailman.alsa-project.org/pipermail/alsa-devel/2015-December/102357.h… The main purpose of this patchset is to postpone card registration after successive bus resets, to ensure the processing and related transactions. This change has an advantage for ALSA dice driver to get proper information about hardware, especially for Dice II based models. Changes from v1: * fix jiffies64 handling bug * rename some members and functions related to card registration. * 'struct snd_dice.probed' -> 'registered' * do_probe() -> do_registration() Takashi Sakamoto (4): ALSA: dice: split subaddress check from category check ALSA: dice: postpone card registration ALSA: dice: purge transaction initialization at timeout of Dice notification ALSA: dice: expand timeout to wait for Dice notification sound/firewire/dice/dice-transaction.c | 122 ++++++++++++++-------- sound/firewire/dice/dice.c | 183 ++++++++++++++++----------------- sound/firewire/dice/dice.h | 3 + 3 files changed, 172 insertions(+), 136 deletions(-) -- 2.5.0

2 11

[alsa-devel] [RFC v2][PATCH 00/11] ALSA: fireface: new driver for RME Fireface series
by Takashi Sakamoto 24 Dec '15

24 Dec '15

Hi, This patchset is to update my previous one with mostly full features as an driver in ALSA firewire stack: [alsa-devel] [RFC][PATCH 0/3] ALSA: fireface: new driver for RME Fireface series (MIDI only) http://mailman.alsa-project.org/pipermail/alsa-devel/2015-December/101576.h… Changes from RFCv1: * Support own quirk of packet streaming * Add own data block processing layer * Support PCM functionality * Add proc node to help debugging * Add hwdep interface I note that just powering on, the device is muted. Thus, the device generates no sound even if packet streaming is successful. You can de-mute it by write transaction. For example, by using 'firewire-request' command in linux-firewire-utils(https://github.com/cladisch/linux-firewire-utils): $ ./firewire-request /dev/fw1 write 0x0000801c0000 0x000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000010000000100000001000000 Currently, libffado gives no way to do it via its mixer interface. Instead, done in methods to start streaming. I think it better to move de-mute codes to mixer initialization. There's an issue of periodical hissing noise. I observed this with Fireface 400. Interval of the noise differs depending on the situation (10-20 minutes) and continues around 20 seconds. The cause is not clear but I've experienced similar issue with TASCAM FireOne. A common point between these two models is non-blocking transmission. I guess that the cause may be on data block calculation in AMDTP packet streaming layer (calculate_data_blocks() function in sound/firewire/amdtp-stream.c). Further investigation is required. In my previous RFC, I described that zero bits have no effect in write transactions to 0x00008010051c. But this is wrong. The transaction has side effect to set the other options. In this patchset, the state of clock is changed on the way to initialize transaction. This is a bit rude but unavoidable. Fortunately, it's software's responsibility to read from flash memory and set initial configuration, thus I think this change is approval because just powering on the state of device is against user's configuration. The loading and configuring are still userspace responsibility. MIDI functionality can be disabled when any userspace applications run with libffado, as I described. This is a bug of libffado due to node ID handling. In line 199 of libffado/src/rme/fireface_hw.cpp, node id is handled as uint16_t value. This is a fashion of libffado to represent Node ID by lower 6 bits of actual Node ID of IEEE 1394 bus. In the other lines, actual Node Id is constructed with 0xffc0. Just using the raw value returned by ConfigRom::getNodeId() is invalid. For this work, I can borrow test device (Fireface 400) from Syntax Japan Inc. It's my fortune to have an opportunity to contact to the company. I'm graceful to Takeshi Mitsuhashi, Tahiro Hashizume and their kindness. Thank you. Takashi Sakamoto (11): fireface: add skeleton for RME Fireface series fireface: postpone sound card registration fireface: add model specific structure fireface: add transaction support fireface: add support for MIDI functionality fireface: add proc node to help debugging firewire-lib: add no-header packet processing fireface: add data processing layer fireface: add stream management functionality fireface: add PCM functionality fireface: add hwdep interface include/uapi/sound/asound.h | 3 +- include/uapi/sound/firewire.h | 1 + sound/firewire/Kconfig | 7 + sound/firewire/Makefile | 1 + sound/firewire/amdtp-stream.c | 104 +++++-- sound/firewire/amdtp-stream.h | 2 + sound/firewire/fireface/Makefile | 4 + sound/firewire/fireface/amdtp-ff.c | 221 ++++++++++++++ sound/firewire/fireface/fireface-hwdep.c | 191 ++++++++++++ sound/firewire/fireface/fireface-midi.c | 131 ++++++++ sound/firewire/fireface/fireface-pcm.c | 390 ++++++++++++++++++++++++ sound/firewire/fireface/fireface-proc.c | 237 +++++++++++++++ sound/firewire/fireface/fireface-stream.c | 397 +++++++++++++++++++++++++ sound/firewire/fireface/fireface-transaction.c | 301 +++++++++++++++++++ sound/firewire/fireface/fireface.c | 210 +++++++++++++ sound/firewire/fireface/fireface.h | 131 ++++++++ 16 files changed, 2313 insertions(+), 18 deletions(-) create mode 100644 sound/firewire/fireface/Makefile create mode 100644 sound/firewire/fireface/amdtp-ff.c create mode 100644 sound/firewire/fireface/fireface-hwdep.c create mode 100644 sound/firewire/fireface/fireface-midi.c create mode 100644 sound/firewire/fireface/fireface-pcm.c create mode 100644 sound/firewire/fireface/fireface-proc.c create mode 100644 sound/firewire/fireface/fireface-stream.c create mode 100644 sound/firewire/fireface/fireface-transaction.c create mode 100644 sound/firewire/fireface/fireface.c create mode 100644 sound/firewire/fireface/fireface.h -- 2.5.0

3 18

[alsa-devel] [PATCH] ASoC: wm8960: add kcontrol to select ADC data output
by Zidan Wang 24 Dec '15

24 Dec '15

add kcontrol to select ADC data output. Signed-off-by: Zidan Wang <zidan.wang(a)freescale.com> --- sound/soc/codecs/wm8960.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/sound/soc/codecs/wm8960.c b/sound/soc/codecs/wm8960.c index 5380798..162def8 100644 --- a/sound/soc/codecs/wm8960.c +++ b/sound/soc/codecs/wm8960.c @@ -147,6 +147,12 @@ static const char *wm8960_3d_upper_cutoff[] = {"High", "Low"}; static const char *wm8960_3d_lower_cutoff[] = {"Low", "High"}; static const char *wm8960_alcfunc[] = {"Off", "Right", "Left", "Stereo"}; static const char *wm8960_alcmode[] = {"ALC", "Limiter"}; +static const char *wm8960_adc_data_output_sel[] = { + "Left Data = Left ADC; Right Data = Right ADC", + "Left Data = Left ADC; Right Data = Left ADC", + "Left Data = Right ADC; Right Data = Right ADC", + "Left Data = Right ADC; Right Data = Left ADC", +}; static const struct soc_enum wm8960_enum[] = { SOC_ENUM_SINGLE(WM8960_DACCTL1, 5, 4, wm8960_polarity), @@ -155,6 +161,7 @@ static const struct soc_enum wm8960_enum[] = { SOC_ENUM_SINGLE(WM8960_3D, 5, 2, wm8960_3d_lower_cutoff), SOC_ENUM_SINGLE(WM8960_ALC1, 7, 4, wm8960_alcfunc), SOC_ENUM_SINGLE(WM8960_ALC3, 8, 2, wm8960_alcmode), + SOC_ENUM_SINGLE(WM8960_ADDCTL1, 2, 4, wm8960_adc_data_output_sel), }; static const int deemph_settings[] = { 0, 32000, 44100, 48000 }; @@ -295,6 +302,8 @@ SOC_SINGLE_TLV("Right Output Mixer Boost Bypass Volume", WM8960_BYPASS2, 4, 7, 1, bypass_tlv), SOC_SINGLE_TLV("Right Output Mixer RINPUT3 Volume", WM8960_ROUTMIX, 4, 7, 1, bypass_tlv), + +SOC_ENUM("ADC Data Output Select", wm8960_enum[6]), }; static const struct snd_kcontrol_new wm8960_lin_boost[] = { -- 1.9.1

2 1

[alsa-devel] [PATCH] ASoC: twl6040, fsl: use to_platform_device
by Geliang Tang 24 Dec '15

24 Dec '15

Use to_platform_device() instead of open-coding it. Signed-off-by: Geliang Tang <geliangtang(a)163.com> --- sound/soc/codecs/twl6040.c | 3 +-- sound/soc/fsl/mpc8610_hpcd.c | 3 +-- sound/soc/fsl/p1022_ds.c | 3 +-- sound/soc/fsl/p1022_rdk.c | 3 +-- 4 files changed, 4 insertions(+), 8 deletions(-) diff --git a/sound/soc/codecs/twl6040.c b/sound/soc/codecs/twl6040.c index 4cad892..bc3de2e 100644 --- a/sound/soc/codecs/twl6040.c +++ b/sound/soc/codecs/twl6040.c @@ -1097,8 +1097,7 @@ static int twl6040_probe(struct snd_soc_codec *codec) { struct twl6040_data *priv; struct twl6040 *twl6040 = dev_get_drvdata(codec->dev->parent); - struct platform_device *pdev = container_of(codec->dev, - struct platform_device, dev); + struct platform_device *pdev = to_platform_device(codec->dev); int ret = 0; priv = devm_kzalloc(codec->dev, sizeof(*priv), GFP_KERNEL); diff --git a/sound/soc/fsl/mpc8610_hpcd.c b/sound/soc/fsl/mpc8610_hpcd.c index 6f236f1..ddf49f3 100644 --- a/sound/soc/fsl/mpc8610_hpcd.c +++ b/sound/soc/fsl/mpc8610_hpcd.c @@ -189,8 +189,7 @@ static int mpc8610_hpcd_probe(struct platform_device *pdev) { struct device *dev = pdev->dev.parent; /* ssi_pdev is the platform device for the SSI node that probed us */ - struct platform_device *ssi_pdev = - container_of(dev, struct platform_device, dev); + struct platform_device *ssi_pdev = to_platform_device(dev); struct device_node *np = ssi_pdev->dev.of_node; struct device_node *codec_np = NULL; struct mpc8610_hpcd_data *machine_data; diff --git a/sound/soc/fsl/p1022_ds.c b/sound/soc/fsl/p1022_ds.c index 747aab0..a1f780e 100644 --- a/sound/soc/fsl/p1022_ds.c +++ b/sound/soc/fsl/p1022_ds.c @@ -199,8 +199,7 @@ static int p1022_ds_probe(struct platform_device *pdev) { struct device *dev = pdev->dev.parent; /* ssi_pdev is the platform device for the SSI node that probed us */ - struct platform_device *ssi_pdev = - container_of(dev, struct platform_device, dev); + struct platform_device *ssi_pdev = to_platform_device(dev); struct device_node *np = ssi_pdev->dev.of_node; struct device_node *codec_np = NULL; struct machine_data *mdata; diff --git a/sound/soc/fsl/p1022_rdk.c b/sound/soc/fsl/p1022_rdk.c index 1dd49e5..d4d88a8 100644 --- a/sound/soc/fsl/p1022_rdk.c +++ b/sound/soc/fsl/p1022_rdk.c @@ -203,8 +203,7 @@ static int p1022_rdk_probe(struct platform_device *pdev) { struct device *dev = pdev->dev.parent; /* ssi_pdev is the platform device for the SSI node that probed us */ - struct platform_device *ssi_pdev = - container_of(dev, struct platform_device, dev); + struct platform_device *ssi_pdev = to_platform_device(dev); struct device_node *np = ssi_pdev->dev.of_node; struct device_node *codec_np = NULL; struct machine_data *mdata; -- 2.5.0

2 1

[alsa-devel] [PATCH] ASoC: arizona: Fix bclk for sample rates that are multiple of 4kHz
by Charles Keepax 24 Dec '15

24 Dec '15

From: Nikesh Oswal <Nikesh.Oswal(a)cirrus.com> For a sample rate of 12kHz the bclk was taken from the 44.1kHz table as we test for a multiple of 8kHz. This patch fixes this issue by testing for multiples of 4kHz instead. Signed-off-by: Nikesh Oswal <Nikesh.Oswal(a)cirrus.com> Signed-off-by: Charles Keepax <ckeepax(a)opensource.wolfsonmicro.com> --- sound/soc/codecs/arizona.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 88e2c74..33143fe 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1659,7 +1659,7 @@ static int arizona_hw_params(struct snd_pcm_substream *substream, bool reconfig; unsigned int aif_tx_state, aif_rx_state; - if (params_rate(params) % 8000) + if (params_rate(params) % 4000) rates = &arizona_44k1_bclk_rates[0]; else rates = &arizona_48k_bclk_rates[0]; -- 2.1.4

2 2

[alsa-devel] Applied "ASoC: da7219: Add regmap patch to support old silicon" to the asoc tree
by Mark Brown 24 Dec '15

24 Dec '15

The patch ASoC: da7219: Add regmap patch to support old silicon has been applied to the asoc tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From abd7c894fc41a9a674354e10ed6c55413e1db077 Mon Sep 17 00:00:00 2001 From: Adam Thomson <Adam.Thomson.Opensource(a)diasemi.com> Date: Wed, 23 Dec 2015 13:50:04 +0000 Subject: [PATCH] ASoC: da7219: Add regmap patch to support old silicon Initial silicon did not have master bias enabled by default, unlike later HW, so use regmap patch to align with newer defaults. Signed-off-by: Adam Thomson <Adam.Thomson.Opensource(a)diasemi.com> Signed-off-by: Mark Brown <broonie(a)kernel.org> --- sound/soc/codecs/da7219.c | 26 +++++++++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/da7219.c b/sound/soc/codecs/da7219.c index c6d3b32..9c7e8ec 100644 --- a/sound/soc/codecs/da7219.c +++ b/sound/soc/codecs/da7219.c @@ -1592,9 +1592,14 @@ static void da7219_handle_pdata(struct snd_soc_codec *codec) } } +static struct reg_sequence da7219_rev_aa_patch[] = { + { DA7219_REFERENCES, 0x08 }, +}; + static int da7219_probe(struct snd_soc_codec *codec) { struct da7219_priv *da7219 = snd_soc_codec_get_drvdata(codec); + unsigned int rev; int ret; mutex_init(&da7219->lock); @@ -1604,6 +1609,26 @@ static int da7219_probe(struct snd_soc_codec *codec) if (ret) return ret; + ret = regmap_read(da7219->regmap, DA7219_CHIP_REVISION, &rev); + if (ret) { + dev_err(codec->dev, "Failed to read chip revision: %d\n", ret); + goto err_disable_reg; + } + + switch (rev & DA7219_CHIP_MINOR_MASK) { + case 0: + ret = regmap_register_patch(da7219->regmap, da7219_rev_aa_patch, + ARRAY_SIZE(da7219_rev_aa_patch)); + if (ret) { + dev_err(codec->dev, "Failed to register AA patch: %d\n", + ret); + goto err_disable_reg; + } + break; + default: + break; + } + /* Handle DT/Platform data */ if (codec->dev->of_node) da7219->pdata = da7219_of_to_pdata(codec); @@ -1774,7 +1799,6 @@ static struct reg_default da7219_reg_defaults[] = { { DA7219_MIXOUT_R_CTRL, 0x10 }, { DA7219_CHIP_ID1, 0x23 }, { DA7219_CHIP_ID2, 0x93 }, - { DA7219_CHIP_REVISION, 0x00 }, { DA7219_IO_CTRL, 0x00 }, { DA7219_GAIN_RAMP_CTRL, 0x00 }, { DA7219_PC_COUNT, 0x02 }, -- 2.6.4

1 0

[alsa-devel] [PATCH v2] ASoC: fsl_asrc: old version asrc only support even numbered channels
by Zidan Wang 24 Dec '15

24 Dec '15

The latest asrc's channel bits is 4 bit, the old asrc's channel bits is 3. For the old version asrc, channel should be a even number. Signed-off-by: Zidan Wang <zidan.wang(a)freescale.com> --- v1->v2: 1. add an extra else if for the new condition. sound/soc/fsl/fsl_asrc.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/sound/soc/fsl/fsl_asrc.c b/sound/soc/fsl/fsl_asrc.c index be78dc9..16ff156 100644 --- a/sound/soc/fsl/fsl_asrc.c +++ b/sound/soc/fsl/fsl_asrc.c @@ -116,6 +116,10 @@ static int fsl_asrc_request_pair(int channels, struct fsl_asrc_pair *pair) } else if (asrc_priv->channel_avail < channels) { dev_err(dev, "can't afford required channels: %d\n", channels); ret = -EINVAL; + } else if (asrc_priv->channel_bits < 4 && channels % 2 != 0) { + dev_err(dev, "old version asrc can't support an odd \ + channel number\n"); + ret = -EINVAL; } else { asrc_priv->channel_avail -= channels; asrc_priv->pair[index] = pair; -- 1.9.1

1 0

[alsa-devel] [PATCH 0/4] ALSA: dice: improve card registration processing
by Takashi Sakamoto 23 Dec '15

23 Dec '15

Hi, This patchset is to update a part of my previous RFCv2 (patch 01, 03 and 04. 02 is dropped according to Clemens' comment). [alsa-devel] [RFC][PATCH 00/10 v2] ALSA: dice: stabiliza packet streaming http://mailman.alsa-project.org/pipermail/alsa-devel/2015-December/101897.h… The main purpose of this patchset is to postpone card registration after successive bus resets, to ensure probe processing and related transactions. This change has effects for ALSA dice driver to get proper information about hardware, especially for Dice II based models. Changes from RFC v2: * Patch 03 is newly added to drop a workaround to ensure transactions under a situation of probe processing with successive bus reset. * Comment updates. Takashi Sakamoto (4): ALSA: dice: split subaddress check from category check ALSA: dice: postpone card registration ALSA: dice: purge transaction initialization at timeout of Dice notification ALSA: dice: expand timeout to wait for Dice notification sound/firewire/dice/dice-transaction.c | 122 +++++++++++++++-------- sound/firewire/dice/dice.c | 177 ++++++++++++++++----------------- sound/firewire/dice/dice.h | 3 + 3 files changed, 166 insertions(+), 136 deletions(-) -- 2.5.0

2 9

[alsa-devel] [PATCH 1/1] ASoC: da7219: Add regmap patch to support old silicon
by Adam Thomson 23 Dec '15

23 Dec '15

Initial silicon did not have master bias enabled by default, unlike later HW, so use regmap patch to align with newer defaults. Signed-off-by: Adam Thomson <Adam.Thomson.Opensource(a)diasemi.com> --- This patch is based on the following commit: 'ASoC: da7219: Remove support for 32KHz PLL mode' (Commit 501f72e9c5205b9d70d5d61e9b186ae7ba873f73, kernel/git/broonie/sound.git) sound/soc/codecs/da7219.c | 26 +++++++++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/da7219.c b/sound/soc/codecs/da7219.c index 82a7236..341a191 100644 --- a/sound/soc/codecs/da7219.c +++ b/sound/soc/codecs/da7219.c @@ -1592,9 +1592,14 @@ static void da7219_handle_pdata(struct snd_soc_codec *codec) } } +static struct reg_sequence da7219_rev_aa_patch[] = { + { DA7219_REFERENCES, 0x08 }, +}; + static int da7219_probe(struct snd_soc_codec *codec) { struct da7219_priv *da7219 = snd_soc_codec_get_drvdata(codec); + unsigned int rev; int ret; mutex_init(&da7219->lock); @@ -1604,6 +1609,26 @@ static int da7219_probe(struct snd_soc_codec *codec) if (ret) return ret; + ret = regmap_read(da7219->regmap, DA7219_CHIP_REVISION, &rev); + if (ret) { + dev_err(codec->dev, "Failed to read chip revision: %d\n", ret); + goto err_disable_reg; + } + + switch (rev & DA7219_CHIP_MINOR_MASK) { + case 0: + ret = regmap_register_patch(da7219->regmap, da7219_rev_aa_patch, + ARRAY_SIZE(da7219_rev_aa_patch)); + if (ret) { + dev_err(codec->dev, "Failed to register AA patch: %d\n", + ret); + goto err_disable_reg; + } + break; + default: + break; + } + /* Handle DT/Platform data */ if (codec->dev->of_node) da7219->pdata = da7219_of_to_pdata(codec); @@ -1774,7 +1799,6 @@ static struct reg_default da7219_reg_defaults[] = { { DA7219_MIXOUT_R_CTRL, 0x10 }, { DA7219_CHIP_ID1, 0x23 }, { DA7219_CHIP_ID2, 0x93 }, - { DA7219_CHIP_REVISION, 0x00 }, { DA7219_IO_CTRL, 0x00 }, { DA7219_GAIN_RAMP_CTRL, 0x00 }, { DA7219_PC_COUNT, 0x02 }, -- 1.9.3

1 0

[alsa-devel] DT soundcard driver with special clock routing
by Petr Kulhavy 23 Dec '15

23 Dec '15

Hi, I'm developing a DT-based driver for an ARM SoC device with the following special clock routing: - WM8758 codec attached to the CPU DAI via I2S - the codec is I2S clock master - the CPU feeds the codec with 12MHz clock (outside of the I2S) - the codec converts the 12MHz internally to 48kHz*256 or 44.1kHz *256 clock and provides it to I2S as MCLK So the special set-up needed here is that the codec needs to be configured to: a) generate the proper MCLK b) enable the respective GPIO pin as clock output What is the best way of representing this set-up using device tree? I'm wondering if this can be done by adding a specific option in the codec DT binding for enabling the clock output and then use the simple audio card. Or do I need to write a specific soundcard driver that sets up the codec registers? I would like to avoid that if possible and use existing code... What would you recommend? Thanks -- Petr Kulhavy, MSc System Architect *BARIX* petr(a)barix.com <mailto:petr@barix.com> | Skype: brain.barix Barix AG, Seefeldstrasse 303 | 8008 Zurich, Switzerland T +41 43 43322 11 | www.barix.com <http://www.barix.com> You have received this email because of your relationship Barix AG and its affiliated companies. Barix AG and its affiliated companies do not sell or exchange email addresses, or any other personal contact information provided by you with any third parties. All email distributions are managed and controlled by Barix AG and its affiliated companies. Barix AG, Seefeldstr. 303, 8008 Zürich, Switzerland. Company Reg. No: CH-020.3.023.869-8, VAT Reg. No: CHE-105.687.663.

2 5

[alsa-devel] [PATCH] ASoC: rt5651: add ACPI and OF support
by Bard Liao 23 Dec '15

23 Dec '15

Add required tables and the binding document for ACPI and OF matching. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Signed-off-by: Bard Liao <bardliao(a)realtek.com> --- Documentation/devicetree/bindings/sound/rt5651.txt | 41 ++++++++++++++++++++++ sound/soc/codecs/rt5651.c | 31 ++++++++++++++++ 2 files changed, 72 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/rt5651.txt diff --git a/Documentation/devicetree/bindings/sound/rt5651.txt b/Documentation/devicetree/bindings/sound/rt5651.txt new file mode 100644 index 0000000..3875233 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/rt5651.txt @@ -0,0 +1,41 @@ +RT5651 audio CODEC + +This device supports I2C only. + +Required properties: + +- compatible : "realtek,rt5651". + +- reg : The I2C address of the device. + +Optional properties: + +- realtek,in2-differential + Boolean. Indicate MIC2 input are differential, rather than single-ended. + +- realtek,dmic-en + Boolean. true if dmic is used. + +Pins on the device (for linking into audio routes) for RT5651: + + * DMIC L1 + * DMIC R1 + * IN1P + * IN2P + * IN2N + * IN3P + * HPOL + * HPOR + * LOUTL + * LOUTR + * PDML + * PDMR + +Example: + +codec: rt5651@1a { + compatible = "realtek,rt5651"; + reg = <0x1a>; + realtek,dmic-en = "true"; + realtek,in2-diff = "false"; +}; diff --git a/sound/soc/codecs/rt5651.c b/sound/soc/codecs/rt5651.c index 1d40318..7a61970 100644 --- a/sound/soc/codecs/rt5651.c +++ b/sound/soc/codecs/rt5651.c @@ -18,6 +18,7 @@ #include <linux/regmap.h> #include <linux/platform_device.h> #include <linux/spi/spi.h> +#include <linux/acpi.h> #include <sound/core.h> #include <sound/pcm.h> #include <sound/pcm_params.h> @@ -1735,12 +1736,38 @@ static const struct regmap_config rt5651_regmap = { .num_ranges = ARRAY_SIZE(rt5651_ranges), }; +#if defined(CONFIG_OF) +static const struct of_device_id rt5651_of_match[] = { + { .compatible = "realtek,rt5651", }, + {}, +}; +MODULE_DEVICE_TABLE(of, rt5651_of_match); +#endif + +#ifdef CONFIG_ACPI +static const struct acpi_device_id rt5651_acpi_match[] = { + { "10EC5651", 0 }, + { }, +}; +MODULE_DEVICE_TABLE(acpi, rt5651_acpi_match); +#endif + static const struct i2c_device_id rt5651_i2c_id[] = { { "rt5651", 0 }, { } }; MODULE_DEVICE_TABLE(i2c, rt5651_i2c_id); +static int rt5651_parse_dt(struct rt5651_priv *rt5651, struct device_node *np) +{ + rt5651->pdata.in2_diff = of_property_read_bool(np, + "realtek,in2-differential"); + rt5651->pdata.dmic_en = of_property_read_bool(np, + "realtek,dmic-en"); + + return 0; +} + static int rt5651_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *id) { @@ -1757,6 +1784,8 @@ static int rt5651_i2c_probe(struct i2c_client *i2c, if (pdata) rt5651->pdata = *pdata; + else if (i2c->dev.of_node) + rt5651_parse_dt(rt5651, i2c->dev.of_node); rt5651->regmap = devm_regmap_init_i2c(i2c, &rt5651_regmap); if (IS_ERR(rt5651->regmap)) { @@ -1806,6 +1835,8 @@ static int rt5651_i2c_remove(struct i2c_client *i2c) static struct i2c_driver rt5651_i2c_driver = { .driver = { .name = "rt5651", + .acpi_match_table = ACPI_PTR(rt5651_acpi_match), + .of_match_table = of_match_ptr(rt5651_of_match), }, .probe = rt5651_i2c_probe, .remove = rt5651_i2c_remove, -- 1.8.1.1.439.g50a6b54

2 1

[alsa-devel] [PATCH 0/6] ASoC: da7219: AB Silicon related updates and small fixes.
by Adam Thomson 23 Dec '15

23 Dec '15

This is a small collection of updates & fixes, put together for ease. For changes relating to AB silicon, previous silicon revision is obsolete and was unavailable outside of Dialog, so does not require driver support in the future. Changes are based on v4.4-rc6 kernel. Adam Thomson (6): ASoC: da7219: Disable regulators on probe() failure ASoC: da7219: Fix Sidetone to work regardless of DAI capture ASoC: da7219: Update REFERENCES reg default, in-line with HW ASoC: da7219: Remove internal LDO features of codec ASoC: da7219: Add support for 1.6V micbias level ASoC: da7219: Remove support for 32KHz PLL mode Documentation/devicetree/bindings/sound/da7219.txt | 8 +- include/sound/da7219.h | 14 +--- sound/soc/codecs/da7219.c | 87 +++++++--------------- sound/soc/codecs/da7219.h | 9 --- 4 files changed, 32 insertions(+), 86 deletions(-) -- 1.9.3

4 17

[alsa-devel] [PATCH v4 1/2] ASoC: wm_adsp: Add a handler for the compressed IRQ
by Charles Keepax 23 Dec '15

23 Dec '15

Here support is added for responding to DSP IRQs that are used to indicate data being available on the DSP. The idea is that we check the amount of data available upon receipt of an IRQ and on subsequent calls to the pointer callback we recheck once less than one fragment is available (to avoid excessive SPI traffic), if there is truely less than one fragment available we ack the last IRQ and wait for a new one. Signed-off-by: Charles Keepax <ckeepax(a)opensource.wolfsonmicro.com> --- Changes since v3: - Make spurious IRQs return IRQ_NONE - Add a comment to explain the usage of wm_adsp_buffer_ack_irq Thanks, Charles sound/soc/codecs/wm5110.c | 27 +++++++ sound/soc/codecs/wm_adsp.c | 192 +++++++++++++++++++++++++++++++++++++++++++++ sound/soc/codecs/wm_adsp.h | 3 + 3 files changed, 222 insertions(+) diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index c364096..dde94c4 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -2177,10 +2177,23 @@ static int wm5110_open(struct snd_compr_stream *stream) return wm_adsp_compr_open(&priv->core.adsp[n_adsp], stream); } +static irqreturn_t wm5110_adsp2_irq(int irq, void *data) +{ + struct wm5110_priv *florida = data; + int ret; + + ret = wm_adsp_compr_handle_irq(&florida->core.adsp[2]); + if (ret == -ENODEV) + return IRQ_NONE; + + return IRQ_HANDLED; +} + static int wm5110_codec_probe(struct snd_soc_codec *codec) { struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); struct wm5110_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->core.arizona; int i, ret; priv->core.arizona->dapm = dapm; @@ -2189,6 +2202,14 @@ static int wm5110_codec_probe(struct snd_soc_codec *codec) arizona_init_gpio(codec); arizona_init_mono(codec); + ret = arizona_request_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, + "ADSP2 Compressed IRQ", wm5110_adsp2_irq, + priv); + if (ret != 0) { + dev_err(codec->dev, "Failed to request DSP IRQ: %d\n", ret); + return ret; + } + for (i = 0; i < WM5110_NUM_ADSP; ++i) { ret = wm_adsp2_codec_probe(&priv->core.adsp[i], codec); if (ret) @@ -2209,12 +2230,15 @@ err_adsp2_codec_probe: for (--i; i >= 0; --i) wm_adsp2_codec_remove(&priv->core.adsp[i], codec); + arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv); + return ret; } static int wm5110_codec_remove(struct snd_soc_codec *codec) { struct wm5110_priv *priv = snd_soc_codec_get_drvdata(codec); + struct arizona *arizona = priv->core.arizona; int i; for (i = 0; i < WM5110_NUM_ADSP; ++i) @@ -2222,6 +2246,8 @@ static int wm5110_codec_remove(struct snd_soc_codec *codec) priv->core.arizona->dapm = NULL; + arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv); + return 0; } @@ -2273,6 +2299,7 @@ static struct snd_compr_ops wm5110_compr_ops = { .set_params = wm_adsp_compr_set_params, .get_caps = wm_adsp_compr_get_caps, .trigger = wm_adsp_compr_trigger, + .pointer = wm_adsp_compr_pointer, }; static struct snd_soc_platform_driver wm5110_compr_platform = { diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index ac879d1..edf96b5 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -279,6 +279,11 @@ struct wm_adsp_compr_buf { struct wm_adsp_buffer_region *regions; u32 host_buf_ptr; + + u32 error; + u32 irq_ack; + int read_index; + int avail; }; struct wm_adsp_compr { @@ -287,6 +292,8 @@ struct wm_adsp_compr { struct snd_compr_stream *stream; struct snd_compressed_buffer size; + + unsigned int copied_total; }; #define WM_ADSP_DATA_WORD_SIZE 3 @@ -2436,6 +2443,11 @@ static int wm_adsp_compr_check_params(struct snd_compr_stream *stream, return -EINVAL; } +static inline unsigned int wm_adsp_compr_frag_words(struct wm_adsp_compr *compr) +{ + return compr->size.fragment_size / WM_ADSP_DATA_WORD_SIZE; +} + int wm_adsp_compr_set_params(struct snd_compr_stream *stream, struct snd_compr_params *params) { @@ -2622,6 +2634,8 @@ static int wm_adsp_buffer_init(struct wm_adsp *dsp) return -ENOMEM; buf->dsp = dsp; + buf->read_index = -1; + buf->irq_ack = 0xFFFFFFFF; ret = wm_adsp_buffer_locate(buf); if (ret < 0) { @@ -2705,6 +2719,16 @@ int wm_adsp_compr_trigger(struct snd_compr_stream *stream, int cmd) ret); break; } + + /* Trigger the IRQ at one fragment of data */ + ret = wm_adsp_buffer_write(compr->buf, + HOST_BUFFER_FIELD(high_water_mark), + wm_adsp_compr_frag_words(compr)); + if (ret < 0) { + adsp_err(dsp, "Failed to set high water mark: %d\n", + ret); + break; + } break; case SNDRV_PCM_TRIGGER_STOP: break; @@ -2719,4 +2743,172 @@ int wm_adsp_compr_trigger(struct snd_compr_stream *stream, int cmd) } EXPORT_SYMBOL_GPL(wm_adsp_compr_trigger); +static inline int wm_adsp_buffer_size(struct wm_adsp_compr_buf *buf) +{ + int last_region = wm_adsp_fw[buf->dsp->fw].caps->num_regions - 1; + + return buf->regions[last_region].cumulative_size; +} + +static int wm_adsp_buffer_update_avail(struct wm_adsp_compr_buf *buf) +{ + u32 next_read_index, next_write_index; + int write_index, read_index, avail; + int ret; + + /* Only sync read index if we haven't already read a valid index */ + if (buf->read_index < 0) { + ret = wm_adsp_buffer_read(buf, + HOST_BUFFER_FIELD(next_read_index), + &next_read_index); + if (ret < 0) + return ret; + + read_index = sign_extend32(next_read_index, 23); + + if (read_index < 0) { + adsp_dbg(buf->dsp, "Avail check on unstarted stream\n"); + return 0; + } + + buf->read_index = read_index; + } + + ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(next_write_index), + &next_write_index); + if (ret < 0) + return ret; + + write_index = sign_extend32(next_write_index, 23); + + avail = write_index - buf->read_index; + if (avail < 0) + avail += wm_adsp_buffer_size(buf); + + adsp_dbg(buf->dsp, "readindex=0x%x, writeindex=0x%x, avail=%d\n", + buf->read_index, write_index, avail); + + buf->avail = avail; + + return 0; +} + +int wm_adsp_compr_handle_irq(struct wm_adsp *dsp) +{ + struct wm_adsp_compr_buf *buf = dsp->buffer; + int ret = 0; + + mutex_lock(&dsp->pwr_lock); + + if (!buf) { + adsp_err(dsp, "Spurious buffer IRQ\n"); + ret = -ENODEV; + goto out; + } + + adsp_dbg(dsp, "Handling buffer IRQ\n"); + + ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(error), &buf->error); + if (ret < 0) { + adsp_err(dsp, "Failed to check buffer error: %d\n", ret); + goto out; + } + if (buf->error != 0) { + adsp_err(dsp, "Buffer error occurred: %d\n", buf->error); + ret = -EIO; + goto out; + } + + ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(irq_count), + &buf->irq_ack); + if (ret < 0) { + adsp_err(dsp, "Failed to get irq_count: %d\n", ret); + goto out; + } + + ret = wm_adsp_buffer_update_avail(buf); + if (ret < 0) { + adsp_err(dsp, "Error reading avail: %d\n", ret); + goto out; + } + +out: + mutex_unlock(&dsp->pwr_lock); + + return ret; +} +EXPORT_SYMBOL_GPL(wm_adsp_compr_handle_irq); + +/* + * We only need to ack the IRQ on the firmware end when we wish to receive + * another, as such we do this in response to running out of data in the + * buffer, rather than in direct response to the IRQ itself. + */ +static int wm_adsp_buffer_ack_irq(struct wm_adsp_compr_buf *buf) +{ + if (buf->irq_ack & 0x01) + return 0; + + adsp_dbg(buf->dsp, "Acking buffer IRQ(0x%x)\n", buf->irq_ack); + + buf->irq_ack |= 0x01; + + return wm_adsp_buffer_write(buf, HOST_BUFFER_FIELD(irq_ack), + buf->irq_ack); +} + +int wm_adsp_compr_pointer(struct snd_compr_stream *stream, + struct snd_compr_tstamp *tstamp) +{ + struct wm_adsp_compr *compr = stream->runtime->private_data; + struct wm_adsp_compr_buf *buf = compr->buf; + struct wm_adsp *dsp = compr->dsp; + int ret = 0; + + adsp_dbg(dsp, "Pointer request\n"); + + mutex_lock(&dsp->pwr_lock); + + if (!compr->buf) { + ret = -ENXIO; + goto out; + } + + if (compr->buf->error) { + ret = -EIO; + goto out; + } + + if (buf->avail < wm_adsp_compr_frag_words(compr)) { + ret = wm_adsp_buffer_update_avail(buf); + if (ret < 0) { + adsp_err(dsp, "Error reading avail: %d\n", ret); + goto out; + } + + /* + * If we really have less than 1 fragment available ack the + * last DSP IRQ and rely on the IRQ to inform us once a whole + * fragment is available. + */ + if (buf->avail < wm_adsp_compr_frag_words(compr)) { + ret = wm_adsp_buffer_ack_irq(buf); + if (ret < 0) { + adsp_err(dsp, "Failed to ack buffer IRQ: %d\n", + ret); + goto out; + } + } + } + + tstamp->copied_total = compr->copied_total; + tstamp->copied_total += buf->avail * WM_ADSP_DATA_WORD_SIZE; + +out: + mutex_unlock(&dsp->pwr_lock); + + return ret; +} +EXPORT_SYMBOL_GPL(wm_adsp_compr_pointer); + MODULE_LICENSE("GPL v2"); diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 43af093..522fa1a 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -112,5 +112,8 @@ extern int wm_adsp_compr_set_params(struct snd_compr_stream *stream, extern int wm_adsp_compr_get_caps(struct snd_compr_stream *stream, struct snd_compr_caps *caps); extern int wm_adsp_compr_trigger(struct snd_compr_stream *stream, int cmd); +extern int wm_adsp_compr_handle_irq(struct wm_adsp *dsp); +extern int wm_adsp_compr_pointer(struct snd_compr_stream *stream, + struct snd_compr_tstamp *tstamp); #endif -- 2.1.4

1 1

[alsa-devel] [PATCH 52/54] sound: soc: wm8903: Be sure to clamp return value
by Linus Walleij 23 Dec '15

23 Dec '15

As we want gpio_chip .get() calls to be able to return negative error codes and propagate to drivers, we need to go over all drivers and make sure their return values are clamped to [0,1]. We do this by using the ret = !!(val) design pattern. Cc: Liam Girdwood <lgirdwood(a)gmail.com> Cc: alsa-devel(a)alsa-project.org Cc: Charles Keepax <ckeepax(a)opensource.wolfsonmicro.com> Cc: Mark Brown <broonie(a)kernel.org> Signed-off-by: Linus Walleij <linus.walleij(a)linaro.org> --- Mark: as mentioned in 00/54: either apply this directly or ACK it and I will take it into the GPIO tree. --- sound/soc/codecs/wm8903.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm8903.c b/sound/soc/codecs/wm8903.c index 2512def0d349..a82b8bc2cfc0 100644 --- a/sound/soc/codecs/wm8903.c +++ b/sound/soc/codecs/wm8903.c @@ -1804,7 +1804,7 @@ static int wm8903_gpio_get(struct gpio_chip *chip, unsigned offset) regmap_read(wm8903->regmap, WM8903_GPIO_CONTROL_1 + offset, &reg); - return (reg & WM8903_GP1_LVL_MASK) >> WM8903_GP1_LVL_SHIFT; + return !!((reg & WM8903_GP1_LVL_MASK) >> WM8903_GP1_LVL_SHIFT); } static int wm8903_gpio_direction_out(struct gpio_chip *chip, -- 2.4.3

3 2

[alsa-devel] [GIT PULL] ASoC updates for v4.5
by Mark Brown 23 Dec '15

23 Dec '15

The following changes since commit 4ef7675344d687a0ef5b0d7c0cee12da005870c0: Linux 4.4-rc6 (2015-12-20 16:06:09 -0800) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git tags/asoc-v4.5 for you to fetch changes up to 822ad70a2f5c420da5baa9f4354e6b7813ca6da9: Merge remote-tracking branch 'asoc/topic/rt5677' into asoc-next (2015-12-23 00:38:14 +0000) ---------------------------------------------------------------- ASoC: Updates for v4.5 This is quite a busy release on the driver front with a lot of new drivers being added but comparatively quiet on the core side with only one big change going in and that a fairly straightforward refactoring. - Conversion of the array of DAI links to a list by Mengdong Lin, supporting dynamically adding and removing DAI links. - Some more fixes for the topology code, though it is still not final and ready for enabling in production. We really need to get to the point where that can be done. - A pile of changes for Intel SkyLake drivers which hopefully deliver some useful initial functionality for systems with this chipset, though there is more work still to come. - New drivers for a number of Imagination Technologies IPs. - Lots of new features and cleanups for the Renesas drivers. - ANC support for WM5110. - New driver for Atmel class D speaker drivers. - New drivers for Cirrus CS47L24 and WM1831. - New driver for Dialog DA7128. - New drivers for Realtek RT5659 and RT56156. - New driver for Rockchip RK3036. - New driver for TI PC3168A ---------------------------------------------------------------- Adam Thomson (9): ASoC: da7218: Add bindings documentation for DA7218 audio codec ASoC: da7218: Add da7218 codec driver ASoC: da7218: Enable mic level detection reporting to user-space ASoC: da7219: Fix Sidetone to work regardless of DAI capture ASoC: da7219: Disable regulators on probe() failure ASoC: da7219: Update REFERENCES reg default, in-line with HW ASoC: da7219: Remove internal LDO features of codec ASoC: da7219: Add support for 1.6V micbias level ASoC: da7219: Remove support for 32KHz PLL mode Anatol Pomozov (1): ASoC: rt5677: use 'active low' logic for reset pin Arnd Bergmann (8): ASoC: samsung: pass DMA channels as pointers ASoC: s3c24xx-i2s: pass DMA channels as platform data ASoC: pxa: remove incorrect do_div() call ASoC: sh: fix fsi build warnings for 64 bit ASoC: samsung: pass filter function as pointer ASoC: rcar: remove unused variable ASoC: fsl: use correct format string for dma_addr_t ASoC: da7218: avoid 64-bit compile warning Axel Lin (3): ASoC: da7219: Use logical instead of bitwise OR for boolean expression ASoC: wm8904: Make undocumented registers non-readable ASoC: rt5616: Return error if device ID mismatch Bard Liao (7): ASoC: rt298: fix remove unnedded clk setting ASoC: rt5645: Separate regmap for rt5645 and rt5650 ASoC: rt5659: add rt5659 codec driver ASoC: rt5645: merge DMI tables of google projects ASoC: rt5616: add rt5616 codec driver ASoC: rt5616: rename some alsa control names ASoC: rt5677: set PLL_CTRL2 non-volatile Ben Zhang (1): ASoC: rt5677: Reconfigure PLL1 after resume Caesar Wang (5): ASoC: rockchip: i2s: change bclk and lrck according to sample rates ASoC: rockchip-max98090: Allow more sample rates ASoC: rockchip-rt5645: Allow more sample rates ASoC: rt5616: add an of_match table ASoC: rt5616: add devicetree document for rt5616 Charles Keepax (17): ASoC: wm5110: Add DAPM/routing hookup for the ANC block ASoC: wm_adsp: Expand the list of available firmwares ASoC: arizona: Add 32uS delay after putting FLL into freerun ASoC: dapm: Make enable/disable_pin work with always on widgets ASoC: arizona: Correct types of mixer texts and values ASoC: arizona: Fix type of clock rate pointer in arizona_set_sysclk ASoC: wm_adsp: Replace debugfs lock with more general DSP power lock ASoC: wm_adsp: Add power lock for firmware change control ASoC: wm_adsp: Fixup some minor formatting and checkpatch errors ASoC: wm_adsp: Add locking to DSP firmware controls ASoC: wm_adsp: Mimic legacy behaviour of reading controls when DSP is on ASoC: wm5110: Provide basic hookup for voice control ASoC: wm_adsp: Factor out finding the location of an algorithm region ALSA: compress: Add SND_AUDIOCODEC_BESPOKE ASoC: wm_adsp: Add support for opening a compressed stream ASoC: wm_adsp: Add code to locate and initialise compressed buffer ASoC: wm_adsp: Attach buffers and streams together Damien.Horsley (17): ASoC: img: Add binding document for I2S input controller ASoC: img: Add driver for I2S input controller ASoC: img: Add binding document for I2S output controller ASoC: img: Add driver for I2S output controller ASoC: img: Add binding document for parallel output controller ASoC: img: Add driver for parallel output controller ASoC: img: Add binding document for SPDIF input controller ASoC: img: Add driver for SPDIF input controller ASoC: img: Add documentation for SPDIF in controls ASoC: img: Add binding document for SPDIF output controller ASoC: img: Add driver for SPDIF output controller ASoC: img: parallel out: Add missing initialiser ASoC: Add SOC_DOUBLE_STS macro ASoC: pcm3168a: Add binding document for pcm3168a codec ASoC: pcm3168a: Add driver for pcm3168a codec ASoC: img: Add binding document for Pistachio internal DAC ASoC: img: Add driver for Pistachio internal DAC Dan Carpenter (3): ASoC: Intel: pass correct parameter in sst_alloc_stream_mrfld() ASoC: Intel: Skylake: Fix a couple signedness bugs ASoC: Intel: Skylake: pointer math issue Dharageswari R (2): ASoC: Intel: Skylake: Add support for Loadable modules ASoC: Intel: Skylake: Add support for Mic Select module Fang, Yang A (3): ASoC: Intel: Skylake: add adi + nau8825 machine driver entry ASoc: Intel: boards: fix dapm map of nau88l25_ssm4567 machine ASoc: Intel: boards: Add HDMI/DP links for nau88l25_ssm4567 machine Geert Uytterhoeven (2): ASoC: rsnd: Add missing initialization of ADG req_rate ASoC: rsrc-card: Clarify compatible value Hans de Goede (3): ASoC: sun4i-codec: Rename codec dapm widgets and routes ASoC: sun4i-codec: Add support for PA gpio pin ASoC: sun4i-codec: Use proper output for external amp routes Hardik T Shah (3): ASoC: Intel: Skylake: Add multiple pin formats ASoC: Intel: Skylake: Update the topology interface structure ASoC: Intel: Skylake: Add support for module GUIDs Harsha Priya (1): ASoC: Intel: Skylake: Adding nau88l25+ssm4567 machine driver Jean-Michel Hautbois (1): ASoC: sgtl5000: fix VAG power up timing Jeeja KP (39): ASoC: Intel: Skylake: Fix to correct check for non DSP widget ASoC: Intel: Skylake: Fix not to ignore return value in be hw_params ASoC: Intel: Skylake: Fix to add 32 bit in update FE params ASoC: Intel: Skylake: Fix to ignore codec_mask check in probe ASoC: Intel: Skylake: Fix to ignore blob check if link type is HDA ASoC: Intel: Skylake: Fix support for multiple pins in a module ASoC: Intel: Skylake: Fix bit depth when querying the NHLT blob ASoC: Intel: Skylake: use module_pin info for unbind ASoC: Intel: Skylake: Add support for virtual dsp widgets ASoC: Intel: Skylake: Fix DSP pipe underrun/overrun issue ASoC: Intel: Skylake: Fix to remove be copier widget power check ASoC: Intel: Skylake: Ignore rate check for DMIC link ASoC: Intel: Skylake: Fix to remove channel_map calculation ASoC: Intel: Skylake: Fix PM behaviour ASoC: Intel: Skylake: Fix the SSP0 Fmt fixup to 24 bit ASoC: Intel: Skylake: Add support for SSP1 BE cpu dai ASoC: Intel: Skylake: remove pm_runtime_get/put calls ASoC: Intel: Skylake: Don't enable WAKEENABLE on suspend ASoC: Intel: Skylake: Remove redundant init in resume ASoC: Intel: Skylake: Fix cleanup of dma buffer ASoC: Intel: Skylake: Reset the DSP when set D3 fails ASoC: Intel: Skylake: Fix CLDMA buffer wrap case ASoC: Intel: Skylake: Fix null ptr dereferenced in skl_tplg_bind_sinks ASoC: Intel: Skylake: Add pm ops for skl_rt286 machine ASoC: Intel: Skylake: Reconfigure HDA stream register in prepare/resume ASoC: Intel: Skylake: Fix to update bit depth for module params ASoC: Intel: Skylake: Update pcm capability ASoC: Intel: Skylake: Poll CLDMA RUN bit when set ASoC: Intel: Skylake: Update DMIC DAIs and capabilities ASoC: Intel: Skylake: Add helper routines to handle module params ASoC: Intel: Skylake: Add helper routine to handle Algo parameter ASoC: Intel: Skylake: Add support to configure module params ASoC: Intel: Skylake: Add tlv byte kcontrols ASoC: Intel: Skylake: Add memory pages to widget data. ASoC: Intel: Skylake: Fix module init data correctly ASoC: Intel: Skylake: Add dai link for DMIC capture ASoC: Intel: Skylake: Add support for active suspend ASoC: Intel: Skylake: Clear stream registers before stream setup ASoC: Intel: Skylake: Fix to set pipe state to invalid when deleting Jiada Wang (1): ASoC: wm8962: set ALC2 as non-volatile register Jie Yang (2): ASoC: Intel: sst: only select sst-firmware when DW DMAC is built-in ASoC: Intel: sst: fix sst_memcpy32 wrong with non-4x bytes issue John Keeping (4): ASoC: rockchip: i2s: separate capture and playback ASoC: rockchip: i2s: remove unused variables ASoC: es8328: Fix deemphasis values ASoC: es8328: Fix shifts for mixer switches Julia Lawall (4): ASoC: Intel: constify sst_block_ops structures ASoC: imx-pcm-dma: add NULL test ASoC: omap-hdmi-audio: add NULL test ASoC: Intel: add NULL test Koro Chen (4): ASoC: dpcm: Make BE prepare possible in suspend state ASoC: mediatek: Move 22M/24M clock control into I2S ops ASoC: mediatek: Use current HW pointer for pointer callback ASoC: mediatek: Turn AFE on/off in runtime resume/suspend Kuninori Morimoto (82): ASoC: rsnd: DMA become SSI/SRC member ASoC: rsnd: DMA related definition goes to dma.c ASoC: rsnd: rename rsnd_dma_init() to rsnd_dma_attach() ASoC: rsnd: enable to use rsnd_dai_connect() from each mod ASoC: rsnd: remove all modules when PIO fallback ASoC: rsnd: fixup rsnd_dma_of_path method for mod base common method ASoC: rsnd: move rsnd_src_ssi_irq_enable/disable() to ssi.c ASoC: rsnd: disable SRC.out only when stop timing ASoC: rsnd: rsnd_dai_stream has each mod's status insted of rsnd_mod ASoC: rsnd: Don't stop HW even if a large number of errors occur ASoC: rsnd: avoid pointless loop in rsnd_mod_interrupt() ASoC: rsnd: use common rsnd_ssi_status_xxx() ASoC: rsnd: use mod base common method on DMA phase1 ASoC: rsnd: use mod base common method on DMA phase2 ASoC: rsnd: use mod base common method on DMA phase3 ASoC: rsnd: use mod base common method on CMD ASoC: rsnd: use mod base common method on SSIU ASoC: rsnd: use mod base common method on SSI-parent ASoC: rsnd: call rsnd_src_quit() from rsnd_src_quit_gen2() ASoC: rsnd: fixup rsnd_dmapp_stop() return value ASoC: rsnd: audio_clkout0/1/2/3 are optional properties ASoC: rsnd: move CMD related operation to cmd.c ASoC: rsnd: DVC settings matches to datasheet ASoC: rsnd: MIX settings matches to datasheet ASoC: rsnd: tidyup comment position of rsnd_mod_xxx ASoC: rsnd: call clk_prepare()/clk_enable() for AUDIO_CLKx ASoC: ak4613: add single-end optional property for IN/OUT pins ASoC: ak4613: tidyup CTRL1 value selection method ASoC: rsnd: SND_SOC_RCAR doesn't depend on DMA_OF ASoC: rsnd: ssi: 24bit data needs right-aligned settings ASoC: ak4613: don't overwrite CTRL2 register ASoC: rsnd: remove Gen1 support from SRC ASoC: rsnd: cleanup RSND_REG_xxx ASoC: rsnd: SRC settings matches to datasheet ASoC: rsnd: remove platform boot support from core.c ASoC: rsnd: remove platform boot support from ssi.c ASoC: rsnd: remove platform boot support from src.c ASoC: rsnd: remove platform boot support from ctu.c ASoC: rsnd: remove platform boot support from mix.c ASoC: rsnd: remove platform boot support from dvc.c ASoC: rsnd: remove platform boot support from gen.c ASoC: rsnd: remove struct rsnd_of_data ASoC: rsnd: remove struct rcar_snd_info ASoC: rsnd: remove struct platform_device from probe/remove parameter ASoC: ak4613: tidyup vendor prefix from ak4613 to asahi-kasei ASoC: rsnd: tidyup void* cast for 64bit compiler ASoC: rsnd: indicate register name for debug ASoC: rsnd: tidyup semantics of rsnd_src_record_error() ASoC: rsnd: tidyup semantics of rsnd_ssi_record_error() ASoC: rsnd: don't use normal *mod in adg.c ASoC: rsnd: add missing ADINR::CHNUM on DVC/SRC/SSIU ASoC: rsnd: add missing SRC_O_BUSIF_MODE register ASoC: rsnd: src: rename rsnd_src_soft_reset() to rsnd_src_activation() ASoC: rsnd: mix: rename rsnd_mix_soft_reset() to rsnd_mix_activation() ASoC: rsnd: dvc: rename rsnd_dvc_soft_reset() to rsnd_dvc_activation() ASoC: rsnd: src: add rsnd_src_halt() ASoC: rsnd: mix: add rsnd_mix_halt() ASoC: rsnd: dvc: add rsnd_dvc_halt() ASoC: rsnd: add rsnd_ssi_config_init() ASoC: rsnd: set SSIWSR setting on rsnd_ssi_config_init() ASoC: rsnd: ssi enables non-stereo sound ASoC: rsnd: dvc enables non-stereo sound ASoC: rsnd: add TDM Extend Mode support ASoC: rsnd: fixup wrong snd_soc_dai_driver pointer access ASoC: rsnd: rsrc-card: check return value of snd_soc_of_get_dai_name() ASoC: rsnd: care SWSP bit for TDM/non-TDM ASoC: rsnd: tidyup data align position for capture ASoC: rsrc-card: enable to use tdm_slot on DT ASoC: rsrc-card: Remove support for setting differing DAI formats ASoC: rsrc-card: tidyup dai format for DPCM ASoC: rsnd: fixup SSIU control timing ASoC: rsnd: tidyup return value of rsnd_get_adinr_bit() ASoC: rsnd: tidyup debug print position on rsnd_dma_attach() ASoC: rsnd: rsnd_dai_connect() returns error if it connect to existing mod ASoC: rsnd: SSI/SSIU use rsnd_get_slot_extend() to check TDM ASoC: rsnd: remove rsnd_get_slot_runtime() ASoC: rsnd: tidyup rsnd_get_slot_xxx() naming ASoC: rsnd: add rsnd_set_slot() / rsnd_get_slot_num() ASoC: rsnd: add rsnd_parse_connect_common() and remove complex macro ASoC: rsnd: add missing DT example for Simple Card ASoC: rsnd: add missing DT example for Simple Card with TDM ASoC: rsnd: add Multi channel support Liam Girdwood (1): ASoC: Intel: sst: fix the IRQ locked issue Linus Walleij (2): ASoC: wm8903: Be sure to clamp return value ASoC: ac97: Be sure to clamp return value Maciej S. Szmigiero (1): ASoC: fsl-asoc-card: use different route map for AC'97 mode Mans Rullgard (3): ASoC: wm8974: set cache type for regmap ASoC: wm8974: add devicetree support ASoC: wm8974: add binding for WM8974 codec Mark Brown (37): Merge branch 'fix/rt5645' of git://git.kernel.org/.../broonie/sound into HEAD Merge branch 'fix/arizona' of git://git.kernel.org/.../broonie/sound into asoc-arizona Merge branch 'fix/rt5645' of git://git.kernel.org/.../broonie/sound into asoc-rt5645 Merge branch 'topic/pcm-list' of git://git.kernel.org/.../broonie/sound into asoc-intel Merge branch 'topic/hdac' of git://git.kernel.org/.../broonie/sound into asoc-intel ASoC: hdac: Fix Makefile and Kconfig sorting Merge branch 'topic/fsl-sai' of git://git.kernel.org/.../broonie/sound into asoc-fsl Merge branch 'fix/rt5645' of git://git.kernel.org/.../broonie/sound into asoc-rt5645 Merge branch 'topic/sink' of git://git.kernel.org/.../broonie/sound into asoc-dapm Merge branch 'fix/sun4i-codec' of git://git.kernel.org/.../broonie/sound into asoc-sunxi Merge branch 'topic/sink' of git://git.kernel.org/.../broonie/sound into asoc-intel rcar: ctu: Avoid use of ret uninitialised rcar: dvc: Avoid use of ret uninitialised rcar: mux: Avoid use of ret uninitialised Merge branch 'topic/arizona' of git://git.kernel.org/.../broonie/sound into asoc-adsp Merge branch 'topic/cs47l24' of git://git.kernel.org/.../broonie/sound into asoc-adsp Merge remote-tracking branches 'asoc/fix/davinci', 'asoc/fix/es8328', 'asoc/fix/fsl-sai', 'asoc/fix/rockchip', 'asoc/fix/sgtl5000' and 'asoc/fix/wm8974' into asoc-linus Merge remote-tracking branch 'asoc/topic/arizona' into asoc-next Merge remote-tracking branch 'asoc/topic/dapm' into asoc-next Merge remote-tracking branch 'asoc/topic/pcm-list' into asoc-next Merge remote-tracking branch 'asoc/topic/pcm3168a' into asoc-next Merge remote-tracking branch 'asoc/topic/rt5645' into asoc-next Merge remote-tracking branch 'asoc/topic/sunxi' into asoc-next Merge remote-tracking branches 'asoc/topic/ac97', 'asoc/topic/adsp', 'asoc/topic/ak4613' and 'asoc/topic/atmel' into asoc-next Merge remote-tracking branches 'asoc/topic/atmel-classd', 'asoc/topic/const' and 'asoc/topic/da7218' into asoc-next Merge remote-tracking branches 'asoc/topic/da7219', 'asoc/topic/dai-link' and 'asoc/topic/doc' into asoc-next Merge remote-tracking branches 'asoc/topic/dpcm', 'asoc/topic/dwc', 'asoc/topic/fsl', 'asoc/topic/fsl-asrc' and 'asoc/topic/fsl-esai' into asoc-next Merge remote-tracking branches 'asoc/topic/fsl-spdif', 'asoc/topic/img' and 'asoc/topic/intel' into asoc-next Merge remote-tracking branches 'asoc/topic/kcontrol', 'asoc/topic/max98357a' and 'asoc/topic/mtk' into asoc-next Merge remote-tracking branches 'asoc/topic/pxa', 'asoc/topic/qcom', 'asoc/topic/rcar', 'asoc/topic/rk3036' and 'asoc/topic/rockchip' into asoc-next Merge remote-tracking branches 'asoc/topic/rt286', 'asoc/topic/rt5616' and 'asoc/topic/rt5677' into asoc-next Merge remote-tracking branches 'asoc/topic/samsung', 'asoc/topic/sh', 'asoc/topic/ssm2518' and 'asoc/topic/sti' into asoc-next Merge remote-tracking branches 'asoc/topic/tegra', 'asoc/topic/topology', 'asoc/topic/wm8903' and 'asoc/topic/wm8904' into asoc-next Merge remote-tracking branches 'asoc/topic/wm8962', 'asoc/topic/wm8974' and 'asoc/topic/wm9713' into asoc-next Merge tag 'asoc-fix-v4.4-rc6' into asoc-linus Merge tag 'asoc-v4.5' into asoc-next Merge remote-tracking branch 'asoc/topic/rt5677' into asoc-next Markus Elfring (1): ASoC: ssm2518: Use a signed return type for ssm2518_lookup_mcs() Maruthi Srinivas Bayyavarapu (3): ASoC: dwc: add runtime suspend/resume functionality ASoC: dwc: add quirk for different register offset ASoC: dwc: reconfigure dwc in 'resume' from 'suspend' Maxime Ripard (3): ASoC: sun4i: Implement MIC1 capture ASoC: sunxi: Remove useless comments and variable ASoC: sun4i-codec: pass through clk_set_rate error Mengdong Lin (9): ASoC: topology: ABI - Rename dai_elems to pcm_elems in manifest ASoC: Vendor drivers get a link's runtime by snd_soc_get_pcm_runtime() ASoC: Change the PCM runtime array to a list ASoC: Define soc_init_dai_link() to wrap link intialization. ASoC: Change 2nd argument of soc_bind_dai_link() to DAI link pointer ASoC: Implement DAI links in a list & define API to add/remove a link ASoC: Define add/remove_dai_link ops for a soc card ASoC: soc_bind_dai_link() directly returns success for a bound DAI link ASoC: Bind new DAI links after probing components Moise Gergaud (1): ASoC: sti: set iec958 channel status sampling freq Mousami Jana (1): ASoC: Intel: Skylake: add LARGE_CONFIG_GET IPC support Mythri P K (1): ASoC: core: Pass kcontrol to bytes tlv callbacks Oder Chiou (1): ASoC: rt5645: Use the mod_delayed_work instead of the queue_delayed_work and cancel_delayed_work_sync Omair M Abdullah (2): ASoC: Intel: Skylake: update mailbox uplink window offset and size ASoC: Intel: Skylake: read params from DSP if module is on PC Liao (1): ASoC: dpcm: Apply symmetry for DPCM Peter Ujfalusi (1): ASoC: davinci-mcasp: Fix XDATA check in mcasp_start_tx Pierre-Louis Bossart (9): ASoC: Intel: boards: align pin names between byt-rt5640 drivers ASoC: Intel: boards: start merging byt-rt5640 drivers ASoC: Intel: boards: merge DMI-based quirks in bytcr-rt5640 driver ASoC: Intel: tag byt-rt5640 machine driver as deprecated ASoc: Intel: Atom: add deep buffer definitions for atom platforms ASoC: Intel: boards: add DEEP_BUFFER support for BYT/CHT/BSW ASoC: Intel: Atom: add 24-bit support for media playback and capture ASoC: Intel: Atom: clean-up compressed DAI definition ASoC: Intel: Atom: flip logic for gain Switch Praveen Diwakar (1): ASoC: Intel: Skylake: Update ignore suspend for rt286 machine Richard Fitzgerald (3): ASoC: wm8998: Remove duplicated consts ASoC: cs47l24: Add driver for Cirrus Logic CS47L24 and WM1831 codecs ASoC: arizona: In arizona_calc_fratio make new codecs the default case Robert Jarzmik (3): ASoC: wm9713: convert to regmap ASoC: wm9713: use snd_soc_*() calls to update ac97 registers ASoC: ac97: add gpio chip Rohit Ainapure (3): ASoC: max98357a: Add ACPI ID for Maxim ASoC: Intel: Add Nuvoton+Maxim machine driver entry ASoC: Intel: Skylake: Add Nuvoton Maxim machine driver Sathyanarayana Nujella (1): ASoc: Intel: boards: Add WOV as sink for nau88l25_ssm4567 machine Sebastien Guiriec (1): ASoC: Intel: bytcr_rt5640: set SSP to I2S mode 2ch Shengjiu Wang (3): ASoC: fsl_esai: spba clock is needed by esai device ASoC: fsl_spdif: spba clk is needed by spdif device ASoC: fsl_asrc: spba clock is needed by asrc device Simon Horman (1): ASoC: rsnd: Add device tree support for r8a77{79,93,94} Sjoerd Simons (1): ASoC: rockchip: spdif: Set transmit data level to 16 samples Songjun Wu (6): ASoC: Atmel: ClassD: supports mono audio ASoC: Atmel: ClassD: add GCK's parent clock in DT binding ASoC: Atmel: ClassD: unregister codec when error occurs ASoC: atmel-pdmic: add the Pulse Density Modulation Interface Controller ASoC: atmel-classd: DT binding for PDMIC driver ASoC: atmel_wm8904: add snd_soc_pm_ops Stephen Boyd (1): ASoC: qcom: Specify LE device endianness Subhransu S. Prusty (7): ASoC: Intel: Skylake: Fix to cleanup if skl_sst_dsp_init fails ALSA: hdac: structure definition for ext_dma_params ASoC: hdac-hdmi: Add hdmi driver ASoC: hdac_hdmi: Add PM support for HDMI ASoC: hdac_hdmi: Add hdac hdmi dai ops ASoC: hdac_hdmi: Setup and start infoframe ASoC: hdac_hdmi: Use i915 component framework for PM Sudip Mukherjee (3): ASoC: hdac_hdmi: fix possible NULL dereference ASoC: tegra_alc5632: check return value ASoC: hdac_hdmi: check error return Sugar Zhang (2): ASoC: rockchip: i2s: compatible with different chips ASoC: rockchip: add playback property Takashi Iwai (1): ASoC: Fix typo in kernel doc comment for snd_soc_put_volsw_sx() Vincent Stehlé (1): ASoC: Intel: Skylake: fix typo in sizeof Vinod Koul (20): ASoC: Intel: Skylake: Fix substream dereference before check ASoC: Intel: Skylake: Fix resource cleanup on teardown ASoC: Intel: Move apci find machine routines ASoC: Intel: Atom: move atom driver to common acpi match ASoC: Intel: Skylake: Fix skl machine driver creation ASoC: Intel: add fw name to common dsp context ASoC: Intel: Skylake: Use the fw name from ACPI mach table ASoC: rt286: set combo jack for Skylake ASoC: core: refactor soc_link_dai_widgets() ASoC: Intel: Skylake: Add I2C depends for SKL machine ASoC: Intel: Skylake: Constrain the audio devices ASoC: fsl-asoc-card: Update the rtd query ASoC: Intel: Skylake: Update the rtd query ASoC: Intel: Skylake: Fix test of a field address ASoC: hdac-hdmi: make driver select CONFIG_HDMI ASoC: dapm: add a dapm sink widget ASoC: core: mark SND_SOC_BYTES_EXT as deprecated ASoC: Intel: Skylake: Move up pipe mem free ASoC: Intel: Skylake: add wov as int sink ASoC: Intel: Skylake: Fix the dapm machine map Yong Zhi (2): ASoc: Intel: boards: update ignore suspend for nau88l25_ssm4567 machine ASoc: Intel: boards: update constraints for nau88l25_ssm4567 machine ZhengShunQian (2): ASoC: rk3036: Inno codec driver for RK3036 SoC ASoC: rk3036: Add binding doc of inno-rk3036 codec driver Zidan Wang (10): ASoC: fsl_esai: ETDR and TX0~5 registers are non volatile ASoC: fsl-sai: add default register map for regmap cache ASoC: fsl_spdif: STL and STR registers are non volatile ASoC: fsl_ssi: using macro for default register map ASoC: fsl-sai: don't set bclk for Tx/Rx Synchronous with another SAI mode ASoC: fsl-sai: set xCR4/xCR5/xMR for SAI master mode ASoC: fsl_sai: add tdm slots operation support ASoC: fsl: using params_width function to simplify code ASoC: fsl_sai: fix no frame clk in master mode ASoC: fsl_asrc: add support for 8-30kHz output sample rate kbuild test robot (2): ASoC: rk3036: fix platform_no_drv_owner.cocci warnings ASoC: da7218: fix boolreturn.cocci warnings Documentation/devicetree/bindings/sound/ak4613.txt | 10 + .../devicetree/bindings/sound/atmel-classd.txt | 6 + .../devicetree/bindings/sound/atmel-pdmic.txt | 55 + Documentation/devicetree/bindings/sound/da7218.txt | 104 + Documentation/devicetree/bindings/sound/da7219.txt | 8 +- .../devicetree/bindings/sound/fsl,asrc.txt | 5 + .../devicetree/bindings/sound/fsl,esai.txt | 5 + .../devicetree/bindings/sound/fsl,spdif.txt | 5 + .../devicetree/bindings/sound/img,i2s-in.txt | 47 + .../devicetree/bindings/sound/img,i2s-out.txt | 51 + .../devicetree/bindings/sound/img,parallel-out.txt | 44 + .../bindings/sound/img,pistachio-internal-dac.txt | 18 + .../devicetree/bindings/sound/img,spdif-in.txt | 41 + .../devicetree/bindings/sound/img,spdif-out.txt | 44 + .../devicetree/bindings/sound/inno-rk3036.txt | 20 + .../devicetree/bindings/sound/renesas,rsnd.txt | 82 + .../bindings/sound/renesas,rsrc-card.txt | 4 +- .../devicetree/bindings/sound/rockchip-i2s.txt | 2 + Documentation/devicetree/bindings/sound/rt5616.txt | 26 + Documentation/devicetree/bindings/sound/rt5659.txt | 75 + Documentation/devicetree/bindings/sound/rt5677.txt | 2 +- .../devicetree/bindings/sound/sun4i-codec.txt | 3 + .../devicetree/bindings/sound/ti,pcm3168a.txt | 48 + .../devicetree/bindings/sound/wlf,wm8974.txt | 15 + Documentation/sound/alsa/img,spdif-in.txt | 49 + arch/arm/mach-s3c64xx/dev-audio.c | 47 +- arch/arm/mach-s3c64xx/include/mach/dma.h | 52 +- arch/arm/plat-samsung/devs.c | 23 +- arch/x86/include/asm/platform_sst_audio.h | 1 + drivers/dma/Kconfig | 2 +- include/linux/platform_data/asoc-s3c.h | 8 + include/sound/ac97_codec.h | 3 + include/sound/da7218.h | 109 + include/sound/da7219.h | 14 +- include/sound/designware_i2s.h | 5 + include/sound/hdaudio_ext.h | 6 + include/sound/rt5659.h | 49 + include/sound/soc-dapm.h | 4 + include/sound/soc-topology.h | 6 +- include/sound/soc.h | 42 +- include/uapi/sound/asoc.h | 2 +- include/uapi/sound/compress_params.h | 5 +- sound/soc/Kconfig | 1 + sound/soc/Makefile | 1 + sound/soc/atmel/Kconfig | 9 + sound/soc/atmel/Makefile | 2 + sound/soc/atmel/atmel-classd.c | 26 +- sound/soc/atmel/atmel-pdmic.c | 738 ++++ sound/soc/atmel/atmel-pdmic.h | 80 + sound/soc/atmel/atmel_wm8904.c | 1 + sound/soc/codecs/Kconfig | 56 +- sound/soc/codecs/Makefile | 18 + sound/soc/codecs/ak4613.c | 118 +- sound/soc/codecs/arizona.c | 143 +- sound/soc/codecs/arizona.h | 17 +- sound/soc/codecs/cs47l24.c | 1148 ++++++ sound/soc/codecs/cs47l24.h | 23 + sound/soc/codecs/da7218.c | 3314 +++++++++++++++ sound/soc/codecs/da7218.h | 1414 +++++++ sound/soc/codecs/da7219.c | 89 +- sound/soc/codecs/da7219.h | 9 - sound/soc/codecs/es8328.c | 25 +- sound/soc/codecs/es8328.h | 1 + sound/soc/codecs/hdac_hdmi.c | 659 +++ sound/soc/codecs/inno_rk3036.c | 490 +++ sound/soc/codecs/inno_rk3036.h | 123 + sound/soc/codecs/max98357a.c | 10 + sound/soc/codecs/pcm3168a-i2c.c | 66 + sound/soc/codecs/pcm3168a-spi.c | 65 + sound/soc/codecs/pcm3168a.c | 767 ++++ sound/soc/codecs/pcm3168a.h | 100 + sound/soc/codecs/rt286.c | 6 + sound/soc/codecs/rt298.c | 2 - sound/soc/codecs/rt5616.c | 1381 +++++++ sound/soc/codecs/rt5616.h | 1819 +++++++++ sound/soc/codecs/rt5645.c | 292 +- sound/soc/codecs/rt5659.c | 4223 ++++++++++++++++++++ sound/soc/codecs/rt5659.h | 1819 +++++++++ sound/soc/codecs/rt5677.c | 13 +- sound/soc/codecs/sgtl5000.c | 1 + sound/soc/codecs/ssm2518.c | 2 +- sound/soc/codecs/wm5110.c | 206 +- sound/soc/codecs/wm8903.c | 2 +- sound/soc/codecs/wm8904.c | 2 +- sound/soc/codecs/wm8962.c | 3 +- sound/soc/codecs/wm8974.c | 8 + sound/soc/codecs/wm8998.c | 46 +- sound/soc/codecs/wm9713.c | 296 +- sound/soc/codecs/wm_adsp.c | 769 +++- sound/soc/codecs/wm_adsp.h | 23 +- sound/soc/davinci/davinci-mcasp.c | 4 +- sound/soc/dwc/designware_i2s.c | 113 +- sound/soc/fsl/fsl-asoc-card.c | 21 +- sound/soc/fsl/fsl_asrc.c | 55 +- sound/soc/fsl/fsl_asrc.h | 2 + sound/soc/fsl/fsl_esai.c | 63 +- sound/soc/fsl/fsl_sai.c | 116 +- sound/soc/fsl/fsl_sai.h | 3 + sound/soc/fsl/fsl_spdif.c | 35 +- sound/soc/fsl/fsl_ssi.c | 25 +- sound/soc/fsl/imx-pcm-dma.c | 2 + sound/soc/fsl/imx-pcm-fiq.c | 4 +- sound/soc/fsl/imx-wm8962.c | 10 +- sound/soc/generic/simple-card.c | 12 +- sound/soc/img/Kconfig | 52 + sound/soc/img/Makefile | 7 + sound/soc/img/img-i2s-in.c | 516 +++ sound/soc/img/img-i2s-out.c | 565 +++ sound/soc/img/img-parallel-out.c | 327 ++ sound/soc/img/img-spdif-in.c | 806 ++++ sound/soc/img/img-spdif-out.c | 441 ++ sound/soc/img/pistachio-internal-dac.c | 287 ++ sound/soc/intel/Kconfig | 46 +- sound/soc/intel/atom/sst-atom-controls.c | 5 +- sound/soc/intel/atom/sst-atom-controls.h | 1 + sound/soc/intel/atom/sst-mfld-platform-pcm.c | 32 +- sound/soc/intel/atom/sst/sst_acpi.c | 67 +- sound/soc/intel/atom/sst/sst_stream.c | 2 +- sound/soc/intel/baytrail/sst-baytrail-pcm.c | 2 + sound/soc/intel/boards/Makefile | 4 + sound/soc/intel/boards/bytcr_rt5640.c | 241 +- sound/soc/intel/boards/cht_bsw_max98090_ti.c | 19 +- sound/soc/intel/boards/cht_bsw_rt5645.c | 19 +- sound/soc/intel/boards/cht_bsw_rt5672.c | 19 +- sound/soc/intel/boards/skl_nau88l25_max98357a.c | 485 +++ sound/soc/intel/boards/skl_nau88l25_ssm4567.c | 536 +++ sound/soc/intel/boards/skl_rt286.c | 128 +- sound/soc/intel/common/Makefile | 7 +- sound/soc/intel/common/sst-acpi.c | 41 +- sound/soc/intel/common/sst-acpi.h | 33 + sound/soc/intel/common/sst-dsp-priv.h | 8 +- sound/soc/intel/common/sst-dsp.c | 2 +- sound/soc/intel/common/sst-dsp.h | 2 +- sound/soc/intel/common/sst-firmware.c | 20 +- sound/soc/intel/common/sst-match-acpi.c | 43 + sound/soc/intel/haswell/sst-haswell-dsp.c | 2 +- sound/soc/intel/haswell/sst-haswell-ipc.c | 31 +- sound/soc/intel/skylake/skl-messages.c | 280 +- sound/soc/intel/skylake/skl-nhlt.c | 19 +- sound/soc/intel/skylake/skl-pcm.c | 256 +- sound/soc/intel/skylake/skl-sst-cldma.c | 97 +- sound/soc/intel/skylake/skl-sst-dsp.h | 21 +- sound/soc/intel/skylake/skl-sst-ipc.c | 108 +- sound/soc/intel/skylake/skl-sst-ipc.h | 9 + sound/soc/intel/skylake/skl-sst.c | 217 +- sound/soc/intel/skylake/skl-topology.c | 658 ++- sound/soc/intel/skylake/skl-topology.h | 63 +- sound/soc/intel/skylake/skl-tplg-interface.h | 105 +- sound/soc/intel/skylake/skl.c | 158 +- sound/soc/intel/skylake/skl.h | 6 +- sound/soc/mediatek/mtk-afe-common.h | 1 - sound/soc/mediatek/mtk-afe-pcm.c | 59 +- sound/soc/omap/omap-hdmi-audio.c | 2 + sound/soc/pxa/brownstone.c | 3 +- sound/soc/pxa/mioa701_wm9713.c | 6 +- sound/soc/qcom/lpass-cpu.c | 1 + sound/soc/rockchip/rockchip_i2s.c | 130 +- sound/soc/rockchip/rockchip_max98090.c | 6 + sound/soc/rockchip/rockchip_rt5645.c | 6 + sound/soc/rockchip/rockchip_spdif.c | 6 +- sound/soc/rockchip/rockchip_spdif.h | 2 +- sound/soc/samsung/Kconfig | 2 - sound/soc/samsung/ac97.c | 29 +- sound/soc/samsung/bells.c | 40 +- sound/soc/samsung/dma.h | 6 +- sound/soc/samsung/dmaengine.c | 20 +- sound/soc/samsung/i2s.c | 31 +- sound/soc/samsung/littlemill.c | 32 +- sound/soc/samsung/odroidx2_max98090.c | 9 +- sound/soc/samsung/pcm.c | 25 +- sound/soc/samsung/s3c2412-i2s.c | 16 +- sound/soc/samsung/s3c24xx-i2s.c | 16 +- sound/soc/samsung/snow.c | 9 +- sound/soc/samsung/spdif.c | 17 +- sound/soc/samsung/speyside.c | 12 +- sound/soc/samsung/tobermory.c | 21 +- sound/soc/sh/Kconfig | 1 - sound/soc/sh/fsi.c | 11 +- sound/soc/sh/rcar/Makefile | 2 +- sound/soc/sh/rcar/adg.c | 118 +- sound/soc/sh/rcar/cmd.c | 171 + sound/soc/sh/rcar/core.c | 586 +-- sound/soc/sh/rcar/ctu.c | 99 +- sound/soc/sh/rcar/dma.c | 245 +- sound/soc/sh/rcar/dvc.c | 273 +- sound/soc/sh/rcar/gen.c | 133 +- sound/soc/sh/rcar/mix.c | 158 +- sound/soc/sh/rcar/rcar_snd.h | 117 - sound/soc/sh/rcar/rsnd.h | 335 +- sound/soc/sh/rcar/rsrc-card.c | 129 +- sound/soc/sh/rcar/src.c | 898 ++--- sound/soc/sh/rcar/ssi.c | 744 ++-- sound/soc/sh/rcar/ssiu.c | 225 ++ sound/soc/soc-ac97.c | 125 + sound/soc/soc-core.c | 602 ++- sound/soc/soc-dapm.c | 14 +- sound/soc/soc-ops.c | 4 +- sound/soc/soc-pcm.c | 82 +- sound/soc/sti/uniperif_player.c | 3 +- sound/soc/sunxi/sun4i-codec.c | 279 +- sound/soc/tegra/tegra_alc5632.c | 12 +- sound/soc/tegra/tegra_wm8903.c | 3 +- 202 files changed, 30532 insertions(+), 4175 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/atmel-pdmic.txt create mode 100644 Documentation/devicetree/bindings/sound/da7218.txt create mode 100644 Documentation/devicetree/bindings/sound/img,i2s-in.txt create mode 100644 Documentation/devicetree/bindings/sound/img,i2s-out.txt create mode 100644 Documentation/devicetree/bindings/sound/img,parallel-out.txt create mode 100644 Documentation/devicetree/bindings/sound/img,pistachio-internal-dac.txt create mode 100644 Documentation/devicetree/bindings/sound/img,spdif-in.txt create mode 100644 Documentation/devicetree/bindings/sound/img,spdif-out.txt create mode 100644 Documentation/devicetree/bindings/sound/inno-rk3036.txt create mode 100644 Documentation/devicetree/bindings/sound/rt5616.txt create mode 100644 Documentation/devicetree/bindings/sound/rt5659.txt create mode 100644 Documentation/devicetree/bindings/sound/ti,pcm3168a.txt create mode 100644 Documentation/devicetree/bindings/sound/wlf,wm8974.txt create mode 100644 Documentation/sound/alsa/img,spdif-in.txt create mode 100644 include/sound/da7218.h create mode 100644 include/sound/rt5659.h create mode 100644 sound/soc/atmel/atmel-pdmic.c create mode 100644 sound/soc/atmel/atmel-pdmic.h create mode 100644 sound/soc/codecs/cs47l24.c create mode 100644 sound/soc/codecs/cs47l24.h create mode 100644 sound/soc/codecs/da7218.c create mode 100644 sound/soc/codecs/da7218.h create mode 100644 sound/soc/codecs/hdac_hdmi.c create mode 100644 sound/soc/codecs/inno_rk3036.c create mode 100644 sound/soc/codecs/inno_rk3036.h create mode 100644 sound/soc/codecs/pcm3168a-i2c.c create mode 100644 sound/soc/codecs/pcm3168a-spi.c create mode 100644 sound/soc/codecs/pcm3168a.c create mode 100644 sound/soc/codecs/pcm3168a.h create mode 100644 sound/soc/codecs/rt5616.c create mode 100644 sound/soc/codecs/rt5616.h create mode 100644 sound/soc/codecs/rt5659.c create mode 100644 sound/soc/codecs/rt5659.h create mode 100644 sound/soc/img/Kconfig create mode 100644 sound/soc/img/Makefile create mode 100644 sound/soc/img/img-i2s-in.c create mode 100644 sound/soc/img/img-i2s-out.c create mode 100644 sound/soc/img/img-parallel-out.c create mode 100644 sound/soc/img/img-spdif-in.c create mode 100644 sound/soc/img/img-spdif-out.c create mode 100644 sound/soc/img/pistachio-internal-dac.c create mode 100644 sound/soc/intel/boards/skl_nau88l25_max98357a.c create mode 100644 sound/soc/intel/boards/skl_nau88l25_ssm4567.c create mode 100644 sound/soc/intel/common/sst-acpi.h create mode 100644 sound/soc/intel/common/sst-match-acpi.c create mode 100644 sound/soc/sh/rcar/cmd.c delete mode 100644 sound/soc/sh/rcar/rcar_snd.h create mode 100644 sound/soc/sh/rcar/ssiu.c

2 1

[alsa-devel] [GIT PULL] ASoC fixes for v4.4
by Mark Brown 23 Dec '15

23 Dec '15

The following changes since commit 4ef7675344d687a0ef5b0d7c0cee12da005870c0: Linux 4.4-rc6 (2015-12-20 16:06:09 -0800) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git asoc-fix-v4.4-rc6 for you to fetch changes up to 3dd5fc0eeb5d7cc07b8e3e383037261799b38897: Merge remote-tracking branches 'asoc/fix/davinci', 'asoc/fix/es8328', 'asoc/fix/fsl-sai', 'asoc/fix/rockchip', 'asoc/fix/sgtl5000' and 'asoc/fix/wm8974' into asoc-linus (2015-12-23 00:23:27 +0000) ---------------------------------------------------------------- ASoC: Fixes for v4.4 A collection of small driver specific fixes here, nothing that'll affect users who don't have the devices concerned. At least the wm8974 bug indicates that there's not too many users of some of these devices. ---------------------------------------------------------------- Jean-Michel Hautbois (1): ASoC: sgtl5000: fix VAG power up timing John Keeping (2): ASoC: es8328: Fix deemphasis values ASoC: es8328: Fix shifts for mixer switches Mans Rullgard (1): ASoC: wm8974: set cache type for regmap Mark Brown (1): Merge remote-tracking branches 'asoc/fix/davinci', 'asoc/fix/es8328', 'asoc/fix/fsl-sai', 'asoc/fix/rockchip', 'asoc/fix/sgtl5000' and 'asoc/fix/wm8974' into asoc-linus Peter Ujfalusi (1): ASoC: davinci-mcasp: Fix XDATA check in mcasp_start_tx Sjoerd Simons (1): ASoC: rockchip: spdif: Set transmit data level to 16 samples Zidan Wang (1): ASoC: fsl_sai: fix no frame clk in master mode sound/soc/codecs/es8328.c | 25 +++++++++++++++++-------- sound/soc/codecs/es8328.h | 1 + sound/soc/codecs/sgtl5000.c | 1 + sound/soc/codecs/wm8974.c | 1 + sound/soc/davinci/davinci-mcasp.c | 4 ++-- sound/soc/fsl/fsl_sai.c | 18 ++++++++++++++++++ sound/soc/rockchip/rockchip_spdif.c | 6 ++++-- sound/soc/rockchip/rockchip_spdif.h | 2 +- 8 files changed, 45 insertions(+), 13 deletions(-)

2 2

[alsa-devel] [PATCH 0/4] add NULL test
by Julia Lawall 23 Dec '15

23 Dec '15

4 10

[alsa-devel] [PATCH] ASoC: rt5677: set PLL_CTRL2 non-volatile
by Bard Liao 23 Dec '15

23 Dec '15

There is a status bit on RT5677_PLL1_CTRL2 and RT5677_PLL2_CTRL2. That's why those registers are set volatile. However, the status bit is currently not used by codec driver. So, it should be no problem if we set them non-volatile. The purpose of setting them non-volatile is to restore the setting after a syspend/resume cycle. Signed-off-by: Bard Liao <bardliao(a)realtek.com> --- Mark, Please revert the "ASoC: rt5677: Reconfigure PLL1 after resume" patch before applying this patch. Thanks. --- sound/soc/codecs/rt5677.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/sound/soc/codecs/rt5677.c b/sound/soc/codecs/rt5677.c index f73fd12..13fef00 100644 --- a/sound/soc/codecs/rt5677.c +++ b/sound/soc/codecs/rt5677.c @@ -297,8 +297,6 @@ static bool rt5677_volatile_register(struct device *dev, unsigned int reg) case RT5677_HAP_GENE_CTRL2: case RT5677_PWR_DSP_ST: case RT5677_PRIV_DATA: - case RT5677_PLL1_CTRL2: - case RT5677_PLL2_CTRL2: case RT5677_ASRC_22: case RT5677_ASRC_23: case RT5677_VAD_CTRL5: -- 1.8.1.1.439.g50a6b54

2 1

[alsa-devel] [PATCH v2 0/8] Add support for voice control on Arizona ADSP
by Charles Keepax 23 Dec '15

23 Dec '15

This series add support for voice control on wm8280/5110. This is done by opening a compressed record channel, upon which data will be available once the voice control functionality has been triggered on the DSP. Changes since v1: - Merged selecting of SND_SOC_COMPRESS into patch adding basic hookup as suggested by Vinod. - Fixed a minor typo in usleep_delay, which was using a longer delay than required. - Use kcalloc to allocate an array rather than caculating size manually. Thanks, Charles Charles Keepax (8): ASoC: wm5110: Provide basic hookup for voice control ASoC: wm_adsp: Factor out finding the location of an algorithm region ALSA: compress: Add SND_AUDIOCODEC_BESPOKE ASoC: wm_adsp: Add support for opening a compressed stream ASoC: wm_adsp: Add code to locate and initialise compressed buffer ASoC: wm_adsp: Attach buffers and streams together ASoC: wm_adsp: Add a handler for the compressed IRQ ASoC: wm_adsp: Pull data through compressed read include/uapi/sound/compress_params.h | 5 +- sound/soc/codecs/Kconfig | 1 + sound/soc/codecs/arizona.h | 2 +- sound/soc/codecs/wm5110.c | 95 +++- sound/soc/codecs/wm_adsp.c | 907 ++++++++++++++++++++++++++++++++++- sound/soc/codecs/wm_adsp.h | 21 + 6 files changed, 1010 insertions(+), 21 deletions(-) -- 2.1.4

2 10

[alsa-devel] [PATCH 01/13] ASoC: wm_adsp: Fixup some minor formatting and checkpatch errors
by Charles Keepax 23 Dec '15

23 Dec '15

Signed-off-by: Charles Keepax <ckeepax(a)opensource.wolfsonmicro.com> --- sound/soc/codecs/wm_adsp.c | 27 +++++++++++++-------------- sound/soc/codecs/wm_adsp.h | 4 ++-- 2 files changed, 15 insertions(+), 16 deletions(-) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 905ae99..3808190 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -544,10 +544,10 @@ static void wm_adsp2_show_fw_status(struct wm_adsp *dsp) be16_to_cpu(scratch[3])); } -static int wm_coeff_info(struct snd_kcontrol *kcontrol, +static int wm_coeff_info(struct snd_kcontrol *kctl, struct snd_ctl_elem_info *uinfo) { - struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value; + struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kctl->private_value; uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; uinfo->count = ctl->len; @@ -593,10 +593,10 @@ static int wm_coeff_write_control(struct wm_coeff_ctl *ctl, return 0; } -static int wm_coeff_put(struct snd_kcontrol *kcontrol, +static int wm_coeff_put(struct snd_kcontrol *kctl, struct snd_ctl_elem_value *ucontrol) { - struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value; + struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kctl->private_value; char *p = ucontrol->value.bytes.data; memcpy(ctl->cache, p, ctl->len); @@ -647,10 +647,10 @@ static int wm_coeff_read_control(struct wm_coeff_ctl *ctl, return 0; } -static int wm_coeff_get(struct snd_kcontrol *kcontrol, +static int wm_coeff_get(struct snd_kcontrol *kctl, struct snd_ctl_elem_value *ucontrol) { - struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value; + struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kctl->private_value; char *p = ucontrol->value.bytes.data; if (ctl->flags & WMFW_CTL_FLAG_VOLATILE) { @@ -829,8 +829,7 @@ static int wm_adsp_create_control(struct wm_adsp *dsp, break; } - list_for_each_entry(ctl, &dsp->ctl_list, - list) { + list_for_each_entry(ctl, &dsp->ctl_list, list) { if (!strcmp(ctl->name, name)) { if (!ctl->enabled) ctl->enabled = 1; @@ -1109,7 +1108,7 @@ static int wm_adsp_load(struct wm_adsp *dsp) goto out_fw; } - header = (void*)&firmware->data[0]; + header = (void *)&firmware->data[0]; if (memcmp(&header->magic[0], "WMFW", 4) != 0) { adsp_err(dsp, "%s: invalid magic\n", file); @@ -1189,7 +1188,7 @@ static int wm_adsp_load(struct wm_adsp *dsp) offset = le32_to_cpu(region->offset) & 0xffffff; type = be32_to_cpu(region->type) & 0xff; mem = wm_adsp_find_region(dsp, type); - + switch (type) { case WMFW_NAME_TEXT: region_name = "Firmware name"; @@ -1646,7 +1645,7 @@ static int wm_adsp_load_coeff(struct wm_adsp *dsp) goto out_fw; } - hdr = (void*)&firmware->data[0]; + hdr = (void *)&firmware->data[0]; if (memcmp(hdr->magic, "WMDR", 4) != 0) { adsp_err(dsp, "%s: invalid magic\n", file); goto out_fw; @@ -1672,7 +1671,7 @@ static int wm_adsp_load_coeff(struct wm_adsp *dsp) blocks = 0; while (pos < firmware->size && pos - firmware->size > sizeof(*blk)) { - blk = (void*)(&firmware->data[pos]); + blk = (void *)(&firmware->data[pos]); type = le16_to_cpu(blk->type); offset = le16_to_cpu(blk->offset); @@ -1816,7 +1815,7 @@ int wm_adsp1_event(struct snd_soc_dapm_widget *w, struct wm_adsp_alg_region *alg_region; struct wm_coeff_ctl *ctl; int ret; - int val; + unsigned int val; dsp->card = codec->component.card; @@ -1829,7 +1828,7 @@ int wm_adsp1_event(struct snd_soc_dapm_widget *w, * For simplicity set the DSP clock rate to be the * SYSCLK rate rather than making it configurable. */ - if(dsp->sysclk_reg) { + if (dsp->sysclk_reg) { ret = regmap_read(dsp->regmap, dsp->sysclk_reg, &val); if (ret != 0) { adsp_err(dsp, "Failed to read SYSCLK state: %d\n", diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 2d117cf..89b7d71 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -45,8 +45,8 @@ struct wm_adsp { struct list_head alg_regions; - int fw_id; - int fw_id_version; + unsigned int fw_id; + unsigned int fw_id_version; const struct wm_adsp_region *mem; int num_mems; -- 2.1.4

3 22

[alsa-devel] [PATCH v2] ALSA: compress: Add SND_AUDIOCODEC_BESPOKE
by Charles Keepax 23 Dec '15

23 Dec '15

When working with the compressed framework occasionally vendors will use esoteric internal audio formats. For such formats it doesn't really make sense to add an new define to the kernel as their use is not sufficiently general. This patch adds a new define SND_AUDIOCODEC_BESPOKE that vendors can use in such situations. Signed-off-by: Charles Keepax <ckeepax(a)opensource.wolfsonmicro.com> --- Changes since v1: - Added a comment to note that users of BESPOKE are free to use the reserved space in snd_enc_generic. Thanks, Charles include/uapi/sound/compress_params.h | 5 +++-- 1 files changed, 3 insertions(+), 2 deletions(-) diff --git a/include/uapi/sound/compress_params.h b/include/uapi/sound/compress_params.h index d9bd9ca..9625484 100644 --- a/include/uapi/sound/compress_params.h +++ b/include/uapi/sound/compress_params.h @@ -73,7 +73,8 @@ #define SND_AUDIOCODEC_IEC61937 ((__u32) 0x0000000B) #define SND_AUDIOCODEC_G723_1 ((__u32) 0x0000000C) #define SND_AUDIOCODEC_G729 ((__u32) 0x0000000D) -#define SND_AUDIOCODEC_MAX SND_AUDIOCODEC_G729 +#define SND_AUDIOCODEC_BESPOKE ((__u32) 0x0000000E) +#define SND_AUDIOCODEC_MAX SND_AUDIOCODEC_BESPOKE /* * Profile and modes are listed with bit masks. This allows for a @@ -312,7 +313,7 @@ struct snd_enc_flac { struct snd_enc_generic { __u32 bw; /* encoder bandwidth */ - __s32 reserved[15]; + __s32 reserved[15]; /* Can be used for SND_AUDIOCODEC_BESPOKE */ } __attribute__((packed, aligned(4))); union snd_codec_options { -- 1.7.2.5

3 2

[alsa-devel] [PATCH 53/54] sound: soc: ac97: Be sure to clamp return value
by Linus Walleij 23 Dec '15

23 Dec '15

As we want gpio_chip .get() calls to be able to return negative error codes and propagate to drivers, we need to go over all drivers and make sure their return values are clamped to [0,1]. We do this by using the ret = !!(val) design pattern. Cc: Liam Girdwood <lgirdwood(a)gmail.com> Cc: alsa-devel(a)alsa-project.org Cc: Mark Brown <broonie(a)kernel.org> Signed-off-by: Linus Walleij <linus.walleij(a)linaro.org> --- Mark: as mentioned in 00/54: either apply this directly or ACK it and I will take it into the GPIO tree. --- sound/soc/soc-ac97.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/soc-ac97.c b/sound/soc/soc-ac97.c index a2012652f212..7e0acd83b0e6 100644 --- a/sound/soc/soc-ac97.c +++ b/sound/soc/soc-ac97.c @@ -92,7 +92,7 @@ static int snd_soc_ac97_gpio_get(struct gpio_chip *chip, unsigned offset) dev_dbg(codec->dev, "get gpio %d : %d\n", offset, ret < 0 ? ret : ret & (1 << offset)); - return ret < 0 ? ret : ret & (1 << offset); + return ret < 0 ? ret : !!(ret & (1 << offset)); } static void snd_soc_ac97_gpio_set(struct gpio_chip *chip, unsigned offset, -- 2.4.3

2 1

[alsa-devel] [PATCH] ASoC: rt5616: Return error if device ID mismatch
by Axel Lin 23 Dec '15

23 Dec '15

Signed-off-by: Axel Lin <axel.lin(a)ingics.com> --- sound/soc/codecs/rt5616.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/rt5616.c b/sound/soc/codecs/rt5616.c index f4005cb..0e9414a 100644 --- a/sound/soc/codecs/rt5616.c +++ b/sound/soc/codecs/rt5616.c @@ -1314,7 +1314,7 @@ static int rt5616_i2c_probe(struct i2c_client *i2c, dev_err(&i2c->dev, "Device with ID register %#x is not rt5616\n", val); - ret = -ENODEV; + return -ENODEV; } regmap_write(rt5616->regmap, RT5616_RESET, 0); regmap_update_bits(rt5616->regmap, RT5616_PWR_ANLG1, -- 2.1.4

3 2

[alsa-devel] [PATCH] ASoC: mediatek: Turn AFE on/off in runtime resume/suspend
by Koro Chen 23 Dec '15

23 Dec '15

AFE is actually allowed to be turn on before configuration of DAIs since each DAI has its own enabling control. Turn on/off AFE in runtime resume/suspend to avoid AFE being shut down when closing a DAI while other DAIs are still active. Signed-off-by: Koro Chen <koro.chen(a)mediatek.com> --- sound/soc/mediatek/mtk-afe-pcm.c | 24 ++++++------------------ 1 file changed, 6 insertions(+), 18 deletions(-) diff --git a/sound/soc/mediatek/mtk-afe-pcm.c b/sound/soc/mediatek/mtk-afe-pcm.c index 5399a0e..08af9f5 100644 --- a/sound/soc/mediatek/mtk-afe-pcm.c +++ b/sound/soc/mediatek/mtk-afe-pcm.c @@ -382,9 +382,6 @@ static void mtk_afe_i2s_shutdown(struct snd_pcm_substream *substream, AUD_TCON0_PDN_22M | AUD_TCON0_PDN_24M, AUD_TCON0_PDN_22M | AUD_TCON0_PDN_24M); mtk_afe_dais_disable_clks(afe, afe->clocks[MTK_CLK_I2S1_M], NULL); - - /* disable AFE */ - regmap_update_bits(afe->regmap, AFE_DAC_CON0, 0x1, 0); } static int mtk_afe_i2s_prepare(struct snd_pcm_substream *substream, @@ -433,9 +430,6 @@ static void mtk_afe_hdmi_shutdown(struct snd_pcm_substream *substream, mtk_afe_dais_disable_clks(afe, afe->clocks[MTK_CLK_I2S3_M], afe->clocks[MTK_CLK_I2S3_B]); - - /* disable AFE */ - regmap_update_bits(afe->regmap, AFE_DAC_CON0, 0x1, 0); } static int mtk_afe_hdmi_prepare(struct snd_pcm_substream *substream, @@ -679,17 +673,6 @@ static int mtk_afe_dais_hw_free(struct snd_pcm_substream *substream, return snd_pcm_lib_free_pages(substream); } -static int mtk_afe_dais_prepare(struct snd_pcm_substream *substream, - struct snd_soc_dai *dai) -{ - struct snd_soc_pcm_runtime *rtd = substream->private_data; - struct mtk_afe *afe = snd_soc_platform_get_drvdata(rtd->platform); - - /* enable AFE */ - regmap_update_bits(afe->regmap, AFE_DAC_CON0, 0x1, 0x1); - return 0; -} - static int mtk_afe_dais_trigger(struct snd_pcm_substream *substream, int cmd, struct snd_soc_dai *dai) { @@ -757,7 +740,6 @@ static const struct snd_soc_dai_ops mtk_afe_dai_ops = { .shutdown = mtk_afe_dais_shutdown, .hw_params = mtk_afe_dais_hw_params, .hw_free = mtk_afe_dais_hw_free, - .prepare = mtk_afe_dais_prepare, .trigger = mtk_afe_dais_trigger, }; @@ -1118,6 +1100,9 @@ static int mtk_afe_runtime_suspend(struct device *dev) { struct mtk_afe *afe = dev_get_drvdata(dev); + /* disable AFE */ + regmap_update_bits(afe->regmap, AFE_DAC_CON0, 0x1, 0); + /* disable AFE clk */ regmap_update_bits(afe->regmap, AUDIO_TOP_CON0, AUD_TCON0_PDN_AFE, AUD_TCON0_PDN_AFE); @@ -1164,6 +1149,9 @@ static int mtk_afe_runtime_resume(struct device *dev) /* unmask all IRQs */ regmap_update_bits(afe->regmap, AFE_IRQ_MCU_EN, 0xff, 0xff); + + /* enable AFE */ + regmap_update_bits(afe->regmap, AFE_DAC_CON0, 0x1, 0x1); return 0; err_bck0: -- 1.7.9.5

2 1

[alsa-devel] [PATCH 1/2] ASoC: rt5616: add an of_match table
by Caesar Wang 23 Dec '15

23 Dec '15

Add a device tree match table. This serves to make the driver's support of device tree more explicit. Signed-off-by: Caesar Wang <wxt(a)rock-chips.com> --- sound/soc/codecs/rt5616.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/sound/soc/codecs/rt5616.c b/sound/soc/codecs/rt5616.c index f4005cb..e01a32d 100644 --- a/sound/soc/codecs/rt5616.c +++ b/sound/soc/codecs/rt5616.c @@ -1287,6 +1287,14 @@ static const struct i2c_device_id rt5616_i2c_id[] = { }; MODULE_DEVICE_TABLE(i2c, rt5616_i2c_id); +#if defined(CONFIG_OF) +static const struct of_device_id rt5616_of_match[] = { + { .compatible = "realtek,rt5616", }, + {}, +}; +MODULE_DEVICE_TABLE(of, rt5616_of_match); +#endif + static int rt5616_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *id) { @@ -1359,6 +1367,7 @@ static void rt5616_i2c_shutdown(struct i2c_client *client) static struct i2c_driver rt5616_i2c_driver = { .driver = { .name = "rt5616", + .of_match_table = of_match_ptr(rt5616_of_match), }, .probe = rt5616_i2c_probe, .remove = rt5616_i2c_remove, -- 1.9.1

4 6

[alsa-devel] Applied "ASoC: rt5616: add devicetree document for rt5616" to the asoc tree
by Mark Brown 23 Dec '15

23 Dec '15

The patch ASoC: rt5616: add devicetree document for rt5616 has been applied to the asoc tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From 27af4e488c6a2a8c4b6102e777c29fff467a3895 Mon Sep 17 00:00:00 2001 From: Caesar Wang <wxt(a)rock-chips.com> Date: Tue, 22 Dec 2015 13:45:03 +0800 Subject: [PATCH] ASoC: rt5616: add devicetree document for rt5616 Add the description for rt5616 codec. Signed-off-by: Caesar Wang <wxt(a)rock-chips.com> Signed-off-by: Mark Brown <broonie(a)kernel.org> --- Documentation/devicetree/bindings/sound/rt5616.txt | 26 ++++++++++++++++++++++ 1 file changed, 26 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/rt5616.txt diff --git a/Documentation/devicetree/bindings/sound/rt5616.txt b/Documentation/devicetree/bindings/sound/rt5616.txt new file mode 100644 index 000000000000..efc48c65198d --- /dev/null +++ b/Documentation/devicetree/bindings/sound/rt5616.txt @@ -0,0 +1,26 @@ +RT5616 audio CODEC + +This device supports I2C only. + +Required properties: + +- compatible : "realtek,rt5616". + +- reg : The I2C address of the device. + +Pins on the device (for linking into audio routes) for RT5616: + + * IN1P + * IN2P + * IN2N + * LOUTL + * LOUTR + * HPOL + * HPOR + +Example: + +codec: rt5616@1b { + compatible = "realtek,rt5616"; + reg = <0x1b>; +}; -- 2.6.2

1 0

[alsa-devel] Applied "ASoC: da7218: Enable mic level detection reporting to user-space" to the asoc tree
by Mark Brown 23 Dec '15

23 Dec '15

The patch ASoC: da7218: Enable mic level detection reporting to user-space has been applied to the asoc tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From e05c25a1af29d65260ed1458f2cc4a959030ebd2 Mon Sep 17 00:00:00 2001 From: Adam Thomson <Adam.Thomson.Opensource(a)diasemi.com> Date: Thu, 3 Dec 2015 17:10:07 +0000 Subject: [PATCH] ASoC: da7218: Enable mic level detection reporting to user-space This patch adds support to the codec driver to handle mic level detect related IRQs, and report these to user-space using a uevent variable. The uevent variable string "EVENT=MIC_LEVEL_DETECT" is sent to user-space, if the mic level detect feature is enabled, and the audio captured at the chosen mic(s) is above a certain threshold. User-space can then handle the event accordingly (e.g. process audio capture stream). This method was chosen over ALSA control notification for a couple of reasons: 1) There's no requirement here for a control to read state from. The event is the only thing that's required and of interest. 2) tinyalsa support for control notifications does not exist so on platforms using this over alsa-lib there is a need to add code to support this event handling. Another possible option would be to use the standard Jack reporting framework but this really does not fit for this kind of event. Finally, use of the input device framework is not being encouraged, due to difficulties in enabling apps to access input devices, so this has also been avoided. Signed-off-by: Adam Thomson <Adam.Thomson.Opensource(a)diasemi.com> Signed-off-by: Mark Brown <broonie(a)kernel.org> --- sound/soc/codecs/da7218.c | 19 ++++++++++++++----- 1 file changed, 14 insertions(+), 5 deletions(-) diff --git a/sound/soc/codecs/da7218.c b/sound/soc/codecs/da7218.c index eacde128c4d6..72686517ff54 100644 --- a/sound/soc/codecs/da7218.c +++ b/sound/soc/codecs/da7218.c @@ -2202,6 +2202,16 @@ int da7218_hpldet(struct snd_soc_codec *codec, struct snd_soc_jack *jack) } EXPORT_SYMBOL_GPL(da7218_hpldet); +static void da7218_micldet_irq(struct snd_soc_codec *codec) +{ + char *envp[] = { + "EVENT=MIC_LEVEL_DETECT", + NULL, + }; + + kobject_uevent_env(&codec->dev->kobj, KOBJ_CHANGE, envp); +} + static void da7218_hpldet_irq(struct snd_soc_codec *codec) { struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec); @@ -2232,6 +2242,10 @@ static irqreturn_t da7218_irq_thread(int irq, void *data) if (!status) return IRQ_NONE; + /* Mic level detect */ + if (status & DA7218_LVL_DET_EVENT_MASK) + da7218_micldet_irq(codec); + /* HP detect */ if (status & DA7218_HPLDET_JACK_EVENT_MASK) da7218_hpldet_irq(codec); @@ -2936,11 +2950,6 @@ static int da7218_probe(struct snd_soc_codec *codec) } if (da7218->irq) { - /* Mask off mic level events, currently not handled */ - snd_soc_update_bits(codec, DA7218_EVENT_MASK, - DA7218_LVL_DET_EVENT_MSK_MASK, - DA7218_LVL_DET_EVENT_MSK_MASK); - ret = devm_request_threaded_irq(codec->dev, da7218->irq, NULL, da7218_irq_thread, IRQF_TRIGGER_LOW | IRQF_ONESHOT, -- 2.6.2

1 0

[alsa-devel] [PATCH 0/12] ASoC: rsnd: add Multi channel support
by Kuninori Morimoto 23 Dec '15

23 Dec '15

Hi Mark These are Multi channel support for Renesas R-Car sound. These patches are tested on Salvator-X board, but it can't use Multi channel, because supported format is different between codec chip and R-Car. Thus, it was tested on board which doesn't mount codec chip, with oscilloscope. Kuninori Morimoto (12): 1) ASoC: rsnd: fixup SSIU control timing 2) ASoC: rsnd: tidyup return value of rsnd_get_adinr_bit() 3) ASoC: rsnd: tidyup debug print position on rsnd_dma_attach() 4) ASoC: rsnd: rsnd_dai_connect() returns error if it connect to existing mod 5) ASoC: rsnd: SSI/SSIU use rsnd_get_slot_extend() to check TDM 6) ASoC: rsnd: remove rsnd_get_slot_runtime() 7) ASoC: rsnd: tidyup rsnd_get_slot_xxx() naming 8) ASoC: rsnd: add rsnd_set_slot() / rsnd_get_slot_num() 9) ASoC: rsnd: add rsnd_parse_connect_common() and remove complex macro 10) ASoC: rsnd: add missing DT example for Simple Card 11) ASoC: rsnd: add missing DT example for Simple Card with TDM 12) ASoC: rsnd: add Multi channel support Documentation/devicetree/bindings/sound/renesas,rsnd.txt | 77 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ sound/soc/sh/rcar/core.c | 111 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++---------------------------------------- sound/soc/sh/rcar/dma.c | 10 ++++----- sound/soc/sh/rcar/dvc.c | 3 +-- sound/soc/sh/rcar/gen.c | 3 +++ sound/soc/sh/rcar/rsnd.h | 45 +++++++++++++++++++++++++++++++++------ sound/soc/sh/rcar/ssi.c | 118 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++---- sound/soc/sh/rcar/ssiu.c | 57 +++++++++++++++++++++++++++++++++++++++++--------- 8 files changed, 351 insertions(+), 73 deletions(-) Best regards --- Kuninori Morimoto

3 32

[alsa-devel] [PATCH] ASoC: ssm2518: Use a signed return type for ssm2518_lookup_mcs()
by SF Markus Elfring 23 Dec '15

23 Dec '15

From: Markus Elfring <elfring(a)users.sourceforge.net> Date: Sun, 20 Dec 2015 10:34:25 +0100 The return type "unsigned int" was used by the ssm2518_lookup_mcs() function even though it will eventually return a negative error code. Improve this implementation detail by deletion of the type modifier then. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring <elfring(a)users.sourceforge.net> --- sound/soc/codecs/ssm2518.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/ssm2518.c b/sound/soc/codecs/ssm2518.c index 86b81a6..e2e0bfa 100644 --- a/sound/soc/codecs/ssm2518.c +++ b/sound/soc/codecs/ssm2518.c @@ -309,7 +309,7 @@ static const struct snd_pcm_hw_constraint_list ssm2518_constraints_12288000 = { .count = ARRAY_SIZE(ssm2518_rates_12288000), }; -static unsigned int ssm2518_lookup_mcs(struct ssm2518 *ssm2518, +static int ssm2518_lookup_mcs(struct ssm2518 *ssm2518, unsigned int rate) { const unsigned int *sysclks = NULL; -- 2.6.3

2 1

[alsa-devel] [PATCH] ASoC: rt5616: rename some alsa control names
by Bard Liao 23 Dec '15

23 Dec '15

Rename some alsa control name as what they should be. Signed-off-by: Bard Liao <bardliao(a)realtek.com> --- sound/soc/codecs/rt5616.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/rt5616.c b/sound/soc/codecs/rt5616.c index f4005cb..4de8c86 100644 --- a/sound/soc/codecs/rt5616.c +++ b/sound/soc/codecs/rt5616.c @@ -323,9 +323,9 @@ static const struct snd_kcontrol_new rt5616_snd_controls[] = { RT5616_L_VOL_SFT, RT5616_R_VOL_SFT, 175, 0, dac_vol_tlv), /* IN1/IN2 Control */ - SOC_SINGLE_TLV("IN1 Boost", RT5616_IN1_IN2, + SOC_SINGLE_TLV("IN1 Boost Volume", RT5616_IN1_IN2, RT5616_BST_SFT1, 8, 0, bst_tlv), - SOC_SINGLE_TLV("IN2 Boost", RT5616_IN1_IN2, + SOC_SINGLE_TLV("IN2 Boost Volume", RT5616_IN1_IN2, RT5616_BST_SFT2, 8, 0, bst_tlv), /* INL/INR Volume Control */ SOC_DOUBLE_TLV("IN Capture Volume", RT5616_INL1_INR1_VOL, @@ -339,7 +339,7 @@ static const struct snd_kcontrol_new rt5616_snd_controls[] = { 127, 0, adc_vol_tlv), /* ADC Boost Volume Control */ - SOC_DOUBLE_TLV("ADC Boost Gain", RT5616_ADC_BST_VOL, + SOC_DOUBLE_TLV("ADC Boost Volume", RT5616_ADC_BST_VOL, RT5616_ADC_L_BST_SFT, RT5616_ADC_R_BST_SFT, 3, 0, adc_bst_tlv), }; -- 1.8.1.1.439.g50a6b54

2 1

[alsa-devel] [PATCH] ASoC: atmel_wm8904: add snd_soc_pm_ops
by Songjun Wu 23 Dec '15

23 Dec '15

Sometimes the audio play can not be resumed after it is suspended. Add snd_soc_pm_ops to execute power management operations, then this issue is fixed. Signed-off-by: Songjun Wu <songjun.wu(a)atmel.com> --- sound/soc/atmel/atmel_wm8904.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/soc/atmel/atmel_wm8904.c b/sound/soc/atmel/atmel_wm8904.c index 1933bcd..fdd28ed 100644 --- a/sound/soc/atmel/atmel_wm8904.c +++ b/sound/soc/atmel/atmel_wm8904.c @@ -183,6 +183,7 @@ static struct platform_driver atmel_asoc_wm8904_driver = { .driver = { .name = "atmel-wm8904-audio", .of_match_table = of_match_ptr(atmel_asoc_wm8904_dt_ids), + .pm = &snd_soc_pm_ops, }, .probe = atmel_asoc_wm8904_probe, .remove = atmel_asoc_wm8904_remove, -- 1.7.9.5

2 1

[alsa-devel] [PATCH v2] ASoC: fsl_asrc: add support for 8-30kHz output sample rate
by Zidan Wang 23 Dec '15

23 Dec '15

Add 8kHz, 11.025kHz, 16kHz, 22.05kHz output sample rate support. According referance menual, "Limited support for the case when output sampling rates is between 8kHz and 30kHz. The limitation is the supported ratio (Fsin/Fsout) range as between 1/24 to 8." Signed-off-by: Zidan Wang <zidan.wang(a)freescale.com> --- v1->v2: 1. fix indentation issue. sound/soc/fsl/fsl_asrc.c | 39 +++++++++++++++++++++++---------------- 1 file changed, 23 insertions(+), 16 deletions(-) diff --git a/sound/soc/fsl/fsl_asrc.c b/sound/soc/fsl/fsl_asrc.c index d964016..bd32c30 100644 --- a/sound/soc/fsl/fsl_asrc.c +++ b/sound/soc/fsl/fsl_asrc.c @@ -31,21 +31,21 @@ dev_dbg(&asrc_priv->pdev->dev, "Pair %c: " fmt, 'A' + index, ##__VA_ARGS__) /* Sample rates are aligned with that defined in pcm.h file */ -static const u8 process_option[][8][2] = { - /* 32kHz 44.1kHz 48kHz 64kHz 88.2kHz 96kHz 176kHz 192kHz */ - {{0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0},}, /* 5512Hz */ - {{0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0},}, /* 8kHz */ - {{0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0},}, /* 11025Hz */ - {{0, 1}, {0, 1}, {0, 1}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0},}, /* 16kHz */ - {{0, 1}, {0, 1}, {0, 1}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0},}, /* 22050Hz */ - {{0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 0}, {0, 0}, {0, 0},}, /* 32kHz */ - {{0, 2}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 0}, {0, 0},}, /* 44.1kHz */ - {{0, 2}, {0, 2}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 0}, {0, 0},}, /* 48kHz */ - {{1, 2}, {0, 2}, {0, 2}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 0},}, /* 64kHz */ - {{1, 2}, {1, 2}, {1, 2}, {1, 1}, {1, 1}, {1, 1}, {1, 1}, {1, 1},}, /* 88.2kHz */ - {{1, 2}, {1, 2}, {1, 2}, {1, 1}, {1, 1}, {1, 1}, {1, 1}, {1, 1},}, /* 96kHz */ - {{2, 2}, {2, 2}, {2, 2}, {2, 1}, {2, 1}, {2, 1}, {2, 1}, {2, 1},}, /* 176kHz */ - {{2, 2}, {2, 2}, {2, 2}, {2, 1}, {2, 1}, {2, 1}, {2, 1}, {2, 1},}, /* 192kHz */ +static const u8 process_option[][12][2] = { + /* 8kHz 11.025kHz 16kHz 22.05kHz 32kHz 44.1kHz 48kHz 64kHz 88.2kHz 96kHz 176kHz 192kHz */ + {{0, 1}, {0, 1}, {0, 1}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0},}, /* 5512Hz */ + {{0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0},}, /* 8kHz */ + {{0, 2}, {0, 1}, {0, 1}, {0, 1}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0},}, /* 11025Hz */ + {{1, 2}, {0, 2}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0},}, /* 16kHz */ + {{1, 2}, {1, 2}, {0, 2}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0},}, /* 22050Hz */ + {{1, 2}, {2, 1}, {2, 1}, {0, 2}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 0}, {0, 0}, {0, 0},}, /* 32kHz */ + {{2, 2}, {2, 2}, {2, 1}, {2, 1}, {0, 2}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 0}, {0, 0},}, /* 44.1kHz */ + {{2, 2}, {2, 2}, {2, 1}, {2, 1}, {0, 2}, {0, 2}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 0}, {0, 0},}, /* 48kHz */ + {{2, 2}, {2, 2}, {2, 2}, {2, 1}, {1, 2}, {0, 2}, {0, 2}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 0},}, /* 64kHz */ + {{2, 2}, {2, 2}, {2, 2}, {2, 2}, {1, 2}, {1, 2}, {1, 2}, {1, 1}, {1, 1}, {1, 1}, {1, 1}, {1, 1},}, /* 88.2kHz */ + {{2, 2}, {2, 2}, {2, 2}, {2, 2}, {1, 2}, {1, 2}, {1, 2}, {1, 1}, {1, 1}, {1, 1}, {1, 1}, {1, 1},}, /* 96kHz */ + {{2, 2}, {2, 2}, {2, 2}, {2, 2}, {2, 2}, {2, 2}, {2, 2}, {2, 1}, {2, 1}, {2, 1}, {2, 1}, {2, 1},}, /* 176kHz */ + {{2, 2}, {2, 2}, {2, 2}, {2, 2}, {2, 2}, {2, 2}, {2, 2}, {2, 1}, {2, 1}, {2, 1}, {2, 1}, {2, 1},}, /* 192kHz */ }; /* Corresponding to process_option */ @@ -55,7 +55,7 @@ static int supported_input_rate[] = { }; static int supported_asrc_rate[] = { - 32000, 44100, 48000, 64000, 88200, 96000, 176400, 192000, + 8000, 11025, 16000, 22050, 32000, 44100, 48000, 64000, 88200, 96000, 176400, 192000, }; /** @@ -287,6 +287,13 @@ static int fsl_asrc_config_pair(struct fsl_asrc_pair *pair) return -EINVAL; } + if ((outrate > 8000 && outrate < 30000) && + (outrate/inrate > 24 || inrate/outrate > 8)) { + pair_err("exceed supported ratio range [1/24, 8] for \ + inrate/outrate: %d/%d\n", inrate, outrate); + return -EINVAL; + } + /* Validate input and output clock sources */ clk_index[IN] = clk_map[IN][config->inclk]; clk_index[OUT] = clk_map[OUT][config->outclk]; -- 1.9.1

3 2

[alsa-devel] [PATCH] ASoC: fsl-asoc-card: use different route map for AC'97 mode
by Maciej S. Szmigiero 23 Dec '15

23 Dec '15

fsl_ssi uses different stream names ("AC97 Playback" / "AC97 Capture") in AC'97 mode so in this case fsl-asoc-card route map should also be using them. Signed-off-by: Maciej S. Szmigiero <mail(a)maciej.szmigiero.name> --- sound/soc/fsl/fsl-asoc-card.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/sound/soc/fsl/fsl-asoc-card.c b/sound/soc/fsl/fsl-asoc-card.c index c63d89da51f1..562b3bd22d9a 100644 --- a/sound/soc/fsl/fsl-asoc-card.c +++ b/sound/soc/fsl/fsl-asoc-card.c @@ -107,6 +107,13 @@ static const struct snd_soc_dapm_route audio_map[] = { {"CPU-Capture", NULL, "Capture"}, }; +static const struct snd_soc_dapm_route audio_map_ac97[] = { + {"AC97 Playback", NULL, "ASRC-Playback"}, + {"Playback", NULL, "AC97 Playback"}, + {"ASRC-Capture", NULL, "AC97 Capture"}, + {"AC97 Capture", NULL, "Capture"}, +}; + /* Add all possible widgets into here without being redundant */ static const struct snd_soc_dapm_widget fsl_asoc_card_dapm_widgets[] = { SND_SOC_DAPM_LINE("Line Out Jack", NULL), @@ -579,7 +586,8 @@ static int fsl_asoc_card_probe(struct platform_device *pdev) priv->card.dev = &pdev->dev; priv->card.name = priv->name; priv->card.dai_link = priv->dai_link; - priv->card.dapm_routes = audio_map; + priv->card.dapm_routes = fsl_asoc_card_is_ac97(priv) ? + audio_map_ac97 : audio_map; priv->card.late_probe = fsl_asoc_card_late_probe; priv->card.num_dapm_routes = ARRAY_SIZE(audio_map); priv->card.dapm_widgets = fsl_asoc_card_dapm_widgets;

3 2

[alsa-devel] [PATCH 0/5] ASoC: Allow topology to create DAI links
by mengdong.lin＠linux.intel.com 23 Dec '15

23 Dec '15

From: Mengdong Lin <mengdong.lin(a)linux.intel.com> This series allows DAI links to be created from topology info. The components with topology info can come in two ways: - As a component for cpu dai or codec dai of a DAI link predefined by machine driver. - As a auxiliary components defined by the machine driver for a soc card. For this case, the machine driver even need not define any DAI links. The ASoC core will find and probe these components when instantiating the soc card. When probing the components, topology info will be loaded and DAI links can be created by the topology core. And then ASoC core will find and bind new DAI links after probing the components. We implement a DAI link list and define API for adding/removing DAI links from topology. Mengdong Lin (5): ASoC: Implement DAI links in a list & define API to add/remove a link ASoC: Define add/remove_dai_link ops for a soc card ASoC: soc_bind_dai_link() directly returns success for a bound DAI link ASoC: Bind new DAI links after probing components ASoC: The soc card can have auxiliary components include/sound/soc.h | 29 +++++++++- sound/soc/soc-core.c | 153 +++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 180 insertions(+), 2 deletions(-) -- 2.5.0

3 19

[alsa-devel] rawmidi virtual and long sysexes
by Ryan C. Underwood 22 Dec '15

22 Dec '15

Hi alsa-devel, Recently I noticed this problem and fixed it in the client consuming sequencer events: https://github.com/munt/munt/commit/0ea0846d0849872acf4384bdf5edeff026d12f42 Basically, the rawmidi virtual plugin enforces a 256-byte limit on events, and emits multiple events if e.g. a >256 byte sysex is encountered. This does not seem to be documented behavior for snd_seq_event_input(), nor is the fixed limit described anywhere. Would it be better if the maximum event size could be configured through params? That would avoid needing this clumsy workaround by sequencer clients. In any case, it seems that the documentation should be updated to reflect the need to receive multiple sequencer events to complete a sysex if EOX is not located in the first. Please cc me as I'm not subscribed. -- Ryan C. Underwood, <nemesis(a)icequake.net>

3 3

[alsa-devel] [PATCH] sound: hda_intel: add card number to irq description
by Heiner Kallweit 22 Dec '15

22 Dec '15

Currently the info in /proc/interrupts doesn't allow to figure out which interrupt belongs to which card (HDMI, PCH, ..). Therefore add card details to the interrupt description. With the patch the info in /proc/interrupts looks like this: PCI-MSI 442368-edge snd_hda_intel:card1 PCI-MSI 49152-edge snd_hda_intel:card0 This could be partially reused for the hda_tegra driver as it also uses struct azx. Signed-off-by: Heiner Kallweit <hkallweit1(a)gmail.com> --- sound/pci/hda/hda_controller.h | 2 ++ sound/pci/hda/hda_intel.c | 4 +++- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/sound/pci/hda/hda_controller.h b/sound/pci/hda/hda_controller.h index ec63bbf..9c6344f 100644 --- a/sound/pci/hda/hda_controller.h +++ b/sound/pci/hda/hda_controller.h @@ -125,6 +125,8 @@ struct azx { int num_streams; const int *jackpoll_ms; /* per-card jack poll interval */ + char irq_descr[32]; /* Interrupt description */ + /* Register interaction. */ const struct hda_controller_ops *ops; diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index 83800ac..ef4e06b 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c @@ -725,7 +725,7 @@ static int azx_acquire_irq(struct azx *chip, int do_disconnect) if (request_irq(chip->pci->irq, azx_interrupt, chip->msi ? 0 : IRQF_SHARED, - KBUILD_MODNAME, chip)) { + chip->irq_descr, chip)) { dev_err(chip->card->dev, "unable to grab IRQ %d, disabling device\n", chip->pci->irq); @@ -1605,6 +1605,8 @@ static int azx_create(struct snd_card *card, struct pci_dev *pci, check_msi(chip); chip->dev_index = dev; chip->jackpoll_ms = jackpoll_ms; + snprintf(chip->irq_descr, sizeof(chip->irq_descr), "%s:%s", + KBUILD_MODNAME, dev_name(&card->card_dev)); INIT_LIST_HEAD(&chip->pcm_list); INIT_WORK(&hda->irq_pending_work, azx_irq_pending_work); INIT_LIST_HEAD(&hda->list); -- 2.6.4

2 2

[alsa-devel] [RFC PATCH 0/2] ALSA: hda - DP MST audio for Jack support
by libin.yang＠linux.intel.com 22 Dec '15

22 Dec '15

From: Libin Yang <libin.yang(a)linux.intel.com> This is the patch set for Jack support for DP MST audio Libin Yang (2): ALSA: hda - jack support DP MST audio ALSA: hda - hdmi audio add dynamically jack binding to pin sound/pci/hda/hda_jack.c | 186 ++++++++++++++++++++++++++++++++++++++++----- sound/pci/hda/hda_jack.h | 32 +++++++- sound/pci/hda/patch_hdmi.c | 116 ++++++++++++++++++++++------ 3 files changed, 288 insertions(+), 46 deletions(-) -- 1.9.1

4 12

[alsa-devel] [PATCH 0/8] ALSA: oxfw: obsolete snd-scs1x with snd-oxfw
by Takashi Sakamoto 22 Dec '15

22 Dec '15

Hi, This patchset update a part of my previous RFCv2 (patch 10-17). [alsa-devel] [RFC][PATCH 00/17 v2] ALSA: oxfw: refactoring and merging scs1x module http://mailman.alsa-project.org/pipermail/alsa-devel/2015-December/101558.h… This patchset should be accumurated to the other patches under reviewing. [alsa-devel] [PATCH 0/4] ALSA: oxfw: localize stuffs of old firewire-speakers module http://mailman.alsa-project.org/pipermail/alsa-devel/2015-December/102071.h… This patchset obsoletes snd-scs1x module with snd-oxfw module because the models supported by snd-scs1x module are based on OXFW971, which snd-oxfw supports, too. So snd-oxfw should support them. As a result, one of the models gets packet streaming functionality to receive PCM samples. This is a lack of functionalities in snd-scs1x. Usually I won't post additional patches during the others are under reviewing. But it's near the end of year. I'd like to post these patches in advance to avoid year-end busyness. I'm happy if you review them and these patches go forward, then I can get a short rest in the year-end. I note that I have the other patches for ALSA dice module, too. I'm also happy to start reviewing process for them after this patchset goes forward... Changes from RFCv2: * remove sound/firewire/scs1x.c (I forget it) * revise operations in rawmidi callbacks Takashi Sakamoto (8): ALSA: oxfw: add scs1x layer ALSA: oxfw: allocate own address region for SCS.1 series ALSA: oxfw: copy handlers of asynchronous transaction for MIDI capture ALSA: oxfw: add MIDI capture port for SCS.1 models ALSA: oxfw: copy handlers of asynchronous transaction for MIDI playback ALSA: oxfw: add MIDI playback port for SCS.1 models ALSA: oxfw: obsolete scs1x module ALSA: oxfw: add stream format quirk for SCS.1 models sound/firewire/Kconfig | 12 +- sound/firewire/Makefile | 2 - sound/firewire/oxfw/Makefile | 2 +- sound/firewire/oxfw/oxfw-scs1x.c | 406 ++++++++++++++++++++++++++++++ sound/firewire/oxfw/oxfw.c | 38 ++- sound/firewire/oxfw/oxfw.h | 2 + sound/firewire/scs1x.c | 530 --------------------------------------- 7 files changed, 446 insertions(+), 546 deletions(-) create mode 100644 sound/firewire/oxfw/oxfw-scs1x.c delete mode 100644 sound/firewire/scs1x.c -- 2.5.0

2 12

[alsa-devel] [PATCH] ALSA: usb-audio: use list_for_each_entry_continue_reverse
by Geliang Tang 22 Dec '15

22 Dec '15

For better readability, use list_for_each_entry_continue_reverse() in have_dup_chmap(). Signed-off-by: Geliang Tang <geliangtang(a)163.com> --- sound/usb/stream.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/sound/usb/stream.c b/sound/usb/stream.c index 8ee14f2..c4dc577 100644 --- a/sound/usb/stream.c +++ b/sound/usb/stream.c @@ -125,11 +125,9 @@ static int usb_chmap_ctl_info(struct snd_kcontrol *kcontrol, static bool have_dup_chmap(struct snd_usb_substream *subs, struct audioformat *fp) { - struct list_head *p; + struct audioformat *prev = fp; - for (p = fp->list.prev; p != &subs->fmt_list; p = p->prev) { - struct audioformat *prev; - prev = list_entry(p, struct audioformat, list); + list_for_each_entry_continue_reverse(prev, &subs->fmt_list, list) { if (prev->chmap && !memcmp(prev->chmap, fp->chmap, sizeof(*fp->chmap))) return true; -- 2.5.0

2 1

[alsa-devel] [PATCH] ALSA: hda/realtek - Fix silent headphone output on MacPro 4, 1 (v2)
by Mario Kleiner 22 Dec '15

22 Dec '15

Without this patch, internal speaker and line-out work, but front headphone output jack stays silent on the Mac Pro 4,1. This code path also gets executed on the MacPro 5,1 due to identical codec SSID, but i don't know if it has any positive or adverse effects there or not. (v2) Implement feedback from Takashi Iwai: Reuse alc889_fixup_mbp_vref and just add a new nid 0x19 for the MacPro 4,1. Signed-off-by: Mario Kleiner <mario.kleiner.de(a)gmail.com> Cc: <stable(a)vger.kernel.org> --- sound/pci/hda/patch_realtek.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index 9bedf7c..0e654e4 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -1755,6 +1755,7 @@ enum { ALC889_FIXUP_MBA11_VREF, ALC889_FIXUP_MBA21_VREF, ALC889_FIXUP_MP11_VREF, + ALC889_FIXUP_MP41_VREF, ALC882_FIXUP_INV_DMIC, ALC882_FIXUP_NO_PRIMARY_HP, ALC887_FIXUP_ASUS_BASS, @@ -1843,7 +1844,7 @@ static void alc889_fixup_mbp_vref(struct hda_codec *codec, const struct hda_fixup *fix, int action) { struct alc_spec *spec = codec->spec; - static hda_nid_t nids[2] = { 0x14, 0x15 }; + static hda_nid_t nids[3] = { 0x14, 0x15, 0x19 }; int i; if (action != HDA_FIXUP_ACT_INIT) @@ -2133,6 +2134,12 @@ static const struct hda_fixup alc882_fixups[] = { .chained = true, .chain_id = ALC885_FIXUP_MACPRO_GPIO, }, + [ALC889_FIXUP_MP41_VREF] = { + .type = HDA_FIXUP_FUNC, + .v.func = alc889_fixup_mbp_vref, + .chained = true, + .chain_id = ALC885_FIXUP_MACPRO_GPIO, + }, [ALC882_FIXUP_INV_DMIC] = { .type = HDA_FIXUP_FUNC, .v.func = alc_fixup_inv_dmic, @@ -2215,7 +2222,7 @@ static const struct snd_pci_quirk alc882_fixup_tbl[] = { SND_PCI_QUIRK(0x106b, 0x3f00, "Macbook 5,1", ALC889_FIXUP_IMAC91_VREF), SND_PCI_QUIRK(0x106b, 0x4000, "MacbookPro 5,1", ALC889_FIXUP_IMAC91_VREF), SND_PCI_QUIRK(0x106b, 0x4100, "Macmini 3,1", ALC889_FIXUP_IMAC91_VREF), - SND_PCI_QUIRK(0x106b, 0x4200, "Mac Pro 5,1", ALC885_FIXUP_MACPRO_GPIO), + SND_PCI_QUIRK(0x106b, 0x4200, "Mac Pro 4,1/5,1", ALC889_FIXUP_MP41_VREF), SND_PCI_QUIRK(0x106b, 0x4300, "iMac 9,1", ALC889_FIXUP_IMAC91_VREF), SND_PCI_QUIRK(0x106b, 0x4600, "MacbookPro 5,2", ALC889_FIXUP_IMAC91_VREF), SND_PCI_QUIRK(0x106b, 0x4900, "iMac 9,1 Aluminum", ALC889_FIXUP_IMAC91_VREF), -- 1.9.1

2 1

Re: [alsa-devel] [PATCH v1 2/2] dt-bindings: sound: add devicetree document for rt5616
by Caesar Wang 22 Dec '15

22 Dec '15

Hi 在 2015年12月22日 05:15, Frank Rowand 写道: > On 12/21/2015 6:56 AM, Caesar Wang wrote: >> Add the description for rt5616 codec. >> >> Signed-off-by: Caesar Wang <wxt(a)rock-chips.com> >> >> --- >> >> Changes in v1: >> - As Heiko comments, remove the not exist option properties. >> >> Documentation/devicetree/bindings/sound/rt5616.txt | 36 ++++++++++++++++++++++ >> 1 file changed, 36 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/sound/rt5616.txt >> >> diff --git a/Documentation/devicetree/bindings/sound/rt5616.txt b/Documentation/devicetree/bindings/sound/rt5616.txt >> new file mode 100644 >> index 0000000..2030a22 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/sound/rt5616.txt >> @@ -0,0 +1,36 @@ >> +RT5616 audio CODEC >> + >> +This device supports I2C only. >> + >> +Required properties: >> + >> +- compatible : "realtek,rt5616". >> + >> +- reg : The I2C address of the device. >> + >> +Pins on the device (for linking into audio routes) for RT5616: >> + >> + * IN1P >> + * IN2P >> + * IN2N >> + * LOUTL >> + * LOUTR >> + * CPN2 >> + * CPP2 >> + * CPN1 >> + * CPP1 >> + * HPO_R >> + * HPO_L >> + * ADCDAT1 >> + * DACDAT1 >> + * LRCK1 >> + * BCLK1 >> + * MCLK >> + * GPIO1 >> + >> +Example: >> + >> +rt5616 { > The node name should be rt5616@1b (including the reg value > from the node). In general, that's right. Okay, fixed in next version. > >> + compatible = "realtek,rt5616"; >> + reg = <0x1b>; >> +}; >> > > > -- caesar wang | software engineer | wxt(a)rock-chip.com

1 0

[alsa-devel] [PATCH] ALSA: hda/realtek - Fix silent headphone output on MacPro 4, 1
by Mario Kleiner 22 Dec '15

22 Dec '15

Without this patch, internal speaker and line-out work, but front headphone output jack stays silent on the Mac Pro 4,1. This code path also gets executed on the MacPro 5,1 due to identical codec SSID, but i don't know if it has any positive or adverse effects there or not. Signed-off-by: Mario Kleiner <mario.kleiner.de(a)gmail.com> --- sound/pci/hda/patch_realtek.c | 32 +++++++++++++++++++++++++++++++- 1 file changed, 31 insertions(+), 1 deletion(-) diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index 9bedf7c..6224bdd 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -1755,6 +1755,7 @@ enum { ALC889_FIXUP_MBA11_VREF, ALC889_FIXUP_MBA21_VREF, ALC889_FIXUP_MP11_VREF, + ALC889_FIXUP_MP41_VREF, ALC882_FIXUP_INV_DMIC, ALC882_FIXUP_NO_PRIMARY_HP, ALC887_FIXUP_ASUS_BASS, @@ -1905,6 +1906,29 @@ static void alc889_fixup_mba21_vref(struct hda_codec *codec, alc889_fixup_mac_pins(codec, nids, ARRAY_SIZE(nids)); } +/* Set VREF on HP pin on Mac Pro 4,1 */ +static void alc889_fixup_mp41_vref(struct hda_codec *codec, + const struct hda_fixup *fix, int action) +{ + struct alc_spec *spec = codec->spec; + static hda_nid_t nids[1] = { 0x19 }; + int i; + + if (action != HDA_FIXUP_ACT_INIT) + return; + + for (i = 0; i < ARRAY_SIZE(nids); i++) { + unsigned int val = snd_hda_codec_get_pincfg(codec, nids[i]); + if (get_defcfg_device(val) != AC_JACK_HP_OUT) + continue; + val = snd_hda_codec_get_pin_target(codec, nids[i]); + val |= AC_PINCTL_VREF_80; + snd_hda_set_pin_ctl(codec, nids[i], val); + spec->gen.keep_vref_in_automute = 1; + break; + } +} + /* Don't take HP output as primary * Strangely, the speaker output doesn't work on Vaio Z and some Vaio * all-in-one desktop PCs (for example VGC-LN51JGB) through DAC 0x05 @@ -2133,6 +2157,12 @@ static const struct hda_fixup alc882_fixups[] = { .chained = true, .chain_id = ALC885_FIXUP_MACPRO_GPIO, }, + [ALC889_FIXUP_MP41_VREF] = { + .type = HDA_FIXUP_FUNC, + .v.func = alc889_fixup_mp41_vref, + .chained = true, + .chain_id = ALC885_FIXUP_MACPRO_GPIO, + }, [ALC882_FIXUP_INV_DMIC] = { .type = HDA_FIXUP_FUNC, .v.func = alc_fixup_inv_dmic, @@ -2215,7 +2245,7 @@ static const struct snd_pci_quirk alc882_fixup_tbl[] = { SND_PCI_QUIRK(0x106b, 0x3f00, "Macbook 5,1", ALC889_FIXUP_IMAC91_VREF), SND_PCI_QUIRK(0x106b, 0x4000, "MacbookPro 5,1", ALC889_FIXUP_IMAC91_VREF), SND_PCI_QUIRK(0x106b, 0x4100, "Macmini 3,1", ALC889_FIXUP_IMAC91_VREF), - SND_PCI_QUIRK(0x106b, 0x4200, "Mac Pro 5,1", ALC885_FIXUP_MACPRO_GPIO), + SND_PCI_QUIRK(0x106b, 0x4200, "Mac Pro 4,1/5,1", ALC889_FIXUP_MP41_VREF), SND_PCI_QUIRK(0x106b, 0x4300, "iMac 9,1", ALC889_FIXUP_IMAC91_VREF), SND_PCI_QUIRK(0x106b, 0x4600, "MacbookPro 5,2", ALC889_FIXUP_IMAC91_VREF), SND_PCI_QUIRK(0x106b, 0x4900, "iMac 9,1 Aluminum", ALC889_FIXUP_IMAC91_VREF), -- 1.9.1

2 2

[alsa-devel] [PATCH 00/13] Add ASoC support for AMD APUs [v5]
by Alex Deucher 21 Dec '15

21 Dec '15

This patch set implements support for i2s audio and new AMD GPUs. The i2s codec is fed by a DMA engine on the GPU. To handle this we create mfd cells which we hang the i2s codec and DMA engine on. Because of this, this patch set covers two subsystems: drm and alsa. The drm patches add support for the ACP hw block which provides the DMA engine for the i2s codec. The alsa patches add the ASoC driver for the i2s codec. Since the alsa changes depend on the drm changes, I'd like to take the alsa patches in via the drm tree. V2 changes: - Use the MFD subsystem rather than adding our own bus - Squash all sub-feature patches together - fix comments mentioned in previous review V3 changes: - Update the designware driver to handle slave mode, amd specific features - Use the designware driver directly for i2s - Move the DMA handling from the GPU driver into the AMD ASoC driver - Change the license on the ASoC driver to GPL v4 changes: - patch "ASoC : dwc : support dw i2s in slave mode" accepted - Add a _dai_fmt() operation that checks to make sure that the mode we're setting corresponds to what we read back from the hardware. - Split specific quirks into separate patches - Set the specific quirks that apply to AMD chips in the acp driver v5 changes: - patch "ASoC : dwc : add check for master/slave format" accepted - Fix MFD_CORE selection in ACP Kconfig - Add irq domain support to amdgpu driver - Use genirq in ACP DMA driver - Export some genpd symbols to support ACP powergating (Acked by PM maintainer) - Use genpd for ACP powergating - add separate capture and playback instances of dws in ACP init - add runtime suspend support for dws in master mode Patch 9 adds the register headers for the ACP block which is a pretty big patch so I've excluded it from email. The entire patch set can be viewed here: http://cgit.freedesktop.org/~agd5f/linux/log/?h=acp-upstream8 Thanks, Alex Alex Deucher (3): drm/amdgpu/cgs: add an interface to access PCI resources drm/amdgpu: add irq domain support drm/amd: add pm domain for ACP IP sub blocks Maruthi Bayyavarapu (1): drm/amd: add ACP driver support Maruthi Srinivas Bayyavarapu (9): ASoC: dwc: add runtime suspend/resume functionality ASoC: dwc: add quirk for different register offset ASoC: dwc: reconfigure dwc in 'resume' from 'suspend' PM / Domains: export symbols to add/remove devices from genpd ASoC : AMD : add ACP 2.2 register headers ASoC: AMD: add ACP 2.x IP DMA abstraction layer ASoC: AMD: add AMD ASoC ACP 2.x DMA driver ASoC: AMD: add pm ops ASoC: AMD: Manage ACP 2.x SRAM banks power drivers/base/power/domain.c | 2 + drivers/gpu/drm/Kconfig | 2 + drivers/gpu/drm/amd/acp/Kconfig | 11 + drivers/gpu/drm/amd/acp/Makefile | 9 + drivers/gpu/drm/amd/acp/acp_hw.c | 50 + drivers/gpu/drm/amd/acp/include/acp_gfx_if.h | 34 + drivers/gpu/drm/amd/amdgpu/Makefile | 13 +- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 12 + drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c | 501 ++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_acp.h | 42 + drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c | 36 + drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 108 +- drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h | 9 + drivers/gpu/drm/amd/amdgpu/cik_ih.c | 6 + drivers/gpu/drm/amd/amdgpu/cz_ih.c | 7 + drivers/gpu/drm/amd/amdgpu/iceland_ih.c | 7 + drivers/gpu/drm/amd/amdgpu/tonga_ih.c | 7 + drivers/gpu/drm/amd/amdgpu/vi.c | 12 + drivers/gpu/drm/amd/include/amd_shared.h | 1 + drivers/gpu/drm/amd/include/cgs_common.h | 34 + include/sound/designware_i2s.h | 5 + sound/soc/Kconfig | 1 + sound/soc/Makefile | 1 + sound/soc/amd/Kconfig | 4 + sound/soc/amd/Makefile | 3 + sound/soc/amd/acp-pcm-dma.c | 560 +++++++ sound/soc/amd/acp.c | 666 ++++++++ sound/soc/amd/acp.h | 140 ++ sound/soc/amd/include/acp_2_2_d.h | 609 +++++++ sound/soc/amd/include/acp_2_2_enum.h | 1068 ++++++++++++ sound/soc/amd/include/acp_2_2_sh_mask.h | 2292 ++++++++++++++++++++++++++ sound/soc/dwc/designware_i2s.c | 113 +- 32 files changed, 6325 insertions(+), 40 deletions(-) create mode 100644 drivers/gpu/drm/amd/acp/Kconfig create mode 100644 drivers/gpu/drm/amd/acp/Makefile create mode 100644 drivers/gpu/drm/amd/acp/acp_hw.c create mode 100644 drivers/gpu/drm/amd/acp/include/acp_gfx_if.h create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.h create mode 100644 sound/soc/amd/Kconfig create mode 100644 sound/soc/amd/Makefile create mode 100644 sound/soc/amd/acp-pcm-dma.c create mode 100644 sound/soc/amd/acp.c create mode 100644 sound/soc/amd/acp.h create mode 100644 sound/soc/amd/include/acp_2_2_d.h create mode 100644 sound/soc/amd/include/acp_2_2_enum.h create mode 100644 sound/soc/amd/include/acp_2_2_sh_mask.h -- 1.8.3.1

3 21

[alsa-devel] [PATCH v1 1/5] ALSA: fm801: propagate TUNER_ONLY bit when autodetected
by Andy Shevchenko 21 Dec '15

21 Dec '15

The commit d7ba858a7f7a (ALSA: fm801: implement TEA575x tuner autodetection) brings autodetection to the driver. However the autodetection algorithm misses the TUNER_ONLY bit if it is supplied by the user. Thus, user gets weird messages and no card registered. snd_fm801 0000:0d:01.0: detected TEA575x radio type SF64-PCR snd_fm801 0000:0d:01.0: AC'97 interface is busy (1) snd_fm801 0000:0d:01.0: AC'97 interface is busy (1) ... snd_fm801 0000:0d:01.0: AC'97 0 does not respond - RESET snd_fm801 0000:0d:01.0: AC'97 interface is busy (1) snd_fm801 0000:0d:01.0: AC'97 interface is busy (1) snd_fm801 0000:0d:01.0: AC'97 0 access is not valid [0x0], removing mixer. snd_fm801: probe of 0000:0d:01.0 failed with error -5 Do a copy of TUNER_ONLY bit to be applied after autodetection is done. Fixes: d7ba858a7f7a (ALSA: fm801: implement TEA575x tuner autodetection) Signed-off-by: Andy Shevchenko <andriy.shevchenko(a)linux.intel.com> Cc: Ondrej Zary <linux(a)rainbow-software.org> --- sound/pci/fm801.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/sound/pci/fm801.c b/sound/pci/fm801.c index 4c9d804..6114d81 100644 --- a/sound/pci/fm801.c +++ b/sound/pci/fm801.c @@ -1269,6 +1269,8 @@ static int snd_fm801_create(struct snd_card *card, return -ENODEV; } } else if ((tea575x_tuner & TUNER_TYPE_MASK) == 0) { + unsigned int tuner_only = tea575x_tuner & TUNER_ONLY; + /* autodetect tuner connection */ for (tea575x_tuner = 1; tea575x_tuner <= 3; tea575x_tuner++) { chip->tea575x_tuner = tea575x_tuner; @@ -1283,6 +1285,8 @@ static int snd_fm801_create(struct snd_card *card, dev_err(card->dev, "TEA575x radio not found\n"); chip->tea575x_tuner = TUNER_DISABLED; } + + chip->tea575x_tuner |= tuner_only; } if (!(chip->tea575x_tuner & TUNER_DISABLED)) { strlcpy(chip->tea.card, get_tea575x_gpio(chip)->name, -- 2.6.4

2 5

[alsa-devel] [PATCH v6] sun4i-codec: Add FM, Line and Mic inputs
by Danny Milosavljevic 21 Dec '15

21 Dec '15

Add inputs to sun4i-codec: - FM-in Left and Right - Line-in Left and Right - Mic1-in - Mic2-in Signed-off-by: Danny Milosavljevic <dannym+a(a)scratchpost.org> Tested-by: Danny Milosavljevic <dannym+a(a)scratchpost.org> (ONLY ON A20!) --- Hi, this is the sixth version of the patch that adds inputs to sun4i-codec. Changes compared to v5 are: - Mic preamplifier special cases for A20 and A10 now are now not icky: There are two different _widget arrays and the probe() function now selects the right one to pass to snd_soc_register_codec() unmodified. - sun7i-specific things (A20-specific things) are now grouped together. I successfully tested it again on an A20 board using alsamixer, headphones, a radio and my ears. Note that because of missing capturing support I tested only the mixing, for Mic, Line, and FM. The patches are on top of <git://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux.git>, branch "sunxi/for-next". Regards, Danny --- b/sound/soc/sunxi/sun4i-codec.c | 179 +++++++++++++++++++++++++++++++++++++--- 1 file changed, 166 insertions(+), 13 deletions(-) diff --git a/sound/soc/sunxi/sun4i-codec.c b/sound/soc/sunxi/sun4i-codec.c index bcbf4da..4241999 100644 --- a/sound/soc/sunxi/sun4i-codec.c +++ b/sound/soc/sunxi/sun4i-codec.c @@ -57,9 +57,20 @@ #define SUN4I_CODEC_DAC_ACTL_DACAENR (31) #define SUN4I_CODEC_DAC_ACTL_DACAENL (30) #define SUN4I_CODEC_DAC_ACTL_MIXEN (29) +#define SUN4I_CODEC_DAC_ACTL_LNG (26) +#define SUN4I_CODEC_DAC_ACTL_FMG (23) +#define SUN4I_CODEC_DAC_ACTL_MICG (20) +#define SUN4I_CODEC_DAC_ACTL_LLNS (19) +#define SUN4I_CODEC_DAC_ACTL_RLNS (18) +#define SUN4I_CODEC_DAC_ACTL_LFMS (17) +#define SUN4I_CODEC_DAC_ACTL_RFMS (16) #define SUN4I_CODEC_DAC_ACTL_LDACLMIXS (15) #define SUN4I_CODEC_DAC_ACTL_RDACRMIXS (14) #define SUN4I_CODEC_DAC_ACTL_LDACRMIXS (13) +#define SUN4I_CODEC_DAC_ACTL_MIC1LS (12) +#define SUN4I_CODEC_DAC_ACTL_MIC1RS (11) +#define SUN4I_CODEC_DAC_ACTL_MIC2LS (10) +#define SUN4I_CODEC_DAC_ACTL_MIC2RS (9) #define SUN4I_CODEC_DAC_ACTL_DACPAS (8) #define SUN4I_CODEC_DAC_ACTL_MIXPAS (7) #define SUN4I_CODEC_DAC_ACTL_PA_MUTE (6) @@ -84,8 +95,11 @@ #define SUN4I_CODEC_ADC_ACTL_PREG1EN (29) #define SUN4I_CODEC_ADC_ACTL_PREG2EN (28) #define SUN4I_CODEC_ADC_ACTL_VMICEN (27) +#define SUN4I_CODEC_ADC_ACTL_PREG1_A10 (25) +#define SUN4I_CODEC_ADC_ACTL_PREG2_A10 (23) #define SUN4I_CODEC_ADC_ACTL_VADCG (20) #define SUN4I_CODEC_ADC_ACTL_ADCIS (17) +#define SUN4I_CODEC_ADC_ACTL_LNRDF (16) #define SUN4I_CODEC_ADC_ACTL_PA_EN (4) #define SUN4I_CODEC_ADC_ACTL_DDE (3) #define SUN4I_CODEC_ADC_DEBUG (0x2c) @@ -94,7 +108,6 @@ #define SUN4I_CODEC_DAC_TXCNT (0x30) #define SUN4I_CODEC_ADC_RXCNT (0x34) #define SUN4I_CODEC_AC_SYS_VERI (0x38) -#define SUN4I_CODEC_AC_MIC_PHONE_CAL (0x3c) struct sun4i_codec { struct device *dev; @@ -402,16 +415,77 @@ static const struct snd_kcontrol_new sun4i_codec_pa_mute = SUN4I_CODEC_DAC_ACTL_PA_MUTE, 1, 0); static DECLARE_TLV_DB_SCALE(sun4i_codec_pa_volume_scale, -6300, 100, 1); +static DECLARE_TLV_DB_SCALE(sun4i_codec_linein_loopback_gain_scale, -150, 150, 0); +static DECLARE_TLV_DB_SCALE(sun4i_codec_fmin_loopback_gain_scale, -450, 150, 0); +static DECLARE_TLV_DB_SCALE(sun4i_codec_micin_loopback_gain_scale, -450, 150, 0); +static DECLARE_TLV_DB_RANGE(sun4i_codec_micin_preamp_gain_scale_a10, + 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0), + 1, 7, TLV_DB_SCALE_ITEM(3500, 300, 0) +); + +#define SUN4I_COMMON_CODEC_WIDGETS \ + SOC_SINGLE_TLV("PA Volume", SUN4I_CODEC_DAC_ACTL, \ + SUN4I_CODEC_DAC_ACTL_PA_VOL, 0x3F, 0, \ + sun4i_codec_pa_volume_scale), \ + /* Line-In, FM-In, Mic1-In, Mic2-In */ \ + SOC_SINGLE_TLV("Line-In Playback Gain", \ + SUN4I_CODEC_DAC_ACTL, \ + SUN4I_CODEC_DAC_ACTL_LNG, \ + 1, \ + 0, \ + sun4i_codec_linein_loopback_gain_scale), \ + SOC_SINGLE_TLV("FM-In Playback Gain", \ + SUN4I_CODEC_DAC_ACTL, \ + SUN4I_CODEC_DAC_ACTL_FMG, \ + 3, \ + 0, \ + sun4i_codec_fmin_loopback_gain_scale), \ + SOC_SINGLE_TLV("Mic-In Playback Gain", \ + SUN4I_CODEC_DAC_ACTL, \ + SUN4I_CODEC_DAC_ACTL_MICG, \ + 7, \ + 0, \ + sun4i_codec_micin_loopback_gain_scale), \ + SOC_SINGLE_TLV("Mic1-In Boost Switch", \ + SUN4I_CODEC_ADC_ACTL, \ + SUN4I_CODEC_ADC_ACTL_PREG1EN, \ + 1, \ + 0, \ + NULL), \ + SOC_SINGLE_TLV("Mic2-In Boost Switch", \ + SUN4I_CODEC_ADC_ACTL, \ + SUN4I_CODEC_ADC_ACTL_PREG2EN, \ + 1, \ + 0, \ + NULL) static const struct snd_kcontrol_new sun4i_codec_widgets[] = { - SOC_SINGLE_TLV("PA Volume", SUN4I_CODEC_DAC_ACTL, - SUN4I_CODEC_DAC_ACTL_PA_VOL, 0x3F, 0, - sun4i_codec_pa_volume_scale), + SUN4I_COMMON_CODEC_WIDGETS, + SOC_SINGLE_TLV("Mic1-In Boost Gain", + SUN4I_CODEC_ADC_ACTL, + SUN4I_CODEC_ADC_ACTL_PREG1_A10, + 3, + 0, + sun4i_codec_micin_preamp_gain_scale_a10), + SOC_SINGLE_TLV("Mic2-In Boost Gain", + SUN4I_CODEC_ADC_ACTL, + SUN4I_CODEC_ADC_ACTL_PREG2_A10, + 3, + 0, + sun4i_codec_micin_preamp_gain_scale_a10), }; static const struct snd_kcontrol_new sun4i_codec_left_mixer_controls[] = { SOC_DAPM_SINGLE("Left DAC Playback Switch", SUN4I_CODEC_DAC_ACTL, SUN4I_CODEC_DAC_ACTL_LDACLMIXS, 1, 0), + SOC_DAPM_SINGLE("Left Line-In Playback Switch", SUN4I_CODEC_DAC_ACTL, + SUN4I_CODEC_DAC_ACTL_LLNS, 1, 0), + SOC_DAPM_SINGLE("Left FM-In Playback Switch", SUN4I_CODEC_DAC_ACTL, + SUN4I_CODEC_DAC_ACTL_LFMS, 1, 0), + SOC_DAPM_SINGLE("Mic1-In Playback Switch", SUN4I_CODEC_DAC_ACTL, + SUN4I_CODEC_DAC_ACTL_MIC1LS, 1, 0), + SOC_DAPM_SINGLE("Mic2-In Playback Switch", SUN4I_CODEC_DAC_ACTL, + SUN4I_CODEC_DAC_ACTL_MIC2LS, 1, 0), }; static const struct snd_kcontrol_new sun4i_codec_right_mixer_controls[] = { @@ -419,6 +493,14 @@ static const struct snd_kcontrol_new sun4i_codec_right_mixer_controls[] = { SUN4I_CODEC_DAC_ACTL_RDACRMIXS, 1, 0), SOC_DAPM_SINGLE("Left DAC Playback Switch", SUN4I_CODEC_DAC_ACTL, SUN4I_CODEC_DAC_ACTL_LDACRMIXS, 1, 0), + SOC_DAPM_SINGLE("Right Line-In Playback Switch", SUN4I_CODEC_DAC_ACTL, + SUN4I_CODEC_DAC_ACTL_RLNS, 1, 0), + SOC_DAPM_SINGLE("Right FM-In Playback Switch", SUN4I_CODEC_DAC_ACTL, + SUN4I_CODEC_DAC_ACTL_RFMS, 1, 0), + SOC_DAPM_SINGLE("Mic1-In Playback Switch", SUN4I_CODEC_DAC_ACTL, + SUN4I_CODEC_DAC_ACTL_MIC1RS, 1, 0), + SOC_DAPM_SINGLE("Mic2-In Playback Switch", SUN4I_CODEC_DAC_ACTL, + SUN4I_CODEC_DAC_ACTL_MIC2RS, 1, 0), }; static const struct snd_kcontrol_new sun4i_codec_pa_mixer_controls[] = { @@ -462,8 +544,16 @@ static const struct snd_soc_dapm_widget sun4i_codec_dapm_widgets[] = { SND_SOC_DAPM_OUTPUT("HP Right"), SND_SOC_DAPM_OUTPUT("HP Left"), + + SND_SOC_DAPM_INPUT("Line-In Right"), + SND_SOC_DAPM_INPUT("Line-In Left"), + SND_SOC_DAPM_INPUT("FM-In Right"), + SND_SOC_DAPM_INPUT("FM-In Left"), + SND_SOC_DAPM_INPUT("Mic1-In"), + SND_SOC_DAPM_INPUT("Mic2-In"), }; +/* {sink, control, source} */ static const struct snd_soc_dapm_route sun4i_codec_dapm_routes[] = { /* Left DAC Routes */ { "Left DAC", NULL, "DAC" }, @@ -490,9 +580,23 @@ static const struct snd_soc_dapm_route sun4i_codec_dapm_routes[] = { { "Pre-Amplifier Mute", "Switch", "Pre-Amplifier" }, { "HP Right", NULL, "Pre-Amplifier Mute" }, { "HP Left", NULL, "Pre-Amplifier Mute" }, + + /* Line-In, FM-In */ + { "Right Mixer", "Right Line-In Playback Switch", "Line-In Right" }, + { "Left Mixer", "Left Line-In Playback Switch", "Line-In Left" }, + { "Right Mixer", "Right FM-In Playback Switch", "FM-In Right" }, + { "Left Mixer", "Left FM-In Playback Switch", "FM-In Left" }, + + /* Mic1-In */ + { "Right Mixer", "Mic1-In Playback Switch", "Mic1-In" }, + { "Left Mixer", "Mic1-In Playback Switch", "Mic1-In" }, + + /* Mic2-In */ + { "Right Mixer", "Mic2-In Playback Switch", "Mic2-In" }, + { "Left Mixer", "Mic2-In Playback Switch", "Mic2-In" }, }; -static struct snd_soc_codec_driver sun4i_codec_codec = { +static const struct snd_soc_codec_driver sun4i_codec_codec = { .controls = sun4i_codec_widgets, .num_controls = ARRAY_SIZE(sun4i_codec_widgets), .dapm_widgets = sun4i_codec_dapm_widgets, @@ -533,13 +637,6 @@ static struct snd_soc_dai_driver dummy_cpu_dai = { }, }; -static const struct regmap_config sun4i_codec_regmap_config = { - .reg_bits = 32, - .reg_stride = 4, - .val_bits = 32, - .max_register = SUN4I_CODEC_AC_MIC_PHONE_CAL, -}; - static const struct of_device_id sun4i_codec_of_match[] = { { .compatible = "allwinner,sun4i-a10-codec" }, { .compatible = "allwinner,sun7i-a20-codec" }, @@ -586,6 +683,56 @@ static struct snd_soc_card *sun4i_codec_create_card(struct device *dev) return card; }; +/* sun7i-specific things: */ +/* MIC_PHONE_CAL register offsets and bit fields (A20 only) */ +#define SUN7I_CODEC_AC_MIC_PHONE_CAL (0x3c) +#define SUN7I_CODEC_AC_MIC_PHONE_CAL_PREG1 (29) +#define SUN7I_CODEC_AC_MIC_PHONE_CAL_PREG2 (26) +/* note: no idea where the output pins for the following are. */ +#define SUN7I_CODEC_AC_MIC_PHONE_CAL_PHONEOUTG (5) +#define SUN7I_CODEC_AC_MIC_PHONE_CAL_PHONEOUTEN (4) +#define SUN7I_CODEC_AC_MIC_PHONE_CAL_PHONEOUTS3 (3) +#define SUN7I_CODEC_AC_MIC_PHONE_CAL_PHONEOUTS2 (2) +#define SUN7I_CODEC_AC_MIC_PHONE_CAL_PHONEOUTS1 (1) +#define SUN7I_CODEC_AC_MIC_PHONE_CAL_PHONEOUTS0 (0) + +static DECLARE_TLV_DB_RANGE(sun7i_codec_micin_preamp_gain_scale, + 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0), + 1, 7, TLV_DB_SCALE_ITEM(2400, 300, 0) +); + +static const struct snd_kcontrol_new sun7i_codec_widgets[] = { + SUN4I_COMMON_CODEC_WIDGETS, + SOC_SINGLE_TLV("Mic1-In Boost Gain", + SUN7I_CODEC_AC_MIC_PHONE_CAL, + SUN7I_CODEC_AC_MIC_PHONE_CAL_PREG1, + 7, + 0, + sun7i_codec_micin_preamp_gain_scale), + SOC_SINGLE_TLV("Mic2-In Boost Gain", + SUN7I_CODEC_AC_MIC_PHONE_CAL, + SUN7I_CODEC_AC_MIC_PHONE_CAL_PREG2, + 7, + 0, + sun7i_codec_micin_preamp_gain_scale), +}; + +static const struct snd_soc_codec_driver sun7i_codec_codec = { + .controls = sun7i_codec_widgets, + .num_controls = ARRAY_SIZE(sun7i_codec_widgets), + .dapm_widgets = sun4i_codec_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(sun4i_codec_dapm_widgets), + .dapm_routes = sun4i_codec_dapm_routes, + .num_dapm_routes = ARRAY_SIZE(sun4i_codec_dapm_routes), +}; +static const struct regmap_config sun4i_codec_regmap_config = { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + .max_register = SUN7I_CODEC_AC_MIC_PHONE_CAL, +}; +/* end sun7i-specific things */ + static int sun4i_codec_probe(struct platform_device *pdev) { struct snd_soc_card *card; @@ -593,6 +740,7 @@ static int sun4i_codec_probe(struct platform_device *pdev) struct resource *res; void __iomem *base; int ret; + const struct snd_soc_codec_driver* codec_codec; scodec = devm_kzalloc(&pdev->dev, sizeof(*scodec), GFP_KERNEL); if (!scodec) @@ -638,7 +786,12 @@ static int sun4i_codec_probe(struct platform_device *pdev) scodec->playback_dma_data.maxburst = 4; scodec->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; - ret = snd_soc_register_codec(&pdev->dev, &sun4i_codec_codec, + if (of_device_is_compatible(pdev->dev.of_node, + "allwinner,sun7i-a20-codec")) + codec_codec = &sun7i_codec_codec; + else + codec_codec = &sun4i_codec_codec; + ret = snd_soc_register_codec(&pdev->dev, codec_codec, &sun4i_codec_dai, 1); if (ret) { dev_err(&pdev->dev, "Failed to register our codec\n");

2 6

[alsa-devel] [PATCH 1/8] ASoC: max98357a: Add ACPI ID for Maxim
by yang.a.fang＠intel.com 21 Dec '15

21 Dec '15

From: Rohit Ainapure <rohit.m.ainapure(a)intel.com> Adding ACPI ID "MX98357A" for the MAXIM 98357A amp. Signed-off-by: Rohit Ainapure <rohit.m.ainapure(a)intel.com> Signed-off-by: Fang, Yang A <yang.a.fang(a)intel.com> Signed-off-by: Vinod Koul <vinod.koul(a)intel.com> --- sound/soc/codecs/max98357a.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/sound/soc/codecs/max98357a.c b/sound/soc/codecs/max98357a.c index f5e3dce..5b1dfb1 100644 --- a/sound/soc/codecs/max98357a.c +++ b/sound/soc/codecs/max98357a.c @@ -12,6 +12,7 @@ * max98357a.c -- MAX98357A ALSA SoC Codec driver */ +#include <linux/acpi.h> #include <linux/device.h> #include <linux/err.h> #include <linux/gpio.h> @@ -123,10 +124,19 @@ static const struct of_device_id max98357a_device_id[] = { MODULE_DEVICE_TABLE(of, max98357a_device_id); #endif +#ifdef CONFIG_ACPI +static const struct acpi_device_id max98357a_acpi_match[] = { + { "MX98357A", 0 }, + {}, +}; +MODULE_DEVICE_TABLE(acpi, max98357a_acpi_match); +#endif + static struct platform_driver max98357a_platform_driver = { .driver = { .name = "max98357a", .of_match_table = of_match_ptr(max98357a_device_id), + .acpi_match_table = ACPI_PTR(max98357a_acpi_match), }, .probe = max98357a_platform_probe, .remove = max98357a_platform_remove, -- 1.7.9.5

4 17

[alsa-devel] [PATCH v8 0/2] ASoc: sun4i-codec: Add FM, Line and Mic inputs
by Danny Milosavljevic 21 Dec '15

21 Dec '15

Hi, this is the eighth version of the patch set that adds inputs to sun4i-codec. Changes compared to v7 are: - fix the routes for line and mic capturing. The patches are on top of the branch "sunxi-next" in <git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git>. Regards, Danny --- Danny Milosavljevic (2): sun4i-codec: Add FM, Line and Mic inputs sun4i-codec: make it possible to use different codec_widgets for A10 and A20. b/sound/soc/sunxi/sun4i-codec.c | 230 +++++++++++++++++++++++++++++++++++++--- 1 file changed, 215 insertions(+), 15 deletions(-)

1 0

[alsa-devel] [GIT PULL] Add get_eld audio component for i915/HD-audio
by Takashi Iwai 21 Dec '15

21 Dec '15

Hi Daniel, please pull the get_eld op addition from: git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound.git tags/drm-i915-get-eld The topmost commit is 0bdf5a05647a66dcc6394986e061daeac9b1cf96 ---------------------------------------------------------------- Add get_eld audio component for i915/HD-audio Here are the patchset to add get_eld op to audio component for communicating more directly between i915 and HD-audio. Currently, the HDMI/DP audio status and ELD are notified and obtained via the hardware-level communication over HD-audio unsolicited event and verbs although the graphics driver holds the exactly same information. As we already have a notification via audio component, this is another step forward; namely, the audio driver may fetch directly the audio status and ELD via the new component op. The commits are based on Dave's latest drm-next branch. ---------------------------------------------------------------- Takashi Iwai (2): drm/i915: Add get_eld audio component drm/i915: Add reverse mapping between port and intel_encoder --- drivers/gpu/drm/i915/i915_drv.h | 2 + drivers/gpu/drm/i915/intel_audio.c | 79 ++++++++++++++++++++++++++------------ drivers/gpu/drm/i915/intel_ddi.c | 1 + drivers/gpu/drm/i915/intel_dp.c | 1 + drivers/gpu/drm/i915/intel_drv.h | 2 + drivers/gpu/drm/i915/intel_hdmi.c | 2 + include/drm/i915_component.h | 14 +++++++ 7 files changed, 77 insertions(+), 24 deletions(-)

2 3

[alsa-devel] [PATCH v4 0/5] ALSA: hda - hdmi support dynamic pcm assignment
by libin.yang＠linux.intel.com 21 Dec '15

21 Dec '15

From: Libin Yang <libin.yang(a)linux.intel.com> The patches are trying to support dynamically binding PCM to pin in HDMI/DP audio. The pin will not bind to any PCM if there is not monitor connected. When there is a monitor connected to the port (pin), driver will try to find a proper PCM to assign to the port and setup the pin if necessary. Libin Yang (5): ALSA: hda - hdmi begin to support dynamic PCM assignment ALSA: hda - hdmi playback without monitor in dynamic pcm bind mode ALSA: hda - hdmi operate spdif based on pcm ALSA: hda - hdmi dynamically bind PCM to pin when monitor hotplug ALSA: hda - hdmi setup pin when monitor hotplug in pcm dynamic assignment mode sound/pci/hda/patch_hdmi.c | 374 ++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 351 insertions(+), 23 deletions(-) -- 1.9.1

4 18

Re: [alsa-devel] [Intel-gfx] [PATCH V4 2/2] drm/i915: start adding dp mst audio
by Libin Yang 21 Dec '15

21 Dec '15

Add Takashi and ALSA mail list. On 12/10/2015 05:02 PM, Daniel Vetter wrote: > On Tue, Dec 08, 2015 at 04:01:20PM +0800, Libin Yang wrote: >> Hi all, >> >> Any comments on the patches? > > Sorry, simply fell through the cracks since Ander is on vacation. Takashi > is working on some cleanup patches to have a port->encoder mapping for the > audio side of i915. His patch cleans up all the existing audio code in > i915, but please work together with him to align mst code with the new > style. > > Both patches queued for next. Yes, I have seen Takashi's patches. I will check the patches. Best Regards, Libin > > Thanks, Daniel > >> >> Best Regards, >> Libin >> >> On 12/02/2015 02:09 PM, libin.yang(a)linux.intel.com wrote: >>> From: Libin Yang <libin.yang(a)linux.intel.com> >>> >>> This patch adds support for DP MST audio in i915. >>> >>> Enable audio codec when DP MST is enabled if has_audio flag is set. >>> Disable audio codec when DP MST is disabled if has_audio flag is set. >>> >>> Another separated patches to support DP MST audio will be implemented >>> in audio driver. >>> >>> Reviewed-by: Ander Conselvan de Oliveira <conselvan2(a)gmail.com> >>> Signed-off-by: Libin Yang <libin.yang(a)linux.intel.com> >>> Signed-off-by: Dave Airlie <airlied(a)redhat.com> >>> --- >>> drivers/gpu/drm/i915/i915_debugfs.c | 16 ++++++++++++++++ >>> drivers/gpu/drm/i915/intel_audio.c | 9 ++++++--- >>> drivers/gpu/drm/i915/intel_ddi.c | 20 +++++++++++++++----- >>> drivers/gpu/drm/i915/intel_dp_mst.c | 22 ++++++++++++++++++++++ >>> drivers/gpu/drm/i915/intel_drv.h | 2 ++ >>> 5 files changed, 61 insertions(+), 8 deletions(-) >>> >>> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c >>> index bfd57fb..8387638 100644 >>> --- a/drivers/gpu/drm/i915/i915_debugfs.c >>> +++ b/drivers/gpu/drm/i915/i915_debugfs.c >>> @@ -2850,6 +2850,20 @@ static void intel_dp_info(struct seq_file *m, >>> intel_panel_info(m, &intel_connector->panel); >>> } >>> >>> +static void intel_dp_mst_info(struct seq_file *m, >>> + struct intel_connector *intel_connector) >>> +{ >>> + struct intel_encoder *intel_encoder = intel_connector->encoder; >>> + struct intel_dp_mst_encoder *intel_mst = >>> + enc_to_mst(&intel_encoder->base); >>> + struct intel_digital_port *intel_dig_port = intel_mst->primary; >>> + struct intel_dp *intel_dp = &intel_dig_port->dp; >>> + bool has_audio = drm_dp_mst_port_has_audio(&intel_dp->mst_mgr, >>> + intel_connector->port); >>> + >>> + seq_printf(m, "\taudio support: %s\n", yesno(has_audio)); >>> +} >>> + >>> static void intel_hdmi_info(struct seq_file *m, >>> struct intel_connector *intel_connector) >>> { >>> @@ -2893,6 +2907,8 @@ static void intel_connector_info(struct seq_file *m, >>> intel_hdmi_info(m, intel_connector); >>> else if (intel_encoder->type == INTEL_OUTPUT_LVDS) >>> intel_lvds_info(m, intel_connector); >>> + else if (intel_encoder->type == INTEL_OUTPUT_DP_MST) >>> + intel_dp_mst_info(m, intel_connector); >>> } >>> >>> seq_printf(m, "\tmodes:\n"); >>> diff --git a/drivers/gpu/drm/i915/intel_audio.c b/drivers/gpu/drm/i915/intel_audio.c >>> index 9aa83e7..5ad2e66 100644 >>> --- a/drivers/gpu/drm/i915/intel_audio.c >>> +++ b/drivers/gpu/drm/i915/intel_audio.c >>> @@ -262,7 +262,8 @@ static void hsw_audio_codec_disable(struct intel_encoder *encoder) >>> tmp |= AUD_CONFIG_N_PROG_ENABLE; >>> tmp &= ~AUD_CONFIG_UPPER_N_MASK; >>> tmp &= ~AUD_CONFIG_LOWER_N_MASK; >>> - if (intel_pipe_has_type(intel_crtc, INTEL_OUTPUT_DISPLAYPORT)) >>> + if (intel_pipe_has_type(intel_crtc, INTEL_OUTPUT_DISPLAYPORT) || >>> + intel_pipe_has_type(intel_crtc, INTEL_OUTPUT_DP_MST)) >>> tmp |= AUD_CONFIG_N_VALUE_INDEX; >>> I915_WRITE(HSW_AUD_CFG(pipe), tmp); >>> >>> @@ -474,7 +475,8 @@ static void ilk_audio_codec_enable(struct drm_connector *connector, >>> tmp &= ~AUD_CONFIG_N_VALUE_INDEX; >>> tmp &= ~AUD_CONFIG_N_PROG_ENABLE; >>> tmp &= ~AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK; >>> - if (intel_pipe_has_type(intel_crtc, INTEL_OUTPUT_DISPLAYPORT)) >>> + if (intel_pipe_has_type(intel_crtc, INTEL_OUTPUT_DISPLAYPORT) || >>> + intel_pipe_has_type(intel_crtc, INTEL_OUTPUT_DP_MST)) >>> tmp |= AUD_CONFIG_N_VALUE_INDEX; >>> else >>> tmp |= audio_config_hdmi_pixel_clock(adjusted_mode); >>> @@ -512,7 +514,8 @@ void intel_audio_codec_enable(struct intel_encoder *intel_encoder) >>> >>> /* ELD Conn_Type */ >>> connector->eld[5] &= ~(3 << 2); >>> - if (intel_pipe_has_type(crtc, INTEL_OUTPUT_DISPLAYPORT)) >>> + if (intel_pipe_has_type(crtc, INTEL_OUTPUT_DISPLAYPORT) || >>> + intel_pipe_has_type(crtc, INTEL_OUTPUT_DP_MST)) >>> connector->eld[5] |= (1 << 2); >>> >>> connector->eld[6] = drm_av_sync_delay(connector, adjusted_mode) / 2; >>> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c >>> index 76ce7c2..bc7fffb 100644 >>> --- a/drivers/gpu/drm/i915/intel_ddi.c >>> +++ b/drivers/gpu/drm/i915/intel_ddi.c >>> @@ -3108,6 +3108,19 @@ void intel_ddi_fdi_disable(struct drm_crtc *crtc) >>> I915_WRITE(FDI_RX_CTL(PIPE_A), val); >>> } >>> >>> +bool intel_ddi_is_audio_enabled(struct drm_i915_private *dev_priv, >>> + struct intel_crtc *intel_crtc) >>> +{ >>> + u32 temp; >>> + >>> + if (intel_display_power_is_enabled(dev_priv, POWER_DOMAIN_AUDIO)) { >>> + temp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD); >>> + if (temp & AUDIO_OUTPUT_ENABLE(intel_crtc->pipe)) >>> + return true; >>> + } >>> + return false; >>> +} >>> + >>> void intel_ddi_get_config(struct intel_encoder *encoder, >>> struct intel_crtc_state *pipe_config) >>> { >>> @@ -3168,11 +3181,8 @@ void intel_ddi_get_config(struct intel_encoder *encoder, >>> break; >>> } >>> >>> - if (intel_display_power_is_enabled(dev_priv, POWER_DOMAIN_AUDIO)) { >>> - temp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD); >>> - if (temp & AUDIO_OUTPUT_ENABLE(intel_crtc->pipe)) >>> - pipe_config->has_audio = true; >>> - } >>> + pipe_config->has_audio = >>> + intel_ddi_is_audio_enabled(dev_priv, intel_crtc); >>> >>> if (encoder->type == INTEL_OUTPUT_EDP && dev_priv->vbt.edp_bpp && >>> pipe_config->pipe_bpp > dev_priv->vbt.edp_bpp) { >>> diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c >>> index 8c4e7df..8b608c2 100644 >>> --- a/drivers/gpu/drm/i915/intel_dp_mst.c >>> +++ b/drivers/gpu/drm/i915/intel_dp_mst.c >>> @@ -78,6 +78,8 @@ static bool intel_dp_mst_compute_config(struct intel_encoder *encoder, >>> return false; >>> } >>> >>> + if (drm_dp_mst_port_has_audio(&intel_dp->mst_mgr, found->port)) >>> + pipe_config->has_audio = true; >>> mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, bpp); >>> >>> pipe_config->pbn = mst_pbn; >>> @@ -102,6 +104,11 @@ static void intel_mst_disable_dp(struct intel_encoder *encoder) >>> struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); >>> struct intel_digital_port *intel_dig_port = intel_mst->primary; >>> struct intel_dp *intel_dp = &intel_dig_port->dp; >>> + struct drm_device *dev = encoder->base.dev; >>> + struct drm_i915_private *dev_priv = dev->dev_private; >>> + struct drm_crtc *crtc = encoder->base.crtc; >>> + struct intel_crtc *intel_crtc = to_intel_crtc(crtc); >>> + >>> int ret; >>> >>> DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); >>> @@ -112,6 +119,10 @@ static void intel_mst_disable_dp(struct intel_encoder *encoder) >>> if (ret) { >>> DRM_ERROR("failed to update payload %d\n", ret); >>> } >>> + if (intel_crtc->config->has_audio) { >>> + intel_audio_codec_disable(encoder); >>> + intel_display_power_put(dev_priv, POWER_DOMAIN_AUDIO); >>> + } >>> } >>> >>> static void intel_mst_post_disable_dp(struct intel_encoder *encoder) >>> @@ -208,6 +219,7 @@ static void intel_mst_enable_dp(struct intel_encoder *encoder) >>> struct intel_dp *intel_dp = &intel_dig_port->dp; >>> struct drm_device *dev = intel_dig_port->base.base.dev; >>> struct drm_i915_private *dev_priv = dev->dev_private; >>> + struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); >>> enum port port = intel_dig_port->port; >>> int ret; >>> >>> @@ -220,6 +232,13 @@ static void intel_mst_enable_dp(struct intel_encoder *encoder) >>> ret = drm_dp_check_act_status(&intel_dp->mst_mgr); >>> >>> ret = drm_dp_update_payload_part2(&intel_dp->mst_mgr); >>> + >>> + if (crtc->config->has_audio) { >>> + DRM_DEBUG_DRIVER("Enabling DP audio on pipe %c\n", >>> + pipe_name(crtc->pipe)); >>> + intel_display_power_get(dev_priv, POWER_DOMAIN_AUDIO); >>> + intel_audio_codec_enable(encoder); >>> + } >>> } >>> >>> static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder, >>> @@ -245,6 +264,9 @@ static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder, >>> >>> pipe_config->has_dp_encoder = true; >>> >>> + pipe_config->has_audio = >>> + intel_ddi_is_audio_enabled(dev_priv, crtc); >>> + >>> temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder)); >>> if (temp & TRANS_DDI_PHSYNC) >>> flags |= DRM_MODE_FLAG_PHSYNC; >>> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h >>> index 1ffd8d5..0d2c59f 100644 >>> --- a/drivers/gpu/drm/i915/intel_drv.h >>> +++ b/drivers/gpu/drm/i915/intel_drv.h >>> @@ -1011,6 +1011,8 @@ void intel_ddi_set_pipe_settings(struct drm_crtc *crtc); >>> void intel_ddi_prepare_link_retrain(struct intel_dp *intel_dp); >>> bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector); >>> void intel_ddi_fdi_disable(struct drm_crtc *crtc); >>> +bool intel_ddi_is_audio_enabled(struct drm_i915_private *dev_priv, >>> + struct intel_crtc *intel_crtc); >>> void intel_ddi_get_config(struct intel_encoder *encoder, >>> struct intel_crtc_state *pipe_config); >>> struct intel_encoder * >>> >> _______________________________________________ >> Intel-gfx mailing list >> Intel-gfx(a)lists.freedesktop.org >> http://lists.freedesktop.org/mailman/listinfo/intel-gfx >

3 9

[alsa-devel] [PATCH] ASoC: fsl_asrc: old version asrc only support even numbered channels
by Zidan Wang 21 Dec '15

21 Dec '15

The latest asrc's channel bits is 4 bit, the old asrc's channel bits is 3. For the old version asrc, channel should be a even number. Signed-off-by: Zidan Wang <zidan.wang(a)freescale.com> --- sound/soc/fsl/fsl_asrc.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/sound/soc/fsl/fsl_asrc.c b/sound/soc/fsl/fsl_asrc.c index be78dc9..484e46ca 100644 --- a/sound/soc/fsl/fsl_asrc.c +++ b/sound/soc/fsl/fsl_asrc.c @@ -113,7 +113,8 @@ static int fsl_asrc_request_pair(int channels, struct fsl_asrc_pair *pair) if (index == ASRC_INVALID_PAIR) { dev_err(dev, "all pairs are busy now\n"); ret = -EBUSY; - } else if (asrc_priv->channel_avail < channels) { + } else if (asrc_priv->channel_avail < channels || + (asrc_priv->channel_bits < 4 && channels % 2 != 0)) { dev_err(dev, "can't afford required channels: %d\n", channels); ret = -EINVAL; } else { -- 1.9.1

2 1

[alsa-devel] [PATCH v2] ASoC: fsl_asrc: sound is wrong after suspend/resume
by Zidan Wang 21 Dec '15

21 Dec '15

The register ASRCFG is volatile, but some bits need to be recovered after suspend/resume. Signed-off-by: Zidan Wang <zidan.wang(a)freescale.com> --- v1->v2: 1. fix indentation issue. 2. add a macro for the magic number. sound/soc/fsl/fsl_asrc.c | 7 +++++++ sound/soc/fsl/fsl_asrc.h | 6 ++++++ 2 files changed, 13 insertions(+) diff --git a/sound/soc/fsl/fsl_asrc.c b/sound/soc/fsl/fsl_asrc.c index 484e46ca..d964016 100644 --- a/sound/soc/fsl/fsl_asrc.c +++ b/sound/soc/fsl/fsl_asrc.c @@ -990,6 +990,9 @@ static int fsl_asrc_suspend(struct device *dev) { struct fsl_asrc *asrc_priv = dev_get_drvdata(dev); + regmap_read(asrc_priv->regmap, REG_ASRCFG, + &asrc_priv->regcache_cfg); + regcache_cache_only(asrc_priv->regmap, true); regcache_mark_dirty(asrc_priv->regmap); @@ -1010,6 +1013,10 @@ static int fsl_asrc_resume(struct device *dev) regcache_cache_only(asrc_priv->regmap, false); regcache_sync(asrc_priv->regmap); + regmap_update_bits(asrc_priv->regmap, REG_ASRCFG, + ASRCFG_NDPRi_ALL_MASK | ASRCFG_POSTMODi_ALL_MASK | + ASRCFG_PREMODi_ALL_MASK, asrc_priv->regcache_cfg); + /* Restart enabled pairs */ regmap_update_bits(asrc_priv->regmap, REG_ASRCTR, ASRCTR_ASRCEi_ALL_MASK, asrctr); diff --git a/sound/soc/fsl/fsl_asrc.h b/sound/soc/fsl/fsl_asrc.h index 68802cd..c119cb0 100644 --- a/sound/soc/fsl/fsl_asrc.h +++ b/sound/soc/fsl/fsl_asrc.h @@ -132,10 +132,13 @@ #define ASRCFG_INIRQi (1 << ASRCFG_INIRQi_SHIFT(i)) #define ASRCFG_NDPRi_SHIFT(i) (18 + i) #define ASRCFG_NDPRi_MASK(i) (1 << ASRCFG_NDPRi_SHIFT(i)) +#define ASRCFG_NDPRi_ALL_SHIFT 18 +#define ASRCFG_NDPRi_ALL_MASK (7 << ASRCFG_NDPRi_ALL_SHIFT) #define ASRCFG_NDPRi (1 << ASRCFG_NDPRi_SHIFT(i)) #define ASRCFG_POSTMODi_SHIFT(i) (8 + (i << 2)) #define ASRCFG_POSTMODi_WIDTH 2 #define ASRCFG_POSTMODi_MASK(i) (((1 << ASRCFG_POSTMODi_WIDTH) - 1) << ASRCFG_POSTMODi_SHIFT(i)) +#define ASRCFG_POSTMODi_ALL_MASK (ASRCFG_POSTMODi_MASK(0) | ASRCFG_POSTMODi_MASK(1) | ASRCFG_POSTMODi_MASK(2)) #define ASRCFG_POSTMOD(i, v) ((v) << ASRCFG_POSTMODi_SHIFT(i)) #define ASRCFG_POSTMODi_UP(i) (0 << ASRCFG_POSTMODi_SHIFT(i)) #define ASRCFG_POSTMODi_DCON(i) (1 << ASRCFG_POSTMODi_SHIFT(i)) @@ -143,6 +146,7 @@ #define ASRCFG_PREMODi_SHIFT(i) (6 + (i << 2)) #define ASRCFG_PREMODi_WIDTH 2 #define ASRCFG_PREMODi_MASK(i) (((1 << ASRCFG_PREMODi_WIDTH) - 1) << ASRCFG_PREMODi_SHIFT(i)) +#define ASRCFG_PREMODi_ALL_MASK (ASRCFG_PREMODi_MASK(0) | ASRCFG_PREMODi_MASK(1) | ASRCFG_PREMODi_MASK(2)) #define ASRCFG_PREMOD(i, v) ((v) << ASRCFG_PREMODi_SHIFT(i)) #define ASRCFG_PREMODi_UP(i) (0 << ASRCFG_PREMODi_SHIFT(i)) #define ASRCFG_PREMODi_DCON(i) (1 << ASRCFG_PREMODi_SHIFT(i)) @@ -453,6 +457,8 @@ struct fsl_asrc { int asrc_rate; int asrc_width; + + u32 regcache_cfg; }; extern struct snd_soc_platform_driver fsl_asrc_platform; -- 1.9.1

2 1

[alsa-devel] [PATCH v7 0/2] sun4i-codec: Add FM, Line and Mic inputs
by Danny Milosavljevic 21 Dec '15

21 Dec '15

Hi, this is the seventh version of the patch set that adds inputs to sun4i-codec. Changes compared to v6 are: - preparation for different A20, A10 controls is now in an extra patch. - all register definitions are now at the top - sun7i-specific things (A20-specific things) are now less grouped-together. The patches are on top of the branch "sunxi-next" in <git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git>. Regards, Danny --- Danny Milosavljevic (2): sun4i-codec: Add FM, Line and Mic inputs sun4i-codec: make it possible to use different codec_widgets for A10 and A20. sound/soc/sunxi/sun4i-codec.c | 223 +++++++++++++++++++++++++++++++++++++---

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[alsa-devel] [PATCH v1 1/4] ALSA: fm801: explicitly free IRQ line
by Andy Shevchenko 20 Dec '15

20 Dec '15

Otherwise we will have a warning on ->remove() since device is a PCI one. WARNING: CPU: 4 PID: 1411 at /home/andy/prj/linux/fs/proc/generic.c:575 remove_proc_entry+0x137/0x160() remove_proc_entry: removing non-empty directory 'irq/21', leaking at least 'snd_fm801' Fixes: 5618955c4269 (ALSA: fm801: move to pcim_* and devm_* functions) Signed-off-by: Andy Shevchenko <andriy.shevchenko(a)linux.intel.com> --- The patch series has been tested on SF64-PCR card. sound/pci/fm801.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sound/pci/fm801.c b/sound/pci/fm801.c index 1fdd92b6..f57847c 100644 --- a/sound/pci/fm801.c +++ b/sound/pci/fm801.c @@ -1165,6 +1165,8 @@ static int snd_fm801_free(struct fm801 *chip) cmdw |= 0x00c3; fm801_writew(chip, IRQ_MASK, cmdw); + devm_free_irq(&chip->pci->dev, chip->irq, chip); + __end_hw: #ifdef CONFIG_SND_FM801_TEA575X_BOOL if (!(chip->tea575x_tuner & TUNER_DISABLED)) { -- 2.6.4

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[alsa-devel] [PATCH V2] ALSA: oss: consolidate kmalloc/memset 0 call to kzalloc
by Nicholas Mc Guire 20 Dec '15

20 Dec '15

This is an API consolidation only. The use of kmalloc + memset to 0 is equivalent to kzalloc. Signed-off-by: Nicholas Mc Guire <hofrat(a)osadl.org> --- V2: somehow managed to insert exactly the same line being removed so this time actually do the intended kmalloc->kzalloc replacement Found by coccinelle script (relaxed version of scripts/coccinelle/api/alloc/kzalloc-simple.cocci) Patch was compile tested with: x86_64_defconfig CONFIG_SND_PCM_OSS=y Patch is against linux-next (localversion-next is -next-20150518) diff --git a/sound/core/oss/pcm_oss.c b/sound/core/oss/pcm_oss.c index e557dbe..8cdd06f 100644 --- a/sound/core/oss/pcm_oss.c +++ b/sound/core/oss/pcm_oss.c @@ -851,7 +851,7 @@ static int snd_pcm_oss_change_params(struct snd_pcm_substream *substream) if (mutex_lock_interruptible(&runtime->oss.params_lock)) return -EINTR; - sw_params = kmalloc(sizeof(*sw_params), GFP_KERNEL); + sw_params = kzalloc(sizeof(*sw_params), GFP_KERNEL); params = kmalloc(sizeof(*params), GFP_KERNEL); sparams = kmalloc(sizeof(*sparams), GFP_KERNEL); if (!sw_params || !params || !sparams) { @@ -989,7 +989,6 @@ static int snd_pcm_oss_change_params(struct snd_pcm_substream *substream) goto failure; } - memset(sw_params, 0, sizeof(*sw_params)); if (runtime->oss.trigger) { sw_params->start_threshold = 1; } else { -- 1.7.10.4

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[alsa-devel] [PATCH] ASoC: rt5616: add rt5616 codec driver
by Bard Liao 19 Dec '15

19 Dec '15

This is the initial codec driver for rt5616. Signed-off-by: Bard Liao <bardliao(a)realtek.com> --- sound/soc/codecs/Kconfig | 6 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/rt5616.c | 1372 ++++++++++++++++++++++++++++++++++ sound/soc/codecs/rt5616.h | 1819 +++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 3199 insertions(+) create mode 100644 sound/soc/codecs/rt5616.c create mode 100644 sound/soc/codecs/rt5616.h diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index c971371..38102a0 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -95,6 +95,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_PCM512x_SPI if SPI_MASTER select SND_SOC_RT286 if I2C select SND_SOC_RT298 if I2C + select SND_SOC_RT5616 if I2C select SND_SOC_RT5631 if I2C select SND_SOC_RT5640 if I2C select SND_SOC_RT5645 if I2C @@ -563,12 +564,14 @@ config SND_SOC_PCM512x_SPI config SND_SOC_RL6231 tristate + default y if SND_SOC_RT5616=y default y if SND_SOC_RT5640=y default y if SND_SOC_RT5645=y default y if SND_SOC_RT5651=y default y if SND_SOC_RT5659=y default y if SND_SOC_RT5670=y default y if SND_SOC_RT5677=y + default m if SND_SOC_RT5616=m default m if SND_SOC_RT5640=m default m if SND_SOC_RT5645=m default m if SND_SOC_RT5651=m @@ -591,6 +594,9 @@ config SND_SOC_RT298 tristate depends on I2C +config SND_SOC_RT5616 + tristate + config SND_SOC_RT5631 tristate "Realtek ALC5631/RT5631 CODEC" depends on I2C diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index 813dd6d..fb846e2 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -92,6 +92,7 @@ snd-soc-rl6231-objs := rl6231.o snd-soc-rl6347a-objs := rl6347a.o snd-soc-rt286-objs := rt286.o snd-soc-rt298-objs := rt298.o +snd-soc-rt5616-objs := rt5616.o snd-soc-rt5631-objs := rt5631.o snd-soc-rt5640-objs := rt5640.o snd-soc-rt5645-objs := rt5645.o @@ -295,6 +296,7 @@ obj-$(CONFIG_SND_SOC_RL6231) += snd-soc-rl6231.o obj-$(CONFIG_SND_SOC_RL6347A) += snd-soc-rl6347a.o obj-$(CONFIG_SND_SOC_RT286) += snd-soc-rt286.o obj-$(CONFIG_SND_SOC_RT298) += snd-soc-rt298.o +obj-$(CONFIG_SND_SOC_RT5616) += snd-soc-rt5616.o obj-$(CONFIG_SND_SOC_RT5631) += snd-soc-rt5631.o obj-$(CONFIG_SND_SOC_RT5640) += snd-soc-rt5640.o obj-$(CONFIG_SND_SOC_RT5645) += snd-soc-rt5645.o diff --git a/sound/soc/codecs/rt5616.c b/sound/soc/codecs/rt5616.c new file mode 100644 index 0000000..f4005cb --- /dev/null +++ b/sound/soc/codecs/rt5616.c @@ -0,0 +1,1372 @@ +/* + * rt5616.c -- RT5616 ALSA SoC audio codec driver + * + * Copyright 2015 Realtek Semiconductor Corp. + * Author: Bard Liao <bardliao(a)realtek.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/module.h> +#include <linux/moduleparam.h> +#include <linux/init.h> +#include <linux/delay.h> +#include <linux/pm.h> +#include <linux/i2c.h> +#include <linux/platform_device.h> +#include <linux/spi/spi.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/soc.h> +#include <sound/soc-dapm.h> +#include <sound/initval.h> +#include <sound/tlv.h> + +#include "rl6231.h" +#include "rt5616.h" + +#define RT5616_PR_RANGE_BASE (0xff + 1) +#define RT5616_PR_SPACING 0x100 + +#define RT5616_PR_BASE (RT5616_PR_RANGE_BASE + (0 * RT5616_PR_SPACING)) + +static const struct regmap_range_cfg rt5616_ranges[] = { + { + .name = "PR", + .range_min = RT5616_PR_BASE, + .range_max = RT5616_PR_BASE + 0xf8, + .selector_reg = RT5616_PRIV_INDEX, + .selector_mask = 0xff, + .selector_shift = 0x0, + .window_start = RT5616_PRIV_DATA, + .window_len = 0x1, + }, +}; + +static const struct reg_sequence init_list[] = { + {RT5616_PR_BASE + 0x3d, 0x3e00}, + {RT5616_PR_BASE + 0x25, 0x6110}, + {RT5616_PR_BASE + 0x20, 0x611f}, + {RT5616_PR_BASE + 0x21, 0x4040}, + {RT5616_PR_BASE + 0x23, 0x0004}, +}; +#define RT5616_INIT_REG_LEN ARRAY_SIZE(init_list) + +static const struct reg_default rt5616_reg[] = { + { 0x00, 0x0021 }, + { 0x02, 0xc8c8 }, + { 0x03, 0xc8c8 }, + { 0x05, 0x0000 }, + { 0x0d, 0x0000 }, + { 0x0f, 0x0808 }, + { 0x19, 0xafaf }, + { 0x1c, 0x2f2f }, + { 0x1e, 0x0000 }, + { 0x27, 0x7860 }, + { 0x29, 0x8080 }, + { 0x2a, 0x5252 }, + { 0x3b, 0x0000 }, + { 0x3c, 0x006f }, + { 0x3d, 0x0000 }, + { 0x3e, 0x006f }, + { 0x45, 0x6000 }, + { 0x4d, 0x0000 }, + { 0x4e, 0x0000 }, + { 0x4f, 0x0279 }, + { 0x50, 0x0000 }, + { 0x51, 0x0000 }, + { 0x52, 0x0279 }, + { 0x53, 0xf000 }, + { 0x61, 0x0000 }, + { 0x62, 0x0000 }, + { 0x63, 0x00c0 }, + { 0x64, 0x0000 }, + { 0x65, 0x0000 }, + { 0x66, 0x0000 }, + { 0x70, 0x8000 }, + { 0x73, 0x1104 }, + { 0x74, 0x0c00 }, + { 0x80, 0x0000 }, + { 0x81, 0x0000 }, + { 0x82, 0x0000 }, + { 0x8b, 0x0600 }, + { 0x8e, 0x0004 }, + { 0x8f, 0x1100 }, + { 0x90, 0x0000 }, + { 0x91, 0x0000 }, + { 0x92, 0x0000 }, + { 0x93, 0x2000 }, + { 0x94, 0x0200 }, + { 0x95, 0x0000 }, + { 0xb0, 0x2080 }, + { 0xb1, 0x0000 }, + { 0xb2, 0x0000 }, + { 0xb4, 0x2206 }, + { 0xb5, 0x1f00 }, + { 0xb6, 0x0000 }, + { 0xb7, 0x0000 }, + { 0xbb, 0x0000 }, + { 0xbc, 0x0000 }, + { 0xbd, 0x0000 }, + { 0xbe, 0x0000 }, + { 0xbf, 0x0000 }, + { 0xc0, 0x0100 }, + { 0xc1, 0x0000 }, + { 0xc2, 0x0000 }, + { 0xc8, 0x0000 }, + { 0xc9, 0x0000 }, + { 0xca, 0x0000 }, + { 0xcb, 0x0000 }, + { 0xcc, 0x0000 }, + { 0xcd, 0x0000 }, + { 0xce, 0x0000 }, + { 0xcf, 0x0013 }, + { 0xd0, 0x0680 }, + { 0xd1, 0x1c17 }, + { 0xd3, 0xb320 }, + { 0xd4, 0x0000 }, + { 0xd6, 0x0000 }, + { 0xd7, 0x0000 }, + { 0xd9, 0x0809 }, + { 0xda, 0x0000 }, + { 0xfa, 0x0010 }, + { 0xfb, 0x0000 }, + { 0xfc, 0x0000 }, + { 0xfe, 0x10ec }, + { 0xff, 0x6281 }, +}; + +struct rt5616_priv { + struct snd_soc_codec *codec; + struct delayed_work patch_work; + struct regmap *regmap; + + int sysclk; + int sysclk_src; + int lrck[RT5616_AIFS]; + int bclk[RT5616_AIFS]; + int master[RT5616_AIFS]; + + int pll_src; + int pll_in; + int pll_out; + +}; + +static bool rt5616_volatile_register(struct device *dev, unsigned int reg) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(rt5616_ranges); i++) { + if (reg >= rt5616_ranges[i].range_min && + reg <= rt5616_ranges[i].range_max) { + return true; + } + } + + switch (reg) { + case RT5616_RESET: + case RT5616_PRIV_DATA: + case RT5616_EQ_CTRL1: + case RT5616_DRC_AGC_1: + case RT5616_IRQ_CTRL2: + case RT5616_INT_IRQ_ST: + case RT5616_PGM_REG_ARR1: + case RT5616_PGM_REG_ARR3: + case RT5616_VENDOR_ID: + case RT5616_DEVICE_ID: + return true; + default: + return false; + } +} + +static bool rt5616_readable_register(struct device *dev, unsigned int reg) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(rt5616_ranges); i++) { + if (reg >= rt5616_ranges[i].range_min && + reg <= rt5616_ranges[i].range_max) { + return true; + } + } + + switch (reg) { + case RT5616_RESET: + case RT5616_VERSION_ID: + case RT5616_VENDOR_ID: + case RT5616_DEVICE_ID: + case RT5616_HP_VOL: + case RT5616_LOUT_CTRL1: + case RT5616_LOUT_CTRL2: + case RT5616_IN1_IN2: + case RT5616_INL1_INR1_VOL: + case RT5616_DAC1_DIG_VOL: + case RT5616_ADC_DIG_VOL: + case RT5616_ADC_BST_VOL: + case RT5616_STO1_ADC_MIXER: + case RT5616_AD_DA_MIXER: + case RT5616_STO_DAC_MIXER: + case RT5616_REC_L1_MIXER: + case RT5616_REC_L2_MIXER: + case RT5616_REC_R1_MIXER: + case RT5616_REC_R2_MIXER: + case RT5616_HPO_MIXER: + case RT5616_OUT_L1_MIXER: + case RT5616_OUT_L2_MIXER: + case RT5616_OUT_L3_MIXER: + case RT5616_OUT_R1_MIXER: + case RT5616_OUT_R2_MIXER: + case RT5616_OUT_R3_MIXER: + case RT5616_LOUT_MIXER: + case RT5616_PWR_DIG1: + case RT5616_PWR_DIG2: + case RT5616_PWR_ANLG1: + case RT5616_PWR_ANLG2: + case RT5616_PWR_MIXER: + case RT5616_PWR_VOL: + case RT5616_PRIV_INDEX: + case RT5616_PRIV_DATA: + case RT5616_I2S1_SDP: + case RT5616_ADDA_CLK1: + case RT5616_ADDA_CLK2: + case RT5616_GLB_CLK: + case RT5616_PLL_CTRL1: + case RT5616_PLL_CTRL2: + case RT5616_HP_OVCD: + case RT5616_DEPOP_M1: + case RT5616_DEPOP_M2: + case RT5616_DEPOP_M3: + case RT5616_CHARGE_PUMP: + case RT5616_PV_DET_SPK_G: + case RT5616_MICBIAS: + case RT5616_A_JD_CTL1: + case RT5616_A_JD_CTL2: + case RT5616_EQ_CTRL1: + case RT5616_EQ_CTRL2: + case RT5616_WIND_FILTER: + case RT5616_DRC_AGC_1: + case RT5616_DRC_AGC_2: + case RT5616_DRC_AGC_3: + case RT5616_SVOL_ZC: + case RT5616_JD_CTRL1: + case RT5616_JD_CTRL2: + case RT5616_IRQ_CTRL1: + case RT5616_IRQ_CTRL2: + case RT5616_INT_IRQ_ST: + case RT5616_GPIO_CTRL1: + case RT5616_GPIO_CTRL2: + case RT5616_GPIO_CTRL3: + case RT5616_PGM_REG_ARR1: + case RT5616_PGM_REG_ARR2: + case RT5616_PGM_REG_ARR3: + case RT5616_PGM_REG_ARR4: + case RT5616_PGM_REG_ARR5: + case RT5616_SCB_FUNC: + case RT5616_SCB_CTRL: + case RT5616_BASE_BACK: + case RT5616_MP3_PLUS1: + case RT5616_MP3_PLUS2: + case RT5616_ADJ_HPF_CTRL1: + case RT5616_ADJ_HPF_CTRL2: + case RT5616_HP_CALIB_AMP_DET: + case RT5616_HP_CALIB2: + case RT5616_SV_ZCD1: + case RT5616_SV_ZCD2: + case RT5616_D_MISC: + case RT5616_DUMMY2: + case RT5616_DUMMY3: + return true; + default: + return false; + } +} + +static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0); +static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0); +static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0); +static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0); +static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0); + +/* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */ +static unsigned int bst_tlv[] = { + TLV_DB_RANGE_HEAD(7), + 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0), + 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0), + 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0), + 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0), + 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0), + 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0), + 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0), +}; + +static const struct snd_kcontrol_new rt5616_snd_controls[] = { + /* Headphone Output Volume */ + SOC_DOUBLE("HP Playback Switch", RT5616_HP_VOL, + RT5616_L_MUTE_SFT, RT5616_R_MUTE_SFT, 1, 1), + SOC_DOUBLE_TLV("HP Playback Volume", RT5616_HP_VOL, + RT5616_L_VOL_SFT, RT5616_R_VOL_SFT, 39, 1, out_vol_tlv), + /* OUTPUT Control */ + SOC_DOUBLE("OUT Playback Switch", RT5616_LOUT_CTRL1, + RT5616_L_MUTE_SFT, RT5616_R_MUTE_SFT, 1, 1), + SOC_DOUBLE("OUT Channel Switch", RT5616_LOUT_CTRL1, + RT5616_VOL_L_SFT, RT5616_VOL_R_SFT, 1, 1), + SOC_DOUBLE_TLV("OUT Playback Volume", RT5616_LOUT_CTRL1, + RT5616_L_VOL_SFT, RT5616_R_VOL_SFT, 39, 1, out_vol_tlv), + + /* DAC Digital Volume */ + SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5616_DAC1_DIG_VOL, + RT5616_L_VOL_SFT, RT5616_R_VOL_SFT, + 175, 0, dac_vol_tlv), + /* IN1/IN2 Control */ + SOC_SINGLE_TLV("IN1 Boost", RT5616_IN1_IN2, + RT5616_BST_SFT1, 8, 0, bst_tlv), + SOC_SINGLE_TLV("IN2 Boost", RT5616_IN1_IN2, + RT5616_BST_SFT2, 8, 0, bst_tlv), + /* INL/INR Volume Control */ + SOC_DOUBLE_TLV("IN Capture Volume", RT5616_INL1_INR1_VOL, + RT5616_INL_VOL_SFT, RT5616_INR_VOL_SFT, + 31, 1, in_vol_tlv), + /* ADC Digital Volume Control */ + SOC_DOUBLE("ADC Capture Switch", RT5616_ADC_DIG_VOL, + RT5616_L_MUTE_SFT, RT5616_R_MUTE_SFT, 1, 1), + SOC_DOUBLE_TLV("ADC Capture Volume", RT5616_ADC_DIG_VOL, + RT5616_L_VOL_SFT, RT5616_R_VOL_SFT, + 127, 0, adc_vol_tlv), + + /* ADC Boost Volume Control */ + SOC_DOUBLE_TLV("ADC Boost Gain", RT5616_ADC_BST_VOL, + RT5616_ADC_L_BST_SFT, RT5616_ADC_R_BST_SFT, + 3, 0, adc_bst_tlv), +}; + +static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source, + struct snd_soc_dapm_widget *sink) +{ + unsigned int val; + + val = snd_soc_read(snd_soc_dapm_to_codec(source->dapm), RT5616_GLB_CLK); + val &= RT5616_SCLK_SRC_MASK; + if (val == RT5616_SCLK_SRC_PLL1) + return 1; + else + return 0; +} + +/* Digital Mixer */ +static const struct snd_kcontrol_new rt5616_sto1_adc_l_mix[] = { + SOC_DAPM_SINGLE("ADC1 Switch", RT5616_STO1_ADC_MIXER, + RT5616_M_STO1_ADC_L1_SFT, 1, 1), +}; + +static const struct snd_kcontrol_new rt5616_sto1_adc_r_mix[] = { + SOC_DAPM_SINGLE("ADC1 Switch", RT5616_STO1_ADC_MIXER, + RT5616_M_STO1_ADC_R1_SFT, 1, 1), +}; + +static const struct snd_kcontrol_new rt5616_dac_l_mix[] = { + SOC_DAPM_SINGLE("Stereo ADC Switch", RT5616_AD_DA_MIXER, + RT5616_M_ADCMIX_L_SFT, 1, 1), + SOC_DAPM_SINGLE("INF1 Switch", RT5616_AD_DA_MIXER, + RT5616_M_IF1_DAC_L_SFT, 1, 1), +}; + +static const struct snd_kcontrol_new rt5616_dac_r_mix[] = { + SOC_DAPM_SINGLE("Stereo ADC Switch", RT5616_AD_DA_MIXER, + RT5616_M_ADCMIX_R_SFT, 1, 1), + SOC_DAPM_SINGLE("INF1 Switch", RT5616_AD_DA_MIXER, + RT5616_M_IF1_DAC_R_SFT, 1, 1), +}; + +static const struct snd_kcontrol_new rt5616_sto_dac_l_mix[] = { + SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_STO_DAC_MIXER, + RT5616_M_DAC_L1_MIXL_SFT, 1, 1), + SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_STO_DAC_MIXER, + RT5616_M_DAC_R1_MIXL_SFT, 1, 1), +}; + +static const struct snd_kcontrol_new rt5616_sto_dac_r_mix[] = { + SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_STO_DAC_MIXER, + RT5616_M_DAC_R1_MIXR_SFT, 1, 1), + SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_STO_DAC_MIXER, + RT5616_M_DAC_L1_MIXR_SFT, 1, 1), +}; + +/* Analog Input Mixer */ +static const struct snd_kcontrol_new rt5616_rec_l_mix[] = { + SOC_DAPM_SINGLE("INL1 Switch", RT5616_REC_L2_MIXER, + RT5616_M_IN1_L_RM_L_SFT, 1, 1), + SOC_DAPM_SINGLE("BST2 Switch", RT5616_REC_L2_MIXER, + RT5616_M_BST2_RM_L_SFT, 1, 1), + SOC_DAPM_SINGLE("BST1 Switch", RT5616_REC_L2_MIXER, + RT5616_M_BST1_RM_L_SFT, 1, 1), +}; + +static const struct snd_kcontrol_new rt5616_rec_r_mix[] = { + SOC_DAPM_SINGLE("INR1 Switch", RT5616_REC_R2_MIXER, + RT5616_M_IN1_R_RM_R_SFT, 1, 1), + SOC_DAPM_SINGLE("BST2 Switch", RT5616_REC_R2_MIXER, + RT5616_M_BST2_RM_R_SFT, 1, 1), + SOC_DAPM_SINGLE("BST1 Switch", RT5616_REC_R2_MIXER, + RT5616_M_BST1_RM_R_SFT, 1, 1), +}; + +/* Analog Output Mixer */ + +static const struct snd_kcontrol_new rt5616_out_l_mix[] = { + SOC_DAPM_SINGLE("BST1 Switch", RT5616_OUT_L3_MIXER, + RT5616_M_BST1_OM_L_SFT, 1, 1), + SOC_DAPM_SINGLE("BST2 Switch", RT5616_OUT_L3_MIXER, + RT5616_M_BST2_OM_L_SFT, 1, 1), + SOC_DAPM_SINGLE("INL1 Switch", RT5616_OUT_L3_MIXER, + RT5616_M_IN1_L_OM_L_SFT, 1, 1), + SOC_DAPM_SINGLE("REC MIXL Switch", RT5616_OUT_L3_MIXER, + RT5616_M_RM_L_OM_L_SFT, 1, 1), + SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_OUT_L3_MIXER, + RT5616_M_DAC_L1_OM_L_SFT, 1, 1), +}; + +static const struct snd_kcontrol_new rt5616_out_r_mix[] = { + SOC_DAPM_SINGLE("BST2 Switch", RT5616_OUT_R3_MIXER, + RT5616_M_BST2_OM_R_SFT, 1, 1), + SOC_DAPM_SINGLE("BST1 Switch", RT5616_OUT_R3_MIXER, + RT5616_M_BST1_OM_R_SFT, 1, 1), + SOC_DAPM_SINGLE("INR1 Switch", RT5616_OUT_R3_MIXER, + RT5616_M_IN1_R_OM_R_SFT, 1, 1), + SOC_DAPM_SINGLE("REC MIXR Switch", RT5616_OUT_R3_MIXER, + RT5616_M_RM_R_OM_R_SFT, 1, 1), + SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_OUT_R3_MIXER, + RT5616_M_DAC_R1_OM_R_SFT, 1, 1), +}; + +static const struct snd_kcontrol_new rt5616_hpo_mix[] = { + SOC_DAPM_SINGLE("DAC1 Switch", RT5616_HPO_MIXER, + RT5616_M_DAC1_HM_SFT, 1, 1), + SOC_DAPM_SINGLE("HPVOL Switch", RT5616_HPO_MIXER, + RT5616_M_HPVOL_HM_SFT, 1, 1), +}; + +static const struct snd_kcontrol_new rt5616_lout_mix[] = { + SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_LOUT_MIXER, + RT5616_M_DAC_L1_LM_SFT, 1, 1), + SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_LOUT_MIXER, + RT5616_M_DAC_R1_LM_SFT, 1, 1), + SOC_DAPM_SINGLE("OUTVOL L Switch", RT5616_LOUT_MIXER, + RT5616_M_OV_L_LM_SFT, 1, 1), + SOC_DAPM_SINGLE("OUTVOL R Switch", RT5616_LOUT_MIXER, + RT5616_M_OV_R_LM_SFT, 1, 1), +}; + +static int rt5616_adc_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + snd_soc_update_bits(codec, RT5616_ADC_DIG_VOL, + RT5616_L_MUTE | RT5616_R_MUTE, 0); + break; + + case SND_SOC_DAPM_POST_PMD: + snd_soc_update_bits(codec, RT5616_ADC_DIG_VOL, + RT5616_L_MUTE | RT5616_R_MUTE, + RT5616_L_MUTE | RT5616_R_MUTE); + break; + + default: + return 0; + } + + return 0; +} + +static int rt5616_charge_pump_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + /* depop parameters */ + snd_soc_update_bits(codec, RT5616_DEPOP_M2, + RT5616_DEPOP_MASK, RT5616_DEPOP_MAN); + snd_soc_update_bits(codec, RT5616_DEPOP_M1, + RT5616_HP_CP_MASK | RT5616_HP_SG_MASK | + RT5616_HP_CB_MASK, RT5616_HP_CP_PU | + RT5616_HP_SG_DIS | RT5616_HP_CB_PU); + snd_soc_write(codec, RT5616_PR_BASE + + RT5616_HP_DCC_INT1, 0x9f00); + /* headphone amp power on */ + snd_soc_update_bits(codec, RT5616_PWR_ANLG1, + RT5616_PWR_FV1 | RT5616_PWR_FV2, 0); + snd_soc_update_bits(codec, RT5616_PWR_VOL, + RT5616_PWR_HV_L | RT5616_PWR_HV_R, + RT5616_PWR_HV_L | RT5616_PWR_HV_R); + snd_soc_update_bits(codec, RT5616_PWR_ANLG1, + RT5616_PWR_HP_L | RT5616_PWR_HP_R | + RT5616_PWR_HA, RT5616_PWR_HP_L | + RT5616_PWR_HP_R | RT5616_PWR_HA); + msleep(50); + snd_soc_update_bits(codec, RT5616_PWR_ANLG1, + RT5616_PWR_FV1 | RT5616_PWR_FV2, + RT5616_PWR_FV1 | RT5616_PWR_FV2); + + snd_soc_update_bits(codec, RT5616_CHARGE_PUMP, + RT5616_PM_HP_MASK, RT5616_PM_HP_HV); + snd_soc_update_bits(codec, RT5616_PR_BASE + + RT5616_CHOP_DAC_ADC, 0x0200, 0x0200); + snd_soc_update_bits(codec, RT5616_DEPOP_M1, + RT5616_HP_CO_MASK | RT5616_HP_SG_MASK, + RT5616_HP_CO_EN | RT5616_HP_SG_EN); + break; + case SND_SOC_DAPM_PRE_PMD: + snd_soc_update_bits(codec, RT5616_PR_BASE + + RT5616_CHOP_DAC_ADC, 0x0200, 0x0); + snd_soc_update_bits(codec, RT5616_DEPOP_M1, + RT5616_HP_SG_MASK | RT5616_HP_L_SMT_MASK | + RT5616_HP_R_SMT_MASK, RT5616_HP_SG_DIS | + RT5616_HP_L_SMT_DIS | RT5616_HP_R_SMT_DIS); + /* headphone amp power down */ + snd_soc_update_bits(codec, RT5616_DEPOP_M1, + RT5616_SMT_TRIG_MASK | RT5616_HP_CD_PD_MASK | + RT5616_HP_CO_MASK | RT5616_HP_CP_MASK | + RT5616_HP_SG_MASK | RT5616_HP_CB_MASK, + RT5616_SMT_TRIG_DIS | RT5616_HP_CD_PD_EN | + RT5616_HP_CO_DIS | RT5616_HP_CP_PD | + RT5616_HP_SG_EN | RT5616_HP_CB_PD); + snd_soc_update_bits(codec, RT5616_PWR_ANLG1, + RT5616_PWR_HP_L | RT5616_PWR_HP_R | + RT5616_PWR_HA, 0); + break; + default: + return 0; + } + + return 0; +} + +static int rt5616_hp_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + /* headphone unmute sequence */ + snd_soc_update_bits(codec, RT5616_DEPOP_M3, + RT5616_CP_FQ1_MASK | RT5616_CP_FQ2_MASK | + RT5616_CP_FQ3_MASK, + (RT5616_CP_FQ_192_KHZ << RT5616_CP_FQ1_SFT) | + (RT5616_CP_FQ_12_KHZ << RT5616_CP_FQ2_SFT) | + (RT5616_CP_FQ_192_KHZ << RT5616_CP_FQ3_SFT)); + snd_soc_write(codec, RT5616_PR_BASE + + RT5616_MAMP_INT_REG2, 0xfc00); + snd_soc_update_bits(codec, RT5616_DEPOP_M1, + RT5616_SMT_TRIG_MASK, RT5616_SMT_TRIG_EN); + snd_soc_update_bits(codec, RT5616_DEPOP_M1, + RT5616_RSTN_MASK, RT5616_RSTN_EN); + snd_soc_update_bits(codec, RT5616_DEPOP_M1, + RT5616_RSTN_MASK | RT5616_HP_L_SMT_MASK | + RT5616_HP_R_SMT_MASK, RT5616_RSTN_DIS | + RT5616_HP_L_SMT_EN | RT5616_HP_R_SMT_EN); + snd_soc_update_bits(codec, RT5616_HP_VOL, + RT5616_L_MUTE | RT5616_R_MUTE, 0); + msleep(100); + snd_soc_update_bits(codec, RT5616_DEPOP_M1, + RT5616_HP_SG_MASK | RT5616_HP_L_SMT_MASK | + RT5616_HP_R_SMT_MASK, RT5616_HP_SG_DIS | + RT5616_HP_L_SMT_DIS | RT5616_HP_R_SMT_DIS); + msleep(20); + snd_soc_update_bits(codec, RT5616_HP_CALIB_AMP_DET, + RT5616_HPD_PS_MASK, RT5616_HPD_PS_EN); + break; + + case SND_SOC_DAPM_PRE_PMD: + /* headphone mute sequence */ + snd_soc_update_bits(codec, RT5616_DEPOP_M3, + RT5616_CP_FQ1_MASK | RT5616_CP_FQ2_MASK | + RT5616_CP_FQ3_MASK, + (RT5616_CP_FQ_96_KHZ << RT5616_CP_FQ1_SFT) | + (RT5616_CP_FQ_12_KHZ << RT5616_CP_FQ2_SFT) | + (RT5616_CP_FQ_96_KHZ << RT5616_CP_FQ3_SFT)); + snd_soc_write(codec, RT5616_PR_BASE + + RT5616_MAMP_INT_REG2, 0xfc00); + snd_soc_update_bits(codec, RT5616_DEPOP_M1, + RT5616_HP_SG_MASK, RT5616_HP_SG_EN); + snd_soc_update_bits(codec, RT5616_DEPOP_M1, + RT5616_RSTP_MASK, RT5616_RSTP_EN); + snd_soc_update_bits(codec, RT5616_DEPOP_M1, + RT5616_RSTP_MASK | RT5616_HP_L_SMT_MASK | + RT5616_HP_R_SMT_MASK, RT5616_RSTP_DIS | + RT5616_HP_L_SMT_EN | RT5616_HP_R_SMT_EN); + snd_soc_update_bits(codec, RT5616_HP_CALIB_AMP_DET, + RT5616_HPD_PS_MASK, RT5616_HPD_PS_DIS); + msleep(90); + snd_soc_update_bits(codec, RT5616_HP_VOL, + RT5616_L_MUTE | RT5616_R_MUTE, + RT5616_L_MUTE | RT5616_R_MUTE); + msleep(30); + break; + + default: + return 0; + } + + return 0; +} + +static int rt5616_lout_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + snd_soc_update_bits(codec, RT5616_PWR_ANLG1, + RT5616_PWR_LM, RT5616_PWR_LM); + snd_soc_update_bits(codec, RT5616_LOUT_CTRL1, + RT5616_L_MUTE | RT5616_R_MUTE, 0); + break; + + case SND_SOC_DAPM_PRE_PMD: + snd_soc_update_bits(codec, RT5616_LOUT_CTRL1, + RT5616_L_MUTE | RT5616_R_MUTE, + RT5616_L_MUTE | RT5616_R_MUTE); + snd_soc_update_bits(codec, RT5616_PWR_ANLG1, + RT5616_PWR_LM, 0); + break; + + default: + return 0; + } + + return 0; +} + +static int rt5616_bst1_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + snd_soc_update_bits(codec, RT5616_PWR_ANLG2, + RT5616_PWR_BST1_OP2, RT5616_PWR_BST1_OP2); + break; + + case SND_SOC_DAPM_PRE_PMD: + snd_soc_update_bits(codec, RT5616_PWR_ANLG2, + RT5616_PWR_BST1_OP2, 0); + break; + + default: + return 0; + } + + return 0; +} + +static int rt5616_bst2_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + snd_soc_update_bits(codec, RT5616_PWR_ANLG2, + RT5616_PWR_BST2_OP2, RT5616_PWR_BST2_OP2); + break; + + case SND_SOC_DAPM_PRE_PMD: + snd_soc_update_bits(codec, RT5616_PWR_ANLG2, + RT5616_PWR_BST2_OP2, 0); + break; + + default: + return 0; + } + + return 0; +} + +static const struct snd_soc_dapm_widget rt5616_dapm_widgets[] = { + SND_SOC_DAPM_SUPPLY("PLL1", RT5616_PWR_ANLG2, + RT5616_PWR_PLL_BIT, 0, NULL, 0), + /* Input Side */ + /* micbias */ + SND_SOC_DAPM_SUPPLY("LDO", RT5616_PWR_ANLG1, + RT5616_PWR_LDO_BIT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("micbias1", RT5616_PWR_ANLG2, + RT5616_PWR_MB1_BIT, 0, NULL, 0), + + /* Input Lines */ + SND_SOC_DAPM_INPUT("MIC1"), + SND_SOC_DAPM_INPUT("MIC2"), + + SND_SOC_DAPM_INPUT("IN1P"), + SND_SOC_DAPM_INPUT("IN2P"), + SND_SOC_DAPM_INPUT("IN2N"), + + /* Boost */ + SND_SOC_DAPM_PGA_E("BST1", RT5616_PWR_ANLG2, + RT5616_PWR_BST1_BIT, 0, NULL, 0, rt5616_bst1_event, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PGA_E("BST2", RT5616_PWR_ANLG2, + RT5616_PWR_BST2_BIT, 0, NULL, 0, rt5616_bst2_event, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + /* Input Volume */ + SND_SOC_DAPM_PGA("INL1 VOL", RT5616_PWR_VOL, + RT5616_PWR_IN1_L_BIT, 0, NULL, 0), + SND_SOC_DAPM_PGA("INR1 VOL", RT5616_PWR_VOL, + RT5616_PWR_IN1_R_BIT, 0, NULL, 0), + SND_SOC_DAPM_PGA("INL2 VOL", RT5616_PWR_VOL, + RT5616_PWR_IN2_L_BIT, 0, NULL, 0), + SND_SOC_DAPM_PGA("INR2 VOL", RT5616_PWR_VOL, + RT5616_PWR_IN2_R_BIT, 0, NULL, 0), + + /* REC Mixer */ + SND_SOC_DAPM_MIXER("RECMIXL", RT5616_PWR_MIXER, RT5616_PWR_RM_L_BIT, 0, + rt5616_rec_l_mix, ARRAY_SIZE(rt5616_rec_l_mix)), + SND_SOC_DAPM_MIXER("RECMIXR", RT5616_PWR_MIXER, RT5616_PWR_RM_R_BIT, 0, + rt5616_rec_r_mix, ARRAY_SIZE(rt5616_rec_r_mix)), + /* ADCs */ + SND_SOC_DAPM_ADC_E("ADC L", NULL, RT5616_PWR_DIG1, + RT5616_PWR_ADC_L_BIT, 0, rt5616_adc_event, + SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_ADC_E("ADC R", NULL, RT5616_PWR_DIG1, + RT5616_PWR_ADC_R_BIT, 0, rt5616_adc_event, + SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU), + + /* ADC Mixer */ + SND_SOC_DAPM_SUPPLY("stereo1 filter", RT5616_PWR_DIG2, + RT5616_PWR_ADC_STO1_F_BIT, 0, NULL, 0), + SND_SOC_DAPM_MIXER("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, + rt5616_sto1_adc_l_mix, ARRAY_SIZE(rt5616_sto1_adc_l_mix)), + SND_SOC_DAPM_MIXER("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, + rt5616_sto1_adc_r_mix, ARRAY_SIZE(rt5616_sto1_adc_r_mix)), + + /* Digital Interface */ + SND_SOC_DAPM_SUPPLY("I2S1", RT5616_PWR_DIG1, + RT5616_PWR_I2S1_BIT, 0, NULL, 0), + SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("IF1 ADC1", SND_SOC_NOPM, 0, 0, NULL, 0), + + /* Digital Interface Select */ + + /* Audio Interface */ + SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0), + + /* Audio DSP */ + SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0), + + /* Output Side */ + /* DAC mixer before sound effect */ + SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0, + rt5616_dac_l_mix, ARRAY_SIZE(rt5616_dac_l_mix)), + SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0, + rt5616_dac_r_mix, ARRAY_SIZE(rt5616_dac_r_mix)), + + SND_SOC_DAPM_SUPPLY("Stero1 DAC Power", RT5616_PWR_DIG2, + RT5616_PWR_DAC_STO1_F_BIT, 0, NULL, 0), + + /* DAC Mixer */ + SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0, + rt5616_sto_dac_l_mix, ARRAY_SIZE(rt5616_sto_dac_l_mix)), + SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0, + rt5616_sto_dac_r_mix, ARRAY_SIZE(rt5616_sto_dac_r_mix)), + + /* DACs */ + SND_SOC_DAPM_DAC("DAC L1", NULL, RT5616_PWR_DIG1, + RT5616_PWR_DAC_L1_BIT, 0), + SND_SOC_DAPM_DAC("DAC R1", NULL, RT5616_PWR_DIG1, + RT5616_PWR_DAC_R1_BIT, 0), + /* OUT Mixer */ + SND_SOC_DAPM_MIXER("OUT MIXL", RT5616_PWR_MIXER, RT5616_PWR_OM_L_BIT, + 0, rt5616_out_l_mix, ARRAY_SIZE(rt5616_out_l_mix)), + SND_SOC_DAPM_MIXER("OUT MIXR", RT5616_PWR_MIXER, RT5616_PWR_OM_R_BIT, + 0, rt5616_out_r_mix, ARRAY_SIZE(rt5616_out_r_mix)), + /* Output Volume */ + SND_SOC_DAPM_PGA("OUTVOL L", RT5616_PWR_VOL, + RT5616_PWR_OV_L_BIT, 0, NULL, 0), + SND_SOC_DAPM_PGA("OUTVOL R", RT5616_PWR_VOL, + RT5616_PWR_OV_R_BIT, 0, NULL, 0), + SND_SOC_DAPM_PGA("HPOVOL L", RT5616_PWR_VOL, + RT5616_PWR_HV_L_BIT, 0, NULL, 0), + SND_SOC_DAPM_PGA("HPOVOL R", RT5616_PWR_VOL, + RT5616_PWR_HV_R_BIT, 0, NULL, 0), + SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, + 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, + 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, + 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("INL1", RT5616_PWR_VOL, + RT5616_PWR_IN1_L_BIT, 0, NULL, 0), + SND_SOC_DAPM_PGA("INR1", RT5616_PWR_VOL, + RT5616_PWR_IN1_R_BIT, 0, NULL, 0), + SND_SOC_DAPM_PGA("INL2", RT5616_PWR_VOL, + RT5616_PWR_IN2_L_BIT, 0, NULL, 0), + SND_SOC_DAPM_PGA("INR2", RT5616_PWR_VOL, + RT5616_PWR_IN2_R_BIT, 0, NULL, 0), + /* HPO/LOUT/Mono Mixer */ + SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0, + rt5616_hpo_mix, ARRAY_SIZE(rt5616_hpo_mix)), + SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0, + rt5616_lout_mix, ARRAY_SIZE(rt5616_lout_mix)), + + SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM, 0, 0, + rt5616_hp_event, SND_SOC_DAPM_PRE_PMD | + SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0, + rt5616_lout_event, SND_SOC_DAPM_PRE_PMD | + SND_SOC_DAPM_POST_PMU), + + SND_SOC_DAPM_SUPPLY_S("Charge Pump", 1, SND_SOC_NOPM, 0, 0, + rt5616_charge_pump_event, SND_SOC_DAPM_POST_PMU | + SND_SOC_DAPM_PRE_PMD), + + /* Output Lines */ + SND_SOC_DAPM_OUTPUT("HPOL"), + SND_SOC_DAPM_OUTPUT("HPOR"), + SND_SOC_DAPM_OUTPUT("LOUTL"), + SND_SOC_DAPM_OUTPUT("LOUTR"), +}; + +static const struct snd_soc_dapm_route rt5616_dapm_routes[] = { + {"IN1P", NULL, "LDO"}, + {"IN2P", NULL, "LDO"}, + + {"IN1P", NULL, "MIC1"}, + {"IN2P", NULL, "MIC2"}, + {"IN2N", NULL, "MIC2"}, + + {"BST1", NULL, "IN1P"}, + {"BST2", NULL, "IN2P"}, + {"BST2", NULL, "IN2N"}, + {"BST1", NULL, "micbias1"}, + {"BST2", NULL, "micbias1"}, + + {"INL1 VOL", NULL, "IN2P"}, + {"INR1 VOL", NULL, "IN2N"}, + + {"RECMIXL", "INL1 Switch", "INL1 VOL"}, + {"RECMIXL", "BST2 Switch", "BST2"}, + {"RECMIXL", "BST1 Switch", "BST1"}, + + {"RECMIXR", "INR1 Switch", "INR1 VOL"}, + {"RECMIXR", "BST2 Switch", "BST2"}, + {"RECMIXR", "BST1 Switch", "BST1"}, + + {"ADC L", NULL, "RECMIXL"}, + {"ADC R", NULL, "RECMIXR"}, + + {"Stereo1 ADC MIXL", "ADC1 Switch", "ADC L"}, + {"Stereo1 ADC MIXL", NULL, "stereo1 filter"}, + {"stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll}, + + {"Stereo1 ADC MIXR", "ADC1 Switch", "ADC R"}, + {"Stereo1 ADC MIXR", NULL, "stereo1 filter"}, + {"stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll}, + + {"IF1 ADC1", NULL, "Stereo1 ADC MIXL"}, + {"IF1 ADC1", NULL, "Stereo1 ADC MIXR"}, + {"IF1 ADC1", NULL, "I2S1"}, + + {"AIF1TX", NULL, "IF1 ADC1"}, + + {"IF1 DAC", NULL, "AIF1RX"}, + {"IF1 DAC", NULL, "I2S1"}, + + {"IF1 DAC1 L", NULL, "IF1 DAC"}, + {"IF1 DAC1 R", NULL, "IF1 DAC"}, + + {"DAC MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL"}, + {"DAC MIXL", "INF1 Switch", "IF1 DAC1 L"}, + {"DAC MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR"}, + {"DAC MIXR", "INF1 Switch", "IF1 DAC1 R"}, + + {"Audio DSP", NULL, "DAC MIXL"}, + {"Audio DSP", NULL, "DAC MIXR"}, + + {"Stereo DAC MIXL", "DAC L1 Switch", "Audio DSP"}, + {"Stereo DAC MIXL", "DAC R1 Switch", "DAC MIXR"}, + {"Stereo DAC MIXL", NULL, "Stero1 DAC Power"}, + {"Stereo DAC MIXR", "DAC R1 Switch", "Audio DSP"}, + {"Stereo DAC MIXR", "DAC L1 Switch", "DAC MIXL"}, + {"Stereo DAC MIXR", NULL, "Stero1 DAC Power"}, + + {"DAC L1", NULL, "Stereo DAC MIXL"}, + {"DAC L1", NULL, "PLL1", is_sys_clk_from_pll}, + {"DAC R1", NULL, "Stereo DAC MIXR"}, + {"DAC R1", NULL, "PLL1", is_sys_clk_from_pll}, + + {"OUT MIXL", "BST1 Switch", "BST1"}, + {"OUT MIXL", "BST2 Switch", "BST2"}, + {"OUT MIXL", "INL1 Switch", "INL1 VOL"}, + {"OUT MIXL", "REC MIXL Switch", "RECMIXL"}, + {"OUT MIXL", "DAC L1 Switch", "DAC L1"}, + + {"OUT MIXR", "BST2 Switch", "BST2"}, + {"OUT MIXR", "BST1 Switch", "BST1"}, + {"OUT MIXR", "INR1 Switch", "INR1 VOL"}, + {"OUT MIXR", "REC MIXR Switch", "RECMIXR"}, + {"OUT MIXR", "DAC R1 Switch", "DAC R1"}, + + {"HPOVOL L", NULL, "OUT MIXL"}, + {"HPOVOL R", NULL, "OUT MIXR"}, + {"OUTVOL L", NULL, "OUT MIXL"}, + {"OUTVOL R", NULL, "OUT MIXR"}, + + {"DAC 1", NULL, "DAC L1"}, + {"DAC 1", NULL, "DAC R1"}, + {"HPOVOL", NULL, "HPOVOL L"}, + {"HPOVOL", NULL, "HPOVOL R"}, + {"HPO MIX", "DAC1 Switch", "DAC 1"}, + {"HPO MIX", "HPVOL Switch", "HPOVOL"}, + + {"LOUT MIX", "DAC L1 Switch", "DAC L1"}, + {"LOUT MIX", "DAC R1 Switch", "DAC R1"}, + {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"}, + {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"}, + + {"HP amp", NULL, "HPO MIX"}, + {"HP amp", NULL, "Charge Pump"}, + {"HPOL", NULL, "HP amp"}, + {"HPOR", NULL, "HP amp"}, + + {"LOUT amp", NULL, "LOUT MIX"}, + {"LOUT amp", NULL, "Charge Pump"}, + {"LOUTL", NULL, "LOUT amp"}, + {"LOUTR", NULL, "LOUT amp"}, + +}; + +static int rt5616_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_codec *codec = rtd->codec; + struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec); + unsigned int val_len = 0, val_clk, mask_clk; + int pre_div, bclk_ms, frame_size; + + rt5616->lrck[dai->id] = params_rate(params); + + pre_div = rl6231_get_clk_info(rt5616->sysclk, rt5616->lrck[dai->id]); + + if (pre_div < 0) { + dev_err(codec->dev, "Unsupported clock setting\n"); + return -EINVAL; + } + frame_size = snd_soc_params_to_frame_size(params); + if (frame_size < 0) { + dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size); + return -EINVAL; + } + bclk_ms = frame_size > 32 ? 1 : 0; + rt5616->bclk[dai->id] = rt5616->lrck[dai->id] * (32 << bclk_ms); + + dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n", + rt5616->bclk[dai->id], rt5616->lrck[dai->id]); + dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n", + bclk_ms, pre_div, dai->id); + + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_S16_LE: + break; + case SNDRV_PCM_FORMAT_S20_3LE: + val_len |= RT5616_I2S_DL_20; + break; + case SNDRV_PCM_FORMAT_S24_LE: + val_len |= RT5616_I2S_DL_24; + break; + case SNDRV_PCM_FORMAT_S8: + val_len |= RT5616_I2S_DL_8; + break; + default: + return -EINVAL; + } + + mask_clk = RT5616_I2S_PD1_MASK; + val_clk = pre_div << RT5616_I2S_PD1_SFT; + snd_soc_update_bits(codec, RT5616_I2S1_SDP, + RT5616_I2S_DL_MASK, val_len); + snd_soc_update_bits(codec, RT5616_ADDA_CLK1, mask_clk, val_clk); + + + return 0; +} + +static int rt5616_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) +{ + struct snd_soc_codec *codec = dai->codec; + struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec); + unsigned int reg_val = 0; + + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBM_CFM: + rt5616->master[dai->id] = 1; + break; + case SND_SOC_DAIFMT_CBS_CFS: + reg_val |= RT5616_I2S_MS_S; + rt5616->master[dai->id] = 0; + break; + default: + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + break; + case SND_SOC_DAIFMT_IB_NF: + reg_val |= RT5616_I2S_BP_INV; + break; + default: + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + break; + case SND_SOC_DAIFMT_LEFT_J: + reg_val |= RT5616_I2S_DF_LEFT; + break; + case SND_SOC_DAIFMT_DSP_A: + reg_val |= RT5616_I2S_DF_PCM_A; + break; + case SND_SOC_DAIFMT_DSP_B: + reg_val |= RT5616_I2S_DF_PCM_B; + break; + default: + return -EINVAL; + } + + snd_soc_update_bits(codec, RT5616_I2S1_SDP, + RT5616_I2S_MS_MASK | RT5616_I2S_BP_MASK | + RT5616_I2S_DF_MASK, reg_val); + + + return 0; +} + +static int rt5616_set_dai_sysclk(struct snd_soc_dai *dai, + int clk_id, unsigned int freq, int dir) +{ + struct snd_soc_codec *codec = dai->codec; + struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec); + unsigned int reg_val = 0; + + if (freq == rt5616->sysclk && clk_id == rt5616->sysclk_src) + return 0; + + switch (clk_id) { + case RT5616_SCLK_S_MCLK: + reg_val |= RT5616_SCLK_SRC_MCLK; + break; + case RT5616_SCLK_S_PLL1: + reg_val |= RT5616_SCLK_SRC_PLL1; + break; + default: + dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id); + return -EINVAL; + } + snd_soc_update_bits(codec, RT5616_GLB_CLK, + RT5616_SCLK_SRC_MASK, reg_val); + rt5616->sysclk = freq; + rt5616->sysclk_src = clk_id; + + dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id); + + return 0; +} + +static int rt5616_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source, + unsigned int freq_in, unsigned int freq_out) +{ + struct snd_soc_codec *codec = dai->codec; + struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec); + struct rl6231_pll_code pll_code; + int ret; + + if (source == rt5616->pll_src && freq_in == rt5616->pll_in && + freq_out == rt5616->pll_out) + return 0; + + if (!freq_in || !freq_out) { + dev_dbg(codec->dev, "PLL disabled\n"); + + rt5616->pll_in = 0; + rt5616->pll_out = 0; + snd_soc_update_bits(codec, RT5616_GLB_CLK, + RT5616_SCLK_SRC_MASK, RT5616_SCLK_SRC_MCLK); + return 0; + } + + switch (source) { + case RT5616_PLL1_S_MCLK: + snd_soc_update_bits(codec, RT5616_GLB_CLK, + RT5616_PLL1_SRC_MASK, RT5616_PLL1_SRC_MCLK); + break; + case RT5616_PLL1_S_BCLK1: + case RT5616_PLL1_S_BCLK2: + snd_soc_update_bits(codec, RT5616_GLB_CLK, + RT5616_PLL1_SRC_MASK, RT5616_PLL1_SRC_BCLK1); + break; + default: + dev_err(codec->dev, "Unknown PLL source %d\n", source); + return -EINVAL; + } + + ret = rl6231_pll_calc(freq_in, freq_out, &pll_code); + if (ret < 0) { + dev_err(codec->dev, "Unsupport input clock %d\n", freq_in); + return ret; + } + + dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n", + pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code), + pll_code.n_code, pll_code.k_code); + + snd_soc_write(codec, RT5616_PLL_CTRL1, + pll_code.n_code << RT5616_PLL_N_SFT | pll_code.k_code); + snd_soc_write(codec, RT5616_PLL_CTRL2, + (pll_code.m_bp ? 0 : pll_code.m_code) << RT5616_PLL_M_SFT | + pll_code.m_bp << RT5616_PLL_M_BP_SFT); + + rt5616->pll_in = freq_in; + rt5616->pll_out = freq_out; + rt5616->pll_src = source; + + return 0; +} + +static int rt5616_set_bias_level(struct snd_soc_codec *codec, + enum snd_soc_bias_level level) +{ + switch (level) { + case SND_SOC_BIAS_STANDBY: + if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) { + snd_soc_update_bits(codec, RT5616_PWR_ANLG1, + RT5616_PWR_VREF1 | RT5616_PWR_MB | + RT5616_PWR_BG | RT5616_PWR_VREF2, + RT5616_PWR_VREF1 | RT5616_PWR_MB | + RT5616_PWR_BG | RT5616_PWR_VREF2); + mdelay(10); + snd_soc_update_bits(codec, RT5616_PWR_ANLG1, + RT5616_PWR_FV1 | RT5616_PWR_FV2, + RT5616_PWR_FV1 | RT5616_PWR_FV2); + snd_soc_update_bits(codec, RT5616_D_MISC, + RT5616_D_GATE_EN, RT5616_D_GATE_EN); + } + break; + + case SND_SOC_BIAS_OFF: + snd_soc_update_bits(codec, RT5616_D_MISC, RT5616_D_GATE_EN, 0); + snd_soc_write(codec, RT5616_PWR_DIG1, 0x0000); + snd_soc_write(codec, RT5616_PWR_DIG2, 0x0000); + snd_soc_write(codec, RT5616_PWR_VOL, 0x0000); + snd_soc_write(codec, RT5616_PWR_MIXER, 0x0000); + snd_soc_write(codec, RT5616_PWR_ANLG1, 0x0000); + snd_soc_write(codec, RT5616_PWR_ANLG2, 0x0000); + break; + + default: + break; + } + + return 0; +} + +static int rt5616_probe(struct snd_soc_codec *codec) +{ + struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec); + + rt5616->codec = codec; + + return 0; +} + +#ifdef CONFIG_PM +static int rt5616_suspend(struct snd_soc_codec *codec) +{ + struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec); + + regcache_cache_only(rt5616->regmap, true); + regcache_mark_dirty(rt5616->regmap); + + return 0; +} + +static int rt5616_resume(struct snd_soc_codec *codec) +{ + struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec); + + regcache_cache_only(rt5616->regmap, false); + regcache_sync(rt5616->regmap); + return 0; +} +#else +#define rt5616_suspend NULL +#define rt5616_resume NULL +#endif + +#define RT5616_STEREO_RATES SNDRV_PCM_RATE_8000_96000 +#define RT5616_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ + SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8) + + +struct snd_soc_dai_ops rt5616_aif_dai_ops = { + .hw_params = rt5616_hw_params, + .set_fmt = rt5616_set_dai_fmt, + .set_sysclk = rt5616_set_dai_sysclk, + .set_pll = rt5616_set_dai_pll, +}; + +struct snd_soc_dai_driver rt5616_dai[] = { + { + .name = "rt5616-aif1", + .id = RT5616_AIF1, + .playback = { + .stream_name = "AIF1 Playback", + .channels_min = 1, + .channels_max = 2, + .rates = RT5616_STEREO_RATES, + .formats = RT5616_FORMATS, + }, + .capture = { + .stream_name = "AIF1 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = RT5616_STEREO_RATES, + .formats = RT5616_FORMATS, + }, + .ops = &rt5616_aif_dai_ops, + }, +}; + +static struct snd_soc_codec_driver soc_codec_dev_rt5616 = { + .probe = rt5616_probe, + .suspend = rt5616_suspend, + .resume = rt5616_resume, + .set_bias_level = rt5616_set_bias_level, + .idle_bias_off = true, + .controls = rt5616_snd_controls, + .num_controls = ARRAY_SIZE(rt5616_snd_controls), + .dapm_widgets = rt5616_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(rt5616_dapm_widgets), + .dapm_routes = rt5616_dapm_routes, + .num_dapm_routes = ARRAY_SIZE(rt5616_dapm_routes), +}; + +static const struct regmap_config rt5616_regmap = { + .reg_bits = 8, + .val_bits = 16, + .use_single_rw = true, + .max_register = RT5616_DEVICE_ID + 1 + (ARRAY_SIZE(rt5616_ranges) * + RT5616_PR_SPACING), + .volatile_reg = rt5616_volatile_register, + .readable_reg = rt5616_readable_register, + .cache_type = REGCACHE_RBTREE, + .reg_defaults = rt5616_reg, + .num_reg_defaults = ARRAY_SIZE(rt5616_reg), + .ranges = rt5616_ranges, + .num_ranges = ARRAY_SIZE(rt5616_ranges), +}; + +static const struct i2c_device_id rt5616_i2c_id[] = { + { "rt5616", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, rt5616_i2c_id); + +static int rt5616_i2c_probe(struct i2c_client *i2c, + const struct i2c_device_id *id) +{ + struct rt5616_priv *rt5616; + unsigned int val; + int ret; + + rt5616 = devm_kzalloc(&i2c->dev, sizeof(struct rt5616_priv), + GFP_KERNEL); + if (rt5616 == NULL) + return -ENOMEM; + + i2c_set_clientdata(i2c, rt5616); + + rt5616->regmap = devm_regmap_init_i2c(i2c, &rt5616_regmap); + if (IS_ERR(rt5616->regmap)) { + ret = PTR_ERR(rt5616->regmap); + dev_err(&i2c->dev, "Failed to allocate register map: %d\n", + ret); + return ret; + } + + regmap_read(rt5616->regmap, RT5616_DEVICE_ID, &val); + if (val != 0x6281) { + dev_err(&i2c->dev, + "Device with ID register %#x is not rt5616\n", + val); + ret = -ENODEV; + } + regmap_write(rt5616->regmap, RT5616_RESET, 0); + regmap_update_bits(rt5616->regmap, RT5616_PWR_ANLG1, + RT5616_PWR_VREF1 | RT5616_PWR_MB | + RT5616_PWR_BG | RT5616_PWR_VREF2, + RT5616_PWR_VREF1 | RT5616_PWR_MB | + RT5616_PWR_BG | RT5616_PWR_VREF2); + mdelay(10); + regmap_update_bits(rt5616->regmap, RT5616_PWR_ANLG1, + RT5616_PWR_FV1 | RT5616_PWR_FV2, + RT5616_PWR_FV1 | RT5616_PWR_FV2); + + ret = regmap_register_patch(rt5616->regmap, init_list, + ARRAY_SIZE(init_list)); + if (ret != 0) + dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret); + + regmap_update_bits(rt5616->regmap, RT5616_PWR_ANLG1, + RT5616_PWR_LDO_DVO_MASK, RT5616_PWR_LDO_DVO_1_2V); + + return snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5616, + rt5616_dai, ARRAY_SIZE(rt5616_dai)); + +} + +static int rt5616_i2c_remove(struct i2c_client *i2c) +{ + snd_soc_unregister_codec(&i2c->dev); + + return 0; +} + +static void rt5616_i2c_shutdown(struct i2c_client *client) +{ + struct rt5616_priv *rt5616 = i2c_get_clientdata(client); + + regmap_write(rt5616->regmap, RT5616_HP_VOL, 0xc8c8); + regmap_write(rt5616->regmap, RT5616_LOUT_CTRL1, 0xc8c8); + +} + +static struct i2c_driver rt5616_i2c_driver = { + .driver = { + .name = "rt5616", + }, + .probe = rt5616_i2c_probe, + .remove = rt5616_i2c_remove, + .shutdown = rt5616_i2c_shutdown, + .id_table = rt5616_i2c_id, +}; +module_i2c_driver(rt5616_i2c_driver); + +MODULE_DESCRIPTION("ASoC RT5616 driver"); +MODULE_AUTHOR("Bard Liao <bardliao(a)realtek.com>"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/codecs/rt5616.h b/sound/soc/codecs/rt5616.h new file mode 100644 index 0000000..f88cddd --- /dev/null +++ b/sound/soc/codecs/rt5616.h @@ -0,0 +1,1819 @@ +/* + * rt5616.h -- RT5616 ALSA SoC audio driver + * + * Copyright 2011 Realtek Microelectronics + * Author: Johnny Hsu <johnnyhsu(a)realtek.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __RT5616_H__ +#define __RT5616_H__ + +/* Info */ +#define RT5616_RESET 0x00 +#define RT5616_VERSION_ID 0xfd +#define RT5616_VENDOR_ID 0xfe +#define RT5616_DEVICE_ID 0xff +/* I/O - Output */ +#define RT5616_HP_VOL 0x02 +#define RT5616_LOUT_CTRL1 0x03 +#define RT5616_LOUT_CTRL2 0x05 +/* I/O - Input */ +#define RT5616_IN1_IN2 0x0d +#define RT5616_INL1_INR1_VOL 0x0f +/* I/O - ADC/DAC/DMIC */ +#define RT5616_DAC1_DIG_VOL 0x19 +#define RT5616_ADC_DIG_VOL 0x1c +#define RT5616_ADC_BST_VOL 0x1e +/* Mixer - D-D */ +#define RT5616_STO1_ADC_MIXER 0x27 +#define RT5616_AD_DA_MIXER 0x29 +#define RT5616_STO_DAC_MIXER 0x2a + +/* Mixer - ADC */ +#define RT5616_REC_L1_MIXER 0x3b +#define RT5616_REC_L2_MIXER 0x3c +#define RT5616_REC_R1_MIXER 0x3d +#define RT5616_REC_R2_MIXER 0x3e +/* Mixer - DAC */ +#define RT5616_HPO_MIXER 0x45 +#define RT5616_OUT_L1_MIXER 0x4d +#define RT5616_OUT_L2_MIXER 0x4e +#define RT5616_OUT_L3_MIXER 0x4f +#define RT5616_OUT_R1_MIXER 0x50 +#define RT5616_OUT_R2_MIXER 0x51 +#define RT5616_OUT_R3_MIXER 0x52 +#define RT5616_LOUT_MIXER 0x53 +/* Power */ +#define RT5616_PWR_DIG1 0x61 +#define RT5616_PWR_DIG2 0x62 +#define RT5616_PWR_ANLG1 0x63 +#define RT5616_PWR_ANLG2 0x64 +#define RT5616_PWR_MIXER 0x65 +#define RT5616_PWR_VOL 0x66 +/* Private Register Control */ +#define RT5616_PRIV_INDEX 0x6a +#define RT5616_PRIV_DATA 0x6c +/* Format - ADC/DAC */ +#define RT5616_I2S1_SDP 0x70 +#define RT5616_ADDA_CLK1 0x73 +#define RT5616_ADDA_CLK2 0x74 + +/* Function - Analog */ +#define RT5616_GLB_CLK 0x80 +#define RT5616_PLL_CTRL1 0x81 +#define RT5616_PLL_CTRL2 0x82 +#define RT5616_HP_OVCD 0x8b +#define RT5616_DEPOP_M1 0x8e +#define RT5616_DEPOP_M2 0x8f +#define RT5616_DEPOP_M3 0x90 +#define RT5616_CHARGE_PUMP 0x91 +#define RT5616_PV_DET_SPK_G 0x92 +#define RT5616_MICBIAS 0x93 +#define RT5616_A_JD_CTL1 0x94 +#define RT5616_A_JD_CTL2 0x95 +/* Function - Digital */ +#define RT5616_EQ_CTRL1 0xb0 +#define RT5616_EQ_CTRL2 0xb1 +#define RT5616_WIND_FILTER 0xb2 +#define RT5616_DRC_AGC_1 0xb4 +#define RT5616_DRC_AGC_2 0xb5 +#define RT5616_DRC_AGC_3 0xb6 +#define RT5616_SVOL_ZC 0xb7 +#define RT5616_JD_CTRL1 0xbb +#define RT5616_JD_CTRL2 0xbc +#define RT5616_IRQ_CTRL1 0xbd +#define RT5616_IRQ_CTRL2 0xbe +#define RT5616_INT_IRQ_ST 0xbf +#define RT5616_GPIO_CTRL1 0xc0 +#define RT5616_GPIO_CTRL2 0xc1 +#define RT5616_GPIO_CTRL3 0xc2 +#define RT5616_PGM_REG_ARR1 0xc8 +#define RT5616_PGM_REG_ARR2 0xc9 +#define RT5616_PGM_REG_ARR3 0xca +#define RT5616_PGM_REG_ARR4 0xcb +#define RT5616_PGM_REG_ARR5 0xcc +#define RT5616_SCB_FUNC 0xcd +#define RT5616_SCB_CTRL 0xce +#define RT5616_BASE_BACK 0xcf +#define RT5616_MP3_PLUS1 0xd0 +#define RT5616_MP3_PLUS2 0xd1 +#define RT5616_ADJ_HPF_CTRL1 0xd3 +#define RT5616_ADJ_HPF_CTRL2 0xd4 +#define RT5616_HP_CALIB_AMP_DET 0xd6 +#define RT5616_HP_CALIB2 0xd7 +#define RT5616_SV_ZCD1 0xd9 +#define RT5616_SV_ZCD2 0xda +#define RT5616_D_MISC 0xfa +/* Dummy Register */ +#define RT5616_DUMMY2 0xfb +#define RT5616_DUMMY3 0xfc + + +/* Index of Codec Private Register definition */ +#define RT5616_BIAS_CUR1 0x12 +#define RT5616_BIAS_CUR3 0x14 +#define RT5616_CLSD_INT_REG1 0x1c +#define RT5616_MAMP_INT_REG2 0x37 +#define RT5616_CHOP_DAC_ADC 0x3d +#define RT5616_3D_SPK 0x63 +#define RT5616_WND_1 0x6c +#define RT5616_WND_2 0x6d +#define RT5616_WND_3 0x6e +#define RT5616_WND_4 0x6f +#define RT5616_WND_5 0x70 +#define RT5616_WND_8 0x73 +#define RT5616_DIP_SPK_INF 0x75 +#define RT5616_HP_DCC_INT1 0x77 +#define RT5616_EQ_BW_LOP 0xa0 +#define RT5616_EQ_GN_LOP 0xa1 +#define RT5616_EQ_FC_BP1 0xa2 +#define RT5616_EQ_BW_BP1 0xa3 +#define RT5616_EQ_GN_BP1 0xa4 +#define RT5616_EQ_FC_BP2 0xa5 +#define RT5616_EQ_BW_BP2 0xa6 +#define RT5616_EQ_GN_BP2 0xa7 +#define RT5616_EQ_FC_BP3 0xa8 +#define RT5616_EQ_BW_BP3 0xa9 +#define RT5616_EQ_GN_BP3 0xaa +#define RT5616_EQ_FC_BP4 0xab +#define RT5616_EQ_BW_BP4 0xac +#define RT5616_EQ_GN_BP4 0xad +#define RT5616_EQ_FC_HIP1 0xae +#define RT5616_EQ_GN_HIP1 0xaf +#define RT5616_EQ_FC_HIP2 0xb0 +#define RT5616_EQ_BW_HIP2 0xb1 +#define RT5616_EQ_GN_HIP2 0xb2 +#define RT5616_EQ_PRE_VOL 0xb3 +#define RT5616_EQ_PST_VOL 0xb4 + + +/* global definition */ +#define RT5616_L_MUTE (0x1 << 15) +#define RT5616_L_MUTE_SFT 15 +#define RT5616_VOL_L_MUTE (0x1 << 14) +#define RT5616_VOL_L_SFT 14 +#define RT5616_R_MUTE (0x1 << 7) +#define RT5616_R_MUTE_SFT 7 +#define RT5616_VOL_R_MUTE (0x1 << 6) +#define RT5616_VOL_R_SFT 6 +#define RT5616_L_VOL_MASK (0x3f << 8) +#define RT5616_L_VOL_SFT 8 +#define RT5616_R_VOL_MASK (0x3f) +#define RT5616_R_VOL_SFT 0 + +/* LOUT Control 2(0x05) */ +#define RT5616_EN_DFO (0x1 << 15) + +/* IN1 and IN2 Control (0x0d) */ +/* IN3 and IN4 Control (0x0e) */ +#define RT5616_BST_MASK1 (0xf<<12) +#define RT5616_BST_SFT1 12 +#define RT5616_BST_MASK2 (0xf<<8) +#define RT5616_BST_SFT2 8 +#define RT5616_IN_DF1 (0x1 << 7) +#define RT5616_IN_SFT1 7 +#define RT5616_IN_DF2 (0x1 << 6) +#define RT5616_IN_SFT2 6 + +/* INL1 and INR1 Volume Control (0x0f) */ +#define RT5616_INL_VOL_MASK (0x1f << 8) +#define RT5616_INL_VOL_SFT 8 +#define RT5616_INR_SEL_MASK (0x1 << 7) +#define RT5616_INR_SEL_SFT 7 +#define RT5616_INR_SEL_IN4N (0x0 << 7) +#define RT5616_INR_SEL_MONON (0x1 << 7) +#define RT5616_INR_VOL_MASK (0x1f) +#define RT5616_INR_VOL_SFT 0 + +/* DAC1 Digital Volume (0x19) */ +#define RT5616_DAC_L1_VOL_MASK (0xff << 8) +#define RT5616_DAC_L1_VOL_SFT 8 +#define RT5616_DAC_R1_VOL_MASK (0xff) +#define RT5616_DAC_R1_VOL_SFT 0 + +/* DAC2 Digital Volume (0x1a) */ +#define RT5616_DAC_L2_VOL_MASK (0xff << 8) +#define RT5616_DAC_L2_VOL_SFT 8 +#define RT5616_DAC_R2_VOL_MASK (0xff) +#define RT5616_DAC_R2_VOL_SFT 0 + +/* ADC Digital Volume Control (0x1c) */ +#define RT5616_ADC_L_VOL_MASK (0x7f << 8) +#define RT5616_ADC_L_VOL_SFT 8 +#define RT5616_ADC_R_VOL_MASK (0x7f) +#define RT5616_ADC_R_VOL_SFT 0 + +/* Mono ADC Digital Volume Control (0x1d) */ +#define RT5616_M_MONO_ADC_L (0x1 << 15) +#define RT5616_M_MONO_ADC_L_SFT 15 +#define RT5616_MONO_ADC_L_VOL_MASK (0x7f << 8) +#define RT5616_MONO_ADC_L_VOL_SFT 8 +#define RT5616_M_MONO_ADC_R (0x1 << 7) +#define RT5616_M_MONO_ADC_R_SFT 7 +#define RT5616_MONO_ADC_R_VOL_MASK (0x7f) +#define RT5616_MONO_ADC_R_VOL_SFT 0 + +/* ADC Boost Volume Control (0x1e) */ +#define RT5616_ADC_L_BST_MASK (0x3 << 14) +#define RT5616_ADC_L_BST_SFT 14 +#define RT5616_ADC_R_BST_MASK (0x3 << 12) +#define RT5616_ADC_R_BST_SFT 12 +#define RT5616_ADC_COMP_MASK (0x3 << 10) +#define RT5616_ADC_COMP_SFT 10 + +/* Stereo ADC1 Mixer Control (0x27) */ +#define RT5616_M_STO1_ADC_L1 (0x1 << 14) +#define RT5616_M_STO1_ADC_L1_SFT 14 +#define RT5616_M_STO1_ADC_R1 (0x1 << 6) +#define RT5616_M_STO1_ADC_R1_SFT 6 + +/* ADC Mixer to DAC Mixer Control (0x29) */ +#define RT5616_M_ADCMIX_L (0x1 << 15) +#define RT5616_M_ADCMIX_L_SFT 15 +#define RT5616_M_IF1_DAC_L (0x1 << 14) +#define RT5616_M_IF1_DAC_L_SFT 14 +#define RT5616_M_ADCMIX_R (0x1 << 7) +#define RT5616_M_ADCMIX_R_SFT 7 +#define RT5616_M_IF1_DAC_R (0x1 << 6) +#define RT5616_M_IF1_DAC_R_SFT 6 + +/* Stereo DAC Mixer Control (0x2a) */ +#define RT5616_M_DAC_L1_MIXL (0x1 << 14) +#define RT5616_M_DAC_L1_MIXL_SFT 14 +#define RT5616_DAC_L1_STO_L_VOL_MASK (0x1 << 13) +#define RT5616_DAC_L1_STO_L_VOL_SFT 13 +#define RT5616_M_DAC_R1_MIXL (0x1 << 9) +#define RT5616_M_DAC_R1_MIXL_SFT 9 +#define RT5616_DAC_R1_STO_L_VOL_MASK (0x1 << 8) +#define RT5616_DAC_R1_STO_L_VOL_SFT 8 +#define RT5616_M_DAC_R1_MIXR (0x1 << 6) +#define RT5616_M_DAC_R1_MIXR_SFT 6 +#define RT5616_DAC_R1_STO_R_VOL_MASK (0x1 << 5) +#define RT5616_DAC_R1_STO_R_VOL_SFT 5 +#define RT5616_M_DAC_L1_MIXR (0x1 << 1) +#define RT5616_M_DAC_L1_MIXR_SFT 1 +#define RT5616_DAC_L1_STO_R_VOL_MASK (0x1) +#define RT5616_DAC_L1_STO_R_VOL_SFT 0 + +/* DD Mixer Control (0x2b) */ +#define RT5616_M_STO_DD_L1 (0x1 << 14) +#define RT5616_M_STO_DD_L1_SFT 14 +#define RT5616_STO_DD_L1_VOL_MASK (0x1 << 13) +#define RT5616_DAC_DD_L1_VOL_SFT 13 +#define RT5616_M_STO_DD_L2 (0x1 << 12) +#define RT5616_M_STO_DD_L2_SFT 12 +#define RT5616_STO_DD_L2_VOL_MASK (0x1 << 11) +#define RT5616_STO_DD_L2_VOL_SFT 11 +#define RT5616_M_STO_DD_R2_L (0x1 << 10) +#define RT5616_M_STO_DD_R2_L_SFT 10 +#define RT5616_STO_DD_R2_L_VOL_MASK (0x1 << 9) +#define RT5616_STO_DD_R2_L_VOL_SFT 9 +#define RT5616_M_STO_DD_R1 (0x1 << 6) +#define RT5616_M_STO_DD_R1_SFT 6 +#define RT5616_STO_DD_R1_VOL_MASK (0x1 << 5) +#define RT5616_STO_DD_R1_VOL_SFT 5 +#define RT5616_M_STO_DD_R2 (0x1 << 4) +#define RT5616_M_STO_DD_R2_SFT 4 +#define RT5616_STO_DD_R2_VOL_MASK (0x1 << 3) +#define RT5616_STO_DD_R2_VOL_SFT 3 +#define RT5616_M_STO_DD_L2_R (0x1 << 2) +#define RT5616_M_STO_DD_L2_R_SFT 2 +#define RT5616_STO_DD_L2_R_VOL_MASK (0x1 << 1) +#define RT5616_STO_DD_L2_R_VOL_SFT 1 + +/* Digital Mixer Control (0x2c) */ +#define RT5616_M_STO_L_DAC_L (0x1 << 15) +#define RT5616_M_STO_L_DAC_L_SFT 15 +#define RT5616_STO_L_DAC_L_VOL_MASK (0x1 << 14) +#define RT5616_STO_L_DAC_L_VOL_SFT 14 +#define RT5616_M_DAC_L2_DAC_L (0x1 << 13) +#define RT5616_M_DAC_L2_DAC_L_SFT 13 +#define RT5616_DAC_L2_DAC_L_VOL_MASK (0x1 << 12) +#define RT5616_DAC_L2_DAC_L_VOL_SFT 12 +#define RT5616_M_STO_R_DAC_R (0x1 << 11) +#define RT5616_M_STO_R_DAC_R_SFT 11 +#define RT5616_STO_R_DAC_R_VOL_MASK (0x1 << 10) +#define RT5616_STO_R_DAC_R_VOL_SFT 10 +#define RT5616_M_DAC_R2_DAC_R (0x1 << 9) +#define RT5616_M_DAC_R2_DAC_R_SFT 9 +#define RT5616_DAC_R2_DAC_R_VOL_MASK (0x1 << 8) +#define RT5616_DAC_R2_DAC_R_VOL_SFT 8 + +/* DSP Path Control 1 (0x2d) */ +#define RT5616_RXDP_SRC_MASK (0x1 << 15) +#define RT5616_RXDP_SRC_SFT 15 +#define RT5616_RXDP_SRC_NOR (0x0 << 15) +#define RT5616_RXDP_SRC_DIV3 (0x1 << 15) +#define RT5616_TXDP_SRC_MASK (0x1 << 14) +#define RT5616_TXDP_SRC_SFT 14 +#define RT5616_TXDP_SRC_NOR (0x0 << 14) +#define RT5616_TXDP_SRC_DIV3 (0x1 << 14) + +/* DSP Path Control 2 (0x2e) */ +#define RT5616_DAC_L2_SEL_MASK (0x3 << 14) +#define RT5616_DAC_L2_SEL_SFT 14 +#define RT5616_DAC_L2_SEL_IF2 (0x0 << 14) +#define RT5616_DAC_L2_SEL_IF3 (0x1 << 14) +#define RT5616_DAC_L2_SEL_TXDC (0x2 << 14) +#define RT5616_DAC_L2_SEL_BASS (0x3 << 14) +#define RT5616_DAC_R2_SEL_MASK (0x3 << 12) +#define RT5616_DAC_R2_SEL_SFT 12 +#define RT5616_DAC_R2_SEL_IF2 (0x0 << 12) +#define RT5616_DAC_R2_SEL_IF3 (0x1 << 12) +#define RT5616_DAC_R2_SEL_TXDC (0x2 << 12) +#define RT5616_IF2_ADC_L_SEL_MASK (0x1 << 11) +#define RT5616_IF2_ADC_L_SEL_SFT 11 +#define RT5616_IF2_ADC_L_SEL_TXDP (0x0 << 11) +#define RT5616_IF2_ADC_L_SEL_PASS (0x1 << 11) +#define RT5616_IF2_ADC_R_SEL_MASK (0x1 << 10) +#define RT5616_IF2_ADC_R_SEL_SFT 10 +#define RT5616_IF2_ADC_R_SEL_TXDP (0x0 << 10) +#define RT5616_IF2_ADC_R_SEL_PASS (0x1 << 10) +#define RT5616_RXDC_SEL_MASK (0x3 << 8) +#define RT5616_RXDC_SEL_SFT 8 +#define RT5616_RXDC_SEL_NOR (0x0 << 8) +#define RT5616_RXDC_SEL_L2R (0x1 << 8) +#define RT5616_RXDC_SEL_R2L (0x2 << 8) +#define RT5616_RXDC_SEL_SWAP (0x3 << 8) +#define RT5616_RXDP_SEL_MASK (0x3 << 6) +#define RT5616_RXDP_SEL_SFT 6 +#define RT5616_RXDP_SEL_NOR (0x0 << 6) +#define RT5616_RXDP_SEL_L2R (0x1 << 6) +#define RT5616_RXDP_SEL_R2L (0x2 << 6) +#define RT5616_RXDP_SEL_SWAP (0x3 << 6) +#define RT5616_TXDC_SEL_MASK (0x3 << 4) +#define RT5616_TXDC_SEL_SFT 4 +#define RT5616_TXDC_SEL_NOR (0x0 << 4) +#define RT5616_TXDC_SEL_L2R (0x1 << 4) +#define RT5616_TXDC_SEL_R2L (0x2 << 4) +#define RT5616_TXDC_SEL_SWAP (0x3 << 4) +#define RT5616_TXDP_SEL_MASK (0x3 << 2) +#define RT5616_TXDP_SEL_SFT 2 +#define RT5616_TXDP_SEL_NOR (0x0 << 2) +#define RT5616_TXDP_SEL_L2R (0x1 << 2) +#define RT5616_TXDP_SEL_R2L (0x2 << 2) +#define RT5616_TRXDP_SEL_SWAP (0x3 << 2) + +/* REC Left Mixer Control 1 (0x3b) */ +#define RT5616_G_LN_L2_RM_L_MASK (0x7 << 13) +#define RT5616_G_IN_L2_RM_L_SFT 13 +#define RT5616_G_LN_L1_RM_L_MASK (0x7 << 10) +#define RT5616_G_IN_L1_RM_L_SFT 10 +#define RT5616_G_BST3_RM_L_MASK (0x7 << 4) +#define RT5616_G_BST3_RM_L_SFT 4 +#define RT5616_G_BST2_RM_L_MASK (0x7 << 1) +#define RT5616_G_BST2_RM_L_SFT 1 + +/* REC Left Mixer Control 2 (0x3c) */ +#define RT5616_G_BST1_RM_L_MASK (0x7 << 13) +#define RT5616_G_BST1_RM_L_SFT 13 +#define RT5616_G_OM_L_RM_L_MASK (0x7 << 10) +#define RT5616_G_OM_L_RM_L_SFT 10 +#define RT5616_M_IN2_L_RM_L (0x1 << 6) +#define RT5616_M_IN2_L_RM_L_SFT 6 +#define RT5616_M_IN1_L_RM_L (0x1 << 5) +#define RT5616_M_IN1_L_RM_L_SFT 5 +#define RT5616_M_BST3_RM_L (0x1 << 3) +#define RT5616_M_BST3_RM_L_SFT 3 +#define RT5616_M_BST2_RM_L (0x1 << 2) +#define RT5616_M_BST2_RM_L_SFT 2 +#define RT5616_M_BST1_RM_L (0x1 << 1) +#define RT5616_M_BST1_RM_L_SFT 1 +#define RT5616_M_OM_L_RM_L (0x1) +#define RT5616_M_OM_L_RM_L_SFT 0 + +/* REC Right Mixer Control 1 (0x3d) */ +#define RT5616_G_IN2_R_RM_R_MASK (0x7 << 13) +#define RT5616_G_IN2_R_RM_R_SFT 13 +#define RT5616_G_IN1_R_RM_R_MASK (0x7 << 10) +#define RT5616_G_IN1_R_RM_R_SFT 10 +#define RT5616_G_BST3_RM_R_MASK (0x7 << 4) +#define RT5616_G_BST3_RM_R_SFT 4 +#define RT5616_G_BST2_RM_R_MASK (0x7 << 1) +#define RT5616_G_BST2_RM_R_SFT 1 + +/* REC Right Mixer Control 2 (0x3e) */ +#define RT5616_G_BST1_RM_R_MASK (0x7 << 13) +#define RT5616_G_BST1_RM_R_SFT 13 +#define RT5616_G_OM_R_RM_R_MASK (0x7 << 10) +#define RT5616_G_OM_R_RM_R_SFT 10 +#define RT5616_M_IN2_R_RM_R (0x1 << 6) +#define RT5616_M_IN2_R_RM_R_SFT 6 +#define RT5616_M_IN1_R_RM_R (0x1 << 5) +#define RT5616_M_IN1_R_RM_R_SFT 5 +#define RT5616_M_BST3_RM_R (0x1 << 3) +#define RT5616_M_BST3_RM_R_SFT 3 +#define RT5616_M_BST2_RM_R (0x1 << 2) +#define RT5616_M_BST2_RM_R_SFT 2 +#define RT5616_M_BST1_RM_R (0x1 << 1) +#define RT5616_M_BST1_RM_R_SFT 1 +#define RT5616_M_OM_R_RM_R (0x1) +#define RT5616_M_OM_R_RM_R_SFT 0 + +/* HPMIX Control (0x45) */ +#define RT5616_M_DAC1_HM (0x1 << 14) +#define RT5616_M_DAC1_HM_SFT 14 +#define RT5616_M_HPVOL_HM (0x1 << 13) +#define RT5616_M_HPVOL_HM_SFT 13 +#define RT5616_G_HPOMIX_MASK (0x1 << 12) +#define RT5616_G_HPOMIX_SFT 12 + +/* SPK Left Mixer Control (0x46) */ +#define RT5616_G_RM_L_SM_L_MASK (0x3 << 14) +#define RT5616_G_RM_L_SM_L_SFT 14 +#define RT5616_G_IN_L_SM_L_MASK (0x3 << 12) +#define RT5616_G_IN_L_SM_L_SFT 12 +#define RT5616_G_DAC_L1_SM_L_MASK (0x3 << 10) +#define RT5616_G_DAC_L1_SM_L_SFT 10 +#define RT5616_G_DAC_L2_SM_L_MASK (0x3 << 8) +#define RT5616_G_DAC_L2_SM_L_SFT 8 +#define RT5616_G_OM_L_SM_L_MASK (0x3 << 6) +#define RT5616_G_OM_L_SM_L_SFT 6 +#define RT5616_M_RM_L_SM_L (0x1 << 5) +#define RT5616_M_RM_L_SM_L_SFT 5 +#define RT5616_M_IN_L_SM_L (0x1 << 4) +#define RT5616_M_IN_L_SM_L_SFT 4 +#define RT5616_M_DAC_L1_SM_L (0x1 << 3) +#define RT5616_M_DAC_L1_SM_L_SFT 3 +#define RT5616_M_DAC_L2_SM_L (0x1 << 2) +#define RT5616_M_DAC_L2_SM_L_SFT 2 +#define RT5616_M_OM_L_SM_L (0x1 << 1) +#define RT5616_M_OM_L_SM_L_SFT 1 + +/* SPK Right Mixer Control (0x47) */ +#define RT5616_G_RM_R_SM_R_MASK (0x3 << 14) +#define RT5616_G_RM_R_SM_R_SFT 14 +#define RT5616_G_IN_R_SM_R_MASK (0x3 << 12) +#define RT5616_G_IN_R_SM_R_SFT 12 +#define RT5616_G_DAC_R1_SM_R_MASK (0x3 << 10) +#define RT5616_G_DAC_R1_SM_R_SFT 10 +#define RT5616_G_DAC_R2_SM_R_MASK (0x3 << 8) +#define RT5616_G_DAC_R2_SM_R_SFT 8 +#define RT5616_G_OM_R_SM_R_MASK (0x3 << 6) +#define RT5616_G_OM_R_SM_R_SFT 6 +#define RT5616_M_RM_R_SM_R (0x1 << 5) +#define RT5616_M_RM_R_SM_R_SFT 5 +#define RT5616_M_IN_R_SM_R (0x1 << 4) +#define RT5616_M_IN_R_SM_R_SFT 4 +#define RT5616_M_DAC_R1_SM_R (0x1 << 3) +#define RT5616_M_DAC_R1_SM_R_SFT 3 +#define RT5616_M_DAC_R2_SM_R (0x1 << 2) +#define RT5616_M_DAC_R2_SM_R_SFT 2 +#define RT5616_M_OM_R_SM_R (0x1 << 1) +#define RT5616_M_OM_R_SM_R_SFT 1 + +/* SPOLMIX Control (0x48) */ +#define RT5616_M_DAC_R1_SPM_L (0x1 << 15) +#define RT5616_M_DAC_R1_SPM_L_SFT 15 +#define RT5616_M_DAC_L1_SPM_L (0x1 << 14) +#define RT5616_M_DAC_L1_SPM_L_SFT 14 +#define RT5616_M_SV_R_SPM_L (0x1 << 13) +#define RT5616_M_SV_R_SPM_L_SFT 13 +#define RT5616_M_SV_L_SPM_L (0x1 << 12) +#define RT5616_M_SV_L_SPM_L_SFT 12 +#define RT5616_M_BST1_SPM_L (0x1 << 11) +#define RT5616_M_BST1_SPM_L_SFT 11 + +/* SPORMIX Control (0x49) */ +#define RT5616_M_DAC_R1_SPM_R (0x1 << 13) +#define RT5616_M_DAC_R1_SPM_R_SFT 13 +#define RT5616_M_SV_R_SPM_R (0x1 << 12) +#define RT5616_M_SV_R_SPM_R_SFT 12 +#define RT5616_M_BST1_SPM_R (0x1 << 11) +#define RT5616_M_BST1_SPM_R_SFT 11 + +/* SPOLMIX / SPORMIX Ratio Control (0x4a) */ +#define RT5616_SPO_CLSD_RATIO_MASK (0x7) +#define RT5616_SPO_CLSD_RATIO_SFT 0 + +/* Mono Output Mixer Control (0x4c) */ +#define RT5616_M_DAC_R2_MM (0x1 << 15) +#define RT5616_M_DAC_R2_MM_SFT 15 +#define RT5616_M_DAC_L2_MM (0x1 << 14) +#define RT5616_M_DAC_L2_MM_SFT 14 +#define RT5616_M_OV_R_MM (0x1 << 13) +#define RT5616_M_OV_R_MM_SFT 13 +#define RT5616_M_OV_L_MM (0x1 << 12) +#define RT5616_M_OV_L_MM_SFT 12 +#define RT5616_M_BST1_MM (0x1 << 11) +#define RT5616_M_BST1_MM_SFT 11 +#define RT5616_G_MONOMIX_MASK (0x1 << 10) +#define RT5616_G_MONOMIX_SFT 10 + +/* Output Left Mixer Control 1 (0x4d) */ +#define RT5616_G_BST2_OM_L_MASK (0x7 << 10) +#define RT5616_G_BST2_OM_L_SFT 10 +#define RT5616_G_BST1_OM_L_MASK (0x7 << 7) +#define RT5616_G_BST1_OM_L_SFT 7 +#define RT5616_G_IN1_L_OM_L_MASK (0x7 << 4) +#define RT5616_G_IN1_L_OM_L_SFT 4 +#define RT5616_G_RM_L_OM_L_MASK (0x7 << 1) +#define RT5616_G_RM_L_OM_L_SFT 1 + +/* Output Left Mixer Control 2 (0x4e) */ +#define RT5616_G_DAC_L1_OM_L_MASK (0x7 << 7) +#define RT5616_G_DAC_L1_OM_L_SFT 7 +#define RT5616_G_IN2_L_OM_L_MASK (0x7 << 4) +#define RT5616_G_IN2_L_OM_L_SFT 4 + +/* Output Left Mixer Control 3 (0x4f) */ +#define RT5616_M_IN2_L_OM_L (0x1 << 9) +#define RT5616_M_IN2_L_OM_L_SFT 9 +#define RT5616_M_BST2_OM_L (0x1 << 6) +#define RT5616_M_BST2_OM_L_SFT 6 +#define RT5616_M_BST1_OM_L (0x1 << 5) +#define RT5616_M_BST1_OM_L_SFT 5 +#define RT5616_M_IN1_L_OM_L (0x1 << 4) +#define RT5616_M_IN1_L_OM_L_SFT 4 +#define RT5616_M_RM_L_OM_L (0x1 << 3) +#define RT5616_M_RM_L_OM_L_SFT 3 +#define RT5616_M_DAC_L1_OM_L (0x1) +#define RT5616_M_DAC_L1_OM_L_SFT 0 + +/* Output Right Mixer Control 1 (0x50) */ +#define RT5616_G_BST2_OM_R_MASK (0x7 << 10) +#define RT5616_G_BST2_OM_R_SFT 10 +#define RT5616_G_BST1_OM_R_MASK (0x7 << 7) +#define RT5616_G_BST1_OM_R_SFT 7 +#define RT5616_G_IN1_R_OM_R_MASK (0x7 << 4) +#define RT5616_G_IN1_R_OM_R_SFT 4 +#define RT5616_G_RM_R_OM_R_MASK (0x7 << 1) +#define RT5616_G_RM_R_OM_R_SFT 1 + +/* Output Right Mixer Control 2 (0x51) */ +#define RT5616_G_DAC_R1_OM_R_MASK (0x7 << 7) +#define RT5616_G_DAC_R1_OM_R_SFT 7 +#define RT5616_G_IN2_R_OM_R_MASK (0x7 << 4) +#define RT5616_G_IN2_R_OM_R_SFT 4 + +/* Output Right Mixer Control 3 (0x52) */ +#define RT5616_M_IN2_R_OM_R (0x1 << 9) +#define RT5616_M_IN2_R_OM_R_SFT 9 +#define RT5616_M_BST2_OM_R (0x1 << 6) +#define RT5616_M_BST2_OM_R_SFT 6 +#define RT5616_M_BST1_OM_R (0x1 << 5) +#define RT5616_M_BST1_OM_R_SFT 5 +#define RT5616_M_IN1_R_OM_R (0x1 << 4) +#define RT5616_M_IN1_R_OM_R_SFT 4 +#define RT5616_M_RM_R_OM_R (0x1 << 3) +#define RT5616_M_RM_R_OM_R_SFT 3 +#define RT5616_M_DAC_R1_OM_R (0x1) +#define RT5616_M_DAC_R1_OM_R_SFT 0 + +/* LOUT Mixer Control (0x53) */ +#define RT5616_M_DAC_L1_LM (0x1 << 15) +#define RT5616_M_DAC_L1_LM_SFT 15 +#define RT5616_M_DAC_R1_LM (0x1 << 14) +#define RT5616_M_DAC_R1_LM_SFT 14 +#define RT5616_M_OV_L_LM (0x1 << 13) +#define RT5616_M_OV_L_LM_SFT 13 +#define RT5616_M_OV_R_LM (0x1 << 12) +#define RT5616_M_OV_R_LM_SFT 12 +#define RT5616_G_LOUTMIX_MASK (0x1 << 11) +#define RT5616_G_LOUTMIX_SFT 11 + +/* Power Management for Digital 1 (0x61) */ +#define RT5616_PWR_I2S1 (0x1 << 15) +#define RT5616_PWR_I2S1_BIT 15 +#define RT5616_PWR_I2S2 (0x1 << 14) +#define RT5616_PWR_I2S2_BIT 14 +#define RT5616_PWR_DAC_L1 (0x1 << 12) +#define RT5616_PWR_DAC_L1_BIT 12 +#define RT5616_PWR_DAC_R1 (0x1 << 11) +#define RT5616_PWR_DAC_R1_BIT 11 +#define RT5616_PWR_ADC_L (0x1 << 2) +#define RT5616_PWR_ADC_L_BIT 2 +#define RT5616_PWR_ADC_R (0x1 << 1) +#define RT5616_PWR_ADC_R_BIT 1 + +/* Power Management for Digital 2 (0x62) */ +#define RT5616_PWR_ADC_STO1_F (0x1 << 15) +#define RT5616_PWR_ADC_STO1_F_BIT 15 +#define RT5616_PWR_DAC_STO1_F (0x1 << 11) +#define RT5616_PWR_DAC_STO1_F_BIT 11 + +/* Power Management for Analog 1 (0x63) */ +#define RT5616_PWR_VREF1 (0x1 << 15) +#define RT5616_PWR_VREF1_BIT 15 +#define RT5616_PWR_FV1 (0x1 << 14) +#define RT5616_PWR_FV1_BIT 14 +#define RT5616_PWR_MB (0x1 << 13) +#define RT5616_PWR_MB_BIT 13 +#define RT5616_PWR_LM (0x1 << 12) +#define RT5616_PWR_LM_BIT 12 +#define RT5616_PWR_BG (0x1 << 11) +#define RT5616_PWR_BG_BIT 11 +#define RT5616_PWR_HP_L (0x1 << 7) +#define RT5616_PWR_HP_L_BIT 7 +#define RT5616_PWR_HP_R (0x1 << 6) +#define RT5616_PWR_HP_R_BIT 6 +#define RT5616_PWR_HA (0x1 << 5) +#define RT5616_PWR_HA_BIT 5 +#define RT5616_PWR_VREF2 (0x1 << 4) +#define RT5616_PWR_VREF2_BIT 4 +#define RT5616_PWR_FV2 (0x1 << 3) +#define RT5616_PWR_FV2_BIT 3 +#define RT5616_PWR_LDO (0x1 << 2) +#define RT5616_PWR_LDO_BIT 2 +#define RT5616_PWR_LDO_DVO_MASK (0x3) +#define RT5616_PWR_LDO_DVO_1_0V 0 +#define RT5616_PWR_LDO_DVO_1_1V 1 +#define RT5616_PWR_LDO_DVO_1_2V 2 +#define RT5616_PWR_LDO_DVO_1_3V 3 + +/* Power Management for Analog 2 (0x64) */ +#define RT5616_PWR_BST1 (0x1 << 15) +#define RT5616_PWR_BST1_BIT 15 +#define RT5616_PWR_BST2 (0x1 << 14) +#define RT5616_PWR_BST2_BIT 14 +#define RT5616_PWR_MB1 (0x1 << 11) +#define RT5616_PWR_MB1_BIT 11 +#define RT5616_PWR_PLL (0x1 << 9) +#define RT5616_PWR_PLL_BIT 9 +#define RT5616_PWR_BST1_OP2 (0x1 << 5) +#define RT5616_PWR_BST1_OP2_BIT 5 +#define RT5616_PWR_BST2_OP2 (0x1 << 4) +#define RT5616_PWR_BST2_OP2_BIT 4 +#define RT5616_PWR_BST3_OP2 (0x1 << 3) +#define RT5616_PWR_BST3_OP2_BIT 3 +#define RT5616_PWR_JD_M (0x1 << 2) +#define RT5616_PWM_JD_M_BIT 2 +#define RT5616_PWR_JD2 (0x1 << 1) +#define RT5616_PWM_JD2_BIT 1 +#define RT5616_PWR_JD3 (0x1) +#define RT5616_PWM_JD3_BIT 0 + +/* Power Management for Mixer (0x65) */ +#define RT5616_PWR_OM_L (0x1 << 15) +#define RT5616_PWR_OM_L_BIT 15 +#define RT5616_PWR_OM_R (0x1 << 14) +#define RT5616_PWR_OM_R_BIT 14 +#define RT5616_PWR_RM_L (0x1 << 11) +#define RT5616_PWR_RM_L_BIT 11 +#define RT5616_PWR_RM_R (0x1 << 10) +#define RT5616_PWR_RM_R_BIT 10 + +/* Power Management for Volume (0x66) */ +#define RT5616_PWR_OV_L (0x1 << 13) +#define RT5616_PWR_OV_L_BIT 13 +#define RT5616_PWR_OV_R (0x1 << 12) +#define RT5616_PWR_OV_R_BIT 12 +#define RT5616_PWR_HV_L (0x1 << 11) +#define RT5616_PWR_HV_L_BIT 11 +#define RT5616_PWR_HV_R (0x1 << 10) +#define RT5616_PWR_HV_R_BIT 10 +#define RT5616_PWR_IN1_L (0x1 << 9) +#define RT5616_PWR_IN1_L_BIT 9 +#define RT5616_PWR_IN1_R (0x1 << 8) +#define RT5616_PWR_IN1_R_BIT 8 +#define RT5616_PWR_IN2_L (0x1 << 7) +#define RT5616_PWR_IN2_L_BIT 7 +#define RT5616_PWR_IN2_R (0x1 << 6) +#define RT5616_PWR_IN2_R_BIT 6 + +/* I2S1/2/3 Audio Serial Data Port Control (0x70 0x71) */ +#define RT5616_I2S_MS_MASK (0x1 << 15) +#define RT5616_I2S_MS_SFT 15 +#define RT5616_I2S_MS_M (0x0 << 15) +#define RT5616_I2S_MS_S (0x1 << 15) +#define RT5616_I2S_O_CP_MASK (0x3 << 10) +#define RT5616_I2S_O_CP_SFT 10 +#define RT5616_I2S_O_CP_OFF (0x0 << 10) +#define RT5616_I2S_O_CP_U_LAW (0x1 << 10) +#define RT5616_I2S_O_CP_A_LAW (0x2 << 10) +#define RT5616_I2S_I_CP_MASK (0x3 << 8) +#define RT5616_I2S_I_CP_SFT 8 +#define RT5616_I2S_I_CP_OFF (0x0 << 8) +#define RT5616_I2S_I_CP_U_LAW (0x1 << 8) +#define RT5616_I2S_I_CP_A_LAW (0x2 << 8) +#define RT5616_I2S_BP_MASK (0x1 << 7) +#define RT5616_I2S_BP_SFT 7 +#define RT5616_I2S_BP_NOR (0x0 << 7) +#define RT5616_I2S_BP_INV (0x1 << 7) +#define RT5616_I2S_DL_MASK (0x3 << 2) +#define RT5616_I2S_DL_SFT 2 +#define RT5616_I2S_DL_16 (0x0 << 2) +#define RT5616_I2S_DL_20 (0x1 << 2) +#define RT5616_I2S_DL_24 (0x2 << 2) +#define RT5616_I2S_DL_8 (0x3 << 2) +#define RT5616_I2S_DF_MASK (0x3) +#define RT5616_I2S_DF_SFT 0 +#define RT5616_I2S_DF_I2S (0x0) +#define RT5616_I2S_DF_LEFT (0x1) +#define RT5616_I2S_DF_PCM_A (0x2) +#define RT5616_I2S_DF_PCM_B (0x3) + +/* ADC/DAC Clock Control 1 (0x73) */ +#define RT5616_I2S_PD1_MASK (0x7 << 12) +#define RT5616_I2S_PD1_SFT 12 +#define RT5616_I2S_PD1_1 (0x0 << 12) +#define RT5616_I2S_PD1_2 (0x1 << 12) +#define RT5616_I2S_PD1_3 (0x2 << 12) +#define RT5616_I2S_PD1_4 (0x3 << 12) +#define RT5616_I2S_PD1_6 (0x4 << 12) +#define RT5616_I2S_PD1_8 (0x5 << 12) +#define RT5616_I2S_PD1_12 (0x6 << 12) +#define RT5616_I2S_PD1_16 (0x7 << 12) +#define RT5616_I2S_BCLK_MS2_MASK (0x1 << 11) +#define RT5616_DAC_OSR_MASK (0x3 << 2) +#define RT5616_DAC_OSR_SFT 2 +#define RT5616_DAC_OSR_128 (0x0 << 2) +#define RT5616_DAC_OSR_64 (0x1 << 2) +#define RT5616_DAC_OSR_32 (0x2 << 2) +#define RT5616_DAC_OSR_128_3 (0x3 << 2) +#define RT5616_ADC_OSR_MASK (0x3) +#define RT5616_ADC_OSR_SFT 0 +#define RT5616_ADC_OSR_128 (0x0) +#define RT5616_ADC_OSR_64 (0x1) +#define RT5616_ADC_OSR_32 (0x2) +#define RT5616_ADC_OSR_128_3 (0x3) + +/* ADC/DAC Clock Control 2 (0x74) */ +#define RT5616_DAHPF_EN (0x1 << 11) +#define RT5616_DAHPF_EN_SFT 11 +#define RT5616_ADHPF_EN (0x1 << 10) +#define RT5616_ADHPF_EN_SFT 10 + +/* TDM Control 1 (0x77) */ +#define RT5616_TDM_INTEL_SEL_MASK (0x1 << 15) +#define RT5616_TDM_INTEL_SEL_SFT 15 +#define RT5616_TDM_INTEL_SEL_64 (0x0 << 15) +#define RT5616_TDM_INTEL_SEL_50 (0x1 << 15) +#define RT5616_TDM_MODE_SEL_MASK (0x1 << 14) +#define RT5616_TDM_MODE_SEL_SFT 14 +#define RT5616_TDM_MODE_SEL_NOR (0x0 << 14) +#define RT5616_TDM_MODE_SEL_TDM (0x1 << 14) +#define RT5616_TDM_CH_NUM_SEL_MASK (0x3 << 12) +#define RT5616_TDM_CH_NUM_SEL_SFT 12 +#define RT5616_TDM_CH_NUM_SEL_2 (0x0 << 12) +#define RT5616_TDM_CH_NUM_SEL_4 (0x1 << 12) +#define RT5616_TDM_CH_NUM_SEL_6 (0x2 << 12) +#define RT5616_TDM_CH_NUM_SEL_8 (0x3 << 12) +#define RT5616_TDM_CH_LEN_SEL_MASK (0x3 << 10) +#define RT5616_TDM_CH_LEN_SEL_SFT 10 +#define RT5616_TDM_CH_LEN_SEL_16 (0x0 << 10) +#define RT5616_TDM_CH_LEN_SEL_20 (0x1 << 10) +#define RT5616_TDM_CH_LEN_SEL_24 (0x2 << 10) +#define RT5616_TDM_CH_LEN_SEL_32 (0x3 << 10) +#define RT5616_TDM_ADC_SEL_MASK (0x1 << 9) +#define RT5616_TDM_ADC_SEL_SFT 9 +#define RT5616_TDM_ADC_SEL_NOR (0x0 << 9) +#define RT5616_TDM_ADC_SEL_SWAP (0x1 << 9) +#define RT5616_TDM_ADC_START_SEL_MASK (0x1 << 8) +#define RT5616_TDM_ADC_START_SEL_SFT 8 +#define RT5616_TDM_ADC_START_SEL_SL0 (0x0 << 8) +#define RT5616_TDM_ADC_START_SEL_SL4 (0x1 << 8) +#define RT5616_TDM_I2S_CH2_SEL_MASK (0x3 << 6) +#define RT5616_TDM_I2S_CH2_SEL_SFT 6 +#define RT5616_TDM_I2S_CH2_SEL_LR (0x0 << 6) +#define RT5616_TDM_I2S_CH2_SEL_RL (0x1 << 6) +#define RT5616_TDM_I2S_CH2_SEL_LL (0x2 << 6) +#define RT5616_TDM_I2S_CH2_SEL_RR (0x3 << 6) +#define RT5616_TDM_I2S_CH4_SEL_MASK (0x3 << 4) +#define RT5616_TDM_I2S_CH4_SEL_SFT 4 +#define RT5616_TDM_I2S_CH4_SEL_LR (0x0 << 4) +#define RT5616_TDM_I2S_CH4_SEL_RL (0x1 << 4) +#define RT5616_TDM_I2S_CH4_SEL_LL (0x2 << 4) +#define RT5616_TDM_I2S_CH4_SEL_RR (0x3 << 4) +#define RT5616_TDM_I2S_CH6_SEL_MASK (0x3 << 2) +#define RT5616_TDM_I2S_CH6_SEL_SFT 2 +#define RT5616_TDM_I2S_CH6_SEL_LR (0x0 << 2) +#define RT5616_TDM_I2S_CH6_SEL_RL (0x1 << 2) +#define RT5616_TDM_I2S_CH6_SEL_LL (0x2 << 2) +#define RT5616_TDM_I2S_CH6_SEL_RR (0x3 << 2) +#define RT5616_TDM_I2S_CH8_SEL_MASK (0x3) +#define RT5616_TDM_I2S_CH8_SEL_SFT 0 +#define RT5616_TDM_I2S_CH8_SEL_LR (0x0) +#define RT5616_TDM_I2S_CH8_SEL_RL (0x1) +#define RT5616_TDM_I2S_CH8_SEL_LL (0x2) +#define RT5616_TDM_I2S_CH8_SEL_RR (0x3) + +/* TDM Control 2 (0x78) */ +#define RT5616_TDM_LRCK_POL_SEL_MASK (0x1 << 15) +#define RT5616_TDM_LRCK_POL_SEL_SFT 15 +#define RT5616_TDM_LRCK_POL_SEL_NOR (0x0 << 15) +#define RT5616_TDM_LRCK_POL_SEL_INV (0x1 << 15) +#define RT5616_TDM_CH_VAL_SEL_MASK (0x1 << 14) +#define RT5616_TDM_CH_VAL_SEL_SFT 14 +#define RT5616_TDM_CH_VAL_SEL_CH01 (0x0 << 14) +#define RT5616_TDM_CH_VAL_SEL_CH0123 (0x1 << 14) +#define RT5616_TDM_CH_VAL_EN (0x1 << 13) +#define RT5616_TDM_CH_VAL_SFT 13 +#define RT5616_TDM_LPBK_EN (0x1 << 12) +#define RT5616_TDM_LPBK_SFT 12 +#define RT5616_TDM_LRCK_PULSE_SEL_MASK (0x1 << 11) +#define RT5616_TDM_LRCK_PULSE_SEL_SFT 11 +#define RT5616_TDM_LRCK_PULSE_SEL_BCLK (0x0 << 11) +#define RT5616_TDM_LRCK_PULSE_SEL_CH (0x1 << 11) +#define RT5616_TDM_END_EDGE_SEL_MASK (0x1 << 10) +#define RT5616_TDM_END_EDGE_SEL_SFT 10 +#define RT5616_TDM_END_EDGE_SEL_POS (0x0 << 10) +#define RT5616_TDM_END_EDGE_SEL_NEG (0x1 << 10) +#define RT5616_TDM_END_EDGE_EN (0x1 << 9) +#define RT5616_TDM_END_EDGE_EN_SFT 9 +#define RT5616_TDM_TRAN_EDGE_SEL_MASK (0x1 << 8) +#define RT5616_TDM_TRAN_EDGE_SEL_SFT 8 +#define RT5616_TDM_TRAN_EDGE_SEL_POS (0x0 << 8) +#define RT5616_TDM_TRAN_EDGE_SEL_NEG (0x1 << 8) +#define RT5616_M_TDM2_L (0x1 << 7) +#define RT5616_M_TDM2_L_SFT 7 +#define RT5616_M_TDM2_R (0x1 << 6) +#define RT5616_M_TDM2_R_SFT 6 +#define RT5616_M_TDM4_L (0x1 << 5) +#define RT5616_M_TDM4_L_SFT 5 +#define RT5616_M_TDM4_R (0x1 << 4) +#define RT5616_M_TDM4_R_SFT 4 + +/* Global Clock Control (0x80) */ +#define RT5616_SCLK_SRC_MASK (0x3 << 14) +#define RT5616_SCLK_SRC_SFT 14 +#define RT5616_SCLK_SRC_MCLK (0x0 << 14) +#define RT5616_SCLK_SRC_PLL1 (0x1 << 14) +#define RT5616_PLL1_SRC_MASK (0x3 << 12) +#define RT5616_PLL1_SRC_SFT 12 +#define RT5616_PLL1_SRC_MCLK (0x0 << 12) +#define RT5616_PLL1_SRC_BCLK1 (0x1 << 12) +#define RT5616_PLL1_SRC_BCLK2 (0x2 << 12) +#define RT5616_PLL1_PD_MASK (0x1 << 3) +#define RT5616_PLL1_PD_SFT 3 +#define RT5616_PLL1_PD_1 (0x0 << 3) +#define RT5616_PLL1_PD_2 (0x1 << 3) + +#define RT5616_PLL_INP_MAX 40000000 +#define RT5616_PLL_INP_MIN 256000 +/* PLL M/N/K Code Control 1 (0x81) */ +#define RT5616_PLL_N_MAX 0x1ff +#define RT5616_PLL_N_MASK (RT5616_PLL_N_MAX << 7) +#define RT5616_PLL_N_SFT 7 +#define RT5616_PLL_K_MAX 0x1f +#define RT5616_PLL_K_MASK (RT5616_PLL_K_MAX) +#define RT5616_PLL_K_SFT 0 + +/* PLL M/N/K Code Control 2 (0x82) */ +#define RT5616_PLL_M_MAX 0xf +#define RT5616_PLL_M_MASK (RT5616_PLL_M_MAX << 12) +#define RT5616_PLL_M_SFT 12 +#define RT5616_PLL_M_BP (0x1 << 11) +#define RT5616_PLL_M_BP_SFT 11 + +/* PLL tracking mode 1 (0x83) */ +#define RT5616_STO1_T_MASK (0x1 << 15) +#define RT5616_STO1_T_SFT 15 +#define RT5616_STO1_T_SCLK (0x0 << 15) +#define RT5616_STO1_T_LRCK1 (0x1 << 15) +#define RT5616_STO2_T_MASK (0x1 << 12) +#define RT5616_STO2_T_SFT 12 +#define RT5616_STO2_T_I2S2 (0x0 << 12) +#define RT5616_STO2_T_LRCK2 (0x1 << 12) +#define RT5616_ASRC2_REF_MASK (0x1 << 11) +#define RT5616_ASRC2_REF_SFT 11 +#define RT5616_ASRC2_REF_LRCK2 (0x0 << 11) +#define RT5616_ASRC2_REF_LRCK1 (0x1 << 11) +#define RT5616_DMIC_1_M_MASK (0x1 << 9) +#define RT5616_DMIC_1_M_SFT 9 +#define RT5616_DMIC_1_M_NOR (0x0 << 9) +#define RT5616_DMIC_1_M_ASYN (0x1 << 9) + +/* PLL tracking mode 2 (0x84) */ +#define RT5616_STO1_ASRC_EN (0x1 << 15) +#define RT5616_STO1_ASRC_EN_SFT 15 +#define RT5616_STO2_ASRC_EN (0x1 << 14) +#define RT5616_STO2_ASRC_EN_SFT 14 +#define RT5616_STO1_DAC_M_MASK (0x1 << 13) +#define RT5616_STO1_DAC_M_SFT 13 +#define RT5616_STO1_DAC_M_NOR (0x0 << 13) +#define RT5616_STO1_DAC_M_ASRC (0x1 << 13) +#define RT5616_STO2_DAC_M_MASK (0x1 << 12) +#define RT5616_STO2_DAC_M_SFT 12 +#define RT5616_STO2_DAC_M_NOR (0x0 << 12) +#define RT5616_STO2_DAC_M_ASRC (0x1 << 12) +#define RT5616_ADC_M_MASK (0x1 << 11) +#define RT5616_ADC_M_SFT 11 +#define RT5616_ADC_M_NOR (0x0 << 11) +#define RT5616_ADC_M_ASRC (0x1 << 11) +#define RT5616_I2S1_R_D_MASK (0x1 << 4) +#define RT5616_I2S1_R_D_SFT 4 +#define RT5616_I2S1_R_D_DIS (0x0 << 4) +#define RT5616_I2S1_R_D_EN (0x1 << 4) +#define RT5616_I2S2_R_D_MASK (0x1 << 3) +#define RT5616_I2S2_R_D_SFT 3 +#define RT5616_I2S2_R_D_DIS (0x0 << 3) +#define RT5616_I2S2_R_D_EN (0x1 << 3) +#define RT5616_PRE_SCLK_MASK (0x3) +#define RT5616_PRE_SCLK_SFT 0 +#define RT5616_PRE_SCLK_512 (0x0) +#define RT5616_PRE_SCLK_1024 (0x1) +#define RT5616_PRE_SCLK_2048 (0x2) + +/* PLL tracking mode 3 (0x85) */ +#define RT5616_I2S1_RATE_MASK (0xf << 12) +#define RT5616_I2S1_RATE_SFT 12 +#define RT5616_I2S2_RATE_MASK (0xf << 8) +#define RT5616_I2S2_RATE_SFT 8 +#define RT5616_G_ASRC_LP_MASK (0x1 << 3) +#define RT5616_G_ASRC_LP_SFT 3 +#define RT5616_ASRC_LP_F_M (0x1 << 2) +#define RT5616_ASRC_LP_F_SFT 2 +#define RT5616_ASRC_LP_F_NOR (0x0 << 2) +#define RT5616_ASRC_LP_F_SB (0x1 << 2) +#define RT5616_FTK_PH_DET_MASK (0x3) +#define RT5616_FTK_PH_DET_SFT 0 +#define RT5616_FTK_PH_DET_DIV1 (0x0) +#define RT5616_FTK_PH_DET_DIV2 (0x1) +#define RT5616_FTK_PH_DET_DIV4 (0x2) +#define RT5616_FTK_PH_DET_DIV8 (0x3) + +/*PLL tracking mode 6 (0x89) */ +#define RT5616_I2S1_PD_MASK (0x7 << 12) +#define RT5616_I2S1_PD_SFT 12 +#define RT5616_I2S2_PD_MASK (0x7 << 8) +#define RT5616_I2S2_PD_SFT 8 + +/*PLL tracking mode 7 (0x8a) */ +#define RT5616_FSI1_RATE_MASK (0xf << 12) +#define RT5616_FSI1_RATE_SFT 12 +#define RT5616_FSI2_RATE_MASK (0xf << 8) +#define RT5616_FSI2_RATE_SFT 8 + +/* HPOUT Over Current Detection (0x8b) */ +#define RT5616_HP_OVCD_MASK (0x1 << 10) +#define RT5616_HP_OVCD_SFT 10 +#define RT5616_HP_OVCD_DIS (0x0 << 10) +#define RT5616_HP_OVCD_EN (0x1 << 10) +#define RT5616_HP_OC_TH_MASK (0x3 << 8) +#define RT5616_HP_OC_TH_SFT 8 +#define RT5616_HP_OC_TH_90 (0x0 << 8) +#define RT5616_HP_OC_TH_105 (0x1 << 8) +#define RT5616_HP_OC_TH_120 (0x2 << 8) +#define RT5616_HP_OC_TH_135 (0x3 << 8) + +/* Depop Mode Control 1 (0x8e) */ +#define RT5616_SMT_TRIG_MASK (0x1 << 15) +#define RT5616_SMT_TRIG_SFT 15 +#define RT5616_SMT_TRIG_DIS (0x0 << 15) +#define RT5616_SMT_TRIG_EN (0x1 << 15) +#define RT5616_HP_L_SMT_MASK (0x1 << 9) +#define RT5616_HP_L_SMT_SFT 9 +#define RT5616_HP_L_SMT_DIS (0x0 << 9) +#define RT5616_HP_L_SMT_EN (0x1 << 9) +#define RT5616_HP_R_SMT_MASK (0x1 << 8) +#define RT5616_HP_R_SMT_SFT 8 +#define RT5616_HP_R_SMT_DIS (0x0 << 8) +#define RT5616_HP_R_SMT_EN (0x1 << 8) +#define RT5616_HP_CD_PD_MASK (0x1 << 7) +#define RT5616_HP_CD_PD_SFT 7 +#define RT5616_HP_CD_PD_DIS (0x0 << 7) +#define RT5616_HP_CD_PD_EN (0x1 << 7) +#define RT5616_RSTN_MASK (0x1 << 6) +#define RT5616_RSTN_SFT 6 +#define RT5616_RSTN_DIS (0x0 << 6) +#define RT5616_RSTN_EN (0x1 << 6) +#define RT5616_RSTP_MASK (0x1 << 5) +#define RT5616_RSTP_SFT 5 +#define RT5616_RSTP_DIS (0x0 << 5) +#define RT5616_RSTP_EN (0x1 << 5) +#define RT5616_HP_CO_MASK (0x1 << 4) +#define RT5616_HP_CO_SFT 4 +#define RT5616_HP_CO_DIS (0x0 << 4) +#define RT5616_HP_CO_EN (0x1 << 4) +#define RT5616_HP_CP_MASK (0x1 << 3) +#define RT5616_HP_CP_SFT 3 +#define RT5616_HP_CP_PD (0x0 << 3) +#define RT5616_HP_CP_PU (0x1 << 3) +#define RT5616_HP_SG_MASK (0x1 << 2) +#define RT5616_HP_SG_SFT 2 +#define RT5616_HP_SG_DIS (0x0 << 2) +#define RT5616_HP_SG_EN (0x1 << 2) +#define RT5616_HP_DP_MASK (0x1 << 1) +#define RT5616_HP_DP_SFT 1 +#define RT5616_HP_DP_PD (0x0 << 1) +#define RT5616_HP_DP_PU (0x1 << 1) +#define RT5616_HP_CB_MASK (0x1) +#define RT5616_HP_CB_SFT 0 +#define RT5616_HP_CB_PD (0x0) +#define RT5616_HP_CB_PU (0x1) + +/* Depop Mode Control 2 (0x8f) */ +#define RT5616_DEPOP_MASK (0x1 << 13) +#define RT5616_DEPOP_SFT 13 +#define RT5616_DEPOP_AUTO (0x0 << 13) +#define RT5616_DEPOP_MAN (0x1 << 13) +#define RT5616_RAMP_MASK (0x1 << 12) +#define RT5616_RAMP_SFT 12 +#define RT5616_RAMP_DIS (0x0 << 12) +#define RT5616_RAMP_EN (0x1 << 12) +#define RT5616_BPS_MASK (0x1 << 11) +#define RT5616_BPS_SFT 11 +#define RT5616_BPS_DIS (0x0 << 11) +#define RT5616_BPS_EN (0x1 << 11) +#define RT5616_FAST_UPDN_MASK (0x1 << 10) +#define RT5616_FAST_UPDN_SFT 10 +#define RT5616_FAST_UPDN_DIS (0x0 << 10) +#define RT5616_FAST_UPDN_EN (0x1 << 10) +#define RT5616_MRES_MASK (0x3 << 8) +#define RT5616_MRES_SFT 8 +#define RT5616_MRES_15MO (0x0 << 8) +#define RT5616_MRES_25MO (0x1 << 8) +#define RT5616_MRES_35MO (0x2 << 8) +#define RT5616_MRES_45MO (0x3 << 8) +#define RT5616_VLO_MASK (0x1 << 7) +#define RT5616_VLO_SFT 7 +#define RT5616_VLO_3V (0x0 << 7) +#define RT5616_VLO_32V (0x1 << 7) +#define RT5616_DIG_DP_MASK (0x1 << 6) +#define RT5616_DIG_DP_SFT 6 +#define RT5616_DIG_DP_DIS (0x0 << 6) +#define RT5616_DIG_DP_EN (0x1 << 6) +#define RT5616_DP_TH_MASK (0x3 << 4) +#define RT5616_DP_TH_SFT 4 + +/* Depop Mode Control 3 (0x90) */ +#define RT5616_CP_SYS_MASK (0x7 << 12) +#define RT5616_CP_SYS_SFT 12 +#define RT5616_CP_FQ1_MASK (0x7 << 8) +#define RT5616_CP_FQ1_SFT 8 +#define RT5616_CP_FQ2_MASK (0x7 << 4) +#define RT5616_CP_FQ2_SFT 4 +#define RT5616_CP_FQ3_MASK (0x7) +#define RT5616_CP_FQ3_SFT 0 +#define RT5616_CP_FQ_1_5_KHZ 0 +#define RT5616_CP_FQ_3_KHZ 1 +#define RT5616_CP_FQ_6_KHZ 2 +#define RT5616_CP_FQ_12_KHZ 3 +#define RT5616_CP_FQ_24_KHZ 4 +#define RT5616_CP_FQ_48_KHZ 5 +#define RT5616_CP_FQ_96_KHZ 6 +#define RT5616_CP_FQ_192_KHZ 7 + +/* HPOUT charge pump (0x91) */ +#define RT5616_OSW_L_MASK (0x1 << 11) +#define RT5616_OSW_L_SFT 11 +#define RT5616_OSW_L_DIS (0x0 << 11) +#define RT5616_OSW_L_EN (0x1 << 11) +#define RT5616_OSW_R_MASK (0x1 << 10) +#define RT5616_OSW_R_SFT 10 +#define RT5616_OSW_R_DIS (0x0 << 10) +#define RT5616_OSW_R_EN (0x1 << 10) +#define RT5616_PM_HP_MASK (0x3 << 8) +#define RT5616_PM_HP_SFT 8 +#define RT5616_PM_HP_LV (0x0 << 8) +#define RT5616_PM_HP_MV (0x1 << 8) +#define RT5616_PM_HP_HV (0x2 << 8) +#define RT5616_IB_HP_MASK (0x3 << 6) +#define RT5616_IB_HP_SFT 6 +#define RT5616_IB_HP_125IL (0x0 << 6) +#define RT5616_IB_HP_25IL (0x1 << 6) +#define RT5616_IB_HP_5IL (0x2 << 6) +#define RT5616_IB_HP_1IL (0x3 << 6) + +/* Micbias Control (0x93) */ +#define RT5616_MIC1_BS_MASK (0x1 << 15) +#define RT5616_MIC1_BS_SFT 15 +#define RT5616_MIC1_BS_9AV (0x0 << 15) +#define RT5616_MIC1_BS_75AV (0x1 << 15) +#define RT5616_MIC1_CLK_MASK (0x1 << 13) +#define RT5616_MIC1_CLK_SFT 13 +#define RT5616_MIC1_CLK_DIS (0x0 << 13) +#define RT5616_MIC1_CLK_EN (0x1 << 13) +#define RT5616_MIC1_OVCD_MASK (0x1 << 11) +#define RT5616_MIC1_OVCD_SFT 11 +#define RT5616_MIC1_OVCD_DIS (0x0 << 11) +#define RT5616_MIC1_OVCD_EN (0x1 << 11) +#define RT5616_MIC1_OVTH_MASK (0x3 << 9) +#define RT5616_MIC1_OVTH_SFT 9 +#define RT5616_MIC1_OVTH_600UA (0x0 << 9) +#define RT5616_MIC1_OVTH_1500UA (0x1 << 9) +#define RT5616_MIC1_OVTH_2000UA (0x2 << 9) +#define RT5616_PWR_MB_MASK (0x1 << 5) +#define RT5616_PWR_MB_SFT 5 +#define RT5616_PWR_MB_PD (0x0 << 5) +#define RT5616_PWR_MB_PU (0x1 << 5) +#define RT5616_PWR_CLK12M_MASK (0x1 << 4) +#define RT5616_PWR_CLK12M_SFT 4 +#define RT5616_PWR_CLK12M_PD (0x0 << 4) +#define RT5616_PWR_CLK12M_PU (0x1 << 4) + +/* Analog JD Control 1 (0x94) */ +#define RT5616_JD2_CMP_MASK (0x7 << 12) +#define RT5616_JD2_CMP_SFT 12 +#define RT5616_JD_PU (0x1 << 11) +#define RT5616_JD_PU_SFT 11 +#define RT5616_JD_PD (0x1 << 10) +#define RT5616_JD_PD_SFT 10 +#define RT5616_JD_MODE_SEL_MASK (0x3 << 8) +#define RT5616_JD_MODE_SEL_SFT 8 +#define RT5616_JD_MODE_SEL_M0 (0x0 << 8) +#define RT5616_JD_MODE_SEL_M1 (0x1 << 8) +#define RT5616_JD_MODE_SEL_M2 (0x2 << 8) +#define RT5616_JD_M_CMP (0x7 << 4) +#define RT5616_JD_M_CMP_SFT 4 +#define RT5616_JD_M_PU (0x1 << 3) +#define RT5616_JD_M_PU_SFT 3 +#define RT5616_JD_M_PD (0x1 << 2) +#define RT5616_JD_M_PD_SFT 2 +#define RT5616_JD_M_MODE_SEL_MASK (0x3) +#define RT5616_JD_M_MODE_SEL_SFT 0 +#define RT5616_JD_M_MODE_SEL_M0 (0x0) +#define RT5616_JD_M_MODE_SEL_M1 (0x1) +#define RT5616_JD_M_MODE_SEL_M2 (0x2) + +/* Analog JD Control 2 (0x95) */ +#define RT5616_JD3_CMP_MASK (0x7 << 12) +#define RT5616_JD3_CMP_SFT 12 + +/* EQ Control 1 (0xb0) */ +#define RT5616_EQ_SRC_MASK (0x1 << 15) +#define RT5616_EQ_SRC_SFT 15 +#define RT5616_EQ_SRC_DAC (0x0 << 15) +#define RT5616_EQ_SRC_ADC (0x1 << 15) +#define RT5616_EQ_UPD (0x1 << 14) +#define RT5616_EQ_UPD_BIT 14 +#define RT5616_EQ_CD_MASK (0x1 << 13) +#define RT5616_EQ_CD_SFT 13 +#define RT5616_EQ_CD_DIS (0x0 << 13) +#define RT5616_EQ_CD_EN (0x1 << 13) +#define RT5616_EQ_DITH_MASK (0x3 << 8) +#define RT5616_EQ_DITH_SFT 8 +#define RT5616_EQ_DITH_NOR (0x0 << 8) +#define RT5616_EQ_DITH_LSB (0x1 << 8) +#define RT5616_EQ_DITH_LSB_1 (0x2 << 8) +#define RT5616_EQ_DITH_LSB_2 (0x3 << 8) +#define RT5616_EQ_CD_F (0x1 << 7) +#define RT5616_EQ_CD_F_BIT 7 +#define RT5616_EQ_STA_HP2 (0x1 << 6) +#define RT5616_EQ_STA_HP2_BIT 6 +#define RT5616_EQ_STA_HP1 (0x1 << 5) +#define RT5616_EQ_STA_HP1_BIT 5 +#define RT5616_EQ_STA_BP4 (0x1 << 4) +#define RT5616_EQ_STA_BP4_BIT 4 +#define RT5616_EQ_STA_BP3 (0x1 << 3) +#define RT5616_EQ_STA_BP3_BIT 3 +#define RT5616_EQ_STA_BP2 (0x1 << 2) +#define RT5616_EQ_STA_BP2_BIT 2 +#define RT5616_EQ_STA_BP1 (0x1 << 1) +#define RT5616_EQ_STA_BP1_BIT 1 +#define RT5616_EQ_STA_LP (0x1) +#define RT5616_EQ_STA_LP_BIT 0 + +/* EQ Control 2 (0xb1) */ +#define RT5616_EQ_HPF1_M_MASK (0x1 << 8) +#define RT5616_EQ_HPF1_M_SFT 8 +#define RT5616_EQ_HPF1_M_HI (0x0 << 8) +#define RT5616_EQ_HPF1_M_1ST (0x1 << 8) +#define RT5616_EQ_LPF1_M_MASK (0x1 << 7) +#define RT5616_EQ_LPF1_M_SFT 7 +#define RT5616_EQ_LPF1_M_LO (0x0 << 7) +#define RT5616_EQ_LPF1_M_1ST (0x1 << 7) +#define RT5616_EQ_HPF2_MASK (0x1 << 6) +#define RT5616_EQ_HPF2_SFT 6 +#define RT5616_EQ_HPF2_DIS (0x0 << 6) +#define RT5616_EQ_HPF2_EN (0x1 << 6) +#define RT5616_EQ_HPF1_MASK (0x1 << 5) +#define RT5616_EQ_HPF1_SFT 5 +#define RT5616_EQ_HPF1_DIS (0x0 << 5) +#define RT5616_EQ_HPF1_EN (0x1 << 5) +#define RT5616_EQ_BPF4_MASK (0x1 << 4) +#define RT5616_EQ_BPF4_SFT 4 +#define RT5616_EQ_BPF4_DIS (0x0 << 4) +#define RT5616_EQ_BPF4_EN (0x1 << 4) +#define RT5616_EQ_BPF3_MASK (0x1 << 3) +#define RT5616_EQ_BPF3_SFT 3 +#define RT5616_EQ_BPF3_DIS (0x0 << 3) +#define RT5616_EQ_BPF3_EN (0x1 << 3) +#define RT5616_EQ_BPF2_MASK (0x1 << 2) +#define RT5616_EQ_BPF2_SFT 2 +#define RT5616_EQ_BPF2_DIS (0x0 << 2) +#define RT5616_EQ_BPF2_EN (0x1 << 2) +#define RT5616_EQ_BPF1_MASK (0x1 << 1) +#define RT5616_EQ_BPF1_SFT 1 +#define RT5616_EQ_BPF1_DIS (0x0 << 1) +#define RT5616_EQ_BPF1_EN (0x1 << 1) +#define RT5616_EQ_LPF_MASK (0x1) +#define RT5616_EQ_LPF_SFT 0 +#define RT5616_EQ_LPF_DIS (0x0) +#define RT5616_EQ_LPF_EN (0x1) +#define RT5616_EQ_CTRL_MASK (0x7f) + +/* Memory Test (0xb2) */ +#define RT5616_MT_MASK (0x1 << 15) +#define RT5616_MT_SFT 15 +#define RT5616_MT_DIS (0x0 << 15) +#define RT5616_MT_EN (0x1 << 15) + +/* DRC/AGC Control 1 (0xb4) */ +#define RT5616_DRC_AGC_P_MASK (0x1 << 15) +#define RT5616_DRC_AGC_P_SFT 15 +#define RT5616_DRC_AGC_P_DAC (0x0 << 15) +#define RT5616_DRC_AGC_P_ADC (0x1 << 15) +#define RT5616_DRC_AGC_MASK (0x1 << 14) +#define RT5616_DRC_AGC_SFT 14 +#define RT5616_DRC_AGC_DIS (0x0 << 14) +#define RT5616_DRC_AGC_EN (0x1 << 14) +#define RT5616_DRC_AGC_UPD (0x1 << 13) +#define RT5616_DRC_AGC_UPD_BIT 13 +#define RT5616_DRC_AGC_AR_MASK (0x1f << 8) +#define RT5616_DRC_AGC_AR_SFT 8 +#define RT5616_DRC_AGC_R_MASK (0x7 << 5) +#define RT5616_DRC_AGC_R_SFT 5 +#define RT5616_DRC_AGC_R_48K (0x1 << 5) +#define RT5616_DRC_AGC_R_96K (0x2 << 5) +#define RT5616_DRC_AGC_R_192K (0x3 << 5) +#define RT5616_DRC_AGC_R_441K (0x5 << 5) +#define RT5616_DRC_AGC_R_882K (0x6 << 5) +#define RT5616_DRC_AGC_R_1764K (0x7 << 5) +#define RT5616_DRC_AGC_RC_MASK (0x1f) +#define RT5616_DRC_AGC_RC_SFT 0 + +/* DRC/AGC Control 2 (0xb5) */ +#define RT5616_DRC_AGC_POB_MASK (0x3f << 8) +#define RT5616_DRC_AGC_POB_SFT 8 +#define RT5616_DRC_AGC_CP_MASK (0x1 << 7) +#define RT5616_DRC_AGC_CP_SFT 7 +#define RT5616_DRC_AGC_CP_DIS (0x0 << 7) +#define RT5616_DRC_AGC_CP_EN (0x1 << 7) +#define RT5616_DRC_AGC_CPR_MASK (0x3 << 5) +#define RT5616_DRC_AGC_CPR_SFT 5 +#define RT5616_DRC_AGC_CPR_1_1 (0x0 << 5) +#define RT5616_DRC_AGC_CPR_1_2 (0x1 << 5) +#define RT5616_DRC_AGC_CPR_1_3 (0x2 << 5) +#define RT5616_DRC_AGC_CPR_1_4 (0x3 << 5) +#define RT5616_DRC_AGC_PRB_MASK (0x1f) +#define RT5616_DRC_AGC_PRB_SFT 0 + +/* DRC/AGC Control 3 (0xb6) */ +#define RT5616_DRC_AGC_NGB_MASK (0xf << 12) +#define RT5616_DRC_AGC_NGB_SFT 12 +#define RT5616_DRC_AGC_TAR_MASK (0x1f << 7) +#define RT5616_DRC_AGC_TAR_SFT 7 +#define RT5616_DRC_AGC_NG_MASK (0x1 << 6) +#define RT5616_DRC_AGC_NG_SFT 6 +#define RT5616_DRC_AGC_NG_DIS (0x0 << 6) +#define RT5616_DRC_AGC_NG_EN (0x1 << 6) +#define RT5616_DRC_AGC_NGH_MASK (0x1 << 5) +#define RT5616_DRC_AGC_NGH_SFT 5 +#define RT5616_DRC_AGC_NGH_DIS (0x0 << 5) +#define RT5616_DRC_AGC_NGH_EN (0x1 << 5) +#define RT5616_DRC_AGC_NGT_MASK (0x1f) +#define RT5616_DRC_AGC_NGT_SFT 0 + +/* Jack Detect Control 1 (0xbb) */ +#define RT5616_JD_MASK (0x7 << 13) +#define RT5616_JD_SFT 13 +#define RT5616_JD_DIS (0x0 << 13) +#define RT5616_JD_GPIO1 (0x1 << 13) +#define RT5616_JD_GPIO2 (0x2 << 13) +#define RT5616_JD_GPIO3 (0x3 << 13) +#define RT5616_JD_GPIO4 (0x4 << 13) +#define RT5616_JD_GPIO5 (0x5 << 13) +#define RT5616_JD_GPIO6 (0x6 << 13) +#define RT5616_JD_HP_MASK (0x1 << 11) +#define RT5616_JD_HP_SFT 11 +#define RT5616_JD_HP_DIS (0x0 << 11) +#define RT5616_JD_HP_EN (0x1 << 11) +#define RT5616_JD_HP_TRG_MASK (0x1 << 10) +#define RT5616_JD_HP_TRG_SFT 10 +#define RT5616_JD_HP_TRG_LO (0x0 << 10) +#define RT5616_JD_HP_TRG_HI (0x1 << 10) +#define RT5616_JD_SPL_MASK (0x1 << 9) +#define RT5616_JD_SPL_SFT 9 +#define RT5616_JD_SPL_DIS (0x0 << 9) +#define RT5616_JD_SPL_EN (0x1 << 9) +#define RT5616_JD_SPL_TRG_MASK (0x1 << 8) +#define RT5616_JD_SPL_TRG_SFT 8 +#define RT5616_JD_SPL_TRG_LO (0x0 << 8) +#define RT5616_JD_SPL_TRG_HI (0x1 << 8) +#define RT5616_JD_SPR_MASK (0x1 << 7) +#define RT5616_JD_SPR_SFT 7 +#define RT5616_JD_SPR_DIS (0x0 << 7) +#define RT5616_JD_SPR_EN (0x1 << 7) +#define RT5616_JD_SPR_TRG_MASK (0x1 << 6) +#define RT5616_JD_SPR_TRG_SFT 6 +#define RT5616_JD_SPR_TRG_LO (0x0 << 6) +#define RT5616_JD_SPR_TRG_HI (0x1 << 6) +#define RT5616_JD_LO_MASK (0x1 << 3) +#define RT5616_JD_LO_SFT 3 +#define RT5616_JD_LO_DIS (0x0 << 3) +#define RT5616_JD_LO_EN (0x1 << 3) +#define RT5616_JD_LO_TRG_MASK (0x1 << 2) +#define RT5616_JD_LO_TRG_SFT 2 +#define RT5616_JD_LO_TRG_LO (0x0 << 2) +#define RT5616_JD_LO_TRG_HI (0x1 << 2) + +/* Jack Detect Control 2 (0xbc) */ +#define RT5616_JD_TRG_SEL_MASK (0x7 << 9) +#define RT5616_JD_TRG_SEL_SFT 9 +#define RT5616_JD_TRG_SEL_GPIO (0x0 << 9) +#define RT5616_JD_TRG_SEL_JD1_1 (0x1 << 9) +#define RT5616_JD_TRG_SEL_JD1_2 (0x2 << 9) +#define RT5616_JD_TRG_SEL_JD2 (0x3 << 9) +#define RT5616_JD_TRG_SEL_JD3 (0x4 << 9) +#define RT5616_JD3_IRQ_EN (0x1 << 8) +#define RT5616_JD3_IRQ_EN_SFT 8 +#define RT5616_JD3_EN_STKY (0x1 << 7) +#define RT5616_JD3_EN_STKY_SFT 7 +#define RT5616_JD3_INV (0x1 << 6) +#define RT5616_JD3_INV_SFT 6 + +/* IRQ Control 1 (0xbd) */ +#define RT5616_IRQ_JD_MASK (0x1 << 15) +#define RT5616_IRQ_JD_SFT 15 +#define RT5616_IRQ_JD_BP (0x0 << 15) +#define RT5616_IRQ_JD_NOR (0x1 << 15) +#define RT5616_JD_STKY_MASK (0x1 << 13) +#define RT5616_JD_STKY_SFT 13 +#define RT5616_JD_STKY_DIS (0x0 << 13) +#define RT5616_JD_STKY_EN (0x1 << 13) +#define RT5616_JD_P_MASK (0x1 << 11) +#define RT5616_JD_P_SFT 11 +#define RT5616_JD_P_NOR (0x0 << 11) +#define RT5616_JD_P_INV (0x1 << 11) +#define RT5616_JD1_1_IRQ_EN (0x1 << 9) +#define RT5616_JD1_1_IRQ_EN_SFT 9 +#define RT5616_JD1_1_EN_STKY (0x1 << 8) +#define RT5616_JD1_1_EN_STKY_SFT 8 +#define RT5616_JD1_1_INV (0x1 << 7) +#define RT5616_JD1_1_INV_SFT 7 +#define RT5616_JD1_2_IRQ_EN (0x1 << 6) +#define RT5616_JD1_2_IRQ_EN_SFT 6 +#define RT5616_JD1_2_EN_STKY (0x1 << 5) +#define RT5616_JD1_2_EN_STKY_SFT 5 +#define RT5616_JD1_2_INV (0x1 << 4) +#define RT5616_JD1_2_INV_SFT 4 +#define RT5616_JD2_IRQ_EN (0x1 << 3) +#define RT5616_JD2_IRQ_EN_SFT 3 +#define RT5616_JD2_EN_STKY (0x1 << 2) +#define RT5616_JD2_EN_STKY_SFT 2 +#define RT5616_JD2_INV (0x1 << 1) +#define RT5616_JD2_INV_SFT 1 + +/* IRQ Control 2 (0xbe) */ +#define RT5616_IRQ_MB1_OC_MASK (0x1 << 15) +#define RT5616_IRQ_MB1_OC_SFT 15 +#define RT5616_IRQ_MB1_OC_BP (0x0 << 15) +#define RT5616_IRQ_MB1_OC_NOR (0x1 << 15) +#define RT5616_MB1_OC_STKY_MASK (0x1 << 11) +#define RT5616_MB1_OC_STKY_SFT 11 +#define RT5616_MB1_OC_STKY_DIS (0x0 << 11) +#define RT5616_MB1_OC_STKY_EN (0x1 << 11) +#define RT5616_MB1_OC_P_MASK (0x1 << 7) +#define RT5616_MB1_OC_P_SFT 7 +#define RT5616_MB1_OC_P_NOR (0x0 << 7) +#define RT5616_MB1_OC_P_INV (0x1 << 7) +#define RT5616_MB2_OC_P_MASK (0x1 << 6) +#define RT5616_MB1_OC_CLR (0x1 << 3) +#define RT5616_MB1_OC_CLR_SFT 3 +#define RT5616_STA_GPIO8 (0x1) +#define RT5616_STA_GPIO8_BIT 0 + +/* Internal Status and GPIO status (0xbf) */ +#define RT5616_STA_JD3 (0x1 << 15) +#define RT5616_STA_JD3_BIT 15 +#define RT5616_STA_JD2 (0x1 << 14) +#define RT5616_STA_JD2_BIT 14 +#define RT5616_STA_JD1_2 (0x1 << 13) +#define RT5616_STA_JD1_2_BIT 13 +#define RT5616_STA_JD1_1 (0x1 << 12) +#define RT5616_STA_JD1_1_BIT 12 +#define RT5616_STA_GP7 (0x1 << 11) +#define RT5616_STA_GP7_BIT 11 +#define RT5616_STA_GP6 (0x1 << 10) +#define RT5616_STA_GP6_BIT 10 +#define RT5616_STA_GP5 (0x1 << 9) +#define RT5616_STA_GP5_BIT 9 +#define RT5616_STA_GP1 (0x1 << 8) +#define RT5616_STA_GP1_BIT 8 +#define RT5616_STA_GP2 (0x1 << 7) +#define RT5616_STA_GP2_BIT 7 +#define RT5616_STA_GP3 (0x1 << 6) +#define RT5616_STA_GP3_BIT 6 +#define RT5616_STA_GP4 (0x1 << 5) +#define RT5616_STA_GP4_BIT 5 +#define RT5616_STA_GP_JD (0x1 << 4) +#define RT5616_STA_GP_JD_BIT 4 + +/* GPIO Control 1 (0xc0) */ +#define RT5616_GP1_PIN_MASK (0x1 << 15) +#define RT5616_GP1_PIN_SFT 15 +#define RT5616_GP1_PIN_GPIO1 (0x0 << 15) +#define RT5616_GP1_PIN_IRQ (0x1 << 15) +#define RT5616_GP2_PIN_MASK (0x1 << 14) +#define RT5616_GP2_PIN_SFT 14 +#define RT5616_GP2_PIN_GPIO2 (0x0 << 14) +#define RT5616_GP2_PIN_DMIC1_SCL (0x1 << 14) +#define RT5616_GPIO_M_MASK (0x1 << 9) +#define RT5616_GPIO_M_SFT 9 +#define RT5616_GPIO_M_FLT (0x0 << 9) +#define RT5616_GPIO_M_PH (0x1 << 9) +#define RT5616_I2S2_SEL_MASK (0x1 << 8) +#define RT5616_I2S2_SEL_SFT 8 +#define RT5616_I2S2_SEL_I2S (0x0 << 8) +#define RT5616_I2S2_SEL_GPIO (0x1 << 8) +#define RT5616_GP5_PIN_MASK (0x1 << 7) +#define RT5616_GP5_PIN_SFT 7 +#define RT5616_GP5_PIN_GPIO5 (0x0 << 7) +#define RT5616_GP5_PIN_IRQ (0x1 << 7) +#define RT5616_GP6_PIN_MASK (0x1 << 6) +#define RT5616_GP6_PIN_SFT 6 +#define RT5616_GP6_PIN_GPIO6 (0x0 << 6) +#define RT5616_GP6_PIN_DMIC_SDA (0x1 << 6) +#define RT5616_GP7_PIN_MASK (0x1 << 5) +#define RT5616_GP7_PIN_SFT 5 +#define RT5616_GP7_PIN_GPIO7 (0x0 << 5) +#define RT5616_GP7_PIN_IRQ (0x1 << 5) +#define RT5616_GP8_PIN_MASK (0x1 << 4) +#define RT5616_GP8_PIN_SFT 4 +#define RT5616_GP8_PIN_GPIO8 (0x0 << 4) +#define RT5616_GP8_PIN_DMIC_SDA (0x1 << 4) +#define RT5616_GPIO_PDM_SEL_MASK (0x1 << 3) +#define RT5616_GPIO_PDM_SEL_SFT 3 +#define RT5616_GPIO_PDM_SEL_GPIO (0x0 << 3) +#define RT5616_GPIO_PDM_SEL_PDM (0x1 << 3) + +/* GPIO Control 2 (0xc1) */ +#define RT5616_GP5_DR_MASK (0x1 << 14) +#define RT5616_GP5_DR_SFT 14 +#define RT5616_GP5_DR_IN (0x0 << 14) +#define RT5616_GP5_DR_OUT (0x1 << 14) +#define RT5616_GP5_OUT_MASK (0x1 << 13) +#define RT5616_GP5_OUT_SFT 13 +#define RT5616_GP5_OUT_LO (0x0 << 13) +#define RT5616_GP5_OUT_HI (0x1 << 13) +#define RT5616_GP5_P_MASK (0x1 << 12) +#define RT5616_GP5_P_SFT 12 +#define RT5616_GP5_P_NOR (0x0 << 12) +#define RT5616_GP5_P_INV (0x1 << 12) +#define RT5616_GP4_DR_MASK (0x1 << 11) +#define RT5616_GP4_DR_SFT 11 +#define RT5616_GP4_DR_IN (0x0 << 11) +#define RT5616_GP4_DR_OUT (0x1 << 11) +#define RT5616_GP4_OUT_MASK (0x1 << 10) +#define RT5616_GP4_OUT_SFT 10 +#define RT5616_GP4_OUT_LO (0x0 << 10) +#define RT5616_GP4_OUT_HI (0x1 << 10) +#define RT5616_GP4_P_MASK (0x1 << 9) +#define RT5616_GP4_P_SFT 9 +#define RT5616_GP4_P_NOR (0x0 << 9) +#define RT5616_GP4_P_INV (0x1 << 9) +#define RT5616_GP3_DR_MASK (0x1 << 8) +#define RT5616_GP3_DR_SFT 8 +#define RT5616_GP3_DR_IN (0x0 << 8) +#define RT5616_GP3_DR_OUT (0x1 << 8) +#define RT5616_GP3_OUT_MASK (0x1 << 7) +#define RT5616_GP3_OUT_SFT 7 +#define RT5616_GP3_OUT_LO (0x0 << 7) +#define RT5616_GP3_OUT_HI (0x1 << 7) +#define RT5616_GP3_P_MASK (0x1 << 6) +#define RT5616_GP3_P_SFT 6 +#define RT5616_GP3_P_NOR (0x0 << 6) +#define RT5616_GP3_P_INV (0x1 << 6) +#define RT5616_GP2_DR_MASK (0x1 << 5) +#define RT5616_GP2_DR_SFT 5 +#define RT5616_GP2_DR_IN (0x0 << 5) +#define RT5616_GP2_DR_OUT (0x1 << 5) +#define RT5616_GP2_OUT_MASK (0x1 << 4) +#define RT5616_GP2_OUT_SFT 4 +#define RT5616_GP2_OUT_LO (0x0 << 4) +#define RT5616_GP2_OUT_HI (0x1 << 4) +#define RT5616_GP2_P_MASK (0x1 << 3) +#define RT5616_GP2_P_SFT 3 +#define RT5616_GP2_P_NOR (0x0 << 3) +#define RT5616_GP2_P_INV (0x1 << 3) +#define RT5616_GP1_DR_MASK (0x1 << 2) +#define RT5616_GP1_DR_SFT 2 +#define RT5616_GP1_DR_IN (0x0 << 2) +#define RT5616_GP1_DR_OUT (0x1 << 2) +#define RT5616_GP1_OUT_MASK (0x1 << 1) +#define RT5616_GP1_OUT_SFT 1 +#define RT5616_GP1_OUT_LO (0x0 << 1) +#define RT5616_GP1_OUT_HI (0x1 << 1) +#define RT5616_GP1_P_MASK (0x1) +#define RT5616_GP1_P_SFT 0 +#define RT5616_GP1_P_NOR (0x0) +#define RT5616_GP1_P_INV (0x1) + +/* GPIO Control 3 (0xc2) */ +#define RT5616_GP8_DR_MASK (0x1 << 8) +#define RT5616_GP8_DR_SFT 8 +#define RT5616_GP8_DR_IN (0x0 << 8) +#define RT5616_GP8_DR_OUT (0x1 << 8) +#define RT5616_GP8_OUT_MASK (0x1 << 7) +#define RT5616_GP8_OUT_SFT 7 +#define RT5616_GP8_OUT_LO (0x0 << 7) +#define RT5616_GP8_OUT_HI (0x1 << 7) +#define RT5616_GP8_P_MASK (0x1 << 6) +#define RT5616_GP8_P_SFT 6 +#define RT5616_GP8_P_NOR (0x0 << 6) +#define RT5616_GP8_P_INV (0x1 << 6) +#define RT5616_GP7_DR_MASK (0x1 << 5) +#define RT5616_GP7_DR_SFT 5 +#define RT5616_GP7_DR_IN (0x0 << 5) +#define RT5616_GP7_DR_OUT (0x1 << 5) +#define RT5616_GP7_OUT_MASK (0x1 << 4) +#define RT5616_GP7_OUT_SFT 4 +#define RT5616_GP7_OUT_LO (0x0 << 4) +#define RT5616_GP7_OUT_HI (0x1 << 4) +#define RT5616_GP7_P_MASK (0x1 << 3) +#define RT5616_GP7_P_SFT 3 +#define RT5616_GP7_P_NOR (0x0 << 3) +#define RT5616_GP7_P_INV (0x1 << 3) +#define RT5616_GP6_DR_MASK (0x1 << 2) +#define RT5616_GP6_DR_SFT 2 +#define RT5616_GP6_DR_IN (0x0 << 2) +#define RT5616_GP6_DR_OUT (0x1 << 2) +#define RT5616_GP6_OUT_MASK (0x1 << 1) +#define RT5616_GP6_OUT_SFT 1 +#define RT5616_GP6_OUT_LO (0x0 << 1) +#define RT5616_GP6_OUT_HI (0x1 << 1) +#define RT5616_GP6_P_MASK (0x1) +#define RT5616_GP6_P_SFT 0 +#define RT5616_GP6_P_NOR (0x0) +#define RT5616_GP6_P_INV (0x1) + +/* Scramble Control (0xce) */ +#define RT5616_SCB_SWAP_MASK (0x1 << 15) +#define RT5616_SCB_SWAP_SFT 15 +#define RT5616_SCB_SWAP_DIS (0x0 << 15) +#define RT5616_SCB_SWAP_EN (0x1 << 15) +#define RT5616_SCB_MASK (0x1 << 14) +#define RT5616_SCB_SFT 14 +#define RT5616_SCB_DIS (0x0 << 14) +#define RT5616_SCB_EN (0x1 << 14) + +/* Baseback Control (0xcf) */ +#define RT5616_BB_MASK (0x1 << 15) +#define RT5616_BB_SFT 15 +#define RT5616_BB_DIS (0x0 << 15) +#define RT5616_BB_EN (0x1 << 15) +#define RT5616_BB_CT_MASK (0x7 << 12) +#define RT5616_BB_CT_SFT 12 +#define RT5616_BB_CT_A (0x0 << 12) +#define RT5616_BB_CT_B (0x1 << 12) +#define RT5616_BB_CT_C (0x2 << 12) +#define RT5616_BB_CT_D (0x3 << 12) +#define RT5616_M_BB_L_MASK (0x1 << 9) +#define RT5616_M_BB_L_SFT 9 +#define RT5616_M_BB_R_MASK (0x1 << 8) +#define RT5616_M_BB_R_SFT 8 +#define RT5616_M_BB_HPF_L_MASK (0x1 << 7) +#define RT5616_M_BB_HPF_L_SFT 7 +#define RT5616_M_BB_HPF_R_MASK (0x1 << 6) +#define RT5616_M_BB_HPF_R_SFT 6 +#define RT5616_G_BB_BST_MASK (0x3f) +#define RT5616_G_BB_BST_SFT 0 + +/* MP3 Plus Control 1 (0xd0) */ +#define RT5616_M_MP3_L_MASK (0x1 << 15) +#define RT5616_M_MP3_L_SFT 15 +#define RT5616_M_MP3_R_MASK (0x1 << 14) +#define RT5616_M_MP3_R_SFT 14 +#define RT5616_M_MP3_MASK (0x1 << 13) +#define RT5616_M_MP3_SFT 13 +#define RT5616_M_MP3_DIS (0x0 << 13) +#define RT5616_M_MP3_EN (0x1 << 13) +#define RT5616_EG_MP3_MASK (0x1f << 8) +#define RT5616_EG_MP3_SFT 8 +#define RT5616_MP3_HLP_MASK (0x1 << 7) +#define RT5616_MP3_HLP_SFT 7 +#define RT5616_MP3_HLP_DIS (0x0 << 7) +#define RT5616_MP3_HLP_EN (0x1 << 7) +#define RT5616_M_MP3_ORG_L_MASK (0x1 << 6) +#define RT5616_M_MP3_ORG_L_SFT 6 +#define RT5616_M_MP3_ORG_R_MASK (0x1 << 5) +#define RT5616_M_MP3_ORG_R_SFT 5 + +/* MP3 Plus Control 2 (0xd1) */ +#define RT5616_MP3_WT_MASK (0x1 << 13) +#define RT5616_MP3_WT_SFT 13 +#define RT5616_MP3_WT_1_4 (0x0 << 13) +#define RT5616_MP3_WT_1_2 (0x1 << 13) +#define RT5616_OG_MP3_MASK (0x1f << 8) +#define RT5616_OG_MP3_SFT 8 +#define RT5616_HG_MP3_MASK (0x3f) +#define RT5616_HG_MP3_SFT 0 + +/* 3D HP Control 1 (0xd2) */ +#define RT5616_3D_CF_MASK (0x1 << 15) +#define RT5616_3D_CF_SFT 15 +#define RT5616_3D_CF_DIS (0x0 << 15) +#define RT5616_3D_CF_EN (0x1 << 15) +#define RT5616_3D_HP_MASK (0x1 << 14) +#define RT5616_3D_HP_SFT 14 +#define RT5616_3D_HP_DIS (0x0 << 14) +#define RT5616_3D_HP_EN (0x1 << 14) +#define RT5616_3D_BT_MASK (0x1 << 13) +#define RT5616_3D_BT_SFT 13 +#define RT5616_3D_BT_DIS (0x0 << 13) +#define RT5616_3D_BT_EN (0x1 << 13) +#define RT5616_3D_1F_MIX_MASK (0x3 << 11) +#define RT5616_3D_1F_MIX_SFT 11 +#define RT5616_3D_HP_M_MASK (0x1 << 10) +#define RT5616_3D_HP_M_SFT 10 +#define RT5616_3D_HP_M_SUR (0x0 << 10) +#define RT5616_3D_HP_M_FRO (0x1 << 10) +#define RT5616_M_3D_HRTF_MASK (0x1 << 9) +#define RT5616_M_3D_HRTF_SFT 9 +#define RT5616_M_3D_D2H_MASK (0x1 << 8) +#define RT5616_M_3D_D2H_SFT 8 +#define RT5616_M_3D_D2R_MASK (0x1 << 7) +#define RT5616_M_3D_D2R_SFT 7 +#define RT5616_M_3D_REVB_MASK (0x1 << 6) +#define RT5616_M_3D_REVB_SFT 6 + +/* Adjustable high pass filter control 1 (0xd3) */ +#define RT5616_2ND_HPF_MASK (0x1 << 15) +#define RT5616_2ND_HPF_SFT 15 +#define RT5616_2ND_HPF_DIS (0x0 << 15) +#define RT5616_2ND_HPF_EN (0x1 << 15) +#define RT5616_HPF_CF_L_MASK (0x7 << 12) +#define RT5616_HPF_CF_L_SFT 12 +#define RT5616_HPF_CF_R_MASK (0x7 << 8) +#define RT5616_HPF_CF_R_SFT 8 +#define RT5616_ZD_T_MASK (0x3 << 6) +#define RT5616_ZD_T_SFT 6 +#define RT5616_ZD_F_MASK (0x3 << 4) +#define RT5616_ZD_F_SFT 4 +#define RT5616_ZD_F_IM (0x0 << 4) +#define RT5616_ZD_F_ZC_IM (0x1 << 4) +#define RT5616_ZD_F_ZC_IOD (0x2 << 4) +#define RT5616_ZD_F_UN (0x3 << 4) + +/* Adjustable high pass filter control 2 (0xd4) */ +#define RT5616_HPF_CF_L_NUM_MASK (0x3f << 8) +#define RT5616_HPF_CF_L_NUM_SFT 8 +#define RT5616_HPF_CF_R_NUM_MASK (0x3f) +#define RT5616_HPF_CF_R_NUM_SFT 0 + +/* HP calibration control and Amp detection (0xd6) */ +#define RT5616_SI_DAC_MASK (0x1 << 11) +#define RT5616_SI_DAC_SFT 11 +#define RT5616_SI_DAC_AUTO (0x0 << 11) +#define RT5616_SI_DAC_TEST (0x1 << 11) +#define RT5616_DC_CAL_M_MASK (0x1 << 10) +#define RT5616_DC_CAL_M_SFT 10 +#define RT5616_DC_CAL_M_NOR (0x0 << 10) +#define RT5616_DC_CAL_M_CAL (0x1 << 10) +#define RT5616_DC_CAL_MASK (0x1 << 9) +#define RT5616_DC_CAL_SFT 9 +#define RT5616_DC_CAL_DIS (0x0 << 9) +#define RT5616_DC_CAL_EN (0x1 << 9) +#define RT5616_HPD_RCV_MASK (0x7 << 6) +#define RT5616_HPD_RCV_SFT 6 +#define RT5616_HPD_PS_MASK (0x1 << 5) +#define RT5616_HPD_PS_SFT 5 +#define RT5616_HPD_PS_DIS (0x0 << 5) +#define RT5616_HPD_PS_EN (0x1 << 5) +#define RT5616_CAL_M_MASK (0x1 << 4) +#define RT5616_CAL_M_SFT 4 +#define RT5616_CAL_M_DEP (0x0 << 4) +#define RT5616_CAL_M_CAL (0x1 << 4) +#define RT5616_CAL_MASK (0x1 << 3) +#define RT5616_CAL_SFT 3 +#define RT5616_CAL_DIS (0x0 << 3) +#define RT5616_CAL_EN (0x1 << 3) +#define RT5616_CAL_TEST_MASK (0x1 << 2) +#define RT5616_CAL_TEST_SFT 2 +#define RT5616_CAL_TEST_DIS (0x0 << 2) +#define RT5616_CAL_TEST_EN (0x1 << 2) +#define RT5616_CAL_P_MASK (0x3) +#define RT5616_CAL_P_SFT 0 +#define RT5616_CAL_P_NONE (0x0) +#define RT5616_CAL_P_CAL (0x1) +#define RT5616_CAL_P_DAC_CAL (0x2) + +/* Soft volume and zero cross control 1 (0xd9) */ +#define RT5616_SV_MASK (0x1 << 15) +#define RT5616_SV_SFT 15 +#define RT5616_SV_DIS (0x0 << 15) +#define RT5616_SV_EN (0x1 << 15) +#define RT5616_OUT_SV_MASK (0x1 << 13) +#define RT5616_OUT_SV_SFT 13 +#define RT5616_OUT_SV_DIS (0x0 << 13) +#define RT5616_OUT_SV_EN (0x1 << 13) +#define RT5616_HP_SV_MASK (0x1 << 12) +#define RT5616_HP_SV_SFT 12 +#define RT5616_HP_SV_DIS (0x0 << 12) +#define RT5616_HP_SV_EN (0x1 << 12) +#define RT5616_ZCD_DIG_MASK (0x1 << 11) +#define RT5616_ZCD_DIG_SFT 11 +#define RT5616_ZCD_DIG_DIS (0x0 << 11) +#define RT5616_ZCD_DIG_EN (0x1 << 11) +#define RT5616_ZCD_MASK (0x1 << 10) +#define RT5616_ZCD_SFT 10 +#define RT5616_ZCD_PD (0x0 << 10) +#define RT5616_ZCD_PU (0x1 << 10) +#define RT5616_M_ZCD_MASK (0x3f << 4) +#define RT5616_M_ZCD_SFT 4 +#define RT5616_M_ZCD_OM_L (0x1 << 7) +#define RT5616_M_ZCD_OM_R (0x1 << 6) +#define RT5616_M_ZCD_RM_L (0x1 << 5) +#define RT5616_M_ZCD_RM_R (0x1 << 4) +#define RT5616_SV_DLY_MASK (0xf) +#define RT5616_SV_DLY_SFT 0 + +/* Soft volume and zero cross control 2 (0xda) */ +#define RT5616_ZCD_HP_MASK (0x1 << 15) +#define RT5616_ZCD_HP_SFT 15 +#define RT5616_ZCD_HP_DIS (0x0 << 15) +#define RT5616_ZCD_HP_EN (0x1 << 15) + +/* Digital Misc Control (0xfa) */ +#define RT5616_I2S2_MS_SP_MASK (0x1 << 8) +#define RT5616_I2S2_MS_SP_SEL 8 +#define RT5616_I2S2_MS_SP_64 (0x0 << 8) +#define RT5616_I2S2_MS_SP_50 (0x1 << 8) +#define RT5616_CLK_DET_EN (0x1 << 3) +#define RT5616_CLK_DET_EN_SFT 3 +#define RT5616_AMP_DET_EN (0x1 << 1) +#define RT5616_AMP_DET_EN_SFT 1 +#define RT5616_D_GATE_EN (0x1) +#define RT5616_D_GATE_EN_SFT 0 + +/* Codec Private Register definition */ +/* 3D Speaker Control (0x63) */ +#define RT5616_3D_SPK_MASK (0x1 << 15) +#define RT5616_3D_SPK_SFT 15 +#define RT5616_3D_SPK_DIS (0x0 << 15) +#define RT5616_3D_SPK_EN (0x1 << 15) +#define RT5616_3D_SPK_M_MASK (0x3 << 13) +#define RT5616_3D_SPK_M_SFT 13 +#define RT5616_3D_SPK_CG_MASK (0x1f << 8) +#define RT5616_3D_SPK_CG_SFT 8 +#define RT5616_3D_SPK_SG_MASK (0x1f) +#define RT5616_3D_SPK_SG_SFT 0 + +/* Wind Noise Detection Control 1 (0x6c) */ +#define RT5616_WND_MASK (0x1 << 15) +#define RT5616_WND_SFT 15 +#define RT5616_WND_DIS (0x0 << 15) +#define RT5616_WND_EN (0x1 << 15) + +/* Wind Noise Detection Control 2 (0x6d) */ +#define RT5616_WND_FC_NW_MASK (0x3f << 10) +#define RT5616_WND_FC_NW_SFT 10 +#define RT5616_WND_FC_WK_MASK (0x3f << 4) +#define RT5616_WND_FC_WK_SFT 4 + +/* Wind Noise Detection Control 3 (0x6e) */ +#define RT5616_HPF_FC_MASK (0x3f << 6) +#define RT5616_HPF_FC_SFT 6 +#define RT5616_WND_FC_ST_MASK (0x3f) +#define RT5616_WND_FC_ST_SFT 0 + +/* Wind Noise Detection Control 4 (0x6f) */ +#define RT5616_WND_TH_LO_MASK (0x3ff) +#define RT5616_WND_TH_LO_SFT 0 + +/* Wind Noise Detection Control 5 (0x70) */ +#define RT5616_WND_TH_HI_MASK (0x3ff) +#define RT5616_WND_TH_HI_SFT 0 + +/* Wind Noise Detection Control 8 (0x73) */ +#define RT5616_WND_WIND_MASK (0x1 << 13) /* Read-Only */ +#define RT5616_WND_WIND_SFT 13 +#define RT5616_WND_STRONG_MASK (0x1 << 12) /* Read-Only */ +#define RT5616_WND_STRONG_SFT 12 +enum { + RT5616_NO_WIND, + RT5616_BREEZE, + RT5616_STORM, +}; + +/* Dipole Speaker Interface (0x75) */ +#define RT5616_DP_ATT_MASK (0x3 << 14) +#define RT5616_DP_ATT_SFT 14 +#define RT5616_DP_SPK_MASK (0x1 << 10) +#define RT5616_DP_SPK_SFT 10 +#define RT5616_DP_SPK_DIS (0x0 << 10) +#define RT5616_DP_SPK_EN (0x1 << 10) + +/* EQ Pre Volume Control (0xb3) */ +#define RT5616_EQ_PRE_VOL_MASK (0xffff) +#define RT5616_EQ_PRE_VOL_SFT 0 + +/* EQ Post Volume Control (0xb4) */ +#define RT5616_EQ_PST_VOL_MASK (0xffff) +#define RT5616_EQ_PST_VOL_SFT 0 + +/* System Clock Source */ +enum { + RT5616_SCLK_S_MCLK, + RT5616_SCLK_S_PLL1, +}; + +/* PLL1 Source */ +enum { + RT5616_PLL1_S_MCLK, + RT5616_PLL1_S_BCLK1, + RT5616_PLL1_S_BCLK2, +}; + +enum { + RT5616_AIF1, + RT5616_AIFS, +}; + +#endif /* __RT5616_H__ */ -- 1.8.1.1.439.g50a6b54

2 2

[alsa-devel] [PATCH] ALSA: oss: consolidate kmalloc/memset 0 call to kzalloc
by Nicholas Mc Guire 19 Dec '15

19 Dec '15

This is an API consolidation only. The use of kmalloc + memset to 0 is equivalent to kzalloc. Signed-off-by: Nicholas Mc Guire <hofrat(a)osadl.org> --- Found by coccinelle script (relaxed version of scripts/coccinelle/api/alloc/kzalloc-simple.cocci) Patch was compile tested with: x86_64_defconfig CONFIG_SND_PCM_OSS=y Patch is against linux-next (localversion-next is -next-20150518) diff --git a/sound/core/oss/pcm_oss.c b/sound/core/oss/pcm_oss.c index e557dbe..8cdd06f 100644 --- a/sound/core/oss/pcm_oss.c +++ b/sound/core/oss/pcm_oss.c @@ -850,7 +850,7 @@ static int snd_pcm_oss_change_params(struct snd_pcm_substream *substream) if (mutex_lock_interruptible(&runtime->oss.params_lock)) return -EINTR; - sw_params = kmalloc(sizeof(*sw_params), GFP_KERNEL); + sw_params = kmalloc(sizeof(*sw_params), GFP_KERNEL); params = kmalloc(sizeof(*params), GFP_KERNEL); sparams = kmalloc(sizeof(*sparams), GFP_KERNEL); if (!sw_params || !params || !sparams) { @@ -988,7 +988,6 @@ static int snd_pcm_oss_change_params(struct snd_pcm_substream *substream) goto failure; } - memset(sw_params, 0, sizeof(*sw_params)); if (runtime->oss.trigger) { sw_params->start_threshold = 1; } else { -- 1.7.10.4

2 1

[alsa-devel] [PATCH v2 1/4] ASoC: sun4i-codec: Rename codec dapm widgets and routes
by Hans de Goede 18 Dec '15

18 Dec '15

Rename the codec dapm widgets and routes with a _codec prefix. This is a preparation patch for adding card dapm widgets and routes. Signed-off-by: Hans de Goede <hdegoede(a)redhat.com> --- Changes in v2: -New patch in v2 of this patchset --- sound/soc/sunxi/sun4i-codec.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/sound/soc/sunxi/sun4i-codec.c b/sound/soc/sunxi/sun4i-codec.c index 7a3fe1d..519ccb3 100644 --- a/sound/soc/sunxi/sun4i-codec.c +++ b/sound/soc/sunxi/sun4i-codec.c @@ -532,7 +532,7 @@ static const struct snd_kcontrol_new sun4i_codec_pa_mixer_controls[] = { SUN4I_CODEC_DAC_ACTL_MIXPAS, 1, 0), }; -static const struct snd_soc_dapm_widget sun4i_codec_dapm_widgets[] = { +static const struct snd_soc_dapm_widget sun4i_codec_codec_dapm_widgets[] = { /* Digital parts of the ADCs */ SND_SOC_DAPM_SUPPLY("ADC", SUN4I_CODEC_ADC_FIFOC, SUN4I_CODEC_ADC_FIFOC_EN_AD, 0, @@ -589,7 +589,7 @@ static const struct snd_soc_dapm_widget sun4i_codec_dapm_widgets[] = { SND_SOC_DAPM_OUTPUT("HP Left"), }; -static const struct snd_soc_dapm_route sun4i_codec_dapm_routes[] = { +static const struct snd_soc_dapm_route sun4i_codec_codec_dapm_routes[] = { /* Left ADC / DAC Routes */ { "Left ADC", NULL, "ADC" }, { "Left DAC", NULL, "DAC" }, @@ -628,10 +628,10 @@ static const struct snd_soc_dapm_route sun4i_codec_dapm_routes[] = { static struct snd_soc_codec_driver sun4i_codec_codec = { .controls = sun4i_codec_widgets, .num_controls = ARRAY_SIZE(sun4i_codec_widgets), - .dapm_widgets = sun4i_codec_dapm_widgets, - .num_dapm_widgets = ARRAY_SIZE(sun4i_codec_dapm_widgets), - .dapm_routes = sun4i_codec_dapm_routes, - .num_dapm_routes = ARRAY_SIZE(sun4i_codec_dapm_routes), + .dapm_widgets = sun4i_codec_codec_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(sun4i_codec_codec_dapm_widgets), + .dapm_routes = sun4i_codec_codec_dapm_routes, + .num_dapm_routes = ARRAY_SIZE(sun4i_codec_codec_dapm_routes), }; static const struct snd_soc_component_driver sun4i_codec_component = { -- 2.5.0

4 12

[alsa-devel] [PATCH] ALSA: consolidate allocation API
by Nicholas Mc Guire 18 Dec '15

18 Dec '15

This is an API consolidation only. The use of kmalloc + memset to 0 is equivalent to kzalloc. Signed-off-by: Nicholas Mc Guire <hofrat(a)osadl.org> --- Found by coccinelle script (relaxed version of scripts/coccinelle/api/alloc/kzalloc-simple.cocci) Patch was compile tested with: x86_64_defconfig CONFIG_SND_SEQUENCER=y, CONFIG_SND_SEQUENCER_OSS=y Patch is against linux-next (localversion-next is -next-20150518) sound/core/seq/oss/seq_oss_init.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/sound/core/seq/oss/seq_oss_init.c b/sound/core/seq/oss/seq_oss_init.c index b1221b2..9babc9e 100644 --- a/sound/core/seq/oss/seq_oss_init.c +++ b/sound/core/seq/oss/seq_oss_init.c @@ -79,7 +79,7 @@ snd_seq_oss_create_client(void) struct snd_seq_port_info *port; struct snd_seq_port_callback port_callback; - port = kmalloc(sizeof(*port), GFP_KERNEL); + port = kzalloc(sizeof(*port), GFP_KERNEL); if (!port) { rc = -ENOMEM; goto __error; @@ -94,7 +94,6 @@ snd_seq_oss_create_client(void) system_client = rc; /* create annoucement receiver port */ - memset(port, 0, sizeof(*port)); strcpy(port->name, "Receiver"); port->addr.client = system_client; port->capability = SNDRV_SEQ_PORT_CAP_WRITE; /* receive only */ -- 1.7.10.4

1 0

[alsa-devel] [PATCH v3] ASoC: fsl_sai: fix no frame clk in master mode
by Zidan Wang 18 Dec '15

18 Dec '15

After several open/close sai test with ctrl+c, there will be I/O error. The SAI can't work anymore, can't recover. There will be no frame clock. With adding the software reset in trigger stop, the issue can be fixed. This is a hardware bug/errata and reset is the only option. According to the reference manual, the software reset doesn't reset any control register but only internal hardware logics such as bit clock generator, status flags, and FIFO pointers. (Our purpose is just to reset the clock generator while the software reset is the only way to do that.) Since slave mode doesn't use the clock generator, only apply the reset procedure to the master mode. For asynchronous mode, TX will not be reset when RX is still running. In this case, i can't reproduce this issue. Signed-off-by: Zidan Wang <zidan.wang(a)freescale.com> Acked-by: Nicolin Chen <nicoleotsuka(a)gmail.com> --- v1->v2: 1) refine the commit log and comments 2) Since slave mode doesn't use the clock generator, only apply the reset procedure to the master mode. v2->v3: add a simple comment in code to describe the hardware bug. sound/soc/fsl/fsl_sai.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c index 8832901..fef264d 100644 --- a/sound/soc/fsl/fsl_sai.c +++ b/sound/soc/fsl/fsl_sai.c @@ -564,6 +564,24 @@ static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd, FSL_SAI_CSR_FR, FSL_SAI_CSR_FR); regmap_update_bits(sai->regmap, FSL_SAI_RCSR, FSL_SAI_CSR_FR, FSL_SAI_CSR_FR); + + /* + * For sai master mode, after several open/close sai, + * there will be no frame clock, and can't recover + * anymore. Add software reset to fix this issue. + * This is a hardware bug, and will be fix in the + * next sai version. + */ + if (!sai->is_slave_mode) { + /* Software Reset for both Tx and Rx */ + regmap_write(sai->regmap, + FSL_SAI_TCSR, FSL_SAI_CSR_SR); + regmap_write(sai->regmap, + FSL_SAI_RCSR, FSL_SAI_CSR_SR); + /* Clear SR bit to finish the reset */ + regmap_write(sai->regmap, FSL_SAI_TCSR, 0); + regmap_write(sai->regmap, FSL_SAI_RCSR, 0); + } } break; default: -- 1.9.1

2 1

[alsa-devel] [PATCH] ASoC: wm_adsp: Mimic legacy behaviour of reading controls when DSP is on
by Charles Keepax 18 Dec '15

18 Dec '15

Older firmwares don't specify access flags for the controls, unfortunately the usage of some of these firmware relies on being able to read back values from the DSP. The current control code will only do this for volatile controls. This patch will read the control from the hardware if no flags are specified and the control is currently enabled, which should cover these legacy use-cases. Signed-off-by: Charles Keepax <ckeepax(a)opensource.wolfsonmicro.com> --- sound/soc/codecs/wm_adsp.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index b083642..d1e0826 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -666,6 +666,9 @@ static int wm_coeff_get(struct snd_kcontrol *kctl, else ret = -EPERM; } else { + if (!ctl->flags && ctl->enabled) + ret = wm_coeff_read_control(ctl, ctl->cache, ctl->len); + memcpy(p, ctl->cache, ctl->len); } -- 2.1.4

2 1

[alsa-devel] [PATCH] ASoC: sgtl5000: fix VAG power up timing
by Jean-Michel Hautbois 18 Dec '15

18 Dec '15

When power up, a "pop" is heard on line-in and mic-in. An analysis of the PCM shows it lasts ~400ms and looks like a filter response. VAG power up should be delayed by 400ms as VAG power down is. Signed-off-by: Jean-Michel Hautbois <jean-michel.hautbois(a)veo-labs.com> --- sound/soc/codecs/sgtl5000.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/soc/codecs/sgtl5000.c b/sound/soc/codecs/sgtl5000.c index f540f82..08b4046 100644 --- a/sound/soc/codecs/sgtl5000.c +++ b/sound/soc/codecs/sgtl5000.c @@ -189,6 +189,7 @@ static int power_vag_event(struct snd_soc_dapm_widget *w, case SND_SOC_DAPM_POST_PMU: snd_soc_update_bits(codec, SGTL5000_CHIP_ANA_POWER, SGTL5000_VAG_POWERUP, SGTL5000_VAG_POWERUP); + msleep(400); break; case SND_SOC_DAPM_PRE_PMD: -- 2.6.4

2 1

[alsa-devel] [PATCH] ASoC: rsrc-card: enable to use tdm_slot on DT
by Kuninori Morimoto 18 Dec '15

18 Dec '15

From: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com> Renesas sound driver will use tdm slot on TDM Multi Mode support. This patch enables tdm slot on rsrc card driver on DT. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com> --- sound/soc/sh/rcar/rsrc-card.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/sound/soc/sh/rcar/rsrc-card.c b/sound/soc/sh/rcar/rsrc-card.c index a3ec13f..3c308e2 100644 --- a/sound/soc/sh/rcar/rsrc-card.c +++ b/sound/soc/sh/rcar/rsrc-card.c @@ -50,6 +50,10 @@ MODULE_DEVICE_TABLE(of, rsrc_card_of_match); struct rsrc_card_dai { unsigned int fmt; unsigned int sysclk; + unsigned int tx_slot_mask; + unsigned int rx_slot_mask; + int slots; + int slot_width; struct clk *clk; char dai_name[DAI_NAME_NUM]; }; @@ -126,6 +130,18 @@ static int rsrc_card_dai_init(struct snd_soc_pcm_runtime *rtd) } } + if (dai_props->slots) { + ret = snd_soc_dai_set_tdm_slot(dai, + dai_props->tx_slot_mask, + dai_props->rx_slot_mask, + dai_props->slots, + dai_props->slot_width); + if (ret && ret != -ENOTSUPP) { + dev_err(dai->dev, "set_tdm_slot error\n"); + goto err; + } + } + ret = 0; err: @@ -198,6 +214,15 @@ static int rsrc_card_parse_links(struct device_node *np, if (ret) return ret; + /* Parse TDM slot */ + ret = snd_soc_of_parse_tdm_slot(np, + &dai_props->tx_slot_mask, + &dai_props->rx_slot_mask, + &dai_props->slots, + &dai_props->slot_width); + if (ret) + return ret; + if (is_fe) { /* BE is dummy */ dai_link->codec_of_node = NULL; -- 1.9.1

2 1

[alsa-devel] [PATCH] ASoC: rsrc-card: Remove support for setting differing DAI formats
by Kuninori Morimoto 18 Dec '15

18 Dec '15

From: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com> 1efb53a220 ("ASoC: simple-card: Remove support for setting differing DAI formats") removed set_fmt support from simple-card. rsrc-card follows same style, because it is based on simple-card. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com> --- sound/soc/sh/rcar/rsrc-card.c | 16 ++++------------ 1 file changed, 4 insertions(+), 12 deletions(-) diff --git a/sound/soc/sh/rcar/rsrc-card.c b/sound/soc/sh/rcar/rsrc-card.c index 3c308e2..9f522ba 100644 --- a/sound/soc/sh/rcar/rsrc-card.c +++ b/sound/soc/sh/rcar/rsrc-card.c @@ -48,7 +48,6 @@ MODULE_DEVICE_TABLE(of, rsrc_card_of_match); #define DAI_NAME_NUM 32 struct rsrc_card_dai { - unsigned int fmt; unsigned int sysclk; unsigned int tx_slot_mask; unsigned int rx_slot_mask; @@ -114,14 +113,6 @@ static int rsrc_card_dai_init(struct snd_soc_pcm_runtime *rtd) rtd->cpu_dai : rtd->codec_dai; - if (dai_props->fmt) { - ret = snd_soc_dai_set_fmt(dai, dai_props->fmt); - if (ret && ret != -ENOTSUPP) { - dev_err(dai->dev, "set_fmt error\n"); - goto err; - } - } - if (dai_props->sysclk) { ret = snd_soc_dai_set_sysclk(dai, 0, dai_props->sysclk, 0); if (ret && ret != -ENOTSUPP) { @@ -168,7 +159,7 @@ static int rsrc_card_parse_daifmt(struct device_node *node, struct rsrc_card_priv *priv, int idx, bool is_fe) { - struct rsrc_card_dai *dai_props = rsrc_priv_to_props(priv, idx); + struct snd_soc_dai_link *dai_link = rsrc_priv_to_link(priv, idx); struct device_node *bitclkmaster = NULL; struct device_node *framemaster = NULL; struct device_node *codec = is_fe ? NULL : np; @@ -188,7 +179,7 @@ static int rsrc_card_parse_daifmt(struct device_node *node, daifmt |= (codec == framemaster) ? SND_SOC_DAIFMT_CBS_CFM : SND_SOC_DAIFMT_CBS_CFS; - dai_props->fmt = daifmt; + dai_link->dai_fmt = daifmt; of_node_put(bitclkmaster); of_node_put(framemaster); @@ -340,6 +331,7 @@ static int rsrc_card_dai_link_of(struct device_node *node, int idx) { struct device *dev = rsrc_priv_to_dev(priv); + struct snd_soc_dai_link *dai_link = rsrc_priv_to_link(priv, idx); struct rsrc_card_dai *dai_props = rsrc_priv_to_props(priv, idx); bool is_fe = false; int ret; @@ -361,7 +353,7 @@ static int rsrc_card_dai_link_of(struct device_node *node, dev_dbg(dev, "\t%s / %04x / %d\n", dai_props->dai_name, - dai_props->fmt, + dai_link->dai_fmt, dai_props->sysclk); return ret; -- 1.9.1

2 1

[alsa-devel] [PATCH] ASoC: rsrc-card: tidyup dai format for DPCM
by Kuninori Morimoto 18 Dec '15

18 Dec '15

From: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com> rsrc-card is DPCM supported version of simple-card. Thus it has similar DT format. OTOH, snd_soc_dai_link requests cpu/codec, but one of them will be snd-soc-dummy in DPCM case, and DPCM requests frontend/backend dai_link. This means it might have multi backend/codec. And, SND_SOC_DAIFMT_xxx is based on "codec". Because of these difference, current rsrc card can't detect correct dai_fmt. This patch detect correct dai fmt from 1st "codec". Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com> --- sound/soc/sh/rcar/rsrc-card.c | 82 +++++++++++++++++++++++++++++-------------- 1 file changed, 55 insertions(+), 27 deletions(-) diff --git a/sound/soc/sh/rcar/rsrc-card.c b/sound/soc/sh/rcar/rsrc-card.c index 9f522ba..5fe0b51 100644 --- a/sound/soc/sh/rcar/rsrc-card.c +++ b/sound/soc/sh/rcar/rsrc-card.c @@ -155,14 +155,13 @@ static int rsrc_card_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, } static int rsrc_card_parse_daifmt(struct device_node *node, - struct device_node *np, + struct device_node *codec, struct rsrc_card_priv *priv, - int idx, bool is_fe) + struct snd_soc_dai_link *dai_link, + unsigned int *retfmt) { - struct snd_soc_dai_link *dai_link = rsrc_priv_to_link(priv, idx); struct device_node *bitclkmaster = NULL; struct device_node *framemaster = NULL; - struct device_node *codec = is_fe ? NULL : np; unsigned int daifmt; daifmt = snd_soc_of_parse_daifmt(node, NULL, @@ -179,11 +178,11 @@ static int rsrc_card_parse_daifmt(struct device_node *node, daifmt |= (codec == framemaster) ? SND_SOC_DAIFMT_CBS_CFM : SND_SOC_DAIFMT_CBS_CFS; - dai_link->dai_fmt = daifmt; - of_node_put(bitclkmaster); of_node_put(framemaster); + *retfmt = daifmt; + return 0; } @@ -325,24 +324,16 @@ static int rsrc_card_parse_clk(struct device_node *np, return 0; } -static int rsrc_card_dai_link_of(struct device_node *node, - struct device_node *np, - struct rsrc_card_priv *priv, - int idx) +static int rsrc_card_dai_sub_link_of(struct device_node *node, + struct device_node *np, + struct rsrc_card_priv *priv, + int idx, bool is_fe) { struct device *dev = rsrc_priv_to_dev(priv); struct snd_soc_dai_link *dai_link = rsrc_priv_to_link(priv, idx); struct rsrc_card_dai *dai_props = rsrc_priv_to_props(priv, idx); - bool is_fe = false; int ret; - if (0 == strcmp(np->name, "cpu")) - is_fe = true; - - ret = rsrc_card_parse_daifmt(node, np, priv, idx, is_fe); - if (ret < 0) - return ret; - ret = rsrc_card_parse_links(np, priv, idx, is_fe); if (ret < 0) return ret; @@ -359,6 +350,48 @@ static int rsrc_card_dai_link_of(struct device_node *node, return ret; } +static int rsrc_card_dai_link_of(struct device_node *node, + struct rsrc_card_priv *priv) +{ + struct snd_soc_dai_link *dai_link; + struct device_node *np; + unsigned int daifmt = 0; + int ret, i; + bool is_fe; + + /* find 1st codec */ + i = 0; + for_each_child_of_node(node, np) { + dai_link = rsrc_priv_to_link(priv, i); + + if (strcmp(np->name, "codec") == 0) { + ret = rsrc_card_parse_daifmt(node, np, priv, + dai_link, &daifmt); + if (ret < 0) + return ret; + break; + } + i++; + } + + i = 0; + for_each_child_of_node(node, np) { + dai_link = rsrc_priv_to_link(priv, i); + dai_link->dai_fmt = daifmt; + + is_fe = false; + if (strcmp(np->name, "cpu") == 0) + is_fe = true; + + ret = rsrc_card_dai_sub_link_of(node, np, priv, i, is_fe); + if (ret < 0) + return ret; + i++; + } + + return 0; +} + static int rsrc_card_parse_of(struct device_node *node, struct rsrc_card_priv *priv, struct device *dev) @@ -366,9 +399,8 @@ static int rsrc_card_parse_of(struct device_node *node, const struct rsrc_card_of_data *of_data = rsrc_dev_to_of_data(dev); struct rsrc_card_dai *props; struct snd_soc_dai_link *links; - struct device_node *np; int ret; - int i, num; + int num; if (!node) return -EINVAL; @@ -409,13 +441,9 @@ static int rsrc_card_parse_of(struct device_node *node, priv->snd_card.name ? priv->snd_card.name : "", priv->convert_rate); - i = 0; - for_each_child_of_node(node, np) { - ret = rsrc_card_dai_link_of(node, np, priv, i); - if (ret < 0) - return ret; - i++; - } + ret = rsrc_card_dai_link_of(node, priv); + if (ret < 0) + return ret; if (!priv->snd_card.name) priv->snd_card.name = priv->snd_card.dai_link->name; -- 1.9.1

2 1

[alsa-devel] [PATCH v2 1/2] ASoC: atmel-pdmic: add the Pulse Density Modulation Interface Controller
by Songjun Wu 18 Dec '15

18 Dec '15

Add driver for the Pulse Density Modulation Interface Controller. It comes with digitallly controlled gain, a High-Pass and a SINCC filter. Signed-off-by: Songjun Wu <songjun.wu(a)atmel.com> --- Changes in v2: - Remove the function 'atmel_pdmic_codec_get_remap', since the regmap is initialized in the core. - Replace 'if' with 'switch' in function 'atmel_pdmic_codec_dai_hw_params'. - Fix the coding style issue in function 'atmel_pdmic_dt_init', 'atmel_pdmic_interrupt','pdmic_put_mic_volsw', 'atmel_pdmic_codec_probe', 'pdmic_get_mic_volsw' and 'atmel_pdmic_codec_dai_hw_params'. sound/soc/atmel/Kconfig | 9 + sound/soc/atmel/Makefile | 2 + sound/soc/atmel/atmel-pdmic.c | 738 +++++++++++++++++++++++++++++++++++++++++ sound/soc/atmel/atmel-pdmic.h | 80 +++++ 4 files changed, 829 insertions(+) create mode 100644 sound/soc/atmel/atmel-pdmic.c create mode 100644 sound/soc/atmel/atmel-pdmic.h diff --git a/sound/soc/atmel/Kconfig b/sound/soc/atmel/Kconfig index 2d30464..06e099e 100644 --- a/sound/soc/atmel/Kconfig +++ b/sound/soc/atmel/Kconfig @@ -68,4 +68,13 @@ config SND_ATMEL_SOC_CLASSD help Say Y if you want to add support for Atmel ASoC driver for boards using CLASSD. + +config SND_ATMEL_SOC_PDMIC + tristate "Atmel ASoC driver for boards using PDMIC" + depends on OF && (ARCH_AT91 || COMPILE_TEST) + select SND_SOC_GENERIC_DMAENGINE_PCM + select REGMAP_MMIO + help + Say Y if you want to add support for Atmel ASoC driver for boards using + PDMIC. endif diff --git a/sound/soc/atmel/Makefile b/sound/soc/atmel/Makefile index f6f7db4..a2b127b 100644 --- a/sound/soc/atmel/Makefile +++ b/sound/soc/atmel/Makefile @@ -12,8 +12,10 @@ snd-soc-sam9g20-wm8731-objs := sam9g20_wm8731.o snd-atmel-soc-wm8904-objs := atmel_wm8904.o snd-soc-sam9x5-wm8731-objs := sam9x5_wm8731.o snd-atmel-soc-classd-objs := atmel-classd.o +snd-atmel-soc-pdmic-objs := atmel-pdmic.o obj-$(CONFIG_SND_AT91_SOC_SAM9G20_WM8731) += snd-soc-sam9g20-wm8731.o obj-$(CONFIG_SND_ATMEL_SOC_WM8904) += snd-atmel-soc-wm8904.o obj-$(CONFIG_SND_AT91_SOC_SAM9X5_WM8731) += snd-soc-sam9x5-wm8731.o obj-$(CONFIG_SND_ATMEL_SOC_CLASSD) += snd-atmel-soc-classd.o +obj-$(CONFIG_SND_ATMEL_SOC_PDMIC) += snd-atmel-soc-pdmic.o diff --git a/sound/soc/atmel/atmel-pdmic.c b/sound/soc/atmel/atmel-pdmic.c new file mode 100644 index 0000000..aee4787 --- /dev/null +++ b/sound/soc/atmel/atmel-pdmic.c @@ -0,0 +1,738 @@ +/* Atmel PDMIC driver + * + * Copyright (C) 2015 Atmel + * + * Author: Songjun Wu <songjun.wu(a)atmel.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 or later + * as published by the Free Software Foundation. + */ + +#include <linux/of.h> +#include <linux/clk.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> +#include <sound/core.h> +#include <sound/dmaengine_pcm.h> +#include <sound/pcm_params.h> +#include <sound/tlv.h> +#include "atmel-pdmic.h" + +struct atmel_pdmic_pdata { + u32 mic_min_freq; + u32 mic_max_freq; + s32 mic_offset; + const char *card_name; +}; + +struct atmel_pdmic { + dma_addr_t phy_base; + struct regmap *regmap; + struct clk *pclk; + struct clk *gclk; + int irq; + struct snd_pcm_substream *substream; + const struct atmel_pdmic_pdata *pdata; +}; + +static const struct of_device_id atmel_pdmic_of_match[] = { + { + .compatible = "atmel,sama5d2-pdmic", + }, { + /* sentinel */ + } +}; +MODULE_DEVICE_TABLE(of, atmel_pdmic_of_match); + +#define PDMIC_OFFSET_MAX_VAL S16_MAX +#define PDMIC_OFFSET_MIN_VAL S16_MIN + +static struct atmel_pdmic_pdata *atmel_pdmic_dt_init(struct device *dev) +{ + struct device_node *np = dev->of_node; + struct atmel_pdmic_pdata *pdata; + + if (!np) { + dev_err(dev, "device node not found\n"); + return ERR_PTR(-EINVAL); + } + + pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); + if (!pdata) + return ERR_PTR(-ENOMEM); + + if (of_property_read_string(np, "atmel,model", &pdata->card_name)) + pdata->card_name = "PDMIC"; + + if (of_property_read_u32(np, "atmel,mic-min-freq", + &pdata->mic_min_freq)) { + dev_err(dev, "failed to get mic-min-freq\n"); + return ERR_PTR(-EINVAL); + } + + if (of_property_read_u32(np, "atmel,mic-max-freq", + &pdata->mic_max_freq)) { + dev_err(dev, "failed to get mic-max-freq\n"); + return ERR_PTR(-EINVAL); + } + + if (pdata->mic_max_freq < pdata->mic_min_freq) { + dev_err(dev, + "mic-max-freq should not less than mic-min-freq\n"); + return ERR_PTR(-EINVAL); + } + + if (of_property_read_s32(np, "atmel,mic-offset", &pdata->mic_offset)) + pdata->mic_offset = 0; + + if (pdata->mic_offset > PDMIC_OFFSET_MAX_VAL) { + dev_warn(dev, + "mic-offset value %d is larger than the max value %d, the max value is specified\n", + pdata->mic_offset, PDMIC_OFFSET_MAX_VAL); + pdata->mic_offset = PDMIC_OFFSET_MAX_VAL; + } else if (pdata->mic_offset < PDMIC_OFFSET_MIN_VAL) { + dev_warn(dev, + "mic-offset value %d is less than the min value %d, the min value is specified\n", + pdata->mic_offset, PDMIC_OFFSET_MIN_VAL); + pdata->mic_offset = PDMIC_OFFSET_MIN_VAL; + } + + return pdata; +} + +/* cpu dai component */ +static int atmel_pdmic_cpu_dai_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *cpu_dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct atmel_pdmic *dd = snd_soc_card_get_drvdata(rtd->card); + int ret; + + ret = clk_prepare_enable(dd->gclk); + if (ret) + return ret; + + ret = clk_prepare_enable(dd->pclk); + if (ret) + return ret; + + /* Clear all bits in the Control Register(PDMIC_CR) */ + regmap_write(dd->regmap, PDMIC_CR, 0); + + dd->substream = substream; + + /* Enable the overrun error interrupt */ + regmap_write(dd->regmap, PDMIC_IER, PDMIC_IER_OVRE); + + return 0; +} + +static void atmel_pdmic_cpu_dai_shutdown(struct snd_pcm_substream *substream, + struct snd_soc_dai *cpu_dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct atmel_pdmic *dd = snd_soc_card_get_drvdata(rtd->card); + + /* Disable the overrun error interrupt */ + regmap_write(dd->regmap, PDMIC_IDR, PDMIC_IDR_OVRE); + + clk_disable_unprepare(dd->gclk); + clk_disable_unprepare(dd->pclk); +} + +static int atmel_pdmic_cpu_dai_prepare(struct snd_pcm_substream *substream, + struct snd_soc_dai *cpu_dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct atmel_pdmic *dd = snd_soc_card_get_drvdata(rtd->card); + u32 val; + + /* Clean the PDMIC Converted Data Register */ + return regmap_read(dd->regmap, PDMIC_CDR, &val); +} + +static const struct snd_soc_dai_ops atmel_pdmic_cpu_dai_ops = { + .startup = atmel_pdmic_cpu_dai_startup, + .shutdown = atmel_pdmic_cpu_dai_shutdown, + .prepare = atmel_pdmic_cpu_dai_prepare, +}; + +#define ATMEL_PDMIC_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE) + +static struct snd_soc_dai_driver atmel_pdmic_cpu_dai = { + .capture = { + .channels_min = 1, + .channels_max = 1, + .rates = SNDRV_PCM_RATE_KNOT, + .formats = ATMEL_PDMIC_FORMATS,}, + .ops = &atmel_pdmic_cpu_dai_ops, +}; + +static const struct snd_soc_component_driver atmel_pdmic_cpu_dai_component = { + .name = "atmel-pdmic", +}; + +/* platform */ +#define ATMEL_PDMIC_MAX_BUF_SIZE (64 * 1024) +#define ATMEL_PDMIC_PREALLOC_BUF_SIZE ATMEL_PDMIC_MAX_BUF_SIZE + +static const struct snd_pcm_hardware atmel_pdmic_hw = { + .info = SNDRV_PCM_INFO_MMAP + | SNDRV_PCM_INFO_MMAP_VALID + | SNDRV_PCM_INFO_INTERLEAVED + | SNDRV_PCM_INFO_RESUME + | SNDRV_PCM_INFO_PAUSE, + .formats = ATMEL_PDMIC_FORMATS, + .buffer_bytes_max = ATMEL_PDMIC_MAX_BUF_SIZE, + .period_bytes_min = 256, + .period_bytes_max = 32 * 1024, + .periods_min = 2, + .periods_max = 256, +}; + +static int +atmel_pdmic_platform_configure_dma(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct dma_slave_config *slave_config) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct atmel_pdmic *dd = snd_soc_card_get_drvdata(rtd->card); + int ret; + + ret = snd_hwparams_to_dma_slave_config(substream, params, + slave_config); + if (ret) { + dev_err(rtd->platform->dev, + "hw params to dma slave configure failed\n"); + return ret; + } + + slave_config->src_addr = dd->phy_base + PDMIC_CDR; + slave_config->src_maxburst = 1; + slave_config->dst_maxburst = 1; + + return 0; +} + +static const struct snd_dmaengine_pcm_config +atmel_pdmic_dmaengine_pcm_config = { + .prepare_slave_config = atmel_pdmic_platform_configure_dma, + .pcm_hardware = &atmel_pdmic_hw, + .prealloc_buffer_size = ATMEL_PDMIC_PREALLOC_BUF_SIZE, +}; + +/* codec */ +/* Mic Gain = dgain * 2^(-scale) */ +struct mic_gain { + unsigned int dgain; + unsigned int scale; +}; + +/* range from -90 dB to 90 dB */ +static const struct mic_gain mic_gain_table[] = { +{ 1, 15}, { 1, 14}, /* -90, -84 dB */ +{ 3, 15}, { 1, 13}, { 3, 14}, { 1, 12}, /* -81, -78, -75, -72 dB */ +{ 5, 14}, { 13, 15}, /* -70, -68 dB */ +{ 9, 14}, { 21, 15}, { 23, 15}, { 13, 14}, /* -65 ~ -62 dB */ +{ 29, 15}, { 33, 15}, { 37, 15}, { 41, 15}, /* -61 ~ -58 dB */ +{ 23, 14}, { 13, 13}, { 58, 15}, { 65, 15}, /* -57 ~ -54 dB */ +{ 73, 15}, { 41, 14}, { 23, 13}, { 13, 12}, /* -53 ~ -50 dB */ +{ 29, 13}, { 65, 14}, { 73, 14}, { 41, 13}, /* -49 ~ -46 dB */ +{ 23, 12}, { 207, 15}, { 29, 12}, { 65, 13}, /* -45 ~ -42 dB */ +{ 73, 13}, { 41, 12}, { 23, 11}, { 413, 15}, /* -41 ~ -38 dB */ +{ 463, 15}, { 519, 15}, { 583, 15}, { 327, 14}, /* -37 ~ -34 dB */ +{ 367, 14}, { 823, 15}, { 231, 13}, { 1036, 15}, /* -33 ~ -30 dB */ +{ 1163, 15}, { 1305, 15}, { 183, 12}, { 1642, 15}, /* -29 ~ -26 dB */ +{ 1843, 15}, { 2068, 15}, { 145, 11}, { 2603, 15}, /* -25 ~ -22 dB */ +{ 365, 12}, { 3277, 15}, { 3677, 15}, { 4125, 15}, /* -21 ~ -18 dB */ +{ 4629, 15}, { 5193, 15}, { 5827, 15}, { 3269, 14}, /* -17 ~ -14 dB */ +{ 917, 12}, { 8231, 15}, { 9235, 15}, { 5181, 14}, /* -13 ~ -10 dB */ +{11627, 15}, {13045, 15}, {14637, 15}, {16423, 15}, /* -9 ~ -6 dB */ +{18427, 15}, {20675, 15}, { 5799, 13}, {26029, 15}, /* -5 ~ -2 dB */ +{ 7301, 13}, { 1, 0}, {18383, 14}, {10313, 13}, /* -1 ~ 2 dB */ +{23143, 14}, {25967, 14}, {29135, 14}, {16345, 13}, /* 3 ~ 6 dB */ +{ 4585, 11}, {20577, 13}, { 1443, 9}, {25905, 13}, /* 7 ~ 10 dB */ +{14533, 12}, { 8153, 11}, { 2287, 9}, {20529, 12}, /* 11 ~ 14 dB */ +{11517, 11}, { 6461, 10}, {28997, 12}, { 4067, 9}, /* 15 ~ 18 dB */ +{18253, 11}, { 10, 0}, {22979, 11}, {25783, 11}, /* 19 ~ 22 dB */ +{28929, 11}, {32459, 11}, { 9105, 9}, {20431, 10}, /* 23 ~ 26 dB */ +{22925, 10}, {12861, 9}, { 7215, 8}, {16191, 9}, /* 27 ~ 30 dB */ +{ 9083, 8}, {20383, 9}, {11435, 8}, { 6145, 7}, /* 31 ~ 34 dB */ +{ 3599, 6}, {32305, 9}, {18123, 8}, {20335, 8}, /* 35 ~ 38 dB */ +{ 713, 3}, { 100, 0}, { 7181, 6}, { 8057, 6}, /* 39 ~ 42 dB */ +{ 565, 2}, {20287, 7}, {11381, 6}, {25539, 7}, /* 43 ~ 46 dB */ +{ 1791, 3}, { 4019, 4}, { 9019, 5}, {20239, 6}, /* 47 ~ 50 dB */ +{ 5677, 4}, {25479, 6}, { 7147, 4}, { 8019, 4}, /* 51 ~ 54 dB */ +{17995, 5}, {20191, 5}, {11327, 4}, {12709, 4}, /* 55 ~ 58 dB */ +{ 3565, 2}, { 1000, 0}, { 1122, 0}, { 1259, 0}, /* 59 ~ 62 dB */ +{ 2825, 1}, {12679, 3}, { 7113, 2}, { 7981, 2}, /* 63 ~ 66 dB */ +{ 8955, 2}, {20095, 3}, {22547, 3}, {12649, 2}, /* 67 ~ 70 dB */ +{28385, 3}, { 3981, 0}, {17867, 2}, {20047, 2}, /* 71 ~ 74 dB */ +{11247, 1}, {12619, 1}, {14159, 1}, {31773, 2}, /* 75 ~ 78 dB */ +{17825, 1}, {10000, 0}, {11220, 0}, {12589, 0}, /* 79 ~ 82 dB */ +{28251, 1}, {15849, 0}, {17783, 0}, {19953, 0}, /* 83 ~ 86 dB */ +{22387, 0}, {25119, 0}, {28184, 0}, {31623, 0}, /* 87 ~ 90 dB */ +}; + +static const DECLARE_TLV_DB_RANGE(mic_gain_tlv, + 0, 1, TLV_DB_SCALE_ITEM(-9000, 600, 0), + 2, 5, TLV_DB_SCALE_ITEM(-8100, 300, 0), + 6, 7, TLV_DB_SCALE_ITEM(-7000, 200, 0), + 8, ARRAY_SIZE(mic_gain_table)-1, TLV_DB_SCALE_ITEM(-6500, 100, 0), +); + +int pdmic_get_mic_volsw(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); + unsigned int dgain_val, scale_val; + int i; + + dgain_val = (snd_soc_read(codec, PDMIC_DSPR1) & PDMIC_DSPR1_DGAIN_MASK) + >> PDMIC_DSPR1_DGAIN_SHIFT; + + scale_val = (snd_soc_read(codec, PDMIC_DSPR0) & PDMIC_DSPR0_SCALE_MASK) + >> PDMIC_DSPR0_SCALE_SHIFT; + + for (i = 0; i < ARRAY_SIZE(mic_gain_table); i++) { + if ((mic_gain_table[i].dgain == dgain_val) && + (mic_gain_table[i].scale == scale_val)) + ucontrol->value.integer.value[0] = i; + } + + return 0; +} + +static int pdmic_put_mic_volsw(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct soc_mixer_control *mc = + (struct soc_mixer_control *)kcontrol->private_value; + struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); + int max = mc->max; + unsigned int val; + int ret; + + val = ucontrol->value.integer.value[0]; + + if (val > max) + return -EINVAL; + + ret = snd_soc_update_bits(codec, PDMIC_DSPR1, PDMIC_DSPR1_DGAIN_MASK, + mic_gain_table[val].dgain << PDMIC_DSPR1_DGAIN_SHIFT); + if (ret < 0) + return ret; + + ret = snd_soc_update_bits(codec, PDMIC_DSPR0, PDMIC_DSPR0_SCALE_MASK, + mic_gain_table[val].scale << PDMIC_DSPR0_SCALE_SHIFT); + if (ret < 0) + return ret; + + return 0; +} + +static const struct snd_kcontrol_new atmel_pdmic_snd_controls[] = { +SOC_SINGLE_EXT_TLV("Mic Capture Volume", PDMIC_DSPR1, PDMIC_DSPR1_DGAIN_SHIFT, + ARRAY_SIZE(mic_gain_table)-1, 0, + pdmic_get_mic_volsw, pdmic_put_mic_volsw, mic_gain_tlv), + +SOC_SINGLE("High Pass Filter Switch", PDMIC_DSPR0, + PDMIC_DSPR0_HPFBYP_SHIFT, 1, 1), + +SOC_SINGLE("SINCC Filter Switch", PDMIC_DSPR0, PDMIC_DSPR0_SINBYP_SHIFT, 1, 1), +}; + +static int atmel_pdmic_codec_probe(struct snd_soc_codec *codec) +{ + struct snd_soc_card *card = snd_soc_codec_get_drvdata(codec); + struct atmel_pdmic *dd = snd_soc_card_get_drvdata(card); + + snd_soc_update_bits(codec, PDMIC_DSPR1, PDMIC_DSPR1_OFFSET_MASK, + (u32)(dd->pdata->mic_offset << PDMIC_DSPR1_OFFSET_SHIFT)); + + return 0; +} + +static struct snd_soc_codec_driver soc_codec_dev_pdmic = { + .probe = atmel_pdmic_codec_probe, + .controls = atmel_pdmic_snd_controls, + .num_controls = ARRAY_SIZE(atmel_pdmic_snd_controls), +}; + +/* codec dai component */ +#define PDMIC_MR_PRESCAL_MAX_VAL 127 + +static int +atmel_pdmic_codec_dai_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *codec_dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct atmel_pdmic *dd = snd_soc_card_get_drvdata(rtd->card); + struct snd_soc_codec *codec = codec_dai->codec; + unsigned int rate_min = substream->runtime->hw.rate_min; + unsigned int rate_max = substream->runtime->hw.rate_max; + int fs = params_rate(params); + int bits = params_width(params); + unsigned long pclk_rate, gclk_rate; + unsigned int f_pdmic; + u32 mr_val, dspr0_val, pclk_prescal, gclk_prescal; + + if (params_channels(params) != 1) { + dev_err(codec->dev, + "only supports one channel\n"); + return -EINVAL; + } + + if ((fs < rate_min) || (fs > rate_max)) { + dev_err(codec->dev, + "sample rate is %dHz, min rate is %dHz, max rate is %dHz\n", + fs, rate_min, rate_max); + + return -EINVAL; + } + + switch (bits) { + case 16: + dspr0_val = (PDMIC_DSPR0_SIZE_16_BITS + << PDMIC_DSPR0_SIZE_SHIFT); + break; + case 32: + dspr0_val = (PDMIC_DSPR0_SIZE_32_BITS + << PDMIC_DSPR0_SIZE_SHIFT); + break; + default: + return -EINVAL; + } + + if ((fs << 7) > (rate_max << 6)) { + f_pdmic = fs << 6; + dspr0_val |= PDMIC_DSPR0_OSR_64 << PDMIC_DSPR0_OSR_SHIFT; + } else { + f_pdmic = fs << 7; + dspr0_val |= PDMIC_DSPR0_OSR_128 << PDMIC_DSPR0_OSR_SHIFT; + } + + pclk_rate = clk_get_rate(dd->pclk); + gclk_rate = clk_get_rate(dd->gclk); + + /* PRESCAL = SELCK/(2*f_pdmic) - 1*/ + pclk_prescal = (u32)(pclk_rate/(f_pdmic << 1)) - 1; + gclk_prescal = (u32)(gclk_rate/(f_pdmic << 1)) - 1; + + if ((pclk_prescal > PDMIC_MR_PRESCAL_MAX_VAL) || + (gclk_rate/((gclk_prescal + 1) << 1) < + pclk_rate/((pclk_prescal + 1) << 1))) { + mr_val = gclk_prescal << PDMIC_MR_PRESCAL_SHIFT; + mr_val |= PDMIC_MR_CLKS_GCK << PDMIC_MR_CLKS_SHIFT; + } else { + mr_val = pclk_prescal << PDMIC_MR_PRESCAL_SHIFT; + mr_val |= PDMIC_MR_CLKS_PCK << PDMIC_MR_CLKS_SHIFT; + } + + snd_soc_update_bits(codec, PDMIC_MR, + PDMIC_MR_PRESCAL_MASK | PDMIC_MR_CLKS_MASK, mr_val); + + snd_soc_update_bits(codec, PDMIC_DSPR0, + PDMIC_DSPR0_OSR_MASK | PDMIC_DSPR0_SIZE_MASK, dspr0_val); + + return 0; +} + +static int atmel_pdmic_codec_dai_prepare(struct snd_pcm_substream *substream, + struct snd_soc_dai *codec_dai) +{ + struct snd_soc_codec *codec = codec_dai->codec; + + snd_soc_update_bits(codec, PDMIC_CR, PDMIC_CR_ENPDM_MASK, + PDMIC_CR_ENPDM_DIS << PDMIC_CR_ENPDM_SHIFT); + + return 0; +} + +static int atmel_pdmic_codec_dai_trigger(struct snd_pcm_substream *substream, + int cmd, struct snd_soc_dai *codec_dai) +{ + struct snd_soc_codec *codec = codec_dai->codec; + u32 val; + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + case SNDRV_PCM_TRIGGER_RESUME: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + val = PDMIC_CR_ENPDM_EN << PDMIC_CR_ENPDM_SHIFT; + break; + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + val = PDMIC_CR_ENPDM_DIS << PDMIC_CR_ENPDM_SHIFT; + break; + default: + return -EINVAL; + } + + snd_soc_update_bits(codec, PDMIC_CR, PDMIC_CR_ENPDM_MASK, val); + + return 0; +} + +static const struct snd_soc_dai_ops atmel_pdmic_codec_dai_ops = { + .hw_params = atmel_pdmic_codec_dai_hw_params, + .prepare = atmel_pdmic_codec_dai_prepare, + .trigger = atmel_pdmic_codec_dai_trigger, +}; + +#define ATMEL_PDMIC_CODEC_DAI_NAME "atmel-pdmic-hifi" + +static struct snd_soc_dai_driver atmel_pdmic_codec_dai = { + .name = ATMEL_PDMIC_CODEC_DAI_NAME, + .capture = { + .stream_name = "Capture", + .channels_min = 1, + .channels_max = 1, + .rates = SNDRV_PCM_RATE_KNOT, + .formats = ATMEL_PDMIC_FORMATS, + }, + .ops = &atmel_pdmic_codec_dai_ops, +}; + +/* ASoC sound card */ +static int atmel_pdmic_asoc_card_init(struct device *dev, + struct snd_soc_card *card) +{ + struct snd_soc_dai_link *dai_link; + struct atmel_pdmic *dd = snd_soc_card_get_drvdata(card); + + dai_link = devm_kzalloc(dev, sizeof(*dai_link), GFP_KERNEL); + if (!dai_link) + return -ENOMEM; + + dai_link->name = "PDMIC"; + dai_link->stream_name = "PDMIC PCM"; + dai_link->codec_dai_name = ATMEL_PDMIC_CODEC_DAI_NAME; + dai_link->cpu_dai_name = dev_name(dev); + dai_link->codec_name = dev_name(dev); + dai_link->platform_name = dev_name(dev); + + card->dai_link = dai_link; + card->num_links = 1; + card->name = dd->pdata->card_name; + card->dev = dev; + + return 0; +} + +static void atmel_pdmic_get_sample_rate(struct atmel_pdmic *dd, + unsigned int *rate_min, unsigned int *rate_max) +{ + u32 mic_min_freq = dd->pdata->mic_min_freq; + u32 mic_max_freq = dd->pdata->mic_max_freq; + u32 clk_max_rate = (u32)(clk_get_rate(dd->pclk) >> 1); + u32 clk_min_rate = (u32)(clk_get_rate(dd->gclk) >> 8); + + if (mic_max_freq > clk_max_rate) + mic_max_freq = clk_max_rate; + + if (mic_min_freq < clk_min_rate) + mic_min_freq = clk_min_rate; + + *rate_min = DIV_ROUND_CLOSEST(mic_min_freq, 128); + *rate_max = mic_max_freq >> 6; +} + +/* PDMIC interrupt handler */ +static irqreturn_t atmel_pdmic_interrupt(int irq, void *dev_id) +{ + struct atmel_pdmic *dd = (struct atmel_pdmic *)dev_id; + u32 pdmic_isr; + irqreturn_t ret = IRQ_NONE; + + regmap_read(dd->regmap, PDMIC_ISR, &pdmic_isr); + + if (pdmic_isr & PDMIC_ISR_OVRE) { + regmap_update_bits(dd->regmap, PDMIC_CR, PDMIC_CR_ENPDM_MASK, + PDMIC_CR_ENPDM_DIS << PDMIC_CR_ENPDM_SHIFT); + + snd_pcm_stop_xrun(dd->substream); + + ret = IRQ_HANDLED; + } + + return ret; +} + +/* regmap configuration */ +#define ATMEL_PDMIC_REG_MAX 0x124 +static const struct regmap_config atmel_pdmic_regmap_config = { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + .max_register = ATMEL_PDMIC_REG_MAX, +}; + +static int atmel_pdmic_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct atmel_pdmic *dd; + struct resource *res; + void __iomem *io_base; + const struct atmel_pdmic_pdata *pdata; + struct snd_soc_card *card; + unsigned int rate_min, rate_max; + int ret; + + pdata = atmel_pdmic_dt_init(dev); + if (IS_ERR(pdata)) + return PTR_ERR(pdata); + + dd = devm_kzalloc(dev, sizeof(*dd), GFP_KERNEL); + if (!dd) + return -ENOMEM; + + dd->pdata = pdata; + + dd->irq = platform_get_irq(pdev, 0); + if (dd->irq < 0) { + ret = dd->irq; + dev_err(dev, "failed to could not get irq: %d\n", ret); + return ret; + } + + dd->pclk = devm_clk_get(dev, "pclk"); + if (IS_ERR(dd->pclk)) { + ret = PTR_ERR(dd->pclk); + dev_err(dev, "failed to get peripheral clock: %d\n", ret); + return ret; + } + + dd->gclk = devm_clk_get(dev, "gclk"); + if (IS_ERR(dd->gclk)) { + ret = PTR_ERR(dd->gclk); + dev_err(dev, "failed to get GCK: %d\n", ret); + return ret; + } + + /* The gclk clock frequency must always be tree times + * lower than the pclk clock frequency + */ + ret = clk_set_rate(dd->gclk, clk_get_rate(dd->pclk)/3); + if (ret) { + dev_err(dev, "failed to set GCK clock rate: %d\n", ret); + return ret; + } + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + dev_err(dev, "no memory resource\n"); + return -ENXIO; + } + + io_base = devm_ioremap_resource(dev, res); + if (IS_ERR(io_base)) { + ret = PTR_ERR(io_base); + dev_err(dev, "failed to remap register memory: %d\n", ret); + return ret; + } + + dd->phy_base = res->start; + + dd->regmap = devm_regmap_init_mmio(dev, io_base, + &atmel_pdmic_regmap_config); + if (IS_ERR(dd->regmap)) { + ret = PTR_ERR(dd->regmap); + dev_err(dev, "failed to init register map: %d\n", ret); + return ret; + } + + ret = devm_request_irq(dev, dd->irq, atmel_pdmic_interrupt, 0, + "PDMIC", (void *)dd); + if (ret < 0) { + dev_err(dev, "can't register ISR for IRQ %u (ret=%i)\n", + dd->irq, ret); + return ret; + } + + /* Get the minimal and maximal sample rate that micphone supports */ + atmel_pdmic_get_sample_rate(dd, &rate_min, &rate_max); + + /* register cpu dai */ + atmel_pdmic_cpu_dai.capture.rate_min = rate_min; + atmel_pdmic_cpu_dai.capture.rate_max = rate_max; + ret = devm_snd_soc_register_component(dev, + &atmel_pdmic_cpu_dai_component, + &atmel_pdmic_cpu_dai, 1); + if (ret) { + dev_err(dev, "could not register CPU DAI: %d\n", ret); + return ret; + } + + /* register platform */ + ret = devm_snd_dmaengine_pcm_register(dev, + &atmel_pdmic_dmaengine_pcm_config, + 0); + if (ret) { + dev_err(dev, "could not register platform: %d\n", ret); + return ret; + } + + /* register codec and codec dai */ + atmel_pdmic_codec_dai.capture.rate_min = rate_min; + atmel_pdmic_codec_dai.capture.rate_max = rate_max; + ret = snd_soc_register_codec(dev, &soc_codec_dev_pdmic, + &atmel_pdmic_codec_dai, 1); + if (ret) { + dev_err(dev, "could not register codec: %d\n", ret); + return ret; + } + + /* register sound card */ + card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL); + if (!card) { + ret = -ENOMEM; + goto unregister_codec; + } + + snd_soc_card_set_drvdata(card, dd); + platform_set_drvdata(pdev, card); + + ret = atmel_pdmic_asoc_card_init(dev, card); + if (ret) { + dev_err(dev, "failed to init sound card: %d\n", ret); + goto unregister_codec; + } + + ret = devm_snd_soc_register_card(dev, card); + if (ret) { + dev_err(dev, "failed to register sound card: %d\n", ret); + goto unregister_codec; + } + + return 0; + +unregister_codec: + snd_soc_unregister_codec(dev); + return ret; +} + +static int atmel_pdmic_remove(struct platform_device *pdev) +{ + snd_soc_unregister_codec(&pdev->dev); + return 0; +} + +static struct platform_driver atmel_pdmic_driver = { + .driver = { + .name = "atmel-pdmic", + .of_match_table = of_match_ptr(atmel_pdmic_of_match), + .pm = &snd_soc_pm_ops, + }, + .probe = atmel_pdmic_probe, + .remove = atmel_pdmic_remove, +}; +module_platform_driver(atmel_pdmic_driver); + +MODULE_DESCRIPTION("Atmel PDMIC driver under ALSA SoC architecture"); +MODULE_AUTHOR("Songjun Wu <songjun.wu(a)atmel.com>"); +MODULE_LICENSE("GPL v2"); diff --git a/sound/soc/atmel/atmel-pdmic.h b/sound/soc/atmel/atmel-pdmic.h new file mode 100644 index 0000000..4527ac7 --- /dev/null +++ b/sound/soc/atmel/atmel-pdmic.h @@ -0,0 +1,80 @@ +#ifndef __ATMEL_PDMIC_H_ +#define __ATMEL_PDMIC_H_ + +#include <linux/bitops.h> + +#define PDMIC_CR 0x00000000 + +#define PDMIC_CR_SWRST 0x1 +#define PDMIC_CR_SWRST_MASK BIT(0) +#define PDMIC_CR_SWRST_SHIFT (0) + +#define PDMIC_CR_ENPDM_DIS 0x0 +#define PDMIC_CR_ENPDM_EN 0x1 +#define PDMIC_CR_ENPDM_MASK BIT(4) +#define PDMIC_CR_ENPDM_SHIFT (4) + +#define PDMIC_MR 0x00000004 + +#define PDMIC_MR_CLKS_PCK 0x0 +#define PDMIC_MR_CLKS_GCK 0x1 +#define PDMIC_MR_CLKS_MASK BIT(4) +#define PDMIC_MR_CLKS_SHIFT (4) + +#define PDMIC_MR_PRESCAL_MASK GENMASK(14, 8) +#define PDMIC_MR_PRESCAL_SHIFT (8) + +#define PDMIC_CDR 0x00000014 + +#define PDMIC_IER 0x00000018 +#define PDMIC_IER_OVRE BIT(25) + +#define PDMIC_IDR 0x0000001c +#define PDMIC_IDR_OVRE BIT(25) + +#define PDMIC_IMR 0x00000020 + +#define PDMIC_ISR 0x00000024 +#define PDMIC_ISR_OVRE BIT(25) + +#define PDMIC_DSPR0 0x00000058 + +#define PDMIC_DSPR0_HPFBYP_DIS 0x1 +#define PDMIC_DSPR0_HPFBYP_EN 0x0 +#define PDMIC_DSPR0_HPFBYP_MASK BIT(1) +#define PDMIC_DSPR0_HPFBYP_SHIFT (1) + +#define PDMIC_DSPR0_SINBYP_DIS 0x1 +#define PDMIC_DSPR0_SINBYP_EN 0x0 +#define PDMIC_DSPR0_SINBYP_MASK BIT(2) +#define PDMIC_DSPR0_SINBYP_SHIFT (2) + +#define PDMIC_DSPR0_SIZE_16_BITS 0x0 +#define PDMIC_DSPR0_SIZE_32_BITS 0x1 +#define PDMIC_DSPR0_SIZE_MASK BIT(3) +#define PDMIC_DSPR0_SIZE_SHIFT (3) + +#define PDMIC_DSPR0_OSR_128 0x0 +#define PDMIC_DSPR0_OSR_64 0x1 +#define PDMIC_DSPR0_OSR_MASK GENMASK(6, 4) +#define PDMIC_DSPR0_OSR_SHIFT (4) + +#define PDMIC_DSPR0_SCALE_MASK GENMASK(11, 8) +#define PDMIC_DSPR0_SCALE_SHIFT (8) + +#define PDMIC_DSPR0_SHIFT_MASK GENMASK(15, 12) +#define PDMIC_DSPR0_SHIFT_SHIFT (12) + +#define PDMIC_DSPR1 0x0000005c + +#define PDMIC_DSPR1_DGAIN_MASK GENMASK(14, 0) +#define PDMIC_DSPR1_DGAIN_SHIFT (0) + +#define PDMIC_DSPR1_OFFSET_MASK GENMASK(31, 16) +#define PDMIC_DSPR1_OFFSET_SHIFT (16) + +#define PDMIC_WPMR 0x000000e4 + +#define PDMIC_WPSR 0x000000e8 + +#endif -- 1.7.9.5

2 1

[alsa-devel] Applied "ASoC: atmel-classd: DT binding for PDMIC driver" to the asoc tree
by Mark Brown 18 Dec '15

18 Dec '15

The patch ASoC: atmel-classd: DT binding for PDMIC driver has been applied to the asoc tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From 4bc5145cec89b3df719d87d0a6876aa00941d66c Mon Sep 17 00:00:00 2001 From: Songjun Wu <songjun.wu(a)atmel.com> Date: Thu, 17 Dec 2015 17:50:00 +0800 Subject: [PATCH] ASoC: atmel-classd: DT binding for PDMIC driver DT binding documentation for this new ASoC driver. Signed-off-by: Songjun Wu <songjun.wu(a)atmel.com> Signed-off-by: Mark Brown <broonie(a)kernel.org> --- .../devicetree/bindings/sound/atmel-pdmic.txt | 55 ++++++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/atmel-pdmic.txt diff --git a/Documentation/devicetree/bindings/sound/atmel-pdmic.txt b/Documentation/devicetree/bindings/sound/atmel-pdmic.txt new file mode 100644 index 000000000000..e0875f17c229 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/atmel-pdmic.txt @@ -0,0 +1,55 @@ +* Atmel PDMIC driver under ALSA SoC architecture + +Required properties: +- compatible + Should be "atmel,sama5d2-pdmic". +- reg + Should contain PDMIC registers location and length. +- interrupts + Should contain the IRQ line for the PDMIC. +- dmas + One DMA specifiers as described in atmel-dma.txt and dma.txt files. +- dma-names + Must be "rx". +- clock-names + Required elements: + - "pclk" peripheral clock + - "gclk" generated clock +- clocks + Must contain an entry for each required entry in clock-names. + Please refer to clock-bindings.txt. +- atmel,mic-min-freq + The minimal frequency that the micphone supports. +- atmel,mic-max-freq + The maximal frequency that the micphone supports. + +Optional properties: +- pinctrl-names, pinctrl-0 + Please refer to pinctrl-bindings.txt. +- atmel,model + The user-visible name of this sound card. + The default value is "PDMIC". +- atmel,mic-offset + The offset that should be added. + The range is from -32768 to 32767. + The default value is 0. + +Example: + pdmic@f8018000 { + compatible = "atmel,sama5d2-pdmic"; + reg = <0xf8018000 0x124>; + interrupts = <48 IRQ_TYPE_LEVEL_HIGH 7>; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) + | AT91_XDMAC_DT_PERID(50))>; + dma-names = "rx"; + clocks = <&pdmic_clk>, <&pdmic_gclk>; + clock-names = "pclk", "gclk"; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pdmic_default>; + atmel,model = "PDMIC @ sama5d2_xplained"; + atmel,mic-min-freq = <1000000>; + atmel,mic-max-freq = <3246000>; + atmel,mic-offset = <0x0>; + }; -- 2.6.2

1 0

[alsa-devel] [PATCH 2/2] ASoC: wm8974: add devicetree support
by Mans Rullgard 18 Dec '15

18 Dec '15

This adds devicetree support to the wm8974 codec driver. With a DT-based kernel, there is no board-specific setting to select the driver so allow it to be manually chosen. Signed-off-by: Mans Rullgard <mans(a)mansr.com> --- sound/soc/codecs/Kconfig | 3 ++- sound/soc/codecs/wm8974.c | 7 +++++++ 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index cfdafc4..e36b14c 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -838,7 +838,8 @@ config SND_SOC_WM8971 tristate config SND_SOC_WM8974 - tristate + tristate "Wolfson Microelectronics WM8974 codec" + depends on I2C config SND_SOC_WM8978 tristate "Wolfson Microelectronics WM8978 codec" diff --git a/sound/soc/codecs/wm8974.c b/sound/soc/codecs/wm8974.c index 4c29bd2..c284c7b 100644 --- a/sound/soc/codecs/wm8974.c +++ b/sound/soc/codecs/wm8974.c @@ -632,9 +632,16 @@ static const struct i2c_device_id wm8974_i2c_id[] = { }; MODULE_DEVICE_TABLE(i2c, wm8974_i2c_id); +static const struct of_device_id wm8974_of_match[] = { + { .compatible = "wlf,wm8974", }, + { } +}; +MODULE_DEVICE_TABLE(of, wm8974_of_match); + static struct i2c_driver wm8974_i2c_driver = { .driver = { .name = "wm8974", + .of_match_table = wm8974_of_match, }, .probe = wm8974_i2c_probe, .remove = wm8974_i2c_remove, -- 2.6.3

3 3

[alsa-devel] Applied "ASoC: wm8974: add binding for WM8974 codec" to the asoc tree
by Mark Brown 18 Dec '15

18 Dec '15

The patch ASoC: wm8974: add binding for WM8974 codec has been applied to the asoc tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From 47d358bbf22d504a41007e7fbf71b5b4b1b45b79 Mon Sep 17 00:00:00 2001 From: Mans Rullgard <mans(a)mansr.com> Date: Wed, 16 Dec 2015 13:55:13 +0000 Subject: [PATCH] ASoC: wm8974: add binding for WM8974 codec This adds a binding for the Wolfson WM8974 mono audio codec. Signed-off-by: Mans Rullgard <mans(a)mansr.com> Signed-off-by: Mark Brown <broonie(a)kernel.org> --- Documentation/devicetree/bindings/sound/wlf,wm8974.txt | 15 +++++++++++++++ 1 file changed, 15 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/wlf,wm8974.txt diff --git a/Documentation/devicetree/bindings/sound/wlf,wm8974.txt b/Documentation/devicetree/bindings/sound/wlf,wm8974.txt new file mode 100644 index 000000000000..01d3a7c83419 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/wlf,wm8974.txt @@ -0,0 +1,15 @@ +WM8974 audio CODEC + +This device supports both I2C and SPI (configured with pin strapping +on the board). + +Required properties: + - compatible: "wlf,wm8974" + - reg: the I2C address or SPI chip select number of the device + +Examples: + +codec: wm8974@1a { + compatible = "wlf,wm8974"; + reg = <0x1a>; +}; -- 2.6.2

1 0

[alsa-devel] [PATCH] ALSA: hda - Set intel hda controller power at freeze() and thaw()
by Xiong Zhang 18 Dec '15

18 Dec '15

It takes three minutes to enter into hibernation on some OEM SKL machines and we see many codec spurious response after thaw() opertion. This is because HDA is still in D0 state after freeze() call and pci_pm_freeze/pci_pm_freeze_noirq() don't set D3 hot in pci_bus driver. It seems bios still access HDA when system enter into freeze state, HDA will receive codec response interrupt immediately after thaw() call. Because of this unexpected interrupt, HDA enter into a abnormal state and slow down the system enter into hibernation. In this patch, we put HDA into D3 hot state in azx_freeze_noirq() and put HDA into D0 state in azx_thaw_noirq(). Signed-off-by: Xiong Zhang <xiong.y.zhang(a)intel.com> --- sound/pci/hda/hda_intel.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index c38c68f..3ba7cbc 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c @@ -890,6 +890,16 @@ static int azx_suspend(struct device *dev) return 0; } +static int azx_freeze_noirq(struct device *dev) +{ + struct pci_dev *pci = to_pci_dev(dev); + + if (pci->vendor == PCI_VENDOR_ID_INTEL) + pci_set_power_state(pci, PCI_D3hot); + + return 0; +} + static int azx_resume(struct device *dev) { struct pci_dev *pci = to_pci_dev(dev); @@ -924,6 +934,14 @@ static int azx_resume(struct device *dev) trace_azx_resume(chip); return 0; } + +static int azx_thaw_noirq(struct device *dev) +{ + struct pci_dev *pci = to_pci_dev(dev); + + if (pci->vendor == PCI_VENDOR_ID_INTEL) + pci_set_power_state(pci, PCI_D0); +} #endif /* CONFIG_PM_SLEEP || SUPPORT_VGA_SWITCHEROO */ #ifdef CONFIG_PM @@ -1035,6 +1053,8 @@ static int azx_runtime_idle(struct device *dev) static const struct dev_pm_ops azx_pm = { SET_SYSTEM_SLEEP_PM_OPS(azx_suspend, azx_resume) + .freeze_noirq = azx_freeze_noirq, + .thaw_noirq = azx_thaw_noirq, SET_RUNTIME_PM_OPS(azx_runtime_suspend, azx_runtime_resume, azx_runtime_idle) }; -- 1.8.2.1

4 7

[alsa-devel] HT Omega eCLARO sound card
by Patricio Rossi 18 Dec '15

18 Dec '15

I got this card few days ago, after connected it into my PC got detected by lspci, but I cannot get a module to load, looks like the oxigen is the correct one but even when I load it manually nothing happens. I did some search on the web and I found people that was able to use it but I can't find how, I read the oxigen source code and the card is not there, is very similar to the ASUS Xonar. Is this the correct place to look for help? What is the status of this driver? where I can get more information? Thank you!

2 6

[alsa-devel] mixer controls not detected for class compliant USB audio interface (RME Babyface Pro)
by Be 17 Dec '15

17 Dec '15

Hello, I recently got a USB audio class compliant RME Babyface Pro interface. I previously posted about an issue getting all of the channels to work, but that ended up being an issue with PortAudio that is trivial to work around. Anyway, there is still the issue that the device's mixer controls are not detected by Linux. alsamixer sees no controls at all. The mixer controls must be accessible in the device's class compliant mode because the manufacturer's iPad mixer program can control its mixer and onboard DSP effects. I have attached lsusb -vvv output for the device. Below is dmesg output when the device is plugged in: [191013.268711] usb 2-1.2: new high-speed USB device number 11 using ehci-pci [191013.355392] usb 2-1.2: New USB device found, idVendor=2a39, idProduct=3fb0 [191013.355403] usb 2-1.2: New USB device strings: Mfr=1, Product=2, SerialNumber=3 [191013.355409] usb 2-1.2: Product: Babyface Pro (70785713) [191013.355413] usb 2-1.2: Manufacturer: RME [191013.355417] usb 2-1.2: SerialNumber: 9399A998B9CB3C8 [191013.360347] usb 2-1.2: unit 2 not found!

2 3

[alsa-devel] [PATCH] ASoC: rt5677: Reconfigure PLL1 after resume
by Ben Zhang 17 Dec '15

17 Dec '15

Sometimes PLL1 stops working if the codec loses power during suspend (when pow-ldo2 or reset gpio is used). MX-7Bh(RT5677_PLL1_CTRL2) is cleared and won't be restored by regcache since it's volatile. MX-7Bh has one status bit and M code for PLL1. rt5677_set_dai_pll doesn't reconfigure PLL1 after resume because it thinks the PLL params are not changed. This patch clears the cached PLL params at resume so that rt5677_set_dai_pll can reconfigure the PLL after resume. Signed-off-by: Ben Zhang <benzh(a)chromium.org> --- sound/soc/codecs/rt5677.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/sound/soc/codecs/rt5677.c b/sound/soc/codecs/rt5677.c index f73fd12..c404f51 100644 --- a/sound/soc/codecs/rt5677.c +++ b/sound/soc/codecs/rt5677.c @@ -4792,6 +4792,9 @@ static int rt5677_resume(struct snd_soc_codec *codec) struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); if (!rt5677->dsp_vad_en) { + rt5677->pll_src = 0; + rt5677->pll_in = 0; + rt5677->pll_out = 0; gpiod_set_value_cansleep(rt5677->pow_ldo2, 1); gpiod_set_value_cansleep(rt5677->reset_pin, 0); if (rt5677->pow_ldo2 || rt5677->reset_pin) -- 2.6.0.rc2.230.g3dd15c0

3 4

[alsa-devel] [sound:for-next 38/40] sound/pci/hda/hda_tegra.c:484:36: error: 'AZX_DCAPS_RIRB_DELAY' undeclared
by kbuild test robot 17 Dec '15

17 Dec '15

tree: https://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound.git for-next head: 64cfd2fd5325dbe24b990dbe003c22f5675d9742 commit: 119a42ac2b249abd6b5195e0606a0d70af2953eb [38/40] ALSA: hda - Move Nvidia-specific check into hda_intel.c config: arm-allyesconfig (attached as .config) reproduce: wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/m… -O ~/bin/make.cross chmod +x ~/bin/make.cross git checkout 119a42ac2b249abd6b5195e0606a0d70af2953eb # save the attached .config to linux build tree make.cross ARCH=arm All errors (new ones prefixed by >>): sound/pci/hda/hda_tegra.c: In function 'hda_tegra_probe': >> sound/pci/hda/hda_tegra.c:484:36: error: 'AZX_DCAPS_RIRB_DELAY' undeclared (first use in this function) const unsigned int driver_flags = AZX_DCAPS_RIRB_DELAY | ^ sound/pci/hda/hda_tegra.c:484:36: note: each undeclared identifier is reported only once for each function it appears in vim +/AZX_DCAPS_RIRB_DELAY +484 sound/pci/hda/hda_tegra.c 3c320f3f Dylan Reid 2014-05-19 478 {}, 3c320f3f Dylan Reid 2014-05-19 479 }; f73387cb Dylan Reid 2014-05-20 480 MODULE_DEVICE_TABLE(of, hda_tegra_match); 3c320f3f Dylan Reid 2014-05-19 481 3c320f3f Dylan Reid 2014-05-19 482 static int hda_tegra_probe(struct platform_device *pdev) 3c320f3f Dylan Reid 2014-05-19 483 { 88871dd2 Thierry Reding 2015-05-05 @484 const unsigned int driver_flags = AZX_DCAPS_RIRB_DELAY | 88871dd2 Thierry Reding 2015-05-05 485 AZX_DCAPS_CORBRP_SELF_CLEAR; 3c320f3f Dylan Reid 2014-05-19 486 struct snd_card *card; 3c320f3f Dylan Reid 2014-05-19 487 struct azx *chip; :::::: The code at line 484 was first introduced by commit :::::: 88871dd25f64b9bf16222e829ad766fac201866a ALSA: hda/tegra - Set CORBRP self-clear flag :::::: TO: Thierry Reding <treding(a)nvidia.com> :::::: CC: Takashi Iwai <tiwai(a)suse.de> --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation

2 1

[alsa-devel] [RESEND PATCH v2 0/2] ASoC: atmel-pdmic: add driver for Atmel PDMIC
by Songjun Wu 17 Dec '15

17 Dec '15

The Pulse Density Modulation Inteface Controller driver includes two parts. 1) Driver code to implement the PDMIC function. 2) Device tree binding documentation, it describes how to add the PDMIC in device tree. Changes in v2: - Remove the function 'atmel_pdmic_codec_get_remap', since the regmap is initialized in the core. - Replace 'if' with 'switch' in function 'atmel_pdmic_codec_dai_hw_params'. - Fix the coding style issue in function 'atmel_pdmic_dt_init', 'atmel_pdmic_interrupt','pdmic_put_mic_volsw', 'atmel_pdmic_codec_probe', 'pdmic_get_mic_volsw' and 'atmel_pdmic_codec_dai_hw_params'. Songjun Wu (2): ASoC: atmel-pdmic: add the Pulse Density Modulation Interface Controller ASoC: atmel-classd: DT binding for PDMIC driver .../devicetree/bindings/sound/atmel-pdmic.txt | 55 ++ sound/soc/atmel/Kconfig | 9 + sound/soc/atmel/Makefile | 2 + sound/soc/atmel/atmel-pdmic.c | 738 ++++++++++++++++++++ sound/soc/atmel/atmel-pdmic.h | 80 +++ 5 files changed, 884 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/atmel-pdmic.txt create mode 100644 sound/soc/atmel/atmel-pdmic.c create mode 100644 sound/soc/atmel/atmel-pdmic.h -- 1.7.9.5

1 1

[alsa-devel] [PATCH 0/4] Be ecologist; save more bits in AZX_DCAPS_*
by Takashi Iwai 17 Dec '15

17 Dec '15

Hi, this patchset cleans up messy AZX_DCAPS_* definitions and remove a few usages there. Takashi === Takashi Iwai (4): ALSA: hda - Merge RIRB_PRE_DELAY into CTX_WORKAROUND caps ALSA: hda - Move Nvidia-specific check into hda_intel.c ALSA: hda - Drop AZX_DCAPS_POSFIX_VIA bit ALSA: hda - Drop unused AZX_DCAPS_REVERSE_ASSIGN sound/pci/hda/hda_controller.c | 7 +------ sound/pci/hda/hda_controller.h | 8 ++++---- sound/pci/hda/hda_intel.c | 20 +++++++++++--------- 3 files changed, 16 insertions(+), 19 deletions(-) -- 2.6.4

1 4

[alsa-devel] [PATCH 0/2] ASoC: atmel-pdmic: add driver for Atmel PDMIC
by Songjun Wu 17 Dec '15

17 Dec '15

The Pulse Density Modulation Inteface Controller driver includes two parts. 1) Driver code to implement the PDMIC function. 2) Device tree binding documentation, it describes how to add the PDMIC in device tree. Songjun Wu (2): ASoC: atmel-pdmic: add the Pulse Density Modulation Interface Controller ASoC: atmel-pdmic: DT binding for PDMIC driver .../devicetree/bindings/sound/atmel-pdmic.txt | 55 ++ sound/soc/atmel/Kconfig | 9 + sound/soc/atmel/Makefile | 2 + sound/soc/atmel/atmel-pdmic.c | 745 ++++++++++++++++++++ sound/soc/atmel/atmel-pdmic.h | 80 +++ 5 files changed, 891 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/atmel-pdmic.txt create mode 100644 sound/soc/atmel/atmel-pdmic.c create mode 100644 sound/soc/atmel/atmel-pdmic.h -- 1.7.9.5

3 3

[alsa-devel] [patch] ASoC: Intel: Skylake: Fix a couple signedness bugs
by Dan Carpenter 16 Dec '15

16 Dec '15

These need to be unsigned because they hold negative error codes. Signed-off-by: Dan Carpenter <dan.carpenter(a)oracle.com> diff --git a/sound/soc/intel/skylake/skl-sst.c b/sound/soc/intel/skylake/skl-sst.c index 8cd5cdb..e26f474 100644 --- a/sound/soc/intel/skylake/skl-sst.c +++ b/sound/soc/intel/skylake/skl-sst.c @@ -208,7 +208,7 @@ static unsigned int skl_get_errorcode(struct sst_dsp *ctx) * since get/set_module are called from DAPM context, * we don't need lock for usage count */ -static unsigned int skl_get_module(struct sst_dsp *ctx, u16 mod_id) +static int skl_get_module(struct sst_dsp *ctx, u16 mod_id) { struct skl_module_table *module; @@ -220,7 +220,7 @@ static unsigned int skl_get_module(struct sst_dsp *ctx, u16 mod_id) return -EINVAL; } -static unsigned int skl_put_module(struct sst_dsp *ctx, u16 mod_id) +static int skl_put_module(struct sst_dsp *ctx, u16 mod_id) { struct skl_module_table *module; @@ -340,7 +340,7 @@ static int skl_load_module(struct sst_dsp *ctx, u16 mod_id, char *guid) static int skl_unload_module(struct sst_dsp *ctx, u16 mod_id) { - unsigned int usage_cnt; + int usage_cnt; struct skl_sst *skl = ctx->thread_context; int ret = 0;

3 4

[alsa-devel] [PATCH] ASoC: arizona: In arizona_calc_fratio make new codecs the default case
by Richard Fitzgerald 16 Dec '15

16 Dec '15

This patch rearranges the switch statement in arizona_calc_fratio so that older codecs are the special cases, with the default case applying to newer codecs (WM8998 and later). This is preferable because it avoids having to patch new cases in every time a new codec is added. Signed-off-by: Richard Fitzgerald <rf(a)opensource.wolfsonmicro.com> --- sound/soc/codecs/arizona.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index d90b3c5..38a73e3 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -2020,18 +2020,18 @@ static int arizona_calc_fratio(struct arizona_fll *fll, } switch (fll->arizona->type) { + case WM5102: + case WM8997: + return init_ratio; case WM5110: case WM8280: if (fll->arizona->rev < 3 || sync) return init_ratio; break; - case WM8998: - case WM1814: + default: if (sync) return init_ratio; break; - default: - return init_ratio; } cfg->fratio = init_ratio - 1; -- 1.9.1

2 1

[alsa-devel] [patch] ASoC: Intel: Skylake: pointer math issue
by Dan Carpenter 16 Dec '15

16 Dec '15

"data" is a u32 pointer so this copies the information to wrong place entirely. Fixes: 140adfba5280 ('ASoC: Intel: Skylake: Add tlv byte kcontrols') Signed-off-by: Dan Carpenter <dan.carpenter(a)oracle.com> diff --git a/sound/soc/intel/skylake/skl-topology.c b/sound/soc/intel/skylake/skl-topology.c index dde8d3c..2c4405e 100644 --- a/sound/soc/intel/skylake/skl-topology.c +++ b/sound/soc/intel/skylake/skl-topology.c @@ -885,9 +885,9 @@ static int skl_tplg_tlv_control_get(struct snd_kcontrol *kcontrol, if (bc->params) { if (copy_to_user(data, &bc->param_id, sizeof(u32))) return -EFAULT; - if (copy_to_user(data + sizeof(u32), &size, sizeof(u32))) + if (copy_to_user(data + 1, &size, sizeof(u32))) return -EFAULT; - if (copy_to_user(data + 2 * sizeof(u32), bc->params, size)) + if (copy_to_user(data + 2, bc->params, size)) return -EFAULT; }

3 3

[alsa-devel] [patch v2] ASoC: Intel: Skylake: Fix a couple signedness bugs
by Dan Carpenter 16 Dec '15

16 Dec '15

These need to be signed because they hold negative error codes. Signed-off-by: Dan Carpenter <dan.carpenter(a)oracle.com> --- Fix a typo in the change log. s/unsigned/signed/ diff --git a/sound/soc/intel/skylake/skl-sst.c b/sound/soc/intel/skylake/skl-sst.c index 8cd5cdb..e26f474 100644 --- a/sound/soc/intel/skylake/skl-sst.c +++ b/sound/soc/intel/skylake/skl-sst.c @@ -208,7 +208,7 @@ static unsigned int skl_get_errorcode(struct sst_dsp *ctx) * since get/set_module are called from DAPM context, * we don't need lock for usage count */ -static unsigned int skl_get_module(struct sst_dsp *ctx, u16 mod_id) +static int skl_get_module(struct sst_dsp *ctx, u16 mod_id) { struct skl_module_table *module; @@ -220,7 +220,7 @@ static unsigned int skl_get_module(struct sst_dsp *ctx, u16 mod_id) return -EINVAL; } -static unsigned int skl_put_module(struct sst_dsp *ctx, u16 mod_id) +static int skl_put_module(struct sst_dsp *ctx, u16 mod_id) { struct skl_module_table *module; @@ -340,7 +340,7 @@ static int skl_load_module(struct sst_dsp *ctx, u16 mod_id, char *guid) static int skl_unload_module(struct sst_dsp *ctx, u16 mod_id) { - unsigned int usage_cnt; + int usage_cnt; struct skl_sst *skl = ctx->thread_context; int ret = 0;

2 1

[alsa-devel] [PATCH v5 1/2] ALSA: hda - hdmi dynamically bind PCM to pin when monitor hotplug
by libin.yang＠linux.intel.com 16 Dec '15

16 Dec '15

From: Libin Yang <libin.yang(a)linux.intel.com> Dynamically bind/unbind the PCM to pin when HDMI/DP monitor hotplug. When monitor is connected, find a proper PCM for the monitor. When monitor is disconnected, unbind the PCM from the pin. The binding policy (use Intel platform as example) is: 1. Try to use the legacy pin-pcm mapping for the device entry 0 of the pin. 2. If step 1 fails, try to bind pin to the backup PCMs. For example, on Intel platform, if DP MST is enabled, 5 PCMs will be created. PCM 3, PCM 7, PCM 8 are supposed to be used by device entry 0 of pin 5, pin 6 and pin 7. PCM 9 and PCM 10 are the backup PCMs. 3. If step 2 fails, try to find any PCM to bind to the pin. Signed-off-by: Libin Yang <libin.yang(a)linux.intel.com> --- sound/pci/hda/patch_hdmi.c | 82 ++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 80 insertions(+), 2 deletions(-) diff --git a/sound/pci/hda/patch_hdmi.c b/sound/pci/hda/patch_hdmi.c index 19bf782..56b7625 100644 --- a/sound/pci/hda/patch_hdmi.c +++ b/sound/pci/hda/patch_hdmi.c @@ -73,6 +73,8 @@ struct hdmi_spec_per_cvt { struct hdmi_spec_per_pin { hda_nid_t pin_nid; + /* pin idx, different device entries on the same pin use the same idx */ + int pin_nid_idx; int num_mux_nids; hda_nid_t mux_nids[HDA_MAX_CONNECTIONS]; int mux_idx; @@ -85,6 +87,7 @@ struct hdmi_spec_per_pin { struct snd_kcontrol *eld_ctl; struct snd_jack *acomp_jack; /* jack via audio component */ struct hda_pcm *pcm; /* pointer to spec->pcm_rec[n] dynamically*/ + int pcm_idx; /* which pcm is attached. -1 means no pcm is attached */ int repoll_count; bool setup; /* the stream has been set up by prepare callback */ int channels; /* current number of channels */ @@ -138,6 +141,8 @@ struct hdmi_spec { struct snd_array pins; /* struct hdmi_spec_per_pin */ struct hda_pcm *pcm_rec[16]; struct mutex pcm_lock; + /* pcm_bitmap means which pcms have been assigned to pins*/ + unsigned long pcm_bitmap; int pcm_used; /* counter of pcm_rec[] */ unsigned int channels_max; /* max over all cvts */ @@ -1671,6 +1676,60 @@ static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx) return 0; } +static int hdmi_find_pcm_slot(struct hdmi_spec *spec, + struct hdmi_spec_per_pin *per_pin) +{ + int i; + + /* try the prefer PCM */ + if (!test_bit(per_pin->pin_nid_idx, &spec->pcm_bitmap)) + return per_pin->pin_nid_idx; + + /* have a second try; check the "reserved area" over num_pins */ + for (i = spec->num_pins; i < spec->pcm_used; i++) { + if (!test_bit(i, &spec->pcm_bitmap)) + return i; + } + + /* the last try; check the empty slots in pins */ + for (i = 0; i < spec->num_pins; i++) { + if (!test_bit(i, &spec->pcm_bitmap)) + return i; + } + return -EBUSY; +} + +static void hdmi_attach_hda_pcm(struct hdmi_spec *spec, + struct hdmi_spec_per_pin *per_pin) +{ + int idx; + + /* pcm already be attached to the pin */ + if (per_pin->pcm) + return; + idx = hdmi_find_pcm_slot(spec, per_pin); + if (idx == -ENODEV) + return; + per_pin->pcm_idx = idx; + per_pin->pcm = spec->pcm_rec[idx]; + set_bit(idx, &spec->pcm_bitmap); +} + +static void hdmi_detach_hda_pcm(struct hdmi_spec *spec, + struct hdmi_spec_per_pin *per_pin) +{ + int idx; + + /* pcm already be detached from the pin */ + if (!per_pin->pcm) + return; + idx = per_pin->pcm_idx; + per_pin->pcm_idx = -1; + per_pin->pcm = NULL; + if (idx >= 0 && idx < spec->pcm_used) + clear_bit(idx, &spec->pcm_bitmap); +} + /* update per_pin ELD from the given new ELD; * setup info frame and notification accordingly */ @@ -1679,9 +1738,17 @@ static void update_eld(struct hda_codec *codec, struct hdmi_eld *eld) { struct hdmi_eld *pin_eld = &per_pin->sink_eld; + struct hdmi_spec *spec = codec->spec; bool old_eld_valid = pin_eld->eld_valid; bool eld_changed; + if (spec->dyn_pcm_assign) { + if (eld->eld_valid) + hdmi_attach_hda_pcm(spec, per_pin); + else + hdmi_detach_hda_pcm(spec, per_pin); + } + if (eld->eld_valid) snd_hdmi_show_eld(codec, &eld->info); @@ -1825,13 +1892,19 @@ static void sync_eld_via_acomp(struct hda_codec *codec, static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll) { struct hda_codec *codec = per_pin->codec; + struct hdmi_spec *spec = codec->spec; + int ret; + mutex_lock(&spec->pcm_lock); if (codec_has_acomp(codec)) { sync_eld_via_acomp(codec, per_pin); - return false; /* don't call snd_hda_jack_report_sync() */ + ret = false; /* don't call snd_hda_jack_report_sync() */ } else { - return hdmi_present_sense_via_verbs(per_pin, repoll); + ret = hdmi_present_sense_via_verbs(per_pin, repoll); } + mutex_unlock(&spec->pcm_lock); + + return ret; } static void hdmi_repoll_eld(struct work_struct *work) @@ -1875,6 +1948,11 @@ static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid) per_pin->pin_nid = pin_nid; per_pin->non_pcm = false; + if (spec->dyn_pcm_assign) + per_pin->pcm_idx = -1; + else + per_pin->pcm_idx = pin_idx; + per_pin->pin_nid_idx = pin_idx; err = hdmi_read_pin_conn(codec, pin_idx); if (err < 0) -- 1.9.1

2 2

[alsa-devel] [PATCH] ASoC: Intel: sst: fix sst_memcpy32 wrong with non-4x bytes issue
by Jie Yang 16 Dec '15

16 Dec '15

sst_memcpy32() only copied bytes/4 32bits, which means it dropped the remaining bytes%4 bytes wrongly. Here add copying those missing bytes, first to a 32bits tmp, and then write the tmp to 32bits iomem. Signed-off-by: Jie Yang <yang.jie(a)intel.com> --- sound/soc/intel/common/sst-firmware.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/sound/soc/intel/common/sst-firmware.c b/sound/soc/intel/common/sst-firmware.c index 60652cb..d745a78 100644 --- a/sound/soc/intel/common/sst-firmware.c +++ b/sound/soc/intel/common/sst-firmware.c @@ -51,8 +51,22 @@ struct sst_dma { static inline void sst_memcpy32(volatile void __iomem *dest, void *src, u32 bytes) { + u32 tmp = 0; + int i, m, n; + const u8 *src_byte = src; + + m = bytes / 4; + n = bytes % 4; + /* __iowrite32_copy use 32bit size values so divide by 4 */ - __iowrite32_copy((void *)dest, src, bytes/4); + __iowrite32_copy((void *)dest, src, m); + + if (n) { + for (i = 0; i < n; i++) + tmp |= (u32)*(src_byte + m * 4 + i) << (i * 8); + __iowrite32_copy((void *)(dest + m * 4), &tmp, 1); + } + } static void sst_dma_transfer_complete(void *arg) -- 2.5.0

2 1

[alsa-devel] [PATCH 0/4] ALSA: oxfw: localize stuffs of old firewire-speakers module
by Takashi Sakamoto 16 Dec '15

16 Dec '15

Hi, ALSA oxfw module inherits some stuffs from old firewire-speakers module. Currently, the module's common structure has some members for the stuffs. This is not good because these stuffs are not common between all of supported models. It's better to localize them. The purpose of this patchset is to enable the module to have memory block and push model-specific stuffs to each structure. This patchset is a part of my previous RFCv2 (patch 06-09) and a preparation for rest of the patches: [alsa-devel] [RFC][PATCH 00/17 v2] ALSA: oxfw: refactoring and merging scs1x module http://mailman.alsa-project.org/pipermail/alsa-devel/2015-December/101558.h… Takashi Sakamoto (4): ALSA: oxfw: enable to keep memory block for model-specific structure ALSA: oxfw: move model-specific members from common structure ALSA: oxfw: move model-specific parameters from common structure ALSA: oxfw: rename a structure so that it means backward compatibility to old drivers sound/firewire/oxfw/oxfw-spkr.c | 96 ++++++++++++++++++++++++++--------------- sound/firewire/oxfw/oxfw.c | 31 +++++++------ sound/firewire/oxfw/oxfw.h | 17 +------- 3 files changed, 79 insertions(+), 65 deletions(-) -- 2.5.0

1 4

[alsa-devel] [PATCH 0/5] ALSA: oxfw: code refactoring for model-dependent quirks
by Takashi Sakamoto 16 Dec '15

16 Dec '15

Hi, ALSA oxfw driver has got some patches to expand its functionalities. As a result, current code includes some inefficiencies and confusions. This patchset is a code refactoring about model-dependent quirks. This patchset is a part of my previous RFCv2 (patch 01-05) and a preparation for the rest of patches: [alsa-devel] [RFC][PATCH 00/17 v2] ALSA: oxfw: refactoring and merging scs1x module http://mailman.alsa-project.org/pipermail/alsa-devel/2015-December/101558.h… Takashi Sakamoto (5): ALSA: oxfw: rename a file for control elements so that it's for model-specific ALSA: oxfw: rename local functions for control elements so that they represent as local ALSA: oxfw: change function prototype for AV/C Audio Subunit command ALSA: oxfw: reuse driver entry to detect quirk ALSA: oxfw: gather model-dependent conditions to a function sound/firewire/oxfw/Makefile | 4 +- .../firewire/oxfw/{oxfw-control.c => oxfw-spkr.c} | 80 ++++++++++++---------- sound/firewire/oxfw/oxfw.c | 59 +++++++++------- sound/firewire/oxfw/oxfw.h | 6 +- 4 files changed, 86 insertions(+), 63 deletions(-) rename sound/firewire/oxfw/{oxfw-control.c => oxfw-spkr.c} (71%) -- 2.5.0

2 8

[alsa-devel] [PATCH] ASoC: Intel: sst: fix the IRQ locked issue
by Jie Yang 16 Dec '15

16 Dec '15

From: Liam Girdwood <liam.r.girdwood(a)linux.intel.com> If driver received a message that it can't handle, it won't clear the corresponding bit and unmask interrupt, this may lock the IRQ and DSP can't send message anymore. To fix the issue, we should Always update IMRX after IPC. Here we always clear the DONE/BUSY bit and unmask the IRQ source, even when IPC failures have occurred previously. Signed-off-by: Liam Girdwood <liam.r.girdwood(a)linux.intel.com> Modified-by: Jie Yang <yang.jie(a)intel.com> Signed-off-by: Jie Yang <yang.jie(a)intel.com> --- sound/soc/intel/haswell/sst-haswell-ipc.c | 31 +++++++++++++------------------ 1 file changed, 13 insertions(+), 18 deletions(-) diff --git a/sound/soc/intel/haswell/sst-haswell-ipc.c b/sound/soc/intel/haswell/sst-haswell-ipc.c index b27f25f..ac60f13 100644 --- a/sound/soc/intel/haswell/sst-haswell-ipc.c +++ b/sound/soc/intel/haswell/sst-haswell-ipc.c @@ -778,7 +778,6 @@ static irqreturn_t hsw_irq_thread(int irq, void *context) struct sst_hsw *hsw = sst_dsp_get_thread_context(sst); struct sst_generic_ipc *ipc = &hsw->ipc; u32 ipcx, ipcd; - int handled; unsigned long flags; spin_lock_irqsave(&sst->spinlock, flags); @@ -790,34 +789,30 @@ static irqreturn_t hsw_irq_thread(int irq, void *context) if (ipcx & SST_IPCX_DONE) { /* Handle Immediate reply from DSP Core */ - handled = hsw_process_reply(hsw, ipcx); + hsw_process_reply(hsw, ipcx); - if (handled > 0) { - /* clear DONE bit - tell DSP we have completed */ - sst_dsp_shim_update_bits_unlocked(sst, SST_IPCX, - SST_IPCX_DONE, 0); + /* clear DONE bit - tell DSP we have completed */ + sst_dsp_shim_update_bits_unlocked(sst, SST_IPCX, + SST_IPCX_DONE, 0); - /* unmask Done interrupt */ - sst_dsp_shim_update_bits_unlocked(sst, SST_IMRX, - SST_IMRX_DONE, 0); - } + /* unmask Done interrupt */ + sst_dsp_shim_update_bits_unlocked(sst, SST_IMRX, + SST_IMRX_DONE, 0); } /* new message from DSP */ if (ipcd & SST_IPCD_BUSY) { /* Handle Notification and Delayed reply from DSP Core */ - handled = hsw_process_notification(hsw); + hsw_process_notification(hsw); /* clear BUSY bit and set DONE bit - accept new messages */ - if (handled > 0) { - sst_dsp_shim_update_bits_unlocked(sst, SST_IPCD, - SST_IPCD_BUSY | SST_IPCD_DONE, SST_IPCD_DONE); + sst_dsp_shim_update_bits_unlocked(sst, SST_IPCD, + SST_IPCD_BUSY | SST_IPCD_DONE, SST_IPCD_DONE); - /* unmask busy interrupt */ - sst_dsp_shim_update_bits_unlocked(sst, SST_IMRX, - SST_IMRX_BUSY, 0); - } + /* unmask busy interrupt */ + sst_dsp_shim_update_bits_unlocked(sst, SST_IMRX, + SST_IMRX_BUSY, 0); } spin_unlock_irqrestore(&sst->spinlock, flags); -- 2.5.0

2 1

[alsa-devel] [PATCH 1/3] rcar: ctu: Avoid use of ret uninitialised
by Mark Brown 16 Dec '15

16 Dec '15

We use ret as the return value from the rsnd_ctu_probe() but if there are no child nodes and no errors then we will never initialize ret leading to build warnings. Ensure ret is initialized before we iterate over the child nodes to avoid this. Signed-off-by: Mark Brown <broonie(a)kernel.org> --- Perhaps this should be an error instead? It's not like it's a sensible configuration... sound/soc/sh/rcar/ctu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/soc/sh/rcar/ctu.c b/sound/soc/sh/rcar/ctu.c index 7c1e190cd389..d53a225d19e9 100644 --- a/sound/soc/sh/rcar/ctu.c +++ b/sound/soc/sh/rcar/ctu.c @@ -111,6 +111,7 @@ int rsnd_ctu_probe(struct rsnd_priv *priv) priv->ctu = ctu; i = 0; + ret = 0; for_each_child_of_node(node, np) { ctu = rsnd_ctu_get(priv, i); -- 2.6.2

2 7

[alsa-devel] [RFC][PATCH 00/10 v2] ALSA: dice: stabiliza packet streaming
by Takashi Sakamoto 15 Dec '15

15 Dec '15

This patchset updates my previous one: [alsa-devel] [RFC][PATCH 0/8] ALSA: dice: constrain PCM substreams to current sampling transfer frequency http://mailman.alsa-project.org/pipermail/alsa-devel/2015-November/100670.h… I hope more users to test this patchset in this developing cycle. [Background] I've frequently got private messages from owners of dice-based models since below patchset was merged to mainline: [alsa-devel] [PATCH 00/15 v5] ALSA: Enhancement for existed FireWire drivers http://mailman.alsa-project.org/pipermail/alsa-devel/2014-December/085142.h… Some of them addressed that ALSA dice driver fails to handle their models, while their experiences are not the same. The summary: * ETIMEOUT at starting streaming * detecting packet discontinuity at starting streaming * ETIMEOUT at probing snd-dice * no sound even if starting streaming This patchset is my solutions for these issues. It consists of four parts; [Patch 01] ETIMEDOUT at starting streaming means that ALSA dice driver has never received dice notification within current timeout (200 msec). This patch expands the timeout up to 2 sec. There's some disadvantages of this change in usage of ALSA PCM API, see commit comment. [Patch 02] Packet discontinuity at starting streaming means that the device fail to get constant clock signals from phase lock loop (PLL) circuit. In this case, ALSA dice driver successfully starts streaming and receives AMDTP packet from the device, therefore any dice notifications are already transferred. It's reasonable to judge that the device has a quirk to transfer the notification before set its PLL circuit steadily. This patch continue to check a register so that the device get phase lock after receiving dice notification. [Patch 03-04] When connected to IEEE 1394 bus, some models generate bus reset after appearing on bus topology. Usually, boot processing of Dice based models consists of three stages; boot loader (RedBoot) is loaded, it loads eCos, the operating system executes vendor's configurations for hardware initialization. It's reasonable to assume that bus reset occurs at each of these stages. Furthermore, I observed that ImpactTwin (TC Electronic produced) changes some registers before/after ALSA dice driver is probed with my RFC v1. This means that the hardware initialization requires a bit time. These patches postpone unit probe processing after continuous bus resets. These patches have advantages to start communication to the device after the hardware initialization. These patches may improve handling Dice II based models such as ImpactTwin and IO26 (Alesis produces). [Patch 05-10] When seeing sound/firewire/dice/dice-interface.h, Dice interface gives no ways for drivers to get all formats of AMDTP stream. Current ALSA dice driver manage to generate 'format cache' at unit probing processing, while this requires to change the state of actual clock on devices. This idea is not good because of ignoring hardware design. This idea is not good in a case that users save their favorite configuration to the device. Furthermore, this is not also good in a case that the stream format is not decided according to sampling transfer frequency only, i.e. data format of digital interface is also dominant to the stream format. These patches add limitation to constrain PCM substream at current sampling transfer frequency. As a result, userspace applications are allowed to request according to current sampling transfer frequency. When users change the frequency, they should use userspace applications with fw character devices to set it in advance. ALSA dice driver gives no way to achieve it in describes reasons. Although ALSA dice driver goes backward with these patchset, we don't beat any actual hardware designs. [Changes from RFC v1] * Patch 03-04 are newly added. This enables to handle bus reset at unit probe processing, and drops one of reasons to constrain PCM substreams at current sampling transfer frequency. * Minor arrangements Takashi Sakamoto (10): ALSA: dice: expand timeout to wait for Dice notification ALSA: dice: wait for ensuring phase lock ALSA: dice: split subaddress check from category check ALSA: dice: postpone probe processing ALSA: dice: limit to current sampling transfer frequency ALSA: dice: limit stream to current sampling transfer frequency. ALSA: dice: add MIDI ports according to current number of MIDI substreams ALSA: dice: get the number of MBLA data channel at opening PCM substream ALSA: dice: purge generating channel cache ALSA: dice: ensure phase lock before starting streaming sound/firewire/dice/dice-midi.c | 25 +++- sound/firewire/dice/dice-pcm.c | 201 ++++++++------------------- sound/firewire/dice/dice-stream.c | 84 ++++++++---- sound/firewire/dice/dice-transaction.c | 158 ++++++++++----------- sound/firewire/dice/dice.c | 242 ++++++++++++--------------------- sound/firewire/dice/dice.h | 11 +- 6 files changed, 293 insertions(+), 428 deletions(-) -- 2.5.0

2 12

[alsa-devel] [PATCH 0/3] Yet more noise fixes for Thinkpad
by Takashi Iwai 15 Dec '15

15 Dec '15

Hi, here is a series of small patches to reduce still existing crackling noises on Thinkpad with Realtek codecs. Takashi Iwai (3): ALSA: hda - Apply click noise workaround for Thinkpads generically ALSA: hda - Set codec to D3 at reboot/shutdown on Thinkpads ALSA: hda - Add a fixup for Thinkpad X1 Carbon 2nd sound/pci/hda/patch_realtek.c | 39 +++++++++++++++++++++++++-------------- 1 file changed, 25 insertions(+), 14 deletions(-) -- 2.6.4

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[alsa-devel] [PATCH] ALSA: hda - Fix headphone mic input on a few Dell ALC293 machines
by David Henningsson 15 Dec '15

15 Dec '15

These laptops support both headphone, headset and mic modes for the 3.5mm jack. Cc: stable(a)vger.kernel.org BugLink: https://bugs.launchpad.net/bugs/1526330 Signed-off-by: David Henningsson <david.henningsson(a)canonical.com> --- sound/pci/hda/patch_realtek.c | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index 8dd2ac1..b745a72 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -4606,6 +4606,7 @@ enum { ALC288_FIXUP_DISABLE_AAMIX, ALC292_FIXUP_DELL_E7X, ALC292_FIXUP_DISABLE_AAMIX, + ALC293_FIXUP_DISABLE_AAMIX_MULTIJACK, ALC298_FIXUP_DELL1_MIC_NO_PRESENCE, ALC275_FIXUP_DELL_XPS, ALC256_FIXUP_DELL_XPS_13_HEADPHONE_NOISE, @@ -5169,6 +5170,12 @@ static const struct hda_fixup alc269_fixups[] = { .chained = true, .chain_id = ALC269_FIXUP_DELL2_MIC_NO_PRESENCE }, + [ALC293_FIXUP_DISABLE_AAMIX_MULTIJACK] = { + .type = HDA_FIXUP_FUNC, + .v.func = alc_fixup_disable_aamix, + .chained = true, + .chain_id = ALC293_FIXUP_DELL1_MIC_NO_PRESENCE + }, [ALC292_FIXUP_DELL_E7X] = { .type = HDA_FIXUP_FUNC, .v.func = alc_fixup_dell_xps13, @@ -5247,11 +5254,11 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { SND_PCI_QUIRK(0x1028, 0x06c7, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE), SND_PCI_QUIRK(0x1028, 0x06d9, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE), SND_PCI_QUIRK(0x1028, 0x06da, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE), - SND_PCI_QUIRK(0x1028, 0x06db, "Dell", ALC292_FIXUP_DISABLE_AAMIX), - SND_PCI_QUIRK(0x1028, 0x06dd, "Dell", ALC292_FIXUP_DISABLE_AAMIX), - SND_PCI_QUIRK(0x1028, 0x06de, "Dell", ALC292_FIXUP_DISABLE_AAMIX), - SND_PCI_QUIRK(0x1028, 0x06df, "Dell", ALC292_FIXUP_DISABLE_AAMIX), - SND_PCI_QUIRK(0x1028, 0x06e0, "Dell", ALC292_FIXUP_DISABLE_AAMIX), + SND_PCI_QUIRK(0x1028, 0x06db, "Dell", ALC293_FIXUP_DISABLE_AAMIX_MULTIJACK), + SND_PCI_QUIRK(0x1028, 0x06dd, "Dell", ALC293_FIXUP_DISABLE_AAMIX_MULTIJACK), + SND_PCI_QUIRK(0x1028, 0x06de, "Dell", ALC293_FIXUP_DISABLE_AAMIX_MULTIJACK), + SND_PCI_QUIRK(0x1028, 0x06df, "Dell", ALC293_FIXUP_DISABLE_AAMIX_MULTIJACK), + SND_PCI_QUIRK(0x1028, 0x06e0, "Dell", ALC293_FIXUP_DISABLE_AAMIX_MULTIJACK), SND_PCI_QUIRK(0x1028, 0x0704, "Dell XPS 13", ALC256_FIXUP_DELL_XPS_13_HEADPHONE_NOISE), SND_PCI_QUIRK(0x1028, 0x164a, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE), SND_PCI_QUIRK(0x1028, 0x164b, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE), -- 1.9.1

2 1

[alsa-devel] [PATCH 1/2] ALSA: hda - Clean up the code to check bdl_pos_adj option
by Takashi Iwai 15 Dec '15

15 Dec '15

Just a minor cleanup; instead of passing an array, pass the assigned bdl_pos_adj option value directory in struct azx. Also split the code to get the default bdl_pos_adj value for the change that will follow after this. Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- sound/pci/hda/hda_controller.c | 3 +-- sound/pci/hda/hda_controller.h | 2 +- sound/pci/hda/hda_intel.c | 29 ++++++++++++++++------------- 3 files changed, 18 insertions(+), 16 deletions(-) diff --git a/sound/pci/hda/hda_controller.c b/sound/pci/hda/hda_controller.c index 22dbfa563919..10c77074b4dc 100644 --- a/sound/pci/hda/hda_controller.c +++ b/sound/pci/hda/hda_controller.c @@ -1050,8 +1050,7 @@ int azx_bus_init(struct azx *chip, const char *model, if (chip->get_position[0] != azx_get_pos_lpib || chip->get_position[1] != azx_get_pos_lpib) bus->core.use_posbuf = true; - if (chip->bdl_pos_adj) - bus->core.bdl_pos_adj = chip->bdl_pos_adj[chip->dev_index]; + bus->core.bdl_pos_adj = chip->bdl_pos_adj; if (chip->driver_caps & AZX_DCAPS_CORBRP_SELF_CLEAR) bus->core.corbrp_self_clear = true; diff --git a/sound/pci/hda/hda_controller.h b/sound/pci/hda/hda_controller.h index c1d28a657f19..a32ec9004edd 100644 --- a/sound/pci/hda/hda_controller.h +++ b/sound/pci/hda/hda_controller.h @@ -147,7 +147,7 @@ struct azx { #endif /* flags */ - const int *bdl_pos_adj; + int bdl_pos_adj; int poll_count; unsigned int running:1; unsigned int single_cmd:1; diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index fe9bef339cea..a17bf0467edc 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c @@ -632,7 +632,7 @@ static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev) if (wallclk < (azx_dev->core.period_wallclk * 5) / 4 && pos % azx_dev->core.period_bytes > azx_dev->core.period_bytes / 2) /* NG - it's below the first next period boundary */ - return chip->bdl_pos_adj[chip->dev_index] ? 0 : -1; + return chip->bdl_pos_adj ? 0 : -1; azx_dev->core.start_wallclk += wallclk; return 1; /* OK, it's fine */ } @@ -1488,6 +1488,17 @@ static void azx_probe_work(struct work_struct *work) azx_probe_continue(&hda->chip); } +static int default_bdl_pos_adj(struct azx *chip) +{ + switch (chip->driver_type) { + case AZX_DRIVER_ICH: + case AZX_DRIVER_PCH: + return 1; + default: + return 32; + } +} + /* * constructor */ @@ -1541,18 +1552,10 @@ static int azx_create(struct snd_card *card, struct pci_dev *pci, chip->single_cmd = single_cmd; azx_check_snoop_available(chip); - if (bdl_pos_adj[dev] < 0) { - switch (chip->driver_type) { - case AZX_DRIVER_ICH: - case AZX_DRIVER_PCH: - bdl_pos_adj[dev] = 1; - break; - default: - bdl_pos_adj[dev] = 32; - break; - } - } - chip->bdl_pos_adj = bdl_pos_adj; + if (bdl_pos_adj[dev] < 0) + chip->bdl_pos_adj = default_bdl_pos_adj(chip); + else + chip->bdl_pos_adj = bdl_pos_adj[dev]; err = azx_bus_init(chip, model[dev], &pci_hda_io_ops); if (err < 0) { -- 2.6.4

1 1

[alsa-devel] [PATCH] ASoC: Atmel: ClassD: unregister codec when error occurs
by Songjun Wu 15 Dec '15

15 Dec '15

Add code to unregister codec in probe function, when the error occurs after the codec is registered. Signed-off-by: Songjun Wu <songjun.wu(a)atmel.com> --- sound/soc/atmel/atmel-classd.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/sound/soc/atmel/atmel-classd.c b/sound/soc/atmel/atmel-classd.c index dca6141..6107de9 100644 --- a/sound/soc/atmel/atmel-classd.c +++ b/sound/soc/atmel/atmel-classd.c @@ -640,8 +640,10 @@ static int atmel_classd_probe(struct platform_device *pdev) /* register sound card */ card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL); - if (!card) - return -ENOMEM; + if (!card) { + ret = -ENOMEM; + goto unregister_codec; + } snd_soc_card_set_drvdata(card, dd); platform_set_drvdata(pdev, card); @@ -649,16 +651,20 @@ static int atmel_classd_probe(struct platform_device *pdev) ret = atmel_classd_asoc_card_init(dev, card); if (ret) { dev_err(dev, "failed to init sound card\n"); - return ret; + goto unregister_codec; } ret = devm_snd_soc_register_card(dev, card); if (ret) { dev_err(dev, "failed to register sound card: %d\n", ret); - return ret; + goto unregister_codec; } return 0; + +unregister_codec: + snd_soc_unregister_codec(dev); + return ret; } static int atmel_classd_remove(struct platform_device *pdev) -- 1.7.9.5

3 2

[alsa-devel] Can I stop sound from driver as system error ?
by Kuninori Morimoto 15 Dec '15

15 Dec '15

Hi I wonder can I stop sound from driver side (not from user-land) as system error during playback or capture ? How to do it if we can ? Best regards --- Kuninori Morimoto

2 3

[alsa-devel] Intel Cherry Trail -- No sound in linux
by Zhihe Tu 15 Dec '15

15 Dec '15

Hi All, I'm trying to make the CherryTrail tablet works in ubuntu14.04.3, there's no sound at all, but it works in win8 & android. ... [ 5.463371] cht-bsw-rt5672 cht-bsw-rt5672: snd-soc-dummy-dai <-> media-cpu-dai mapping ok [ 5.463406] compress asoc: snd-soc-dummy-dai <-> compress-cpu-dai mapping ok [ 5.475786] cht-bsw-rt5672 cht-bsw-rt5672: rt5670-aif1 <-> ssp2-port mapping ok [ 5.507355] hid-generic 0003:413C:2003.0002: input,hidraw1: USB HID v1.10 Keyboard [Dell Dell USB Keyboard] on usb-0000:00:14.0-4.2/input0 [ 5.695892] Console: switching to colour frame buffer device 170x48 [ 5.712458] i915_bpo 0000:00:02.0: fb0: inteldrmfb frame buffer device [ 5.712461] i915_bpo 0000:00:02.0: registered panic notifier [ 5.725983] cfg80211: Calling CRDA to update world regulatory domain [ 5.872710] scsi 0:0:0:0: Direct-Access ASMT 2115 0 PQ: 0 ANSI: 6 [ 5.873522] sd 0:0:0:0: Attached scsi generic sg0 type 0 [ 5.875671] sd 0:0:0:0: [sda] Attached SCSI removable disk [ 5.907038] sst-mfld-platform sst-mfld-platform: Slot control: codec_out tx interleaver slot 0 doesn't have DAPM widget!!! [ 5.922073] sst-mfld-platform sst-mfld-platform: Slot control: codec_out tx interleaver slot 1 doesn't have DAPM widget!!! [ 5.935876] sst-mfld-platform sst-mfld-platform: Slot control: codec_out tx interleaver slot 2 doesn't have DAPM widget!!! [ 5.949941] sst-mfld-platform sst-mfld-platform: Slot control: codec_out tx interleaver slot 3 doesn't have DAPM widget!!! [ 5.968241] sst-mfld-platform sst-mfld-platform: Slot control: codec_in rx deinterleaver codec_in0_0 doesn't have DAPM widget!!! [ 5.968267] sst-mfld-platform sst-mfld-platform: Slot control: codec_in rx deinterleaver codec_in0_1 doesn't have DAPM widget!!! [ 5.968292] sst-mfld-platform sst-mfld-platform: Slot control: codec_in rx deinterleaver codec_in1_0 doesn't have DAPM widget!!! [ 5.968318] sst-mfld-platform sst-mfld-platform: Slot control: codec_in rx deinterleaver codec_in1_1 doesn't have DAPM widget!!! ... [ 6.617144] sst-mfld-platform sst-mfld-platform: Slot control: codec_out tx interleaver slot 0 doesn't have DAPM widget!!! [ 6.632519] sst-mfld-platform sst-mfld-platform: Slot control: codec_out tx interleaver slot 1 doesn't have DAPM widget!!! [ 6.647501] sst-mfld-platform sst-mfld-platform: Slot control: codec_out tx interleaver slot 2 doesn't have DAPM widget!!! [ 6.662176] sst-mfld-platform sst-mfld-platform: Slot control: codec_out tx interleaver slot 3 doesn't have DAPM widget!!! [ 6.677049] sst-mfld-platform sst-mfld-platform: Slot control: codec_in rx deinterleaver codec_in0_0 doesn't have DAPM widget!!! [ 6.692739] sst-mfld-platform sst-mfld-platform: Slot control: codec_in rx deinterleaver codec_in0_1 doesn't have DAPM widget!!! [ 6.692765] sst-mfld-platform sst-mfld-platform: Slot control: codec_in rx deinterleaver codec_in1_0 doesn't have DAPM widget!!! [ 6.692792] sst-mfld-platform sst-mfld-platform: Slot control: codec_in rx deinterleaver codec_in1_1 doesn't have DAPM widget!!! [ 7.541669] init: plymouth-upstart-bridge main process ended, respawning [ 9.804555] Audio Port: ASoC: no backend DAIs enabled for Audio Port [ 10.139952] Audio Port: ASoC: no backend DAIs enabled for Audio Port [ 10.147834] Audio Port: ASoC: no backend DAIs enabled for Audio Port [ 10.159472] sst-mfld-platform sst-mfld-platform: Enter: enable=1 port_name=ssp2-port [ 10.162179] sst-mfld-platform sst-mfld-platform: Enter: enable=0 port_name=ssp2-port [ 10.163874] sst-mfld-platform sst-mfld-platform: Enter: enable=1 port_name=ssp2-port [ 10.164488] sst-mfld-platform sst-mfld-platform: Enter: enable=0 port_name=ssp2-port [ 10.165994] sst-mfld-platform sst-mfld-platform: Enter: enable=1 port_name=ssp2-port [ 10.166626] sst-mfld-platform sst-mfld-platform: Enter: enable=0 port_name=ssp2-port [ 10.168438] sst-mfld-platform sst-mfld-platform: Enter: enable=1 port_name=ssp2-port [ 10.169549] sst-mfld-platform sst-mfld-platform: Enter: enable=0 port_name=ssp2-port [ 10.171607] sst-mfld-platform sst-mfld-platform: Enter: enable=1 port_name=ssp2-port [ 10.189856] intel_sst_acpi 808622A8:00: Alloc for str 1 pipe 0x90 [ 10.204244] sst-mfld-platform sst-mfld-platform: Enter: enable=0 port_name=ssp2-port [ 10.205026] intel_sst_acpi 808622A8:00: Free for str 1 pipe 0x90 [ 10.215195] sst-mfld-platform sst-mfld-platform: Enter: enable=1 port_name=ssp2-port [ 12.182265] intel_sst_acpi 808622A8:00: Alloc for str 1 pipe 0x90 [ 13.181361] intel_sst_acpi 808622A8:00: Wait timed-out condition:0x0, msg_id:0x1 fw_state 0x2 [ 13.181374] intel_sst_acpi 808622A8:00: fw returned err -16 [ 14.181735] intel_sst_acpi 808622A8:00: Wait timed-out condition:0x0, msg_id:0x1 fw_state 0x3 [ 14.181764] intel_sst_acpi 808622A8:00: fw returned err -16 [ 15.181611] intel_sst_acpi 808622A8:00: Wait timed-out condition:0x0, msg_id:0x2 fw_state 0x3 [ 15.181641] intel_sst_acpi 808622A8:00: fw returned err -16 [ 16.181346] intel_sst_acpi 808622A8:00: Wait timed-out condition:0x0, msg_id:0x2 fw_state 0x3 [ 16.181376] intel_sst_acpi 808622A8:00: fw returned err -16 [ 16.210605] sst-mfld-platform sst-mfld-platform: Enter: enable=0 port_name=ssp2-port [ 17.209115] intel_sst_acpi 808622A8:00: Wait timed-out condition:0x0, msg_id:0x2 fw_state 0x3 [ 17.209144] intel_sst_acpi 808622A8:00: fw returned err -16 [ 17.209183] intel_sst_acpi 808622A8:00: free stream returned err -19 [ 18.262035] intel_sst_acpi 808622A8:00: Wait timed-out condition:0x0, msg_id:0x1 fw_state 0x3 [ 18.262053] intel_sst_acpi 808622A8:00: fw returned err -16 [ 19.260719] intel_sst_acpi 808622A8:00: Wait timed-out condition:0x0, msg_id:0x1 fw_state 0x3 [ 19.260749] intel_sst_acpi 808622A8:00: fw returned err -16 [ 19.313903] sst-mfld-platform sst-mfld-platform: Enter: enable=1 port_name=ssp2-port [ 19.445415] intel_sst_acpi 808622A8:00: Alloc for str 1 pipe 0x90 [ 19.445862] intel_sst_acpi 808622A8:00: FW sent error response 0x40034 [ 19.445883] intel_sst_acpi 808622A8:00: FW alloc failed ret -4 [ 19.445888] intel_sst_acpi 808622A8:00: sst_get_stream returned err -5 [ 19.445893] sst-mfld-platform sst-mfld-platform: ASoC: DAI prepare error: -5 [ 19.445898] Audio Port: ASoC: prepare FE Audio Port failed [ 20.444493] intel_sst_acpi 808622A8:00: Wait timed-out condition:0x0, msg_id:0x1 fw_state 0x3 [ 20.444522] intel_sst_acpi 808622A8:00: fw returned err -16 [ 21.444427] intel_sst_acpi 808622A8:00: Wait timed-out condition:0x0, msg_id:0x1 fw_state 0x3 [ 21.444456] intel_sst_acpi 808622A8:00: fw returned err -16 [ 22.444126] intel_sst_acpi 808622A8:00: Wait timed-out condition:0x0, msg_id:0x2 fw_state 0x3 [ 22.444155] intel_sst_acpi 808622A8:00: fw returned err -16 [ 23.443906] intel_sst_acpi 808622A8:00: Wait timed-out condition:0x0, msg_id:0x2 fw_state 0x3 [ 23.443934] intel_sst_acpi 808622A8:00: fw returned err -16 [ 23.474492] Audio Port: sst: error code = -22 [ 23.474504] snd_pcm_update_hw_ptr0: 123 callbacks suppressed [ 23.474512] cht-bsw-rt5672 cht-bsw-rt5672: BUG: , pos = -22, buffer size = 96000, period size = 48000 [ 23.474589] Audio Port: sst: error code = -22 [ 23.474596] cht-bsw-rt5672 cht-bsw-rt5672: BUG: , pos = -22, buffer size = 96000, period size = 48000 [ 23.474612] Audio Port: sst: error code = -22 [ 23.474617] cht-bsw-rt5672 cht-bsw-rt5672: BUG: , pos = -22, buffer size = 96000, period size = 48000 [ 23.741085] Audio Port: sst: error code = -22 [ 23.741104] cht-bsw-rt5672 cht-bsw-rt5672: BUG: , pos = -22, buffer size = 96000, period size = 48000 [ 23.741140] Audio Port: sst: error code = -22 [ 23.741147] cht-bsw-rt5672 cht-bsw-rt5672: BUG: , pos = -22, buffer size = 96000, period size = 48000 [ 23.741206] Audio Port: sst: error code = -22 [ 23.741213] cht-bsw-rt5672 cht-bsw-rt5672: BUG: , pos = -22, buffer size = 96000, period size = 48000 [ 23.741233] Audio Port: sst: error code = -22 [ 23.741240] cht-bsw-rt5672 cht-bsw-rt5672: BUG: , pos = -22, buffer size = 96000, period size = 48000 [ 23.741350] Audio Port: sst: error code = -22 [ 23.741358] cht-bsw-rt5672 cht-bsw-rt5672: BUG: , pos = -22, buffer size = 96000, period size = 48000 [ 23.741379] Audio Port: sst: error code = -22 [ 23.741385] cht-bsw-rt5672 cht-bsw-rt5672: BUG: , pos = -22, buffer size = 96000, period size = 48000 [ 23.741427] Audio Port: sst: error code = -22 [ 23.741434] cht-bsw-rt5672 cht-bsw-rt5672: BUG: , pos = -22, buffer size = 96000, period size = 48000 [ 23.741455] Audio Port: sst: error code = -22 [ 23.785062] Audio Port: sst: error code = -22 [ 23.785108] Audio Port: sst: error code = -22 [ 23.785185] Audio Port: sst: error code = -22 [ 23.785210] Audio Port: sst: error code = -22 [ 23.785343] Audio Port: sst: error code = -22 [ 23.785367] Audio Port: sst: error code = -22 [ 23.785416] Audio Port: sst: error code = -22 [ 28.496573] snd_pcm_update_hw_ptr0: 13 callbacks suppressed [ 28.496582] cht-bsw-rt5672 cht-bsw-rt5672: BUG: , pos = -22, buffer size = 96000, period size = 48000 [ 28.496707] sst-mfld-platform sst-mfld-platform: Enter: enable=0 port_name=ssp2-port [ 29.494259] intel_sst_acpi 808622A8:00: Wait timed-out condition:0x0, msg_id:0x2 fw_state 0x3 [ 29.494269] intel_sst_acpi 808622A8:00: fw returned err -16 [ 29.494284] intel_sst_acpi 808622A8:00: free stream returned err -19 [ 30.562054] intel_sst_acpi 808622A8:00: Wait timed-out condition:0x0, msg_id:0x1 fw_state 0x3 [ 30.562065] intel_sst_acpi 808622A8:00: fw returned err -16 [ 31.561892] intel_sst_acpi 808622A8:00: Wait timed-out condition:0x0, msg_id:0x1 fw_state 0x3 [ 31.561904] intel_sst_acpi 808622A8:00: fw returned err -16 [ 906.106300] sst-mfld-platform sst-mfld-platform: Enter: enable=1 port_name=ssp2-port [ 906.249375] intel_sst_acpi 808622A8:00: Alloc for str 1 pipe 0x90 [ 907.248864] intel_sst_acpi 808622A8:00: Wait timed-out condition:0x0, msg_id:0x1 fw_state 0x2 [ 907.248894] intel_sst_acpi 808622A8:00: fw returned err -16 [ 908.248393] intel_sst_acpi 808622A8:00: Wait timed-out condition:0x0, msg_id:0x1 fw_state 0x3 [ 908.248421] intel_sst_acpi 808622A8:00: fw returned err -16 [ 909.248611] intel_sst_acpi 808622A8:00: Wait timed-out condition:0x0, msg_id:0x2 fw_state 0x3 [ 909.248641] intel_sst_acpi 808622A8:00: fw returned err -16 [ 910.248108] intel_sst_acpi 808622A8:00: Wait timed-out condition:0x0, msg_id:0x2 fw_state 0x3 [ 910.248137] intel_sst_acpi 808622A8:00: fw returned err -16 [ 1053.563879] isofs_fill_super: bread failed, dev=sdb1, iso_blknum=16, block=32 [ 1185.717932] sst-mfld-platform sst-mfld-platform: Enter: enable=0 port_name=ssp2-port [ 1186.716247] intel_sst_acpi 808622A8:00: Wait timed-out condition:0x0, msg_id:0x2 fw_state 0x3 [ 1186.716277] intel_sst_acpi 808622A8:00: fw returned err -16 [ 1186.716315] intel_sst_acpi 808622A8:00: free stream returned err -19 [ 1187.783992] intel_sst_acpi 808622A8:00: Wait timed-out condition:0x0, msg_id:0x1 fw_state 0x3 [ 1187.784021] intel_sst_acpi 808622A8:00: fw returned err -16 [ 1188.783551] intel_sst_acpi 808622A8:00: Wait timed-out condition:0x0, msg_id:0x1 fw_state 0x3 [ 1188.783584] intel_sst_acpi 808622A8:00: fw returned err -16 [ 1188.821911] rt5670 i2c-10EC5670:00: Sysclk is 0Hz and clock id is 2 [ 1207.389279] sst-mfld-platform sst-mfld-platform: Enter: enable=1 port_name=ssp2-port [ 1207.404620] rt5670 i2c-10EC5670:00: Sysclk is 24576000Hz and clock id is 1 [ 1207.404646] rt5670 i2c-10EC5670:00: bclk is 1536000Hz and lrck is 48000Hz [ 1207.404660] rt5670 i2c-10EC5670:00: bclk_ms is 0 and pre_div is 1 for iis 1 [ 1207.533606] intel_sst_acpi 808622A8:00: Alloc for str 1 pipe 0x90 [ 1208.535662] intel_sst_acpi 808622A8:00: Wait timed-out condition:0x0, msg_id:0x1 fw_state 0x2 [ 1208.535691] intel_sst_acpi 808622A8:00: fw returned err -16 [ 1209.535853] intel_sst_acpi 808622A8:00: Wait timed-out condition:0x0, msg_id:0x1 fw_state 0x3 [ 1209.535883] intel_sst_acpi 808622A8:00: fw returned err -16 [ 1210.535333] intel_sst_acpi 808622A8:00: Wait timed-out condition:0x0, msg_id:0x2 fw_state 0x3 [ 1210.535361] intel_sst_acpi 808622A8:00: fw returned err -16 [ 1211.535576] intel_sst_acpi 808622A8:00: Wait timed-out condition:0x0, msg_id:0x2 fw_state 0x3 [ 1211.535606] intel_sst_acpi 808622A8:00: fw returned err -16 [ 1286.976450] usb 1-4.1: USB disconnect, device number 8 [11996.101738] r8169 0000:01:00.0 eth0: link up [11996.101780] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready [12019.249846] [drm:intel_pipe_update_end [i915_bpo]] *ERROR* Atomic update failure on pipe A (start=93814 end=93815) [12157.754218] [drm:intel_pipe_update_end [i915_bpo]] *ERROR* Atomic update failure on pipe A (start=102079 end=102080) [12194.085543] [drm:intel_pipe_update_end [i915_bpo]] *ERROR* Atomic update failure on pipe A (start=104247 end=104248) [13567.332608] sst-mfld-platform sst-mfld-platform: Enter: enable=0 port_name=ssp2-port [13568.332857] intel_sst_acpi 808622A8:00: Wait timed-out condition:0x0, msg_id:0x2 fw_state 0x3 [13568.332886] intel_sst_acpi 808622A8:00: fw returned err -16 [13568.332924] intel_sst_acpi 808622A8:00: free stream returned err -19 [13569.400219] intel_sst_acpi 808622A8:00: Wait timed-out condition:0x0, msg_id:0x1 fw_state 0x3 [13569.400247] intel_sst_acpi 808622A8:00: fw returned err -16 [13570.399826] intel_sst_acpi 808622A8:00: Wait timed-out condition:0x0, msg_id:0x1 fw_state 0x3 [13570.399837] intel_sst_acpi 808622A8:00: fw returned err -16 [13570.437188] rt5670 i2c-10EC5670:00: Sysclk is 0Hz and clock id is 2 >From /sys/kernel/debug/asoc/cherrytrailcraudio/, some necessary widgets are all power on, from media1_in to ssp2 Tx end with Headphone. I really don't know how to fix the sst fw error, any anyone give a look at this issue? ................ Thanks Tu __________ Information from ESET Smart Security, version of virus signature database 4468 (20090929) __________ The message was checked by ESET Smart Security. http://www.eset.com

3 7

[alsa-devel] [PATCH v3] ASoC: cs53l30: Add support for Cirrus Logic CS53L30
by me＠mx0a-001ae601.pphosted.com 15 Dec '15

15 Dec '15

From: Tim Howe <tim.howe(a)cirrus.com> Signed-off-by: Tim Howe <tim.howe(a)cirrus.com> --- .../devicetree/bindings/sound/cs53l30.txt | 21 + sound/soc/codecs/Kconfig | 5 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/cs53l30.c | 933 +++++++++++++++++++++ sound/soc/codecs/cs53l30.h | 272 ++++++ 5 files changed, 1233 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/cs53l30.txt create mode 100644 sound/soc/codecs/cs53l30.c create mode 100644 sound/soc/codecs/cs53l30.h diff --git a/Documentation/devicetree/bindings/sound/cs53l30.txt b/Documentation/devicetree/bindings/sound/cs53l30.txt new file mode 100644 index 0000000..a2dff95 +++ b/Documentation/devicetree/bindings/sound/cs53l30.txt @@ -0,0 +1,21 @@ +CS53L30 audio CODEC + +Required properties: + + - compatible : "cirrus,cs53l30" + + - reg : the I2C address of the device + +Optional properties: + + - reset-gpios : a GPIO spec for the reset pin. + + +Example: + +codec: cs53l30@48 { + compatible = "cirrus,cs53l30"; + reg = <0x48>; + reset-gpios = <&gpio 54 0>; +}; + diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index b3317da..f59aa4b 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -59,6 +59,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_CS4271_SPI if SPI_MASTER select SND_SOC_CS42XX8_I2C if I2C select SND_SOC_CS4349 if I2C + select SND_SOC_CS53L30 if I2C select SND_SOC_CX20442 if TTY select SND_SOC_DA7210 if SND_SOC_I2C_AND_SPI select SND_SOC_DA7213 if I2C @@ -444,6 +445,10 @@ config SND_SOC_CS4349 tristate "Cirrus Logic CS4349 CODEC" depends on I2C +config SND_SOC_CS53L30 + tristate "Cirrus Logic CS53L30 CODEC" + depends on I2C + config SND_SOC_CX20442 tristate depends on TTY diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index cdadb9b..4f1ab1d 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -51,6 +51,7 @@ snd-soc-cs4271-spi-objs := cs4271-spi.o snd-soc-cs42xx8-objs := cs42xx8.o snd-soc-cs42xx8-i2c-objs := cs42xx8-i2c.o snd-soc-cs4349-objs := cs4349.o +snd-soc-cs53l30-objs := cs53l30.o snd-soc-cx20442-objs := cx20442.o snd-soc-da7210-objs := da7210.o snd-soc-da7213-objs := da7213.o @@ -250,6 +251,7 @@ obj-$(CONFIG_SND_SOC_CS4271_SPI) += snd-soc-cs4271-spi.o obj-$(CONFIG_SND_SOC_CS42XX8) += snd-soc-cs42xx8.o obj-$(CONFIG_SND_SOC_CS42XX8_I2C) += snd-soc-cs42xx8-i2c.o obj-$(CONFIG_SND_SOC_CS4349) += snd-soc-cs4349.o +obj-$(CONFIG_SND_SOC_CS53L30) += snd-soc-cs53l30.o obj-$(CONFIG_SND_SOC_CX20442) += snd-soc-cx20442.o obj-$(CONFIG_SND_SOC_DA7210) += snd-soc-da7210.o obj-$(CONFIG_SND_SOC_DA7213) += snd-soc-da7213.o diff --git a/sound/soc/codecs/cs53l30.c b/sound/soc/codecs/cs53l30.c new file mode 100644 index 0000000..3d5cac9 +++ b/sound/soc/codecs/cs53l30.c @@ -0,0 +1,933 @@ +/* + * cs53l30.c -- CS53l30 ALSA Soc Audio driver + * + * Copyright 2015 Cirrus Logic, Inc. + * + * Authors: Paul Handrigan <Paul.Handrigan(a)cirrus.com>, + * Tim Howe <Tim.Howe(a)cirrus.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include <linux/module.h> +#include <linux/moduleparam.h> +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/delay.h> +#include <linux/gpio.h> +#include <linux/gpio/consumer.h> +#include <linux/of_gpio.h> +#include <linux/platform_device.h> +#include <linux/pm.h> +#include <linux/i2c.h> +#include <linux/of_device.h> +#include <linux/regmap.h> +#include <linux/slab.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/soc.h> +#include <sound/soc-dapm.h> +#include <sound/initval.h> +#include <sound/tlv.h> +#include "cs53l30.h" + +struct cs53l30_private { + struct regmap *regmap; + struct gpio_desc *reset_gpio; + u8 asp_config_ctl; + u32 mclk; +}; + +static const struct reg_default cs53l30_reg_defaults[] = { + { CS53L30_PWRCTL, THMS_PDN }, + { CS53L30_MCLKCTL, MCLK_DIV_DFLT }, + { CS53L30_INT_SR_CTL, INTERNAL_FS_DFLT }, + { CS53L30_MICBIAS_CTL, MIC_BIAS_DFLT }, + { CS53L30_ASPCFG_CTL, ASP_RATE_48K }, + { CS53L30_ASP1_CTL, ASP1_TDM_PDN }, + { CS53L30_ASP1_TDMTX_CTL1, ASP1_CHX_TX_DFLT_SLT47 }, + { CS53L30_ASP1_TDMTX_CTL2, ASP1_CHX_TX_DFLT_SLT47 }, + { CS53L30_ASP1_TDMTX_CTL3, ASP1_CHX_TX_DFLT_SLT47 }, + { CS53L30_ASP1_TDMTX_CTL4, ASP1_CHX_TX_DFLT_SLT47 }, + { CS53L30_ASP1_TDMTX_EN1, ASP_TX_DISABLED }, + { CS53L30_ASP1_TDMTX_EN2, ASP_TX_DISABLED }, + { CS53L30_ASP1_TDMTX_EN3, ASP_TX_DISABLED }, + { CS53L30_ASP1_TDMTX_EN4, ASP_TX_DISABLED }, + { CS53L30_ASP1_TDMTX_EN5, ASP_TX_DISABLED }, + { CS53L30_ASP1_TDMTX_EN6, ASP_TX_DISABLED }, + { CS53L30_ASP2_CTL, ASP2_CTRL_DFLT }, + { CS53L30_SFT_RAMP, SFT_RMP_DFLT }, + { CS53L30_LRCLK_CTL1, LRCK_CTLX_DFLT }, + { CS53L30_LRCLK_CTL2, LRCK_CTLX_DFLT }, + { CS53L30_MUTEP_CTL1, MUTEP_CTRL1_DFLT }, + { CS53L30_MUTEP_CTL2, MUTE_PDN_ULP }, + { CS53L30_INBIAS_CTL1, INBIAS_CTLX_DFLT }, + { CS53L30_INBIAS_CTL2, INBIAS_CTLX_DFLT }, + { CS53L30_DMIC1_STR_CTL, DMIC1_STEREO_DFLT }, + { CS53L30_DMIC2_STR_CTL, DMIC2_STEREO_DFLT }, + { CS53L30_ADCDMIC1_CTL1, ADC1_ON_CH_AB_IN }, + { CS53L30_ADCDMIC1_CTL2, ADC1_DMIC1_CTL2_DFLT }, + { CS53L30_ADC1_CTL3, ADC1_HPF_EN }, + { CS53L30_ADC1_NG_CTL, ADCX_ZERO_DFLT }, + { CS53L30_ADC1A_AFE_CTL, ADCX_ZERO_DFLT }, + { CS53L30_ADC1B_AFE_CTL, ADCX_ZERO_DFLT }, + { CS53L30_ADC1A_DIG_VOL, ADCX_ZERO_DFLT }, + { CS53L30_ADC1B_DIG_VOL, ADCX_ZERO_DFLT }, + { CS53L30_ADCDMIC2_CTL1, ADC2_ON_CH_AB_IN }, + { CS53L30_ADCDMIC2_CTL2, ADCX_ZERO_DFLT }, + { CS53L30_ADC2_CTL3, ADC2_HPF_EN }, + { CS53L30_ADC2_NG_CTL, ADCX_ZERO_DFLT }, + { CS53L30_ADC2A_AFE_CTL, ADCX_ZERO_DFLT }, + { CS53L30_ADC2B_AFE_CTL, ADCX_ZERO_DFLT }, + { CS53L30_ADC2A_DIG_VOL, ADCX_ZERO_DFLT }, + { CS53L30_ADC2B_DIG_VOL, ADCX_ZERO_DFLT }, + { CS53L30_INT_MASK, DEVICE_INT_MASK }, +}; + +static bool cs53l30_volatile_register(struct device *dev, unsigned int reg) +{ + if (reg == CS53L30_IS) + return true; + else + return false; +} + +static bool cs53l30_readable_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case CS53L30_DEVID_AB: + case CS53L30_DEVID_CD: + case CS53L30_DEVID_E: + case CS53L30_REVID: + case CS53L30_PWRCTL: + case CS53L30_MCLKCTL: + case CS53L30_INT_SR_CTL: + case CS53L30_MICBIAS_CTL: + case CS53L30_ASPCFG_CTL: + case CS53L30_ASP1_CTL: + case CS53L30_ASP1_TDMTX_CTL1: + case CS53L30_ASP1_TDMTX_CTL2: + case CS53L30_ASP1_TDMTX_CTL3: + case CS53L30_ASP1_TDMTX_CTL4: + case CS53L30_ASP1_TDMTX_EN1: + case CS53L30_ASP1_TDMTX_EN2: + case CS53L30_ASP1_TDMTX_EN3: + case CS53L30_ASP1_TDMTX_EN4: + case CS53L30_ASP1_TDMTX_EN5: + case CS53L30_ASP1_TDMTX_EN6: + case CS53L30_ASP2_CTL: + case CS53L30_SFT_RAMP: + case CS53L30_LRCLK_CTL1: + case CS53L30_LRCLK_CTL2: + case CS53L30_MUTEP_CTL1: + case CS53L30_MUTEP_CTL2: + case CS53L30_INBIAS_CTL1: + case CS53L30_INBIAS_CTL2: + case CS53L30_DMIC1_STR_CTL: + case CS53L30_DMIC2_STR_CTL: + case CS53L30_ADCDMIC1_CTL1: + case CS53L30_ADCDMIC1_CTL2: + case CS53L30_ADC1_CTL3: + case CS53L30_ADC1_NG_CTL: + case CS53L30_ADC1A_AFE_CTL: + case CS53L30_ADC1B_AFE_CTL: + case CS53L30_ADC1A_DIG_VOL: + case CS53L30_ADC1B_DIG_VOL: + case CS53L30_ADCDMIC2_CTL1: + case CS53L30_ADCDMIC2_CTL2: + case CS53L30_ADC2_CTL3: + case CS53L30_ADC2_NG_CTL: + case CS53L30_ADC2A_AFE_CTL: + case CS53L30_ADC2B_AFE_CTL: + case CS53L30_ADC2A_DIG_VOL: + case CS53L30_ADC2B_DIG_VOL: + case CS53L30_INT_MASK: + return true; + default: + return false; + } +} + +static DECLARE_TLV_DB_SCALE(adc_boost_tlv, 0, 2000, 0); +static DECLARE_TLV_DB_SCALE(adc_ng_boost_tlv, 0, 3000, 0); +static DECLARE_TLV_DB_SCALE(pga_tlv, -600, 50, 0); + +static DECLARE_TLV_DB_SCALE(dig_tlv, -9600, 100, 1); + +static const char * const input1_sel_text[] = { "DMIC1 On AB In", + "DMIC1 On A In", "DMIC1 On B In", "ADC1 On AB In", "ADC1 On A In", + "ADC1 On B In", "DMIC1 Off ADC1 Off", }; + +unsigned int const input1_sel_values[] = { DMIC1_ON_CH_AB_IN, DMIC1_ON_CH_A_IN, + DMIC1_ON_CH_B_IN, ADC1_ON_CH_AB_IN, ADC1_ON_CH_A_IN, ADC1_ON_CH_B_IN, + DMIC1_OFF_ADC1_OFF, }; + +static const char * const input2_sel_text[] = { "DMIC2 On AB In", + "DMIC2 On A In", "DMIC2 On B In", "ADC2 On AB In", "ADC2 On A In", + "ADC2 On B In", "DMIC2 Off ADC2 Off", }; + +unsigned int const input2_sel_values[] = { DMIC2_ON_CH_AB_IN, DMIC2_ON_CH_A_IN, + DMIC2_ON_CH_B_IN, ADC2_ON_CH_AB_IN, ADC2_ON_CH_A_IN, ADC2_ON_CH_B_IN, + DMIC2_OFF_ADC2_OFF, }; + +static const char * const input1_route_sel_text[] = { "ADC1_SEL", + "DMIC1_SEL" }; + +static const struct soc_enum input1_route_sel_enum = + SOC_ENUM_SINGLE(CS53L30_ADCDMIC1_CTL1, 0, + ARRAY_SIZE(input1_route_sel_text), input1_route_sel_text); + +static SOC_VALUE_ENUM_SINGLE_DECL(input1_sel_enum, CS53L30_ADCDMIC1_CTL1, 0, + ADC1_DMIC1_PDN_MASK, input1_sel_text, input1_sel_values); + +static const struct snd_kcontrol_new input1_route_sel_mux = + SOC_DAPM_ENUM("Input 1 Route", input1_route_sel_enum); + +static const char * const input2_route_sel_text[] = { "ADC2_SEL", + "DMIC2_SEL" }; + +/* Note: CS53L30_ADCDMIC1_CTL1 CH_TYPE controls inputs 1 and 2 */ +static const struct soc_enum input2_route_sel_enum = + SOC_ENUM_SINGLE(CS53L30_ADCDMIC1_CTL1, 0, + ARRAY_SIZE(input2_route_sel_text), input2_route_sel_text); + +static SOC_VALUE_ENUM_SINGLE_DECL(input2_sel_enum, CS53L30_ADCDMIC2_CTL1, 0, + ADC1_DMIC1_PDN_MASK, input2_sel_text, input2_sel_values); + +static const struct snd_kcontrol_new input2_route_sel_mux = + SOC_DAPM_ENUM("Input 2 Route", input2_route_sel_enum); + +/* + * TB = 6144*(MCLK(int) scaling factor)/MCLK(internal) + * TB - Time base + * NOTE: If MCLK_INT_SCALE = 0, then TB=1 + */ +static const char * const cs53l30_ng_delay_text[] = { + "TB*50ms", "TB*100ms", "TB*150ms", "TB*200ms" }; + +static const struct soc_enum adc1_ng_delay_enum = + SOC_ENUM_SINGLE(CS53L30_ADC1_NG_CTL, 0, + ARRAY_SIZE(cs53l30_ng_delay_text), cs53l30_ng_delay_text); + +static const struct soc_enum adc2_ng_delay_enum = + SOC_ENUM_SINGLE(CS53L30_ADC2_NG_CTL, 0, + ARRAY_SIZE(cs53l30_ng_delay_text), cs53l30_ng_delay_text); + +/* The noise gate threshold selected will depend on NG Boost */ +static const char * const cs53l30_ng_thres_text[] = { + "-64dB/-34dB", "-66dB/-36dB", "-70dB/-40dB", "-73dB/-43dB", + "-76dB/-46dB", "-82dB/-52dB", "-58dB", "-64dB"}; + +static const struct soc_enum adc1_ng_thres_enum = + SOC_ENUM_SINGLE(CS53L30_ADC1_NG_CTL, 2, + ARRAY_SIZE(cs53l30_ng_thres_text), cs53l30_ng_thres_text); + +static const struct soc_enum adc2_ng_thres_enum = + SOC_ENUM_SINGLE(CS53L30_ADC2_NG_CTL, 2, + ARRAY_SIZE(cs53l30_ng_thres_text), cs53l30_ng_thres_text); + +/* ADC Preamp gain select */ +static const char * const cs53l30_preamp_gain_sel_text[] = { + "0dB", "10dB", "20dB"}; + +static const struct soc_enum adc1a_preamp_gain_enum = + SOC_ENUM_SINGLE(CS53L30_ADC1A_AFE_CTL, 6, + ARRAY_SIZE(cs53l30_preamp_gain_sel_text), + cs53l30_preamp_gain_sel_text); + +static const struct soc_enum adc1b_preamp_gain_enum = + SOC_ENUM_SINGLE(CS53L30_ADC1B_AFE_CTL, 6, + ARRAY_SIZE(cs53l30_preamp_gain_sel_text), + cs53l30_preamp_gain_sel_text); + +static const struct soc_enum adc2a_preamp_gain_enum = + SOC_ENUM_SINGLE(CS53L30_ADC2A_AFE_CTL, 6, + ARRAY_SIZE(cs53l30_preamp_gain_sel_text), + cs53l30_preamp_gain_sel_text); + +static const struct soc_enum adc2b_preamp_gain_enum = + SOC_ENUM_SINGLE(CS53L30_ADC2B_AFE_CTL, 6, + ARRAY_SIZE(cs53l30_preamp_gain_sel_text), + cs53l30_preamp_gain_sel_text); + +/* Set MIC Bias Voltage Control */ +static const char * const cs53l30_micbias_text[] = { + "HiZ", "1.8V", "2.75V"}; + +static const struct soc_enum micbias_enum = + SOC_ENUM_SINGLE(CS53L30_MICBIAS_CTL, 0, + ARRAY_SIZE(cs53l30_micbias_text), + cs53l30_micbias_text); + +/* Corner frequencies are with an Fs of 48kHz. */ +static const char * const hpf_corner_freq_text[] = { + "1.86Hz", "120Hz", "235Hz", "466Hz"}; + +static const struct soc_enum adc1_hpf_enum = + SOC_ENUM_SINGLE(CS53L30_ADC1_CTL3, 1, + ARRAY_SIZE(hpf_corner_freq_text), hpf_corner_freq_text); + +static const struct soc_enum adc2_hpf_enum = + SOC_ENUM_SINGLE(CS53L30_ADC2_CTL3, 1, + ARRAY_SIZE(hpf_corner_freq_text), hpf_corner_freq_text); + +static const struct snd_kcontrol_new cs53l30_snd_controls[] = { + SOC_SINGLE("Digital Soft-Ramp Switch", CS53L30_SFT_RAMP, 5, 1, 0), + SOC_SINGLE("ADC1 Noise Gate Ganging Switch", + CS53L30_ADC1_CTL3, 0, 1, 0), + SOC_SINGLE("ADC2 Noise Gate Ganging Switch", + CS53L30_ADC2_CTL3, 0, 1, 0), + SOC_SINGLE("ADC1A Noise Gate Enable Switch", + CS53L30_ADC1_NG_CTL, 6, 1, 0), + SOC_SINGLE("ADC1B Noise Gate Enable Switch", + CS53L30_ADC1_NG_CTL, 7, 1, 0), + SOC_SINGLE("ADC2A Noise Gate Enable Switch", + CS53L30_ADC2_NG_CTL, 6, 1, 0), + SOC_SINGLE("ADC2B Noise Gate Enable Switch", + CS53L30_ADC2_NG_CTL, 7, 1, 0), + SOC_SINGLE("ADC1 Notch Filter Switch", + CS53L30_ADCDMIC1_CTL2, 7, 1, 1), + SOC_SINGLE("ADC2 Notch Filter Switch", + CS53L30_ADCDMIC2_CTL2, 7, 1, 1), + SOC_SINGLE("ADC1A Invert Switch", + CS53L30_ADCDMIC1_CTL2, 4, 1, 0), + SOC_SINGLE("ADC1B Invert Switch", + CS53L30_ADCDMIC1_CTL2, 5, 1, 0), + SOC_SINGLE("ADC2A Invert Switch", + CS53L30_ADCDMIC2_CTL2, 4, 1, 0), + SOC_SINGLE("ADC2B Invert Switch", + CS53L30_ADCDMIC2_CTL2, 5, 1, 0), + + SOC_SINGLE_TLV("ADC1A Digital Boost Volume", + CS53L30_ADCDMIC1_CTL2, 0, 1, 0, adc_boost_tlv), + SOC_SINGLE_TLV("ADC1B Digital Boost Volume", + CS53L30_ADCDMIC1_CTL2, 1, 1, 0, adc_boost_tlv), + SOC_SINGLE_TLV("ADC2A Digital Boost Volume", + CS53L30_ADCDMIC2_CTL2, 0, 1, 0, adc_boost_tlv), + SOC_SINGLE_TLV("ADC2B Digital Boost Volume", + CS53L30_ADCDMIC2_CTL2, 1, 1, 0, adc_boost_tlv), + SOC_SINGLE_TLV("ADC1 NG Boost Volume", + CS53L30_ADC1_NG_CTL, 5, 1, 0, adc_ng_boost_tlv), + SOC_SINGLE_TLV("ADC2 NG Boost Volume", + CS53L30_ADC2_NG_CTL, 5, 1, 0, adc_ng_boost_tlv), + + SOC_ENUM("Input 1 Channel Select", input1_sel_enum), + SOC_ENUM("Input 2 Channel Select", input2_sel_enum), + + SOC_ENUM("ADC1 HPF Select", adc1_hpf_enum), + SOC_ENUM("ADC2 HPF Select", adc2_hpf_enum), + SOC_ENUM("ADC1 NG Threshold", adc1_ng_thres_enum), + SOC_ENUM("ADC2 NG Threshold", adc2_ng_thres_enum), + SOC_ENUM("ADC1 NG Delay", adc1_ng_delay_enum), + SOC_ENUM("ADC2 NG Delay", adc2_ng_delay_enum), + SOC_ENUM("ADC1A Pre Amp Gain", adc1a_preamp_gain_enum), + SOC_ENUM("ADC1B Pre Amp Gain", adc1b_preamp_gain_enum), + SOC_ENUM("ADC2A Pre Amp Gain", adc2a_preamp_gain_enum), + SOC_ENUM("ADC2B Pre Amp Gain", adc2b_preamp_gain_enum), + SOC_ENUM("Mic Bias Voltage Select", micbias_enum), + + SOC_SINGLE_SX_TLV("ADC1A PGA Volume", + CS53L30_ADC1A_AFE_CTL, 0, 0x34, 0x18, pga_tlv), + SOC_SINGLE_SX_TLV("ADC1B PGA Volume", + CS53L30_ADC1B_AFE_CTL, 0, 0x34, 0x18, pga_tlv), + SOC_SINGLE_SX_TLV("ADC2A PGA Volume", + CS53L30_ADC2A_AFE_CTL, 0, 0x34, 0x18, pga_tlv), + SOC_SINGLE_SX_TLV("ADC2B PGA Volume", + CS53L30_ADC2B_AFE_CTL, 0, 0x34, 0x18, pga_tlv), + + SOC_SINGLE_SX_TLV("ADC1A Digital Volume", + CS53L30_ADC1A_DIG_VOL, 0, 0xA0, 0x0C, dig_tlv), + SOC_SINGLE_SX_TLV("ADC1B Digital Volume", + CS53L30_ADC1B_DIG_VOL, 0, 0xA0, 0x0C, dig_tlv), + SOC_SINGLE_SX_TLV("ADC2A Digital Volume", + CS53L30_ADC2A_DIG_VOL, 0, 0xA0, 0x0C, dig_tlv), + SOC_SINGLE_SX_TLV("ADC2B Digital Volume", + CS53L30_ADC2B_DIG_VOL, 0, 0xA0, 0x0C, dig_tlv), +}; + +static int cs53l30_asp_sdout_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); + struct cs53l30_private *priv = snd_soc_codec_get_drvdata(codec); + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + regmap_update_bits(priv->regmap, CS53L30_ASP1_CTL, + ASP1_3ST, 0); + break; + case SND_SOC_DAPM_POST_PMD: + regmap_update_bits(priv->regmap, CS53L30_ASP1_CTL, + ASP1_3ST, 1); + break; + default: + pr_err("Invalid event = 0x%x\n", event); + return -EINVAL; + } + + return 0; +} + +static const struct snd_soc_dapm_widget cs53l30_dapm_widgets[] = { + SND_SOC_DAPM_INPUT("IN1_DMIC1"), + SND_SOC_DAPM_INPUT("IN2"), + SND_SOC_DAPM_INPUT("IN3_DMIC2"), + SND_SOC_DAPM_INPUT("IN4"), + SND_SOC_DAPM_SUPPLY("MIC1 Bias", CS53L30_MICBIAS_CTL, 4, 1, NULL, 0), + SND_SOC_DAPM_SUPPLY("MIC2 Bias", CS53L30_MICBIAS_CTL, 5, 1, NULL, 0), + SND_SOC_DAPM_SUPPLY("MIC3 Bias", CS53L30_MICBIAS_CTL, 6, 1, NULL, 0), + SND_SOC_DAPM_SUPPLY("MIC4 Bias", CS53L30_MICBIAS_CTL, 7, 1, NULL, 0), + + SND_SOC_DAPM_AIF_OUT_E("ASP_SDOUT1", NULL, 0, + CS53L30_ASP1_CTL, ASP1_SDOUT_PDN, + 1, cs53l30_asp_sdout_event, + (SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD)), + SND_SOC_DAPM_AIF_OUT_E("ASP_SDOUT2", NULL, 0, + CS53L30_ASP2_CTL, ASP2_SDOUT_PDN, + 1, cs53l30_asp_sdout_event, + (SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD)), + + SND_SOC_DAPM_MUX("Input Mux 1", SND_SOC_NOPM, 0, 0, + &input1_route_sel_mux), + SND_SOC_DAPM_MUX("Input Mux 2", SND_SOC_NOPM, 0, 0, + &input2_route_sel_mux), + + SND_SOC_DAPM_ADC("ADC1A", NULL, CS53L30_ADCDMIC1_CTL1, 6, 1), + SND_SOC_DAPM_ADC("ADC1B", NULL, CS53L30_ADCDMIC1_CTL1, 7, 1), + SND_SOC_DAPM_ADC("ADC2A", NULL, CS53L30_ADCDMIC2_CTL1, 6, 1), + SND_SOC_DAPM_ADC("ADC2B", NULL, CS53L30_ADCDMIC2_CTL1, 7, 1), + SND_SOC_DAPM_ADC("DMIC1", NULL, CS53L30_ADCDMIC1_CTL1, 2, 1), + SND_SOC_DAPM_ADC("DMIC2", NULL, CS53L30_ADCDMIC2_CTL1, 2, 1), +}; + +static const struct snd_soc_dapm_route cs53l30_audio_map[] = { + + /* ADC Input Paths */ + {"ADC1A", NULL, "IN1_DMIC1"}, + {"Input Mux 1", "ADC1_SEL", "ADC1A"}, + {"ADC1B", NULL, "IN2"}, + + {"ADC2A", NULL, "IN3_DMIC2"}, + {"Input Mux 2", "ADC2_SEL", "ADC2A"}, + {"ADC2B", NULL, "IN4"}, + + /* MIC Bias Paths */ + {"ADC1A", NULL, "MIC1 Bias"}, + {"ADC1B", NULL, "MIC2 Bias"}, + {"ADC2A", NULL, "MIC3 Bias"}, + {"ADC2B", NULL, "MIC4 Bias"}, + + /* DMIC Paths */ + {"DMIC1", NULL, "IN1_DMIC1"}, + {"Input Mux 1", "DMIC1_SEL", "DMIC1"}, + + {"DMIC2", NULL, "IN3_DMIC2"}, + {"Input Mux 2", "DMIC2_SEL", "DMIC2"}, + + /* Output Paths */ + {"ASP_SDOUT1", NULL, "ADC1A" }, + {"ASP_SDOUT1", NULL, "Input Mux 1"}, + {"ASP_SDOUT1", NULL, "ADC1B"}, + + {"ASP_SDOUT2", NULL, "ADC2A"}, + {"ASP_SDOUT2", NULL, "Input Mux 2"}, + {"ASP_SDOUT2", NULL, "ADC2B"}, + + {"ASP1 Capture", NULL, "ASP_SDOUT1"}, + {"ASP2 Capture", NULL, "ASP_SDOUT2"}, +}; + +struct cs53l30_mclk_div { + u32 mclk; + u32 srate; + u8 asp_rate; + u8 internal_fs_ratio; + u8 mclk_int_scale; +}; + +static struct cs53l30_mclk_div cs53l30_mclk_coeffs[] = { + /* NOTE: Enable MCLK_INT_SCALE to save power. */ + + /* MCLK, Sample Rate, asp_rate, internal_fs_ratio, mclk_int_scale */ + {5644800, 11025, 0x4, 1, 1}, + {5644800, 22050, 0x8, 1, 1}, + {5644800, 44100, 0xC, 1, 1}, + + {6000000, 8000, 0x1, 0, 1}, + {6000000, 11025, 0x2, 0, 1}, + {6000000, 12000, 0x4, 0, 1}, + {6000000, 16000, 0x5, 0, 1}, + {6000000, 22050, 0x6, 0, 1}, + {6000000, 24000, 0x8, 0, 1}, + {6000000, 32000, 0x9, 0, 1}, + {6000000, 44100, 0xA, 0, 1}, + {6000000, 48000, 0xC, 0, 1}, + + {6144000, 8000, 0x1, 1, 1}, + {6144000, 11025, 0x2, 1, 1}, + {6144000, 12000, 0x4, 1, 1}, + {6144000, 16000, 0x5, 1, 1}, + {6144000, 22050, 0x6, 1, 1}, + {6144000, 24000, 0x8, 1, 1}, + {6144000, 32000, 0x9, 1, 1}, + {6144000, 44100, 0xA, 1, 1}, + {6144000, 48000, 0xC, 1, 1}, + + {6400000, 8000, 0x1, 1, 1}, + {6400000, 11025, 0x2, 1, 1}, + {6400000, 12000, 0x4, 1, 1}, + {6400000, 16000, 0x5, 1, 1}, + {6400000, 22050, 0x6, 1, 1}, + {6400000, 24000, 0x8, 1, 1}, + {6400000, 32000, 0x9, 1, 1}, + {6400000, 44100, 0xA, 1, 1}, + {6400000, 48000, 0xC, 1, 1}, +}; + +struct cs53l30_mclkx_div { + u32 mclkx; + u8 ratio; + u8 mclkdiv; +}; + +static struct cs53l30_mclkx_div cs53l30_mclkx_coeffs[] = { + {5644800, 1, 0}, + {6000000, 1, 0}, + {6144000, 1, 0}, + {11289600, 2, 1}, + {12288000, 2, 1}, + {12000000, 2, 1}, + {19200000, 3, 2}, +}; + +static int cs53l30_get_mclkx_coeff(int mclkx) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(cs53l30_mclkx_coeffs); i++) { + if (cs53l30_mclkx_coeffs[i].mclkx == mclkx) + return i; + } + return -EINVAL; +} + +static int cs53l30_get_mclk_coeff(int mclk, int srate) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(cs53l30_mclk_coeffs); i++) { + if (cs53l30_mclk_coeffs[i].mclk == mclk && + cs53l30_mclk_coeffs[i].srate == srate) + return i; + } + return -EINVAL; + +} + +static int cs53l30_set_sysclk(struct snd_soc_dai *dai, + int clk_id, unsigned int freq, int dir) +{ + struct snd_soc_codec *codec = dai->codec; + struct cs53l30_private *priv = snd_soc_codec_get_drvdata(codec); + + int mclkx_coeff; + u32 mclk; + unsigned int mclk_ctl; + + /* MCLKX -> MCLK */ + mclkx_coeff = cs53l30_get_mclkx_coeff(freq); + if (mclkx_coeff < 0) + return mclkx_coeff; + + mclk = cs53l30_mclkx_coeffs[mclkx_coeff].mclkx / + cs53l30_mclkx_coeffs[mclkx_coeff].ratio; + + regmap_read(priv->regmap, CS53L30_MCLKCTL, &mclk_ctl); + mclk_ctl &= ~MCLK_DIV; + mclk_ctl |= cs53l30_mclkx_coeffs[mclkx_coeff].mclkdiv; + + regmap_write(priv->regmap, CS53L30_MCLKCTL, mclk_ctl); + priv->mclk = mclk; + return 0; +} + +static int cs53l30_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) +{ + struct snd_soc_codec *codec = codec_dai->codec; + struct cs53l30_private *priv = snd_soc_codec_get_drvdata(codec); + unsigned int asp_config_ctl; + + regmap_read(priv->regmap, CS53L30_ASPCFG_CTL, &asp_config_ctl); + + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBM_CFM: + asp_config_ctl |= ASP_MS; + break; + + case SND_SOC_DAIFMT_CBS_CFS: + asp_config_ctl &= ~ASP_MS; + break; + + default: + return -EINVAL; + } + + /* Check to see if the SCLK is inverted */ + if (fmt & (SND_SOC_DAIFMT_IB_NF | SND_SOC_DAIFMT_IB_IF)) + asp_config_ctl |= ASP_SCLK_INV; + else + asp_config_ctl &= ~ASP_SCLK_INV; + + priv->asp_config_ctl = asp_config_ctl; + return 0; +} + +static int cs53l30_pcm_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct snd_soc_codec *codec = dai->codec; + struct cs53l30_private *priv = snd_soc_codec_get_drvdata(codec); + int mclk_coeff; + int srate = params_rate(params); + unsigned int int_sr_ctl, mclk_ctl; + + /* MCLK -> srate */ + mclk_coeff = + cs53l30_get_mclk_coeff(priv->mclk, srate); + if (mclk_coeff < 0) + return -EINVAL; + + regmap_write(priv->regmap, CS53L30_ASPCFG_CTL, priv->asp_config_ctl); + regmap_read(priv->regmap, CS53L30_INT_SR_CTL, &int_sr_ctl); + if (cs53l30_mclk_coeffs[mclk_coeff].internal_fs_ratio) + int_sr_ctl |= INTERNAL_FS_RATIO; + else + int_sr_ctl &= ~INTERNAL_FS_RATIO; + regmap_write(priv->regmap, CS53L30_INT_SR_CTL, int_sr_ctl); + + regmap_read(priv->regmap, CS53L30_MCLKCTL, &mclk_ctl); + if (cs53l30_mclk_coeffs[mclk_coeff].mclk_int_scale) + mclk_ctl |= MCLK_INT_SCALE; + else + mclk_ctl &= ~MCLK_INT_SCALE; + + regmap_write(priv->regmap, CS53L30_MCLKCTL, mclk_ctl); + priv->asp_config_ctl &= ASP_CNFG_MASK; + priv->asp_config_ctl |= (cs53l30_mclk_coeffs[mclk_coeff].asp_rate + & ASP_RATE); + regmap_write(priv->regmap, CS53L30_MCLKCTL, priv->asp_config_ctl); + + return 0; +} + +static int cs53l30_set_bias_level(struct snd_soc_codec *codec, + enum snd_soc_bias_level level) +{ + struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); + struct cs53l30_private *priv = snd_soc_codec_get_drvdata(codec); + unsigned int reg; + int i, inter_max_check; + + switch (level) { + case SND_SOC_BIAS_ON: + break; + case SND_SOC_BIAS_PREPARE: + if (dapm->bias_level == SND_SOC_BIAS_STANDBY) + regmap_update_bits(priv->regmap, CS53L30_PWRCTL, + PDN_LP, 0); + break; + case SND_SOC_BIAS_STANDBY: + if (dapm->bias_level == SND_SOC_BIAS_OFF) { + regmap_update_bits(priv->regmap, CS53L30_MCLKCTL, + MCLK_DIS, 0); + regmap_update_bits(priv->regmap, CS53L30_PWRCTL, + PDN_ULP, 0); + msleep(50); + } else { + regmap_update_bits(priv->regmap, CS53L30_PWRCTL, + PDN_LP, PDN_LP); + } + break; + + case SND_SOC_BIAS_OFF: + regmap_update_bits(priv->regmap, CS53L30_INT_MASK, + PDN_DONE, 0); + /* If digital softramp is set, the amount of time required + * for power down increases and depends on the digital + * volume setting. + */ + + /* Set the max possible time if digsft is set */ + regmap_read(priv->regmap, CS53L30_SFT_RAMP, &reg); + if (reg & DIGSFT) + inter_max_check = PDN_POLL_MAX; + else + inter_max_check = 10; + + regmap_update_bits(priv->regmap, CS53L30_PWRCTL, + PDN_ULP, PDN_ULP); + msleep(20); /* PDN_DONE will take a min of 20ms to be set.*/ + regmap_read(priv->regmap, CS53L30_IS, &reg); /* Clr status */ + for (i = 0; i < inter_max_check; i++) { + usleep_range(1000, 1000); + msleep(1); + regmap_read(priv->regmap, CS53L30_IS, &reg); + if (reg & PDN_DONE) + break; + } + /* PDN_DONE is set. We now can disable the MCLK */ + regmap_update_bits(priv->regmap, CS53L30_INT_MASK, + PDN_DONE, PDN_DONE); + regmap_update_bits(priv->regmap, CS53L30_MCLKCTL, + MCLK_DIS, MCLK_DIS); + break; + } + dapm->bias_level = level; + + return 0; +} + +static int cs53l30_set_tristate(struct snd_soc_dai *dai, int tristate) +{ + struct snd_soc_codec *codec = dai->codec; + struct cs53l30_private *priv = snd_soc_codec_get_drvdata(codec); + + return regmap_update_bits(priv->regmap, CS53L30_ASP1_CTL, ASP1_3ST, + (ASP1_3ST_VAL(tristate) & ASP1_3ST)); +} + +unsigned int const cs53l30_src_rates[] = { + 8000, 11025, 12000, 16000, 22050, + 24000, 32000, 44100, 48000 +}; + +static struct snd_pcm_hw_constraint_list src_constraints = { + .count = ARRAY_SIZE(cs53l30_src_rates), + .list = cs53l30_src_rates, +}; + +static int cs53l30_pcm_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + snd_pcm_hw_constraint_list(substream->runtime, 0, + SNDRV_PCM_HW_PARAM_RATE, + &src_constraints); + + return 0; +} + +/* SNDRV_PCM_RATE_KNOT -> 12000, 24000 Hz, limit with constraint list */ +#define CS53L30_RATES (SNDRV_PCM_RATE_8000_48000 | SNDRV_PCM_RATE_KNOT) + +#define CS53L30_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ + SNDRV_PCM_FMTBIT_S24_LE) + +static const struct snd_soc_dai_ops cs53l30_ops = { + .startup = cs53l30_pcm_startup, + .hw_params = cs53l30_pcm_hw_params, + .set_fmt = cs53l30_set_dai_fmt, + .set_sysclk = cs53l30_set_sysclk, + .set_tristate = cs53l30_set_tristate, +}; + +static struct snd_soc_dai_driver cs53l30_dai[] = { + { + .name = "cs53l30-asp1", + .id = CS53L30_ASP1, + .capture = { + .stream_name = "ASP1 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = CS53L30_RATES, + .formats = CS53L30_FORMATS, + }, + .ops = &cs53l30_ops, + .symmetric_rates = 1, + }, + { + .name = "cs53l30-asp2", + .id = CS53L30_ASP2, + .capture = { + .stream_name = "ASP2 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = CS53L30_RATES, + .formats = CS53L30_FORMATS, + }, + .ops = &cs53l30_ops, + .symmetric_rates = 1, + } +}; + +static struct snd_soc_codec_driver soc_codec_dev_cs53l30 = { + .set_bias_level = cs53l30_set_bias_level, + + .dapm_widgets = cs53l30_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(cs53l30_dapm_widgets), + .dapm_routes = cs53l30_audio_map, + .num_dapm_routes = ARRAY_SIZE(cs53l30_audio_map), + + .controls = cs53l30_snd_controls, + .num_controls = ARRAY_SIZE(cs53l30_snd_controls), +}; + +static struct regmap_config cs53l30_regmap = { + .reg_bits = 8, + .val_bits = 8, + + .max_register = CS53L30_MAX_REGISTER, + .reg_defaults = cs53l30_reg_defaults, + .num_reg_defaults = ARRAY_SIZE(cs53l30_reg_defaults), + .volatile_reg = cs53l30_volatile_register, + .readable_reg = cs53l30_readable_register, + .cache_type = REGCACHE_RBTREE, +}; + +static int cs53l30_i2c_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct cs53l30_private *cs53l30; + int ret = 0; + unsigned int devid = 0; + unsigned int reg; + + cs53l30 = devm_kzalloc(&client->dev, + sizeof(struct cs53l30_private), GFP_KERNEL); + if (!cs53l30) { + dev_err(&client->dev, "could not allocate codec\n"); + return -ENOMEM; + } + + /* Reset the Device */ + cs53l30->reset_gpio = devm_gpiod_get_optional(&client->dev, + "reset", GPIOD_OUT_LOW); + if (IS_ERR(cs53l30->reset_gpio)) + return PTR_ERR(cs53l30->reset_gpio); + + if (cs53l30->reset_gpio) + gpiod_set_value_cansleep(cs53l30->reset_gpio, 1); + + i2c_set_clientdata(client, cs53l30); + + cs53l30->mclk = 0; + + cs53l30->regmap = devm_regmap_init_i2c(client, &cs53l30_regmap); + if (IS_ERR(cs53l30->regmap)) { + ret = PTR_ERR(cs53l30->regmap); + dev_err(&client->dev, "regmap_init() failed: %d\n", ret); + return ret; + } + /* initialize codec */ + ret = regmap_read(cs53l30->regmap, CS53L30_DEVID_AB, &reg); + devid = reg << 12; + + ret = regmap_read(cs53l30->regmap, CS53L30_DEVID_CD, &reg); + devid |= reg << 4; + + ret = regmap_read(cs53l30->regmap, CS53L30_DEVID_E, &reg); + devid |= (reg & 0xF0) >> 4; + + if (devid != CS53L30_DEVID) { + ret = -ENODEV; + dev_err(&client->dev, + "CS53L30 Device ID (%X). Expected %X\n", + devid, CS53L30_DEVID); + return ret; + } + + ret = regmap_read(cs53l30->regmap, CS53L30_REVID, &reg); + if (ret < 0) { + dev_err(&client->dev, "Get Revision ID failed\n"); + return ret; + } + + dev_info(&client->dev, + "Cirrus Logic CS53L30, Revision: %02X\n", reg & 0xFF); + + ret = snd_soc_register_codec(&client->dev, + &soc_codec_dev_cs53l30, cs53l30_dai, + ARRAY_SIZE(cs53l30_dai)); + return ret; +} + +static int cs53l30_i2c_remove(struct i2c_client *client) +{ + struct cs53l30_private *cs53l30 = i2c_get_clientdata(client); + + snd_soc_unregister_codec(&client->dev); + + /* Hold down reset */ + if (cs53l30->reset_gpio) + gpiod_set_value_cansleep(cs53l30->reset_gpio, 0); + + return 0; +} + +#ifdef CONFIG_PM +static int cs53l30_runtime_suspend(struct device *dev) +{ + struct cs53l30_private *cs53l30 = dev_get_drvdata(dev); + + regcache_cache_only(cs53l30->regmap, true); + + /* Hold down reset */ + if (cs53l30->reset_gpio) + gpiod_set_value_cansleep(cs53l30->reset_gpio, 0); + + return 0; +} + +static int cs53l30_runtime_resume(struct device *dev) +{ + struct cs53l30_private *cs53l30 = dev_get_drvdata(dev); + + if (cs53l30->reset_gpio) + gpiod_set_value_cansleep(cs53l30->reset_gpio, 1); + + regcache_cache_only(cs53l30->regmap, false); + regcache_sync(cs53l30->regmap); + + return 0; +} +#endif + +static const struct dev_pm_ops cs53l30_runtime_pm = { + SET_RUNTIME_PM_OPS(cs53l30_runtime_suspend, cs53l30_runtime_resume, + NULL) +}; + +static const struct of_device_id cs53l30_of_match[] = { + { .compatible = "cirrus,cs53l30", }, + {}, +}; + +MODULE_DEVICE_TABLE(of, cs53l30_of_match); + +static const struct i2c_device_id cs53l30_id[] = { + {"cs53l30", 0}, + {} +}; + +MODULE_DEVICE_TABLE(i2c, cs53l30_id); + +static struct i2c_driver cs53l30_i2c_driver = { + .driver = { + .name = "cs53l30", + .owner = THIS_MODULE, + }, + .id_table = cs53l30_id, + .probe = cs53l30_i2c_probe, + .remove = cs53l30_i2c_remove, + +}; + +module_i2c_driver(cs53l30_i2c_driver); + +MODULE_DESCRIPTION("ASoC CS53L30 driver"); +MODULE_AUTHOR("Paul Handrigan, Cirrus Logic Inc, <Paul.Handrigan(a)cirrus.com>"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/codecs/cs53l30.h b/sound/soc/codecs/cs53l30.h new file mode 100644 index 0000000..f45e91f +++ b/sound/soc/codecs/cs53l30.h @@ -0,0 +1,272 @@ +/* + * ALSA SoC CS53L30 codec driver + * + * Copyright 2015 Cirrus Logic, Inc. + * + * Author: Paul Handrigan <Paul.Handrigan(a)cirrus.com>, + * Tim Howe <Tim.Howe(a)cirrus.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#ifndef __CS53L30_H__ +#define __CS53L30_H__ + +/* I2C Registers */ +#define CS53L30_DEVID_AB 0x01 /* Device ID A & B [RO]. */ +#define CS53L30_DEVID_CD 0x02 /* Device ID C & D [RO]. */ +#define CS53L30_DEVID_E 0x03 /* Device ID E [RO]. */ +#define CS53L30_REVID 0x05 /* Revision ID [RO]. */ +#define CS53L30_PWRCTL 0x06 /* Power Control. */ +#define CS53L30_MCLKCTL 0x07 /* MCLK Control. */ +#define CS53L30_INT_SR_CTL 0x08 /* Internal Sample Rate Control. */ +#define CS53L30_MICBIAS_CTL 0x0A /* Mic Bias Control. */ +#define CS53L30_ASPCFG_CTL 0x0C /* ASP Config Control. */ +#define CS53L30_ASP1_CTL 0x0D /* ASP1 Control. */ +#define CS53L30_ASP1_TDMTX_CTL1 0x0E /* ASP1 TDM TX Control 1 */ +#define CS53L30_ASP1_TDMTX_CTL2 0x0F /* ASP1 TDM TX Control 2 */ +#define CS53L30_ASP1_TDMTX_CTL3 0x10 /* ASP1 TDM TX Control 3 */ +#define CS53L30_ASP1_TDMTX_CTL4 0x11 /* ASP1 TDM TX Control 4 */ +#define CS53L30_ASP1_TDMTX_EN1 0x12 /* ASP1 TDM TX Enable 1 */ +#define CS53L30_ASP1_TDMTX_EN2 0x13 /* ASP1 TDM TX Enable 2 */ +#define CS53L30_ASP1_TDMTX_EN3 0x14 /* ASP1 TDM TX Enable 3 */ +#define CS53L30_ASP1_TDMTX_EN4 0x15 /* ASP1 TDM TX Enable 4 */ +#define CS53L30_ASP1_TDMTX_EN5 0x16 /* ASP1 TDM TX Enable 5 */ +#define CS53L30_ASP1_TDMTX_EN6 0x17 /* ASP1 TDM TX Enable 6 */ +#define CS53L30_ASP2_CTL 0x18 /* ASP2 Control. */ +#define CS53L30_SFT_RAMP 0x1A /* Soft Ramp Control. */ +#define CS53L30_LRCLK_CTL1 0x1B /* LRCLK Control 1. */ +#define CS53L30_LRCLK_CTL2 0x1C /* LRCLK Control 2. */ +#define CS53L30_MUTEP_CTL1 0x1F /* Mute Pin Control 1. */ +#define CS53L30_MUTEP_CTL2 0x20 /* Mute Pin Control 2. */ +#define CS53L30_INBIAS_CTL1 0x21 /* Input Bias Control 1. */ +#define CS53L30_INBIAS_CTL2 0x22 /* Input Bias Control 2. */ +#define CS53L30_DMIC1_STR_CTL 0x23 /* DMIC1 Stereo Control. */ +#define CS53L30_DMIC2_STR_CTL 0x24 /* DMIC2 Stereo Control. */ +#define CS53L30_ADCDMIC1_CTL1 0x25 /* ADC1/DMIC1 Control 1. */ +#define CS53L30_ADCDMIC1_CTL2 0x26 /* ADC1/DMIC1 Control 2. */ +#define CS53L30_ADC1_CTL3 0x27 /* ADC1 Control 3. */ +#define CS53L30_ADC1_NG_CTL 0x28 /* ADC1 Noise Gate Control. */ +#define CS53L30_ADC1A_AFE_CTL 0x29 /* ADC1A AFE Control. */ +#define CS53L30_ADC1B_AFE_CTL 0x2A /* ADC1B AFE Control. */ +#define CS53L30_ADC1A_DIG_VOL 0x2B /* ADC1A Digital Volume. */ +#define CS53L30_ADC1B_DIG_VOL 0x2C /* ADC1B Digital Volume. */ +#define CS53L30_ADCDMIC2_CTL1 0x2D /* ADC2/DMIC2 Control 1. */ +#define CS53L30_ADCDMIC2_CTL2 0x2E /* ADC2/DMIC2 Control 2. */ +#define CS53L30_ADC2_CTL3 0x2F /* ADC2 Control 3. */ +#define CS53L30_ADC2_NG_CTL 0x30 /* ADC2 Noise Gate Control. */ +#define CS53L30_ADC2A_AFE_CTL 0x31 /* ADC2A AFE Control. */ +#define CS53L30_ADC2B_AFE_CTL 0x32 /* ADC2B AFE Control. */ +#define CS53L30_ADC2A_DIG_VOL 0x33 /* ADC2A Digital Volume. */ +#define CS53L30_ADC2B_DIG_VOL 0x34 /* ADC2B Digital Volume. */ +#define CS53L30_INT_MASK 0x35 /* Interrupt Mask. */ +#define CS53L30_IS 0x36 /* Interrupt Status. */ +#define CS53L30_MAX_REGISTER 0x36 + +/* Device ID */ +#define CS53L30_DEVID 0x53A30 + +/* PDN_DONE Poll Maximum + * If soft ramp is set it will take much longer to power down + * the system. + */ +#define PDN_POLL_MAX 900 + +/* Bitfield Definitions */ + +/* CS53L30_PWRCTL */ +#define PDN_ULP (1 << 7) +#define PDN_LP (1 << 6) +#define DISCHARGE_FILT (1 << 5) +#define THMS_PDN (1 << 4) + +/* CS53L30_MCLKCTL */ +#define MCLK_DIS (1 << 7) +#define MCLK_INT_SCALE (1 << 6) +#define DMIC_DRIVE (1 << 5) +#define MCLK_DIV (3 << 2) +#define MCLK_DIV_DFLT (1 << 2) +#define SYNC_EN (1 << 1) + +/* CS53L30_INT_SR_CTL */ +#define INTERNAL_FS_RATIO (1 << 4) +#define INTERNAL_FS_DFLT (7 << 2) +#define MCLK_19MHZ_EN (1 << 0) + +/* CS53L30_MICBIAS_CTL */ +#define MIC4_BIAS_PDN (1 << 7) +#define MIC3_BIAS_PDN (1 << 6) +#define MIC2_BIAS_PDN (1 << 5) +#define MIC1_BIAS_PDN (1 << 4) +#define VP_MIN (1 << 2) +#define MIC_BIAS_CTRL (3 << 0) +#define MIC_BIAS_ALL_PDN 0xF0 +#define MIC_BIAS_DFLT (MIC_BIAS_ALL_PDN | VP_MIN) + +/* CS53L30_ASPCFG_CTL */ +#define ASP_MS (1 << 7) +#define ASP_SCLK_INV (1 << 4) +#define ASP_RATE_48K (3 << 2) +#define ASP_RATE 0x0F +#define ASP_CNFG_MASK 0xF0 + +/* CS53L30_ASP1_CTL */ +#define ASP1_TDM_PDN (1 << 7) +#define ASP1_SDOUT_PDN (1 << 6) +#define ASP1_3ST (1 << 5) +#define SHIFT_LEFT (1 << 4) +#define ASP1_DRIVE (1 << 0) +#define ASP1_3ST_VAL(x) ((x) << 5) + +/* CS53L30_ASP1_TDMTX_CTL */ +#define ASP1_CHX_TX_STATE (1 << 7) +#define ASP1_CHX_TX_LOC 0x3F +#define ASP1_CHX_TX_DFLT_SLT47 0x2F +#define ASP_TX_DISABLED 0x00 + +/* CS53L30_ASP2_CTL */ +#define ASP2_SDOUT_PDN (1 << 6) +#define ASP2_DRIVE (1 << 0) +#define ASP2_CTRL_DFLT 0x00 + +/* CS53L30_SFT_RAMP */ +#define DIGSFT (1 << 5) +#define SFT_RMP_DFLT 0x00 + +/* CS53L30_LRCLK_CTL2 */ +#define LRCK_50_NPW (1 << 3) +#define LRCK_TPWH (7 << 0) +#define LRCK_CTLX_DFLT 0x00 + +/* CS53L30_MUTEP_CTL */ +#define MUTE_PDN_ULP (1 << 7) +#define MUTE_PDN_LP (1 << 6) +#define MUTE_M4B_PDN (1 << 4) +#define MUTE_M3B_PDN (1 << 3) +#define MUTE_M2B_PDN (1 << 2) +#define MUTE_M1B_PDN (1 << 1) +#define MUTE_MB_ALL_PDN (1 << 0) +#define MUTEP_CTRL1_DFLT 0x00 + +/* CS53L30_MUTEP_CTL2 */ +#define MUTE_PIN_POLARITY (1 << 7) +#define MUTE_ASP_TDM_PDN (1 << 6) +#define MUTE_ASP_SDOUT2_PDN (1 << 5) +#define MUTE_ASP_SDOUT1_PDN (1 << 4) +#define MUTE_ADC2B_PDN (1 << 3) +#define MUTE_ADC2A_PDN (1 << 2) +#define MUTE_ADC1B_PDN (1 << 1) +#define MUTE_ADC1A_PDN (1 << 0) + +/* CS53L30_INBIAS_CTL1 */ +#define IN4M_BIAS (3 << 6) +#define IN4P_BIAS (3 << 4) +#define IN3M_BIAS (3 << 2) +#define IN3P_BIAS (3 << 0) + +/* CS53L30_INBIAS_CTL2 */ +#define IN2M_BIAS (3 << 6) +#define IN2P_BIAS (3 << 4) +#define IN1M_BIAS (3 << 2) +#define IN1P_BIAS (3 << 0) +#define INBIAS_CTLX_DFLT 0xAA + +/* CS53L30_DMIC1_STR_CTL */ +#define DMIC1_STEREO_ENB (1 << 5) +#define DMIC1_STEREO_DFLT 0xA8 + +/* CS53L30_DMIC2_STR_CTL */ +#define DMIC2_STEREO_EN (1 << 5) +#define DMIC2_STEREO_DFLT 0xEC + +/* CS53L30_ADCDMIC1_CTL1 */ +#define ADC1B_PDN (1 << 7) +#define ADC1A_PDN (1 << 6) +#define DMIC1_PDN (1 << 2) +#define DMIC1_SCLK_DIV (1 << 1) +#define CH_TYPE (1 << 0) +#define DMIC1_ON_CH_AB_IN (CH_TYPE) +#define DMIC1_ON_CH_A_IN (ADC1B_PDN | CH_TYPE) +#define DMIC1_ON_CH_B_IN (ADC1A_PDN | CH_TYPE) +#define ADC1_ON_CH_AB_IN (DMIC1_PDN) +#define ADC1_ON_CH_A_IN (ADC1B_PDN | DMIC1_PDN) +#define ADC1_ON_CH_B_IN (ADC1A_PDN | DMIC1_PDN) +#define DMIC1_OFF_ADC1_OFF (ADC1A_PDN | ADC1B_PDN | DMIC1_PDN) +#define ADC1_DMIC1_PDN_MASK 0xFF + +/* CS53L30_ADCDMIC1_CTL2 */ +#define ADC1_NOTCH_DIS (1 << 7) +#define ADC1B_INV (1 << 5) +#define ADC1A_INV (1 << 4) +#define ADC1B_DIG_BOOST (1 << 1) +#define ADC1A_DIG_BOOST (1 << 0) +#define ADC1_DMIC1_CTL2_DFLT 0x00 + +/* CS53L30_ADC1_CTL3 */ +#define ADC1_HPF_EN (1 << 3) +#define ADC1_HPF_CF (3 << 1) +#define ADC1_NG_ALL (1 << 0) + +/* CS53L30_ADC1_NG_CTL */ +#define ADC1B_NG (1 << 7) +#define ADC1A_NG (1 << 6) +#define ADC1_NG_BOOST (1 << 5) +#define ADC1_NG_THRESH (7 << 2) +#define ADC1_NG_DELAY (3 << 0) +#define ADCX_ZERO_DFLT 0x00 + +/* CS53L30_ADC1A_AFE_CTL */ +#define ADC1A_PREAMP (3 << 6) +#define ADC1A_PGA_VOL 0x3F + +/* CS53L30_ADC1B_AFE_CTL */ +#define ADC1B_PREAMP (3 << 6) +#define ADC1B_PGA_VOL 0x3F + +/* CS53L30_ADCXX_DIG_VOL */ +#define MUTE_DIG_OUT (1 << 7) + +/* CS53L30_ADCDMIC2_CTL1 */ +#define ADC2B_PDN (1 << 7) +#define ADC2A_PDN (1 << 6) +#define DMIC2_PDN (1 << 2) +#define DMIC2_CLKDIV (1 << 1) +#define DMIC2_ON_CH_AB_IN 0x00 /* CH_TYPE must = 1 */ +#define DMIC2_ON_CH_A_IN (ADC2B_PDN) /* CH_TYPE must = 1 */ +#define DMIC2_ON_CH_B_IN (ADC2A_PDN) /* CH_TYPE must = 1 */ +#define ADC2_ON_CH_AB_IN (DMIC2_PDN) /* CH_TYPE must = 0 */ +#define ADC2_ON_CH_A_IN (ADC2B_PDN | DMIC2_PDN) /* CH_TYPE must = 0 */ +#define ADC2_ON_CH_B_IN (ADC2A_PDN | DMIC2_PDN) /* CH_TYPE must = 0 */ +#define DMIC2_OFF_ADC2_OFF (ADC2A_PDN | ADC2B_PDN | DMIC2_PDN) + +/* CS53L30_ADCDMIC2_CTL2 */ +#define ADC2_NOTCH_DIS (1 << 7) +#define ADC2B_INV (1 << 5) +#define ADC2A_INV (1 << 4) +#define ADC2B_DIG_BOOST (1 << 1) +#define ADC2A_DIG_BOOST (1 << 0) + +/* CS53L30_ADC2_CTL3 */ +#define ADC2_HPF_EN (1 << 3) +#define ADC2_HPF_CF (3 << 1) +#define ADC2_NG_ALL (1 << 0) + +/* CS53L30_INT */ +#define PDN_DONE (1 << 7) +#define THMS_TRIP (1 << 6) +#define SYNC_DONE (1 << 5) +#define ADC2B_OVFL (1 << 4) +#define ADC2A_OVFL (1 << 3) +#define ADC1B_OVFL (1 << 2) +#define ADC1A_OVFL (1 << 1) +#define MUTE_PIN (1 << 0) +#define DEVICE_INT_MASK 0xFF + +/* Serial Ports */ +#define CS53L30_ASP1 0 +#define CS53L30_ASP2 1 + +#endif /* __CS53L30_H__ */ -- 2.4.5

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[alsa-devel] vsp1 BUG_ON() and crash (Re: [PATCH v9 03/12] media: Entities, pads and links)
by Geert Uytterhoeven 14 Dec '15

14 Dec '15

On Mon, Feb 14, 2011 at 1:20 PM, Laurent Pinchart <laurent.pinchart(a)ideasonboard.com> wrote: > +media_entity_create_link(struct media_entity *source, u16 source_pad, > + struct media_entity *sink, u16 sink_pad, u32 flags) > +{ > + struct media_link *link; > + struct media_link *backlink; > + > + BUG_ON(source == NULL || sink == NULL); > + BUG_ON(source_pad >= source->num_pads); > + BUG_ON(sink_pad >= sink->num_pads); This triggers on r8a7791/koelsch: vsp1 fe928000.vsp1: Entity type for entity fe928000.vsp1 bru was not initialized! vsp1 fe928000.vsp1: Entity type for entity fe928000.vsp1 hsi was not initialized! vsp1 fe928000.vsp1: Entity type for entity fe928000.vsp1 hst was not initialized! vsp1 fe928000.vsp1: Entity type for entity fe928000.vsp1 lut was not initialized! vsp1 fe928000.vsp1: Entity type for entity fe928000.vsp1 rpf.0 was not initialized! vsp1 fe928000.vsp1: Entity type for entity fe928000.vsp1 rpf.1 was not initialized! vsp1 fe928000.vsp1: Entity type for entity fe928000.vsp1 rpf.2 was not initialized! vsp1 fe928000.vsp1: Entity type for entity fe928000.vsp1 rpf.3 was not initialized! vsp1 fe928000.vsp1: Entity type for entity fe928000.vsp1 rpf.4 was not initialized! vsp1 fe928000.vsp1: Entity type for entity fe928000.vsp1 sru was not initialized! vsp1 fe928000.vsp1: Entity type for entity fe928000.vsp1 uds.0 was not initialized! vsp1 fe928000.vsp1: Entity type for entity fe928000.vsp1 uds.1 was not initialized! vsp1 fe928000.vsp1: Entity type for entity fe928000.vsp1 uds.2 was not initialized! vsp1 fe928000.vsp1: Entity type for entity fe928000.vsp1 wpf.0 was not initialized! vsp1 fe928000.vsp1: Entity type for entity fe928000.vsp1 wpf.1 was not initialized! vsp1 fe928000.vsp1: Entity type for entity fe928000.vsp1 wpf.2 was not initialized! vsp1 fe928000.vsp1: Entity type for entity fe928000.vsp1 wpf.3 was not initialized! vsp1 fe930000.vsp1: Entity type for entity fe930000.vsp1 bru was not initialized! vsp1 fe930000.vsp1: Entity type for entity fe930000.vsp1 hsi was not initialized! vsp1 fe930000.vsp1: Entity type for entity fe930000.vsp1 hst was not initialized! vsp1 fe930000.vsp1: Entity type for entity fe930000.vsp1 lif was not initialized! vsp1 fe930000.vsp1: Entity type for entity fe930000.vsp1 lut was not initialized! vsp1 fe930000.vsp1: Entity type for entity fe930000.vsp1 rpf.0 was not initialized! vsp1 fe930000.vsp1: Entity type for entity fe930000.vsp1 rpf.1 was not initialized! vsp1 fe930000.vsp1: Entity type for entity fe930000.vsp1 rpf.2 was not initialized! vsp1 fe930000.vsp1: Entity type for entity fe930000.vsp1 rpf.3 was not initialized! vsp1 fe930000.vsp1: Entity type for entity fe930000.vsp1 uds.0 was not initialized! vsp1 fe930000.vsp1: Entity type for entity fe930000.vsp1 wpf.0 was not initialized! vsp1 fe930000.vsp1: Entity type for entity fe930000.vsp1 wpf.1 was not initialized! vsp1 fe930000.vsp1: Entity type for entity fe930000.vsp1 wpf.2 was not initialized! vsp1 fe930000.vsp1: Entity type for entity fe930000.vsp1 wpf.3 was not initialized! ------------[ cut here ]------------ kernel BUG at drivers/media/media-entity.c:521! Internal error: Oops - BUG: 0 [#1] SMP ARM CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.4.0-rc5-03225-g596de581263544d2 #400 Hardware name: Generic R8A7791 (Flattened Device Tree) task: ee84fb40 ti: ee850000 task.ti: ee850000 PC is at media_create_pad_link+0x50/0x13c LR is at vsp1_wpf_create_links+0x4c/0x54 pc : [<c034fd90>] lr : [<c03761cc>] psr: 60000013 sp : ee851d50 ip : ee851d80 fp : ee851d7c r10: 00000001 r9 : ee9e9600 r8 : 00000000 r7 : ee111c80 r6 : 00000000 r5 : ee114a40 r4 : ee114b18 r3 : 00000000 r2 : ee114b18 r1 : 00000001 r0 : ee114a40 Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment none Control: 10c5307d Table: 4000406a DAC: 00000051 Process swapper/0 (pid: 1, stack limit = 0xee850210) Stack: (0xee851d50 to 0xee852000) 1d40: 00000000 ee111c10 ee114a10 ee111c90 1d60: ee111c80 ee9e9610 ee9e9600 ee111c98 ee851d94 ee851d80 c03761cc c034fd4c 1d80: 00000001 ee111c98 ee851de4 ee851d98 c03730c0 c037618c 00000000 ee9eac00 1da0: ee111c10 ee851db0 00000000 ee114840 ee114c40 00000000 c071b678 00000000 1dc0: ee9e9610 c06d3414 c071b678 c06d3414 00000000 00000000 ee851e04 ee851de8 1de0: c028f2b0 c0372bbc c028f258 ee9e9610 c071b668 00000000 ee851e2c ee851e08 1e00: c028dd4c c028f264 ee9e9610 ee9e9644 c06d3414 c06cb3a8 c069e010 c06e2000 1e20: ee851e4c ee851e30 c028df04 c028dc1c 00000001 00000000 c06d3414 c028de94 1e40: ee851e74 ee851e50 c028c47c c028dea0 ee884f5c ee9e7bb4 ee884f70 c06d3414 1e60: 00000000 eeaeb980 ee851e84 ee851e78 c028e138 c028c414 ee851eac ee851e88 1e80: c028cc18 c028e124 c0646a6b ee851e98 c06d3414 c0681dc8 00000000 c069e010 1ea0: ee851ec4 ee851eb0 c028e848 c028cb50 ee0bd380 c0681dc8 ee851ed4 ee851ec8 1ec0: c028fcbc c028e7b0 ee851ee4 ee851ed8 c0681de0 c028fc90 ee851f5c ee851ee8 1ee0: c0664df8 c0681dd4 ee851f0c ee851ef8 c0664604 c01c94bc efffcc00 efffcc10 1f00: ee851f5c ee851f10 c003f90c c06645f4 00000000 c0661740 c0661740 00000006 1f20: 00000006 000000b6 c0660908 efffcc38 ee851f5c 00000006 00000006 000000b6 1f40: c069e83c c06aad08 c06e2000 c06e2000 ee851f94 ee851f60 c0664fd4 c0664cfc 1f60: 00000006 00000006 00000000 c06645e8 00000000 c04e752c 00000000 00000000 1f80: 00000000 00000000 ee851fac ee851f98 c04e753c c0664eb8 ee850000 00000000 1fa0: 00000000 ee851fb0 c000fe98 c04e7538 00000000 00000000 00000000 00000000 1fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 1fe0: 00000000 00000000 00000000 00000000 00000013 00000000 00000000 00000000 Backtrace: [<c034fd40>] (media_create_pad_link) from [<c03761cc>] (vsp1_wpf_create_links+0x4c/0x54) r10:ee111c98 r9:ee9e9600 r8:ee9e9610 r7:ee111c80 r6:ee111c90 r5:ee114a10 r4:ee111c10 r3:00000000 [<c0376180>] (vsp1_wpf_create_links) from [<c03730c0>] (vsp1_probe+0x510/0x700) [<c0372bb0>] (vsp1_probe) from [<c028f2b0>] (platform_drv_probe+0x58/0xa8) r10:00000000 r9:00000000 r8:c06d3414 r7:c071b678 r6:c06d3414 r5:ee9e9610 r4:00000000 While bisecting, I arrived at a NULL pointer dereference: Unable to handle kernel NULL pointer dereference at virtual address 00000250 pgd = c0004000 [00000250] *pgd=00000000 Internal error: Oops: 5 [#1] SMP ARM CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.4.0-rc2-00170-gf9836d92a3c8c143 #417 ata1: SATA link down (SStatus 0 SControl 300) Hardware name: Generic R8A7791 (Flattened Device Tree) task: ee84fb40 ti: ee850000 task.ti: ee850000 PC is at media_gobj_init+0x20/0x68 LR is at media_entity_create_link+0xe4/0x108 pc : [<c0342428>] lr : [<c0342a80>] psr: 60000013 sp : ee851d10 ip : ee851d20 fp : ee851d1c r10: 00000000 r9 : ee103890 r8 : 00000000 r7 : ee159920 r6 : ee103740 r5 : ee103840 r4 : ee159840 r3 : 00000003 r2 : ee103840 r1 : 00000002 r0 : 00000000 Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment none Control: 10c5307d Table: 4000406a DAC: 00000051 Process swapper/0 (pid: 1, stack limit = 0xee850210) Stack: (0xee851d10 to 0xee852000) 1d00: ee851d4c ee851d20 c0342a80 c0342414 1d20: 00000000 ee159810 00000000 ee159840 ee159910 00000000 ee9e6800 ee102898 1d40: ee851d94 ee851d50 c036506c c03429a8 00000003 00000000 000000ff 00000000 1d60: 00000001 00000000 000000ff 00000000 c0366740 ee102810 ee102890 00000000 1d80: ee102858 ee9e6810 ee851de4 ee851d98 c0362a44 c0364ef4 00000080 ee9e8f00 1da0: ee102810 ee851db0 c012bcac ee9e6810 ee9e6810 c06b1f88 c06e76b4 00000000 1dc0: ee9e6810 c06b1f88 c06e76b4 00000000 c06b1f88 00000000 ee851e04 ee851de8 1de0: c0285b14 c0362694 c0285abc ee9e6810 00000000 c06e76a8 ee851e2c ee851e08 1e00: c028457c c0285ac8 ee9e6810 ee9e6844 c06b1f88 c06aab38 c067d010 c06c1000 1e20: ee851e4c ee851e30 c0284770 c028446c 00000001 00000000 c06b1f88 c0284700 1e40: ee851e74 ee851e50 c0282d78 c028470c ee884f5c ee9e4cb4 ee884f70 c06b1f88 1e60: 00000000 ee9c4700 ee851e84 ee851e78 c028499c c0282d10 ee851eac ee851e88 1e80: c0283514 c0284988 c0627e00 ee851e98 c06b1f88 c06618a8 00000000 c067d010 1ea0: ee851ec4 ee851eb0 c02850ac c028344c eea9a200 c06618a8 ee851ed4 ee851ec8 1ec0: c02864e0 c0285014 ee851ee4 ee851ed8 c06618c0 c02864b4 ee851f5c ee851ee8 1ee0: c0644df8 c06618b4 ee851f0c ee851ef8 c0644604 c01c91bc efffcc00 efffcc10 1f00: ee851f5c ee851f10 c003f908 c06445f4 00000000 c0641c1c c0641c1c 00000006 1f20: 00000006 000000b1 c0640e48 efffcc38 ee851f5c 00000006 00000006 000000b1 1f40: c067d83c c0689c84 c06c1000 c06c1000 ee851f94 ee851f60 c0644fd4 c0644cfc 1f60: 00000006 00000006 00000000 c06445e8 00000000 c04d00ac 00000000 00000000 1f80: 00000000 00000000 ee851fac ee851f98 c04d00bc c0644eb8 ee850000 00000000 1fa0: 00000000 ee851fb0 c000fe98 c04d00b8 00000000 00000000 00000000 00000000 1fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 1fe0: 00000000 00000000 00000000 00000000 00000013 00000000 00000000 00000000 Backtrace: [<c0342408>] (media_gobj_init) from [<c0342a80>] (media_entity_create_link+0xe4/0x108) [<c034299c>] (media_entity_create_link) from [<c036506c>] (vsp1_rpf_create+0x184/0x1c8) r10:ee102898 r9:ee9e6800 r8:00000000 r7:ee159910 r6:ee159840 r5:00000000 r4:ee159810 r3:00000000 [<c0364ee8>] (vsp1_rpf_create) from [<c0362a44>] (vsp1_probe+0x3bc/0x6c0) r8:ee9e6810 r7:ee102858 r6:00000000 r5:ee102890 r4:ee102810 [<c0362688>] (vsp1_probe) from [<c0285b14>] (platform_drv_probe+0x58/0xa8) r10:00000000 r9:c06b1f88 r8:00000000 r7:c06e76b4 r6:c06b1f88 r5:ee9e6810 r4:00000000 The NULL pointer dereference was introduced by: commit f9836d92a3c8c143c6f5fe89c558c37767628fa6 Author: Mauro Carvalho Chehab <mchehab(a)osg.samsung.com> Date: Fri Aug 14 12:54:36 2015 -0300 [media] media: use media_gobj inside links and triggers until the following commit, after which the BUG_ON() takes over: commit eb9e998983338811c3328294ed2f093367161df1 Author: Javier Martinez Canillas <javier(a)osg.samsung.com> Date: Thu Sep 3 12:19:25 2015 -0300 [media] v4l: vsp1: separate links creation from entities init Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert(a)linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds

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[alsa-devel] [PATCH v2] sound: codecs: pcm1792a: clean function exit
by Raphael Poggi 14 Dec '15

14 Dec '15

Signed-off-by: Raphael Poggi <poggi.raph(a)gmail.com> --- sound/soc/codecs/pcm1792a.c | 15 +++------------ 1 file changed, 3 insertions(+), 12 deletions(-) diff --git a/sound/soc/codecs/pcm1792a.c b/sound/soc/codecs/pcm1792a.c index 08bb486..27d54bc 100644 --- a/sound/soc/codecs/pcm1792a.c +++ b/sound/soc/codecs/pcm1792a.c @@ -91,14 +91,9 @@ static int pcm1792a_digital_mute(struct snd_soc_dai *dai, int mute) { struct snd_soc_codec *codec = dai->codec; struct pcm1792a_private *priv = snd_soc_codec_get_drvdata(codec); - int ret; - ret = regmap_update_bits(priv->regmap, PCM1792A_SOFT_MUTE, + return regmap_update_bits(priv->regmap, PCM1792A_SOFT_MUTE, PCM1792A_MUTE_MASK, !!mute); - if (ret < 0) - return ret; - - return 0; } static int pcm1792a_hw_params(struct snd_pcm_substream *substream, @@ -107,7 +102,7 @@ static int pcm1792a_hw_params(struct snd_pcm_substream *substream, { struct snd_soc_codec *codec = dai->codec; struct pcm1792a_private *priv = snd_soc_codec_get_drvdata(codec); - int val = 0, ret; + int val = 0; priv->rate = params_rate(params); @@ -145,12 +140,8 @@ static int pcm1792a_hw_params(struct snd_pcm_substream *substream, val = val << PCM1792A_FMT_SHIFT | PCM1792A_ATLD_ENABLE; - ret = regmap_update_bits(priv->regmap, PCM1792A_FMT_CONTROL, + return regmap_update_bits(priv->regmap, PCM1792A_FMT_CONTROL, PCM1792A_FMT_MASK | PCM1792A_ATLD_ENABLE, val); - if (ret < 0) - return ret; - - return 0; } static const struct snd_soc_dai_ops pcm1792a_dai_ops = { -- 2.1.0

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[alsa-devel] [PATCH 1/2] ALSA: usb-audio: Add a volume scale quirk for AudioQuest DragonFly
by Anssi Hannula 14 Dec '15

14 Dec '15

AudioQuest DragonFly DAC reports a volume control range of 0..50 (0x0000..0x0032) which in USB Audio means a range of 0 .. 0.2dB, which is obviously incorrect and causes software using the dB information in e.g. volume sliders to have a massive volume difference in 100..102% range. The actual volume mapping seems to be neither linear volume nor linear dB scale, but instead quite close to the cubic mapping e.g. alsamixer uses, with a range of -53...0 dB. Add a quirk for DragonFly to use a custom dB mapping, based on my measurements, using a 10-item range TLV (so it still fits in alsa-lib MAX_TLV_RANGE_SIZE). Tested on AudioQuest DragonFly HW v1.2. The quirk is only applied if the range is 0..50, so if this gets fixed/changed in later HW revisions it will no longer be applied. Signed-off-by: Anssi Hannula <anssi.hannula(a)iki.fi> Cc: <stable(a)vger.kernel.org> --- sound/usb/mixer_quirks.c | 37 +++++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/sound/usb/mixer_quirks.c b/sound/usb/mixer_quirks.c index 337c317ead6f..39d7f34e44e6 100644 --- a/sound/usb/mixer_quirks.c +++ b/sound/usb/mixer_quirks.c @@ -37,6 +37,7 @@ #include <sound/control.h> #include <sound/hwdep.h> #include <sound/info.h> +#include <sound/tlv.h> #include "usbaudio.h" #include "mixer.h" @@ -1733,6 +1734,38 @@ static int snd_microii_controls_create(struct usb_mixer_interface *mixer) return 0; } +static void snd_dragonfly_quirk_db_scale(struct usb_mixer_interface *mixer) +{ + struct usb_mixer_elem_list *list; + struct usb_mixer_elem_info *cval; + static const int unit_id = 7; + + /* approximation using 10 ranges based on output measurement on hw v1.2 */ + static const DECLARE_TLV_DB_RANGE(scale, + 0, 1, TLV_DB_MINMAX_ITEM(-5300, -4970), + 2, 5, TLV_DB_MINMAX_ITEM(-4710, -4160), + 6, 7, TLV_DB_MINMAX_ITEM(-3884, -3710), + 8, 14, TLV_DB_MINMAX_ITEM(-3443, -2560), + 15, 16, TLV_DB_MINMAX_ITEM(-2475, -2324), + 17, 19, TLV_DB_MINMAX_ITEM(-2228, -2031), + 20, 26, TLV_DB_MINMAX_ITEM(-1910, -1393), + 27, 31, TLV_DB_MINMAX_ITEM(-1322, -1032), + 32, 40, TLV_DB_MINMAX_ITEM(-968, -490), + 41, 50, TLV_DB_MINMAX_ITEM(-441, 0), + ); + + for (list = mixer->id_elems[unit_id]; list; list = list->next_id_elem) { + cval = (struct usb_mixer_elem_info *)list; + if (cval->control == UAC_FU_VOLUME && + cval->min == 0 && cval->max == 50) { + usb_audio_info(mixer->chip, "applying DragonFly dB scale quirk\n"); + list->kctl->tlv.p = scale; + list->kctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_TLV_READ; + list->kctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK; + } + } +} + int snd_usb_mixer_apply_create_quirk(struct usb_mixer_interface *mixer) { int err = 0; @@ -1810,6 +1843,10 @@ int snd_usb_mixer_apply_create_quirk(struct usb_mixer_interface *mixer) case USB_ID(0x1235, 0x800c): /* Focusrite Scarlett 18i20 */ err = snd_scarlett_controls_create(mixer); break; + + case USB_ID(0x21b4, 0x0081): /* AudioQuest DragonFly */ + snd_dragonfly_quirk_db_scale(mixer); + break; } return err; -- 2.3.8

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[alsa-devel] [PATCH v3 0/5] ALSA: hda - hdmi support dynmaic pcm assignment
by libin.yang＠linux.intel.com 14 Dec '15

14 Dec '15

From: Libin Yang <libin.yang(a)linux.intel.com> The patches are trying to support dynamically binding PCM to pin in HDMI/DP audio. The pin will not bind to any PCM if there is not monitor connected. When there is a monitor connected to the port (pin), driver will try to find a proper PCM to assign to the port and setup the pin if necessary. Libin Yang (5): ALSA: hda - hdmi begin to support dynamic PCM assignment ALSA: hda - hdmi playback without monitor in dynamic pcm bind mode ALSA: hda - hdmi operate spdif based on pcm ALSA: hda - hdmi dynamically bind PCM to pin when monitor hotplug ALSA: hda - hdmi setup pin when monitor hotplug in pcm dynamic assignment mode sound/pci/hda/hda_codec.h | 1 + sound/pci/hda/patch_hdmi.c | 369 ++++++++++++++++++++++++++++++++++++++++++--- 2 files changed, 347 insertions(+), 23 deletions(-) -- 1.9.1

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[alsa-devel] [PATCH v3 00/13] ASoC: Intel: Skylake: Update to SKL driver
by Vinod Koul 14 Dec '15

14 Dec '15

This update bring in new APIs in core and usage of those in SKL driver. The series is broadly of three parts - first two are fixes on the driver - then we add DMA resume capability in HDA core and use it to save restore DMA link values and add DMA resume capability in driver - lastly, we add support for MISCBDCGE configuration in core and use it while resetting and also for phrase detection per HW recommendation This should be merged thru ASoC tree due to obvious dependencies. Takashi would need your ack on core patches change is v3: - fix the missing export symbol, reported by lkp changes in v2: - move msicbdge api to driver and as a consequence sqash into into first use - fix lkp warning Dharageswari.R (1): ASoC: Intel: Skylake: Use CGCTL.MISCBDCGE for Phrase detection notification Jayachandran B (2): ALSA: hdac: Increase timeout value for link power check ASoC: Intel: Skylake: fix reset controller sequencing Jeeja KP (8): ASoC: Intel: Skylake: Clear stream registers before stream setup ASoC: Intel: Skylake: Fix to set pipe state to invalid when deleting ALSA: hdac: Add support for hda DMA Resume capability ALSA: hdac: couple the hda DMA stream in cleanup ASoC: Intel: Skylake: enable interrupt as wake source in active suspend ASoC: Intel: Skylake: Add DMA resume position in Trigger resume/suspend ASoC: Intel: Skylake: Reconfigure Link stream on suspend/resume ASoC: Intel: Skylake: Add Resume capability in PCM info. Vinod Koul (2): ALSA: hdac: add snd_hdac_ext_bus_link_power_up_all ASoC: Intel: Skylake: manage link power in active suspend include/sound/hda_register.h | 9 +++++ include/sound/hdaudio_ext.h | 15 +++++++ sound/hda/ext/hdac_ext_controller.c | 29 ++++++++++++- sound/hda/ext/hdac_ext_stream.c | 72 +++++++++++++++++++++++++++++++++ sound/soc/intel/skylake/skl-messages.c | 2 + sound/soc/intel/skylake/skl-pcm.c | 56 ++++++++++++++++++++----- sound/soc/intel/skylake/skl-sst-cldma.c | 38 ++++++++++------- sound/soc/intel/skylake/skl-sst-ipc.c | 15 +++++++ sound/soc/intel/skylake/skl-sst-ipc.h | 3 ++ sound/soc/intel/skylake/skl.c | 58 ++++++++++++++++++++++++-- sound/soc/intel/skylake/skl.h | 5 +++ 11 files changed, 272 insertions(+), 30 deletions(-) -- 1.9.1

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