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[PATCH v3 0/9] ASoC: SOF: core/ipc4/mtl: Add support for PCM delay reporting
by Peter Ujfalusi 03 Feb '23

03 Feb '23

Hi, Changes since v2: - Use div64_u64_rem() to make the code compile and work on non 64bit architectures Changes since v1: - The delay calculation updated to take into account the counter wrapping on both ends (host and link side). The following series adds support for the PCM delay reporting in SOF core level and implements the needed infrastructure with IPC4 to finally enable it for MTL. Currently this is only supported on MTL (and via IPC4), but with the infrastructure in place it will be possible to support other platforms with DeepBuffer. Regards, Peter --- Rander Wang (9): ASoC: SOF: add ipc4_fw_reg header file ASoC: SOF: add fw_info_box support ASoC: SOF: add time info structure for ipc4 path ASoC: SOF: ipc4-pcm: allocate time info for pcm delay feature ASoC: SOF: ipc4-pcm: add hw_params ASoC: SOF: add delay function support in sof framework ASoC: SOF: add get_stream_position ops for pcm delay ASoC: SOF: Intel: mtl: add get_stream_position support ASoC: SOF: ipc4-pcm: add delay function support sound/soc/sof/intel/mtl.c | 14 +++ sound/soc/sof/intel/mtl.h | 6 + sound/soc/sof/ipc4-fw-reg.h | 155 ++++++++++++++++++++++++ sound/soc/sof/ipc4-pcm.c | 232 ++++++++++++++++++++++++++++++++++++ sound/soc/sof/ipc4-priv.h | 15 +++ sound/soc/sof/ipc4.c | 3 + sound/soc/sof/ops.h | 10 ++ sound/soc/sof/pcm.c | 13 ++ sound/soc/sof/sof-audio.h | 6 + sound/soc/sof/sof-priv.h | 10 ++ 10 files changed, 464 insertions(+) create mode 100644 sound/soc/sof/ipc4-fw-reg.h -- 2.39.1

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[PATCH 0/9] ASoC: SOF: core/ipc4/mtl: Add support for PCM delay reporting
by Peter Ujfalusi 03 Feb '23

03 Feb '23

Hi, The following series adds support for the PCM delay reporting in SOF core level and implements the needed infrastructure with IPC4 to finally enable it for MTL. Currently this is only supported on MTL (and via IPC4), but with the infrastructure in place it will be possible to support other platforms with DeepBuffer. Regards, Peter --- Rander Wang (9): ASoC: SOF: add ipc4_fw_reg header file ASoC: SOF: add fw_info_box support ASoC: SOF: add time info structure for ipc4 path ASoC: SOF: ipc4-pcm: allocate time info for pcm delay feature ASoC: SOF: ipc4-pcm: add hw_params ASoC: SOF: add delay function support in sof framework ASoC: SOF: add get_stream_position ops for pcm delay ASoC: SOF: Intel: mtl: add get_stream_position support ASoC: SOF: ipc4-pcm: add delay function support sound/soc/sof/intel/mtl.c | 14 +++ sound/soc/sof/intel/mtl.h | 6 + sound/soc/sof/ipc4-fw-reg.h | 155 ++++++++++++++++++++++++ sound/soc/sof/ipc4-pcm.c | 230 ++++++++++++++++++++++++++++++++++++ sound/soc/sof/ipc4-priv.h | 15 +++ sound/soc/sof/ipc4.c | 3 + sound/soc/sof/ops.h | 10 ++ sound/soc/sof/pcm.c | 13 ++ sound/soc/sof/sof-audio.h | 6 + sound/soc/sof/sof-priv.h | 10 ++ 10 files changed, 462 insertions(+) create mode 100644 sound/soc/sof/ipc4-fw-reg.h -- 2.39.1

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[PATCH] ASoC: mediatek: mt8188: remove etdm dead code
by Trevor Wu 03 Feb '23

03 Feb '23

Some Smatch static checker warning like below was found. sound/soc/mediatek/mt8188/mt8188-dai-etdm.c:2487 mt8188_dai_etdm_parse_of() warn: 'ret' returned from snprintf() might be larger than 48 2479 for (i = 0; i < MT8188_AFE_IO_ETDM_NUM; i++) { 2480 dai_id = ETDM_TO_DAI_ID(i); 2481 etdm_data = afe_priv->dai_priv[dai_id]; 2482 2483 ret = snprintf(prop, sizeof(prop), 2484 "mediatek,%s-multi-pin-mode", 2485 of_afe_etdms[i].name); 2486 if (ret < 0) { --> 2487 dev_err(afe->dev, "%s snprintf err=%d\n", 2488 In linux kernel, snprintf() never returns negatives. On the other hand, the format string like "mediatek,%s-multi-pin-mode" must be smaller than sizeof(prop)=48. After discussing in the mail thread[1], I remove the dead code to fix the Smatch warnings. [1]: https://lore.kernel.org/all/Y9EdBg641tJDDrt%2F@kili/ Signed-off-by: Trevor Wu <trevor.wu(a)mediatek.com> --- sound/soc/mediatek/mt8188/mt8188-dai-etdm.c | 33 ++++++--------------- 1 file changed, 9 insertions(+), 24 deletions(-) diff --git a/sound/soc/mediatek/mt8188/mt8188-dai-etdm.c b/sound/soc/mediatek/mt8188/mt8188-dai-etdm.c index 0b79c1cc293b..071841903c62 100644 --- a/sound/soc/mediatek/mt8188/mt8188-dai-etdm.c +++ b/sound/soc/mediatek/mt8188/mt8188-dai-etdm.c @@ -2480,24 +2480,14 @@ static void mt8188_dai_etdm_parse_of(struct mtk_base_afe *afe) dai_id = ETDM_TO_DAI_ID(i); etdm_data = afe_priv->dai_priv[dai_id]; - ret = snprintf(prop, sizeof(prop), - "mediatek,%s-multi-pin-mode", - of_afe_etdms[i].name); - if (ret < 0) { - dev_err(afe->dev, "%s snprintf err=%d\n", - __func__, ret); - return; - } + snprintf(prop, sizeof(prop), "mediatek,%s-multi-pin-mode", + of_afe_etdms[i].name); + etdm_data->data_mode = of_property_read_bool(of_node, prop); - ret = snprintf(prop, sizeof(prop), - "mediatek,%s-cowork-source", - of_afe_etdms[i].name); - if (ret < 0) { - dev_err(afe->dev, "%s snprintf err=%d\n", - __func__, ret); - return; - } + snprintf(prop, sizeof(prop), "mediatek,%s-cowork-source", + of_afe_etdms[i].name); + ret = of_property_read_u32(of_node, prop, &sel); if (ret == 0) { if (sel >= MT8188_AFE_IO_ETDM_NUM) { @@ -2516,14 +2506,9 @@ static void mt8188_dai_etdm_parse_of(struct mtk_base_afe *afe) /* etdm in only */ for (i = 0; i < 2; i++) { - ret = snprintf(prop, sizeof(prop), - "mediatek,%s-chn-disabled", - of_afe_etdms[i].name); - if (ret < 0) { - dev_err(afe->dev, "%s snprintf err=%d\n", - __func__, ret); - return; - } + snprintf(prop, sizeof(prop), "mediatek,%s-chn-disabled", + of_afe_etdms[i].name); + ret = of_property_read_variable_u8_array(of_node, prop, disable_chn, 1, max_chn); -- 2.18.0

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[PATCH] ASoC: amd: update ps platform acp header file
by Vijendar Mukunda 03 Feb '23

03 Feb '23

Rename Audio buffer and soundwire manager instance registers. Remove scratch registers as these registers can be accessed using ACP_SCRATCH_REG_0 register relative offset. Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda(a)amd.com> --- include/sound/acp63_chip_offset_byte.h | 751 ++++++++++--------------- 1 file changed, 294 insertions(+), 457 deletions(-) diff --git a/include/sound/acp63_chip_offset_byte.h b/include/sound/acp63_chip_offset_byte.h index c9260e1640ae..d746c1cb0163 100644 --- a/include/sound/acp63_chip_offset_byte.h +++ b/include/sound/acp63_chip_offset_byte.h @@ -126,24 +126,24 @@ #define ACP_PAD_PULLDOWN_CTRL 0x0001448 #define ACP_PAD_DRIVE_STRENGTH_CTRL 0x000144C #define ACP_PAD_SCHMEN_CTRL 0x0001450 -#define ACP_SW_PAD_KEEPER_EN 0x0001454 -#define ACP_SW_WAKE_EN 0x0001458 +#define ACP_SW0_PAD_KEEPER_EN 0x0001454 +#define ACP_SW0_WAKE_EN 0x0001458 #define ACP_I2S_WAKE_EN 0x000145C #define ACP_SW1_WAKE_EN 0x0001460 -#define ACP_SW_I2S_ERROR_REASON 0x00018B4 -#define ACP_SW_POS_TRACK_I2S_TX_CTRL 0x00018B8 -#define ACP_SW_I2S_TX_DMA_POS 0x00018BC -#define ACP_SW_POS_TRACK_BT_TX_CTRL 0x00018C0 -#define ACP_SW_BT_TX_DMA_POS 0x00018C4 -#define ACP_SW_POS_TRACK_HS_TX_CTRL 0x00018C8 -#define ACP_SW_HS_TX_DMA_POS 0x00018CC -#define ACP_SW_POS_TRACK_I2S_RX_CTRL 0x00018D0 -#define ACP_SW_I2S_RX_DMA_POS 0x00018D4 -#define ACP_SW_POS_TRACK_BT_RX_CTRL 0x00018D8 -#define ACP_SW_BT_RX_DMA_POS 0x00018DC -#define ACP_SW_POS_TRACK_HS_RX_CTRL 0x00018E0 -#define ACP_SW_HS_RX_DMA_POS 0x00018E4 +#define ACP_SW0_I2S_ERROR_REASON 0x00018B4 +#define ACP_SW0_POS_TRACK_AUDIO0_TX_CTRL 0x00018B8 +#define ACP_SW0_AUDIO0_TX_DMA_POS 0x00018BC +#define ACP_SW0_POS_TRACK_AUDIO1_TX_CTRL 0x00018C0 +#define ACP_SW0_AUDIO1_TX_DMA_POS 0x00018C4 +#define ACP_SW0_POS_TRACK_AUDIO2_TX_CTRL 0x00018C8 +#define ACP_SW0_AUDIO2_TX_DMA_POS 0x00018CC +#define ACP_SW0_POS_TRACK_AUDIO0_RX_CTRL 0x00018D0 +#define ACP_SW0_AUDIO0_DMA_POS 0x00018D4 +#define ACP_SW0_POS_TRACK_AUDIO1_RX_CTRL 0x00018D8 +#define ACP_SW0_AUDIO1_RX_DMA_POS 0x00018DC +#define ACP_SW0_POS_TRACK_AUDIO2_RX_CTRL 0x00018E0 +#define ACP_SW0_AUDIO2_RX_DMA_POS 0x00018E4 #define ACP_ERROR_INTR_MASK1 0X0001974 #define ACP_ERROR_INTR_MASK2 0X0001978 #define ACP_ERROR_INTR_MASK3 0X000197C @@ -155,98 +155,80 @@ #define ACP_EXTERNAL_INTR_STAT 0x0001A0C #define ACP_EXTERNAL_INTR_STAT1 0x0001A10 #define ACP_ERROR_STATUS 0x0001A4C -#define ACP_P1_SW_I2S_ERROR_REASON 0x0001A50 -#define ACP_P1_SW_POS_TRACK_I2S_TX_CTRL 0x0001A6C -#define ACP_P1_SW_I2S_TX_DMA_POS 0x0001A70 -#define ACP_P1_SW_POS_TRACK_I2S_RX_CTRL 0x0001A74 -#define ACP_P1_SW_I2S_RX_DMA_POS 0x0001A78 +#define ACP_SW1_I2S_ERROR_REASON 0x0001A50 +#define ACP_SW1_POS_TRACK_AUDIO0_TX_CTRL 0x0001A6C +#define ACP_SW1_AUDIO0_TX_DMA_POS 0x0001A70 +#define ACP_SW1_POS_TRACK_AUDIO0_RX_CTRL 0x0001A74 +#define ACP_SW1_AUDIO0_RX_DMA_POS 0x0001A78 #define ACP_P1_DMIC_I2S_GPIO_INTR_CTRL 0x0001A7C #define ACP_P1_DMIC_I2S_GPIO_INTR_STATUS 0x0001A80 #define ACP_SCRATCH_REG_BASE_ADDR 0x0001A84 -#define ACP_P1_SW_POS_TRACK_BT_TX_CTRL 0x0001A88 -#define ACP_P1_SW_BT_TX_DMA_POS 0x0001A8C -#define ACP_P1_SW_POS_TRACK_HS_TX_CTRL 0x0001A90 -#define ACP_P1_SW_HS_TX_DMA_POS 0x0001A94 -#define ACP_P1_SW_POS_TRACK_BT_RX_CTRL 0x0001A98 -#define ACP_P1_SW_BT_RX_DMA_POS 0x0001A9C -#define ACP_P1_SW_POS_TRACK_HS_RX_CTRL 0x0001AA0 -#define ACP_P1_SW_HS_RX_DMA_POS 0x0001AA4 +#define ACP_SW1_POS_TRACK_AUDIO1_TX_CTRL 0x0001A88 +#define ACP_SW1_AUDIO1_TX_DMA_POS 0x0001A8C +#define ACP_SW1_POS_TRACK_AUDIO2_TX_CTRL 0x0001A90 +#define ACP_SW1_AUDIO2_TX_DMA_POS 0x0001A94 +#define ACP_SW1_POS_TRACK_AUDIO1_RX_CTRL 0x0001A98 +#define ACP_SW1_AUDIO1_RX_DMA_POS 0x0001A9C +#define ACP_SW1_POS_TRACK_AUDIO2_RX_CTRL 0x0001AA0 +#define ACP_SW1_AUDIO2_RX_DMA_POS 0x0001AA4 #define ACP_ERROR_INTR_MASK4 0X0001AEC #define ACP_ERROR_INTR_MASK5 0X0001AF0 /* Registers from ACP_AUDIO_BUFFERS block */ -#define ACP_I2S_RX_RINGBUFADDR 0x0002000 -#define ACP_I2S_RX_RINGBUFSIZE 0x0002004 -#define ACP_I2S_RX_LINKPOSITIONCNTR 0x0002008 -#define ACP_I2S_RX_FIFOADDR 0x000200C -#define ACP_I2S_RX_FIFOSIZE 0x0002010 -#define ACP_I2S_RX_DMA_SIZE 0x0002014 -#define ACP_I2S_RX_LINEARPOSITIONCNTR_HIGH 0x0002018 -#define ACP_I2S_RX_LINEARPOSITIONCNTR_LOW 0x000201C -#define ACP_I2S_RX_INTR_WATERMARK_SIZE 0x0002020 -#define ACP_I2S_TX_RINGBUFADDR 0x0002024 -#define ACP_I2S_TX_RINGBUFSIZE 0x0002028 -#define ACP_I2S_TX_LINKPOSITIONCNTR 0x000202C -#define ACP_I2S_TX_FIFOADDR 0x0002030 -#define ACP_I2S_TX_FIFOSIZE 0x0002034 -#define ACP_I2S_TX_DMA_SIZE 0x0002038 -#define ACP_I2S_TX_LINEARPOSITIONCNTR_HIGH 0x000203C -#define ACP_I2S_TX_LINEARPOSITIONCNTR_LOW 0x0002040 -#define ACP_I2S_TX_INTR_WATERMARK_SIZE 0x0002044 -#define ACP_BT_RX_RINGBUFADDR 0x0002048 -#define ACP_BT_RX_RINGBUFSIZE 0x000204C -#define ACP_BT_RX_LINKPOSITIONCNTR 0x0002050 -#define ACP_BT_RX_FIFOADDR 0x0002054 -#define ACP_BT_RX_FIFOSIZE 0x0002058 -#define ACP_BT_RX_DMA_SIZE 0x000205C -#define ACP_BT_RX_LINEARPOSITIONCNTR_HIGH 0x0002060 -#define ACP_BT_RX_LINEARPOSITIONCNTR_LOW 0x0002064 -#define ACP_BT_RX_INTR_WATERMARK_SIZE 0x0002068 -#define ACP_BT_TX_RINGBUFADDR 0x000206C -#define ACP_BT_TX_RINGBUFSIZE 0x0002070 -#define ACP_BT_TX_LINKPOSITIONCNTR 0x0002074 -#define ACP_BT_TX_FIFOADDR 0x0002078 -#define ACP_BT_TX_FIFOSIZE 0x000207C -#define ACP_BT_TX_DMA_SIZE 0x0002080 -#define ACP_BT_TX_LINEARPOSITIONCNTR_HIGH 0x0002084 -#define ACP_BT_TX_LINEARPOSITIONCNTR_LOW 0x0002088 -#define ACP_BT_TX_INTR_WATERMARK_SIZE 0x000208C -#define ACP_HS_RX_RINGBUFADDR 0x0002090 -#define ACP_HS_RX_RINGBUFSIZE 0x0002094 -#define ACP_HS_RX_LINKPOSITIONCNTR 0x0002098 -#define ACP_HS_RX_FIFOADDR 0x000209C -#define ACP_HS_RX_FIFOSIZE 0x00020A0 -#define ACP_HS_RX_DMA_SIZE 0x00020A4 -#define ACP_HS_RX_LINEARPOSITIONCNTR_HIGH 0x00020A8 -#define ACP_HS_RX_LINEARPOSITIONCNTR_LOW 0x00020AC -#define ACP_HS_RX_INTR_WATERMARK_SIZE 0x00020B0 -#define ACP_HS_TX_RINGBUFADDR 0x00020B4 -#define ACP_HS_TX_RINGBUFSIZE 0x00020B8 -#define ACP_HS_TX_LINKPOSITIONCNTR 0x00020BC -#define ACP_HS_TX_FIFOADDR 0x00020C0 -#define ACP_HS_TX_FIFOSIZE 0x00020C4 -#define ACP_HS_TX_DMA_SIZE 0x00020C8 -#define ACP_HS_TX_LINEARPOSITIONCNTR_HIGH 0x00020CC -#define ACP_HS_TX_LINEARPOSITIONCNTR_LOW 0x00020D0 -#define ACP_HS_TX_INTR_WATERMARK_SIZE 0x00020D4 -#define ACP_AUDIO_RX_RINGBUFADDR ACP_I2S_RX_RINGBUFADDR -#define ACP_AUDIO_RX_RINGBUFSIZE ACP_I2S_RX_RINGBUFSIZE -#define ACP_AUDIO_RX_LINKPOSITIONCNTR ACP_I2S_RX_LINKPOSITIONCNTR -#define ACP_AUDIO_RX_FIFOADDR ACP_I2S_RX_FIFOADDR -#define ACP_AUDIO_RX_FIFOSIZE ACP_I2S_RX_FIFOSIZE -#define ACP_AUDIO_RX_DMA_SIZE ACP_I2S_RX_DMA_SIZE -#define ACP_AUDIO_RX_LINEARPOSITIONCNTR_HIGH ACP_I2S_RX_LINEARPOSITIONCNTR_HIGH -#define ACP_AUDIO_RX_LINEARPOSITIONCNTR_LOW ACP_I2S_RX_LINEARPOSITIONCNTR_LOW -#define ACP_AUDIO_RX_INTR_WATERMARK_SIZE ACP_I2S_RX_INTR_WATERMARK_SIZE -#define ACP_AUDIO_TX_RINGBUFADDR ACP_I2S_TX_RINGBUFADDR -#define ACP_AUDIO_TX_RINGBUFSIZE ACP_I2S_TX_RINGBUFSIZE -#define ACP_AUDIO_TX_LINKPOSITIONCNTR ACP_I2S_TX_LINKPOSITIONCNTR -#define ACP_AUDIO_TX_FIFOADDR ACP_I2S_TX_FIFOADDR -#define ACP_AUDIO_TX_FIFOSIZE ACP_I2S_TX_FIFOSIZE -#define ACP_AUDIO_TX_DMA_SIZE ACP_I2S_TX_DMA_SIZE -#define ACP_AUDIO_TX_LINEARPOSITIONCNTR_HIGH ACP_I2S_TX_LINEARPOSITIONCNTR_HIGH -#define ACP_AUDIO_TX_LINEARPOSITIONCNTR_LOW ACP_I2S_TX_LINEARPOSITIONCNTR_LOW -#define ACP_AUDIO_TX_INTR_WATERMARK_SIZE ACP_I2S_TX_INTR_WATERMARK_SIZE +#define ACP_AUDIO0_RX_RINGBUFADDR 0x0002000 +#define ACP_AUDIO0_RX_RINGBUFSIZE 0x0002004 +#define ACP_AUDIO0_RX_LINKPOSITIONCNTR 0x0002008 +#define ACP_AUDIO0_RX_FIFOADDR 0x000200C +#define ACP_AUDIO0_RX_FIFOSIZE 0x0002010 +#define ACP_AUDIO0_RX_DMA_SIZE 0x0002014 +#define ACP_AUDIO0_RX_LINEARPOSITIONCNTR_HIGH 0x0002018 +#define ACP_AUDIO0_RX_LINEARPOSITIONCNTR_LOW 0x000201C +#define ACP_AUDIO0_RX_INTR_WATERMARK_SIZE 0x0002020 +#define ACP_AUDIO0_TX_RINGBUFADDR 0x0002024 +#define ACP_AUDIO0_TX_RINGBUFSIZE 0x0002028 +#define ACP_AUDIO0_TX_LINKPOSITIONCNTR 0x000202C +#define ACP_AUDIO0_TX_FIFOADDR 0x0002030 +#define ACP_AUDIO0_TX_FIFOSIZE 0x0002034 +#define ACP_AUDIO0_TX_DMA_SIZE 0x0002038 +#define ACP_AUDIO0_TX_LINEARPOSITIONCNTR_HIGH 0x000203C +#define ACP_AUDIO0_TX_LINEARPOSITIONCNTR_LOW 0x0002040 +#define ACP_AUDIO0_TX_INTR_WATERMARK_SIZE 0x0002044 +#define ACP_AUDIO1_RX_RINGBUFADDR 0x0002048 +#define ACP_AUDIO1_RX_RINGBUFSIZE 0x000204C +#define ACP_AUDIO1_RX_LINKPOSITIONCNTR 0x0002050 +#define ACP_AUDIO1_RX_FIFOADDR 0x0002054 +#define ACP_AUDIO1_RX_FIFOSIZE 0x0002058 +#define ACP_AUDIO1_RX_DMA_SIZE 0x000205C +#define ACP_AUDIO1_RX_LINEARPOSITIONCNTR_HIGH 0x0002060 +#define ACP_AUDIO1_RX_LINEARPOSITIONCNTR_LOW 0x0002064 +#define ACP_AUDIO1_RX_INTR_WATERMARK_SIZE 0x0002068 +#define ACP_AUDIO1_TX_RINGBUFADDR 0x000206C +#define ACP_AUDIO1_TX_RINGBUFSIZE 0x0002070 +#define ACP_AUDIO1_TX_LINKPOSITIONCNTR 0x0002074 +#define ACP_AUDIO1_TX_FIFOADDR 0x0002078 +#define ACP_AUDIO1_TX_FIFOSIZE 0x000207C +#define ACP_AUDIO1_TX_DMA_SIZE 0x0002080 +#define ACP_AUDIO1_TX_LINEARPOSITIONCNTR_HIGH 0x0002084 +#define ACP_AUDIO1_TX_LINEARPOSITIONCNTR_LOW 0x0002088 +#define ACP_AUDIO1_TX_INTR_WATERMARK_SIZE 0x000208C +#define ACP_AUDIO2_RX_RINGBUFADDR 0x0002090 +#define ACP_AUDIO2_RX_RINGBUFSIZE 0x0002094 +#define ACP_AUDIO2_RX_LINKPOSITIONCNTR 0x0002098 +#define ACP_AUDIO2_RX_FIFOADDR 0x000209C +#define ACP_AUDIO2_RX_FIFOSIZE 0x00020A0 +#define ACP_AUDIO2_RX_DMA_SIZE 0x00020A4 +#define ACP_AUDIO2_RX_LINEARPOSITIONCNTR_HIGH 0x00020A8 +#define ACP_AUDIO2_RX_LINEARPOSITIONCNTR_LOW 0x00020AC +#define ACP_AUDIO2_RX_INTR_WATERMARK_SIZE 0x00020B0 +#define ACP_AUDIO2_TX_RINGBUFADDR 0x00020B4 +#define ACP_AUDIO2_TX_RINGBUFSIZE 0x00020B8 +#define ACP_AUDIO2_TX_LINKPOSITIONCNTR 0x00020BC +#define ACP_AUDIO2_TX_FIFOADDR 0x00020C0 +#define ACP_AUDIO2_TX_FIFOSIZE 0x00020C4 +#define ACP_AUDIO2_TX_DMA_SIZE 0x00020C8 +#define ACP_AUDIO2_TX_LINEARPOSITIONCNTR_HIGH 0x00020CC +#define ACP_AUDIO2_TX_LINEARPOSITIONCNTR_LOW 0x00020D0 +#define ACP_AUDIO2_TX_INTR_WATERMARK_SIZE 0x00020D4 /* Registers from ACP_I2S_TDM block */ #define ACP_I2STDM_IER 0x0002400 @@ -292,367 +274,222 @@ #define ACP_WOV_ERROR_STATUS_REGISTER 0x0002C68 #define ACP_PDM_CLKDIV 0x0002C6C -/* Registers from ACP_SW_SWCLK block */ -#define ACP_SW_EN 0x0003000 -#define ACP_SW_EN_STATUS 0x0003004 -#define ACP_SW_FRAMESIZE 0x0003008 -#define ACP_SW_SSP_COUNTER 0x000300C -#define ACP_SW_AUDIO_TX_EN 0x0003010 -#define ACP_SW_AUDIO_TX_EN_STATUS 0x0003014 -#define ACP_SW_AUDIO_TX_FRAME_FORMAT 0x0003018 -#define ACP_SW_AUDIO_TX_SAMPLEINTERVAL 0x000301C -#define ACP_SW_AUDIO_TX_HCTRL_DP0 0x0003020 -#define ACP_SW_AUDIO_TX_HCTRL_DP1 0x0003024 -#define ACP_SW_AUDIO_TX_HCTRL_DP2 0x0003028 -#define ACP_SW_AUDIO_TX_HCTRL_DP3 0x000302C -#define ACP_SW_AUDIO_TX_OFFSET_DP0 0x0003030 -#define ACP_SW_AUDIO_TX_OFFSET_DP1 0x0003034 -#define ACP_SW_AUDIO_TX_OFFSET_DP2 0x0003038 -#define ACP_SW_AUDIO_TX_OFFSET_DP3 0x000303C -#define ACP_SW_AUDIO_TX_CHANNEL_ENABLE_DP0 0x0003040 -#define ACP_SW_AUDIO_TX_CHANNEL_ENABLE_DP1 0x0003044 -#define ACP_SW_AUDIO_TX_CHANNEL_ENABLE_DP2 0x0003048 -#define ACP_SW_AUDIO_TX_CHANNEL_ENABLE_DP3 0x000304C -#define ACP_SW_BT_TX_EN 0x0003050 -#define ACP_SW_BT_TX_EN_STATUS 0x0003054 -#define ACP_SW_BT_TX_FRAME_FORMAT 0x0003058 -#define ACP_SW_BT_TX_SAMPLEINTERVAL 0x000305C -#define ACP_SW_BT_TX_HCTRL 0x0003060 -#define ACP_SW_BT_TX_OFFSET 0x0003064 -#define ACP_SW_BT_TX_CHANNEL_ENABLE_DP0 0x0003068 -#define ACP_SW_HEADSET_TX_EN 0x000306C -#define ACP_SW_HEADSET_TX_EN_STATUS 0x0003070 -#define ACP_SW_HEADSET_TX_FRAME_FORMAT 0x0003074 -#define ACP_SW_HEADSET_TX_SAMPLEINTERVAL 0x0003078 -#define ACP_SW_HEADSET_TX_HCTRL 0x000307C -#define ACP_SW_HEADSET_TX_OFFSET 0x0003080 -#define ACP_SW_HEADSET_TX_CHANNEL_ENABLE_DP0 0x0003084 -#define ACP_SW_AUDIO_RX_EN 0x0003088 -#define ACP_SW_AUDIO_RX_EN_STATUS 0x000308C -#define ACP_SW_AUDIO_RX_FRAME_FORMAT 0x0003090 -#define ACP_SW_AUDIO_RX_SAMPLEINTERVAL 0x0003094 -#define ACP_SW_AUDIO_RX_HCTRL_DP0 0x0003098 -#define ACP_SW_AUDIO_RX_HCTRL_DP1 0x000309C -#define ACP_SW_AUDIO_RX_HCTRL_DP2 0x0003100 -#define ACP_SW_AUDIO_RX_HCTRL_DP3 0x0003104 -#define ACP_SW_AUDIO_RX_OFFSET_DP0 0x0003108 -#define ACP_SW_AUDIO_RX_OFFSET_DP1 0x000310C -#define ACP_SW_AUDIO_RX_OFFSET_DP2 0x0003110 -#define ACP_SW_AUDIO_RX_OFFSET_DP3 0x0003114 -#define ACP_SW_AUDIO_RX_CHANNEL_ENABLE_DP0 0x0003118 -#define ACP_SW_AUDIO_RX_CHANNEL_ENABLE_DP1 0x000311C -#define ACP_SW_AUDIO_RX_CHANNEL_ENABLE_DP2 0x0003120 -#define ACP_SW_AUDIO_RX_CHANNEL_ENABLE_DP3 0x0003124 -#define ACP_SW_BT_RX_EN 0x0003128 -#define ACP_SW_BT_RX_EN_STATUS 0x000312C -#define ACP_SW_BT_RX_FRAME_FORMAT 0x0003130 -#define ACP_SW_BT_RX_SAMPLEINTERVAL 0x0003134 -#define ACP_SW_BT_RX_HCTRL 0x0003138 -#define ACP_SW_BT_RX_OFFSET 0x000313C -#define ACP_SW_BT_RX_CHANNEL_ENABLE_DP0 0x0003140 -#define ACP_SW_HEADSET_RX_EN 0x0003144 -#define ACP_SW_HEADSET_RX_EN_STATUS 0x0003148 -#define ACP_SW_HEADSET_RX_FRAME_FORMAT 0x000314C -#define ACP_SW_HEADSET_RX_SAMPLEINTERVAL 0x0003150 -#define ACP_SW_HEADSET_RX_HCTRL 0x0003154 -#define ACP_SW_HEADSET_RX_OFFSET 0x0003158 -#define ACP_SW_HEADSET_RX_CHANNEL_ENABLE_DP0 0x000315C -#define ACP_SW_BPT_PORT_EN 0x0003160 -#define ACP_SW_BPT_PORT_EN_STATUS 0x0003164 -#define ACP_SW_BPT_PORT_FRAME_FORMAT 0x0003168 -#define ACP_SW_BPT_PORT_SAMPLEINTERVAL 0x000316C -#define ACP_SW_BPT_PORT_HCTRL 0x0003170 -#define ACP_SW_BPT_PORT_OFFSET 0x0003174 -#define ACP_SW_BPT_PORT_CHANNEL_ENABLE 0x0003178 -#define ACP_SW_BPT_PORT_FIRST_BYTE_ADDR 0x000317C -#define ACP_SW_CLK_RESUME_CTRL 0x0003180 -#define ACP_SW_CLK_RESUME_DELAY_CNTR 0x0003184 -#define ACP_SW_BUS_RESET_CTRL 0x0003188 -#define ACP_SW_PRBS_ERR_STATUS 0x000318C -#define SW_IMM_CMD_UPPER_WORD 0x0003230 -#define SW_IMM_CMD_LOWER_QWORD 0x0003234 -#define SW_IMM_RESP_UPPER_WORD 0x0003238 -#define SW_IMM_RESP_LOWER_QWORD 0x000323C -#define SW_IMM_CMD_STS 0x0003240 -#define SW_BRA_BASE_ADDRESS 0x0003244 -#define SW_BRA_TRANSFER_SIZE 0x0003248 -#define SW_BRA_DMA_BUSY 0x000324C -#define SW_BRA_RESP 0x0003250 -#define SW_BRA_RESP_FRAME_ADDR 0x0003254 -#define SW_BRA_CURRENT_TRANSFER_SIZE 0x0003258 -#define SW_STATE_CHANGE_STATUS_0TO7 0x000325C -#define SW_STATE_CHANGE_STATUS_8TO11 0x0003260 -#define SW_STATE_CHANGE_STATUS_MASK_0TO7 0x0003264 -#define SW_STATE_CHANGE_STATUS_MASK_8TO11 0x0003268 -#define SW_CLK_FREQUENCY_CTRL 0x000326C -#define SW_ERROR_INTR_MASK 0x0003270 -#define SW_PHY_TEST_MODE_DATA_OFF 0x0003274 +/* Registers from ACP_SW0_SWCLK block */ +#define ACP_SW0_EN 0x0003000 +#define ACP_SW0_EN_STATUS 0x0003004 +#define ACP_SW0_FRAMESIZE 0x0003008 +#define ACP_SW0_SSP_COUNTER 0x000300C +#define ACP_SW0_AUDIO0_TX_EN 0x0003010 +#define ACP_SW0_AUDIO0_TX_EN_STATUS 0x0003014 +#define ACP_SW0_AUDIO0_TX_FRAME_FORMAT 0x0003018 +#define ACP_SW0_AUDIO0_TX_SAMPLEINTERVAL 0x000301C +#define ACP_SW0_AUDIO0_TX_HCTRL_DP0 0x0003020 +#define ACP_SW0_AUDIO0_TX_HCTRL_DP1 0x0003024 +#define ACP_SW0_AUDIO0_TX_HCTRL_DP2 0x0003028 +#define ACP_SW0_AUDIO0_TX_HCTRL_DP3 0x000302C +#define ACP_SW0_AUDIO0_TX_OFFSET_DP0 0x0003030 +#define ACP_SW0_AUDIO0_TX_OFFSET_DP1 0x0003034 +#define ACP_SW0_AUDIO0_TX_OFFSET_DP2 0x0003038 +#define ACP_SW0_AUDIO0_TX_OFFSET_DP3 0x000303C +#define ACP_SW0_AUDIO0_TX_CHANNEL_ENABLE_DP0 0x0003040 +#define ACP_SW0_AUDIO0_TX_CHANNEL_ENABLE_DP1 0x0003044 +#define ACP_SW0_AUDIO0_TX_CHANNEL_ENABLE_DP2 0x0003048 +#define ACP_SW0_AUDIO0_TX_CHANNEL_ENABLE_DP3 0x000304C +#define ACP_SW0_AUDIO1_TX_EN 0x0003050 +#define ACP_SW0_AUDIO1_TX_EN_STATUS 0x0003054 +#define ACP_SW0_AUDIO1_TX_FRAME_FORMAT 0x0003058 +#define ACP_SW0_AUDIO1_TX_SAMPLEINTERVAL 0x000305C +#define ACP_SW0_AUDIO1_TX_HCTRL 0x0003060 +#define ACP_SW0_AUDIO1_TX_OFFSET 0x0003064 +#define ACP_SW0_AUDIO1_TX_CHANNEL_ENABLE_DP0 0x0003068 +#define ACP_SW0_AUDIO2_TX_EN 0x000306C +#define ACP_SW0_AUDIO2_TX_EN_STATUS 0x0003070 +#define ACP_SW0_AUDIO2_TX_FRAME_FORMAT 0x0003074 +#define ACP_SW0_AUDIO2_TX_SAMPLEINTERVAL 0x0003078 +#define ACP_SW0_AUDIO2_TX_HCTRL 0x000307C +#define ACP_SW0_AUDIO2_TX_OFFSET 0x0003080 +#define ACP_SW0_AUDIO2_TX_CHANNEL_ENABLE_DP0 0x0003084 +#define ACP_SW0_AUDIO0_RX_EN 0x0003088 +#define ACP_SW0_AUDIO0_RX_EN_STATUS 0x000308C +#define ACP_SW0_AUDIO0_RX_FRAME_FORMAT 0x0003090 +#define ACP_SW0_AUDIO0_RX_SAMPLEINTERVAL 0x0003094 +#define ACP_SW0_AUDIO0_RX_HCTRL_DP0 0x0003098 +#define ACP_SW0_AUDIO0_RX_HCTRL_DP1 0x000309C +#define ACP_SW0_AUDIO0_RX_HCTRL_DP2 0x0003100 +#define ACP_SW0_AUDIO0_RX_HCTRL_DP3 0x0003104 +#define ACP_SW0_AUDIO0_RX_OFFSET_DP0 0x0003108 +#define ACP_SW0_AUDIO0_RX_OFFSET_DP1 0x000310C +#define ACP_SW0_AUDIO0_RX_OFFSET_DP2 0x0003110 +#define ACP_SW0_AUDIO0_RX_OFFSET_DP3 0x0003114 +#define ACP_SW0_AUDIO0_RX_CHANNEL_ENABLE_DP0 0x0003118 +#define ACP_SW0_AUDIO0_RX_CHANNEL_ENABLE_DP1 0x000311C +#define ACP_SW0_AUDIO0_RX_CHANNEL_ENABLE_DP2 0x0003120 +#define ACP_SW0_AUDIO0_RX_CHANNEL_ENABLE_DP3 0x0003124 +#define ACP_SW0_AUDIO1_RX_EN 0x0003128 +#define ACP_SW0_AUDIO1_RX_EN_STATUS 0x000312C +#define ACP_SW0_AUDIO1_RX_FRAME_FORMAT 0x0003130 +#define ACP_SW0_AUDIO1_RX_SAMPLEINTERVAL 0x0003134 +#define ACP_SW0_AUDIO1_RX_HCTRL 0x0003138 +#define ACP_SW0_AUDIO1_RX_OFFSET 0x000313C +#define ACP_SW0_AUDIO1_RX_CHANNEL_ENABLE_DP0 0x0003140 +#define ACP_SW0_AUDIO2_RX_EN 0x0003144 +#define ACP_SW0_AUDIO2_RX_EN_STATUS 0x0003148 +#define ACP_SW0_AUDIO2_RX_FRAME_FORMAT 0x000314C +#define ACP_SW0_AUDIO2_RX_SAMPLEINTERVAL 0x0003150 +#define ACP_SW0_AUDIO2_RX_HCTRL 0x0003154 +#define ACP_SW0_AUDIO2_RX_OFFSET 0x0003158 +#define ACP_SW0_AUDIO2_RX_CHANNEL_ENABLE_DP0 0x000315C +#define ACP_SW0_BPT_PORT_EN 0x0003160 +#define ACP_SW0_BPT_PORT_EN_STATUS 0x0003164 +#define ACP_SW0_BPT_PORT_FRAME_FORMAT 0x0003168 +#define ACP_SW0_BPT_PORT_SAMPLEINTERVAL 0x000316C +#define ACP_SW0_BPT_PORT_HCTRL 0x0003170 +#define ACP_SW0_BPT_PORT_OFFSET 0x0003174 +#define ACP_SW0_BPT_PORT_CHANNEL_ENABLE 0x0003178 +#define ACP_SW0_BPT_PORT_FIRST_BYTE_ADDR 0x000317C +#define ACP_SW0_CLK_RESUME_CTRL 0x0003180 +#define ACP_SW0_CLK_RESUME_DELAY_CNTR 0x0003184 +#define ACP_SW0_BUS_RESET_CTRL 0x0003188 +#define ACP_SW0_PRBS_ERR_STATUS 0x000318C +#define ACP_SW0_IMM_CMD_UPPER_WORD 0x0003230 +#define ACP_SW0_IMM_CMD_LOWER_QWORD 0x0003234 +#define ACP_SW0_IMM_RESP_UPPER_WORD 0x0003238 +#define ACP_SW0_IMM_RESP_LOWER_QWORD 0x000323C +#define ACP_SW0_IMM_CMD_STS 0x0003240 +#define ACP_SW0_BRA_BASE_ADDRESS 0x0003244 +#define ACP_SW0_BRA_TRANSFER_SIZE 0x0003248 +#define ACP_SW0_BRA_DMA_BUSY 0x000324C +#define ACP_SW0_BRA_RESP 0x0003250 +#define ACP_SW0_BRA_RESP_FRAME_ADDR 0x0003254 +#define ACP_SW0_BRA_CURRENT_TRANSFER_SIZE 0x0003258 +#define ACP_SW0_STATECHANGE_STATUS_0TO7 0x000325C +#define ACP_SW0_STATECHANGE_STATUS_8TO11 0x0003260 +#define ACP_SW0_STATECHANGE_STATUS_MASK_0TO7 0x0003264 +#define ACP_SW0_STATECHANGE_STATUS_MASK_8TO11 0x0003268 +#define ACP_SW0_CLK_FREQUENCY_CTRL 0x000326C +#define ACP_SW0_ERROR_INTR_MASK 0x0003270 +#define ACP_SW0_PHY_TEST_MODE_DATA_OFF 0x0003274 /* Registers from ACP_P1_AUDIO_BUFFERS block */ -#define ACP_P1_I2S_RX_RINGBUFADDR 0x0003A00 -#define ACP_P1_I2S_RX_RINGBUFSIZE 0x0003A04 -#define ACP_P1_I2S_RX_LINKPOSITIONCNTR 0x0003A08 -#define ACP_P1_I2S_RX_FIFOADDR 0x0003A0C -#define ACP_P1_I2S_RX_FIFOSIZE 0x0003A10 -#define ACP_P1_I2S_RX_DMA_SIZE 0x0003A14 -#define ACP_P1_I2S_RX_LINEARPOSITIONCNTR_HIGH 0x0003A18 -#define ACP_P1_I2S_RX_LINEARPOSITIONCNTR_LOW 0x0003A1C -#define ACP_P1_I2S_RX_INTR_WATERMARK_SIZE 0x0003A20 -#define ACP_P1_I2S_TX_RINGBUFADDR 0x0003A24 -#define ACP_P1_I2S_TX_RINGBUFSIZE 0x0003A28 -#define ACP_P1_I2S_TX_LINKPOSITIONCNTR 0x0003A2C -#define ACP_P1_I2S_TX_FIFOADDR 0x0003A30 -#define ACP_P1_I2S_TX_FIFOSIZE 0x0003A34 -#define ACP_P1_I2S_TX_DMA_SIZE 0x0003A38 -#define ACP_P1_I2S_TX_LINEARPOSITIONCNTR_HIGH 0x0003A3C -#define ACP_P1_I2S_TX_LINEARPOSITIONCNTR_LOW 0x0003A40 -#define ACP_P1_I2S_TX_INTR_WATERMARK_SIZE 0x0003A44 -#define ACP_P1_BT_RX_RINGBUFADDR 0x0003A48 -#define ACP_P1_BT_RX_RINGBUFSIZE 0x0003A4C -#define ACP_P1_BT_RX_LINKPOSITIONCNTR 0x0003A50 -#define ACP_P1_BT_RX_FIFOADDR 0x0003A54 -#define ACP_P1_BT_RX_FIFOSIZE 0x0003A58 -#define ACP_P1_BT_RX_DMA_SIZE 0x0003A5C -#define ACP_P1_BT_RX_LINEARPOSITIONCNTR_HIGH 0x0003A60 -#define ACP_P1_BT_RX_LINEARPOSITIONCNTR_LOW 0x0003A64 -#define ACP_P1_BT_RX_INTR_WATERMARK_SIZE 0x0003A68 -#define ACP_P1_BT_TX_RINGBUFADDR 0x0003A6C -#define ACP_P1_BT_TX_RINGBUFSIZE 0x0003A70 -#define ACP_P1_BT_TX_LINKPOSITIONCNTR 0x0003A74 -#define ACP_P1_BT_TX_FIFOADDR 0x0003A78 -#define ACP_P1_BT_TX_FIFOSIZE 0x0003A7C -#define ACP_P1_BT_TX_DMA_SIZE 0x0003A80 -#define ACP_P1_BT_TX_LINEARPOSITIONCNTR_HIGH 0x0003A84 -#define ACP_P1_BT_TX_LINEARPOSITIONCNTR_LOW 0x0003A88 -#define ACP_P1_BT_TX_INTR_WATERMARK_SIZE 0x0003A8C -#define ACP_P1_HS_RX_RINGBUFADDR 0x0003A90 -#define ACP_P1_HS_RX_RINGBUFSIZE 0x0003A94 -#define ACP_P1_HS_RX_LINKPOSITIONCNTR 0x0003A98 -#define ACP_P1_HS_RX_FIFOADDR 0x0003A9C -#define ACP_P1_HS_RX_FIFOSIZE 0x0003AA0 -#define ACP_P1_HS_RX_DMA_SIZE 0x0003AA4 -#define ACP_P1_HS_RX_LINEARPOSITIONCNTR_HIGH 0x0003AA8 -#define ACP_P1_HS_RX_LINEARPOSITIONCNTR_LOW 0x0003AAC -#define ACP_P1_HS_RX_INTR_WATERMARK_SIZE 0x0003AB0 -#define ACP_P1_HS_TX_RINGBUFADDR 0x0003AB4 -#define ACP_P1_HS_TX_RINGBUFSIZE 0x0003AB8 -#define ACP_P1_HS_TX_LINKPOSITIONCNTR 0x0003ABC -#define ACP_P1_HS_TX_FIFOADDR 0x0003AC0 -#define ACP_P1_HS_TX_FIFOSIZE 0x0003AC4 -#define ACP_P1_HS_TX_DMA_SIZE 0x0003AC8 -#define ACP_P1_HS_TX_LINEARPOSITIONCNTR_HIGH 0x0003ACC -#define ACP_P1_HS_TX_LINEARPOSITIONCNTR_LOW 0x0003AD0 -#define ACP_P1_HS_TX_INTR_WATERMARK_SIZE 0x0003AD4 -#define ACP_P1_AUDIO_RX_RINGBUFADDR ACP_P1_I2S_RX_RINGBUFADDR -#define ACP_P1_AUDIO_RX_RINGBUFSIZE ACP_P1_I2S_RX_RINGBUFSIZE -#define ACP_P1_AUDIO_RX_LINKPOSITIONCNTR ACP_P1_I2S_RX_LINKPOSITIONCNTR -#define ACP_P1_AUDIO_RX_FIFOADDR ACP_P1_I2S_RX_FIFOADDR -#define ACP_P1_AUDIO_RX_FIFOSIZE ACP_P1_I2S_RX_FIFOSIZE -#define ACP_P1_AUDIO_RX_DMA_SIZE ACP_P1_I2S_RX_DMA_SIZE -#define ACP_P1_AUDIO_RX_LINEARPOSITIONCNTR_HIGH ACP_P1_I2S_RX_LINEARPOSITIONCNTR_HIGH -#define ACP_P1_AUDIO_RX_LINEARPOSITIONCNTR_LOW ACP_P1_I2S_RX_LINEARPOSITIONCNTR_LOW -#define ACP_P1_AUDIO_RX_INTR_WATERMARK_SIZE ACP_P1_I2S_RX_INTR_WATERMARK_SIZE -#define ACP_P1_AUDIO_TX_RINGBUFADDR ACP_P1_I2S_TX_RINGBUFADDR -#define ACP_P1_AUDIO_TX_RINGBUFSIZE ACP_P1_I2S_TX_RINGBUFSIZE -#define ACP_P1_AUDIO_TX_LINKPOSITIONCNTR ACP_P1_I2S_TX_LINKPOSITIONCNTR -#define ACP_P1_AUDIO_TX_FIFOADDR ACP_P1_I2S_TX_FIFOADDR -#define ACP_P1_AUDIO_TX_FIFOSIZE ACP_P1_I2S_TX_FIFOSIZE -#define ACP_P1_AUDIO_TX_DMA_SIZE ACP_P1_I2S_TX_DMA_SIZE -#define ACP_P1_AUDIO_TX_LINEARPOSITIONCNTR_HIGH ACP_P1_I2S_TX_LINEARPOSITIONCNTR_HIGH -#define ACP_P1_AUDIO_TX_LINEARPOSITIONCNTR_LOW ACP_P1_I2S_TX_LINEARPOSITIONCNTR_LOW -#define ACP_P1_AUDIO_TX_INTR_WATERMARK_SIZE ACP_P1_I2S_TX_INTR_WATERMARK_SIZE +#define ACP_P1_AUDIO0_RX_RINGBUFADDR 0x0003A00 +#define ACP_P1_AUDIO0_RX_RINGBUFSIZE 0x0003A04 +#define ACP_P1_AUDIO0_RX_LINKPOSITIONCNTR 0x0003A08 +#define ACP_P1_AUDIO0_RX_FIFOADDR 0x0003A0C +#define ACP_P1_AUDIO0_RX_FIFOSIZE 0x0003A10 +#define ACP_P1_AUDIO0_RX_DMA_SIZE 0x0003A14 +#define ACP_P1_AUDIO0_RX_LINEARPOSITIONCNTR_HIGH 0x0003A18 +#define ACP_P1_AUDIO0_RX_LINEARPOSITIONCNTR_LOW 0x0003A1C +#define ACP_P1_AUDIO0_RX_INTR_WATERMARK_SIZE 0x0003A20 +#define ACP_P1_AUDIO0_TX_RINGBUFADDR 0x0003A24 +#define ACP_P1_AUDIO0_TX_RINGBUFSIZE 0x0003A28 +#define ACP_P1_AUDIO0_TX_LINKPOSITIONCNTR 0x0003A2C +#define ACP_P1_AUDIO0_TX_FIFOADDR 0x0003A30 +#define ACP_P1_AUDIO0_TX_FIFOSIZE 0x0003A34 +#define ACP_P1_AUDIO0_TX_DMA_SIZE 0x0003A38 +#define ACP_P1_AUDIO0_TX_LINEARPOSITIONCNTR_HIGH 0x0003A3C +#define ACP_P1_AUDIO0_TX_LINEARPOSITIONCNTR_LOW 0x0003A40 +#define ACP_P1_AUDIO0_TX_INTR_WATERMARK_SIZE 0x0003A44 +#define ACP_P1_AUDIO1_RX_RINGBUFADDR 0x0003A48 +#define ACP_P1_AUDIO1_RX_RINGBUFSIZE 0x0003A4C +#define ACP_P1_AUDIO1_RX_LINKPOSITIONCNTR 0x0003A50 +#define ACP_P1_AUDIO1_RX_FIFOADDR 0x0003A54 +#define ACP_P1_AUDIO1_RX_FIFOSIZE 0x0003A58 +#define ACP_P1_AUDIO1_RX_DMA_SIZE 0x0003A5C +#define ACP_P1_AUDIO1_RX_LINEARPOSITIONCNTR_HIGH 0x0003A60 +#define ACP_P1_AUDIO1_RX_LINEARPOSITIONCNTR_LOW 0x0003A64 +#define ACP_P1_AUDIO1_RX_INTR_WATERMARK_SIZE 0x0003A68 +#define ACP_P1_AUDIO1_TX_RINGBUFADDR 0x0003A6C +#define ACP_P1_AUDIO1_TX_RINGBUFSIZE 0x0003A70 +#define ACP_P1_AUDIO1_TX_LINKPOSITIONCNTR 0x0003A74 +#define ACP_P1_AUDIO1_TX_FIFOADDR 0x0003A78 +#define ACP_P1_AUDIO1_TX_FIFOSIZE 0x0003A7C +#define ACP_P1_AUDIO1_TX_DMA_SIZE 0x0003A80 +#define ACP_P1_AUDIO1_TX_LINEARPOSITIONCNTR_HIGH 0x0003A84 +#define ACP_P1_AUDIO1_TX_LINEARPOSITIONCNTR_LOW 0x0003A88 +#define ACP_P1_AUDIO1_TX_INTR_WATERMARK_SIZE 0x0003A8C +#define ACP_P1_AUDIO2_RX_RINGBUFADDR 0x0003A90 +#define ACP_P1_AUDIO2_RX_RINGBUFSIZE 0x0003A94 +#define ACP_P1_AUDIO2_RX_LINKPOSITIONCNTR 0x0003A98 +#define ACP_P1_AUDIO2_RX_FIFOADDR 0x0003A9C +#define ACP_P1_AUDIO2_RX_FIFOSIZE 0x0003AA0 +#define ACP_P1_AUDIO2_RX_DMA_SIZE 0x0003AA4 +#define ACP_P1_AUDIO2_RX_LINEARPOSITIONCNTR_HIGH 0x0003AA8 +#define ACP_P1_AUDIO2_RX_LINEARPOSITIONCNTR_LOW 0x0003AAC +#define ACP_P1_AUDIO2_RX_INTR_WATERMARK_SIZE 0x0003AB0 +#define ACP_P1_AUDIO2_TX_RINGBUFADDR 0x0003AB4 +#define ACP_P1_AUDIO2_TX_RINGBUFSIZE 0x0003AB8 +#define ACP_P1_AUDIO2_TX_LINKPOSITIONCNTR 0x0003ABC +#define ACP_P1_AUDIO2_TX_FIFOADDR 0x0003AC0 +#define ACP_P1_AUDIO2_TX_FIFOSIZE 0x0003AC4 +#define ACP_P1_AUDIO2_TX_DMA_SIZE 0x0003AC8 +#define ACP_P1_AUDIO2_TX_LINEARPOSITIONCNTR_HIGH 0x0003ACC +#define ACP_P1_AUDIO2_TX_LINEARPOSITIONCNTR_LOW 0x0003AD0 +#define ACP_P1_AUDIO2_TX_INTR_WATERMARK_SIZE 0x0003AD4 -/* Registers from ACP_P1_SW_SWCLK block */ -#define ACP_P1_SW_EN 0x0003C00 -#define ACP_P1_SW_EN_STATUS 0x0003C04 -#define ACP_P1_SW_FRAMESIZE 0x0003C08 -#define ACP_P1_SW_SSP_COUNTER 0x0003C0C -#define ACP_P1_SW_BT_TX_EN 0x0003C50 -#define ACP_P1_SW_BT_TX_EN_STATUS 0x0003C54 -#define ACP_P1_SW_BT_TX_FRAME_FORMAT 0x0003C58 -#define ACP_P1_SW_BT_TX_SAMPLEINTERVAL 0x0003C5C -#define ACP_P1_SW_BT_TX_HCTRL 0x0003C60 -#define ACP_P1_SW_BT_TX_OFFSET 0x0003C64 -#define ACP_P1_SW_BT_TX_CHANNEL_ENABLE_DP0 0x0003C68 -#define ACP_P1_SW_BT_RX_EN 0x0003D28 -#define ACP_P1_SW_BT_RX_EN_STATUS 0x0003D2C -#define ACP_P1_SW_BT_RX_FRAME_FORMAT 0x0003D30 -#define ACP_P1_SW_BT_RX_SAMPLEINTERVAL 0x0003D34 -#define ACP_P1_SW_BT_RX_HCTRL 0x0003D38 -#define ACP_P1_SW_BT_RX_OFFSET 0x0003D3C -#define ACP_P1_SW_BT_RX_CHANNEL_ENABLE_DP0 0x0003D40 -#define ACP_P1_SW_BPT_PORT_EN 0x0003D60 -#define ACP_P1_SW_BPT_PORT_EN_STATUS 0x0003D64 -#define ACP_P1_SW_BPT_PORT_FRAME_FORMAT 0x0003D68 -#define ACP_P1_SW_BPT_PORT_SAMPLEINTERVAL 0x0003D6C -#define ACP_P1_SW_BPT_PORT_HCTRL 0x0003D70 -#define ACP_P1_SW_BPT_PORT_OFFSET 0x0003D74 -#define ACP_P1_SW_BPT_PORT_CHANNEL_ENABLE 0x0003D78 -#define ACP_P1_SW_BPT_PORT_FIRST_BYTE_ADDR 0x0003D7C -#define ACP_P1_SW_CLK_RESUME_CTRL 0x0003D80 -#define ACP_P1_SW_CLK_RESUME_DELAY_CNTR 0x0003D84 -#define ACP_P1_SW_BUS_RESET_CTRL 0x0003D88 -#define ACP_P1_SW_PRBS_ERR_STATUS 0x0003D8C +/* Registers from ACP_SW1_SWCLK block */ +#define ACP_SW1_EN 0x0003C00 +#define ACP_SW1_EN_STATUS 0x0003C04 +#define ACP_SW1_FRAMESIZE 0x0003C08 +#define ACP_SW1_SSP_COUNTER 0x0003C0C +#define ACP_SW1_AUDIO1_TX_EN 0x0003C50 +#define ACP_SW1_AUDIO1_TX_EN_STATUS 0x0003C54 +#define ACP_SW1_AUDIO1_TX_FRAME_FORMAT 0x0003C58 +#define ACP_SW1_AUDIO1_TX_SAMPLEINTERVAL 0x0003C5C +#define ACP_SW1_AUDIO1_TX_HCTRL 0x0003C60 +#define ACP_SW1_AUDIO1_TX_OFFSET 0x0003C64 +#define ACP_SW1_AUDIO1_TX_CHANNEL_ENABLE_DP0 0x0003C68 +#define ACP_SW1_AUDIO1_RX_EN 0x0003D28 +#define ACP_SW1_AUDIO1_RX_EN_STATUS 0x0003D2C +#define ACP_SW1_AUDIO1_RX_FRAME_FORMAT 0x0003D30 +#define ACP_SW1_AUDIO1_RX_SAMPLEINTERVAL 0x0003D34 +#define ACP_SW1_AUDIO1_RX_HCTRL 0x0003D38 +#define ACP_SW1_AUDIO1_RX_OFFSET 0x0003D3C +#define ACP_SW1_AUDIO1_RX_CHANNEL_ENABLE_DP0 0x0003D40 +#define ACP_SW1_BPT_PORT_EN 0x0003D60 +#define ACP_SW1_BPT_PORT_EN_STATUS 0x0003D64 +#define ACP_SW1_BPT_PORT_FRAME_FORMAT 0x0003D68 +#define ACP_SW1_BPT_PORT_SAMPLEINTERVAL 0x0003D6C +#define ACP_SW1_BPT_PORT_HCTRL 0x0003D70 +#define ACP_SW1_BPT_PORT_OFFSET 0x0003D74 +#define ACP_SW1_BPT_PORT_CHANNEL_ENABLE 0x0003D78 +#define ACP_SW1_BPT_PORT_FIRST_BYTE_ADDR 0x0003D7C +#define ACP_SW1_CLK_RESUME_CTRL 0x0003D80 +#define ACP_SW1_CLK_RESUME_DELAY_CNTR 0x0003D84 +#define ACP_SW1_BUS_RESET_CTRL 0x0003D88 +#define ACP_SW1_PRBS_ERR_STATUS 0x0003D8C -/* Registers from ACP_P1_SW_ACLK block */ -#define P1_SW_CORB_BASE_ADDRESS 0x0003E00 -#define P1_SW_CORB_WRITE_POINTER 0x0003E04 -#define P1_SW_CORB_READ_POINTER 0x0003E08 -#define P1_SW_CORB_CONTROL 0x0003E0C -#define P1_SW_CORB_SIZE 0x0003E14 -#define P1_SW_RIRB_BASE_ADDRESS 0x0003E18 -#define P1_SW_RIRB_WRITE_POINTER 0x0003E1C -#define P1_SW_RIRB_RESPONSE_INTERRUPT_COUNT 0x0003E20 -#define P1_SW_RIRB_CONTROL 0x0003E24 -#define P1_SW_RIRB_SIZE 0x0003E28 -#define P1_SW_RIRB_FIFO_MIN_THDL 0x0003E2C -#define P1_SW_IMM_CMD_UPPER_WORD 0x0003E30 -#define P1_SW_IMM_CMD_LOWER_QWORD 0x0003E34 -#define P1_SW_IMM_RESP_UPPER_WORD 0x0003E38 -#define P1_SW_IMM_RESP_LOWER_QWORD 0x0003E3C -#define P1_SW_IMM_CMD_STS 0x0003E40 -#define P1_SW_BRA_BASE_ADDRESS 0x0003E44 -#define P1_SW_BRA_TRANSFER_SIZE 0x0003E48 -#define P1_SW_BRA_DMA_BUSY 0x0003E4C -#define P1_SW_BRA_RESP 0x0003E50 -#define P1_SW_BRA_RESP_FRAME_ADDR 0x0003E54 -#define P1_SW_BRA_CURRENT_TRANSFER_SIZE 0x0003E58 -#define P1_SW_STATE_CHANGE_STATUS_0TO7 0x0003E5C -#define P1_SW_STATE_CHANGE_STATUS_8TO11 0x0003E60 -#define P1_SW_STATE_CHANGE_STATUS_MASK_0TO7 0x0003E64 -#define P1_SW_STATE_CHANGE_STATUS_MASK_8TO11 0x0003E68 -#define P1_SW_CLK_FREQUENCY_CTRL 0x0003E6C -#define P1_SW_ERROR_INTR_MASK 0x0003E70 -#define P1_SW_PHY_TEST_MODE_DATA_OFF 0x0003E74 +/* Registers from ACP_SW1_ACLK block */ +#define ACP_SW1_CORB_BASE_ADDRESS 0x0003E00 +#define ACP_SW1_CORB_WRITE_POINTER 0x0003E04 +#define ACP_SW1_CORB_READ_POINTER 0x0003E08 +#define ACP_SW1_CORB_CONTROL 0x0003E0C +#define ACP_SW1_CORB_SIZE 0x0003E14 +#define ACP_SW1_RIRB_BASE_ADDRESS 0x0003E18 +#define ACP_SW1_RIRB_WRITE_POINTER 0x0003E1C +#define ACP_SW1_RIRB_RESPONSE_INTERRUPT_COUNT 0x0003E20 +#define ACP_SW1_RIRB_CONTROL 0x0003E24 +#define ACP_SW1_RIRB_SIZE 0x0003E28 +#define ACP_SW1_RIRB_FIFO_MIN_THDL 0x0003E2C +#define ACP_SW1_IMM_CMD_UPPER_WORD 0x0003E30 +#define ACP_SW1_IMM_CMD_LOWER_QWORD 0x0003E34 +#define ACP_SW1_IMM_RESP_UPPER_WORD 0x0003E38 +#define ACP_SW1_IMM_RESP_LOWER_QWORD 0x0003E3C +#define ACP_SW1_IMM_CMD_STS 0x0003E40 +#define ACP_SW1_BRA_BASE_ADDRESS 0x0003E44 +#define ACP_SW1_BRA_TRANSFER_SIZE 0x0003E48 +#define ACP_SW1_BRA_DMA_BUSY 0x0003E4C +#define ACP_SW1_BRA_RESP 0x0003E50 +#define ACP_SW1_BRA_RESP_FRAME_ADDR 0x0003E54 +#define ACP_SW1_BRA_CURRENT_TRANSFER_SIZE 0x0003E58 +#define ACP_SW1_STATECHANGE_STATUS_0TO7 0x0003E5C +#define ACP_SW1_STATECHANGE_STATUS_8TO11 0x0003E60 +#define ACP_SW1_STATECHANGE_STATUS_MASK_0TO7 0x0003E64 +#define ACP_SW1_STATECHANGE_STATUS_MASK_8TO11 0x0003E68 +#define ACP_SW1_CLK_FREQUENCY_CTRL 0x0003E6C +#define ACP_SW1_ERROR_INTR_MASK 0x0003E70 +#define ACP_SW1_PHY_TEST_MODE_DATA_OFF 0x0003E74 /* Registers from ACP_SCRATCH block */ -#define ACP_SCRATCH_REG_0 0x0010000 -#define ACP_SCRATCH_REG_1 0x0010004 -#define ACP_SCRATCH_REG_2 0x0010008 -#define ACP_SCRATCH_REG_3 0x001000C -#define ACP_SCRATCH_REG_4 0x0010010 -#define ACP_SCRATCH_REG_5 0x0010014 -#define ACP_SCRATCH_REG_6 0x0010018 -#define ACP_SCRATCH_REG_7 0x001001C -#define ACP_SCRATCH_REG_8 0x0010020 -#define ACP_SCRATCH_REG_9 0x0010024 -#define ACP_SCRATCH_REG_10 0x0010028 -#define ACP_SCRATCH_REG_11 0x001002C -#define ACP_SCRATCH_REG_12 0x0010030 -#define ACP_SCRATCH_REG_13 0x0010034 -#define ACP_SCRATCH_REG_14 0x0010038 -#define ACP_SCRATCH_REG_15 0x001003C -#define ACP_SCRATCH_REG_16 0x0010040 -#define ACP_SCRATCH_REG_17 0x0010044 -#define ACP_SCRATCH_REG_18 0x0010048 -#define ACP_SCRATCH_REG_19 0x001004C -#define ACP_SCRATCH_REG_20 0x0010050 -#define ACP_SCRATCH_REG_21 0x0010054 -#define ACP_SCRATCH_REG_22 0x0010058 -#define ACP_SCRATCH_REG_23 0x001005C -#define ACP_SCRATCH_REG_24 0x0010060 -#define ACP_SCRATCH_REG_25 0x0010064 -#define ACP_SCRATCH_REG_26 0x0010068 -#define ACP_SCRATCH_REG_27 0x001006C -#define ACP_SCRATCH_REG_28 0x0010070 -#define ACP_SCRATCH_REG_29 0x0010074 -#define ACP_SCRATCH_REG_30 0x0010078 -#define ACP_SCRATCH_REG_31 0x001007C -#define ACP_SCRATCH_REG_32 0x0010080 -#define ACP_SCRATCH_REG_33 0x0010084 -#define ACP_SCRATCH_REG_34 0x0010088 -#define ACP_SCRATCH_REG_35 0x001008C -#define ACP_SCRATCH_REG_36 0x0010090 -#define ACP_SCRATCH_REG_37 0x0010094 -#define ACP_SCRATCH_REG_38 0x0010098 -#define ACP_SCRATCH_REG_39 0x001009C -#define ACP_SCRATCH_REG_40 0x00100A0 -#define ACP_SCRATCH_REG_41 0x00100A4 -#define ACP_SCRATCH_REG_42 0x00100A8 -#define ACP_SCRATCH_REG_43 0x00100AC -#define ACP_SCRATCH_REG_44 0x00100B0 -#define ACP_SCRATCH_REG_45 0x00100B4 -#define ACP_SCRATCH_REG_46 0x00100B8 -#define ACP_SCRATCH_REG_47 0x00100BC -#define ACP_SCRATCH_REG_48 0x00100C0 -#define ACP_SCRATCH_REG_49 0x00100C4 -#define ACP_SCRATCH_REG_50 0x00100C8 -#define ACP_SCRATCH_REG_51 0x00100CC -#define ACP_SCRATCH_REG_52 0x00100D0 -#define ACP_SCRATCH_REG_53 0x00100D4 -#define ACP_SCRATCH_REG_54 0x00100D8 -#define ACP_SCRATCH_REG_55 0x00100DC -#define ACP_SCRATCH_REG_56 0x00100E0 -#define ACP_SCRATCH_REG_57 0x00100E4 -#define ACP_SCRATCH_REG_58 0x00100E8 -#define ACP_SCRATCH_REG_59 0x00100EC -#define ACP_SCRATCH_REG_60 0x00100F0 -#define ACP_SCRATCH_REG_61 0x00100F4 -#define ACP_SCRATCH_REG_62 0x00100F8 -#define ACP_SCRATCH_REG_63 0x00100FC -#define ACP_SCRATCH_REG_64 0x0010100 -#define ACP_SCRATCH_REG_65 0x0010104 -#define ACP_SCRATCH_REG_66 0x0010108 -#define ACP_SCRATCH_REG_67 0x001010C -#define ACP_SCRATCH_REG_68 0x0010110 -#define ACP_SCRATCH_REG_69 0x0010114 -#define ACP_SCRATCH_REG_70 0x0010118 -#define ACP_SCRATCH_REG_71 0x001011C -#define ACP_SCRATCH_REG_72 0x0010120 -#define ACP_SCRATCH_REG_73 0x0010124 -#define ACP_SCRATCH_REG_74 0x0010128 -#define ACP_SCRATCH_REG_75 0x001012C -#define ACP_SCRATCH_REG_76 0x0010130 -#define ACP_SCRATCH_REG_77 0x0010134 -#define ACP_SCRATCH_REG_78 0x0010138 -#define ACP_SCRATCH_REG_79 0x001013C -#define ACP_SCRATCH_REG_80 0x0010140 -#define ACP_SCRATCH_REG_81 0x0010144 -#define ACP_SCRATCH_REG_82 0x0010148 -#define ACP_SCRATCH_REG_83 0x001014C -#define ACP_SCRATCH_REG_84 0x0010150 -#define ACP_SCRATCH_REG_85 0x0010154 -#define ACP_SCRATCH_REG_86 0x0010158 -#define ACP_SCRATCH_REG_87 0x001015C -#define ACP_SCRATCH_REG_88 0x0010160 -#define ACP_SCRATCH_REG_89 0x0010164 -#define ACP_SCRATCH_REG_90 0x0010168 -#define ACP_SCRATCH_REG_91 0x001016C -#define ACP_SCRATCH_REG_92 0x0010170 -#define ACP_SCRATCH_REG_93 0x0010174 -#define ACP_SCRATCH_REG_94 0x0010178 -#define ACP_SCRATCH_REG_95 0x001017C -#define ACP_SCRATCH_REG_96 0x0010180 -#define ACP_SCRATCH_REG_97 0x0010184 -#define ACP_SCRATCH_REG_98 0x0010188 -#define ACP_SCRATCH_REG_99 0x001018C -#define ACP_SCRATCH_REG_100 0x0010190 -#define ACP_SCRATCH_REG_101 0x0010194 -#define ACP_SCRATCH_REG_102 0x0010198 -#define ACP_SCRATCH_REG_103 0x001019C -#define ACP_SCRATCH_REG_104 0x00101A0 -#define ACP_SCRATCH_REG_105 0x00101A4 -#define ACP_SCRATCH_REG_106 0x00101A8 -#define ACP_SCRATCH_REG_107 0x00101AC -#define ACP_SCRATCH_REG_108 0x00101B0 -#define ACP_SCRATCH_REG_109 0x00101B4 -#define ACP_SCRATCH_REG_110 0x00101B8 -#define ACP_SCRATCH_REG_111 0x00101BC -#define ACP_SCRATCH_REG_112 0x00101C0 -#define ACP_SCRATCH_REG_113 0x00101C4 -#define ACP_SCRATCH_REG_114 0x00101C8 -#define ACP_SCRATCH_REG_115 0x00101CC -#define ACP_SCRATCH_REG_116 0x00101D0 -#define ACP_SCRATCH_REG_117 0x00101D4 -#define ACP_SCRATCH_REG_118 0x00101D8 -#define ACP_SCRATCH_REG_119 0x00101DC -#define ACP_SCRATCH_REG_120 0x00101E0 -#define ACP_SCRATCH_REG_121 0x00101E4 -#define ACP_SCRATCH_REG_122 0x00101E8 -#define ACP_SCRATCH_REG_123 0x00101EC -#define ACP_SCRATCH_REG_124 0x00101F0 -#define ACP_SCRATCH_REG_125 0x00101F4 -#define ACP_SCRATCH_REG_126 0x00101F8 -#define ACP_SCRATCH_REG_127 0x00101FC -#define ACP_SCRATCH_REG_128 0x0010200 +#define ACP_SCRATCH_REG_0 0x0010000 + #endif -- 2.34.1

2 1

[PATCH -next] ASoC: codecs: fix platform_no_drv_owner.cocci warning
by Yang Li 03 Feb '23

03 Feb '23

./sound/soc/codecs/aw88395/aw88395.c:572:3-8: No need to set .owner here. The core will do it. Reported-by: Abaci Robot <abaci(a)linux.alibaba.com> Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=3935 Signed-off-by: Yang Li <yang.lee(a)linux.alibaba.com> --- sound/soc/codecs/aw88395/aw88395.c | 1 - 1 file changed, 1 deletion(-) diff --git a/sound/soc/codecs/aw88395/aw88395.c b/sound/soc/codecs/aw88395/aw88395.c index bce403744c1a..16ca7ac5ad28 100644 --- a/sound/soc/codecs/aw88395/aw88395.c +++ b/sound/soc/codecs/aw88395/aw88395.c @@ -569,7 +569,6 @@ MODULE_DEVICE_TABLE(i2c, aw88395_i2c_id); static struct i2c_driver aw88395_i2c_driver = { .driver = { .name = AW88395_I2C_NAME, - .owner = THIS_MODULE, }, .probe_new = aw88395_i2c_probe, .id_table = aw88395_i2c_id, -- 2.20.1.7.g153144c

2 1

[PATCH 0/2] ASoC: (SOF) topology: Regression fixes for next
by Peter Ujfalusi 03 Feb '23

03 Feb '23

Hi, Today I came across two regressions in next with SOF: The topology would not load with a failure of creating playback DAI the first patch is fixing this which was caused by a missing 'else' in the patch After fixing the topology loading, the module unloading caused kernel panic. The second patch is correcting that which is I likely caused by copy-paste to set wrong unload callback for the graph element. With these patches applied SOF is working on next and modules can be unloaded Regards, Peter --- Peter Ujfalusi (2): ASoC: SOF: topology: Add missed "else" in sof_connect_dai_widget ASoC: topology: Set correct unload callback for graph type sound/soc/soc-topology.c | 2 +- sound/soc/sof/topology.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) -- 2.39.1

4 5

[PATCH] ASoC: SOF: fix intel-soundwire link failure
by Arnd Bergmann 03 Feb '23

03 Feb '23

From: Arnd Bergmann <arnd(a)arndb.de> My randconfig build setup ran into a rare build failure with CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE_LINK_BASELINE=y CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE=m CONFIG_SOUNDWIRE=y CONFIG_SOUNDWIRE_INTEL=m CONFIG_SND_SOC_SOF_HDA=y CONFIG_SND_SOC_SOF_INTEL_TGL=y x86_64-linux-ld: sound/soc/sof/intel/hda.o: in function `hda_init_caps': hda.c:(.text+0x691): undefined reference to `sdw_intel_cnl_hw_ops' x86_64-linux-ld: hda.c:(.text+0x6f2): undefined reference to `sdw_intel_probe' x86_64-linux-ld: sound/soc/sof/intel/hda.o: in function `hda_sdw_startup': hda.c:(.text+0x1c40): undefined reference to `sdw_intel_startup' x86_64-linux-ld: sound/soc/sof/intel/hda.o: in function `hda_sdw_process_wakeen': hda.c:(.text+0x1cb6): undefined reference to `sdw_intel_process_wakeen_event' x86_64-linux-ld: sound/soc/sof/intel/hda.o: in function `hda_dsp_interrupt_thread': hda.c:(.text+0x1d67): undefined reference to `sdw_intel_thread' x86_64-linux-ld: sound/soc/sof/intel/hda.o: in function `hda_dsp_remove': hda.c:(.text+0x2655): undefined reference to `sdw_intel_exit' My best understanding is that the definition of SND_SOC_SOF_INTEL_SOUNDWIRE_LINK_BASELINE was intended to avoid this problem, but got it wrong for the SND_SOC_SOF_INTEL_SOUNDWIRE=m case, where the 'select' is meant to set SOUNDWIRE_INTEL to the value of SND_SOC_SOF_INTEL_SOUNDWIRE_LINK_BASELINE rather than the intersection of SND_SOC_SOF_INTEL_SOUNDWIRE_LINK_BASELINE and SND_SOC_SOF_INTEL_SOUNDWIRE. Change the condition to check for SND_SOC_SOF_INTEL_SOUNDWIRE to be a boolean rather than a tristate expression in order to propagate this as intended. Signed-off-by: Arnd Bergmann <arnd(a)arndb.de> --- I could not figure out if this is a recent regression or if the problem has existed for a long time and is just really hard to trigger. I first saw it on linux-next-20230201. --- sound/soc/sof/intel/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/sof/intel/Kconfig b/sound/soc/sof/intel/Kconfig index 36a0e2bf30ff..715ba8a7f2f8 100644 --- a/sound/soc/sof/intel/Kconfig +++ b/sound/soc/sof/intel/Kconfig @@ -322,8 +322,8 @@ config SND_SOC_SOF_HDA_PROBES config SND_SOC_SOF_INTEL_SOUNDWIRE_LINK_BASELINE tristate - select SOUNDWIRE_INTEL if SND_SOC_SOF_INTEL_SOUNDWIRE - select SND_INTEL_SOUNDWIRE_ACPI if SND_SOC_SOF_INTEL_SOUNDWIRE + select SOUNDWIRE_INTEL if SND_SOC_SOF_INTEL_SOUNDWIRE != n + select SND_INTEL_SOUNDWIRE_ACPI if SND_SOC_SOF_INTEL_SOUNDWIRE != n config SND_SOC_SOF_INTEL_SOUNDWIRE tristate "SOF support for SoundWire" -- 2.39.0

3 2

[PATCH] tree-wide: trivial: s/ a SPI/ an SPI/
by Tudor Ambarus 03 Feb '23

03 Feb '23

The deciding factor for when a/an should be used is the sound that begins the word which follows these indefinite articles, rather than the letter which does. Use "an SPI" (SPI begins with the consonant letter S, but the S is pronounced with its letter name, "es."). Used sed to do the replacement: find . -type f -exec sed -i "s/ a SPI/ an SPI/g" {} \; Signed-off-by: Tudor Ambarus <tudor.ambarus(a)linaro.org> --- Generated on top of v6.2-rc6. .../bindings/display/himax,hx8357d.txt | 2 +- .../bindings/display/ilitek,ili9225.txt | 2 +- .../bindings/display/multi-inno,mi0283qt.txt | 2 +- .../bindings/display/panel/lg,lg4573.yaml | 2 +- .../display/panel/samsung,lms397kf04.yaml | 2 +- .../devicetree/bindings/display/repaper.txt | 2 +- .../bindings/display/sitronix,st7586.txt | 2 +- .../bindings/iio/accel/adi,adis16240.yaml | 2 +- .../bindings/iio/accel/adi,adxl313.yaml | 2 +- .../bindings/iio/accel/adi,adxl345.yaml | 2 +- .../devicetree/bindings/iio/accel/lis302.txt | 2 +- .../bindings/iio/accel/nxp,fxls8962af.yaml | 2 +- .../bindings/iio/adc/microchip,mcp3201.yaml | 2 +- .../bindings/input/touchscreen/ads7846.txt | 2 +- .../devicetree/bindings/leds/leds-lp8860.txt | 2 +- .../bindings/media/renesas,drif.yaml | 2 +- .../memory-controllers/renesas,rpc-if.yaml | 2 +- .../devicetree/bindings/mfd/atmel-flexcom.txt | 2 +- .../bindings/misc/olpc,xo1.75-ec.yaml | 2 +- .../devicetree/bindings/mmc/mmc-spi-slot.yaml | 2 +- .../bindings/net/dsa/vitesse,vsc73xx.txt | 2 +- .../bindings/net/microchip,enc28j60.txt | 2 +- .../devicetree/bindings/net/wiznet,w5x00.txt | 2 +- .../bindings/spi/brcm,spi-bcm-qspi.yaml | 4 ++-- .../bindings/spi/marvell,mmp2-ssp.yaml | 2 +- .../bindings/spi/mxicy,mx25f0a-spi.yaml | 2 +- .../bindings/spi/snps,dw-apb-ssi.yaml | 2 +- .../devicetree/bindings/spi/spi-mux.yaml | 2 +- .../bindings/spi/spi-peripheral-props.yaml | 2 +- Documentation/driver-api/mtd/spi-nor.rst | 4 ++-- .../firmware-guide/acpi/enumeration.rst | 2 +- .../firmware-guide/acpi/gpio-properties.rst | 2 +- .../sound/designs/compress-offload.rst | 2 +- Documentation/spi/spi-lm70llp.rst | 4 ++-- Documentation/spi/spidev.rst | 4 ++-- arch/arm/boot/dts/imx7d-flex-concentrator.dts | 2 +- .../cavium-octeon/executive/cvmx-helper-spi.c | 6 +++--- arch/mips/cavium-octeon/executive/cvmx-spi.c | 16 ++++++++-------- arch/mips/include/asm/octeon/cvmx-helper-spi.h | 4 ++-- arch/mips/include/asm/octeon/cvmx-spi.h | 18 +++++++++--------- arch/mips/include/asm/octeon/cvmx-wqe.h | 2 +- drivers/auxdisplay/lcd2s.c | 2 +- drivers/gpu/drm/solomon/ssd130x-spi.c | 2 +- drivers/gpu/drm/tiny/ili9486.c | 2 +- drivers/input/misc/Kconfig | 4 ++-- drivers/input/rmi4/Kconfig | 2 +- drivers/input/touchscreen/Kconfig | 2 +- drivers/mfd/Kconfig | 2 +- drivers/mfd/ocelot.h | 2 +- drivers/mmc/host/Kconfig | 2 +- drivers/mtd/spi-nor/controllers/Kconfig | 2 +- drivers/mtd/spi-nor/core.c | 14 +++++++------- drivers/mtd/spi-nor/core.h | 4 ++-- drivers/mtd/spi-nor/sfdp.c | 6 +++--- .../net/dsa/sja1105/sja1105_dynamic_config.c | 4 ++-- drivers/net/ethernet/microchip/enc28j60.c | 2 +- .../net/wireless/microchip/wilc1000/Kconfig | 2 +- drivers/net/wireless/st/cw1200/Kconfig | 2 +- drivers/platform/chrome/Kconfig | 2 +- drivers/platform/chrome/cros_ec_spi.c | 2 +- drivers/rtc/rtc-ds1305.c | 2 +- drivers/spi/Kconfig | 8 ++++---- drivers/spi/spi-mem.c | 10 +++++----- drivers/spi/spi-mpc52xx-psc.c | 2 +- drivers/spi/spi.c | 4 ++-- drivers/staging/fbtft/fbtft.h | 2 +- drivers/staging/iio/meter/Kconfig | 2 +- drivers/staging/octeon/ethernet-spi.c | 2 +- drivers/usb/host/max3421-hcd.c | 2 +- include/linux/mtd/spinand.h | 14 +++++++------- include/linux/rmi.h | 2 +- include/linux/spi/spi-mem.h | 18 +++++++++--------- include/linux/spi/spi.h | 8 ++++---- 73 files changed, 131 insertions(+), 131 deletions(-) diff --git a/Documentation/devicetree/bindings/display/himax,hx8357d.txt b/Documentation/devicetree/bindings/display/himax,hx8357d.txt index e641f664763d..ed7aebbd3c69 100644 --- a/Documentation/devicetree/bindings/display/himax,hx8357d.txt +++ b/Documentation/devicetree/bindings/display/himax,hx8357d.txt @@ -8,7 +8,7 @@ Required properties: - dc-gpios: D/C pin - reg: address of the panel on the SPI bus -The node for this driver must be a child node of a SPI controller, hence +The node for this driver must be a child node of an SPI controller, hence all mandatory properties described in ../spi/spi-bus.txt must be specified. Optional properties: diff --git a/Documentation/devicetree/bindings/display/ilitek,ili9225.txt b/Documentation/devicetree/bindings/display/ilitek,ili9225.txt index a59feb52015b..a62c896926d3 100644 --- a/Documentation/devicetree/bindings/display/ilitek,ili9225.txt +++ b/Documentation/devicetree/bindings/display/ilitek,ili9225.txt @@ -8,7 +8,7 @@ Required properties: - rs-gpios: Register select signal - reset-gpios: Reset pin -The node for this driver must be a child node of a SPI controller, hence +The node for this driver must be a child node of an SPI controller, hence all mandatory properties described in ../spi/spi-bus.txt must be specified. Optional properties: diff --git a/Documentation/devicetree/bindings/display/multi-inno,mi0283qt.txt b/Documentation/devicetree/bindings/display/multi-inno,mi0283qt.txt index eed48c3d4875..3b9b3053a438 100644 --- a/Documentation/devicetree/bindings/display/multi-inno,mi0283qt.txt +++ b/Documentation/devicetree/bindings/display/multi-inno,mi0283qt.txt @@ -3,7 +3,7 @@ Multi-Inno MI0283QT display panel Required properties: - compatible: "multi-inno,mi0283qt". -The node for this driver must be a child node of a SPI controller, hence +The node for this driver must be a child node of an SPI controller, hence all mandatory properties described in ../spi/spi-bus.txt must be specified. Optional properties: diff --git a/Documentation/devicetree/bindings/display/panel/lg,lg4573.yaml b/Documentation/devicetree/bindings/display/panel/lg,lg4573.yaml index ee357e139ac0..39cae0e07741 100644 --- a/Documentation/devicetree/bindings/display/panel/lg,lg4573.yaml +++ b/Documentation/devicetree/bindings/display/panel/lg,lg4573.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: LG LG4573 TFT Liquid Crystal Display with SPI control bus description: | - The panel must obey the rules for a SPI slave device as specified in + The panel must obey the rules for an SPI slave device as specified in spi/spi-controller.yaml maintainers: diff --git a/Documentation/devicetree/bindings/display/panel/samsung,lms397kf04.yaml b/Documentation/devicetree/bindings/display/panel/samsung,lms397kf04.yaml index 5e77cee93f83..dfaf1c63f0a7 100644 --- a/Documentation/devicetree/bindings/display/panel/samsung,lms397kf04.yaml +++ b/Documentation/devicetree/bindings/display/panel/samsung,lms397kf04.yaml @@ -39,7 +39,7 @@ properties: spi-cpol: true spi-max-frequency: - description: inherited as a SPI client node, the datasheet specifies + description: inherited as an SPI client node, the datasheet specifies maximum 300 ns minimum cycle which gives around 3 MHz max frequency maximum: 3000000 diff --git a/Documentation/devicetree/bindings/display/repaper.txt b/Documentation/devicetree/bindings/display/repaper.txt index f5f9f9cf6a25..707cb50d7fc1 100644 --- a/Documentation/devicetree/bindings/display/repaper.txt +++ b/Documentation/devicetree/bindings/display/repaper.txt @@ -14,7 +14,7 @@ Required properties: Required property for e2271cs021: - border-gpios: Border control -The node for this driver must be a child node of a SPI controller, hence +The node for this driver must be a child node of an SPI controller, hence all mandatory properties described in ../spi/spi-bus.txt must be specified. Optional property: diff --git a/Documentation/devicetree/bindings/display/sitronix,st7586.txt b/Documentation/devicetree/bindings/display/sitronix,st7586.txt index 1d0dad1210d3..b2f287d64a37 100644 --- a/Documentation/devicetree/bindings/display/sitronix,st7586.txt +++ b/Documentation/devicetree/bindings/display/sitronix,st7586.txt @@ -6,7 +6,7 @@ Required properties: the pin labeled D1 on the controller, not the pin labeled A0) - reset-gpios: Reset pin -The node for this driver must be a child node of a SPI controller, hence +The node for this driver must be a child node of an SPI controller, hence all mandatory properties described in ../spi/spi-bus.txt must be specified. Optional properties: diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml b/Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml index f6f97164c2ca..e60f3c3f1b27 100644 --- a/Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml +++ b/Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml @@ -43,7 +43,7 @@ examples: #address-cells = <1>; #size-cells = <0>; - /* Example for a SPI device node */ + /* Example for an SPI device node */ accelerometer@0 { compatible = "adi,adis16240"; reg = <0>; diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adxl313.yaml b/Documentation/devicetree/bindings/iio/accel/adi,adxl313.yaml index 185b68ffb536..dc70d5b8964b 100644 --- a/Documentation/devicetree/bindings/iio/accel/adi,adxl313.yaml +++ b/Documentation/devicetree/bindings/iio/accel/adi,adxl313.yaml @@ -79,7 +79,7 @@ examples: #address-cells = <1>; #size-cells = <0>; - /* Example for a SPI device node */ + /* Example for an SPI device node */ accelerometer@0 { compatible = "adi,adxl313"; reg = <0>; diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml b/Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml index 346abfb13a3a..d2214170f5ae 100644 --- a/Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml +++ b/Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml @@ -68,7 +68,7 @@ examples: #address-cells = <1>; #size-cells = <0>; - /* Example for a SPI device node */ + /* Example for an SPI device node */ accelerometer@0 { compatible = "adi,adxl345"; reg = <0>; diff --git a/Documentation/devicetree/bindings/iio/accel/lis302.txt b/Documentation/devicetree/bindings/iio/accel/lis302.txt index 764e28ec1a0a..03d8a5c6c9aa 100644 --- a/Documentation/devicetree/bindings/iio/accel/lis302.txt +++ b/Documentation/devicetree/bindings/iio/accel/lis302.txt @@ -62,7 +62,7 @@ Optional properties for all bus drivers: (used by self-test) -Example for a SPI device node: +Example for an SPI device node: accelerometer@0 { compatible = "st,lis302dl-spi"; diff --git a/Documentation/devicetree/bindings/iio/accel/nxp,fxls8962af.yaml b/Documentation/devicetree/bindings/iio/accel/nxp,fxls8962af.yaml index 65ce8ea14b52..9a8ecdc5a056 100644 --- a/Documentation/devicetree/bindings/iio/accel/nxp,fxls8962af.yaml +++ b/Documentation/devicetree/bindings/iio/accel/nxp,fxls8962af.yaml @@ -69,7 +69,7 @@ examples: #address-cells = <1>; #size-cells = <0>; - /* Example for a SPI device node */ + /* Example for an SPI device node */ accelerometer@0 { compatible = "nxp,fxls8962af"; reg = <0>; diff --git a/Documentation/devicetree/bindings/iio/adc/microchip,mcp3201.yaml b/Documentation/devicetree/bindings/iio/adc/microchip,mcp3201.yaml index 18108f0f3731..5bc50d350783 100644 --- a/Documentation/devicetree/bindings/iio/adc/microchip,mcp3201.yaml +++ b/Documentation/devicetree/bindings/iio/adc/microchip,mcp3201.yaml @@ -10,7 +10,7 @@ maintainers: - Oskar Andero <oskar.andero(a)gmail.com> description: | - Family of simple ADCs with a SPI interface. + Family of simple ADCs with an SPI interface. properties: compatible: diff --git a/Documentation/devicetree/bindings/input/touchscreen/ads7846.txt b/Documentation/devicetree/bindings/input/touchscreen/ads7846.txt index 81f6bda97d3c..3c3fd7326bdd 100644 --- a/Documentation/devicetree/bindings/input/touchscreen/ads7846.txt +++ b/Documentation/devicetree/bindings/input/touchscreen/ads7846.txt @@ -1,7 +1,7 @@ Device tree bindings for TI's ADS7843, ADS7845, ADS7846, ADS7873, TSC2046 SPI driven touch screen controllers. -The node for this driver must be a child node of a SPI controller, hence +The node for this driver must be a child node of an SPI controller, hence all mandatory properties described in Documentation/devicetree/bindings/spi/spi-bus.txt diff --git a/Documentation/devicetree/bindings/leds/leds-lp8860.txt b/Documentation/devicetree/bindings/leds/leds-lp8860.txt index 8bb25749a3da..ea9d8bcc7f06 100644 --- a/Documentation/devicetree/bindings/leds/leds-lp8860.txt +++ b/Documentation/devicetree/bindings/leds/leds-lp8860.txt @@ -3,7 +3,7 @@ The LP8860-Q1 is an high-efficiency LED driver with boost controller. It has 4 high-precision current sinks that can be controlled by a PWM input -signal, a SPI/I2C master, or both. +signal, an SPI/I2C master, or both. Required properties: - compatible : diff --git a/Documentation/devicetree/bindings/media/renesas,drif.yaml b/Documentation/devicetree/bindings/media/renesas,drif.yaml index 9403b235e976..aa30115469f3 100644 --- a/Documentation/devicetree/bindings/media/renesas,drif.yaml +++ b/Documentation/devicetree/bindings/media/renesas,drif.yaml @@ -11,7 +11,7 @@ maintainers: - Fabrizio Castro <fabrizio.castro.jz(a)renesas.com> description: | - R-Car Gen3 DRIF is a SPI like receive only slave device. A general + R-Car Gen3 DRIF is an SPI like receive only slave device. A general representation of DRIF interfacing with a master device is shown below. +---------------------+ +---------------------+ diff --git a/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml b/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml index 30a403b1b79a..3b5c56ca2daa 100644 --- a/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml @@ -10,7 +10,7 @@ maintainers: - Sergei Shtylyov <sergei.shtylyov(a)gmail.com> description: | - Renesas RPC-IF allows a SPI flash or HyperFlash connected to the SoC to + Renesas RPC-IF allows an SPI flash or HyperFlash connected to the SoC to be accessed via the external address space read mode or the manual mode. The flash chip itself should be represented by a subnode of the RPC-IF node. diff --git a/Documentation/devicetree/bindings/mfd/atmel-flexcom.txt b/Documentation/devicetree/bindings/mfd/atmel-flexcom.txt index 9d837535637b..076aa61a01ab 100644 --- a/Documentation/devicetree/bindings/mfd/atmel-flexcom.txt +++ b/Documentation/devicetree/bindings/mfd/atmel-flexcom.txt @@ -1,6 +1,6 @@ * Device tree bindings for Atmel Flexcom (Flexible Serial Communication Unit) -The Atmel Flexcom is just a wrapper which embeds a SPI controller, an I2C +The Atmel Flexcom is just a wrapper which embeds an SPI controller, an I2C controller and an USART. Only one function can be used at a time and is chosen at boot time according to the device tree. diff --git a/Documentation/devicetree/bindings/misc/olpc,xo1.75-ec.yaml b/Documentation/devicetree/bindings/misc/olpc,xo1.75-ec.yaml index e99342f268a6..a53087ff80d9 100644 --- a/Documentation/devicetree/bindings/misc/olpc,xo1.75-ec.yaml +++ b/Documentation/devicetree/bindings/misc/olpc,xo1.75-ec.yaml @@ -8,7 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: OLPC XO-1.75 Embedded Controller description: | - This binding describes the Embedded Controller acting as a SPI bus master + This binding describes the Embedded Controller acting as an SPI bus master on a OLPC XO-1.75 laptop computer. The embedded controller requires the SPI controller driver to signal diff --git a/Documentation/devicetree/bindings/mmc/mmc-spi-slot.yaml b/Documentation/devicetree/bindings/mmc/mmc-spi-slot.yaml index c0662ce9946d..897709a51208 100644 --- a/Documentation/devicetree/bindings/mmc/mmc-spi-slot.yaml +++ b/Documentation/devicetree/bindings/mmc/mmc-spi-slot.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/mmc/mmc-spi-slot.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: MMC/SD/SDIO slot directly connected to a SPI bus +title: MMC/SD/SDIO slot directly connected to an SPI bus maintainers: - Ulf Hansson <ulf.hansson(a)linaro.org> diff --git a/Documentation/devicetree/bindings/net/dsa/vitesse,vsc73xx.txt b/Documentation/devicetree/bindings/net/dsa/vitesse,vsc73xx.txt index 258bef483673..6a6f4a813620 100644 --- a/Documentation/devicetree/bindings/net/dsa/vitesse,vsc73xx.txt +++ b/Documentation/devicetree/bindings/net/dsa/vitesse,vsc73xx.txt @@ -14,7 +14,7 @@ Vitesse VSC7398 SparX-G8e 8-port Integrated Gigabit Ethernet Switch This switch could have two different management interface. If SPI interface is used, the device tree node is an SPI device so it must -reside inside a SPI bus device tree node, see spi/spi-bus.txt +reside inside an SPI bus device tree node, see spi/spi-bus.txt When the chip is connected to a parallel memory bus and work in memory-mapped I/O mode, a platform device is used to represent the vsc73xx. In this case it diff --git a/Documentation/devicetree/bindings/net/microchip,enc28j60.txt b/Documentation/devicetree/bindings/net/microchip,enc28j60.txt index a8275921a896..3cd4774f7de2 100644 --- a/Documentation/devicetree/bindings/net/microchip,enc28j60.txt +++ b/Documentation/devicetree/bindings/net/microchip,enc28j60.txt @@ -2,7 +2,7 @@ This is a standalone 10 MBit ethernet controller with SPI interface. -For each device connected to a SPI bus, define a child node within +For each device connected to an SPI bus, define a child node within the SPI master node. Required properties: diff --git a/Documentation/devicetree/bindings/net/wiznet,w5x00.txt b/Documentation/devicetree/bindings/net/wiznet,w5x00.txt index e9665798c4be..a9f979e2e897 100644 --- a/Documentation/devicetree/bindings/net/wiznet,w5x00.txt +++ b/Documentation/devicetree/bindings/net/wiznet,w5x00.txt @@ -2,7 +2,7 @@ This is a standalone 10/100 MBit Ethernet controller with SPI interface. -For each device connected to a SPI bus, define a child node within +For each device connected to an SPI bus, define a child node within the SPI master node. Required properties: diff --git a/Documentation/devicetree/bindings/spi/brcm,spi-bcm-qspi.yaml b/Documentation/devicetree/bindings/spi/brcm,spi-bcm-qspi.yaml index ec5873919170..6202aa959a17 100644 --- a/Documentation/devicetree/bindings/spi/brcm,spi-bcm-qspi.yaml +++ b/Documentation/devicetree/bindings/spi/brcm,spi-bcm-qspi.yaml @@ -11,10 +11,10 @@ maintainers: - Rafał Miłecki <rafal(a)milecki.pl> description: | - The Broadcom SPI controller is a SPI master found on various SOCs, including + The Broadcom SPI controller is an SPI master found on various SOCs, including BRCMSTB (BCM7XXX), Cygnus, NSP and NS2. The Broadcom Master SPI hw IP consits of: - MSPI : SPI master controller can read and write to a SPI slave device + MSPI : SPI master controller can read and write to an SPI slave device BSPI : Broadcom SPI in combination with the MSPI hw IP provides acceleration for flash reads and be configured to do single, double, quad lane io with 3-byte and 4-byte addressing support. diff --git a/Documentation/devicetree/bindings/spi/marvell,mmp2-ssp.yaml b/Documentation/devicetree/bindings/spi/marvell,mmp2-ssp.yaml index 5f4f6b5615d0..c13c4c8a4e08 100644 --- a/Documentation/devicetree/bindings/spi/marvell,mmp2-ssp.yaml +++ b/Documentation/devicetree/bindings/spi/marvell,mmp2-ssp.yaml @@ -28,7 +28,7 @@ properties: ready-gpios: description: | - GPIO used to signal a SPI master that the FIFO is filled and we're + GPIO used to signal an SPI master that the FIFO is filled and we're ready to service a transfer. Only useful in slave mode. maxItems: 1 diff --git a/Documentation/devicetree/bindings/spi/mxicy,mx25f0a-spi.yaml b/Documentation/devicetree/bindings/spi/mxicy,mx25f0a-spi.yaml index a3aa5e07c0e4..875f609d09be 100644 --- a/Documentation/devicetree/bindings/spi/mxicy,mx25f0a-spi.yaml +++ b/Documentation/devicetree/bindings/spi/mxicy,mx25f0a-spi.yaml @@ -40,7 +40,7 @@ properties: nand-ecc-engine: description: NAND ECC engine used by the SPI controller in order to perform - on-the-fly correction when using a SPI-NAND memory. + on-the-fly correction when using an SPI-NAND memory. $ref: /schemas/types.yaml#/definitions/phandle required: diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml index d33b72fabc5d..b9f976d1b5bf 100644 --- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml +++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml @@ -128,7 +128,7 @@ properties: description: | Default value of the rx-sample-delay-ns property. This value will be used if the property is not explicitly defined - for a SPI slave device. + for an SPI slave device. SPI Rx sample delay offset, unit is nanoseconds. The delay from the default sample time before the actual sample of the diff --git a/Documentation/devicetree/bindings/spi/spi-mux.yaml b/Documentation/devicetree/bindings/spi/spi-mux.yaml index 7ea79f6d33f3..cc65f7d5e1ed 100644 --- a/Documentation/devicetree/bindings/spi/spi-mux.yaml +++ b/Documentation/devicetree/bindings/spi/spi-mux.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Generic SPI Multiplexer description: | - This binding describes a SPI bus multiplexer to route the SPI chip select + This binding describes an SPI bus multiplexer to route the SPI chip select signals. This can be used when you need more devices than the SPI controller has chip selects available. An example setup is shown in ASCII art; the actual setting of the multiplexer to a channel needs to be done by a specific SPI mux diff --git a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml index 9a60c0664bbe..62959906aac3 100644 --- a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml +++ b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/spi/spi-peripheral-props.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Peripheral-specific properties for a SPI bus. +title: Peripheral-specific properties for an SPI bus. description: Many SPI controllers need to add properties to peripheral devices. They could diff --git a/Documentation/driver-api/mtd/spi-nor.rst b/Documentation/driver-api/mtd/spi-nor.rst index 4a3adca417fd..bd091612dc16 100644 --- a/Documentation/driver-api/mtd/spi-nor.rst +++ b/Documentation/driver-api/mtd/spi-nor.rst @@ -12,7 +12,7 @@ arbitrary streams of bytes, but rather are designed specifically for SPI NOR. In particular, Freescale's QuadSPI controller must know the NOR commands to find the right LUT sequence. Unfortunately, the SPI subsystem has no notion of -opcodes, addresses, or data payloads; a SPI controller simply knows to send or +opcodes, addresses, or data payloads; an SPI controller simply knows to send or receive bytes (Tx and Rx). Therefore, we must define a new layering scheme under which the controller driver is aware of the opcodes, addressing, and other details of the SPI NOR protocol. @@ -62,7 +62,7 @@ Part III - How can drivers use the framework? The main API is spi_nor_scan(). Before you call the hook, a driver should initialize the necessary fields for spi_nor{}. Please see drivers/mtd/spi-nor/spi-nor.c for detail. Please also refer to spi-fsl-qspi.c -when you want to write a new driver for a SPI NOR controller. +when you want to write a new driver for an SPI NOR controller. Another API is spi_nor_restore(), this is used to restore the status of SPI flash chip such as addressing mode. Call it whenever detach the driver from device or reboot the system. diff --git a/Documentation/firmware-guide/acpi/enumeration.rst b/Documentation/firmware-guide/acpi/enumeration.rst index b9dc0c603f36..47a5868940c3 100644 --- a/Documentation/firmware-guide/acpi/enumeration.rst +++ b/Documentation/firmware-guide/acpi/enumeration.rst @@ -187,7 +187,7 @@ Slave devices behind SPI bus have SpiSerialBus resource attached to them. This is extracted automatically by the SPI core and the slave devices are enumerated once spi_register_master() is called by the bus driver. -Here is what the ACPI namespace for a SPI slave might look like:: +Here is what the ACPI namespace for an SPI slave might look like:: Device (EEP0) { diff --git a/Documentation/firmware-guide/acpi/gpio-properties.rst b/Documentation/firmware-guide/acpi/gpio-properties.rst index eaec732cc77c..a5c865c266ac 100644 --- a/Documentation/firmware-guide/acpi/gpio-properties.rst +++ b/Documentation/firmware-guide/acpi/gpio-properties.rst @@ -86,7 +86,7 @@ reprograms them differently. It is possible to leave holes in the array of GPIOs. This is useful in cases like with SPI host controllers where some chip selects may be -implemented as GPIOs and some as native signals. For example a SPI host +implemented as GPIOs and some as native signals. For example an SPI host controller can have chip selects 0 and 2 implemented as GPIOs and 1 as native:: diff --git a/Documentation/sound/designs/compress-offload.rst b/Documentation/sound/designs/compress-offload.rst index 935f325dbc77..bbd1c040f06a 100644 --- a/Documentation/sound/designs/compress-offload.rst +++ b/Documentation/sound/designs/compress-offload.rst @@ -93,7 +93,7 @@ ring buffer cannot be invalidated, except when dropping all buffers. The Compressed Data API does not make any assumptions on how the data is transmitted to the audio DSP. DMA transfers from main memory to an -embedded audio cluster or to a SPI interface for external DSPs are +embedded audio cluster or to an SPI interface for external DSPs are possible. As in the ALSA PCM case, a core set of routines is exposed; each driver implementer will have to write support for a set of mandatory routines and possibly make use of optional ones. diff --git a/Documentation/spi/spi-lm70llp.rst b/Documentation/spi/spi-lm70llp.rst index 07631aef4343..6c8413dba420 100644 --- a/Documentation/spi/spi-lm70llp.rst +++ b/Documentation/spi/spi-lm70llp.rst @@ -16,10 +16,10 @@ Description This driver provides glue code connecting a National Semiconductor LM70 LLP temperature sensor evaluation board to the kernel's SPI core subsystem. -This is a SPI master controller driver. It can be used in conjunction with +This is an SPI master controller driver. It can be used in conjunction with (layered under) the LM70 logical driver (a "SPI protocol driver"). In effect, this driver turns the parallel port interface on the eval board -into a SPI bus with a single device, which will be driven by the generic +into an SPI bus with a single device, which will be driven by the generic LM70 driver (drivers/hwmon/lm70.c). diff --git a/Documentation/spi/spidev.rst b/Documentation/spi/spidev.rst index 369c657ba435..2108cc704b26 100644 --- a/Documentation/spi/spidev.rst +++ b/Documentation/spi/spidev.rst @@ -66,12 +66,12 @@ To make the spidev driver bind to such a device, use the following: echo spidev > /sys/bus/spi/devices/spiB.C/driver_override echo spiB.C > /sys/bus/spi/drivers/spidev/bind -When the spidev driver is bound to a SPI device, the sysfs node for the +When the spidev driver is bound to an SPI device, the sysfs node for the device will include a child device node with a "dev" attribute that will be understood by udev or mdev (udev replacement from BusyBox; it's less featureful, but often enough). -For a SPI device with chipselect C on bus B, you should see: +For an SPI device with chipselect C on bus B, you should see: /dev/spidevB.C ... character special device, major number 153 with diff --git a/arch/arm/boot/dts/imx7d-flex-concentrator.dts b/arch/arm/boot/dts/imx7d-flex-concentrator.dts index bd6b5285aa8d..ac5f6faa2a3f 100644 --- a/arch/arm/boot/dts/imx7d-flex-concentrator.dts +++ b/arch/arm/boot/dts/imx7d-flex-concentrator.dts @@ -130,7 +130,7 @@ &ecspi4 { * ST chip maximum SPI clock frequency is 33 MHz. * * TCG specification - Section 6.4.1 Clocking: - * TPM shall support a SPI clock frequency range of 10-24 MHz. + * TPM shall support an SPI clock frequency range of 10-24 MHz. */ st33htph: tpm-tis@0 { compatible = "st,st33htpm-spi", "tcg,tpm_tis-spi"; diff --git a/arch/mips/cavium-octeon/executive/cvmx-helper-spi.c b/arch/mips/cavium-octeon/executive/cvmx-helper-spi.c index 525914e9b22d..3886d460cb2a 100644 --- a/arch/mips/cavium-octeon/executive/cvmx-helper-spi.c +++ b/arch/mips/cavium-octeon/executive/cvmx-helper-spi.c @@ -60,7 +60,7 @@ int __cvmx_helper_spi_enumerate(int interface) } /** - * Probe a SPI interface and determine the number of ports + * Probe an SPI interface and determine the number of ports * connected to it. The SPI interface should still be down after * this call. * @@ -93,7 +93,7 @@ int __cvmx_helper_spi_probe(int interface) } /** - * Bringup and enable a SPI interface. After this call packet I/O + * Bringup and enable an SPI interface. After this call packet I/O * should be fully functional. This is called with IPD enabled but * PKO disabled. * @@ -195,7 +195,7 @@ union cvmx_helper_link_info __cvmx_helper_spi_link_get(int ipd_port) */ int __cvmx_helper_spi_link_set(int ipd_port, union cvmx_helper_link_info link_info) { - /* Nothing to do. If we have a SPI4000 then the setup was already performed + /* Nothing to do. If we have an SPI4000 then the setup was already performed by cvmx_spi4000_check_speed(). If not then there isn't any link info */ return 0; diff --git a/arch/mips/cavium-octeon/executive/cvmx-spi.c b/arch/mips/cavium-octeon/executive/cvmx-spi.c index eb9333e84a6b..f9814a4be84f 100644 --- a/arch/mips/cavium-octeon/executive/cvmx-spi.c +++ b/arch/mips/cavium-octeon/executive/cvmx-spi.c @@ -92,7 +92,7 @@ void cvmx_spi_set_callbacks(cvmx_spi_callbacks_t *new_callbacks) * Initialize and start the SPI interface. * * @interface: The identifier of the packet interface to configure and - * use as a SPI interface. + * use as an SPI interface. * @mode: The operating mode for the SPI interface. The interface * can operate as a full duplex (both Tx and Rx data paths * active) or as a halfplex (either the Tx data path is @@ -138,7 +138,7 @@ int cvmx_spi_start_interface(int interface, cvmx_spi_mode_t mode, int timeout, * with its correspondent system. * * @interface: The identifier of the packet interface to configure and - * use as a SPI interface. + * use as an SPI interface. * @mode: The operating mode for the SPI interface. The interface * can operate as a full duplex (both Tx and Rx data paths * active) or as a halfplex (either the Tx data path is @@ -183,7 +183,7 @@ EXPORT_SYMBOL_GPL(cvmx_spi_restart_interface); * Callback to perform SPI4 reset * * @interface: The identifier of the packet interface to configure and - * use as a SPI interface. + * use as an SPI interface. * @mode: The operating mode for the SPI interface. The interface * can operate as a full duplex (both Tx and Rx data paths * active) or as a halfplex (either the Tx data path is @@ -298,7 +298,7 @@ int cvmx_spi_reset_cb(int interface, cvmx_spi_mode_t mode) * Callback to setup calendar and miscellaneous settings before clock detection * * @interface: The identifier of the packet interface to configure and - * use as a SPI interface. + * use as an SPI interface. * @mode: The operating mode for the SPI interface. The interface * can operate as a full duplex (both Tx and Rx data paths * active) or as a halfplex (either the Tx data path is @@ -417,7 +417,7 @@ int cvmx_spi_calendar_setup_cb(int interface, cvmx_spi_mode_t mode, * Callback to perform clock detection * * @interface: The identifier of the packet interface to configure and - * use as a SPI interface. + * use as an SPI interface. * @mode: The operating mode for the SPI interface. The interface * can operate as a full duplex (both Tx and Rx data paths * active) or as a halfplex (either the Tx data path is @@ -495,7 +495,7 @@ int cvmx_spi_clock_detect_cb(int interface, cvmx_spi_mode_t mode, int timeout) * Callback to perform link training * * @interface: The identifier of the packet interface to configure and - * use as a SPI interface. + * use as an SPI interface. * @mode: The operating mode for the SPI interface. The interface * can operate as a full duplex (both Tx and Rx data paths * active) or as a halfplex (either the Tx data path is @@ -564,7 +564,7 @@ int cvmx_spi_training_cb(int interface, cvmx_spi_mode_t mode, int timeout) * Callback to perform calendar data synchronization * * @interface: The identifier of the packet interface to configure and - * use as a SPI interface. + * use as an SPI interface. * @mode: The operating mode for the SPI interface. The interface * can operate as a full duplex (both Tx and Rx data paths * active) or as a halfplex (either the Tx data path is @@ -621,7 +621,7 @@ int cvmx_spi_calendar_sync_cb(int interface, cvmx_spi_mode_t mode, int timeout) * Callback to handle interface up * * @interface: The identifier of the packet interface to configure and - * use as a SPI interface. + * use as an SPI interface. * @mode: The operating mode for the SPI interface. The interface * can operate as a full duplex (both Tx and Rx data paths * active) or as a halfplex (either the Tx data path is diff --git a/arch/mips/include/asm/octeon/cvmx-helper-spi.h b/arch/mips/include/asm/octeon/cvmx-helper-spi.h index bc8cab9367b8..d2a15c3382ff 100644 --- a/arch/mips/include/asm/octeon/cvmx-helper-spi.h +++ b/arch/mips/include/asm/octeon/cvmx-helper-spi.h @@ -33,7 +33,7 @@ #define __CVMX_HELPER_SPI_H__ /** - * Probe a SPI interface and determine the number of ports + * Probe an SPI interface and determine the number of ports * connected to it. The SPI interface should still be down after * this call. * @@ -45,7 +45,7 @@ extern int __cvmx_helper_spi_probe(int interface); extern int __cvmx_helper_spi_enumerate(int interface); /** - * Bringup and enable a SPI interface. After this call packet I/O + * Bringup and enable an SPI interface. After this call packet I/O * should be fully functional. This is called with IPD enabled but * PKO disabled. * diff --git a/arch/mips/include/asm/octeon/cvmx-spi.h b/arch/mips/include/asm/octeon/cvmx-spi.h index d5038cc4b475..2d52578262a7 100644 --- a/arch/mips/include/asm/octeon/cvmx-spi.h +++ b/arch/mips/include/asm/octeon/cvmx-spi.h @@ -84,7 +84,7 @@ static inline int cvmx_spi_is_spi_interface(int interface) * Initialize and start the SPI interface. * * @interface: The identifier of the packet interface to configure and - * use as a SPI interface. + * use as an SPI interface. * @mode: The operating mode for the SPI interface. The interface * can operate as a full duplex (both Tx and Rx data paths * active) or as a halfplex (either the Tx data path is @@ -102,7 +102,7 @@ extern int cvmx_spi_start_interface(int interface, cvmx_spi_mode_t mode, * with its corespondant system. * * @interface: The identifier of the packet interface to configure and - * use as a SPI interface. + * use as an SPI interface. * @mode: The operating mode for the SPI interface. The interface * can operate as a full duplex (both Tx and Rx data paths * active) or as a halfplex (either the Tx data path is @@ -114,7 +114,7 @@ extern int cvmx_spi_restart_interface(int interface, cvmx_spi_mode_t mode, int timeout); /** - * Return non-zero if the SPI interface has a SPI4000 attached + * Return non-zero if the SPI interface has an SPI4000 attached * * @interface: SPI interface the SPI4000 is connected to * @@ -171,7 +171,7 @@ extern void cvmx_spi_set_callbacks(cvmx_spi_callbacks_t *new_callbacks); * Callback to perform SPI4 reset * * @interface: The identifier of the packet interface to configure and - * use as a SPI interface. + * use as an SPI interface. * @mode: The operating mode for the SPI interface. The interface * can operate as a full duplex (both Tx and Rx data paths * active) or as a halfplex (either the Tx data path is @@ -187,7 +187,7 @@ extern int cvmx_spi_reset_cb(int interface, cvmx_spi_mode_t mode); * detection * * @interface: The identifier of the packet interface to configure and - * use as a SPI interface. + * use as an SPI interface. * @mode: The operating mode for the SPI interface. The interface * can operate as a full duplex (both Tx and Rx data paths * active) or as a halfplex (either the Tx data path is @@ -204,7 +204,7 @@ extern int cvmx_spi_calendar_setup_cb(int interface, cvmx_spi_mode_t mode, * Callback to perform clock detection * * @interface: The identifier of the packet interface to configure and - * use as a SPI interface. + * use as an SPI interface. * @mode: The operating mode for the SPI interface. The interface * can operate as a full duplex (both Tx and Rx data paths * active) or as a halfplex (either the Tx data path is @@ -221,7 +221,7 @@ extern int cvmx_spi_clock_detect_cb(int interface, cvmx_spi_mode_t mode, * Callback to perform link training * * @interface: The identifier of the packet interface to configure and - * use as a SPI interface. + * use as an SPI interface. * @mode: The operating mode for the SPI interface. The interface * can operate as a full duplex (both Tx and Rx data paths * active) or as a halfplex (either the Tx data path is @@ -238,7 +238,7 @@ extern int cvmx_spi_training_cb(int interface, cvmx_spi_mode_t mode, * Callback to perform calendar data synchronization * * @interface: The identifier of the packet interface to configure and - * use as a SPI interface. + * use as an SPI interface. * @mode: The operating mode for the SPI interface. The interface * can operate as a full duplex (both Tx and Rx data paths * active) or as a halfplex (either the Tx data path is @@ -255,7 +255,7 @@ extern int cvmx_spi_calendar_sync_cb(int interface, cvmx_spi_mode_t mode, * Callback to handle interface up * * @interface: The identifier of the packet interface to configure and - * use as a SPI interface. + * use as an SPI interface. * @mode: The operating mode for the SPI interface. The interface * can operate as a full duplex (both Tx and Rx data paths * active) or as a halfplex (either the Tx data path is diff --git a/arch/mips/include/asm/octeon/cvmx-wqe.h b/arch/mips/include/asm/octeon/cvmx-wqe.h index 9cec2299b81b..4a4c39311a40 100644 --- a/arch/mips/include/asm/octeon/cvmx-wqe.h +++ b/arch/mips/include/asm/octeon/cvmx-wqe.h @@ -359,7 +359,7 @@ typedef union { * RGMII packet had a studder error (data not * repeated - 10/100M only) or the SPI4 packet * was sent to an NXA. - * - 16 = FCS error: a SPI4.2 packet had an FCS error. + * - 16 = FCS error: an SPI4.2 packet had an FCS error. * - 17 = Skip error: a packet was not large enough to * cover the skipped bytes. * - 18 = L2 header malformed: the packet is not long diff --git a/drivers/auxdisplay/lcd2s.c b/drivers/auxdisplay/lcd2s.c index 135831a16514..7864df3607b1 100644 --- a/drivers/auxdisplay/lcd2s.c +++ b/drivers/auxdisplay/lcd2s.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 /* * Console driver for LCD2S 4x20 character displays connected through i2c. - * The display also has a SPI interface, but the driver does not support + * The display also has an SPI interface, but the driver does not support * this yet. * * This is a driver allowing you to use a LCD2S 4x20 from Modtronix diff --git a/drivers/gpu/drm/solomon/ssd130x-spi.c b/drivers/gpu/drm/solomon/ssd130x-spi.c index 19ab4942cb33..f9e1f10c42a3 100644 --- a/drivers/gpu/drm/solomon/ssd130x-spi.c +++ b/drivers/gpu/drm/solomon/ssd130x-spi.c @@ -138,7 +138,7 @@ MODULE_DEVICE_TABLE(of, ssd130x_of_match); * if the device was registered via OF. This means that the module will not be * auto loaded, unless it contains an alias that matches the MODALIAS reported. * - * To workaround this issue, add a SPI device ID table. Even when this should + * To workaround this issue, add an SPI device ID table. Even when this should * not be needed for this driver to match the registered SPI devices. */ static const struct spi_device_id ssd130x_spi_table[] = { diff --git a/drivers/gpu/drm/tiny/ili9486.c b/drivers/gpu/drm/tiny/ili9486.c index 1bb847466b10..f059369b1f1d 100644 --- a/drivers/gpu/drm/tiny/ili9486.c +++ b/drivers/gpu/drm/tiny/ili9486.c @@ -35,7 +35,7 @@ #define ILI9486_MADCTL_MY BIT(7) /* - * The PiScreen/waveshare rpi-lcd-35 has a SPI to 16-bit parallel bus converter + * The PiScreen/waveshare rpi-lcd-35 has an SPI to 16-bit parallel bus converter * in front of the display controller. This means that 8-bit values have to be * transferred as 16-bit. */ diff --git a/drivers/input/misc/Kconfig b/drivers/input/misc/Kconfig index 5c2d0c06d2a5..4a3f92a59693 100644 --- a/drivers/input/misc/Kconfig +++ b/drivers/input/misc/Kconfig @@ -68,7 +68,7 @@ config INPUT_AD714X_SPI depends on INPUT_AD714X && SPI default y help - Say Y here if you have AD7142/AD7147 hooked to a SPI bus. + Say Y here if you have AD7142/AD7147 hooked to an SPI bus. To compile this driver as a module, choose M here: the module will be called ad714x-spi. @@ -724,7 +724,7 @@ config INPUT_ADXL34X_SPI depends on INPUT_ADXL34X && SPI default y help - Say Y here if you have ADXL345/6 hooked to a SPI bus. + Say Y here if you have ADXL345/6 hooked to an SPI bus. To compile this driver as a module, choose M here: the module will be called adxl34x-spi. diff --git a/drivers/input/rmi4/Kconfig b/drivers/input/rmi4/Kconfig index c0163b983ce6..055819188b3c 100644 --- a/drivers/input/rmi4/Kconfig +++ b/drivers/input/rmi4/Kconfig @@ -26,7 +26,7 @@ config RMI4_SPI tristate "RMI4 SPI Support" depends on SPI help - Say Y here if you want to support RMI4 devices connected to a SPI + Say Y here if you want to support RMI4 devices connected to an SPI bus. If unsure, say N. diff --git a/drivers/input/touchscreen/Kconfig b/drivers/input/touchscreen/Kconfig index 68d99a112e14..1870ab3aed46 100644 --- a/drivers/input/touchscreen/Kconfig +++ b/drivers/input/touchscreen/Kconfig @@ -82,7 +82,7 @@ config TOUCHSCREEN_AD7879_SPI depends on TOUCHSCREEN_AD7879 && SPI_MASTER select REGMAP_SPI help - Say Y here if you have AD7879-1/AD7889-1 hooked to a SPI bus. + Say Y here if you have AD7879-1/AD7889-1 hooked to an SPI bus. If unsure, say N (but it's safe to say "Y"). diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 30db49f31866..413e926ecb3c 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -138,7 +138,7 @@ config MFD_ATMEL_FLEXCOM depends on OF help Select this to get support for Atmel Flexcom. This is a wrapper - which embeds a SPI controller, a I2C controller and a USART. Only + which embeds an SPI controller, a I2C controller and a USART. Only one function can be used at a time. The choice is done at boot time by the probe function of this MFD driver according to a device tree property. diff --git a/drivers/mfd/ocelot.h b/drivers/mfd/ocelot.h index b8bc2f1486e2..0a6505edba53 100644 --- a/drivers/mfd/ocelot.h +++ b/drivers/mfd/ocelot.h @@ -21,7 +21,7 @@ struct resource; * initialization based on bus speed. * @dummy_buf: Zero-filled buffer of spi_padding_bytes size. The dummy * bytes that will be sent out between the address and - * data of a SPI read operation. + * data of an SPI read operation. */ struct ocelot_ddata { struct regmap *gcb_regmap; diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig index 5e19a961c34d..9cc2ae72b957 100644 --- a/drivers/mmc/host/Kconfig +++ b/drivers/mmc/host/Kconfig @@ -632,7 +632,7 @@ config MMC_SPI select CRC7 select CRC_ITU_T help - Some systems access MMC/SD/SDIO cards using a SPI controller + Some systems access MMC/SD/SDIO cards using an SPI controller instead of using a "native" MMC/SD/SDIO controller. This has a disadvantage of being relatively high overhead, but a compensating advantage of working on many systems without dedicated MMC/SD/SDIO diff --git a/drivers/mtd/spi-nor/controllers/Kconfig b/drivers/mtd/spi-nor/controllers/Kconfig index ca45dcd3ffe8..250295c8d85c 100644 --- a/drivers/mtd/spi-nor/controllers/Kconfig +++ b/drivers/mtd/spi-nor/controllers/Kconfig @@ -14,5 +14,5 @@ config SPI_NXP_SPIFI Enable support for the NXP LPC SPI Flash Interface controller. SPIFI is a specialized controller for connecting serial SPI - Flash. Enable this option if you have a device with a SPIFI + Flash. Enable this option if you have a device with an SPIFI controller and want to access the Flash as a mtd device. diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index d67c926bca8b..9fb03bf0202d 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -1138,7 +1138,7 @@ int spi_nor_erase_sector(struct spi_nor *nor, u32 addr) /** * spi_nor_div_by_erase_size() - calculate remainder and update new dividend - * @erase: pointer to a structure that describes a SPI NOR erase type + * @erase: pointer to a structure that describes an SPI NOR erase type * @dividend: dividend value * @remainder: pointer to u32 remainder (will be updated) * @@ -1159,7 +1159,7 @@ static u64 spi_nor_div_by_erase_size(const struct spi_nor_erase_type *erase, * which the address fits is expected to be * provided. * @map: the erase map of the SPI NOR - * @region: pointer to a structure that describes a SPI NOR erase region + * @region: pointer to a structure that describes an SPI NOR erase region * @addr: offset in the serial flash memory * @len: number of bytes to erase * @@ -1217,7 +1217,7 @@ static u64 spi_nor_region_end(const struct spi_nor_erase_region *region) /** * spi_nor_region_next() - get the next spi nor region - * @region: pointer to a structure that describes a SPI NOR erase region + * @region: pointer to a structure that describes an SPI NOR erase region * * Return: the next spi nor region or NULL if last region. */ @@ -1260,8 +1260,8 @@ spi_nor_find_erase_region(const struct spi_nor_erase_map *map, u64 addr) /** * spi_nor_init_erase_cmd() - initialize an erase command - * @region: pointer to a structure that describes a SPI NOR erase region - * @erase: pointer to a structure that describes a SPI NOR erase type + * @region: pointer to a structure that describes an SPI NOR erase region + * @erase: pointer to a structure that describes an SPI NOR erase type * * Return: the pointer to the allocated erase command, ERR_PTR(-errno) * otherwise. @@ -2011,8 +2011,8 @@ spi_nor_spimem_adjust_hwcaps(struct spi_nor *nor, u32 *hwcaps) } /** - * spi_nor_set_erase_type() - set a SPI NOR erase type - * @erase: pointer to a structure that describes a SPI NOR erase type + * spi_nor_set_erase_type() - set an SPI NOR erase type + * @erase: pointer to a structure that describes an SPI NOR erase type * @size: the size of the sector/block erased by the erase type * @opcode: the SPI command op code to erase the sector/block */ diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index f03b55cf7e6f..19b2eaaaea0e 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -189,7 +189,7 @@ enum spi_nor_pp_command_index { }; /** - * struct spi_nor_erase_type - Structure to describe a SPI NOR erase type + * struct spi_nor_erase_type - Structure to describe an SPI NOR erase type * @size: the size of the sector/block erased by the erase type. * JEDEC JESD216B imposes erase sizes to be a power of 2. * @size_shift: @size is a power of 2, the shift is stored in @@ -228,7 +228,7 @@ struct spi_nor_erase_command { }; /** - * struct spi_nor_erase_region - Structure to describe a SPI NOR erase region + * struct spi_nor_erase_region - Structure to describe an SPI NOR erase region * @offset: the offset in the data array of erase region start. * LSB bits are used as a bitmask encoding flags to * determine if this region is overlaid, if this region is diff --git a/drivers/mtd/spi-nor/sfdp.c b/drivers/mtd/spi-nor/sfdp.c index 8434f654eca1..dfead627da6b 100644 --- a/drivers/mtd/spi-nor/sfdp.c +++ b/drivers/mtd/spi-nor/sfdp.c @@ -304,7 +304,7 @@ static const struct sfdp_bfpt_erase sfdp_bfpt_erases[] = { /** * spi_nor_set_erase_settings_from_bfpt() - set erase type settings from BFPT - * @erase: pointer to a structure that describes a SPI NOR erase type + * @erase: pointer to a structure that describes an SPI NOR erase type * @size: the size of the sector/block erased by the erase type * @opcode: the SPI command op code to erase the sector/block * @i: erase type index as sorted in the Basic Flash Parameter Table @@ -775,8 +775,8 @@ static void spi_nor_region_mark_overlay(struct spi_nor_erase_region *region) /** * spi_nor_region_check_overlay() - set overlay bit when the region is overlaid - * @region: pointer to a structure that describes a SPI NOR erase region - * @erase: pointer to a structure that describes a SPI NOR erase type + * @region: pointer to a structure that describes an SPI NOR erase region + * @erase: pointer to a structure that describes an SPI NOR erase type * @erase_type: erase type bitmask */ static void diff --git a/drivers/net/dsa/sja1105/sja1105_dynamic_config.c b/drivers/net/dsa/sja1105/sja1105_dynamic_config.c index 7729d3f8b7f5..4985d3427441 100644 --- a/drivers/net/dsa/sja1105/sja1105_dynamic_config.c +++ b/drivers/net/dsa/sja1105/sja1105_dynamic_config.c @@ -71,11 +71,11 @@ * (the switch will read the fields provided in the buffer). * OP_DEL: Set if the manual says the VALIDENT bit is supported in the * COMMAND portion of this dynamic config buffer (i.e. the - * specified entry can be invalidated through a SPI write + * specified entry can be invalidated through an SPI write * command). * OP_SEARCH: Set if the manual says that the index of an entry can * be retrieved in the COMMAND portion of the buffer based - * on its ENTRY portion, as a result of a SPI write command. + * on its ENTRY portion, as a result of an SPI write command. * Only the TCAM-based FDB table on SJA1105 P/Q/R/S supports * this. * OP_VALID_ANYWAY: Reading some tables through the dynamic config diff --git a/drivers/net/ethernet/microchip/enc28j60.c b/drivers/net/ethernet/microchip/enc28j60.c index 176efbeae127..8133ee248c78 100644 --- a/drivers/net/ethernet/microchip/enc28j60.c +++ b/drivers/net/ethernet/microchip/enc28j60.c @@ -346,7 +346,7 @@ static void locked_regw_write(struct enc28j60_net *priv, u8 address, u16 data) /* * Buffer memory read - * Select the starting address and execute a SPI buffer read. + * Select the starting address and execute an SPI buffer read. */ static void enc28j60_mem_read(struct enc28j60_net *priv, u16 addr, int len, u8 *data) diff --git a/drivers/net/wireless/microchip/wilc1000/Kconfig b/drivers/net/wireless/microchip/wilc1000/Kconfig index 62cfcdc9aacc..8fb10ce1b5ce 100644 --- a/drivers/net/wireless/microchip/wilc1000/Kconfig +++ b/drivers/net/wireless/microchip/wilc1000/Kconfig @@ -31,7 +31,7 @@ config WILC1000_SPI help This module adds support for the SPI interface of adapters using WILC1000 chipset. The Atmel WILC1000 has a Serial Peripheral - Interface (SPI) that operates as a SPI slave. This SPI interface can + Interface (SPI) that operates as an SPI slave. This SPI interface can be used for control and for serial I/O of 802.11 data. The SPI is a full-duplex slave synchronous serial interface that is available immediately following reset when pin 9 (SDIO_SPI_CFG) is tied to diff --git a/drivers/net/wireless/st/cw1200/Kconfig b/drivers/net/wireless/st/cw1200/Kconfig index 03575e9894bb..f6a1f83e4dd5 100644 --- a/drivers/net/wireless/st/cw1200/Kconfig +++ b/drivers/net/wireless/st/cw1200/Kconfig @@ -24,7 +24,7 @@ config CW1200_WLAN_SPI tristate "Support SPI platforms" depends on CW1200 && SPI help - Enables support for the CW1200 connected via a SPI bus. You will + Enables support for the CW1200 connected via an SPI bus. You will need to add appropriate platform data glue in your board setup file. diff --git a/drivers/platform/chrome/Kconfig b/drivers/platform/chrome/Kconfig index c1ca247987d2..ba0d4a2f1096 100644 --- a/drivers/platform/chrome/Kconfig +++ b/drivers/platform/chrome/Kconfig @@ -115,7 +115,7 @@ config CROS_EC_SPI help If you say Y here, you get support for talking to the ChromeOS EC - through a SPI bus, using a byte-level protocol. Since the EC's + through an SPI bus, using a byte-level protocol. Since the EC's response time cannot be guaranteed, we support ignoring 'pre-amble' bytes before the response actually starts. diff --git a/drivers/platform/chrome/cros_ec_spi.c b/drivers/platform/chrome/cros_ec_spi.c index 21143dba8970..f0e793e9a4ce 100644 --- a/drivers/platform/chrome/cros_ec_spi.c +++ b/drivers/platform/chrome/cros_ec_spi.c @@ -61,7 +61,7 @@ #define EC_SPI_RECOVERY_TIME_NS (200 * 1000) /** - * struct cros_ec_spi - information about a SPI-connected EC + * struct cros_ec_spi - information about an SPI-connected EC * * @spi: SPI device we are connected to * @last_transfer_ns: time that we last finished a transfer. diff --git a/drivers/rtc/rtc-ds1305.c b/drivers/rtc/rtc-ds1305.c index ed9360486953..2c187264b249 100644 --- a/drivers/rtc/rtc-ds1305.c +++ b/drivers/rtc/rtc-ds1305.c @@ -701,7 +701,7 @@ static int ds1305_probe(struct spi_device *spi) /* Maybe set up alarm IRQ; be ready to handle it triggering right * away. NOTE that we don't share this. The signal is active low, - * and we can't ack it before a SPI message delay. We temporarily + * and we can't ack it before an SPI message delay. We temporarily * disable the IRQ until it's acked, which lets us work with more * IRQ trigger modes (not all IRQ controllers can do falling edge). */ diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 3b1c0878bb85..64825495c3e1 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -77,7 +77,7 @@ config SPI_ALTERA_DFL help This is a Device Feature List (DFL) bus driver for the Altera SPI master controller. The SPI master is connected - to a SPI slave to Avalon bridge in a Intel MAX BMC. + to an SPI slave to Avalon bridge in a Intel MAX BMC. config SPI_AR934X tristate "Qualcomm Atheros AR934X/QCA95XX SPI controller driver" @@ -632,7 +632,7 @@ config SPI_MTK_SNFI help This enables support for SPI-NAND mode on the MediaTek NAND Flash Interface found on MediaTek ARM SoCs. This controller - is implemented as a SPI-MEM controller with pipelined ECC + is implemented as an SPI-MEM controller with pipelined ECC capcability. config SPI_WPCM_FIU @@ -765,7 +765,7 @@ config SPI_PXA2XX depends on ARCH_PXA || ARCH_MMP || PCI || ACPI || COMPILE_TEST select PXA_SSP if ARCH_PXA || ARCH_MMP help - This enables using a PXA2xx or Sodaville SSP port as a SPI master + This enables using a PXA2xx or Sodaville SSP port as an SPI master controller. The driver can be configured to use any SSP port and additional documentation can be found a Documentation/spi/pxa2xx.rst. @@ -1151,7 +1151,7 @@ config SPI_MUX select MULTIPLEXER help This adds support for SPI multiplexers. Each SPI mux will be - accessible as a SPI controller, the devices behind the mux will appear + accessible as an SPI controller, the devices behind the mux will appear to be chip selects on this controller. It is still necessary to select one or more specific mux-controller drivers. diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c index 0c79193d9697..cfd1c4fff606 100644 --- a/drivers/spi/spi-mem.c +++ b/drivers/spi/spi-mem.c @@ -438,7 +438,7 @@ const char *spi_mem_get_name(struct spi_mem *mem) EXPORT_SYMBOL_GPL(spi_mem_get_name); /** - * spi_mem_adjust_op_size() - Adjust the data size of a SPI mem operation to + * spi_mem_adjust_op_size() - Adjust the data size of an SPI mem operation to * match controller limitations * @mem: the SPI memory * @op: the operation to adjust @@ -886,11 +886,11 @@ static void spi_mem_shutdown(struct spi_device *spi) } /** - * spi_mem_driver_register_with_owner() - Register a SPI memory driver + * spi_mem_driver_register_with_owner() - Register an SPI memory driver * @memdrv: the SPI memory driver to register * @owner: the owner of this driver * - * Registers a SPI memory driver. + * Registers an SPI memory driver. * * Return: 0 in case of success, a negative error core otherwise. */ @@ -907,10 +907,10 @@ int spi_mem_driver_register_with_owner(struct spi_mem_driver *memdrv, EXPORT_SYMBOL_GPL(spi_mem_driver_register_with_owner); /** - * spi_mem_driver_unregister() - Unregister a SPI memory driver + * spi_mem_driver_unregister() - Unregister an SPI memory driver * @memdrv: the SPI memory driver to unregister * - * Unregisters a SPI memory driver. + * Unregisters an SPI memory driver. */ void spi_mem_driver_unregister(struct spi_mem_driver *memdrv) { diff --git a/drivers/spi/spi-mpc52xx-psc.c b/drivers/spi/spi-mpc52xx-psc.c index 609311231e64..30015b6bffc4 100644 --- a/drivers/spi/spi-mpc52xx-psc.c +++ b/drivers/spi/spi-mpc52xx-psc.c @@ -285,7 +285,7 @@ static int mpc52xx_psc_spi_port_config(int psc_id, struct mpc52xx_psc_spi *mps) out_8(&fifo->rfcntl, 0); out_8(&psc->mode, MPC52xx_PSC_MODE_FFULL); - /* Configure 8bit codec mode as a SPI master and use EOF flags */ + /* Configure 8bit codec mode as an SPI master and use EOF flags */ /* SICR_SIM_CODEC8|SICR_GENCLK|SICR_SPI|SICR_MSTR|SICR_USEEOF */ out_be32(&psc->sicr, 0x0180C800); out_be16((u16 __iomem *)&psc->ccr, 0x070F); /* default SPI Clk 1MHz */ diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 15f174f4e056..95da8dafb652 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -470,7 +470,7 @@ struct bus_type spi_bus_type = { EXPORT_SYMBOL_GPL(spi_bus_type); /** - * __spi_register_driver - register a SPI driver + * __spi_register_driver - register an SPI driver * @owner: owner module of the driver to register * @sdrv: the driver to register * Context: can sleep @@ -3241,7 +3241,7 @@ static void devm_spi_unregister(struct device *dev, void *res) * spi_alloc_slave() * Context: can sleep * - * Register a SPI device as with spi_register_controller() which will + * Register an SPI device as with spi_register_controller() which will * automatically be unregistered and freed. * * Return: zero on success, else a negative error code. diff --git a/drivers/staging/fbtft/fbtft.h b/drivers/staging/fbtft/fbtft.h index 2c2b5f1c1df3..21d07b09fd36 100644 --- a/drivers/staging/fbtft/fbtft.h +++ b/drivers/staging/fbtft/fbtft.h @@ -152,7 +152,7 @@ struct fbtft_platform_data { * supported by kernel-doc. * */ -/* @spi: Set if it is a SPI device +/* @spi: Set if it is an SPI device * @pdev: Set if it is a platform device * @info: Pointer to framebuffer fb_info structure * @pdata: Pointer to platform data diff --git a/drivers/staging/iio/meter/Kconfig b/drivers/staging/iio/meter/Kconfig index aa6a3e7f6cdb..316d2589a484 100644 --- a/drivers/staging/iio/meter/Kconfig +++ b/drivers/staging/iio/meter/Kconfig @@ -29,7 +29,7 @@ config ADE7854_SPI depends on ADE7854 && SPI default y help - Say Y here if you have ADE7854/58/68/78 hooked to a SPI bus. + Say Y here if you have ADE7854/58/68/78 hooked to an SPI bus. To compile this driver as a module, choose M here: the module will be called ade7854-spi. diff --git a/drivers/staging/octeon/ethernet-spi.c b/drivers/staging/octeon/ethernet-spi.c index 699c98c5ec13..f5c58b029349 100644 --- a/drivers/staging/octeon/ethernet-spi.c +++ b/drivers/staging/octeon/ethernet-spi.c @@ -175,7 +175,7 @@ static void cvm_oct_spi_poll(struct net_device *dev) if (priv->port == spi4000_port) { /* * This function does nothing if it is called on an - * interface without a SPI4000. + * interface without an SPI4000. */ cvmx_spi4000_check_speed(interface, priv->port); /* diff --git a/drivers/usb/host/max3421-hcd.c b/drivers/usb/host/max3421-hcd.c index 352e3ac2b377..6980796f8af2 100644 --- a/drivers/usb/host/max3421-hcd.c +++ b/drivers/usb/host/max3421-hcd.c @@ -7,7 +7,7 @@ * (C) Copyright 2014 David Mosberger-Tang <davidm(a)egauge.net> * * MAX3421 is a chip implementing a USB 2.0 Full-/Low-Speed host - * controller on a SPI bus. + * controller on an SPI bus. * * Based on: * o MAX3421E datasheet diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h index 6d3392a7edc6..2564de8b6ed3 100644 --- a/include/linux/mtd/spinand.h +++ b/include/linux/mtd/spinand.h @@ -231,8 +231,8 @@ struct spinand_devid { /** * struct manufacurer_ops - SPI NAND manufacturer specific operations - * @init: initialize a SPI NAND device - * @cleanup: cleanup a SPI NAND device + * @init: initialize an SPI NAND device + * @cleanup: cleanup an SPI NAND device * * Each SPI NAND manufacturer driver should implement this interface so that * NAND chips coming from this vendor can be initialized properly. @@ -293,7 +293,7 @@ struct spinand_op_variants { } /** - * spinand_ecc_info - description of the on-die ECC implemented by a SPI NAND + * spinand_ecc_info - description of the on-die ECC implemented by an SPI NAND * chip * @get_status: get the ECC status. Should return a positive number encoding * the number of corrected bitflips if correction was possible or @@ -462,7 +462,7 @@ static inline struct spinand_device *mtd_to_spinand(struct mtd_info *mtd) } /** - * spinand_to_mtd() - Get the MTD device embedded in a SPI NAND device + * spinand_to_mtd() - Get the MTD device embedded in an SPI NAND device * @spinand: SPI NAND device * * Return: the MTD device embedded in @spinand. @@ -484,7 +484,7 @@ static inline struct spinand_device *nand_to_spinand(struct nand_device *nand) } /** - * spinand_to_nand() - Get the NAND device embedded in a SPI NAND object + * spinand_to_nand() - Get the NAND device embedded in an SPI NAND object * @spinand: SPI NAND device * * Return: the NAND device embedded in @spinand. @@ -496,11 +496,11 @@ spinand_to_nand(struct spinand_device *spinand) } /** - * spinand_set_of_node - Attach a DT node to a SPI NAND device + * spinand_set_of_node - Attach a DT node to an SPI NAND device * @spinand: SPI NAND device * @np: DT node * - * Attach a DT node to a SPI NAND device. + * Attach a DT node to an SPI NAND device. */ static inline void spinand_set_of_node(struct spinand_device *spinand, struct device_node *np) diff --git a/include/linux/rmi.h b/include/linux/rmi.h index ab7eea01ab42..3b437ee3905f 100644 --- a/include/linux/rmi.h +++ b/include/linux/rmi.h @@ -173,7 +173,7 @@ struct rmi_f01_power_management { * SPI mode. * @split_read_byte_delay_us - the delay between each byte of a read operation * in V2 mode. - * @pre_delay_us - the delay before the start of a SPI transaction. This is + * @pre_delay_us - the delay before the start of an SPI transaction. This is * typically useful in conjunction with custom chip select assertions (see * below). * @post_delay_us - the delay after the completion of an SPI transaction. This diff --git a/include/linux/spi/spi-mem.h b/include/linux/spi/spi-mem.h index 8e984d75f5b6..2a9a8a7893ac 100644 --- a/include/linux/spi/spi-mem.h +++ b/include/linux/spi/spi-mem.h @@ -56,7 +56,7 @@ #define SPI_MEM_OP_NO_DATA { } /** - * enum spi_mem_data_dir - describes the direction of a SPI memory data + * enum spi_mem_data_dir - describes the direction of an SPI memory data * transfer from the controller perspective * @SPI_MEM_NO_DATA: no data transferred * @SPI_MEM_DATA_IN: data coming from the SPI memory @@ -69,7 +69,7 @@ enum spi_mem_data_dir { }; /** - * struct spi_mem_op - describes a SPI memory operation + * struct spi_mem_op - describes an SPI memory operation * @cmd.nbytes: number of opcode bytes (only 1 or 2 are valid). The opcode is * sent MSB-first. * @cmd.buswidth: number of IO lines used to transmit the command @@ -182,7 +182,7 @@ struct spi_mem_dirmap_desc { }; /** - * struct spi_mem - describes a SPI memory device + * struct spi_mem - describes an SPI memory device * @spi: the underlying SPI device * @drvpriv: spi_mem_driver private data * @name: name of the SPI memory device @@ -200,7 +200,7 @@ struct spi_mem { }; /** - * struct spi_mem_set_drvdata() - attach driver private data to a SPI mem + * struct spi_mem_set_drvdata() - attach driver private data to an SPI mem * device * @mem: memory device * @data: data to attach to the memory device @@ -211,7 +211,7 @@ static inline void spi_mem_set_drvdata(struct spi_mem *mem, void *data) } /** - * struct spi_mem_get_drvdata() - get driver private data attached to a SPI mem + * struct spi_mem_get_drvdata() - get driver private data attached to an SPI mem * device * @mem: memory device * @@ -228,7 +228,7 @@ static inline void *spi_mem_get_drvdata(struct spi_mem *mem) * limitations (can be alignment or max RX/TX size * limitations) * @supports_op: check if an operation is supported by the controller - * @exec_op: execute a SPI memory operation + * @exec_op: execute an SPI memory operation * @get_name: get a custom name for the SPI mem device from the controller. * This might be needed if the controller driver has been ported * to use the SPI mem layer and a custom name is used to keep @@ -302,10 +302,10 @@ struct spi_controller_mem_caps { /** * struct spi_mem_driver - SPI memory driver - * @spidrv: inherit from a SPI driver - * @probe: probe a SPI memory. Usually where detection/initialization takes + * @spidrv: inherit from an SPI driver + * @probe: probe an SPI memory. Usually where detection/initialization takes * place - * @remove: remove a SPI memory + * @remove: remove an SPI memory * @shutdown: take appropriate action when the system is shutdown * * This is just a thin wrapper around a spi_driver. The core takes care of diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index 9a32495fbb1f..debe88fdaddb 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h @@ -279,7 +279,7 @@ struct spi_message; * field of this structure. * * This represents the kind of device driver that uses SPI messages to - * interact with the hardware at the other end of a SPI link. It's called + * interact with the hardware at the other end of an SPI link. It's called * a "protocol" driver because it works through messages rather than talking * directly to SPI hardware (which is what the underlying SPI controller * driver does to pass those messages). These protocols are defined in the @@ -323,7 +323,7 @@ extern struct spi_device *spi_new_ancillary_device(struct spi_device *spi, u8 ch __spi_register_driver(THIS_MODULE, driver) /** - * module_spi_driver() - Helper macro for registering a SPI driver + * module_spi_driver() - Helper macro for registering an SPI driver * @__spi_driver: spi_driver struct * * Helper macro for SPI drivers which do not do anything special in module @@ -839,7 +839,7 @@ int acpi_spi_count_resources(struct acpi_device *adev); #endif /* - * SPI resource management while processing a SPI message + * SPI resource management while processing an SPI message */ typedef void (*spi_res_release_t)(struct spi_controller *ctlr, @@ -1454,7 +1454,7 @@ static inline ssize_t spi_w8r16be(struct spi_device *spi, u8 cmd) */ /** - * struct spi_board_info - board-specific template for a SPI device + * struct spi_board_info - board-specific template for an SPI device * @modalias: Initializes spi_device.modalias; identifies the driver. * @platform_data: Initializes spi_device.platform_data; the particular * data stored there is driver-specific. -- 2.34.1

3 3

[PATCH] Fixed the schema binding according to test
by Kiseok Jo 03 Feb '23

03 Feb '23

Modified according to the writing-schema.rst file and tested. Signed-off-by: Kiseok Jo <kiseok.jo(a)irondevice.com> --- .../bindings/sound/irondevice,sma1303.yaml | 46 +++++++++++++++++-- 1 file changed, 43 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/sound/irondevice,sma1303.yaml b/Documentation/devicetree/bindings/sound/irondevice,sma1303.yaml index 162c52606635..35d9a046ef75 100644 --- a/Documentation/devicetree/bindings/sound/irondevice,sma1303.yaml +++ b/Documentation/devicetree/bindings/sound/irondevice,sma1303.yaml @@ -10,22 +10,62 @@ maintainers: - Kiseok Jo <kiseok.jo(a)irondevice.com> description: - SMA1303 digital class-D audio amplifier with an integrated boost converter. + SMA1303 digital class-D audio amplifier + with an integrated boost converter. allOf: - - $ref: name-prefix.yaml# + - $ref: dai-common.yaml# + +properties: + compatible: + enum: + - irondevice,sma1303 + + reg: + maxItems: 1 + + '#sound-dai-cells': + const: 1 + + i2c-retry: + description: number of retries for I2C regmap. + maximum: 49 + default: 3 + + tdm-slot-rx: + description: set the tdm rx start slot. + maximum: 7 + default: 0 + + tdm-slot-tx: + description: set the tdm tx start slot. + maximum: 7 + default: 0 + + sys-clk-id: + description: select the using system clock. + default: 3 required: - compatible - reg + - '#sound-dai-cells' additionalProperties: false examples: - | - i2c_bus { + i2c { + #address-cells = <1>; + #size-cells = <0>; + amplifier@1e { compatible = "irondevice,sma1303"; reg = <0x1e>; + #sound-dai-cells = <1>; + i2c-retry = <5>; + tdm-slot-rx = <0>; + tdm-slot-tx = <2>; + sys-clk-id = <3>; }; }; base-commit: e33d4c4f1e2de74cfea556d75eef0886d5b7d472 -- 2.20.1

3 5

[PATCH 00/14] Add support for compress offload and gapless playback.
by Mohammad Rafi Shaik 03 Feb '23

03 Feb '23

Add support for compress offload and gapless playback in audioreach platform drivers. Mohammad Rafi Shaik (14): ALSA: compress: Update compress set params for gapless playback ASoC: qcom: SC7280: audioreach: Add sc7280 hardware param fixup callback ASoC: q6dsp: audioreach: Add placeholder decoder for compress playback ASoC: q6dsp: audioreach: Add support for compress offload commands ASoC: q6dsp: audioreach: Add support to set compress params ASoC: q6dsp: audioreach: Add support for sending real module ID to ADSP ASoC: q6dsp: q6apm-dai: Add async compress write support ASoC: q6dsp: q6apm-dai: Add open/free compress DAI callbacks ASoC: q6dsp: q6apm-dai: Add compress DAI and codec caps get callbacks ASoC: q6dsp: q6apm-dai: Add trigger/pointer compress DAI callbacks ASoC: q6dsp: q6apm-dai: Add compress set params and metadata DAI callbacks ASoC: q6dsp: q6apm-dai: Add mmap and copy compress DAI callbacks ASoC: qdsp6: audioreach: Add MP3, AAC and FLAC compress format support ASoC: q6dsp: audioreach: Add gapless feature support sound/core/compress_offload.c | 12 +- sound/soc/qcom/qdsp6/audioreach.c | 299 +++++++++++++++++-- sound/soc/qcom/qdsp6/audioreach.h | 56 ++++ sound/soc/qcom/qdsp6/q6apm-dai.c | 464 ++++++++++++++++++++++++++++++ sound/soc/qcom/qdsp6/q6apm.c | 117 ++++++++ sound/soc/qcom/qdsp6/q6apm.h | 8 + sound/soc/qcom/sc7280.c | 21 +- 7 files changed, 950 insertions(+), 27 deletions(-) -- 2.25.1

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