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[PATCH 00/11] ASoC: SOF: ipc4: Add support for formats per pins
by Peter Ujfalusi 14 Mar '23

14 Mar '23

Hi, The modules in IPC4 can have multiple 'pins' on their input and output and these pins can receive or output audio in different formats. Currently we assume that all pins are using the same format which is a limitation that needs to be lifted in order to support more complex components. This series will extend and rework the format handling to allow different formats on pins. Regards, Peter --- Ranjani Sridharan (11): ASoC: SOF: rename a couple of tokens ASoC: SOF: Use input/output pin consistently ASoC: SOF: ipc4-topology: Add a new field in struct sof_ipc4_available_audio_format ASoC: SOF: ipc4-topology: Do not parse the DMA_BUFFER_SIZE token ASoC: SOF: ipc4-topology: Parse the SOF_COMP_TOKENS only once ASoC: SOF: ipc4-topology: Always parse the output formats in topology ASoC: SOF: ipc4-topology: Modify the type of available input/output formats ASoC: SOF: ipc4-topology: Modify the signature of sof_ipc4_init_audio_fmt() ASoC: SOF: ipc4-topology: Remove the ref_audio_fmt field ASoC: SOF: ipc4-topology: Add new tokens for input/output pin format count ASoC: SOF: ipc4-topology: Search only pin 0 formats include/uapi/sound/sof/tokens.h | 20 +- sound/soc/sof/ipc4-pcm.c | 2 +- sound/soc/sof/ipc4-topology.c | 529 +++++++++++++++----------------- sound/soc/sof/ipc4-topology.h | 36 ++- sound/soc/sof/sof-audio.h | 35 +-- sound/soc/sof/topology.c | 124 ++++---- 6 files changed, 371 insertions(+), 375 deletions(-) -- 2.39.2

2 12

[PATCH 0/7] ASoC: SOF: ipc4: Add support for bytes control
by Peter Ujfalusi 14 Mar '23

14 Mar '23

Hi, This series will add support for bytes control and topology types. With IPC4 only the binary payload is sent to the firmware via LARGE_CONFIG message (which does similar multi-part message handling as the IPC3 control message did). The bytes payload itself is not checked by the kernel but user space expected to wrap it in sof_abi_hdr struct in order to get the target information of the binary data. The SOF firmware and sof-ctl have been updated to support blobs used in IPC4 setups. Regards, Peter --- Libin Yang (2): ASoC: SOF: ipc4-control: set_volume_data only applies to VOLSW family ASoC: SOF: ipc4-topology: Add support for TPLG_CTL_BYTES Peter Ujfalusi (5): ASoC: SOF: ipc3-control: Rename snd_sof_refresh_control() ASoC: SOF: ipc3-control: Merge functions to handle bytes_ext get variants ASoC: SOF: uapi: header: Convert sof_abi_hdr comments to kernel style ASoC: SOF: uapi: header: Update sof_abi_hdr doc for IPC4 use ASoC: SOF: ipc4-control: Add support for bytes control get and put include/uapi/sound/sof/abi.h | 2 + include/uapi/sound/sof/header.h | 27 +++- sound/soc/sof/ipc3-control.c | 90 ++++------- sound/soc/sof/ipc4-control.c | 260 +++++++++++++++++++++++++++++++- sound/soc/sof/ipc4-topology.c | 67 ++++++++ 5 files changed, 368 insertions(+), 78 deletions(-) -- 2.39.2

2 8

dpcm_be_connect: FE is atomic but BE is nonatomic, invalid configuration
by Daniel Baluta 14 Mar '23

14 Mar '23

Hi Morimoto-san, I would like to know your take on the following issue. On I.MX with SOF we use simple-card and hit the following error: sai1-wm8960-hifi: dpcm_be_connect: FE is atomic but BE is nonatomic, invalid configuration and I think it makes sense to have the BE nonatomic as set by SOF core. In order to fix this, we need to make FE nonatomic too. But FE is handled by simple-card and it doesn't set .nonatomic field leaving it as default (.nonatomic = 0). How do you think we can update this field? Would a DT property be good enough? thanks, Daniel.

2 2

Tegra: add UCM configuration for RT5631, WM8903 and MAX98089 based devices
by GitHub pull_request - edited 14 Mar '23

14 Mar '23

alsa-project/alsa-ucm-conf pull request #291 was edited from clamor-s: Proposed UCM configurations were tested for a while on wide range of devices. Did not cause any issues so far. List of supported devices using RT5631: - ASUS TF201 - ASUS TF300TG - ASUS TF300TL - ASUS TF700T using WM8903: - ASUS TF101 - ASUS SL101 - ASUS TF300T using MAX98089 - LG P880 - LG P895 Request URL : https://github.com/alsa-project/alsa-ucm-conf/pull/291 Patch URL : https://github.com/alsa-project/alsa-ucm-conf/pull/291.patch Repository URL: https://github.com/alsa-project/alsa-ucm-conf

1 0

Tegra: add UCM configuration for RT5631, WM8903 and MAX98089 based devices
by GitHub pull_request - edited 14 Mar '23

14 Mar '23

alsa-project/alsa-ucm-conf pull request #291 was edited from clamor-s: Proposed UCM configurations were tested for a while on wide range of devices. Did not cause any issues so far. List of supported devices using RT5631: - ASUS TF201 - ASUS TF300TG - ASUS TF300TL - ASUS TF700T using WM8903: - ASUS TF101 - ASUS TF300T using MAX98089 - LG P880 - LG P895 Request URL : https://github.com/alsa-project/alsa-ucm-conf/pull/291 Patch URL : https://github.com/alsa-project/alsa-ucm-conf/pull/291.patch Repository URL: https://github.com/alsa-project/alsa-ucm-conf

1 0

Tegra: add UCM configuration for RT5631, WM8903 and MAX98089 based devices
by GitHub pull_request - edited 14 Mar '23

14 Mar '23

alsa-project/alsa-ucm-conf pull request #291 was edited from clamor-s: Proposed UCM configurations were tested for a while on wide range of devices. Did not cause any issues so far. Request URL : https://github.com/alsa-project/alsa-ucm-conf/pull/291 Patch URL : https://github.com/alsa-project/alsa-ucm-conf/pull/291.patch Repository URL: https://github.com/alsa-project/alsa-ucm-conf

1 0

[PATCH V7 0/8] Add SoundWire support for AMD platforms
by Vijendar Mukunda 14 Mar '23

14 Mar '23

ACP IP(v6.x) block has two SoundWire manager instance support. This patchset adds support for AMD SoundWire manager driver. Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda(a)amd.com> changes since v6: - remove pm suspend check in amd_resume_child_device() and always return 0. - use same name convention for command and response variables. changes since v5: - replace loops logic with read_poll_timeout() throughout the code. changes since v4: - fix nit-picks in the code. - update naming convention for control word and response buffer vairables. - drop pm_suspend check in prepare callback. - use return statement instead of returning ret variable. changes since v3: - add usleep_range() in command/response implementation. - add usleep_range() in clock stop sequence. - modify usleep_range() values throughout the code. - remove unncessary debug statement from code. - update comment in probe() call. - fix timeout condition checks in the code. - drop "ret" variable in amd_disable_sdw_manager(). changes since v2: - Remove useless variable initializations. - Add helper function to interpret peripheral status. - Move runtime pm sequence to probe_work workqueue. - Use string "SoundWire" instead of "soundwire" in code. - Update comments in interrupt handler and probe sequence. - Rename "sdw_lock" as "acp_sdw_lock". - Remove __func__ from dev_dbg statements. changes since v1: - Drop asoc tree based patches. will send asoc patches as a separate series. - Fixed double space errors. - Use dev instead of pci->dev. - Use SoundWire manager terminology. - Remove amd_sdw_compute_slave_ports() function and use exported sdw_compute_slave_ports() function. - Remove unused variable "num_ports" from amd_manager structure. - Drop startup and shutdown dai callbacks. - Drop reset_page_addr callback. - Use relative address offset to program SoundWire manager registers throughout the code. - Separate wake enable interrupt handling from slave status handling logic. - Use acp_mmio to program ACP common registers. - Use dai_runtime_array implementation in dai_ops. - Refactor port_ops callbacks. - Add comments in port_ops callbacks. - Add retry count logic in irq thread to address faulty case. - Add helper function to interpret command response. - Add generic bandwidth allocation dependency in Kconfig options. - Add comments for AMD SoundWire power modes. - Add missing timeout check in amd_init_sdw_manager callback. - Declare frameshape parameters in probe call. - Handle error case in clock stop sequence. - Add comments in pm_prepare and pm_ops callbacks. Vijendar Mukunda (8): soundwire: export sdw_compute_slave_ports() function soundwire: amd: Add support for AMD Manager driver soundwire: amd: register SoundWire manager dai ops soundwire: amd: enable build for AMD SoundWire manager driver soundwire: amd: add SoundWire manager interrupt handling soundwire: amd: add runtime pm ops for AMD SoundWire manager driver soundwire: amd: handle SoundWire wake enable interrupt soundwire: amd: add pm_prepare callback and pm ops support drivers/soundwire/Kconfig | 10 + drivers/soundwire/Makefile | 4 + drivers/soundwire/amd_manager.c | 1244 +++++++++++++++++ drivers/soundwire/amd_manager.h | 274 ++++ drivers/soundwire/bus.h | 9 + .../soundwire/generic_bandwidth_allocation.c | 12 +- include/linux/soundwire/sdw_amd.h | 109 ++ 7 files changed, 1653 insertions(+), 9 deletions(-) create mode 100644 drivers/soundwire/amd_manager.c create mode 100644 drivers/soundwire/amd_manager.h create mode 100644 include/linux/soundwire/sdw_amd.h -- 2.34.1

3 12

[PATCH 1/3] ASoC: dt-bindings: wlf,wm8960: Convert to dtschema
by Krzysztof Kozlowski 14 Mar '23

14 Mar '23

Convert the Wolfson WM8960 audio codecs bindings to DT schema. Changes against original binding: 1. Document clocks and clock-names - already present in DTS and used by Linux driver. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski(a)linaro.org> --- One DTS warning still remains: uniphier-pxs2-gentil.dtb: wm8960@1a: Unevaluated properties are not allowed ('port@0' was unexpected) I am not sure if this is correct usage of endpoints. I would assume the codec should be used only as DAI. --- .../devicetree/bindings/sound/wlf,wm8960.yaml | 88 +++++++++++++++++++ .../devicetree/bindings/sound/wm8960.txt | 42 --------- 2 files changed, 88 insertions(+), 42 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/wlf,wm8960.yaml delete mode 100644 Documentation/devicetree/bindings/sound/wm8960.txt diff --git a/Documentation/devicetree/bindings/sound/wlf,wm8960.yaml b/Documentation/devicetree/bindings/sound/wlf,wm8960.yaml new file mode 100644 index 000000000000..ee8eba7f0104 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/wlf,wm8960.yaml @@ -0,0 +1,88 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/wlf,wm8960.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Wolfson WM8960 audio codec + +maintainers: + - patches(a)opensource.cirrus.com + +properties: + compatible: + const: wlf,wm8960 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: mclk + + '#sound-dai-cells': + const: 0 + + wlf,capless: + type: boolean + description: + If present, OUT3 pin will be enabled and disabled together with HP_L and + HP_R pins in response to jack detect events. + + wlf,gpio-cfg: + $ref: /schemas/types.yaml#/definitions/uint32-array + maxItems: 2 + description: | + A list of GPIO configuration register values. + - gpio-cfg[0]: ALRCGPIO of R9 (Audio interface) + - gpio-cfg[1]: {GPIOPOL:GPIOSEL[2:0]} of R48 (Additional Control 4). + + wlf,hp-cfg: + $ref: /schemas/types.yaml#/definitions/uint32-array + maxItems: 3 + description: | + A list of headphone jack detect configuration register values: + - hp-cfg[0]: HPSEL[1:0] of R48 (Additional Control 4). + - hp-cfg[1]: {HPSWEN:HPSWPOL} of R24 (Additional Control 2). + - hp-cfg[2]: {TOCLKSEL:TOEN} of R23 (Additional Control 1). + + wlf,shared-lrclk: + type: boolean + description: + If present, the LRCM bit of R24 (Additional control 2) gets set, + indicating that ADCLRC and DACLRC pins will be disabled only when ADC + (Left and Right) and DAC (Left and Right) are disabled. + When WM8960 works on synchronize mode and DACLRC pin is used to supply + frame clock, it will no frame clock for captrue unless enable DAC to + enable DACLRC pin. If shared-lrclk is present, no need to enable DAC for + captrue. + +required: + - compatible + - reg + +allOf: + - $ref: dai-common.yaml# + +unevaluatedProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + audio-codec@1a { + compatible = "wlf,wm8960"; + reg = <0x1a>; + clocks = <&clks 0>; + clock-names = "mclk"; + #sound-dai-cells = <0>; + wlf,hp-cfg = <3 2 3>; + wlf,gpio-cfg = <1 3>; + wlf,shared-lrclk; + }; + }; diff --git a/Documentation/devicetree/bindings/sound/wm8960.txt b/Documentation/devicetree/bindings/sound/wm8960.txt deleted file mode 100644 index 85d3b287108c..000000000000 --- a/Documentation/devicetree/bindings/sound/wm8960.txt +++ /dev/null @@ -1,42 +0,0 @@ -WM8960 audio CODEC - -This device supports I2C only. - -Required properties: - - - compatible : "wlf,wm8960" - - - reg : the I2C address of the device. - -Optional properties: - - wlf,shared-lrclk: This is a boolean property. If present, the LRCM bit of - R24 (Additional control 2) gets set, indicating that ADCLRC and DACLRC pins - will be disabled only when ADC (Left and Right) and DAC (Left and Right) - are disabled. - When wm8960 works on synchronize mode and DACLRC pin is used to supply - frame clock, it will no frame clock for captrue unless enable DAC to enable - DACLRC pin. If shared-lrclk is present, no need to enable DAC for captrue. - - - wlf,capless: This is a boolean property. If present, OUT3 pin will be - enabled and disabled together with HP_L and HP_R pins in response to jack - detect events. - - - wlf,hp-cfg: A list of headphone jack detect configuration register values. - The list must be 3 entries long. - hp-cfg[0]: HPSEL[1:0] of R48 (Additional Control 4). - hp-cfg[1]: {HPSWEN:HPSWPOL} of R24 (Additional Control 2). - hp-cfg[2]: {TOCLKSEL:TOEN} of R23 (Additional Control 1). - - - wlf,gpio-cfg: A list of GPIO configuration register values. - The list must be 2 entries long. - gpio-cfg[0]: ALRCGPIO of R9 (Audio interface) - gpio-cfg[1]: {GPIOPOL:GPIOSEL[2:0]} of R48 (Additional Control 4). - -Example: - -wm8960: codec@1a { - compatible = "wlf,wm8960"; - reg = <0x1a>; - - wlf,shared-lrclk; -}; -- 2.34.1

5 7

[PATCH v2 1/5] ASoC: cs35l45: Support for GPIO pins configuration.
by Vlad Karpovich 13 Mar '23

13 Mar '23

From: "Vlad.Karpovich" <vkarpovi(a)opensource.cirrus.com> Adds device tree configuration for cs35l45 GPIOs Signed-off-by: Vlad Karpovich <vkarpovi(a)opensource.cirrus.com> --- include/dt-bindings/sound/cs35l45.h | 57 +++++++++++++++++++++++++++++ sound/soc/codecs/cs35l45-tables.c | 14 +++++++ sound/soc/codecs/cs35l45.c | 56 ++++++++++++++++++++++++++++ sound/soc/codecs/cs35l45.h | 27 +++++++++++++- 4 files changed, 152 insertions(+), 2 deletions(-) diff --git a/include/dt-bindings/sound/cs35l45.h b/include/dt-bindings/sound/cs35l45.h index 076da4b2c28d..25386af18445 100644 --- a/include/dt-bindings/sound/cs35l45.h +++ b/include/dt-bindings/sound/cs35l45.h @@ -17,4 +17,61 @@ #define CS35L45_ASP_TX_HIZ_UNUSED 0x1 #define CS35L45_ASP_TX_HIZ_DISABLED 0x2 +/* + * Optional GPIOX Sub-nodes: + * The cs35l45 node can have up to three "cirrus,gpio-ctrlX" ('X' = [1,2,3]) + * sub-nodes for configuring the GPIO pins. + * + * - gpio-dir : GPIO pin direction. Valid only when 'gpio-ctrl' + * is 1. + * 0 = Output + * 1 = Input (Default) + * + * - gpio-lvl : GPIO level. Valid only when 'gpio-ctrl' is 1 and 'gpio-dir' is 0. + * + * 0 = Low (Default) + * 1 = High + * + * - gpio-op-cfg : GPIO output configuration. Valid only when 'gpio-ctrl' is 1 + * and 'gpio-dir' is 0. + * + * 0 = CMOS (Default) + * 1 = Open Drain + * + * - gpio-pol : GPIO output polarity select. Valid only when 'gpio-ctrl' is 1 + * and 'gpio-dir' is 0. + * + * 0 = Non-inverted, Active High (Default) + * 1 = Inverted, Active Low + * + * - gpio-invert : Defines the polarity of the GPIO pin if configured + * as input. + * + * 0 = Not inverted (Default) + * 1 = Inverted + * + * - gpio-ctrl : Defines the function of the GPIO pin. + * + * GPIO1: + * 0 = High impedance input (Default) + * 1 = Pin acts as a GPIO, direction controlled by 'gpio-dir' + * 2 = Pin acts as MDSYNC, direction controlled by MDSYNC + * 3-7 = Reserved + * + * GPIO2: + * 0 = High impedance input (Default) + * 1 = Pin acts as a GPIO, direction controlled by 'gpio-dir' + * 2 = Pin acts as open drain INT + * 3 = Reserved + * 4 = Pin acts as push-pull output INT. Active low. + * 5 = Pin acts as push-pull output INT. Active high. + * 6,7 = Reserved + * + * GPIO3: + * 0 = High impedance input (Default) + * 1 = Pin acts as a GPIO, direction controlled by 'gpio-dir' + * 2-7 = Reserved + */ +#define CS35L45_NUM_GPIOS 0x3 + #endif /* DT_CS35L45_H */ diff --git a/sound/soc/codecs/cs35l45-tables.c b/sound/soc/codecs/cs35l45-tables.c index 5a2c2e684ef9..bca7e830821f 100644 --- a/sound/soc/codecs/cs35l45-tables.c +++ b/sound/soc/codecs/cs35l45-tables.c @@ -43,6 +43,9 @@ EXPORT_SYMBOL_NS_GPL(cs35l45_apply_patch, SND_SOC_CS35L45_TABLES); static const struct reg_default cs35l45_defaults[] = { { CS35L45_BLOCK_ENABLES, 0x00003323 }, { CS35L45_BLOCK_ENABLES2, 0x00000010 }, + { CS35L45_SYNC_GPIO1, 0x00000007 }, + { CS35L45_INTB_GPIO2_MCLK_REF, 0x00000005 }, + { CS35L45_GPIO3, 0x00000005 }, { CS35L45_REFCLK_INPUT, 0x00000510 }, { CS35L45_GLOBAL_SAMPLE_RATE, 0x00000003 }, { CS35L45_ASP_ENABLES1, 0x00000000 }, @@ -61,6 +64,9 @@ static const struct reg_default cs35l45_defaults[] = { { CS35L45_ASPTX4_INPUT, 0x00000028 }, { CS35L45_ASPTX5_INPUT, 0x00000048 }, { CS35L45_AMP_PCM_CONTROL, 0x00100000 }, + { CS35L45_GPIO1_CTRL1, 0x81000001 }, + { CS35L45_GPIO2_CTRL1, 0x81000001 }, + { CS35L45_GPIO3_CTRL1, 0x81000001 }, }; static bool cs35l45_readable_reg(struct device *dev, unsigned int reg) @@ -72,6 +78,9 @@ static bool cs35l45_readable_reg(struct device *dev, unsigned int reg) case CS35L45_BLOCK_ENABLES: case CS35L45_BLOCK_ENABLES2: case CS35L45_ERROR_RELEASE: + case CS35L45_SYNC_GPIO1: + case CS35L45_INTB_GPIO2_MCLK_REF: + case CS35L45_GPIO3: case CS35L45_REFCLK_INPUT: case CS35L45_GLOBAL_SAMPLE_RATE: case CS35L45_ASP_ENABLES1: @@ -92,6 +101,10 @@ static bool cs35l45_readable_reg(struct device *dev, unsigned int reg) case CS35L45_AMP_PCM_CONTROL: case CS35L45_AMP_PCM_HPF_TST: case CS35L45_IRQ1_EINT_4: + case CS35L45_GPIO_STATUS1: + case CS35L45_GPIO1_CTRL1: + case CS35L45_GPIO2_CTRL1: + case CS35L45_GPIO3_CTRL1: return true; default: return false; @@ -107,6 +120,7 @@ static bool cs35l45_volatile_reg(struct device *dev, unsigned int reg) case CS35L45_ERROR_RELEASE: case CS35L45_AMP_PCM_HPF_TST: /* not cachable */ case CS35L45_IRQ1_EINT_4: + case CS35L45_GPIO_STATUS1: return true; default: return false; diff --git a/sound/soc/codecs/cs35l45.c b/sound/soc/codecs/cs35l45.c index d15b3b77c7eb..901f3647fbda 100644 --- a/sound/soc/codecs/cs35l45.c +++ b/sound/soc/codecs/cs35l45.c @@ -536,7 +536,63 @@ static int __maybe_unused cs35l45_runtime_resume(struct device *dev) static int cs35l45_apply_property_config(struct cs35l45_private *cs35l45) { + struct device_node *node = cs35l45->dev->of_node; + unsigned int gpio_regs[] = {CS35L45_GPIO1_CTRL1, CS35L45_GPIO2_CTRL1, + CS35L45_GPIO3_CTRL1}; + unsigned int pad_regs[] = {CS35L45_SYNC_GPIO1, + CS35L45_INTB_GPIO2_MCLK_REF, CS35L45_GPIO3}; + struct device_node *child; unsigned int val; + char of_name[32]; + int ret, i; + + if (!node) + return 0; + + for (i = 0; i < CS35L45_NUM_GPIOS; i++) { + sprintf(of_name, "cirrus,gpio-ctrl%d", i + 1); + child = of_get_child_by_name(node, of_name); + if (!child) + continue; + + ret = of_property_read_u32(child, "gpio-dir", &val); + if (!ret) + regmap_update_bits(cs35l45->regmap, gpio_regs[i], + CS35L45_GPIO_DIR_MASK, + val << CS35L45_GPIO_DIR_SHIFT); + + ret = of_property_read_u32(child, "gpio-lvl", &val); + if (!ret) + regmap_update_bits(cs35l45->regmap, gpio_regs[i], + CS35L45_GPIO_LVL_MASK, + val << CS35L45_GPIO_LVL_SHIFT); + + ret = of_property_read_u32(child, "gpio-op-cfg", &val); + if (!ret) + regmap_update_bits(cs35l45->regmap, gpio_regs[i], + CS35L45_GPIO_OP_CFG_MASK, + val << CS35L45_GPIO_OP_CFG_SHIFT); + + ret = of_property_read_u32(child, "gpio-pol", &val); + if (!ret) + regmap_update_bits(cs35l45->regmap, gpio_regs[i], + CS35L45_GPIO_POL_MASK, + val << CS35L45_GPIO_POL_SHIFT); + + ret = of_property_read_u32(child, "gpio-ctrl", &val); + if (!ret) + regmap_update_bits(cs35l45->regmap, pad_regs[i], + CS35L45_GPIO_CTRL_MASK, + val << CS35L45_GPIO_CTRL_SHIFT); + + ret = of_property_read_u32(child, "gpio-invert", &val); + if (!ret) + regmap_update_bits(cs35l45->regmap, pad_regs[i], + CS35L45_GPIO_INVERT_MASK, + val << CS35L45_GPIO_INVERT_SHIFT); + + of_node_put(child); + } if (device_property_read_u32(cs35l45->dev, "cirrus,asp-sdout-hiz-ctrl", &val) == 0) { diff --git a/sound/soc/codecs/cs35l45.h b/sound/soc/codecs/cs35l45.h index 53fe9d2b7b15..f3a54fc57d53 100644 --- a/sound/soc/codecs/cs35l45.h +++ b/sound/soc/codecs/cs35l45.h @@ -14,6 +14,7 @@ #include <linux/pm_runtime.h> #include <linux/regmap.h> #include <linux/regulator/consumer.h> +#include <dt-bindings/sound/cs35l45.h> #define CS35L45_DEVID 0x00000000 #define CS35L45_REVID 0x00000004 @@ -24,6 +25,9 @@ #define CS35L45_BLOCK_ENABLES 0x00002018 #define CS35L45_BLOCK_ENABLES2 0x0000201C #define CS35L45_ERROR_RELEASE 0x00002034 +#define CS35L45_SYNC_GPIO1 0x00002430 +#define CS35L45_INTB_GPIO2_MCLK_REF 0x00002434 +#define CS35L45_GPIO3 0x00002438 #define CS35L45_REFCLK_INPUT 0x00002C04 #define CS35L45_GLOBAL_SAMPLE_RATE 0x00002C0C #define CS35L45_BOOST_CCM_CFG 0x00003808 @@ -48,8 +52,11 @@ #define CS35L45_AMP_PCM_CONTROL 0x00007000 #define CS35L45_AMP_PCM_HPF_TST 0x00007004 #define CS35L45_IRQ1_EINT_4 0x0000E01C -#define CS35L45_LASTREG 0x0000E01C - +#define CS35L45_GPIO_STATUS1 0x0000F000 +#define CS35L45_GPIO1_CTRL1 0x0000F008 +#define CS35L45_GPIO2_CTRL1 0x0000F00C +#define CS35L45_GPIO3_CTRL1 0x0000F010 +#define CS35L45_LASTREG 0x0000F010 /* SFT_RESET */ #define CS35L45_SOFT_RESET_TRIGGER 0x5A000000 @@ -165,6 +172,22 @@ #define CS35L45_OTP_BOOT_DONE_STS_MASK BIT(1) #define CS35L45_OTP_BUSY_MASK BIT(0) +/* GPIOX_CTRL1 */ +#define CS35L45_GPIO_DIR_SHIFT 31 +#define CS35L45_GPIO_DIR_MASK BIT(31) +#define CS35L45_GPIO_LVL_SHIFT 15 +#define CS35L45_GPIO_LVL_MASK BIT(15) +#define CS35L45_GPIO_OP_CFG_SHIFT 14 +#define CS35L45_GPIO_OP_CFG_MASK BIT(14) +#define CS35L45_GPIO_POL_SHIFT 12 +#define CS35L45_GPIO_POL_MASK BIT(12) + +/* SYNC_GPIO1, INTB_GPIO2_MCLK_REF, GPIO3 */ +#define CS35L45_GPIO_CTRL_SHIFT 20 +#define CS35L45_GPIO_CTRL_MASK GENMASK(22, 20) +#define CS35L45_GPIO_INVERT_SHIFT 19 +#define CS35L45_GPIO_INVERT_MASK BIT(19) + /* Mixer sources */ #define CS35L45_PCM_SRC_MASK 0x7F #define CS35L45_PCM_SRC_ZERO 0x00 -- 2.25.1

2 9

[PATCH 1/9] ASoC: qcom: lpass-sc7280: Drop of_match_ptr for ID table
by Krzysztof Kozlowski 13 Mar '23

13 Mar '23

The driver is specific to ARCH_QCOM which depends on OF thus the driver is OF-only. Its of_device_id table is built unconditionally, thus of_match_ptr() for ID table does not make sense. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski(a)linaro.org> --- sound/soc/qcom/lpass-sc7280.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/qcom/lpass-sc7280.c b/sound/soc/qcom/lpass-sc7280.c index d43f480cbae3..956b974e322e 100644 --- a/sound/soc/qcom/lpass-sc7280.c +++ b/sound/soc/qcom/lpass-sc7280.c @@ -443,7 +443,7 @@ MODULE_DEVICE_TABLE(of, sc7280_lpass_cpu_device_id); static struct platform_driver sc7280_lpass_cpu_platform_driver = { .driver = { .name = "sc7280-lpass-cpu", - .of_match_table = of_match_ptr(sc7280_lpass_cpu_device_id), + .of_match_table = sc7280_lpass_cpu_device_id, .pm = &sc7280_lpass_pm_ops, }, .probe = asoc_qcom_lpass_cpu_platform_probe, -- 2.34.1

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