- Alsa-devel - mailman.alsa-project.org

Config file for a52 plugin (60-a52-encoder.conf) produces no/garbled sound via optical digital out (S/PDIF)
by GitHub issues - opened 02 Nov '21

02 Nov '21

alsa-project/alsa-plugins issue #38 was opened from jensgw: Dear Maintainer, this bug was originally reported on the debian tracker. They advised me to post it here. https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=998125 * What led up to the situation? Fresh Debian 11 install. I want to output 5.1 sound via toslink. Used KDE settings to switch from analog output to digital out 5.1. This produced no or garbled sound and Youtube videos would play back way to fast without sound. Then I switched to digital out stereo, this worked as expected but only stereo. I could trace back the error to the shipped config file for alsa's a52 plugin: 60-a52-encoder.conf. When I replaced that file with a much simpler one (see below) 5.1 digital out worked as expedted. I tried with onboard sound (PCH9) and dedicated card (Audigy Z) with the same result, the inlcuded a52 config file does not work. == Start a52.conf pcm.a52 { @args [CARD] @args.CARD { type string } type rate slave { pcm { type a52 bitrate 448 channels 6 card $CARD } rate 48000 } } == End a52.conf Therefore I assume the shipped config file with debian has an error somewhere. Please fix this. Best reagards Jens -- System Information: Debian Release: 11.1 Architecture: amd64 (x86_64) Kernel: Linux 5.14.0-0.bpo.2-amd64 (SMP w/4 CPU threads) Kernel taint flags: TAINT_UNSIGNED_MODULE Locale: LANG=de_DE.UTF-8, LC_CTYPE=de_DE.UTF-8 (charmap=UTF-8), LANGUAGE=en_US:en Shell: /bin/sh linked to /usr/bin/dash Init: systemd (via /run/systemd/system) Versions of packages libasound2-plugins depends on: ii libasound2 1.2.4-1.1 ii libavcodec-extra58 [libavcodec58] 7:4.3.2-0+deb11u2 ii libavresample4 7:4.3.2-0+deb11u2 ii libavutil56 7:4.3.2-0+deb11u2 ii libc6 2.31-13+deb11u2 ii libjack0 [libjack-0.125] 1:0.125.0-3+b1 ii libpulse0 14.2-2 ii libsamplerate0 0.2.1+ds0-1 Issue URL : https://github.com/alsa-project/alsa-plugins/issues/38 Repository URL: https://github.com/alsa-project/alsa-plugins

1 0

[PATCH RESEND] ALSA: hda/realtek: Add quirk for Clevo PC70HS
by Tim Crawford 02 Nov '21

02 Nov '21

Apply the PB51ED PCI quirk to the Clevo PC70HS. Fixes audio output from the internal speakers. Signed-off-by: Tim Crawford <tcrawford(a)system76.com> --- sound/pci/hda/patch_realtek.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index 6322fac9e694..8a3e2fe42106 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -2539,6 +2539,7 @@ static const struct snd_pci_quirk alc882_fixup_tbl[] = { SND_PCI_QUIRK(0x1558, 0x67d1, "Clevo PB71[ER][CDF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS), SND_PCI_QUIRK(0x1558, 0x67e1, "Clevo PB71[DE][CDF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS), SND_PCI_QUIRK(0x1558, 0x67e5, "Clevo PC70D[PRS](?:-D|-G)?", ALC1220_FIXUP_CLEVO_PB51ED_PINS), + SND_PCI_QUIRK(0x1558, 0x67f1, "Clevo PC70H[PRS]", ALC1220_FIXUP_CLEVO_PB51ED_PINS), SND_PCI_QUIRK(0x1558, 0x70d1, "Clevo PC70[ER][CDF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS), SND_PCI_QUIRK(0x1558, 0x7714, "Clevo X170SM", ALC1220_FIXUP_CLEVO_PB51ED_PINS), SND_PCI_QUIRK(0x1558, 0x7715, "Clevo X170KM-G", ALC1220_FIXUP_CLEVO_PB51ED), -- 2.31.1

2 1

alsatplg broken with musl-libc
by GitHub issues - opened 01 Nov '21

01 Nov '21

alsa-project/alsa-lib issue #187 was opened from Johnnynator: alsatplg feeds empty and non Integer strings to `strtol(3)` and friends. Glibc just silently accepts such inputs and does not set errno and returns 0. Musl sets `errno` to `EINVAL` with such inputs. This can easily be seen by most of the `alsatplg` invocation when compiling https://github.com/thesofproject/sof/ `STRTOL(3)` manpage explains that this behavior is allowed. > The implementation may also set errno to EINVAL in case no conversion was performed (no digits seen, and 0 returned). There are like two ways I see this can be fixed a) ignore EINVAL (and check if base is correct ourself) b) make sure that strtol is only getting called with a valid input (I'm not sure if the current behavior is intended to just return 0 if e,g, `tplg_get_unsigned` did not even parse anything valid Issue URL : https://github.com/alsa-project/alsa-lib/issues/187 Repository URL: https://github.com/alsa-project/alsa-lib

1 0

[GIT PULL] ASoC updates for v5.16
by Mark Brown 01 Nov '21

01 Nov '21

The following changes since commit 519d81956ee277b4419c723adfb154603c2565ba: Linux 5.15-rc6 (2021-10-17 20:00:13 -1000) are available in the Git repository at: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git tags/asoc-v5.16 for you to fetch changes up to 318a54c0ee4aaa3bfd69fdf505588510c7672c0c: Merge remote-tracking branch 'asoc/for-5.16' into asoc-next (2021-10-29 22:00:00 +0100) ---------------------------------------------------------------- ASoC: Updates for v5.16 This is an unusually large set of updates, mostly a large crop of unusually big drivers coupled with extensive overhauls of existing code. There's a SH change here for the DAI format terminology, the change is straightforward and the SH maintainers don't seem very active. - A new version of the audio graph card which supports a wider range of systems. - Move of the Cirrus DSP framework into drivers/firmware to allow for future use by non-audio DSPs. - Several conversions to YAML DT bindings. - Continuing cleanups to the SOF and Intel code. - A very big overhaul of the cs42l42 driver, correcting many problems. - Support for AMD Vangogh and Yelow Cap, Cirrus CS35L41, Maxim MAX98520 and MAX98360A, Mediatek MT8195, Nuvoton NAU8821, nVidia Tegra210, NXP i.MX8ULP, Qualcomm AudioReach, Realtek ALC5682I-VS, RT5682S, and RT9120 and Rockchip RV1126 and RK3568 ---------------------------------------------------------------- Ajit Kumar Pandey (10): ASoC: amd: Kconfig: Select fch clock support with machine driver ASoC: amd: Add common framework to support I2S on ACP SOC ASoC: amd: acp: Add I2S support on Renoir platform ASoC: amd: acp: Add callback for machine driver on ACP ASoC: amd: acp: Add generic machine driver support for ACP cards ASoC: amd: acp: Add legacy sound card support for Chrome audio ASoC: amd: acp: Add SOF audio support on Chrome board ASoC: amd: acp: Add support for Maxim amplifier codec ASoC: amd: acp: Add support for RT5682-VS codec ASoC: amd: acp: Add acp_machine struct for renoir platform. Alejandro Tafalla (2): ASoC: max98927: Handle reset gpio when probing i2c ASoC: max98927: Add reset-gpios optional property Alexander Stein (1): ASoC: meson: t9015: Add missing AVDD-supply property Amadeusz Sławiński (5): ASoC: core: Remove invalid snd_soc_component_set_jack call ASoC: topology: Check for dapm widget completeness ASoC: topology: Use correct device for prints ASoC: topology: Change topology device to card device ASoC: Stop dummy from overriding hwparams Andy Shevchenko (12): ASoC: Intel: bytcht_es8316: Get platform data via dev_get_platdata() ASoC: Intel: bytcht_es8316: Use temporary variable for struct device ASoC: Intel: bytcht_es8316: Switch to use gpiod_get_optional() ASoC: Intel: bytcht_es8316: Utilize dev_err_probe() to avoid log saturation ASoC: Intel: bytcr_rt5640: Get platform data via dev_get_platdata() ASoC: Intel: bytcr_rt5640: Use temporary variable for struct device ASoC: Intel: bytcr_rt5640: use devm_clk_get_optional() for mclk ASoC: Intel: bytcr_rt5640: Utilize dev_err_probe() to avoid log saturation ASoC: Intel: bytcr_rt5651: Get platform data via dev_get_platdata() ASoC: Intel: bytcr_rt5651: Use temporary variable for struct device ASoC: Intel: bytcr_rt5651: use devm_clk_get_optional() for mclk ASoC: Intel: bytcr_rt5651: Utilize dev_err_probe() to avoid log saturation AngeloGioacchino Del Regno (1): ASoC: rt5682-i2c: Use devm_clk_get_optional for optional clock Arnd Bergmann (3): ASoC: samsung: add missing "fallthrough;" ASoC: amd: acp: fix Kconfig dependencies ASoC: amd: acp: select CONFIG_SND_SOC_ACPI Bard Liao (1): ASoC: SOF: dai-intel: add SOF_DAI_INTEL_SSP_CLKCTRL_MCLK/BCLK_ES bits Bixuan Cui (1): ASoC: mediatek: mt8195: Add missing of_node_put() Brent Lu (9): ASoC: Intel: sof_rt5682: support ALC5682I-VS codec ASoC: intel: sof_rt5682: support jsl_rt5682s_rt1015p board ASoC: intel: sof_rt5682: support jsl_rt5682s_rt1015 board ASoC: intel: sof_rt5682: support jsl_rt5682s_mx98360a board ASoC: intel: sof_rt5682: update platform device name for Maxim amplifier ASoC: Intel: glk_rt5682_max98357a: support ALC5682I-VS codec ASoC: soc-acpi: add comp_ids field for machine driver matching ASoC: Intel: sof_rt5682: detect codec variant in probe function ASoC: Intel: sof_rt5682: use comp_ids to enumerate rt5682s Bud Liviu-Alexandru (1): ASoC: SOF: Make Intel IPC stream ops generic Cai Huoqing (1): ASoC: mediatek: mt8195: Make use of the helper function devm_platform_ioremap_resource() Cezary Rojewski (1): ASoC: topology: Add header payload_size verification Charles Keepax (10): ASoC: cs35l41: Fix use of an uninitialised variable ASoC: cs35l41: Use regmap_read_poll_timeout to wait for OTP boot ASoC: cs35l41: Combine adjacent register writes ASoC: cs35l41: Don't overwrite returned error code ASoC: cs35l41: Fixup the error messages ASoC: cs35l41: Fix a bunch of trivial code formating/style issues misc: cs35l41: Remove unused pdn variable ASoC: wm_adsp: Move check for control existence ASoC: wm_adsp: Switch to using wm_coeff_read_ctrl for compressed buffers ASoC: wm_adsp: Move sys_config_size to wm_adsp ChiYuan Huang (4): ASoC: dt-bindings: rt9120: Add initial bindings ASoC: rt9120: Add rt9210 audio amplifier support ASoC: dt-bindings: rt9120: Add initial bindings ASoC: rt9120: Add rt9210 audio amplifier support Christian Hewitt (1): ASoC: meson: implement driver_name for snd_soc_card in meson-card-utils Christophe JAILLET (1): ASoC: rsnd: Fix an error handling path in 'rsnd_node_count()' Colin Ian King (7): ASoC: mediatek: mt8195: Fix unused initialization of pointer etdm_data ASoC: mediatek: mt8195: make array adda_dai_list static const ASoC: qdsp6: q6afe-dai: Fix spelling mistake "Fronend" -> "Frontend" ASoC: codecs: Fix spelling mistake "Unsupport" -> "Unsupported" ASoC: meson: aiu: Fix spelling mistake "Unsupport" -> "Unsupported" ASoC: rockchip: i2s-tdm: Remove call to rockchip_i2s_ch_to_io ASoC: rockchip: i2s-tdm: Fix error handling on i2s_tdm_prepare_enable_mclk failure Daniel Baluta (4): ASoC: SOF: OF: Add fw_path and tplg_path parameters ASoC: SOF: Introduce snd_sof_mailbox_read / snd_sof_mailbox_write callbacks ASoC: SOF: imx: Use newly introduced generic IPC stream ops ASoC: SOF: Introduce fragment elapsed notification API David Lin (2): ASoC: nau8825: add set_jack coponment support ASoC: nau8825: add clock management for power saving David Rhodes (3): ASoC: cs35l41: CS35L41 Boosted Smart Amplifier ASoC: cs35l41: Add bindings for CS35L41 ASoC: cs35l41: Binding fixes Derek Fang (11): ASoC: rt5682s: Add driver for ALC5682I-VS codec ASoC: dt-bindings: rt5682s: add bindings for rt5682s ASoC: rt5682s: Remove the volatile SW reset register from reg_default ASoC: rt5682s: Use dev_dbg instead of pr_debug ASoC: rt5682s: Revise the macro RT5682S_PLLB_SRC_MASK ASoC: dt-bindings: rt5682s: fix the device-tree schema errors ASoC: rt5682s: Enable ASRC auto-disable to fix pop during jack plug-in while playback ASoC: rt5682s: Fix HP noise caused by SAR mode switch when the system resumes ASoC: rt5682s: Fix hp pop produced immediately after resuming ASoC: rt5682: fix a little pop while playback ASoC: rt5682s: Downsizing the DAC volume scale Dmitry Osipenko (2): ASoC: tegra: Restore AC97 support ASoC: tegra: Set default card name for Trimslice Geert Uytterhoeven (7): ASoC: dt-bindings: wlf,wm8978: Fix I2C address in example ASoC: dt-bindings: rockchip: i2s-tdm: Fix rockchip,i2s-[rt]x-route ASoC: wm8962: Convert to devm_clk_get_optional() ASoC: dt-bindings: wlf,wm8962: Convert to json-schema ASoC: amd: acp: Wrap AMD Audio ACP components in SND_SOC_AMD_ACP_COMMON ASoC: amd: acp: SND_SOC_AMD_{LEGACY_MACH,SOF_MACH} should depend on X86 && PCI && I2C ASoC: amd: acp: SND_SOC_AMD_ACP_COMMON should depend on X86 && PCI George Song (2): ASoC: dt-bindings: max98520: add initial bindings ASoC: max98520: add max98520 audio amplifier driver Guennadi Liakhovetski (1): ASoC: SOF: add error handling to snd_sof_ipc_msg_data() Guenter Roeck (1): spi: tegra20-slink: Declare runtime suspend and resume functions conditionally Guo Zhengkui (1): ASoC: wm_adsp: remove a repeated including Hans de Goede (6): ASoC: es8316: Use IRQF_NO_AUTOEN when requesting the IRQ ASoC: rt5651: Use IRQF_NO_AUTOEN when requesting the IRQ ASoC: nau8824: Fix NAU8824_JACK_LOGIC define ASoC: nau8824: Add DMI quirk mechanism for active-high jack-detect ASoC: nau8824: Add a nau8824_components() helper ASoC: Intel: cht_bsw_nau8824: Set card.components string Jack Yu (2): ASoC: rt1011: add i2s reference control for rt1011 ASoC: rt5682: move clk related code to rt5682_i2c_probe Jerome Brunet (2): ASoC: meson: axg-card: make links nonatomic ASoC: meson: axg-tdm-interface: manage formatters in trigger Jiapeng Chong (1): ASoC: rt5682s: make rt5682s_aif2_dai_ops and rt5682s_soc_component_dev John Keeping (1): ASoC: doc: update codec example code Julian Braha (4): ASoC: fix unmet dependency on GPIOLIB ASoC: fix unmet dependency on GPIOLIB for SND_SOC_MAX98357A ASoC: fix unmet dependencies on GPIOLIB for SND_SOC_DMIC ASoC: fix unmet dependencies on GPIOLIB for SND_SOC_RT1015P Krzysztof Kozlowski (1): ASoC: dt-bindings: rt5682s: correct several errors Kunihiko Hayashi (1): ASoC: dt-bindings: uniphier: Add description of each port number Kuninori Morimoto (21): ASoC: test-component: add Test Component YAML bindings ASoC: test-component: add Test Component for Sound debug/test ASoC: simple-card-utils: add asoc_graph_is_ports0() ASoC: simple-card-utils: add codec2codec support ASoC: add Audio Graph Card2 driver ASoC: audio-graph-card2: add Multi CPU/Codec support ASoC: audio-graph-card2: add DPCM support ASoC: audio-graph-card2: add Codec2Codec support ASoC: add Audio Graph Card2 Yaml Document ASoC: add Audio Graph Card2 Custom Sample ASoC: audio-graph-card2-custom-sample.dtsi: add Sample DT for Normal (Single) ASoC: audio-graph-card2-custom-sample.dtsi: add Sample DT for Normal (Nulti) ASoC: audio-graph-card2-custom-sample.dtsi: add DPCM sample (Single) ASoC: audio-graph-card2-custom-sample.dtsi: add DPCM sample (Multi) ASoC: audio-graph-card2-custom-sample.dtsi: add Codec2Codec sample (Single) ASoC: audio-graph-card2-custom-sample.dtsi: add Codec2Codec sample (Multi) ASoC: soc-pcm: tidyup soc_pcm_hw_clean() - step1 ASoC: soc-pcm: tidyup soc_pcm_hw_clean() - step2 ASoC: soc-component: add snd_soc_component_is_codec() ASoC: soc-core: tidyup empty function ASoC: soc-core: accept zero format at snd_soc_runtime_set_dai_fmt() Malik_Hsu (1): ASoC: Intel: sof_rt5682: Add support for max98360a speaker amp Marc Herbert (1): ASoC: SOF: prefix some terse and cryptic dev_dbg() with __func__ Mark Brown (93): Merge existing fixes from asoc/for-5.15 Merge series "Convert name-prefix doc to json-schema" from Sameer Pujar <spujar(a)nvidia.com>: Merge series "ARM: dts: Last round of DT schema fixes" from Maxime Ripard <maxime(a)cerno.tech>: Merge series "Cirrus Logic CS35L41 Amplifier" from David Rhodes <drhodes(a)opensource.cirrus.com>: Merge series "Patches to update for rockchip pdm" from Sugar Zhang <sugar.zhang(a)rock-chips.com>: Merge series "Support ALC5682I-VS codec" from Brent Lu <brent.lu(a)intel.com>: Merge series "ASoC: SOF: Intel: hda: Cleanups for local function uses" from Peter Ujfalusi <peter.ujfalusi(a)linux.intel.com>: Merge series "ASoC: SOF: Remove unused members from struct sof_dev_desc" from Peter Ujfalusi <peter.ujfalusi(a)linux.intel.com>: ASoC: atmel: Convert to new style DAI format definitions ASoC: au1x: Convert to modern terminology for DAI clocking Merge series "ASoC: SOF: Clean up the probe support" from Peter Ujfalusi <peter.ujfalusi(a)linux.intel.com>: Merge series "ASoC: cs42l42: Implement Manual Type detection as fallback" from Vitaly Rodionov <vitalyr(a)opensource.cirrus.com>: ASoC: 88pm860x: Update to modern clocking terminology Merge series "ASoC: SOF: ipc: Small cleanups for message handler functions" from Peter Ujfalusi <peter.ujfalusi(a)linux.intel.com>: ASoC: ab8500: Update to modern clocking terminology Merge series "Extend AHUB audio support for Tegra210 and later" from Sameer Pujar <spujar(a)nvidia.com>: Merge series "ASoC: compress: Support module_get on stream open" from Peter Ujfalusi <peter.ujfalusi(a)linux.intel.com>: ASoC: Drop mistakenly applied SPI patch ASoC: cros_ec_codec: Use modern ASoC DAI format terminology ASoC: eureka-tlv320: Update to modern clocking terminology ASoC: fsl-asoc-card: Update to modern clocking terminology ASoC: fsl-audmix: Update to modern clocking terminology ASoC: fsl-esai: Update to modern clocking terminology ASoC: fsl-mqs: Update to modern clocking terminology ASoC: fsl_sai: Update to modern clocking terminology ASoC: fsl_ssi: Update to modern clocking terminology ASoC: imx-audmix: Update to modern clocking terminology ASoC: imx-card: Update to modern clocking terminology ASoC: imx-es8328: Update to modern clocking terminology ASoC: imx-hdmi: Update to modern clocking terminology ASoC: imx-rpmsg: Update to modern clocking terminology ASoC: imx-sgtl5000: Update to modern clocking terminology ASoC: mpc8610_hpcd: Update to modern clocking terminology ASoC: pl1022_ds: Update to modern clocking terminology ASoC: pl1022_rdk: Update to modern clocking terminology ASoC: zl38060: Update to modern clocking terminology ASoC: ak4118: Update to modern clocking terminology ASoC: ak4104: Update to modern clocking terminology ASoC: alc5632: Use modern ASoC DAI format terminology ASoC: ak4642: Use modern ASoC DAI format terminology ASoC: ep93xx: Convert to modern clocking terminology ASoC: ad1836: Update to modern clocking terminology ASoC: adau1372: Update to modern clocking terminology ASoC: adau1373: Update to modern clocking terminology ASoC: adau1701: Update to modern clocking terminology ASoC: adau17x1: Update to modern clocking terminology ASoC: adau1977: Update to modern clocking terminology ASoC: adav80x: Update to modern clocking terminology ASoC: ad193x: Update to modern clocking terminology ASoC: cpcap: Use modern ASoC DAI format terminology ASoC: bcm: Convert to modern clocking terminology ASoC: alc5623: Use modern ASoC DAI format terminology ASoC: ak4671: Use modern ASoC DAI format terminology ASoC: dwc-i2s: Update to modern clocking terminology ASoC: ak5558: Use modern ASoC DAI format terminology ASoC: ak4458: Use modern ASoC DAI format terminology Merge series "add driver to support firmware loading on Cirrus Logic DSPs" from Simon Trimmer <simont(a)opensource.cirrus.com>: Merge series "Add support for on demand pipeline setup/destroy" from Peter Ujfalusi <peter.ujfalusi(a)linux.intel.com>: Merge series "ASoC: SOF: topology: minor updates" from Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com>: Merge series "ASoC: SOF: Intel: add flags to turn on SSP clocks early" from Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com>: Merge series "ASoC: Intel: machine driver updates for 5.16" from Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com>: Merge series "Rockchip I2S/TDM controller" from Nicolas Frattaroli <frattaroli.nicolas(a)gmail.com>: Merge series "ASoC: SOF: Improvements for debugging" from Peter Ujfalusi <peter.ujfalusi(a)linux.intel.com>: Merge series "Introduce new SOF helpers" from Daniel Baluta <daniel.baluta(a)oss.nxp.com> Daniel Baluta <daniel.baluta(a)nxp.com>: Merge series "Add reset-gpios handling for max98927" from Alejandro Tafalla <atafalla(a)dnyon.com>: Merge series "ASoC: Intel: bytcht_es8316: few cleanups" from Andy Shevchenko <andriy.shevchenko(a)linux.intel.com>: Merge series "ASoC: rt9120: Add Richtek RT9120 supprot" from cy_huang <u0084500(a)gmail.com> ChiYuan Huang <cy_huang(a)richtek.com>: sh: Use modern ASoC DAI format terminology Merge series "ASoC: Intel: bytcr_rt5651: few cleanups" from Andy Shevchenko <andriy.shevchenko(a)linux.intel.com>: ASoC: rt9120: Drop rt9210 audio amplifier support Merge series "ASoC: rt9120: Add Richtek RT9120 supprot" from cy_huang <u0084500(a)gmail.com> ChiYuan Huang <cy_huang(a)richtek.com>: Merge series "ASoC: Add Audio Graph Card2 support" from Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com>: Merge tag 'v5.15-rc6' into asoc-5.16 Merge series "ASoC: cleanup / tidyup soc-pcm/core/component" from Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com>: Merge branch 'asoc-5.15' into asoc-5.16 Merge series "ASoC: qcom: sm8250: add support for TX and RX Macro dais" from Srinivas Kandagatla <srinivas.kandagatla(a)linaro.org>: Merge branch 'asoc-5.15' into asoc-5.16 Merge series "ASoC: meson: axg: fix TDM channel order sync" from Jerome Brunet <jbrunet(a)baylibre.com>: Merge series "Add Yellow Carp platform ASoC driver" from Vijendar Mukunda <Vijendar.Mukunda(a)amd.com>: Merge series "ASoC: Add common modules support for ACP hw block" from Ajit Kumar Pandey <AjitKumar.Pandey(a)amd.com>: Merge series "ASoC: wm8962: Conversion to json-schema and fix" from Geert Uytterhoeven <geert+renesas(a)glider.be>: ASoC: topology: Fix stub for snd_soc_tplg_component_remove() Merge tag '20210927135559.738-6-srinivas.kandagatla(a)linaro.org' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into v11_20211026_srinivas_kandagatla_asoc_qcom_add_audioreach_support for audioreach support Merge series "ASoC: qcom: Add AudioReach support" from Srinivas Kandagatla <srinivas.kandagatla(a)linaro.org>: Merge series "Update Lpass digital codec macro drivers" from Srinivasa Rao Mandadapu <srivasam(a)codeaurora.org>: Merge series "ASoC: cs42l42: Fixes to power-down" from Richard Fitzgerald <rf(a)opensource.cirrus.com>: Merge series "ASoC: minor cleanup of warnings" from Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com>: Merge series "Make genaral and simple for new sof machine driver" from David Lin <CTLIN0(a)nuvoton.com>: Merge series "ASoC: cs42l42: Fix definition and handling of jack switch invert" from Richard Fitzgerald <rf(a)opensource.cirrus.com>: Merge series "ASoC: Sanity checks and soc-topology updates" from Cezary Rojewski <cezary.rojewski(a)intel.com>: Merge series "Multiple headphone codec driver support" from Brent Lu <brent.lu(a)intel.com>: Merge remote-tracking branch 'asoc/for-5.15' into asoc-linus Merge remote-tracking branch 'asoc/for-5.16' into asoc-next Masahiro Yamada (1): ASoC: ti: rename CONFIG_SND_SOC_DM365_VOICE_CODEC_MODULE Masanari Iida (1): ASoC: q6afe: q6asm: Fix typos in qcom,q6afe.txt and qcom,q6asm.txt Maxime Ripard (4): ASoC: dt-bindings: Add WM8978 Binding ASoC: dt-bindings: Convert Bluetooth SCO Link binding to a schema ASoC: dt-bindings: Convert SPDIF Transmitter binding to a schema ASoC: dt-bindings: Convert Simple Amplifier binding to a schema Nathan Chancellor (1): ASoC: qdsp6: audioreach: Fix clang -Wimplicit-fallthrough Nicolas Frattaroli (5): ASoC: rockchip: add support for i2s-tdm controller ASoC: dt-bindings: rockchip: add i2s-tdm bindings ASoC: rockchip: i2s-tdm: Strip out direct CRU use ASoC: dt-bindings: rockchip: i2s-tdm: Drop rockchip,cru property ASoC: rockchip: i2s-tdm: Fix refcount test Peter Ujfalusi (56): ASoC: soc-topology: Move template info print soc_tplg_dapm_widget_create() ASoC: SOF: Handle control change notification from firmware ASoC: SOF: intel: Do no initialize resindex_dma_base ASoC: SOF: Drop resindex_dma_base, dma_engine, dma_size from sof_dev_desc ASoC: SOF: Intel: hda-dsp: Declare locally used functions as static ASoC: SOF: Intel: hda: Remove boot_firmware skl and iccmax_icl declarations ASoC: SOF: Intel: hda: Relocate inline definitions from hda.h to hda.c for sdw ASoC: SOF: loader: load_firmware callback is mandatory, treat it like that ASoC: SOF: Intel: bdw: Set the mailbox offset directly in bdw_probe ASoC: SOF: ipc: Remove snd_sof_dsp_mailbox_init() ASoC: SOF: imx: Do not initialize the snd_sof_dsp_ops.read64 ASoC: SOF: loader: No need to export snd_sof_fw_parse_ext_data() ASoC: SOF: core: Do not use 'bar' as parameter for block_read/write ASoC: SOF: debug: Add generic API and ops for DSP regions ASoC: SOF: imx: Provide debugfs_add_region_item ops for core ASoC: SOF: Intel: Provide debugfs_add_region_item ops for core ASoC: SOF: loader: Use the generic ops for region debugfs handling ASoC: SOF: debug: No need to export the snd_sof_debugfs_io_item() ASoC: SOF: ipc: Add probe message logging to ipc_log_header() ASoC: SOF: pcm: Remove non existent CONFIG_SND_SOC_SOF_COMPRESS reference ASoC: SOF: probe: Merge and clean up the probe and compress files ASoC: SOF: Intel: Rename hda-compress.c to hda-probes.c ASoC: SOF: sof-probes: Correct the function names used for snd_soc_cdai_ops ASoC: SOF: core: Move probe work related code under a single if () branch ASoC: SOF: ipc: Clarify the parameter name for ipc_trace_message() ASoC: SOF: ipc: Print 0x prefix for errors in ipc_trace/stream_message() ASoC: SOF: ipc: Remove redundant error check from sof_ipc_tx_message_unlocked ASoC: SOF: Rename sof_arch_ops to dsp_arch_ops ASoC: soc-component: Convert the mark_module to void* ASoC: compress/component: Use module_get_when_open/put_when_close for cstream ASoC: SOF: Remove struct sof_ops_table and sof_get_ops() macro ASoC: Intel: boards: Update to modern clocking terminology ASoC: SOF: Intel: hda-stream: Print stream name on STREAM_SD_OFFSET timeout ASoC: SOF: ipc: Make the error prints consistent in tx_wait_done() ASoC: SOF: Change SND_SOC_SOF_TOPLEVEL from config to menuconfig ASoC: SOF: debug: Swap the dsp_dump and ipc_dump sequence for fw_exception ASoC: SOF: ipc and dsp dump: Add markers for better visibility ASoC: SOF: Print the dbg_dump and ipc_dump once to reduce kernel log noise ASoC: SOF: loader: Print the DSP dump if boot fails ASoC: SOF: intel: atom: No need to do a DSP dump in atom_run() ASoC: SOF: debug/ops: Move the IPC and DSP dump functions out from the header ASoC: SOF: debug: Add SOF_DBG_DUMP_OPTIONAL flag for DSP dumping ASoC: SOF: intel: hda-loader: Use snd_sof_dsp_dbg_dump() for DSP dump ASoC: SOF: Drop SOF_DBG_DUMP_FORCE_ERR_LEVEL and sof_dev_dbg_or_err ASoC: SOF: debug: Print out the fw_state along with the DSP dump ASoC: SOF: ipc: Re-enable dumps after successful IPC tx ASoC: SOF: ops: Force DSP panic dumps to be printed ASoC: SOF: Introduce macro to set the firmware state ASoC: SOF: intel: hda: Drop 'error' prefix from error dump functions ASoC: SOF: core: Clean up snd_sof_get_status() prints ASoC: SOF: loader: Drop SOF_DBG_DUMP_REGS flag when firmware start fails ASoC: SOF: Intel: hda-loader: Drop SOF_DBG_DUMP_REGS flag from dbg_dump calls ASoC: SOF: Intel: hda: Dump registers and stack when SOF_DBG_DUMP_REGS is set ASoC: SOF: pipelines: Harmonize all functions to use struct snd_sof_dev ASoC: rt1011: Fix 'I2S Reference' enum control caused error ASoC: rt1011: Fix 'I2S Reference' enum control Pierre-Louis Bossart (29): ASoC: amd: acp: declare and add prefix to 'bt_uart_enable' symbol ASoC: SOF: core: allow module parameter to override dma trace Kconfig ASoC: SOF: imx: add header file for ops ASoC: Intel: soc-acpi: apl/glk/tgl: add entry for devices based on ES8336 codec ALSA: intel-dsp-config: add quirk for APL/GLK/TGL devices based on ES8336 codec ASoC: Intel: add machine driver for SOF+ES8336 ASoC: Intel: soc-acpi: add missing quirk for TGL SDCA single amp ASoC: Intel: sof_sdw: add missing quirk for Dell SKU 0A45 ASoC: SOF: dai: mirror group_id definition added in firmware ASoC: SOF: dai: include new flags for DAI_CONFIG ASoC: SOF: Intel: hda: add new flags for DAI_CONFIG ASoC: SOF: Intel: hda-dai: improve SSP DAI handling for dynamic pipelines ASoC: SOF: topology: show clks_control value in dynamic debug ASoC: SOF: topology: allow for dynamic pipelines override for debug ASoC: SOF: core: debug: force all processing on primary core ASoC: soc-pcm: restore mixer functionality ASoC: topology: handle endianness warning ASoC: rt5682s: use 'static' qualifier ASoC: nau8821: fix kernel-doc ASoC: nau8821: clarify out-of-bounds check ASoC: mediatek: remove unnecessary initialization ASoC: mediatek: mt8195: rename shadowed array ASoC: mediatek: mt8195: fix return value ASoC: rockchip: i2s_tdm: improve return value handling ASoC: Intel: soc-acpi: add entry for ESSX8336 on JSL ASoC: es8316: add support for ESSX8336 ACPI _HID ASoC: Intel: soc-acpi-byt: shrink tables using compatible IDs ASoC: Intel: soc-acpi-cht: shrink tables using compatible IDs ASoC: Intel: soc-acpi: use const for all uses of snd_soc_acpi_codecs Rander Wang (2): ASoC: SOF: control: fix a typo in put operations for kcontrol ASoC: SOF: prepare code to allocate IPC messages in fw_ready Ranjani Sridharan (16): ASoC: SOF: compress: move and export sof_probe_compr_ops ASoC: SOF: pm: fix a stale comment ASoC: topology: change the complete op in snd_soc_tplg_ops to return int ASoC: SOF: control: Add access field in struct snd_sof_control ASoC: SOF: topology: Add new token for dynamic pipeline ASoC: SOF: sof-audio: add helpers for widgets, kcontrols and dai config set up AsoC: dapm: export a couple of functions ASoC: SOF: Add new fields to snd_sof_route ASoC: SOF: restore kcontrols for widget during set up ASoC: SOF: Don't set up widgets during topology parsing ASoC: SOF: Introduce widget use_count ASoC: SOF: Intel: hda: make sure DAI widget is set up before IPC ASoC: SOF: Add support for dynamic pipelines ASoC: SOF: topology: Add kernel parameter for topology verification ASoC: SOF: topology: return error if sof_connect_dai_widget() fails ASoC: SOF: topology: do not power down primary core during topology removal Richard Fitzgerald (18): ASoC: cs42l42: Don't reconfigure the PLL while it is running ASoC: cs42l42: Always configure both ASP TX channels ASoC: cs42l42: Correct some register default values ASoC: cs42l42: Don't set defaults for volatile registers ASoC: cs42l42: Defer probe if request_threaded_irq() returns EPROBE_DEFER ASoC: cs42l42: Don't claim to support 192k ASoC: cs42l42: Use PLL for SCLK > 12.288MHz ASoC: cs42l42: Allow time for HP/ADC to power-up after enable ASoC: cs42l42: Set correct SRC MCLK ASoC: cs42l42: Mark OSC_SWITCH_STATUS register volatile ASoC: cs42l42: Fix WARN in remove() if running without an interrupt ASoC: cs42l42: Always enable TS_PLUG and TS_UNPLUG interrupts ASoC: cs42l42: Remove unused runtime_suspend/runtime_resume callbacks ASoC: cs42l42: Prevent NULL pointer deref in interrupt handler ASoC: cs42l42: Reset and power-down on remove() and failed probe() ASoC: cs42l42: free_irq() before powering-down on probe() fail ASoC: dt-bindings: cs42l42: Correct description of ts-inv ASoC: cs42l42: Correct configuring of switch inversion from ts-inv Rikard Falkeborn (9): ASoC: fsl: Constify static snd_soc_ops ASoC: tegra: Constify static snd_soc_dai_ops structs ASoC: ti: Constify static snd_soc_ops ASoC: ux500: mop500: Constify static snd_soc_ops ASoC: tegra: Constify static snd_soc_ops ASoC: qcom: apq8096: Constify static snd_soc_ops ASoC: amd: acp-rt5645: Constify static snd_soc_ops ASoC: mediatek: Constify static snd_soc_ops ASoC: amd: vangogh: constify static struct snd_soc_dai_ops Sameer Pujar (14): ASoC: Add json-schema documentation for sound-name-prefix ASoC: Use schema reference for sound-name-prefix ASoC: Remove name-prefix.txt ASoC: soc-pcm: Don't reconnect an already active BE ASoC: simple-card-utils: Increase maximum DAI links limit to 512 ASoC: audio-graph: Fixup CPU endpoint hw_params in a BE<->BE link ASoC: dt-bindings: tegra: Few more Tegra210 AHUB modules ASoC: tegra: Add routes for few AHUB modules ASoC: tegra: Add Tegra210 based MVC driver ASoC: tegra: Add Tegra210 based SFC driver ASoC: tegra: Add Tegra210 based AMX driver ASoC: tegra: Add Tegra210 based ADX driver ASoC: tegra: Add Tegra210 based Mixer driver ASoC: Fix warning related to 'sound-name-prefix' binding Sebastian Andrzej Siewior (1): ASoC: mediatek: mt8195: Remove unsued irqs_lock. Seven Lee (1): ASoC: nau8821: new driver Shengjiu Wang (3): ASoC: fsl_rpmsg: add soc specific data structure ASoC: fsl_spdif: Add support for i.MX8ULP ASoC: fsl_rpmsg: Add rpmsg audio support for i.MX8ULP Simon Trimmer (14): ASoC: wm_adsp: Remove use of snd_ctl_elem_type_t ASoC: wm_adsp: Cancel ongoing work when removing controls ASoC: wm_adsp: Rename generic DSP support ASoC: wm_adsp: Introduce cs_dsp logging macros ASoC: wm_adsp: Separate some ASoC and generic functions ASoC: wm_adsp: Split DSP power operations into helper functions ASoC: wm_adsp: Separate generic cs_dsp_coeff_ctl handling ASoC: wm_adsp: Move check of dsp->running to better place ASoC: wm_adsp: Pass firmware names as parameters when starting DSP core ASoC: wm_adsp: move firmware loading to client ASoC: wm_adsp: Split out struct cs_dsp from struct wm_adsp ASoC: wm_adsp: Separate wm_adsp specifics in cs_dsp_client_ops firmware: cs_dsp: add driver to support firmware loading on Cirrus Logic DSPs ASoC: soc-component: Remove conditional definition of debugfs data members Srinivas Kandagatla (25): soc: dt-bindings: qcom: apr: convert to yaml soc: dt-bindings: qcom: apr: deprecate qcom,apr-domain property soc: qcom: apr: make code more reuseable soc: dt-bindings: qcom: add gpr bindings soc: qcom: apr: Add GPR support ASoC: soc-component: improve error reporting for register access ASoC: qcom: sm8250: add support for TX and RX Macro dais ASoC: qcom: sm8250: Add Jack support ASoC: dt-bindings: move LPASS dai related bindings out of q6afe ASoC: dt-bindings: move LPASS clocks related bindings out of q6afe ASoC: dt-bindings: rename q6afe.h to q6dsp-lpass-ports.h ASoC: qdsp6: q6afe-dai: move lpass audio ports to common file ASoC: qdsp6: q6afe-clocks: move audio-clocks to common file ASoC: dt-bindings: q6dsp: add q6apm-lpass-dai compatible ASoC: dt-bindings: lpass-clocks: add q6prm clocks compatible ASoC: dt-bindings: add q6apm digital audio stream bindings ASoC: qdsp6: audioreach: add basic pkt alloc support ASoC: qdsp6: audioreach: add q6apm support ASoC: qdsp6: audioreach: add module configuration command helpers ASoC: qdsp6: audioreach: add Kconfig and Makefile ASoC: qdsp6: audioreach: add topology support ASoC: qdsp6: audioreach: add q6apm-dai support ASoC: qdsp6: audioreach: add q6apm lpass dai support ASoC: qdsp6: audioreach: add q6prm support ASoC: qdsp6: audioreach: add support for q6prm-clocks Srinivasa Rao Mandadapu (7): ASoC: dt-bindings: lpass: add binding headers for digital codecs ASoC: dt-bindings: lpass: add binding headers for digital codecs ASoC: qcom: Add compatible names in va,wsa,rx,tx codec drivers for sc7280 ASoC: qcom: dt-bindings: Add compatible names for lpass sc7280 digital codecs ASoC: codecs: tx-macro: Enable tx top soundwire mic clock ASoC: codecs: tx-macro: Update tx default values ASoC: codecs: Change bulk clock voting to optional voting in digital codecs Stefan Binding (2): ASoC: cs42l42: Implement Manual Type detection as fallback ASoC: cs42l42: Use two thresholds and increased wait time for manual type detection Stephan Gerhold (1): ASoC: qcom: common: Respect status = "disabled" on DAI link nodes Sugar Zhang (9): ASoC: rockchip: Add support for rv1126 pdm ASoC: dt-bindings: rockchip: Add binding for rv1126 pdm ASoC: rockchip: pdm: Add support for rk3568 pdm ASoC: dt-bindings: rockchip: Add binding for rk3568 pdm ASoC: rockchip: pdm: Add support for path map ASoC: dt-bindings: rockchip: pdm: Document property 'rockchip,path-map' ASoC: dt-bindings: rockchip: Convert pdm bindings to yaml ASoC: dmaengine: Introduce module option prealloc_buffer_size_kbytes ASoC: rockchip: Use generic dmaengine code Trevor Wu (7): ASoC: mt8195: remove unnecessary CONFIG_PM ASoC: mediatek: mt6359: Fix unexpected error in bind/unbind flow ASoC: mediatek: mt8195: add missing of_node_put in probe ASoC: mediatek: mt8195: move of_node_put to remove function ASoC: mediatek: mt8195: update audsys clock parent name ASoC: mediatek: mt8195: add machine driver with mt6359, rt1011 and rt5682 ASoC: mediatek: mt8195: add mt8195-mt6359-rt1011-rt5682 bindings document Tzung-Bi Shih (2): ASoC: dt-bindings: mediatek: mt8192: re-add audio afe document ASoC: dt-bindings: mediatek: rename reset controller headers in DT example Uwe Kleine-König (5): ASoC: tlv320aic32x4: Make aic32x4_remove() return void ASoc: wm8731: Drop empty spi_driver remove callback ASoc: wm8900: Drop empty spi_driver remove callback ASoC: cs35l41: Make cs35l41_remove() return void ASoC: tlv320aic3x: Make aic3x_remove() return void Vijendar Mukunda (16): ASoc: amd: create platform device for VG machine driver ASoC: amd: add vangogh machine driver ASoC: amd: enable vangogh platform machine driver build ASoC: amd: add Yellow Carp ACP6x IP register header ASoC: amd: add Yellow Carp ACP PCI driver ASoC: amd: add acp6x init/de-init functions ASoC: amd: add platform devices for acp6x pdm driver and dmic driver ASoC: amd: add acp6x pdm platform driver ASoC: amd: add acp6x irq handler ASoC: amd: add acp6x pdm driver dma ops ASoC: amd: add acp6x pci driver pm ops ASoC: amd: add acp6x pdm driver pm ops ASoC: amd: enable Yellow carp acp6x drivers build ASoC: amd: create platform device for acp6x machine driver ASoC: amd: add YC machine driver using dmic ASoC: amd: enable Yellow Carp platform machine driver build Vincent Knecht (1): ASoC: codecs: tfa989x: Add support for tfa9897 RCV bit Viorel Suman (2): ASoC: SOF: imx8m: add SAI1 info ASoC: fsl_spdif: implement bypass mode from in to out Vitaly Rodionov (1): ASoC: cs42l42: Minor fix all errors reported by checkpatch.pl script Wolfram Sang (1): ASoC: codecs: max98390: simplify getting the adapter of a client Yang Yingliang (1): ASoC: amd: acp: Fix return value check in acp_machine_select() Yassine Oudjana (1): ASoC: wcd9335: Use correct version to initialize Class H gearhead (1): ASoC: pcm5102a: increase rate from 192k to 384k .../devicetree/bindings/soc/qcom/qcom,apr.txt | 134 - .../devicetree/bindings/soc/qcom/qcom,apr.yaml | 177 + .../devicetree/bindings/sound/amlogic,t9015.yaml | 6 + .../bindings/sound/audio-graph-card2.yaml | 57 + Documentation/devicetree/bindings/sound/bt-sco.txt | 13 - .../devicetree/bindings/sound/cirrus,cs35l41.yaml | 157 + .../devicetree/bindings/sound/cs42l42.txt | 13 +- .../devicetree/bindings/sound/linux,bt-sco.yaml | 38 + .../devicetree/bindings/sound/linux,spdif-dit.yaml | 32 + .../devicetree/bindings/sound/max9892x.txt | 3 + .../devicetree/bindings/sound/maxim,max98520.yaml | 36 + .../devicetree/bindings/sound/mt8192-afe-pcm.yaml | 100 + .../sound/mt8195-mt6359-rt1011-rt5682.yaml | 47 + .../devicetree/bindings/sound/name-prefix.txt | 24 - .../devicetree/bindings/sound/name-prefix.yaml | 21 + .../devicetree/bindings/sound/nau8821.txt | 55 + .../bindings/sound/nvidia,tegra186-dspk.yaml | 9 +- .../bindings/sound/nvidia,tegra210-adx.yaml | 76 + .../bindings/sound/nvidia,tegra210-ahub.yaml | 20 + .../bindings/sound/nvidia,tegra210-amx.yaml | 76 + .../bindings/sound/nvidia,tegra210-dmic.yaml | 9 +- .../bindings/sound/nvidia,tegra210-i2s.yaml | 9 +- .../bindings/sound/nvidia,tegra210-mixer.yaml | 74 + .../bindings/sound/nvidia,tegra210-mvc.yaml | 76 + .../bindings/sound/nvidia,tegra210-sfc.yaml | 73 + .../devicetree/bindings/sound/nxp,tfa989x.yaml | 9 +- .../bindings/sound/qcom,lpass-rx-macro.yaml | 4 +- .../bindings/sound/qcom,lpass-tx-macro.yaml | 4 +- .../bindings/sound/qcom,lpass-va-macro.yaml | 4 +- .../bindings/sound/qcom,lpass-wsa-macro.yaml | 4 +- .../devicetree/bindings/sound/qcom,q6afe.txt | 181 - .../devicetree/bindings/sound/qcom,q6apm-dai.yaml | 53 + .../devicetree/bindings/sound/qcom,q6asm.txt | 2 +- .../bindings/sound/qcom,q6dsp-lpass-clocks.yaml | 77 + .../bindings/sound/qcom,q6dsp-lpass-ports.yaml | 205 ++ .../devicetree/bindings/sound/realtek,rt5682s.yaml | 117 + .../devicetree/bindings/sound/richtek,rt9120.yaml | 59 + .../bindings/sound/rockchip,i2s-tdm.yaml | 182 + .../devicetree/bindings/sound/rockchip,pdm.txt | 46 - .../devicetree/bindings/sound/rockchip,pdm.yaml | 120 + Documentation/devicetree/bindings/sound/rt5659.txt | 2 +- .../devicetree/bindings/sound/simple-amplifier.txt | 17 - .../bindings/sound/simple-audio-amplifier.yaml | 45 + .../bindings/sound/simple-audio-mux.yaml | 9 +- .../bindings/sound/socionext,uniphier-aio.yaml | 22 +- .../bindings/sound/socionext,uniphier-evea.yaml | 6 +- .../bindings/sound/spdif-transmitter.txt | 10 - .../devicetree/bindings/sound/test-component.yaml | 33 + .../devicetree/bindings/sound/wlf,wm8962.yaml | 118 + .../devicetree/bindings/sound/wlf,wm8978.yaml | 58 + Documentation/devicetree/bindings/sound/wm8962.txt | 43 - Documentation/sound/alsa-configuration.rst | 9 + Documentation/sound/soc/codec.rst | 8 +- MAINTAINERS | 18 + arch/sh/boards/mach-ecovec24/setup.c | 2 +- arch/sh/boards/mach-se/7724/setup.c | 2 +- drivers/firmware/Kconfig | 1 + drivers/firmware/Makefile | 1 + drivers/firmware/cirrus/Kconfig | 5 + drivers/firmware/cirrus/Makefile | 3 + drivers/firmware/cirrus/cs_dsp.c | 3109 +++++++++++++++++ drivers/soc/qcom/Kconfig | 2 +- drivers/soc/qcom/apr.c | 287 +- include/dt-bindings/soc/qcom,gpr.h | 19 + include/dt-bindings/sound/qcom,lpass.h | 31 + include/dt-bindings/sound/qcom,q6afe.h | 203 +- include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h | 208 ++ include/linux/firmware/cirrus/cs_dsp.h | 242 ++ .../linux/firmware/cirrus}/wmfw.h | 8 +- include/linux/soc/qcom/apr.h | 70 +- include/sound/cs35l41.h | 34 + include/sound/graph_card.h | 21 + include/sound/rt5682s.h | 48 + include/sound/simple_card_utils.h | 6 +- include/sound/soc-acpi.h | 3 + include/sound/soc-component.h | 21 +- include/sound/soc-dpcm.h | 1 + include/sound/soc-topology.h | 5 +- include/sound/sof.h | 5 - include/sound/sof/dai-intel.h | 4 + include/sound/sof/dai.h | 10 +- include/uapi/sound/snd_ar_tokens.h | 208 ++ include/uapi/sound/sof/tokens.h | 1 + sound/hda/intel-dsp-config.c | 22 +- sound/soc/amd/Kconfig | 40 +- sound/soc/amd/Makefile | 2 + sound/soc/amd/acp-da7219-max98357a.c | 6 +- sound/soc/amd/acp-pcm-dma.c | 6 +- sound/soc/amd/acp-rt5645.c | 2 +- sound/soc/amd/acp.h | 2 + sound/soc/amd/acp/Kconfig | 61 + sound/soc/amd/acp/Makefile | 26 + sound/soc/amd/acp/acp-i2s.c | 340 ++ sound/soc/amd/acp/acp-legacy-mach.c | 104 + sound/soc/amd/acp/acp-mach-common.c | 600 ++++ sound/soc/amd/acp/acp-mach.h | 57 + sound/soc/amd/acp/acp-platform.c | 315 ++ sound/soc/amd/acp/acp-renoir.c | 163 + sound/soc/amd/acp/acp-sof-mach.c | 131 + sound/soc/amd/acp/amd.h | 145 + sound/soc/amd/acp/chip_offset_byte.h | 76 + sound/soc/amd/vangogh/Makefile | 2 + sound/soc/amd/vangogh/acp5x-i2s.c | 2 +- sound/soc/amd/vangogh/acp5x-mach.c | 386 +++ sound/soc/amd/vangogh/acp5x.h | 2 +- sound/soc/amd/vangogh/pci-acp5x.c | 3 + sound/soc/amd/yc/Makefile | 9 + sound/soc/amd/yc/acp6x-mach.c | 194 ++ sound/soc/amd/yc/acp6x-pdm-dma.c | 448 +++ sound/soc/amd/yc/acp6x.h | 107 + sound/soc/amd/yc/acp6x_chip_offset_byte.h | 444 +++ sound/soc/amd/yc/pci-acp6x.c | 338 ++ sound/soc/atmel/atmel-i2s.c | 6 +- sound/soc/atmel/atmel_ssc_dai.c | 26 +- sound/soc/atmel/atmel_wm8904.c | 2 +- sound/soc/atmel/mchp-i2s-mcc.c | 10 +- sound/soc/atmel/mikroe-proto.c | 4 +- sound/soc/atmel/sam9g20_wm8731.c | 2 +- sound/soc/atmel/sam9x5_wm8731.c | 2 +- sound/soc/atmel/tse850-pcm5142.c | 2 +- sound/soc/au1x/db1200.c | 6 +- sound/soc/au1x/i2sc.c | 6 +- sound/soc/au1x/psc-i2s.c | 10 +- sound/soc/bcm/bcm2835-i2s.c | 56 +- sound/soc/bcm/cygnus-ssp.c | 6 +- sound/soc/cirrus/edb93xx.c | 2 +- sound/soc/cirrus/ep93xx-i2s.c | 10 +- sound/soc/cirrus/snappercl15.c | 2 +- sound/soc/codecs/88pm860x-codec.c | 18 +- sound/soc/codecs/Kconfig | 46 + sound/soc/codecs/Makefile | 12 + sound/soc/codecs/ab8500-codec.c | 20 +- sound/soc/codecs/ad1836.c | 6 +- sound/soc/codecs/ad193x.c | 10 +- sound/soc/codecs/adau1372.c | 14 +- sound/soc/codecs/adau1373.c | 14 +- sound/soc/codecs/adau1701.c | 6 +- sound/soc/codecs/adau17x1.c | 6 +- sound/soc/codecs/adau1977.c | 31 +- sound/soc/codecs/adav80x.c | 6 +- sound/soc/codecs/ak4104.c | 4 +- sound/soc/codecs/ak4118.c | 20 +- sound/soc/codecs/ak4458.c | 12 +- sound/soc/codecs/ak4642.c | 8 +- sound/soc/codecs/ak4671.c | 6 +- sound/soc/codecs/ak5558.c | 10 +- sound/soc/codecs/alc5623.c | 8 +- sound/soc/codecs/alc5632.c | 8 +- sound/soc/codecs/cpcap.c | 18 +- sound/soc/codecs/cros_ec_codec.c | 4 +- sound/soc/codecs/cs35l41-i2c.c | 115 + sound/soc/codecs/cs35l41-spi.c | 140 + sound/soc/codecs/cs35l41-tables.c | 594 ++++ sound/soc/codecs/cs35l41.c | 1445 ++++++++ sound/soc/codecs/cs35l41.h | 775 +++++ sound/soc/codecs/cs42l42.c | 481 +-- sound/soc/codecs/cs42l42.h | 64 +- sound/soc/codecs/cs4341.c | 7 + sound/soc/codecs/cs47l15.c | 26 +- sound/soc/codecs/cs47l24.c | 20 +- sound/soc/codecs/cs47l35.c | 26 +- sound/soc/codecs/cs47l85.c | 34 +- sound/soc/codecs/cs47l90.c | 36 +- sound/soc/codecs/cs47l92.c | 20 +- sound/soc/codecs/es8316.c | 8 +- sound/soc/codecs/lpass-rx-macro.c | 3 +- sound/soc/codecs/lpass-tx-macro.c | 25 +- sound/soc/codecs/lpass-va-macro.c | 3 +- sound/soc/codecs/lpass-wsa-macro.c | 1 + sound/soc/codecs/madera.c | 18 +- sound/soc/codecs/max98390.c | 2 +- sound/soc/codecs/max98520.c | 769 +++++ sound/soc/codecs/max98520.h | 159 + sound/soc/codecs/max98927.c | 25 + sound/soc/codecs/max98927.h | 1 + sound/soc/codecs/mt6359.c | 2 +- sound/soc/codecs/nau8821.c | 1714 ++++++++++ sound/soc/codecs/nau8821.h | 533 +++ sound/soc/codecs/nau8824.c | 74 +- sound/soc/codecs/nau8824.h | 3 +- sound/soc/codecs/nau8825.c | 48 +- sound/soc/codecs/pcm179x-spi.c | 1 + sound/soc/codecs/pcm5102a.c | 2 +- sound/soc/codecs/pcm512x.c | 2 + sound/soc/codecs/rt1011.c | 10 + sound/soc/codecs/rt1015.c | 2 +- sound/soc/codecs/rt1016.c | 2 +- sound/soc/codecs/rt1019.c | 2 +- sound/soc/codecs/rt1305.c | 2 +- sound/soc/codecs/rt1308.c | 2 +- sound/soc/codecs/rt5514.c | 2 +- sound/soc/codecs/rt5616.c | 2 +- sound/soc/codecs/rt5640.c | 2 +- sound/soc/codecs/rt5645.c | 2 +- sound/soc/codecs/rt5651.c | 9 +- sound/soc/codecs/rt5659.c | 2 +- sound/soc/codecs/rt5660.c | 2 +- sound/soc/codecs/rt5663.c | 2 +- sound/soc/codecs/rt5665.c | 2 +- sound/soc/codecs/rt5668.c | 2 +- sound/soc/codecs/rt5670.c | 2 +- sound/soc/codecs/rt5677.c | 2 +- sound/soc/codecs/rt5682-i2c.c | 17 + sound/soc/codecs/rt5682.c | 132 +- sound/soc/codecs/rt5682.h | 23 + sound/soc/codecs/rt5682s.c | 3197 ++++++++++++++++++ sound/soc/codecs/rt5682s.h | 1474 ++++++++ sound/soc/codecs/rt9120.c | 495 +++ sound/soc/codecs/tfa989x.c | 21 + sound/soc/codecs/tlv320aic32x4-i2c.c | 4 +- sound/soc/codecs/tlv320aic32x4-spi.c | 4 +- sound/soc/codecs/tlv320aic32x4.c | 4 +- sound/soc/codecs/tlv320aic32x4.h | 2 +- sound/soc/codecs/tlv320aic3x-i2c.c | 4 +- sound/soc/codecs/tlv320aic3x-spi.c | 4 +- sound/soc/codecs/tlv320aic3x.c | 3 +- sound/soc/codecs/tlv320aic3x.h | 2 +- sound/soc/codecs/wcd9335.c | 2 +- sound/soc/codecs/wcd938x.c | 6 +- sound/soc/codecs/wm2200.c | 30 +- sound/soc/codecs/wm5102.c | 16 +- sound/soc/codecs/wm5110.c | 24 +- sound/soc/codecs/wm8731.c | 6 - sound/soc/codecs/wm8900.c | 6 - sound/soc/codecs/wm8960.c | 13 +- sound/soc/codecs/wm8962.c | 13 +- sound/soc/codecs/wm_adsp.c | 3303 ++---------------- sound/soc/codecs/wm_adsp.h | 105 +- sound/soc/codecs/zl38060.c | 4 +- sound/soc/dwc/dwc-i2s.c | 12 +- sound/soc/fsl/eukrea-tlv320.c | 2 +- sound/soc/fsl/fsl-asoc-card.c | 54 +- sound/soc/fsl/fsl_audmix.c | 8 +- sound/soc/fsl/fsl_esai.c | 28 +- sound/soc/fsl/fsl_mqs.c | 4 +- sound/soc/fsl/fsl_rpmsg.c | 47 +- sound/soc/fsl/fsl_rpmsg.h | 12 + sound/soc/fsl/fsl_sai.c | 34 +- sound/soc/fsl/fsl_sai.h | 2 +- sound/soc/fsl/fsl_spdif.c | 85 + sound/soc/fsl/fsl_ssi.c | 38 +- sound/soc/fsl/fsl_xcvr.c | 17 +- sound/soc/fsl/imx-audmix.c | 12 +- sound/soc/fsl/imx-card.c | 6 +- sound/soc/fsl/imx-es8328.c | 2 +- sound/soc/fsl/imx-hdmi.c | 6 +- sound/soc/fsl/imx-rpmsg.c | 2 +- sound/soc/fsl/imx-sgtl5000.c | 2 +- sound/soc/fsl/mpc8610_hpcd.c | 16 +- sound/soc/fsl/p1022_ds.c | 16 +- sound/soc/fsl/p1022_rdk.c | 2 +- sound/soc/generic/Kconfig | 20 + sound/soc/generic/Makefile | 6 + sound/soc/generic/audio-graph-card.c | 4 +- .../soc/generic/audio-graph-card2-custom-sample.c | 183 + .../generic/audio-graph-card2-custom-sample.dtsi | 227 ++ sound/soc/generic/audio-graph-card2.c | 1281 +++++++ sound/soc/generic/simple-card-utils.c | 50 +- sound/soc/generic/test-component.c | 659 ++++ sound/soc/intel/boards/Kconfig | 18 +- sound/soc/intel/boards/Makefile | 2 + sound/soc/intel/boards/bdw-rt5650.c | 2 +- sound/soc/intel/boards/bdw-rt5677.c | 2 +- sound/soc/intel/boards/broadwell.c | 2 +- sound/soc/intel/boards/bxt_da7219_max98357a.c | 4 +- sound/soc/intel/boards/bxt_rt298.c | 2 +- sound/soc/intel/boards/bytcht_cx2072x.c | 4 +- sound/soc/intel/boards/bytcht_da7213.c | 4 +- sound/soc/intel/boards/bytcht_es8316.c | 41 +- sound/soc/intel/boards/bytcht_nocodec.c | 4 +- sound/soc/intel/boards/bytcr_rt5640.c | 120 +- sound/soc/intel/boards/bytcr_rt5651.c | 122 +- sound/soc/intel/boards/bytcr_wm5102.c | 4 +- sound/soc/intel/boards/cht_bsw_max98090_ti.c | 4 +- sound/soc/intel/boards/cht_bsw_nau8824.c | 4 +- sound/soc/intel/boards/cht_bsw_rt5645.c | 6 +- sound/soc/intel/boards/cht_bsw_rt5672.c | 2 +- sound/soc/intel/boards/glk_rt5682_max98357a.c | 56 +- sound/soc/intel/boards/haswell.c | 2 +- sound/soc/intel/boards/kbl_da7219_max98357a.c | 4 +- sound/soc/intel/boards/kbl_da7219_max98927.c | 6 +- sound/soc/intel/boards/kbl_rt5660.c | 2 +- sound/soc/intel/boards/kbl_rt5663_max98927.c | 6 +- .../soc/intel/boards/kbl_rt5663_rt5514_max98927.c | 4 +- sound/soc/intel/boards/skl_nau88l25_max98357a.c | 4 +- sound/soc/intel/boards/skl_nau88l25_ssm4567.c | 4 +- sound/soc/intel/boards/skl_rt286.c | 2 +- sound/soc/intel/boards/sof_es8336.c | 569 ++++ sound/soc/intel/boards/sof_rt5682.c | 96 +- sound/soc/intel/boards/sof_sdw.c | 10 + sound/soc/intel/common/soc-acpi-intel-adl-match.c | 24 +- sound/soc/intel/common/soc-acpi-intel-bxt-match.c | 8 +- sound/soc/intel/common/soc-acpi-intel-byt-match.c | 68 +- sound/soc/intel/common/soc-acpi-intel-cht-match.c | 69 +- sound/soc/intel/common/soc-acpi-intel-cml-match.c | 8 +- sound/soc/intel/common/soc-acpi-intel-glk-match.c | 17 +- sound/soc/intel/common/soc-acpi-intel-jsl-match.c | 27 +- sound/soc/intel/common/soc-acpi-intel-kbl-match.c | 12 +- sound/soc/intel/common/soc-acpi-intel-skl-match.c | 2 +- sound/soc/intel/common/soc-acpi-intel-tgl-match.c | 60 +- sound/soc/intel/skylake/skl-topology.c | 6 +- sound/soc/mediatek/Kconfig | 23 +- sound/soc/mediatek/common/mtk-afe-fe-dai.c | 3 +- sound/soc/mediatek/mt2701/mt2701-cs42448.c | 2 +- sound/soc/mediatek/mt2701/mt2701-wm8960.c | 2 +- .../mt8183/mt8183-mt6358-ts3a227-max98357.c | 2 +- sound/soc/mediatek/mt8195/Makefile | 1 + sound/soc/mediatek/mt8195/mt8195-afe-pcm.c | 10 +- sound/soc/mediatek/mt8195/mt8195-audsys-clk.c | 152 +- sound/soc/mediatek/mt8195/mt8195-dai-adda.c | 8 +- sound/soc/mediatek/mt8195/mt8195-dai-etdm.c | 4 +- .../mediatek/mt8195/mt8195-mt6359-rt1011-rt5682.c | 1155 +++++++ .../mediatek/mt8195/mt8195-mt6359-rt1019-rt5682.c | 54 +- sound/soc/meson/aiu-encoder-spdif.c | 2 +- sound/soc/meson/axg-card.c | 1 + sound/soc/meson/axg-tdm-interface.c | 26 +- sound/soc/meson/meson-card-utils.c | 1 + sound/soc/meson/meson-codec-glue.c | 3 - sound/soc/qcom/Kconfig | 25 +- sound/soc/qcom/apq8096.c | 2 +- sound/soc/qcom/common.c | 4 +- sound/soc/qcom/qdsp6/Makefile | 11 +- sound/soc/qcom/qdsp6/audioreach.c | 1130 +++++++ sound/soc/qcom/qdsp6/audioreach.h | 726 ++++ sound/soc/qcom/qdsp6/q6afe-clocks.c | 187 +- sound/soc/qcom/qdsp6/q6afe-dai.c | 689 +--- sound/soc/qcom/qdsp6/q6apm-dai.c | 416 +++ sound/soc/qcom/qdsp6/q6apm-lpass-dais.c | 260 ++ sound/soc/qcom/qdsp6/q6apm.c | 822 +++++ sound/soc/qcom/qdsp6/q6apm.h | 152 + sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c | 186 + sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.h | 30 + sound/soc/qcom/qdsp6/q6dsp-lpass-ports.c | 627 ++++ sound/soc/qcom/qdsp6/q6dsp-lpass-ports.h | 22 + sound/soc/qcom/qdsp6/q6prm-clocks.c | 85 + sound/soc/qcom/qdsp6/q6prm.c | 202 ++ sound/soc/qcom/qdsp6/q6prm.h | 78 + sound/soc/qcom/qdsp6/topology.c | 1113 ++++++ sound/soc/qcom/sm8250.c | 79 + sound/soc/rockchip/Kconfig | 11 + sound/soc/rockchip/Makefile | 5 +- sound/soc/rockchip/rockchip_i2s.c | 3 +- sound/soc/rockchip/rockchip_i2s_tdm.c | 1762 ++++++++++ sound/soc/rockchip/rockchip_i2s_tdm.h | 398 +++ sound/soc/rockchip/rockchip_pcm.c | 44 - sound/soc/rockchip/rockchip_pcm.h | 11 - sound/soc/rockchip/rockchip_pdm.c | 112 +- sound/soc/rockchip/rockchip_pdm.h | 6 + sound/soc/samsung/s3c-i2s-v2.c | 2 + sound/soc/sh/rcar/core.c | 1 + sound/soc/soc-acpi.c | 24 +- sound/soc/soc-component.c | 87 +- sound/soc/soc-compress.c | 43 +- sound/soc/soc-core.c | 55 +- sound/soc/soc-dapm.c | 15 +- sound/soc/soc-generic-dmaengine-pcm.c | 6 +- sound/soc/soc-pcm.c | 27 +- sound/soc/soc-topology.c | 52 +- sound/soc/soc-utils.c | 13 + sound/soc/sof/Kconfig | 6 +- sound/soc/sof/Makefile | 6 +- sound/soc/sof/compress.c | 158 +- sound/soc/sof/compress.h | 32 - sound/soc/sof/control.c | 192 +- sound/soc/sof/core.c | 35 +- sound/soc/sof/debug.c | 87 +- sound/soc/sof/imx/Kconfig | 2 + sound/soc/sof/imx/imx-ops.h | 10 + sound/soc/sof/imx/imx8.c | 47 +- sound/soc/sof/imx/imx8m.c | 41 +- sound/soc/sof/intel/Makefile | 5 +- sound/soc/sof/intel/apl.c | 7 +- sound/soc/sof/intel/atom.c | 5 +- sound/soc/sof/intel/bdw.c | 19 +- sound/soc/sof/intel/byt.c | 30 +- sound/soc/sof/intel/cnl.c | 7 +- sound/soc/sof/intel/hda-dai.c | 262 +- sound/soc/sof/intel/hda-dsp.c | 61 +- sound/soc/sof/intel/hda-ipc.c | 15 +- sound/soc/sof/intel/hda-loader.c | 11 +- .../soc/sof/intel/{hda-compress.c => hda-probes.c} | 0 sound/soc/sof/intel/hda-stream.c | 92 +- sound/soc/sof/intel/hda.c | 232 +- sound/soc/sof/intel/hda.h | 52 +- sound/soc/sof/intel/icl.c | 7 +- sound/soc/sof/intel/pci-apl.c | 2 - sound/soc/sof/intel/pci-cnl.c | 3 - sound/soc/sof/intel/pci-icl.c | 2 - sound/soc/sof/intel/pci-tgl.c | 5 - sound/soc/sof/intel/pci-tng.c | 16 +- sound/soc/sof/intel/tgl.c | 7 +- sound/soc/sof/ipc.c | 217 +- sound/soc/sof/loader.c | 161 +- sound/soc/sof/ops.c | 3 + sound/soc/sof/ops.h | 77 +- sound/soc/sof/pcm.c | 71 +- sound/soc/sof/pm.c | 12 +- sound/soc/sof/probe.h | 85 - sound/soc/sof/sof-audio.c | 715 +++- sound/soc/sof/sof-audio.h | 52 +- sound/soc/sof/sof-of-dev.c | 24 +- sound/soc/sof/sof-priv.h | 154 +- sound/soc/sof/{probe.c => sof-probes.c} | 280 +- sound/soc/sof/sof-probes.h | 38 + sound/soc/sof/{intel/intel-ipc.c => stream-ipc.c} | 56 +- sound/soc/sof/topology.c | 417 +-- sound/soc/sof/trace.c | 5 +- sound/soc/sof/utils.c | 28 +- sound/soc/sof/xtensa/core.c | 2 +- sound/soc/tegra/Kconfig | 48 + sound/soc/tegra/Makefile | 10 + sound/soc/tegra/tegra210_adx.c | 531 +++ sound/soc/tegra/tegra210_adx.h | 72 + sound/soc/tegra/tegra210_ahub.c | 511 ++- sound/soc/tegra/tegra210_amx.c | 600 ++++ sound/soc/tegra/tegra210_amx.h | 93 + sound/soc/tegra/tegra210_mixer.c | 674 ++++ sound/soc/tegra/tegra210_mixer.h | 100 + sound/soc/tegra/tegra210_mvc.c | 645 ++++ sound/soc/tegra/tegra210_mvc.h | 117 + sound/soc/tegra/tegra210_sfc.c | 3549 ++++++++++++++++++++ sound/soc/tegra/tegra210_sfc.h | 78 + sound/soc/tegra/tegra_asoc_machine.c | 62 +- sound/soc/tegra/tegra_asoc_machine.h | 1 + sound/soc/ti/Kconfig | 2 +- sound/soc/ti/davinci-evm.c | 2 +- sound/soc/ti/omap-abe-twl6040.c | 2 +- sound/soc/ux500/mop500_ab8500.c | 2 +- sound/soc/ux500/mop500_ab8500.h | 2 +- 429 files changed, 46511 insertions(+), 7638 deletions(-) delete mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,apr.txt create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,apr.yaml create mode 100644 Documentation/devicetree/bindings/sound/audio-graph-card2.yaml delete mode 100644 Documentation/devicetree/bindings/sound/bt-sco.txt create mode 100644 Documentation/devicetree/bindings/sound/cirrus,cs35l41.yaml create mode 100644 Documentation/devicetree/bindings/sound/linux,bt-sco.yaml create mode 100644 Documentation/devicetree/bindings/sound/linux,spdif-dit.yaml create mode 100644 Documentation/devicetree/bindings/sound/maxim,max98520.yaml create mode 100644 Documentation/devicetree/bindings/sound/mt8192-afe-pcm.yaml create mode 100644 Documentation/devicetree/bindings/sound/mt8195-mt6359-rt1011-rt5682.yaml delete mode 100644 Documentation/devicetree/bindings/sound/name-prefix.txt create mode 100644 Documentation/devicetree/bindings/sound/name-prefix.yaml create mode 100644 Documentation/devicetree/bindings/sound/nau8821.txt create mode 100644 Documentation/devicetree/bindings/sound/nvidia,tegra210-adx.yaml create mode 100644 Documentation/devicetree/bindings/sound/nvidia,tegra210-amx.yaml create mode 100644 Documentation/devicetree/bindings/sound/nvidia,tegra210-mixer.yaml create mode 100644 Documentation/devicetree/bindings/sound/nvidia,tegra210-mvc.yaml create mode 100644 Documentation/devicetree/bindings/sound/nvidia,tegra210-sfc.yaml create mode 100644 Documentation/devicetree/bindings/sound/qcom,q6apm-dai.yaml create mode 100644 Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-clocks.yaml create mode 100644 Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-ports.yaml create mode 100644 Documentation/devicetree/bindings/sound/realtek,rt5682s.yaml create mode 100644 Documentation/devicetree/bindings/sound/richtek,rt9120.yaml create mode 100644 Documentation/devicetree/bindings/sound/rockchip,i2s-tdm.yaml delete mode 100644 Documentation/devicetree/bindings/sound/rockchip,pdm.txt create mode 100644 Documentation/devicetree/bindings/sound/rockchip,pdm.yaml delete mode 100644 Documentation/devicetree/bindings/sound/simple-amplifier.txt create mode 100644 Documentation/devicetree/bindings/sound/simple-audio-amplifier.yaml delete mode 100644 Documentation/devicetree/bindings/sound/spdif-transmitter.txt create mode 100644 Documentation/devicetree/bindings/sound/test-component.yaml create mode 100644 Documentation/devicetree/bindings/sound/wlf,wm8962.yaml create mode 100644 Documentation/devicetree/bindings/sound/wlf,wm8978.yaml delete mode 100644 Documentation/devicetree/bindings/sound/wm8962.txt create mode 100644 drivers/firmware/cirrus/Kconfig create mode 100644 drivers/firmware/cirrus/Makefile create mode 100644 drivers/firmware/cirrus/cs_dsp.c create mode 100644 include/dt-bindings/soc/qcom,gpr.h create mode 100644 include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h create mode 100644 include/linux/firmware/cirrus/cs_dsp.h rename {sound/soc/codecs => include/linux/firmware/cirrus}/wmfw.h (91%) create mode 100644 include/sound/cs35l41.h create mode 100644 include/sound/rt5682s.h create mode 100644 include/uapi/sound/snd_ar_tokens.h create mode 100644 sound/soc/amd/acp/Kconfig create mode 100644 sound/soc/amd/acp/Makefile create mode 100644 sound/soc/amd/acp/acp-i2s.c create mode 100644 sound/soc/amd/acp/acp-legacy-mach.c create mode 100644 sound/soc/amd/acp/acp-mach-common.c create mode 100644 sound/soc/amd/acp/acp-mach.h create mode 100644 sound/soc/amd/acp/acp-platform.c create mode 100644 sound/soc/amd/acp/acp-renoir.c create mode 100644 sound/soc/amd/acp/acp-sof-mach.c create mode 100644 sound/soc/amd/acp/amd.h create mode 100644 sound/soc/amd/acp/chip_offset_byte.h create mode 100644 sound/soc/amd/vangogh/acp5x-mach.c create mode 100644 sound/soc/amd/yc/Makefile create mode 100644 sound/soc/amd/yc/acp6x-mach.c create mode 100644 sound/soc/amd/yc/acp6x-pdm-dma.c create mode 100644 sound/soc/amd/yc/acp6x.h create mode 100644 sound/soc/amd/yc/acp6x_chip_offset_byte.h create mode 100644 sound/soc/amd/yc/pci-acp6x.c create mode 100644 sound/soc/codecs/cs35l41-i2c.c create mode 100644 sound/soc/codecs/cs35l41-spi.c create mode 100644 sound/soc/codecs/cs35l41-tables.c create mode 100644 sound/soc/codecs/cs35l41.c create mode 100644 sound/soc/codecs/cs35l41.h create mode 100644 sound/soc/codecs/max98520.c create mode 100644 sound/soc/codecs/max98520.h create mode 100644 sound/soc/codecs/nau8821.c create mode 100644 sound/soc/codecs/nau8821.h create mode 100644 sound/soc/codecs/rt5682s.c create mode 100644 sound/soc/codecs/rt5682s.h create mode 100644 sound/soc/codecs/rt9120.c create mode 100644 sound/soc/generic/audio-graph-card2-custom-sample.c create mode 100644 sound/soc/generic/audio-graph-card2-custom-sample.dtsi create mode 100644 sound/soc/generic/audio-graph-card2.c create mode 100644 sound/soc/generic/test-component.c create mode 100644 sound/soc/intel/boards/sof_es8336.c create mode 100644 sound/soc/mediatek/mt8195/mt8195-mt6359-rt1011-rt5682.c create mode 100644 sound/soc/qcom/qdsp6/audioreach.c create mode 100644 sound/soc/qcom/qdsp6/audioreach.h create mode 100644 sound/soc/qcom/qdsp6/q6apm-dai.c create mode 100644 sound/soc/qcom/qdsp6/q6apm-lpass-dais.c create mode 100644 sound/soc/qcom/qdsp6/q6apm.c create mode 100644 sound/soc/qcom/qdsp6/q6apm.h create mode 100644 sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c create mode 100644 sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.h create mode 100644 sound/soc/qcom/qdsp6/q6dsp-lpass-ports.c create mode 100644 sound/soc/qcom/qdsp6/q6dsp-lpass-ports.h create mode 100644 sound/soc/qcom/qdsp6/q6prm-clocks.c create mode 100644 sound/soc/qcom/qdsp6/q6prm.c create mode 100644 sound/soc/qcom/qdsp6/q6prm.h create mode 100644 sound/soc/qcom/qdsp6/topology.c create mode 100644 sound/soc/rockchip/rockchip_i2s_tdm.c create mode 100644 sound/soc/rockchip/rockchip_i2s_tdm.h delete mode 100644 sound/soc/rockchip/rockchip_pcm.c delete mode 100644 sound/soc/rockchip/rockchip_pcm.h delete mode 100644 sound/soc/sof/compress.h create mode 100644 sound/soc/sof/imx/imx-ops.h rename sound/soc/sof/intel/{hda-compress.c => hda-probes.c} (100%) delete mode 100644 sound/soc/sof/probe.h rename sound/soc/sof/{probe.c => sof-probes.c} (52%) create mode 100644 sound/soc/sof/sof-probes.h rename sound/soc/sof/{intel/intel-ipc.c => stream-ipc.c} (56%) create mode 100644 sound/soc/tegra/tegra210_adx.c create mode 100644 sound/soc/tegra/tegra210_adx.h create mode 100644 sound/soc/tegra/tegra210_amx.c create mode 100644 sound/soc/tegra/tegra210_amx.h create mode 100644 sound/soc/tegra/tegra210_mixer.c create mode 100644 sound/soc/tegra/tegra210_mixer.h create mode 100644 sound/soc/tegra/tegra210_mvc.c create mode 100644 sound/soc/tegra/tegra210_mvc.h create mode 100644 sound/soc/tegra/tegra210_sfc.c create mode 100644 sound/soc/tegra/tegra210_sfc.h

2 1

[PATCH v2 2/2] ASoC: codec: tlv320adc3xxx: New codec driver
by Ricard Wanderlof 01 Nov '21

01 Nov '21

New codec driver for Texas Instruments TLV320ADC3001 and TLV320ADC3101 audio ADCs. Signed-off-by: Ricard Wanderlof <ricardw(a)axis.com> --- sound/soc/codecs/Kconfig | 7 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/tlv320adc3xxx.c | 1071 ++++++++++++++++++++++++++++++ sound/soc/codecs/tlv320adc3xxx.h | 379 +++++++++++ 4 files changed, 1459 insertions(+) create mode 100644 sound/soc/codecs/tlv320adc3xxx.c create mode 100644 sound/soc/codecs/tlv320adc3xxx.h diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index 326f2d611ad4..b81c4721c0d5 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -220,6 +220,7 @@ config SND_SOC_ALL_CODECS imply SND_SOC_TDA7419 imply SND_SOC_TFA9879 imply SND_SOC_TFA989X + imply SND_SOC_TLV320ADC3XXX imply SND_SOC_TLV320ADCX140 imply SND_SOC_TLV320AIC23_I2C imply SND_SOC_TLV320AIC23_SPI @@ -1486,6 +1487,12 @@ config SND_SOC_TFA989X Note that the driver currently bypasses the built-in "CoolFlux DSP" and does not support (hardware) volume control. +config SND_SOC_TLV320ADC3XXX + tristate "Texas Instruments TLV320ADC3001/3101 audio ADC" + help + Enable support for Texas Instruments TLV320ADC3001 and TLV320ADC3101 + ADCs. + config SND_SOC_TLV320AIC23 tristate diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index 9acfbcbfc46d..5112c12e6d76 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -238,6 +238,7 @@ snd-soc-tda7419-objs := tda7419.o snd-soc-tas2770-objs := tas2770.o snd-soc-tfa9879-objs := tfa9879.o snd-soc-tfa989x-objs := tfa989x.o +snd-soc-tlv320adc3xxx-objs := tlv320adc3xxx.o snd-soc-tlv320aic23-objs := tlv320aic23.o snd-soc-tlv320aic23-i2c-objs := tlv320aic23-i2c.o snd-soc-tlv320aic23-spi-objs := tlv320aic23-spi.o @@ -572,6 +573,7 @@ obj-$(CONFIG_SND_SOC_TDA7419) += snd-soc-tda7419.o obj-$(CONFIG_SND_SOC_TAS2770) += snd-soc-tas2770.o obj-$(CONFIG_SND_SOC_TFA9879) += snd-soc-tfa9879.o obj-$(CONFIG_SND_SOC_TFA989X) += snd-soc-tfa989x.o +obj-$(CONFIG_SND_SOC_TLV320ADC3XXX) += snd-soc-tlv320adc3xxx.o obj-$(CONFIG_SND_SOC_TLV320AIC23) += snd-soc-tlv320aic23.o obj-$(CONFIG_SND_SOC_TLV320AIC23_I2C) += snd-soc-tlv320aic23-i2c.o obj-$(CONFIG_SND_SOC_TLV320AIC23_SPI) += snd-soc-tlv320aic23-spi.o diff --git a/sound/soc/codecs/tlv320adc3xxx.c b/sound/soc/codecs/tlv320adc3xxx.c new file mode 100644 index 000000000000..584cdfbd92b4 --- /dev/null +++ b/sound/soc/codecs/tlv320adc3xxx.c @@ -0,0 +1,1071 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Based on sound/soc/codecs/tlv320aic3x.c by Vladimir Barinov +// +// History: +// +// Author: "Shahina Shaik" < shahina.s(a)mistralsolutions.com > +// Copyright: (C) 2010 Mistral Solutions Pvt Ltd. +// +// Author: Dongge wu <dgwu(a)ambarella.com> +// 2015/10/28 - [Dongge wu] Created file +// Copyright (C) 2014-2018, Ambarella, Inc. +// +// Author: Ricard Wanderlof <ricardw(a)axis.com> +// 2020/11/05: Fixing driver for Linux 4.14: more clocking modes, etc. +// 2021/09/03: Porting driver to Linux 5.4 and later. Added GPIO pin control, +// DAPM controlled clock chain, general cleanup. +// Copyright (C) 2021 Axis Communications AB +// + +#include <dt-bindings/sound/tlv320adc3xxx.h> +#include <linux/clk.h> +#include <linux/module.h> +#include <linux/moduleparam.h> +#include <linux/io.h> +#include <linux/init.h> +#include <linux/delay.h> +#include <linux/gpio/driver.h> +#include <linux/pm.h> +#include <linux/i2c.h> +#include <linux/platform_device.h> +#include <linux/cdev.h> +#include <linux/of_gpio.h> +#include <linux/slab.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/soc.h> +#include <sound/soc-dapm.h> +#include <sound/tlv.h> +#include <sound/initval.h> + +#include "tlv320adc3xxx.h" + +enum adc3xxx_type { + ADC3001 = 0, + ADC3101 +}; + +struct adc3xxx { + struct device *dev; + enum adc3xxx_type type; + struct clk *mclk; + struct regmap *regmap; + unsigned int pll_mode; + unsigned int rst_pin; + unsigned int rst_active; + unsigned int sysclk; + unsigned int gpio_cfg[ADC3XXX_GPIOS_MAX]; /* value+1 (0 => not set) */ + unsigned int micbias_vg[ADC3XXX_MICBIAS_PINS]; + int master; + u8 page_no; + int use_pll; +#ifdef CONFIG_GPIOLIB + struct gpio_chip gpio_chip; +#endif +}; + +static const unsigned int adc3xxx_gpio_ctrl_reg[ADC3XXX_GPIOS_MAX] = { + ADC3XXX_GPIO1_CTRL, + ADC3XXX_GPIO2_CTRL +}; + +static const unsigned int adc3xxx_micbias_shift[ADC3XXX_MICBIAS_PINS] = { + ADC3XXX_MICBIAS1_SHIFT, + ADC3XXX_MICBIAS2_SHIFT +}; + +static const struct reg_default adc3xxx_defaults[] = { + /* Page 0 */ + { 0, 0x00 }, { 1, 0x00 }, { 2, 0x00 }, { 3, 0x00 }, + { 4, 0x00 }, { 5, 0x11 }, { 6, 0x04 }, { 7, 0x00 }, + { 8, 0x00 }, { 9, 0x00 }, { 10, 0x00 }, { 11, 0x00 }, + { 12, 0x00 }, { 13, 0x00 }, { 14, 0x00 }, { 15, 0x00 }, + { 16, 0x00 }, { 17, 0x00 }, { 18, 0x01 }, { 19, 0x01 }, + { 20, 0x80 }, { 21, 0x80 }, { 22, 0x04 }, { 23, 0x00 }, + { 24, 0x00 }, { 25, 0x00 }, { 26, 0x01 }, { 27, 0x00 }, + { 28, 0x00 }, { 29, 0x02 }, { 30, 0x01 }, { 31, 0x00 }, + { 32, 0x00 }, { 33, 0x10 }, { 34, 0x00 }, { 35, 0x00 }, + { 36, 0x00 }, { 37, 0x00 }, { 38, 0x02 }, { 39, 0x00 }, + { 40, 0x00 }, { 41, 0x00 }, { 42, 0x00 }, { 43, 0x00 }, + { 44, 0x00 }, { 45, 0x00 }, { 46, 0x00 }, { 47, 0x00 }, + { 48, 0x00 }, { 49, 0x00 }, { 50, 0x00 }, { 51, 0x00 }, + { 52, 0x00 }, { 53, 0x12 }, { 54, 0x00 }, { 55, 0x00 }, + { 56, 0x00 }, { 57, 0x00 }, { 58, 0x00 }, { 59, 0x44 }, + { 60, 0x00 }, { 61, 0x01 }, { 62, 0x00 }, { 63, 0x00 }, + { 64, 0x00 }, { 65, 0x00 }, { 66, 0x00 }, { 67, 0x00 }, + { 68, 0x00 }, { 69, 0x00 }, { 70, 0x00 }, { 71, 0x00 }, + { 72, 0x00 }, { 73, 0x00 }, { 74, 0x00 }, { 75, 0x00 }, + { 76, 0x00 }, { 77, 0x00 }, { 78, 0x00 }, { 79, 0x00 }, + { 80, 0x00 }, { 81, 0x00 }, { 82, 0x88 }, { 83, 0x00 }, + { 84, 0x00 }, { 85, 0x00 }, { 86, 0x00 }, { 87, 0x00 }, + { 88, 0x7f }, { 89, 0x00 }, { 90, 0x00 }, { 91, 0x00 }, + { 92, 0x00 }, { 93, 0x00 }, { 94, 0x00 }, { 95, 0x00 }, + { 96, 0x7f }, { 97, 0x00 }, { 98, 0x00 }, { 99, 0x00 }, + { 100, 0x00 }, { 101, 0x00 }, { 102, 0x00 }, { 103, 0x00 }, + { 104, 0x00 }, { 105, 0x00 }, { 106, 0x00 }, { 107, 0x00 }, + { 108, 0x00 }, { 109, 0x00 }, { 110, 0x00 }, { 111, 0x00 }, + { 112, 0x00 }, { 113, 0x00 }, { 114, 0x00 }, { 115, 0x00 }, + { 116, 0x00 }, { 117, 0x00 }, { 118, 0x00 }, { 119, 0x00 }, + { 120, 0x00 }, { 121, 0x00 }, { 122, 0x00 }, { 123, 0x00 }, + { 124, 0x00 }, { 125, 0x00 }, { 126, 0x00 }, { 127, 0x00 }, + + /* Page 1 */ + { 128, 0x00 }, { 129, 0x00 }, { 130, 0x00 }, { 131, 0x00 }, + { 132, 0x00 }, { 133, 0x00 }, { 134, 0x00 }, { 135, 0x00 }, + { 136, 0x00 }, { 137, 0x00 }, { 138, 0x00 }, { 139, 0x00 }, + { 140, 0x00 }, { 141, 0x00 }, { 142, 0x00 }, { 143, 0x00 }, + { 144, 0x00 }, { 145, 0x00 }, { 146, 0x00 }, { 147, 0x00 }, + { 148, 0x00 }, { 149, 0x00 }, { 150, 0x00 }, { 151, 0x00 }, + { 152, 0x00 }, { 153, 0x00 }, { 154, 0x00 }, { 155, 0x00 }, + { 156, 0x00 }, { 157, 0x00 }, { 158, 0x00 }, { 159, 0x00 }, + { 160, 0x00 }, { 161, 0x00 }, { 162, 0x00 }, { 163, 0x00 }, + { 164, 0x00 }, { 165, 0x00 }, { 166, 0x00 }, { 167, 0x00 }, + { 168, 0x00 }, { 169, 0x00 }, { 170, 0x00 }, { 171, 0x00 }, + { 172, 0x00 }, { 173, 0x00 }, { 174, 0x00 }, { 175, 0x00 }, + { 176, 0x00 }, { 177, 0x00 }, { 178, 0x00 }, { 179, 0x00 }, + { 180, 0xff }, { 181, 0x00 }, { 182, 0x3f }, { 183, 0xff }, + { 184, 0x00 }, { 185, 0x3f }, { 186, 0x00 }, { 187, 0x80 }, + { 188, 0x80 }, { 189, 0x00 }, { 190, 0x00 }, { 191, 0x00 }, +}; + +static bool adc3xxx_volatile_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case ADC3XXX_RESET: + return true; + default: + return false; + } +} + +static const struct regmap_range_cfg adc3xxx_ranges[] = { + { + .range_min = 0, + .range_max = 2 * ADC3XXX_PAGE_SIZE, + .selector_reg = ADC3XXX_PAGE_SELECT, + .selector_mask = 0xff, + .selector_shift = 0, + .window_start = 0, + .window_len = ADC3XXX_PAGE_SIZE, + } +}; + +static const struct regmap_config adc3xxx_regmap = { + .reg_bits = 8, + .val_bits = 8, + + .reg_defaults = adc3xxx_defaults, + .num_reg_defaults = ARRAY_SIZE(adc3xxx_defaults), + + .volatile_reg = adc3xxx_volatile_reg, + + .cache_type = REGCACHE_RBTREE, + + .ranges = adc3xxx_ranges, + .num_ranges = ARRAY_SIZE(adc3xxx_ranges), + .max_register = 2 * ADC3XXX_PAGE_SIZE, +}; + +struct adc3xxx_rate_divs { + u32 mclk; + u32 rate; + u8 pll_p; + u8 pll_r; + u8 pll_j; + u16 pll_d; + u8 nadc; + u8 madc; + u8 aosr; +}; + +/* + * PLL and Clock settings. + * If p member is 0, PLL is not used. + * The order of the entries in this table have the PLL entries before + * the non-PLL entries, so that the PLL modes are preferred unless + * the PLL mode setting says otherwise. + */ +static const struct adc3xxx_rate_divs adc3xxx_divs[] = { + /* mclk, rate, p, r, j, d, nadc, madc, aosr */ + /* 8k rate */ + { 12000000, 8000, 1, 1, 7, 1680, 42, 2, 128 }, + { 12288000, 8000, 1, 1, 7, 0000, 42, 2, 128 }, + /* 11.025k rate */ + { 12000000, 11025, 1, 1, 6, 8208, 29, 2, 128 }, + /* 16k rate */ + { 12000000, 16000, 1, 1, 7, 1680, 21, 2, 128 }, + { 12288000, 16000, 1, 1, 7, 0000, 21, 2, 128 }, + /* 22.05k rate */ + { 12000000, 22050, 1, 1, 7, 560, 15, 2, 128 }, + /* 32k rate */ + { 12000000, 32000, 1, 1, 8, 1920, 12, 2, 128 }, + { 12288000, 32000, 1, 1, 8, 0000, 12, 2, 128 }, + /* 44.1k rate */ + { 12000000, 44100, 1, 1, 7, 5264, 8, 2, 128 }, + /* 48k rate */ + { 12000000, 48000, 1, 1, 7, 1680, 7, 2, 128 }, + { 12288000, 48000, 1, 1, 7, 0000, 7, 2, 128 }, + { 24576000, 48000, 1, 1, 3, 5000, 7, 2, 128 }, /* With PLL */ + { 24576000, 48000, 0, 0, 0, 0000, 2, 2, 128 }, /* Without PLL */ + /* 88.2k rate */ + { 12000000, 88200, 1, 1, 7, 5264, 4, 4, 64 }, + /* 96k rate */ + { 12000000, 96000, 1, 1, 8, 1920, 4, 4, 64 }, +}; + +static int adc3xxx_get_divs(struct device *dev, int mclk, int rate, int pll_mode) +{ + int i; + + dev_dbg(dev, "mclk = %d, rate = %d, clock mode %u\n", + mclk, rate, pll_mode); + for (i = 0; i < ARRAY_SIZE(adc3xxx_divs); i++) { + const struct adc3xxx_rate_divs *mode = &adc3xxx_divs[i]; + + /* Skip this entry if it doesn't fulfill the intended clock + * mode requirement. We consider anything besides the two + * modes below to be the same as ADC3XXX_PLL_AUTO. + */ + if ((pll_mode == ADC3XXX_PLL_BYPASS && mode->pll_p) || + (pll_mode == ADC3XXX_PLL_ENABLE && !mode->pll_p)) + continue; + + if (mode->rate == rate && mode->mclk == mclk) + return i; + } + + dev_info(dev, "Master clock rate %d and sample rate %d is not supported\n", + mclk, rate); + return -EINVAL; +} + +int adc3xxx_pll_delay(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + /* 10msec delay needed after PLL power-up to allow + * PLL and dividers to stabilize (datasheet p13). + */ + usleep_range(10000, 20000); + + return 0; +} + +static const char * const adc_softstepping_text[] = { "1 step", "2 step", "off" }; +static const SOC_ENUM_SINGLE_DECL(adc_softstepping_enum, ADC3XXX_ADC_DIGITAL, 0, + adc_softstepping_text); + +static const char * const multiplier_text[] = { "1", "2", "4", "8", "16", "32", "64", "128" }; +static const SOC_ENUM_SINGLE_DECL(left_agc_attack_mult_enum, + ADC3XXX_LEFT_CHN_AGC_4, 0, multiplier_text); +static const SOC_ENUM_SINGLE_DECL(right_agc_attack_mult_enum, + ADC3XXX_RIGHT_CHN_AGC_4, 0, multiplier_text); +static const SOC_ENUM_SINGLE_DECL(left_agc_decay_mult_enum, + ADC3XXX_LEFT_CHN_AGC_5, 0, multiplier_text); +static const SOC_ENUM_SINGLE_DECL(right_agc_decay_mult_enum, + ADC3XXX_RIGHT_CHN_AGC_5, 0, multiplier_text); + +static const char * const dither_dc_offset_text[] = { + "0mV", "15mV", "30mV", "45mV", "60mV", "75mV", "90mV", "105mV", + "-15mV", "-30mV", "-45mV", "-60mV", "-75mV", "-90mV", "-105mV" +}; +static const unsigned int dither_dc_offset_values[] = { + 0, 1, 2, 3, 4, 5, 6, 7, 9, 10, 11, 12, 13, 14, 15 +}; +static const SOC_VALUE_ENUM_DOUBLE_DECL(dither_dc_offset_enum, + ADC3XXX_DITHER_CTRL, + 4, 0, 0xf, dither_dc_offset_text, + dither_dc_offset_values); + +static const DECLARE_TLV_DB_SCALE(pga_tlv, 0, 50, 0); +static const DECLARE_TLV_DB_SCALE(adc_tlv, -1200, 50, 0); +static const DECLARE_TLV_DB_SCALE(adc_fine_tlv, -40, 10, 0); +/* AGC target: 8 values: -5.5, -8, -10, -12, -14, -17, -20, -24 dB */ +/* It would be nice to declare these in the order above, but empirically + * TLV_DB_SCALE_ITEM doesn't take lightly to the increment (second) parameter + * being negative, despite there being examples to the contrary in other + * drivers. So declare these in the order from lowest to highest, and + * set the invert flag in the SOC_DOUBLE_R_TLV declaration instead. + */ +static const DECLARE_TLV_DB_RANGE(agc_target_tlv, + 0, 0, TLV_DB_SCALE_ITEM(-2400, 0, 0), + 1, 3, TLV_DB_SCALE_ITEM(-2000, 300, 0), + 4, 6, TLV_DB_SCALE_ITEM(-1200, 200, 0), + 7, 7, TLV_DB_SCALE_ITEM(-550, 0, 0)); +/* Since the 'disabled' value (mute) is at the highest value in the dB + * range (i.e. just before -32 dB) rather than the lowest, we need to resort + * to using a TLV_DB_RANGE in order to get the mute value in the right place. + */ +static const DECLARE_TLV_DB_RANGE(agc_thresh_tlv, + 0, 30, TLV_DB_SCALE_ITEM(-9000, 200, 0), + 31, 31, TLV_DB_SCALE_ITEM(0, 0, 1)); /* disabled = mute */ +/* AGC hysteresis: 4 values: 1, 2, 4 dB, disabled (= mute) */ +static const DECLARE_TLV_DB_RANGE(agc_hysteresis_tlv, + 0, 1, TLV_DB_SCALE_ITEM(100, 100, 0), + 2, 2, TLV_DB_SCALE_ITEM(400, 0, 0), + 3, 3, TLV_DB_SCALE_ITEM(0, 0, 1)); /* disabled = mute */ +static const DECLARE_TLV_DB_SCALE(agc_max_tlv, 0, 50, 0); +/* Input attenuation: -6 dB or 0 dB */ +static const DECLARE_TLV_DB_SCALE(input_attenuation_tlv, -600, 600, 0); + +static const struct snd_kcontrol_new adc3xxx_snd_controls[] = { + SOC_DOUBLE_R_TLV("PGA Capture Volume", ADC3XXX_LEFT_APGA_CTRL, + ADC3XXX_RIGHT_APGA_CTRL, 0, 80, 0, pga_tlv), + SOC_DOUBLE("PGA Capture Switch", ADC3XXX_ADC_FGA, 7, 3, 1, 1), + SOC_DOUBLE_R("AGC Capture Switch", ADC3XXX_LEFT_CHN_AGC_1, + ADC3XXX_RIGHT_CHN_AGC_1, 7, 1, 0), + SOC_DOUBLE_R_TLV("AGC Target Level Capture Volume", ADC3XXX_LEFT_CHN_AGC_1, + ADC3XXX_RIGHT_CHN_AGC_2, 4, 0x07, 1, agc_target_tlv), + SOC_DOUBLE_R_TLV("AGC Noise Threshold Capture Volume", ADC3XXX_LEFT_CHN_AGC_2, + ADC3XXX_RIGHT_CHN_AGC_2, 1, 0x1f, 1, agc_thresh_tlv), + SOC_DOUBLE_R_TLV("AGC Hysteresis Capture Volume", ADC3XXX_LEFT_CHN_AGC_2, + ADC3XXX_RIGHT_CHN_AGC_2, 6, 3, 0, agc_hysteresis_tlv), + SOC_DOUBLE_R("AGC Clip Stepping Capture Switch", ADC3XXX_LEFT_CHN_AGC_2, + ADC3XXX_RIGHT_CHN_AGC_2, 0, 1, 0), + /* + * Oddly enough, the data sheet says the default value + * for the left/right AGC maximum gain register field + * (ADC3XXX_LEFT/RIGHT_CHN_AGC_3 bits 0..6) is 0x7f = 127 + * (verified empirically) even though this value (indeed, above + * 0x50) is specified as 'Reserved. Do not use.' in the accompanying + * table in the data sheet. + */ + SOC_DOUBLE_R_TLV("AGC Maximum Capture Volume", ADC3XXX_LEFT_CHN_AGC_3, + ADC3XXX_RIGHT_CHN_AGC_3, 0, 0x50, 0, agc_max_tlv), + SOC_DOUBLE_R("AGC Attack Time", ADC3XXX_LEFT_CHN_AGC_4, + ADC3XXX_RIGHT_CHN_AGC_4, 3, 0x1f, 0), + /* Would like to have the multipliers as LR pairs, but there is + * no SOC_ENUM_foo which accepts two values in separate registers. + */ + SOC_ENUM("AGC Left Attack Time Multiplier", left_agc_attack_mult_enum), + SOC_ENUM("AGC Right Attack Time Multiplier", right_agc_attack_mult_enum), + SOC_DOUBLE_R("AGC Decay Time", ADC3XXX_LEFT_CHN_AGC_5, + ADC3XXX_RIGHT_CHN_AGC_5, 3, 0x1f, 0), + SOC_ENUM("AGC Left Decay Time Multiplier", left_agc_decay_mult_enum), + SOC_ENUM("AGC Right Decay Time Multiplier", right_agc_decay_mult_enum), + SOC_DOUBLE_R("AGC Noise Debounce", ADC3XXX_LEFT_CHN_AGC_6, + ADC3XXX_RIGHT_CHN_AGC_6, 0, 0x1f, 0), + SOC_DOUBLE_R("AGC Signal Debounce", ADC3XXX_LEFT_CHN_AGC_7, + ADC3XXX_RIGHT_CHN_AGC_7, 0, 0x0f, 0), + /* Read only register */ + SOC_DOUBLE_R_S_TLV("AGC Applied Capture Volume", ADC3XXX_LEFT_AGC_GAIN, + ADC3XXX_RIGHT_AGC_GAIN, 0, -24, 40, 6, 0, adc_tlv), + /* ADC soft stepping */ + SOC_ENUM("ADC Soft Stepping", adc_softstepping_enum), + /* Left/Right Input attenuation */ + SOC_SINGLE_TLV("Left Input IN_1L Capture Volume", + ADC3XXX_LEFT_PGA_SEL_1, 0, 1, 1, input_attenuation_tlv), + SOC_SINGLE_TLV("Left Input IN_2L Capture Volume", + ADC3XXX_LEFT_PGA_SEL_1, 2, 1, 1, input_attenuation_tlv), + SOC_SINGLE_TLV("Left Input IN_3L Capture Volume", + ADC3XXX_LEFT_PGA_SEL_1, 4, 1, 1, input_attenuation_tlv), + SOC_SINGLE_TLV("Left Input IN_1R Capture Volume", + ADC3XXX_LEFT_PGA_SEL_2, 0, 1, 1, input_attenuation_tlv), + SOC_SINGLE_TLV("Left Input DIF_2L_3L Capture Volume", + ADC3XXX_LEFT_PGA_SEL_1, 6, 1, 1, input_attenuation_tlv), + SOC_SINGLE_TLV("Left Input DIF_1L_1R Capture Volume", + ADC3XXX_LEFT_PGA_SEL_2, 4, 1, 1, input_attenuation_tlv), + SOC_SINGLE_TLV("Left Input DIF_2R_3R Capture Volume", + ADC3XXX_LEFT_PGA_SEL_2, 2, 1, 1, input_attenuation_tlv), + SOC_SINGLE_TLV("Right Input IN_1R Capture Volume", + ADC3XXX_RIGHT_PGA_SEL_1, 0, 1, 1, input_attenuation_tlv), + SOC_SINGLE_TLV("Right Input IN_2R Capture Volume", + ADC3XXX_RIGHT_PGA_SEL_1, 2, 1, 1, input_attenuation_tlv), + SOC_SINGLE_TLV("Right Input IN_3R Capture Volume", + ADC3XXX_RIGHT_PGA_SEL_1, 4, 1, 1, input_attenuation_tlv), + SOC_SINGLE_TLV("Right Input IN_1L Capture Volume", + ADC3XXX_RIGHT_PGA_SEL_2, 0, 1, 1, input_attenuation_tlv), + SOC_SINGLE_TLV("Right Input DIF_2R_3R Capture Volume", + ADC3XXX_RIGHT_PGA_SEL_1, 6, 1, 1, input_attenuation_tlv), + SOC_SINGLE_TLV("Right Input DIF_1L_1R Capture Volume", + ADC3XXX_RIGHT_PGA_SEL_2, 4, 1, 1, input_attenuation_tlv), + SOC_SINGLE_TLV("Right Input DIF_2L_3L Capture Volume", + ADC3XXX_RIGHT_PGA_SEL_2, 2, 1, 1, input_attenuation_tlv), + SOC_DOUBLE_R_S_TLV("ADC Volume Control Capture Volume", ADC3XXX_LADC_VOL, + ADC3XXX_RADC_VOL, 0, -24, 40, 6, 0, adc_tlv), + /* Empirically, the following doesn't work the way it's supposed + * to. Values 0, -0.1, -0.2 and -0.3 dB result in the same level, and + * -0.4 dB drops about 0.12 dB on a specific chip. + */ + SOC_DOUBLE_TLV("ADC Fine Volume Control Capture Volume", ADC3XXX_ADC_FGA, + 4, 0, 4, 1, adc_fine_tlv), + SOC_SINGLE("Left ADC Unselected CM Bias Capture Switch", + ADC3XXX_LEFT_PGA_SEL_2, 6, 1, 0), + SOC_SINGLE("Right ADC Unselected CM Bias Capture Switch", + ADC3XXX_RIGHT_PGA_SEL_2, 6, 1, 0), + SOC_ENUM("Dither Control DC Offset", dither_dc_offset_enum), +}; + +/* Left input selection, Single Ended inputs and Differential inputs */ +static const struct snd_kcontrol_new left_input_mixer_controls[] = { + SOC_DAPM_SINGLE("IN_1L Capture Switch", + ADC3XXX_LEFT_PGA_SEL_1, 1, 0x1, 1), + SOC_DAPM_SINGLE("IN_2L Capture Switch", + ADC3XXX_LEFT_PGA_SEL_1, 3, 0x1, 1), + SOC_DAPM_SINGLE("IN_3L Capture Switch", + ADC3XXX_LEFT_PGA_SEL_1, 5, 0x1, 1), + SOC_DAPM_SINGLE("DIF_2L_3L Capture Switch", + ADC3XXX_LEFT_PGA_SEL_1, 7, 0x1, 1), + SOC_DAPM_SINGLE("DIF_1L_1R Capture Switch", + ADC3XXX_LEFT_PGA_SEL_2, 5, 0x1, 1), + SOC_DAPM_SINGLE("DIF_2R_3R Capture Switch", + ADC3XXX_LEFT_PGA_SEL_2, 3, 0x1, 1), + SOC_DAPM_SINGLE("IN_1R Capture Switch", + ADC3XXX_LEFT_PGA_SEL_2, 1, 0x1, 1), +}; + +/* Right input selection, Single Ended inputs and Differential inputs */ +static const struct snd_kcontrol_new right_input_mixer_controls[] = { + SOC_DAPM_SINGLE("IN_1R Capture Switch", + ADC3XXX_RIGHT_PGA_SEL_1, 1, 0x1, 1), + SOC_DAPM_SINGLE("IN_2R Capture Switch", + ADC3XXX_RIGHT_PGA_SEL_1, 3, 0x1, 1), + SOC_DAPM_SINGLE("IN_3R Capture Switch", + ADC3XXX_RIGHT_PGA_SEL_1, 5, 0x1, 1), + SOC_DAPM_SINGLE("DIF_2R_3R Capture Switch", + ADC3XXX_RIGHT_PGA_SEL_1, 7, 0x1, 1), + SOC_DAPM_SINGLE("DIF_1L_1R Capture Switch", + ADC3XXX_RIGHT_PGA_SEL_2, 5, 0x1, 1), + SOC_DAPM_SINGLE("DIF_2L_3L Capture Switch", + ADC3XXX_RIGHT_PGA_SEL_2, 3, 0x1, 1), + SOC_DAPM_SINGLE("IN_1L Capture Switch", + ADC3XXX_RIGHT_PGA_SEL_2, 1, 0x1, 1), +}; + +/* Left Digital Mic input for left ADC */ +static const struct snd_kcontrol_new left_input_dmic_controls[] = { + SOC_DAPM_SINGLE("Left ADC Capture Switch", + ADC3XXX_ADC_DIGITAL, 3, 0x1, 0), +}; + +/* Right Digital Mic input for Right ADC */ +static const struct snd_kcontrol_new right_input_dmic_controls[] = { + SOC_DAPM_SINGLE("Right ADC Capture Switch", + ADC3XXX_ADC_DIGITAL, 2, 0x1, 0), +}; + +/* DAPM widgets */ +static const struct snd_soc_dapm_widget adc3xxx_dapm_widgets[] = { + + /* Left Input Selection */ + SND_SOC_DAPM_MIXER("Left Input", SND_SOC_NOPM, 0, 0, + &left_input_mixer_controls[0], + ARRAY_SIZE(left_input_mixer_controls)), + /* Right Input Selection */ + SND_SOC_DAPM_MIXER("Right Input", SND_SOC_NOPM, 0, 0, + &right_input_mixer_controls[0], + ARRAY_SIZE(right_input_mixer_controls)), + /* PGA selection */ + SND_SOC_DAPM_PGA("Left PGA", ADC3XXX_LEFT_APGA_CTRL, 7, 1, NULL, 0), + SND_SOC_DAPM_PGA("Right PGA", ADC3XXX_RIGHT_APGA_CTRL, 7, 1, NULL, 0), + + /* Digital Microphone Input Control for Left/Right ADC */ + SND_SOC_DAPM_MIXER("Left DMic Input", SND_SOC_NOPM, 0, 0, + &left_input_dmic_controls[0], + ARRAY_SIZE(left_input_dmic_controls)), + SND_SOC_DAPM_MIXER("Right DMic Input", SND_SOC_NOPM, 0, 0, + &right_input_dmic_controls[0], + ARRAY_SIZE(right_input_dmic_controls)), + + /* Left/Right ADC */ + SND_SOC_DAPM_ADC("Left ADC", "Left Capture", ADC3XXX_ADC_DIGITAL, 7, 0), + SND_SOC_DAPM_ADC("Right ADC", "Right Capture", ADC3XXX_ADC_DIGITAL, 6, 0), + + /* Inputs */ + SND_SOC_DAPM_INPUT("IN_1L"), + SND_SOC_DAPM_INPUT("IN_1R"), + SND_SOC_DAPM_INPUT("IN_2L"), + SND_SOC_DAPM_INPUT("IN_2R"), + SND_SOC_DAPM_INPUT("IN_3L"), + SND_SOC_DAPM_INPUT("IN_3R"), + SND_SOC_DAPM_INPUT("DIFL_1L_1R"), + SND_SOC_DAPM_INPUT("DIFL_2L_3L"), + SND_SOC_DAPM_INPUT("DIFL_2R_3R"), + SND_SOC_DAPM_INPUT("DIFR_1L_1R"), + SND_SOC_DAPM_INPUT("DIFR_2L_3L"), + SND_SOC_DAPM_INPUT("DIFR_2R_3R"), + SND_SOC_DAPM_INPUT("DMic_L"), + SND_SOC_DAPM_INPUT("DMic_R"), + + /* Digital audio interface output */ + SND_SOC_DAPM_AIF_OUT("AIF_OUT", "Capture", 0, SND_SOC_NOPM, 0, 0), + + /* Clocks */ + SND_SOC_DAPM_SUPPLY("PLL_CLK", ADC3XXX_PLL_PROG_PR, ADC3XXX_ENABLE_PLL_SHIFT, + 0, adc3xxx_pll_delay, SND_SOC_DAPM_POST_PMU), + + SND_SOC_DAPM_SUPPLY("ADC_CLK", ADC3XXX_ADC_NADC, ADC3XXX_ENABLE_NADC_SHIFT, + 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("ADC_MOD_CLK", ADC3XXX_ADC_MADC, ADC3XXX_ENABLE_MADC_SHIFT, + 0, NULL, 0), + + /* This refers to the generated BCLK in master mode. */ + SND_SOC_DAPM_SUPPLY("BCLK", ADC3XXX_BCLK_N_DIV, ADC3XXX_ENABLE_BCLK_SHIFT, + 0, NULL, 0), +}; + +static const struct snd_soc_dapm_route adc3xxx_intercon[] = { + /* Left input selection from switches */ + { "Left Input", "IN_1L Capture Switch", "IN_1L" }, + { "Left Input", "IN_2L Capture Switch", "IN_2L" }, + { "Left Input", "IN_3L Capture Switch", "IN_3L" }, + { "Left Input", "DIF_2L_3L Capture Switch", "DIFL_2L_3L" }, + { "Left Input", "DIF_1L_1R Capture Switch", "DIFL_1L_1R" }, + { "Left Input", "DIF_2R_3R Capture Switch", "DIFL_2R_3R" }, + { "Left Input", "IN_1R Capture Switch", "IN_1R" }, + + /* Left input selection to left PGA */ + { "Left PGA", NULL, "Left Input" }, + + /* Left PGA to left ADC */ + { "Left ADC", NULL, "Left PGA" }, + + /* Right input selection from switches */ + { "Right Input", "IN_1R Capture Switch", "IN_1R" }, + { "Right Input", "IN_2R Capture Switch", "IN_2R" }, + { "Right Input", "IN_3R Capture Switch", "IN_3R" }, + { "Right Input", "DIF_2R_3R Capture Switch", "DIFR_2R_3R" }, + { "Right Input", "DIF_1L_1R Capture Switch", "DIFR_1L_1R" }, + { "Right Input", "DIF_2L_3L Capture Switch", "DIFR_2L_3L" }, + { "Right Input", "IN_1L Capture Switch", "IN_1L" }, + + /* Right input selection to right PGA */ + { "Right PGA", NULL, "Right Input" }, + + /* Right PGA to right ADC */ + { "Right ADC", NULL, "Right PGA" }, + + /* Left DMic Input selection from switch */ + { "Left DMic Input", "Left ADC Capture Switch", "DMic_L" }, + + /* Left DMic to left ADC */ + { "Left ADC", NULL, "Left DMic Input" }, + + /* Right DMic Input selection from switch */ + { "Right DMic Input", "Right ADC Capture Switch", "DMic_R" }, + + /* Right DMic to right ADC */ + { "Right ADC", NULL, "Right DMic Input" }, + + /* ADC to AIF output */ + { "AIF_OUT", NULL, "Left ADC" }, + { "AIF_OUT", NULL, "Right ADC" }, + + /* Clocking */ + { "ADC_MOD_CLK", NULL, "ADC_CLK" }, + { "Left ADC", NULL, "ADC_MOD_CLK" }, + { "Right ADC", NULL, "ADC_MOD_CLK" }, + + { "BCLK", NULL, "ADC_CLK" }, +}; + +static const struct snd_soc_dapm_route adc3xxx_pll_intercon[] = { + { "ADC_CLK", NULL, "PLL_CLK" }, +}; + +static const struct snd_soc_dapm_route adc3xxx_bclk_out_intercon[] = { + { "AIF_OUT", NULL, "BCLK" } +}; + +#ifdef CONFIG_GPIOLIB +static int adc3xxx_gpio_request(struct gpio_chip *chip, unsigned int offset) +{ + struct adc3xxx *adc3xxx = gpiochip_get_data(chip); + + if (offset >= ADC3XXX_GPIOS_MAX) + return -EINVAL; + + /* GPIO1 is offset 0, GPIO2 is offset 1 */ + /* We check here that the GPIO pins are either not configured in the + * DT, or that they purposely are set as outputs. + * (Input mode not yet implemented). + */ + if (adc3xxx->gpio_cfg[offset] != 0 && + adc3xxx->gpio_cfg[offset] != ADC3XXX_GPIO_GPO + 1) + return -EINVAL; + + return 0; +} + +static int adc3xxx_gpio_direction_out(struct gpio_chip *chip, + unsigned int offset, int value) +{ + struct adc3xxx *adc3xxx = gpiochip_get_data(chip); + + /* Set GPIO output function. */ + return regmap_update_bits(adc3xxx->regmap, + adc3xxx_gpio_ctrl_reg[offset], + ADC3XXX_GPIO_CTRL_CFG_MASK | + ADC3XXX_GPIO_CTRL_OUTPUT_CTRL_MASK, + ADC3XXX_GPIO_GPO << ADC3XXX_GPIO_CTRL_CFG_SHIFT | + !!value << ADC3XXX_GPIO_CTRL_OUTPUT_CTRL_SHIFT); +} + +/* With only GPIO outputs configured, we never get the .direction_out call, + * so we set the output mode and output value in the same call. Hence + * .set in practice does the same thing as .direction_out . + */ +static void adc3xxx_gpio_set(struct gpio_chip *chip, unsigned int offset, + int value) +{ + (void) adc3xxx_gpio_direction_out(chip, offset, value); +} + +/* Even though we only support GPIO output for now, some GPIO clients + * want to read the current pin state using the .get callback. + */ +static int adc3xxx_gpio_get(struct gpio_chip *chip, unsigned int offset) +{ + struct adc3xxx *adc3xxx = gpiochip_get_data(chip); + unsigned int regval; + int ret; + + /* We only allow output pins, so just read the value set in the output + * pin register field. + */ + ret = regmap_read(adc3xxx->regmap, adc3xxx_gpio_ctrl_reg[offset], &regval); + if (ret) + return ret; + return !!(regval & ADC3XXX_GPIO_CTRL_OUTPUT_CTRL_MASK); +} + +static const struct gpio_chip adc3xxx_gpio_chip = { + .label = "adc3xxx", + .owner = THIS_MODULE, + .request = adc3xxx_gpio_request, + .direction_output = adc3xxx_gpio_direction_out, + .set = adc3xxx_gpio_set, + .get = adc3xxx_gpio_get, + .can_sleep = 1, +}; + +static void adc3xxx_free_gpio(struct adc3xxx *adc3xxx) +{ + gpiochip_remove(&adc3xxx->gpio_chip); +} + +#endif + +static void adc3xxx_init_gpio(struct adc3xxx *adc3xxx) +{ + int gpio, micbias; +#ifdef CONFIG_GPIOLIB + int ret; + + adc3xxx->gpio_chip = adc3xxx_gpio_chip; + adc3xxx->gpio_chip.ngpio = ADC3XXX_GPIOS_MAX; + adc3xxx->gpio_chip.parent = adc3xxx->dev; + adc3xxx->gpio_chip.base = -1; + + ret = gpiochip_add_data(&adc3xxx->gpio_chip, adc3xxx); + if (ret) + dev_err(adc3xxx->dev, "Failed to add gpios: %d\n", ret); +#endif + + /* Set up potential GPIO configuration from the devicetree. + * This allows us to set up things which are not software + * controllable GPIOs, such as PDM microphone I/O, + */ + for (gpio = 0; gpio < ADC3XXX_GPIOS_MAX; gpio++) { + unsigned int cfg = adc3xxx->gpio_cfg[gpio]; + + if (cfg) { + cfg--; /* actual value to use is stored +1 */ + regmap_update_bits(adc3xxx->regmap, + adc3xxx_gpio_ctrl_reg[gpio], + ADC3XXX_GPIO_CTRL_CFG_MASK, + cfg << ADC3XXX_GPIO_CTRL_CFG_SHIFT); + } + } + + /* Set up micbias voltage */ + for (micbias = 0; micbias < ADC3XXX_MICBIAS_PINS; micbias++) { + unsigned int vg = adc3xxx->micbias_vg[micbias]; + + regmap_update_bits(adc3xxx->regmap, + ADC3XXX_MICBIAS_CTRL, + ADC3XXX_MICBIAS_MASK << adc3xxx_micbias_shift[micbias], + vg << adc3xxx_micbias_shift[micbias]); + } +} + +static int adc3xxx_parse_dt_gpio(struct adc3xxx *adc3xxx, + const char *propname, unsigned int *cfg) +{ + struct device *dev = adc3xxx->dev; + struct device_node *np = dev->of_node; + unsigned int val; + + if (!of_property_read_u32(np, propname, &val)) { + if (val & ~15 || val == 7 || val >= 11) { + dev_err(dev, "Invalid property value for '%s'\n", propname); + return -EINVAL; + } + if (val == ADC3XXX_GPIO_GPI) + dev_warn(dev, "GPIO Input read not yet implemented\n"); + *cfg = val + 1; /* 0 => not set up, all others shifted +1 */ + } + return 0; +} + +static int adc3xxx_parse_dt_micbias(struct adc3xxx *adc3xxx, + const char *propname, unsigned int *vg) +{ + struct device *dev = adc3xxx->dev; + struct device_node *np = dev->of_node; + unsigned int val; + + if (!of_property_read_u32(np, propname, &val)) { + if (val >= ADC3XXX_MICBIAS_AVDD) { + dev_err(dev, "Invalid property value for '%s'\n", propname); + return -EINVAL; + } + *vg = val; + } + return 0; +} + +static int adc3xxx_parse_pll_mode(uint32_t val, unsigned int *pll_mode) +{ + if (val != ADC3XXX_PLL_ENABLE && val != ADC3XXX_PLL_BYPASS && + val != ADC3XXX_PLL_AUTO) + return -EINVAL; + + *pll_mode = val; + + return 0; +} + +static void adc3xxx_setup_pll(struct snd_soc_component *component, + int div_entry) +{ + int i = div_entry; + + /* P & R values */ + snd_soc_component_write(component, ADC3XXX_PLL_PROG_PR, + (adc3xxx_divs[i].pll_p << ADC3XXX_PLLP_SHIFT) | + (adc3xxx_divs[i].pll_r << ADC3XXX_PLLR_SHIFT)); + /* J value */ + snd_soc_component_write(component, ADC3XXX_PLL_PROG_J, + adc3xxx_divs[i].pll_j & ADC3XXX_PLLJ_MASK); + /* D value */ + snd_soc_component_write(component, ADC3XXX_PLL_PROG_D_LSB, + adc3xxx_divs[i].pll_d & ADC3XXX_PLLD_LSB_MASK); + snd_soc_component_write(component, ADC3XXX_PLL_PROG_D_MSB, + (adc3xxx_divs[i].pll_d >> 8) & ADC3XXX_PLLD_MSB_MASK); +} + +static int adc3xxx_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct snd_soc_component *component = dai->component; + struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(dai->component); + struct adc3xxx *adc3xxx = snd_soc_component_get_drvdata(component); + int i, width = 16; + u8 iface_len, bdiv; + + i = adc3xxx_get_divs(component->dev, adc3xxx->sysclk, + params_rate(params), adc3xxx->pll_mode); + + if (i < 0) + return i; + + /* select data word length */ + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_S16_LE: + iface_len = ADC3XXX_IFACE_16BITS; + width = 16; + break; + case SNDRV_PCM_FORMAT_S20_3LE: + iface_len = ADC3XXX_IFACE_20BITS; + width = 20; + break; + case SNDRV_PCM_FORMAT_S24_LE: + iface_len = ADC3XXX_IFACE_24BITS; + width = 24; + break; + case SNDRV_PCM_FORMAT_S32_LE: + iface_len = ADC3XXX_IFACE_32BITS; + width = 32; + break; + default: + dev_err(component->dev, "Unsupported serial data format\n"); + return -EINVAL; + } + snd_soc_component_update_bits(component, ADC3XXX_INTERFACE_CTRL_1, + ADC3XXX_WLENGTH_MASK, iface_len); + if (adc3xxx_divs[i].pll_p) { /* If PLL used for this mode */ + adc3xxx_setup_pll(component, i); + snd_soc_component_write(component, ADC3XXX_CLKGEN_MUX, ADC3XXX_USE_PLL); + if (!adc3xxx->use_pll) { + snd_soc_dapm_add_routes(dapm, adc3xxx_pll_intercon, + ARRAY_SIZE(adc3xxx_pll_intercon)); + adc3xxx->use_pll = 1; + } + } else { + snd_soc_component_write(component, ADC3XXX_CLKGEN_MUX, ADC3XXX_NO_PLL); + if (adc3xxx->use_pll) { + snd_soc_dapm_del_routes(dapm, adc3xxx_pll_intercon, + ARRAY_SIZE(adc3xxx_pll_intercon)); + adc3xxx->use_pll = 0; + } + } + + /* NADC */ + snd_soc_component_update_bits(component, ADC3XXX_ADC_NADC, + ADC3XXX_NADC_MASK, adc3xxx_divs[i].nadc); + /* MADC */ + snd_soc_component_update_bits(component, ADC3XXX_ADC_MADC, + ADC3XXX_MADC_MASK, adc3xxx_divs[i].madc); + /* AOSR */ + snd_soc_component_update_bits(component, ADC3XXX_ADC_AOSR, + ADC3XXX_AOSR_MASK, adc3xxx_divs[i].aosr); + /* BDIV N Value */ + /* BCLK is (by default) set up to be derived from ADC_CLK */ + bdiv = (adc3xxx_divs[i].aosr * adc3xxx_divs[i].madc) / (2 * width); + snd_soc_component_update_bits(component, ADC3XXX_BCLK_N_DIV, + ADC3XXX_BDIV_MASK, bdiv); + + return 0; +} + +static const char * const adc3xxx_pll_mode_text(int pll_mode) +{ + switch (pll_mode) { + case ADC3XXX_PLL_AUTO: + return "PLL auto"; + case ADC3XXX_PLL_ENABLE: + return "PLL enable"; + case ADC3XXX_PLL_BYPASS: + return "PLL bypass"; + default: + break; + } + + return "PLL unknown"; +} + +static int adc3xxx_set_dai_sysclk(struct snd_soc_dai *codec_dai, + int clk_id, unsigned int freq, int dir) +{ + struct snd_soc_component *component = codec_dai->component; + struct adc3xxx *adc3xxx = snd_soc_component_get_drvdata(component); + int ret; + + ret = adc3xxx_parse_pll_mode(clk_id, &adc3xxx->pll_mode); + if (ret < 0) + return ret; + + adc3xxx->sysclk = freq; + dev_dbg(component->dev, "Set sysclk to %u Hz, %s\n", + freq, adc3xxx_pll_mode_text(adc3xxx->pll_mode)); + return 0; +} + +static int adc3xxx_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) +{ + struct snd_soc_component *component = codec_dai->component; + struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component); + struct adc3xxx *adc3xxx = snd_soc_component_get_drvdata(component); + u8 clkdir = 0, format = 0; + int master = 0; + + /* set master/slave audio interface */ + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBP_CFP: + master = 1; + clkdir = ADC3XXX_BCLK_MASTER | ADC3XXX_WCLK_MASTER; + break; + case SND_SOC_DAIFMT_CBC_CFC: + master = 0; + break; + default: + dev_err(component->dev, "Invalid DAI clock setup\n"); + return -EINVAL; + } + + /* + * match both interface format and signal polarities since they + * are fixed + */ + switch (fmt & (SND_SOC_DAIFMT_FORMAT_MASK | SND_SOC_DAIFMT_INV_MASK)) { + case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF: + format = ADC3XXX_FORMAT_I2S; + break; + case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_IB_NF: + format = ADC3XXX_FORMAT_DSP; + break; + case SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_IB_NF: + format = ADC3XXX_FORMAT_DSP; + break; + case SND_SOC_DAIFMT_RIGHT_J | SND_SOC_DAIFMT_NB_NF: + format = ADC3XXX_FORMAT_RJF; + break; + case SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_NB_NF: + format = ADC3XXX_FORMAT_LJF; + break; + default: + dev_err(component->dev, "Invalid DAI format\n"); + return -EINVAL; + } + + /* Add/del route enabling BCLK output as applicable */ + if (master && !adc3xxx->master) + snd_soc_dapm_add_routes(dapm, adc3xxx_bclk_out_intercon, + ARRAY_SIZE(adc3xxx_bclk_out_intercon)); + else if (!master && adc3xxx->master) + snd_soc_dapm_del_routes(dapm, adc3xxx_bclk_out_intercon, + ARRAY_SIZE(adc3xxx_bclk_out_intercon)); + adc3xxx->master = master; + + /* set clock direction and format */ + return snd_soc_component_update_bits(component, + ADC3XXX_INTERFACE_CTRL_1, + ADC3XXX_CLKDIR_MASK | ADC3XXX_FORMAT_MASK, + clkdir | format); +} + +static struct snd_soc_dai_ops adc3xxx_dai_ops = { + .hw_params = adc3xxx_hw_params, + .set_sysclk = adc3xxx_set_dai_sysclk, + .set_fmt = adc3xxx_set_dai_fmt, +}; + +struct snd_soc_dai_driver adc3xxx_dai = { + .name = "tlv320adc3xxx-hifi", + .capture = { + .stream_name = "Capture", + .channels_min = 1, + .channels_max = 2, + .rates = ADC3XXX_RATES, + .formats = ADC3XXX_FORMATS, + }, + .ops = &adc3xxx_dai_ops, +}; + +static const struct snd_soc_component_driver soc_component_dev_adc3xxx = { + .controls = adc3xxx_snd_controls, + .num_controls = ARRAY_SIZE(adc3xxx_snd_controls), + .dapm_widgets = adc3xxx_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(adc3xxx_dapm_widgets), + .dapm_routes = adc3xxx_intercon, + .num_dapm_routes = ARRAY_SIZE(adc3xxx_intercon), +}; + +static int adc3xxx_i2c_probe(struct i2c_client *i2c, + const struct i2c_device_id *id) +{ + struct device *dev = &i2c->dev; + struct device_node *np = dev->of_node; + struct adc3xxx *adc3xxx = NULL; + enum of_gpio_flags flags; + int ret; + + adc3xxx = devm_kzalloc(dev, sizeof(struct adc3xxx), GFP_KERNEL); + if (!adc3xxx) + return -ENOMEM; + adc3xxx->dev = dev; + + adc3xxx->mclk = devm_clk_get(dev, NULL); + if (IS_ERR(adc3xxx->mclk)) { + /* + * The chip itself supports running off the BCLK either + * directly or via the PLL, but the driver does not (yet), so + * having a specified mclk is required. Otherwise, we could + * use the lack of a clocks property to indicate when BCLK is + * intended as the clock source. + */ + return PTR_ERR(adc3xxx->mclk); + } else if (adc3xxx->mclk) { + ret = clk_prepare_enable(adc3xxx->mclk); + if (ret < 0) + return ret; + dev_dbg(dev, "Enabled MCLK, freq %lu Hz\n", clk_get_rate(adc3xxx->mclk)); + } + + adc3xxx_parse_dt_gpio(adc3xxx, "ti,dmdin-gpio1", &adc3xxx->gpio_cfg[0]); + adc3xxx_parse_dt_gpio(adc3xxx, "ti,dmclk-gpio2", &adc3xxx->gpio_cfg[1]); + adc3xxx_parse_dt_micbias(adc3xxx, "ti,micbias1-vg", &adc3xxx->micbias_vg[0]); + adc3xxx_parse_dt_micbias(adc3xxx, "ti,micbias2-vg", &adc3xxx->micbias_vg[1]); + + adc3xxx->regmap = devm_regmap_init_i2c(i2c, &adc3xxx_regmap); + if (IS_ERR(adc3xxx->regmap)) { + ret = PTR_ERR(adc3xxx->regmap); + return ret; + } + + i2c_set_clientdata(i2c, adc3xxx); + + adc3xxx->rst_pin = of_get_named_gpio_flags(np, "reset-gpios", 0, &flags); + if (adc3xxx->rst_pin < 0 || !gpio_is_valid(adc3xxx->rst_pin)) + return -ENXIO; + + adc3xxx->rst_active = !(flags & OF_GPIO_ACTIVE_LOW); + adc3xxx->type = id->driver_data; + + ret = devm_gpio_request(dev, adc3xxx->rst_pin, "adc3xxx reset"); + if (ret < 0) { + dev_err(dev, "Failed to request rst_pin: %d\n", ret); + return ret; + } + + /* Reset codec chip */ + gpio_direction_output(adc3xxx->rst_pin, adc3xxx->rst_active); + usleep_range(2000, 100000); /* Requirement: > 10 ns (datasheet p13) */ + gpio_direction_output(adc3xxx->rst_pin, !adc3xxx->rst_active); + + /* Potentially set up pins used as GPIOs */ + adc3xxx_init_gpio(adc3xxx); + + ret = snd_soc_register_component(dev, + &soc_component_dev_adc3xxx, &adc3xxx_dai, 1); + if (ret < 0) + dev_err(dev, "Failed to register codec: %d\n", ret); + + return ret; +} + +static int __exit adc3xxx_i2c_remove(struct i2c_client *client) +{ + struct adc3xxx *adc3xxx = i2c_get_clientdata(client); + + if (adc3xxx->mclk) + clk_disable_unprepare(adc3xxx->mclk); +#ifdef CONFIG_GPIOLIB + adc3xxx_free_gpio(adc3xxx); +#endif + snd_soc_unregister_component(&client->dev); + return 0; +} + +static const struct of_device_id tlv320adc3xxx_of_match[] = { + { .compatible = "ti,tlv320adc3001", }, + { .compatible = "ti,tlv320adc3101", }, + {}, +}; +MODULE_DEVICE_TABLE(of, tlv320adc3xxx_of_match); + +static const struct i2c_device_id adc3xxx_i2c_id[] = { + { "tlv320adc3001", ADC3001 }, + { "tlv320adc3101", ADC3101 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, adc3xxx_i2c_id); + +static struct i2c_driver adc3xxx_i2c_driver = { + .driver = { + .name = "tlv320adc3xxx-codec", + .of_match_table = tlv320adc3xxx_of_match, + }, + .probe = adc3xxx_i2c_probe, + .remove = adc3xxx_i2c_remove, + .id_table = adc3xxx_i2c_id, +}; + +module_i2c_driver(adc3xxx_i2c_driver); + +MODULE_DESCRIPTION("ASoC TLV320ADC3xxx codec driver"); +MODULE_AUTHOR(" shahina.s(a)mistralsolutions.com "); +MODULE_LICENSE("GPL v2"); diff --git a/sound/soc/codecs/tlv320adc3xxx.h b/sound/soc/codecs/tlv320adc3xxx.h new file mode 100644 index 000000000000..82f82c3e7bc5 --- /dev/null +++ b/sound/soc/codecs/tlv320adc3xxx.h @@ -0,0 +1,379 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Based on sound/soc/codecs/tlv320aic3x.c by Vladimir Barinov + * + * History: + * + * Author: "Shahina Shaik" < shahina.s(a)mistralsolutions.com > + * Copyright: (C) 2010 Mistral Solutions Pvt Ltd. + * + * Author: Dongge wu <dgwu(a)ambarella.com> + * 2015/10/28 - [Dongge wu] Created file + * Copyright (C) 2014-2018, Ambarella, Inc. + * + * Author: Ricard Wanderlof <ricardw(a)axis.com> + * 2020/11/05: Fixing driver for Linux 4.14: more clocking modes, etc. + * 2021/09/03: Porting to Linux 5.4, with enhancements. + * Copyright (C) 2021 Axis Communications AB + * + */ + +#ifndef _ADC3XXX_H +#define _ADC3XXX_H + +/* 8 bit mask value */ +#define ADC3XXX_8BITS_MASK 0xFF + +#define ADC3XXX_PAGE_SIZE 128 +#define ADC3XXX_REG(page, reg) ((page * ADC3XXX_PAGE_SIZE) + reg) + +#define ADC3XXX_MICBIAS_PINS 2 + +/* Number of GPIO pins exposed via the gpiolib interface */ +#define ADC3XXX_GPIOS_MAX 2 + +/* + * PLL modes, to be used for clk_id for set_sysclk callback. + * + * The default behavior (AUTO) is to take the first matching entry in the clock + * table, which is intended to be the PLL based one if there is more than one. + * + * Setting the clock source using simple-card (clocks or + * system-clock-frequency property) sets clk_id = 0 = ADC3XXX_PLL_AUTO. + */ +#define ADC3XXX_PLL_AUTO 0 /* Use first available mode */ +#define ADC3XXX_PLL_ENABLE 1 /* Use PLL for clock generation */ +#define ADC3XXX_PLL_BYPASS 2 /* Don't use PLL for clock generation */ + + +/****************************************************************************/ +/* Page 0 Registers */ +/****************************************************************************/ + +/* Page select register */ +#define ADC3XXX_PAGE_SELECT ADC3XXX_REG(0, 0) +/* Software reset register */ +#define ADC3XXX_RESET ADC3XXX_REG(0, 1) + +/* 2-3 Reserved */ + +/* PLL programming register B */ +#define ADC3XXX_CLKGEN_MUX ADC3XXX_REG(0, 4) +/* PLL P and R-Val */ +#define ADC3XXX_PLL_PROG_PR ADC3XXX_REG(0, 5) +/* PLL J-Val */ +#define ADC3XXX_PLL_PROG_J ADC3XXX_REG(0, 6) +/* PLL D-Val MSB */ +#define ADC3XXX_PLL_PROG_D_MSB ADC3XXX_REG(0, 7) +/* PLL D-Val LSB */ +#define ADC3XXX_PLL_PROG_D_LSB ADC3XXX_REG(0, 8) + +/* 9-17 Reserved */ + +/* ADC NADC */ +#define ADC3XXX_ADC_NADC ADC3XXX_REG(0, 18) +/* ADC MADC */ +#define ADC3XXX_ADC_MADC ADC3XXX_REG(0, 19) +/* ADC AOSR */ +#define ADC3XXX_ADC_AOSR ADC3XXX_REG(0, 20) +/* ADC IADC */ +#define ADC3XXX_ADC_IADC ADC3XXX_REG(0, 21) + +/* 23-24 Reserved */ + +/* CLKOUT MUX */ +#define ADC3XXX_CLKOUT_MUX ADC3XXX_REG(0, 25) +/* CLOCKOUT M divider value */ +#define ADC3XXX_CLKOUT_M_DIV ADC3XXX_REG(0, 26) +/*Audio Interface Setting Register 1*/ +#define ADC3XXX_INTERFACE_CTRL_1 ADC3XXX_REG(0, 27) +/* Data Slot Offset (Ch_Offset_1) */ +#define ADC3XXX_CH_OFFSET_1 ADC3XXX_REG(0, 28) +/* ADC interface control 2 */ +#define ADC3XXX_INTERFACE_CTRL_2 ADC3XXX_REG(0, 29) +/* BCLK N Divider */ +#define ADC3XXX_BCLK_N_DIV ADC3XXX_REG(0, 30) +/* Secondary audio interface control 1 */ +#define ADC3XXX_INTERFACE_CTRL_3 ADC3XXX_REG(0, 31) +/* Secondary audio interface control 2 */ +#define ADC3XXX_INTERFACE_CTRL_4 ADC3XXX_REG(0, 32) +/* Secondary audio interface control 3 */ +#define ADC3XXX_INTERFACE_CTRL_5 ADC3XXX_REG(0, 33) +/* I2S sync */ +#define ADC3XXX_I2S_SYNC ADC3XXX_REG(0, 34) + +/* 35 Reserved */ + +/* ADC flag register */ +#define ADC3XXX_ADC_FLAG ADC3XXX_REG(0, 36) +/* Data slot offset 2 (Ch_Offset_2) */ +#define ADC3XXX_CH_OFFSET_2 ADC3XXX_REG(0, 37) +/* I2S TDM control register */ +#define ADC3XXX_I2S_TDM_CTRL ADC3XXX_REG(0, 38) + +/* 39-41 Reserved */ + +/* Interrupt flags (overflow) */ +#define ADC3XXX_INTR_FLAG_1 ADC3XXX_REG(0, 42) +/* Interrupt flags (overflow) */ +#define ADC3XXX_INTR_FLAG_2 ADC3XXX_REG(0, 43) + +/* 44 Reserved */ + +/* Interrupt flags ADC */ +#define ADC3XXX_INTR_FLAG_ADC1 ADC3XXX_REG(0, 45) + +/* 46 Reserved */ + +/* Interrupt flags ADC */ +#define ADC3XXX_INTR_FLAG_ADC2 ADC3XXX_REG(0, 47) +/* INT1 interrupt control */ +#define ADC3XXX_INT1_CTRL ADC3XXX_REG(0, 48) +/* INT2 interrupt control */ +#define ADC3XXX_INT2_CTRL ADC3XXX_REG(0, 49) + +/* 50 Reserved */ + +/* DMCLK/GPIO2 control */ +#define ADC3XXX_GPIO2_CTRL ADC3XXX_REG(0, 51) +/* DMDIN/GPIO1 control */ +#define ADC3XXX_GPIO1_CTRL ADC3XXX_REG(0, 52) +/* DOUT Control */ +#define ADC3XXX_DOUT_CTRL ADC3XXX_REG(0, 53) + +/* 54-56 Reserved */ + +/* ADC sync control 1 */ +#define ADC3XXX_SYNC_CTRL_1 ADC3XXX_REG(0, 57) +/* ADC sync control 2 */ +#define ADC3XXX_SYNC_CTRL_2 ADC3XXX_REG(0, 58) +/* ADC CIC filter gain control */ +#define ADC3XXX_CIC_GAIN_CTRL ADC3XXX_REG(0, 59) + +/* 60 Reserved */ + +/* ADC processing block selection */ +#define ADC3XXX_PRB_SELECT ADC3XXX_REG(0, 61) +/* Programmable instruction mode control bits */ +#define ADC3XXX_INST_MODE_CTRL ADC3XXX_REG(0, 62) + +/* 63-79 Reserved */ + +/* Digital microphone polarity control */ +#define ADC3XXX_MIC_POLARITY_CTRL ADC3XXX_REG(0, 80) +/* ADC Digital */ +#define ADC3XXX_ADC_DIGITAL ADC3XXX_REG(0, 81) +/* ADC Fine Gain Adjust */ +#define ADC3XXX_ADC_FGA ADC3XXX_REG(0, 82) +/* Left ADC Channel Volume Control */ +#define ADC3XXX_LADC_VOL ADC3XXX_REG(0, 83) +/* Right ADC Channel Volume Control */ +#define ADC3XXX_RADC_VOL ADC3XXX_REG(0, 84) +/* ADC phase compensation */ +#define ADC3XXX_ADC_PHASE_COMP ADC3XXX_REG(0, 85) +/* Left Channel AGC Control Register 1 */ +#define ADC3XXX_LEFT_CHN_AGC_1 ADC3XXX_REG(0, 86) +/* Left Channel AGC Control Register 2 */ +#define ADC3XXX_LEFT_CHN_AGC_2 ADC3XXX_REG(0, 87) +/* Left Channel AGC Control Register 3 */ +#define ADC3XXX_LEFT_CHN_AGC_3 ADC3XXX_REG(0, 88) +/* Left Channel AGC Control Register 4 */ +#define ADC3XXX_LEFT_CHN_AGC_4 ADC3XXX_REG(0, 89) +/* Left Channel AGC Control Register 5 */ +#define ADC3XXX_LEFT_CHN_AGC_5 ADC3XXX_REG(0, 90) +/* Left Channel AGC Control Register 6 */ +#define ADC3XXX_LEFT_CHN_AGC_6 ADC3XXX_REG(0, 91) +/* Left Channel AGC Control Register 7 */ +#define ADC3XXX_LEFT_CHN_AGC_7 ADC3XXX_REG(0, 92) +/* Left AGC gain */ +#define ADC3XXX_LEFT_AGC_GAIN ADC3XXX_REG(0, 93) +/* Right Channel AGC Control Register 1 */ +#define ADC3XXX_RIGHT_CHN_AGC_1 ADC3XXX_REG(0, 94) +/* Right Channel AGC Control Register 2 */ +#define ADC3XXX_RIGHT_CHN_AGC_2 ADC3XXX_REG(0, 95) +/* Right Channel AGC Control Register 3 */ +#define ADC3XXX_RIGHT_CHN_AGC_3 ADC3XXX_REG(0, 96) +/* Right Channel AGC Control Register 4 */ +#define ADC3XXX_RIGHT_CHN_AGC_4 ADC3XXX_REG(0, 97) +/* Right Channel AGC Control Register 5 */ +#define ADC3XXX_RIGHT_CHN_AGC_5 ADC3XXX_REG(0, 98) +/* Right Channel AGC Control Register 6 */ +#define ADC3XXX_RIGHT_CHN_AGC_6 ADC3XXX_REG(0, 99) +/* Right Channel AGC Control Register 7 */ +#define ADC3XXX_RIGHT_CHN_AGC_7 ADC3XXX_REG(0, 100) +/* Right AGC gain */ +#define ADC3XXX_RIGHT_AGC_GAIN ADC3XXX_REG(0, 101) + +/* 102-127 Reserved */ + +/****************************************************************************/ +/* Page 1 Registers */ +/****************************************************************************/ +/* 1-25 Reserved */ + +/* Dither control */ +#define ADC3XXX_DITHER_CTRL ADC3XXX_REG(1, 26) + +/* 27-50 Reserved */ + +/* MICBIAS Configuration Register */ +#define ADC3XXX_MICBIAS_CTRL ADC3XXX_REG(1, 51) +/* Left ADC input selection for Left PGA */ +#define ADC3XXX_LEFT_PGA_SEL_1 ADC3XXX_REG(1, 52) + +/* 53 Reserved */ + +/* Right ADC input selection for Left PGA */ +#define ADC3XXX_LEFT_PGA_SEL_2 ADC3XXX_REG(1, 54) +/* Right ADC input selection for right PGA */ +#define ADC3XXX_RIGHT_PGA_SEL_1 ADC3XXX_REG(1, 55) + +/* 56 Reserved */ + +/* Right ADC input selection for right PGA */ +#define ADC3XXX_RIGHT_PGA_SEL_2 ADC3XXX_REG(1, 57) + +/* 58 Reserved */ + +/* Left analog PGA settings */ +#define ADC3XXX_LEFT_APGA_CTRL ADC3XXX_REG(1, 59) +/* Right analog PGA settings */ +#define ADC3XXX_RIGHT_APGA_CTRL ADC3XXX_REG(1, 60) +/* ADC Low current Modes */ +#define ADC3XXX_LOW_CURRENT_MODES ADC3XXX_REG(1, 61) +/* ADC analog PGA flags */ +#define ADC3XXX_ANALOG_PGA_FLAGS ADC3XXX_REG(1, 62) + +/* 63-127 Reserved */ + +/****************************************************************************/ +/* Macros and definitions */ +/****************************************************************************/ + +#define ADC3XXX_RATES SNDRV_PCM_RATE_8000_96000 +#define ADC3XXX_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \ + SNDRV_PCM_FMTBIT_S20_3LE | \ + SNDRV_PCM_FMTBIT_S24_3LE | \ + SNDRV_PCM_FMTBIT_S32_LE) + +/****************************************************************************/ +/* ADC3XXX Register bits */ +/****************************************************************************/ +/* PLL Enable bits */ +#define ADC3XXX_ENABLE_PLL_SHIFT 7 +#define ADC3XXX_ENABLE_PLL (1 << ADC3XXX_ENABLE_PLL_SHIFT) +#define ADC3XXX_ENABLE_NADC_SHIFT 7 +#define ADC3XXX_ENABLE_NADC (1 << ADC3XXX_ENABLE_NADC_SHIFT) +#define ADC3XXX_ENABLE_MADC_SHIFT 7 +#define ADC3XXX_ENABLE_MADC (1 << ADC3XXX_ENABLE_MADC_SHIFT) +#define ADC3XXX_ENABLE_BCLK_SHIFT 7 +#define ADC3XXX_ENABLE_BCLK (1 << ADC3XXX_ENABLE_BCLK_SHIFT) + +/* Power bits */ +#define ADC3XXX_LADC_PWR_ON 0x80 +#define ADC3XXX_RADC_PWR_ON 0x40 + +#define ADC3XXX_SOFT_RESET 0x01 +#define ADC3XXX_BCLK_MASTER 0x08 +#define ADC3XXX_WCLK_MASTER 0x04 + +/* Interface register masks */ +#define ADC3XXX_FORMAT_MASK 0xc0 +#define ADC3XXX_FORMAT_SHIFT 6 +#define ADC3XXX_WLENGTH_MASK 0x30 +#define ADC3XXX_WLENGTH_SHIFT 4 +#define ADC3XXX_CLKDIR_MASK 0x0c +#define ADC3XXX_CLKDIR_SHIFT 2 + +/* Interface register bit patterns */ +#define ADC3XXX_FORMAT_I2S (0 << ADC3XXX_FORMAT_SHIFT) +#define ADC3XXX_FORMAT_DSP (1 << ADC3XXX_FORMAT_SHIFT) +#define ADC3XXX_FORMAT_RJF (2 << ADC3XXX_FORMAT_SHIFT) +#define ADC3XXX_FORMAT_LJF (3 << ADC3XXX_FORMAT_SHIFT) + +#define ADC3XXX_IFACE_16BITS (0 << ADC3XXX_WLENGTH_SHIFT) +#define ADC3XXX_IFACE_20BITS (1 << ADC3XXX_WLENGTH_SHIFT) +#define ADC3XXX_IFACE_24BITS (2 << ADC3XXX_WLENGTH_SHIFT) +#define ADC3XXX_IFACE_32BITS (3 << ADC3XXX_WLENGTH_SHIFT) + +/* PLL P/R bit offsets */ +#define ADC3XXX_PLLP_SHIFT 4 +#define ADC3XXX_PLLR_SHIFT 0 +#define ADC3XXX_PLL_PR_MASK 0x7f +#define ADC3XXX_PLLJ_MASK 0x3f +#define ADC3XXX_PLLD_MSB_MASK 0x3f +#define ADC3XXX_PLLD_LSB_MASK 0xff +#define ADC3XXX_NADC_MASK 0x7f +#define ADC3XXX_MADC_MASK 0x7f +#define ADC3XXX_AOSR_MASK 0xff +#define ADC3XXX_IADC_MASK 0xff +#define ADC3XXX_BDIV_MASK 0x7f + +/* PLL_CLKIN bits */ +#define ADC3XXX_PLL_CLKIN_SHIFT 2 +#define ADC3XXX_PLL_CLKIN_MCLK 0x0 +#define ADC3XXX_PLL_CLKIN_BCLK 0x1 +#define ADC3XXX_PLL_CLKIN_ZERO 0x3 + +/* CODEC_CLKIN bits */ +#define ADC3XXX_CODEC_CLKIN_SHIFT 0 +#define ADC3XXX_CODEC_CLKIN_MCLK 0x0 +#define ADC3XXX_CODEC_CLKIN_BCLK 0x1 +#define ADC3XXX_CODEC_CLKIN_PLL_CLK 0x3 + +#define ADC3XXX_USE_PLL ((ADC3XXX_PLL_CLKIN_MCLK << ADC3XXX_PLL_CLKIN_SHIFT) | \ + (ADC3XXX_CODEC_CLKIN_PLL_CLK << ADC3XXX_CODEC_CLKIN_SHIFT)) +#define ADC3XXX_NO_PLL ((ADC3XXX_PLL_CLKIN_ZERO << ADC3XXX_PLL_CLKIN_SHIFT) | \ + (ADC3XXX_CODEC_CLKIN_MCLK << ADC3XXX_CODEC_CLKIN_SHIFT)) + +/* Analog PGA control bits */ +#define ADC3XXX_LPGA_MUTE 0x80 +#define ADC3XXX_RPGA_MUTE 0x80 + +#define ADC3XXX_LPGA_GAIN_MASK 0x7f +#define ADC3XXX_RPGA_GAIN_MASK 0x7f + +/* ADC current modes */ +#define ADC3XXX_ADC_LOW_CURR_MODE 0x01 + +/* Left ADC Input selection bits */ +#define ADC3XXX_LCH_SEL1_SHIFT 0 +#define ADC3XXX_LCH_SEL2_SHIFT 2 +#define ADC3XXX_LCH_SEL3_SHIFT 4 +#define ADC3XXX_LCH_SEL4_SHIFT 6 + +#define ADC3XXX_LCH_SEL1X_SHIFT 0 +#define ADC3XXX_LCH_SEL2X_SHIFT 2 +#define ADC3XXX_LCH_SEL3X_SHIFT 4 +#define ADC3XXX_LCH_COMMON_MODE 0x40 +#define ADC3XXX_BYPASS_LPGA 0x80 + +/* Right ADC Input selection bits */ +#define ADC3XXX_RCH_SEL1_SHIFT 0 +#define ADC3XXX_RCH_SEL2_SHIFT 2 +#define ADC3XXX_RCH_SEL3_SHIFT 4 +#define ADC3XXX_RCH_SEL4_SHIFT 6 + +#define ADC3XXX_RCH_SEL1X_SHIFT 0 +#define ADC3XXX_RCH_SEL2X_SHIFT 2 +#define ADC3XXX_RCH_SEL3X_SHIFT 4 +#define ADC3XXX_RCH_COMMON_MODE 0x40 +#define ADC3XXX_BYPASS_RPGA 0x80 + +/* MICBIAS control bits */ +#define ADC3XXX_MICBIAS_MASK 0x2 +#define ADC3XXX_MICBIAS1_SHIFT 5 +#define ADC3XXX_MICBIAS2_SHIFT 3 + +#define ADC3XXX_ADC_MAX_VOLUME 64 +#define ADC3XXX_ADC_POS_VOL 24 + +/* GPIO control bits (GPIO1_CTRL and GPIO2_CTRL) */ +#define ADC3XXX_GPIO_CTRL_CFG_MASK 0x3c +#define ADC3XXX_GPIO_CTRL_CFG_SHIFT 2 +#define ADC3XXX_GPIO_CTRL_OUTPUT_CTRL_MASK 0x01 +#define ADC3XXX_GPIO_CTRL_OUTPUT_CTRL_SHIFT 0 +#define ADC3XXX_GPIO_CTRL_INPUT_VALUE_MASK 0x02 +#define ADC3XXX_GPIO_CTRL_INPUT_VALUE_SHIFT 1 + +#endif /* _ADC3XXX_H */ -- 2.20.1 -- Ricard Wolf Wanderlof ricardw(at)axis.com Axis Communications AB, Lund, Sweden www.axis.com Phone +46 46 272 2016 Fax +46 46 13 61 30

2 2

only have sound after mute and unmute and set volume in alsamixer
by GitHub issues - opened 01 Nov '21

01 Nov '21

alsa-project/alsa-ucm-conf issue #113 was opened from amazingfate: I have a x86 thinclient with debian bullseye installed. It has no sound in my headphone after boot, but I open alsamixer and then: 1, press M to mute the master 2, press M again to unmute the master 3, change the master volume from 100 to 99 After the above three steps I can hear the sound from my headphone. Here is the alsainfo before and after the three steps: [alsa-info_nosound.txt](https://github.com/alsa-project/alsa-ucm-conf/files/… [alsa-info_sound.txt](https://github.com/alsa-project/alsa-ucm-conf/files/74… I can see the difference in "Amp-Out vals". Issue URL : https://github.com/alsa-project/alsa-ucm-conf/issues/113 Repository URL: https://github.com/alsa-project/alsa-ucm-conf

1 0

[PATCH v2 1/2] dt-bindings: sound: tlv320adc3xxx: New codec driver
by Ricard Wanderlof 01 Nov '21

01 Nov '21

DT bindings for tlv320adc3xxx driver, currently supporting Texas Instruments TLV320ADC3001 and TLV320ADC3101 audio ADCs. Signed-off-by: Ricard Wanderlof <ricardw(a)axis.com> --- .../bindings/sound/ti,tlv320adc3xxx.yaml | 137 ++++++++++++++++++ include/dt-bindings/sound/tlv320adc3xxx.h | 28 ++++ 2 files changed, 165 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/ti,tlv320adc3xxx.yaml create mode 100644 include/dt-bindings/sound/tlv320adc3xxx.h diff --git a/Documentation/devicetree/bindings/sound/ti,tlv320adc3xxx.yaml b/Documentation/devicetree/bindings/sound/ti,tlv320adc3xxx.yaml new file mode 100644 index 000000000000..c4fed6335230 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/ti,tlv320adc3xxx.yaml @@ -0,0 +1,137 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/ti,tlv320adc3xxx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments TLV320ADC3001/TLV320ADC3101 Stereo ADC + +maintainers: + - Ricard Wanderlof <ricardw(a)axis.com> + +description: | + Texas Instruments TLV320ADC3001 and TLV320ADC3101 Stereo ADC + https://www.ti.com/product/TLV320ADC3001 + https://www.ti.com/product/TLV320ADC3101 + +properties: + compatible: + enum: + - ti,tlv320adc3001 + - ti,tlv320adc3101 + + reg: + maxItems: 1 + description: I2C address + + '#sound-dai-cells': + const: 0 + + '#gpio-cells': + const: 2 + + gpio-controller: true + + reset-gpios: + maxItems: 1 + description: GPIO pin used for codec reset (RESET pin) + + clocks: + maxItems: 1 + description: Master clock (MCLK) + + ti,dmdin-gpio1: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: + - 0 # ADC3XXX_GPIO_DISABLED - I/O buffers powered down and not used + - 1 # ADC3XXX_GPIO_INPUT - Various non-GPIO input functions + - 2 # ADC3XXX_GPIO_GPI - General purpose input + - 3 # ADC3XXX_GPIO_GPO - General purpose output + - 4 # ADC3XXX_GPIO_CLKOUT - Clock source set in CLKOUT_MUX reg + - 5 # ADC3XXX_GPIO_INT1 - INT1 output + - 6 # ADC3XXX_GPIO_SECONDARY_BCLK - Codec interface secondary BCLK + - 7 # ADC3XXX_GPIO_SECONDARY_WCLK - Codec interface secondary WCLK + default: 0 + description: | + Configuration for DMDIN/GPIO1 pin. + + When ADC3XXX_GPIO_GPO is configured, this causes corresponding the + ALSA control "GPIOx Output" to appear, as a switch control. + + ti,dmclk-gpio2: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: + - 0 # ADC3XXX_GPIO_DISABLED - I/O buffers powered down and not used + - 1 # ADC3XXX_GPIO_INPUT - Various non-GPIO input functions + - 2 # ADC3XXX_GPIO_GPI - General purpose input + - 3 # ADC3XXX_GPIO_GPO - General purpose output + - 4 # ADC3XXX_GPIO_CLKOUT - Clock source set in CLKOUT_MUX reg + - 5 # ADC3XXX_GPIO_INT1 - INT1 output + - 6 # ADC3XXX_GPIO_SECONDARY_BCLK - Codec interface secondary BCLK + - 7 # ADC3XXX_GPIO_SECONDARY_WCLK - Codec interface secondary WCLK + default: 0 + description: | + Configuration for DMCLK/GPIO2 pin. + + When ADC3XXX_GPIO_GPO is configured, this causes corresponding the + ALSA control "GPIOx Output" to appear, as a switch control. + + Note that there is currently no support for reading the GPIO pins as + inputs. + + ti,micbias1-vg: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: + - 0 # ADC3XXX_MICBIAS_OFF - Mic bias is powered down + - 1 # ADC3XXX_MICBIAS_2_0V - Mic bias is set to 2.0V + - 2 # ADC3XXX_MICBIAS_2_5V - Mic bias is set to 2.5V + - 3 # ADC3XXX_MICBIAS_AVDD - Mic bias is same as AVDD supply + default: 0 + description: | + Mic bias voltage output on MICBIAS1 pin + + ti,micbias2-vg: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: + - 0 # ADC3XXX_MICBIAS_OFF - Mic bias is powered down + - 1 # ADC3XXX_MICBIAS_2_0V - Mic bias is set to 2.0V + - 2 # ADC3XXX_MICBIAS_2_5V - Mic bias is set to 2.5V + - 3 # ADC3XXX_MICBIAS_AVDD - Mic bias is same as AVDD supply + default: 0 + description: | + Mic bias voltage output on MICBIAS2 pin + +required: + - compatible + - reg + - clocks + +additionalProperties: false + +examples: + - | + + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/sound/tlv320adc3xxx.h> + + i2c { + #address-cells = <1>; + #size-cells = <0>; + tlv320adc3101: tlv320adc3101@18 { + compatible = "ti,tlv320adc3101"; + reg = <0x18>; + reset-gpios = <&gpio_pc 3 GPIO_ACTIVE_LOW>; + clocks = <&audio_mclk>; + gpio-controller; + #gpio-cells = <2>; + ti,dmdin-gpio1 = <ADC3XXX_GPIO_GPO>; + ti,micbias1-vg = <ADC3XXX_MICBIAS_AVDD>; + }; + }; + + audio_mclk: clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24576000>; + }; +... diff --git a/include/dt-bindings/sound/tlv320adc3xxx.h b/include/dt-bindings/sound/tlv320adc3xxx.h new file mode 100644 index 000000000000..59ed510e6cf1 --- /dev/null +++ b/include/dt-bindings/sound/tlv320adc3xxx.h @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Devicetree bindings definitions for tlv320adc3xxx driver. + * + * Copyright (C) 2021 Axis Communications AB + */ +#ifndef __DT_TLV320ADC3XXX_H +#define __DT_TLV320ADC3XXX_H + +#define ADC3XXX_GPIO_DISABLED 0 /* I/O buffers powered down */ +#define ADC3XXX_GPIO_INPUT 1 /* Various non-GPIO inputs */ +#define ADC3XXX_GPIO_GPI 2 /* General purpose input */ +#define ADC3XXX_GPIO_GPO 3 /* General purpose output */ +#define ADC3XXX_GPIO_CLKOUT 4 /* Source set in reg. CLKOUT_MUX */ +#define ADC3XXX_GPIO_INT1 5 /* INT1 output */ +#define ADC3XXX_GPIO_INT2 6 /* INT2 output */ +/* value 7 is reserved */ +#define ADC3XXX_GPIO_SECONDARY_BCLK 8 /* Codec interface secondary BCLK */ +#define ADC3XXX_GPIO_SECONDARY_WCLK 9 /* Codec interface secondary WCLK */ +#define ADC3XXX_GPIO_ADC_MOD_CLK 10 /* Clock output for digital mics */ +/* values 11-15 reserved */ + +#define ADC3XXX_MICBIAS_OFF 0 /* Micbias pin powered off */ +#define ADC3XXX_MICBIAS_2_0V 1 /* Micbias pin set to 2.0V */ +#define ADC3XXX_MICBIAS_2_5V 2 /* Micbias pin set to 2.5V */ +#define ADC3XXX_MICBIAS_AVDD 3 /* Use AVDD voltage for micbias pin */ + +#endif /* __DT_TLV320ADC3XXX_H */ -- 2.20.1 -- Ricard Wolf Wanderlof ricardw(at)axis.com Axis Communications AB, Lund, Sweden www.axis.com Phone +46 46 272 2016 Fax +46 46 13 61 30

1 0

[PATCH v2 0/2] Codec driver for TLV320ADC3001 and 3101
by Ricard Wanderlof 01 Nov '21

01 Nov '21

This is a codec driver for the TLV320ADC3001 and TLV320ADC3101 2 channel audio ADC chips from Texas Instruments. Based on an old driver for these chips that I was referred to by Texas Instruments, but which apparently was never upstreamed, I've taken patches from various incarnations, ported them and augmented them with various new features in order to make a working driver. There is currently no support for the on-chip "miniDSP". Although the TLV320ADC3001 and TLV320ADC3101 have similarities with other TI codec chips for which there are existing drivers, upon closer inspection I decided the differences were too great to warrant attempting to modify an existing driver, especially without access to all supported chips and resources for testing them all. There are certainly things that could be improved, among others in the area of PLL register value calculations, but it has been tested on the Axis ARTPEC-8 platform and has been found to work satisfactorily at least with a TLV320ADC3101 operating as an I2S slave at 48 kHz with 32 bit bit depth, 1 or 2 channels, both with the on-chip PLL enabled and disabled. I have not tested this on a TLV320ADC3001 chip; in the original driver the only differences were related to the now-removed initialization code, so I've just retained the compatible strings for both chips. Limitations: - GPIO pins on chip can only be set up as outputs. - Using BCLK as an input to clock chain is supported by the hw but not by driver. Large portions of the driver have been reworked from v1 based on remarks from Mark. More specifically: - Remove an unneeded #ifdef and EXPORT_SYMBOL_GPL. - Add ADC3XXX_ prefix to all macro names to avoid namespace contention. - Clean up certain macro names with mixed lower case - upper case names. - Do away with the D0..D7 macros representing bit values. - Fix general formatting: spaces before and after {, }, replace multi spaces with tabs, maximum 2 blank lines anywhere, and other minor issues. - Page register does not need to be volatile. - Rather than use 0 / -6dB enum for input attenuator, use standard TLV. - The dither offset control contains reserved values so use VALUE_ENUM instead of straight ENUM. - Replace vector of SOC_ENUMs with individual variables. - Fix ALSA control names: - Use Volume at the end of all gain controls, and remove "Gain" where applicable. - Use "Switch" at the end of all switch controls, either adding it or changing "switch" into "Switch" as applicable. - Switches and Volumes related to capture should be set up as such, so add "Capture" to widget names where appropriate. This is mostly important for the PGA Capture and Switch widgets, not just for consistency, but also because amixer simple Switch controls expect different names (cap/nocap instead of on/off) for control values for capture. - Make widget names have capital first letters for all consitutent words. - When resuming, the registers will not have changed, so no need to call snd_soc_component_cache_sync(). - Move reset gpio init to I2C probe - Remove needless _priv at end of private struct name. - Make hex constants lower case - _CBM_CFM/_CBS_CFS -> _CBP_CFP/_CBC_CFC - Instead of using device specific ALSA controls to control the two GPIO pins, use GPIOLIB. GPIO pin functions still can be set up in the devicetree as the pins can be used for other functions which are not GPIO related. - Limitation: The GPIO pins can only be used as outputs, even though the hardware alternatively supports using them as inputs. - Handle GPIO configs in a vector rather than separately. - Use more appropriate module_i2c_driver instead of generic module_init/module_exit. - Remove useless initialization data. - As the ADC mute function had no control, add it. - Clean up GPIO initialization which was done both in the I2C probe and in the component probe. - Remove probe, remove, suspend and resume callbacks, which either do not do anything at all anymore, or uselessly just do set_bias_level. - The PLL should not be configured in the devicetree, so move the corresponding definitions to tlv320adc3xxx.h where they can be picked up by a machine driver if needed. - Default to PLL AUTO mode. - Use "reset-gpios" instead of too-generic "gpios" for dt property for configuring codec reset pin. - Use function for printing PLL mode rather than macro. - dev_info is too verbose for most of the printouts, change them to dev_dbg. - Add support for configuring micbias voltage in DT. - Remove ALSA control for mic bias. - Move PLL and NADC, MADC divisor enable to DAPM, including 10 ms post PLL start up delay via POST_PMU event. - ADC is powered on using DAPM, so needless to do it in set_bias_level, thus remove it. - Let DAPM handle BCLK divisor enable. With this, we can remove set_bias_level as it doesn't do anything anymore. - Fix incorrect argument order to a snd_soc_component_update_bits call. - Although the chip itself can operate using BCLK as the clock source, either directly to the divider chain or via the PLL, this is not yet supported in the driver, so require the clocks property for the MCLK for now. - Move PLL rate structure out of .h file where it does not belong. /Ricard Ricard Wanderlof (2): dt-bindings: sound: tlv320adc3xxx: New codec driver ASoC: codec: tlv320adc3xxx: New codec driver .../bindings/sound/ti,tlv320adc3xxx.yaml | 137 +++ include/dt-bindings/sound/tlv320adc3xxx.h | 28 + sound/soc/codecs/Kconfig | 7 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/tlv320adc3xxx.c | 1071 +++++++++++++++++ sound/soc/codecs/tlv320adc3xxx.h | 379 ++++++ 6 files changed, 1624 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/ti,tlv320adc3xxx.yaml create mode 100644 include/dt-bindings/sound/tlv320adc3xxx.h create mode 100644 sound/soc/codecs/tlv320adc3xxx.c create mode 100644 sound/soc/codecs/tlv320adc3xxx.h -- 2.20.1 -- Ricard Wolf Wanderlof ricardw(at)axis.com Axis Communications AB, Lund, Sweden www.axis.com Phone +46 46 272 2016 Fax +46 46 13 61 30

1 0

[PATCH] ALSA: usb-audio: Line6 HX-Stomp XL USB_ID
by Jason Ormes 01 Nov '21

01 Nov '21

Adding the Line6 HX-Stomp XL USB_ID as it needs this fixed frequency quirk as well. The device is basically just the HX-Stomp with some more buttons on the face. I've Done some recording with it after adding it, and it seems to function properly with this fix. The Midi features appear to be working as well. Signed-off-by: Jason Ormes <skryking(a)gmail.com> --- sound/usb/format.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/usb/format.c b/sound/usb/format.c index 50efccbffb8a..e8fc2c350a9f 100644 --- a/sound/usb/format.c +++ b/sound/usb/format.c @@ -414,6 +414,7 @@ static int line6_parse_audio_format_rates_quirk(struct snd_usb_audio *chip, case USB_ID(0x0e41, 0x4242): /* Line6 Helix Rack */ case USB_ID(0x0e41, 0x4244): /* Line6 Helix LT */ case USB_ID(0x0e41, 0x4246): /* Line6 HX-Stomp */ + case USB_ID(0x0e41, 0x4253): /* Line6 HX-Stomp XL*/ case USB_ID(0x0e41, 0x4247): /* Line6 Pod Go */ case USB_ID(0x0e41, 0x4248): /* Line6 Helix >= fw 2.82 */ case USB_ID(0x0e41, 0x4249): /* Line6 Helix Rack >= fw 2.82 */ -- 2.25.1

2 1

[PATCH] ALSA: usb-audio: Add registration quirk for JBL Quantum 400
by Alexander Tsoy 01 Nov '21

01 Nov '21

Add another device ID for JBL Quantum 400. It requires the same quirk as other JBL Quantum devices. Signed-off-by: Alexander Tsoy <alexander(a)tsoy.me> --- sound/usb/quirks.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/usb/quirks.c b/sound/usb/quirks.c index 8929d9abe8aa..1d418c3fc598 100644 --- a/sound/usb/quirks.c +++ b/sound/usb/quirks.c @@ -1749,6 +1749,7 @@ static const struct registration_quirk registration_quirks[] = { REG_QUIRK_ENTRY(0x0951, 0x16ea, 2), /* Kingston HyperX Cloud Flight S */ REG_QUIRK_ENTRY(0x0ecb, 0x1f46, 2), /* JBL Quantum 600 */ REG_QUIRK_ENTRY(0x0ecb, 0x1f47, 2), /* JBL Quantum 800 */ + REG_QUIRK_ENTRY(0x0ecb, 0x1f4c, 2), /* JBL Quantum 400 */ REG_QUIRK_ENTRY(0x0ecb, 0x2039, 2), /* JBL Quantum 400 */ REG_QUIRK_ENTRY(0x0ecb, 0x203c, 2), /* JBL Quantum 600 */ REG_QUIRK_ENTRY(0x0ecb, 0x203e, 2), /* JBL Quantum 800 */ -- 2.32.0

2 1