June 2023 - Alsa-devel - mailman.alsa-project.org

[PATCH] ASoC: audio-graph-card2-custom-sample: add missing CPU:Codec = 1:N sample
by Kuninori Morimoto 09 Jun '23

09 Jun '23

It has CPU:Codec = 1:1 and N:N samples, but missing 1:N settings. This patch adds it. One note here is that because of registering timing, probing and CPU/Codec numbering are mismatching. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com> --- .../audio-graph-card2-custom-sample.dtsi | 26 +++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/sound/soc/generic/audio-graph-card2-custom-sample.dtsi b/sound/soc/generic/audio-graph-card2-custom-sample.dtsi index 994db61a26b3..f5e7d669da45 100644 --- a/sound/soc/generic/audio-graph-card2-custom-sample.dtsi +++ b/sound/soc/generic/audio-graph-card2-custom-sample.dtsi @@ -42,6 +42,15 @@ / { * [Normal] * cpu0 <-@-----------------> codec0 * + * [Semi-Multi] + * + * CPU:Codec = 1:N + * + * +-+ + * cpu7 <-@------->| |-> codec12 + * | |-> codec13 + * +-+ + * * [Multi-CPU/Codec] * +-+ +-+ * cpu1 <--| |<-@--------->| |-> codec1 @@ -128,6 +137,9 @@ audio-graph-card2-custom-sample { */ &cpu0 + /* [Semi-Multi] */ + &sm0 + /* * [Multi-CPU/Codec]: cpu side only * cpu1/cpu2/codec1/codec2 @@ -194,6 +206,13 @@ ports@4 { port@1 { mc2c10_ep: endpoint { remote-endpoint = <&codec10_ep>; }; }; port@2 { mc2c11_ep: endpoint { remote-endpoint = <&codec11_ep>; }; }; }; + + /* [Semi-Multi] */ + ports@5 { + port@0 { smcodec0_ep: endpoint { remote-endpoint = <&cpu7_ep>; }; }; + port@1 { smcodec1_ep: endpoint { remote-endpoint = <&codec12_ep>; }; }; + port@2 { smcodec2_ep: endpoint { remote-endpoint = <&codec13_ep>; }; }; + }; }; dpcm { @@ -261,6 +280,9 @@ ports { /* [DPCM-Multi]::FE */ port@5 { cpu5_ep: endpoint { remote-endpoint = <&fe10_ep>; }; }; port@6 { cpu6_ep: endpoint { remote-endpoint = <&fe11_ep>; }; }; + + /* [Semi-Multi] */ + sm0: port@7 { cpu7_ep: endpoint { remote-endpoint = <&smcodec0_ep>; }; }; }; }; @@ -311,6 +333,10 @@ port@3 { port@9 { codec9_ep: endpoint { remote-endpoint = <&mc2c01_ep>; }; }; port@10 { codec10_ep: endpoint { remote-endpoint = <&mc2c10_ep>; }; }; port@11 { codec11_ep: endpoint { remote-endpoint = <&mc2c11_ep>; }; }; + + /* [Semi-Multi] */ + port@12 { codec12_ep: endpoint { remote-endpoint = <&smcodec1_ep>; }; }; + port@13 { codec13_ep: endpoint { remote-endpoint = <&smcodec2_ep>; }; }; }; }; }; -- 2.25.1

2 1

[PATCH 1/2] ASoC: SOF: Refactor rx function for fuzzing
by cujomalainey＠chromium.org 09 Jun '23

09 Jun '23

From: Curtis Malainey <cujomalainey(a)chromium.org> Refactor the function so reading the data is done outside the work function so fuzzing can pass data directly into the work callbacks. Also expose the inner function outside the module so we can call it from the injector. Signed-off-by: Curtis Malainey <cujomalainey(a)chromium.org> Reviewed-by: Ranjani Sridharan <ranjani.sridharan(a)linux.intel.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Reviewed-by: Péter Ujfalusi <peter.ujfalusi(a)linux.intel.com> --- sound/soc/sof/ipc3-priv.h | 2 ++ sound/soc/sof/ipc3.c | 63 ++++++++++++++++++++++++--------------- 2 files changed, 41 insertions(+), 24 deletions(-) diff --git a/sound/soc/sof/ipc3-priv.h b/sound/soc/sof/ipc3-priv.h index f5044202f3c5a..0bbca418e67e6 100644 --- a/sound/soc/sof/ipc3-priv.h +++ b/sound/soc/sof/ipc3-priv.h @@ -28,6 +28,8 @@ int sof_ipc3_validate_fw_version(struct snd_sof_dev *sdev); /* dtrace position update */ int ipc3_dtrace_posn_update(struct snd_sof_dev *sdev, struct sof_ipc_dma_trace_posn *posn); +/* RX handler backend */ +void sof_ipc3_do_rx_work(struct snd_sof_dev *sdev, struct sof_ipc_cmd_hdr *hdr, void *msg_buf); /* dtrace platform callback wrappers */ static inline int sof_dtrace_host_init(struct snd_sof_dev *sdev, diff --git a/sound/soc/sof/ipc3.c b/sound/soc/sof/ipc3.c index c677677420939..ec1ac0fb2d9f8 100644 --- a/sound/soc/sof/ipc3.c +++ b/sound/soc/sof/ipc3.c @@ -954,31 +954,21 @@ static void ipc3_trace_message(struct snd_sof_dev *sdev, void *msg_buf) } } -/* DSP firmware has sent host a message */ -static void sof_ipc3_rx_msg(struct snd_sof_dev *sdev) +void sof_ipc3_do_rx_work(struct snd_sof_dev *sdev, struct sof_ipc_cmd_hdr *hdr, void *msg_buf) { ipc3_rx_callback rx_callback = NULL; - struct sof_ipc_cmd_hdr hdr; - void *msg_buf; u32 cmd; int err; - /* read back header */ - err = snd_sof_ipc_msg_data(sdev, NULL, &hdr, sizeof(hdr)); - if (err < 0) { - dev_warn(sdev->dev, "failed to read IPC header: %d\n", err); - return; - } + ipc3_log_header(sdev->dev, "ipc rx", hdr->cmd); - if (hdr.size < sizeof(hdr) || hdr.size > SOF_IPC_MSG_MAX_SIZE) { + if (hdr->size < sizeof(hdr) || hdr->size > SOF_IPC_MSG_MAX_SIZE) { dev_err(sdev->dev, "The received message size is invalid: %u\n", - hdr.size); + hdr->size); return; } - ipc3_log_header(sdev->dev, "ipc rx", hdr.cmd); - - cmd = hdr.cmd & SOF_GLB_TYPE_MASK; + cmd = hdr->cmd & SOF_GLB_TYPE_MASK; /* check message type */ switch (cmd) { @@ -1016,6 +1006,36 @@ static void sof_ipc3_rx_msg(struct snd_sof_dev *sdev) break; } + /* Call local handler for the message */ + if (rx_callback) + rx_callback(sdev, msg_buf); + + /* Notify registered clients */ + sof_client_ipc_rx_dispatcher(sdev, msg_buf); + + ipc3_log_header(sdev->dev, "ipc rx done", hdr->cmd); +} +EXPORT_SYMBOL(sof_ipc3_do_rx_work); + +/* DSP firmware has sent host a message */ +static void sof_ipc3_rx_msg(struct snd_sof_dev *sdev) +{ + struct sof_ipc_cmd_hdr hdr; + void *msg_buf; + int err; + + /* read back header */ + err = snd_sof_ipc_msg_data(sdev, NULL, &hdr, sizeof(hdr)); + if (err < 0) { + dev_warn(sdev->dev, "failed to read IPC header: %d\n", err); + return; + } + + if (hdr.size < sizeof(hdr)) { + dev_err(sdev->dev, "The received message size is invalid\n"); + return; + } + /* read the full message */ msg_buf = kmalloc(hdr.size, GFP_KERNEL); if (!msg_buf) @@ -1024,18 +1044,13 @@ static void sof_ipc3_rx_msg(struct snd_sof_dev *sdev) err = snd_sof_ipc_msg_data(sdev, NULL, msg_buf, hdr.size); if (err < 0) { dev_err(sdev->dev, "%s: Failed to read message: %d\n", __func__, err); - } else { - /* Call local handler for the message */ - if (rx_callback) - rx_callback(sdev, msg_buf); - - /* Notify registered clients */ - sof_client_ipc_rx_dispatcher(sdev, msg_buf); + kfree(msg_buf); + return; } - kfree(msg_buf); + sof_ipc3_do_rx_work(sdev, &hdr, msg_buf); - ipc3_log_header(sdev->dev, "ipc rx done", hdr.cmd); + kfree(msg_buf); } static int sof_ipc3_set_core_state(struct snd_sof_dev *sdev, int core_idx, bool on) -- 2.41.0.162.gfafddb0af9-goog

2 2

ASUS RoG Strix Z790-F: No SPDIF Sound output
by GitHub issues - opened 09 Jun '23

09 Jun '23

alsa-project/alsa-lib issue #325 was opened from Nightwing0815: Hey guys, what Can I do to get my optical toslink output ( pcm signal undecoded ) working? Here are an inxi report of my system: ``` System: Host: Ultron Kernel: 6.1.0-1013-oem x86_64 bits: 64 compiler: N/A parameters: BOOT_IMAGE=/vmlinuz-6.1.0-1013-oem root=UUID=aa125f57-ee1e-4fd4-93fc-a77a180ec451 ro quiet splash Desktop: Cinnamon 5.6.8 tk: GTK 3.24.33 wm: muffin vt: 7 dm: LightDM 1.30.0 Distro: Linux Mint 21.1 Vera base: Ubuntu 22.04 jammy Machine: Type: Desktop System: ASUS product: N/A v: N/A serial: <superuser required> Mobo: ASUSTeK model: ROG STRIX Z790-F GAMING WIFI v: Rev 1.xx serial: <superuser required> UEFI: American Megatrends v: 0904 date: 03/29/2023 Battery: Message: No system battery data found. Is one present? Memory: RAM: total: 62.57 GiB used: 2.13 GiB (3.4%) RAM Report: unknown-error: Unknown dmidecode error. Unable to generate data. PCI Slots: Unknown-error: Unknown dmidecode error. Unable to generate data. CPU: Info: model: 13th Gen Intel Core i7-13700K bits: 64 type: MST AMCP arch: N/A family: 6 model-id: 0xB7 (183) stepping: 1 microcode: 0x113 Topology: cpus: 1x cores: 16 mt: 8 tpc: 2 st: 8 threads: 24 smt: enabled cache: L1: 1.4 MiB desc: d-8x32 KiB, 8x48 KiB; i-8x32 KiB, 8x64 KiB L2: 24 MiB desc: 8x2 MiB, 2x4 MiB L3: 30 MiB desc: 1x30 MiB Speed (MHz): avg: 3100 high: 3400 min/max: 800/5300:5400:4200 scaling: driver: intel_pstate governor: powersave cores: 1: 1100 2: 3400 3: 3400 4: 3400 5: 3400 6: 3400 7: 3400 8: 3400 9: 3400 10: 3400 11: 3400 12: 3400 13: 3400 14: 3400 15: 1100 16: 3400 17: 800 18: 3400 19: 3400 20: 3400 21: 3400 22: 3400 23: 3400 24: 3400 bogomips: 164044 Graphics: Device-1: NVIDIA vendor: CardExpert driver: nvidia v: 530.41.03 alternate: nvidiafb,nouveau,nvidia_drm ports: active: none off: DP-1,HDMI-A-1 empty: DP-2,DP-3 bus-ID: 0000:01:00.0 chip-ID: 10de:2782 class-ID: 0300 Display: x11 server: X.Org v: 1.21.1.4 driver: X: loaded: nvidia gpu: nvidia display-ID: :0 screens: 1 Screen-1: 0 s-res: 1920x2160 s-dpi: 46 s-size: 1060x1167mm (41.7x45.9") s-diag: 1577mm (62.1") Monitor-1: DP-1 pos: primary,bottom res: 1920x1080 hz: 60 dpi: 102 size: 477x268mm (18.8x10.6") diag: 547mm (21.5") Monitor-2: HDMI-0 pos: primary,top res: 1920x1080 hz: 60 dpi: 38 size: 1280x720mm (50.4x28.3") diag: 1469mm (57.8") OpenGL: renderer: NVIDIA GeForce RTX 4070 Ti/PCIe/SSE2 v: 4.6.0 NVIDIA 530.41.03 direct render: Yes Audio: Device-1: Intel vendor: ASUSTeK driver: snd_hda_intel v: kernel alternate: snd_sof_pci_intel_tgl bus-ID: 0000:00:1f.3 chip-ID: 8086:7a50 class-ID: 0403 Device-2: NVIDIA vendor: CardExpert driver: snd_hda_intel v: kernel bus-ID: 0000:01:00.1 chip-ID: 10de:22bc class-ID: 0403 Device-3: ASUSTek USB Audio type: USB driver: hid-generic,snd-usb-audio,usbhid bus-ID: 1-2:2 chip-ID: 0b05:1a52 class-ID: 0300 Sound Server-1: ALSA v: k6.1.0-1013-oem running: yes Sound Server-2: PulseAudio v: 15.99.1 running: no Sound Server-3: PipeWire v: 0.3.48 running: yes Network: Device-1: Intel vendor: ASUSTeK driver: igc v: kernel port: N/A bus-ID: 0000:05:00.0 chip-ID: 8086:125c class-ID: 0200 IF: eno2 state: up speed: 1000 Mbps duplex: full mac: c8:7f:54:6a:7e:55 IP v4: 192.168.178.10/24 type: noprefixroute scope: global broadcast: 192.168.178.255 IP v6: 2a02:8070:8a80:77c0:aac9:dade:e3e2:8611/64 type: temporary dynamic scope: global IP v6: 2a02:8070:8a80:77c0:64ef:c8d5:1d2b:3a7f/64 type: dynamic mngtmpaddr noprefixroute scope: global IP v6: fe80::6d94:62d1:90b5:608b/64 type: noprefixroute scope: link IF-ID-1: virbr0 state: down mac: 52:54:00:e9:bf:38 IP v4: 192.168.100.1/24 scope: global broadcast: 192.168.100.255 WAN IP: 46.5.221.128 Bluetooth: Message: No bluetooth data found. Logical: Message: No logical block device data found. RAID: Hardware-1: Intel Device driver: vmd v: 0.6 port: N/A bus-ID: 0000:00:0e.0 chip-ID: 8086:a77f rev: class-ID: 0104 Unmounted: Message: No unmounted partitions found. USB: Hub-1: 1-0:1 info: Hi-speed hub with single TT ports: 16 rev: 2.0 speed: 480 Mb/s chip-ID: 1d6b:0002 class-ID: 0900 Device-1: 1-2:2 info: ASUSTek USB Audio type: Audio,HID driver: hid-generic,snd-usb-audio,usbhid interfaces: 8 rev: 2.0 speed: 480 Mb/s power: 100mA chip-ID: 0b05:1a52 class-ID: 0300 Device-2: 1-4:3 info: ASUSTek AURA LED Controller type: HID driver: hid-generic,usbhid interfaces: 2 rev: 2.0 speed: 12 Mb/s power: 16mA chip-ID: 0b05:19af class-ID: 0300 serial: 9876543210 Hub-2: 1-10:4 info: ASMedia ASM1074 High-Speed hub ports: 4 rev: 2.1 speed: 480 Mb/s power: 100mA chip-ID: 174c:2074 class-ID: 0900 Device-1: 1-10.3:6 info: Fujitsu Siemens s KB955 USB Keyboard type: Keyboard,HID driver: hid-generic,usbhid interfaces: 2 rev: 1.1 speed: 1.5 Mb/s power: 100mA chip-ID: 0bf8:102e class-ID: 0300 Device-2: 1-10.4:8 info: Logitech G5 Laser Mouse type: Mouse,HID driver: hid-generic,usbhid interfaces: 2 rev: 2.0 speed: 12 Mb/s power: 98mA chip-ID: 046d:c049 class-ID: 0300 Hub-3: 1-11:5 info: Genesys Logic Hub ports: 4 rev: 2.0 speed: 480 Mb/s power: 100mA chip-ID: 05e3:0608 class-ID: 0900 Hub-4: 1-13:7 info: Genesys Logic Hub ports: 4 rev: 2.0 speed: 480 Mb/s power: 100mA chip-ID: 05e3:0608 class-ID: 0900 Hub-5: 2-0:1 info: Super-speed hub ports: 8 rev: 3.1 speed: 20 Gb/s chip-ID: 1d6b:0003 class-ID: 0900 Hub-6: 2-8:2 info: ASMedia ASM1074 SuperSpeed hub ports: 4 rev: 3.0 speed: 5 Gb/s power: 8mA chip-ID: 174c:3074 class-ID: 0900 Sensors: System Temperatures: cpu: 32.5 C mobo: 30.0 C gpu: nvidia temp: 36 C Fan Speeds (RPM): fan-1: 0 fan-2: 808 fan-3: 0 fan-4: 0 fan-5: 447 fan-6: 453 fan-7: 2288 gpu: nvidia fan: 0% ``` Thanks in advance, ToM Issue URL : https://github.com/alsa-project/alsa-lib/issues/325 Repository URL: https://github.com/alsa-project/alsa-lib

1 0

ucm2: MediaTek: mt8395-evk: Add alsa-ucm support
by GitHub pull_request - opened 09 Jun '23

09 Jun '23

alsa-project/alsa-ucm-conf pull request #322 was opened from zoran055: Add alsa-ucm support for the MediaTek mt8395-evk platform. Request URL : https://github.com/alsa-project/alsa-ucm-conf/pull/322 Patch URL : https://github.com/alsa-project/alsa-ucm-conf/pull/322.patch Repository URL: https://github.com/alsa-project/alsa-ucm-conf

1 0

ucm2: MediaTek: mt8390-evk: Add alsa-ucm support
by GitHub pull_request - opened 09 Jun '23

09 Jun '23

alsa-project/alsa-ucm-conf pull request #321 was opened from zoran055: Add alsa-ucm support for the MediaTek mt8390-evk platform. Request URL : https://github.com/alsa-project/alsa-ucm-conf/pull/321 Patch URL : https://github.com/alsa-project/alsa-ucm-conf/pull/321.patch Repository URL: https://github.com/alsa-project/alsa-ucm-conf

1 0

[PATCH v2 0/2] Fix error check and cleanup for JH7110 TDM
by Walker Chen 09 Jun '23

09 Jun '23

Some minor issues were found during addtional testing and static analysis. The first patch fix the error check for the return value of devm_reset_control_array_get_exclusive(). The second patch drop some unused macros. Fixes: fd4762b6b5cf ("ASoC: starfive: Add JH7110 TDM driver") Changes since v1: - Fix an error check in jh7110_tdm_clk_reset_get(). - Return to use *_BIT to indicate the shift and remove some unused macros. --- v1: https://lore.kernel.org/all/20230607081439.1517-1-walker.chen@starfivetech.… Walker Chen (2): ASoC: starfive: Fix an error check in jh7110_tdm_clk_reset_get() ASoC: starfive: Remove some unused macros sound/soc/starfive/jh7110_tdm.c | 15 +++------------ 1 file changed, 3 insertions(+), 12 deletions(-) -- 2.17.1

3 4

[PATCH v1] ASoC: starfive: Cleanup and fix error check for JH7110 TDM
by Walker Chen 09 Jun '23

09 Jun '23

Some minor issues were found during addtional testing and static analysis. The patch fixed these minor issues. 1.Use BIT() macro to indicate configuration for TDM registers. 2.Fix the check for devm_reset_control_array_get_exclusive return value. The devm_reset_control_array_get_exclusive() function may return NULL if it's an optional request. If optional is intended then NULL should not be treated as an error case, but as a special kind of success case. So here the IS_ERR() is used to check better. Fixes: fd4762b6b5cf ("ASoC: starfive: Add JH7110 TDM driver") Signed-off-by: Walker Chen <walker.chen(a)starfivetech.com> --- Fix the following issue: https://lore.kernel.org/all/ZH7t6Nc+NTcGpq%2F3@moroto/ --- sound/soc/starfive/jh7110_tdm.c | 200 +++++++++++--------------------- 1 file changed, 68 insertions(+), 132 deletions(-) diff --git a/sound/soc/starfive/jh7110_tdm.c b/sound/soc/starfive/jh7110_tdm.c index 973b910d2d3e..139ff091672e 100644 --- a/sound/soc/starfive/jh7110_tdm.c +++ b/sound/soc/starfive/jh7110_tdm.c @@ -24,63 +24,33 @@ #include <sound/soc.h> #include <sound/soc-dai.h> +/* Register offsets for JH7110 TDM device */ #define TDM_PCMGBCR 0x00 - #define PCMGBCR_MASK 0x1e - #define PCMGBCR_ENABLE BIT(0) - #define PCMGBCR_TRITXEN BIT(4) - #define CLKPOL_BIT 5 - #define TRITXEN_BIT 4 - #define ELM_BIT 3 - #define SYNCM_BIT 2 - #define MS_BIT 1 #define TDM_PCMTXCR 0x04 - #define PCMTXCR_TXEN BIT(0) - #define IFL_BIT 11 - #define WL_BIT 8 - #define SSCALE_BIT 4 - #define SL_BIT 2 - #define LRJ_BIT 1 #define TDM_PCMRXCR 0x08 - #define PCMRXCR_RXEN BIT(0) - #define PCMRXCR_RXSL_MASK 0xc - #define PCMRXCR_RXSL_16BIT 0x4 - #define PCMRXCR_RXSL_32BIT 0x8 - #define PCMRXCR_SCALE_MASK 0xf0 - #define PCMRXCR_SCALE_1CH 0x10 #define TDM_PCMDIV 0x0c -#define JH7110_TDM_FIFO 0x170c0000 -#define JH7110_TDM_FIFO_DEPTH 32 +/* Bit definition for TDM_PCMGBCR */ +#define TDM_PCMGBCR_SYNCM_LONG BIT(2) +#define TDM_PCMGBCR_MS_SLAVE BIT(1) +#define TDM_PCMGBCR_EN BIT(0) -enum TDM_MASTER_SLAVE_MODE { - TDM_AS_MASTER = 0, - TDM_AS_SLAVE, -}; +/* Bit definition for TDM_PCMTXCR */ +#define TDM_PCMTXCR_LEFT_J BIT(1) +#define TDM_PCMTXCR_TXEN BIT(0) -enum TDM_CLKPOL { - /* tx raising and rx falling */ - TDM_TX_RASING_RX_FALLING = 0, - /* tx falling and rx raising */ - TDM_TX_FALLING_RX_RASING, -}; +/* Bit definition for TDM_PCMRXCR */ +#define TDM_PCMRXCR_LEFT_J BIT(1) +#define TDM_PCMRXCR_RXEN BIT(0) -enum TDM_ELM { - /* only work while SYNCM=0 */ - TDM_ELM_LATE = 0, - TDM_ELM_EARLY, -}; - -enum TDM_SYNCM { - /* short frame sync */ - TDM_SYNCM_SHORT = 0, - /* long frame sync */ - TDM_SYNCM_LONG, -}; +#define JH7110_TDM_FIFO 0x170c0000 +#define JH7110_TDM_FIFO_DEPTH 32 -enum TDM_IFL { - /* FIFO to send or received : half-1/2, Quarter-1/4 */ - TDM_FIFO_HALF = 0, - TDM_FIFO_QUARTER, +enum TDM_SL { + /* send or received slot length */ + TDM_8BIT_SLOT_LEN = 0, + TDM_16BIT_SLOT_LEN, + TDM_32BIT_SLOT_LEN, }; enum TDM_WL { @@ -92,43 +62,24 @@ enum TDM_WL { TDM_32BIT_WORD_LEN, }; -enum TDM_SL { - /* send or received slot length */ - TDM_8BIT_SLOT_LEN = 0, - TDM_16BIT_SLOT_LEN, - TDM_32BIT_SLOT_LEN, -}; - -enum TDM_LRJ { - /* left-justify or right-justify */ - TDM_RIGHT_JUSTIFY = 0, - TDM_LEFT_JUSTIFT, -}; - -struct tdm_chan_cfg { - enum TDM_IFL ifl; - enum TDM_WL wl; - unsigned char sscale; - enum TDM_SL sl; - enum TDM_LRJ lrj; - unsigned char enable; -}; - struct jh7110_tdm_dev { void __iomem *tdm_base; struct device *dev; struct clk_bulk_data clks[6]; struct reset_control *resets; - enum TDM_CLKPOL clkpolity; - enum TDM_ELM elm; - enum TDM_SYNCM syncm; - enum TDM_MASTER_SLAVE_MODE ms_mode; + /* related to PCMTXCR */ + u16 txwl; + u16 txsscale; + u16 txsl; - struct tdm_chan_cfg tx; - struct tdm_chan_cfg rx; + /* related to PCMRXCR */ + u16 rxwl; + u16 rxsscale; + u16 rxsl; u16 syncdiv; + u16 syncm; u32 samplerate; u32 pcmclk; @@ -166,13 +117,13 @@ static void jh7110_tdm_start(struct jh7110_tdm_dev *tdm, u32 data; data = jh7110_tdm_readl(tdm, TDM_PCMGBCR); - jh7110_tdm_writel(tdm, TDM_PCMGBCR, data | PCMGBCR_ENABLE); + jh7110_tdm_writel(tdm, TDM_PCMGBCR, data | TDM_PCMGBCR_EN); /* restore context */ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) - jh7110_tdm_writel(tdm, TDM_PCMTXCR, tdm->saved_pcmtxcr | PCMTXCR_TXEN); + jh7110_tdm_writel(tdm, TDM_PCMTXCR, tdm->saved_pcmtxcr | TDM_PCMTXCR_TXEN); else - jh7110_tdm_writel(tdm, TDM_PCMRXCR, tdm->saved_pcmrxcr | PCMRXCR_RXEN); + jh7110_tdm_writel(tdm, TDM_PCMRXCR, tdm->saved_pcmrxcr | TDM_PCMRXCR_RXEN); } static void jh7110_tdm_stop(struct jh7110_tdm_dev *tdm, @@ -182,11 +133,11 @@ static void jh7110_tdm_stop(struct jh7110_tdm_dev *tdm, if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { val = jh7110_tdm_readl(tdm, TDM_PCMTXCR); - val &= ~PCMTXCR_TXEN; + val &= ~TDM_PCMTXCR_TXEN; jh7110_tdm_writel(tdm, TDM_PCMTXCR, val); } else { val = jh7110_tdm_readl(tdm, TDM_PCMRXCR); - val &= ~PCMRXCR_RXEN; + val &= ~TDM_PCMRXCR_RXEN; jh7110_tdm_writel(tdm, TDM_PCMRXCR, val); } } @@ -195,15 +146,15 @@ static int jh7110_tdm_syncdiv(struct jh7110_tdm_dev *tdm) { u32 sl, sscale, syncdiv; - if (tdm->rx.sl >= tdm->tx.sl) - sl = tdm->rx.sl; + if (tdm->rxsl >= tdm->txsl) + sl = tdm->rxsl; else - sl = tdm->tx.sl; + sl = tdm->txsl; - if (tdm->rx.sscale >= tdm->tx.sscale) - sscale = tdm->rx.sscale; + if (tdm->rxsscale >= tdm->txsscale) + sscale = tdm->rxsscale; else - sscale = tdm->tx.sscale; + sscale = tdm->txsscale; syncdiv = tdm->pcmclk / tdm->samplerate - 1; @@ -212,10 +163,10 @@ static int jh7110_tdm_syncdiv(struct jh7110_tdm_dev *tdm) return -EINVAL; } - if (tdm->syncm == TDM_SYNCM_LONG && - (tdm->rx.sscale <= 1 || tdm->tx.sscale <= 1) && + if (tdm->syncm == TDM_PCMGBCR_SYNCM_LONG && + (tdm->rxsscale <= 1 || tdm->txsscale <= 1) && ((syncdiv + 1) <= sl)) { - dev_err(tdm->dev, "Wrong syncdiv! It must be (syncdiv+1) > max[tx.sl, rx.sl]\n"); + dev_err(tdm->dev, "Wrong syncdiv! It must be (syncdiv+1) > max[txsl, rxsl]\n"); return -EINVAL; } @@ -233,17 +184,15 @@ static int jh7110_tdm_config(struct jh7110_tdm_dev *tdm, if (ret) return ret; - datarx = (tdm->rx.ifl << IFL_BIT) | - (tdm->rx.wl << WL_BIT) | - (tdm->rx.sscale << SSCALE_BIT) | - (tdm->rx.sl << SL_BIT) | - (tdm->rx.lrj << LRJ_BIT); + datarx = (tdm->rxwl << 8) | + (tdm->rxsscale << 4) | + (tdm->rxsl << 2) | + TDM_PCMRXCR_LEFT_J; - datatx = (tdm->tx.ifl << IFL_BIT) | - (tdm->tx.wl << WL_BIT) | - (tdm->tx.sscale << SSCALE_BIT) | - (tdm->tx.sl << SL_BIT) | - (tdm->tx.lrj << LRJ_BIT); + datatx = (tdm->txwl << 8) | + (tdm->txsscale << 4) | + (tdm->txsl << 2) | + TDM_PCMTXCR_LEFT_J; if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) jh7110_tdm_writel(tdm, TDM_PCMTXCR, datatx); @@ -346,7 +295,8 @@ static int jh7110_tdm_hw_params(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) { struct jh7110_tdm_dev *tdm = snd_soc_dai_get_drvdata(dai); - int chan_wl, chan_sl, chan_nr; + int chan_nr; + unsigned short chan_wl, chan_sl; unsigned int data_width; unsigned int dma_bus_width; struct snd_dmaengine_dai_dma_data *dma_data = NULL; @@ -389,15 +339,15 @@ static int jh7110_tdm_hw_params(struct snd_pcm_substream *substream, } if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { - tdm->tx.wl = chan_wl; - tdm->tx.sl = chan_sl; - tdm->tx.sscale = chan_nr; + tdm->txwl = chan_wl; + tdm->txsl = chan_sl; + tdm->txsscale = chan_nr; tdm->play_dma_data.addr_width = dma_bus_width; dma_data = &tdm->play_dma_data; } else { - tdm->rx.wl = chan_wl; - tdm->rx.sl = chan_sl; - tdm->rx.sscale = chan_nr; + tdm->rxwl = chan_wl; + tdm->rxsl = chan_sl; + tdm->rxsscale = chan_nr; tdm->capture_dma_data.addr_width = dma_bus_width; dma_data = &tdm->capture_dma_data; } @@ -444,15 +394,17 @@ static int jh7110_tdm_set_dai_fmt(struct snd_soc_dai *cpu_dai, struct jh7110_tdm_dev *tdm = snd_soc_dai_get_drvdata(cpu_dai); unsigned int gbcr; + gbcr = tdm->syncm; + /* set master/slave audio interface */ switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { case SND_SOC_DAIFMT_BP_FP: /* cpu is master */ - tdm->ms_mode = TDM_AS_MASTER; + gbcr &= ~TDM_PCMGBCR_MS_SLAVE; break; case SND_SOC_DAIFMT_BC_FC: /* codec is master */ - tdm->ms_mode = TDM_AS_SLAVE; + gbcr |= TDM_PCMGBCR_MS_SLAVE; break; case SND_SOC_DAIFMT_BC_FP: case SND_SOC_DAIFMT_BP_FC: @@ -462,10 +414,6 @@ static int jh7110_tdm_set_dai_fmt(struct snd_soc_dai *cpu_dai, return -EINVAL; } - gbcr = (tdm->clkpolity << CLKPOL_BIT) | - (tdm->elm << ELM_BIT) | - (tdm->syncm << SYNCM_BIT) | - (tdm->ms_mode << MS_BIT); jh7110_tdm_writel(tdm, TDM_PCMGBCR, gbcr); return 0; @@ -537,18 +485,7 @@ static const struct snd_dmaengine_pcm_config jh7110_dmaengine_pcm_config = { static void jh7110_tdm_init_params(struct jh7110_tdm_dev *tdm) { - tdm->clkpolity = TDM_TX_RASING_RX_FALLING; - tdm->elm = TDM_ELM_LATE; - tdm->syncm = TDM_SYNCM_SHORT; - - tdm->rx.ifl = TDM_FIFO_HALF; - tdm->tx.ifl = TDM_FIFO_HALF; - tdm->rx.wl = TDM_16BIT_WORD_LEN; - tdm->tx.wl = TDM_16BIT_WORD_LEN; - tdm->rx.sscale = 2; - tdm->tx.sscale = 2; - tdm->rx.lrj = TDM_LEFT_JUSTIFT; - tdm->tx.lrj = TDM_LEFT_JUSTIFT; + tdm->syncm = 0; tdm->play_dma_data.addr = JH7110_TDM_FIFO; tdm->play_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; @@ -580,10 +517,9 @@ static int jh7110_tdm_clk_reset_get(struct platform_device *pdev, } tdm->resets = devm_reset_control_array_get_exclusive(&pdev->dev); - if (IS_ERR_OR_NULL(tdm->resets)) { - ret = PTR_ERR(tdm->resets); - dev_err(&pdev->dev, "Failed to get tdm resets"); - return ret; + if (IS_ERR(tdm->resets)) { + dev_err(&pdev->dev, "Failed to get tdm resets\n"); + return PTR_ERR(tdm->resets); } return 0; @@ -649,12 +585,12 @@ static int jh7110_tdm_dev_remove(struct platform_device *pdev) return 0; } -static const struct of_device_id jh7110_tdm_of_match[] = { +static const struct of_device_id jh7110_tdm_match[] = { { .compatible = "starfive,jh7110-tdm", }, {} }; -MODULE_DEVICE_TABLE(of, jh7110_tdm_of_match); +MODULE_DEVICE_TABLE(of, jh7110_tdm_match); static const struct dev_pm_ops jh7110_tdm_pm_ops = { RUNTIME_PM_OPS(jh7110_tdm_runtime_suspend, @@ -666,7 +602,7 @@ static const struct dev_pm_ops jh7110_tdm_pm_ops = { static struct platform_driver jh7110_tdm_driver = { .driver = { .name = "jh7110-tdm", - .of_match_table = jh7110_tdm_of_match, + .of_match_table = jh7110_tdm_match, .pm = pm_ptr(&jh7110_tdm_pm_ops), }, .probe = jh7110_tdm_probe, -- 2.17.1

2 2

[PATCH v4 00/68] clk: Make determine_rate mandatory for muxes
by Maxime Ripard 09 Jun '23

09 Jun '23

Hi, This is a follow-up to a previous series that was printing a warning when a mux has a set_parent implementation but is missing determine_rate(). The rationale is that set_parent() is very likely to be useful when changing the rate, but it's determine_rate() that takes the parenting decision. If we're missing it, then the current parent is always going to be used, and thus set_parent() will not be used. The only exception being a direct call to clk_set_parent(), but those are fairly rare compared to clk_set_rate(). Stephen then asked to promote the warning to an error, and to fix up all the muxes that are in that situation first. So here it is :) It was build-tested on x86, arm and arm64. Affected drivers have been tracked down by the following coccinelle script: virtual report @ clk_ops @ identifier ops; position p; @@ struct clk_ops ops@p = { ... }; @ has_set_parent @ identifier clk_ops.ops; identifier set_parent_f; @@ struct clk_ops ops = { .set_parent = set_parent_f, }; @ has_determine_rate @ identifier clk_ops.ops; identifier determine_rate_f; @@ struct clk_ops ops = { .determine_rate = determine_rate_f, }; @ script:python depends on report && has_set_parent && !has_determine_rate @ ops << clk_ops.ops; set_parent_f << has_set_parent.set_parent_f; p << clk_ops.p; @@ coccilib.report.print_report(p[0], "ERROR: %s has set_parent (%s)" % (ops, set_parent_f)) Berlin is the only user still matching after this series has been applied, but it's because it uses a composite clock which throws the script off. The driver has been converted and shouldn't be a problem. Let me know what you think, Maxime Signed-off-by: Maxime Ripard <maxime(a)cerno.tech> --- Changes in v4: - Switch from __clk_mux_determine_rate to a new helper - Introduced unit tests for that new helper - Fix kunit regression - Reworded most of the commit logs - Link to v3: https://lore.kernel.org/r/20221018-clk-range-checks-fixes-v3-0-9a1358472d52… Changes in v3: - Rebased on top of next-20230404 - Link to v2: https://lore.kernel.org/r/20221018-clk-range-checks-fixes-v2-0-f6736dec138e… Changes in v2: - Drop all the patches already applied - Promote the clk registration warning to an error - Make all muxes use determine_rate - Link to v1: https://lore.kernel.org/r/20221018-clk-range-checks-fixes-v1-0-f3ef80518140… --- Maxime Ripard (66): clk: Export clk_hw_forward_rate_request() clk: test: Fix type sign of rounded rate variables clk: lan966x: Remove unused round_rate hook clk: nodrv: Add a determine_rate hook clk: test: Add a determine_rate hook clk: actions: composite: Add a determine_rate hook for pass clk clk: at91: main: Add a determine_rate hook clk: at91: sckc: Add a determine_rate hook clk: berlin: div: Add a determine_rate hook clk: cdce706: Add a determine_rate hook clk: k210: pll: Add a determine_rate hook clk: k210: aclk: Add a determine_rate hook clk: k210: mux: Add a determine_rate hook clk: lmk04832: clkout: Add a determine_rate hook clk: lochnagar: Add a determine_rate hook clk: qoriq: Add a determine_rate hook clk: si5341: Add a determine_rate hook clk: stm32f4: mux: Add a determine_rate hook clk: vc5: mux: Add a determine_rate hook clk: vc5: clkout: Add a determine_rate hook clk: wm831x: clkout: Add a determine_rate hook clk: davinci: da8xx-cfgchip: Add a determine_rate hook clk: davinci: da8xx-cfgchip: Add a determine_rate hook clk: imx: busy: Add a determine_rate hook clk: imx: fixup-mux: Add a determine_rate hook clk: imx: scu: Add a determine_rate hook clk: mediatek: cpumux: Add a determine_rate hook clk: pxa: Add a determine_rate hook clk: renesas: r9a06g032: Add a determine_rate hook clk: socfpga: gate: Add a determine_rate hook clk: stm32: core: Add a determine_rate hook clk: tegra: bpmp: Add a determine_rate hook clk: tegra: super: Add a determine_rate hook clk: tegra: periph: Add a determine_rate hook clk: ux500: prcmu: Add a determine_rate hook clk: ux500: sysctrl: Add a determine_rate hook clk: versatile: sp810: Add a determine_rate hook drm/tegra: sor: Add a determine_rate hook phy: cadence: sierra: Add a determine_rate hook phy: cadence: torrent: Add a determine_rate hook phy: ti: am654-serdes: Add a determine_rate hook phy: ti: j721e-wiz: Add a determine_rate hook rtc: sun6i: Add a determine_rate hook ASoC: tlv320aic32x4: Add a determine_rate hook clk: actions: composite: div: Switch to determine_rate clk: actions: composite: fact: Switch to determine_rate clk: at91: smd: Switch to determine_rate clk: axi-clkgen: Switch to determine_rate clk: cdce706: divider: Switch to determine_rate clk: cdce706: clkout: Switch to determine_rate clk: si5341: Switch to determine_rate clk: si5351: pll: Switch to determine_rate clk: si5351: msynth: Switch to determine_rate clk: si5351: clkout: Switch to determine_rate clk: da8xx: clk48: Switch to determine_rate clk: imx: scu: Switch to determine_rate clk: ingenic: cgu: Switch to determine_rate clk: ingenic: tcu: Switch to determine_rate clk: sprd: composite: Switch to determine_rate clk: st: flexgen: Switch to determine_rate clk: stm32: composite: Switch to determine_rate clk: tegra: periph: Switch to determine_rate clk: tegra: super: Switch to determine_rate ASoC: tlv320aic32x4: pll: Switch to determine_rate ASoC: tlv320aic32x4: div: Switch to determine_rate clk: Forbid to register a mux without determine_rate Stephen Boyd (2): clk: Move no reparent case into a separate function clk: Introduce clk_hw_determine_rate_no_reparent() drivers/clk/actions/owl-composite.c | 35 ++++-- drivers/clk/at91/clk-main.c | 1 + drivers/clk/at91/clk-smd.c | 29 +++-- drivers/clk/at91/sckc.c | 1 + drivers/clk/berlin/berlin2-div.c | 1 + drivers/clk/clk-axi-clkgen.c | 14 ++- drivers/clk/clk-cdce706.c | 30 ++--- drivers/clk/clk-k210.c | 3 + drivers/clk/clk-lan966x.c | 17 --- drivers/clk/clk-lmk04832.c | 1 + drivers/clk/clk-lochnagar.c | 1 + drivers/clk/clk-qoriq.c | 1 + drivers/clk/clk-si5341.c | 19 ++-- drivers/clk/clk-si5351.c | 67 ++++++----- drivers/clk/clk-stm32f4.c | 1 + drivers/clk/clk-versaclock5.c | 2 + drivers/clk/clk-wm831x.c | 1 + drivers/clk/clk.c | 108 ++++++++++++------ drivers/clk/clk_test.c | 180 +++++++++++++++++++++++++++++- drivers/clk/davinci/da8xx-cfgchip.c | 12 +- drivers/clk/imx/clk-busy.c | 1 + drivers/clk/imx/clk-fixup-mux.c | 1 + drivers/clk/imx/clk-scu.c | 20 +++- drivers/clk/ingenic/cgu.c | 15 +-- drivers/clk/ingenic/tcu.c | 19 ++-- drivers/clk/mediatek/clk-cpumux.c | 1 + drivers/clk/pxa/clk-pxa.c | 1 + drivers/clk/renesas/r9a06g032-clocks.c | 1 + drivers/clk/socfpga/clk-gate.c | 1 + drivers/clk/sprd/composite.c | 16 ++- drivers/clk/st/clk-flexgen.c | 15 +-- drivers/clk/stm32/clk-stm32-core.c | 33 ++++-- drivers/clk/tegra/clk-bpmp.c | 1 + drivers/clk/tegra/clk-periph.c | 17 ++- drivers/clk/tegra/clk-super.c | 16 ++- drivers/clk/ux500/clk-prcmu.c | 1 + drivers/clk/ux500/clk-sysctrl.c | 1 + drivers/clk/versatile/clk-sp810.c | 1 + drivers/gpu/drm/tegra/sor.c | 1 + drivers/phy/cadence/phy-cadence-sierra.c | 1 + drivers/phy/cadence/phy-cadence-torrent.c | 1 + drivers/phy/ti/phy-am654-serdes.c | 1 + drivers/phy/ti/phy-j721e-wiz.c | 1 + drivers/rtc/rtc-sun6i.c | 1 + include/linux/clk-provider.h | 2 + sound/soc/codecs/tlv320aic32x4-clk.c | 33 +++--- 46 files changed, 527 insertions(+), 199 deletions(-) --- base-commit: 145e5cddfe8b4bf607510b2dcf630d95f4db420f change-id: 20221018-clk-range-checks-fixes-2039f3523240 Best regards, -- Maxime Ripard <maxime(a)cerno.tech>

2 4

[PATCH] ASoC: stac9766: fix build errors with REGMAP_AC97
by Randy Dunlap 09 Jun '23

09 Jun '23

Select REGMAP_AC97 to fix these build errors: ERROR: modpost: "regmap_ac97_default_volatile" [sound/soc/codecs/snd-soc-stac9766.ko] undefined! ERROR: modpost: "__regmap_init_ac97" [sound/soc/codecs/snd-soc-stac9766.ko] undefined! Fixes: 6bbf787bb70c ("ASoC: stac9766: Convert to regmap") Signed-off-by: Randy Dunlap <rdunlap(a)infradead.org> Cc: Lars-Peter Clausen <lars(a)metafoo.de> Cc: Mark Brown <broonie(a)kernel.org> Cc: Liam Girdwood <lgirdwood(a)gmail.com> Cc: alsa-devel(a)alsa-project.org --- sound/soc/codecs/Kconfig | 1 + 1 file changed, 1 insertion(+) diff -- a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -1693,6 +1693,7 @@ config SND_SOC_STA529 config SND_SOC_STAC9766 tristate depends on SND_SOC_AC97_BUS + select REGMAP_AC97 config SND_SOC_STI_SAS tristate "codec Audio support for STI SAS codec"

1 0

[PATCH] ASoC: max98088: clean up some inconsistent indenting
by Jiapeng Chong 08 Jun '23

08 Jun '23

No functional modification involved. sound/soc/codecs/max98088.c:316 m98088_eq_band() warn: inconsistent indenting. Reported-by: Abaci Robot <abaci(a)linux.alibaba.com> Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=5461 Signed-off-by: Jiapeng Chong <jiapeng.chong(a)linux.alibaba.com> --- sound/soc/codecs/max98088.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/sound/soc/codecs/max98088.c b/sound/soc/codecs/max98088.c index fb136e2b849b..8b56ee550c09 100644 --- a/sound/soc/codecs/max98088.c +++ b/sound/soc/codecs/max98088.c @@ -310,24 +310,24 @@ static const struct regmap_config max98088_regmap = { static void m98088_eq_band(struct snd_soc_component *component, unsigned int dai, unsigned int band, u16 *coefs) { - unsigned int eq_reg; - unsigned int i; + unsigned int eq_reg; + unsigned int i; if (WARN_ON(band > 4) || WARN_ON(dai > 1)) return; - /* Load the base register address */ - eq_reg = dai ? M98088_REG_84_DAI2_EQ_BASE : M98088_REG_52_DAI1_EQ_BASE; + /* Load the base register address */ + eq_reg = dai ? M98088_REG_84_DAI2_EQ_BASE : M98088_REG_52_DAI1_EQ_BASE; - /* Add the band address offset, note adjustment for word address */ - eq_reg += band * (M98088_COEFS_PER_BAND << 1); + /* Add the band address offset, note adjustment for word address */ + eq_reg += band * (M98088_COEFS_PER_BAND << 1); - /* Step through the registers and coefs */ - for (i = 0; i < M98088_COEFS_PER_BAND; i++) { - snd_soc_component_write(component, eq_reg++, M98088_BYTE1(coefs[i])); - snd_soc_component_write(component, eq_reg++, M98088_BYTE0(coefs[i])); - } + /* Step through the registers and coefs */ + for (i = 0; i < M98088_COEFS_PER_BAND; i++) { + snd_soc_component_write(component, eq_reg++, M98088_BYTE1(coefs[i])); + snd_soc_component_write(component, eq_reg++, M98088_BYTE0(coefs[i])); + } } /* -- 2.20.1.7.g153144c

2 1