April 2022 - Alsa-devel - mailman.alsa-project.org

[PATCH] [v4] m68k: coldfire: drop ISA_DMA_API support
by Arnd Bergmann 26 Apr '22

26 Apr '22

From: Arnd Bergmann <arnd(a)arndb.de> After a build regression report, I took a look at possible users of CONFIG_ISA_DMA_API on m68k and found none, which Greg confirmed. The CONFIG_GENERIC_ISA_DMA option in turn is only needed to implement ISA_DMA_API, and is clearly not used on the platforms with ISA support. The CONFIG_ISA support for AMIGA_PCMCIA is probably also unneeded, but this is less clear. Unlike other PCMCIA implementations, this one does not use the drivers/pcmcia subsystem at all and just supports the "apne" network driver. When it was first added, one could use ISA drivers on it as well, but this probably broke at some point. With no reason to keep this, let's just drop the corresponding files and prevent the remaining ISA drivers that use this from getting built. The remaining definitions in asm/dma.h are used for PCI support. Link: https://lore.kernel.org/lkml/9e5ee1c3-ca80-f343-a1f5-66f3dd1c0727@linux-m68… Acked-by: Geert Uytterhoeven <geert(a)linux-m68k.org> Acked-by: Ulf Hansson <ulf.hansson(a)linaro.org> # For MMC Acked-by: Greg Ungerer <gerg(a)linux-m68k.org> Signed-off-by: Arnd Bergmann <arnd(a)arndb.de> --- v4: actually fix the build regression v3: fix build regression v2: drop GENERIC_ISA_DMA as well, add some background on CONFIG_ISA. --- arch/m68k/Kconfig.bus | 10 - arch/m68k/coldfire/Makefile | 2 +- arch/m68k/coldfire/dma.c | 43 ---- arch/m68k/include/asm/dma.h | 483 ------------------------------------ arch/m68k/mm/motorola.c | 1 - drivers/mmc/host/Kconfig | 2 +- sound/core/Makefile | 2 - sound/isa/Kconfig | 2 +- 8 files changed, 3 insertions(+), 542 deletions(-) delete mode 100644 arch/m68k/coldfire/dma.c diff --git a/arch/m68k/Kconfig.bus b/arch/m68k/Kconfig.bus index d1e93a39cd3b..d5c0b2990ee1 100644 --- a/arch/m68k/Kconfig.bus +++ b/arch/m68k/Kconfig.bus @@ -56,16 +56,6 @@ config ATARI_ROM_ISA The only driver currently using this adapter is the EtherNEC driver for RTL8019AS based NE2000 compatible network cards. -config GENERIC_ISA_DMA - def_bool ISA - source "drivers/zorro/Kconfig" endif - -if COLDFIRE - -config ISA_DMA_API - def_bool !M5272 - -endif diff --git a/arch/m68k/coldfire/Makefile b/arch/m68k/coldfire/Makefile index a3e18d73d8b8..9419a6c1f036 100644 --- a/arch/m68k/coldfire/Makefile +++ b/arch/m68k/coldfire/Makefile @@ -15,7 +15,7 @@ asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1 -obj-$(CONFIG_COLDFIRE) += cache.o clk.o device.o dma.o entry.o vectors.o +obj-$(CONFIG_COLDFIRE) += cache.o clk.o device.o entry.o vectors.o obj-$(CONFIG_M5206) += m5206.o intc.o reset.o obj-$(CONFIG_M5206e) += m5206.o intc.o reset.o obj-$(CONFIG_M520x) += m520x.o intc-simr.o reset.o diff --git a/arch/m68k/coldfire/dma.c b/arch/m68k/coldfire/dma.c deleted file mode 100644 index c3279f7467d7..000000000000 --- a/arch/m68k/coldfire/dma.c +++ /dev/null @@ -1,43 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/***************************************************************************/ - -/* - * dma.c -- Freescale ColdFire DMA support - * - * Copyright (C) 2007, Greg Ungerer (gerg(a)snapgear.com) - */ - -/***************************************************************************/ - -#include <linux/kernel.h> -#include <linux/module.h> -#include <asm/dma.h> -#include <asm/coldfire.h> -#include <asm/mcfsim.h> -#include <asm/mcfdma.h> - -/***************************************************************************/ - -/* - * DMA channel base address table. - */ -unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = { -#ifdef MCFDMA_BASE0 - MCFDMA_BASE0, -#endif -#ifdef MCFDMA_BASE1 - MCFDMA_BASE1, -#endif -#ifdef MCFDMA_BASE2 - MCFDMA_BASE2, -#endif -#ifdef MCFDMA_BASE3 - MCFDMA_BASE3, -#endif -}; -EXPORT_SYMBOL(dma_base_addr); - -unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS]; -EXPORT_SYMBOL(dma_device_address); - -/***************************************************************************/ diff --git a/arch/m68k/include/asm/dma.h b/arch/m68k/include/asm/dma.h index ae2021964e32..f6c5e0dfb4e5 100644 --- a/arch/m68k/include/asm/dma.h +++ b/arch/m68k/include/asm/dma.h @@ -2,493 +2,10 @@ #ifndef _M68K_DMA_H #define _M68K_DMA_H 1 -#ifdef CONFIG_COLDFIRE -/* - * ColdFire DMA Model: - * ColdFire DMA supports two forms of DMA: Single and Dual address. Single - * address mode emits a source address, and expects that the device will either - * pick up the data (DMA READ) or source data (DMA WRITE). This implies that - * the device will place data on the correct byte(s) of the data bus, as the - * memory transactions are always 32 bits. This implies that only 32 bit - * devices will find single mode transfers useful. Dual address DMA mode - * performs two cycles: source read and destination write. ColdFire will - * align the data so that the device will always get the correct bytes, thus - * is useful for 8 and 16 bit devices. This is the mode that is supported - * below. - * - * AUG/22/2000 : added support for 32-bit Dual-Address-Mode (K) 2000 - * Oliver Kamphenkel (O.Kamphenkel(a)tu-bs.de) - * - * AUG/25/2000 : added support for 8, 16 and 32-bit Single-Address-Mode (K)2000 - * Oliver Kamphenkel (O.Kamphenkel(a)tu-bs.de) - * - * APR/18/2002 : added proper support for MCF5272 DMA controller. - * Arthur Shipkowski (art(a)videon-central.com) - */ - -#include <asm/coldfire.h> -#include <asm/mcfsim.h> -#include <asm/mcfdma.h> - -/* - * Set number of channels of DMA on ColdFire for different implementations. - */ -#if defined(CONFIG_M5249) || defined(CONFIG_M5307) || defined(CONFIG_M5407) || \ - defined(CONFIG_M523x) || defined(CONFIG_M527x) || \ - defined(CONFIG_M528x) || defined(CONFIG_M525x) - -#define MAX_M68K_DMA_CHANNELS 4 -#elif defined(CONFIG_M5272) -#define MAX_M68K_DMA_CHANNELS 1 -#elif defined(CONFIG_M53xx) -#define MAX_M68K_DMA_CHANNELS 0 -#else -#define MAX_M68K_DMA_CHANNELS 2 -#endif - -extern unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS]; -extern unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS]; - -#if !defined(CONFIG_M5272) -#define DMA_MODE_WRITE_BIT 0x01 /* Memory/IO to IO/Memory select */ -#define DMA_MODE_WORD_BIT 0x02 /* 8 or 16 bit transfers */ -#define DMA_MODE_LONG_BIT 0x04 /* or 32 bit transfers */ -#define DMA_MODE_SINGLE_BIT 0x08 /* single-address-mode */ - -/* I/O to memory, 8 bits, mode */ -#define DMA_MODE_READ 0 -/* memory to I/O, 8 bits, mode */ -#define DMA_MODE_WRITE 1 -/* I/O to memory, 16 bits, mode */ -#define DMA_MODE_READ_WORD 2 -/* memory to I/O, 16 bits, mode */ -#define DMA_MODE_WRITE_WORD 3 -/* I/O to memory, 32 bits, mode */ -#define DMA_MODE_READ_LONG 4 -/* memory to I/O, 32 bits, mode */ -#define DMA_MODE_WRITE_LONG 5 -/* I/O to memory, 8 bits, single-address-mode */ -#define DMA_MODE_READ_SINGLE 8 -/* memory to I/O, 8 bits, single-address-mode */ -#define DMA_MODE_WRITE_SINGLE 9 -/* I/O to memory, 16 bits, single-address-mode */ -#define DMA_MODE_READ_WORD_SINGLE 10 -/* memory to I/O, 16 bits, single-address-mode */ -#define DMA_MODE_WRITE_WORD_SINGLE 11 -/* I/O to memory, 32 bits, single-address-mode */ -#define DMA_MODE_READ_LONG_SINGLE 12 -/* memory to I/O, 32 bits, single-address-mode */ -#define DMA_MODE_WRITE_LONG_SINGLE 13 - -#else /* CONFIG_M5272 is defined */ - -/* Source static-address mode */ -#define DMA_MODE_SRC_SA_BIT 0x01 -/* Two bits to select between all four modes */ -#define DMA_MODE_SSIZE_MASK 0x06 -/* Offset to shift bits in */ -#define DMA_MODE_SSIZE_OFF 0x01 -/* Destination static-address mode */ -#define DMA_MODE_DES_SA_BIT 0x10 -/* Two bits to select between all four modes */ -#define DMA_MODE_DSIZE_MASK 0x60 -/* Offset to shift bits in */ -#define DMA_MODE_DSIZE_OFF 0x05 -/* Size modifiers */ -#define DMA_MODE_SIZE_LONG 0x00 -#define DMA_MODE_SIZE_BYTE 0x01 -#define DMA_MODE_SIZE_WORD 0x02 -#define DMA_MODE_SIZE_LINE 0x03 - -/* - * Aliases to help speed quick ports; these may be suboptimal, however. They - * do not include the SINGLE mode modifiers since the MCF5272 does not have a - * mode where the device is in control of its addressing. - */ - -/* I/O to memory, 8 bits, mode */ -#define DMA_MODE_READ ((DMA_MODE_SIZE_BYTE << DMA_MODE_DSIZE_OFF) | (DMA_MODE_SIZE_BYTE << DMA_MODE_SSIZE_OFF) | DMA_SRC_SA_BIT) -/* memory to I/O, 8 bits, mode */ -#define DMA_MODE_WRITE ((DMA_MODE_SIZE_BYTE << DMA_MODE_DSIZE_OFF) | (DMA_MODE_SIZE_BYTE << DMA_MODE_SSIZE_OFF) | DMA_DES_SA_BIT) -/* I/O to memory, 16 bits, mode */ -#define DMA_MODE_READ_WORD ((DMA_MODE_SIZE_WORD << DMA_MODE_DSIZE_OFF) | (DMA_MODE_SIZE_WORD << DMA_MODE_SSIZE_OFF) | DMA_SRC_SA_BIT) -/* memory to I/O, 16 bits, mode */ -#define DMA_MODE_WRITE_WORD ((DMA_MODE_SIZE_WORD << DMA_MODE_DSIZE_OFF) | (DMA_MODE_SIZE_WORD << DMA_MODE_SSIZE_OFF) | DMA_DES_SA_BIT) -/* I/O to memory, 32 bits, mode */ -#define DMA_MODE_READ_LONG ((DMA_MODE_SIZE_LONG << DMA_MODE_DSIZE_OFF) | (DMA_MODE_SIZE_LONG << DMA_MODE_SSIZE_OFF) | DMA_SRC_SA_BIT) -/* memory to I/O, 32 bits, mode */ -#define DMA_MODE_WRITE_LONG ((DMA_MODE_SIZE_LONG << DMA_MODE_DSIZE_OFF) | (DMA_MODE_SIZE_LONG << DMA_MODE_SSIZE_OFF) | DMA_DES_SA_BIT) - -#endif /* !defined(CONFIG_M5272) */ - -#if !defined(CONFIG_M5272) -/* enable/disable a specific DMA channel */ -static __inline__ void enable_dma(unsigned int dmanr) -{ - volatile unsigned short *dmawp; - -#ifdef DMA_DEBUG - printk("enable_dma(dmanr=%d)\n", dmanr); -#endif - - dmawp = (unsigned short *) dma_base_addr[dmanr]; - dmawp[MCFDMA_DCR] |= MCFDMA_DCR_EEXT; -} - -static __inline__ void disable_dma(unsigned int dmanr) -{ - volatile unsigned short *dmawp; - volatile unsigned char *dmapb; - -#ifdef DMA_DEBUG - printk("disable_dma(dmanr=%d)\n", dmanr); -#endif - - dmawp = (unsigned short *) dma_base_addr[dmanr]; - dmapb = (unsigned char *) dma_base_addr[dmanr]; - - /* Turn off external requests, and stop any DMA in progress */ - dmawp[MCFDMA_DCR] &= ~MCFDMA_DCR_EEXT; - dmapb[MCFDMA_DSR] = MCFDMA_DSR_DONE; -} - -/* - * Clear the 'DMA Pointer Flip Flop'. - * Write 0 for LSB/MSB, 1 for MSB/LSB access. - * Use this once to initialize the FF to a known state. - * After that, keep track of it. :-) - * --- In order to do that, the DMA routines below should --- - * --- only be used while interrupts are disabled! --- - * - * This is a NOP for ColdFire. Provide a stub for compatibility. - */ -static __inline__ void clear_dma_ff(unsigned int dmanr) -{ -} - -/* set mode (above) for a specific DMA channel */ -static __inline__ void set_dma_mode(unsigned int dmanr, char mode) -{ - - volatile unsigned char *dmabp; - volatile unsigned short *dmawp; - -#ifdef DMA_DEBUG - printk("set_dma_mode(dmanr=%d,mode=%d)\n", dmanr, mode); -#endif - - dmabp = (unsigned char *) dma_base_addr[dmanr]; - dmawp = (unsigned short *) dma_base_addr[dmanr]; - - /* Clear config errors */ - dmabp[MCFDMA_DSR] = MCFDMA_DSR_DONE; - - /* Set command register */ - dmawp[MCFDMA_DCR] = - MCFDMA_DCR_INT | /* Enable completion irq */ - MCFDMA_DCR_CS | /* Force one xfer per request */ - MCFDMA_DCR_AA | /* Enable auto alignment */ - /* single-address-mode */ - ((mode & DMA_MODE_SINGLE_BIT) ? MCFDMA_DCR_SAA : 0) | - /* sets s_rw (-> r/w) high if Memory to I/0 */ - ((mode & DMA_MODE_WRITE_BIT) ? MCFDMA_DCR_S_RW : 0) | - /* Memory to I/O or I/O to Memory */ - ((mode & DMA_MODE_WRITE_BIT) ? MCFDMA_DCR_SINC : MCFDMA_DCR_DINC) | - /* 32 bit, 16 bit or 8 bit transfers */ - ((mode & DMA_MODE_WORD_BIT) ? MCFDMA_DCR_SSIZE_WORD : - ((mode & DMA_MODE_LONG_BIT) ? MCFDMA_DCR_SSIZE_LONG : - MCFDMA_DCR_SSIZE_BYTE)) | - ((mode & DMA_MODE_WORD_BIT) ? MCFDMA_DCR_DSIZE_WORD : - ((mode & DMA_MODE_LONG_BIT) ? MCFDMA_DCR_DSIZE_LONG : - MCFDMA_DCR_DSIZE_BYTE)); - -#ifdef DEBUG_DMA - printk("%s(%d): dmanr=%d DSR[%x]=%x DCR[%x]=%x\n", __FILE__, __LINE__, - dmanr, (int) &dmabp[MCFDMA_DSR], dmabp[MCFDMA_DSR], - (int) &dmawp[MCFDMA_DCR], dmawp[MCFDMA_DCR]); -#endif -} - -/* Set transfer address for specific DMA channel */ -static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int a) -{ - volatile unsigned short *dmawp; - volatile unsigned int *dmalp; - -#ifdef DMA_DEBUG - printk("set_dma_addr(dmanr=%d,a=%x)\n", dmanr, a); -#endif - - dmawp = (unsigned short *) dma_base_addr[dmanr]; - dmalp = (unsigned int *) dma_base_addr[dmanr]; - - /* Determine which address registers are used for memory/device accesses */ - if (dmawp[MCFDMA_DCR] & MCFDMA_DCR_SINC) { - /* Source incrementing, must be memory */ - dmalp[MCFDMA_SAR] = a; - /* Set dest address, must be device */ - dmalp[MCFDMA_DAR] = dma_device_address[dmanr]; - } else { - /* Destination incrementing, must be memory */ - dmalp[MCFDMA_DAR] = a; - /* Set source address, must be device */ - dmalp[MCFDMA_SAR] = dma_device_address[dmanr]; - } - -#ifdef DEBUG_DMA - printk("%s(%d): dmanr=%d DCR[%x]=%x SAR[%x]=%08x DAR[%x]=%08x\n", - __FILE__, __LINE__, dmanr, (int) &dmawp[MCFDMA_DCR], dmawp[MCFDMA_DCR], - (int) &dmalp[MCFDMA_SAR], dmalp[MCFDMA_SAR], - (int) &dmalp[MCFDMA_DAR], dmalp[MCFDMA_DAR]); -#endif -} - -/* - * Specific for Coldfire - sets device address. - * Should be called after the mode set call, and before set DMA address. - */ -static __inline__ void set_dma_device_addr(unsigned int dmanr, unsigned int a) -{ -#ifdef DMA_DEBUG - printk("set_dma_device_addr(dmanr=%d,a=%x)\n", dmanr, a); -#endif - - dma_device_address[dmanr] = a; -} - -/* - * NOTE 2: "count" represents _bytes_. - */ -static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count) -{ - volatile unsigned short *dmawp; - -#ifdef DMA_DEBUG - printk("set_dma_count(dmanr=%d,count=%d)\n", dmanr, count); -#endif - - dmawp = (unsigned short *) dma_base_addr[dmanr]; - dmawp[MCFDMA_BCR] = (unsigned short)count; -} - -/* - * Get DMA residue count. After a DMA transfer, this - * should return zero. Reading this while a DMA transfer is - * still in progress will return unpredictable results. - * Otherwise, it returns the number of _bytes_ left to transfer. - */ -static __inline__ int get_dma_residue(unsigned int dmanr) -{ - volatile unsigned short *dmawp; - unsigned short count; - -#ifdef DMA_DEBUG - printk("get_dma_residue(dmanr=%d)\n", dmanr); -#endif - - dmawp = (unsigned short *) dma_base_addr[dmanr]; - count = dmawp[MCFDMA_BCR]; - return((int) count); -} -#else /* CONFIG_M5272 is defined */ - -/* - * The MCF5272 DMA controller is very different than the controller defined above - * in terms of register mapping. For instance, with the exception of the 16-bit - * interrupt register (IRQ#85, for reference), all of the registers are 32-bit. - * - * The big difference, however, is the lack of device-requested DMA. All modes - * are dual address transfer, and there is no 'device' setup or direction bit. - * You can DMA between a device and memory, between memory and memory, or even between - * two devices directly, with any combination of incrementing and non-incrementing - * addresses you choose. This puts a crimp in distinguishing between the 'device - * address' set up by set_dma_device_addr. - * - * Therefore, there are two options. One is to use set_dma_addr and set_dma_device_addr, - * which will act exactly as above in -- it will look to see if the source is set to - * autoincrement, and if so it will make the source use the set_dma_addr value and the - * destination the set_dma_device_addr value. Otherwise the source will be set to the - * set_dma_device_addr value and the destination will get the set_dma_addr value. - * - * The other is to use the provided set_dma_src_addr and set_dma_dest_addr functions - * and make it explicit. Depending on what you're doing, one of these two should work - * for you, but don't mix them in the same transfer setup. - */ - -/* enable/disable a specific DMA channel */ -static __inline__ void enable_dma(unsigned int dmanr) -{ - volatile unsigned int *dmalp; - -#ifdef DMA_DEBUG - printk("enable_dma(dmanr=%d)\n", dmanr); -#endif - - dmalp = (unsigned int *) dma_base_addr[dmanr]; - dmalp[MCFDMA_DMR] |= MCFDMA_DMR_EN; -} - -static __inline__ void disable_dma(unsigned int dmanr) -{ - volatile unsigned int *dmalp; - -#ifdef DMA_DEBUG - printk("disable_dma(dmanr=%d)\n", dmanr); -#endif - - dmalp = (unsigned int *) dma_base_addr[dmanr]; - - /* Turn off external requests, and stop any DMA in progress */ - dmalp[MCFDMA_DMR] &= ~MCFDMA_DMR_EN; - dmalp[MCFDMA_DMR] |= MCFDMA_DMR_RESET; -} - -/* - * Clear the 'DMA Pointer Flip Flop'. - * Write 0 for LSB/MSB, 1 for MSB/LSB access. - * Use this once to initialize the FF to a known state. - * After that, keep track of it. :-) - * --- In order to do that, the DMA routines below should --- - * --- only be used while interrupts are disabled! --- - * - * This is a NOP for ColdFire. Provide a stub for compatibility. - */ -static __inline__ void clear_dma_ff(unsigned int dmanr) -{ -} - -/* set mode (above) for a specific DMA channel */ -static __inline__ void set_dma_mode(unsigned int dmanr, char mode) -{ - - volatile unsigned int *dmalp; - volatile unsigned short *dmawp; - -#ifdef DMA_DEBUG - printk("set_dma_mode(dmanr=%d,mode=%d)\n", dmanr, mode); -#endif - dmalp = (unsigned int *) dma_base_addr[dmanr]; - dmawp = (unsigned short *) dma_base_addr[dmanr]; - - /* Clear config errors */ - dmalp[MCFDMA_DMR] |= MCFDMA_DMR_RESET; - - /* Set command register */ - dmalp[MCFDMA_DMR] = - MCFDMA_DMR_RQM_DUAL | /* Mandatory Request Mode setting */ - MCFDMA_DMR_DSTT_SD | /* Set up addressing types; set to supervisor-data. */ - MCFDMA_DMR_SRCT_SD | /* Set up addressing types; set to supervisor-data. */ - /* source static-address-mode */ - ((mode & DMA_MODE_SRC_SA_BIT) ? MCFDMA_DMR_SRCM_SA : MCFDMA_DMR_SRCM_IA) | - /* dest static-address-mode */ - ((mode & DMA_MODE_DES_SA_BIT) ? MCFDMA_DMR_DSTM_SA : MCFDMA_DMR_DSTM_IA) | - /* burst, 32 bit, 16 bit or 8 bit transfers are separately configurable on the MCF5272 */ - (((mode & DMA_MODE_SSIZE_MASK) >> DMA_MODE_SSIZE_OFF) << MCFDMA_DMR_DSTS_OFF) | - (((mode & DMA_MODE_SSIZE_MASK) >> DMA_MODE_SSIZE_OFF) << MCFDMA_DMR_SRCS_OFF); - - dmawp[MCFDMA_DIR] |= MCFDMA_DIR_ASCEN; /* Enable completion interrupts */ - -#ifdef DEBUG_DMA - printk("%s(%d): dmanr=%d DMR[%x]=%x DIR[%x]=%x\n", __FILE__, __LINE__, - dmanr, (int) &dmalp[MCFDMA_DMR], dmalp[MCFDMA_DMR], - (int) &dmawp[MCFDMA_DIR], dmawp[MCFDMA_DIR]); -#endif -} - -/* Set transfer address for specific DMA channel */ -static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int a) -{ - volatile unsigned int *dmalp; - -#ifdef DMA_DEBUG - printk("set_dma_addr(dmanr=%d,a=%x)\n", dmanr, a); -#endif - - dmalp = (unsigned int *) dma_base_addr[dmanr]; - - /* Determine which address registers are used for memory/device accesses */ - if (dmalp[MCFDMA_DMR] & MCFDMA_DMR_SRCM) { - /* Source incrementing, must be memory */ - dmalp[MCFDMA_DSAR] = a; - /* Set dest address, must be device */ - dmalp[MCFDMA_DDAR] = dma_device_address[dmanr]; - } else { - /* Destination incrementing, must be memory */ - dmalp[MCFDMA_DDAR] = a; - /* Set source address, must be device */ - dmalp[MCFDMA_DSAR] = dma_device_address[dmanr]; - } - -#ifdef DEBUG_DMA - printk("%s(%d): dmanr=%d DMR[%x]=%x SAR[%x]=%08x DAR[%x]=%08x\n", - __FILE__, __LINE__, dmanr, (int) &dmalp[MCFDMA_DMR], dmalp[MCFDMA_DMR], - (int) &dmalp[MCFDMA_DSAR], dmalp[MCFDMA_DSAR], - (int) &dmalp[MCFDMA_DDAR], dmalp[MCFDMA_DDAR]); -#endif -} - -/* - * Specific for Coldfire - sets device address. - * Should be called after the mode set call, and before set DMA address. - */ -static __inline__ void set_dma_device_addr(unsigned int dmanr, unsigned int a) -{ -#ifdef DMA_DEBUG - printk("set_dma_device_addr(dmanr=%d,a=%x)\n", dmanr, a); -#endif - - dma_device_address[dmanr] = a; -} - -/* - * NOTE 2: "count" represents _bytes_. - * - * NOTE 3: While a 32-bit register, "count" is only a maximum 24-bit value. - */ -static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count) -{ - volatile unsigned int *dmalp; - -#ifdef DMA_DEBUG - printk("set_dma_count(dmanr=%d,count=%d)\n", dmanr, count); -#endif - - dmalp = (unsigned int *) dma_base_addr[dmanr]; - dmalp[MCFDMA_DBCR] = count; -} - -/* - * Get DMA residue count. After a DMA transfer, this - * should return zero. Reading this while a DMA transfer is - * still in progress will return unpredictable results. - * Otherwise, it returns the number of _bytes_ left to transfer. - */ -static __inline__ int get_dma_residue(unsigned int dmanr) -{ - volatile unsigned int *dmalp; - unsigned int count; - -#ifdef DMA_DEBUG - printk("get_dma_residue(dmanr=%d)\n", dmanr); -#endif - - dmalp = (unsigned int *) dma_base_addr[dmanr]; - count = dmalp[MCFDMA_DBCR]; - return(count); -} - -#endif /* !defined(CONFIG_M5272) */ -#endif /* CONFIG_COLDFIRE */ - /* it's useless on the m68k, but unfortunately needed by the new bootmem allocator (but this should do it for this) */ #define MAX_DMA_ADDRESS PAGE_OFFSET -#define MAX_DMA_CHANNELS 8 - -extern int request_dma(unsigned int dmanr, const char * device_id); /* reserve a DMA channel */ -extern void free_dma(unsigned int dmanr); /* release it again */ - #ifdef CONFIG_PCI extern int isa_dma_bridge_buggy; #else diff --git a/arch/m68k/mm/motorola.c b/arch/m68k/mm/motorola.c index ecbe948f4c1a..df7f797c908a 100644 --- a/arch/m68k/mm/motorola.c +++ b/arch/m68k/mm/motorola.c @@ -27,7 +27,6 @@ #include <asm/pgalloc.h> #include <asm/machdep.h> #include <asm/io.h> -#include <asm/dma.h> #ifdef CONFIG_ATARI #include <asm/atari_stram.h> #endif diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig index af6c3c329076..d6144978e32d 100644 --- a/drivers/mmc/host/Kconfig +++ b/drivers/mmc/host/Kconfig @@ -508,7 +508,7 @@ config MMC_OMAP_HS config MMC_WBSD tristate "Winbond W83L51xD SD/MMC Card Interface support" - depends on ISA_DMA_API && !M68K + depends on ISA_DMA_API help This selects the Winbond(R) W83L51xD Secure digital and Multimedia card Interface. diff --git a/sound/core/Makefile b/sound/core/Makefile index 350d704ced98..2762f03d9b7b 100644 --- a/sound/core/Makefile +++ b/sound/core/Makefile @@ -9,9 +9,7 @@ ifneq ($(CONFIG_SND_PROC_FS),) snd-y += info.o snd-$(CONFIG_SND_OSSEMUL) += info_oss.o endif -ifneq ($(CONFIG_M68K),y) snd-$(CONFIG_ISA_DMA_API) += isadma.o -endif snd-$(CONFIG_SND_OSSEMUL) += sound_oss.o snd-$(CONFIG_SND_VMASTER) += vmaster.o snd-$(CONFIG_SND_JACK) += ctljack.o jack.o diff --git a/sound/isa/Kconfig b/sound/isa/Kconfig index 570b88e0b201..6ffa48dd5983 100644 --- a/sound/isa/Kconfig +++ b/sound/isa/Kconfig @@ -22,7 +22,7 @@ config SND_SB16_DSP menuconfig SND_ISA bool "ISA sound devices" depends on ISA || COMPILE_TEST - depends on ISA_DMA_API && !M68K + depends on ISA_DMA_API default y help Support for sound devices connected via the ISA bus. -- 2.29.2

4 4

ucm2: sof-glkda7219max: add HDMI/DP support
by GitHub pull_request - opened 26 Apr '22

26 Apr '22

alsa-project/alsa-ucm-conf pull request #150 was opened from plbossart: First add HDMI/DP Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Request URL : https://github.com/alsa-project/alsa-ucm-conf/pull/150 Patch URL : https://github.com/alsa-project/alsa-ucm-conf/pull/150.patch Repository URL: https://github.com/alsa-project/alsa-ucm-conf

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[PATCH 00/14] ASoC: SOF: Intel: improve HDaudio DAI support
by Pierre-Louis Bossart 26 Apr '22

26 Apr '22

The SOF CI and daily tests exposed a number of issues with corner cases on platforms using the HDaudio DAI, such as UpExtreme boards or usual HDaudio+DMIC laptops. This patchset provides improvements for pause_push/pause_release, suspend-resume, mixing use cases and combinations of all three. The initial patches provide a cleanup, the last patches improve the state machine and DMA handling. Pierre-Louis Bossart (12): ASOC: SOF: Intel: hda-dai: consistent naming for HDA DAI and HDA link DMA ASoC: SOF: Intel: hda-dai: simplify hda_dai_widget_update() prototype ASoC: SOF: Intel: hda-dai: use snd_soc_dai_get_widget() helper ASoC: SOF: Intel: hda-dai: split link DMA and dai operations ASoC: SOF: Intel: hda-dai: regroup dai and link DMA operations ASoC: SOF: sof-audio: flag errors on pipeline teardown ASOC: SOF: Intel: hda-dai: add hda_dai_hw_free_ipc() helper ASoC: SOF: Intel: hda-dai: move code to deal with hda dai/dailink suspend ASoC: SOF: Intel: hda-dai: improve suspend case ASoC: SOF: Intel: hda-dai: reset dma_data and release stream ASoC: SOF: Intel: add helper for link DMA cleanups ASoC: SOF: Intel: hda-dai: protect hw_params against successive calls Ranjani Sridharan (2): ASoC: SOF: remove incorrect clearing of prepared flag ASoC: SOF: Intel: Add IPC-specific dai ops for IPC3 sound/soc/sof/intel/apl.c | 3 + sound/soc/sof/intel/cnl.c | 3 + sound/soc/sof/intel/hda-dai.c | 434 ++++++++++++++++++++++------------ sound/soc/sof/intel/hda-dsp.c | 42 +--- sound/soc/sof/intel/hda.h | 3 + sound/soc/sof/intel/icl.c | 3 + sound/soc/sof/intel/tgl.c | 3 + sound/soc/sof/ipc3-topology.c | 12 + sound/soc/sof/pm.c | 2 +- sound/soc/sof/sof-audio.c | 36 --- sound/soc/sof/sof-audio.h | 1 - 11 files changed, 312 insertions(+), 230 deletions(-) -- 2.30.2

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[PATCH v3 0/2] Add generic serial MIDI driver using serial bus API
by Daniel Kaehn 25 Apr '22

25 Apr '22

Generic serial MIDI driver adding support for using serial devices compatible with the serial bus as raw MIDI devices, allowing using additional serial devices not compatible with the existing serial-u16550 driver. Supports only setting standard serial baudrates on the underlying serial device; however, the underlying serial device can be configured so that a requested 38.4 kBaud is actually the standard MIDI 31.25 kBaud. Supports DeviceTree configuration. Changes in v3: - Replace use of snd_printk() with dev_* alternatives - Removed unnecessary initialization of err variables - Replaced instances of `== SERIAL_MODE_NOT_OPENED` with zero check - Loop on output_write to completely fill output buffer if data available - Depend on CONFIG_OF in Kconfig - Replace use of devm_kzalloc() with extra_size allocation in snd_devm_card_new() - Use module_serdev_device_driver() instead of module_init() and module_exit(0) Changes in v2: - Fix 'snd_serial_generic_write_wakeup' missing static keyword - Correct 3.125 kBaud > 31.25 kBaud in documentation for MIDI The need for this driver arose from a project using a Raspberry Pi4 which needed to receive and send raw MIDI with low latency. The pl011 UART used is not compatible with the existing serial MIDI driver made for u16550-style devices. Using a userspace program such as ttymidi to feed input from the TTY device to a virtual ALSA MIDI device was functional, but not ideal. I am not sure if a MIDI driver needing the mentioned 'hack' to clock 38.4 kBaud down to the standard MIDI baud is permissible in the mainline kernel, but am submitting nevertheless in case it is useful. To my knowledge, it doesn't seem that there would be any way for this driver to manually configure a serial port to 31.25 kBaud using the serial bus API (please correct me f I'm wrong). In my use case, I am actually configuring one port to run at 115.2 kBaud for faster communication with a custom onboard MIDI controller. Daniel Kaehn (2): dt-bindings: sound: Add generic serial MIDI device Add generic serial MIDI driver using serial bus API .../devicetree/bindings/sound/serialmidi.yaml | 41 +++ sound/drivers/Kconfig | 18 + sound/drivers/Makefile | 2 + sound/drivers/serial-generic.c | 316 ++++++++++++++++++ 4 files changed, 377 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/serialmidi.yaml create mode 100644 sound/drivers/serial-generic.c base-commit: af2d861d4cd2a4da5137f795ee3509e6f944a25b -- 2.33.0

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[PATCH 0/6] ASoC: SOF: Rework the firmware ready message handling
by Peter Ujfalusi 25 Apr '22

25 Apr '22

Hi, The firmware ready (fw_ready) message is sent by the firmware to notify the host that it has been booted up and caries additional information about it's configuration. All of this is IPC specific, the message itself is IPC version specific and the information itself also. Move the code to handle the fw_ready message under ipc3.c since the parsing and interpretation is IPC specific. A followup series is going to take care of the rest of the loader.c to make it IPC agnostic. Regards, Peter --- Peter Ujfalusi (6): ASoC: SOF: ipc3: Add local implementation for handling fw_ready message ASoC: SOF: Do not check for the fw_ready callback ASoC: SOF: amd: Do not set fw_ready callback ASoC: SOF: imx: Do not set fw_ready callback ASoC: SOF: Intel: Do not set fw_ready callback ASoC: SOF: loader: Remove the old fw_ready related code sound/soc/sof/amd/renoir.c | 1 - sound/soc/sof/core.c | 2 +- sound/soc/sof/imx/imx8.c | 2 - sound/soc/sof/imx/imx8m.c | 1 - sound/soc/sof/intel/bdw.c | 1 - sound/soc/sof/intel/byt.c | 2 - sound/soc/sof/intel/hda-common-ops.c | 1 - sound/soc/sof/intel/pci-tng.c | 1 - sound/soc/sof/ipc.c | 15 -- sound/soc/sof/ipc3.c | 306 ++++++++++++++++++++++++++- sound/soc/sof/loader.c | 227 -------------------- sound/soc/sof/sof-priv.h | 9 +- 12 files changed, 307 insertions(+), 261 deletions(-) -- 2.35.3

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[PATCH 0/2] Add generic serial MIDI driver using serial bus API
by Daniel Kaehn 25 Apr '22

25 Apr '22

Generic serial MIDI driver adding support for using serial devices compatible with the serial bus as raw MIDI devices, allowing using additional serial devices not compatible with the existing serial-u16550 driver. Supports only setting standard serial baudrates on the underlying serial device; however, the underlying serial device can be configured so that a requested 38.4 kBaud is actually the standard MIDI 3.125 kBaud. Supports DeviceTree configuration. The need for this driver arose from a project using a Raspberry Pi4 which needed to receive and send raw MIDI with low latency. The pl011 UART used is not compatible with the existing serial MIDI driver made for u16550-style devices. Using a userspace program such as ttymidi to feed input from the TTY device to a virtual ALSA MIDI device was functional, but not ideal. I am not sure if a MIDI driver needing the mentioned 'hack' to clock 38.4 kBaud down to the standard MIDI baud is permissible in the mainline kernel, but am submitting nevertheless in case it is useful. To my knowledge, it doesn't seem that there would be any way for this driver to manually configure a serial port to 3.125 kBaud using the serial bus API (please correct me f I'm wrong). In my use case, I am actually configuring one port to run at 115.2 kBaud for faster communication with a custom onboard MIDI controller. Daniel Kaehn (2): dt-bindings: sound: Add generic serial MIDI device Add generic serial MIDI driver using serial bus API .../devicetree/bindings/sound/serialmidi.yaml | 41 +++ sound/drivers/Kconfig | 17 + sound/drivers/Makefile | 2 + sound/drivers/serial-generic.c | 344 ++++++++++++++++++ 4 files changed, 404 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/serialmidi.yaml create mode 100644 sound/drivers/serial-generic.c -- 2.32.0

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[PATCH v1 0/4] Add support of MediaTek mt8186 to SOF
by Tinghan Shen 25 Apr '22

25 Apr '22

Add support of MediaTek mt8186 SoC DSP to SOF. This series is taken from thesofproject/linux/tree/topic/sof-dev-rebase. Tinghan Shen (4): ASoC: SOF: mediatek: Add mt8186 hardware support ASoC: SOF: mediatek: Add mt8186 sof fw loader and dsp ops ASoC: SOF: mediatek: Add mt8186 dsp clock support ASoC: SOF: mediatek: Add DSP system PM callback for mt8186 sound/soc/sof/mediatek/Kconfig | 9 + sound/soc/sof/mediatek/Makefile | 1 + sound/soc/sof/mediatek/adsp_helper.h | 8 + sound/soc/sof/mediatek/mt8186/Makefile | 4 + sound/soc/sof/mediatek/mt8186/mt8186-clk.c | 101 +++++ sound/soc/sof/mediatek/mt8186/mt8186-clk.h | 24 + sound/soc/sof/mediatek/mt8186/mt8186-loader.c | 53 +++ sound/soc/sof/mediatek/mt8186/mt8186.c | 413 ++++++++++++++++++ sound/soc/sof/mediatek/mt8186/mt8186.h | 80 ++++ 9 files changed, 693 insertions(+) create mode 100644 sound/soc/sof/mediatek/mt8186/Makefile create mode 100644 sound/soc/sof/mediatek/mt8186/mt8186-clk.c create mode 100644 sound/soc/sof/mediatek/mt8186/mt8186-clk.h create mode 100644 sound/soc/sof/mediatek/mt8186/mt8186-loader.c create mode 100644 sound/soc/sof/mediatek/mt8186/mt8186.c create mode 100644 sound/soc/sof/mediatek/mt8186/mt8186.h -- 2.18.0

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[PATCH v2 0/2] ASoC: Add macros for signed TLV controls with callbacks
by Richard Fitzgerald 25 Apr '22

25 Apr '22

This adds SOC_DOUBLE_R_S_EXT_TLV and SOC_SINGLE_S_EXT_TLV macros for signed TLV controls that need custom get/put callbacks. These will be needed by future Cirrus codec drivers, but are not particularly exotic so could be useful for others. Only change from V1 is sign-off on patch #1. Richard Fitzgerald (1): ASoC: soc.h: Add SOC_SINGLE_S_EXT_TLV macro Simon Trimmer (1): ASoC: soc.h: Introduce SOC_DOUBLE_R_S_EXT_TLV() macro include/sound/soc.h | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) -- 2.30.2

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[PATCH v2 1/2] ASoC: Intel: avs: Enable AVS driver only on x86 platforms
by Amadeusz Sławiński 25 Apr '22

25 Apr '22

Only supported platform for AVS are x86 machines, so there is no reason for it to be enabled on other architectures. Allow exception for compile tests. Fixes: 274d79e51875 ("ASoC: Intel: avs: Configure modules according to their type") Reviewed-by: Cezary Rojewski <cezary.rojewski(a)intel.com> Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski(a)linux.intel.com> --- Changes in v2: * Actually fix the problem reported by kernel test robot in following patch * Add COMPILE_TEST to allow test building on other architectures --- sound/soc/intel/Kconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/sound/soc/intel/Kconfig b/sound/soc/intel/Kconfig index c364ddf22267..4ef9a1fee121 100644 --- a/sound/soc/intel/Kconfig +++ b/sound/soc/intel/Kconfig @@ -211,7 +211,8 @@ config SND_SOC_INTEL_KEEMBAY config SND_SOC_INTEL_AVS tristate "Intel AVS driver" - depends on PCI && ACPI + depends on (X86 && ACPI) || COMPILE_TEST + depends on PCI depends on COMMON_CLK select SND_SOC_ACPI select SND_SOC_TOPOLOGY -- 2.25.1

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[PATCH] ASoC: sh: Make SND_SOC_RZ depend on ARCH_RZG2L
by Biju Das 25 Apr '22

25 Apr '22

The SSI block is identical on Renesas RZ/G2L, RZ/G2UL and RZ/V2L SoC's, so instead of adding dependency for each SoC's add dependency on ARCH_RZG2L. The ARCH_RZG2L config option is already selected by ARCH_R9A07G043, ARCH_R9A07G044 and ARCH_R9A07G054. Signed-off-by: Biju Das <biju.das.jz(a)bp.renesas.com> --- sound/soc/sh/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/sh/Kconfig b/sound/soc/sh/Kconfig index ae46f187cc2a..97916e3ca9dd 100644 --- a/sound/soc/sh/Kconfig +++ b/sound/soc/sh/Kconfig @@ -47,7 +47,7 @@ config SND_SOC_RCAR config SND_SOC_RZ tristate "RZ/G2L series SSIF-2 support" - depends on ARCH_R9A07G044 || COMPILE_TEST + depends on ARCH_RZG2L || COMPILE_TEST help This option enables RZ/G2L SSIF-2 sound support. -- 2.25.1

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