March 2021 - Alsa-devel - mailman.alsa-project.org

RE: [PATCH] Add audio driver for rk817 upstream
by Christopher Morgan 10 Mar '21

10 Mar '21

Thank you. Turns out my mail client crapped out on me (I'm trying to switch to using mutt for replies and accidentally deleted the thread) so I'm afraid my nice and neat reply didn't go quite as expected. I'll work on the things you mention below and resubmit this as an RFC. I'll include the devicetree bindings that I did so you can see how things are mapped. To answer your questions: Acknowledged on the maintainers, the signed-off tag, the pointer, and the commit message. I don't know for sure the best way to accomplish things, I read in the documentation that the simple-audio-card has an option of setting a GPIO which should automatically register with the jack for headphone or microphone sources, that's what I'm trying to do. The specific chip I'm working with has 2 headphone ports (R and L), a single speaker port (let's say LR combined to L), and a single microphone port (L). The codec itself supports 2 channels for the DAC which either power the headphones or the speaker (or both at the same time, if you don't mind either only sending L to the speaker with a proper RL split on the headphones or RL combined to the L headphone with a proper RL combined to the speaker). There are also 2 channels on the ADC, but again only one microphone port which seems odd. Register documentation here for the codec: https://rockchip.fr/RK817%20datasheet%20V1.01.pdf As for the specific implementation I'm working with its here: https://dn.odroid.com/ODROID_GO_ADVANCE/ODROID_GO_ADVANCE_rev1.1.pdf Here's my simple-audio-card DT node: rk817-sound { compatible = "simple-audio-card"; simple-audio-card,format = "i2s"; simple-audio-card,name = "rockchip,rk817-codec"; simple-audio-card,mclk-fs = <256>; simple-audio-card,widgets = "Microphone", "Mic Jack", "Headphone", "Headphones", simple-audio-card,routing = "MIC", "Mic Jack", "Headphones", "HPOL", "Headphones", "HPOR", simple-audio-card,hp-det-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>; simple-audio-card,cpu { sound-dai = <&i2s1_2ch>; }; simple-audio-card,codec { sound-dai = <&rk817_codec>; }; }; I copied the rockchip code from the BSP kernel and it had some of the variables, such as the pre_path, as a long. Since it looks like it's just checking the path enums to see if there was a change, I imagine int will do just fine on the pre_path. Speaking of which, that is pre as opposed to post. In this specific step it's looking to see if we're going from off to on or on to off and setting the register values accordingly. As for whether or not the steps are trying to bypass or reimplement something that should be done in DAPM, I'm not sure honestly; this is my first audio driver (or any driver for that matter). I tried to read the DAPM documentation and didn't understand much of it. What I can say is that the code in question is setting the register values via I2C depending upon which audio path is chosen. For example on the SPK_PATH it sets the register at address 0x38 (RK817_CODEC_DDAC_MUTE_MIXCTL) to 0x10, which tells it to switch the amplifier on and combine the channels into a single channel. The HP path likewise does the opposite, setting this same register to 0x00 which turns off the amplifier/splits it back into L+R channels. Curiously enough, this is actually a bug I found in Rockchip's BSP kernel where the channels don't get split apart again when jumping from external speaker back to headphones and your headphones start to output R to R and RL to L... In regards to the DT bindings, I will document all of them, however that poses a dilemma. Most of the bindings I'm unable to test, as aside from mic-in-differential I'm not really using any of them on the single hardware implementation I have available to me. Should I document them based on Rockchip's BSP kernel and note that they are untested, or should I simply delete them and their associated functionality (and focus on that which I can test)? I'll test removing the unregister_component code and see if that does anything unexpected. Thank you again for all of your help. On 3/9/21 5:41 PM, Chris Morgan wrote: > I'm wondering if you all can help me. I'm trying to get the rk817 > codec driver working from Rockchip's BSP kernel sources (GPL per > the license) and I'm struggling with a few parts. The first part is to Cc: audio maintainers (Takashi Iwai and Mark Brown). Then you need to make sure there is a Signed-off-by tag from the original contribution this code is based on, along with yours. It doesn't hurt to have a pointer to that code either in the commit message. > is I'm not sure if I have my audio paths set up correctly. For example > the sinks I have set up are for HPOL and HPOR, and the source is for > MIC. While this does work (audio output seems fine) I'm having issues > with the GPIO to detect headphone insertion. When I insert headphones > I expect the audio to output to the headphones, and when I remove > headphones I expect the audio to output to a speaker. Right now I > have to manually change the output between the different paths. You don't necessarily have to do everything at the kernel level, it's not uncommon to have the driver set a kcontrol for jack detection, and let userspace change settings on a jack detection event. PulseAudio relies on UCM JackControl to switch to Headphones and Headset devices. > Additionally, while the codec "technically" has dual channel inputs > for the microphone, I'm only using the L channel. Should I have a > stereo mixer? Note that I'm using the simple-audio-card to set my > paths, widgets, and the gpio pin. They all work, just not seamlessly > together. > > Basically, I'm wanting to know if and how I should set up my audio > paths for the speaker and headphones, they use mostly the same pins > and only really differ in setting the external amp settings. > Additionally, once I set up my paths how do I ensure that the GPIO > events will result in switching between the speaker/headphone path? > > Any help you can provide is appreciated. This is my first attempt at > something of this magnitude (for me it's a big step), even if it's > just trying to facilitate in getting a vendor's code ready for upstream. > --- /dev/null > +++ b/sound/soc/codecs/rk817_codec.c > @@ -0,0 +1,1148 @@ > +/* > + * Copyright (c) 2018 Rockchip Electronics Co. Ltd. > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License as published by > + * the Free Software Foundation; either version 2 of the License, or > + * (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. remove and replace by an SPDX line. > +static int rk817_playback_path_put(struct snd_kcontrol *kcontrol, > + struct snd_ctl_elem_value *ucontrol) > +{ > + struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); > + struct rk817_codec_priv *rk817 = snd_soc_component_get_drvdata(component); > + long int pre_path; it's uncommon to see this, use either int or u32/u64 if your require a specific size. > + > + if (rk817->playback_path == ucontrol->value.integer.value[0]) { > + return 0; > + } > + > + pre_path = rk817->playback_path; 'pre' as in 'previous' or 'preamp' or as opposed to 'post'? > + rk817->playback_path = ucontrol->value.integer.value[0]; > + > + if (rk817->playback_path != OFF) > + clk_prepare_enable(rk817->mclk); > + else > + clk_disable_unprepare(rk817->mclk); > + > + switch (rk817->playback_path) { > + case OFF: > + if (pre_path != OFF && pre_path != HP_PATH) { > + rk817_codec_power_down(component, RK817_CODEC_PLAYBACK); > + if (rk817->capture_path == 0) > + rk817_codec_power_down(component, RK817_CODEC_ALL); > + } > + break; > + case SPK_PATH: > + if (pre_path == OFF) > + rk817_codec_power_up(component, RK817_CODEC_PLAYBACK); > + if (!rk817->use_ext_amplifier) { > + /* power on dac ibias/l/r */ > + snd_soc_component_write(component, RK817_CODEC_ADAC_CFG1, > + PWD_DACBIAS_ON | PWD_DACD_ON | > + PWD_DACL_DOWN | PWD_DACR_DOWN); > + /* CLASS D mode, combine LR channels */ > + snd_soc_component_write(component, > + RK817_CODEC_DDAC_MUTE_MIXCTL, > + 0x10); > + /* CLASS D enable */ > + snd_soc_component_write(component, > + RK817_CODEC_ACLASSD_CFG1, > + 0xa5); > + /* restart CLASS D, OCPP/N */ > + snd_soc_component_write(component, > + RK817_CODEC_ACLASSD_CFG2, > + 0xf7); > + } else { > + /* HP_CP_EN , CP 2.3V */ > + snd_soc_component_write(component, RK817_CODEC_AHP_CP, > + 0x11); > + /* power on HP two stage opamp ,HP amplitude 0db */ > + snd_soc_component_write(component, RK817_CODEC_AHP_CFG0, > + 0x80); > + /* power on dac ibias/l/r */ > + snd_soc_component_write(component, RK817_CODEC_ADAC_CFG1, > + PWD_DACBIAS_ON | PWD_DACD_DOWN | > + PWD_DACL_ON | PWD_DACR_ON); > + snd_soc_component_update_bits(component, > + RK817_CODEC_DDAC_MUTE_MIXCTL, > + DACMT_ENABLE, DACMT_DISABLE); > + } > + snd_soc_component_write(component, RK817_CODEC_DDAC_VOLL, > + rk817->spk_volume); > + snd_soc_component_write(component, RK817_CODEC_DDAC_VOLR, > + rk817->spk_volume); > + break; > + case HP_PATH: > + if (pre_path == OFF) > + rk817_codec_power_up(component, RK817_CODEC_PLAYBACK); > + /* HP_CP_EN , CP 2.3V */ > + snd_soc_component_write(component, RK817_CODEC_AHP_CP, 0x11); > + /* power on HP two stage opamp ,HP amplitude 0db */ > + snd_soc_component_write(component, RK817_CODEC_AHP_CFG0, 0x80); > + /* power on dac ibias/l/r */ > + snd_soc_component_write(component, RK817_CODEC_ADAC_CFG1, > + PWD_DACBIAS_ON | PWD_DACD_DOWN | > + PWD_DACL_ON | PWD_DACR_ON); > + /* CLASS D mode disable, split LR channels */ > + snd_soc_component_write(component, > + RK817_CODEC_DDAC_MUTE_MIXCTL, > + 0x00); > + > + snd_soc_component_write(component, RK817_CODEC_DDAC_VOLL, > + rk817->hp_volume); > + snd_soc_component_write(component, RK817_CODEC_DDAC_VOLR, > + rk817->hp_volume); > + break; > + case SPK_HP: > + if (pre_path == OFF) > + rk817_codec_power_up(component, RK817_CODEC_PLAYBACK); > + > + /* HP_CP_EN , CP 2.3V */ > + snd_soc_component_write(component, RK817_CODEC_AHP_CP, 0x11); > + /* power on HP two stage opamp ,HP amplitude 0db */ > + snd_soc_component_write(component, RK817_CODEC_AHP_CFG0, 0x80); > + > + /* power on dac ibias/l/r */ > + snd_soc_component_write(component, RK817_CODEC_ADAC_CFG1, > + PWD_DACBIAS_ON | PWD_DACD_ON | > + PWD_DACL_ON | PWD_DACR_ON); > + > + if (!rk817->use_ext_amplifier) { > + /* CLASS D mode, combine LR channels */ > + snd_soc_component_write(component, > + RK817_CODEC_DDAC_MUTE_MIXCTL, > + 0x10); > + /* CLASS D enable */ > + snd_soc_component_write(component, > + RK817_CODEC_ACLASSD_CFG1, > + 0xa5); > + /* restart CLASS D, OCPP/N */ > + snd_soc_component_write(component, > + RK817_CODEC_ACLASSD_CFG2, > + 0xf7); > + } > + > + snd_soc_component_write(component, RK817_CODEC_DDAC_VOLL, > + rk817->hp_volume); > + snd_soc_component_write(component, RK817_CODEC_DDAC_VOLR, > + rk817->hp_volume); > + break; > + default: > + return -EINVAL; > + } > + > + return 0; > +} > + > +static int rk817_capture_path_get(struct snd_kcontrol *kcontrol, > + struct snd_ctl_elem_value *ucontrol) > +{ > + struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); > + struct rk817_codec_priv *rk817 = snd_soc_component_get_drvdata(component); > + > + dev_dbg(component->dev, "%s:capture_path %ld\n", __func__, rk817->capture_path); > + ucontrol->value.integer.value[0] = rk817->capture_path; > + return 0; > +} > + > +static int rk817_capture_path_put(struct snd_kcontrol *kcontrol, > + struct snd_ctl_elem_value *ucontrol) > +{ > + struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); > + struct rk817_codec_priv *rk817 = snd_soc_component_get_drvdata(component); > + long int pre_path; > + > + if (rk817->capture_path == ucontrol->value.integer.value[0]) { > + dev_dbg(component->dev, "%s:capture_path is not changed!\n", > + __func__); > + return 0; > + } > + > + pre_path = rk817->capture_path; > + rk817->capture_path = ucontrol->value.integer.value[0]; > + > + if (rk817->capture_path != MIC_OFF) > + clk_prepare_enable(rk817->mclk); > + else > + clk_disable_unprepare(rk817->mclk); > + > + switch (rk817->capture_path) { > + case MIC_OFF: > + if (pre_path != MIC_OFF) > + rk817_codec_power_down(component, RK817_CODEC_CAPTURE); > + break; > + case MIC: > + if (pre_path == MIC_OFF) > + rk817_codec_power_up(component, RK817_CODEC_CAPTURE); these sequences look like trying to bypass DAPM or re-invent it with custom state machines. > + > + if (rk817->adc_for_loopback) { > + /* don't need to gain when adc use for loopback */ > + snd_soc_component_update_bits(component, > + RK817_CODEC_AMIC_CFG0, > + 0xf, > + 0x0); > + snd_soc_component_write(component, > + RK817_CODEC_DMIC_PGA_GAIN, > + 0x66); > + snd_soc_component_write(component, > + RK817_CODEC_DADC_VOLL, > + 0x00); > + snd_soc_component_write(component, > + RK817_CODEC_DADC_VOLR, > + 0x00); > + break; > + } > + if (!rk817->mic_in_differential) { > + snd_soc_component_write(component, > + RK817_CODEC_DADC_VOLR, > + 0xff); > + snd_soc_component_update_bits(component, > + RK817_CODEC_AADC_CFG0, > + ADC_R_PWD_MASK, > + ADC_R_PWD_EN); > + snd_soc_component_update_bits(component, > + RK817_CODEC_AMIC_CFG0, > + PWD_PGA_R_MASK, > + PWD_PGA_R_EN); > + } > + break; > + default: > + return -EINVAL; > + } > + > + return 0; > +} > + [...] > +static int rk817_codec_parse_dt_property(struct device *dev, > + struct rk817_codec_priv *rk817) > +{ > + struct device_node *node = dev->parent->of_node; > + int ret; > + > + if (!node) { > + dev_err(dev, "%s() dev->parent->of_node is NULL\n", > + __func__); > + return -ENODEV; > + } > + > + node = of_get_child_by_name(dev->parent->of_node, "codec"); > + if (!node) { > + dev_err(dev, "%s() Can not get child: codec\n", > + __func__); > + return -ENODEV; > + } > + > + rk817->hp_ctl_gpio = devm_gpiod_get_optional(dev, "hp-ctl", > + GPIOD_OUT_LOW); > + > + rk817->spk_ctl_gpio = devm_gpiod_get_optional(dev, "spk-ctl", > + GPIOD_OUT_LOW); > + > + ret = of_property_read_u32(node, "spk-mute-delay-ms", > + &rk817->spk_mute_delay); > + if (ret < 0) { > + rk817->spk_mute_delay = 0; > + } > + > + ret = of_property_read_u32(node, "hp-mute-delay-ms", > + &rk817->hp_mute_delay); > + if (ret < 0) { > + rk817->hp_mute_delay = 0; > + } > + > + ret = of_property_read_u32(node, "spk-volume", &rk817->spk_volume); > + if (ret < 0) { > + rk817->spk_volume = OUT_VOLUME; > + } > + if (rk817->spk_volume < 3) > + rk817->spk_volume = 3; > + > + ret = of_property_read_u32(node, "hp-volume", > + &rk817->hp_volume); > + if (ret < 0) { > + rk817->hp_volume = OUT_VOLUME; > + } > + if (rk817->hp_volume < 3) > + rk817->hp_volume = 3; > + > + ret = of_property_read_u32(node, "capture-volume", > + &rk817->capture_volume); > + if (ret < 0) { > + rk817->capture_volume = CAPTURE_VOLUME; > + } > + > + rk817->mic_in_differential = > + of_property_read_bool(node, "mic-in-differential"); > + > + rk817->pdmdata_out_enable = > + of_property_read_bool(node, "pdmdata-out-enable"); > + > + rk817->use_ext_amplifier = > + of_property_read_bool(node, "use-ext-amplifier"); > + > + rk817->adc_for_loopback = > + of_property_read_bool(node, "adc-for-loopback"); you will need DT bindings for all these properties. > + > + return 0; > +} > + > +static const struct regmap_config rk817_codec_regmap_config = { > + .name = "rk817-codec", > + .reg_bits = 8, > + .val_bits = 8, > + .reg_stride = 1, > + .max_register = 0x4f, > + .cache_type = REGCACHE_NONE, > + .volatile_reg = rk817_volatile_register, > + .writeable_reg = rk817_codec_register, > + .readable_reg = rk817_codec_register, > + .reg_defaults = rk817_reg_defaults, > + .num_reg_defaults = ARRAY_SIZE(rk817_reg_defaults), > +}; > + > +static int rk817_platform_probe(struct platform_device *pdev) > +{ > + struct rk808 *rk817 = dev_get_drvdata(pdev->dev.parent); > + struct rk817_codec_priv *rk817_codec_data; > + int ret; > + > + if (!rk817) { > + dev_err(&pdev->dev, "%s : rk817 is NULL\n", __func__); > + return -EINVAL; > + } > + > + rk817_codec_data = devm_kzalloc(&pdev->dev, > + sizeof(struct rk817_codec_priv), > + GFP_KERNEL); > + if (!rk817_codec_data) > + return -ENOMEM; > + > + platform_set_drvdata(pdev, rk817_codec_data); > + > + ret = rk817_codec_parse_dt_property(&pdev->dev, rk817_codec_data); > + if (ret < 0) { > + dev_err(&pdev->dev, "%s() parse device tree property error %d\n", > + __func__, ret); > + goto err_; > + } > + > + rk817_codec_data->regmap = devm_regmap_init_i2c(rk817->i2c, > + &rk817_codec_regmap_config); > + if (IS_ERR(rk817_codec_data->regmap)) { > + ret = PTR_ERR(rk817_codec_data->regmap); > + dev_err(&pdev->dev, "failed to allocate register map: %d\n", > + ret); > + goto err_; > + } > + > + rk817_codec_data->mclk = devm_clk_get(&pdev->dev, "mclk"); > + if (IS_ERR(rk817_codec_data->mclk)) { > + dev_err(&pdev->dev, "Unable to get mclk\n"); > + ret = -ENXIO; > + goto err_; > + } > + > + ret = devm_snd_soc_register_component(&pdev->dev, &soc_codec_dev_rk817, > + rk817_dai, ARRAY_SIZE(rk817_dai)); > + if (ret < 0) { > + dev_err(&pdev->dev, "%s() register codec error %d\n", > + __func__, ret); > + goto err_; > + } > + > + return 0; > +err_: > + > + return ret; > +} > + > +static int rk817_platform_remove(struct platform_device *pdev) > +{ > + snd_soc_unregister_component(&pdev->dev); humm, that looks like a bug. If you used devm_soc_register_component() in the probe, you don't need to release it here manually? > +++ b/sound/soc/codecs/rk817_codec.h > @@ -0,0 +1,197 @@ > +/* > + * Copyright (c) 2018 Rockchip Electronics Co. Ltd. > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License as published by > + * the Free Software Foundation; either version 2 of the License, or > + * (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. remove and use SPDX

1 0

[PATCH] Add audio driver for rk817 upstream
by Chris Morgan 10 Mar '21

10 Mar '21

I'm wondering if you all can help me. I'm trying to get the rk817 codec driver working from Rockchip's BSP kernel sources (GPL per the license) and I'm struggling with a few parts. The first part is I'm not sure if I have my audio paths set up correctly. For example the sinks I have set up are for HPOL and HPOR, and the source is for MIC. While this does work (audio output seems fine) I'm having issues with the GPIO to detect headphone insertion. When I insert headphones I expect the audio to output to the headphones, and when I remove headphones I expect the audio to output to a speaker. Right now I have to manually change the output between the different paths. Additionally, while the codec "technically" has dual channel inputs for the microphone, I'm only using the L channel. Should I have a stereo mixer? Note that I'm using the simple-audio-card to set my paths, widgets, and the gpio pin. They all work, just not seamlessly together. Basically, I'm wanting to know if and how I should set up my audio paths for the speaker and headphones, they use mostly the same pins and only really differ in setting the external amp settings. Additionally, once I set up my paths how do I ensure that the GPIO events will result in switching between the speaker/headphone path? Any help you can provide is appreciated. This is my first attempt at something of this magnitude (for me it's a big step), even if it's just trying to facilitate in getting a vendor's code ready for upstream. Thank you. --- drivers/mfd/rk808.c | 6 + sound/soc/codecs/Kconfig | 6 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/rk817_codec.c | 1148 ++++++++++++++++++++++++++++++++ sound/soc/codecs/rk817_codec.h | 197 ++++++ 5 files changed, 1359 insertions(+) create mode 100644 sound/soc/codecs/rk817_codec.c create mode 100644 sound/soc/codecs/rk817_codec.h diff --git a/drivers/mfd/rk808.c b/drivers/mfd/rk808.c index ad923dd4e007..adb8a7da29db 100644 --- a/drivers/mfd/rk808.c +++ b/drivers/mfd/rk808.c @@ -163,6 +163,12 @@ static const struct mfd_cell rk817s[] = { .num_resources = ARRAY_SIZE(rk817_rtc_resources), .resources = &rk817_rtc_resources[0], }, +#ifdef CONFIG_SND_SOC_RK817 + { + .name = "rk817-codec", + .of_compatible = "rockchip,rk817-codec", + }, +#endif }; static const struct mfd_cell rk818s[] = { diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index e4cf14e66a51..d835145ad65e 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -155,6 +155,7 @@ config SND_SOC_ALL_CODECS imply SND_SOC_PCM512x_I2C imply SND_SOC_PCM512x_SPI imply SND_SOC_RK3328 + imply SND_SOC_RK817 imply SND_SOC_RT274 imply SND_SOC_RT286 imply SND_SOC_RT298 @@ -1059,6 +1060,11 @@ config SND_SOC_RK3328 tristate "Rockchip RK3328 audio CODEC" select REGMAP_MMIO +config SND_SOC_RK817 + tristate "Rockchip RK817 audio CODEC" + depends on MFD_RK808 + select REGMAP_I2C + config SND_SOC_RL6231 tristate default y if SND_SOC_RT5514=y diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index 81357dc62ea0..4e5e9b28775c 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -165,6 +165,7 @@ snd-soc-pcm512x-objs := pcm512x.o snd-soc-pcm512x-i2c-objs := pcm512x-i2c.o snd-soc-pcm512x-spi-objs := pcm512x-spi.o snd-soc-rk3328-objs := rk3328_codec.o +snd-soc-rk817-objs := rk817_codec.o snd-soc-rl6231-objs := rl6231.o snd-soc-rl6347a-objs := rl6347a.o snd-soc-rt1011-objs := rt1011.o @@ -479,6 +480,7 @@ obj-$(CONFIG_SND_SOC_PCM512x) += snd-soc-pcm512x.o obj-$(CONFIG_SND_SOC_PCM512x_I2C) += snd-soc-pcm512x-i2c.o obj-$(CONFIG_SND_SOC_PCM512x_SPI) += snd-soc-pcm512x-spi.o obj-$(CONFIG_SND_SOC_RK3328) += snd-soc-rk3328.o +obj-$(CONFIG_SND_SOC_RK817) += snd-soc-rk817.o obj-$(CONFIG_SND_SOC_RL6231) += snd-soc-rl6231.o obj-$(CONFIG_SND_SOC_RL6347A) += snd-soc-rl6347a.o obj-$(CONFIG_SND_SOC_RT1011) += snd-soc-rt1011.o diff --git a/sound/soc/codecs/rk817_codec.c b/sound/soc/codecs/rk817_codec.c new file mode 100644 index 000000000000..973e2f7562f8 --- /dev/null +++ b/sound/soc/codecs/rk817_codec.c @@ -0,0 +1,1148 @@ +/* + * Copyright (c) 2018 Rockchip Electronics Co. Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/clk.h> +#include <linux/device.h> +#include <linux/delay.h> +#include <linux/mfd/rk808.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/of_gpio.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> +#include <sound/core.h> +#include <sound/pcm_params.h> +#include <sound/soc.h> +#include <sound/tlv.h> +#include "rk817_codec.h" + +/* For route */ +#define RK817_CODEC_PLAYBACK 1 +#define RK817_CODEC_CAPTURE 2 +#define RK817_CODEC_ALL (RK817_CODEC_PLAYBACK |\ + RK817_CODEC_CAPTURE) + +/* + * DDAC L/R volume setting + * 0db~-95db,0.375db/step,for example: + * 0: 0dB + * 0x0a: -3.75dB + * 0x7d: -46dB + * 0xff: -95dB + */ +#define OUT_VOLUME (0x03) + +/* + * DADC L/R volume setting + * 0db~-95db,0.375db/step,for example: + * 0: 0dB + * 0x0a: -3.75dB + * 0x7d: -46dB + * 0xff: -95dB + */ +#define CAPTURE_VOLUME (0x03) + +#define CODEC_SET_SPK 1 +#define CODEC_SET_HP 2 + +struct rk817_codec_priv { + struct snd_soc_component *component; + struct regmap *regmap; + struct rk808 *rk817; + struct clk *mclk; + + unsigned int stereo_sysclk; + unsigned int rate; + + unsigned int spk_volume; + unsigned int hp_volume; + unsigned int capture_volume; + + bool mic_in_differential; + bool pdmdata_out_enable; + bool use_ext_amplifier; + bool adc_for_loopback; + + long int playback_path; + long int capture_path; + + struct gpio_desc *spk_ctl_gpio; + struct gpio_desc *hp_ctl_gpio; + int spk_mute_delay; + int hp_mute_delay; +}; + +static const struct reg_default rk817_reg_defaults[] = { + { RK817_CODEC_DTOP_VUCTL, 0x003 }, + { RK817_CODEC_DTOP_VUCTIME, 0x00 }, + { RK817_CODEC_DTOP_LPT_SRST, 0x00 }, + { RK817_CODEC_DTOP_DIGEN_CLKE, 0x00 }, + { RK817_CODEC_AREF_RTCFG0, 0x00 }, + { RK817_CODEC_AREF_RTCFG1, 0x06 }, + { RK817_CODEC_AADC_CFG0, 0xc8 }, + { RK817_CODEC_AADC_CFG1, 0x00 }, + { RK817_CODEC_DADC_VOLL, 0x00 }, + { RK817_CODEC_DADC_VOLR, 0x00 }, + { RK817_CODEC_DADC_SR_ACL0, 0x00 }, + { RK817_CODEC_DADC_ALC1, 0x00 }, + { RK817_CODEC_DADC_ALC2, 0x00 }, + { RK817_CODEC_DADC_NG, 0x00 }, + { RK817_CODEC_DADC_HPF, 0x00 }, + { RK817_CODEC_DADC_RVOLL, 0xff }, + { RK817_CODEC_DADC_RVOLR, 0xff }, + { RK817_CODEC_AMIC_CFG0, 0x70 }, + { RK817_CODEC_AMIC_CFG1, 0x00 }, + { RK817_CODEC_DMIC_PGA_GAIN, 0x66 }, + { RK817_CODEC_DMIC_LMT1, 0x00 }, + { RK817_CODEC_DMIC_LMT2, 0x00 }, + { RK817_CODEC_DMIC_NG1, 0x00 }, + { RK817_CODEC_DMIC_NG2, 0x00 }, + { RK817_CODEC_ADAC_CFG0, 0x00 }, + { RK817_CODEC_ADAC_CFG1, 0x07 }, + { RK817_CODEC_DDAC_POPD_DACST, 0x82 }, + { RK817_CODEC_DDAC_VOLL, 0x00 }, + { RK817_CODEC_DDAC_VOLR, 0x00 }, + { RK817_CODEC_DDAC_SR_LMT0, 0x00 }, + { RK817_CODEC_DDAC_LMT1, 0x00 }, + { RK817_CODEC_DDAC_LMT2, 0x00 }, + { RK817_CODEC_DDAC_MUTE_MIXCTL, 0xa0 }, + { RK817_CODEC_DDAC_RVOLL, 0xff }, + { RK817_CODEC_DDAC_RVOLR, 0xff }, + { RK817_CODEC_AHP_ANTI0, 0x00 }, + { RK817_CODEC_AHP_ANTI1, 0x00 }, + { RK817_CODEC_AHP_CFG0, 0xe0 }, + { RK817_CODEC_AHP_CFG1, 0x1f }, + { RK817_CODEC_AHP_CP, 0x09 }, + { RK817_CODEC_ACLASSD_CFG1, 0x69 }, + { RK817_CODEC_ACLASSD_CFG2, 0x44 }, + { RK817_CODEC_APLL_CFG0, 0x04 }, + { RK817_CODEC_APLL_CFG1, 0x00 }, + { RK817_CODEC_APLL_CFG2, 0x30 }, + { RK817_CODEC_APLL_CFG3, 0x19 }, + { RK817_CODEC_APLL_CFG4, 0x65 }, + { RK817_CODEC_APLL_CFG5, 0x01 }, + { RK817_CODEC_DI2S_CKM, 0x01 }, + { RK817_CODEC_DI2S_RSD, 0x00 }, + { RK817_CODEC_DI2S_RXCR1, 0x00 }, + { RK817_CODEC_DI2S_RXCR2, 0x17 }, + { RK817_CODEC_DI2S_RXCMD_TSD, 0x00 }, + { RK817_CODEC_DI2S_TXCR1, 0x00 }, + { RK817_CODEC_DI2S_TXCR2, 0x17 }, + { RK817_CODEC_DI2S_TXCR3_TXCMD, 0x00 }, +}; + +static const DECLARE_TLV_DB_MINMAX(rk817_vol_tlv, -9500, -675); + +static const struct snd_kcontrol_new rk817_dac_controls[] = { + SOC_DOUBLE_R_RANGE_TLV("Playback Volume", RK817_CODEC_DDAC_VOLL, + RK817_CODEC_DDAC_VOLR, 0, 0x12, 0xff, 1, rk817_vol_tlv), + SOC_DOUBLE_R("Record Volume", RK817_CODEC_DADC_VOLL, RK817_CODEC_DADC_VOLR, + 0, 0xFF, 1) +}; + +static bool rk817_volatile_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case RK817_CODEC_DTOP_LPT_SRST: + return true; + default: + return false; + } +} + +static bool rk817_codec_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case RK817_CODEC_DTOP_VUCTL: + case RK817_CODEC_DTOP_VUCTIME: + case RK817_CODEC_DTOP_LPT_SRST: + case RK817_CODEC_DTOP_DIGEN_CLKE: + case RK817_CODEC_AREF_RTCFG0: + case RK817_CODEC_AREF_RTCFG1: + case RK817_CODEC_AADC_CFG0: + case RK817_CODEC_AADC_CFG1: + case RK817_CODEC_DADC_VOLL: + case RK817_CODEC_DADC_VOLR: + case RK817_CODEC_DADC_SR_ACL0: + case RK817_CODEC_DADC_ALC1: + case RK817_CODEC_DADC_ALC2: + case RK817_CODEC_DADC_NG: + case RK817_CODEC_DADC_HPF: + case RK817_CODEC_DADC_RVOLL: + case RK817_CODEC_DADC_RVOLR: + case RK817_CODEC_AMIC_CFG0: + case RK817_CODEC_AMIC_CFG1: + case RK817_CODEC_DMIC_PGA_GAIN: + case RK817_CODEC_DMIC_LMT1: + case RK817_CODEC_DMIC_LMT2: + case RK817_CODEC_DMIC_NG1: + case RK817_CODEC_DMIC_NG2: + case RK817_CODEC_ADAC_CFG0: + case RK817_CODEC_ADAC_CFG1: + case RK817_CODEC_DDAC_POPD_DACST: + case RK817_CODEC_DDAC_VOLL: + case RK817_CODEC_DDAC_VOLR: + case RK817_CODEC_DDAC_SR_LMT0: + case RK817_CODEC_DDAC_LMT1: + case RK817_CODEC_DDAC_LMT2: + case RK817_CODEC_DDAC_MUTE_MIXCTL: + case RK817_CODEC_DDAC_RVOLL: + case RK817_CODEC_DDAC_RVOLR: + case RK817_CODEC_AHP_ANTI0: + case RK817_CODEC_AHP_ANTI1: + case RK817_CODEC_AHP_CFG0: + case RK817_CODEC_AHP_CFG1: + case RK817_CODEC_AHP_CP: + case RK817_CODEC_ACLASSD_CFG1: + case RK817_CODEC_ACLASSD_CFG2: + case RK817_CODEC_APLL_CFG0: + case RK817_CODEC_APLL_CFG1: + case RK817_CODEC_APLL_CFG2: + case RK817_CODEC_APLL_CFG3: + case RK817_CODEC_APLL_CFG4: + case RK817_CODEC_APLL_CFG5: + case RK817_CODEC_DI2S_CKM: + case RK817_CODEC_DI2S_RSD: + case RK817_CODEC_DI2S_RXCR1: + case RK817_CODEC_DI2S_RXCR2: + case RK817_CODEC_DI2S_RXCMD_TSD: + case RK817_CODEC_DI2S_TXCR1: + case RK817_CODEC_DI2S_TXCR2: + case RK817_CODEC_DI2S_TXCR3_TXCMD: + return true; + default: + return false; + } +} + +static int rk817_codec_ctl_gpio(struct rk817_codec_priv *rk817, + int gpio, int level) +{ + if ((gpio & CODEC_SET_SPK) && + rk817->spk_ctl_gpio) { + gpiod_set_value(rk817->spk_ctl_gpio, level); + msleep(rk817->spk_mute_delay); + } + + if ((gpio & CODEC_SET_HP) && + rk817->hp_ctl_gpio) { + gpiod_set_value(rk817->hp_ctl_gpio, level); + msleep(rk817->hp_mute_delay); + } + + return 0; +} + +static int rk817_reset(struct snd_soc_component *component) +{ + snd_soc_component_write(component, RK817_CODEC_DTOP_LPT_SRST, 0x40); + snd_soc_component_write(component, RK817_CODEC_DDAC_POPD_DACST, 0x02); + snd_soc_component_write(component, RK817_CODEC_DTOP_DIGEN_CLKE, 0x0f); + snd_soc_component_write(component, RK817_CODEC_APLL_CFG0, 0x04); + snd_soc_component_write(component, RK817_CODEC_APLL_CFG1, 0x58); + snd_soc_component_write(component, RK817_CODEC_APLL_CFG2, 0x2d); + snd_soc_component_write(component, RK817_CODEC_APLL_CFG3, 0x0c); + snd_soc_component_write(component, RK817_CODEC_APLL_CFG4, 0xa5); + snd_soc_component_write(component, RK817_CODEC_APLL_CFG5, 0x00); + snd_soc_component_write(component, RK817_CODEC_DTOP_DIGEN_CLKE, 0x00); + + return 0; +} + +static struct rk817_reg_val_typ playback_power_up_list[] = { + {RK817_CODEC_AREF_RTCFG1, 0x40}, + {RK817_CODEC_DDAC_POPD_DACST, 0x02}, + {RK817_CODEC_DDAC_SR_LMT0, 0x02}, + /* APLL */ + {RK817_CODEC_APLL_CFG0, 0x04}, + {RK817_CODEC_APLL_CFG1, 0x58}, + {RK817_CODEC_APLL_CFG2, 0x2d}, + {RK817_CODEC_APLL_CFG3, 0x0c}, + {RK817_CODEC_APLL_CFG4, 0xa5}, + {RK817_CODEC_APLL_CFG5, 0x00}, + + {RK817_CODEC_DI2S_RXCMD_TSD, 0x00}, + {RK817_CODEC_DI2S_RSD, 0x00}, + {RK817_CODEC_DI2S_RXCR1, 0x00}, + {RK817_CODEC_DI2S_RXCMD_TSD, 0x20}, + {RK817_CODEC_DTOP_VUCTIME, 0xf4}, + {RK817_CODEC_DDAC_MUTE_MIXCTL, 0x00}, + + {RK817_CODEC_DDAC_VOLL, 0x0a}, + {RK817_CODEC_DDAC_VOLR, 0x0a}, +}; + +#define RK817_CODEC_PLAYBACK_POWER_UP_LIST_LEN \ + ARRAY_SIZE(playback_power_up_list) + +static struct rk817_reg_val_typ playback_power_down_list[] = { + {RK817_CODEC_DDAC_MUTE_MIXCTL, 0x01}, + {RK817_CODEC_ADAC_CFG1, 0x0f}, + /* HP */ + {RK817_CODEC_AHP_CFG0, 0xe0}, + {RK817_CODEC_AHP_CP, 0x09}, + /* SPK */ + {RK817_CODEC_ACLASSD_CFG1, 0x69}, +}; + +#define RK817_CODEC_PLAYBACK_POWER_DOWN_LIST_LEN \ + ARRAY_SIZE(playback_power_down_list) + +static struct rk817_reg_val_typ capture_power_up_list[] = { + {RK817_CODEC_AREF_RTCFG1, 0x40}, + {RK817_CODEC_DDAC_SR_LMT0, 0x02}, + {RK817_CODEC_DADC_SR_ACL0, 0x02}, + + {RK817_CODEC_APLL_CFG0, 0x04}, + {RK817_CODEC_APLL_CFG1, 0x58}, + {RK817_CODEC_APLL_CFG2, 0x2d}, + {RK817_CODEC_APLL_CFG3, 0x0c}, + {RK817_CODEC_APLL_CFG4, 0xa5}, + {RK817_CODEC_APLL_CFG5, 0x00}, + + {RK817_CODEC_DI2S_RSD, 0x00}, + {RK817_CODEC_DI2S_RXCR1, 0x00}, + {RK817_CODEC_DI2S_RXCMD_TSD, 0x20}, + {RK817_CODEC_DTOP_VUCTIME, 0xf4}, + + {RK817_CODEC_DDAC_MUTE_MIXCTL, 0x00}, + {RK817_CODEC_AADC_CFG0, 0x08}, + {RK817_CODEC_AMIC_CFG0, 0x0f}, + {RK817_CODEC_DI2S_TXCR3_TXCMD, 0x88}, + {RK817_CODEC_DDAC_POPD_DACST, 0x02}, + /* 0x29: -18db to 27db */ + {RK817_CODEC_DMIC_PGA_GAIN, 0x99}, +}; + +#define RK817_CODEC_CAPTURE_POWER_UP_LIST_LEN \ + ARRAY_SIZE(capture_power_up_list) + +static struct rk817_reg_val_typ capture_power_down_list[] = { + {RK817_CODEC_AADC_CFG0, 0xc8}, + {RK817_CODEC_AMIC_CFG0, 0x70}, +}; + +#define RK817_CODEC_CAPTURE_POWER_DOWN_LIST_LEN \ + ARRAY_SIZE(capture_power_down_list) + +static int rk817_codec_power_up(struct snd_soc_component *component, int type) +{ + struct rk817_codec_priv *rk817 = snd_soc_component_get_drvdata(component); + int i; + + if (type & RK817_CODEC_PLAYBACK) { + snd_soc_component_update_bits(component, + RK817_CODEC_DTOP_DIGEN_CLKE, + DAC_DIG_CLK_MASK, DAC_DIG_CLK_EN); + for (i = 0; i < RK817_CODEC_PLAYBACK_POWER_UP_LIST_LEN; i++) { + snd_soc_component_write(component, + playback_power_up_list[i].reg, + playback_power_up_list[i].value); + } + } + + if (type & RK817_CODEC_CAPTURE) { + snd_soc_component_update_bits(component, + RK817_CODEC_DTOP_DIGEN_CLKE, + ADC_DIG_CLK_MASK, + ADC_DIG_CLK_EN); + for (i = 0; i < RK817_CODEC_CAPTURE_POWER_UP_LIST_LEN; i++) { + snd_soc_component_write(component, + capture_power_up_list[i].reg, + capture_power_up_list[i].value); + } + + if (rk817->mic_in_differential) + snd_soc_component_update_bits(component, + RK817_CODEC_AMIC_CFG0, + MIC_DIFF_MASK, MIC_DIFF_EN); + else + snd_soc_component_update_bits(component, + RK817_CODEC_AMIC_CFG0, + MIC_DIFF_MASK, + MIC_DIFF_DIS); + + if (rk817->pdmdata_out_enable) + snd_soc_component_update_bits(component, + RK817_CODEC_DI2S_CKM, + PDM_EN_MASK, + PDM_EN_ENABLE); + + snd_soc_component_write(component, RK817_CODEC_DADC_VOLL, + rk817->capture_volume); + snd_soc_component_write(component, RK817_CODEC_DADC_VOLR, + rk817->capture_volume); + } + + return 0; +} + +static int rk817_codec_power_down(struct snd_soc_component *component, int type) +{ + int i; + + /* mute output for pop noise */ + if (type & RK817_CODEC_PLAYBACK) { + snd_soc_component_update_bits(component, + RK817_CODEC_DDAC_MUTE_MIXCTL, + DACMT_ENABLE, DACMT_ENABLE); + } + + if (type & RK817_CODEC_CAPTURE) { + for (i = 0; i < RK817_CODEC_CAPTURE_POWER_DOWN_LIST_LEN; i++) { + snd_soc_component_write(component, + capture_power_down_list[i].reg, + capture_power_down_list[i].value); + } + snd_soc_component_update_bits(component, RK817_CODEC_DTOP_DIGEN_CLKE, + ADC_DIG_CLK_MASK, ADC_DIG_CLK_DIS); + } + + if (type & RK817_CODEC_PLAYBACK) { + for (i = 0; i < RK817_CODEC_PLAYBACK_POWER_DOWN_LIST_LEN; i++) { + snd_soc_component_write(component, + playback_power_down_list[i].reg, + playback_power_down_list[i].value); + } + snd_soc_component_update_bits(component, + RK817_CODEC_DTOP_DIGEN_CLKE, + DAC_DIG_CLK_MASK, DAC_DIG_CLK_DIS); + } + + if (type == RK817_CODEC_ALL) { + for (i = 0; i < RK817_CODEC_PLAYBACK_POWER_DOWN_LIST_LEN; i++) { + snd_soc_component_write(component, + playback_power_down_list[i].reg, + playback_power_down_list[i].value); + } + for (i = 0; i < RK817_CODEC_CAPTURE_POWER_DOWN_LIST_LEN; i++) { + snd_soc_component_write(component, + capture_power_down_list[i].reg, + capture_power_down_list[i].value); + } + snd_soc_component_write(component, RK817_CODEC_DTOP_DIGEN_CLKE, 0x00); + snd_soc_component_write(component, RK817_CODEC_APLL_CFG5, 0x01); + snd_soc_component_write(component, RK817_CODEC_AREF_RTCFG1, 0x06); + } + + return 0; +} + +/* For tiny alsa playback/capture path*/ +static const char * const rk817_playback_path_mode[] = { + "OFF", "SPK", "HP", "SPK_HP"}; + +static const char * const rk817_capture_path_mode[] = { + "MIC OFF", "MIC"}; + +static SOC_ENUM_SINGLE_DECL(rk817_playback_path_type, + 0, 0, rk817_playback_path_mode); + +static SOC_ENUM_SINGLE_DECL(rk817_capture_path_type, + 0, 0, rk817_capture_path_mode); + +static int rk817_playback_path_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); + struct rk817_codec_priv *rk817 = snd_soc_component_get_drvdata(component); + + ucontrol->value.integer.value[0] = rk817->playback_path; + + return 0; +} + +static int rk817_playback_path_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); + struct rk817_codec_priv *rk817 = snd_soc_component_get_drvdata(component); + long int pre_path; + + if (rk817->playback_path == ucontrol->value.integer.value[0]) { + return 0; + } + + pre_path = rk817->playback_path; + rk817->playback_path = ucontrol->value.integer.value[0]; + + if (rk817->playback_path != OFF) + clk_prepare_enable(rk817->mclk); + else + clk_disable_unprepare(rk817->mclk); + + switch (rk817->playback_path) { + case OFF: + if (pre_path != OFF && pre_path != HP_PATH) { + rk817_codec_power_down(component, RK817_CODEC_PLAYBACK); + if (rk817->capture_path == 0) + rk817_codec_power_down(component, RK817_CODEC_ALL); + } + break; + case SPK_PATH: + if (pre_path == OFF) + rk817_codec_power_up(component, RK817_CODEC_PLAYBACK); + if (!rk817->use_ext_amplifier) { + /* power on dac ibias/l/r */ + snd_soc_component_write(component, RK817_CODEC_ADAC_CFG1, + PWD_DACBIAS_ON | PWD_DACD_ON | + PWD_DACL_DOWN | PWD_DACR_DOWN); + /* CLASS D mode, combine LR channels */ + snd_soc_component_write(component, + RK817_CODEC_DDAC_MUTE_MIXCTL, + 0x10); + /* CLASS D enable */ + snd_soc_component_write(component, + RK817_CODEC_ACLASSD_CFG1, + 0xa5); + /* restart CLASS D, OCPP/N */ + snd_soc_component_write(component, + RK817_CODEC_ACLASSD_CFG2, + 0xf7); + } else { + /* HP_CP_EN , CP 2.3V */ + snd_soc_component_write(component, RK817_CODEC_AHP_CP, + 0x11); + /* power on HP two stage opamp ,HP amplitude 0db */ + snd_soc_component_write(component, RK817_CODEC_AHP_CFG0, + 0x80); + /* power on dac ibias/l/r */ + snd_soc_component_write(component, RK817_CODEC_ADAC_CFG1, + PWD_DACBIAS_ON | PWD_DACD_DOWN | + PWD_DACL_ON | PWD_DACR_ON); + snd_soc_component_update_bits(component, + RK817_CODEC_DDAC_MUTE_MIXCTL, + DACMT_ENABLE, DACMT_DISABLE); + } + snd_soc_component_write(component, RK817_CODEC_DDAC_VOLL, + rk817->spk_volume); + snd_soc_component_write(component, RK817_CODEC_DDAC_VOLR, + rk817->spk_volume); + break; + case HP_PATH: + if (pre_path == OFF) + rk817_codec_power_up(component, RK817_CODEC_PLAYBACK); + /* HP_CP_EN , CP 2.3V */ + snd_soc_component_write(component, RK817_CODEC_AHP_CP, 0x11); + /* power on HP two stage opamp ,HP amplitude 0db */ + snd_soc_component_write(component, RK817_CODEC_AHP_CFG0, 0x80); + /* power on dac ibias/l/r */ + snd_soc_component_write(component, RK817_CODEC_ADAC_CFG1, + PWD_DACBIAS_ON | PWD_DACD_DOWN | + PWD_DACL_ON | PWD_DACR_ON); + /* CLASS D mode disable, split LR channels */ + snd_soc_component_write(component, + RK817_CODEC_DDAC_MUTE_MIXCTL, + 0x00); + + snd_soc_component_write(component, RK817_CODEC_DDAC_VOLL, + rk817->hp_volume); + snd_soc_component_write(component, RK817_CODEC_DDAC_VOLR, + rk817->hp_volume); + break; + case SPK_HP: + if (pre_path == OFF) + rk817_codec_power_up(component, RK817_CODEC_PLAYBACK); + + /* HP_CP_EN , CP 2.3V */ + snd_soc_component_write(component, RK817_CODEC_AHP_CP, 0x11); + /* power on HP two stage opamp ,HP amplitude 0db */ + snd_soc_component_write(component, RK817_CODEC_AHP_CFG0, 0x80); + + /* power on dac ibias/l/r */ + snd_soc_component_write(component, RK817_CODEC_ADAC_CFG1, + PWD_DACBIAS_ON | PWD_DACD_ON | + PWD_DACL_ON | PWD_DACR_ON); + + if (!rk817->use_ext_amplifier) { + /* CLASS D mode, combine LR channels */ + snd_soc_component_write(component, + RK817_CODEC_DDAC_MUTE_MIXCTL, + 0x10); + /* CLASS D enable */ + snd_soc_component_write(component, + RK817_CODEC_ACLASSD_CFG1, + 0xa5); + /* restart CLASS D, OCPP/N */ + snd_soc_component_write(component, + RK817_CODEC_ACLASSD_CFG2, + 0xf7); + } + + snd_soc_component_write(component, RK817_CODEC_DDAC_VOLL, + rk817->hp_volume); + snd_soc_component_write(component, RK817_CODEC_DDAC_VOLR, + rk817->hp_volume); + break; + default: + return -EINVAL; + } + + return 0; +} + +static int rk817_capture_path_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); + struct rk817_codec_priv *rk817 = snd_soc_component_get_drvdata(component); + + dev_dbg(component->dev, "%s:capture_path %ld\n", __func__, rk817->capture_path); + ucontrol->value.integer.value[0] = rk817->capture_path; + return 0; +} + +static int rk817_capture_path_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); + struct rk817_codec_priv *rk817 = snd_soc_component_get_drvdata(component); + long int pre_path; + + if (rk817->capture_path == ucontrol->value.integer.value[0]) { + dev_dbg(component->dev, "%s:capture_path is not changed!\n", + __func__); + return 0; + } + + pre_path = rk817->capture_path; + rk817->capture_path = ucontrol->value.integer.value[0]; + + if (rk817->capture_path != MIC_OFF) + clk_prepare_enable(rk817->mclk); + else + clk_disable_unprepare(rk817->mclk); + + switch (rk817->capture_path) { + case MIC_OFF: + if (pre_path != MIC_OFF) + rk817_codec_power_down(component, RK817_CODEC_CAPTURE); + break; + case MIC: + if (pre_path == MIC_OFF) + rk817_codec_power_up(component, RK817_CODEC_CAPTURE); + + if (rk817->adc_for_loopback) { + /* don't need to gain when adc use for loopback */ + snd_soc_component_update_bits(component, + RK817_CODEC_AMIC_CFG0, + 0xf, + 0x0); + snd_soc_component_write(component, + RK817_CODEC_DMIC_PGA_GAIN, + 0x66); + snd_soc_component_write(component, + RK817_CODEC_DADC_VOLL, + 0x00); + snd_soc_component_write(component, + RK817_CODEC_DADC_VOLR, + 0x00); + break; + } + if (!rk817->mic_in_differential) { + snd_soc_component_write(component, + RK817_CODEC_DADC_VOLR, + 0xff); + snd_soc_component_update_bits(component, + RK817_CODEC_AADC_CFG0, + ADC_R_PWD_MASK, + ADC_R_PWD_EN); + snd_soc_component_update_bits(component, + RK817_CODEC_AMIC_CFG0, + PWD_PGA_R_MASK, + PWD_PGA_R_EN); + } + break; + default: + return -EINVAL; + } + + return 0; +} + +static struct snd_kcontrol_new rk817_snd_path_controls[] = { + SOC_ENUM_EXT("Playback Path", rk817_playback_path_type, + rk817_playback_path_get, rk817_playback_path_put), + + SOC_ENUM_EXT("Capture Path", rk817_capture_path_type, + rk817_capture_path_get, rk817_capture_path_put), +}; + +static const struct snd_soc_dapm_widget rk817_dapm_widgets[] = { + SND_SOC_DAPM_INPUT("MIC"), + SND_SOC_DAPM_OUTPUT("HPOL"), + SND_SOC_DAPM_OUTPUT("HPOR"), +}; + +static int rk817_set_dai_sysclk(struct snd_soc_dai *codec_dai, + int clk_id, unsigned int freq, int dir) +{ + struct snd_soc_component *component = codec_dai->component; + struct rk817_codec_priv *rk817 = snd_soc_component_get_drvdata(component); + + rk817->stereo_sysclk = freq; + + return 0; +} + +static int rk817_set_dai_fmt(struct snd_soc_dai *codec_dai, + unsigned int fmt) +{ + struct snd_soc_component *component = codec_dai->component; + unsigned int i2s_mst = 0; + + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBS_CFS: + i2s_mst |= RK817_I2S_MODE_SLV; + break; + case SND_SOC_DAIFMT_CBM_CFM: + i2s_mst |= RK817_I2S_MODE_MST; + break; + default: + dev_err(component->dev, "%s : set master mask failed!\n", __func__); + return -EINVAL; + } + + snd_soc_component_update_bits(component, RK817_CODEC_DI2S_CKM, + RK817_I2S_MODE_MASK, i2s_mst); + + return 0; +} + +static int rk817_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct snd_soc_component *component = dai->component; + + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_S16_LE: + snd_soc_component_write(component, RK817_CODEC_DI2S_RXCR2, + VDW_RX_16BITS); + snd_soc_component_write(component, RK817_CODEC_DI2S_TXCR2, + VDW_TX_16BITS); + break; + case SNDRV_PCM_FORMAT_S24_LE: + case SNDRV_PCM_FORMAT_S32_LE: + snd_soc_component_write(component, RK817_CODEC_DI2S_RXCR2, + VDW_RX_24BITS); + snd_soc_component_write(component, RK817_CODEC_DI2S_TXCR2, + VDW_TX_24BITS); + break; + default: + return -EINVAL; + } + + return 0; +} + +static int rk817_digital_mute(struct snd_soc_dai *dai, int mute, int stream) +{ + struct snd_soc_component *component = dai->component; + struct rk817_codec_priv *rk817 = snd_soc_component_get_drvdata(component); + + if (mute) + snd_soc_component_update_bits(component, + RK817_CODEC_DDAC_MUTE_MIXCTL, + DACMT_ENABLE, DACMT_ENABLE); + else + snd_soc_component_update_bits(component, + RK817_CODEC_DDAC_MUTE_MIXCTL, + DACMT_ENABLE, DACMT_DISABLE); + + if (mute) { + rk817_codec_ctl_gpio(rk817, CODEC_SET_SPK, 0); + rk817_codec_ctl_gpio(rk817, CODEC_SET_HP, 0); + } else { + switch (rk817->playback_path) { + case SPK_PATH: + rk817_codec_ctl_gpio(rk817, CODEC_SET_SPK, 1); + rk817_codec_ctl_gpio(rk817, CODEC_SET_HP, 0); + break; + case HP_PATH: + rk817_codec_ctl_gpio(rk817, CODEC_SET_SPK, 0); + rk817_codec_ctl_gpio(rk817, CODEC_SET_HP, 1); + break; + case SPK_HP: + rk817_codec_ctl_gpio(rk817, CODEC_SET_SPK, 1); + rk817_codec_ctl_gpio(rk817, CODEC_SET_HP, 1); + break; + default: + break; + } + } + + return 0; +} + +#define RK817_PLAYBACK_RATES (SNDRV_PCM_RATE_8000 |\ + SNDRV_PCM_RATE_16000 | \ + SNDRV_PCM_RATE_32000 | \ + SNDRV_PCM_RATE_44100 | \ + SNDRV_PCM_RATE_48000 | \ + SNDRV_PCM_RATE_96000) + +#define RK817_CAPTURE_RATES (SNDRV_PCM_RATE_8000 |\ + SNDRV_PCM_RATE_16000 | \ + SNDRV_PCM_RATE_32000 | \ + SNDRV_PCM_RATE_44100 | \ + SNDRV_PCM_RATE_48000 | \ + SNDRV_PCM_RATE_96000) + +#define RK817_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\ + SNDRV_PCM_FMTBIT_S20_3LE |\ + SNDRV_PCM_FMTBIT_S24_LE |\ + SNDRV_PCM_FMTBIT_S32_LE) + +static struct snd_soc_dai_ops rk817_dai_ops = { + .hw_params = rk817_hw_params, + .set_fmt = rk817_set_dai_fmt, + .set_sysclk = rk817_set_dai_sysclk, + .mute_stream = rk817_digital_mute, + .no_capture_mute = 1, +}; + +static struct snd_soc_dai_driver rk817_dai[] = { + { + .name = "rk817-hifi", + .id = RK817_HIFI, + .playback = { + .stream_name = "Playback", + .channels_min = 2, + .channels_max = 8, + .rates = RK817_PLAYBACK_RATES, + .formats = RK817_FORMATS, + }, + .capture = { + .stream_name = "Capture", + .channels_min = 1, + .channels_max = 2, + .rates = RK817_CAPTURE_RATES, + .formats = RK817_FORMATS, + }, + .ops = &rk817_dai_ops, + }, +}; + +static int rk817_suspend(struct snd_soc_component *component) +{ + rk817_codec_power_down(component, RK817_CODEC_ALL); + return 0; +} + +static int rk817_resume(struct snd_soc_component *component) +{ + struct rk817_codec_priv *rk817 = snd_soc_component_get_drvdata(component); + + rk817_codec_power_up(component, RK817_CODEC_ALL); + + switch (rk817->playback_path) { + case OFF: + break; + case SPK_PATH: + if (!rk817->use_ext_amplifier) { + /* power on dac ibias/l/r */ + snd_soc_component_write(component, RK817_CODEC_ADAC_CFG1, + PWD_DACBIAS_ON | PWD_DACD_ON | + PWD_DACL_ON | PWD_DACR_ON); + /* CLASS D mode */ + snd_soc_component_write(component, RK817_CODEC_DDAC_MUTE_MIXCTL, 0x10); + /* CLASS D enable */ + snd_soc_component_write(component, RK817_CODEC_ACLASSD_CFG1, 0xa5); + /* restart CLASS D, OCPP/N */ + snd_soc_component_write(component, RK817_CODEC_ACLASSD_CFG2, 0xc4); + } else { + /* HP_CP_EN , CP 2.3V */ + snd_soc_component_write(component, RK817_CODEC_AHP_CP, 0x11); + /* power on HP two stage opamp ,HP amplitude 0db */ + snd_soc_component_write(component, RK817_CODEC_AHP_CFG0, 0x80); + /* power on dac ibias/l/r */ + snd_soc_component_write(component, RK817_CODEC_ADAC_CFG1, + PWD_DACBIAS_ON | PWD_DACD_DOWN | + PWD_DACL_ON | PWD_DACR_ON); + snd_soc_component_update_bits(component, RK817_CODEC_DDAC_MUTE_MIXCTL, + DACMT_ENABLE, DACMT_DISABLE); + } + break; + case HP_PATH: + /* HP_CP_EN , CP 2.3V */ + snd_soc_component_write(component, RK817_CODEC_AHP_CP, 0x11); + /* power on HP two stage opamp ,HP amplitude 0db */ + snd_soc_component_write(component, RK817_CODEC_AHP_CFG0, 0x80); + /* power on dac ibias/l/r */ + snd_soc_component_write(component, RK817_CODEC_ADAC_CFG1, + PWD_DACBIAS_ON | PWD_DACD_DOWN | + PWD_DACL_ON | PWD_DACR_ON); + snd_soc_component_update_bits(component, RK817_CODEC_DDAC_MUTE_MIXCTL, + DACMT_ENABLE, DACMT_DISABLE); + break; + case SPK_HP: + /* HP_CP_EN , CP 2.3V */ + snd_soc_component_write(component, RK817_CODEC_AHP_CP, 0x11); + /* power on HP two stage opamp ,HP amplitude 0db */ + snd_soc_component_write(component, RK817_CODEC_AHP_CFG0, 0x80); + + /* power on dac ibias/l/r */ + snd_soc_component_write(component, RK817_CODEC_ADAC_CFG1, + PWD_DACBIAS_ON | PWD_DACD_ON | + PWD_DACL_ON | PWD_DACR_ON); + + if (!rk817->use_ext_amplifier) { + /* CLASS D mode */ + snd_soc_component_write(component, RK817_CODEC_DDAC_MUTE_MIXCTL, 0x10); + /* CLASS D enable */ + snd_soc_component_write(component, RK817_CODEC_ACLASSD_CFG1, 0xa5); + /* restart CLASS D, OCPP/N */ + snd_soc_component_write(component, RK817_CODEC_ACLASSD_CFG2, 0xc4); + } + break; + default: + return -EINVAL; + } + + return 0; +} + +static int rk817_probe(struct snd_soc_component *component) +{ + struct rk817_codec_priv *rk817 = snd_soc_component_get_drvdata(component); + struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component); + + if (!rk817) { + dev_err(component->dev, "%s : rk817 priv is NULL!\n", + __func__); + return -EINVAL; + } + snd_soc_component_init_regmap(component, rk817->regmap); + rk817->component = component; + rk817->playback_path = OFF; + rk817->capture_path = MIC_OFF; + + rk817_reset(component); + snd_soc_add_component_controls(component, rk817_snd_path_controls, + ARRAY_SIZE(rk817_snd_path_controls)); + + snd_soc_dapm_new_controls(dapm, rk817_dapm_widgets, + ARRAY_SIZE(rk817_dapm_widgets)); + return 0; +} + +/* power down chip */ +static void rk817_remove(struct snd_soc_component *component) +{ + struct rk817_codec_priv *rk817 = snd_soc_component_get_drvdata(component); + + if (!rk817) { + dev_err(component->dev, "%s : rk817 is NULL\n", __func__); + return; + } + + rk817_codec_power_down(component, RK817_CODEC_ALL); + snd_soc_component_exit_regmap(component); + mdelay(10); + +} + +static const struct snd_soc_component_driver soc_codec_dev_rk817 = { + .probe = rk817_probe, + .remove = rk817_remove, + .suspend = rk817_suspend, + .resume = rk817_resume, + .idle_bias_on = 1, + .use_pmdown_time = 1, + .endianness = 1, + .non_legacy_dai_naming = 1, + .controls = rk817_dac_controls, + .num_controls = ARRAY_SIZE(rk817_dac_controls), +}; + +static int rk817_codec_parse_dt_property(struct device *dev, + struct rk817_codec_priv *rk817) +{ + struct device_node *node = dev->parent->of_node; + int ret; + + if (!node) { + dev_err(dev, "%s() dev->parent->of_node is NULL\n", + __func__); + return -ENODEV; + } + + node = of_get_child_by_name(dev->parent->of_node, "codec"); + if (!node) { + dev_err(dev, "%s() Can not get child: codec\n", + __func__); + return -ENODEV; + } + + rk817->hp_ctl_gpio = devm_gpiod_get_optional(dev, "hp-ctl", + GPIOD_OUT_LOW); + + rk817->spk_ctl_gpio = devm_gpiod_get_optional(dev, "spk-ctl", + GPIOD_OUT_LOW); + + ret = of_property_read_u32(node, "spk-mute-delay-ms", + &rk817->spk_mute_delay); + if (ret < 0) { + rk817->spk_mute_delay = 0; + } + + ret = of_property_read_u32(node, "hp-mute-delay-ms", + &rk817->hp_mute_delay); + if (ret < 0) { + rk817->hp_mute_delay = 0; + } + + ret = of_property_read_u32(node, "spk-volume", &rk817->spk_volume); + if (ret < 0) { + rk817->spk_volume = OUT_VOLUME; + } + if (rk817->spk_volume < 3) + rk817->spk_volume = 3; + + ret = of_property_read_u32(node, "hp-volume", + &rk817->hp_volume); + if (ret < 0) { + rk817->hp_volume = OUT_VOLUME; + } + if (rk817->hp_volume < 3) + rk817->hp_volume = 3; + + ret = of_property_read_u32(node, "capture-volume", + &rk817->capture_volume); + if (ret < 0) { + rk817->capture_volume = CAPTURE_VOLUME; + } + + rk817->mic_in_differential = + of_property_read_bool(node, "mic-in-differential"); + + rk817->pdmdata_out_enable = + of_property_read_bool(node, "pdmdata-out-enable"); + + rk817->use_ext_amplifier = + of_property_read_bool(node, "use-ext-amplifier"); + + rk817->adc_for_loopback = + of_property_read_bool(node, "adc-for-loopback"); + + return 0; +} + +static const struct regmap_config rk817_codec_regmap_config = { + .name = "rk817-codec", + .reg_bits = 8, + .val_bits = 8, + .reg_stride = 1, + .max_register = 0x4f, + .cache_type = REGCACHE_NONE, + .volatile_reg = rk817_volatile_register, + .writeable_reg = rk817_codec_register, + .readable_reg = rk817_codec_register, + .reg_defaults = rk817_reg_defaults, + .num_reg_defaults = ARRAY_SIZE(rk817_reg_defaults), +}; + +static int rk817_platform_probe(struct platform_device *pdev) +{ + struct rk808 *rk817 = dev_get_drvdata(pdev->dev.parent); + struct rk817_codec_priv *rk817_codec_data; + int ret; + + if (!rk817) { + dev_err(&pdev->dev, "%s : rk817 is NULL\n", __func__); + return -EINVAL; + } + + rk817_codec_data = devm_kzalloc(&pdev->dev, + sizeof(struct rk817_codec_priv), + GFP_KERNEL); + if (!rk817_codec_data) + return -ENOMEM; + + platform_set_drvdata(pdev, rk817_codec_data); + + ret = rk817_codec_parse_dt_property(&pdev->dev, rk817_codec_data); + if (ret < 0) { + dev_err(&pdev->dev, "%s() parse device tree property error %d\n", + __func__, ret); + goto err_; + } + + rk817_codec_data->regmap = devm_regmap_init_i2c(rk817->i2c, + &rk817_codec_regmap_config); + if (IS_ERR(rk817_codec_data->regmap)) { + ret = PTR_ERR(rk817_codec_data->regmap); + dev_err(&pdev->dev, "failed to allocate register map: %d\n", + ret); + goto err_; + } + + rk817_codec_data->mclk = devm_clk_get(&pdev->dev, "mclk"); + if (IS_ERR(rk817_codec_data->mclk)) { + dev_err(&pdev->dev, "Unable to get mclk\n"); + ret = -ENXIO; + goto err_; + } + + ret = devm_snd_soc_register_component(&pdev->dev, &soc_codec_dev_rk817, + rk817_dai, ARRAY_SIZE(rk817_dai)); + if (ret < 0) { + dev_err(&pdev->dev, "%s() register codec error %d\n", + __func__, ret); + goto err_; + } + + return 0; +err_: + + return ret; +} + +static int rk817_platform_remove(struct platform_device *pdev) +{ + snd_soc_unregister_component(&pdev->dev); + + return 0; +} + +static void rk817_platform_shutdown(struct platform_device *pdev) +{ + struct rk817_codec_priv *rk817 = dev_get_drvdata(&pdev->dev); + + if (rk817 && rk817->component) + rk817_codec_power_down(rk817->component, RK817_CODEC_ALL); +} + +static const struct of_device_id rk817_codec_dt_ids[] = { + { .compatible = "rockchip,rk817-codec" }, + {}, +}; +MODULE_DEVICE_TABLE(of, rk817_codec_dt_ids); + +static struct platform_driver rk817_codec_driver = { + .driver = { + .name = "rk817-codec", + .of_match_table = rk817_codec_dt_ids, + }, + .probe = rk817_platform_probe, + .remove = rk817_platform_remove, + .shutdown = rk817_platform_shutdown, +}; + +module_platform_driver(rk817_codec_driver); + +MODULE_DESCRIPTION("ASoC RK817 codec driver"); +MODULE_AUTHOR("binyuan <kevan.lan(a)rock-chips.com>"); +MODULE_LICENSE("GPL v2"); diff --git a/sound/soc/codecs/rk817_codec.h b/sound/soc/codecs/rk817_codec.h new file mode 100644 index 000000000000..3f13eade80b3 --- /dev/null +++ b/sound/soc/codecs/rk817_codec.h @@ -0,0 +1,197 @@ +/* + * Copyright (c) 2018 Rockchip Electronics Co. Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __RK817_CODEC_H__ +#define __RK817_CODEC_H__ + +/* codec register */ +#define RK817_CODEC_BASE 0x0000 + +#define RK817_CODEC_DTOP_VUCTL (RK817_CODEC_BASE + 0x12) +#define RK817_CODEC_DTOP_VUCTIME (RK817_CODEC_BASE + 0x13) +#define RK817_CODEC_DTOP_LPT_SRST (RK817_CODEC_BASE + 0x14) +#define RK817_CODEC_DTOP_DIGEN_CLKE (RK817_CODEC_BASE + 0x15) +#define RK817_CODEC_AREF_RTCFG0 (RK817_CODEC_BASE + 0x16) +#define RK817_CODEC_AREF_RTCFG1 (RK817_CODEC_BASE + 0x17) +#define RK817_CODEC_AADC_CFG0 (RK817_CODEC_BASE + 0x18) +#define RK817_CODEC_AADC_CFG1 (RK817_CODEC_BASE + 0x19) +#define RK817_CODEC_DADC_VOLL (RK817_CODEC_BASE + 0x1a) +#define RK817_CODEC_DADC_VOLR (RK817_CODEC_BASE + 0x1b) +#define RK817_CODEC_DADC_SR_ACL0 (RK817_CODEC_BASE + 0x1e) +#define RK817_CODEC_DADC_ALC1 (RK817_CODEC_BASE + 0x1f) +#define RK817_CODEC_DADC_ALC2 (RK817_CODEC_BASE + 0x20) +#define RK817_CODEC_DADC_NG (RK817_CODEC_BASE + 0x21) +#define RK817_CODEC_DADC_HPF (RK817_CODEC_BASE + 0x22) +#define RK817_CODEC_DADC_RVOLL (RK817_CODEC_BASE + 0x23) +#define RK817_CODEC_DADC_RVOLR (RK817_CODEC_BASE + 0x24) +#define RK817_CODEC_AMIC_CFG0 (RK817_CODEC_BASE + 0x27) +#define RK817_CODEC_AMIC_CFG1 (RK817_CODEC_BASE + 0x28) +#define RK817_CODEC_DMIC_PGA_GAIN (RK817_CODEC_BASE + 0x29) +#define RK817_CODEC_DMIC_LMT1 (RK817_CODEC_BASE + 0x2a) +#define RK817_CODEC_DMIC_LMT2 (RK817_CODEC_BASE + 0x2b) +#define RK817_CODEC_DMIC_NG1 (RK817_CODEC_BASE + 0x2c) +#define RK817_CODEC_DMIC_NG2 (RK817_CODEC_BASE + 0x2d) +#define RK817_CODEC_ADAC_CFG0 (RK817_CODEC_BASE + 0x2e) +#define RK817_CODEC_ADAC_CFG1 (RK817_CODEC_BASE + 0x2f) +#define RK817_CODEC_DDAC_POPD_DACST (RK817_CODEC_BASE + 0x30) +#define RK817_CODEC_DDAC_VOLL (RK817_CODEC_BASE + 0x31) +#define RK817_CODEC_DDAC_VOLR (RK817_CODEC_BASE + 0x32) +#define RK817_CODEC_DDAC_SR_LMT0 (RK817_CODEC_BASE + 0x35) +#define RK817_CODEC_DDAC_LMT1 (RK817_CODEC_BASE + 0x36) +#define RK817_CODEC_DDAC_LMT2 (RK817_CODEC_BASE + 0x37) +#define RK817_CODEC_DDAC_MUTE_MIXCTL (RK817_CODEC_BASE + 0x38) +#define RK817_CODEC_DDAC_RVOLL (RK817_CODEC_BASE + 0x39) +#define RK817_CODEC_DDAC_RVOLR (RK817_CODEC_BASE + 0x3a) +#define RK817_CODEC_AHP_ANTI0 (RK817_CODEC_BASE + 0x3b) +#define RK817_CODEC_AHP_ANTI1 (RK817_CODEC_BASE + 0x3c) +#define RK817_CODEC_AHP_CFG0 (RK817_CODEC_BASE + 0x3d) +#define RK817_CODEC_AHP_CFG1 (RK817_CODEC_BASE + 0x3e) +#define RK817_CODEC_AHP_CP (RK817_CODEC_BASE + 0x3f) +#define RK817_CODEC_ACLASSD_CFG1 (RK817_CODEC_BASE + 0x40) +#define RK817_CODEC_ACLASSD_CFG2 (RK817_CODEC_BASE + 0x41) +#define RK817_CODEC_APLL_CFG0 (RK817_CODEC_BASE + 0x42) +#define RK817_CODEC_APLL_CFG1 (RK817_CODEC_BASE + 0x43) +#define RK817_CODEC_APLL_CFG2 (RK817_CODEC_BASE + 0x44) +#define RK817_CODEC_APLL_CFG3 (RK817_CODEC_BASE + 0x45) +#define RK817_CODEC_APLL_CFG4 (RK817_CODEC_BASE + 0x46) +#define RK817_CODEC_APLL_CFG5 (RK817_CODEC_BASE + 0x47) +#define RK817_CODEC_DI2S_CKM (RK817_CODEC_BASE + 0x48) +#define RK817_CODEC_DI2S_RSD (RK817_CODEC_BASE + 0x49) +#define RK817_CODEC_DI2S_RXCR1 (RK817_CODEC_BASE + 0x4a) +#define RK817_CODEC_DI2S_RXCR2 (RK817_CODEC_BASE + 0x4b) +#define RK817_CODEC_DI2S_RXCMD_TSD (RK817_CODEC_BASE + 0x4c) +#define RK817_CODEC_DI2S_TXCR1 (RK817_CODEC_BASE + 0x4d) +#define RK817_CODEC_DI2S_TXCR2 (RK817_CODEC_BASE + 0x4e) +#define RK817_CODEC_DI2S_TXCR3_TXCMD (RK817_CODEC_BASE + 0x4f) + +/* RK817_CODEC_DTOP_DIGEN_CLKE */ +#define ADC_DIG_CLK_MASK (0xf << 4) +#define ADC_DIG_CLK_SFT 4 +#define ADC_DIG_CLK_DIS (0x0 << 4) +#define ADC_DIG_CLK_EN (0xf << 4) + +#define DAC_DIG_CLK_MASK (0xf << 0) +#define DAC_DIG_CLK_SFT 0 +#define DAC_DIG_CLK_DIS (0x0 << 0) +#define DAC_DIG_CLK_EN (0xf << 0) + +/* RK817_CODEC_APLL_CFG5 */ +#define PLL_PW_DOWN (0x01 << 0) +#define PLL_PW_UP (0x00 << 0) + +/* RK817_CODEC_DI2S_CKM */ +#define PDM_EN_MASK (0x1 << 3) +#define PDM_EN_SFT 3 +#define PDM_EN_DISABLE (0x0 << 3) +#define PDM_EN_ENABLE (0x1 << 3) + +#define SCK_EN_ENABLE (0x1 << 2) +#define SCK_EN_DISABLE (0x0 << 2) + +#define RK817_I2S_MODE_MASK (0x1 << 0) +#define RK817_I2S_MODE_SFT 0 +#define RK817_I2S_MODE_MST (0x1 << 0) +#define RK817_I2S_MODE_SLV (0x0 << 0) + +/* RK817_CODEC_DDAC_MUTE_MIXCTL */ +#define DACMT_ENABLE (0x1 << 0) +#define DACMT_DISABLE (0x0 << 0) + +/* RK817_CODEC_DI2S_RXCR2 */ +#define VDW_RX_24BITS (0x17) +#define VDW_RX_16BITS (0x0f) +/* RK817_CODEC_DI2S_TXCR2 */ +#define VDW_TX_24BITS (0x17) +#define VDW_TX_16BITS (0x0f) + +/* RK817_CODEC_AHP_CFG1 */ +#define HP_ANTIPOP_ENABLE (0x1 << 4) +#define HP_ANTIPOP_DISABLE (0x0 << 4) + +/* RK817_CODEC_ADAC_CFG1 */ +#define PWD_DACBIAS_MASK (0x1 << 3) +#define PWD_DACBIAS_SFT 3 +#define PWD_DACBIAS_DOWN (0x1 << 3) +#define PWD_DACBIAS_ON (0x0 << 3) + +#define PWD_DACD_MASK (0x1 << 2) +#define PWD_DACD_SFT 2 +#define PWD_DACD_DOWN (0x1 << 2) +#define PWD_DACD_ON (0x0 << 2) + +#define PWD_DACL_MASK (0x1 << 1) +#define PWD_DACL_SFT 1 +#define PWD_DACL_DOWN (0x1 << 1) +#define PWD_DACL_ON (0x0 << 1) + +#define PWD_DACR_MASK (0x1 << 0) +#define PWD_DACR_SFT 0 +#define PWD_DACR_DOWN (0x1 << 0) +#define PWD_DACR_ON (0x0 << 0) + +/* RK817_CODEC_AADC_CFG0 */ +#define ADC_L_PWD_MASK (0x1 << 7) +#define ADC_L_PWD_SFT 7 +#define ADC_L_PWD_DIS (0x0 << 7) +#define ADC_L_PWD_EN (0x1 << 7) + +#define ADC_R_PWD_MASK (0x1 << 6) +#define ADC_R_PWD_SFT 6 +#define ADC_R_PWD_DIS (0x0 << 6) +#define ADC_R_PWD_EN (0x1 << 6) + +/* RK817_CODEC_AMIC_CFG0 */ +#define MIC_DIFF_MASK (0x1 << 7) +#define MIC_DIFF_SFT 7 +#define MIC_DIFF_DIS (0x0 << 7) +#define MIC_DIFF_EN (0x1 << 7) + +#define PWD_PGA_L_MASK (0x1 << 5) +#define PWD_PGA_L_SFT 5 +#define PWD_PGA_L_DIS (0x0 << 5) +#define PWD_PGA_L_EN (0x1 << 5) + +#define PWD_PGA_R_MASK (0x1 << 4) +#define PWD_PGA_R_SFT 4 +#define PWD_PGA_R_DIS (0x0 << 4) +#define PWD_PGA_R_EN (0x1 << 4) + +enum { + RK817_HIFI, +}; + +enum { + OFF, + SPK_PATH, + HP_PATH, + SPK_HP, +}; + +enum { + MIC_OFF, + MIC, +}; + +struct rk817_reg_val_typ { + unsigned int reg; + unsigned int value; +}; + +struct rk817_init_bit_typ { + unsigned int reg; + unsigned int power_bit; + unsigned int init_bit; +}; + +#endif /* __RK817_CODEC_H__ */ -- 2.25.1

2 1

[PATCH v2 0/3] ASoC: sdm845: array out of bound issues
by Srinivas Kandagatla 09 Mar '21

09 Mar '21

During testing John Stultz and Amit reported few array our bound issues after enabling bound sanitizer This patch series attempts to fix those! changes since v1: - make sure the wcd is not de-referenced without intialization Srinivas Kandagatla (3): ASoC: qcom: sdm845: Fix array out of bounds access ASoC: qcom: sdm845: Fix array out of range on rx slim channels ASoC: codecs: wcd934x: add a sanity check in set channel map sound/soc/codecs/wcd934x.c | 6 ++++++ sound/soc/qcom/sdm845.c | 6 +++--- 2 files changed, 9 insertions(+), 3 deletions(-) -- 2.21.0

3 5

[PATCH -next] ASoC: rt715-sdca: Fix return value check in rt715_sdca_sdw_probe()
by 'Wei Yongjun 09 Mar '21

09 Mar '21

From: Wei Yongjun <weiyongjun1(a)huawei.com> In case of error, the function devm_regmap_init_sdw_mbq() and devm_regmap_init_sdw() returns ERR_PTR() not NULL. The NULL test in the return value check should be replaced with IS_ERR(). Fixes: 393c52d2d109 ("ASoC: rt715-sdca: Add RT715 sdca vendor-specific driver") Reported-by: Hulk Robot <hulkci(a)huawei.com> Signed-off-by: Wei Yongjun <weiyongjun1(a)huawei.com> --- sound/soc/codecs/rt715-sdca-sdw.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/sound/soc/codecs/rt715-sdca-sdw.c b/sound/soc/codecs/rt715-sdca-sdw.c index bcced85876b0..1350798406f0 100644 --- a/sound/soc/codecs/rt715-sdca-sdw.c +++ b/sound/soc/codecs/rt715-sdca-sdw.c @@ -184,12 +184,12 @@ static int rt715_sdca_sdw_probe(struct sdw_slave *slave, /* Regmap Initialization */ mbq_regmap = devm_regmap_init_sdw_mbq(slave, &rt715_sdca_mbq_regmap); - if (!mbq_regmap) - return -EINVAL; + if (IS_ERR(mbq_regmap)) + return PTR_ERR(mbq_regmap); regmap = devm_regmap_init_sdw(slave, &rt715_sdca_regmap); - if (!regmap) - return -EINVAL; + if (IS_ERR(regmap)) + return PTR_ERR(regmap); return rt715_sdca_init(&slave->dev, mbq_regmap, regmap, slave); }

2 1

[PATCH -next] ASoC: rt715-sdca: Remove unused including <linux/version.h>
by 'Wei Yongjun 09 Mar '21

09 Mar '21

From: Wei Yongjun <weiyongjun1(a)huawei.com> Remove including <linux/version.h> that don't need it. Reported-by: Hulk Robot <hulkci(a)huawei.com> Signed-off-by: Wei Yongjun <weiyongjun1(a)huawei.com> --- sound/soc/codecs/rt715-sdca.c | 1 - 1 file changed, 1 deletion(-) diff --git a/sound/soc/codecs/rt715-sdca.c b/sound/soc/codecs/rt715-sdca.c index 92ad6fa408ec..20528afbdc57 100644 --- a/sound/soc/codecs/rt715-sdca.c +++ b/sound/soc/codecs/rt715-sdca.c @@ -9,7 +9,6 @@ #include <linux/module.h> #include <linux/moduleparam.h> -#include <linux/version.h> #include <linux/kernel.h> #include <linux/init.h> #include <linux/pm_runtime.h>

2 1

[PATCH] ASoC: rt5682: add delay time of workqueue to control next IRQ event
by shumingf＠realtek.com 09 Mar '21

09 Mar '21

From: Shuming Fan <shumingf(a)realtek.com> This patch keeps the delay time (50 ms) for jack detection and zero delay time for the button press. This patch improves the reaction of the button press. Signed-off-by: Shuming Fan <shumingf(a)realtek.com> --- sound/soc/codecs/rt5682-i2c.c | 2 +- sound/soc/codecs/rt5682-sdw.c | 2 +- sound/soc/codecs/rt5682.c | 2 ++ sound/soc/codecs/rt5682.h | 1 + 4 files changed, 5 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/rt5682-i2c.c b/sound/soc/codecs/rt5682-i2c.c index 93c1603b42f1..8ea9f1d9fec0 100644 --- a/sound/soc/codecs/rt5682-i2c.c +++ b/sound/soc/codecs/rt5682-i2c.c @@ -78,7 +78,7 @@ static irqreturn_t rt5682_irq(int irq, void *data) struct rt5682_priv *rt5682 = data; mod_delayed_work(system_power_efficient_wq, - &rt5682->jack_detect_work, msecs_to_jiffies(250)); + &rt5682->jack_detect_work, msecs_to_jiffies(rt5682->irq_work_delay_time)); return IRQ_HANDLED; } diff --git a/sound/soc/codecs/rt5682-sdw.c b/sound/soc/codecs/rt5682-sdw.c index 5e097f776561..fed80c8f994f 100644 --- a/sound/soc/codecs/rt5682-sdw.c +++ b/sound/soc/codecs/rt5682-sdw.c @@ -677,7 +677,7 @@ static int rt5682_interrupt_callback(struct sdw_slave *slave, if (status->control_port & 0x4) { mod_delayed_work(system_power_efficient_wq, - &rt5682->jack_detect_work, msecs_to_jiffies(250)); + &rt5682->jack_detect_work, msecs_to_jiffies(rt5682->irq_work_delay_time)); } return 0; diff --git a/sound/soc/codecs/rt5682.c b/sound/soc/codecs/rt5682.c index 559dc6db1f7c..0e2a10ed11da 100644 --- a/sound/soc/codecs/rt5682.c +++ b/sound/soc/codecs/rt5682.c @@ -1094,6 +1094,7 @@ void rt5682_jack_detect_handler(struct work_struct *work) /* jack was out, report jack type */ rt5682->jack_type = rt5682_headset_detect(rt5682->component, 1); + rt5682->irq_work_delay_time = 0; } else if ((rt5682->jack_type & SND_JACK_HEADSET) == SND_JACK_HEADSET) { /* jack is already in, report button event */ @@ -1139,6 +1140,7 @@ void rt5682_jack_detect_handler(struct work_struct *work) } else { /* jack out */ rt5682->jack_type = rt5682_headset_detect(rt5682->component, 0); + rt5682->irq_work_delay_time = 50; } snd_soc_jack_report(rt5682->hs_jack, rt5682->jack_type, diff --git a/sound/soc/codecs/rt5682.h b/sound/soc/codecs/rt5682.h index 1f9c51a5b9bf..74ff66767016 100644 --- a/sound/soc/codecs/rt5682.h +++ b/sound/soc/codecs/rt5682.h @@ -1439,6 +1439,7 @@ struct rt5682_priv { int pll_out[RT5682_PLLS]; int jack_type; + int irq_work_delay_time; }; extern const char *rt5682_supply_names[RT5682_NUM_SUPPLIES]; -- 2.29.0

3 2

[PATCH] ASoC: SOF: intel: fix wrong poll bits in dsp power down
by Pierre-Louis Bossart 09 Mar '21

09 Mar '21

From: Pan Xiuli <xiuli.pan(a)linux.intel.com> The ADSPCS_SPA is Set Power Active bit. To check if DSP is powered down, we need to check ADSPCS_CPA, the Current Power Active bit. Fixes: 747503b1813a3 ("ASoC: SOF: Intel: Add Intel specific HDA DSP HW operations") Reviewed-by: Rander Wang <rander.wang(a)intel.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan(a)linux.intel.com> Signed-off-by: Pan Xiuli <xiuli.pan(a)linux.intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> --- sound/soc/sof/intel/hda-dsp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/sof/intel/hda-dsp.c b/sound/soc/sof/intel/hda-dsp.c index 9900a058ba6e..6e24e1cb13f9 100644 --- a/sound/soc/sof/intel/hda-dsp.c +++ b/sound/soc/sof/intel/hda-dsp.c @@ -207,7 +207,7 @@ int hda_dsp_core_power_down(struct snd_sof_dev *sdev, unsigned int core_mask) ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPCS, adspcs, - !(adspcs & HDA_DSP_ADSPCS_SPA_MASK(core_mask)), + !(adspcs & HDA_DSP_ADSPCS_CPA_MASK(core_mask)), HDA_DSP_REG_POLL_INTERVAL_US, HDA_DSP_PD_TIMEOUT * USEC_PER_MSEC); if (ret < 0) -- 2.25.1

2 1

[PATCH v3 00/15] Report jack and button detection + Capture Support
by Lucas Tanure 09 Mar '21

09 Mar '21

Hi All, Here is a patch series for reporting to user space jack and button events and add the support for Capture. With some cleanups and fixes along the way. Regards, Lucas Tanure Lucas Tanure (12): ASoC: cs42l42: Fix Bitclock polarity inversion ASoC: cs42l42: Fix channel width support ASoC: cs42l42: Fix mixer volume control ASoC: cs42l42: Don't enable/disable regulator at Bias Level ASoC: cs42l42: Always wait at least 3ms after reset ASoC: cs42l42: Remove power if the driver is being removed ASoC: cs42l42: Disable regulators if probe fails ASoC: cs42l42: Provide finer control on playback path ASoC: cs42l42: Set clock source for both ways of stream ASoC: cs42l42: Add Capture Support ASoC: cs42l42: Report jack and button detection ASoC: cs42l42: Use bclk from hw_params if set_sysclk was not called Richard Fitzgerald (3): ASoC: cs42l42: Wait at least 150us after writing SCLK_PRESENT ASoC: cs42l42: Only start PLL if it is needed ASoC: cs42l42: Wait for PLL to lock before switching to it sound/soc/codecs/cs42l42.c | 435 +++++++++++++++++++++---------------- sound/soc/codecs/cs42l42.h | 41 +++- 2 files changed, 282 insertions(+), 194 deletions(-) -- 2.30.1

2 16

[PATCH v2 0/7] Add I2S-MCC support for Microchip's SAMA7G5
by Codrin Ciubotariu 09 Mar '21

09 Mar '21

SAMA7G5 includes an updated version of I2S-MCC, found previously on SAM9X60. This controller includes 8 data pins, 4 for playback and 4 for capture. For I2S and LEFT_J formats, these pins can be used to send/receive up to 8 audio channels. For DSP_A, with TDM, any pins pair (DIN/DOUT) from these 4 can be selected to send/receive data. This version also includes 2 FIFOs (send and receive). This patch set starts by moving the driver's bindings to yaml and continues with adding a new compatible for the SAMA7G5 variant, followed by the changes needed for I2S/LEFT_J support, TDM pin pair selection and FIFO support, exclusively for SAMA7G5. Changes in v2: - moved DT binding conversion patch from the beginning to the end of the patch serieses - patches that update the DT binding are modified to change .txt file instead of .yaml Codrin Ciubotariu (7): dt-bindings: mchp,i2s-mcc: Add SAMA7G5 to binding ASoC: mchp-i2s-mcc: Add compatible for SAMA7G5 ASoC: mchp-i2s-mcc: Add multi-channel support for I2S and LEFT_J formats dt-bindings: mchp,i2s-mcc: Add property to specify pin pair for TDM ASoC: mchp-i2s-mcc: Add support to select TDM pins ASoC: mchp-i2s-mcc: Add FIFOs support ASoC: convert Microchip I2SMCC binding to yaml .../bindings/sound/mchp,i2s-mcc.yaml | 108 ++++++++++++ .../bindings/sound/mchp-i2s-mcc.txt | 43 ----- sound/soc/atmel/Kconfig | 3 + sound/soc/atmel/mchp-i2s-mcc.c | 161 +++++++++++++++--- 4 files changed, 252 insertions(+), 63 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/mchp,i2s-mcc.yaml delete mode 100644 Documentation/devicetree/bindings/sound/mchp-i2s-mcc.txt -- 2.27.0

3 10

[PATCH] ASoC: amd: add support for rt5682 codec in machine driver
by Vijendar Mukunda 09 Mar '21

09 Mar '21

Add support for RT5682 codec in machine driver. Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda(a)amd.com> --- sound/soc/amd/Kconfig | 5 +- sound/soc/amd/acp-da7219-max98357a.c | 353 +++++++++++++++++++++++++++++++++-- 2 files changed, 339 insertions(+), 19 deletions(-) diff --git a/sound/soc/amd/Kconfig b/sound/soc/amd/Kconfig index a6ce000..13f5b1b2 100644 --- a/sound/soc/amd/Kconfig +++ b/sound/soc/amd/Kconfig @@ -5,14 +5,15 @@ config SND_SOC_AMD_ACP This option enables ACP DMA support on AMD platform. config SND_SOC_AMD_CZ_DA7219MX98357_MACH - tristate "AMD CZ support for DA7219 and MAX9835" + tristate "AMD CZ support for DA7219, RT5682 and MAX9835" select SND_SOC_DA7219 + select SND_SOC_RT5682 select SND_SOC_MAX98357A select SND_SOC_ADAU7002 select REGULATOR depends on SND_SOC_AMD_ACP && I2C && GPIOLIB help - This option enables machine driver for DA7219 and MAX9835. + This option enables machine driver for DA7219, RT5682 and MAX9835. config SND_SOC_AMD_CZ_RT5645_MACH tristate "AMD CZ support for RT5645" diff --git a/sound/soc/amd/acp-da7219-max98357a.c b/sound/soc/amd/acp-da7219-max98357a.c index 849288d..ff2b639 100644 --- a/sound/soc/amd/acp-da7219-max98357a.c +++ b/sound/soc/amd/acp-da7219-max98357a.c @@ -1,7 +1,7 @@ /* * Machine driver for AMD ACP Audio engine using DA7219 & MAX98357 codec * - * Copyright 2017 Advanced Micro Devices, Inc. + * Copyright 2017-2021 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -41,14 +41,19 @@ #include "acp.h" #include "../codecs/da7219.h" #include "../codecs/da7219-aad.h" +#include "../codecs/rt5682.h" #define CZ_PLAT_CLK 48000000 #define DUAL_CHANNEL 2 +#define RT5682_PLL_FREQ (48000 * 512) static struct snd_soc_jack cz_jack; static struct clk *da7219_dai_wclk; static struct clk *da7219_dai_bclk; -extern bool bt_uart_enable; +static struct clk *rt5682_dai_wclk; +static struct clk *rt5682_dai_bclk; +extern int bt_uart_enable; +void *soc_is_rltk_max(struct device *dev); static int cz_da7219_init(struct snd_soc_pcm_runtime *rtd) { @@ -128,6 +133,88 @@ static void da7219_clk_disable(void) clk_disable_unprepare(da7219_dai_bclk); } +static int cz_rt5682_init(struct snd_soc_pcm_runtime *rtd) +{ + int ret; + struct snd_soc_card *card = rtd->card; + struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(rtd, 0); + struct snd_soc_component *component = codec_dai->component; + + dev_info(codec_dai->dev, "codec dai name = %s\n", codec_dai->name); + + /* Set codec sysclk */ + ret = snd_soc_dai_set_sysclk(codec_dai, RT5682_SCLK_S_PLL2, + RT5682_PLL_FREQ, SND_SOC_CLOCK_IN); + if (ret < 0) { + dev_err(codec_dai->dev, + "Failed to set rt5682 SYSCLK: %d\n", ret); + return ret; + } + /* set codec PLL */ + ret = snd_soc_dai_set_pll(codec_dai, RT5682_PLL2, RT5682_PLL2_S_MCLK, + CZ_PLAT_CLK, RT5682_PLL_FREQ); + if (ret < 0) { + dev_err(codec_dai->dev, "can't set rt5682 PLL: %d\n", ret); + return ret; + } + + rt5682_dai_wclk = devm_clk_get(component->dev, "rt5682-dai-wclk"); + if (IS_ERR(rt5682_dai_wclk)) + return PTR_ERR(rt5682_dai_wclk); + + rt5682_dai_bclk = devm_clk_get(component->dev, "rt5682-dai-bclk"); + if (IS_ERR(rt5682_dai_bclk)) + return PTR_ERR(rt5682_dai_bclk); + + ret = snd_soc_card_jack_new(card, "Headset Jack", + SND_JACK_HEADSET | SND_JACK_LINEOUT | + SND_JACK_BTN_0 | SND_JACK_BTN_1 | + SND_JACK_BTN_2 | SND_JACK_BTN_3, + &cz_jack, NULL, 0); + if (ret) { + dev_err(card->dev, "HP jack creation failed %d\n", ret); + return ret; + } + + snd_jack_set_key(cz_jack.jack, SND_JACK_BTN_0, KEY_PLAYPAUSE); + snd_jack_set_key(cz_jack.jack, SND_JACK_BTN_1, KEY_VOLUMEUP); + snd_jack_set_key(cz_jack.jack, SND_JACK_BTN_2, KEY_VOLUMEDOWN); + snd_jack_set_key(cz_jack.jack, SND_JACK_BTN_3, KEY_VOICECOMMAND); + + ret = snd_soc_component_set_jack(component, &cz_jack, NULL); + if (ret) { + dev_err(rtd->dev, "Headset Jack call-back failed: %d\n", ret); + return ret; + } + return 0; +} + +static int rt5682_clk_enable(struct snd_pcm_substream *substream) +{ + int ret = 0; + struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); + + /* + * Set wclk to 48000 because the rate constraint of this driver is + * 48000. ADAU7002 spec: "The ADAU7002 requires a BCLK rate that is + * minimum of 64x the LRCLK sample rate." DA7219 is the only clk + * source so for all codecs we have to limit bclk to 64X lrclk. + */ + clk_set_rate(rt5682_dai_wclk, 48000); + clk_set_rate(rt5682_dai_bclk, 48000 * 64); + ret = clk_prepare_enable(rt5682_dai_bclk); + if (ret < 0) { + dev_err(rtd->dev, "can't enable master clock %d\n", ret); + return ret; + } + return ret; +} + +static void rt5682_clk_disable(void) +{ + clk_disable_unprepare(rt5682_dai_bclk); +} + static const unsigned int channels[] = { DUAL_CHANNEL, }; @@ -260,6 +347,118 @@ static void cz_da7219_shutdown(struct snd_pcm_substream *substream) da7219_clk_disable(); } +static int cz_rt5682_play_startup(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); + struct snd_soc_card *card = rtd->card; + struct acp_platform_info *machine = snd_soc_card_get_drvdata(card); + + /* + * On this platform for PCM device we support stereo + */ + + runtime->hw.channels_max = DUAL_CHANNEL; + snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, + &constraints_channels); + snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, + &constraints_rates); + + machine->play_i2s_instance = I2S_SP_INSTANCE; + return rt5682_clk_enable(substream); +} + +static int cz_rt5682_cap_startup(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); + struct snd_soc_card *card = rtd->card; + struct acp_platform_info *machine = snd_soc_card_get_drvdata(card); + + /* + * On this platform for PCM device we support stereo + */ + + runtime->hw.channels_max = DUAL_CHANNEL; + snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, + &constraints_channels); + snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, + &constraints_rates); + + machine->cap_i2s_instance = I2S_SP_INSTANCE; + machine->capture_channel = CAP_CHANNEL1; + return rt5682_clk_enable(substream); +} + +static int cz_rt5682_max_startup(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); + struct snd_soc_card *card = rtd->card; + struct acp_platform_info *machine = snd_soc_card_get_drvdata(card); + + /* + * On this platform for PCM device we support stereo + */ + + runtime->hw.channels_max = DUAL_CHANNEL; + snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, + &constraints_channels); + snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, + &constraints_rates); + + machine->play_i2s_instance = I2S_BT_INSTANCE; + return rt5682_clk_enable(substream); +} + +static int cz_rt5682_dmic0_startup(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); + struct snd_soc_card *card = rtd->card; + struct acp_platform_info *machine = snd_soc_card_get_drvdata(card); + + /* + * On this platform for PCM device we support stereo + */ + + runtime->hw.channels_max = DUAL_CHANNEL; + snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, + &constraints_channels); + snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, + &constraints_rates); + + machine->cap_i2s_instance = I2S_BT_INSTANCE; + return rt5682_clk_enable(substream); +} + +static int cz_rt5682_dmic1_startup(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); + struct snd_soc_card *card = rtd->card; + struct acp_platform_info *machine = snd_soc_card_get_drvdata(card); + + /* + * On this platform for PCM device we support stereo + */ + + runtime->hw.channels_max = DUAL_CHANNEL; + snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, + &constraints_channels); + snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, + &constraints_rates); + + machine->cap_i2s_instance = I2S_SP_INSTANCE; + machine->capture_channel = CAP_CHANNEL0; + return rt5682_clk_enable(substream); +} + +static void cz_rt5682_shutdown(struct snd_pcm_substream *substream) +{ + rt5682_clk_disable(); +} + static const struct snd_soc_ops cz_da7219_play_ops = { .startup = cz_da7219_play_startup, .shutdown = cz_da7219_shutdown, @@ -285,6 +484,31 @@ static const struct snd_soc_ops cz_dmic1_cap_ops = { .shutdown = cz_da7219_shutdown, }; +static const struct snd_soc_ops cz_rt5682_play_ops = { + .startup = cz_rt5682_play_startup, + .shutdown = cz_rt5682_shutdown, +}; + +static const struct snd_soc_ops cz_rt5682_cap_ops = { + .startup = cz_rt5682_cap_startup, + .shutdown = cz_rt5682_shutdown, +}; + +static const struct snd_soc_ops cz_rt5682_max_play_ops = { + .startup = cz_rt5682_max_startup, + .shutdown = cz_rt5682_shutdown, +}; + +static const struct snd_soc_ops cz_rt5682_dmic0_cap_ops = { + .startup = cz_rt5682_dmic0_startup, + .shutdown = cz_rt5682_shutdown, +}; + +static const struct snd_soc_ops cz_rt5682_dmic1_cap_ops = { + .startup = cz_rt5682_dmic1_startup, + .shutdown = cz_rt5682_shutdown, +}; + SND_SOC_DAILINK_DEF(designware1, DAILINK_COMP_ARRAY(COMP_CPU("designware-i2s.1.auto"))); SND_SOC_DAILINK_DEF(designware2, @@ -294,6 +518,8 @@ SND_SOC_DAILINK_DEF(designware3, SND_SOC_DAILINK_DEF(dlgs, DAILINK_COMP_ARRAY(COMP_CODEC("i2c-DLGS7219:00", "da7219-hifi"))); +SND_SOC_DAILINK_DEF(rt5682, + DAILINK_COMP_ARRAY(COMP_CODEC("i2c-10EC5682:00", "rt5682-aif1"))); SND_SOC_DAILINK_DEF(mx, DAILINK_COMP_ARRAY(COMP_CODEC("MX98357A:00", "HiFi"))); SND_SOC_DAILINK_DEF(adau, @@ -353,6 +579,57 @@ static struct snd_soc_dai_link cz_dai_7219_98357[] = { }, }; +static struct snd_soc_dai_link cz_dai_5682_98357[] = { + { + .name = "amd-rt5682-play", + .stream_name = "Playback", + .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF + | SND_SOC_DAIFMT_CBM_CFM, + .init = cz_rt5682_init, + .dpcm_playback = 1, + .ops = &cz_rt5682_play_ops, + SND_SOC_DAILINK_REG(designware1, rt5682, platform), + }, + { + .name = "amd-rt5682-cap", + .stream_name = "Capture", + .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF + | SND_SOC_DAIFMT_CBM_CFM, + .dpcm_capture = 1, + .ops = &cz_rt5682_cap_ops, + SND_SOC_DAILINK_REG(designware2, rt5682, platform), + }, + { + .name = "amd-max98357-play", + .stream_name = "HiFi Playback", + .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF + | SND_SOC_DAIFMT_CBM_CFM, + .dpcm_playback = 1, + .ops = &cz_rt5682_max_play_ops, + SND_SOC_DAILINK_REG(designware3, mx, platform), + }, + { + /* C panel DMIC */ + .name = "dmic0", + .stream_name = "DMIC0 Capture", + .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF + | SND_SOC_DAIFMT_CBM_CFM, + .dpcm_capture = 1, + .ops = &cz_rt5682_dmic0_cap_ops, + SND_SOC_DAILINK_REG(designware3, adau, platform), + }, + { + /* A/B panel DMIC */ + .name = "dmic1", + .stream_name = "DMIC1 Capture", + .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF + | SND_SOC_DAIFMT_CBM_CFM, + .dpcm_capture = 1, + .ops = &cz_rt5682_dmic1_cap_ops, + SND_SOC_DAILINK_REG(designware2, adau, platform), + }, +}; + static const struct snd_soc_dapm_widget cz_widgets[] = { SND_SOC_DAPM_HP("Headphones", NULL), SND_SOC_DAPM_SPK("Speakers", NULL), @@ -368,6 +645,14 @@ static const struct snd_soc_dapm_route cz_audio_route[] = { {"PDM_DAT", NULL, "Int Mic"}, }; +static const struct snd_soc_dapm_route cz_rt5682_audio_route[] = { + {"Headphones", NULL, "HPOL"}, + {"Headphones", NULL, "HPOR"}, + {"IN1P", NULL, "Headset Mic"}, + {"Speakers", NULL, "Speaker"}, + {"PDM_DAT", NULL, "Int Mic"}, +}; + static const struct snd_kcontrol_new cz_mc_controls[] = { SOC_DAPM_PIN_SWITCH("Headphones"), SOC_DAPM_PIN_SWITCH("Speakers"), @@ -388,6 +673,28 @@ static struct snd_soc_card cz_card = { .num_controls = ARRAY_SIZE(cz_mc_controls), }; +static struct snd_soc_card cz_rt5682_card = { + .name = "acpr5682m98357", + .owner = THIS_MODULE, + .dai_link = cz_dai_5682_98357, + .num_links = ARRAY_SIZE(cz_dai_5682_98357), + .dapm_widgets = cz_widgets, + .num_dapm_widgets = ARRAY_SIZE(cz_widgets), + .dapm_routes = cz_rt5682_audio_route, + .controls = cz_mc_controls, + .num_controls = ARRAY_SIZE(cz_mc_controls), +}; + +void *soc_is_rltk_max(struct device *dev) +{ + const struct acpi_device_id *match; + + match = acpi_match_device(dev->driver->acpi_match_table, dev); + if (!match) + return NULL; + return (void *)match->driver_data; +} + static struct regulator_consumer_supply acp_da7219_supplies[] = { REGULATOR_SUPPLY("VDD", "i2c-DLGS7219:00"), REGULATOR_SUPPLY("VDDMIC", "i2c-DLGS7219:00"), @@ -425,29 +732,39 @@ static int cz_probe(struct platform_device *pdev) struct snd_soc_card *card; struct acp_platform_info *machine; struct regulator_dev *rdev; - - acp_da7219_cfg.dev = &pdev->dev; - rdev = devm_regulator_register(&pdev->dev, &acp_da7219_desc, - &acp_da7219_cfg); - if (IS_ERR(rdev)) { - dev_err(&pdev->dev, "Failed to register regulator: %d\n", - (int)PTR_ERR(rdev)); - return -EINVAL; + struct device *dev = &pdev->dev; + + card = (struct snd_soc_card *)soc_is_rltk_max(dev); + if (!card) + return -ENODEV; + if (!strcmp(card->name, "acpd7219m98357")) { + acp_da7219_cfg.dev = &pdev->dev; + rdev = devm_regulator_register(&pdev->dev, &acp_da7219_desc, + &acp_da7219_cfg); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "Failed to register regulator: %d\n", + (int)PTR_ERR(rdev)); + return -EINVAL; + } } machine = devm_kzalloc(&pdev->dev, sizeof(struct acp_platform_info), GFP_KERNEL); if (!machine) return -ENOMEM; - card = &cz_card; - cz_card.dev = &pdev->dev; + card->dev = &pdev->dev; platform_set_drvdata(pdev, card); snd_soc_card_set_drvdata(card, machine); - ret = devm_snd_soc_register_card(&pdev->dev, &cz_card); + ret = devm_snd_soc_register_card(&pdev->dev, card); if (ret) { - dev_err(&pdev->dev, + if (ret != -EPROBE_DEFER) + dev_err(&pdev->dev, "devm_snd_soc_register_card(%s) failed: %d\n", - cz_card.name, ret); + card->name, ret); + else + dev_dbg(&pdev->dev, + "devm_snd_soc_register_card(%s) probe deferred: %d\n", + card->name, ret); return ret; } bt_uart_enable = !device_property_read_bool(&pdev->dev, @@ -457,7 +774,8 @@ static int cz_probe(struct platform_device *pdev) #ifdef CONFIG_ACPI static const struct acpi_device_id cz_audio_acpi_match[] = { - { "AMD7219", 0 }, + { "AMD7219", (unsigned long)&cz_card }, + { "AMDI5682", (unsigned long)&cz_rt5682_card}, {}, }; MODULE_DEVICE_TABLE(acpi, cz_audio_acpi_match); @@ -475,5 +793,6 @@ static struct platform_driver cz_pcm_driver = { module_platform_driver(cz_pcm_driver); MODULE_AUTHOR("akshu.agrawal(a)amd.com"); -MODULE_DESCRIPTION("DA7219 & MAX98357A audio support"); +MODULE_AUTHOR("Vijendar.Mukunda(a)amd.com"); +MODULE_DESCRIPTION("DA7219, RT5682 & MAX98357A audio support"); MODULE_LICENSE("GPL v2"); -- 2.7.4

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