October 2021 - Alsa-devel - mailman.alsa-project.org

MIDI 2.0 support in ALSA
by GitHub issues - opened 04 Oct '21

04 Oct '21

alsa-project/alsa-lib issue #180 was opened from robertwu1: Hi, now that USB MIDI 2.0 is officially out (https://www.midi.org/specifications/midi-2-0-specifications), are there any updates for support in USB MIDI 2.0 in ALSA? https://github.com/alsa-project/alsa-lib/issues/24 was closed in February of 2020 but it's been over a year and a half. There seems to be quite a bit of interest in the issue since it had been closed. Thanks! Issue URL : https://github.com/alsa-project/alsa-lib/issues/180 Repository URL: https://github.com/alsa-project/alsa-lib

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[BUG?] Setting (start_threshold > stop_threshold) makes snd_pcm_writei(a_small_buffer) XRUN immediately
by Zhang Boyang 04 Oct '21

04 Oct '21

Hello, I'm using ALSA to develop an audio-streaming application. I try to use start_threshold and stop_threshold in combination with small buffers. However, I think I probably found a bug about this. I'm setting start_threshold=100 and stop_threshold=50. I'm also using a buffer of 44 frames. When I call snd_pcm_writei(the_small_44_frames_buffer), pcm state came to XRUN from PREPARED directly. I think this is a bug because the stream hasn't started. It's hard to say a xrun occurred while stream not started. I'm wondering if this is a ALSA-bug or a misuse of ALSA. A simple bug test program is attached. Thank you very much! Zhang Boyang p.s. I dug into kernel code. After writting hardware buffer, __snd_pcm_lib_xfer() called snd_pcm_update_state(), which set the XRUN state.

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[PATCH 1/2] ASoC: es8316: Use IRQF_NO_AUTOEN when requesting the IRQ
by Hans de Goede 04 Oct '21

04 Oct '21

Use the new IRQF_NO_AUTOEN flag when requesting the IRQ, rather then disabling it immediately after requesting it. This fixes a possible race where the IRQ might trigger between requesting and disabling it; and this also leads to a small code cleanup. Signed-off-by: Hans de Goede <hdegoede(a)redhat.com> --- sound/soc/codecs/es8316.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/sound/soc/codecs/es8316.c b/sound/soc/codecs/es8316.c index 067757d1d70a..5fb02635c140 100644 --- a/sound/soc/codecs/es8316.c +++ b/sound/soc/codecs/es8316.c @@ -811,12 +811,9 @@ static int es8316_i2c_probe(struct i2c_client *i2c_client, mutex_init(&es8316->lock); ret = devm_request_threaded_irq(dev, es8316->irq, NULL, es8316_irq, - IRQF_TRIGGER_HIGH | IRQF_ONESHOT, + IRQF_TRIGGER_HIGH | IRQF_ONESHOT | IRQF_NO_AUTOEN, "es8316", es8316); - if (ret == 0) { - /* Gets re-enabled by es8316_set_jack() */ - disable_irq(es8316->irq); - } else { + if (ret) { dev_warn(dev, "Failed to get IRQ %d: %d\n", es8316->irq, ret); es8316->irq = -ENXIO; } -- 2.31.1

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[PATCH] ASoC: dt-bindings: uniphier: Add description of each port number
by Kunihiko Hayashi 04 Oct '21

04 Oct '21

To eliminate FIXME, add descriptions of what each port number is associated with. Cc: Rob Herring <robh(a)kernel.org> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko(a)socionext.com> --- .../bindings/sound/socionext,uniphier-aio.yaml | 22 +++++++++++++++++++++- .../bindings/sound/socionext,uniphier-evea.yaml | 6 +++++- 2 files changed, 26 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/sound/socionext,uniphier-aio.yaml b/Documentation/devicetree/bindings/sound/socionext,uniphier-aio.yaml index 55ae198..70f62ec 100644 --- a/Documentation/devicetree/bindings/sound/socionext,uniphier-aio.yaml +++ b/Documentation/devicetree/bindings/sound/socionext,uniphier-aio.yaml @@ -46,7 +46,27 @@ properties: patternProperties: "^port@[0-9]$": - description: FIXME, Need to define what each port is. + description: | + Port number of DT node is specified by the following DAI channels that + depends on SoC. + ld11-aio,ld20-aio: + 0: hdmi + 1: pcmin2 + 2: line + 3: hpcmout1 + 4: pcmout3 + 5: hiecout1 + 6: epcmout2 + 7: epcmout3 + 8: hieccompout1 + pxs2-aio: + 0: hdmi + 1: line + 2: aux + 3: hiecout1 + 4: iecout1 + 5: hieccompout1 + 6: ieccompout1 $ref: audio-graph-port.yaml# unevaluatedProperties: false diff --git a/Documentation/devicetree/bindings/sound/socionext,uniphier-evea.yaml b/Documentation/devicetree/bindings/sound/socionext,uniphier-evea.yaml index 48ddfcb..be6acfd 100644 --- a/Documentation/devicetree/bindings/sound/socionext,uniphier-evea.yaml +++ b/Documentation/devicetree/bindings/sound/socionext,uniphier-evea.yaml @@ -40,7 +40,11 @@ properties: patternProperties: "^port@[0-9]$": - description: FIXME, Need to define what each port is. + description: | + Port number of DT node is specified by the following DAI channels. + 0: line1 + 1: hp + 2: line2 $ref: audio-graph-port.yaml# unevaluatedProperties: false -- 2.7.4

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[PATCH 1/4] ASoC: nau8824: Fix NAU8824_JACK_LOGIC define
by Hans de Goede 04 Oct '21

04 Oct '21

The NAU8824_JACK_LOGIC define was wrong, for active high jack-detect to work bit 1 needs to be set, rather then bit 0. The correct bit was found in the Android kernel source dump for a Cyberbook T116 tablet; and this was also tested on that same tablet. Signed-off-by: Hans de Goede <hdegoede(a)redhat.com> --- sound/soc/codecs/nau8824.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/nau8824.h b/sound/soc/codecs/nau8824.h index 1d7bdd8e0523..6e61405f623b 100644 --- a/sound/soc/codecs/nau8824.h +++ b/sound/soc/codecs/nau8824.h @@ -197,7 +197,7 @@ /* JACK_DET_CTRL (0x0D) */ #define NAU8824_JACK_EJECT_DT_SFT 2 #define NAU8824_JACK_EJECT_DT_MASK (0x3 << NAU8824_JACK_EJECT_DT_SFT) -#define NAU8824_JACK_LOGIC 0x1 +#define NAU8824_JACK_LOGIC (0x1 << 1) /* INTERRUPT_SETTING_1 (0x0F) */ -- 2.31.1

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[PATCH 0/8] Add support for audio on SC7280 based targets
by Srinivasa Rao Mandadapu 04 Oct '21

04 Oct '21

This patch set is to add support for Audio over wcd codec, digital mics, through digital codecs and without ADSP. This patch set depends on: -- https://patchwork.kernel.org/project/alsa-devel/list/?series=549577 -- https://patchwork.kernel.org/project/alsa-devel/list/?series=548765 -- https://patchwork.kernel.org/project/alsa-devel/list/?series=543829 Srinivasa Rao Mandadapu (8): ASoC: qcom: Move lpass_pcm_data structure to lpass header ASoC: qcom: lpass: Add dma fields for codec dma lpass interface ASoC: qcom: Add register definition for codec rddma and wrdma ASoC: qcom: Add lapss CPU driver for codec dma control ASoC: qcom: Add support for codec dma driver ASoC: dt-bindings: Add SC7280 sound card bindings ASoC: qcom: lpass-sc7280: Add platform driver for lpass audio ASoc: qcom: lpass: Add suspend and resume for sc7280 platform .../devicetree/bindings/sound/qcom,lpass-cpu.yaml | 69 ++- sound/soc/qcom/lpass-cdc-dma.c | 263 +++++++++ sound/soc/qcom/lpass-cpu.c | 334 +++++++++++- sound/soc/qcom/lpass-lpaif-reg.h | 103 +++- sound/soc/qcom/lpass-platform.c | 504 +++++++++++++++-- sound/soc/qcom/lpass-sc7280.c | 602 +++++++++++++++++++++ sound/soc/qcom/lpass.h | 156 ++++++ 7 files changed, 1974 insertions(+), 57 deletions(-) create mode 100644 sound/soc/qcom/lpass-cdc-dma.c create mode 100644 sound/soc/qcom/lpass-sc7280.c -- Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc., is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.

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[PATCH 1/2] dt-bindings: sound: tlv320adc3xxx: New codec driver
by Ricard Wanderlof 04 Oct '21

04 Oct '21

DT bindings for tlv320adc3xxx driver, currently supporting Texas Instruments TLV320ADC3001 and TLV320ADC3101 audio ADCs. Signed-off-by: Ricard Wanderlof <ricardw(a)axis.com> --- .../bindings/sound/ti,tlv320adc3xxx.yaml | 126 ++++++++++++++++++ include/dt-bindings/sound/tlv320adc3xxx.h | 33 +++++ 2 files changed, 159 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/ti,tlv320adc3xxx.yaml create mode 100644 include/dt-bindings/sound/tlv320adc3xxx.h diff --git a/Documentation/devicetree/bindings/sound/ti,tlv320adc3xxx.yaml b/Documentation/devicetree/bindings/sound/ti,tlv320adc3xxx.yaml new file mode 100644 index 000000000000..4720eac65177 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/ti,tlv320adc3xxx.yaml @@ -0,0 +1,126 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/ti,tlv320adc3xxx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments TLV320ADC3001/TLV320ADC3101 Stereo ADC + +maintainers: + - Ricard Wanderlof <ricardw(a)axis.com> + +description: | + Texas Instruments TLV320ADC3001 and TLV320ADC3101 Stereo ADC + https://www.ti.com/product/TLV320ADC3001 + https://www.ti.com/product/TLV320ADC3101 + +properties: + compatible: + enum: + - ti,tlv320adc3001 + - ti,tlv320adc3101 + + reg: + maxItems: 1 + description: I2C address + + "#sound-dai-cells": + const: 0 + + gpios: + maxItems: 1 + description: GPIO pin used for codec reset (RESET pin) + + clocks: + maxItems: 1 + description: Master clock (MCLK) + + ti,pll-mode: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: + - 0 # ADC3XXX_PLL_DONT_SET - leave mode unchanged + - 1 # ADC3XXX_PLL_ENABLE - use the on-chip PLL + - 2 # ADC3XXX_PLL_BYPASS - do not use the on-chip PLL + - 3 # ADC3XXX_PLL_AUTO - use on-chip PLL if possible + default: 0 + description: | + Set on-chip PLL mode. + ADC3XXX_PLL_DONT_SET is intended for use when setting the clock mod + via the clock id in a machine driver and it is not to be changed + from the previous setting. + ADC3XXX_PLL_AUTO will enable on-chip PLL if possible, depending on the + master clock and sample rate combination. + + ti,dmdin-gpio1: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: + - 0 # ADC3XXX_GPIO_DISABLED - I/O buffers powered down and not used + - 1 # ADC3XXX_GPIO_INPUT - Various non-GPIO input functions + - 2 # ADC3XXX_GPIO_GPI - General purpose input + - 3 # ADC3XXX_GPIO_GPO - General purpose output + - 4 # ADC3XXX_GPIO_CLKOUT - Clock source set in CLKOUT_MUX reg + - 5 # ADC3XXX_GPIO_INT1 - INT1 output + - 6 # ADC3XXX_GPIO_SECONDARY_BCLK - Codec interface secondary BCLK + - 7 # ADC3XXX_GPIO_SECONDARY_WCLK - Codec interface secondary WCLK + default: 0 + description: | + Configuration for DMDIN/GPIO1 pin. + + When ADC3XXX_GPIO_GPO is configured, this causes corresponding the + ALSA control "GPIOx Output" to appear, as a switch control. + + Note that there is currently no support for reading the GPIO pins as + inputs. + + ti,dmclk-gpio2: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: + - 0 # ADC3XXX_GPIO_DISABLED - I/O buffers powered down and not used + - 1 # ADC3XXX_GPIO_INPUT - Various non-GPIO input functions + - 2 # ADC3XXX_GPIO_GPI - General purpose input + - 3 # ADC3XXX_GPIO_GPO - General purpose output + - 4 # ADC3XXX_GPIO_CLKOUT - Clock source set in CLKOUT_MUX reg + - 5 # ADC3XXX_GPIO_INT1 - INT1 output + - 6 # ADC3XXX_GPIO_SECONDARY_BCLK - Codec interface secondary BCLK + - 7 # ADC3XXX_GPIO_SECONDARY_WCLK - Codec interface secondary WCLK + default: 0 + description: | + Configuration for DMCLK/GPIO2 pin. + + When ADC3XXX_GPIO_GPO is configured, this causes corresponding the + ALSA control "GPIOx Output" to appear, as a switch control. + + Note that there is currently no support for reading the GPIO pins as + inputs. + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/sound/tlv320adc3xxx.h> + + i2c { + #address-cells = <1>; + #size-cells = <0>; + tlv320adc3101: tlv320adc3101@18 { + compatible = "ti,tlv320adc3101"; + reg = <0x18>; + gpios = <&gpio_pc 3 GPIO_ACTIVE_LOW>; + clocks = <&audio_mclk>; + ti,pll-mode = <ADC3XXX_PLL_BYPASS>; + ti,dmdin-gpio1 = <ADC3XXX_GPIO_GPO>; + }; + }; + + audio_mclk: clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24576000>; + }; +... diff --git a/include/dt-bindings/sound/tlv320adc3xxx.h b/include/dt-bindings/sound/tlv320adc3xxx.h new file mode 100644 index 000000000000..8d488a6c3186 --- /dev/null +++ b/include/dt-bindings/sound/tlv320adc3xxx.h @@ -0,0 +1,33 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __DT_TLV320ADC3XXX_H +#define __DT_TLV320ADC3XXX_H + +/* PLL modes, derived from clk_id of set_sysclk callback, or set in + * devicetree using the ti,pll-mode property. + * + * The default behavior is to take the first matching entry in the clock + * table, which is intended to be the PLL based one if there is more than one. + * + * Setting the clock source using simple-card (clocks or + * system-clock-frequency property) sets clk_id = 0 = ADC3XXX_CLK_DONT_SET, + * which doesn't change whatever clock setting was previously set up. + */ +#define ADC3XXX_PLL_DONT_SET 0 /* Don't change mode */ +#define ADC3XXX_PLL_ENABLE 1 /* Use PLL for clock generation */ +#define ADC3XXX_PLL_BYPASS 2 /* Don't use PLL for clock generation */ +#define ADC3XXX_PLL_AUTO 3 /* Use first available mode */ + +#define ADC3XXX_GPIO_DISABLED 0 /* I/O buffers powered down */ +#define ADC3XXX_GPIO_INPUT 1 /* Various non-GPIO inputs */ +#define ADC3XXX_GPIO_GPI 2 /* General purpose input */ +#define ADC3XXX_GPIO_GPO 3 /* General purpose output */ +#define ADC3XXX_GPIO_CLKOUT 4 /* Source set in reg. CLKOUT_MUX */ +#define ADC3XXX_GPIO_INT1 5 /* INT1 output */ +#define ADC3XXX_GPIO_INT2 6 /* INT2 output */ +/* value 7 is reserved */ +#define ADC3XXX_GPIO_SECONDARY_BCLK 8 /* Codec interface secondary BCLK */ +#define ADC3XXX_GPIO_SECONDARY_WCLK 9 /* Codec interface secondary WCLK */ +#define ADC3XXX_GPIO_ADC_MOD_CLK 10 /* Clock output for digital mics */ +/* values 11-15 reserved */ + +#endif /* __DT_TLV320ADC3XXX_H */ -- 2.20.1 -- Ricard Wolf Wanderlof ricardw(at)axis.com Axis Communications AB, Lund, Sweden www.axis.com Phone +46 46 272 2016 Fax +46 46 13 61 30

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Re: [PATCH] ASoc: fix ASoC driver to support ops to register get_time_info
by Mark Brown 04 Oct '21

04 Oct '21

On Mon, Oct 04, 2021 at 07:38:22PM +0800, Chien-Yu Lin wrote: > Dear Sir, > > Sorry for bothering you. > > Does it have any status updated, please? Please don't send content free pings and please allow a reasonable time for review. People get busy, go on holiday, attend conferences and so on so unless there is some reason for urgency (like critical bug fixes) please allow at least a couple of weeks for review. If there have been review comments then people may be waiting for those to be addressed. Sending content free pings adds to the mail volume (if they are seen at all) which is often the problem and since they can't be reviewed directly if something has gone wrong you'll have to resend the patches anyway, so sending again is generally a better approach though there are some other maintainers who like them - if in doubt look at how patches for the subsystem are normally handled.

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[PATCH RFC] ASoC: sh: rcar: dma: : use proper DMAENGINE API for termination
by Wolfram Sang 04 Oct '21

04 Oct '21

dmaengine_terminate_all() is deprecated in favor of explicitly saying if it should be sync or async. Here, we want dmaengine_terminate_sync() because there is no other synchronization code in the driver to handle an async case. Signed-off-by: Wolfram Sang <wsa+renesas(a)sang-engineering.com> --- Morimoto-san, can you please double check if this works. I don't know this driver very well. Thank you! sound/soc/sh/rcar/dma.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/sh/rcar/dma.c b/sound/soc/sh/rcar/dma.c index 95aa26d62e4f..d1b46057df9e 100644 --- a/sound/soc/sh/rcar/dma.c +++ b/sound/soc/sh/rcar/dma.c @@ -101,7 +101,7 @@ static int rsnd_dmaen_stop(struct rsnd_mod *mod, struct rsnd_dmaen *dmaen = rsnd_dma_to_dmaen(dma); if (dmaen->chan) - dmaengine_terminate_all(dmaen->chan); + dmaengine_terminate_sync(dmaen->chan); return 0; } -- 2.30.2

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[PATCH 0/2] Codec driver for TLV320ADC3001 and 3101
by Ricard Wanderlof 04 Oct '21

04 Oct '21

This is a codec driver for the TLV320ADC3001 and TLV320ADC3101 2 channel audio ADC chips from Texas Instruments. Based on an old driver for these chips that I was referred to by Texas Instruments, but which apparently was never upstreamed, I've taken patches from various incarnations, ported them and augmented them with various new features in order to make a working driver. There is currently no support for the on-chip "miniDSP". Although the TLV320ADC3001 and TLV320ADC3101 have similarities with other TI codec chips for which there are existing drivers, upon closer inspection I decided the differences were too great to warrant attempting to modify an existing driver, especially without access to all supported chips and resources for testing them all. There are certainly things that could be improved, among others in the area of PLL register value calculations, but it has been tested on the Axis ARTPEC-8 platform and has been found to work satisfactorily at least with a TLV320ADC3101 operating as an I2S slave at 48 kHz with 32 bit bit depth, 1 or 2 channels, both with the on-chip PLL enabled and disabled. I have not tested this on a TLV320ADC3001 chip, but I've retained the apparent differences from the '3101 (which seem quite small) from the original driver. /Ricard Ricard Wanderlof (2): dt-bindings: sound: tlv320adc3xxx: New codec driver ASoC: codec: tlv320adc3xxx: New codec driver .../bindings/sound/ti,tlv320adc3xxx.yaml | 126 ++ include/dt-bindings/sound/tlv320adc3xxx.h | 33 + sound/soc/codecs/Kconfig | 7 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/tlv320adc3xxx.c | 1239 +++++++++++++++++ sound/soc/codecs/tlv320adc3xxx.h | 381 +++++ 6 files changed, 1788 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/ti,tlv320adc3xxx.yaml create mode 100644 include/dt-bindings/sound/tlv320adc3xxx.h create mode 100644 sound/soc/codecs/tlv320adc3xxx.c create mode 100644 sound/soc/codecs/tlv320adc3xxx.h -- 2.20.1 -- Ricard Wolf Wanderlof ricardw(at)axis.com Axis Communications AB, Lund, Sweden www.axis.com Phone +46 46 272 2016 Fax +46 46 13 61 30

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