March 2020 - Alsa-devel - mailman.alsa-project.org

[PATCH] alsaloop: reduce cumulative error caused by non-atomic samples calculation
by Ruslan Bilovol 11 Mar '20

11 Mar '20

When doing loopback between two audio card with same sampling frequency, I noticed slow increase of pitch_diff. When I changed order of get_queued_playback_samples() vs get_queued_capture_samples(), I noticed same drift of pitch_diff but if was decreasing this time. This seems to be caused by non-atomic consecutive snd_pcm_delay() invocation for playback then for capture. snd_pcm_delay() measures delay between read/write call and actual ADC/DAC operation. So while we get this value for playback path in get_queued_playback_samples(), next call to get_queued_capture_samples() will happen a little bit later so snd_pcm_delay() may return incorrect value. Be interleaving get_queued_{playback,capture}_samples() order, we divide this small error between playback and capture paths. I do not see any issues anymore with one-way drift of pitch_diff. Signed-off-by: Ruslan Bilovol <ruslan.bilovol(a)gmail.com> --- alsaloop/pcmjob.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/alsaloop/pcmjob.c b/alsaloop/pcmjob.c index b252486..1b7925a 100644 --- a/alsaloop/pcmjob.c +++ b/alsaloop/pcmjob.c @@ -1951,8 +1951,16 @@ int pcmjob_pollfds_handle(struct loopback *loop, struct pollfd *fds) } if (loop->sync != SYNC_TYPE_NONE) { snd_pcm_sframes_t pqueued, cqueued; - pqueued = get_queued_playback_samples(loop); - cqueued = get_queued_capture_samples(loop); + + /* Reduce cumulative error by interleaving playback vs capture reading order */ + if (loop->total_queued_count & 1) { + pqueued = get_queued_playback_samples(loop); + cqueued = get_queued_capture_samples(loop); + } else { + cqueued = get_queued_capture_samples(loop); + pqueued = get_queued_playback_samples(loop); + } + if (verbose > 4) snd_output_printf(loop->output, "%s: queued %li/%li samples\n", loop->id, pqueued, cqueued); if (pqueued > 0) -- 1.9.1

3 2

[PATCH 7/8] ALSA: firewire-tascam: Add missing annotation for tscm_hwdep_read_queue()
by Jules Irenge 11 Mar '20

11 Mar '20

Sparse reports a warning at tscm_hwdep_read_queue() warning: context imbalance in tscm_hwdep_read_queue() - unexpected unlock The root cause is the missing annotation at tscm_hwdep_read_queue() Add the missing __releases(&tscm->lock) annotation Signed-off-by: Jules Irenge <jbi.octave(a)gmail.com> --- sound/firewire/tascam/tascam-hwdep.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/firewire/tascam/tascam-hwdep.c b/sound/firewire/tascam/tascam-hwdep.c index c29a97f6f638..9801e33e7f2a 100644 --- a/sound/firewire/tascam/tascam-hwdep.c +++ b/sound/firewire/tascam/tascam-hwdep.c @@ -36,6 +36,7 @@ static long tscm_hwdep_read_locked(struct snd_tscm *tscm, char __user *buf, static long tscm_hwdep_read_queue(struct snd_tscm *tscm, char __user *buf, long remained, loff_t *offset) + __releases(&tscm->lock) { char __user *pos = buf; unsigned int type = SNDRV_FIREWIRE_EVENT_TASCAM_CONTROL; -- 2.24.1

3 2

[PATCH 8/8] ALSA: firewire-tascam: Add missing annotation for tscm_hwdep_read_locked()
by Jules Irenge 11 Mar '20

11 Mar '20

Sparse reports a warning at tscm_hwdep_read_locked() warning: context imbalance in tscm_hwdep_read_locked() - unexpected unlock The root cause is the missing annotation at tscm_hwdep_read_locked() Add the missing __releases(&tscm->lock) annotation Signed-off-by: Jules Irenge <jbi.octave(a)gmail.com> --- sound/firewire/tascam/tascam-hwdep.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/firewire/tascam/tascam-hwdep.c b/sound/firewire/tascam/tascam-hwdep.c index 9801e33e7f2a..6f38335fe10b 100644 --- a/sound/firewire/tascam/tascam-hwdep.c +++ b/sound/firewire/tascam/tascam-hwdep.c @@ -17,6 +17,7 @@ static long tscm_hwdep_read_locked(struct snd_tscm *tscm, char __user *buf, long count, loff_t *offset) + __releases(&tscm->lock) { struct snd_firewire_event_lock_status event = { .type = SNDRV_FIREWIRE_EVENT_LOCK_STATUS, -- 2.24.1

3 2

Sample project request...
by GitHub issues - opened 11 Mar '20

11 Mar '20

alsa-project/alsa-lib issue #35 was opened from mnini: Can you make sample of alsa processor that is have input and output in the code? I know only syntax of C and I want to program DSP for linux output sound. Issue URL : https://github.com/alsa-project/alsa-lib/issues/35 Repository URL: https://github.com/alsa-project/alsa-lib

1 0

How to model 3xADAU1761 codec in TDM8 with 2xSAI in ALSA ?
by Rolf Peder Klemetsen 10 Mar '20

10 Mar '20

Hello, I am working on bringup of a custom board that has three ADAU1761 codecs, and a NXP LS1028A SoC. The codecs are supposed to be configured in TDM8 mode and share a common playback I2S bus connected to SAI4, and a common capture I2S bus connected to SAI3. What is the recommended way of modelling this setup in the Linux device tree ? So far I have tried the following: &i2c0 { status = "okay"; i2c_codec1: adau1761@38 { compatible = "adi,adau1761"; #sound-dai-cells=<0>; reg = <0x38>; tdm-offset = <0>; clocks = <&adau1761_mclk>; clock-names = "mclk"; }; i2c_codec2: adau1761@39 { compatible = "adi,adau1761"; #sound-dai-cells=<0>; reg = <0x39>; tdm-offset = <16>; clocks = <&adau1761_mclk>; clock-names = "mclk"; }; i2c_codec3: adau1761@3a { compatible = "adi,adau1761"; #sound-dai-cells=<0>; reg = <0x3a>; tdm-offset = <32>; clocks = <&adau1761_mclk>; clock-names = "mclk"; }; }; At first I attempted creating three simple-audio-card's. That attempted failed since sharing the same cpu (SAI3 and SAI4) failed with no ALSA device as a result. Then I attempted creating a single simple-audio-card with two dai-links (one for playback and one for capture), each containing three codec sub-nodes. That doesn't really work either. Can someone please point me in the right direction? Many of the parameters that I have put in the dts have no effect and are assumed not supported. Regards Rolf sound { status = "okay"; model = "Super Sound System"; compatible = "simple-audio-card"; simple-audio-card,name = "sound"; simple-audio-card,format = "i2s"; simple-audio-card,bitclock-master = <&p_snd_codec_o1>; simple-audio-card,frame-master = <&p_snd_codec_o1>; simple-audio-card,widgets = "Microphone", "Mic In", "Headphone", "Headphone Out", "Line", "Line In", "Line", "Line Out"; simple-audio-card,routing = "Line Out", "LOUT", "Line Out", "ROUT", "Headphone Out", "LHP", "Headphone Out", "RHP", "Mic In", "MICBIAS", "LINN", "Mic In", "RINN", "Mic In", "LINP", "Mic In", "RINP", "Mic In", "LAUX", "Line In", "RAUX", "Line In"; playback_link: simple-audio-card,dai-link@0 { format = "i2s"; convert-channels = <8>; bitclock-master = <&p_snd_codec_o1>; frame-master = <&p_snd_codec_o1>; name-prefix = "p"; snd_dai_playback: cpu@0 { cpu-dai-name = "sai4_0"; sound-dai-name = "sai4_0"; sound-dai = <&sai4 0>; dai-tdm-slot-num = <8>; dai-tdm-slot-width = <16>; dai-tdm-slot-tx-mask = <1 0 1 0 1 0 0 0>; dai-tdm-slot-rx-mask = <0 0 0 0 0 0 0 0>; }; p_snd_codec_o1: codec@0 { sound-dai = <&i2c_codec1>; frame-master; bitclock-master; clocks=<&adau1761_mclk>; clock-frequency = <12288000>; clock-names = "mclk"; name-prefix = "c1"; dai-tdm-slot-tx-mask = <1 0 0 0 0 0 0 0>; dai-tdm-slot-rx-mask = <0 0 0 0 0 0 0 0>; }; p_snd_codec_o2: codec@1 { sound-dai = <&i2c_codec2>; clocks=<&adau1761_mclk>; clock-frequency = <12288000>; clock-names = "mclk"; name-prefix = "c2"; dai-tdm-slot-tx-mask = <0 0 1 0 0 0 0 0>; dai-tdm-slot-rx-mask = <0 0 0 0 0 0 0 0>; }; p_snd_codec_o3: codec@2 { sound-dai = <&i2c_codec3>; clocks=<&adau1761_mclk>; clock-frequency = <12288000>; clock-names = "mclk"; name-prefix = "c3"; dai-tdm-slot-tx-mask = <0 0 0 0 1 0 0 0>; dai-tdm-slot-rx-mask = <0 0 0 0 0 0 0 0>; }; }; capture_link: simple-audio-card,dai-link@1 { format = "i2s"; convert-channels = <8>; bitclock-master = <&c_snd_codec_o1>; frame-master = <&c_snd_codec_o1>; name-prefix = "c"; snd_dai_capture: cpu@0 { sound-dai = <&sai3>; dai-tdm-slot-num = <8>; dai-tdm-slot-width = <16>; dai-tdm-slot-tx-mask = <0 0 0 0 0 0 0 0>; dai-tdm-slot-rx-mask = <0 1 0 1 0 1 0 0>; }; c_snd_codec_o1: codec@0 { sound-dai = <&i2c_codec1>; frame-master; bitclock-master; clocks=<&adau1761_mclk>; clock-names = "mclk"; clock-frequency = <12288000>; name-prefix = "c1"; dai-tdm-slot-tx-mask = <0 0 0 0 0 0 0 0>; dai-tdm-slot-rx-mask = <0 1 0 0 0 0 0 0>; }; c_snd_codec_o2: codec@1 { sound-dai = <&i2c_codec2>; clocks=<&adau1761_mclk>; clock-names = "mclk"; clock-frequency = <12288000>; name-prefix = "c2"; dai-tdm-slot-tx-mask = <0 0 0 0 0 0 0 0>; dai-tdm-slot-rx-mask = <0 0 0 1 0 0 0 0>; }; c_snd_codec_o3: codec@2 { sound-dai = <&i2c_codec3>; clocks=<&adau1761_mclk>; clock-names = "mclk"; clock-frequency = <12288000>; name-prefix = "c3"; dai-tdm-slot-tx-mask = <0 0 0 0 0 0 0 0>; dai-tdm-slot-rx-mask = <0 0 0 0 0 1 0 0>; }; };

2 3

[PATCH 0/3] ASoC: rt5682: fix Kconfig/compilation issues when I2C is not selected
by Pierre-Louis Bossart 10 Mar '20

10 Mar '20

RT5682 can work in I2C or SoundWire mode, but the code will not compile if I2C is not selected. Reported-by: kbuild test robot <lkp(a)intel.com> Pierre-Louis Bossart (3): ASoC: rt5682: fix unmet dependencies ASoC: rt5682: fix compilation issues without I2C ASoC: rt5682-sdw: fix 'defined but not used' pm functions sound/soc/codecs/Kconfig | 2 +- sound/soc/codecs/rt5682-sdw.c | 4 ++-- sound/soc/codecs/rt5682.c | 10 ++++++++++ 3 files changed, 13 insertions(+), 3 deletions(-) -- 2.20.1

2 7

Re: [PATCH] dt-bindings: sound: Convert cirrus, cs42l51 to json-schema
by Rob Herring 10 Mar '20

10 Mar '20

On Fri, 28 Feb 2020 16:27:06 +0100, Benjamin Gaignard wrote: > Convert cirrus,cs42l51 to yaml format. > > Signed-off-by: Benjamin Gaignard <benjamin.gaignard(a)st.com> > --- > .../devicetree/bindings/sound/cirrus,cs42l51.yaml | 69 ++++++++++++++++++++++ > .../devicetree/bindings/sound/cs42l51.txt | 33 ----------- > 2 files changed, 69 insertions(+), 33 deletions(-) > create mode 100644 Documentation/devicetree/bindings/sound/cirrus,cs42l51.yaml > delete mode 100644 Documentation/devicetree/bindings/sound/cs42l51.txt > Reviewed-by: Rob Herring <robh(a)kernel.org>

1 0

[PATCH for-5.7] ASoC: pcm: Fix (again) possible buffer overflow in dpcm state sysfs output
by Takashi Iwai 10 Mar '20

10 Mar '20

This is re-applying the fix that went into 5.6 (commit 6c89ffea60aa) as the changes were wiped out after merging the other code refactoring. Basically the same changes, just replacing the suspicious calls of snprintf() with scnprintf(). Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- sound/soc/soc-pcm.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/sound/soc/soc-pcm.c b/sound/soc/soc-pcm.c index e7915adaaf0a..34ee54ea7b30 100644 --- a/sound/soc/soc-pcm.c +++ b/sound/soc/soc-pcm.c @@ -66,16 +66,16 @@ static ssize_t dpcm_show_state(struct snd_soc_pcm_runtime *fe, unsigned long flags; /* FE state */ - offset += snprintf(buf + offset, size - offset, + offset += scnprintf(buf + offset, size - offset, "[%s - %s]\n", fe->dai_link->name, stream ? "Capture" : "Playback"); - offset += snprintf(buf + offset, size - offset, "State: %s\n", + offset += scnprintf(buf + offset, size - offset, "State: %s\n", dpcm_state_string(fe->dpcm[stream].state)); if ((fe->dpcm[stream].state >= SND_SOC_DPCM_STATE_HW_PARAMS) && (fe->dpcm[stream].state <= SND_SOC_DPCM_STATE_STOP)) - offset += snprintf(buf + offset, size - offset, + offset += scnprintf(buf + offset, size - offset, "Hardware Params: " "Format = %s, Channels = %d, Rate = %d\n", snd_pcm_format_name(params_format(params)), @@ -83,10 +83,10 @@ static ssize_t dpcm_show_state(struct snd_soc_pcm_runtime *fe, params_rate(params)); /* BEs state */ - offset += snprintf(buf + offset, size - offset, "Backends:\n"); + offset += scnprintf(buf + offset, size - offset, "Backends:\n"); if (list_empty(&fe->dpcm[stream].be_clients)) { - offset += snprintf(buf + offset, size - offset, + offset += scnprintf(buf + offset, size - offset, " No active DSP links\n"); goto out; } @@ -96,16 +96,16 @@ static ssize_t dpcm_show_state(struct snd_soc_pcm_runtime *fe, struct snd_soc_pcm_runtime *be = dpcm->be; params = &dpcm->hw_params; - offset += snprintf(buf + offset, size - offset, + offset += scnprintf(buf + offset, size - offset, "- %s\n", be->dai_link->name); - offset += snprintf(buf + offset, size - offset, + offset += scnprintf(buf + offset, size - offset, " State: %s\n", dpcm_state_string(be->dpcm[stream].state)); if ((be->dpcm[stream].state >= SND_SOC_DPCM_STATE_HW_PARAMS) && (be->dpcm[stream].state <= SND_SOC_DPCM_STATE_STOP)) - offset += snprintf(buf + offset, size - offset, + offset += scnprintf(buf + offset, size - offset, " Hardware Params: " "Format = %s, Channels = %d, Rate = %d\n", snd_pcm_format_name(params_format(params)), -- 2.16.4

2 1

[PATCH] MAINTAINERS: Update Cirrus Logic codec driver maintainers
by Schulman, James 10 Mar '20

10 Mar '20

Brian & Paul are no longer active audio codec driver maintainers. Update list to reflect myself and David Rhodes as the active maintainers. Signed-off-by: James Schulman <james.schulman(a)cirrus.com> --- MAINTAINERS | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 6158a143a13e..05379f8bc8e1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -4021,8 +4021,8 @@ F: Documentation/devicetree/bindings/sound/google,cros-ec-codec.txt F: sound/soc/codecs/cros_ec_codec.* CIRRUS LOGIC AUDIO CODEC DRIVERS -M: Brian Austin <brian.austin(a)cirrus.com> -M: Paul Handrigan <Paul.Handrigan(a)cirrus.com> +M: James Schulman <james.schulman(a)cirrus.com> +M: David Rhodes <david.rhodes(a)cirrus.com> L: alsa-devel(a)alsa-project.org (moderated for non-subscribers) S: Maintained F: sound/soc/codecs/cs* -- 2.17.1

3 5

[PATCH] ASoC: brcm: Add DSL/PON SoC audio driver
by Kevin Li 10 Mar '20

10 Mar '20

This patch adds Broadcom DSL/PON SoC audio driver with Whistler I2S block. The SoC supported by this patch are BCM63158B0,BCM63178 and BCM47622/6755. Signed-off-by: Kevin Li <kevin-ke.li(a)broadcom.com> --- sound/soc/bcm/Kconfig | 9 + sound/soc/bcm/Makefile | 4 + sound/soc/bcm/bcm63xx-i2s-whistler.c | 328 ++++++++++++++++++ sound/soc/bcm/bcm63xx-i2s.h | 93 +++++ sound/soc/bcm/bcm63xx-pcm-whistler.c | 488 +++++++++++++++++++++++++++ 5 files changed, 922 insertions(+) create mode 100644 sound/soc/bcm/bcm63xx-i2s-whistler.c create mode 100644 sound/soc/bcm/bcm63xx-i2s.h create mode 100644 sound/soc/bcm/bcm63xx-pcm-whistler.c diff --git a/sound/soc/bcm/Kconfig b/sound/soc/bcm/Kconfig index 0037e96aa228..4218057b0874 100644 --- a/sound/soc/bcm/Kconfig +++ b/sound/soc/bcm/Kconfig @@ -17,3 +17,12 @@ config SND_SOC_CYGNUS Cygnus chips (bcm958300, bcm958305, bcm911360) If you don't know what to do here, say N. + +config SND_BCM63XX_I2S_WHISTLER + tristate "SoC Audio support for the Broadcom BCM63XX I2S module" + select REGMAP_MMIO + help + Say Y if you want to add support for ASoC audio on Broadcom + DSL/PON chips (bcm63158, bcm63178) + + If you don't know what to do here, say N diff --git a/sound/soc/bcm/Makefile b/sound/soc/bcm/Makefile index b81fa421ec27..7c2d7899603b 100644 --- a/sound/soc/bcm/Makefile +++ b/sound/soc/bcm/Makefile @@ -9,3 +9,7 @@ snd-soc-cygnus-objs := cygnus-pcm.o cygnus-ssp.o obj-$(CONFIG_SND_SOC_CYGNUS) += snd-soc-cygnus.o +# BCM63XX Platform Support +snd-soc-63xx-objs := bcm63xx-i2s-whistler.o bcm63xx-pcm-whistler.o + +obj-$(CONFIG_SND_BCM63XX_I2S_WHISTLER) += snd-soc-63xx.o \ No newline at end of file diff --git a/sound/soc/bcm/bcm63xx-i2s-whistler.c b/sound/soc/bcm/bcm63xx-i2s-whistler.c new file mode 100644 index 000000000000..c37135f0b85c --- /dev/null +++ b/sound/soc/bcm/bcm63xx-i2s-whistler.c @@ -0,0 +1,328 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * linux/sound/bcm/bcm63xx-i2s-whistler.c + * BCM63xx whistler i2s driver + + * Copyright (c) 2020 Broadcom Corporation + * Author: Kevin-Ke Li <kevin-ke.li(a)broadcom.com> + */ + +#include <linux/clk.h> +#include <linux/dma-mapping.h> +#include <linux/io.h> +#include <linux/module.h> +#include <linux/regmap.h> +#include <sound/pcm_params.h> +#include <sound/soc.h> +#include "bcm63xx-i2s.h" + +#define DRV_NAME "brcm-i2s" + +static bool brcm_i2s_wr_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case I2S_TX_CFG ... I2S_TX_DESC_IFF_LEN: + case I2S_TX_CFG_2 ... I2S_RX_DESC_IFF_LEN: + case I2S_RX_CFG_2 ... I2S_REG_MAX: + return true; + default: + return false; + } +} + +static bool brcm_i2s_rd_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case I2S_TX_CFG ... I2S_REG_MAX: + return true; + default: + return false; + } +} + +static bool brcm_i2s_volatile_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case I2S_TX_CFG: + case I2S_TX_IRQ_CTL: + case I2S_TX_DESC_IFF_ADDR: + case I2S_TX_DESC_IFF_LEN: + case I2S_TX_DESC_OFF_ADDR: + case I2S_TX_DESC_OFF_LEN: + case I2S_TX_CFG_2: + case I2S_RX_CFG: + case I2S_RX_IRQ_CTL: + case I2S_RX_DESC_OFF_ADDR: + case I2S_RX_DESC_OFF_LEN: + case I2S_RX_DESC_IFF_LEN: + case I2S_RX_DESC_IFF_ADDR: + case I2S_RX_CFG_2: + return true; + default: + return false; + } +} + +static const struct regmap_config brcm_i2s_regmap_config = { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + .max_register = I2S_REG_MAX, + .writeable_reg = brcm_i2s_wr_reg, + .readable_reg = brcm_i2s_rd_reg, + .volatile_reg = brcm_i2s_volatile_reg, + .cache_type = REGCACHE_FLAT, +}; + +static int bcm63xx_i2s_set_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt) +{ + return 0; +} + +static int bcm63xx_i2s_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + int ret = 0; + struct bcm_i2s_priv *i2s_priv = snd_soc_dai_get_drvdata(dai); + + ret = clk_set_rate(i2s_priv->i2s_clk, params_rate(params)); + if (ret < 0) + dev_err(i2s_priv->dev, + "Can't set sample rate, err: %d\n", ret); + + return ret; +} + +static int bcm63xx_i2s_set_sysclk(struct snd_soc_dai *cpu_dai, + int clk_id, unsigned int freq, int dir) +{ + return 0; +} + +static int bcm63xx_i2s_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + unsigned int slaveMode; + struct bcm_i2s_priv *i2s_priv = snd_soc_dai_get_drvdata(dai); + struct regmap *regmap_i2s = i2s_priv->regmap_i2s; + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + regmap_update_bits(regmap_i2s, I2S_TX_CFG, + I2S_TX_OUT_R | I2S_TX_DATA_ALIGNMENT | + I2S_TX_DATA_ENABLE | I2S_TX_CLOCK_ENABLE, + I2S_TX_OUT_R | I2S_TX_DATA_ALIGNMENT | + I2S_TX_DATA_ENABLE | I2S_TX_CLOCK_ENABLE); + regmap_write(regmap_i2s, I2S_TX_IRQ_CTL, 0); + regmap_write(regmap_i2s, I2S_TX_IRQ_IFF_THLD, 0); + regmap_write(regmap_i2s, I2S_TX_IRQ_OFF_THLD, 1); + + regmap_read(regmap_i2s, I2S_RX_CFG_2, &slaveMode); + if (slaveMode & I2S_RX_SLAVE_MODE_MASK) + regmap_update_bits(regmap_i2s, I2S_TX_CFG_2, + I2S_TX_SLAVE_MODE_MASK, + I2S_TX_MASTER_MODE); + else + regmap_update_bits(regmap_i2s, I2S_TX_CFG_2, + I2S_TX_SLAVE_MODE_MASK, + I2S_TX_SLAVE_MODE); + } else { + regmap_update_bits(regmap_i2s, I2S_RX_CFG, + I2S_RX_IN_R | I2S_RX_DATA_ALIGNMENT | + I2S_RX_CLOCK_ENABLE, + I2S_RX_IN_R | I2S_RX_DATA_ALIGNMENT | + I2S_RX_CLOCK_ENABLE); + regmap_write(regmap_i2s, I2S_RX_IRQ_CTL, 0); + regmap_write(regmap_i2s, I2S_RX_IRQ_IFF_THLD, 0); + regmap_write(regmap_i2s, I2S_RX_IRQ_OFF_THLD, 1); + + regmap_read(regmap_i2s, I2S_TX_CFG_2, &slaveMode); + if (slaveMode & I2S_TX_SLAVE_MODE_MASK) + regmap_update_bits(regmap_i2s, I2S_RX_CFG_2, + I2S_RX_SLAVE_MODE_MASK, 0); + else + regmap_update_bits(regmap_i2s, I2S_RX_CFG_2, + I2S_RX_SLAVE_MODE_MASK, + I2S_RX_SLAVE_MODE); + } + return 0; +} + +static void bcm63xx_i2s_shutdown(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + unsigned int enabled, slavemode; + struct bcm_i2s_priv *i2s_priv = snd_soc_dai_get_drvdata(dai); + struct regmap *regmap_i2s = i2s_priv->regmap_i2s; + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + regmap_update_bits(regmap_i2s, I2S_TX_CFG, + I2S_TX_OUT_R | I2S_TX_DATA_ALIGNMENT | + I2S_TX_DATA_ENABLE | I2S_TX_CLOCK_ENABLE, 0); + regmap_write(regmap_i2s, I2S_TX_IRQ_CTL, 1); + regmap_write(regmap_i2s, I2S_TX_IRQ_IFF_THLD, 4); + regmap_write(regmap_i2s, I2S_TX_IRQ_OFF_THLD, 4); + + regmap_read(regmap_i2s, I2S_TX_CFG_2, &slavemode); + slavemode = slavemode & I2S_TX_SLAVE_MODE_MASK; + if (!slavemode) { + regmap_read(regmap_i2s, I2S_RX_CFG, &enabled); + enabled = enabled & I2S_RX_ENABLE_MASK; + if (enabled) + regmap_update_bits(regmap_i2s, I2S_RX_CFG_2, + I2S_RX_SLAVE_MODE_MASK, + I2S_RX_MASTER_MODE); + } + regmap_update_bits(regmap_i2s, I2S_TX_CFG_2, + I2S_TX_SLAVE_MODE_MASK, + I2S_TX_SLAVE_MODE); + } else { + regmap_update_bits(regmap_i2s, I2S_RX_CFG, + I2S_RX_IN_R | I2S_RX_DATA_ALIGNMENT | + I2S_RX_CLOCK_ENABLE, 0); + regmap_write(regmap_i2s, I2S_RX_IRQ_CTL, 1); + regmap_write(regmap_i2s, I2S_RX_IRQ_IFF_THLD, 4); + regmap_write(regmap_i2s, I2S_RX_IRQ_OFF_THLD, 4); + + regmap_read(regmap_i2s, I2S_RX_CFG_2, &slavemode); + slavemode = slavemode & I2S_RX_SLAVE_MODE_MASK; + if (!slavemode) { + regmap_read(regmap_i2s, I2S_TX_CFG, &enabled); + enabled = enabled & I2S_TX_ENABLE_MASK; + if (enabled) + regmap_update_bits(regmap_i2s, I2S_TX_CFG_2, + I2S_TX_SLAVE_MODE_MASK, + I2S_TX_MASTER_MODE); + } + + regmap_update_bits(regmap_i2s, I2S_RX_CFG_2, + I2S_RX_SLAVE_MODE_MASK, I2S_RX_SLAVE_MODE); + } +} + +static const struct snd_soc_dai_ops bcm63xx_i2s_dai_ops = { + .startup = bcm63xx_i2s_startup, + .shutdown = bcm63xx_i2s_shutdown, + .hw_params = bcm63xx_i2s_hw_params, + .set_fmt = bcm63xx_i2s_set_fmt, + .set_sysclk = bcm63xx_i2s_set_sysclk, +}; + +static struct snd_soc_dai_driver bcm63xx_i2s_dai = { + .name = DRV_NAME, + .playback = { + .channels_min = 2, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000_192000, + .formats = SNDRV_PCM_FMTBIT_S32_LE, + }, + .capture = { + .channels_min = 2, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000_192000, + .formats = SNDRV_PCM_FMTBIT_S32_LE, + }, + .ops = &bcm63xx_i2s_dai_ops, + .symmetric_rates = 1, + .symmetric_channels = 1, +}; + +static const struct snd_soc_component_driver bcm63xx_i2s_component = { + .name = "bcm63xx", +}; + +static int bcm63xx_i2s_dev_probe(struct platform_device *pdev) +{ + int ret = 0; + void __iomem *regs; + struct resource *r_mem, *region; + struct bcm_i2s_priv *i2s_priv; + struct regmap *regmap_i2s; + struct clk *i2s_clk; + + i2s_priv = devm_kzalloc(&pdev->dev, sizeof(*i2s_priv), GFP_KERNEL); + if (!i2s_priv) + return -ENOMEM; + + i2s_clk = devm_clk_get(&pdev->dev, "i2sclk"); + if (IS_ERR(i2s_clk)) { + dev_err(&pdev->dev, "%s: cannot get a brcm clock: %ld\n", + __func__, PTR_ERR(i2s_clk)); + return PTR_ERR(i2s_clk); + } + + r_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!r_mem) { + dev_err(&pdev->dev, "Unable to get register resource.\n"); + return -ENODEV; + } + + region = devm_request_mem_region(&pdev->dev, r_mem->start, + resource_size(r_mem), DRV_NAME); + if (!region) { + dev_err(&pdev->dev, "Memory region already claimed\n"); + return -EBUSY; + } + + regs = devm_ioremap_resource(&pdev->dev, r_mem); + if (IS_ERR(regs)) { + ret = PTR_ERR(regs); + return ret; + } + + regmap_i2s = devm_regmap_init_mmio(&pdev->dev, + regs, &brcm_i2s_regmap_config); + if (IS_ERR(regmap_i2s)) + return PTR_ERR(regmap_i2s); + + regmap_update_bits(regmap_i2s, I2S_MISC_CFG, + I2S_PAD_LVL_LOOP_DIS_MASK, + I2S_PAD_LVL_LOOP_DIS_ENABLE); + + ret = devm_snd_soc_register_component(&pdev->dev, + &bcm63xx_i2s_component, + &bcm63xx_i2s_dai, 1); + if (ret) { + dev_err(&pdev->dev, "failed to register the dai\n"); + return ret; + } + + i2s_priv->dev = &pdev->dev; + i2s_priv->i2s_clk = i2s_clk; + i2s_priv->regmap_i2s = regmap_i2s; + dev_set_drvdata(&pdev->dev, i2s_priv); + + ret = bcm63xx_soc_platform_probe(pdev, i2s_priv); + if (ret) + dev_err(&pdev->dev, "failed to register the pcm\n"); + + return ret; +} + +static int bcm63xx_i2s_dev_remove(struct platform_device *pdev) +{ + bcm63xx_soc_platform_remove(pdev); + return 0; +} + +#ifdef CONFIG_OF +static const struct of_device_id snd_soc_bcm_audio_match[] = { + {.compatible = "brcm,bcm63xx-i2s"}, + { } +}; +#endif + +static struct platform_driver bcm63xx_i2s_driver = { + .driver = { + .name = DRV_NAME, + .of_match_table = of_match_ptr(snd_soc_bcm_audio_match), + }, + .probe = bcm63xx_i2s_dev_probe, + .remove = bcm63xx_i2s_dev_remove, +}; + +module_platform_driver(bcm63xx_i2s_driver); + +MODULE_AUTHOR("Kevin,Li <kevin-ke.li(a)broadcom.com>"); +MODULE_DESCRIPTION("Broadcom DSL XPON ASOC I2S Interface"); +MODULE_LICENSE("GPL v2"); diff --git a/sound/soc/bcm/bcm63xx-i2s.h b/sound/soc/bcm/bcm63xx-i2s.h new file mode 100644 index 000000000000..695e9ba88544 --- /dev/null +++ b/sound/soc/bcm/bcm63xx-i2s.h @@ -0,0 +1,93 @@ +/* SPDX-License-Identifier: GPL-2.0-only*/ +/* + * linux/sound/soc/bcm/bcm63xx-i2s.h + * + * Copyright (c) 2020 Broadcom Corporation + * Author: Kevin-Ke Li <kevin-ke.li(a)broadcom.com> + */ + +#ifndef __BCM63XX_I2S_H +#define __BCM63XX_I2S_H + +#define I2S_DESC_FIFO_DEPTH 8 +#define I2S_MISC_CFG (0x003C) +#define I2S_PAD_LVL_LOOP_DIS_MASK (1 << 2) +#define I2S_PAD_LVL_LOOP_DIS_ENABLE I2S_PAD_LVL_LOOP_DIS_MASK + +#define I2S_TX_ENABLE_MASK (1 << 31) +#define I2S_TX_ENABLE I2S_TX_ENABLE_MASK +#define I2S_TX_OUT_R (1 << 19) +#define I2S_TX_DATA_ALIGNMENT (1 << 2) +#define I2S_TX_DATA_ENABLE (1 << 1) +#define I2S_TX_CLOCK_ENABLE (1 << 0) + +#define I2S_TX_DESC_OFF_LEVEL_SHIFT 12 +#define I2S_TX_DESC_OFF_LEVEL_MASK (0x0F << I2S_TX_DESC_OFF_LEVEL_SHIFT) +#define I2S_TX_DESC_IFF_LEVEL_SHIFT 8 +#define I2S_TX_DESC_IFF_LEVEL_MASK (0x0F << I2S_TX_DESC_IFF_LEVEL_SHIFT) +#define I2S_TX_DESC_OFF_INTR_EN_MSK (1 << 1) +#define I2S_TX_DESC_OFF_INTR_EN I2S_TX_DESC_OFF_INTR_EN_MSK + +#define I2S_TX_CFG (0x0000) +#define I2S_TX_IRQ_CTL (0x0004) +#define I2S_TX_IRQ_EN (0x0008) +#define I2S_TX_IRQ_IFF_THLD (0x000c) +#define I2S_TX_IRQ_OFF_THLD (0x0010) +#define I2S_TX_DESC_IFF_ADDR (0x0014) +#define I2S_TX_DESC_IFF_LEN (0x0018) +#define I2S_TX_DESC_OFF_ADDR (0x001C) +#define I2S_TX_DESC_OFF_LEN (0x0020) +#define I2S_TX_CFG_2 (0x0024) +#define I2S_TX_SLAVE_MODE_SHIFT 13 +#define I2S_TX_SLAVE_MODE_MASK (1 << I2S_TX_SLAVE_MODE_SHIFT) +#define I2S_TX_SLAVE_MODE I2S_TX_SLAVE_MODE_MASK +#define I2S_TX_MASTER_MODE 0 +#define I2S_TX_INTR_MASK 0x0F + +#define I2S_RX_ENABLE_MASK (1 << 31) +#define I2S_RX_ENABLE I2S_RX_ENABLE_MASK +#define I2S_RX_IN_R (1 << 19) +#define I2S_RX_DATA_ALIGNMENT (1 << 2) +#define I2S_RX_CLOCK_ENABLE (1 << 0) + +#define I2S_RX_DESC_OFF_LEVEL_SHIFT 12 +#define I2S_RX_DESC_OFF_LEVEL_MASK (0x0F << I2S_RX_DESC_OFF_LEVEL_SHIFT) +#define I2S_RX_DESC_IFF_LEVEL_SHIFT 8 +#define I2S_RX_DESC_IFF_LEVEL_MASK (0x0F << I2S_RX_DESC_IFF_LEVEL_SHIFT) +#define I2S_RX_DESC_OFF_INTR_EN_MSK (1 << 1) +#define I2S_RX_DESC_OFF_INTR_EN I2S_RX_DESC_OFF_INTR_EN_MSK + +#define I2S_RX_CFG (0x0040) /* 20c0 */ +#define I2S_RX_IRQ_CTL (0x0044) +#define I2S_RX_IRQ_EN (0x0048) +#define I2S_RX_IRQ_IFF_THLD (0x004C) +#define I2S_RX_IRQ_OFF_THLD (0x0050) +#define I2S_RX_DESC_IFF_ADDR (0x0054) +#define I2S_RX_DESC_IFF_LEN (0x0058) +#define I2S_RX_DESC_OFF_ADDR (0x005C) +#define I2S_RX_DESC_OFF_LEN (0x0060) +#define I2S_RX_CFG_2 (0x0064) +#define I2S_RX_SLAVE_MODE_SHIFT 13 +#define I2S_RX_SLAVE_MODE_MASK (1 << I2S_RX_SLAVE_MODE_SHIFT) +#define I2S_RX_SLAVE_MODE I2S_RX_SLAVE_MODE_MASK +#define I2S_RX_MASTER_MODE 0 +#define I2S_RX_INTR_MASK 0x0F + +#define I2S_REG_MAX 0x007C + +struct bcm_i2s_priv { + struct device *dev; + struct resource *r_irq; + struct regmap *regmap_i2s; + struct clk *i2s_clk; + struct snd_pcm_substream *play_substream; + struct snd_pcm_substream *capture_substream; + struct i2s_dma_desc *play_dma_desc; + struct i2s_dma_desc *capture_dma_desc; +}; + +extern int bcm63xx_soc_platform_probe(struct platform_device *pdev, + struct bcm_i2s_priv *i2s_priv); +extern int bcm63xx_soc_platform_remove(struct platform_device *pdev); + +#endif diff --git a/sound/soc/bcm/bcm63xx-pcm-whistler.c b/sound/soc/bcm/bcm63xx-pcm-whistler.c new file mode 100644 index 000000000000..fdf383a9a99a --- /dev/null +++ b/sound/soc/bcm/bcm63xx-pcm-whistler.c @@ -0,0 +1,488 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * linux/sound/bcm/bcm63xx-pcm-whistler.c + * BCM63xx whistler pcm interface + + * Copyright (c) 2020 Broadcom Corporation + * Author: Kevin-Ke Li <kevin-ke.li(a)broadcom.com> + */ + +#include <linux/dma-mapping.h> +#include <linux/io.h> +#include <linux/module.h> +#include <sound/pcm_params.h> +#include <linux/regmap.h> +#include <linux/of_device.h> +#include <sound/soc.h> +#include "bcm63xx-i2s.h" + + +struct i2s_dma_desc { + unsigned char *dma_area; + dma_addr_t dma_addr; + unsigned int dma_len; +}; + +struct bcm63xx_runtime_data { + int dma_len; + dma_addr_t dma_addr; + dma_addr_t dma_addr_next; +}; + +static const struct snd_pcm_hardware bcm63xx_pcm_hardware = { + .info = SNDRV_PCM_INFO_MMAP | + SNDRV_PCM_INFO_MMAP_VALID | + SNDRV_PCM_INFO_INTERLEAVED | + SNDRV_PCM_INFO_PAUSE | + SNDRV_PCM_INFO_RESUME, + .formats = SNDRV_PCM_FMTBIT_S32_LE, /* support S32 only */ + .period_bytes_max = 8192 - 32, + .periods_min = 1, + .periods_max = PAGE_SIZE/sizeof(struct i2s_dma_desc), + .buffer_bytes_max = 128 * 1024, + .fifo_size = 32, +}; + +static int bcm63xx_pcm_hw_params(struct snd_soc_component *component, + struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct i2s_dma_desc *dma_desc; + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_pcm_runtime *runtime = substream->runtime; + + snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer); + runtime->dma_bytes = params_buffer_bytes(params); + + dma_desc = kzalloc(sizeof(*dma_desc), GFP_NOWAIT); + if (!dma_desc) + return -ENOMEM; + + snd_soc_dai_set_dma_data(rtd->cpu_dai, substream, dma_desc); + + return 0; +} + +static int bcm63xx_pcm_hw_free(struct snd_soc_component *component, + struct snd_pcm_substream *substream) +{ + struct i2s_dma_desc *dma_desc; + struct snd_soc_pcm_runtime *rtd = substream->private_data; + + dma_desc = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream); + kfree(dma_desc); + snd_pcm_set_runtime_buffer(substream, NULL); + + return 0; +} + +static int bcm63xx_pcm_trigger(struct snd_soc_component *component, + struct snd_pcm_substream *substream, int cmd) +{ + int ret = 0; + struct snd_soc_pcm_runtime *rtd; + struct bcm_i2s_priv *i2s_priv; + struct regmap *regmap_i2s; + + rtd = substream->private_data; + i2s_priv = dev_get_drvdata(rtd->cpu_dai->dev); + regmap_i2s = i2s_priv->regmap_i2s; + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + regmap_update_bits(regmap_i2s, + I2S_TX_IRQ_EN, + I2S_TX_DESC_OFF_INTR_EN, + I2S_TX_DESC_OFF_INTR_EN); + regmap_update_bits(regmap_i2s, + I2S_TX_CFG, + I2S_TX_ENABLE_MASK, + I2S_TX_ENABLE); + break; + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + regmap_write(regmap_i2s, + I2S_TX_IRQ_EN, + 0); + regmap_update_bits(regmap_i2s, + I2S_TX_CFG, + I2S_TX_ENABLE_MASK, + 0); + break; + default: + ret = -EINVAL; + } + } else { + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + regmap_update_bits(regmap_i2s, + I2S_RX_IRQ_EN, + I2S_RX_DESC_OFF_INTR_EN_MSK, + I2S_RX_DESC_OFF_INTR_EN); + regmap_update_bits(regmap_i2s, + I2S_RX_CFG, + I2S_RX_ENABLE_MASK, + I2S_RX_ENABLE); + break; + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + regmap_update_bits(regmap_i2s, + I2S_RX_IRQ_EN, + I2S_RX_DESC_OFF_INTR_EN_MSK, + 0); + regmap_update_bits(regmap_i2s, + I2S_RX_CFG, + I2S_RX_ENABLE_MASK, + 0); + break; + default: + ret = -EINVAL; + } + } + return ret; +} + +static int bcm63xx_pcm_prepare(struct snd_soc_component *component, + struct snd_pcm_substream *substream) +{ + struct i2s_dma_desc *dma_desc; + struct regmap *regmap_i2s; + struct bcm_i2s_priv *i2s_priv; + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_pcm_runtime *runtime = substream->runtime; + uint32_t regaddr_desclen, regaddr_descaddr; + + dma_desc = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream); + dma_desc->dma_len = snd_pcm_lib_period_bytes(substream); + dma_desc->dma_addr = runtime->dma_addr; + dma_desc->dma_area = runtime->dma_area; + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + regaddr_desclen = I2S_TX_DESC_IFF_LEN; + regaddr_descaddr = I2S_TX_DESC_IFF_ADDR; + } else { + regaddr_desclen = I2S_RX_DESC_IFF_LEN; + regaddr_descaddr = I2S_RX_DESC_IFF_ADDR; + } + + i2s_priv = dev_get_drvdata(rtd->cpu_dai->dev); + regmap_i2s = i2s_priv->regmap_i2s; + + regmap_write(regmap_i2s, regaddr_desclen, dma_desc->dma_len); + regmap_write(regmap_i2s, regaddr_descaddr, dma_desc->dma_addr); + + return 0; +} + +static snd_pcm_uframes_t +bcm63xx_pcm_pointer(struct snd_soc_component *component, + struct snd_pcm_substream *substream) +{ + snd_pcm_uframes_t x; + struct bcm63xx_runtime_data *prtd = substream->runtime->private_data; + + if ((void *)prtd->dma_addr_next == NULL) + prtd->dma_addr_next = substream->runtime->dma_addr; + + x = bytes_to_frames(substream->runtime, + prtd->dma_addr_next - substream->runtime->dma_addr); + + return x == substream->runtime->buffer_size ? 0 : x; +} + +static int bcm63xx_pcm_mmap(struct snd_soc_component *component, + struct snd_pcm_substream *substream, + struct vm_area_struct *vma) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + + return dma_mmap_wc(substream->pcm->card->dev, vma, + runtime->dma_area, + runtime->dma_addr, + runtime->dma_bytes); + +} + +static int bcm63xx_pcm_open(struct snd_soc_component *component, + struct snd_pcm_substream *substream) +{ + int ret = 0; + struct snd_pcm_runtime *runtime = substream->runtime; + struct bcm63xx_runtime_data *prtd; + + runtime->hw = bcm63xx_pcm_hardware; + ret = snd_pcm_hw_constraint_step(runtime, 0, + SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 32); + if (ret) + goto out; + + ret = snd_pcm_hw_constraint_step(runtime, 0, + SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 32); + if (ret) + goto out; + + ret = snd_pcm_hw_constraint_integer(runtime, + SNDRV_PCM_HW_PARAM_PERIODS); + if (ret < 0) + goto out; + + ret = -ENOMEM; + prtd = kzalloc(sizeof(*prtd), GFP_KERNEL); + if (!prtd) + goto out; + + runtime->private_data = prtd; + return 0; +out: + return ret; +} + +static int bcm63xx_pcm_close(struct snd_soc_component *component, + struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct bcm63xx_runtime_data *prtd = runtime->private_data; + + kfree(prtd); + return 0; +} + +static irqreturn_t i2s_dma_isr(int irq, void *bcm_i2s_priv) +{ + unsigned int availdepth, ifflevel, offlevel, int_status, val_1, val_2; + struct bcm63xx_runtime_data *prtd; + struct snd_pcm_substream *substream; + struct snd_pcm_runtime *runtime; + struct regmap *regmap_i2s; + struct i2s_dma_desc *dma_desc; + struct snd_soc_pcm_runtime *rtd; + struct bcm_i2s_priv *i2s_priv; + + i2s_priv = (struct bcm_i2s_priv *)bcm_i2s_priv; + regmap_i2s = i2s_priv->regmap_i2s; + + /* rx */ + regmap_read(regmap_i2s, I2S_RX_IRQ_CTL, &int_status); + + if (int_status & I2S_RX_DESC_OFF_INTR_EN_MSK) { + substream = i2s_priv->capture_substream; + runtime = substream->runtime; + rtd = substream->private_data; + prtd = runtime->private_data; + dma_desc = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream); + + offlevel = (int_status & I2S_RX_DESC_OFF_LEVEL_MASK) >> + I2S_RX_DESC_OFF_LEVEL_SHIFT; + while (offlevel) { + regmap_read(regmap_i2s, I2S_RX_DESC_OFF_ADDR, &val_1); + regmap_read(regmap_i2s, I2S_RX_DESC_OFF_LEN, &val_2); + offlevel--; + } + prtd->dma_addr_next = val_1 + val_2; + ifflevel = (int_status & I2S_RX_DESC_IFF_LEVEL_MASK) >> + I2S_RX_DESC_IFF_LEVEL_SHIFT; + + availdepth = I2S_DESC_FIFO_DEPTH - ifflevel; + while (availdepth) { + dma_desc->dma_addr += + snd_pcm_lib_period_bytes(substream); + dma_desc->dma_area += + snd_pcm_lib_period_bytes(substream); + if (dma_desc->dma_addr - runtime->dma_addr >= + runtime->dma_bytes) { + dma_desc->dma_addr = runtime->dma_addr; + dma_desc->dma_area = runtime->dma_area; + } + + prtd->dma_addr = dma_desc->dma_addr; + regmap_write(regmap_i2s, I2S_RX_DESC_IFF_LEN, + snd_pcm_lib_period_bytes(substream)); + regmap_write(regmap_i2s, I2S_RX_DESC_IFF_ADDR, + dma_desc->dma_addr); + availdepth--; + } + + snd_pcm_period_elapsed(substream); + + /* Clear interrupt by writing 0 */ + regmap_update_bits(regmap_i2s, I2S_RX_IRQ_CTL, + I2S_RX_INTR_MASK, 0); + } + + /* tx */ + regmap_read(regmap_i2s, I2S_TX_IRQ_CTL, &int_status); + + if (int_status & I2S_TX_DESC_OFF_INTR_EN_MSK) { + substream = i2s_priv->play_substream; + runtime = substream->runtime; + rtd = substream->private_data; + prtd = runtime->private_data; + dma_desc = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream); + + offlevel = (int_status & I2S_TX_DESC_OFF_LEVEL_MASK) >> + I2S_TX_DESC_OFF_LEVEL_SHIFT; + while (offlevel) { + regmap_read(regmap_i2s, I2S_TX_DESC_OFF_ADDR, &val_1); + regmap_read(regmap_i2s, I2S_TX_DESC_OFF_LEN, &val_2); + prtd->dma_addr_next = val_1 + val_2; + offlevel--; + } + + ifflevel = (int_status & I2S_TX_DESC_IFF_LEVEL_MASK) >> + I2S_TX_DESC_IFF_LEVEL_SHIFT; + availdepth = I2S_DESC_FIFO_DEPTH - ifflevel; + + while (availdepth) { + dma_desc->dma_addr += + snd_pcm_lib_period_bytes(substream); + dma_desc->dma_area += + snd_pcm_lib_period_bytes(substream); + + if (dma_desc->dma_addr - runtime->dma_addr >= + runtime->dma_bytes) { + dma_desc->dma_addr = runtime->dma_addr; + dma_desc->dma_area = runtime->dma_area; + } + + prtd->dma_addr = dma_desc->dma_addr; + regmap_write(regmap_i2s, I2S_TX_DESC_IFF_LEN, + snd_pcm_lib_period_bytes(substream)); + regmap_write(regmap_i2s, I2S_TX_DESC_IFF_ADDR, + dma_desc->dma_addr); + availdepth--; + } + + snd_pcm_period_elapsed(substream); + + /* Clear interrupt by writing 0 */ + regmap_update_bits(regmap_i2s, I2S_TX_IRQ_CTL, + I2S_TX_INTR_MASK, 0); + } + + return IRQ_HANDLED; +} + +static int bcm63xx_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream) +{ + struct snd_pcm_substream *substream = pcm->streams[stream].substream; + struct snd_dma_buffer *buf = &substream->dma_buffer; + size_t size = bcm63xx_pcm_hardware.buffer_bytes_max; + + buf->dev.type = SNDRV_DMA_TYPE_DEV; + buf->dev.dev = pcm->card->dev; + buf->private_data = NULL; + + buf->area = dma_alloc_wc(pcm->card->dev, + size, &buf->addr, + GFP_KERNEL); + if (!buf->area) + return -ENOMEM; + buf->bytes = size; + return 0; +} + +static int bcm63xx_soc_pcm_new(struct snd_soc_component *component, + struct snd_soc_pcm_runtime *rtd) +{ + struct snd_pcm *pcm = rtd->pcm; + struct bcm_i2s_priv *i2s_priv; + int ret; + + i2s_priv = dev_get_drvdata(rtd->cpu_dai->dev); + + of_dma_configure(pcm->card->dev, pcm->card->dev->of_node, 1); + + ret = dma_coerce_mask_and_coherent(pcm->card->dev, DMA_BIT_MASK(32)); + if (ret) + goto out; + + if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) { + ret = bcm63xx_pcm_preallocate_dma_buffer(pcm, + SNDRV_PCM_STREAM_PLAYBACK); + if (ret) + goto out; + + i2s_priv->play_substream = + pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream; + } + + if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) { + ret = bcm63xx_pcm_preallocate_dma_buffer(pcm, + SNDRV_PCM_STREAM_CAPTURE); + if (ret) + goto out; + i2s_priv->capture_substream = + pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream; + } + +out: + return ret; +} + +static void bcm63xx_pcm_free_dma_buffers(struct snd_soc_component *component, + struct snd_pcm *pcm) +{ + int stream; + struct snd_dma_buffer *buf; + struct snd_pcm_substream *substream; + + for (stream = 0; stream < 2; stream++) { + substream = pcm->streams[stream].substream; + if (!substream) + continue; + buf = &substream->dma_buffer; + if (!buf->area) + continue; + dma_free_wc(pcm->card->dev, buf->bytes, + buf->area, buf->addr); + buf->area = NULL; + } +} + +static const struct snd_soc_component_driver bcm63xx_soc_platform = { + .open = bcm63xx_pcm_open, + .close = bcm63xx_pcm_close, + .hw_params = bcm63xx_pcm_hw_params, + .hw_free = bcm63xx_pcm_hw_free, + .prepare = bcm63xx_pcm_prepare, + .trigger = bcm63xx_pcm_trigger, + .pointer = bcm63xx_pcm_pointer, + .mmap = bcm63xx_pcm_mmap, + .pcm_construct = bcm63xx_soc_pcm_new, + .pcm_destruct = bcm63xx_pcm_free_dma_buffers, +}; + +int bcm63xx_soc_platform_probe(struct platform_device *pdev, + struct bcm_i2s_priv *i2s_priv) +{ + int ret; + + i2s_priv->r_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); + if (!i2s_priv->r_irq) { + dev_err(&pdev->dev, "Unable to get register irq resource.\n"); + return -ENODEV; + } + + ret = devm_request_irq(&pdev->dev, i2s_priv->r_irq->start, i2s_dma_isr, + i2s_priv->r_irq->flags, "i2s_dma", (void *)i2s_priv); + if (ret) { + dev_err(&pdev->dev, + "i2s_init: failed to request interrupt.ret=%d\n", ret); + return ret; + } + + return devm_snd_soc_register_component(&pdev->dev, + &bcm63xx_soc_platform, NULL, 0); +} + +int bcm63xx_soc_platform_remove(struct platform_device *pdev) +{ + return 0; +} + +MODULE_AUTHOR("Kevin,Li <kevin-ke.li(a)broadcom.com>"); +MODULE_DESCRIPTION("Broadcom DSL XPON ASOC PCM Interface"); +MODULE_LICENSE("GPL v2"); -- 2.25.1

3 11

[PATCH 0/9] ASoC: soc-pcm cleanup step6
by Kuninori Morimoto 10 Mar '20

10 Mar '20

Hi Mark We are using plural form for for_each_xxx() macro. But, for_each_rtd_codec/cpu_dai() are out of this rule. 1) - 7) are for it. 8) - 9) add new for_each_card_xxx() macros. Kuninori Morimoto (9): 1) ASoC: soc.h: add for_each_rtd_codecs/cpus_dai() macro 2) ASoC: Intel: use for_each_rtd_codecs/cpus_dai() macro 3) ASoC: mediatek: use for_each_rtd_codecs/cpus_dai() macro 4) ASoC: meson: use for_each_rtd_codecs/cpus_dai() macro 5) ASoC: qcom: use for_each_rtd_codecs/cpus_dai() macro 6) ASoC: soc: use for_each_rtd_codecs/cpus_dai() macro 7) ASoC: soc.h: remove non plural form for_each_xxx macro 8) ASoC: soc-dapm: add for_each_card_dapms() macro 9) ASoC: soc-dapm: add for_each_card_widgets() macro drivers/soundwire/qcom.c | 2 +- include/sound/soc.h | 28 ++-- sound/soc/intel/boards/cml_rt1011_rt5682.c | 2 +- sound/soc/intel/boards/kbl_da7219_max98927.c | 4 +- sound/soc/intel/boards/kbl_rt5663_max98927.c | 2 +- .../intel/boards/kbl_rt5663_rt5514_max98927.c | 2 +- .../mediatek/mt8173/mt8173-rt5650-rt5514.c | 2 +- .../mediatek/mt8173/mt8173-rt5650-rt5676.c | 2 +- sound/soc/mediatek/mt8173/mt8173-rt5650.c | 2 +- .../mediatek/mt8183/mt8183-da7219-max98357.c | 4 +- sound/soc/meson/axg-card.c | 2 +- sound/soc/meson/meson-card-utils.c | 2 +- sound/soc/qcom/apq8016_sbc.c | 2 +- sound/soc/qcom/sdm845.c | 8 +- sound/soc/soc-core.c | 16 +-- sound/soc/soc-dapm.c | 53 ++++---- sound/soc/soc-pcm.c | 124 +++++++++--------- sound/soc/soc-topology.c | 2 +- 18 files changed, 134 insertions(+), 125 deletions(-) -- 2.17.1

4 20

[PATCH] ASoC: SOF: Fix probe point getter
by Cezary Rojewski 10 Mar '20

10 Mar '20

Firmware API changes which introduced 'num_elems' param in several probe structs such as sof_ipc_probe_dma_add_params also impacted getter for both, DMA and probe points. All struct handlers except for sof_ipc_probe_info_params have been updated. Align said handler too to calculate payload size correctly. Signed-off-by: Cezary Rojewski <cezary.rojewski(a)intel.com> Fixes: f3b433e4699f ("ASoC: SOF: Implement Probe IPC API") --- sound/soc/sof/probe.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/sound/soc/sof/probe.c b/sound/soc/sof/probe.c index 2b2f3dcfc7e9..c38169fe00c5 100644 --- a/sound/soc/sof/probe.c +++ b/sound/soc/sof/probe.c @@ -95,13 +95,17 @@ static int sof_ipc_probe_info(struct snd_sof_dev *sdev, unsigned int cmd, if (!reply->num_elems) goto exit; - bytes = reply->num_elems * sizeof(reply->dma[0]); + if (cmd == SOF_IPC_PROBE_DMA_INFO) + bytes = sizeof(reply->dma[0]); + else + bytes = sizeof(reply->desc[0]); + bytes *= reply->num_elems; *params = kmemdup(&reply->dma[0], bytes, GFP_KERNEL); if (!*params) { ret = -ENOMEM; goto exit; } - *num_params = msg.num_elems; + *num_params = reply->num_elems; exit: kfree(reply); -- 2.17.1

3 2

[PATCH 0/2] ASoC: soc-core: disable checks on dapm_add_routes for legacy devices
by Pierre-Louis Bossart 10 Mar '20

10 Mar '20

Since v5.4, the card probe ends when one or more DAPM routes cannot be added. This is a good thing, but legacy devices have incomplete routes that cannot practically be fixed by distributing a new topology file, so users lose all audio functionality by updating their kernel. Introduce an optional flag to allow for a backwards-compatible behavior to keep supporting these devices. For now only set this flag for the one device where an issue was reported. If desired, we could set it for all SKL machine drivers by default. Pierre-Louis Bossart (2): ASoC: soc-core: disable route checks for legacy devices ASoC: Intel: skl_nau88l25_ssm4567: disable route checks include/sound/soc.h | 1 + sound/soc/intel/boards/skl_nau88l25_ssm4567.c | 1 + sound/soc/soc-core.c | 28 ++++++++++++++++--- 3 files changed, 26 insertions(+), 4 deletions(-) -- 2.20.1

3 5

[asoc:for-5.7 149/182] sound/soc/codecs/rt5682.c:3698:1: error: type defaults to 'int' in declaration of 'module_i2c_driver'
by kbuild test robot 10 Mar '20

10 Mar '20

tree: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-5.7 head: 62f9ed5f8768d2425461737d77b83f888b525c06 commit: 03f6fc6de9192f4e4209ceee0e92f5947d44fc0a [149/182] ASoC: rt5682: Add the soundwire support config: sparc-randconfig-a001-20200310 (attached as .config) compiler: sparc-linux-gcc (GCC) 7.5.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross git checkout 03f6fc6de9192f4e4209ceee0e92f5947d44fc0a # save the attached .config to linux build tree GCC_VERSION=7.5.0 make.cross ARCH=sparc If you fix the issue, kindly add following tag Reported-by: kbuild test robot <lkp(a)intel.com> All error/warnings (new ones prefixed by >>): >> sound/soc/codecs/rt5682.c:3698:1: warning: data definition has no type or storage class module_i2c_driver(rt5682_i2c_driver); ^~~~~~~~~~~~~~~~~ >> sound/soc/codecs/rt5682.c:3698:1: error: type defaults to 'int' in declaration of 'module_i2c_driver' [-Werror=implicit-int] >> sound/soc/codecs/rt5682.c:3698:1: warning: parameter names (without types) in function declaration sound/soc/codecs/rt5682.c:3688:26: warning: 'rt5682_i2c_driver' defined but not used [-Wunused-variable] static struct i2c_driver rt5682_i2c_driver = { ^~~~~~~~~~~~~~~~~ cc1: some warnings being treated as errors vim +3698 sound/soc/codecs/rt5682.c 0ddce71c21f03f Bard Liao 2018-06-07 3687 0ddce71c21f03f Bard Liao 2018-06-07 3688 static struct i2c_driver rt5682_i2c_driver = { 0ddce71c21f03f Bard Liao 2018-06-07 3689 .driver = { 0ddce71c21f03f Bard Liao 2018-06-07 3690 .name = "rt5682", 0ddce71c21f03f Bard Liao 2018-06-07 3691 .of_match_table = of_match_ptr(rt5682_of_match), 0ddce71c21f03f Bard Liao 2018-06-07 3692 .acpi_match_table = ACPI_PTR(rt5682_acpi_match), 0ddce71c21f03f Bard Liao 2018-06-07 3693 }, 0ddce71c21f03f Bard Liao 2018-06-07 3694 .probe = rt5682_i2c_probe, 0ddce71c21f03f Bard Liao 2018-06-07 3695 .shutdown = rt5682_i2c_shutdown, 0ddce71c21f03f Bard Liao 2018-06-07 3696 .id_table = rt5682_i2c_id, 0ddce71c21f03f Bard Liao 2018-06-07 3697 }; 0ddce71c21f03f Bard Liao 2018-06-07 @3698 module_i2c_driver(rt5682_i2c_driver); 0ddce71c21f03f Bard Liao 2018-06-07 3699 :::::: The code at line 3698 was first introduced by commit :::::: 0ddce71c21f03fd19867c4939d3ca710f37cdf1a ASoC: rt5682: add rt5682 codec driver :::::: TO: Bard Liao <bardliao(a)realtek.com> :::::: CC: Mark Brown <broonie(a)kernel.org> --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

1 0

[PATCH v2] ALSA: pcm: oss: Simplify plugin frame size calculations
by Takashi Iwai 09 Mar '20

09 Mar '20

Both snd_pcm_plug_client_size() and snd_pcm_plug_slave_size() do the almost same calculations of calling src_frames() and dst_frames() in the chain, but just to the different directions with each other. This patch simplifies those functions. Now they return -EINVAL for the invalid direction, but practically seen, there is no functional changes at all. Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- sound/core/oss/pcm_plugin.c | 120 +++++++++++++++++++++----------------------- 1 file changed, 56 insertions(+), 64 deletions(-) diff --git a/sound/core/oss/pcm_plugin.c b/sound/core/oss/pcm_plugin.c index c9401832967c..58642fecd15c 100644 --- a/sound/core/oss/pcm_plugin.c +++ b/sound/core/oss/pcm_plugin.c @@ -196,82 +196,74 @@ int snd_pcm_plugin_free(struct snd_pcm_plugin *plugin) return 0; } -snd_pcm_sframes_t snd_pcm_plug_client_size(struct snd_pcm_substream *plug, snd_pcm_uframes_t drv_frames) +static snd_pcm_sframes_t calc_dst_frames(struct snd_pcm_substream *plug, + snd_pcm_sframes_t frames) { - struct snd_pcm_plugin *plugin, *plugin_prev, *plugin_next; - int stream; + struct snd_pcm_plugin *plugin, *plugin_next; - if (snd_BUG_ON(!plug)) - return -ENXIO; - if (drv_frames == 0) - return 0; - stream = snd_pcm_plug_stream(plug); - if (stream == SNDRV_PCM_STREAM_PLAYBACK) { - plugin = snd_pcm_plug_last(plug); - while (plugin && drv_frames > 0) { - if (drv_frames > plugin->buf_frames) - drv_frames = plugin->buf_frames; - plugin_prev = plugin->prev; - if (plugin->src_frames) - drv_frames = plugin->src_frames(plugin, drv_frames); - plugin = plugin_prev; + plugin = snd_pcm_plug_first(plug); + while (plugin && frames > 0) { + plugin_next = plugin->next; + if (plugin->dst_frames) { + frames = plugin->dst_frames(plugin, frames); + if (frames < 0) + return frames; } - } else if (stream == SNDRV_PCM_STREAM_CAPTURE) { - plugin = snd_pcm_plug_first(plug); - while (plugin && drv_frames > 0) { - plugin_next = plugin->next; - if (plugin->dst_frames) - drv_frames = plugin->dst_frames(plugin, drv_frames); - if (drv_frames > plugin->buf_frames) - drv_frames = plugin->buf_frames; - plugin = plugin_next; + if (frames > plugin->buf_frames) + frames = plugin->buf_frames; + plugin = plugin_next; + } + return frames; +} + +static snd_pcm_sframes_t calc_src_frames(struct snd_pcm_substream *plug, + snd_pcm_sframes_t frames) +{ + struct snd_pcm_plugin *plugin, *plugin_prev; + + plugin = snd_pcm_plug_last(plug); + while (plugin && frames > 0) { + if (frames > plugin->buf_frames) + frames = plugin->buf_frames; + plugin_prev = plugin->prev; + if (plugin->src_frames) { + frames = plugin->src_frames(plugin, frames); + if (frames < 0) + return frames; } - } else + plugin = plugin_prev; + } + return frames; +} + +snd_pcm_sframes_t snd_pcm_plug_client_size(struct snd_pcm_substream *plug, snd_pcm_uframes_t drv_frames) +{ + if (snd_BUG_ON(!plug)) + return -ENXIO; + switch (snd_pcm_plug_stream(plug)) { + case SNDRV_PCM_STREAM_PLAYBACK: + return calc_src_frames(plug, drv_frames); + case SNDRV_PCM_STREAM_CAPTURE: + return calc_dst_frames(plug, drv_frames); + default: snd_BUG(); - return drv_frames; + return -EINVAL; + } } snd_pcm_sframes_t snd_pcm_plug_slave_size(struct snd_pcm_substream *plug, snd_pcm_uframes_t clt_frames) { - struct snd_pcm_plugin *plugin, *plugin_prev, *plugin_next; - snd_pcm_sframes_t frames; - int stream; - if (snd_BUG_ON(!plug)) return -ENXIO; - if (clt_frames == 0) - return 0; - frames = clt_frames; - stream = snd_pcm_plug_stream(plug); - if (stream == SNDRV_PCM_STREAM_PLAYBACK) { - plugin = snd_pcm_plug_first(plug); - while (plugin && frames > 0) { - plugin_next = plugin->next; - if (plugin->dst_frames) { - frames = plugin->dst_frames(plugin, frames); - if (frames < 0) - return frames; - } - if (frames > plugin->buf_frames) - frames = plugin->buf_frames; - plugin = plugin_next; - } - } else if (stream == SNDRV_PCM_STREAM_CAPTURE) { - plugin = snd_pcm_plug_last(plug); - while (plugin) { - if (frames > plugin->buf_frames) - frames = plugin->buf_frames; - plugin_prev = plugin->prev; - if (plugin->src_frames) { - frames = plugin->src_frames(plugin, frames); - if (frames < 0) - return frames; - } - plugin = plugin_prev; - } - } else + switch (snd_pcm_plug_stream(plug)) { + case SNDRV_PCM_STREAM_PLAYBACK: + return calc_dst_frames(plug, clt_frames); + case SNDRV_PCM_STREAM_CAPTURE: + return calc_src_frames(plug, clt_frames); + default: snd_BUG(); - return frames; + return -EINVAL; + } } static int snd_pcm_plug_formats(const struct snd_mask *mask, -- 2.16.4

1 0

[PATCH] ALSA: pcm: oss: Simplify plugin frame size calculations
by Takashi Iwai 09 Mar '20

09 Mar '20

Both snd_pcm_plug_client_size() and snd_pcm_plug_slave_size() do the almost same calculations of calling src_frames() and dst_frames() in the chain, but just to the different directions with each other. This patch simplifies those functions. Now they return -EINVAL for the invalid direction, but practically seen, there is no functional changes at all. Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- sound/core/oss/pcm_plugin.c | 120 +++++++++++++++++++++----------------------- 1 file changed, 56 insertions(+), 64 deletions(-) diff --git a/sound/core/oss/pcm_plugin.c b/sound/core/oss/pcm_plugin.c index c9401832967c..3978f6d99076 100644 --- a/sound/core/oss/pcm_plugin.c +++ b/sound/core/oss/pcm_plugin.c @@ -196,82 +196,74 @@ int snd_pcm_plugin_free(struct snd_pcm_plugin *plugin) return 0; } -snd_pcm_sframes_t snd_pcm_plug_client_size(struct snd_pcm_substream *plug, snd_pcm_uframes_t drv_frames) +static snd_pcm_sframes_t calc_dst_frames(struct snd_pcm_substream *plug, + snd_pcm_uframes_t frames) { - struct snd_pcm_plugin *plugin, *plugin_prev, *plugin_next; - int stream; + struct snd_pcm_plugin *plugin, *plugin_next; - if (snd_BUG_ON(!plug)) - return -ENXIO; - if (drv_frames == 0) - return 0; - stream = snd_pcm_plug_stream(plug); - if (stream == SNDRV_PCM_STREAM_PLAYBACK) { - plugin = snd_pcm_plug_last(plug); - while (plugin && drv_frames > 0) { - if (drv_frames > plugin->buf_frames) - drv_frames = plugin->buf_frames; - plugin_prev = plugin->prev; - if (plugin->src_frames) - drv_frames = plugin->src_frames(plugin, drv_frames); - plugin = plugin_prev; + plugin = snd_pcm_plug_first(plug); + while (plugin && frames > 0) { + plugin_next = plugin->next; + if (plugin->dst_frames) { + frames = plugin->dst_frames(plugin, frames); + if (frames < 0) + return frames; } - } else if (stream == SNDRV_PCM_STREAM_CAPTURE) { - plugin = snd_pcm_plug_first(plug); - while (plugin && drv_frames > 0) { - plugin_next = plugin->next; - if (plugin->dst_frames) - drv_frames = plugin->dst_frames(plugin, drv_frames); - if (drv_frames > plugin->buf_frames) - drv_frames = plugin->buf_frames; - plugin = plugin_next; + if (frames > plugin->buf_frames) + frames = plugin->buf_frames; + plugin = plugin_next; + } + return frames; +} + +static snd_pcm_sframes_t calc_src_frames(struct snd_pcm_substream *plug, + snd_pcm_uframes_t frames) +{ + struct snd_pcm_plugin *plugin, *plugin_prev; + + plugin = snd_pcm_plug_last(plug); + while (plugin) { + if (frames > plugin->buf_frames) + frames = plugin->buf_frames; + plugin_prev = plugin->prev; + if (plugin->src_frames) { + frames = plugin->src_frames(plugin, frames); + if (frames < 0) + return frames; } - } else + plugin = plugin_prev; + } + return frames; +} + +snd_pcm_sframes_t snd_pcm_plug_client_size(struct snd_pcm_substream *plug, snd_pcm_uframes_t drv_frames) +{ + if (snd_BUG_ON(!plug)) + return -ENXIO; + switch (snd_pcm_plug_stream(plug)) { + case SNDRV_PCM_STREAM_PLAYBACK: + return calc_src_frames(plug, drv_frames); + case SNDRV_PCM_STREAM_CAPTURE: + return calc_dst_frames(plug, drv_frames); + default: snd_BUG(); - return drv_frames; + return -EINVAL; + } } snd_pcm_sframes_t snd_pcm_plug_slave_size(struct snd_pcm_substream *plug, snd_pcm_uframes_t clt_frames) { - struct snd_pcm_plugin *plugin, *plugin_prev, *plugin_next; - snd_pcm_sframes_t frames; - int stream; - if (snd_BUG_ON(!plug)) return -ENXIO; - if (clt_frames == 0) - return 0; - frames = clt_frames; - stream = snd_pcm_plug_stream(plug); - if (stream == SNDRV_PCM_STREAM_PLAYBACK) { - plugin = snd_pcm_plug_first(plug); - while (plugin && frames > 0) { - plugin_next = plugin->next; - if (plugin->dst_frames) { - frames = plugin->dst_frames(plugin, frames); - if (frames < 0) - return frames; - } - if (frames > plugin->buf_frames) - frames = plugin->buf_frames; - plugin = plugin_next; - } - } else if (stream == SNDRV_PCM_STREAM_CAPTURE) { - plugin = snd_pcm_plug_last(plug); - while (plugin) { - if (frames > plugin->buf_frames) - frames = plugin->buf_frames; - plugin_prev = plugin->prev; - if (plugin->src_frames) { - frames = plugin->src_frames(plugin, frames); - if (frames < 0) - return frames; - } - plugin = plugin_prev; - } - } else + switch (snd_pcm_plug_stream(plug)) { + case SNDRV_PCM_STREAM_PLAYBACK: + return calc_dst_frames(plug, clt_frames); + case SNDRV_PCM_STREAM_CAPTURE: + return calc_src_frames(plug, clt_frames); + default: snd_BUG(); - return frames; + return -EINVAL; + } } static int snd_pcm_plug_formats(const struct snd_mask *mask, -- 2.16.4

1 1

about alc880 no sound at ecs g420 and eapd coef
by 尤晓杰 09 Mar '20

09 Mar '20

dear friend, I am using ecs g420 laptop, use options snd-hda-intel model=generic the speaker and mic correctly, 2 pop sounds,when the kernel load(left channel) and the x11 load(right channel), but with standard way only one pop sound when kernel load and silent always. the mic is ok. I have got datasheet of alc880 and see the eapd function, but in your code I see this need coef parameter. so what should I write using verb to open eapd?the physical connexion in summary: an externel amplifier in charge of jack sense to mute speaker, connected with the 0x14 hp out, 0x18 mic in,0x1c cd in, 0x1e spif out,0x1d pcbeep in , no jack sense. eapd shared with spdif in. all are correct with default of datasheet's describe. I use verb to dectt each pin widget's capability , take 0x14 as exaple, no eapd capability.To set 0x14's eapd with hda-verb /dev/snd/hwC0D0 0x70c 0x2, failed to read it again alwas 0. and bios also reported 0x16, I think it is bios's bug. if not changing source code , to use "Early Patching" method to deal with it without changing source code, is it feasible? could you give me some idea? thanks!!!! dmesg: [ 8.009944] snd_hda_codec_realtek hdaudioC0D0: autoconfig for ALC880: line_outs=2 (0x14/0x16/0x0/0x0/0x0) type:hp [ 8.014023] snd_hda_codec_realtek hdaudioC0D0: speaker_outs=0 (0x0/0x0/0x0/0x0/0x0) [ 8.017999] snd_hda_codec_realtek hdaudioC0D0: hp_outs=0 (0x0/0x0/0x0/0x0/0x0) [ 8.021625] snd_hda_codec_realtek hdaudioC0D0: mono: mono_out=0x0 [ 8.024255] snd_hda_codec_realtek hdaudioC0D0: dig-out=0x1e/0x0 [ 8.026741] snd_hda_codec_realtek hdaudioC0D0: inputs: [ 8.038468] mc: Linux media interface: v0.10 [ 8.067515] snd_hda_codec_realtek hdaudioC0D0: Mic=0x18 [ 8.078984] snd_hda_codec_realtek hdaudioC0D0: CD=0x1c [ 8.290306] input: HDA Digital PCBeep as /devices/pci0000:00/0000:00:1b.0/sound/card0/input13 Node 0x02 [Audio Output] wcaps 0x411: Stereo Device: name="ALC880 Analog", type="Audio", device=0 Converter: stream=5, channel=0 PCM: rates [0x560]: 44100 48000 96000 192000 bits [0xe]: 16 20 24 formats [0x1]: PCM Power: setting=D0, actual=D0 Node 0x0c [Audio Mixer] wcaps 0x20010f: Stereo Amp-In Amp-Out Control: name="Headphone Playback Volume", index=0, device=0 ControlAmp: chs=3, dir=1, idx=0, ofs=0 Amp-In caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1 Amp-In vals: [0x00 0x00] [0x80 0x80] Amp-Out caps: ofs=0x40, nsteps=0x40, stepsize=0x03, mute=0 Amp-Out vals: [0x40 0x40] Connection: 2 0x02 0x0b Node 0x0b [Audio Mixer] wcaps 0x20010b: Stereo Amp-In Control: name="Mic Playback Volume", index=0, device=0 ControlAmp: chs=3, dir=1, idx=0, ofs=0 Control: name="Mic Playback Switch", index=0, device=0 ControlAmp: chs=3, dir=1, idx=0, ofs=0 Control: name="CD Playback Volume", index=0, device=0 ControlAmp: chs=3, dir=1, idx=4, ofs=0 Control: name="CD Playback Switch", index=0, device=0 ControlAmp: chs=3, dir=1, idx=4, ofs=0 Control: name="Beep Playback Volume", index=0, device=0 ControlAmp: chs=3, dir=1, idx=5, ofs=0 Control: name="Beep Playback Switch", index=0, device=0 ControlAmp: chs=3, dir=1, idx=5, ofs=0 Amp-In caps: ofs=0x23, nsteps=0x41, stepsize=0x03, mute=1 Amp-In vals: [0x41 0x41] [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x41 0x41] [0x41 0x41] [0x80 0x80] [0x80 0x80] Connection: 8 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x14 0x15 Node 0x14 [Pin Complex] wcaps 0x40018d: Stereo Amp-Out Control: name="Headphone Playback Switch", index=0, device=0 ControlAmp: chs=3, dir=1, idx=0, ofs=0 Amp-Out caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1 Amp-Out vals: [0x00 0x00] Pincap 0x0000003f: IN OUT HP Detect Trigger ImpSense Pin Default 0x01211110: [Jack] HP Out at Ext Rear Conn = 1/8, Color = Black DefAssociation = 0x1, Sequence = 0x0 Misc = NO_PRESENCE Pin-ctls: 0xc0: OUT HP Unsolicited: tag=0x00, enabled=0 Connection: 1 0x0c Codec: 0x10ec0880 Address: 0 AFG Function Id: 0x1 (unsol 0) Vendor Id: 0x10ec0880 Subsystem Id: 0x10191205 Revision Id: 0x100800 No Modem Function Group found Default PCM: rates [0x560]: 44100 48000 96000 192000 bits [0xe]: 16 20 24 formats [0x1]: PCM Default Amp-In caps: N/A Default Amp-Out caps: N/A GPIO: io=2, o=0, i=0, unsolicited=1, wake=0 IO[0]: enable=0, dir=0, wake=0, sticky=0, data=0, unsol=0 IO[1]: enable=0, dir=0, wake=0, sticky=0, data=0, unsol=0

1 0

[RESEND RFC PATCH] soundwire: bus: Add flag to mark DPN_BlockCtrl1 as readonly
by Srinivas Kandagatla 09 Mar '20

09 Mar '20

According to SoundWire Specification Version 1.2. "A Data Port number X (in the range 0-14) which supports only one value of WordLength may implement the WordLength field in the DPX_BlockCtrl1 Register as Read-Only, returning the fixed value of WordLength in response to reads." As WSA881x interfaces in PDM mode making the only field "WordLength" in DPX_BlockCtrl1" fixed and read-only. Behaviour of writing to this register on WSA881x soundwire slave with Qualcomm Soundwire Controller is throwing up an error. Not sure how other controllers deal with writing to readonly registers, but this patch provides a way to avoid writes to DPN_BlockCtrl1 register by providing a ro_blockctrl1_reg flag in struct sdw_port_runtime. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla(a)linaro.org> --- Sorry resending this one as I missed header file changes in my previous patch. I will send patch for WSA881x to include this change once this patch is accepted. drivers/soundwire/bus.h | 2 ++ drivers/soundwire/stream.c | 17 ++++++++++------- include/linux/soundwire/sdw.h | 1 + 3 files changed, 13 insertions(+), 7 deletions(-) diff --git a/drivers/soundwire/bus.h b/drivers/soundwire/bus.h index 204204a26db8..791e8d14093e 100644 --- a/drivers/soundwire/bus.h +++ b/drivers/soundwire/bus.h @@ -79,6 +79,7 @@ int sdw_find_col_index(int col); * @num: Port number. For audio streams, valid port number ranges from * [1,14] * @ch_mask: Channel mask + * @ro_blockctrl1_reg: Read Only flag for DPN_BlockCtrl1 register * @transport_params: Transport parameters * @port_params: Port parameters * @port_node: List node for Master or Slave port_list @@ -89,6 +90,7 @@ int sdw_find_col_index(int col); struct sdw_port_runtime { int num; int ch_mask; + bool ro_blockctrl1_reg; struct sdw_transport_params transport_params; struct sdw_port_params port_params; struct list_head port_node; diff --git a/drivers/soundwire/stream.c b/drivers/soundwire/stream.c index 00348d1fc606..4491643aeb4a 100644 --- a/drivers/soundwire/stream.c +++ b/drivers/soundwire/stream.c @@ -167,13 +167,15 @@ static int sdw_program_slave_port_params(struct sdw_bus *bus, return ret; } - /* Program DPN_BlockCtrl1 register */ - ret = sdw_write(s_rt->slave, addr2, (p_params->bps - 1)); - if (ret < 0) { - dev_err(&s_rt->slave->dev, - "DPN_BlockCtrl1 register write failed for port %d\n", - t_params->port_num); - return ret; + if (!p_rt->ro_blockctrl1_reg) { + /* Program DPN_BlockCtrl1 register */ + ret = sdw_write(s_rt->slave, addr2, (p_params->bps - 1)); + if (ret < 0) { + dev_err(&s_rt->slave->dev, + "DPN_BlockCtrl1 register write failed for port %d\n", + t_params->port_num); + return ret; + } } /* Program DPN_SampleCtrl1 register */ @@ -1195,6 +1197,7 @@ static struct sdw_port_runtime p_rt->ch_mask = port_config[port_index].ch_mask; p_rt->num = port_config[port_index].num; + p_rt->ro_blockctrl1_reg = port_config[port_index].ro_blockctrl1_reg; return p_rt; } diff --git a/include/linux/soundwire/sdw.h b/include/linux/soundwire/sdw.h index ee349a4c5349..8b130855acd1 100644 --- a/include/linux/soundwire/sdw.h +++ b/include/linux/soundwire/sdw.h @@ -842,6 +842,7 @@ void sdw_delete_bus_master(struct sdw_bus *bus); struct sdw_port_config { unsigned int num; unsigned int ch_mask; + bool ro_blockctrl1_reg; }; /** -- 2.21.0

1 0

[PATCH] ASoC: simple-card-utils: use for_each_pcm_streams()
by Kuninori Morimoto 09 Mar '20

09 Mar '20

From: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com> We already have for_each_pcm_streams() macro. Let's use it. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com> --- sound/soc/generic/simple-card-utils.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/generic/simple-card-utils.c b/sound/soc/generic/simple-card-utils.c index 1ab3745547e0..189c4db020cd 100644 --- a/sound/soc/generic/simple-card-utils.c +++ b/sound/soc/generic/simple-card-utils.c @@ -347,7 +347,7 @@ static int asoc_simple_init_dai_link_params(struct snd_soc_pcm_runtime *rtd, } /* Assumes the capabilities are the same for all supported streams */ - for (stream = 0; stream < 2; stream++) { + for_each_pcm_streams(stream) { ret = snd_soc_runtime_calc_hw(rtd, &hw, stream); if (ret == 0) break; -- 2.17.1

2 1

[PATCH] ASoC: amd: Adding TDM support in hw_params.
by Ravulapati Vishnu vardhan rao 09 Mar '20

09 Mar '20

TDM related settings for ACP registers in hw_params. When TDM mode is enabled, Hw_params needs to read and write from/to respective TX/RX (ACP_(I2S/BT)TDM_(TX/RX)FRMT) registers. Signed-off-by: Ravulapati Vishnu vardhan rao <Vishnuvardhanrao.Ravulapati(a)amd.com> --- sound/soc/amd/raven/acp3x-i2s.c | 44 ++++++++++++----------------------------- 1 file changed, 13 insertions(+), 31 deletions(-) diff --git a/sound/soc/amd/raven/acp3x-i2s.c b/sound/soc/amd/raven/acp3x-i2s.c index 91a3881..3a3c47e 100644 --- a/sound/soc/amd/raven/acp3x-i2s.c +++ b/sound/soc/amd/raven/acp3x-i2s.c @@ -42,7 +42,7 @@ static int acp3x_i2s_set_tdm_slot(struct snd_soc_dai *cpu_dai, u32 tx_mask, u32 rx_mask, int slots, int slot_width) { struct i2s_dev_data *adata; - u32 val, reg_val, frmt_reg, frm_len; + u32 frm_len; u16 slot_len; adata = snd_soc_dai_get_drvdata(cpu_dai); @@ -64,36 +64,7 @@ static int acp3x_i2s_set_tdm_slot(struct snd_soc_dai *cpu_dai, default: return -EINVAL; } - - /* Enable I2S/BT channels TDM, respective TX/RX frame lengths.*/ - frm_len = FRM_LEN | (slots << 15) | (slot_len << 18); - if (adata->substream_type == SNDRV_PCM_STREAM_PLAYBACK) { - switch (adata->i2s_instance) { - case I2S_BT_INSTANCE: - reg_val = mmACP_BTTDM_ITER; - frmt_reg = mmACP_BTTDM_TXFRMT; - break; - case I2S_SP_INSTANCE: - default: - reg_val = mmACP_I2STDM_ITER; - frmt_reg = mmACP_I2STDM_TXFRMT; - } - } else { - switch (adata->i2s_instance) { - case I2S_BT_INSTANCE: - reg_val = mmACP_BTTDM_IRER; - frmt_reg = mmACP_BTTDM_RXFRMT; - break; - case I2S_SP_INSTANCE: - default: - reg_val = mmACP_I2STDM_IRER; - frmt_reg = mmACP_I2STDM_RXFRMT; - } - } - val = rv_readl(adata->acp3x_base + reg_val); - rv_writel(val | 0x2, adata->acp3x_base + reg_val); - rv_writel(frm_len, adata->acp3x_base + frmt_reg); adata->tdm_fmt = frm_len; return 0; } @@ -105,12 +76,14 @@ static int acp3x_i2s_hwparams(struct snd_pcm_substream *substream, struct snd_soc_pcm_runtime *prtd; struct snd_soc_card *card; struct acp3x_platform_info *pinfo; + struct i2s_dev_data *adata; u32 val; - u32 reg_val; + u32 reg_val, frmt_reg; prtd = substream->private_data; rtd = substream->runtime->private_data; card = prtd->card; + adata = snd_soc_dai_get_drvdata(dai); pinfo = snd_soc_card_get_drvdata(card); if (pinfo) { if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) @@ -141,21 +114,30 @@ static int acp3x_i2s_hwparams(struct snd_pcm_substream *substream, switch (rtd->i2s_instance) { case I2S_BT_INSTANCE: reg_val = mmACP_BTTDM_ITER; + frmt_reg = mmACP_BTTDM_TXFRMT; break; case I2S_SP_INSTANCE: default: reg_val = mmACP_I2STDM_ITER; + frmt_reg = mmACP_I2STDM_TXFRMT; } } else { switch (rtd->i2s_instance) { case I2S_BT_INSTANCE: reg_val = mmACP_BTTDM_IRER; + frmt_reg = mmACP_BTTDM_RXFRMT; break; case I2S_SP_INSTANCE: default: reg_val = mmACP_I2STDM_IRER; + frmt_reg = mmACP_I2STDM_RXFRMT; } } + if (adata->tdm_mode) { + val = rv_readl(rtd->acp3x_base + reg_val); + rv_writel(val | 0x2, rtd->acp3x_base + reg_val); + rv_writel(adata->tdm_fmt, rtd->acp3x_base + frmt_reg); + } val = rv_readl(rtd->acp3x_base + reg_val); val = val | (rtd->xfer_resolution << 3); rv_writel(val, rtd->acp3x_base + reg_val); -- 2.7.4

2 1

Applied "ASoC: jz4740-i2s: Fix divider written at incorrect offset in register" to the asoc tree
by Mark Brown 09 Mar '20

09 Mar '20

The patch ASoC: jz4740-i2s: Fix divider written at incorrect offset in register has been applied to the asoc tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From 9401d5aa328e64617d87abd59af1c91cace4c3e4 Mon Sep 17 00:00:00 2001 From: Paul Cercueil <paul(a)crapouillou.net> Date: Fri, 6 Mar 2020 23:29:27 +0100 Subject: [PATCH] ASoC: jz4740-i2s: Fix divider written at incorrect offset in register The 4-bit divider value was written at offset 8, while the jz4740 programming manual locates it at offset 0. Fixes: 26b0aad80a86 ("ASoC: jz4740: Add dynamic sampling rate support to jz4740-i2s") Signed-off-by: Paul Cercueil <paul(a)crapouillou.net> Cc: stable(a)vger.kernel.org Link: https://lore.kernel.org/r/20200306222931.39664-2-paul@crapouillou.net Signed-off-by: Mark Brown <broonie(a)kernel.org> --- sound/soc/jz4740/jz4740-i2s.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/jz4740/jz4740-i2s.c b/sound/soc/jz4740/jz4740-i2s.c index 9d5405881209..434737b2b2b2 100644 --- a/sound/soc/jz4740/jz4740-i2s.c +++ b/sound/soc/jz4740/jz4740-i2s.c @@ -83,7 +83,7 @@ #define JZ_AIC_I2S_STATUS_BUSY BIT(2) #define JZ_AIC_CLK_DIV_MASK 0xf -#define I2SDIV_DV_SHIFT 8 +#define I2SDIV_DV_SHIFT 0 #define I2SDIV_DV_MASK (0xf << I2SDIV_DV_SHIFT) #define I2SDIV_IDV_SHIFT 8 #define I2SDIV_IDV_MASK (0xf << I2SDIV_IDV_SHIFT) -- 2.20.1

1 0

[PATCH Fix for Kingston HyperX Amp (0951:16d8) 0/1] snd-usb-audio: Fix Kingston HyperX Amp (0951:16d8).
by crwulff＠gmail.com 09 Mar '20

09 Mar '20

From: Chris Wulff <crwulff(a)gmail.com> The newer version of the HyperX Amp USB audio sound card appears to use two separate interfaces for controls and audio. This doesn't work well with the current linux kernel (tested with 5.4). Interface 0 has just a mute control, while interface 2 has mute and volume controls for both playback and capture. This appears to cause a couple different issues. The first is that the wrong interface is used to query most of the controls, resulting in lots of messages like this: usb 1-3: 12:0: cannot get min/max values for control 2 (id 12) The second problem is that since it is enumerated as two separate interfaces, the device gets registered and then the capture stream gets merged into the already-registered pcm device (which results in the udev events not being generated for the capture stream and no /dev/snd/pcmC#D#c file.) This patch fixes both those problems, and allows the device to be used with ALSA programs, but pulseaudio does not enumerate the capture device correctly since it is pcmC#D1c and there is no pcmC#D0c. Adding a symlink from pcmC#D0c -> pcmC#D1c fixes pulseaudio but I'm not sure exactly why pulseaudio can't find the device without it.

2 2

[PATCH] ALSA: line6: Fix endless MIDI read loop
by Takashi Iwai 09 Mar '20

09 Mar '20

The MIDI input event parser of the LINE6 driver may enter into an endless loop when the unexpected data sequence is given, as it tries to continue the secondary bytes without termination. Also, when the input data is too short, the parser returns a negative error, while the caller doesn't handle it properly. This would lead to the unexpected behavior as well. This patch addresses those issues by checking the return value correctly and handling the one-byte event in the parser properly. The bug was reported by syzkaller. Reported-by: syzbot+cce32521ee0a824c21f7(a)syzkaller.appspotmail.com Cc: <stable(a)vger.kernel.org> Link: https://lore.kernel.org/r/000000000000033087059f8f8fa3@google.com Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- sound/usb/line6/driver.c | 2 +- sound/usb/line6/midibuf.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/usb/line6/driver.c b/sound/usb/line6/driver.c index b5a3f754a4f1..4f096685ed65 100644 --- a/sound/usb/line6/driver.c +++ b/sound/usb/line6/driver.c @@ -305,7 +305,7 @@ static void line6_data_received(struct urb *urb) line6_midibuf_read(mb, line6->buffer_message, LINE6_MIDI_MESSAGE_MAXLEN); - if (done == 0) + if (done <= 0) break; line6->message_length = done; diff --git a/sound/usb/line6/midibuf.c b/sound/usb/line6/midibuf.c index 8d6eefa0d936..6a70463f82c4 100644 --- a/sound/usb/line6/midibuf.c +++ b/sound/usb/line6/midibuf.c @@ -159,7 +159,7 @@ int line6_midibuf_read(struct midi_buffer *this, unsigned char *data, int midi_length_prev = midibuf_message_length(this->command_prev); - if (midi_length_prev > 0) { + if (midi_length_prev > 1) { midi_length = midi_length_prev - 1; repeat = 1; } else -- 2.16.4

1 0

Re: BUG: soft lockup in sys_exit_group
by Andrey Konovalov 09 Mar '20

09 Mar '20

On Thu, Feb 27, 2020 at 3:30 PM syzbot <syzbot+cce32521ee0a824c21f7(a)syzkaller.appspotmail.com> wrote: > > Hello, > > syzbot found the following crash on: > > HEAD commit: d6ff8147 usb: gadget: add raw-gadget interface > git tree: https://github.com/google/kasan.git usb-fuzzer > console output: https://syzkaller.appspot.com/x/log.txt?x=147a92c3e00000 > kernel config: https://syzkaller.appspot.com/x/.config?x=90a3d9bed5648419 > dashboard link: https://syzkaller.appspot.com/bug?extid=cce32521ee0a824c21f7 > compiler: gcc (GCC) 9.0.0 20181231 (experimental) > syz repro: https://syzkaller.appspot.com/x/repro.syz?x=147f1d09e00000 > C reproducer: https://syzkaller.appspot.com/x/repro.c?x=17c88e45e00000 > > IMPORTANT: if you fix the bug, please add the following tag to the commit: > Reported-by: syzbot+cce32521ee0a824c21f7(a)syzkaller.appspotmail.com > > watchdog: BUG: soft lockup - CPU#0 stuck for 123s! [syz-executor413:1795] > Modules linked in: > irq event stamp: 35154 > hardirqs last enabled at (35153): [<ffffffff810047c1>] trace_hardirqs_on_thunk+0x1a/0x1c arch/x86/entry/thunk_64.S:41 > hardirqs last disabled at (35154): [<ffffffff810047dd>] trace_hardirqs_off_thunk+0x1a/0x1c arch/x86/entry/thunk_64.S:42 > softirqs last enabled at (33516): [<ffffffff85c00673>] __do_softirq+0x673/0x950 kernel/softirq.c:319 > softirqs last disabled at (33499): [<ffffffff811584b8>] invoke_softirq kernel/softirq.c:373 [inline] > softirqs last disabled at (33499): [<ffffffff811584b8>] irq_exit+0x178/0x1a0 kernel/softirq.c:413 > CPU: 0 PID: 1795 Comm: syz-executor413 Not tainted 5.6.0-rc3-syzkaller #0 > Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS Google 01/01/2011 > RIP: 0010:__read_once_size include/linux/compiler.h:199 [inline] > RIP: 0010:check_kcov_mode kernel/kcov.c:155 [inline] > RIP: 0010:write_comp_data+0x17/0x70 kernel/kcov.c:208 > Code: d0 76 07 48 89 34 d1 48 89 11 c3 0f 1f 84 00 00 00 00 00 65 4c 8b 04 25 00 0f 02 00 65 8b 05 78 b1 c2 7e a9 00 01 1f 00 75 51 <41> 8b 80 b0 12 00 00 83 f8 03 75 45 49 8b 80 b8 12 00 00 45 8b 80 > RSP: 0018:ffff8881cdf77a38 EFLAGS: 00000246 ORIG_RAX: ffffffffffffff13 > RAX: 0000000000000002 RBX: 0000000000000001 RCX: ffffffff8134f89f > RDX: 0000000000000001 RSI: 0000000000000000 RDI: 0000000000000005 > RBP: ffff8881cdf77b08 R08: ffff8881ce40b100 R09: 0000000000000000 > R10: 0000000000000000 R11: 0000000000000000 R12: 0000000000000000 > R13: 0000000000000000 R14: ffff8881ce5839c0 R15: ffff8881db233dc0 > FS: 0000000000000000(0000) GS:ffff8881db200000(0000) knlGS:0000000000000000 > CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 > CR2: 00007fe6518f0000 CR3: 0000000007021000 CR4: 00000000001406f0 > DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 > DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 > Call Trace: > csd_lock_wait kernel/smp.c:109 [inline] > smp_call_function_single+0x2df/0x3a0 kernel/smp.c:311 > smp_call_function_many_cond+0x25e/0x900 kernel/smp.c:439 > flush_tlb_others arch/x86/include/asm/paravirt.h:68 [inline] > flush_tlb_mm_range+0x1e8/0x3e0 arch/x86/mm/tlb.c:798 > tlb_flush arch/x86/include/asm/tlb.h:24 [inline] > tlb_flush_mmu_tlbonly include/asm-generic/tlb.h:424 [inline] > tlb_flush_mmu_tlbonly include/asm-generic/tlb.h:414 [inline] > tlb_flush_mmu+0x274/0x630 mm/mmu_gather.c:248 > tlb_finish_mmu+0x93/0x420 mm/mmu_gather.c:328 > exit_mmap+0x298/0x4d0 mm/mmap.c:3128 > __mmput kernel/fork.c:1082 [inline] > mmput+0xce/0x3d0 kernel/fork.c:1103 > exit_mm kernel/exit.c:485 [inline] > do_exit+0xaa0/0x2c50 kernel/exit.c:788 > do_group_exit+0x125/0x340 kernel/exit.c:899 > __do_sys_exit_group kernel/exit.c:910 [inline] > __se_sys_exit_group kernel/exit.c:908 [inline] > __x64_sys_exit_group+0x3a/0x50 kernel/exit.c:908 > do_syscall_64+0xb6/0x5a0 arch/x86/entry/common.c:294 > entry_SYSCALL_64_after_hwframe+0x49/0xbe > RIP: 0033:0x4436c8 > Code: Bad RIP value. > RSP: 002b:00007ffd45d85c48 EFLAGS: 00000246 ORIG_RAX: 00000000000000e7 > RAX: ffffffffffffffda RBX: 0000000000000000 RCX: 00000000004436c8 > RDX: 0000000000000000 RSI: 000000000000003c RDI: 0000000000000000 > RBP: 00000000004c3e28 R08: 00000000000000e7 R09: ffffffffffffffd0 > R10: 80603de77cf35948 R11: 0000000000000246 R12: 0000000000000001 > R13: 00000000006d7f20 R14: 0000000000000000 R15: 0000000000000000 > Sending NMI from CPU 0 to CPUs 1: > NMI backtrace for cpu 1 > CPU: 1 PID: 0 Comm: swapper/1 Not tainted 5.6.0-rc3-syzkaller #0 > Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS Google 01/01/2011 > RIP: 0010:line6_midibuf_read+0x486/0xa30 sound/usb/line6/midibuf.c:215 > Code: 08 48 01 c1 48 89 0c 24 e8 97 4f 85 fc 44 89 f6 89 df e8 7d 50 85 fc 44 39 f3 0f 8d b4 02 00 00 e8 7f 4f 85 fc 48 8b 74 24 18 <48> 63 d3 48 8b 3c 24 e8 fe d2 ad fc 01 5d 10 e8 66 4f 85 fc 31 ff > RSP: 0018:ffff8881db3099e8 EFLAGS: 00000006 > RAX: ffff8881da213100 RBX: 0000000000000000 RCX: ffffffff84ba0d63 > RDX: 0000000000000100 RSI: ffff8881cdc8c81c RDI: 0000000000000004 > RBP: ffff8881d4e6b4a0 R08: ffff8881da213100 R09: ffffed103a9cd641 > R10: ffffed103a9cd640 R11: ffff8881d4e6b200 R12: 0000000000000001 > R13: 000000000000001c R14: 00000000000003e4 R15: 0000000000000001 > FS: 0000000000000000(0000) GS:ffff8881db300000(0000) knlGS:0000000000000000 > CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 > CR2: 00007fe6518f0000 CR3: 00000001cf791000 CR4: 00000000001406e0 > DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 > DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 > Call Trace: > <IRQ> > line6_data_received+0x318/0x520 sound/usb/line6/driver.c:305 > __usb_hcd_giveback_urb+0x1f2/0x470 drivers/usb/core/hcd.c:1648 > usb_hcd_giveback_urb+0x368/0x420 drivers/usb/core/hcd.c:1713 > dummy_timer+0x1258/0x32ae drivers/usb/gadget/udc/dummy_hcd.c:1966 > call_timer_fn+0x195/0x6f0 kernel/time/timer.c:1404 > expire_timers kernel/time/timer.c:1449 [inline] > __run_timers kernel/time/timer.c:1773 [inline] > __run_timers kernel/time/timer.c:1740 [inline] > run_timer_softirq+0x5f9/0x1500 kernel/time/timer.c:1786 > __do_softirq+0x21e/0x950 kernel/softirq.c:292 > invoke_softirq kernel/softirq.c:373 [inline] > irq_exit+0x178/0x1a0 kernel/softirq.c:413 > exiting_irq arch/x86/include/asm/apic.h:546 [inline] > smp_apic_timer_interrupt+0x141/0x540 arch/x86/kernel/apic/apic.c:1146 > apic_timer_interrupt+0xf/0x20 arch/x86/entry/entry_64.S:829 > </IRQ> > RIP: 0010:default_idle+0x28/0x300 arch/x86/kernel/process.c:696 > Code: cc cc 41 56 41 55 65 44 8b 2d 94 c9 72 7a 41 54 55 53 0f 1f 44 00 00 e8 16 bb b5 fb e9 07 00 00 00 0f 00 2d 3a 5f 53 00 fb f4 <65> 44 8b 2d 70 c9 72 7a 0f 1f 44 00 00 5b 5d 41 5c 41 5d 41 5e c3 > RSP: 0018:ffff8881da22fda8 EFLAGS: 00000246 ORIG_RAX: ffffffffffffff13 > RAX: 0000000000000007 RBX: ffff8881da213100 RCX: 0000000000000000 > RDX: 0000000000000000 RSI: 0000000000000006 RDI: ffff8881da21394c > RBP: ffffed103b442620 R08: ffff8881da213100 R09: 0000000000000000 > R10: 0000000000000000 R11: 0000000000000000 R12: 0000000000000001 > R13: 0000000000000001 R14: ffffffff87e60000 R15: 0000000000000000 > cpuidle_idle_call kernel/sched/idle.c:154 [inline] > do_idle+0x3e0/0x500 kernel/sched/idle.c:269 > cpu_startup_entry+0x14/0x20 kernel/sched/idle.c:361 > start_secondary+0x2a4/0x390 arch/x86/kernel/smpboot.c:264 > secondary_startup_64+0xb6/0xc0 arch/x86/kernel/head_64.S:242 > > > --- > This bug is generated by a bot. It may contain errors. > See https://goo.gl/tpsmEJ for more information about syzbot. > syzbot engineers can be reached at syzkaller(a)googlegroups.com. > > syzbot will keep track of this bug report. See: > https://goo.gl/tpsmEJ#status for how to communicate with syzbot. > syzbot can test patches for this bug, for details see: > https://goo.gl/tpsmEJ#testing-patches +line6 maintainers

2 1

increase soundcard max number upper than 32, kernel ok, but alsa-lib and alsa-utils no.
by Olivier SCHMITT 08 Mar '20

08 Mar '20

Hello dear Alsa dev team members, I try to increase alsa max number of cards in default 32 to 256 for use more than 32 loopback sound card for signal processing. I have compile my kernel and also déclare in /etc/modprobe.d/alsa-base.conf more than id max value in default 31 i get a 32 it seam to work: ls /proc/asound/ card10 card12 card14 card16 card18 card20 card22 card24 card26 card28 card30 *card32 *devices lp1 lp11 lp13 lp15 lp17 lp19 lp20 *lp22 *lp4 lp6 lp8 modules pcm timers card11 card13 card15 card17 card19 card21 card23 card25 card27 card29 card31 cards lp0 lp10 lp12 lp14 lp16 lp18 lp2 lp21 lp3 lp5 lp7 lp9 oss seq version I have compile alsa-libs and alsa utils as: sudo mkdir /usr/src/alsa cd /usr/src/alsa git clone git://git.alsa-project.org/alsa-lib.git alsa-lib cd /usr/src/alsa/alsa-lib ./gitcompile --with-max-cards=256 make install git clone git://git.alsa-project.org/alsa-utils.git alsa-utils cd /usr/src/alsa/alsa-utils ./gitcompile --with-max-cards=256 make install but when i try to use aplay or speakertest with -D hw:32,0 i get: ALSA lib pcm_hw.c:1713:(_snd_pcm_hw_open) Invalid value for card Erreur d'ouverture à la lecture: -22,Invalid argument Maybe i have forgot something? Thanks in advance for reply :-)

1 0

KASAN: slab-out-of-bounds Read in resample_shrink
by syzbot 08 Mar '20

08 Mar '20

Hello, syzbot found the following crash on: HEAD commit: 63623fd4 Merge tag 'for-linus' of git://git.kernel.org/pub.. git tree: upstream console output: https://syzkaller.appspot.com/x/log.txt?x=110662f9e00000 kernel config: https://syzkaller.appspot.com/x/.config?x=5d2e033af114153f dashboard link: https://syzkaller.appspot.com/bug?extid=e1fe9f44fb8ecf4fb5dd compiler: clang version 10.0.0 (https://github.com/llvm/llvm-project/ c2443155a0fb245c8f17f2c1c72b6ea391e86e81) syz repro: https://syzkaller.appspot.com/x/repro.syz?x=160e2e91e00000 C reproducer: https://syzkaller.appspot.com/x/repro.c?x=125f09fde00000 IMPORTANT: if you fix the bug, please add the following tag to the commit: Reported-by: syzbot+e1fe9f44fb8ecf4fb5dd(a)syzkaller.appspotmail.com ================================================================== BUG: KASAN: slab-out-of-bounds in resample_shrink+0x4cd/0x820 sound/core/oss/rate.c:160 Read of size 2 at addr ffff8880940b8a00 by task syz-executor858/9001 CPU: 0 PID: 9001 Comm: syz-executor858 Not tainted 5.6.0-rc3-syzkaller #0 Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS Google 01/01/2011 Call Trace: __dump_stack lib/dump_stack.c:77 [inline] dump_stack+0x1fb/0x318 lib/dump_stack.c:118 print_address_description+0x74/0x5c0 mm/kasan/report.c:374 __kasan_report+0x149/0x1c0 mm/kasan/report.c:506 kasan_report+0x26/0x50 mm/kasan/common.c:641 __asan_report_load2_noabort+0x14/0x20 mm/kasan/generic_report.c:133 resample_shrink+0x4cd/0x820 sound/core/oss/rate.c:160 rate_transfer+0x51c/0x620 sound/core/oss/rate.c:279 snd_pcm_plug_read_transfer+0x1cc/0x270 sound/core/oss/pcm_plugin.c:651 snd_pcm_oss_read2 sound/core/oss/pcm_oss.c:1460 [inline] snd_pcm_oss_read1 sound/core/oss/pcm_oss.c:1517 [inline] snd_pcm_oss_read+0x7a6/0xd70 sound/core/oss/pcm_oss.c:2741 do_loop_readv_writev fs/read_write.c:714 [inline] do_iter_read+0x4a2/0x5b0 fs/read_write.c:935 vfs_readv fs/read_write.c:1053 [inline] do_readv+0x18c/0x330 fs/read_write.c:1090 __do_sys_readv fs/read_write.c:1181 [inline] __se_sys_readv fs/read_write.c:1178 [inline] __x64_sys_readv+0x7d/0x90 fs/read_write.c:1178 do_syscall_64+0xf7/0x1c0 arch/x86/entry/common.c:294 entry_SYSCALL_64_after_hwframe+0x49/0xbe RIP: 0033:0x4467e9 Code: e8 0c e8 ff ff 48 83 c4 18 c3 0f 1f 80 00 00 00 00 48 89 f8 48 89 f7 48 89 d6 48 89 ca 4d 89 c2 4d 89 c8 4c 8b 4c 24 08 0f 05 <48> 3d 01 f0 ff ff 0f 83 5b 07 fc ff c3 66 2e 0f 1f 84 00 00 00 00 RSP: 002b:00007fe8f541ddb8 EFLAGS: 00000246 ORIG_RAX: 0000000000000013 RAX: ffffffffffffffda RBX: 00000000006dbc28 RCX: 00000000004467e9 RDX: 0000000000000001 RSI: 0000000020395000 RDI: 0000000000000003 RBP: 00000000006dbc20 R08: 0000000000000000 R09: 0000000000000000 R10: 0000000000000000 R11: 0000000000000246 R12: 00000000006dbc2c R13: 00007ffdbf15dd2f R14: 00007fe8f541e9c0 R15: 000000000000002d Allocated by task 9001: save_stack mm/kasan/common.c:72 [inline] set_track mm/kasan/common.c:80 [inline] __kasan_kmalloc+0x118/0x1c0 mm/kasan/common.c:515 kasan_kmalloc+0x9/0x10 mm/kasan/common.c:529 __do_kmalloc_node mm/slab.c:3616 [inline] __kmalloc_node+0x4d/0x60 mm/slab.c:3623 kmalloc_node include/linux/slab.h:578 [inline] kvmalloc_node+0x85/0x110 mm/util.c:574 kvmalloc include/linux/mm.h:645 [inline] kvzalloc include/linux/mm.h:653 [inline] snd_pcm_plugin_alloc+0x167/0x760 sound/core/oss/pcm_plugin.c:70 snd_pcm_plug_alloc+0x193/0x2e0 sound/core/oss/pcm_plugin.c:129 snd_pcm_oss_change_params_locked+0x2b34/0x4350 sound/core/oss/pcm_oss.c:1024 snd_pcm_oss_change_params sound/core/oss/pcm_oss.c:1087 [inline] snd_pcm_oss_get_active_substream+0x22c/0x2a0 sound/core/oss/pcm_oss.c:1104 snd_pcm_oss_get_rate sound/core/oss/pcm_oss.c:1754 [inline] snd_pcm_oss_set_rate sound/core/oss/pcm_oss.c:1746 [inline] snd_pcm_oss_ioctl+0x1d66/0x4600 sound/core/oss/pcm_oss.c:2593 vfs_ioctl fs/ioctl.c:47 [inline] ksys_ioctl fs/ioctl.c:763 [inline] __do_sys_ioctl fs/ioctl.c:772 [inline] __se_sys_ioctl+0x113/0x190 fs/ioctl.c:770 __x64_sys_ioctl+0x7b/0x90 fs/ioctl.c:770 do_syscall_64+0xf7/0x1c0 arch/x86/entry/common.c:294 entry_SYSCALL_64_after_hwframe+0x49/0xbe Freed by task 8498: save_stack mm/kasan/common.c:72 [inline] set_track mm/kasan/common.c:80 [inline] kasan_set_free_info mm/kasan/common.c:337 [inline] __kasan_slab_free+0x12e/0x1e0 mm/kasan/common.c:476 kasan_slab_free+0xe/0x10 mm/kasan/common.c:485 __cache_free mm/slab.c:3426 [inline] kfree+0x10d/0x220 mm/slab.c:3757 load_elf_binary+0x2c73/0x3440 fs/binfmt_elf.c:1086 search_binary_handler+0x190/0x5e0 fs/exec.c:1662 exec_binprm fs/exec.c:1705 [inline] __do_execve_file+0x153b/0x1ca0 fs/exec.c:1825 do_execveat_common fs/exec.c:1871 [inline] do_execve fs/exec.c:1888 [inline] __do_sys_execve fs/exec.c:1964 [inline] __se_sys_execve fs/exec.c:1959 [inline] __x64_sys_execve+0x94/0xb0 fs/exec.c:1959 do_syscall_64+0xf7/0x1c0 arch/x86/entry/common.c:294 entry_SYSCALL_64_after_hwframe+0x49/0xbe The buggy address belongs to the object at ffff8880940b8800 which belongs to the cache kmalloc-512 of size 512 The buggy address is located 0 bytes to the right of 512-byte region [ffff8880940b8800, ffff8880940b8a00) The buggy address belongs to the page: page:ffffea0002502e00 refcount:1 mapcount:0 mapping:ffff8880aa400a80 index:0x0 flags: 0xfffe0000000200(slab) raw: 00fffe0000000200 ffffea0002787a08 ffffea00024147c8 ffff8880aa400a80 raw: 0000000000000000 ffff8880940b8000 0000000100000004 0000000000000000 page dumped because: kasan: bad access detected Memory state around the buggy address: ffff8880940b8900: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ffff8880940b8980: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >ffff8880940b8a00: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc ^ ffff8880940b8a80: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc ffff8880940b8b00: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc ================================================================== --- This bug is generated by a bot. It may contain errors. See https://goo.gl/tpsmEJ for more information about syzbot. syzbot engineers can be reached at syzkaller(a)googlegroups.com. syzbot will keep track of this bug report. See: https://goo.gl/tpsmEJ#status for how to communicate with syzbot. syzbot can test patches for this bug, for details see: https://goo.gl/tpsmEJ#testing-patches

1 1

[RFC PATCH 0/1] Use native gpiolib inversion for jack gpios
by Tobias Schramm 08 Mar '20

08 Mar '20

This patch changes the logic used for jack gpio state inversion to utilize gpiolib inversion. Previously the gpio active state would not correspond to the plugged-in state of the jack. Since the active state of a gpio is usually defined by its purpose in a specific application I'd expect the active state to represent the jacks plug status. However, judging by the users [1], [2] of snd_soc_jack_add_gpiods the ACPI tables of some devices seem to indicate the "wrong" polarity for their jack detect gpios. I'm not entirely sure how to deal with those devices. At the moment I'd vote for inverting the gpio active level again (via gpiod_toggle_active_low) inside snd_soc_jack_add_gpios if gpio->gpiod_dev != NULL and gpio->invert is set. I'm not entirely sure about [3] either. In my opinion removing invert = 1 from ams_delta_hook_switch_gpios and adding GPIO_ACTIVE_LOW to the flags of hook_switch in [4] would be the right move here. What are your thoughts on this? Best regards, Tobias [1] /sound/soc/intel/boards/byt-max98090.c [2] /sound/soc/intel/boards/cht_bsw_max98090_ti.c [3] /sound/soc/ti/ams-delta.c [4] /arch/arm/mach-omap1/board-ams-delta.c Tobias Schramm (1): ASoC: jack: use gpiolib inversion flag for inverted gpios sound/soc/soc-jack.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) -- 2.24.1

1 1

alsa-utils compilation error checking for snd_tplg_new in -latopology... no,configure: error: No linkable libatopology was found.
by Olivier SCHMITT 08 Mar '20

08 Mar '20

Hello dear dev team members, I just try to compile all for my ubuntu 18.04 to run more than 32 loopback. I have found something about to : -compile kernel with kconfig CONFIG_SND_MAX_CARDS=256 -compile alsa-drivers, alsa-lib, alsa-utils with gitcompile --with-max-cards=256 but when i try to compile alsa-utils i get: checking for dlopen in -ldl... yes checking for ALSA LDFLAGS... -lasound -lm -ldl -lpthread checking required libasound headers version... 1.0.27 checking for libasound headers version >= 1.0.27 (1.0.27)... found. checking for libatopology (sound headers version > 1.1.9)... yes checking for snd_ctl_open in -lasound... yes checking for snd_tplg_new in -latopology... no configure: error: No linkable libatopology was found. Can you help me? I dont found anything about this error on the web...

1 0

alsaucm could not open configuration
by GitHub issues - opened 08 Mar '20

08 Mar '20

alsa-project/alsa-ucm-conf issue #16 was opened from nicolasfella: When I run `alsaucm listcards` on my system I get: ``` ALSA lib utils.c:261:(uc_mgr_config_load) could not open configuration file /usr/share/alsa/ucm2/HDA-Intel/HDA-Intel.conf alsaucm: error failed to get card list: No such file or directory ``` happ My audio card is a `HDA Intel PCH` Issue URL : https://github.com/alsa-project/alsa-ucm-conf/issues/16 Repository URL: https://github.com/alsa-project/alsa-ucm-conf

1 0

How to make ALSA relocatable in the filesystem?
by GitHub issues - edited 07 Mar '20

07 Mar '20

alsa-project/alsa-lib issue #34 was edited from probonopd: We want to bundle a private copy of ALSA with our application, so that the ALSA from the Linux distribution is not used at all. Yet it seems ALSA is relying on some absolute paths compiled in with no clear way to pass in a different location for ALSA at runtime. How to do this? Use case: As an application developer, I want to ship my application together with all dependencies. This bundle is using musl libc, ships its own musl libc and runtime, and it is intended to also run on glibc-based systems. Reference: https://github.com/mumble-voip/mumble/issues/3959#issuecomment-596095335 Issue URL : https://github.com/alsa-project/alsa-lib/issues/34 Repository URL: https://github.com/alsa-project/alsa-lib

1 0

How to make ALSA relocatable in the filesystem?
by GitHub issues - opened 07 Mar '20

07 Mar '20

alsa-project/alsa-lib issue #34 was opened from probonopd: We want to bundle a private copy of ALSA with our application, so that the ALSA from the Linux distribution is not used at all. Yet it seems ALSA is relying on some absolute paths compiled in with no clear way to pass in a different location for ALSA at runtime. How to do this? Reference: https://github.com/mumble-voip/mumble/issues/3959#issuecomment-596095335 Issue URL : https://github.com/alsa-project/alsa-lib/issues/34 Repository URL: https://github.com/alsa-project/alsa-lib

1 0

[GIT PULL] ASoC fixes for v5.6
by Mark Brown 07 Mar '20

07 Mar '20

The following changes since commit 96781fd941b39e1f78098009344ebcd7af861c67: ASoC: sun8i-codec: Fix setting DAI data format (2020-02-17 21:58:41 +0000) are available in the Git repository at: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git tags/asoc-fix-v5.6-rc4 for you to fetch changes up to 3fb83cbee1de58fcd5d22f1db89460bb7c08b6e8: ASoC: wm8741: Fix typo in Kconfig prompt (2020-03-05 12:53:51 +0000) ---------------------------------------------------------------- ASoC: Fixes for v5.6 More fixes that have arrived since the merge window, spread out all over. There's a few things like the operation callback addition for rt1015 and the meson reset addition which add small new bits of functionality to fix non-working systems, they're all very small and for parts of newly added functionality. ---------------------------------------------------------------- Amadeusz Sławiński (1): ASoC: Intel: Skylake: Fix available clock counter incrementation Axel Lin (1): ASoC: wm8741: Fix typo in Kconfig prompt Charles Keepax (1): ASoC: dapm: Correct DAPM handling of active widgets during shutdown Dan Carpenter (1): ASoC: SOF: Fix snd_sof_ipc_stream_posn() Dan Murphy (2): ASoC: tas2562: Return invalid for when bitwidth is invalid ASoC: tas2562: Fix sample rate error message Dragos Tarcatu (2): ASoC: topology: Fix memleak in soc_tplg_link_elems_load() ASoC: topology: Fix memleak in soc_tplg_manifest_load() Jack Yu (2): ASoC: rt1015: add operation callback function for rt1015_dai[] ASoC: rt1015: modify pre-divider for sysclk Jerome Brunet (1): ASoC: meson: g12a: add tohdmitx reset Kuninori Morimoto (2): ASoC: soc-pcm/soc-compress: don't use snd_soc_dapm_stream_stop() ASoC: soc-component: tidyup snd_soc_pcm_component_sync_stop() Matthias Reichl (1): ASoC: pcm512x: Fix unbalanced regulator enable call in probe error path Olivier Moysan (1): ASoC: stm32: sai: manage rebind issue Pierre-Louis Bossart (1): ASoC: soc-core: fix for_rtd_codec_dai_rollback() macro Takashi Iwai (3): ASoC: intel: skl: Fix pin debug prints ASoC: intel: skl: Fix possible buffer overflow in debug outputs ASoC: pcm: Fix possible buffer overflow in dpcm state sysfs output include/sound/soc.h | 2 +- sound/soc/codecs/Kconfig | 2 +- sound/soc/codecs/pcm512x.c | 8 +++++--- sound/soc/codecs/rt1015.c | 3 ++- sound/soc/codecs/tas2562.c | 5 +++-- sound/soc/intel/skylake/skl-debug.c | 32 +++++++++++++++++--------------- sound/soc/intel/skylake/skl-ssp-clk.c | 4 +++- sound/soc/meson/g12a-tohdmitx.c | 6 ++++++ sound/soc/soc-component.c | 2 +- sound/soc/soc-compress.c | 2 +- sound/soc/soc-dapm.c | 2 +- sound/soc/soc-pcm.c | 18 +++++++++--------- sound/soc/soc-topology.c | 17 ++++++++++------- sound/soc/sof/ipc.c | 2 +- sound/soc/stm/stm32_sai_sub.c | 18 ++++++++++-------- 15 files changed, 71 insertions(+), 52 deletions(-)

2 1

[alsa-devel] [PATCH alsa-ucm-conf] bytcht-es8316: Fix missing including of HeadPhones.conf after ucm2 conversion
by Hans de Goede 07 Mar '20

07 Mar '20

The conversion to ucm2 format missed adding an include for: codecs/es8316/HeadPhones.conf Leading to no sound on the headphones output, this commit adds the missing include fixing this. Cc: youling 257 <youling257(a)gmail.com> Reported-by: youling 257 <youling257(a)gmail.com> Signed-off-by: Hans de Goede <hdegoede(a)redhat.com> --- ucm2/bytcht-es8316/HiFi-Components.conf | 2 ++ ucm2/bytcht-es8316/HiFi-LongName.conf | 2 ++ 2 files changed, 4 insertions(+) diff --git a/ucm2/bytcht-es8316/HiFi-Components.conf b/ucm2/bytcht-es8316/HiFi-Components.conf index 314d355..c40bd49 100644 --- a/ucm2/bytcht-es8316/HiFi-Components.conf +++ b/ucm2/bytcht-es8316/HiFi-Components.conf @@ -20,6 +20,8 @@ If.mono { } } +<codecs/es8316/HeadPhones.conf> + If.in1 { Condition { Type String diff --git a/ucm2/bytcht-es8316/HiFi-LongName.conf b/ucm2/bytcht-es8316/HiFi-LongName.conf index ea7d1c3..03cf17b 100644 --- a/ucm2/bytcht-es8316/HiFi-LongName.conf +++ b/ucm2/bytcht-es8316/HiFi-LongName.conf @@ -20,6 +20,8 @@ If.mono { } } +<codecs/es8316/HeadPhones.conf> + If.in1 { Condition { Type String -- 2.24.1

3 3

[PATCH v4 0/8] ASoC: Add new module driver for new ASRC
by Shengjiu Wang 07 Mar '20

07 Mar '20

Add new module driver for new ASRC in i.MX8MN, several commits are added for change DT binding asrc-width to asrc-format Shengjiu Wang (8): ASoC: dt-bindings: fsl_asrc: Change asrc-width to asrc-format ARM: dts: imx6qdl: Change asrc-width to asrc-format ASoC: fsl-asoc-card: Change asrc-width to asrc-format ASoC: fsl_asrc: Change asrc_width to asrc_format ASoC: fsl_asrc: rename asrc_priv to asrc ASoC: fsl_asrc: Move common definition to fsl_asrc_common ASoC: dt-bindings: fsl_easrc: Add document for EASRC ASoC: fsl_easrc: Add EASRC ASoC CPU DAI and platform drivers changes in v4 - Add several commit for changing DT binding asrc-width to asrc-format - rename asrc_priv to asrc changes in v3 - add new commit "ASoC: fsl_asrc: Change asrc_width to asrc_format" - modify binding doc to yaml format - remove fsl_easrc_dma.c, make fsl_asrc_dma.c useable for easrc. changes in v2 - change i.MX815 to i.MX8MN - Add changes in Kconfig and Makefile .../devicetree/bindings/sound/fsl,asrc.txt | 4 +- .../devicetree/bindings/sound/fsl,easrc.yaml | 96 + arch/arm/boot/dts/imx6qdl.dtsi | 2 +- sound/soc/fsl/Kconfig | 11 + sound/soc/fsl/Makefile | 2 + sound/soc/fsl/fsl-asoc-card.c | 9 +- sound/soc/fsl/fsl_asrc.c | 282 +-- sound/soc/fsl/fsl_asrc.h | 74 +- sound/soc/fsl/fsl_asrc_common.h | 105 + sound/soc/fsl/fsl_asrc_dma.c | 54 +- sound/soc/fsl/fsl_easrc.c | 2111 +++++++++++++++++ sound/soc/fsl/fsl_easrc.h | 651 +++++ 12 files changed, 3169 insertions(+), 232 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/fsl,easrc.yaml create mode 100644 sound/soc/fsl/fsl_asrc_common.h create mode 100644 sound/soc/fsl/fsl_easrc.c create mode 100644 sound/soc/fsl/fsl_easrc.h -- 2.21.0

5 14

[PATCH] ASoC: wcd9335: fix address map representation
by Srinivas Kandagatla 06 Mar '20

06 Mar '20

slimbus addresses are 16 bit wide, masking page numbers to wcd register at offset of 12 will limit the number for pages. So it becomes impossible to write to page 0x10 registers. Remove masking 0x800 (slimbus address range) from register address and making use of window parameters in regmap config should fix it and also will represent the registers exactly inline with Datasheet. Remove this unnessary masking and make the registers be inline with datasheet. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla(a)linaro.org> --- sound/soc/codecs/wcd9335.c | 18 +++++++++--------- sound/soc/codecs/wcd9335.h | 7 ++++--- 2 files changed, 13 insertions(+), 12 deletions(-) diff --git a/sound/soc/codecs/wcd9335.c b/sound/soc/codecs/wcd9335.c index f11ffa28683b..700cc1212770 100644 --- a/sound/soc/codecs/wcd9335.c +++ b/sound/soc/codecs/wcd9335.c @@ -4926,11 +4926,11 @@ static const struct regmap_range_cfg wcd9335_ranges[] = { .name = "WCD9335", .range_min = 0x0, .range_max = WCD9335_MAX_REGISTER, - .selector_reg = WCD9335_REG(0x0, 0), + .selector_reg = WCD9335_SEL_REGISTER, .selector_mask = 0xff, .selector_shift = 0, - .window_start = 0x0, - .window_len = 0x1000, + .window_start = 0x800, + .window_len = 0x100, }, }; @@ -4968,12 +4968,12 @@ static const struct regmap_range_cfg wcd9335_ifc_ranges[] = { { .name = "WCD9335-IFC-DEV", .range_min = 0x0, - .range_max = WCD9335_REG(0, 0x7ff), - .selector_reg = WCD9335_REG(0, 0x0), - .selector_mask = 0xff, + .range_max = WCD9335_MAX_REGISTER, + .selector_reg = WCD9335_SEL_REGISTER, + .selector_mask = 0xfff, .selector_shift = 0, - .window_start = 0x0, - .window_len = 0x1000, + .window_start = 0x800, + .window_len = 0x400, }, }; @@ -4981,7 +4981,7 @@ static struct regmap_config wcd9335_ifc_regmap_config = { .reg_bits = 16, .val_bits = 8, .can_multi_write = true, - .max_register = WCD9335_REG(0, 0x7FF), + .max_register = WCD9335_MAX_REGISTER, .ranges = wcd9335_ifc_ranges, .num_ranges = ARRAY_SIZE(wcd9335_ifc_ranges), }; diff --git a/sound/soc/codecs/wcd9335.h b/sound/soc/codecs/wcd9335.h index 4d9be2496c30..72060824c743 100644 --- a/sound/soc/codecs/wcd9335.h +++ b/sound/soc/codecs/wcd9335.h @@ -8,9 +8,9 @@ * in slimbus mode the reg base starts from 0x800 * in i2s/i2c mode the reg base is 0x0 */ -#define WCD9335_REG(pg, r) ((pg << 12) | (r) | 0x800) +#define WCD9335_REG(pg, r) ((pg << 8) | (r)) #define WCD9335_REG_OFFSET(r) (r & 0xFF) -#define WCD9335_PAGE_OFFSET(r) ((r >> 12) & 0xFF) +#define WCD9335_PAGE_OFFSET(r) ((r >> 8) & 0xFF) /* Page-0 Registers */ #define WCD9335_PAGE0_PAGE_REGISTER WCD9335_REG(0x00, 0x000) @@ -600,7 +600,8 @@ #define WCD9335_CDC_CLK_RST_CTRL_FS_CNT_ENABLE BIT(0) #define WCD9335_CDC_CLK_RST_CTRL_FS_CNT_DISABLE 0 #define WCD9335_CDC_TOP_TOP_CFG1 WCD9335_REG(0x0d, 0x082) -#define WCD9335_MAX_REGISTER WCD9335_REG(0x80, 0x0FF) +#define WCD9335_MAX_REGISTER 0xffff +#define WCD9335_SEL_REGISTER 0x800 /* SLIMBUS Slave Registers */ #define WCD9335_SLIM_PGD_PORT_INT_EN0 WCD9335_REG(0, 0x30) -- 2.21.0

2 1

[PATCH 0/2] ASoC: wcd934x: minor fixes
by Srinivas Kandagatla 06 Mar '20

06 Mar '20

This patchset has 1 fix and a header cleanup found during recent testing. Srinivas Kandagatla (2): ASoC: wcd934x: fix High Accuracy Buck enable ASoC: wcd934x: remove unused headers sound/soc/codecs/wcd934x.c | 14 +++++--------- 1 file changed, 5 insertions(+), 9 deletions(-) -- 2.21.0

2 4

Applied "ALSA: pcm: Add a standalone version of snd_pcm_limit_hw_rates" to the asoc tree
by Mark Brown 06 Mar '20

06 Mar '20

The patch ALSA: pcm: Add a standalone version of snd_pcm_limit_hw_rates has been applied to the asoc tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From 4769bfb9dada678b31a2ec275372624dbfeed9d1 Mon Sep 17 00:00:00 2001 From: Samuel Holland <samuel(a)sholland.org> Date: Wed, 4 Mar 2020 23:11:41 -0600 Subject: [PATCH] ALSA: pcm: Add a standalone version of snd_pcm_limit_hw_rates It can be useful to derive min/max rates of a snd_pcm_hardware without having a snd_pcm_runtime, such as before constructing an ASoC DAI link. Create a new helper that takes a pointer to a snd_pcm_hardware directly, and refactor the original function as a wrapper around it, to avoid needing to update any call sites. Signed-off-by: Samuel Holland <samuel(a)sholland.org> Reviewed-by: Takashi Iwai <tiwai(a)suse.de> Link: https://lore.kernel.org/r/20200305051143.60691-2-samuel@sholland.org Signed-off-by: Mark Brown <broonie(a)kernel.org> --- include/sound/pcm.h | 9 ++++++++- sound/core/pcm_misc.c | 18 +++++++++--------- 2 files changed, 17 insertions(+), 10 deletions(-) diff --git a/include/sound/pcm.h b/include/sound/pcm.h index 2628246b76fa..f7a95b711100 100644 --- a/include/sound/pcm.h +++ b/include/sound/pcm.h @@ -1127,7 +1127,14 @@ snd_pcm_kernel_readv(struct snd_pcm_substream *substream, return __snd_pcm_lib_xfer(substream, bufs, false, frames, true); } -int snd_pcm_limit_hw_rates(struct snd_pcm_runtime *runtime); +int snd_pcm_hw_limit_rates(struct snd_pcm_hardware *hw); + +static inline int +snd_pcm_limit_hw_rates(struct snd_pcm_runtime *runtime) +{ + return snd_pcm_hw_limit_rates(&runtime->hw); +} + unsigned int snd_pcm_rate_to_rate_bit(unsigned int rate); unsigned int snd_pcm_rate_bit_to_rate(unsigned int rate_bit); unsigned int snd_pcm_rate_mask_intersect(unsigned int rates_a, diff --git a/sound/core/pcm_misc.c b/sound/core/pcm_misc.c index a6a541511534..5dd2e5335900 100644 --- a/sound/core/pcm_misc.c +++ b/sound/core/pcm_misc.c @@ -474,32 +474,32 @@ int snd_pcm_format_set_silence(snd_pcm_format_t format, void *data, unsigned int EXPORT_SYMBOL(snd_pcm_format_set_silence); /** - * snd_pcm_limit_hw_rates - determine rate_min/rate_max fields - * @runtime: the runtime instance + * snd_pcm_hw_limit_rates - determine rate_min/rate_max fields + * @hw: the pcm hw instance * * Determines the rate_min and rate_max fields from the rates bits of - * the given runtime->hw. + * the given hw. * * Return: Zero if successful. */ -int snd_pcm_limit_hw_rates(struct snd_pcm_runtime *runtime) +int snd_pcm_hw_limit_rates(struct snd_pcm_hardware *hw) { int i; for (i = 0; i < (int)snd_pcm_known_rates.count; i++) { - if (runtime->hw.rates & (1 << i)) { - runtime->hw.rate_min = snd_pcm_known_rates.list[i]; + if (hw->rates & (1 << i)) { + hw->rate_min = snd_pcm_known_rates.list[i]; break; } } for (i = (int)snd_pcm_known_rates.count - 1; i >= 0; i--) { - if (runtime->hw.rates & (1 << i)) { - runtime->hw.rate_max = snd_pcm_known_rates.list[i]; + if (hw->rates & (1 << i)) { + hw->rate_max = snd_pcm_known_rates.list[i]; break; } } return 0; } -EXPORT_SYMBOL(snd_pcm_limit_hw_rates); +EXPORT_SYMBOL(snd_pcm_hw_limit_rates); /** * snd_pcm_rate_to_rate_bit - converts sample rate to SNDRV_PCM_RATE_xxx bit -- 2.20.1

1 0

Applied "ASoC: pcm: Export parameter intersection logic" to the asoc tree
by Mark Brown 06 Mar '20

06 Mar '20

The patch ASoC: pcm: Export parameter intersection logic has been applied to the asoc tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From 5854a46486ad5b8d73766735fb0d77f05956b22c Mon Sep 17 00:00:00 2001 From: Samuel Holland <samuel(a)sholland.org> Date: Wed, 4 Mar 2020 23:11:42 -0600 Subject: [PATCH] ASoC: pcm: Export parameter intersection logic The logic to calculate the subset of stream parameters supported by all DAIs associated with a PCM stream is nontrivial. Export a helper function so it can be used to set up simple codec2codec DAI links. Signed-off-by: Samuel Holland <samuel(a)sholland.org> Link: https://lore.kernel.org/r/20200305051143.60691-3-samuel@sholland.org Signed-off-by: Mark Brown <broonie(a)kernel.org> --- include/sound/soc.h | 3 +++ sound/soc/soc-pcm.c | 56 ++++++++++++++++++++++++++++++--------------- 2 files changed, 41 insertions(+), 18 deletions(-) diff --git a/include/sound/soc.h b/include/sound/soc.h index 81e5d17be935..9543d9246ca4 100644 --- a/include/sound/soc.h +++ b/include/sound/soc.h @@ -471,6 +471,9 @@ bool snd_soc_runtime_ignore_pmdown_time(struct snd_soc_pcm_runtime *rtd); void snd_soc_runtime_activate(struct snd_soc_pcm_runtime *rtd, int stream); void snd_soc_runtime_deactivate(struct snd_soc_pcm_runtime *rtd, int stream); +int snd_soc_runtime_calc_hw(struct snd_soc_pcm_runtime *rtd, + struct snd_pcm_hardware *hw, int stream); + int snd_soc_runtime_set_dai_fmt(struct snd_soc_pcm_runtime *rtd, unsigned int dai_fmt); diff --git a/sound/soc/soc-pcm.c b/sound/soc/soc-pcm.c index e3a2c4f7757b..de4226357e2b 100644 --- a/sound/soc/soc-pcm.c +++ b/sound/soc/soc-pcm.c @@ -587,11 +587,18 @@ static void soc_pcm_apply_msb(struct snd_pcm_substream *substream) soc_pcm_set_msb(substream, cpu_bits); } -static void soc_pcm_init_runtime_hw(struct snd_pcm_substream *substream) +/** + * snd_soc_runtime_calc_hw() - Calculate hw limits for a PCM stream + * @rtd: ASoC PCM runtime + * @hw: PCM hardware parameters (output) + * @stream: Direction of the PCM stream + * + * Calculates the subset of stream parameters supported by all DAIs + * associated with the PCM stream. + */ +int snd_soc_runtime_calc_hw(struct snd_soc_pcm_runtime *rtd, + struct snd_pcm_hardware *hw, int stream) { - struct snd_pcm_runtime *runtime = substream->runtime; - struct snd_pcm_hardware *hw = &runtime->hw; - struct snd_soc_pcm_runtime *rtd = substream->private_data; struct snd_soc_dai *codec_dai; struct snd_soc_dai *cpu_dai; struct snd_soc_pcm_stream *codec_stream; @@ -602,7 +609,6 @@ static void soc_pcm_init_runtime_hw(struct snd_pcm_substream *substream) unsigned int cpu_rate_min = 0, cpu_rate_max = UINT_MAX; unsigned int rates = UINT_MAX, cpu_rates = UINT_MAX; u64 formats = ULLONG_MAX; - int stream = substream->stream; int i; /* first calculate min/max only for CPUs in the DAI link */ @@ -613,12 +619,8 @@ static void soc_pcm_init_runtime_hw(struct snd_pcm_substream *substream) * Otherwise, since the rate, channel, and format values will * zero in that case, we would have no usable settings left, * causing the resulting setup to fail. - * At least one CPU should match, otherwise we should have - * bailed out on a higher level, since there would be no - * CPU to support the transfer direction in that case. */ - if (!snd_soc_dai_stream_valid(cpu_dai, - substream->stream)) + if (!snd_soc_dai_stream_valid(cpu_dai, stream)) continue; cpu_stream = snd_soc_dai_get_pcm_stream(cpu_dai, stream); @@ -640,9 +642,6 @@ static void soc_pcm_init_runtime_hw(struct snd_pcm_substream *substream) * Otherwise, since the rate, channel, and format values will * zero in that case, we would have no usable settings left, * causing the resulting setup to fail. - * At least one CODEC should match, otherwise we should have - * bailed out on a higher level, since there would be no - * CODEC to support the transfer direction in that case. */ if (!snd_soc_dai_stream_valid(codec_dai, stream)) continue; @@ -657,6 +656,10 @@ static void soc_pcm_init_runtime_hw(struct snd_pcm_substream *substream) rates = snd_pcm_rate_mask_intersect(codec_stream->rates, rates); } + /* Verify both a valid CPU DAI and a valid CODEC DAI were found */ + if (!chan_min || !cpu_chan_min) + return -EINVAL; + /* * chan min/max cannot be enforced if there are multiple CODEC DAIs * connected to CPU DAI(s), use CPU DAI's directly and let @@ -670,18 +673,35 @@ static void soc_pcm_init_runtime_hw(struct snd_pcm_substream *substream) /* finally find a intersection between CODECs and CPUs */ hw->channels_min = max(chan_min, cpu_chan_min); hw->channels_max = min(chan_max, cpu_chan_max); - if (hw->formats) - hw->formats &= formats; - else - hw->formats = formats; + hw->formats = formats; hw->rates = snd_pcm_rate_mask_intersect(rates, cpu_rates); - snd_pcm_limit_hw_rates(runtime); + snd_pcm_hw_limit_rates(hw); hw->rate_min = max(hw->rate_min, cpu_rate_min); hw->rate_min = max(hw->rate_min, rate_min); hw->rate_max = min_not_zero(hw->rate_max, cpu_rate_max); hw->rate_max = min_not_zero(hw->rate_max, rate_max); + + return 0; +} +EXPORT_SYMBOL_GPL(snd_soc_runtime_calc_hw); + +static void soc_pcm_init_runtime_hw(struct snd_pcm_substream *substream) +{ + struct snd_pcm_hardware *hw = &substream->runtime->hw; + struct snd_soc_pcm_runtime *rtd = substream->private_data; + u64 formats = hw->formats; + + /* + * At least one CPU and one CODEC should match. Otherwise, we should + * have bailed out on a higher level, since there would be no CPU or + * CODEC to support the transfer direction in that case. + */ + snd_soc_runtime_calc_hw(rtd, hw, substream->stream); + + if (formats) + hw->formats &= formats; } static int soc_pcm_components_open(struct snd_pcm_substream *substream) -- 2.20.1

1 0

[PATCH v4 0/3] simple-audio-card codec2codec support
by Samuel Holland 06 Mar '20

06 Mar '20

We are currently using simple-audio-card on the Allwinner A64 SoC. The digital audio codec there (sun8i-codec) has 3 AIFs, one each for the CPU, the modem, and Bluetooth. Adding support for the secondary AIFs requires adding codec2codec DAI links. Since the modem and bt-sco codec DAI drivers only have one set of possible PCM parameters (namely, 8kHz mono S16LE), there's no real need for a machine driver to specify the DAI link configuration. The parameters for these "simple" DAI links can be chosen automatically. This series adds codec2codec DAI link support to simple-audio-card. Codec to codec links are automatically detected when all DAIs in the link belong to codec components. I tried to reuse as much code as possible, so the first two patches refactor a couple of helper functions to be more generic. The last patch adds the new feature and its documentation. Changes in v4: - Rebased on top of asoc/for-next, several changes to patch 2 - Removed unused variable from patch 3 Changes in v3: - Update use of for_each_rtd_components for v5.6 Changes in v2: - Drop patch 1 as it was merged - Automatically detect codec2codec links instead of using a DT property Samuel Holland (3): ALSA: pcm: Add a standalone version of snd_pcm_limit_hw_rates ASoC: pcm: Export parameter intersection logic ASoC: simple-card: Add support for codec2codec DAI links Documentation/sound/soc/codec-to-codec.rst | 9 +++- include/sound/pcm.h | 9 +++- include/sound/soc.h | 3 ++ sound/core/pcm_misc.c | 18 +++---- sound/soc/generic/simple-card-utils.c | 48 ++++++++++++++++++ sound/soc/soc-pcm.c | 59 ++++++++++++++-------- 6 files changed, 114 insertions(+), 32 deletions(-) -- 2.24.1

3 5

Applied "ASoC: soc-pcm: move dpcm_fe_dai_close()" to the asoc tree
by Mark Brown 06 Mar '20

06 Mar '20

The patch ASoC: soc-pcm: move dpcm_fe_dai_close() has been applied to the asoc tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From 30fca26f8e2277ccd14fe3277a330b4f21cadca7 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com> Date: Fri, 6 Mar 2020 10:09:44 +0900 Subject: [PATCH] ASoC: soc-pcm: move dpcm_fe_dai_close() move dpcm_fe_dai_close() next to dpcm_fe_dai_open(). This is prepare for dpcm_fe_dai_open() cleanup Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan(a)linux.intel.com> Link: https://lore.kernel.org/r/87pndqp9uv.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown <broonie(a)kernel.org> --- sound/soc/soc-pcm.c | 40 ++++++++++++++++++++-------------------- 1 file changed, 20 insertions(+), 20 deletions(-) diff --git a/sound/soc/soc-pcm.c b/sound/soc/soc-pcm.c index e3a2c4f7757b..3686dda097e2 100644 --- a/sound/soc/soc-pcm.c +++ b/sound/soc/soc-pcm.c @@ -2978,6 +2978,26 @@ int soc_dpcm_runtime_update(struct snd_soc_card *card) return ret; } +static int dpcm_fe_dai_close(struct snd_pcm_substream *fe_substream) +{ + struct snd_soc_pcm_runtime *fe = fe_substream->private_data; + struct snd_soc_dpcm *dpcm; + int stream = fe_substream->stream, ret; + + mutex_lock_nested(&fe->card->mutex, SND_SOC_CARD_CLASS_RUNTIME); + ret = dpcm_fe_dai_shutdown(fe_substream); + + /* mark FE's links ready to prune */ + for_each_dpcm_be(fe, stream, dpcm) + dpcm->state = SND_SOC_DPCM_LINK_STATE_FREE; + + dpcm_be_disconnect(fe, stream); + + fe->dpcm[stream].runtime = NULL; + mutex_unlock(&fe->card->mutex); + return ret; +} + static int dpcm_fe_dai_open(struct snd_pcm_substream *fe_substream) { struct snd_soc_pcm_runtime *fe = fe_substream->private_data; @@ -3017,26 +3037,6 @@ static int dpcm_fe_dai_open(struct snd_pcm_substream *fe_substream) return ret; } -static int dpcm_fe_dai_close(struct snd_pcm_substream *fe_substream) -{ - struct snd_soc_pcm_runtime *fe = fe_substream->private_data; - struct snd_soc_dpcm *dpcm; - int stream = fe_substream->stream, ret; - - mutex_lock_nested(&fe->card->mutex, SND_SOC_CARD_CLASS_RUNTIME); - ret = dpcm_fe_dai_shutdown(fe_substream); - - /* mark FE's links ready to prune */ - for_each_dpcm_be(fe, stream, dpcm) - dpcm->state = SND_SOC_DPCM_LINK_STATE_FREE; - - dpcm_be_disconnect(fe, stream); - - fe->dpcm[stream].runtime = NULL; - mutex_unlock(&fe->card->mutex); - return ret; -} - /* create a new pcm */ int soc_new_pcm(struct snd_soc_pcm_runtime *rtd, int num) { -- 2.20.1

1 0

Applied "ASoC: soc-pcm: add dpcm_fe_dai_cleanup()" to the asoc tree
by Mark Brown 06 Mar '20

06 Mar '20

The patch ASoC: soc-pcm: add dpcm_fe_dai_cleanup() has been applied to the asoc tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From 265694b67c13f00384bd0b97549b4681cbcc85af Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com> Date: Fri, 6 Mar 2020 10:09:49 +0900 Subject: [PATCH] ASoC: soc-pcm: add dpcm_fe_dai_cleanup() dpcm_fe_dai_close() and error case of dpcm_fe_dai_open() need to do same cleanup operation. To avoid duplicate code, this patch adds dpcm_fe_dai_cleanup() and use it. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan(a)linux.intel.com> Link: https://lore.kernel.org/r/87o8tap9uq.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown <broonie(a)kernel.org> --- sound/soc/soc-pcm.c | 30 ++++++++++++++++-------------- 1 file changed, 16 insertions(+), 14 deletions(-) diff --git a/sound/soc/soc-pcm.c b/sound/soc/soc-pcm.c index 3686dda097e2..b405fb3a181b 100644 --- a/sound/soc/soc-pcm.c +++ b/sound/soc/soc-pcm.c @@ -2978,14 +2978,11 @@ int soc_dpcm_runtime_update(struct snd_soc_card *card) return ret; } -static int dpcm_fe_dai_close(struct snd_pcm_substream *fe_substream) +static void dpcm_fe_dai_cleanup(struct snd_pcm_substream *fe_substream) { struct snd_soc_pcm_runtime *fe = fe_substream->private_data; struct snd_soc_dpcm *dpcm; - int stream = fe_substream->stream, ret; - - mutex_lock_nested(&fe->card->mutex, SND_SOC_CARD_CLASS_RUNTIME); - ret = dpcm_fe_dai_shutdown(fe_substream); + int stream = fe_substream->stream; /* mark FE's links ready to prune */ for_each_dpcm_be(fe, stream, dpcm) @@ -2994,6 +2991,18 @@ static int dpcm_fe_dai_close(struct snd_pcm_substream *fe_substream) dpcm_be_disconnect(fe, stream); fe->dpcm[stream].runtime = NULL; +} + +static int dpcm_fe_dai_close(struct snd_pcm_substream *fe_substream) +{ + struct snd_soc_pcm_runtime *fe = fe_substream->private_data; + int ret; + + mutex_lock_nested(&fe->card->mutex, SND_SOC_CARD_CLASS_RUNTIME); + ret = dpcm_fe_dai_shutdown(fe_substream); + + dpcm_fe_dai_cleanup(fe_substream); + mutex_unlock(&fe->card->mutex); return ret; } @@ -3001,7 +3010,6 @@ static int dpcm_fe_dai_close(struct snd_pcm_substream *fe_substream) static int dpcm_fe_dai_open(struct snd_pcm_substream *fe_substream) { struct snd_soc_pcm_runtime *fe = fe_substream->private_data; - struct snd_soc_dpcm *dpcm; struct snd_soc_dapm_widget_list *list; int ret; int stream = fe_substream->stream; @@ -3021,14 +3029,8 @@ static int dpcm_fe_dai_open(struct snd_pcm_substream *fe_substream) dpcm_process_paths(fe, stream, &list, 1); ret = dpcm_fe_dai_startup(fe_substream); - if (ret < 0) { - /* clean up all links */ - for_each_dpcm_be(fe, stream, dpcm) - dpcm->state = SND_SOC_DPCM_LINK_STATE_FREE; - - dpcm_be_disconnect(fe, stream); - fe->dpcm[stream].runtime = NULL; - } + if (ret < 0) + dpcm_fe_dai_cleanup(fe_substream); dpcm_clear_pending_state(fe, stream); dpcm_path_put(&list); -- 2.20.1

1 0

Applied "ASoC: soc-pcm: use snd_soc_dai_get_pcm_stream() at dpcm_set_fe_runtime()" to the asoc tree
by Mark Brown 06 Mar '20

06 Mar '20

The patch ASoC: soc-pcm: use snd_soc_dai_get_pcm_stream() at dpcm_set_fe_runtime() has been applied to the asoc tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From 0c9ba720f0be457443ba89b09a5198616cd3e811 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com> Date: Fri, 6 Mar 2020 10:09:54 +0900 Subject: [PATCH] ASoC: soc-pcm: use snd_soc_dai_get_pcm_stream() at dpcm_set_fe_runtime() We already have snd_soc_dai_get_pcm_stream(), let's use it Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan(a)linux.intel.com> Link: https://lore.kernel.org/r/87mu8up9ul.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown <broonie(a)kernel.org> --- sound/soc/soc-pcm.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/sound/soc/soc-pcm.c b/sound/soc/soc-pcm.c index b405fb3a181b..3a30776858bf 100644 --- a/sound/soc/soc-pcm.c +++ b/sound/soc/soc-pcm.c @@ -2022,7 +2022,6 @@ static void dpcm_set_fe_runtime(struct snd_pcm_substream *substream) struct snd_pcm_runtime *runtime = substream->runtime; struct snd_soc_pcm_runtime *rtd = substream->private_data; struct snd_soc_dai *cpu_dai; - struct snd_soc_dai_driver *cpu_dai_drv; int i; for_each_rtd_cpu_dai(rtd, i, cpu_dai) { @@ -2033,11 +2032,9 @@ static void dpcm_set_fe_runtime(struct snd_pcm_substream *substream) if (!snd_soc_dai_stream_valid(cpu_dai, substream->stream)) continue; - cpu_dai_drv = cpu_dai->driver; - if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) - dpcm_init_runtime_hw(runtime, &cpu_dai_drv->playback); - else - dpcm_init_runtime_hw(runtime, &cpu_dai_drv->capture); + dpcm_init_runtime_hw(runtime, + snd_soc_dai_get_pcm_stream(cpu_dai, + substream->stream)); } dpcm_runtime_merge_format(substream, &runtime->hw.formats); -- 2.20.1

1 0

Applied "ASoC: soc-pcm: tidyup dulicate handing at dpcm_fe_dai_startup()" to the asoc tree
by Mark Brown 06 Mar '20

06 Mar '20

The patch ASoC: soc-pcm: tidyup dulicate handing at dpcm_fe_dai_startup() has been applied to the asoc tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From 8a01fbf0ac115268293d8764850edc0628a58e4f Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com> Date: Fri, 6 Mar 2020 10:09:59 +0900 Subject: [PATCH] ASoC: soc-pcm: tidyup dulicate handing at dpcm_fe_dai_startup() error handling at dpcm_fe_dai_startup() has duplicate code. This patch tidyup it. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan(a)linux.intel.com> Link: https://lore.kernel.org/r/87lfoep9ug.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown <broonie(a)kernel.org> --- sound/soc/soc-pcm.c | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/sound/soc/soc-pcm.c b/sound/soc/soc-pcm.c index 3a30776858bf..7d787e0966f3 100644 --- a/sound/soc/soc-pcm.c +++ b/sound/soc/soc-pcm.c @@ -2162,17 +2162,13 @@ static int dpcm_fe_dai_startup(struct snd_pcm_substream *fe_substream) snd_pcm_limit_hw_rates(runtime); ret = dpcm_apply_symmetry(fe_substream, stream); - if (ret < 0) { + if (ret < 0) dev_err(fe->dev, "ASoC: failed to apply dpcm symmetry %d\n", ret); - goto unwind; - } - - dpcm_set_fe_update_state(fe, stream, SND_SOC_DPCM_UPDATE_NO); - return 0; unwind: - dpcm_be_dai_startup_unwind(fe, stream); + if (ret < 0) + dpcm_be_dai_startup_unwind(fe, stream); be_err: dpcm_set_fe_update_state(fe, stream, SND_SOC_DPCM_UPDATE_NO); return ret; -- 2.20.1

1 0

[PATCH v2 resend 0/6] ASoC: soc-pcm cleanup step5
by Kuninori Morimoto 06 Mar '20

06 Mar '20

Hi Mark These are v2 resend of soc-pcm cleanup step5. 1) - 4) are rebased to latest for-5.7 branch. 5) - 6) are remaked of previous [6/8], [7/8] which were mistaken patch. Kuninori Morimoto (6): 1) ASoC: soc-pcm: move dpcm_fe_dai_close() 2) ASoC: soc-pcm: add dpcm_fe_dai_cleanup() 3) ASoC: soc-pcm: use snd_soc_dai_get_pcm_stream() at dpcm_set_fe_runtime() 4) ASoC: soc-pcm: tidyup dulicate handing at dpcm_fe_dai_startup() 5) ASoC: soc-pcm: check DAI's activity more simply 6) ASoC: soc-pcm: Do Digital Mute for both CPU/Codec in same timing. sound/soc/soc-pcm.c | 97 ++++++++++++++++++++++----------------------- 1 file changed, 47 insertions(+), 50 deletions(-) -- 2.17.1

2 8

[PATCH] ALSA: dmaengine_pcm: No need to take runtime reference twice in pcm_pointer
by Peter Ujfalusi 06 Mar '20

06 Mar '20

The runtime pointer has been taken in functional level so there is no need to take it again under the if () case. Fixes: 9d789dc047e3 ("ALSA: dmaengine_pcm: Consider DMA cache caused delay in pointer callback") Signed-off-by: Peter Ujfalusi <peter.ujfalusi(a)ti.com> --- Hi Mark, it looks like that the DMA caused delay reporting patch went in in two pieces: fa1f875c120f ALSA: dmaengine_pcm: Consider DMA cache caused delay in pointer callback 9d789dc047e3 ALSA: dmaengine_pcm: Consider DMA cache caused delay in pointer callback and the second one missed removing the runtime pointer initialization from the if () case. Regards, Peter sound/core/pcm_dmaengine.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/sound/core/pcm_dmaengine.c b/sound/core/pcm_dmaengine.c index 6f1507f992d1..4d059ff2b2e4 100644 --- a/sound/core/pcm_dmaengine.c +++ b/sound/core/pcm_dmaengine.c @@ -248,8 +248,6 @@ snd_pcm_uframes_t snd_dmaengine_pcm_pointer(struct snd_pcm_substream *substream) status = dmaengine_tx_status(prtd->dma_chan, prtd->cookie, &state); if (status == DMA_IN_PROGRESS || status == DMA_PAUSED) { - struct snd_pcm_runtime *runtime = substream->runtime; - buf_size = snd_pcm_lib_buffer_bytes(substream); if (state.residue > 0 && state.residue <= buf_size) pos = buf_size - state.residue; -- Peter Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

2 1

[PATCH] ALSA: firewire: use KBUILD_MODNAME for struct driver.name instead of string
by Takashi Sakamoto 06 Mar '20

06 Mar '20

KBUILD_MODNAME is available to name kernel modules according to its object name. This commit uses the macro instead of string for name field of struct driver since drivers in ALSA firewire stack have the same name of each object name. Signed-off-by: Takashi Sakamoto <o-takashi(a)sakamocchi.jp> --- sound/firewire/bebob/bebob.c | 2 +- sound/firewire/digi00x/digi00x.c | 2 +- sound/firewire/fireface/ff.c | 2 +- sound/firewire/fireworks/fireworks.c | 2 +- sound/firewire/tascam/tascam.c | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/sound/firewire/bebob/bebob.c b/sound/firewire/bebob/bebob.c index 976d8cb9a34f..2c8e3392a490 100644 --- a/sound/firewire/bebob/bebob.c +++ b/sound/firewire/bebob/bebob.c @@ -509,7 +509,7 @@ MODULE_DEVICE_TABLE(ieee1394, bebob_id_table); static struct fw_driver bebob_driver = { .driver = { .owner = THIS_MODULE, - .name = "snd-bebob", + .name = KBUILD_MODNAME, .bus = &fw_bus_type, }, .probe = bebob_probe, diff --git a/sound/firewire/digi00x/digi00x.c b/sound/firewire/digi00x/digi00x.c index 1f5fc0e7c024..c84b913a9fe0 100644 --- a/sound/firewire/digi00x/digi00x.c +++ b/sound/firewire/digi00x/digi00x.c @@ -192,7 +192,7 @@ MODULE_DEVICE_TABLE(ieee1394, snd_dg00x_id_table); static struct fw_driver dg00x_driver = { .driver = { .owner = THIS_MODULE, - .name = "snd-firewire-digi00x", + .name = KBUILD_MODNAME, .bus = &fw_bus_type, }, .probe = snd_dg00x_probe, diff --git a/sound/firewire/fireface/ff.c b/sound/firewire/fireface/ff.c index f5a016560eb8..b62a4fd22407 100644 --- a/sound/firewire/fireface/ff.c +++ b/sound/firewire/fireface/ff.c @@ -224,7 +224,7 @@ MODULE_DEVICE_TABLE(ieee1394, snd_ff_id_table); static struct fw_driver ff_driver = { .driver = { .owner = THIS_MODULE, - .name = "snd-fireface", + .name = KBUILD_MODNAME, .bus = &fw_bus_type, }, .probe = snd_ff_probe, diff --git a/sound/firewire/fireworks/fireworks.c b/sound/firewire/fireworks/fireworks.c index 134fc9ee26b9..b1cc013a3540 100644 --- a/sound/firewire/fireworks/fireworks.c +++ b/sound/firewire/fireworks/fireworks.c @@ -362,7 +362,7 @@ MODULE_DEVICE_TABLE(ieee1394, efw_id_table); static struct fw_driver efw_driver = { .driver = { .owner = THIS_MODULE, - .name = "snd-fireworks", + .name = KBUILD_MODNAME, .bus = &fw_bus_type, }, .probe = efw_probe, diff --git a/sound/firewire/tascam/tascam.c b/sound/firewire/tascam/tascam.c index addc464503bc..5dac0d9fc58e 100644 --- a/sound/firewire/tascam/tascam.c +++ b/sound/firewire/tascam/tascam.c @@ -224,7 +224,7 @@ MODULE_DEVICE_TABLE(ieee1394, snd_tscm_id_table); static struct fw_driver tscm_driver = { .driver = { .owner = THIS_MODULE, - .name = "snd-firewire-tascam", + .name = KBUILD_MODNAME, .bus = &fw_bus_type, }, .probe = snd_tscm_probe, -- 2.20.1

2 1

5.5.y - apply "ASoC: intel/skl/hda - export number of digital microphones via control components"
by Jaroslav Kysela 06 Mar '20

06 Mar '20

Hi, could we cherry-pick patch 8cd9956f61c65022209ce6d1e55ed12aea12357d to the 5.5 stable tree? 8cd9956f61c65022209ce6d1e55ed12aea12357d : "ASoC: intel/skl/hda - export number of digital microphones via control components" Rerefences: https://gitlab.freedesktop.org/pulseaudio/pulseaudio/issues/817 Thank you, Jaroslav -- Jaroslav Kysela <perex(a)perex.cz> Linux Sound Maintainer; ALSA Project; Red Hat, Inc.

4 10

[RFC PATCH 0/3] ASoC: add dailink .exit() callback
by Pierre-Louis Bossart 06 Mar '20

06 Mar '20

While looking at reboot issues and module load/unload tests, I found out some resources allocated in the dailink .init() callback are not properly released - there is no existing mechanism in the soc-core to do so. I experimented with different solutions and the simplest seems to add an .exit() callback. However things are not fully balanced and I could use feedback on the approach. This patchset includes two examples where this solution is useful, but we have additional ones identified by Ranjani. Pierre-Louis Bossart (3): ASoC: soc-core: introduce exit() callback for dailinks ASoC: Intel: bdw-rt5677: fix module load/unload issues ASoC: Intel: kbl-rt5660: use .exit() dailink callback to release gpiod include/sound/soc.h | 3 +++ sound/soc/intel/boards/bdw-rt5677.c | 14 ++++++++++++-- sound/soc/intel/boards/kbl_rt5660.c | 13 +++++++++++-- sound/soc/soc-core.c | 8 +++++++- 4 files changed, 33 insertions(+), 5 deletions(-) -- 2.20.1

5 22

Re: linux-next: Tree for Mar 5 (sound/soc/codecs/wcd934x.o)
by Randy Dunlap 06 Mar '20

06 Mar '20

On 3/4/20 10:55 PM, Stephen Rothwell wrote: > Hi all, > > Changes since 20200304: > on x86_64: CONFIG_MFD_WCD934X=m CONFIG_SND_SOC_WCD934X=y ld: sound/soc/codecs/wcd934x.o: in function `wcd934x_trigger': wcd934x.c:(.text+0x754): undefined reference to `slim_stream_prepare' ld: wcd934x.c:(.text+0x768): undefined reference to `slim_stream_enable' ld: wcd934x.c:(.text+0x797): undefined reference to `slim_stream_unprepare' ld: wcd934x.c:(.text+0x7ab): undefined reference to `slim_stream_disable' ld: sound/soc/codecs/wcd934x.o: in function `wcd934x_codec_probe': wcd934x.c:(.text+0x4c6c): undefined reference to `of_slim_get_device' ld: wcd934x.c:(.text+0x4cd4): undefined reference to `slim_get_logical_addr' ld: wcd934x.c:(.text+0x4cfe): undefined reference to `__regmap_init_slimbus' ld: sound/soc/codecs/wcd934x.o: in function `wcd934x_hw_params': wcd934x.c:(.text+0x6027): undefined reference to `slim_stream_allocate' Full randconfig file is attached. -- ~Randy Reported-by: Randy Dunlap <rdunlap(a)infradead.org>

2 1

[PATCH] topology: Add topology file for generic HDA DSP machine driver
by Mateusz Gorski 06 Mar '20

06 Mar '20

Provide conf file with reference topology for generic HDA DSP machine driver. Signed-off-by: Mateusz Gorski <mateusz.gorski(a)linux.intel.com> --- topology/hdadsp/hda_dsp.conf | 7237 ++++++++++++++++++++++++++++++++++ 1 file changed, 7237 insertions(+) create mode 100644 topology/hdadsp/hda_dsp.conf diff --git a/topology/hdadsp/hda_dsp.conf b/topology/hdadsp/hda_dsp.conf new file mode 100644 index 0000000..b29cd2d --- /dev/null +++ b/topology/hdadsp/hda_dsp.conf @@ -0,0 +1,7237 @@ + +SectionVendorTokens."skl_tokens" { + SKL_TKN_UUID "1" + SKL_TKN_U8_NUM_BLOCKS "2" + SKL_TKN_U8_BLOCK_TYPE "3" + SKL_TKN_U8_IN_PIN_TYPE "4" + SKL_TKN_U8_OUT_PIN_TYPE "5" + SKL_TKN_U8_DYN_IN_PIN "6" + SKL_TKN_U8_DYN_OUT_PIN "7" + SKL_TKN_U8_IN_QUEUE_COUNT "8" + SKL_TKN_U8_OUT_QUEUE_COUNT "9" + SKL_TKN_U8_TIME_SLOT "10" + SKL_TKN_U8_CORE_ID "11" + SKL_TKN_U8_MODULE_TYPE "12" + SKL_TKN_U8_CONN_TYPE "13" + SKL_TKN_U8_DEV_TYPE "14" + SKL_TKN_U8_HW_CONN_TYPE "15" + SKL_TKN_U16_MOD_INST_ID "16" + SKL_TKN_U16_BLOCK_SIZE "17" + SKL_TKN_U32_MAX_MCPS "18" + SKL_TKN_U32_MEM_PAGES "19" + SKL_TKN_U32_OBS "20" + SKL_TKN_U32_IBS "21" + SKL_TKN_U32_VBUS_ID "22" + SKL_TKN_U32_PARAMS_FIXUP "23" + SKL_TKN_U32_CONVERTER "24" + SKL_TKN_U32_PIPE_ID "25" + SKL_TKN_U32_PIPE_CONN_TYPE "26" + SKL_TKN_U32_PIPE_PRIORITY "27" + SKL_TKN_U32_PIPE_MEM_PGS "28" + SKL_TKN_U32_DIR_PIN_COUNT "29" + SKL_TKN_U32_FMT_CH "30" + SKL_TKN_U32_FMT_FREQ "31" + SKL_TKN_U32_FMT_BIT_DEPTH "32" + SKL_TKN_U32_FMT_SAMPLE_SIZE "33" + SKL_TKN_U32_FMT_CH_CONFIG "34" + SKL_TKN_U32_FMT_INTERLEAVE "35" + SKL_TKN_U32_FMT_SAMPLE_TYPE "36" + SKL_TKN_U32_FMT_CH_MAP "37" + SKL_TKN_U32_PIN_MOD_ID "38" + SKL_TKN_U32_PIN_INST_ID "39" + SKL_TKN_U32_MOD_SET_PARAMS "40" + SKL_TKN_U32_MOD_PARAM_ID "41" + SKL_TKN_U32_CAPS_SET_PARAMS "42" + SKL_TKN_U32_CAPS_PARAMS_ID "43" + SKL_TKN_U32_CAPS_SIZE "44" + SKL_TKN_U32_PROC_DOMAIN "45" + SKL_TKN_U32_LIB_COUNT "46" + SKL_TKN_STR_LIB_NAME "47" + SKL_TKN_U32_PMODE "48" + SKL_TKN_U32_D0I3_CAPS "49" + SKL_TKN_U32_DMA_BUF_SIZE "50" + SKL_TKN_U32_PIPE_DIRECTION "51" + SKL_TKN_U32_PIPE_CONFIG_ID "52" + SKL_TKN_U32_NUM_CONFIGS "53" + SKL_TKN_U32_PATH_MEM_PGS "54" + SKL_TKN_U32_CFG_FREQ "55" + SKL_TKN_U8_CFG_CHAN "56" + SKL_TKN_U8_CFG_BPS "57" + SKL_TKN_CFG_MOD_RES_ID "58" + SKL_TKN_CFG_MOD_FMT_ID "59" + SKL_TKN_U8_NUM_MOD "60" + SKL_TKN_MM_U8_MOD_IDX "61" + SKL_TKN_MM_U8_NUM_RES "62" + SKL_TKN_MM_U8_NUM_INTF "63" + SKL_TKN_MM_U32_RES_ID "64" + SKL_TKN_MM_U32_CPS "65" + SKL_TKN_MM_U32_DMA_SIZE "66" + SKL_TKN_MM_U32_CPC "67" + SKL_TKN_MM_U32_RES_PIN_ID "68" + SKL_TKN_MM_U32_INTF_PIN_ID "69" + SKL_TKN_MM_U32_PIN_BUF "70" + SKL_TKN_MM_U32_FMT_ID "71" + SKL_TKN_MM_U32_NUM_IN_FMT "72" + SKL_TKN_MM_U32_NUM_OUT_FMT "73" + SKL_TKN_U32_ASTATE_IDX "74" + SKL_TKN_U32_ASTATE_COUNT "75" + SKL_TKN_U32_ASTATE_KCPS "76" + SKL_TKN_U32_ASTATE_CLK_SRC "77" + SKL_TKN_U32_DMACTRL_CFG_IDX "82" + SKL_TKN_U32_DMACTRL_CFG_SIZE "83" + SKL_TKN_U32_DMA_IDX "84" + SKL_TKN_U32_DMA_TYPE "85" + SKL_TKN_U32_DMA_SIZE "86" + SKL_TKN_U32_DMA_MAX_SIZE "87" + SKL_TKN_U32_DMA_MIN_SIZE "88" + SKL_TKN_U32_SCH_TYPE "89" + SKL_TKN_U32_SCH_SIZE "90" + SKL_TKN_U32_SCH_SYS_TICK_MUL "91" + SKL_TKN_U32_SCH_SYS_TICK_DIV "92" + SKL_TKN_U32_SCH_SYS_TICK_LL_SRC "93" + SKL_TKN_U32_SCH_SYS_TICK_CFG_LEN "94" + SKL_TKN_U32_SCH_SYS_TICK_CFG "95" + SKL_TKN_U32_FMT_CFG_IDX "96" +} + +SectionVendorTuples."mod_type_data_size_desc" { + tokens "skl_tokens" + + tuples."byte.u8_block_type" { + SKL_TKN_U8_BLOCK_TYPE "0" + } + + tuples."short.u16_size_desc" { + SKL_TKN_U16_BLOCK_SIZE "5284" + } +} + +SectionData."mod_type_data_size_desc" { + tuples "mod_type_data_size_desc" +} + +SectionVendorTuples."mod_type_data" { + tokens "skl_tokens" + + tuples."byte.u8_num_mod" { + SKL_TKN_U8_NUM_MOD "5" + } + + tuples."uuid.mod_0" { + SKL_TKN_UUID "178, 110, 101, 57, 113, 59, 73, 64, 141, 63, 249, 44, 213, 196, 60, 9" + } + + tuples."byte.u8_mod_type_0" { + SKL_TKN_MM_U8_MOD_IDX "0" + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_IN_QUEUE_COUNT "1" + SKL_TKN_U8_OUT_QUEUE_COUNT "3" + SKL_TKN_MM_U8_NUM_RES "1" + SKL_TKN_MM_U8_NUM_INTF "1" + } + + tuples."word.u32_mod_type_0_res_0" { + SKL_TKN_MM_U32_RES_ID "0" + SKL_TKN_U32_MEM_PAGES "1" + SKL_TKN_MM_U32_CPS "2666000" + SKL_TKN_U32_IBS "384" + SKL_TKN_U32_OBS "384" + SKL_TKN_MM_U32_DMA_SIZE "0" + SKL_TKN_MM_U32_CPC "2666" + } + + tuples."word.u32_mod_type_0_res_0_input_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_MM_U32_RES_PIN_ID "0" + SKL_TKN_MM_U32_PIN_BUF "384" + } + + tuples."word.u32_mod_type_0_res_0_output_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_MM_U32_RES_PIN_ID "0" + SKL_TKN_MM_U32_PIN_BUF "384" + } + + tuples."word.u32_mod_type_0_intf_0" { + SKL_TKN_MM_U32_FMT_ID "0" + SKL_TKN_MM_U32_NUM_IN_FMT "1" + SKL_TKN_MM_U32_NUM_OUT_FMT "1" + } + + tuples."word.u32_mod_type_0_intf_0_input_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_MM_U32_INTF_PIN_ID "0" + SKL_TKN_U32_FMT_CH "2" + SKL_TKN_U32_FMT_FREQ "48000" + SKL_TKN_U32_FMT_BIT_DEPTH "32" + SKL_TKN_U32_FMT_CH_CONFIG "1" + SKL_TKN_U32_FMT_INTERLEAVE "0" + SKL_TKN_U32_FMT_SAMPLE_SIZE "32" + SKL_TKN_U32_FMT_SAMPLE_TYPE "0" + SKL_TKN_U32_FMT_CH_MAP "4294967056" + } + + tuples."word.u32_mod_type_0_intf_0_output_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_MM_U32_INTF_PIN_ID "0" + SKL_TKN_U32_FMT_CH "2" + SKL_TKN_U32_FMT_FREQ "48000" + SKL_TKN_U32_FMT_BIT_DEPTH "32" + SKL_TKN_U32_FMT_CH_CONFIG "1" + SKL_TKN_U32_FMT_INTERLEAVE "0" + SKL_TKN_U32_FMT_SAMPLE_SIZE "32" + SKL_TKN_U32_FMT_SAMPLE_TYPE "0" + SKL_TKN_U32_FMT_CH_MAP "4294967056" + } + + tuples."uuid.mod_1" { + SKL_TKN_UUID "90, 80, 86, 60, 215, 36, 143, 65, 189, 220, 193, 245, 163, 172, 42, 224" + } + + tuples."byte.u8_mod_type_1" { + SKL_TKN_MM_U8_MOD_IDX "1" + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_IN_QUEUE_COUNT "8" + SKL_TKN_U8_OUT_QUEUE_COUNT "1" + SKL_TKN_MM_U8_NUM_RES "1" + SKL_TKN_MM_U8_NUM_INTF "1" + } + + tuples."word.u32_mod_type_1_res_0" { + SKL_TKN_MM_U32_RES_ID "0" + SKL_TKN_U32_MEM_PAGES "1" + SKL_TKN_MM_U32_CPS "1521000" + SKL_TKN_U32_IBS "384" + SKL_TKN_U32_OBS "384" + SKL_TKN_MM_U32_DMA_SIZE "0" + SKL_TKN_MM_U32_CPC "1521" + } + + tuples."word.u32_mod_type_1_res_0_input_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_MM_U32_RES_PIN_ID "0" + SKL_TKN_MM_U32_PIN_BUF "384" + } + + tuples."word.u32_mod_type_1_res_0_output_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_MM_U32_RES_PIN_ID "0" + SKL_TKN_MM_U32_PIN_BUF "384" + } + + tuples."word.u32_mod_type_1_intf_0" { + SKL_TKN_MM_U32_FMT_ID "0" + SKL_TKN_MM_U32_NUM_IN_FMT "1" + SKL_TKN_MM_U32_NUM_OUT_FMT "1" + } + + tuples."word.u32_mod_type_1_intf_0_input_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_MM_U32_INTF_PIN_ID "0" + SKL_TKN_U32_FMT_CH "2" + SKL_TKN_U32_FMT_FREQ "48000" + SKL_TKN_U32_FMT_BIT_DEPTH "32" + SKL_TKN_U32_FMT_CH_CONFIG "1" + SKL_TKN_U32_FMT_INTERLEAVE "0" + SKL_TKN_U32_FMT_SAMPLE_SIZE "32" + SKL_TKN_U32_FMT_SAMPLE_TYPE "0" + SKL_TKN_U32_FMT_CH_MAP "4294967056" + } + + tuples."word.u32_mod_type_1_intf_0_output_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_MM_U32_INTF_PIN_ID "0" + SKL_TKN_U32_FMT_CH "2" + SKL_TKN_U32_FMT_FREQ "48000" + SKL_TKN_U32_FMT_BIT_DEPTH "32" + SKL_TKN_U32_FMT_CH_CONFIG "1" + SKL_TKN_U32_FMT_INTERLEAVE "0" + SKL_TKN_U32_FMT_SAMPLE_SIZE "32" + SKL_TKN_U32_FMT_SAMPLE_TYPE "0" + SKL_TKN_U32_FMT_CH_MAP "4294967056" + } + + tuples."uuid.mod_2" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } + + tuples."byte.u8_mod_type_2" { + SKL_TKN_MM_U8_MOD_IDX "2" + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_IN_QUEUE_COUNT "1" + SKL_TKN_U8_OUT_QUEUE_COUNT "4" + SKL_TKN_MM_U8_NUM_RES "13" + SKL_TKN_MM_U8_NUM_INTF "13" + } + + tuples."word.u32_mod_type_2_res_0" { + SKL_TKN_MM_U32_RES_ID "0" + SKL_TKN_U32_MEM_PAGES "1" + SKL_TKN_MM_U32_CPS "2581000" + SKL_TKN_U32_IBS "192" + SKL_TKN_U32_OBS "384" + SKL_TKN_MM_U32_DMA_SIZE "384" + SKL_TKN_MM_U32_CPC "2581" + } + + tuples."word.u32_mod_type_2_res_0_input_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_MM_U32_RES_PIN_ID "0" + SKL_TKN_MM_U32_PIN_BUF "192" + } + + tuples."word.u32_mod_type_2_res_0_output_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_MM_U32_RES_PIN_ID "0" + SKL_TKN_MM_U32_PIN_BUF "384" + } + + tuples."word.u32_mod_type_2_res_1" { + SKL_TKN_MM_U32_RES_ID "1" + SKL_TKN_U32_MEM_PAGES "1" + SKL_TKN_MM_U32_CPS "1000" + SKL_TKN_U32_IBS "384" + SKL_TKN_U32_OBS "384" + SKL_TKN_MM_U32_DMA_SIZE "768" + SKL_TKN_MM_U32_CPC "1" + } + + tuples."word.u32_mod_type_2_res_1_input_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_MM_U32_RES_PIN_ID "0" + SKL_TKN_MM_U32_PIN_BUF "384" + } + + tuples."word.u32_mod_type_2_res_1_output_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_MM_U32_RES_PIN_ID "0" + SKL_TKN_MM_U32_PIN_BUF "384" + } + + tuples."word.u32_mod_type_2_res_2" { + SKL_TKN_MM_U32_RES_ID "2" + SKL_TKN_U32_MEM_PAGES "1" + SKL_TKN_MM_U32_CPS "3812000" + SKL_TKN_U32_IBS "384" + SKL_TKN_U32_OBS "384" + SKL_TKN_MM_U32_DMA_SIZE "768" + SKL_TKN_MM_U32_CPC "3812" + } + + tuples."word.u32_mod_type_2_res_2_input_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_MM_U32_RES_PIN_ID "0" + SKL_TKN_MM_U32_PIN_BUF "384" + } + + tuples."word.u32_mod_type_2_res_2_output_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_MM_U32_RES_PIN_ID "0" + SKL_TKN_MM_U32_PIN_BUF "384" + } + + tuples."word.u32_mod_type_2_res_3" { + SKL_TKN_MM_U32_RES_ID "3" + SKL_TKN_U32_MEM_PAGES "1" + SKL_TKN_MM_U32_CPS "4473000" + SKL_TKN_U32_IBS "384" + SKL_TKN_U32_OBS "384" + SKL_TKN_MM_U32_DMA_SIZE "768" + SKL_TKN_MM_U32_CPC "4473" + } + + tuples."word.u32_mod_type_2_res_3_input_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_MM_U32_RES_PIN_ID "0" + SKL_TKN_MM_U32_PIN_BUF "384" + } + + tuples."word.u32_mod_type_2_res_3_output_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_MM_U32_RES_PIN_ID "0" + SKL_TKN_MM_U32_PIN_BUF "384" + } + + tuples."word.u32_mod_type_2_res_4" { + SKL_TKN_MM_U32_RES_ID "4" + SKL_TKN_U32_MEM_PAGES "1" + SKL_TKN_MM_U32_CPS "1000" + SKL_TKN_U32_IBS "192" + SKL_TKN_U32_OBS "192" + SKL_TKN_MM_U32_DMA_SIZE "384" + SKL_TKN_MM_U32_CPC "1" + } + + tuples."word.u32_mod_type_2_res_4_input_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_MM_U32_RES_PIN_ID "0" + SKL_TKN_MM_U32_PIN_BUF "192" + } + + tuples."word.u32_mod_type_2_res_4_output_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_MM_U32_RES_PIN_ID "0" + SKL_TKN_MM_U32_PIN_BUF "192" + } + + tuples."word.u32_mod_type_2_res_5" { + SKL_TKN_MM_U32_RES_ID "5" + SKL_TKN_U32_MEM_PAGES "1" + SKL_TKN_MM_U32_CPS "1000" + SKL_TKN_U32_IBS "384" + SKL_TKN_U32_OBS "384" + SKL_TKN_MM_U32_DMA_SIZE "768" + SKL_TKN_MM_U32_CPC "1" + } + + tuples."word.u32_mod_type_2_res_5_input_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_MM_U32_RES_PIN_ID "0" + SKL_TKN_MM_U32_PIN_BUF "384" + } + + tuples."word.u32_mod_type_2_res_5_output_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_MM_U32_RES_PIN_ID "0" + SKL_TKN_MM_U32_PIN_BUF "384" + } + + tuples."word.u32_mod_type_2_res_6" { + SKL_TKN_MM_U32_RES_ID "6" + SKL_TKN_U32_MEM_PAGES "1" + SKL_TKN_MM_U32_CPS "1000" + SKL_TKN_U32_IBS "768" + SKL_TKN_U32_OBS "768" + SKL_TKN_MM_U32_DMA_SIZE "1536" + SKL_TKN_MM_U32_CPC "1" + } + + tuples."word.u32_mod_type_2_res_6_input_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_MM_U32_RES_PIN_ID "0" + SKL_TKN_MM_U32_PIN_BUF "768" + } + + tuples."word.u32_mod_type_2_res_6_output_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_MM_U32_RES_PIN_ID "0" + SKL_TKN_MM_U32_PIN_BUF "768" + } + + tuples."word.u32_mod_type_2_res_7" { + SKL_TKN_MM_U32_RES_ID "7" + SKL_TKN_U32_MEM_PAGES "1" + SKL_TKN_MM_U32_CPS "1000" + SKL_TKN_U32_IBS "1536" + SKL_TKN_U32_OBS "1536" + SKL_TKN_MM_U32_DMA_SIZE "3072" + SKL_TKN_MM_U32_CPC "1" + } + + tuples."word.u32_mod_type_2_res_7_input_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_MM_U32_RES_PIN_ID "0" + SKL_TKN_MM_U32_PIN_BUF "1536" + } + + tuples."word.u32_mod_type_2_res_7_output_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_MM_U32_RES_PIN_ID "0" + SKL_TKN_MM_U32_PIN_BUF "1536" + } + + tuples."word.u32_mod_type_2_res_8" { + SKL_TKN_MM_U32_RES_ID "8" + SKL_TKN_U32_MEM_PAGES "1" + SKL_TKN_MM_U32_CPS "579000" + SKL_TKN_U32_IBS "384" + SKL_TKN_U32_OBS "192" + SKL_TKN_MM_U32_DMA_SIZE "768" + SKL_TKN_MM_U32_CPC "579" + } + + tuples."word.u32_mod_type_2_res_8_input_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_MM_U32_RES_PIN_ID "0" + SKL_TKN_MM_U32_PIN_BUF "384" + } + + tuples."word.u32_mod_type_2_res_8_output_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_MM_U32_RES_PIN_ID "0" + SKL_TKN_MM_U32_PIN_BUF "192" + } + + tuples."word.u32_mod_type_2_res_9" { + SKL_TKN_MM_U32_RES_ID "9" + SKL_TKN_U32_MEM_PAGES "1" + SKL_TKN_MM_U32_CPS "3812000" + SKL_TKN_U32_IBS "384" + SKL_TKN_U32_OBS "384" + SKL_TKN_MM_U32_DMA_SIZE "768" + SKL_TKN_MM_U32_CPC "3812" + } + + tuples."word.u32_mod_type_2_res_9_input_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_MM_U32_RES_PIN_ID "0" + SKL_TKN_MM_U32_PIN_BUF "384" + } + + tuples."word.u32_mod_type_2_res_9_output_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_MM_U32_RES_PIN_ID "0" + SKL_TKN_MM_U32_PIN_BUF "384" + } + + tuples."word.u32_mod_type_2_res_10" { + SKL_TKN_MM_U32_RES_ID "10" + SKL_TKN_U32_MEM_PAGES "1" + SKL_TKN_MM_U32_CPS "3812000" + SKL_TKN_U32_IBS "192" + SKL_TKN_U32_OBS "192" + SKL_TKN_MM_U32_DMA_SIZE "384768" + SKL_TKN_MM_U32_CPC "3812" + } + + tuples."word.u32_mod_type_2_res_10_input_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_MM_U32_RES_PIN_ID "0" + SKL_TKN_MM_U32_PIN_BUF "192" + } + + tuples."word.u32_mod_type_2_res_10_output_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_MM_U32_RES_PIN_ID "0" + SKL_TKN_MM_U32_PIN_BUF "192" + } + + tuples."word.u32_mod_type_2_res_11" { + SKL_TKN_MM_U32_RES_ID "11" + SKL_TKN_U32_MEM_PAGES "1" + SKL_TKN_MM_U32_CPS "3812000" + SKL_TKN_U32_IBS "192" + SKL_TKN_U32_OBS "384" + SKL_TKN_MM_U32_DMA_SIZE "384768" + SKL_TKN_MM_U32_CPC "3812" + } + + tuples."word.u32_mod_type_2_res_11_input_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_MM_U32_RES_PIN_ID "0" + SKL_TKN_MM_U32_PIN_BUF "192" + } + + tuples."word.u32_mod_type_2_res_11_output_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_MM_U32_RES_PIN_ID "0" + SKL_TKN_MM_U32_PIN_BUF "384" + } + + tuples."word.u32_mod_type_2_res_12" { + SKL_TKN_MM_U32_RES_ID "12" + SKL_TKN_U32_MEM_PAGES "1" + SKL_TKN_MM_U32_CPS "3812000" + SKL_TKN_U32_IBS "384" + SKL_TKN_U32_OBS "192" + SKL_TKN_MM_U32_DMA_SIZE "384768" + SKL_TKN_MM_U32_CPC "3812" + } + + tuples."word.u32_mod_type_2_res_12_input_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_MM_U32_RES_PIN_ID "0" + SKL_TKN_MM_U32_PIN_BUF "384" + } + + tuples."word.u32_mod_type_2_res_12_output_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_MM_U32_RES_PIN_ID "0" + SKL_TKN_MM_U32_PIN_BUF "192" + } + + tuples."word.u32_mod_type_2_intf_0" { + SKL_TKN_MM_U32_FMT_ID "0" + SKL_TKN_MM_U32_NUM_IN_FMT "1" + SKL_TKN_MM_U32_NUM_OUT_FMT "1" + } + + tuples."word.u32_mod_type_2_intf_0_input_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_MM_U32_INTF_PIN_ID "0" + SKL_TKN_U32_FMT_CH "2" + SKL_TKN_U32_FMT_FREQ "48000" + SKL_TKN_U32_FMT_BIT_DEPTH "16" + SKL_TKN_U32_FMT_CH_CONFIG "1" + SKL_TKN_U32_FMT_INTERLEAVE "0" + SKL_TKN_U32_FMT_SAMPLE_SIZE "16" + SKL_TKN_U32_FMT_SAMPLE_TYPE "0" + SKL_TKN_U32_FMT_CH_MAP "4294967056" + } + + tuples."word.u32_mod_type_2_intf_0_output_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_MM_U32_INTF_PIN_ID "0" + SKL_TKN_U32_FMT_CH "2" + SKL_TKN_U32_FMT_FREQ "48000" + SKL_TKN_U32_FMT_BIT_DEPTH "32" + SKL_TKN_U32_FMT_CH_CONFIG "1" + SKL_TKN_U32_FMT_INTERLEAVE "0" + SKL_TKN_U32_FMT_SAMPLE_SIZE "32" + SKL_TKN_U32_FMT_SAMPLE_TYPE "0" + SKL_TKN_U32_FMT_CH_MAP "4294967056" + } + + tuples."word.u32_mod_type_2_intf_1" { + SKL_TKN_MM_U32_FMT_ID "1" + SKL_TKN_MM_U32_NUM_IN_FMT "1" + SKL_TKN_MM_U32_NUM_OUT_FMT "1" + } + + tuples."word.u32_mod_type_2_intf_1_input_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_MM_U32_INTF_PIN_ID "0" + SKL_TKN_U32_FMT_CH "2" + SKL_TKN_U32_FMT_FREQ "48000" + SKL_TKN_U32_FMT_BIT_DEPTH "32" + SKL_TKN_U32_FMT_CH_CONFIG "1" + SKL_TKN_U32_FMT_INTERLEAVE "0" + SKL_TKN_U32_FMT_SAMPLE_SIZE "32" + SKL_TKN_U32_FMT_SAMPLE_TYPE "0" + SKL_TKN_U32_FMT_CH_MAP "4294967056" + } + + tuples."word.u32_mod_type_2_intf_1_output_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_MM_U32_INTF_PIN_ID "0" + SKL_TKN_U32_FMT_CH "2" + SKL_TKN_U32_FMT_FREQ "48000" + SKL_TKN_U32_FMT_BIT_DEPTH "32" + SKL_TKN_U32_FMT_CH_CONFIG "1" + SKL_TKN_U32_FMT_INTERLEAVE "0" + SKL_TKN_U32_FMT_SAMPLE_SIZE "32" + SKL_TKN_U32_FMT_SAMPLE_TYPE "0" + SKL_TKN_U32_FMT_CH_MAP "4294967056" + } + + tuples."word.u32_mod_type_2_intf_2" { + SKL_TKN_MM_U32_FMT_ID "2" + SKL_TKN_MM_U32_NUM_IN_FMT "1" + SKL_TKN_MM_U32_NUM_OUT_FMT "1" + } + + tuples."word.u32_mod_type_2_intf_2_input_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_MM_U32_INTF_PIN_ID "0" + SKL_TKN_U32_FMT_CH "2" + SKL_TKN_U32_FMT_FREQ "48000" + SKL_TKN_U32_FMT_BIT_DEPTH "32" + SKL_TKN_U32_FMT_CH_CONFIG "1" + SKL_TKN_U32_FMT_INTERLEAVE "0" + SKL_TKN_U32_FMT_SAMPLE_SIZE "24" + SKL_TKN_U32_FMT_SAMPLE_TYPE "0" + SKL_TKN_U32_FMT_CH_MAP "4294967056" + } + + tuples."word.u32_mod_type_2_intf_2_output_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_MM_U32_INTF_PIN_ID "0" + SKL_TKN_U32_FMT_CH "2" + SKL_TKN_U32_FMT_FREQ "48000" + SKL_TKN_U32_FMT_BIT_DEPTH "32" + SKL_TKN_U32_FMT_CH_CONFIG "1" + SKL_TKN_U32_FMT_INTERLEAVE "0" + SKL_TKN_U32_FMT_SAMPLE_SIZE "32" + SKL_TKN_U32_FMT_SAMPLE_TYPE "0" + SKL_TKN_U32_FMT_CH_MAP "4294967056" + } + + tuples."word.u32_mod_type_2_intf_3" { + SKL_TKN_MM_U32_FMT_ID "3" + SKL_TKN_MM_U32_NUM_IN_FMT "1" + SKL_TKN_MM_U32_NUM_OUT_FMT "1" + } + + tuples."word.u32_mod_type_2_intf_3_input_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_MM_U32_INTF_PIN_ID "0" + SKL_TKN_U32_FMT_CH "2" + SKL_TKN_U32_FMT_FREQ "48000" + SKL_TKN_U32_FMT_BIT_DEPTH "32" + SKL_TKN_U32_FMT_CH_CONFIG "1" + SKL_TKN_U32_FMT_INTERLEAVE "0" + SKL_TKN_U32_FMT_SAMPLE_SIZE "32" + SKL_TKN_U32_FMT_SAMPLE_TYPE "0" + SKL_TKN_U32_FMT_CH_MAP "4294967056" + } + + tuples."word.u32_mod_type_2_intf_3_output_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_MM_U32_INTF_PIN_ID "0" + SKL_TKN_U32_FMT_CH "2" + SKL_TKN_U32_FMT_FREQ "48000" + SKL_TKN_U32_FMT_BIT_DEPTH "32" + SKL_TKN_U32_FMT_CH_CONFIG "1" + SKL_TKN_U32_FMT_INTERLEAVE "0" + SKL_TKN_U32_FMT_SAMPLE_SIZE "24" + SKL_TKN_U32_FMT_SAMPLE_TYPE "0" + SKL_TKN_U32_FMT_CH_MAP "4294967056" + } + + tuples."word.u32_mod_type_2_intf_4" { + SKL_TKN_MM_U32_FMT_ID "4" + SKL_TKN_MM_U32_NUM_IN_FMT "1" + SKL_TKN_MM_U32_NUM_OUT_FMT "1" + } + + tuples."word.u32_mod_type_2_intf_4_input_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_MM_U32_INTF_PIN_ID "0" + SKL_TKN_U32_FMT_CH "2" + SKL_TKN_U32_FMT_FREQ "48000" + SKL_TKN_U32_FMT_BIT_DEPTH "16" + SKL_TKN_U32_FMT_CH_CONFIG "1" + SKL_TKN_U32_FMT_INTERLEAVE "0" + SKL_TKN_U32_FMT_SAMPLE_SIZE "16" + SKL_TKN_U32_FMT_SAMPLE_TYPE "0" + SKL_TKN_U32_FMT_CH_MAP "4294967056" + } + + tuples."word.u32_mod_type_2_intf_4_output_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_MM_U32_INTF_PIN_ID "0" + SKL_TKN_U32_FMT_CH "2" + SKL_TKN_U32_FMT_FREQ "48000" + SKL_TKN_U32_FMT_BIT_DEPTH "16" + SKL_TKN_U32_FMT_CH_CONFIG "1" + SKL_TKN_U32_FMT_INTERLEAVE "0" + SKL_TKN_U32_FMT_SAMPLE_SIZE "16" + SKL_TKN_U32_FMT_SAMPLE_TYPE "0" + SKL_TKN_U32_FMT_CH_MAP "4294967056" + } + + tuples."word.u32_mod_type_2_intf_5" { + SKL_TKN_MM_U32_FMT_ID "5" + SKL_TKN_MM_U32_NUM_IN_FMT "1" + SKL_TKN_MM_U32_NUM_OUT_FMT "1" + } + + tuples."word.u32_mod_type_2_intf_5_input_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_MM_U32_INTF_PIN_ID "0" + SKL_TKN_U32_FMT_CH "4" + SKL_TKN_U32_FMT_FREQ "48000" + SKL_TKN_U32_FMT_BIT_DEPTH "16" + SKL_TKN_U32_FMT_CH_CONFIG "5" + SKL_TKN_U32_FMT_INTERLEAVE "0" + SKL_TKN_U32_FMT_SAMPLE_SIZE "16" + SKL_TKN_U32_FMT_SAMPLE_TYPE "0" + SKL_TKN_U32_FMT_CH_MAP "4294914576" + } + + tuples."word.u32_mod_type_2_intf_5_output_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_MM_U32_INTF_PIN_ID "0" + SKL_TKN_U32_FMT_CH "4" + SKL_TKN_U32_FMT_FREQ "48000" + SKL_TKN_U32_FMT_BIT_DEPTH "16" + SKL_TKN_U32_FMT_CH_CONFIG "5" + SKL_TKN_U32_FMT_INTERLEAVE "0" + SKL_TKN_U32_FMT_SAMPLE_SIZE "16" + SKL_TKN_U32_FMT_SAMPLE_TYPE "0" + SKL_TKN_U32_FMT_CH_MAP "4294914576" + } + + tuples."word.u32_mod_type_2_intf_6" { + SKL_TKN_MM_U32_FMT_ID "6" + SKL_TKN_MM_U32_NUM_IN_FMT "1" + SKL_TKN_MM_U32_NUM_OUT_FMT "1" + } + + tuples."word.u32_mod_type_2_intf_6_input_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_MM_U32_INTF_PIN_ID "0" + SKL_TKN_U32_FMT_CH "6" + SKL_TKN_U32_FMT_FREQ "48000" + SKL_TKN_U32_FMT_BIT_DEPTH "16" + SKL_TKN_U32_FMT_CH_CONFIG "8" + SKL_TKN_U32_FMT_INTERLEAVE "0" + SKL_TKN_U32_FMT_SAMPLE_SIZE "16" + SKL_TKN_U32_FMT_SAMPLE_TYPE "0" + SKL_TKN_U32_FMT_CH_MAP "4283707920" + } + + tuples."word.u32_mod_type_2_intf_6_output_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_MM_U32_INTF_PIN_ID "0" + SKL_TKN_U32_FMT_CH "6" + SKL_TKN_U32_FMT_FREQ "48000" + SKL_TKN_U32_FMT_BIT_DEPTH "16" + SKL_TKN_U32_FMT_CH_CONFIG "8" + SKL_TKN_U32_FMT_INTERLEAVE "0" + SKL_TKN_U32_FMT_SAMPLE_SIZE "16" + SKL_TKN_U32_FMT_SAMPLE_TYPE "0" + SKL_TKN_U32_FMT_CH_MAP "4283707920" + } + + tuples."word.u32_mod_type_2_intf_7" { + SKL_TKN_MM_U32_FMT_ID "7" + SKL_TKN_MM_U32_NUM_IN_FMT "1" + SKL_TKN_MM_U32_NUM_OUT_FMT "1" + } + + tuples."word.u32_mod_type_2_intf_7_input_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_MM_U32_INTF_PIN_ID "0" + SKL_TKN_U32_FMT_CH "8" + SKL_TKN_U32_FMT_FREQ "48000" + SKL_TKN_U32_FMT_BIT_DEPTH "16" + SKL_TKN_U32_FMT_CH_CONFIG "14" + SKL_TKN_U32_FMT_INTERLEAVE "0" + SKL_TKN_U32_FMT_SAMPLE_SIZE "16" + SKL_TKN_U32_FMT_SAMPLE_TYPE "0" + SKL_TKN_U32_FMT_CH_MAP "1985229328" + } + + tuples."word.u32_mod_type_2_intf_7_output_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_MM_U32_INTF_PIN_ID "0" + SKL_TKN_U32_FMT_CH "8" + SKL_TKN_U32_FMT_FREQ "48000" + SKL_TKN_U32_FMT_BIT_DEPTH "16" + SKL_TKN_U32_FMT_CH_CONFIG "14" + SKL_TKN_U32_FMT_INTERLEAVE "0" + SKL_TKN_U32_FMT_SAMPLE_SIZE "16" + SKL_TKN_U32_FMT_SAMPLE_TYPE "0" + SKL_TKN_U32_FMT_CH_MAP "1985229328" + } + + tuples."word.u32_mod_type_2_intf_8" { + SKL_TKN_MM_U32_FMT_ID "8" + SKL_TKN_MM_U32_NUM_IN_FMT "1" + SKL_TKN_MM_U32_NUM_OUT_FMT "1" + } + + tuples."word.u32_mod_type_2_intf_8_input_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_MM_U32_INTF_PIN_ID "0" + SKL_TKN_U32_FMT_CH "2" + SKL_TKN_U32_FMT_FREQ "48000" + SKL_TKN_U32_FMT_BIT_DEPTH "32" + SKL_TKN_U32_FMT_CH_CONFIG "1" + SKL_TKN_U32_FMT_INTERLEAVE "0" + SKL_TKN_U32_FMT_SAMPLE_SIZE "32" + SKL_TKN_U32_FMT_SAMPLE_TYPE "0" + SKL_TKN_U32_FMT_CH_MAP "4294967056" + } + + tuples."word.u32_mod_type_2_intf_8_output_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_MM_U32_INTF_PIN_ID "0" + SKL_TKN_U32_FMT_CH "2" + SKL_TKN_U32_FMT_FREQ "48000" + SKL_TKN_U32_FMT_BIT_DEPTH "16" + SKL_TKN_U32_FMT_CH_CONFIG "1" + SKL_TKN_U32_FMT_INTERLEAVE "0" + SKL_TKN_U32_FMT_SAMPLE_SIZE "16" + SKL_TKN_U32_FMT_SAMPLE_TYPE "0" + SKL_TKN_U32_FMT_CH_MAP "4294967056" + } + + tuples."word.u32_mod_type_2_intf_9" { + SKL_TKN_MM_U32_FMT_ID "9" + SKL_TKN_MM_U32_NUM_IN_FMT "1" + SKL_TKN_MM_U32_NUM_OUT_FMT "1" + } + + tuples."word.u32_mod_type_2_intf_9_input_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_MM_U32_INTF_PIN_ID "0" + SKL_TKN_U32_FMT_CH "2" + SKL_TKN_U32_FMT_FREQ "48000" + SKL_TKN_U32_FMT_BIT_DEPTH "16" + SKL_TKN_U32_FMT_CH_CONFIG "1" + SKL_TKN_U32_FMT_INTERLEAVE "0" + SKL_TKN_U32_FMT_SAMPLE_SIZE "16" + SKL_TKN_U32_FMT_SAMPLE_TYPE "0" + SKL_TKN_U32_FMT_CH_MAP "4294967056" + } + + tuples."word.u32_mod_type_2_intf_9_output_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_MM_U32_INTF_PIN_ID "0" + SKL_TKN_U32_FMT_CH "2" + SKL_TKN_U32_FMT_FREQ "48000" + SKL_TKN_U32_FMT_BIT_DEPTH "32" + SKL_TKN_U32_FMT_CH_CONFIG "1" + SKL_TKN_U32_FMT_INTERLEAVE "0" + SKL_TKN_U32_FMT_SAMPLE_SIZE "32" + SKL_TKN_U32_FMT_SAMPLE_TYPE "0" + SKL_TKN_U32_FMT_CH_MAP "4294967056" + } + + tuples."word.u32_mod_type_2_intf_10" { + SKL_TKN_MM_U32_FMT_ID "10" + SKL_TKN_MM_U32_NUM_IN_FMT "1" + SKL_TKN_MM_U32_NUM_OUT_FMT "1" + } + + tuples."word.u32_mod_type_2_intf_10_input_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_MM_U32_INTF_PIN_ID "0" + SKL_TKN_U32_FMT_CH "2" + SKL_TKN_U32_FMT_FREQ "48000" + SKL_TKN_U32_FMT_BIT_DEPTH "16" + SKL_TKN_U32_FMT_CH_CONFIG "1" + SKL_TKN_U32_FMT_INTERLEAVE "0" + SKL_TKN_U32_FMT_SAMPLE_SIZE "16" + SKL_TKN_U32_FMT_SAMPLE_TYPE "0" + SKL_TKN_U32_FMT_CH_MAP "4294967056" + } + + tuples."word.u32_mod_type_2_intf_10_output_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_MM_U32_INTF_PIN_ID "0" + SKL_TKN_U32_FMT_CH "2" + SKL_TKN_U32_FMT_FREQ "48000" + SKL_TKN_U32_FMT_BIT_DEPTH "16" + SKL_TKN_U32_FMT_CH_CONFIG "1" + SKL_TKN_U32_FMT_INTERLEAVE "0" + SKL_TKN_U32_FMT_SAMPLE_SIZE "16" + SKL_TKN_U32_FMT_SAMPLE_TYPE "0" + SKL_TKN_U32_FMT_CH_MAP "4294967056" + } + + tuples."word.u32_mod_type_2_intf_11" { + SKL_TKN_MM_U32_FMT_ID "11" + SKL_TKN_MM_U32_NUM_IN_FMT "1" + SKL_TKN_MM_U32_NUM_OUT_FMT "1" + } + + tuples."word.u32_mod_type_2_intf_11_input_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_MM_U32_INTF_PIN_ID "0" + SKL_TKN_U32_FMT_CH "2" + SKL_TKN_U32_FMT_FREQ "48000" + SKL_TKN_U32_FMT_BIT_DEPTH "16" + SKL_TKN_U32_FMT_CH_CONFIG "1" + SKL_TKN_U32_FMT_INTERLEAVE "0" + SKL_TKN_U32_FMT_SAMPLE_SIZE "16" + SKL_TKN_U32_FMT_SAMPLE_TYPE "0" + SKL_TKN_U32_FMT_CH_MAP "4294967056" + } + + tuples."word.u32_mod_type_2_intf_11_output_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_MM_U32_INTF_PIN_ID "0" + SKL_TKN_U32_FMT_CH "2" + SKL_TKN_U32_FMT_FREQ "48000" + SKL_TKN_U32_FMT_BIT_DEPTH "32" + SKL_TKN_U32_FMT_CH_CONFIG "1" + SKL_TKN_U32_FMT_INTERLEAVE "0" + SKL_TKN_U32_FMT_SAMPLE_SIZE "32" + SKL_TKN_U32_FMT_SAMPLE_TYPE "0" + SKL_TKN_U32_FMT_CH_MAP "4294967056" + } + + tuples."word.u32_mod_type_2_intf_12" { + SKL_TKN_MM_U32_FMT_ID "12" + SKL_TKN_MM_U32_NUM_IN_FMT "1" + SKL_TKN_MM_U32_NUM_OUT_FMT "1" + } + + tuples."word.u32_mod_type_2_intf_12_input_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_MM_U32_INTF_PIN_ID "0" + SKL_TKN_U32_FMT_CH "2" + SKL_TKN_U32_FMT_FREQ "48000" + SKL_TKN_U32_FMT_BIT_DEPTH "32" + SKL_TKN_U32_FMT_CH_CONFIG "1" + SKL_TKN_U32_FMT_INTERLEAVE "0" + SKL_TKN_U32_FMT_SAMPLE_SIZE "32" + SKL_TKN_U32_FMT_SAMPLE_TYPE "0" + SKL_TKN_U32_FMT_CH_MAP "4294967056" + } + + tuples."word.u32_mod_type_2_intf_12_output_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_MM_U32_INTF_PIN_ID "0" + SKL_TKN_U32_FMT_CH "2" + SKL_TKN_U32_FMT_FREQ "48000" + SKL_TKN_U32_FMT_BIT_DEPTH "16" + SKL_TKN_U32_FMT_CH_CONFIG "1" + SKL_TKN_U32_FMT_INTERLEAVE "0" + SKL_TKN_U32_FMT_SAMPLE_SIZE "16" + SKL_TKN_U32_FMT_SAMPLE_TYPE "0" + SKL_TKN_U32_FMT_CH_MAP "4294967056" + } + + tuples."uuid.mod_3" { + SKL_TKN_UUID "12, 6, 248, 66, 47, 131, 191, 77, 178, 71, 81, 233, 97, 153, 123, 52" + } + + tuples."byte.u8_mod_type_3" { + SKL_TKN_MM_U8_MOD_IDX "3" + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_IN_QUEUE_COUNT "1" + SKL_TKN_U8_OUT_QUEUE_COUNT "1" + SKL_TKN_MM_U8_NUM_RES "1" + SKL_TKN_MM_U8_NUM_INTF "1" + } + + tuples."word.u32_mod_type_3_res_0" { + SKL_TKN_MM_U32_RES_ID "0" + SKL_TKN_U32_MEM_PAGES "1" + SKL_TKN_MM_U32_CPS "100000" + SKL_TKN_U32_IBS "384" + SKL_TKN_U32_OBS "384" + SKL_TKN_MM_U32_DMA_SIZE "0" + SKL_TKN_MM_U32_CPC "2106" + } + + tuples."word.u32_mod_type_3_res_0_input_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_MM_U32_RES_PIN_ID "0" + SKL_TKN_MM_U32_PIN_BUF "384" + } + + tuples."word.u32_mod_type_3_res_0_output_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_MM_U32_RES_PIN_ID "0" + SKL_TKN_MM_U32_PIN_BUF "384" + } + + tuples."word.u32_mod_type_3_intf_0" { + SKL_TKN_MM_U32_FMT_ID "0" + SKL_TKN_MM_U32_NUM_IN_FMT "1" + SKL_TKN_MM_U32_NUM_OUT_FMT "1" + } + + tuples."word.u32_mod_type_3_intf_0_input_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_MM_U32_INTF_PIN_ID "0" + SKL_TKN_U32_FMT_CH "2" + SKL_TKN_U32_FMT_FREQ "48000" + SKL_TKN_U32_FMT_BIT_DEPTH "32" + SKL_TKN_U32_FMT_CH_CONFIG "1" + SKL_TKN_U32_FMT_INTERLEAVE "0" + SKL_TKN_U32_FMT_SAMPLE_SIZE "32" + SKL_TKN_U32_FMT_SAMPLE_TYPE "0" + SKL_TKN_U32_FMT_CH_MAP "4294967056" + } + + tuples."word.u32_mod_type_3_intf_0_output_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_MM_U32_INTF_PIN_ID "0" + SKL_TKN_U32_FMT_CH "2" + SKL_TKN_U32_FMT_FREQ "48000" + SKL_TKN_U32_FMT_BIT_DEPTH "32" + SKL_TKN_U32_FMT_CH_CONFIG "1" + SKL_TKN_U32_FMT_INTERLEAVE "0" + SKL_TKN_U32_FMT_SAMPLE_SIZE "32" + SKL_TKN_U32_FMT_SAMPLE_TYPE "0" + SKL_TKN_U32_FMT_CH_MAP "4294967056" + } + + tuples."uuid.mod_4" { + SKL_TKN_UUID "141, 178, 27, 230, 154, 20, 31, 76, 183, 9, 70, 130, 62, 245, 245, 174" + } + + tuples."byte.u8_mod_type_4" { + SKL_TKN_MM_U8_MOD_IDX "4" + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_IN_QUEUE_COUNT "1" + SKL_TKN_U8_OUT_QUEUE_COUNT "1" + SKL_TKN_MM_U8_NUM_RES "1" + SKL_TKN_MM_U8_NUM_INTF "1" + } + + tuples."word.u32_mod_type_4_res_0" { + SKL_TKN_MM_U32_RES_ID "0" + SKL_TKN_U32_MEM_PAGES "4" + SKL_TKN_MM_U32_CPS "100000" + SKL_TKN_U32_IBS "384" + SKL_TKN_U32_OBS "384" + SKL_TKN_MM_U32_DMA_SIZE "0" + SKL_TKN_MM_U32_CPC "10157" + } + + tuples."word.u32_mod_type_4_res_0_input_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_MM_U32_RES_PIN_ID "0" + SKL_TKN_MM_U32_PIN_BUF "384" + } + + tuples."word.u32_mod_type_4_res_0_output_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_MM_U32_RES_PIN_ID "0" + SKL_TKN_MM_U32_PIN_BUF "384" + } + + tuples."word.u32_mod_type_4_intf_0" { + SKL_TKN_MM_U32_FMT_ID "0" + SKL_TKN_MM_U32_NUM_IN_FMT "1" + SKL_TKN_MM_U32_NUM_OUT_FMT "1" + } + + tuples."word.u32_mod_type_4_intf_0_input_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_MM_U32_INTF_PIN_ID "0" + SKL_TKN_U32_FMT_CH "2" + SKL_TKN_U32_FMT_FREQ "48000" + SKL_TKN_U32_FMT_BIT_DEPTH "32" + SKL_TKN_U32_FMT_CH_CONFIG "1" + SKL_TKN_U32_FMT_INTERLEAVE "0" + SKL_TKN_U32_FMT_SAMPLE_SIZE "32" + SKL_TKN_U32_FMT_SAMPLE_TYPE "0" + SKL_TKN_U32_FMT_CH_MAP "4294967056" + } + + tuples."word.u32_mod_type_4_intf_0_output_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_MM_U32_INTF_PIN_ID "0" + SKL_TKN_U32_FMT_CH "2" + SKL_TKN_U32_FMT_FREQ "48000" + SKL_TKN_U32_FMT_BIT_DEPTH "32" + SKL_TKN_U32_FMT_CH_CONFIG "1" + SKL_TKN_U32_FMT_INTERLEAVE "0" + SKL_TKN_U32_FMT_SAMPLE_SIZE "32" + SKL_TKN_U32_FMT_SAMPLE_TYPE "0" + SKL_TKN_U32_FMT_CH_MAP "4294967056" + } +} + +SectionData."mod_type_data" { + tuples "mod_type_data" +} + +SectionVendorTuples."media0_in cpr 0 num_desc" { + tokens "skl_tokens" + + tuples."byte.u8_num_blocks" { + SKL_TKN_U8_NUM_BLOCKS "1" + } +} + +SectionData."media0_in cpr 0 num_desc" { + tuples "media0_in cpr 0 num_desc" +} + +SectionVendorTuples."media0_in cpr 0_size_desc" { + tokens "skl_tokens" + + tuples."byte.u8_block_type" { + SKL_TKN_U8_BLOCK_TYPE "0" + } + + tuples."short.u16_size_desc" { + SKL_TKN_U16_BLOCK_SIZE "500" + } +} + +SectionData."media0_in cpr 0_size_desc" { + tuples "media0_in cpr 0_size_desc" +} + +SectionVendorTuples."media0_in cpr 0" { + tokens "skl_tokens" + + tuples."uuid" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } + + tuples."byte.u8_data" { + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_DYN_IN_PIN "1" + SKL_TKN_U8_DYN_OUT_PIN "0" + SKL_TKN_U8_TIME_SLOT "0" + SKL_TKN_U8_CORE_ID "0" + SKL_TKN_U8_MODULE_TYPE "1" + SKL_TKN_U8_CONN_TYPE "1" + SKL_TKN_U8_HW_CONN_TYPE "1" + SKL_TKN_U8_DEV_TYPE "5" + } + + tuples."short.u16_data" { + SKL_TKN_U16_MOD_INST_ID "0" + } + + tuples."word.u32_data" { + SKL_TKN_U32_VBUS_ID "4294967295" + SKL_TKN_U32_PARAMS_FIXUP "0" + SKL_TKN_U32_CONVERTER "0" + SKL_TKN_U32_PIPE_ID "0" + SKL_TKN_U32_PIPE_CONN_TYPE "1" + SKL_TKN_U32_PIPE_PRIORITY "0" + SKL_TKN_U32_PMODE "0" + SKL_TKN_U32_D0I3_CAPS "1" + SKL_TKN_U32_PROC_DOMAIN "0" + SKL_TKN_U32_PIPE_DIRECTION "0" + SKL_TKN_U32_NUM_CONFIGS "1" + SKL_TKN_U32_DMA_BUF_SIZE "2" + } + + tuples."word._pipe_0" { + SKL_TKN_U32_PIPE_CONFIG_ID "0" + SKL_TKN_U32_PATH_MEM_PGS "8" + } + + tuples."word._pipe_u32_cfg_in_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_in_fmt_0" { + SKL_TKN_U8_CFG_BPS "16" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."word._pipe_u32_cfg_out_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_out_fmt_0" { + SKL_TKN_U8_CFG_BPS "32" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."short.u16_pipe_mod_cfg_0" { + SKL_TKN_CFG_MOD_RES_ID "0" + SKL_TKN_CFG_MOD_FMT_ID "0" + } + + tuples."word.in_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_PIN_MOD_ID "7" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."uuid.out_pin_0" { + SKL_TKN_UUID "12, 6, 248, 66, 47, 131, 191, 77, 178, 71, 81, 233, 97, 153, 123, 52" + } + + tuples."word.out_pin_1" { + SKL_TKN_U32_DIR_PIN_COUNT "17" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."uuid.out_pin_1" { + SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0" + } + + tuples."word.out_pin_2" { + SKL_TKN_U32_DIR_PIN_COUNT "33" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."uuid.out_pin_2" { + SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0" + } + + tuples."word.out_pin_3" { + SKL_TKN_U32_DIR_PIN_COUNT "49" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."uuid.out_pin_3" { + SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0" + } +} + +SectionData."media0_in cpr 0" { + tuples "media0_in cpr 0" +} + +SectionWidget."media0_in cpr 0" { + index "0" + type "mixer" + no_pm "true" + event_type "3" + event_flags "9" + + data [ + "media0_in cpr 0 num_desc" + "media0_in cpr 0_size_desc" + "media0_in cpr 0" + ] +} + +SectionVendorTuples."media0_in updwmix 0 num_desc" { + tokens "skl_tokens" + + tuples."byte.u8_num_blocks" { + SKL_TKN_U8_NUM_BLOCKS "1" + } +} + +SectionData."media0_in updwmix 0 num_desc" { + tuples "media0_in updwmix 0 num_desc" +} + +SectionVendorTuples."media0_in updwmix 0_size_desc" { + tokens "skl_tokens" + + tuples."byte.u8_block_type" { + SKL_TKN_U8_BLOCK_TYPE "0" + } + + tuples."short.u16_size_desc" { + SKL_TKN_U16_BLOCK_SIZE "388" + } +} + +SectionData."media0_in updwmix 0_size_desc" { + tuples "media0_in updwmix 0_size_desc" +} + +SectionVendorTuples."media0_in updwmix 0" { + tokens "skl_tokens" + + tuples."uuid" { + SKL_TKN_UUID "12, 6, 248, 66, 47, 131, 191, 77, 178, 71, 81, 233, 97, 153, 123, 52" + } + + tuples."byte.u8_data" { + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_DYN_IN_PIN "0" + SKL_TKN_U8_DYN_OUT_PIN "0" + SKL_TKN_U8_TIME_SLOT "0" + SKL_TKN_U8_CORE_ID "0" + SKL_TKN_U8_MODULE_TYPE "2" + SKL_TKN_U8_CONN_TYPE "0" + SKL_TKN_U8_HW_CONN_TYPE "1" + SKL_TKN_U8_DEV_TYPE "6" + } + + tuples."short.u16_data" { + SKL_TKN_U16_MOD_INST_ID "0" + } + + tuples."word.u32_data" { + SKL_TKN_U32_VBUS_ID "4294967295" + SKL_TKN_U32_PARAMS_FIXUP "0" + SKL_TKN_U32_CONVERTER "0" + SKL_TKN_U32_PIPE_ID "0" + SKL_TKN_U32_PIPE_CONN_TYPE "1" + SKL_TKN_U32_PIPE_PRIORITY "0" + SKL_TKN_U32_PMODE "0" + SKL_TKN_U32_D0I3_CAPS "1" + SKL_TKN_U32_PROC_DOMAIN "0" + SKL_TKN_U32_PIPE_DIRECTION "0" + SKL_TKN_U32_NUM_CONFIGS "1" + SKL_TKN_U32_DMA_BUF_SIZE "2" + } + + tuples."word._pipe_0" { + SKL_TKN_U32_PIPE_CONFIG_ID "0" + SKL_TKN_U32_PATH_MEM_PGS "8" + } + + tuples."word._pipe_u32_cfg_in_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_in_fmt_0" { + SKL_TKN_U8_CFG_BPS "16" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."word._pipe_u32_cfg_out_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_out_fmt_0" { + SKL_TKN_U8_CFG_BPS "32" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."short.u16_pipe_mod_cfg_0" { + SKL_TKN_CFG_MOD_RES_ID "0" + SKL_TKN_CFG_MOD_FMT_ID "0" + } + + tuples."word.in_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_PIN_MOD_ID "2" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."uuid.in_pin_0" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } + + tuples."word.out_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_PIN_MOD_ID "8" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."uuid.out_pin_0" { + SKL_TKN_UUID "141, 178, 27, 230, 154, 20, 31, 76, 183, 9, 70, 130, 62, 245, 245, 174" + } +} + +SectionData."media0_in updwmix 0" { + tuples "media0_in updwmix 0" +} + +SectionWidget."media0_in updwmix 0" { + index "0" + type "pga" + no_pm "true" + event_type "4" + + data [ + "media0_in updwmix 0 num_desc" + "media0_in updwmix 0_size_desc" + "media0_in updwmix 0" + ] +} + +SectionVendorTuples."media0_in srcintc 0 num_desc" { + tokens "skl_tokens" + + tuples."byte.u8_num_blocks" { + SKL_TKN_U8_NUM_BLOCKS "1" + } +} + +SectionData."media0_in srcintc 0 num_desc" { + tuples "media0_in srcintc 0 num_desc" +} + +SectionVendorTuples."media0_in srcintc 0_size_desc" { + tokens "skl_tokens" + + tuples."byte.u8_block_type" { + SKL_TKN_U8_BLOCK_TYPE "0" + } + + tuples."short.u16_size_desc" { + SKL_TKN_U16_BLOCK_SIZE "388" + } +} + +SectionData."media0_in srcintc 0_size_desc" { + tuples "media0_in srcintc 0_size_desc" +} + +SectionVendorTuples."media0_in srcintc 0" { + tokens "skl_tokens" + + tuples."uuid" { + SKL_TKN_UUID "141, 178, 27, 230, 154, 20, 31, 76, 183, 9, 70, 130, 62, 245, 245, 174" + } + + tuples."byte.u8_data" { + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_DYN_IN_PIN "0" + SKL_TKN_U8_DYN_OUT_PIN "0" + SKL_TKN_U8_TIME_SLOT "0" + SKL_TKN_U8_CORE_ID "0" + SKL_TKN_U8_MODULE_TYPE "3" + SKL_TKN_U8_CONN_TYPE "0" + SKL_TKN_U8_HW_CONN_TYPE "1" + SKL_TKN_U8_DEV_TYPE "6" + } + + tuples."short.u16_data" { + SKL_TKN_U16_MOD_INST_ID "0" + } + + tuples."word.u32_data" { + SKL_TKN_U32_VBUS_ID "4294967295" + SKL_TKN_U32_PARAMS_FIXUP "0" + SKL_TKN_U32_CONVERTER "0" + SKL_TKN_U32_PIPE_ID "0" + SKL_TKN_U32_PIPE_CONN_TYPE "1" + SKL_TKN_U32_PIPE_PRIORITY "0" + SKL_TKN_U32_PMODE "0" + SKL_TKN_U32_D0I3_CAPS "1" + SKL_TKN_U32_PROC_DOMAIN "1" + SKL_TKN_U32_PIPE_DIRECTION "0" + SKL_TKN_U32_NUM_CONFIGS "1" + SKL_TKN_U32_DMA_BUF_SIZE "2" + } + + tuples."word._pipe_0" { + SKL_TKN_U32_PIPE_CONFIG_ID "0" + SKL_TKN_U32_PATH_MEM_PGS "8" + } + + tuples."word._pipe_u32_cfg_in_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_in_fmt_0" { + SKL_TKN_U8_CFG_BPS "16" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."word._pipe_u32_cfg_out_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_out_fmt_0" { + SKL_TKN_U8_CFG_BPS "32" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."short.u16_pipe_mod_cfg_0" { + SKL_TKN_CFG_MOD_RES_ID "0" + SKL_TKN_CFG_MOD_FMT_ID "0" + } + + tuples."word.in_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_PIN_MOD_ID "7" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."uuid.in_pin_0" { + SKL_TKN_UUID "12, 6, 248, 66, 47, 131, 191, 77, 178, 71, 81, 233, 97, 153, 123, 52" + } + + tuples."word.out_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."uuid.out_pin_0" { + SKL_TKN_UUID "178, 110, 101, 57, 113, 59, 73, 64, 141, 63, 249, 44, 213, 196, 60, 9" + } +} + +SectionData."media0_in srcintc 0" { + tuples "media0_in srcintc 0" +} + +SectionWidget."media0_in srcintc 0" { + index "0" + type "pga" + no_pm "true" + event_type "4" + + data [ + "media0_in srcintc 0 num_desc" + "media0_in srcintc 0_size_desc" + "media0_in srcintc 0" + ] +} + +SectionVendorTuples."media0_in mi num_desc" { + tokens "skl_tokens" + + tuples."byte.u8_num_blocks" { + SKL_TKN_U8_NUM_BLOCKS "1" + } +} + +SectionData."media0_in mi num_desc" { + tuples "media0_in mi num_desc" +} + +SectionVendorTuples."media0_in mi_size_desc" { + tokens "skl_tokens" + + tuples."byte.u8_block_type" { + SKL_TKN_U8_BLOCK_TYPE "0" + } + + tuples."short.u16_size_desc" { + SKL_TKN_U16_BLOCK_SIZE "416" + } +} + +SectionData."media0_in mi_size_desc" { + tuples "media0_in mi_size_desc" +} + +SectionVendorTuples."media0_in mi" { + tokens "skl_tokens" + + tuples."uuid" { + SKL_TKN_UUID "178, 110, 101, 57, 113, 59, 73, 64, 141, 63, 249, 44, 213, 196, 60, 9" + } + + tuples."byte.u8_data" { + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_DYN_IN_PIN "0" + SKL_TKN_U8_DYN_OUT_PIN "1" + SKL_TKN_U8_TIME_SLOT "0" + SKL_TKN_U8_CORE_ID "0" + SKL_TKN_U8_MODULE_TYPE "0" + SKL_TKN_U8_CONN_TYPE "0" + SKL_TKN_U8_HW_CONN_TYPE "1" + SKL_TKN_U8_DEV_TYPE "6" + } + + tuples."short.u16_data" { + SKL_TKN_U16_MOD_INST_ID "0" + } + + tuples."word.u32_data" { + SKL_TKN_U32_VBUS_ID "4294967295" + SKL_TKN_U32_PARAMS_FIXUP "0" + SKL_TKN_U32_CONVERTER "0" + SKL_TKN_U32_PIPE_ID "0" + SKL_TKN_U32_PIPE_CONN_TYPE "1" + SKL_TKN_U32_PIPE_PRIORITY "0" + SKL_TKN_U32_PMODE "0" + SKL_TKN_U32_D0I3_CAPS "1" + SKL_TKN_U32_PROC_DOMAIN "0" + SKL_TKN_U32_PIPE_DIRECTION "0" + SKL_TKN_U32_NUM_CONFIGS "1" + SKL_TKN_U32_DMA_BUF_SIZE "2" + } + + tuples."word._pipe_0" { + SKL_TKN_U32_PIPE_CONFIG_ID "0" + SKL_TKN_U32_PATH_MEM_PGS "8" + } + + tuples."word._pipe_u32_cfg_in_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_in_fmt_0" { + SKL_TKN_U8_CFG_BPS "16" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."word._pipe_u32_cfg_out_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_out_fmt_0" { + SKL_TKN_U8_CFG_BPS "32" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."short.u16_pipe_mod_cfg_0" { + SKL_TKN_CFG_MOD_RES_ID "0" + SKL_TKN_CFG_MOD_FMT_ID "0" + } + + tuples."word.in_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_PIN_MOD_ID "8" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."uuid.in_pin_0" { + SKL_TKN_UUID "141, 178, 27, 230, 154, 20, 31, 76, 183, 9, 70, 130, 62, 245, 245, 174" + } + + tuples."word.out_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_1" { + SKL_TKN_U32_DIR_PIN_COUNT "17" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_2" { + SKL_TKN_U32_DIR_PIN_COUNT "33" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } +} + +SectionData."media0_in mi" { + tuples "media0_in mi" +} + +SectionWidget."media0_in mi" { + index "0" + type "pga" + no_pm "true" + subseq "10" + event_type "4" + event_flags "9" + + data [ + "media0_in mi num_desc" + "media0_in mi_size_desc" + "media0_in mi" + ] +} + +SectionVendorTuples."codec0_out mo num_desc" { + tokens "skl_tokens" + + tuples."byte.u8_num_blocks" { + SKL_TKN_U8_NUM_BLOCKS "1" + } +} + +SectionData."codec0_out mo num_desc" { + tuples "codec0_out mo num_desc" +} + +SectionVendorTuples."codec0_out mo_size_desc" { + tokens "skl_tokens" + + tuples."byte.u8_block_type" { + SKL_TKN_U8_BLOCK_TYPE "0" + } + + tuples."short.u16_size_desc" { + SKL_TKN_U16_BLOCK_SIZE "536" + } +} + +SectionData."codec0_out mo_size_desc" { + tuples "codec0_out mo_size_desc" +} + +SectionVendorTuples."codec0_out mo" { + tokens "skl_tokens" + + tuples."uuid" { + SKL_TKN_UUID "90, 80, 86, 60, 215, 36, 143, 65, 189, 220, 193, 245, 163, 172, 42, 224" + } + + tuples."byte.u8_data" { + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_DYN_IN_PIN "1" + SKL_TKN_U8_DYN_OUT_PIN "0" + SKL_TKN_U8_TIME_SLOT "0" + SKL_TKN_U8_CORE_ID "0" + SKL_TKN_U8_MODULE_TYPE "0" + SKL_TKN_U8_CONN_TYPE "0" + SKL_TKN_U8_HW_CONN_TYPE "1" + SKL_TKN_U8_DEV_TYPE "6" + } + + tuples."short.u16_data" { + SKL_TKN_U16_MOD_INST_ID "0" + } + + tuples."word.u32_data" { + SKL_TKN_U32_VBUS_ID "4294967295" + SKL_TKN_U32_PARAMS_FIXUP "0" + SKL_TKN_U32_CONVERTER "0" + SKL_TKN_U32_PIPE_ID "1" + SKL_TKN_U32_PIPE_CONN_TYPE "2" + SKL_TKN_U32_PIPE_PRIORITY "0" + SKL_TKN_U32_PMODE "0" + SKL_TKN_U32_D0I3_CAPS "0" + SKL_TKN_U32_PROC_DOMAIN "0" + SKL_TKN_U32_PIPE_DIRECTION "0" + SKL_TKN_U32_NUM_CONFIGS "1" + SKL_TKN_U32_DMA_BUF_SIZE "2" + } + + tuples."word._pipe_0" { + SKL_TKN_U32_PIPE_CONFIG_ID "0" + SKL_TKN_U32_PATH_MEM_PGS "1" + } + + tuples."word._pipe_u32_cfg_in_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_in_fmt_0" { + SKL_TKN_U8_CFG_BPS "32" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."word._pipe_u32_cfg_out_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_out_fmt_0" { + SKL_TKN_U8_CFG_BPS "16" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."short.u16_pipe_mod_cfg_0" { + SKL_TKN_CFG_MOD_RES_ID "0" + SKL_TKN_CFG_MOD_FMT_ID "0" + } + + tuples."word.in_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_1" { + SKL_TKN_U32_DIR_PIN_COUNT "16" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_2" { + SKL_TKN_U32_DIR_PIN_COUNT "32" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_3" { + SKL_TKN_U32_DIR_PIN_COUNT "48" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_4" { + SKL_TKN_U32_DIR_PIN_COUNT "64" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_5" { + SKL_TKN_U32_DIR_PIN_COUNT "80" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_6" { + SKL_TKN_U32_DIR_PIN_COUNT "96" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_7" { + SKL_TKN_U32_DIR_PIN_COUNT "112" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_PIN_MOD_ID "2" + SKL_TKN_U32_PIN_INST_ID "1" + } + + tuples."uuid.out_pin_0" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } +} + +SectionData."codec0_out mo" { + tuples "codec0_out mo" +} + +SectionWidget."codec0_out mo" { + index "0" + type "mixer" + no_pm "true" + subseq "10" + event_type "1" + event_flags "15" + + mixer [ + "media0_in mi Switch" + ] + + data [ + "codec0_out mo num_desc" + "codec0_out mo_size_desc" + "codec0_out mo" + ] +} + +SectionVendorTuples."codec0_out cpr 1 num_desc" { + tokens "skl_tokens" + + tuples."byte.u8_num_blocks" { + SKL_TKN_U8_NUM_BLOCKS "1" + } +} + +SectionData."codec0_out cpr 1 num_desc" { + tuples "codec0_out cpr 1 num_desc" +} + +SectionVendorTuples."codec0_out cpr 1_size_desc" { + tokens "skl_tokens" + + tuples."byte.u8_block_type" { + SKL_TKN_U8_BLOCK_TYPE "0" + } + + tuples."short.u16_size_desc" { + SKL_TKN_U16_BLOCK_SIZE "440" + } +} + +SectionData."codec0_out cpr 1_size_desc" { + tuples "codec0_out cpr 1_size_desc" +} + +SectionVendorTuples."codec0_out cpr 1" { + tokens "skl_tokens" + + tuples."uuid" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } + + tuples."byte.u8_data" { + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_DYN_IN_PIN "0" + SKL_TKN_U8_DYN_OUT_PIN "1" + SKL_TKN_U8_TIME_SLOT "0" + SKL_TKN_U8_CORE_ID "0" + SKL_TKN_U8_MODULE_TYPE "1" + SKL_TKN_U8_CONN_TYPE "2" + SKL_TKN_U8_HW_CONN_TYPE "1" + SKL_TKN_U8_DEV_TYPE "4" + } + + tuples."short.u16_data" { + SKL_TKN_U16_MOD_INST_ID "1" + } + + tuples."word.u32_data" { + SKL_TKN_U32_VBUS_ID "4294967295" + SKL_TKN_U32_PARAMS_FIXUP "0" + SKL_TKN_U32_CONVERTER "0" + SKL_TKN_U32_PIPE_ID "1" + SKL_TKN_U32_PIPE_CONN_TYPE "2" + SKL_TKN_U32_PIPE_PRIORITY "0" + SKL_TKN_U32_PMODE "0" + SKL_TKN_U32_D0I3_CAPS "0" + SKL_TKN_U32_PROC_DOMAIN "0" + SKL_TKN_U32_PIPE_DIRECTION "0" + SKL_TKN_U32_NUM_CONFIGS "1" + SKL_TKN_U32_DMA_BUF_SIZE "2" + } + + tuples."word._pipe_0" { + SKL_TKN_U32_PIPE_CONFIG_ID "0" + SKL_TKN_U32_PATH_MEM_PGS "1" + } + + tuples."word._pipe_u32_cfg_in_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_in_fmt_0" { + SKL_TKN_U8_CFG_BPS "32" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."word._pipe_u32_cfg_out_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_out_fmt_0" { + SKL_TKN_U8_CFG_BPS "16" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."short.u16_pipe_mod_cfg_0" { + SKL_TKN_CFG_MOD_RES_ID "1" + SKL_TKN_CFG_MOD_FMT_ID "1" + } + + tuples."word.in_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_PIN_MOD_ID "1" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."uuid.in_pin_0" { + SKL_TKN_UUID "90, 80, 86, 60, 215, 36, 143, 65, 189, 220, 193, 245, 163, 172, 42, 224" + } + + tuples."word.out_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_1" { + SKL_TKN_U32_DIR_PIN_COUNT "17" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_2" { + SKL_TKN_U32_DIR_PIN_COUNT "33" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_3" { + SKL_TKN_U32_DIR_PIN_COUNT "49" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } +} + +SectionData."codec0_out cpr 1" { + tuples "codec0_out cpr 1" +} + +SectionWidget."codec0_out cpr 1" { + index "0" + type "pga" + no_pm "true" + event_type "4" + + data [ + "codec0_out cpr 1 num_desc" + "codec0_out cpr 1_size_desc" + "codec0_out cpr 1" + ] +} + +SectionWidget."codec0_out" { + index "0" + type "aif_out" + no_pm "true" +} + +SectionVendorTuples."media1_in cpr 2 num_desc" { + tokens "skl_tokens" + + tuples."byte.u8_num_blocks" { + SKL_TKN_U8_NUM_BLOCKS "1" + } +} + +SectionData."media1_in cpr 2 num_desc" { + tuples "media1_in cpr 2 num_desc" +} + +SectionVendorTuples."media1_in cpr 2_size_desc" { + tokens "skl_tokens" + + tuples."byte.u8_block_type" { + SKL_TKN_U8_BLOCK_TYPE "0" + } + + tuples."short.u16_size_desc" { + SKL_TKN_U16_BLOCK_SIZE "500" + } +} + +SectionData."media1_in cpr 2_size_desc" { + tuples "media1_in cpr 2_size_desc" +} + +SectionVendorTuples."media1_in cpr 2" { + tokens "skl_tokens" + + tuples."uuid" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } + + tuples."byte.u8_data" { + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_DYN_IN_PIN "1" + SKL_TKN_U8_DYN_OUT_PIN "0" + SKL_TKN_U8_TIME_SLOT "0" + SKL_TKN_U8_CORE_ID "0" + SKL_TKN_U8_MODULE_TYPE "1" + SKL_TKN_U8_CONN_TYPE "1" + SKL_TKN_U8_HW_CONN_TYPE "1" + SKL_TKN_U8_DEV_TYPE "5" + } + + tuples."short.u16_data" { + SKL_TKN_U16_MOD_INST_ID "2" + } + + tuples."word.u32_data" { + SKL_TKN_U32_VBUS_ID "4294967295" + SKL_TKN_U32_PARAMS_FIXUP "0" + SKL_TKN_U32_CONVERTER "0" + SKL_TKN_U32_PIPE_ID "2" + SKL_TKN_U32_PIPE_CONN_TYPE "1" + SKL_TKN_U32_PIPE_PRIORITY "0" + SKL_TKN_U32_PMODE "0" + SKL_TKN_U32_D0I3_CAPS "1" + SKL_TKN_U32_PROC_DOMAIN "0" + SKL_TKN_U32_PIPE_DIRECTION "0" + SKL_TKN_U32_NUM_CONFIGS "1" + SKL_TKN_U32_DMA_BUF_SIZE "2" + } + + tuples."word._pipe_0" { + SKL_TKN_U32_PIPE_CONFIG_ID "0" + SKL_TKN_U32_PATH_MEM_PGS "1" + } + + tuples."word._pipe_u32_cfg_in_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_in_fmt_0" { + SKL_TKN_U8_CFG_BPS "16" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."word._pipe_u32_cfg_out_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_out_fmt_0" { + SKL_TKN_U8_CFG_BPS "32" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."short.u16_pipe_mod_cfg_0" { + SKL_TKN_CFG_MOD_RES_ID "0" + SKL_TKN_CFG_MOD_FMT_ID "0" + } + + tuples."word.in_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "1" + } + + tuples."uuid.out_pin_0" { + SKL_TKN_UUID "178, 110, 101, 57, 113, 59, 73, 64, 141, 63, 249, 44, 213, 196, 60, 9" + } + + tuples."word.out_pin_1" { + SKL_TKN_U32_DIR_PIN_COUNT "17" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."uuid.out_pin_1" { + SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0" + } + + tuples."word.out_pin_2" { + SKL_TKN_U32_DIR_PIN_COUNT "33" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."uuid.out_pin_2" { + SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0" + } + + tuples."word.out_pin_3" { + SKL_TKN_U32_DIR_PIN_COUNT "49" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."uuid.out_pin_3" { + SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0" + } +} + +SectionData."media1_in cpr 2" { + tuples "media1_in cpr 2" +} + +SectionWidget."media1_in cpr 2" { + index "0" + type "mixer" + no_pm "true" + event_type "3" + event_flags "9" + + data [ + "media1_in cpr 2 num_desc" + "media1_in cpr 2_size_desc" + "media1_in cpr 2" + ] +} + +SectionVendorTuples."media1_in mi num_desc" { + tokens "skl_tokens" + + tuples."byte.u8_num_blocks" { + SKL_TKN_U8_NUM_BLOCKS "1" + } +} + +SectionData."media1_in mi num_desc" { + tuples "media1_in mi num_desc" +} + +SectionVendorTuples."media1_in mi_size_desc" { + tokens "skl_tokens" + + tuples."byte.u8_block_type" { + SKL_TKN_U8_BLOCK_TYPE "0" + } + + tuples."short.u16_size_desc" { + SKL_TKN_U16_BLOCK_SIZE "416" + } +} + +SectionData."media1_in mi_size_desc" { + tuples "media1_in mi_size_desc" +} + +SectionVendorTuples."media1_in mi" { + tokens "skl_tokens" + + tuples."uuid" { + SKL_TKN_UUID "178, 110, 101, 57, 113, 59, 73, 64, 141, 63, 249, 44, 213, 196, 60, 9" + } + + tuples."byte.u8_data" { + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_DYN_IN_PIN "0" + SKL_TKN_U8_DYN_OUT_PIN "1" + SKL_TKN_U8_TIME_SLOT "0" + SKL_TKN_U8_CORE_ID "0" + SKL_TKN_U8_MODULE_TYPE "0" + SKL_TKN_U8_CONN_TYPE "0" + SKL_TKN_U8_HW_CONN_TYPE "1" + SKL_TKN_U8_DEV_TYPE "6" + } + + tuples."short.u16_data" { + SKL_TKN_U16_MOD_INST_ID "1" + } + + tuples."word.u32_data" { + SKL_TKN_U32_VBUS_ID "4294967295" + SKL_TKN_U32_PARAMS_FIXUP "0" + SKL_TKN_U32_CONVERTER "0" + SKL_TKN_U32_PIPE_ID "2" + SKL_TKN_U32_PIPE_CONN_TYPE "1" + SKL_TKN_U32_PIPE_PRIORITY "0" + SKL_TKN_U32_PMODE "0" + SKL_TKN_U32_D0I3_CAPS "1" + SKL_TKN_U32_PROC_DOMAIN "0" + SKL_TKN_U32_PIPE_DIRECTION "0" + SKL_TKN_U32_NUM_CONFIGS "1" + SKL_TKN_U32_DMA_BUF_SIZE "2" + } + + tuples."word._pipe_0" { + SKL_TKN_U32_PIPE_CONFIG_ID "0" + SKL_TKN_U32_PATH_MEM_PGS "1" + } + + tuples."word._pipe_u32_cfg_in_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_in_fmt_0" { + SKL_TKN_U8_CFG_BPS "16" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."word._pipe_u32_cfg_out_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_out_fmt_0" { + SKL_TKN_U8_CFG_BPS "32" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."short.u16_pipe_mod_cfg_0" { + SKL_TKN_CFG_MOD_RES_ID "0" + SKL_TKN_CFG_MOD_FMT_ID "0" + } + + tuples."word.in_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_PIN_MOD_ID "2" + SKL_TKN_U32_PIN_INST_ID "2" + } + + tuples."uuid.in_pin_0" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } + + tuples."word.out_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_1" { + SKL_TKN_U32_DIR_PIN_COUNT "17" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_2" { + SKL_TKN_U32_DIR_PIN_COUNT "33" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } +} + +SectionData."media1_in mi" { + tuples "media1_in mi" +} + +SectionWidget."media1_in mi" { + index "0" + type "pga" + no_pm "true" + subseq "10" + event_type "4" + event_flags "9" + + data [ + "media1_in mi num_desc" + "media1_in mi_size_desc" + "media1_in mi" + ] +} + +SectionVendorTuples."codec1_out mo num_desc" { + tokens "skl_tokens" + + tuples."byte.u8_num_blocks" { + SKL_TKN_U8_NUM_BLOCKS "1" + } +} + +SectionData."codec1_out mo num_desc" { + tuples "codec1_out mo num_desc" +} + +SectionVendorTuples."codec1_out mo_size_desc" { + tokens "skl_tokens" + + tuples."byte.u8_block_type" { + SKL_TKN_U8_BLOCK_TYPE "0" + } + + tuples."short.u16_size_desc" { + SKL_TKN_U16_BLOCK_SIZE "536" + } +} + +SectionData."codec1_out mo_size_desc" { + tuples "codec1_out mo_size_desc" +} + +SectionVendorTuples."codec1_out mo" { + tokens "skl_tokens" + + tuples."uuid" { + SKL_TKN_UUID "90, 80, 86, 60, 215, 36, 143, 65, 189, 220, 193, 245, 163, 172, 42, 224" + } + + tuples."byte.u8_data" { + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_DYN_IN_PIN "1" + SKL_TKN_U8_DYN_OUT_PIN "0" + SKL_TKN_U8_TIME_SLOT "0" + SKL_TKN_U8_CORE_ID "0" + SKL_TKN_U8_MODULE_TYPE "0" + SKL_TKN_U8_CONN_TYPE "0" + SKL_TKN_U8_HW_CONN_TYPE "1" + SKL_TKN_U8_DEV_TYPE "6" + } + + tuples."short.u16_data" { + SKL_TKN_U16_MOD_INST_ID "1" + } + + tuples."word.u32_data" { + SKL_TKN_U32_VBUS_ID "4294967295" + SKL_TKN_U32_PARAMS_FIXUP "0" + SKL_TKN_U32_CONVERTER "0" + SKL_TKN_U32_PIPE_ID "3" + SKL_TKN_U32_PIPE_CONN_TYPE "2" + SKL_TKN_U32_PIPE_PRIORITY "0" + SKL_TKN_U32_PMODE "0" + SKL_TKN_U32_D0I3_CAPS "0" + SKL_TKN_U32_PROC_DOMAIN "0" + SKL_TKN_U32_PIPE_DIRECTION "0" + SKL_TKN_U32_NUM_CONFIGS "1" + SKL_TKN_U32_DMA_BUF_SIZE "2" + } + + tuples."word._pipe_0" { + SKL_TKN_U32_PIPE_CONFIG_ID "0" + SKL_TKN_U32_PATH_MEM_PGS "1" + } + + tuples."word._pipe_u32_cfg_in_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_in_fmt_0" { + SKL_TKN_U8_CFG_BPS "32" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."word._pipe_u32_cfg_out_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_out_fmt_0" { + SKL_TKN_U8_CFG_BPS "16" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."short.u16_pipe_mod_cfg_0" { + SKL_TKN_CFG_MOD_RES_ID "0" + SKL_TKN_CFG_MOD_FMT_ID "0" + } + + tuples."word.in_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_1" { + SKL_TKN_U32_DIR_PIN_COUNT "16" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_2" { + SKL_TKN_U32_DIR_PIN_COUNT "32" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_3" { + SKL_TKN_U32_DIR_PIN_COUNT "48" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_4" { + SKL_TKN_U32_DIR_PIN_COUNT "64" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_5" { + SKL_TKN_U32_DIR_PIN_COUNT "80" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_6" { + SKL_TKN_U32_DIR_PIN_COUNT "96" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_7" { + SKL_TKN_U32_DIR_PIN_COUNT "112" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_PIN_MOD_ID "2" + SKL_TKN_U32_PIN_INST_ID "3" + } + + tuples."uuid.out_pin_0" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } +} + +SectionData."codec1_out mo" { + tuples "codec1_out mo" +} + +SectionWidget."codec1_out mo" { + index "0" + type "mixer" + no_pm "true" + subseq "10" + event_type "1" + event_flags "15" + + mixer [ + "media1_in mi Switch" + ] + + data [ + "codec1_out mo num_desc" + "codec1_out mo_size_desc" + "codec1_out mo" + ] +} + +SectionVendorTuples."codec1_out cpr 3 num_desc" { + tokens "skl_tokens" + + tuples."byte.u8_num_blocks" { + SKL_TKN_U8_NUM_BLOCKS "1" + } +} + +SectionData."codec1_out cpr 3 num_desc" { + tuples "codec1_out cpr 3 num_desc" +} + +SectionVendorTuples."codec1_out cpr 3_size_desc" { + tokens "skl_tokens" + + tuples."byte.u8_block_type" { + SKL_TKN_U8_BLOCK_TYPE "0" + } + + tuples."short.u16_size_desc" { + SKL_TKN_U16_BLOCK_SIZE "440" + } +} + +SectionData."codec1_out cpr 3_size_desc" { + tuples "codec1_out cpr 3_size_desc" +} + +SectionVendorTuples."codec1_out cpr 3" { + tokens "skl_tokens" + + tuples."uuid" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } + + tuples."byte.u8_data" { + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_DYN_IN_PIN "0" + SKL_TKN_U8_DYN_OUT_PIN "1" + SKL_TKN_U8_TIME_SLOT "0" + SKL_TKN_U8_CORE_ID "0" + SKL_TKN_U8_MODULE_TYPE "1" + SKL_TKN_U8_CONN_TYPE "2" + SKL_TKN_U8_HW_CONN_TYPE "1" + SKL_TKN_U8_DEV_TYPE "4" + } + + tuples."short.u16_data" { + SKL_TKN_U16_MOD_INST_ID "3" + } + + tuples."word.u32_data" { + SKL_TKN_U32_VBUS_ID "4294967295" + SKL_TKN_U32_PARAMS_FIXUP "0" + SKL_TKN_U32_CONVERTER "0" + SKL_TKN_U32_PIPE_ID "3" + SKL_TKN_U32_PIPE_CONN_TYPE "2" + SKL_TKN_U32_PIPE_PRIORITY "0" + SKL_TKN_U32_PMODE "0" + SKL_TKN_U32_D0I3_CAPS "0" + SKL_TKN_U32_PROC_DOMAIN "0" + SKL_TKN_U32_PIPE_DIRECTION "0" + SKL_TKN_U32_NUM_CONFIGS "1" + SKL_TKN_U32_DMA_BUF_SIZE "2" + } + + tuples."word._pipe_0" { + SKL_TKN_U32_PIPE_CONFIG_ID "0" + SKL_TKN_U32_PATH_MEM_PGS "1" + } + + tuples."word._pipe_u32_cfg_in_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_in_fmt_0" { + SKL_TKN_U8_CFG_BPS "32" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."word._pipe_u32_cfg_out_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_out_fmt_0" { + SKL_TKN_U8_CFG_BPS "16" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."short.u16_pipe_mod_cfg_0" { + SKL_TKN_CFG_MOD_RES_ID "1" + SKL_TKN_CFG_MOD_FMT_ID "1" + } + + tuples."word.in_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_PIN_MOD_ID "1" + SKL_TKN_U32_PIN_INST_ID "1" + } + + tuples."uuid.in_pin_0" { + SKL_TKN_UUID "90, 80, 86, 60, 215, 36, 143, 65, 189, 220, 193, 245, 163, 172, 42, 224" + } + + tuples."word.out_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_1" { + SKL_TKN_U32_DIR_PIN_COUNT "17" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_2" { + SKL_TKN_U32_DIR_PIN_COUNT "33" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_3" { + SKL_TKN_U32_DIR_PIN_COUNT "49" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } +} + +SectionData."codec1_out cpr 3" { + tuples "codec1_out cpr 3" +} + +SectionWidget."codec1_out cpr 3" { + index "0" + type "pga" + no_pm "true" + event_type "4" + + data [ + "codec1_out cpr 3 num_desc" + "codec1_out cpr 3_size_desc" + "codec1_out cpr 3" + ] +} + +SectionWidget."codec1_out" { + index "0" + type "aif_out" + no_pm "true" +} + +SectionVendorTuples."media2_in cpr 4 num_desc" { + tokens "skl_tokens" + + tuples."byte.u8_num_blocks" { + SKL_TKN_U8_NUM_BLOCKS "1" + } +} + +SectionData."media2_in cpr 4 num_desc" { + tuples "media2_in cpr 4 num_desc" +} + +SectionVendorTuples."media2_in cpr 4_size_desc" { + tokens "skl_tokens" + + tuples."byte.u8_block_type" { + SKL_TKN_U8_BLOCK_TYPE "0" + } + + tuples."short.u16_size_desc" { + SKL_TKN_U16_BLOCK_SIZE "500" + } +} + +SectionData."media2_in cpr 4_size_desc" { + tuples "media2_in cpr 4_size_desc" +} + +SectionVendorTuples."media2_in cpr 4" { + tokens "skl_tokens" + + tuples."uuid" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } + + tuples."byte.u8_data" { + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_DYN_IN_PIN "1" + SKL_TKN_U8_DYN_OUT_PIN "0" + SKL_TKN_U8_TIME_SLOT "0" + SKL_TKN_U8_CORE_ID "0" + SKL_TKN_U8_MODULE_TYPE "1" + SKL_TKN_U8_CONN_TYPE "1" + SKL_TKN_U8_HW_CONN_TYPE "1" + SKL_TKN_U8_DEV_TYPE "5" + } + + tuples."short.u16_data" { + SKL_TKN_U16_MOD_INST_ID "4" + } + + tuples."word.u32_data" { + SKL_TKN_U32_VBUS_ID "4294967295" + SKL_TKN_U32_PARAMS_FIXUP "0" + SKL_TKN_U32_CONVERTER "0" + SKL_TKN_U32_PIPE_ID "4" + SKL_TKN_U32_PIPE_CONN_TYPE "1" + SKL_TKN_U32_PIPE_PRIORITY "0" + SKL_TKN_U32_PMODE "0" + SKL_TKN_U32_D0I3_CAPS "1" + SKL_TKN_U32_PROC_DOMAIN "0" + SKL_TKN_U32_PIPE_DIRECTION "0" + SKL_TKN_U32_NUM_CONFIGS "1" + SKL_TKN_U32_DMA_BUF_SIZE "2" + } + + tuples."word._pipe_0" { + SKL_TKN_U32_PIPE_CONFIG_ID "0" + SKL_TKN_U32_PATH_MEM_PGS "1" + } + + tuples."word._pipe_u32_cfg_in_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_in_fmt_0" { + SKL_TKN_U8_CFG_BPS "16" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."word._pipe_u32_cfg_out_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_out_fmt_0" { + SKL_TKN_U8_CFG_BPS "32" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."short.u16_pipe_mod_cfg_0" { + SKL_TKN_CFG_MOD_RES_ID "0" + SKL_TKN_CFG_MOD_FMT_ID "0" + } + + tuples."word.in_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "2" + } + + tuples."uuid.out_pin_0" { + SKL_TKN_UUID "178, 110, 101, 57, 113, 59, 73, 64, 141, 63, 249, 44, 213, 196, 60, 9" + } + + tuples."word.out_pin_1" { + SKL_TKN_U32_DIR_PIN_COUNT "17" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."uuid.out_pin_1" { + SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0" + } + + tuples."word.out_pin_2" { + SKL_TKN_U32_DIR_PIN_COUNT "33" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."uuid.out_pin_2" { + SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0" + } + + tuples."word.out_pin_3" { + SKL_TKN_U32_DIR_PIN_COUNT "49" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."uuid.out_pin_3" { + SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0" + } +} + +SectionData."media2_in cpr 4" { + tuples "media2_in cpr 4" +} + +SectionWidget."media2_in cpr 4" { + index "0" + type "mixer" + no_pm "true" + event_type "3" + event_flags "9" + + data [ + "media2_in cpr 4 num_desc" + "media2_in cpr 4_size_desc" + "media2_in cpr 4" + ] +} + +SectionVendorTuples."media2_in mi num_desc" { + tokens "skl_tokens" + + tuples."byte.u8_num_blocks" { + SKL_TKN_U8_NUM_BLOCKS "1" + } +} + +SectionData."media2_in mi num_desc" { + tuples "media2_in mi num_desc" +} + +SectionVendorTuples."media2_in mi_size_desc" { + tokens "skl_tokens" + + tuples."byte.u8_block_type" { + SKL_TKN_U8_BLOCK_TYPE "0" + } + + tuples."short.u16_size_desc" { + SKL_TKN_U16_BLOCK_SIZE "416" + } +} + +SectionData."media2_in mi_size_desc" { + tuples "media2_in mi_size_desc" +} + +SectionVendorTuples."media2_in mi" { + tokens "skl_tokens" + + tuples."uuid" { + SKL_TKN_UUID "178, 110, 101, 57, 113, 59, 73, 64, 141, 63, 249, 44, 213, 196, 60, 9" + } + + tuples."byte.u8_data" { + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_DYN_IN_PIN "0" + SKL_TKN_U8_DYN_OUT_PIN "1" + SKL_TKN_U8_TIME_SLOT "0" + SKL_TKN_U8_CORE_ID "0" + SKL_TKN_U8_MODULE_TYPE "0" + SKL_TKN_U8_CONN_TYPE "0" + SKL_TKN_U8_HW_CONN_TYPE "1" + SKL_TKN_U8_DEV_TYPE "6" + } + + tuples."short.u16_data" { + SKL_TKN_U16_MOD_INST_ID "2" + } + + tuples."word.u32_data" { + SKL_TKN_U32_VBUS_ID "4294967295" + SKL_TKN_U32_PARAMS_FIXUP "0" + SKL_TKN_U32_CONVERTER "0" + SKL_TKN_U32_PIPE_ID "4" + SKL_TKN_U32_PIPE_CONN_TYPE "1" + SKL_TKN_U32_PIPE_PRIORITY "0" + SKL_TKN_U32_PMODE "0" + SKL_TKN_U32_D0I3_CAPS "1" + SKL_TKN_U32_PROC_DOMAIN "0" + SKL_TKN_U32_PIPE_DIRECTION "0" + SKL_TKN_U32_NUM_CONFIGS "1" + SKL_TKN_U32_DMA_BUF_SIZE "2" + } + + tuples."word._pipe_0" { + SKL_TKN_U32_PIPE_CONFIG_ID "0" + SKL_TKN_U32_PATH_MEM_PGS "1" + } + + tuples."word._pipe_u32_cfg_in_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_in_fmt_0" { + SKL_TKN_U8_CFG_BPS "16" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."word._pipe_u32_cfg_out_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_out_fmt_0" { + SKL_TKN_U8_CFG_BPS "32" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."short.u16_pipe_mod_cfg_0" { + SKL_TKN_CFG_MOD_RES_ID "0" + SKL_TKN_CFG_MOD_FMT_ID "0" + } + + tuples."word.in_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_PIN_MOD_ID "2" + SKL_TKN_U32_PIN_INST_ID "4" + } + + tuples."uuid.in_pin_0" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } + + tuples."word.out_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_1" { + SKL_TKN_U32_DIR_PIN_COUNT "17" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_2" { + SKL_TKN_U32_DIR_PIN_COUNT "33" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } +} + +SectionData."media2_in mi" { + tuples "media2_in mi" +} + +SectionWidget."media2_in mi" { + index "0" + type "pga" + no_pm "true" + subseq "10" + event_type "4" + event_flags "9" + + data [ + "media2_in mi num_desc" + "media2_in mi_size_desc" + "media2_in mi" + ] +} + +SectionVendorTuples."codec2_out mo num_desc" { + tokens "skl_tokens" + + tuples."byte.u8_num_blocks" { + SKL_TKN_U8_NUM_BLOCKS "1" + } +} + +SectionData."codec2_out mo num_desc" { + tuples "codec2_out mo num_desc" +} + +SectionVendorTuples."codec2_out mo_size_desc" { + tokens "skl_tokens" + + tuples."byte.u8_block_type" { + SKL_TKN_U8_BLOCK_TYPE "0" + } + + tuples."short.u16_size_desc" { + SKL_TKN_U16_BLOCK_SIZE "536" + } +} + +SectionData."codec2_out mo_size_desc" { + tuples "codec2_out mo_size_desc" +} + +SectionVendorTuples."codec2_out mo" { + tokens "skl_tokens" + + tuples."uuid" { + SKL_TKN_UUID "90, 80, 86, 60, 215, 36, 143, 65, 189, 220, 193, 245, 163, 172, 42, 224" + } + + tuples."byte.u8_data" { + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_DYN_IN_PIN "1" + SKL_TKN_U8_DYN_OUT_PIN "0" + SKL_TKN_U8_TIME_SLOT "0" + SKL_TKN_U8_CORE_ID "0" + SKL_TKN_U8_MODULE_TYPE "0" + SKL_TKN_U8_CONN_TYPE "0" + SKL_TKN_U8_HW_CONN_TYPE "1" + SKL_TKN_U8_DEV_TYPE "6" + } + + tuples."short.u16_data" { + SKL_TKN_U16_MOD_INST_ID "2" + } + + tuples."word.u32_data" { + SKL_TKN_U32_VBUS_ID "4294967295" + SKL_TKN_U32_PARAMS_FIXUP "0" + SKL_TKN_U32_CONVERTER "0" + SKL_TKN_U32_PIPE_ID "5" + SKL_TKN_U32_PIPE_CONN_TYPE "2" + SKL_TKN_U32_PIPE_PRIORITY "0" + SKL_TKN_U32_PMODE "0" + SKL_TKN_U32_D0I3_CAPS "0" + SKL_TKN_U32_PROC_DOMAIN "0" + SKL_TKN_U32_PIPE_DIRECTION "0" + SKL_TKN_U32_NUM_CONFIGS "1" + SKL_TKN_U32_DMA_BUF_SIZE "2" + } + + tuples."word._pipe_0" { + SKL_TKN_U32_PIPE_CONFIG_ID "0" + SKL_TKN_U32_PATH_MEM_PGS "1" + } + + tuples."word._pipe_u32_cfg_in_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_in_fmt_0" { + SKL_TKN_U8_CFG_BPS "32" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."word._pipe_u32_cfg_out_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_out_fmt_0" { + SKL_TKN_U8_CFG_BPS "16" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."short.u16_pipe_mod_cfg_0" { + SKL_TKN_CFG_MOD_RES_ID "0" + SKL_TKN_CFG_MOD_FMT_ID "0" + } + + tuples."word.in_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_1" { + SKL_TKN_U32_DIR_PIN_COUNT "16" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_2" { + SKL_TKN_U32_DIR_PIN_COUNT "32" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_3" { + SKL_TKN_U32_DIR_PIN_COUNT "48" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_4" { + SKL_TKN_U32_DIR_PIN_COUNT "64" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_5" { + SKL_TKN_U32_DIR_PIN_COUNT "80" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_6" { + SKL_TKN_U32_DIR_PIN_COUNT "96" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_7" { + SKL_TKN_U32_DIR_PIN_COUNT "112" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_PIN_MOD_ID "2" + SKL_TKN_U32_PIN_INST_ID "5" + } + + tuples."uuid.out_pin_0" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } +} + +SectionData."codec2_out mo" { + tuples "codec2_out mo" +} + +SectionWidget."codec2_out mo" { + index "0" + type "mixer" + no_pm "true" + subseq "10" + event_type "1" + event_flags "15" + + mixer [ + "media2_in mi Switch" + ] + + data [ + "codec2_out mo num_desc" + "codec2_out mo_size_desc" + "codec2_out mo" + ] +} + +SectionVendorTuples."codec2_out cpr 5 num_desc" { + tokens "skl_tokens" + + tuples."byte.u8_num_blocks" { + SKL_TKN_U8_NUM_BLOCKS "1" + } +} + +SectionData."codec2_out cpr 5 num_desc" { + tuples "codec2_out cpr 5 num_desc" +} + +SectionVendorTuples."codec2_out cpr 5_size_desc" { + tokens "skl_tokens" + + tuples."byte.u8_block_type" { + SKL_TKN_U8_BLOCK_TYPE "0" + } + + tuples."short.u16_size_desc" { + SKL_TKN_U16_BLOCK_SIZE "440" + } +} + +SectionData."codec2_out cpr 5_size_desc" { + tuples "codec2_out cpr 5_size_desc" +} + +SectionVendorTuples."codec2_out cpr 5" { + tokens "skl_tokens" + + tuples."uuid" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } + + tuples."byte.u8_data" { + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_DYN_IN_PIN "0" + SKL_TKN_U8_DYN_OUT_PIN "1" + SKL_TKN_U8_TIME_SLOT "0" + SKL_TKN_U8_CORE_ID "0" + SKL_TKN_U8_MODULE_TYPE "1" + SKL_TKN_U8_CONN_TYPE "2" + SKL_TKN_U8_HW_CONN_TYPE "1" + SKL_TKN_U8_DEV_TYPE "4" + } + + tuples."short.u16_data" { + SKL_TKN_U16_MOD_INST_ID "5" + } + + tuples."word.u32_data" { + SKL_TKN_U32_VBUS_ID "4294967295" + SKL_TKN_U32_PARAMS_FIXUP "0" + SKL_TKN_U32_CONVERTER "0" + SKL_TKN_U32_PIPE_ID "5" + SKL_TKN_U32_PIPE_CONN_TYPE "2" + SKL_TKN_U32_PIPE_PRIORITY "0" + SKL_TKN_U32_PMODE "0" + SKL_TKN_U32_D0I3_CAPS "0" + SKL_TKN_U32_PROC_DOMAIN "0" + SKL_TKN_U32_PIPE_DIRECTION "0" + SKL_TKN_U32_NUM_CONFIGS "1" + SKL_TKN_U32_DMA_BUF_SIZE "2" + } + + tuples."word._pipe_0" { + SKL_TKN_U32_PIPE_CONFIG_ID "0" + SKL_TKN_U32_PATH_MEM_PGS "1" + } + + tuples."word._pipe_u32_cfg_in_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_in_fmt_0" { + SKL_TKN_U8_CFG_BPS "32" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."word._pipe_u32_cfg_out_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_out_fmt_0" { + SKL_TKN_U8_CFG_BPS "16" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."short.u16_pipe_mod_cfg_0" { + SKL_TKN_CFG_MOD_RES_ID "1" + SKL_TKN_CFG_MOD_FMT_ID "1" + } + + tuples."word.in_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_PIN_MOD_ID "1" + SKL_TKN_U32_PIN_INST_ID "2" + } + + tuples."uuid.in_pin_0" { + SKL_TKN_UUID "90, 80, 86, 60, 215, 36, 143, 65, 189, 220, 193, 245, 163, 172, 42, 224" + } + + tuples."word.out_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_1" { + SKL_TKN_U32_DIR_PIN_COUNT "17" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_2" { + SKL_TKN_U32_DIR_PIN_COUNT "33" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_3" { + SKL_TKN_U32_DIR_PIN_COUNT "49" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } +} + +SectionData."codec2_out cpr 5" { + tuples "codec2_out cpr 5" +} + +SectionWidget."codec2_out cpr 5" { + index "0" + type "pga" + no_pm "true" + event_type "4" + + data [ + "codec2_out cpr 5 num_desc" + "codec2_out cpr 5_size_desc" + "codec2_out cpr 5" + ] +} + +SectionWidget."codec2_out" { + index "0" + type "aif_out" + no_pm "true" +} + +SectionVendorTuples."codec0_in cpr 6 num_desc" { + tokens "skl_tokens" + + tuples."byte.u8_num_blocks" { + SKL_TKN_U8_NUM_BLOCKS "1" + } +} + +SectionData."codec0_in cpr 6 num_desc" { + tuples "codec0_in cpr 6 num_desc" +} + +SectionVendorTuples."codec0_in cpr 6_size_desc" { + tokens "skl_tokens" + + tuples."byte.u8_block_type" { + SKL_TKN_U8_BLOCK_TYPE "0" + } + + tuples."short.u16_size_desc" { + SKL_TKN_U16_BLOCK_SIZE "500" + } +} + +SectionData."codec0_in cpr 6_size_desc" { + tuples "codec0_in cpr 6_size_desc" +} + +SectionVendorTuples."codec0_in cpr 6" { + tokens "skl_tokens" + + tuples."uuid" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } + + tuples."byte.u8_data" { + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_DYN_IN_PIN "1" + SKL_TKN_U8_DYN_OUT_PIN "0" + SKL_TKN_U8_TIME_SLOT "0" + SKL_TKN_U8_CORE_ID "0" + SKL_TKN_U8_MODULE_TYPE "1" + SKL_TKN_U8_CONN_TYPE "2" + SKL_TKN_U8_HW_CONN_TYPE "2" + SKL_TKN_U8_DEV_TYPE "4" + } + + tuples."short.u16_data" { + SKL_TKN_U16_MOD_INST_ID "6" + } + + tuples."word.u32_data" { + SKL_TKN_U32_VBUS_ID "4294967295" + SKL_TKN_U32_PARAMS_FIXUP "0" + SKL_TKN_U32_CONVERTER "0" + SKL_TKN_U32_PIPE_ID "6" + SKL_TKN_U32_PIPE_CONN_TYPE "2" + SKL_TKN_U32_PIPE_PRIORITY "0" + SKL_TKN_U32_PMODE "0" + SKL_TKN_U32_D0I3_CAPS "0" + SKL_TKN_U32_PROC_DOMAIN "0" + SKL_TKN_U32_PIPE_DIRECTION "1" + SKL_TKN_U32_NUM_CONFIGS "1" + SKL_TKN_U32_DMA_BUF_SIZE "2" + } + + tuples."word._pipe_0" { + SKL_TKN_U32_PIPE_CONFIG_ID "0" + SKL_TKN_U32_PATH_MEM_PGS "1" + } + + tuples."word._pipe_u32_cfg_in_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_in_fmt_0" { + SKL_TKN_U8_CFG_BPS "16" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."word._pipe_u32_cfg_out_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_out_fmt_0" { + SKL_TKN_U8_CFG_BPS "32" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."short.u16_pipe_mod_cfg_0" { + SKL_TKN_CFG_MOD_RES_ID "9" + SKL_TKN_CFG_MOD_FMT_ID "9" + } + + tuples."word.in_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "3" + } + + tuples."uuid.out_pin_0" { + SKL_TKN_UUID "178, 110, 101, 57, 113, 59, 73, 64, 141, 63, 249, 44, 213, 196, 60, 9" + } + + tuples."word.out_pin_1" { + SKL_TKN_U32_DIR_PIN_COUNT "17" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."uuid.out_pin_1" { + SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0" + } + + tuples."word.out_pin_2" { + SKL_TKN_U32_DIR_PIN_COUNT "33" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."uuid.out_pin_2" { + SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0" + } + + tuples."word.out_pin_3" { + SKL_TKN_U32_DIR_PIN_COUNT "49" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."uuid.out_pin_3" { + SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0" + } +} + +SectionData."codec0_in cpr 6" { + tuples "codec0_in cpr 6" +} + +SectionWidget."codec0_in cpr 6" { + index "0" + type "mixer" + no_pm "true" + event_type "3" + event_flags "9" + + data [ + "codec0_in cpr 6 num_desc" + "codec0_in cpr 6_size_desc" + "codec0_in cpr 6" + ] +} + +SectionVendorTuples."codec0_in mi num_desc" { + tokens "skl_tokens" + + tuples."byte.u8_num_blocks" { + SKL_TKN_U8_NUM_BLOCKS "1" + } +} + +SectionData."codec0_in mi num_desc" { + tuples "codec0_in mi num_desc" +} + +SectionVendorTuples."codec0_in mi_size_desc" { + tokens "skl_tokens" + + tuples."byte.u8_block_type" { + SKL_TKN_U8_BLOCK_TYPE "0" + } + + tuples."short.u16_size_desc" { + SKL_TKN_U16_BLOCK_SIZE "416" + } +} + +SectionData."codec0_in mi_size_desc" { + tuples "codec0_in mi_size_desc" +} + +SectionVendorTuples."codec0_in mi" { + tokens "skl_tokens" + + tuples."uuid" { + SKL_TKN_UUID "178, 110, 101, 57, 113, 59, 73, 64, 141, 63, 249, 44, 213, 196, 60, 9" + } + + tuples."byte.u8_data" { + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_DYN_IN_PIN "0" + SKL_TKN_U8_DYN_OUT_PIN "1" + SKL_TKN_U8_TIME_SLOT "0" + SKL_TKN_U8_CORE_ID "0" + SKL_TKN_U8_MODULE_TYPE "0" + SKL_TKN_U8_CONN_TYPE "0" + SKL_TKN_U8_HW_CONN_TYPE "2" + SKL_TKN_U8_DEV_TYPE "6" + } + + tuples."short.u16_data" { + SKL_TKN_U16_MOD_INST_ID "3" + } + + tuples."word.u32_data" { + SKL_TKN_U32_VBUS_ID "4294967295" + SKL_TKN_U32_PARAMS_FIXUP "0" + SKL_TKN_U32_CONVERTER "0" + SKL_TKN_U32_PIPE_ID "6" + SKL_TKN_U32_PIPE_CONN_TYPE "2" + SKL_TKN_U32_PIPE_PRIORITY "0" + SKL_TKN_U32_PMODE "0" + SKL_TKN_U32_D0I3_CAPS "0" + SKL_TKN_U32_PROC_DOMAIN "0" + SKL_TKN_U32_PIPE_DIRECTION "1" + SKL_TKN_U32_NUM_CONFIGS "1" + SKL_TKN_U32_DMA_BUF_SIZE "2" + } + + tuples."word._pipe_0" { + SKL_TKN_U32_PIPE_CONFIG_ID "0" + SKL_TKN_U32_PATH_MEM_PGS "1" + } + + tuples."word._pipe_u32_cfg_in_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_in_fmt_0" { + SKL_TKN_U8_CFG_BPS "16" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."word._pipe_u32_cfg_out_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_out_fmt_0" { + SKL_TKN_U8_CFG_BPS "32" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."short.u16_pipe_mod_cfg_0" { + SKL_TKN_CFG_MOD_RES_ID "0" + SKL_TKN_CFG_MOD_FMT_ID "0" + } + + tuples."word.in_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_PIN_MOD_ID "2" + SKL_TKN_U32_PIN_INST_ID "6" + } + + tuples."uuid.in_pin_0" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } + + tuples."word.out_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_1" { + SKL_TKN_U32_DIR_PIN_COUNT "17" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_2" { + SKL_TKN_U32_DIR_PIN_COUNT "33" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } +} + +SectionData."codec0_in mi" { + tuples "codec0_in mi" +} + +SectionWidget."codec0_in mi" { + index "0" + type "pga" + no_pm "true" + subseq "10" + event_type "4" + event_flags "9" + + data [ + "codec0_in mi num_desc" + "codec0_in mi_size_desc" + "codec0_in mi" + ] +} + +SectionWidget."codec0_in" { + index "0" + type "aif_in" + no_pm "true" +} + +SectionVendorTuples."media0_out mo num_desc" { + tokens "skl_tokens" + + tuples."byte.u8_num_blocks" { + SKL_TKN_U8_NUM_BLOCKS "1" + } +} + +SectionData."media0_out mo num_desc" { + tuples "media0_out mo num_desc" +} + +SectionVendorTuples."media0_out mo_size_desc" { + tokens "skl_tokens" + + tuples."byte.u8_block_type" { + SKL_TKN_U8_BLOCK_TYPE "0" + } + + tuples."short.u16_size_desc" { + SKL_TKN_U16_BLOCK_SIZE "536" + } +} + +SectionData."media0_out mo_size_desc" { + tuples "media0_out mo_size_desc" +} + +SectionVendorTuples."media0_out mo" { + tokens "skl_tokens" + + tuples."uuid" { + SKL_TKN_UUID "90, 80, 86, 60, 215, 36, 143, 65, 189, 220, 193, 245, 163, 172, 42, 224" + } + + tuples."byte.u8_data" { + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_DYN_IN_PIN "1" + SKL_TKN_U8_DYN_OUT_PIN "0" + SKL_TKN_U8_TIME_SLOT "0" + SKL_TKN_U8_CORE_ID "0" + SKL_TKN_U8_MODULE_TYPE "0" + SKL_TKN_U8_CONN_TYPE "0" + SKL_TKN_U8_HW_CONN_TYPE "2" + SKL_TKN_U8_DEV_TYPE "6" + } + + tuples."short.u16_data" { + SKL_TKN_U16_MOD_INST_ID "3" + } + + tuples."word.u32_data" { + SKL_TKN_U32_VBUS_ID "4294967295" + SKL_TKN_U32_PARAMS_FIXUP "0" + SKL_TKN_U32_CONVERTER "0" + SKL_TKN_U32_PIPE_ID "7" + SKL_TKN_U32_PIPE_CONN_TYPE "1" + SKL_TKN_U32_PIPE_PRIORITY "0" + SKL_TKN_U32_PMODE "0" + SKL_TKN_U32_D0I3_CAPS "0" + SKL_TKN_U32_PROC_DOMAIN "0" + SKL_TKN_U32_PIPE_DIRECTION "1" + SKL_TKN_U32_NUM_CONFIGS "1" + SKL_TKN_U32_DMA_BUF_SIZE "2" + } + + tuples."word._pipe_0" { + SKL_TKN_U32_PIPE_CONFIG_ID "0" + SKL_TKN_U32_PATH_MEM_PGS "1" + } + + tuples."word._pipe_u32_cfg_in_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_in_fmt_0" { + SKL_TKN_U8_CFG_BPS "32" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."word._pipe_u32_cfg_out_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_out_fmt_0" { + SKL_TKN_U8_CFG_BPS "16" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."short.u16_pipe_mod_cfg_0" { + SKL_TKN_CFG_MOD_RES_ID "0" + SKL_TKN_CFG_MOD_FMT_ID "0" + } + + tuples."word.in_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_1" { + SKL_TKN_U32_DIR_PIN_COUNT "16" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_2" { + SKL_TKN_U32_DIR_PIN_COUNT "32" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_3" { + SKL_TKN_U32_DIR_PIN_COUNT "48" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_4" { + SKL_TKN_U32_DIR_PIN_COUNT "64" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_5" { + SKL_TKN_U32_DIR_PIN_COUNT "80" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_6" { + SKL_TKN_U32_DIR_PIN_COUNT "96" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_7" { + SKL_TKN_U32_DIR_PIN_COUNT "112" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_PIN_MOD_ID "2" + SKL_TKN_U32_PIN_INST_ID "7" + } + + tuples."uuid.out_pin_0" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } +} + +SectionData."media0_out mo" { + tuples "media0_out mo" +} + +SectionWidget."media0_out mo" { + index "0" + type "mixer" + no_pm "true" + subseq "10" + event_type "1" + event_flags "15" + + mixer [ + "codec0_in mi Switch" + ] + + data [ + "media0_out mo num_desc" + "media0_out mo_size_desc" + "media0_out mo" + ] +} + +SectionVendorTuples."media0_out cpr 7 num_desc" { + tokens "skl_tokens" + + tuples."byte.u8_num_blocks" { + SKL_TKN_U8_NUM_BLOCKS "1" + } +} + +SectionData."media0_out cpr 7 num_desc" { + tuples "media0_out cpr 7 num_desc" +} + +SectionVendorTuples."media0_out cpr 7_size_desc" { + tokens "skl_tokens" + + tuples."byte.u8_block_type" { + SKL_TKN_U8_BLOCK_TYPE "0" + } + + tuples."short.u16_size_desc" { + SKL_TKN_U16_BLOCK_SIZE "440" + } +} + +SectionData."media0_out cpr 7_size_desc" { + tuples "media0_out cpr 7_size_desc" +} + +SectionVendorTuples."media0_out cpr 7" { + tokens "skl_tokens" + + tuples."uuid" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } + + tuples."byte.u8_data" { + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_DYN_IN_PIN "0" + SKL_TKN_U8_DYN_OUT_PIN "1" + SKL_TKN_U8_TIME_SLOT "0" + SKL_TKN_U8_CORE_ID "0" + SKL_TKN_U8_MODULE_TYPE "1" + SKL_TKN_U8_CONN_TYPE "0" + SKL_TKN_U8_HW_CONN_TYPE "2" + SKL_TKN_U8_DEV_TYPE "5" + } + + tuples."short.u16_data" { + SKL_TKN_U16_MOD_INST_ID "7" + } + + tuples."word.u32_data" { + SKL_TKN_U32_VBUS_ID "4294967295" + SKL_TKN_U32_PARAMS_FIXUP "0" + SKL_TKN_U32_CONVERTER "0" + SKL_TKN_U32_PIPE_ID "7" + SKL_TKN_U32_PIPE_CONN_TYPE "1" + SKL_TKN_U32_PIPE_PRIORITY "0" + SKL_TKN_U32_PMODE "0" + SKL_TKN_U32_D0I3_CAPS "0" + SKL_TKN_U32_PROC_DOMAIN "0" + SKL_TKN_U32_PIPE_DIRECTION "1" + SKL_TKN_U32_NUM_CONFIGS "1" + SKL_TKN_U32_DMA_BUF_SIZE "2" + } + + tuples."word._pipe_0" { + SKL_TKN_U32_PIPE_CONFIG_ID "0" + SKL_TKN_U32_PATH_MEM_PGS "1" + } + + tuples."word._pipe_u32_cfg_in_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_in_fmt_0" { + SKL_TKN_U8_CFG_BPS "32" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."word._pipe_u32_cfg_out_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_out_fmt_0" { + SKL_TKN_U8_CFG_BPS "16" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."short.u16_pipe_mod_cfg_0" { + SKL_TKN_CFG_MOD_RES_ID "8" + SKL_TKN_CFG_MOD_FMT_ID "8" + } + + tuples."word.in_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_PIN_MOD_ID "1" + SKL_TKN_U32_PIN_INST_ID "3" + } + + tuples."uuid.in_pin_0" { + SKL_TKN_UUID "90, 80, 86, 60, 215, 36, 143, 65, 189, 220, 193, 245, 163, 172, 42, 224" + } + + tuples."word.out_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_1" { + SKL_TKN_U32_DIR_PIN_COUNT "17" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_2" { + SKL_TKN_U32_DIR_PIN_COUNT "33" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_3" { + SKL_TKN_U32_DIR_PIN_COUNT "49" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } +} + +SectionData."media0_out cpr 7" { + tuples "media0_out cpr 7" +} + +SectionWidget."media0_out cpr 7" { + index "0" + type "pga" + no_pm "true" + event_type "4" + + data [ + "media0_out cpr 7 num_desc" + "media0_out cpr 7_size_desc" + "media0_out cpr 7" + ] +} + +SectionVendorTuples."codec1_in cpr 8 num_desc" { + tokens "skl_tokens" + + tuples."byte.u8_num_blocks" { + SKL_TKN_U8_NUM_BLOCKS "1" + } +} + +SectionData."codec1_in cpr 8 num_desc" { + tuples "codec1_in cpr 8 num_desc" +} + +SectionVendorTuples."codec1_in cpr 8_size_desc" { + tokens "skl_tokens" + + tuples."byte.u8_block_type" { + SKL_TKN_U8_BLOCK_TYPE "0" + } + + tuples."short.u16_size_desc" { + SKL_TKN_U16_BLOCK_SIZE "500" + } +} + +SectionData."codec1_in cpr 8_size_desc" { + tuples "codec1_in cpr 8_size_desc" +} + +SectionVendorTuples."codec1_in cpr 8" { + tokens "skl_tokens" + + tuples."uuid" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } + + tuples."byte.u8_data" { + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_DYN_IN_PIN "1" + SKL_TKN_U8_DYN_OUT_PIN "0" + SKL_TKN_U8_TIME_SLOT "0" + SKL_TKN_U8_CORE_ID "0" + SKL_TKN_U8_MODULE_TYPE "1" + SKL_TKN_U8_CONN_TYPE "2" + SKL_TKN_U8_HW_CONN_TYPE "2" + SKL_TKN_U8_DEV_TYPE "4" + } + + tuples."short.u16_data" { + SKL_TKN_U16_MOD_INST_ID "8" + } + + tuples."word.u32_data" { + SKL_TKN_U32_VBUS_ID "4294967295" + SKL_TKN_U32_PARAMS_FIXUP "0" + SKL_TKN_U32_CONVERTER "0" + SKL_TKN_U32_PIPE_ID "8" + SKL_TKN_U32_PIPE_CONN_TYPE "2" + SKL_TKN_U32_PIPE_PRIORITY "0" + SKL_TKN_U32_PMODE "0" + SKL_TKN_U32_D0I3_CAPS "0" + SKL_TKN_U32_PROC_DOMAIN "0" + SKL_TKN_U32_PIPE_DIRECTION "1" + SKL_TKN_U32_NUM_CONFIGS "1" + SKL_TKN_U32_DMA_BUF_SIZE "2" + } + + tuples."word._pipe_0" { + SKL_TKN_U32_PIPE_CONFIG_ID "0" + SKL_TKN_U32_PATH_MEM_PGS "1" + } + + tuples."word._pipe_u32_cfg_in_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_in_fmt_0" { + SKL_TKN_U8_CFG_BPS "24" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."word._pipe_u32_cfg_out_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_out_fmt_0" { + SKL_TKN_U8_CFG_BPS "32" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."short.u16_pipe_mod_cfg_0" { + SKL_TKN_CFG_MOD_RES_ID "2" + SKL_TKN_CFG_MOD_FMT_ID "2" + } + + tuples."word.in_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "4" + } + + tuples."uuid.out_pin_0" { + SKL_TKN_UUID "178, 110, 101, 57, 113, 59, 73, 64, 141, 63, 249, 44, 213, 196, 60, 9" + } + + tuples."word.out_pin_1" { + SKL_TKN_U32_DIR_PIN_COUNT "17" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."uuid.out_pin_1" { + SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0" + } + + tuples."word.out_pin_2" { + SKL_TKN_U32_DIR_PIN_COUNT "33" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."uuid.out_pin_2" { + SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0" + } + + tuples."word.out_pin_3" { + SKL_TKN_U32_DIR_PIN_COUNT "49" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."uuid.out_pin_3" { + SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0" + } +} + +SectionData."codec1_in cpr 8" { + tuples "codec1_in cpr 8" +} + +SectionWidget."codec1_in cpr 8" { + index "0" + type "mixer" + no_pm "true" + event_type "3" + event_flags "9" + + data [ + "codec1_in cpr 8 num_desc" + "codec1_in cpr 8_size_desc" + "codec1_in cpr 8" + ] +} + +SectionVendorTuples."codec1_in mi num_desc" { + tokens "skl_tokens" + + tuples."byte.u8_num_blocks" { + SKL_TKN_U8_NUM_BLOCKS "1" + } +} + +SectionData."codec1_in mi num_desc" { + tuples "codec1_in mi num_desc" +} + +SectionVendorTuples."codec1_in mi_size_desc" { + tokens "skl_tokens" + + tuples."byte.u8_block_type" { + SKL_TKN_U8_BLOCK_TYPE "0" + } + + tuples."short.u16_size_desc" { + SKL_TKN_U16_BLOCK_SIZE "416" + } +} + +SectionData."codec1_in mi_size_desc" { + tuples "codec1_in mi_size_desc" +} + +SectionVendorTuples."codec1_in mi" { + tokens "skl_tokens" + + tuples."uuid" { + SKL_TKN_UUID "178, 110, 101, 57, 113, 59, 73, 64, 141, 63, 249, 44, 213, 196, 60, 9" + } + + tuples."byte.u8_data" { + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_DYN_IN_PIN "0" + SKL_TKN_U8_DYN_OUT_PIN "1" + SKL_TKN_U8_TIME_SLOT "0" + SKL_TKN_U8_CORE_ID "0" + SKL_TKN_U8_MODULE_TYPE "0" + SKL_TKN_U8_CONN_TYPE "0" + SKL_TKN_U8_HW_CONN_TYPE "2" + SKL_TKN_U8_DEV_TYPE "6" + } + + tuples."short.u16_data" { + SKL_TKN_U16_MOD_INST_ID "4" + } + + tuples."word.u32_data" { + SKL_TKN_U32_VBUS_ID "4294967295" + SKL_TKN_U32_PARAMS_FIXUP "0" + SKL_TKN_U32_CONVERTER "0" + SKL_TKN_U32_PIPE_ID "8" + SKL_TKN_U32_PIPE_CONN_TYPE "2" + SKL_TKN_U32_PIPE_PRIORITY "0" + SKL_TKN_U32_PMODE "0" + SKL_TKN_U32_D0I3_CAPS "0" + SKL_TKN_U32_PROC_DOMAIN "0" + SKL_TKN_U32_PIPE_DIRECTION "1" + SKL_TKN_U32_NUM_CONFIGS "1" + SKL_TKN_U32_DMA_BUF_SIZE "2" + } + + tuples."word._pipe_0" { + SKL_TKN_U32_PIPE_CONFIG_ID "0" + SKL_TKN_U32_PATH_MEM_PGS "1" + } + + tuples."word._pipe_u32_cfg_in_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_in_fmt_0" { + SKL_TKN_U8_CFG_BPS "24" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."word._pipe_u32_cfg_out_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_out_fmt_0" { + SKL_TKN_U8_CFG_BPS "32" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."short.u16_pipe_mod_cfg_0" { + SKL_TKN_CFG_MOD_RES_ID "0" + SKL_TKN_CFG_MOD_FMT_ID "0" + } + + tuples."word.in_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_PIN_MOD_ID "2" + SKL_TKN_U32_PIN_INST_ID "8" + } + + tuples."uuid.in_pin_0" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } + + tuples."word.out_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_1" { + SKL_TKN_U32_DIR_PIN_COUNT "17" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_2" { + SKL_TKN_U32_DIR_PIN_COUNT "33" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } +} + +SectionData."codec1_in mi" { + tuples "codec1_in mi" +} + +SectionWidget."codec1_in mi" { + index "0" + type "pga" + no_pm "true" + subseq "10" + event_type "4" + event_flags "9" + + data [ + "codec1_in mi num_desc" + "codec1_in mi_size_desc" + "codec1_in mi" + ] +} + +SectionWidget."codec1_in" { + index "0" + type "aif_in" + no_pm "true" +} + +SectionVendorTuples."media1_out mo num_desc" { + tokens "skl_tokens" + + tuples."byte.u8_num_blocks" { + SKL_TKN_U8_NUM_BLOCKS "1" + } +} + +SectionData."media1_out mo num_desc" { + tuples "media1_out mo num_desc" +} + +SectionVendorTuples."media1_out mo_size_desc" { + tokens "skl_tokens" + + tuples."byte.u8_block_type" { + SKL_TKN_U8_BLOCK_TYPE "0" + } + + tuples."short.u16_size_desc" { + SKL_TKN_U16_BLOCK_SIZE "536" + } +} + +SectionData."media1_out mo_size_desc" { + tuples "media1_out mo_size_desc" +} + +SectionVendorTuples."media1_out mo" { + tokens "skl_tokens" + + tuples."uuid" { + SKL_TKN_UUID "90, 80, 86, 60, 215, 36, 143, 65, 189, 220, 193, 245, 163, 172, 42, 224" + } + + tuples."byte.u8_data" { + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_DYN_IN_PIN "1" + SKL_TKN_U8_DYN_OUT_PIN "0" + SKL_TKN_U8_TIME_SLOT "0" + SKL_TKN_U8_CORE_ID "0" + SKL_TKN_U8_MODULE_TYPE "0" + SKL_TKN_U8_CONN_TYPE "0" + SKL_TKN_U8_HW_CONN_TYPE "2" + SKL_TKN_U8_DEV_TYPE "6" + } + + tuples."short.u16_data" { + SKL_TKN_U16_MOD_INST_ID "4" + } + + tuples."word.u32_data" { + SKL_TKN_U32_VBUS_ID "4294967295" + SKL_TKN_U32_PARAMS_FIXUP "0" + SKL_TKN_U32_CONVERTER "0" + SKL_TKN_U32_PIPE_ID "9" + SKL_TKN_U32_PIPE_CONN_TYPE "1" + SKL_TKN_U32_PIPE_PRIORITY "0" + SKL_TKN_U32_PMODE "0" + SKL_TKN_U32_D0I3_CAPS "0" + SKL_TKN_U32_PROC_DOMAIN "0" + SKL_TKN_U32_PIPE_DIRECTION "1" + SKL_TKN_U32_NUM_CONFIGS "1" + SKL_TKN_U32_DMA_BUF_SIZE "2" + } + + tuples."word._pipe_0" { + SKL_TKN_U32_PIPE_CONFIG_ID "0" + SKL_TKN_U32_PATH_MEM_PGS "1" + } + + tuples."word._pipe_u32_cfg_in_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_in_fmt_0" { + SKL_TKN_U8_CFG_BPS "32" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."word._pipe_u32_cfg_out_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_out_fmt_0" { + SKL_TKN_U8_CFG_BPS "24" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."short.u16_pipe_mod_cfg_0" { + SKL_TKN_CFG_MOD_RES_ID "0" + SKL_TKN_CFG_MOD_FMT_ID "0" + } + + tuples."word.in_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_1" { + SKL_TKN_U32_DIR_PIN_COUNT "16" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_2" { + SKL_TKN_U32_DIR_PIN_COUNT "32" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_3" { + SKL_TKN_U32_DIR_PIN_COUNT "48" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_4" { + SKL_TKN_U32_DIR_PIN_COUNT "64" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_5" { + SKL_TKN_U32_DIR_PIN_COUNT "80" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_6" { + SKL_TKN_U32_DIR_PIN_COUNT "96" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_7" { + SKL_TKN_U32_DIR_PIN_COUNT "112" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_PIN_MOD_ID "2" + SKL_TKN_U32_PIN_INST_ID "9" + } + + tuples."uuid.out_pin_0" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } +} + +SectionData."media1_out mo" { + tuples "media1_out mo" +} + +SectionWidget."media1_out mo" { + index "0" + type "mixer" + no_pm "true" + subseq "10" + event_type "1" + event_flags "15" + + mixer [ + "codec1_in mi Switch" + ] + + data [ + "media1_out mo num_desc" + "media1_out mo_size_desc" + "media1_out mo" + ] +} + +SectionVendorTuples."media1_out cpr 9 num_desc" { + tokens "skl_tokens" + + tuples."byte.u8_num_blocks" { + SKL_TKN_U8_NUM_BLOCKS "1" + } +} + +SectionData."media1_out cpr 9 num_desc" { + tuples "media1_out cpr 9 num_desc" +} + +SectionVendorTuples."media1_out cpr 9_size_desc" { + tokens "skl_tokens" + + tuples."byte.u8_block_type" { + SKL_TKN_U8_BLOCK_TYPE "0" + } + + tuples."short.u16_size_desc" { + SKL_TKN_U16_BLOCK_SIZE "440" + } +} + +SectionData."media1_out cpr 9_size_desc" { + tuples "media1_out cpr 9_size_desc" +} + +SectionVendorTuples."media1_out cpr 9" { + tokens "skl_tokens" + + tuples."uuid" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } + + tuples."byte.u8_data" { + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_DYN_IN_PIN "0" + SKL_TKN_U8_DYN_OUT_PIN "1" + SKL_TKN_U8_TIME_SLOT "0" + SKL_TKN_U8_CORE_ID "0" + SKL_TKN_U8_MODULE_TYPE "1" + SKL_TKN_U8_CONN_TYPE "0" + SKL_TKN_U8_HW_CONN_TYPE "2" + SKL_TKN_U8_DEV_TYPE "5" + } + + tuples."short.u16_data" { + SKL_TKN_U16_MOD_INST_ID "9" + } + + tuples."word.u32_data" { + SKL_TKN_U32_VBUS_ID "4294967295" + SKL_TKN_U32_PARAMS_FIXUP "0" + SKL_TKN_U32_CONVERTER "0" + SKL_TKN_U32_PIPE_ID "9" + SKL_TKN_U32_PIPE_CONN_TYPE "1" + SKL_TKN_U32_PIPE_PRIORITY "0" + SKL_TKN_U32_PMODE "0" + SKL_TKN_U32_D0I3_CAPS "0" + SKL_TKN_U32_PROC_DOMAIN "0" + SKL_TKN_U32_PIPE_DIRECTION "1" + SKL_TKN_U32_NUM_CONFIGS "1" + SKL_TKN_U32_DMA_BUF_SIZE "2" + } + + tuples."word._pipe_0" { + SKL_TKN_U32_PIPE_CONFIG_ID "0" + SKL_TKN_U32_PATH_MEM_PGS "1" + } + + tuples."word._pipe_u32_cfg_in_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_in_fmt_0" { + SKL_TKN_U8_CFG_BPS "32" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."word._pipe_u32_cfg_out_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_out_fmt_0" { + SKL_TKN_U8_CFG_BPS "24" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."short.u16_pipe_mod_cfg_0" { + SKL_TKN_CFG_MOD_RES_ID "3" + SKL_TKN_CFG_MOD_FMT_ID "3" + } + + tuples."word.in_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_PIN_MOD_ID "1" + SKL_TKN_U32_PIN_INST_ID "4" + } + + tuples."uuid.in_pin_0" { + SKL_TKN_UUID "90, 80, 86, 60, 215, 36, 143, 65, 189, 220, 193, 245, 163, 172, 42, 224" + } + + tuples."word.out_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_1" { + SKL_TKN_U32_DIR_PIN_COUNT "17" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_2" { + SKL_TKN_U32_DIR_PIN_COUNT "33" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_3" { + SKL_TKN_U32_DIR_PIN_COUNT "49" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } +} + +SectionData."media1_out cpr 9" { + tuples "media1_out cpr 9" +} + +SectionWidget."media1_out cpr 9" { + index "0" + type "pga" + no_pm "true" + event_type "4" + + data [ + "media1_out cpr 9 num_desc" + "media1_out cpr 9_size_desc" + "media1_out cpr 9" + ] +} + +SectionVendorTuples."codec2_in cpr 10 num_desc" { + tokens "skl_tokens" + + tuples."byte.u8_num_blocks" { + SKL_TKN_U8_NUM_BLOCKS "1" + } +} + +SectionData."codec2_in cpr 10 num_desc" { + tuples "codec2_in cpr 10 num_desc" +} + +SectionVendorTuples."codec2_in cpr 10_size_desc" { + tokens "skl_tokens" + + tuples."byte.u8_block_type" { + SKL_TKN_U8_BLOCK_TYPE "0" + } + + tuples."short.u16_size_desc" { + SKL_TKN_U16_BLOCK_SIZE "500" + } +} + +SectionData."codec2_in cpr 10_size_desc" { + tuples "codec2_in cpr 10_size_desc" +} + +SectionVendorTuples."codec2_in cpr 10" { + tokens "skl_tokens" + + tuples."uuid" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } + + tuples."byte.u8_data" { + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_DYN_IN_PIN "1" + SKL_TKN_U8_DYN_OUT_PIN "0" + SKL_TKN_U8_TIME_SLOT "0" + SKL_TKN_U8_CORE_ID "0" + SKL_TKN_U8_MODULE_TYPE "1" + SKL_TKN_U8_CONN_TYPE "2" + SKL_TKN_U8_HW_CONN_TYPE "2" + SKL_TKN_U8_DEV_TYPE "4" + } + + tuples."short.u16_data" { + SKL_TKN_U16_MOD_INST_ID "10" + } + + tuples."word.u32_data" { + SKL_TKN_U32_VBUS_ID "4294967295" + SKL_TKN_U32_PARAMS_FIXUP "0" + SKL_TKN_U32_CONVERTER "0" + SKL_TKN_U32_PIPE_ID "10" + SKL_TKN_U32_PIPE_CONN_TYPE "2" + SKL_TKN_U32_PIPE_PRIORITY "0" + SKL_TKN_U32_PMODE "0" + SKL_TKN_U32_D0I3_CAPS "0" + SKL_TKN_U32_PROC_DOMAIN "0" + SKL_TKN_U32_PIPE_DIRECTION "1" + SKL_TKN_U32_NUM_CONFIGS "1" + SKL_TKN_U32_DMA_BUF_SIZE "2" + } + + tuples."word._pipe_0" { + SKL_TKN_U32_PIPE_CONFIG_ID "0" + SKL_TKN_U32_PATH_MEM_PGS "1" + } + + tuples."word._pipe_u32_cfg_in_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_in_fmt_0" { + SKL_TKN_U8_CFG_BPS "24" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."word._pipe_u32_cfg_out_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_out_fmt_0" { + SKL_TKN_U8_CFG_BPS "32" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."short.u16_pipe_mod_cfg_0" { + SKL_TKN_CFG_MOD_RES_ID "2" + SKL_TKN_CFG_MOD_FMT_ID "2" + } + + tuples."word.in_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "5" + } + + tuples."uuid.out_pin_0" { + SKL_TKN_UUID "178, 110, 101, 57, 113, 59, 73, 64, 141, 63, 249, 44, 213, 196, 60, 9" + } + + tuples."word.out_pin_1" { + SKL_TKN_U32_DIR_PIN_COUNT "17" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."uuid.out_pin_1" { + SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0" + } + + tuples."word.out_pin_2" { + SKL_TKN_U32_DIR_PIN_COUNT "33" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."uuid.out_pin_2" { + SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0" + } + + tuples."word.out_pin_3" { + SKL_TKN_U32_DIR_PIN_COUNT "49" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."uuid.out_pin_3" { + SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0" + } +} + +SectionData."codec2_in cpr 10" { + tuples "codec2_in cpr 10" +} + +SectionWidget."codec2_in cpr 10" { + index "0" + type "mixer" + no_pm "true" + event_type "3" + event_flags "9" + + data [ + "codec2_in cpr 10 num_desc" + "codec2_in cpr 10_size_desc" + "codec2_in cpr 10" + ] +} + +SectionVendorTuples."codec2_in mi num_desc" { + tokens "skl_tokens" + + tuples."byte.u8_num_blocks" { + SKL_TKN_U8_NUM_BLOCKS "1" + } +} + +SectionData."codec2_in mi num_desc" { + tuples "codec2_in mi num_desc" +} + +SectionVendorTuples."codec2_in mi_size_desc" { + tokens "skl_tokens" + + tuples."byte.u8_block_type" { + SKL_TKN_U8_BLOCK_TYPE "0" + } + + tuples."short.u16_size_desc" { + SKL_TKN_U16_BLOCK_SIZE "416" + } +} + +SectionData."codec2_in mi_size_desc" { + tuples "codec2_in mi_size_desc" +} + +SectionVendorTuples."codec2_in mi" { + tokens "skl_tokens" + + tuples."uuid" { + SKL_TKN_UUID "178, 110, 101, 57, 113, 59, 73, 64, 141, 63, 249, 44, 213, 196, 60, 9" + } + + tuples."byte.u8_data" { + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_DYN_IN_PIN "0" + SKL_TKN_U8_DYN_OUT_PIN "1" + SKL_TKN_U8_TIME_SLOT "0" + SKL_TKN_U8_CORE_ID "0" + SKL_TKN_U8_MODULE_TYPE "0" + SKL_TKN_U8_CONN_TYPE "0" + SKL_TKN_U8_HW_CONN_TYPE "2" + SKL_TKN_U8_DEV_TYPE "6" + } + + tuples."short.u16_data" { + SKL_TKN_U16_MOD_INST_ID "5" + } + + tuples."word.u32_data" { + SKL_TKN_U32_VBUS_ID "4294967295" + SKL_TKN_U32_PARAMS_FIXUP "0" + SKL_TKN_U32_CONVERTER "0" + SKL_TKN_U32_PIPE_ID "10" + SKL_TKN_U32_PIPE_CONN_TYPE "2" + SKL_TKN_U32_PIPE_PRIORITY "0" + SKL_TKN_U32_PMODE "0" + SKL_TKN_U32_D0I3_CAPS "0" + SKL_TKN_U32_PROC_DOMAIN "0" + SKL_TKN_U32_PIPE_DIRECTION "1" + SKL_TKN_U32_NUM_CONFIGS "1" + SKL_TKN_U32_DMA_BUF_SIZE "2" + } + + tuples."word._pipe_0" { + SKL_TKN_U32_PIPE_CONFIG_ID "0" + SKL_TKN_U32_PATH_MEM_PGS "1" + } + + tuples."word._pipe_u32_cfg_in_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_in_fmt_0" { + SKL_TKN_U8_CFG_BPS "24" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."word._pipe_u32_cfg_out_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_out_fmt_0" { + SKL_TKN_U8_CFG_BPS "32" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."short.u16_pipe_mod_cfg_0" { + SKL_TKN_CFG_MOD_RES_ID "0" + SKL_TKN_CFG_MOD_FMT_ID "0" + } + + tuples."word.in_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_PIN_MOD_ID "2" + SKL_TKN_U32_PIN_INST_ID "10" + } + + tuples."uuid.in_pin_0" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } + + tuples."word.out_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_1" { + SKL_TKN_U32_DIR_PIN_COUNT "17" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_2" { + SKL_TKN_U32_DIR_PIN_COUNT "33" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } +} + +SectionData."codec2_in mi" { + tuples "codec2_in mi" +} + +SectionWidget."codec2_in mi" { + index "0" + type "pga" + no_pm "true" + subseq "10" + event_type "4" + event_flags "9" + + data [ + "codec2_in mi num_desc" + "codec2_in mi_size_desc" + "codec2_in mi" + ] +} + +SectionWidget."codec2_in" { + index "0" + type "aif_in" + no_pm "true" +} + +SectionVendorTuples."media2_out mo num_desc" { + tokens "skl_tokens" + + tuples."byte.u8_num_blocks" { + SKL_TKN_U8_NUM_BLOCKS "1" + } +} + +SectionData."media2_out mo num_desc" { + tuples "media2_out mo num_desc" +} + +SectionVendorTuples."media2_out mo_size_desc" { + tokens "skl_tokens" + + tuples."byte.u8_block_type" { + SKL_TKN_U8_BLOCK_TYPE "0" + } + + tuples."short.u16_size_desc" { + SKL_TKN_U16_BLOCK_SIZE "536" + } +} + +SectionData."media2_out mo_size_desc" { + tuples "media2_out mo_size_desc" +} + +SectionVendorTuples."media2_out mo" { + tokens "skl_tokens" + + tuples."uuid" { + SKL_TKN_UUID "90, 80, 86, 60, 215, 36, 143, 65, 189, 220, 193, 245, 163, 172, 42, 224" + } + + tuples."byte.u8_data" { + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_DYN_IN_PIN "1" + SKL_TKN_U8_DYN_OUT_PIN "0" + SKL_TKN_U8_TIME_SLOT "0" + SKL_TKN_U8_CORE_ID "0" + SKL_TKN_U8_MODULE_TYPE "0" + SKL_TKN_U8_CONN_TYPE "0" + SKL_TKN_U8_HW_CONN_TYPE "2" + SKL_TKN_U8_DEV_TYPE "6" + } + + tuples."short.u16_data" { + SKL_TKN_U16_MOD_INST_ID "5" + } + + tuples."word.u32_data" { + SKL_TKN_U32_VBUS_ID "4294967295" + SKL_TKN_U32_PARAMS_FIXUP "0" + SKL_TKN_U32_CONVERTER "0" + SKL_TKN_U32_PIPE_ID "11" + SKL_TKN_U32_PIPE_CONN_TYPE "1" + SKL_TKN_U32_PIPE_PRIORITY "0" + SKL_TKN_U32_PMODE "0" + SKL_TKN_U32_D0I3_CAPS "0" + SKL_TKN_U32_PROC_DOMAIN "0" + SKL_TKN_U32_PIPE_DIRECTION "1" + SKL_TKN_U32_NUM_CONFIGS "1" + SKL_TKN_U32_DMA_BUF_SIZE "2" + } + + tuples."word._pipe_0" { + SKL_TKN_U32_PIPE_CONFIG_ID "0" + SKL_TKN_U32_PATH_MEM_PGS "1" + } + + tuples."word._pipe_u32_cfg_in_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_in_fmt_0" { + SKL_TKN_U8_CFG_BPS "32" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."word._pipe_u32_cfg_out_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_out_fmt_0" { + SKL_TKN_U8_CFG_BPS "24" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."short.u16_pipe_mod_cfg_0" { + SKL_TKN_CFG_MOD_RES_ID "0" + SKL_TKN_CFG_MOD_FMT_ID "0" + } + + tuples."word.in_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_1" { + SKL_TKN_U32_DIR_PIN_COUNT "16" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_2" { + SKL_TKN_U32_DIR_PIN_COUNT "32" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_3" { + SKL_TKN_U32_DIR_PIN_COUNT "48" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_4" { + SKL_TKN_U32_DIR_PIN_COUNT "64" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_5" { + SKL_TKN_U32_DIR_PIN_COUNT "80" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_6" { + SKL_TKN_U32_DIR_PIN_COUNT "96" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_7" { + SKL_TKN_U32_DIR_PIN_COUNT "112" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_PIN_MOD_ID "2" + SKL_TKN_U32_PIN_INST_ID "11" + } + + tuples."uuid.out_pin_0" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } +} + +SectionData."media2_out mo" { + tuples "media2_out mo" +} + +SectionWidget."media2_out mo" { + index "0" + type "mixer" + no_pm "true" + subseq "10" + event_type "1" + event_flags "15" + + mixer [ + "codec2_in mi Switch" + ] + + data [ + "media2_out mo num_desc" + "media2_out mo_size_desc" + "media2_out mo" + ] +} + +SectionVendorTuples."media2_out cpr 11 num_desc" { + tokens "skl_tokens" + + tuples."byte.u8_num_blocks" { + SKL_TKN_U8_NUM_BLOCKS "1" + } +} + +SectionData."media2_out cpr 11 num_desc" { + tuples "media2_out cpr 11 num_desc" +} + +SectionVendorTuples."media2_out cpr 11_size_desc" { + tokens "skl_tokens" + + tuples."byte.u8_block_type" { + SKL_TKN_U8_BLOCK_TYPE "0" + } + + tuples."short.u16_size_desc" { + SKL_TKN_U16_BLOCK_SIZE "440" + } +} + +SectionData."media2_out cpr 11_size_desc" { + tuples "media2_out cpr 11_size_desc" +} + +SectionVendorTuples."media2_out cpr 11" { + tokens "skl_tokens" + + tuples."uuid" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } + + tuples."byte.u8_data" { + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_DYN_IN_PIN "0" + SKL_TKN_U8_DYN_OUT_PIN "1" + SKL_TKN_U8_TIME_SLOT "0" + SKL_TKN_U8_CORE_ID "0" + SKL_TKN_U8_MODULE_TYPE "1" + SKL_TKN_U8_CONN_TYPE "0" + SKL_TKN_U8_HW_CONN_TYPE "2" + SKL_TKN_U8_DEV_TYPE "5" + } + + tuples."short.u16_data" { + SKL_TKN_U16_MOD_INST_ID "11" + } + + tuples."word.u32_data" { + SKL_TKN_U32_VBUS_ID "4294967295" + SKL_TKN_U32_PARAMS_FIXUP "0" + SKL_TKN_U32_CONVERTER "0" + SKL_TKN_U32_PIPE_ID "11" + SKL_TKN_U32_PIPE_CONN_TYPE "1" + SKL_TKN_U32_PIPE_PRIORITY "0" + SKL_TKN_U32_PMODE "0" + SKL_TKN_U32_D0I3_CAPS "0" + SKL_TKN_U32_PROC_DOMAIN "0" + SKL_TKN_U32_PIPE_DIRECTION "1" + SKL_TKN_U32_NUM_CONFIGS "1" + SKL_TKN_U32_DMA_BUF_SIZE "2" + } + + tuples."word._pipe_0" { + SKL_TKN_U32_PIPE_CONFIG_ID "0" + SKL_TKN_U32_PATH_MEM_PGS "1" + } + + tuples."word._pipe_u32_cfg_in_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_in_fmt_0" { + SKL_TKN_U8_CFG_BPS "32" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."word._pipe_u32_cfg_out_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_out_fmt_0" { + SKL_TKN_U8_CFG_BPS "24" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."short.u16_pipe_mod_cfg_0" { + SKL_TKN_CFG_MOD_RES_ID "3" + SKL_TKN_CFG_MOD_FMT_ID "3" + } + + tuples."word.in_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_PIN_MOD_ID "1" + SKL_TKN_U32_PIN_INST_ID "5" + } + + tuples."uuid.in_pin_0" { + SKL_TKN_UUID "90, 80, 86, 60, 215, 36, 143, 65, 189, 220, 193, 245, 163, 172, 42, 224" + } + + tuples."word.out_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_1" { + SKL_TKN_U32_DIR_PIN_COUNT "17" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_2" { + SKL_TKN_U32_DIR_PIN_COUNT "33" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_3" { + SKL_TKN_U32_DIR_PIN_COUNT "49" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } +} + +SectionData."media2_out cpr 11" { + tuples "media2_out cpr 11" +} + +SectionWidget."media2_out cpr 11" { + index "0" + type "pga" + no_pm "true" + event_type "4" + + data [ + "media2_out cpr 11 num_desc" + "media2_out cpr 11_size_desc" + "media2_out cpr 11" + ] +} + +SectionVendorTuples."hdmi1_out cpr 12 num_desc" { + tokens "skl_tokens" + + tuples."byte.u8_num_blocks" { + SKL_TKN_U8_NUM_BLOCKS "1" + } +} + +SectionData."hdmi1_out cpr 12 num_desc" { + tuples "hdmi1_out cpr 12 num_desc" +} + +SectionVendorTuples."hdmi1_out cpr 12_size_desc" { + tokens "skl_tokens" + + tuples."byte.u8_block_type" { + SKL_TKN_U8_BLOCK_TYPE "0" + } + + tuples."short.u16_size_desc" { + SKL_TKN_U16_BLOCK_SIZE "500" + } +} + +SectionData."hdmi1_out cpr 12_size_desc" { + tuples "hdmi1_out cpr 12_size_desc" +} + +SectionVendorTuples."hdmi1_out cpr 12" { + tokens "skl_tokens" + + tuples."uuid" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } + + tuples."byte.u8_data" { + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_DYN_IN_PIN "1" + SKL_TKN_U8_DYN_OUT_PIN "0" + SKL_TKN_U8_TIME_SLOT "0" + SKL_TKN_U8_CORE_ID "0" + SKL_TKN_U8_MODULE_TYPE "1" + SKL_TKN_U8_CONN_TYPE "1" + SKL_TKN_U8_HW_CONN_TYPE "1" + SKL_TKN_U8_DEV_TYPE "5" + } + + tuples."short.u16_data" { + SKL_TKN_U16_MOD_INST_ID "12" + } + + tuples."word.u32_data" { + SKL_TKN_U32_VBUS_ID "4294967295" + SKL_TKN_U32_PARAMS_FIXUP "0" + SKL_TKN_U32_CONVERTER "0" + SKL_TKN_U32_PIPE_ID "12" + SKL_TKN_U32_PIPE_CONN_TYPE "1" + SKL_TKN_U32_PIPE_PRIORITY "0" + SKL_TKN_U32_PMODE "0" + SKL_TKN_U32_D0I3_CAPS "0" + SKL_TKN_U32_PROC_DOMAIN "0" + SKL_TKN_U32_PIPE_DIRECTION "0" + SKL_TKN_U32_NUM_CONFIGS "1" + SKL_TKN_U32_DMA_BUF_SIZE "2" + } + + tuples."word._pipe_0" { + SKL_TKN_U32_PIPE_CONFIG_ID "0" + SKL_TKN_U32_PATH_MEM_PGS "2" + } + + tuples."word._pipe_u32_cfg_in_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_in_fmt_0" { + SKL_TKN_U8_CFG_BPS "16" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."word._pipe_u32_cfg_out_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_out_fmt_0" { + SKL_TKN_U8_CFG_BPS "16" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."short.u16_pipe_mod_cfg_0" { + SKL_TKN_CFG_MOD_RES_ID "4" + SKL_TKN_CFG_MOD_FMT_ID "4" + } + + tuples."word.in_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_PIN_MOD_ID "2" + SKL_TKN_U32_PIN_INST_ID "13" + } + + tuples."uuid.out_pin_0" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } + + tuples."word.out_pin_1" { + SKL_TKN_U32_DIR_PIN_COUNT "17" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."uuid.out_pin_1" { + SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0" + } + + tuples."word.out_pin_2" { + SKL_TKN_U32_DIR_PIN_COUNT "33" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."uuid.out_pin_2" { + SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0" + } + + tuples."word.out_pin_3" { + SKL_TKN_U32_DIR_PIN_COUNT "49" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."uuid.out_pin_3" { + SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0" + } +} + +SectionData."hdmi1_out cpr 12" { + tuples "hdmi1_out cpr 12" +} + +SectionWidget."hdmi1_out cpr 12" { + index "0" + type "mixer" + no_pm "true" + event_type "3" + event_flags "9" + + data [ + "hdmi1_out cpr 12 num_desc" + "hdmi1_out cpr 12_size_desc" + "hdmi1_out cpr 12" + ] +} + +SectionVendorTuples."hdmi1_out cpr 13 num_desc" { + tokens "skl_tokens" + + tuples."byte.u8_num_blocks" { + SKL_TKN_U8_NUM_BLOCKS "1" + } +} + +SectionData."hdmi1_out cpr 13 num_desc" { + tuples "hdmi1_out cpr 13 num_desc" +} + +SectionVendorTuples."hdmi1_out cpr 13_size_desc" { + tokens "skl_tokens" + + tuples."byte.u8_block_type" { + SKL_TKN_U8_BLOCK_TYPE "0" + } + + tuples."short.u16_size_desc" { + SKL_TKN_U16_BLOCK_SIZE "440" + } +} + +SectionData."hdmi1_out cpr 13_size_desc" { + tuples "hdmi1_out cpr 13_size_desc" +} + +SectionVendorTuples."hdmi1_out cpr 13" { + tokens "skl_tokens" + + tuples."uuid" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } + + tuples."byte.u8_data" { + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_DYN_IN_PIN "0" + SKL_TKN_U8_DYN_OUT_PIN "1" + SKL_TKN_U8_TIME_SLOT "0" + SKL_TKN_U8_CORE_ID "0" + SKL_TKN_U8_MODULE_TYPE "1" + SKL_TKN_U8_CONN_TYPE "1" + SKL_TKN_U8_HW_CONN_TYPE "1" + SKL_TKN_U8_DEV_TYPE "4" + } + + tuples."short.u16_data" { + SKL_TKN_U16_MOD_INST_ID "13" + } + + tuples."word.u32_data" { + SKL_TKN_U32_VBUS_ID "4294967295" + SKL_TKN_U32_PARAMS_FIXUP "0" + SKL_TKN_U32_CONVERTER "0" + SKL_TKN_U32_PIPE_ID "12" + SKL_TKN_U32_PIPE_CONN_TYPE "1" + SKL_TKN_U32_PIPE_PRIORITY "0" + SKL_TKN_U32_PMODE "0" + SKL_TKN_U32_D0I3_CAPS "0" + SKL_TKN_U32_PROC_DOMAIN "0" + SKL_TKN_U32_PIPE_DIRECTION "0" + SKL_TKN_U32_NUM_CONFIGS "1" + SKL_TKN_U32_DMA_BUF_SIZE "2" + } + + tuples."word._pipe_0" { + SKL_TKN_U32_PIPE_CONFIG_ID "0" + SKL_TKN_U32_PATH_MEM_PGS "2" + } + + tuples."word._pipe_u32_cfg_in_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_in_fmt_0" { + SKL_TKN_U8_CFG_BPS "16" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."word._pipe_u32_cfg_out_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_out_fmt_0" { + SKL_TKN_U8_CFG_BPS "16" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."short.u16_pipe_mod_cfg_0" { + SKL_TKN_CFG_MOD_RES_ID "4" + SKL_TKN_CFG_MOD_FMT_ID "4" + } + + tuples."word.in_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_PIN_MOD_ID "2" + SKL_TKN_U32_PIN_INST_ID "12" + } + + tuples."uuid.in_pin_0" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } + + tuples."word.out_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_1" { + SKL_TKN_U32_DIR_PIN_COUNT "17" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_2" { + SKL_TKN_U32_DIR_PIN_COUNT "33" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_3" { + SKL_TKN_U32_DIR_PIN_COUNT "49" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } +} + +SectionData."hdmi1_out cpr 13" { + tuples "hdmi1_out cpr 13" +} + +SectionWidget."hdmi1_out cpr 13" { + index "0" + type "pga" + no_pm "true" + subseq "10" + event_type "4" + event_flags "9" + + data [ + "hdmi1_out cpr 13 num_desc" + "hdmi1_out cpr 13_size_desc" + "hdmi1_out cpr 13" + ] +} + +SectionWidget."iDisp1_out" { + index "0" + type "aif_out" + no_pm "true" +} + +SectionVendorTuples."hdmi2_out cpr 14 num_desc" { + tokens "skl_tokens" + + tuples."byte.u8_num_blocks" { + SKL_TKN_U8_NUM_BLOCKS "1" + } +} + +SectionData."hdmi2_out cpr 14 num_desc" { + tuples "hdmi2_out cpr 14 num_desc" +} + +SectionVendorTuples."hdmi2_out cpr 14_size_desc" { + tokens "skl_tokens" + + tuples."byte.u8_block_type" { + SKL_TKN_U8_BLOCK_TYPE "0" + } + + tuples."short.u16_size_desc" { + SKL_TKN_U16_BLOCK_SIZE "500" + } +} + +SectionData."hdmi2_out cpr 14_size_desc" { + tuples "hdmi2_out cpr 14_size_desc" +} + +SectionVendorTuples."hdmi2_out cpr 14" { + tokens "skl_tokens" + + tuples."uuid" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } + + tuples."byte.u8_data" { + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_DYN_IN_PIN "1" + SKL_TKN_U8_DYN_OUT_PIN "0" + SKL_TKN_U8_TIME_SLOT "0" + SKL_TKN_U8_CORE_ID "0" + SKL_TKN_U8_MODULE_TYPE "1" + SKL_TKN_U8_CONN_TYPE "1" + SKL_TKN_U8_HW_CONN_TYPE "1" + SKL_TKN_U8_DEV_TYPE "5" + } + + tuples."short.u16_data" { + SKL_TKN_U16_MOD_INST_ID "14" + } + + tuples."word.u32_data" { + SKL_TKN_U32_VBUS_ID "4294967295" + SKL_TKN_U32_PARAMS_FIXUP "0" + SKL_TKN_U32_CONVERTER "0" + SKL_TKN_U32_PIPE_ID "13" + SKL_TKN_U32_PIPE_CONN_TYPE "1" + SKL_TKN_U32_PIPE_PRIORITY "0" + SKL_TKN_U32_PMODE "0" + SKL_TKN_U32_D0I3_CAPS "0" + SKL_TKN_U32_PROC_DOMAIN "0" + SKL_TKN_U32_PIPE_DIRECTION "0" + SKL_TKN_U32_NUM_CONFIGS "1" + SKL_TKN_U32_DMA_BUF_SIZE "2" + } + + tuples."word._pipe_0" { + SKL_TKN_U32_PIPE_CONFIG_ID "0" + SKL_TKN_U32_PATH_MEM_PGS "2" + } + + tuples."word._pipe_u32_cfg_in_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_in_fmt_0" { + SKL_TKN_U8_CFG_BPS "16" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."word._pipe_u32_cfg_out_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_out_fmt_0" { + SKL_TKN_U8_CFG_BPS "16" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."short.u16_pipe_mod_cfg_0" { + SKL_TKN_CFG_MOD_RES_ID "4" + SKL_TKN_CFG_MOD_FMT_ID "4" + } + + tuples."word.in_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_PIN_MOD_ID "2" + SKL_TKN_U32_PIN_INST_ID "15" + } + + tuples."uuid.out_pin_0" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } + + tuples."word.out_pin_1" { + SKL_TKN_U32_DIR_PIN_COUNT "17" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."uuid.out_pin_1" { + SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0" + } + + tuples."word.out_pin_2" { + SKL_TKN_U32_DIR_PIN_COUNT "33" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."uuid.out_pin_2" { + SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0" + } + + tuples."word.out_pin_3" { + SKL_TKN_U32_DIR_PIN_COUNT "49" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."uuid.out_pin_3" { + SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0" + } +} + +SectionData."hdmi2_out cpr 14" { + tuples "hdmi2_out cpr 14" +} + +SectionWidget."hdmi2_out cpr 14" { + index "0" + type "mixer" + no_pm "true" + event_type "3" + event_flags "9" + + data [ + "hdmi2_out cpr 14 num_desc" + "hdmi2_out cpr 14_size_desc" + "hdmi2_out cpr 14" + ] +} + +SectionVendorTuples."hdmi2_out cpr 15 num_desc" { + tokens "skl_tokens" + + tuples."byte.u8_num_blocks" { + SKL_TKN_U8_NUM_BLOCKS "1" + } +} + +SectionData."hdmi2_out cpr 15 num_desc" { + tuples "hdmi2_out cpr 15 num_desc" +} + +SectionVendorTuples."hdmi2_out cpr 15_size_desc" { + tokens "skl_tokens" + + tuples."byte.u8_block_type" { + SKL_TKN_U8_BLOCK_TYPE "0" + } + + tuples."short.u16_size_desc" { + SKL_TKN_U16_BLOCK_SIZE "440" + } +} + +SectionData."hdmi2_out cpr 15_size_desc" { + tuples "hdmi2_out cpr 15_size_desc" +} + +SectionVendorTuples."hdmi2_out cpr 15" { + tokens "skl_tokens" + + tuples."uuid" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } + + tuples."byte.u8_data" { + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_DYN_IN_PIN "0" + SKL_TKN_U8_DYN_OUT_PIN "1" + SKL_TKN_U8_TIME_SLOT "0" + SKL_TKN_U8_CORE_ID "0" + SKL_TKN_U8_MODULE_TYPE "1" + SKL_TKN_U8_CONN_TYPE "1" + SKL_TKN_U8_HW_CONN_TYPE "1" + SKL_TKN_U8_DEV_TYPE "4" + } + + tuples."short.u16_data" { + SKL_TKN_U16_MOD_INST_ID "15" + } + + tuples."word.u32_data" { + SKL_TKN_U32_VBUS_ID "4294967295" + SKL_TKN_U32_PARAMS_FIXUP "0" + SKL_TKN_U32_CONVERTER "0" + SKL_TKN_U32_PIPE_ID "13" + SKL_TKN_U32_PIPE_CONN_TYPE "1" + SKL_TKN_U32_PIPE_PRIORITY "0" + SKL_TKN_U32_PMODE "0" + SKL_TKN_U32_D0I3_CAPS "0" + SKL_TKN_U32_PROC_DOMAIN "0" + SKL_TKN_U32_PIPE_DIRECTION "0" + SKL_TKN_U32_NUM_CONFIGS "1" + SKL_TKN_U32_DMA_BUF_SIZE "2" + } + + tuples."word._pipe_0" { + SKL_TKN_U32_PIPE_CONFIG_ID "0" + SKL_TKN_U32_PATH_MEM_PGS "2" + } + + tuples."word._pipe_u32_cfg_in_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_in_fmt_0" { + SKL_TKN_U8_CFG_BPS "16" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."word._pipe_u32_cfg_out_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_out_fmt_0" { + SKL_TKN_U8_CFG_BPS "16" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."short.u16_pipe_mod_cfg_0" { + SKL_TKN_CFG_MOD_RES_ID "4" + SKL_TKN_CFG_MOD_FMT_ID "4" + } + + tuples."word.in_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_PIN_MOD_ID "2" + SKL_TKN_U32_PIN_INST_ID "14" + } + + tuples."uuid.in_pin_0" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } + + tuples."word.out_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_1" { + SKL_TKN_U32_DIR_PIN_COUNT "17" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_2" { + SKL_TKN_U32_DIR_PIN_COUNT "33" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_3" { + SKL_TKN_U32_DIR_PIN_COUNT "49" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } +} + +SectionData."hdmi2_out cpr 15" { + tuples "hdmi2_out cpr 15" +} + +SectionWidget."hdmi2_out cpr 15" { + index "0" + type "pga" + no_pm "true" + subseq "10" + event_type "4" + event_flags "9" + + data [ + "hdmi2_out cpr 15 num_desc" + "hdmi2_out cpr 15_size_desc" + "hdmi2_out cpr 15" + ] +} + +SectionWidget."iDisp2_out" { + index "0" + type "aif_out" + no_pm "true" +} + +SectionVendorTuples."hdmi3_out cpr 16 num_desc" { + tokens "skl_tokens" + + tuples."byte.u8_num_blocks" { + SKL_TKN_U8_NUM_BLOCKS "1" + } +} + +SectionData."hdmi3_out cpr 16 num_desc" { + tuples "hdmi3_out cpr 16 num_desc" +} + +SectionVendorTuples."hdmi3_out cpr 16_size_desc" { + tokens "skl_tokens" + + tuples."byte.u8_block_type" { + SKL_TKN_U8_BLOCK_TYPE "0" + } + + tuples."short.u16_size_desc" { + SKL_TKN_U16_BLOCK_SIZE "500" + } +} + +SectionData."hdmi3_out cpr 16_size_desc" { + tuples "hdmi3_out cpr 16_size_desc" +} + +SectionVendorTuples."hdmi3_out cpr 16" { + tokens "skl_tokens" + + tuples."uuid" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } + + tuples."byte.u8_data" { + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_DYN_IN_PIN "1" + SKL_TKN_U8_DYN_OUT_PIN "0" + SKL_TKN_U8_TIME_SLOT "0" + SKL_TKN_U8_CORE_ID "0" + SKL_TKN_U8_MODULE_TYPE "1" + SKL_TKN_U8_CONN_TYPE "1" + SKL_TKN_U8_HW_CONN_TYPE "1" + SKL_TKN_U8_DEV_TYPE "5" + } + + tuples."short.u16_data" { + SKL_TKN_U16_MOD_INST_ID "16" + } + + tuples."word.u32_data" { + SKL_TKN_U32_VBUS_ID "4294967295" + SKL_TKN_U32_PARAMS_FIXUP "0" + SKL_TKN_U32_CONVERTER "0" + SKL_TKN_U32_PIPE_ID "14" + SKL_TKN_U32_PIPE_CONN_TYPE "1" + SKL_TKN_U32_PIPE_PRIORITY "0" + SKL_TKN_U32_PMODE "0" + SKL_TKN_U32_D0I3_CAPS "0" + SKL_TKN_U32_PROC_DOMAIN "0" + SKL_TKN_U32_PIPE_DIRECTION "0" + SKL_TKN_U32_NUM_CONFIGS "1" + SKL_TKN_U32_DMA_BUF_SIZE "2" + } + + tuples."word._pipe_0" { + SKL_TKN_U32_PIPE_CONFIG_ID "0" + SKL_TKN_U32_PATH_MEM_PGS "2" + } + + tuples."word._pipe_u32_cfg_in_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_in_fmt_0" { + SKL_TKN_U8_CFG_BPS "16" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."word._pipe_u32_cfg_out_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_out_fmt_0" { + SKL_TKN_U8_CFG_BPS "16" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."short.u16_pipe_mod_cfg_0" { + SKL_TKN_CFG_MOD_RES_ID "4" + SKL_TKN_CFG_MOD_FMT_ID "4" + } + + tuples."word.in_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_PIN_MOD_ID "2" + SKL_TKN_U32_PIN_INST_ID "17" + } + + tuples."uuid.out_pin_0" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } + + tuples."word.out_pin_1" { + SKL_TKN_U32_DIR_PIN_COUNT "17" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."uuid.out_pin_1" { + SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0" + } + + tuples."word.out_pin_2" { + SKL_TKN_U32_DIR_PIN_COUNT "33" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."uuid.out_pin_2" { + SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0" + } + + tuples."word.out_pin_3" { + SKL_TKN_U32_DIR_PIN_COUNT "49" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."uuid.out_pin_3" { + SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0" + } +} + +SectionData."hdmi3_out cpr 16" { + tuples "hdmi3_out cpr 16" +} + +SectionWidget."hdmi3_out cpr 16" { + index "0" + type "mixer" + no_pm "true" + event_type "3" + event_flags "9" + + data [ + "hdmi3_out cpr 16 num_desc" + "hdmi3_out cpr 16_size_desc" + "hdmi3_out cpr 16" + ] +} + +SectionVendorTuples."hdmi3_out cpr 17 num_desc" { + tokens "skl_tokens" + + tuples."byte.u8_num_blocks" { + SKL_TKN_U8_NUM_BLOCKS "1" + } +} + +SectionData."hdmi3_out cpr 17 num_desc" { + tuples "hdmi3_out cpr 17 num_desc" +} + +SectionVendorTuples."hdmi3_out cpr 17_size_desc" { + tokens "skl_tokens" + + tuples."byte.u8_block_type" { + SKL_TKN_U8_BLOCK_TYPE "0" + } + + tuples."short.u16_size_desc" { + SKL_TKN_U16_BLOCK_SIZE "440" + } +} + +SectionData."hdmi3_out cpr 17_size_desc" { + tuples "hdmi3_out cpr 17_size_desc" +} + +SectionVendorTuples."hdmi3_out cpr 17" { + tokens "skl_tokens" + + tuples."uuid" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } + + tuples."byte.u8_data" { + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_DYN_IN_PIN "0" + SKL_TKN_U8_DYN_OUT_PIN "1" + SKL_TKN_U8_TIME_SLOT "0" + SKL_TKN_U8_CORE_ID "0" + SKL_TKN_U8_MODULE_TYPE "1" + SKL_TKN_U8_CONN_TYPE "1" + SKL_TKN_U8_HW_CONN_TYPE "1" + SKL_TKN_U8_DEV_TYPE "4" + } + + tuples."short.u16_data" { + SKL_TKN_U16_MOD_INST_ID "17" + } + + tuples."word.u32_data" { + SKL_TKN_U32_VBUS_ID "4294967295" + SKL_TKN_U32_PARAMS_FIXUP "0" + SKL_TKN_U32_CONVERTER "0" + SKL_TKN_U32_PIPE_ID "14" + SKL_TKN_U32_PIPE_CONN_TYPE "1" + SKL_TKN_U32_PIPE_PRIORITY "0" + SKL_TKN_U32_PMODE "0" + SKL_TKN_U32_D0I3_CAPS "0" + SKL_TKN_U32_PROC_DOMAIN "0" + SKL_TKN_U32_PIPE_DIRECTION "0" + SKL_TKN_U32_NUM_CONFIGS "1" + SKL_TKN_U32_DMA_BUF_SIZE "2" + } + + tuples."word._pipe_0" { + SKL_TKN_U32_PIPE_CONFIG_ID "0" + SKL_TKN_U32_PATH_MEM_PGS "2" + } + + tuples."word._pipe_u32_cfg_in_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_in_fmt_0" { + SKL_TKN_U8_CFG_BPS "16" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."word._pipe_u32_cfg_out_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_out_fmt_0" { + SKL_TKN_U8_CFG_BPS "16" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."short.u16_pipe_mod_cfg_0" { + SKL_TKN_CFG_MOD_RES_ID "4" + SKL_TKN_CFG_MOD_FMT_ID "4" + } + + tuples."word.in_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_PIN_MOD_ID "2" + SKL_TKN_U32_PIN_INST_ID "16" + } + + tuples."uuid.in_pin_0" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } + + tuples."word.out_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_1" { + SKL_TKN_U32_DIR_PIN_COUNT "17" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_2" { + SKL_TKN_U32_DIR_PIN_COUNT "33" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_3" { + SKL_TKN_U32_DIR_PIN_COUNT "49" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } +} + +SectionData."hdmi3_out cpr 17" { + tuples "hdmi3_out cpr 17" +} + +SectionWidget."hdmi3_out cpr 17" { + index "0" + type "pga" + no_pm "true" + subseq "10" + event_type "4" + event_flags "9" + + data [ + "hdmi3_out cpr 17 num_desc" + "hdmi3_out cpr 17_size_desc" + "hdmi3_out cpr 17" + ] +} + +SectionWidget."iDisp3_out" { + index "0" + type "aif_out" + no_pm "true" +} + +SectionVendorTuples."mch_cap_in cpr 18 num_desc" { + tokens "skl_tokens" + + tuples."byte.u8_num_blocks" { + SKL_TKN_U8_NUM_BLOCKS "1" + } +} + +SectionData."mch_cap_in cpr 18 num_desc" { + tuples "mch_cap_in cpr 18 num_desc" +} + +SectionVendorTuples."mch_cap_in cpr 18_size_desc" { + tokens "skl_tokens" + + tuples."byte.u8_block_type" { + SKL_TKN_U8_BLOCK_TYPE "0" + } + + tuples."short.u16_size_desc" { + SKL_TKN_U16_BLOCK_SIZE "500" + } +} + +SectionData."mch_cap_in cpr 18_size_desc" { + tuples "mch_cap_in cpr 18_size_desc" +} + +SectionVendorTuples."mch_cap_in cpr 18" { + tokens "skl_tokens" + + tuples."uuid" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } + + tuples."byte.u8_data" { + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_DYN_IN_PIN "1" + SKL_TKN_U8_DYN_OUT_PIN "0" + SKL_TKN_U8_TIME_SLOT "0" + SKL_TKN_U8_CORE_ID "0" + SKL_TKN_U8_MODULE_TYPE "1" + SKL_TKN_U8_CONN_TYPE "2" + SKL_TKN_U8_HW_CONN_TYPE "2" + SKL_TKN_U8_DEV_TYPE "1" + } + + tuples."short.u16_data" { + SKL_TKN_U16_MOD_INST_ID "18" + } + + tuples."word.u32_data" { + SKL_TKN_U32_VBUS_ID "0" + SKL_TKN_U32_PARAMS_FIXUP "0" + SKL_TKN_U32_CONVERTER "0" + SKL_TKN_U32_PIPE_ID "15" + SKL_TKN_U32_PIPE_CONN_TYPE "2" + SKL_TKN_U32_PIPE_PRIORITY "0" + SKL_TKN_U32_PMODE "0" + SKL_TKN_U32_D0I3_CAPS "0" + SKL_TKN_U32_PROC_DOMAIN "0" + SKL_TKN_U32_PIPE_DIRECTION "1" + SKL_TKN_U32_NUM_CONFIGS "1" + SKL_TKN_U32_DMA_BUF_SIZE "2" + } + + tuples."word._pipe_0" { + SKL_TKN_U32_PIPE_CONFIG_ID "0" + SKL_TKN_U32_PATH_MEM_PGS "2" + } + + tuples."word._pipe_u32_cfg_in_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_in_fmt_0" { + SKL_TKN_U8_CFG_BPS "16" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."word._pipe_u32_cfg_out_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_out_fmt_0" { + SKL_TKN_U8_CFG_BPS "16" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."short.u16_pipe_mod_cfg_0" { + SKL_TKN_CFG_MOD_RES_ID "11" + SKL_TKN_CFG_MOD_FMT_ID "11" + } + + tuples."word.in_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "6" + } + + tuples."uuid.out_pin_0" { + SKL_TKN_UUID "178, 110, 101, 57, 113, 59, 73, 64, 141, 63, 249, 44, 213, 196, 60, 9" + } + + tuples."word.out_pin_1" { + SKL_TKN_U32_DIR_PIN_COUNT "17" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."uuid.out_pin_1" { + SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0" + } + + tuples."word.out_pin_2" { + SKL_TKN_U32_DIR_PIN_COUNT "33" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."uuid.out_pin_2" { + SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0" + } + + tuples."word.out_pin_3" { + SKL_TKN_U32_DIR_PIN_COUNT "49" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."uuid.out_pin_3" { + SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0" + } +} + +SectionData."mch_cap_in cpr 18" { + tuples "mch_cap_in cpr 18" +} + +SectionWidget."mch_cap_in cpr 18" { + index "0" + type "mixer" + no_pm "true" + event_type "3" + event_flags "9" + + data [ + "mch_cap_in cpr 18 num_desc" + "mch_cap_in cpr 18_size_desc" + "mch_cap_in cpr 18" + ] +} + +SectionVendorTuples."mch_cap_in mi num_desc" { + tokens "skl_tokens" + + tuples."byte.u8_num_blocks" { + SKL_TKN_U8_NUM_BLOCKS "1" + } +} + +SectionData."mch_cap_in mi num_desc" { + tuples "mch_cap_in mi num_desc" +} + +SectionVendorTuples."mch_cap_in mi_size_desc" { + tokens "skl_tokens" + + tuples."byte.u8_block_type" { + SKL_TKN_U8_BLOCK_TYPE "0" + } + + tuples."short.u16_size_desc" { + SKL_TKN_U16_BLOCK_SIZE "416" + } +} + +SectionData."mch_cap_in mi_size_desc" { + tuples "mch_cap_in mi_size_desc" +} + +SectionVendorTuples."mch_cap_in mi" { + tokens "skl_tokens" + + tuples."uuid" { + SKL_TKN_UUID "178, 110, 101, 57, 113, 59, 73, 64, 141, 63, 249, 44, 213, 196, 60, 9" + } + + tuples."byte.u8_data" { + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_DYN_IN_PIN "0" + SKL_TKN_U8_DYN_OUT_PIN "1" + SKL_TKN_U8_TIME_SLOT "0" + SKL_TKN_U8_CORE_ID "0" + SKL_TKN_U8_MODULE_TYPE "0" + SKL_TKN_U8_CONN_TYPE "0" + SKL_TKN_U8_HW_CONN_TYPE "2" + SKL_TKN_U8_DEV_TYPE "6" + } + + tuples."short.u16_data" { + SKL_TKN_U16_MOD_INST_ID "6" + } + + tuples."word.u32_data" { + SKL_TKN_U32_VBUS_ID "4294967295" + SKL_TKN_U32_PARAMS_FIXUP "0" + SKL_TKN_U32_CONVERTER "0" + SKL_TKN_U32_PIPE_ID "15" + SKL_TKN_U32_PIPE_CONN_TYPE "2" + SKL_TKN_U32_PIPE_PRIORITY "0" + SKL_TKN_U32_PMODE "0" + SKL_TKN_U32_D0I3_CAPS "0" + SKL_TKN_U32_PROC_DOMAIN "0" + SKL_TKN_U32_PIPE_DIRECTION "1" + SKL_TKN_U32_NUM_CONFIGS "1" + SKL_TKN_U32_DMA_BUF_SIZE "2" + } + + tuples."word._pipe_0" { + SKL_TKN_U32_PIPE_CONFIG_ID "0" + SKL_TKN_U32_PATH_MEM_PGS "2" + } + + tuples."word._pipe_u32_cfg_in_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_in_fmt_0" { + SKL_TKN_U8_CFG_BPS "16" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."word._pipe_u32_cfg_out_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_out_fmt_0" { + SKL_TKN_U8_CFG_BPS "16" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."short.u16_pipe_mod_cfg_0" { + SKL_TKN_CFG_MOD_RES_ID "0" + SKL_TKN_CFG_MOD_FMT_ID "0" + } + + tuples."word.in_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_PIN_MOD_ID "2" + SKL_TKN_U32_PIN_INST_ID "18" + } + + tuples."uuid.in_pin_0" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } + + tuples."word.out_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_1" { + SKL_TKN_U32_DIR_PIN_COUNT "17" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_2" { + SKL_TKN_U32_DIR_PIN_COUNT "33" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } +} + +SectionData."mch_cap_in mi" { + tuples "mch_cap_in mi" +} + +SectionWidget."mch_cap_in mi" { + index "0" + type "pga" + no_pm "true" + subseq "10" + event_type "4" + event_flags "9" + + data [ + "mch_cap_in mi num_desc" + "mch_cap_in mi_size_desc" + "mch_cap_in mi" + ] +} + +SectionWidget."dmic01_hifi" { + index "0" + type "aif_in" + no_pm "true" +} + +SectionVendorTuples."mch_cap_out mo num_desc" { + tokens "skl_tokens" + + tuples."byte.u8_num_blocks" { + SKL_TKN_U8_NUM_BLOCKS "1" + } +} + +SectionData."mch_cap_out mo num_desc" { + tuples "mch_cap_out mo num_desc" +} + +SectionVendorTuples."mch_cap_out mo_size_desc" { + tokens "skl_tokens" + + tuples."byte.u8_block_type" { + SKL_TKN_U8_BLOCK_TYPE "0" + } + + tuples."short.u16_size_desc" { + SKL_TKN_U16_BLOCK_SIZE "536" + } +} + +SectionData."mch_cap_out mo_size_desc" { + tuples "mch_cap_out mo_size_desc" +} + +SectionVendorTuples."mch_cap_out mo" { + tokens "skl_tokens" + + tuples."uuid" { + SKL_TKN_UUID "90, 80, 86, 60, 215, 36, 143, 65, 189, 220, 193, 245, 163, 172, 42, 224" + } + + tuples."byte.u8_data" { + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_DYN_IN_PIN "1" + SKL_TKN_U8_DYN_OUT_PIN "0" + SKL_TKN_U8_TIME_SLOT "0" + SKL_TKN_U8_CORE_ID "0" + SKL_TKN_U8_MODULE_TYPE "0" + SKL_TKN_U8_CONN_TYPE "0" + SKL_TKN_U8_HW_CONN_TYPE "2" + SKL_TKN_U8_DEV_TYPE "6" + } + + tuples."short.u16_data" { + SKL_TKN_U16_MOD_INST_ID "6" + } + + tuples."word.u32_data" { + SKL_TKN_U32_VBUS_ID "4294967295" + SKL_TKN_U32_PARAMS_FIXUP "0" + SKL_TKN_U32_CONVERTER "0" + SKL_TKN_U32_PIPE_ID "16" + SKL_TKN_U32_PIPE_CONN_TYPE "1" + SKL_TKN_U32_PIPE_PRIORITY "0" + SKL_TKN_U32_PMODE "0" + SKL_TKN_U32_D0I3_CAPS "0" + SKL_TKN_U32_PROC_DOMAIN "0" + SKL_TKN_U32_PIPE_DIRECTION "1" + SKL_TKN_U32_NUM_CONFIGS "1" + SKL_TKN_U32_DMA_BUF_SIZE "2" + } + + tuples."word._pipe_0" { + SKL_TKN_U32_PIPE_CONFIG_ID "0" + SKL_TKN_U32_PATH_MEM_PGS "2" + } + + tuples."word._pipe_u32_cfg_in_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_in_fmt_0" { + SKL_TKN_U8_CFG_BPS "16" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."word._pipe_u32_cfg_out_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_out_fmt_0" { + SKL_TKN_U8_CFG_BPS "16" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."short.u16_pipe_mod_cfg_0" { + SKL_TKN_CFG_MOD_RES_ID "0" + SKL_TKN_CFG_MOD_FMT_ID "0" + } + + tuples."word.in_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_1" { + SKL_TKN_U32_DIR_PIN_COUNT "16" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_2" { + SKL_TKN_U32_DIR_PIN_COUNT "32" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_3" { + SKL_TKN_U32_DIR_PIN_COUNT "48" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_4" { + SKL_TKN_U32_DIR_PIN_COUNT "64" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_5" { + SKL_TKN_U32_DIR_PIN_COUNT "80" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_6" { + SKL_TKN_U32_DIR_PIN_COUNT "96" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.in_pin_7" { + SKL_TKN_U32_DIR_PIN_COUNT "112" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_PIN_MOD_ID "2" + SKL_TKN_U32_PIN_INST_ID "19" + } + + tuples."uuid.out_pin_0" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } +} + +SectionData."mch_cap_out mo" { + tuples "mch_cap_out mo" +} + +SectionWidget."mch_cap_out mo" { + index "0" + type "mixer" + no_pm "true" + event_type "3" + event_flags "9" + + mixer [ + "mch_cap_in mi Switch" + ] + + data [ + "mch_cap_out mo num_desc" + "mch_cap_out mo_size_desc" + "mch_cap_out mo" + ] +} + +SectionVendorTuples."mch_cap_out cpr 19 num_desc" { + tokens "skl_tokens" + + tuples."byte.u8_num_blocks" { + SKL_TKN_U8_NUM_BLOCKS "1" + } +} + +SectionData."mch_cap_out cpr 19 num_desc" { + tuples "mch_cap_out cpr 19 num_desc" +} + +SectionVendorTuples."mch_cap_out cpr 19_size_desc" { + tokens "skl_tokens" + + tuples."byte.u8_block_type" { + SKL_TKN_U8_BLOCK_TYPE "0" + } + + tuples."short.u16_size_desc" { + SKL_TKN_U16_BLOCK_SIZE "440" + } +} + +SectionData."mch_cap_out cpr 19_size_desc" { + tuples "mch_cap_out cpr 19_size_desc" +} + +SectionVendorTuples."mch_cap_out cpr 19" { + tokens "skl_tokens" + + tuples."uuid" { + SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218" + } + + tuples."byte.u8_data" { + SKL_TKN_U8_IN_PIN_TYPE "0" + SKL_TKN_U8_OUT_PIN_TYPE "0" + SKL_TKN_U8_DYN_IN_PIN "0" + SKL_TKN_U8_DYN_OUT_PIN "1" + SKL_TKN_U8_TIME_SLOT "0" + SKL_TKN_U8_CORE_ID "0" + SKL_TKN_U8_MODULE_TYPE "1" + SKL_TKN_U8_CONN_TYPE "0" + SKL_TKN_U8_HW_CONN_TYPE "2" + SKL_TKN_U8_DEV_TYPE "5" + } + + tuples."short.u16_data" { + SKL_TKN_U16_MOD_INST_ID "19" + } + + tuples."word.u32_data" { + SKL_TKN_U32_VBUS_ID "4294967295" + SKL_TKN_U32_PARAMS_FIXUP "0" + SKL_TKN_U32_CONVERTER "0" + SKL_TKN_U32_PIPE_ID "16" + SKL_TKN_U32_PIPE_CONN_TYPE "1" + SKL_TKN_U32_PIPE_PRIORITY "0" + SKL_TKN_U32_PMODE "0" + SKL_TKN_U32_D0I3_CAPS "0" + SKL_TKN_U32_PROC_DOMAIN "0" + SKL_TKN_U32_PIPE_DIRECTION "1" + SKL_TKN_U32_NUM_CONFIGS "1" + SKL_TKN_U32_DMA_BUF_SIZE "2" + } + + tuples."word._pipe_0" { + SKL_TKN_U32_PIPE_CONFIG_ID "0" + SKL_TKN_U32_PATH_MEM_PGS "2" + } + + tuples."word._pipe_u32_cfg_in_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_in_fmt_0" { + SKL_TKN_U8_CFG_BPS "16" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."word._pipe_u32_cfg_out_fmt_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_CFG_FREQ "48000" + } + + tuples."word._pipe_u8_cfg_out_fmt_0" { + SKL_TKN_U8_CFG_BPS "16" + SKL_TKN_U8_CFG_CHAN "2" + } + + tuples."short.u16_pipe_mod_cfg_0" { + SKL_TKN_CFG_MOD_RES_ID "12" + SKL_TKN_CFG_MOD_FMT_ID "12" + } + + tuples."word.in_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "0" + SKL_TKN_U32_PIN_MOD_ID "1" + SKL_TKN_U32_PIN_INST_ID "6" + } + + tuples."uuid.in_pin_0" { + SKL_TKN_UUID "90, 80, 86, 60, 215, 36, 143, 65, 189, 220, 193, 245, 163, 172, 42, 224" + } + + tuples."word.out_pin_0" { + SKL_TKN_U32_DIR_PIN_COUNT "1" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_1" { + SKL_TKN_U32_DIR_PIN_COUNT "17" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_2" { + SKL_TKN_U32_DIR_PIN_COUNT "33" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } + + tuples."word.out_pin_3" { + SKL_TKN_U32_DIR_PIN_COUNT "49" + SKL_TKN_U32_PIN_MOD_ID "0" + SKL_TKN_U32_PIN_INST_ID "0" + } +} + +SectionData."mch_cap_out cpr 19" { + tuples "mch_cap_out cpr 19" +} + +SectionWidget."mch_cap_out cpr 19" { + index "0" + type "pga" + no_pm "true" + subseq "10" + event_type "4" + event_flags "9" + + data [ + "mch_cap_out cpr 19 num_desc" + "mch_cap_out cpr 19_size_desc" + "mch_cap_out cpr 19" + ] +} + +SectionControlMixer."media0_in mi Switch" { + max "1" + invert "false" + index "0" + + channel."fl" { + reg "-1" + shift "0" + } + + channel."fr" { + reg "-1" + shift "0" + } + + ops."ctl" { + get "64" + put "64" + info "1" + } +} + +SectionControlMixer."media1_in mi Switch" { + max "1" + invert "false" + index "0" + + channel."fl" { + reg "-1" + shift "0" + } + + channel."fr" { + reg "-1" + shift "0" + } + + ops."ctl" { + get "64" + put "64" + info "1" + } +} + +SectionControlMixer."media2_in mi Switch" { + max "1" + invert "false" + index "0" + + channel."fl" { + reg "-1" + shift "0" + } + + channel."fr" { + reg "-1" + shift "0" + } + + ops."ctl" { + get "64" + put "64" + info "1" + } +} + +SectionControlMixer."codec0_in mi Switch" { + max "1" + invert "false" + index "0" + + channel."fl" { + reg "-1" + shift "0" + } + + channel."fr" { + reg "-1" + shift "0" + } + + ops."ctl" { + get "64" + put "64" + info "1" + } +} + +SectionControlMixer."codec1_in mi Switch" { + max "1" + invert "false" + index "0" + + channel."fl" { + reg "-1" + shift "0" + } + + channel."fr" { + reg "-1" + shift "0" + } + + ops."ctl" { + get "64" + put "64" + info "1" + } +} + +SectionControlMixer."codec2_in mi Switch" { + max "1" + invert "false" + index "0" + + channel."fl" { + reg "-1" + shift "0" + } + + channel."fr" { + reg "-1" + shift "0" + } + + ops."ctl" { + get "64" + put "64" + info "1" + } +} + +SectionControlMixer."mch_cap_in mi Switch" { + max "1" + invert "false" + index "0" + + channel."fl" { + reg "-1" + shift "0" + } + + channel."fr" { + reg "-1" + shift "0" + } + + ops."ctl" { + get "64" + put "64" + info "1" + } +} + +SectionGraph."Pipeline 1 Graph" { + index "0" + + lines [ + "media0_in cpr 0, , hda-dsp-analog-playback" + "media0_in updwmix 0, , media0_in cpr 0" + "media0_in srcintc 0, , media0_in updwmix 0" + "media0_in mi, , media0_in srcintc 0" + "codec0_out cpr 1, , codec0_out mo" + "codec0_out, , codec0_out cpr 1" + "media1_in cpr 2, , hda-dsp-digital-playback" + "media1_in mi, , media1_in cpr 2" + "codec1_out cpr 3, , codec1_out mo" + "codec1_out, , codec1_out cpr 3" + "media2_in cpr 4, , hda-dsp-alt-analog-playback" + "media2_in mi, , media2_in cpr 4" + "codec2_out cpr 5, , codec2_out mo" + "codec2_out, , codec2_out cpr 5" + "codec0_in cpr 6, , codec0_in" + "codec0_in mi, , codec0_in cpr 6" + "media0_out cpr 7, , media0_out mo" + "hda-dsp-audio-analog-capture, , media0_out cpr 7" + "codec1_in cpr 8, , codec1_in" + "codec1_in mi, , codec1_in cpr 8" + "media1_out cpr 9, , media1_out mo" + "hda-dsp-audio-digital-capture, , media1_out cpr 9" + "codec2_in cpr 10, , codec2_in" + "codec2_in mi, , codec2_in cpr 10" + "media2_out cpr 11, , media2_out mo" + "hda-dsp-audio-alt-analog-capture, , media2_out cpr 11" + "hdmi1_out cpr 12, , HDMI1 Playback" + "hdmi1_out cpr 13, , hdmi1_out cpr 12" + "iDisp1_out, , hdmi1_out cpr 13" + "hdmi2_out cpr 14, , HDMI2 Playback" + "hdmi2_out cpr 15, , hdmi2_out cpr 14" + "iDisp2_out, , hdmi2_out cpr 15" + "hdmi3_out cpr 16, , HDMI3 Playback" + "hdmi3_out cpr 17, , hdmi3_out cpr 16" + "iDisp3_out, , hdmi3_out cpr 17" + "mch_cap_in cpr 18, , dmic01_hifi" + "mch_cap_in mi, , mch_cap_in cpr 18" + "mch_cap_out cpr 19, , mch_cap_out mo" + "DMIC-PT-Capture, , mch_cap_out cpr 19" + "codec0_out mo, media0_in mi Switch, media0_in mi" + "codec1_out mo, media1_in mi Switch, media1_in mi" + "codec2_out mo, media2_in mi Switch, media2_in mi" + "media0_out mo, codec0_in mi Switch, codec0_in mi" + "media1_out mo, codec1_in mi Switch, codec1_in mi" + "media2_out mo, codec2_in mi Switch, codec2_in mi" + "mch_cap_out mo, mch_cap_in mi Switch, mch_cap_in mi" + ] +} + +SectionPCMCapabilities."hda-dsp-analog-playback" { + formats "S16_LE" + rates "48000" + channels_min "2" + channels_max "2" + sig_bits "16" +} + +SectionPCMCapabilities."hda-dsp-audio-analog-capture" { + formats "S16_LE" + rates "48000" + channels_min "2" + channels_max "2" + sig_bits "16" +} + +SectionPCM."Analog HDA DSP" { + index "0" + id "0" + + dai."hda-dsp-analog-dai" { + id "0" + } + + pcm."playback" { + capabilities "hda-dsp-analog-playback" + } + + pcm."capture" { + capabilities "hda-dsp-audio-analog-capture" + } +} + +SectionPCMCapabilities."hda-dsp-digital-playback" { + formats "S16_LE" + rates "48000" + channels_min "2" + channels_max "2" + sig_bits "16" +} + +SectionPCMCapabilities."hda-dsp-audio-digital-capture" { + formats "S24_LE" + rates "48000" + channels_min "2" + channels_max "2" + sig_bits "24" +} + +SectionPCM."Digital HDA DSP" { + index "0" + id "0" + + dai."hda-dsp-digital-dai" { + id "1" + } + + pcm."playback" { + capabilities "hda-dsp-digital-playback" + } + + pcm."capture" { + capabilities "hda-dsp-audio-digital-capture" + } +} + +SectionPCMCapabilities."hda-dsp-alt-analog-playback" { + formats "S16_LE" + rates "48000" + channels_min "2" + channels_max "2" + sig_bits "16" +} + +SectionPCMCapabilities."hda-dsp-audio-alt-analog-capture" { + formats "S24_LE" + rates "48000" + channels_min "2" + channels_max "2" + sig_bits "24" +} + +SectionPCM."Alt Analog HDA DSP" { + index "0" + id "0" + + dai."hda-dsp-alt-analog-dai" { + id "2" + } + + pcm."playback" { + capabilities "hda-dsp-alt-analog-playback" + } + + pcm."capture" { + capabilities "hda-dsp-audio-alt-analog-capture" + } +} + +SectionPCMCapabilities."HDMI1 Playback" { + formats "S16_LE" + rates "48000" + channels_min "2" + channels_max "2" + sig_bits "16" +} + +SectionPCM."HDA DSP HDMI1" { + index "0" + id "255" + + dai."hdmi1" { + id "3" + } + + pcm."playback" { + capabilities "HDMI1 Playback" + } +} + +SectionPCMCapabilities."HDMI2 Playback" { + formats "S16_LE" + rates "48000" + channels_min "2" + channels_max "2" + sig_bits "16" +} + +SectionPCM."HDA DSP HDMI2" { + index "0" + id "255" + + dai."hdmi2" { + id "4" + } + + pcm."playback" { + capabilities "HDMI2 Playback" + } +} + +SectionPCMCapabilities."HDMI3 Playback" { + formats "S16_LE" + rates "48000" + channels_min "2" + channels_max "2" + sig_bits "16" +} + +SectionPCM."HDA DSP HDMI3" { + index "0" + id "255" + + dai."hdmi3" { + id "5" + } + + pcm."playback" { + capabilities "HDMI3 Playback" + } +} + +SectionPCMCapabilities."DMIC-PT-Capture" { + formats "S16_LE" + rates "48000" + channels_min "2" + channels_max "2" + sig_bits "16" +} + +SectionPCM."DMIC HDA DSP" { + index "0" + id "0" + + dai."hda-dsp-dmic-dai" { + id "6" + } + + pcm."capture" { + capabilities "DMIC-PT-Capture" + } +} + +SectionVendorTuples."manifest_data num_desc" { + tokens "skl_tokens" + + tuples."byte.u8_num_blocks" { + SKL_TKN_U8_NUM_BLOCKS "1" + } +} + +SectionData."manifest_data num_desc" { + tuples "manifest_data num_desc" +} + +SectionManifest."manifest_data" { + + data [ + "manifest_data num_desc" + "mod_type_data_size_desc" + "mod_type_data" + ] +} -- 2.17.1

1 0