November 2020 - Alsa-devel - mailman.alsa-project.org

[PATCH] ASOC: Intel: kbl_rt5663_rt5514_max98927: Do not try to disable disabled clock
by Guenter Roeck 18 Nov '20

18 Nov '20

In kabylake_set_bias_level(), enabling mclk may fail if the clock has already been enabled by the firmware. Attempts to disable that clock later will fail with a warning backtrace. mclk already disabled WARNING: CPU: 2 PID: 108 at drivers/clk/clk.c:952 clk_core_disable+0x1b6/0x1cf ... Call Trace: clk_disable+0x2d/0x3a kabylake_set_bias_level+0x72/0xfd [snd_soc_kbl_rt5663_rt5514_max98927] snd_soc_card_set_bias_level+0x2b/0x6f snd_soc_dapm_set_bias_level+0xe1/0x209 dapm_pre_sequence_async+0x63/0x96 async_run_entry_fn+0x3d/0xd1 process_one_work+0x2a9/0x526 ... Only disable the clock if it has been enabled. Fixes: 15747a802075 ("ASoC: eve: implement set_bias_level function for rt5514") Cc: Brent Lu <brent.lu(a)intel.com> Cc: Curtis Malainey <cujomalainey(a)chromium.org> Signed-off-by: Guenter Roeck <linux(a)roeck-us.net> --- sound/soc/intel/boards/kbl_rt5663_rt5514_max98927.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sound/soc/intel/boards/kbl_rt5663_rt5514_max98927.c b/sound/soc/intel/boards/kbl_rt5663_rt5514_max98927.c index 922cd0176e1f..f95546c184aa 100644 --- a/sound/soc/intel/boards/kbl_rt5663_rt5514_max98927.c +++ b/sound/soc/intel/boards/kbl_rt5663_rt5514_max98927.c @@ -700,6 +700,8 @@ static int kabylake_set_bias_level(struct snd_soc_card *card, switch (level) { case SND_SOC_BIAS_PREPARE: if (dapm->bias_level == SND_SOC_BIAS_ON) { + if (!__clk_is_enabled(priv->mclk)) + return 0; dev_dbg(card->dev, "Disable mclk"); clk_disable_unprepare(priv->mclk); } else { -- 2.17.1

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[PATCH -next] ASoC: samsung: fix platform_no_drv_owner.cocci warnings
by Zou Wei 18 Nov '20

18 Nov '20

./sound/soc/samsung/midas_wm1811.c:534:3-8: No need to set .owner here. The core will do it. Remove .owner field if calls are used which set it automatically Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci Signed-off-by: Zou Wei <zou_wei(a)huawei.com> --- sound/soc/samsung/midas_wm1811.c | 1 - 1 file changed, 1 deletion(-) diff --git a/sound/soc/samsung/midas_wm1811.c b/sound/soc/samsung/midas_wm1811.c index d03340c..1f9a553 100644 --- a/sound/soc/samsung/midas_wm1811.c +++ b/sound/soc/samsung/midas_wm1811.c @@ -531,7 +531,6 @@ static struct platform_driver midas_driver = { .driver = { .name = "midas-audio", .of_match_table = midas_of_match, - .owner = THIS_MODULE, .pm = &snd_soc_pm_ops, }, .probe = midas_probe, -- 2.6.2

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[PATCH] dt-bindings: mediatek: mt8192: revert "add audio afe document"
by Jiaxin Yu 18 Nov '20

18 Nov '20

This reverts commit 1afc60e00de3abbb6c559da409c5c1bb8c1d98ec. Signed-off-by: Jiaxin Yu <jiaxin.yu(a)mediatek.com> --- https://mailman.alsa-project.org/pipermail/alsa-devel/2020-November/176873.… These dependency are continuing to upstream, I will revert this patch first. After the dependencies are merged, I will send 'mt8192-afe-pcm.yaml' again. .../bindings/sound/mt8192-afe-pcm.yaml | 100 ------------------ 1 file changed, 100 deletions(-) delete mode 100644 Documentation/devicetree/bindings/sound/mt8192-afe-pcm.yaml diff --git a/Documentation/devicetree/bindings/sound/mt8192-afe-pcm.yaml b/Documentation/devicetree/bindings/sound/mt8192-afe-pcm.yaml deleted file mode 100644 index 0170c93802d29..0000000000000 --- a/Documentation/devicetree/bindings/sound/mt8192-afe-pcm.yaml +++ /dev/null @@ -1,100 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/sound/mt8192-afe-pcm.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Mediatek AFE PCM controller for mt8192 - -maintainers: - - Jiaxin Yu <jiaxin.yu(a)mediatek.com> - - Shane Chien <shane.chien(a)mediatek.com> - -properties: - compatible: - const: mediatek,mt8192-audio - - interrupts: - maxItems: 1 - - resets: - maxItems: 1 - - reset-names: - const: audiosys - - mediatek,apmixedsys: - $ref: "/schemas/types.yaml#/definitions/phandle" - description: The phandle of the mediatek apmixedsys controller - - mediatek,infracfg: - $ref: "/schemas/types.yaml#/definitions/phandle" - description: The phandle of the mediatek infracfg controller - - mediatek,topckgen: - $ref: "/schemas/types.yaml#/definitions/phandle" - description: The phandle of the mediatek topckgen controller - - power-domains: - maxItems: 1 - - clocks: - items: - - description: AFE clock - - description: ADDA DAC clock - - description: ADDA DAC pre-distortion clock - - description: audio infra sys clock - - description: audio infra 26M clock - - clock-names: - items: - - const: aud_afe_clk - - const: aud_dac_clk - - const: aud_dac_predis_clk - - const: aud_infra_clk - - const: aud_infra_26m_clk - -required: - - compatible - - interrupts - - resets - - reset-names - - mediatek,apmixedsys - - mediatek,infracfg - - mediatek,topckgen - - power-domains - - clocks - - clock-names - -additionalProperties: false - -examples: - - | - #include <dt-bindings/clock/mt8192-clk.h> - #include <dt-bindings/interrupt-controller/arm-gic.h> - #include <dt-bindings/interrupt-controller/irq.h> - #include <dt-bindings/power/mt8192-power.h> - #include <dt-bindings/reset-controller/mt8192-resets.h> - - afe: mt8192-afe-pcm { - compatible = "mediatek,mt8192-audio"; - interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>; - resets = <&watchdog MT8192_TOPRGU_AUDIO_SW_RST>; - reset-names = "audiosys"; - mediatek,apmixedsys = <&apmixedsys>; - mediatek,infracfg = <&infracfg>; - mediatek,topckgen = <&topckgen>; - power-domains = <&scpsys MT8192_POWER_DOMAIN_AUDIO>; - clocks = <&audsys CLK_AUD_AFE>, - <&audsys CLK_AUD_DAC>, - <&audsys CLK_AUD_DAC_PREDIS>, - <&infracfg CLK_INFRA_AUDIO>, - <&infracfg CLK_INFRA_AUDIO_26M_B>; - clock-names = "aud_afe_clk", - "aud_dac_clk", - "aud_dac_predis_clk", - "aud_infra_clk", - "aud_infra_26m_clk"; - }; - -... -- 2.18.0

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[PATCH] ASoC: mmp-sspa: clear transmit phase bit for non-stereo formats
by Kyle Russell 18 Nov '20

18 Nov '20

The transmit phase register value is never cleared during hw params. So once hw params sets this bit to handle a two channel format, it remains configured for dual-phase, which is not desirable for mono playback. Signed-off-by: Kyle Russell <bkylerussell(a)gmail.com> --- sound/soc/pxa/mmp-sspa.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/soc/pxa/mmp-sspa.c b/sound/soc/pxa/mmp-sspa.c index 4255851c71c1..52d4d8ace1c3 100644 --- a/sound/soc/pxa/mmp-sspa.c +++ b/sound/soc/pxa/mmp-sspa.c @@ -239,6 +239,7 @@ static int mmp_sspa_hw_params(struct snd_pcm_substream *substream, return -EINVAL; } + sspa_ctrl &= ~SSPA_CTL_XPH; if (dev->of_node || params_channels(params) == 2) sspa_ctrl |= SSPA_CTL_XPH; -- 2.25.1

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[PATCH v2] ARM: sunxi: do not select COMMON_CLK to fix builds
by Krzysztof Kozlowski 18 Nov '20

18 Nov '20

COMMON_CLK is a user-selectable option with its own dependencies. The most important dependency is !HAVE_LEGACY_CLK. User-selectable drivers should not select COMMON_CLK because they will create a dependency cycle and build failures. For example on MIPS a configuration with COMMON_CLK (selected by SND_SUN8I_CODEC) and HAVE_LEGACY_CLK (selected by SOC_RT305X) is possible: WARNING: unmet direct dependencies detected for COMMON_CLK Depends on [n]: !HAVE_LEGACY_CLK [=y] Selected by [y]: - SND_SUN8I_CODEC [=y] && SOUND [=y] && !UML && SND [=y] && SND_SOC [=y] && (ARCH_SUNXI || COMPILE_TEST [=y]) && OF [=y] && (MACH_SUN8I || ARM64 && ARCH_SUNXI || COMPILE_TEST [=y]) /usr/bin/mips-linux-gnu-ld: drivers/clk/clk.o: in function `clk_set_rate': (.text+0xaeb4): multiple definition of `clk_set_rate'; arch/mips/ralink/clk.o:(.text+0x88): first defined here Signed-off-by: Krzysztof Kozlowski <krzk(a)kernel.org> Reviewed-by: Samuel Holland <samuel(a)sholland.org> --- Changes since v1: 1. Do not select COMMON_CLK in arch/arm/mach-sunxi/Kconfig, 2. Add Samuel's review. --- sound/soc/sunxi/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/sunxi/Kconfig b/sound/soc/sunxi/Kconfig index 69b9d8515335..ddcaaa98d3cb 100644 --- a/sound/soc/sunxi/Kconfig +++ b/sound/soc/sunxi/Kconfig @@ -14,7 +14,7 @@ config SND_SUN8I_CODEC tristate "Allwinner SUN8I audio codec" depends on OF depends on MACH_SUN8I || (ARM64 && ARCH_SUNXI) || COMPILE_TEST - select COMMON_CLK + depends on COMMON_CLK select REGMAP_MMIO help This option enables the digital part of the internal audio codec for -- 2.25.1

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[PATCH 0/2] slimbus: qcom-ngd: Add SSR and PDR support
by Srinivas Kandagatla 18 Nov '20

18 Nov '20

Qualcomm DSPs support SSR(Subsystem Restart) and PDR(Protection Domain Restart) which usually restart the associated services! Current code does only relies on QMI channel notifications, but there could be race conditions between QMI notifcations and actual PDR/SSR events. This patchset adds support to these two events to address those race conditions. Tested it on Dragon Board DB845c. Srinivas Kandagatla (2): slimbus: qcom-ngd-ctrl: add Sub System Restart support slimbus: qcom-ngd-ctrl: add Protection Domain Restart Support drivers/slimbus/Kconfig | 2 + drivers/slimbus/qcom-ngd-ctrl.c | 121 ++++++++++++++++++++++++++++++-- 2 files changed, 119 insertions(+), 4 deletions(-) -- 2.21.0

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[bug report] ALSA: mixart: Use nonatomic PCM ops
by Dan Carpenter 18 Nov '20

18 Nov '20

[ This bug predates git but my email script just uses `git blame -w`. -dan ] Hello Takashi Iwai, The patch 8d3a8b5cb57d: "ALSA: mixart: Use nonatomic PCM ops" from Sep 10, 2014, leads to the following static checker warning: sound/pci/mixart/mixart_core.c:73 get_msg() warn: called with lock held. '&mgr->msg_lock' sound/pci/mixart/mixart_core.c 63 static int get_msg(struct mixart_mgr *mgr, struct mixart_msg *resp, 64 u32 msg_frame_address ) 65 { 66 u32 headptr; 67 u32 size; 68 int err; 69 #ifndef __BIG_ENDIAN 70 unsigned int i; 71 #endif 72 73 mutex_lock(&mgr->msg_lock); ^^^^^^^^^^^^^^^^^^^^^^^^^^ Smatch says that get_msg() is called with this lock already held. 74 err = 0; 75 76 /* copy message descriptor from miXart to driver */ 77 size = readl_be(MIXART_MEM(mgr, msg_frame_address)); /* size of descriptor + response */ 78 resp->message_id = readl_be(MIXART_MEM(mgr, msg_frame_address + 4)); /* dwMessageID */ [ snip ] 419 irqreturn_t snd_mixart_threaded_irq(int irq, void *dev_id) 420 { 421 struct mixart_mgr *mgr = dev_id; 422 int err; 423 struct mixart_msg resp; 424 u32 msg; 425 426 mutex_lock(&mgr->lock); ^^^^^^^^^^^^^^^^^^^^^^ We are holding the lock 427 /* process interrupt */ 428 while (retrieve_msg_frame(mgr, &msg)) { 429 430 switch (msg & MSG_TYPE_MASK) { 431 case MSG_TYPE_COMMAND: 432 resp.message_id = 0; 433 resp.data = mixart_msg_data; 434 resp.size = sizeof(mixart_msg_data); 435 err = get_msg(mgr, &resp, msg & ~MSG_TYPE_MASK); ^^^^^^^^^^^ When get_msg() is called on this path. 436 if( err < 0 ) { 437 dev_err(&mgr->pci->dev, 438 "interrupt: error(%d) reading mf %x\n", 439 err, msg); 440 break; 441 } 442 443 if(resp.message_id == MSG_SERVICES_TIMER_NOTIFY) { regards, dan carpenter

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snd_pcm_hw_params_set_period_size_near() bug???
by GitHub issues - edited 18 Nov '20

18 Nov '20

alsa-project/alsa-lib issue #99 was edited from YangangCao: it's my fault, no big deal Issue URL : https://github.com/alsa-project/alsa-lib/issues/99 Repository URL: https://github.com/alsa-project/alsa-lib

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[PATCH 0/3] Convert Tegra HDA doc to json-schema
by Sameer Pujar 18 Nov '20

18 Nov '20

Fix Tegra194 DT and convert Tegra HDA doc to YAML format. Ran binding validation checks to ensure there are no warnings/errors for HDA. Sameer Pujar (3): arm64: tegra: Fix Tegra194 HDA {clock,reset}-names ordering dt-bindings: tegra: Convert HDA doc to json-schema dt-bindings: tegra: Add missing HDA properties .../bindings/sound/nvidia,tegra30-hda.txt | 35 ------- .../bindings/sound/nvidia,tegra30-hda.yaml | 112 +++++++++++++++++++++ arch/arm64/boot/dts/nvidia/tegra194.dtsi | 12 +-- 3 files changed, 118 insertions(+), 41 deletions(-) delete mode 100644 Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.txt create mode 100644 Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.yaml -- 2.7.4

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[PATCH] ALSA: usb-audio: disable 96khz support for HUAWEI USB-C HEADSET
by Macpaul Lin 18 Nov '20

18 Nov '20

The HUAWEI USB-C headset (VID:0x12d1, PID:0x3a07) reported it supports 96khz. However there will be some random issue under 96khz. Not sure if there is any alternate setting could be applied. Hence 48khz is suggested to be applied at this moment. Signed-off-by: Macpaul Lin <macpaul.lin(a)mediatek.com> Signed-off-by: Eddie Hung <eddie.hung(a)mediatek.com> --- sound/usb/format.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/sound/usb/format.c b/sound/usb/format.c index 1b28d01..6f6e79b 100644 --- a/sound/usb/format.c +++ b/sound/usb/format.c @@ -217,6 +217,11 @@ static int parse_audio_format_rates_v1(struct snd_usb_audio *chip, struct audiof (chip->usb_id == USB_ID(0x041e, 0x4064) || chip->usb_id == USB_ID(0x041e, 0x4068))) rate = 8000; + /* Huawei headset can't support 96kHz fully */ + if (rate == 96000 && + chip->usb_id == USB_ID(0x12d1, 0x3a07) && + le16_to_cpu(udev->descriptor.bcdDevice) == 0x49) + continue; fp->rate_table[fp->nr_rates] = rate; if (!fp->rate_min || rate < fp->rate_min) -- 1.7.9.5

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