September 2019 - Alsa-devel - mailman.alsa-project.org

[alsa-devel] Jack detection in Lenovo OneLink+ and other docks
by Benjamin Berg 15 Sep '19

15 Sep '19

Hi, I have a Lenovo OneLink+ and TB3 docks here. The USB audio adapter on these docks work fine. However, Jack detection is not functional unfortunately which is somewhat annoying. There are HID devices available on the docking stations which seem to report the jack sensing information. Assuming we can decode this information correctly, does anyone have an idea how this can be hooked up so that the information will be available on the audio device itself? Benjamin The OneLink+ dock exposes the following interfaces: |__ Port 1: Dev 90, If 0, Class=Hub, Driver=hub/4p, 480M |__ Port 3: Dev 92, If 1, Class=CDC Data, Driver=cdc_ether, 480M |__ Port 3: Dev 92, If 0, Class=Communications, Driver=cdc_ether, 480M |__ Port 4: Dev 94, If 2, Class=Audio, Driver=snd-usb-audio, 12M |__ Port 4: Dev 94, If 0, Class=Audio, Driver=snd-usb-audio, 12M |__ Port 4: Dev 94, If 3, Class=Human Interface Device, Driver=usbhid, 12M |__ Port 4: Dev 94, If 1, Class=Audio, Driver=snd-usb-audio, 12M Similar on the TB 3 Dock from Lenovo: /: Bus 05.Port 1: Dev 1, Class=root_hub, Driver=xhci_hcd/4p, 480M |__ Port 1: Dev 2, If 0, Class=Audio, Driver=snd-usb-audio, 12M |__ Port 1: Dev 2, If 1, Class=Audio, Driver=snd-usb-audio, 12M |__ Port 1: Dev 2, If 2, Class=Audio, Driver=snd-usb-audio, 12M |__ Port 1: Dev 2, If 3, Class=Human Interface Device, Driver=usbhid, 12M |__ Port 4: Dev 3, If 0, Class=Human Interface Device, Driver=usbhid, 12M On each of these devices, plugging/unplugging will fire various HID events, seemingly with some sensing information. On the OneLink Plus: D: 0 R: 69 05 0c 09 01 a1 01 85 01 15 00 25 01 09 e9 09 ea 75 01 95 02 81 42 09 e2 95 01 81 06 06 01 ff 09 01 95 09 81 06 05 0c 09 cd 09 b7 09 b5 09 b6 95 04 81 06 06 07 ff 09 01 75 08 95 0d 81 06 09 00 95 0f 91 02 c0 N: C-Media Electronics Inc. ThinkPad OneLink Plus Dock Audio P: usb-0000:00:14.0-4.1.4/input3 I: 3 17ef 3055 # Plug Headphone D: 0 E: 0.000000 16 01 00 06 00 00 20 83 ab 08 00 08 c0 10 00 00 00 E: 3.103810 16 01 00 0a 00 00 20 83 ab 08 00 03 80 10 00 00 00 # Unplug headphone E: 9.951613 16 01 00 08 00 00 20 83 ab 08 00 03 80 00 00 00 00 E: 10.016073 16 01 00 04 00 00 20 83 ab 08 00 03 80 10 00 00 00 # Plug Microphone E: 17.824186 16 01 00 06 00 00 20 83 ab 08 00 03 80 00 00 00 00 E: 20.928234 16 01 00 0a 00 00 20 83 ab 08 00 03 80 10 00 00 00 # Unplug Microphone E: 26.734048 16 01 00 08 00 00 20 83 ab 08 00 08 c0 10 00 00 00 E: 26.784007 16 01 00 04 00 00 20 83 ab 08 00 03 80 10 00 00 00 # Plug headset E: 44.160216 16 01 00 06 00 00 20 83 ab 08 00 03 80 00 00 00 00 # Unplug headset E: 56.687367 16 01 00 04 00 00 20 83 ab 08 00 08 c0 10 00 00 00 On the TB 3 dock: D: 0 R: 120 05 0c 09 01 a1 01 85 01 15 00 25 01 09 e9 09 ea 75 01 95 02 81 02 09 e2 95 01 81 06 09 00 95 02 81 03 09 36 a1 02 05 09 19 01 29 02 75 02 95 01 15 01 25 02 81 40 c0 05 0c 09 00 15 00 25 01 75 01 95 01 81 03 85 02 05 0c 09 00 95 10 81 02 85 03 09 00 91 02 85 04 09 00 75 08 95 26 91 02 85 05 09 00 95 22 81 02 85 06 09 00 95 24 91 02 85 07 09 00 95 20 81 02 c0 N: Lenovo ThinkPad Thunderbolt 3 Dock USB Audio P: usb-0000:0a:00.0-1/input3 I: 3 17ef 306a # Plug in headphone D: 0 E: 0.000000 3 02 00 80 # Unplug headphone E: 16.480011 3 02 00 00 # Plug in microphone E: 34.224331 3 02 00 80 # Unplug microphone E: 46.960128 3 02 00 00 # Plug in headset E: 62.592182 3 02 00 80 E: 63.120449 3 02 00 c0 # Unplug headset E: 72.608250 3 02 00 80 E: 72.624253 3 02 00 00

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[alsa-devel] Applied "ASoC: sdm845: remove unneeded semicolon" to the asoc tree
by Mark Brown 15 Sep '19

15 Sep '19

The patch ASoC: sdm845: remove unneeded semicolon has been applied to the asoc tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-5.4 All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From fca11622d600228bec405456f41590155b3a3eca Mon Sep 17 00:00:00 2001 From: Saiyam Doshi <saiyamdoshi.in(a)gmail.com> Date: Sat, 14 Sep 2019 08:41:33 +0530 Subject: [PATCH] ASoC: sdm845: remove unneeded semicolon Remove excess semicolon after closing parenthesis. Signed-off-by: Saiyam Doshi <saiyamdoshi.in(a)gmail.com> Link: https://lore.kernel.org/r/20190914031133.GA28447@SD Signed-off-by: Mark Brown <broonie(a)kernel.org> --- sound/soc/qcom/sdm845.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/qcom/sdm845.c b/sound/soc/qcom/sdm845.c index 882f52ed8231..28f3cef696e6 100644 --- a/sound/soc/qcom/sdm845.c +++ b/sound/soc/qcom/sdm845.c @@ -319,7 +319,7 @@ static void sdm845_snd_shutdown(struct snd_pcm_substream *substream) snd_soc_dai_set_sysclk(cpu_dai, Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT, 0, SNDRV_PCM_STREAM_PLAYBACK); - }; + } break; case SECONDARY_MI2S_TX: -- 2.20.1

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[alsa-devel] [PATCH] ASoC: Intel: kbl_rt5663_rt5514_max98927: Add dmic format constraint
by Yu-Hsuan Hsu 14 Sep '19

14 Sep '19

24 bits recording from DMIC is not supported for KBL platform because the TDM slot between PCH and codec is 16 bits only. We should add a constraint to remove that unsupported format. Signed-off-by: Yu-Hsuan Hsu <yuhsuan(a)chromium.org> --- sound/soc/intel/boards/kbl_rt5663_rt5514_max98927.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/sound/soc/intel/boards/kbl_rt5663_rt5514_max98927.c b/sound/soc/intel/boards/kbl_rt5663_rt5514_max98927.c index 74dda8784f1a01..67b276a65a8d2d 100644 --- a/sound/soc/intel/boards/kbl_rt5663_rt5514_max98927.c +++ b/sound/soc/intel/boards/kbl_rt5663_rt5514_max98927.c @@ -400,6 +400,9 @@ static int kabylake_dmic_startup(struct snd_pcm_substream *substream) snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, dmic_constraints); + runtime->hw.formats = SNDRV_PCM_FMTBIT_S16_LE; + snd_pcm_hw_constraint_msbits(runtime, 0, 16, 16); + return snd_pcm_hw_constraint_list(substream->runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &constraints_rates); } -- 2.23.0.162.g0b9fbb3734-goog

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[alsa-devel] [PATCH] ASoC: fsl_sai: Implement set_bclk_ratio
by Daniel Baluta 13 Sep '19

13 Sep '19

From: Viorel Suman <viorel.suman(a)nxp.com> This is to allow machine drivers to set a certain bitclk rate which might not be exactly rate * frame size. Cc: NXP Linux Team <linux-imx(a)nxp.com> Signed-off-by: Viorel Suman <viorel.suman(a)nxp.com> Signed-off-by: Daniel Baluta <daniel.baluta(a)nxp.com> --- sound/soc/fsl/fsl_sai.c | 21 +++++++++++++++++++-- sound/soc/fsl/fsl_sai.h | 1 + 2 files changed, 20 insertions(+), 2 deletions(-) diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c index fe126029f4e3..e896b577b1f7 100644 --- a/sound/soc/fsl/fsl_sai.c +++ b/sound/soc/fsl/fsl_sai.c @@ -137,6 +137,16 @@ static int fsl_sai_set_dai_tdm_slot(struct snd_soc_dai *cpu_dai, u32 tx_mask, return 0; } +static int fsl_sai_set_dai_bclk_ratio(struct snd_soc_dai *dai, + unsigned int ratio) +{ + struct fsl_sai *sai = snd_soc_dai_get_drvdata(dai); + + sai->bclk_ratio = ratio; + + return 0; +} + static int fsl_sai_set_dai_sysclk_tr(struct snd_soc_dai *cpu_dai, int clk_id, unsigned int freq, int fsl_dir) { @@ -423,8 +433,14 @@ static int fsl_sai_hw_params(struct snd_pcm_substream *substream, slot_width = sai->slot_width; if (!sai->is_slave_mode) { - ret = fsl_sai_set_bclk(cpu_dai, tx, - slots * slot_width * params_rate(params)); + if (sai->bclk_ratio) + ret = fsl_sai_set_bclk(cpu_dai, tx, + sai->bclk_ratio * + params_rate(params)); + else + ret = fsl_sai_set_bclk(cpu_dai, tx, + slots * slot_width * + params_rate(params)); if (ret) return ret; @@ -640,6 +656,7 @@ static void fsl_sai_shutdown(struct snd_pcm_substream *substream, } static const struct snd_soc_dai_ops fsl_sai_pcm_dai_ops = { + .set_bclk_ratio = fsl_sai_set_dai_bclk_ratio, .set_sysclk = fsl_sai_set_dai_sysclk, .set_fmt = fsl_sai_set_dai_fmt, .set_tdm_slot = fsl_sai_set_dai_tdm_slot, diff --git a/sound/soc/fsl/fsl_sai.h b/sound/soc/fsl/fsl_sai.h index 3a3f6f8e5595..f96f8d97489d 100644 --- a/sound/soc/fsl/fsl_sai.h +++ b/sound/soc/fsl/fsl_sai.h @@ -177,6 +177,7 @@ struct fsl_sai { unsigned int mclk_streams; unsigned int slots; unsigned int slot_width; + unsigned int bclk_ratio; const struct fsl_sai_soc_data *soc_data; struct snd_dmaengine_dai_dma_data dma_params_rx; -- 2.17.1

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[alsa-devel] [PATCH v3] drm: bridge/dw_hdmi: add audio sample channel status setting
by Cheng-Yi Chiang 13 Sep '19

13 Sep '19

From: Yakir Yang <ykk(a)rock-chips.com> When transmitting IEC60985 linear PCM audio, we configure the Aduio Sample Channel Status information in the IEC60958 frame. The status bit is already available in iec.status of hdmi_codec_params. This fix the issue that audio does not come out on some monitors (e.g. LG 22CV241) Note that these registers are only for interfaces: I2S audio interface, General Purpose Audio (GPA), or AHB audio DMA (AHBAUDDMA). For S/PDIF interface this information comes from the stream. Currently this function dw_hdmi_set_channel_status is only called from dw-hdmi-i2s-audio in I2S setup. Signed-off-by: Yakir Yang <ykk(a)rock-chips.com> Signed-off-by: Cheng-Yi Chiang <cychiang(a)chromium.org> --- Change from v2 to v3: 1. Reuse what is already set in iec.status in hw_param. 2. Remove all useless definition of registers and values. 3. Note that the original sampling frequency is not written to the channel status as we reuse create_iec958_consumer in pcm_iec958.c. Without that it can still play audio fine. .../drm/bridge/synopsys/dw-hdmi-i2s-audio.c | 1 + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 20 +++++++++++++++++++ drivers/gpu/drm/bridge/synopsys/dw-hdmi.h | 2 ++ include/drm/bridge/dw_hdmi.h | 1 + 4 files changed, 24 insertions(+) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c index 34d8e837555f..20f4f92dd866 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c @@ -102,6 +102,7 @@ static int dw_hdmi_i2s_hw_params(struct device *dev, void *data, } dw_hdmi_set_sample_rate(hdmi, hparms->sample_rate); + dw_hdmi_set_channel_status(hdmi, hparms->iec.status); dw_hdmi_set_channel_count(hdmi, hparms->channels); dw_hdmi_set_channel_allocation(hdmi, hparms->cea.channel_allocation); diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c index bd65d0479683..aa7efd4da1c8 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c @@ -582,6 +582,26 @@ static unsigned int hdmi_compute_n(unsigned int freq, unsigned long pixel_clk) return n; } +/* + * When transmitting IEC60958 linear PCM audio, these registers allow to + * configure the channel status information of all the channel status + * bits in the IEC60958 frame. For the moment this configuration is only + * used when the I2S audio interface, General Purpose Audio (GPA), + * or AHB audio DMA (AHBAUDDMA) interface is active + * (for S/PDIF interface this information comes from the stream). + */ +void dw_hdmi_set_channel_status(struct dw_hdmi *hdmi, + u8 *channel_status) +{ + /* + * Set channel status register for frequency and word length. + * Use default values for other registers. + */ + hdmi_writeb(hdmi, channel_status[3], HDMI_FC_AUDSCHNLS7); + hdmi_writeb(hdmi, channel_status[4], HDMI_FC_AUDSCHNLS8); +} +EXPORT_SYMBOL_GPL(dw_hdmi_set_channel_status); + static void hdmi_set_clk_regenerator(struct dw_hdmi *hdmi, unsigned long pixel_clk, unsigned int sample_rate) { diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.h b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.h index 6988f12d89d9..fcff5059db24 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.h +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.h @@ -158,6 +158,8 @@ #define HDMI_FC_SPDDEVICEINF 0x1062 #define HDMI_FC_AUDSCONF 0x1063 #define HDMI_FC_AUDSSTAT 0x1064 +#define HDMI_FC_AUDSCHNLS7 0x106e +#define HDMI_FC_AUDSCHNLS8 0x106f #define HDMI_FC_DATACH0FILL 0x1070 #define HDMI_FC_DATACH1FILL 0x1071 #define HDMI_FC_DATACH2FILL 0x1072 diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h index cf528c289857..4b3e863c4f8a 100644 --- a/include/drm/bridge/dw_hdmi.h +++ b/include/drm/bridge/dw_hdmi.h @@ -156,6 +156,7 @@ void dw_hdmi_setup_rx_sense(struct dw_hdmi *hdmi, bool hpd, bool rx_sense); void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate); void dw_hdmi_set_channel_count(struct dw_hdmi *hdmi, unsigned int cnt); +void dw_hdmi_set_channel_status(struct dw_hdmi *hdmi, u8 *channel_status); void dw_hdmi_set_channel_allocation(struct dw_hdmi *hdmi, unsigned int ca); void dw_hdmi_audio_enable(struct dw_hdmi *hdmi); void dw_hdmi_audio_disable(struct dw_hdmi *hdmi); -- 2.23.0.162.g0b9fbb3734-goog

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[alsa-devel] [PATCH 0/3] update supported sample format
by Shengjiu Wang 13 Sep '19

13 Sep '19

update supported sample format Shengjiu Wang (3): ASoC: fsl_asrc: Use in(out)put_format instead of in(out)put_word_width ASoC: fsl_asrc: update supported sample format ASoC: fsl_asrc: Fix error with S24_3LE format bitstream in i.MX8 sound/soc/fsl/fsl_asrc.c | 65 ++++++++++++++++--------- sound/soc/fsl/fsl_asrc.h | 7 ++- sound/soc/fsl/fsl_asrc_dma.c | 93 +++++++++++++++++++++++++++++++++--- 3 files changed, 135 insertions(+), 30 deletions(-) -- 2.21.0

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[alsa-devel] [PATCH 0/2] ASoC: mt8183: fix audio playback slowly after playback during bootup
by Jiaxin Yu 12 Sep '19

12 Sep '19

These two patches fix audio playack slowly after playbakc during bootup. The patches are based on broonie tree "for-next" branch. Jiaxin Yu (2): ASoC: dt-bingdings: mediatek: mt8183: add a property "medaitek,toprgu" ASoC: mt8183: fix audio playback slowly after playback during bootup .../bindings/sound/mt8183-afe-pcm.txt | 2 ++ sound/soc/mediatek/common/mtk-base-afe.h | 1 + sound/soc/mediatek/mt8183/mt8183-afe-pcm.c | 21 +++++++++++++++++++ sound/soc/mediatek/mt8183/mt8183-reg.h | 6 ++++++ 4 files changed, 30 insertions(+) -- 2.18.0

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[alsa-devel] [PATCH v3 00/10] adapt SOF to use snd-hda-codec-hdmi
by Kai Vehmanen 12 Sep '19

12 Sep '19

Hi all, here's the third round for this series that adapts SOF to use snd-hda-codec-hdmi (patch_hdmi.c) codec driver instead of hdac_hdmi (soc/codecs/hdac_hdmi.c). The primary goal is to unify the HDMI codec implementation between DSP and non-DSP HDA configurations, offer same interface to user-space and reduce maintenance load for all. This is now first series without the RFC tag. The series has all machine drivers converted that are directly impacted. v3 changes: - Merged two mst_no_extra_pcms patches (Takashi's feedback). - Use mach_params instead of module name lookups to determine which codec driver is used at runtime (Pierre's feedback). - Extended machine driver support to four more drivers. This includes now all machine drivers which are used with SOF and which support HDMI audio. With this patchset, the machine drivers continue to work with both SOF and SST DSP drivers, and can be configured to use hdac-hdmi also with SOF (via kernel module parameter -> this is for distros to provide backwards compatibility for UCM files). - Various smaller cleanups across the patchset. Feature and testing info: - Tested on multiple Intel platforms supported by SOF. - Tested with ALSA console tools as well as with Pulseaudio. - requires Pulseaudio 12.x or newer, see https://lists.freedesktop.org/archives/pulseaudio-discuss/2019-August/03135… - HDMI, DP, DP-MST with multi-monitor use-scenarios work ok. - New feature for SOF: ELD /proc fs works just like in DSP-less mode. - New feature for SOF: jack detection works out-of-the-box with Pulseaudio (no need for card specific UCM for HDMI) Kai Vehmanen (10): ALSA: hda/hdmi - implement mst_no_extra_pcms flag ALSA: hda/hdmi - allow control creation without a linked pcm ASoC: hdac_hda: add support for HDMI/DP as a HDA codec ASoC: SOF: Intel: add support for snd-hda-codec-hdmi ASoC: Intel: skl-hda-dsp-generic: use snd-hda-codec-hdmi ASoC: Intel: skl-hda-dsp-generic: fix include guard name ASoC: Intel: bxt-da7219-max98357a: common hdmi codec support ASoC: Intel: glk_rt5682_max98357a: common hdmi codec support ASoC: intel: sof_rt5682: common hdmi codec support ASoC: Intel: bxt_rt298: common hdmi codec support include/sound/hda_codec.h | 1 + include/sound/soc-acpi.h | 2 + sound/pci/hda/patch_hdmi.c | 23 +++-- sound/soc/codecs/hdac_hda.c | 95 ++++++++++++++++--- sound/soc/codecs/hdac_hda.h | 12 ++- sound/soc/intel/boards/bxt_da7219_max98357a.c | 11 +++ sound/soc/intel/boards/bxt_rt298.c | 11 +++ sound/soc/intel/boards/glk_rt5682_max98357a.c | 11 +++ sound/soc/intel/boards/hda_dsp_common.h | 87 +++++++++++++++++ sound/soc/intel/boards/skl_hda_dsp_common.c | 10 +- sound/soc/intel/boards/skl_hda_dsp_common.h | 27 +++++- sound/soc/intel/boards/skl_hda_dsp_generic.c | 1 + sound/soc/intel/boards/sof_rt5682.c | 11 +++ sound/soc/sof/intel/Kconfig | 10 ++ sound/soc/sof/intel/hda-codec.c | 19 +++- sound/soc/sof/intel/hda.c | 6 ++ sound/soc/sof/intel/hda.h | 6 +- 17 files changed, 315 insertions(+), 28 deletions(-) create mode 100644 sound/soc/intel/boards/hda_dsp_common.h -- 2.17.1

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[alsa-devel] [PATCH v3] ASoC: Intel: Skylake: Recover BXT FW on DSP boot timeout error
by Pawel Harlozinski 12 Sep '19

12 Sep '19

When DSP boots with timeout error try to reload firmware to keep best user expeirience. Change-Id: Ic7377da687e7441a487c443f9de1ebae5967afa2 Signed-off-by: Szymon Mielczarek <szymonx.mielczarek(a)intel.com> Signed-off-by: Pawel Harlozinski <pawel.harlozinski(a)linux.intel.com> --- sound/soc/intel/skylake/bxt-sst.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/sound/soc/intel/skylake/bxt-sst.c b/sound/soc/intel/skylake/bxt-sst.c index 92a82e6b5fe6..fdf4c198445e 100644 --- a/sound/soc/intel/skylake/bxt-sst.c +++ b/sound/soc/intel/skylake/bxt-sst.c @@ -446,14 +446,19 @@ static int bxt_set_dsp_D0(struct sst_dsp *ctx, unsigned int core_id) /* If core 1 was turned on for booting core 0, turn it off */ skl_dsp_core_power_down(ctx, SKL_DSP_CORE_MASK(1)); + /* FIXME this FW recovery applies only for BXT */ if (ret == 0) { - dev_err(ctx->dev, "%s: DSP boot timeout\n", __func__); - dev_err(ctx->dev, "Error code=0x%x: FW status=0x%x\n", + dev_warn(ctx->dev, + "DSP boot timeout: Error code=0x%x: FW status=0x%x. Reloading FW\n", sst_dsp_shim_read(ctx, BXT_ADSP_ERROR_CODE), sst_dsp_shim_read(ctx, BXT_ADSP_FW_STATUS)); - dev_err(ctx->dev, "Failed to set core0 to D0 state\n"); - ret = -EIO; - goto err; + + ret = bxt_sst_init_fw(skl->dev, skl); + if (ret < 0) { + dev_err(ctx->dev, "Reload fw failed: %d. Failed to set core0 to D0 state\n", + ret); + goto err; + } } } @@ -478,7 +483,6 @@ static int bxt_set_dsp_D0(struct sst_dsp *ctx, unsigned int core_id) if (core_id == SKL_DSP_CORE0_ID) core_mask |= SKL_DSP_CORE_MASK(1); skl_dsp_disable_core(ctx, core_mask); - return ret; } -- 2.17.1

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[alsa-devel] [PATCH v3] tas2770: add tas2770 smart PA kernel driver
by shifu0704＠thundersoft.com 12 Sep '19

12 Sep '19

From: Frank Shi <shifu0704(a)thundersoft.com> add tas2770 smart PA kernel driver Signed-off-by: Frank Shi <shifu0704(a)thundersoft.com> --- sound/soc/codecs/Kconfig | 5 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/tas2770.c | 952 +++++++++++++++++++++++++++++++++++++++++++++ sound/soc/codecs/tas2770.h | 166 ++++++++ 4 files changed, 1125 insertions(+) create mode 100644 sound/soc/codecs/tas2770.c create mode 100644 sound/soc/codecs/tas2770.h diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index 8f3e787..cc92da3 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -111,6 +111,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_STAC9766 if SND_SOC_AC97_BUS select SND_SOC_STI_SAS select SND_SOC_TAS2552 if I2C + select SND_SOC_TAS2770 if I2C select SND_SOC_TAS5086 if I2C select SND_SOC_TAS571X if I2C select SND_SOC_TFA9879 if I2C @@ -652,6 +653,10 @@ config SND_SOC_TAS2552 tristate "Texas Instruments TAS2552 Mono Audio amplifier" depends on I2C +config SND_SOC_TAS2770 + tristate "Texas Instruments TAS2770 speaker amplifier" + depends on I2C + config SND_SOC_TAS5086 tristate "Texas Instruments TAS5086 speaker amplifier" depends on I2C diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index 5305cc6..63b8488 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -116,6 +116,7 @@ snd-soc-stac9766-objs := stac9766.o snd-soc-sti-sas-objs := sti-sas.o snd-soc-tas5086-objs := tas5086.o snd-soc-tas571x-objs := tas571x.o +snd-soc-tas2770-objs := tas2770.o snd-soc-tfa9879-objs := tfa9879.o snd-soc-tlv320aic23-objs := tlv320aic23.o snd-soc-tlv320aic23-i2c-objs := tlv320aic23-i2c.o @@ -332,6 +333,7 @@ obj-$(CONFIG_SND_SOC_STI_SAS) += snd-soc-sti-sas.o obj-$(CONFIG_SND_SOC_TAS2552) += snd-soc-tas2552.o obj-$(CONFIG_SND_SOC_TAS5086) += snd-soc-tas5086.o obj-$(CONFIG_SND_SOC_TAS571X) += snd-soc-tas571x.o +obj-$(CONFIG_SND_SOC_TAS2770) += snd-soc-tas2770.o obj-$(CONFIG_SND_SOC_TFA9879) += snd-soc-tfa9879.o obj-$(CONFIG_SND_SOC_TLV320AIC23) += snd-soc-tlv320aic23.o obj-$(CONFIG_SND_SOC_TLV320AIC23_I2C) += snd-soc-tlv320aic23-i2c.o diff --git a/sound/soc/codecs/tas2770.c b/sound/soc/codecs/tas2770.c new file mode 100644 index 0000000..65aeace --- /dev/null +++ b/sound/soc/codecs/tas2770.c @@ -0,0 +1,952 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// ALSA SoC Texas Instruments TAS2770 20-W Digital Input Mono Class-D +// Audio Amplifier with Speaker I/V Sense +// +// Copyright (C) 2016-2017 Texas Instruments Incorporated - http://www.ti.com/ +// Author: Tracy Yi <tracy-yi(a)ti.com> +// Frank Shi <shifu0704(a)thundersoft.com> + +#include <linux/module.h> +#include <linux/moduleparam.h> +#include <linux/err.h> +#include <linux/init.h> +#include <linux/delay.h> +#include <linux/pm.h> +#include <linux/i2c.h> +#include <linux/gpio.h> +#include <linux/pm_runtime.h> +#include <linux/regulator/consumer.h> +#include <linux/firmware.h> +#include <linux/regmap.h> +#include <linux/of.h> +#include <linux/of_gpio.h> +#include <linux/slab.h> +#include <sound/soc.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/initval.h> +#include <sound/tlv.h> + +#include "tas2770.h" + +#define TAS2770_MDELAY 0xFFFFFFFE +#define TAS2770_CHECK_PERIOD 5000 /* 5 second */ + +static void tas2770_reset(struct tas2770_priv *tas2770) +{ + if (tas2770->reset_gpio) { + gpiod_set_value_cansleep(tas2770->reset_gpio, 0); + msleep(20); + gpiod_set_value_cansleep(tas2770->reset_gpio, 1); + } + snd_soc_component_write(tas2770->component, TAS2770_SW_RST, + TAS2770_RST); +} + +static int tas2770_regmap_read(struct tas2770_priv *tas2770, + unsigned int reg, unsigned int *value) +{ + int result = 0; + int retry_count = TAS2770_I2C_RETRY_COUNT; + + while (retry_count--) { + result = snd_soc_component_read(tas2770->component, reg, + value); + if (!result) + break; + + msleep(20); + } + if (!retry_count) + return -ETIMEDOUT; + + return 0; +} + +static int tas2770_set_bias_level(struct snd_soc_component *component, + enum snd_soc_bias_level level) +{ + struct tas2770_priv *tas2770 = + snd_soc_component_get_drvdata(component); + + switch (level) { + case SND_SOC_BIAS_ON: + break; + + case SND_SOC_BIAS_STANDBY: + snd_soc_component_update_bits(component, TAS2770_PWR_CTRL, + TAS2770_PWR_CTRL_MASK, + TAS2770_PWR_CTRL_ACTIVE); + tas2770->power_state = SND_SOC_BIAS_STANDBY; + break; + + case SND_SOC_BIAS_PREPARE: + snd_soc_component_update_bits(component, TAS2770_PWR_CTRL, + TAS2770_PWR_CTRL_MASK, + TAS2770_PWR_CTRL_MUTE); + tas2770->power_state = SND_SOC_BIAS_PREPARE; + break; + + case SND_SOC_BIAS_OFF: + snd_soc_component_update_bits(component, TAS2770_PWR_CTRL, + TAS2770_PWR_CTRL_MASK, + TAS2770_PWR_CTRL_SHUTDOWN); + tas2770->power_state = SND_SOC_BIAS_OFF; + break; + + default: + dev_err(tas2770->dev, + "wrong power level setting %d\n", level); + return -EINVAL; + } + + return 0; +} + +#ifdef CONFIG_PM +static int tas2770_codec_suspend(struct snd_soc_component *component) +{ + int ret; + + ret = tas2770_set_bias_level(component, SND_SOC_BIAS_OFF); + if (ret) + return -EINVAL; + + return 0; +} + +static int tas2770_codec_resume(struct snd_soc_component *component) +{ + int ret; + + ret = tas2770_set_bias_level(component, SND_SOC_BIAS_STANDBY); + if (ret) + return -EINVAL; + + return 0; +} +#else +#define tas2770_codec_suspend NULL +#define tas2770_codec_resume NULL +#endif + +static const char * const tas2770_ASI1_src[] = { + "I2C offset", "Left", "Right", "LeftRightDiv2", +}; + +static SOC_ENUM_SINGLE_DECL( + tas2770_ASI1_src_enum, TAS2770_TDM_CFG_REG2, + 4, tas2770_ASI1_src); + +static const struct snd_kcontrol_new tas2770_asi1_mux = + SOC_DAPM_ENUM("ASI1 Source", tas2770_ASI1_src_enum); + +static int tas2770_dac_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_component *component = + snd_soc_dapm_to_component(w->dapm); + struct tas2770_priv *tas2770 = + snd_soc_component_get_drvdata(component); + int ret; + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + ret = tas2770_set_bias_level(component, + SND_SOC_BIAS_PREPARE); + if (ret) + goto end; + break; + case SND_SOC_DAPM_PRE_PMD: + ret = tas2770_set_bias_level(component, + SND_SOC_BIAS_OFF); + if (ret) + goto end; + break; + default: + dev_err(tas2770->dev, "Not supported evevt\n"); + return -EINVAL; + } + +end: + return ret; +} + +static const struct snd_kcontrol_new isense_switch = + SOC_DAPM_SINGLE("Switch", TAS2770_PWR_CTRL, 3, 1, 1); +static const struct snd_kcontrol_new vsense_switch = + SOC_DAPM_SINGLE("Switch", TAS2770_PWR_CTRL, 2, 1, 1); + +static const struct snd_soc_dapm_widget tas2770_dapm_widgets[] = { + SND_SOC_DAPM_AIF_IN("ASI1", "ASI1 Playback", 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_MUX("ASI1 Sel", SND_SOC_NOPM, 0, 0, + &tas2770_asi1_mux), + SND_SOC_DAPM_SWITCH("ISENSE", TAS2770_PWR_CTRL, 3, 1, + &isense_switch), + SND_SOC_DAPM_SWITCH("VSENSE", TAS2770_PWR_CTRL, 2, 1, + &vsense_switch), + SND_SOC_DAPM_DAC_E("DAC", NULL, SND_SOC_NOPM, 0, 0, tas2770_dac_event, + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), + SND_SOC_DAPM_OUTPUT("OUT"), + SND_SOC_DAPM_SIGGEN("VMON"), + SND_SOC_DAPM_SIGGEN("IMON") +}; + +static const struct snd_soc_dapm_route tas2770_audio_map[] = { + {"ASI1 Sel", "I2C offset", "ASI1"}, + {"ASI1 Sel", "Left", "ASI1"}, + {"ASI1 Sel", "Right", "ASI1"}, + {"ASI1 Sel", "LeftRightDiv2", "ASI1"}, + {"DAC", NULL, "ASI1 Sel"}, + {"OUT", NULL, "DAC"}, + {"ISENSE", "Switch", "IMON"}, + {"VSENSE", "Switch", "VMON"}, +}; + +static int tas2770_mute(struct snd_soc_dai *dai, int mute) +{ + struct snd_soc_component *component = dai->component; + int ret; + + if (mute) + ret = tas2770_set_bias_level(component, SND_SOC_BIAS_PREPARE); + else + ret = tas2770_set_bias_level(component, SND_SOC_BIAS_STANDBY); + + return ret; +} + +static int tas2770_set_bitwidth(struct tas2770_priv *tas2770, int bitwidth) +{ + int ret; + struct snd_soc_component *component = tas2770->component; + + switch (bitwidth) { + case SNDRV_PCM_FORMAT_S16_LE: + ret = snd_soc_component_update_bits(component, + TAS2770_TDM_CFG_REG2, + TAS2770_TDM_CFG_REG2_RXW_MASK, + TAS2770_TDM_CFG_REG2_RXW_16BITS); + tas2770->v_sense_slot = tas2770->i_sense_slot + 2; + break; + case SNDRV_PCM_FORMAT_S24_LE: + ret = snd_soc_component_update_bits(component, + TAS2770_TDM_CFG_REG2, + TAS2770_TDM_CFG_REG2_RXW_MASK, + TAS2770_TDM_CFG_REG2_RXW_24BITS); + tas2770->v_sense_slot = tas2770->i_sense_slot + 4; + break; + case SNDRV_PCM_FORMAT_S32_LE: + ret = snd_soc_component_update_bits(component, + TAS2770_TDM_CFG_REG2, + TAS2770_TDM_CFG_REG2_RXW_MASK, + TAS2770_TDM_CFG_REG2_RXW_32BITS); + tas2770->v_sense_slot = tas2770->i_sense_slot + 4; + break; + + default: + return -EINVAL; + } + + tas2770->channel_size = bitwidth; + + ret = snd_soc_component_update_bits(component, + TAS2770_TDM_CFG_REG5, + TAS2770_TDM_CFG_REG5_VSNS_MASK | + TAS2770_TDM_CFG_REG5_50_MASK, + TAS2770_TDM_CFG_REG5_VSNS_ENABLE | + tas2770->v_sense_slot); + if (ret) + goto end; + ret = snd_soc_component_update_bits(component, + TAS2770_TDM_CFG_REG6, + TAS2770_TDM_CFG_REG6_ISNS_MASK | + TAS2770_TDM_CFG_REG6_50_MASK, + TAS2770_TDM_CFG_REG6_ISNS_ENABLE | + tas2770->i_sense_slot); + +end: + return ret; +} + +static int tas2770_set_samplerate(struct tas2770_priv *tas2770, + int samplerate) +{ + int ret; + struct snd_soc_component *component = tas2770->component; + + switch (samplerate) { + case 48000: + ret = snd_soc_component_update_bits(component, + TAS2770_TDM_CFG_REG0, + TAS2770_TDM_CFG_REG0_SMP_MASK, + TAS2770_TDM_CFG_REG0_SMP_48KHZ); + if (ret) + goto end; + ret = snd_soc_component_update_bits(component, + TAS2770_TDM_CFG_REG0, + TAS2770_TDM_CFG_REG0_31_MASK, + TAS2770_TDM_CFG_REG0_31_44_1_48KHZ); + if (ret) + goto end; + break; + case 44100: + ret = snd_soc_component_update_bits(component, + TAS2770_TDM_CFG_REG0, + TAS2770_TDM_CFG_REG0_SMP_MASK, + TAS2770_TDM_CFG_REG0_SMP_44_1KHZ); + if (ret) + goto end; + ret = snd_soc_component_update_bits(component, + TAS2770_TDM_CFG_REG0, + TAS2770_TDM_CFG_REG0_31_MASK, + TAS2770_TDM_CFG_REG0_31_44_1_48KHZ); + if (ret) + goto end; + break; + case 96000: + ret = snd_soc_component_update_bits(component, + TAS2770_TDM_CFG_REG0, + TAS2770_TDM_CFG_REG0_SMP_MASK, + TAS2770_TDM_CFG_REG0_SMP_48KHZ); + if (ret) + goto end; + ret = snd_soc_component_update_bits(component, + TAS2770_TDM_CFG_REG0, + TAS2770_TDM_CFG_REG0_31_MASK, + TAS2770_TDM_CFG_REG0_31_88_2_96KHZ); + break; + case 88200: + ret = snd_soc_component_update_bits(component, + TAS2770_TDM_CFG_REG0, + TAS2770_TDM_CFG_REG0_SMP_MASK, + TAS2770_TDM_CFG_REG0_SMP_44_1KHZ); + if (ret) + goto end; + ret = snd_soc_component_update_bits(component, + TAS2770_TDM_CFG_REG0, + TAS2770_TDM_CFG_REG0_31_MASK, + TAS2770_TDM_CFG_REG0_31_88_2_96KHZ); + break; + case 19200: + ret = snd_soc_component_update_bits(component, + TAS2770_TDM_CFG_REG0, + TAS2770_TDM_CFG_REG0_SMP_MASK, + TAS2770_TDM_CFG_REG0_SMP_48KHZ); + if (ret) + goto end; + ret = snd_soc_component_update_bits(component, + TAS2770_TDM_CFG_REG0, + TAS2770_TDM_CFG_REG0_31_MASK, + TAS2770_TDM_CFG_REG0_31_176_4_192KHZ); + if (ret) + goto end; + break; + case 17640: + ret = snd_soc_component_update_bits(component, + TAS2770_TDM_CFG_REG0, + TAS2770_TDM_CFG_REG0_SMP_MASK, + TAS2770_TDM_CFG_REG0_SMP_44_1KHZ); + if (ret) + goto end; + ret = snd_soc_component_update_bits(component, + TAS2770_TDM_CFG_REG0, + TAS2770_TDM_CFG_REG0_31_MASK, + TAS2770_TDM_CFG_REG0_31_176_4_192KHZ); + break; + default: + ret = -EINVAL; + } + +end: + if (!ret) + tas2770->sampling_rate = samplerate; + return ret; +} + +static int tas2770_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct snd_soc_component *component = dai->component; + struct tas2770_priv *tas2770 = + snd_soc_component_get_drvdata(component); + int ret; + + ret = tas2770_set_bitwidth(tas2770, params_format(params)); + if (ret < 0) + goto end; + + + ret = tas2770_set_samplerate(tas2770, params_rate(params)); + +end: + return ret; +} + +static int tas2770_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) +{ + u8 tdm_rx_start_slot = 0, asi_cfg_1 = 0; + int ret; + int value = 0; + struct snd_soc_component *component = dai->component; + struct tas2770_priv *tas2770 = + snd_soc_component_get_drvdata(component); + + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBS_CFS: + break; + default: + dev_err(tas2770->dev, "ASI format master is not found\n"); + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + asi_cfg_1 |= TAS2770_TDM_CFG_REG1_RX_RSING; + break; + case SND_SOC_DAIFMT_IB_NF: + asi_cfg_1 |= TAS2770_TDM_CFG_REG1_RX_FALING; + break; + default: + dev_err(tas2770->dev, "ASI format Inverse is not found\n"); + return -EINVAL; + } + + ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG1, + TAS2770_TDM_CFG_REG1_RX_MASK, + asi_cfg_1); + if (ret) + return ret; + + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case (SND_SOC_DAIFMT_I2S): + tdm_rx_start_slot = 1; + break; + case (SND_SOC_DAIFMT_DSP_A): + tdm_rx_start_slot = 0; + break; + case (SND_SOC_DAIFMT_DSP_B): + tdm_rx_start_slot = 1; + break; + case (SND_SOC_DAIFMT_LEFT_J): + tdm_rx_start_slot = 0; + break; + default: + dev_err(tas2770->dev, + "DAI Format is not found, fmt=0x%x\n", fmt); + return -EINVAL; + } + + ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG1, + TAS2770_TDM_CFG_REG1_MASK, + (tdm_rx_start_slot << TAS2770_TDM_CFG_REG1_51_SHIFT)); + if (ret) + return ret; + + value = snd_soc_component_read32(component, TAS2770_TDM_CFG_REG3); + + tas2770->asi_format = fmt; + + return 0; +} + +static int tas2770_set_dai_tdm_slot(struct snd_soc_dai *dai, + unsigned int tx_mask, + unsigned int rx_mask, + int slots, int slot_width) +{ + struct snd_soc_component *component = dai->component; + struct tas2770_priv *tas2770 = + snd_soc_component_get_drvdata(component); + int left_slot, right_slot; + int ret; + + if (tx_mask == 0 || rx_mask != 0) + return -EINVAL; + + if (slots == 1) { + if (tx_mask != 1) + return -EINVAL; + left_slot = 0; + right_slot = 0; + } else { + left_slot = __ffs(tx_mask); + tx_mask &= ~(1 << left_slot); + if (tx_mask == 0) { + right_slot = left_slot; + } else { + right_slot = __ffs(tx_mask); + tx_mask &= ~(1 << right_slot); + } + } + + if (tx_mask != 0 || left_slot >= slots || right_slot >= slots) + return -EINVAL; + + ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG3, + TAS2770_TDM_CFG_REG3_30_MASK, + (left_slot << TAS2770_TDM_CFG_REG3_30_SHIFT)); + if (ret) + return ret; + ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG3, + TAS2770_TDM_CFG_REG3_RXS_MASK, + (right_slot << TAS2770_TDM_CFG_REG3_RXS_SHIFT)); + if (ret) + return ret; + + switch (slot_width) { + case 16: + ret = snd_soc_component_update_bits(component, + TAS2770_TDM_CFG_REG2, + TAS2770_TDM_CFG_REG2_RXS_MASK, + TAS2770_TDM_CFG_REG2_RXS_16BITS); + break; + + case 24: + ret = snd_soc_component_update_bits(component, + TAS2770_TDM_CFG_REG2, + TAS2770_TDM_CFG_REG2_RXS_MASK, + TAS2770_TDM_CFG_REG2_RXS_24BITS); + break; + + case 32: + ret = snd_soc_component_update_bits(component, + TAS2770_TDM_CFG_REG2, + TAS2770_TDM_CFG_REG2_RXS_MASK, + TAS2770_TDM_CFG_REG2_RXS_32BITS); + break; + + case 0: + /* Do not change slot width */ + ret = 0; + break; + + default: + ret = -EINVAL; + } + + if (!ret) + tas2770->slot_width = slot_width; + + return ret; +} + +static struct snd_soc_dai_ops tas2770_dai_ops = { + .digital_mute = tas2770_mute, + .hw_params = tas2770_hw_params, + .set_fmt = tas2770_set_fmt, + .set_tdm_slot = tas2770_set_dai_tdm_slot, +}; + +#define TAS2770_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ + SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) + +#define TAS2770_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\ + SNDRV_PCM_RATE_96000 |\ + SNDRV_PCM_RATE_192000\ + ) + +static struct snd_soc_dai_driver tas2770_dai_driver[] = { + { + .name = "tas2770 ASI1", + .id = 0, + .playback = { + .stream_name = "ASI1 Playback", + .channels_min = 2, + .channels_max = 2, + .rates = TAS2770_RATES, + .formats = TAS2770_FORMATS, + }, + .capture = { + .stream_name = "ASI1 Capture", + .channels_min = 0, + .channels_max = 2, + .rates = TAS2770_RATES, + .formats = TAS2770_FORMATS, + }, + .ops = &tas2770_dai_ops, + .symmetric_rates = 1, + }, +}; + +static int tas2770_codec_probe(struct snd_soc_component *component) +{ + struct tas2770_priv *tas2770 = + snd_soc_component_get_drvdata(component); + + tas2770->component = component; + + return 0; +} + +static DECLARE_TLV_DB_SCALE(tas2770_digital_tlv, 1100, 50, 0); +static DECLARE_TLV_DB_SCALE(tas2770_playback_volume, -12750, 50, 0); + +static const struct snd_kcontrol_new tas2770_snd_controls[] = { + SOC_SINGLE_TLV("Amp Output Gain", TAS2770_PLAY_CFG_REG0, + 0, 0x14, 0, + tas2770_digital_tlv), + SOC_SINGLE_TLV("Playback Volume", TAS2770_PLAY_CFG_REG2, + 0, TAS2770_PLAY_CFG_REG2_VMAX, 1, + tas2770_playback_volume), +}; + +static const struct snd_soc_component_driver soc_component_driver_tas2770 = { + .probe = tas2770_codec_probe, + .suspend = tas2770_codec_suspend, + .resume = tas2770_codec_resume, + .set_bias_level = tas2770_set_bias_level, + .controls = tas2770_snd_controls, + .num_controls = ARRAY_SIZE(tas2770_snd_controls), + .dapm_widgets = tas2770_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(tas2770_dapm_widgets), + .dapm_routes = tas2770_audio_map, + .num_dapm_routes = ARRAY_SIZE(tas2770_audio_map), + .idle_bias_on = 1, + .endianness = 1, + .non_legacy_dai_naming = 1, +}; + +static int tas2770_register_codec(struct tas2770_priv *tas2770) +{ + return devm_snd_soc_register_component(tas2770->dev, + &soc_component_driver_tas2770, + tas2770_dai_driver, ARRAY_SIZE(tas2770_dai_driver)); +} + +static void tas2770_load_config(struct tas2770_priv *tas2770) +{ + int ret; + struct snd_soc_component *component = tas2770->component; + + tas2770_reset(tas2770); + snd_soc_component_write(component, TAS2770_SW_RST, + TAS2770_RST); + + ret = tas2770_set_bitwidth(tas2770, tas2770->channel_size); + if (ret) + goto error_out; + + ret = tas2770_set_samplerate(tas2770, tas2770->sampling_rate); + if (ret) + goto error_out; + + ret = tas2770_set_bias_level(component, tas2770->power_state); + if (ret) + goto error_out; + +error_out: + return; +} + +static const struct reg_default tas2770_reg_defaults[] = { + { TAS2770_PAGE, 0x00 }, + { TAS2770_SW_RST, 0x00 }, + { TAS2770_PWR_CTRL, 0x0e }, + { TAS2770_PLAY_CFG_REG0, 0x10 }, + { TAS2770_PLAY_CFG_REG1, 0x01 }, + { TAS2770_PLAY_CFG_REG2, 0x00 }, + { TAS2770_MSC_CFG_REG0, 0x07 }, + { TAS2770_TDM_CFG_REG1, 0x02 }, + { TAS2770_TDM_CFG_REG2, 0x0a }, + { TAS2770_TDM_CFG_REG3, 0x10 }, + { TAS2770_INT_MASK_REG0, 0xfc }, + { TAS2770_INT_MASK_REG1, 0xb1 }, + { TAS2770_INT_CFG, 0x05 }, + { TAS2770_MISC_IRQ, 0x81 }, + { TAS2770_CLK_CGF, 0x0c }, + +}; + +static bool tas2770_volatile(struct device *dev, unsigned int reg) +{ + switch (reg) { + case TAS2770_PAGE: /* regmap implementation requires this */ + case TAS2770_SW_RST: /* always clears after write */ + case TAS2770_BO_PRV_REG0:/* has a self clearing bit */ + case TAS2770_LVE_INT_REG0: + case TAS2770_LVE_INT_REG1: + case TAS2770_LAT_INT_REG0:/* Sticky interrupt flags */ + case TAS2770_LAT_INT_REG1:/* Sticky interrupt flags */ + case TAS2770_VBAT_MSB: + case TAS2770_VBAT_LSB: + case TAS2770_TEMP_MSB: + case TAS2770_TEMP_LSB: + return true; + } + return false; +} + +static bool tas2770_writeable(struct device *dev, unsigned int reg) +{ + switch (reg) { + case TAS2770_LVE_INT_REG0: + case TAS2770_LVE_INT_REG1: + case TAS2770_LAT_INT_REG0: + case TAS2770_LAT_INT_REG1: + case TAS2770_VBAT_MSB: + case TAS2770_VBAT_LSB: + case TAS2770_TEMP_MSB: + case TAS2770_TEMP_LSB: + case TAS2770_TDM_CLK_DETC: + case TAS2770_REV_AND_GPID: + return false; + } + return true; +} + +static const struct regmap_range_cfg tas2770_regmap_ranges[] = { + { + .range_min = 0, + .range_max = 1 * 128, + .selector_reg = TAS2770_PAGE, + .selector_mask = 0xff, + .selector_shift = 0, + .window_start = 0, + .window_len = 128, + }, +}; + +static const struct regmap_config tas2770_i2c_regmap = { + .reg_bits = 8, + .val_bits = 8, + .writeable_reg = tas2770_writeable, + .volatile_reg = tas2770_volatile, + .reg_defaults = tas2770_reg_defaults, + .num_reg_defaults = ARRAY_SIZE(tas2770_reg_defaults), + .cache_type = REGCACHE_RBTREE, + .ranges = tas2770_regmap_ranges, + .num_ranges = ARRAY_SIZE(tas2770_regmap_ranges), + .max_register = 1 * 128, +}; + +static irqreturn_t tas2770_irq_handler(int irq, void *dev_id) +{ + struct tas2770_priv *tas2770 = (struct tas2770_priv *)dev_id; + struct snd_soc_component *component = tas2770->component; + unsigned int device_status_1 = 0, device_status_2 = 0; + int result; + + if (tas2770->runtime_suspend) + goto end; + + if (tas2770->power_state == TAS2770_POWER_SHUTDOWN) + goto end; + + result = snd_soc_component_write(component, TAS2770_INT_MASK_REG0, + TAS2770_INT_MASK_REG0_DISABLE); + if (result) + goto reload; + result = snd_soc_component_write(component, TAS2770_INT_MASK_REG1, + TAS2770_INT_MASK_REG1_DISABLE); + if (result) + goto reload; + + result = tas2770_regmap_read(tas2770, + TAS2770_LAT_INT_REG0, &device_status_1); + if (!result && (device_status_1 & 0x3)) { + if (device_status_1 & + TAS2770_LAT_INT_REG0_OCE_FLG) { + tas2770->err_code |= ERROR_OVER_CURRENT; + dev_err(tas2770->dev, "SPK over current!\n"); + } else { + tas2770->err_code &= ~ERROR_OVER_CURRENT; + } + + if (device_status_1 & + TAS2770_LAT_INT_REG0_OTE_FLG) { + tas2770->err_code |= ERROR_DIE_OVERTEMP; + dev_err(tas2770->dev, "die over temperature!\n"); + } else { + tas2770->err_code &= ~ERROR_DIE_OVERTEMP; + } + } + + result = tas2770_regmap_read(tas2770, + TAS2770_LAT_INT_REG1, &device_status_2); + if (!result && (device_status_2 & 0x0f)) { + if (device_status_2 & + TAS2770_LAT_INT_REG1_VBA_TOV) { + tas2770->err_code |= ERROR_OVER_VOLTAGE; + dev_err(tas2770->dev, "SPK over voltage!\n"); + } else { + tas2770->err_code &= ~ERROR_OVER_VOLTAGE; + } + + if (device_status_2 & + TAS2770_LAT_INT_REG1_VBA_TUV) { + tas2770->err_code |= ERROR_UNDER_VOLTAGE; + dev_err(tas2770->dev, "SPK under voltage!\n"); + } else { + tas2770->err_code &= ~ERROR_UNDER_VOLTAGE; + } + + if (device_status_2 & + TAS2770_LAT_INT_REG1_BOUT_FLG) { + tas2770->err_code |= ERROR_BROWNOUT; + dev_err(tas2770->dev, "brownout!\n"); + } else { + tas2770->err_code &= ~ERROR_BROWNOUT; + } + } + + result = snd_soc_component_write(component, + TAS2770_INT_MASK_REG0, TAS2770_INT_REG0_DEFAULT); + if (result) + goto reload; + + result = snd_soc_component_write(component, + TAS2770_INT_MASK_REG1, TAS2770_INT_REG1_DEFAULT); + if (result) + goto reload; + + goto end; + +reload: + /* hardware reset and reload */ + tas2770_load_config(tas2770); + +end: + return IRQ_HANDLED; +} + +static int tas2770_parse_dt(struct device *dev, struct tas2770_priv *tas2770) +{ + int rc = 0; + + rc = fwnode_property_read_u32(dev->fwnode, "ti,asi-format", + &tas2770->asi_format); + if (rc) { + dev_err(tas2770->dev, "Looking up %s property failed %d\n", + "ti,asi-format", rc); + goto end; + } + + rc = fwnode_property_read_u32(dev->fwnode, "ti,imon-slot-no", + &tas2770->i_sense_slot); + if (rc) { + dev_err(tas2770->dev, "Looking up %s property failed %d\n", + "ti,imon-slot-no", rc); + goto end; + } + + rc = fwnode_property_read_u32(dev->fwnode, "ti,vmon-slot-no", + &tas2770->v_sense_slot); + if (rc) { + dev_err(tas2770->dev, "Looking up %s property failed %d\n", + "ti,vmon-slot-no", rc); + goto end; + } + +end: + return rc; +} + +static int tas2770_i2c_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct tas2770_priv *tas2770; + int result; + + tas2770 = devm_kzalloc(&client->dev, + sizeof(struct tas2770_priv), GFP_KERNEL); + if (!tas2770) + return -ENOMEM; + tas2770->dev = &client->dev; + tas2770->irq_gpio = client->irq; + + i2c_set_clientdata(client, tas2770); + dev_set_drvdata(&client->dev, tas2770); + tas2770->power_state = TAS2770_POWER_SHUTDOWN; + + tas2770->regmap = devm_regmap_init_i2c(client, &tas2770_i2c_regmap); + if (IS_ERR(tas2770->regmap)) { + result = PTR_ERR(tas2770->regmap); + dev_err(&client->dev, "Failed to allocate register map: %d\n", + result); + goto end; + } + + if (client->dev.of_node) { + result = tas2770_parse_dt(&client->dev, tas2770); + if (result) { + dev_err(tas2770->dev, "%s: Failed to parse devicetree\n", + __func__); + goto end; + } + } + + tas2770->reset_gpio = devm_gpiod_get_optional(tas2770->dev, + "reset-gpio", + GPIOD_OUT_HIGH); + if (IS_ERR(tas2770->reset_gpio)) { + if (PTR_ERR(tas2770->reset_gpio) == -EPROBE_DEFER) { + tas2770->reset_gpio = NULL; + return -EPROBE_DEFER; + } + } + + if (tas2770->irq_gpio > 0) { + result = devm_request_threaded_irq(tas2770->dev, + tas2770->irq_gpio, + NULL, tas2770_irq_handler, + IRQF_TRIGGER_FALLING | IRQF_ONESHOT, client->name, + tas2770); + if (result) { + dev_err(tas2770->dev, "Unable to request IRQ\n"); + return result; + } + } + + tas2770->channel_size = 0; + tas2770->slot_width = 0; + + tas2770_reset(tas2770); + + result = tas2770_register_codec(tas2770); + if (result) + dev_err(tas2770->dev, "Register codec failed.\n"); + +end: + return result; +} + +static int tas2770_i2c_remove(struct i2c_client *client) +{ + pm_runtime_disable(&client->dev); + return 0; +} + + +static const struct i2c_device_id tas2770_i2c_id[] = { + { "tas2770", 0}, + { } +}; +MODULE_DEVICE_TABLE(i2c, tas2770_i2c_id); + +#if defined(CONFIG_OF) +static const struct of_device_id tas2770_of_match[] = { + { .compatible = "ti,tas2770" }, + {}, +}; +MODULE_DEVICE_TABLE(of, tas2770_of_match); +#endif + +static struct i2c_driver tas2770_i2c_driver = { + .driver = { + .name = "tas2770", + .owner = THIS_MODULE, + .of_match_table = of_match_ptr(tas2770_of_match), + }, + .probe = tas2770_i2c_probe, + .remove = tas2770_i2c_remove, + .id_table = tas2770_i2c_id, +}; + +module_i2c_driver(tas2770_i2c_driver); + +MODULE_AUTHOR("Shi Fu <shifu0704(a)thundersoft.com>"); +MODULE_DESCRIPTION("TAS2770 I2C Smart Amplifier driver"); +MODULE_LICENSE("GPL v2"); diff --git a/sound/soc/codecs/tas2770.h b/sound/soc/codecs/tas2770.h new file mode 100644 index 0000000..bf59dc2 --- /dev/null +++ b/sound/soc/codecs/tas2770.h @@ -0,0 +1,166 @@ +/* SPDX-License-Identifier: GPL-2.0 + * + * ALSA SoC TAS2770 codec driver + * + * Copyright (C) 2016-2017 Texas Instruments Incorporated - http://www.ti.com/ + */ +#ifndef __TAS2770__ +#define __TAS2770__ + +/* Book Control Register (available in page0 of each book) */ +#define TAS2770_BOOKCTL_PAGE 0 +#define TAS2770_BOOKCTL_REG 127 +#define TAS2770_REG(page, reg) ((page * 128) + reg) + /* Page */ +#define TAS2770_PAGE TAS2770_REG(0X0, 0x00) +#define TAS2770_PAGE_PAGE_MASK 255 + /* Software Reset */ +#define TAS2770_SW_RST TAS2770_REG(0X0, 0x01) +#define TAS2770_RST BIT(0) + /* Power Control */ +#define TAS2770_PWR_CTRL TAS2770_REG(0X0, 0x02) +#define TAS2770_PWR_CTRL_MASK 0x3 +#define TAS2770_PWR_CTRL_ACTIVE 0x0 +#define TAS2770_PWR_CTRL_MUTE BIT(0) +#define TAS2770_PWR_CTRL_SHUTDOWN 0x2 + /* Playback Configuration Reg0 */ +#define TAS2770_PLAY_CFG_REG0 TAS2770_REG(0X0, 0x03) + /* Playback Configuration Reg1 */ +#define TAS2770_PLAY_CFG_REG1 TAS2770_REG(0X0, 0x04) + /* Playback Configuration Reg2 */ +#define TAS2770_PLAY_CFG_REG2 TAS2770_REG(0X0, 0x05) +#define TAS2770_PLAY_CFG_REG2_VMAX 0xc9 + /* Misc Configuration Reg0 */ +#define TAS2770_MSC_CFG_REG0 TAS2770_REG(0X0, 0x07) + /* TDM Configuration Reg0 */ +#define TAS2770_TDM_CFG_REG0 TAS2770_REG(0X0, 0x0A) +#define TAS2770_TDM_CFG_REG0_SMP_MASK BIT(5) +#define TAS2770_TDM_CFG_REG0_SMP_48KHZ 0x0 +#define TAS2770_TDM_CFG_REG0_SMP_44_1KHZ BIT(5) +#define TAS2770_TDM_CFG_REG0_31_MASK 0xe +#define TAS2770_TDM_CFG_REG0_31_44_1_48KHZ 0x6 +#define TAS2770_TDM_CFG_REG0_31_88_2_96KHZ 0x8 +#define TAS2770_TDM_CFG_REG0_31_176_4_192KHZ 0xa + /* TDM Configuration Reg1 */ +#define TAS2770_TDM_CFG_REG1 TAS2770_REG(0X0, 0x0B) +#define TAS2770_TDM_CFG_REG1_MASK 0x3e +#define TAS2770_TDM_CFG_REG1_51_SHIFT 1 +#define TAS2770_TDM_CFG_REG1_RX_MASK BIT(0) +#define TAS2770_TDM_CFG_REG1_RX_RSING 0x0 +#define TAS2770_TDM_CFG_REG1_RX_FALING BIT(0) + /* TDM Configuration Reg2 */ +#define TAS2770_TDM_CFG_REG2 TAS2770_REG(0X0, 0x0C) +#define TAS2770_TDM_CFG_REG2_RXW_MASK 0xc +#define TAS2770_TDM_CFG_REG2_RXW_16BITS 0x0 +#define TAS2770_TDM_CFG_REG2_RXW_24BITS 0x8 +#define TAS2770_TDM_CFG_REG2_RXW_32BITS 0xc +#define TAS2770_TDM_CFG_REG2_RXS_MASK 0x3 +#define TAS2770_TDM_CFG_REG2_RXS_16BITS 0x0 +#define TAS2770_TDM_CFG_REG2_RXS_24BITS BIT(0) +#define TAS2770_TDM_CFG_REG2_RXS_32BITS 0x2 + /* TDM Configuration Reg3 */ +#define TAS2770_TDM_CFG_REG3 TAS2770_REG(0X0, 0x0D) +#define TAS2770_TDM_CFG_REG3_RXS_MASK 0xf0 +#define TAS2770_TDM_CFG_REG3_RXS_SHIFT 0x4 +#define TAS2770_TDM_CFG_REG3_30_MASK 0xf +#define TAS2770_TDM_CFG_REG3_30_SHIFT 0 + /* TDM Configuration Reg5 */ +#define TAS2770_TDM_CFG_REG5 TAS2770_REG(0X0, 0x0F) +#define TAS2770_TDM_CFG_REG5_VSNS_MASK BIT(6) +#define TAS2770_TDM_CFG_REG5_VSNS_ENABLE BIT(6) +#define TAS2770_TDM_CFG_REG5_50_MASK 0x3f + /* TDM Configuration Reg6 */ +#define TAS2770_TDM_CFG_REG6 TAS2770_REG(0X0, 0x10) +#define TAS2770_TDM_CFG_REG6_ISNS_MASK BIT(6) +#define TAS2770_TDM_CFG_REG6_ISNS_ENABLE BIT(6) +#define TAS2770_TDM_CFG_REG6_50_MASK 0x3f + /* Brown Out Prevention Reg0 */ +#define TAS2770_BO_PRV_REG0 TAS2770_REG(0X0, 0x1B) + /* Interrupt MASK Reg0 */ +#define TAS2770_INT_MASK_REG0 TAS2770_REG(0X0, 0x20) +#define TAS2770_INT_REG0_DEFAULT 0xfc +#define TAS2770_INT_MASK_REG0_DISABLE 0xff + /* Interrupt MASK Reg1 */ +#define TAS2770_INT_MASK_REG1 TAS2770_REG(0X0, 0x21) +#define TAS2770_INT_REG1_DEFAULT 0xb1 +#define TAS2770_INT_MASK_REG1_DISABLE 0xff + /* Live-Interrupt Reg0 */ +#define TAS2770_LVE_INT_REG0 TAS2770_REG(0X0, 0x22) + /* Live-Interrupt Reg1 */ +#define TAS2770_LVE_INT_REG1 TAS2770_REG(0X0, 0x23) + /* Latched-Interrupt Reg0 */ +#define TAS2770_LAT_INT_REG0 TAS2770_REG(0X0, 0x24) +#define TAS2770_LAT_INT_REG0_OCE_FLG BIT(1) +#define TAS2770_LAT_INT_REG0_OTE_FLG BIT(0) + /* Latched-Interrupt Reg1 */ +#define TAS2770_LAT_INT_REG1 TAS2770_REG(0X0, 0x25) +#define TAS2770_LAT_INT_REG1_VBA_TOV BIT(3) +#define TAS2770_LAT_INT_REG1_VBA_TUV BIT(2) +#define TAS2770_LAT_INT_REG1_BOUT_FLG BIT(1) + /* VBAT MSB */ +#define TAS2770_VBAT_MSB TAS2770_REG(0X0, 0x27) + /* VBAT LSB */ +#define TAS2770_VBAT_LSB TAS2770_REG(0X0, 0x28) + /* TEMP MSB */ +#define TAS2770_TEMP_MSB TAS2770_REG(0X0, 0x29) + /* TEMP LSB */ +#define TAS2770_TEMP_LSB TAS2770_REG(0X0, 0x2A) + /* Interrupt Configuration */ +#define TAS2770_INT_CFG TAS2770_REG(0X0, 0x30) + /* Misc IRQ */ +#define TAS2770_MISC_IRQ TAS2770_REG(0X0, 0x32) + /* Clock Configuration */ +#define TAS2770_CLK_CGF TAS2770_REG(0X0, 0x3C) + /* TDM Clock detection monitor */ +#define TAS2770_TDM_CLK_DETC TAS2770_REG(0X0, 0x77) + /* Revision and PG ID */ +#define TAS2770_REV_AND_GPID TAS2770_REG(0X0, 0x7D) + +#define TAS2770_POWER_ACTIVE 0 +#define TAS2770_POWER_MUTE 1 +#define TAS2770_POWER_SHUTDOWN 2 +#define ERROR_OVER_CURRENT 0x0000001 +#define ERROR_DIE_OVERTEMP 0x0000002 +#define ERROR_OVER_VOLTAGE 0x0000004 +#define ERROR_UNDER_VOLTAGE 0x0000008 +#define ERROR_BROWNOUT 0x0000010 +#define ERROR_CLASSD_PWR 0x0000020 +#define TAS2770_SLOT_16BIT 16 +#define TAS2770_SLOT_32BIT 32 +#define TAS2770_I2C_RETRY_COUNT 3 + +struct tas2770_register { + int book; + int page; + int reg; +}; + +struct tas2770_dai_cfg { + unsigned int dai_fmt; + unsigned int tdm_delay; +}; + +struct tas2770_priv { + struct device *dev; + struct regmap *regmap; + struct snd_soc_codec *codec; + struct snd_soc_component *component; + struct mutex dev_lock; + struct hrtimer mtimer; + int power_state; + int asi_format; + struct gpio_desc *reset_gpio; + int irq_gpio; + bool irq_enable; + int sampling_rate; + int frame_size; + int channel_size; + int slot_width; + int v_sense_slot; + int i_sense_slot; + bool runtime_suspend; + unsigned int err_code; + struct mutex codec_lock; +}; + +#endif /* __TAS2770__ */ -- 2.7.4

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