June 2019 - Alsa-devel - mailman.alsa-project.org

[alsa-devel] [PATCH] ASoC: rt1011: fix warning reported by kbuild test robot and minor issue
by shumingf＠realtek.com 06 Jun '19

06 Jun '19

From: Shuming Fan <shumingf(a)realtek.com> This patch fixes following issues: - warning: this decimal constant is unsigned only in ISO C90 - sparse: incorrect type in assignment - check if value.integer.value is zero for "R0 Load Mode" control Signed-off-by: Shuming Fan <shumingf(a)realtek.com> --- sound/soc/codecs/rt1011.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/sound/soc/codecs/rt1011.c b/sound/soc/codecs/rt1011.c index 349d6db7ecd4..5605b660f4bf 100644 --- a/sound/soc/codecs/rt1011.c +++ b/sound/soc/codecs/rt1011.c @@ -1145,8 +1145,8 @@ static int rt1011_bq_drc_coeff_get(struct snd_kcontrol *kcontrol, bq_drc_info = rt1011->bq_drc_params[mode_idx]; for (i = 0; i < RT1011_BQ_DRC_NUM; i++) { - params[i].reg = cpu_to_le16(bq_drc_info[i].reg); - params[i].val = cpu_to_le16(bq_drc_info[i].val); + params[i].reg = bq_drc_info[i].reg; + params[i].val = bq_drc_info[i].val; } return 0; @@ -1187,8 +1187,8 @@ static int rt1011_bq_drc_coeff_put(struct snd_kcontrol *kcontrol, pr_info("%s, id.name=%s, mode_idx=%d\n", __func__, ucontrol->id.name, mode_idx); for (i = 0; i < RT1011_BQ_DRC_NUM; i++) { - bq_drc_info[i].reg = le16_to_cpu(params[i].reg); - bq_drc_info[i].val = le16_to_cpu(params[i].val); + bq_drc_info[i].reg = params[i].reg; + bq_drc_info[i].val = params[i].val; } for (i = 0; i < RT1011_BQ_DRC_NUM; i++) { @@ -1284,11 +1284,14 @@ static int rt1011_r0_load_mode_put(struct snd_kcontrol *kcontrol, if (!component->card->instantiated) return 0; + if (ucontrol->value.integer.value[0] == 0) + return -EINVAL; + dev = regmap_get_device(rt1011->regmap); if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) { rt1011->r0_reg = ucontrol->value.integer.value[0]; - format = 2147483648; /* 2^24 * 128 */ + format = 2147483648U; /* 2^24 * 128 */ r0_integer = format / rt1011->r0_reg / 128; r0_factor = ((format / rt1011->r0_reg * 100) / 128) - (r0_integer * 100); @@ -2120,7 +2123,7 @@ static int rt1011_calibrate(struct rt1011_priv *rt1011, unsigned char cali_flag) dev_err(dev, "Calibrate R0 Failure\n"); ret = -EAGAIN; } else { - format = 2147483648; /* 2^24 * 128 */ + format = 2147483648U; /* 2^24 * 128 */ r0_integer = format / r0[0] / 128; r0_factor = ((format / r0[0] * 100) / 128) - (r0_integer * 100); -- 2.21.0

2 1

[alsa-devel] [PATCH] ASoC: rt1011: Mark format integer literals as unsigned
by Nathan Chancellor 06 Jun '19

06 Jun '19

Clang warns: sound/soc/codecs/rt1011.c:1291:12: warning: integer literal is too large to be represented in type 'long', interpreting as 'unsigned long' per C89; this literal will have type 'long long' in C99 onwards [-Wc99-compat] format = 2147483648; /* 2^24 * 128 */ ^ sound/soc/codecs/rt1011.c:2123:13: warning: integer literal is too large to be represented in type 'long', interpreting as 'unsigned long' per C89; this literal will have type 'long long' in C99 onwards [-Wc99-compat] format = 2147483648; /* 2^24 * 128 */ ^ 2 warnings generated. Mark the integer literals as unsigned explicitly so that if the kernel does ever bump the C standard it uses, the behavior is consitent. Fixes: d6e65bb7ff0d ("ASoC: rt1011: Add RT1011 amplifier driver") Link: https://github.com/ClangBuiltLinux/linux/issues/506 Signed-off-by: Nathan Chancellor <natechancellor(a)gmail.com> --- sound/soc/codecs/rt1011.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/rt1011.c b/sound/soc/codecs/rt1011.c index 349d6db7ecd4..3a0ae80c5ee0 100644 --- a/sound/soc/codecs/rt1011.c +++ b/sound/soc/codecs/rt1011.c @@ -1288,7 +1288,7 @@ static int rt1011_r0_load_mode_put(struct snd_kcontrol *kcontrol, if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) { rt1011->r0_reg = ucontrol->value.integer.value[0]; - format = 2147483648; /* 2^24 * 128 */ + format = 2147483648U; /* 2^24 * 128 */ r0_integer = format / rt1011->r0_reg / 128; r0_factor = ((format / rt1011->r0_reg * 100) / 128) - (r0_integer * 100); @@ -2120,7 +2120,7 @@ static int rt1011_calibrate(struct rt1011_priv *rt1011, unsigned char cali_flag) dev_err(dev, "Calibrate R0 Failure\n"); ret = -EAGAIN; } else { - format = 2147483648; /* 2^24 * 128 */ + format = 2147483648U; /* 2^24 * 128 */ r0_integer = format / r0[0] / 128; r0_factor = ((format / r0[0] * 100) / 128) - (r0_integer * 100); -- 2.22.0.rc3

3 3

[alsa-devel] [PATCH] soundwire: intel: set dai min and max channels correctly
by Srinivas Kandagatla 06 Jun '19

06 Jun '19

Looks like there is a copy paste error. This patch fixes it! Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla(a)linaro.org> --- drivers/soundwire/intel.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/soundwire/intel.c b/drivers/soundwire/intel.c index 92be6ad84e8d..317873bc0555 100644 --- a/drivers/soundwire/intel.c +++ b/drivers/soundwire/intel.c @@ -721,8 +721,8 @@ static int intel_create_dai(struct sdw_cdns *cdns, return -ENOMEM; } - dais[i].playback.channels_min = 1; - dais[i].playback.channels_max = max_ch; + dais[i].capture.channels_min = 1; + dais[i].capture.channels_max = max_ch; dais[i].capture.rates = SNDRV_PCM_RATE_48000; dais[i].capture.formats = SNDRV_PCM_FMTBIT_S16_LE; } -- 2.21.0

2 1

[alsa-devel] [PATCH v2] soundwire: stream: fix bad unlock balance
by Srinivas Kandagatla 06 Jun '19

06 Jun '19

multi bank switching code takes lock on condition but releases without any check resulting in below warning. This patch fixes this. ===================================== WARNING: bad unlock balance detected! 5.1.0-16506-gc1c383a6f0a2-dirty #1523 Tainted: G W ------------------------------------- aplay/2954 is trying to release lock (&bus->msg_lock) at: do_bank_switch+0x21c/0x480 but there are no more locks to release! Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla(a)linaro.org> --- drivers/soundwire/stream.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/soundwire/stream.c b/drivers/soundwire/stream.c index ce9cb7fa4724..73c52cd4fec8 100644 --- a/drivers/soundwire/stream.c +++ b/drivers/soundwire/stream.c @@ -814,7 +814,8 @@ static int do_bank_switch(struct sdw_stream_runtime *stream) goto error; } - mutex_unlock(&bus->msg_lock); + if (bus->multi_link) + mutex_unlock(&bus->msg_lock); } return ret; -- 2.21.0

4 5

[alsa-devel] [PATCH] ASoC: msm8916-wcd-digital: Add sidetone support
by Srinivas Kandagatla 06 Jun '19

06 Jun '19

This patch adds sidetone support via one of the 3 RX Mix paths using IIR1 and IIR2. IIR1 can be feed by any Decimators or RX paths, and IIRx can also be looped back to RX mixers to provide sidetone functionality. Two IIR filters are used for Side tone equalization and each filter is 5 stage. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla(a)linaro.org> --- sound/soc/codecs/msm8916-wcd-digital.c | 353 +++++++++++++++++++++++++ 1 file changed, 353 insertions(+) diff --git a/sound/soc/codecs/msm8916-wcd-digital.c b/sound/soc/codecs/msm8916-wcd-digital.c index a63961861e55..ec00893ca92a 100644 --- a/sound/soc/codecs/msm8916-wcd-digital.c +++ b/sound/soc/codecs/msm8916-wcd-digital.c @@ -187,6 +187,43 @@ #define MSM8916_WCD_DIGITAL_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\ SNDRV_PCM_FMTBIT_S32_LE) +/* Codec supports 2 IIR filters */ +enum { + IIR1 = 0, + IIR2, + IIR_MAX, +}; + +/* Codec supports 5 bands */ +enum { + BAND1 = 0, + BAND2, + BAND3, + BAND4, + BAND5, + BAND_MAX, +}; + +#define WCD_IIR_FILTER_SIZE (sizeof(u32)*BAND_MAX) + +#define WCD_IIR_FILTER_CTL(xname, iidx, bidx) \ +{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ + .info = wcd_iir_filter_info, \ + .get = msm8x16_wcd_get_iir_band_audio_mixer, \ + .put = msm8x16_wcd_put_iir_band_audio_mixer, \ + .private_value = (unsigned long)&(struct wcd_iir_filter_ctl) { \ + .iir_idx = iidx, \ + .band_idx = bidx, \ + .bytes_ext = {.max = WCD_IIR_FILTER_SIZE, }, \ + } \ +} + +struct wcd_iir_filter_ctl { + unsigned int iir_idx; + unsigned int band_idx; + struct soc_bytes_ext bytes_ext; +}; + struct msm8916_wcd_digital_priv { struct clk *ahbclk, *mclk; }; @@ -298,6 +335,200 @@ static SOC_ENUM_SINGLE_DECL(rx2_dcb_cutoff_enum, LPASS_CDC_RX2_B4_CTL, 0, static SOC_ENUM_SINGLE_DECL(rx3_dcb_cutoff_enum, LPASS_CDC_RX3_B4_CTL, 0, dc_blocker_cutoff_text); +static int msm8x16_wcd_codec_set_iir_gain(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_component *component = + snd_soc_dapm_to_component(w->dapm); + int value = 0, reg = 0; + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + if (w->shift == 0) + reg = LPASS_CDC_IIR1_GAIN_B1_CTL; + else if (w->shift == 1) + reg = LPASS_CDC_IIR2_GAIN_B1_CTL; + value = snd_soc_component_read32(component, reg); + snd_soc_component_write(component, reg, value); + break; + default: + pr_err("%s: event = %d not expected\n", __func__, event); + } + return 0; +} + +static int msm8x16_wcd_get_iir_enable_audio_mixer( + struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = + snd_soc_kcontrol_component(kcontrol); + struct soc_mixer_control *mixer = + (struct soc_mixer_control *)kcontrol->private_value; + int iir_idx = mixer->reg; + int band_idx = mixer->shift; + + ucontrol->value.integer.value[0] = + (snd_soc_component_read32(component, + (LPASS_CDC_IIR1_CTL + 64 * iir_idx)) & + (1 << band_idx)) != 0; + + return 0; +} + +static int msm8x16_wcd_put_iir_enable_audio_mixer( + struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = + snd_soc_kcontrol_component(kcontrol); + struct soc_mixer_control *mixer = + (struct soc_mixer_control *)kcontrol->private_value; + int iir_idx = mixer->reg; + int band_idx = mixer->shift; + int value = ucontrol->value.integer.value[0]; + + /* Mask first 5 bits, 6-8 are reserved */ + snd_soc_component_update_bits(component, + (LPASS_CDC_IIR1_CTL + 64 * iir_idx), + (1 << band_idx), (value << band_idx)); + + return 0; +} + +static uint32_t get_iir_band_coeff(struct snd_soc_component *component, + int iir_idx, int band_idx, + int coeff_idx) +{ + uint32_t value = 0; + + /* Address does not automatically update if reading */ + snd_soc_component_write(component, + (LPASS_CDC_IIR1_COEF_B1_CTL + 64 * iir_idx), + ((band_idx * BAND_MAX + coeff_idx) + * sizeof(uint32_t)) & 0x7F); + + value |= snd_soc_component_read32(component, + (LPASS_CDC_IIR1_COEF_B2_CTL + 64 * iir_idx)); + + snd_soc_component_write(component, + (LPASS_CDC_IIR1_COEF_B1_CTL + 64 * iir_idx), + ((band_idx * BAND_MAX + coeff_idx) + * sizeof(uint32_t) + 1) & 0x7F); + + value |= (snd_soc_component_read32(component, + (LPASS_CDC_IIR1_COEF_B2_CTL + 64 * iir_idx)) << 8); + + snd_soc_component_write(component, + (LPASS_CDC_IIR1_COEF_B1_CTL + 64 * iir_idx), + ((band_idx * BAND_MAX + coeff_idx) + * sizeof(uint32_t) + 2) & 0x7F); + + value |= (snd_soc_component_read32(component, + (LPASS_CDC_IIR1_COEF_B2_CTL + 64 * iir_idx)) << 16); + + snd_soc_component_write(component, + (LPASS_CDC_IIR1_COEF_B1_CTL + 64 * iir_idx), + ((band_idx * BAND_MAX + coeff_idx) + * sizeof(uint32_t) + 3) & 0x7F); + + /* Mask bits top 2 bits since they are reserved */ + value |= ((snd_soc_component_read32(component, + (LPASS_CDC_IIR1_COEF_B2_CTL + 64 * iir_idx)) & 0x3f) << 24); + return value; + +} + +static int msm8x16_wcd_get_iir_band_audio_mixer( + struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + + struct snd_soc_component *component = + snd_soc_kcontrol_component(kcontrol); + struct wcd_iir_filter_ctl *ctl = + (struct wcd_iir_filter_ctl *)kcontrol->private_value; + struct soc_bytes_ext *params = &ctl->bytes_ext; + int iir_idx = ctl->iir_idx; + int band_idx = ctl->band_idx; + u32 coeff[BAND_MAX]; + + coeff[0] = get_iir_band_coeff(component, iir_idx, band_idx, 0); + coeff[1] = get_iir_band_coeff(component, iir_idx, band_idx, 1); + coeff[2] = get_iir_band_coeff(component, iir_idx, band_idx, 2); + coeff[3] = get_iir_band_coeff(component, iir_idx, band_idx, 3); + coeff[4] = get_iir_band_coeff(component, iir_idx, band_idx, 4); + + memcpy(ucontrol->value.bytes.data, &coeff[0], params->max); + + return 0; +} + +static void set_iir_band_coeff(struct snd_soc_component *component, + int iir_idx, int band_idx, + uint32_t value) +{ + snd_soc_component_write(component, + (LPASS_CDC_IIR1_COEF_B2_CTL + 64 * iir_idx), + (value & 0xFF)); + + snd_soc_component_write(component, + (LPASS_CDC_IIR1_COEF_B2_CTL + 64 * iir_idx), + (value >> 8) & 0xFF); + + snd_soc_component_write(component, + (LPASS_CDC_IIR1_COEF_B2_CTL + 64 * iir_idx), + (value >> 16) & 0xFF); + + /* Mask top 2 bits, 7-8 are reserved */ + snd_soc_component_write(component, + (LPASS_CDC_IIR1_COEF_B2_CTL + 64 * iir_idx), + (value >> 24) & 0x3F); +} + +static int msm8x16_wcd_put_iir_band_audio_mixer( + struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = + snd_soc_kcontrol_component(kcontrol); + struct wcd_iir_filter_ctl *ctl = + (struct wcd_iir_filter_ctl *)kcontrol->private_value; + struct soc_bytes_ext *params = &ctl->bytes_ext; + int iir_idx = ctl->iir_idx; + int band_idx = ctl->band_idx; + u32 coeff[BAND_MAX]; + + memcpy(&coeff[0], ucontrol->value.bytes.data, params->max); + + /* Mask top bit it is reserved */ + /* Updates addr automatically for each B2 write */ + snd_soc_component_write(component, + (LPASS_CDC_IIR1_COEF_B1_CTL + 64 * iir_idx), + (band_idx * BAND_MAX * sizeof(uint32_t)) & 0x7F); + + set_iir_band_coeff(component, iir_idx, band_idx, coeff[0]); + set_iir_band_coeff(component, iir_idx, band_idx, coeff[1]); + set_iir_band_coeff(component, iir_idx, band_idx, coeff[2]); + set_iir_band_coeff(component, iir_idx, band_idx, coeff[3]); + set_iir_band_coeff(component, iir_idx, band_idx, coeff[4]); + + return 0; +} + +static int wcd_iir_filter_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *ucontrol) +{ + struct wcd_iir_filter_ctl *ctl = + (struct wcd_iir_filter_ctl *)kcontrol->private_value; + struct soc_bytes_ext *params = &ctl->bytes_ext; + + ucontrol->type = SNDRV_CTL_ELEM_TYPE_BYTES; + ucontrol->count = params->max; + + return 0; +} + static const struct snd_kcontrol_new msm8916_wcd_digital_snd_controls[] = { SOC_SINGLE_S8_TLV("RX1 Digital Volume", LPASS_CDC_RX1_VOL_CTL_B2_CTL, -128, 127, digital_gain), @@ -322,6 +553,73 @@ static const struct snd_kcontrol_new msm8916_wcd_digital_snd_controls[] = { SOC_SINGLE("RX1 Mute Switch", LPASS_CDC_RX1_B6_CTL, 0, 1, 0), SOC_SINGLE("RX2 Mute Switch", LPASS_CDC_RX2_B6_CTL, 0, 1, 0), SOC_SINGLE("RX3 Mute Switch", LPASS_CDC_RX3_B6_CTL, 0, 1, 0), + + SOC_SINGLE_EXT("IIR1 Enable Band1", IIR1, BAND1, 1, 0, + msm8x16_wcd_get_iir_enable_audio_mixer, + msm8x16_wcd_put_iir_enable_audio_mixer), + SOC_SINGLE_EXT("IIR1 Enable Band2", IIR1, BAND2, 1, 0, + msm8x16_wcd_get_iir_enable_audio_mixer, + msm8x16_wcd_put_iir_enable_audio_mixer), + SOC_SINGLE_EXT("IIR1 Enable Band3", IIR1, BAND3, 1, 0, + msm8x16_wcd_get_iir_enable_audio_mixer, + msm8x16_wcd_put_iir_enable_audio_mixer), + SOC_SINGLE_EXT("IIR1 Enable Band4", IIR1, BAND4, 1, 0, + msm8x16_wcd_get_iir_enable_audio_mixer, + msm8x16_wcd_put_iir_enable_audio_mixer), + SOC_SINGLE_EXT("IIR1 Enable Band5", IIR1, BAND5, 1, 0, + msm8x16_wcd_get_iir_enable_audio_mixer, + msm8x16_wcd_put_iir_enable_audio_mixer), + SOC_SINGLE_EXT("IIR2 Enable Band1", IIR2, BAND1, 1, 0, + msm8x16_wcd_get_iir_enable_audio_mixer, + msm8x16_wcd_put_iir_enable_audio_mixer), + SOC_SINGLE_EXT("IIR2 Enable Band2", IIR2, BAND2, 1, 0, + msm8x16_wcd_get_iir_enable_audio_mixer, + msm8x16_wcd_put_iir_enable_audio_mixer), + SOC_SINGLE_EXT("IIR2 Enable Band3", IIR2, BAND3, 1, 0, + msm8x16_wcd_get_iir_enable_audio_mixer, + msm8x16_wcd_put_iir_enable_audio_mixer), + SOC_SINGLE_EXT("IIR2 Enable Band4", IIR2, BAND4, 1, 0, + msm8x16_wcd_get_iir_enable_audio_mixer, + msm8x16_wcd_put_iir_enable_audio_mixer), + SOC_SINGLE_EXT("IIR2 Enable Band5", IIR2, BAND5, 1, 0, + msm8x16_wcd_get_iir_enable_audio_mixer, + msm8x16_wcd_put_iir_enable_audio_mixer), + WCD_IIR_FILTER_CTL("IIR1 Band1", IIR1, BAND1), + WCD_IIR_FILTER_CTL("IIR1 Band2", IIR1, BAND2), + WCD_IIR_FILTER_CTL("IIR1 Band3", IIR1, BAND3), + WCD_IIR_FILTER_CTL("IIR1 Band4", IIR1, BAND4), + WCD_IIR_FILTER_CTL("IIR1 Band5", IIR1, BAND5), + WCD_IIR_FILTER_CTL("IIR2 Band1", IIR2, BAND1), + WCD_IIR_FILTER_CTL("IIR2 Band2", IIR2, BAND2), + WCD_IIR_FILTER_CTL("IIR2 Band3", IIR2, BAND3), + WCD_IIR_FILTER_CTL("IIR2 Band4", IIR2, BAND4), + WCD_IIR_FILTER_CTL("IIR2 Band5", IIR2, BAND5), + + SOC_SINGLE_SX_TLV("IIR1 INP1 Volume", + LPASS_CDC_IIR1_GAIN_B1_CTL, + 0, -84, 40, digital_gain), + SOC_SINGLE_SX_TLV("IIR1 INP2 Volume", + LPASS_CDC_IIR1_GAIN_B2_CTL, + 0, -84, 40, digital_gain), + SOC_SINGLE_SX_TLV("IIR1 INP3 Volume", + LPASS_CDC_IIR1_GAIN_B3_CTL, + 0, -84, 40, digital_gain), + SOC_SINGLE_SX_TLV("IIR1 INP4 Volume", + LPASS_CDC_IIR1_GAIN_B4_CTL, + 0, -84, 40, digital_gain), + SOC_SINGLE_SX_TLV("IIR2 INP1 Volume", + LPASS_CDC_IIR2_GAIN_B1_CTL, + 0, -84, 40, digital_gain), + SOC_SINGLE_SX_TLV("IIR2 INP2 Volume", + LPASS_CDC_IIR2_GAIN_B2_CTL, + 0, -84, 40, digital_gain), + SOC_SINGLE_SX_TLV("IIR2 INP3 Volume", + LPASS_CDC_IIR2_GAIN_B3_CTL, + 0, -84, 40, digital_gain), + SOC_SINGLE_SX_TLV("IIR2 INP4 Volume", + LPASS_CDC_IIR2_GAIN_B4_CTL, + 0, -84, 40, digital_gain), + }; static int msm8916_wcd_digital_enable_interpolator( @@ -448,6 +746,24 @@ static int msm8916_wcd_digital_enable_dmic(struct snd_soc_dapm_widget *w, return 0; } +static const char * const iir_inp1_text[] = { + "ZERO", "DEC1", "DEC2", "RX1", "RX2", "RX3" +}; + +static const struct soc_enum iir1_inp1_mux_enum = + SOC_ENUM_SINGLE(LPASS_CDC_CONN_EQ1_B1_CTL, + 0, 6, iir_inp1_text); + +static const struct soc_enum iir2_inp1_mux_enum = + SOC_ENUM_SINGLE(LPASS_CDC_CONN_EQ2_B1_CTL, + 0, 6, iir_inp1_text); + +static const struct snd_kcontrol_new iir1_inp1_mux = + SOC_DAPM_ENUM("IIR1 INP1 Mux", iir1_inp1_mux_enum); + +static const struct snd_kcontrol_new iir2_inp1_mux = + SOC_DAPM_ENUM("IIR2 INP1 Mux", iir2_inp1_mux_enum); + static const struct snd_soc_dapm_widget msm8916_wcd_digital_dapm_widgets[] = { /*RX stuff */ SND_SOC_DAPM_AIF_IN("I2S RX1", NULL, 0, SND_SOC_NOPM, 0, 0), @@ -534,6 +850,17 @@ static const struct snd_soc_dapm_widget msm8916_wcd_digital_dapm_widgets[] = { SND_SOC_DAPM_MIC("Digital Mic1", NULL), SND_SOC_DAPM_MIC("Digital Mic2", NULL), + + + /* Sidetone */ + SND_SOC_DAPM_MUX("IIR1 INP1 MUX", SND_SOC_NOPM, 0, 0, &iir1_inp1_mux), + SND_SOC_DAPM_PGA_E("IIR1", LPASS_CDC_CLK_SD_CTL, 0, 0, NULL, 0, + msm8x16_wcd_codec_set_iir_gain, SND_SOC_DAPM_POST_PMU), + + SND_SOC_DAPM_MUX("IIR2 INP1 MUX", SND_SOC_NOPM, 0, 0, &iir2_inp1_mux), + SND_SOC_DAPM_PGA_E("IIR2", LPASS_CDC_CLK_SD_CTL, 1, 0, NULL, 0, + msm8x16_wcd_codec_set_iir_gain, SND_SOC_DAPM_POST_PMU), + }; static int msm8916_wcd_digital_get_clks(struct platform_device *pdev, @@ -708,10 +1035,14 @@ static const struct snd_soc_dapm_route msm8916_wcd_digital_audio_map[] = { {"RX1 MIX1 INP1", "RX1", "I2S RX1"}, {"RX1 MIX1 INP1", "RX2", "I2S RX2"}, {"RX1 MIX1 INP1", "RX3", "I2S RX3"}, + {"RX1 MIX1 INP1", "IIR1", "IIR1"}, + {"RX1 MIX1 INP1", "IIR2", "IIR2"}, {"RX1 MIX1 INP2", "RX1", "I2S RX1"}, {"RX1 MIX1 INP2", "RX2", "I2S RX2"}, {"RX1 MIX1 INP2", "RX3", "I2S RX3"}, + {"RX1 MIX1 INP2", "IIR1", "IIR1"}, + {"RX1 MIX1 INP2", "IIR2", "IIR2"}, {"RX1 MIX1 INP3", "RX1", "I2S RX1"}, {"RX1 MIX1 INP3", "RX2", "I2S RX2"}, @@ -725,13 +1056,18 @@ static const struct snd_soc_dapm_route msm8916_wcd_digital_audio_map[] = { {"RX2 MIX1", NULL, "RX2 MIX1 INP2"}, {"RX2 MIX1", NULL, "RX2 MIX1 INP3"}, + {"RX2 MIX1 INP1", "RX1", "I2S RX1"}, {"RX2 MIX1 INP1", "RX2", "I2S RX2"}, {"RX2 MIX1 INP1", "RX3", "I2S RX3"}, + {"RX2 MIX1 INP1", "IIR1", "IIR1"}, + {"RX2 MIX1 INP1", "IIR2", "IIR2"}, {"RX2 MIX1 INP2", "RX1", "I2S RX1"}, {"RX2 MIX1 INP2", "RX2", "I2S RX2"}, {"RX2 MIX1 INP2", "RX3", "I2S RX3"}, + {"RX2 MIX1 INP1", "IIR1", "IIR1"}, + {"RX2 MIX1 INP1", "IIR2", "IIR2"}, {"RX2 MIX1 INP3", "RX1", "I2S RX1"}, {"RX2 MIX1 INP3", "RX2", "I2S RX2"}, @@ -748,10 +1084,27 @@ static const struct snd_soc_dapm_route msm8916_wcd_digital_audio_map[] = { {"RX3 MIX1 INP1", "RX1", "I2S RX1"}, {"RX3 MIX1 INP1", "RX2", "I2S RX2"}, {"RX3 MIX1 INP1", "RX3", "I2S RX3"}, + {"RX3 MIX1 INP1", "IIR1", "IIR1"}, + {"RX3 MIX1 INP1", "IIR2", "IIR2"}, {"RX3 MIX1 INP2", "RX1", "I2S RX1"}, {"RX3 MIX1 INP2", "RX2", "I2S RX2"}, {"RX3 MIX1 INP2", "RX3", "I2S RX3"}, + {"RX3 MIX1 INP2", "IIR1", "IIR1"}, + {"RX3 MIX1 INP2", "IIR2", "IIR2"}, + + {"RX1 MIX2 INP1", "IIR1", "IIR1"}, + {"RX2 MIX2 INP1", "IIR1", "IIR1"}, + {"RX1 MIX2 INP1", "IIR2", "IIR2"}, + {"RX2 MIX2 INP1", "IIR2", "IIR2"}, + + {"IIR1", NULL, "IIR1 INP1 MUX"}, + {"IIR1 INP1 MUX", "DEC1", "DEC1 MUX"}, + {"IIR1 INP1 MUX", "DEC2", "DEC2 MUX"}, + + {"IIR2", NULL, "IIR2 INP1 MUX"}, + {"IIR2 INP1 MUX", "DEC1", "DEC1 MUX"}, + {"IIR2 INP1 MUX", "DEC2", "DEC2 MUX"}, {"RX3 MIX1 INP3", "RX1", "I2S RX1"}, {"RX3 MIX1 INP3", "RX2", "I2S RX2"}, -- 2.21.0

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[alsa-devel] Sending DC offsets to an ALSA device: dangerous?
by Ser, Simon 06 Jun '19

06 Jun '19

Hi, I've been writing some audio HDMI/DisplayPort tests in the IGT test suite. As part of the tests I send 200ms DC offsets at 90% of the maximum amplitude. Do you know whether doing so is dangerous for some TV speakers? Would sending the same DC offsets at 25% of the max amplitude be better? Thanks, Simon Ser

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Re: [alsa-devel] [PATCH] ASoC: fsl_esai: fix the channel swap issue after xrun
by S.j. Wang 06 Jun '19

06 Jun '19

Hi > > > > > Sounds like a bug to me...should fix it first by marking the > > > > > data registers as volatile. > > > > > > > > > The ETDR is a writable register, it is not volatile. Even we > > > > change it to Volatile, I don't think we can't avoid this issue. > > > > for the regcache_sync Just to write this register, it is correct behavior. > > > > > > Is that so? Quoting the comments of regcache_sync(): > > > "* regcache_sync - Sync the register cache with the hardware. > > > * > > > * @map: map to configure. > > > * > > > * Any registers that should not be synced should be marked as > > > * volatile." > > > > > > If regcache_sync() does sync volatile registers too as you said, I > > > don't mind having this FIFO reset WAR for now, though I think this > > > mismatch between the comments and the actual behavior then should > get people's attention. > > > > > > Thank you > > > > ETDR is not volatile, if we mark it is volatile, is it correct? > > Well, you have a point -- it might not be ideally true, but it sounds like a > correct fix to me according to this comments. > > We can wait for Mark's comments or just send a patch to the mail list for > review. > > Thanks you I test this patch, we don't need to reset the FIFO, and regcache_sync didn't Write the ETDR even the EDTR is not volatile. This fault maybe caused by Legacy, in the beginning we add this patch in internal branch, there maybe Something cause this issue, but now can't reproduced. So I will remove the reset of FIFO. Best regards Wang Shengjiu

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[alsa-devel] [PATCH v4] ASoC: max98090: remove 24-bit format support if RJ is 0
by Yu-Hsuan Hsu 06 Jun '19

06 Jun '19

The supported formats are S16_LE and S24_LE now. However, by datasheet of max98090, S24_LE is only supported when it is in the right justified mode. We should remove 24-bit format if it is not in that mode to avoid triggering error. Signed-off-by: Yu-Hsuan Hsu <yuhsuan(a)chromium.org> --- Remove Change-Id. sound/soc/codecs/max98090.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/sound/soc/codecs/max98090.c b/sound/soc/codecs/max98090.c index 7619ea31ab50..ada8c25e643d 100644 --- a/sound/soc/codecs/max98090.c +++ b/sound/soc/codecs/max98090.c @@ -1909,6 +1909,21 @@ static int max98090_configure_dmic(struct max98090_priv *max98090, return 0; } +static int max98090_dai_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct snd_soc_component *component = dai->component; + struct max98090_priv *max98090 = snd_soc_component_get_drvdata(component); + unsigned int fmt = max98090->dai_fmt; + + /* Remove 24-bit format support if it is not in right justified mode. */ + if ((fmt & SND_SOC_DAIFMT_FORMAT_MASK) != SND_SOC_DAIFMT_RIGHT_J) { + substream->runtime->hw.formats = SNDRV_PCM_FMTBIT_S16_LE; + snd_pcm_hw_constraint_msbits(substream->runtime, 0, 16, 16); + } + return 0; +} + static int max98090_dai_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) @@ -2316,6 +2331,7 @@ EXPORT_SYMBOL_GPL(max98090_mic_detect); #define MAX98090_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE) static const struct snd_soc_dai_ops max98090_dai_ops = { + .startup = max98090_dai_startup, .set_sysclk = max98090_dai_set_sysclk, .set_fmt = max98090_dai_set_fmt, .set_tdm_slot = max98090_set_tdm_slot, -- 2.22.0.rc1.311.g5d7573a151-goog

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[alsa-devel] [PATCH v5 0/3] Fix jack detection for Chromebook Pixel
by Fletcher Woodruff 06 Jun '19

06 Jun '19

Headphone/mic jack detection doesn't work on the Chromebook Pixel 2015. This patch changes the irq implementation to support polarity flipping and fixes the configuration code so that correct GPIO pins are read from ACPI. With this series, plugging and unplugging the headphone jack switches between headphones and speakers automatically, and headset microphones are also detected. v5: - Fix void* parameter to devm_request_threaded_irq - Correct authorship for patch 2/3 v4: - Fix incorrect void* cast in rt5677_irq() v3: - Update commit message for patch 1/3 to clarify why we implement our own irq_chip. v2: - Split IRQ change into two patches: adding and fixing potential race - Change config reading code to try both DT and ACPI style names Ben Zhang (2): ASoC: rt5677: allow multiple interrupt sources ASoC: rt5677: handle concurrent interrupts Fletcher Woodruff (1): ASoC: rt5677: fall back to DT prop names on error sound/soc/codecs/rt5677.c | 346 ++++++++++++++++++++++++++------------ sound/soc/codecs/rt5677.h | 14 +- 2 files changed, 256 insertions(+), 104 deletions(-) -- 2.21.0.1020.gf2820cf01a-goog

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[alsa-devel] [PATCH 1/6] device property: Add new array helper
by Charles Keepax 05 Jun '19

05 Jun '19

It is fairly common to want to read an integer array property that is composed of an unknown number of fixed size integer groups. For example, say each group consists of three values which correspond to the settings for one input on the device and the driver supports several chips with different numbers of inputs. Add a new helper function to provide this functionality, it differs for the existing helpers in that it allows reading a smaller number of values than the full array size and checks that the number of values read is a multiple of the group size. Signed-off-by: Charles Keepax <ckeepax(a)opensource.cirrus.com> --- drivers/base/property.c | 48 ++++++++++++++++++++++++++++++++++++++++++++++++ include/linux/property.h | 2 ++ 2 files changed, 50 insertions(+) diff --git a/drivers/base/property.c b/drivers/base/property.c index 348b37e64944c..656d21e01a648 100644 --- a/drivers/base/property.c +++ b/drivers/base/property.c @@ -133,6 +133,54 @@ int device_property_read_u32_array(struct device *dev, const char *propname, EXPORT_SYMBOL_GPL(device_property_read_u32_array); /** + * device_property_read_u32_2darray - return a 2d u32 array property of a device + * @dev: Device to get the property of + * @propname: Name of the property + * @val: The values are stored here or %NULL to return the number of values + * @nval: Size of the @val array + * @multiple: Number of entries in each block of data + * + * Function reads an array of u32 properties split up into fixed size + * sub-groups, with @propname from the device firmware description and + * stores them to @val if found. + * + * Return: Number of values read + * %0 if the property was not found, + * %-EINVAL if given arguments are not valid, + * %-ENODATA if the property does not have a value, + * %-EPROTO if the property is not an array of numbers, + * %-EOVERFLOW if the size of the property is not as expected. + * %-ENXIO if no suitable firmware interface is present. + */ +int device_property_read_u32_2darray(struct device *dev, const char *propname, + u32 *val, size_t nval, int multiple) +{ + int n, ret; + + n = device_property_read_u32_array(dev, propname, NULL, 0); + if (n == -EINVAL) { + return 0; /* missing, ignore */ + } else if (n < 0) { + dev_warn(dev, "%s malformed (%d)\n", propname, n); + return n; + } else if ((n % multiple) != 0) { + dev_warn(dev, "%s not a multiple of %d entries\n", + propname, multiple); + return -EOVERFLOW; + } + + if (n > nval) + n = nval; + + ret = device_property_read_u32_array(dev, propname, val, n); + if (ret < 0) + return ret; + else + return n; +} +EXPORT_SYMBOL_GPL(device_property_read_u32_2darray); + +/** * device_property_read_u64_array - return a u64 array property of a device * @dev: Device to get the property of * @propname: Name of the property diff --git a/include/linux/property.h b/include/linux/property.h index a29369c89e6ef..854867f0d139f 100644 --- a/include/linux/property.h +++ b/include/linux/property.h @@ -43,6 +43,8 @@ int device_property_read_u16_array(struct device *dev, const char *propname, u16 *val, size_t nval); int device_property_read_u32_array(struct device *dev, const char *propname, u32 *val, size_t nval); +int device_property_read_u32_2darray(struct device *dev, const char *propname, + u32 *val, size_t nval, int multiple); int device_property_read_u64_array(struct device *dev, const char *propname, u64 *val, size_t nval); int device_property_read_string_array(struct device *dev, const char *propname, -- 2.11.0

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