December 2019 - Alsa-devel - mailman.alsa-project.org

Re: [alsa-devel] [PATCH v3 03/15] soc: tegra: Add Tegra PMC clock registrations into PMC driver
by Dmitry Osipenko 09 Dec '19

09 Dec '19

08.12.2019 00:36, Sowjanya Komatineni пишет: > > On 12/7/19 11:59 AM, Sowjanya Komatineni wrote: >> >> On 12/7/19 8:00 AM, Dmitry Osipenko wrote: >>> 07.12.2019 18:53, Dmitry Osipenko пишет: >>>> 07.12.2019 18:47, Dmitry Osipenko пишет: >>>>> 07.12.2019 17:28, Dmitry Osipenko пишет: >>>>>> 06.12.2019 05:48, Sowjanya Komatineni пишет: >>>>>>> Tegra210 and prior Tegra PMC has clk_out_1, clk_out_2, clk_out_3 >>>>>>> with >>>>>>> mux and gate for each of these clocks. >>>>>>> >>>>>>> Currently these PMC clocks are registered by Tegra clock driver >>>>>>> using >>>>>>> clk_register_mux and clk_register_gate by passing PMC base address >>>>>>> and register offsets and PMC programming for these clocks happens >>>>>>> through direct PMC access by the clock driver. >>>>>>> >>>>>>> With this, when PMC is in secure mode any direct PMC access from the >>>>>>> non-secure world does not go through and these clocks will not be >>>>>>> functional. >>>>>>> >>>>>>> This patch adds these clocks registration with PMC as a clock >>>>>>> provider >>>>>>> for these clocks. clk_ops callback implementations for these clocks >>>>>>> uses tegra_pmc_readl and tegra_pmc_writel which supports PMC >>>>>>> programming >>>>>>> in secure mode and non-secure mode. >>>>>>> >>>>>>> Signed-off-by: Sowjanya Komatineni <skomatineni(a)nvidia.com> >>>>>>> --- >>>>> [snip] >>>>> >>>>>>> + >>>>>>> +static const struct clk_ops pmc_clk_gate_ops = { >>>>>>> + .is_enabled = pmc_clk_is_enabled, >>>>>>> + .enable = pmc_clk_enable, >>>>>>> + .disable = pmc_clk_disable, >>>>>>> +}; >>>>>> What's the benefit of separating GATE from the MUX? >>>>>> >>>>>> I think it could be a single clock. >>>>> According to TRM: >>>>> >>>>> 1. GATE and MUX are separate entities. >>>>> >>>>> 2. GATE is the parent of MUX (see PMC's CLK_OUT paths diagram in TRM). >>>>> >>>>> 3. PMC doesn't gate EXTPERIPH clock but could "force-enable" it, >>>>> correct? > > Was following existing clk-tegra-pmc as I am not sure of reason for > having these clocks registered as separate mux and gate clocks. > > Yes, PMC clocks can be registered as single clock and can use clk_ops > for set/get parent and enable/disable. > > enable/disable of PMC clocks is for force-enable to force the clock to > run regardless of ACCEPT_REQ or INVERT_REQ. > >>>> 4. clk_m_div2/4 are internal PMC OSC dividers and thus these clocks >>>> should belong to PMC. >>> Also, it should be "osc" and not "clk_m". >> >> I followed the same parents as it were in existing clk-tegra-pmc driver. >> >> Yeah they are wrong and they should be from osc and not clk_m. >> >> Will fix in next version. >> Could you please describe the full EXTPERIPH clock topology and how the pinmux configuration is related to it all? What is internal to the Tegra chip and what are the external outputs? Is it possible to bypass PMC on T30+ for the EXTPERIPH clocks?

1 0

Re: [alsa-devel] [PATCH v3 08/15] ASoC: tegra: Add audio mclk control through clk_out_1 and extern1
by Dmitry Osipenko 09 Dec '19

09 Dec '19

07.12.2019 22:20, Sowjanya Komatineni пишет: > > On 12/7/19 6:58 AM, Dmitry Osipenko wrote: >> 06.12.2019 05:48, Sowjanya Komatineni пишет: >>> Current ASoC driver uses extern1 as cdev1 clock from Tegra30 onwards >>> through device tree. >>> >>> Actual audio mclk is clk_out_1 and to use PLLA for mclk rate control, >>> need to clk_out_1_mux parent to extern1 and extern1 parent to PLLA_OUT0. >>> >>> Currently Tegra clock driver init sets the parents and enables both >>> clk_out_1 and extern1 clocks. But these clocks parent and enables should >>> be controlled by ASoC driver. >>> >>> Clock parents can be specified in device tree using assigned-clocks >>> and assigned-clock-parents. >>> >>> To enable audio mclk, both clk_out_1 and extern1 clocks need to be >>> enabled. >>> >>> This patch configures parents for clk_out_1 and extern1 clocks if device >>> tree does not specify clock parents inorder to support old device tree >>> and controls mclk using both clk_out_1 and extern1 clocks. >>> >>> Signed-off-by: Sowjanya Komatineni <skomatineni(a)nvidia.com> >>> --- >>> sound/soc/tegra/tegra_asoc_utils.c | 66 >>> ++++++++++++++++++++++++++++++++++++++ >>> sound/soc/tegra/tegra_asoc_utils.h | 1 + >>> 2 files changed, 67 insertions(+) >>> >>> diff --git a/sound/soc/tegra/tegra_asoc_utils.c >>> b/sound/soc/tegra/tegra_asoc_utils.c >>> index 536a578e9512..8e3a3740df7c 100644 >>> --- a/sound/soc/tegra/tegra_asoc_utils.c >>> +++ b/sound/soc/tegra/tegra_asoc_utils.c >>> @@ -60,6 +60,7 @@ int tegra_asoc_utils_set_rate(struct >>> tegra_asoc_utils_data *data, int srate, >>> data->set_mclk = 0; >>> clk_disable_unprepare(data->clk_cdev1); >>> + clk_disable_unprepare(data->clk_extern1); >>> clk_disable_unprepare(data->clk_pll_a_out0); >>> clk_disable_unprepare(data->clk_pll_a); >>> @@ -89,6 +90,14 @@ int tegra_asoc_utils_set_rate(struct >>> tegra_asoc_utils_data *data, int srate, >>> return err; >>> } >>> + if (!IS_ERR_OR_NULL(data->clk_extern1)) { >>> + err = clk_prepare_enable(data->clk_extern1); >>> + if (err) { >>> + dev_err(data->dev, "Can't enable extern1: %d\n", err); >>> + return err; >>> + } >>> + } >>> + >>> err = clk_prepare_enable(data->clk_cdev1); >>> if (err) { >>> dev_err(data->dev, "Can't enable cdev1: %d\n", err); >>> @@ -109,6 +118,7 @@ int tegra_asoc_utils_set_ac97_rate(struct >>> tegra_asoc_utils_data *data) >>> int err; >>> clk_disable_unprepare(data->clk_cdev1); >>> + clk_disable_unprepare(data->clk_extern1); >>> clk_disable_unprepare(data->clk_pll_a_out0); >>> clk_disable_unprepare(data->clk_pll_a); >>> @@ -142,6 +152,14 @@ int tegra_asoc_utils_set_ac97_rate(struct >>> tegra_asoc_utils_data *data) >>> return err; >>> } >>> + if (!IS_ERR_OR_NULL(data->clk_extern1)) { >>> + err = clk_prepare_enable(data->clk_extern1); >>> + if (err) { >>> + dev_err(data->dev, "Can't enable extern1: %d\n", err); >>> + return err; >>> + } >>> + } >> Why this is needed given that clk_extern1 is either a child of MCLK or >> MCLK itself (on T20)? The child clocks are enabled when the parent is >> enabled. > > For T30 and later, clk_extern1 is one of the source for clk_out_1_mux. > clk_extern1 is in CAR and it has its own gate and mux. > > As audio mclk related clocks (clk_out_1, clk_out_1_mux, and extern1) are > moved into ASoC driver from clock driver > > need to enable extern1 gate as well along with clk_out1 for T30 through > T210. > > Just FYI, extern1 enable here happens only when data->clk_extern1 is > available which is for T30 onwards. clk_out_1 is the parent of extern1, thus extern1 is enabled by the clk core whenever clk_out_1 is enabled because data->clk_cdev1=clk_out_1. An I missing something? [snip]

1 0

[alsa-devel] [PATCH] ASoC: core: only flush inited work during free
by Curtis Malainey 09 Dec '19

09 Dec '19

There are many paths to soc_free_pcm_runtime which can both have and have not yet inited the workqueue yet. When we flush the queue when we have not yet inited the queue we cause warnings to be printed. An example is soc_cleanup_card_resources which is called by snd_soc_bind_card which has multiple failure points before and after soc_link_init -> soc_new_pcm which is where the queue is inited. Signed-off-by: Curtis Malainey <cujomalainey(a)chromium.org> --- sound/soc/soc-core.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c index 062653ab03a37..3bf702b874a6d 100644 --- a/sound/soc/soc-core.c +++ b/sound/soc/soc-core.c @@ -419,7 +419,8 @@ static void soc_free_pcm_runtime(struct snd_soc_pcm_runtime *rtd) list_del(&rtd->list); - flush_delayed_work(&rtd->delayed_work); + if (delayed_work_pending(&rtd->delayed_work)) + flush_delayed_work(&rtd->delayed_work); snd_soc_pcm_component_free(rtd); /* -- 2.24.0.393.g34dc348eaf-goog

4 6

[alsa-devel] [PATCH 0/3] ASoC: Intel: sof_rt5682: add TigerLake support
by Pierre-Louis Bossart 09 Dec '19

09 Dec '19

This patchset extends the existing machine driver to support TigerLake, the main change being for HDMI streams (4 instead of 3). Sathyanarayana Nujella (3): ASoC: intel: sof_rt5682: Add quirk for number of HDMI DAI's ASoC: intel: sof_rt5682: Add support for tgl-max98357a-rt5682 ASoC: Intel: common: Add mach table for tgl-max98357a-rt5682 sound/soc/intel/boards/sof_rt5682.c | 34 +++++++++++++++++-- .../intel/common/soc-acpi-intel-tgl-match.c | 13 +++++++ 2 files changed, 44 insertions(+), 3 deletions(-) -- 2.20.1

2 6

[alsa-devel] [PATCH 0/3] ASoC: Intel: SOF: use common HDMI driver
by Pierre-Louis Bossart 09 Dec '19

09 Dec '19

By default make sure all SOF-based solutions use the common HDMI driver. The hdac_hdmi solution is only supported for devices based on the SST driver. This change was merged two weeks ago in the SOF tree and no regressions were observed. Kai Vehmanen (3): ASoC: SOF: Intel: make common HDMI driver default ASoC: Intel: boards: make common HDMI driver the default for SOF ASoC: hdac_hdmi: Drop support for Icelake sound/soc/codecs/hdac_hdmi.c | 63 +++++----------------------------- sound/soc/intel/boards/Kconfig | 5 +++ sound/soc/sof/intel/Kconfig | 1 + 3 files changed, 15 insertions(+), 54 deletions(-) -- 2.20.1

2 6

[alsa-devel] [PATCH v2 0/2] ASoC: mediatek: common: refine mtk_afe_fe_hw_params
by Eason Yen 09 Dec '19

09 Dec '19

This patch is to add more helpers to control mtk_memif dma_address/format/pbuf_size And refine hw_params and hw_prepare by these helpers. v2 changes: split patch v1 to two seprated patches for different purpose. v1 changes: 1. patchwork list: https://mailman.alsa-project.org/pipermail/alsa-devel/2019-November/158394.… Eason Yen (2): ASoC: mediatek: common: add some helpers to control mtk_memif ASoC: mediatek: common: refine hw_params and hw_prepare sound/soc/mediatek/common/mtk-afe-fe-dai.c | 359 +++++++++++++++++++++++------ sound/soc/mediatek/common/mtk-afe-fe-dai.h | 16 ++ sound/soc/mediatek/common/mtk-base-afe.h | 28 ++- 3 files changed, 336 insertions(+), 67 deletions(-) -- 1.9.1

2 4

[alsa-devel] [PATCH] ASoC: tlv320aic31xx: Add HP output driver pop reduction controls
by Nikita Yushchenko 09 Dec '19

09 Dec '19

HP output driver has two parameters that can be configured to reduce pop noise: power-on delay and ramp-up step time. Two new kcontrols have been added to set these parameters. Signed-off-by: Nikita Yushchenko <nikita.yoush(a)cogentembedded.com> --- sound/soc/codecs/tlv320aic31xx.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/sound/soc/codecs/tlv320aic31xx.c b/sound/soc/codecs/tlv320aic31xx.c index 67323188afd2..740e75032f36 100644 --- a/sound/soc/codecs/tlv320aic31xx.c +++ b/sound/soc/codecs/tlv320aic31xx.c @@ -263,6 +263,19 @@ static SOC_ENUM_SINGLE_DECL(cm_m_enum, AIC31XX_MICPGAMI, 6, mic_select_text); static SOC_ENUM_SINGLE_DECL(mic1lm_m_enum, AIC31XX_MICPGAMI, 4, mic_select_text); +static const char * const hp_poweron_time_text[] = { + "0us", "15.3us", "153us", "1.53ms", "15.3ms", "76.2ms", + "153ms", "304ms", "610ms", "1.22s", "3.04s", "6.1s" }; + +static SOC_ENUM_SINGLE_DECL(hp_poweron_time_enum, AIC31XX_HPPOP, 3, + hp_poweron_time_text); + +static const char * const hp_rampup_step_text[] = { + "0ms", "0.98ms", "1.95ms", "3.9ms" }; + +static SOC_ENUM_SINGLE_DECL(hp_rampup_step_enum, AIC31XX_HPPOP, 1, + hp_rampup_step_text); + static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -6350, 50, 0); static const DECLARE_TLV_DB_SCALE(adc_fgain_tlv, 0, 10, 0); static const DECLARE_TLV_DB_SCALE(adc_cgain_tlv, -2000, 50, 0); @@ -286,6 +299,9 @@ static const struct snd_kcontrol_new common31xx_snd_controls[] = { SOC_DOUBLE_R_TLV("HP Analog Playback Volume", AIC31XX_LANALOGHPL, AIC31XX_RANALOGHPR, 0, 0x7F, 1, hp_vol_tlv), + + SOC_ENUM("HP Output Driver Power-On time", hp_poweron_time_enum), + SOC_ENUM("HP Output Driver Ramp-up step", hp_rampup_step_enum), }; static const struct snd_kcontrol_new aic31xx_snd_controls[] = { -- 2.20.1

2 5

[alsa-devel] [PATCH] ASoC: fsl_sai: add IRQF_SHARED
by Michael Walle 09 Dec '19

09 Dec '19

The LS1028A SoC uses the same interrupt line for adjacent SAIs. Use IRQF_SHARED to be able to use these SAIs simultaneously. Signed-off-by: Michael Walle <michael(a)walle.cc> --- sound/soc/fsl/fsl_sai.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c index b517e4bc1b87..8c3ea7300972 100644 --- a/sound/soc/fsl/fsl_sai.c +++ b/sound/soc/fsl/fsl_sai.c @@ -958,7 +958,8 @@ static int fsl_sai_probe(struct platform_device *pdev) if (irq < 0) return irq; - ret = devm_request_irq(&pdev->dev, irq, fsl_sai_isr, 0, np->name, sai); + ret = devm_request_irq(&pdev->dev, irq, fsl_sai_isr, IRQF_SHARED, + np->name, sai); if (ret) { dev_err(&pdev->dev, "failed to claim irq %u\n", irq); return ret; -- 2.20.1

5 6

[alsa-devel] [PATCH] ASoC: tlv320aic31xx: Add Volume Soft Stepping control
by Nikita Yushchenko 09 Dec '19

09 Dec '19

Chip supports soft stepping of volume changes and it is enabled by default. This patch adds a control for it, so it could be either made slower (two sample periods per step instead of one), or disabled. Signed-off-by: Nikita Yushchenko <nikita.yoush(a)cogentembedded.com> --- sound/soc/codecs/tlv320aic31xx.c | 8 ++++++++ sound/soc/codecs/tlv320aic31xx.h | 3 --- 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/tlv320aic31xx.c b/sound/soc/codecs/tlv320aic31xx.c index d6c462f21370..31daa60695bd 100644 --- a/sound/soc/codecs/tlv320aic31xx.c +++ b/sound/soc/codecs/tlv320aic31xx.c @@ -275,6 +275,12 @@ static const char * const hp_rampup_step_text[] = { static SOC_ENUM_SINGLE_DECL(hp_rampup_step_enum, AIC31XX_HPPOP, 1, hp_rampup_step_text); +static const char * const vol_soft_step_mode_text[] = { + "fast", "slow", "disabled" }; + +static SOC_ENUM_SINGLE_DECL(vol_soft_step_mode_enum, AIC31XX_DACSETUP, 0, + vol_soft_step_mode_text); + static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -6350, 50, 0); static const DECLARE_TLV_DB_SCALE(adc_fgain_tlv, 0, 10, 0); static const DECLARE_TLV_DB_SCALE(adc_cgain_tlv, -2000, 50, 0); @@ -306,6 +312,8 @@ static const struct snd_kcontrol_new common31xx_snd_controls[] = { */ SOC_ENUM("HP Output Driver Power-On time", hp_poweron_time_enum), SOC_ENUM("HP Output Driver Ramp-up step", hp_rampup_step_enum), + + SOC_ENUM("Volume Soft Stepping", vol_soft_step_mode_enum), }; static const struct snd_kcontrol_new aic31xx_snd_controls[] = { diff --git a/sound/soc/codecs/tlv320aic31xx.h b/sound/soc/codecs/tlv320aic31xx.h index 83a8c7604cc3..0523884cee74 100644 --- a/sound/soc/codecs/tlv320aic31xx.h +++ b/sound/soc/codecs/tlv320aic31xx.h @@ -218,9 +218,6 @@ struct aic31xx_pdata { #define AIC31XX_GPIO1_ADC_MOD_CLK 0x10 #define AIC31XX_GPIO1_SDOUT 0x11 -/* AIC31XX_DACSETUP */ -#define AIC31XX_SOFTSTEP_MASK GENMASK(1, 0) - /* AIC31XX_DACMUTE */ #define AIC31XX_DACMUTE_MASK GENMASK(3, 2) -- 2.20.1

2 1

[alsa-devel] [PATCH] ASoC: rsnd: Calculate DALIGN inversion at run-time
by Geert Uytterhoeven 09 Dec '19

09 Dec '19

There is no need to store the inverted DALIGN values in the table, as they can easily be calculated at run-time. This also protects against the introduction of inconsistencies between normal and inverted values by a future table modification. Reorder the two subexpressions in the AND check, to perform the least expensive check first. Signed-off-by: Geert Uytterhoeven <geert+renesas(a)glider.be> --- Compile-tested only. Interestingly, this decreases code size on arm64, but increases on arm32 (both gcc version 7.4.0 (Ubuntu/Linaro 7.4.0-1ubuntu1~18.04.1)). arm32: text data bss dec hex filename 16186 276 84 16546 40a2 sound/soc/sh/rcar/core.o.orig 16194 276 84 16554 40aa sound/soc/sh/rcar/core.o arm64: text data bss dec hex filename 17426 392 104 17922 4602 sound/soc/sh/rcar/core.o.orig 17414 392 104 17910 45f6 sound/soc/sh/rcar/core.o --- sound/soc/sh/rcar/core.c | 31 +++++++++++++------------------ 1 file changed, 13 insertions(+), 18 deletions(-) diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c index 399dc6e9bde5b042..d20f03dfdee66643 100644 --- a/sound/soc/sh/rcar/core.c +++ b/sound/soc/sh/rcar/core.c @@ -376,20 +376,15 @@ u32 rsnd_get_adinr_bit(struct rsnd_mod *mod, struct rsnd_dai_stream *io) */ u32 rsnd_get_dalign(struct rsnd_mod *mod, struct rsnd_dai_stream *io) { - static const u32 dalign_values[8][2] = { - {0x76543210, 0x67452301}, - {0x00000032, 0x00000023}, - {0x00007654, 0x00006745}, - {0x00000076, 0x00000067}, - {0xfedcba98, 0xefcdab89}, - {0x000000ba, 0x000000ab}, - {0x0000fedc, 0x0000efcd}, - {0x000000fe, 0x000000ef}, + static const u32 dalign_values[8] = { + 0x76543210, 0x00000032, 0x00007654, 0x00000076, + 0xfedcba98, 0x000000ba, 0x0000fedc, 0x000000fe, }; - int id = 0, inv; + int id = 0; struct rsnd_mod *ssiu = rsnd_io_to_mod_ssiu(io); struct rsnd_mod *target; struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io); + u32 dalign; /* * *Hardware* L/R and *Software* L/R are inverted for 16bit data. @@ -425,15 +420,15 @@ u32 rsnd_get_dalign(struct rsnd_mod *mod, struct rsnd_dai_stream *io) if (mod == ssiu) id = rsnd_mod_id_sub(mod); - /* Non target mod or non 16bit needs normal DALIGN */ - if ((snd_pcm_format_width(runtime->format) != 16) || - (mod != target)) - inv = 0; - /* Target mod needs inverted DALIGN when 16bit */ - else - inv = 1; + dalign = dalign_values[id]; + + if (mod == target && snd_pcm_format_width(runtime->format) == 16) { + /* Target mod needs inverted DALIGN when 16bit */ + dalign = (dalign & 0xf0f0f0f0) >> 4 | + (dalign & 0x0f0f0f0f) << 4; + } - return dalign_values[id][inv]; + return dalign; } u32 rsnd_get_busif_shift(struct rsnd_dai_stream *io, struct rsnd_mod *mod) -- 2.17.1

4 3