August 2018 - Alsa-devel - mailman.alsa-project.org

[alsa-devel] [PATCH] ALSA: usb: Mark expected switch fall-through
by Gustavo A. R. Silva 01 Aug '18

01 Aug '18

In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. Addresses-Coverity-ID: 115084 ("Missing break in switch") Signed-off-by: Gustavo A. R. Silva <gustavo(a)embeddedor.com> --- sound/usb/pcm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/usb/pcm.c b/sound/usb/pcm.c index bbc7116..3828471 100644 --- a/sound/usb/pcm.c +++ b/sound/usb/pcm.c @@ -1694,6 +1694,7 @@ static int snd_usb_substream_playback_trigger(struct snd_pcm_substream *substrea switch (cmd) { case SNDRV_PCM_TRIGGER_START: subs->trigger_tstamp_pending_update = true; + /* fall through */ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: subs->data_endpoint->prepare_data_urb = prepare_playback_urb; subs->data_endpoint->retire_data_urb = retire_playback_urb; -- 2.7.4

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[alsa-devel] [RESEND][PATCH] ASoC: Intel: Power down links before turning off display audio power
by Sriram Periyasamy 01 Aug '18

01 Aug '18

On certain platforms, Display HDMI HDA codec was not going to sleep state after the use when links are powered down after turning off the display power. As per the HW recommendation, links are powered down before turning off the display power to ensure that the codec goes to sleep state. Signed-off-by: Sriram Periyasamy <sriramx.periyasamy(a)intel.com> Signed-off-by: Sanyog Kale <sanyog.r.kale(a)intel.com> --- sound/soc/codecs/hdac_hdmi.c | 12 +++++------- sound/soc/intel/skylake/skl.c | 11 ++++++----- 2 files changed, 11 insertions(+), 12 deletions(-) diff --git a/sound/soc/codecs/hdac_hdmi.c b/sound/soc/codecs/hdac_hdmi.c index 0cdceca2b216..c98c4c2babc9 100644 --- a/sound/soc/codecs/hdac_hdmi.c +++ b/sound/soc/codecs/hdac_hdmi.c @@ -2235,12 +2235,6 @@ static int hdac_hdmi_runtime_suspend(struct device *dev) */ snd_hdac_codec_read(hdev, hdev->afg, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D3); - err = snd_hdac_display_power(bus, false); - if (err < 0) { - dev_err(bus->dev, "Cannot turn on display power on i915\n"); - return err; - } - hlink = snd_hdac_ext_bus_get_link(ebus, dev_name(dev)); if (!hlink) { dev_err(dev, "hdac link not found\n"); @@ -2249,7 +2243,11 @@ static int hdac_hdmi_runtime_suspend(struct device *dev) snd_hdac_ext_bus_link_put(ebus, hlink); - return 0; + err = snd_hdac_display_power(bus, false); + if (err < 0) + dev_err(bus->dev, "Cannot turn off display power on i915\n"); + + return err; } static int hdac_hdmi_runtime_resume(struct device *dev) diff --git a/sound/soc/intel/skylake/skl.c b/sound/soc/intel/skylake/skl.c index 670ff9aaca55..c62e474717ff 100644 --- a/sound/soc/intel/skylake/skl.c +++ b/sound/soc/intel/skylake/skl.c @@ -762,6 +762,12 @@ static void skl_probe_work(struct work_struct *work) } } + /* + * we are done probing so decrement link counts + */ + list_for_each_entry(hlink, &ebus->hlink_list, list) + snd_hdac_ext_bus_link_put(ebus, hlink); + if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI)) { err = snd_hdac_display_power(bus, false); if (err < 0) { @@ -771,11 +777,6 @@ static void skl_probe_work(struct work_struct *work) } } - /* - * we are done probing so decrement link counts - */ - list_for_each_entry(hlink, &ebus->hlink_list, list) - snd_hdac_ext_bus_link_put(ebus, hlink); /* configure PM */ pm_runtime_put_noidle(bus->dev); -- 2.7.4

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[alsa-devel] [PATCH 4.14 211/246] ASoC: topology: Add missing clock gating parameter when parsing hw_configs
by Greg Kroah-Hartman 01 Aug '18

01 Aug '18

4.14-stable review patch. If anyone has any objections, please let me know. ------------------ From: Kirill Marinushkin <k.marinushkin(a)gmail.com> [ Upstream commit 933e1c4a667103c4d10ebdc9505a0a6abd8c3fbd ] Clock gating parameter is a part of `dai_fmt`. It is supported by `alsa-lib` when creating a topology binary file, but ignored by kernel when loading this topology file. After applying this commit, the clock gating parameter is not ignored any more. This solution is backwards compatible. The existing behaviour is not broken, because by default the parameter value is 0 and is ignored. snd_soc_tplg_hw_config.clock_gated = 0 => no effect snd_soc_tplg_hw_config.clock_gated = 1 => SND_SOC_DAIFMT_GATED snd_soc_tplg_hw_config.clock_gated = 2 => SND_SOC_DAIFMT_CONT For example, the following config, based on alsa-lib/src/conf/topology/broadwell/broadwell.conf, is now supported: ~~~~ SectionHWConfig."CodecHWConfig" { id "1" format "I2S" # physical audio format. pm_gate_clocks "true" # clock can be gated } SectionLink."Codec" { # used for binding to the physical link id "0" hw_configs [ "CodecHWConfig" ] default_hw_conf_id "1" } ~~~~ Signed-off-by: Kirill Marinushkin <k.marinushkin(a)gmail.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Cc: Jaroslav Kysela <perex(a)perex.cz> Cc: Takashi Iwai <tiwai(a)suse.de> Cc: Mark Brown <broonie(a)kernel.org> Cc: Pan Xiuli <xiuli.pan(a)linux.intel.com> Cc: Liam Girdwood <liam.r.girdwood(a)linux.intel.com> Cc: linux-kernel(a)vger.kernel.org Cc: alsa-devel(a)alsa-project.org Signed-off-by: Mark Brown <broonie(a)kernel.org> Signed-off-by: Sasha Levin <alexander.levin(a)microsoft.com> Signed-off-by: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> --- include/uapi/sound/asoc.h | 7 ++++++- sound/soc/soc-topology.c | 7 +++++++ 2 files changed, 13 insertions(+), 1 deletion(-) --- a/include/uapi/sound/asoc.h +++ b/include/uapi/sound/asoc.h @@ -139,6 +139,11 @@ #define SND_SOC_TPLG_DAI_FLGBIT_SYMMETRIC_CHANNELS (1 << 1) #define SND_SOC_TPLG_DAI_FLGBIT_SYMMETRIC_SAMPLEBITS (1 << 2) +/* DAI clock gating */ +#define SND_SOC_TPLG_DAI_CLK_GATE_UNDEFINED 0 +#define SND_SOC_TPLG_DAI_CLK_GATE_GATED 1 +#define SND_SOC_TPLG_DAI_CLK_GATE_CONT 2 + /* DAI physical PCM data formats. * Add new formats to the end of the list. */ @@ -324,7 +329,7 @@ struct snd_soc_tplg_hw_config { __le32 size; /* in bytes of this structure */ __le32 id; /* unique ID - - used to match */ __le32 fmt; /* SND_SOC_DAI_FORMAT_ format value */ - __u8 clock_gated; /* 1 if clock can be gated to save power */ + __u8 clock_gated; /* SND_SOC_TPLG_DAI_CLK_GATE_ value */ __u8 invert_bclk; /* 1 for inverted BCLK, 0 for normal */ __u8 invert_fsync; /* 1 for inverted frame clock, 0 for normal */ __u8 bclk_master; /* SND_SOC_TPLG_BCLK_ value */ --- a/sound/soc/soc-topology.c +++ b/sound/soc/soc-topology.c @@ -1997,6 +1997,13 @@ static void set_link_hw_format(struct sn link->dai_fmt = hw_config->fmt & SND_SOC_DAIFMT_FORMAT_MASK; + /* clock gating */ + if (hw_config->clock_gated == SND_SOC_TPLG_DAI_CLK_GATE_GATED) + link->dai_fmt |= SND_SOC_DAIFMT_GATED; + else if (hw_config->clock_gated == + SND_SOC_TPLG_DAI_CLK_GATE_CONT) + link->dai_fmt |= SND_SOC_DAIFMT_CONT; + /* clock signal polarity */ invert_bclk = hw_config->invert_bclk; invert_fsync = hw_config->invert_fsync;

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[alsa-devel] [PATCH 4.14 210/246] ASoC: topology: Fix bclk and fsync inversion in set_link_hw_format()
by Greg Kroah-Hartman 01 Aug '18

01 Aug '18

4.14-stable review patch. If anyone has any objections, please let me know. ------------------ From: Kirill Marinushkin <k.marinushkin(a)gmail.com> [ Upstream commit a941e2fab3207cb0d57dc4ec47b1b12c8ea78b84 ] The values of bclk and fsync are inverted WRT the codec. But the existing solution already works for Broadwell, see the alsa-lib config: `alsa-lib/src/conf/topology/broadwell/broadwell.conf` This commit provides the backwards-compatible solution to fix this misuse. Signed-off-by: Kirill Marinushkin <k.marinushkin(a)gmail.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Tested-by: Pan Xiuli <xiuli.pan(a)linux.intel.com> Tested-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Cc: Jaroslav Kysela <perex(a)perex.cz> Cc: Takashi Iwai <tiwai(a)suse.de> Cc: Mark Brown <broonie(a)kernel.org> Cc: Liam Girdwood <liam.r.girdwood(a)linux.intel.com> Cc: linux-kernel(a)vger.kernel.org Cc: alsa-devel(a)alsa-project.org Signed-off-by: Mark Brown <broonie(a)kernel.org> Signed-off-by: Sasha Levin <alexander.levin(a)microsoft.com> Signed-off-by: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> --- include/uapi/sound/asoc.h | 16 ++++++++++++++-- sound/soc/soc-topology.c | 12 +++++++----- 2 files changed, 21 insertions(+), 7 deletions(-) --- a/include/uapi/sound/asoc.h +++ b/include/uapi/sound/asoc.h @@ -160,6 +160,18 @@ #define SND_SOC_TPLG_LNK_FLGBIT_SYMMETRIC_SAMPLEBITS (1 << 2) #define SND_SOC_TPLG_LNK_FLGBIT_VOICE_WAKEUP (1 << 3) +/* DAI topology BCLK parameter + * For the backwards capability, by default codec is bclk master + */ +#define SND_SOC_TPLG_BCLK_CM 0 /* codec is bclk master */ +#define SND_SOC_TPLG_BCLK_CS 1 /* codec is bclk slave */ + +/* DAI topology FSYNC parameter + * For the backwards capability, by default codec is fsync master + */ +#define SND_SOC_TPLG_FSYNC_CM 0 /* codec is fsync master */ +#define SND_SOC_TPLG_FSYNC_CS 1 /* codec is fsync slave */ + /* * Block Header. * This header precedes all object and object arrays below. @@ -315,8 +327,8 @@ struct snd_soc_tplg_hw_config { __u8 clock_gated; /* 1 if clock can be gated to save power */ __u8 invert_bclk; /* 1 for inverted BCLK, 0 for normal */ __u8 invert_fsync; /* 1 for inverted frame clock, 0 for normal */ - __u8 bclk_master; /* 1 for master of BCLK, 0 for slave */ - __u8 fsync_master; /* 1 for master of FSYNC, 0 for slave */ + __u8 bclk_master; /* SND_SOC_TPLG_BCLK_ value */ + __u8 fsync_master; /* SND_SOC_TPLG_FSYNC_ value */ __u8 mclk_direction; /* 0 for input, 1 for output */ __le16 reserved; /* for 32bit alignment */ __le32 mclk_rate; /* MCLK or SYSCLK freqency in Hz */ --- a/sound/soc/soc-topology.c +++ b/sound/soc/soc-topology.c @@ -2010,13 +2010,15 @@ static void set_link_hw_format(struct sn link->dai_fmt |= SND_SOC_DAIFMT_IB_IF; /* clock masters */ - bclk_master = hw_config->bclk_master; - fsync_master = hw_config->fsync_master; - if (!bclk_master && !fsync_master) + bclk_master = (hw_config->bclk_master == + SND_SOC_TPLG_BCLK_CM); + fsync_master = (hw_config->fsync_master == + SND_SOC_TPLG_FSYNC_CM); + if (bclk_master && fsync_master) link->dai_fmt |= SND_SOC_DAIFMT_CBM_CFM; - else if (bclk_master && !fsync_master) - link->dai_fmt |= SND_SOC_DAIFMT_CBS_CFM; else if (!bclk_master && fsync_master) + link->dai_fmt |= SND_SOC_DAIFMT_CBS_CFM; + else if (bclk_master && !fsync_master) link->dai_fmt |= SND_SOC_DAIFMT_CBM_CFS; else link->dai_fmt |= SND_SOC_DAIFMT_CBS_CFS;

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[alsa-devel] [PATCH 4.17 290/336] ASoC: topology: Add missing clock gating parameter when parsing hw_configs
by Greg Kroah-Hartman 01 Aug '18

01 Aug '18

4.17-stable review patch. If anyone has any objections, please let me know. ------------------ From: Kirill Marinushkin <k.marinushkin(a)gmail.com> [ Upstream commit 933e1c4a667103c4d10ebdc9505a0a6abd8c3fbd ] Clock gating parameter is a part of `dai_fmt`. It is supported by `alsa-lib` when creating a topology binary file, but ignored by kernel when loading this topology file. After applying this commit, the clock gating parameter is not ignored any more. This solution is backwards compatible. The existing behaviour is not broken, because by default the parameter value is 0 and is ignored. snd_soc_tplg_hw_config.clock_gated = 0 => no effect snd_soc_tplg_hw_config.clock_gated = 1 => SND_SOC_DAIFMT_GATED snd_soc_tplg_hw_config.clock_gated = 2 => SND_SOC_DAIFMT_CONT For example, the following config, based on alsa-lib/src/conf/topology/broadwell/broadwell.conf, is now supported: ~~~~ SectionHWConfig."CodecHWConfig" { id "1" format "I2S" # physical audio format. pm_gate_clocks "true" # clock can be gated } SectionLink."Codec" { # used for binding to the physical link id "0" hw_configs [ "CodecHWConfig" ] default_hw_conf_id "1" } ~~~~ Signed-off-by: Kirill Marinushkin <k.marinushkin(a)gmail.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Cc: Jaroslav Kysela <perex(a)perex.cz> Cc: Takashi Iwai <tiwai(a)suse.de> Cc: Mark Brown <broonie(a)kernel.org> Cc: Pan Xiuli <xiuli.pan(a)linux.intel.com> Cc: Liam Girdwood <liam.r.girdwood(a)linux.intel.com> Cc: linux-kernel(a)vger.kernel.org Cc: alsa-devel(a)alsa-project.org Signed-off-by: Mark Brown <broonie(a)kernel.org> Signed-off-by: Sasha Levin <alexander.levin(a)microsoft.com> Signed-off-by: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> --- include/uapi/sound/asoc.h | 7 ++++++- sound/soc/soc-topology.c | 7 +++++++ 2 files changed, 13 insertions(+), 1 deletion(-) --- a/include/uapi/sound/asoc.h +++ b/include/uapi/sound/asoc.h @@ -139,6 +139,11 @@ #define SND_SOC_TPLG_DAI_FLGBIT_SYMMETRIC_CHANNELS (1 << 1) #define SND_SOC_TPLG_DAI_FLGBIT_SYMMETRIC_SAMPLEBITS (1 << 2) +/* DAI clock gating */ +#define SND_SOC_TPLG_DAI_CLK_GATE_UNDEFINED 0 +#define SND_SOC_TPLG_DAI_CLK_GATE_GATED 1 +#define SND_SOC_TPLG_DAI_CLK_GATE_CONT 2 + /* DAI physical PCM data formats. * Add new formats to the end of the list. */ @@ -324,7 +329,7 @@ struct snd_soc_tplg_hw_config { __le32 size; /* in bytes of this structure */ __le32 id; /* unique ID - - used to match */ __le32 fmt; /* SND_SOC_DAI_FORMAT_ format value */ - __u8 clock_gated; /* 1 if clock can be gated to save power */ + __u8 clock_gated; /* SND_SOC_TPLG_DAI_CLK_GATE_ value */ __u8 invert_bclk; /* 1 for inverted BCLK, 0 for normal */ __u8 invert_fsync; /* 1 for inverted frame clock, 0 for normal */ __u8 bclk_master; /* SND_SOC_TPLG_BCLK_ value */ --- a/sound/soc/soc-topology.c +++ b/sound/soc/soc-topology.c @@ -2006,6 +2006,13 @@ static void set_link_hw_format(struct sn link->dai_fmt = hw_config->fmt & SND_SOC_DAIFMT_FORMAT_MASK; + /* clock gating */ + if (hw_config->clock_gated == SND_SOC_TPLG_DAI_CLK_GATE_GATED) + link->dai_fmt |= SND_SOC_DAIFMT_GATED; + else if (hw_config->clock_gated == + SND_SOC_TPLG_DAI_CLK_GATE_CONT) + link->dai_fmt |= SND_SOC_DAIFMT_CONT; + /* clock signal polarity */ invert_bclk = hw_config->invert_bclk; invert_fsync = hw_config->invert_fsync;

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[alsa-devel] [PATCH 4.17 289/336] ASoC: topology: Fix bclk and fsync inversion in set_link_hw_format()
by Greg Kroah-Hartman 01 Aug '18

01 Aug '18

4.17-stable review patch. If anyone has any objections, please let me know. ------------------ From: Kirill Marinushkin <k.marinushkin(a)gmail.com> [ Upstream commit a941e2fab3207cb0d57dc4ec47b1b12c8ea78b84 ] The values of bclk and fsync are inverted WRT the codec. But the existing solution already works for Broadwell, see the alsa-lib config: `alsa-lib/src/conf/topology/broadwell/broadwell.conf` This commit provides the backwards-compatible solution to fix this misuse. Signed-off-by: Kirill Marinushkin <k.marinushkin(a)gmail.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Tested-by: Pan Xiuli <xiuli.pan(a)linux.intel.com> Tested-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Cc: Jaroslav Kysela <perex(a)perex.cz> Cc: Takashi Iwai <tiwai(a)suse.de> Cc: Mark Brown <broonie(a)kernel.org> Cc: Liam Girdwood <liam.r.girdwood(a)linux.intel.com> Cc: linux-kernel(a)vger.kernel.org Cc: alsa-devel(a)alsa-project.org Signed-off-by: Mark Brown <broonie(a)kernel.org> Signed-off-by: Sasha Levin <alexander.levin(a)microsoft.com> Signed-off-by: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> --- include/uapi/sound/asoc.h | 16 ++++++++++++++-- sound/soc/soc-topology.c | 12 +++++++----- 2 files changed, 21 insertions(+), 7 deletions(-) --- a/include/uapi/sound/asoc.h +++ b/include/uapi/sound/asoc.h @@ -160,6 +160,18 @@ #define SND_SOC_TPLG_LNK_FLGBIT_SYMMETRIC_SAMPLEBITS (1 << 2) #define SND_SOC_TPLG_LNK_FLGBIT_VOICE_WAKEUP (1 << 3) +/* DAI topology BCLK parameter + * For the backwards capability, by default codec is bclk master + */ +#define SND_SOC_TPLG_BCLK_CM 0 /* codec is bclk master */ +#define SND_SOC_TPLG_BCLK_CS 1 /* codec is bclk slave */ + +/* DAI topology FSYNC parameter + * For the backwards capability, by default codec is fsync master + */ +#define SND_SOC_TPLG_FSYNC_CM 0 /* codec is fsync master */ +#define SND_SOC_TPLG_FSYNC_CS 1 /* codec is fsync slave */ + /* * Block Header. * This header precedes all object and object arrays below. @@ -315,8 +327,8 @@ struct snd_soc_tplg_hw_config { __u8 clock_gated; /* 1 if clock can be gated to save power */ __u8 invert_bclk; /* 1 for inverted BCLK, 0 for normal */ __u8 invert_fsync; /* 1 for inverted frame clock, 0 for normal */ - __u8 bclk_master; /* 1 for master of BCLK, 0 for slave */ - __u8 fsync_master; /* 1 for master of FSYNC, 0 for slave */ + __u8 bclk_master; /* SND_SOC_TPLG_BCLK_ value */ + __u8 fsync_master; /* SND_SOC_TPLG_FSYNC_ value */ __u8 mclk_direction; /* 0 for input, 1 for output */ __le16 reserved; /* for 32bit alignment */ __le32 mclk_rate; /* MCLK or SYSCLK freqency in Hz */ --- a/sound/soc/soc-topology.c +++ b/sound/soc/soc-topology.c @@ -2019,13 +2019,15 @@ static void set_link_hw_format(struct sn link->dai_fmt |= SND_SOC_DAIFMT_IB_IF; /* clock masters */ - bclk_master = hw_config->bclk_master; - fsync_master = hw_config->fsync_master; - if (!bclk_master && !fsync_master) + bclk_master = (hw_config->bclk_master == + SND_SOC_TPLG_BCLK_CM); + fsync_master = (hw_config->fsync_master == + SND_SOC_TPLG_FSYNC_CM); + if (bclk_master && fsync_master) link->dai_fmt |= SND_SOC_DAIFMT_CBM_CFM; - else if (bclk_master && !fsync_master) - link->dai_fmt |= SND_SOC_DAIFMT_CBS_CFM; else if (!bclk_master && fsync_master) + link->dai_fmt |= SND_SOC_DAIFMT_CBS_CFM; + else if (bclk_master && !fsync_master) link->dai_fmt |= SND_SOC_DAIFMT_CBM_CFS; else link->dai_fmt |= SND_SOC_DAIFMT_CBS_CFS;

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[alsa-devel] [PATCH] ALSA: pcm: Mark expected switch fall-through
by Gustavo A. R. Silva 01 Aug '18

01 Aug '18

In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. Addresses-Coverity-ID: 1357375 ("Missing break in switch") Signed-off-by: Gustavo A. R. Silva <gustavo(a)embeddedor.com> --- sound/core/oss/pcm_plugin.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/core/oss/pcm_plugin.c b/sound/core/oss/pcm_plugin.c index 85bab92..0391cb1a 100644 --- a/sound/core/oss/pcm_plugin.c +++ b/sound/core/oss/pcm_plugin.c @@ -353,6 +353,7 @@ snd_pcm_format_t snd_pcm_plug_slave_format(snd_pcm_format_t format, if (snd_mask_test(format_mask, (__force int)format1)) return format1; } + /* fall through */ default: return (__force snd_pcm_format_t)-EINVAL; } -- 2.7.4

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[alsa-devel] [PATCH 0/5] ALSA: seq: Some minor cleanups
by Takashi Iwai 01 Aug '18

01 Aug '18

Hi, while debugging the recent virmidi bug, I've found a few ugly appearance in the sequencer code, so spent a bit time for cleaning it up. Most of changes are cosmetic, non-functional changes. Takashi === Takashi Iwai (5): ALSA: seq: Minor cleanup of MIDI event parser helpers ALSA: seq: Remove dead codes ALSA: seq: Fix leftovers at probe error path ALSA: seq: Use no intrruptible mutex_lock ALSA: seq: Drop unused 64bit division macros include/sound/seq_midi_event.h | 6 +-- sound/core/seq/oss/seq_oss_midi.c | 2 +- sound/core/seq/seq.c | 33 ++++++------ sound/core/seq/seq_clientmgr.c | 28 +++------- sound/core/seq/seq_info.c | 10 +--- sound/core/seq/seq_info.h | 6 +-- sound/core/seq/seq_memory.c | 12 ----- sound/core/seq/seq_memory.h | 6 --- sound/core/seq/seq_midi.c | 24 ++++----- sound/core/seq/seq_midi_emul.c | 12 ----- sound/core/seq/seq_midi_event.c | 87 +++---------------------------- sound/core/seq/seq_queue.c | 12 +---- sound/core/seq/seq_queue.h | 27 ---------- sound/core/seq/seq_virmidi.c | 37 +------------ 14 files changed, 52 insertions(+), 250 deletions(-) -- 2.18.0

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[alsa-devel] [PATCH v5 0/8] Enable HDA Codec support on Intel Platforms
by Pierre-Louis Bossart 01 Aug '18

01 Aug '18

Many Intel platforms (SKL, KBL) etc. in the market supports enhanced audio capabilities which also includes DSP processing. The default HDaudio legacy driver does not allow for the use of the DSP, this patch set makes it possible while reusing existing code for HDAudio codecs and without significant changes to the legacy driver. This v5 is based on Takashi's topic/drm_audio_component merged on top on Marks' for-next branch - the merge is not included here. Tests were run successfully on multiple platforms (Dell XPS13, KBL NUC, APL NUC and LeafHill reference board). Both the HDaudio and HDMI outputs were tested. Credits: all the initial code was written by Rakesh Ughreja, the rebase to broonie/for-next, cleanups and additional tests were done by Pierre Bossart. TODO in future update: fix the HDMI jack detection which only works after the mixer values are set, which isn't practical for headless devices always connected (this is a problem in the hdac_hdmi codec that was present before this series was submitted) Changes v5 (comments from Vinod) - fix SPDIF style across patches - patch 1: update commit message to remove reference to "fix" - patch 3: remove platform name assignment and Xmas tree style - patch 7: simplify error handling, add missing _put() on errors, remove tests on ops, add switch statement, fix alignment - patch 8: fix indentation issues, use bool instead of tristate Changes v4: - rebase/update on Takashi's topic/drm_audio_component branch - changes in the HDaudio detection to avoid adding a fake ACPI ID - new Kconfigs to control HDaudio detection Changes v3: - port to component model - additional tests on ApolloLake and KabyLake NUC devices - cleanups (alignment, typos, etc) Changes v2: - Resolved review comments and rebased to latest kernel. - added module load support for codec drivers. Pierre-Louis Bossart (2): ASoC: Intel: common: add table for HDA-based platforms ASoC: Intel: Skylake: add option to control HDAudio + DSP usage Rakesh Ughreja (6): ASoC: Intel: Skylake: extend widget handling ASoC: Intel: Boards: Machine driver for SKL+ w/ HDAudio codecs ASoC: Intel: Skylake: use HDAudio if ACPI enumeration fails ASoC: Intel: Skylake: add HDA BE DAIs ASoC: Intel: Skylake: use hda_bus instead of hdac_bus ASoC: hdac_hda: add asoc extension for legacy HDA codec drivers include/sound/soc-acpi-intel-match.h | 6 + sound/pci/hda/hda_bind.c | 12 + sound/soc/codecs/Kconfig | 5 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/hdac_hda.c | 487 ++++++++++++++++++++++ sound/soc/codecs/hdac_hda.h | 24 ++ sound/soc/intel/Kconfig | 19 + sound/soc/intel/boards/Kconfig | 9 + sound/soc/intel/boards/Makefile | 2 + sound/soc/intel/boards/skl_hda_dsp_common.c | 130 ++++++ sound/soc/intel/boards/skl_hda_dsp_common.h | 37 ++ sound/soc/intel/boards/skl_hda_dsp_generic.c | 176 ++++++++ sound/soc/intel/common/Makefile | 3 +- sound/soc/intel/common/soc-acpi-intel-hda-match.c | 40 ++ sound/soc/intel/skylake/skl-pcm.c | 70 +++- sound/soc/intel/skylake/skl-topology.c | 3 + sound/soc/intel/skylake/skl.c | 100 ++++- sound/soc/intel/skylake/skl.h | 12 +- 18 files changed, 1111 insertions(+), 26 deletions(-) create mode 100644 sound/soc/codecs/hdac_hda.c create mode 100644 sound/soc/codecs/hdac_hda.h create mode 100644 sound/soc/intel/boards/skl_hda_dsp_common.c create mode 100644 sound/soc/intel/boards/skl_hda_dsp_common.h create mode 100644 sound/soc/intel/boards/skl_hda_dsp_generic.c create mode 100644 sound/soc/intel/common/soc-acpi-intel-hda-match.c -- 2.14.1

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[alsa-devel] Applied "ASoC: wcd9335: Fix build due to CLASS-H Controller support" to the asoc tree
by Mark Brown 01 Aug '18

01 Aug '18

The patch ASoC: wcd9335: Fix build due to CLASS-H Controller support has been applied to the asoc tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From b0a39d356ae1478a5876bb02ba08af155a3a5554 Mon Sep 17 00:00:00 2001 From: Mark Brown <broonie(a)kernel.org> Date: Wed, 1 Aug 2018 14:18:50 +0100 Subject: [PATCH] ASoC: wcd9335: Fix build due to CLASS-H Controller support This reverts commit c8cb5f775c8dac (ASoC: vert "ASoC: wcd9335: add CLASS-H Controller support) due to missing dependencies. Signed-off-by: Mark Brown <broonie(a)kernel.org> --- sound/soc/codecs/Makefile | 2 +- sound/soc/codecs/wcd-clsh.c | 605 ------------------------------------ sound/soc/codecs/wcd-clsh.h | 49 --- sound/soc/codecs/wcd9335.c | 10 - 4 files changed, 1 insertion(+), 665 deletions(-) delete mode 100644 sound/soc/codecs/wcd-clsh.c delete mode 100644 sound/soc/codecs/wcd-clsh.h diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index e3a3d4694e15..01410b63daac 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -192,7 +192,7 @@ snd-soc-twl4030-objs := twl4030.o snd-soc-twl6040-objs := twl6040.o snd-soc-uda134x-objs := uda134x.o snd-soc-uda1380-objs := uda1380.o -snd-soc-wcd9335-objs := wcd-clsh.o wcd9335.o +snd-soc-wcd9335-objs := wcd9335.o snd-soc-wl1273-objs := wl1273.o snd-soc-wm-adsp-objs := wm_adsp.o snd-soc-wm0010-objs := wm0010.o diff --git a/sound/soc/codecs/wcd-clsh.c b/sound/soc/codecs/wcd-clsh.c deleted file mode 100644 index 2393456cbd97..000000000000 --- a/sound/soc/codecs/wcd-clsh.c +++ /dev/null @@ -1,605 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. -// Copyright (c) 2017-2018, Linaro Limited - -#include <linux/slab.h> -#include <sound/soc.h> -#include <linux/kernel.h> -#include <linux/delay.h> -#include <linux/mfd/wcd9335/wcd9335.h> -#include <linux/mfd/wcd9335/registers.h> -#include "wcd-clsh.h" - -struct wcd_clsh_ctrl { - int state; - int mode; - int flyback_users; - int buck_users; - int clsh_users; - int codec_version; - struct snd_soc_component *comp; -}; - -/* Class-H registers for codecs from and above WCD9335 */ -#define WCD9XXX_A_CDC_RX0_RX_PATH_CFG0 WCD9335_REG(0xB, 0x42) -#define WCD9XXX_A_CDC_RX_PATH_CLSH_EN_MASK BIT(6) -#define WCD9XXX_A_CDC_RX_PATH_CLSH_ENABLE BIT(6) -#define WCD9XXX_A_CDC_RX_PATH_CLSH_DISABLE 0 -#define WCD9XXX_A_CDC_RX1_RX_PATH_CFG0 WCD9335_REG(0xB, 0x56) -#define WCD9XXX_A_CDC_RX2_RX_PATH_CFG0 WCD9335_REG(0xB, 0x6A) -#define WCD9XXX_A_CDC_CLSH_K1_MSB WCD9335_REG(0xC, 0x08) -#define WCD9XXX_A_CDC_CLSH_K1_MSB_COEF_MASK GENMASK(3, 0) -#define WCD9XXX_A_CDC_CLSH_K1_LSB WCD9335_REG(0xC, 0x09) -#define WCD9XXX_A_CDC_CLSH_K1_LSB_COEF_MASK GENMASK(7, 0) -#define WCD9XXX_A_ANA_RX_SUPPLIES WCD9335_REG(0x6, 0x08) -#define WCD9XXX_A_ANA_RX_REGULATOR_MODE_MASK BIT(1) -#define WCD9XXX_A_ANA_RX_REGULATOR_MODE_CLS_H 0 -#define WCD9XXX_A_ANA_RX_REGULATOR_MODE_CLS_AB BIT(1) -#define WCD9XXX_A_ANA_RX_VNEG_PWR_LVL_MASK BIT(2) -#define WCD9XXX_A_ANA_RX_VNEG_PWR_LVL_UHQA BIT(2) -#define WCD9XXX_A_ANA_RX_VNEG_PWR_LVL_DEFAULT 0 -#define WCD9XXX_A_ANA_RX_VPOS_PWR_LVL_MASK BIT(3) -#define WCD9XXX_A_ANA_RX_VPOS_PWR_LVL_UHQA BIT(3) -#define WCD9XXX_A_ANA_RX_VPOS_PWR_LVL_DEFAULT 0 -#define WCD9XXX_A_ANA_RX_VNEG_EN_MASK BIT(6) -#define WCD9XXX_A_ANA_RX_VNEG_EN_SHIFT 6 -#define WCD9XXX_A_ANA_RX_VNEG_ENABLE BIT(6) -#define WCD9XXX_A_ANA_RX_VNEG_DISABLE 0 -#define WCD9XXX_A_ANA_RX_VPOS_EN_MASK BIT(7) -#define WCD9XXX_A_ANA_RX_VPOS_EN_SHIFT 7 -#define WCD9XXX_A_ANA_RX_VPOS_ENABLE BIT(7) -#define WCD9XXX_A_ANA_RX_VPOS_DISABLE 0 -#define WCD9XXX_A_ANA_HPH WCD9335_REG(0x6, 0x09) -#define WCD9XXX_A_ANA_HPH_PWR_LEVEL_MASK GENMASK(3, 2) -#define WCD9XXX_A_ANA_HPH_PWR_LEVEL_UHQA 0x08 -#define WCD9XXX_A_ANA_HPH_PWR_LEVEL_LP 0x04 -#define WCD9XXX_A_ANA_HPH_PWR_LEVEL_NORMAL 0x0 -#define WCD9XXX_A_CDC_CLSH_CRC WCD9335_REG(0xC, 0x01) -#define WCD9XXX_A_CDC_CLSH_CRC_CLK_EN_MASK BIT(0) -#define WCD9XXX_A_CDC_CLSH_CRC_CLK_ENABLE BIT(0) -#define WCD9XXX_A_CDC_CLSH_CRC_CLK_DISABLE 0 -#define WCD9XXX_FLYBACK_EN WCD9335_REG(0x6, 0xA4) -#define WCD9XXX_FLYBACK_EN_DELAY_SEL_MASK GENMASK(6, 5) -#define WCD9XXX_FLYBACK_EN_DELAY_26P25_US 0x40 -#define WCD9XXX_FLYBACK_EN_RESET_BY_EXT_MASK BIT(4) -#define WCD9XXX_FLYBACK_EN_PWDN_WITHOUT_DELAY BIT(4) -#define WCD9XXX_FLYBACK_EN_PWDN_WITH_DELAY 0 -#define WCD9XXX_RX_BIAS_FLYB_BUFF WCD9335_REG(0x6, 0xC7) -#define WCD9XXX_RX_BIAS_FLYB_VNEG_5_UA_MASK GENMASK(7, 4) -#define WCD9XXX_RX_BIAS_FLYB_VPOS_5_UA_MASK GENMASK(0, 3) -#define WCD9XXX_HPH_L_EN WCD9335_REG(0x6, 0xD3) -#define WCD9XXX_HPH_CONST_SEL_L_MASK GENMASK(7, 3) -#define WCD9XXX_HPH_CONST_SEL_BYPASS 0 -#define WCD9XXX_HPH_CONST_SEL_LP_PATH 0x40 -#define WCD9XXX_HPH_CONST_SEL_HQ_PATH 0x80 -#define WCD9XXX_HPH_R_EN WCD9335_REG(0x6, 0xD6) -#define WCD9XXX_HPH_REFBUFF_UHQA_CTL WCD9335_REG(0x6, 0xDD) -#define WCD9XXX_HPH_REFBUFF_UHQA_GAIN_MASK GENMASK(2, 0) -#define WCD9XXX_CLASSH_CTRL_VCL_2 WCD9335_REG(0x6, 0x9B) -#define WCD9XXX_CLASSH_CTRL_VCL_2_VREF_FILT_1_MASK GENMASK(5, 4) -#define WCD9XXX_CLASSH_CTRL_VCL_VREF_FILT_R_50KOHM 0x20 -#define WCD9XXX_CLASSH_CTRL_VCL_VREF_FILT_R_0KOHM 0x0 -#define WCD9XXX_CDC_RX1_RX_PATH_CTL WCD9335_REG(0xB, 0x55) -#define WCD9XXX_CDC_RX2_RX_PATH_CTL WCD9335_REG(0xB, 0x69) -#define WCD9XXX_CDC_CLK_RST_CTRL_MCLK_CONTROL WCD9335_REG(0xD, 0x41) -#define WCD9XXX_CDC_CLK_RST_CTRL_MCLK_EN_MASK BIT(0) -#define WCD9XXX_CDC_CLK_RST_CTRL_MCLK_11P3_EN_MASK BIT(1) -#define WCD9XXX_CLASSH_CTRL_CCL_1 WCD9335_REG(0x6, 0x9C) -#define WCD9XXX_CLASSH_CTRL_CCL_1_DELTA_IPEAK_MASK GENMASK(7, 4) -#define WCD9XXX_CLASSH_CTRL_CCL_1_DELTA_IPEAK_50MA 0x50 -#define WCD9XXX_CLASSH_CTRL_CCL_1_DELTA_IPEAK_30MA 0x30 - -#define CLSH_REQ_ENABLE true -#define CLSH_REQ_DISABLE false -#define WCD_USLEEP_RANGE 50 - -enum { - DAC_GAIN_0DB = 0, - DAC_GAIN_0P2DB, - DAC_GAIN_0P4DB, - DAC_GAIN_0P6DB, - DAC_GAIN_0P8DB, - DAC_GAIN_M0P2DB, - DAC_GAIN_M0P4DB, - DAC_GAIN_M0P6DB, -}; - -static inline void wcd_enable_clsh_block(struct wcd_clsh_ctrl *ctrl, - bool enable) -{ - struct snd_soc_component *comp = ctrl->comp; - - if ((enable && ++ctrl->clsh_users == 1) || - (!enable && --ctrl->clsh_users == 0)) - snd_soc_component_update_bits(comp, WCD9XXX_A_CDC_CLSH_CRC, - WCD9XXX_A_CDC_CLSH_CRC_CLK_EN_MASK, - enable); - if (ctrl->clsh_users < 0) - ctrl->clsh_users = 0; -} - -static inline bool wcd_clsh_enable_status(struct snd_soc_component *comp) -{ - return snd_soc_component_read32(comp, WCD9XXX_A_CDC_CLSH_CRC) & - WCD9XXX_A_CDC_CLSH_CRC_CLK_EN_MASK; -} - -static inline void wcd_clsh_set_buck_mode(struct snd_soc_component *comp, - int mode) -{ - /* set to HIFI */ - if (mode == CLS_H_HIFI) - snd_soc_component_update_bits(comp, WCD9XXX_A_ANA_RX_SUPPLIES, - WCD9XXX_A_ANA_RX_VPOS_PWR_LVL_MASK, - WCD9XXX_A_ANA_RX_VPOS_PWR_LVL_UHQA); - else - snd_soc_component_update_bits(comp, WCD9XXX_A_ANA_RX_SUPPLIES, - WCD9XXX_A_ANA_RX_VPOS_PWR_LVL_MASK, - WCD9XXX_A_ANA_RX_VPOS_PWR_LVL_DEFAULT); -} - -static inline void wcd_clsh_set_flyback_mode(struct snd_soc_component *comp, - int mode) -{ - /* set to HIFI */ - if (mode == CLS_H_HIFI) - snd_soc_component_update_bits(comp, WCD9XXX_A_ANA_RX_SUPPLIES, - WCD9XXX_A_ANA_RX_VNEG_PWR_LVL_MASK, - WCD9XXX_A_ANA_RX_VNEG_PWR_LVL_UHQA); - else - snd_soc_component_update_bits(comp, WCD9XXX_A_ANA_RX_SUPPLIES, - WCD9XXX_A_ANA_RX_VNEG_PWR_LVL_MASK, - WCD9XXX_A_ANA_RX_VNEG_PWR_LVL_DEFAULT); -} - -static void wcd_clsh_buck_ctrl(struct wcd_clsh_ctrl *ctrl, - int mode, - bool enable) -{ - struct snd_soc_component *comp = ctrl->comp; - - /* enable/disable buck */ - if ((enable && (++ctrl->buck_users == 1)) || - (!enable && (--ctrl->buck_users == 0))) - snd_soc_component_update_bits(comp, WCD9XXX_A_ANA_RX_SUPPLIES, - WCD9XXX_A_ANA_RX_VPOS_EN_MASK, - enable << WCD9XXX_A_ANA_RX_VPOS_EN_SHIFT); - /* - * 500us sleep is required after buck enable/disable - * as per HW requirement - */ - usleep_range(500, 500 + WCD_USLEEP_RANGE); -} - -static void wcd_clsh_flyback_ctrl(struct wcd_clsh_ctrl *ctrl, - int mode, - bool enable) -{ - struct snd_soc_component *comp = ctrl->comp; - - int vneg[] = {0x00, 0x40}; - - /* enable/disable flyback */ - if ((enable && (++ctrl->flyback_users == 1)) || - (!enable && (--ctrl->flyback_users == 0))) { - snd_soc_component_update_bits(comp, WCD9XXX_A_ANA_RX_SUPPLIES, - WCD9XXX_A_ANA_RX_VNEG_EN_MASK, - enable << WCD9XXX_A_ANA_RX_VNEG_EN_SHIFT); - /* 100usec delay is needed as per HW requirement */ - usleep_range(100, 110); - - if (enable && (WCD9335_IS_1_1(ctrl->codec_version))) { - wcd_clsh_set_flyback_mode(comp, CLS_H_HIFI); - snd_soc_component_update_bits(comp, WCD9XXX_FLYBACK_EN, - WCD9XXX_FLYBACK_EN_DELAY_SEL_MASK, - WCD9XXX_FLYBACK_EN_DELAY_26P25_US); - snd_soc_component_update_bits(comp, WCD9XXX_FLYBACK_EN, - WCD9XXX_FLYBACK_EN_RESET_BY_EXT_MASK, - WCD9XXX_FLYBACK_EN_PWDN_WITHOUT_DELAY); - vneg[0] = snd_soc_component_read32(comp, - WCD9XXX_A_ANA_RX_SUPPLIES); - vneg[0] &= ~(0x40); - vneg[1] = vneg[0] | 0x40; - - snd_soc_component_write(comp, - WCD9XXX_A_ANA_RX_SUPPLIES, vneg[0]); - snd_soc_component_write(comp, - WCD9XXX_A_ANA_RX_SUPPLIES, vneg[1]); - /* 500usec delay is needed as per HW requirement */ - usleep_range(500, 510); - snd_soc_component_update_bits(comp, WCD9XXX_FLYBACK_EN, - WCD9XXX_FLYBACK_EN_RESET_BY_EXT_MASK, - WCD9XXX_FLYBACK_EN_PWDN_WITH_DELAY); - wcd_clsh_set_flyback_mode(comp, mode); - } - - } - /* - * 500us sleep is required after flyback enable/disable - * as per HW requirement - */ - usleep_range(500, 500 + WCD_USLEEP_RANGE); -} - -static void wcd_clsh_set_gain_path(struct wcd_clsh_ctrl *ctrl, int mode) -{ - struct snd_soc_component *comp = ctrl->comp; - int val = 0; - - switch (mode) { - case CLS_H_NORMAL: - case CLS_AB: - val = WCD9XXX_HPH_CONST_SEL_BYPASS; - break; - case CLS_H_HIFI: - val = WCD9XXX_HPH_CONST_SEL_HQ_PATH; - break; - case CLS_H_LP: - val = WCD9XXX_HPH_CONST_SEL_LP_PATH; - break; - }; - - snd_soc_component_update_bits(comp, WCD9XXX_HPH_L_EN, - WCD9XXX_HPH_CONST_SEL_L_MASK, - val); - - snd_soc_component_update_bits(comp, WCD9XXX_HPH_R_EN, - WCD9XXX_HPH_CONST_SEL_L_MASK, - val); -} - -static void wcd_clsh_set_hph_mode(struct snd_soc_component *comp, - int mode) -{ - int val = 0, gain = 0, res_val; - int ipeak = WCD9XXX_CLASSH_CTRL_CCL_1_DELTA_IPEAK_50MA; - - res_val = WCD9XXX_CLASSH_CTRL_VCL_VREF_FILT_R_0KOHM; - switch (mode) { - case CLS_H_NORMAL: - res_val = WCD9XXX_CLASSH_CTRL_VCL_VREF_FILT_R_50KOHM; - val = WCD9XXX_A_ANA_HPH_PWR_LEVEL_NORMAL; - gain = DAC_GAIN_0DB; - ipeak = WCD9XXX_CLASSH_CTRL_CCL_1_DELTA_IPEAK_50MA; - break; - case CLS_AB: - val = WCD9XXX_A_ANA_HPH_PWR_LEVEL_NORMAL; - gain = DAC_GAIN_0DB; - ipeak = WCD9XXX_CLASSH_CTRL_CCL_1_DELTA_IPEAK_50MA; - break; - case CLS_H_HIFI: - val = WCD9XXX_A_ANA_HPH_PWR_LEVEL_UHQA; - gain = DAC_GAIN_M0P2DB; - ipeak = WCD9XXX_CLASSH_CTRL_CCL_1_DELTA_IPEAK_50MA; - break; - case CLS_H_LP: - val = WCD9XXX_A_ANA_HPH_PWR_LEVEL_LP; - ipeak = WCD9XXX_CLASSH_CTRL_CCL_1_DELTA_IPEAK_30MA; - break; - }; - - snd_soc_component_update_bits(comp, WCD9XXX_A_ANA_HPH, - WCD9XXX_A_ANA_HPH_PWR_LEVEL_MASK, val); - snd_soc_component_update_bits(comp, WCD9XXX_CLASSH_CTRL_VCL_2, - WCD9XXX_CLASSH_CTRL_VCL_2_VREF_FILT_1_MASK, - res_val); - if (mode != CLS_H_LP) - snd_soc_component_update_bits(comp, - WCD9XXX_HPH_REFBUFF_UHQA_CTL, - WCD9XXX_HPH_REFBUFF_UHQA_GAIN_MASK, - gain); - snd_soc_component_update_bits(comp, WCD9XXX_CLASSH_CTRL_CCL_1, - WCD9XXX_CLASSH_CTRL_CCL_1_DELTA_IPEAK_MASK, - ipeak); -} - -static void wcd_clsh_set_flyback_current(struct snd_soc_component *comp, - int mode) -{ - - snd_soc_component_update_bits(comp, WCD9XXX_RX_BIAS_FLYB_BUFF, - WCD9XXX_RX_BIAS_FLYB_VPOS_5_UA_MASK, 0x0A); - snd_soc_component_update_bits(comp, WCD9XXX_RX_BIAS_FLYB_BUFF, - WCD9XXX_RX_BIAS_FLYB_VNEG_5_UA_MASK, 0x0A); - /* Sleep needed to avoid click and pop as per HW requirement */ - usleep_range(100, 110); -} - -static void wcd_clsh_set_buck_regulator_mode(struct snd_soc_component *comp, - int mode) -{ - if (mode == CLS_AB) - snd_soc_component_update_bits(comp, WCD9XXX_A_ANA_RX_SUPPLIES, - WCD9XXX_A_ANA_RX_REGULATOR_MODE_MASK, - WCD9XXX_A_ANA_RX_REGULATOR_MODE_CLS_AB); - else - snd_soc_component_update_bits(comp, WCD9XXX_A_ANA_RX_SUPPLIES, - WCD9XXX_A_ANA_RX_REGULATOR_MODE_MASK, - WCD9XXX_A_ANA_RX_REGULATOR_MODE_CLS_H); -} - -static void wcd_clsh_state_lo(struct wcd_clsh_ctrl *ctrl, int req_state, - bool is_enable, int mode) -{ - struct snd_soc_component *comp = ctrl->comp; - - if (mode != CLS_AB) { - dev_err(comp->dev, "%s: LO cannot be in this mode: %d\n", - __func__, mode); - return; - } - - if (is_enable) { - wcd_clsh_set_buck_regulator_mode(comp, mode); - wcd_clsh_set_buck_mode(comp, mode); - wcd_clsh_set_flyback_mode(comp, mode); - wcd_clsh_flyback_ctrl(ctrl, mode, true); - wcd_clsh_set_flyback_current(comp, mode); - wcd_clsh_buck_ctrl(ctrl, mode, true); - } else { - wcd_clsh_buck_ctrl(ctrl, mode, false); - wcd_clsh_flyback_ctrl(ctrl, mode, false); - wcd_clsh_set_flyback_mode(comp, CLS_H_NORMAL); - wcd_clsh_set_buck_mode(comp, CLS_H_NORMAL); - wcd_clsh_set_buck_regulator_mode(comp, CLS_H_NORMAL); - } -} - -static void wcd_clsh_state_hph_r(struct wcd_clsh_ctrl *ctrl, int req_state, - bool is_enable, int mode) -{ - struct snd_soc_component *comp = ctrl->comp; - - if (mode == CLS_H_NORMAL) { - dev_err(comp->dev, "%s: Normal mode not applicable for hph_r\n", - __func__); - return; - } - - if (is_enable) { - if (mode != CLS_AB) { - wcd_enable_clsh_block(ctrl, true); - /* - * These K1 values depend on the Headphone Impedance - * For now it is assumed to be 16 ohm - */ - snd_soc_component_update_bits(comp, - WCD9XXX_A_CDC_CLSH_K1_MSB, - WCD9XXX_A_CDC_CLSH_K1_MSB_COEF_MASK, - 0x00); - snd_soc_component_update_bits(comp, - WCD9XXX_A_CDC_CLSH_K1_LSB, - WCD9XXX_A_CDC_CLSH_K1_LSB_COEF_MASK, - 0xC0); - snd_soc_component_update_bits(comp, - WCD9XXX_A_CDC_RX2_RX_PATH_CFG0, - WCD9XXX_A_CDC_RX_PATH_CLSH_EN_MASK, - WCD9XXX_A_CDC_RX_PATH_CLSH_ENABLE); - } - wcd_clsh_set_buck_regulator_mode(comp, mode); - wcd_clsh_set_flyback_mode(comp, mode); - wcd_clsh_flyback_ctrl(ctrl, mode, true); - wcd_clsh_set_flyback_current(comp, mode); - wcd_clsh_set_buck_mode(comp, mode); - wcd_clsh_buck_ctrl(ctrl, mode, true); - wcd_clsh_set_hph_mode(comp, mode); - wcd_clsh_set_gain_path(ctrl, mode); - } else { - wcd_clsh_set_hph_mode(comp, CLS_H_NORMAL); - - if (mode != CLS_AB) { - snd_soc_component_update_bits(comp, - WCD9XXX_A_CDC_RX2_RX_PATH_CFG0, - WCD9XXX_A_CDC_RX_PATH_CLSH_EN_MASK, - WCD9XXX_A_CDC_RX_PATH_CLSH_DISABLE); - wcd_enable_clsh_block(ctrl, false); - } - /* buck and flyback set to default mode and disable */ - wcd_clsh_buck_ctrl(ctrl, CLS_H_NORMAL, false); - wcd_clsh_flyback_ctrl(ctrl, CLS_H_NORMAL, false); - wcd_clsh_set_flyback_mode(comp, CLS_H_NORMAL); - wcd_clsh_set_buck_mode(comp, CLS_H_NORMAL); - wcd_clsh_set_buck_regulator_mode(comp, CLS_H_NORMAL); - } -} - -static void wcd_clsh_state_hph_l(struct wcd_clsh_ctrl *ctrl, int req_state, - bool is_enable, int mode) -{ - struct snd_soc_component *comp = ctrl->comp; - - if (mode == CLS_H_NORMAL) { - dev_err(comp->dev, "%s: Normal mode not applicable for hph_l\n", - __func__); - return; - } - - if (is_enable) { - if (mode != CLS_AB) { - wcd_enable_clsh_block(ctrl, true); - /* - * These K1 values depend on the Headphone Impedance - * For now it is assumed to be 16 ohm - */ - snd_soc_component_update_bits(comp, - WCD9XXX_A_CDC_CLSH_K1_MSB, - WCD9XXX_A_CDC_CLSH_K1_MSB_COEF_MASK, - 0x00); - snd_soc_component_update_bits(comp, - WCD9XXX_A_CDC_CLSH_K1_LSB, - WCD9XXX_A_CDC_CLSH_K1_LSB_COEF_MASK, - 0xC0); - snd_soc_component_update_bits(comp, - WCD9XXX_A_CDC_RX1_RX_PATH_CFG0, - WCD9XXX_A_CDC_RX_PATH_CLSH_EN_MASK, - WCD9XXX_A_CDC_RX_PATH_CLSH_ENABLE); - } - wcd_clsh_set_buck_regulator_mode(comp, mode); - wcd_clsh_set_flyback_mode(comp, mode); - wcd_clsh_flyback_ctrl(ctrl, mode, true); - wcd_clsh_set_flyback_current(comp, mode); - wcd_clsh_set_buck_mode(comp, mode); - wcd_clsh_buck_ctrl(ctrl, mode, true); - wcd_clsh_set_hph_mode(comp, mode); - wcd_clsh_set_gain_path(ctrl, mode); - } else { - wcd_clsh_set_hph_mode(comp, CLS_H_NORMAL); - - if (mode != CLS_AB) { - snd_soc_component_update_bits(comp, - WCD9XXX_A_CDC_RX1_RX_PATH_CFG0, - WCD9XXX_A_CDC_RX_PATH_CLSH_EN_MASK, - WCD9XXX_A_CDC_RX_PATH_CLSH_DISABLE); - wcd_enable_clsh_block(ctrl, false); - } - /* set buck and flyback to Default Mode */ - wcd_clsh_buck_ctrl(ctrl, CLS_H_NORMAL, false); - wcd_clsh_flyback_ctrl(ctrl, CLS_H_NORMAL, false); - wcd_clsh_set_flyback_mode(comp, CLS_H_NORMAL); - wcd_clsh_set_buck_mode(comp, CLS_H_NORMAL); - wcd_clsh_set_buck_regulator_mode(comp, CLS_H_NORMAL); - } -} - -static void wcd_clsh_state_ear(struct wcd_clsh_ctrl *ctrl, int req_state, - bool is_enable, int mode) -{ - struct snd_soc_component *comp = ctrl->comp; - - if (mode != CLS_H_NORMAL) { - dev_err(comp->dev, "%s: mode: %d cannot be used for EAR\n", - __func__, mode); - return; - } - - if (is_enable) { - wcd_enable_clsh_block(ctrl, true); - snd_soc_component_update_bits(comp, - WCD9XXX_A_CDC_RX0_RX_PATH_CFG0, - WCD9XXX_A_CDC_RX_PATH_CLSH_EN_MASK, - WCD9XXX_A_CDC_RX_PATH_CLSH_ENABLE); - wcd_clsh_set_buck_mode(comp, mode); - wcd_clsh_set_flyback_mode(comp, mode); - wcd_clsh_flyback_ctrl(ctrl, mode, true); - wcd_clsh_set_flyback_current(comp, mode); - wcd_clsh_buck_ctrl(ctrl, mode, true); - } else { - snd_soc_component_update_bits(comp, - WCD9XXX_A_CDC_RX0_RX_PATH_CFG0, - WCD9XXX_A_CDC_RX_PATH_CLSH_EN_MASK, - WCD9XXX_A_CDC_RX_PATH_CLSH_DISABLE); - wcd_enable_clsh_block(ctrl, false); - wcd_clsh_buck_ctrl(ctrl, mode, false); - wcd_clsh_flyback_ctrl(ctrl, mode, false); - wcd_clsh_set_flyback_mode(comp, CLS_H_NORMAL); - wcd_clsh_set_buck_mode(comp, CLS_H_NORMAL); - } -} - -static int _wcd_clsh_ctrl_set_state(struct wcd_clsh_ctrl *ctrl, int req_state, - bool is_enable, int mode) -{ - switch (req_state) { - case WCD_CLSH_STATE_EAR: - wcd_clsh_state_ear(ctrl, req_state, is_enable, mode); - break; - case WCD_CLSH_STATE_HPHL: - wcd_clsh_state_hph_l(ctrl, req_state, is_enable, mode); - break; - case WCD_CLSH_STATE_HPHR: - wcd_clsh_state_hph_r(ctrl, req_state, is_enable, mode); - break; - break; - case WCD_CLSH_STATE_LO: - wcd_clsh_state_lo(ctrl, req_state, is_enable, mode); - break; - default: - break; - } - - return 0; -} - -/* - * Function: wcd_clsh_is_state_valid - * Params: state - * Description: - * Provides information on valid states of Class H configuration - */ -static bool wcd_clsh_is_state_valid(int state) -{ - switch (state) { - case WCD_CLSH_STATE_IDLE: - case WCD_CLSH_STATE_EAR: - case WCD_CLSH_STATE_HPHL: - case WCD_CLSH_STATE_HPHR: - case WCD_CLSH_STATE_LO: - return true; - default: - return false; - }; -} - -/* - * Function: wcd_clsh_fsm - * Params: ctrl, req_state, req_type, clsh_event - * Description: - * This function handles PRE DAC and POST DAC conditions of different devices - * and updates class H configuration of different combination of devices - * based on validity of their states. ctrl will contain current - * class h state information - */ -int wcd_clsh_ctrl_set_state(struct wcd_clsh_ctrl *ctrl, - enum wcd_clsh_event clsh_event, - int nstate, - enum wcd_clsh_mode mode) -{ - struct snd_soc_component *comp = ctrl->comp; - - if (nstate == ctrl->state) - return 0; - - if (!wcd_clsh_is_state_valid(nstate)) { - dev_err(comp->dev, "Class-H not a valid new state:\n"); - return -EINVAL; - } - - switch (clsh_event) { - case WCD_CLSH_EVENT_PRE_DAC: - _wcd_clsh_ctrl_set_state(ctrl, nstate, CLSH_REQ_ENABLE, mode); - break; - case WCD_CLSH_EVENT_POST_PA: - _wcd_clsh_ctrl_set_state(ctrl, nstate, CLSH_REQ_DISABLE, mode); - break; - }; - - ctrl->state = nstate; - ctrl->mode = mode; - - return 0; -} - -int wcd_clsh_ctrl_get_state(struct wcd_clsh_ctrl *ctrl) -{ - return ctrl->state; -} - -struct wcd_clsh_ctrl *wcd_clsh_ctrl_alloc(struct snd_soc_component *comp, - int version) -{ - struct wcd_clsh_ctrl *ctrl; - - ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL); - if (!ctrl) - return ERR_PTR(-ENOMEM); - - ctrl->state = WCD_CLSH_STATE_IDLE; - ctrl->comp = comp; - - return ctrl; -} - -void wcd_clsh_ctrl_free(struct wcd_clsh_ctrl *ctrl) -{ - kfree(ctrl); -} diff --git a/sound/soc/codecs/wcd-clsh.h b/sound/soc/codecs/wcd-clsh.h deleted file mode 100644 index a902f9893467..000000000000 --- a/sound/soc/codecs/wcd-clsh.h +++ /dev/null @@ -1,49 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ - -#ifndef _WCD_CLSH_V2_H_ -#define _WCD_CLSH_V2_H_ -#include <sound/soc.h> - -enum wcd_clsh_event { - WCD_CLSH_EVENT_PRE_DAC = 1, - WCD_CLSH_EVENT_POST_PA, -}; - -/* - * Basic states for Class H state machine. - * represented as a bit mask within a u8 data type - * bit 0: EAR mode - * bit 1: HPH Left mode - * bit 2: HPH Right mode - * bit 3: Lineout mode - */ -#define WCD_CLSH_STATE_IDLE 0 -#define WCD_CLSH_STATE_EAR BIT(0) -#define WCD_CLSH_STATE_HPHL BIT(1) -#define WCD_CLSH_STATE_HPHR BIT(2) -#define WCD_CLSH_STATE_LO BIT(3) -#define WCD_CLSH_STATE_MAX 4 -#define NUM_CLSH_STATES_V2 BIT(WCD_CLSH_STATE_MAX) - -enum wcd_clsh_mode { - CLS_H_NORMAL = 0, /* Class-H Default */ - CLS_H_HIFI, /* Class-H HiFi */ - CLS_H_LP, /* Class-H Low Power */ - CLS_AB, /* Class-AB */ - CLS_H_LOHIFI, /* LoHIFI */ - CLS_NONE, /* None of the above modes */ -}; - -struct wcd_clsh_ctrl; - -extern struct wcd_clsh_ctrl *wcd_clsh_ctrl_alloc( - struct snd_soc_component *component, - int version); -extern void wcd_clsh_ctrl_free(struct wcd_clsh_ctrl *ctrl); -extern int wcd_clsh_ctrl_get_state(struct wcd_clsh_ctrl *ctrl); -extern int wcd_clsh_ctrl_set_state(struct wcd_clsh_ctrl *ctrl, - enum wcd_clsh_event event, - int state, - enum wcd_clsh_mode mode); - -#endif /* _WCD_CLSH_V2_H_ */ diff --git a/sound/soc/codecs/wcd9335.c b/sound/soc/codecs/wcd9335.c index 06c73699f16f..bd9de5d45fa9 100644 --- a/sound/soc/codecs/wcd9335.c +++ b/sound/soc/codecs/wcd9335.c @@ -21,7 +21,6 @@ #include <dt-bindings/mfd/wcd9335.h> #include <linux/mfd/wcd9335/wcd9335.h> #include <linux/mfd/wcd9335/registers.h> -#include "wcd-clsh.h" #define WCD9335_RATES_MASK (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\ SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\ @@ -182,7 +181,6 @@ struct wcd9335_codec { int sido_ccl_cnt; enum wcd_clock_type clk_type; - struct wcd_clsh_ctrl *clsh_ctrl; u32 hph_mode; }; @@ -1068,13 +1066,6 @@ static int wcd9335_codec_probe(struct snd_soc_component *component) int i; snd_soc_component_init_regmap(component, wcd->regmap); - /* Class-H Init*/ - wcd->clsh_ctrl = wcd_clsh_ctrl_alloc(component, wcd->version); - if (IS_ERR(wcd->clsh_ctrl)) - return PTR_ERR(wcd->clsh_ctrl); - - /* Default HPH Mode to Class-H HiFi */ - wcd->hph_mode = CLS_H_HIFI; wcd->component = component; wcd9335_codec_init(component); @@ -1089,7 +1080,6 @@ static void wcd9335_codec_remove(struct snd_soc_component *comp) { struct wcd9335_codec *wcd = dev_get_drvdata(comp->dev); - wcd_clsh_ctrl_free(wcd->clsh_ctrl); free_irq(regmap_irq_get_virq(wcd->irq_data, WCD9335_IRQ_SLIMBUS), wcd); } -- 2.18.0

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