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[alsa-devel] [asoc:for-4.18 48/50] sound/soc/intel/skylake/skl-pcm.c:1372:37: sparse: incorrect type in argument 1 (different base types)
by kbuild test robot 17 Apr '18
by kbuild test robot 17 Apr '18
17 Apr '18
tree: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-4.18
head: 5db6aab6f36f7560dc95f7ca340d5632b7a3be6a
commit: 81e9b0a078894841a50a8dd666fd64ca452a2a50 [48/50] ASoC: topology: Give more data to clients via callbacks
reproduce:
# apt-get install sparse
git checkout 81e9b0a078894841a50a8dd666fd64ca452a2a50
make ARCH=x86_64 allmodconfig
make C=1 CF=-D__CHECK_ENDIAN__
sparse warnings: (new ones prefixed by >>)
sound/soc/intel/skylake/skl-pcm.c:159:43: sparse: incorrect type in argument 3 (different base types) @@ expected unsigned int [unsigned] format @@ got restricted snd_unsigned int [unsigned] format @@
sound/soc/intel/skylake/skl-pcm.c:159:43: expected unsigned int [unsigned] format
sound/soc/intel/skylake/skl-pcm.c:159:43: got restricted snd_pcm_format_t [usertype] format
sound/soc/intel/skylake/skl-pcm.c:195:47: sparse: incorrect type in argument 3 (different base types) @@ expected unsigned int [unsigned] format @@ got restricted snd_unsigned int [unsigned] format @@
sound/soc/intel/skylake/skl-pcm.c:195:47: expected unsigned int [unsigned] format
sound/soc/intel/skylake/skl-pcm.c:195:47: got restricted snd_pcm_format_t [usertype] format
sound/soc/intel/skylake/skl-pcm.c:1351:25: sparse: undefined identifier 'skl_tplg_add_moduleid_in_bind_params'
>> sound/soc/intel/skylake/skl-pcm.c:1372:37: sparse: incorrect type in argument 1 (different base types) @@ expected struct snd_soc_platform *platform @@ got sstruct snd_soc_platform *platform @@
sound/soc/intel/skylake/skl-pcm.c:1372:37: expected struct snd_soc_platform *platform
sound/soc/intel/skylake/skl-pcm.c:1372:37: got struct snd_soc_component *component
>> sound/soc/intel/skylake/skl-pcm.c:1351:61: sparse: call with no type!
sound/soc/intel/skylake/skl-pcm.c: In function 'skl_populate_modules':
sound/soc/intel/skylake/skl-pcm.c:1351:4: error: implicit declaration of function 'skl_tplg_add_moduleid_in_bind_params'; did you mean 'skl_tplg_update_pipe_params'? [-Werror=implicit-function-declaration]
skl_tplg_add_moduleid_in_bind_params(skl, w);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
skl_tplg_update_pipe_params
sound/soc/intel/skylake/skl-pcm.c: In function 'skl_platform_soc_probe':
sound/soc/intel/skylake/skl-pcm.c:1372:23: error: passing argument 1 of 'skl_tplg_init' from incompatible pointer type [-Werror=incompatible-pointer-types]
ret = skl_tplg_init(component, ebus);
^~~~~~~~~
In file included from sound/soc/intel/skylake/skl-pcm.c:28:0:
sound/soc/intel/skylake/skl-topology.h:463:5: note: expected 'struct snd_soc_platform *' but argument is of type 'struct snd_soc_component *'
int skl_tplg_init(struct snd_soc_platform *platform,
^~~~~~~~~~~~~
cc1: some warnings being treated as errors
vim +1372 sound/soc/intel/skylake/skl-pcm.c
b26199ea Jeeja KP 2017-03-24 1330
64cb1d0a Vinod Koul 2016-08-10 1331 static int skl_populate_modules(struct skl *skl)
64cb1d0a Vinod Koul 2016-08-10 1332 {
64cb1d0a Vinod Koul 2016-08-10 1333 struct skl_pipeline *p;
64cb1d0a Vinod Koul 2016-08-10 1334 struct skl_pipe_module *m;
64cb1d0a Vinod Koul 2016-08-10 1335 struct snd_soc_dapm_widget *w;
64cb1d0a Vinod Koul 2016-08-10 1336 struct skl_module_cfg *mconfig;
b26199ea Jeeja KP 2017-03-24 1337 int ret = 0;
64cb1d0a Vinod Koul 2016-08-10 1338
64cb1d0a Vinod Koul 2016-08-10 1339 list_for_each_entry(p, &skl->ppl_list, node) {
64cb1d0a Vinod Koul 2016-08-10 1340 list_for_each_entry(m, &p->pipe->w_list, node) {
64cb1d0a Vinod Koul 2016-08-10 1341 w = m->w;
64cb1d0a Vinod Koul 2016-08-10 1342 mconfig = w->priv;
64cb1d0a Vinod Koul 2016-08-10 1343
b26199ea Jeeja KP 2017-03-24 1344 ret = skl_get_module_info(skl, mconfig);
64cb1d0a Vinod Koul 2016-08-10 1345 if (ret < 0) {
64cb1d0a Vinod Koul 2016-08-10 1346 dev_err(skl->skl_sst->dev,
b26199ea Jeeja KP 2017-03-24 1347 "query module info failed\n");
b26199ea Jeeja KP 2017-03-24 1348 return ret;
64cb1d0a Vinod Koul 2016-08-10 1349 }
f7a9f772 Sriram Periyasamy 2018-01-27 1350
f7a9f772 Sriram Periyasamy 2018-01-27 @1351 skl_tplg_add_moduleid_in_bind_params(skl, w);
64cb1d0a Vinod Koul 2016-08-10 1352 }
64cb1d0a Vinod Koul 2016-08-10 1353 }
b26199ea Jeeja KP 2017-03-24 1354
64cb1d0a Vinod Koul 2016-08-10 1355 return ret;
64cb1d0a Vinod Koul 2016-08-10 1356 }
64cb1d0a Vinod Koul 2016-08-10 1357
56b03b4c Kuninori Morimoto 2018-01-29 1358 static int skl_platform_soc_probe(struct snd_soc_component *component)
b663a8c5 Jeeja KP 2015-10-07 1359 {
56b03b4c Kuninori Morimoto 2018-01-29 1360 struct hdac_ext_bus *ebus = dev_get_drvdata(component->dev);
fe3f4442 Dharageswari R 2016-06-03 1361 struct skl *skl = ebus_to_skl(ebus);
78cdbbda Vinod Koul 2016-07-26 1362 const struct skl_dsp_ops *ops;
fe3f4442 Dharageswari R 2016-06-03 1363 int ret;
b663a8c5 Jeeja KP 2015-10-07 1364
56b03b4c Kuninori Morimoto 2018-01-29 1365 pm_runtime_get_sync(component->dev);
ec8ae570 Vinod Koul 2016-08-04 1366 if ((ebus_to_hbus(ebus))->ppcap) {
56b03b4c Kuninori Morimoto 2018-01-29 1367 skl->component = component;
5cdf6c09 Vinod Koul 2017-06-30 1368
5cdf6c09 Vinod Koul 2017-06-30 1369 /* init debugfs */
5cdf6c09 Vinod Koul 2017-06-30 1370 skl->debugfs = skl_debugfs_init(skl);
5cdf6c09 Vinod Koul 2017-06-30 1371
56b03b4c Kuninori Morimoto 2018-01-29 @1372 ret = skl_tplg_init(component, ebus);
fe3f4442 Dharageswari R 2016-06-03 1373 if (ret < 0) {
56b03b4c Kuninori Morimoto 2018-01-29 1374 dev_err(component->dev, "Failed to init topology!\n");
fe3f4442 Dharageswari R 2016-06-03 1375 return ret;
fe3f4442 Dharageswari R 2016-06-03 1376 }
78cdbbda Vinod Koul 2016-07-26 1377
78cdbbda Vinod Koul 2016-07-26 1378 /* load the firmwares, since all is set */
78cdbbda Vinod Koul 2016-07-26 1379 ops = skl_get_dsp_ops(skl->pci->device);
78cdbbda Vinod Koul 2016-07-26 1380 if (!ops)
78cdbbda Vinod Koul 2016-07-26 1381 return -EIO;
78cdbbda Vinod Koul 2016-07-26 1382
78cdbbda Vinod Koul 2016-07-26 1383 if (skl->skl_sst->is_first_boot == false) {
56b03b4c Kuninori Morimoto 2018-01-29 1384 dev_err(component->dev, "DSP reports first boot done!!!\n");
78cdbbda Vinod Koul 2016-07-26 1385 return -EIO;
78cdbbda Vinod Koul 2016-07-26 1386 }
78cdbbda Vinod Koul 2016-07-26 1387
fc9fdd61 Sanyog Kale 2018-03-13 1388 /*
fc9fdd61 Sanyog Kale 2018-03-13 1389 * Disable dynamic clock and power gating during firmware
fc9fdd61 Sanyog Kale 2018-03-13 1390 * and library download
fc9fdd61 Sanyog Kale 2018-03-13 1391 */
56b03b4c Kuninori Morimoto 2018-01-29 1392 skl->skl_sst->enable_miscbdcge(component->dev, false);
fc9fdd61 Sanyog Kale 2018-03-13 1393 skl->skl_sst->clock_power_gating(component->dev, false);
d5cc0a1f Pardha Saradhi K 2018-01-02 1394
56b03b4c Kuninori Morimoto 2018-01-29 1395 ret = ops->init_fw(component->dev, skl->skl_sst);
56b03b4c Kuninori Morimoto 2018-01-29 1396 skl->skl_sst->enable_miscbdcge(component->dev, true);
fc9fdd61 Sanyog Kale 2018-03-13 1397 skl->skl_sst->clock_power_gating(component->dev, true);
78cdbbda Vinod Koul 2016-07-26 1398 if (ret < 0) {
56b03b4c Kuninori Morimoto 2018-01-29 1399 dev_err(component->dev, "Failed to boot first fw: %d\n", ret);
78cdbbda Vinod Koul 2016-07-26 1400 return ret;
78cdbbda Vinod Koul 2016-07-26 1401 }
64cb1d0a Vinod Koul 2016-08-10 1402 skl_populate_modules(skl);
a26a3f53 Pardha Saradhi K 2016-11-03 1403 skl->skl_sst->update_d0i3c = skl_update_d0i3c;
cb729d80 G Kranthi 2017-03-13 1404 skl_dsp_enable_notification(skl->skl_sst, false);
9452314d Pradeep Tewani 2017-12-06 1405
9452314d Pradeep Tewani 2017-12-06 1406 if (skl->cfg.astate_cfg != NULL) {
9452314d Pradeep Tewani 2017-12-06 1407 skl_dsp_set_astate_cfg(skl->skl_sst,
9452314d Pradeep Tewani 2017-12-06 1408 skl->cfg.astate_cfg->count,
9452314d Pradeep Tewani 2017-12-06 1409 skl->cfg.astate_cfg);
9452314d Pradeep Tewani 2017-12-06 1410 }
fe3f4442 Dharageswari R 2016-06-03 1411 }
56b03b4c Kuninori Morimoto 2018-01-29 1412 pm_runtime_mark_last_busy(component->dev);
56b03b4c Kuninori Morimoto 2018-01-29 1413 pm_runtime_put_autosuspend(component->dev);
b663a8c5 Jeeja KP 2015-10-07 1414
b663a8c5 Jeeja KP 2015-10-07 1415 return 0;
b663a8c5 Jeeja KP 2015-10-07 1416 }
56b03b4c Kuninori Morimoto 2018-01-29 1417
:::::: The code at line 1372 was first introduced by commit
:::::: 56b03b4c4f5e8e1a44328b2df75bfb31fc4c3609 ASoC: intel: skylake: replace platform to component
:::::: TO: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com>
:::::: CC: Mark Brown <broonie(a)kernel.org>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
1
0
Re: [alsa-devel] [PATCH v2 00/21] Allow compile-testing NO_DMA (drivers)
by Geert Uytterhoeven 17 Apr '18
by Geert Uytterhoeven 17 Apr '18
17 Apr '18
Hi Rob,
On Thu, Apr 5, 2018 at 2:32 AM, Rob Herring <robherring2(a)gmail.com> wrote:
> On Fri, Mar 16, 2018 at 8:51 AM, Geert Uytterhoeven
> <geert(a)linux-m68k.org> wrote:
>> If NO_DMA=y, get_dma_ops() returns a reference to the non-existing
>> symbol bad_dma_ops, thus causing a link failure if it is ever used.
>>
>> The intention of this is twofold:
>> 1. To catch users of the DMA API on systems that do no support the DMA
>> mapping API,
>> 2. To avoid building drivers that cannot work on such systems anyway.
>>
>> However, the disadvantage is that we have to keep on adding dependencies
>> on HAS_DMA all over the place.
>>
>> Thanks to the COMPILE_TEST symbol, lots of drivers now depend on one or
>> more platform dependencies (that imply HAS_DMA) || COMPILE_TEST, thus
>> already covering intention #2. Having to add an explicit dependency on
>> HAS_DMA here is cumbersome, and hinders compile-testing.
>
> The same can be said for CONFIG_IOMEM and CONFIG_OF. Any plans to
> remove those too? CONFIG_IOMEM is mostly just a !CONFIG_UM option.
Perhaps, if time permits...
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert(a)linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
1
0
[alsa-devel] [asoc:for-4.18 48/50] sound/soc/intel/skylake/skl-pcm.c:1351:4: error: implicit declaration of function 'skl_tplg_add_moduleid_in_bind_params'; did you mean 'skl_tplg_update_pipe_params'?
by kbuild test robot 17 Apr '18
by kbuild test robot 17 Apr '18
17 Apr '18
tree: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-4.18
head: 5db6aab6f36f7560dc95f7ca340d5632b7a3be6a
commit: 81e9b0a078894841a50a8dd666fd64ca452a2a50 [48/50] ASoC: topology: Give more data to clients via callbacks
config: i386-randconfig-x014-201815 (attached as .config)
compiler: gcc-7 (Debian 7.3.0-1) 7.3.0
reproduce:
git checkout 81e9b0a078894841a50a8dd666fd64ca452a2a50
# save the attached .config to linux build tree
make ARCH=i386
All errors (new ones prefixed by >>):
sound/soc/intel/skylake/skl-pcm.c: In function 'skl_populate_modules':
>> sound/soc/intel/skylake/skl-pcm.c:1351:4: error: implicit declaration of function 'skl_tplg_add_moduleid_in_bind_params'; did you mean 'skl_tplg_update_pipe_params'? [-Werror=implicit-function-declaration]
skl_tplg_add_moduleid_in_bind_params(skl, w);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
skl_tplg_update_pipe_params
sound/soc/intel/skylake/skl-pcm.c: In function 'skl_platform_soc_probe':
>> sound/soc/intel/skylake/skl-pcm.c:1372:23: error: passing argument 1 of 'skl_tplg_init' from incompatible pointer type [-Werror=incompatible-pointer-types]
ret = skl_tplg_init(component, ebus);
^~~~~~~~~
In file included from sound/soc/intel/skylake/skl-pcm.c:28:0:
sound/soc/intel/skylake/skl-topology.h:463:5: note: expected 'struct snd_soc_platform *' but argument is of type 'struct snd_soc_component *'
int skl_tplg_init(struct snd_soc_platform *platform,
^~~~~~~~~~~~~
Cyclomatic Complexity 5 include/linux/compiler.h:__read_once_size
Cyclomatic Complexity 5 include/linux/compiler.h:__write_once_size
Cyclomatic Complexity 4 include/linux/string.h:memcpy
Cyclomatic Complexity 4 include/linux/string.h:memcmp
Cyclomatic Complexity 3 include/linux/string.h:kmemdup
Cyclomatic Complexity 1 include/linux/uuid.h:uuid_le_cmp
Cyclomatic Complexity 1 arch/x86/include/asm/bitops.h:__ffs
Cyclomatic Complexity 1 arch/x86/include/asm/bitops.h:fls
Cyclomatic Complexity 1 include/linux/log2.h:__ilog2_u32
Cyclomatic Complexity 2 arch/x86/include/asm/div64.h:div_u64_rem
Cyclomatic Complexity 1 include/linux/list.h:INIT_LIST_HEAD
Cyclomatic Complexity 1 include/linux/list.h:__list_del
Cyclomatic Complexity 1 include/linux/list.h:list_empty
Cyclomatic Complexity 1 include/asm-generic/getorder.h:__get_order
Cyclomatic Complexity 1 include/linux/math64.h:div_u64
Cyclomatic Complexity 1 include/linux/spinlock.h:spinlock_check
Cyclomatic Complexity 1 include/linux/spinlock.h:spin_unlock_irqrestore
Cyclomatic Complexity 1 include/linux/time32.h:timespec64_to_timespec
Cyclomatic Complexity 1 include/linux/device.h:dev_get_drvdata
Cyclomatic Complexity 1 arch/x86/include/asm/io.h:readl
Cyclomatic Complexity 67 include/linux/slab.h:kmalloc_large
Cyclomatic Complexity 3 include/linux/slab.h:kmalloc
Cyclomatic Complexity 1 include/linux/slab.h:kzalloc
Cyclomatic Complexity 1 include/linux/pm_runtime.h:pm_runtime_mark_last_busy
Cyclomatic Complexity 1 include/sound/pcm.h:bytes_to_frames
Cyclomatic Complexity 1 include/sound/pcm.h:snd_pcm_trigger_done
Cyclomatic Complexity 1 include/sound/pcm.h:hw_param_mask_c
Cyclomatic Complexity 1 include/sound/pcm.h:hw_param_interval_c
Cyclomatic Complexity 1 include/sound/pcm.h:params_channels
Cyclomatic Complexity 1 include/sound/pcm.h:params_rate
Cyclomatic Complexity 1 include/sound/pcm.h:params_buffer_bytes
Cyclomatic Complexity 3 include/sound/pcm_params.h:snd_mask_min
Cyclomatic Complexity 1 include/sound/pcm_params.h:params_format
Cyclomatic Complexity 2 include/sound/soc-dai.h:snd_soc_dai_get_dma_data
Cyclomatic Complexity 2 include/sound/soc-dai.h:snd_soc_dai_set_dma_data
Cyclomatic Complexity 1 include/sound/hda_register.h:snd_hdac_stream_get_pos_lpib
Cyclomatic Complexity 1 include/sound/hda_register.h:snd_hdac_stream_get_pos_posbuf
Cyclomatic Complexity 1 sound/soc/intel/skylake/skl-pcm.c:get_hdac_ext_stream
Cyclomatic Complexity 2 sound/soc/intel/skylake/skl-pcm.c:skl_get_host_stream_type
Cyclomatic Complexity 4 sound/soc/intel/skylake/skl-pcm.c:skl_adjust_codec_delay
Cyclomatic Complexity 2 sound/soc/intel/skylake/skl-topology.h:get_skl_ctx
Cyclomatic Complexity 2 sound/soc/intel/skylake/skl-pcm.c:get_bus_ctx
Cyclomatic Complexity 5 sound/soc/intel/skylake/skl-pcm.c:skl_decoupled_trigger
Cyclomatic Complexity 11 sound/soc/intel/skylake/skl-pcm.c:skl_pcm_trigger
Cyclomatic Complexity 1 sound/soc/intel/skylake/skl-pcm.c:skl_substream_free_pages
Cyclomatic Complexity 4 sound/soc/intel/skylake/skl-pcm.c:skl_pcm_hw_free
Cyclomatic Complexity 1 sound/soc/intel/skylake/skl-pcm.c:skl_substream_alloc_pages
Cyclomatic Complexity 7 sound/soc/intel/skylake/skl-pcm.c:skl_pcm_hw_params
Cyclomatic Complexity 7 sound/soc/intel/skylake/skl-pcm.c:skl_set_suspend_active
Cyclomatic Complexity 6 sound/soc/intel/skylake/skl-pcm.c:skl_pcm_close
Cyclomatic Complexity 1 sound/soc/intel/skylake/skl-pcm.c:skl_set_pcm_constrains
Cyclomatic Complexity 7 sound/soc/intel/skylake/skl-pcm.c:skl_pcm_open
Cyclomatic Complexity 1 include/linux/timekeeping32.h:ktime_get_ts
Cyclomatic Complexity 1 include/linux/timekeeping32.h:getrawmonotonic
Cyclomatic Complexity 1 include/linux/timekeeping32.h:getnstimeofday
Cyclomatic Complexity 3 include/sound/pcm.h:snd_pcm_gettime
Cyclomatic Complexity 4 sound/soc/intel/skylake/skl-pcm.c:skl_get_time_info
Cyclomatic Complexity 3 sound/soc/intel/skylake/skl-pcm.c:skl_platform_pcm_pointer
Cyclomatic Complexity 15 sound/soc/intel/skylake/skl-pcm.c:skl_coupled_trigger
Cyclomatic Complexity 2 sound/soc/intel/skylake/skl-pcm.c:skl_platform_pcm_trigger
Cyclomatic Complexity 2 sound/soc/intel/skylake/skl-pcm.c:skl_platform_open
Cyclomatic Complexity 1 sound/soc/intel/skylake/skl-pcm.c:skl_pcm_free
Cyclomatic Complexity 6 sound/soc/intel/skylake/skl-pcm.c:skl_pcm_new
Cyclomatic Complexity 1 include/linux/pm_runtime.h:pm_runtime_get_sync
Cyclomatic Complexity 19 sound/soc/intel/skylake/skl-pcm.c:skl_get_module_info
Cyclomatic Complexity 8 sound/soc/intel/skylake/skl-pcm.c:skl_populate_modules
Cyclomatic Complexity 1 include/linux/pm_runtime.h:pm_runtime_put_autosuspend
Cyclomatic Complexity 8 sound/soc/intel/skylake/skl-pcm.c:skl_platform_soc_probe
Cyclomatic Complexity 1 sound/soc/intel/skylake/skl-pcm.c:skl_be_hw_params
Cyclomatic Complexity 5 sound/soc/intel/skylake/skl-pcm.c:skl_link_pcm_trigger
Cyclomatic Complexity 4 sound/soc/intel/skylake/skl-pcm.c:skl_link_pcm_prepare
Cyclomatic Complexity 3 sound/soc/intel/skylake/skl-pcm.c:skl_link_hw_free
Cyclomatic Complexity 4 sound/soc/intel/skylake/skl-pcm.c:skl_link_hw_params
Cyclomatic Complexity 2 include/linux/list.h:__list_del_entry
Cyclomatic Complexity 1 include/linux/list.h:list_del
Cyclomatic Complexity 6 sound/soc/intel/skylake/skl-pcm.c:skl_pcm_host_dma_prepare
Cyclomatic Complexity 8 sound/soc/intel/skylake/skl-pcm.c:skl_pcm_prepare
Cyclomatic Complexity 8 sound/soc/intel/skylake/skl-pcm.c:skl_pcm_link_dma_prepare
Cyclomatic Complexity 1 sound/soc/intel/skylake/skl-pcm.c:skl_dai_load
Cyclomatic Complexity 6 sound/soc/intel/skylake/skl-pcm.c:skl_platform_register
Cyclomatic Complexity 7 sound/soc/intel/skylake/skl-pcm.c:skl_platform_unregister
cc1: some warnings being treated as errors
--
sound/soc/intel/skylake/skl-topology.c: In function 'skl_fill_sink_instance_id':
>> sound/soc/intel/skylake/skl-topology.c:833:45: error: 'struct skl_kpb_params' has no member named 'u'
struct skl_mod_inst_map *inst = kpb_params->u.map;
^~
sound/soc/intel/skylake/skl-topology.c: In function 'skl_tplg_find_moduleid_from_uuid':
sound/soc/intel/skylake/skl-topology.c:953:17: error: 'struct skl_kpb_params' has no member named 'u'
&uuid_params->u.map_uuid[i].mod_uuid);
^~
sound/soc/intel/skylake/skl-topology.c:959:10: error: 'struct skl_kpb_params' has no member named 'u'
params->u.map[i].mod_id = module_id;
^~
sound/soc/intel/skylake/skl-topology.c:960:10: error: 'struct skl_kpb_params' has no member named 'u'
params->u.map[i].inst_id =
^~
sound/soc/intel/skylake/skl-topology.c:961:16: error: 'struct skl_kpb_params' has no member named 'u'
uuid_params->u.map_uuid[i].inst_id;
^~
sound/soc/intel/skylake/skl-topology.c: At top level:
>> sound/soc/intel/skylake/skl-topology.c:3544:5: error: conflicting types for 'skl_tplg_init'
int skl_tplg_init(struct snd_soc_component *component, struct hdac_ext_bus *ebus)
^~~~~~~~~~~~~
In file included from sound/soc/intel/skylake/skl-topology.c:27:0:
sound/soc/intel/skylake/skl-topology.h:463:5: note: previous declaration of 'skl_tplg_init' was here
int skl_tplg_init(struct snd_soc_platform *platform,
^~~~~~~~~~~~~
vim +1351 sound/soc/intel/skylake/skl-pcm.c
b26199ea Jeeja KP 2017-03-24 1330
64cb1d0a Vinod Koul 2016-08-10 1331 static int skl_populate_modules(struct skl *skl)
64cb1d0a Vinod Koul 2016-08-10 1332 {
64cb1d0a Vinod Koul 2016-08-10 1333 struct skl_pipeline *p;
64cb1d0a Vinod Koul 2016-08-10 1334 struct skl_pipe_module *m;
64cb1d0a Vinod Koul 2016-08-10 1335 struct snd_soc_dapm_widget *w;
64cb1d0a Vinod Koul 2016-08-10 1336 struct skl_module_cfg *mconfig;
b26199ea Jeeja KP 2017-03-24 1337 int ret = 0;
64cb1d0a Vinod Koul 2016-08-10 1338
64cb1d0a Vinod Koul 2016-08-10 1339 list_for_each_entry(p, &skl->ppl_list, node) {
64cb1d0a Vinod Koul 2016-08-10 1340 list_for_each_entry(m, &p->pipe->w_list, node) {
64cb1d0a Vinod Koul 2016-08-10 1341 w = m->w;
64cb1d0a Vinod Koul 2016-08-10 1342 mconfig = w->priv;
64cb1d0a Vinod Koul 2016-08-10 1343
b26199ea Jeeja KP 2017-03-24 1344 ret = skl_get_module_info(skl, mconfig);
64cb1d0a Vinod Koul 2016-08-10 1345 if (ret < 0) {
64cb1d0a Vinod Koul 2016-08-10 1346 dev_err(skl->skl_sst->dev,
b26199ea Jeeja KP 2017-03-24 1347 "query module info failed\n");
b26199ea Jeeja KP 2017-03-24 1348 return ret;
64cb1d0a Vinod Koul 2016-08-10 1349 }
f7a9f772 Sriram Periyasamy 2018-01-27 1350
f7a9f772 Sriram Periyasamy 2018-01-27 @1351 skl_tplg_add_moduleid_in_bind_params(skl, w);
64cb1d0a Vinod Koul 2016-08-10 1352 }
64cb1d0a Vinod Koul 2016-08-10 1353 }
b26199ea Jeeja KP 2017-03-24 1354
64cb1d0a Vinod Koul 2016-08-10 1355 return ret;
64cb1d0a Vinod Koul 2016-08-10 1356 }
64cb1d0a Vinod Koul 2016-08-10 1357
56b03b4c Kuninori Morimoto 2018-01-29 1358 static int skl_platform_soc_probe(struct snd_soc_component *component)
b663a8c5 Jeeja KP 2015-10-07 1359 {
56b03b4c Kuninori Morimoto 2018-01-29 1360 struct hdac_ext_bus *ebus = dev_get_drvdata(component->dev);
fe3f4442 Dharageswari R 2016-06-03 1361 struct skl *skl = ebus_to_skl(ebus);
78cdbbda Vinod Koul 2016-07-26 1362 const struct skl_dsp_ops *ops;
fe3f4442 Dharageswari R 2016-06-03 1363 int ret;
b663a8c5 Jeeja KP 2015-10-07 1364
56b03b4c Kuninori Morimoto 2018-01-29 1365 pm_runtime_get_sync(component->dev);
ec8ae570 Vinod Koul 2016-08-04 1366 if ((ebus_to_hbus(ebus))->ppcap) {
56b03b4c Kuninori Morimoto 2018-01-29 1367 skl->component = component;
5cdf6c09 Vinod Koul 2017-06-30 1368
5cdf6c09 Vinod Koul 2017-06-30 1369 /* init debugfs */
5cdf6c09 Vinod Koul 2017-06-30 1370 skl->debugfs = skl_debugfs_init(skl);
5cdf6c09 Vinod Koul 2017-06-30 1371
56b03b4c Kuninori Morimoto 2018-01-29 @1372 ret = skl_tplg_init(component, ebus);
fe3f4442 Dharageswari R 2016-06-03 1373 if (ret < 0) {
56b03b4c Kuninori Morimoto 2018-01-29 1374 dev_err(component->dev, "Failed to init topology!\n");
fe3f4442 Dharageswari R 2016-06-03 1375 return ret;
fe3f4442 Dharageswari R 2016-06-03 1376 }
78cdbbda Vinod Koul 2016-07-26 1377
78cdbbda Vinod Koul 2016-07-26 1378 /* load the firmwares, since all is set */
78cdbbda Vinod Koul 2016-07-26 1379 ops = skl_get_dsp_ops(skl->pci->device);
78cdbbda Vinod Koul 2016-07-26 1380 if (!ops)
78cdbbda Vinod Koul 2016-07-26 1381 return -EIO;
78cdbbda Vinod Koul 2016-07-26 1382
78cdbbda Vinod Koul 2016-07-26 1383 if (skl->skl_sst->is_first_boot == false) {
56b03b4c Kuninori Morimoto 2018-01-29 1384 dev_err(component->dev, "DSP reports first boot done!!!\n");
78cdbbda Vinod Koul 2016-07-26 1385 return -EIO;
78cdbbda Vinod Koul 2016-07-26 1386 }
78cdbbda Vinod Koul 2016-07-26 1387
fc9fdd61 Sanyog Kale 2018-03-13 1388 /*
fc9fdd61 Sanyog Kale 2018-03-13 1389 * Disable dynamic clock and power gating during firmware
fc9fdd61 Sanyog Kale 2018-03-13 1390 * and library download
fc9fdd61 Sanyog Kale 2018-03-13 1391 */
56b03b4c Kuninori Morimoto 2018-01-29 1392 skl->skl_sst->enable_miscbdcge(component->dev, false);
fc9fdd61 Sanyog Kale 2018-03-13 1393 skl->skl_sst->clock_power_gating(component->dev, false);
d5cc0a1f Pardha Saradhi K 2018-01-02 1394
56b03b4c Kuninori Morimoto 2018-01-29 1395 ret = ops->init_fw(component->dev, skl->skl_sst);
56b03b4c Kuninori Morimoto 2018-01-29 1396 skl->skl_sst->enable_miscbdcge(component->dev, true);
fc9fdd61 Sanyog Kale 2018-03-13 1397 skl->skl_sst->clock_power_gating(component->dev, true);
78cdbbda Vinod Koul 2016-07-26 1398 if (ret < 0) {
56b03b4c Kuninori Morimoto 2018-01-29 1399 dev_err(component->dev, "Failed to boot first fw: %d\n", ret);
78cdbbda Vinod Koul 2016-07-26 1400 return ret;
78cdbbda Vinod Koul 2016-07-26 1401 }
64cb1d0a Vinod Koul 2016-08-10 1402 skl_populate_modules(skl);
a26a3f53 Pardha Saradhi K 2016-11-03 1403 skl->skl_sst->update_d0i3c = skl_update_d0i3c;
cb729d80 G Kranthi 2017-03-13 1404 skl_dsp_enable_notification(skl->skl_sst, false);
9452314d Pradeep Tewani 2017-12-06 1405
9452314d Pradeep Tewani 2017-12-06 1406 if (skl->cfg.astate_cfg != NULL) {
9452314d Pradeep Tewani 2017-12-06 1407 skl_dsp_set_astate_cfg(skl->skl_sst,
9452314d Pradeep Tewani 2017-12-06 1408 skl->cfg.astate_cfg->count,
9452314d Pradeep Tewani 2017-12-06 1409 skl->cfg.astate_cfg);
9452314d Pradeep Tewani 2017-12-06 1410 }
fe3f4442 Dharageswari R 2016-06-03 1411 }
56b03b4c Kuninori Morimoto 2018-01-29 1412 pm_runtime_mark_last_busy(component->dev);
56b03b4c Kuninori Morimoto 2018-01-29 1413 pm_runtime_put_autosuspend(component->dev);
b663a8c5 Jeeja KP 2015-10-07 1414
b663a8c5 Jeeja KP 2015-10-07 1415 return 0;
b663a8c5 Jeeja KP 2015-10-07 1416 }
56b03b4c Kuninori Morimoto 2018-01-29 1417
:::::: The code at line 1351 was first introduced by commit
:::::: f7a9f77256e7fbd6150651bfab44f60c39f0b7a2 ASoC: Intel: Skylake: Find module id from UUID for bind params
:::::: TO: Sriram Periyasamy <sriramx.periyasamy(a)intel.com>
:::::: CC: Mark Brown <broonie(a)kernel.org>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
1
0
17 Apr '18
fixed checkpatch pl warnings.
Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda(a)amd.com>
---
sound/soc/amd/acp-pcm-dma.c | 259 ++++++++++++++++++++++++--------------------
sound/soc/amd/acp.h | 22 ++--
2 files changed, 153 insertions(+), 128 deletions(-)
diff --git a/sound/soc/amd/acp-pcm-dma.c b/sound/soc/amd/acp-pcm-dma.c
index 540088d..5ffe2ef 100644
--- a/sound/soc/amd/acp-pcm-dma.c
+++ b/sound/soc/amd/acp-pcm-dma.c
@@ -130,7 +130,8 @@ static void acp_reg_write(u32 val, void __iomem *acp_mmio, u32 reg)
writel(val, acp_mmio + (reg * 4));
}
-/* Configure a given dma channel parameters - enable/disable,
+/*
+ * Configure a given dma channel parameters - enable/disable,
* number of descriptors, priority
*/
static void config_acp_dma_channel(void __iomem *acp_mmio, u8 ch_num,
@@ -149,11 +150,12 @@ static void config_acp_dma_channel(void __iomem *acp_mmio, u8 ch_num,
& dscr_strt_idx),
acp_mmio, mmACP_DMA_DSCR_STRT_IDX_0 + ch_num);
- /* program a DMA channel with the number of descriptors to be
+ /*
+ * program a DMA channel with the number of descriptors to be
* processed in the transfer
- */
+ */
acp_reg_write(ACP_DMA_DSCR_CNT_0__DMAChDscrCnt_MASK & num_dscrs,
- acp_mmio, mmACP_DMA_DSCR_CNT_0 + ch_num);
+ acp_mmio, mmACP_DMA_DSCR_CNT_0 + ch_num);
/* set DMA channel priority */
acp_reg_write(priority_level, acp_mmio, mmACP_DMA_PRIO_0 + ch_num);
@@ -180,13 +182,15 @@ static void config_dma_descriptor_in_sram(void __iomem *acp_mmio,
acp_reg_write(descr_info->xfer_val, acp_mmio, mmACP_SRBM_Targ_Idx_Data);
}
-/* Initialize the DMA descriptor information for transfer between
+/*
+ * Initialize the DMA descriptor information for transfer between
* system memory <-> ACP SRAM
*/
static void set_acp_sysmem_dma_descriptors(void __iomem *acp_mmio,
- u32 size, int direction, u32 pte_offset,
- u16 ch, u32 sram_bank,
- u16 dma_dscr_idx, u32 asic_type)
+ u32 size, int direction,
+ u32 pte_offset, u16 ch,
+ u32 sram_bank, u16 dma_dscr_idx,
+ u32 asic_type)
{
u16 i;
acp_dma_dscr_transfer_t dmadscr[NUM_DSCRS_PER_CHANNEL];
@@ -195,58 +199,58 @@ static void set_acp_sysmem_dma_descriptors(void __iomem *acp_mmio,
dmadscr[i].xfer_val = 0;
if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
dma_dscr_idx = dma_dscr_idx + i;
- dmadscr[i].dest = sram_bank + (i * (size/2));
+ dmadscr[i].dest = sram_bank + (i * (size / 2));
dmadscr[i].src = ACP_INTERNAL_APERTURE_WINDOW_0_ADDRESS
- + (pte_offset * SZ_4K) + (i * (size/2));
+ + (pte_offset * SZ_4K) + (i * (size / 2));
switch (asic_type) {
case CHIP_STONEY:
dmadscr[i].xfer_val |=
- (ACP_DMA_ATTRIBUTES_DAGB_GARLIC_TO_SHAREDMEM << 16) |
+ (ACP_DMA_ATTR_DAGB_GARLIC_TO_SHAREDMEM << 16) |
(size / 2);
break;
default:
dmadscr[i].xfer_val |=
- (ACP_DMA_ATTRIBUTES_DAGB_ONION_TO_SHAREDMEM << 16) |
+ (ACP_DMA_ATTR_DAGB_ONION_TO_SHAREDMEM << 16) |
(size / 2);
}
} else {
dma_dscr_idx = dma_dscr_idx + i;
- dmadscr[i].src = sram_bank + (i * (size/2));
+ dmadscr[i].src = sram_bank + (i * (size / 2));
dmadscr[i].dest =
ACP_INTERNAL_APERTURE_WINDOW_0_ADDRESS +
- (pte_offset * SZ_4K) + (i * (size/2));
+ (pte_offset * SZ_4K) + (i * (size / 2));
switch (asic_type) {
case CHIP_STONEY:
dmadscr[i].xfer_val |=
BIT(22) |
- (ACP_DMA_ATTRIBUTES_SHARED_MEM_TO_DAGB_GARLIC << 16) |
+ (ACP_DMA_ATTR_SHARED_MEM_TO_DAGB_GARLIC << 16) |
(size / 2);
break;
default:
dmadscr[i].xfer_val |=
BIT(22) |
- (ACP_DMA_ATTRIBUTES_SHAREDMEM_TO_DAGB_ONION << 16) |
+ (ACP_DMA_ATTR_SHAREDMEM_TO_DAGB_ONION << 16) |
(size / 2);
}
}
config_dma_descriptor_in_sram(acp_mmio, dma_dscr_idx,
- &dmadscr[i]);
+ &dmadscr[i]);
}
config_acp_dma_channel(acp_mmio, ch,
- dma_dscr_idx - 1,
- NUM_DSCRS_PER_CHANNEL,
- ACP_DMA_PRIORITY_LEVEL_NORMAL);
+ dma_dscr_idx - 1,
+ NUM_DSCRS_PER_CHANNEL,
+ ACP_DMA_PRIORITY_LEVEL_NORMAL);
}
-/* Initialize the DMA descriptor information for transfer between
+/*
+ * Initialize the DMA descriptor information for transfer between
* ACP SRAM <-> I2S
*/
static void set_acp_to_i2s_dma_descriptors(void __iomem *acp_mmio, u32 size,
- int direction, u32 sram_bank,
- u16 destination, u16 ch,
- u16 dma_dscr_idx, u32 asic_type)
+ int direction, u32 sram_bank,
+ u16 destination, u16 ch,
+ u16 dma_dscr_idx, u32 asic_type)
{
-
u16 i;
acp_dma_dscr_transfer_t dmadscr[NUM_DSCRS_PER_CHANNEL];
@@ -254,7 +258,7 @@ static void set_acp_to_i2s_dma_descriptors(void __iomem *acp_mmio, u32 size,
dmadscr[i].xfer_val = 0;
if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
dma_dscr_idx = dma_dscr_idx + i;
- dmadscr[i].src = sram_bank + (i * (size/2));
+ dmadscr[i].src = sram_bank + (i * (size / 2));
/* dmadscr[i].dest is unused by hardware. */
dmadscr[i].dest = 0;
dmadscr[i].xfer_val |= BIT(22) | (destination << 16) |
@@ -269,12 +273,12 @@ static void set_acp_to_i2s_dma_descriptors(void __iomem *acp_mmio, u32 size,
(destination << 16) | (size / 2);
}
config_dma_descriptor_in_sram(acp_mmio, dma_dscr_idx,
- &dmadscr[i]);
+ &dmadscr[i]);
}
/* Configure the DMA channel with the above descriptore */
config_acp_dma_channel(acp_mmio, ch, dma_dscr_idx - 1,
- NUM_DSCRS_PER_CHANNEL,
- ACP_DMA_PRIORITY_LEVEL_NORMAL);
+ NUM_DSCRS_PER_CHANNEL,
+ ACP_DMA_PRIORITY_LEVEL_NORMAL);
}
/* Create page table entries in ACP SRAM for the allocated memory */
@@ -291,7 +295,7 @@ static void acp_pte_config(void __iomem *acp_mmio, struct page *pg,
for (page_idx = 0; page_idx < (num_of_pages); page_idx++) {
/* Load the low address of page int ACP SRAM through SRBM */
acp_reg_write((offset + (page_idx * 8)),
- acp_mmio, mmACP_SRBM_Targ_Idx_Addr);
+ acp_mmio, mmACP_SRBM_Targ_Idx_Addr);
addr = page_to_phys(pg);
low = lower_32_bits(addr);
@@ -301,7 +305,7 @@ static void acp_pte_config(void __iomem *acp_mmio, struct page *pg,
/* Load the High address of page int ACP SRAM through SRBM */
acp_reg_write((offset + (page_idx * 8) + 4),
- acp_mmio, mmACP_SRBM_Targ_Idx_Addr);
+ acp_mmio, mmACP_SRBM_Targ_Idx_Addr);
/* page enable in ACP */
high |= BIT(31);
@@ -313,8 +317,8 @@ static void acp_pte_config(void __iomem *acp_mmio, struct page *pg,
}
static void config_acp_dma(void __iomem *acp_mmio,
- struct audio_substream_data *audio_config,
- u32 asic_type)
+ struct audio_substream_data *audio_config,
+ u32 asic_type)
{
u32 pte_offset, sram_bank;
u16 ch1, ch2, destination, dma_dscr_idx;
@@ -341,7 +345,7 @@ static void config_acp_dma(void __iomem *acp_mmio,
}
acp_pte_config(acp_mmio, audio_config->pg, audio_config->num_of_pages,
- pte_offset);
+ pte_offset);
if (audio_config->direction == SNDRV_PCM_STREAM_PLAYBACK)
dma_dscr_idx = PLAYBACK_START_DMA_DESCR_CH12;
else
@@ -349,8 +353,8 @@ static void config_acp_dma(void __iomem *acp_mmio,
/* Configure System memory <-> ACP SRAM DMA descriptors */
set_acp_sysmem_dma_descriptors(acp_mmio, audio_config->size,
- audio_config->direction, pte_offset,
- ch1, sram_bank, dma_dscr_idx, asic_type);
+ audio_config->direction, pte_offset, ch1,
+ sram_bank, dma_dscr_idx, asic_type);
if (audio_config->direction == SNDRV_PCM_STREAM_PLAYBACK)
dma_dscr_idx = PLAYBACK_START_DMA_DESCR_CH13;
@@ -358,14 +362,14 @@ static void config_acp_dma(void __iomem *acp_mmio,
dma_dscr_idx = CAPTURE_START_DMA_DESCR_CH15;
/* Configure ACP SRAM <-> I2S DMA descriptors */
set_acp_to_i2s_dma_descriptors(acp_mmio, audio_config->size,
- audio_config->direction, sram_bank,
- destination, ch2, dma_dscr_idx,
- asic_type);
+ audio_config->direction, sram_bank,
+ destination, ch2, dma_dscr_idx,
+ asic_type);
}
/* Start a given DMA channel transfer */
static void acp_dma_start(void __iomem *acp_mmio,
- u16 ch_num, bool is_circular)
+ u16 ch_num, bool is_circular)
{
u32 dma_ctrl;
@@ -375,7 +379,8 @@ static void acp_dma_start(void __iomem *acp_mmio,
/* Invalidating the DAGB cache */
acp_reg_write(1, acp_mmio, mmACP_DAGB_ATU_CTRL);
- /* configure the DMA channel and start the DMA transfer
+ /*
+ * configure the DMA channel and start the DMA transfer
* set dmachrun bit to start the transfer and enable the
* interrupt on completion of the dma transfer
*/
@@ -410,9 +415,10 @@ static int acp_dma_stop(void __iomem *acp_mmio, u8 ch_num)
dma_ctrl = acp_reg_read(acp_mmio, mmACP_DMA_CNTL_0 + ch_num);
- /* clear the dma control register fields before writing zero
+ /*
+ * clear the dma control register fields before writing zero
* in reset bit
- */
+ */
dma_ctrl &= ~ACP_DMA_CNTL_0__DMAChRun_MASK;
dma_ctrl &= ~ACP_DMA_CNTL_0__DMAChIOCEn_MASK;
@@ -420,9 +426,10 @@ static int acp_dma_stop(void __iomem *acp_mmio, u8 ch_num)
dma_ch_sts = acp_reg_read(acp_mmio, mmACP_DMA_CH_STS);
if (dma_ch_sts & BIT(ch_num)) {
- /* set the reset bit for this channel to stop the dma
- * transfer
- */
+ /*
+ * set the reset bit for this channel to stop the dma
+ * transfer
+ */
dma_ctrl |= ACP_DMA_CNTL_0__DMAChRst_MASK;
acp_reg_write(dma_ctrl, acp_mmio, mmACP_DMA_CNTL_0 + ch_num);
}
@@ -431,13 +438,14 @@ static int acp_dma_stop(void __iomem *acp_mmio, u8 ch_num)
while (true) {
dma_ch_sts = acp_reg_read(acp_mmio, mmACP_DMA_CH_STS);
if (!(dma_ch_sts & BIT(ch_num))) {
- /* clear the reset flag after successfully stopping
- * the dma transfer and break from the loop
- */
+ /*
+ * clear the reset flag after successfully stopping
+ * the dma transfer and break from the loop
+ */
dma_ctrl &= ~ACP_DMA_CNTL_0__DMAChRst_MASK;
acp_reg_write(dma_ctrl, acp_mmio, mmACP_DMA_CNTL_0
- + ch_num);
+ + ch_num);
break;
}
if (--count == 0) {
@@ -450,7 +458,7 @@ static int acp_dma_stop(void __iomem *acp_mmio, u8 ch_num)
}
static void acp_set_sram_bank_state(void __iomem *acp_mmio, u16 bank,
- bool power_on)
+ bool power_on)
{
u32 val, req_reg, sts_reg, sts_reg_mask;
u32 loops = 1000;
@@ -530,7 +538,7 @@ static int acp_init(void __iomem *acp_mmio, u32 asic_type)
while (true) {
val = acp_reg_read(acp_mmio, mmACP_STATUS);
- if (val & (u32) 0x1)
+ if (val & (u32)0x1)
break;
if (--count == 0) {
pr_err("Failed to reset ACP\n");
@@ -546,11 +554,11 @@ static int acp_init(void __iomem *acp_mmio, u32 asic_type)
/* initiailize Onion control DAGB register */
acp_reg_write(ACP_ONION_CNTL_DEFAULT, acp_mmio,
- mmACP_AXI2DAGB_ONION_CNTL);
+ mmACP_AXI2DAGB_ONION_CNTL);
/* initiailize Garlic control DAGB registers */
acp_reg_write(ACP_GARLIC_CNTL_DEFAULT, acp_mmio,
- mmACP_AXI2DAGB_GARLIC_CNTL);
+ mmACP_AXI2DAGB_GARLIC_CNTL);
sram_pte_offset = ACP_DAGB_GRP_SRAM_BASE_ADDRESS |
ACP_DAGB_BASE_ADDR_GRP_1__AXI2DAGBSnoopSel_MASK |
@@ -558,17 +566,18 @@ static int acp_init(void __iomem *acp_mmio, u32 asic_type)
ACP_DAGB_BASE_ADDR_GRP_1__AXI2DAGBGrpEnable_MASK;
acp_reg_write(sram_pte_offset, acp_mmio, mmACP_DAGB_BASE_ADDR_GRP_1);
acp_reg_write(ACP_PAGE_SIZE_4K_ENABLE, acp_mmio,
- mmACP_DAGB_PAGE_SIZE_GRP_1);
+ mmACP_DAGB_PAGE_SIZE_GRP_1);
acp_reg_write(ACP_SRAM_BASE_ADDRESS, acp_mmio,
- mmACP_DMA_DESC_BASE_ADDR);
+ mmACP_DMA_DESC_BASE_ADDR);
/* Num of descriptiors in SRAM 0x4, means 256 descriptors;(64 * 4) */
acp_reg_write(0x4, acp_mmio, mmACP_DMA_DESC_MAX_NUM_DSCR);
acp_reg_write(ACP_EXTERNAL_INTR_CNTL__DMAIOCMask_MASK,
- acp_mmio, mmACP_EXTERNAL_INTR_CNTL);
+ acp_mmio, mmACP_EXTERNAL_INTR_CNTL);
- /* When ACP_TILE_P1 is turned on, all SRAM banks get turned on.
+ /*
+ * When ACP_TILE_P1 is turned on, all SRAM banks get turned on.
* Now, turn off all of them. This can't be done in 'poweron' of
* ACP pm domain, as this requires ACP to be initialized.
* For Stoney, Memory gating is disabled,i.e SRAM Banks
@@ -606,7 +615,7 @@ static int acp_deinit(void __iomem *acp_mmio)
}
udelay(100);
}
- /** Disable ACP clock */
+ /* Disable ACP clock */
val = acp_reg_read(acp_mmio, mmACP_CONTROL);
val &= ~ACP_CONTROL__ClkEn_MASK;
acp_reg_write(val, acp_mmio, mmACP_CONTROL);
@@ -615,7 +624,7 @@ static int acp_deinit(void __iomem *acp_mmio)
while (true) {
val = acp_reg_read(acp_mmio, mmACP_STATUS);
- if (!(val & (u32) 0x1))
+ if (!(val & (u32)0x1))
break;
if (--count == 0) {
pr_err("Failed to reset ACP\n");
@@ -658,7 +667,7 @@ static irqreturn_t dma_irq_handler(int irq, void *arg)
snd_pcm_period_elapsed(irq_data->play_i2ssp_stream);
acp_reg_write((intr_flag & BIT(ACP_TO_I2S_DMA_CH_NUM)) << 16,
- acp_mmio, mmACP_EXTERNAL_INTR_STAT);
+ acp_mmio, mmACP_EXTERNAL_INTR_STAT);
}
if ((intr_flag & BIT(I2S_TO_ACP_DMA_CH_NUM)) != 0) {
@@ -673,14 +682,14 @@ static irqreturn_t dma_irq_handler(int irq, void *arg)
acp_dma_start(acp_mmio, ACP_TO_SYSRAM_CH_NUM, false);
acp_reg_write((intr_flag & BIT(I2S_TO_ACP_DMA_CH_NUM)) << 16,
- acp_mmio, mmACP_EXTERNAL_INTR_STAT);
+ acp_mmio, mmACP_EXTERNAL_INTR_STAT);
}
if ((intr_flag & BIT(ACP_TO_SYSRAM_CH_NUM)) != 0) {
valid_irq = true;
snd_pcm_period_elapsed(irq_data->capture_i2ssp_stream);
acp_reg_write((intr_flag & BIT(ACP_TO_SYSRAM_CH_NUM)) << 16,
- acp_mmio, mmACP_EXTERNAL_INTR_STAT);
+ acp_mmio, mmACP_EXTERNAL_INTR_STAT);
}
if (valid_irq)
@@ -695,11 +704,12 @@ static int acp_dma_open(struct snd_pcm_substream *substream)
int ret = 0;
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_soc_pcm_runtime *prtd = substream->private_data;
- struct snd_soc_component *component = snd_soc_rtdcom_lookup(prtd, DRV_NAME);
+ struct snd_soc_component *component = snd_soc_rtdcom_lookup(prtd,
+ DRV_NAME);
struct audio_drv_data *intr_data = dev_get_drvdata(component->dev);
struct audio_substream_data *adata =
kzalloc(sizeof(struct audio_substream_data), GFP_KERNEL);
- if (adata == NULL)
+ if (!adata)
return -ENOMEM;
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
@@ -731,17 +741,19 @@ static int acp_dma_open(struct snd_pcm_substream *substream)
adata->acp_mmio = intr_data->acp_mmio;
runtime->private_data = adata;
- /* Enable ACP irq, when neither playback or capture streams are
+ /*
+ * Enable ACP irq, when neither playback or capture streams are
* active by the time when a new stream is being opened.
* This enablement is not required for another stream, if current
* stream is not closed
- */
+ */
if (!intr_data->play_i2ssp_stream && !intr_data->capture_i2ssp_stream)
acp_reg_write(1, adata->acp_mmio, mmACP_EXTERNAL_INTR_ENB);
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
intr_data->play_i2ssp_stream = substream;
- /* For Stoney, Memory gating is disabled,i.e SRAM Banks
+ /*
+ * For Stoney, Memory gating is disabled,i.e SRAM Banks
* won't be turned off. The default state for SRAM banks is ON.
* Setting SRAM bank state code skipped for STONEY platform.
*/
@@ -772,7 +784,8 @@ static int acp_dma_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_runtime *runtime;
struct audio_substream_data *rtd;
struct snd_soc_pcm_runtime *prtd = substream->private_data;
- struct snd_soc_component *component = snd_soc_rtdcom_lookup(prtd, DRV_NAME);
+ struct snd_soc_component *component = snd_soc_rtdcom_lookup(prtd,
+ DRV_NAME);
struct audio_drv_data *adata = dev_get_drvdata(component->dev);
runtime = substream->runtime;
@@ -782,12 +795,14 @@ static int acp_dma_hw_params(struct snd_pcm_substream *substream,
return -EINVAL;
if (adata->asic_type == CHIP_STONEY) {
- val = acp_reg_read(adata->acp_mmio, mmACP_I2S_16BIT_RESOLUTION_EN);
+ val = acp_reg_read(adata->acp_mmio,
+ mmACP_I2S_16BIT_RESOLUTION_EN);
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
val |= ACP_I2S_SP_16BIT_RESOLUTION_EN;
else
val |= ACP_I2S_MIC_16BIT_RESOLUTION_EN;
- acp_reg_write(val, adata->acp_mmio, mmACP_I2S_16BIT_RESOLUTION_EN);
+ acp_reg_write(val, adata->acp_mmio,
+ mmACP_I2S_16BIT_RESOLUTION_EN);
}
size = params_buffer_bytes(params);
status = snd_pcm_lib_malloc_pages(substream, size);
@@ -797,7 +812,7 @@ static int acp_dma_hw_params(struct snd_pcm_substream *substream,
memset(substream->runtime->dma_area, 0, params_buffer_bytes(params));
pg = virt_to_page(substream->dma_buffer.area);
- if (pg != NULL) {
+ if (pg) {
acp_set_sram_bank_state(rtd->acp_mmio, 0, true);
/* Save for runtime private data */
rtd->pg = pg;
@@ -885,18 +900,18 @@ static int acp_dma_prepare(struct snd_pcm_substream *substream)
return -EINVAL;
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
config_acp_dma_channel(rtd->acp_mmio, SYSRAM_TO_ACP_CH_NUM,
- PLAYBACK_START_DMA_DESCR_CH12,
- NUM_DSCRS_PER_CHANNEL, 0);
+ PLAYBACK_START_DMA_DESCR_CH12,
+ NUM_DSCRS_PER_CHANNEL, 0);
config_acp_dma_channel(rtd->acp_mmio, ACP_TO_I2S_DMA_CH_NUM,
- PLAYBACK_START_DMA_DESCR_CH13,
- NUM_DSCRS_PER_CHANNEL, 0);
+ PLAYBACK_START_DMA_DESCR_CH13,
+ NUM_DSCRS_PER_CHANNEL, 0);
} else {
config_acp_dma_channel(rtd->acp_mmio, ACP_TO_SYSRAM_CH_NUM,
- CAPTURE_START_DMA_DESCR_CH14,
- NUM_DSCRS_PER_CHANNEL, 0);
+ CAPTURE_START_DMA_DESCR_CH14,
+ NUM_DSCRS_PER_CHANNEL, 0);
config_acp_dma_channel(rtd->acp_mmio, I2S_TO_ACP_DMA_CH_NUM,
- CAPTURE_START_DMA_DESCR_CH15,
- NUM_DSCRS_PER_CHANNEL, 0);
+ CAPTURE_START_DMA_DESCR_CH15,
+ NUM_DSCRS_PER_CHANNEL, 0);
}
return 0;
}
@@ -910,7 +925,8 @@ static int acp_dma_trigger(struct snd_pcm_substream *substream, int cmd)
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_soc_pcm_runtime *prtd = substream->private_data;
struct audio_substream_data *rtd = runtime->private_data;
- struct snd_soc_component *component = snd_soc_rtdcom_lookup(prtd, DRV_NAME);
+ struct snd_soc_component *component = snd_soc_rtdcom_lookup(prtd,
+ DRV_NAME);
if (!rtd)
return -EINVAL;
@@ -924,7 +940,7 @@ static int acp_dma_trigger(struct snd_pcm_substream *substream, int cmd)
if (rtd->i2ssp_renderbytescount == 0)
rtd->i2ssp_renderbytescount = bytescount;
acp_dma_start(rtd->acp_mmio,
- SYSRAM_TO_ACP_CH_NUM, false);
+ SYSRAM_TO_ACP_CH_NUM, false);
while (acp_reg_read(rtd->acp_mmio, mmACP_DMA_CH_STS) &
BIT(SYSRAM_TO_ACP_CH_NUM)) {
if (!loops--) {
@@ -936,41 +952,41 @@ static int acp_dma_trigger(struct snd_pcm_substream *substream, int cmd)
}
acp_dma_start(rtd->acp_mmio,
- ACP_TO_I2S_DMA_CH_NUM, true);
+ ACP_TO_I2S_DMA_CH_NUM, true);
} else {
if (rtd->i2ssp_capturebytescount == 0)
rtd->i2ssp_capturebytescount = bytescount;
acp_dma_start(rtd->acp_mmio,
- I2S_TO_ACP_DMA_CH_NUM, true);
+ I2S_TO_ACP_DMA_CH_NUM, true);
}
ret = 0;
break;
case SNDRV_PCM_TRIGGER_STOP:
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
case SNDRV_PCM_TRIGGER_SUSPEND:
- /* Need to stop only circular DMA channels :
+ /*
+ * Need to stop only circular DMA channels :
* ACP_TO_I2S_DMA_CH_NUM / I2S_TO_ACP_DMA_CH_NUM. Non-circular
* channels will stopped automatically after its transfer
* completes : SYSRAM_TO_ACP_CH_NUM / ACP_TO_SYSRAM_CH_NUM
*/
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
ret = acp_dma_stop(rtd->acp_mmio,
- SYSRAM_TO_ACP_CH_NUM);
+ SYSRAM_TO_ACP_CH_NUM);
ret = acp_dma_stop(rtd->acp_mmio,
- ACP_TO_I2S_DMA_CH_NUM);
+ ACP_TO_I2S_DMA_CH_NUM);
rtd->i2ssp_renderbytescount = 0;
} else {
ret = acp_dma_stop(rtd->acp_mmio,
- I2S_TO_ACP_DMA_CH_NUM);
+ I2S_TO_ACP_DMA_CH_NUM);
ret = acp_dma_stop(rtd->acp_mmio,
- ACP_TO_SYSRAM_CH_NUM);
+ ACP_TO_SYSRAM_CH_NUM);
rtd->i2ssp_capturebytescount = 0;
}
break;
default:
ret = -EINVAL;
-
}
return ret;
}
@@ -978,26 +994,27 @@ static int acp_dma_trigger(struct snd_pcm_substream *substream, int cmd)
static int acp_dma_new(struct snd_soc_pcm_runtime *rtd)
{
int ret;
- struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, DRV_NAME);
+ struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd,
+ DRV_NAME);
struct audio_drv_data *adata = dev_get_drvdata(component->dev);
switch (adata->asic_type) {
case CHIP_STONEY:
ret = snd_pcm_lib_preallocate_pages_for_all(rtd->pcm,
- SNDRV_DMA_TYPE_DEV,
- NULL, ST_MIN_BUFFER,
- ST_MAX_BUFFER);
+ SNDRV_DMA_TYPE_DEV,
+ NULL, ST_MIN_BUFFER,
+ ST_MAX_BUFFER);
break;
default:
ret = snd_pcm_lib_preallocate_pages_for_all(rtd->pcm,
- SNDRV_DMA_TYPE_DEV,
- NULL, MIN_BUFFER,
- MAX_BUFFER);
+ SNDRV_DMA_TYPE_DEV,
+ NULL, MIN_BUFFER,
+ MAX_BUFFER);
break;
}
if (ret < 0)
dev_err(component->dev,
- "buffer preallocation failer error:%d\n", ret);
+ "buffer preallocation failer error:%d\n", ret);
return ret;
}
@@ -1007,14 +1024,16 @@ static int acp_dma_close(struct snd_pcm_substream *substream)
struct snd_pcm_runtime *runtime = substream->runtime;
struct audio_substream_data *rtd = runtime->private_data;
struct snd_soc_pcm_runtime *prtd = substream->private_data;
- struct snd_soc_component *component = snd_soc_rtdcom_lookup(prtd, DRV_NAME);
+ struct snd_soc_component *component = snd_soc_rtdcom_lookup(prtd,
+ DRV_NAME);
struct audio_drv_data *adata = dev_get_drvdata(component->dev);
kfree(rtd);
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
adata->play_i2ssp_stream = NULL;
- /* For Stoney, Memory gating is disabled,i.e SRAM Banks
+ /*
+ * For Stoney, Memory gating is disabled,i.e SRAM Banks
* won't be turned off. The default state for SRAM banks is ON.
* Setting SRAM bank state code skipped for STONEY platform.
* added condition checks for Carrizo platform only
@@ -1022,20 +1041,21 @@ static int acp_dma_close(struct snd_pcm_substream *substream)
if (adata->asic_type != CHIP_STONEY) {
for (bank = 1; bank <= 4; bank++)
acp_set_sram_bank_state(adata->acp_mmio, bank,
- false);
+ false);
}
} else {
adata->capture_i2ssp_stream = NULL;
if (adata->asic_type != CHIP_STONEY) {
for (bank = 5; bank <= 8; bank++)
acp_set_sram_bank_state(adata->acp_mmio, bank,
- false);
+ false);
}
}
- /* Disable ACP irq, when the current stream is being closed and
+ /*
+ * Disable ACP irq, when the current stream is being closed and
* another stream is also not active.
- */
+ */
if (!adata->play_i2ssp_stream && !adata->capture_i2ssp_stream)
acp_reg_write(0, adata->acp_mmio, mmACP_EXTERNAL_INTR_ENB);
@@ -1054,7 +1074,7 @@ static const struct snd_pcm_ops acp_dma_ops = {
.prepare = acp_dma_prepare,
};
-static struct snd_soc_component_driver acp_asoc_platform = {
+static const struct snd_soc_component_driver acp_asoc_platform = {
.name = DRV_NAME,
.ops = &acp_dma_ops,
.pcm_new = acp_dma_new,
@@ -1073,8 +1093,8 @@ static int acp_audio_probe(struct platform_device *pdev)
}
audio_drv_data = devm_kzalloc(&pdev->dev, sizeof(struct audio_drv_data),
- GFP_KERNEL);
- if (audio_drv_data == NULL)
+ GFP_KERNEL);
+ if (!audio_drv_data)
return -ENOMEM;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -1082,7 +1102,8 @@ static int acp_audio_probe(struct platform_device *pdev)
if (IS_ERR(audio_drv_data->acp_mmio))
return PTR_ERR(audio_drv_data->acp_mmio);
- /* The following members gets populated in device 'open'
+ /*
+ * The following members gets populated in device 'open'
* function. Till then interrupts are disabled in 'acp_init'
* and device doesn't generate any interrupts.
*/
@@ -1099,7 +1120,7 @@ static int acp_audio_probe(struct platform_device *pdev)
}
status = devm_request_irq(&pdev->dev, res->start, dma_irq_handler,
- 0, "ACP_IRQ", &pdev->dev);
+ 0, "ACP_IRQ", &pdev->dev);
if (status) {
dev_err(&pdev->dev, "ACP IRQ request failed\n");
return status;
@@ -1115,7 +1136,7 @@ static int acp_audio_probe(struct platform_device *pdev)
}
status = devm_snd_soc_register_component(&pdev->dev,
- &acp_asoc_platform, NULL, 0);
+ &acp_asoc_platform, NULL, 0);
if (status != 0) {
dev_err(&pdev->dev, "Fail to register ALSA platform device\n");
return status;
@@ -1154,28 +1175,30 @@ static int acp_pcm_resume(struct device *dev)
}
if (adata->play_i2ssp_stream && adata->play_i2ssp_stream->runtime) {
- /* For Stoney, Memory gating is disabled,i.e SRAM Banks
+ /*
+ * For Stoney, Memory gating is disabled,i.e SRAM Banks
* won't be turned off. The default state for SRAM banks is ON.
* Setting SRAM bank state code skipped for STONEY platform.
*/
if (adata->asic_type != CHIP_STONEY) {
for (bank = 1; bank <= 4; bank++)
acp_set_sram_bank_state(adata->acp_mmio, bank,
- true);
+ true);
}
config_acp_dma(adata->acp_mmio,
- adata->play_i2ssp_stream->runtime->private_data,
- adata->asic_type);
+ adata->play_i2ssp_stream->runtime->private_data,
+ adata->asic_type);
}
- if (adata->capture_i2ssp_stream && adata->capture_i2ssp_stream->runtime) {
+ if (adata->capture_i2ssp_stream &&
+ adata->capture_i2ssp_stream->runtime) {
if (adata->asic_type != CHIP_STONEY) {
for (bank = 5; bank <= 8; bank++)
acp_set_sram_bank_state(adata->acp_mmio, bank,
- true);
+ true);
}
config_acp_dma(adata->acp_mmio,
- adata->capture_i2ssp_stream->runtime->private_data,
- adata->asic_type);
+ adata->capture_i2ssp_stream->runtime->private_data,
+ adata->asic_type);
}
acp_reg_write(1, adata->acp_mmio, mmACP_EXTERNAL_INTR_ENB);
return 0;
diff --git a/sound/soc/amd/acp.h b/sound/soc/amd/acp.h
index ba01510..0e6089b 100644
--- a/sound/soc/amd/acp.h
+++ b/sound/soc/amd/acp.h
@@ -115,23 +115,25 @@ enum {
};
enum {
- ACP_DMA_ATTRIBUTES_SHAREDMEM_TO_DAGB_ONION = 0x0,
- ACP_DMA_ATTRIBUTES_SHARED_MEM_TO_DAGB_GARLIC = 0x1,
- ACP_DMA_ATTRIBUTES_DAGB_ONION_TO_SHAREDMEM = 0x8,
- ACP_DMA_ATTRIBUTES_DAGB_GARLIC_TO_SHAREDMEM = 0x9,
- ACP_DMA_ATTRIBUTES_FORCE_SIZE = 0xF
+ ACP_DMA_ATTR_SHAREDMEM_TO_DAGB_ONION = 0x0,
+ ACP_DMA_ATTR_SHARED_MEM_TO_DAGB_GARLIC = 0x1,
+ ACP_DMA_ATTR_DAGB_ONION_TO_SHAREDMEM = 0x8,
+ ACP_DMA_ATTR_DAGB_GARLIC_TO_SHAREDMEM = 0x9,
+ ACP_DMA_ATTR_FORCE_SIZE = 0xF
};
typedef struct acp_dma_dscr_transfer {
/* Specifies the source memory location for the DMA data transfer. */
u32 src;
- /* Specifies the destination memory location to where the data will
+ /*
+ * Specifies the destination memory location to where the data will
* be transferred.
- */
+ */
u32 dest;
- /* Specifies the number of bytes need to be transferred
- * from source to destination memory.Transfer direction & IOC enable
- */
+ /*
+ * Specifies the number of bytes need to be transferred
+ * from source to destination memory.Transfer direction & IOC enable
+ */
u32 xfer_val;
/* Reserved for future use */
u32 reserved;
--
2.7.4
2
2
17 Apr '18
The SAR ADC of key press detection varies depending on headset.
We can't make a set of common threshold values for every case.
Therefore, the driver provides configuration for user and
they can set up values by UCM configuration.
Signed-off-by: John Hsu <KCHSU0(a)nuvoton.com>
---
sound/soc/codecs/nau8824.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/sound/soc/codecs/nau8824.c b/sound/soc/codecs/nau8824.c
index 637e952..76502c0 100644
--- a/sound/soc/codecs/nau8824.c
+++ b/sound/soc/codecs/nau8824.c
@@ -409,6 +409,15 @@ static const struct snd_kcontrol_new nau8824_snd_controls[] = {
SOC_SINGLE("DACL LR Mix", NAU8824_REG_DAC_MUTE_CTRL, 0, 1, 0),
SOC_SINGLE("DACR LR Mix", NAU8824_REG_DAC_MUTE_CTRL, 1, 1, 0),
+
+ SOC_SINGLE("THD for key media",
+ NAU8824_REG_VDET_THRESHOLD_1, 8, 0xff, 0),
+ SOC_SINGLE("THD for key voice command",
+ NAU8824_REG_VDET_THRESHOLD_1, 0, 0xff, 0),
+ SOC_SINGLE("THD for key volume up",
+ NAU8824_REG_VDET_THRESHOLD_2, 8, 0xff, 0),
+ SOC_SINGLE("THD for key volume down",
+ NAU8824_REG_VDET_THRESHOLD_2, 0, 0xff, 0),
};
static int nau8824_output_dac_event(struct snd_soc_dapm_widget *w,
--
2.6.4
2
4
[alsa-devel] [PATCH] ASoC: core: Add name prefix for machines with different topologies
by Liam Girdwood 17 Apr '18
by Liam Girdwood 17 Apr '18
17 Apr '18
Provide a mechanism for drivers to modify there card name with a prefix
so that userspace can load a different configuration file to default.
This can be useful when topology has changed the PCMs and kcontrols
for a machine.
This will be used by SOF to differentiate sound card names for UCM etc.
Signed-off-by: Liam Girdwood <liam.r.girdwood(a)linux.intel.com>
---
include/sound/soc.h | 2 ++
sound/soc/soc-core.c | 8 ++++++++
2 files changed, 10 insertions(+)
diff --git a/include/sound/soc.h b/include/sound/soc.h
index 4e368c308f93..99b77feab364 100644
--- a/include/sound/soc.h
+++ b/include/sound/soc.h
@@ -1015,6 +1015,7 @@ struct snd_soc_platform_driver {
/* this platform uses topology and ignore machine driver FEs */
const char *ignore_machine;
+ const char *topology_name_prefix;
int (*be_hw_params_fixup)(struct snd_soc_pcm_runtime *rtd,
struct snd_pcm_hw_params *params);
bool use_dai_pcm_id; /* use the DAI link PCM ID as PCM device number */
@@ -1167,6 +1168,7 @@ struct snd_soc_card {
const char *long_name;
const char *driver_name;
char dmi_longname[80];
+ char topology_shortname[32];
struct device *dev;
struct snd_card *snd_card;
diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c
index 33840e5bc24e..4ab2b4ac8522 100644
--- a/sound/soc/soc-core.c
+++ b/sound/soc/soc-core.c
@@ -2144,6 +2144,14 @@ static void soc_check_tplg_fes(struct snd_soc_card *card)
if (!dai_link->stream_name)
dai_link->stream_name = dai_link->name;
}
+
+ /* Inform userspace we are using alternate topology */
+ if (platform->driver->topology_name_prefix) {
+ snprintf(card->topology_shortname, 32, "%s-%s",
+ platform->driver->topology_name_prefix,
+ card->name);
+ card->name = card->topology_shortname;
+ }
}
}
--
2.14.1
2
3
17 Apr '18
Register a compressed PCM if topology defines one.
Signed-off-by: Liam Girdwood <liam.r.girdwood(a)linux.intel.com>
---
sound/soc/soc-topology.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/sound/soc/soc-topology.c b/sound/soc/soc-topology.c
index dd2b118a35b3..f941d37e825b 100644
--- a/sound/soc/soc-topology.c
+++ b/sound/soc/soc-topology.c
@@ -1768,6 +1768,9 @@ static int soc_tplg_dai_create(struct soc_tplg *tplg,
set_stream_info(stream, caps);
}
+ if (pcm->compress)
+ dai_drv->compress_new = snd_soc_new_compress;
+
/* pass control to component driver for optional further init */
ret = soc_tplg_dai_load(tplg, dai_drv, pcm, NULL);
if (ret < 0) {
--
2.14.1
2
1
[alsa-devel] [PATCH 4/4] ASoC: amd: enabling bt i2s config after acp reset
by Vijendar Mukunda 17 Apr '18
by Vijendar Mukunda 17 Apr '18
17 Apr '18
On ST/CZ based platforms, for specific platform bt uart
mux to be defined for bt i2s.
By default, these pins will be used for uart.
After acp reset , it requires to reprogram bt i2s config
mux pins to enable bt i2s instance.
added bt i2s enablement sequence during acp init.
Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda(a)amd.com>
Signed-off-by: Akshu Agrawal <akshu.agrawal(a)amd.com>
---
sound/soc/amd/acp-da7219-max98357a.c | 2 ++
sound/soc/amd/acp-pcm-dma.c | 9 +++++++++
sound/soc/amd/acp.h | 1 +
3 files changed, 12 insertions(+)
diff --git a/sound/soc/amd/acp-da7219-max98357a.c b/sound/soc/amd/acp-da7219-max98357a.c
index b205c78..6dad0cb 100644
--- a/sound/soc/amd/acp-da7219-max98357a.c
+++ b/sound/soc/amd/acp-da7219-max98357a.c
@@ -44,6 +44,7 @@
static struct snd_soc_jack cz_jack;
struct clk *da7219_dai_clk;
+extern int bt_pad_enable;
static int cz_da7219_init(struct snd_soc_pcm_runtime *rtd)
{
@@ -81,6 +82,7 @@ static int cz_da7219_init(struct snd_soc_pcm_runtime *rtd)
}
da7219_aad_jack_det(component, &cz_jack);
+ bt_pad_enable = device_property_read_bool(&pdev->dev, "bt-pad-enable");
return 0;
}
diff --git a/sound/soc/amd/acp-pcm-dma.c b/sound/soc/amd/acp-pcm-dma.c
index 7c392fe..b52c660 100644
--- a/sound/soc/amd/acp-pcm-dma.c
+++ b/sound/soc/amd/acp-pcm-dma.c
@@ -46,6 +46,8 @@
#define DRV_NAME "acp_audio_dma"
+bool bt_pad_enable = false;
+EXPORT_SYMBOL(bt_pad_enable);
static const struct snd_pcm_hardware acp_pcm_hardware_playback = {
.info = SNDRV_PCM_INFO_INTERLEAVED |
@@ -525,6 +527,13 @@ static int acp_init(void __iomem *acp_mmio, u32 asic_type)
val &= ~ACP_SOFT_RESET__SoftResetAud_MASK;
acp_reg_write(val, acp_mmio, mmACP_SOFT_RESET);
+ /* For BT instance change pins from UART to BT */
+ if (bt_pad_enable) {
+ val = acp_reg_read(acp_mmio, mmACP_BT_UART_PAD_SEL);
+ val |= ACP_BT_UART_PAD_SELECT_MASK;
+ acp_reg_write(val, acp_mmio, mmACP_BT_UART_PAD_SEL);
+ }
+
/* initiailize Onion control DAGB register */
acp_reg_write(ACP_ONION_CNTL_DEFAULT, acp_mmio,
mmACP_AXI2DAGB_ONION_CNTL);
diff --git a/sound/soc/amd/acp.h b/sound/soc/amd/acp.h
index 460365c..6b43144 100644
--- a/sound/soc/amd/acp.h
+++ b/sound/soc/amd/acp.h
@@ -107,6 +107,7 @@
#define ACP_I2S_MIC_16BIT_RESOLUTION_EN 0x01
#define ACP_I2S_SP_16BIT_RESOLUTION_EN 0x02
#define ACP_I2S_BT_16BIT_RESOLUTION_EN 0x04
+#define ACP_BT_UART_PAD_SELECT_MASK 0x1
enum acp_dma_priority_level {
/* 0x0 Specifies the DMA channel is given normal priority */
--
2.7.4
5
6
This series adds support in SoundWire subsystem for:
- Documentation for stream support
- stream management
- data port management
- DAI ops in cadence and Intel drivers
- ASoC API to propagate SDW stream
Updates in v3:
- Remove stream state transition checks and redefine stream states
- Update bansk switch routines
- Other nitpicks pointed out by Pierre.
Updates in v2:
- Make ASoC API inlined
- Make stream states as states and not action
- Update the direction enum
- Fix some typos and comment updates
Sanyog Kale (7):
Documentation: soundwire: Add more documentation
soundwire: Add support for SoundWire stream management
soundwire: Add support for port management
soundwire: Add Master and Slave port programming
soundwire: Add helpers for ports operations
soundwire: Add bank switch routine
soundwire: Add stream configuration APIs
Shreyas NC (2):
ASoC: Add SoundWire stream programming interface
soundwire: Remove cdns_master_ops
Vinod Koul (4):
soundwire: cdns: Add port routines
soundwire: cdns: Add stream routines
soundwire: intel: Add stream initialization
soundwire: intel: Add audio DAI ops
.../driver-api/soundwire/error_handling.rst | 65 +
Documentation/driver-api/soundwire/index.rst | 3 +
Documentation/driver-api/soundwire/locking.rst | 106 ++
Documentation/driver-api/soundwire/stream.rst | 372 +++++
drivers/soundwire/Kconfig | 2 +-
drivers/soundwire/Makefile | 2 +-
drivers/soundwire/bus.c | 43 +
drivers/soundwire/bus.h | 72 +
drivers/soundwire/cadence_master.c | 453 +++++-
drivers/soundwire/cadence_master.h | 151 ++
drivers/soundwire/intel.c | 528 ++++++-
drivers/soundwire/intel.h | 4 +
drivers/soundwire/intel_init.c | 3 +
drivers/soundwire/stream.c | 1471 ++++++++++++++++++++
include/linux/soundwire/sdw.h | 332 ++++-
include/linux/soundwire/sdw_intel.h | 14 +
include/sound/soc-dai.h | 21 +
17 files changed, 3628 insertions(+), 14 deletions(-)
create mode 100644 Documentation/driver-api/soundwire/error_handling.rst
create mode 100644 Documentation/driver-api/soundwire/locking.rst
create mode 100644 Documentation/driver-api/soundwire/stream.rst
create mode 100644 drivers/soundwire/stream.c
--
2.7.4
3
21
[alsa-devel] [PATCH RESEND] xen/sndif: Sync up with the canonical definition in Xen
by Oleksandr Andrushchenko 17 Apr '18
by Oleksandr Andrushchenko 17 Apr '18
17 Apr '18
This is the sync up with the canonical definition of the sound
protocol in Xen:
1. Protocol version was referenced in the protocol description,
but missed its definition. Fixed by adding a constant
for current protocol version.
2. Some of the request descriptions have "reserved" fields
missed: fixed by adding corresponding entries.
3. Extend the size of the requests and responses to 64 octets.
Bump protocol version to 2.
4. Add explicit back and front synchronization
In order to provide explicit synchronization between backend and
frontend the following changes are introduced in the protocol:
- add new ring buffer for sending asynchronous events from
backend to frontend to report number of bytes played by the
frontend (XENSND_EVT_CUR_POS)
- introduce trigger events for playback control: start/stop/pause/resume
- add "req-" prefix to event-channel and ring-ref to unify naming
of the Xen event channels for requests and events
5. Add explicit back and front parameter negotiation
In order to provide explicit stream parameter negotiation between
backend and frontend the following changes are introduced in the protocol:
add XENSND_OP_HW_PARAM_QUERY request to read/update
configuration space for the parameters given: request passes
desired parameter's intervals/masks and the response to this request
returns allowed min/max intervals/masks to be used.
Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko(a)epam.com>
Signed-off-by: Oleksandr Grytsov <oleksandr_grytsov(a)epam.com>
Cc: Konrad Rzeszutek Wilk <konrad.wilk(a)oracle.com>
Cc: Takashi Iwai <tiwai(a)suse.de>
---
include/xen/interface/io/sndif.h | 322 +++++++++++++++++++++++++++++--
1 file changed, 306 insertions(+), 16 deletions(-)
diff --git a/include/xen/interface/io/sndif.h b/include/xen/interface/io/sndif.h
index 5c918276835e..78bb5d9f8d83 100644
--- a/include/xen/interface/io/sndif.h
+++ b/include/xen/interface/io/sndif.h
@@ -36,6 +36,13 @@
#include "ring.h"
#include "../grant_table.h"
+/*
+ ******************************************************************************
+ * Protocol version
+ ******************************************************************************
+ */
+#define XENSND_PROTOCOL_VERSION 2
+
/*
******************************************************************************
* Feature and Parameter Negotiation
@@ -106,6 +113,8 @@
*
* /local/domain/1/device/vsnd/0/0/0/ring-ref = "386"
* /local/domain/1/device/vsnd/0/0/0/event-channel = "15"
+ * /local/domain/1/device/vsnd/0/0/0/evt-ring-ref = "1386"
+ * /local/domain/1/device/vsnd/0/0/0/evt-event-channel = "215"
*
*------------------------------ Stream 1, capture ----------------------------
*
@@ -115,6 +124,8 @@
*
* /local/domain/1/device/vsnd/0/0/1/ring-ref = "384"
* /local/domain/1/device/vsnd/0/0/1/event-channel = "13"
+ * /local/domain/1/device/vsnd/0/0/1/evt-ring-ref = "1384"
+ * /local/domain/1/device/vsnd/0/0/1/evt-event-channel = "213"
*
*------------------------------- PCM device 1 --------------------------------
*
@@ -128,6 +139,8 @@
*
* /local/domain/1/device/vsnd/0/1/0/ring-ref = "387"
* /local/domain/1/device/vsnd/0/1/0/event-channel = "151"
+ * /local/domain/1/device/vsnd/0/1/0/evt-ring-ref = "1387"
+ * /local/domain/1/device/vsnd/0/1/0/evt-event-channel = "351"
*
*------------------------------- PCM device 2 --------------------------------
*
@@ -140,6 +153,8 @@
*
* /local/domain/1/device/vsnd/0/2/0/ring-ref = "389"
* /local/domain/1/device/vsnd/0/2/0/event-channel = "152"
+ * /local/domain/1/device/vsnd/0/2/0/evt-ring-ref = "1389"
+ * /local/domain/1/device/vsnd/0/2/0/evt-event-channel = "452"
*
******************************************************************************
* Backend XenBus Nodes
@@ -285,6 +300,23 @@
* The Xen grant reference granting permission for the backend to map
* a sole page in a single page sized ring buffer.
*
+ *--------------------- Stream Event Transport Parameters ---------------------
+ *
+ * This communication path is used to deliver asynchronous events from backend
+ * to frontend, set up per stream.
+ *
+ * evt-event-channel
+ * Values: <uint32_t>
+ *
+ * The identifier of the Xen event channel used to signal activity
+ * in the ring buffer.
+ *
+ * evt-ring-ref
+ * Values: <uint32_t>
+ *
+ * The Xen grant reference granting permission for the backend to map
+ * a sole page in a single page sized ring buffer.
+ *
******************************************************************************
* STATE DIAGRAMS
******************************************************************************
@@ -432,6 +464,20 @@
#define XENSND_OP_GET_VOLUME 5
#define XENSND_OP_MUTE 6
#define XENSND_OP_UNMUTE 7
+#define XENSND_OP_TRIGGER 8
+#define XENSND_OP_HW_PARAM_QUERY 9
+
+#define XENSND_OP_TRIGGER_START 0
+#define XENSND_OP_TRIGGER_PAUSE 1
+#define XENSND_OP_TRIGGER_STOP 2
+#define XENSND_OP_TRIGGER_RESUME 3
+
+/*
+ ******************************************************************************
+ * EVENT CODES
+ ******************************************************************************
+ */
+#define XENSND_EVT_CUR_POS 0
/*
******************************************************************************
@@ -448,6 +494,8 @@
#define XENSND_FIELD_VCARD_LONG_NAME "long-name"
#define XENSND_FIELD_RING_REF "ring-ref"
#define XENSND_FIELD_EVT_CHNL "event-channel"
+#define XENSND_FIELD_EVT_RING_REF "evt-ring-ref"
+#define XENSND_FIELD_EVT_EVT_CHNL "evt-event-channel"
#define XENSND_FIELD_DEVICE_NAME "name"
#define XENSND_FIELD_TYPE "type"
#define XENSND_FIELD_STREAM_UNIQUE_ID "unique-id"
@@ -526,7 +574,7 @@
*
*---------------------------------- Requests ---------------------------------
*
- * All request packets have the same length (32 octets)
+ * All request packets have the same length (64 octets)
* All request packets have common header:
* 0 1 2 3 octet
* +----------------+----------------+----------------+----------------+
@@ -559,11 +607,13 @@
* +----------------+----------------+----------------+----------------+
* | gref_directory | 24
* +----------------+----------------+----------------+----------------+
- * | reserved | 28
+ * | period_sz | 28
+ * +----------------+----------------+----------------+----------------+
+ * | reserved | 32
* +----------------+----------------+----------------+----------------+
* |/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/|
* +----------------+----------------+----------------+----------------+
- * | reserved | 32
+ * | reserved | 64
* +----------------+----------------+----------------+----------------+
*
* pcm_rate - uint32_t, stream data rate, Hz
@@ -571,6 +621,14 @@
* pcm_channels - uint8_t, number of channels of this stream,
* [channels-min; channels-max]
* buffer_sz - uint32_t, buffer size to be allocated, octets
+ * period_sz - uint32_t, event period size, octets
+ * This is the requested value of the period at which frontend would
+ * like to receive XENSND_EVT_CUR_POS notifications from the backend when
+ * stream position advances during playback/capture.
+ * It shows how many octets are expected to be played/captured before
+ * sending such an event.
+ * If set to 0 no XENSND_EVT_CUR_POS events are sent by the backend.
+ *
* gref_directory - grant_ref_t, a reference to the first shared page
* describing shared buffer references. At least one page exists. If shared
* buffer size (buffer_sz) exceeds what can be addressed by this single page,
@@ -585,6 +643,7 @@ struct xensnd_open_req {
uint16_t reserved;
uint32_t buffer_sz;
grant_ref_t gref_directory;
+ uint32_t period_sz;
};
/*
@@ -632,7 +691,7 @@ struct xensnd_page_directory {
* +----------------+----------------+----------------+----------------+
* |/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/|
* +----------------+----------------+----------------+----------------+
- * | reserved | 32
+ * | reserved | 64
* +----------------+----------------+----------------+----------------+
*
* Request read/write - used for read (for capture) or write (for playback):
@@ -650,7 +709,7 @@ struct xensnd_page_directory {
* +----------------+----------------+----------------+----------------+
* |/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/|
* +----------------+----------------+----------------+----------------+
- * | reserved | 32
+ * | reserved | 64
* +----------------+----------------+----------------+----------------+
*
* operation - XENSND_OP_READ for read or XENSND_OP_WRITE for write
@@ -673,9 +732,11 @@ struct xensnd_rw_req {
* +----------------+----------------+----------------+----------------+
* | length | 16
* +----------------+----------------+----------------+----------------+
+ * | reserved | 20
+ * +----------------+----------------+----------------+----------------+
* |/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/|
* +----------------+----------------+----------------+----------------+
- * | reserved | 32
+ * | reserved | 64
* +----------------+----------------+----------------+----------------+
*
* operation - XENSND_OP_SET_VOLUME for volume set
@@ -713,9 +774,11 @@ struct xensnd_rw_req {
* +----------------+----------------+----------------+----------------+
* | length | 16
* +----------------+----------------+----------------+----------------+
+ * | reserved | 20
+ * +----------------+----------------+----------------+----------------+
* |/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/|
* +----------------+----------------+----------------+----------------+
- * | reserved | 32
+ * | reserved | 64
* +----------------+----------------+----------------+----------------+
*
* operation - XENSND_OP_MUTE for mute or XENSND_OP_UNMUTE for unmute
@@ -743,32 +806,213 @@ struct xensnd_rw_req {
*
* The 'struct xensnd_rw_req' is also used for XENSND_OP_SET_VOLUME,
* XENSND_OP_GET_VOLUME, XENSND_OP_MUTE, XENSND_OP_UNMUTE.
+ *
+ * Request stream running state change - trigger PCM stream running state
+ * to start, stop, pause or resume:
+ *
+ * 0 1 2 3 octet
+ * +----------------+----------------+----------------+----------------+
+ * | id | _OP_TRIGGER | reserved | 4
+ * +----------------+----------------+----------------+----------------+
+ * | reserved | 8
+ * +----------------+----------------+----------------+----------------+
+ * | type | reserved | 12
+ * +----------------+----------------+----------------+----------------+
+ * | reserved | 16
+ * +----------------+----------------+----------------+----------------+
+ * |/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/|
+ * +----------------+----------------+----------------+----------------+
+ * | reserved | 64
+ * +----------------+----------------+----------------+----------------+
+ *
+ * type - uint8_t, XENSND_OP_TRIGGER_XXX value
*/
+struct xensnd_trigger_req {
+ uint8_t type;
+};
+
/*
- *---------------------------------- Responses --------------------------------
+ * Request stream parameter ranges: request intervals and
+ * masks of supported ranges for stream configuration values.
*
- * All response packets have the same length (32 octets)
+ * Sound device configuration for a particular stream is a limited subset
+ * of the multidimensional configuration available on XenStore, e.g.
+ * once the frame rate has been selected there is a limited supported range
+ * for sample rates becomes available (which might be the same set configured
+ * on XenStore or less). For example, selecting 96kHz sample rate may limit
+ * number of channels available for such configuration from 4 to 2, etc.
+ * Thus, each call to XENSND_OP_HW_PARAM_QUERY may reduce configuration
+ * space making it possible to iteratively get the final stream configuration,
+ * used in XENSND_OP_OPEN request.
+ *
+ * See response format for this request.
*
- * Response for all requests:
* 0 1 2 3 octet
* +----------------+----------------+----------------+----------------+
- * | id | operation | reserved | 4
+ * | id | _HW_PARAM_QUERY| reserved | 4
* +----------------+----------------+----------------+----------------+
- * | status | 8
+ * | reserved | 8
+ * +----------------+----------------+----------------+----------------+
+ * | formats mask low 32-bit | 12
+ * +----------------+----------------+----------------+----------------+
+ * | formats mask high 32-bit | 16
* +----------------+----------------+----------------+----------------+
- * | reserved | 12
+ * | min rate | 20
+ * +----------------+----------------+----------------+----------------+
+ * | max rate | 24
+ * +----------------+----------------+----------------+----------------+
+ * | min channels | 28
+ * +----------------+----------------+----------------+----------------+
+ * | max channels | 32
+ * +----------------+----------------+----------------+----------------+
+ * | min buffer frames | 36
+ * +----------------+----------------+----------------+----------------+
+ * | max buffer frames | 40
+ * +----------------+----------------+----------------+----------------+
+ * | min period frames | 44
+ * +----------------+----------------+----------------+----------------+
+ * | max period frames | 48
+ * +----------------+----------------+----------------+----------------+
+ * | reserved | 52
* +----------------+----------------+----------------+----------------+
* |/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/|
* +----------------+----------------+----------------+----------------+
- * | reserved | 32
+ * | reserved | 64
+ * +----------------+----------------+----------------+----------------+
+ *
+ * formats - uint64_t, bit mask representing values of the parameter
+ * made as bitwise OR of (1 << XENSND_PCM_FORMAT_XXX) values
+ *
+ * For interval parameters:
+ * min - uint32_t, minimum value of the parameter
+ * max - uint32_t, maximum value of the parameter
+ *
+ * Frame is defined as a product of the number of channels by the
+ * number of octets per one sample.
+ */
+
+struct xensnd_query_hw_param {
+ uint64_t formats;
+ struct {
+ uint32_t min;
+ uint32_t max;
+ } rates;
+ struct {
+ uint32_t min;
+ uint32_t max;
+ } channels;
+ struct {
+ uint32_t min;
+ uint32_t max;
+ } buffer;
+ struct {
+ uint32_t min;
+ uint32_t max;
+ } period;
+};
+
+/*
+ *---------------------------------- Responses --------------------------------
+ *
+ * All response packets have the same length (64 octets)
+ *
+ * All response packets have common header:
+ * 0 1 2 3 octet
+ * +----------------+----------------+----------------+----------------+
+ * | id | operation | reserved | 4
+ * +----------------+----------------+----------------+----------------+
+ * | status | 8
* +----------------+----------------+----------------+----------------+
*
* id - uint16_t, copied from the request
* operation - uint8_t, XENSND_OP_* - copied from request
* status - int32_t, response status, zero on success and -XEN_EXX on failure
+ *
+ *
+ * HW parameter query response - response for XENSND_OP_HW_PARAM_QUERY:
+ * 0 1 2 3 octet
+ * +----------------+----------------+----------------+----------------+
+ * | id | operation | reserved | 4
+ * +----------------+----------------+----------------+----------------+
+ * | status | 8
+ * +----------------+----------------+----------------+----------------+
+ * | formats mask low 32-bit | 12
+ * +----------------+----------------+----------------+----------------+
+ * | formats mask high 32-bit | 16
+ * +----------------+----------------+----------------+----------------+
+ * | min rate | 20
+ * +----------------+----------------+----------------+----------------+
+ * | max rate | 24
+ * +----------------+----------------+----------------+----------------+
+ * | min channels | 28
+ * +----------------+----------------+----------------+----------------+
+ * | max channels | 32
+ * +----------------+----------------+----------------+----------------+
+ * | min buffer frames | 36
+ * +----------------+----------------+----------------+----------------+
+ * | max buffer frames | 40
+ * +----------------+----------------+----------------+----------------+
+ * | min period frames | 44
+ * +----------------+----------------+----------------+----------------+
+ * | max period frames | 48
+ * +----------------+----------------+----------------+----------------+
+ * | reserved | 52
+ * +----------------+----------------+----------------+----------------+
+ * |/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/|
+ * +----------------+----------------+----------------+----------------+
+ * | reserved | 64
+ * +----------------+----------------+----------------+----------------+
+ *
+ * Meaning of the values in this response is the same as for
+ * XENSND_OP_HW_PARAM_QUERY request.
+ */
+
+/*
+ *----------------------------------- Events ----------------------------------
+ *
+ * Events are sent via shared page allocated by the front and propagated by
+ * evt-event-channel/evt-ring-ref XenStore entries
+ * All event packets have the same length (64 octets)
+ * All event packets have common header:
+ * 0 1 2 3 octet
+ * +----------------+----------------+----------------+----------------+
+ * | id | type | reserved | 4
+ * +----------------+----------------+----------------+----------------+
+ * | reserved | 8
+ * +----------------+----------------+----------------+----------------+
+ *
+ * id - uint16_t, event id, may be used by front
+ * type - uint8_t, type of the event
+ *
+ *
+ * Current stream position - event from back to front when stream's
+ * playback/capture position has advanced:
+ * 0 1 2 3 octet
+ * +----------------+----------------+----------------+----------------+
+ * | id | _EVT_CUR_POS | reserved | 4
+ * +----------------+----------------+----------------+----------------+
+ * | reserved | 8
+ * +----------------+----------------+----------------+----------------+
+ * | position low 32-bit | 12
+ * +----------------+----------------+----------------+----------------+
+ * | position high 32-bit | 16
+ * +----------------+----------------+----------------+----------------+
+ * | reserved | 20
+ * +----------------+----------------+----------------+----------------+
+ * |/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/|
+ * +----------------+----------------+----------------+----------------+
+ * | reserved | 64
+ * +----------------+----------------+----------------+----------------+
+ *
+ * position - current value of stream's playback/capture position, octets
+ *
*/
+struct xensnd_cur_pos_evt {
+ uint64_t position;
+};
+
struct xensnd_req {
uint16_t id;
uint8_t operation;
@@ -776,7 +1020,9 @@ struct xensnd_req {
union {
struct xensnd_open_req open;
struct xensnd_rw_req rw;
- uint8_t reserved[24];
+ struct xensnd_trigger_req trigger;
+ struct xensnd_query_hw_param hw_param;
+ uint8_t reserved[56];
} op;
};
@@ -785,9 +1031,53 @@ struct xensnd_resp {
uint8_t operation;
uint8_t reserved;
int32_t status;
- uint8_t reserved1[24];
+ union {
+ struct xensnd_query_hw_param hw_param;
+ uint8_t reserved1[56];
+ } resp;
+};
+
+struct xensnd_evt {
+ uint16_t id;
+ uint8_t type;
+ uint8_t reserved[5];
+ union {
+ struct xensnd_cur_pos_evt cur_pos;
+ uint8_t reserved[56];
+ } op;
};
DEFINE_RING_TYPES(xen_sndif, struct xensnd_req, struct xensnd_resp);
+/*
+ ******************************************************************************
+ * Back to front events delivery
+ ******************************************************************************
+ * In order to deliver asynchronous events from back to front a shared page is
+ * allocated by front and its granted reference propagated to back via
+ * XenStore entries (evt-ring-ref/evt-event-channel).
+ * This page has a common header used by both front and back to synchronize
+ * access and control event's ring buffer, while back being a producer of the
+ * events and front being a consumer. The rest of the page after the header
+ * is used for event packets.
+ *
+ * Upon reception of an event(s) front may confirm its reception
+ * for either each event, group of events or none.
+ */
+
+struct xensnd_event_page {
+ uint32_t in_cons;
+ uint32_t in_prod;
+ uint8_t reserved[56];
+};
+
+#define XENSND_EVENT_PAGE_SIZE XEN_PAGE_SIZE
+#define XENSND_IN_RING_OFFS (sizeof(struct xensnd_event_page))
+#define XENSND_IN_RING_SIZE (XENSND_EVENT_PAGE_SIZE - XENSND_IN_RING_OFFS)
+#define XENSND_IN_RING_LEN (XENSND_IN_RING_SIZE / sizeof(struct xensnd_evt))
+#define XENSND_IN_RING(page) \
+ ((struct xensnd_evt *)((char *)(page) + XENSND_IN_RING_OFFS))
+#define XENSND_IN_RING_REF(page, idx) \
+ (XENSND_IN_RING((page))[(idx) % XENSND_IN_RING_LEN])
+
#endif /* __XEN_PUBLIC_IO_SNDIF_H__ */
--
2.17.0
3
3