April 2017 - Alsa-devel - mailman.alsa-project.org

[alsa-devel] [PATCH 1/2] ASoC: fsl_ssi: Remove an outdated comment
by Fabio Estevam 10 Apr '17

10 Apr '17

The comment for the FSLSSI_I2S_RATES definition states that the driver currently only supports I2S slave mode, which is no longer correct. Remove such outdated comment. Signed-off-by: Fabio Estevam <fabio.estevam(a)nxp.com> --- sound/soc/fsl/fsl_ssi.c | 8 -------- 1 file changed, 8 deletions(-) diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c index fde08660..b450d8d 100644 --- a/sound/soc/fsl/fsl_ssi.c +++ b/sound/soc/fsl/fsl_ssi.c @@ -54,14 +54,6 @@ #include "fsl_ssi.h" #include "imx-pcm.h" -/** - * FSLSSI_I2S_RATES: sample rates supported by the I2S - * - * This driver currently only supports the SSI running in I2S slave mode, - * which means the codec determines the sample rate. Therefore, we tell - * ALSA that we support all rates and let the codec driver decide what rates - * are really supported. - */ #define FSLSSI_I2S_RATES SNDRV_PCM_RATE_CONTINUOUS /** -- 2.7.4

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[alsa-devel] Applied "ASoC: add hi6210-i2s DT bindings" to the asoc tree
by Mark Brown 10 Apr '17

10 Apr '17

The patch ASoC: add hi6210-i2s DT bindings has been applied to the asoc tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From 9e615f63cbafa2147fd302ab495d7b785306bc26 Mon Sep 17 00:00:00 2001 From: John Stultz <john.stultz(a)linaro.org> Date: Fri, 31 Mar 2017 15:05:59 -0700 Subject: [PATCH] ASoC: add hi6210-i2s DT bindings Adds DT bindings documentation for the hi6210-i2s driver. Signed-off-by: John Stultz <john.stultz(a)linaro.org> Signed-off-by: Mark Brown <broonie(a)kernel.org> --- .../bindings/sound/hisilicon,hi6210-i2s.txt | 34 ++++++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/hisilicon,hi6210-i2s.txt diff --git a/Documentation/devicetree/bindings/sound/hisilicon,hi6210-i2s.txt b/Documentation/devicetree/bindings/sound/hisilicon,hi6210-i2s.txt new file mode 100644 index 000000000000..680bb03577ef --- /dev/null +++ b/Documentation/devicetree/bindings/sound/hisilicon,hi6210-i2s.txt @@ -0,0 +1,34 @@ +* Hisilicon 6210 i2s controller + +Required properties: + +- compatible: should be one of the following: + - "hisilicon,hi6210-i2s" +- reg: physical base address of the i2s controller unit and length of + memory mapped region. +- interrupts: should contain the i2s interrupt. +- clocks: a list of phandle + clock-specifier pairs, one for each entry + in clock-names. +- clock-names: should contain following: + - "dacodec" + - "i2s-base" +- dmas: DMA specifiers for tx dma. See the DMA client binding, + Documentation/devicetree/bindings/dma/dma.txt +- dma-names: should be "tx" and "rx" +- hisilicon,sysctrl-syscon: phandle to sysctrl syscon +- #sound-dai-cells: Should be set to 1 (for multi-dai) + +Example for the hi6210 i2s controller: + +i2s0: i2s@f7118000{ + compatible = "hisilicon,hi6210-i2s"; + reg = <0x0 0xf7118000 0x0 0x8000>; /* i2s unit */ + interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; /* 155 "DigACodec_intr"-32 */ + clocks = <&sys_ctrl HI6220_DACODEC_PCLK>, + <&sys_ctrl HI6220_BBPPLL0_DIV>; + clock-names = "dacodec", "i2s-base"; + dmas = <&dma0 15 &dma0 14>; + dma-names = "rx", "tx"; + hisilicon,sysctrl-syscon = <&sys_ctrl>; + #sound-dai-cells = <1>; +}; -- 2.11.0

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[alsa-devel] Applied "ASoC: hisilicon: Add hi6210 i2s audio driver" to the asoc tree
by Mark Brown 10 Apr '17

10 Apr '17

The patch ASoC: hisilicon: Add hi6210 i2s audio driver has been applied to the asoc tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From 0bf750f4cbe1406d8819cbec2a3ff6beeb824617 Mon Sep 17 00:00:00 2001 From: Andy Green <andy.green(a)linaro.org> Date: Fri, 31 Mar 2017 15:06:00 -0700 Subject: [PATCH] ASoC: hisilicon: Add hi6210 i2s audio driver Add driver for hi6210 i2s controller found on hi6220 boards. Signed-off-by: Andy Green <andy.green(a)linaro.org> [jstultz: Forward ported to mainline, fairly major rework based on suggestions from Mark Brown] Signed-off-by: John Stultz <john.stultz(a)linaro.org> Signed-off-by: Mark Brown <broonie(a)kernel.org> --- sound/soc/Kconfig | 1 + sound/soc/Makefile | 1 + sound/soc/hisilicon/Kconfig | 5 + sound/soc/hisilicon/Makefile | 1 + sound/soc/hisilicon/hi6210-i2s.c | 628 +++++++++++++++++++++++++++++++++++++++ sound/soc/hisilicon/hi6210-i2s.h | 276 +++++++++++++++++ 6 files changed, 912 insertions(+) create mode 100644 sound/soc/hisilicon/Kconfig create mode 100644 sound/soc/hisilicon/Makefile create mode 100644 sound/soc/hisilicon/hi6210-i2s.c create mode 100644 sound/soc/hisilicon/hi6210-i2s.h diff --git a/sound/soc/Kconfig b/sound/soc/Kconfig index 182d92efc7c8..9df9658b552b 100644 --- a/sound/soc/Kconfig +++ b/sound/soc/Kconfig @@ -47,6 +47,7 @@ source "sound/soc/cirrus/Kconfig" source "sound/soc/davinci/Kconfig" source "sound/soc/dwc/Kconfig" source "sound/soc/fsl/Kconfig" +source "sound/soc/hisilicon/Kconfig" source "sound/soc/jz4740/Kconfig" source "sound/soc/nuc900/Kconfig" source "sound/soc/omap/Kconfig" diff --git a/sound/soc/Makefile b/sound/soc/Makefile index 9a30f21d16ee..2f6aabb8b4c3 100644 --- a/sound/soc/Makefile +++ b/sound/soc/Makefile @@ -27,6 +27,7 @@ obj-$(CONFIG_SND_SOC) += cirrus/ obj-$(CONFIG_SND_SOC) += davinci/ obj-$(CONFIG_SND_SOC) += dwc/ obj-$(CONFIG_SND_SOC) += fsl/ +obj-$(CONFIG_SND_SOC) += hisilicon/ obj-$(CONFIG_SND_SOC) += jz4740/ obj-$(CONFIG_SND_SOC) += img/ obj-$(CONFIG_SND_SOC) += intel/ diff --git a/sound/soc/hisilicon/Kconfig b/sound/soc/hisilicon/Kconfig new file mode 100644 index 000000000000..4356d5a1d338 --- /dev/null +++ b/sound/soc/hisilicon/Kconfig @@ -0,0 +1,5 @@ +config SND_I2S_HI6210_I2S + tristate "Hisilicon I2S controller" + select SND_SOC_GENERIC_DMAENGINE_PCM + help + Hisilicon I2S diff --git a/sound/soc/hisilicon/Makefile b/sound/soc/hisilicon/Makefile new file mode 100644 index 000000000000..e8095e2af91a --- /dev/null +++ b/sound/soc/hisilicon/Makefile @@ -0,0 +1 @@ +obj-$(CONFIG_SND_I2S_HI6210_I2S) += hi6210-i2s.o diff --git a/sound/soc/hisilicon/hi6210-i2s.c b/sound/soc/hisilicon/hi6210-i2s.c new file mode 100644 index 000000000000..45691b70060c --- /dev/null +++ b/sound/soc/hisilicon/hi6210-i2s.c @@ -0,0 +1,628 @@ +/* + * linux/sound/soc/m8m/hi6210_i2s.c - I2S IP driver + * + * Copyright (C) 2015 Linaro, Ltd + * Author: Andy Green <andy.green(a)linaro.org> + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * This driver only deals with S2 interface (BT) + */ + +#include <linux/init.h> +#include <linux/module.h> +#include <linux/device.h> +#include <linux/delay.h> +#include <linux/clk.h> +#include <linux/jiffies.h> +#include <linux/io.h> +#include <linux/gpio.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/dmaengine_pcm.h> +#include <sound/initval.h> +#include <sound/soc.h> +#include <linux/interrupt.h> +#include <linux/reset.h> +#include <linux/of_address.h> +#include <linux/of_irq.h> +#include <linux/mfd/syscon.h> +#include <linux/reset-controller.h> +#include <linux/clk.h> + +#include "hi6210-i2s.h" + +struct hi6210_i2s { + struct device *dev; + struct reset_control *rc; + struct clk *clk[8]; + int clocks; + struct snd_soc_dai_driver dai; + void __iomem *base; + struct regmap *sysctrl; + phys_addr_t base_phys; + struct snd_dmaengine_dai_dma_data dma_data[2]; + int clk_rate; + spinlock_t lock; + int rate; + int format; + u8 bits; + u8 channels; + u8 id; + u8 channel_length; + u8 use; + u32 master:1; + u32 status:1; +}; + +#define SC_PERIPH_CLKEN1 0x210 +#define SC_PERIPH_CLKDIS1 0x214 + +#define SC_PERIPH_CLKEN3 0x230 +#define SC_PERIPH_CLKDIS3 0x234 + +#define SC_PERIPH_CLKEN12 0x270 +#define SC_PERIPH_CLKDIS12 0x274 + +#define SC_PERIPH_RSTEN1 0x310 +#define SC_PERIPH_RSTDIS1 0x314 +#define SC_PERIPH_RSTSTAT1 0x318 + +#define SC_PERIPH_RSTEN2 0x320 +#define SC_PERIPH_RSTDIS2 0x324 +#define SC_PERIPH_RSTSTAT2 0x328 + +#define SOC_PMCTRL_BBPPLLALIAS 0x48 + +enum { + CLK_DACODEC, + CLK_I2S_BASE, +}; + +static inline void hi6210_write_reg(struct hi6210_i2s *i2s, int reg, u32 val) +{ + writel(val, i2s->base + reg); +} + +static inline u32 hi6210_read_reg(struct hi6210_i2s *i2s, int reg) +{ + return readl(i2s->base + reg); +} + +int hi6210_i2s_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *cpu_dai) +{ + struct hi6210_i2s *i2s = dev_get_drvdata(cpu_dai->dev); + int ret, n; + u32 val; + + /* deassert reset on ABB */ + regmap_read(i2s->sysctrl, SC_PERIPH_RSTSTAT2, &val); + if (val & BIT(4)) + regmap_write(i2s->sysctrl, SC_PERIPH_RSTDIS2, BIT(4)); + + for (n = 0; n < i2s->clocks; n++) { + ret = clk_prepare_enable(i2s->clk[n]); + if (ret) { + while (n--) + clk_disable_unprepare(i2s->clk[n]); + return ret; + } + } + + ret = clk_set_rate(i2s->clk[CLK_I2S_BASE], 49152000); + if (ret) { + dev_err(i2s->dev, "%s: setting 49.152MHz base rate failed %d\n", + __func__, ret); + return ret; + } + + /* enable clock before frequency division */ + regmap_write(i2s->sysctrl, SC_PERIPH_CLKEN12, BIT(9)); + + /* enable codec working clock / == "codec bus clock" */ + regmap_write(i2s->sysctrl, SC_PERIPH_CLKEN1, BIT(5)); + + /* deassert reset on codec / interface clock / working clock */ + regmap_write(i2s->sysctrl, SC_PERIPH_RSTEN1, BIT(5)); + regmap_write(i2s->sysctrl, SC_PERIPH_RSTDIS1, BIT(5)); + + /* not interested in i2s irqs */ + val = hi6210_read_reg(i2s, HII2S_CODEC_IRQ_MASK); + val |= 0x3f; + hi6210_write_reg(i2s, HII2S_CODEC_IRQ_MASK, val); + + + /* reset the stereo downlink fifo */ + val = hi6210_read_reg(i2s, HII2S_APB_AFIFO_CFG_1); + val |= (BIT(5) | BIT(4)); + hi6210_write_reg(i2s, HII2S_APB_AFIFO_CFG_1, val); + + val = hi6210_read_reg(i2s, HII2S_APB_AFIFO_CFG_1); + val &= ~(BIT(5) | BIT(4)); + hi6210_write_reg(i2s, HII2S_APB_AFIFO_CFG_1, val); + + + val = hi6210_read_reg(i2s, HII2S_SW_RST_N); + val &= ~(HII2S_SW_RST_N__ST_DL_WORDLEN_MASK << + HII2S_SW_RST_N__ST_DL_WORDLEN_SHIFT); + val |= (HII2S_BITS_16 << HII2S_SW_RST_N__ST_DL_WORDLEN_SHIFT); + hi6210_write_reg(i2s, HII2S_SW_RST_N, val); + + val = hi6210_read_reg(i2s, HII2S_MISC_CFG); + /* mux 11/12 = APB not i2s */ + val &= ~HII2S_MISC_CFG__ST_DL_TEST_SEL; + /* BT R ch 0 = mixer op of DACR ch */ + val &= ~HII2S_MISC_CFG__S2_DOUT_RIGHT_SEL; + val &= ~HII2S_MISC_CFG__S2_DOUT_TEST_SEL; + + val |= HII2S_MISC_CFG__S2_DOUT_RIGHT_SEL; + /* BT L ch = 1 = mux 7 = "mixer output of DACL */ + val |= HII2S_MISC_CFG__S2_DOUT_TEST_SEL; + hi6210_write_reg(i2s, HII2S_MISC_CFG, val); + + val = hi6210_read_reg(i2s, HII2S_SW_RST_N); + val |= HII2S_SW_RST_N__SW_RST_N; + hi6210_write_reg(i2s, HII2S_SW_RST_N, val); + + return 0; +} +void hi6210_i2s_shutdown(struct snd_pcm_substream *substream, + struct snd_soc_dai *cpu_dai) +{ + struct hi6210_i2s *i2s = dev_get_drvdata(cpu_dai->dev); + int n; + + for (n = 0; n < i2s->clocks; n++) + clk_disable_unprepare(i2s->clk[n]); + + regmap_write(i2s->sysctrl, SC_PERIPH_RSTEN1, BIT(5)); +} + +static void hi6210_i2s_txctrl(struct snd_soc_dai *cpu_dai, int on) +{ + struct hi6210_i2s *i2s = dev_get_drvdata(cpu_dai->dev); + u32 val; + + spin_lock(&i2s->lock); + if (on) { + /* enable S2 TX */ + val = hi6210_read_reg(i2s, HII2S_I2S_CFG); + val |= HII2S_I2S_CFG__S2_IF_TX_EN; + hi6210_write_reg(i2s, HII2S_I2S_CFG, val); + } else { + /* disable S2 TX */ + val = hi6210_read_reg(i2s, HII2S_I2S_CFG); + val &= ~HII2S_I2S_CFG__S2_IF_TX_EN; + hi6210_write_reg(i2s, HII2S_I2S_CFG, val); + } + spin_unlock(&i2s->lock); +} + +static void hi6210_i2s_rxctrl(struct snd_soc_dai *cpu_dai, int on) +{ + struct hi6210_i2s *i2s = dev_get_drvdata(cpu_dai->dev); + u32 val; + + spin_lock(&i2s->lock); + if (on) { + val = hi6210_read_reg(i2s, HII2S_I2S_CFG); + val |= HII2S_I2S_CFG__S2_IF_RX_EN; + hi6210_write_reg(i2s, HII2S_I2S_CFG, val); + } else { + val = hi6210_read_reg(i2s, HII2S_I2S_CFG); + val &= ~HII2S_I2S_CFG__S2_IF_RX_EN; + hi6210_write_reg(i2s, HII2S_I2S_CFG, val); + } + spin_unlock(&i2s->lock); +} + +static int hi6210_i2s_set_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt) +{ + struct hi6210_i2s *i2s = dev_get_drvdata(cpu_dai->dev); + + /* + * We don't actually set the hardware until the hw_params + * call, but we need to validate the user input here. + */ + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBM_CFM: + case SND_SOC_DAIFMT_CBS_CFS: + break; + default: + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + case SND_SOC_DAIFMT_LEFT_J: + case SND_SOC_DAIFMT_RIGHT_J: + break; + default: + return -EINVAL; + } + + i2s->format = fmt; + i2s->master = (i2s->format & SND_SOC_DAIFMT_MASTER_MASK) == + SND_SOC_DAIFMT_CBS_CFS; + + return 0; +} + +static int hi6210_i2s_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *cpu_dai) +{ + struct hi6210_i2s *i2s = dev_get_drvdata(cpu_dai->dev); + u32 bits = 0, rate = 0, signed_data = 0, fmt = 0; + u32 val; + struct snd_dmaengine_dai_dma_data *dma_data; + + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_U16_LE: + signed_data = HII2S_I2S_CFG__S2_CODEC_DATA_FORMAT; + /* fallthru */ + case SNDRV_PCM_FORMAT_S16_LE: + bits = HII2S_BITS_16; + break; + case SNDRV_PCM_FORMAT_U24_LE: + signed_data = HII2S_I2S_CFG__S2_CODEC_DATA_FORMAT; + /* fallthru */ + case SNDRV_PCM_FORMAT_S24_LE: + bits = HII2S_BITS_24; + break; + default: + dev_err(cpu_dai->dev, "Bad format\n"); + return -EINVAL; + } + + + switch (params_rate(params)) { + case 8000: + rate = HII2S_FS_RATE_8KHZ; + break; + case 16000: + rate = HII2S_FS_RATE_16KHZ; + break; + case 32000: + rate = HII2S_FS_RATE_32KHZ; + break; + case 48000: + rate = HII2S_FS_RATE_48KHZ; + break; + case 96000: + rate = HII2S_FS_RATE_96KHZ; + break; + case 192000: + rate = HII2S_FS_RATE_192KHZ; + break; + default: + dev_err(cpu_dai->dev, "Bad rate: %d\n", params_rate(params)); + return -EINVAL; + } + + if (!(params_channels(params))) { + dev_err(cpu_dai->dev, "Bad channels\n"); + return -EINVAL; + } + + dma_data = snd_soc_dai_get_dma_data(cpu_dai, substream); + + switch (bits) { + case HII2S_BITS_24: + i2s->bits = 32; + dma_data->addr_width = 3; + break; + default: + i2s->bits = 16; + dma_data->addr_width = 2; + } + i2s->rate = params_rate(params); + i2s->channels = params_channels(params); + i2s->channel_length = i2s->channels * i2s->bits; + + val = hi6210_read_reg(i2s, HII2S_ST_DL_FIFO_TH_CFG); + val &= ~((HII2S_ST_DL_FIFO_TH_CFG__ST_DL_R_AEMPTY_MASK << + HII2S_ST_DL_FIFO_TH_CFG__ST_DL_R_AEMPTY_SHIFT) | + (HII2S_ST_DL_FIFO_TH_CFG__ST_DL_R_AFULL_MASK << + HII2S_ST_DL_FIFO_TH_CFG__ST_DL_R_AFULL_SHIFT) | + (HII2S_ST_DL_FIFO_TH_CFG__ST_DL_L_AEMPTY_MASK << + HII2S_ST_DL_FIFO_TH_CFG__ST_DL_L_AEMPTY_SHIFT) | + (HII2S_ST_DL_FIFO_TH_CFG__ST_DL_L_AFULL_MASK << + HII2S_ST_DL_FIFO_TH_CFG__ST_DL_L_AFULL_SHIFT)); + val |= ((16 << HII2S_ST_DL_FIFO_TH_CFG__ST_DL_R_AEMPTY_SHIFT) | + (30 << HII2S_ST_DL_FIFO_TH_CFG__ST_DL_R_AFULL_SHIFT) | + (16 << HII2S_ST_DL_FIFO_TH_CFG__ST_DL_L_AEMPTY_SHIFT) | + (30 << HII2S_ST_DL_FIFO_TH_CFG__ST_DL_L_AFULL_SHIFT)); + hi6210_write_reg(i2s, HII2S_ST_DL_FIFO_TH_CFG, val); + + + val = hi6210_read_reg(i2s, HII2S_IF_CLK_EN_CFG); + val |= (BIT(19) | BIT(18) | BIT(17) | + HII2S_IF_CLK_EN_CFG__S2_IF_CLK_EN | + HII2S_IF_CLK_EN_CFG__S2_OL_MIXER_EN | + HII2S_IF_CLK_EN_CFG__S2_OL_SRC_EN | + HII2S_IF_CLK_EN_CFG__ST_DL_R_EN | + HII2S_IF_CLK_EN_CFG__ST_DL_L_EN); + hi6210_write_reg(i2s, HII2S_IF_CLK_EN_CFG, val); + + + val = hi6210_read_reg(i2s, HII2S_DIG_FILTER_CLK_EN_CFG); + val &= ~(HII2S_DIG_FILTER_CLK_EN_CFG__DACR_SDM_EN | + HII2S_DIG_FILTER_CLK_EN_CFG__DACR_HBF2I_EN | + HII2S_DIG_FILTER_CLK_EN_CFG__DACR_AGC_EN | + HII2S_DIG_FILTER_CLK_EN_CFG__DACL_SDM_EN | + HII2S_DIG_FILTER_CLK_EN_CFG__DACL_HBF2I_EN | + HII2S_DIG_FILTER_CLK_EN_CFG__DACL_AGC_EN); + val |= (HII2S_DIG_FILTER_CLK_EN_CFG__DACR_MIXER_EN | + HII2S_DIG_FILTER_CLK_EN_CFG__DACL_MIXER_EN); + hi6210_write_reg(i2s, HII2S_DIG_FILTER_CLK_EN_CFG, val); + + + val = hi6210_read_reg(i2s, HII2S_DIG_FILTER_MODULE_CFG); + val &= ~(HII2S_DIG_FILTER_MODULE_CFG__DACR_MIXER_IN2_MUTE | + HII2S_DIG_FILTER_MODULE_CFG__DACL_MIXER_IN2_MUTE); + hi6210_write_reg(i2s, HII2S_DIG_FILTER_MODULE_CFG, val); + + val = hi6210_read_reg(i2s, HII2S_MUX_TOP_MODULE_CFG); + val &= ~(HII2S_MUX_TOP_MODULE_CFG__S2_OL_MIXER_IN1_MUTE | + HII2S_MUX_TOP_MODULE_CFG__S2_OL_MIXER_IN2_MUTE | + HII2S_MUX_TOP_MODULE_CFG__VOICE_DLINK_MIXER_IN1_MUTE | + HII2S_MUX_TOP_MODULE_CFG__VOICE_DLINK_MIXER_IN2_MUTE); + hi6210_write_reg(i2s, HII2S_MUX_TOP_MODULE_CFG, val); + + + switch (i2s->format & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBM_CFM: + i2s->master = false; + val = hi6210_read_reg(i2s, HII2S_I2S_CFG); + val |= HII2S_I2S_CFG__S2_MST_SLV; + hi6210_write_reg(i2s, HII2S_I2S_CFG, val); + break; + case SND_SOC_DAIFMT_CBS_CFS: + i2s->master = true; + val = hi6210_read_reg(i2s, HII2S_I2S_CFG); + val &= ~HII2S_I2S_CFG__S2_MST_SLV; + hi6210_write_reg(i2s, HII2S_I2S_CFG, val); + break; + default: + WARN_ONCE(1, "Invalid i2s->fmt MASTER_MASK. This shouldn't happen\n"); + } + + switch (i2s->format & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + fmt = HII2S_FORMAT_I2S; + break; + case SND_SOC_DAIFMT_LEFT_J: + fmt = HII2S_FORMAT_LEFT_JUST; + break; + case SND_SOC_DAIFMT_RIGHT_J: + fmt = HII2S_FORMAT_RIGHT_JUST; + break; + default: + WARN_ONCE(1, "Invalid i2s->fmt FORMAT_MASK. This shouldn't happen\n"); + } + + val = hi6210_read_reg(i2s, HII2S_I2S_CFG); + val &= ~(HII2S_I2S_CFG__S2_FUNC_MODE_MASK << + HII2S_I2S_CFG__S2_FUNC_MODE_SHIFT); + val |= fmt << HII2S_I2S_CFG__S2_FUNC_MODE_SHIFT; + hi6210_write_reg(i2s, HII2S_I2S_CFG, val); + + + val = hi6210_read_reg(i2s, HII2S_CLK_SEL); + val &= ~(HII2S_CLK_SEL__I2S_BT_FM_SEL | /* BT gets the I2S */ + HII2S_CLK_SEL__EXT_12_288MHZ_SEL); + hi6210_write_reg(i2s, HII2S_CLK_SEL, val); + + dma_data->maxburst = 2; + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + dma_data->addr = i2s->base_phys + HII2S_ST_DL_CHANNEL; + else + dma_data->addr = i2s->base_phys + HII2S_STEREO_UPLINK_CHANNEL; + + switch (i2s->channels) { + case 1: + val = hi6210_read_reg(i2s, HII2S_I2S_CFG); + val |= HII2S_I2S_CFG__S2_FRAME_MODE; + hi6210_write_reg(i2s, HII2S_I2S_CFG, val); + break; + default: + val = hi6210_read_reg(i2s, HII2S_I2S_CFG); + val &= ~HII2S_I2S_CFG__S2_FRAME_MODE; + hi6210_write_reg(i2s, HII2S_I2S_CFG, val); + } + + /* clear loopback, set signed type and word length */ + val = hi6210_read_reg(i2s, HII2S_I2S_CFG); + val &= ~HII2S_I2S_CFG__S2_CODEC_DATA_FORMAT; + val &= ~(HII2S_I2S_CFG__S2_CODEC_IO_WORDLENGTH_MASK << + HII2S_I2S_CFG__S2_CODEC_IO_WORDLENGTH_SHIFT); + val &= ~(HII2S_I2S_CFG__S2_DIRECT_LOOP_MASK << + HII2S_I2S_CFG__S2_DIRECT_LOOP_SHIFT); + val |= signed_data; + val |= (bits << HII2S_I2S_CFG__S2_CODEC_IO_WORDLENGTH_SHIFT); + hi6210_write_reg(i2s, HII2S_I2S_CFG, val); + + + if (!i2s->master) + return 0; + + /* set DAC and related units to correct rate */ + val = hi6210_read_reg(i2s, HII2S_FS_CFG); + val &= ~(HII2S_FS_CFG__FS_S2_MASK << HII2S_FS_CFG__FS_S2_SHIFT); + val &= ~(HII2S_FS_CFG__FS_DACLR_MASK << HII2S_FS_CFG__FS_DACLR_SHIFT); + val &= ~(HII2S_FS_CFG__FS_ST_DL_R_MASK << + HII2S_FS_CFG__FS_ST_DL_R_SHIFT); + val &= ~(HII2S_FS_CFG__FS_ST_DL_L_MASK << + HII2S_FS_CFG__FS_ST_DL_L_SHIFT); + val |= (rate << HII2S_FS_CFG__FS_S2_SHIFT); + val |= (rate << HII2S_FS_CFG__FS_DACLR_SHIFT); + val |= (rate << HII2S_FS_CFG__FS_ST_DL_R_SHIFT); + val |= (rate << HII2S_FS_CFG__FS_ST_DL_L_SHIFT); + hi6210_write_reg(i2s, HII2S_FS_CFG, val); + + return 0; +} + +static int hi6210_i2s_trigger(struct snd_pcm_substream *substream, int cmd, + struct snd_soc_dai *cpu_dai) +{ + pr_debug("%s\n", __func__); + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) + hi6210_i2s_rxctrl(cpu_dai, 1); + else + hi6210_i2s_txctrl(cpu_dai, 1); + break; + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) + hi6210_i2s_rxctrl(cpu_dai, 0); + else + hi6210_i2s_txctrl(cpu_dai, 0); + break; + default: + dev_err(cpu_dai->dev, "uknown cmd\n"); + return -EINVAL; + } + return 0; +} + +static int hi6210_i2s_dai_probe(struct snd_soc_dai *dai) +{ + struct hi6210_i2s *i2s = snd_soc_dai_get_drvdata(dai); + + snd_soc_dai_init_dma_data(dai, + &i2s->dma_data[SNDRV_PCM_STREAM_PLAYBACK], + &i2s->dma_data[SNDRV_PCM_STREAM_CAPTURE]); + + return 0; +} + + +static struct snd_soc_dai_ops hi6210_i2s_dai_ops = { + .trigger = hi6210_i2s_trigger, + .hw_params = hi6210_i2s_hw_params, + .set_fmt = hi6210_i2s_set_fmt, + .startup = hi6210_i2s_startup, + .shutdown = hi6210_i2s_shutdown, +}; + +struct snd_soc_dai_driver hi6210_i2s_dai_init = { + .probe = hi6210_i2s_dai_probe, + .playback = { + .channels_min = 2, + .channels_max = 2, + .formats = SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_U16_LE, + .rates = SNDRV_PCM_RATE_48000, + }, + .capture = { + .channels_min = 2, + .channels_max = 2, + .formats = SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_U16_LE, + .rates = SNDRV_PCM_RATE_48000, + }, + .ops = &hi6210_i2s_dai_ops, +}; + +static const struct snd_soc_component_driver hi6210_i2s_i2s_comp = { + .name = "hi6210_i2s-i2s", +}; + +static int hi6210_i2s_probe(struct platform_device *pdev) +{ + struct device_node *node = pdev->dev.of_node; + struct device *dev = &pdev->dev; + struct hi6210_i2s *i2s; + struct resource *res; + int ret; + + i2s = devm_kzalloc(&pdev->dev, sizeof(*i2s), GFP_KERNEL); + if (!i2s) + return -ENOMEM; + + i2s->dev = dev; + spin_lock_init(&i2s->lock); + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + i2s->base = devm_ioremap_resource(dev, res); + if (IS_ERR(i2s->base)) + return PTR_ERR(i2s->base); + + i2s->base_phys = (phys_addr_t)res->start; + i2s->dai = hi6210_i2s_dai_init; + + dev_set_drvdata(&pdev->dev, i2s); + + i2s->sysctrl = syscon_regmap_lookup_by_phandle(node, + "hisilicon,sysctrl-syscon"); + if (IS_ERR(i2s->sysctrl)) + return PTR_ERR(i2s->sysctrl); + + i2s->clk[CLK_DACODEC] = devm_clk_get(&pdev->dev, "dacodec"); + if (IS_ERR_OR_NULL(i2s->clk[CLK_DACODEC])) + return PTR_ERR(i2s->clk[CLK_DACODEC]); + i2s->clocks++; + + i2s->clk[CLK_I2S_BASE] = devm_clk_get(&pdev->dev, "i2s-base"); + if (IS_ERR_OR_NULL(i2s->clk[CLK_I2S_BASE])) + return PTR_ERR(i2s->clk[CLK_I2S_BASE]); + i2s->clocks++; + + ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0); + if (ret) + return ret; + + ret = snd_soc_register_component(&pdev->dev, &hi6210_i2s_i2s_comp, + &i2s->dai, 1); + if (ret) { + dev_err(&pdev->dev, "Failed to register dai\n"); + return ret; + } + + return 0; +} + +static int hi6210_i2s_remove(struct platform_device *pdev) +{ + snd_soc_unregister_component(&pdev->dev); + dev_set_drvdata(&pdev->dev, NULL); + + return 0; +} + +static const struct of_device_id hi6210_i2s_dt_ids[] = { + { .compatible = "hisilicon,hi6210-i2s" }, + { /* sentinel */ } +}; + +MODULE_DEVICE_TABLE(of, hi6210_i2s_dt_ids); + +static struct platform_driver hi6210_i2s_driver = { + .probe = hi6210_i2s_probe, + .remove = hi6210_i2s_remove, + .driver = { + .name = "hi6210_i2s", + .of_match_table = hi6210_i2s_dt_ids, + }, +}; + +module_platform_driver(hi6210_i2s_driver); + +MODULE_DESCRIPTION("Hisilicon HI6210 I2S driver"); +MODULE_AUTHOR("Andy Green <andy.green(a)linaro.org>"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/hisilicon/hi6210-i2s.h b/sound/soc/hisilicon/hi6210-i2s.h new file mode 100644 index 000000000000..85cecc4939a0 --- /dev/null +++ b/sound/soc/hisilicon/hi6210-i2s.h @@ -0,0 +1,276 @@ +/* + * linux/sound/soc/hisilicon/hi6210-i2s.h + * + * Copyright (C) 2015 Linaro, Ltd + * Author: Andy Green <andy.green(a)linaro.org> + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + * + * Note at least on 6220, S2 == BT, S1 == Digital FM Radio IF + */ + +#ifndef _HI6210_I2S_H +#define _HI6210_I2S_H + +#define HII2S_SW_RST_N 0 + +#define HII2S_SW_RST_N__STEREO_UPLINK_WORDLEN_SHIFT 28 +#define HII2S_SW_RST_N__STEREO_UPLINK_WORDLEN_MASK 3 +#define HII2S_SW_RST_N__THIRDMD_UPLINK_WORDLEN_SHIFT 26 +#define HII2S_SW_RST_N__THIRDMD_UPLINK_WORDLEN_MASK 3 +#define HII2S_SW_RST_N__VOICE_UPLINK_WORDLEN_SHIFT 24 +#define HII2S_SW_RST_N__VOICE_UPLINK_WORDLEN_MASK 3 +#define HII2S_SW_RST_N__ST_DL_WORDLEN_SHIFT 20 +#define HII2S_SW_RST_N__ST_DL_WORDLEN_MASK 3 +#define HII2S_SW_RST_N__THIRDMD_DLINK_WORDLEN_SHIFT 18 +#define HII2S_SW_RST_N__THIRDMD_DLINK_WORDLEN_MASK 3 +#define HII2S_SW_RST_N__VOICE_DLINK_WORDLEN_SHIFT 16 +#define HII2S_SW_RST_N__VOICE_DLINK_WORDLEN_MASK 3 + +#define HII2S_SW_RST_N__SW_RST_N BIT(0) + +enum hi6210_bits { + HII2S_BITS_16, + HII2S_BITS_18, + HII2S_BITS_20, + HII2S_BITS_24, +}; + + +#define HII2S_IF_CLK_EN_CFG 4 + +#define HII2S_IF_CLK_EN_CFG__THIRDMD_UPLINK_EN BIT(25) +#define HII2S_IF_CLK_EN_CFG__THIRDMD_DLINK_EN BIT(24) +#define HII2S_IF_CLK_EN_CFG__S3_IF_CLK_EN BIT(20) +#define HII2S_IF_CLK_EN_CFG__S2_IF_CLK_EN BIT(16) +#define HII2S_IF_CLK_EN_CFG__S2_OL_MIXER_EN BIT(15) +#define HII2S_IF_CLK_EN_CFG__S2_OL_SRC_EN BIT(14) +#define HII2S_IF_CLK_EN_CFG__S2_IR_PGA_EN BIT(13) +#define HII2S_IF_CLK_EN_CFG__S2_IL_PGA_EN BIT(12) +#define HII2S_IF_CLK_EN_CFG__S1_IR_PGA_EN BIT(10) +#define HII2S_IF_CLK_EN_CFG__S1_IL_PGA_EN BIT(9) +#define HII2S_IF_CLK_EN_CFG__S1_IF_CLK_EN BIT(8) +#define HII2S_IF_CLK_EN_CFG__VOICE_DLINK_SRC_EN BIT(7) +#define HII2S_IF_CLK_EN_CFG__VOICE_DLINK_EN BIT(6) +#define HII2S_IF_CLK_EN_CFG__ST_DL_R_EN BIT(5) +#define HII2S_IF_CLK_EN_CFG__ST_DL_L_EN BIT(4) +#define HII2S_IF_CLK_EN_CFG__VOICE_UPLINK_R_EN BIT(3) +#define HII2S_IF_CLK_EN_CFG__VOICE_UPLINK_L_EN BIT(2) +#define HII2S_IF_CLK_EN_CFG__STEREO_UPLINK_R_EN BIT(1) +#define HII2S_IF_CLK_EN_CFG__STEREO_UPLINK_L_EN BIT(0) + +#define HII2S_DIG_FILTER_CLK_EN_CFG 8 +#define HII2S_DIG_FILTER_CLK_EN_CFG__DACR_SDM_EN BIT(30) +#define HII2S_DIG_FILTER_CLK_EN_CFG__DACR_HBF2I_EN BIT(28) +#define HII2S_DIG_FILTER_CLK_EN_CFG__DACR_MIXER_EN BIT(25) +#define HII2S_DIG_FILTER_CLK_EN_CFG__DACR_AGC_EN BIT(24) +#define HII2S_DIG_FILTER_CLK_EN_CFG__DACL_SDM_EN BIT(22) +#define HII2S_DIG_FILTER_CLK_EN_CFG__DACL_HBF2I_EN BIT(20) +#define HII2S_DIG_FILTER_CLK_EN_CFG__DACL_MIXER_EN BIT(17) +#define HII2S_DIG_FILTER_CLK_EN_CFG__DACL_AGC_EN BIT(16) + +#define HII2S_FS_CFG 0xc + +#define HII2S_FS_CFG__FS_S2_SHIFT 28 +#define HII2S_FS_CFG__FS_S2_MASK 7 +#define HII2S_FS_CFG__FS_S1_SHIFT 24 +#define HII2S_FS_CFG__FS_S1_MASK 7 +#define HII2S_FS_CFG__FS_ADCLR_SHIFT 20 +#define HII2S_FS_CFG__FS_ADCLR_MASK 7 +#define HII2S_FS_CFG__FS_DACLR_SHIFT 16 +#define HII2S_FS_CFG__FS_DACLR_MASK 7 +#define HII2S_FS_CFG__FS_ST_DL_R_SHIFT 8 +#define HII2S_FS_CFG__FS_ST_DL_R_MASK 7 +#define HII2S_FS_CFG__FS_ST_DL_L_SHIFT 4 +#define HII2S_FS_CFG__FS_ST_DL_L_MASK 7 +#define HII2S_FS_CFG__FS_VOICE_DLINK_SHIFT 0 +#define HII2S_FS_CFG__FS_VOICE_DLINK_MASK 7 + +enum hi6210_i2s_rates { + HII2S_FS_RATE_8KHZ = 0, + HII2S_FS_RATE_16KHZ = 1, + HII2S_FS_RATE_32KHZ = 2, + HII2S_FS_RATE_48KHZ = 4, + HII2S_FS_RATE_96KHZ = 5, + HII2S_FS_RATE_192KHZ = 6, +}; + +#define HII2S_I2S_CFG 0x10 + +#define HII2S_I2S_CFG__S2_IF_TX_EN BIT(31) +#define HII2S_I2S_CFG__S2_IF_RX_EN BIT(30) +#define HII2S_I2S_CFG__S2_FRAME_MODE BIT(29) +#define HII2S_I2S_CFG__S2_MST_SLV BIT(28) +#define HII2S_I2S_CFG__S2_LRCK_MODE BIT(27) +#define HII2S_I2S_CFG__S2_CHNNL_MODE BIT(26) +#define HII2S_I2S_CFG__S2_CODEC_IO_WORDLENGTH_SHIFT 24 +#define HII2S_I2S_CFG__S2_CODEC_IO_WORDLENGTH_MASK 3 +#define HII2S_I2S_CFG__S2_DIRECT_LOOP_SHIFT 22 +#define HII2S_I2S_CFG__S2_DIRECT_LOOP_MASK 3 +#define HII2S_I2S_CFG__S2_TX_CLK_SEL BIT(21) +#define HII2S_I2S_CFG__S2_RX_CLK_SEL BIT(20) +#define HII2S_I2S_CFG__S2_CODEC_DATA_FORMAT BIT(19) +#define HII2S_I2S_CFG__S2_FUNC_MODE_SHIFT 16 +#define HII2S_I2S_CFG__S2_FUNC_MODE_MASK 7 +#define HII2S_I2S_CFG__S1_IF_TX_EN BIT(15) +#define HII2S_I2S_CFG__S1_IF_RX_EN BIT(14) +#define HII2S_I2S_CFG__S1_FRAME_MODE BIT(13) +#define HII2S_I2S_CFG__S1_MST_SLV BIT(12) +#define HII2S_I2S_CFG__S1_LRCK_MODE BIT(11) +#define HII2S_I2S_CFG__S1_CHNNL_MODE BIT(10) +#define HII2S_I2S_CFG__S1_CODEC_IO_WORDLENGTH_SHIFT 8 +#define HII2S_I2S_CFG__S1_CODEC_IO_WORDLENGTH_MASK 3 +#define HII2S_I2S_CFG__S1_DIRECT_LOOP_SHIFT 6 +#define HII2S_I2S_CFG__S1_DIRECT_LOOP_MASK 3 +#define HII2S_I2S_CFG__S1_TX_CLK_SEL BIT(5) +#define HII2S_I2S_CFG__S1_RX_CLK_SEL BIT(4) +#define HII2S_I2S_CFG__S1_CODEC_DATA_FORMAT BIT(3) +#define HII2S_I2S_CFG__S1_FUNC_MODE_SHIFT 0 +#define HII2S_I2S_CFG__S1_FUNC_MODE_MASK 7 + +enum hi6210_i2s_formats { + HII2S_FORMAT_I2S, + HII2S_FORMAT_PCM_STD, + HII2S_FORMAT_PCM_USER, + HII2S_FORMAT_LEFT_JUST, + HII2S_FORMAT_RIGHT_JUST, +}; + +#define HII2S_DIG_FILTER_MODULE_CFG 0x14 + +#define HII2S_DIG_FILTER_MODULE_CFG__DACR_MIXER_GAIN_SHIFT 28 +#define HII2S_DIG_FILTER_MODULE_CFG__DACR_MIXER_GAIN_MASK 3 +#define HII2S_DIG_FILTER_MODULE_CFG__DACR_MIXER_IN4_MUTE BIT(27) +#define HII2S_DIG_FILTER_MODULE_CFG__DACR_MIXER_IN3_MUTE BIT(26) +#define HII2S_DIG_FILTER_MODULE_CFG__DACR_MIXER_IN2_MUTE BIT(25) +#define HII2S_DIG_FILTER_MODULE_CFG__DACR_MIXER_IN1_MUTE BIT(24) +#define HII2S_DIG_FILTER_MODULE_CFG__DACL_MIXER_GAIN_SHIFT 20 +#define HII2S_DIG_FILTER_MODULE_CFG__DACL_MIXER_GAIN_MASK 3 +#define HII2S_DIG_FILTER_MODULE_CFG__DACL_MIXER_IN4_MUTE BIT(19) +#define HII2S_DIG_FILTER_MODULE_CFG__DACL_MIXER_IN3_MUTE BIT(18) +#define HII2S_DIG_FILTER_MODULE_CFG__DACL_MIXER_IN2_MUTE BIT(17) +#define HII2S_DIG_FILTER_MODULE_CFG__DACL_MIXER_IN1_MUTE BIT(16) +#define HII2S_DIG_FILTER_MODULE_CFG__SW_DACR_SDM_DITHER BIT(9) +#define HII2S_DIG_FILTER_MODULE_CFG__SW_DACL_SDM_DITHER BIT(8) +#define HII2S_DIG_FILTER_MODULE_CFG__LM_CODEC_DAC2ADC_SHIFT 4 +#define HII2S_DIG_FILTER_MODULE_CFG__LM_CODEC_DAC2ADC_MASK 7 +#define HII2S_DIG_FILTER_MODULE_CFG__RM_CODEC_DAC2ADC_SHIFT 0 +#define HII2S_DIG_FILTER_MODULE_CFG__RM_CODEC_DAC2ADC_MASK 7 + +enum hi6210_gains { + HII2S_GAIN_100PC, + HII2S_GAIN_50PC, + HII2S_GAIN_25PC, +}; + +#define HII2S_MUX_TOP_MODULE_CFG 0x18 + +#define HII2S_MUX_TOP_MODULE_CFG__VOICE_DLINK_MIXER_GAIN_SHIFT 14 +#define HII2S_MUX_TOP_MODULE_CFG__VOICE_DLINK_MIXER_GAIN_MASK 3 +#define HII2S_MUX_TOP_MODULE_CFG__VOICE_DLINK_MIXER_IN2_MUTE BIT(13) +#define HII2S_MUX_TOP_MODULE_CFG__VOICE_DLINK_MIXER_IN1_MUTE BIT(12) +#define HII2S_MUX_TOP_MODULE_CFG__S2_OL_MIXER_GAIN_SHIFT 10 +#define HII2S_MUX_TOP_MODULE_CFG__S2_OL_MIXER_GAIN_MASK 3 +#define HII2S_MUX_TOP_MODULE_CFG__S2_OL_MIXER_IN2_MUTE BIT(9) +#define HII2S_MUX_TOP_MODULE_CFG__S2_OL_MIXER_IN1_MUTE BIT(8) +#define HII2S_MUX_TOP_MODULE_CFG__S2_OL_SRC_RDY BIT(6) +#define HII2S_MUX_TOP_MODULE_CFG__S2_OL_SRC_MODE_SHIFT 4 +#define HII2S_MUX_TOP_MODULE_CFG__S2_OL_SRC_MODE_MASK 3 +#define HII2S_MUX_TOP_MODULE_CFG__VOICE_DLINK_SRC_RDY BIT(3) +#define HII2S_MUX_TOP_MODULE_CFG__VOICE_DLINK_SRC_MODE_SHIFT 0 +#define HII2S_MUX_TOP_MODULE_CFG__VOICE_DLINK_SRC_MODE_MASK 7 + +enum hi6210_s2_src_mode { + HII2S_S2_SRC_MODE_3, + HII2S_S2_SRC_MODE_12, + HII2S_S2_SRC_MODE_6, + HII2S_S2_SRC_MODE_2, +}; + +enum hi6210_voice_dlink_src_mode { + HII2S_VOICE_DL_SRC_MODE_12 = 1, + HII2S_VOICE_DL_SRC_MODE_6, + HII2S_VOICE_DL_SRC_MODE_2, + HII2S_VOICE_DL_SRC_MODE_3, +}; + +#define HII2S_ADC_PGA_CFG 0x1c +#define HII2S_S1_INPUT_PGA_CFG 0x20 +#define HII2S_S2_INPUT_PGA_CFG 0x24 +#define HII2S_ST_DL_PGA_CFG 0x28 +#define HII2S_VOICE_SIDETONE_DLINK_PGA_CFG 0x2c +#define HII2S_APB_AFIFO_CFG_1 0x30 +#define HII2S_APB_AFIFO_CFG_2 0x34 +#define HII2S_ST_DL_FIFO_TH_CFG 0x38 + +#define HII2S_ST_DL_FIFO_TH_CFG__ST_DL_R_AEMPTY_SHIFT 24 +#define HII2S_ST_DL_FIFO_TH_CFG__ST_DL_R_AEMPTY_MASK 0x1f +#define HII2S_ST_DL_FIFO_TH_CFG__ST_DL_R_AFULL_SHIFT 16 +#define HII2S_ST_DL_FIFO_TH_CFG__ST_DL_R_AFULL_MASK 0x1f +#define HII2S_ST_DL_FIFO_TH_CFG__ST_DL_L_AEMPTY_SHIFT 8 +#define HII2S_ST_DL_FIFO_TH_CFG__ST_DL_L_AEMPTY_MASK 0x1f +#define HII2S_ST_DL_FIFO_TH_CFG__ST_DL_L_AFULL_SHIFT 0 +#define HII2S_ST_DL_FIFO_TH_CFG__ST_DL_L_AFULL_MASK 0x1f + +#define HII2S_STEREO_UPLINK_FIFO_TH_CFG 0x3c +#define HII2S_VOICE_UPLINK_FIFO_TH_CFG 0x40 +#define HII2S_CODEC_IRQ_MASK 0x44 +#define HII2S_CODEC_IRQ 0x48 +#define HII2S_DACL_AGC_CFG_1 0x4c +#define HII2S_DACL_AGC_CFG_2 0x50 +#define HII2S_DACR_AGC_CFG_1 0x54 +#define HII2S_DACR_AGC_CFG_2 0x58 +#define HII2S_DMIC_SIF_CFG 0x5c +#define HII2S_MISC_CFG 0x60 + +#define HII2S_MISC_CFG__THIRDMD_DLINK_TEST_SEL BIT(17) +#define HII2S_MISC_CFG__THIRDMD_DLINK_DIN_SEL BIT(16) +#define HII2S_MISC_CFG__S3_DOUT_RIGHT_SEL BIT(14) +#define HII2S_MISC_CFG__S3_DOUT_LEFT_SEL BIT(13) +#define HII2S_MISC_CFG__S3_DIN_TEST_SEL BIT(12) +#define HII2S_MISC_CFG__VOICE_DLINK_SRC_UP_DOUT_VLD_SEL BIT(8) +#define HII2S_MISC_CFG__VOICE_DLINK_TEST_SEL BIT(7) +#define HII2S_MISC_CFG__VOICE_DLINK_DIN_SEL BIT(6) +#define HII2S_MISC_CFG__ST_DL_TEST_SEL BIT(4) +#define HII2S_MISC_CFG__S2_DOUT_RIGHT_SEL BIT(3) +#define HII2S_MISC_CFG__S2_DOUT_TEST_SEL BIT(2) +#define HII2S_MISC_CFG__S1_DOUT_TEST_SEL BIT(1) +#define HII2S_MISC_CFG__S2_DOUT_LEFT_SEL BIT(0) + +#define HII2S_S2_SRC_CFG 0x64 +#define HII2S_MEM_CFG 0x68 +#define HII2S_THIRDMD_PCM_PGA_CFG 0x6c +#define HII2S_THIRD_MODEM_FIFO_TH 0x70 +#define HII2S_S3_ANTI_FREQ_JITTER_TX_INC_CNT 0x74 +#define HII2S_S3_ANTI_FREQ_JITTER_TX_DEC_CNT 0x78 +#define HII2S_S3_ANTI_FREQ_JITTER_RX_INC_CNT 0x7c +#define HII2S_S3_ANTI_FREQ_JITTER_RX_DEC_CNT 0x80 +#define HII2S_ANTI_FREQ_JITTER_EN 0x84 +#define HII2S_CLK_SEL 0x88 + +/* 0 = BT owns the i2s */ +#define HII2S_CLK_SEL__I2S_BT_FM_SEL BIT(0) +/* 0 = internal source, 1 = ext */ +#define HII2S_CLK_SEL__EXT_12_288MHZ_SEL BIT(1) + + +#define HII2S_THIRDMD_DLINK_CHANNEL 0xe8 +#define HII2S_THIRDMD_ULINK_CHANNEL 0xec +#define HII2S_VOICE_DLINK_CHANNEL 0xf0 + +/* shovel data in here for playback */ +#define HII2S_ST_DL_CHANNEL 0xf4 +#define HII2S_STEREO_UPLINK_CHANNEL 0xf8 +#define HII2S_VOICE_UPLINK_CHANNEL 0xfc + +#endif/* _HI6210_I2S_H */ -- 2.11.0

1 0

[alsa-devel] [RESEND PATCH] conf/cards: add VC4-HDMI card
by Boris Brezillon 10 Apr '17

10 Apr '17

Add a conf file for the VC4-HDMI sound card. Signed-off-by: Boris Brezillon <boris.brezillon(a)free-electrons.com> --- Hi, Sorry for the noise, but I didn't send this patch to the alsa-lib maintainer on my first attempt. This patch is adding a card config file for the audio sound card whose driver has been submitted here [1] (not accepted yet). Since I am a total newbie to the alsa world, I'd like to get some feedback on this patch. Also, the card only supports 2 to 8 channels, and I wonder if we should add a plug element to support mono streams, and where this element should be added (after or before the iec958 element). Regards, Boris [1]https://www.spinics.net/lists/arm-kernel/msg565182.html src/conf/cards/Makefile.am | 1 + src/conf/cards/aliases.conf | 1 + src/conf/cards/vc4-hdmi.conf | 64 ++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 66 insertions(+) create mode 100644 src/conf/cards/vc4-hdmi.conf diff --git a/src/conf/cards/Makefile.am b/src/conf/cards/Makefile.am index e8b530e80a8f..00999f0186d6 100644 --- a/src/conf/cards/Makefile.am +++ b/src/conf/cards/Makefile.am @@ -51,6 +51,7 @@ cfg_files = aliases.conf \ TRID4DWAVENX.conf \ USB-Audio.conf \ YMF744.conf \ + vc4-hdmi.conf \ VIA686A.conf \ VIA8233.conf \ VIA8233A.conf \ diff --git a/src/conf/cards/aliases.conf b/src/conf/cards/aliases.conf index 60f9d26974fd..18a920f41e46 100644 --- a/src/conf/cards/aliases.conf +++ b/src/conf/cards/aliases.conf @@ -56,6 +56,7 @@ AV200 cards.CMI8788 CMI8786 cards.CMI8788 CMI8787 cards.CMI8788 pistachio cards.pistachio-card +VC4-HDMI cards.vc4-hdmi <confdir:pcm/default.conf> <confdir:pcm/dmix.conf> diff --git a/src/conf/cards/vc4-hdmi.conf b/src/conf/cards/vc4-hdmi.conf new file mode 100644 index 000000000000..027804a145d1 --- /dev/null +++ b/src/conf/cards/vc4-hdmi.conf @@ -0,0 +1,64 @@ +# +# Configuration for the VC4-HDMI sound card using software IEC958 +# subframe conversion +# + +<confdir:pcm/front.conf> + +vc4-hdmi.pcm.front.0 { + @args [ CARD ] + @args.CARD { + type string + } + type hw + card $CARD +} + +# default with dmix +vc4-hdmi.pcm.default { + @args [ CARD ] + @args.CARD { + type string + } + type asym + playback.pcm { + type plug + slave.pcm { + @func concat + strings [ "dmix:" $CARD ] + } + } +} + +<confdir:pcm/iec958.conf> + +vc4-hdmi.pcm.iec958.0 { + @args [ CARD AES0 AES1 AES2 AES3 ] + @args.CARD { + type string + } + @args.AES0 { + type integer + } + @args.AES1 { + type integer + } + @args.AES2 { + type integer + } + @args.AES3 { + type integer + } + type iec958 + slave { + format IEC958_SUBFRAME_LE + pcm { + type plug + slave.pcm { + type hw + card $CARD + } + } + } + status [ $AES0 $AES1 $AES2 $AES3 ] +} -- 2.7.4

3 9

[alsa-devel] [PATCH] ALSA: pcm: dmix: Disable var_periodsize as default
by Takashi Iwai 10 Apr '17

10 Apr '17

The recently added variable period-size feature for dmix & co seems causing a regression on some old applications; e.g. Audacious aborts with an error: ALSA error: snd_pcm_hw_params_set_buffer_time_near failed: Invalid argument. As a quick fix, disable the feature as default. One can still enable it via asoundrc. Bugzilla: https://bugzilla.opensuse.org/show_bug.cgi?id=1033179 Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- src/pcm/pcm_direct.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/pcm/pcm_direct.c b/src/pcm/pcm_direct.c index 8a75c421dd7b..89468d3537d0 100644 --- a/src/pcm/pcm_direct.c +++ b/src/pcm/pcm_direct.c @@ -1875,7 +1875,7 @@ int snd_pcm_direct_parse_open_conf(snd_config_t *root, snd_config_t *conf, rec->ipc_gid = -1; rec->slowptr = 1; rec->max_periods = 0; - rec->var_periodsize = 1; + rec->var_periodsize = 0; rec->direct_memory_access = 1; /* read defaults */ -- 2.11.1

1 0

[alsa-devel] [PATCH] [alsa-lib] Removed compilation warning from test/namehint.c
by soodvarun78＠gmail.com 10 Apr '17

10 Apr '17

From: varun <soodvarun78(a)gmail.com> Changed hint variable from char ** to void ** to match function snd_device_name_hint Signed-off-by: varun <soodvarun78(a)gmail.com> --- test/namehint.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/test/namehint.c b/test/namehint.c index e978d5c..18bad1d 100644 --- a/test/namehint.c +++ b/test/namehint.c @@ -4,7 +4,8 @@ int main(int argc, char *argv[]) { const char *iface = "pcm"; - char **hints, **n; + void **hints; + char **n; int err; if (argc > 1) @@ -12,7 +13,7 @@ int main(int argc, char *argv[]) err = snd_device_name_hint(-1, iface, &hints); if (err < 0) errx(1, "snd_device_name_hint error: %s", snd_strerror(err)); - n = hints; + n = (char **)hints; while (*n != NULL) { printf("%s\n", *n); n++; -- 1.9.1

2 1

[alsa-devel] [PATCH v2] aplay: Introduce and use xwrite helper
by Daniel Baluta 10 Apr '17

10 Apr '17

Write can return less then requested bytes, but we treat this as an error thus ending up with confusing error messages. Fix this by introducing xwrite helper, which makes sure all bytes are written or an error is returned. With this patch an usecase where disk is filled by recording will print: $ /mnt/msc/audio.wav: No space left on device instead of random messages like: $/mnt/msc/audio.wav: No such file or directory Signed-off-by: Daniel Baluta <daniel.baluta(a)nxp.com> --- Changes since v1: * return the correct number of bytes aplay/aplay.c | 55 +++++++++++++++++++++++++++++++++++++------------------ 1 file changed, 37 insertions(+), 18 deletions(-) diff --git a/aplay/aplay.c b/aplay/aplay.c index ee480f2..f793c82 100644 --- a/aplay/aplay.c +++ b/aplay/aplay.c @@ -429,6 +429,25 @@ enum { OPT_FATAL_ERRORS, }; +/* + * make sure we write all bytes or return an error + */ +static ssize_t xwrite(int fd, const void *buf, size_t count) +{ + ssize_t written; + size_t offset = 0; + + while (offset < count) { + written = write(fd, buf + offset, count - offset); + if (written <= 0) + return written; + + offset += written; + }; + + return offset; +} + static long parse_long(const char *str, int *err) { long val; @@ -2428,7 +2447,7 @@ static void voc_play(int fd, int ofs, char *name) l = nextblock; if (l) { if (output && !quiet_mode) { - if (write(2, data, l) != l) { /* to stderr */ + if (xwrite(2, data, l) != l) { /* to stderr */ error(_("write error")); prg_exit(EXIT_FAILURE); } @@ -2480,7 +2499,7 @@ static void begin_voc(int fd, size_t cnt) vh.version = LE_SHORT(VOC_ACTUAL_VERSION); vh.coded_ver = LE_SHORT(0x1233 - VOC_ACTUAL_VERSION); - if (write(fd, &vh, sizeof(VocHeader)) != sizeof(VocHeader)) { + if (xwrite(fd, &vh, sizeof(VocHeader)) != sizeof(VocHeader)) { error(_("write error")); prg_exit(EXIT_FAILURE); } @@ -2489,14 +2508,14 @@ static void begin_voc(int fd, size_t cnt) bt.type = 8; bt.datalen = 4; bt.datalen_m = bt.datalen_h = 0; - if (write(fd, &bt, sizeof(VocBlockType)) != sizeof(VocBlockType)) { + if (xwrite(fd, &bt, sizeof(VocBlockType)) != sizeof(VocBlockType)) { error(_("write error")); prg_exit(EXIT_FAILURE); } eb.tc = LE_SHORT(65536 - 256000000L / (hwparams.rate << 1)); eb.pack = 0; eb.mode = 1; - if (write(fd, &eb, sizeof(VocExtBlock)) != sizeof(VocExtBlock)) { + if (xwrite(fd, &eb, sizeof(VocExtBlock)) != sizeof(VocExtBlock)) { error(_("write error")); prg_exit(EXIT_FAILURE); } @@ -2506,13 +2525,13 @@ static void begin_voc(int fd, size_t cnt) bt.datalen = (u_char) (cnt & 0xFF); bt.datalen_m = (u_char) ((cnt & 0xFF00) >> 8); bt.datalen_h = (u_char) ((cnt & 0xFF0000) >> 16); - if (write(fd, &bt, sizeof(VocBlockType)) != sizeof(VocBlockType)) { + if (xwrite(fd, &bt, sizeof(VocBlockType)) != sizeof(VocBlockType)) { error(_("write error")); prg_exit(EXIT_FAILURE); } vd.tc = (u_char) (256 - (1000000 / hwparams.rate)); vd.pack = 0; - if (write(fd, &vd, sizeof(VocVoiceData)) != sizeof(VocVoiceData)) { + if (xwrite(fd, &vd, sizeof(VocVoiceData)) != sizeof(VocVoiceData)) { error(_("write error")); prg_exit(EXIT_FAILURE); } @@ -2581,10 +2600,10 @@ static void begin_wave(int fd, size_t cnt) cd.type = WAV_DATA; cd.length = LE_INT(cnt); - if (write(fd, &h, sizeof(WaveHeader)) != sizeof(WaveHeader) || - write(fd, &cf, sizeof(WaveChunkHeader)) != sizeof(WaveChunkHeader) || - write(fd, &f, sizeof(WaveFmtBody)) != sizeof(WaveFmtBody) || - write(fd, &cd, sizeof(WaveChunkHeader)) != sizeof(WaveChunkHeader)) { + if (xwrite(fd, &h, sizeof(WaveHeader)) != sizeof(WaveHeader) || + xwrite(fd, &cf, sizeof(WaveChunkHeader)) != sizeof(WaveChunkHeader) || + xwrite(fd, &f, sizeof(WaveFmtBody)) != sizeof(WaveFmtBody) || + xwrite(fd, &cd, sizeof(WaveChunkHeader)) != sizeof(WaveChunkHeader)) { error(_("write error")); prg_exit(EXIT_FAILURE); } @@ -2614,7 +2633,7 @@ static void begin_au(int fd, size_t cnt) } ah.sample_rate = BE_INT(hwparams.rate); ah.channels = BE_INT(hwparams.channels); - if (write(fd, &ah, sizeof(AuHeader)) != sizeof(AuHeader)) { + if (xwrite(fd, &ah, sizeof(AuHeader)) != sizeof(AuHeader)) { error(_("write error")); prg_exit(EXIT_FAILURE); } @@ -2628,7 +2647,7 @@ static void end_voc(int fd) size_t cnt; char dummy = 0; /* Write a Terminator */ - if (write(fd, &dummy, 1) != 1) { + if (xwrite(fd, &dummy, 1) != 1) { error(_("write error")); prg_exit(EXIT_FAILURE); } @@ -2644,7 +2663,7 @@ static void end_voc(int fd) bt.datalen_m = (u_char) ((cnt & 0xFF00) >> 8); bt.datalen_h = (u_char) ((cnt & 0xFF0000) >> 16); if (lseek64(fd, length_seek, SEEK_SET) == length_seek) - write(fd, &bt, sizeof(VocBlockType)); + xwrite(fd, &bt, sizeof(VocBlockType)); if (fd != 1) close(fd); } @@ -2664,9 +2683,9 @@ static void end_wave(int fd) filelen = fdcount + 2*sizeof(WaveChunkHeader) + sizeof(WaveFmtBody) + 4; rifflen = filelen > 0x7fffffff ? LE_INT(0x7fffffff) : LE_INT(filelen); if (lseek64(fd, 4, SEEK_SET) == 4) - write(fd, &rifflen, 4); + xwrite(fd, &rifflen, 4); if (lseek64(fd, length_seek, SEEK_SET) == length_seek) - write(fd, &cd, sizeof(WaveChunkHeader)); + xwrite(fd, &cd, sizeof(WaveChunkHeader)); if (fd != 1) close(fd); } @@ -2679,7 +2698,7 @@ static void end_au(int fd) length_seek = (char *)&ah.data_size - (char *)&ah; ah.data_size = fdcount > 0xffffffff ? 0xffffffff : BE_INT(fdcount); if (lseek64(fd, length_seek, SEEK_SET) == length_seek) - write(fd, &ah.data_size, sizeof(ah.data_size)); + xwrite(fd, &ah.data_size, sizeof(ah.data_size)); if (fd != 1) close(fd); } @@ -3078,7 +3097,7 @@ static void capture(char *orig_name) in_aborting = 1; break; } - if (write(fd, audiobuf, c) != c) { + if (xwrite(fd, audiobuf, c) != c) { perror(name); in_aborting = 1; break; @@ -3187,7 +3206,7 @@ static void capturev_go(int* fds, unsigned int channels, off64_t count, int rtyp break; rv = r * bits_per_sample / 8; for (channel = 0; channel < channels; ++channel) { - if ((size_t)write(fds[channel], bufs[channel], rv) != rv) { + if ((size_t)xwrite(fds[channel], bufs[channel], rv) != rv) { perror(names[channel]); prg_exit(EXIT_FAILURE); } -- 2.7.4

2 1

Re: [alsa-devel] DSD native format on SoC
by Michael Trimarchi 09 Apr '17

09 Apr '17

Hi all On Mon, Mar 13, 2017 at 05:42:43PM +0900, Naoki Matsumoto wrote: > Retry send because alsa-dev ML doesn't delivery yet. > > -------- Original Message -------- > From: Naoki Matsumoto > Sent: Monday, Mar 13, 2017 10:39 AM GMT+0900 > To: michael(a)amarulasolutions.com > Cc: alsa-devel(a)alsa-project.org > Subject: DSD native format on SoC > > Hello > > I know only xmos-native-dsd(DSD_U32_BE). > I'll share what I know. > I know information about DSD only fragmentally... > Problem here is SoC subsytem for me https://github.com/zonque/alsa-dsd-player.git Cannot set sample format tyring U16_LE DSD. I have changed a bit the core and some components but seems that does not go in. Any idea? diff --git a/sound/soc/codecs/pcm179x.c b/sound/soc/codecs/pcm179x.c index cc34b16..0dea529 100644 --- a/sound/soc/codecs/pcm179x.c +++ b/sound/soc/codecs/pcm179x.c @@ -89,18 +89,19 @@ static int pcm179x_startup(struct snd_pcm_substream *substream, { struct snd_soc_codec *codec = dai->codec; struct pcm179x_private *priv = snd_soc_codec_get_drvdata(codec); - u64 formats = PCM1792A_FORMATS; + u64 formats = PCM1795_FORMATS; switch (priv->codec_model) { - case PCM1795: - formats = PCM1795_FORMATS; + case PCM1792A: + formats = PCM1792A_FORMATS; break; default: break; } - snd_pcm_hw_constraint_mask64(substream->runtime, - SNDRV_PCM_HW_PARAM_FORMAT, formats); + if (formats != PCM1795_FORMATS) + snd_pcm_hw_constraint_mask64(substream->runtime, + SNDRV_PCM_HW_PARAM_FORMAT, formats); msleep(50); return 0; @@ -227,7 +228,7 @@ static struct snd_soc_dai_driver pcm179x_dai = { .rates = SNDRV_PCM_RATE_CONTINUOUS, .rate_min = 10000, .rate_max = 200000, - .formats = PCM179X_FORMATS, }, + .formats = PCM1795_FORMATS, }, .ops = &pcm179x_dai_ops, }; @@ -252,9 +253,9 @@ static struct snd_soc_codec_driver soc_codec_dev_pcm179x = { }; const struct of_device_id pcm179x_of_match[] = { - { .compatible = "ti,pcm1792a", }, - { .compatible = "ti,pcm1795", .data = (void *)PCM1795, }, - { .compatible = "ti,pcm1796", }, + { .compatible = "ti,pcm1792a", .data = (void *)PCM1792A }, + { .compatible = "ti,pcm1795", }, + { .compatible = "ti,pcm1796", .data = (void *)PCM1792A }, { } }; MODULE_DEVICE_TABLE(of, pcm179x_of_match); diff --git a/sound/soc/codecs/pcm179x.h b/sound/soc/codecs/pcm179x.h index 4c00047..0665ec8 100644 --- a/sound/soc/codecs/pcm179x.h +++ b/sound/soc/codecs/pcm179x.h @@ -22,7 +22,8 @@ #define PCM1792A_FORMATS (SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S16_LE) -#define PCM1795_FORMATS (SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S24_LE) +#define PCM1795_FORMATS (SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S24_LE | \ + SNDRV_PCM_FMTBIT_DSD_U16_LE) extern const struct regmap_config pcm179x_regmap_config; extern const struct of_device_id pcm179x_of_match[]; diff --git a/sound/soc/rockchip/Kconfig b/sound/soc/rockchip/Kconfig index c55cbfa..d3afa89 100644 --- a/sound/soc/rockchip/Kconfig +++ b/sound/soc/rockchip/Kconfig @@ -55,7 +55,7 @@ config SND_SOC_ROCHCHIP_DACMAX tristate "SoC Audio support for DACMAX boards using a pcm1792 codec" depends on SND_SOC_ROCKCHIP && SPI && GPIOLIB select SND_SOC_ROCKCHIP_I2S - select SND_SOC_PCM179X + select SND_SOC_PCM179X_SPI help Say Y or M here if you want to add support for SoC audio on Dacmax boards using the pcm1792a codec. diff --git a/sound/soc/rockchip/dacmax.c b/sound/soc/rockchip/dacmax.c index fb302a8..fa79549 100644 --- a/sound/soc/rockchip/dacmax.c +++ b/sound/soc/rockchip/dacmax.c @@ -22,6 +22,7 @@ * */ +#define DEBUG #include <linux/module.h> #include <linux/of.h> #include <linux/of_gpio.h> @@ -39,6 +40,7 @@ #define CLK1 (1 << 1) #define CLK0 (1 << 2) #define W32 (1 << 3) +#define DSD_EN (1 << 4) #define DAI_NAME_SIZE 32 @@ -52,6 +54,7 @@ struct dacmax_data { int clk_1; int clk_2; int w32; + int dsd_enable; }; static const struct snd_soc_dapm_widget dacmax_dapm_widgets[] = { @@ -78,6 +81,10 @@ static void dacmax_change_freq(struct dacmax_data *data, u8 mask) gpio_set_value(data->w32, value); pr_debug("%s: BITSXWORD(%d)\n", __func__, value); + value = (mask & DSD_EN) ? 1 : 0; + gpio_set_value(data->dsd_enable, value); + pr_debug("%s: DSD ENABLE (%d)\n", __func__, value); + mdelay(20); } @@ -91,6 +98,7 @@ static int dacmax_ext_clock_update(struct dacmax_data *data, params_format(params)); switch (params_format(params)) { + case SNDRV_PCM_FORMAT_DSD_U16_LE: case SNDRV_PCM_FORMAT_S16_LE: break; case SNDRV_PCM_FORMAT_S24_LE: @@ -103,6 +111,8 @@ static int dacmax_ext_clock_update(struct dacmax_data *data, } switch (params_rate(params)) { + case 2822400: + mask |= DSD_EN; case 44100: break; case 48000: @@ -251,6 +261,7 @@ static int dacmax_probe(struct platform_device *pdev) data->clk_1 = clk_1; data->clk_2 = clk_2; data->w32 = w32; + data->dsd_enable = dsd_enable; ret = devm_snd_soc_register_card(&pdev->dev, &data->card); if (ret) { diff --git a/sound/soc/rockchip/rockchip_i2s.c b/sound/soc/rockchip/rockchip_i2s.c index 68fea0a..67fd6ec 100644 --- a/sound/soc/rockchip/rockchip_i2s.c +++ b/sound/soc/rockchip/rockchip_i2s.c @@ -302,6 +302,7 @@ static int rockchip_i2s_hw_params(struct snd_pcm_substream *substream, case SNDRV_PCM_FORMAT_S8: val |= I2S_TXCR_VDW(8); break; + case SNDRV_PCM_FORMAT_DSD_U16_LE: case SNDRV_PCM_FORMAT_S16_LE: val |= I2S_TXCR_VDW(16); break; @@ -457,7 +458,8 @@ static struct snd_soc_dai_driver rockchip_i2s_dai = { SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S24_LE | - SNDRV_PCM_FMTBIT_S32_LE), + SNDRV_PCM_FMTBIT_S32_LE | + SNDRV_PCM_FMTBIT_DSD_U16_LE), }, .capture = { .stream_name = "Capture", diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c index a1305f8..1ae0aea 100644 --- a/sound/soc/soc-core.c +++ b/sound/soc/soc-core.c @@ -2980,6 +2980,7 @@ static u64 codec_format_map[] = { SNDRV_PCM_FMTBIT_U18_3LE | SNDRV_PCM_FMTBIT_U18_3BE, SNDRV_PCM_FMTBIT_FLOAT_LE | SNDRV_PCM_FMTBIT_FLOAT_BE, SNDRV_PCM_FMTBIT_FLOAT64_LE | SNDRV_PCM_FMTBIT_FLOAT64_BE, + SNDRV_PCM_FORMAT_DSD_U16_LE | SNDRV_PCM_FORMAT_DSD_U16_BE, SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE | SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_BE, }; > on Wed, 8 Mar 2017 08:21:23 +0100, Michael Nazzareno Trimarchi wrote: > DSD is a continuous stream of bits that flows over two separate > channels, left and right, synchronized by a clock, while I2S is a > single data wire and an additional wire that states if the incoming > sample refers to the left channel or the right channel. There is no > way to get DSD data other than a circuit which decode DSD streams > coming directly from a conventional source, like, for examples, a > SACD. > > The Volta dac has an internal decoding circuitry that still employs > the I2S standard as a usual 44100Hz/16 bits, but sourcing the shift > clock at twice the DSD standard frequency of 2.8224MHz, since it has > to split two the16 bits words received on a single wire into the two > DSD channels, as the standard wants. > > When DSD is enabled, the control signal PCD/DSD must be high, CK3..CK0 > must be all low. The I2S interface works as a standard 44100Hz/16 bit > and the DSD streaming must be packed into 16 bits lenght words > left/right as per LRCK logic. The BCLK frequency supplied from the > interface is 5644800Hz in case of DSD and 11289600 for DSD2. > I don't know your device. > but I've understood that it's device layer implantation topic. > I think that your sound device need to support SND_PCM_FORMAT_DSD_*. > > Refer:enum snd_pcm_format_t > http://www.alsa-project.org/alsa-doc/alsa-lib/group___p_c_m.html > > If you use xmos-natvie-dsd, the implement is linux.git/sound/usb/quirks.c > > Can you explain how now DSD can be pass to audio card? The idea is to > declare it on the audio card and then configure it as a PCM card but I > don't know how data are suppose to arrive from alsa userspace. > I know DSD playback on sound device that xmos. > Have you checked this page? > https://github.com/lintweaker/xmos-native-dsd > > As alsa-lib > 1. snd_pcm_open > e.g, USB sound device. In your case, soc internal sound device > 2. snd_ocm_hw_params_set_format > e.g, SND_PCM_FORMAT_DSD_U32_BE > 3. snd_pcm_writei > > Other elements > * DSD decoder(e.g,dsf/dsdiff) > * Player > if you use xmos-native-dsd(DSD_U32_BE) device, we can use MPD Ver0.20.2+ > I don't know other DSD pcm_formats. > > Just information. It may be wrong. > Thank you > > > -- > ********************************************** > Naoki MATSUMOTO > Email:n-matsumoto@melcoinc.co.jp > Tel :050-5830-8916 > ********************************************** -- | Michael Nazzareno Trimarchi Amarula Solutions BV | | COO - Founder Cruquiuskade 47 | | +31(0)851119172 Amsterdam 1018 AM NL | | [`as] http://www.amarulasolutions.com |

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[alsa-devel] [alsa-lib] test/namehint.c: Removed compilation warning
by varun sood 09 Apr '17

09 Apr '17

Removed compilation warning Changed hint variable from char ** to void ** to match function snd_device_name_hint Signed-off-by: varun <soodvarun78(a)gmail.com>--- test/namehint.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/test/namehint.c b/test/namehint.cindex e978d5c..18bad1d 100644--- a/test/namehint.c+++ b/test/namehint.c@@ -4,7 +4,8 @@ int main(int argc, char *argv[]) { const char *iface = "pcm";- char **hints, **n;+ void **hints;+ char **n; int err; if (argc > 1)@@ -12,7 +13,7 @@ int main(int argc, char *argv[]) err = snd_device_name_hint(-1, iface, &hints); if (err < 0) errx(1, "snd_device_name_hint error: %s", snd_strerror(err));- n = hints;+ n = (char **)hints; while (*n != NULL) { printf("%s\n", *n); n++;-- 1.9.1

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[alsa-devel] [PATCH] aplay: Introduce and use xwrite helper
by Daniel Baluta 07 Apr '17

07 Apr '17

Write can return less then requested bytes, but we treat this as an error thus ending up with confusing error messages. Fix this by introducing xwrite helper, which makes sure all bytes are written or an error is returned. With this patch an usecase where disk is filled by recording will print: $ /mnt/msc/audio.wav: No space left on device instead of random messages like: $/mnt/msc/audio.wav: No such file or directory Signed-off-by: Daniel Baluta <daniel.baluta(a)nxp.com> --- This is a follow up of: http://mailman.alsa-project.org/pipermail/alsa-devel/2017-April/119632.html where I tried to fix the error message instead of write :). aplay/aplay.c | 55 +++++++++++++++++++++++++++++++++++++------------------ 1 file changed, 37 insertions(+), 18 deletions(-) diff --git a/aplay/aplay.c b/aplay/aplay.c index ee480f2..74d3d37 100644 --- a/aplay/aplay.c +++ b/aplay/aplay.c @@ -429,6 +429,25 @@ enum { OPT_FATAL_ERRORS, }; +/* + * make sure we write all bytes or return an error + */ +static ssize_t xwrite(int fd, const void *buf, size_t count) +{ + ssize_t written; + size_t offset = 0; + + while (offset < count) { + written = write(fd, buf + offset, count - offset); + if (written <= 0) + return written; + + offset += written; + }; + + return written; +} + static long parse_long(const char *str, int *err) { long val; @@ -2428,7 +2447,7 @@ static void voc_play(int fd, int ofs, char *name) l = nextblock; if (l) { if (output && !quiet_mode) { - if (write(2, data, l) != l) { /* to stderr */ + if (xwrite(2, data, l) != l) { /* to stderr */ error(_("write error")); prg_exit(EXIT_FAILURE); } @@ -2480,7 +2499,7 @@ static void begin_voc(int fd, size_t cnt) vh.version = LE_SHORT(VOC_ACTUAL_VERSION); vh.coded_ver = LE_SHORT(0x1233 - VOC_ACTUAL_VERSION); - if (write(fd, &vh, sizeof(VocHeader)) != sizeof(VocHeader)) { + if (xwrite(fd, &vh, sizeof(VocHeader)) != sizeof(VocHeader)) { error(_("write error")); prg_exit(EXIT_FAILURE); } @@ -2489,14 +2508,14 @@ static void begin_voc(int fd, size_t cnt) bt.type = 8; bt.datalen = 4; bt.datalen_m = bt.datalen_h = 0; - if (write(fd, &bt, sizeof(VocBlockType)) != sizeof(VocBlockType)) { + if (xwrite(fd, &bt, sizeof(VocBlockType)) != sizeof(VocBlockType)) { error(_("write error")); prg_exit(EXIT_FAILURE); } eb.tc = LE_SHORT(65536 - 256000000L / (hwparams.rate << 1)); eb.pack = 0; eb.mode = 1; - if (write(fd, &eb, sizeof(VocExtBlock)) != sizeof(VocExtBlock)) { + if (xwrite(fd, &eb, sizeof(VocExtBlock)) != sizeof(VocExtBlock)) { error(_("write error")); prg_exit(EXIT_FAILURE); } @@ -2506,13 +2525,13 @@ static void begin_voc(int fd, size_t cnt) bt.datalen = (u_char) (cnt & 0xFF); bt.datalen_m = (u_char) ((cnt & 0xFF00) >> 8); bt.datalen_h = (u_char) ((cnt & 0xFF0000) >> 16); - if (write(fd, &bt, sizeof(VocBlockType)) != sizeof(VocBlockType)) { + if (xwrite(fd, &bt, sizeof(VocBlockType)) != sizeof(VocBlockType)) { error(_("write error")); prg_exit(EXIT_FAILURE); } vd.tc = (u_char) (256 - (1000000 / hwparams.rate)); vd.pack = 0; - if (write(fd, &vd, sizeof(VocVoiceData)) != sizeof(VocVoiceData)) { + if (xwrite(fd, &vd, sizeof(VocVoiceData)) != sizeof(VocVoiceData)) { error(_("write error")); prg_exit(EXIT_FAILURE); } @@ -2581,10 +2600,10 @@ static void begin_wave(int fd, size_t cnt) cd.type = WAV_DATA; cd.length = LE_INT(cnt); - if (write(fd, &h, sizeof(WaveHeader)) != sizeof(WaveHeader) || - write(fd, &cf, sizeof(WaveChunkHeader)) != sizeof(WaveChunkHeader) || - write(fd, &f, sizeof(WaveFmtBody)) != sizeof(WaveFmtBody) || - write(fd, &cd, sizeof(WaveChunkHeader)) != sizeof(WaveChunkHeader)) { + if (xwrite(fd, &h, sizeof(WaveHeader)) != sizeof(WaveHeader) || + xwrite(fd, &cf, sizeof(WaveChunkHeader)) != sizeof(WaveChunkHeader) || + xwrite(fd, &f, sizeof(WaveFmtBody)) != sizeof(WaveFmtBody) || + xwrite(fd, &cd, sizeof(WaveChunkHeader)) != sizeof(WaveChunkHeader)) { error(_("write error")); prg_exit(EXIT_FAILURE); } @@ -2614,7 +2633,7 @@ static void begin_au(int fd, size_t cnt) } ah.sample_rate = BE_INT(hwparams.rate); ah.channels = BE_INT(hwparams.channels); - if (write(fd, &ah, sizeof(AuHeader)) != sizeof(AuHeader)) { + if (xwrite(fd, &ah, sizeof(AuHeader)) != sizeof(AuHeader)) { error(_("write error")); prg_exit(EXIT_FAILURE); } @@ -2628,7 +2647,7 @@ static void end_voc(int fd) size_t cnt; char dummy = 0; /* Write a Terminator */ - if (write(fd, &dummy, 1) != 1) { + if (xwrite(fd, &dummy, 1) != 1) { error(_("write error")); prg_exit(EXIT_FAILURE); } @@ -2644,7 +2663,7 @@ static void end_voc(int fd) bt.datalen_m = (u_char) ((cnt & 0xFF00) >> 8); bt.datalen_h = (u_char) ((cnt & 0xFF0000) >> 16); if (lseek64(fd, length_seek, SEEK_SET) == length_seek) - write(fd, &bt, sizeof(VocBlockType)); + xwrite(fd, &bt, sizeof(VocBlockType)); if (fd != 1) close(fd); } @@ -2664,9 +2683,9 @@ static void end_wave(int fd) filelen = fdcount + 2*sizeof(WaveChunkHeader) + sizeof(WaveFmtBody) + 4; rifflen = filelen > 0x7fffffff ? LE_INT(0x7fffffff) : LE_INT(filelen); if (lseek64(fd, 4, SEEK_SET) == 4) - write(fd, &rifflen, 4); + xwrite(fd, &rifflen, 4); if (lseek64(fd, length_seek, SEEK_SET) == length_seek) - write(fd, &cd, sizeof(WaveChunkHeader)); + xwrite(fd, &cd, sizeof(WaveChunkHeader)); if (fd != 1) close(fd); } @@ -2679,7 +2698,7 @@ static void end_au(int fd) length_seek = (char *)&ah.data_size - (char *)&ah; ah.data_size = fdcount > 0xffffffff ? 0xffffffff : BE_INT(fdcount); if (lseek64(fd, length_seek, SEEK_SET) == length_seek) - write(fd, &ah.data_size, sizeof(ah.data_size)); + xwrite(fd, &ah.data_size, sizeof(ah.data_size)); if (fd != 1) close(fd); } @@ -3078,7 +3097,7 @@ static void capture(char *orig_name) in_aborting = 1; break; } - if (write(fd, audiobuf, c) != c) { + if (xwrite(fd, audiobuf, c) != c) { perror(name); in_aborting = 1; break; @@ -3187,7 +3206,7 @@ static void capturev_go(int* fds, unsigned int channels, off64_t count, int rtyp break; rv = r * bits_per_sample / 8; for (channel = 0; channel < channels; ++channel) { - if ((size_t)write(fds[channel], bufs[channel], rv) != rv) { + if ((size_t)xwrite(fds[channel], bufs[channel], rv) != rv) { perror(names[channel]); prg_exit(EXIT_FAILURE); } -- 2.7.4

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