February 2017 - Alsa-devel - mailman.alsa-project.org

[alsa-devel] [PATCH] ASoc: hdmi-codec: remove HDMI device unregister
by Vincent Abriou 08 Feb '17

08 Feb '17

While unregistering the hdmi-codec, the hdmi device list must be cleaned up. It avoids kernel page fault when registering again the hdmi-codec. Cc: Liam Girdwood <lgirdwood(a)gmail.com> Cc: Mark Brown <broonie(a)kernel.org> Cc: Jaroslav Kysela <perex(a)perex.cz> Cc: Takashi Iwai <tiwai(a)suse.com> Cc: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com> Cc: Jyri Sarha <jsarha(a)ti.com> Cc: Arnaud Pouliquen <arnaud.pouliquen(a)st.com> Cc: Philipp Zabel <p.zabel(a)pengutronix.de> Signed-off-by: Vincent Abriou <vincent.abriou(a)st.com> --- sound/soc/codecs/hdmi-codec.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/sound/soc/codecs/hdmi-codec.c b/sound/soc/codecs/hdmi-codec.c index 90b5948..1ca405e 100644 --- a/sound/soc/codecs/hdmi-codec.c +++ b/sound/soc/codecs/hdmi-codec.c @@ -479,6 +479,18 @@ static int hdmi_codec_probe(struct platform_device *pdev) static int hdmi_codec_remove(struct platform_device *pdev) { + struct device *dev = &pdev->dev; + struct list_head *pos; + + list_for_each(pos, &hdmi_device_list) { + struct hdmi_device *tmp = pos_to_hdmi_device(pos); + + if (tmp->dev == dev->parent) { + list_del(pos); + break; + } + } + snd_soc_unregister_codec(&pdev->dev); return 0; } -- 2.7.4

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[alsa-devel] [patch] ASoC: sun4i-i2s: remove some dead code
by Dan Carpenter 08 Feb '17

08 Feb '17

"i2s->rst" is either NULL or a valid pointer. We won't probe successfully if it's an error pointer. That means these checks can be removed. Signed-off-by: Dan Carpenter <dan.carpenter(a)oracle.com> diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c index 3635bbc72cbc..d79be3e4361b 100644 --- a/sound/soc/sunxi/sun4i-i2s.c +++ b/sound/soc/sunxi/sun4i-i2s.c @@ -723,13 +723,11 @@ static int sun4i_i2s_probe(struct platform_device *pdev) } } - if (!IS_ERR(i2s->rst)) { - ret = reset_control_deassert(i2s->rst); - if (ret) { - dev_err(&pdev->dev, - "Failed to deassert the reset control\n"); - return -EINVAL; - } + ret = reset_control_deassert(i2s->rst); + if (ret) { + dev_err(&pdev->dev, + "Failed to deassert the reset control\n"); + return -EINVAL; } i2s->playback_dma_data.addr = res->start + SUN4I_I2S_FIFO_TX_REG; @@ -766,8 +764,7 @@ static int sun4i_i2s_probe(struct platform_device *pdev) sun4i_i2s_runtime_suspend(&pdev->dev); err_pm_disable: pm_runtime_disable(&pdev->dev); - if (!IS_ERR(i2s->rst)) - reset_control_assert(i2s->rst); + reset_control_assert(i2s->rst); return ret; } @@ -782,8 +779,7 @@ static int sun4i_i2s_remove(struct platform_device *pdev) if (!pm_runtime_status_suspended(&pdev->dev)) sun4i_i2s_runtime_suspend(&pdev->dev); - if (!IS_ERR(i2s->rst)) - reset_control_assert(i2s->rst); + reset_control_assert(i2s->rst); return 0; }

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[alsa-devel] [PATCH v4 0/9] Allwinner H5 and Orange Pi PC2 support
by Icenowy Zheng 08 Feb '17

08 Feb '17

Allwinner H5 is a 64-bit SoC with a design like the 32-bit H3. This patchset adds support for it, along with the first available board -- Orange Pi PC2. Some drivers are also enabled to be built on ARM64 ARCH_SUNXI platform, in order to make the internal audio codec work. Andre Przywara (3): arm: dts: sun8i: split Allwinner H3 .dtsi arm64: dts: allwinner: add Allwinner H5 .dtsi arm64: dts: sunxi: add support for the Orange Pi PC 2 board Icenowy Zheng (6): arm64: allwinner: Kconfig: add essential pinctrl driver for H5 clk: sunxi-ng: rename sun8i-h3 driver to sunxi-h3-h5 clk: sunxi-ng: add support for Allwinner H5 SoC ARM: dts: sun8i: convert H3 dtsi to use new sunxi-h3-h5 binding header dt-bindings: remove transitional headers for Allwinner H3 CCU ASoC: sunxi: allow the analog codec driver to be built on ARM64 .../devicetree/bindings/clock/sunxi-ccu.txt | 1 + arch/arm/boot/dts/sun8i-h3.dtsi | 789 ++++----------------- .../boot/dts/{sun8i-h3.dtsi => sunxi-h3-h5.dtsi} | 91 +-- arch/arm64/Kconfig.platforms | 5 +- arch/arm64/boot/dts/allwinner/Makefile | 1 + .../boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts | 164 +++++ arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 139 ++++ arch/arm64/boot/dts/allwinner/sunxi-h3-h5.dtsi | 1 + drivers/clk/sunxi-ng/Kconfig | 6 +- drivers/clk/sunxi-ng/Makefile | 2 +- .../sunxi-ng/{ccu-sun8i-h3.c => ccu-sunxi-h3-h5.c} | 236 +++++- .../sunxi-ng/{ccu-sun8i-h3.h => ccu-sunxi-h3-h5.h} | 15 +- .../clock/{sun8i-h3-ccu.h => sunxi-h3-h5-ccu.h} | 11 +- .../reset/{sun8i-h3-ccu.h => sunxi-h3-h5-ccu.h} | 11 +- sound/soc/sunxi/Kconfig | 2 +- 15 files changed, 709 insertions(+), 765 deletions(-) rewrite arch/arm/boot/dts/sun8i-h3.dtsi (81%) copy arch/arm/boot/dts/{sun8i-h3.dtsi => sunxi-h3-h5.dtsi} (88%) create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi create mode 120000 arch/arm64/boot/dts/allwinner/sunxi-h3-h5.dtsi rename drivers/clk/sunxi-ng/{ccu-sun8i-h3.c => ccu-sunxi-h3-h5.c} (76%) rename drivers/clk/sunxi-ng/{ccu-sun8i-h3.h => ccu-sunxi-h3-h5.h} (82%) rename include/dt-bindings/clock/{sun8i-h3-ccu.h => sunxi-h3-h5-ccu.h} (95%) rename include/dt-bindings/reset/{sun8i-h3-ccu.h => sunxi-h3-h5-ccu.h} (94%) -- 2.11.0

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[alsa-devel] [PATCH] conf: Add card config for Intel HDMI/DP LPE audio
by Takashi Iwai 07 Feb '17

07 Feb '17

It's a playback-only device with a single PCM dedicated for HDMI/DP output. The dmix is working with the latest driver code, so enable it for default, while providing the hdmi PCM dev for the accesses with AES bits. Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- src/conf/cards/HdmiLpeAudio.conf | 85 ++++++++++++++++++++++++++++++++++++++++ src/conf/cards/Makefile.am | 1 + 2 files changed, 86 insertions(+) create mode 100644 src/conf/cards/HdmiLpeAudio.conf diff --git a/src/conf/cards/HdmiLpeAudio.conf b/src/conf/cards/HdmiLpeAudio.conf new file mode 100644 index 000000000000..f5836c05219e --- /dev/null +++ b/src/conf/cards/HdmiLpeAudio.conf @@ -0,0 +1,85 @@ +# +# Configuration for the Intel HDMI/DP LPE audio +# + +<confdir:pcm/front.conf> + +HdmiLpeAudio.pcm.front.0 { + @args [ CARD ] + @args.CARD { + type string + } + type softvol + slave.pcm { + type hw + card $CARD + } + control { + name "PCM Playback Volume" + card $CARD + } +} + +# default with dmix+softvol +HdmiLpeAudio.pcm.default { + @args [ CARD ] + @args.CARD { + type string + } + type plug + slave.pcm { + type softvol + slave.pcm { + @func concat + strings [ "dmix:" $CARD ] + } + control { + name "PCM Playback Volume" + card $CARD + } + } +} + +<confdir:pcm/surround40.conf> +<confdir:pcm/surround21.conf> +<confdir:pcm/surround41.conf> +<confdir:pcm/surround50.conf> +<confdir:pcm/surround51.conf> + +<confdir:pcm/hdmi.conf> + +HdmiLpeAudio.pcm.hdmi.0 { + @args [ CARD AES0 AES1 AES2 AES3 ] + @args.CARD { + type string + } + @args.AES0 { + type integer + } + @args.AES1 { + type integer + } + @args.AES2 { + type integer + } + @args.AES3 { + type integer + } + type hooks + slave.pcm { + type hw + card $CARD + } + hooks.0 { + type ctl_elems + hook_args [ + { + interface PCM + name "IEC958 Playback Default" + lock true + preserve true + value [ $AES0 $AES1 $AES2 $AES3 ] + } + ] + } +} diff --git a/src/conf/cards/Makefile.am b/src/conf/cards/Makefile.am index 60b5309fb621..e8b530e80a8f 100644 --- a/src/conf/cards/Makefile.am +++ b/src/conf/cards/Makefile.am @@ -30,6 +30,7 @@ cfg_files = aliases.conf \ FireWave.conf \ GUS.conf \ HDA-Intel.conf \ + HdmiLpeAudio.conf \ ICE1712.conf \ ICE1724.conf \ ICH.conf \ -- 2.11.0

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Re: [alsa-devel] [linux-sunxi] Re: [PATCH v3 04/10] clk: sunxi-ng: add support for Allwinner H5 SoC
by Icenowy Zheng 07 Feb '17

07 Feb '17

2017年1月30日 17:04于 Maxime Ripard <maxime.ripard(a)free-electrons.com>写道： > > On Sun, Jan 29, 2017 at 10:33:25AM +0800, Icenowy Zheng wrote: > > Allwinner H5 is a SoC that features a CCU like H3, but with MMC phase > > clocks removed (for new MMC controller) and a new bus gate/reset > > imported. > > > > Add support for it. > > > > Signed-off-by: Icenowy Zheng <icenowy(a)aosc.xyz> > > --- > > See the comments of the previous patch. > > > > .../devicetree/bindings/clock/sunxi-ccu.txt | 1 + > > drivers/clk/sunxi-ng/Kconfig | 2 +- > > drivers/clk/sunxi-ng/ccu-sunxi-h3-h5.c | 137 +++++++++++++++++++++ > > drivers/clk/sunxi-ng/ccu-sunxi-h3-h5.h | 5 +- > > include/dt-bindings/clock/sunxi-h3-h5-ccu.h | 3 + > > include/dt-bindings/reset/sunxi-h3-h5-ccu.h | 3 + > > 6 files changed, 149 insertions(+), 2 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/clock/sunxi-ccu.txt b/Documentation/devicetree/bindings/clock/sunxi-ccu.txt > > index f6032cf63f12..a33a4a5ecffa 100644 > > --- a/Documentation/devicetree/bindings/clock/sunxi-ccu.txt > > +++ b/Documentation/devicetree/bindings/clock/sunxi-ccu.txt > > @@ -9,6 +9,7 @@ Required properties : > > - "allwinner,sun8i-h3-ccu" > > - "allwinner,sun8i-v3s-ccu" > > - "allwinner,sun50i-a64-ccu" > > + - "allwinner,sun50i-h5-ccu" > > > > - reg: Must contain the registers base address and length > > - clocks: phandle to the oscillators feeding the CCU. Two are needed: > > diff --git a/drivers/clk/sunxi-ng/Kconfig b/drivers/clk/sunxi-ng/Kconfig > > index 4be083ae717f..bdf18e846731 100644 > > --- a/drivers/clk/sunxi-ng/Kconfig > > +++ b/drivers/clk/sunxi-ng/Kconfig > > @@ -117,7 +117,7 @@ config SUNXI_H3_H5_CCU > > select SUNXI_CCU_NM > > select SUNXI_CCU_MP > > select SUNXI_CCU_PHASE > > - default MACH_SUN8I > > + default MACH_SUN8I || (ARM64 && ARCH_SUNXI) > > > > config SUN8I_V3S_CCU > > bool "Support for the Allwinner V3s CCU" > > diff --git a/drivers/clk/sunxi-ng/ccu-sunxi-h3-h5.c b/drivers/clk/sunxi-ng/ccu-sunxi-h3-h5.c > > index be63b56315f5..b7b9f85f5c9f 100644 > > --- a/drivers/clk/sunxi-ng/ccu-sunxi-h3-h5.c > > +++ b/drivers/clk/sunxi-ng/ccu-sunxi-h3-h5.c > > @@ -302,6 +302,8 @@ static SUNXI_CCU_GATE(bus_uart3_clk, "bus-uart3", "apb2", > > 0x06c, BIT(19), 0); > > static SUNXI_CCU_GATE(bus_scr0_clk, "bus-scr0", "apb2", > > 0x06c, BIT(20), 0); > > +static SUNXI_CCU_GATE(bus_scr1_clk, "bus-scr1", "apb2", > > + 0x06c, BIT(21), 0); > > > > static SUNXI_CCU_GATE(bus_ephy_clk, "bus-ephy", "ahb1", > > 0x070, BIT(0), 0); > > @@ -547,6 +549,7 @@ static struct ccu_common *sunxi_h3_h5_ccu_clks[] = { > > &bus_uart2_clk.common, > > &bus_uart3_clk.common, > > &bus_scr0_clk.common, > > + &bus_scr1_clk.common, > > &bus_ephy_clk.common, > > &bus_dbg_clk.common, > > &ths_clk.common, > > @@ -730,6 +733,122 @@ static struct clk_hw_onecell_data sun8i_h3_hw_clks = { > > .num = CLK_NUMBER, > > }; > > > > +static struct clk_hw_onecell_data sun50i_h5_hw_clks = { > > + .hws = { > > + [CLK_PLL_CPUX] = &pll_cpux_clk.common.hw, > > + [CLK_PLL_AUDIO_BASE] = &pll_audio_base_clk.common.hw, > > + [CLK_PLL_AUDIO] = &pll_audio_clk.hw, > > + [CLK_PLL_AUDIO_2X] = &pll_audio_2x_clk.hw, > > + [CLK_PLL_AUDIO_4X] = &pll_audio_4x_clk.hw, > > + [CLK_PLL_AUDIO_8X] = &pll_audio_8x_clk.hw, > > + [CLK_PLL_VIDEO] = &pll_video_clk.common.hw, > > + [CLK_PLL_VE] = &pll_ve_clk.common.hw, > > + [CLK_PLL_DDR] = &pll_ddr_clk.common.hw, > > + [CLK_PLL_PERIPH0] = &pll_periph0_clk.common.hw, > > + [CLK_PLL_PERIPH0_2X] = &pll_periph0_2x_clk.hw, > > + [CLK_PLL_GPU] = &pll_gpu_clk.common.hw, > > + [CLK_PLL_PERIPH1] = &pll_periph1_clk.common.hw, > > + [CLK_PLL_DE] = &pll_de_clk.common.hw, > > + [CLK_CPUX] = &cpux_clk.common.hw, > > + [CLK_AXI] = &axi_clk.common.hw, > > + [CLK_AHB1] = &ahb1_clk.common.hw, > > + [CLK_APB1] = &apb1_clk.common.hw, > > + [CLK_APB2] = &apb2_clk.common.hw, > > + [CLK_AHB2] = &ahb2_clk.common.hw, > > + [CLK_BUS_CE] = &bus_ce_clk.common.hw, > > + [CLK_BUS_DMA] = &bus_dma_clk.common.hw, > > + [CLK_BUS_MMC0] = &bus_mmc0_clk.common.hw, > > + [CLK_BUS_MMC1] = &bus_mmc1_clk.common.hw, > > + [CLK_BUS_MMC2] = &bus_mmc2_clk.common.hw, > > + [CLK_BUS_NAND] = &bus_nand_clk.common.hw, > > + [CLK_BUS_DRAM] = &bus_dram_clk.common.hw, > > + [CLK_BUS_EMAC] = &bus_emac_clk.common.hw, > > + [CLK_BUS_TS] = &bus_ts_clk.common.hw, > > + [CLK_BUS_HSTIMER] = &bus_hstimer_clk.common.hw, > > + [CLK_BUS_SPI0] = &bus_spi0_clk.common.hw, > > + [CLK_BUS_SPI1] = &bus_spi1_clk.common.hw, > > + [CLK_BUS_OTG] = &bus_otg_clk.common.hw, > > + [CLK_BUS_EHCI0] = &bus_ehci0_clk.common.hw, > > + [CLK_BUS_EHCI1] = &bus_ehci1_clk.common.hw, > > + [CLK_BUS_EHCI2] = &bus_ehci2_clk.common.hw, > > + [CLK_BUS_EHCI3] = &bus_ehci3_clk.common.hw, > > + [CLK_BUS_OHCI0] = &bus_ohci0_clk.common.hw, > > + [CLK_BUS_OHCI1] = &bus_ohci1_clk.common.hw, > > + [CLK_BUS_OHCI2] = &bus_ohci2_clk.common.hw, > > + [CLK_BUS_OHCI3] = &bus_ohci3_clk.common.hw, > > + [CLK_BUS_VE] = &bus_ve_clk.common.hw, > > + [CLK_BUS_TCON0] = &bus_tcon0_clk.common.hw, > > + [CLK_BUS_TCON1] = &bus_tcon1_clk.common.hw, > > + [CLK_BUS_DEINTERLACE] = &bus_deinterlace_clk.common.hw, > > + [CLK_BUS_CSI] = &bus_csi_clk.common.hw, > > + [CLK_BUS_TVE] = &bus_tve_clk.common.hw, > > + [CLK_BUS_HDMI] = &bus_hdmi_clk.common.hw, > > + [CLK_BUS_DE] = &bus_de_clk.common.hw, > > + [CLK_BUS_GPU] = &bus_gpu_clk.common.hw, > > + [CLK_BUS_MSGBOX] = &bus_msgbox_clk.common.hw, > > + [CLK_BUS_SPINLOCK] = &bus_spinlock_clk.common.hw, > > + [CLK_BUS_CODEC] = &bus_codec_clk.common.hw, > > + [CLK_BUS_SPDIF] = &bus_spdif_clk.common.hw, > > + [CLK_BUS_PIO] = &bus_pio_clk.common.hw, > > + [CLK_BUS_THS] = &bus_ths_clk.common.hw, > > + [CLK_BUS_I2S0] = &bus_i2s0_clk.common.hw, > > + [CLK_BUS_I2S1] = &bus_i2s1_clk.common.hw, > > + [CLK_BUS_I2S2] = &bus_i2s2_clk.common.hw, > > + [CLK_BUS_I2C0] = &bus_i2c0_clk.common.hw, > > + [CLK_BUS_I2C1] = &bus_i2c1_clk.common.hw, > > + [CLK_BUS_I2C2] = &bus_i2c2_clk.common.hw, > > + [CLK_BUS_UART0] = &bus_uart0_clk.common.hw, > > + [CLK_BUS_UART1] = &bus_uart1_clk.common.hw, > > + [CLK_BUS_UART2] = &bus_uart2_clk.common.hw, > > + [CLK_BUS_UART3] = &bus_uart3_clk.common.hw, > > + [CLK_BUS_SCR0] = &bus_scr0_clk.common.hw, > > + [CLK_BUS_SCR1] = &bus_scr1_clk.common.hw, > > + [CLK_BUS_EPHY] = &bus_ephy_clk.common.hw, > > + [CLK_BUS_DBG] = &bus_dbg_clk.common.hw, > > + [CLK_THS] = &ths_clk.common.hw, > > + [CLK_NAND] = &nand_clk.common.hw, > > + [CLK_MMC0] = &mmc0_clk.common.hw, > > + [CLK_MMC1] = &mmc1_clk.common.hw, > > + [CLK_MMC2] = &mmc2_clk.common.hw, > > + [CLK_TS] = &ts_clk.common.hw, > > + [CLK_CE] = &ce_clk.common.hw, > > + [CLK_SPI0] = &spi0_clk.common.hw, > > + [CLK_SPI1] = &spi1_clk.common.hw, > > + [CLK_I2S0] = &i2s0_clk.common.hw, > > + [CLK_I2S1] = &i2s1_clk.common.hw, > > + [CLK_I2S2] = &i2s2_clk.common.hw, > > + [CLK_SPDIF] = &spdif_clk.common.hw, > > + [CLK_USB_PHY0] = &usb_phy0_clk.common.hw, > > + [CLK_USB_PHY1] = &usb_phy1_clk.common.hw, > > + [CLK_USB_PHY2] = &usb_phy2_clk.common.hw, > > + [CLK_USB_PHY3] = &usb_phy3_clk.common.hw, > > + [CLK_USB_OHCI0] = &usb_ohci0_clk.common.hw, > > + [CLK_USB_OHCI1] = &usb_ohci1_clk.common.hw, > > + [CLK_USB_OHCI2] = &usb_ohci2_clk.common.hw, > > + [CLK_USB_OHCI3] = &usb_ohci3_clk.common.hw, > > + [CLK_DRAM] = &dram_clk.common.hw, > > + [CLK_DRAM_VE] = &dram_ve_clk.common.hw, > > + [CLK_DRAM_CSI] = &dram_csi_clk.common.hw, > > + [CLK_DRAM_DEINTERLACE] = &dram_deinterlace_clk.common.hw, > > + [CLK_DRAM_TS] = &dram_ts_clk.common.hw, > > + [CLK_DE] = &de_clk.common.hw, > > + [CLK_TCON0] = &tcon_clk.common.hw, > > + [CLK_TVE] = &tve_clk.common.hw, > > + [CLK_DEINTERLACE] = &deinterlace_clk.common.hw, > > + [CLK_CSI_MISC] = &csi_misc_clk.common.hw, > > + [CLK_CSI_SCLK] = &csi_sclk_clk.common.hw, > > + [CLK_CSI_MCLK] = &csi_mclk_clk.common.hw, > > + [CLK_VE] = &ve_clk.common.hw, > > + [CLK_AC_DIG] = &ac_dig_clk.common.hw, > > + [CLK_AVS] = &avs_clk.common.hw, > > + [CLK_HDMI] = &hdmi_clk.common.hw, > > + [CLK_HDMI_DDC] = &hdmi_ddc_clk.common.hw, > > + [CLK_MBUS] = &mbus_clk.common.hw, > > + [CLK_GPU] = &gpu_clk.common.hw, > > + }, > > + .num = CLK_NUMBER, > > +}; > > + > > static struct ccu_reset_map sunxi_h3_h5_ccu_resets[] = { > > [RST_USB_PHY0] = { 0x0cc, BIT(0) }, > > [RST_USB_PHY1] = { 0x0cc, BIT(1) }, > > @@ -791,6 +910,7 @@ static struct ccu_reset_map sunxi_h3_h5_ccu_resets[] = { > > [RST_BUS_UART2] = { 0x2d8, BIT(18) }, > > [RST_BUS_UART3] = { 0x2d8, BIT(19) }, > > [RST_BUS_SCR0] = { 0x2d8, BIT(20) }, > > + [RST_BUS_SCR1] = { 0x2d8, BIT(21) }, > > That reset line is not valid on the H3. So I should split a H3 reset array and a H5 one? (I modelled after ccu-sun5i.c, which shares one reset array) > > Thanks, > Maxime > > -- > Maxime Ripard, Free Electrons > Embedded Linux and Kernel engineering > http://free-electrons.com > > -- > You received this message because you are subscribed to the Google Groups "linux-sunxi" group. > To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscribe(a)googlegroups.com. > For more options, visit https://groups.google.com/d/optout.

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[alsa-devel] [PATCH] ALSA: x86: mark hdmi suspend/resume functions as __maybe_unused
by Arnd Bergmann 07 Feb '17

07 Feb '17

The two functions are unused when CONFIG_PM_SLEEP is disabled: sound/x86/intel_hdmi_audio.c:1633:12: error: 'hdmi_lpe_audio_resume' defined but not used [-Werror=unused-function] sound/x86/intel_hdmi_audio.c:1622:12: error: 'hdmi_lpe_audio_suspend' defined but not used [-Werror=unused-function] Marking them as __maybe_unused avoids the warning without introducing an ugly #ifdef. Fixes: 182cdf23dbf6 ("ALSA: x86: Implement runtime PM") Signed-off-by: Arnd Bergmann <arnd(a)arndb.de> --- sound/x86/intel_hdmi_audio.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/x86/intel_hdmi_audio.c b/sound/x86/intel_hdmi_audio.c index 8978dc9bf579..0d19a4994bac 100644 --- a/sound/x86/intel_hdmi_audio.c +++ b/sound/x86/intel_hdmi_audio.c @@ -1619,7 +1619,7 @@ static int hdmi_lpe_audio_runtime_suspend(struct device *dev) return 0; } -static int hdmi_lpe_audio_suspend(struct device *dev) +static int __maybe_unused hdmi_lpe_audio_suspend(struct device *dev) { struct snd_intelhad *ctx = dev_get_drvdata(dev); int err; @@ -1630,7 +1630,7 @@ static int hdmi_lpe_audio_suspend(struct device *dev) return err; } -static int hdmi_lpe_audio_resume(struct device *dev) +static int __maybe_unused hdmi_lpe_audio_resume(struct device *dev) { struct snd_intelhad *ctx = dev_get_drvdata(dev); -- 2.9.0

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[alsa-devel] [PATCH v2 0/2] Add STM32 SAI support
by olivier moysan 07 Feb '17

07 Feb '17

This patch-set handles the Serial Audio Interface (SAI) IP on STM32 platforms. The SAI IP is composed of two Sub-block A and B. (see the figure below) Each sub-block makes use of individual and shared resources. Shared resources: - Reset line. Reset common and sub-block registers. - Bus interface clocks. This clock is not exposed in device as it it managed by clock driver, according to kernel clocks gating. - Common register. SAI IP exhibits a common configuration register to manage synchronization modes. NB: These modes are not yet implemented in this version of the SAI driver. - Interrupt. Sub-blocks have their own interrupt status registers but they share the same interrupt line. Individual resources: - Register set - DMA request line. - Communication interface. Each sub-block has its own GPIOs and associated bus lines. - Kernel clock. Each sub-block has its own dedicated clock for its communication interface. To reflect this architecture Sub-block A and B are handled by 2 child devices. Sub-block A and B devices can be configured independently either as transmitter or receiver. A PCM device is associated to each sub-block. A sub-block has to select the appropriated parent clock at runtime, depending on the audio stream sampling rate to be played or captured. Two parent clocks must be provided to support sampling rates multiples of 8 kHz or 11.025kHz. Interface clock +--------------------------------+ +---------------> | SAI IP | Reset | +-----------------+ | +---------------> | |common registers | | | +-----------------+ | | | | +----------------------+ | | | Sub-block A | | Kernel clock A | | | | Bus A +--------------------> | +----------------+ +----------------> | | |A registers | | | | | +----------------+ | | | +----------------------+ | | | | +----------------------+ | | | Sub-block B | | Kernel clock B | | | | Bus B +--------------------> | +----------------+ +-----------------> | | |B registers | | | | | +----------------+ | | | +----------------------+ | | | +--------------------------------+ Changes in v2: - Fix warnings olivier moysan (2): ASoC: stm32: add bindings for SAI ASoC: stm32: add SAI driver .../devicetree/bindings/sound/st,stm32-sai.txt | 79 ++ sound/soc/Kconfig | 1 + sound/soc/Makefile | 1 + sound/soc/stm/Kconfig | 8 + sound/soc/stm/Makefile | 6 + sound/soc/stm/stm32_sai.c | 123 +++ sound/soc/stm/stm32_sai.h | 202 +++++ sound/soc/stm/stm32_sai_sub.c | 899 +++++++++++++++++++++ 8 files changed, 1319 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/st,stm32-sai.txt create mode 100644 sound/soc/stm/Kconfig create mode 100644 sound/soc/stm/Makefile create mode 100644 sound/soc/stm/stm32_sai.c create mode 100644 sound/soc/stm/stm32_sai.h create mode 100644 sound/soc/stm/stm32_sai_sub.c -- 1.9.1

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[alsa-devel] [PATCH v2 1/3] clk: zte: add i2s clocks for zx296718
by Baoyou Xie 07 Feb '17

07 Feb '17

The i2s related clock support is missing from the existing zx296718 clock driver. This patch adds it, so that the upstream ZX I2S driver can work out. Signed-off-by: Baoyou Xie <baoyou.xie(a)linaro.org> --- drivers/clk/zte/clk-zx296718.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/clk/zte/clk-zx296718.c b/drivers/clk/zte/clk-zx296718.c index ad5d1df..f106d40 100644 --- a/drivers/clk/zte/clk-zx296718.c +++ b/drivers/clk/zte/clk-zx296718.c @@ -941,6 +941,10 @@ static struct zx_clk_gate audio_gate_clk[] = { GATE(AUDIO_SPDIF1_WCLK, "spdif1_wclk", "spdif1_wclk_div", AUDIO_SPDIF1_CLK, 9, CLK_SET_RATE_PARENT, 0), GATE(AUDIO_TDM_WCLK, "tdm_wclk", "tdm_wclk_div", AUDIO_TDM_CLK, 17, CLK_SET_RATE_PARENT, 0), GATE(AUDIO_TS_PCLK, "tempsensor_pclk", "clk49m5", AUDIO_TS_CLK, 1, 0, 0), + GATE(AUDIO_I2S0_PCLK, "i2s0_pclk", "clk49m5", AUDIO_I2S0_CLK, 8, 0, 0), + GATE(AUDIO_I2S1_PCLK, "i2s1_pclk", "clk49m5", AUDIO_I2S1_CLK, 8, 0, 0), + GATE(AUDIO_I2S2_PCLK, "i2s2_pclk", "clk49m5", AUDIO_I2S2_CLK, 8, 0, 0), + GATE(AUDIO_I2S3_PCLK, "i2s3_pclk", "clk49m5", AUDIO_I2S3_CLK, 8, 0, 0), }; static struct clk_hw_onecell_data audio_hw_onecell_data = { -- 2.7.4

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[alsa-devel] [bug report] ALSA: x86: Flatten two abstraction layers
by Dan Carpenter 07 Feb '17

07 Feb '17

Hello Takashi Iwai, The patch da8648097497: "ALSA: x86: Flatten two abstraction layers" from Jan 31, 2017, leads to the following static checker warning: sound/x86/intel_hdmi_audio.c:1702 hdmi_lpe_audio_probe() error: strcpy() '"IntelHdmiLpeAudio"' too large for 'card->driver' (18 vs 16) sound/x86/intel_hdmi_audio.c 1695 ctx = card->private_data; 1696 spin_lock_init(&ctx->had_spinlock); 1697 mutex_init(&ctx->mutex); 1698 ctx->connected = false; 1699 ctx->dev = &pdev->dev; 1700 ctx->card = card; 1701 ctx->aes_bits = SNDRV_PCM_DEFAULT_CON_SPDIF; 1702 strcpy(card->driver, INTEL_HAD); ^^^^^^^^^ Too long. We're corrupting memory. The old code was equally bad, but the renaming the function made it show up as a new warning... 1703 strcpy(card->shortname, INTEL_HAD); 1704 regards, dan carpenter

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[alsa-devel] [PATCH 1/2] ALSA: x86: Drop suspicious U24 format support
by Takashi Iwai 07 Feb '17

07 Feb '17

U24 format is declared to be supported by the driver, but this looks really doubtful, as there is no corresponding code. Better to drop it. This format is very uncommon, so there should be practically no impact by this change. Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- sound/x86/intel_hdmi_audio.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/sound/x86/intel_hdmi_audio.c b/sound/x86/intel_hdmi_audio.c index 8978dc9bf579..11ee4dddc5dd 100644 --- a/sound/x86/intel_hdmi_audio.c +++ b/sound/x86/intel_hdmi_audio.c @@ -136,8 +136,7 @@ static const struct snd_pcm_hardware had_pcm_hardware = { SNDRV_PCM_INFO_MMAP| SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BATCH), - .formats = (SNDRV_PCM_FMTBIT_S24 | - SNDRV_PCM_FMTBIT_U24), + .formats = SNDRV_PCM_FMTBIT_S24, .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | -- 2.11.0

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