May 2016 - Alsa-devel - mailman.alsa-project.org

[alsa-devel] [PATCH v4] ASoC: Intel: Skylake: Add DSP firmware manifest parsing
by Vinod Koul 16 May '16

16 May '16

From: Shreyas NC <shreyas.nc(a)intel.com> Module params like module_id and loadable flag can be changed in the DSP Firmware. These are kept in the firmware manifest and driver should read these values from this manifest. So, add support to parse the DSP firmware manifest and read these module params. Signed-off-by: Shreyas NC <shreyas.nc(a)intel.com> Signed-off-by: Vinod Koul <vinod.koul(a)intel.com> --- Changes in v4: rebase on asoc-next, resolve rebase conflict Changes in v3: add bound check for firmware file sound/soc/intel/skylake/Makefile | 2 +- sound/soc/intel/skylake/skl-dsp-parse.c | 118 ++++++++++++++++++++++++++++++++ sound/soc/intel/skylake/skl-dsp-parse.h | 107 +++++++++++++++++++++++++++++ sound/soc/intel/skylake/skl-sst-ipc.h | 4 ++ sound/soc/intel/skylake/skl-sst.c | 11 ++- sound/soc/intel/skylake/skl-topology.c | 5 ++ 6 files changed, 245 insertions(+), 2 deletions(-) create mode 100644 sound/soc/intel/skylake/skl-dsp-parse.c create mode 100644 sound/soc/intel/skylake/skl-dsp-parse.h diff --git a/sound/soc/intel/skylake/Makefile b/sound/soc/intel/skylake/Makefile index c28f5d0e1d99..e2fb5b763b21 100644 --- a/sound/soc/intel/skylake/Makefile +++ b/sound/soc/intel/skylake/Makefile @@ -5,6 +5,6 @@ obj-$(CONFIG_SND_SOC_INTEL_SKYLAKE) += snd-soc-skl.o # Skylake IPC Support snd-soc-skl-ipc-objs := skl-sst-ipc.o skl-sst-dsp.o skl-sst-cldma.o \ - skl-sst.o bxt-sst.o + skl-sst.o skl-dsp-parse.o bxt-sst.o obj-$(CONFIG_SND_SOC_INTEL_SKYLAKE) += snd-soc-skl-ipc.o diff --git a/sound/soc/intel/skylake/skl-dsp-parse.c b/sound/soc/intel/skylake/skl-dsp-parse.c new file mode 100644 index 000000000000..a3cd5d7ab246 --- /dev/null +++ b/sound/soc/intel/skylake/skl-dsp-parse.c @@ -0,0 +1,118 @@ +/* + * skl-dsp-parse.c - Implements DSP firmware parsing + * + * Copyright (C) 2016 Intel Corp + * Author: Shreyas NC <shreyas.nc(a)intel.com> + * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as version 2, as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + */ + +#include <linux/module.h> +#include <linux/types.h> +#include <linux/kernel.h> +#include <linux/device.h> +#include "../common/sst-dsp.h" +#include "../common/sst-dsp-priv.h" +#include "skl-tplg-interface.h" +#include "skl-sst-ipc.h" +#include "skl-dsp-parse.h" + +/* + * Get the module id for the module by checking + * the table for the UUID for the module + */ +int snd_skl_get_module_info(struct skl_sst *ctx, u8 *uuid, + struct skl_dfw_module *dfw_config) +{ + int i, num; + struct uuid_tbl *tbl; + uuid_le *uuid_mod; + + tbl = ctx->tbl; + num = ctx->num_modules; + uuid_mod = (uuid_le *)uuid; + + for (i = 0; i < num; i++) { + if (uuid_le_cmp(*uuid_mod, tbl[i].uuid) == 0) { + dfw_config->module_id = tbl[i].module_id; + dfw_config->is_loadable = tbl[i].is_loadable; + return 0; + } + } + return -EINVAL; +} +EXPORT_SYMBOL_GPL(snd_skl_get_module_info); + +/* + * Parse the firmware binary to get the UUID, module id + * and loadable flags + */ +int snd_skl_parse_fw_bin(struct sst_dsp *ctx) +{ + struct adsp_fw_hdr *adsp_hdr; + struct adsp_module_entry *mod_entry; + int i, num_entry; + uuid_le *uuid_bin; + const char *buf; + struct skl_sst *skl = ctx->thread_context; + struct uuid_tbl *tbl; + + /* Get the FW pointer to derive ADSP header */ + buf = ctx->fw->data; + + adsp_hdr = (struct adsp_fw_hdr *)(buf + SKL_ADSP_FW_BIN_HDR_OFFSET); + + mod_entry = (struct adsp_module_entry *) + (buf + SKL_ADSP_FW_BIN_HDR_OFFSET + adsp_hdr->header_len); + + num_entry = adsp_hdr->num_module_entries; + + tbl = devm_kzalloc(ctx->dev, + num_entry * sizeof(struct uuid_tbl), GFP_KERNEL); + + if (!tbl) + return -ENOMEM; + + /* + * Read the UUID(GUID) from FW Manifest. + * The 16 byte UUID is of the format: + * XXXXXXXX-XXXX-XXXX-XXXX-XXXXXXXXXX + * Populate the UUID table to store module_id + * and loadable flags for the module. + */ + + for (i = 0; i < num_entry; i++, mod_entry++) { + + /* + * we check if current pointer is larger than file size from + * base value to check excceding the file while parsing + */ + if ((const char *)mod_entry >= buf + ctx->fw->size) { + dev_err(ctx->dev, + "Exceeds file bound: Entry %d Ptr %p\n", + i, mod_entry); + + return -EIO; + } + + uuid_bin = (uuid_le *)mod_entry->uuid.id; + memcpy(&tbl[i].uuid, uuid_bin, sizeof(tbl[i].uuid)); + + tbl[i].module_id = i; + tbl[i].is_loadable = mod_entry->type.load_type; + } + + skl->tbl = tbl; + skl->num_modules = num_entry; + + return 0; +} +EXPORT_SYMBOL_GPL(snd_skl_parse_fw_bin); diff --git a/sound/soc/intel/skylake/skl-dsp-parse.h b/sound/soc/intel/skylake/skl-dsp-parse.h new file mode 100644 index 000000000000..cfdb24c45035 --- /dev/null +++ b/sound/soc/intel/skylake/skl-dsp-parse.h @@ -0,0 +1,107 @@ +/* + * skl-dsp-parse.h + * + * Copyright (C) 2016 Intel Corp + * Author: Shreyas NC <shreyas.nc(a)intel.com> + * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as version 2, as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + */ + +#include <asm/types.h> +#include <linux/types.h> +#include <linux/uuid.h> +#include "skl-tplg-interface.h" +#include "../common/sst-dsp-priv.h" + +#define SKL_ADSP_FW_BIN_HDR_OFFSET 0x284 +#define UUID_STR_SIZE 37 +#define DEFAULT_HASH_SHA256_LEN 32 + +struct skl_dfw_module_mod { + char name[100]; + struct skl_dfw_module skl_dfw_mod; +}; + +struct UUID { + u8 id[16]; +}; + +union seg_flags { + u32 ul; + struct { + u32 contents : 1; + u32 alloc : 1; + u32 load : 1; + u32 read_only : 1; + u32 code : 1; + u32 data : 1; + u32 _rsvd0 : 2; + u32 type : 4; + u32 _rsvd1 : 4; + u32 length : 16; + } r; +} __packed; + +struct segment_desc { + union seg_flags flags; + u32 v_base_addr; + u32 file_offset; +}; + +struct module_type { + u32 load_type : 4; + u32 auto_start : 1; + u32 domain_ll : 1; + u32 domain_dp : 1; + u32 rsvd_ : 25; +} __packed; + +struct adsp_module_entry { + u32 struct_id; + u8 name[8]; + struct UUID uuid; + struct module_type type; + u8 hash1[DEFAULT_HASH_SHA256_LEN]; + u32 entry_point; + u16 cfg_offset; + u16 cfg_count; + u32 affinity_mask; + u16 instance_max_count; + u16 instance_bss_size; + struct segment_desc segments[3]; +} __packed; + +struct adsp_fw_hdr { + u32 header_id; + u32 header_len; + u8 name[8]; + u32 preload_page_count; + u32 fw_image_flags; + u32 feature_mask; + u16 major_version; + u16 minor_version; + u16 hotfix_version; + u16 build_version; + u32 num_module_entries; + u32 hw_buf_base_addr; + u32 hw_buf_length; + u32 load_offset; +} __packed; + +struct uuid_tbl { + uuid_le uuid; + int module_id; + int is_loadable; +}; + +int snd_skl_parse_fw_bin(struct sst_dsp *ctx); +int snd_skl_get_module_info(struct skl_sst *ctx, u8 *uuid, + struct skl_dfw_module *dfw_config); diff --git a/sound/soc/intel/skylake/skl-sst-ipc.h b/sound/soc/intel/skylake/skl-sst-ipc.h index d59d1ba62a43..67d56be8cb77 100644 --- a/sound/soc/intel/skylake/skl-sst-ipc.h +++ b/sound/soc/intel/skylake/skl-sst-ipc.h @@ -60,6 +60,10 @@ struct skl_sst { void (*enable_miscbdcge)(struct device *dev, bool enable); /*Is CGCTL.MISCBDCGE disabled*/ bool miscbdcg_disabled; + + /* Populate module information */ + struct uuid_tbl *tbl; + int num_modules; }; struct skl_ipc_init_instance_msg { diff --git a/sound/soc/intel/skylake/skl-sst.c b/sound/soc/intel/skylake/skl-sst.c index 13ec8d53b526..db3a45ee102b 100644 --- a/sound/soc/intel/skylake/skl-sst.c +++ b/sound/soc/intel/skylake/skl-sst.c @@ -25,6 +25,7 @@ #include "../common/sst-dsp-priv.h" #include "../common/sst-ipc.h" #include "skl-sst-ipc.h" +#include "skl-dsp-parse.h" #define SKL_BASEFW_TIMEOUT 300 #define SKL_INIT_TIMEOUT 1000 @@ -70,7 +71,7 @@ static int skl_transfer_firmware(struct sst_dsp *ctx, static int skl_load_base_firmware(struct sst_dsp *ctx) { - int ret = 0, i; + int ret = 0, i, err; struct skl_sst *skl = ctx->thread_context; u32 reg; @@ -84,6 +85,14 @@ static int skl_load_base_firmware(struct sst_dsp *ctx) skl_dsp_disable_core(ctx); return -EIO; } + + err = snd_skl_parse_fw_bin(ctx); + if (err < 0) { + dev_err(ctx->dev, + "Firmware parsing err: %d\n", ret); + release_firmware(ctx->fw); + return err; + } } ret = skl_dsp_boot(ctx); diff --git a/sound/soc/intel/skylake/skl-topology.c b/sound/soc/intel/skylake/skl-topology.c index a1f4478fabcb..f690b016203c 100644 --- a/sound/soc/intel/skylake/skl-topology.c +++ b/sound/soc/intel/skylake/skl-topology.c @@ -28,6 +28,7 @@ #include "skl-tplg-interface.h" #include "../common/sst-dsp.h" #include "../common/sst-dsp-priv.h" +#include "skl-dsp-parse.h" #define SKL_CH_FIXUP_MASK (1 << 0) #define SKL_RATE_FIXUP_MASK (1 << 1) @@ -1566,6 +1567,10 @@ static int skl_tplg_widget_load(struct snd_soc_component *cmpnt, w->priv = mconfig; memcpy(&mconfig->guid, &dfw_config->uuid, 16); + ret = snd_skl_get_module_info(skl->skl_sst, mconfig->guid, dfw_config); + if (ret < 0) + return ret; + mconfig->id.module_id = dfw_config->module_id; mconfig->id.instance_id = dfw_config->instance_id; mconfig->mcps = dfw_config->max_mcps; -- 1.9.1

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[alsa-devel] [PATCH] ALSA: firewire-lib: permit to flush queued packets only in process context for better PCM period granularity
by Takashi Sakamoto 16 May '16

16 May '16

These three commits were merged to improve PCM pointer granularity. commit 76fb87894828 ("ALSA: firewire-lib: taskletize the snd_pcm_period_elapsed() call") commit e9148dddc3c7 ("ALSA: firewire-lib: flush completed packets when reading PCM position") commit 92b862c7d685 ("ALSA: firewire-lib: optimize packet flushing") The point of them is to handle queued packets not only in software IRQ context of IR/IT contexts, but also in process context. As a result of handling packets, period tasklet is scheduled when acrossing PCM period boundary. This is to prevent recursive call of 'struct snd_pcm_ops.pointer()' in the same context. When the pointer callback is executed in the process context, it's better to avoid the second callback in the software IRQ context. The software IRQ context runs immediately after scheduled in the process context because few packets are queued yet. For the aim, 'pointer_flush' is used, however it causes a race condition between the process context and software IRQ context of IR/IT contexts. Practically, this race is not so critical because it influences process context to skip flushing queued packet and to get worse granularity of PCM pointer. The race condition is quite rare but it should be improved for stable service. The similar effect can be achieved by using 'in_interrupt()' macro. This commit obsoletes 'pointer_flush' with it. Acked-by: Clemens Ladisch <clemens(a)ladisch.de> Signed-off-by: Takashi Sakamoto <o-takashi(a)sakamocchi.jp> --- sound/firewire/amdtp-stream.c | 23 +++++++++++++++++------ sound/firewire/amdtp-stream.h | 1 - 2 files changed, 17 insertions(+), 7 deletions(-) diff --git a/sound/firewire/amdtp-stream.c b/sound/firewire/amdtp-stream.c index 830a95c..024ab7f 100644 --- a/sound/firewire/amdtp-stream.c +++ b/sound/firewire/amdtp-stream.c @@ -251,7 +251,6 @@ void amdtp_stream_pcm_prepare(struct amdtp_stream *s) tasklet_kill(&s->period_tasklet); s->pcm_buffer_pointer = 0; s->pcm_period_pointer = 0; - s->pointer_flush = true; } EXPORT_SYMBOL(amdtp_stream_pcm_prepare); @@ -356,7 +355,6 @@ static void update_pcm_pointers(struct amdtp_stream *s, s->pcm_period_pointer += frames; if (s->pcm_period_pointer >= pcm->runtime->period_size) { s->pcm_period_pointer -= pcm->runtime->period_size; - s->pointer_flush = false; tasklet_hi_schedule(&s->period_tasklet); } } @@ -803,11 +801,24 @@ EXPORT_SYMBOL(amdtp_stream_start); */ unsigned long amdtp_stream_pcm_pointer(struct amdtp_stream *s) { - /* this optimization is allowed to be racy */ - if (s->pointer_flush && amdtp_stream_running(s)) + /* + * This function is called in software IRQ context of period_tasklet or + * process context. + * + * When the software IRQ context was scheduled by software IRQ context + * of IR/IT contexts, queued packets were already handled. Therefore, + * no need to flush the queue in buffer anymore. + * + * When the process context reach here, some packets will be already + * queued in the buffer. These packets should be handled immediately + * to keep better granularity of PCM pointer. + * + * Later, the process context will sometimes schedules software IRQ + * context of the period_tasklet. Then, no need to flush the queue by + * the same reason as described for IR/IT contexts. + */ + if (!in_interrupt() && amdtp_stream_running(s)) fw_iso_context_flush_completions(s->context); - else - s->pointer_flush = true; return ACCESS_ONCE(s->pcm_buffer_pointer); } diff --git a/sound/firewire/amdtp-stream.h b/sound/firewire/amdtp-stream.h index 349c405..c1bc7fa 100644 --- a/sound/firewire/amdtp-stream.h +++ b/sound/firewire/amdtp-stream.h @@ -126,7 +126,6 @@ struct amdtp_stream { struct tasklet_struct period_tasklet; unsigned int pcm_buffer_pointer; unsigned int pcm_period_pointer; - bool pointer_flush; /* To wait for first packet. */ bool callbacked; -- 2.7.4

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Re: [alsa-devel] Why is the bufs argument for snd_pcm_writen not const?
by Trent Reed 16 May '16

16 May '16

Absolutely! Sorry about that, I'm used to requesting changes and not being able to make them myself. I'll ping the thread with the patch later this week. :) Thanks, - Trent Reed On May 16, 2016 12:12 AM, "Takashi Iwai" <tiwai(a)suse.de> wrote: On Mon, 16 May 2016 09:06:06 +0200, Trent Reed wrote: > > Thanks Takashi, > > I wasn't able to find anything about this in the documentation. Perhaps if > it isn't changed in the API, it could be added as a @note for Doxygen in > the functions? A patch is always welcome :) Takashi > > - Trent Reed > On May 15, 2016 11:58 PM, "Takashi Iwai" <tiwai(a)suse.de> wrote: > > > On Sun, 15 May 2016 05:05:49 +0200, > > Trent Reed wrote: > > > > > > Hey All, > > > > > > Just wondering what the reasoning is behind snd_pcm_writen not having > > > a constant variable for bufs. To me, this doesn't make sense. Does > > > snd_pcm_writen make any alterations to bufs? I would expect one of the > > > following declaration: > > > > > > // Better, but doesn't promise that the API won't change the channel > > pointers. > > > snd_pcm_sframes_t snd_pcm_writen(snd_pcm_t* pcm, const void** bufs, > > > snd_pcm_uframes_t size); > > > // Best, promises ALSA won't change channel pointers, wont change > > > underlying data. > > > snd_pcm_sframes_t snd_pcm_writen(snd_pcm_t* pcm, const void*const* > > > bufs, snd_pcm_uframes_t size); > > > > > > For now, is it safe to assume that snd_pcm_writen() doesn't alter any > > > of the data in bufs passed into it? Any chance on seeing this patched > > > or is there some reason for this? > > > > We never thought of modifying the data inside the writen API > > function. The lack of const is merely the laziness. > > > > > > Takashi > > > [2 <text/html; UTF-8 (quoted-printable)>] >

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[alsa-devel] Why is the bufs argument for snd_pcm_writen not const?
by Trent Reed 16 May '16

16 May '16

Hey All, Just wondering what the reasoning is behind snd_pcm_writen not having a constant variable for bufs. To me, this doesn't make sense. Does snd_pcm_writen make any alterations to bufs? I would expect one of the following declaration: // Better, but doesn't promise that the API won't change the channel pointers. snd_pcm_sframes_t snd_pcm_writen(snd_pcm_t* pcm, const void** bufs, snd_pcm_uframes_t size); // Best, promises ALSA won't change channel pointers, wont change underlying data. snd_pcm_sframes_t snd_pcm_writen(snd_pcm_t* pcm, const void*const* bufs, snd_pcm_uframes_t size); For now, is it safe to assume that snd_pcm_writen() doesn't alter any of the data in bufs passed into it? Any chance on seeing this patched or is there some reason for this? Thanks, - Trent Reed

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[alsa-devel] [PATCH] conf: don't check if config files are up to date
by Alexander E. Patrakov 16 May '16

16 May '16

Even if no files have been changed, the config may become outdated due to hot-plugged devices. Note: this patch has a huge potential to crash badly-written applications that keep config pointers and strings for too long. But I see no other way to support hot-pluggable devices. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=54029 Signed-off-by: Alexander E. Patrakov <patrakov(a)gmail.com> --- src/conf.c | 63 ++++++++++++++++++++++++---------------------------------- src/confmisc.c | 4 +++- 2 files changed, 29 insertions(+), 38 deletions(-) diff --git a/src/conf.c b/src/conf.c index f8b7a66..34576aa 100644 --- a/src/conf.c +++ b/src/conf.c @@ -3661,14 +3661,15 @@ SND_DLSYM_BUILD_VERSION(snd_config_hook_load_for_all_cards, SND_CONFIG_DLSYM_VER #endif /** - * \brief Updates a configuration tree by rereading the configuration files (if needed). + * \brief Updates a configuration tree by rereading the configuration files. * \param[in,out] _top Address of the handle to the top-level node. * \param[in,out] _update Address of a pointer to private update information. * \param[in] cfgs A list of configuration file names, delimited with ':'. * If \p cfgs is \c NULL, the default global * configuration file is used. - * \return 0 if \a _top was up to date, 1 if the configuration files - * have been reread, otherwise a negative error code. + * \return 0 if \a _top was up to date (this can happen only in previous + * ALSA-lib versions), 1 if the configuration files have been + * reread successfully, otherwise a negative error code. * * The variables pointed to by \a _top and \a _update can be initialized * to \c NULL before the first call to this function. The private @@ -3679,7 +3680,8 @@ SND_DLSYM_BUILD_VERSION(snd_config_hook_load_for_all_cards, SND_CONFIG_DLSYM_VER * The global configuration files are specified in the environment variable * \c ALSA_CONFIG_PATH. * - * \warning If the configuration tree is reread, all string pointers and + * \warning In order to deal with hot-pluggable devices, the configuration + * tree is always reread, even if nothing changed. All string pointers and * configuration node handles previously obtained from this tree become * invalid. * @@ -3754,35 +3756,6 @@ int snd_config_update_r(snd_config_t **_top, snd_config_update_t **_update, cons local->count--; } } - if (!update) - goto _reread; - if (local->count != update->count) - goto _reread; - for (k = 0; k < local->count; ++k) { - struct finfo *lf = &local->finfo[k]; - struct finfo *uf = &update->finfo[k]; - if (strcmp(lf->name, uf->name) != 0 || - lf->dev != uf->dev || - lf->ino != uf->ino || - lf->mtime != uf->mtime) - goto _reread; - } - err = 0; - - _end: - if (err < 0) { - if (top) { - snd_config_delete(top); - *_top = NULL; - } - if (update) { - snd_config_update_free(update); - *_update = NULL; - } - } - if (local) - snd_config_update_free(local); - return err; _reread: *_top = NULL; @@ -3823,15 +3796,31 @@ int snd_config_update_r(snd_config_t **_top, snd_config_update_t **_update, cons *_top = top; *_update = local; return 1; + +_end: + if (err < 0) { + if (top) { + snd_config_delete(top); + *_top = NULL; + } + if (update) { + snd_config_update_free(update); + *_update = NULL; + } + } + if (local) + snd_config_update_free(local); + return err; } /** - * \brief Updates #snd_config by rereading the global configuration files (if needed). - * \return 0 if #snd_config was up to date, 1 if #snd_config was - * updated, otherwise a negative error code. + * \brief Updates #snd_config by rereading the global configuration files. + * \return 0 if #snd_config was up to date (this can happen only in previous + * ALSA-lib versions), 1 if #snd_config was updated successfully, + * otherwise a negative error code. * * \warning Whenever #snd_config is updated, all string pointers and - * configuration node handles previously obtained from it may become + * configuration node handles previously obtained from it become * invalid. * * \par Errors: diff --git a/src/confmisc.c b/src/confmisc.c index ae0275f..8f97b72 100644 --- a/src/confmisc.c +++ b/src/confmisc.c @@ -599,7 +599,9 @@ static int open_ctl(long card, snd_ctl_t **ctl) char name[16]; snprintf(name, sizeof(name), "hw:%li", card); name[sizeof(name)-1] = '\0'; - return snd_ctl_open(ctl, name, 0); + + /* Take care not to update the config - we may be running hooks on pcms right now */ + return snd_ctl_open_lconf(ctl, name, 0, snd_config); } #if 0 -- 2.8.0

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[alsa-devel] emagic mt4 problems
by Kazuhiro Ito 15 May '16

15 May '16

When I use emagic mt4 (USB-MIDI interface) on Linux, there are some minor problems. 1. mt4 never switches to computer mode until PC receives mt4's response to initialization command. Mt4 has two mode, patch mode and computer mode. When connected to PC, it is in patch mode. To use as MIDI interface, mt4 must switch to computer mode. Linux drvier sends commnad "F0 00 20 31 64 0B 00 00 F7" to make mt4 switch to computer mode. But mt4 is still in patch mode after having received the command. It switches to computer mode when PC receives the response from mt4. I must run the below command to make mt4 really ready for use as MIDI interface. $ amidi -l Dir Device Name IO hw:2,0,0 MT4 MIDI 1 IO hw:2,0,1 MT4 MIDI 2 IO hw:2,0,2 MT4 MIDI 3 O hw:2,0,3 MT4 MIDI 4 O hw:2,0,4 MT4 Broadcast $ amidi -p hw:2,0,0 -r /dev/null -t 1 According to Kurt Arnlund's web page (*1), emagic devices accept "Set Computer Mode" command ("F0 00 20 31 64 0F 00 7F F7"), and actually mt4 switches to computer mode with this command immidiately and receiving mt4's response is not needed. (*1) http://www.potm.org/software/Unitor/mididata/ 2. Outputs to MIDI 1 are broadcasted. After switching to computer mode by the above procedure, output to MIDI 1 is broadcasted as if outputted to broadcast port. The current output port in driver's internal state is initialized to port 0 (MIDI 1). But actual device's current port is initialized to port 4 (broadcast port). So output to MIDI 1 doesn't make driver send port switch command until output to other port occurs. I think driver's current port state should be initialized to 4 (for mt4) or larger number. I worte the patch for the problems (to linux kernel 3.16), but I don't know it works with other emagic devices such as amt4, unitor8. If there is anyone has emagic device, please test the below command on unpatched kernel to check whether the device accepts "Set Computer Mode" command. $ amidi -p hw:2,0,0 -r /dev/null -t 1 $ amidi -p hw:2,0,0 -S 'F0 00 20 31 64 10 00 7F 00 F7' $ amidi -p hw:2,0,0 -S 'F0 00 20 31 64 0F 00 7F F7' My mt4 swithes to computer mode with the first amidi command, and returns to patch mode with second command, and finally re-enters in computer mode with the last command. -- Kazuhiro Ito

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Re: [alsa-devel] WM5102 - Help to make baytrail machine driver work
by Charles Keepax 15 May '16

15 May '16

On Wed, May 04, 2016 at 10:21:21PM -0300, Paulo Sergio wrote: > Hi list, > > I've been trying to make Lenovo Yoga 2 (Model 1051F) sound work on > Android-x86/ Linux. [1] > > Based on already discussed info from Christian Hartmann with members (see > [2] and [3] ) of this list and some efforts (basically patch pxa2xx with > Mika Westerberg changes, set the correct gpio int values {246 for reset / > 405 for ldoena and 342 for irq_gpio} and set LDO1 vcc suppliers) we could > have wm5102 initialized through spi / regmap (arizona code on drivers/mfd) > and register the DAI's. > > I also ported a machine driver code from a kernel Lenovo made available for > a similar hardware (Lenovo yoga 2 1050 - uses the same baytrail Z3745 and > wolfson wm5102 audio) [4] > > Although machine driver is registered, we still don't have sound. Tried > some mixer settings / routes used on raspberry pi, but none help. > Application (in this case alsa / Android players) returns a "Device or > resource busy" when trying to ioctl pcm device: A quick look through your machine driver looks like the parts relating the CODEC look ok. I am not so sure about the AP side routing but for the CODEC, 'HPOUT1L Input 1' AIF1RX1 'HPOUT1R Input 1' AIF1RX2 'HPOUT1 Digital Switch' 1 Should be enough to route some audio out the headphones, assuming AIF1 is connected to the AP and HPOUT1L is the headphones (it is very rare for people to not wire things up that way so its quite a good bet, and your machine driver suggests this is how it is connected). If you provide some kernel logs with the LOG_DEVICE in drivers/base/regmap/regmap.c set to the CODEC spi device, I am happy to sanity check what is going to the CODEC. Although at the moment I think your issue looks mostly like getting through the AP side. Thanks, Charles

2 7

[alsa-devel] i.MX6 SGTL5000 hangs with EIO error
by Ross Wille 14 May '16

14 May '16

Hello all, I am doing an ALSA capture on a Wandboard Quad (i.MX6 quad core with SGTL5000 codec chip) from the LINEIN1 jack. I'm using a 4.6.0-rc3-armv7-x0 kernel. Sometimes when the audio glitches (for example, when I plug/unplug the audio cable or adjust my signal generator) the snd_pcm_readi() function will start returning -5 (EIO). Once this happens, the only way I've been able to recover is to reboot the computer. Calling snd_pcm_close(), snd_pcm_prepare(), snd_pcm_start(), etc. doesn't help. When in this state, running arecord returns IO errors as well. It's interesting that, on rare occasions, I must do a power cycle in order to recover. When a reboot is not effective I've noticed that the capture device doesn't appear in /proc/asound/devices. I don't believe my specific ALSA settings are important, but I'm calling snd_pcm_readi() with ALSA set to a sample rate of 48000, format of S16_LE, channels=1, frames per period of 960 (20 mS periods), and 4 periods per buffer. This same problem happens on two different Wandboards, so I don't think it's a defective board or chip. It has happened on older kernels as well. Any ideas? Thank you! Ross Wille

2 6

[alsa-devel] iMX ASRC
by Petr Kulhavy 14 May '16

14 May '16

Hi, now after the SAI MCLK has been enabled on the iMX6UL in the mainstream kernel I'm having difficulties getting the ASRC work. The default pcm device is the SAI-codec link. That if used does not activate the ASRC. If I use the second pcm device the error message "fsl-sai 202c000.sai: isr: Transmit underrun detected" repeats forever. In /proc/asound only the HiFi-ASRC-FE is present and not the HiFi-ASRC-BE. Any idea how to get it working and/or how to debug this? Thanks! Petr

1 0

[alsa-devel] [PATCH] ASoC: MAX9860: new driver
by Peter Rosin 14 May '16

14 May '16

This is a driver for the MAX9860 Mono Audio Voice Codec. https://datasheets.maximintegrated.com/en/ds/MAX9860.pdf This driver does not support sidetone since the DVST register field is backwards with the mute near the maximum level instead of the minimum. Signed-off-by: Peter Rosin <peda(a)axentia.se> --- .../devicetree/bindings/sound/max9860.txt | 27 + MAINTAINERS | 7 + sound/soc/codecs/Kconfig | 6 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/max9860.c | 722 +++++++++++++++++++++ sound/soc/codecs/max9860.h | 162 +++++ 6 files changed, 926 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/max9860.txt create mode 100644 sound/soc/codecs/max9860.c create mode 100644 sound/soc/codecs/max9860.h diff --git a/Documentation/devicetree/bindings/sound/max9860.txt b/Documentation/devicetree/bindings/sound/max9860.txt new file mode 100644 index 000000000000..e98b59a0b5aa --- /dev/null +++ b/Documentation/devicetree/bindings/sound/max9860.txt @@ -0,0 +1,27 @@ +MAX9860 Mono Audio Voice Codec + +Required properties: + + - compatible : "maxim,max9860" + + - reg : the I2C address of the device + + - AVDD-supply and DVDD-supply : power supplies for the + device, as covered in bindings/regulator/regulator.txt + + - clock-names : Required element: "mclk". + + - clocks : A clock specifier for the clock connected as MCLK. + +Examples: + + max9860: max9860@10 { + compatible = "maxim,max9860"; + reg = <0x10>; + + AVDD-supply = <&reg_1v8>; + DVDD-supply = <&reg_1v8>; + + clock-names = "mclk"; + clocks = <&pck2>; + }; diff --git a/MAINTAINERS b/MAINTAINERS index a727d9959ecd..0803396b10f4 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -7000,6 +7000,13 @@ F: Documentation/devicetree/bindings/i2c/max6697.txt F: drivers/hwmon/max6697.c F: include/linux/platform_data/max6697.h +MAX9860 MONO AUDIO VOICE CODEC DRIVER +M: Peter Rosin <peda(a)axentia.se> +L: alsa-devel(a)alsa-project.org (moderated for non-subscribers) +S: Maintained +F: Documentation/devicetree/bindings/sound/max9860.txt +F: sound/soc/codecs/max9860* + MAXIM MUIC CHARGER DRIVERS FOR EXYNOS BASED BOARDS M: Krzysztof Kozlowski <k.kozlowski(a)samsung.com> L: linux-pm(a)vger.kernel.org diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index 7ef3a0c16478..241a23c9aa9f 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -83,6 +83,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_MAX98925 if I2C select SND_SOC_MAX98926 if I2C select SND_SOC_MAX9850 if I2C + select SND_SOC_MAX9860 if I2C select SND_SOC_MAX9768 if I2C select SND_SOC_MAX9877 if I2C select SND_SOC_MC13783 if MFD_MC13XXX @@ -534,6 +535,11 @@ config SND_SOC_MAX98926 config SND_SOC_MAX9850 tristate +config SND_SOC_MAX9860 + tristate "Maxim MAX9860 Mono Audio Voice Codec" + depends on I2C + select REGMAP_I2C + config SND_SOC_PCM1681 tristate "Texas Instruments PCM1681 CODEC" depends on I2C diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index 185a712a7fe7..e435f4df1787 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -78,6 +78,7 @@ snd-soc-max9867-objs := max9867.o snd-soc-max98925-objs := max98925.o snd-soc-max98926-objs := max98926.o snd-soc-max9850-objs := max9850.o +snd-soc-max9860-objs := max9860.o snd-soc-mc13783-objs := mc13783.o snd-soc-ml26124-objs := ml26124.o snd-soc-nau8825-objs := nau8825.o @@ -287,6 +288,7 @@ obj-$(CONFIG_SND_SOC_MAX9867) += snd-soc-max9867.o obj-$(CONFIG_SND_SOC_MAX98925) += snd-soc-max98925.o obj-$(CONFIG_SND_SOC_MAX98926) += snd-soc-max98926.o obj-$(CONFIG_SND_SOC_MAX9850) += snd-soc-max9850.o +obj-$(CONFIG_SND_SOC_MAX9860) += snd-soc-max9860.o obj-$(CONFIG_SND_SOC_MC13783) += snd-soc-mc13783.o obj-$(CONFIG_SND_SOC_ML26124) += snd-soc-ml26124.o obj-$(CONFIG_SND_SOC_NAU8825) += snd-soc-nau8825.o diff --git a/sound/soc/codecs/max9860.c b/sound/soc/codecs/max9860.c new file mode 100644 index 000000000000..d04630042de7 --- /dev/null +++ b/sound/soc/codecs/max9860.c @@ -0,0 +1,722 @@ +/* + * Driver for the MAX9860 Mono Audio Voice Codec + * + * https://datasheets.maximintegrated.com/en/ds/MAX9860.pdf + * + * The driver does not support sidetone since the DVST register field is + * backwards with the mute near the maximum level instead of the minimum. + * + * Author: Peter Rosin <peda(a)axentia.s> + * Copyright 2016 Axentia Technologies + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + */ + +#include <linux/init.h> +#include <linux/module.h> +#include <linux/clk.h> +#include <linux/kernel.h> +#include <linux/pm_runtime.h> +#include <linux/regmap.h> +#include <linux/i2c.h> +#include <linux/regulator/consumer.h> +#include <sound/soc.h> +#include <sound/soc-dapm.h> +#include <sound/pcm_params.h> +#include <sound/tlv.h> + +#include "max9860.h" + +struct max9860_priv { + struct regmap *regmap; + u8 psclk; + unsigned long pclk_rate; + int fmt; +}; + +static const struct reg_default max9860_reg_defaults[] = { + { MAX9860_PWRMAN, 0x00 }, + { MAX9860_INTEN, 0x00 }, + { MAX9860_SYSCLK, 0x00 }, + { MAX9860_AUDIOCLKHIGH, 0x00 }, + { MAX9860_AUDIOCLKLOW, 0x00 }, + { MAX9860_IFC1A, 0x00 }, + { MAX9860_IFC1B, 0x00 }, + { MAX9860_VOICEFLTR, 0x00 }, + { MAX9860_DACATTN, 0x00 }, + { MAX9860_ADCLEVEL, 0x00 }, + { MAX9860_DACGAIN, 0x00 }, + { MAX9860_MICGAIN, 0x00 }, + { MAX9860_MICADC, 0x00 }, + { MAX9860_NOISEGATE, 0x00 }, +}; + +static bool max9860_readable(struct device *dev, unsigned int reg) +{ + switch (reg) { + case MAX9860_INTRSTATUS ... MAX9860_MICGAIN: + case MAX9860_MICADC ... MAX9860_PWRMAN: + case MAX9860_REVISION: + return true; + } + + return false; +} + +static bool max9860_writeable(struct device *dev, unsigned int reg) +{ + switch (reg) { + case MAX9860_INTEN ... MAX9860_MICGAIN: + case MAX9860_MICADC ... MAX9860_PWRMAN: + return true; + } + + return false; +} + +static bool max9860_volatile(struct device *dev, unsigned int reg) +{ + switch (reg) { + case MAX9860_INTRSTATUS: + case MAX9860_MICREADBACK: + return true; + } + + return false; +} + +static bool max9860_precious(struct device *dev, unsigned int reg) +{ + switch (reg) { + case MAX9860_INTRSTATUS: + return true; + } + + return false; +} + +const struct regmap_config max9860_regmap = { + .reg_bits = 8, + .val_bits = 8, + + .readable_reg = max9860_readable, + .writeable_reg = max9860_writeable, + .volatile_reg = max9860_volatile, + .precious_reg = max9860_precious, + + .max_register = MAX9860_MAX_REGISTER, + .reg_defaults = max9860_reg_defaults, + .num_reg_defaults = ARRAY_SIZE(max9860_reg_defaults), + .cache_type = REGCACHE_RBTREE, +}; + +static const DECLARE_TLV_DB_SCALE(dva_tlv, -9100, 100, 1); +static const DECLARE_TLV_DB_SCALE(dvg_tlv, 0, 600, 0); +static const DECLARE_TLV_DB_SCALE(adc_tlv, -1200, 100, 0); +static const DECLARE_TLV_DB_RANGE(pam_tlv, + 0, MAX9860_PAM_MAX - 1, TLV_DB_SCALE_ITEM(-2000, 2000, 1), + MAX9860_PAM_MAX, MAX9860_PAM_MAX, TLV_DB_SCALE_ITEM(3000, 0, 0)); +static const DECLARE_TLV_DB_SCALE(pgam_tlv, 0, 100, 0); +static const DECLARE_TLV_DB_SCALE(anth_tlv, -7600, 400, 1); +static const DECLARE_TLV_DB_SCALE(agcth_tlv, -1800, 100, 0); + +static const char * const agchld_text[] = { + "AGC Disabled", "50ms", "100ms", "400ms" +}; + +static SOC_ENUM_SINGLE_DECL(agchld_enum, MAX9860_MICADC, + MAX9860_AGCHLD_SHIFT, agchld_text); + +static const char * const agcsrc_text[] = { + "Left ADC", "Left/Right ADC" +}; + +static SOC_ENUM_SINGLE_DECL(agcsrc_enum, MAX9860_MICADC, + MAX9860_AGCSRC_SHIFT, agcsrc_text); + +static const char * const agcatk_text[] = { + "3ms", "12ms", "50ms", "200ms" +}; + +static SOC_ENUM_SINGLE_DECL(agcatk_enum, MAX9860_MICADC, + MAX9860_AGCATK_SHIFT, agcatk_text); + +static const char * const agcrls_text[] = { + "78ms", "156ms", "312ms", "625ms", + "1.25s", "2.5s", "5s", "10s" +}; + +static SOC_ENUM_SINGLE_DECL(agcrls_enum, MAX9860_MICADC, + MAX9860_AGCRLS_SHIFT, agcrls_text); + +static const char * const filter_text[] = { + "Disabled", + "Elliptical HP 217Hz notch (16kHz)", + "Butterworth HP 500Hz (16kHz)", + "Elliptical HP 217Hz notch (8kHz)", + "Butterworth HP 500Hz (8kHz)", + "Butterworth HP 200Hz (48kHz)" +}; + +static SOC_ENUM_SINGLE_DECL(avflt_enum, MAX9860_VOICEFLTR, + MAX9860_AVFLT_SHIFT, filter_text); + +static SOC_ENUM_SINGLE_DECL(dvflt_enum, MAX9860_VOICEFLTR, + MAX9860_DVFLT_SHIFT, filter_text); + +static const struct snd_kcontrol_new max9860_controls[] = { +SOC_SINGLE_TLV("Master Playback Volume", MAX9860_DACATTN, + MAX9860_DVA_SHIFT, MAX9860_DVA_MUTE, 1, dva_tlv), +SOC_SINGLE_TLV("DAC Gain Volume", MAX9860_DACGAIN, + MAX9860_DVG_SHIFT, MAX9860_DVG_MAX, 0, dvg_tlv), +SOC_DOUBLE_TLV("Line Capture Volume", MAX9860_ADCLEVEL, + MAX9860_ADCLL_SHIFT, MAX9860_ADCRL_SHIFT, MAX9860_ADCxL_MIN, 1, + adc_tlv), + +SOC_ENUM("AGC Hold Time", agchld_enum), +SOC_ENUM("AGC/Noise Gate Source", agcsrc_enum), +SOC_ENUM("AGC Attack Time", agcatk_enum), +SOC_ENUM("AGC Release Time", agcrls_enum), + +SOC_SINGLE_TLV("Noise Gate Threshold Volume", MAX9860_NOISEGATE, + MAX9860_ANTH_SHIFT, MAX9860_ANTH_MAX, 0, anth_tlv), +SOC_SINGLE_TLV("AGC Signal Threshold Volume", MAX9860_NOISEGATE, + MAX9860_AGCTH_SHIFT, MAX9860_AGCTH_MIN, 1, agcth_tlv), + +SOC_SINGLE_TLV("Mic PGA Volume", MAX9860_MICGAIN, + MAX9860_PGAM_SHIFT, MAX9860_PGAM_MIN, 1, pgam_tlv), +SOC_SINGLE_TLV("Mic Preamp Volume", MAX9860_MICGAIN, + MAX9860_PAM_SHIFT, MAX9860_PAM_MAX, 0, pam_tlv), + +SOC_ENUM("ADC Filter", avflt_enum), +SOC_ENUM("DAC Filter", dvflt_enum), +}; + +static const struct snd_soc_dapm_widget max9860_dapm_widgets[] = { +SND_SOC_DAPM_INPUT("MICL"), +SND_SOC_DAPM_INPUT("MICR"), + +SND_SOC_DAPM_ADC("ADCL", NULL, MAX9860_PWRMAN, MAX9860_ADCLEN_SHIFT, 0), +SND_SOC_DAPM_ADC("ADCR", NULL, MAX9860_PWRMAN, MAX9860_ADCREN_SHIFT, 0), + +SND_SOC_DAPM_AIF_OUT("AIFOUTL", "Capture", 0, SND_SOC_NOPM, 0, 0), +SND_SOC_DAPM_AIF_OUT("AIFOUTR", "Capture", 1, SND_SOC_NOPM, 0, 0), + +SND_SOC_DAPM_AIF_IN("AIFINL", "Playback", 0, SND_SOC_NOPM, 0, 0), +SND_SOC_DAPM_AIF_IN("AIFINR", "Playback", 1, SND_SOC_NOPM, 0, 0), + +SND_SOC_DAPM_DAC("DAC", NULL, MAX9860_PWRMAN, MAX9860_DACEN_SHIFT, 0), + +SND_SOC_DAPM_OUTPUT("OUT"), + +SND_SOC_DAPM_SUPPLY("Supply", SND_SOC_NOPM, 0, 0, + NULL, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), +SND_SOC_DAPM_REGULATOR_SUPPLY("AVDD", 0, 0), +SND_SOC_DAPM_REGULATOR_SUPPLY("DVDD", 0, 0), +SND_SOC_DAPM_CLOCK_SUPPLY("mclk"), +}; + +static const struct snd_soc_dapm_route max9860_dapm_routes[] = { + { "ADCL", NULL, "MICL" }, + { "ADCR", NULL, "MICR" }, + { "AIFOUTL", NULL, "ADCL" }, + { "AIFOUTR", NULL, "ADCR" }, + + { "DAC", NULL, "AIFINL" }, + { "DAC", NULL, "AIFINR" }, + { "OUT", NULL, "DAC" }, + + { "Supply", NULL, "AVDD" }, + { "Supply", NULL, "DVDD" }, + { "Supply", NULL, "mclk" }, + + { "DAC", NULL, "Supply" }, + { "ADCL", NULL, "Supply" }, + { "ADCR", NULL, "Supply" }, +}; + +static int max9860_dai_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct snd_soc_codec *codec = dai->codec; + struct max9860_priv *max9860 = snd_soc_codec_get_drvdata(codec); + + switch (max9860->fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBM_CFM: + case SND_SOC_DAIFMT_CBS_CFS: + return 0; + + default: + return -EINVAL; + } +} + +static int max9860_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct snd_soc_codec *codec = dai->codec; + struct max9860_priv *max9860 = snd_soc_codec_get_drvdata(codec); + u8 master; + u8 ifc1a = 0; + u8 ifc1b = 0; + u8 sysclk = 0; + unsigned long n; + int ret; + + dev_dbg(codec->dev, "hw_params %u Hz, %u channels\n", + params_rate(params), + params_channels(params)); + + if (params_channels(params) == 2) + ifc1b |= MAX9860_ST; + + switch (max9860->fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBS_CFS: + master = 0; + break; + case SND_SOC_DAIFMT_CBM_CFM: + master = MAX9860_MASTER; + break; + default: + return -EINVAL; + } + ifc1a |= master; + + if (master) { + if (params_width(params) * params_channels(params) > 48) + ifc1b |= MAX9860_BSEL_64X; + else + ifc1b |= MAX9860_BSEL_48X; + } + + switch (max9860->fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + ifc1a |= MAX9860_DDLY; + ifc1b |= MAX9860_ADLY; + break; + case SND_SOC_DAIFMT_LEFT_J: + ifc1a |= MAX9860_WCI; + break; + case SND_SOC_DAIFMT_DSP_A: + if (params_width(params) != 16) { + dev_err(codec->dev, + "DSP_A works for 16 bits per sample only.\n"); + return -EINVAL; + } + ifc1a |= MAX9860_DDLY | MAX9860_WCI | MAX9860_HIZ | MAX9860_TDM; + ifc1b |= MAX9860_ADLY; + break; + case SND_SOC_DAIFMT_DSP_B: + if (params_width(params) != 16) { + dev_err(codec->dev, + "DSP_B works for 16 bits per sample only.\n"); + return -EINVAL; + } + ifc1a |= MAX9860_WCI | MAX9860_HIZ | MAX9860_TDM; + break; + default: + return -EINVAL; + } + + switch (max9860->fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + break; + case SND_SOC_DAIFMT_NB_IF: + switch (max9860->fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_DSP_A: + case SND_SOC_DAIFMT_DSP_B: + return -EINVAL; + } + ifc1a ^= MAX9860_WCI; + break; + case SND_SOC_DAIFMT_IB_IF: + switch (max9860->fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_DSP_A: + case SND_SOC_DAIFMT_DSP_B: + return -EINVAL; + } + ifc1a ^= MAX9860_WCI; + /* fall through */ + case SND_SOC_DAIFMT_IB_NF: + ifc1a ^= MAX9860_DBCI; + ifc1b ^= MAX9860_ABCI; + break; + default: + return -EINVAL; + } + + dev_dbg(codec->dev, "IFC1A %02x\n", ifc1a); + ret = regmap_write(max9860->regmap, MAX9860_IFC1A, ifc1a); + if (ret) { + dev_err(codec->dev, "Failed to set IFC1A: %d\n", ret); + return ret; + } + dev_dbg(codec->dev, "IFC1B %02x\n", ifc1b); + ret = regmap_write(max9860->regmap, MAX9860_IFC1B, ifc1b); + if (ret) { + dev_err(codec->dev, "Failed to set IFC1B: %d\n", ret); + return ret; + } + + /* + * Check if Integer Clock Mode is possible, but avoid it in slave mode + * since we then do not know if lrclk is derived from pclk and the + * datasheet mentions that the frequencies have to match exactly in + * order for this to work. + */ + if (params_rate(params) == 8000 || params_rate(params) == 16000) { + if (master) { + switch (max9860->pclk_rate) { + case 12000000: + sysclk = MAX9860_FREQ_12MHZ; + break; + case 13000000: + sysclk = MAX9860_FREQ_13MHZ; + break; + case 19200000: + sysclk = MAX9860_FREQ_19_2MHZ; + break; + } + + if (sysclk && params_rate(params) == 16000) + sysclk |= MAX9860_16KHZ; + } + } + + /* + * Largest possible n: + * 65536 * 96 * 48kHz / 10MHz -> 30199 + * Smallest possible n: + * 65536 * 96 * 8kHz / 20MHz -> 2517 + * Both fit nicely in the available 15 bits, no need to apply any mask. + */ + n = DIV_ROUND_CLOSEST_ULL(65536ULL * 96 * params_rate(params), + max9860->pclk_rate); + + if (!sysclk) { + if (params_rate(params) > 24000) + sysclk |= MAX9860_16KHZ; + + if (!master) + n |= 1; /* trigger rapid pll lock mode */ + } + + sysclk |= max9860->psclk; + dev_dbg(codec->dev, "SYSCLK %02x\n", sysclk); + ret = regmap_write(max9860->regmap, + MAX9860_SYSCLK, sysclk); + if (ret) { + dev_err(codec->dev, "Failed to set SYSCLK: %d\n", ret); + return ret; + } + dev_dbg(codec->dev, "N %lu\n", n); + ret = regmap_write(max9860->regmap, + MAX9860_AUDIOCLKHIGH, n >> 8); + if (ret) { + dev_err(codec->dev, "Failed to set NHI: %d\n", ret); + return ret; + } + ret = regmap_write(max9860->regmap, + MAX9860_AUDIOCLKLOW, n & 0xff); + if (ret) { + dev_err(codec->dev, "Failed to set NLO: %d\n", ret); + return ret; + } + + if (!master) { + dev_dbg(codec->dev, "Enable PLL\n"); + ret = regmap_update_bits(max9860->regmap, MAX9860_AUDIOCLKHIGH, + MAX9860_PLL, MAX9860_PLL); + if (ret) { + dev_err(codec->dev, "Failed to enable PLL: %d\n", ret); + return ret; + } + } + + return 0; +} + +static int max9860_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) +{ + struct snd_soc_codec *codec = dai->codec; + struct max9860_priv *max9860 = snd_soc_codec_get_drvdata(codec); + + max9860->fmt = fmt; + return 0; +} + +static const struct snd_soc_dai_ops max9860_dai_ops = { + .startup = max9860_dai_startup, + .hw_params = max9860_hw_params, + .set_fmt = max9860_set_fmt, +}; + +static struct snd_soc_dai_driver max9860_dai = { + .name = "max9860-hifi", + .playback = { + .stream_name = "Playback", + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_CONTINUOUS, + .rate_min = 8000, + .rate_max = 48000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S24_LE | + SNDRV_PCM_FMTBIT_S32_LE, + }, + .capture = { + .stream_name = "Capture", + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_CONTINUOUS, + .rate_min = 8000, + .rate_max = 48000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S24_LE | + SNDRV_PCM_FMTBIT_S32_LE, + }, + .ops = &max9860_dai_ops, + .symmetric_rates = 1, +}; + +static int max9860_set_bias_level(struct snd_soc_codec *codec, + enum snd_soc_bias_level level) +{ + struct max9860_priv *max9860 = dev_get_drvdata(codec->dev); + int ret; + + switch (level) { + case SND_SOC_BIAS_ON: + case SND_SOC_BIAS_PREPARE: + break; + + case SND_SOC_BIAS_STANDBY: + ret = regmap_update_bits(max9860->regmap, MAX9860_PWRMAN, + MAX9860_SHDN, MAX9860_SHDN); + if (ret) { + dev_err(codec->dev, "Failed to remove SHDN: %d\n", ret); + return ret; + } + break; + + case SND_SOC_BIAS_OFF: + ret = regmap_update_bits(max9860->regmap, MAX9860_PWRMAN, + MAX9860_SHDN, 0); + if (ret) { + dev_err(codec->dev, "Failed to request SHDN: %d\n", + ret); + return ret; + } + break; + } + + return 0; +} + +static struct snd_soc_codec_driver max9860_codec_driver = { + .set_bias_level = max9860_set_bias_level, + .idle_bias_off = true, + + .controls = max9860_controls, + .num_controls = ARRAY_SIZE(max9860_controls), + .dapm_widgets = max9860_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(max9860_dapm_widgets), + .dapm_routes = max9860_dapm_routes, + .num_dapm_routes = ARRAY_SIZE(max9860_dapm_routes), +}; + +#ifdef CONFIG_PM +static int max9860_suspend(struct device *dev) +{ + struct max9860_priv *max9860 = dev_get_drvdata(dev); + int ret; + + ret = regmap_update_bits(max9860->regmap, MAX9860_SYSCLK, + MAX9860_PSCLK, MAX9860_PSCLK_OFF); + if (ret) { + dev_err(dev, "Failed to disable clock: %d\n", ret); + return ret; + } + + return 0; +} + +static int max9860_resume(struct device *dev) +{ + struct max9860_priv *max9860 = dev_get_drvdata(dev); + int ret; + + regcache_cache_only(max9860->regmap, false); + ret = regcache_sync(max9860->regmap); + if (ret) { + dev_err(dev, "Failed to sync cache: %d\n", ret); + return ret; + } + + ret = regmap_update_bits(max9860->regmap, MAX9860_SYSCLK, + MAX9860_PSCLK, max9860->psclk); + if (ret) { + dev_err(dev, "Failed to enable clock: %d\n", ret); + return ret; + } + + return 0; +} +#endif + +const struct dev_pm_ops max9860_pm_ops = { + SET_RUNTIME_PM_OPS(max9860_suspend, max9860_resume, NULL) +}; + +static int max9860_mclk_rate(struct device *dev, unsigned long *mclk_rate) +{ + struct clk *mclk = clk_get(dev, "mclk"); + int ret; + + if (IS_ERR(mclk)) { + ret = PTR_ERR(mclk); + dev_err(dev, "Failed to get MCLK: %d\n", ret); + return ret; + } + + ret = clk_prepare_enable(mclk); + if (ret) { + dev_err(dev, "Failed to enable MCLK: %d\n", ret); + clk_put(mclk); + return ret; + } + + *mclk_rate = clk_get_rate(mclk); + + clk_disable_unprepare(mclk); + clk_put(mclk); + return 0; +} + +static int max9860_probe(struct i2c_client *i2c, + const struct i2c_device_id *id) +{ + struct device *dev = &i2c->dev; + struct max9860_priv *max9860; + int ret; + unsigned long mclk_rate; + int i; + int intr; + + max9860 = devm_kzalloc(dev, sizeof(struct max9860_priv), GFP_KERNEL); + if (!max9860) + return -ENOMEM; + + max9860->regmap = devm_regmap_init_i2c(i2c, &max9860_regmap); + if (IS_ERR(max9860->regmap)) + return PTR_ERR(max9860->regmap); + + dev_set_drvdata(dev, max9860); + + /* + * mclk has to be in the 10MHz to 60MHz range. + * psclk is used to scale mclk into pclk so that + * pclk is in the 10MHz to 20MHz range. + */ + ret = max9860_mclk_rate(dev, &mclk_rate); + if (ret) + return ret; + + if (mclk_rate > 60000000 || mclk_rate < 10000000) { + dev_err(dev, "Bad mclk %luHz (needs 10MHz - 60MHz)\n", + mclk_rate); + return -EINVAL; + } + if (mclk_rate >= 40000000) + max9860->psclk = 3; + else if (mclk_rate >= 20000000) + max9860->psclk = 2; + else + max9860->psclk = 1; + max9860->pclk_rate = mclk_rate >> (max9860->psclk - 1); + max9860->psclk <<= MAX9860_PSCLK_SHIFT; + dev_dbg(dev, "mclk %lu pclk %lu\n", mclk_rate, max9860->pclk_rate); + + regcache_cache_bypass(max9860->regmap, true); + for (i = 0; i < max9860_regmap.num_reg_defaults; ++i) { + ret = regmap_write(max9860->regmap, + max9860_regmap.reg_defaults[i].reg, + max9860_regmap.reg_defaults[i].def); + if (ret) { + dev_err(dev, "Failed to initialize register %u: %d\n", + max9860_regmap.reg_defaults[i].reg, ret); + return ret; + } + } + regcache_cache_bypass(max9860->regmap, false); + + ret = regmap_read(max9860->regmap, MAX9860_INTRSTATUS, &intr); + if (ret) { + dev_err(dev, "Failed to clear INTRSTATUS: %d\n", ret); + return ret; + } + + pm_runtime_set_active(dev); + pm_runtime_enable(dev); + pm_runtime_idle(dev); + + ret = snd_soc_register_codec(dev, &max9860_codec_driver, + &max9860_dai, 1); + if (ret) { + dev_err(dev, "Failed to register CODEC: %d\n", ret); + goto err_pm; + } + + return 0; + +err_pm: + pm_runtime_disable(dev); + return ret; +} +EXPORT_SYMBOL_GPL(max9860_probe); + +static int max9860_remove(struct i2c_client *i2c) +{ + struct device *dev = &i2c->dev; + + snd_soc_unregister_codec(dev); + pm_runtime_disable(dev); + return 0; +} + +static const struct i2c_device_id max9860_i2c_id[] = { + { "max9860", }, + { } +}; +MODULE_DEVICE_TABLE(i2c, max9860_i2c_id); + +static const struct of_device_id max9860_of_match[] = { + { .compatible = "maxim,max9860", }, + { } +}; +MODULE_DEVICE_TABLE(of, max9860_of_match); + +static struct i2c_driver max9860_i2c_driver = { + .probe = max9860_probe, + .remove = max9860_remove, + .id_table = max9860_i2c_id, + .driver = { + .name = "max9860", + .of_match_table = max9860_of_match, + .pm = &max9860_pm_ops, + }, +}; + +module_i2c_driver(max9860_i2c_driver); + +MODULE_DESCRIPTION("ASoC MAX9860 Mono Audio Voice Codec driver"); +MODULE_AUTHOR("Peter Rosin <peda(a)axentia.se>"); +MODULE_LICENSE("GPL v2"); diff --git a/sound/soc/codecs/max9860.h b/sound/soc/codecs/max9860.h new file mode 100644 index 000000000000..22041bd67a7d --- /dev/null +++ b/sound/soc/codecs/max9860.h @@ -0,0 +1,162 @@ +/* + * Driver for the MAX9860 Mono Audio Voice Codec + * + * Author: Peter Rosin <peda(a)axentia.s> + * Copyright 2016 Axentia Technologies + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + */ + +#ifndef _SND_SOC_MAX9860 +#define _SND_SOC_MAX9860 + +#define MAX9860_INTRSTATUS 0x00 +#define MAX9860_MICREADBACK 0x01 +#define MAX9860_INTEN 0x02 +#define MAX9860_SYSCLK 0x03 +#define MAX9860_AUDIOCLKHIGH 0x04 +#define MAX9860_AUDIOCLKLOW 0x05 +#define MAX9860_IFC1A 0x06 +#define MAX9860_IFC1B 0x07 +#define MAX9860_VOICEFLTR 0x08 +#define MAX9860_DACATTN 0x09 +#define MAX9860_ADCLEVEL 0x0a +#define MAX9860_DACGAIN 0x0b +#define MAX9860_MICGAIN 0x0c +#define MAX9860_RESERVED 0x0d +#define MAX9860_MICADC 0x0e +#define MAX9860_NOISEGATE 0x0f +#define MAX9860_PWRMAN 0x10 +#define MAX9860_REVISION 0xff + +#define MAX9860_MAX_REGISTER 0xff + +/* INTRSTATUS */ +#define MAX9860_CLD 0x80 +#define MAX9860_SLD 0x40 +#define MAX9860_ULK 0x20 + +/* MICREADBACK */ +#define MAX9860_NG 0xe0 +#define MAX9860_AGC 0x1f + +/* INTEN */ +#define MAX9860_ICLD 0x80 +#define MAX9860_ISLD 0x40 +#define MAX9860_IULK 0x20 + +/* SYSCLK */ +#define MAX9860_PSCLK 0x30 +#define MAX9860_PSCLK_OFF 0x00 +#define MAX9860_PSCLK_SHIFT 4 +#define MAX9860_FREQ 0x06 +#define MAX9860_FREQ_NORMAL 0x00 +#define MAX9860_FREQ_12MHZ 0x02 +#define MAX9860_FREQ_13MHZ 0x04 +#define MAX9860_FREQ_19_2MHZ 0x06 +#define MAX9860_16KHZ 0x01 + +/* AUDIOCLKHIGH */ +#define MAX9860_PLL 0x80 +#define MAX9860_NHI 0x7f + +/* AUDIOCLKLOW */ +#define MAX9860_NLO 0xff + +/* IFC1A */ +#define MAX9860_MASTER 0x80 +#define MAX9860_WCI 0x40 +#define MAX9860_DBCI 0x20 +#define MAX9860_DDLY 0x10 +#define MAX9860_HIZ 0x08 +#define MAX9860_TDM 0x04 + +/* IFC1B */ +#define MAX9860_ABCI 0x20 +#define MAX9860_ADLY 0x10 +#define MAX9860_ST 0x08 +#define MAX9860_BSEL 0x07 +#define MAX9860_BSEL_OFF 0x00 +#define MAX9860_BSEL_64X 0x01 +#define MAX9860_BSEL_48X 0x02 +#define MAX9860_BSEL_PCLK_2 0x04 +#define MAX9860_BSEL_PCLK_4 0x05 +#define MAX9860_BSEL_PCLK_8 0x06 +#define MAX9860_BSEL_PCLK_16 0x07 + +/* VOICEFLTR */ +#define MAX9860_AVFLT 0xf0 +#define MAX9860_AVFLT_SHIFT 4 +#define MAX9860_AVFLT_COUNT 6 +#define MAX9860_DVFLT 0x0f +#define MAX9860_DVFLT_SHIFT 0 +#define MAX9860_DVFLT_COUNT 6 + +/* DACATTN */ +#define MAX9860_DVA 0xfe +#define MAX9860_DVA_SHIFT 1 +#define MAX9860_DVA_MUTE 0x5e + +/* ADCLEVEL */ +#define MAX9860_ADCRL 0xf0 +#define MAX9860_ADCRL_SHIFT 4 +#define MAX9860_ADCLL 0x0f +#define MAX9860_ADCLL_SHIFT 0 +#define MAX9860_ADCxL_MIN 15 + +/* DACGAIN */ +#define MAX9860_DVG 0x60 +#define MAX9860_DVG_SHIFT 5 +#define MAX9860_DVG_MAX 3 +#define MAX9860_DVST 0x1f +#define MAX9860_DVST_SHIFT 0 +#define MAX9860_DVST_MIN 31 + +/* MICGAIN */ +#define MAX9860_PAM 0x60 +#define MAX9860_PAM_SHIFT 5 +#define MAX9860_PAM_MAX 3 +#define MAX9860_PGAM 0x1f +#define MAX9860_PGAM_SHIFT 0 +#define MAX9860_PGAM_MIN 20 + +/* MICADC */ +#define MAX9860_AGCSRC 0x80 +#define MAX9860_AGCSRC_SHIFT 7 +#define MAX9860_AGCSRC_COUNT 2 +#define MAX9860_AGCRLS 0x70 +#define MAX9860_AGCRLS_SHIFT 4 +#define MAX9860_AGCRLS_COUNT 8 +#define MAX9860_AGCATK 0x0c +#define MAX9860_AGCATK_SHIFT 2 +#define MAX9860_AGCATK_COUNT 4 +#define MAX9860_AGCHLD 0x03 +#define MAX9860_AGCHLD_OFF 0x00 +#define MAX9860_AGCHLD_SHIFT 0 +#define MAX9860_AGCHLD_COUNT 4 + +/* NOISEGATE */ +#define MAX9860_ANTH 0xf0 +#define MAX9860_ANTH_SHIFT 4 +#define MAX9860_ANTH_MAX 15 +#define MAX9860_AGCTH 0x0f +#define MAX9860_AGCTH_SHIFT 0 +#define MAX9860_AGCTH_MIN 15 + +/* PWRMAN */ +#define MAX9860_SHDN 0x80 +#define MAX9860_DACEN 0x08 +#define MAX9860_DACEN_SHIFT 3 +#define MAX9860_ADCLEN 0x02 +#define MAX9860_ADCLEN_SHIFT 1 +#define MAX9860_ADCREN 0x01 +#define MAX9860_ADCREN_SHIFT 0 + +#endif /* _SND_SOC_MAX9860 */ -- 2.1.4

3 11

[alsa-devel] TAS571x input mixer
by Petr Kulhavy 14 May '16

14 May '16

Hi, I'm implementing input mixer controls for the TAS571x amplifier driver. The mixer register values are signed 3.23 fixed-point linear coefficients (i.e. numbers between -8.0 and +7.999), where the default value is 1.0 I would like to represent them as ALSA controls and have a few questions: * The mixing coefficients are signed, i.e. using negative values can invert the signal polarity. Does it make sense to allow negative values at all? * Does it make sense to allow values >1.0 i.e. allow digital amplification of the signal? * What is the usual way of representing linear mixer coefficients in ALSA (most of the codecs use dB though)? Shall I try to convert them to dB? Are there such functions in ALSA? Thanks Petr

1 0

[alsa-devel] Errors iterating over PCM stream hints and opening based on NAME/IOID
by Trent Reed 14 May '16

14 May '16

Hey All, (Tried to send an email earlier, it didn't seem to send?) I'm trying to understand ALSA, having a little trouble with some errors that I can't ration over. Gist Repro: https://gist.github.com/TReed0803/353ce27d37bc1ebe965854ea88c8b97b Whenever I run the above simple code (iterate over PCM stream hints, open for Playback/Capture depending on IOID; output also provided at link above) I notice that I sometimes hit errors. I'm having trouble understanding these errors, because as I understand I'm using the ALSA library correctly. For example, dmix is telling me that it "Only supports playback streams", well then, why does the hint IOID return that it supports capture as well? (same for dsnoop). More confusing are the "ALSA lib pcm_route.c:867:(find_matching_chmap) Found no matching channel map" errors. Can someone help me understand these issues, and perhaps what I'm doing wrong here? Would this point to something wrong with an installed package which perhaps configures these hints incorrectly? (Assuming that is probably the case, but I'd like to know for sure). I'm on a fairly new install of Ubuntu 16.04 LTS. Thanks, - Trent Reed

2 3

[alsa-devel] [PATCH v3 1/2] ASoC: dapm: support user-defined stop condition in dai_get_connected_widgets
by Piotr Stankiewicz 13 May '16

13 May '16

Certain situations may warrant examining DAPM paths only to a certain arbitrary point, as opposed to always following them to the end. For instance, when establishing a connection between a front-end DAI link and a back-end DAI link in a DPCM path, it does not make sense to walk the DAPM graph beyond the first widget associated with a back-end link. This patch introduces a mechanism which lets a user of dai_get_connected_widgets supply a function which will be called for every node during the graph walk. When invoked, this function can execute arbitrary logic to decide whether the walk, given a DAPM widget and walk direction, should be terminated at that point or continued as normal. Signed-off-by: Piotr Stankiewicz <piotrs(a)opensource.wolfsonmicro.com> --- include/sound/soc-dapm.h | 5 +++- sound/soc/soc-dapm.c | 58 +++++++++++++++++++++++++++++++++++----------- sound/soc/soc-pcm.c | 3 ++- 3 files changed, 51 insertions(+), 15 deletions(-) diff --git a/include/sound/soc-dapm.h b/include/sound/soc-dapm.h index 9706946..8eed5c4 100644 --- a/include/sound/soc-dapm.h +++ b/include/sound/soc-dapm.h @@ -357,6 +357,7 @@ struct snd_soc_dapm_context; struct regulator; struct snd_soc_dapm_widget_list; struct snd_soc_dapm_update; +enum snd_soc_dapm_direction; int dapm_regulator_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); @@ -450,7 +451,9 @@ void dapm_mark_endpoints_dirty(struct snd_soc_card *card); /* dapm path query */ int snd_soc_dapm_dai_get_connected_widgets(struct snd_soc_dai *dai, int stream, - struct snd_soc_dapm_widget_list **list); + struct snd_soc_dapm_widget_list **list, + bool (*custom_stop_condition)(struct snd_soc_dapm_widget *, + enum snd_soc_dapm_direction)); struct snd_soc_dapm_context *snd_soc_dapm_kcontrol_dapm( struct snd_kcontrol *kcontrol); diff --git a/sound/soc/soc-dapm.c b/sound/soc/soc-dapm.c index 801ae1a..a6976d5 100644 --- a/sound/soc/soc-dapm.c +++ b/sound/soc/soc-dapm.c @@ -1073,7 +1073,11 @@ static int dapm_widget_list_create(struct snd_soc_dapm_widget_list **list, */ static __always_inline int is_connected_ep(struct snd_soc_dapm_widget *widget, struct list_head *list, enum snd_soc_dapm_direction dir, - int (*fn)(struct snd_soc_dapm_widget *, struct list_head *)) + int (*fn)(struct snd_soc_dapm_widget *, struct list_head *, + bool (*custom_stop_condition)(struct snd_soc_dapm_widget *, + enum snd_soc_dapm_direction)), + bool (*custom_stop_condition)(struct snd_soc_dapm_widget *, + enum snd_soc_dapm_direction)) { enum snd_soc_dapm_direction rdir = SND_SOC_DAPM_DIR_REVERSE(dir); struct snd_soc_dapm_path *path; @@ -1088,6 +1092,9 @@ static __always_inline int is_connected_ep(struct snd_soc_dapm_widget *widget, if (list) list_add_tail(&widget->work_list, list); + if (custom_stop_condition && custom_stop_condition(widget, dir)) + return con; + if ((widget->is_ep & SND_SOC_DAPM_DIR_TO_EP(dir)) && widget->connected) { widget->endpoints[dir] = snd_soc_dapm_suspend_check(widget); return widget->endpoints[dir]; @@ -1106,7 +1113,7 @@ static __always_inline int is_connected_ep(struct snd_soc_dapm_widget *widget, if (path->connect) { path->walking = 1; - con += fn(path->node[dir], list); + con += fn(path->node[dir], list, custom_stop_condition); path->walking = 0; } } @@ -1119,23 +1126,37 @@ static __always_inline int is_connected_ep(struct snd_soc_dapm_widget *widget, /* * Recursively check for a completed path to an active or physically connected * output widget. Returns number of complete paths. + * + * Optionally, can be supplied with a function acting as a stopping condition. + * This function takes the dapm widget currently being examined and the walk + * direction as an arguments, it should return true if the walk should be + * stopped and false otherwise. */ static int is_connected_output_ep(struct snd_soc_dapm_widget *widget, - struct list_head *list) + struct list_head *list, + bool (*custom_stop_condition)(struct snd_soc_dapm_widget *i, + enum snd_soc_dapm_direction)) { return is_connected_ep(widget, list, SND_SOC_DAPM_DIR_OUT, - is_connected_output_ep); + is_connected_output_ep, custom_stop_condition); } /* * Recursively check for a completed path to an active or physically connected * input widget. Returns number of complete paths. + * + * Optionally, can be supplied with a function acting as a stopping condition. + * This function takes the dapm widget currently being examined and the walk + * direction as an arguments, it should return true if the walk should be + * stopped and false otherwise. */ static int is_connected_input_ep(struct snd_soc_dapm_widget *widget, - struct list_head *list) + struct list_head *list, + bool (*custom_stop_condition)(struct snd_soc_dapm_widget *i, + enum snd_soc_dapm_direction)) { return is_connected_ep(widget, list, SND_SOC_DAPM_DIR_IN, - is_connected_input_ep); + is_connected_input_ep, custom_stop_condition); } /** @@ -1143,15 +1164,24 @@ static int is_connected_input_ep(struct snd_soc_dapm_widget *widget, * @dai: the soc DAI. * @stream: stream direction. * @list: list of active widgets for this stream. + * @custom_stop_condition: (optional) a function meant to stop the widget graph + * walk based on custom logic. * * Queries DAPM graph as to whether an valid audio stream path exists for * the initial stream specified by name. This takes into account * current mixer and mux kcontrol settings. Creates list of valid widgets. * + * Optionally, can be supplied with a function acting as a stopping condition. + * This function takes the dapm widget currently being examined and the walk + * direction as an arguments, it should return true if the walk should be + * stopped and false otherwise. + * * Returns the number of valid paths or negative error. */ int snd_soc_dapm_dai_get_connected_widgets(struct snd_soc_dai *dai, int stream, - struct snd_soc_dapm_widget_list **list) + struct snd_soc_dapm_widget_list **list, + bool (*custom_stop_condition)(struct snd_soc_dapm_widget *, + enum snd_soc_dapm_direction)) { struct snd_soc_card *card = dai->component->card; struct snd_soc_dapm_widget *w; @@ -1171,9 +1201,11 @@ int snd_soc_dapm_dai_get_connected_widgets(struct snd_soc_dai *dai, int stream, } if (stream == SNDRV_PCM_STREAM_PLAYBACK) - paths = is_connected_output_ep(dai->playback_widget, &widgets); + paths = is_connected_output_ep(dai->playback_widget, &widgets, + custom_stop_condition); else - paths = is_connected_input_ep(dai->capture_widget, &widgets); + paths = is_connected_input_ep(dai->capture_widget, &widgets, + custom_stop_condition); /* Drop starting point */ list_del(widgets.next); @@ -1268,8 +1300,8 @@ static int dapm_generic_check_power(struct snd_soc_dapm_widget *w) DAPM_UPDATE_STAT(w, power_checks); - in = is_connected_input_ep(w, NULL); - out = is_connected_output_ep(w, NULL); + in = is_connected_input_ep(w, NULL, NULL); + out = is_connected_output_ep(w, NULL, NULL); return out != 0 && in != 0; } @@ -1928,8 +1960,8 @@ static ssize_t dapm_widget_power_read_file(struct file *file, in = 0; out = 0; } else { - in = is_connected_input_ep(w, NULL); - out = is_connected_output_ep(w, NULL); + in = is_connected_input_ep(w, NULL, NULL); + out = is_connected_output_ep(w, NULL, NULL); } ret = snprintf(buf, PAGE_SIZE, "%s: %s%s in %d out %d", diff --git a/sound/soc/soc-pcm.c b/sound/soc/soc-pcm.c index aa99dac..c2b0aa8 100644 --- a/sound/soc/soc-pcm.c +++ b/sound/soc/soc-pcm.c @@ -1294,7 +1294,8 @@ int dpcm_path_get(struct snd_soc_pcm_runtime *fe, int paths; /* get number of valid DAI paths and their widgets */ - paths = snd_soc_dapm_dai_get_connected_widgets(cpu_dai, stream, list); + paths = snd_soc_dapm_dai_get_connected_widgets(cpu_dai, stream, list, + NULL); dev_dbg(fe->dev, "ASoC: found %d audio %s paths\n", paths, stream ? "capture" : "playback"); -- 1.7.10.4

1 1

[alsa-devel] [PATCH v2 1/2] ASoC: dapm: support user-defined stop condition in dai_get_connected_widgets
by Piotr Stankiewicz 13 May '16

13 May '16

Certain situations may warrant examining DAPM paths only to a certain arbitrary point, as opposed to always following them to the end. For instance, when establishing a connection between a front-end DAI link and a back-end DAI link in a DPCM path, it does not make sense to walk the DAPM graph beyond the first widget associated with a back-end link. This patch introduces a mechanism which lets a user of dai_get_connected_widgets supply a function which will be called for every node during the graph walk. When invoked, this function can execute arbitrary logic to decide whether the walk, given a DAPM widget and walk direction, should be terminated at that point or continued as normal. Signed-off-by: Piotr Stankiewicz <piotrs(a)opensource.wolfsonmicro.com> --- include/sound/soc-dapm.h | 5 +++- sound/soc/soc-dapm.c | 68 +++++++++++++++++++++++++++++++++++++--------- sound/soc/soc-pcm.c | 3 +- 3 files changed, 61 insertions(+), 15 deletions(-) diff --git a/include/sound/soc-dapm.h b/include/sound/soc-dapm.h index 9706946..fe5bc93 100644 --- a/include/sound/soc-dapm.h +++ b/include/sound/soc-dapm.h @@ -357,6 +357,7 @@ struct snd_soc_dapm_context; struct regulator; struct snd_soc_dapm_widget_list; struct snd_soc_dapm_update; +enum snd_soc_dapm_direction; int dapm_regulator_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); @@ -450,7 +451,9 @@ void dapm_mark_endpoints_dirty(struct snd_soc_card *card); /* dapm path query */ int snd_soc_dapm_dai_get_connected_widgets(struct snd_soc_dai *dai, int stream, - struct snd_soc_dapm_widget_list **list); + struct snd_soc_dapm_widget_list **list, + int (*custom_stop_condition)(struct snd_soc_dapm_widget *, + enum snd_soc_dapm_direction)); struct snd_soc_dapm_context *snd_soc_dapm_kcontrol_dapm( struct snd_kcontrol *kcontrol); diff --git a/sound/soc/soc-dapm.c b/sound/soc/soc-dapm.c index 801ae1a..075f0d7 100644 --- a/sound/soc/soc-dapm.c +++ b/sound/soc/soc-dapm.c @@ -1073,7 +1073,11 @@ static int dapm_widget_list_create(struct snd_soc_dapm_widget_list **list, */ static __always_inline int is_connected_ep(struct snd_soc_dapm_widget *widget, struct list_head *list, enum snd_soc_dapm_direction dir, - int (*fn)(struct snd_soc_dapm_widget *, struct list_head *)) + int (*fn)(struct snd_soc_dapm_widget *, struct list_head *, + int (*custom_stop_condition)(struct snd_soc_dapm_widget *, + enum snd_soc_dapm_direction)), + int (*custom_stop_condition)(struct snd_soc_dapm_widget *, + enum snd_soc_dapm_direction)) { enum snd_soc_dapm_direction rdir = SND_SOC_DAPM_DIR_REVERSE(dir); struct snd_soc_dapm_path *path; @@ -1088,6 +1092,13 @@ static __always_inline int is_connected_ep(struct snd_soc_dapm_widget *widget, if (list) list_add_tail(&widget->work_list, list); + if (custom_stop_condition) { + con = custom_stop_condition(widget, dir); + if (con >= 0) + return con; + con = 0; + } + if ((widget->is_ep & SND_SOC_DAPM_DIR_TO_EP(dir)) && widget->connected) { widget->endpoints[dir] = snd_soc_dapm_suspend_check(widget); return widget->endpoints[dir]; @@ -1106,7 +1117,7 @@ static __always_inline int is_connected_ep(struct snd_soc_dapm_widget *widget, if (path->connect) { path->walking = 1; - con += fn(path->node[dir], list); + con += fn(path->node[dir], list, custom_stop_condition); path->walking = 0; } } @@ -1119,23 +1130,41 @@ static __always_inline int is_connected_ep(struct snd_soc_dapm_widget *widget, /* * Recursively check for a completed path to an active or physically connected * output widget. Returns number of complete paths. + * + * Optionally, can be supplied with a function acting as a stopping condition. + * This function takes the dapm widget currently being examined and the walk + * direction as an arguments, and should return an integer, as follows: + * - >=0: if the walk is to be stopped (this should indicate the number of + * endpoints the widget has), + * - <0 : if the walk is to be continued as normal. */ static int is_connected_output_ep(struct snd_soc_dapm_widget *widget, - struct list_head *list) + struct list_head *list, + int (*custom_stop_condition)(struct snd_soc_dapm_widget *i, + enum snd_soc_dapm_direction)) { return is_connected_ep(widget, list, SND_SOC_DAPM_DIR_OUT, - is_connected_output_ep); + is_connected_output_ep, custom_stop_condition); } /* * Recursively check for a completed path to an active or physically connected * input widget. Returns number of complete paths. + * + * Optionally, can be supplied with a function acting as a stopping condition. + * This function takes the dapm widget currently being examined and the walk + * direction as an arguments, and should return an integer, as follows: + * - >=0: if the walk is to be stopped (this should indicate the number of + * endpoints the widget has), + * - <0 : if the walk is to be continued as normal. */ static int is_connected_input_ep(struct snd_soc_dapm_widget *widget, - struct list_head *list) + struct list_head *list, + int (*custom_stop_condition)(struct snd_soc_dapm_widget *i, + enum snd_soc_dapm_direction)) { return is_connected_ep(widget, list, SND_SOC_DAPM_DIR_IN, - is_connected_input_ep); + is_connected_input_ep, custom_stop_condition); } /** @@ -1143,15 +1172,26 @@ static int is_connected_input_ep(struct snd_soc_dapm_widget *widget, * @dai: the soc DAI. * @stream: stream direction. * @list: list of active widgets for this stream. + * @custom_stop_condition: (optional) a function meant to stop the widget graph + * walk based on custom logic. * * Queries DAPM graph as to whether an valid audio stream path exists for * the initial stream specified by name. This takes into account * current mixer and mux kcontrol settings. Creates list of valid widgets. * + * Optionally, can be supplied with a function acting as a stopping condition. + * This function takes the dapm widget currently being examined and the walk + * direction as an arguments, and should return an integer, as follows: + * - >=0: if the walk is to be stopped (this should indicate the number of + * endpoints the widget has), + * - <0 : if the walk is to be continued as normal. + * * Returns the number of valid paths or negative error. */ int snd_soc_dapm_dai_get_connected_widgets(struct snd_soc_dai *dai, int stream, - struct snd_soc_dapm_widget_list **list) + struct snd_soc_dapm_widget_list **list, + int (*custom_stop_condition)(struct snd_soc_dapm_widget *, + enum snd_soc_dapm_direction)) { struct snd_soc_card *card = dai->component->card; struct snd_soc_dapm_widget *w; @@ -1171,9 +1211,11 @@ int snd_soc_dapm_dai_get_connected_widgets(struct snd_soc_dai *dai, int stream, } if (stream == SNDRV_PCM_STREAM_PLAYBACK) - paths = is_connected_output_ep(dai->playback_widget, &widgets); + paths = is_connected_output_ep(dai->playback_widget, &widgets, + custom_stop_condition); else - paths = is_connected_input_ep(dai->capture_widget, &widgets); + paths = is_connected_input_ep(dai->capture_widget, &widgets, + custom_stop_condition); /* Drop starting point */ list_del(widgets.next); @@ -1268,8 +1310,8 @@ static int dapm_generic_check_power(struct snd_soc_dapm_widget *w) DAPM_UPDATE_STAT(w, power_checks); - in = is_connected_input_ep(w, NULL); - out = is_connected_output_ep(w, NULL); + in = is_connected_input_ep(w, NULL, NULL); + out = is_connected_output_ep(w, NULL, NULL); return out != 0 && in != 0; } @@ -1928,8 +1970,8 @@ static ssize_t dapm_widget_power_read_file(struct file *file, in = 0; out = 0; } else { - in = is_connected_input_ep(w, NULL); - out = is_connected_output_ep(w, NULL); + in = is_connected_input_ep(w, NULL, NULL); + out = is_connected_output_ep(w, NULL, NULL); } ret = snprintf(buf, PAGE_SIZE, "%s: %s%s in %d out %d", diff --git a/sound/soc/soc-pcm.c b/sound/soc/soc-pcm.c index aa99dac..c2b0aa8 100644 --- a/sound/soc/soc-pcm.c +++ b/sound/soc/soc-pcm.c @@ -1294,7 +1294,8 @@ int dpcm_path_get(struct snd_soc_pcm_runtime *fe, int paths; /* get number of valid DAI paths and their widgets */ - paths = snd_soc_dapm_dai_get_connected_widgets(cpu_dai, stream, list); + paths = snd_soc_dapm_dai_get_connected_widgets(cpu_dai, stream, list, + NULL); dev_dbg(fe->dev, "ASoC: found %d audio %s paths\n", paths, stream ? "capture" : "playback"); -- 1.7.10.4

2 5

[alsa-devel] [PATCH v3 0/2] ASoC: codecs: add support for TAS5720 digital amplifier
by Andreas Dannenberg 13 May '16

13 May '16

Updated driver for TI's TAS5720L/M digital audio amplifiers incorporating previous feedback (thanks Mark Brown). Biggest change is that the driver is no longer using interrupts for codec fault reporting, but instead uses a polling-based approach to check for (and clear) codec fault conditions every 200ms. This is much more graceful and actually lower overhead than trying to keep the actual TAS5720 fault interrupts (that come in every 300us!) under control which is what v2 of the driver was doing. Because of the removal of interrupts the DT doc had to be updated as well, so I did not carry forward Rob Herring's earlier Acked-by because of said change. -- Andreas Dannenberg Texas Instruments Inc Changes since v2: - Switched fault handling from using interrupts to polling mode - Remove interrupt related description from DT bindings doc - Remove unlikely() to simplify an expression - Remove unnesseary tas5720_set_dai_sysclk() function stub Changes since v1: - Simplified DT interrupt documentation (Thanks Rob Herring) - Fixed potential race condition during codec probe where deferred work that's used by the threaded IRQ handler was setup after the IRQ was initialized (would lead to an issue when the TAS5720 was already throwing interrupts at the time of probe) Andreas Dannenberg (2): ASoC: codecs: add TA5720 digital amplifier DT bindings ASoC: codecs: add support for TAS5720 digital amplifier .../devicetree/bindings/sound/tas5720.txt | 26 + sound/soc/codecs/Kconfig | 10 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/tas5720.c | 638 +++++++++++++++++++++ sound/soc/codecs/tas5720.h | 90 +++ 5 files changed, 766 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/tas5720.txt create mode 100644 sound/soc/codecs/tas5720.c create mode 100644 sound/soc/codecs/tas5720.h -- 2.6.4

3 14

[alsa-devel] [PATCH] ASoC: rt5668: add rt5668 codec driver
by John Lin 13 May '16

13 May '16

This is the initial codec driver for rt5668. Signed-off-by: John Lin <john.lin(a)realtek.com> --- Documentation/devicetree/bindings/sound/rt5668.txt | 28 + sound/soc/codecs/Kconfig | 6 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/rt5668.c | 3280 ++++++++++++++++++++ sound/soc/codecs/rt5668.h | 781 +++++ 5 files changed, 4097 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/rt5668.txt create mode 100644 sound/soc/codecs/rt5668.c create mode 100644 sound/soc/codecs/rt5668.h diff --git a/Documentation/devicetree/bindings/sound/rt5668.txt b/Documentation/devicetree/bindings/sound/rt5668.txt new file mode 100644 index 0000000..50d7759 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/rt5668.txt @@ -0,0 +1,28 @@ +RT5668/RT5663 audio CODECs + +These devices support I2C only. + +Required properties: + +- compatible : "realtek,rt5668" or "realtek,rt5663" + +- reg : The I2C address of the device. + +- interrupts : The CODEC's interrupt output. + +Pins on the device (for linking into audio routes) for RT5668/RT5663: + + * IN1P + * IN1N + * IN2P + * IN2N + * HPOL + * HPOR + +Example: + +codec: rt5668@1a { + compatible = "realtek,rt5668"; + reg = <0x1a>; + interrupts = <347>; +}; diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index ac7317e..283c4bd 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -107,6 +107,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_RT5645 if I2C select SND_SOC_RT5651 if I2C select SND_SOC_RT5659 if I2C + select SND_SOC_RT5668 if I2C select SND_SOC_RT5670 if I2C select SND_SOC_RT5677 if I2C && SPI_MASTER select SND_SOC_SGTL5000 if I2C @@ -610,6 +611,7 @@ config SND_SOC_RL6231 default y if SND_SOC_RT5645=y default y if SND_SOC_RT5651=y default y if SND_SOC_RT5659=y + default y if SND_SOC_RT5668=y default y if SND_SOC_RT5670=y default y if SND_SOC_RT5677=y default m if SND_SOC_RT5514=m @@ -618,6 +620,7 @@ config SND_SOC_RL6231 default m if SND_SOC_RT5645=m default m if SND_SOC_RT5651=m default m if SND_SOC_RT5659=m + default m if SND_SOC_RT5668=m default m if SND_SOC_RT5670=m default m if SND_SOC_RT5677=m @@ -660,6 +663,9 @@ config SND_SOC_RT5651 config SND_SOC_RT5659 tristate +config SND_SOC_RT5668 + tristate + config SND_SOC_RT5670 tristate diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index 94873ee..88b16d9 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -105,6 +105,7 @@ snd-soc-rt5640-objs := rt5640.o snd-soc-rt5645-objs := rt5645.o snd-soc-rt5651-objs := rt5651.o snd-soc-rt5659-objs := rt5659.o +snd-soc-rt5668-objs := rt5668.o snd-soc-rt5670-objs := rt5670.o snd-soc-rt5677-objs := rt5677.o snd-soc-rt5677-spi-objs := rt5677-spi.o @@ -318,6 +319,7 @@ obj-$(CONFIG_SND_SOC_RT5640) += snd-soc-rt5640.o obj-$(CONFIG_SND_SOC_RT5645) += snd-soc-rt5645.o obj-$(CONFIG_SND_SOC_RT5651) += snd-soc-rt5651.o obj-$(CONFIG_SND_SOC_RT5659) += snd-soc-rt5659.o +obj-$(CONFIG_SND_SOC_RT5668) += snd-soc-rt5668.o obj-$(CONFIG_SND_SOC_RT5670) += snd-soc-rt5670.o obj-$(CONFIG_SND_SOC_RT5677) += snd-soc-rt5677.o obj-$(CONFIG_SND_SOC_RT5677_SPI) += snd-soc-rt5677-spi.o diff --git a/sound/soc/codecs/rt5668.c b/sound/soc/codecs/rt5668.c new file mode 100644 index 0000000..271fd01 --- /dev/null +++ b/sound/soc/codecs/rt5668.c @@ -0,0 +1,3280 @@ +/* + * rt5668.c -- RT5668/RT5663 ALSA SoC audio codec driver + * + * Copyright 2016 Realtek Semiconductor Corp. + * Author: John Lin <john.lin(a)realtek.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include <linux/module.h> +#include <linux/moduleparam.h> +#include <linux/init.h> +#include <linux/delay.h> +#include <linux/pm.h> +#include <linux/i2c.h> +#include <linux/platform_device.h> +#include <linux/spi/spi.h> +#include <linux/acpi.h> +#include <linux/workqueue.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/jack.h> +#include <sound/soc.h> +#include <sound/soc-dapm.h> +#include <sound/initval.h> +#include <sound/tlv.h> + +#include "rt5668.h" +#include "rl6231.h" + +#define RT5668_DEVICE_ID 0x6451 +#define RT5663_DEVICE_ID 0x6406 + +enum { + CODEC_TYPE_RT5668, + CODEC_TYPE_RT5663, +}; + +struct rt5668_priv { + struct snd_soc_codec *codec; + struct regmap *regmap; + struct delayed_work jack_detect_work; + struct snd_soc_jack *hs_jack; + struct timer_list btn_check_timer; + + int codec_type; + int sysclk; + int sysclk_src; + int lrck; + + int pll_src; + int pll_in; + int pll_out; + + int jack_type; +}; + +static const struct reg_default rt5668_reg[] = { + { 0x0000, 0x0000 }, + { 0x0001, 0xc8c8 }, + { 0x0002, 0x8080 }, + { 0x0003, 0x8000 }, + { 0x0004, 0xc80a }, + { 0x0005, 0x0000 }, + { 0x0006, 0x0000 }, + { 0x0007, 0x0000 }, + { 0x000a, 0x0000 }, + { 0x000b, 0x0000 }, + { 0x000c, 0x0000 }, + { 0x000d, 0x0000 }, + { 0x000f, 0x0808 }, + { 0x0010, 0x4000 }, + { 0x0011, 0x0000 }, + { 0x0012, 0x1404 }, + { 0x0013, 0x1000 }, + { 0x0014, 0xa00a }, + { 0x0015, 0x0404 }, + { 0x0016, 0x0404 }, + { 0x0017, 0x0011 }, + { 0x0018, 0xafaf }, + { 0x0019, 0xafaf }, + { 0x001a, 0xafaf }, + { 0x001b, 0x0011 }, + { 0x001c, 0x2f2f }, + { 0x001d, 0x2f2f }, + { 0x001e, 0x2f2f }, + { 0x001f, 0x0000 }, + { 0x0020, 0x0000 }, + { 0x0021, 0x0000 }, + { 0x0022, 0x5757 }, + { 0x0023, 0x0039 }, + { 0x0024, 0x000b }, + { 0x0026, 0xc0c0 }, + { 0x0027, 0xc0c0 }, + { 0x0028, 0xc0c0 }, + { 0x0029, 0x8080 }, + { 0x002a, 0xaaaa }, + { 0x002b, 0xaaaa }, + { 0x002c, 0xaba8 }, + { 0x002d, 0x0000 }, + { 0x002e, 0x0000 }, + { 0x002f, 0x0000 }, + { 0x0030, 0x0000 }, + { 0x0031, 0x5000 }, + { 0x0032, 0x0000 }, + { 0x0033, 0x0000 }, + { 0x0034, 0x0000 }, + { 0x0035, 0x0000 }, + { 0x003a, 0x0000 }, + { 0x003b, 0x0000 }, + { 0x003c, 0x00ff }, + { 0x003d, 0x0000 }, + { 0x003e, 0x00ff }, + { 0x003f, 0x0000 }, + { 0x0040, 0x0000 }, + { 0x0041, 0x00ff }, + { 0x0042, 0x0000 }, + { 0x0043, 0x00ff }, + { 0x0044, 0x0c0c }, + { 0x0049, 0xc00b }, + { 0x004a, 0x0000 }, + { 0x004b, 0x031f }, + { 0x004d, 0x0000 }, + { 0x004e, 0x001f }, + { 0x004f, 0x0000 }, + { 0x0050, 0x001f }, + { 0x0052, 0xf000 }, + { 0x0061, 0x0000 }, + { 0x0062, 0x0000 }, + { 0x0063, 0x003e }, + { 0x0064, 0x0000 }, + { 0x0065, 0x0000 }, + { 0x0066, 0x003f }, + { 0x0067, 0x0000 }, + { 0x006b, 0x0000 }, + { 0x006d, 0xff00 }, + { 0x006e, 0x2808 }, + { 0x006f, 0x000a }, + { 0x0070, 0x8000 }, + { 0x0071, 0x8000 }, + { 0x0072, 0x8000 }, + { 0x0073, 0x7000 }, + { 0x0074, 0x7770 }, + { 0x0075, 0x0002 }, + { 0x0076, 0x0001 }, + { 0x0078, 0x00f0 }, + { 0x0079, 0x0000 }, + { 0x007a, 0x0000 }, + { 0x007b, 0x0000 }, + { 0x007c, 0x0000 }, + { 0x007d, 0x0123 }, + { 0x007e, 0x4500 }, + { 0x007f, 0x8003 }, + { 0x0080, 0x0000 }, + { 0x0081, 0x0000 }, + { 0x0082, 0x0000 }, + { 0x0083, 0x0000 }, + { 0x0084, 0x0000 }, + { 0x0085, 0x0000 }, + { 0x0086, 0x0008 }, + { 0x0087, 0x0000 }, + { 0x0088, 0x0000 }, + { 0x0089, 0x0000 }, + { 0x008a, 0x0000 }, + { 0x008b, 0x0000 }, + { 0x008c, 0x0003 }, + { 0x008e, 0x0060 }, + { 0x008f, 0x1000 }, + { 0x0091, 0x0c26 }, + { 0x0092, 0x0073 }, + { 0x0093, 0x0000 }, + { 0x0094, 0x0080 }, + { 0x0098, 0x0000 }, + { 0x0099, 0x0000 }, + { 0x009a, 0x0007 }, + { 0x009f, 0x0000 }, + { 0x00a0, 0x0000 }, + { 0x00a1, 0x0002 }, + { 0x00a2, 0x0001 }, + { 0x00a3, 0x0002 }, + { 0x00a4, 0x0001 }, + { 0x00ae, 0x2040 }, + { 0x00af, 0x0000 }, + { 0x00b6, 0x0000 }, + { 0x00b7, 0x0000 }, + { 0x00b8, 0x0000 }, + { 0x00b9, 0x0000 }, + { 0x00ba, 0x0002 }, + { 0x00bb, 0x0000 }, + { 0x00be, 0x0000 }, + { 0x00c0, 0x0000 }, + { 0x00c1, 0x0aaa }, + { 0x00c2, 0xaa80 }, + { 0x00c3, 0x0003 }, + { 0x00c4, 0x0000 }, + { 0x00d0, 0x0000 }, + { 0x00d1, 0x2244 }, + { 0x00d2, 0x0000 }, + { 0x00d3, 0x3300 }, + { 0x00d4, 0x2200 }, + { 0x00d9, 0x0809 }, + { 0x00da, 0x0000 }, + { 0x00db, 0x0008 }, + { 0x00dc, 0x00c0 }, + { 0x00dd, 0x6724 }, + { 0x00de, 0x3131 }, + { 0x00df, 0x0008 }, + { 0x00e0, 0x4000 }, + { 0x00e1, 0x3131 }, + { 0x00e2, 0x600c }, + { 0x00ea, 0xb320 }, + { 0x00eb, 0x0000 }, + { 0x00ec, 0xb300 }, + { 0x00ed, 0x0000 }, + { 0x00ee, 0xb320 }, + { 0x00ef, 0x0000 }, + { 0x00f0, 0x0201 }, + { 0x00f1, 0x0ddd }, + { 0x00f2, 0x0ddd }, + { 0x00f6, 0x0000 }, + { 0x00f7, 0x0000 }, + { 0x00f8, 0x0000 }, + { 0x00fa, 0x0000 }, + { 0x00fb, 0x0000 }, + { 0x00fc, 0x0000 }, + { 0x00fd, 0x0000 }, + { 0x00fe, 0x10ec }, + { 0x00ff, 0x6451 }, + { 0x0100, 0xaaaa }, + { 0x0101, 0x000a }, + { 0x010a, 0xaaaa }, + { 0x010b, 0xa0a0 }, + { 0x010c, 0xaeae }, + { 0x010d, 0xaaaa }, + { 0x010e, 0xaaaa }, + { 0x010f, 0xaaaa }, + { 0x0110, 0xe002 }, + { 0x0111, 0xa602 }, + { 0x0112, 0xaaaa }, + { 0x0113, 0x2000 }, + { 0x0117, 0x0f00 }, + { 0x0125, 0x0420 }, + { 0x0132, 0x0000 }, + { 0x0133, 0x0000 }, + { 0x0136, 0x5555 }, + { 0x0137, 0x5540 }, + { 0x0138, 0x3700 }, + { 0x0139, 0x79a1 }, + { 0x013a, 0x2020 }, + { 0x013b, 0x2020 }, + { 0x013c, 0x2005 }, + { 0x013f, 0x0000 }, + { 0x0145, 0x0002 }, + { 0x0146, 0x0000 }, + { 0x0147, 0x0000 }, + { 0x0148, 0x0000 }, + { 0x0160, 0x4ec0 }, + { 0x0161, 0x0080 }, + { 0x0162, 0x0200 }, + { 0x0163, 0x0800 }, + { 0x0164, 0x0000 }, + { 0x0165, 0x0000 }, + { 0x0166, 0x0000 }, + { 0x0167, 0x000f }, + { 0x0168, 0x000f }, + { 0x0170, 0x4e80 }, + { 0x0171, 0x0080 }, + { 0x0172, 0x0200 }, + { 0x0173, 0x0800 }, + { 0x0174, 0x00ff }, + { 0x0175, 0x0000 }, + { 0x0190, 0x4131 }, + { 0x0191, 0x4131 }, + { 0x0192, 0x4131 }, + { 0x0193, 0x4131 }, + { 0x0194, 0x0000 }, + { 0x0195, 0x0000 }, + { 0x0196, 0x0000 }, + { 0x0197, 0x0000 }, + { 0x0198, 0x0000 }, + { 0x0199, 0x0000 }, + { 0x01a0, 0x1e64 }, + { 0x01a1, 0x06a3 }, + { 0x01a2, 0x0000 }, + { 0x01a3, 0x0000 }, + { 0x01a4, 0x0000 }, + { 0x01a5, 0x0000 }, + { 0x01a6, 0x0000 }, + { 0x01a7, 0x0000 }, + { 0x01a8, 0x0000 }, + { 0x01a9, 0x0000 }, + { 0x01aa, 0x0000 }, + { 0x01ab, 0x0000 }, + { 0x01b5, 0x0000 }, + { 0x01b6, 0x01c3 }, + { 0x01b7, 0x02a0 }, + { 0x01b8, 0x03e9 }, + { 0x01b9, 0x1389 }, + { 0x01ba, 0xc351 }, + { 0x01bb, 0x0009 }, + { 0x01bc, 0x0018 }, + { 0x01bd, 0x002a }, + { 0x01be, 0x004c }, + { 0x01bf, 0x0097 }, + { 0x01c0, 0x433d }, + { 0x01c1, 0x0000 }, + { 0x01c2, 0x0000 }, + { 0x01c3, 0x0000 }, + { 0x01c4, 0x0000 }, + { 0x01c5, 0x0000 }, + { 0x01c6, 0x0000 }, + { 0x01c7, 0x0000 }, + { 0x01c8, 0x40af }, + { 0x01c9, 0x0702 }, + { 0x01ca, 0x0000 }, + { 0x01cb, 0x0000 }, + { 0x01cc, 0x5757 }, + { 0x01cd, 0x5757 }, + { 0x01ce, 0x5757 }, + { 0x01cf, 0x5757 }, + { 0x01d0, 0x5757 }, + { 0x01d1, 0x5757 }, + { 0x01d2, 0x5757 }, + { 0x01d3, 0x5757 }, + { 0x01d4, 0x5757 }, + { 0x01d5, 0x5757 }, + { 0x01d6, 0x003c }, + { 0x01da, 0x0000 }, + { 0x01db, 0x0000 }, + { 0x01dc, 0x0000 }, + { 0x01de, 0x7c00 }, + { 0x01df, 0x0320 }, + { 0x01e0, 0x06a1 }, + { 0x01e1, 0x0000 }, + { 0x01e2, 0x0000 }, + { 0x01e3, 0x0000 }, + { 0x01e4, 0x0000 }, + { 0x01e5, 0x0000 }, + { 0x01e6, 0x0001 }, + { 0x01e7, 0x0000 }, + { 0x01e8, 0x0000 }, + { 0x01ea, 0x0000 }, + { 0x01eb, 0x0000 }, + { 0x01ec, 0x0000 }, + { 0x01ed, 0x0000 }, + { 0x01ee, 0x0000 }, + { 0x01ef, 0x0000 }, + { 0x01f0, 0x0000 }, + { 0x01f1, 0x0000 }, + { 0x01f2, 0x0000 }, + { 0x01f3, 0x0000 }, + { 0x01f4, 0x0000 }, + { 0x0200, 0x0000 }, + { 0x0201, 0x0000 }, + { 0x0202, 0x0000 }, + { 0x0203, 0x0000 }, + { 0x0204, 0x0000 }, + { 0x0205, 0x0000 }, + { 0x0206, 0x0000 }, + { 0x0207, 0x0000 }, + { 0x0208, 0x0000 }, + { 0x0210, 0x60b1 }, + { 0x0211, 0xa000 }, + { 0x0212, 0x024c }, + { 0x0213, 0xf7ff }, + { 0x0214, 0x024c }, + { 0x0215, 0x0102 }, + { 0x0216, 0x00a3 }, + { 0x0217, 0x0048 }, + { 0x0218, 0x92c0 }, + { 0x0219, 0x0000 }, + { 0x021a, 0x00c8 }, + { 0x021b, 0x0020 }, + { 0x02fa, 0x0000 }, + { 0x02fb, 0x0000 }, + { 0x02fc, 0x0000 }, + { 0x02ff, 0x0110 }, + { 0x0300, 0x001f }, + { 0x0301, 0x032c }, + { 0x0302, 0x5f21 }, + { 0x0303, 0x4000 }, + { 0x0304, 0x4000 }, + { 0x0305, 0x06d5 }, + { 0x0306, 0x8000 }, + { 0x0307, 0x0700 }, + { 0x0310, 0x4560 }, + { 0x0311, 0xa4a8 }, + { 0x0312, 0x7418 }, + { 0x0313, 0x0000 }, + { 0x0314, 0x0006 }, + { 0x0315, 0xffff }, + { 0x0316, 0xc400 }, + { 0x0317, 0x0000 }, + { 0x0330, 0x00a6 }, + { 0x0331, 0x04c3 }, + { 0x0332, 0x27c8 }, + { 0x0333, 0xbf50 }, + { 0x0334, 0x0045 }, + { 0x0335, 0x0007 }, + { 0x0336, 0x7418 }, + { 0x0337, 0x0501 }, + { 0x0338, 0x0000 }, + { 0x0339, 0x0010 }, + { 0x033a, 0x1010 }, + { 0x03c0, 0x7e00 }, + { 0x03c1, 0x8000 }, + { 0x03c2, 0x8000 }, + { 0x03c3, 0x8000 }, + { 0x03c4, 0x8000 }, + { 0x03c5, 0x8000 }, + { 0x03c6, 0x8000 }, + { 0x03c7, 0x8000 }, + { 0x03c8, 0x8000 }, + { 0x03c9, 0x8000 }, + { 0x03ca, 0x8000 }, + { 0x03cb, 0x8000 }, + { 0x03cc, 0x8000 }, + { 0x03d0, 0x0000 }, + { 0x03d1, 0x0000 }, + { 0x03d2, 0x0000 }, + { 0x03d3, 0x0000 }, + { 0x03d4, 0x2000 }, + { 0x03d5, 0x2000 }, + { 0x03d6, 0x0000 }, + { 0x03d7, 0x0000 }, + { 0x03d8, 0x2000 }, + { 0x03d9, 0x2000 }, + { 0x03da, 0x2000 }, + { 0x03db, 0x2000 }, + { 0x03dc, 0x0000 }, + { 0x03dd, 0x0000 }, + { 0x03de, 0x0000 }, + { 0x03df, 0x2000 }, + { 0x03e0, 0x0000 }, + { 0x03e1, 0x0000 }, + { 0x03e2, 0x0000 }, + { 0x03e3, 0x0000 }, + { 0x03e4, 0x0000 }, + { 0x03e5, 0x0000 }, + { 0x03e6, 0x0000 }, + { 0x03e7, 0x0000 }, + { 0x03e8, 0x0000 }, + { 0x03e9, 0x0000 }, + { 0x03ea, 0x0000 }, + { 0x03eb, 0x0000 }, + { 0x03ec, 0x0000 }, + { 0x03ed, 0x0000 }, + { 0x03ee, 0x0000 }, + { 0x03ef, 0x0000 }, + { 0x03f0, 0x0800 }, + { 0x03f1, 0x0800 }, + { 0x03f2, 0x0800 }, + { 0x03f3, 0x0800 }, + { 0x03fe, 0x0000 }, + { 0x03ff, 0x0000 }, + { 0x07f0, 0x0000 }, + { 0x07fa, 0x0000 }, +}; + +static const struct reg_default rt5663_reg[] = { + { 0x0000, 0x0000 }, + { 0x0002, 0x0008 }, + { 0x0005, 0x1000 }, + { 0x0006, 0x1000 }, + { 0x000a, 0x0000 }, + { 0x0010, 0x000f }, + { 0x0015, 0x42c1 }, + { 0x0016, 0x0000 }, + { 0x0018, 0x000b }, + { 0x0019, 0xafaf }, + { 0x001c, 0x2f2f }, + { 0x001f, 0x0000 }, + { 0x0022, 0x5757 }, + { 0x0023, 0x0039 }, + { 0x0026, 0xc0c0 }, + { 0x0029, 0x8080 }, + { 0x002a, 0xa0a0 }, + { 0x002c, 0x000c }, + { 0x002d, 0x0000 }, + { 0x0040, 0x0808 }, + { 0x0061, 0x0000 }, + { 0x0062, 0x0000 }, + { 0x0063, 0x003e }, + { 0x0064, 0x0000 }, + { 0x0065, 0x0000 }, + { 0x0066, 0x0000 }, + { 0x006b, 0x0000 }, + { 0x006e, 0x0000 }, + { 0x006f, 0x0000 }, + { 0x0070, 0x8020 }, + { 0x0073, 0x1000 }, + { 0x0074, 0xe400 }, + { 0x0075, 0x0002 }, + { 0x0076, 0x0001 }, + { 0x0077, 0x00f0 }, + { 0x0078, 0x0000 }, + { 0x0079, 0x0000 }, + { 0x007a, 0x0123 }, + { 0x007b, 0x8003 }, + { 0x0080, 0x0000 }, + { 0x0081, 0x0000 }, + { 0x0082, 0x0000 }, + { 0x0083, 0x0000 }, + { 0x0084, 0x0000 }, + { 0x0086, 0x0008 }, + { 0x0087, 0x0000 }, + { 0x008a, 0x0000 }, + { 0x008b, 0x0000 }, + { 0x008c, 0x0003 }, + { 0x008e, 0x0004 }, + { 0x008f, 0x1000 }, + { 0x0090, 0x0646 }, + { 0x0091, 0x0e3e }, + { 0x0092, 0x1071 }, + { 0x0093, 0x0000 }, + { 0x0094, 0x0080 }, + { 0x0097, 0x0000 }, + { 0x0098, 0x0000 }, + { 0x009a, 0x0000 }, + { 0x009f, 0x0000 }, + { 0x00ae, 0x2000 }, + { 0x00af, 0x0000 }, + { 0x00b6, 0x0000 }, + { 0x00b7, 0x0000 }, + { 0x00b8, 0x0000 }, + { 0x00ba, 0x0000 }, + { 0x00bb, 0x0000 }, + { 0x00be, 0x0000 }, + { 0x00bf, 0x0000 }, + { 0x00c0, 0x0000 }, + { 0x00c1, 0x0000 }, + { 0x00c5, 0x0000 }, + { 0x00cb, 0xa02f }, + { 0x00cc, 0x0000 }, + { 0x00cd, 0x0e02 }, + { 0x00d9, 0x08f9 }, + { 0x00db, 0x0008 }, + { 0x00dc, 0x00c0 }, + { 0x00dd, 0x6724 }, + { 0x00de, 0x3131 }, + { 0x00df, 0x0008 }, + { 0x00e0, 0x4000 }, + { 0x00e1, 0x3131 }, + { 0x00e2, 0x0043 }, + { 0x00e4, 0x400b }, + { 0x00e5, 0x8031 }, + { 0x00e6, 0x3080 }, + { 0x00e7, 0x4100 }, + { 0x00e8, 0x1400 }, + { 0x00e9, 0xe00a }, + { 0x00ea, 0x0404 }, + { 0x00eb, 0x0404 }, + { 0x00ec, 0xb320 }, + { 0x00ed, 0x0000 }, + { 0x00f4, 0x0000 }, + { 0x00f6, 0x0000 }, + { 0x00f8, 0x0000 }, + { 0x00fa, 0x8000 }, + { 0x00fd, 0x0001 }, + { 0x00fe, 0x10ec }, + { 0x00ff, 0x6406 }, + { 0x0100, 0xa0a0 }, + { 0x0108, 0x4444 }, + { 0x0109, 0x4444 }, + { 0x010a, 0xaaaa }, + { 0x010b, 0x00a0 }, + { 0x010c, 0x8aaa }, + { 0x010d, 0xaaaa }, + { 0x010e, 0x2aaa }, + { 0x010f, 0x002a }, + { 0x0110, 0xa0a4 }, + { 0x0111, 0x4602 }, + { 0x0112, 0x0101 }, + { 0x0113, 0x2000 }, + { 0x0114, 0x0000 }, + { 0x0116, 0x0000 }, + { 0x0117, 0x0f00 }, + { 0x0118, 0x0006 }, + { 0x0125, 0x2224 }, + { 0x0126, 0x5550 }, + { 0x0127, 0x0400 }, + { 0x0128, 0x7711 }, + { 0x0132, 0x0004 }, + { 0x0137, 0x5441 }, + { 0x0139, 0x79a1 }, + { 0x013a, 0x30c0 }, + { 0x013b, 0x2000 }, + { 0x013c, 0x2005 }, + { 0x013d, 0x30c0 }, + { 0x013e, 0x0000 }, + { 0x0140, 0x3700 }, + { 0x0141, 0x1f00 }, + { 0x0144, 0x0000 }, + { 0x0145, 0x0002 }, + { 0x0146, 0x0000 }, + { 0x0160, 0x0e80 }, + { 0x0161, 0x0020 }, + { 0x0162, 0x0080 }, + { 0x0163, 0x0800 }, + { 0x0164, 0x0000 }, + { 0x0165, 0x0000 }, + { 0x0166, 0x0000 }, + { 0x0167, 0x1417 }, + { 0x0168, 0x0017 }, + { 0x0169, 0x0017 }, + { 0x0180, 0x2000 }, + { 0x0181, 0x0000 }, + { 0x0182, 0x0000 }, + { 0x0183, 0x2000 }, + { 0x0184, 0x0000 }, + { 0x0185, 0x0000 }, + { 0x01b0, 0x4b30 }, + { 0x01b1, 0x0000 }, + { 0x01b2, 0xd870 }, + { 0x01b3, 0x0000 }, + { 0x01b4, 0x0030 }, + { 0x01b5, 0x5757 }, + { 0x01b6, 0x5757 }, + { 0x01b7, 0x5757 }, + { 0x01b8, 0x5757 }, + { 0x01c0, 0x433d }, + { 0x01c1, 0x0540 }, + { 0x01c2, 0x0000 }, + { 0x01c3, 0x0000 }, + { 0x01c4, 0x0000 }, + { 0x01c5, 0x0009 }, + { 0x01c6, 0x0018 }, + { 0x01c7, 0x002a }, + { 0x01c8, 0x004c }, + { 0x01c9, 0x0097 }, + { 0x01ca, 0x01c3 }, + { 0x01cb, 0x03e9 }, + { 0x01cc, 0x1389 }, + { 0x01cd, 0xc351 }, + { 0x01ce, 0x0000 }, + { 0x01cf, 0x0000 }, + { 0x01d0, 0x0000 }, + { 0x01d1, 0x0000 }, + { 0x01d2, 0x0000 }, + { 0x01d3, 0x003c }, + { 0x01d4, 0x5757 }, + { 0x01d5, 0x5757 }, + { 0x01d6, 0x5757 }, + { 0x01d7, 0x5757 }, + { 0x01d8, 0x5757 }, + { 0x01d9, 0x5757 }, + { 0x01da, 0x0000 }, + { 0x01db, 0x0000 }, + { 0x01dd, 0x0009 }, + { 0x01de, 0x7f00 }, + { 0x01df, 0x00c8 }, + { 0x01e0, 0x0691 }, + { 0x01e1, 0x0000 }, + { 0x01e2, 0x0000 }, + { 0x01e3, 0x0000 }, + { 0x01e4, 0x0000 }, + { 0x01e5, 0x0040 }, + { 0x01e6, 0x0000 }, + { 0x01e7, 0x0000 }, + { 0x01e8, 0x0000 }, + { 0x01ea, 0x0000 }, + { 0x01eb, 0x0000 }, + { 0x01ec, 0x0000 }, + { 0x01ed, 0x0000 }, + { 0x01ee, 0x0000 }, + { 0x01ef, 0x0000 }, + { 0x01f0, 0x0000 }, + { 0x01f1, 0x0000 }, + { 0x01f2, 0x0000 }, + { 0x0200, 0x0000 }, + { 0x0201, 0x2244 }, + { 0x0202, 0xaaaa }, + { 0x0250, 0x8010 }, + { 0x0251, 0x0000 }, + { 0x0252, 0x028a }, + { 0x02fa, 0x0000 }, + { 0x02fb, 0x0000 }, + { 0x02fc, 0x0000 }, + { 0x0300, 0x0000 }, + { 0x03d0, 0x0000 }, + { 0x03d1, 0x0000 }, + { 0x03d2, 0x0000 }, + { 0x03d3, 0x0000 }, + { 0x03d4, 0x2000 }, + { 0x03d5, 0x2000 }, + { 0x03d6, 0x0000 }, + { 0x03d7, 0x0000 }, + { 0x03d8, 0x2000 }, + { 0x03d9, 0x2000 }, + { 0x03da, 0x2000 }, + { 0x03db, 0x2000 }, + { 0x03dc, 0x0000 }, + { 0x03dd, 0x0000 }, + { 0x03de, 0x0000 }, + { 0x03df, 0x2000 }, + { 0x03e0, 0x0000 }, + { 0x03e1, 0x0000 }, + { 0x03e2, 0x0000 }, + { 0x03e3, 0x0000 }, + { 0x03e4, 0x0000 }, + { 0x03e5, 0x0000 }, + { 0x03e6, 0x0000 }, + { 0x03e7, 0x0000 }, + { 0x03e8, 0x0000 }, + { 0x03e9, 0x0000 }, + { 0x03ea, 0x0000 }, + { 0x03eb, 0x0000 }, + { 0x03ec, 0x0000 }, + { 0x03ed, 0x0000 }, + { 0x03ee, 0x0000 }, + { 0x03ef, 0x0000 }, + { 0x03f0, 0x0800 }, + { 0x03f1, 0x0800 }, + { 0x03f2, 0x0800 }, + { 0x03f3, 0x0800 }, +}; + +static bool rt5668_volatile_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case 0x0000: + case 0x0011: + case 0x0082: + case 0x00ae: + case 0x00be: + case 0x00db: + case 0x00df: + case 0x00fd: + case 0x00fe: + case 0x00ff: + case 0x01de: + case 0x01e7: + return true; + default: + return false; + } +} + +static bool rt5668_readable_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case 0x0000: + case 0x0001: + case 0x0002: + case 0x0003: + case 0x0004: + case 0x0005: + case 0x0006: + case 0x0007: + case 0x000a: + case 0x000b: + case 0x000c: + case 0x000d: + case 0x000f: + case 0x0010: + case 0x0011: + case 0x0012: + case 0x0013: + case 0x0014: + case 0x0015: + case 0x0016: + case 0x0017: + case 0x0018: + case 0x0019: + case 0x001a: + case 0x001b: + case 0x001c: + case 0x001d: + case 0x001e: + case 0x001f: + case 0x0020: + case 0x0021: + case 0x0022: + case 0x0023: + case 0x0024: + case 0x0026: + case 0x0027: + case 0x0028: + case 0x0029: + case 0x002a: + case 0x002b: + case 0x002c: + case 0x002d: + case 0x002e: + case 0x002f: + case 0x0030: + case 0x0031: + case 0x0032: + case 0x0033: + case 0x0034: + case 0x0035: + case 0x003a: + case 0x003b: + case 0x003c: + case 0x003d: + case 0x003e: + case 0x003f: + case 0x0040: + case 0x0041: + case 0x0042: + case 0x0043: + case 0x0044: + case 0x0049: + case 0x004a: + case 0x004b: + case 0x004d: + case 0x004e: + case 0x004f: + case 0x0050: + case 0x0052: + case 0x0061: + case 0x0062: + case 0x0063: + case 0x0064: + case 0x0065: + case 0x0066: + case 0x0067: + case 0x006b: + case 0x006d: + case 0x006e: + case 0x006f: + case 0x0070: + case 0x0071: + case 0x0072: + case 0x0073: + case 0x0074: + case 0x0075: + case 0x0076: + case 0x0078: + case 0x0079: + case 0x007a: + case 0x007b: + case 0x007c: + case 0x007d: + case 0x007e: + case 0x007f: + case 0x0080: + case 0x0081: + case 0x0082: + case 0x0083: + case 0x0084: + case 0x0085: + case 0x0086: + case 0x0087: + case 0x0088: + case 0x0089: + case 0x008a: + case 0x008b: + case 0x008c: + case 0x008e: + case 0x008f: + case 0x0091: + case 0x0092: + case 0x0093: + case 0x0094: + case 0x0098: + case 0x0099: + case 0x009a: + case 0x009f: + case 0x00a0: + case 0x00a1: + case 0x00a2: + case 0x00a3: + case 0x00a4: + case 0x00ae: + case 0x00af: + case 0x00b6: + case 0x00b7: + case 0x00b8: + case 0x00b9: + case 0x00ba: + case 0x00bb: + case 0x00be: + case 0x00c0: + case 0x00c1: + case 0x00c2: + case 0x00c3: + case 0x00c4: + case 0x00d0: + case 0x00d1: + case 0x00d2: + case 0x00d3: + case 0x00d4: + case 0x00d9: + case 0x00da: + case 0x00db: + case 0x00dc: + case 0x00dd: + case 0x00de: + case 0x00df: + case 0x00e0: + case 0x00e1: + case 0x00e2: + case 0x00ea: + case 0x00eb: + case 0x00ec: + case 0x00ed: + case 0x00ee: + case 0x00ef: + case 0x00f0: + case 0x00f1: + case 0x00f2: + case 0x00f6: + case 0x00f7: + case 0x00f8: + case 0x00fa: + case 0x00fb: + case 0x00fc: + case 0x00fd: + case 0x00fe: + case 0x00ff: + case 0x0100: + case 0x0101: + case 0x010a: + case 0x010b: + case 0x010c: + case 0x010d: + case 0x010e: + case 0x010f: + case 0x0110: + case 0x0111: + case 0x0112: + case 0x0113: + case 0x0117: + case 0x0125: + case 0x0132: + case 0x0133: + case 0x0136: + case 0x0137: + case 0x0138: + case 0x0139: + case 0x013a: + case 0x013b: + case 0x013c: + case 0x013f: + case 0x0145: + case 0x0146: + case 0x0147: + case 0x0148: + case 0x0160: + case 0x0161: + case 0x0162: + case 0x0163: + case 0x0164: + case 0x0165: + case 0x0166: + case 0x0167: + case 0x0168: + case 0x0170: + case 0x0171: + case 0x0172: + case 0x0173: + case 0x0174: + case 0x0175: + case 0x0190: + case 0x0191: + case 0x0192: + case 0x0193: + case 0x0194: + case 0x0195: + case 0x0196: + case 0x0197: + case 0x0198: + case 0x0199: + case 0x01a0: + case 0x01a1: + case 0x01a2: + case 0x01a3: + case 0x01a4: + case 0x01a5: + case 0x01a6: + case 0x01a7: + case 0x01a8: + case 0x01a9: + case 0x01aa: + case 0x01ab: + case 0x01b5: + case 0x01b6: + case 0x01b7: + case 0x01b8: + case 0x01b9: + case 0x01ba: + case 0x01bb: + case 0x01bc: + case 0x01bd: + case 0x01be: + case 0x01bf: + case 0x01c0: + case 0x01c1: + case 0x01c2: + case 0x01c3: + case 0x01c4: + case 0x01c5: + case 0x01c6: + case 0x01c7: + case 0x01c8: + case 0x01c9: + case 0x01ca: + case 0x01cb: + case 0x01cc: + case 0x01cd: + case 0x01ce: + case 0x01cf: + case 0x01d0: + case 0x01d1: + case 0x01d2: + case 0x01d3: + case 0x01d4: + case 0x01d5: + case 0x01d6: + case 0x01da: + case 0x01db: + case 0x01dc: + case 0x01de: + case 0x01df: + case 0x01e0: + case 0x01e1: + case 0x01e2: + case 0x01e3: + case 0x01e4: + case 0x01e5: + case 0x01e6: + case 0x01e7: + case 0x01e8: + case 0x01ea: + case 0x01eb: + case 0x01ec: + case 0x01ed: + case 0x01ee: + case 0x01ef: + case 0x01f0: + case 0x01f1: + case 0x01f2: + case 0x01f3: + case 0x01f4: + case 0x0200: + case 0x0201: + case 0x0202: + case 0x0203: + case 0x0204: + case 0x0205: + case 0x0206: + case 0x0207: + case 0x0208: + case 0x0210: + case 0x0211: + case 0x0212: + case 0x0213: + case 0x0214: + case 0x0215: + case 0x0216: + case 0x0217: + case 0x0218: + case 0x0219: + case 0x021a: + case 0x021b: + case 0x02fa: + case 0x02fb: + case 0x02fc: + case 0x02ff: + case 0x0300: + case 0x0301: + case 0x0302: + case 0x0303: + case 0x0304: + case 0x0305: + case 0x0306: + case 0x0307: + case 0x0310: + case 0x0311: + case 0x0312: + case 0x0313: + case 0x0314: + case 0x0315: + case 0x0316: + case 0x0317: + case 0x0330: + case 0x0331: + case 0x0332: + case 0x0333: + case 0x0334: + case 0x0335: + case 0x0336: + case 0x0337: + case 0x0338: + case 0x0339: + case 0x033a: + case 0x03c0: + case 0x03c1: + case 0x03c2: + case 0x03c3: + case 0x03c4: + case 0x03c5: + case 0x03c6: + case 0x03c7: + case 0x03c8: + case 0x03c9: + case 0x03ca: + case 0x03cb: + case 0x03cc: + case 0x03d0: + case 0x03d1: + case 0x03d2: + case 0x03d3: + case 0x03d4: + case 0x03d5: + case 0x03d6: + case 0x03d7: + case 0x03d8: + case 0x03d9: + case 0x03da: + case 0x03db: + case 0x03dc: + case 0x03dd: + case 0x03de: + case 0x03df: + case 0x03e0: + case 0x03e1: + case 0x03e2: + case 0x03e3: + case 0x03e4: + case 0x03e5: + case 0x03e6: + case 0x03e7: + case 0x03e8: + case 0x03e9: + case 0x03ea: + case 0x03eb: + case 0x03ec: + case 0x03ed: + case 0x03ee: + case 0x03ef: + case 0x03f0: + case 0x03f1: + case 0x03f2: + case 0x03f3: + case 0x03fe: + case 0x03ff: + case 0x07f0: + case 0x07fa: + return true; + default: + return false; + } +} + +static bool rt5663_volatile_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case 0x0000: + case 0x0015: + case 0x0023: + case 0x0029: + case 0x0076: + case 0x0093: + case 0x0097: + case 0x00ae: + case 0x00be: + case 0x00bf: + case 0x00c5: + case 0x00cb: + case 0x00db: + case 0x00df: + case 0x00e4: + case 0x00e6: + case 0x00e7: + case 0x00e8: + case 0x00f8: + case 0x00fd: + case 0x00fe: + case 0x00ff: + case 0x0139: + case 0x0141: + case 0x0160: + case 0x0164: + case 0x0165: + case 0x0166: + case 0x0180: + case 0x0183: + case 0x01c0: + case 0x01c2: + case 0x01c3: + case 0x01c4: + case 0x01de: + case 0x01e6: + case 0x01ea: + case 0x01eb: + case 0x01ec: + case 0x01ed: + case 0x01ee: + case 0x01ef: + case 0x01f0: + case 0x01f1: + case 0x01f2: + case 0x0300: + return true; + default: + return false; + } +} + +static bool rt5663_readable_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case 0x0000: + case 0x0002: + case 0x0005: + case 0x0006: + case 0x000a: + case 0x0010: + case 0x0015: + case 0x0016: + case 0x0018: + case 0x0019: + case 0x001c: + case 0x001f: + case 0x0022: + case 0x0023: + case 0x0026: + case 0x0029: + case 0x002a: + case 0x002c: + case 0x002d: + case 0x0040: + case 0x0061: + case 0x0062: + case 0x0063: + case 0x0064: + case 0x0065: + case 0x0066: + case 0x006b: + case 0x006e: + case 0x006f: + case 0x0070: + case 0x0073: + case 0x0074: + case 0x0075: + case 0x0076: + case 0x0077: + case 0x0078: + case 0x0079: + case 0x007a: + case 0x007b: + case 0x0080: + case 0x0081: + case 0x0082: + case 0x0083: + case 0x0084: + case 0x0086: + case 0x0087: + case 0x008a: + case 0x008b: + case 0x008c: + case 0x008e: + case 0x008f: + case 0x0090: + case 0x0091: + case 0x0092: + case 0x0093: + case 0x0094: + case 0x0097: + case 0x0098: + case 0x009a: + case 0x009f: + case 0x00ae: + case 0x00af: + case 0x00b6: + case 0x00b7: + case 0x00b8: + case 0x00ba: + case 0x00bb: + case 0x00be: + case 0x00bf: + case 0x00c0: + case 0x00c1: + case 0x00c5: + case 0x00cb: + case 0x00cc: + case 0x00cd: + case 0x00d9: + case 0x00db: + case 0x00dc: + case 0x00dd: + case 0x00de: + case 0x00df: + case 0x00e0: + case 0x00e1: + case 0x00e2: + case 0x00e4: + case 0x00e5: + case 0x00e6: + case 0x00e7: + case 0x00e8: + case 0x00e9: + case 0x00ea: + case 0x00eb: + case 0x00ec: + case 0x00ed: + case 0x00f4: + case 0x00f6: + case 0x00f8: + case 0x00fa: + case 0x00fd: + case 0x00fe: + case 0x00ff: + case 0x0100: + case 0x0108: + case 0x0109: + case 0x010a: + case 0x010b: + case 0x010c: + case 0x010d: + case 0x010e: + case 0x010f: + case 0x0110: + case 0x0111: + case 0x0112: + case 0x0113: + case 0x0114: + case 0x0116: + case 0x0117: + case 0x0118: + case 0x0125: + case 0x0126: + case 0x0127: + case 0x0128: + case 0x0132: + case 0x0137: + case 0x0139: + case 0x013a: + case 0x013b: + case 0x013c: + case 0x013d: + case 0x013e: + case 0x0140: + case 0x0141: + case 0x0144: + case 0x0145: + case 0x0146: + case 0x0160: + case 0x0161: + case 0x0162: + case 0x0163: + case 0x0164: + case 0x0165: + case 0x0166: + case 0x0167: + case 0x0168: + case 0x0169: + case 0x0180: + case 0x0181: + case 0x0182: + case 0x0183: + case 0x0184: + case 0x0185: + case 0x01b0: + case 0x01b1: + case 0x01b2: + case 0x01b3: + case 0x01b4: + case 0x01b5: + case 0x01b6: + case 0x01b7: + case 0x01b8: + case 0x01c0: + case 0x01c1: + case 0x01c2: + case 0x01c3: + case 0x01c4: + case 0x01c5: + case 0x01c6: + case 0x01c7: + case 0x01c8: + case 0x01c9: + case 0x01ca: + case 0x01cb: + case 0x01cc: + case 0x01cd: + case 0x01ce: + case 0x01cf: + case 0x01d0: + case 0x01d1: + case 0x01d2: + case 0x01d3: + case 0x01d4: + case 0x01d5: + case 0x01d6: + case 0x01d7: + case 0x01d8: + case 0x01d9: + case 0x01da: + case 0x01db: + case 0x01dd: + case 0x01de: + case 0x01df: + case 0x01e0: + case 0x01e1: + case 0x01e2: + case 0x01e3: + case 0x01e4: + case 0x01e5: + case 0x01e6: + case 0x01e7: + case 0x01e8: + case 0x01ea: + case 0x01eb: + case 0x01ec: + case 0x01ed: + case 0x01ee: + case 0x01ef: + case 0x01f0: + case 0x01f1: + case 0x01f2: + case 0x0200: + case 0x0201: + case 0x0202: + case 0x0250: + case 0x0251: + case 0x0252: + case 0x02fa: + case 0x02fb: + case 0x02fc: + case 0x0300: + case 0x03d0: + case 0x03d1: + case 0x03d2: + case 0x03d3: + case 0x03d4: + case 0x03d5: + case 0x03d6: + case 0x03d7: + case 0x03d8: + case 0x03d9: + case 0x03da: + case 0x03db: + case 0x03dc: + case 0x03dd: + case 0x03de: + case 0x03df: + case 0x03e0: + case 0x03e1: + case 0x03e2: + case 0x03e3: + case 0x03e4: + case 0x03e5: + case 0x03e6: + case 0x03e7: + case 0x03e8: + case 0x03e9: + case 0x03ea: + case 0x03eb: + case 0x03ec: + case 0x03ed: + case 0x03ee: + case 0x03ef: + case 0x03f0: + case 0x03f1: + case 0x03f2: + case 0x03f3: + return true; + default: + return false; + } +} + +static const DECLARE_TLV_DB_SCALE(rt5663_hp_vol_tlv, -2400, 150, 0); +static const DECLARE_TLV_DB_SCALE(rt5668_hp_vol_tlv, -2250, 150, 0); +static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -6525, 75, 0); +static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -1725, 75, 0); + +/* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */ +static const DECLARE_TLV_DB_RANGE(in_bst_tlv, + 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0), + 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0), + 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0), + 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0), + 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0), + 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0), + 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0) +); + +/* Interface data select */ +static const char * const rt5663_if1_adc_data_select[] = { + "L/R", "R/L", "L/L", "R/R" +}; + +static const SOC_ENUM_SINGLE_DECL(rt5663_if1_adc_enum, RT5668_TDM_1, + RT5663_DATA_SWAP_ADCDAT1_SHIFT, rt5663_if1_adc_data_select); + +static void rt5668_enable_push_button_irq(struct snd_soc_codec *codec, + bool enable) +{ + struct rt5668_priv *rt5668 = snd_soc_codec_get_drvdata(codec); + + if (enable) { + snd_soc_update_bits(codec, RT5668_4BTN_IL_CMD_2, + RT5668_EN_4BTN_INL_MASK, RT5668_EN_4BTN_INL_EN); + /* reset in-line command */ + snd_soc_update_bits(codec, RT5668_4BTN_IL_CMD_2, + RT5668_RESET_4BTN_INL_MASK, + RT5668_RESET_4BTN_INL_RESET); + snd_soc_update_bits(codec, RT5668_4BTN_IL_CMD_2, + RT5668_RESET_4BTN_INL_MASK, + RT5668_RESET_4BTN_INL_NOR); + if (rt5668->codec_type == CODEC_TYPE_RT5668) + snd_soc_update_bits(codec, RT5668_IRQ_3, + RT5668_EN_IRQ_INLINE_MASK, + RT5668_EN_IRQ_INLINE_NOR); + else + snd_soc_update_bits(codec, RT5668_IRQ_2, + RT5663_EN_IRQ_INLINE_MASK, + RT5663_EN_IRQ_INLINE_NOR); + } else { + if (rt5668->codec_type == CODEC_TYPE_RT5668) + snd_soc_update_bits(codec, RT5668_IRQ_3, + RT5668_EN_IRQ_INLINE_MASK, + RT5668_EN_IRQ_INLINE_BYP); + else + snd_soc_update_bits(codec, RT5668_IRQ_2, + RT5663_EN_IRQ_INLINE_MASK, + RT5663_EN_IRQ_INLINE_BYP); + + snd_soc_update_bits(codec, RT5668_4BTN_IL_CMD_2, + RT5668_EN_4BTN_INL_MASK, RT5668_EN_4BTN_INL_DIS); + /* reset in-line command */ + snd_soc_update_bits(codec, RT5668_4BTN_IL_CMD_2, + RT5668_RESET_4BTN_INL_MASK, + RT5668_RESET_4BTN_INL_RESET); + snd_soc_update_bits(codec, RT5668_4BTN_IL_CMD_2, + RT5668_RESET_4BTN_INL_MASK, + RT5668_RESET_4BTN_INL_NOR); + } +} + +/** + * rt5668_jack_detect - Detect headset. + * @codec: SoC audio codec device. + * @jack_insert: Jack insert or not. + * + * Detect whether is headset or not when jack inserted. + * + * Returns detect status. + */ + +static int rt5668_jack_detect(struct snd_soc_codec *codec, int jack_insert) +{ + struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); + struct rt5668_priv *rt5668 = snd_soc_codec_get_drvdata(codec); + int val, i = 0, sleep_time[5] = {300, 150, 100, 50, 30}; + + dev_dbg(codec->dev, "%s jack_insert:%d\n", __func__, jack_insert); + if (jack_insert) { + snd_soc_write(codec, RT5668_CBJ_TYPE_2, 0x8040); + snd_soc_write(codec, RT5668_CBJ_TYPE_3, 0x1484); + + snd_soc_dapm_force_enable_pin(dapm, "MICBIAS1"); + snd_soc_dapm_force_enable_pin(dapm, "MICBIAS2"); + snd_soc_dapm_force_enable_pin(dapm, "Mic Det Power"); + snd_soc_dapm_force_enable_pin(dapm, "CBJ Power"); + snd_soc_dapm_sync(dapm); + snd_soc_update_bits(codec, RT5668_MICBIAS_2, + RT5668_DIG_1M_CLK_MASK, RT5668_DIG_1M_CLK_EN); + snd_soc_update_bits(codec, RT5668_CBJ_TYPE_1, 0x8, 0x8); + + while (i < 5) { + msleep(sleep_time[i]); + val = snd_soc_read(codec, RT5668_CBJ_TYPE_2) & 0x0003; + if (val == 0x1 || val == 0x2 || val == 0x3) + break; + dev_dbg(codec->dev, "%s: MX-0011 val=%x sleep %d\n", + __func__, val, sleep_time[i]); + i++; + } + dev_dbg(codec->dev, "%s val = %d\n", __func__, val); + switch (val) { + case 1: + case 2: + rt5668->jack_type = SND_JACK_HEADSET; + rt5668_enable_push_button_irq(codec, true); + break; + default: + snd_soc_dapm_disable_pin(dapm, "MICBIAS1"); + snd_soc_dapm_disable_pin(dapm, "MICBIAS2"); + snd_soc_dapm_disable_pin(dapm, "Mic Det Power"); + snd_soc_dapm_disable_pin(dapm, "CBJ Power"); + snd_soc_dapm_sync(dapm); + rt5668->jack_type = SND_JACK_HEADPHONE; + break; + } + } else { + snd_soc_update_bits(codec, RT5668_CBJ_TYPE_1, 0x8, 0x0); + + if (rt5668->jack_type == SND_JACK_HEADSET) { + rt5668_enable_push_button_irq(codec, false); + snd_soc_dapm_disable_pin(dapm, "MICBIAS1"); + snd_soc_dapm_disable_pin(dapm, "MICBIAS2"); + snd_soc_dapm_disable_pin(dapm, "Mic Det Power"); + snd_soc_dapm_disable_pin(dapm, "CBJ Power"); + snd_soc_dapm_sync(dapm); + } + rt5668->jack_type = 0; + } + + dev_dbg(codec->dev, "jack_type = %d\n", rt5668->jack_type); + return rt5668->jack_type; +} + +/** + * rt5663_jack_detect - Detect headset. + * @codec: SoC audio codec device. + * @jack_insert: Jack insert or not. + * + * Detect whether is headset or not when jack inserted. + * + * Returns detect status. + */ + +static int rt5663_jack_detect(struct snd_soc_codec *codec, int jack_insert) +{ + struct rt5668_priv *rt5668 = snd_soc_codec_get_drvdata(codec); + int val, i = 0, sleep_time[5] = {300, 150, 100, 50, 30}; + + dev_dbg(codec->dev, "%s jack_insert:%d\n", __func__, jack_insert); + + if (jack_insert) { + while (i < 5) { + msleep(sleep_time[i]); + val = snd_soc_read(codec, RT5663_EM_JACK_TYPE_2) & + 0x0003; + i++; + if (val == 0x1 || val == 0x2 || val == 0x3) + break; + dev_dbg(codec->dev, "%s: MX-00e7 val=%x sleep %d\n", + __func__, val, sleep_time[i]); + } + dev_dbg(codec->dev, "%s val = %d\n", __func__, val); + switch (val) { + case 1: + case 2: + rt5668->jack_type = SND_JACK_HEADSET; + rt5668_enable_push_button_irq(codec, true); + break; + default: + rt5668->jack_type = SND_JACK_HEADPHONE; + break; + } + } else { + if (rt5668->jack_type == SND_JACK_HEADSET) + rt5668_enable_push_button_irq(codec, false); + rt5668->jack_type = 0; + } + + dev_dbg(codec->dev, "jack_type = %d\n", rt5668->jack_type); + return rt5668->jack_type; +} + +int rt5668_button_detect(struct snd_soc_codec *codec) +{ + int btn_type, val; + + val = snd_soc_read(codec, RT5668_4BTN_IL_CMD_1); + dev_dbg(codec->dev, "%s: val=0x%x\n", __func__, val); + btn_type = val & 0xfff0; + snd_soc_write(codec, RT5668_4BTN_IL_CMD_1, val); + + return btn_type; +} +EXPORT_SYMBOL(rt5668_button_detect); + +static irqreturn_t rt5668_irq(int irq, void *data) +{ + struct rt5668_priv *rt5668 = data; + + dev_dbg(rt5668->codec->dev, "%s IRQ queue work\n", __func__); + + queue_delayed_work(system_wq, &rt5668->jack_detect_work, + msecs_to_jiffies(250)); + + return IRQ_HANDLED; +} + +static void rt5668_btn_check_callback(unsigned long data) +{ + struct rt5668_priv *rt5668 = (struct rt5668_priv *)data; + + queue_delayed_work(system_wq, &rt5668->jack_detect_work, + msecs_to_jiffies(5)); +} + +int rt5668_set_jack_detect(struct snd_soc_codec *codec, + struct snd_soc_jack *hs_jack) +{ + struct rt5668_priv *rt5668 = snd_soc_codec_get_drvdata(codec); + + rt5668->hs_jack = hs_jack; + + rt5668_irq(0, rt5668); + + return 0; +} +EXPORT_SYMBOL_GPL(rt5668_set_jack_detect); + +static int rt5668_check_jd_status(struct snd_soc_codec *codec) +{ + struct rt5668_priv *rt5668 = snd_soc_codec_get_drvdata(codec); + int val; + + /* JD1 */ + if (rt5668->codec_type == CODEC_TYPE_RT5668) + val = snd_soc_read(codec, RT5668_INT_ST_1) & 0x2000; + else + val = snd_soc_read(codec, RT5668_INT_ST_1) & 0x1000; + + if (!val) { /* jack insert */ + dev_dbg(codec->dev, "%s-Jack In\n", __func__); + return 1; + } + + /* jack out */ + dev_dbg(codec->dev, "%s-Jack Out\n", __func__); + return 0; +} + +static void rt5668_jack_detect_work(struct work_struct *work) +{ + struct rt5668_priv *rt5668 = + container_of(work, struct rt5668_priv, jack_detect_work.work); + struct snd_soc_codec *codec = rt5668->codec; + int btn_type, report = 0; + + if (!codec) + return; + + if (rt5668_check_jd_status(codec)) { + /* jack in */ + if (rt5668->jack_type == 0) { + /* jack was out, report jack type */ + if (rt5668->codec_type == CODEC_TYPE_RT5668) + report = rt5668_jack_detect(rt5668->codec, 1); + else + report = rt5663_jack_detect(rt5668->codec, 1); + } else { + /* jack is already in, report button event */ + report = SND_JACK_HEADSET; + btn_type = rt5668_button_detect(rt5668->codec); + /** + * rt5668 can report three kinds of button behavior, + * one click, double click and hold. However, + * currently we will report button pressed/released + * event. So all the three button behaviors are + * treated as button pressed. + */ + switch (btn_type) { + case 0x8000: + case 0x4000: + case 0x2000: + report |= SND_JACK_BTN_0; + break; + case 0x1000: + case 0x0800: + case 0x0400: + report |= SND_JACK_BTN_1; + break; + case 0x0200: + case 0x0100: + case 0x0080: + report |= SND_JACK_BTN_2; + break; + case 0x0040: + case 0x0020: + case 0x0010: + report |= SND_JACK_BTN_3; + break; + case 0x0000: /* unpressed */ + break; + default: + btn_type = 0; + dev_err(rt5668->codec->dev, + "Unexpected button code 0x%04x\n", + btn_type); + break; + } + + /* button release or spurious interrput*/ + if (btn_type == 0) + report = rt5668->jack_type; + else + mod_timer(&rt5668->btn_check_timer, + msecs_to_jiffies(100)); + } + } else { + /* jack out */ + if (rt5668->codec_type == CODEC_TYPE_RT5668) + report = rt5668_jack_detect(rt5668->codec, 0); + else + report = rt5663_jack_detect(rt5668->codec, 0); + } + dev_dbg(codec->dev, "%s jack report: 0x%04x\n", __func__, report); + snd_soc_jack_report(rt5668->hs_jack, report, SND_JACK_HEADSET | + SND_JACK_BTN_0 | SND_JACK_BTN_1 | + SND_JACK_BTN_2 | SND_JACK_BTN_3); +} + +static const struct snd_kcontrol_new rt5668_snd_controls[] = { + /* DAC Digital Volume */ + SOC_DOUBLE_TLV("DAC Playback Volume", RT5668_DAC1_DIG_VOL, + RT5668_DAC_L1_VOL_SHIFT + 1, RT5668_DAC_R1_VOL_SHIFT + 1, + 87, 0, dac_vol_tlv), + /* ADC Digital Volume Control */ + SOC_DOUBLE("ADC Capture Switch", RT5668_STO1_ADC_DIG_VOL, + RT5668_ADC_L_MUTE_SHIFT, RT5668_ADC_R_MUTE_SHIFT, 1, 1), + SOC_DOUBLE_TLV("ADC Capture Volume", RT5668_STO1_ADC_DIG_VOL, + RT5668_ADC_L_VOL_SHIFT + 1, RT5668_ADC_R_VOL_SHIFT + 1, + 63, 0, adc_vol_tlv), +}; + +static const struct snd_kcontrol_new rt5668_specific_controls[] = { + /* Headphone Output Volume */ + SOC_DOUBLE_R_TLV("Headphone Playback Volume", RT5668_HPL_GAIN, + RT5668_HPR_GAIN, RT5668_GAIN_HP_SHIFT, 15, 1, + rt5668_hp_vol_tlv), + /* Mic Boost Volume */ + SOC_SINGLE_TLV("IN1 Capture Volume", RT5668_AEC_BST, + RT5668_GAIN_CBJ_SHIFT, 8, 0, in_bst_tlv), +}; + +static const struct snd_kcontrol_new rt5663_specific_controls[] = { + /* Headphone Output Volume */ + SOC_DOUBLE_R_TLV("Headphone Playback Volume", RT5663_STO_DRE_9, + RT5663_STO_DRE_10, RT5663_DRE_GAIN_HP_SHIFT, 23, 1, + rt5663_hp_vol_tlv), + /* Mic Boost Volume*/ + SOC_SINGLE_TLV("IN1 Capture Volume", RT5663_CBJ_2, + RT5663_GAIN_BST1_SHIFT, 8, 0, in_bst_tlv), + /* Data Swap for Slot0/1 in ADCDAT1 */ + SOC_ENUM("IF1 ADC Data Swap", rt5663_if1_adc_enum), +}; + +static int rt5668_is_sys_clk_from_pll(struct snd_soc_dapm_widget *w, + struct snd_soc_dapm_widget *sink) +{ + unsigned int val; + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); + + val = snd_soc_read(codec, RT5668_GLB_CLK); + val &= RT5668_SCLK_SRC_MASK; + if (val == RT5668_SCLK_SRC_PLL1) + return 1; + else + return 0; +} + +static int rt5668_is_using_asrc(struct snd_soc_dapm_widget *w, + struct snd_soc_dapm_widget *sink) +{ + unsigned int reg, shift, val; + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); + struct rt5668_priv *rt5668 = snd_soc_codec_get_drvdata(codec); + + if (rt5668->codec_type == CODEC_TYPE_RT5668) { + switch (w->shift) { + case RT5668_ADC_STO1_ASRC_SHIFT: + reg = RT5668_ASRC_3; + shift = RT5668_AD_STO1_TRACK_SHIFT; + break; + case RT5668_DAC_STO1_ASRC_SHIFT: + reg = RT5668_ASRC_2; + shift = RT5668_DA_STO1_TRACK_SHIFT; + break; + default: + return 0; + } + } else { + switch (w->shift) { + case RT5663_ADC_STO1_ASRC_SHIFT: + reg = RT5668_ASRC_2; + shift = RT5663_AD_STO1_TRACK_SHIFT; + break; + case RT5663_DAC_STO1_ASRC_SHIFT: + reg = RT5668_ASRC_2; + shift = RT5668_DA_STO1_TRACK_SHIFT; + break; + default: + return 0; + } + } + + val = (snd_soc_read(codec, reg) >> shift) & 0x7; + + if (val) + return 1; + + return 0; +} + +static int rt5668_i2s_use_asrc(struct snd_soc_dapm_widget *source, + struct snd_soc_dapm_widget *sink) +{ + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm); + struct rt5668_priv *rt5668 = snd_soc_codec_get_drvdata(codec); + int da_asrc_en, ad_asrc_en; + + da_asrc_en = (snd_soc_read(codec, RT5668_ASRC_2) & + RT5668_DA_STO1_TRACK_MASK) ? 1 : 0; + if (rt5668->codec_type == CODEC_TYPE_RT5668) + ad_asrc_en = (snd_soc_read(codec, RT5668_ASRC_3) & + RT5668_AD_STO1_TRACK_MASK) ? 1 : 0; + else + ad_asrc_en = (snd_soc_read(codec, RT5668_ASRC_2) & + RT5663_AD_STO1_TRACK_MASK) ? 1 : 0; + + + if (da_asrc_en || ad_asrc_en) + if (rt5668->sysclk > rt5668->lrck * 384) + return 1; + + dev_err(codec->dev, "sysclk < 384 x fs, disable i2s asrc\n"); + + return 0; +} + +/** + * rt5668_sel_asrc_clk_src - select ASRC clock source for a set of filters + * @codec: SoC audio codec device. + * @filter_mask: mask of filters. + * @clk_src: clock source + * + * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5668 can + * only support standard 32fs or 64fs i2s format, ASRC should be enabled to + * support special i2s clock format such as Intel's 100fs(100 * sampling rate). + * ASRC function will track i2s clock and generate a corresponding system clock + * for codec. This function provides an API to select the clock source for a + * set of filters specified by the mask. And the codec driver will turn on ASRC + * for these filters if ASRC is selected as their clock source. + */ +int rt5668_sel_asrc_clk_src(struct snd_soc_codec *codec, + unsigned int filter_mask, unsigned int clk_src) +{ + struct rt5668_priv *rt5668 = snd_soc_codec_get_drvdata(codec); + unsigned int asrc2_mask = 0; + unsigned int asrc2_value = 0; + unsigned int asrc3_mask = 0; + unsigned int asrc3_value = 0; + + switch (clk_src) { + case RT5668_CLK_SEL_SYS: + case RT5668_CLK_SEL_I2S1_ASRC: + break; + + default: + return -EINVAL; + } + + if (filter_mask & RT5668_DA_STEREO_FILTER) { + asrc2_mask |= RT5668_DA_STO1_TRACK_MASK; + asrc2_value |= clk_src << RT5668_DA_STO1_TRACK_SHIFT; + } + + if (filter_mask & RT5668_AD_STEREO_FILTER) { + if (rt5668->codec_type == CODEC_TYPE_RT5668) { + asrc3_mask |= RT5668_AD_STO1_TRACK_MASK; + asrc3_value |= clk_src << RT5668_AD_STO1_TRACK_SHIFT; + } else { + asrc2_mask |= RT5663_AD_STO1_TRACK_MASK; + asrc2_value |= clk_src << RT5663_AD_STO1_TRACK_SHIFT; + } + } + + if (asrc2_mask) + snd_soc_update_bits(codec, RT5668_ASRC_2, asrc2_mask, + asrc2_value); + + if (asrc3_mask) + snd_soc_update_bits(codec, RT5668_ASRC_3, asrc3_mask, + asrc3_value); + + return 0; +} +EXPORT_SYMBOL_GPL(rt5668_sel_asrc_clk_src); + +/* Analog Mixer */ +static const struct snd_kcontrol_new rt5668_recmix1l[] = { + SOC_DAPM_SINGLE("BST2 Switch", RT5668_RECMIX1L, + RT5668_RECMIX1L_BST2_SHIFT, 1, 1), + SOC_DAPM_SINGLE("BST1 CBJ Switch", RT5668_RECMIX1L, + RT5668_RECMIX1L_BST1_CBJ_SHIFT, 1, 1), +}; + +static const struct snd_kcontrol_new rt5668_recmix1r[] = { + SOC_DAPM_SINGLE("BST2 Switch", RT5668_RECMIX1R, + RT5668_RECMIX1R_BST2_SHIFT, 1, 1), +}; + +/* Digital Mixer */ +static const struct snd_kcontrol_new rt5668_sto1_adc_l_mix[] = { + SOC_DAPM_SINGLE("ADC1 Switch", RT5668_STO1_ADC_MIXER, + RT5668_M_STO1_ADC_L1_SHIFT, 1, 1), + SOC_DAPM_SINGLE("ADC2 Switch", RT5668_STO1_ADC_MIXER, + RT5668_M_STO1_ADC_L2_SHIFT, 1, 1), +}; + +static const struct snd_kcontrol_new rt5668_sto1_adc_r_mix[] = { + SOC_DAPM_SINGLE("ADC1 Switch", RT5668_STO1_ADC_MIXER, + RT5668_M_STO1_ADC_R1_SHIFT, 1, 1), + SOC_DAPM_SINGLE("ADC2 Switch", RT5668_STO1_ADC_MIXER, + RT5668_M_STO1_ADC_R2_SHIFT, 1, 1), +}; + +static const struct snd_kcontrol_new rt5668_adda_l_mix[] = { + SOC_DAPM_SINGLE("ADC L Switch", RT5668_AD_DA_MIXER, + RT5668_M_ADCMIX_L_SHIFT, 1, 1), + SOC_DAPM_SINGLE("DAC L Switch", RT5668_AD_DA_MIXER, + RT5668_M_DAC1_L_SHIFT, 1, 1), +}; + +static const struct snd_kcontrol_new rt5668_adda_r_mix[] = { + SOC_DAPM_SINGLE("ADC R Switch", RT5668_AD_DA_MIXER, + RT5668_M_ADCMIX_R_SHIFT, 1, 1), + SOC_DAPM_SINGLE("DAC R Switch", RT5668_AD_DA_MIXER, + RT5668_M_DAC1_R_SHIFT, 1, 1), +}; + +static const struct snd_kcontrol_new rt5668_sto1_dac_l_mix[] = { + SOC_DAPM_SINGLE("DAC L Switch", RT5668_STO_DAC_MIXER, + RT5668_M_DAC_L1_STO_L_SHIFT, 1, 1), + SOC_DAPM_SINGLE("DAC R Switch", RT5668_STO_DAC_MIXER, + RT5668_M_DAC_R1_STO_L_SHIFT, 1, 1), +}; + +static const struct snd_kcontrol_new rt5668_sto1_dac_r_mix[] = { + SOC_DAPM_SINGLE("DAC L Switch", RT5668_STO_DAC_MIXER, + RT5668_M_DAC_L1_STO_R_SHIFT, 1, 1), + SOC_DAPM_SINGLE("DAC R Switch", RT5668_STO_DAC_MIXER, + RT5668_M_DAC_R1_STO_R_SHIFT, 1, 1), +}; + +/* Out Switch */ +static const struct snd_kcontrol_new rt5668_hpo_switch = + SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5668_HP_AMP_2, + RT5668_EN_DAC_HPO_SHIFT, 1, 0); + +/* Stereo ADC source */ +static const char * const rt5668_sto1_adc_src[] = { + "ADC L", "ADC R" +}; + +static SOC_ENUM_SINGLE_DECL(rt5668_sto1_adcl_enum, RT5668_STO1_ADC_MIXER, + RT5668_STO1_ADC_L_SRC_SHIFT, rt5668_sto1_adc_src); + +static const struct snd_kcontrol_new rt5668_sto1_adcl_mux = + SOC_DAPM_ENUM("STO1 ADC L Mux", rt5668_sto1_adcl_enum); + +static SOC_ENUM_SINGLE_DECL(rt5668_sto1_adcr_enum, RT5668_STO1_ADC_MIXER, + RT5668_STO1_ADC_R_SRC_SHIFT, rt5668_sto1_adc_src); + +static const struct snd_kcontrol_new rt5668_sto1_adcr_mux = + SOC_DAPM_ENUM("STO1 ADC R Mux", rt5668_sto1_adcr_enum); + +/* RT5663: Analog DACL1 input source */ +static const char * const rt5663_alg_dacl_src[] = { + "DAC L", "STO DAC MIXL" +}; + +static SOC_ENUM_SINGLE_DECL(rt5663_alg_dacl_enum, RT5663_BYPASS_STO_DAC, + RT5663_DACL1_SRC_SHIFT, rt5663_alg_dacl_src); + +static const struct snd_kcontrol_new rt5668_alg_dacl_mux = + SOC_DAPM_ENUM("DAC L Mux", rt5663_alg_dacl_enum); + +/* RT5663: Analog DACR1 input source */ +static const char * const rt5663_alg_dacr_src[] = { + "DAC R", "STO DAC MIXR" +}; + +static SOC_ENUM_SINGLE_DECL(rt5663_alg_dacr_enum, RT5663_BYPASS_STO_DAC, + RT5663_DACR1_SRC_SHIFT, rt5663_alg_dacr_src); + +static const struct snd_kcontrol_new rt5668_alg_dacr_mux = + SOC_DAPM_ENUM("DAC R Mux", rt5663_alg_dacr_enum); + +static int rt5668_hp_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); + struct rt5668_priv *rt5668 = snd_soc_codec_get_drvdata(codec); + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + if (rt5668->codec_type == CODEC_TYPE_RT5668) { + snd_soc_update_bits(codec, RT5668_HP_CHARGE_PUMP_1, + RT5668_SEL_PM_HP_SHIFT, RT5668_SEL_PM_HP_HIGH); + snd_soc_update_bits(codec, RT5668_HP_LOGIC_2, + RT5668_HP_SIG_SRC1_MASK, + RT5668_HP_SIG_SRC1_SILENCE); + } else { + snd_soc_write(codec, RT5668_DEPOP_2, 0x3003); + snd_soc_update_bits(codec, RT5668_DEPOP_1, 0x000b, + 0x000b); + snd_soc_update_bits(codec, RT5668_DEPOP_1, 0x0030, + 0x0030); + snd_soc_update_bits(codec, RT5668_HP_CHARGE_PUMP_1, + RT5668_OVCD_HP_MASK, RT5668_OVCD_HP_DIS); + snd_soc_write(codec, RT5668_HP_CHARGE_PUMP_2, 0x1371); + snd_soc_write(codec, RT5663_HP_BIAS, 0xabba); + snd_soc_write(codec, RT5663_CHARGE_PUMP_1, 0x2224); + snd_soc_write(codec, RT5663_ANA_BIAS_CUR_1, 0x7766); + snd_soc_write(codec, RT5663_HP_BIAS, 0xafaa); + snd_soc_write(codec, RT5663_CHARGE_PUMP_2, 0x7777); + snd_soc_write(codec, RT5663_VREF_RECMIX, 0x0007); + snd_soc_update_bits(codec, RT5668_DEPOP_1, 0x3000, + 0x3000); + } + break; + + case SND_SOC_DAPM_PRE_PMD: + if (rt5668->codec_type == CODEC_TYPE_RT5668) { + snd_soc_update_bits(codec, RT5668_HP_LOGIC_2, + RT5668_HP_SIG_SRC1_MASK, + RT5668_HP_SIG_SRC1_REG); + } else { + snd_soc_update_bits(codec, RT5668_DEPOP_1, 0x3000, 0x0); + snd_soc_update_bits(codec, RT5668_HP_CHARGE_PUMP_1, + RT5668_OVCD_HP_MASK, RT5668_OVCD_HP_EN); + snd_soc_update_bits(codec, RT5668_DEPOP_1, 0x0030, 0x0); + snd_soc_update_bits(codec, RT5668_DEPOP_1, 0x000b, + 0x000b); + } + break; + + default: + return 0; + } + + return 0; +} + +static int rt5668_bst2_power(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + snd_soc_update_bits(codec, RT5668_PWR_ANLG_2, + RT5668_PWR_BST2_MASK | RT5668_PWR_BST2_OP_MASK, + RT5668_PWR_BST2 | RT5668_PWR_BST2_OP); + break; + + case SND_SOC_DAPM_PRE_PMD: + snd_soc_update_bits(codec, RT5668_PWR_ANLG_2, + RT5668_PWR_BST2_MASK | RT5668_PWR_BST2_OP_MASK, 0); + break; + + default: + return 0; + } + + return 0; +} + +static int rt5663_pre_div_power(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + snd_soc_write(codec, RT5663_PRE_DIV_GATING_1, 0xff00); + snd_soc_write(codec, RT5663_PRE_DIV_GATING_2, 0xfffc); + break; + + case SND_SOC_DAPM_PRE_PMD: + snd_soc_write(codec, RT5663_PRE_DIV_GATING_1, 0x0000); + snd_soc_write(codec, RT5663_PRE_DIV_GATING_2, 0x0000); + break; + + default: + return 0; + } + + return 0; +} + +static const struct snd_soc_dapm_widget rt5668_dapm_widgets[] = { + SND_SOC_DAPM_SUPPLY("PLL", RT5668_PWR_ANLG_3, RT5668_PWR_PLL_SHIFT, 0, + NULL, 0), + + /* micbias */ + SND_SOC_DAPM_MICBIAS("MICBIAS1", RT5668_PWR_ANLG_2, + RT5668_PWR_MB1_SHIFT, 0), + SND_SOC_DAPM_MICBIAS("MICBIAS2", RT5668_PWR_ANLG_2, + RT5668_PWR_MB2_SHIFT, 0), + + /* Input Lines */ + SND_SOC_DAPM_INPUT("IN1P"), + SND_SOC_DAPM_INPUT("IN1N"), + + /* REC Mixer Power */ + SND_SOC_DAPM_SUPPLY("RECMIX1L Power", RT5668_PWR_ANLG_2, + RT5668_PWR_RECMIX1_SHIFT, 0, NULL, 0), + + /* ADCs */ + SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_SUPPLY("ADC L Power", RT5668_PWR_DIG_1, + RT5668_PWR_ADC_L1_SHIFT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("ADC Clock", RT5668_CHOP_ADC, + RT5668_CKGEN_ADCC_SHIFT, 0, NULL, 0), + + /* ADC Mixer */ + SND_SOC_DAPM_MIXER("STO1 ADC MIXL", SND_SOC_NOPM, + 0, 0, rt5668_sto1_adc_l_mix, + ARRAY_SIZE(rt5668_sto1_adc_l_mix)), + + /* ADC Filter Power */ + SND_SOC_DAPM_SUPPLY("STO1 ADC Filter", RT5668_PWR_DIG_2, + RT5668_PWR_ADC_S1F_SHIFT, 0, NULL, 0), + + /* Digital Interface */ + SND_SOC_DAPM_SUPPLY("I2S", RT5668_PWR_DIG_1, RT5668_PWR_I2S1_SHIFT, 0, + NULL, 0), + SND_SOC_DAPM_PGA("IF DAC", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("IF1 ADC1", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("IF ADC", SND_SOC_NOPM, 0, 0, NULL, 0), + + /* Audio Interface */ + SND_SOC_DAPM_AIF_IN("AIFRX", "AIF Playback", 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_OUT("AIFTX", "AIF Capture", 0, SND_SOC_NOPM, 0, 0), + + /* DAC mixer before sound effect */ + SND_SOC_DAPM_MIXER("ADDA MIXL", SND_SOC_NOPM, 0, 0, rt5668_adda_l_mix, + ARRAY_SIZE(rt5668_adda_l_mix)), + SND_SOC_DAPM_MIXER("ADDA MIXR", SND_SOC_NOPM, 0, 0, rt5668_adda_r_mix, + ARRAY_SIZE(rt5668_adda_r_mix)), + SND_SOC_DAPM_PGA("DAC L1", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("DAC R1", SND_SOC_NOPM, 0, 0, NULL, 0), + + /* DAC Mixer */ + SND_SOC_DAPM_SUPPLY("STO1 DAC Filter", RT5668_PWR_DIG_2, + RT5668_PWR_DAC_S1F_SHIFT, 0, NULL, 0), + SND_SOC_DAPM_MIXER("STO1 DAC MIXL", SND_SOC_NOPM, 0, 0, + rt5668_sto1_dac_l_mix, ARRAY_SIZE(rt5668_sto1_dac_l_mix)), + SND_SOC_DAPM_MIXER("STO1 DAC MIXR", SND_SOC_NOPM, 0, 0, + rt5668_sto1_dac_r_mix, ARRAY_SIZE(rt5668_sto1_dac_r_mix)), + + /* DACs */ + SND_SOC_DAPM_SUPPLY("STO1 DAC L Power", RT5668_PWR_DIG_1, + RT5668_PWR_DAC_L1_SHIFT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("STO1 DAC R Power", RT5668_PWR_DIG_1, + RT5668_PWR_DAC_R1_SHIFT, 0, NULL, 0), + SND_SOC_DAPM_DAC("DAC L", NULL, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_DAC("DAC R", NULL, SND_SOC_NOPM, 0, 0), + + /* Headphone*/ + SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0, rt5668_hp_event, + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), + + /* Output Lines */ + SND_SOC_DAPM_OUTPUT("HPOL"), + SND_SOC_DAPM_OUTPUT("HPOR"), +}; + +static const struct snd_soc_dapm_widget rt5668_specific_dapm_widgets[] = { + SND_SOC_DAPM_SUPPLY("LDO2", RT5668_PWR_ANLG_3, + RT5668_PWR_LDO2_SHIFT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5668_PWR_VOL, + RT5668_PWR_MIC_DET_SHIFT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("LDO DAC", RT5668_PWR_DIG_1, + RT5668_PWR_LDO_DACREF_SHIFT, 0, NULL, 0), + + /* ASRC */ + SND_SOC_DAPM_SUPPLY("I2S ASRC", RT5668_ASRC_1, + RT5668_I2S1_ASRC_SHIFT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("DAC ASRC", RT5668_ASRC_1, + RT5668_DAC_STO1_ASRC_SHIFT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("ADC ASRC", RT5668_ASRC_1, + RT5668_ADC_STO1_ASRC_SHIFT, 0, NULL, 0), + + /* Input Lines */ + SND_SOC_DAPM_INPUT("IN2P"), + SND_SOC_DAPM_INPUT("IN2N"), + + /* Boost */ + SND_SOC_DAPM_PGA("BST1 CBJ", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("CBJ Power", RT5668_PWR_ANLG_3, + RT5668_PWR_CBJ_SHIFT, 0, NULL, 0), + SND_SOC_DAPM_PGA("BST2", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("BST2 Power", SND_SOC_NOPM, 0, 0, + rt5668_bst2_power, SND_SOC_DAPM_PRE_PMD | + SND_SOC_DAPM_POST_PMU), + + /* REC Mixer */ + SND_SOC_DAPM_MIXER("RECMIX1L", SND_SOC_NOPM, 0, 0, rt5668_recmix1l, + ARRAY_SIZE(rt5668_recmix1l)), + SND_SOC_DAPM_MIXER("RECMIX1R", SND_SOC_NOPM, 0, 0, rt5668_recmix1r, + ARRAY_SIZE(rt5668_recmix1r)), + SND_SOC_DAPM_SUPPLY("RECMIX1R Power", RT5668_PWR_ANLG_2, + RT5668_PWR_RECMIX2_SHIFT, 0, NULL, 0), + + /* ADC */ + SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_SUPPLY("ADC R Power", RT5668_PWR_DIG_1, + RT5668_PWR_ADC_R1_SHIFT, 0, NULL, 0), + + /* ADC Mux */ + SND_SOC_DAPM_PGA("STO1 ADC L1", RT5668_STO1_ADC_MIXER, + RT5668_STO1_ADC_L1_SRC_SHIFT, 0, NULL, 0), + SND_SOC_DAPM_PGA("STO1 ADC R1", RT5668_STO1_ADC_MIXER, + RT5668_STO1_ADC_R1_SRC_SHIFT, 0, NULL, 0), + SND_SOC_DAPM_PGA("STO1 ADC L2", RT5668_STO1_ADC_MIXER, + RT5668_STO1_ADC_L2_SRC_SHIFT, 1, NULL, 0), + SND_SOC_DAPM_PGA("STO1 ADC R2", RT5668_STO1_ADC_MIXER, + RT5668_STO1_ADC_R2_SRC_SHIFT, 1, NULL, 0), + + SND_SOC_DAPM_MUX("STO1 ADC L Mux", SND_SOC_NOPM, 0, 0, + &rt5668_sto1_adcl_mux), + SND_SOC_DAPM_MUX("STO1 ADC R Mux", SND_SOC_NOPM, 0, 0, + &rt5668_sto1_adcr_mux), + + /* ADC Mix */ + SND_SOC_DAPM_MIXER("STO1 ADC MIXR", SND_SOC_NOPM, 0, 0, + rt5668_sto1_adc_r_mix, ARRAY_SIZE(rt5668_sto1_adc_r_mix)), + + /* Analog DAC Clock */ + SND_SOC_DAPM_SUPPLY("DAC Clock", RT5668_CHOP_DAC, + RT5668_CKGEN_DAC1_SHIFT, 0, NULL, 0), + + /* Headphone out */ + SND_SOC_DAPM_SWITCH("HPO Playback", SND_SOC_NOPM, 0, 0, + &rt5668_hpo_switch), +}; + +static const struct snd_soc_dapm_widget rt5663_specific_dapm_widgets[] = { + /* System Clock Pre Divider Gating */ + SND_SOC_DAPM_SUPPLY("Pre Div Power", SND_SOC_NOPM, 0, 0, + rt5663_pre_div_power, SND_SOC_DAPM_POST_PMU | + SND_SOC_DAPM_PRE_PMD), + + /* LDO */ + SND_SOC_DAPM_SUPPLY("LDO ADC", RT5668_PWR_DIG_1, + RT5668_PWR_LDO_DACREF_SHIFT, 0, NULL, 0), + + /* ASRC */ + SND_SOC_DAPM_SUPPLY("I2S ASRC", RT5668_ASRC_1, + RT5663_I2S1_ASRC_SHIFT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("DAC ASRC", RT5668_ASRC_1, + RT5663_DAC_STO1_ASRC_SHIFT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("ADC ASRC", RT5668_ASRC_1, + RT5663_ADC_STO1_ASRC_SHIFT, 0, NULL, 0), + + /* Boost */ + SND_SOC_DAPM_PGA("BST1", SND_SOC_NOPM, 0, 0, NULL, 0), + + /* STO ADC */ + SND_SOC_DAPM_PGA("STO1 ADC L1", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("STO1 ADC L2", SND_SOC_NOPM, 0, 0, NULL, 0), + + /* Analog DAC source */ + SND_SOC_DAPM_MUX("DAC L Mux", SND_SOC_NOPM, 0, 0, &rt5668_alg_dacl_mux), + SND_SOC_DAPM_MUX("DAC R Mux", SND_SOC_NOPM, 0, 0, &rt5668_alg_dacr_mux), +}; + +static const struct snd_soc_dapm_route rt5668_dapm_routes[] = { + /* PLL */ + { "I2S", NULL, "PLL", rt5668_is_sys_clk_from_pll }, + + /* ASRC */ + { "STO1 ADC Filter", NULL, "ADC ASRC", rt5668_is_using_asrc }, + { "STO1 DAC Filter", NULL, "DAC ASRC", rt5668_is_using_asrc }, + { "I2S", NULL, "I2S ASRC", rt5668_i2s_use_asrc }, + + { "ADC L", NULL, "ADC L Power" }, + { "ADC L", NULL, "ADC Clock" }, + + { "STO1 ADC L2", NULL, "STO1 DAC MIXL" }, + + { "STO1 ADC MIXL", "ADC1 Switch", "STO1 ADC L1" }, + { "STO1 ADC MIXL", "ADC2 Switch", "STO1 ADC L2" }, + { "STO1 ADC MIXL", NULL, "STO1 ADC Filter" }, + + { "IF1 ADC1", NULL, "STO1 ADC MIXL" }, + { "IF ADC", NULL, "IF1 ADC1" }, + { "AIFTX", NULL, "IF ADC" }, + { "AIFTX", NULL, "I2S" }, + + { "AIFRX", NULL, "I2S" }, + { "IF DAC", NULL, "AIFRX" }, + { "IF1 DAC1 L", NULL, "IF DAC" }, + { "IF1 DAC1 R", NULL, "IF DAC" }, + + { "ADDA MIXL", "ADC L Switch", "STO1 ADC MIXL" }, + { "ADDA MIXL", "DAC L Switch", "IF1 DAC1 L" }, + { "ADDA MIXL", NULL, "STO1 DAC Filter" }, + { "ADDA MIXL", NULL, "STO1 DAC L Power" }, + { "ADDA MIXR", "DAC R Switch", "IF1 DAC1 R" }, + { "ADDA MIXR", NULL, "STO1 DAC Filter" }, + { "ADDA MIXR", NULL, "STO1 DAC R Power" }, + + { "DAC L1", NULL, "ADDA MIXL" }, + { "DAC R1", NULL, "ADDA MIXR" }, + + { "STO1 DAC MIXL", "DAC L Switch", "DAC L1" }, + { "STO1 DAC MIXL", "DAC R Switch", "DAC R1" }, + { "STO1 DAC MIXL", NULL, "STO1 DAC L Power" }, + { "STO1 DAC MIXL", NULL, "STO1 DAC Filter" }, + { "STO1 DAC MIXR", "DAC R Switch", "DAC R1" }, + { "STO1 DAC MIXR", "DAC L Switch", "DAC L1" }, + { "STO1 DAC MIXR", NULL, "STO1 DAC R Power" }, + { "STO1 DAC MIXR", NULL, "STO1 DAC Filter" }, + + { "HP Amp", NULL, "DAC L" }, + { "HP Amp", NULL, "DAC R" }, +}; + +static const struct snd_soc_dapm_route rt5668_specific_dapm_routes[] = { + { "MICBIAS1", NULL, "LDO2" }, + { "MICBIAS2", NULL, "LDO2" }, + + { "BST1 CBJ", NULL, "IN1P" }, + { "BST1 CBJ", NULL, "IN1N" }, + { "BST1 CBJ", NULL, "CBJ Power" }, + + { "BST2", NULL, "IN2P" }, + { "BST2", NULL, "IN2N" }, + { "BST2", NULL, "BST2 Power" }, + + { "RECMIX1L", "BST2 Switch", "BST2" }, + { "RECMIX1L", "BST1 CBJ Switch", "BST1 CBJ" }, + { "RECMIX1L", NULL, "RECMIX1L Power" }, + { "RECMIX1R", "BST2 Switch", "BST2" }, + { "RECMIX1R", NULL, "RECMIX1R Power" }, + + { "ADC L", NULL, "RECMIX1L" }, + { "ADC R", NULL, "RECMIX1R" }, + { "ADC R", NULL, "ADC R Power" }, + { "ADC R", NULL, "ADC Clock" }, + + { "STO1 ADC L Mux", "ADC L", "ADC L" }, + { "STO1 ADC L Mux", "ADC R", "ADC R" }, + { "STO1 ADC L1", NULL, "STO1 ADC L Mux" }, + + { "STO1 ADC R Mux", "ADC L", "ADC L" }, + { "STO1 ADC R Mux", "ADC R", "ADC R" }, + { "STO1 ADC R1", NULL, "STO1 ADC R Mux" }, + { "STO1 ADC R2", NULL, "STO1 DAC MIXR" }, + + { "STO1 ADC MIXR", "ADC1 Switch", "STO1 ADC R1" }, + { "STO1 ADC MIXR", "ADC2 Switch", "STO1 ADC R2" }, + { "STO1 ADC MIXR", NULL, "STO1 ADC Filter" }, + + { "IF1 ADC1", NULL, "STO1 ADC MIXR" }, + + { "ADDA MIXR", "ADC R Switch", "STO1 ADC MIXR" }, + + { "DAC L", NULL, "STO1 DAC MIXL" }, + { "DAC L", NULL, "LDO DAC" }, + { "DAC L", NULL, "DAC Clock" }, + { "DAC R", NULL, "STO1 DAC MIXR" }, + { "DAC R", NULL, "LDO DAC" }, + { "DAC R", NULL, "DAC Clock" }, + + { "HPO Playback", "Switch", "HP Amp" }, + { "HPOL", NULL, "HPO Playback" }, + { "HPOR", NULL, "HPO Playback" }, +}; + +static const struct snd_soc_dapm_route rt5663_specific_dapm_routes[] = { + { "I2S", NULL, "Pre Div Power" }, + + { "BST1", NULL, "IN1P" }, + { "BST1", NULL, "IN1N" }, + { "BST1", NULL, "RECMIX1L Power" }, + + { "ADC L", NULL, "BST1" }, + + { "STO1 ADC L1", NULL, "ADC L" }, + + { "DAC L Mux", "DAC L", "DAC L1" }, + { "DAC L Mux", "STO DAC MIXL", "STO1 DAC MIXL" }, + { "DAC R Mux", "DAC R", "DAC R1"}, + { "DAC R Mux", "STO DAC MIXR", "STO1 DAC MIXR" }, + + { "DAC L", NULL, "DAC L Mux" }, + { "DAC R", NULL, "DAC R Mux" }, + + { "HPOL", NULL, "HP Amp" }, + { "HPOR", NULL, "HP Amp" }, +}; + +static int rt5668_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) +{ + struct snd_soc_codec *codec = dai->codec; + struct rt5668_priv *rt5668 = snd_soc_codec_get_drvdata(codec); + unsigned int val_len = 0, val_clk, mask_clk; + int pre_div, frame_size; + + rt5668->lrck = params_rate(params); + pre_div = rl6231_get_clk_info(rt5668->sysclk, rt5668->lrck); + if (pre_div < 0) { + dev_err(codec->dev, "Unsupported clock setting %d for DAI %d\n", + rt5668->lrck, dai->id); + return -EINVAL; + } + frame_size = snd_soc_params_to_frame_size(params); + if (frame_size < 0) { + dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size); + return -EINVAL; + } + + dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n", + rt5668->lrck * (32 << (frame_size > 32) ? 1 : 0), rt5668->lrck); + dev_dbg(dai->dev, "pre_div is %d for iis %d\n", pre_div, dai->id); + + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_S16_LE: + break; + case SNDRV_PCM_FORMAT_S20_3LE: + val_len |= RT5668_I2S_DL_20; + break; + case SNDRV_PCM_FORMAT_S24_LE: + val_len |= RT5668_I2S_DL_24; + break; + case SNDRV_PCM_FORMAT_S8: + val_len |= RT5668_I2S_DL_8; + break; + default: + return -EINVAL; + } + + mask_clk = RT5668_I2S_PD1_MASK; + val_clk = pre_div << RT5668_I2S_PD1_SHIFT; + snd_soc_update_bits(codec, RT5668_I2S1_SDP, + RT5668_I2S_DL_MASK, val_len); + + snd_soc_update_bits(codec, RT5668_ADDA_CLK_1, mask_clk, val_clk); + + return 0; +} + +static int rt5668_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) +{ + struct snd_soc_codec *codec = dai->codec; + unsigned int reg_val = 0; + + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBM_CFM: + break; + case SND_SOC_DAIFMT_CBS_CFS: + reg_val |= RT5668_I2S_MS_S; + break; + default: + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + break; + case SND_SOC_DAIFMT_IB_NF: + reg_val |= RT5668_I2S_BP_INV; + break; + default: + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + break; + case SND_SOC_DAIFMT_LEFT_J: + reg_val |= RT5668_I2S_DF_LEFT; + break; + case SND_SOC_DAIFMT_DSP_A: + reg_val |= RT5668_I2S_DF_PCM_A; + break; + case SND_SOC_DAIFMT_DSP_B: + reg_val |= RT5668_I2S_DF_PCM_B; + break; + default: + return -EINVAL; + } + + snd_soc_update_bits(codec, RT5668_I2S1_SDP, RT5668_I2S_MS_MASK | + RT5668_I2S_BP_MASK | RT5668_I2S_DF_MASK, reg_val); + + return 0; +} + +static int rt5668_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id, + unsigned int freq, int dir) +{ + struct snd_soc_codec *codec = dai->codec; + struct rt5668_priv *rt5668 = snd_soc_codec_get_drvdata(codec); + unsigned int reg_val = 0; + + if (freq == rt5668->sysclk && clk_id == rt5668->sysclk_src) + return 0; + + switch (clk_id) { + case RT5668_SCLK_S_MCLK: + reg_val |= RT5668_SCLK_SRC_MCLK; + break; + case RT5668_SCLK_S_PLL1: + reg_val |= RT5668_SCLK_SRC_PLL1; + break; + case RT5668_SCLK_S_RCCLK: + reg_val |= RT5668_SCLK_SRC_RCCLK; + break; + default: + dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id); + return -EINVAL; + } + snd_soc_update_bits(codec, RT5668_GLB_CLK, RT5668_SCLK_SRC_MASK, + reg_val); + rt5668->sysclk = freq; + rt5668->sysclk_src = clk_id; + + dev_dbg(codec->dev, "Sysclk is %dHz and clock id is %d\n", + freq, clk_id); + + return 0; +} + +static int rt5668_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source, + unsigned int freq_in, unsigned int freq_out) +{ + struct snd_soc_codec *codec = dai->codec; + struct rt5668_priv *rt5668 = snd_soc_codec_get_drvdata(codec); + struct rl6231_pll_code pll_code; + int ret; + int mask, shift, val; + + if (source == rt5668->pll_src && freq_in == rt5668->pll_in && + freq_out == rt5668->pll_out) + return 0; + + if (!freq_in || !freq_out) { + dev_dbg(codec->dev, "PLL disabled\n"); + + rt5668->pll_in = 0; + rt5668->pll_out = 0; + snd_soc_update_bits(codec, RT5668_GLB_CLK, + RT5668_SCLK_SRC_MASK, RT5668_SCLK_SRC_MCLK); + return 0; + } + + if (rt5668->codec_type == CODEC_TYPE_RT5668) { + mask = RT5668_PLL1_SRC_MASK; + shift = RT5668_PLL1_SRC_SHIFT; + } else { + mask = RT5663_PLL1_SRC_MASK; + shift = RT5663_PLL1_SRC_SHIFT; + } + + switch (source) { + case RT5668_PLL1_S_MCLK: + val = 0x0; + break; + case RT5668_PLL1_S_BCLK1: + val = 0x1; + break; + default: + dev_err(codec->dev, "Unknown PLL source %d\n", source); + return -EINVAL; + } + snd_soc_update_bits(codec, RT5668_GLB_CLK, mask, (val << shift)); + + ret = rl6231_pll_calc(freq_in, freq_out, &pll_code); + if (ret < 0) { + dev_err(codec->dev, "Unsupport input clock %d\n", freq_in); + return ret; + } + + dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n", pll_code.m_bp, + (pll_code.m_bp ? 0 : pll_code.m_code), pll_code.n_code, + pll_code.k_code); + + snd_soc_write(codec, RT5668_PLL_1, + pll_code.n_code << RT5668_PLL_N_SHIFT | pll_code.k_code); + snd_soc_write(codec, RT5668_PLL_2, + (pll_code.m_bp ? 0 : pll_code.m_code) << RT5668_PLL_M_SHIFT | + pll_code.m_bp << RT5668_PLL_M_BP_SHIFT); + + rt5668->pll_in = freq_in; + rt5668->pll_out = freq_out; + rt5668->pll_src = source; + + return 0; +} + +static int rt5668_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, + unsigned int rx_mask, int slots, int slot_width) +{ + struct snd_soc_codec *codec = dai->codec; + struct rt5668_priv *rt5668 = snd_soc_codec_get_drvdata(codec); + unsigned int val = 0, reg; + + if (rx_mask || tx_mask) + val |= RT5668_TDM_MODE_TDM; + + switch (slots) { + case 4: + val |= RT5668_TDM_IN_CH_4; + val |= RT5668_TDM_OUT_CH_4; + break; + case 6: + val |= RT5668_TDM_IN_CH_6; + val |= RT5668_TDM_OUT_CH_6; + break; + case 8: + val |= RT5668_TDM_IN_CH_8; + val |= RT5668_TDM_OUT_CH_8; + break; + case 2: + break; + default: + return -EINVAL; + } + + switch (slot_width) { + case 20: + val |= RT5668_TDM_IN_LEN_20; + val |= RT5668_TDM_OUT_LEN_20; + break; + case 24: + val |= RT5668_TDM_IN_LEN_24; + val |= RT5668_TDM_OUT_LEN_24; + break; + case 32: + val |= RT5668_TDM_IN_LEN_32; + val |= RT5668_TDM_OUT_LEN_32; + break; + case 16: + break; + default: + return -EINVAL; + } + + if (rt5668->codec_type == CODEC_TYPE_RT5668) + reg = RT5668_TDM_1; + else + reg = RT5663_TDM_1; + + snd_soc_update_bits(codec, reg, RT5668_TDM_MODE_MASK | + RT5668_TDM_IN_CH_MASK | RT5668_TDM_OUT_CH_MASK | + RT5668_TDM_IN_LEN_MASK | RT5668_TDM_OUT_LEN_MASK, val); + + return 0; +} + +static int rt5668_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio) +{ + struct snd_soc_codec *codec = dai->codec; + struct rt5668_priv *rt5668 = snd_soc_codec_get_drvdata(codec); + + dev_dbg(codec->dev, "%s ratio = %d\n", __func__, ratio); + + if (rt5668->codec_type == CODEC_TYPE_RT5663) { + switch (ratio) { + case 32: + snd_soc_update_bits(codec, RT5663_TDM_5, + RT5663_TDM_LENGTN_MASK, + RT5663_TDM_LENGTN_16); + break; + case 40: + snd_soc_update_bits(codec, RT5663_TDM_5, + RT5663_TDM_LENGTN_MASK, + RT5663_TDM_LENGTN_20); + break; + case 48: + snd_soc_update_bits(codec, RT5663_TDM_5, + RT5663_TDM_LENGTN_MASK, + RT5663_TDM_LENGTN_24); + break; + case 64: + snd_soc_update_bits(codec, RT5663_TDM_5, + RT5663_TDM_LENGTN_MASK, + RT5663_TDM_LENGTN_32); + break; + default: + dev_err(codec->dev, "Invalid ratio!\n"); + return -EINVAL; + } + } + + return 0; +} + +static int rt5668_set_bias_level(struct snd_soc_codec *codec, + enum snd_soc_bias_level level) +{ + struct rt5668_priv *rt5668 = snd_soc_codec_get_drvdata(codec); + + switch (level) { + case SND_SOC_BIAS_ON: + snd_soc_update_bits(codec, RT5668_PWR_ANLG_1, + RT5668_PWR_FV1_MASK | RT5668_PWR_FV2_MASK, + RT5668_PWR_FV1 | RT5668_PWR_FV2); + break; + + case SND_SOC_BIAS_PREPARE: + if (rt5668->codec_type == CODEC_TYPE_RT5668) { + snd_soc_update_bits(codec, RT5668_DIG_MISC, + RT5668_DIG_GATE_CTRL_MASK, + RT5668_DIG_GATE_CTRL_EN); + snd_soc_update_bits(codec, RT5668_MCLK_DET, + RT5668_EN_ANA_CLK_DET_MASK | + RT5668_PWR_CLK_DET_MASK, + RT5668_EN_ANA_CLK_DET_AUTO | + RT5668_PWR_CLK_DET_EN); + } + break; + + case SND_SOC_BIAS_STANDBY: + if (rt5668->codec_type == CODEC_TYPE_RT5668) + snd_soc_update_bits(codec, RT5668_DIG_MISC, + RT5668_DIG_GATE_CTRL_MASK, + RT5668_DIG_GATE_CTRL_DIS); + snd_soc_update_bits(codec, RT5668_PWR_ANLG_1, + RT5668_PWR_VREF1_MASK | RT5668_PWR_VREF2_MASK | + RT5668_PWR_FV1_MASK | RT5668_PWR_FV2_MASK | + RT5668_PWR_MB_MASK, RT5668_PWR_VREF1 | + RT5668_PWR_VREF2 | RT5668_PWR_MB); + usleep_range(10000, 10005); + if (rt5668->codec_type == CODEC_TYPE_RT5668) { + snd_soc_update_bits(codec, RT5668_MCLK_DET, + RT5668_EN_ANA_CLK_DET_MASK | + RT5668_PWR_CLK_DET_MASK, + RT5668_EN_ANA_CLK_DET_DIS | + RT5668_PWR_CLK_DET_DIS); + } + break; + + case SND_SOC_BIAS_OFF: + snd_soc_update_bits(codec, RT5668_PWR_ANLG_1, + RT5668_PWR_VREF1_MASK | RT5668_PWR_VREF2_MASK | + RT5668_PWR_FV1 | RT5668_PWR_FV2, 0x0); + break; + + default: + break; + } + + return 0; +} + +static int rt5668_probe(struct snd_soc_codec *codec) +{ + struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); + struct rt5668_priv *rt5668 = snd_soc_codec_get_drvdata(codec); + + rt5668->codec = codec; + + switch (rt5668->codec_type) { + case CODEC_TYPE_RT5668: + snd_soc_dapm_new_controls(dapm, + rt5668_specific_dapm_widgets, + ARRAY_SIZE(rt5668_specific_dapm_widgets)); + snd_soc_dapm_add_routes(dapm, + rt5668_specific_dapm_routes, + ARRAY_SIZE(rt5668_specific_dapm_routes)); + snd_soc_add_codec_controls(codec, rt5668_specific_controls, + ARRAY_SIZE(rt5668_specific_controls)); + break; + case CODEC_TYPE_RT5663: + snd_soc_dapm_new_controls(dapm, + rt5663_specific_dapm_widgets, + ARRAY_SIZE(rt5663_specific_dapm_widgets)); + snd_soc_dapm_add_routes(dapm, + rt5663_specific_dapm_routes, + ARRAY_SIZE(rt5663_specific_dapm_routes)); + snd_soc_add_codec_controls(codec, rt5663_specific_controls, + ARRAY_SIZE(rt5663_specific_controls)); + break; + } + + return 0; +} + +static int rt5668_remove(struct snd_soc_codec *codec) +{ + struct rt5668_priv *rt5668 = snd_soc_codec_get_drvdata(codec); + + regmap_write(rt5668->regmap, RT5668_RESET, 0); + + return 0; +} + +#ifdef CONFIG_PM +static int rt5668_suspend(struct snd_soc_codec *codec) +{ + struct rt5668_priv *rt5668 = snd_soc_codec_get_drvdata(codec); + + regcache_cache_only(rt5668->regmap, true); + regcache_mark_dirty(rt5668->regmap); + + return 0; +} + +static int rt5668_resume(struct snd_soc_codec *codec) +{ + struct rt5668_priv *rt5668 = snd_soc_codec_get_drvdata(codec); + + regcache_cache_only(rt5668->regmap, false); + regcache_sync(rt5668->regmap); + + return 0; +} +#else +#define rt5668_suspend NULL +#define rt5668_resume NULL +#endif + +#define RT5668_STEREO_RATES SNDRV_PCM_RATE_8000_192000 +#define RT5668_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ + SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8) + +struct snd_soc_dai_ops rt5668_aif_dai_ops = { + .hw_params = rt5668_hw_params, + .set_fmt = rt5668_set_dai_fmt, + .set_sysclk = rt5668_set_dai_sysclk, + .set_pll = rt5668_set_dai_pll, + .set_tdm_slot = rt5668_set_tdm_slot, + .set_bclk_ratio = rt5668_set_bclk_ratio, +}; + +struct snd_soc_dai_driver rt5668_dai[] = { + { + .name = "rt5668-aif", + .id = RT5668_AIF, + .playback = { + .stream_name = "AIF Playback", + .channels_min = 1, + .channels_max = 2, + .rates = RT5668_STEREO_RATES, + .formats = RT5668_FORMATS, + }, + .capture = { + .stream_name = "AIF Capture", + .channels_min = 1, + .channels_max = 2, + .rates = RT5668_STEREO_RATES, + .formats = RT5668_FORMATS, + }, + .ops = &rt5668_aif_dai_ops, + }, +}; + +static struct snd_soc_codec_driver soc_codec_dev_rt5668 = { + .probe = rt5668_probe, + .remove = rt5668_remove, + .suspend = rt5668_suspend, + .resume = rt5668_resume, + .set_bias_level = rt5668_set_bias_level, + .idle_bias_off = true, + .controls = rt5668_snd_controls, + .num_controls = ARRAY_SIZE(rt5668_snd_controls), + .dapm_widgets = rt5668_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(rt5668_dapm_widgets), + .dapm_routes = rt5668_dapm_routes, + .num_dapm_routes = ARRAY_SIZE(rt5668_dapm_routes), +}; + +static const struct regmap_config rt5668_regmap = { + .reg_bits = 16, + .val_bits = 16, + .use_single_rw = true, + .max_register = 0x07fa, + .volatile_reg = rt5668_volatile_register, + .readable_reg = rt5668_readable_register, + .cache_type = REGCACHE_RBTREE, + .reg_defaults = rt5668_reg, + .num_reg_defaults = ARRAY_SIZE(rt5668_reg), +}; + +static const struct regmap_config rt5663_regmap = { + .reg_bits = 16, + .val_bits = 16, + .use_single_rw = true, + .max_register = 0x03f3, + .volatile_reg = rt5663_volatile_register, + .readable_reg = rt5663_readable_register, + .cache_type = REGCACHE_RBTREE, + .reg_defaults = rt5663_reg, + .num_reg_defaults = ARRAY_SIZE(rt5663_reg), +}; + +static const struct regmap_config temp_regmap = { + .name = "nocache", + .reg_bits = 16, + .val_bits = 16, + .use_single_rw = true, + .max_register = 0x03f3, + .cache_type = REGCACHE_NONE, +}; + +static const struct i2c_device_id rt5668_i2c_id[] = { + { "rt5668", 0 }, + { "rt5663", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, rt5668_i2c_id); + +#if defined(CONFIG_OF) +static const struct of_device_id rt5668_of_match[] = { + { .compatible = "realtek,rt5668", }, + { .compatible = "realtek,rt5663", }, + {}, +}; +MODULE_DEVICE_TABLE(of, rt5668_of_match); +#endif + +#ifdef CONFIG_ACPI +static struct acpi_device_id rt5668_acpi_match[] = { + { "10EC5668", 0}, + { "10EC5663", 0}, + {}, +}; +MODULE_DEVICE_TABLE(acpi, rt5668_acpi_match); +#endif + +static void rt5668_calibrate(struct rt5668_priv *rt5668) +{ + regmap_write(rt5668->regmap, 0x0111, 0xa402); + regmap_write(rt5668->regmap, 0x0061, 0x0100); + regmap_write(rt5668->regmap, 0x0010, 0x4040); + regmap_write(rt5668->regmap, 0x00fa, 0x0001); + regmap_write(rt5668->regmap, 0x0094, 0x0380); + regmap_write(rt5668->regmap, 0x0080, 0x8000); + regmap_write(rt5668->regmap, 0x0073, 0x1000); + regmap_write(rt5668->regmap, 0x013a, 0x3030); + regmap_write(rt5668->regmap, 0x013c, 0x3c05); + regmap_write(rt5668->regmap, 0x0063, 0xa23e); + msleep(40); + regmap_write(rt5668->regmap, 0x0063, 0xf23e); + regmap_write(rt5668->regmap, 0x01df, 0x0321); + regmap_write(rt5668->regmap, 0x01de, 0xfc00); + msleep(500); +} + +static void rt5663_calibrate(struct rt5668_priv *rt5668) +{ + regmap_write(rt5668->regmap, 0x00fa, 0x8001); + regmap_write(rt5668->regmap, 0x0063, 0xa2b8); + msleep(50); + regmap_write(rt5668->regmap, 0x0062, 0x8400); + regmap_write(rt5668->regmap, 0x0061, 0x8df8); + regmap_write(rt5668->regmap, 0x0064, 0x0003); + regmap_write(rt5668->regmap, 0x0065, 0x018c); + regmap_write(rt5668->regmap, 0x0073, 0x0000); + regmap_write(rt5668->regmap, 0x006e, 0xffff); + regmap_write(rt5668->regmap, 0x006f, 0xffff); + regmap_write(rt5668->regmap, 0x008f, 0x3003); + regmap_write(rt5668->regmap, 0x008e, 0x003b); + regmap_write(rt5668->regmap, 0x0091, 0x1e32); + regmap_write(rt5668->regmap, 0x0092, 0x1371); + regmap_write(rt5668->regmap, 0x0112, 0x3b0b); + regmap_write(rt5668->regmap, 0x002a, 0x2080); + regmap_write(rt5668->regmap, 0x002d, 0x000c); + regmap_write(rt5668->regmap, 0x0202, 0xabba); + regmap_write(rt5668->regmap, 0x0125, 0x2224); + regmap_write(rt5668->regmap, 0x0002, 0x8088); + regmap_write(rt5668->regmap, 0x0168, 0x0017); + regmap_write(rt5668->regmap, 0x0169, 0x0017); + regmap_write(rt5668->regmap, 0x0026, 0x4040); + regmap_write(rt5668->regmap, 0x013b, 0x3000); + regmap_write(rt5668->regmap, 0x0010, 0x0005); + regmap_write(rt5668->regmap, 0x0074, 0xc000); + regmap_write(rt5668->regmap, 0x00ec, 0x3320); + regmap_write(rt5668->regmap, 0x01df, 0x00c9); + regmap_write(rt5668->regmap, 0x02fa, 0x004c); + regmap_write(rt5668->regmap, 0x0108, 0x7766); + regmap_write(rt5668->regmap, 0x0111, 0x4702); + regmap_write(rt5668->regmap, 0x0063, 0xf2b8); + regmap_write(rt5668->regmap, 0x0118, 0x0007); + msleep(200); + regmap_write(rt5668->regmap, 0x01dd, 0x0069); + regmap_write(rt5668->regmap, 0x01e0, 0x06c2); + regmap_write(rt5668->regmap, 0x01de, 0x7b00); + regmap_write(rt5668->regmap, 0x01de, 0xfb00); + msleep(500); +} + +static int rt5668_i2c_probe(struct i2c_client *i2c, + const struct i2c_device_id *id) +{ + struct rt5668_priv *rt5668; + int ret; + unsigned int val; + struct regmap *regmap; + + rt5668 = devm_kzalloc(&i2c->dev, sizeof(struct rt5668_priv), + GFP_KERNEL); + + if (rt5668 == NULL) + return -ENOMEM; + + i2c_set_clientdata(i2c, rt5668); + + regmap = devm_regmap_init_i2c(i2c, &temp_regmap); + if (IS_ERR(regmap)) { + ret = PTR_ERR(regmap); + dev_err(&i2c->dev, "Failed to allocate temp register map: %d\n", + ret); + return ret; + } + regmap_read(regmap, RT5668_VENDOR_ID_2, &val); + switch (val) { + case RT5668_DEVICE_ID: + rt5668->regmap = devm_regmap_init_i2c(i2c, &rt5668_regmap); + rt5668->codec_type = CODEC_TYPE_RT5668; + break; + case RT5663_DEVICE_ID: + rt5668->regmap = devm_regmap_init_i2c(i2c, &rt5663_regmap); + rt5668->codec_type = CODEC_TYPE_RT5663; + break; + default: + dev_err(&i2c->dev, + "Device with ID register %#x is not rt5663 or rt5668\n", + val); + return -ENODEV; + } + + if (IS_ERR(rt5668->regmap)) { + ret = PTR_ERR(rt5668->regmap); + dev_err(&i2c->dev, "Failed to allocate register map: %d\n", + ret); + return ret; + } + + /* reset and calibrate */ + regmap_write(rt5668->regmap, RT5668_RESET, 0); + regcache_cache_bypass(rt5668->regmap, true); + if (rt5668->codec_type == CODEC_TYPE_RT5668) + rt5668_calibrate(rt5668); + else + rt5663_calibrate(rt5668); + regcache_cache_bypass(rt5668->regmap, false); + regmap_write(rt5668->regmap, RT5668_RESET, 0); + dev_dbg(&i2c->dev, "calibrate done\n"); + + /* GPIO1 as IRQ */ + regmap_update_bits(rt5668->regmap, RT5668_GPIO_1, RT5668_GP1_PIN_MASK, + RT5668_GP1_PIN_IRQ); + /* 4btn inline command debounce */ + regmap_update_bits(rt5668->regmap, RT5668_4BTN_IL_CMD_1, + RT5668_4BTN_CLK_DEB_MASK, RT5668_4BTN_CLK_DEB_65MS); + + if (rt5668->codec_type == CODEC_TYPE_RT5668) { + regmap_write(rt5668->regmap, RT5668_BIAS_CUR_8, 0xa402); + /* JD1 */ + regmap_update_bits(rt5668->regmap, RT5668_AUTO_RC_CLK, + RT5668_IRQ_POW_SAV_MASK | RT5668_IRQ_POW_SAV_JD1_MASK, + RT5668_IRQ_POW_SAV_EN | RT5668_IRQ_POW_SAV_JD1_EN); + regmap_update_bits(rt5668->regmap, RT5668_PWR_ANLG_2, + RT5668_PWR_JD1_MASK, RT5668_PWR_JD1); + regmap_update_bits(rt5668->regmap, RT5668_IRQ_1, + RT5668_EN_CB_JD_MASK, RT5668_EN_CB_JD_EN); + + regmap_update_bits(rt5668->regmap, RT5668_HP_LOGIC_2, + RT5668_HP_SIG_SRC1_MASK, RT5668_HP_SIG_SRC1_REG); + regmap_update_bits(rt5668->regmap, RT5668_CBJ_TYPE_1, + RT5668_VREF_BIAS_MASK | RT5668_CBJ_DET_MASK | + RT5668_DET_TYPE_MASK, RT5668_VREF_BIAS_REG | + RT5668_CBJ_DET_EN | RT5668_DET_TYPE_QFN); + /* Set GPIO4 and GPIO8 as input for combo jack */ + regmap_update_bits(rt5668->regmap, RT5668_GPIO_2, + RT5668_GP4_PIN_CONF_MASK, RT5668_GP4_PIN_CONF_INPUT); + regmap_update_bits(rt5668->regmap, RT5668_GPIO_3, + RT5668_GP8_PIN_CONF_MASK, RT5668_GP8_PIN_CONF_INPUT); + regmap_update_bits(rt5668->regmap, RT5668_PWR_ANLG_1, + RT5668_LDO1_DVO_MASK | RT5668_AMP_HP_MASK, + RT5668_LDO1_DVO_0_9V | RT5668_AMP_HP_3X); + } else { + regmap_update_bits(rt5668->regmap, RT5668_DIG_MISC, + RT5668_DIG_GATE_CTRL_MASK, RT5668_DIG_GATE_CTRL_EN); + regmap_update_bits(rt5668->regmap, RT5668_HP_CHARGE_PUMP_1, + RT5663_SI_HP_MASK | RT5668_OSW_HP_L_MASK | + RT5668_OSW_HP_R_MASK, RT5663_SI_HP_EN | + RT5668_OSW_HP_L_DIS | RT5668_OSW_HP_R_DIS); + regmap_update_bits(rt5668->regmap, RT5663_DUMMY_1, + RT5663_EMB_CLK_MASK | RT5663_HPA_CPL_BIAS_MASK | + RT5663_HPA_CPR_BIAS_MASK, RT5663_EMB_CLK_EN | + RT5663_HPA_CPL_BIAS_1 | RT5663_HPA_CPR_BIAS_1); + regmap_update_bits(rt5668->regmap, RT5663_CBJ_1, + RT5663_INBUF_CBJ_BST1_MASK | RT5663_CBJ_SENSE_BST1_MASK, + RT5663_INBUF_CBJ_BST1_ON | RT5663_CBJ_SENSE_BST1_L); + regmap_update_bits(rt5668->regmap, RT5668_IL_CMD_2, + RT5663_PWR_MIC_DET_MASK, RT5663_PWR_MIC_DET_ON); + /* BST1 power on for JD */ + regmap_update_bits(rt5668->regmap, RT5668_PWR_ANLG_2, + RT5668_PWR_BST1_MASK, RT5668_PWR_BST1_ON); + regmap_update_bits(rt5668->regmap, RT5663_EM_JACK_TYPE_1, + RT5663_CBJ_DET_MASK | RT5663_EXT_JD_MASK | + RT5663_POL_EXT_JD_MASK, RT5663_CBJ_DET_EN | + RT5663_EXT_JD_EN | RT5663_POL_EXT_JD_EN); + regmap_update_bits(rt5668->regmap, RT5668_PWR_ANLG_1, + RT5668_PWR_MB_MASK | RT5668_LDO1_DVO_MASK | + RT5668_AMP_HP_MASK, RT5668_PWR_MB | + RT5668_LDO1_DVO_0_9V | RT5668_AMP_HP_3X); + regmap_update_bits(rt5668->regmap, RT5668_AUTO_RC_CLK, + RT5668_IRQ_POW_SAV_MASK, RT5668_IRQ_POW_SAV_EN); + regmap_update_bits(rt5668->regmap, RT5668_IRQ_1, + RT5663_EN_IRQ_JD1_MASK, RT5663_EN_IRQ_JD1_EN); + regmap_update_bits(rt5668->regmap, RT5668_GPIO_2, + RT5663_GP1_PIN_CONF_MASK, RT5663_GP1_PIN_CONF_OUTPUT); + /* DACREF LDO control */ + regmap_update_bits(rt5668->regmap, RT5663_DACREF_LDO, 0x3e0e, + 0x3a0a); + /* RECMIX */ + regmap_update_bits(rt5668->regmap, RT5663_RECMIX, + RT5663_RECMIX1_BST1_MASK, RT5663_RECMIX1_BST1_UNMUTE); + /* ADCDAT L/L */ + regmap_update_bits(rt5668->regmap, RT5668_TDM_1, + RT5663_DATA_SWAP_ADCDAT1_MASK, + RT5663_DATA_SWAP_ADCDAT1_LL); + } + + setup_timer(&rt5668->btn_check_timer, rt5668_btn_check_callback, + (unsigned long)rt5668); + INIT_DELAYED_WORK(&rt5668->jack_detect_work, rt5668_jack_detect_work); + + if (i2c->irq) { + ret = request_threaded_irq(i2c->irq, NULL, rt5668_irq, + IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING + | IRQF_ONESHOT, "rt5668", rt5668); + if (ret) + dev_err(&i2c->dev, "%s Failed to reguest IRQ: %d\n", + __func__, ret); + } + + ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5668, + rt5668_dai, ARRAY_SIZE(rt5668_dai)); + + if (ret) { + if (i2c->irq) + free_irq(i2c->irq, rt5668); + } + + return ret; +} + +static int rt5668_i2c_remove(struct i2c_client *i2c) +{ + struct rt5668_priv *rt5668 = i2c_get_clientdata(i2c); + + if (i2c->irq) + free_irq(i2c->irq, rt5668); + + snd_soc_unregister_codec(&i2c->dev); + + return 0; +} + +void rt5668_i2c_shutdown(struct i2c_client *client) +{ + struct rt5668_priv *rt5668 = i2c_get_clientdata(client); + + regmap_write(rt5668->regmap, RT5668_RESET, 0); +} + +struct i2c_driver rt5668_i2c_driver = { + .driver = { + .name = "rt5668", + .owner = THIS_MODULE, + .acpi_match_table = ACPI_PTR(rt5668_acpi_match), + .of_match_table = of_match_ptr(rt5668_of_match), + }, + .probe = rt5668_i2c_probe, + .remove = rt5668_i2c_remove, + .shutdown = rt5668_i2c_shutdown, + .id_table = rt5668_i2c_id, +}; +module_i2c_driver(rt5668_i2c_driver); + +MODULE_DESCRIPTION("ASoC RT5668 driver"); +MODULE_AUTHOR("John Lin <john.lin(a)realtek.com>"); +MODULE_LICENSE("GPL v2"); diff --git a/sound/soc/codecs/rt5668.h b/sound/soc/codecs/rt5668.h new file mode 100644 index 0000000..717d5af --- /dev/null +++ b/sound/soc/codecs/rt5668.h @@ -0,0 +1,781 @@ +/* + * rt5668.h -- RT5668 ALSA SoC audio driver + * + * Copyright 2015 Realtek Microelectronics + * Author: Jack Yu <jack.yu(a)realtek.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __RT5668_H__ +#define __RT5668_H__ + +/* Info */ +#define RT5668_RESET 0x0000 +#define RT5668_VENDOR_ID 0x00fd +#define RT5668_VENDOR_ID_1 0x00fe +#define RT5668_VENDOR_ID_2 0x00ff + +#define RT5668_HP_AMP_1 0x0002 +#define RT5668_HP_AMP_2 0x0003 +#define RT5668_HPL_GAIN 0x0005 +#define RT5668_HPR_GAIN 0x0006 + +#define RT5668_AEC_BST 0x000b +#define RT5668_IN1_IN2 0x000c +#define RT5668_CBJ_TYPE_1 0x0010 +#define RT5668_CBJ_TYPE_2 0x0011 +#define RT5668_CBJ_TYPE_3 0x0012 + +/* I/O - ADC/DAC/DMIC */ +#define RT5668_DAC1_DIG_VOL 0x0019 +#define RT5668_STO1_ADC_DIG_VOL 0x001c +#define RT5668_STO1_BOOST 0x001f +#define RT5668_HP_IMP_GAIN_1 0x0022 +#define RT5668_HP_IMP_GAIN_2 0x0023 +/* Mixer - D-D */ +#define RT5668_STO1_ADC_MIXER 0x0026 +#define RT5668_AD_DA_MIXER 0x0029 +#define RT5668_STO_DAC_MIXER 0x002a + +/*Mixer - Analog*/ +#define RT5668_RECMIX1L 0x003c +#define RT5668_RECMIX1R 0x003e + +/* Power */ +#define RT5668_PWR_DIG_1 0x0061 +#define RT5668_PWR_DIG_2 0x0062 +#define RT5668_PWR_ANLG_1 0x0063 +#define RT5668_PWR_ANLG_2 0x0064 +#define RT5668_PWR_ANLG_3 0x0065 +#define RT5668_PWR_MIXER 0x0066 +#define RT5668_PWR_VOL 0x0067 + +#define RT5668_MCLK_DET 0x006b +/* Format - ADC/DAC */ +#define RT5668_I2S1_SDP 0x0070 +#define RT5668_ADDA_CLK_1 0x0073 +/* Format - TDM Control */ +#define RT5668_TDM_1 0x0078 +#define RT5668_TDM_2 0x0079 +#define RT5668_TDM_3 0x007a +#define RT5668_TDM_4 0x007b +#define RT5668_TDM_5 0x007c +#define RT5668_TDM_6 0x007d +#define RT5668_TDM_7 0x007e +#define RT5668_TDM_8 0x007f + +/* Function - Analog */ +#define RT5668_GLB_CLK 0x0080 +#define RT5668_PLL_1 0x0081 +#define RT5668_PLL_2 0x0082 +#define RT5668_ASRC_1 0x0083 +#define RT5668_ASRC_2 0x0084 +#define RT5668_ASRC_3 0x0085 +#define RT5668_ASRC_8 0x008a +#define RT5668_ASRC_9 0x008b +#define RT5668_ASRC_11 0x008c +#define RT5668_DEPOP_1 0x008e +#define RT5668_DEPOP_2 0x008f +#define RT5668_HP_CHARGE_PUMP_1 0x0091 +#define RT5668_HP_CHARGE_PUMP_2 0x0092 +#define RT5668_MICBIAS_2 0x0094 +#define RT5668_AUTO_RC_CLK 0x009f + +/* Function - Digital */ +#define RT5668_ADC_EQ_1 0x00ae +#define RT5668_ADC_EQ_2 0x00af + +#define RT5668_IRQ_1 0x00b6 +#define RT5668_IRQ_2 0x00b7 +#define RT5668_IRQ_3 0x00b8 +#define RT5668_IRQ_4 0x00b9 +#define RT5668_IRQ_5 0x00ba +#define RT5668_IRQ_6 0x00bb +#define RT5668_INT_ST_1 0x00be +#define RT5668_GPIO_1 0x00c0 +#define RT5668_GPIO_2 0x00c1 +#define RT5668_GPIO_3 0x00c2 +#define RT5668_IL_CMD_1 0x00db +#define RT5668_IL_CMD_2 0x00dc +#define RT5668_IL_CMD_3 0x00dd +#define RT5668_IL_CMD_4 0x00de +#define RT5668_4BTN_IL_CMD_1 0x00df +#define RT5668_4BTN_IL_CMD_2 0x00e0 +#define RT5668_4BTN_IL_CMD_3 0x00e1 +/* General Control */ +#define RT5668_DIG_MISC 0x00fa + +#define RT5668_BIAS_CUR_8 0x0111 +#define RT5668_CHOP_DAC 0x013a +#define RT5668_CHOP_ADC 0x013b +#define RT5668_CALIB_ADC 0x013c +#define RT5668_HP_LOGIC_1 0x01da +#define RT5668_HP_LOGIC_2 0x01db +#define RT5668_HP_CALIB_1 0x01de +#define RT5668_HP_CALIB_2 0x01df +#define RT5668_HP_CALIB_3 0x01e0 +#define RT5668_HP_CALIB_4 0x01e1 +#define RT5668_HP_CALIB_5 0x01e2 +#define RT5668_HP_CALIB_6 0x01e3 +#define RT5668_HP_CALIB_7 0x01e4 +#define RT5668_HP_CALIB_8 0x01e5 +#define RT5668_HP_CALIB_9 0x01e6 +#define RT5668_HP_CALIB_10 0x01e7 + +/* Headphone Amp Control 2 (0x0003) */ +#define RT5668_EN_DAC_HPO_MASK (0x1 << 14) +#define RT5668_EN_DAC_HPO_SHIFT 14 +#define RT5668_EN_DAC_HPO_DIS (0x0 << 14) +#define RT5668_EN_DAC_HPO_EN (0x1 << 14) + +/*Headphone Amp L/R Analog Gain and Digital NG2 Gain Control (0x0005 0x0006)*/ +#define RT5668_GAIN_HP (0x1f << 8) +#define RT5668_GAIN_HP_SHIFT 8 + +/* AEC BST Control (0x000b) */ +#define RT5668_GAIN_CBJ_MASK (0xf << 8) +#define RT5668_GAIN_CBJ_SHIFT 8 + +/* IN1 Control / MIC GND REF (0x000c) */ +#define RT5668_IN1_DF_MASK (0x1 << 15) +#define RT5668_IN1_DF_SHIFT 15 + +/* Combo Jack and Type Detection Control 1 (0x0010) */ +#define RT5668_CBJ_DET_MASK (0x1 << 15) +#define RT5668_CBJ_DET_SHIFT 15 +#define RT5668_CBJ_DET_DIS (0x0 << 15) +#define RT5668_CBJ_DET_EN (0x1 << 15) +#define RT5668_DET_TYPE_MASK (0x1 << 12) +#define RT5668_DET_TYPE_SHIFT 12 +#define RT5668_DET_TYPE_WLCSP (0x0 << 12) +#define RT5668_DET_TYPE_QFN (0x1 << 12) +#define RT5668_VREF_BIAS_MASK (0x1 << 6) +#define RT5668_VREF_BIAS_SHIFT 6 +#define RT5668_VREF_BIAS_FSM (0x0 << 6) +#define RT5668_VREF_BIAS_REG (0x1 << 6) + +/* REC Left Mixer Control 2 (0x003c) */ +#define RT5668_RECMIX1L_BST1_CBJ (0x1 << 7) +#define RT5668_RECMIX1L_BST1_CBJ_SHIFT 7 +#define RT5668_RECMIX1L_BST2 (0x1 << 4) +#define RT5668_RECMIX1L_BST2_SHIFT 4 + +/* REC Right Mixer Control 2 (0x003e) */ +#define RT5668_RECMIX1R_BST2 (0x1 << 4) +#define RT5668_RECMIX1R_BST2_SHIFT 4 + +/* DAC1 Digital Volume (0x0019) */ +#define RT5668_DAC_L1_VOL_MASK (0xff << 8) +#define RT5668_DAC_L1_VOL_SHIFT 8 +#define RT5668_DAC_R1_VOL_MASK (0xff) +#define RT5668_DAC_R1_VOL_SHIFT 0 + +/* ADC Digital Volume Control (0x001c) */ +#define RT5668_ADC_L_MUTE_MASK (0x1 << 15) +#define RT5668_ADC_L_MUTE_SHIFT 15 +#define RT5668_ADC_L_VOL_MASK (0x7f << 8) +#define RT5668_ADC_L_VOL_SHIFT 8 +#define RT5668_ADC_R_MUTE_MASK (0x1 << 7) +#define RT5668_ADC_R_MUTE_SHIFT 7 +#define RT5668_ADC_R_VOL_MASK (0x7f) +#define RT5668_ADC_R_VOL_SHIFT 0 + +/* Stereo ADC Mixer Control (0x0026) */ +#define RT5668_M_STO1_ADC_L1 (0x1 << 15) +#define RT5668_M_STO1_ADC_L1_SHIFT 15 +#define RT5668_M_STO1_ADC_L2 (0x1 << 14) +#define RT5668_M_STO1_ADC_L2_SHIFT 14 +#define RT5668_STO1_ADC_L1_SRC (0x1 << 13) +#define RT5668_STO1_ADC_L1_SRC_SHIFT 13 +#define RT5668_STO1_ADC_L2_SRC (0x1 << 12) +#define RT5668_STO1_ADC_L2_SRC_SHIFT 12 +#define RT5668_STO1_ADC_L_SRC (0x3 << 10) +#define RT5668_STO1_ADC_L_SRC_SHIFT 10 +#define RT5668_M_STO1_ADC_R1 (0x1 << 7) +#define RT5668_M_STO1_ADC_R1_SHIFT 7 +#define RT5668_M_STO1_ADC_R2 (0x1 << 6) +#define RT5668_M_STO1_ADC_R2_SHIFT 6 +#define RT5668_STO1_ADC_R1_SRC (0x1 << 5) +#define RT5668_STO1_ADC_R1_SRC_SHIFT 5 +#define RT5668_STO1_ADC_R2_SRC (0x1 << 4) +#define RT5668_STO1_ADC_R2_SRC_SHIFT 4 +#define RT5668_STO1_ADC_R_SRC (0x3 << 2) +#define RT5668_STO1_ADC_R_SRC_SHIFT 2 + +/* ADC Mixer to DAC Mixer Control (0x0029) */ +#define RT5668_M_ADCMIX_L (0x1 << 15) +#define RT5668_M_ADCMIX_L_SHIFT 15 +#define RT5668_M_DAC1_L (0x1 << 14) +#define RT5668_M_DAC1_L_SHIFT 14 +#define RT5668_M_ADCMIX_R (0x1 << 7) +#define RT5668_M_ADCMIX_R_SHIFT 7 +#define RT5668_M_DAC1_R (0x1 << 6) +#define RT5668_M_DAC1_R_SHIFT 6 + +/* Stereo DAC Mixer Control (0x002a) */ +#define RT5668_M_DAC_L1_STO_L (0x1 << 15) +#define RT5668_M_DAC_L1_STO_L_SHIFT 15 +#define RT5668_M_DAC_R1_STO_L (0x1 << 13) +#define RT5668_M_DAC_R1_STO_L_SHIFT 13 +#define RT5668_M_DAC_L1_STO_R (0x1 << 7) +#define RT5668_M_DAC_L1_STO_R_SHIFT 7 +#define RT5668_M_DAC_R1_STO_R (0x1 << 5) +#define RT5668_M_DAC_R1_STO_R_SHIFT 5 + +/* Power Management for Digital 1 (0x0061) */ +#define RT5668_PWR_I2S1 (0x1 << 15) +#define RT5668_PWR_I2S1_SHIFT 15 +#define RT5668_PWR_DAC_L1 (0x1 << 11) +#define RT5668_PWR_DAC_L1_SHIFT 11 +#define RT5668_PWR_DAC_R1 (0x1 << 10) +#define RT5668_PWR_DAC_R1_SHIFT 10 +#define RT5668_PWR_LDO_DACREF_MASK (0x1 << 8) +#define RT5668_PWR_LDO_DACREF_SHIFT 8 +#define RT5668_PWR_LDO_DACREF_ON (0x1 << 8) +#define RT5668_PWR_LDO_DACREF_DOWN (0x0 << 8) +#define RT5668_PWR_LDO_SHIFT 8 +#define RT5668_PWR_ADC_L1 (0x1 << 4) +#define RT5668_PWR_ADC_L1_SHIFT 4 +#define RT5668_PWR_ADC_R1 (0x1 << 3) +#define RT5668_PWR_ADC_R1_SHIFT 3 + +/* Power Management for Digital 2 (0x0062) */ +#define RT5668_PWR_ADC_S1F (0x1 << 15) +#define RT5668_PWR_ADC_S1F_SHIFT 15 +#define RT5668_PWR_DAC_S1F (0x1 << 10) +#define RT5668_PWR_DAC_S1F_SHIFT 10 + +/* Power Management for Analog 1 (0x0063) */ +#define RT5668_PWR_VREF1 (0x1 << 15) +#define RT5668_PWR_VREF1_MASK (0x1 << 15) +#define RT5668_PWR_VREF1_SHIFT 15 +#define RT5668_PWR_FV1 (0x1 << 14) +#define RT5668_PWR_FV1_MASK (0x1 << 14) +#define RT5668_PWR_FV1_SHIFT 14 +#define RT5668_PWR_VREF2 (0x1 << 13) +#define RT5668_PWR_VREF2_MASK (0x1 << 13) +#define RT5668_PWR_VREF2_SHIFT 13 +#define RT5668_PWR_FV2 (0x1 << 12) +#define RT5668_PWR_FV2_MASK (0x1 << 12) +#define RT5668_PWR_FV2_SHIFT 12 +#define RT5668_PWR_MB (0x1 << 9) +#define RT5668_PWR_MB_MASK (0x1 << 9) +#define RT5668_PWR_MB_SHIFT 9 +#define RT5668_AMP_HP_MASK (0x3 << 2) +#define RT5668_AMP_HP_SHIFT 2 +#define RT5668_AMP_HP_1X (0x0 << 2) +#define RT5668_AMP_HP_3X (0x1 << 2) +#define RT5668_AMP_HP_5X (0x3 << 2) +#define RT5668_LDO1_DVO_MASK (0x3) +#define RT5668_LDO1_DVO_SHIFT 0 +#define RT5668_LDO1_DVO_0_9V (0x0) +#define RT5668_LDO1_DVO_1_0V (0x1) +#define RT5668_LDO1_DVO_1_2V (0x2) +#define RT5668_LDO1_DVO_1_4V (0x3) + +/* Power Management for Analog 2 (0x0064) */ +#define RT5668_PWR_BST1 (0x1 << 15) +#define RT5668_PWR_BST1_MASK (0x1 << 15) +#define RT5668_PWR_BST1_SHIFT 15 +#define RT5668_PWR_BST1_OFF (0x0 << 15) +#define RT5668_PWR_BST1_ON (0x1 << 15) +#define RT5668_PWR_BST2 (0x1 << 14) +#define RT5668_PWR_BST2_MASK (0x1 << 14) +#define RT5668_PWR_BST2_SHIFT 14 +#define RT5668_PWR_MB1 (0x1 << 11) +#define RT5668_PWR_MB1_SHIFT 11 +#define RT5668_PWR_MB2 (0x1 << 10) +#define RT5668_PWR_MB2_SHIFT 10 +#define RT5668_PWR_BST2_OP (0x1 << 6) +#define RT5668_PWR_BST2_OP_MASK (0x1 << 6) +#define RT5668_PWR_BST2_OP_SHIFT 6 +#define RT5668_PWR_JD1 (0x1 << 3) +#define RT5668_PWR_JD1_MASK (0x1 << 3) +#define RT5668_PWR_JD1_SHIFT 3 +#define RT5668_PWR_JD2 (0x1 << 2) +#define RT5668_PWR_JD2_MASK (0x1 << 2) +#define RT5668_PWR_JD2_SHIFT 2 +#define RT5668_PWR_RECMIX1 (0x1 << 1) +#define RT5668_PWR_RECMIX1_SHIFT 1 +#define RT5668_PWR_RECMIX2 (0x1) +#define RT5668_PWR_RECMIX2_SHIFT 0 + +/* Power Management for Analog 3 (0x0065) */ +#define RT5668_PWR_CBJ_MASK (0x1 << 9) +#define RT5668_PWR_CBJ_SHIFT 9 +#define RT5668_PWR_CBJ_OFF (0x0 << 9) +#define RT5668_PWR_CBJ_ON (0x1 << 9) +#define RT5668_PWR_PLL (0x1 << 6) +#define RT5668_PWR_PLL_SHIFT 6 +#define RT5668_PWR_LDO2 (0x1 << 2) +#define RT5668_PWR_LDO2_SHIFT 2 + +/* Power Management for Volume (0x0067) */ +#define RT5668_PWR_MIC_DET (0x1 << 5) +#define RT5668_PWR_MIC_DET_SHIFT 5 + +/* MCLK and System Clock Detection Control (0x006b) */ +#define RT5668_EN_ANA_CLK_DET_MASK (0x1 << 15) +#define RT5668_EN_ANA_CLK_DET_SHIFT 15 +#define RT5668_EN_ANA_CLK_DET_DIS (0x0 << 15) +#define RT5668_EN_ANA_CLK_DET_AUTO (0x1 << 15) +#define RT5668_PWR_CLK_DET_MASK (0x1) +#define RT5668_PWR_CLK_DET_SHIFT 0 +#define RT5668_PWR_CLK_DET_DIS (0x0) +#define RT5668_PWR_CLK_DET_EN (0x1) + +/* I2S1 Audio Serial Data Port Control (0x0070) */ +#define RT5668_I2S_MS_MASK (0x1 << 15) +#define RT5668_I2S_MS_SHIFT 15 +#define RT5668_I2S_MS_M (0x0 << 15) +#define RT5668_I2S_MS_S (0x1 << 15) +#define RT5668_I2S_BP_MASK (0x1 << 8) +#define RT5668_I2S_BP_SHIFT 8 +#define RT5668_I2S_BP_NOR (0x0 << 8) +#define RT5668_I2S_BP_INV (0x1 << 8) +#define RT5668_I2S_DL_MASK (0x3 << 4) +#define RT5668_I2S_DL_SHIFT 4 +#define RT5668_I2S_DL_16 (0x0 << 4) +#define RT5668_I2S_DL_20 (0x1 << 4) +#define RT5668_I2S_DL_24 (0x2 << 4) +#define RT5668_I2S_DL_8 (0x3 << 4) +#define RT5668_I2S_DF_MASK (0x7) +#define RT5668_I2S_DF_SHIFT 0 +#define RT5668_I2S_DF_I2S (0x0) +#define RT5668_I2S_DF_LEFT (0x1) +#define RT5668_I2S_DF_PCM_A (0x2) +#define RT5668_I2S_DF_PCM_B (0x3) +#define RT5668_I2S_DF_PCM_A_N (0x6) +#define RT5668_I2S_DF_PCM_B_N (0x7) + +/* ADC/DAC Clock Control 1 (0x0073) */ +#define RT5668_I2S_PD1_MASK (0x7 << 12) +#define RT5668_I2S_PD1_SHIFT 12 +#define RT5668_M_I2S_DIV_MASK (0x7 << 8) +#define RT5668_M_I2S_DIV_SHIFT 8 +#define RT5668_CLK_SRC_MASK (0x3 << 4) +#define RT5668_CLK_SRC_MCLK (0x0 << 4) +#define RT5668_CLK_SRC_PLL_OUT (0x1 << 4) +#define RT5668_CLK_SRC_DIV (0x2 << 4) +#define RT5668_CLK_SRC_RC (0x3 << 4) +#define RT5668_DAC_OSR_MASK (0x3 << 2) +#define RT5668_DAC_OSR_SHIFT 2 +#define RT5668_DAC_OSR_128 (0x0 << 2) +#define RT5668_DAC_OSR_64 (0x1 << 2) +#define RT5668_DAC_OSR_32 (0x2 << 2) +#define RT5668_ADC_OSR_MASK (0x3) +#define RT5668_ADC_OSR_SHIFT 0 +#define RT5668_ADC_OSR_128 (0x0) +#define RT5668_ADC_OSR_64 (0x1) +#define RT5668_ADC_OSR_32 (0x2) + +/* TDM1 control 1 (0x0078) */ +#define RT5668_TDM_MODE_MASK (0x1 << 15) +#define RT5668_TDM_MODE_SHIFT 15 +#define RT5668_TDM_MODE_I2S (0x0 << 15) +#define RT5668_TDM_MODE_TDM (0x1 << 15) +#define RT5668_TDM_IN_CH_MASK (0x3 << 10) +#define RT5668_TDM_IN_CH_SHIFT 10 +#define RT5668_TDM_IN_CH_2 (0x0 << 10) +#define RT5668_TDM_IN_CH_4 (0x1 << 10) +#define RT5668_TDM_IN_CH_6 (0x2 << 10) +#define RT5668_TDM_IN_CH_8 (0x3 << 10) +#define RT5668_TDM_OUT_CH_MASK (0x3 << 8) +#define RT5668_TDM_OUT_CH_SHIFT 8 +#define RT5668_TDM_OUT_CH_2 (0x0 << 8) +#define RT5668_TDM_OUT_CH_4 (0x1 << 8) +#define RT5668_TDM_OUT_CH_6 (0x2 << 8) +#define RT5668_TDM_OUT_CH_8 (0x3 << 8) +#define RT5668_TDM_IN_LEN_MASK (0x3 << 6) +#define RT5668_TDM_IN_LEN_SHIFT 6 +#define RT5668_TDM_IN_LEN_16 (0x0 << 6) +#define RT5668_TDM_IN_LEN_20 (0x1 << 6) +#define RT5668_TDM_IN_LEN_24 (0x2 << 6) +#define RT5668_TDM_IN_LEN_32 (0x3 << 6) +#define RT5668_TDM_OUT_LEN_MASK (0x3 << 4) +#define RT5668_TDM_OUT_LEN_SHIFT 4 +#define RT5668_TDM_OUT_LEN_16 (0x0 << 4) +#define RT5668_TDM_OUT_LEN_20 (0x1 << 4) +#define RT5668_TDM_OUT_LEN_24 (0x2 << 4) +#define RT5668_TDM_OUT_LEN_32 (0x3 << 4) + +/* Global Clock Control (0x0080) */ +#define RT5668_SCLK_SRC_MASK (0x3 << 14) +#define RT5668_SCLK_SRC_SHIFT 14 +#define RT5668_SCLK_SRC_MCLK (0x0 << 14) +#define RT5668_SCLK_SRC_PLL1 (0x1 << 14) +#define RT5668_SCLK_SRC_RCCLK (0x2 << 14) +#define RT5668_PLL1_SRC_MASK (0x7 << 8) +#define RT5668_PLL1_SRC_SHIFT 8 +#define RT5668_PLL1_SRC_MCLK (0x0 << 8) +#define RT5668_PLL1_SRC_BCLK1 (0x1 << 8) +#define RT5668_PLL1_PD_MASK (0x1 << 4) +#define RT5668_PLL1_PD_SHIFT 4 + +#define RT5668_PLL_INP_MAX 40000000 +#define RT5668_PLL_INP_MIN 256000 +/* PLL M/N/K Code Control 1 (0x0081) */ +#define RT5668_PLL_N_MAX 0x001ff +#define RT5668_PLL_N_MASK (RT5668_PLL_N_MAX << 7) +#define RT5668_PLL_N_SHIFT 7 +#define RT5668_PLL_K_MAX 0x001f +#define RT5668_PLL_K_MASK (RT5668_PLL_K_MAX) +#define RT5668_PLL_K_SHIFT 0 + +/* PLL M/N/K Code Control 2 (0x0082) */ +#define RT5668_PLL_M_MAX 0x00f +#define RT5668_PLL_M_MASK (RT5668_PLL_M_MAX << 12) +#define RT5668_PLL_M_SHIFT 12 +#define RT5668_PLL_M_BP (0x1 << 11) +#define RT5668_PLL_M_BP_SHIFT 11 + +/* PLL tracking mode 1 (0x0083) */ +#define RT5668_I2S1_ASRC_MASK (0x1 << 13) +#define RT5668_I2S1_ASRC_SHIFT 13 +#define RT5668_DAC_STO1_ASRC_MASK (0x1 << 12) +#define RT5668_DAC_STO1_ASRC_SHIFT 12 +#define RT5668_ADC_STO1_ASRC_MASK (0x1 << 4) +#define RT5668_ADC_STO1_ASRC_SHIFT 4 + +/* PLL tracking mode 2 (0x0084)*/ +#define RT5668_DA_STO1_TRACK_MASK (0x7 << 12) +#define RT5668_DA_STO1_TRACK_SHIFT 12 +#define RT5668_DA_STO1_TRACK_SYSCLK (0x0 << 12) +#define RT5668_DA_STO1_TRACK_I2S1 (0x1 << 12) + +/* PLL tracking mode 3 (0x0085)*/ +#define RT5668_AD_STO1_TRACK_MASK (0x7 << 12) +#define RT5668_AD_STO1_TRACK_SHIFT 12 +#define RT5668_AD_STO1_TRACK_SYSCLK (0x0 << 12) +#define RT5668_AD_STO1_TRACK_I2S1 (0x1 << 12) + +/* HPOUT Charge pump control 1 (0x0091) */ +#define RT5668_OSW_HP_L_MASK (0x1 << 11) +#define RT5668_OSW_HP_L_SHIFT 11 +#define RT5668_OSW_HP_L_EN (0x1 << 11) +#define RT5668_OSW_HP_L_DIS (0x0 << 11) +#define RT5668_OSW_HP_R_MASK (0x1 << 10) +#define RT5668_OSW_HP_R_SHIFT 10 +#define RT5668_OSW_HP_R_EN (0x1 << 10) +#define RT5668_OSW_HP_R_DIS (0x0 << 10) +#define RT5668_SEL_PM_HP_MASK (0x3 << 8) +#define RT5668_SEL_PM_HP_SHIFT 8 +#define RT5668_SEL_PM_HP_0_6 (0x0 << 8) +#define RT5668_SEL_PM_HP_0_9 (0x1 << 8) +#define RT5668_SEL_PM_HP_1_8 (0x2 << 8) +#define RT5668_SEL_PM_HP_HIGH (0x3 << 8) +#define RT5668_OVCD_HP_MASK (0x1 << 2) +#define RT5668_OVCD_HP_SHIFT 2 +#define RT5668_OVCD_HP_EN (0x1 << 2) +#define RT5668_OVCD_HP_DIS (0x0 << 2) + +/* RC Clock Control (0x0094) */ +#define RT5668_DIG_25M_CLK_MASK (0x1 << 9) +#define RT5668_DIG_25M_CLK_SHIFT 9 +#define RT5668_DIG_25M_CLK_DIS (0x0 << 9) +#define RT5668_DIG_25M_CLK_EN (0x1 << 9) +#define RT5668_DIG_1M_CLK_MASK (0x1 << 8) +#define RT5668_DIG_1M_CLK_SHIFT 8 +#define RT5668_DIG_1M_CLK_DIS (0x0 << 8) +#define RT5668_DIG_1M_CLK_EN (0x1 << 8) + +/* Auto Turn On 1M RC CLK (0x009f) */ +#define RT5668_IRQ_POW_SAV_MASK (0x1 << 15) +#define RT5668_IRQ_POW_SAV_SHIFT 15 +#define RT5668_IRQ_POW_SAV_DIS (0x0 << 15) +#define RT5668_IRQ_POW_SAV_EN (0x1 << 15) +#define RT5668_IRQ_POW_SAV_JD1_MASK (0x1 << 14) +#define RT5668_IRQ_POW_SAV_JD1_SHIFT 14 +#define RT5668_IRQ_POW_SAV_JD1_DIS (0x0 << 14) +#define RT5668_IRQ_POW_SAV_JD1_EN (0x1 << 14) + +/* IRQ Control 1 (0x00b6) */ +#define RT5668_EN_CB_JD_MASK (0x1 << 3) +#define RT5668_EN_CB_JD_SHIFT 3 +#define RT5668_EN_CB_JD_EN (0x1 << 3) +#define RT5668_EN_CB_JD_DIS (0x0 << 3) + +/* IRQ Control 3 (0x00b8) */ +#define RT5668_EN_IRQ_INLINE_MASK (0x1 << 6) +#define RT5668_EN_IRQ_INLINE_SHIFT 6 +#define RT5668_EN_IRQ_INLINE_BYP (0x0 << 6) +#define RT5668_EN_IRQ_INLINE_NOR (0x1 << 6) + +/* GPIO Control 1 (0x00c0) */ +#define RT5668_GP1_PIN_MASK (0x1 << 15) +#define RT5668_GP1_PIN_SHIFT 15 +#define RT5668_GP1_PIN_GPIO1 (0x0 << 15) +#define RT5668_GP1_PIN_IRQ (0x1 << 15) + +/* GPIO Control 2 (0x00c1) */ +#define RT5668_GP4_PIN_CONF_MASK (0x1 << 5) +#define RT5668_GP4_PIN_CONF_SHIFT 5 +#define RT5668_GP4_PIN_CONF_INPUT (0x0 << 5) +#define RT5668_GP4_PIN_CONF_OUTPUT (0x1 << 5) + +/* GPIO Control 2 (0x00c2) */ +#define RT5668_GP8_PIN_CONF_MASK (0x1 << 13) +#define RT5668_GP8_PIN_CONF_SHIFT 13 +#define RT5668_GP8_PIN_CONF_INPUT (0x0 << 13) +#define RT5668_GP8_PIN_CONF_OUTPUT (0x1 << 13) + +/* 4 Buttons Inline Command Function 1 (0x00df) */ +#define RT5668_4BTN_CLK_DEB_MASK (0x3 << 2) +#define RT5668_4BTN_CLK_DEB_SHIFT 2 +#define RT5668_4BTN_CLK_DEB_8MS (0x0 << 2) +#define RT5668_4BTN_CLK_DEB_16MS (0x1 << 2) +#define RT5668_4BTN_CLK_DEB_32MS (0x2 << 2) +#define RT5668_4BTN_CLK_DEB_65MS (0x3 << 2) + +/* Inline Command Function 6 (0x00e0) */ +#define RT5668_EN_4BTN_INL_MASK (0x1 << 15) +#define RT5668_EN_4BTN_INL_SHIFT 15 +#define RT5668_EN_4BTN_INL_DIS (0x0 << 15) +#define RT5668_EN_4BTN_INL_EN (0x1 << 15) +#define RT5668_RESET_4BTN_INL_MASK (0x1 << 14) +#define RT5668_RESET_4BTN_INL_SHIFT 14 +#define RT5668_RESET_4BTN_INL_RESET (0x0 << 14) +#define RT5668_RESET_4BTN_INL_NOR (0x1 << 14) + +/* Digital Misc Control (0x00fa) */ +#define RT5668_DIG_GATE_CTRL_MASK 0x1 +#define RT5668_DIG_GATE_CTRL_SHIFT (0) +#define RT5668_DIG_GATE_CTRL_DIS 0x0 +#define RT5668_DIG_GATE_CTRL_EN 0x1 + +/* Chopper and Clock control for DAC L (0x013a)*/ +#define RT5668_CKXEN_DAC1_MASK (0x1 << 13) +#define RT5668_CKXEN_DAC1_SHIFT 13 +#define RT5668_CKGEN_DAC1_MASK (0x1 << 12) +#define RT5668_CKGEN_DAC1_SHIFT 12 + +/* Chopper and Clock control for ADC (0x013b)*/ +#define RT5668_CKXEN_ADCC_MASK (0x1 << 13) +#define RT5668_CKXEN_ADCC_SHIFT 13 +#define RT5668_CKGEN_ADCC_MASK (0x1 << 12) +#define RT5668_CKGEN_ADCC_SHIFT 12 + +/* HP Behavior Logic Control 2 (0x01db) */ +#define RT5668_HP_SIG_SRC1_MASK (0x3) +#define RT5668_HP_SIG_SRC1_SHIFT 0 +#define RT5668_HP_SIG_SRC1_HP_DC (0x0) +#define RT5668_HP_SIG_SRC1_HP_CALIB (0x1) +#define RT5668_HP_SIG_SRC1_REG (0x2) +#define RT5668_HP_SIG_SRC1_SILENCE (0x3) + +/* RT5663 specific register */ +#define RT5663_RECMIX 0x0010 +#define RT5663_BYPASS_STO_DAC 0x002d +#define RT5663_PRE_DIV_GATING_1 0x006e +#define RT5663_PRE_DIV_GATING_2 0x006f +#define RT5663_TDM_1 0x0077 +#define RT5663_TDM_5 0x007b +#define RT5663_EM_JACK_TYPE_1 0x00e6 +#define RT5663_EM_JACK_TYPE_2 0x00e7 +#define RT5663_ANA_BIAS_CUR_1 0x0108 +#define RT5663_DACREF_LDO 0x0112 +#define RT5663_VREF_RECMIX 0x0118 +#define RT5663_CHARGE_PUMP_1 0x0125 +#define RT5663_CHARGE_PUMP_2 0x0128 +#define RT5663_CHOP_DAC_R 0x013d +#define RT5663_STO_DRE_9 0x0168 +#define RT5663_STO_DRE_10 0x0169 +#define RT5663_HP_BIAS 0x0202 +#define RT5663_CBJ_1 0x0250 +#define RT5663_CBJ_2 0x0251 +#define RT5663_DUMMY_1 0x02fa + +/* RT5663: RECMIX Control (0x0010) */ +#define RT5663_RECMIX1_BST1_MASK (0x1) +#define RT5663_RECMIX1_BST1_SHIFT 0 +#define RT5663_RECMIX1_BST1_UNMUTE (0x0) +#define RT5663_RECMIX1_BST1_MUTE (0x1) + +/* RT5663: Bypass Stereo1 DAC Mixer Control (0x002d) */ +#define RT5663_DACL1_SRC_MASK (0x1 << 3) +#define RT5663_DACL1_SRC_SHIFT 3 +#define RT5663_DACR1_SRC_MASK (0x1 << 2) +#define RT5663_DACR1_SRC_SHIFT 2 + +/* RT5663: TDM control 2 (0x0078) */ +#define RT5663_DATA_SWAP_ADCDAT1_MASK (0x3 << 14) +#define RT5663_DATA_SWAP_ADCDAT1_SHIFT 14 +#define RT5663_DATA_SWAP_ADCDAT1_LR (0x0 << 14) +#define RT5663_DATA_SWAP_ADCDAT1_RL (0x1 << 14) +#define RT5663_DATA_SWAP_ADCDAT1_LL (0x2 << 14) +#define RT5663_DATA_SWAP_ADCDAT1_RR (0x3 << 14) + +/* RT5663: TDM control 5 (0x007b) */ +#define RT5663_TDM_LENGTN_MASK (0x3) +#define RT5663_TDM_LENGTN_SHIFT 0 +#define RT5663_TDM_LENGTN_16 (0x0) +#define RT5663_TDM_LENGTN_20 (0x1) +#define RT5663_TDM_LENGTN_24 (0x2) +#define RT5663_TDM_LENGTN_32 (0x3) + +/* RT5663: Global Clock Control (0x0080) */ +#define RT5663_PLL1_SRC_MASK (0x7 << 11) +#define RT5663_PLL1_SRC_SHIFT 11 +#define RT5663_PLL1_SRC_MCLK (0x0 << 11) +#define RT5663_PLL1_SRC_BCLK1 (0x1 << 11) + +/* PLL tracking mode 1 (0x0083) */ +#define RT5663_I2S1_ASRC_MASK (0x1 << 11) +#define RT5663_I2S1_ASRC_SHIFT 11 +#define RT5663_DAC_STO1_ASRC_MASK (0x1 << 10) +#define RT5663_DAC_STO1_ASRC_SHIFT 10 +#define RT5663_ADC_STO1_ASRC_MASK (0x1 << 3) +#define RT5663_ADC_STO1_ASRC_SHIFT 3 + +/* PLL tracking mode 2 (0x0084)*/ +#define RT5663_AD_STO1_TRACK_MASK (0x7) +#define RT5663_AD_STO1_TRACK_SHIFT 0 +#define RT5663_AD_STO1_TRACK_SYSCLK (0x0) +#define RT5663_AD_STO1_TRACK_I2S1 (0x1) + +/* RT5663: HPOUT Charge pump control 1 (0x0091) */ +#define RT5663_SI_HP_MASK (0x1 << 12) +#define RT5663_SI_HP_SHIFT 12 +#define RT5663_SI_HP_EN (0x1 << 12) +#define RT5663_SI_HP_DIS (0x0 << 12) + +/* RT5663: GPIO Control 2 (0x00b6) */ +#define RT5663_GP1_PIN_CONF_MASK (0x1 << 2) +#define RT5663_GP1_PIN_CONF_SHIFT 2 +#define RT5663_GP1_PIN_CONF_OUTPUT (0x1 << 2) +#define RT5663_GP1_PIN_CONF_INPUT (0x0 << 2) + +/* RT5663: GPIO Control 2 (0x00b7) */ +#define RT5663_EN_IRQ_INLINE_MASK (0x1 << 3) +#define RT5663_EN_IRQ_INLINE_SHIFT 3 +#define RT5663_EN_IRQ_INLINE_NOR (0x1 << 3) +#define RT5663_EN_IRQ_INLINE_BYP (0x0 << 3) + +/* RT5663: IRQ Control 1 (0x00c1) */ +#define RT5663_EN_IRQ_JD1_MASK (0x1 << 6) +#define RT5663_EN_IRQ_JD1_SHIFT 6 +#define RT5663_EN_IRQ_JD1_EN (0x1 << 6) +#define RT5663_EN_IRQ_JD1_DIS (0x0 << 6) + +/* RT5663: Inline Command Function 2 (0x00dc) */ +#define RT5663_PWR_MIC_DET_MASK (0x1) +#define RT5663_PWR_MIC_DET_SHIFT 0 +#define RT5663_PWR_MIC_DET_ON (0x1) +#define RT5663_PWR_MIC_DET_OFF (0x0) + +/* RT5663: Embeeded Jack and Type Detection Control 1 (0x00e6)*/ +#define RT5663_CBJ_DET_MASK (0x1 << 15) +#define RT5663_CBJ_DET_SHIFT 15 +#define RT5663_CBJ_DET_DIS (0x0 << 15) +#define RT5663_CBJ_DET_EN (0x1 << 15) +#define RT5663_EXT_JD_MASK (0x1 << 11) +#define RT5663_EXT_JD_SHIFT 11 +#define RT5663_EXT_JD_EN (0x1 << 11) +#define RT5663_EXT_JD_DIS (0x0 << 11) +#define RT5663_POL_EXT_JD_MASK (0x1 << 10) +#define RT5663_POL_EXT_JD_SHIFT 10 +#define RT5663_POL_EXT_JD_EN (0x1 << 10) +#define RT5663_POL_EXT_JD_DIS (0x0 << 10) + +/* RT5663: DACREF LDO Control (0x0112)*/ +#define RT5663_PWR_LDO_DACREFL_MASK (0x1 << 9) +#define RT5663_PWR_LDO_DACREFL_SHIFT 9 +#define RT5663_PWR_LDO_DACREFR_MASK (0x1 << 1) +#define RT5663_PWR_LDO_DACREFR_SHIFT 1 + +/* RT5663: Stereo Dynamic Range Enhancement Control 9 (0x0168, 0x0169)*/ +#define RT5663_DRE_GAIN_HP_MASK (0x1f) +#define RT5663_DRE_GAIN_HP_SHIFT 0 + +/* RT5663: Combo Jack Control (0x0250) */ +#define RT5663_INBUF_CBJ_BST1_MASK (0x1 << 11) +#define RT5663_INBUF_CBJ_BST1_SHIFT 11 +#define RT5663_INBUF_CBJ_BST1_ON (0x1 << 11) +#define RT5663_INBUF_CBJ_BST1_OFF (0x0 << 11) +#define RT5663_CBJ_SENSE_BST1_MASK (0x1 << 10) +#define RT5663_CBJ_SENSE_BST1_SHIFT 10 +#define RT5663_CBJ_SENSE_BST1_L (0x1 << 10) +#define RT5663_CBJ_SENSE_BST1_R (0x0 << 10) + +/* RT5663: Combo Jack Control (0x0251) */ +#define RT5663_GAIN_BST1_MASK (0xf) +#define RT5663_GAIN_BST1_SHIFT 0 + +/* RT5663: Dummy register 1 (0x02fa) */ +#define RT5663_EMB_CLK_MASK (0x1 << 9) +#define RT5663_EMB_CLK_SHIFT 9 +#define RT5663_EMB_CLK_EN (0x1 << 9) +#define RT5663_EMB_CLK_DIS (0x0 << 9) +#define RT5663_HPA_CPL_BIAS_MASK (0x7 << 6) +#define RT5663_HPA_CPL_BIAS_SHIFT 6 +#define RT5663_HPA_CPL_BIAS_0_5 (0x0 << 6) +#define RT5663_HPA_CPL_BIAS_1 (0x1 << 6) +#define RT5663_HPA_CPL_BIAS_2 (0x2 << 6) +#define RT5663_HPA_CPL_BIAS_3 (0x3 << 6) +#define RT5663_HPA_CPL_BIAS_4_1 (0x4 << 6) +#define RT5663_HPA_CPL_BIAS_4_2 (0x5 << 6) +#define RT5663_HPA_CPL_BIAS_6 (0x6 << 6) +#define RT5663_HPA_CPL_BIAS_8 (0x7 << 6) +#define RT5663_HPA_CPR_BIAS_MASK (0x7 << 3) +#define RT5663_HPA_CPR_BIAS_SHIFT 3 +#define RT5663_HPA_CPR_BIAS_0_5 (0x0 << 3) +#define RT5663_HPA_CPR_BIAS_1 (0x1 << 3) +#define RT5663_HPA_CPR_BIAS_2 (0x2 << 3) +#define RT5663_HPA_CPR_BIAS_3 (0x3 << 3) +#define RT5663_HPA_CPR_BIAS_4_1 (0x4 << 3) +#define RT5663_HPA_CPR_BIAS_4_2 (0x5 << 3) +#define RT5663_HPA_CPR_BIAS_6 (0x6 << 3) +#define RT5663_HPA_CPR_BIAS_8 (0x7 << 3) +#define RT5663_DUMMY_BIAS_MASK (0x7) +#define RT5663_DUMMY_BIAS_SHIFT 0 +#define RT5663_DUMMY_BIAS_0_5 (0x0) +#define RT5663_DUMMY_BIAS_1 (0x1) +#define RT5663_DUMMY_BIAS_2 (0x2) +#define RT5663_DUMMY_BIAS_3 (0x3) +#define RT5663_DUMMY_BIAS_4_1 (0x4) +#define RT5663_DUMMY_BIAS_4_2 (0x5) +#define RT5663_DUMMY_BIAS_6 (0x6) +#define RT5663_DUMMY_BIAS_8 (0x7) + + +/* System Clock Source */ +enum { + RT5668_SCLK_S_MCLK, + RT5668_SCLK_S_PLL1, + RT5668_SCLK_S_RCCLK, +}; + +/* PLL1 Source */ +enum { + RT5668_PLL1_S_MCLK, + RT5668_PLL1_S_BCLK1, +}; + +enum { + RT5668_AIF, + RT5668_AIFS, +}; + +/* asrc clock source */ +enum { + RT5668_CLK_SEL_SYS = 0x0, + RT5668_CLK_SEL_I2S1_ASRC = 0x1, +}; + +/* filter mask */ +enum { + RT5668_DA_STEREO_FILTER = 0x1, + RT5668_AD_STEREO_FILTER = 0x2, +}; + +int rt5668_headset_detect(struct snd_soc_codec *codec, int jack_insert); +int rt5668_button_detect(struct snd_soc_codec *codec); +int rt5668_set_jack_detect(struct snd_soc_codec *codec, + struct snd_soc_jack *hs_jack); +int rt5668_sel_asrc_clk_src(struct snd_soc_codec *codec, + unsigned int filter_mask, unsigned int clk_src); + +#endif /* __RT5668_H__ */ -- 1.8.1.1.439.g50a6b54

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[alsa-devel] [PATCH v3 0/3] ASoC: Intel: Skylake: Add HDA link management
by Vinod Koul 13 May '16

13 May '16

HDA links are always kept On, this patch adds link management routines in hdac extended core and it's use in Skylake driver and hdmi codec (runs on HDA link) The aim of serial is to shut down the links when not in use and keep them active when a user is active. The user can activate link by taking reference to the link when required. When all links are closed, the command DMAs are turned off as well. On first link power up, the command DMAs are turned on first. First patch touches HDA core, and rest two are dependent on it so Takashi if you are okay, pls ACK it and we can merge thru ASoC tree Changes in v3: - rename the varaible for dmas and make it bool - change the logic of checking links for powering off dmas as suggested by takashi Changes in v2: - use mutex instead of spinlock Vinod Koul (3): ALSA: hdac: add link pm and ref counting ASoC: Intel: Skylake: add link mangement ASoC: hdac_hdmi: add link management include/sound/hdaudio_ext.h | 13 ++++++++ sound/hda/ext/hdac_ext_bus.c | 3 ++ sound/hda/ext/hdac_ext_controller.c | 66 +++++++++++++++++++++++++++++++++++++ sound/soc/codecs/hdac_hdmi.c | 32 ++++++++++++++++-- sound/soc/intel/skylake/skl-pcm.c | 1 - sound/soc/intel/skylake/skl.c | 34 +++++++++++++++++++ 6 files changed, 146 insertions(+), 3 deletions(-) -- 1.9.1

3 7

[alsa-devel] [PATCH v2 0/3] ASoC: Intel: Skylake: Add HDA link management
by Vinod Koul 13 May '16

13 May '16

HDA links are always kept On, this patch adds link management routines in hdac extended core and it's use in Skylake driver and hdmi codec (runs on HDA link) The aim of serial is to shut down the links when not in use and keep them active when a user is active. The user can activate link by taking reference to the link when required. When all links are closed, the command DMAs are turned off as well. On first link power up, the command DMAs are turned on first. First patch touches HDA core, and rest two are dependent on it so Takashi if you are okay, pls ACK it and we can merge thru ASoC tree Changes in v2: - use mutex instead of spinlock Vinod Koul (3): ALSA: hdac: add link pm and ref counting ASoC: Intel: Skylake: add link management ASoC: hdac_hdmi: add link management include/sound/hdaudio_ext.h | 13 ++++++++ sound/hda/ext/hdac_ext_bus.c | 3 ++ sound/hda/ext/hdac_ext_controller.c | 62 +++++++++++++++++++++++++++++++++++++ sound/soc/codecs/hdac_hdmi.c | 32 +++++++++++++++++-- sound/soc/intel/skylake/skl-pcm.c | 1 - sound/soc/intel/skylake/skl.c | 34 ++++++++++++++++++++ 6 files changed, 142 insertions(+), 3 deletions(-) -- 1.9.1

3 9

[alsa-devel] [PATCH] ASoC: tlv320aic32x4: Properly implement the positive and negative pins into the mixers
by Jeremy McDermond 13 May '16

13 May '16

The TLV320AIC32x4 has a very flexible mixer on the inputs to the ADCs. Each mixer has an available set of available pins that can be connected to the ADC positive and negative pins via three different resistor values. This allows for configuration of differential inputs as well as doing level manipulation between sources going into the mixers. The current code only provides positive pins and I implemented the resistors in an earlier patch. It turns out that it appears to more accurately model what's happening to implement each of the pins as a MUX rather than on/off switches and a mixer. This way each pin can be set to its desired resistor value. Since there are no switches, the mixer is no longer necessary in the DAPM path. I set the DAPM paths such that the "off" position of any of the MUXes turns the path off. This should allow for any input confiuration available on the codec. Signed-off-by: Jeremy McDermond <nh6z(a)nh6z.net> --- sound/soc/codecs/tlv320aic32x4.c | 210 ++++++++++++++++++++++++++++++--------- 1 file changed, 161 insertions(+), 49 deletions(-) diff --git a/sound/soc/codecs/tlv320aic32x4.c b/sound/soc/codecs/tlv320aic32x4.c index 0eb8acc..85d4978 100644 --- a/sound/soc/codecs/tlv320aic32x4.c +++ b/sound/soc/codecs/tlv320aic32x4.c @@ -187,36 +187,67 @@ static const char * const resistor_text[] = { "Off", "10 kOhm", "20 kOhm", "40 kOhm", }; -static SOC_ENUM_SINGLE_DECL(in1l_lpga_p_enum, AIC32X4_LMICPGAPIN, 6, - resistor_text); -static SOC_ENUM_SINGLE_DECL(in2l_lpga_p_enum, AIC32X4_LMICPGAPIN, 4, - resistor_text); -static SOC_ENUM_SINGLE_DECL(in3l_lpga_p_enum, AIC32X4_LMICPGAPIN, 2, - resistor_text); -static SOC_ENUM_SINGLE_DECL(in1r_lpga_p_enum, AIC32X4_LMICPGAPIN, 0, - resistor_text); - -static const struct snd_kcontrol_new left_input_mixer_controls[] = { - SOC_DAPM_ENUM("IN1_L P Switch", in1l_lpga_p_enum), - SOC_DAPM_ENUM("IN2_L P Switch", in2l_lpga_p_enum), - SOC_DAPM_ENUM("IN3_L P Switch", in3l_lpga_p_enum), - SOC_DAPM_ENUM("IN1_R P Switch", in1r_lpga_p_enum), +/* Left mixer pins */ +static SOC_ENUM_SINGLE_DECL(in1l_lpga_p_enum, AIC32X4_LMICPGAPIN, 6, resistor_text); +static SOC_ENUM_SINGLE_DECL(in2l_lpga_p_enum, AIC32X4_LMICPGAPIN, 4, resistor_text); +static SOC_ENUM_SINGLE_DECL(in3l_lpga_p_enum, AIC32X4_LMICPGAPIN, 2, resistor_text); +static SOC_ENUM_SINGLE_DECL(in1r_lpga_p_enum, AIC32X4_LMICPGAPIN, 0, resistor_text); + +static SOC_ENUM_SINGLE_DECL(cml_lpga_n_enum, AIC32X4_LMICPGANIN, 6, resistor_text); +static SOC_ENUM_SINGLE_DECL(in2r_lpga_n_enum, AIC32X4_LMICPGANIN, 4, resistor_text); +static SOC_ENUM_SINGLE_DECL(in3r_lpga_n_enum, AIC32X4_LMICPGANIN, 2, resistor_text); + +static const struct snd_kcontrol_new in1l_to_lmixer_controls[] = { + SOC_DAPM_ENUM("IN1_L L+ Switch", in1l_lpga_p_enum), +}; +static const struct snd_kcontrol_new in2l_to_lmixer_controls[] = { + SOC_DAPM_ENUM("IN2_L L+ Switch", in2l_lpga_p_enum), +}; +static const struct snd_kcontrol_new in3l_to_lmixer_controls[] = { + SOC_DAPM_ENUM("IN3_L L+ Switch", in3l_lpga_p_enum), +}; +static const struct snd_kcontrol_new in1r_to_lmixer_controls[] = { + SOC_DAPM_ENUM("IN1_R L+ Switch", in1r_lpga_p_enum), +}; +static const struct snd_kcontrol_new cml_to_lmixer_controls[] = { + SOC_DAPM_ENUM("CM_L L- Switch", cml_lpga_n_enum), +}; +static const struct snd_kcontrol_new in2r_to_lmixer_controls[] = { + SOC_DAPM_ENUM("IN2_R L- Switch", in2r_lpga_n_enum), +}; +static const struct snd_kcontrol_new in3r_to_lmixer_controls[] = { + SOC_DAPM_ENUM("IN3_R L- Switch", in3r_lpga_n_enum), }; -static SOC_ENUM_SINGLE_DECL(in1r_rpga_p_enum, AIC32X4_RMICPGAPIN, 6, - resistor_text); -static SOC_ENUM_SINGLE_DECL(in2r_rpga_p_enum, AIC32X4_RMICPGAPIN, 4, - resistor_text); -static SOC_ENUM_SINGLE_DECL(in3r_rpga_p_enum, AIC32X4_RMICPGAPIN, 2, - resistor_text); -static SOC_ENUM_SINGLE_DECL(in2l_rpga_p_enum, AIC32X4_RMICPGAPIN, 0, - resistor_text); - -static const struct snd_kcontrol_new right_input_mixer_controls[] = { - SOC_DAPM_ENUM("IN1_R P Switch", in1r_rpga_p_enum), - SOC_DAPM_ENUM("IN2_R P Switch", in2r_rpga_p_enum), - SOC_DAPM_ENUM("IN3_R P Switch", in3r_rpga_p_enum), - SOC_DAPM_ENUM("IN2_L P Switch", in2l_rpga_p_enum), +/* Right mixer pins */ +static SOC_ENUM_SINGLE_DECL(in1r_rpga_p_enum, AIC32X4_RMICPGAPIN, 6, resistor_text); +static SOC_ENUM_SINGLE_DECL(in2r_rpga_p_enum, AIC32X4_RMICPGAPIN, 4, resistor_text); +static SOC_ENUM_SINGLE_DECL(in3r_rpga_p_enum, AIC32X4_RMICPGAPIN, 2, resistor_text); +static SOC_ENUM_SINGLE_DECL(in2l_rpga_p_enum, AIC32X4_RMICPGAPIN, 0, resistor_text); +static SOC_ENUM_SINGLE_DECL(cmr_rpga_n_enum, AIC32X4_RMICPGANIN, 6, resistor_text); +static SOC_ENUM_SINGLE_DECL(in1l_rpga_n_enum, AIC32X4_RMICPGANIN, 4, resistor_text); +static SOC_ENUM_SINGLE_DECL(in3l_rpga_n_enum, AIC32X4_RMICPGANIN, 2, resistor_text); + +static const struct snd_kcontrol_new in1r_to_rmixer_controls[] = { + SOC_DAPM_ENUM("IN1_R R+ Switch", in1r_rpga_p_enum), +}; +static const struct snd_kcontrol_new in2r_to_rmixer_controls[] = { + SOC_DAPM_ENUM("IN2_R R+ Switch", in2r_rpga_p_enum), +}; +static const struct snd_kcontrol_new in3r_to_rmixer_controls[] = { + SOC_DAPM_ENUM("IN3_R R+ Switch", in3r_rpga_p_enum), +}; +static const struct snd_kcontrol_new in2l_to_rmixer_controls[] = { + SOC_DAPM_ENUM("IN2_L R+ Switch", in2l_rpga_p_enum), +}; +static const struct snd_kcontrol_new cmr_to_rmixer_controls[] = { + SOC_DAPM_ENUM("CM_R R- Switch", cmr_rpga_n_enum), +}; +static const struct snd_kcontrol_new in1l_to_rmixer_controls[] = { + SOC_DAPM_ENUM("IN1_L R- Switch", in1l_rpga_n_enum), +}; +static const struct snd_kcontrol_new in3l_to_rmixer_controls[] = { + SOC_DAPM_ENUM("IN3_L R- Switch", in3l_rpga_n_enum), }; static const struct snd_soc_dapm_widget aic32x4_dapm_widgets[] = { @@ -240,14 +271,39 @@ static const struct snd_soc_dapm_widget aic32x4_dapm_widgets[] = { &lor_output_mixer_controls[0], ARRAY_SIZE(lor_output_mixer_controls)), SND_SOC_DAPM_PGA("LOR Power", AIC32X4_OUTPWRCTL, 2, 0, NULL, 0), - SND_SOC_DAPM_MIXER("Left Input Mixer", SND_SOC_NOPM, 0, 0, - &left_input_mixer_controls[0], - ARRAY_SIZE(left_input_mixer_controls)), - SND_SOC_DAPM_MIXER("Right Input Mixer", SND_SOC_NOPM, 0, 0, - &right_input_mixer_controls[0], - ARRAY_SIZE(right_input_mixer_controls)), - SND_SOC_DAPM_ADC("Left ADC", "Left Capture", AIC32X4_ADCSETUP, 7, 0), + SND_SOC_DAPM_ADC("Right ADC", "Right Capture", AIC32X4_ADCSETUP, 6, 0), + SND_SOC_DAPM_MUX("IN1_R to Right Mixer Positive Resistor", SND_SOC_NOPM, 0, 0, + in1r_to_rmixer_controls), + SND_SOC_DAPM_MUX("IN2_R to Right Mixer Positive Resistor", SND_SOC_NOPM, 0, 0, + in2r_to_rmixer_controls), + SND_SOC_DAPM_MUX("IN3_R to Right Mixer Positive Resistor", SND_SOC_NOPM, 0, 0, + in3r_to_rmixer_controls), + SND_SOC_DAPM_MUX("IN2_L to Right Mixer Positive Resistor", SND_SOC_NOPM, 0, 0, + in2l_to_rmixer_controls), + SND_SOC_DAPM_MUX("CM_R to Right Mixer Negative Resistor", SND_SOC_NOPM, 0, 0, + cmr_to_rmixer_controls), + SND_SOC_DAPM_MUX("IN1_L to Right Mixer Negative Resistor", SND_SOC_NOPM, 0, 0, + in1l_to_rmixer_controls), + SND_SOC_DAPM_MUX("IN3_L to Right Mixer Negative Resistor", SND_SOC_NOPM, 0, 0, + in3l_to_rmixer_controls), + + SND_SOC_DAPM_ADC("Left ADC", "Left Capture", AIC32X4_ADCSETUP, 7, 0), + SND_SOC_DAPM_MUX("IN1_L to Left Mixer Positive Resistor", SND_SOC_NOPM, 0, 0, + in1l_to_lmixer_controls), + SND_SOC_DAPM_MUX("IN2_L to Left Mixer Positive Resistor", SND_SOC_NOPM, 0, 0, + in2l_to_lmixer_controls), + SND_SOC_DAPM_MUX("IN3_L to Left Mixer Positive Resistor", SND_SOC_NOPM, 0, 0, + in3l_to_lmixer_controls), + SND_SOC_DAPM_MUX("IN1_R to Left Mixer Positive Resistor", SND_SOC_NOPM, 0, 0, + in1r_to_lmixer_controls), + SND_SOC_DAPM_MUX("CM_L to Left Mixer Negative Resistor", SND_SOC_NOPM, 0, 0, + cml_to_lmixer_controls), + SND_SOC_DAPM_MUX("IN2_R to Left Mixer Negative Resistor", SND_SOC_NOPM, 0, 0, + in2r_to_lmixer_controls), + SND_SOC_DAPM_MUX("IN3_R to Left Mixer Negative Resistor", SND_SOC_NOPM, 0, 0, + in3r_to_lmixer_controls), + SND_SOC_DAPM_MICBIAS("Mic Bias", AIC32X4_MICBIAS, 6, 0), SND_SOC_DAPM_OUTPUT("HPL"), @@ -287,21 +343,77 @@ static const struct snd_soc_dapm_route aic32x4_dapm_routes[] = { {"LOR Power", NULL, "LOR Output Mixer"}, {"LOR", NULL, "LOR Power"}, - /* Left input */ - {"Left Input Mixer", "IN1_L P Switch", "IN1_L"}, - {"Left Input Mixer", "IN2_L P Switch", "IN2_L"}, - {"Left Input Mixer", "IN3_L P Switch", "IN3_L"}, - {"Left Input Mixer", "IN1_R P Switch", "IN1_R"}, - - {"Left ADC", NULL, "Left Input Mixer"}, - /* Right Input */ - {"Right Input Mixer", "IN1_R P Switch", "IN1_R"}, - {"Right Input Mixer", "IN2_R P Switch", "IN2_R"}, - {"Right Input Mixer", "IN3_R P Switch", "IN3_R"}, - {"Right Input Mixer", "IN2_L P Switch", "IN2_L"}, - - {"Right ADC", NULL, "Right Input Mixer"}, + {"Right ADC", NULL, "IN1_R to Right Mixer Positive Resistor"}, + {"IN1_R to Right Mixer Positive Resistor", "10 kOhm", "IN1_R"}, + {"IN1_R to Right Mixer Positive Resistor", "20 kOhm", "IN1_R"}, + {"IN1_R to Right Mixer Positive Resistor", "40 kOhm", "IN1_R"}, + + {"Right ADC", NULL, "IN2_R to Right Mixer Positive Resistor"}, + {"IN2_R to Right Mixer Positive Resistor", "10 kOhm", "IN2_R"}, + {"IN2_R to Right Mixer Positive Resistor", "20 kOhm", "IN2_R"}, + {"IN2_R to Right Mixer Positive Resistor", "40 kOhm", "IN2_R"}, + + {"Right ADC", NULL, "IN3_R to Right Mixer Positive Resistor"}, + {"IN3_R to Right Mixer Positive Resistor", "10 kOhm", "IN3_R"}, + {"IN3_R to Right Mixer Positive Resistor", "20 kOhm", "IN3_R"}, + {"IN3_R to Right Mixer Positive Resistor", "40 kOhm", "IN3_R"}, + + {"Right ADC", NULL, "IN2_L to Right Mixer Positive Resistor"}, + {"IN2_L to Right Mixer Positive Resistor", "10 kOhm", "IN2_L"}, + {"IN2_L to Right Mixer Positive Resistor", "20 kOhm", "IN2_L"}, + {"IN2_L to Right Mixer Positive Resistor", "40 kOhm", "IN2_L"}, + + {"Right ADC", NULL, "CM_R to Right Mixer Negative Resistor"}, + {"CM_R to Right Mixer Negative Resistor", "10 kOhm", "CM_R"}, + {"CM_R to Right Mixer Negative Resistor", "20 kOhm", "CM_R"}, + {"CM_R to Right Mixer Negative Resistor", "40 kOhm", "CM_R"}, + + {"Right ADC", NULL, "IN1_L to Right Mixer Negative Resistor"}, + {"IN1_L to Right Mixer Negative Resistor", "10 kOhm", "IN1_L"}, + {"IN1_L to Right Mixer Negative Resistor", "20 kOhm", "IN1_L"}, + {"IN1_L to Right Mixer Negative Resistor", "40 kOhm", "IN1_L"}, + + {"Right ADC", NULL, "IN3_L to Right Mixer Negative Resistor"}, + {"IN3_L to Right Mixer Negative Resistor", "10 kOhm", "IN3_L"}, + {"IN3_L to Right Mixer Negative Resistor", "20 kOhm", "IN3_L"}, + {"IN3_L to Right Mixer Negative Resistor", "40 kOhm", "IN3_L"}, + + /* Left Input */ + {"Left ADC", NULL, "IN1_L to Left Mixer Positive Resistor"}, + {"IN1_L to Left Mixer Positive Resistor", "10 kOhm", "IN1_L"}, + {"IN1_L to Left Mixer Positive Resistor", "20 kOhm", "IN1_L"}, + {"IN1_L to Left Mixer Positive Resistor", "40 kOhm", "IN1_L"}, + + {"Left ADC", NULL, "IN2_L to Left Mixer Positive Resistor"}, + {"IN2_L to Left Mixer Positive Resistor", "10 kOhm", "IN2_L"}, + {"IN2_L to Left Mixer Positive Resistor", "20 kOhm", "IN2_L"}, + {"IN2_L to Left Mixer Positive Resistor", "40 kOhm", "IN2_L"}, + + {"Left ADC", NULL, "IN3_L to Left Mixer Positive Resistor"}, + {"IN3_L to Left Mixer Positive Resistor", "10 kOhm", "IN3_L"}, + {"IN3_L to Left Mixer Positive Resistor", "20 kOhm", "IN3_L"}, + {"IN3_L to Left Mixer Positive Resistor", "40 kOhm", "IN3_L"}, + + {"Left ADC", NULL, "IN1_R to Left Mixer Positive Resistor"}, + {"IN1_R to Left Mixer Positive Resistor", "10 kOhm", "IN1_R"}, + {"IN1_R to Left Mixer Positive Resistor", "20 kOhm", "IN1_R"}, + {"IN1_R to Left Mixer Positive Resistor", "40 kOhm", "IN1_R"}, + + {"Left ADC", NULL, "CM_L to Left Mixer Negative Resistor"}, + {"CM_L to Left Mixer Negative Resistor", "10 kOhm", "CM_L"}, + {"CM_L to Left Mixer Negative Resistor", "20 kOhm", "CM_L"}, + {"CM_L to Left Mixer Negative Resistor", "40 kOhm", "CM_L"}, + + {"Left ADC", NULL, "IN2_R to Left Mixer Negative Resistor"}, + {"IN2_R to Left Mixer Negative Resistor", "10 kOhm", "IN2_R"}, + {"IN2_R to Left Mixer Negative Resistor", "20 kOhm", "IN2_R"}, + {"IN2_R to Left Mixer Negative Resistor", "40 kOhm", "IN2_R"}, + + {"Left ADC", NULL, "IN3_R to Left Mixer Negative Resistor"}, + {"IN3_R to Left Mixer Negative Resistor", "10 kOhm", "IN3_R"}, + {"IN3_R to Left Mixer Negative Resistor", "20 kOhm", "IN3_R"}, + {"IN3_R to Left Mixer Negative Resistor", "40 kOhm", "IN3_R"}, }; static const struct regmap_range_cfg aic32x4_regmap_pages[] = { -- 2.5.0

2 1

[alsa-devel] [PATCH v2 0/6] ASoC: fsl_ssi: Fixing various channel slips and bad samples insertions
by Arnaud Mouiche 13 May '16

13 May '16

This series of patch is an attempt to fix the fsl_ssi driver to use it in TDM mode (DSP A or B) with a large number of channels/slots. Version 2: - fixing a missing patch - checkpatch.pl - ... well, learning how to send a patchset. Sorry. ;) Bugs are detected and fixed on a imx6sl platform with linux 4.3, where 2 SSI interfaces are used. SSI3 configured as a master of the bus, SSI2 as a slave. Various loopback scenario are tested: * scenario 1: SSI3 (master) with TXD to RXD loopback | |---> TXD --\ SSI3 |<--- RXD --/ (master) |---> SYNC |---> BCLK | * scenario 2: SSI3 connected to SSI2 | |---> TXD --------\ SSI3 |<--- RXD -----\ | (master) |---> SYNC --\ | | |---> BCLK | | | | | | | | | | | | | |<--- BCLK | | | SSI2 |<--- SYNC --/ | | (slave) |---> TXD ------/ | |<--- RXD --------/ | A test software (called atest) was developed and available. [1] It basically generate/check specials frames with S16_LE sequence samples NNN0, NNN1, NNN2 ... NNNC with NNN = frame number, and C the number of channels-1 Patch 1: Limitation fix. Prerequisite to use the fsl_ssi driver with up to 32 channels / slots Patch 2: Bug fix. Prerequisite to setup a relative high bitclk for our tests in 8ch / 16bits / 48kHz Patch 3: Simply save a 'dev' reference inside ssi_private for dev_err() purpose. (ssi_private is only available in lot of places, and ssi_private->pdev is deprecated and NULL indeed) Patch 4: Fix playback samples being dropped because the TX fifo was not ready at the time the DMA starts filling (only in case where playback is started AFTER the capture) Detected in loopback scenario 1, with following script (> 80 % of reproducibility) $ atest -D SSI3 -c 8 -r 48000 capture play dbg: set period size: 960 dbg: SSI3: capture_start dbg: SSI3: playback_start err: invalid frame after 1 null frames err: 0000 0000 0013 0014 0015 0016 0017 0020 dbg: SIGINT total number of sequence errors: 21119 here we see that samples 0000 0001 ... 0012 are not present in the output. In addition, this the number of samples dropped is not a multiple of the number of channel, we have a a channel slip. Patch 5: This is the Caleb Crome's case [2], where the SSI starts to generate samples while the TX FIFO is not filled by the DMA yet. Void samples can be inserted before DMA streaming. Detected in loopback scenario 2, with following script (reproducibility < 1%) $ atest -D SSI3 -c 8 -r 48000 capture & $ sleep 0.2 $ atest -d 1 -D SSI2 -c 8 -r 48000 play dbg: SSI3: capture_start dbg: set period size: 960 dbg: SSI2: playback_start dbg: start a 1 seconds duration timer err: invalid frame after 11568 null frames err: 0000 0010 0011 0012 0013 0014 0015 0016 err: 0017 0020 0021 0022 0023 0024 0025 0026 Patch 6: Deals with Capture restart whereas Playback is still running (or the opposite, Playback restart whereas Capture is till running). Capture restart whereas Playback case is detected in loopback scenario 1 (reproducibility 100%). A playback session is running in background, and 2 consecutive Captures are performed. The first is fine, the second fails. We see at the 2nd capture startup that we receive 15 samples still pending in the RX FIFO from the previous capture session. => We are receiving invalid samples + slips the channels $ atest -D SSI3 -c 8 -r 48000 play & dbg: SSI3: playback_start $ atest -d 1 -D SSI3 -c 8 -r 48000 capture dbg: SSI3: capture_start dbg: start a 1 seconds duration timer warn: Valid frame after 1 null frames warn: 3a90 3a91 3a92 3a93 3a94 3a95 3a96 3a97 total number of sequence errors: 0 $ atest -I 5 -d 1 -D SSI3 -c 8 -r 48000 capture # restart the capture dbg: SSI3: capture_start dbg: start a 1 seconds duration timer err: invalid frame after 1 null frames err: 8dd6 8dd7 8de0 8de1 8de2 8de3 8de4 8de5 err: 8de6 8de7 8df0 8df1 8df2 8df3 8df4 c0c0 err: c0c1 c0c2 c0c3 c0c4 c0c5 c0c6 c0c7 c0d0 err: c0d1 c0d2 c0d3 c0d4 c0d5 c0d6 c0d7 c0e0 err: c0e1 c0e2 c0e3 c0e4 c0e5 c0e6 c0e7 c0f0 Playback restart whereas Capture case is also detected with loopback scenario 1 (reproducibility 100%), capturing continuously, and playing by periods of time. $ atest -a -D SSI3 -c 8 -r 48000 capture play -r 1000,200 dbg: SSI3: capture_start dbg: SSI3: playback_start dbg: SSI3: will stop every 1000 ms during 200 ms warn: Valid frame after 4 null frames warn: 0010 0011 0012 0013 0014 0015 0016 0017 warn: SSI3: PT_W4_STOP warn: SSI3: PT_W4_RESTART err: invalid frame after 1602 null frames err: eaa1 eaa2 eaa3 eaa4 eaa5 eaa6 eaa7 eab0 err: eab1 eab2 eab3 eab4 5810 5811 5812 5813 dbg: stop on first error total number of sequence errors: 143 Both cases are resolved by using the mostly undocumented SOR.RX_CLR and SOR TX_CLR (we can find the documentation in IMX51 reference manual at section 56.3.3.15). Arnaud [1] https://github.com/amouiche/atest [2] http://mailman.alsa-project.org/pipermail/alsa-devel/2015-October/099221.ht… Arnaud Mouiche (6): ASoC: fsl_ssi: Real hardware channels max number is 32 ASoC: fsl_ssi: The IPG/5 limitation concerns the bitclk, not the sysclk. ASoC: fsl_ssi: Save a dev reference for dev_err() purpose. ASoC: fsl_ssi: Fix samples being dropped as Playback startup ASoC: fsl_ssi: Fix channel slipping in Playback at startup ASoC: fsl_ssi: Fix channel slipping on capture (or playback) restart in full duplex. sound/soc/fsl/fsl_ssi.c | 74 +++++++++++++++++++++++++++++++++++++++++-------- 1 file changed, 63 insertions(+), 11 deletions(-) -- 1.9.1

5 11

[alsa-devel] [PATCH 0/5] ASoC: fsl_ssi: Fixing various channel slips and bad samples insertions
by Arnaud Mouiche 13 May '16

13 May '16

This series of patch is an attempt to fix the fsl_ssi driver to use it in TDM mode (DSP A or B) with a large number of channels/slots. Bugs are detected and fixed on a imx6sl platform with linux 4.3, where 2 SSI interfaces are used. SSI3 configured as a master of the bus, SSI2 as a slave. Various loopback scenario are tested: * scenario 1: SSI3 (master) with TXD to RXD loopback | |---> TXD --\ SSI3 |<--- RXD --/ (master) |---> SYNC |---> BCLK | * scenario 2: SSI3 connected to SSI2 | |---> TXD --------\ SSI3 |<--- RXD -----\ | (master) |---> SYNC --\ | | |---> BCLK | | | | | | | | | | | | | |<--- BCLK | | | SSI2 |<--- SYNC --/ | | (slave) |---> TXD ------/ | |<--- RXD --------/ | A test software (called atest) was developed and available. [1] It basically generate/check specials frames with S16_LE sequence samples NNN0, NNN1, NNN2 ... NNNC with NNN = frame number, and C the number of channels-1 Patch 1: Limitation fix. Prerequisite to use the fsl_ssi driver with up to 32 channels / slots Patch 2: Bug fix. Prerequisite to setup a relative high bitclk for our tests in 8ch / 16bits / 48kHz Patch 3: Simply save a 'dev' reference inside ssi_private for dev_err() purpose. (ssi_private is only available in lot of places, and ssi_private->pdev is deprecated and NULL indeed) Patch 4: Fix playback samples being dropped because the TX fifo was not ready at the time the DMA starts filling (only in case where playback is started AFTER the capture) Detected in loopback scenario 1, with following script (> 80 % of reproducibility) $ atest -D SSI3 -c 8 -r 48000 capture play dbg: set period size: 960 dbg: SSI3: capture_start dbg: SSI3: playback_start err: invalid frame after 1 null frames err: 0000 0000 0013 0014 0015 0016 0017 0020 dbg: SIGINT total number of sequence errors: 21119 here we see that samples 0000 0001 ... 0012 are not present in the output. In addition, this the number of samples dropped is not a multiple of the number of channel, we have a a channel slip. Patch 5: This is the Caleb Crome's case [2], where the SSI starts to generate samples while the TX FIFO is not filled by the DMA yet. Void samples can be inserted before DMA streaming. Detected in loopback scenario 2, with following script (reproducibility < 1%) $ atest -D SSI3 -c 8 -r 48000 capture & $ sleep 0.2 $ atest -d 1 -D SSI2 -c 8 -r 48000 play dbg: SSI3: capture_start dbg: set period size: 960 dbg: SSI2: playback_start dbg: start a 1 seconds duration timer err: invalid frame after 11568 null frames err: 0000 0010 0011 0012 0013 0014 0015 0016 err: 0017 0020 0021 0022 0023 0024 0025 0026 Patch 6: Deals with Capture restart whereas Playback is still running (or the opposite, Playback restart whereas Capture is till running). Capture restart whereas Playback case is detected in loopback scenario 1 (reproducibility 100%). A playback session is running in background, and 2 consecutive Captures are performed. The first is fine, the second fails. We see at the 2nd capture startup that we receive 15 samples still pending in the RX FIFO from the previous capture session. => We are receiving invalid samples + slips the channels $ atest -D SSI3 -c 8 -r 48000 play & dbg: SSI3: playback_start $ atest -d 1 -D SSI3 -c 8 -r 48000 capture dbg: SSI3: capture_start dbg: start a 1 seconds duration timer warn: Valid frame after 1 null frames warn: 3a90 3a91 3a92 3a93 3a94 3a95 3a96 3a97 total number of sequence errors: 0 $ atest -I 5 -d 1 -D SSI3 -c 8 -r 48000 capture # restart the capture dbg: SSI3: capture_start dbg: start a 1 seconds duration timer err: invalid frame after 1 null frames err: 8dd6 8dd7 8de0 8de1 8de2 8de3 8de4 8de5 err: 8de6 8de7 8df0 8df1 8df2 8df3 8df4 c0c0 err: c0c1 c0c2 c0c3 c0c4 c0c5 c0c6 c0c7 c0d0 err: c0d1 c0d2 c0d3 c0d4 c0d5 c0d6 c0d7 c0e0 err: c0e1 c0e2 c0e3 c0e4 c0e5 c0e6 c0e7 c0f0 Playback restart whereas Capture case is also detected with loopback scenario 1 (reproducibility 100%), capturing continuously, and playing by periods of time. $ atest -a -D SSI3 -c 8 -r 48000 capture play -r 1000,200 dbg: SSI3: capture_start dbg: SSI3: playback_start dbg: SSI3: will stop every 1000 ms during 200 ms warn: Valid frame after 4 null frames warn: 0010 0011 0012 0013 0014 0015 0016 0017 warn: SSI3: PT_W4_STOP warn: SSI3: PT_W4_RESTART err: invalid frame after 1602 null frames err: eaa1 eaa2 eaa3 eaa4 eaa5 eaa6 eaa7 eab0 err: eab1 eab2 eab3 eab4 5810 5811 5812 5813 dbg: stop on first error total number of sequence errors: 143 Both cases are resolved by using the mostly undocumented SOR.RX_CLR and SOR TX_CLR (we can find the documentation in IMX51 reference manual at section 56.3.3.15). Arnaud [1] https://github.com/amouiche/atest [2] http://mailman.alsa-project.org/pipermail/alsa-devel/2015-October/099221.ht… Arnaud Mouiche (5): ASoC: fsl_ssi: The IPG/5 limitation concerns the bitclk, not the sysclk. ASoC: fsl_ssi: Save a dev reference for dev_err() purpose. ASoC: fsl_ssi: Fix samples being dropped as Playback startup ASoC: fsl_ssi: Fix channel slipping in Playback at startup ASoC: fsl_ssi: Fix channel slipping on capture (or playback) restart in full duplex. sound/soc/fsl/fsl_ssi.c | 69 ++++++++++++++++++++++++++++++++++++++++++------- 1 file changed, 60 insertions(+), 9 deletions(-) -- 1.9.1

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[alsa-devel] [PATCH v4 0/6] ASoC: fsl_ssi: Fixing various channel slips and bad samples insertions
by Arnaud Mouiche 13 May '16

13 May '16

Version 4: - rebase on top of v4.6-rcX + alsa-broonie/for-next. - The only change with v3 concerns the patch 6/6, since CCSR_SSI_SOR is now already included in the list of volatile registers. Version 3: - rebase + fix + test on top of linux 4.4 + 'for-next' Version 2: - fixing a missing patch - checkpatch.pl - ... well, learning how to send a patchset. Sorry. Bugs are detected and fixed on a imx6sl platform with linux 4.4 + 'for-next' branch, where 2 SSI interfaces are used. SSI3 configured as a master of the bus, SSI2 as a slave. Similar tests were done on a imx6solo platform by Caleb Crome (He will propose a patch concerning fifo depth to fix DMA xrun at highest bitrates) Various loopback scenario are tested: * scenario 1: SSI3 (master) with TXD to RXD loopback | |---> TXD --\ SSI3 |<--- RXD --/ (master) |---> SYNC |---> BCLK | * scenario 2: SSI3 connected to SSI2 | |---> TXD --------\ SSI3 |<--- RXD -----\ | (master) |---> SYNC --\ | | |---> BCLK | | | | | | | | | | | | | |<--- BCLK | | | SSI2 |<--- SYNC --/ | | (slave) |---> TXD ------/ | |<--- RXD --------/ | A test software (called atest) was developed and available. [1] It basically generate/check specials frames with S16_LE sequence samples NNN0, NNN1, NNN2 ... NNNC with NNN = frame number, and C the number of channels-1 Patch 1: Limitation fix. Prerequisite to use the fsl_ssi driver with up to 32 channels / slots Patch 2: Bug fix. Prerequisite to setup a relative high bitclk for our tests in 8ch / 16bits / 48kHz Patch 3: Simply save a 'dev' reference inside ssi_private for dev_err() purpose. (ssi_private is only available in lot of places, and ssi_private->pdev is deprecated and NULL indeed) Patch 4: Fix playback samples being dropped because the TX fifo was not ready at the time the DMA starts filling (only in case where playback is started AFTER the capture) Detected in loopback scenario 1, with following script (> 80 % of reproducibility) $ atest -D SSI3 -c 8 -r 48000 capture play dbg: set period size: 960 dbg: SSI3: capture_start dbg: SSI3: playback_start err: invalid frame after 1 null frames err: 0000 0000 0013 0014 0015 0016 0017 0020 dbg: SIGINT total number of sequence errors: 21119 here we see that samples 0000 0001 ... 0012 are not present in the output. In addition, this the number of samples dropped is not a multiple of the number of channel, we have a a channel slip. Patch 5: This is the Caleb Crome's case [2], where the SSI starts to generate samples while the TX FIFO is not filled by the DMA yet. Void samples can be inserted before DMA streaming. Detected in loopback scenario 2, with following script (reproducibility < 1%) $ atest -D SSI3 -c 8 -r 48000 capture & $ sleep 0.2 $ atest -d 1 -D SSI2 -c 8 -r 48000 play dbg: SSI3: capture_start dbg: set period size: 960 dbg: SSI2: playback_start dbg: start a 1 seconds duration timer err: invalid frame after 11568 null frames err: 0000 0010 0011 0012 0013 0014 0015 0016 err: 0017 0020 0021 0022 0023 0024 0025 0026 Patch 6: Deals with Capture restart whereas Playback is still running (or the opposite, Playback restart whereas Capture is till running). Capture restart whereas Playback case is detected in loopback scenario 1 (reproducibility 100%). A playback session is running in background, and 2 consecutive Captures are performed. The first is fine, the second fails. We see at the 2nd capture startup that we receive 15 samples still pending in the RX FIFO from the previous capture session. => We are receiving invalid samples + slips the channels $ atest -D SSI3 -c 8 -r 48000 play & dbg: SSI3: playback_start $ atest -d 1 -D SSI3 -c 8 -r 48000 capture dbg: SSI3: capture_start dbg: start a 1 seconds duration timer warn: Valid frame after 1 null frames warn: 3a90 3a91 3a92 3a93 3a94 3a95 3a96 3a97 total number of sequence errors: 0 $ atest -I 5 -d 1 -D SSI3 -c 8 -r 48000 capture # restart the capture dbg: SSI3: capture_start dbg: start a 1 seconds duration timer err: invalid frame after 1 null frames err: 8dd6 8dd7 8de0 8de1 8de2 8de3 8de4 8de5 err: 8de6 8de7 8df0 8df1 8df2 8df3 8df4 c0c0 err: c0c1 c0c2 c0c3 c0c4 c0c5 c0c6 c0c7 c0d0 err: c0d1 c0d2 c0d3 c0d4 c0d5 c0d6 c0d7 c0e0 err: c0e1 c0e2 c0e3 c0e4 c0e5 c0e6 c0e7 c0f0 Playback restart whereas Capture case is also detected with loopback scenario 1 (reproducibility 100%), capturing continuously, and playing by periods of time. $ atest -a -D SSI3 -c 8 -r 48000 capture play -r 1000,200 dbg: SSI3: capture_start dbg: SSI3: playback_start dbg: SSI3: will stop every 1000 ms during 200 ms warn: Valid frame after 4 null frames warn: 0010 0011 0012 0013 0014 0015 0016 0017 warn: SSI3: PT_W4_STOP warn: SSI3: PT_W4_RESTART err: invalid frame after 1602 null frames err: eaa1 eaa2 eaa3 eaa4 eaa5 eaa6 eaa7 eab0 err: eab1 eab2 eab3 eab4 5810 5811 5812 5813 dbg: stop on first error total number of sequence errors: 143 Both cases are resolved by using the mostly undocumented SOR.RX_CLR and SOR TX_CLR (we can find the documentation in IMX51 reference manual at section 56.3.3.15). Arnaud [1] https://github.com/amouiche/atest [2] http://mailman.alsa-project.org/pipermail/alsa-devel/2015-October/099221.ht… Arnaud Mouiche (6): ASoC: fsl_ssi: Real hardware channels max number is 32 ASoC: fsl_ssi: The IPG/5 limitation concerns the bitclk, not the sysclk. ASoC: fsl_ssi: Save a dev reference for dev_err() purpose. ASoC: fsl_ssi: Fix samples being dropped at Playback startup ASoC: fsl_ssi: Fix channel slipping in Playback at startup ASoC: fsl_ssi: Fix channel slipping on capture (or playback) restart in full duplex. sound/soc/fsl/fsl_ssi.c | 80 ++++++++++++++++++++++++++++++++++++++++++------- 1 file changed, 69 insertions(+), 11 deletions(-) -- 1.9.1

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[alsa-devel] [PATCH v3 0/7] ARM/ASoC: OMAP3: Fix McBSP2/3 sidetone support
by Peter Ujfalusi 13 May '16

13 May '16

Hi, Based on the ongoing discussion on v2 (ARM: OMAP3: Fix McBSP2/3 hwmod setup for sidetone) I have dropped the removal of the sidetone hwmod and only corrected it. The series now includes all related changes needed to have correct sidetone support whenever we boot in legacy or in DT mode. This time the ASoC part have dependency on earlier patches so they can not be applied separately. Regards, Peter --- Peter Ujfalusi (7): ARM: OMAP3: hwmod data: Fix McBSP2/3 sidetone data ARM: dts: omap3: Add clocks to McBSP nodes ARM: OMAP3: McBSP: New callback for McBSP2/3 ICLK idle configuration ARM: OMAP3: pdata-quirks: Add support for McBSP2/3 sidetone handling ASoc: omap-mcbsp: Rename omap_mcbsp_sysfs_remove() to omap_mcbsp_cleanup() ASoC: omap-mcbsp: sidetone: Use the new callback for iclk handling ARM: OMAP2+: McBSP: Remove the old iclk allow/deny idle code arch/arm/boot/dts/omap3.dtsi | 10 ++++++++++ arch/arm/mach-omap2/mcbsp.c | 31 ++++++++++++++++------------- arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 24 ++++------------------ arch/arm/mach-omap2/pdata-quirks.c | 18 +++++++++++++++++ include/linux/platform_data/asoc-ti-mcbsp.h | 4 +++- sound/soc/omap/mcbsp.c | 21 +++++++++++++------ sound/soc/omap/mcbsp.h | 3 ++- sound/soc/omap/omap-mcbsp.c | 5 ++++- 8 files changed, 73 insertions(+), 43 deletions(-) -- 2.8.1

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[alsa-devel] [PATCH] ASoC: atmel_ssc_dai: note buggy I2S support when the codec masters LRCLK
by Peter Rosin 13 May '16

13 May '16

The only difference in register settings between I2S and DSP mode A, for the SND_SOC_DAIFMT_CBM_CFM case, is the start condition (which is SSC_START_FALLING_RF for I2S and SSC_START_RISING_RF for DSP mode A). As this is not the only difference between the two formats, it is an indicator that something is seriously wrong. And it is the I2S support that is broken. While the start condition is correct for the left channel word in the I2S case, it is not correct that the right channel word follows immediately after the left channel word. The start of the right channel word should be triggered by a rising edge on LRCLK in the I2S case, something which simply does not happen. The correct thing to do would be to simply remove the alleged support for I2S/CBM_CFM, but that is likely to cause regressions. So, just make a note about the buggy I2S support in the source. Signed-off-by: Peter Rosin <peda(a)axentia.se> --- sound/soc/atmel/atmel_ssc_dai.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/sound/soc/atmel/atmel_ssc_dai.c b/sound/soc/atmel/atmel_ssc_dai.c index 4ab1e2013238..3108c6e20ad5 100644 --- a/sound/soc/atmel/atmel_ssc_dai.c +++ b/sound/soc/atmel/atmel_ssc_dai.c @@ -558,7 +558,15 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream *substream, break; case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM: - /* I2S format, CODEC supplies BCLK and LRC clocks. */ + /* + * I2S format, CODEC supplies BCLK and LRC clocks. + * NOTE! This is not really I2S, as the SSC does not allow + * for any extra empty BCLK cycles after the left channel + * word. I.e. the SSC is only looking at the falling edge + * of LRCLK and ignores the rising edge. + * In reality, this is DSP mode A with inverted LRCLK. + * Use DSP mode A instead, if your codec supports it. + */ rcmr = SSC_BF(RCMR_PERIOD, 0) | SSC_BF(RCMR_STTDLY, START_DELAY) | SSC_BF(RCMR_START, SSC_START_FALLING_RF) -- 2.1.4

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[alsa-devel] [PATCH 0/9] ASoC: es8328 codec improvements
by John Keeping 13 May '16

13 May '16

The first 4 patches are bug fixes, then the next 4 add support for more sample rates and formats. The final patch I'm slightly unsure about since the hardware does allow different playback and capture rates, but it only allows 8kHz and 48kHz or 8.0182kHz and 44.1kHz, all other rates have to be symmetric. All of these patches have been tested on a Radxa Rock2 Square with rockchip-i2s. John Keeping (9): ASoC: es8328: Move clock setup to hw_params ASoC: es8328: Fix ADC format setup ASoC: es8328: Fix mask for VMIDSEL ASoC: es8328: Use single R/W for regmap ASoC: es8328: Use more suitable definition for mic bias ASoC: es8328: Move sample size setup to hw_params ASoC: es8328: Support more sample formats ASoC: es8328: Support more sample rates ASoC: es8328: Set symmetric rates sound/soc/codecs/es8328.c | 198 +++++++++++++++++++++++++++++++++++----------- sound/soc/codecs/es8328.h | 23 ++++-- 2 files changed, 168 insertions(+), 53 deletions(-) -- 2.8.0.rc4.238.g874082a

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