May 2016 - Alsa-devel - mailman.alsa-project.org

[alsa-devel] [PATCH] ASoC: sgtl5000: only check VDDD-supply, not revision
by Clemens Gruber 31 May '16

31 May '16

Instead of checking the SGTL5000 chip revision, we should only check if the VDDD regulator exists and only call sgtl5000_replace_vddd_with_ldo if the regulator is missing. Otherwise, the user reads in the kernel log that the internal LDO is used, even though he did follow the NXP recommendation to use external VDDD and also specified VDDD-supply in the devicetree. Also remove the comment, which incorrectly states that external VDDD is only supported for SGTL5000 chip revisions < 0x11. Official NXP documentation recommends using external VDDD and not the internal LDO due to the SGTL5000 erratum ER1. This also applies to revisions >= 0x11. Tested on an i.MX6Q board with SGTL5000 rev 0x11 and external VDDD. Signed-off-by: Clemens Gruber <clemens.gruber(a)pqgruber.com> --- sound/soc/codecs/sgtl5000.c | 19 ++++++++----------- 1 file changed, 8 insertions(+), 11 deletions(-) diff --git a/sound/soc/codecs/sgtl5000.c b/sound/soc/codecs/sgtl5000.c index 08b4046..fbad4fb 100644 --- a/sound/soc/codecs/sgtl5000.c +++ b/sound/soc/codecs/sgtl5000.c @@ -1286,17 +1286,14 @@ static int sgtl5000_enable_regulators(struct snd_soc_codec *codec) for (i = 0; i < ARRAY_SIZE(sgtl5000->supplies); i++) sgtl5000->supplies[i].supply = supply_names[i]; - /* External VDDD only works before revision 0x11 */ - if (sgtl5000->revision < 0x11) { - vddd = regulator_get_optional(codec->dev, "VDDD"); - if (IS_ERR(vddd)) { - /* See if it's just not registered yet */ - if (PTR_ERR(vddd) == -EPROBE_DEFER) - return -EPROBE_DEFER; - } else { - external_vddd = 1; - regulator_put(vddd); - } + vddd = regulator_get_optional(codec->dev, "VDDD"); + if (IS_ERR(vddd)) { + /* See if it's just not registered yet */ + if (PTR_ERR(vddd) == -EPROBE_DEFER) + return -EPROBE_DEFER; + } else { + external_vddd = 1; + regulator_put(vddd); } if (!external_vddd) { -- 2.8.3

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[alsa-devel] [RFC] sgtl5000: check VDDD-supply instead of revision
by Clemens Gruber 31 May '16

31 May '16

Hi, I am using a SGTL5000 rev 0x11 with external VDDD, as recommended by NXP documentation and errata sheet: http://cache.nxp.com/files/analog/doc/errata/SGTL5000ER.pdf The linux sgtl5000 codec driver contains a comment, warning that external VDDD can't be used on revisions >= 0x11, which is probably a leftover from the first implementation. This is very confusing because it contradicts the NXP documentation. Also, on every boot, the user gets a warning that the SGTL5000 is using the internal LDO (even though external VDDD is present). Maybe instead of checking the revision, we should only check if the VDDD-supply regulator exists and only if it does not exist, call sgtl5000_replace_vddd_with_ldo? I'd like to hear your comments if this approach is valid or if I missed something in my assumptions. In my DT, the VDDD-supply regulator is just a dummy / regulator-fixed with regulator-always-on; set, because the 1.8V external VDDD supply on my board is always powered on. I could not test if it works with regulator-fixed with gpio nodes, which actually switch the supply line on or off. If everything is OK, I'd send a formal patch to the mailing list. See below for the current state of my patch. Tested on an i.MX6Q board with SGTL5000 rev 0x11 and external VDDD. Thanks, Clemens --- sound/soc/codecs/sgtl5000.c | 19 ++++++++----------- 1 file changed, 8 insertions(+), 11 deletions(-) diff --git a/sound/soc/codecs/sgtl5000.c b/sound/soc/codecs/sgtl5000.c index 08b4046..fbad4fb 100644 --- a/sound/soc/codecs/sgtl5000.c +++ b/sound/soc/codecs/sgtl5000.c @@ -1286,17 +1286,14 @@ static int sgtl5000_enable_regulators(struct snd_soc_codec *codec) for (i = 0; i < ARRAY_SIZE(sgtl5000->supplies); i++) sgtl5000->supplies[i].supply = supply_names[i]; - /* External VDDD only works before revision 0x11 */ - if (sgtl5000->revision < 0x11) { - vddd = regulator_get_optional(codec->dev, "VDDD"); - if (IS_ERR(vddd)) { - /* See if it's just not registered yet */ - if (PTR_ERR(vddd) == -EPROBE_DEFER) - return -EPROBE_DEFER; - } else { - external_vddd = 1; - regulator_put(vddd); - } + vddd = regulator_get_optional(codec->dev, "VDDD"); + if (IS_ERR(vddd)) { + /* See if it's just not registered yet */ + if (PTR_ERR(vddd) == -EPROBE_DEFER) + return -EPROBE_DEFER; + } else { + external_vddd = 1; + regulator_put(vddd); } if (!external_vddd) { -- 2.8.3

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[alsa-devel] [PATCH 1/2 v2] ASoC: nau8825: non-clock jack detection for power saving at standby
by John Hsu 31 May '16

31 May '16

The driver changes jack type detection interruption to non-clock archi- tecture for less 1mW power saving. The architecture is called manual mode jack detection. It has no hardware debounce, no jack type detection, but only detecting jack insertion. After jack insertion, the driver will switch to auto mode jack detection with internal clock which can detect microphone, jack type and do hardware debounce. The manual architecture has these main changes including codec initiation, interruption, clock control, and power management. When codec initiation or system resume, the clock is closed as jack insertion detection at man- ual mode, and bypass debounce circuit. These configurations move to resume setup function when setup bias level after resume. When jack insertion detection happens, the manual mode turns off and make configuration about jack type detection interruption at auto mode in auto irq setup function which can detect microphone and jack type. The inter- ruption will switch to manual mode again with clock free until jack ejec- tion happens. The system clock configuration adds clock disable option which can disable internal VCO clock. Before the system clock change, there is an restric- tion added to make sure clock disabled and not config any clock when no headset connected. In power management, we involve the solution about races and jack detec- tion in resume from Ben Zhang in the following patch and list his comment. [PATCH] ASoC: nau8825: Fix jack detection across suspend "Jack plug status is rechecked at resume to handle plug/unplug in S3 when the chip has no power." "Suspend/resume callbacks are moved from the i2c dev_pm_ops to snd_soc_codec_driver. soc_resume_deferred is a delayed work which may trigger nau8825_set_bias_level. The bias change races against dev_pm_ops, causing jack detection issues. soc_resume_deferred ensures bias change and snd_soc_codec_driver suspend/resume are sequenced correctly." Change SAR widget to supply type which can prevent the codec keeping at SND_SOC_BIAS_ON during suspend. The codec suspend function can just invoke normally. Before the system suspends, the driver turns off all interruptions. Keep the interruption quiet before resume setup completes. The ADC channel will be disabled which is needed for interruptions at audo mode. Signed-off-by: John Hsu <KCHSU0(a)nuvoton.com> --- sound/soc/codecs/nau8825.c | 249 ++++++++++++++++++++++++++++++++------------- sound/soc/codecs/nau8825.h | 9 +- 2 files changed, 188 insertions(+), 70 deletions(-) diff --git a/sound/soc/codecs/nau8825.c b/sound/soc/codecs/nau8825.c index 81fc97b..abaa5f4 100644 --- a/sound/soc/codecs/nau8825.c +++ b/sound/soc/codecs/nau8825.c @@ -30,10 +30,16 @@ #include "nau8825.h" + +#define NUVOTON_CODEC_DAI "nau8825-hifi" + #define NAU_FREF_MAX 13500000 #define NAU_FVCO_MAX 124000000 #define NAU_FVCO_MIN 90000000 +static int nau8825_configure_sysclk(struct nau8825 *nau8825, + int clk_id, unsigned int freq); + struct nau8825_fll { int mclk_src; int ratio; @@ -617,9 +623,6 @@ int nau8825_enable_jack_detect(struct snd_soc_codec *codec, NAU8825_HSD_AUTO_MODE | NAU8825_SPKR_DWN1R | NAU8825_SPKR_DWN1L, NAU8825_HSD_AUTO_MODE | NAU8825_SPKR_DWN1R | NAU8825_SPKR_DWN1L); - regmap_update_bits(regmap, NAU8825_REG_INTERRUPT_MASK, - NAU8825_IRQ_HEADSET_COMPLETE_EN | NAU8825_IRQ_EJECT_EN, 0); - return 0; } EXPORT_SYMBOL_GPL(nau8825_enable_jack_detect); @@ -635,16 +638,6 @@ static bool nau8825_is_jack_inserted(struct regmap *regmap) static void nau8825_restart_jack_detection(struct regmap *regmap) { - /* Chip needs one FSCLK cycle in order to generate interrupts, - * as we cannot guarantee one will be provided by the system. Turning - * master mode on then off enables us to generate that FSCLK cycle - * with a minimum of contention on the clock bus. - */ - regmap_update_bits(regmap, NAU8825_REG_I2S_PCM_CTRL2, - NAU8825_I2S_MS_MASK, NAU8825_I2S_MS_MASTER); - regmap_update_bits(regmap, NAU8825_REG_I2S_PCM_CTRL2, - NAU8825_I2S_MS_MASK, NAU8825_I2S_MS_SLAVE); - /* this will restart the entire jack detection process including MIC/GND * switching and create interrupts. We have to go from 0 to 1 and back * to 0 to restart. @@ -655,6 +648,22 @@ static void nau8825_restart_jack_detection(struct regmap *regmap) NAU8825_JACK_DET_RESTART, 0); } +static void nau8825_int_status_clear_all(struct regmap *regmap) +{ + int active_irq, clear_irq, i; + + /* Reset the intrruption status from rightmost bit if the corres- + * ponding irq event occurs. + */ + regmap_read(regmap, NAU8825_REG_IRQ_STATUS, &active_irq); + for (i = 0; i < NAU8825_REG_DATA_LEN; i++) { + clear_irq = (0x1 << i); + if (active_irq & clear_irq) + regmap_write(regmap, + NAU8825_REG_INT_CLR_KEY_STATUS, clear_irq); + } +} + static void nau8825_eject_jack(struct nau8825 *nau8825) { struct snd_soc_dapm_context *dapm = nau8825->dapm; @@ -669,6 +678,69 @@ static void nau8825_eject_jack(struct nau8825 *nau8825) regmap_update_bits(regmap, NAU8825_REG_HSD_CTRL, 0xf, 0xf); snd_soc_dapm_sync(dapm); + + /* Clear all interruption status */ + nau8825_int_status_clear_all(regmap); + + /* Enable the insertion interruption, disable the ejection inter- + * ruption, and then bypass de-bounce circuit. + */ + regmap_update_bits(regmap, NAU8825_REG_INTERRUPT_DIS_CTRL, + NAU8825_IRQ_EJECT_DIS | NAU8825_IRQ_INSERT_DIS, + NAU8825_IRQ_EJECT_DIS); + regmap_update_bits(regmap, NAU8825_REG_INTERRUPT_MASK, + NAU8825_IRQ_OUTPUT_EN | NAU8825_IRQ_EJECT_EN | + NAU8825_IRQ_HEADSET_COMPLETE_EN | NAU8825_IRQ_INSERT_EN, + NAU8825_IRQ_OUTPUT_EN | NAU8825_IRQ_EJECT_EN | + NAU8825_IRQ_HEADSET_COMPLETE_EN); + regmap_update_bits(regmap, NAU8825_REG_JACK_DET_CTRL, + NAU8825_JACK_DET_DB_BYPASS, NAU8825_JACK_DET_DB_BYPASS); + + /* Disable ADC needed for interruptions at audo mode */ + regmap_update_bits(regmap, NAU8825_REG_ENA_CTRL, + NAU8825_ENABLE_ADC, 0); + + /* Close clock for jack type detection at manual mode */ + nau8825_configure_sysclk(nau8825, NAU8825_CLK_DIS, 0); +} + +/* Enable audo mode interruptions with internal clock. */ +static void nau8825_setup_auto_irq(struct nau8825 *nau8825) +{ + struct regmap *regmap = nau8825->regmap; + + /* Enable headset jack type detection complete interruption and + * jack ejection interruption. + */ + regmap_update_bits(regmap, NAU8825_REG_INTERRUPT_MASK, + NAU8825_IRQ_HEADSET_COMPLETE_EN | NAU8825_IRQ_EJECT_EN, 0); + + /* Enable internal VCO needed for interruptions */ + nau8825_configure_sysclk(nau8825, NAU8825_CLK_INTERNAL, 0); + + /* Enable ADC needed for interruptions */ + regmap_update_bits(regmap, NAU8825_REG_ENA_CTRL, + NAU8825_ENABLE_ADC, NAU8825_ENABLE_ADC); + + /* Chip needs one FSCLK cycle in order to generate interruptions, + * as we cannot guarantee one will be provided by the system. Turning + * master mode on then off enables us to generate that FSCLK cycle + * with a minimum of contention on the clock bus. + */ + regmap_update_bits(regmap, NAU8825_REG_I2S_PCM_CTRL2, + NAU8825_I2S_MS_MASK, NAU8825_I2S_MS_MASTER); + regmap_update_bits(regmap, NAU8825_REG_I2S_PCM_CTRL2, + NAU8825_I2S_MS_MASK, NAU8825_I2S_MS_SLAVE); + + /* Not bypass de-bounce circuit */ + regmap_update_bits(regmap, NAU8825_REG_JACK_DET_CTRL, + NAU8825_JACK_DET_DB_BYPASS, 0); + + /* Unmask all interruptions */ + regmap_write(regmap, NAU8825_REG_INTERRUPT_DIS_CTRL, 0); + + /* Restart the jack detection process at auto mode */ + nau8825_restart_jack_detection(regmap); } static int nau8825_button_decode(int value) @@ -805,6 +877,26 @@ static irqreturn_t nau8825_interrupt(int irq, void *data) event_mask |= SND_JACK_HEADSET; clear_irq = NAU8825_HEADSET_COMPLETION_IRQ; + } else if ((active_irq & NAU8825_JACK_INSERTION_IRQ_MASK) == + NAU8825_JACK_INSERTION_DETECTED) { + /* One more step to check GPIO status directly. Thus, the + * driver can confirm the real insertion interruption because + * the intrruption at manual mode has bypassed debounce + * circuit which can get rid of unstable status. + */ + if (nau8825_is_jack_inserted(regmap)) { + /* Turn off insertion interruption at manual mode */ + regmap_update_bits(regmap, + NAU8825_REG_INTERRUPT_DIS_CTRL, + NAU8825_IRQ_INSERT_DIS, + NAU8825_IRQ_INSERT_DIS); + regmap_update_bits(regmap, NAU8825_REG_INTERRUPT_MASK, + NAU8825_IRQ_INSERT_EN, NAU8825_IRQ_INSERT_EN); + /* Enable interruption for jack type detection at audo + * mode which can detect microphone and jack type. + */ + nau8825_setup_auto_irq(nau8825); + } } if (!clear_irq) @@ -954,8 +1046,8 @@ static void nau8825_init_regs(struct nau8825 *nau8825) } static const struct regmap_config nau8825_regmap_config = { - .val_bits = 16, - .reg_bits = 16, + .val_bits = NAU8825_REG_DATA_LEN, + .reg_bits = NAU8825_REG_ADDR_LEN, .max_register = NAU8825_REG_MAX, .readable_reg = nau8825_readable_reg, @@ -974,12 +1066,6 @@ static int nau8825_codec_probe(struct snd_soc_codec *codec) nau8825->dapm = dapm; - /* Unmask interruptions. Handler uses dapm object so we can enable - * interruptions only after dapm is fully initialized. - */ - regmap_write(nau8825->regmap, NAU8825_REG_INTERRUPT_DIS_CTRL, 0); - nau8825_restart_jack_detection(nau8825->regmap); - return 0; } @@ -1144,6 +1230,14 @@ static int nau8825_mclk_prepare(struct nau8825 *nau8825, unsigned int freq) return 0; } +static void nau8825_configure_mclk_as_sysclk(struct regmap *regmap) +{ + regmap_update_bits(regmap, NAU8825_REG_CLK_DIVIDER, + NAU8825_CLK_SRC_MASK, NAU8825_CLK_SRC_MCLK); + regmap_update_bits(regmap, NAU8825_REG_FLL6, + NAU8825_DCO_EN, 0); +} + static int nau8825_configure_sysclk(struct nau8825 *nau8825, int clk_id, unsigned int freq) { @@ -1151,10 +1245,17 @@ static int nau8825_configure_sysclk(struct nau8825 *nau8825, int clk_id, int ret; switch (clk_id) { + case NAU8825_CLK_DIS: + /* Clock provided externally and disable internal VCO clock */ + nau8825_configure_mclk_as_sysclk(regmap); + if (nau8825->mclk_freq) { + clk_disable_unprepare(nau8825->mclk); + nau8825->mclk_freq = 0; + } + + break; case NAU8825_CLK_MCLK: - regmap_update_bits(regmap, NAU8825_REG_CLK_DIVIDER, - NAU8825_CLK_SRC_MASK, NAU8825_CLK_SRC_MCLK); - regmap_update_bits(regmap, NAU8825_REG_FLL6, NAU8825_DCO_EN, 0); + nau8825_configure_mclk_as_sysclk(regmap); /* MCLK not changed by clock tree */ regmap_update_bits(regmap, NAU8825_REG_CLK_DIVIDER, NAU8825_CLK_MCLK_SRC_MASK, 0); @@ -1164,17 +1265,25 @@ static int nau8825_configure_sysclk(struct nau8825 *nau8825, int clk_id, break; case NAU8825_CLK_INTERNAL: - regmap_update_bits(regmap, NAU8825_REG_FLL6, NAU8825_DCO_EN, - NAU8825_DCO_EN); - regmap_update_bits(regmap, NAU8825_REG_CLK_DIVIDER, - NAU8825_CLK_SRC_MASK, NAU8825_CLK_SRC_VCO); - /* Decrease the VCO frequency for power saving */ - regmap_update_bits(regmap, NAU8825_REG_CLK_DIVIDER, - NAU8825_CLK_MCLK_SRC_MASK, 0xf); - regmap_update_bits(regmap, NAU8825_REG_FLL1, - NAU8825_FLL_RATIO_MASK, 0x10); - regmap_update_bits(regmap, NAU8825_REG_FLL6, - NAU8825_SDM_EN, NAU8825_SDM_EN); + if (nau8825_is_jack_inserted(nau8825->regmap)) { + regmap_update_bits(regmap, NAU8825_REG_FLL6, + NAU8825_DCO_EN, NAU8825_DCO_EN); + regmap_update_bits(regmap, NAU8825_REG_CLK_DIVIDER, + NAU8825_CLK_SRC_MASK, NAU8825_CLK_SRC_VCO); + /* Decrease the VCO frequency for power saving */ + regmap_update_bits(regmap, NAU8825_REG_CLK_DIVIDER, + NAU8825_CLK_MCLK_SRC_MASK, 0xf); + regmap_update_bits(regmap, NAU8825_REG_FLL1, + NAU8825_FLL_RATIO_MASK, 0x10); + regmap_update_bits(regmap, NAU8825_REG_FLL6, + NAU8825_SDM_EN, NAU8825_SDM_EN); + } else { + /* The clock turns off intentionally for power saving + * when no headset connected. + */ + nau8825_configure_mclk_as_sysclk(regmap); + dev_warn(nau8825->dev, "Disable clock for power saving when no headset connected\n"); + } if (nau8825->mclk_freq) { clk_disable_unprepare(nau8825->mclk); nau8825->mclk_freq = 0; @@ -1225,6 +1334,31 @@ static int nau8825_set_sysclk(struct snd_soc_codec *codec, int clk_id, return nau8825_configure_sysclk(nau8825, clk_id, freq); } +static int nau8825_resume_setup(struct nau8825 *nau8825) +{ + struct regmap *regmap = nau8825->regmap; + + /* Close clock when jack type detection at manual mode */ + nau8825_configure_sysclk(nau8825, NAU8825_CLK_DIS, 0); + + /* Clear all interruption status */ + nau8825_int_status_clear_all(regmap); + + /* Enable both insertion and ejection interruptions, and then + * bypass de-bounce circuit. + */ + regmap_update_bits(regmap, NAU8825_REG_INTERRUPT_MASK, + NAU8825_IRQ_OUTPUT_EN | NAU8825_IRQ_HEADSET_COMPLETE_EN | + NAU8825_IRQ_EJECT_EN | NAU8825_IRQ_INSERT_EN, + NAU8825_IRQ_OUTPUT_EN | NAU8825_IRQ_HEADSET_COMPLETE_EN); + regmap_update_bits(regmap, NAU8825_REG_JACK_DET_CTRL, + NAU8825_JACK_DET_DB_BYPASS, NAU8825_JACK_DET_DB_BYPASS); + regmap_update_bits(regmap, NAU8825_REG_INTERRUPT_DIS_CTRL, + NAU8825_IRQ_INSERT_DIS | NAU8825_IRQ_EJECT_DIS, 0); + + return 0; +} + static int nau8825_set_bias_level(struct snd_soc_codec *codec, enum snd_soc_bias_level level) { @@ -1247,10 +1381,20 @@ static int nau8825_set_bias_level(struct snd_soc_codec *codec, return ret; } } + /* Setup codec configuration after resume */ + nau8825_resume_setup(nau8825); } break; case SND_SOC_BIAS_OFF: + /* Turn off all interruptions before system shutdown. Keep the + * interruption quiet before resume setup completes. + */ + regmap_write(nau8825->regmap, + NAU8825_REG_INTERRUPT_DIS_CTRL, 0xffff); + /* Disable ADC needed for interruptions at audo mode */ + regmap_update_bits(nau8825->regmap, NAU8825_REG_ENA_CTRL, + NAU8825_ENABLE_ADC, 0); if (nau8825->mclk_freq) clk_disable_unprepare(nau8825->mclk); break; @@ -1264,6 +1408,7 @@ static int nau8825_suspend(struct snd_soc_codec *codec) struct nau8825 *nau8825 = snd_soc_codec_get_drvdata(codec); disable_irq(nau8825->irq); + snd_soc_codec_force_bias_level(codec, SND_SOC_BIAS_OFF); regcache_cache_only(nau8825->regmap, true); regcache_mark_dirty(nau8825->regmap); @@ -1274,32 +1419,10 @@ static int nau8825_resume(struct snd_soc_codec *codec) { struct nau8825 *nau8825 = snd_soc_codec_get_drvdata(codec); - /* The chip may lose power and reset in S3. regcache_sync restores - * register values including configurations for sysclk, irq, and - * jack/button detection. - */ regcache_cache_only(nau8825->regmap, false); regcache_sync(nau8825->regmap); - - /* Check the jack plug status directly. If the headset is unplugged - * during S3 when the chip has no power, there will be no jack - * detection irq even after the nau8825_restart_jack_detection below, - * because the chip just thinks no headset has ever been plugged in. - */ - if (!nau8825_is_jack_inserted(nau8825->regmap)) { - nau8825_eject_jack(nau8825); - snd_soc_jack_report(nau8825->jack, 0, SND_JACK_HEADSET); - } - enable_irq(nau8825->irq); - /* Run jack detection to check the type (OMTP or CTIA) of the headset - * if there is one. This handles the case where a different type of - * headset is plugged in during S3. This triggers an IRQ iff a headset - * is already plugged in. - */ - nau8825_restart_jack_detection(nau8825->regmap); - return 0; } #else @@ -1408,20 +1531,8 @@ static int nau8825_read_device_properties(struct device *dev, static int nau8825_setup_irq(struct nau8825 *nau8825) { - struct regmap *regmap = nau8825->regmap; int ret; - /* IRQ Output Enable */ - regmap_update_bits(regmap, NAU8825_REG_INTERRUPT_MASK, - NAU8825_IRQ_OUTPUT_EN, NAU8825_IRQ_OUTPUT_EN); - - /* Enable internal VCO needed for interruptions */ - nau8825_configure_sysclk(nau8825, NAU8825_CLK_INTERNAL, 0); - - /* Enable ADC needed for interrupts */ - regmap_update_bits(regmap, NAU8825_REG_ENA_CTRL, - NAU8825_ENABLE_ADC, NAU8825_ENABLE_ADC); - ret = devm_request_threaded_irq(nau8825->dev, nau8825->irq, NULL, nau8825_interrupt, IRQF_TRIGGER_LOW | IRQF_ONESHOT, "nau8825", nau8825); diff --git a/sound/soc/codecs/nau8825.h b/sound/soc/codecs/nau8825.h index 9e6cb62..1100385 100644 --- a/sound/soc/codecs/nau8825.h +++ b/sound/soc/codecs/nau8825.h @@ -93,6 +93,9 @@ #define NAU8825_REG_CHARGE_PUMP_INPUT_READ 0x81 #define NAU8825_REG_GENERAL_STATUS 0x82 #define NAU8825_REG_MAX NAU8825_REG_GENERAL_STATUS +/* 16-bit control register address, and 16-bits control register data */ +#define NAU8825_REG_ADDR_LEN 16 +#define NAU8825_REG_DATA_LEN 16 /* ENA_CTRL (0x1) */ #define NAU8825_ENABLE_DACR_SFT 10 @@ -145,6 +148,7 @@ /* JACK_DET_CTRL (0xd) */ #define NAU8825_JACK_DET_RESTART (1 << 9) +#define NAU8825_JACK_DET_DB_BYPASS (1 << 8) #define NAU8825_JACK_INSERT_DEBOUNCE_SFT 5 #define NAU8825_JACK_INSERT_DEBOUNCE_MASK (0x7 << NAU8825_JACK_INSERT_DEBOUNCE_SFT) #define NAU8825_JACK_EJECT_DEBOUNCE_SFT 2 @@ -157,6 +161,7 @@ #define NAU8825_IRQ_KEY_RELEASE_EN (1 << 7) #define NAU8825_IRQ_KEY_SHORT_PRESS_EN (1 << 5) #define NAU8825_IRQ_EJECT_EN (1 << 2) +#define NAU8825_IRQ_INSERT_EN (1 << 0) /* IRQ_STATUS (0x10) */ #define NAU8825_HEADSET_COMPLETION_IRQ (1 << 10) @@ -177,6 +182,7 @@ #define NAU8825_IRQ_KEY_RELEASE_DIS (1 << 7) #define NAU8825_IRQ_KEY_SHORT_PRESS_DIS (1 << 5) #define NAU8825_IRQ_EJECT_DIS (1 << 2) +#define NAU8825_IRQ_INSERT_DIS (1 << 0) /* SAR_CTRL (0x13) */ #define NAU8825_SAR_ADC_EN_SFT 12 @@ -333,7 +339,8 @@ /* System Clock Source */ enum { - NAU8825_CLK_MCLK = 0, + NAU8825_CLK_DIS = 0, + NAU8825_CLK_MCLK, NAU8825_CLK_INTERNAL, NAU8825_CLK_FLL_MCLK, NAU8825_CLK_FLL_BLK, -- 2.6.4

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[alsa-devel] [PATCH v2] ASoC: nau8825: non-clock jack detection for power saving at standby
by John Hsu 31 May '16

31 May '16

To resolve the conflict of the first verion. The information is as the following. > > ASoC: nau8825: non-clock jack detection for power saving at standby > > has been applied to the asoc tree at > > git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git > This seems to conflict with some power management fixes in Linus' tree > so I've dropped it. Please check and resend. The driver changes jack type detection interruption to non-clock archi- tecture for less 1mW power saving. The architecture is called manual mode jack detection. It has no hardware debounce, no jack type detection, but only detecting jack insertion. After jack insertion, the driver will switch to auto mode jack detection with internal clock which can detect microphone, jack type and do hardware debounce. The manual architecture has these main changes including codec initiation, interruption, clock control, and power management. When codec initiation or system resume, the clock is closed as jack insertion detection at man- ual mode, and bypass debounce circuit. These configurations move to resume setup function when setup bias level after resume. When jack insertion detection happens, the manual mode turns off and make configuration about jack type detection interruption at auto mode in auto irq setup function which can detect microphone and jack type. The inter- ruption will switch to manual mode again with clock free until jack ejec- tion happens. The system clock configuration adds clock disable option which can disable internal VCO clock. Before the system clock change, there is an restric- tion added to make sure clock disabled and not config any clock when no headset connected. In power management, we involve the solution about races and jack detec- tion in resume from Ben Zhang in the following patch and list his comment. [PATCH] ASoC: nau8825: Fix jack detection across suspend "Jack plug status is rechecked at resume to handle plug/unplug in S3 when the chip has no power." "Suspend/resume callbacks are moved from the i2c dev_pm_ops to snd_soc_codec_driver. soc_resume_deferred is a delayed work which may trigger nau8825_set_bias_level. The bias change races against dev_pm_ops, causing jack detection issues. soc_resume_deferred ensures bias change and snd_soc_codec_driver suspend/resume are sequenced correctly." Change SAR widget to supply type which can prevent the codec keeping at SND_SOC_BIAS_ON during suspend. The codec suspend function can just invoke normally. Before the system suspends, the driver turns off all interruptions. Keep the interruption quiet before resume setup completes. The ADC channel will be disabled which is needed for interruptions at audo mode. Signed-off-by: John Hsu <KCHSU0(a)nuvoton.com> --- sound/soc/codecs/nau8825.c | 249 ++++++++++++++++++++++++++++++++------------- sound/soc/codecs/nau8825.h | 9 +- 2 files changed, 188 insertions(+), 70 deletions(-) diff --git a/sound/soc/codecs/nau8825.c b/sound/soc/codecs/nau8825.c index 81fc97b..abaa5f4 100644 --- a/sound/soc/codecs/nau8825.c +++ b/sound/soc/codecs/nau8825.c @@ -30,10 +30,16 @@ #include "nau8825.h" + +#define NUVOTON_CODEC_DAI "nau8825-hifi" + #define NAU_FREF_MAX 13500000 #define NAU_FVCO_MAX 124000000 #define NAU_FVCO_MIN 90000000 +static int nau8825_configure_sysclk(struct nau8825 *nau8825, + int clk_id, unsigned int freq); + struct nau8825_fll { int mclk_src; int ratio; @@ -617,9 +623,6 @@ int nau8825_enable_jack_detect(struct snd_soc_codec *codec, NAU8825_HSD_AUTO_MODE | NAU8825_SPKR_DWN1R | NAU8825_SPKR_DWN1L, NAU8825_HSD_AUTO_MODE | NAU8825_SPKR_DWN1R | NAU8825_SPKR_DWN1L); - regmap_update_bits(regmap, NAU8825_REG_INTERRUPT_MASK, - NAU8825_IRQ_HEADSET_COMPLETE_EN | NAU8825_IRQ_EJECT_EN, 0); - return 0; } EXPORT_SYMBOL_GPL(nau8825_enable_jack_detect); @@ -635,16 +638,6 @@ static bool nau8825_is_jack_inserted(struct regmap *regmap) static void nau8825_restart_jack_detection(struct regmap *regmap) { - /* Chip needs one FSCLK cycle in order to generate interrupts, - * as we cannot guarantee one will be provided by the system. Turning - * master mode on then off enables us to generate that FSCLK cycle - * with a minimum of contention on the clock bus. - */ - regmap_update_bits(regmap, NAU8825_REG_I2S_PCM_CTRL2, - NAU8825_I2S_MS_MASK, NAU8825_I2S_MS_MASTER); - regmap_update_bits(regmap, NAU8825_REG_I2S_PCM_CTRL2, - NAU8825_I2S_MS_MASK, NAU8825_I2S_MS_SLAVE); - /* this will restart the entire jack detection process including MIC/GND * switching and create interrupts. We have to go from 0 to 1 and back * to 0 to restart. @@ -655,6 +648,22 @@ static void nau8825_restart_jack_detection(struct regmap *regmap) NAU8825_JACK_DET_RESTART, 0); } +static void nau8825_int_status_clear_all(struct regmap *regmap) +{ + int active_irq, clear_irq, i; + + /* Reset the intrruption status from rightmost bit if the corres- + * ponding irq event occurs. + */ + regmap_read(regmap, NAU8825_REG_IRQ_STATUS, &active_irq); + for (i = 0; i < NAU8825_REG_DATA_LEN; i++) { + clear_irq = (0x1 << i); + if (active_irq & clear_irq) + regmap_write(regmap, + NAU8825_REG_INT_CLR_KEY_STATUS, clear_irq); + } +} + static void nau8825_eject_jack(struct nau8825 *nau8825) { struct snd_soc_dapm_context *dapm = nau8825->dapm; @@ -669,6 +678,69 @@ static void nau8825_eject_jack(struct nau8825 *nau8825) regmap_update_bits(regmap, NAU8825_REG_HSD_CTRL, 0xf, 0xf); snd_soc_dapm_sync(dapm); + + /* Clear all interruption status */ + nau8825_int_status_clear_all(regmap); + + /* Enable the insertion interruption, disable the ejection inter- + * ruption, and then bypass de-bounce circuit. + */ + regmap_update_bits(regmap, NAU8825_REG_INTERRUPT_DIS_CTRL, + NAU8825_IRQ_EJECT_DIS | NAU8825_IRQ_INSERT_DIS, + NAU8825_IRQ_EJECT_DIS); + regmap_update_bits(regmap, NAU8825_REG_INTERRUPT_MASK, + NAU8825_IRQ_OUTPUT_EN | NAU8825_IRQ_EJECT_EN | + NAU8825_IRQ_HEADSET_COMPLETE_EN | NAU8825_IRQ_INSERT_EN, + NAU8825_IRQ_OUTPUT_EN | NAU8825_IRQ_EJECT_EN | + NAU8825_IRQ_HEADSET_COMPLETE_EN); + regmap_update_bits(regmap, NAU8825_REG_JACK_DET_CTRL, + NAU8825_JACK_DET_DB_BYPASS, NAU8825_JACK_DET_DB_BYPASS); + + /* Disable ADC needed for interruptions at audo mode */ + regmap_update_bits(regmap, NAU8825_REG_ENA_CTRL, + NAU8825_ENABLE_ADC, 0); + + /* Close clock for jack type detection at manual mode */ + nau8825_configure_sysclk(nau8825, NAU8825_CLK_DIS, 0); +} + +/* Enable audo mode interruptions with internal clock. */ +static void nau8825_setup_auto_irq(struct nau8825 *nau8825) +{ + struct regmap *regmap = nau8825->regmap; + + /* Enable headset jack type detection complete interruption and + * jack ejection interruption. + */ + regmap_update_bits(regmap, NAU8825_REG_INTERRUPT_MASK, + NAU8825_IRQ_HEADSET_COMPLETE_EN | NAU8825_IRQ_EJECT_EN, 0); + + /* Enable internal VCO needed for interruptions */ + nau8825_configure_sysclk(nau8825, NAU8825_CLK_INTERNAL, 0); + + /* Enable ADC needed for interruptions */ + regmap_update_bits(regmap, NAU8825_REG_ENA_CTRL, + NAU8825_ENABLE_ADC, NAU8825_ENABLE_ADC); + + /* Chip needs one FSCLK cycle in order to generate interruptions, + * as we cannot guarantee one will be provided by the system. Turning + * master mode on then off enables us to generate that FSCLK cycle + * with a minimum of contention on the clock bus. + */ + regmap_update_bits(regmap, NAU8825_REG_I2S_PCM_CTRL2, + NAU8825_I2S_MS_MASK, NAU8825_I2S_MS_MASTER); + regmap_update_bits(regmap, NAU8825_REG_I2S_PCM_CTRL2, + NAU8825_I2S_MS_MASK, NAU8825_I2S_MS_SLAVE); + + /* Not bypass de-bounce circuit */ + regmap_update_bits(regmap, NAU8825_REG_JACK_DET_CTRL, + NAU8825_JACK_DET_DB_BYPASS, 0); + + /* Unmask all interruptions */ + regmap_write(regmap, NAU8825_REG_INTERRUPT_DIS_CTRL, 0); + + /* Restart the jack detection process at auto mode */ + nau8825_restart_jack_detection(regmap); } static int nau8825_button_decode(int value) @@ -805,6 +877,26 @@ static irqreturn_t nau8825_interrupt(int irq, void *data) event_mask |= SND_JACK_HEADSET; clear_irq = NAU8825_HEADSET_COMPLETION_IRQ; + } else if ((active_irq & NAU8825_JACK_INSERTION_IRQ_MASK) == + NAU8825_JACK_INSERTION_DETECTED) { + /* One more step to check GPIO status directly. Thus, the + * driver can confirm the real insertion interruption because + * the intrruption at manual mode has bypassed debounce + * circuit which can get rid of unstable status. + */ + if (nau8825_is_jack_inserted(regmap)) { + /* Turn off insertion interruption at manual mode */ + regmap_update_bits(regmap, + NAU8825_REG_INTERRUPT_DIS_CTRL, + NAU8825_IRQ_INSERT_DIS, + NAU8825_IRQ_INSERT_DIS); + regmap_update_bits(regmap, NAU8825_REG_INTERRUPT_MASK, + NAU8825_IRQ_INSERT_EN, NAU8825_IRQ_INSERT_EN); + /* Enable interruption for jack type detection at audo + * mode which can detect microphone and jack type. + */ + nau8825_setup_auto_irq(nau8825); + } } if (!clear_irq) @@ -954,8 +1046,8 @@ static void nau8825_init_regs(struct nau8825 *nau8825) } static const struct regmap_config nau8825_regmap_config = { - .val_bits = 16, - .reg_bits = 16, + .val_bits = NAU8825_REG_DATA_LEN, + .reg_bits = NAU8825_REG_ADDR_LEN, .max_register = NAU8825_REG_MAX, .readable_reg = nau8825_readable_reg, @@ -974,12 +1066,6 @@ static int nau8825_codec_probe(struct snd_soc_codec *codec) nau8825->dapm = dapm; - /* Unmask interruptions. Handler uses dapm object so we can enable - * interruptions only after dapm is fully initialized. - */ - regmap_write(nau8825->regmap, NAU8825_REG_INTERRUPT_DIS_CTRL, 0); - nau8825_restart_jack_detection(nau8825->regmap); - return 0; } @@ -1144,6 +1230,14 @@ static int nau8825_mclk_prepare(struct nau8825 *nau8825, unsigned int freq) return 0; } +static void nau8825_configure_mclk_as_sysclk(struct regmap *regmap) +{ + regmap_update_bits(regmap, NAU8825_REG_CLK_DIVIDER, + NAU8825_CLK_SRC_MASK, NAU8825_CLK_SRC_MCLK); + regmap_update_bits(regmap, NAU8825_REG_FLL6, + NAU8825_DCO_EN, 0); +} + static int nau8825_configure_sysclk(struct nau8825 *nau8825, int clk_id, unsigned int freq) { @@ -1151,10 +1245,17 @@ static int nau8825_configure_sysclk(struct nau8825 *nau8825, int clk_id, int ret; switch (clk_id) { + case NAU8825_CLK_DIS: + /* Clock provided externally and disable internal VCO clock */ + nau8825_configure_mclk_as_sysclk(regmap); + if (nau8825->mclk_freq) { + clk_disable_unprepare(nau8825->mclk); + nau8825->mclk_freq = 0; + } + + break; case NAU8825_CLK_MCLK: - regmap_update_bits(regmap, NAU8825_REG_CLK_DIVIDER, - NAU8825_CLK_SRC_MASK, NAU8825_CLK_SRC_MCLK); - regmap_update_bits(regmap, NAU8825_REG_FLL6, NAU8825_DCO_EN, 0); + nau8825_configure_mclk_as_sysclk(regmap); /* MCLK not changed by clock tree */ regmap_update_bits(regmap, NAU8825_REG_CLK_DIVIDER, NAU8825_CLK_MCLK_SRC_MASK, 0); @@ -1164,17 +1265,25 @@ static int nau8825_configure_sysclk(struct nau8825 *nau8825, int clk_id, break; case NAU8825_CLK_INTERNAL: - regmap_update_bits(regmap, NAU8825_REG_FLL6, NAU8825_DCO_EN, - NAU8825_DCO_EN); - regmap_update_bits(regmap, NAU8825_REG_CLK_DIVIDER, - NAU8825_CLK_SRC_MASK, NAU8825_CLK_SRC_VCO); - /* Decrease the VCO frequency for power saving */ - regmap_update_bits(regmap, NAU8825_REG_CLK_DIVIDER, - NAU8825_CLK_MCLK_SRC_MASK, 0xf); - regmap_update_bits(regmap, NAU8825_REG_FLL1, - NAU8825_FLL_RATIO_MASK, 0x10); - regmap_update_bits(regmap, NAU8825_REG_FLL6, - NAU8825_SDM_EN, NAU8825_SDM_EN); + if (nau8825_is_jack_inserted(nau8825->regmap)) { + regmap_update_bits(regmap, NAU8825_REG_FLL6, + NAU8825_DCO_EN, NAU8825_DCO_EN); + regmap_update_bits(regmap, NAU8825_REG_CLK_DIVIDER, + NAU8825_CLK_SRC_MASK, NAU8825_CLK_SRC_VCO); + /* Decrease the VCO frequency for power saving */ + regmap_update_bits(regmap, NAU8825_REG_CLK_DIVIDER, + NAU8825_CLK_MCLK_SRC_MASK, 0xf); + regmap_update_bits(regmap, NAU8825_REG_FLL1, + NAU8825_FLL_RATIO_MASK, 0x10); + regmap_update_bits(regmap, NAU8825_REG_FLL6, + NAU8825_SDM_EN, NAU8825_SDM_EN); + } else { + /* The clock turns off intentionally for power saving + * when no headset connected. + */ + nau8825_configure_mclk_as_sysclk(regmap); + dev_warn(nau8825->dev, "Disable clock for power saving when no headset connected\n"); + } if (nau8825->mclk_freq) { clk_disable_unprepare(nau8825->mclk); nau8825->mclk_freq = 0; @@ -1225,6 +1334,31 @@ static int nau8825_set_sysclk(struct snd_soc_codec *codec, int clk_id, return nau8825_configure_sysclk(nau8825, clk_id, freq); } +static int nau8825_resume_setup(struct nau8825 *nau8825) +{ + struct regmap *regmap = nau8825->regmap; + + /* Close clock when jack type detection at manual mode */ + nau8825_configure_sysclk(nau8825, NAU8825_CLK_DIS, 0); + + /* Clear all interruption status */ + nau8825_int_status_clear_all(regmap); + + /* Enable both insertion and ejection interruptions, and then + * bypass de-bounce circuit. + */ + regmap_update_bits(regmap, NAU8825_REG_INTERRUPT_MASK, + NAU8825_IRQ_OUTPUT_EN | NAU8825_IRQ_HEADSET_COMPLETE_EN | + NAU8825_IRQ_EJECT_EN | NAU8825_IRQ_INSERT_EN, + NAU8825_IRQ_OUTPUT_EN | NAU8825_IRQ_HEADSET_COMPLETE_EN); + regmap_update_bits(regmap, NAU8825_REG_JACK_DET_CTRL, + NAU8825_JACK_DET_DB_BYPASS, NAU8825_JACK_DET_DB_BYPASS); + regmap_update_bits(regmap, NAU8825_REG_INTERRUPT_DIS_CTRL, + NAU8825_IRQ_INSERT_DIS | NAU8825_IRQ_EJECT_DIS, 0); + + return 0; +} + static int nau8825_set_bias_level(struct snd_soc_codec *codec, enum snd_soc_bias_level level) { @@ -1247,10 +1381,20 @@ static int nau8825_set_bias_level(struct snd_soc_codec *codec, return ret; } } + /* Setup codec configuration after resume */ + nau8825_resume_setup(nau8825); } break; case SND_SOC_BIAS_OFF: + /* Turn off all interruptions before system shutdown. Keep the + * interruption quiet before resume setup completes. + */ + regmap_write(nau8825->regmap, + NAU8825_REG_INTERRUPT_DIS_CTRL, 0xffff); + /* Disable ADC needed for interruptions at audo mode */ + regmap_update_bits(nau8825->regmap, NAU8825_REG_ENA_CTRL, + NAU8825_ENABLE_ADC, 0); if (nau8825->mclk_freq) clk_disable_unprepare(nau8825->mclk); break; @@ -1264,6 +1408,7 @@ static int nau8825_suspend(struct snd_soc_codec *codec) struct nau8825 *nau8825 = snd_soc_codec_get_drvdata(codec); disable_irq(nau8825->irq); + snd_soc_codec_force_bias_level(codec, SND_SOC_BIAS_OFF); regcache_cache_only(nau8825->regmap, true); regcache_mark_dirty(nau8825->regmap); @@ -1274,32 +1419,10 @@ static int nau8825_resume(struct snd_soc_codec *codec) { struct nau8825 *nau8825 = snd_soc_codec_get_drvdata(codec); - /* The chip may lose power and reset in S3. regcache_sync restores - * register values including configurations for sysclk, irq, and - * jack/button detection. - */ regcache_cache_only(nau8825->regmap, false); regcache_sync(nau8825->regmap); - - /* Check the jack plug status directly. If the headset is unplugged - * during S3 when the chip has no power, there will be no jack - * detection irq even after the nau8825_restart_jack_detection below, - * because the chip just thinks no headset has ever been plugged in. - */ - if (!nau8825_is_jack_inserted(nau8825->regmap)) { - nau8825_eject_jack(nau8825); - snd_soc_jack_report(nau8825->jack, 0, SND_JACK_HEADSET); - } - enable_irq(nau8825->irq); - /* Run jack detection to check the type (OMTP or CTIA) of the headset - * if there is one. This handles the case where a different type of - * headset is plugged in during S3. This triggers an IRQ iff a headset - * is already plugged in. - */ - nau8825_restart_jack_detection(nau8825->regmap); - return 0; } #else @@ -1408,20 +1531,8 @@ static int nau8825_read_device_properties(struct device *dev, static int nau8825_setup_irq(struct nau8825 *nau8825) { - struct regmap *regmap = nau8825->regmap; int ret; - /* IRQ Output Enable */ - regmap_update_bits(regmap, NAU8825_REG_INTERRUPT_MASK, - NAU8825_IRQ_OUTPUT_EN, NAU8825_IRQ_OUTPUT_EN); - - /* Enable internal VCO needed for interruptions */ - nau8825_configure_sysclk(nau8825, NAU8825_CLK_INTERNAL, 0); - - /* Enable ADC needed for interrupts */ - regmap_update_bits(regmap, NAU8825_REG_ENA_CTRL, - NAU8825_ENABLE_ADC, NAU8825_ENABLE_ADC); - ret = devm_request_threaded_irq(nau8825->dev, nau8825->irq, NULL, nau8825_interrupt, IRQF_TRIGGER_LOW | IRQF_ONESHOT, "nau8825", nau8825); diff --git a/sound/soc/codecs/nau8825.h b/sound/soc/codecs/nau8825.h index 9e6cb62..1100385 100644 --- a/sound/soc/codecs/nau8825.h +++ b/sound/soc/codecs/nau8825.h @@ -93,6 +93,9 @@ #define NAU8825_REG_CHARGE_PUMP_INPUT_READ 0x81 #define NAU8825_REG_GENERAL_STATUS 0x82 #define NAU8825_REG_MAX NAU8825_REG_GENERAL_STATUS +/* 16-bit control register address, and 16-bits control register data */ +#define NAU8825_REG_ADDR_LEN 16 +#define NAU8825_REG_DATA_LEN 16 /* ENA_CTRL (0x1) */ #define NAU8825_ENABLE_DACR_SFT 10 @@ -145,6 +148,7 @@ /* JACK_DET_CTRL (0xd) */ #define NAU8825_JACK_DET_RESTART (1 << 9) +#define NAU8825_JACK_DET_DB_BYPASS (1 << 8) #define NAU8825_JACK_INSERT_DEBOUNCE_SFT 5 #define NAU8825_JACK_INSERT_DEBOUNCE_MASK (0x7 << NAU8825_JACK_INSERT_DEBOUNCE_SFT) #define NAU8825_JACK_EJECT_DEBOUNCE_SFT 2 @@ -157,6 +161,7 @@ #define NAU8825_IRQ_KEY_RELEASE_EN (1 << 7) #define NAU8825_IRQ_KEY_SHORT_PRESS_EN (1 << 5) #define NAU8825_IRQ_EJECT_EN (1 << 2) +#define NAU8825_IRQ_INSERT_EN (1 << 0) /* IRQ_STATUS (0x10) */ #define NAU8825_HEADSET_COMPLETION_IRQ (1 << 10) @@ -177,6 +182,7 @@ #define NAU8825_IRQ_KEY_RELEASE_DIS (1 << 7) #define NAU8825_IRQ_KEY_SHORT_PRESS_DIS (1 << 5) #define NAU8825_IRQ_EJECT_DIS (1 << 2) +#define NAU8825_IRQ_INSERT_DIS (1 << 0) /* SAR_CTRL (0x13) */ #define NAU8825_SAR_ADC_EN_SFT 12 @@ -333,7 +339,8 @@ /* System Clock Source */ enum { - NAU8825_CLK_MCLK = 0, + NAU8825_CLK_DIS = 0, + NAU8825_CLK_MCLK, NAU8825_CLK_INTERNAL, NAU8825_CLK_FLL_MCLK, NAU8825_CLK_FLL_BLK, -- 2.6.4

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[alsa-devel] [PATCH] ASoC: arizona: Add data structure for voice trigger notifier
by Charles Keepax 31 May '16

31 May '16

64-bit builds would generate a warning when we passed the core number as a pointer through the notifier data: sound/soc/codecs/cs47l24.c:1091:13: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] (void *)i); Rather than just fix this up with more casting add a data structure that holds information for the notifier chain. This will make it easier to add additional information in the future as well. Fixes: 7baa7e2490e1 ("ASoC: arizona: Add event notification on voice trigger events") Signed-off-by: Charles Keepax <ckeepax(a)opensource.wolfsonmicro.com> --- sound/soc/codecs/arizona.h | 4 ++++ sound/soc/codecs/cs47l24.c | 7 +++++-- sound/soc/codecs/wm5110.c | 7 +++++-- 3 files changed, 14 insertions(+), 4 deletions(-) diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index ef38413..2caf4d0 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h @@ -98,6 +98,10 @@ struct arizona_priv { bool dvfs_cached; }; +struct arizona_voice_trigger_info { + int core; +}; + #define ARIZONA_NUM_MIXER_INPUTS 104 extern const unsigned int arizona_mixer_tlv[]; diff --git a/sound/soc/codecs/cs47l24.c b/sound/soc/codecs/cs47l24.c index b4d05cf..954a4f5 100644 --- a/sound/soc/codecs/cs47l24.c +++ b/sound/soc/codecs/cs47l24.c @@ -1078,6 +1078,7 @@ static irqreturn_t cs47l24_adsp2_irq(int irq, void *data) { struct cs47l24_priv *priv = data; struct arizona *arizona = priv->core.arizona; + struct arizona_voice_trigger_info info; int serviced = 0; int i, ret; @@ -1085,10 +1086,12 @@ static irqreturn_t cs47l24_adsp2_irq(int irq, void *data) ret = wm_adsp_compr_handle_irq(&priv->core.adsp[i]); if (ret != -ENODEV) serviced++; - if (ret == WM_ADSP_COMPR_VOICE_TRIGGER) + if (ret == WM_ADSP_COMPR_VOICE_TRIGGER) { + info.core = i; arizona_call_notifiers(arizona, ARIZONA_NOTIFY_VOICE_TRIGGER, - (void *)i); + &info); + } } if (!serviced) { diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index f1b3294..3b8db83 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -2233,6 +2233,7 @@ static irqreturn_t wm5110_adsp2_irq(int irq, void *data) { struct wm5110_priv *priv = data; struct arizona *arizona = priv->core.arizona; + struct arizona_voice_trigger_info info; int serviced = 0; int i, ret; @@ -2240,10 +2241,12 @@ static irqreturn_t wm5110_adsp2_irq(int irq, void *data) ret = wm_adsp_compr_handle_irq(&priv->core.adsp[i]); if (ret != -ENODEV) serviced++; - if (ret == WM_ADSP_COMPR_VOICE_TRIGGER) + if (ret == WM_ADSP_COMPR_VOICE_TRIGGER) { + info.core = i; arizona_call_notifiers(arizona, ARIZONA_NOTIFY_VOICE_TRIGGER, - (void *)i); + &info); + } } if (!serviced) { -- 2.1.4

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[alsa-devel] [PATCH v2] ASoC: ak4642: Implement suspend callback
by Peter Ujfalusi 31 May '16

31 May '16

Add the suspend callback to accompany the existing resume operation. With the suspend/resume callbacks the regmap (regcache) state handling can follow the recommended sequence. Signed-off-by: Peter Ujfalusi <peter.ujfalusi(a)ti.com> --- Hi, Changes since v1: - take into use the suspend callback (set the suspend in soc_codec_dev_ak4642) Regards, Peter sound/soc/codecs/ak4642.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/ak4642.c b/sound/soc/codecs/ak4642.c index 4d8b9e49e8d6..cc941d66ec3d 100644 --- a/sound/soc/codecs/ak4642.c +++ b/sound/soc/codecs/ak4642.c @@ -523,15 +523,23 @@ static struct snd_soc_dai_driver ak4642_dai = { .symmetric_rates = 1, }; -static int ak4642_resume(struct snd_soc_codec *codec) +static int ak4642_suspend(struct snd_soc_codec *codec) { struct regmap *regmap = dev_get_regmap(codec->dev, NULL); + regcache_cache_only(regmap, true); regcache_mark_dirty(regmap); - regcache_sync(regmap); return 0; } +static int ak4642_resume(struct snd_soc_codec *codec) +{ + struct regmap *regmap = dev_get_regmap(codec->dev, NULL); + + regcache_cache_only(regmap, false); + regcache_sync(regmap); + return 0; +} static int ak4642_probe(struct snd_soc_codec *codec) { struct ak4642_priv *priv = snd_soc_codec_get_drvdata(codec); @@ -544,6 +552,7 @@ static int ak4642_probe(struct snd_soc_codec *codec) static struct snd_soc_codec_driver soc_codec_dev_ak4642 = { .probe = ak4642_probe, + .suspend = ak4642_suspend, .resume = ak4642_resume, .set_bias_level = ak4642_set_bias_level, .controls = ak4642_snd_controls, -- 2.8.3

2 1

[alsa-devel] [PATCH resend v5 0/3] ASoC: cygnus: Add audio support for Broadcom Cygnus SoC
by Simran Rai 31 May '16

31 May '16

Hi, This patchset contains audio support for Broadcom's Cygnus SoC. It contains DT bindings and core audio driver. The audio driver supports both capture and playback of Audio PCM samples over I2S/TDM interface and provides playback support over SPDIF interface. This patchset is derived from a previously submitted patchset: http://lkml.iu.edu/hypermail/linux/kernel/1503.3/05434.html This patchset has been tested on Cygnus wireless audio bcm958305K board. It is rebased on top of v4.6-rc1 and is available from github: repo: https://github.com/Broadcom/cygnus-linux/tree/cygnus-sound-v5 Changes from v4: - Fix power suspend function and add power resume function - Remove clock initialization code from audio driver to clock framework Changes from v3: - Fix the subject lines to match the style for the subsystem Changes from v2: - Split patchset 2/2 from v2 into patchsets 2/3 and 3/3. - Remove SND_SOC_CYGNUS_DIAG. Diagnostics can be performed using standard kernel trace infrastructure. - Fix interrupt handler. Acknowledge only those interrupts that are handledby ISR. - Modify configure_vco() and the pll_macro_entry() struct to make it better readable. The functionality did not change. - Remove casts on macros - Removed surround sound channel grouping from the driver. Changes from v1: - Address code review comments. Fixed print format of type size_t and pointer. Simran Rai (3): ASoC: cygnus: Add DT bindings for Broadcom Cygnus audio ASoC: cygnus: Add Cygnus audio DAI driver ASoC: cygnus: Add Cygnus audio DMA driver .../bindings/sound/brcm,cygnus-audio.txt | 67 + sound/soc/bcm/Kconfig | 9 + sound/soc/bcm/Makefile | 5 + sound/soc/bcm/cygnus-pcm.c | 861 +++++++++++ sound/soc/bcm/cygnus-ssp.c | 1513 ++++++++++++++++++++ sound/soc/bcm/cygnus-ssp.h | 139 ++ 6 files changed, 2594 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/brcm,cygnus-audio.txt create mode 100644 sound/soc/bcm/cygnus-pcm.c create mode 100644 sound/soc/bcm/cygnus-ssp.c create mode 100644 sound/soc/bcm/cygnus-ssp.h -- 1.7.9.5

5 18

[alsa-devel] [PATCH v6 0/3] ASoC: cygnus: Add audio support for Broadcom Cygnus SoC
by Simran Rai 31 May '16

31 May '16

Hi, This patchset contains audio support for Broadcom's Cygnus SoC. It contains DT bindings and core audio driver. The audio driver supports both capture and playback of Audio PCM samples over I2S/TDM interface and provides playback support over SPDIF interface. This patchset is derived from a previously submitted patchset: http://lkml.iu.edu/hypermail/linux/kernel/1503.3/05434.html This patchset has been tested on Cygnus wireless audio bcm958305K board. It is based on v4.6-rc1 and is available from github: repo: https://github.com/Broadcom/cygnus-linux/tree/cygnus-sound-v6 Changes from v5: - Fix code style, e.g. change "if" statements to "switch" statements - Fix SPDIF output enable register field - Set BUFFER_PAIR_ENABLE for both mono, stereo and TDM modes - Reflect PCM bit formats for SPDIF, SSP and TDM as supported by hardware Changes from v4: - Fix power suspend function and add power resume function - Move clock initialization code from audio driver to clock framework Changes from v3: - Fix the subject lines to match the style for the subsystem Changes from v2: - Split patchset 2/2 from v2 into patchsets 2/3 and 3/3. - Remove SND_SOC_CYGNUS_DIAG. Diagnostics can be performed using standard kernel trace infrastructure. - Fix interrupt handler. Acknowledge only those interrupts that are handledby ISR. - Modify configure_vco() and the pll_macro_entry() struct to make it better readable. The functionality did not change. - Remove casts on macros - Remove surround sound channel grouping from the driver. Changes from v1: - Address code review comments. Fix print format of type size_t and pointer. Simran Rai (3): ASoC: cygnus: Add DT bindings for Broadcom Cygnus audio ASoC: cygnus: Add Cygnus audio DAI driver ASoC: cygnus: Add Cygnus audio DMA driver .../bindings/sound/brcm,cygnus-audio.txt | 67 + sound/soc/bcm/Kconfig | 9 + sound/soc/bcm/Makefile | 5 + sound/soc/bcm/cygnus-pcm.c | 861 +++++++++++ sound/soc/bcm/cygnus-ssp.c | 1529 ++++++++++++++++++++ sound/soc/bcm/cygnus-ssp.h | 139 ++ 6 files changed, 2610 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/brcm,cygnus-audio.txt create mode 100644 sound/soc/bcm/cygnus-pcm.c create mode 100644 sound/soc/bcm/cygnus-ssp.c create mode 100644 sound/soc/bcm/cygnus-ssp.h -- 1.7.9.5

3 5

[alsa-devel] [PATCH] ASoC: add api to retrieve dmic array info from coreboot nhlt
by Yong Zhi 31 May '16

31 May '16

skylake can be configured with either both 2 and 4 channel DMIC array, or 2 channel DMIC array only, this patch provides an API to retrieve the DMIC info from nhlt. Signed-off-by: Yong Zhi <yong.zhi(a)intel.com> --- sound/soc/intel/skylake/skl-nhlt.c | 37 +++++++++++++++++++++++++++++++++++++ sound/soc/intel/skylake/skl-nhlt.h | 22 ++++++++++++++++++++++ sound/soc/intel/skylake/skl.c | 12 ++++++++++-- sound/soc/intel/skylake/skl.h | 6 ++++++ 4 files changed, 75 insertions(+), 2 deletions(-) diff --git a/sound/soc/intel/skylake/skl-nhlt.c b/sound/soc/intel/skylake/skl-nhlt.c index 7d73648..be4c4a3 100644 --- a/sound/soc/intel/skylake/skl-nhlt.c +++ b/sound/soc/intel/skylake/skl-nhlt.c @@ -18,6 +18,7 @@ * */ #include "skl.h" +#include <linux/pci.h> /* Unique identification for getting NHLT blobs */ static u8 OSC_UUID[16] = {0x6E, 0x88, 0x9F, 0xA6, 0xEB, 0x6C, 0x94, 0x45, @@ -149,6 +150,42 @@ struct nhlt_specific_cfg return NULL; } +int skl_get_dmic_geo(struct skl *skl) +{ + struct nhlt_acpi_table *nhlt = (struct nhlt_acpi_table *)skl->nhlt; + struct nhlt_endpoint *epnt; + struct nhlt_dmic_array_config *cfg; + struct device *dev = &(skl->pci->dev); + unsigned int dmic_geo = 0; + u8 j; + + epnt = (struct nhlt_endpoint *)nhlt->desc; + + for (j = 0; j < nhlt->endpoint_count; j++) { + if (epnt->linktype == NHLT_LINK_DMIC) { + cfg = (struct nhlt_dmic_array_config *) + (epnt->config.caps); + switch (cfg->array_type) { + case NHLT_MIC_ARRAY_2CH_SMALL: + case NHLT_MIC_ARRAY_2CH_BIG: + dmic_geo |= MIC_ARRAY_2CH; + break; + case NHLT_MIC_ARRAY_4CH_1ST_GEOM: + case NHLT_MIC_ARRAY_4CH_L_SHAPED: + case NHLT_MIC_ARRAY_4CH_2ND_GEOM: + dmic_geo |= MIC_ARRAY_4CH; + break; + default: + dev_warn(dev, "undefined DMIC array_type 0x%0x\n", + cfg->array_type); + } + } + epnt = (struct nhlt_endpoint *)((u8 *)epnt + epnt->length); + } + + return dmic_geo; +} + static void skl_nhlt_trim_space(struct skl *skl) { char *s = skl->tplg_name; diff --git a/sound/soc/intel/skylake/skl-nhlt.h b/sound/soc/intel/skylake/skl-nhlt.h index 3769f9f..116534e7 100644 --- a/sound/soc/intel/skylake/skl-nhlt.h +++ b/sound/soc/intel/skylake/skl-nhlt.h @@ -103,4 +103,26 @@ struct nhlt_resource_desc { u64 length; } __packed; +#define MIC_ARRAY_2CH 2 +#define MIC_ARRAY_4CH 4 + +struct nhlt_tdm_config { + u8 virtual_slot; + u8 config_type; +} __packed; + +struct nhlt_dmic_array_config { + struct nhlt_tdm_config tdm_config; + u8 array_type; +} __packed; + +enum { + NHLT_MIC_ARRAY_2CH_SMALL = 0xa, + NHLT_MIC_ARRAY_2CH_BIG = 0xb, + NHLT_MIC_ARRAY_4CH_1ST_GEOM = 0xc, + NHLT_MIC_ARRAY_4CH_L_SHAPED = 0xd, + NHLT_MIC_ARRAY_4CH_2ND_GEOM = 0xe, + NHLT_MIC_ARRAY_VENDOR_DEFINED = 0xf, +}; + #endif diff --git a/sound/soc/intel/skylake/skl.c b/sound/soc/intel/skylake/skl.c index 06d8c26..b0f7226 100644 --- a/sound/soc/intel/skylake/skl.c +++ b/sound/soc/intel/skylake/skl.c @@ -35,6 +35,8 @@ #include "skl-sst-dsp.h" #include "skl-sst-ipc.h" +static struct skl_machine_pdata skl_dmic_data; + /* * initialize the PCI registers */ @@ -397,6 +399,10 @@ static int skl_machine_device_register(struct skl *skl, void *driver_data) platform_device_put(pdev); return -EIO; } + + if (mach->pdata) + dev_set_drvdata(&pdev->dev, mach->pdata); + skl->i2s_dev = pdev; return 0; @@ -666,6 +672,8 @@ static int skl_probe(struct pci_dev *pci, pci_set_drvdata(skl->pci, ebus); + skl_dmic_data.dmic_num = skl_get_dmic_geo(skl); + /* check if dsp is there */ if (ebus->ppcap) { err = skl_machine_device_register(skl, @@ -787,9 +795,9 @@ static void skl_remove(struct pci_dev *pci) static struct sst_acpi_mach sst_skl_devdata[] = { { "INT343A", "skl_alc286s_i2s", "intel/dsp_fw_release.bin", NULL, NULL, NULL }, { "INT343B", "skl_nau88l25_ssm4567_i2s", "intel/dsp_fw_release.bin", - NULL, NULL, NULL }, + NULL, NULL, &skl_dmic_data }, { "MX98357A", "skl_nau88l25_max98357a_i2s", "intel/dsp_fw_release.bin", - NULL, NULL, NULL }, + NULL, NULL, &skl_dmic_data }, {} }; diff --git a/sound/soc/intel/skylake/skl.h b/sound/soc/intel/skylake/skl.h index 4b4b387..f66be17 100644 --- a/sound/soc/intel/skylake/skl.h +++ b/sound/soc/intel/skylake/skl.h @@ -90,6 +90,11 @@ struct skl_dma_params { u8 stream_tag; }; +/* to pass dmic data */ +struct skl_machine_pdata { + u32 dmic_num; +}; + struct skl_dsp_ops { int id; struct skl_dsp_loader_ops (*loader_ops)(void); @@ -108,6 +113,7 @@ void skl_nhlt_free(struct nhlt_acpi_table *addr); struct nhlt_specific_cfg *skl_get_ep_blob(struct skl *skl, u32 instance, u8 link_type, u8 s_fmt, u8 no_ch, u32 s_rate, u8 dirn); +int skl_get_dmic_geo(struct skl *skl); int skl_nhlt_update_topology_bin(struct skl *skl); int skl_init_dsp(struct skl *skl); int skl_free_dsp(struct skl *skl); -- 1.9.1

4 22

[alsa-devel] [PATCH] ASoC: nau8825: add programmable biquad filter control
by John Hsu 31 May '16

31 May '16

Add programmable biquad filter configuration control for user space. The filter is configurable for low pass filters, high pass filters, Notch filter, etc in the ADC and DAC path. Signed-off-by: John Hsu <KCHSU0(a)nuvoton.com> --- sound/soc/codecs/nau8825.c | 53 ++++++++++++++++++++++++++++++++++++++++++++++ sound/soc/codecs/nau8825.h | 8 +++++++ 2 files changed, 61 insertions(+) diff --git a/sound/soc/codecs/nau8825.c b/sound/soc/codecs/nau8825.c index e988f89..88e01f9 100644 --- a/sound/soc/codecs/nau8825.c +++ b/sound/soc/codecs/nau8825.c @@ -217,6 +217,7 @@ static bool nau8825_volatile_reg(struct device *dev, unsigned int reg) case NAU8825_REG_SARDOUT_RAM_STATUS: case NAU8825_REG_CHARGE_PUMP_INPUT_READ: case NAU8825_REG_GENERAL_STATUS: + case NAU8825_REG_BIQ_CTRL ... NAU8825_REG_BIQ_COF10: return true; default: return false; @@ -293,6 +294,54 @@ static int nau8825_output_dac_event(struct snd_soc_dapm_widget *w, return 0; } +static int nau8825_biq_coeff_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); + struct soc_bytes_ext *params = (void *)kcontrol->private_value; + + if (!component->regmap) + return -EINVAL; + + regmap_raw_read(component->regmap, NAU8825_REG_BIQ_COF1, + ucontrol->value.bytes.data, params->max); + return 0; +} + +static int nau8825_biq_coeff_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); + struct soc_bytes_ext *params = (void *)kcontrol->private_value; + void *data; + + if (!component->regmap) + return -EINVAL; + + data = kmemdup(ucontrol->value.bytes.data, + params->max, GFP_KERNEL | GFP_DMA); + if (!data) + return -ENOMEM; + + regmap_update_bits(component->regmap, NAU8825_REG_BIQ_CTRL, + NAU8825_BIQ_WRT_EN, 0); + regmap_raw_write(component->regmap, NAU8825_REG_BIQ_COF1, + data, params->max); + regmap_update_bits(component->regmap, NAU8825_REG_BIQ_CTRL, + NAU8825_BIQ_WRT_EN, NAU8825_BIQ_WRT_EN); + + kfree(data); + return 0; +} + +static const char * const nau8825_biq_path[] = { + "ADC", "DAC" +}; + +static const struct soc_enum nau8825_biq_path_enum = + SOC_ENUM_SINGLE(NAU8825_REG_BIQ_CTRL, NAU8825_BIQ_PATH_SFT, + ARRAY_SIZE(nau8825_biq_path), nau8825_biq_path); + static const char * const nau8825_adc_decimation[] = { "32", "64", "128", "256" }; @@ -329,6 +378,10 @@ static const struct snd_kcontrol_new nau8825_controls[] = { SOC_ENUM("ADC Decimation Rate", nau8825_adc_decimation_enum), SOC_ENUM("DAC Oversampling Rate", nau8825_dac_oversampl_enum), + /* programmable biquad filter */ + SOC_ENUM("BIQ Path Select", nau8825_biq_path_enum), + SND_SOC_BYTES_EXT("BIQ Coefficeints", 20, + nau8825_biq_coeff_get, nau8825_biq_coeff_put), }; /* DAC Mux 0x33[9] and 0x34[9] */ diff --git a/sound/soc/codecs/nau8825.h b/sound/soc/codecs/nau8825.h index 9e6cb62..1293d1b 100644 --- a/sound/soc/codecs/nau8825.h +++ b/sound/soc/codecs/nau8825.h @@ -231,6 +231,14 @@ #define NAU8825_I2S_MS_MASTER (1 << NAU8825_I2S_MS_SFT) #define NAU8825_I2S_MS_SLAVE (0 << NAU8825_I2S_MS_SFT) +/* BIQ_CTRL (0x20) */ +#define NAU8825_BIQ_WRT_SFT 4 +#define NAU8825_BIQ_WRT_EN (1 << NAU8825_BIQ_WRT_SFT) +#define NAU8825_BIQ_PATH_SFT 0 +#define NAU8825_BIQ_PATH_MASK (1 << NAU8825_BIQ_PATH_SFT) +#define NAU8825_BIQ_PATH_ADC (0 << NAU8825_BIQ_PATH_SFT) +#define NAU8825_BIQ_PATH_DAC (1 << NAU8825_BIQ_PATH_SFT) + /* ADC_RATE (0x2b) */ #define NAU8825_ADC_SYNC_DOWN_SFT 0 #define NAU8825_ADC_SYNC_DOWN_MASK 0x3 -- 2.6.4

2 2

[alsa-devel] [PATCH] ASoC: tas571x: add input channel mixer for TAS5717/19
by Petr Kulhavy 31 May '16

31 May '16

Add channel 1 and 2 input mixer registers and the related ALSA mixer controls for TAS5717/19 chips. The mixer control coefficients on the chip are linear in the range -3.99999 to +3.99999, encoded in 3.23 number format. In this patch the mixer controls are limited to 128 values from 0.0 to 1.0 in 1/64 steps. Signed-off-by: Petr Kulhavy <brain(a)jikos.cz> --- sound/soc/codecs/tas571x.c | 19 +++++++++++++++++++ sound/soc/codecs/tas571x.h | 5 +++++ 2 files changed, 24 insertions(+) diff --git a/sound/soc/codecs/tas571x.c b/sound/soc/codecs/tas571x.c index 39307ad..bca0e84 100644 --- a/sound/soc/codecs/tas571x.c +++ b/sound/soc/codecs/tas571x.c @@ -57,6 +57,11 @@ static int tas571x_register_size(struct tas571x_private *priv, unsigned int reg) case TAS571X_CH1_VOL_REG: case TAS571X_CH2_VOL_REG: return priv->chip->vol_reg_size; + case TAS5717_CH1_RIGHT_CH_MIX_REG: + case TAS5717_CH1_LEFT_CH_MIX_REG: + case TAS5717_CH2_LEFT_CH_MIX_REG: + case TAS5717_CH2_RIGHT_CH_MIX_REG: + return 4; default: return 1; } @@ -293,6 +298,16 @@ static const struct snd_kcontrol_new tas5717_controls[] = { TAS571X_SOFT_MUTE_REG, TAS571X_SOFT_MUTE_CH1_SHIFT, TAS571X_SOFT_MUTE_CH2_SHIFT, 1, 1), + + SOC_DOUBLE_R_RANGE("CH1 Mixer Volume", + TAS5717_CH1_LEFT_CH_MIX_REG, + TAS5717_CH1_RIGHT_CH_MIX_REG, + 16, 0, 0x80, 0), + + SOC_DOUBLE_R_RANGE("CH2 Mixer Volume", + TAS5717_CH2_LEFT_CH_MIX_REG, + TAS5717_CH2_RIGHT_CH_MIX_REG, + 16, 0, 0x80, 0), }; static const struct reg_default tas5717_reg_defaults[] = { @@ -303,6 +318,10 @@ static const struct reg_default tas5717_reg_defaults[] = { { 0x08, 0x00c0 }, { 0x09, 0x00c0 }, { 0x1b, 0x82 }, + { TAS5717_CH1_RIGHT_CH_MIX_REG, 0x0 }, + { TAS5717_CH1_LEFT_CH_MIX_REG, 0x800000}, + { TAS5717_CH2_LEFT_CH_MIX_REG, 0x0 }, + { TAS5717_CH2_RIGHT_CH_MIX_REG, 0x800000}, }; static const struct regmap_config tas5717_regmap_config = { diff --git a/sound/soc/codecs/tas571x.h b/sound/soc/codecs/tas571x.h index 0aee471..b4175d6 100644 --- a/sound/soc/codecs/tas571x.h +++ b/sound/soc/codecs/tas571x.h @@ -30,4 +30,9 @@ #define TAS571X_OSC_TRIM_REG 0x1b +#define TAS5717_CH1_RIGHT_CH_MIX_REG 0x72 +#define TAS5717_CH1_LEFT_CH_MIX_REG 0x73 +#define TAS5717_CH2_LEFT_CH_MIX_REG 0x76 +#define TAS5717_CH2_RIGHT_CH_MIX_REG 0x77 + #endif /* _TAS571X_H */ -- 2.5.0

2 1

[alsa-devel] [PATCH] UAPI: Add three missing header files to Kbuild file
by Robert P. J. Day 31 May '16

31 May '16

include/uapi/sound/Kbuild was missing the inclusion of three header files in that directory. Signed-off-by: Robert P. J. Day <rpjday(a)crashcourse.ca> --- diff --git a/include/uapi/sound/Kbuild b/include/uapi/sound/Kbuild index a7f2770..691984c 100644 --- a/include/uapi/sound/Kbuild +++ b/include/uapi/sound/Kbuild @@ -1,5 +1,6 @@ # UAPI Header export list header-y += asequencer.h +header-y += asoc.h header-y += asound.h header-y += asound_fm.h header-y += compress_offload.h @@ -10,3 +11,5 @@ header-y += hdsp.h header-y += hdspm.h header-y += sb16_csp.h header-y += sfnt_info.h +header-y += tlv.h +header-y += usb_stream.h -- ======================================================================== Robert P. J. Day Ottawa, Ontario, CANADA http://crashcourse.ca Twitter: http://twitter.com/rpjday LinkedIn: http://ca.linkedin.com/in/rpjday ========================================================================

2 1

[alsa-devel] any reason for include/uapi/sound header files not listed in Kbuild?
by Robert P. J. Day 31 May '16

31 May '16

i just noticed that, in include/uapi/sound/, there are three header files: * asoc.h * tlv.h * usb_stream.h that are not referenced by the corresponding Kbuild file. is there any reason for this? or, in general, is there *any* reason for there to be header files under include/uapi/ that are not listed in their Kbuild files? thanks. rday -- ======================================================================== Robert P. J. Day Ottawa, Ontario, CANADA http://crashcourse.ca Twitter: http://twitter.com/rpjday LinkedIn: http://ca.linkedin.com/in/rpjday ========================================================================

2 3

[alsa-devel] Baytrail audio port problem
by alan Paris 31 May '16

31 May '16

Hi everybody, well I send this message because I've got a problem with Baytrail audio port (rt5640). I followed the discussion about writing an alsa driver (see it : http://mailman.alsa-project.org/pipermail/alsa-devel/2015-June/094114.html) and I tried many solutions (as like that : https://groups.google.com/forum/#!topic/android-x86/GKBFxCZyxQg ). Now the system see the Baytrail card audio for speakers but as Michele Curti when I start the system I've got a minute freeze and I haven't got still sound. When I launch dmesg command, I see only those messages : Baytrail Audio Port: sst: error code = -22 bytt100_rt5640 bytt100_rt5640: BUG: , pos = -22, buffer size = 3840, period size = 480 Do you know how I can solve this problem and it is possible to operate baytrail audio device with alsa or pulseaudio ? Thanks. Regards. Alan.

2 1

[alsa-devel] ALSA timestamping for kernel SoC drivers
by Alan Young 31 May '16

31 May '16

Hello, I need to get accurate timestamping of the kind currently available for HDA into some Freescale (iMX) SoC drivers. Is there anyone already working in this area or is there anyone who would be prepared to discuss the design and implementation details? Alan.

1 0

[alsa-devel] ALSA timestamping for kernel SoC drivers
by Alan Young 31 May '16

31 May '16

Hello, I need to get accurate timestamping of the kind currently available for HDA into some Freescale (iMX) SoC drivers. Is there anyone already working in this area or is there anyone who would be prepared to discuss the design and implementation details? Alan.

1 0

Re: [alsa-devel] next-20160531 build: 0 failures 3 warnings (next-20160531)
by Arnd Bergmann 31 May '16

31 May '16

On Tuesday, May 31, 2016 7:24:43 AM CEST Build bot for Mark Brown wrote: > ------------------------------------------------------------------------------- > arm64-allmodconfig : PASS, 0 errors, 3 warnings, 0 section mismatches > > Warnings: > ../sound/soc/codecs/cs47l24.c:1091:13: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] > ../sound/soc/codecs/wm5110.c:2246:13: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] These got introduced by 7baa7e2490e1 ("ASoC: arizona: Add event notification on voice trigger events"). Arnd

1 0

[alsa-devel] [PATCH] ASoC: ak4642: Implement suspend callback
by Peter Ujfalusi 31 May '16

31 May '16

Add the suspend callback to accompany the existing resume operation. With the suspend/resume callbacks the regmap (regcache) state handling can follow the recommended sequence. Signed-off-by: Peter Ujfalusi <peter.ujfalusi(a)ti.com> --- sound/soc/codecs/ak4642.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/sound/soc/codecs/ak4642.c b/sound/soc/codecs/ak4642.c index 4d8b9e49e8d6..ca9e82568b3c 100644 --- a/sound/soc/codecs/ak4642.c +++ b/sound/soc/codecs/ak4642.c @@ -523,15 +523,23 @@ static struct snd_soc_dai_driver ak4642_dai = { .symmetric_rates = 1, }; -static int ak4642_resume(struct snd_soc_codec *codec) +static int ak4642_suspend(struct snd_soc_codec *codec) { struct regmap *regmap = dev_get_regmap(codec->dev, NULL); + regcache_cache_only(regmap, true); regcache_mark_dirty(regmap); - regcache_sync(regmap); return 0; } +static int ak4642_resume(struct snd_soc_codec *codec) +{ + struct regmap *regmap = dev_get_regmap(codec->dev, NULL); + + regcache_cache_only(regmap, false); + regcache_sync(regmap); + return 0; +} static int ak4642_probe(struct snd_soc_codec *codec) { struct ak4642_priv *priv = snd_soc_codec_get_drvdata(codec); -- 2.8.3

1 1

[alsa-devel] [RFC v2 0/3] ASoC: Add support to Qualcomm msm8916-wcd codec
by Srinivas Kandagatla 31 May '16

31 May '16

This patchset aims at adding msm8916-wcd codec support. msm8916-wcd codec is found in Qualcomm msm8916 and apq8016 processors. This codec IP is split in to two parts(Digital & Analog), Analog part is integrated in to PMIC PM8916 and the digital part is integrated into Application processor. Register access to the analog part is done via SPMI interface to PMIC, and registers on the Application processor are memory mapped. Data transfer between Analog and Digital Die is done via a internal bus called PDM. This series also add a new macro SOC_SINGLE_S8_TLV() which is used in the codec driver to control gain on a 8 bit signed gain control register. Most of this driver is ported from downstream Andriod v3.10 kernel. Jack support and Headset button detection code is not added in to this series. This codec support: - 3 Microphones: Primary Mic(Handset mic), Headset Mic and Secondary Mic. - 2 Digital Microphones. - 2 Mic Bias Circuits. - Earpiece - Headset - Loud Speaker. - Jack Detect. - Headset Button detection circuit. Tested this code on v4.6 with lpass driver Headset (Mic and speakers), Secondary Mic and Loudspeaker on DB410C. DMIC should work too. Thanks, srini Changes since RFC v1 (https://lkml.org/lkml/2016/2/16/710) - Lot of code cleanup as suggest by Mark Brown. - Fixed bindings as suggested by Mark Rutland. - merged all the patches to one as spliting the patches did not help review. Srinivas Kandagatla (3): ASoC: msm8916: Add codec Device Tree bindings. ASoC: Introduce SOC_SINGLE_S8_TLV() macro ASoC: msm8916: Add msm8916-wcd codec driver .../devicetree/bindings/sound/qcom,msm8916-wcd.txt | 101 ++ include/dt-bindings/sound/msm8916-wcd.h | 7 + include/sound/soc.h | 11 + sound/soc/codecs/Kconfig | 4 + sound/soc/codecs/Makefile | 3 +- sound/soc/codecs/msm8916-wcd-registers.h | 710 +++++++++ sound/soc/codecs/msm8916-wcd.c | 1582 ++++++++++++++++++++ sound/soc/codecs/msm8916-wcd.h | 308 ++++ 8 files changed, 2725 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/sound/qcom,msm8916-wcd.txt create mode 100644 include/dt-bindings/sound/msm8916-wcd.h create mode 100644 sound/soc/codecs/msm8916-wcd-registers.h create mode 100644 sound/soc/codecs/msm8916-wcd.c create mode 100644 sound/soc/codecs/msm8916-wcd.h -- 2.8.2

3 8

Re: [alsa-devel] [PATCH 1/2] ASoC: Intel: Add Broxton-P Dialog Maxim machine driver
by Vinod Koul 31 May '16

31 May '16

On Mon, May 30, 2016 at 10:10:38PM -0700, sathyanarayana.nujella(a)intel.com wrote: > From: Sathyanarayana Nujella <sathyanarayana.nujella(a)intel.com> > > This patch adds Broxton-P I2S machine driver which uses > DA7219 and MAX98357A codecs. Both, Acked-by: Vinod Koul <vinod.koul(a)intel.com> Thanks -- ~Vinod

1 0

[alsa-devel] [PATCH v2] alsabat: add buffer size and period size settings
by vivian.zhang＠intel.com 31 May '16

31 May '16

From: "vivian,zhang" <vivian.zhang(a)intel.com> Add buffer size and period size settings in alsabat. With -E and -B options, alsabat performs the test with specified buffer size and period size Signed-off-by: Zhang Vivian <vivian.zhang(a)intel.com> --- Changes in v2: - Use a micro for min and max values of buffer size and period size - Use a micro for default period size in tinyalsa.c bat/alsa.c | 95 +++++++++++++++++++++++++++++++++++++++----------------- bat/bat.c | 18 +++++++++-- bat/common.h | 8 +++++ bat/tinyalsa.c | 5 ++- 4 files changed, 94 insertions(+), 32 deletions(-) diff --git a/bat/alsa.c b/bat/alsa.c index 75158cb..0a37714 100644 --- a/bat/alsa.c +++ b/bat/alsa.c @@ -74,6 +74,8 @@ static int set_snd_pcm_params(struct bat *bat, struct pcm_container *sndpcm) snd_pcm_format_t format; unsigned int buffer_time = 0; unsigned int period_time = 0; + snd_pcm_uframes_t buffer_size = 0; + snd_pcm_uframes_t period_size = 0; unsigned int rate; int err; const char *device_name = snd_pcm_name(sndpcm->handle); @@ -145,39 +147,71 @@ static int set_snd_pcm_params(struct bat *bat, struct pcm_container *sndpcm) return -EINVAL; } - if (snd_pcm_hw_params_get_buffer_time_max(params, - &buffer_time, 0) < 0) { - fprintf(bat->err, _("Get parameter from device error: ")); - fprintf(bat->err, _("buffer time: %d %s: %s(%d)\n"), - buffer_time, - device_name, snd_strerror(err), err); - return -EINVAL; - } + if (bat->buffer_size > 0 && bat->period_size == 0) + bat->period_size = bat->buffer_size / DIV_BUFFERTIME; - if (buffer_time > MAX_BUFFERTIME) - buffer_time = MAX_BUFFERTIME; + if (bat->buffer_size > 0) { + buffer_size = bat->buffer_size; + period_size = bat->period_size; - period_time = buffer_time / DIV_BUFFERTIME; + fprintf(bat->log, _("Set period size: %d buffer size: %d\n"), + (int) period_size, (int) buffer_size); - /* Set buffer time and period time */ - err = snd_pcm_hw_params_set_buffer_time_near(sndpcm->handle, params, - &buffer_time, 0); - if (err < 0) { - fprintf(bat->err, _("Set parameter to device error: ")); - fprintf(bat->err, _("buffer time: %d %s: %s(%d)\n"), - buffer_time, - device_name, snd_strerror(err), err); - return err; - } + err = snd_pcm_hw_params_set_buffer_size_near(sndpcm->handle, + params, &buffer_size); + if (err < 0) { + fprintf(bat->err, _("Set parameter to device error: ")); + fprintf(bat->err, _("buffer size: %d %s: %s(%d)\n"), + (int) buffer_size, + device_name, snd_strerror(err), err); + return err; + } - err = snd_pcm_hw_params_set_period_time_near(sndpcm->handle, params, - &period_time, 0); - if (err < 0) { - fprintf(bat->err, _("Set parameter to device error: ")); - fprintf(bat->err, _("period time: %d %s: %s(%d)\n"), - period_time, - device_name, snd_strerror(err), err); - return err; + err = snd_pcm_hw_params_set_period_size_near(sndpcm->handle, + params, &period_size, 0); + if (err < 0) { + fprintf(bat->err, _("Set parameter to device error: ")); + fprintf(bat->err, _("period size: %d %s: %s(%d)\n"), + (int) period_size, + device_name, snd_strerror(err), err); + return err; + } + } else { + if (snd_pcm_hw_params_get_buffer_time_max(params, + &buffer_time, 0) < 0) { + fprintf(bat->err, + _("Get parameter from device error: ")); + fprintf(bat->err, _("buffer time: %d %s: %s(%d)\n"), + buffer_time, + device_name, snd_strerror(err), err); + return -EINVAL; + } + + if (buffer_time > MAX_BUFFERTIME) + buffer_time = MAX_BUFFERTIME; + + period_time = buffer_time / DIV_BUFFERTIME; + + /* Set buffer time and period time */ + err = snd_pcm_hw_params_set_buffer_time_near(sndpcm->handle, + params, &buffer_time, 0); + if (err < 0) { + fprintf(bat->err, _("Set parameter to device error: ")); + fprintf(bat->err, _("buffer time: %d %s: %s(%d)\n"), + buffer_time, + device_name, snd_strerror(err), err); + return err; + } + + err = snd_pcm_hw_params_set_period_time_near(sndpcm->handle, + params, &period_time, 0); + if (err < 0) { + fprintf(bat->err, _("Set parameter to device error: ")); + fprintf(bat->err, _("period time: %d %s: %s(%d)\n"), + period_time, + device_name, snd_strerror(err), err); + return err; + } } /* Write the parameters to the driver */ @@ -214,6 +248,9 @@ static int set_snd_pcm_params(struct bat *bat, struct pcm_container *sndpcm) return -EINVAL; } + fprintf(bat->log, _("Get period size: %d buffer size: %d\n"), + (int) sndpcm->period_size, (int) sndpcm->buffer_size); + err = snd_pcm_format_physical_width(format); if (err < 0) { fprintf(bat->err, _("Invalid parameters: ")); diff --git a/bat/bat.c b/bat/bat.c index 1afdcb4..cd4ea2d 100644 --- a/bat/bat.c +++ b/bat/bat.c @@ -292,6 +292,8 @@ _("Usage: alsabat [-options]...\n" " -k parameter for frequency detecting threshold\n" " -F target frequency\n" " -p total number of periods to play/capture\n" +" -B buffer size in frames\n" +" -E period size in frames\n" " --log=# file that both stdout and strerr redirecting to\n" " --file=# file for playback\n" " --saveplay=# file that storing playback content, for debug\n" @@ -324,6 +326,8 @@ static void set_defaults(struct bat *bat) bat->capture.device = NULL; bat->buf = NULL; bat->local = false; + bat->buffer_size = 0; + bat->period_size = 0; #ifdef HAVE_LIBTINYALSA bat->channels = 2; bat->playback.fct = &playback_tinyalsa; @@ -342,8 +346,8 @@ static void set_defaults(struct bat *bat) static void parse_arguments(struct bat *bat, int argc, char *argv[]) { - int c, option_index; - static const char short_options[] = "D:P:C:f:n:F:c:r:s:k:p:lth"; + int c, option_index, err; + static const char short_options[] = "D:P:C:f:n:F:c:r:s:k:p:B:E:lth"; static const struct option long_options[] = { {"help", 0, 0, 'h'}, {"log", 1, 0, OPT_LOG}, @@ -414,6 +418,16 @@ static void parse_arguments(struct bat *bat, int argc, char *argv[]) bat->periods_total = atoi(optarg); bat->period_is_limited = true; break; + case 'B': + err = atoi(optarg); + bat->buffer_size = err >= MIN_BUFFERSIZE + && err < MAX_BUFFERSIZE ? err : 0; + break; + case 'E': + err = atoi(optarg); + bat->period_size = err >= MIN_PERIODSIZE + && err < MAX_PERIODSIZE ? err : 0; + break; case 'h': default: usage(bat); diff --git a/bat/common.h b/bat/common.h index b789af5..ad02a5a 100644 --- a/bat/common.h +++ b/bat/common.h @@ -46,6 +46,12 @@ #define DIV_BUFFERTIME 8 /* margin to avoid sign inversion when generate sine wav */ #define RANGE_FACTOR 0.95 +#define MAX_BUFFERSIZE 200000 +#define MIN_BUFFERSIZE 32 +#define MAX_PERIODSIZE 200000 +#define MIN_PERIODSIZE 32 +/* default period size for tinyalsa */ +#define TINYALSA_PERIODSIZE 1024 #define EBATBASE 1000 #define ENOPEAK (EBATBASE + 1) @@ -152,6 +158,8 @@ struct bat { int frame_size; /* size of frame */ int sample_size; /* size of sample */ enum _bat_pcm_format format; /* PCM format */ + int buffer_size; /* buffer size in frames */ + int period_size; /* period size in frames */ float sigma_k; /* threshold for peak detection */ float target_freq[MAX_CHANNELS]; diff --git a/bat/tinyalsa.c b/bat/tinyalsa.c index ea5f848..a19dd90 100644 --- a/bat/tinyalsa.c +++ b/bat/tinyalsa.c @@ -57,7 +57,10 @@ static int init_config(struct bat *bat, struct pcm_config *config) { config->channels = bat->channels; config->rate = bat->rate; - config->period_size = 1024; + if (bat->period_size > 0) + config->period_size = bat->period_size; + else + config->period_size = TINYALSA_PERIODSIZE; config->period_count = 4; config->start_threshold = 0; config->stop_threshold = 0; -- 1.7.9.5

2 1

[alsa-devel] [PATCH] ASoC: wm8731: Add 32 bit functionality
by Matt Flax 31 May '16

31 May '16

This patch adds 32 bit functionality to the wm8731 codec driver. Enabling this functionality for the Audio Injector sound card. Signed-off-by: Matt Flax <flatmax(a)flatmax.org> --- sound/soc/codecs/wm8731.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm8731.c b/sound/soc/codecs/wm8731.c index 4bcf5f8..a9fc3bc 100644 --- a/sound/soc/codecs/wm8731.c +++ b/sound/soc/codecs/wm8731.c @@ -5,6 +5,7 @@ * Copyright 2006-12 Wolfson Microelectronics, plc * * Author: Richard Purdie <richard(a)openedhand.com> + * Author: Matt Flax <flatmax(a)flatmax.com> added 32bit functionality. * * Based on wm8753.c by Liam Girdwood * @@ -358,6 +359,9 @@ static int wm8731_hw_params(struct snd_pcm_substream *substream, case 24: iface |= 0x0008; break; + case 32: + iface |= 0x000c; + break; } wm8731_set_deemph(codec); @@ -541,7 +545,7 @@ static int wm8731_startup(struct snd_pcm_substream *substream, #define WM8731_RATES SNDRV_PCM_RATE_8000_96000 #define WM8731_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ - SNDRV_PCM_FMTBIT_S24_LE) + SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) static const struct snd_soc_dai_ops wm8731_dai_ops = { .startup = wm8731_startup, -- 2.5.0

1 0

[alsa-devel] ALC256 speaker noise issue
by Kailang 31 May '16

31 May '16

Hi Takashi, ALC256 had speaker noise issue. Attach patch will solve it. This issue is cause from LDO output voltage control. This patch is updated the right LDO register value. Many Thanks. Kailang

2 5

[alsa-devel] [PATCH 0/7] ASoC: Intel: Skylake: Manifest parsing support
by Vinod Koul 30 May '16

30 May '16

The firmware file contains the extended manifest which needs to be stripped before downloading of firmware. The firmware manifest also contains manifest which has module information, Driver needs to parse and create module information and use it for sending IPCs. So this series adds common API for stripping manifest and then strips it for SKL and BXT. Also it adds core support to parse and add module information and its use in SKL and BXT. Changes in this series: - modified manifest parse to be generic utility code, added calling patches from SKL n BXTN - fix issues in last rvw - add extended manifest parsing in this series - make manifest series common and use list instead of table and bxtn modules will have manifest parsing and addition later Ramesh Babu (1): ASoC: Intel: Skylake: Add strip extended manifest utility Shreyas NC (1): ASoC: Intel: Skylake: Add DSP firmware manifest parsing Vinod Koul (5): ASoC: Intel: Skylake: Don't use local pointer for firmware ASoC: Intel: Skylake: Strip manifest for Skylake platform ASoC: Intel: Skylake: Strip manifest for Broxton platform ASoC: Intel: Skylake: Find uuids for Skylake ASoC: Intel: Skylake: Find uuids for Broxton sound/soc/intel/skylake/Makefile | 2 +- sound/soc/intel/skylake/bxt-sst.c | 26 +++- sound/soc/intel/skylake/skl-sst-dsp.h | 8 + sound/soc/intel/skylake/skl-sst-ipc.h | 3 + sound/soc/intel/skylake/skl-sst-utils.c | 256 ++++++++++++++++++++++++++++++++ sound/soc/intel/skylake/skl-sst.c | 23 ++- sound/soc/intel/skylake/skl-topology.c | 4 + 7 files changed, 315 insertions(+), 7 deletions(-) create mode 100644 sound/soc/intel/skylake/skl-sst-utils.c -- 1.9.1

2 14

[alsa-devel] [PATCH 1/2 v2] ASoC: nau8825: non-clock jack detection for power saving at standby
by John Hsu 30 May '16

30 May '16

The driver changes jack type detection interruption to non-clock archi- tecture for less 1mW power saving. The architecture is called manual mode jack detection. It has no hardware debounce, no jack type detection, but only detecting jack insertion. After jack insertion, the driver will switch to auto mode jack detection with internal clock which can detect microphone, jack type and do hardware debounce. The manual architecture has these main changes including codec initiation, interruption, clock control, and power management. When codec initiation or system resume, the clock is closed as jack insertion detection at man- ual mode, and bypass debounce circuit. These configurations move to resume setup function when setup bias level after resume. When jack insertion detection happens, the manual mode turns off and make configuration about jack type detection interruption at auto mode in auto irq setup function which can detect microphone and jack type. The inter- ruption will switch to manual mode again with clock free until jack ejec- tion happens. The system clock configuration adds clock disable option which can disable internal VCO clock. Before the system clock change, there is an restric- tion added to make sure clock disabled and not config any clock when no headset connected. In power management, we involve the solution about races and jack detec- tion in resume from Ben Zhang in the following patch and list his comment. [PATCH] ASoC: nau8825: Fix jack detection across suspend "Jack plug status is rechecked at resume to handle plug/unplug in S3 when the chip has no power." "Suspend/resume callbacks are moved from the i2c dev_pm_ops to snd_soc_codec_driver. soc_resume_deferred is a delayed work which may trigger nau8825_set_bias_level. The bias change races against dev_pm_ops, causing jack detection issues. soc_resume_deferred ensures bias change and snd_soc_codec_driver suspend/resume are sequenced correctly." Change SAR widget to supply type which can prevent the codec keeping at SND_SOC_BIAS_ON during suspend. The codec suspend function can just invoke normally. Before the system suspends, the driver turns off all interruptions. Keep the interruption quiet before resume setup completes. The ADC channel will be disabled which is needed for interruptions at audo mode. Signed-off-by: John Hsu <KCHSU0(a)nuvoton.com> Signed-off-by: Ben Zhang <benzh(a)chromium.org> --- sound/soc/codecs/nau8825.c | 295 ++++++++++++++++++++++++++++++++------------- sound/soc/codecs/nau8825.h | 9 +- 2 files changed, 222 insertions(+), 82 deletions(-) diff --git a/sound/soc/codecs/nau8825.c b/sound/soc/codecs/nau8825.c index f35019a..e738234 100644 --- a/sound/soc/codecs/nau8825.c +++ b/sound/soc/codecs/nau8825.c @@ -30,10 +30,16 @@ #include "nau8825.h" + +#define NUVOTON_CODEC_DAI "nau8825-hifi" + #define NAU_FREF_MAX 13500000 #define NAU_FVCO_MAX 124000000 #define NAU_FVCO_MIN 90000000 +static int nau8825_configure_sysclk(struct nau8825 *nau8825, + int clk_id, unsigned int freq); + struct nau8825_fll { int mclk_src; int ratio; @@ -368,9 +374,12 @@ static const struct snd_soc_dapm_widget nau8825_dapm_widgets[] = { SND_SOC_DAPM_SUPPLY("ADC Power", NAU8825_REG_ANALOG_ADC_2, 6, 0, NULL, 0), - /* ADC for button press detection */ - SND_SOC_DAPM_ADC("SAR", NULL, NAU8825_REG_SAR_CTRL, - NAU8825_SAR_ADC_EN_SFT, 0), + /* ADC for button press detection. A dapm supply widget is used to + * prevent dapm_power_widgets keeping the codec at SND_SOC_BIAS_ON + * during suspend. + */ + SND_SOC_DAPM_SUPPLY("SAR", NAU8825_REG_SAR_CTRL, + NAU8825_SAR_ADC_EN_SFT, 0, NULL, 0), SND_SOC_DAPM_PGA_S("ADACL", 2, NAU8825_REG_RDAC, 12, 0, NULL, 0), SND_SOC_DAPM_PGA_S("ADACR", 2, NAU8825_REG_RDAC, 13, 0, NULL, 0), @@ -614,9 +623,6 @@ int nau8825_enable_jack_detect(struct snd_soc_codec *codec, NAU8825_HSD_AUTO_MODE | NAU8825_SPKR_DWN1R | NAU8825_SPKR_DWN1L, NAU8825_HSD_AUTO_MODE | NAU8825_SPKR_DWN1R | NAU8825_SPKR_DWN1L); - regmap_update_bits(regmap, NAU8825_REG_INTERRUPT_MASK, - NAU8825_IRQ_HEADSET_COMPLETE_EN | NAU8825_IRQ_EJECT_EN, 0); - return 0; } EXPORT_SYMBOL_GPL(nau8825_enable_jack_detect); @@ -642,6 +648,22 @@ static void nau8825_restart_jack_detection(struct regmap *regmap) NAU8825_JACK_DET_RESTART, 0); } +static void nau8825_int_status_clear_all(struct regmap *regmap) +{ + int active_irq, clear_irq, i; + + /* Reset the intrruption status from rightmost bit if the corres- + * ponding irq event occurs. + */ + regmap_read(regmap, NAU8825_REG_IRQ_STATUS, &active_irq); + for (i = 0; i < NAU8825_REG_DATA_LEN; i++) { + clear_irq = (0x1 << i); + if (active_irq & clear_irq) + regmap_write(regmap, + NAU8825_REG_INT_CLR_KEY_STATUS, clear_irq); + } +} + static void nau8825_eject_jack(struct nau8825 *nau8825) { struct snd_soc_dapm_context *dapm = nau8825->dapm; @@ -656,6 +678,69 @@ static void nau8825_eject_jack(struct nau8825 *nau8825) regmap_update_bits(regmap, NAU8825_REG_HSD_CTRL, 0xf, 0xf); snd_soc_dapm_sync(dapm); + + /* Clear all interruption status */ + nau8825_int_status_clear_all(regmap); + + /* Enable the insertion interruption, disable the ejection inter- + * ruption, and then bypass de-bounce circuit. + */ + regmap_update_bits(regmap, NAU8825_REG_INTERRUPT_DIS_CTRL, + NAU8825_IRQ_EJECT_DIS | NAU8825_IRQ_INSERT_DIS, + NAU8825_IRQ_EJECT_DIS); + regmap_update_bits(regmap, NAU8825_REG_INTERRUPT_MASK, + NAU8825_IRQ_OUTPUT_EN | NAU8825_IRQ_EJECT_EN | + NAU8825_IRQ_HEADSET_COMPLETE_EN | NAU8825_IRQ_INSERT_EN, + NAU8825_IRQ_OUTPUT_EN | NAU8825_IRQ_EJECT_EN | + NAU8825_IRQ_HEADSET_COMPLETE_EN); + regmap_update_bits(regmap, NAU8825_REG_JACK_DET_CTRL, + NAU8825_JACK_DET_DB_BYPASS, NAU8825_JACK_DET_DB_BYPASS); + + /* Disable ADC needed for interruptions at audo mode */ + regmap_update_bits(regmap, NAU8825_REG_ENA_CTRL, + NAU8825_ENABLE_ADC, 0); + + /* Close clock for jack type detection at manual mode */ + nau8825_configure_sysclk(nau8825, NAU8825_CLK_DIS, 0); +} + +/* Enable audo mode interruptions with internal clock. */ +static void nau8825_setup_auto_irq(struct nau8825 *nau8825) +{ + struct regmap *regmap = nau8825->regmap; + + /* Enable headset jack type detection complete interruption and + * jack ejection interruption. + */ + regmap_update_bits(regmap, NAU8825_REG_INTERRUPT_MASK, + NAU8825_IRQ_HEADSET_COMPLETE_EN | NAU8825_IRQ_EJECT_EN, 0); + + /* Enable internal VCO needed for interruptions */ + nau8825_configure_sysclk(nau8825, NAU8825_CLK_INTERNAL, 0); + + /* Enable ADC needed for interruptions */ + regmap_update_bits(regmap, NAU8825_REG_ENA_CTRL, + NAU8825_ENABLE_ADC, NAU8825_ENABLE_ADC); + + /* Chip needs one FSCLK cycle in order to generate interruptions, + * as we cannot guarantee one will be provided by the system. Turning + * master mode on then off enables us to generate that FSCLK cycle + * with a minimum of contention on the clock bus. + */ + regmap_update_bits(regmap, NAU8825_REG_I2S_PCM_CTRL2, + NAU8825_I2S_MS_MASK, NAU8825_I2S_MS_MASTER); + regmap_update_bits(regmap, NAU8825_REG_I2S_PCM_CTRL2, + NAU8825_I2S_MS_MASK, NAU8825_I2S_MS_SLAVE); + + /* Not bypass de-bounce circuit */ + regmap_update_bits(regmap, NAU8825_REG_JACK_DET_CTRL, + NAU8825_JACK_DET_DB_BYPASS, 0); + + /* Unmask all interruptions */ + regmap_write(regmap, NAU8825_REG_INTERRUPT_DIS_CTRL, 0); + + /* Restart the jack detection process at auto mode */ + nau8825_restart_jack_detection(regmap); } static int nau8825_button_decode(int value) @@ -789,6 +874,26 @@ static irqreturn_t nau8825_interrupt(int irq, void *data) event_mask |= SND_JACK_HEADSET; clear_irq = NAU8825_HEADSET_COMPLETION_IRQ; + } else if ((active_irq & NAU8825_JACK_INSERTION_IRQ_MASK) == + NAU8825_JACK_INSERTION_DETECTED) { + /* One more step to check GPIO status directly. Thus, the + * driver can confirm the real insertion interruption because + * the intrruption at manual mode has bypassed debounce + * circuit which can get rid of unstable status. + */ + if (nau8825_is_jack_inserted(regmap)) { + /* Turn off insertion interruption at manual mode */ + regmap_update_bits(regmap, + NAU8825_REG_INTERRUPT_DIS_CTRL, + NAU8825_IRQ_INSERT_DIS, + NAU8825_IRQ_INSERT_DIS); + regmap_update_bits(regmap, NAU8825_REG_INTERRUPT_MASK, + NAU8825_IRQ_INSERT_EN, NAU8825_IRQ_INSERT_EN); + /* Enable interruption for jack type detection at audo + * mode which can detect microphone and jack type. + */ + nau8825_setup_auto_irq(nau8825); + } } if (!clear_irq) @@ -938,8 +1043,8 @@ static void nau8825_init_regs(struct nau8825 *nau8825) } static const struct regmap_config nau8825_regmap_config = { - .val_bits = 16, - .reg_bits = 16, + .val_bits = NAU8825_REG_DATA_LEN, + .reg_bits = NAU8825_REG_ADDR_LEN, .max_register = NAU8825_REG_MAX, .readable_reg = nau8825_readable_reg, @@ -958,12 +1063,6 @@ static int nau8825_codec_probe(struct snd_soc_codec *codec) nau8825->dapm = dapm; - /* Unmask interruptions. Handler uses dapm object so we can enable - * interruptions only after dapm is fully initialized. - */ - regmap_write(nau8825->regmap, NAU8825_REG_INTERRUPT_DIS_CTRL, 0); - nau8825_restart_jack_detection(nau8825->regmap); - return 0; } @@ -1128,6 +1227,14 @@ static int nau8825_mclk_prepare(struct nau8825 *nau8825, unsigned int freq) return 0; } +static void nau8825_configure_mclk_as_sysclk(struct regmap *regmap) +{ + regmap_update_bits(regmap, NAU8825_REG_CLK_DIVIDER, + NAU8825_CLK_SRC_MASK, NAU8825_CLK_SRC_MCLK); + regmap_update_bits(regmap, NAU8825_REG_FLL6, + NAU8825_DCO_EN, 0); +} + static int nau8825_configure_sysclk(struct nau8825 *nau8825, int clk_id, unsigned int freq) { @@ -1135,10 +1242,17 @@ static int nau8825_configure_sysclk(struct nau8825 *nau8825, int clk_id, int ret; switch (clk_id) { + case NAU8825_CLK_DIS: + /* Clock provided externally and disable internal VCO clock */ + nau8825_configure_mclk_as_sysclk(regmap); + if (nau8825->mclk_freq) { + clk_disable_unprepare(nau8825->mclk); + nau8825->mclk_freq = 0; + } + + break; case NAU8825_CLK_MCLK: - regmap_update_bits(regmap, NAU8825_REG_CLK_DIVIDER, - NAU8825_CLK_SRC_MASK, NAU8825_CLK_SRC_MCLK); - regmap_update_bits(regmap, NAU8825_REG_FLL6, NAU8825_DCO_EN, 0); + nau8825_configure_mclk_as_sysclk(regmap); /* MCLK not changed by clock tree */ regmap_update_bits(regmap, NAU8825_REG_CLK_DIVIDER, NAU8825_CLK_MCLK_SRC_MASK, 0); @@ -1148,17 +1262,25 @@ static int nau8825_configure_sysclk(struct nau8825 *nau8825, int clk_id, break; case NAU8825_CLK_INTERNAL: - regmap_update_bits(regmap, NAU8825_REG_FLL6, NAU8825_DCO_EN, - NAU8825_DCO_EN); - regmap_update_bits(regmap, NAU8825_REG_CLK_DIVIDER, - NAU8825_CLK_SRC_MASK, NAU8825_CLK_SRC_VCO); - /* Decrease the VCO frequency for power saving */ - regmap_update_bits(regmap, NAU8825_REG_CLK_DIVIDER, - NAU8825_CLK_MCLK_SRC_MASK, 0xf); - regmap_update_bits(regmap, NAU8825_REG_FLL1, - NAU8825_FLL_RATIO_MASK, 0x10); - regmap_update_bits(regmap, NAU8825_REG_FLL6, - NAU8825_SDM_EN, NAU8825_SDM_EN); + if (nau8825_is_jack_inserted(nau8825->regmap)) { + regmap_update_bits(regmap, NAU8825_REG_FLL6, + NAU8825_DCO_EN, NAU8825_DCO_EN); + regmap_update_bits(regmap, NAU8825_REG_CLK_DIVIDER, + NAU8825_CLK_SRC_MASK, NAU8825_CLK_SRC_VCO); + /* Decrease the VCO frequency for power saving */ + regmap_update_bits(regmap, NAU8825_REG_CLK_DIVIDER, + NAU8825_CLK_MCLK_SRC_MASK, 0xf); + regmap_update_bits(regmap, NAU8825_REG_FLL1, + NAU8825_FLL_RATIO_MASK, 0x10); + regmap_update_bits(regmap, NAU8825_REG_FLL6, + NAU8825_SDM_EN, NAU8825_SDM_EN); + } else { + /* The clock turns off intentionally for power saving + * when no headset connected. + */ + nau8825_configure_mclk_as_sysclk(regmap); + dev_warn(nau8825->dev, "Disable clock for power saving when no headset connected\n"); + } if (nau8825->mclk_freq) { clk_disable_unprepare(nau8825->mclk); nau8825->mclk_freq = 0; @@ -1209,6 +1331,31 @@ static int nau8825_set_sysclk(struct snd_soc_codec *codec, int clk_id, return nau8825_configure_sysclk(nau8825, clk_id, freq); } +static int nau8825_resume_setup(struct nau8825 *nau8825) +{ + struct regmap *regmap = nau8825->regmap; + + /* Close clock when jack type detection at manual mode */ + nau8825_configure_sysclk(nau8825, NAU8825_CLK_DIS, 0); + + /* Clear all interruption status */ + nau8825_int_status_clear_all(regmap); + + /* Enable both insertion and ejection interruptions, and then + * bypass de-bounce circuit. + */ + regmap_update_bits(regmap, NAU8825_REG_INTERRUPT_MASK, + NAU8825_IRQ_OUTPUT_EN | NAU8825_IRQ_HEADSET_COMPLETE_EN | + NAU8825_IRQ_EJECT_EN | NAU8825_IRQ_INSERT_EN, + NAU8825_IRQ_OUTPUT_EN | NAU8825_IRQ_HEADSET_COMPLETE_EN); + regmap_update_bits(regmap, NAU8825_REG_JACK_DET_CTRL, + NAU8825_JACK_DET_DB_BYPASS, NAU8825_JACK_DET_DB_BYPASS); + regmap_update_bits(regmap, NAU8825_REG_INTERRUPT_DIS_CTRL, + NAU8825_IRQ_INSERT_DIS | NAU8825_IRQ_EJECT_DIS, 0); + + return 0; +} + static int nau8825_set_bias_level(struct snd_soc_codec *codec, enum snd_soc_bias_level level) { @@ -1238,11 +1385,22 @@ static int nau8825_set_bias_level(struct snd_soc_codec *codec, "Failed to sync cache: %d\n", ret); return ret; } + + /* Setup codec configuration after resume */ + nau8825_resume_setup(nau8825); } break; case SND_SOC_BIAS_OFF: + /* Turn off all interruptions before system shutdown. Keep the + * interruption quiet before resume setup completes. + */ + regmap_write(nau8825->regmap, + NAU8825_REG_INTERRUPT_DIS_CTRL, 0xffff); + /* Disable ADC needed for interruptions at audo mode */ + regmap_update_bits(nau8825->regmap, NAU8825_REG_ENA_CTRL, + NAU8825_ENABLE_ADC, 0); if (nau8825->mclk_freq) clk_disable_unprepare(nau8825->mclk); @@ -1252,12 +1410,40 @@ static int nau8825_set_bias_level(struct snd_soc_codec *codec, return 0; } +#ifdef CONFIG_PM_SLEEP +static int nau8825_codec_suspend(struct snd_soc_codec *codec) +{ + struct nau8825 *nau8825 = snd_soc_codec_get_drvdata(codec); + + disable_irq(nau8825->irq); + snd_soc_codec_force_bias_level(codec, SND_SOC_BIAS_OFF); + regcache_cache_only(nau8825->regmap, true); + + return 0; +} + +static int nau8825_codec_resume(struct snd_soc_codec *codec) +{ + struct nau8825 *nau8825 = snd_soc_codec_get_drvdata(codec); + + regcache_cache_only(nau8825->regmap, false); + enable_irq(nau8825->irq); + + return 0; +} +#else +#define nau8825_codec_suspend NULL +#define nau8825_codec_resume NULL +#endif + static struct snd_soc_codec_driver nau8825_codec_driver = { .probe = nau8825_codec_probe, .set_sysclk = nau8825_set_sysclk, .set_pll = nau8825_set_pll, .set_bias_level = nau8825_set_bias_level, .suspend_bias_off = true, + .suspend = nau8825_codec_suspend, + .resume = nau8825_codec_resume, .controls = nau8825_controls, .num_controls = ARRAY_SIZE(nau8825_controls), @@ -1351,30 +1537,8 @@ static int nau8825_read_device_properties(struct device *dev, static int nau8825_setup_irq(struct nau8825 *nau8825) { - struct regmap *regmap = nau8825->regmap; int ret; - /* IRQ Output Enable */ - regmap_update_bits(regmap, NAU8825_REG_INTERRUPT_MASK, - NAU8825_IRQ_OUTPUT_EN, NAU8825_IRQ_OUTPUT_EN); - - /* Enable internal VCO needed for interruptions */ - nau8825_configure_sysclk(nau8825, NAU8825_CLK_INTERNAL, 0); - - /* Enable ADC needed for interrupts */ - regmap_update_bits(regmap, NAU8825_REG_ENA_CTRL, - NAU8825_ENABLE_ADC, NAU8825_ENABLE_ADC); - - /* Chip needs one FSCLK cycle in order to generate interrupts, - * as we cannot guarantee one will be provided by the system. Turning - * master mode on then off enables us to generate that FSCLK cycle - * with a minimum of contention on the clock bus. - */ - regmap_update_bits(regmap, NAU8825_REG_I2S_PCM_CTRL2, - NAU8825_I2S_MS_MASK, NAU8825_I2S_MS_MASTER); - regmap_update_bits(regmap, NAU8825_REG_I2S_PCM_CTRL2, - NAU8825_I2S_MS_MASK, NAU8825_I2S_MS_SLAVE); - ret = devm_request_threaded_irq(nau8825->dev, nau8825->irq, NULL, nau8825_interrupt, IRQF_TRIGGER_LOW | IRQF_ONESHOT, "nau8825", nau8825); @@ -1442,36 +1606,6 @@ static int nau8825_i2c_remove(struct i2c_client *client) return 0; } -#ifdef CONFIG_PM_SLEEP -static int nau8825_suspend(struct device *dev) -{ - struct i2c_client *client = to_i2c_client(dev); - struct nau8825 *nau8825 = dev_get_drvdata(dev); - - disable_irq(client->irq); - regcache_cache_only(nau8825->regmap, true); - regcache_mark_dirty(nau8825->regmap); - - return 0; -} - -static int nau8825_resume(struct device *dev) -{ - struct i2c_client *client = to_i2c_client(dev); - struct nau8825 *nau8825 = dev_get_drvdata(dev); - - regcache_cache_only(nau8825->regmap, false); - regcache_sync(nau8825->regmap); - enable_irq(client->irq); - - return 0; -} -#endif - -static const struct dev_pm_ops nau8825_pm = { - SET_SYSTEM_SLEEP_PM_OPS(nau8825_suspend, nau8825_resume) -}; - static const struct i2c_device_id nau8825_i2c_ids[] = { { "nau8825", 0 }, { } @@ -1498,7 +1632,6 @@ static struct i2c_driver nau8825_driver = { .name = "nau8825", .of_match_table = of_match_ptr(nau8825_of_ids), .acpi_match_table = ACPI_PTR(nau8825_acpi_match), - .pm = &nau8825_pm, }, .probe = nau8825_i2c_probe, .remove = nau8825_i2c_remove, diff --git a/sound/soc/codecs/nau8825.h b/sound/soc/codecs/nau8825.h index 9e6cb62..1100385 100644 --- a/sound/soc/codecs/nau8825.h +++ b/sound/soc/codecs/nau8825.h @@ -93,6 +93,9 @@ #define NAU8825_REG_CHARGE_PUMP_INPUT_READ 0x81 #define NAU8825_REG_GENERAL_STATUS 0x82 #define NAU8825_REG_MAX NAU8825_REG_GENERAL_STATUS +/* 16-bit control register address, and 16-bits control register data */ +#define NAU8825_REG_ADDR_LEN 16 +#define NAU8825_REG_DATA_LEN 16 /* ENA_CTRL (0x1) */ #define NAU8825_ENABLE_DACR_SFT 10 @@ -145,6 +148,7 @@ /* JACK_DET_CTRL (0xd) */ #define NAU8825_JACK_DET_RESTART (1 << 9) +#define NAU8825_JACK_DET_DB_BYPASS (1 << 8) #define NAU8825_JACK_INSERT_DEBOUNCE_SFT 5 #define NAU8825_JACK_INSERT_DEBOUNCE_MASK (0x7 << NAU8825_JACK_INSERT_DEBOUNCE_SFT) #define NAU8825_JACK_EJECT_DEBOUNCE_SFT 2 @@ -157,6 +161,7 @@ #define NAU8825_IRQ_KEY_RELEASE_EN (1 << 7) #define NAU8825_IRQ_KEY_SHORT_PRESS_EN (1 << 5) #define NAU8825_IRQ_EJECT_EN (1 << 2) +#define NAU8825_IRQ_INSERT_EN (1 << 0) /* IRQ_STATUS (0x10) */ #define NAU8825_HEADSET_COMPLETION_IRQ (1 << 10) @@ -177,6 +182,7 @@ #define NAU8825_IRQ_KEY_RELEASE_DIS (1 << 7) #define NAU8825_IRQ_KEY_SHORT_PRESS_DIS (1 << 5) #define NAU8825_IRQ_EJECT_DIS (1 << 2) +#define NAU8825_IRQ_INSERT_DIS (1 << 0) /* SAR_CTRL (0x13) */ #define NAU8825_SAR_ADC_EN_SFT 12 @@ -333,7 +339,8 @@ /* System Clock Source */ enum { - NAU8825_CLK_MCLK = 0, + NAU8825_CLK_DIS = 0, + NAU8825_CLK_MCLK, NAU8825_CLK_INTERNAL, NAU8825_CLK_FLL_MCLK, NAU8825_CLK_FLL_BLK, -- 2.6.4

2 13