April 2016 - Alsa-devel - mailman.alsa-project.org

[alsa-devel] [PATCH v2] ALSA: hda - Update BCLK also at hotplug for i915 HSW/BDW
by Takashi Iwai 26 Apr '16

26 Apr '16

The recent bug report suggests that BCLK setup for i915 HSW/BDW needs to be updated at each HDMI hotplug, not only at initialization and resume. That is, we need to update HSW_EM4 and HSW_EM5 registers at ELD notification, too. Otherwise the HDMI audio may be out of sync and played in a wrong pitch. However, the HDA codec driver has no access to the controller registers, and currently the code managing these registers is in hda_intel.c, i.e. local to the controller driver. For allowing the explicit BCLK update from the codec driver, as in this patch, the former haswell_set_bclk() in hda_intel.c is moved to hdac_i915.c and exposed as snd_hdac_i915_set_bclk(). This is called from both the HDA controller driver and intel_pin_eld_notify() in HDMI codec driver. Along with this change, snd_hdac_get_display_clk() gets dropped as it's no longer used. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91410 Cc: <stable(a)vger.kernel.org> # v4.5+ Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- include/sound/hda_i915.h | 5 ++-- sound/hda/hdac_i915.c | 62 ++++++++++++++++++++++++++++++++++++++-------- sound/pci/hda/hda_intel.c | 56 +++-------------------------------------- sound/pci/hda/patch_hdmi.c | 1 + 4 files changed, 58 insertions(+), 66 deletions(-) diff --git a/include/sound/hda_i915.h b/include/sound/hda_i915.h index fa341fcb5829..f5842bcd9c94 100644 --- a/include/sound/hda_i915.h +++ b/include/sound/hda_i915.h @@ -9,7 +9,7 @@ #ifdef CONFIG_SND_HDA_I915 int snd_hdac_set_codec_wakeup(struct hdac_bus *bus, bool enable); int snd_hdac_display_power(struct hdac_bus *bus, bool enable); -int snd_hdac_get_display_clk(struct hdac_bus *bus); +void snd_hdac_i915_set_bclk(struct hdac_bus *bus); int snd_hdac_sync_audio_rate(struct hdac_bus *bus, hda_nid_t nid, int rate); int snd_hdac_acomp_get_eld(struct hdac_bus *bus, hda_nid_t nid, bool *audio_enabled, char *buffer, int max_bytes); @@ -25,9 +25,8 @@ static inline int snd_hdac_display_power(struct hdac_bus *bus, bool enable) { return 0; } -static inline int snd_hdac_get_display_clk(struct hdac_bus *bus) +static inline void snd_hdac_i915_set_bclk(struct hdac_bus *bus) { - return 0; } static inline int snd_hdac_sync_audio_rate(struct hdac_bus *bus, hda_nid_t nid, int rate) diff --git a/sound/hda/hdac_i915.c b/sound/hda/hdac_i915.c index 54babe1c0b16..607bbeaebddf 100644 --- a/sound/hda/hdac_i915.c +++ b/sound/hda/hdac_i915.c @@ -20,6 +20,7 @@ #include <sound/core.h> #include <sound/hdaudio.h> #include <sound/hda_i915.h> +#include <sound/hda_register.h> static struct i915_audio_component *hdac_acomp; @@ -97,26 +98,65 @@ int snd_hdac_display_power(struct hdac_bus *bus, bool enable) } EXPORT_SYMBOL_GPL(snd_hdac_display_power); +#define CONTROLLER_IN_GPU(pci) (((pci)->device == 0x0a0c) || \ + ((pci)->device == 0x0c0c) || \ + ((pci)->device == 0x0d0c) || \ + ((pci)->device == 0x160c)) + /** - * snd_hdac_get_display_clk - Get CDCLK in kHz + * snd_hdac_i915_set_bclk - Reprogram BCLK for HSW/BDW * @bus: HDA core bus * - * This function is supposed to be used only by a HD-audio controller - * driver that needs the interaction with i915 graphics. + * Intel HSW/BDW display HDA controller is in GPU. Both its power and link BCLK + * depends on GPU. Two Extended Mode registers EM4 (M value) and EM5 (N Value) + * are used to convert CDClk (Core Display Clock) to 24MHz BCLK: + * BCLK = CDCLK * M / N + * The values will be lost when the display power well is disabled and need to + * be restored to avoid abnormal playback speed. * - * This function queries CDCLK value in kHz from the graphics driver and - * returns the value. A negative code is returned in error. + * Call this function at initializing and changing power well, as well as + * at ELD notifier for the hotplug. */ -int snd_hdac_get_display_clk(struct hdac_bus *bus) +void snd_hdac_i915_set_bclk(struct hdac_bus *bus) { struct i915_audio_component *acomp = bus->audio_component; + struct pci_dev *pci = to_pci_dev(bus->dev); + int cdclk_freq; + unsigned int bclk_m, bclk_n; + + if (!acomp || !acomp->ops || !acomp->ops->get_cdclk_freq) + return; /* only for i915 binding */ + if (!CONTROLLER_IN_GPU(pci)) + return; /* only HSW/BDW */ + + cdclk_freq = acomp->ops->get_cdclk_freq(acomp->dev); + switch (cdclk_freq) { + case 337500: + bclk_m = 16; + bclk_n = 225; + break; + + case 450000: + default: /* default CDCLK 450MHz */ + bclk_m = 4; + bclk_n = 75; + break; + + case 540000: + bclk_m = 4; + bclk_n = 90; + break; + + case 675000: + bclk_m = 8; + bclk_n = 225; + break; + } - if (!acomp || !acomp->ops) - return -ENODEV; - - return acomp->ops->get_cdclk_freq(acomp->dev); + snd_hdac_chip_writew(bus, HSW_EM4, bclk_m); + snd_hdac_chip_writew(bus, HSW_EM5, bclk_n); } -EXPORT_SYMBOL_GPL(snd_hdac_get_display_clk); +EXPORT_SYMBOL_GPL(snd_hdac_i915_set_bclk); /* There is a fixed mapping between audio pin node and display port * on current Intel platforms: diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index 637b8a0e2a91..9a0d1445ca5c 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c @@ -857,50 +857,6 @@ static int param_set_xint(const char *val, const struct kernel_param *kp) #define azx_del_card_list(chip) /* NOP */ #endif /* CONFIG_PM */ -/* Intel HSW/BDW display HDA controller is in GPU. Both its power and link BCLK - * depends on GPU. Two Extended Mode registers EM4 (M value) and EM5 (N Value) - * are used to convert CDClk (Core Display Clock) to 24MHz BCLK: - * BCLK = CDCLK * M / N - * The values will be lost when the display power well is disabled and need to - * be restored to avoid abnormal playback speed. - */ -static void haswell_set_bclk(struct hda_intel *hda) -{ - struct azx *chip = &hda->chip; - int cdclk_freq; - unsigned int bclk_m, bclk_n; - - if (!hda->need_i915_power) - return; - - cdclk_freq = snd_hdac_get_display_clk(azx_bus(chip)); - switch (cdclk_freq) { - case 337500: - bclk_m = 16; - bclk_n = 225; - break; - - case 450000: - default: /* default CDCLK 450MHz */ - bclk_m = 4; - bclk_n = 75; - break; - - case 540000: - bclk_m = 4; - bclk_n = 90; - break; - - case 675000: - bclk_m = 8; - bclk_n = 225; - break; - } - - azx_writew(chip, HSW_EM4, bclk_m); - azx_writew(chip, HSW_EM5, bclk_n); -} - #if defined(CONFIG_PM_SLEEP) || defined(SUPPORT_VGA_SWITCHEROO) /* * power management @@ -958,7 +914,7 @@ static int azx_resume(struct device *dev) if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL && hda->need_i915_power) { snd_hdac_display_power(azx_bus(chip), true); - haswell_set_bclk(hda); + snd_hdac_i915_set_bclk(azx_bus(chip)); } if (chip->msi) if (pci_enable_msi(pci) < 0) @@ -1058,7 +1014,7 @@ static int azx_runtime_resume(struct device *dev) bus = azx_bus(chip); if (hda->need_i915_power) { snd_hdac_display_power(bus, true); - haswell_set_bclk(hda); + snd_hdac_i915_set_bclk(bus); } else { /* toggle codec wakeup bit for STATESTS read */ snd_hdac_set_codec_wakeup(bus, true); @@ -1796,12 +1752,8 @@ static int azx_first_init(struct azx *chip) /* initialize chip */ azx_init_pci(chip); - if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) { - struct hda_intel *hda; - - hda = container_of(chip, struct hda_intel, chip); - haswell_set_bclk(hda); - } + if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) + snd_hdac_i915_set_bclk(bus); hda_intel_init_chip(chip, (probe_only[dev] & 2) == 0); diff --git a/sound/pci/hda/patch_hdmi.c b/sound/pci/hda/patch_hdmi.c index 40933aa33afe..1483f85999ec 100644 --- a/sound/pci/hda/patch_hdmi.c +++ b/sound/pci/hda/patch_hdmi.c @@ -2232,6 +2232,7 @@ static void intel_pin_eld_notify(void *audio_ptr, int port) if (atomic_read(&(codec)->core.in_pm)) return; + snd_hdac_i915_set_bclk(&codec->bus->core); check_presence_and_report(codec, pin_nid); } -- 2.8.1

1 0

[alsa-devel] [PATCH] ALSA: hda - Update BCLK also at hotplug for i915 HSW/BDW
by Takashi Iwai 26 Apr '16

26 Apr '16

The recent bug report suggests that BCLK setup for i915 HSW/BDW needs to be updated at each HDMI hotplug, not only at initialization and resume. That is, we need to update HSW_EM4 and HSW_EM5 registers at ELD notification, too. Otherwise the HDMI audio may be out of sync and played in a wrong pitch. However, the HDA codec driver has no access to the controller registers, and currently the code managing these registers is in hda_intel.c, i.e. local to the controller driver. For allowing the explicit BCLK update from the codec driver, as in this patch, the former haswell_set_bclk() in hda_intel.c is moved to hdac_i915.c and exposed as snd_hdac_i915_set_bclk(). This is called from both the HDA controller driver and intel_pin_eld_notify() in HDMI codec driver. Along with this change, snd_hdac_get_display_clk() gets dropped as it's no longer used. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91410 Cc: <stable(a)vger.kernel.org> # v4.5+ Signed-off-by: Takashi Iwai <tiwai(a)suse.de> --- include/sound/hda_i915.h | 5 ++-- sound/hda/hdac_i915.c | 62 +++++++++++++++++++++++++++++++++++++++++++++- sound/pci/hda/hda_intel.c | 56 +++-------------------------------------- sound/pci/hda/patch_hdmi.c | 1 + 4 files changed, 68 insertions(+), 56 deletions(-) diff --git a/include/sound/hda_i915.h b/include/sound/hda_i915.h index fa341fcb5829..f5842bcd9c94 100644 --- a/include/sound/hda_i915.h +++ b/include/sound/hda_i915.h @@ -9,7 +9,7 @@ #ifdef CONFIG_SND_HDA_I915 int snd_hdac_set_codec_wakeup(struct hdac_bus *bus, bool enable); int snd_hdac_display_power(struct hdac_bus *bus, bool enable); -int snd_hdac_get_display_clk(struct hdac_bus *bus); +void snd_hdac_i915_set_bclk(struct hdac_bus *bus); int snd_hdac_sync_audio_rate(struct hdac_bus *bus, hda_nid_t nid, int rate); int snd_hdac_acomp_get_eld(struct hdac_bus *bus, hda_nid_t nid, bool *audio_enabled, char *buffer, int max_bytes); @@ -25,9 +25,8 @@ static inline int snd_hdac_display_power(struct hdac_bus *bus, bool enable) { return 0; } -static inline int snd_hdac_get_display_clk(struct hdac_bus *bus) +static inline void snd_hdac_i915_set_bclk(struct hdac_bus *bus) { - return 0; } static inline int snd_hdac_sync_audio_rate(struct hdac_bus *bus, hda_nid_t nid, int rate) diff --git a/sound/hda/hdac_i915.c b/sound/hda/hdac_i915.c index 54babe1c0b16..181777b43aa1 100644 --- a/sound/hda/hdac_i915.c +++ b/sound/hda/hdac_i915.c @@ -20,6 +20,7 @@ #include <sound/core.h> #include <sound/hdaudio.h> #include <sound/hda_i915.h> +#include <sound/hda_register.h> static struct i915_audio_component *hdac_acomp; @@ -116,7 +117,66 @@ int snd_hdac_get_display_clk(struct hdac_bus *bus) return acomp->ops->get_cdclk_freq(acomp->dev); } -EXPORT_SYMBOL_GPL(snd_hdac_get_display_clk); + +#define CONTROLLER_IN_GPU(pci) (((pci)->device == 0x0a0c) || \ + ((pci)->device == 0x0c0c) || \ + ((pci)->device == 0x0d0c) || \ + ((pci)->device == 0x160c)) + +/** + * snd_hdac_i915_set_bclk - Reprogram BCLK for HSW/BDW + * @bus: HDA core bus + * + * Intel HSW/BDW display HDA controller is in GPU. Both its power and link BCLK + * depends on GPU. Two Extended Mode registers EM4 (M value) and EM5 (N Value) + * are used to convert CDClk (Core Display Clock) to 24MHz BCLK: + * BCLK = CDCLK * M / N + * The values will be lost when the display power well is disabled and need to + * be restored to avoid abnormal playback speed. + * + * Call this function at initializing and changing power well, as well as + * at ELD notifier for the hotplug. + */ +void snd_hdac_i915_set_bclk(struct hdac_bus *bus) +{ + struct i915_audio_component *acomp = bus->audio_component; + struct pci_dev *pci = to_pci_dev(bus->dev); + int cdclk_freq; + unsigned int bclk_m, bclk_n; + + if (!acomp || !acomp->ops || !acomp->ops->get_cdclk_freq) + return; /* only for i915 binding */ + if (!CONTROLLER_IN_GPU(pci)) + return; /* only HSW/BDW */ + + cdclk_freq = acomp->ops->get_cdclk_freq(acomp->dev); + switch (cdclk_freq) { + case 337500: + bclk_m = 16; + bclk_n = 225; + break; + + case 450000: + default: /* default CDCLK 450MHz */ + bclk_m = 4; + bclk_n = 75; + break; + + case 540000: + bclk_m = 4; + bclk_n = 90; + break; + + case 675000: + bclk_m = 8; + bclk_n = 225; + break; + } + + snd_hdac_chip_writew(bus, HSW_EM4, bclk_m); + snd_hdac_chip_writew(bus, HSW_EM5, bclk_n); +} +EXPORT_SYMBOL_GPL(snd_hdac_i915_set_bclk); /* There is a fixed mapping between audio pin node and display port * on current Intel platforms: diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index 637b8a0e2a91..9a0d1445ca5c 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c @@ -857,50 +857,6 @@ static int param_set_xint(const char *val, const struct kernel_param *kp) #define azx_del_card_list(chip) /* NOP */ #endif /* CONFIG_PM */ -/* Intel HSW/BDW display HDA controller is in GPU. Both its power and link BCLK - * depends on GPU. Two Extended Mode registers EM4 (M value) and EM5 (N Value) - * are used to convert CDClk (Core Display Clock) to 24MHz BCLK: - * BCLK = CDCLK * M / N - * The values will be lost when the display power well is disabled and need to - * be restored to avoid abnormal playback speed. - */ -static void haswell_set_bclk(struct hda_intel *hda) -{ - struct azx *chip = &hda->chip; - int cdclk_freq; - unsigned int bclk_m, bclk_n; - - if (!hda->need_i915_power) - return; - - cdclk_freq = snd_hdac_get_display_clk(azx_bus(chip)); - switch (cdclk_freq) { - case 337500: - bclk_m = 16; - bclk_n = 225; - break; - - case 450000: - default: /* default CDCLK 450MHz */ - bclk_m = 4; - bclk_n = 75; - break; - - case 540000: - bclk_m = 4; - bclk_n = 90; - break; - - case 675000: - bclk_m = 8; - bclk_n = 225; - break; - } - - azx_writew(chip, HSW_EM4, bclk_m); - azx_writew(chip, HSW_EM5, bclk_n); -} - #if defined(CONFIG_PM_SLEEP) || defined(SUPPORT_VGA_SWITCHEROO) /* * power management @@ -958,7 +914,7 @@ static int azx_resume(struct device *dev) if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL && hda->need_i915_power) { snd_hdac_display_power(azx_bus(chip), true); - haswell_set_bclk(hda); + snd_hdac_i915_set_bclk(azx_bus(chip)); } if (chip->msi) if (pci_enable_msi(pci) < 0) @@ -1058,7 +1014,7 @@ static int azx_runtime_resume(struct device *dev) bus = azx_bus(chip); if (hda->need_i915_power) { snd_hdac_display_power(bus, true); - haswell_set_bclk(hda); + snd_hdac_i915_set_bclk(bus); } else { /* toggle codec wakeup bit for STATESTS read */ snd_hdac_set_codec_wakeup(bus, true); @@ -1796,12 +1752,8 @@ static int azx_first_init(struct azx *chip) /* initialize chip */ azx_init_pci(chip); - if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) { - struct hda_intel *hda; - - hda = container_of(chip, struct hda_intel, chip); - haswell_set_bclk(hda); - } + if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) + snd_hdac_i915_set_bclk(bus); hda_intel_init_chip(chip, (probe_only[dev] & 2) == 0); diff --git a/sound/pci/hda/patch_hdmi.c b/sound/pci/hda/patch_hdmi.c index 40933aa33afe..1483f85999ec 100644 --- a/sound/pci/hda/patch_hdmi.c +++ b/sound/pci/hda/patch_hdmi.c @@ -2232,6 +2232,7 @@ static void intel_pin_eld_notify(void *audio_ptr, int port) if (atomic_read(&(codec)->core.in_pm)) return; + snd_hdac_i915_set_bclk(&codec->bus->core); check_presence_and_report(codec, pin_nid); } -- 2.8.1

1 1

[alsa-devel] [PATCH] Asoc: Intel: common: Removed unused sst_acpi_mach fields
by Joel Holdsworth 26 Apr '16

26 Apr '16

The fields in question are currently unused, and are unlikely to be useful in the future: - "board" is a very vague name not related to a concrete matching criteria such as a DMI match or ACPI OEM IDs. - "machine_quirk" lacks the pointer arguments to be able to manipulate any sst-acpi structures. For it to be useful these would need to be added. Furthermore, a quirk function is much more likely to be relevant to a whole chipset, rather than a single board. - Without "machine_quirk", "pdata" serves no purpose and should be removed. --- sound/soc/intel/common/sst-acpi.c | 8 ++++---- sound/soc/intel/common/sst-acpi.h | 5 ----- 2 files changed, 4 insertions(+), 9 deletions(-) diff --git a/sound/soc/intel/common/sst-acpi.c b/sound/soc/intel/common/sst-acpi.c index 2c5eda1..aba6575 100644 --- a/sound/soc/intel/common/sst-acpi.c +++ b/sound/soc/intel/common/sst-acpi.c @@ -180,7 +180,7 @@ static int sst_acpi_remove(struct platform_device *pdev) } static struct sst_acpi_mach haswell_machines[] = { - { "INT33CA", "haswell-audio", "intel/IntcSST1.bin", NULL, NULL, NULL }, + { "INT33CA", "haswell-audio", "intel/IntcSST1.bin" }, {} }; @@ -198,7 +198,7 @@ static struct sst_acpi_desc sst_acpi_haswell_desc = { }; static struct sst_acpi_mach broadwell_machines[] = { - { "INT343A", "broadwell-audio", "intel/IntcSST2.bin", NULL, NULL, NULL }, + { "INT343A", "broadwell-audio", "intel/IntcSST2.bin" }, {} }; @@ -217,8 +217,8 @@ static struct sst_acpi_desc sst_acpi_broadwell_desc = { #if !IS_ENABLED(CONFIG_SND_SST_IPC_ACPI) static struct sst_acpi_mach baytrail_machines[] = { - { "10EC5640", "byt-rt5640", "intel/fw_sst_0f28.bin-48kHz_i2s_master", NULL, NULL, NULL }, - { "193C9890", "byt-max98090", "intel/fw_sst_0f28.bin-48kHz_i2s_master", NULL, NULL, NULL }, + { "10EC5640", "byt-rt5640", "intel/fw_sst_0f28.bin-48kHz_i2s_master" }, + { "193C9890", "byt-max98090", "intel/fw_sst_0f28.bin-48kHz_i2s_master" }, {} }; diff --git a/sound/soc/intel/common/sst-acpi.h b/sound/soc/intel/common/sst-acpi.h index 4dcfb7e..9eb8ade 100644 --- a/sound/soc/intel/common/sst-acpi.h +++ b/sound/soc/intel/common/sst-acpi.h @@ -28,9 +28,4 @@ struct sst_acpi_mach { const char *drv_name; /* firmware file name */ const char *fw_filename; - - /* board name */ - const char *board; - void (*machine_quirk)(void); - void *pdata; }; -- 2.7.3

2 2

[alsa-devel] [PATCH v4] ASoC: docs: add clocking examples for DAI formats
by Peter Rosin 25 Apr '16

25 Apr '16

Provide *our* view of what the rules are for the different DAI formats, so that we do not have to trust external interpretations for this crucial bit of interoperability. Signed-off-by: Peter Rosin <peda(a)axentia.se> --- Documentation/sound/alsa/soc/clocking.txt | 195 ++++++++++++++++++++++++++++++ 1 file changed, 195 insertions(+) Use rising edge and falling edge (instead of flanks). Also differentiate how transmitters and receivers behave and explain at what edges transmitters change data and at what edges receivers read data. Don't speak about left and right channels for the DSP formats where there are just a number of channels. Cheers, Peter diff --git a/Documentation/sound/alsa/soc/clocking.txt b/Documentation/sound/alsa/soc/clocking.txt index b1300162e01c..7c2bea8124b0 100644 --- a/Documentation/sound/alsa/soc/clocking.txt +++ b/Documentation/sound/alsa/soc/clocking.txt @@ -47,5 +47,200 @@ rate, number of channels and word size) to save on power. It is also desirable to use the codec (if possible) to drive (or master) the audio clocks as it usually gives more accurate sample rates than the CPU. +The below diagrams all have BCLK as the first signal, LRC as the second signal +and DATA as the third. Below that is an indication about which DATA bits belong +in what channel. + +A "..." marking as DATA indicates that there may be more bits that are not +shown. Also, all DATA bits marked X may or may not be present. DAI +transmitters must add them should LRC not match the word size exactly and DAI +receivers must be prepared to ignore them. DAI transmitters must insert zeros +for I2S and Left Justified modes, and preferably not drive DATA for the DSP +modes for these extra X bits. + + +I2S +--- + +The LRC master should put the edges of LRC so that the LRC slaves can reliably +sample LRC at the rising edges of BCLK, preferably by changing LRC in response +to falling edges of BCLK. + +Transmitters wait for a falling edge of LRC, then skip a rising edge of BCLK, +and start the left word (output MSB) at the following falling edge of BCLK. +Transmitters continue with the rest of the word by changing DATA at the falling +edges to BCLK. Transmitters must pad words with zeros if LRC is not matching +the word size, so that receivers expecting wider words do not get noise. +Transmission of the right word works the same, but is initiated by a rising +edge of LRC instead. + +Receivers wait for a falling edge of LRC, then skip a rising edge of BCLK and +read the MSB of the left word at the following rising edge of BCLK. Receivers +then continue with the rest of the word at the following rising edges of BCLK. +Receivers must ignore the tail if more bits per word are transmitted than they +can use. Reception of the right word works the same, but is initiated by a +rising edge of LRC instead. + +See the official I2S specification +https://www.sparkfun.com/datasheets/BreakoutBoards/I2SBUS.pdf + + .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. +-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '- +---. .-------------------------------. + '-------------------------------' '----- +---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.- + | |MSB| |...| |LSB| X |...| X |MSB| |...| |LSB| X |...| X | +---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'- + | Left channel | Right channel | + + +Left Justified (aka MSB) +------------------------ + +The LRC master should synchronize the LRC clock edges with the falling edges of +BCLK. + +Transmitters start the left word (output MSB) at the rising edge of LRC and +hold MSB over the first rising edge of BCLK. The transmitters then change DATA +at the falling edges of BCLK. Transmitters must pad words with zeros if LRC is +not matching the word size, so that receivers expecting wider words do not get +noise. Transmission of the right word works the same, but is initiated by a +falling edge of LRC instead. + +Receivers wait for a rising edge of LRC and reads the MSB of the left word at +the first rising edge of BCLK after that. Receivers then continue with the rest +of the word at the following rising edges of BCLK. Receivers must ignore the +tail if more bits per word are transmitted than they can use. Reception of the +right word works the same, but is initiated by a falling edge of LRC instead. + + .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. +-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '- + .-------------------------------. .----- +---' '-------------------------------' +---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.- + |MSB| |...| |LSB| X |...| X |MSB| |...| |LSB| X |...| X | | +---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'- + | Left channel | Right channel | + + +Right Justified (aka LSB) +------------------------- + +The LRC master should synchronize the LRC clock edges with the falling edges of +BCLK. + +Transmitters wait for a rising edge of LRC, and then skip the correct number of +rising edges of BCLK. If zero rising edges are skipped, transmitters start the +left word (output MSB) immediately at the rising edge of LRC. If at least one +rising edge of BCLK is skipped, they start the left word at the following +falling edge of BCLK. The correct number of rising edges of BCLK to skip after +the initial rising edge of LRC is such that the LSB is ending at the following +edge of LRC. After the MSB, transmitters continue with the rest of the word at +the falling edges of BCLK. Transmission of the right word works the same, but +is initiated by a falling edge of LRC instead. + +Receivers wait for a rising edge of LRC, and then skip the same number of rising +edges of BCLK as the transmitters, and read the MSB of the left word on the +first rising edge of BCLK after that. Receivers then continue with the rest of +the word at the following rising edges of BCLK. Reception of the right word +works the same, but is initiated by a falling edge of LRC instead. + + .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. +-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '- + .-------------------------------. .----- +---' '-------------------------------' +---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.- + | X |...| X |MSB| |...| |LSB| X |...| X |MSB| |...| |LSB| | +---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'- + | Left channel | Right channel | + + +DSP mode A +---------- +Transmitters wait for a rising edge of LRC, then skip one rising edge of BCLK +and start the first word (output MSB) at the following falling edge of BCLK. +They then change DATA at the falling edges of BCLK. When the first word is +finished, transmitters follow up immediately with further words. + +Receivers wait for a rising edge of LRC, then skip one rising edge of BCLK and +read the MSB of the first word at the following rising edge of BCLK. Receivers +then continue with the rest of the word at the rising edges of BCLK. Further +words are following immediately. + + .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. +-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '- + .- .- + -' -' +---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.- + | |MSB| |...| |LSB|MSB| |...| |LSB| X | |...| | X | | +---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'- + | 1st channel | 2nd channel | | + +LRC examples for DSP mode A + .---. .---. +---' '-------------------------------------------------------' '----- +-. .---------------------------------------------------------. .--------- + '-' '-' + + +DSP mode B +---------- +Transmitters start the first word (output MSB) at the rising edge of LRC, hold +MSB over the first rising edge of BCLK, and continue with the rest of the word +at the following falling edges of BCLK. When the first word is finished, +transmitters follow up immediately with further words. + +Receivers wait for a rising edge of LRC, then read the MSB of the first word at +the following rising edge of BCLK. Receivers then continue with the rest of the +word at the rising edges of BCLK. Further words are following immediately. + + .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. +-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '- + .- .- + -' -' +---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.- + |MSB| |...| |LSB|MSB| |...| |LSB| X | |...| | X | | | +---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'- + | 1st channel | 2nd channel | | + +LRC examples for DSP mode B + .---. .---. +---' '-------------------------------------------------------' '----- +-. .---------------------------------------------------------. .--------- + '-' '-' + + +Inverted Clocks +--------------- + +The above diagrams show normal BCLK and LRC clocking where DAI transmitters +change DATA on the falling edge of BCLK and DAI receivers read DATA on the +rising edge. For inverted BCLK it is naturally the other way around. Inverted +LRC is just that. + +Left Justified, inverted BCLK +----------------------------- + +-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .- + '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' + .-------------------------------. .----- +---' '-------------------------------' +---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.- + |MSB| |...| |LSB| X |...| X |MSB| |...| |LSB| X |...| X | | +---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'- + | Left channel | Right channel | + + +Left Justified, inverted LRC +---------------------------- + + .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. +-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '- +---. .-------------------------------. + '-------------------------------' '----- +---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.- + |MSB| |...| |LSB| X |...| X |MSB| |...| |LSB| X |...| X | | +---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'- + | Left channel | Right channel | -- 2.1.4

2 3

Re: [alsa-devel] [PATCH 2/3] ASoC: simple-card: Add support jack detection via codec
by Mark Brown 25 Apr '16

25 Apr '16

On Fri, Apr 22, 2016 at 09:37:39AM -0700, Jeremy McDermond wrote: > components fairly well. I’m just trying to wrap my head around > where this all would fit in. Should the codec driver just register > a bunch of clock components in its initialization somewhere? > I’m thinking that it can’t have its own CCF driver separate from > the codec driver because you won’t have proper access to the > registers over I2C or SPI. I don’t find a lot of examples in the > codec drivers, and there aren’t very many other drivers in the tree > that seem to register clocks with CCF that I can find. If the clock code is worth splitting off into a separate driver that's what drivers/mfd is for.

2 1

[alsa-devel] Intel SST baytrail audio on PIPO W6
by Bharath Ghanta 25 Apr '16

25 Apr '16

Hi, I am trying to get audio working on PIPO W6 tablet. I was following this thread [1] in my efforts to get audio working. Initially i was not getting any interrupts. I changed the interrupt order as described in the thread and was able to get interrupts and successfully load the firmware. I also ran the amixer commands described in [2]. Now I am just getting a clicking sound whenever something plays. Pierre-Louis said something about playing with the DAI links and swapping the codec connections here [3]. Can anybody explain to me how its done ? I tried to enable other switches in alsamixer using the below commands but nothing worked. amixer -c0 sset 'codec_out1 mix 0 pcm0_in' on I mailed the manufacturer asking for the schematics of the audio chip and the android source code for this device but got no response. I also tried the ssp0 firmware but i got no sound instead of the clicking sound i was getting with the default firmware. I have the exact problem as the guy in this thread. [4] Thanks, Bharath [1] http://thread.gmane.org/gmane.linux.alsa.devel/134554 [2] http://mailman.alsa-project.org/pipermail/alsa-devel/2015-June/0940 80.html [3] http://mailman.alsa-project.org/pipermail/alsa-devel/2016-March/106 262.html [4] http://mailman.alsa-project.org/pipermail/alsa-devel/2016-March/106 178.html

1 0

Re: [alsa-devel] [snd_ali5451] snd_ali5451 0000:00:06.0: BUG: , pos = 16384, buffer size = 16384, period size = 1024
by Takashi Iwai 25 Apr '16

25 Apr '16

On Mon, 25 Apr 2016 16:50:09 +0200, Enrico Mioso wrote: > > Thank you a lot Takashi. > > there are two problems: > 1 - The warning doesn't manifest always: in some cases (instances of mplayer?) this warning manifests itself from time to time, some minutes. Yes, this is likely some XRUN by either hardware boundary condition or a system load. > 2 - I think the audio stops a little bit (less of a second I think), then things go ahead. Still I don't think any message is printed by alsa libraries. > I don't know if this per se indicates there is no overrun, but still my sensation is this. > But this system isn't exactly "extremely fast": so the audio might stop even for other reasons. I'll recompile the kernel to apply this patch and let you know. > The timing will be slow, but I will try. My patch won't improve in this regard, I'm afraid. The PCM core already corrects to the position 0 if such an invalid position is detected, and the patch would do it just implicitly. But, it's still interesting to see whether it has any impact on such behavior. Takashi

1 0

[alsa-devel] [PATCH] ASoC: Make aux_dev more like a generic component
by mengdong.lin＠linux.intel.com 25 Apr '16

25 Apr '16

From: Mengdong Lin <mengdong.lin(a)linux.intel.com> aux_dev is mainly used by the machine driver to specify analog devices, which are registered as codecs. Making it more like a generic component can help the machine driver to use it to specify any component with topology info by name. Details: - Remove the stub 'rtd_aux' array from the soc card. - Add a list 'aux_comp_list' to store the components of aux_devs. And add a list head 'list_aux' to struct snd_soc_component, for adding such components to the above list. - Add a 'init' ops to a component for machine specific init. soc_bind_aux_dev() will set it to be aux_dev's init. And it will be called when probing the component. - soc_bind_aux_dev() will also search components by name of an aux_dev, since it may not be a codec. - Move probing of aux_devs before checking new DAI links brought by topology. - Move removal of aux_devs later than removal of links. Because topology of aux components may register DAIs and the DAI drivers will go with removal of the aux components, we want soc_remove_link_dais() to remove the DAIs at first. Signed-off-by: Mengdong Lin <mengdong.lin(a)linux.intel.com> diff --git a/include/sound/soc.h b/include/sound/soc.h index 49011c3..c03e07a 100644 --- a/include/sound/soc.h +++ b/include/sound/soc.h @@ -798,6 +798,7 @@ struct snd_soc_component { unsigned int registered_as_component:1; struct list_head list; + struct list_head list_aux; /* for auxiliary component of the card */ struct snd_soc_dai_driver *dai_drv; int num_dai; @@ -841,6 +842,9 @@ struct snd_soc_component { int (*probe)(struct snd_soc_component *); void (*remove)(struct snd_soc_component *); + /* machine specific init */ + int (*init)(struct snd_soc_component *component); + #ifdef CONFIG_DEBUG_FS void (*init_debugfs)(struct snd_soc_component *component); const char *debugfs_prefix; @@ -1144,8 +1148,7 @@ struct snd_soc_card { */ struct snd_soc_aux_dev *aux_dev; int num_aux_devs; - struct snd_soc_pcm_runtime *rtd_aux; - int num_aux_rtd; + struct list_head aux_comp_list; const struct snd_kcontrol_new *controls; int num_controls; @@ -1553,6 +1556,7 @@ static inline void snd_soc_initialize_card_lists(struct snd_soc_card *card) INIT_LIST_HEAD(&card->widgets); INIT_LIST_HEAD(&card->paths); INIT_LIST_HEAD(&card->dapm_list); + INIT_LIST_HEAD(&card->aux_comp_list); } static inline bool snd_soc_volsw_is_stereo(struct soc_mixer_control *mc) diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c index 4e03e82..790ee2b 100644 --- a/sound/soc/soc-core.c +++ b/sound/soc/soc-core.c @@ -1413,6 +1413,16 @@ static int soc_probe_component(struct snd_soc_card *card, component->name); } + /* machine specific init */ + if (component->init) { + ret = component->init(component); + if (ret < 0) { + dev_err(component->dev, + "Failed to do machine specific init %d\n", ret); + goto err_probe; + } + } + if (component->controls) snd_soc_add_component_controls(component, component->controls, component->num_controls); @@ -1657,65 +1667,81 @@ static int soc_probe_link_dais(struct snd_soc_card *card, static int soc_bind_aux_dev(struct snd_soc_card *card, int num) { - struct snd_soc_pcm_runtime *rtd = &card->rtd_aux[num]; struct snd_soc_aux_dev *aux_dev = &card->aux_dev[num]; - const char *name = aux_dev->codec_name; - - rtd->component = soc_find_component(aux_dev->codec_of_node, name); - if (!rtd->component) { - if (aux_dev->codec_of_node) - name = of_node_full_name(aux_dev->codec_of_node); - - dev_err(card->dev, "ASoC: %s not registered\n", name); - return -EPROBE_DEFER; + struct snd_soc_component *component; + const char *name; + struct device_node *codec_of_node; + + if (aux_dev->codec_of_node || aux_dev->codec_name) { + /* codecs, usually analog devices */ + name = aux_dev->codec_name; + codec_of_node = aux_dev->codec_of_node; + component = soc_find_component(codec_of_node, name); + if (!component) { + if (codec_of_node) + name = of_node_full_name(codec_of_node); + goto err_defer; + } + } else if (aux_dev->name) { + /* generic components */ + name = aux_dev->name; + component = soc_find_component(NULL, name); + if (!component) + goto err_defer; + } else { + dev_err(card->dev, "ASoC: Invalid auxiliary device\n"); + return -EINVAL; } - /* - * Some places still reference rtd->codec, so we have to keep that - * initialized if the component is a CODEC. Once all those references - * have been removed, this code can be removed as well. - */ - rtd->codec = rtd->component->codec; - + component->init = aux_dev->init; + list_add(&component->list_aux, &card->aux_comp_list); return 0; + +err_defer: + dev_err(card->dev, "ASoC: %s not registered\n", name); + return -EPROBE_DEFER; } -static int soc_probe_aux_dev(struct snd_soc_card *card, int num) +static int soc_probe_aux_devices(struct snd_soc_card *card) { - struct snd_soc_pcm_runtime *rtd = &card->rtd_aux[num]; - struct snd_soc_aux_dev *aux_dev = &card->aux_dev[num]; + struct snd_soc_component *comp; + int order; int ret; - ret = soc_probe_component(card, rtd->component); - if (ret < 0) - return ret; - - /* do machine specific initialization */ - if (aux_dev->init) { - ret = aux_dev->init(rtd->component); - if (ret < 0) { - dev_err(card->dev, "ASoC: failed to init %s: %d\n", - aux_dev->name, ret); - return ret; + for (order = SND_SOC_COMP_ORDER_FIRST; order <= SND_SOC_COMP_ORDER_LAST; + order++) { + list_for_each_entry(comp, &card->aux_comp_list, list_aux) { + if (comp->driver->probe_order == order) { + ret = soc_probe_component(card, comp); + if (ret < 0) { + dev_err(card->dev, + "ASoC: failed to probe aux component %s %d\n", + comp->name, ret); + return ret; + } + } } } - return soc_post_component_init(rtd, aux_dev->name); + return 0; } -static void soc_remove_aux_dev(struct snd_soc_card *card, int num) +static void soc_remove_aux_devices(struct snd_soc_card *card) { - struct snd_soc_pcm_runtime *rtd = &card->rtd_aux[num]; - struct snd_soc_component *component = rtd->component; + struct snd_soc_component *comp, *_comp; + int order; - /* unregister the rtd device */ - if (rtd->dev_registered) { - device_unregister(rtd->dev); - rtd->dev_registered = 0; + for (order = SND_SOC_COMP_ORDER_FIRST; order <= SND_SOC_COMP_ORDER_LAST; + order++) { + list_for_each_entry_safe(comp, _comp, + &card->aux_comp_list, list_aux) { + if (comp->driver->remove_order == order) { + soc_remove_component(comp); + /* remove it from the card's aux_comp_list */ + list_del(&comp->list_aux); + } + } } - - if (component) - soc_remove_component(component); } static int snd_soc_init_codec_cache(struct snd_soc_codec *codec) @@ -1894,6 +1920,11 @@ static int snd_soc_instantiate_card(struct snd_soc_card *card) } } + /* probe auxiliary components */ + ret = soc_probe_aux_devices(card); + if (ret < 0) + goto probe_dai_err; + /* Find new DAI links added during probing components and bind them. * Components with topology may bring new DAIs and DAI links. */ @@ -1923,16 +1954,6 @@ static int snd_soc_instantiate_card(struct snd_soc_card *card) } } - for (i = 0; i < card->num_aux_devs; i++) { - ret = soc_probe_aux_dev(card, i); - if (ret < 0) { - dev_err(card->dev, - "ASoC: failed to add auxiliary devices %d\n", - ret); - goto probe_aux_dev_err; - } - } - snd_soc_dapm_link_dai_widgets(card); snd_soc_dapm_connect_dai_link_widgets(card); @@ -1992,8 +2013,7 @@ static int snd_soc_instantiate_card(struct snd_soc_card *card) return 0; probe_aux_dev_err: - for (i = 0; i < card->num_aux_devs; i++) - soc_remove_aux_dev(card, i); + soc_remove_aux_devices(card); probe_dai_err: soc_remove_dai_links(card); @@ -2039,20 +2059,18 @@ static int soc_probe(struct platform_device *pdev) static int soc_cleanup_card_resources(struct snd_soc_card *card) { struct snd_soc_pcm_runtime *rtd; - int i; /* make sure any delayed work runs */ list_for_each_entry(rtd, &card->rtd_list, list) flush_delayed_work(&rtd->delayed_work); - /* remove auxiliary devices */ - for (i = 0; i < card->num_aux_devs; i++) - soc_remove_aux_dev(card, i); - /* remove and free each DAI */ soc_remove_dai_links(card); soc_remove_pcm_runtimes(card); + /* remove auxiliary devices */ + soc_remove_aux_devices(card); + soc_cleanup_card_debugfs(card); /* remove the card */ @@ -2608,16 +2626,6 @@ int snd_soc_register_card(struct snd_soc_card *card) INIT_LIST_HEAD(&card->rtd_list); card->num_rtd = 0; - card->rtd_aux = devm_kzalloc(card->dev, - sizeof(struct snd_soc_pcm_runtime) * - card->num_aux_devs, - GFP_KERNEL); - if (card->rtd_aux == NULL) - return -ENOMEM; - - for (i = 0; i < card->num_aux_devs; i++) - card->rtd_aux[i].card = card; - INIT_LIST_HEAD(&card->dapm_dirty); INIT_LIST_HEAD(&card->dobj_list); card->instantiated = 0; -- 2.5.0

3 2

[alsa-devel] Broken IRQs on BayTrail devices
by Joel Holdsworth 25 Apr '16

25 Apr '16

Dear All, I've been working on a kernel patch for a firmware IRQ quirk issue that affects multiple Intel Atom Bay-Trail boards: https://bugzilla.kernel.org/show_bug.cgi?id=117141 If you have a Bay Trail device with non-functioning sound, can you attach the DSDT and dmidecode output to the bug so I can investigate whether the quirk affect your device. Best Regards Joel Holdsworth

2 1

[alsa-devel] [PATCH 0/3] More robust i915 / audio binding
by Takashi Iwai 25 Apr '16

25 Apr '16

Hi, here is a patchset to make the i915 / audio binding more robustly. It's based on Imre's work to implement the stub component ops for notifying the i915 disablement. Takashi === Imre Deak (1): drm/i915/hda: Add audio component stub Takashi Iwai (2): ALSA: hda - Immediately fail if the i915 audio component is disabled ALSA: hda - Support deferred i915 audio component binding drivers/gpu/drm/i915/i915_drv.c | 34 +++++++++++++-------- drivers/gpu/drm/i915/intel_audio.c | 61 ++++++++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_drv.h | 2 ++ include/drm/i915_component.h | 5 ++++ sound/hda/hdac_i915.c | 28 ++++++++++++----- 5 files changed, 110 insertions(+), 20 deletions(-) -- 2.8.1

3 6