November 2015 - Alsa-devel - mailman.alsa-project.org

Re: [alsa-devel] [PATCH v3 1/5] mfd: arizona: Support Cirrus Logic CS47L24 and WM1831
by Lee Jones 24 Nov '15

24 Nov '15

On Tue, 03 Nov 2015, Richard Fitzgerald wrote: > This patch adds the regmap configuration tables and > core MFD handling for the CS47L24 and WM1831 codecs. > > Note that compared to the other Arizona codecs, these devices > do not have an LDO1 or micsupp regulators, extcon driver, or > the DCVDD isolation control. > > Signed-off-by: Richard Fitzgerald <rf(a)opensource.wolfsonmicro.com> > --- > drivers/mfd/Kconfig | 18 +- > drivers/mfd/Makefile | 3 + > drivers/mfd/arizona-core.c | 74 +- > drivers/mfd/arizona-irq.c | 40 +- > drivers/mfd/arizona-spi.c | 7 + > drivers/mfd/arizona.h | 4 + > drivers/mfd/cs47l24-tables.c | 1629 ++++++++++++++++++++++++++++++++++++++ > include/linux/mfd/arizona/core.h | 3 + > 8 files changed, 1753 insertions(+), 25 deletions(-) > create mode 100644 drivers/mfd/cs47l24-tables.c Applied, thanks. > diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig > index 4d92df6..9581ebb 100644 > --- a/drivers/mfd/Kconfig > +++ b/drivers/mfd/Kconfig > @@ -1370,24 +1370,30 @@ config MFD_ARIZONA > bool > > config MFD_ARIZONA_I2C > - tristate "Wolfson Microelectronics Arizona platform with I2C" > + tristate "Cirrus Logic/Wolfson Microelectronics Arizona platform with I2C" > select MFD_ARIZONA > select MFD_CORE > select REGMAP_I2C > depends on I2C > help > - Support for the Wolfson Microelectronics Arizona platform audio SoC > - core functionality controlled via I2C. > + Support for the Cirrus Logic/Wolfson Microelectronics Arizona platform > + audio SoC core functionality controlled via I2C. > > config MFD_ARIZONA_SPI > - tristate "Wolfson Microelectronics Arizona platform with SPI" > + tristate "Cirrus Logic/Wolfson Microelectronics Arizona platform with SPI" > select MFD_ARIZONA > select MFD_CORE > select REGMAP_SPI > depends on SPI_MASTER > help > - Support for the Wolfson Microelectronics Arizona platform audio SoC > - core functionality controlled via I2C. > + Support for the Cirrus Logic/Wolfson Microelectronics Arizona platform > + audio SoC core functionality controlled via I2C. > + > +config MFD_CS47L24 > + bool "Cirrus Logic CS47L24 and WM1831" > + depends on MFD_ARIZONA > + help > + Support for Cirrus Logic CS47L24 and WM1831 low power audio SoC > > config MFD_WM5102 > bool "Wolfson Microelectronics WM5102" > diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile > index a8b76b8..3fa1df4 100644 > --- a/drivers/mfd/Makefile > +++ b/drivers/mfd/Makefile > @@ -51,6 +51,9 @@ endif > ifeq ($(CONFIG_MFD_WM8998),y) > obj-$(CONFIG_MFD_ARIZONA) += wm8998-tables.o > endif > +ifeq ($(CONFIG_MFD_CS47L24),y) > +obj-$(CONFIG_MFD_ARIZONA) += cs47l24-tables.o > +endif > obj-$(CONFIG_MFD_WM8400) += wm8400-core.o > wm831x-objs := wm831x-core.o wm831x-irq.o wm831x-otp.o > wm831x-objs += wm831x-auxadc.o > diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c > index d474732..b9489a0 100644 > --- a/drivers/mfd/arizona-core.c > +++ b/drivers/mfd/arizona-core.c > @@ -598,6 +598,12 @@ static int arizona_runtime_resume(struct device *dev) > goto err; > } > break; > + case WM1831: > + case CS47L24: > + ret = arizona_wait_for_boot(arizona); > + if (ret != 0) > + goto err; > + break; > default: > ret = arizona_wait_for_boot(arizona); > if (ret != 0) > @@ -682,6 +688,9 @@ static int arizona_runtime_suspend(struct device *dev) > } > } > break; > + case WM1831: > + case CS47L24: > + break; > default: > jd_active = arizona_is_jack_det_active(arizona); > if (jd_active < 0) > @@ -862,6 +871,8 @@ const struct of_device_id arizona_of_match[] = { > { .compatible = "wlf,wm8997", .data = (void *)WM8997 }, > { .compatible = "wlf,wm8998", .data = (void *)WM8998 }, > { .compatible = "wlf,wm1814", .data = (void *)WM1814 }, > + { .compatible = "wlf,wm1831", .data = (void *)WM1831 }, > + { .compatible = "cirrus,cs47l24", .data = (void *)CS47L24 }, > {}, > }; > EXPORT_SYMBOL_GPL(arizona_of_match); > @@ -919,6 +930,23 @@ static const struct mfd_cell wm5110_devs[] = { > }, > }; > > +static const char * const cs47l24_supplies[] = { > + "MICVDD", > + "CPVDD", > + "SPKVDD", > +}; > + > +static const struct mfd_cell cs47l24_devs[] = { > + { .name = "arizona-gpio" }, > + { .name = "arizona-haptics" }, > + { .name = "arizona-pwm" }, > + { > + .name = "cs47l24-codec", > + .parent_supplies = cs47l24_supplies, > + .num_parent_supplies = ARRAY_SIZE(cs47l24_supplies), > + }, > +}; > + > static const char * const wm8997_supplies[] = { > "MICVDD", > "DBVDD2", > @@ -963,7 +991,7 @@ static const struct mfd_cell wm8998_devs[] = { > int arizona_dev_init(struct arizona *arizona) > { > struct device *dev = arizona->dev; > - const char *type_name; > + const char *type_name = NULL; > unsigned int reg, val, mask; > int (*apply_patch)(struct arizona *) = NULL; > const struct mfd_cell *subdevs = NULL; > @@ -987,6 +1015,8 @@ int arizona_dev_init(struct arizona *arizona) > case WM8997: > case WM8998: > case WM1814: > + case WM1831: > + case CS47L24: > for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++) > arizona->core_supplies[i].supply > = wm5102_core_supplies[i]; > @@ -1001,11 +1031,18 @@ int arizona_dev_init(struct arizona *arizona) > /* Mark DCVDD as external, LDO1 driver will clear if internal */ > arizona->external_dcvdd = true; > > - ret = mfd_add_devices(arizona->dev, -1, early_devs, > - ARRAY_SIZE(early_devs), NULL, 0, NULL); > - if (ret != 0) { > - dev_err(dev, "Failed to add early children: %d\n", ret); > - return ret; > + switch (arizona->type) { > + case WM1831: > + case CS47L24: > + break; /* No LDO1 regulator */ > + default: > + ret = mfd_add_devices(arizona->dev, -1, early_devs, > + ARRAY_SIZE(early_devs), NULL, 0, NULL); > + if (ret != 0) { > + dev_err(dev, "Failed to add early children: %d\n", ret); > + return ret; > + } > + break; > } > > ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies, > @@ -1069,6 +1106,7 @@ int arizona_dev_init(struct arizona *arizona) > case 0x5102: > case 0x5110: > case 0x6349: > + case 0x6363: > case 0x8997: > break; > default: > @@ -1167,6 +1205,30 @@ int arizona_dev_init(struct arizona *arizona) > n_subdevs = ARRAY_SIZE(wm5110_devs); > } > break; > + case 0x6363: > + if (IS_ENABLED(CONFIG_MFD_CS47L24)) { > + switch (arizona->type) { > + case CS47L24: > + type_name = "CS47L24"; > + break; > + > + case WM1831: > + type_name = "WM1831"; > + break; > + > + default: > + dev_warn(arizona->dev, > + "CS47L24 registered as %d\n", > + arizona->type); > + arizona->type = CS47L24; > + break; > + } > + > + apply_patch = cs47l24_patch; > + subdevs = cs47l24_devs; > + n_subdevs = ARRAY_SIZE(cs47l24_devs); > + } > + break; > case 0x8997: > if (IS_ENABLED(CONFIG_MFD_WM8997)) { > type_name = "WM8997"; > diff --git a/drivers/mfd/arizona-irq.c b/drivers/mfd/arizona-irq.c > index 3d425e9..682bc86 100644 > --- a/drivers/mfd/arizona-irq.c > +++ b/drivers/mfd/arizona-irq.c > @@ -30,11 +30,13 @@ static int arizona_map_irq(struct arizona *arizona, int irq) > { > int ret; > > - ret = regmap_irq_get_virq(arizona->aod_irq_chip, irq); > - if (ret < 0) > - ret = regmap_irq_get_virq(arizona->irq_chip, irq); > + if (arizona->aod_irq_chip) { > + ret = regmap_irq_get_virq(arizona->aod_irq_chip, irq); > + if (ret >= 0) > + return ret; > + } > > - return ret; > + return regmap_irq_get_virq(arizona->irq_chip, irq); > } > > int arizona_request_irq(struct arizona *arizona, int irq, char *name, > @@ -107,8 +109,8 @@ static irqreturn_t arizona_irq_thread(int irq, void *data) > do { > poll = false; > > - /* Always handle the AoD domain */ > - handle_nested_irq(irq_find_mapping(arizona->virq, 0)); > + if (arizona->aod_irq_chip) > + handle_nested_irq(irq_find_mapping(arizona->virq, 0)); > > /* > * Check if one of the main interrupts is asserted and only > @@ -219,6 +221,15 @@ int arizona_irq_init(struct arizona *arizona) > arizona->ctrlif_error = false; > break; > #endif > +#ifdef CONFIG_MFD_CS47L24 > + case WM1831: > + case CS47L24: > + aod = NULL; > + irq = &cs47l24_irq; > + > + arizona->ctrlif_error = false; > + break; > +#endif > #ifdef CONFIG_MFD_WM8997 > case WM8997: > aod = &wm8997_aod; > @@ -291,13 +302,16 @@ int arizona_irq_init(struct arizona *arizona) > goto err; > } > > - ret = regmap_add_irq_chip(arizona->regmap, > - irq_create_mapping(arizona->virq, 0), > - IRQF_ONESHOT, 0, aod, > - &arizona->aod_irq_chip); > - if (ret != 0) { > - dev_err(arizona->dev, "Failed to add AOD IRQs: %d\n", ret); > - goto err_domain; > + if (aod) { > + ret = regmap_add_irq_chip(arizona->regmap, > + irq_create_mapping(arizona->virq, 0), > + IRQF_ONESHOT, 0, aod, > + &arizona->aod_irq_chip); > + if (ret != 0) { > + dev_err(arizona->dev, > + "Failed to add AOD IRQs: %d\n", ret); > + goto err_domain; > + } > } > > ret = regmap_add_irq_chip(arizona->regmap, > diff --git a/drivers/mfd/arizona-spi.c b/drivers/mfd/arizona-spi.c > index 8cffb1c..b006771 100644 > --- a/drivers/mfd/arizona-spi.c > +++ b/drivers/mfd/arizona-spi.c > @@ -46,6 +46,11 @@ static int arizona_spi_probe(struct spi_device *spi) > if (IS_ENABLED(CONFIG_MFD_WM5110)) > regmap_config = &wm5110_spi_regmap; > break; > + case WM1831: > + case CS47L24: > + if (IS_ENABLED(CONFIG_MFD_CS47L24)) > + regmap_config = &cs47l24_spi_regmap; > + break; > default: > dev_err(&spi->dev, "Unknown device type %ld\n", type); > return -EINVAL; > @@ -89,6 +94,8 @@ static const struct spi_device_id arizona_spi_ids[] = { > { "wm5102", WM5102 }, > { "wm5110", WM5110 }, > { "wm8280", WM8280 }, > + { "wm1831", WM1831 }, > + { "cs47l24", CS47L24 }, > { }, > }; > MODULE_DEVICE_TABLE(spi, arizona_spi_ids); > diff --git a/drivers/mfd/arizona.h b/drivers/mfd/arizona.h > index 3af12e9..198e9ce 100644 > --- a/drivers/mfd/arizona.h > +++ b/drivers/mfd/arizona.h > @@ -25,6 +25,8 @@ extern const struct regmap_config wm5102_spi_regmap; > extern const struct regmap_config wm5110_i2c_regmap; > extern const struct regmap_config wm5110_spi_regmap; > > +extern const struct regmap_config cs47l24_spi_regmap; > + > extern const struct regmap_config wm8997_i2c_regmap; > > extern const struct regmap_config wm8998_i2c_regmap; > @@ -40,6 +42,8 @@ extern const struct regmap_irq_chip wm5110_aod; > extern const struct regmap_irq_chip wm5110_irq; > extern const struct regmap_irq_chip wm5110_revd_irq; > > +extern const struct regmap_irq_chip cs47l24_irq; > + > extern const struct regmap_irq_chip wm8997_aod; > extern const struct regmap_irq_chip wm8997_irq; > > diff --git a/drivers/mfd/cs47l24-tables.c b/drivers/mfd/cs47l24-tables.c > new file mode 100644 > index 0000000..8708006 > --- /dev/null > +++ b/drivers/mfd/cs47l24-tables.c > @@ -0,0 +1,1629 @@ > +/* > + * Data tables for CS47L24 codec > + * > + * Copyright 2015 Cirrus Logic, Inc. > + * > + * Author: Richard Fitzgerald <rf(a)opensource.wolfsonmicro.com> > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + */ > + > +#include <linux/module.h> > + > +#include <linux/mfd/arizona/core.h> > +#include <linux/mfd/arizona/registers.h> > +#include <linux/device.h> > + > +#include "arizona.h" > + > +#define CS47L24_NUM_ISR 5 > + > +static const struct reg_sequence cs47l24_reva_patch[] = { > + { 0x80, 0x3 }, > + { 0x27C, 0x0010 }, > + { 0x221, 0x0070 }, > + { 0x80, 0x0 }, > +}; > + > +int cs47l24_patch(struct arizona *arizona) > +{ > + return regmap_register_patch(arizona->regmap, > + cs47l24_reva_patch, > + ARRAY_SIZE(cs47l24_reva_patch)); > +} > +EXPORT_SYMBOL_GPL(cs47l24_patch); > + > +static const struct regmap_irq cs47l24_irqs[ARIZONA_NUM_IRQ] = { > + [ARIZONA_IRQ_GP2] = { .reg_offset = 0, .mask = ARIZONA_GP2_EINT1 }, > + [ARIZONA_IRQ_GP1] = { .reg_offset = 0, .mask = ARIZONA_GP1_EINT1 }, > + > + [ARIZONA_IRQ_DSP3_RAM_RDY] = { > + .reg_offset = 1, .mask = ARIZONA_DSP3_RAM_RDY_EINT1 > + }, > + [ARIZONA_IRQ_DSP2_RAM_RDY] = { > + .reg_offset = 1, .mask = ARIZONA_DSP2_RAM_RDY_EINT1 > + }, > + [ARIZONA_IRQ_DSP_IRQ8] = { > + .reg_offset = 1, .mask = ARIZONA_DSP_IRQ8_EINT1 > + }, > + [ARIZONA_IRQ_DSP_IRQ7] = { > + .reg_offset = 1, .mask = ARIZONA_DSP_IRQ7_EINT1 > + }, > + [ARIZONA_IRQ_DSP_IRQ6] = { > + .reg_offset = 1, .mask = ARIZONA_DSP_IRQ6_EINT1 > + }, > + [ARIZONA_IRQ_DSP_IRQ5] = { > + .reg_offset = 1, .mask = ARIZONA_DSP_IRQ5_EINT1 > + }, > + [ARIZONA_IRQ_DSP_IRQ4] = { > + .reg_offset = 1, .mask = ARIZONA_DSP_IRQ4_EINT1 > + }, > + [ARIZONA_IRQ_DSP_IRQ3] = { > + .reg_offset = 1, .mask = ARIZONA_DSP_IRQ3_EINT1 > + }, > + [ARIZONA_IRQ_DSP_IRQ2] = { > + .reg_offset = 1, .mask = ARIZONA_DSP_IRQ2_EINT1 > + }, > + [ARIZONA_IRQ_DSP_IRQ1] = { > + .reg_offset = 1, .mask = ARIZONA_DSP_IRQ1_EINT1 > + }, > + > + [ARIZONA_IRQ_SPK_OVERHEAT_WARN] = { > + .reg_offset = 2, .mask = ARIZONA_SPK_OVERHEAT_WARN_EINT1 > + }, > + [ARIZONA_IRQ_SPK_OVERHEAT] = { > + .reg_offset = 2, .mask = ARIZONA_SPK_OVERHEAT_EINT1 > + }, > + [ARIZONA_IRQ_WSEQ_DONE] = { > + .reg_offset = 2, .mask = ARIZONA_WSEQ_DONE_EINT1 > + }, > + [ARIZONA_IRQ_DRC2_SIG_DET] = { > + .reg_offset = 2, .mask = ARIZONA_DRC2_SIG_DET_EINT1 > + }, > + [ARIZONA_IRQ_DRC1_SIG_DET] = { > + .reg_offset = 2, .mask = ARIZONA_DRC1_SIG_DET_EINT1 > + }, > + [ARIZONA_IRQ_ASRC2_LOCK] = { > + .reg_offset = 2, .mask = ARIZONA_ASRC2_LOCK_EINT1 > + }, > + [ARIZONA_IRQ_ASRC1_LOCK] = { > + .reg_offset = 2, .mask = ARIZONA_ASRC1_LOCK_EINT1 > + }, > + [ARIZONA_IRQ_UNDERCLOCKED] = { > + .reg_offset = 2, .mask = ARIZONA_UNDERCLOCKED_EINT1 > + }, > + [ARIZONA_IRQ_OVERCLOCKED] = { > + .reg_offset = 2, .mask = ARIZONA_OVERCLOCKED_EINT1 > + }, > + [ARIZONA_IRQ_FLL2_LOCK] = { > + .reg_offset = 2, .mask = ARIZONA_FLL2_LOCK_EINT1 > + }, > + [ARIZONA_IRQ_FLL1_LOCK] = { > + .reg_offset = 2, .mask = ARIZONA_FLL1_LOCK_EINT1 > + }, > + [ARIZONA_IRQ_CLKGEN_ERR] = { > + .reg_offset = 2, .mask = ARIZONA_CLKGEN_ERR_EINT1 > + }, > + [ARIZONA_IRQ_CLKGEN_ERR_ASYNC] = { > + .reg_offset = 2, .mask = ARIZONA_CLKGEN_ERR_ASYNC_EINT1 > + }, > + > + [ARIZONA_IRQ_CTRLIF_ERR] = { > + .reg_offset = 3, .mask = ARIZONA_V2_CTRLIF_ERR_EINT1 > + }, > + [ARIZONA_IRQ_MIXER_DROPPED_SAMPLES] = { > + .reg_offset = 3, .mask = ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT1 > + }, > + [ARIZONA_IRQ_ASYNC_CLK_ENA_LOW] = { > + .reg_offset = 3, .mask = ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT1 > + }, > + [ARIZONA_IRQ_SYSCLK_ENA_LOW] = { > + .reg_offset = 3, .mask = ARIZONA_V2_SYSCLK_ENA_LOW_EINT1 > + }, > + [ARIZONA_IRQ_ISRC1_CFG_ERR] = { > + .reg_offset = 3, .mask = ARIZONA_V2_ISRC1_CFG_ERR_EINT1 > + }, > + [ARIZONA_IRQ_ISRC2_CFG_ERR] = { > + .reg_offset = 3, .mask = ARIZONA_V2_ISRC2_CFG_ERR_EINT1 > + }, > + [ARIZONA_IRQ_ISRC3_CFG_ERR] = { > + .reg_offset = 3, .mask = ARIZONA_V2_ISRC3_CFG_ERR_EINT1 > + }, > + [ARIZONA_IRQ_HP1R_DONE] = { > + .reg_offset = 3, .mask = ARIZONA_HP1R_DONE_EINT1 > + }, > + [ARIZONA_IRQ_HP1L_DONE] = { > + .reg_offset = 3, .mask = ARIZONA_HP1L_DONE_EINT1 > + }, > + > + [ARIZONA_IRQ_BOOT_DONE] = { > + .reg_offset = 4, .mask = ARIZONA_BOOT_DONE_EINT1 > + }, > + [ARIZONA_IRQ_ASRC_CFG_ERR] = { > + .reg_offset = 4, .mask = ARIZONA_V2_ASRC_CFG_ERR_EINT1 > + }, > + [ARIZONA_IRQ_FLL2_CLOCK_OK] = { > + .reg_offset = 4, .mask = ARIZONA_FLL2_CLOCK_OK_EINT1 > + }, > + [ARIZONA_IRQ_FLL1_CLOCK_OK] = { > + .reg_offset = 4, .mask = ARIZONA_FLL1_CLOCK_OK_EINT1 > + }, > + > + [ARIZONA_IRQ_DSP_SHARED_WR_COLL] = { > + .reg_offset = 5, .mask = ARIZONA_DSP_SHARED_WR_COLL_EINT1 > + }, > + [ARIZONA_IRQ_SPK_SHUTDOWN] = { > + .reg_offset = 5, .mask = ARIZONA_SPK_SHUTDOWN_EINT1 > + }, > + [ARIZONA_IRQ_SPK1R_SHORT] = { > + .reg_offset = 5, .mask = ARIZONA_SPK1R_SHORT_EINT1 > + }, > + [ARIZONA_IRQ_SPK1L_SHORT] = { > + .reg_offset = 5, .mask = ARIZONA_SPK1L_SHORT_EINT1 > + }, > + [ARIZONA_IRQ_HP1R_SC_POS] = { > + .reg_offset = 5, .mask = ARIZONA_HP1R_SC_POS_EINT1 > + }, > + [ARIZONA_IRQ_HP1L_SC_POS] = { > + .reg_offset = 5, .mask = ARIZONA_HP1L_SC_POS_EINT1 > + }, > +}; > + > +const struct regmap_irq_chip cs47l24_irq = { > + .name = "cs47l24 IRQ", > + .status_base = ARIZONA_INTERRUPT_STATUS_1, > + .mask_base = ARIZONA_INTERRUPT_STATUS_1_MASK, > + .ack_base = ARIZONA_INTERRUPT_STATUS_1, > + .num_regs = 6, > + .irqs = cs47l24_irqs, > + .num_irqs = ARRAY_SIZE(cs47l24_irqs), > +}; > +EXPORT_SYMBOL_GPL(cs47l24_irq); > + > +static const struct reg_default cs47l24_reg_default[] = { > + { 0x00000008, 0x0019 }, /* R8 - Ctrl IF SPI CFG 1 */ > + { 0x00000020, 0x0000 }, /* R32 - Tone Generator 1 */ > + { 0x00000021, 0x1000 }, /* R33 - Tone Generator 2 */ > + { 0x00000022, 0x0000 }, /* R34 - Tone Generator 3 */ > + { 0x00000023, 0x1000 }, /* R35 - Tone Generator 4 */ > + { 0x00000024, 0x0000 }, /* R36 - Tone Generator 5 */ > + { 0x00000030, 0x0000 }, /* R48 - PWM Drive 1 */ > + { 0x00000031, 0x0100 }, /* R49 - PWM Drive 2 */ > + { 0x00000032, 0x0100 }, /* R50 - PWM Drive 3 */ > + { 0x00000041, 0x0000 }, /* R65 - Sequence control */ > + { 0x00000061, 0x01FF }, /* R97 - Sample Rate Sequence Select 1 */ > + { 0x00000062, 0x01FF }, /* R98 - Sample Rate Sequence Select 2 */ > + { 0x00000063, 0x01FF }, /* R99 - Sample Rate Sequence Select 3 */ > + { 0x00000064, 0x01FF }, /* R100 - Sample Rate Sequence Select 4 */ > + { 0x00000070, 0x0000 }, /* R112 - Comfort Noise Generator */ > + { 0x00000090, 0x0000 }, /* R144 - Haptics Control 1 */ > + { 0x00000091, 0x7FFF }, /* R145 - Haptics Control 2 */ > + { 0x00000092, 0x0000 }, /* R146 - Haptics phase 1 intensity */ > + { 0x00000093, 0x0000 }, /* R147 - Haptics phase 1 duration */ > + { 0x00000094, 0x0000 }, /* R148 - Haptics phase 2 intensity */ > + { 0x00000095, 0x0000 }, /* R149 - Haptics phase 2 duration */ > + { 0x00000096, 0x0000 }, /* R150 - Haptics phase 3 intensity */ > + { 0x00000097, 0x0000 }, /* R151 - Haptics phase 3 duration */ > + { 0x00000100, 0x0002 }, /* R256 - Clock 32k 1 */ > + { 0x00000101, 0x0504 }, /* R257 - System Clock 1 */ > + { 0x00000102, 0x0011 }, /* R258 - Sample rate 1 */ > + { 0x00000103, 0x0011 }, /* R259 - Sample rate 2 */ > + { 0x00000104, 0x0011 }, /* R260 - Sample rate 3 */ > + { 0x00000112, 0x0305 }, /* R274 - Async clock 1 */ > + { 0x00000113, 0x0011 }, /* R275 - Async sample rate 1 */ > + { 0x00000114, 0x0011 }, /* R276 - Async sample rate 2 */ > + { 0x00000149, 0x0000 }, /* R329 - Output system clock */ > + { 0x0000014A, 0x0000 }, /* R330 - Output async clock */ > + { 0x00000152, 0x0000 }, /* R338 - Rate Estimator 1 */ > + { 0x00000153, 0x0000 }, /* R339 - Rate Estimator 2 */ > + { 0x00000154, 0x0000 }, /* R340 - Rate Estimator 3 */ > + { 0x00000155, 0x0000 }, /* R341 - Rate Estimator 4 */ > + { 0x00000156, 0x0000 }, /* R342 - Rate Estimator 5 */ > + { 0x00000171, 0x0002 }, /* R369 - FLL1 Control 1 */ > + { 0x00000172, 0x0008 }, /* R370 - FLL1 Control 2 */ > + { 0x00000173, 0x0018 }, /* R371 - FLL1 Control 3 */ > + { 0x00000174, 0x007D }, /* R372 - FLL1 Control 4 */ > + { 0x00000175, 0x0006 }, /* R373 - FLL1 Control 5 */ > + { 0x00000176, 0x0000 }, /* R374 - FLL1 Control 6 */ > + { 0x00000177, 0x0281 }, /* R375 - FLL1 Loop Filter Test 1 */ > + { 0x00000178, 0x0000 }, /* R376 - FLL1 NCO Test 0 */ > + { 0x00000179, 0x0000 }, /* R376 - FLL1 Control 7 */ > + { 0x00000181, 0x0000 }, /* R385 - FLL1 Synchroniser 1 */ > + { 0x00000182, 0x0000 }, /* R386 - FLL1 Synchroniser 2 */ > + { 0x00000183, 0x0000 }, /* R387 - FLL1 Synchroniser 3 */ > + { 0x00000184, 0x0000 }, /* R388 - FLL1 Synchroniser 4 */ > + { 0x00000185, 0x0000 }, /* R389 - FLL1 Synchroniser 5 */ > + { 0x00000186, 0x0000 }, /* R390 - FLL1 Synchroniser 6 */ > + { 0x00000187, 0x0001 }, /* R390 - FLL1 Synchroniser 7 */ > + { 0x00000189, 0x0000 }, /* R393 - FLL1 Spread Spectrum */ > + { 0x0000018A, 0x000C }, /* R394 - FLL1 GPIO Clock */ > + { 0x00000191, 0x0002 }, /* R401 - FLL2 Control 1 */ > + { 0x00000192, 0x0008 }, /* R402 - FLL2 Control 2 */ > + { 0x00000193, 0x0018 }, /* R403 - FLL2 Control 3 */ > + { 0x00000194, 0x007D }, /* R404 - FLL2 Control 4 */ > + { 0x00000195, 0x000C }, /* R405 - FLL2 Control 5 */ > + { 0x00000196, 0x0000 }, /* R406 - FLL2 Control 6 */ > + { 0x00000197, 0x0000 }, /* R407 - FLL2 Loop Filter Test 1 */ > + { 0x00000198, 0x0000 }, /* R408 - FLL2 NCO Test 0 */ > + { 0x00000199, 0x0000 }, /* R408 - FLL2 Control 7 */ > + { 0x000001A1, 0x0000 }, /* R417 - FLL2 Synchroniser 1 */ > + { 0x000001A2, 0x0000 }, /* R418 - FLL2 Synchroniser 2 */ > + { 0x000001A3, 0x0000 }, /* R419 - FLL2 Synchroniser 3 */ > + { 0x000001A4, 0x0000 }, /* R420 - FLL2 Synchroniser 4 */ > + { 0x000001A5, 0x0000 }, /* R421 - FLL2 Synchroniser 5 */ > + { 0x000001A6, 0x0000 }, /* R422 - FLL2 Synchroniser 6 */ > + { 0x000001A7, 0x0001 }, /* R422 - FLL2 Synchroniser 7 */ > + { 0x000001A9, 0x0000 }, /* R425 - FLL2 Spread Spectrum */ > + { 0x000001AA, 0x000C }, /* R426 - FLL2 GPIO Clock */ > + { 0x00000218, 0x00E6 }, /* R536 - Mic Bias Ctrl 1 */ > + { 0x00000219, 0x00E6 }, /* R537 - Mic Bias Ctrl 2 */ > + { 0x00000300, 0x0000 }, /* R768 - Input Enables */ > + { 0x00000308, 0x0000 }, /* R776 - Input Rate */ > + { 0x00000309, 0x0022 }, /* R777 - Input Volume Ramp */ > + { 0x0000030C, 0x0002 }, /* R780 - HPF Control */ > + { 0x00000310, 0x2000 }, /* R784 - IN1L Control */ > + { 0x00000311, 0x0180 }, /* R785 - ADC Digital Volume 1L */ > + { 0x00000312, 0x0000 }, /* R786 - DMIC1L Control */ > + { 0x00000314, 0x0000 }, /* R788 - IN1R Control */ > + { 0x00000315, 0x0180 }, /* R789 - ADC Digital Volume 1R */ > + { 0x00000316, 0x0000 }, /* R790 - DMIC1R Control */ > + { 0x00000318, 0x2000 }, /* R792 - IN2L Control */ > + { 0x00000319, 0x0180 }, /* R793 - ADC Digital Volume 2L */ > + { 0x0000031A, 0x0000 }, /* R794 - DMIC2L Control */ > + { 0x0000031C, 0x0000 }, /* R796 - IN2R Control */ > + { 0x0000031D, 0x0180 }, /* R797 - ADC Digital Volume 2R */ > + { 0x0000031E, 0x0000 }, /* R798 - DMIC2R Control */ > + { 0x00000400, 0x0000 }, /* R1024 - Output Enables 1 */ > + { 0x00000408, 0x0000 }, /* R1032 - Output Rate 1 */ > + { 0x00000409, 0x0022 }, /* R1033 - Output Volume Ramp */ > + { 0x00000410, 0x0080 }, /* R1040 - Output Path Config 1L */ > + { 0x00000411, 0x0180 }, /* R1041 - DAC Digital Volume 1L */ > + { 0x00000412, 0x0081 }, /* R1042 - DAC Volume Limit 1L */ > + { 0x00000413, 0x0001 }, /* R1043 - Noise Gate Select 1L */ > + { 0x00000415, 0x0180 }, /* R1045 - DAC Digital Volume 1R */ > + { 0x00000416, 0x0081 }, /* R1046 - DAC Volume Limit 1R */ > + { 0x00000417, 0x0002 }, /* R1047 - Noise Gate Select 1R */ > + { 0x00000429, 0x0180 }, /* R1065 - DAC Digital Volume 4L */ > + { 0x0000042A, 0x0081 }, /* R1066 - Out Volume 4L */ > + { 0x0000042B, 0x0040 }, /* R1067 - Noise Gate Select 4L */ > + { 0x00000450, 0x0000 }, /* R1104 - DAC AEC Control 1 */ > + { 0x00000458, 0x0000 }, /* R1112 - Noise Gate Control */ > + { 0x000004A0, 0x3480 }, /* R1184 - HP1 Short Circuit Ctrl */ > + { 0x00000500, 0x000C }, /* R1280 - AIF1 BCLK Ctrl */ > + { 0x00000501, 0x0008 }, /* R1281 - AIF1 Tx Pin Ctrl */ > + { 0x00000502, 0x0000 }, /* R1282 - AIF1 Rx Pin Ctrl */ > + { 0x00000503, 0x0000 }, /* R1283 - AIF1 Rate Ctrl */ > + { 0x00000504, 0x0000 }, /* R1284 - AIF1 Format */ > + { 0x00000506, 0x0040 }, /* R1286 - AIF1 Rx BCLK Rate */ > + { 0x00000507, 0x1818 }, /* R1287 - AIF1 Frame Ctrl 1 */ > + { 0x00000508, 0x1818 }, /* R1288 - AIF1 Frame Ctrl 2 */ > + { 0x00000509, 0x0000 }, /* R1289 - AIF1 Frame Ctrl 3 */ > + { 0x0000050A, 0x0001 }, /* R1290 - AIF1 Frame Ctrl 4 */ > + { 0x0000050B, 0x0002 }, /* R1291 - AIF1 Frame Ctrl 5 */ > + { 0x0000050C, 0x0003 }, /* R1292 - AIF1 Frame Ctrl 6 */ > + { 0x0000050D, 0x0004 }, /* R1293 - AIF1 Frame Ctrl 7 */ > + { 0x0000050E, 0x0005 }, /* R1294 - AIF1 Frame Ctrl 8 */ > + { 0x0000050F, 0x0006 }, /* R1295 - AIF1 Frame Ctrl 9 */ > + { 0x00000510, 0x0007 }, /* R1296 - AIF1 Frame Ctrl 10 */ > + { 0x00000511, 0x0000 }, /* R1297 - AIF1 Frame Ctrl 11 */ > + { 0x00000512, 0x0001 }, /* R1298 - AIF1 Frame Ctrl 12 */ > + { 0x00000513, 0x0002 }, /* R1299 - AIF1 Frame Ctrl 13 */ > + { 0x00000514, 0x0003 }, /* R1300 - AIF1 Frame Ctrl 14 */ > + { 0x00000515, 0x0004 }, /* R1301 - AIF1 Frame Ctrl 15 */ > + { 0x00000516, 0x0005 }, /* R1302 - AIF1 Frame Ctrl 16 */ > + { 0x00000517, 0x0006 }, /* R1303 - AIF1 Frame Ctrl 17 */ > + { 0x00000518, 0x0007 }, /* R1304 - AIF1 Frame Ctrl 18 */ > + { 0x00000519, 0x0000 }, /* R1305 - AIF1 Tx Enables */ > + { 0x0000051A, 0x0000 }, /* R1306 - AIF1 Rx Enables */ > + { 0x00000540, 0x000C }, /* R1344 - AIF2 BCLK Ctrl */ > + { 0x00000541, 0x0008 }, /* R1345 - AIF2 Tx Pin Ctrl */ > + { 0x00000542, 0x0000 }, /* R1346 - AIF2 Rx Pin Ctrl */ > + { 0x00000543, 0x0000 }, /* R1347 - AIF2 Rate Ctrl */ > + { 0x00000544, 0x0000 }, /* R1348 - AIF2 Format */ > + { 0x00000546, 0x0040 }, /* R1350 - AIF2 Rx BCLK Rate */ > + { 0x00000547, 0x1818 }, /* R1351 - AIF2 Frame Ctrl 1 */ > + { 0x00000548, 0x1818 }, /* R1352 - AIF2 Frame Ctrl 2 */ > + { 0x00000549, 0x0000 }, /* R1353 - AIF2 Frame Ctrl 3 */ > + { 0x0000054A, 0x0001 }, /* R1354 - AIF2 Frame Ctrl 4 */ > + { 0x0000054B, 0x0002 }, /* R1355 - AIF2 Frame Ctrl 5 */ > + { 0x0000054C, 0x0003 }, /* R1356 - AIF2 Frame Ctrl 6 */ > + { 0x0000054D, 0x0004 }, /* R1357 - AIF2 Frame Ctrl 7 */ > + { 0x0000054E, 0x0005 }, /* R1358 - AIF2 Frame Ctrl 8 */ > + { 0x00000551, 0x0000 }, /* R1361 - AIF2 Frame Ctrl 11 */ > + { 0x00000552, 0x0001 }, /* R1362 - AIF2 Frame Ctrl 12 */ > + { 0x00000553, 0x0002 }, /* R1363 - AIF2 Frame Ctrl 13 */ > + { 0x00000554, 0x0003 }, /* R1364 - AIF2 Frame Ctrl 14 */ > + { 0x00000555, 0x0004 }, /* R1365 - AIF2 Frame Ctrl 15 */ > + { 0x00000556, 0x0005 }, /* R1366 - AIF2 Frame Ctrl 16 */ > + { 0x00000559, 0x0000 }, /* R1369 - AIF2 Tx Enables */ > + { 0x0000055A, 0x0000 }, /* R1370 - AIF2 Rx Enables */ > + { 0x00000580, 0x000C }, /* R1408 - AIF3 BCLK Ctrl */ > + { 0x00000581, 0x0008 }, /* R1409 - AIF3 Tx Pin Ctrl */ > + { 0x00000582, 0x0000 }, /* R1410 - AIF3 Rx Pin Ctrl */ > + { 0x00000583, 0x0000 }, /* R1411 - AIF3 Rate Ctrl */ > + { 0x00000584, 0x0000 }, /* R1412 - AIF3 Format */ > + { 0x00000586, 0x0040 }, /* R1414 - AIF3 Rx BCLK Rate */ > + { 0x00000587, 0x1818 }, /* R1415 - AIF3 Frame Ctrl 1 */ > + { 0x00000588, 0x1818 }, /* R1416 - AIF3 Frame Ctrl 2 */ > + { 0x00000589, 0x0000 }, /* R1417 - AIF3 Frame Ctrl 3 */ > + { 0x0000058A, 0x0001 }, /* R1418 - AIF3 Frame Ctrl 4 */ > + { 0x00000591, 0x0000 }, /* R1425 - AIF3 Frame Ctrl 11 */ > + { 0x00000592, 0x0001 }, /* R1426 - AIF3 Frame Ctrl 12 */ > + { 0x00000599, 0x0000 }, /* R1433 - AIF3 Tx Enables */ > + { 0x0000059A, 0x0000 }, /* R1434 - AIF3 Rx Enables */ > + { 0x00000640, 0x0000 }, /* R1600 - PWM1MIX Input 1 Source */ > + { 0x00000641, 0x0080 }, /* R1601 - PWM1MIX Input 1 Volume */ > + { 0x00000642, 0x0000 }, /* R1602 - PWM1MIX Input 2 Source */ > + { 0x00000643, 0x0080 }, /* R1603 - PWM1MIX Input 2 Volume */ > + { 0x00000644, 0x0000 }, /* R1604 - PWM1MIX Input 3 Source */ > + { 0x00000645, 0x0080 }, /* R1605 - PWM1MIX Input 3 Volume */ > + { 0x00000646, 0x0000 }, /* R1606 - PWM1MIX Input 4 Source */ > + { 0x00000647, 0x0080 }, /* R1607 - PWM1MIX Input 4 Volume */ > + { 0x00000648, 0x0000 }, /* R1608 - PWM2MIX Input 1 Source */ > + { 0x00000649, 0x0080 }, /* R1609 - PWM2MIX Input 1 Volume */ > + { 0x0000064A, 0x0000 }, /* R1610 - PWM2MIX Input 2 Source */ > + { 0x0000064B, 0x0080 }, /* R1611 - PWM2MIX Input 2 Volume */ > + { 0x0000064C, 0x0000 }, /* R1612 - PWM2MIX Input 3 Source */ > + { 0x0000064D, 0x0080 }, /* R1613 - PWM2MIX Input 3 Volume */ > + { 0x0000064E, 0x0000 }, /* R1614 - PWM2MIX Input 4 Source */ > + { 0x0000064F, 0x0080 }, /* R1615 - PWM2MIX Input 4 Volume */ > + { 0x00000680, 0x0000 }, /* R1664 - OUT1LMIX Input 1 Source */ > + { 0x00000681, 0x0080 }, /* R1665 - OUT1LMIX Input 1 Volume */ > + { 0x00000682, 0x0000 }, /* R1666 - OUT1LMIX Input 2 Source */ > + { 0x00000683, 0x0080 }, /* R1667 - OUT1LMIX Input 2 Volume */ > + { 0x00000684, 0x0000 }, /* R1668 - OUT1LMIX Input 3 Source */ > + { 0x00000685, 0x0080 }, /* R1669 - OUT1LMIX Input 3 Volume */ > + { 0x00000686, 0x0000 }, /* R1670 - OUT1LMIX Input 4 Source */ > + { 0x00000687, 0x0080 }, /* R1671 - OUT1LMIX Input 4 Volume */ > + { 0x00000688, 0x0000 }, /* R1672 - OUT1RMIX Input 1 Source */ > + { 0x00000689, 0x0080 }, /* R1673 - OUT1RMIX Input 1 Volume */ > + { 0x0000068A, 0x0000 }, /* R1674 - OUT1RMIX Input 2 Source */ > + { 0x0000068B, 0x0080 }, /* R1675 - OUT1RMIX Input 2 Volume */ > + { 0x0000068C, 0x0000 }, /* R1676 - OUT1RMIX Input 3 Source */ > + { 0x0000068D, 0x0080 }, /* R1677 - OUT1RMIX Input 3 Volume */ > + { 0x0000068E, 0x0000 }, /* R1678 - OUT1RMIX Input 4 Source */ > + { 0x0000068F, 0x0080 }, /* R1679 - OUT1RMIX Input 4 Volume */ > + { 0x000006B0, 0x0000 }, /* R1712 - OUT4LMIX Input 1 Source */ > + { 0x000006B1, 0x0080 }, /* R1713 - OUT4LMIX Input 1 Volume */ > + { 0x000006B2, 0x0000 }, /* R1714 - OUT4LMIX Input 2 Source */ > + { 0x000006B3, 0x0080 }, /* R1715 - OUT4LMIX Input 2 Volume */ > + { 0x000006B4, 0x0000 }, /* R1716 - OUT4LMIX Input 3 Source */ > + { 0x000006B5, 0x0080 }, /* R1717 - OUT4LMIX Input 3 Volume */ > + { 0x000006B6, 0x0000 }, /* R1718 - OUT4LMIX Input 4 Source */ > + { 0x000006B7, 0x0080 }, /* R1719 - OUT4LMIX Input 4 Volume */ > + { 0x00000700, 0x0000 }, /* R1792 - AIF1TX1MIX Input 1 Source */ > + { 0x00000701, 0x0080 }, /* R1793 - AIF1TX1MIX Input 1 Volume */ > + { 0x00000702, 0x0000 }, /* R1794 - AIF1TX1MIX Input 2 Source */ > + { 0x00000703, 0x0080 }, /* R1795 - AIF1TX1MIX Input 2 Volume */ > + { 0x00000704, 0x0000 }, /* R1796 - AIF1TX1MIX Input 3 Source */ > + { 0x00000705, 0x0080 }, /* R1797 - AIF1TX1MIX Input 3 Volume */ > + { 0x00000706, 0x0000 }, /* R1798 - AIF1TX1MIX Input 4 Source */ > + { 0x00000707, 0x0080 }, /* R1799 - AIF1TX1MIX Input 4 Volume */ > + { 0x00000708, 0x0000 }, /* R1800 - AIF1TX2MIX Input 1 Source */ > + { 0x00000709, 0x0080 }, /* R1801 - AIF1TX2MIX Input 1 Volume */ > + { 0x0000070A, 0x0000 }, /* R1802 - AIF1TX2MIX Input 2 Source */ > + { 0x0000070B, 0x0080 }, /* R1803 - AIF1TX2MIX Input 2 Volume */ > + { 0x0000070C, 0x0000 }, /* R1804 - AIF1TX2MIX Input 3 Source */ > + { 0x0000070D, 0x0080 }, /* R1805 - AIF1TX2MIX Input 3 Volume */ > + { 0x0000070E, 0x0000 }, /* R1806 - AIF1TX2MIX Input 4 Source */ > + { 0x0000070F, 0x0080 }, /* R1807 - AIF1TX2MIX Input 4 Volume */ > + { 0x00000710, 0x0000 }, /* R1808 - AIF1TX3MIX Input 1 Source */ > + { 0x00000711, 0x0080 }, /* R1809 - AIF1TX3MIX Input 1 Volume */ > + { 0x00000712, 0x0000 }, /* R1810 - AIF1TX3MIX Input 2 Source */ > + { 0x00000713, 0x0080 }, /* R1811 - AIF1TX3MIX Input 2 Volume */ > + { 0x00000714, 0x0000 }, /* R1812 - AIF1TX3MIX Input 3 Source */ > + { 0x00000715, 0x0080 }, /* R1813 - AIF1TX3MIX Input 3 Volume */ > + { 0x00000716, 0x0000 }, /* R1814 - AIF1TX3MIX Input 4 Source */ > + { 0x00000717, 0x0080 }, /* R1815 - AIF1TX3MIX Input 4 Volume */ > + { 0x00000718, 0x0000 }, /* R1816 - AIF1TX4MIX Input 1 Source */ > + { 0x00000719, 0x0080 }, /* R1817 - AIF1TX4MIX Input 1 Volume */ > + { 0x0000071A, 0x0000 }, /* R1818 - AIF1TX4MIX Input 2 Source */ > + { 0x0000071B, 0x0080 }, /* R1819 - AIF1TX4MIX Input 2 Volume */ > + { 0x0000071C, 0x0000 }, /* R1820 - AIF1TX4MIX Input 3 Source */ > + { 0x0000071D, 0x0080 }, /* R1821 - AIF1TX4MIX Input 3 Volume */ > + { 0x0000071E, 0x0000 }, /* R1822 - AIF1TX4MIX Input 4 Source */ > + { 0x0000071F, 0x0080 }, /* R1823 - AIF1TX4MIX Input 4 Volume */ > + { 0x00000720, 0x0000 }, /* R1824 - AIF1TX5MIX Input 1 Source */ > + { 0x00000721, 0x0080 }, /* R1825 - AIF1TX5MIX Input 1 Volume */ > + { 0x00000722, 0x0000 }, /* R1826 - AIF1TX5MIX Input 2 Source */ > + { 0x00000723, 0x0080 }, /* R1827 - AIF1TX5MIX Input 2 Volume */ > + { 0x00000724, 0x0000 }, /* R1828 - AIF1TX5MIX Input 3 Source */ > + { 0x00000725, 0x0080 }, /* R1829 - AIF1TX5MIX Input 3 Volume */ > + { 0x00000726, 0x0000 }, /* R1830 - AIF1TX5MIX Input 4 Source */ > + { 0x00000727, 0x0080 }, /* R1831 - AIF1TX5MIX Input 4 Volume */ > + { 0x00000728, 0x0000 }, /* R1832 - AIF1TX6MIX Input 1 Source */ > + { 0x00000729, 0x0080 }, /* R1833 - AIF1TX6MIX Input 1 Volume */ > + { 0x0000072A, 0x0000 }, /* R1834 - AIF1TX6MIX Input 2 Source */ > + { 0x0000072B, 0x0080 }, /* R1835 - AIF1TX6MIX Input 2 Volume */ > + { 0x0000072C, 0x0000 }, /* R1836 - AIF1TX6MIX Input 3 Source */ > + { 0x0000072D, 0x0080 }, /* R1837 - AIF1TX6MIX Input 3 Volume */ > + { 0x0000072E, 0x0000 }, /* R1838 - AIF1TX6MIX Input 4 Source */ > + { 0x0000072F, 0x0080 }, /* R1839 - AIF1TX6MIX Input 4 Volume */ > + { 0x00000730, 0x0000 }, /* R1840 - AIF1TX7MIX Input 1 Source */ > + { 0x00000731, 0x0080 }, /* R1841 - AIF1TX7MIX Input 1 Volume */ > + { 0x00000732, 0x0000 }, /* R1842 - AIF1TX7MIX Input 2 Source */ > + { 0x00000733, 0x0080 }, /* R1843 - AIF1TX7MIX Input 2 Volume */ > + { 0x00000734, 0x0000 }, /* R1844 - AIF1TX7MIX Input 3 Source */ > + { 0x00000735, 0x0080 }, /* R1845 - AIF1TX7MIX Input 3 Volume */ > + { 0x00000736, 0x0000 }, /* R1846 - AIF1TX7MIX Input 4 Source */ > + { 0x00000737, 0x0080 }, /* R1847 - AIF1TX7MIX Input 4 Volume */ > + { 0x00000738, 0x0000 }, /* R1848 - AIF1TX8MIX Input 1 Source */ > + { 0x00000739, 0x0080 }, /* R1849 - AIF1TX8MIX Input 1 Volume */ > + { 0x0000073A, 0x0000 }, /* R1850 - AIF1TX8MIX Input 2 Source */ > + { 0x0000073B, 0x0080 }, /* R1851 - AIF1TX8MIX Input 2 Volume */ > + { 0x0000073C, 0x0000 }, /* R1852 - AIF1TX8MIX Input 3 Source */ > + { 0x0000073D, 0x0080 }, /* R1853 - AIF1TX8MIX Input 3 Volume */ > + { 0x0000073E, 0x0000 }, /* R1854 - AIF1TX8MIX Input 4 Source */ > + { 0x0000073F, 0x0080 }, /* R1855 - AIF1TX8MIX Input 4 Volume */ > + { 0x00000740, 0x0000 }, /* R1856 - AIF2TX1MIX Input 1 Source */ > + { 0x00000741, 0x0080 }, /* R1857 - AIF2TX1MIX Input 1 Volume */ > + { 0x00000742, 0x0000 }, /* R1858 - AIF2TX1MIX Input 2 Source */ > + { 0x00000743, 0x0080 }, /* R1859 - AIF2TX1MIX Input 2 Volume */ > + { 0x00000744, 0x0000 }, /* R1860 - AIF2TX1MIX Input 3 Source */ > + { 0x00000745, 0x0080 }, /* R1861 - AIF2TX1MIX Input 3 Volume */ > + { 0x00000746, 0x0000 }, /* R1862 - AIF2TX1MIX Input 4 Source */ > + { 0x00000747, 0x0080 }, /* R1863 - AIF2TX1MIX Input 4 Volume */ > + { 0x00000748, 0x0000 }, /* R1864 - AIF2TX2MIX Input 1 Source */ > + { 0x00000749, 0x0080 }, /* R1865 - AIF2TX2MIX Input 1 Volume */ > + { 0x0000074A, 0x0000 }, /* R1866 - AIF2TX2MIX Input 2 Source */ > + { 0x0000074B, 0x0080 }, /* R1867 - AIF2TX2MIX Input 2 Volume */ > + { 0x0000074C, 0x0000 }, /* R1868 - AIF2TX2MIX Input 3 Source */ > + { 0x0000074D, 0x0080 }, /* R1869 - AIF2TX2MIX Input 3 Volume */ > + { 0x0000074E, 0x0000 }, /* R1870 - AIF2TX2MIX Input 4 Source */ > + { 0x0000074F, 0x0080 }, /* R1871 - AIF2TX2MIX Input 4 Volume */ > + { 0x00000750, 0x0000 }, /* R1872 - AIF2TX3MIX Input 1 Source */ > + { 0x00000751, 0x0080 }, /* R1873 - AIF2TX3MIX Input 1 Volume */ > + { 0x00000752, 0x0000 }, /* R1874 - AIF2TX3MIX Input 2 Source */ > + { 0x00000753, 0x0080 }, /* R1875 - AIF2TX3MIX Input 2 Volume */ > + { 0x00000754, 0x0000 }, /* R1876 - AIF2TX3MIX Input 3 Source */ > + { 0x00000755, 0x0080 }, /* R1877 - AIF2TX3MIX Input 3 Volume */ > + { 0x00000756, 0x0000 }, /* R1878 - AIF2TX3MIX Input 4 Source */ > + { 0x00000757, 0x0080 }, /* R1879 - AIF2TX3MIX Input 4 Volume */ > + { 0x00000758, 0x0000 }, /* R1880 - AIF2TX4MIX Input 1 Source */ > + { 0x00000759, 0x0080 }, /* R1881 - AIF2TX4MIX Input 1 Volume */ > + { 0x0000075A, 0x0000 }, /* R1882 - AIF2TX4MIX Input 2 Source */ > + { 0x0000075B, 0x0080 }, /* R1883 - AIF2TX4MIX Input 2 Volume */ > + { 0x0000075C, 0x0000 }, /* R1884 - AIF2TX4MIX Input 3 Source */ > + { 0x0000075D, 0x0080 }, /* R1885 - AIF2TX4MIX Input 3 Volume */ > + { 0x0000075E, 0x0000 }, /* R1886 - AIF2TX4MIX Input 4 Source */ > + { 0x0000075F, 0x0080 }, /* R1887 - AIF2TX4MIX Input 4 Volume */ > + { 0x00000760, 0x0000 }, /* R1888 - AIF2TX5MIX Input 1 Source */ > + { 0x00000761, 0x0080 }, /* R1889 - AIF2TX5MIX Input 1 Volume */ > + { 0x00000762, 0x0000 }, /* R1890 - AIF2TX5MIX Input 2 Source */ > + { 0x00000763, 0x0080 }, /* R1891 - AIF2TX5MIX Input 2 Volume */ > + { 0x00000764, 0x0000 }, /* R1892 - AIF2TX5MIX Input 3 Source */ > + { 0x00000765, 0x0080 }, /* R1893 - AIF2TX5MIX Input 3 Volume */ > + { 0x00000766, 0x0000 }, /* R1894 - AIF2TX5MIX Input 4 Source */ > + { 0x00000767, 0x0080 }, /* R1895 - AIF2TX5MIX Input 4 Volume */ > + { 0x00000768, 0x0000 }, /* R1896 - AIF2TX6MIX Input 1 Source */ > + { 0x00000769, 0x0080 }, /* R1897 - AIF2TX6MIX Input 1 Volume */ > + { 0x0000076A, 0x0000 }, /* R1898 - AIF2TX6MIX Input 2 Source */ > + { 0x0000076B, 0x0080 }, /* R1899 - AIF2TX6MIX Input 2 Volume */ > + { 0x0000076C, 0x0000 }, /* R1900 - AIF2TX6MIX Input 3 Source */ > + { 0x0000076D, 0x0080 }, /* R1901 - AIF2TX6MIX Input 3 Volume */ > + { 0x0000076E, 0x0000 }, /* R1902 - AIF2TX6MIX Input 4 Source */ > + { 0x0000076F, 0x0080 }, /* R1903 - AIF2TX6MIX Input 4 Volume */ > + { 0x00000780, 0x0000 }, /* R1920 - AIF3TX1MIX Input 1 Source */ > + { 0x00000781, 0x0080 }, /* R1921 - AIF3TX1MIX Input 1 Volume */ > + { 0x00000782, 0x0000 }, /* R1922 - AIF3TX1MIX Input 2 Source */ > + { 0x00000783, 0x0080 }, /* R1923 - AIF3TX1MIX Input 2 Volume */ > + { 0x00000784, 0x0000 }, /* R1924 - AIF3TX1MIX Input 3 Source */ > + { 0x00000785, 0x0080 }, /* R1925 - AIF3TX1MIX Input 3 Volume */ > + { 0x00000786, 0x0000 }, /* R1926 - AIF3TX1MIX Input 4 Source */ > + { 0x00000787, 0x0080 }, /* R1927 - AIF3TX1MIX Input 4 Volume */ > + { 0x00000788, 0x0000 }, /* R1928 - AIF3TX2MIX Input 1 Source */ > + { 0x00000789, 0x0080 }, /* R1929 - AIF3TX2MIX Input 1 Volume */ > + { 0x0000078A, 0x0000 }, /* R1930 - AIF3TX2MIX Input 2 Source */ > + { 0x0000078B, 0x0080 }, /* R1931 - AIF3TX2MIX Input 2 Volume */ > + { 0x0000078C, 0x0000 }, /* R1932 - AIF3TX2MIX Input 3 Source */ > + { 0x0000078D, 0x0080 }, /* R1933 - AIF3TX2MIX Input 3 Volume */ > + { 0x0000078E, 0x0000 }, /* R1934 - AIF3TX2MIX Input 4 Source */ > + { 0x0000078F, 0x0080 }, /* R1935 - AIF3TX2MIX Input 4 Volume */ > + { 0x00000880, 0x0000 }, /* R2176 - EQ1MIX Input 1 Source */ > + { 0x00000881, 0x0080 }, /* R2177 - EQ1MIX Input 1 Volume */ > + { 0x00000882, 0x0000 }, /* R2178 - EQ1MIX Input 2 Source */ > + { 0x00000883, 0x0080 }, /* R2179 - EQ1MIX Input 2 Volume */ > + { 0x00000884, 0x0000 }, /* R2180 - EQ1MIX Input 3 Source */ > + { 0x00000885, 0x0080 }, /* R2181 - EQ1MIX Input 3 Volume */ > + { 0x00000886, 0x0000 }, /* R2182 - EQ1MIX Input 4 Source */ > + { 0x00000887, 0x0080 }, /* R2183 - EQ1MIX Input 4 Volume */ > + { 0x00000888, 0x0000 }, /* R2184 - EQ2MIX Input 1 Source */ > + { 0x00000889, 0x0080 }, /* R2185 - EQ2MIX Input 1 Volume */ > + { 0x0000088A, 0x0000 }, /* R2186 - EQ2MIX Input 2 Source */ > + { 0x0000088B, 0x0080 }, /* R2187 - EQ2MIX Input 2 Volume */ > + { 0x0000088C, 0x0000 }, /* R2188 - EQ2MIX Input 3 Source */ > + { 0x0000088D, 0x0080 }, /* R2189 - EQ2MIX Input 3 Volume */ > + { 0x0000088E, 0x0000 }, /* R2190 - EQ2MIX Input 4 Source */ > + { 0x0000088F, 0x0080 }, /* R2191 - EQ2MIX Input 4 Volume */ > + { 0x000008C0, 0x0000 }, /* R2240 - DRC1LMIX Input 1 Source */ > + { 0x000008C1, 0x0080 }, /* R2241 - DRC1LMIX Input 1 Volume */ > + { 0x000008C2, 0x0000 }, /* R2242 - DRC1LMIX Input 2 Source */ > + { 0x000008C3, 0x0080 }, /* R2243 - DRC1LMIX Input 2 Volume */ > + { 0x000008C4, 0x0000 }, /* R2244 - DRC1LMIX Input 3 Source */ > + { 0x000008C5, 0x0080 }, /* R2245 - DRC1LMIX Input 3 Volume */ > + { 0x000008C6, 0x0000 }, /* R2246 - DRC1LMIX Input 4 Source */ > + { 0x000008C7, 0x0080 }, /* R2247 - DRC1LMIX Input 4 Volume */ > + { 0x000008C8, 0x0000 }, /* R2248 - DRC1RMIX Input 1 Source */ > + { 0x000008C9, 0x0080 }, /* R2249 - DRC1RMIX Input 1 Volume */ > + { 0x000008CA, 0x0000 }, /* R2250 - DRC1RMIX Input 2 Source */ > + { 0x000008CB, 0x0080 }, /* R2251 - DRC1RMIX Input 2 Volume */ > + { 0x000008CC, 0x0000 }, /* R2252 - DRC1RMIX Input 3 Source */ > + { 0x000008CD, 0x0080 }, /* R2253 - DRC1RMIX Input 3 Volume */ > + { 0x000008CE, 0x0000 }, /* R2254 - DRC1RMIX Input 4 Source */ > + { 0x000008CF, 0x0080 }, /* R2255 - DRC1RMIX Input 4 Volume */ > + { 0x000008D0, 0x0000 }, /* R2256 - DRC2LMIX Input 1 Source */ > + { 0x000008D1, 0x0080 }, /* R2257 - DRC2LMIX Input 1 Volume */ > + { 0x000008D2, 0x0000 }, /* R2258 - DRC2LMIX Input 2 Source */ > + { 0x000008D3, 0x0080 }, /* R2259 - DRC2LMIX Input 2 Volume */ > + { 0x000008D4, 0x0000 }, /* R2260 - DRC2LMIX Input 3 Source */ > + { 0x000008D5, 0x0080 }, /* R2261 - DRC2LMIX Input 3 Volume */ > + { 0x000008D6, 0x0000 }, /* R2262 - DRC2LMIX Input 4 Source */ > + { 0x000008D7, 0x0080 }, /* R2263 - DRC2LMIX Input 4 Volume */ > + { 0x000008D8, 0x0000 }, /* R2264 - DRC2RMIX Input 1 Source */ > + { 0x000008D9, 0x0080 }, /* R2265 - DRC2RMIX Input 1 Volume */ > + { 0x000008DA, 0x0000 }, /* R2266 - DRC2RMIX Input 2 Source */ > + { 0x000008DB, 0x0080 }, /* R2267 - DRC2RMIX Input 2 Volume */ > + { 0x000008DC, 0x0000 }, /* R2268 - DRC2RMIX Input 3 Source */ > + { 0x000008DD, 0x0080 }, /* R2269 - DRC2RMIX Input 3 Volume */ > + { 0x000008DE, 0x0000 }, /* R2270 - DRC2RMIX Input 4 Source */ > + { 0x000008DF, 0x0080 }, /* R2271 - DRC2RMIX Input 4 Volume */ > + { 0x00000900, 0x0000 }, /* R2304 - HPLP1MIX Input 1 Source */ > + { 0x00000901, 0x0080 }, /* R2305 - HPLP1MIX Input 1 Volume */ > + { 0x00000902, 0x0000 }, /* R2306 - HPLP1MIX Input 2 Source */ > + { 0x00000903, 0x0080 }, /* R2307 - HPLP1MIX Input 2 Volume */ > + { 0x00000904, 0x0000 }, /* R2308 - HPLP1MIX Input 3 Source */ > + { 0x00000905, 0x0080 }, /* R2309 - HPLP1MIX Input 3 Volume */ > + { 0x00000906, 0x0000 }, /* R2310 - HPLP1MIX Input 4 Source */ > + { 0x00000907, 0x0080 }, /* R2311 - HPLP1MIX Input 4 Volume */ > + { 0x00000908, 0x0000 }, /* R2312 - HPLP2MIX Input 1 Source */ > + { 0x00000909, 0x0080 }, /* R2313 - HPLP2MIX Input 1 Volume */ > + { 0x0000090A, 0x0000 }, /* R2314 - HPLP2MIX Input 2 Source */ > + { 0x0000090B, 0x0080 }, /* R2315 - HPLP2MIX Input 2 Volume */ > + { 0x0000090C, 0x0000 }, /* R2316 - HPLP2MIX Input 3 Source */ > + { 0x0000090D, 0x0080 }, /* R2317 - HPLP2MIX Input 3 Volume */ > + { 0x0000090E, 0x0000 }, /* R2318 - HPLP2MIX Input 4 Source */ > + { 0x0000090F, 0x0080 }, /* R2319 - HPLP2MIX Input 4 Volume */ > + { 0x00000910, 0x0000 }, /* R2320 - HPLP3MIX Input 1 Source */ > + { 0x00000911, 0x0080 }, /* R2321 - HPLP3MIX Input 1 Volume */ > + { 0x00000912, 0x0000 }, /* R2322 - HPLP3MIX Input 2 Source */ > + { 0x00000913, 0x0080 }, /* R2323 - HPLP3MIX Input 2 Volume */ > + { 0x00000914, 0x0000 }, /* R2324 - HPLP3MIX Input 3 Source */ > + { 0x00000915, 0x0080 }, /* R2325 - HPLP3MIX Input 3 Volume */ > + { 0x00000916, 0x0000 }, /* R2326 - HPLP3MIX Input 4 Source */ > + { 0x00000917, 0x0080 }, /* R2327 - HPLP3MIX Input 4 Volume */ > + { 0x00000918, 0x0000 }, /* R2328 - HPLP4MIX Input 1 Source */ > + { 0x00000919, 0x0080 }, /* R2329 - HPLP4MIX Input 1 Volume */ > + { 0x0000091A, 0x0000 }, /* R2330 - HPLP4MIX Input 2 Source */ > + { 0x0000091B, 0x0080 }, /* R2331 - HPLP4MIX Input 2 Volume */ > + { 0x0000091C, 0x0000 }, /* R2332 - HPLP4MIX Input 3 Source */ > + { 0x0000091D, 0x0080 }, /* R2333 - HPLP4MIX Input 3 Volume */ > + { 0x0000091E, 0x0000 }, /* R2334 - HPLP4MIX Input 4 Source */ > + { 0x0000091F, 0x0080 }, /* R2335 - HPLP4MIX Input 4 Volume */ > + { 0x00000980, 0x0000 }, /* R2432 - DSP2LMIX Input 1 Source */ > + { 0x00000981, 0x0080 }, /* R2433 - DSP2LMIX Input 1 Volume */ > + { 0x00000982, 0x0000 }, /* R2434 - DSP2LMIX Input 2 Source */ > + { 0x00000983, 0x0080 }, /* R2435 - DSP2LMIX Input 2 Volume */ > + { 0x00000984, 0x0000 }, /* R2436 - DSP2LMIX Input 3 Source */ > + { 0x00000985, 0x0080 }, /* R2437 - DSP2LMIX Input 3 Volume */ > + { 0x00000986, 0x0000 }, /* R2438 - DSP2LMIX Input 4 Source */ > + { 0x00000987, 0x0080 }, /* R2439 - DSP2LMIX Input 4 Volume */ > + { 0x00000988, 0x0000 }, /* R2440 - DSP2RMIX Input 1 Source */ > + { 0x00000989, 0x0080 }, /* R2441 - DSP2RMIX Input 1 Volume */ > + { 0x0000098A, 0x0000 }, /* R2442 - DSP2RMIX Input 2 Source */ > + { 0x0000098B, 0x0080 }, /* R2443 - DSP2RMIX Input 2 Volume */ > + { 0x0000098C, 0x0000 }, /* R2444 - DSP2RMIX Input 3 Source */ > + { 0x0000098D, 0x0080 }, /* R2445 - DSP2RMIX Input 3 Volume */ > + { 0x0000098E, 0x0000 }, /* R2446 - DSP2RMIX Input 4 Source */ > + { 0x0000098F, 0x0080 }, /* R2447 - DSP2RMIX Input 4 Volume */ > + { 0x00000990, 0x0000 }, /* R2448 - DSP2AUX1MIX Input 1 Source */ > + { 0x00000998, 0x0000 }, /* R2456 - DSP2AUX2MIX Input 1 Source */ > + { 0x000009A0, 0x0000 }, /* R2464 - DSP2AUX3MIX Input 1 Source */ > + { 0x000009A8, 0x0000 }, /* R2472 - DSP2AUX4MIX Input 1 Source */ > + { 0x000009B0, 0x0000 }, /* R2480 - DSP2AUX5MIX Input 1 Source */ > + { 0x000009B8, 0x0000 }, /* R2488 - DSP2AUX6MIX Input 1 Source */ > + { 0x000009C0, 0x0000 }, /* R2496 - DSP3LMIX Input 1 Source */ > + { 0x000009C1, 0x0080 }, /* R2497 - DSP3LMIX Input 1 Volume */ > + { 0x000009C2, 0x0000 }, /* R2498 - DSP3LMIX Input 2 Source */ > + { 0x000009C3, 0x0080 }, /* R2499 - DSP3LMIX Input 2 Volume */ > + { 0x000009C4, 0x0000 }, /* R2500 - DSP3LMIX Input 3 Source */ > + { 0x000009C5, 0x0080 }, /* R2501 - DSP3LMIX Input 3 Volume */ > + { 0x000009C6, 0x0000 }, /* R2502 - DSP3LMIX Input 4 Source */ > + { 0x000009C7, 0x0080 }, /* R2503 - DSP3LMIX Input 4 Volume */ > + { 0x000009C8, 0x0000 }, /* R2504 - DSP3RMIX Input 1 Source */ > + { 0x000009C9, 0x0080 }, /* R2505 - DSP3RMIX Input 1 Volume */ > + { 0x000009CA, 0x0000 }, /* R2506 - DSP3RMIX Input 2 Source */ > + { 0x000009CB, 0x0080 }, /* R2507 - DSP3RMIX Input 2 Volume */ > + { 0x000009CC, 0x0000 }, /* R2508 - DSP3RMIX Input 3 Source */ > + { 0x000009CD, 0x0080 }, /* R2509 - DSP3RMIX Input 3 Volume */ > + { 0x000009CE, 0x0000 }, /* R2510 - DSP3RMIX Input 4 Source */ > + { 0x000009CF, 0x0080 }, /* R2511 - DSP3RMIX Input 4 Volume */ > + { 0x000009D0, 0x0000 }, /* R2512 - DSP3AUX1MIX Input 1 Source */ > + { 0x000009D8, 0x0000 }, /* R2520 - DSP3AUX2MIX Input 1 Source */ > + { 0x000009E0, 0x0000 }, /* R2528 - DSP3AUX3MIX Input 1 Source */ > + { 0x000009E8, 0x0000 }, /* R2536 - DSP3AUX4MIX Input 1 Source */ > + { 0x000009F0, 0x0000 }, /* R2544 - DSP3AUX5MIX Input 1 Source */ > + { 0x000009F8, 0x0000 }, /* R2552 - DSP3AUX6MIX Input 1 Source */ > + { 0x00000A80, 0x0000 }, /* R2688 - ASRC1LMIX Input 1 Source */ > + { 0x00000A88, 0x0000 }, /* R2696 - ASRC1RMIX Input 1 Source */ > + { 0x00000A90, 0x0000 }, /* R2704 - ASRC2LMIX Input 1 Source */ > + { 0x00000A98, 0x0000 }, /* R2712 - ASRC2RMIX Input 1 Source */ > + { 0x00000B00, 0x0000 }, /* R2816 - ISRC1DEC1MIX Input 1 Source */ > + { 0x00000B08, 0x0000 }, /* R2824 - ISRC1DEC2MIX Input 1 Source */ > + { 0x00000B10, 0x0000 }, /* R2832 - ISRC1DEC3MIX Input 1 Source */ > + { 0x00000B18, 0x0000 }, /* R2840 - ISRC1DEC4MIX Input 1 Source */ > + { 0x00000B20, 0x0000 }, /* R2848 - ISRC1INT1MIX Input 1 Source */ > + { 0x00000B28, 0x0000 }, /* R2856 - ISRC1INT2MIX Input 1 Source */ > + { 0x00000B30, 0x0000 }, /* R2864 - ISRC1INT3MIX Input 1 Source */ > + { 0x00000B38, 0x0000 }, /* R2872 - ISRC1INT4MIX Input 1 Source */ > + { 0x00000B40, 0x0000 }, /* R2880 - ISRC2DEC1MIX Input 1 Source */ > + { 0x00000B48, 0x0000 }, /* R2888 - ISRC2DEC2MIX Input 1 Source */ > + { 0x00000B50, 0x0000 }, /* R2896 - ISRC2DEC3MIX Input 1 Source */ > + { 0x00000B58, 0x0000 }, /* R2904 - ISRC2DEC4MIX Input 1 Source */ > + { 0x00000B60, 0x0000 }, /* R2912 - ISRC2INT1MIX Input 1 Source */ > + { 0x00000B68, 0x0000 }, /* R2920 - ISRC2INT2MIX Input 1 Source */ > + { 0x00000B70, 0x0000 }, /* R2928 - ISRC2INT3MIX Input 1 Source */ > + { 0x00000B78, 0x0000 }, /* R2936 - ISRC2INT4MIX Input 1 Source */ > + { 0x00000B80, 0x0000 }, /* R2944 - ISRC3DEC1MIX Input 1 Source */ > + { 0x00000B88, 0x0000 }, /* R2952 - ISRC3DEC2MIX Input 1 Source */ > + { 0x00000B90, 0x0000 }, /* R2960 - ISRC3DEC3MIX Input 1 Source */ > + { 0x00000B98, 0x0000 }, /* R2968 - ISRC3DEC4MIX Input 1 Source */ > + { 0x00000BA0, 0x0000 }, /* R2976 - ISRC3INT1MIX Input 1 Source */ > + { 0x00000BA8, 0x0000 }, /* R2984 - ISRC3INT2MIX Input 1 Source */ > + { 0x00000BB0, 0x0000 }, /* R2992 - ISRC3INT3MIX Input 1 Source */ > + { 0x00000BB8, 0x0000 }, /* R3000 - ISRC3INT4MIX Input 1 Source */ > + { 0x00000C00, 0xA101 }, /* R3072 - GPIO1 CTRL */ > + { 0x00000C01, 0xA101 }, /* R3073 - GPIO2 CTRL */ > + { 0x00000C0F, 0x0400 }, /* R3087 - IRQ CTRL 1 */ > + { 0x00000C10, 0x1000 }, /* R3088 - GPIO Debounce Config */ > + { 0x00000C20, 0x0002 }, /* R3104 - Misc Pad Ctrl 1 */ > + { 0x00000C21, 0x8001 }, /* R3105 - Misc Pad Ctrl 2 */ > + { 0x00000C22, 0x0000 }, /* R3106 - Misc Pad Ctrl 3 */ > + { 0x00000C23, 0x0000 }, /* R3107 - Misc Pad Ctrl 4 */ > + { 0x00000C24, 0x0000 }, /* R3108 - Misc Pad Ctrl 5 */ > + { 0x00000C25, 0x0000 }, /* R3109 - Misc Pad Ctrl 6 */ > + { 0x00000C30, 0x0404 }, /* R3120 - Misc Pad Ctrl 7 */ > + { 0x00000C32, 0x0404 }, /* R3122 - Misc Pad Ctrl 9 */ > + { 0x00000C33, 0x0404 }, /* R3123 - Misc Pad Ctrl 10 */ > + { 0x00000C34, 0x0404 }, /* R3124 - Misc Pad Ctrl 11 */ > + { 0x00000C35, 0x0404 }, /* R3125 - Misc Pad Ctrl 12 */ > + { 0x00000C36, 0x0400 }, /* R3126 - Misc Pad Ctrl 13 */ > + { 0x00000C37, 0x0404 }, /* R3127 - Misc Pad Ctrl 14 */ > + { 0x00000C39, 0x0400 }, /* R3129 - Misc Pad Ctrl 16 */ > + { 0x00000D08, 0x0007 }, /* R3336 - Interrupt Status 1 Mask */ > + { 0x00000D09, 0x06FF }, /* R3337 - Interrupt Status 2 Mask */ > + { 0x00000D0A, 0xCFEF }, /* R3338 - Interrupt Status 3 Mask */ > + { 0x00000D0B, 0xFFC3 }, /* R3339 - Interrupt Status 4 Mask */ > + { 0x00000D0C, 0x000B }, /* R3340 - Interrupt Status 5 Mask */ > + { 0x00000D0D, 0xD005 }, /* R3341 - Interrupt Status 6 Mask */ > + { 0x00000D0F, 0x0000 }, /* R3343 - Interrupt Control */ > + { 0x00000D18, 0x0007 }, /* R3352 - IRQ2 Status 1 Mask */ > + { 0x00000D19, 0x06FF }, /* R3353 - IRQ2 Status 2 Mask */ > + { 0x00000D1A, 0xCFEF }, /* R3354 - IRQ2 Status 3 Mask */ > + { 0x00000D1B, 0xFFC3 }, /* R3355 - IRQ2 Status 4 Mask */ > + { 0x00000D1C, 0x000B }, /* R3356 - IRQ2 Status 5 Mask */ > + { 0x00000D1D, 0xD005 }, /* R3357 - IRQ2 Status 6 Mask */ > + { 0x00000D1F, 0x0000 }, /* R3359 - IRQ2 Control */ > + { 0x00000E00, 0x0000 }, /* R3584 - FX_Ctrl1 */ > + { 0x00000E10, 0x6318 }, /* R3600 - EQ1_1 */ > + { 0x00000E11, 0x6300 }, /* R3601 - EQ1_2 */ > + { 0x00000E12, 0x0FC8 }, /* R3602 - EQ1_3 */ > + { 0x00000E13, 0x03FE }, /* R3603 - EQ1_4 */ > + { 0x00000E14, 0x00E0 }, /* R3604 - EQ1_5 */ > + { 0x00000E15, 0x1EC4 }, /* R3605 - EQ1_6 */ > + { 0x00000E16, 0xF136 }, /* R3606 - EQ1_7 */ > + { 0x00000E17, 0x0409 }, /* R3607 - EQ1_8 */ > + { 0x00000E18, 0x04CC }, /* R3608 - EQ1_9 */ > + { 0x00000E19, 0x1C9B }, /* R3609 - EQ1_10 */ > + { 0x00000E1A, 0xF337 }, /* R3610 - EQ1_11 */ > + { 0x00000E1B, 0x040B }, /* R3611 - EQ1_12 */ > + { 0x00000E1C, 0x0CBB }, /* R3612 - EQ1_13 */ > + { 0x00000E1D, 0x16F8 }, /* R3613 - EQ1_14 */ > + { 0x00000E1E, 0xF7D9 }, /* R3614 - EQ1_15 */ > + { 0x00000E1F, 0x040A }, /* R3615 - EQ1_16 */ > + { 0x00000E20, 0x1F14 }, /* R3616 - EQ1_17 */ > + { 0x00000E21, 0x058C }, /* R3617 - EQ1_18 */ > + { 0x00000E22, 0x0563 }, /* R3618 - EQ1_19 */ > + { 0x00000E23, 0x4000 }, /* R3619 - EQ1_20 */ > + { 0x00000E24, 0x0B75 }, /* R3620 - EQ1_21 */ > + { 0x00000E26, 0x6318 }, /* R3622 - EQ2_1 */ > + { 0x00000E27, 0x6300 }, /* R3623 - EQ2_2 */ > + { 0x00000E28, 0x0FC8 }, /* R3624 - EQ2_3 */ > + { 0x00000E29, 0x03FE }, /* R3625 - EQ2_4 */ > + { 0x00000E2A, 0x00E0 }, /* R3626 - EQ2_5 */ > + { 0x00000E2B, 0x1EC4 }, /* R3627 - EQ2_6 */ > + { 0x00000E2C, 0xF136 }, /* R3628 - EQ2_7 */ > + { 0x00000E2D, 0x0409 }, /* R3629 - EQ2_8 */ > + { 0x00000E2E, 0x04CC }, /* R3630 - EQ2_9 */ > + { 0x00000E2F, 0x1C9B }, /* R3631 - EQ2_10 */ > + { 0x00000E30, 0xF337 }, /* R3632 - EQ2_11 */ > + { 0x00000E31, 0x040B }, /* R3633 - EQ2_12 */ > + { 0x00000E32, 0x0CBB }, /* R3634 - EQ2_13 */ > + { 0x00000E33, 0x16F8 }, /* R3635 - EQ2_14 */ > + { 0x00000E34, 0xF7D9 }, /* R3636 - EQ2_15 */ > + { 0x00000E35, 0x040A }, /* R3637 - EQ2_16 */ > + { 0x00000E36, 0x1F14 }, /* R3638 - EQ2_17 */ > + { 0x00000E37, 0x058C }, /* R3639 - EQ2_18 */ > + { 0x00000E38, 0x0563 }, /* R3640 - EQ2_19 */ > + { 0x00000E39, 0x4000 }, /* R3641 - EQ2_20 */ > + { 0x00000E3A, 0x0B75 }, /* R3642 - EQ2_21 */ > + { 0x00000E80, 0x0018 }, /* R3712 - DRC1 ctrl1 */ > + { 0x00000E81, 0x0933 }, /* R3713 - DRC1 ctrl2 */ > + { 0x00000E82, 0x0018 }, /* R3714 - DRC1 ctrl3 */ > + { 0x00000E83, 0x0000 }, /* R3715 - DRC1 ctrl4 */ > + { 0x00000E84, 0x0000 }, /* R3716 - DRC1 ctrl5 */ > + { 0x00000E89, 0x0018 }, /* R3721 - DRC2 ctrl1 */ > + { 0x00000E8A, 0x0933 }, /* R3722 - DRC2 ctrl2 */ > + { 0x00000E8B, 0x0018 }, /* R3723 - DRC2 ctrl3 */ > + { 0x00000E8C, 0x0000 }, /* R3724 - DRC2 ctrl4 */ > + { 0x00000E8D, 0x0000 }, /* R3725 - DRC2 ctrl5 */ > + { 0x00000EC0, 0x0000 }, /* R3776 - HPLPF1_1 */ > + { 0x00000EC1, 0x0000 }, /* R3777 - HPLPF1_2 */ > + { 0x00000EC4, 0x0000 }, /* R3780 - HPLPF2_1 */ > + { 0x00000EC5, 0x0000 }, /* R3781 - HPLPF2_2 */ > + { 0x00000EC8, 0x0000 }, /* R3784 - HPLPF3_1 */ > + { 0x00000EC9, 0x0000 }, /* R3785 - HPLPF3_2 */ > + { 0x00000ECC, 0x0000 }, /* R3788 - HPLPF4_1 */ > + { 0x00000ECD, 0x0000 }, /* R3789 - HPLPF4_2 */ > + { 0x00000EE0, 0x0000 }, /* R3808 - ASRC_ENABLE */ > + { 0x00000EE2, 0x0000 }, /* R3810 - ASRC_RATE1 */ > + { 0x00000EE3, 0x4000 }, /* R3811 - ASRC_RATE2 */ > + { 0x00000EF0, 0x0000 }, /* R3824 - ISRC 1 CTRL 1 */ > + { 0x00000EF1, 0x0000 }, /* R3825 - ISRC 1 CTRL 2 */ > + { 0x00000EF2, 0x0000 }, /* R3826 - ISRC 1 CTRL 3 */ > + { 0x00000EF3, 0x0000 }, /* R3827 - ISRC 2 CTRL 1 */ > + { 0x00000EF4, 0x0000 }, /* R3828 - ISRC 2 CTRL 2 */ > + { 0x00000EF5, 0x0000 }, /* R3829 - ISRC 2 CTRL 3 */ > + { 0x00000EF6, 0x0000 }, /* R3830 - ISRC 3 CTRL 1 */ > + { 0x00000EF7, 0x0000 }, /* R3831 - ISRC 3 CTRL 2 */ > + { 0x00000EF8, 0x0000 }, /* R3832 - ISRC 3 CTRL 3 */ > + { 0x00001200, 0x0010 }, /* R4608 - DSP2 Control 1 */ > + { 0x00001300, 0x0010 }, /* R4864 - DSP3 Control 1 */ > +}; > + > +static bool cs47l24_is_adsp_memory(unsigned int reg) > +{ > + switch (reg) { > + case 0x200000 ... 0x205fff: /* DSP2 PM */ > + case 0x280000 ... 0x281fff: /* DSP2 ZM */ > + case 0x290000 ... 0x2a7fff: /* DSP2 XM */ > + case 0x2a8000 ... 0x2b3fff: /* DSP2 YM */ > + case 0x300000 ... 0x308fff: /* DSP3 PM */ > + case 0x380000 ... 0x381fff: /* DSP3 ZM */ > + case 0x390000 ... 0x3a7fff: /* DSP3 XM */ > + case 0x3a8000 ... 0x3b3fff: /* DSP3 YM */ > + return true; > + default: > + return false; > + } > +} > + > +static bool cs47l24_readable_register(struct device *dev, unsigned int reg) > +{ > + switch (reg) { > + case ARIZONA_SOFTWARE_RESET: > + case ARIZONA_DEVICE_REVISION: > + case ARIZONA_CTRL_IF_SPI_CFG_1: > + case ARIZONA_WRITE_SEQUENCER_CTRL_0: > + case ARIZONA_WRITE_SEQUENCER_CTRL_1: > + case ARIZONA_WRITE_SEQUENCER_CTRL_2: > + case ARIZONA_TONE_GENERATOR_1: > + case ARIZONA_TONE_GENERATOR_2: > + case ARIZONA_TONE_GENERATOR_3: > + case ARIZONA_TONE_GENERATOR_4: > + case ARIZONA_TONE_GENERATOR_5: > + case ARIZONA_PWM_DRIVE_1: > + case ARIZONA_PWM_DRIVE_2: > + case ARIZONA_PWM_DRIVE_3: > + case ARIZONA_SEQUENCE_CONTROL: > + case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_1: > + case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_2: > + case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_3: > + case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_4: > + case ARIZONA_COMFORT_NOISE_GENERATOR: > + case ARIZONA_HAPTICS_CONTROL_1: > + case ARIZONA_HAPTICS_CONTROL_2: > + case ARIZONA_HAPTICS_PHASE_1_INTENSITY: > + case ARIZONA_HAPTICS_PHASE_1_DURATION: > + case ARIZONA_HAPTICS_PHASE_2_INTENSITY: > + case ARIZONA_HAPTICS_PHASE_2_DURATION: > + case ARIZONA_HAPTICS_PHASE_3_INTENSITY: > + case ARIZONA_HAPTICS_PHASE_3_DURATION: > + case ARIZONA_HAPTICS_STATUS: > + case ARIZONA_CLOCK_32K_1: > + case ARIZONA_SYSTEM_CLOCK_1: > + case ARIZONA_SAMPLE_RATE_1: > + case ARIZONA_SAMPLE_RATE_2: > + case ARIZONA_SAMPLE_RATE_3: > + case ARIZONA_SAMPLE_RATE_1_STATUS: > + case ARIZONA_SAMPLE_RATE_2_STATUS: > + case ARIZONA_SAMPLE_RATE_3_STATUS: > + case ARIZONA_ASYNC_CLOCK_1: > + case ARIZONA_ASYNC_SAMPLE_RATE_1: > + case ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS: > + case ARIZONA_ASYNC_SAMPLE_RATE_2: > + case ARIZONA_ASYNC_SAMPLE_RATE_2_STATUS: > + case ARIZONA_OUTPUT_SYSTEM_CLOCK: > + case ARIZONA_OUTPUT_ASYNC_CLOCK: > + case ARIZONA_RATE_ESTIMATOR_1: > + case ARIZONA_RATE_ESTIMATOR_2: > + case ARIZONA_RATE_ESTIMATOR_3: > + case ARIZONA_RATE_ESTIMATOR_4: > + case ARIZONA_RATE_ESTIMATOR_5: > + case ARIZONA_FLL1_CONTROL_1: > + case ARIZONA_FLL1_CONTROL_2: > + case ARIZONA_FLL1_CONTROL_3: > + case ARIZONA_FLL1_CONTROL_4: > + case ARIZONA_FLL1_CONTROL_5: > + case ARIZONA_FLL1_CONTROL_6: > + case ARIZONA_FLL1_CONTROL_7: > + case ARIZONA_FLL1_LOOP_FILTER_TEST_1: > + case ARIZONA_FLL1_NCO_TEST_0: > + case ARIZONA_FLL1_SYNCHRONISER_1: > + case ARIZONA_FLL1_SYNCHRONISER_2: > + case ARIZONA_FLL1_SYNCHRONISER_3: > + case ARIZONA_FLL1_SYNCHRONISER_4: > + case ARIZONA_FLL1_SYNCHRONISER_5: > + case ARIZONA_FLL1_SYNCHRONISER_6: > + case ARIZONA_FLL1_SYNCHRONISER_7: > + case ARIZONA_FLL1_SPREAD_SPECTRUM: > + case ARIZONA_FLL1_GPIO_CLOCK: > + case ARIZONA_FLL2_CONTROL_1: > + case ARIZONA_FLL2_CONTROL_2: > + case ARIZONA_FLL2_CONTROL_3: > + case ARIZONA_FLL2_CONTROL_4: > + case ARIZONA_FLL2_CONTROL_5: > + case ARIZONA_FLL2_CONTROL_6: > + case ARIZONA_FLL2_CONTROL_7: > + case ARIZONA_FLL2_LOOP_FILTER_TEST_1: > + case ARIZONA_FLL2_NCO_TEST_0: > + case ARIZONA_FLL2_SYNCHRONISER_1: > + case ARIZONA_FLL2_SYNCHRONISER_2: > + case ARIZONA_FLL2_SYNCHRONISER_3: > + case ARIZONA_FLL2_SYNCHRONISER_4: > + case ARIZONA_FLL2_SYNCHRONISER_5: > + case ARIZONA_FLL2_SYNCHRONISER_6: > + case ARIZONA_FLL2_SYNCHRONISER_7: > + case ARIZONA_FLL2_SPREAD_SPECTRUM: > + case ARIZONA_FLL2_GPIO_CLOCK: > + case ARIZONA_MIC_BIAS_CTRL_1: > + case ARIZONA_MIC_BIAS_CTRL_2: > + case ARIZONA_HP_CTRL_1L: > + case ARIZONA_HP_CTRL_1R: > + case ARIZONA_INPUT_ENABLES: > + case ARIZONA_INPUT_ENABLES_STATUS: > + case ARIZONA_INPUT_RATE: > + case ARIZONA_INPUT_VOLUME_RAMP: > + case ARIZONA_HPF_CONTROL: > + case ARIZONA_IN1L_CONTROL: > + case ARIZONA_ADC_DIGITAL_VOLUME_1L: > + case ARIZONA_DMIC1L_CONTROL: > + case ARIZONA_IN1R_CONTROL: > + case ARIZONA_ADC_DIGITAL_VOLUME_1R: > + case ARIZONA_DMIC1R_CONTROL: > + case ARIZONA_IN2L_CONTROL: > + case ARIZONA_ADC_DIGITAL_VOLUME_2L: > + case ARIZONA_DMIC2L_CONTROL: > + case ARIZONA_IN2R_CONTROL: > + case ARIZONA_ADC_DIGITAL_VOLUME_2R: > + case ARIZONA_DMIC2R_CONTROL: > + case ARIZONA_OUTPUT_ENABLES_1: > + case ARIZONA_OUTPUT_STATUS_1: > + case ARIZONA_RAW_OUTPUT_STATUS_1: > + case ARIZONA_OUTPUT_RATE_1: > + case ARIZONA_OUTPUT_VOLUME_RAMP: > + case ARIZONA_OUTPUT_PATH_CONFIG_1L: > + case ARIZONA_DAC_DIGITAL_VOLUME_1L: > + case ARIZONA_DAC_VOLUME_LIMIT_1L: > + case ARIZONA_NOISE_GATE_SELECT_1L: > + case ARIZONA_DAC_DIGITAL_VOLUME_1R: > + case ARIZONA_DAC_VOLUME_LIMIT_1R: > + case ARIZONA_NOISE_GATE_SELECT_1R: > + case ARIZONA_DAC_DIGITAL_VOLUME_4L: > + case ARIZONA_OUT_VOLUME_4L: > + case ARIZONA_NOISE_GATE_SELECT_4L: > + case ARIZONA_DAC_AEC_CONTROL_1: > + case ARIZONA_NOISE_GATE_CONTROL: > + case ARIZONA_HP1_SHORT_CIRCUIT_CTRL: > + case ARIZONA_AIF1_BCLK_CTRL: > + case ARIZONA_AIF1_TX_PIN_CTRL: > + case ARIZONA_AIF1_RX_PIN_CTRL: > + case ARIZONA_AIF1_RATE_CTRL: > + case ARIZONA_AIF1_FORMAT: > + case ARIZONA_AIF1_RX_BCLK_RATE: > + case ARIZONA_AIF1_FRAME_CTRL_1: > + case ARIZONA_AIF1_FRAME_CTRL_2: > + case ARIZONA_AIF1_FRAME_CTRL_3: > + case ARIZONA_AIF1_FRAME_CTRL_4: > + case ARIZONA_AIF1_FRAME_CTRL_5: > + case ARIZONA_AIF1_FRAME_CTRL_6: > + case ARIZONA_AIF1_FRAME_CTRL_7: > + case ARIZONA_AIF1_FRAME_CTRL_8: > + case ARIZONA_AIF1_FRAME_CTRL_9: > + case ARIZONA_AIF1_FRAME_CTRL_10: > + case ARIZONA_AIF1_FRAME_CTRL_11: > + case ARIZONA_AIF1_FRAME_CTRL_12: > + case ARIZONA_AIF1_FRAME_CTRL_13: > + case ARIZONA_AIF1_FRAME_CTRL_14: > + case ARIZONA_AIF1_FRAME_CTRL_15: > + case ARIZONA_AIF1_FRAME_CTRL_16: > + case ARIZONA_AIF1_FRAME_CTRL_17: > + case ARIZONA_AIF1_FRAME_CTRL_18: > + case ARIZONA_AIF1_TX_ENABLES: > + case ARIZONA_AIF1_RX_ENABLES: > + case ARIZONA_AIF2_BCLK_CTRL: > + case ARIZONA_AIF2_TX_PIN_CTRL: > + case ARIZONA_AIF2_RX_PIN_CTRL: > + case ARIZONA_AIF2_RATE_CTRL: > + case ARIZONA_AIF2_FORMAT: > + case ARIZONA_AIF2_RX_BCLK_RATE: > + case ARIZONA_AIF2_FRAME_CTRL_1: > + case ARIZONA_AIF2_FRAME_CTRL_2: > + case ARIZONA_AIF2_FRAME_CTRL_3: > + case ARIZONA_AIF2_FRAME_CTRL_4: > + case ARIZONA_AIF2_FRAME_CTRL_5: > + case ARIZONA_AIF2_FRAME_CTRL_6: > + case ARIZONA_AIF2_FRAME_CTRL_7: > + case ARIZONA_AIF2_FRAME_CTRL_8: > + case ARIZONA_AIF2_FRAME_CTRL_11: > + case ARIZONA_AIF2_FRAME_CTRL_12: > + case ARIZONA_AIF2_FRAME_CTRL_13: > + case ARIZONA_AIF2_FRAME_CTRL_14: > + case ARIZONA_AIF2_FRAME_CTRL_15: > + case ARIZONA_AIF2_FRAME_CTRL_16: > + case ARIZONA_AIF2_TX_ENABLES: > + case ARIZONA_AIF2_RX_ENABLES: > + case ARIZONA_AIF3_BCLK_CTRL: > + case ARIZONA_AIF3_TX_PIN_CTRL: > + case ARIZONA_AIF3_RX_PIN_CTRL: > + case ARIZONA_AIF3_RATE_CTRL: > + case ARIZONA_AIF3_FORMAT: > + case ARIZONA_AIF3_RX_BCLK_RATE: > + case ARIZONA_AIF3_FRAME_CTRL_1: > + case ARIZONA_AIF3_FRAME_CTRL_2: > + case ARIZONA_AIF3_FRAME_CTRL_3: > + case ARIZONA_AIF3_FRAME_CTRL_4: > + case ARIZONA_AIF3_FRAME_CTRL_11: > + case ARIZONA_AIF3_FRAME_CTRL_12: > + case ARIZONA_AIF3_TX_ENABLES: > + case ARIZONA_AIF3_RX_ENABLES: > + case ARIZONA_PWM1MIX_INPUT_1_SOURCE: > + case ARIZONA_PWM1MIX_INPUT_1_VOLUME: > + case ARIZONA_PWM1MIX_INPUT_2_SOURCE: > + case ARIZONA_PWM1MIX_INPUT_2_VOLUME: > + case ARIZONA_PWM1MIX_INPUT_3_SOURCE: > + case ARIZONA_PWM1MIX_INPUT_3_VOLUME: > + case ARIZONA_PWM1MIX_INPUT_4_SOURCE: > + case ARIZONA_PWM1MIX_INPUT_4_VOLUME: > + case ARIZONA_PWM2MIX_INPUT_1_SOURCE: > + case ARIZONA_PWM2MIX_INPUT_1_VOLUME: > + case ARIZONA_PWM2MIX_INPUT_2_SOURCE: > + case ARIZONA_PWM2MIX_INPUT_2_VOLUME: > + case ARIZONA_PWM2MIX_INPUT_3_SOURCE: > + case ARIZONA_PWM2MIX_INPUT_3_VOLUME: > + case ARIZONA_PWM2MIX_INPUT_4_SOURCE: > + case ARIZONA_PWM2MIX_INPUT_4_VOLUME: > + case ARIZONA_OUT1LMIX_INPUT_1_SOURCE: > + case ARIZONA_OUT1LMIX_INPUT_1_VOLUME: > + case ARIZONA_OUT1LMIX_INPUT_2_SOURCE: > + case ARIZONA_OUT1LMIX_INPUT_2_VOLUME: > + case ARIZONA_OUT1LMIX_INPUT_3_SOURCE: > + case ARIZONA_OUT1LMIX_INPUT_3_VOLUME: > + case ARIZONA_OUT1LMIX_INPUT_4_SOURCE: > + case ARIZONA_OUT1LMIX_INPUT_4_VOLUME: > + case ARIZONA_OUT1RMIX_INPUT_1_SOURCE: > + case ARIZONA_OUT1RMIX_INPUT_1_VOLUME: > + case ARIZONA_OUT1RMIX_INPUT_2_SOURCE: > + case ARIZONA_OUT1RMIX_INPUT_2_VOLUME: > + case ARIZONA_OUT1RMIX_INPUT_3_SOURCE: > + case ARIZONA_OUT1RMIX_INPUT_3_VOLUME: > + case ARIZONA_OUT1RMIX_INPUT_4_SOURCE: > + case ARIZONA_OUT1RMIX_INPUT_4_VOLUME: > + case ARIZONA_OUT4LMIX_INPUT_1_SOURCE: > + case ARIZONA_OUT4LMIX_INPUT_1_VOLUME: > + case ARIZONA_OUT4LMIX_INPUT_2_SOURCE: > + case ARIZONA_OUT4LMIX_INPUT_2_VOLUME: > + case ARIZONA_OUT4LMIX_INPUT_3_SOURCE: > + case ARIZONA_OUT4LMIX_INPUT_3_VOLUME: > + case ARIZONA_OUT4LMIX_INPUT_4_SOURCE: > + case ARIZONA_OUT4LMIX_INPUT_4_VOLUME: > + case ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE: > + case ARIZONA_AIF1TX1MIX_INPUT_1_VOLUME: > + case ARIZONA_AIF1TX1MIX_INPUT_2_SOURCE: > + case ARIZONA_AIF1TX1MIX_INPUT_2_VOLUME: > + case ARIZONA_AIF1TX1MIX_INPUT_3_SOURCE: > + case ARIZONA_AIF1TX1MIX_INPUT_3_VOLUME: > + case ARIZONA_AIF1TX1MIX_INPUT_4_SOURCE: > + case ARIZONA_AIF1TX1MIX_INPUT_4_VOLUME: > + case ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE: > + case ARIZONA_AIF1TX2MIX_INPUT_1_VOLUME: > + case ARIZONA_AIF1TX2MIX_INPUT_2_SOURCE: > + case ARIZONA_AIF1TX2MIX_INPUT_2_VOLUME: > + case ARIZONA_AIF1TX2MIX_INPUT_3_SOURCE: > + case ARIZONA_AIF1TX2MIX_INPUT_3_VOLUME: > + case ARIZONA_AIF1TX2MIX_INPUT_4_SOURCE: > + case ARIZONA_AIF1TX2MIX_INPUT_4_VOLUME: > + case ARIZONA_AIF1TX3MIX_INPUT_1_SOURCE: > + case ARIZONA_AIF1TX3MIX_INPUT_1_VOLUME: > + case ARIZONA_AIF1TX3MIX_INPUT_2_SOURCE: > + case ARIZONA_AIF1TX3MIX_INPUT_2_VOLUME: > + case ARIZONA_AIF1TX3MIX_INPUT_3_SOURCE: > + case ARIZONA_AIF1TX3MIX_INPUT_3_VOLUME: > + case ARIZONA_AIF1TX3MIX_INPUT_4_SOURCE: > + case ARIZONA_AIF1TX3MIX_INPUT_4_VOLUME: > + case ARIZONA_AIF1TX4MIX_INPUT_1_SOURCE: > + case ARIZONA_AIF1TX4MIX_INPUT_1_VOLUME: > + case ARIZONA_AIF1TX4MIX_INPUT_2_SOURCE: > + case ARIZONA_AIF1TX4MIX_INPUT_2_VOLUME: > + case ARIZONA_AIF1TX4MIX_INPUT_3_SOURCE: > + case ARIZONA_AIF1TX4MIX_INPUT_3_VOLUME: > + case ARIZONA_AIF1TX4MIX_INPUT_4_SOURCE: > + case ARIZONA_AIF1TX4MIX_INPUT_4_VOLUME: > + case ARIZONA_AIF1TX5MIX_INPUT_1_SOURCE: > + case ARIZONA_AIF1TX5MIX_INPUT_1_VOLUME: > + case ARIZONA_AIF1TX5MIX_INPUT_2_SOURCE: > + case ARIZONA_AIF1TX5MIX_INPUT_2_VOLUME: > + case ARIZONA_AIF1TX5MIX_INPUT_3_SOURCE: > + case ARIZONA_AIF1TX5MIX_INPUT_3_VOLUME: > + case ARIZONA_AIF1TX5MIX_INPUT_4_SOURCE: > + case ARIZONA_AIF1TX5MIX_INPUT_4_VOLUME: > + case ARIZONA_AIF1TX6MIX_INPUT_1_SOURCE: > + case ARIZONA_AIF1TX6MIX_INPUT_1_VOLUME: > + case ARIZONA_AIF1TX6MIX_INPUT_2_SOURCE: > + case ARIZONA_AIF1TX6MIX_INPUT_2_VOLUME: > + case ARIZONA_AIF1TX6MIX_INPUT_3_SOURCE: > + case ARIZONA_AIF1TX6MIX_INPUT_3_VOLUME: > + case ARIZONA_AIF1TX6MIX_INPUT_4_SOURCE: > + case ARIZONA_AIF1TX6MIX_INPUT_4_VOLUME: > + case ARIZONA_AIF1TX7MIX_INPUT_1_SOURCE: > + case ARIZONA_AIF1TX7MIX_INPUT_1_VOLUME: > + case ARIZONA_AIF1TX7MIX_INPUT_2_SOURCE: > + case ARIZONA_AIF1TX7MIX_INPUT_2_VOLUME: > + case ARIZONA_AIF1TX7MIX_INPUT_3_SOURCE: > + case ARIZONA_AIF1TX7MIX_INPUT_3_VOLUME: > + case ARIZONA_AIF1TX7MIX_INPUT_4_SOURCE: > + case ARIZONA_AIF1TX7MIX_INPUT_4_VOLUME: > + case ARIZONA_AIF1TX8MIX_INPUT_1_SOURCE: > + case ARIZONA_AIF1TX8MIX_INPUT_1_VOLUME: > + case ARIZONA_AIF1TX8MIX_INPUT_2_SOURCE: > + case ARIZONA_AIF1TX8MIX_INPUT_2_VOLUME: > + case ARIZONA_AIF1TX8MIX_INPUT_3_SOURCE: > + case ARIZONA_AIF1TX8MIX_INPUT_3_VOLUME: > + case ARIZONA_AIF1TX8MIX_INPUT_4_SOURCE: > + case ARIZONA_AIF1TX8MIX_INPUT_4_VOLUME: > + case ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE: > + case ARIZONA_AIF2TX1MIX_INPUT_1_VOLUME: > + case ARIZONA_AIF2TX1MIX_INPUT_2_SOURCE: > + case ARIZONA_AIF2TX1MIX_INPUT_2_VOLUME: > + case ARIZONA_AIF2TX1MIX_INPUT_3_SOURCE: > + case ARIZONA_AIF2TX1MIX_INPUT_3_VOLUME: > + case ARIZONA_AIF2TX1MIX_INPUT_4_SOURCE: > + case ARIZONA_AIF2TX1MIX_INPUT_4_VOLUME: > + case ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE: > + case ARIZONA_AIF2TX2MIX_INPUT_1_VOLUME: > + case ARIZONA_AIF2TX2MIX_INPUT_2_SOURCE: > + case ARIZONA_AIF2TX2MIX_INPUT_2_VOLUME: > + case ARIZONA_AIF2TX2MIX_INPUT_3_SOURCE: > + case ARIZONA_AIF2TX2MIX_INPUT_3_VOLUME: > + case ARIZONA_AIF2TX2MIX_INPUT_4_SOURCE: > + case ARIZONA_AIF2TX2MIX_INPUT_4_VOLUME: > + case ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE: > + case ARIZONA_AIF2TX3MIX_INPUT_1_VOLUME: > + case ARIZONA_AIF2TX3MIX_INPUT_2_SOURCE: > + case ARIZONA_AIF2TX3MIX_INPUT_2_VOLUME: > + case ARIZONA_AIF2TX3MIX_INPUT_3_SOURCE: > + case ARIZONA_AIF2TX3MIX_INPUT_3_VOLUME: > + case ARIZONA_AIF2TX3MIX_INPUT_4_SOURCE: > + case ARIZONA_AIF2TX3MIX_INPUT_4_VOLUME: > + case ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE: > + case ARIZONA_AIF2TX4MIX_INPUT_1_VOLUME: > + case ARIZONA_AIF2TX4MIX_INPUT_2_SOURCE: > + case ARIZONA_AIF2TX4MIX_INPUT_2_VOLUME: > + case ARIZONA_AIF2TX4MIX_INPUT_3_SOURCE: > + case ARIZONA_AIF2TX4MIX_INPUT_3_VOLUME: > + case ARIZONA_AIF2TX4MIX_INPUT_4_SOURCE: > + case ARIZONA_AIF2TX4MIX_INPUT_4_VOLUME: > + case ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE: > + case ARIZONA_AIF2TX5MIX_INPUT_1_VOLUME: > + case ARIZONA_AIF2TX5MIX_INPUT_2_SOURCE: > + case ARIZONA_AIF2TX5MIX_INPUT_2_VOLUME: > + case ARIZONA_AIF2TX5MIX_INPUT_3_SOURCE: > + case ARIZONA_AIF2TX5MIX_INPUT_3_VOLUME: > + case ARIZONA_AIF2TX5MIX_INPUT_4_SOURCE: > + case ARIZONA_AIF2TX5MIX_INPUT_4_VOLUME: > + case ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE: > + case ARIZONA_AIF2TX6MIX_INPUT_1_VOLUME: > + case ARIZONA_AIF2TX6MIX_INPUT_2_SOURCE: > + case ARIZONA_AIF2TX6MIX_INPUT_2_VOLUME: > + case ARIZONA_AIF2TX6MIX_INPUT_3_SOURCE: > + case ARIZONA_AIF2TX6MIX_INPUT_3_VOLUME: > + case ARIZONA_AIF2TX6MIX_INPUT_4_SOURCE: > + case ARIZONA_AIF2TX6MIX_INPUT_4_VOLUME: > + case ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE: > + case ARIZONA_AIF3TX1MIX_INPUT_1_VOLUME: > + case ARIZONA_AIF3TX1MIX_INPUT_2_SOURCE: > + case ARIZONA_AIF3TX1MIX_INPUT_2_VOLUME: > + case ARIZONA_AIF3TX1MIX_INPUT_3_SOURCE: > + case ARIZONA_AIF3TX1MIX_INPUT_3_VOLUME: > + case ARIZONA_AIF3TX1MIX_INPUT_4_SOURCE: > + case ARIZONA_AIF3TX1MIX_INPUT_4_VOLUME: > + case ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE: > + case ARIZONA_AIF3TX2MIX_INPUT_1_VOLUME: > + case ARIZONA_AIF3TX2MIX_INPUT_2_SOURCE: > + case ARIZONA_AIF3TX2MIX_INPUT_2_VOLUME: > + case ARIZONA_AIF3TX2MIX_INPUT_3_SOURCE: > + case ARIZONA_AIF3TX2MIX_INPUT_3_VOLUME: > + case ARIZONA_AIF3TX2MIX_INPUT_4_SOURCE: > + case ARIZONA_AIF3TX2MIX_INPUT_4_VOLUME: > + case ARIZONA_EQ1MIX_INPUT_1_SOURCE: > + case ARIZONA_EQ1MIX_INPUT_1_VOLUME: > + case ARIZONA_EQ1MIX_INPUT_2_SOURCE: > + case ARIZONA_EQ1MIX_INPUT_2_VOLUME: > + case ARIZONA_EQ1MIX_INPUT_3_SOURCE: > + case ARIZONA_EQ1MIX_INPUT_3_VOLUME: > + case ARIZONA_EQ1MIX_INPUT_4_SOURCE: > + case ARIZONA_EQ1MIX_INPUT_4_VOLUME: > + case ARIZONA_EQ2MIX_INPUT_1_SOURCE: > + case ARIZONA_EQ2MIX_INPUT_1_VOLUME: > + case ARIZONA_EQ2MIX_INPUT_2_SOURCE: > + case ARIZONA_EQ2MIX_INPUT_2_VOLUME: > + case ARIZONA_EQ2MIX_INPUT_3_SOURCE: > + case ARIZONA_EQ2MIX_INPUT_3_VOLUME: > + case ARIZONA_EQ2MIX_INPUT_4_SOURCE: > + case ARIZONA_EQ2MIX_INPUT_4_VOLUME: > + case ARIZONA_DRC1LMIX_INPUT_1_SOURCE: > + case ARIZONA_DRC1LMIX_INPUT_1_VOLUME: > + case ARIZONA_DRC1LMIX_INPUT_2_SOURCE: > + case ARIZONA_DRC1LMIX_INPUT_2_VOLUME: > + case ARIZONA_DRC1LMIX_INPUT_3_SOURCE: > + case ARIZONA_DRC1LMIX_INPUT_3_VOLUME: > + case ARIZONA_DRC1LMIX_INPUT_4_SOURCE: > + case ARIZONA_DRC1LMIX_INPUT_4_VOLUME: > + case ARIZONA_DRC1RMIX_INPUT_1_SOURCE: > + case ARIZONA_DRC1RMIX_INPUT_1_VOLUME: > + case ARIZONA_DRC1RMIX_INPUT_2_SOURCE: > + case ARIZONA_DRC1RMIX_INPUT_2_VOLUME: > + case ARIZONA_DRC1RMIX_INPUT_3_SOURCE: > + case ARIZONA_DRC1RMIX_INPUT_3_VOLUME: > + case ARIZONA_DRC1RMIX_INPUT_4_SOURCE: > + case ARIZONA_DRC1RMIX_INPUT_4_VOLUME: > + case ARIZONA_DRC2LMIX_INPUT_1_SOURCE: > + case ARIZONA_DRC2LMIX_INPUT_1_VOLUME: > + case ARIZONA_DRC2LMIX_INPUT_2_SOURCE: > + case ARIZONA_DRC2LMIX_INPUT_2_VOLUME: > + case ARIZONA_DRC2LMIX_INPUT_3_SOURCE: > + case ARIZONA_DRC2LMIX_INPUT_3_VOLUME: > + case ARIZONA_DRC2LMIX_INPUT_4_SOURCE: > + case ARIZONA_DRC2LMIX_INPUT_4_VOLUME: > + case ARIZONA_DRC2RMIX_INPUT_1_SOURCE: > + case ARIZONA_DRC2RMIX_INPUT_1_VOLUME: > + case ARIZONA_DRC2RMIX_INPUT_2_SOURCE: > + case ARIZONA_DRC2RMIX_INPUT_2_VOLUME: > + case ARIZONA_DRC2RMIX_INPUT_3_SOURCE: > + case ARIZONA_DRC2RMIX_INPUT_3_VOLUME: > + case ARIZONA_DRC2RMIX_INPUT_4_SOURCE: > + case ARIZONA_DRC2RMIX_INPUT_4_VOLUME: > + case ARIZONA_HPLP1MIX_INPUT_1_SOURCE: > + case ARIZONA_HPLP1MIX_INPUT_1_VOLUME: > + case ARIZONA_HPLP1MIX_INPUT_2_SOURCE: > + case ARIZONA_HPLP1MIX_INPUT_2_VOLUME: > + case ARIZONA_HPLP1MIX_INPUT_3_SOURCE: > + case ARIZONA_HPLP1MIX_INPUT_3_VOLUME: > + case ARIZONA_HPLP1MIX_INPUT_4_SOURCE: > + case ARIZONA_HPLP1MIX_INPUT_4_VOLUME: > + case ARIZONA_HPLP2MIX_INPUT_1_SOURCE: > + case ARIZONA_HPLP2MIX_INPUT_1_VOLUME: > + case ARIZONA_HPLP2MIX_INPUT_2_SOURCE: > + case ARIZONA_HPLP2MIX_INPUT_2_VOLUME: > + case ARIZONA_HPLP2MIX_INPUT_3_SOURCE: > + case ARIZONA_HPLP2MIX_INPUT_3_VOLUME: > + case ARIZONA_HPLP2MIX_INPUT_4_SOURCE: > + case ARIZONA_HPLP2MIX_INPUT_4_VOLUME: > + case ARIZONA_HPLP3MIX_INPUT_1_SOURCE: > + case ARIZONA_HPLP3MIX_INPUT_1_VOLUME: > + case ARIZONA_HPLP3MIX_INPUT_2_SOURCE: > + case ARIZONA_HPLP3MIX_INPUT_2_VOLUME: > + case ARIZONA_HPLP3MIX_INPUT_3_SOURCE: > + case ARIZONA_HPLP3MIX_INPUT_3_VOLUME: > + case ARIZONA_HPLP3MIX_INPUT_4_SOURCE: > + case ARIZONA_HPLP3MIX_INPUT_4_VOLUME: > + case ARIZONA_HPLP4MIX_INPUT_1_SOURCE: > + case ARIZONA_HPLP4MIX_INPUT_1_VOLUME: > + case ARIZONA_HPLP4MIX_INPUT_2_SOURCE: > + case ARIZONA_HPLP4MIX_INPUT_2_VOLUME: > + case ARIZONA_HPLP4MIX_INPUT_3_SOURCE: > + case ARIZONA_HPLP4MIX_INPUT_3_VOLUME: > + case ARIZONA_HPLP4MIX_INPUT_4_SOURCE: > + case ARIZONA_HPLP4MIX_INPUT_4_VOLUME: > + case ARIZONA_DSP2LMIX_INPUT_1_SOURCE: > + case ARIZONA_DSP2LMIX_INPUT_1_VOLUME: > + case ARIZONA_DSP2LMIX_INPUT_2_SOURCE: > + case ARIZONA_DSP2LMIX_INPUT_2_VOLUME: > + case ARIZONA_DSP2LMIX_INPUT_3_SOURCE: > + case ARIZONA_DSP2LMIX_INPUT_3_VOLUME: > + case ARIZONA_DSP2LMIX_INPUT_4_SOURCE: > + case ARIZONA_DSP2LMIX_INPUT_4_VOLUME: > + case ARIZONA_DSP2RMIX_INPUT_1_SOURCE: > + case ARIZONA_DSP2RMIX_INPUT_1_VOLUME: > + case ARIZONA_DSP2RMIX_INPUT_2_SOURCE: > + case ARIZONA_DSP2RMIX_INPUT_2_VOLUME: > + case ARIZONA_DSP2RMIX_INPUT_3_SOURCE: > + case ARIZONA_DSP2RMIX_INPUT_3_VOLUME: > + case ARIZONA_DSP2RMIX_INPUT_4_SOURCE: > + case ARIZONA_DSP2RMIX_INPUT_4_VOLUME: > + case ARIZONA_DSP2AUX1MIX_INPUT_1_SOURCE: > + case ARIZONA_DSP2AUX2MIX_INPUT_1_SOURCE: > + case ARIZONA_DSP2AUX3MIX_INPUT_1_SOURCE: > + case ARIZONA_DSP2AUX4MIX_INPUT_1_SOURCE: > + case ARIZONA_DSP2AUX5MIX_INPUT_1_SOURCE: > + case ARIZONA_DSP2AUX6MIX_INPUT_1_SOURCE: > + case ARIZONA_DSP3LMIX_INPUT_1_SOURCE: > + case ARIZONA_DSP3LMIX_INPUT_1_VOLUME: > + case ARIZONA_DSP3LMIX_INPUT_2_SOURCE: > + case ARIZONA_DSP3LMIX_INPUT_2_VOLUME: > + case ARIZONA_DSP3LMIX_INPUT_3_SOURCE: > + case ARIZONA_DSP3LMIX_INPUT_3_VOLUME: > + case ARIZONA_DSP3LMIX_INPUT_4_SOURCE: > + case ARIZONA_DSP3LMIX_INPUT_4_VOLUME: > + case ARIZONA_DSP3RMIX_INPUT_1_SOURCE: > + case ARIZONA_DSP3RMIX_INPUT_1_VOLUME: > + case ARIZONA_DSP3RMIX_INPUT_2_SOURCE: > + case ARIZONA_DSP3RMIX_INPUT_2_VOLUME: > + case ARIZONA_DSP3RMIX_INPUT_3_SOURCE: > + case ARIZONA_DSP3RMIX_INPUT_3_VOLUME: > + case ARIZONA_DSP3RMIX_INPUT_4_SOURCE: > + case ARIZONA_DSP3RMIX_INPUT_4_VOLUME: > + case ARIZONA_DSP3AUX1MIX_INPUT_1_SOURCE: > + case ARIZONA_DSP3AUX2MIX_INPUT_1_SOURCE: > + case ARIZONA_DSP3AUX3MIX_INPUT_1_SOURCE: > + case ARIZONA_DSP3AUX4MIX_INPUT_1_SOURCE: > + case ARIZONA_DSP3AUX5MIX_INPUT_1_SOURCE: > + case ARIZONA_DSP3AUX6MIX_INPUT_1_SOURCE: > + case ARIZONA_ASRC1LMIX_INPUT_1_SOURCE: > + case ARIZONA_ASRC1RMIX_INPUT_1_SOURCE: > + case ARIZONA_ASRC2LMIX_INPUT_1_SOURCE: > + case ARIZONA_ASRC2RMIX_INPUT_1_SOURCE: > + case ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE: > + case ARIZONA_ISRC1DEC2MIX_INPUT_1_SOURCE: > + case ARIZONA_ISRC1DEC3MIX_INPUT_1_SOURCE: > + case ARIZONA_ISRC1DEC4MIX_INPUT_1_SOURCE: > + case ARIZONA_ISRC1INT1MIX_INPUT_1_SOURCE: > + case ARIZONA_ISRC1INT2MIX_INPUT_1_SOURCE: > + case ARIZONA_ISRC1INT3MIX_INPUT_1_SOURCE: > + case ARIZONA_ISRC1INT4MIX_INPUT_1_SOURCE: > + case ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE: > + case ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE: > + case ARIZONA_ISRC2DEC3MIX_INPUT_1_SOURCE: > + case ARIZONA_ISRC2DEC4MIX_INPUT_1_SOURCE: > + case ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE: > + case ARIZONA_ISRC2INT2MIX_INPUT_1_SOURCE: > + case ARIZONA_ISRC2INT3MIX_INPUT_1_SOURCE: > + case ARIZONA_ISRC2INT4MIX_INPUT_1_SOURCE: > + case ARIZONA_ISRC3DEC1MIX_INPUT_1_SOURCE: > + case ARIZONA_ISRC3DEC2MIX_INPUT_1_SOURCE: > + case ARIZONA_ISRC3DEC3MIX_INPUT_1_SOURCE: > + case ARIZONA_ISRC3DEC4MIX_INPUT_1_SOURCE: > + case ARIZONA_ISRC3INT1MIX_INPUT_1_SOURCE: > + case ARIZONA_ISRC3INT2MIX_INPUT_1_SOURCE: > + case ARIZONA_ISRC3INT3MIX_INPUT_1_SOURCE: > + case ARIZONA_ISRC3INT4MIX_INPUT_1_SOURCE: > + case ARIZONA_GPIO1_CTRL: > + case ARIZONA_GPIO2_CTRL: > + case ARIZONA_IRQ_CTRL_1: > + case ARIZONA_GPIO_DEBOUNCE_CONFIG: > + case ARIZONA_MISC_PAD_CTRL_1: > + case ARIZONA_MISC_PAD_CTRL_2: > + case ARIZONA_MISC_PAD_CTRL_3: > + case ARIZONA_MISC_PAD_CTRL_4: > + case ARIZONA_MISC_PAD_CTRL_5: > + case ARIZONA_MISC_PAD_CTRL_6: > + case ARIZONA_MISC_PAD_CTRL_7: > + case ARIZONA_MISC_PAD_CTRL_9: > + case ARIZONA_MISC_PAD_CTRL_10: > + case ARIZONA_MISC_PAD_CTRL_11: > + case ARIZONA_MISC_PAD_CTRL_12: > + case ARIZONA_MISC_PAD_CTRL_13: > + case ARIZONA_MISC_PAD_CTRL_14: > + case ARIZONA_MISC_PAD_CTRL_16: > + case ARIZONA_INTERRUPT_STATUS_1: > + case ARIZONA_INTERRUPT_STATUS_2: > + case ARIZONA_INTERRUPT_STATUS_3: > + case ARIZONA_INTERRUPT_STATUS_4: > + case ARIZONA_INTERRUPT_STATUS_5: > + case ARIZONA_INTERRUPT_STATUS_6: > + case ARIZONA_INTERRUPT_STATUS_1_MASK: > + case ARIZONA_INTERRUPT_STATUS_2_MASK: > + case ARIZONA_INTERRUPT_STATUS_3_MASK: > + case ARIZONA_INTERRUPT_STATUS_4_MASK: > + case ARIZONA_INTERRUPT_STATUS_5_MASK: > + case ARIZONA_INTERRUPT_STATUS_6_MASK: > + case ARIZONA_INTERRUPT_CONTROL: > + case ARIZONA_IRQ2_STATUS_1: > + case ARIZONA_IRQ2_STATUS_2: > + case ARIZONA_IRQ2_STATUS_3: > + case ARIZONA_IRQ2_STATUS_4: > + case ARIZONA_IRQ2_STATUS_5: > + case ARIZONA_IRQ2_STATUS_6: > + case ARIZONA_IRQ2_STATUS_1_MASK: > + case ARIZONA_IRQ2_STATUS_2_MASK: > + case ARIZONA_IRQ2_STATUS_3_MASK: > + case ARIZONA_IRQ2_STATUS_4_MASK: > + case ARIZONA_IRQ2_STATUS_5_MASK: > + case ARIZONA_IRQ2_STATUS_6_MASK: > + case ARIZONA_IRQ2_CONTROL: > + case ARIZONA_INTERRUPT_RAW_STATUS_2: > + case ARIZONA_INTERRUPT_RAW_STATUS_3: > + case ARIZONA_INTERRUPT_RAW_STATUS_4: > + case ARIZONA_INTERRUPT_RAW_STATUS_5: > + case ARIZONA_INTERRUPT_RAW_STATUS_6: > + case ARIZONA_INTERRUPT_RAW_STATUS_7: > + case ARIZONA_INTERRUPT_RAW_STATUS_8: > + case ARIZONA_INTERRUPT_RAW_STATUS_9: > + case ARIZONA_IRQ_PIN_STATUS: > + case ARIZONA_FX_CTRL1: > + case ARIZONA_FX_CTRL2: > + case ARIZONA_EQ1_1: > + case ARIZONA_EQ1_2: > + case ARIZONA_EQ1_3: > + case ARIZONA_EQ1_4: > + case ARIZONA_EQ1_5: > + case ARIZONA_EQ1_6: > + case ARIZONA_EQ1_7: > + case ARIZONA_EQ1_8: > + case ARIZONA_EQ1_9: > + case ARIZONA_EQ1_10: > + case ARIZONA_EQ1_11: > + case ARIZONA_EQ1_12: > + case ARIZONA_EQ1_13: > + case ARIZONA_EQ1_14: > + case ARIZONA_EQ1_15: > + case ARIZONA_EQ1_16: > + case ARIZONA_EQ1_17: > + case ARIZONA_EQ1_18: > + case ARIZONA_EQ1_19: > + case ARIZONA_EQ1_20: > + case ARIZONA_EQ1_21: > + case ARIZONA_EQ2_1: > + case ARIZONA_EQ2_2: > + case ARIZONA_EQ2_3: > + case ARIZONA_EQ2_4: > + case ARIZONA_EQ2_5: > + case ARIZONA_EQ2_6: > + case ARIZONA_EQ2_7: > + case ARIZONA_EQ2_8: > + case ARIZONA_EQ2_9: > + case ARIZONA_EQ2_10: > + case ARIZONA_EQ2_11: > + case ARIZONA_EQ2_12: > + case ARIZONA_EQ2_13: > + case ARIZONA_EQ2_14: > + case ARIZONA_EQ2_15: > + case ARIZONA_EQ2_16: > + case ARIZONA_EQ2_17: > + case ARIZONA_EQ2_18: > + case ARIZONA_EQ2_19: > + case ARIZONA_EQ2_20: > + case ARIZONA_EQ2_21: > + case ARIZONA_DRC1_CTRL1: > + case ARIZONA_DRC1_CTRL2: > + case ARIZONA_DRC1_CTRL3: > + case ARIZONA_DRC1_CTRL4: > + case ARIZONA_DRC1_CTRL5: > + case ARIZONA_DRC2_CTRL1: > + case ARIZONA_DRC2_CTRL2: > + case ARIZONA_DRC2_CTRL3: > + case ARIZONA_DRC2_CTRL4: > + case ARIZONA_DRC2_CTRL5: > + case ARIZONA_HPLPF1_1: > + case ARIZONA_HPLPF1_2: > + case ARIZONA_HPLPF2_1: > + case ARIZONA_HPLPF2_2: > + case ARIZONA_HPLPF3_1: > + case ARIZONA_HPLPF3_2: > + case ARIZONA_HPLPF4_1: > + case ARIZONA_HPLPF4_2: > + case ARIZONA_ASRC_ENABLE: > + case ARIZONA_ASRC_STATUS: > + case ARIZONA_ASRC_RATE1: > + case ARIZONA_ASRC_RATE2: > + case ARIZONA_ISRC_1_CTRL_1: > + case ARIZONA_ISRC_1_CTRL_2: > + case ARIZONA_ISRC_1_CTRL_3: > + case ARIZONA_ISRC_2_CTRL_1: > + case ARIZONA_ISRC_2_CTRL_2: > + case ARIZONA_ISRC_2_CTRL_3: > + case ARIZONA_ISRC_3_CTRL_1: > + case ARIZONA_ISRC_3_CTRL_2: > + case ARIZONA_ISRC_3_CTRL_3: > + case ARIZONA_DSP2_CONTROL_1: > + case ARIZONA_DSP2_CLOCKING_1: > + case ARIZONA_DSP2_STATUS_1: > + case ARIZONA_DSP2_STATUS_2: > + case ARIZONA_DSP2_STATUS_3: > + case ARIZONA_DSP2_STATUS_4: > + case ARIZONA_DSP2_WDMA_BUFFER_1: > + case ARIZONA_DSP2_WDMA_BUFFER_2: > + case ARIZONA_DSP2_WDMA_BUFFER_3: > + case ARIZONA_DSP2_WDMA_BUFFER_4: > + case ARIZONA_DSP2_WDMA_BUFFER_5: > + case ARIZONA_DSP2_WDMA_BUFFER_6: > + case ARIZONA_DSP2_WDMA_BUFFER_7: > + case ARIZONA_DSP2_WDMA_BUFFER_8: > + case ARIZONA_DSP2_RDMA_BUFFER_1: > + case ARIZONA_DSP2_RDMA_BUFFER_2: > + case ARIZONA_DSP2_RDMA_BUFFER_3: > + case ARIZONA_DSP2_RDMA_BUFFER_4: > + case ARIZONA_DSP2_RDMA_BUFFER_5: > + case ARIZONA_DSP2_RDMA_BUFFER_6: > + case ARIZONA_DSP2_WDMA_CONFIG_1: > + case ARIZONA_DSP2_WDMA_CONFIG_2: > + case ARIZONA_DSP2_WDMA_OFFSET_1: > + case ARIZONA_DSP2_RDMA_CONFIG_1: > + case ARIZONA_DSP2_RDMA_OFFSET_1: > + case ARIZONA_DSP2_EXTERNAL_START_SELECT_1: > + case ARIZONA_DSP2_SCRATCH_0: > + case ARIZONA_DSP2_SCRATCH_1: > + case ARIZONA_DSP2_SCRATCH_2: > + case ARIZONA_DSP2_SCRATCH_3: > + case ARIZONA_DSP3_CONTROL_1: > + case ARIZONA_DSP3_CLOCKING_1: > + case ARIZONA_DSP3_STATUS_1: > + case ARIZONA_DSP3_STATUS_2: > + case ARIZONA_DSP3_STATUS_3: > + case ARIZONA_DSP3_STATUS_4: > + case ARIZONA_DSP3_WDMA_BUFFER_1: > + case ARIZONA_DSP3_WDMA_BUFFER_2: > + case ARIZONA_DSP3_WDMA_BUFFER_3: > + case ARIZONA_DSP3_WDMA_BUFFER_4: > + case ARIZONA_DSP3_WDMA_BUFFER_5: > + case ARIZONA_DSP3_WDMA_BUFFER_6: > + case ARIZONA_DSP3_WDMA_BUFFER_7: > + case ARIZONA_DSP3_WDMA_BUFFER_8: > + case ARIZONA_DSP3_RDMA_BUFFER_1: > + case ARIZONA_DSP3_RDMA_BUFFER_2: > + case ARIZONA_DSP3_RDMA_BUFFER_3: > + case ARIZONA_DSP3_RDMA_BUFFER_4: > + case ARIZONA_DSP3_RDMA_BUFFER_5: > + case ARIZONA_DSP3_RDMA_BUFFER_6: > + case ARIZONA_DSP3_WDMA_CONFIG_1: > + case ARIZONA_DSP3_WDMA_CONFIG_2: > + case ARIZONA_DSP3_WDMA_OFFSET_1: > + case ARIZONA_DSP3_RDMA_CONFIG_1: > + case ARIZONA_DSP3_RDMA_OFFSET_1: > + case ARIZONA_DSP3_EXTERNAL_START_SELECT_1: > + case ARIZONA_DSP3_SCRATCH_0: > + case ARIZONA_DSP3_SCRATCH_1: > + case ARIZONA_DSP3_SCRATCH_2: > + case ARIZONA_DSP3_SCRATCH_3: > + return true; > + default: > + return cs47l24_is_adsp_memory(reg); > + } > +} > + > +static bool cs47l24_volatile_register(struct device *dev, unsigned int reg) > +{ > + switch (reg) { > + case ARIZONA_SOFTWARE_RESET: > + case ARIZONA_DEVICE_REVISION: > + case ARIZONA_WRITE_SEQUENCER_CTRL_0: > + case ARIZONA_WRITE_SEQUENCER_CTRL_1: > + case ARIZONA_WRITE_SEQUENCER_CTRL_2: > + case ARIZONA_HAPTICS_STATUS: > + case ARIZONA_SAMPLE_RATE_1_STATUS: > + case ARIZONA_SAMPLE_RATE_2_STATUS: > + case ARIZONA_SAMPLE_RATE_3_STATUS: > + case ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS: > + case ARIZONA_ASYNC_SAMPLE_RATE_2_STATUS: > + case ARIZONA_HP_CTRL_1L: > + case ARIZONA_HP_CTRL_1R: > + case ARIZONA_INPUT_ENABLES_STATUS: > + case ARIZONA_OUTPUT_STATUS_1: > + case ARIZONA_RAW_OUTPUT_STATUS_1: > + case ARIZONA_INTERRUPT_STATUS_1: > + case ARIZONA_INTERRUPT_STATUS_2: > + case ARIZONA_INTERRUPT_STATUS_3: > + case ARIZONA_INTERRUPT_STATUS_4: > + case ARIZONA_INTERRUPT_STATUS_5: > + case ARIZONA_INTERRUPT_STATUS_6: > + case ARIZONA_IRQ2_STATUS_1: > + case ARIZONA_IRQ2_STATUS_2: > + case ARIZONA_IRQ2_STATUS_3: > + case ARIZONA_IRQ2_STATUS_4: > + case ARIZONA_IRQ2_STATUS_5: > + case ARIZONA_IRQ2_STATUS_6: > + case ARIZONA_INTERRUPT_RAW_STATUS_2: > + case ARIZONA_INTERRUPT_RAW_STATUS_3: > + case ARIZONA_INTERRUPT_RAW_STATUS_4: > + case ARIZONA_INTERRUPT_RAW_STATUS_5: > + case ARIZONA_INTERRUPT_RAW_STATUS_6: > + case ARIZONA_INTERRUPT_RAW_STATUS_7: > + case ARIZONA_INTERRUPT_RAW_STATUS_8: > + case ARIZONA_INTERRUPT_RAW_STATUS_9: > + case ARIZONA_IRQ_PIN_STATUS: > + case ARIZONA_FX_CTRL2: > + case ARIZONA_ASRC_STATUS: > + case ARIZONA_DSP2_STATUS_1: > + case ARIZONA_DSP2_STATUS_2: > + case ARIZONA_DSP2_STATUS_3: > + case ARIZONA_DSP2_STATUS_4: > + case ARIZONA_DSP2_WDMA_BUFFER_1: > + case ARIZONA_DSP2_WDMA_BUFFER_2: > + case ARIZONA_DSP2_WDMA_BUFFER_3: > + case ARIZONA_DSP2_WDMA_BUFFER_4: > + case ARIZONA_DSP2_WDMA_BUFFER_5: > + case ARIZONA_DSP2_WDMA_BUFFER_6: > + case ARIZONA_DSP2_WDMA_BUFFER_7: > + case ARIZONA_DSP2_WDMA_BUFFER_8: > + case ARIZONA_DSP2_RDMA_BUFFER_1: > + case ARIZONA_DSP2_RDMA_BUFFER_2: > + case ARIZONA_DSP2_RDMA_BUFFER_3: > + case ARIZONA_DSP2_RDMA_BUFFER_4: > + case ARIZONA_DSP2_RDMA_BUFFER_5: > + case ARIZONA_DSP2_RDMA_BUFFER_6: > + case ARIZONA_DSP2_WDMA_CONFIG_1: > + case ARIZONA_DSP2_WDMA_CONFIG_2: > + case ARIZONA_DSP2_WDMA_OFFSET_1: > + case ARIZONA_DSP2_RDMA_CONFIG_1: > + case ARIZONA_DSP2_RDMA_OFFSET_1: > + case ARIZONA_DSP2_EXTERNAL_START_SELECT_1: > + case ARIZONA_DSP2_SCRATCH_0: > + case ARIZONA_DSP2_SCRATCH_1: > + case ARIZONA_DSP2_SCRATCH_2: > + case ARIZONA_DSP2_SCRATCH_3: > + case ARIZONA_DSP2_CLOCKING_1: > + case ARIZONA_DSP3_STATUS_1: > + case ARIZONA_DSP3_STATUS_2: > + case ARIZONA_DSP3_STATUS_3: > + case ARIZONA_DSP3_STATUS_4: > + case ARIZONA_DSP3_WDMA_BUFFER_1: > + case ARIZONA_DSP3_WDMA_BUFFER_2: > + case ARIZONA_DSP3_WDMA_BUFFER_3: > + case ARIZONA_DSP3_WDMA_BUFFER_4: > + case ARIZONA_DSP3_WDMA_BUFFER_5: > + case ARIZONA_DSP3_WDMA_BUFFER_6: > + case ARIZONA_DSP3_WDMA_BUFFER_7: > + case ARIZONA_DSP3_WDMA_BUFFER_8: > + case ARIZONA_DSP3_RDMA_BUFFER_1: > + case ARIZONA_DSP3_RDMA_BUFFER_2: > + case ARIZONA_DSP3_RDMA_BUFFER_3: > + case ARIZONA_DSP3_RDMA_BUFFER_4: > + case ARIZONA_DSP3_RDMA_BUFFER_5: > + case ARIZONA_DSP3_RDMA_BUFFER_6: > + case ARIZONA_DSP3_WDMA_CONFIG_1: > + case ARIZONA_DSP3_WDMA_CONFIG_2: > + case ARIZONA_DSP3_WDMA_OFFSET_1: > + case ARIZONA_DSP3_RDMA_CONFIG_1: > + case ARIZONA_DSP3_RDMA_OFFSET_1: > + case ARIZONA_DSP3_EXTERNAL_START_SELECT_1: > + case ARIZONA_DSP3_SCRATCH_0: > + case ARIZONA_DSP3_SCRATCH_1: > + case ARIZONA_DSP3_SCRATCH_2: > + case ARIZONA_DSP3_SCRATCH_3: > + case ARIZONA_DSP3_CLOCKING_1: > + return true; > + default: > + return cs47l24_is_adsp_memory(reg); > + } > +} > + > +#define CS47L24_MAX_REGISTER 0x3b3fff > + > +const struct regmap_config cs47l24_spi_regmap = { > + .reg_bits = 32, > + .pad_bits = 16, > + .val_bits = 16, > + .reg_format_endian = REGMAP_ENDIAN_BIG, > + .val_format_endian = REGMAP_ENDIAN_BIG, > + > + .max_register = CS47L24_MAX_REGISTER, > + .readable_reg = cs47l24_readable_register, > + .volatile_reg = cs47l24_volatile_register, > + > + .cache_type = REGCACHE_RBTREE, > + .reg_defaults = cs47l24_reg_default, > + .num_reg_defaults = ARRAY_SIZE(cs47l24_reg_default), > +}; > +EXPORT_SYMBOL_GPL(cs47l24_spi_regmap); > + > diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h > index 79e607e..d55a422 100644 > --- a/include/linux/mfd/arizona/core.h > +++ b/include/linux/mfd/arizona/core.h > @@ -27,6 +27,8 @@ enum arizona_type { > WM8280 = 4, > WM8998 = 5, > WM1814 = 6, > + WM1831 = 7, > + CS47L24 = 8, > }; > > #define ARIZONA_IRQ_GP1 0 > @@ -166,6 +168,7 @@ static inline int wm5102_patch(struct arizona *arizona) > #endif > > int wm5110_patch(struct arizona *arizona); > +int cs47l24_patch(struct arizona *arizona); > int wm8997_patch(struct arizona *arizona); > int wm8998_patch(struct arizona *arizona); > -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog

1 0

[alsa-devel] Simple-card without codec for testing purpose
by arnaud.mouiche＠invoxia.com 24 Nov '15

24 Nov '15

Hello, I'm starting debugging / testing all the fsl_ssi issues (see Caleb's previous post). First step I just need to setup a DTS entry for "simple-card" + fake codec to generate arbitrary PCM bus output (1 to 16 channels, various TDM, various sampling rate and format and master/slave role) I will then plug my logical analyser, or do some loopback, or plug a FPGA to generate/check some patterns. Is there such "fake codec" somewhere. Indeed, something that look like the bt-sco codec, but without rate/format/channel limitations ? Or does the "simple-card" even needs one ? Regards, Arnaud

2 3

[alsa-devel] [PATCH 0/5] Add acpi_dev_present
by Lukas Wunner 24 Nov '15

24 Nov '15

Hi everyone, I need to detect the presence of apple-gmux (ACPI HID "APP000B") in several DRM drivers to handle backlight, runtime pm and deferred probing properly. There's an idiom in use by 7 other drivers to detect presence of a particular ACPI HID which involves calling acpi_get_devices() and passing it a minimal callback that does no further filtering. However this approach results in lots of duplicate code. This series adds acpi_dev_present(), the ACPI equivalent to pci_dev_present(). It takes a HID string and returns a bool, allowing us to simplify the drivers considerably by removing all the duplicate callbacks and other boilerplate. I've pushed these patches to GitHub to ease reviewing: https://github.com/l1k/linux/commits/acpi_dev_present Should this series find acceptance, it would probably be best if we could agree to merge everything through a single repository, e.g. acpi (git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm). or alternatively alsa (which contains 5 of the 7 drivers involved). Consequently I would like to invite the driver maintainers to kindly provide acks (or raise objections, if any). The series should not result in any functional changes, however I lack the hardware to actually verify this for every driver involved. I did test it with apple-gmux though. Thanks, Lukas Lukas Wunner (5): ACPICA: Add acpi_dev_present eeepc-wmi: Use acpi_dev_present acer-wmi: Use acpi_dev_present ALSA: hda - Use acpi_dev_present ASoC: Intel: Use acpi_dev_present drivers/acpi/acpica/nsxfeval.c | 46 ++++++++++++++++++++++++++++ drivers/platform/x86/acer-wmi.c | 16 +++------- drivers/platform/x86/eeepc-wmi.c | 24 ++------------- include/acpi/acpixf.h | 7 +++++ sound/pci/hda/thinkpad_helper.c | 17 ++-------- sound/soc/intel/atom/sst/sst_acpi.c | 12 +------- sound/soc/intel/boards/cht_bsw_max98090_ti.c | 17 ++-------- sound/soc/intel/boards/cht_bsw_rt5645.c | 13 +------- sound/soc/intel/common/sst-acpi.c | 12 +------- 9 files changed, 66 insertions(+), 98 deletions(-) -- 1.8.5.2 (Apple Git-48)

7 13

[alsa-devel] [PATCH v1 1/1] sst: replace custom implementation of readq / writeq
by Andy Shevchenko 24 Nov '15

24 Nov '15

The readq() and writeq() helpers are available in the asm-generic/io-64-nonatomic-hi-lo.h and asm-generic/io-64-nonatomic-lo-hi.h headers. Replace custom implementation by the generic helpers. Signed-off-by: Andy Shevchenko <andriy.shevchenko(a)linux.intel.com> --- sound/soc/intel/atom/sst/sst_pvt.c | 16 ++++++---------- sound/soc/intel/common/sst-dsp.c | 9 ++++----- 2 files changed, 10 insertions(+), 15 deletions(-) diff --git a/sound/soc/intel/atom/sst/sst_pvt.c b/sound/soc/intel/atom/sst/sst_pvt.c index adb32fe..6cc222d 100644 --- a/sound/soc/intel/atom/sst/sst_pvt.c +++ b/sound/soc/intel/atom/sst/sst_pvt.c @@ -31,7 +31,10 @@ #include <sound/pcm.h> #include <sound/soc.h> #include <sound/compress_driver.h> + +#include <asm-generic/io-64-nonatomic-lo-hi.h> #include <asm/platform_sst_audio.h> + #include "../sst-mfld-platform.h" #include "sst.h" #include "../../common/sst-dsp.h" @@ -49,25 +52,18 @@ u32 sst_shim_read(void __iomem *addr, int offset) u64 sst_reg_read64(void __iomem *addr, int offset) { - u64 val = 0; - - memcpy_fromio(&val, addr + offset, sizeof(val)); - - return val; + return readq(addr + offset); } int sst_shim_write64(void __iomem *addr, int offset, u64 value) { - memcpy_toio(addr + offset, &value, sizeof(value)); + writeq(value, addr + offset); return 0; } u64 sst_shim_read64(void __iomem *addr, int offset) { - u64 val = 0; - - memcpy_fromio(&val, addr + offset, sizeof(val)); - return val; + return readq(addr + offset); } void sst_set_fw_state_locked( diff --git a/sound/soc/intel/common/sst-dsp.c b/sound/soc/intel/common/sst-dsp.c index a627236..5274482 100644 --- a/sound/soc/intel/common/sst-dsp.c +++ b/sound/soc/intel/common/sst-dsp.c @@ -22,6 +22,8 @@ #include <linux/io.h> #include <linux/delay.h> +#include <asm-generic/io-64-nonatomic-lo-hi.h> + #include "sst-dsp.h" #include "sst-dsp-priv.h" @@ -43,16 +45,13 @@ EXPORT_SYMBOL_GPL(sst_shim32_read); void sst_shim32_write64(void __iomem *addr, u32 offset, u64 value) { - memcpy_toio(addr + offset, &value, sizeof(value)); + writeq(value, addr + offset); } EXPORT_SYMBOL_GPL(sst_shim32_write64); u64 sst_shim32_read64(void __iomem *addr, u32 offset) { - u64 val; - - memcpy_fromio(&val, addr + offset, sizeof(val)); - return val; + return readq(addr + offset); } EXPORT_SYMBOL_GPL(sst_shim32_read64); -- 2.5.0

4 5

[alsa-devel] [PATCH] ALSA: hda - Fix headphone noise after Dell XPS 13 resume back from S3
by Hui Wang 24 Nov '15

24 Nov '15

We have a machine Dell XPS 13 with the codec alc256, after resume back from S3, the headphone has noise when play sound. Through comparing with the coeff vaule before and after S3, we found restoring a coeff register will help remove noise. BugLink: https://bugs.launchpad.net/bugs/1519168 Cc: Kailang Yang <kailang(a)realtek.com> Cc: <stable(a)vger.kernel.org> Signed-off-by: Hui Wang <hui.wang(a)canonical.com> --- Kailang said one of the bits in that register is: Enable/Disable pass-through path for FRONT 14h And disable this bit should help remove headphone noise. sound/pci/hda/patch_realtek.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index 53f6a02..e4f80dc 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -4587,6 +4587,7 @@ enum { ALC292_FIXUP_DISABLE_AAMIX, ALC298_FIXUP_DELL1_MIC_NO_PRESENCE, ALC275_FIXUP_DELL_XPS, + ALC256_FIXUP_DELL_XPS_13_HEADPHONE_NOISE, }; static const struct hda_fixup alc269_fixups[] = { @@ -5167,6 +5168,17 @@ static const struct hda_fixup alc269_fixups[] = { {} } }, + [ALC256_FIXUP_DELL_XPS_13_HEADPHONE_NOISE] = { + .type = HDA_FIXUP_VERBS, + .v.verbs = (const struct hda_verb[]) { + /* Disable pass-through path for FRONT 14h */ + {0x20, AC_VERB_SET_COEF_INDEX, 0x36}, + {0x20, AC_VERB_SET_PROC_COEF, 0x1737}, + {} + }, + .chained = true, + .chain_id = ALC255_FIXUP_DELL1_MIC_NO_PRESENCE + }, }; static const struct snd_pci_quirk alc269_fixup_tbl[] = { @@ -5206,6 +5218,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { SND_PCI_QUIRK(0x1028, 0x06de, "Dell", ALC292_FIXUP_DISABLE_AAMIX), SND_PCI_QUIRK(0x1028, 0x06df, "Dell", ALC292_FIXUP_DISABLE_AAMIX), SND_PCI_QUIRK(0x1028, 0x06e0, "Dell", ALC292_FIXUP_DISABLE_AAMIX), + SND_PCI_QUIRK(0x1028, 0x0704, "Dell XPS 13", ALC256_FIXUP_DELL_XPS_13_HEADPHONE_NOISE), SND_PCI_QUIRK(0x1028, 0x164a, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE), SND_PCI_QUIRK(0x1028, 0x164b, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE), SND_PCI_QUIRK(0x103c, 0x1586, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC2), -- 1.9.1

2 1

[alsa-devel] [PATCH] ASoC: fix kernel-doc warnings in sound/soc/soc-ops.c
by Randy Dunlap 24 Nov '15

24 Nov '15

From: Randy Dunlap <rdunlap(a)infradead.org> Fix kernel-doc warnings in soc-ops.c: ..//sound/soc/soc-ops.c:415: warning: No description found for parameter 'ucontrol' ..//sound/soc/soc-ops.c:415: warning: Excess function parameter 'uinfo' description in 'snd_soc_put_volsw_sx' Signed-off-by: Randy Dunlap <rdunlap(a)infradead.org> Cc: Liam Girdwood <lgirdwood(a)gmail.com> Cc: Mark Brown <broonie(a)kernel.org> --- sound/soc/soc-ops.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- lnx-44-rc2.orig/sound/soc/soc-ops.c +++ lnx-44-rc2/sound/soc/soc-ops.c @@ -404,7 +404,7 @@ EXPORT_SYMBOL_GPL(snd_soc_get_volsw_sx); /** * snd_soc_put_volsw_sx - double mixer set callback * @kcontrol: mixer control - * @uinfo: control element information + * @ucontrol: control element information * * Callback to set the value of a double mixer control that spans 2 registers. *

1 0

[alsa-devel] Applied "ASoC: hdac: Fix Makefile and Kconfig sorting" to the asoc tree
by Mark Brown 23 Nov '15

23 Nov '15

The patch ASoC: hdac: Fix Makefile and Kconfig sorting has been applied to the asoc tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From 9049a48a33f7e03b69589a5fbb1444cc606d3292 Mon Sep 17 00:00:00 2001 From: Mark Brown <broonie(a)kernel.org> Date: Mon, 23 Nov 2015 14:43:06 +0000 Subject: [PATCH] ASoC: hdac: Fix Makefile and Kconfig sorting Signed-off-by: Mark Brown <broonie(a)kernel.org> --- sound/soc/codecs/Kconfig | 12 ++++++------ sound/soc/codecs/Makefile | 4 ++-- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index 5c584dad0af0..8bba374b8860 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -66,8 +66,8 @@ config SND_SOC_ALL_CODECS select SND_SOC_ES8328_SPI if SPI_MASTER select SND_SOC_ES8328_I2C if I2C select SND_SOC_GTM601 - select SND_SOC_ICS43432 select SND_SOC_HDAC_HDMI + select SND_SOC_ICS43432 select SND_SOC_ISABELLE if I2C select SND_SOC_JZ4740_CODEC select SND_SOC_LM4857 if I2C @@ -455,11 +455,6 @@ config SND_SOC_BT_SCO config SND_SOC_DMIC tristate -config SND_SOC_HDAC_HDMI - tristate - select SND_HDA_EXT_CORE - select HDMI - config SND_SOC_ES8328 tristate "Everest Semi ES8328 CODEC" @@ -474,6 +469,11 @@ config SND_SOC_ES8328_SPI config SND_SOC_GTM601 tristate 'GTM601 UMTS modem audio codec' +config SND_SOC_HDAC_HDMI + tristate + select SND_HDA_EXT_CORE + select HDMI + config SND_SOC_ICS43432 tristate diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index 6359bdcf7f89..bcd5ad6b6fb0 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -59,8 +59,8 @@ snd-soc-es8328-objs := es8328.o snd-soc-es8328-i2c-objs := es8328-i2c.o snd-soc-es8328-spi-objs := es8328-spi.o snd-soc-gtm601-objs := gtm601.o -snd-soc-ics43432-objs := ics43432.o snd-soc-hdac-hdmi-objs := hdac_hdmi.o +snd-soc-ics43432-objs := ics43432.o snd-soc-isabelle-objs := isabelle.o snd-soc-jz4740-codec-objs := jz4740.o snd-soc-l3-objs := l3.o @@ -255,8 +255,8 @@ obj-$(CONFIG_SND_SOC_ES8328) += snd-soc-es8328.o obj-$(CONFIG_SND_SOC_ES8328_I2C)+= snd-soc-es8328-i2c.o obj-$(CONFIG_SND_SOC_ES8328_SPI)+= snd-soc-es8328-spi.o obj-$(CONFIG_SND_SOC_GTM601) += snd-soc-gtm601.o -obj-$(CONFIG_SND_SOC_ICS43432) += snd-soc-ics43432.o obj-$(CONFIG_SND_SOC_HDAC_HDMI) += snd-soc-hdac-hdmi.o +obj-$(CONFIG_SND_SOC_ICS43432) += snd-soc-ics43432.o obj-$(CONFIG_SND_SOC_ISABELLE) += snd-soc-isabelle.o obj-$(CONFIG_SND_SOC_JZ4740_CODEC) += snd-soc-jz4740-codec.o obj-$(CONFIG_SND_SOC_L3) += snd-soc-l3.o -- 2.6.2

1 0

[alsa-devel] Applied "ASoC: rk3036: Inno codec driver for RK3036 SoC" to the asoc tree
by Mark Brown 23 Nov '15

23 Nov '15

The patch ASoC: rk3036: Inno codec driver for RK3036 SoC has been applied to the asoc tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From decbc00eb889d199edad737630fa882c0308d0ae Mon Sep 17 00:00:00 2001 From: ZhengShunQian <zhengsq(a)rock-chips.com> Date: Mon, 9 Nov 2015 10:10:19 +0800 Subject: [PATCH] ASoC: rk3036: Inno codec driver for RK3036 SoC RK3036 SoC integrated with an Inno audio codec. This driver implements the functions of it. There is not need a special machine driver, since the simple-card machine driver works perfect in this case. Signed-off-by: ZhengShunQian <zhengsq(a)rock-chips.com> Signed-off-by: Mark Brown <broonie(a)kernel.org> --- sound/soc/codecs/Kconfig | 4 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/inno_rk3036.c | 491 +++++++++++++++++++++++++++++++++++++++++ sound/soc/codecs/inno_rk3036.h | 123 +++++++++++ 4 files changed, 620 insertions(+) create mode 100644 sound/soc/codecs/inno_rk3036.c create mode 100644 sound/soc/codecs/inno_rk3036.h diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index cfdafc4c11ea..89d789e3a2d0 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -67,6 +67,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_ES8328_I2C if I2C select SND_SOC_GTM601 select SND_SOC_ICS43432 + select SND_SOC_INNO_RK3036 select SND_SOC_ISABELLE if I2C select SND_SOC_JZ4740_CODEC select SND_SOC_LM4857 if I2C @@ -471,6 +472,9 @@ config SND_SOC_GTM601 config SND_SOC_ICS43432 tristate +config SND_SOC_INNO_RK3036 + tristate "Inno codec driver for RK3036 SoC" + config SND_SOC_ISABELLE tristate diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index f632fc42f59f..2f6bc6c01178 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -60,6 +60,7 @@ snd-soc-es8328-i2c-objs := es8328-i2c.o snd-soc-es8328-spi-objs := es8328-spi.o snd-soc-gtm601-objs := gtm601.o snd-soc-ics43432-objs := ics43432.o +snd-soc-inno-rk3036-objs := inno_rk3036.o snd-soc-isabelle-objs := isabelle.o snd-soc-jz4740-codec-objs := jz4740.o snd-soc-l3-objs := l3.o @@ -255,6 +256,7 @@ obj-$(CONFIG_SND_SOC_ES8328_I2C)+= snd-soc-es8328-i2c.o obj-$(CONFIG_SND_SOC_ES8328_SPI)+= snd-soc-es8328-spi.o obj-$(CONFIG_SND_SOC_GTM601) += snd-soc-gtm601.o obj-$(CONFIG_SND_SOC_ICS43432) += snd-soc-ics43432.o +obj-$(CONFIG_SND_SOC_INNO_RK3036) += snd-soc-inno-rk3036.o obj-$(CONFIG_SND_SOC_ISABELLE) += snd-soc-isabelle.o obj-$(CONFIG_SND_SOC_JZ4740_CODEC) += snd-soc-jz4740-codec.o obj-$(CONFIG_SND_SOC_L3) += snd-soc-l3.o diff --git a/sound/soc/codecs/inno_rk3036.c b/sound/soc/codecs/inno_rk3036.c new file mode 100644 index 000000000000..24677a831c00 --- /dev/null +++ b/sound/soc/codecs/inno_rk3036.c @@ -0,0 +1,491 @@ +/* + * Driver of Inno codec for rk3036 by Rockchip Inc. + * + * Author: Rockchip Inc. + * Author: Zheng ShunQian<zhengsq(a)rock-chips.com> + */ + +#include <sound/soc.h> +#include <sound/tlv.h> +#include <sound/soc-dapm.h> +#include <sound/soc-dai.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> + +#include <linux/platform_device.h> +#include <linux/of.h> +#include <linux/clk.h> +#include <linux/regmap.h> +#include <linux/device.h> +#include <linux/mfd/syscon.h> +#include <linux/module.h> +#include <linux/io.h> + +#include "inno_rk3036.h" + +struct rk3036_codec_priv { + void __iomem *base; + struct clk *pclk; + struct regmap *regmap; + struct device *dev; +}; + +static const DECLARE_TLV_DB_MINMAX(rk3036_codec_hp_tlv, -39, 0); + +static int rk3036_codec_antipop_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; + uinfo->count = 2; + uinfo->value.integer.min = 0; + uinfo->value.integer.max = 1; + + return 0; +} + +static int rk3036_codec_antipop_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); + int val, ret, regval; + + ret = snd_soc_component_read(component, INNO_R09, &regval); + if (ret) + return ret; + val = ((regval >> INNO_R09_HPL_ANITPOP_SHIFT) & + INNO_R09_HP_ANTIPOP_MSK) == INNO_R09_HP_ANTIPOP_ON; + ucontrol->value.integer.value[0] = val; + + val = ((regval >> INNO_R09_HPR_ANITPOP_SHIFT) & + INNO_R09_HP_ANTIPOP_MSK) == INNO_R09_HP_ANTIPOP_ON; + ucontrol->value.integer.value[1] = val; + + return 0; +} + +static int rk3036_codec_antipop_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); + int val, ret, regmsk; + + val = (ucontrol->value.integer.value[0] ? + INNO_R09_HP_ANTIPOP_ON : INNO_R09_HP_ANTIPOP_OFF) << + INNO_R09_HPL_ANITPOP_SHIFT; + val |= (ucontrol->value.integer.value[1] ? + INNO_R09_HP_ANTIPOP_ON : INNO_R09_HP_ANTIPOP_OFF) << + INNO_R09_HPR_ANITPOP_SHIFT; + + regmsk = INNO_R09_HP_ANTIPOP_MSK << INNO_R09_HPL_ANITPOP_SHIFT | + INNO_R09_HP_ANTIPOP_MSK << INNO_R09_HPR_ANITPOP_SHIFT; + + ret = snd_soc_component_update_bits(component, INNO_R09, + regmsk, val); + if (ret < 0) + return ret; + + return 0; +} + +#define SOC_RK3036_CODEC_ANTIPOP_DECL(xname) \ +{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ + .info = rk3036_codec_antipop_info, .get = rk3036_codec_antipop_get, \ + .put = rk3036_codec_antipop_put, } + +static const struct snd_kcontrol_new rk3036_codec_dapm_controls[] = { + SOC_DOUBLE_R_RANGE_TLV("Headphone Volume", INNO_R07, INNO_R08, + INNO_HP_GAIN_SHIFT, INNO_HP_GAIN_N39DB, + INNO_HP_GAIN_0DB, 0, rk3036_codec_hp_tlv), + SOC_DOUBLE("Zero Cross Switch", INNO_R06, INNO_R06_VOUTL_CZ_SHIFT, + INNO_R06_VOUTR_CZ_SHIFT, 1, 0), + SOC_DOUBLE("Headphone Switch", INNO_R09, INNO_R09_HPL_MUTE_SHIFT, + INNO_R09_HPR_MUTE_SHIFT, 1, 0), + SOC_RK3036_CODEC_ANTIPOP_DECL("Anti-pop Switch"), +}; + +static const struct snd_kcontrol_new rk3036_codec_hpl_mixer_controls[] = { + SOC_DAPM_SINGLE("DAC Left Out Switch", INNO_R09, + INNO_R09_DACL_SWITCH_SHIFT, 1, 0), +}; + +static const struct snd_kcontrol_new rk3036_codec_hpr_mixer_controls[] = { + SOC_DAPM_SINGLE("DAC Right Out Switch", INNO_R09, + INNO_R09_DACR_SWITCH_SHIFT, 1, 0), +}; + +static const struct snd_kcontrol_new rk3036_codec_hpl_switch_controls[] = { + SOC_DAPM_SINGLE("HP Left Out Switch", INNO_R05, + INNO_R05_HPL_WORK_SHIFT, 1, 0), +}; + +static const struct snd_kcontrol_new rk3036_codec_hpr_switch_controls[] = { + SOC_DAPM_SINGLE("HP Right Out Switch", INNO_R05, + INNO_R05_HPR_WORK_SHIFT, 1, 0), +}; + +static const struct snd_soc_dapm_widget rk3036_codec_dapm_widgets[] = { + SND_SOC_DAPM_SUPPLY_S("DAC PWR", 1, INNO_R06, + INNO_R06_DAC_EN_SHIFT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY_S("DACL VREF", 2, INNO_R04, + INNO_R04_DACL_VREF_SHIFT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY_S("DACR VREF", 2, INNO_R04, + INNO_R04_DACR_VREF_SHIFT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY_S("DACL HiLo VREF", 3, INNO_R06, + INNO_R06_DACL_HILO_VREF_SHIFT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY_S("DACR HiLo VREF", 3, INNO_R06, + INNO_R06_DACR_HILO_VREF_SHIFT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY_S("DACR CLK", 3, INNO_R04, + INNO_R04_DACR_CLK_SHIFT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY_S("DACL CLK", 3, INNO_R04, + INNO_R04_DACL_CLK_SHIFT, 0, NULL, 0), + + SND_SOC_DAPM_DAC("DACL", "Left Playback", INNO_R04, + INNO_R04_DACL_SW_SHIFT, 0), + SND_SOC_DAPM_DAC("DACR", "Right Playback", INNO_R04, + INNO_R04_DACR_SW_SHIFT, 0), + + SND_SOC_DAPM_MIXER("Left Headphone Mixer", SND_SOC_NOPM, 0, 0, + rk3036_codec_hpl_mixer_controls, + ARRAY_SIZE(rk3036_codec_hpl_mixer_controls)), + SND_SOC_DAPM_MIXER("Right Headphone Mixer", SND_SOC_NOPM, 0, 0, + rk3036_codec_hpr_mixer_controls, + ARRAY_SIZE(rk3036_codec_hpr_mixer_controls)), + + SND_SOC_DAPM_PGA("HP Left Out", INNO_R05, + INNO_R05_HPL_EN_SHIFT, 0, NULL, 0), + SND_SOC_DAPM_PGA("HP Right Out", INNO_R05, + INNO_R05_HPR_EN_SHIFT, 0, NULL, 0), + + SND_SOC_DAPM_MIXER("HP Left Switch", SND_SOC_NOPM, 0, 0, + rk3036_codec_hpl_switch_controls, + ARRAY_SIZE(rk3036_codec_hpl_switch_controls)), + SND_SOC_DAPM_MIXER("HP Right Switch", SND_SOC_NOPM, 0, 0, + rk3036_codec_hpr_switch_controls, + ARRAY_SIZE(rk3036_codec_hpr_switch_controls)), + + SND_SOC_DAPM_OUTPUT("HPL"), + SND_SOC_DAPM_OUTPUT("HPR"), +}; + +static const struct snd_soc_dapm_route rk3036_codec_dapm_routes[] = { + {"DACL VREF", NULL, "DAC PWR"}, + {"DACR VREF", NULL, "DAC PWR"}, + {"DACL HiLo VREF", NULL, "DAC PWR"}, + {"DACR HiLo VREF", NULL, "DAC PWR"}, + {"DACL CLK", NULL, "DAC PWR"}, + {"DACR CLK", NULL, "DAC PWR"}, + + {"DACL", NULL, "DACL VREF"}, + {"DACL", NULL, "DACL HiLo VREF"}, + {"DACL", NULL, "DACL CLK"}, + {"DACR", NULL, "DACR VREF"}, + {"DACR", NULL, "DACR HiLo VREF"}, + {"DACR", NULL, "DACR CLK"}, + + {"Left Headphone Mixer", "DAC Left Out Switch", "DACL"}, + {"Right Headphone Mixer", "DAC Right Out Switch", "DACR"}, + {"HP Left Out", NULL, "Left Headphone Mixer"}, + {"HP Right Out", NULL, "Right Headphone Mixer"}, + + {"HP Left Switch", "HP Left Out Switch", "HP Left Out"}, + {"HP Right Switch", "HP Right Out Switch", "HP Right Out"}, + + {"HPL", NULL, "HP Left Switch"}, + {"HPR", NULL, "HP Right Switch"}, +}; + +static int rk3036_codec_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) +{ + struct snd_soc_codec *codec = dai->codec; + unsigned int reg01_val = 0, reg02_val = 0, reg03_val = 0; + + dev_dbg(codec->dev, "rk3036_codec dai set fmt : %08x\n", fmt); + + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBS_CFS: + reg01_val |= INNO_R01_PINDIR_IN_SLAVE | + INNO_R01_I2SMODE_SLAVE; + break; + case SND_SOC_DAIFMT_CBM_CFM: + reg01_val |= INNO_R01_PINDIR_OUT_MASTER | + INNO_R01_I2SMODE_MASTER; + break; + default: + dev_err(codec->dev, "invalid fmt\n"); + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_DSP_A: + reg02_val |= INNO_R02_DACM_PCM; + break; + case SND_SOC_DAIFMT_I2S: + reg02_val |= INNO_R02_DACM_I2S; + break; + case SND_SOC_DAIFMT_RIGHT_J: + reg02_val |= INNO_R02_DACM_RJM; + break; + case SND_SOC_DAIFMT_LEFT_J: + reg02_val |= INNO_R02_DACM_LJM; + break; + default: + dev_err(codec->dev, "set dai format failed\n"); + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + reg02_val |= INNO_R02_LRCP_NORMAL; + reg03_val |= INNO_R03_BCP_NORMAL; + break; + case SND_SOC_DAIFMT_IB_IF: + reg02_val |= INNO_R02_LRCP_REVERSAL; + reg03_val |= INNO_R03_BCP_REVERSAL; + break; + case SND_SOC_DAIFMT_IB_NF: + reg02_val |= INNO_R02_LRCP_REVERSAL; + reg03_val |= INNO_R03_BCP_NORMAL; + break; + case SND_SOC_DAIFMT_NB_IF: + reg02_val |= INNO_R02_LRCP_NORMAL; + reg03_val |= INNO_R03_BCP_REVERSAL; + break; + default: + dev_err(codec->dev, "set dai format failed\n"); + return -EINVAL; + } + + snd_soc_update_bits(codec, INNO_R01, INNO_R01_I2SMODE_MSK | + INNO_R01_PINDIR_MSK, reg01_val); + snd_soc_update_bits(codec, INNO_R02, INNO_R02_LRCP_MSK | + INNO_R02_DACM_MSK, reg02_val); + snd_soc_update_bits(codec, INNO_R03, INNO_R03_BCP_MSK, reg03_val); + + return 0; +} + +static int rk3036_codec_dai_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *hw_params, + struct snd_soc_dai *dai) +{ + struct snd_soc_codec *codec = dai->codec; + unsigned int reg02_val = 0, reg03_val = 0; + + switch (params_format(hw_params)) { + case SNDRV_PCM_FORMAT_S16_LE: + reg02_val |= INNO_R02_VWL_16BIT; + break; + case SNDRV_PCM_FORMAT_S20_3LE: + reg02_val |= INNO_R02_VWL_20BIT; + break; + case SNDRV_PCM_FORMAT_S24_LE: + reg02_val |= INNO_R02_VWL_24BIT; + break; + case SNDRV_PCM_FORMAT_S32_LE: + reg02_val |= INNO_R02_VWL_32BIT; + break; + default: + return -EINVAL; + } + + reg02_val |= INNO_R02_LRCP_NORMAL; + reg03_val |= INNO_R03_FWL_32BIT | INNO_R03_DACR_WORK; + + snd_soc_update_bits(codec, INNO_R02, INNO_R02_LRCP_MSK | + INNO_R02_VWL_MSK, reg02_val); + snd_soc_update_bits(codec, INNO_R03, INNO_R03_DACR_MSK | + INNO_R03_FWL_MSK, reg03_val); + return 0; +} + +#define RK3036_CODEC_RATES (SNDRV_PCM_RATE_8000 | \ + SNDRV_PCM_RATE_16000 | \ + SNDRV_PCM_RATE_32000 | \ + SNDRV_PCM_RATE_44100 | \ + SNDRV_PCM_RATE_48000 | \ + SNDRV_PCM_RATE_96000) + +#define RK3036_CODEC_FMTS (SNDRV_PCM_FMTBIT_S16_LE | \ + SNDRV_PCM_FMTBIT_S20_3LE | \ + SNDRV_PCM_FMTBIT_S24_LE | \ + SNDRV_PCM_FMTBIT_S32_LE) + +static struct snd_soc_dai_ops rk3036_codec_dai_ops = { + .set_fmt = rk3036_codec_dai_set_fmt, + .hw_params = rk3036_codec_dai_hw_params, +}; + +static struct snd_soc_dai_driver rk3036_codec_dai_driver[] = { + { + .name = "rk3036-codec-dai", + .playback = { + .stream_name = "Playback", + .channels_min = 1, + .channels_max = 2, + .rates = RK3036_CODEC_RATES, + .formats = RK3036_CODEC_FMTS, + }, + .ops = &rk3036_codec_dai_ops, + .symmetric_rates = 1, + }, +}; + +static void rk3036_codec_reset(struct snd_soc_codec *codec) +{ + snd_soc_write(codec, INNO_R00, + INNO_R00_CSR_RESET | INNO_R00_CDCR_RESET); + snd_soc_write(codec, INNO_R00, + INNO_R00_CSR_WORK | INNO_R00_CDCR_WORK); +} + +static int rk3036_codec_probe(struct snd_soc_codec *codec) +{ + rk3036_codec_reset(codec); + return 0; +} + +static int rk3036_codec_remove(struct snd_soc_codec *codec) +{ + rk3036_codec_reset(codec); + return 0; +} + +static int rk3036_codec_set_bias_level(struct snd_soc_codec *codec, + enum snd_soc_bias_level level) +{ + switch (level) { + case SND_SOC_BIAS_STANDBY: + /* set a big current for capacitor charging. */ + snd_soc_write(codec, INNO_R10, INNO_R10_MAX_CUR); + /* start precharge */ + snd_soc_write(codec, INNO_R06, INNO_R06_DAC_PRECHARGE); + + break; + + case SND_SOC_BIAS_OFF: + /* set a big current for capacitor discharging. */ + snd_soc_write(codec, INNO_R10, INNO_R10_MAX_CUR); + /* start discharge. */ + snd_soc_write(codec, INNO_R06, INNO_R06_DAC_DISCHARGE); + + break; + default: + break; + } + + return 0; +} + +static struct snd_soc_codec_driver rk3036_codec_driver = { + .probe = rk3036_codec_probe, + .remove = rk3036_codec_remove, + .set_bias_level = rk3036_codec_set_bias_level, + .controls = rk3036_codec_dapm_controls, + .num_controls = ARRAY_SIZE(rk3036_codec_dapm_controls), + .dapm_routes = rk3036_codec_dapm_routes, + .num_dapm_routes = ARRAY_SIZE(rk3036_codec_dapm_routes), + .dapm_widgets = rk3036_codec_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(rk3036_codec_dapm_widgets), +}; + +static const struct regmap_config rk3036_codec_regmap_config = { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, +}; + +#define GRF_SOC_CON0 0x00140 +#define GRF_ACODEC_SEL (BIT(10) | BIT(16 + 10)) + +static int rk3036_codec_platform_probe(struct platform_device *pdev) +{ + struct rk3036_codec_priv *priv; + struct device_node *of_node = pdev->dev.of_node; + struct resource *res; + void __iomem *base; + struct regmap *grf; + int ret; + + priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(base)) + return PTR_ERR(base); + + priv->base = base; + priv->regmap = devm_regmap_init_mmio(&pdev->dev, priv->base, + &rk3036_codec_regmap_config); + if (IS_ERR(priv->regmap)) { + dev_err(&pdev->dev, "init regmap failed\n"); + return PTR_ERR(priv->regmap); + } + + grf = syscon_regmap_lookup_by_phandle(of_node, "rockchip,grf"); + if (IS_ERR(grf)) { + dev_err(&pdev->dev, "needs 'rockchip,grf' property\n"); + return PTR_ERR(grf); + } + ret = regmap_write(grf, GRF_SOC_CON0, GRF_ACODEC_SEL); + if (ret) { + dev_err(&pdev->dev, "Could not write to GRF: %d\n", ret); + return ret; + } + + priv->pclk = devm_clk_get(&pdev->dev, "acodec_pclk"); + if (IS_ERR(priv->pclk)) + return PTR_ERR(priv->pclk); + + ret = clk_prepare_enable(priv->pclk); + if (ret < 0) { + dev_err(&pdev->dev, "failed to enable clk\n"); + return ret; + } + + priv->dev = &pdev->dev; + dev_set_drvdata(&pdev->dev, priv); + + ret = snd_soc_register_codec(&pdev->dev, &rk3036_codec_driver, + rk3036_codec_dai_driver, + ARRAY_SIZE(rk3036_codec_dai_driver)); + if (ret) { + clk_disable_unprepare(priv->pclk); + dev_set_drvdata(&pdev->dev, NULL); + } + + return ret; +} + +static int rk3036_codec_platform_remove(struct platform_device *pdev) +{ + struct rk3036_codec_priv *priv = dev_get_drvdata(&pdev->dev); + + snd_soc_unregister_codec(&pdev->dev); + clk_disable_unprepare(priv->pclk); + + return 0; +} + +static const struct of_device_id rk3036_codec_of_match[] = { + { .compatible = "rockchip,rk3036-codec", }, + {} +}; +MODULE_DEVICE_TABLE(of, rk3036_codec_of_match); + +static struct platform_driver rk3036_codec_platform_driver = { + .driver = { + .name = "rk3036-codec-platform", + .owner = THIS_MODULE, + .of_match_table = of_match_ptr(rk3036_codec_of_match), + }, + .probe = rk3036_codec_platform_probe, + .remove = rk3036_codec_platform_remove, +}; + +module_platform_driver(rk3036_codec_platform_driver); + +MODULE_AUTHOR("Rockchip Inc."); +MODULE_DESCRIPTION("Rockchip rk3036 codec driver"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/codecs/inno_rk3036.h b/sound/soc/codecs/inno_rk3036.h new file mode 100644 index 000000000000..da759c6c7501 --- /dev/null +++ b/sound/soc/codecs/inno_rk3036.h @@ -0,0 +1,123 @@ +/* + * Driver of Inno Codec for rk3036 by Rockchip Inc. + * + * Author: Zheng ShunQian<zhengsq(a)rock-chips.com> + */ + +#ifndef _INNO_RK3036_CODEC_H +#define _INNO_RK3036_CODEC_H + +/* codec registers */ +#define INNO_R00 0x00 +#define INNO_R01 0x0c +#define INNO_R02 0x10 +#define INNO_R03 0x14 +#define INNO_R04 0x88 +#define INNO_R05 0x8c +#define INNO_R06 0x90 +#define INNO_R07 0x94 +#define INNO_R08 0x98 +#define INNO_R09 0x9c +#define INNO_R10 0xa0 + +/* register bit filed */ +#define INNO_R00_CSR_RESET (0x0 << 0) /*codec system reset*/ +#define INNO_R00_CSR_WORK (0x1 << 0) +#define INNO_R00_CDCR_RESET (0x0 << 1) /*codec digital core reset*/ +#define INNO_R00_CDCR_WORK (0x1 << 1) +#define INNO_R00_PRB_DISABLE (0x0 << 6) /*power reset bypass*/ +#define INNO_R00_PRB_ENABLE (0x1 << 6) + +#define INNO_R01_I2SMODE_MSK (0x1 << 4) +#define INNO_R01_I2SMODE_SLAVE (0x0 << 4) +#define INNO_R01_I2SMODE_MASTER (0x1 << 4) +#define INNO_R01_PINDIR_MSK (0x1 << 5) +#define INNO_R01_PINDIR_IN_SLAVE (0x0 << 5) /*direction of pin*/ +#define INNO_R01_PINDIR_OUT_MASTER (0x1 << 5) + +#define INNO_R02_LRS_MSK (0x1 << 2) +#define INNO_R02_LRS_NORMAL (0x0 << 2) /*DAC Left Right Swap*/ +#define INNO_R02_LRS_SWAP (0x1 << 2) +#define INNO_R02_DACM_MSK (0x3 << 3) +#define INNO_R02_DACM_PCM (0x3 << 3) /*DAC Mode*/ +#define INNO_R02_DACM_I2S (0x2 << 3) +#define INNO_R02_DACM_LJM (0x1 << 3) +#define INNO_R02_DACM_RJM (0x0 << 3) +#define INNO_R02_VWL_MSK (0x3 << 5) +#define INNO_R02_VWL_32BIT (0x3 << 5) /*1/2Frame Valid Word Len*/ +#define INNO_R02_VWL_24BIT (0x2 << 5) +#define INNO_R02_VWL_20BIT (0x1 << 5) +#define INNO_R02_VWL_16BIT (0x0 << 5) +#define INNO_R02_LRCP_MSK (0x1 << 7) +#define INNO_R02_LRCP_NORMAL (0x0 << 7) /*Left Right Polarity*/ +#define INNO_R02_LRCP_REVERSAL (0x1 << 7) + +#define INNO_R03_BCP_MSK (0x1 << 0) +#define INNO_R03_BCP_NORMAL (0x0 << 0) /*DAC bit clock polarity*/ +#define INNO_R03_BCP_REVERSAL (0x1 << 0) +#define INNO_R03_DACR_MSK (0x1 << 1) +#define INNO_R03_DACR_RESET (0x0 << 1) /*DAC Reset*/ +#define INNO_R03_DACR_WORK (0x1 << 1) +#define INNO_R03_FWL_MSK (0x3 << 2) +#define INNO_R03_FWL_32BIT (0x3 << 2) /*1/2Frame Word Length*/ +#define INNO_R03_FWL_24BIT (0x2 << 2) +#define INNO_R03_FWL_20BIT (0x1 << 2) +#define INNO_R03_FWL_16BIT (0x0 << 2) + +#define INNO_R04_DACR_SW_SHIFT 0 +#define INNO_R04_DACL_SW_SHIFT 1 +#define INNO_R04_DACR_CLK_SHIFT 2 +#define INNO_R04_DACL_CLK_SHIFT 3 +#define INNO_R04_DACR_VREF_SHIFT 4 +#define INNO_R04_DACL_VREF_SHIFT 5 + +#define INNO_R05_HPR_EN_SHIFT 0 +#define INNO_R05_HPL_EN_SHIFT 1 +#define INNO_R05_HPR_WORK_SHIFT 2 +#define INNO_R05_HPL_WORK_SHIFT 3 + +#define INNO_R06_VOUTR_CZ_SHIFT 0 +#define INNO_R06_VOUTL_CZ_SHIFT 1 +#define INNO_R06_DACR_HILO_VREF_SHIFT 2 +#define INNO_R06_DACL_HILO_VREF_SHIFT 3 +#define INNO_R06_DAC_EN_SHIFT 5 + +#define INNO_R06_DAC_PRECHARGE (0x0 << 4) /*PreCharge control for DAC*/ +#define INNO_R06_DAC_DISCHARGE (0x1 << 4) + +#define INNO_HP_GAIN_SHIFT 0 +/* Gain of output, 1.5db step: -39db(0x0) ~ 0db(0x1a) ~ 6db(0x1f) */ +#define INNO_HP_GAIN_0DB 0x1a +#define INNO_HP_GAIN_N39DB 0x0 + +#define INNO_R09_HP_ANTIPOP_MSK 0x3 +#define INNO_R09_HP_ANTIPOP_OFF 0x1 +#define INNO_R09_HP_ANTIPOP_ON 0x2 +#define INNO_R09_HPR_ANITPOP_SHIFT 0 +#define INNO_R09_HPL_ANITPOP_SHIFT 2 +#define INNO_R09_HPR_MUTE_SHIFT 4 +#define INNO_R09_HPL_MUTE_SHIFT 5 +#define INNO_R09_DACR_SWITCH_SHIFT 6 +#define INNO_R09_DACL_SWITCH_SHIFT 7 + +#define INNO_R10_CHARGE_SEL_CUR_400I_YES (0x0 << 0) +#define INNO_R10_CHARGE_SEL_CUR_400I_NO (0x1 << 0) +#define INNO_R10_CHARGE_SEL_CUR_260I_YES (0x0 << 1) +#define INNO_R10_CHARGE_SEL_CUR_260I_NO (0x1 << 1) +#define INNO_R10_CHARGE_SEL_CUR_130I_YES (0x0 << 2) +#define INNO_R10_CHARGE_SEL_CUR_130I_NO (0x1 << 2) +#define INNO_R10_CHARGE_SEL_CUR_100I_YES (0x0 << 3) +#define INNO_R10_CHARGE_SEL_CUR_100I_NO (0x1 << 3) +#define INNO_R10_CHARGE_SEL_CUR_050I_YES (0x0 << 4) +#define INNO_R10_CHARGE_SEL_CUR_050I_NO (0x1 << 4) +#define INNO_R10_CHARGE_SEL_CUR_027I_YES (0x0 << 5) +#define INNO_R10_CHARGE_SEL_CUR_027I_NO (0x1 << 5) + +#define INNO_R10_MAX_CUR (INNO_R10_CHARGE_SEL_CUR_400I_YES | \ + INNO_R10_CHARGE_SEL_CUR_260I_YES | \ + INNO_R10_CHARGE_SEL_CUR_130I_YES | \ + INNO_R10_CHARGE_SEL_CUR_100I_YES | \ + INNO_R10_CHARGE_SEL_CUR_050I_YES | \ + INNO_R10_CHARGE_SEL_CUR_027I_YES) + +#endif -- 2.6.2

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[alsa-devel] Applied "ASoC: rk3036: fix platform_no_drv_owner.cocci warnings" to the asoc tree
by Mark Brown 23 Nov '15

23 Nov '15

The patch ASoC: rk3036: fix platform_no_drv_owner.cocci warnings has been applied to the asoc tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From da46cd9e12397ef609431b52e2ce5f595cff78cf Mon Sep 17 00:00:00 2001 From: kbuild test robot <lkp(a)intel.com> Date: Mon, 9 Nov 2015 11:13:55 +0800 Subject: [PATCH] ASoC: rk3036: fix platform_no_drv_owner.cocci warnings sound/soc/codecs/inno_rk3036.c:480:3-8: No need to set .owner here. The core will do it. Remove .owner field if calls are used which set it automatically Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci Signed-off-by: Fengguang Wu <fengguang.wu(a)intel.com> Signed-off-by: Mark Brown <broonie(a)kernel.org> --- sound/soc/codecs/inno_rk3036.c | 1 - 1 file changed, 1 deletion(-) diff --git a/sound/soc/codecs/inno_rk3036.c b/sound/soc/codecs/inno_rk3036.c index 24677a831c00..9b6e8840a1b5 100644 --- a/sound/soc/codecs/inno_rk3036.c +++ b/sound/soc/codecs/inno_rk3036.c @@ -477,7 +477,6 @@ MODULE_DEVICE_TABLE(of, rk3036_codec_of_match); static struct platform_driver rk3036_codec_platform_driver = { .driver = { .name = "rk3036-codec-platform", - .owner = THIS_MODULE, .of_match_table = of_match_ptr(rk3036_codec_of_match), }, .probe = rk3036_codec_platform_probe, -- 2.6.2

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[alsa-devel] Applied "ASoC: rk3036: Add binding doc of inno-rk3036 codec driver" to the asoc tree
by Mark Brown 23 Nov '15

23 Nov '15

The patch ASoC: rk3036: Add binding doc of inno-rk3036 codec driver has been applied to the asoc tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From 5f4f276077aeada88c3a7b9f1128c9c6284261cd Mon Sep 17 00:00:00 2001 From: ZhengShunQian <zhengsq(a)rock-chips.com> Date: Mon, 9 Nov 2015 10:10:20 +0800 Subject: [PATCH] ASoC: rk3036: Add binding doc of inno-rk3036 codec driver This patch add the binding document of inno-rk3036 audio codec driver. Signed-off-by: ZhengShunQian <zhengsq(a)rock-chips.com> Signed-off-by: Mark Brown <broonie(a)kernel.org> --- .../devicetree/bindings/sound/inno-rk3036.txt | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/inno-rk3036.txt diff --git a/Documentation/devicetree/bindings/sound/inno-rk3036.txt b/Documentation/devicetree/bindings/sound/inno-rk3036.txt new file mode 100644 index 000000000000..758de8e27561 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/inno-rk3036.txt @@ -0,0 +1,20 @@ +Inno audio codec for RK3036 + +Inno audio codec is integrated inside RK3036 SoC. + +Required properties: +- compatible : Should be "rockchip,rk3036-codec". +- reg : The registers of codec. +- clock-names : Should be "acodec_pclk". +- clocks : The clock of codec. +- rockchip,grf : The phandle of grf device node. + +Example: + + acodec: acodec-ana@20030000 { + compatible = "rk3036-codec"; + reg = <0x20030000 0x4000>; + rockchip,grf = <&grf>; + clock-names = "acodec_pclk"; + clocks = <&cru ACLK_VCODEC>; + }; -- 2.6.2

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