August 2013 - Alsa-devel - mailman.alsa-project.org

[alsa-devel] [PATCH] ASoC: spdif: Add stub DAPM widgets for Rx
by Mark Brown 19 Aug '13

19 Aug '13

From: Mark Brown <broonie(a)linaro.org> Ensure that the driver continues to work with mandatory DAPM. Signed-off-by: Mark Brown <broonie(a)linaro.org> --- sound/soc/codecs/spdif_receiver.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/spdif_receiver.c b/sound/soc/codecs/spdif_receiver.c index 26d3474..d5463c0 100644 --- a/sound/soc/codecs/spdif_receiver.c +++ b/sound/soc/codecs/spdif_receiver.c @@ -23,13 +23,26 @@ #include <sound/initval.h> #include <linux/of.h> +static const struct snd_soc_dapm_widget dir_widgets[] = { + SND_SOC_DAPM_INPUT("spdif-in"), +}; + +static const const struct snd_soc_dapm_route dir_routes[] = { + { "Capture", NULL, "spdif-in" }, +}; + #define STUB_RATES SNDRV_PCM_RATE_8000_192000 #define STUB_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \ SNDRV_PCM_FMTBIT_S20_3LE | \ SNDRV_PCM_FMTBIT_S24_LE | \ SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE) -static struct snd_soc_codec_driver soc_codec_spdif_dir; +static struct snd_soc_codec_driver soc_codec_spdif_dir = { + .dapm_widgets = dir_widgets, + .num_dapm_widgets = ARRAY_SIZE(dir_widgets), + .dapm_routes = dir_routes, + .num_dapm_routes = ARRAY_SIZE(dir_routes), +}; static struct snd_soc_dai_driver dir_stub_dai = { .name = "dir-hifi", -- 1.8.4.rc3

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[alsa-devel] [PATCH] ALSA: hda - Limit internal mic boost for another Thinkpad machine
by David Henningsson 19 Aug '13

19 Aug '13

The higher mic boosts (on internal mic) are so noisy they're unusable in practice. BugLink: https://bugs.launchpad.net/bugs/1213820 Signed-off-by: David Henningsson <david.henningsson(a)canonical.com> --- sound/pci/hda/patch_realtek.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index d67a48c..ef09fbc 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -3704,6 +3704,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { SND_PCI_QUIRK(0x17aa, 0x21fb, "Thinkpad T430s", ALC269_FIXUP_LENOVO_DOCK), SND_PCI_QUIRK(0x17aa, 0x2203, "Thinkpad X230 Tablet", ALC269_FIXUP_LENOVO_DOCK), SND_PCI_QUIRK(0x17aa, 0x2208, "Thinkpad T431s", ALC269_FIXUP_LENOVO_DOCK), + SND_PCI_QUIRK(0x17aa, 0x220c, "Thinkpad", ALC269_FIXUP_LIMIT_INT_MIC_BOOST), SND_PCI_QUIRK(0x17aa, 0x2214, "Thinkpad", ALC269_FIXUP_LIMIT_INT_MIC_BOOST), SND_PCI_QUIRK(0x17aa, 0x2215, "Thinkpad", ALC269_FIXUP_LIMIT_INT_MIC_BOOST), SND_PCI_QUIRK(0x17aa, 0x5013, "Thinkpad", ALC269_FIXUP_LIMIT_INT_MIC_BOOST), -- 1.7.9.5

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Re: [alsa-devel] [PATCH v6 1/2] ASoC: fsl: Add S/PDIF CPU DAI driver
by Nicolin Chen 19 Aug '13

19 Aug '13

On Mon, Aug 19, 2013 at 02:31:47PM +0800, Bhushan Bharat-R65777 wrote: > > > > We here suppose the reset bit would be cleared -- "The software > > > > reset will last > > > > 8 cycles." from RM, so if this happened to be a failure, the whole > > > > IP module won't be normally working as well. > > > > > > Also add a comment describing this against why cycle = 1000 is selected. > > > > If it is done in 8 cycles, 1000-cycle will be surely a safe value for it. > > As long as it finished in 8 cycles, it would quit anyway. Why against? > > I am not against, I am saying why it was not 200 or 50 or 20 etc. I am saying that write a comment saying this much is sufficient as per specification and so keep 1000/etc as preservative. I did't mean that. The 'against' is from "Also add a comment describing this 'against' why cycle = 1000 is selected." Well, if you insist this extra comment for easy-understand, I'll add them Thank you. Nicolin Chen

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Re: [alsa-devel] [PATCH v6 1/2] ASoC: fsl: Add S/PDIF CPU DAI driver
by Nicolin Chen 19 Aug '13

19 Aug '13

Hi Bhushan, I'll revise some as you suggest. Just a few replies here. On Mon, Aug 19, 2013 at 12:38:11PM +0800, Bhushan Bharat-R65777 wrote: > > We here suppose the reset bit would be cleared -- "The software reset will last > > 8 cycles." from RM, so if this happened to be a failure, the whole IP module > > won't be normally working as well. > > Also add a comment describing this against why cycle = 1000 is selected. If it is done in 8 cycles, 1000-cycle will be surely a safe value for it. As long as it finished in 8 cycles, it would quit anyway. Why against? > > > > +static bool fsl_spdif_volatile_reg(struct device *dev, unsigned int reg) > > > > +{ > > > > + /* Sync all registers after reset */ > > > > > > Where us sync :) ? > > > > The "return true" would do that. For volatile registers, if no "return true" > > here, the whole regmap would use the value in cache, while for some bits > > we need to trace its true value from the physical registers not from cache. > > Where will be device registers cached? Do not we program them to be non-cacheable in core? regmap has a regcache for all the mapped registers. Set the regsiters as volatile will allow the driver to sync the regcache with physical memory each time when using regmap_read/write/update_bits(). But I think I can try to use the regcache_bypass instead. Thank you, Nicolin Chen

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Re: [alsa-devel] [PATCH v6 1/2] ASoC: fsl: Add S/PDIF CPU DAI driver
by Nicolin Chen 19 Aug '13

19 Aug '13

Hi Bhushan, Thank you for the comments :) I'll fix some in v7. Here is my some replies to you. On Sat, Aug 17, 2013 at 02:24:19AM +0800, Bhushan Bharat-R65777 wrote: > > This patch add S/PDIF controller driver for Freescale SoC. > > Please give some more description of the driver? I've referred some ASoC drivers, all of them seem to be brief as mine. So I'm not sure what else information I should provide here. It's already kinda okay to me. > > +struct spdif_mixer_control { > > + /* buffer ptrs for writer */ > > + u32 upos; > > + u32 qpos; > > They does not look like pointer? They are more like offsets to get the correspond pointer. But I'll change the confusing comments. > > +/* U/Q Channel receive register full */ > > +static void spdif_irq_uqrx_full(struct fsl_spdif_priv *spdif_priv, char name) > > +{ > > + struct spdif_mixer_control *ctrl = &spdif_priv->fsl_spdif_control; > > + struct regmap *regmap = spdif_priv->regmap; > > + struct platform_device *pdev = spdif_priv->pdev; > > + u32 *pos, size, val, reg; > > + > > + switch (name) { > > + case 'U': > > + pos = &ctrl->upos; > > + size = SPDIF_UBITS_SIZE; > > + reg = REG_SPDIF_SRU; > > + break; > > + case 'Q': > > + pos = &ctrl->qpos; > > + size = SPDIF_QSUB_SIZE; > > + reg = REG_SPDIF_SRQ; > > + break; > > + default: > > + return; > > Should return error. IMHO, this should be fine. It's a void type function and being used in the isr(). The params 'name' is totally controlled by driver itself, so basically we don't need to worry about the default path. > > + if (*pos >= size * 2) { > > + *pos = 0; > > + } else if (unlikely((*pos % size) + 3 > size)) { > > + dev_err(&pdev->dev, "User bit receivce buffer overflow\n"); > > + return; > > Should return error. Ditto, it's being used in isr(), we don't need to detect the return value, just use dev_err() to warn users and let the driver clear the irq. > > +/* U/Q Channel framing error */ > > +static void spdif_irq_uq_err(struct fsl_spdif_priv *spdif_priv) > > +{ > > + struct spdif_mixer_control *ctrl = &spdif_priv->fsl_spdif_control; > > + struct regmap *regmap = spdif_priv->regmap; > > + struct platform_device *pdev = spdif_priv->pdev; > > + u32 val; > > + > > + dev_dbg(&pdev->dev, "isr: U/Q Channel framing error\n"); > > + > > + /* read U/Q data and do buffer reset */ > > + regmap_read(regmap, REG_SPDIF_SRU, &val); > > + regmap_read(regmap, REG_SPDIF_SRQ, &val); > > Above prints says read u/q data and buffer reset, what is buffer reset? Is that read on clear? That's the behavior needed by IP, according to the reference manual: "U Channel receive register full, can't be cleared with reg. IntClear. To clear it, read from U Rx reg." and "Q Channel receive register full, can't be cleared with reg. IntClear. To clear it, read from Q Rx reg." > > +static void spdif_softreset(struct fsl_spdif_priv *spdif_priv) > > +{ > > + struct regmap *regmap = spdif_priv->regmap; > > + u32 val, cycle = 1000; > > + > > + regmap_write(regmap, REG_SPDIF_SCR, SCR_SOFT_RESET); > > + regcache_sync(regmap); > > + > > + /* RESET bit would be cleared after finishing its reset procedure */ > > + do { > > + regmap_read(regmap, REG_SPDIF_SCR, &val); > > + } while ((val & SCR_SOFT_RESET) && cycle--); > > What if reset is not cleared and timeout happen? We here suppose the reset bit would be cleared -- "The software reset will last 8 cycles." from RM, so if this happened to be a failure, the whole IP module won't be normally working as well. Well, but I don't mind to put here an extra failed return to make it clear. > > +static u8 reverse_bits(u8 input) > > +{ > > + u8 tmp = input; > > + > > + tmp = ((tmp & 0b10101010) >> 1) | ((tmp << 1) & 0b10101010); > > + tmp = ((tmp & 0b11001100) >> 2) | ((tmp << 2) & 0b11001100); > > + tmp = ((tmp & 0b11110000) >> 4) | ((tmp << 4) & 0b11110000); > > What is this logic, can the hardcoding be removed and some description on above calculation? This was provided by Philipp Zabel in his review at patch v3. It's pretty clear to me that it just reverses the bits for u8. I don't think this logic has any problem and the mask here doesn't look like any hardcode to me. > > +static bool fsl_spdif_volatile_reg(struct device *dev, unsigned int reg) > > +{ > > + /* Sync all registers after reset */ > > Where us sync :) ? The "return true" would do that. For volatile registers, if no "return true" here, the whole regmap would use the value in cache, while for some bits we need to trace its true value from the physical registers not from cache. Best regards, Nicolin Chen

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[alsa-devel] [PATCH 0/4] clk: Samsung: audss: Add support for Exynos5420
by Padmavathi Venna 18 Aug '13

18 Aug '13

This patch set adds support for audio subsystem clks on Exynos5420. Exynos5420 audio subsystem has a gate bit for ADMA controller and the some of parent clks for mout_i2s are also different from Exynos5250. So this patch adds provision for supporting both the platforms by passing the parent clk names through device tree. Andrew Bresticker (3): clk: exynos-audss: add support for Exynos 5420 clk: exynos-audss: allow input clocks to be specified in device tree ARM: dts: exynos5420: add audio clock controller Padmavathi Venna (1): ARM: dts: Correct the /include entry on exynos5420 dtsi file .../devicetree/bindings/clock/clk-exynos-audss.txt | 38 +++++++++++++++++-- arch/arm/boot/dts/exynos5420.dtsi | 13 ++++++- drivers/clk/samsung/clk-exynos-audss.c | 36 ++++++++++++++++-- include/dt-bindings/clk/exynos-audss-clk.h | 3 +- 4 files changed, 80 insertions(+), 10 deletions(-) -- 1.7.4.4

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[alsa-devel] [PATCH] ASoC: wm8782: Add DAPM support
by Mark Brown 18 Aug '13

18 Aug '13

From: Mark Brown <broonie(a)linaro.org> In order to make the device easier to hook up to external components in system designs and ensure operation when DAPM support becomes mandatory add DAPM support. Signed-off-by: Mark Brown <broonie(a)linaro.org> --- sound/soc/codecs/wm8782.c | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm8782.c b/sound/soc/codecs/wm8782.c index f1fdbf6..8092495 100644 --- a/sound/soc/codecs/wm8782.c +++ b/sound/soc/codecs/wm8782.c @@ -26,6 +26,16 @@ #include <sound/initval.h> #include <sound/soc.h> +static const struct snd_soc_dapm_widget wm8782_dapm_widgets[] = { +SND_SOC_DAPM_INPUT("AINL"), +SND_SOC_DAPM_INPUT("AINR"), +}; + +static const struct snd_soc_dapm_route wm8782_dapm_routes[] = { + { "Capture", NULL, "AINL" }, + { "Capture", NULL, "AINR" }, +}; + static struct snd_soc_dai_driver wm8782_dai = { .name = "wm8782", .capture = { @@ -40,7 +50,12 @@ static struct snd_soc_dai_driver wm8782_dai = { }, }; -static struct snd_soc_codec_driver soc_codec_dev_wm8782; +static struct snd_soc_codec_driver soc_codec_dev_wm8782 = { + .dapm_widgets = wm8782_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(wm8782_dapm_widgets), + .dapm_routes = wm8782_dapm_routes, + .num_dapm_routes = ARRAY_SIZE(wm8782_dapm_routes), +}; static int wm8782_probe(struct platform_device *pdev) { -- 1.8.4.rc3

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[alsa-devel] [PATCH] ASoC: wm8727: Add DAPM support
by Mark Brown 18 Aug '13

18 Aug '13

From: Mark Brown <broonie(a)linaro.org> In order to make the device easier to hook up to external components in system designs and ensure operation when DAPM support becomes mandatory add DAPM support. Signed-off-by: Mark Brown <broonie(a)linaro.org> --- sound/soc/codecs/wm8727.c | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm8727.c b/sound/soc/codecs/wm8727.c index 462f5e4..7b1a6d5 100644 --- a/sound/soc/codecs/wm8727.c +++ b/sound/soc/codecs/wm8727.c @@ -23,6 +23,16 @@ #include <sound/initval.h> #include <sound/soc.h> +static const struct snd_soc_dapm_widget wm8727_dapm_widgets[] = { +SND_SOC_DAPM_OUTPUT("VOUTL"), +SND_SOC_DAPM_OUTPUT("VOUTR"), +}; + +static const struct snd_soc_dapm_route wm8727_dapm_routes[] = { + { "VOUTL", NULL, "Playback" }, + { "VOUTR", NULL, "Playback" }, +}; + /* * Note this is a simple chip with no configuration interface, sample rate is * determined automatically by examining the Master clock and Bit clock ratios @@ -43,7 +53,12 @@ static struct snd_soc_dai_driver wm8727_dai = { }, }; -static struct snd_soc_codec_driver soc_codec_dev_wm8727; +static struct snd_soc_codec_driver soc_codec_dev_wm8727 = { + .dapm_widgets = wm8727_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(wm8727_dapm_widgets), + .dapm_routes = wm8727_dapm_routes, + .num_dapm_routes = ARRAY_SIZE(wm8727_dapm_routes), +}; static int wm8727_probe(struct platform_device *pdev) { -- 1.8.4.rc3

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[alsa-devel] [PATCH] ASoC: wl1273: Add stub DAPM support
by Mark Brown 18 Aug '13

18 Aug '13

From: Mark Brown <broonie(a)linaro.org> In order to ensure that the device continues to work with DAPM support being mandatory provide stub DAPM widgets and routes. Note that the public information on the device appears to make no mention of the FM support the driver appears to have. Signed-off-by: Mark Brown <broonie(a)linaro.org> --- sound/soc/codecs/wl1273.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/sound/soc/codecs/wl1273.c b/sound/soc/codecs/wl1273.c index 54cd3da..b7ab2ef 100644 --- a/sound/soc/codecs/wl1273.c +++ b/sound/soc/codecs/wl1273.c @@ -290,6 +290,18 @@ static const struct snd_kcontrol_new wl1273_controls[] = { snd_wl1273_fm_volume_get, snd_wl1273_fm_volume_put), }; +static const struct snd_soc_dapm_widget wl1273_dapm_widgets[] = { + SND_SOC_DAPM_INPUT("RX"), + + SND_SOC_DAPM_OUTPUT("TX"), +}; + +static const struct snd_soc_dapm_route wl1273_dapm_routes[] = { + { "Capture", NULL, "RX" }, + + { "TX", NULL, "Playback" }, +}; + static int wl1273_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) { @@ -483,6 +495,11 @@ static int wl1273_remove(struct snd_soc_codec *codec) static struct snd_soc_codec_driver soc_codec_dev_wl1273 = { .probe = wl1273_probe, .remove = wl1273_remove, + + .dapm_widgets = wl1273_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(wl1273_dapm_widgets), + .dapm_routes = wl1273_dapm_routes, + .num_dapm_routes = ARRAY_SIZE(wl1273_dapm_routes), }; static int wl1273_platform_probe(struct platform_device *pdev) -- 1.8.4.rc3

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[alsa-devel] [PATCH 1/1] ASoC: wm8960: Fix PLL register writes
by Mike Dyer 18 Aug '13

18 Aug '13

Bit 9 of PLL2,3 and 4 is reserved as '0'. The 24bit fractional part should be split across each register in 8bit chunks. Signed-off-by: Mike Dyer <mike.dyer(a)md-soft.co.uk> --- sound/soc/codecs/wm8960.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/wm8960.c b/sound/soc/codecs/wm8960.c index 0a4ffdd..5e5af89 100644 --- a/sound/soc/codecs/wm8960.c +++ b/sound/soc/codecs/wm8960.c @@ -857,9 +857,9 @@ static int wm8960_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, if (pll_div.k) { reg |= 0x20; - snd_soc_write(codec, WM8960_PLL2, (pll_div.k >> 18) & 0x3f); - snd_soc_write(codec, WM8960_PLL3, (pll_div.k >> 9) & 0x1ff); - snd_soc_write(codec, WM8960_PLL4, pll_div.k & 0x1ff); + snd_soc_write(codec, WM8960_PLL2, (pll_div.k >> 16) & 0xff); + snd_soc_write(codec, WM8960_PLL3, (pll_div.k >> 8) & 0xff); + snd_soc_write(codec, WM8960_PLL4, pll_div.k & 0xff); } snd_soc_write(codec, WM8960_PLL1, reg); -- 1.8.3.1

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