August 2009 - Alsa-devel - mailman.alsa-project.org

[alsa-devel] Question to sophisticated alsa developer
by Andreas Bießmann 05 Aug '09

05 Aug '09

Hi all, I currently test alsa playback on AVR32 board with atmel's abdac driver. My environment is 2.6.30.4 customized kernel (customization for my own board), rootfs and toolchain made of customized buildroot from atmel. I use alsa-lib 1.0.20 with patch [1] applied and alsa-utils with patch [2] applied. The alsa code does compile and work fine (aside from my problem described some lines later). My test case is a sine wave file with 440Hz tone, samplerate is 17089 (cause of samplerate abdac driver offers and to avoid resampling in alsa-lib) playing with aplay. This works fine, I see a 440Hz sine wave on my oscilloscope and there is no effect as described later on. My problem is when I'm enabling dmix layer to run concurrent aplay processes I always get a click at the end of my last played sine wave file. My Oscilloscope shows me that there is sometimes a short part of a single or somtimes multiple sine period(s) moved down (or up) to mid value (I can supply a screenshot of oscilloscope, if this description is not clear enough). Mostly this effect is about 500 us long. The sine wave is missing the information at this position, it is no delay of the analog value at this position. If I overlay a correct sine wave the following part after the problematic position matches exactly the overlayed sine wave. I investigated that this problem always occur somewhere at the end of dmix. When I play a long "null" sample and start repeated play of my short sine wave sample the effect is not there while the null sample is playing. After ending of null sample the described effect appears instantly on each end of my repeated test sample. Here is my asound.conf to enable dmix layer for alsa: ---8<--- pcm.!default { type plug slave.pcm "dmixer" } ctl.mixer0 { type hw card 0 } pcm.!plughw { type plug slave.pcm "dmixer" } pcm.dmixer { type dmix ipc_key 1024 slave { pcm "hw:0" format S16_BE rate 17089 } bindings { 0 0 1 1 } slowptr false } ctl.dmixer { type hw card 0 } --->8--- Maybe there is already a bloomer in. I have tried to change slowptr stuff in pcm.dmixer without any effect to my problem. I also tried to change buffer sizes in dmixer's slave but these changes had no effect. I also tried some changes in kernel driver for ABDAC. I played a bit with periods_min and period_bytes_min without effect to my problem. The buffer_size in "Direct Stream Mixing PCM" is fixed to the value in "hw:0". But if I double the periods_min in Kernel (default: 6 periods_min, 64 periods_max) for "hw:0" the maximum value for buffer_size in "Direct Stream Mixing PCM" is fixed to 8192. The "Route conversion" layer has always the buffer_size value of the next layer. This is 8192 for doubled periods_min in kernel and dmix enabled and 12288 for doubled periods_min and dmix disabled. Any advice to this "feature"? Here is the output of aplay -v for dmix enabled: ---8<--- # aplay -v sin_440_17089_1sec.wav Playing WAVE 'sin_440_17089_1sec.wav' : Signed 16 bit Little Endian, Rate 17089 Hz, Mono Plug PCM: Route conversion PCM (sformat=S16_BE) Transformation table: 0 <- 0 1 <- 0 Its setup is: stream : PLAYBACK access : RW_INTERLEAVED format : S16_LE subformat : STD channels : 1 rate : 17089 exact rate : 17089 (17089/1) msbits : 16 buffer_size : 8192 period_size : 1024 period_time : 59921 tstamp_mode : NONE period_step : 1 avail_min : 1024 period_event : 0 start_threshold : 8192 stop_threshold : 8192 silence_threshold: 0 silence_size : 0 boundary : 1073741824 Slave: Direct Stream Mixing PCM Its setup is: stream : PLAYBACK access : MMAP_INTERLEAVED format : S16_BE subformat : STD channels : 2 rate : 17089 exact rate : 17089 (17089/1) msbits : 16 buffer_size : 8192 period_size : 1024 period_time : 59921 tstamp_mode : NONE period_step : 1 avail_min : 1024 period_event : 0 start_threshold : 8192 stop_threshold : 8192 silence_threshold: 0 silence_size : 0 boundary : 1073741824 Hardware PCM card 0 'Atmel ABDAC' device 0 subdevice 0 Its setup is: stream : PLAYBACK access : MMAP_INTERLEAVED format : S16_BE subformat : STD channels : 2 rate : 17089 exact rate : 17089 (17089/1) msbits : 16 buffer_size : 12288 period_size : 1024 period_time : 59921 tstamp_mode : ENABLE period_step : 1 avail_min : 1024 period_event : 0 start_threshold : 1 stop_threshold : 1610612736 silence_threshold: 0 silence_size : 1610612736 boundary : 1610612736 appl_ptr : 0 hw_ptr : 0 --->8--- And here the output of aplay -v without dmix: ---8<--- # aplay -v sin_440_17089_1sec.wav Playing WAVE 'sin_440_17089_1sec.wav' : Signed 16 bit Little Endian, Rate 17089 Hz, Mono Plug PCM: Route conversion PCM (sformat=S16_BE) Transformation table: 0 <- 0 1 <- 0 Its setup is: stream : PLAYBACK access : RW_INTERLEAVED format : S16_LE subformat : STD channels : 1 rate : 17089 exact rate : 17089 (17089/1) msbits : 16 buffer_size : 12288 period_size : 1024 period_time : 59921 tstamp_mode : NONE period_step : 1 avail_min : 1024 period_event : 0 start_threshold : 12288 stop_threshold : 12288 silence_threshold: 0 silence_size : 0 boundary : 1610612736 Slave: Hardware PCM card 0 'Atmel ABDAC' device 0 subdevice 0 Its setup is: stream : PLAYBACK access : MMAP_INTERLEAVED format : S16_BE subformat : STD channels : 2 rate : 17089 exact rate : 17089 (17089/1) msbits : 16 buffer_size : 12288 period_size : 1024 period_time : 59921 tstamp_mode : NONE period_step : 1 avail_min : 1024 period_event : 0 start_threshold : 12288 stop_threshold : 12288 silence_threshold: 0 silence_size : 0 boundary : 1610612736 appl_ptr : 0 hw_ptr : 0 --->8--- Well, currently I have no more ideas where to dig for my problem. I do need a mixing layer to allow two or three concurrent aplay instances at the same time but the output in this case is (atm) worse. Has anyone some advice where to search for a solution to my problem. Or has anybody some advice to use another feature of alsa to allow concurrent aplay processes? regards Andreas Bießmann [1] http://git.buildroot.net/buildroot/tree/package/multimedia/alsa-lib/alsa-li… [2] http://git.buildroot.net/buildroot/tree/package/multimedia/alsa-utils/alsa-…

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[alsa-devel] pyalsa: synchronizing queue with MIDI clock events
by Christopher Arndt 05 Aug '09

05 Aug '09

Hi everybody, this is my first post on this list, so please excuse me, should it not be the right place to post this. I started exploring programming the ALSA sequencer via the pyalsa Python interface, i.e the alsaseq module. I wrote a small utility that reads MIDI events from one port, filters/processes them and writes it to another. This allows for routing by channel, note range, controller number etc. and to filter out, replace or add MIDI events. Now to synchronize the queue tempo to incoming MIDI clock events, to be able implement synchronized delays or arpeggiators, I use the method in the code shown below. This works ok, but I notice that the measured BPM oscillates +-1 BPM around the value displayed by the clock source (my synth's sequencer) if I measure/average only a few (~10) ticks or do not round the result to an integer value. Is this the right approach? What is a sensible number of ticks to take into account for measurement? Should I use another reference timer than Python's time.time() function? Is pyalsa generally suitable for this kind of application even on older/weaker hardware (e.g. a NSLU2)? Any comments or suggestions for improvement would be very much appreciated! Chris class MidiProcessor(object): def run(self): # This is simplified to only show the general logic while True: events = self.sequencer.receive_events( timeout=RECEIVE_TIMEOUT, maxevents=1) for event in events: if event.type == SEQ_EVENT_CLOCK: self.sync_queue(event) else: # do other MIDI processing / routing def sync_queue(self, event): """Sync queue tempo to incoming MIDI clock events.""" # list to collect the timestamps of the last few ticks lt = self._last_ticks lt.append(time.time()) ltlen = len(lt) if ltlen > 1: # calculate & set bpm: calculate difference between # the times the last few ticks were received and average # all results avg_delta = sum( [y-x for x,y in zip(lt, lt[1:])]) / (ltlen-1) # tick length is a 24th of a quarter note bpm = round(60 / avg_delta / 24) if bpm != self.bpm: self.bpm = bpm self.sequencer.queue_tempo(self.queue, tempo=int(6e7 / self.bpm), ppq=self.ppq) # only remember last 24 received ticks # (length of a quarter note) if ltlen > 24: lt.pop(0)

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[alsa-devel] [PATCH 3/3] ASoC: add machine driver for i.mx27_visstrim_m10 board
by javier Martin 05 Aug '09

05 Aug '09

This adds support for i.mx27_visstrim_sm10 board machine driver which uses an i.mx27 processor plus a wm8974 codec. It has been tested on a visstrim_sm10 board. Signed-off-by: Javier Martin <javier.martin(a)vista-silicon.com> --- sound/soc/imx/Kconfig | 8 + sound/soc/imx/Makefile | 4 + sound/soc/imx/mx27vis_wm8974.c | 317 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 329 insertions(+), 0 deletions(-) diff --git a/sound/soc/imx/Kconfig b/sound/soc/imx/Kconfig index 886dadd..2c6f568 100644 --- a/sound/soc/imx/Kconfig +++ b/sound/soc/imx/Kconfig @@ -9,5 +9,13 @@ config SND_MX1_MX2_SOC config SND_MXC_SOC_SSI tristate +config SND_SOC_MX27VIS_WM8974 + tristate "SoC Audio support for MX27 - WM8974 Visstrim_sm10 board" + depends on SND_MX1_MX2_SOC && MACH_MX27 && MACH_IMX27_VISSTRIM_M10 + select SND_MXC_SOC_SSI + select SND_SOC_WM8974 + help + Say Y if you want to add support for SoC audio on Visstrim SM10 + board with WM8974. diff --git a/sound/soc/imx/Makefile b/sound/soc/imx/Makefile index 6552cb2..c2ffd2c 100644 --- a/sound/soc/imx/Makefile +++ b/sound/soc/imx/Makefile @@ -4,3 +4,7 @@ snd-soc-mxc-ssi-objs := mxc-ssi.o obj-$(CONFIG_SND_MX1_MX2_SOC) += snd-soc-mx1_mx2.o obj-$(CONFIG_SND_MXC_SOC_SSI) += snd-soc-mxc-ssi.o + +# i.MX Machine Support +snd-soc-mx27vis-wm8974-objs := mx27vis_wm8974.o +obj-$(CONFIG_SND_SOC_MX27VIS_WM8974) += snd-soc-mx27vis-wm8974.o diff --git a/sound/soc/imx/mx27vis_wm8974.c b/sound/soc/imx/mx27vis_wm8974.c new file mode 100644 index 0000000..e4dcb53 --- /dev/null +++ b/sound/soc/imx/mx27vis_wm8974.c @@ -0,0 +1,317 @@ +/* + * mx27vis_wm8974.c -- SoC audio for mx27vis + * + * Copyright 2009 Vista Silicon S.L. + * Author: Javier Martin + * javier.martin(a)vista-silicon.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ + +#include <linux/module.h> +#include <linux/moduleparam.h> +#include <linux/device.h> +#include <linux/i2c.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/soc.h> +#include <sound/soc-dapm.h> + + +#include "../codecs/wm8974.h" +#include "mx1_mx2-pcm.h" +#include "mxc-ssi.h" +#include <mach/gpio.h> +#include <mach/iomux.h> + +#define IGNORED_ARG 0 + + +static struct snd_soc_card mx27vis; + +/** + * This function connects SSI1 (HPCR1) as slave to + * SSI1 external signals (PPCR1) + * As slave, HPCR1 must set TFSDIR and TCLKDIR as inputs from + * port 4 + */ +void audmux_connect_1_4(void) +{ + pr_debug("AUDMUX: normal operation mode\n"); + /* Reset HPCR1 and PPCR1 */ + + DAM_HPCR1 = 0x00000000; + DAM_PPCR1 = 0x00000000; + + /* set to synchronous */ + DAM_HPCR1 |= AUDMUX_HPCR_SYN; + DAM_PPCR1 |= AUDMUX_PPCR_SYN; + + + /* set Rx sources 1 <--> 4 */ + DAM_HPCR1 |= AUDMUX_HPCR_RXDSEL(3); /* port 4 */ + DAM_PPCR1 |= AUDMUX_PPCR_RXDSEL(0); /* port 1 */ + + /* set Tx frame and Clock direction and source 4 --> 1 output */ + DAM_HPCR1 |= AUDMUX_HPCR_TFSDIR | AUDMUX_HPCR_TCLKDIR; + DAM_HPCR1 |= AUDMUX_HPCR_TFCSEL(3); /* TxDS and TxCclk from port 4 */ + + return; +} + +static int mx27vis_hifi_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *codec_dai = rtd->dai->codec_dai; + struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; + unsigned int pll_out = 0, bclk = 0, fmt = 0, mclk = 0; + int ret = 0; + + /* + * The WM8974 is better at generating accurate audio clocks than the + * MX27 SSI controller, so we will use it as master when we can. + */ + switch (params_rate(params)) { + case 8000: + fmt = SND_SOC_DAIFMT_CBM_CFM; + mclk = WM8974_MCLKDIV_12; + pll_out = 24576000; + break; + case 16000: + fmt = SND_SOC_DAIFMT_CBM_CFM; + pll_out = 12288000; + break; + case 48000: + fmt = SND_SOC_DAIFMT_CBM_CFM; + bclk = WM8974_BCLKDIV_4; + pll_out = 12288000; + break; + case 96000: + fmt = SND_SOC_DAIFMT_CBM_CFM; + bclk = WM8974_BCLKDIV_2; + pll_out = 12288000; + break; + case 11025: + fmt = SND_SOC_DAIFMT_CBM_CFM; + bclk = WM8974_BCLKDIV_16; + pll_out = 11289600; + break; + case 22050: + fmt = SND_SOC_DAIFMT_CBM_CFM; + bclk = WM8974_BCLKDIV_8; + pll_out = 11289600; + break; + case 44100: + fmt = SND_SOC_DAIFMT_CBM_CFM; + bclk = WM8974_BCLKDIV_4; + mclk = WM8974_MCLKDIV_2; + pll_out = 11289600; + break; + case 88200: + fmt = SND_SOC_DAIFMT_CBM_CFM; + bclk = WM8974_BCLKDIV_2; + pll_out = 11289600; + break; + } + + /* set codec DAI configuration */ + ret = codec_dai->ops->set_fmt(codec_dai, + SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_IF | + SND_SOC_DAIFMT_SYNC | fmt); + if (ret < 0) { + printk(KERN_ERR "Error from codec DAI configuration\n"); + return ret; + } + + /* set cpu DAI configuration */ + ret = cpu_dai->ops->set_fmt(cpu_dai, + SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | + SND_SOC_DAIFMT_SYNC | fmt); + if (ret < 0) { + printk(KERN_ERR "Error from cpu DAI configuration\n"); + return ret; + } + + /* Put DC field of STCCR to 1 (not zero) */ + ret = cpu_dai->ops->set_tdm_slot(cpu_dai, 0, 2); + + /* set the SSI system clock as input */ + ret = cpu_dai->ops->set_sysclk(cpu_dai, IMX_SSP_SYS_CLK, 0, + SND_SOC_CLOCK_IN); + if (ret < 0) { + printk(KERN_ERR "Error when setting system SSI clk\n"); + return ret; + } + + /* set codec BCLK division for sample rate */ + ret = codec_dai->ops->set_clkdiv(codec_dai, WM8974_BCLKDIV, bclk); + if (ret < 0) { + printk(KERN_ERR "Error when setting BCLK division\n"); + return ret; + } + + + /* codec PLL input is 25 MHz */ + ret = codec_dai->ops->set_pll(codec_dai, IGNORED_ARG, + 25000000, pll_out); + if (ret < 0) { + printk(KERN_ERR "Error when setting PLL input\n"); + return ret; + } + + /*set codec MCLK division for sample rate */ + ret = codec_dai->ops->set_clkdiv(codec_dai, WM8974_MCLKDIV, mclk); + if (ret < 0) { + printk(KERN_ERR "Error when setting MCLK division\n"); + return ret; + } + + return 0; +} + +static int mx27vis_hifi_hw_free(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *codec_dai = rtd->dai->codec_dai; + + /* disable the PLL */ + return codec_dai->ops->set_pll(codec_dai, IGNORED_ARG, 0, 0); +} + +/* + * mx27vis WM8974 HiFi DAI opserations. + */ +static struct snd_soc_ops mx27vis_hifi_ops = { + .hw_params = mx27vis_hifi_hw_params, + .hw_free = mx27vis_hifi_hw_free, +}; + + +static int mx27vis_suspend(struct platform_device *pdev, pm_message_t state) +{ + return 0; +} + +static int mx27vis_resume(struct platform_device *pdev) +{ + return 0; +} + +static int mx27vis_probe(struct platform_device *pdev) +{ + int ret = 0; + + ret = get_ssi_clk(0, &pdev->dev); + + if (ret < 0) { + printk(KERN_ERR "%s: cant get ssi clock\n", __func__); + return ret; + } + + + return 0; +} + +static int mx27vis_remove(struct platform_device *pdev) +{ + put_ssi_clk(0); + return 0; +} + +static struct snd_soc_dai_link mx27vis_dai[] = { +{ /* Hifi Playback*/ + .name = "WM8974", + .stream_name = "WM8974 HiFi", + .cpu_dai = &imx_ssi_pcm_dai[0], + .codec_dai = &wm8974_dai, + .ops = &mx27vis_hifi_ops, +}, +}; + +static struct snd_soc_card mx27vis = { + .name = "mx27vis", + .platform = &mx1_mx2_soc_platform, + .probe = mx27vis_probe, + .remove = mx27vis_remove, + .suspend_pre = mx27vis_suspend, + .resume_post = mx27vis_resume, + .dai_link = mx27vis_dai, + .num_links = ARRAY_SIZE(mx27vis_dai), +}; + +static struct snd_soc_device mx27vis_snd_devdata = { + .card = &mx27vis, + .codec_dev = &soc_codec_dev_wm8974, +}; + +static struct platform_device *mx27vis_snd_device; + +/* Temporal definition of board specific behaviour */ +void gpio_ssi_active(int ssi_num) +{ + int ret = 0; + + unsigned int ssi1_pins[] = { + PC20_PF_SSI1_FS, + PC21_PF_SSI1_RXD, + PC22_PF_SSI1_TXD, + PC23_PF_SSI1_CLK, + }; + unsigned int ssi2_pins[] = { + PC24_PF_SSI2_FS, + PC25_PF_SSI2_RXD, + PC26_PF_SSI2_TXD, + PC27_PF_SSI2_CLK, + }; + if (ssi_num == 0) + ret = mxc_gpio_setup_multiple_pins(ssi1_pins, + ARRAY_SIZE(ssi1_pins), "USB OTG"); + else + ret = mxc_gpio_setup_multiple_pins(ssi2_pins, + ARRAY_SIZE(ssi2_pins), "USB OTG"); + if (ret) + printk(KERN_ERR "Error requesting ssi %x pins\n", ssi_num); +} + + +static int __init mx27vis_init(void) +{ + int ret; + + mx27vis_snd_device = platform_device_alloc("soc-audio", -1); + if (!mx27vis_snd_device) + return -ENOMEM; + + platform_set_drvdata(mx27vis_snd_device, &mx27vis_snd_devdata); + mx27vis_snd_devdata.dev = &mx27vis_snd_device->dev; + ret = platform_device_add(mx27vis_snd_device); + + if (ret) { + printk(KERN_ERR "ASoC: Platform device allocation failed\n"); + platform_device_put(mx27vis_snd_device); + } + + /* WM8974 uses SSI1 (HPCR1) via AUDMUX port 4 for audio (PPCR1) */ + gpio_ssi_active(0); + audmux_connect_1_4(); + + return ret; +} + +static void __exit mx27vis_exit(void) +{ + /* We should call some "ssi_gpio_inactive()" properly */ +} + +module_init(mx27vis_init); +module_exit(mx27vis_exit); + + +MODULE_AUTHOR("Javier Martin, javier.martin(a)vista-silicon.com"); +MODULE_DESCRIPTION("ALSA SoC WM8974 mx27vis"); +MODULE_LICENSE("GPL"); --- -- Javier Martin Vista Silicon S.L. Universidad de Cantabria CDTUC - FASE C - Oficina S-345 Avda de los Castros s/n 39005- Santander. Cantabria. Spain +34 942 25 32 60 www.vista-silicon.com

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[alsa-devel] [PATCH 1/6] pulse: replace manual mainloop by pa_mainloop_iterate()
by Lennart Poettering 05 Aug '09

05 Aug '09

The pa_mainloop_prepare()/_poll()/_dispatch() can be simplified by simply calling pa_mainloop_iterate() which does all this in one call. --- pulse/conf_pulse.c | 10 +--------- 1 files changed, 1 insertions(+), 9 deletions(-) diff --git a/pulse/conf_pulse.c b/pulse/conf_pulse.c index 3f9e071..35dd383 100644 --- a/pulse/conf_pulse.c +++ b/pulse/conf_pulse.c @@ -61,15 +61,7 @@ conf_pulse_hook_load_if_running(snd_config_t * root, snd_config_t * config, goto out; do { - err = pa_mainloop_prepare(loop, -1); - if (err < 0) - goto out; - - err = pa_mainloop_poll(loop); - if (err < 0) - goto out; - - err = pa_mainloop_dispatch(loop); + err = pa_mainloop_iterate(loop, 1, NULL); if (err < 0) goto out; -- 1.6.4 Lennart -- Lennart Poettering Red Hat, Inc. lennart [at] poettering [dot] net ICQ# 11060553 http://0pointer.net/lennart/ GnuPG 0x1A015CC4

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[alsa-devel] [PATCH 6/6] pulse: immediately trigger EIO when connection is dropped
by Lennart Poettering 05 Aug '09

05 Aug '09

When the connection is dropped notify the application immediately instead of waiting until the applications calls into us the next time. This makes "aplay" handle connections shutdown similar to hardware unplugs: an immediate EIO is thrown. --- pulse/pulse.c | 9 ++++++++- 1 files changed, 8 insertions(+), 1 deletions(-) diff --git a/pulse/pulse.c b/pulse/pulse.c index 9c05171..a94caaf 100644 --- a/pulse/pulse.c +++ b/pulse/pulse.c @@ -77,10 +77,17 @@ int pulse_wait_operation(snd_pulse_t * p, pa_operation * o) static void context_state_cb(pa_context * c, void *userdata) { + pa_context_state_t state; snd_pulse_t *p = userdata; assert(c); - switch (pa_context_get_state(c)) { + state = pa_context_get_state(c); + + /* When we get disconnected, tell the process */x + if (!PA_CONTEXT_IS_GOOD(state)) + pulse_poll_activate(p); + + switch (state) { case PA_CONTEXT_READY: case PA_CONTEXT_TERMINATED: case PA_CONTEXT_FAILED: -- 1.6.4 Lennart -- Lennart Poettering Red Hat, Inc. lennart [at] poettering [dot] net ICQ# 11060553 http://0pointer.net/lennart/ GnuPG 0x1A015CC4

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[alsa-devel] [PATCH 5/6] pulse: rework object destruction paths a bit
by Lennart Poettering 04 Aug '09

04 Aug '09

Make sure we deal better with partially initialized structs. Don't check for pointer state before calling free() since free() does that anyway. --- pulse/ctl_pulse.c | 7 ++----- pulse/pcm_pulse.c | 19 ++++++++++--------- 2 files changed, 12 insertions(+), 14 deletions(-) diff --git a/pulse/ctl_pulse.c b/pulse/ctl_pulse.c index 879f260..85863ed 100644 --- a/pulse/ctl_pulse.c +++ b/pulse/ctl_pulse.c @@ -606,11 +606,8 @@ static void pulse_close(snd_ctl_ext_t * ext) if (ctl->p) pulse_free(ctl->p); - if (ctl->source) - free(ctl->source); - if (ctl->sink) - free(ctl->sink); - + free(ctl->source); + free(ctl->sink); free(ctl); } diff --git a/pulse/pcm_pulse.c b/pulse/pcm_pulse.c index 98983f8..02a837e 100644 --- a/pulse/pcm_pulse.c +++ b/pulse/pcm_pulse.c @@ -819,21 +819,22 @@ static int pulse_close(snd_pcm_ioplug_t * io) assert(pcm); - pa_threaded_mainloop_lock(pcm->p->mainloop); + if (pcm->p && pcm->p->mainloop) { - if (pcm->stream) { - pa_stream_disconnect(pcm->stream); - pa_stream_unref(pcm->stream); - } + pa_threaded_mainloop_lock(pcm->p->mainloop); - pa_threaded_mainloop_unlock(pcm->p->mainloop); + if (pcm->stream) { + pa_stream_disconnect(pcm->stream); + pa_stream_unref(pcm->stream); + } + + pa_threaded_mainloop_unlock(pcm->p->mainloop); + } if (pcm->p) pulse_free(pcm->p); - if (pcm->device) - free(pcm->device); - + free(pcm->device); free(pcm); return 0; -- 1.6.4 Lennart -- Lennart Poettering Red Hat, Inc. lennart [at] poettering [dot] net ICQ# 11060553 http://0pointer.net/lennart/ GnuPG 0x1A015CC4

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[alsa-devel] [PATCH 4/6] pulse: unify stream/context state checks
by Lennart Poettering 04 Aug '09

04 Aug '09

Unify (and simplify) the paths that check for the validity of a stream/context: always call into check_stream()/pulse_check_connection() when applicable instead of rolling our own checks each time. Also check for validity of mainloop before locking it. --- pulse/ctl_pulse.c | 72 ++++++++++++++++++++++++++++++++---------- pulse/pcm_pulse.c | 90 +++++++++++++++++++++++----------------------------- 2 files changed, 95 insertions(+), 67 deletions(-) diff --git a/pulse/ctl_pulse.c b/pulse/ctl_pulse.c index 2caa29b..879f260 100644 --- a/pulse/ctl_pulse.c +++ b/pulse/ctl_pulse.c @@ -150,9 +150,13 @@ static int pulse_update_volume(snd_ctl_pulse_t * ctl) assert(ctl); - if (!ctl->p || !ctl->p->mainloop || !ctl->p->context) + if (!ctl->p) return -EBADFD; + err = pulse_check_connection(ctl->p); + if (err < 0) + return err; + o = pa_context_get_sink_info_by_name(ctl->p->context, ctl->sink, sink_info_cb, ctl); if (o) { @@ -182,17 +186,27 @@ static int pulse_update_volume(snd_ctl_pulse_t * ctl) static int pulse_elem_count(snd_ctl_ext_t * ext) { snd_ctl_pulse_t *ctl = ext->private_data; - int count = 0; + int count = 0, err; assert(ctl); + if (!ctl->p || !ctl->p->mainloop) + return -EBADFD; + pa_threaded_mainloop_lock(ctl->p->mainloop); + err = pulse_check_connection(ctl->p); + if (err < 0) { + count = err; + goto finish; + } + if (ctl->source) count += 2; if (ctl->sink) count += 2; +finish: pa_threaded_mainloop_unlock(ctl->p->mainloop); return count; @@ -202,16 +216,21 @@ static int pulse_elem_list(snd_ctl_ext_t * ext, unsigned int offset, snd_ctl_elem_id_t * id) { snd_ctl_pulse_t *ctl = ext->private_data; + int err; assert(ctl); - if (!ctl->p || !ctl->p->mainloop || !ctl->p->context) + if (!ctl->p || !ctl->p->mainloop) return -EBADFD; snd_ctl_elem_id_set_interface(id, SND_CTL_ELEM_IFACE_MIXER); pa_threaded_mainloop_lock(ctl->p->mainloop); + err = pulse_check_connection(ctl->p); + if (err < 0) + goto finish; + if (ctl->source) { if (offset == 0) snd_ctl_elem_id_set_name(id, SOURCE_VOL_NAME); @@ -220,14 +239,19 @@ static int pulse_elem_list(snd_ctl_ext_t * ext, unsigned int offset, } else offset += 2; + err = 0; + +finish: pa_threaded_mainloop_unlock(ctl->p->mainloop); - if (offset == 2) - snd_ctl_elem_id_set_name(id, SINK_VOL_NAME); - else if (offset == 3) - snd_ctl_elem_id_set_name(id, SINK_MUTE_NAME); + if (err >= 0) { + if (offset == 2) + snd_ctl_elem_id_set_name(id, SINK_VOL_NAME); + else if (offset == 3) + snd_ctl_elem_id_set_name(id, SINK_MUTE_NAME); + } - return 0; + return err; } static snd_ctl_ext_key_t pulse_find_elem(snd_ctl_ext_t * ext, @@ -266,7 +290,7 @@ static int pulse_get_attribute(snd_ctl_ext_t * ext, snd_ctl_ext_key_t key, assert(ctl); - if (!ctl->p || !ctl->p->mainloop || !ctl->p->context) + if (!ctl->p || !ctl->p->mainloop) return -EBADFD; pa_threaded_mainloop_lock(ctl->p->mainloop); @@ -319,7 +343,7 @@ static int pulse_read_integer(snd_ctl_ext_t * ext, snd_ctl_ext_key_t key, assert(ctl); - if (!ctl->p || !ctl->p->mainloop || !ctl->p->context) + if (!ctl->p || !ctl->p->mainloop) return -EBADFD; pa_threaded_mainloop_lock(ctl->p->mainloop); @@ -371,7 +395,7 @@ static int pulse_write_integer(snd_ctl_ext_t * ext, snd_ctl_ext_key_t key, assert(ctl); - if (!ctl->p || !ctl->p->mainloop || !ctl->p->context) + if (!ctl->p || !ctl->p->mainloop) return -EBADFD; pa_threaded_mainloop_lock(ctl->p->mainloop); @@ -476,7 +500,7 @@ static void pulse_subscribe_events(snd_ctl_ext_t * ext, int subscribe) assert(ctl); - if (!ctl->p || !ctl->p->mainloop || !ctl->p->context) + if (!ctl->p || !ctl->p->mainloop) return; pa_threaded_mainloop_lock(ctl->p->mainloop); @@ -491,17 +515,23 @@ static int pulse_read_event(snd_ctl_ext_t * ext, snd_ctl_elem_id_t * id, { snd_ctl_pulse_t *ctl = ext->private_data; int offset; - int err = -EAGAIN; + int err; assert(ctl); - if (!ctl->p || !ctl->p->mainloop || !ctl->p->context) + if (!ctl->p || !ctl->p->mainloop) return -EBADFD; pa_threaded_mainloop_lock(ctl->p->mainloop); - if (!ctl->updated || !ctl->subscribed) + err = pulse_check_connection(ctl->p); + if (err < 0) + goto finish; + + if (!ctl->updated || !ctl->subscribed) { + err = -EAGAIN; goto finish; + } if (ctl->source) offset = 2; @@ -540,20 +570,28 @@ static int pulse_ctl_poll_revents(snd_ctl_ext_t * ext, struct pollfd *pfd, unsigned short *revents) { snd_ctl_pulse_t *ctl = ext->private_data; - int err = 0; + int err; assert(ctl); - if (!ctl->p || !ctl->p->mainloop || !ctl->p->context) + if (!ctl->p || !ctl->p->mainloop) return -EBADFD; pa_threaded_mainloop_lock(ctl->p->mainloop); + err = pulse_check_connection(ctl->p); + if (err < 0) + goto finish; + if (ctl->updated) *revents = POLLIN; else *revents = 0; + err = 0; + +finish: + pa_threaded_mainloop_unlock(ctl->p->mainloop); return err; diff --git a/pulse/pcm_pulse.c b/pulse/pcm_pulse.c index a625f55..98983f8 100644 --- a/pulse/pcm_pulse.c +++ b/pulse/pcm_pulse.c @@ -135,11 +135,15 @@ static int update_active(snd_pcm_pulse_t *pcm) { if (!pcm->p) return -EBADFD; - ret = check_active(pcm); + ret = check_stream(pcm); if (ret < 0) - return ret; + goto finish; + + ret = check_active(pcm); - if (ret > 0) +finish: + + if (ret != 0) /* On error signal the caller, too */ pulse_poll_activate(pcm->p); else pulse_poll_deactivate(pcm->p); @@ -199,12 +203,12 @@ static int pulse_start(snd_pcm_ioplug_t * io) assert(pcm); - if (!pcm->p) + if (!pcm->p || !pcm->p->mainloop) return -EBADFD; pa_threaded_mainloop_lock(pcm->p->mainloop); - err = pulse_check_connection(pcm->p); + err = check_stream(pcm); if (err < 0) goto finish; @@ -244,12 +248,12 @@ static int pulse_stop(snd_pcm_ioplug_t * io) assert(pcm); - if (!pcm->p) + if (!pcm->p || !pcm->p->mainloop) return -EBADFD; pa_threaded_mainloop_lock(pcm->p->mainloop); - err = pulse_check_connection(pcm->p); + err = check_stream(pcm); if (err < 0) goto finish; @@ -291,12 +295,12 @@ static int pulse_drain(snd_pcm_ioplug_t * io) assert(pcm); - if (!pcm->p) + if (!pcm->p || !pcm->p->mainloop) return -EBADFD; pa_threaded_mainloop_lock(pcm->p->mainloop); - err = pulse_check_connection(pcm->p); + err = check_stream(pcm); if (err < 0) goto finish; @@ -328,7 +332,7 @@ static snd_pcm_sframes_t pulse_pointer(snd_pcm_ioplug_t * io) assert(pcm); - if (!pcm->p) + if (!pcm->p || !pcm->p->mainloop) return -EBADFD; if (io->state == SND_PCM_STATE_XRUN) @@ -339,12 +343,7 @@ static snd_pcm_sframes_t pulse_pointer(snd_pcm_ioplug_t * io) pa_threaded_mainloop_lock(pcm->p->mainloop); - if (!pcm->stream) { - ret = -EBADFD; - goto finish; - } - - ret = pulse_check_connection(pcm->p); + ret = check_stream(pcm); if (ret < 0) goto finish; @@ -379,18 +378,13 @@ static int pulse_delay(snd_pcm_ioplug_t * io, snd_pcm_sframes_t * delayp) assert(pcm); - if (!pcm->p) + if (!pcm->p || !pcm->p->mainloop) return -EBADFD; pa_threaded_mainloop_lock(pcm->p->mainloop); - if (!pcm->stream) { - err = -EBADFD; - goto finish; - } - for (;;) { - err = pulse_check_connection(pcm->p); + err = check_stream(pcm); if (err < 0) goto finish; @@ -433,17 +427,12 @@ static snd_pcm_sframes_t pulse_write(snd_pcm_ioplug_t * io, assert(pcm); - if (!pcm->p) + if (!pcm->p || !pcm->p->mainloop) return -EBADFD; pa_threaded_mainloop_lock(pcm->p->mainloop); - if (!pcm->stream) { - ret = -EBADFD; - goto finish; - } - - ret = pulse_check_connection(pcm->p); + ret = check_stream(pcm); if (ret < 0) goto finish; @@ -493,17 +482,12 @@ static snd_pcm_sframes_t pulse_read(snd_pcm_ioplug_t * io, assert(pcm); - if (!pcm->p) + if (!pcm->p || !pcm->p->mainloop) return -EBADFD; pa_threaded_mainloop_lock(pcm->p->mainloop); - if (!pcm->stream) { - ret = -EBADFD; - goto finish; - } - - ret = pulse_check_connection(pcm->p); + ret = check_stream(pcm); if (ret < 0) goto finish; @@ -624,13 +608,16 @@ static int pulse_pcm_poll_revents(snd_pcm_ioplug_t * io, assert(pcm); - if (!pcm->p) + if (!pcm->p || !pcm->p->mainloop) return -EBADFD; pa_threaded_mainloop_lock(pcm->p->mainloop); - err = check_active(pcm); + err = check_stream(pcm); + if (err < 0) + goto finish; + err = check_active(pcm); if (err < 0) goto finish; @@ -655,7 +642,7 @@ static int pulse_prepare(snd_pcm_ioplug_t * io) assert(pcm); - if (!pcm->p) + if (!pcm->p || !pcm->p->mainloop) return -EBADFD; pa_threaded_mainloop_lock(pcm->p->mainloop); @@ -757,7 +744,7 @@ static int pulse_hw_params(snd_pcm_ioplug_t * io, assert(pcm); - if (!pcm->p) + if (!pcm->p || !pcm->p->mainloop) return -EBADFD; pa_threaded_mainloop_lock(pcm->p->mainloop); @@ -856,23 +843,26 @@ static int pulse_pause(snd_pcm_ioplug_t * io, int enable) { snd_pcm_pulse_t *pcm = io->private_data; int err = 0; + pa_operation *o; assert (pcm); - if (!pcm->p) + if (!pcm->p || !pcm->p->mainloop) return -EBADFD; pa_threaded_mainloop_lock(pcm->p->mainloop); - if (pcm->stream) { - pa_operation *o; - o = pa_stream_cork(pcm->stream, enable, NULL, NULL); - if (o) - pa_operation_unref(o); - else - err = -EIO; - } + err = check_stream(pcm); + if (err < 0) + goto finish; + + o = pa_stream_cork(pcm->stream, enable, NULL, NULL); + if (o) + pa_operation_unref(o); + else + err = -EIO; +finish: pa_threaded_mainloop_unlock(pcm->p->mainloop); return err; -- 1.6.4 Lennart -- Lennart Poettering Red Hat, Inc. lennart [at] poettering [dot] net ICQ# 11060553 http://0pointer.net/lennart/ GnuPG 0x1A015CC4

1 0

[alsa-devel] [PATCH 3/6] pulse: get rid of redundant state variable
by Lennart Poettering 04 Aug '09

04 Aug '09

snd_pulse_t::state was mostly shadowing the state of pa_context_get_state(snd_pulse_t::context), so get rid of it and use the state of the context directly. --- pulse/pulse.c | 14 +++----------- pulse/pulse.h | 6 ------ 2 files changed, 3 insertions(+), 17 deletions(-) diff --git a/pulse/pulse.c b/pulse/pulse.c index c313182..9c05171 100644 --- a/pulse/pulse.c +++ b/pulse/pulse.c @@ -59,12 +59,6 @@ int pulse_wait_operation(snd_pulse_t * p, pa_operation * o) assert(p); assert(o); - if (p->state != PULSE_STATE_READY) - return -EBADFD; - - if (!p->mainloop) - return -EBADFD; - for (;;) { int err; @@ -124,8 +118,6 @@ snd_pulse_t *pulse_new(void) if (!p) return NULL; - p->state = PULSE_STATE_INIT; - if (pipe(fd)) { free(p); return NULL; @@ -192,13 +184,15 @@ void pulse_free(snd_pulse_t * p) int pulse_connect(snd_pulse_t * p, const char *server) { int err; + pa_context_state_t state; assert(p); if (!p->context || !p->mainloop) return -EBADFD; - if (p->state != PULSE_STATE_INIT) + state = pa_context_get_state(p->context); + if (state != PA_CONTEXT_UNCONNECTED) return -EBADFD; pa_threaded_mainloop_lock(p->mainloop); @@ -221,8 +215,6 @@ int pulse_connect(snd_pulse_t * p, const char *server) pa_threaded_mainloop_unlock(p->mainloop); - p->state = PULSE_STATE_READY; - return 0; error: diff --git a/pulse/pulse.h b/pulse/pulse.h index 51f9a11..e98124f 100644 --- a/pulse/pulse.h +++ b/pulse/pulse.h @@ -31,12 +31,6 @@ typedef struct snd_pulse { pa_context *context; int thread_fd, main_fd; - - enum { - PULSE_STATE_INIT, - PULSE_STATE_READY, - } state; - } snd_pulse_t; int pulse_check_connection(snd_pulse_t * p); -- 1.6.4 Lennart -- Lennart Poettering Red Hat, Inc. lennart [at] poettering [dot] net ICQ# 11060553 http://0pointer.net/lennart/ GnuPG 0x1A015CC4

1 0

[alsa-devel] [PATCH 2/6] pulse: move a couple of PCM related functions from pulse.c to pcm_pulse.c
by Lennart Poettering 04 Aug '09

04 Aug '09

A number of functions in pulse.c are only relevant for the PCM handling, so let's move them to pcm_pulse.c. This allows us to simplify their argument lists a bit. --- pulse/pcm_pulse.c | 118 ++++++++++++++++++++++++++++++++++++++++++---------- pulse/pulse.c | 55 ------------------------- pulse/pulse.h | 4 -- 3 files changed, 95 insertions(+), 82 deletions(-) diff --git a/pulse/pcm_pulse.c b/pulse/pcm_pulse.c index 24347f9..a625f55 100644 --- a/pulse/pcm_pulse.c +++ b/pulse/pcm_pulse.c @@ -49,6 +49,32 @@ typedef struct snd_pcm_pulse { pa_buffer_attr buffer_attr; } snd_pcm_pulse_t; +static int check_stream(snd_pcm_pulse_t *pcm) +{ + int err; + pa_stream_state_t state; + + assert(pcm); + + if (!pcm->p) + return -EBADFD; + + err = pulse_check_connection(pcm->p); + if (err < 0) + return err; + + if (!pcm->stream) + return -EBADFD; + + state = pa_stream_get_state(pcm->stream); + if (!PA_STREAM_IS_GOOD(state)) + return -EIO; + + err = 0; + + return err; +} + static int update_ptr(snd_pcm_pulse_t *pcm) { size_t size; @@ -118,9 +144,53 @@ static int update_active(snd_pcm_pulse_t *pcm) { else pulse_poll_deactivate(pcm->p); + return ret; +} + +static int wait_stream_state(snd_pcm_pulse_t *pcm, pa_stream_state_t target) +{ + pa_stream_state_t state; + + assert(pcm); + + if (!pcm->p) + return -EBADFD; + + for (;;) { + int err; + + err = pulse_check_connection(pcm->p); + if (err < 0) + return err; + + if (!pcm->stream) + return -EBADFD; + + state = pa_stream_get_state(pcm->stream); + if (state == target) + break; + + if (!PA_STREAM_IS_GOOD(state)) + return -EIO; + + pa_threaded_mainloop_wait(pcm->p->mainloop); + } + return 0; } +static void stream_success_cb(pa_stream * p, int success, void *userdata) +{ + snd_pcm_pulse_t *pcm = userdata; + + assert(pcm); + + if (!pcm->p) + return; + + pa_threaded_mainloop_signal(pcm->p->mainloop, 0); +} + static int pulse_start(snd_pcm_ioplug_t * io) { snd_pcm_pulse_t *pcm = io->private_data; @@ -138,18 +208,13 @@ static int pulse_start(snd_pcm_ioplug_t * io) if (err < 0) goto finish; - if (pcm->stream == NULL) - goto finish; - - o = pa_stream_cork(pcm->stream, 0, pulse_stream_success_cb, - pcm->p); + o = pa_stream_cork(pcm->stream, 0, stream_success_cb, pcm); if (!o) { err = -EIO; goto finish; } - u = pa_stream_trigger(pcm->stream, pulse_stream_success_cb, - pcm->p); + u = pa_stream_trigger(pcm->stream, stream_success_cb, pcm); pcm->underrun = 0; err_o = pulse_wait_operation(pcm->p, o); @@ -165,7 +230,6 @@ static int pulse_start(snd_pcm_ioplug_t * io) goto finish; } - finish: pa_threaded_mainloop_unlock(pcm->p->mainloop); @@ -189,18 +253,13 @@ static int pulse_stop(snd_pcm_ioplug_t * io) if (err < 0) goto finish; - if (pcm->stream == NULL) - goto finish; - - o = pa_stream_cork(pcm->stream, 1, pulse_stream_success_cb, - pcm->p); + o = pa_stream_cork(pcm->stream, 1, stream_success_cb, pcm); if (!o) { err = -EIO; goto finish; } - u = pa_stream_flush(pcm->stream, pulse_stream_success_cb, - pcm->p); + u = pa_stream_flush(pcm->stream, stream_success_cb, pcm); if (!u) { pa_operation_unref(o); err = -EIO; @@ -241,7 +300,7 @@ static int pulse_drain(snd_pcm_ioplug_t * io) if (err < 0) goto finish; - o = pa_stream_drain(pcm->stream, pulse_stream_success_cb, pcm->p); + o = pa_stream_drain(pcm->stream, stream_success_cb, pcm); if (!o) { err = -EIO; goto finish; @@ -504,6 +563,23 @@ finish: return ret; } +static void stream_state_cb(pa_stream * p, void *userdata) +{ + snd_pcm_pulse_t *pcm = userdata; + pa_stream_state_t state; + + assert(pcm); + + if (!pcm->p) + return; + + state = pa_stream_get_state(p); + if (!PA_STREAM_IS_GOOD(state)) + pulse_poll_activate(pcm->p); + + pa_threaded_mainloop_signal(pcm->p->mainloop, 0); +} + static void stream_request_cb(pa_stream * p, size_t length, void *userdata) { snd_pcm_pulse_t *pcm = userdata; @@ -586,8 +662,7 @@ static int pulse_prepare(snd_pcm_ioplug_t * io) if (pcm->stream) { pa_stream_disconnect(pcm->stream); - pulse_wait_stream_state(pcm->p, pcm->stream, - PA_STREAM_TERMINATED); + wait_stream_state(pcm, PA_STREAM_TERMINATED); pa_stream_unref(pcm->stream); pcm->stream = NULL; } @@ -620,9 +695,7 @@ static int pulse_prepare(snd_pcm_ioplug_t * io) goto finish; } - pa_stream_set_state_callback(pcm->stream, pulse_stream_state_cb, - pcm->p); - + pa_stream_set_state_callback(pcm->stream, stream_state_cb, pcm); pa_stream_set_latency_update_callback(pcm->stream, stream_latency_cb, pcm); if (io->stream == SND_PCM_STREAM_PLAYBACK) { @@ -659,8 +732,7 @@ static int pulse_prepare(snd_pcm_ioplug_t * io) goto finish; } - err = - pulse_wait_stream_state(pcm->p, pcm->stream, PA_STREAM_READY); + err = wait_stream_state(pcm, PA_STREAM_READY); if (err < 0) { SNDERR("PulseAudio: Unable to create stream: %s\n", pa_strerror(pa_context_errno(pcm->p->context))); pa_stream_unref(pcm->stream); diff --git a/pulse/pulse.c b/pulse/pulse.c index 6f58a7e..c313182 100644 --- a/pulse/pulse.c +++ b/pulse/pulse.c @@ -44,26 +44,6 @@ int pulse_check_connection(snd_pulse_t * p) return 0; } -void pulse_stream_state_cb(pa_stream * s, void *userdata) -{ - snd_pulse_t *p = userdata; - - assert(s); - assert(p); - - pa_threaded_mainloop_signal(p->mainloop, 0); -} - -void pulse_stream_success_cb(pa_stream * s, int success, void *userdata) -{ - snd_pulse_t *p = userdata; - - assert(s); - assert(p); - - pa_threaded_mainloop_signal(p->mainloop, 0); -} - void pulse_context_success_cb(pa_context * c, int success, void *userdata) { snd_pulse_t *p = userdata; @@ -101,41 +81,6 @@ int pulse_wait_operation(snd_pulse_t * p, pa_operation * o) return 0; } -int pulse_wait_stream_state(snd_pulse_t * p, pa_stream * stream, - pa_stream_state_t target) -{ - pa_stream_state_t state; - - assert(p); - assert(stream); - - if (p->state != PULSE_STATE_READY) - return -EBADFD; - - if (!p->mainloop) - return -EBADFD; - - for (;;) { - int err; - - err = pulse_check_connection(p); - if (err < 0) - return err; - - state = pa_stream_get_state(stream); - - if (state == target) - break; - - if (!PA_STREAM_IS_GOOD(state)) - return -EIO; - - pa_threaded_mainloop_wait(p->mainloop); - } - - return 0; -} - static void context_state_cb(pa_context * c, void *userdata) { snd_pulse_t *p = userdata; diff --git a/pulse/pulse.h b/pulse/pulse.h index 7bf1a5b..51f9a11 100644 --- a/pulse/pulse.h +++ b/pulse/pulse.h @@ -41,13 +41,9 @@ typedef struct snd_pulse { int pulse_check_connection(snd_pulse_t * p); -void pulse_stream_state_cb(pa_stream * s, void *userdata); -void pulse_stream_success_cb(pa_stream * s, int success, void *userdata); void pulse_context_success_cb(pa_context * c, int success, void *userdata); int pulse_wait_operation(snd_pulse_t * p, pa_operation * o); -int pulse_wait_stream_state(snd_pulse_t * p, pa_stream * stream, - pa_stream_state_t target); snd_pulse_t *pulse_new(void); void pulse_free(snd_pulse_t * p); -- 1.6.4 Lennart -- Lennart Poettering Red Hat, Inc. lennart [at] poettering [dot] net ICQ# 11060553 http://0pointer.net/lennart/ GnuPG 0x1A015CC4

1 0

[alsa-devel] [PATCH 2/3] ASoC: add DAI platform ssi driver for MXC
by javier Martin 04 Aug '09

04 Aug '09

This adds support for DAI platform for the SSI present in MXC platforms. It currently does not support i.MX3, the only thing necessary to do this is to export DMA data for i.MX3 interface which I haven't done because I don't have a i.MX3 based board available. It has been tested on i.MX27 board. Signed-off-by: Javier Martin <javier.martin(a)vista-silicon.com> --- sound/soc/imx/Kconfig | 2 + sound/soc/imx/Makefile | 2 + sound/soc/imx/mxc-ssi.c | 868 +++++++++++++++++++++++++++++++++++++++++++++++ sound/soc/imx/mxc-ssi.h | 238 +++++++++++++ 4 files changed, 1110 insertions(+), 0 deletions(-) diff --git a/sound/soc/imx/Kconfig b/sound/soc/imx/Kconfig index a1bf053..886dadd 100644 --- a/sound/soc/imx/Kconfig +++ b/sound/soc/imx/Kconfig @@ -6,6 +6,8 @@ config SND_MX1_MX2_SOC Say Y or M if you want to add support for codecs attached to the MX1 or MX2 SSI interface. +config SND_MXC_SOC_SSI + tristate diff --git a/sound/soc/imx/Makefile b/sound/soc/imx/Makefile index c390f0f..6552cb2 100644 --- a/sound/soc/imx/Makefile +++ b/sound/soc/imx/Makefile @@ -1,4 +1,6 @@ # i.MX Platform Support snd-soc-mx1_mx2-objs := mx1_mx2-pcm.o +snd-soc-mxc-ssi-objs := mxc-ssi.o obj-$(CONFIG_SND_MX1_MX2_SOC) += snd-soc-mx1_mx2.o +obj-$(CONFIG_SND_MXC_SOC_SSI) += snd-soc-mxc-ssi.o diff --git a/sound/soc/imx/mxc-ssi.c b/sound/soc/imx/mxc-ssi.c new file mode 100644 index 0000000..3806ff2 --- /dev/null +++ b/sound/soc/imx/mxc-ssi.c @@ -0,0 +1,868 @@ +/* + * mxc-ssi.c -- SSI driver for Freescale IMX + * + * Copyright 2006 Wolfson Microelectronics PLC. + * Author: Liam Girdwood + * liam.girdwood(a)wolfsonmicro.com or linux(a)wolfsonmicro.com + * + * Based on mxc-alsa-mc13783 (C) 2006 Freescale. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * TODO: + * Need to rework SSI register defs when new defs go into mainline. + * Add support for TDM and FIFO 1. + * Add support for i.mx3x DMA interface. + * + */ + + +#include <linux/module.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/slab.h> +#include <linux/dma-mapping.h> +#include <linux/clk.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/soc.h> +#include <mach/dma-mx1-mx2.h> +#include <asm/mach-types.h> + +#include "mxc-ssi.h" +#include "mx1_mx2-pcm.h" + +#define SSI1_PORT 0 +#define SSI2_PORT 1 + +static int ssi_active[2] = {0, 0}; + +/* DMA information for mx1_mx2 platforms */ +static struct mx1_mx2_pcm_dma_params imx_ssi1_pcm_stereo_out0 = { + .name = "SSI1 PCM Stereo out 0", + .transfer_type = DMA_MODE_WRITE, + .per_address = SSI1_BASE_ADDR + STX0, + .event_id = DMA_REQ_SSI1_TX0, + .watermark_level = TXFIFO_WATERMARK, + .per_config = IMX_DMA_MEMSIZE_16 | IMX_DMA_TYPE_FIFO, + .mem_config = IMX_DMA_MEMSIZE_32 | IMX_DMA_TYPE_LINEAR, +}; + +static struct mx1_mx2_pcm_dma_params imx_ssi1_pcm_stereo_out1 = { + .name = "SSI1 PCM Stereo out 1", + .transfer_type = DMA_MODE_WRITE, + .per_address = SSI1_BASE_ADDR + STX1, + .event_id = DMA_REQ_SSI1_TX1, + .watermark_level = TXFIFO_WATERMARK, + .per_config = IMX_DMA_MEMSIZE_16 | IMX_DMA_TYPE_FIFO, + .mem_config = IMX_DMA_MEMSIZE_32 | IMX_DMA_TYPE_LINEAR, +}; + +static struct mx1_mx2_pcm_dma_params imx_ssi1_pcm_stereo_in0 = { + .name = "SSI1 PCM Stereo in 0", + .transfer_type = DMA_MODE_READ, + .per_address = SSI1_BASE_ADDR + SRX0, + .event_id = DMA_REQ_SSI1_RX0, + .watermark_level = RXFIFO_WATERMARK, + .per_config = IMX_DMA_MEMSIZE_16 | IMX_DMA_TYPE_FIFO, + .mem_config = IMX_DMA_MEMSIZE_32 | IMX_DMA_TYPE_LINEAR, +}; + +static struct mx1_mx2_pcm_dma_params imx_ssi1_pcm_stereo_in1 = { + .name = "SSI1 PCM Stereo in 1", + .transfer_type = DMA_MODE_READ, + .per_address = SSI1_BASE_ADDR + SRX1, + .event_id = DMA_REQ_SSI1_RX1, + .watermark_level = RXFIFO_WATERMARK, + .per_config = IMX_DMA_MEMSIZE_16 | IMX_DMA_TYPE_FIFO, + .mem_config = IMX_DMA_MEMSIZE_32 | IMX_DMA_TYPE_LINEAR, +}; + +static struct mx1_mx2_pcm_dma_params imx_ssi2_pcm_stereo_out0 = { + .name = "SSI2 PCM Stereo out 0", + .transfer_type = DMA_MODE_WRITE, + .per_address = SSI2_BASE_ADDR + STX0, + .event_id = DMA_REQ_SSI2_TX0, + .watermark_level = TXFIFO_WATERMARK, + .per_config = IMX_DMA_MEMSIZE_16 | IMX_DMA_TYPE_FIFO, + .mem_config = IMX_DMA_MEMSIZE_32 | IMX_DMA_TYPE_LINEAR, +}; + +static struct mx1_mx2_pcm_dma_params imx_ssi2_pcm_stereo_out1 = { + .name = "SSI2 PCM Stereo out 1", + .transfer_type = DMA_MODE_WRITE, + .per_address = SSI2_BASE_ADDR + STX1, + .event_id = DMA_REQ_SSI2_TX1, + .watermark_level = TXFIFO_WATERMARK, + .per_config = IMX_DMA_MEMSIZE_16 | IMX_DMA_TYPE_FIFO, + .mem_config = IMX_DMA_MEMSIZE_32 | IMX_DMA_TYPE_LINEAR, +}; + +static struct mx1_mx2_pcm_dma_params imx_ssi2_pcm_stereo_in0 = { + .name = "SSI2 PCM Stereo in 0", + .transfer_type = DMA_MODE_READ, + .per_address = SSI2_BASE_ADDR + SRX0, + .event_id = DMA_REQ_SSI2_RX0, + .watermark_level = RXFIFO_WATERMARK, + .per_config = IMX_DMA_MEMSIZE_16 | IMX_DMA_TYPE_FIFO, + .mem_config = IMX_DMA_MEMSIZE_32 | IMX_DMA_TYPE_LINEAR, +}; + +static struct mx1_mx2_pcm_dma_params imx_ssi2_pcm_stereo_in1 = { + .name = "SSI2 PCM Stereo in 1", + .transfer_type = DMA_MODE_READ, + .per_address = SSI2_BASE_ADDR + SRX1, + .event_id = DMA_REQ_SSI2_RX1, + .watermark_level = RXFIFO_WATERMARK, + .per_config = IMX_DMA_MEMSIZE_16 | IMX_DMA_TYPE_FIFO, + .mem_config = IMX_DMA_MEMSIZE_32 | IMX_DMA_TYPE_LINEAR, +}; + +static struct clk *ssi_clk0, *ssi_clk1; + +int get_ssi_clk(int ssi, struct device *dev) +{ + switch (ssi) { + case 0: + ssi_clk0 = clk_get(dev, "ssi1"); + if (IS_ERR(ssi_clk0)) + return PTR_ERR(ssi_clk0); + return 0; + case 1: + ssi_clk1 = clk_get(dev, "ssi2"); + if (IS_ERR(ssi_clk1)) + return PTR_ERR(ssi_clk1); + return 0; + default: + return -EINVAL; + } +} +EXPORT_SYMBOL(get_ssi_clk); + +void put_ssi_clk(int ssi) +{ + switch (ssi) { + case 0: + clk_put(ssi_clk0); + ssi_clk0 = NULL; + break; + case 1: + clk_put(ssi_clk1); + ssi_clk1 = NULL; + break; + } +} +EXPORT_SYMBOL(put_ssi_clk); + +/* + * SSI system clock configuration. + * Should only be called when port is inactive (i.e. SSIEN = 0). + */ +static int imx_ssi_set_dai_sysclk(struct snd_soc_dai *cpu_dai, + int clk_id, unsigned int freq, int dir) +{ + u32 scr; + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) { + scr = SSI1_SCR; + pr_debug("%s: SCR for SSI1 is %x\n", __func__, scr); + } else { + scr = SSI2_SCR; + pr_debug("%s: SCR for SSI2 is %x\n", __func__, scr); + } + + if (scr & SSI_SCR_SSIEN) { + printk(KERN_WARNING "Warning ssi already enabled\n"); + return 0; + } + + switch (clk_id) { + case IMX_SSP_SYS_CLK: + if (dir == SND_SOC_CLOCK_OUT) { + scr |= SSI_SCR_SYS_CLK_EN; + pr_debug("%s: clk of is output\n", __func__); + } else { + scr &= ~SSI_SCR_SYS_CLK_EN; + pr_debug("%s: clk of is input\n", __func__); + } + break; + default: + return -EINVAL; + } + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) { + pr_debug("%s: writeback of SSI1_SCR\n", __func__); + SSI1_SCR = scr; + } else { + pr_debug("%s: writeback of SSI2_SCR\n", __func__); + SSI2_SCR = scr; + } + + return 0; +} + +/* + * SSI Clock dividers + * Should only be called when port is inactive (i.e. SSIEN = 0). + */ +static int imx_ssi_set_dai_clkdiv(struct snd_soc_dai *cpu_dai, + int div_id, int div) +{ + u32 stccr, srccr; + + pr_debug("%s\n", __func__); + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) { + if (SSI1_SCR & SSI_SCR_SSIEN) + return 0; + srccr = SSI1_STCCR; + stccr = SSI1_STCCR; + } else { + if (SSI2_SCR & SSI_SCR_SSIEN) + return 0; + srccr = SSI2_STCCR; + stccr = SSI2_STCCR; + } + + switch (div_id) { + case IMX_SSI_TX_DIV_2: + stccr &= ~SSI_STCCR_DIV2; + stccr |= div; + break; + case IMX_SSI_TX_DIV_PSR: + stccr &= ~SSI_STCCR_PSR; + stccr |= div; + break; + case IMX_SSI_TX_DIV_PM: + stccr &= ~0xff; + stccr |= SSI_STCCR_PM(div); + break; + case IMX_SSI_RX_DIV_2: + stccr &= ~SSI_STCCR_DIV2; + stccr |= div; + break; + case IMX_SSI_RX_DIV_PSR: + stccr &= ~SSI_STCCR_PSR; + stccr |= div; + break; + case IMX_SSI_RX_DIV_PM: + stccr &= ~0xff; + stccr |= SSI_STCCR_PM(div); + break; + default: + return -EINVAL; + } + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) { + SSI1_STCCR = stccr; + SSI1_SRCCR = srccr; + } else { + SSI2_STCCR = stccr; + SSI2_SRCCR = srccr; + } + return 0; +} + +/* + * SSI Network Mode or TDM slots configuration. + * Should only be called when port is inactive (i.e. SSIEN = 0). + */ +static int imx_ssi_set_dai_tdm_slot(struct snd_soc_dai *cpu_dai, + unsigned int mask, int slots) +{ + u32 stmsk, srmsk, stccr; + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) { + if (SSI1_SCR & SSI_SCR_SSIEN) { + printk(KERN_WARNING "Warning ssi already enabled\n"); + return 0; + } + stccr = SSI1_STCCR; + } else { + if (SSI2_SCR & SSI_SCR_SSIEN) { + printk(KERN_WARNING "Warning ssi already enabled\n"); + return 0; + } + stccr = SSI2_STCCR; + } + + stmsk = srmsk = mask; + stccr &= ~SSI_STCCR_DC_MASK; + stccr |= SSI_STCCR_DC(slots - 1); + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) { + SSI1_STMSK = stmsk; + SSI1_SRMSK = srmsk; + SSI1_SRCCR = SSI1_STCCR = stccr; + } else { + SSI2_STMSK = stmsk; + SSI2_SRMSK = srmsk; + SSI2_SRCCR = SSI2_STCCR = stccr; + } + + return 0; +} + +/* + * SSI DAI format configuration. + * Should only be called when port is inactive (i.e. SSIEN = 0). + * Note: We don't use the I2S modes but instead manually configure the + * SSI for I2S. + */ +static int imx_ssi_set_dai_fmt(struct snd_soc_dai *cpu_dai, + unsigned int fmt) +{ + u32 stcr = 0, srcr = 0, scr; + + /* + * This is done to avoid this function to modify + * previous set values in stcr + */ + stcr = SSI1_STCR; + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) + scr = SSI1_SCR & ~(SSI_SCR_SYN | SSI_SCR_NET); + else + scr = SSI2_SCR & ~(SSI_SCR_SYN | SSI_SCR_NET); + + if (scr & SSI_SCR_SSIEN) { + printk(KERN_WARNING "Warning ssi already enabled\n"); + return 0; + } + + /* DAI mode */ + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + /* data on rising edge of bclk, frame low 1clk before data */ + stcr |= SSI_STCR_TFSI | SSI_STCR_TEFS | SSI_STCR_TXBIT0; + srcr |= SSI_SRCR_RFSI | SSI_SRCR_REFS | SSI_SRCR_RXBIT0; + break; + case SND_SOC_DAIFMT_LEFT_J: + /* data on rising edge of bclk, frame high with data */ + stcr |= SSI_STCR_TXBIT0; + srcr |= SSI_SRCR_RXBIT0; + break; + case SND_SOC_DAIFMT_DSP_B: + /* data on rising edge of bclk, frame high with data */ + stcr |= SSI_STCR_TFSL; + srcr |= SSI_SRCR_RFSL; + break; + case SND_SOC_DAIFMT_DSP_A: + /* data on rising edge of bclk, frame high 1clk before data */ + stcr |= SSI_STCR_TFSL | SSI_STCR_TEFS; + srcr |= SSI_SRCR_RFSL | SSI_SRCR_REFS; + break; + } + + /* DAI clock inversion */ + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_IB_IF: + stcr |= SSI_STCR_TFSI; + stcr &= ~SSI_STCR_TSCKP; + srcr |= SSI_SRCR_RFSI; + srcr &= ~SSI_SRCR_RSCKP; + break; + case SND_SOC_DAIFMT_IB_NF: + stcr &= ~(SSI_STCR_TSCKP | SSI_STCR_TFSI); + srcr &= ~(SSI_SRCR_RSCKP | SSI_SRCR_RFSI); + break; + case SND_SOC_DAIFMT_NB_IF: + stcr |= SSI_STCR_TFSI | SSI_STCR_TSCKP; + srcr |= SSI_SRCR_RFSI | SSI_SRCR_RSCKP; + break; + case SND_SOC_DAIFMT_NB_NF: + stcr &= ~SSI_STCR_TFSI; + stcr |= SSI_STCR_TSCKP; + srcr &= ~SSI_SRCR_RFSI; + srcr |= SSI_SRCR_RSCKP; + break; + } + + /* DAI clock master masks */ + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBS_CFS: + stcr |= SSI_STCR_TFDIR | SSI_STCR_TXDIR; + srcr |= SSI_SRCR_RFDIR | SSI_SRCR_RXDIR; + break; + case SND_SOC_DAIFMT_CBM_CFS: + stcr |= SSI_STCR_TFDIR; + srcr |= SSI_SRCR_RFDIR; + break; + case SND_SOC_DAIFMT_CBS_CFM: + stcr |= SSI_STCR_TXDIR; + srcr |= SSI_SRCR_RXDIR; + break; + } + + /* sync */ + if (!(fmt & SND_SOC_DAIFMT_ASYNC)) + scr |= SSI_SCR_SYN; + + /* tdm - only for stereo atm */ + if (fmt & SND_SOC_DAIFMT_TDM) + scr |= SSI_SCR_NET; + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) { + SSI1_STCR = stcr; + SSI1_SRCR = srcr; + SSI1_SCR = scr; + } else { + SSI2_STCR = stcr; + SSI2_SRCR = srcr; + SSI2_SCR = scr; + } + + return 0; +} + +static int imx_ssi_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + /* set up TX DMA params */ + switch (cpu_dai->id) { + case IMX_DAI_SSI0: + cpu_dai->dma_data = &imx_ssi1_pcm_stereo_out0; + break; + case IMX_DAI_SSI1: + cpu_dai->dma_data = &imx_ssi1_pcm_stereo_out1; + break; + case IMX_DAI_SSI2: + cpu_dai->dma_data = &imx_ssi2_pcm_stereo_out0; + break; + case IMX_DAI_SSI3: + cpu_dai->dma_data = &imx_ssi2_pcm_stereo_out1; + } + pr_debug("%s: (playback)\n", __func__); + } else { + /* set up RX DMA params */ + switch (cpu_dai->id) { + case IMX_DAI_SSI0: + cpu_dai->dma_data = &imx_ssi1_pcm_stereo_in0; + break; + case IMX_DAI_SSI1: + cpu_dai->dma_data = &imx_ssi1_pcm_stereo_in1; + break; + case IMX_DAI_SSI2: + cpu_dai->dma_data = &imx_ssi2_pcm_stereo_in0; + break; + case IMX_DAI_SSI3: + cpu_dai->dma_data = &imx_ssi2_pcm_stereo_in1; + } + pr_debug("%s: (capture)\n", __func__); + } + + /* + * we cant really change any SSI values after SSI is enabled + * need to fix in software for max flexibility - lrg + */ + if (cpu_dai->active) { + printk(KERN_WARNING "Warning ssi already enabled\n"); + return 0; + } + + /* reset the SSI port - Sect 45.4.4 */ + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) { + + if (!ssi_clk0) + return -EINVAL; + + if (ssi_active[SSI1_PORT]++) { + pr_debug("%s: exit before reset\n", __func__); + return 0; + } + + /* SSI1 Reset */ + SSI1_SCR = 0; + + SSI1_SFCSR = SSI_SFCSR_RFWM1(RXFIFO_WATERMARK) | + SSI_SFCSR_RFWM0(RXFIFO_WATERMARK) | + SSI_SFCSR_TFWM1(TXFIFO_WATERMARK) | + SSI_SFCSR_TFWM0(TXFIFO_WATERMARK); + } else { + + if (!ssi_clk1) + return -EINVAL; + + if (ssi_active[SSI2_PORT]++) { + pr_debug("%s: exit before reset\n", __func__); + return 0; + } + + /* SSI2 Reset */ + SSI2_SCR = 0; + + SSI2_SFCSR = SSI_SFCSR_RFWM1(RXFIFO_WATERMARK) | + SSI_SFCSR_RFWM0(RXFIFO_WATERMARK) | + SSI_SFCSR_TFWM1(TXFIFO_WATERMARK) | + SSI_SFCSR_TFWM0(TXFIFO_WATERMARK); + } + + return 0; +} + +int imx_ssi_hw_tx_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; + u32 stccr, stcr, sier; + + pr_debug("%s\n", __func__); + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) { + stccr = SSI1_STCCR & ~SSI_STCCR_WL_MASK; + stcr = SSI1_STCR; + sier = SSI1_SIER; + } else { + stccr = SSI2_STCCR & ~SSI_STCCR_WL_MASK; + stcr = SSI2_STCR; + sier = SSI2_SIER; + } + + /* DAI data (word) size */ + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_S16_LE: + stccr |= SSI_STCCR_WL(16); + break; + case SNDRV_PCM_FORMAT_S20_3LE: + stccr |= SSI_STCCR_WL(20); + break; + case SNDRV_PCM_FORMAT_S24_LE: + stccr |= SSI_STCCR_WL(24); + break; + } + + /* enable interrupts */ + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) + stcr |= SSI_STCR_TFEN0; + else + stcr |= SSI_STCR_TFEN1; + sier |= SSI_SIER_TDMAE; + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) { + SSI1_STCR = stcr; + SSI1_STCCR = stccr; + SSI1_SIER = sier; + } else { + SSI2_STCR = stcr; + SSI2_STCCR = stccr; + SSI2_SIER = sier; + } + + return 0; +} + +int imx_ssi_hw_rx_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; + u32 srccr, srcr, sier; + + pr_debug("%s\n", __func__); + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) { + srccr = SSI1_SRCCR & ~SSI_SRCCR_WL_MASK; + srcr = SSI1_SRCR; + sier = SSI1_SIER; + } else { + srccr = SSI2_SRCCR & ~SSI_SRCCR_WL_MASK; + srcr = SSI2_SRCR; + sier = SSI2_SIER; + } + + /* DAI data (word) size */ + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_S16_LE: + srccr |= SSI_SRCCR_WL(16); + break; + case SNDRV_PCM_FORMAT_S20_3LE: + srccr |= SSI_SRCCR_WL(20); + break; + case SNDRV_PCM_FORMAT_S24_LE: + srccr |= SSI_SRCCR_WL(24); + break; + } + + /* enable interrupts */ + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) + srcr |= SSI_SRCR_RFEN0; + else + srcr |= SSI_SRCR_RFEN1; + sier |= SSI_SIER_RDMAE; + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) { + SSI1_SRCR = srcr; + SSI1_SRCCR = srccr; + SSI1_SIER = sier; + } else { + SSI2_SRCR = srcr; + SSI2_SRCCR = srccr; + SSI2_SIER = sier; + } + + return 0; +} + +/* + * Should only be called when port is inactive (i.e. SSIEN = 0), + * although can be called multiple times by upper layers. + */ +int imx_ssi_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; + + int ret; + + /* cant change any parameters when SSI is running */ + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) { + if (SSI1_SCR & SSI_SCR_SSIEN) { + printk(KERN_WARNING "Warning ssi already enabled\n"); + return 0; + } + } else { + if (SSI2_SCR & SSI_SCR_SSIEN) { + printk(KERN_WARNING "Warning ssi already enabled\n"); + return 0; + } + } + + /* + * Configure both tx and rx params with the same settings. This is + * really a harware restriction because SSI must be disabled until + * we can change those values. If there is an active audio stream in + * one direction, enabling the other direction with different + * settings would mean disturbing the running one. + */ + ret = imx_ssi_hw_tx_params(substream, params); + if (ret < 0) + return ret; + return imx_ssi_hw_rx_params(substream, params); +} + +int imx_ssi_prepare(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; + int ret; + + pr_debug("%s\n", __func__); + + /* Enable clks here to follow SSI recommended init sequence */ + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) { + ret = clk_enable(ssi_clk0); + if (ret < 0) + printk(KERN_ERR "Unable to enable ssi_clk0\n"); + } else { + ret = clk_enable(ssi_clk1); + if (ret < 0) + printk(KERN_ERR "Unable to enable ssi_clk1\n"); + } + + return 0; +} + +static int imx_ssi_trigger(struct snd_pcm_substream *substream, int cmd, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; + u32 scr; + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) + scr = SSI1_SCR; + else + scr = SSI2_SCR; + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + case SNDRV_PCM_TRIGGER_RESUME: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + scr |= SSI_SCR_TE | SSI_SCR_SSIEN; + else + scr |= SSI_SCR_RE | SSI_SCR_SSIEN; + break; + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + scr &= ~SSI_SCR_TE; + else + scr &= ~SSI_SCR_RE; + break; + default: + return -EINVAL; + } + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) + SSI1_SCR = scr; + else + SSI2_SCR = scr; + + return 0; +} + +static void imx_ssi_shutdown(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; + + /* shutdown SSI if neither Tx or Rx is active */ + if (!cpu_dai->active) { + + if (cpu_dai->id == IMX_DAI_SSI0 || + cpu_dai->id == IMX_DAI_SSI2) { + + if (--ssi_active[SSI1_PORT] > 1) + return; + + SSI1_SCR = 0; + clk_disable(ssi_clk0); + } else { + if (--ssi_active[SSI2_PORT]) + return; + SSI2_SCR = 0; + clk_disable(ssi_clk1); + } + } +} + +#ifdef CONFIG_PM +static int imx_ssi_suspend(struct platform_device *dev, + struct snd_soc_dai *dai) +{ + return 0; +} + +static int imx_ssi_resume(struct platform_device *pdev, + struct snd_soc_dai *dai) +{ + return 0; +} + +#else +#define imx_ssi_suspend NULL +#define imx_ssi_resume NULL +#endif + +#define IMX_SSI_RATES \ + (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | \ + SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | \ + SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \ + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | \ + SNDRV_PCM_RATE_96000) + +#define IMX_SSI_BITS \ + (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ + SNDRV_PCM_FMTBIT_S24_LE) + +static struct snd_soc_dai_ops imx_ssi_pcm_dai_ops = { + .startup = imx_ssi_startup, + .shutdown = imx_ssi_shutdown, + .trigger = imx_ssi_trigger, + .prepare = imx_ssi_prepare, + .hw_params = imx_ssi_hw_params, + .set_sysclk = imx_ssi_set_dai_sysclk, + .set_clkdiv = imx_ssi_set_dai_clkdiv, + .set_fmt = imx_ssi_set_dai_fmt, + .set_tdm_slot = imx_ssi_set_dai_tdm_slot, +}; + +struct snd_soc_dai imx_ssi_pcm_dai[] = { +{ + .name = "imx-i2s-1-0", + .id = IMX_DAI_SSI0, + .suspend = imx_ssi_suspend, + .resume = imx_ssi_resume, + .playback = { + .channels_min = 1, + .channels_max = 2, + .formats = IMX_SSI_BITS, + .rates = IMX_SSI_RATES,}, + .capture = { + .channels_min = 1, + .channels_max = 2, + .formats = IMX_SSI_BITS, + .rates = IMX_SSI_RATES,}, + .ops = &imx_ssi_pcm_dai_ops, +}, +{ + .name = "imx-i2s-2-0", + .id = IMX_DAI_SSI1, + .playback = { + .channels_min = 1, + .channels_max = 2, + .formats = IMX_SSI_BITS, + .rates = IMX_SSI_RATES,}, + .capture = { + .channels_min = 1, + .channels_max = 2, + .formats = IMX_SSI_BITS, + .rates = IMX_SSI_RATES,}, + .ops = &imx_ssi_pcm_dai_ops, +}, +{ + .name = "imx-i2s-1-1", + .id = IMX_DAI_SSI2, + .suspend = imx_ssi_suspend, + .resume = imx_ssi_resume, + .playback = { + .channels_min = 1, + .channels_max = 2, + .formats = IMX_SSI_BITS, + .rates = IMX_SSI_RATES,}, + .capture = { + .channels_min = 1, + .channels_max = 2, + .formats = IMX_SSI_BITS, + .rates = IMX_SSI_RATES,}, + .ops = &imx_ssi_pcm_dai_ops, +}, +{ + .name = "imx-i2s-2-1", + .id = IMX_DAI_SSI3, + .playback = { + .channels_min = 1, + .channels_max = 2, + .formats = IMX_SSI_BITS, + .rates = IMX_SSI_RATES,}, + .capture = { + .channels_min = 1, + .channels_max = 2, + .formats = IMX_SSI_BITS, + .rates = IMX_SSI_RATES,}, + .ops = &imx_ssi_pcm_dai_ops, +}, +}; +EXPORT_SYMBOL_GPL(imx_ssi_pcm_dai); + +static int __init imx_ssi_init(void) +{ + return snd_soc_register_dais(imx_ssi_pcm_dai, + ARRAY_SIZE(imx_ssi_pcm_dai)); +} + +static void __exit imx_ssi_exit(void) +{ + snd_soc_unregister_dais(imx_ssi_pcm_dai, + ARRAY_SIZE(imx_ssi_pcm_dai)); +} + +module_init(imx_ssi_init); +module_exit(imx_ssi_exit); +MODULE_AUTHOR("Liam Girdwood, liam.girdwood(a)wolfsonmicro.com"); +MODULE_DESCRIPTION("i.MX ASoC I2S driver"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/imx/mxc-ssi.h b/sound/soc/imx/mxc-ssi.h new file mode 100644 index 0000000..12bbdc9 --- /dev/null +++ b/sound/soc/imx/mxc-ssi.h @@ -0,0 +1,238 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef _IMX_SSI_H +#define _IMX_SSI_H + +#include <mach/hardware.h> + +/* SSI regs definition - MOVE to /arch/arm/plat-mxc/include/mach/ when stable */ +#define SSI1_IO_BASE_ADDR IO_ADDRESS(SSI1_BASE_ADDR) +#define SSI2_IO_BASE_ADDR IO_ADDRESS(SSI2_BASE_ADDR) + +#define STX0 0x00 +#define STX1 0x04 +#define SRX0 0x08 +#define SRX1 0x0c +#define SCR 0x10 +#define SISR 0x14 +#define SIER 0x18 +#define STCR 0x1c +#define SRCR 0x20 +#define STCCR 0x24 +#define SRCCR 0x28 +#define SFCSR 0x2c +#define STR 0x30 +#define SOR 0x34 +#define SACNT 0x38 +#define SACADD 0x3c +#define SACDAT 0x40 +#define SATAG 0x44 +#define STMSK 0x48 +#define SRMSK 0x4c + +#define SSI1_STX0 (*((volatile u32 *)(SSI1_IO_BASE_ADDR + STX0))) +#define SSI1_STX1 (*((volatile u32 *)(SSI1_IO_BASE_ADDR + STX1))) +#define SSI1_SRX0 (*((volatile u32 *)(SSI1_IO_BASE_ADDR + SRX0))) +#define SSI1_SRX1 (*((volatile u32 *)(SSI1_IO_BASE_ADDR + SRX1))) +#define SSI1_SCR (*((volatile u32 *)(SSI1_IO_BASE_ADDR + SCR))) +#define SSI1_SISR (*((volatile u32 *)(SSI1_IO_BASE_ADDR + SISR))) +#define SSI1_SIER (*((volatile u32 *)(SSI1_IO_BASE_ADDR + SIER))) +#define SSI1_STCR (*((volatile u32 *)(SSI1_IO_BASE_ADDR + STCR))) +#define SSI1_SRCR (*((volatile u32 *)(SSI1_IO_BASE_ADDR + SRCR))) +#define SSI1_STCCR (*((volatile u32 *)(SSI1_IO_BASE_ADDR + STCCR))) +#define SSI1_SRCCR (*((volatile u32 *)(SSI1_IO_BASE_ADDR + SRCCR))) +#define SSI1_SFCSR (*((volatile u32 *)(SSI1_IO_BASE_ADDR + SFCSR))) +#define SSI1_STR (*((volatile u32 *)(SSI1_IO_BASE_ADDR + STR))) +#define SSI1_SOR (*((volatile u32 *)(SSI1_IO_BASE_ADDR + SOR))) +#define SSI1_SACNT (*((volatile u32 *)(SSI1_IO_BASE_ADDR + SACNT))) +#define SSI1_SACADD (*((volatile u32 *)(SSI1_IO_BASE_ADDR + SACADD))) +#define SSI1_SACDAT (*((volatile u32 *)(SSI1_IO_BASE_ADDR + SACDAT))) +#define SSI1_SATAG (*((volatile u32 *)(SSI1_IO_BASE_ADDR + SATAG))) +#define SSI1_STMSK (*((volatile u32 *)(SSI1_IO_BASE_ADDR + STMSK))) +#define SSI1_SRMSK (*((volatile u32 *)(SSI1_IO_BASE_ADDR + SRMSK))) + + +#define SSI2_STX0 (*((volatile u32 *)(SSI2_IO_BASE_ADDR + STX0))) +#define SSI2_STX1 (*((volatile u32 *)(SSI2_IO_BASE_ADDR + STX1))) +#define SSI2_SRX0 (*((volatile u32 *)(SSI2_IO_BASE_ADDR + SRX0))) +#define SSI2_SRX1 (*((volatile u32 *)(SSI2_IO_BASE_ADDR + SRX1))) +#define SSI2_SCR (*((volatile u32 *)(SSI2_IO_BASE_ADDR + SCR))) +#define SSI2_SISR (*((volatile u32 *)(SSI2_IO_BASE_ADDR + SISR))) +#define SSI2_SIER (*((volatile u32 *)(SSI2_IO_BASE_ADDR + SIER))) +#define SSI2_STCR (*((volatile u32 *)(SSI2_IO_BASE_ADDR + STCR))) +#define SSI2_SRCR (*((volatile u32 *)(SSI2_IO_BASE_ADDR + SRCR))) +#define SSI2_STCCR (*((volatile u32 *)(SSI2_IO_BASE_ADDR + STCCR))) +#define SSI2_SRCCR (*((volatile u32 *)(SSI2_IO_BASE_ADDR + SRCCR))) +#define SSI2_SFCSR (*((volatile u32 *)(SSI2_IO_BASE_ADDR + SFCSR))) +#define SSI2_STR (*((volatile u32 *)(SSI2_IO_BASE_ADDR + STR))) +#define SSI2_SOR (*((volatile u32 *)(SSI2_IO_BASE_ADDR + SOR))) +#define SSI2_SACNT (*((volatile u32 *)(SSI2_IO_BASE_ADDR + SACNT))) +#define SSI2_SACADD (*((volatile u32 *)(SSI2_IO_BASE_ADDR + SACADD))) +#define SSI2_SACDAT (*((volatile u32 *)(SSI2_IO_BASE_ADDR + SACDAT))) +#define SSI2_SATAG (*((volatile u32 *)(SSI2_IO_BASE_ADDR + SATAG))) +#define SSI2_STMSK (*((volatile u32 *)(SSI2_IO_BASE_ADDR + STMSK))) +#define SSI2_SRMSK (*((volatile u32 *)(SSI2_IO_BASE_ADDR + SRMSK))) + +#define SSI_SCR_CLK_IST (1 << 9) +#define SSI_SCR_TCH_EN (1 << 8) +#define SSI_SCR_SYS_CLK_EN (1 << 7) +#define SSI_SCR_I2S_MODE_NORM (0 << 5) +#define SSI_SCR_I2S_MODE_MSTR (1 << 5) +#define SSI_SCR_I2S_MODE_SLAVE (2 << 5) +#define SSI_SCR_SYN (1 << 4) +#define SSI_SCR_NET (1 << 3) +#define SSI_SCR_RE (1 << 2) +#define SSI_SCR_TE (1 << 1) +#define SSI_SCR_SSIEN (1 << 0) + +#define SSI_SISR_CMDAU (1 << 18) +#define SSI_SISR_CMDDU (1 << 17) +#define SSI_SISR_RXT (1 << 16) +#define SSI_SISR_RDR1 (1 << 15) +#define SSI_SISR_RDR0 (1 << 14) +#define SSI_SISR_TDE1 (1 << 13) +#define SSI_SISR_TDE0 (1 << 12) +#define SSI_SISR_ROE1 (1 << 11) +#define SSI_SISR_ROE0 (1 << 10) +#define SSI_SISR_TUE1 (1 << 9) +#define SSI_SISR_TUE0 (1 << 8) +#define SSI_SISR_TFS (1 << 7) +#define SSI_SISR_RFS (1 << 6) +#define SSI_SISR_TLS (1 << 5) +#define SSI_SISR_RLS (1 << 4) +#define SSI_SISR_RFF1 (1 << 3) +#define SSI_SISR_RFF0 (1 << 2) +#define SSI_SISR_TFE1 (1 << 1) +#define SSI_SISR_TFE0 (1 << 0) + +#define SSI_SIER_RDMAE (1 << 22) +#define SSI_SIER_RIE (1 << 21) +#define SSI_SIER_TDMAE (1 << 20) +#define SSI_SIER_TIE (1 << 19) +#define SSI_SIER_CMDAU_EN (1 << 18) +#define SSI_SIER_CMDDU_EN (1 << 17) +#define SSI_SIER_RXT_EN (1 << 16) +#define SSI_SIER_RDR1_EN (1 << 15) +#define SSI_SIER_RDR0_EN (1 << 14) +#define SSI_SIER_TDE1_EN (1 << 13) +#define SSI_SIER_TDE0_EN (1 << 12) +#define SSI_SIER_ROE1_EN (1 << 11) +#define SSI_SIER_ROE0_EN (1 << 10) +#define SSI_SIER_TUE1_EN (1 << 9) +#define SSI_SIER_TUE0_EN (1 << 8) +#define SSI_SIER_TFS_EN (1 << 7) +#define SSI_SIER_RFS_EN (1 << 6) +#define SSI_SIER_TLS_EN (1 << 5) +#define SSI_SIER_RLS_EN (1 << 4) +#define SSI_SIER_RFF1_EN (1 << 3) +#define SSI_SIER_RFF0_EN (1 << 2) +#define SSI_SIER_TFE1_EN (1 << 1) +#define SSI_SIER_TFE0_EN (1 << 0) + +#define SSI_STCR_TXBIT0 (1 << 9) +#define SSI_STCR_TFEN1 (1 << 8) +#define SSI_STCR_TFEN0 (1 << 7) +#define SSI_STCR_TFDIR (1 << 6) +#define SSI_STCR_TXDIR (1 << 5) +#define SSI_STCR_TSHFD (1 << 4) +#define SSI_STCR_TSCKP (1 << 3) +#define SSI_STCR_TFSI (1 << 2) +#define SSI_STCR_TFSL (1 << 1) +#define SSI_STCR_TEFS (1 << 0) + +#define SSI_SRCR_RXBIT0 (1 << 9) +#define SSI_SRCR_RFEN1 (1 << 8) +#define SSI_SRCR_RFEN0 (1 << 7) +#define SSI_SRCR_RFDIR (1 << 6) +#define SSI_SRCR_RXDIR (1 << 5) +#define SSI_SRCR_RSHFD (1 << 4) +#define SSI_SRCR_RSCKP (1 << 3) +#define SSI_SRCR_RFSI (1 << 2) +#define SSI_SRCR_RFSL (1 << 1) +#define SSI_SRCR_REFS (1 << 0) + +#define SSI_STCCR_DIV2 (1 << 18) +#define SSI_STCCR_PSR (1 << 15) +#define SSI_STCCR_WL(x) ((((x) - 2) >> 1) << 13) +#define SSI_STCCR_DC(x) (((x) & 0x1f) << 8) +#define SSI_STCCR_PM(x) (((x) & 0xff) << 0) +#define SSI_STCCR_WL_MASK (0xf << 13) +#define SSI_STCCR_DC_MASK (0x1f << 8) +#define SSI_STCCR_PM_MASK (0xff << 0) + +#define SSI_SRCCR_DIV2 (1 << 18) +#define SSI_SRCCR_PSR (1 << 15) +#define SSI_SRCCR_WL(x) ((((x) - 2) >> 1) << 13) +#define SSI_SRCCR_DC(x) (((x) & 0x1f) << 8) +#define SSI_SRCCR_PM(x) (((x) & 0xff) << 0) +#define SSI_SRCCR_WL_MASK (0xf << 13) +#define SSI_SRCCR_DC_MASK (0x1f << 8) +#define SSI_SRCCR_PM_MASK (0xff << 0) + + +#define SSI_SFCSR_RFCNT1(x) (((x) & 0xf) << 28) +#define SSI_SFCSR_TFCNT1(x) (((x) & 0xf) << 24) +#define SSI_SFCSR_RFWM1(x) (((x) & 0xf) << 20) +#define SSI_SFCSR_TFWM1(x) (((x) & 0xf) << 16) +#define SSI_SFCSR_RFCNT0(x) (((x) & 0xf) << 12) +#define SSI_SFCSR_TFCNT0(x) (((x) & 0xf) << 8) +#define SSI_SFCSR_RFWM0(x) (((x) & 0xf) << 4) +#define SSI_SFCSR_TFWM0(x) (((x) & 0xf) << 0) + +#define SSI_STR_TEST (1 << 15) +#define SSI_STR_RCK2TCK (1 << 14) +#define SSI_STR_RFS2TFS (1 << 13) +#define SSI_STR_RXSTATE(x) (((x) & 0xf) << 8) +#define SSI_STR_TXD2RXD (1 << 7) +#define SSI_STR_TCK2RCK (1 << 6) +#define SSI_STR_TFS2RFS (1 << 5) +#define SSI_STR_TXSTATE(x) (((x) & 0xf) << 0) + +#define SSI_SOR_CLKOFF (1 << 6) +#define SSI_SOR_RX_CLR (1 << 5) +#define SSI_SOR_TX_CLR (1 << 4) +#define SSI_SOR_INIT (1 << 3) +#define SSI_SOR_WAIT(x) (((x) & 0x3) << 1) +#define SSI_SOR_SYNRST (1 << 0) + +#define SSI_SACNT_FRDIV(x) (((x) & 0x3f) << 5) +#define SSI_SACNT_WR (x << 4) +#define SSI_SACNT_RD (x << 3) +#define SSI_SACNT_TIF (x << 2) +#define SSI_SACNT_FV (x << 1) +#define SSI_SACNT_AC97EN (x << 0) + +/* Watermarks for FIFO's */ +#define TXFIFO_WATERMARK 0x4 +#define RXFIFO_WATERMARK 0x4 + +/* i.MX DAI SSP ID's */ +#define IMX_DAI_SSI0 0 /* SSI1 FIFO 0 */ +#define IMX_DAI_SSI1 1 /* SSI1 FIFO 1 */ +#define IMX_DAI_SSI2 2 /* SSI2 FIFO 0 */ +#define IMX_DAI_SSI3 3 /* SSI2 FIFO 1 */ + +/* SSI clock sources */ +#define IMX_SSP_SYS_CLK 0 + +/* SSI audio dividers */ +#define IMX_SSI_TX_DIV_2 0 +#define IMX_SSI_TX_DIV_PSR 1 +#define IMX_SSI_TX_DIV_PM 2 +#define IMX_SSI_RX_DIV_2 3 +#define IMX_SSI_RX_DIV_PSR 4 +#define IMX_SSI_RX_DIV_PM 5 + + +/* SSI Div 2 */ +#define IMX_SSI_DIV_2_OFF (~SSI_STCCR_DIV2) +#define IMX_SSI_DIV_2_ON SSI_STCCR_DIV2 + +extern struct snd_soc_dai imx_ssi_pcm_dai[4]; +extern int get_ssi_clk(int ssi, struct device *dev); +extern void put_ssi_clk(int ssi); +#endif --- -- Javier Martin Vista Silicon S.L. Universidad de Cantabria CDTUC - FASE C - Oficina S-345 Avda de los Castros s/n 39005- Santander. Cantabria. Spain +34 942 25 32 60 www.vista-silicon.com

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