August 2009 - Alsa-devel - mailman.alsa-project.org

[alsa-devel] Question to sophisticated alsa developer
by Andreas Bießmann 05 Aug '09

05 Aug '09

Hi all, I currently test alsa playback on AVR32 board with atmel's abdac driver. My environment is 2.6.30.4 customized kernel (customization for my own board), rootfs and toolchain made of customized buildroot from atmel. I use alsa-lib 1.0.20 with patch [1] applied and alsa-utils with patch [2] applied. The alsa code does compile and work fine (aside from my problem described some lines later). My test case is a sine wave file with 440Hz tone, samplerate is 17089 (cause of samplerate abdac driver offers and to avoid resampling in alsa-lib) playing with aplay. This works fine, I see a 440Hz sine wave on my oscilloscope and there is no effect as described later on. My problem is when I'm enabling dmix layer to run concurrent aplay processes I always get a click at the end of my last played sine wave file. My Oscilloscope shows me that there is sometimes a short part of a single or somtimes multiple sine period(s) moved down (or up) to mid value (I can supply a screenshot of oscilloscope, if this description is not clear enough). Mostly this effect is about 500 us long. The sine wave is missing the information at this position, it is no delay of the analog value at this position. If I overlay a correct sine wave the following part after the problematic position matches exactly the overlayed sine wave. I investigated that this problem always occur somewhere at the end of dmix. When I play a long "null" sample and start repeated play of my short sine wave sample the effect is not there while the null sample is playing. After ending of null sample the described effect appears instantly on each end of my repeated test sample. Here is my asound.conf to enable dmix layer for alsa: ---8<--- pcm.!default { type plug slave.pcm "dmixer" } ctl.mixer0 { type hw card 0 } pcm.!plughw { type plug slave.pcm "dmixer" } pcm.dmixer { type dmix ipc_key 1024 slave { pcm "hw:0" format S16_BE rate 17089 } bindings { 0 0 1 1 } slowptr false } ctl.dmixer { type hw card 0 } --->8--- Maybe there is already a bloomer in. I have tried to change slowptr stuff in pcm.dmixer without any effect to my problem. I also tried to change buffer sizes in dmixer's slave but these changes had no effect. I also tried some changes in kernel driver for ABDAC. I played a bit with periods_min and period_bytes_min without effect to my problem. The buffer_size in "Direct Stream Mixing PCM" is fixed to the value in "hw:0". But if I double the periods_min in Kernel (default: 6 periods_min, 64 periods_max) for "hw:0" the maximum value for buffer_size in "Direct Stream Mixing PCM" is fixed to 8192. The "Route conversion" layer has always the buffer_size value of the next layer. This is 8192 for doubled periods_min in kernel and dmix enabled and 12288 for doubled periods_min and dmix disabled. Any advice to this "feature"? Here is the output of aplay -v for dmix enabled: ---8<--- # aplay -v sin_440_17089_1sec.wav Playing WAVE 'sin_440_17089_1sec.wav' : Signed 16 bit Little Endian, Rate 17089 Hz, Mono Plug PCM: Route conversion PCM (sformat=S16_BE) Transformation table: 0 <- 0 1 <- 0 Its setup is: stream : PLAYBACK access : RW_INTERLEAVED format : S16_LE subformat : STD channels : 1 rate : 17089 exact rate : 17089 (17089/1) msbits : 16 buffer_size : 8192 period_size : 1024 period_time : 59921 tstamp_mode : NONE period_step : 1 avail_min : 1024 period_event : 0 start_threshold : 8192 stop_threshold : 8192 silence_threshold: 0 silence_size : 0 boundary : 1073741824 Slave: Direct Stream Mixing PCM Its setup is: stream : PLAYBACK access : MMAP_INTERLEAVED format : S16_BE subformat : STD channels : 2 rate : 17089 exact rate : 17089 (17089/1) msbits : 16 buffer_size : 8192 period_size : 1024 period_time : 59921 tstamp_mode : NONE period_step : 1 avail_min : 1024 period_event : 0 start_threshold : 8192 stop_threshold : 8192 silence_threshold: 0 silence_size : 0 boundary : 1073741824 Hardware PCM card 0 'Atmel ABDAC' device 0 subdevice 0 Its setup is: stream : PLAYBACK access : MMAP_INTERLEAVED format : S16_BE subformat : STD channels : 2 rate : 17089 exact rate : 17089 (17089/1) msbits : 16 buffer_size : 12288 period_size : 1024 period_time : 59921 tstamp_mode : ENABLE period_step : 1 avail_min : 1024 period_event : 0 start_threshold : 1 stop_threshold : 1610612736 silence_threshold: 0 silence_size : 1610612736 boundary : 1610612736 appl_ptr : 0 hw_ptr : 0 --->8--- And here the output of aplay -v without dmix: ---8<--- # aplay -v sin_440_17089_1sec.wav Playing WAVE 'sin_440_17089_1sec.wav' : Signed 16 bit Little Endian, Rate 17089 Hz, Mono Plug PCM: Route conversion PCM (sformat=S16_BE) Transformation table: 0 <- 0 1 <- 0 Its setup is: stream : PLAYBACK access : RW_INTERLEAVED format : S16_LE subformat : STD channels : 1 rate : 17089 exact rate : 17089 (17089/1) msbits : 16 buffer_size : 12288 period_size : 1024 period_time : 59921 tstamp_mode : NONE period_step : 1 avail_min : 1024 period_event : 0 start_threshold : 12288 stop_threshold : 12288 silence_threshold: 0 silence_size : 0 boundary : 1610612736 Slave: Hardware PCM card 0 'Atmel ABDAC' device 0 subdevice 0 Its setup is: stream : PLAYBACK access : MMAP_INTERLEAVED format : S16_BE subformat : STD channels : 2 rate : 17089 exact rate : 17089 (17089/1) msbits : 16 buffer_size : 12288 period_size : 1024 period_time : 59921 tstamp_mode : NONE period_step : 1 avail_min : 1024 period_event : 0 start_threshold : 12288 stop_threshold : 12288 silence_threshold: 0 silence_size : 0 boundary : 1610612736 appl_ptr : 0 hw_ptr : 0 --->8--- Well, currently I have no more ideas where to dig for my problem. I do need a mixing layer to allow two or three concurrent aplay instances at the same time but the output in this case is (atm) worse. Has anyone some advice where to search for a solution to my problem. Or has anybody some advice to use another feature of alsa to allow concurrent aplay processes? regards Andreas Bießmann [1] http://git.buildroot.net/buildroot/tree/package/multimedia/alsa-lib/alsa-li… [2] http://git.buildroot.net/buildroot/tree/package/multimedia/alsa-utils/alsa-…

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[alsa-devel] pyalsa: synchronizing queue with MIDI clock events
by Christopher Arndt 05 Aug '09

05 Aug '09

Hi everybody, this is my first post on this list, so please excuse me, should it not be the right place to post this. I started exploring programming the ALSA sequencer via the pyalsa Python interface, i.e the alsaseq module. I wrote a small utility that reads MIDI events from one port, filters/processes them and writes it to another. This allows for routing by channel, note range, controller number etc. and to filter out, replace or add MIDI events. Now to synchronize the queue tempo to incoming MIDI clock events, to be able implement synchronized delays or arpeggiators, I use the method in the code shown below. This works ok, but I notice that the measured BPM oscillates +-1 BPM around the value displayed by the clock source (my synth's sequencer) if I measure/average only a few (~10) ticks or do not round the result to an integer value. Is this the right approach? What is a sensible number of ticks to take into account for measurement? Should I use another reference timer than Python's time.time() function? Is pyalsa generally suitable for this kind of application even on older/weaker hardware (e.g. a NSLU2)? Any comments or suggestions for improvement would be very much appreciated! Chris class MidiProcessor(object): def run(self): # This is simplified to only show the general logic while True: events = self.sequencer.receive_events( timeout=RECEIVE_TIMEOUT, maxevents=1) for event in events: if event.type == SEQ_EVENT_CLOCK: self.sync_queue(event) else: # do other MIDI processing / routing def sync_queue(self, event): """Sync queue tempo to incoming MIDI clock events.""" # list to collect the timestamps of the last few ticks lt = self._last_ticks lt.append(time.time()) ltlen = len(lt) if ltlen > 1: # calculate & set bpm: calculate difference between # the times the last few ticks were received and average # all results avg_delta = sum( [y-x for x,y in zip(lt, lt[1:])]) / (ltlen-1) # tick length is a 24th of a quarter note bpm = round(60 / avg_delta / 24) if bpm != self.bpm: self.bpm = bpm self.sequencer.queue_tempo(self.queue, tempo=int(6e7 / self.bpm), ppq=self.ppq) # only remember last 24 received ticks # (length of a quarter note) if ltlen > 24: lt.pop(0)

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[alsa-devel] [PATCH 3/3] ASoC: add machine driver for i.mx27_visstrim_m10 board
by javier Martin 05 Aug '09

05 Aug '09

This adds support for i.mx27_visstrim_sm10 board machine driver which uses an i.mx27 processor plus a wm8974 codec. It has been tested on a visstrim_sm10 board. Signed-off-by: Javier Martin <javier.martin(a)vista-silicon.com> --- sound/soc/imx/Kconfig | 8 + sound/soc/imx/Makefile | 4 + sound/soc/imx/mx27vis_wm8974.c | 317 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 329 insertions(+), 0 deletions(-) diff --git a/sound/soc/imx/Kconfig b/sound/soc/imx/Kconfig index 886dadd..2c6f568 100644 --- a/sound/soc/imx/Kconfig +++ b/sound/soc/imx/Kconfig @@ -9,5 +9,13 @@ config SND_MX1_MX2_SOC config SND_MXC_SOC_SSI tristate +config SND_SOC_MX27VIS_WM8974 + tristate "SoC Audio support for MX27 - WM8974 Visstrim_sm10 board" + depends on SND_MX1_MX2_SOC && MACH_MX27 && MACH_IMX27_VISSTRIM_M10 + select SND_MXC_SOC_SSI + select SND_SOC_WM8974 + help + Say Y if you want to add support for SoC audio on Visstrim SM10 + board with WM8974. diff --git a/sound/soc/imx/Makefile b/sound/soc/imx/Makefile index 6552cb2..c2ffd2c 100644 --- a/sound/soc/imx/Makefile +++ b/sound/soc/imx/Makefile @@ -4,3 +4,7 @@ snd-soc-mxc-ssi-objs := mxc-ssi.o obj-$(CONFIG_SND_MX1_MX2_SOC) += snd-soc-mx1_mx2.o obj-$(CONFIG_SND_MXC_SOC_SSI) += snd-soc-mxc-ssi.o + +# i.MX Machine Support +snd-soc-mx27vis-wm8974-objs := mx27vis_wm8974.o +obj-$(CONFIG_SND_SOC_MX27VIS_WM8974) += snd-soc-mx27vis-wm8974.o diff --git a/sound/soc/imx/mx27vis_wm8974.c b/sound/soc/imx/mx27vis_wm8974.c new file mode 100644 index 0000000..e4dcb53 --- /dev/null +++ b/sound/soc/imx/mx27vis_wm8974.c @@ -0,0 +1,317 @@ +/* + * mx27vis_wm8974.c -- SoC audio for mx27vis + * + * Copyright 2009 Vista Silicon S.L. + * Author: Javier Martin + * javier.martin(a)vista-silicon.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ + +#include <linux/module.h> +#include <linux/moduleparam.h> +#include <linux/device.h> +#include <linux/i2c.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/soc.h> +#include <sound/soc-dapm.h> + + +#include "../codecs/wm8974.h" +#include "mx1_mx2-pcm.h" +#include "mxc-ssi.h" +#include <mach/gpio.h> +#include <mach/iomux.h> + +#define IGNORED_ARG 0 + + +static struct snd_soc_card mx27vis; + +/** + * This function connects SSI1 (HPCR1) as slave to + * SSI1 external signals (PPCR1) + * As slave, HPCR1 must set TFSDIR and TCLKDIR as inputs from + * port 4 + */ +void audmux_connect_1_4(void) +{ + pr_debug("AUDMUX: normal operation mode\n"); + /* Reset HPCR1 and PPCR1 */ + + DAM_HPCR1 = 0x00000000; + DAM_PPCR1 = 0x00000000; + + /* set to synchronous */ + DAM_HPCR1 |= AUDMUX_HPCR_SYN; + DAM_PPCR1 |= AUDMUX_PPCR_SYN; + + + /* set Rx sources 1 <--> 4 */ + DAM_HPCR1 |= AUDMUX_HPCR_RXDSEL(3); /* port 4 */ + DAM_PPCR1 |= AUDMUX_PPCR_RXDSEL(0); /* port 1 */ + + /* set Tx frame and Clock direction and source 4 --> 1 output */ + DAM_HPCR1 |= AUDMUX_HPCR_TFSDIR | AUDMUX_HPCR_TCLKDIR; + DAM_HPCR1 |= AUDMUX_HPCR_TFCSEL(3); /* TxDS and TxCclk from port 4 */ + + return; +} + +static int mx27vis_hifi_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *codec_dai = rtd->dai->codec_dai; + struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; + unsigned int pll_out = 0, bclk = 0, fmt = 0, mclk = 0; + int ret = 0; + + /* + * The WM8974 is better at generating accurate audio clocks than the + * MX27 SSI controller, so we will use it as master when we can. + */ + switch (params_rate(params)) { + case 8000: + fmt = SND_SOC_DAIFMT_CBM_CFM; + mclk = WM8974_MCLKDIV_12; + pll_out = 24576000; + break; + case 16000: + fmt = SND_SOC_DAIFMT_CBM_CFM; + pll_out = 12288000; + break; + case 48000: + fmt = SND_SOC_DAIFMT_CBM_CFM; + bclk = WM8974_BCLKDIV_4; + pll_out = 12288000; + break; + case 96000: + fmt = SND_SOC_DAIFMT_CBM_CFM; + bclk = WM8974_BCLKDIV_2; + pll_out = 12288000; + break; + case 11025: + fmt = SND_SOC_DAIFMT_CBM_CFM; + bclk = WM8974_BCLKDIV_16; + pll_out = 11289600; + break; + case 22050: + fmt = SND_SOC_DAIFMT_CBM_CFM; + bclk = WM8974_BCLKDIV_8; + pll_out = 11289600; + break; + case 44100: + fmt = SND_SOC_DAIFMT_CBM_CFM; + bclk = WM8974_BCLKDIV_4; + mclk = WM8974_MCLKDIV_2; + pll_out = 11289600; + break; + case 88200: + fmt = SND_SOC_DAIFMT_CBM_CFM; + bclk = WM8974_BCLKDIV_2; + pll_out = 11289600; + break; + } + + /* set codec DAI configuration */ + ret = codec_dai->ops->set_fmt(codec_dai, + SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_IF | + SND_SOC_DAIFMT_SYNC | fmt); + if (ret < 0) { + printk(KERN_ERR "Error from codec DAI configuration\n"); + return ret; + } + + /* set cpu DAI configuration */ + ret = cpu_dai->ops->set_fmt(cpu_dai, + SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | + SND_SOC_DAIFMT_SYNC | fmt); + if (ret < 0) { + printk(KERN_ERR "Error from cpu DAI configuration\n"); + return ret; + } + + /* Put DC field of STCCR to 1 (not zero) */ + ret = cpu_dai->ops->set_tdm_slot(cpu_dai, 0, 2); + + /* set the SSI system clock as input */ + ret = cpu_dai->ops->set_sysclk(cpu_dai, IMX_SSP_SYS_CLK, 0, + SND_SOC_CLOCK_IN); + if (ret < 0) { + printk(KERN_ERR "Error when setting system SSI clk\n"); + return ret; + } + + /* set codec BCLK division for sample rate */ + ret = codec_dai->ops->set_clkdiv(codec_dai, WM8974_BCLKDIV, bclk); + if (ret < 0) { + printk(KERN_ERR "Error when setting BCLK division\n"); + return ret; + } + + + /* codec PLL input is 25 MHz */ + ret = codec_dai->ops->set_pll(codec_dai, IGNORED_ARG, + 25000000, pll_out); + if (ret < 0) { + printk(KERN_ERR "Error when setting PLL input\n"); + return ret; + } + + /*set codec MCLK division for sample rate */ + ret = codec_dai->ops->set_clkdiv(codec_dai, WM8974_MCLKDIV, mclk); + if (ret < 0) { + printk(KERN_ERR "Error when setting MCLK division\n"); + return ret; + } + + return 0; +} + +static int mx27vis_hifi_hw_free(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *codec_dai = rtd->dai->codec_dai; + + /* disable the PLL */ + return codec_dai->ops->set_pll(codec_dai, IGNORED_ARG, 0, 0); +} + +/* + * mx27vis WM8974 HiFi DAI opserations. + */ +static struct snd_soc_ops mx27vis_hifi_ops = { + .hw_params = mx27vis_hifi_hw_params, + .hw_free = mx27vis_hifi_hw_free, +}; + + +static int mx27vis_suspend(struct platform_device *pdev, pm_message_t state) +{ + return 0; +} + +static int mx27vis_resume(struct platform_device *pdev) +{ + return 0; +} + +static int mx27vis_probe(struct platform_device *pdev) +{ + int ret = 0; + + ret = get_ssi_clk(0, &pdev->dev); + + if (ret < 0) { + printk(KERN_ERR "%s: cant get ssi clock\n", __func__); + return ret; + } + + + return 0; +} + +static int mx27vis_remove(struct platform_device *pdev) +{ + put_ssi_clk(0); + return 0; +} + +static struct snd_soc_dai_link mx27vis_dai[] = { +{ /* Hifi Playback*/ + .name = "WM8974", + .stream_name = "WM8974 HiFi", + .cpu_dai = &imx_ssi_pcm_dai[0], + .codec_dai = &wm8974_dai, + .ops = &mx27vis_hifi_ops, +}, +}; + +static struct snd_soc_card mx27vis = { + .name = "mx27vis", + .platform = &mx1_mx2_soc_platform, + .probe = mx27vis_probe, + .remove = mx27vis_remove, + .suspend_pre = mx27vis_suspend, + .resume_post = mx27vis_resume, + .dai_link = mx27vis_dai, + .num_links = ARRAY_SIZE(mx27vis_dai), +}; + +static struct snd_soc_device mx27vis_snd_devdata = { + .card = &mx27vis, + .codec_dev = &soc_codec_dev_wm8974, +}; + +static struct platform_device *mx27vis_snd_device; + +/* Temporal definition of board specific behaviour */ +void gpio_ssi_active(int ssi_num) +{ + int ret = 0; + + unsigned int ssi1_pins[] = { + PC20_PF_SSI1_FS, + PC21_PF_SSI1_RXD, + PC22_PF_SSI1_TXD, + PC23_PF_SSI1_CLK, + }; + unsigned int ssi2_pins[] = { + PC24_PF_SSI2_FS, + PC25_PF_SSI2_RXD, + PC26_PF_SSI2_TXD, + PC27_PF_SSI2_CLK, + }; + if (ssi_num == 0) + ret = mxc_gpio_setup_multiple_pins(ssi1_pins, + ARRAY_SIZE(ssi1_pins), "USB OTG"); + else + ret = mxc_gpio_setup_multiple_pins(ssi2_pins, + ARRAY_SIZE(ssi2_pins), "USB OTG"); + if (ret) + printk(KERN_ERR "Error requesting ssi %x pins\n", ssi_num); +} + + +static int __init mx27vis_init(void) +{ + int ret; + + mx27vis_snd_device = platform_device_alloc("soc-audio", -1); + if (!mx27vis_snd_device) + return -ENOMEM; + + platform_set_drvdata(mx27vis_snd_device, &mx27vis_snd_devdata); + mx27vis_snd_devdata.dev = &mx27vis_snd_device->dev; + ret = platform_device_add(mx27vis_snd_device); + + if (ret) { + printk(KERN_ERR "ASoC: Platform device allocation failed\n"); + platform_device_put(mx27vis_snd_device); + } + + /* WM8974 uses SSI1 (HPCR1) via AUDMUX port 4 for audio (PPCR1) */ + gpio_ssi_active(0); + audmux_connect_1_4(); + + return ret; +} + +static void __exit mx27vis_exit(void) +{ + /* We should call some "ssi_gpio_inactive()" properly */ +} + +module_init(mx27vis_init); +module_exit(mx27vis_exit); + + +MODULE_AUTHOR("Javier Martin, javier.martin(a)vista-silicon.com"); +MODULE_DESCRIPTION("ALSA SoC WM8974 mx27vis"); +MODULE_LICENSE("GPL"); --- -- Javier Martin Vista Silicon S.L. Universidad de Cantabria CDTUC - FASE C - Oficina S-345 Avda de los Castros s/n 39005- Santander. Cantabria. Spain +34 942 25 32 60 www.vista-silicon.com

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[alsa-devel] [PATCH 1/6] pulse: replace manual mainloop by pa_mainloop_iterate()
by Lennart Poettering 05 Aug '09

05 Aug '09

The pa_mainloop_prepare()/_poll()/_dispatch() can be simplified by simply calling pa_mainloop_iterate() which does all this in one call. --- pulse/conf_pulse.c | 10 +--------- 1 files changed, 1 insertions(+), 9 deletions(-) diff --git a/pulse/conf_pulse.c b/pulse/conf_pulse.c index 3f9e071..35dd383 100644 --- a/pulse/conf_pulse.c +++ b/pulse/conf_pulse.c @@ -61,15 +61,7 @@ conf_pulse_hook_load_if_running(snd_config_t * root, snd_config_t * config, goto out; do { - err = pa_mainloop_prepare(loop, -1); - if (err < 0) - goto out; - - err = pa_mainloop_poll(loop); - if (err < 0) - goto out; - - err = pa_mainloop_dispatch(loop); + err = pa_mainloop_iterate(loop, 1, NULL); if (err < 0) goto out; -- 1.6.4 Lennart -- Lennart Poettering Red Hat, Inc. lennart [at] poettering [dot] net ICQ# 11060553 http://0pointer.net/lennart/ GnuPG 0x1A015CC4

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[alsa-devel] [PATCH 6/6] pulse: immediately trigger EIO when connection is dropped
by Lennart Poettering 05 Aug '09

05 Aug '09

When the connection is dropped notify the application immediately instead of waiting until the applications calls into us the next time. This makes "aplay" handle connections shutdown similar to hardware unplugs: an immediate EIO is thrown. --- pulse/pulse.c | 9 ++++++++- 1 files changed, 8 insertions(+), 1 deletions(-) diff --git a/pulse/pulse.c b/pulse/pulse.c index 9c05171..a94caaf 100644 --- a/pulse/pulse.c +++ b/pulse/pulse.c @@ -77,10 +77,17 @@ int pulse_wait_operation(snd_pulse_t * p, pa_operation * o) static void context_state_cb(pa_context * c, void *userdata) { + pa_context_state_t state; snd_pulse_t *p = userdata; assert(c); - switch (pa_context_get_state(c)) { + state = pa_context_get_state(c); + + /* When we get disconnected, tell the process */x + if (!PA_CONTEXT_IS_GOOD(state)) + pulse_poll_activate(p); + + switch (state) { case PA_CONTEXT_READY: case PA_CONTEXT_TERMINATED: case PA_CONTEXT_FAILED: -- 1.6.4 Lennart -- Lennart Poettering Red Hat, Inc. lennart [at] poettering [dot] net ICQ# 11060553 http://0pointer.net/lennart/ GnuPG 0x1A015CC4

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[alsa-devel] [PATCH 5/6] pulse: rework object destruction paths a bit
by Lennart Poettering 04 Aug '09

04 Aug '09

Make sure we deal better with partially initialized structs. Don't check for pointer state before calling free() since free() does that anyway. --- pulse/ctl_pulse.c | 7 ++----- pulse/pcm_pulse.c | 19 ++++++++++--------- 2 files changed, 12 insertions(+), 14 deletions(-) diff --git a/pulse/ctl_pulse.c b/pulse/ctl_pulse.c index 879f260..85863ed 100644 --- a/pulse/ctl_pulse.c +++ b/pulse/ctl_pulse.c @@ -606,11 +606,8 @@ static void pulse_close(snd_ctl_ext_t * ext) if (ctl->p) pulse_free(ctl->p); - if (ctl->source) - free(ctl->source); - if (ctl->sink) - free(ctl->sink); - + free(ctl->source); + free(ctl->sink); free(ctl); } diff --git a/pulse/pcm_pulse.c b/pulse/pcm_pulse.c index 98983f8..02a837e 100644 --- a/pulse/pcm_pulse.c +++ b/pulse/pcm_pulse.c @@ -819,21 +819,22 @@ static int pulse_close(snd_pcm_ioplug_t * io) assert(pcm); - pa_threaded_mainloop_lock(pcm->p->mainloop); + if (pcm->p && pcm->p->mainloop) { - if (pcm->stream) { - pa_stream_disconnect(pcm->stream); - pa_stream_unref(pcm->stream); - } + pa_threaded_mainloop_lock(pcm->p->mainloop); - pa_threaded_mainloop_unlock(pcm->p->mainloop); + if (pcm->stream) { + pa_stream_disconnect(pcm->stream); + pa_stream_unref(pcm->stream); + } + + pa_threaded_mainloop_unlock(pcm->p->mainloop); + } if (pcm->p) pulse_free(pcm->p); - if (pcm->device) - free(pcm->device); - + free(pcm->device); free(pcm); return 0; -- 1.6.4 Lennart -- Lennart Poettering Red Hat, Inc. lennart [at] poettering [dot] net ICQ# 11060553 http://0pointer.net/lennart/ GnuPG 0x1A015CC4

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[alsa-devel] [PATCH 4/6] pulse: unify stream/context state checks
by Lennart Poettering 04 Aug '09

04 Aug '09

Unify (and simplify) the paths that check for the validity of a stream/context: always call into check_stream()/pulse_check_connection() when applicable instead of rolling our own checks each time. Also check for validity of mainloop before locking it. --- pulse/ctl_pulse.c | 72 ++++++++++++++++++++++++++++++++---------- pulse/pcm_pulse.c | 90 +++++++++++++++++++++++----------------------------- 2 files changed, 95 insertions(+), 67 deletions(-) diff --git a/pulse/ctl_pulse.c b/pulse/ctl_pulse.c index 2caa29b..879f260 100644 --- a/pulse/ctl_pulse.c +++ b/pulse/ctl_pulse.c @@ -150,9 +150,13 @@ static int pulse_update_volume(snd_ctl_pulse_t * ctl) assert(ctl); - if (!ctl->p || !ctl->p->mainloop || !ctl->p->context) + if (!ctl->p) return -EBADFD; + err = pulse_check_connection(ctl->p); + if (err < 0) + return err; + o = pa_context_get_sink_info_by_name(ctl->p->context, ctl->sink, sink_info_cb, ctl); if (o) { @@ -182,17 +186,27 @@ static int pulse_update_volume(snd_ctl_pulse_t * ctl) static int pulse_elem_count(snd_ctl_ext_t * ext) { snd_ctl_pulse_t *ctl = ext->private_data; - int count = 0; + int count = 0, err; assert(ctl); + if (!ctl->p || !ctl->p->mainloop) + return -EBADFD; + pa_threaded_mainloop_lock(ctl->p->mainloop); + err = pulse_check_connection(ctl->p); + if (err < 0) { + count = err; + goto finish; + } + if (ctl->source) count += 2; if (ctl->sink) count += 2; +finish: pa_threaded_mainloop_unlock(ctl->p->mainloop); return count; @@ -202,16 +216,21 @@ static int pulse_elem_list(snd_ctl_ext_t * ext, unsigned int offset, snd_ctl_elem_id_t * id) { snd_ctl_pulse_t *ctl = ext->private_data; + int err; assert(ctl); - if (!ctl->p || !ctl->p->mainloop || !ctl->p->context) + if (!ctl->p || !ctl->p->mainloop) return -EBADFD; snd_ctl_elem_id_set_interface(id, SND_CTL_ELEM_IFACE_MIXER); pa_threaded_mainloop_lock(ctl->p->mainloop); + err = pulse_check_connection(ctl->p); + if (err < 0) + goto finish; + if (ctl->source) { if (offset == 0) snd_ctl_elem_id_set_name(id, SOURCE_VOL_NAME); @@ -220,14 +239,19 @@ static int pulse_elem_list(snd_ctl_ext_t * ext, unsigned int offset, } else offset += 2; + err = 0; + +finish: pa_threaded_mainloop_unlock(ctl->p->mainloop); - if (offset == 2) - snd_ctl_elem_id_set_name(id, SINK_VOL_NAME); - else if (offset == 3) - snd_ctl_elem_id_set_name(id, SINK_MUTE_NAME); + if (err >= 0) { + if (offset == 2) + snd_ctl_elem_id_set_name(id, SINK_VOL_NAME); + else if (offset == 3) + snd_ctl_elem_id_set_name(id, SINK_MUTE_NAME); + } - return 0; + return err; } static snd_ctl_ext_key_t pulse_find_elem(snd_ctl_ext_t * ext, @@ -266,7 +290,7 @@ static int pulse_get_attribute(snd_ctl_ext_t * ext, snd_ctl_ext_key_t key, assert(ctl); - if (!ctl->p || !ctl->p->mainloop || !ctl->p->context) + if (!ctl->p || !ctl->p->mainloop) return -EBADFD; pa_threaded_mainloop_lock(ctl->p->mainloop); @@ -319,7 +343,7 @@ static int pulse_read_integer(snd_ctl_ext_t * ext, snd_ctl_ext_key_t key, assert(ctl); - if (!ctl->p || !ctl->p->mainloop || !ctl->p->context) + if (!ctl->p || !ctl->p->mainloop) return -EBADFD; pa_threaded_mainloop_lock(ctl->p->mainloop); @@ -371,7 +395,7 @@ static int pulse_write_integer(snd_ctl_ext_t * ext, snd_ctl_ext_key_t key, assert(ctl); - if (!ctl->p || !ctl->p->mainloop || !ctl->p->context) + if (!ctl->p || !ctl->p->mainloop) return -EBADFD; pa_threaded_mainloop_lock(ctl->p->mainloop); @@ -476,7 +500,7 @@ static void pulse_subscribe_events(snd_ctl_ext_t * ext, int subscribe) assert(ctl); - if (!ctl->p || !ctl->p->mainloop || !ctl->p->context) + if (!ctl->p || !ctl->p->mainloop) return; pa_threaded_mainloop_lock(ctl->p->mainloop); @@ -491,17 +515,23 @@ static int pulse_read_event(snd_ctl_ext_t * ext, snd_ctl_elem_id_t * id, { snd_ctl_pulse_t *ctl = ext->private_data; int offset; - int err = -EAGAIN; + int err; assert(ctl); - if (!ctl->p || !ctl->p->mainloop || !ctl->p->context) + if (!ctl->p || !ctl->p->mainloop) return -EBADFD; pa_threaded_mainloop_lock(ctl->p->mainloop); - if (!ctl->updated || !ctl->subscribed) + err = pulse_check_connection(ctl->p); + if (err < 0) + goto finish; + + if (!ctl->updated || !ctl->subscribed) { + err = -EAGAIN; goto finish; + } if (ctl->source) offset = 2; @@ -540,20 +570,28 @@ static int pulse_ctl_poll_revents(snd_ctl_ext_t * ext, struct pollfd *pfd, unsigned short *revents) { snd_ctl_pulse_t *ctl = ext->private_data; - int err = 0; + int err; assert(ctl); - if (!ctl->p || !ctl->p->mainloop || !ctl->p->context) + if (!ctl->p || !ctl->p->mainloop) return -EBADFD; pa_threaded_mainloop_lock(ctl->p->mainloop); + err = pulse_check_connection(ctl->p); + if (err < 0) + goto finish; + if (ctl->updated) *revents = POLLIN; else *revents = 0; + err = 0; + +finish: + pa_threaded_mainloop_unlock(ctl->p->mainloop); return err; diff --git a/pulse/pcm_pulse.c b/pulse/pcm_pulse.c index a625f55..98983f8 100644 --- a/pulse/pcm_pulse.c +++ b/pulse/pcm_pulse.c @@ -135,11 +135,15 @@ static int update_active(snd_pcm_pulse_t *pcm) { if (!pcm->p) return -EBADFD; - ret = check_active(pcm); + ret = check_stream(pcm); if (ret < 0) - return ret; + goto finish; + + ret = check_active(pcm); - if (ret > 0) +finish: + + if (ret != 0) /* On error signal the caller, too */ pulse_poll_activate(pcm->p); else pulse_poll_deactivate(pcm->p); @@ -199,12 +203,12 @@ static int pulse_start(snd_pcm_ioplug_t * io) assert(pcm); - if (!pcm->p) + if (!pcm->p || !pcm->p->mainloop) return -EBADFD; pa_threaded_mainloop_lock(pcm->p->mainloop); - err = pulse_check_connection(pcm->p); + err = check_stream(pcm); if (err < 0) goto finish; @@ -244,12 +248,12 @@ static int pulse_stop(snd_pcm_ioplug_t * io) assert(pcm); - if (!pcm->p) + if (!pcm->p || !pcm->p->mainloop) return -EBADFD; pa_threaded_mainloop_lock(pcm->p->mainloop); - err = pulse_check_connection(pcm->p); + err = check_stream(pcm); if (err < 0) goto finish; @@ -291,12 +295,12 @@ static int pulse_drain(snd_pcm_ioplug_t * io) assert(pcm); - if (!pcm->p) + if (!pcm->p || !pcm->p->mainloop) return -EBADFD; pa_threaded_mainloop_lock(pcm->p->mainloop); - err = pulse_check_connection(pcm->p); + err = check_stream(pcm); if (err < 0) goto finish; @@ -328,7 +332,7 @@ static snd_pcm_sframes_t pulse_pointer(snd_pcm_ioplug_t * io) assert(pcm); - if (!pcm->p) + if (!pcm->p || !pcm->p->mainloop) return -EBADFD; if (io->state == SND_PCM_STATE_XRUN) @@ -339,12 +343,7 @@ static snd_pcm_sframes_t pulse_pointer(snd_pcm_ioplug_t * io) pa_threaded_mainloop_lock(pcm->p->mainloop); - if (!pcm->stream) { - ret = -EBADFD; - goto finish; - } - - ret = pulse_check_connection(pcm->p); + ret = check_stream(pcm); if (ret < 0) goto finish; @@ -379,18 +378,13 @@ static int pulse_delay(snd_pcm_ioplug_t * io, snd_pcm_sframes_t * delayp) assert(pcm); - if (!pcm->p) + if (!pcm->p || !pcm->p->mainloop) return -EBADFD; pa_threaded_mainloop_lock(pcm->p->mainloop); - if (!pcm->stream) { - err = -EBADFD; - goto finish; - } - for (;;) { - err = pulse_check_connection(pcm->p); + err = check_stream(pcm); if (err < 0) goto finish; @@ -433,17 +427,12 @@ static snd_pcm_sframes_t pulse_write(snd_pcm_ioplug_t * io, assert(pcm); - if (!pcm->p) + if (!pcm->p || !pcm->p->mainloop) return -EBADFD; pa_threaded_mainloop_lock(pcm->p->mainloop); - if (!pcm->stream) { - ret = -EBADFD; - goto finish; - } - - ret = pulse_check_connection(pcm->p); + ret = check_stream(pcm); if (ret < 0) goto finish; @@ -493,17 +482,12 @@ static snd_pcm_sframes_t pulse_read(snd_pcm_ioplug_t * io, assert(pcm); - if (!pcm->p) + if (!pcm->p || !pcm->p->mainloop) return -EBADFD; pa_threaded_mainloop_lock(pcm->p->mainloop); - if (!pcm->stream) { - ret = -EBADFD; - goto finish; - } - - ret = pulse_check_connection(pcm->p); + ret = check_stream(pcm); if (ret < 0) goto finish; @@ -624,13 +608,16 @@ static int pulse_pcm_poll_revents(snd_pcm_ioplug_t * io, assert(pcm); - if (!pcm->p) + if (!pcm->p || !pcm->p->mainloop) return -EBADFD; pa_threaded_mainloop_lock(pcm->p->mainloop); - err = check_active(pcm); + err = check_stream(pcm); + if (err < 0) + goto finish; + err = check_active(pcm); if (err < 0) goto finish; @@ -655,7 +642,7 @@ static int pulse_prepare(snd_pcm_ioplug_t * io) assert(pcm); - if (!pcm->p) + if (!pcm->p || !pcm->p->mainloop) return -EBADFD; pa_threaded_mainloop_lock(pcm->p->mainloop); @@ -757,7 +744,7 @@ static int pulse_hw_params(snd_pcm_ioplug_t * io, assert(pcm); - if (!pcm->p) + if (!pcm->p || !pcm->p->mainloop) return -EBADFD; pa_threaded_mainloop_lock(pcm->p->mainloop); @@ -856,23 +843,26 @@ static int pulse_pause(snd_pcm_ioplug_t * io, int enable) { snd_pcm_pulse_t *pcm = io->private_data; int err = 0; + pa_operation *o; assert (pcm); - if (!pcm->p) + if (!pcm->p || !pcm->p->mainloop) return -EBADFD; pa_threaded_mainloop_lock(pcm->p->mainloop); - if (pcm->stream) { - pa_operation *o; - o = pa_stream_cork(pcm->stream, enable, NULL, NULL); - if (o) - pa_operation_unref(o); - else - err = -EIO; - } + err = check_stream(pcm); + if (err < 0) + goto finish; + + o = pa_stream_cork(pcm->stream, enable, NULL, NULL); + if (o) + pa_operation_unref(o); + else + err = -EIO; +finish: pa_threaded_mainloop_unlock(pcm->p->mainloop); return err; -- 1.6.4 Lennart -- Lennart Poettering Red Hat, Inc. lennart [at] poettering [dot] net ICQ# 11060553 http://0pointer.net/lennart/ GnuPG 0x1A015CC4

1 0

[alsa-devel] [PATCH 3/6] pulse: get rid of redundant state variable
by Lennart Poettering 04 Aug '09

04 Aug '09

snd_pulse_t::state was mostly shadowing the state of pa_context_get_state(snd_pulse_t::context), so get rid of it and use the state of the context directly. --- pulse/pulse.c | 14 +++----------- pulse/pulse.h | 6 ------ 2 files changed, 3 insertions(+), 17 deletions(-) diff --git a/pulse/pulse.c b/pulse/pulse.c index c313182..9c05171 100644 --- a/pulse/pulse.c +++ b/pulse/pulse.c @@ -59,12 +59,6 @@ int pulse_wait_operation(snd_pulse_t * p, pa_operation * o) assert(p); assert(o); - if (p->state != PULSE_STATE_READY) - return -EBADFD; - - if (!p->mainloop) - return -EBADFD; - for (;;) { int err; @@ -124,8 +118,6 @@ snd_pulse_t *pulse_new(void) if (!p) return NULL; - p->state = PULSE_STATE_INIT; - if (pipe(fd)) { free(p); return NULL; @@ -192,13 +184,15 @@ void pulse_free(snd_pulse_t * p) int pulse_connect(snd_pulse_t * p, const char *server) { int err; + pa_context_state_t state; assert(p); if (!p->context || !p->mainloop) return -EBADFD; - if (p->state != PULSE_STATE_INIT) + state = pa_context_get_state(p->context); + if (state != PA_CONTEXT_UNCONNECTED) return -EBADFD; pa_threaded_mainloop_lock(p->mainloop); @@ -221,8 +215,6 @@ int pulse_connect(snd_pulse_t * p, const char *server) pa_threaded_mainloop_unlock(p->mainloop); - p->state = PULSE_STATE_READY; - return 0; error: diff --git a/pulse/pulse.h b/pulse/pulse.h index 51f9a11..e98124f 100644 --- a/pulse/pulse.h +++ b/pulse/pulse.h @@ -31,12 +31,6 @@ typedef struct snd_pulse { pa_context *context; int thread_fd, main_fd; - - enum { - PULSE_STATE_INIT, - PULSE_STATE_READY, - } state; - } snd_pulse_t; int pulse_check_connection(snd_pulse_t * p); -- 1.6.4 Lennart -- Lennart Poettering Red Hat, Inc. lennart [at] poettering [dot] net ICQ# 11060553 http://0pointer.net/lennart/ GnuPG 0x1A015CC4

1 0

[alsa-devel] [PATCH 2/6] pulse: move a couple of PCM related functions from pulse.c to pcm_pulse.c
by Lennart Poettering 04 Aug '09

04 Aug '09

A number of functions in pulse.c are only relevant for the PCM handling, so let's move them to pcm_pulse.c. This allows us to simplify their argument lists a bit. --- pulse/pcm_pulse.c | 118 ++++++++++++++++++++++++++++++++++++++++++---------- pulse/pulse.c | 55 ------------------------- pulse/pulse.h | 4 -- 3 files changed, 95 insertions(+), 82 deletions(-) diff --git a/pulse/pcm_pulse.c b/pulse/pcm_pulse.c index 24347f9..a625f55 100644 --- a/pulse/pcm_pulse.c +++ b/pulse/pcm_pulse.c @@ -49,6 +49,32 @@ typedef struct snd_pcm_pulse { pa_buffer_attr buffer_attr; } snd_pcm_pulse_t; +static int check_stream(snd_pcm_pulse_t *pcm) +{ + int err; + pa_stream_state_t state; + + assert(pcm); + + if (!pcm->p) + return -EBADFD; + + err = pulse_check_connection(pcm->p); + if (err < 0) + return err; + + if (!pcm->stream) + return -EBADFD; + + state = pa_stream_get_state(pcm->stream); + if (!PA_STREAM_IS_GOOD(state)) + return -EIO; + + err = 0; + + return err; +} + static int update_ptr(snd_pcm_pulse_t *pcm) { size_t size; @@ -118,9 +144,53 @@ static int update_active(snd_pcm_pulse_t *pcm) { else pulse_poll_deactivate(pcm->p); + return ret; +} + +static int wait_stream_state(snd_pcm_pulse_t *pcm, pa_stream_state_t target) +{ + pa_stream_state_t state; + + assert(pcm); + + if (!pcm->p) + return -EBADFD; + + for (;;) { + int err; + + err = pulse_check_connection(pcm->p); + if (err < 0) + return err; + + if (!pcm->stream) + return -EBADFD; + + state = pa_stream_get_state(pcm->stream); + if (state == target) + break; + + if (!PA_STREAM_IS_GOOD(state)) + return -EIO; + + pa_threaded_mainloop_wait(pcm->p->mainloop); + } + return 0; } +static void stream_success_cb(pa_stream * p, int success, void *userdata) +{ + snd_pcm_pulse_t *pcm = userdata; + + assert(pcm); + + if (!pcm->p) + return; + + pa_threaded_mainloop_signal(pcm->p->mainloop, 0); +} + static int pulse_start(snd_pcm_ioplug_t * io) { snd_pcm_pulse_t *pcm = io->private_data; @@ -138,18 +208,13 @@ static int pulse_start(snd_pcm_ioplug_t * io) if (err < 0) goto finish; - if (pcm->stream == NULL) - goto finish; - - o = pa_stream_cork(pcm->stream, 0, pulse_stream_success_cb, - pcm->p); + o = pa_stream_cork(pcm->stream, 0, stream_success_cb, pcm); if (!o) { err = -EIO; goto finish; } - u = pa_stream_trigger(pcm->stream, pulse_stream_success_cb, - pcm->p); + u = pa_stream_trigger(pcm->stream, stream_success_cb, pcm); pcm->underrun = 0; err_o = pulse_wait_operation(pcm->p, o); @@ -165,7 +230,6 @@ static int pulse_start(snd_pcm_ioplug_t * io) goto finish; } - finish: pa_threaded_mainloop_unlock(pcm->p->mainloop); @@ -189,18 +253,13 @@ static int pulse_stop(snd_pcm_ioplug_t * io) if (err < 0) goto finish; - if (pcm->stream == NULL) - goto finish; - - o = pa_stream_cork(pcm->stream, 1, pulse_stream_success_cb, - pcm->p); + o = pa_stream_cork(pcm->stream, 1, stream_success_cb, pcm); if (!o) { err = -EIO; goto finish; } - u = pa_stream_flush(pcm->stream, pulse_stream_success_cb, - pcm->p); + u = pa_stream_flush(pcm->stream, stream_success_cb, pcm); if (!u) { pa_operation_unref(o); err = -EIO; @@ -241,7 +300,7 @@ static int pulse_drain(snd_pcm_ioplug_t * io) if (err < 0) goto finish; - o = pa_stream_drain(pcm->stream, pulse_stream_success_cb, pcm->p); + o = pa_stream_drain(pcm->stream, stream_success_cb, pcm); if (!o) { err = -EIO; goto finish; @@ -504,6 +563,23 @@ finish: return ret; } +static void stream_state_cb(pa_stream * p, void *userdata) +{ + snd_pcm_pulse_t *pcm = userdata; + pa_stream_state_t state; + + assert(pcm); + + if (!pcm->p) + return; + + state = pa_stream_get_state(p); + if (!PA_STREAM_IS_GOOD(state)) + pulse_poll_activate(pcm->p); + + pa_threaded_mainloop_signal(pcm->p->mainloop, 0); +} + static void stream_request_cb(pa_stream * p, size_t length, void *userdata) { snd_pcm_pulse_t *pcm = userdata; @@ -586,8 +662,7 @@ static int pulse_prepare(snd_pcm_ioplug_t * io) if (pcm->stream) { pa_stream_disconnect(pcm->stream); - pulse_wait_stream_state(pcm->p, pcm->stream, - PA_STREAM_TERMINATED); + wait_stream_state(pcm, PA_STREAM_TERMINATED); pa_stream_unref(pcm->stream); pcm->stream = NULL; } @@ -620,9 +695,7 @@ static int pulse_prepare(snd_pcm_ioplug_t * io) goto finish; } - pa_stream_set_state_callback(pcm->stream, pulse_stream_state_cb, - pcm->p); - + pa_stream_set_state_callback(pcm->stream, stream_state_cb, pcm); pa_stream_set_latency_update_callback(pcm->stream, stream_latency_cb, pcm); if (io->stream == SND_PCM_STREAM_PLAYBACK) { @@ -659,8 +732,7 @@ static int pulse_prepare(snd_pcm_ioplug_t * io) goto finish; } - err = - pulse_wait_stream_state(pcm->p, pcm->stream, PA_STREAM_READY); + err = wait_stream_state(pcm, PA_STREAM_READY); if (err < 0) { SNDERR("PulseAudio: Unable to create stream: %s\n", pa_strerror(pa_context_errno(pcm->p->context))); pa_stream_unref(pcm->stream); diff --git a/pulse/pulse.c b/pulse/pulse.c index 6f58a7e..c313182 100644 --- a/pulse/pulse.c +++ b/pulse/pulse.c @@ -44,26 +44,6 @@ int pulse_check_connection(snd_pulse_t * p) return 0; } -void pulse_stream_state_cb(pa_stream * s, void *userdata) -{ - snd_pulse_t *p = userdata; - - assert(s); - assert(p); - - pa_threaded_mainloop_signal(p->mainloop, 0); -} - -void pulse_stream_success_cb(pa_stream * s, int success, void *userdata) -{ - snd_pulse_t *p = userdata; - - assert(s); - assert(p); - - pa_threaded_mainloop_signal(p->mainloop, 0); -} - void pulse_context_success_cb(pa_context * c, int success, void *userdata) { snd_pulse_t *p = userdata; @@ -101,41 +81,6 @@ int pulse_wait_operation(snd_pulse_t * p, pa_operation * o) return 0; } -int pulse_wait_stream_state(snd_pulse_t * p, pa_stream * stream, - pa_stream_state_t target) -{ - pa_stream_state_t state; - - assert(p); - assert(stream); - - if (p->state != PULSE_STATE_READY) - return -EBADFD; - - if (!p->mainloop) - return -EBADFD; - - for (;;) { - int err; - - err = pulse_check_connection(p); - if (err < 0) - return err; - - state = pa_stream_get_state(stream); - - if (state == target) - break; - - if (!PA_STREAM_IS_GOOD(state)) - return -EIO; - - pa_threaded_mainloop_wait(p->mainloop); - } - - return 0; -} - static void context_state_cb(pa_context * c, void *userdata) { snd_pulse_t *p = userdata; diff --git a/pulse/pulse.h b/pulse/pulse.h index 7bf1a5b..51f9a11 100644 --- a/pulse/pulse.h +++ b/pulse/pulse.h @@ -41,13 +41,9 @@ typedef struct snd_pulse { int pulse_check_connection(snd_pulse_t * p); -void pulse_stream_state_cb(pa_stream * s, void *userdata); -void pulse_stream_success_cb(pa_stream * s, int success, void *userdata); void pulse_context_success_cb(pa_context * c, int success, void *userdata); int pulse_wait_operation(snd_pulse_t * p, pa_operation * o); -int pulse_wait_stream_state(snd_pulse_t * p, pa_stream * stream, - pa_stream_state_t target); snd_pulse_t *pulse_new(void); void pulse_free(snd_pulse_t * p); -- 1.6.4 Lennart -- Lennart Poettering Red Hat, Inc. lennart [at] poettering [dot] net ICQ# 11060553 http://0pointer.net/lennart/ GnuPG 0x1A015CC4

1 0

[alsa-devel] [PATCH 2/3] ASoC: add DAI platform ssi driver for MXC
by javier Martin 04 Aug '09

04 Aug '09

This adds support for DAI platform for the SSI present in MXC platforms. It currently does not support i.MX3, the only thing necessary to do this is to export DMA data for i.MX3 interface which I haven't done because I don't have a i.MX3 based board available. It has been tested on i.MX27 board. Signed-off-by: Javier Martin <javier.martin(a)vista-silicon.com> --- sound/soc/imx/Kconfig | 2 + sound/soc/imx/Makefile | 2 + sound/soc/imx/mxc-ssi.c | 868 +++++++++++++++++++++++++++++++++++++++++++++++ sound/soc/imx/mxc-ssi.h | 238 +++++++++++++ 4 files changed, 1110 insertions(+), 0 deletions(-) diff --git a/sound/soc/imx/Kconfig b/sound/soc/imx/Kconfig index a1bf053..886dadd 100644 --- a/sound/soc/imx/Kconfig +++ b/sound/soc/imx/Kconfig @@ -6,6 +6,8 @@ config SND_MX1_MX2_SOC Say Y or M if you want to add support for codecs attached to the MX1 or MX2 SSI interface. +config SND_MXC_SOC_SSI + tristate diff --git a/sound/soc/imx/Makefile b/sound/soc/imx/Makefile index c390f0f..6552cb2 100644 --- a/sound/soc/imx/Makefile +++ b/sound/soc/imx/Makefile @@ -1,4 +1,6 @@ # i.MX Platform Support snd-soc-mx1_mx2-objs := mx1_mx2-pcm.o +snd-soc-mxc-ssi-objs := mxc-ssi.o obj-$(CONFIG_SND_MX1_MX2_SOC) += snd-soc-mx1_mx2.o +obj-$(CONFIG_SND_MXC_SOC_SSI) += snd-soc-mxc-ssi.o diff --git a/sound/soc/imx/mxc-ssi.c b/sound/soc/imx/mxc-ssi.c new file mode 100644 index 0000000..3806ff2 --- /dev/null +++ b/sound/soc/imx/mxc-ssi.c @@ -0,0 +1,868 @@ +/* + * mxc-ssi.c -- SSI driver for Freescale IMX + * + * Copyright 2006 Wolfson Microelectronics PLC. + * Author: Liam Girdwood + * liam.girdwood(a)wolfsonmicro.com or linux(a)wolfsonmicro.com + * + * Based on mxc-alsa-mc13783 (C) 2006 Freescale. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * TODO: + * Need to rework SSI register defs when new defs go into mainline. + * Add support for TDM and FIFO 1. + * Add support for i.mx3x DMA interface. + * + */ + + +#include <linux/module.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/slab.h> +#include <linux/dma-mapping.h> +#include <linux/clk.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/soc.h> +#include <mach/dma-mx1-mx2.h> +#include <asm/mach-types.h> + +#include "mxc-ssi.h" +#include "mx1_mx2-pcm.h" + +#define SSI1_PORT 0 +#define SSI2_PORT 1 + +static int ssi_active[2] = {0, 0}; + +/* DMA information for mx1_mx2 platforms */ +static struct mx1_mx2_pcm_dma_params imx_ssi1_pcm_stereo_out0 = { + .name = "SSI1 PCM Stereo out 0", + .transfer_type = DMA_MODE_WRITE, + .per_address = SSI1_BASE_ADDR + STX0, + .event_id = DMA_REQ_SSI1_TX0, + .watermark_level = TXFIFO_WATERMARK, + .per_config = IMX_DMA_MEMSIZE_16 | IMX_DMA_TYPE_FIFO, + .mem_config = IMX_DMA_MEMSIZE_32 | IMX_DMA_TYPE_LINEAR, +}; + +static struct mx1_mx2_pcm_dma_params imx_ssi1_pcm_stereo_out1 = { + .name = "SSI1 PCM Stereo out 1", + .transfer_type = DMA_MODE_WRITE, + .per_address = SSI1_BASE_ADDR + STX1, + .event_id = DMA_REQ_SSI1_TX1, + .watermark_level = TXFIFO_WATERMARK, + .per_config = IMX_DMA_MEMSIZE_16 | IMX_DMA_TYPE_FIFO, + .mem_config = IMX_DMA_MEMSIZE_32 | IMX_DMA_TYPE_LINEAR, +}; + +static struct mx1_mx2_pcm_dma_params imx_ssi1_pcm_stereo_in0 = { + .name = "SSI1 PCM Stereo in 0", + .transfer_type = DMA_MODE_READ, + .per_address = SSI1_BASE_ADDR + SRX0, + .event_id = DMA_REQ_SSI1_RX0, + .watermark_level = RXFIFO_WATERMARK, + .per_config = IMX_DMA_MEMSIZE_16 | IMX_DMA_TYPE_FIFO, + .mem_config = IMX_DMA_MEMSIZE_32 | IMX_DMA_TYPE_LINEAR, +}; + +static struct mx1_mx2_pcm_dma_params imx_ssi1_pcm_stereo_in1 = { + .name = "SSI1 PCM Stereo in 1", + .transfer_type = DMA_MODE_READ, + .per_address = SSI1_BASE_ADDR + SRX1, + .event_id = DMA_REQ_SSI1_RX1, + .watermark_level = RXFIFO_WATERMARK, + .per_config = IMX_DMA_MEMSIZE_16 | IMX_DMA_TYPE_FIFO, + .mem_config = IMX_DMA_MEMSIZE_32 | IMX_DMA_TYPE_LINEAR, +}; + +static struct mx1_mx2_pcm_dma_params imx_ssi2_pcm_stereo_out0 = { + .name = "SSI2 PCM Stereo out 0", + .transfer_type = DMA_MODE_WRITE, + .per_address = SSI2_BASE_ADDR + STX0, + .event_id = DMA_REQ_SSI2_TX0, + .watermark_level = TXFIFO_WATERMARK, + .per_config = IMX_DMA_MEMSIZE_16 | IMX_DMA_TYPE_FIFO, + .mem_config = IMX_DMA_MEMSIZE_32 | IMX_DMA_TYPE_LINEAR, +}; + +static struct mx1_mx2_pcm_dma_params imx_ssi2_pcm_stereo_out1 = { + .name = "SSI2 PCM Stereo out 1", + .transfer_type = DMA_MODE_WRITE, + .per_address = SSI2_BASE_ADDR + STX1, + .event_id = DMA_REQ_SSI2_TX1, + .watermark_level = TXFIFO_WATERMARK, + .per_config = IMX_DMA_MEMSIZE_16 | IMX_DMA_TYPE_FIFO, + .mem_config = IMX_DMA_MEMSIZE_32 | IMX_DMA_TYPE_LINEAR, +}; + +static struct mx1_mx2_pcm_dma_params imx_ssi2_pcm_stereo_in0 = { + .name = "SSI2 PCM Stereo in 0", + .transfer_type = DMA_MODE_READ, + .per_address = SSI2_BASE_ADDR + SRX0, + .event_id = DMA_REQ_SSI2_RX0, + .watermark_level = RXFIFO_WATERMARK, + .per_config = IMX_DMA_MEMSIZE_16 | IMX_DMA_TYPE_FIFO, + .mem_config = IMX_DMA_MEMSIZE_32 | IMX_DMA_TYPE_LINEAR, +}; + +static struct mx1_mx2_pcm_dma_params imx_ssi2_pcm_stereo_in1 = { + .name = "SSI2 PCM Stereo in 1", + .transfer_type = DMA_MODE_READ, + .per_address = SSI2_BASE_ADDR + SRX1, + .event_id = DMA_REQ_SSI2_RX1, + .watermark_level = RXFIFO_WATERMARK, + .per_config = IMX_DMA_MEMSIZE_16 | IMX_DMA_TYPE_FIFO, + .mem_config = IMX_DMA_MEMSIZE_32 | IMX_DMA_TYPE_LINEAR, +}; + +static struct clk *ssi_clk0, *ssi_clk1; + +int get_ssi_clk(int ssi, struct device *dev) +{ + switch (ssi) { + case 0: + ssi_clk0 = clk_get(dev, "ssi1"); + if (IS_ERR(ssi_clk0)) + return PTR_ERR(ssi_clk0); + return 0; + case 1: + ssi_clk1 = clk_get(dev, "ssi2"); + if (IS_ERR(ssi_clk1)) + return PTR_ERR(ssi_clk1); + return 0; + default: + return -EINVAL; + } +} +EXPORT_SYMBOL(get_ssi_clk); + +void put_ssi_clk(int ssi) +{ + switch (ssi) { + case 0: + clk_put(ssi_clk0); + ssi_clk0 = NULL; + break; + case 1: + clk_put(ssi_clk1); + ssi_clk1 = NULL; + break; + } +} +EXPORT_SYMBOL(put_ssi_clk); + +/* + * SSI system clock configuration. + * Should only be called when port is inactive (i.e. SSIEN = 0). + */ +static int imx_ssi_set_dai_sysclk(struct snd_soc_dai *cpu_dai, + int clk_id, unsigned int freq, int dir) +{ + u32 scr; + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) { + scr = SSI1_SCR; + pr_debug("%s: SCR for SSI1 is %x\n", __func__, scr); + } else { + scr = SSI2_SCR; + pr_debug("%s: SCR for SSI2 is %x\n", __func__, scr); + } + + if (scr & SSI_SCR_SSIEN) { + printk(KERN_WARNING "Warning ssi already enabled\n"); + return 0; + } + + switch (clk_id) { + case IMX_SSP_SYS_CLK: + if (dir == SND_SOC_CLOCK_OUT) { + scr |= SSI_SCR_SYS_CLK_EN; + pr_debug("%s: clk of is output\n", __func__); + } else { + scr &= ~SSI_SCR_SYS_CLK_EN; + pr_debug("%s: clk of is input\n", __func__); + } + break; + default: + return -EINVAL; + } + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) { + pr_debug("%s: writeback of SSI1_SCR\n", __func__); + SSI1_SCR = scr; + } else { + pr_debug("%s: writeback of SSI2_SCR\n", __func__); + SSI2_SCR = scr; + } + + return 0; +} + +/* + * SSI Clock dividers + * Should only be called when port is inactive (i.e. SSIEN = 0). + */ +static int imx_ssi_set_dai_clkdiv(struct snd_soc_dai *cpu_dai, + int div_id, int div) +{ + u32 stccr, srccr; + + pr_debug("%s\n", __func__); + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) { + if (SSI1_SCR & SSI_SCR_SSIEN) + return 0; + srccr = SSI1_STCCR; + stccr = SSI1_STCCR; + } else { + if (SSI2_SCR & SSI_SCR_SSIEN) + return 0; + srccr = SSI2_STCCR; + stccr = SSI2_STCCR; + } + + switch (div_id) { + case IMX_SSI_TX_DIV_2: + stccr &= ~SSI_STCCR_DIV2; + stccr |= div; + break; + case IMX_SSI_TX_DIV_PSR: + stccr &= ~SSI_STCCR_PSR; + stccr |= div; + break; + case IMX_SSI_TX_DIV_PM: + stccr &= ~0xff; + stccr |= SSI_STCCR_PM(div); + break; + case IMX_SSI_RX_DIV_2: + stccr &= ~SSI_STCCR_DIV2; + stccr |= div; + break; + case IMX_SSI_RX_DIV_PSR: + stccr &= ~SSI_STCCR_PSR; + stccr |= div; + break; + case IMX_SSI_RX_DIV_PM: + stccr &= ~0xff; + stccr |= SSI_STCCR_PM(div); + break; + default: + return -EINVAL; + } + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) { + SSI1_STCCR = stccr; + SSI1_SRCCR = srccr; + } else { + SSI2_STCCR = stccr; + SSI2_SRCCR = srccr; + } + return 0; +} + +/* + * SSI Network Mode or TDM slots configuration. + * Should only be called when port is inactive (i.e. SSIEN = 0). + */ +static int imx_ssi_set_dai_tdm_slot(struct snd_soc_dai *cpu_dai, + unsigned int mask, int slots) +{ + u32 stmsk, srmsk, stccr; + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) { + if (SSI1_SCR & SSI_SCR_SSIEN) { + printk(KERN_WARNING "Warning ssi already enabled\n"); + return 0; + } + stccr = SSI1_STCCR; + } else { + if (SSI2_SCR & SSI_SCR_SSIEN) { + printk(KERN_WARNING "Warning ssi already enabled\n"); + return 0; + } + stccr = SSI2_STCCR; + } + + stmsk = srmsk = mask; + stccr &= ~SSI_STCCR_DC_MASK; + stccr |= SSI_STCCR_DC(slots - 1); + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) { + SSI1_STMSK = stmsk; + SSI1_SRMSK = srmsk; + SSI1_SRCCR = SSI1_STCCR = stccr; + } else { + SSI2_STMSK = stmsk; + SSI2_SRMSK = srmsk; + SSI2_SRCCR = SSI2_STCCR = stccr; + } + + return 0; +} + +/* + * SSI DAI format configuration. + * Should only be called when port is inactive (i.e. SSIEN = 0). + * Note: We don't use the I2S modes but instead manually configure the + * SSI for I2S. + */ +static int imx_ssi_set_dai_fmt(struct snd_soc_dai *cpu_dai, + unsigned int fmt) +{ + u32 stcr = 0, srcr = 0, scr; + + /* + * This is done to avoid this function to modify + * previous set values in stcr + */ + stcr = SSI1_STCR; + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) + scr = SSI1_SCR & ~(SSI_SCR_SYN | SSI_SCR_NET); + else + scr = SSI2_SCR & ~(SSI_SCR_SYN | SSI_SCR_NET); + + if (scr & SSI_SCR_SSIEN) { + printk(KERN_WARNING "Warning ssi already enabled\n"); + return 0; + } + + /* DAI mode */ + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + /* data on rising edge of bclk, frame low 1clk before data */ + stcr |= SSI_STCR_TFSI | SSI_STCR_TEFS | SSI_STCR_TXBIT0; + srcr |= SSI_SRCR_RFSI | SSI_SRCR_REFS | SSI_SRCR_RXBIT0; + break; + case SND_SOC_DAIFMT_LEFT_J: + /* data on rising edge of bclk, frame high with data */ + stcr |= SSI_STCR_TXBIT0; + srcr |= SSI_SRCR_RXBIT0; + break; + case SND_SOC_DAIFMT_DSP_B: + /* data on rising edge of bclk, frame high with data */ + stcr |= SSI_STCR_TFSL; + srcr |= SSI_SRCR_RFSL; + break; + case SND_SOC_DAIFMT_DSP_A: + /* data on rising edge of bclk, frame high 1clk before data */ + stcr |= SSI_STCR_TFSL | SSI_STCR_TEFS; + srcr |= SSI_SRCR_RFSL | SSI_SRCR_REFS; + break; + } + + /* DAI clock inversion */ + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_IB_IF: + stcr |= SSI_STCR_TFSI; + stcr &= ~SSI_STCR_TSCKP; + srcr |= SSI_SRCR_RFSI; + srcr &= ~SSI_SRCR_RSCKP; + break; + case SND_SOC_DAIFMT_IB_NF: + stcr &= ~(SSI_STCR_TSCKP | SSI_STCR_TFSI); + srcr &= ~(SSI_SRCR_RSCKP | SSI_SRCR_RFSI); + break; + case SND_SOC_DAIFMT_NB_IF: + stcr |= SSI_STCR_TFSI | SSI_STCR_TSCKP; + srcr |= SSI_SRCR_RFSI | SSI_SRCR_RSCKP; + break; + case SND_SOC_DAIFMT_NB_NF: + stcr &= ~SSI_STCR_TFSI; + stcr |= SSI_STCR_TSCKP; + srcr &= ~SSI_SRCR_RFSI; + srcr |= SSI_SRCR_RSCKP; + break; + } + + /* DAI clock master masks */ + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBS_CFS: + stcr |= SSI_STCR_TFDIR | SSI_STCR_TXDIR; + srcr |= SSI_SRCR_RFDIR | SSI_SRCR_RXDIR; + break; + case SND_SOC_DAIFMT_CBM_CFS: + stcr |= SSI_STCR_TFDIR; + srcr |= SSI_SRCR_RFDIR; + break; + case SND_SOC_DAIFMT_CBS_CFM: + stcr |= SSI_STCR_TXDIR; + srcr |= SSI_SRCR_RXDIR; + break; + } + + /* sync */ + if (!(fmt & SND_SOC_DAIFMT_ASYNC)) + scr |= SSI_SCR_SYN; + + /* tdm - only for stereo atm */ + if (fmt & SND_SOC_DAIFMT_TDM) + scr |= SSI_SCR_NET; + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) { + SSI1_STCR = stcr; + SSI1_SRCR = srcr; + SSI1_SCR = scr; + } else { + SSI2_STCR = stcr; + SSI2_SRCR = srcr; + SSI2_SCR = scr; + } + + return 0; +} + +static int imx_ssi_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + /* set up TX DMA params */ + switch (cpu_dai->id) { + case IMX_DAI_SSI0: + cpu_dai->dma_data = &imx_ssi1_pcm_stereo_out0; + break; + case IMX_DAI_SSI1: + cpu_dai->dma_data = &imx_ssi1_pcm_stereo_out1; + break; + case IMX_DAI_SSI2: + cpu_dai->dma_data = &imx_ssi2_pcm_stereo_out0; + break; + case IMX_DAI_SSI3: + cpu_dai->dma_data = &imx_ssi2_pcm_stereo_out1; + } + pr_debug("%s: (playback)\n", __func__); + } else { + /* set up RX DMA params */ + switch (cpu_dai->id) { + case IMX_DAI_SSI0: + cpu_dai->dma_data = &imx_ssi1_pcm_stereo_in0; + break; + case IMX_DAI_SSI1: + cpu_dai->dma_data = &imx_ssi1_pcm_stereo_in1; + break; + case IMX_DAI_SSI2: + cpu_dai->dma_data = &imx_ssi2_pcm_stereo_in0; + break; + case IMX_DAI_SSI3: + cpu_dai->dma_data = &imx_ssi2_pcm_stereo_in1; + } + pr_debug("%s: (capture)\n", __func__); + } + + /* + * we cant really change any SSI values after SSI is enabled + * need to fix in software for max flexibility - lrg + */ + if (cpu_dai->active) { + printk(KERN_WARNING "Warning ssi already enabled\n"); + return 0; + } + + /* reset the SSI port - Sect 45.4.4 */ + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) { + + if (!ssi_clk0) + return -EINVAL; + + if (ssi_active[SSI1_PORT]++) { + pr_debug("%s: exit before reset\n", __func__); + return 0; + } + + /* SSI1 Reset */ + SSI1_SCR = 0; + + SSI1_SFCSR = SSI_SFCSR_RFWM1(RXFIFO_WATERMARK) | + SSI_SFCSR_RFWM0(RXFIFO_WATERMARK) | + SSI_SFCSR_TFWM1(TXFIFO_WATERMARK) | + SSI_SFCSR_TFWM0(TXFIFO_WATERMARK); + } else { + + if (!ssi_clk1) + return -EINVAL; + + if (ssi_active[SSI2_PORT]++) { + pr_debug("%s: exit before reset\n", __func__); + return 0; + } + + /* SSI2 Reset */ + SSI2_SCR = 0; + + SSI2_SFCSR = SSI_SFCSR_RFWM1(RXFIFO_WATERMARK) | + SSI_SFCSR_RFWM0(RXFIFO_WATERMARK) | + SSI_SFCSR_TFWM1(TXFIFO_WATERMARK) | + SSI_SFCSR_TFWM0(TXFIFO_WATERMARK); + } + + return 0; +} + +int imx_ssi_hw_tx_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; + u32 stccr, stcr, sier; + + pr_debug("%s\n", __func__); + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) { + stccr = SSI1_STCCR & ~SSI_STCCR_WL_MASK; + stcr = SSI1_STCR; + sier = SSI1_SIER; + } else { + stccr = SSI2_STCCR & ~SSI_STCCR_WL_MASK; + stcr = SSI2_STCR; + sier = SSI2_SIER; + } + + /* DAI data (word) size */ + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_S16_LE: + stccr |= SSI_STCCR_WL(16); + break; + case SNDRV_PCM_FORMAT_S20_3LE: + stccr |= SSI_STCCR_WL(20); + break; + case SNDRV_PCM_FORMAT_S24_LE: + stccr |= SSI_STCCR_WL(24); + break; + } + + /* enable interrupts */ + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) + stcr |= SSI_STCR_TFEN0; + else + stcr |= SSI_STCR_TFEN1; + sier |= SSI_SIER_TDMAE; + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) { + SSI1_STCR = stcr; + SSI1_STCCR = stccr; + SSI1_SIER = sier; + } else { + SSI2_STCR = stcr; + SSI2_STCCR = stccr; + SSI2_SIER = sier; + } + + return 0; +} + +int imx_ssi_hw_rx_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; + u32 srccr, srcr, sier; + + pr_debug("%s\n", __func__); + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) { + srccr = SSI1_SRCCR & ~SSI_SRCCR_WL_MASK; + srcr = SSI1_SRCR; + sier = SSI1_SIER; + } else { + srccr = SSI2_SRCCR & ~SSI_SRCCR_WL_MASK; + srcr = SSI2_SRCR; + sier = SSI2_SIER; + } + + /* DAI data (word) size */ + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_S16_LE: + srccr |= SSI_SRCCR_WL(16); + break; + case SNDRV_PCM_FORMAT_S20_3LE: + srccr |= SSI_SRCCR_WL(20); + break; + case SNDRV_PCM_FORMAT_S24_LE: + srccr |= SSI_SRCCR_WL(24); + break; + } + + /* enable interrupts */ + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) + srcr |= SSI_SRCR_RFEN0; + else + srcr |= SSI_SRCR_RFEN1; + sier |= SSI_SIER_RDMAE; + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) { + SSI1_SRCR = srcr; + SSI1_SRCCR = srccr; + SSI1_SIER = sier; + } else { + SSI2_SRCR = srcr; + SSI2_SRCCR = srccr; + SSI2_SIER = sier; + } + + return 0; +} + +/* + * Should only be called when port is inactive (i.e. SSIEN = 0), + * although can be called multiple times by upper layers. + */ +int imx_ssi_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; + + int ret; + + /* cant change any parameters when SSI is running */ + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) { + if (SSI1_SCR & SSI_SCR_SSIEN) { + printk(KERN_WARNING "Warning ssi already enabled\n"); + return 0; + } + } else { + if (SSI2_SCR & SSI_SCR_SSIEN) { + printk(KERN_WARNING "Warning ssi already enabled\n"); + return 0; + } + } + + /* + * Configure both tx and rx params with the same settings. This is + * really a harware restriction because SSI must be disabled until + * we can change those values. If there is an active audio stream in + * one direction, enabling the other direction with different + * settings would mean disturbing the running one. + */ + ret = imx_ssi_hw_tx_params(substream, params); + if (ret < 0) + return ret; + return imx_ssi_hw_rx_params(substream, params); +} + +int imx_ssi_prepare(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; + int ret; + + pr_debug("%s\n", __func__); + + /* Enable clks here to follow SSI recommended init sequence */ + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) { + ret = clk_enable(ssi_clk0); + if (ret < 0) + printk(KERN_ERR "Unable to enable ssi_clk0\n"); + } else { + ret = clk_enable(ssi_clk1); + if (ret < 0) + printk(KERN_ERR "Unable to enable ssi_clk1\n"); + } + + return 0; +} + +static int imx_ssi_trigger(struct snd_pcm_substream *substream, int cmd, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; + u32 scr; + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) + scr = SSI1_SCR; + else + scr = SSI2_SCR; + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + case SNDRV_PCM_TRIGGER_RESUME: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + scr |= SSI_SCR_TE | SSI_SCR_SSIEN; + else + scr |= SSI_SCR_RE | SSI_SCR_SSIEN; + break; + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + scr &= ~SSI_SCR_TE; + else + scr &= ~SSI_SCR_RE; + break; + default: + return -EINVAL; + } + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) + SSI1_SCR = scr; + else + SSI2_SCR = scr; + + return 0; +} + +static void imx_ssi_shutdown(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; + + /* shutdown SSI if neither Tx or Rx is active */ + if (!cpu_dai->active) { + + if (cpu_dai->id == IMX_DAI_SSI0 || + cpu_dai->id == IMX_DAI_SSI2) { + + if (--ssi_active[SSI1_PORT] > 1) + return; + + SSI1_SCR = 0; + clk_disable(ssi_clk0); + } else { + if (--ssi_active[SSI2_PORT]) + return; + SSI2_SCR = 0; + clk_disable(ssi_clk1); + } + } +} + +#ifdef CONFIG_PM +static int imx_ssi_suspend(struct platform_device *dev, + struct snd_soc_dai *dai) +{ + return 0; +} + +static int imx_ssi_resume(struct platform_device *pdev, + struct snd_soc_dai *dai) +{ + return 0; +} + +#else +#define imx_ssi_suspend NULL +#define imx_ssi_resume NULL +#endif + +#define IMX_SSI_RATES \ + (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | \ + SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | \ + SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \ + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | \ + SNDRV_PCM_RATE_96000) + +#define IMX_SSI_BITS \ + (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ + SNDRV_PCM_FMTBIT_S24_LE) + +static struct snd_soc_dai_ops imx_ssi_pcm_dai_ops = { + .startup = imx_ssi_startup, + .shutdown = imx_ssi_shutdown, + .trigger = imx_ssi_trigger, + .prepare = imx_ssi_prepare, + .hw_params = imx_ssi_hw_params, + .set_sysclk = imx_ssi_set_dai_sysclk, + .set_clkdiv = imx_ssi_set_dai_clkdiv, + .set_fmt = imx_ssi_set_dai_fmt, + .set_tdm_slot = imx_ssi_set_dai_tdm_slot, +}; + +struct snd_soc_dai imx_ssi_pcm_dai[] = { +{ + .name = "imx-i2s-1-0", + .id = IMX_DAI_SSI0, + .suspend = imx_ssi_suspend, + .resume = imx_ssi_resume, + .playback = { + .channels_min = 1, + .channels_max = 2, + .formats = IMX_SSI_BITS, + .rates = IMX_SSI_RATES,}, + .capture = { + .channels_min = 1, + .channels_max = 2, + .formats = IMX_SSI_BITS, + .rates = IMX_SSI_RATES,}, + .ops = &imx_ssi_pcm_dai_ops, +}, +{ + .name = "imx-i2s-2-0", + .id = IMX_DAI_SSI1, + .playback = { + .channels_min = 1, + .channels_max = 2, + .formats = IMX_SSI_BITS, + .rates = IMX_SSI_RATES,}, + .capture = { + .channels_min = 1, + .channels_max = 2, + .formats = IMX_SSI_BITS, + .rates = IMX_SSI_RATES,}, + .ops = &imx_ssi_pcm_dai_ops, +}, +{ + .name = "imx-i2s-1-1", + .id = IMX_DAI_SSI2, + .suspend = imx_ssi_suspend, + .resume = imx_ssi_resume, + .playback = { + .channels_min = 1, + .channels_max = 2, + .formats = IMX_SSI_BITS, + .rates = IMX_SSI_RATES,}, + .capture = { + .channels_min = 1, + .channels_max = 2, + .formats = IMX_SSI_BITS, + .rates = IMX_SSI_RATES,}, + .ops = &imx_ssi_pcm_dai_ops, +}, +{ + .name = "imx-i2s-2-1", + .id = IMX_DAI_SSI3, + .playback = { + .channels_min = 1, + .channels_max = 2, + .formats = IMX_SSI_BITS, + .rates = IMX_SSI_RATES,}, + .capture = { + .channels_min = 1, + .channels_max = 2, + .formats = IMX_SSI_BITS, + .rates = IMX_SSI_RATES,}, + .ops = &imx_ssi_pcm_dai_ops, +}, +}; +EXPORT_SYMBOL_GPL(imx_ssi_pcm_dai); + +static int __init imx_ssi_init(void) +{ + return snd_soc_register_dais(imx_ssi_pcm_dai, + ARRAY_SIZE(imx_ssi_pcm_dai)); +} + +static void __exit imx_ssi_exit(void) +{ + snd_soc_unregister_dais(imx_ssi_pcm_dai, + ARRAY_SIZE(imx_ssi_pcm_dai)); +} + +module_init(imx_ssi_init); +module_exit(imx_ssi_exit); +MODULE_AUTHOR("Liam Girdwood, liam.girdwood(a)wolfsonmicro.com"); +MODULE_DESCRIPTION("i.MX ASoC I2S driver"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/imx/mxc-ssi.h b/sound/soc/imx/mxc-ssi.h new file mode 100644 index 0000000..12bbdc9 --- /dev/null +++ b/sound/soc/imx/mxc-ssi.h @@ -0,0 +1,238 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef _IMX_SSI_H +#define _IMX_SSI_H + +#include <mach/hardware.h> + +/* SSI regs definition - MOVE to /arch/arm/plat-mxc/include/mach/ when stable */ +#define SSI1_IO_BASE_ADDR IO_ADDRESS(SSI1_BASE_ADDR) +#define SSI2_IO_BASE_ADDR IO_ADDRESS(SSI2_BASE_ADDR) + +#define STX0 0x00 +#define STX1 0x04 +#define SRX0 0x08 +#define SRX1 0x0c +#define SCR 0x10 +#define SISR 0x14 +#define SIER 0x18 +#define STCR 0x1c +#define SRCR 0x20 +#define STCCR 0x24 +#define SRCCR 0x28 +#define SFCSR 0x2c +#define STR 0x30 +#define SOR 0x34 +#define SACNT 0x38 +#define SACADD 0x3c +#define SACDAT 0x40 +#define SATAG 0x44 +#define STMSK 0x48 +#define SRMSK 0x4c + +#define SSI1_STX0 (*((volatile u32 *)(SSI1_IO_BASE_ADDR + STX0))) +#define SSI1_STX1 (*((volatile u32 *)(SSI1_IO_BASE_ADDR + STX1))) +#define SSI1_SRX0 (*((volatile u32 *)(SSI1_IO_BASE_ADDR + SRX0))) +#define SSI1_SRX1 (*((volatile u32 *)(SSI1_IO_BASE_ADDR + SRX1))) +#define SSI1_SCR (*((volatile u32 *)(SSI1_IO_BASE_ADDR + SCR))) +#define SSI1_SISR (*((volatile u32 *)(SSI1_IO_BASE_ADDR + SISR))) +#define SSI1_SIER (*((volatile u32 *)(SSI1_IO_BASE_ADDR + SIER))) +#define SSI1_STCR (*((volatile u32 *)(SSI1_IO_BASE_ADDR + STCR))) +#define SSI1_SRCR (*((volatile u32 *)(SSI1_IO_BASE_ADDR + SRCR))) +#define SSI1_STCCR (*((volatile u32 *)(SSI1_IO_BASE_ADDR + STCCR))) +#define SSI1_SRCCR (*((volatile u32 *)(SSI1_IO_BASE_ADDR + SRCCR))) +#define SSI1_SFCSR (*((volatile u32 *)(SSI1_IO_BASE_ADDR + SFCSR))) +#define SSI1_STR (*((volatile u32 *)(SSI1_IO_BASE_ADDR + STR))) +#define SSI1_SOR (*((volatile u32 *)(SSI1_IO_BASE_ADDR + SOR))) +#define SSI1_SACNT (*((volatile u32 *)(SSI1_IO_BASE_ADDR + SACNT))) +#define SSI1_SACADD (*((volatile u32 *)(SSI1_IO_BASE_ADDR + SACADD))) +#define SSI1_SACDAT (*((volatile u32 *)(SSI1_IO_BASE_ADDR + SACDAT))) +#define SSI1_SATAG (*((volatile u32 *)(SSI1_IO_BASE_ADDR + SATAG))) +#define SSI1_STMSK (*((volatile u32 *)(SSI1_IO_BASE_ADDR + STMSK))) +#define SSI1_SRMSK (*((volatile u32 *)(SSI1_IO_BASE_ADDR + SRMSK))) + + +#define SSI2_STX0 (*((volatile u32 *)(SSI2_IO_BASE_ADDR + STX0))) +#define SSI2_STX1 (*((volatile u32 *)(SSI2_IO_BASE_ADDR + STX1))) +#define SSI2_SRX0 (*((volatile u32 *)(SSI2_IO_BASE_ADDR + SRX0))) +#define SSI2_SRX1 (*((volatile u32 *)(SSI2_IO_BASE_ADDR + SRX1))) +#define SSI2_SCR (*((volatile u32 *)(SSI2_IO_BASE_ADDR + SCR))) +#define SSI2_SISR (*((volatile u32 *)(SSI2_IO_BASE_ADDR + SISR))) +#define SSI2_SIER (*((volatile u32 *)(SSI2_IO_BASE_ADDR + SIER))) +#define SSI2_STCR (*((volatile u32 *)(SSI2_IO_BASE_ADDR + STCR))) +#define SSI2_SRCR (*((volatile u32 *)(SSI2_IO_BASE_ADDR + SRCR))) +#define SSI2_STCCR (*((volatile u32 *)(SSI2_IO_BASE_ADDR + STCCR))) +#define SSI2_SRCCR (*((volatile u32 *)(SSI2_IO_BASE_ADDR + SRCCR))) +#define SSI2_SFCSR (*((volatile u32 *)(SSI2_IO_BASE_ADDR + SFCSR))) +#define SSI2_STR (*((volatile u32 *)(SSI2_IO_BASE_ADDR + STR))) +#define SSI2_SOR (*((volatile u32 *)(SSI2_IO_BASE_ADDR + SOR))) +#define SSI2_SACNT (*((volatile u32 *)(SSI2_IO_BASE_ADDR + SACNT))) +#define SSI2_SACADD (*((volatile u32 *)(SSI2_IO_BASE_ADDR + SACADD))) +#define SSI2_SACDAT (*((volatile u32 *)(SSI2_IO_BASE_ADDR + SACDAT))) +#define SSI2_SATAG (*((volatile u32 *)(SSI2_IO_BASE_ADDR + SATAG))) +#define SSI2_STMSK (*((volatile u32 *)(SSI2_IO_BASE_ADDR + STMSK))) +#define SSI2_SRMSK (*((volatile u32 *)(SSI2_IO_BASE_ADDR + SRMSK))) + +#define SSI_SCR_CLK_IST (1 << 9) +#define SSI_SCR_TCH_EN (1 << 8) +#define SSI_SCR_SYS_CLK_EN (1 << 7) +#define SSI_SCR_I2S_MODE_NORM (0 << 5) +#define SSI_SCR_I2S_MODE_MSTR (1 << 5) +#define SSI_SCR_I2S_MODE_SLAVE (2 << 5) +#define SSI_SCR_SYN (1 << 4) +#define SSI_SCR_NET (1 << 3) +#define SSI_SCR_RE (1 << 2) +#define SSI_SCR_TE (1 << 1) +#define SSI_SCR_SSIEN (1 << 0) + +#define SSI_SISR_CMDAU (1 << 18) +#define SSI_SISR_CMDDU (1 << 17) +#define SSI_SISR_RXT (1 << 16) +#define SSI_SISR_RDR1 (1 << 15) +#define SSI_SISR_RDR0 (1 << 14) +#define SSI_SISR_TDE1 (1 << 13) +#define SSI_SISR_TDE0 (1 << 12) +#define SSI_SISR_ROE1 (1 << 11) +#define SSI_SISR_ROE0 (1 << 10) +#define SSI_SISR_TUE1 (1 << 9) +#define SSI_SISR_TUE0 (1 << 8) +#define SSI_SISR_TFS (1 << 7) +#define SSI_SISR_RFS (1 << 6) +#define SSI_SISR_TLS (1 << 5) +#define SSI_SISR_RLS (1 << 4) +#define SSI_SISR_RFF1 (1 << 3) +#define SSI_SISR_RFF0 (1 << 2) +#define SSI_SISR_TFE1 (1 << 1) +#define SSI_SISR_TFE0 (1 << 0) + +#define SSI_SIER_RDMAE (1 << 22) +#define SSI_SIER_RIE (1 << 21) +#define SSI_SIER_TDMAE (1 << 20) +#define SSI_SIER_TIE (1 << 19) +#define SSI_SIER_CMDAU_EN (1 << 18) +#define SSI_SIER_CMDDU_EN (1 << 17) +#define SSI_SIER_RXT_EN (1 << 16) +#define SSI_SIER_RDR1_EN (1 << 15) +#define SSI_SIER_RDR0_EN (1 << 14) +#define SSI_SIER_TDE1_EN (1 << 13) +#define SSI_SIER_TDE0_EN (1 << 12) +#define SSI_SIER_ROE1_EN (1 << 11) +#define SSI_SIER_ROE0_EN (1 << 10) +#define SSI_SIER_TUE1_EN (1 << 9) +#define SSI_SIER_TUE0_EN (1 << 8) +#define SSI_SIER_TFS_EN (1 << 7) +#define SSI_SIER_RFS_EN (1 << 6) +#define SSI_SIER_TLS_EN (1 << 5) +#define SSI_SIER_RLS_EN (1 << 4) +#define SSI_SIER_RFF1_EN (1 << 3) +#define SSI_SIER_RFF0_EN (1 << 2) +#define SSI_SIER_TFE1_EN (1 << 1) +#define SSI_SIER_TFE0_EN (1 << 0) + +#define SSI_STCR_TXBIT0 (1 << 9) +#define SSI_STCR_TFEN1 (1 << 8) +#define SSI_STCR_TFEN0 (1 << 7) +#define SSI_STCR_TFDIR (1 << 6) +#define SSI_STCR_TXDIR (1 << 5) +#define SSI_STCR_TSHFD (1 << 4) +#define SSI_STCR_TSCKP (1 << 3) +#define SSI_STCR_TFSI (1 << 2) +#define SSI_STCR_TFSL (1 << 1) +#define SSI_STCR_TEFS (1 << 0) + +#define SSI_SRCR_RXBIT0 (1 << 9) +#define SSI_SRCR_RFEN1 (1 << 8) +#define SSI_SRCR_RFEN0 (1 << 7) +#define SSI_SRCR_RFDIR (1 << 6) +#define SSI_SRCR_RXDIR (1 << 5) +#define SSI_SRCR_RSHFD (1 << 4) +#define SSI_SRCR_RSCKP (1 << 3) +#define SSI_SRCR_RFSI (1 << 2) +#define SSI_SRCR_RFSL (1 << 1) +#define SSI_SRCR_REFS (1 << 0) + +#define SSI_STCCR_DIV2 (1 << 18) +#define SSI_STCCR_PSR (1 << 15) +#define SSI_STCCR_WL(x) ((((x) - 2) >> 1) << 13) +#define SSI_STCCR_DC(x) (((x) & 0x1f) << 8) +#define SSI_STCCR_PM(x) (((x) & 0xff) << 0) +#define SSI_STCCR_WL_MASK (0xf << 13) +#define SSI_STCCR_DC_MASK (0x1f << 8) +#define SSI_STCCR_PM_MASK (0xff << 0) + +#define SSI_SRCCR_DIV2 (1 << 18) +#define SSI_SRCCR_PSR (1 << 15) +#define SSI_SRCCR_WL(x) ((((x) - 2) >> 1) << 13) +#define SSI_SRCCR_DC(x) (((x) & 0x1f) << 8) +#define SSI_SRCCR_PM(x) (((x) & 0xff) << 0) +#define SSI_SRCCR_WL_MASK (0xf << 13) +#define SSI_SRCCR_DC_MASK (0x1f << 8) +#define SSI_SRCCR_PM_MASK (0xff << 0) + + +#define SSI_SFCSR_RFCNT1(x) (((x) & 0xf) << 28) +#define SSI_SFCSR_TFCNT1(x) (((x) & 0xf) << 24) +#define SSI_SFCSR_RFWM1(x) (((x) & 0xf) << 20) +#define SSI_SFCSR_TFWM1(x) (((x) & 0xf) << 16) +#define SSI_SFCSR_RFCNT0(x) (((x) & 0xf) << 12) +#define SSI_SFCSR_TFCNT0(x) (((x) & 0xf) << 8) +#define SSI_SFCSR_RFWM0(x) (((x) & 0xf) << 4) +#define SSI_SFCSR_TFWM0(x) (((x) & 0xf) << 0) + +#define SSI_STR_TEST (1 << 15) +#define SSI_STR_RCK2TCK (1 << 14) +#define SSI_STR_RFS2TFS (1 << 13) +#define SSI_STR_RXSTATE(x) (((x) & 0xf) << 8) +#define SSI_STR_TXD2RXD (1 << 7) +#define SSI_STR_TCK2RCK (1 << 6) +#define SSI_STR_TFS2RFS (1 << 5) +#define SSI_STR_TXSTATE(x) (((x) & 0xf) << 0) + +#define SSI_SOR_CLKOFF (1 << 6) +#define SSI_SOR_RX_CLR (1 << 5) +#define SSI_SOR_TX_CLR (1 << 4) +#define SSI_SOR_INIT (1 << 3) +#define SSI_SOR_WAIT(x) (((x) & 0x3) << 1) +#define SSI_SOR_SYNRST (1 << 0) + +#define SSI_SACNT_FRDIV(x) (((x) & 0x3f) << 5) +#define SSI_SACNT_WR (x << 4) +#define SSI_SACNT_RD (x << 3) +#define SSI_SACNT_TIF (x << 2) +#define SSI_SACNT_FV (x << 1) +#define SSI_SACNT_AC97EN (x << 0) + +/* Watermarks for FIFO's */ +#define TXFIFO_WATERMARK 0x4 +#define RXFIFO_WATERMARK 0x4 + +/* i.MX DAI SSP ID's */ +#define IMX_DAI_SSI0 0 /* SSI1 FIFO 0 */ +#define IMX_DAI_SSI1 1 /* SSI1 FIFO 1 */ +#define IMX_DAI_SSI2 2 /* SSI2 FIFO 0 */ +#define IMX_DAI_SSI3 3 /* SSI2 FIFO 1 */ + +/* SSI clock sources */ +#define IMX_SSP_SYS_CLK 0 + +/* SSI audio dividers */ +#define IMX_SSI_TX_DIV_2 0 +#define IMX_SSI_TX_DIV_PSR 1 +#define IMX_SSI_TX_DIV_PM 2 +#define IMX_SSI_RX_DIV_2 3 +#define IMX_SSI_RX_DIV_PSR 4 +#define IMX_SSI_RX_DIV_PM 5 + + +/* SSI Div 2 */ +#define IMX_SSI_DIV_2_OFF (~SSI_STCCR_DIV2) +#define IMX_SSI_DIV_2_ON SSI_STCCR_DIV2 + +extern struct snd_soc_dai imx_ssi_pcm_dai[4]; +extern int get_ssi_clk(int ssi, struct device *dev); +extern void put_ssi_clk(int ssi); +#endif --- -- Javier Martin Vista Silicon S.L. Universidad de Cantabria CDTUC - FASE C - Oficina S-345 Avda de los Castros s/n 39005- Santander. Cantabria. Spain +34 942 25 32 60 www.vista-silicon.com

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[alsa-devel] [PATCH 1/3] ASoC: add DMA platform driver for MX1x and MX2x
by javier Martin 04 Aug '09

04 Aug '09

This adds support for DMA platform valid for i.MX1 and i.MX2 platforms. This is not valid for i.MX3 since it doesn't share the same DMA interface than i.MX1 and i.MX2. It has been tested on i.MX27 board. Signed-off-by: Javier Martin <javier.martin(a)vista-silicon.com> --- sound/soc/Makefile | 1 + sound/soc/imx/Kconfig | 11 + sound/soc/imx/Makefile | 4 + sound/soc/imx/mx1_mx2-pcm.c | 487 +++++++++++++++++++++++++++++++++++++++++++ sound/soc/imx/mx1_mx2-pcm.h | 48 +++++ 5 files changed, 551 insertions(+), 0 deletions(-) diff --git a/sound/soc/Makefile b/sound/soc/Makefile index 0237879..8120b52 100644 --- a/sound/soc/Makefile +++ b/sound/soc/Makefile @@ -11,3 +11,4 @@ obj-$(CONFIG_SND_SOC) += omap/ obj-$(CONFIG_SND_SOC) += pxa/ obj-$(CONFIG_SND_SOC) += s3c24xx/ obj-$(CONFIG_SND_SOC) += sh/ +obj-$(CONFIG_SND_SOC) += imx/ diff --git a/sound/soc/imx/Kconfig b/sound/soc/imx/Kconfig new file mode 100644 index 0000000..a1bf053 --- /dev/null +++ b/sound/soc/imx/Kconfig @@ -0,0 +1,11 @@ +config SND_MX1_MX2_SOC + tristate "SoC Audio for Freecale i.MX1x i.MX2x CPUs" + depends on (ARCH_MX2 || ARCH_MX1) && SND + select SND_PCM + help + Say Y or M if you want to add support for codecs attached to + the MX1 or MX2 SSI interface. + + + + diff --git a/sound/soc/imx/Makefile b/sound/soc/imx/Makefile new file mode 100644 index 0000000..c390f0f --- /dev/null +++ b/sound/soc/imx/Makefile @@ -0,0 +1,4 @@ +# i.MX Platform Support +snd-soc-mx1_mx2-objs := mx1_mx2-pcm.o + +obj-$(CONFIG_SND_MX1_MX2_SOC) += snd-soc-mx1_mx2.o diff --git a/sound/soc/imx/mx1_mx2-pcm.c b/sound/soc/imx/mx1_mx2-pcm.c new file mode 100644 index 0000000..94807f8 --- /dev/null +++ b/sound/soc/imx/mx1_mx2-pcm.c @@ -0,0 +1,487 @@ +/* + * mx1_mx2-pcm.c -- ALSA SoC interface for Freescale i.MX1x, i.MX2x CPUs + * + * Copyright 2009 Vista Silicon S.L. + * Author: Javier Martin + * javier.martin(a)vista-silicon.com + * + * Based on mxc-pcm.c by Liam Girdwood. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * + */ + +#include <linux/module.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/slab.h> +#include <linux/dma-mapping.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/soc.h> +#include <asm/dma.h> +#include <mach/hardware.h> +#include <mach/dma-mx1-mx2.h> + +#include "mx1_mx2-pcm.h" + + +static const struct snd_pcm_hardware mx1_mx2_pcm_hardware = { + .info = (SNDRV_PCM_INFO_INTERLEAVED | + SNDRV_PCM_INFO_BLOCK_TRANSFER | + SNDRV_PCM_INFO_MMAP | + SNDRV_PCM_INFO_MMAP_VALID), + .formats = SNDRV_PCM_FMTBIT_S16_LE, + .buffer_bytes_max = 32 * 1024, + .period_bytes_min = 64, + .period_bytes_max = 8 * 1024, + .periods_min = 2, + .periods_max = 255, + .fifo_size = 0, +}; + +struct mx1_mx2_runtime_data { + int dma_ch; + int active; + unsigned int period; + unsigned int periods; + int tx_spin; + spinlock_t dma_lock; + struct mx1_mx2_pcm_dma_params *dma_params; +}; + + +/** + * This function stops the current dma transfer for playback + * and clears the dma pointers. + * + * @param substream pointer to the structure of the current stream. + * + */ +static int audio_stop_dma(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct mx1_mx2_runtime_data *prtd = runtime->private_data; + unsigned long flags; + + spin_lock_irqsave(&prtd->dma_lock, flags); + + pr_debug("%s\n", __func__); + + prtd->active = 0; + prtd->period = 0; + prtd->periods = 0; + + /* this stops the dma channel and clears the buffer ptrs */ + + imx_dma_disable(prtd->dma_ch); + + spin_unlock_irqrestore(&prtd->dma_lock, flags); + + return 0; +} + +/** + * This function is called whenever a new audio block needs to be + * transferred to the codec. The function receives the address and the size + * of the new block and start a new DMA transfer. + * + * @param substream pointer to the structure of the current stream. + * + */ +static int dma_new_period(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct mx1_mx2_runtime_data *prtd = runtime->private_data; + unsigned int dma_size; + unsigned int offset; + int ret = 0; + dma_addr_t mem_addr; + unsigned int dev_addr; + + if (prtd->active) { + dma_size = frames_to_bytes(runtime, runtime->period_size); + offset = dma_size * prtd->period; + + pr_debug("%s: period (%d) out of (%d)\n", __func__, + prtd->period, + runtime->periods); + pr_debug("period_size %d frames\n offset %d bytes\n", + (unsigned int)runtime->period_size, + offset); + pr_debug("dma_size %d bytes\n", dma_size); + + snd_BUG_ON(dma_size > mx1_mx2_pcm_hardware.period_bytes_max); + + mem_addr = (dma_addr_t)(runtime->dma_addr + offset); + dev_addr = prtd->dma_params->per_address; + pr_debug("%s: mem_addr is %x\n dev_addr is %x\n", + __func__, mem_addr, dev_addr); + + ret = imx_dma_setup_single(prtd->dma_ch, mem_addr, + dma_size, dev_addr, + prtd->dma_params->transfer_type); + if (ret < 0) { + printk(KERN_ERR "Error configuring DMA\n"); + return ret; + } + imx_dma_enable(prtd->dma_ch); + + pr_debug("%s: transfer enabled\nmem_addr = %x\n", + __func__, (unsigned int) mem_addr); + pr_debug("dev_addr = %x\ndma_size = %d\n", + (unsigned int) dev_addr, dma_size); + + prtd->tx_spin = 1; /* FGA little trick to retrieve DMA pos */ + prtd->period++; + prtd->period %= runtime->periods; + } + return ret; +} + + +/** + * This is a callback which will be called + * when a TX transfer finishes. The call occurs + * in interrupt context. + * + * @param dat pointer to the structure of the current stream. + * + */ +static void audio_dma_irq(int channel, void *data) +{ + struct snd_pcm_substream *substream; + struct snd_pcm_runtime *runtime; + struct mx1_mx2_runtime_data *prtd; + unsigned int dma_size; + unsigned int previous_period; + unsigned int offset; + + substream = data; + runtime = substream->runtime; + prtd = runtime->private_data; + previous_period = prtd->periods; + dma_size = frames_to_bytes(runtime, runtime->period_size); + offset = dma_size * previous_period; + + prtd->tx_spin = 0; + prtd->periods++; + prtd->periods %= runtime->periods; + + pr_debug("%s: irq per %d offset %x\n", __func__, prtd->periods, offset); + + /* + * If we are getting a callback for an active stream then we inform + * the PCM middle layer we've finished a period + */ + if (prtd->active) + snd_pcm_period_elapsed(substream); + + /* + * Trig next DMA transfer + */ + dma_new_period(substream); +} + +/** + * This function configures the hardware to allow audio + * playback operations. It is called by ALSA framework. + * + * @param substream pointer to the structure of the current stream. + * + * @return 0 on success, -1 otherwise. + */ +static int +snd_mx1_mx2_prepare(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct mx1_mx2_runtime_data *prtd = runtime->private_data; + + prtd->period = 0; + prtd->periods = 0; + + return 0; +} + +static int mx1_mx2_pcm_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *hw_params) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + int ret; + + ret = snd_pcm_lib_malloc_pages(substream, + params_buffer_bytes(hw_params)); + if (ret < 0) { + printk(KERN_ERR "%s: failed to malloc pcm pages\n", __func__); + return ret; + } + + pr_debug("%s: snd_imx1_mx2_audio_hw_params runtime->dma_addr 0x(%x)\n", + __func__, (unsigned int)runtime->dma_addr); + pr_debug("%s: snd_imx1_mx2_audio_hw_params runtime->dma_area 0x(%x)\n", + __func__, (unsigned int)runtime->dma_area); + pr_debug("%s: snd_imx1_mx2_audio_hw_params runtime->dma_bytes 0x(%x)\n", + __func__, (unsigned int)runtime->dma_bytes); + + return ret; +} + +static int mx1_mx2_pcm_hw_free(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct mx1_mx2_runtime_data *prtd = runtime->private_data; + + imx_dma_free(prtd->dma_ch); + + snd_pcm_lib_free_pages(substream); + + return 0; +} + +static int mx1_mx2_pcm_trigger(struct snd_pcm_substream *substream, int cmd) +{ + struct mx1_mx2_runtime_data *prtd = substream->runtime->private_data; + int ret = 0; + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + prtd->tx_spin = 0; + /* requested stream startup */ + prtd->active = 1; + pr_debug("%s: starting dma_new_period\n", __func__); + ret = dma_new_period(substream); + break; + case SNDRV_PCM_TRIGGER_STOP: + /* requested stream shutdown */ + pr_debug("%s: stopping dma transfer\n", __func__); + ret = audio_stop_dma(substream); + break; + default: + ret = -EINVAL; + break; + } + + return ret; +} + +static snd_pcm_uframes_t +mx1_mx2_pcm_pointer(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct mx1_mx2_runtime_data *prtd = runtime->private_data; + unsigned int offset = 0; + + /* tx_spin value is used here to check if a transfer is active */ + if (prtd->tx_spin) { + offset = (runtime->period_size * (prtd->periods)) + + (runtime->period_size >> 1); + if (offset >= runtime->buffer_size) + offset = runtime->period_size >> 1; + } else { + offset = (runtime->period_size * (prtd->periods)); + if (offset >= runtime->buffer_size) + offset = 0; + } + pr_debug("%s: pointer offset %x\n", __func__, offset); + + return offset; +} + +static int mx1_mx2_pcm_open(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct mx1_mx2_runtime_data *prtd; + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct mx1_mx2_pcm_dma_params *dma_data = rtd->dai->cpu_dai->dma_data; + int ret; + + snd_soc_set_runtime_hwparams(substream, &mx1_mx2_pcm_hardware); + + ret = snd_pcm_hw_constraint_integer(runtime, + SNDRV_PCM_HW_PARAM_PERIODS); + if (ret < 0) + return ret; + + prtd = kzalloc(sizeof(struct mx1_mx2_runtime_data), GFP_KERNEL); + if (prtd == NULL) { + ret = -ENOMEM; + goto out; + } + + runtime->private_data = prtd; + + if (!dma_data) + return -ENODEV; + + prtd->dma_params = dma_data; + + pr_debug("%s: Requesting dma channel (%s)\n", __func__, + prtd->dma_params->name); + prtd->dma_ch = imx_dma_request_by_prio(prtd->dma_params->name, + DMA_PRIO_HIGH); + if (prtd->dma_ch < 0) { + printk(KERN_ERR "Error requesting dma channel\n"); + return ret; + } + imx_dma_config_burstlen(prtd->dma_ch, + prtd->dma_params->watermark_level); + + ret = imx_dma_config_channel(prtd->dma_ch, + prtd->dma_params->per_config, + prtd->dma_params->mem_config, + prtd->dma_params->event_id, 0); + + if (ret) { + pr_debug(KERN_ERR "Error configuring dma channel %d\n", + prtd->dma_ch); + return ret; + } + + pr_debug("%s: Setting tx dma callback function\n", __func__); + ret = imx_dma_setup_handlers(prtd->dma_ch, + audio_dma_irq, NULL, + (void *)substream); + if (ret < 0) { + printk(KERN_ERR "Error setting dma callback function\n"); + return ret; + } + return 0; + + out: + return ret; +} + +static int mx1_mx2_pcm_close(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct mx1_mx2_runtime_data *prtd = runtime->private_data; + + kfree(prtd); + + return 0; +} + +static int mx1_mx2_pcm_mmap(struct snd_pcm_substream *substream, + struct vm_area_struct *vma) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + return dma_mmap_writecombine(substream->pcm->card->dev, vma, + runtime->dma_area, + runtime->dma_addr, + runtime->dma_bytes); +} + +struct snd_pcm_ops mx1_mx2_pcm_ops = { + .open = mx1_mx2_pcm_open, + .close = mx1_mx2_pcm_close, + .ioctl = snd_pcm_lib_ioctl, + .hw_params = mx1_mx2_pcm_hw_params, + .hw_free = mx1_mx2_pcm_hw_free, + .prepare = snd_mx1_mx2_prepare, + .trigger = mx1_mx2_pcm_trigger, + .pointer = mx1_mx2_pcm_pointer, + .mmap = mx1_mx2_pcm_mmap, +}; + +static u64 mx1_mx2_pcm_dmamask = 0xffffffff; + +static int mx1_mx2_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream) +{ + struct snd_pcm_substream *substream = pcm->streams[stream].substream; + struct snd_dma_buffer *buf = &substream->dma_buffer; + size_t size = mx1_mx2_pcm_hardware.buffer_bytes_max; + buf->dev.type = SNDRV_DMA_TYPE_DEV; + buf->dev.dev = pcm->card->dev; + buf->private_data = NULL; + + /* Reserve uncached-buffered memory area for DMA */ + buf->area = dma_alloc_writecombine(pcm->card->dev, size, + &buf->addr, GFP_KERNEL); + + pr_debug("%s: preallocate_dma_buffer: area=%p, addr=%p, size=%d\n", + __func__, (void *) buf->area, (void *) buf->addr, size); + + if (!buf->area) + return -ENOMEM; + + buf->bytes = size; + return 0; +} + +static void mx1_mx2_pcm_free_dma_buffers(struct snd_pcm *pcm) +{ + struct snd_pcm_substream *substream; + struct snd_dma_buffer *buf; + int stream; + + for (stream = 0; stream < 2; stream++) { + substream = pcm->streams[stream].substream; + if (!substream) + continue; + + buf = &substream->dma_buffer; + if (!buf->area) + continue; + + dma_free_writecombine(pcm->card->dev, buf->bytes, + buf->area, buf->addr); + buf->area = NULL; + } +} + +int mx1_mx2_pcm_new(struct snd_card *card, struct snd_soc_dai *dai, + struct snd_pcm *pcm) +{ + int ret = 0; + + if (!card->dev->dma_mask) + card->dev->dma_mask = &mx1_mx2_pcm_dmamask; + if (!card->dev->coherent_dma_mask) + card->dev->coherent_dma_mask = 0xffffffff; + + if (dai->playback.channels_min) { + ret = mx1_mx2_pcm_preallocate_dma_buffer(pcm, + SNDRV_PCM_STREAM_PLAYBACK); + pr_debug("%s: preallocate playback buffer\n", __func__); + if (ret) + goto out; + } + + if (dai->capture.channels_min) { + ret = mx1_mx2_pcm_preallocate_dma_buffer(pcm, + SNDRV_PCM_STREAM_CAPTURE); + pr_debug("%s: preallocate capture buffer\n", __func__); + if (ret) + goto out; + } + out: + return ret; +} + +struct snd_soc_platform mx1_mx2_soc_platform = { + .name = "mx1_mx2-audio", + .pcm_ops = &mx1_mx2_pcm_ops, + .pcm_new = mx1_mx2_pcm_new, + .pcm_free = mx1_mx2_pcm_free_dma_buffers, +}; +EXPORT_SYMBOL_GPL(mx1_mx2_soc_platform); + +static int __init mx1_mx2_soc_platform_init(void) +{ + return snd_soc_register_platform(&mx1_mx2_soc_platform); +} +module_init(mx1_mx2_soc_platform_init); + +static void __exit mx1_mx2_soc_platform_exit(void) +{ + snd_soc_unregister_platform(&mx1_mx2_soc_platform); +} +module_exit(mx1_mx2_soc_platform_exit); + +MODULE_AUTHOR("Javier Martin, javier.martin(a)vista-silicon.com"); +MODULE_DESCRIPTION("Freescale i.MX2x, i.MX1x PCM DMA module"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/imx/mx1_mx2-pcm.h b/sound/soc/imx/mx1_mx2-pcm.h new file mode 100644 index 0000000..e1e3a3f --- /dev/null +++ b/sound/soc/imx/mx1_mx2-pcm.h @@ -0,0 +1,48 @@ +/* + * mx1_mx2-pcm.h :- ASoC platform header for Freescale i.MX1x, i.MX2x + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef _MXC_PCM_H +#define _MXC_PCM_H + +/* AUDMUX register definitions */ +#define AUDMUX_IO_BASE_ADDR IO_ADDRESS(AUDMUX_BASE_ADDR) + +#define DAM_HPCR1 (*((volatile u32 *)(AUDMUX_IO_BASE_ADDR + 0x00))) +#define DAM_HPCR2 (*((volatile u32 *)(AUDMUX_IO_BASE_ADDR + 0x04))) +#define DAM_HPCR3 (*((volatile u32 *)(AUDMUX_IO_BASE_ADDR + 0x08))) +#define DAM_PPCR1 (*((volatile u32 *)(AUDMUX_IO_BASE_ADDR + 0x10))) +#define DAM_PPCR2 (*((volatile u32 *)(AUDMUX_IO_BASE_ADDR + 0x14))) +#define DAM_PPCR3 (*((volatile u32 *)(AUDMUX_IO_BASE_ADDR + 0x1C))) + +#define AUDMUX_HPCR_TFSDIR (1 << 31) +#define AUDMUX_HPCR_TCLKDIR (1 << 30) +#define AUDMUX_HPCR_TFCSEL(x) (((x) & 0xff) << 26) +#define AUDMUX_HPCR_RXDSEL(x) (((x) & 0x7) << 13) +#define AUDMUX_HPCR_SYN (1 << 12) + +#define AUDMUX_PPCR_TFSDIR (1 << 31) +#define AUDMUX_PPCR_TCLKDIR (1 << 30) +#define AUDMUX_PPCR_TFCSEL(x) (((x) & 0xff) << 26) +#define AUDMUX_PPCR_RXDSEL(x) (((x) & 0x7) << 13) +#define AUDMUX_PPCR_SYN (1 << 12) + +/* DMA information for mx1_mx2 platforms */ +struct mx1_mx2_pcm_dma_params { + char *name; /* stream identifier */ + unsigned int transfer_type; /* READ or WRITE DMA transfer */ + dma_addr_t per_address; /* physical address of SSI fifo */ + int event_id; /* fixed DMA number for SSI fifo */ + int watermark_level; /* SSI fifo watermark level */ + int per_config; /* DMA Config flags for peripheral */ + int mem_config; /* DMA Config flags for RAM */ + }; + +/* platform data */ +extern struct snd_soc_platform mx1_mx2_soc_platform; + +#endif -- -- Javier Martin Vista Silicon S.L. Universidad de Cantabria CDTUC - FASE C - Oficina S-345 Avda de los Castros s/n 39005- Santander. Cantabria. Spain +34 942 25 32 60 www.vista-silicon.com

2 1

[alsa-devel] [PATCH - BT and FM audio for zoom2 1/2] Add clock-only codec to provide McBSP clock source.
by sean.mcneil＠ti.com 04 Aug '09

04 Aug '09

From: Sean McNeil <sean.mcneil(a)ti.com> Signed-off-by: Sean McNeil <sean.mcneil(a)ti.com> diff --git a/sound/soc/codecs/twl4030.c b/sound/soc/codecs/twl4030.c index 818fb37..c343ceb 100644 --- a/sound/soc/codecs/twl4030.c +++ b/sound/soc/codecs/twl4030.c @@ -56,7 +56,7 @@ static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = { 0x00, /* REG_AVTXL2PGA (0xC) */ 0x00, /* REG_AVTXR2PGA (0xD) */ 0x01, /* REG_AUDIO_IF (0xE) */ - 0x00, /* REG_VOICE_IF (0xF) */ + 0x04, /* REG_VOICE_IF (0xF) */ 0x00, /* REG_ARXR1PGA (0x10) */ 0x00, /* REG_ARXL1PGA (0x11) */ 0x6c, /* REG_ARXR2PGA (0x12) */ @@ -118,25 +118,32 @@ static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = { 0x00, /* REG_SW_SHADOW (0x4A) - Shadow, non HW register */ }; +struct substream_item { + struct list_head started; + struct list_head configured; + struct snd_pcm_substream *substream; + int use256FS; +}; + /* codec private data */ struct twl4030_priv { + struct mutex mutex; + + unsigned int extClock; unsigned int bypass_state; unsigned int codec_powered; unsigned int codec_muted; - struct snd_pcm_substream *master_substream; - struct snd_pcm_substream *slave_substream; - - unsigned int configured; - unsigned int rate; - unsigned int sample_bits; - unsigned int channels; + struct list_head started_list; + struct list_head config_list; unsigned int sysclk; /* Headset output state handling */ unsigned int hsl_enabled; unsigned int hsr_enabled; + + struct snd_pcm_hw_params params; }; /* @@ -966,7 +973,7 @@ static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol *kcontrol, unsigned short val; unsigned short mask, bitmask; - if (twl4030->configured) { + if (!list_empty(&twl4030->config_list)) { printk(KERN_ERR "twl4030 operation mode cannot be " "changed on-the-fly\n"); return -EBUSY; @@ -1534,34 +1541,68 @@ static int twl4030_set_bias_level(struct snd_soc_codec *codec, return 0; } -static void twl4030_constraints(struct twl4030_priv *twl4030, - struct snd_pcm_substream *mst_substream) +static unsigned int twl4030_rate_min(struct substream_item *item, + unsigned int rate) { - struct snd_pcm_substream *slv_substream; - - /* Pick the stream, which need to be constrained */ - if (mst_substream == twl4030->master_substream) - slv_substream = twl4030->slave_substream; - else if (mst_substream == twl4030->slave_substream) - slv_substream = twl4030->master_substream; - else /* This should not happen.. */ - return; + static const unsigned int table[] = { + 8000, 11025, 12000, 16000, 22050, + 24000, 32000, 44100, 48000, 96000}; + unsigned int value = rate; + + if (item->use256FS) { + int i; + rate *= 256; + for (i = 0; i < ARRAY_SIZE(table); i++) + if (rate % table[i] == 0) { + value = table[i]; + break; + } + } + return value; +} - /* Set the constraints according to the already configured stream */ - snd_pcm_hw_constraint_minmax(slv_substream->runtime, - SNDRV_PCM_HW_PARAM_RATE, - twl4030->rate, - twl4030->rate); - - snd_pcm_hw_constraint_minmax(slv_substream->runtime, - SNDRV_PCM_HW_PARAM_SAMPLE_BITS, - twl4030->sample_bits, - twl4030->sample_bits); - - snd_pcm_hw_constraint_minmax(slv_substream->runtime, - SNDRV_PCM_HW_PARAM_CHANNELS, - twl4030->channels, - twl4030->channels); +static unsigned int twl4030_rate_max(struct substream_item *item, + unsigned int rate) +{ + static const unsigned int table[] = { + 96000, 48000, 44100, 32000, 24000, + 22050, 16000, 12000, 11025, 8000}; + unsigned int value = rate; + + if (item->use256FS) { + int i; + rate *= 256; + for (i = 0; i < ARRAY_SIZE(table); i++) + if (rate % table[i] == 0) { + value = table[i]; + break; + } + } + return value; +} + +static void twl4030_constraints(struct twl4030_priv *twl4030) +{ + struct substream_item *item; + unsigned int value; + + list_for_each_entry(item, &twl4030->started_list, started) { + + /* Set constraints according to the already configured stream */ + value = params_rate(&twl4030->params); + if (value) + snd_pcm_hw_constraint_minmax(item->substream->runtime, + SNDRV_PCM_HW_PARAM_RATE, + twl4030_rate_min(item, value), + twl4030_rate_max(item, value)); + + value = hw_param_interval(&twl4030->params, + SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min; + if (value && !item->use256FS) + snd_pcm_hw_constraint_minmax(item->substream->runtime, + SNDRV_PCM_HW_PARAM_SAMPLE_BITS, + value, value); + } } /* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for @@ -1586,6 +1627,53 @@ static void twl4030_tdm_enable(struct snd_soc_codec *codec, int direction, twl4030_write(codec, TWL4030_REG_OPTION, reg); } +static int twl4030_new_substream(struct twl4030_priv *twl4030, + struct snd_pcm_substream *substream, int use256FS) +{ + struct substream_item *item; + + item = kzalloc(sizeof(struct snd_pcm_substream), GFP_KERNEL); + if (!item) + return -ENOMEM; + + item->substream = substream; + item->use256FS = use256FS; + + mutex_lock(&twl4030->mutex); + list_add_tail(&item->started, &twl4030->started_list); + twl4030->extClock += item->use256FS; + mutex_unlock(&twl4030->mutex); + + return 0; +} + +static void twl4030_del_substream(struct twl4030_priv *twl4030, + struct snd_pcm_substream *substream) +{ + struct substream_item *item; + + mutex_lock(&twl4030->mutex); + + list_for_each_entry(item, &twl4030->config_list, configured) { + if (item->substream == substream) { + printk(KERN_ERR "TWL4030 deleted substream still configured!\n"); + list_del(&item->configured); + break; + } + } + + list_for_each_entry(item, &twl4030->started_list, started) { + if (item->substream == substream) { + list_del(&item->started); + twl4030->extClock -= item->use256FS; + kfree(item); + break; + } + } + + mutex_unlock(&twl4030->mutex); +} + static int twl4030_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) { @@ -1594,82 +1682,45 @@ static int twl4030_startup(struct snd_pcm_substream *substream, struct snd_soc_codec *codec = socdev->card->codec; struct twl4030_priv *twl4030 = codec->private_data; - if (twl4030->master_substream) { - twl4030->slave_substream = substream; - /* The DAI has one configuration for playback and capture, so - * if the DAI has been already configured then constrain this - * substream to match it. */ - if (twl4030->configured) - twl4030_constraints(twl4030, twl4030->master_substream); - } else { - if (!(twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE) & - TWL4030_OPTION_1)) { - /* In option2 4 channel is not supported, set the - * constraint for the first stream for channels, the - * second stream will 'inherit' this cosntraint */ - snd_pcm_hw_constraint_minmax(substream->runtime, - SNDRV_PCM_HW_PARAM_CHANNELS, - 2, 2); - } - twl4030->master_substream = substream; + if (!(twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE) & + TWL4030_OPTION_1)) { + /* In option2 4 channel is not supported, set the + * constraint for the first stream for channels, the + * second stream will 'inherit' this cosntraint */ + snd_pcm_hw_constraint_minmax(substream->runtime, + SNDRV_PCM_HW_PARAM_CHANNELS, + 2, 2); } - return 0; + return twl4030_new_substream(twl4030, substream, 0); } static void twl4030_shutdown(struct snd_pcm_substream *substream, - struct snd_soc_dai *dai) + struct snd_soc_dai *dai) { struct snd_soc_pcm_runtime *rtd = substream->private_data; struct snd_soc_device *socdev = rtd->socdev; struct snd_soc_codec *codec = socdev->card->codec; struct twl4030_priv *twl4030 = codec->private_data; - if (twl4030->master_substream == substream) - twl4030->master_substream = twl4030->slave_substream; - - twl4030->slave_substream = NULL; - - /* If all streams are closed, or the remaining stream has not yet - * been configured than set the DAI as not configured. */ - if (!twl4030->master_substream) - twl4030->configured = 0; - else if (!twl4030->master_substream->runtime->channels) - twl4030->configured = 0; + twl4030_del_substream(twl4030, substream); /* If the closing substream had 4 channel, do the necessary cleanup */ if (substream->runtime->channels == 4) twl4030_tdm_enable(codec, substream->stream, 0); } -static int twl4030_hw_params(struct snd_pcm_substream *substream, - struct snd_pcm_hw_params *params, - struct snd_soc_dai *dai) +int twl4030_set_rate(struct snd_soc_codec *codec, + struct snd_pcm_hw_params *params) { - struct snd_soc_pcm_runtime *rtd = substream->private_data; - struct snd_soc_device *socdev = rtd->socdev; - struct snd_soc_codec *codec = socdev->card->codec; struct twl4030_priv *twl4030 = codec->private_data; - u8 mode, old_mode, format, old_format; + u8 mode, old_mode; - /* If the substream has 4 channel, do the necessary setup */ - if (params_channels(params) == 4) { - format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF); - mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE); - - /* Safety check: are we in the correct operating mode and - * the interface is in TDM mode? */ - if ((mode & TWL4030_OPTION_1) && - ((format & TWL4030_AIF_FORMAT) == TWL4030_AIF_FORMAT_TDM)) - twl4030_tdm_enable(codec, substream->stream, 1); - else - return -EINVAL; + if (params_rate(&twl4030->params) && + params_rate(&twl4030->params) != params_rate(params)) { + return -EBUSY; } - if (twl4030->configured) - /* Ignoring hw_params for already configured DAI */ - return 0; - /* bit rate */ old_mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ; @@ -1712,6 +1763,8 @@ static int twl4030_hw_params(struct snd_pcm_substream *substream, return -EINVAL; } + params_rate(&twl4030->params) = params_rate(params); + if (mode != old_mode) { /* change rate and set CODECPDZ */ twl4030_codec_enable(codec, 0); @@ -1719,10 +1772,51 @@ static int twl4030_hw_params(struct snd_pcm_substream *substream, twl4030_codec_enable(codec, 1); } + return 0; +} +EXPORT_SYMBOL_GPL(twl4030_set_rate); + +int twl4030_get_clock_divisor(struct snd_soc_codec *codec, + struct snd_pcm_hw_params *params) +{ + struct twl4030_priv *twl4030 = codec->private_data; + int clock, divisor; + + clock = params_rate(&twl4030->params) * 256; + divisor = clock / params_rate(params); + divisor /= params_channels(params); + + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_U8: + case SNDRV_PCM_FORMAT_S8: + divisor /= 8; + break; + case SNDRV_PCM_FORMAT_S16_LE: + divisor /= 16; + break; + case SNDRV_PCM_FORMAT_S24_LE: + divisor /= 24; + break; + default: + printk(KERN_ERR "TWL4030 get_clock_divisor: unknown format %d\n", + params_format(params)); + return -EINVAL; + } + + return divisor; +} +EXPORT_SYMBOL_GPL(twl4030_get_clock_divisor); + +static int twl4030_set_format(struct snd_soc_codec *codec, + struct snd_pcm_hw_params *params) +{ + struct twl4030_priv *twl4030 = codec->private_data; + u8 format, old_format; + /* sample size */ old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF); - format = old_format; - format &= ~TWL4030_DATA_WIDTH; + format = old_format & ~TWL4030_DATA_WIDTH; + switch (params_format(params)) { case SNDRV_PCM_FORMAT_S16_LE: format |= TWL4030_DATA_WIDTH_16S_16W; @@ -1736,31 +1830,96 @@ static int twl4030_hw_params(struct snd_pcm_substream *substream, return -EINVAL; } - if (format != old_format) { + if (format == old_format) + return 0; - /* clear CODECPDZ before changing format (codec requirement) */ - twl4030_codec_enable(codec, 0); + if (params_format(&twl4030->params) && + params_format(&twl4030->params) != params_format(params)) + return -EBUSY; - /* change format */ - twl4030_write(codec, TWL4030_REG_AUDIO_IF, format); + *hw_param_mask(&twl4030->params, SNDRV_PCM_HW_PARAM_FORMAT) = + *hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT); - /* set CODECPDZ afterwards */ - twl4030_codec_enable(codec, 1); + /* clear CODECPDZ before changing format (codec requirement) */ + twl4030_codec_enable(codec, 0); + + /* change format */ + twl4030_write(codec, TWL4030_REG_AUDIO_IF, format); + + /* set CODECPDZ afterwards */ + twl4030_codec_enable(codec, 1); + + return 0; +} + +static int twl4030_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->card->codec; + struct twl4030_priv *twl4030 = codec->private_data; + int rval; + + mutex_lock(&twl4030->mutex); + + /* If the substream has 4 channel, do the necessary setup */ + if (params_channels(params) == 4) { + /* Safety check: are we in the correct operating mode? */ + if ((twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE) & + TWL4030_OPTION_1)) { + twl4030_tdm_enable(codec, substream->stream, 1); + } else { + mutex_unlock(&twl4030->mutex); + return -EINVAL; + } } - /* Store the important parameters for the DAI configuration and set - * the DAI as configured */ - twl4030->configured = 1; - twl4030->rate = params_rate(params); - twl4030->sample_bits = hw_param_interval(params, - SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min; - twl4030->channels = params_channels(params); + rval = twl4030_set_rate(codec, params); + if (rval < 0) { + mutex_unlock(&twl4030->mutex); + return rval; + } - /* If both playback and capture streams are open, and one of them + rval = twl4030_set_format(codec, params); + if (rval < 0) { + mutex_unlock(&twl4030->mutex); + return rval; + } + + /* If any other streams are currently open, and one of them * is setting the hw parameters right now (since we are here), set - * constraints to the other stream to match the current one. */ - if (twl4030->slave_substream) - twl4030_constraints(twl4030, substream); + * constraints to the other stream(s) to match the current one. */ + twl4030_constraints(twl4030); + + mutex_unlock(&twl4030->mutex); + + return 0; +} + +static int twl4030_hw_free(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->card->codec; + struct twl4030_priv *twl4030 = codec->private_data; + struct substream_item *item; + + mutex_lock(&twl4030->mutex); + + list_for_each_entry(item, &twl4030->config_list, configured) { + if (item->substream == substream) { + list_del(&item->configured); + break; + } + } + + if (list_empty(&twl4030->config_list)) + memset(&twl4030->params, 0, sizeof(twl4030->params)); + + mutex_unlock(&twl4030->mutex); return 0; } @@ -1797,10 +1956,39 @@ static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai, return 0; } +static int twl4030_set_ext_clock(struct snd_soc_codec *codec, int enable) +{ + u8 old_format, format; + + /* get format */ + old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF); + + if (enable) + format = old_format | TWL4030_CLK256FS_EN; + else + format = old_format & ~TWL4030_CLK256FS_EN; + + if (format != old_format) { + + /* clear CODECPDZ before changing format (codec requirement) */ + twl4030_codec_enable(codec, 0); + + /* change format */ + twl4030_write(codec, TWL4030_REG_AUDIO_IF, format); + + /* set CODECPDZ afterwards */ + twl4030_codec_enable(codec, 1); + } + + return 0; +} + static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) { struct snd_soc_codec *codec = codec_dai->codec; + struct twl4030_priv *twl4030 = codec->private_data; + int use256FS = 0; u8 old_format, format; /* get format */ @@ -1811,11 +1999,10 @@ static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai, switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { case SND_SOC_DAIFMT_CBM_CFM: format &= ~(TWL4030_AIF_SLAVE_EN); - format &= ~(TWL4030_CLK256FS_EN); break; case SND_SOC_DAIFMT_CBS_CFS: format |= TWL4030_AIF_SLAVE_EN; - format |= TWL4030_CLK256FS_EN; + use256FS = 1; break; default: return -EINVAL; @@ -1846,7 +2033,7 @@ static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai, twl4030_codec_enable(codec, 1); } - return 0; + return twl4030_set_ext_clock(codec, use256FS | twl4030->extClock); } static int twl4030_set_tristate(struct snd_soc_dai *dai, int tristate) @@ -1890,6 +2077,7 @@ static int twl4030_voice_startup(struct snd_pcm_substream *substream, struct snd_soc_pcm_runtime *rtd = substream->private_data; struct snd_soc_device *socdev = rtd->socdev; struct snd_soc_codec *codec = socdev->card->codec; + struct twl4030_priv *twl4030 = codec->private_data; u8 infreq; u8 mode; @@ -1917,7 +2105,7 @@ static int twl4030_voice_startup(struct snd_pcm_substream *substream, return -EINVAL; } - return 0; + return twl4030_new_substream(twl4030, substream, 1); } static void twl4030_voice_shutdown(struct snd_pcm_substream *substream, @@ -1926,6 +2114,9 @@ static void twl4030_voice_shutdown(struct snd_pcm_substream *substream, struct snd_soc_pcm_runtime *rtd = substream->private_data; struct snd_soc_device *socdev = rtd->socdev; struct snd_soc_codec *codec = socdev->card->codec; + struct twl4030_priv *twl4030 = codec->private_data; + + twl4030_del_substream(twl4030, substream); /* Enable voice digital filters */ twl4030_voice_enable(codec, substream->stream, 0); @@ -1937,15 +2128,18 @@ static int twl4030_voice_hw_params(struct snd_pcm_substream *substream, struct snd_soc_pcm_runtime *rtd = substream->private_data; struct snd_soc_device *socdev = rtd->socdev; struct snd_soc_codec *codec = socdev->card->codec; + struct twl4030_priv *twl4030 = codec->private_data; u8 old_mode, mode; /* Enable voice digital filters */ twl4030_voice_enable(codec, substream->stream, 1); + mutex_lock(&twl4030->mutex); + /* bit rate */ - old_mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE) - & ~(TWL4030_CODECPDZ); - mode = old_mode; + old_mode = twl4030_read_reg_cache(codec, + TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ; + mode = old_mode & ~TWL4030_APLL_RATE; switch (params_rate(params)) { case 8000: @@ -1955,6 +2149,7 @@ static int twl4030_voice_hw_params(struct snd_pcm_substream *substream, mode |= TWL4030_SEL_16K; break; default: + mutex_unlock(&twl4030->mutex); printk(KERN_ERR "TWL4030 voice hw params: unknown rate %d\n", params_rate(params)); return -EINVAL; @@ -1967,6 +2162,7 @@ static int twl4030_voice_hw_params(struct snd_pcm_substream *substream, twl4030_codec_enable(codec, 1); } + mutex_unlock(&twl4030->mutex); return 0; } @@ -1996,19 +2192,22 @@ static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) { struct snd_soc_codec *codec = codec_dai->codec; + struct twl4030_priv *twl4030 = codec->private_data; + int use256FS = 0; u8 old_format, format; /* get format */ old_format = twl4030_read_reg_cache(codec, TWL4030_REG_VOICE_IF); - format = old_format; + format = old_format & ~TWL4030_VIF_TRI_EN; /* set master/slave audio interface */ switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { - case SND_SOC_DAIFMT_CBM_CFM: + case SND_SOC_DAIFMT_CBS_CFM: format &= ~(TWL4030_VIF_SLAVE_EN); break; case SND_SOC_DAIFMT_CBS_CFS: format |= TWL4030_VIF_SLAVE_EN; + use256FS = 1; break; default: return -EINVAL; @@ -2033,7 +2232,59 @@ static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai, twl4030_codec_enable(codec, 1); } - return 0; + return twl4030_set_ext_clock(codec, use256FS | twl4030->extClock); +} + +static int twl4030_clock_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->card->codec; + struct twl4030_priv *twl4030 = codec->private_data; + + return twl4030_new_substream(twl4030, substream, 1); +} + +static int twl4030_clock_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->card->codec; + struct twl4030_priv *twl4030 = codec->private_data; + int rval; + + mutex_lock(&twl4030->mutex); + + rval = twl4030_set_rate(codec, params); + + /* See if we are a multiple of the current FS. If so, then still OK. */ + if (rval) { + int divisor = twl4030_get_clock_divisor(codec, params); + int clock = params_rate(&twl4030->params) * 256; + int remainder = clock % params_rate(params); + + if (remainder == 0 && divisor <= 256) + rval = 0; + } + + /* If any other streams are currently open, and one of them + * is setting the hw parameters right now (since we are here), set + * constraints to the other stream(s) to match the current one. */ + twl4030_constraints(twl4030); + + mutex_unlock(&twl4030->mutex); + + return rval; +} + +static int twl4030_clock_set_dai_fmt(struct snd_soc_dai *codec_dai, + unsigned int fmt) +{ + struct snd_soc_codec *codec = codec_dai->codec; + + return twl4030_set_ext_clock(codec, 1); } static int twl4030_voice_set_tristate(struct snd_soc_dai *dai, int tristate) @@ -2056,6 +2307,7 @@ static struct snd_soc_dai_ops twl4030_dai_ops = { .startup = twl4030_startup, .shutdown = twl4030_shutdown, .hw_params = twl4030_hw_params, + .hw_free = twl4030_hw_free, .set_sysclk = twl4030_set_dai_sysclk, .set_fmt = twl4030_set_dai_fmt, .set_tristate = twl4030_set_tristate, @@ -2065,26 +2317,38 @@ static struct snd_soc_dai_ops twl4030_dai_voice_ops = { .startup = twl4030_voice_startup, .shutdown = twl4030_voice_shutdown, .hw_params = twl4030_voice_hw_params, + .hw_free = twl4030_hw_free, .set_sysclk = twl4030_voice_set_dai_sysclk, .set_fmt = twl4030_voice_set_dai_fmt, .set_tristate = twl4030_voice_set_tristate, }; +static struct snd_soc_dai_ops twl4030_dai_clock_ops = { + .startup = twl4030_clock_startup, + .shutdown = twl4030_shutdown, + .hw_params = twl4030_clock_hw_params, + .hw_free = twl4030_hw_free, + .set_sysclk = twl4030_set_dai_sysclk, + .set_fmt = twl4030_clock_set_dai_fmt, +}; + struct snd_soc_dai twl4030_dai[] = { { .name = "twl4030", .playback = { .stream_name = "HiFi Playback", - .channels_min = 2, + .channels_min = 1, .channels_max = 4, .rates = TWL4030_RATES | SNDRV_PCM_RATE_96000, - .formats = TWL4030_FORMATS,}, + .formats = TWL4030_FORMATS, + }, .capture = { .stream_name = "Capture", - .channels_min = 2, + .channels_min = 1, .channels_max = 4, .rates = TWL4030_RATES, - .formats = TWL4030_FORMATS,}, + .formats = TWL4030_FORMATS, + }, .ops = &twl4030_dai_ops, }, { @@ -2092,17 +2356,37 @@ struct snd_soc_dai twl4030_dai[] = { .playback = { .stream_name = "Voice Playback", .channels_min = 1, - .channels_max = 1, + .channels_max = 2, .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000, - .formats = SNDRV_PCM_FMTBIT_S16_LE,}, + .formats = SNDRV_PCM_FMTBIT_S16_LE, + }, .capture = { .stream_name = "Capture", .channels_min = 1, .channels_max = 2, .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000, - .formats = SNDRV_PCM_FMTBIT_S16_LE,}, + .formats = SNDRV_PCM_FMTBIT_S16_LE, + }, .ops = &twl4030_dai_voice_ops, }, +{ + .name = "twl4030 Clock", + .playback = { + .stream_name = "Playback", + .channels_min = 1, + .channels_max = 2, + .rates = TWL4030_RATES, + .formats = SNDRV_PCM_FMTBIT_U8 | TWL4030_FORMATS, + }, + .capture = { + .stream_name = "Capture", + .channels_min = 1, + .channels_max = 2, + .rates = TWL4030_RATES, + .formats = SNDRV_PCM_FMTBIT_U8 | TWL4030_FORMATS, + }, + .ops = &twl4030_dai_clock_ops, +}, }; EXPORT_SYMBOL_GPL(twl4030_dai); @@ -2220,6 +2504,9 @@ static int twl4030_probe(struct platform_device *pdev) return -ENOMEM; } + mutex_init(&twl4030->mutex); + INIT_LIST_HEAD(&twl4030->started_list); + INIT_LIST_HEAD(&twl4030->config_list); codec->private_data = twl4030; socdev->card->codec = codec; mutex_init(&codec->mutex); @@ -2257,13 +2544,13 @@ EXPORT_SYMBOL_GPL(soc_codec_dev_twl4030); static int __init twl4030_modinit(void) { - return snd_soc_register_dais(&twl4030_dai[0], ARRAY_SIZE(twl4030_dai)); + return snd_soc_register_dais(twl4030_dai, ARRAY_SIZE(twl4030_dai)); } module_init(twl4030_modinit); static void __exit twl4030_exit(void) { - snd_soc_unregister_dais(&twl4030_dai[0], ARRAY_SIZE(twl4030_dai)); + snd_soc_unregister_dais(twl4030_dai, ARRAY_SIZE(twl4030_dai)); } module_exit(twl4030_exit); diff --git a/sound/soc/codecs/twl4030.h b/sound/soc/codecs/twl4030.h index 2b4bfa2..fa23613 100644 --- a/sound/soc/codecs/twl4030.h +++ b/sound/soc/codecs/twl4030.h @@ -267,10 +267,15 @@ #define TWL4030_DAI_HIFI 0 #define TWL4030_DAI_VOICE 1 +#define TWL4030_DAI_CLOCK 2 -extern struct snd_soc_dai twl4030_dai[2]; +extern struct snd_soc_dai twl4030_dai[]; extern struct snd_soc_codec_device soc_codec_dev_twl4030; +extern int twl4030_set_rate(struct snd_soc_codec *, struct snd_pcm_hw_params *); +extern int twl4030_get_clock_divisor(struct snd_soc_codec *, + struct snd_pcm_hw_params *); + struct twl4030_setup_data { unsigned int ramp_delay_value; unsigned int sysclk; -- 1.6.0.4

3 3

[alsa-devel] [PATCH 1/8] ASoC: Begin to factor out register cache I/O functions
by Mark Brown 03 Aug '09

03 Aug '09

A lot of CODECs share the same register data formats and therefore replicate the code to manage access to and caching of the register map. In order to reduce code duplication centralised versions of this code will be introduced with drivers able to configure the use of the common code by calling the new snd_soc_codec_set_cache_io() API call during startup. As an initial user the 7 bit address/9 bit data format used by many Wolfson devices is supported for write only CODECs and the drivers with straightforward register cache implementations are converted to use it. Signed-off-by: Mark Brown <broonie(a)opensource.wolfsonmicro.com> --- include/sound/soc.h | 2 + sound/soc/Makefile | 2 +- sound/soc/codecs/wm8510.c | 141 +++++++++++--------------------- sound/soc/codecs/wm8728.c | 78 +++++------------- sound/soc/codecs/wm8731.c | 108 +++++++------------------ sound/soc/codecs/wm8750.c | 121 ++++++++++------------------ sound/soc/codecs/wm8960.c | 194 +++++++++++++++++---------------------------- sound/soc/codecs/wm8971.c | 121 ++++++++++------------------ sound/soc/codecs/wm8988.c | 105 ++++++++----------------- sound/soc/soc-cache.c | 105 ++++++++++++++++++++++++ 10 files changed, 400 insertions(+), 577 deletions(-) create mode 100644 sound/soc/soc-cache.c diff --git a/include/sound/soc.h b/include/sound/soc.h index 94fcc65..27409dd 100644 --- a/include/sound/soc.h +++ b/include/sound/soc.h @@ -192,6 +192,8 @@ void snd_soc_unregister_platform(struct snd_soc_platform *platform); int snd_soc_register_codec(struct snd_soc_codec *codec); void snd_soc_unregister_codec(struct snd_soc_codec *codec); int snd_soc_codec_volatile_register(struct snd_soc_codec *codec, int reg); +int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec, + int addr_bits, int data_bits); #ifdef CONFIG_PM int snd_soc_suspend_device(struct device *dev); diff --git a/sound/soc/Makefile b/sound/soc/Makefile index 6f1e28d..4eaf48a 100644 --- a/sound/soc/Makefile +++ b/sound/soc/Makefile @@ -1,4 +1,4 @@ -snd-soc-core-objs := soc-core.o soc-dapm.o soc-jack.o +snd-soc-core-objs := soc-core.o soc-dapm.o soc-jack.o soc-cache.o obj-$(CONFIG_SND_SOC) += snd-soc-core.o obj-$(CONFIG_SND_SOC) += codecs/ diff --git a/sound/soc/codecs/wm8510.c b/sound/soc/codecs/wm8510.c index c8b8dba..7a169bf 100644 --- a/sound/soc/codecs/wm8510.c +++ b/sound/soc/codecs/wm8510.c @@ -58,55 +58,7 @@ static const u16 wm8510_reg[WM8510_CACHEREGNUM] = { #define WM8510_POWER1_BIASEN 0x08 #define WM8510_POWER1_BUFIOEN 0x10 -/* - * read wm8510 register cache - */ -static inline unsigned int wm8510_read_reg_cache(struct snd_soc_codec *codec, - unsigned int reg) -{ - u16 *cache = codec->reg_cache; - if (reg == WM8510_RESET) - return 0; - if (reg >= WM8510_CACHEREGNUM) - return -1; - return cache[reg]; -} - -/* - * write wm8510 register cache - */ -static inline void wm8510_write_reg_cache(struct snd_soc_codec *codec, - u16 reg, unsigned int value) -{ - u16 *cache = codec->reg_cache; - if (reg >= WM8510_CACHEREGNUM) - return; - cache[reg] = value; -} - -/* - * write to the WM8510 register space - */ -static int wm8510_write(struct snd_soc_codec *codec, unsigned int reg, - unsigned int value) -{ - u8 data[2]; - - /* data is - * D15..D9 WM8510 register offset - * D8...D0 register data - */ - data[0] = (reg << 1) | ((value >> 8) & 0x0001); - data[1] = value & 0x00ff; - - wm8510_write_reg_cache(codec, reg, value); - if (codec->hw_write(codec->control_data, data, 2) == 2) - return 0; - else - return -EIO; -} - -#define wm8510_reset(c) wm8510_write(c, WM8510_RESET, 0) +#define wm8510_reset(c) snd_soc_write(c, WM8510_RESET, 0) static const char *wm8510_companding[] = { "Off", "NC", "u-law", "A-law" }; static const char *wm8510_deemp[] = { "None", "32kHz", "44.1kHz", "48kHz" }; @@ -327,27 +279,27 @@ static int wm8510_set_dai_pll(struct snd_soc_dai *codec_dai, if (freq_in == 0 || freq_out == 0) { /* Clock CODEC directly from MCLK */ - reg = wm8510_read_reg_cache(codec, WM8510_CLOCK); - wm8510_write(codec, WM8510_CLOCK, reg & 0x0ff); + reg = snd_soc_read(codec, WM8510_CLOCK); + snd_soc_write(codec, WM8510_CLOCK, reg & 0x0ff); /* Turn off PLL */ - reg = wm8510_read_reg_cache(codec, WM8510_POWER1); - wm8510_write(codec, WM8510_POWER1, reg & 0x1df); + reg = snd_soc_read(codec, WM8510_POWER1); + snd_soc_write(codec, WM8510_POWER1, reg & 0x1df); return 0; } pll_factors(freq_out*4, freq_in); - wm8510_write(codec, WM8510_PLLN, (pll_div.pre_div << 4) | pll_div.n); - wm8510_write(codec, WM8510_PLLK1, pll_div.k >> 18); - wm8510_write(codec, WM8510_PLLK2, (pll_div.k >> 9) & 0x1ff); - wm8510_write(codec, WM8510_PLLK3, pll_div.k & 0x1ff); - reg = wm8510_read_reg_cache(codec, WM8510_POWER1); - wm8510_write(codec, WM8510_POWER1, reg | 0x020); + snd_soc_write(codec, WM8510_PLLN, (pll_div.pre_div << 4) | pll_div.n); + snd_soc_write(codec, WM8510_PLLK1, pll_div.k >> 18); + snd_soc_write(codec, WM8510_PLLK2, (pll_div.k >> 9) & 0x1ff); + snd_soc_write(codec, WM8510_PLLK3, pll_div.k & 0x1ff); + reg = snd_soc_read(codec, WM8510_POWER1); + snd_soc_write(codec, WM8510_POWER1, reg | 0x020); /* Run CODEC from PLL instead of MCLK */ - reg = wm8510_read_reg_cache(codec, WM8510_CLOCK); - wm8510_write(codec, WM8510_CLOCK, reg | 0x100); + reg = snd_soc_read(codec, WM8510_CLOCK); + snd_soc_write(codec, WM8510_CLOCK, reg | 0x100); return 0; } @@ -363,24 +315,24 @@ static int wm8510_set_dai_clkdiv(struct snd_soc_dai *codec_dai, switch (div_id) { case WM8510_OPCLKDIV: - reg = wm8510_read_reg_cache(codec, WM8510_GPIO) & 0x1cf; - wm8510_write(codec, WM8510_GPIO, reg | div); + reg = snd_soc_read(codec, WM8510_GPIO) & 0x1cf; + snd_soc_write(codec, WM8510_GPIO, reg | div); break; case WM8510_MCLKDIV: - reg = wm8510_read_reg_cache(codec, WM8510_CLOCK) & 0x11f; - wm8510_write(codec, WM8510_CLOCK, reg | div); + reg = snd_soc_read(codec, WM8510_CLOCK) & 0x11f; + snd_soc_write(codec, WM8510_CLOCK, reg | div); break; case WM8510_ADCCLK: - reg = wm8510_read_reg_cache(codec, WM8510_ADC) & 0x1f7; - wm8510_write(codec, WM8510_ADC, reg | div); + reg = snd_soc_read(codec, WM8510_ADC) & 0x1f7; + snd_soc_write(codec, WM8510_ADC, reg | div); break; case WM8510_DACCLK: - reg = wm8510_read_reg_cache(codec, WM8510_DAC) & 0x1f7; - wm8510_write(codec, WM8510_DAC, reg | div); + reg = snd_soc_read(codec, WM8510_DAC) & 0x1f7; + snd_soc_write(codec, WM8510_DAC, reg | div); break; case WM8510_BCLKDIV: - reg = wm8510_read_reg_cache(codec, WM8510_CLOCK) & 0x1e3; - wm8510_write(codec, WM8510_CLOCK, reg | div); + reg = snd_soc_read(codec, WM8510_CLOCK) & 0x1e3; + snd_soc_write(codec, WM8510_CLOCK, reg | div); break; default: return -EINVAL; @@ -394,7 +346,7 @@ static int wm8510_set_dai_fmt(struct snd_soc_dai *codec_dai, { struct snd_soc_codec *codec = codec_dai->codec; u16 iface = 0; - u16 clk = wm8510_read_reg_cache(codec, WM8510_CLOCK) & 0x1fe; + u16 clk = snd_soc_read(codec, WM8510_CLOCK) & 0x1fe; /* set master/slave audio interface */ switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { @@ -441,8 +393,8 @@ static int wm8510_set_dai_fmt(struct snd_soc_dai *codec_dai, return -EINVAL; } - wm8510_write(codec, WM8510_IFACE, iface); - wm8510_write(codec, WM8510_CLOCK, clk); + snd_soc_write(codec, WM8510_IFACE, iface); + snd_soc_write(codec, WM8510_CLOCK, clk); return 0; } @@ -453,8 +405,8 @@ static int wm8510_pcm_hw_params(struct snd_pcm_substream *substream, struct snd_soc_pcm_runtime *rtd = substream->private_data; struct snd_soc_device *socdev = rtd->socdev; struct snd_soc_codec *codec = socdev->card->codec; - u16 iface = wm8510_read_reg_cache(codec, WM8510_IFACE) & 0x19f; - u16 adn = wm8510_read_reg_cache(codec, WM8510_ADD) & 0x1f1; + u16 iface = snd_soc_read(codec, WM8510_IFACE) & 0x19f; + u16 adn = snd_soc_read(codec, WM8510_ADD) & 0x1f1; /* bit size */ switch (params_format(params)) { @@ -493,20 +445,20 @@ static int wm8510_pcm_hw_params(struct snd_pcm_substream *substream, break; } - wm8510_write(codec, WM8510_IFACE, iface); - wm8510_write(codec, WM8510_ADD, adn); + snd_soc_write(codec, WM8510_IFACE, iface); + snd_soc_write(codec, WM8510_ADD, adn); return 0; } static int wm8510_mute(struct snd_soc_dai *dai, int mute) { struct snd_soc_codec *codec = dai->codec; - u16 mute_reg = wm8510_read_reg_cache(codec, WM8510_DAC) & 0xffbf; + u16 mute_reg = snd_soc_read(codec, WM8510_DAC) & 0xffbf; if (mute) - wm8510_write(codec, WM8510_DAC, mute_reg | 0x40); + snd_soc_write(codec, WM8510_DAC, mute_reg | 0x40); else - wm8510_write(codec, WM8510_DAC, mute_reg); + snd_soc_write(codec, WM8510_DAC, mute_reg); return 0; } @@ -514,13 +466,13 @@ static int wm8510_mute(struct snd_soc_dai *dai, int mute) static int wm8510_set_bias_level(struct snd_soc_codec *codec, enum snd_soc_bias_level level) { - u16 power1 = wm8510_read_reg_cache(codec, WM8510_POWER1) & ~0x3; + u16 power1 = snd_soc_read(codec, WM8510_POWER1) & ~0x3; switch (level) { case SND_SOC_BIAS_ON: case SND_SOC_BIAS_PREPARE: power1 |= 0x1; /* VMID 50k */ - wm8510_write(codec, WM8510_POWER1, power1); + snd_soc_write(codec, WM8510_POWER1, power1); break; case SND_SOC_BIAS_STANDBY: @@ -528,18 +480,18 @@ static int wm8510_set_bias_level(struct snd_soc_codec *codec, if (codec->bias_level == SND_SOC_BIAS_OFF) { /* Initial cap charge at VMID 5k */ - wm8510_write(codec, WM8510_POWER1, power1 | 0x3); + snd_soc_write(codec, WM8510_POWER1, power1 | 0x3); mdelay(100); } power1 |= 0x2; /* VMID 500k */ - wm8510_write(codec, WM8510_POWER1, power1); + snd_soc_write(codec, WM8510_POWER1, power1); break; case SND_SOC_BIAS_OFF: - wm8510_write(codec, WM8510_POWER1, 0); - wm8510_write(codec, WM8510_POWER2, 0); - wm8510_write(codec, WM8510_POWER3, 0); + snd_soc_write(codec, WM8510_POWER1, 0); + snd_soc_write(codec, WM8510_POWER2, 0); + snd_soc_write(codec, WM8510_POWER3, 0); break; } @@ -619,8 +571,6 @@ static int wm8510_init(struct snd_soc_device *socdev) codec->name = "WM8510"; codec->owner = THIS_MODULE; - codec->read = wm8510_read_reg_cache; - codec->write = wm8510_write; codec->set_bias_level = wm8510_set_bias_level; codec->dai = &wm8510_dai; codec->num_dai = 1; @@ -630,13 +580,20 @@ static int wm8510_init(struct snd_soc_device *socdev) if (codec->reg_cache == NULL) return -ENOMEM; + ret = snd_soc_codec_set_cache_io(codec, 7, 9); + if (ret < 0) { + printk(KERN_ERR "wm8510: failed to set cache I/O: %d\n", + ret); + goto err; + } + wm8510_reset(codec); /* register pcms */ ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); if (ret < 0) { printk(KERN_ERR "wm8510: failed to create pcms\n"); - goto pcm_err; + goto err; } /* power on device */ @@ -655,7 +612,7 @@ static int wm8510_init(struct snd_soc_device *socdev) card_err: snd_soc_free_pcms(socdev); snd_soc_dapm_free(socdev); -pcm_err: +err: kfree(codec->reg_cache); return ret; } diff --git a/sound/soc/codecs/wm8728.c b/sound/soc/codecs/wm8728.c index e7ff212..66da44b 100644 --- a/sound/soc/codecs/wm8728.c +++ b/sound/soc/codecs/wm8728.c @@ -43,45 +43,6 @@ static const u16 wm8728_reg_defaults[] = { 0x100, }; -static inline unsigned int wm8728_read_reg_cache(struct snd_soc_codec *codec, - unsigned int reg) -{ - u16 *cache = codec->reg_cache; - BUG_ON(reg >= ARRAY_SIZE(wm8728_reg_defaults)); - return cache[reg]; -} - -static inline void wm8728_write_reg_cache(struct snd_soc_codec *codec, - u16 reg, unsigned int value) -{ - u16 *cache = codec->reg_cache; - BUG_ON(reg >= ARRAY_SIZE(wm8728_reg_defaults)); - cache[reg] = value; -} - -/* - * write to the WM8728 register space - */ -static int wm8728_write(struct snd_soc_codec *codec, unsigned int reg, - unsigned int value) -{ - u8 data[2]; - - /* data is - * D15..D9 WM8728 register offset - * D8...D0 register data - */ - data[0] = (reg << 1) | ((value >> 8) & 0x0001); - data[1] = value & 0x00ff; - - wm8728_write_reg_cache(codec, reg, value); - - if (codec->hw_write(codec->control_data, data, 2) == 2) - return 0; - else - return -EIO; -} - static const DECLARE_TLV_DB_SCALE(wm8728_tlv, -12750, 50, 1); static const struct snd_kcontrol_new wm8728_snd_controls[] = { @@ -121,12 +82,12 @@ static int wm8728_add_widgets(struct snd_soc_codec *codec) static int wm8728_mute(struct snd_soc_dai *dai, int mute) { struct snd_soc_codec *codec = dai->codec; - u16 mute_reg = wm8728_read_reg_cache(codec, WM8728_DACCTL); + u16 mute_reg = snd_soc_read(codec, WM8728_DACCTL); if (mute) - wm8728_write(codec, WM8728_DACCTL, mute_reg | 1); + snd_soc_write(codec, WM8728_DACCTL, mute_reg | 1); else - wm8728_write(codec, WM8728_DACCTL, mute_reg & ~1); + snd_soc_write(codec, WM8728_DACCTL, mute_reg & ~1); return 0; } @@ -138,7 +99,7 @@ static int wm8728_hw_params(struct snd_pcm_substream *substream, struct snd_soc_pcm_runtime *rtd = substream->private_data; struct snd_soc_device *socdev = rtd->socdev; struct snd_soc_codec *codec = socdev->card->codec; - u16 dac = wm8728_read_reg_cache(codec, WM8728_DACCTL); + u16 dac = snd_soc_read(codec, WM8728_DACCTL); dac &= ~0x18; @@ -155,7 +116,7 @@ static int wm8728_hw_params(struct snd_pcm_substream *substream, return -EINVAL; } - wm8728_write(codec, WM8728_DACCTL, dac); + snd_soc_write(codec, WM8728_DACCTL, dac); return 0; } @@ -164,7 +125,7 @@ static int wm8728_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) { struct snd_soc_codec *codec = codec_dai->codec; - u16 iface = wm8728_read_reg_cache(codec, WM8728_IFCTL); + u16 iface = snd_soc_read(codec, WM8728_IFCTL); /* Currently only I2S is supported by the driver, though the * hardware is more flexible. @@ -204,7 +165,7 @@ static int wm8728_set_dai_fmt(struct snd_soc_dai *codec_dai, return -EINVAL; } - wm8728_write(codec, WM8728_IFCTL, iface); + snd_soc_write(codec, WM8728_IFCTL, iface); return 0; } @@ -220,19 +181,19 @@ static int wm8728_set_bias_level(struct snd_soc_codec *codec, case SND_SOC_BIAS_STANDBY: if (codec->bias_level == SND_SOC_BIAS_OFF) { /* Power everything up... */ - reg = wm8728_read_reg_cache(codec, WM8728_DACCTL); - wm8728_write(codec, WM8728_DACCTL, reg & ~0x4); + reg = snd_soc_read(codec, WM8728_DACCTL); + snd_soc_write(codec, WM8728_DACCTL, reg & ~0x4); /* ..then sync in the register cache. */ for (i = 0; i < ARRAY_SIZE(wm8728_reg_defaults); i++) - wm8728_write(codec, i, - wm8728_read_reg_cache(codec, i)); + snd_soc_write(codec, i, + snd_soc_read(codec, i)); } break; case SND_SOC_BIAS_OFF: - reg = wm8728_read_reg_cache(codec, WM8728_DACCTL); - wm8728_write(codec, WM8728_DACCTL, reg | 0x4); + reg = snd_soc_read(codec, WM8728_DACCTL); + snd_soc_write(codec, WM8728_DACCTL, reg | 0x4); break; } codec->bias_level = level; @@ -294,8 +255,6 @@ static int wm8728_init(struct snd_soc_device *socdev) codec->name = "WM8728"; codec->owner = THIS_MODULE; - codec->read = wm8728_read_reg_cache; - codec->write = wm8728_write; codec->set_bias_level = wm8728_set_bias_level; codec->dai = &wm8728_dai; codec->num_dai = 1; @@ -307,11 +266,18 @@ static int wm8728_init(struct snd_soc_device *socdev) if (codec->reg_cache == NULL) return -ENOMEM; + ret = snd_soc_codec_set_cache_io(codec, 7, 9); + if (ret < 0) { + printk(KERN_ERR "wm8728: failed to configure cache I/O: %d\n", + ret); + goto err; + } + /* register pcms */ ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); if (ret < 0) { printk(KERN_ERR "wm8728: failed to create pcms\n"); - goto pcm_err; + goto err; } /* power on device */ @@ -331,7 +297,7 @@ static int wm8728_init(struct snd_soc_device *socdev) card_err: snd_soc_free_pcms(socdev); snd_soc_dapm_free(socdev); -pcm_err: +err: kfree(codec->reg_cache); return ret; } diff --git a/sound/soc/codecs/wm8731.c b/sound/soc/codecs/wm8731.c index dfbc1bb..4eb84ff 100644 --- a/sound/soc/codecs/wm8731.c +++ b/sound/soc/codecs/wm8731.c @@ -50,60 +50,12 @@ static int wm8731_spi_write(struct spi_device *spi, const char *data, int len); * There is no point in caching the reset register */ static const u16 wm8731_reg[WM8731_CACHEREGNUM] = { - 0x0097, 0x0097, 0x0079, 0x0079, - 0x000a, 0x0008, 0x009f, 0x000a, - 0x0000, 0x0000 + 0x0097, 0x0097, 0x0079, 0x0079, + 0x000a, 0x0008, 0x009f, 0x000a, + 0x0000, 0x0000 }; -/* - * read wm8731 register cache - */ -static inline unsigned int wm8731_read_reg_cache(struct snd_soc_codec *codec, - unsigned int reg) -{ - u16 *cache = codec->reg_cache; - if (reg == WM8731_RESET) - return 0; - if (reg >= WM8731_CACHEREGNUM) - return -1; - return cache[reg]; -} - -/* - * write wm8731 register cache - */ -static inline void wm8731_write_reg_cache(struct snd_soc_codec *codec, - u16 reg, unsigned int value) -{ - u16 *cache = codec->reg_cache; - if (reg >= WM8731_CACHEREGNUM) - return; - cache[reg] = value; -} - -/* - * write to the WM8731 register space - */ -static int wm8731_write(struct snd_soc_codec *codec, unsigned int reg, - unsigned int value) -{ - u8 data[2]; - - /* data is - * D15..D9 WM8731 register offset - * D8...D0 register data - */ - data[0] = (reg << 1) | ((value >> 8) & 0x0001); - data[1] = value & 0x00ff; - - wm8731_write_reg_cache(codec, reg, value); - if (codec->hw_write(codec->control_data, data, 2) == 2) - return 0; - else - return -EIO; -} - -#define wm8731_reset(c) wm8731_write(c, WM8731_RESET, 0) +#define wm8731_reset(c) snd_soc_write(c, WM8731_RESET, 0) static const char *wm8731_input_select[] = {"Line In", "Mic"}; static const char *wm8731_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"}; @@ -260,12 +212,12 @@ static int wm8731_hw_params(struct snd_pcm_substream *substream, struct snd_soc_device *socdev = rtd->socdev; struct snd_soc_codec *codec = socdev->card->codec; struct wm8731_priv *wm8731 = codec->private_data; - u16 iface = wm8731_read_reg_cache(codec, WM8731_IFACE) & 0xfff3; + u16 iface = snd_soc_read(codec, WM8731_IFACE) & 0xfff3; int i = get_coeff(wm8731->sysclk, params_rate(params)); u16 srate = (coeff_div[i].sr << 2) | (coeff_div[i].bosr << 1) | coeff_div[i].usb; - wm8731_write(codec, WM8731_SRATE, srate); + snd_soc_write(codec, WM8731_SRATE, srate); /* bit size */ switch (params_format(params)) { @@ -279,7 +231,7 @@ static int wm8731_hw_params(struct snd_pcm_substream *substream, break; } - wm8731_write(codec, WM8731_IFACE, iface); + snd_soc_write(codec, WM8731_IFACE, iface); return 0; } @@ -291,7 +243,7 @@ static int wm8731_pcm_prepare(struct snd_pcm_substream *substream, struct snd_soc_codec *codec = socdev->card->codec; /* set active */ - wm8731_write(codec, WM8731_ACTIVE, 0x0001); + snd_soc_write(codec, WM8731_ACTIVE, 0x0001); return 0; } @@ -306,19 +258,19 @@ static void wm8731_shutdown(struct snd_pcm_substream *substream, /* deactivate */ if (!codec->active) { udelay(50); - wm8731_write(codec, WM8731_ACTIVE, 0x0); + snd_soc_write(codec, WM8731_ACTIVE, 0x0); } } static int wm8731_mute(struct snd_soc_dai *dai, int mute) { struct snd_soc_codec *codec = dai->codec; - u16 mute_reg = wm8731_read_reg_cache(codec, WM8731_APDIGI) & 0xfff7; + u16 mute_reg = snd_soc_read(codec, WM8731_APDIGI) & 0xfff7; if (mute) - wm8731_write(codec, WM8731_APDIGI, mute_reg | 0x8); + snd_soc_write(codec, WM8731_APDIGI, mute_reg | 0x8); else - wm8731_write(codec, WM8731_APDIGI, mute_reg); + snd_soc_write(codec, WM8731_APDIGI, mute_reg); return 0; } @@ -396,7 +348,7 @@ static int wm8731_set_dai_fmt(struct snd_soc_dai *codec_dai, } /* set iface */ - wm8731_write(codec, WM8731_IFACE, iface); + snd_soc_write(codec, WM8731_IFACE, iface); return 0; } @@ -412,12 +364,12 @@ static int wm8731_set_bias_level(struct snd_soc_codec *codec, break; case SND_SOC_BIAS_STANDBY: /* Clear PWROFF, gate CLKOUT, everything else as-is */ - reg = wm8731_read_reg_cache(codec, WM8731_PWR) & 0xff7f; - wm8731_write(codec, WM8731_PWR, reg | 0x0040); + reg = snd_soc_read(codec, WM8731_PWR) & 0xff7f; + snd_soc_write(codec, WM8731_PWR, reg | 0x0040); break; case SND_SOC_BIAS_OFF: - wm8731_write(codec, WM8731_ACTIVE, 0x0); - wm8731_write(codec, WM8731_PWR, 0xffff); + snd_soc_write(codec, WM8731_ACTIVE, 0x0); + snd_soc_write(codec, WM8731_PWR, 0xffff); break; } codec->bias_level = level; @@ -466,7 +418,7 @@ static int wm8731_suspend(struct platform_device *pdev, pm_message_t state) struct snd_soc_device *socdev = platform_get_drvdata(pdev); struct snd_soc_codec *codec = socdev->card->codec; - wm8731_write(codec, WM8731_ACTIVE, 0x0); + snd_soc_write(codec, WM8731_ACTIVE, 0x0); wm8731_set_bias_level(codec, SND_SOC_BIAS_OFF); return 0; } @@ -556,7 +508,6 @@ static int wm8731_register(struct wm8731_priv *wm8731) { int ret; struct snd_soc_codec *codec = &wm8731->codec; - u16 reg; if (wm8731_codec) { dev_err(codec->dev, "Another WM8731 is registered\n"); @@ -571,8 +522,6 @@ static int wm8731_register(struct wm8731_priv *wm8731) codec->private_data = wm8731; codec->name = "WM8731"; codec->owner = THIS_MODULE; - codec->read = wm8731_read_reg_cache; - codec->write = wm8731_write; codec->bias_level = SND_SOC_BIAS_OFF; codec->set_bias_level = wm8731_set_bias_level; codec->dai = &wm8731_dai; @@ -582,6 +531,12 @@ static int wm8731_register(struct wm8731_priv *wm8731) memcpy(codec->reg_cache, wm8731_reg, sizeof(wm8731_reg)); + ret = snd_soc_codec_set_cache_io(codec, 7, 9); + if (ret < 0) { + dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); + goto err; + } + ret = wm8731_reset(codec); if (ret < 0) { dev_err(codec->dev, "Failed to issue reset: %d\n", ret); @@ -593,18 +548,13 @@ static int wm8731_register(struct wm8731_priv *wm8731) wm8731_set_bias_level(codec, SND_SOC_BIAS_STANDBY); /* Latch the update bits */ - reg = wm8731_read_reg_cache(codec, WM8731_LOUT1V); - wm8731_write(codec, WM8731_LOUT1V, reg & ~0x0100); - reg = wm8731_read_reg_cache(codec, WM8731_ROUT1V); - wm8731_write(codec, WM8731_ROUT1V, reg & ~0x0100); - reg = wm8731_read_reg_cache(codec, WM8731_LINVOL); - wm8731_write(codec, WM8731_LINVOL, reg & ~0x0100); - reg = wm8731_read_reg_cache(codec, WM8731_RINVOL); - wm8731_write(codec, WM8731_RINVOL, reg & ~0x0100); + snd_soc_update_bits(codec, WM8731_LOUT1V, 0x100, 0); + snd_soc_update_bits(codec, WM8731_ROUT1V, 0x100, 0); + snd_soc_update_bits(codec, WM8731_LINVOL, 0x100, 0); + snd_soc_update_bits(codec, WM8731_RINVOL, 0x100, 0); /* Disable bypass path by default */ - reg = wm8731_read_reg_cache(codec, WM8731_APANA); - wm8731_write(codec, WM8731_APANA, reg & ~0x4); + snd_soc_update_bits(codec, WM8731_APANA, 0x4, 0); wm8731_codec = codec; diff --git a/sound/soc/codecs/wm8750.c b/sound/soc/codecs/wm8750.c index b64509b..ed09043 100644 --- a/sound/soc/codecs/wm8750.c +++ b/sound/soc/codecs/wm8750.c @@ -55,50 +55,7 @@ static const u16 wm8750_reg[] = { 0x0079, 0x0079, 0x0079, /* 40 */ }; -/* - * read wm8750 register cache - */ -static inline unsigned int wm8750_read_reg_cache(struct snd_soc_codec *codec, - unsigned int reg) -{ - u16 *cache = codec->reg_cache; - if (reg > WM8750_CACHE_REGNUM) - return -1; - return cache[reg]; -} - -/* - * write wm8750 register cache - */ -static inline void wm8750_write_reg_cache(struct snd_soc_codec *codec, - unsigned int reg, unsigned int value) -{ - u16 *cache = codec->reg_cache; - if (reg > WM8750_CACHE_REGNUM) - return; - cache[reg] = value; -} - -static int wm8750_write(struct snd_soc_codec *codec, unsigned int reg, - unsigned int value) -{ - u8 data[2]; - - /* data is - * D15..D9 WM8753 register offset - * D8...D0 register data - */ - data[0] = (reg << 1) | ((value >> 8) & 0x0001); - data[1] = value & 0x00ff; - - wm8750_write_reg_cache(codec, reg, value); - if (codec->hw_write(codec->control_data, data, 2) == 2) - return 0; - else - return -EIO; -} - -#define wm8750_reset(c) wm8750_write(c, WM8750_RESET, 0) +#define wm8750_reset(c) snd_soc_write(c, WM8750_RESET, 0) /* * WM8750 Controls @@ -594,7 +551,7 @@ static int wm8750_set_dai_fmt(struct snd_soc_dai *codec_dai, return -EINVAL; } - wm8750_write(codec, WM8750_IFACE, iface); + snd_soc_write(codec, WM8750_IFACE, iface); return 0; } @@ -606,8 +563,8 @@ static int wm8750_pcm_hw_params(struct snd_pcm_substream *substream, struct snd_soc_device *socdev = rtd->socdev; struct snd_soc_codec *codec = socdev->card->codec; struct wm8750_priv *wm8750 = codec->private_data; - u16 iface = wm8750_read_reg_cache(codec, WM8750_IFACE) & 0x1f3; - u16 srate = wm8750_read_reg_cache(codec, WM8750_SRATE) & 0x1c0; + u16 iface = snd_soc_read(codec, WM8750_IFACE) & 0x1f3; + u16 srate = snd_soc_read(codec, WM8750_SRATE) & 0x1c0; int coeff = get_coeff(wm8750->sysclk, params_rate(params)); /* bit size */ @@ -626,9 +583,9 @@ static int wm8750_pcm_hw_params(struct snd_pcm_substream *substream, } /* set iface & srate */ - wm8750_write(codec, WM8750_IFACE, iface); + snd_soc_write(codec, WM8750_IFACE, iface); if (coeff >= 0) - wm8750_write(codec, WM8750_SRATE, srate | + snd_soc_write(codec, WM8750_SRATE, srate | (coeff_div[coeff].sr << 1) | coeff_div[coeff].usb); return 0; @@ -637,35 +594,35 @@ static int wm8750_pcm_hw_params(struct snd_pcm_substream *substream, static int wm8750_mute(struct snd_soc_dai *dai, int mute) { struct snd_soc_codec *codec = dai->codec; - u16 mute_reg = wm8750_read_reg_cache(codec, WM8750_ADCDAC) & 0xfff7; + u16 mute_reg = snd_soc_read(codec, WM8750_ADCDAC) & 0xfff7; if (mute) - wm8750_write(codec, WM8750_ADCDAC, mute_reg | 0x8); + snd_soc_write(codec, WM8750_ADCDAC, mute_reg | 0x8); else - wm8750_write(codec, WM8750_ADCDAC, mute_reg); + snd_soc_write(codec, WM8750_ADCDAC, mute_reg); return 0; } static int wm8750_set_bias_level(struct snd_soc_codec *codec, enum snd_soc_bias_level level) { - u16 pwr_reg = wm8750_read_reg_cache(codec, WM8750_PWR1) & 0xfe3e; + u16 pwr_reg = snd_soc_read(codec, WM8750_PWR1) & 0xfe3e; switch (level) { case SND_SOC_BIAS_ON: /* set vmid to 50k and unmute dac */ - wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x00c0); + snd_soc_write(codec, WM8750_PWR1, pwr_reg | 0x00c0); break; case SND_SOC_BIAS_PREPARE: /* set vmid to 5k for quick power up */ - wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x01c1); + snd_soc_write(codec, WM8750_PWR1, pwr_reg | 0x01c1); break; case SND_SOC_BIAS_STANDBY: /* mute dac and set vmid to 500k, enable VREF */ - wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x0141); + snd_soc_write(codec, WM8750_PWR1, pwr_reg | 0x0141); break; case SND_SOC_BIAS_OFF: - wm8750_write(codec, WM8750_PWR1, 0x0001); + snd_soc_write(codec, WM8750_PWR1, 0x0001); break; } codec->bias_level = level; @@ -761,8 +718,6 @@ static int wm8750_init(struct snd_soc_device *socdev) codec->name = "WM8750"; codec->owner = THIS_MODULE; - codec->read = wm8750_read_reg_cache; - codec->write = wm8750_write; codec->set_bias_level = wm8750_set_bias_level; codec->dai = &wm8750_dai; codec->num_dai = 1; @@ -771,13 +726,23 @@ static int wm8750_init(struct snd_soc_device *socdev) if (codec->reg_cache == NULL) return -ENOMEM; - wm8750_reset(codec); + ret = snd_soc_codec_set_cache_io(codec, 7, 9); + if (ret < 0) { + printk(KERN_ERR "wm8750: failed to set cache I/O: %d\n", ret); + goto err; + } + + ret = wm8750_reset(codec); + if (ret < 0) { + printk(KERN_ERR "wm8750: failed to reset: %d\n", ret); + goto err; + } /* register pcms */ ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); if (ret < 0) { printk(KERN_ERR "wm8750: failed to create pcms\n"); - goto pcm_err; + goto err; } /* charge output caps */ @@ -786,22 +751,22 @@ static int wm8750_init(struct snd_soc_device *socdev) schedule_delayed_work(&codec->delayed_work, msecs_to_jiffies(1000)); /* set the update bits */ - reg = wm8750_read_reg_cache(codec, WM8750_LDAC); - wm8750_write(codec, WM8750_LDAC, reg | 0x0100); - reg = wm8750_read_reg_cache(codec, WM8750_RDAC); - wm8750_write(codec, WM8750_RDAC, reg | 0x0100); - reg = wm8750_read_reg_cache(codec, WM8750_LOUT1V); - wm8750_write(codec, WM8750_LOUT1V, reg | 0x0100); - reg = wm8750_read_reg_cache(codec, WM8750_ROUT1V); - wm8750_write(codec, WM8750_ROUT1V, reg | 0x0100); - reg = wm8750_read_reg_cache(codec, WM8750_LOUT2V); - wm8750_write(codec, WM8750_LOUT2V, reg | 0x0100); - reg = wm8750_read_reg_cache(codec, WM8750_ROUT2V); - wm8750_write(codec, WM8750_ROUT2V, reg | 0x0100); - reg = wm8750_read_reg_cache(codec, WM8750_LINVOL); - wm8750_write(codec, WM8750_LINVOL, reg | 0x0100); - reg = wm8750_read_reg_cache(codec, WM8750_RINVOL); - wm8750_write(codec, WM8750_RINVOL, reg | 0x0100); + reg = snd_soc_read(codec, WM8750_LDAC); + snd_soc_write(codec, WM8750_LDAC, reg | 0x0100); + reg = snd_soc_read(codec, WM8750_RDAC); + snd_soc_write(codec, WM8750_RDAC, reg | 0x0100); + reg = snd_soc_read(codec, WM8750_LOUT1V); + snd_soc_write(codec, WM8750_LOUT1V, reg | 0x0100); + reg = snd_soc_read(codec, WM8750_ROUT1V); + snd_soc_write(codec, WM8750_ROUT1V, reg | 0x0100); + reg = snd_soc_read(codec, WM8750_LOUT2V); + snd_soc_write(codec, WM8750_LOUT2V, reg | 0x0100); + reg = snd_soc_read(codec, WM8750_ROUT2V); + snd_soc_write(codec, WM8750_ROUT2V, reg | 0x0100); + reg = snd_soc_read(codec, WM8750_LINVOL); + snd_soc_write(codec, WM8750_LINVOL, reg | 0x0100); + reg = snd_soc_read(codec, WM8750_RINVOL); + snd_soc_write(codec, WM8750_RINVOL, reg | 0x0100); snd_soc_add_controls(codec, wm8750_snd_controls, ARRAY_SIZE(wm8750_snd_controls)); @@ -816,7 +781,7 @@ static int wm8750_init(struct snd_soc_device *socdev) card_err: snd_soc_free_pcms(socdev); snd_soc_dapm_free(socdev); -pcm_err: +err: kfree(codec->reg_cache); return ret; } diff --git a/sound/soc/codecs/wm8960.c b/sound/soc/codecs/wm8960.c index d1769e6..c529ffc 100644 --- a/sound/soc/codecs/wm8960.c +++ b/sound/soc/codecs/wm8960.c @@ -69,61 +69,7 @@ struct wm8960_priv { struct snd_soc_codec codec; }; -/* - * read wm8960 register cache - */ -static inline unsigned int wm8960_read_reg_cache(struct snd_soc_codec *codec, - unsigned int reg) -{ - u16 *cache = codec->reg_cache; - if (reg == WM8960_RESET) - return 0; - if (reg >= WM8960_CACHEREGNUM) - return -1; - return cache[reg]; -} - -/* - * write wm8960 register cache - */ -static inline void wm8960_write_reg_cache(struct snd_soc_codec *codec, - u16 reg, unsigned int value) -{ - u16 *cache = codec->reg_cache; - if (reg >= WM8960_CACHEREGNUM) - return; - cache[reg] = value; -} - -static inline unsigned int wm8960_read(struct snd_soc_codec *codec, - unsigned int reg) -{ - return wm8960_read_reg_cache(codec, reg); -} - -/* - * write to the WM8960 register space - */ -static int wm8960_write(struct snd_soc_codec *codec, unsigned int reg, - unsigned int value) -{ - u8 data[2]; - - /* data is - * D15..D9 WM8960 register offset - * D8...D0 register data - */ - data[0] = (reg << 1) | ((value >> 8) & 0x0001); - data[1] = value & 0x00ff; - - wm8960_write_reg_cache(codec, reg, value); - if (codec->hw_write(codec->control_data, data, 2) == 2) - return 0; - else - return -EIO; -} - -#define wm8960_reset(c) wm8960_write(c, WM8960_RESET, 0) +#define wm8960_reset(c) snd_soc_write(c, WM8960_RESET, 0) /* enumerated controls */ static const char *wm8960_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"}; @@ -420,7 +366,7 @@ static int wm8960_set_dai_fmt(struct snd_soc_dai *codec_dai, } /* set iface */ - wm8960_write(codec, WM8960_IFACE1, iface); + snd_soc_write(codec, WM8960_IFACE1, iface); return 0; } @@ -431,7 +377,7 @@ static int wm8960_hw_params(struct snd_pcm_substream *substream, struct snd_soc_pcm_runtime *rtd = substream->private_data; struct snd_soc_device *socdev = rtd->socdev; struct snd_soc_codec *codec = socdev->card->codec; - u16 iface = wm8960_read(codec, WM8960_IFACE1) & 0xfff3; + u16 iface = snd_soc_read(codec, WM8960_IFACE1) & 0xfff3; /* bit size */ switch (params_format(params)) { @@ -446,19 +392,19 @@ static int wm8960_hw_params(struct snd_pcm_substream *substream, } /* set iface */ - wm8960_write(codec, WM8960_IFACE1, iface); + snd_soc_write(codec, WM8960_IFACE1, iface); return 0; } static int wm8960_mute(struct snd_soc_dai *dai, int mute) { struct snd_soc_codec *codec = dai->codec; - u16 mute_reg = wm8960_read(codec, WM8960_DACCTL1) & 0xfff7; + u16 mute_reg = snd_soc_read(codec, WM8960_DACCTL1) & 0xfff7; if (mute) - wm8960_write(codec, WM8960_DACCTL1, mute_reg | 0x8); + snd_soc_write(codec, WM8960_DACCTL1, mute_reg | 0x8); else - wm8960_write(codec, WM8960_DACCTL1, mute_reg); + snd_soc_write(codec, WM8960_DACCTL1, mute_reg); return 0; } @@ -474,16 +420,16 @@ static int wm8960_set_bias_level(struct snd_soc_codec *codec, case SND_SOC_BIAS_PREPARE: /* Set VMID to 2x50k */ - reg = wm8960_read(codec, WM8960_POWER1); + reg = snd_soc_read(codec, WM8960_POWER1); reg &= ~0x180; reg |= 0x80; - wm8960_write(codec, WM8960_POWER1, reg); + snd_soc_write(codec, WM8960_POWER1, reg); break; case SND_SOC_BIAS_STANDBY: if (codec->bias_level == SND_SOC_BIAS_OFF) { /* Enable anti-pop features */ - wm8960_write(codec, WM8960_APOP1, + snd_soc_write(codec, WM8960_APOP1, WM8960_POBCTRL | WM8960_SOFT_ST | WM8960_BUFDCOPEN | WM8960_BUFIOEN); @@ -491,43 +437,43 @@ static int wm8960_set_bias_level(struct snd_soc_codec *codec, reg = WM8960_DISOP; if (pdata) reg |= pdata->dres << 4; - wm8960_write(codec, WM8960_APOP2, reg); + snd_soc_write(codec, WM8960_APOP2, reg); msleep(400); - wm8960_write(codec, WM8960_APOP2, 0); + snd_soc_write(codec, WM8960_APOP2, 0); /* Enable & ramp VMID at 2x50k */ - reg = wm8960_read(codec, WM8960_POWER1); + reg = snd_soc_read(codec, WM8960_POWER1); reg |= 0x80; - wm8960_write(codec, WM8960_POWER1, reg); + snd_soc_write(codec, WM8960_POWER1, reg); msleep(100); /* Enable VREF */ - wm8960_write(codec, WM8960_POWER1, reg | WM8960_VREF); + snd_soc_write(codec, WM8960_POWER1, reg | WM8960_VREF); /* Disable anti-pop features */ - wm8960_write(codec, WM8960_APOP1, WM8960_BUFIOEN); + snd_soc_write(codec, WM8960_APOP1, WM8960_BUFIOEN); } /* Set VMID to 2x250k */ - reg = wm8960_read(codec, WM8960_POWER1); + reg = snd_soc_read(codec, WM8960_POWER1); reg &= ~0x180; reg |= 0x100; - wm8960_write(codec, WM8960_POWER1, reg); + snd_soc_write(codec, WM8960_POWER1, reg); break; case SND_SOC_BIAS_OFF: /* Enable anti-pop features */ - wm8960_write(codec, WM8960_APOP1, + snd_soc_write(codec, WM8960_APOP1, WM8960_POBCTRL | WM8960_SOFT_ST | WM8960_BUFDCOPEN | WM8960_BUFIOEN); /* Disable VMID and VREF, let them discharge */ - wm8960_write(codec, WM8960_POWER1, 0); + snd_soc_write(codec, WM8960_POWER1, 0); msleep(600); - wm8960_write(codec, WM8960_APOP1, 0); + snd_soc_write(codec, WM8960_APOP1, 0); break; } @@ -610,33 +556,33 @@ static int wm8960_set_dai_pll(struct snd_soc_dai *codec_dai, /* Disable the PLL: even if we are changing the frequency the * PLL needs to be disabled while we do so. */ - wm8960_write(codec, WM8960_CLOCK1, - wm8960_read(codec, WM8960_CLOCK1) & ~1); - wm8960_write(codec, WM8960_POWER2, - wm8960_read(codec, WM8960_POWER2) & ~1); + snd_soc_write(codec, WM8960_CLOCK1, + snd_soc_read(codec, WM8960_CLOCK1) & ~1); + snd_soc_write(codec, WM8960_POWER2, + snd_soc_read(codec, WM8960_POWER2) & ~1); if (!freq_in || !freq_out) return 0; - reg = wm8960_read(codec, WM8960_PLL1) & ~0x3f; + reg = snd_soc_read(codec, WM8960_PLL1) & ~0x3f; reg |= pll_div.pre_div << 4; reg |= pll_div.n; if (pll_div.k) { reg |= 0x20; - wm8960_write(codec, WM8960_PLL2, (pll_div.k >> 18) & 0x3f); - wm8960_write(codec, WM8960_PLL3, (pll_div.k >> 9) & 0x1ff); - wm8960_write(codec, WM8960_PLL4, pll_div.k & 0x1ff); + snd_soc_write(codec, WM8960_PLL2, (pll_div.k >> 18) & 0x3f); + snd_soc_write(codec, WM8960_PLL3, (pll_div.k >> 9) & 0x1ff); + snd_soc_write(codec, WM8960_PLL4, pll_div.k & 0x1ff); } - wm8960_write(codec, WM8960_PLL1, reg); + snd_soc_write(codec, WM8960_PLL1, reg); /* Turn it on */ - wm8960_write(codec, WM8960_POWER2, - wm8960_read(codec, WM8960_POWER2) | 1); + snd_soc_write(codec, WM8960_POWER2, + snd_soc_read(codec, WM8960_POWER2) | 1); msleep(250); - wm8960_write(codec, WM8960_CLOCK1, - wm8960_read(codec, WM8960_CLOCK1) | 1); + snd_soc_write(codec, WM8960_CLOCK1, + snd_soc_read(codec, WM8960_CLOCK1) | 1); return 0; } @@ -649,28 +595,28 @@ static int wm8960_set_dai_clkdiv(struct snd_soc_dai *codec_dai, switch (div_id) { case WM8960_SYSCLKSEL: - reg = wm8960_read(codec, WM8960_CLOCK1) & 0x1fe; - wm8960_write(codec, WM8960_CLOCK1, reg | div); + reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1fe; + snd_soc_write(codec, WM8960_CLOCK1, reg | div); break; case WM8960_SYSCLKDIV: - reg = wm8960_read(codec, WM8960_CLOCK1) & 0x1f9; - wm8960_write(codec, WM8960_CLOCK1, reg | div); + reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1f9; + snd_soc_write(codec, WM8960_CLOCK1, reg | div); break; case WM8960_DACDIV: - reg = wm8960_read(codec, WM8960_CLOCK1) & 0x1c7; - wm8960_write(codec, WM8960_CLOCK1, reg | div); + reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1c7; + snd_soc_write(codec, WM8960_CLOCK1, reg | div); break; case WM8960_OPCLKDIV: - reg = wm8960_read(codec, WM8960_PLL1) & 0x03f; - wm8960_write(codec, WM8960_PLL1, reg | div); + reg = snd_soc_read(codec, WM8960_PLL1) & 0x03f; + snd_soc_write(codec, WM8960_PLL1, reg | div); break; case WM8960_DCLKDIV: - reg = wm8960_read(codec, WM8960_CLOCK2) & 0x03f; - wm8960_write(codec, WM8960_CLOCK2, reg | div); + reg = snd_soc_read(codec, WM8960_CLOCK2) & 0x03f; + snd_soc_write(codec, WM8960_CLOCK2, reg | div); break; case WM8960_TOCLKSEL: - reg = wm8960_read(codec, WM8960_ADDCTL1) & 0x1fd; - wm8960_write(codec, WM8960_ADDCTL1, reg | div); + reg = snd_soc_read(codec, WM8960_ADDCTL1) & 0x1fd; + snd_soc_write(codec, WM8960_ADDCTL1, reg | div); break; default: return -EINVAL; @@ -830,8 +776,6 @@ static int wm8960_register(struct wm8960_priv *wm8960) codec->private_data = wm8960; codec->name = "WM8960"; codec->owner = THIS_MODULE; - codec->read = wm8960_read_reg_cache; - codec->write = wm8960_write; codec->bias_level = SND_SOC_BIAS_OFF; codec->set_bias_level = wm8960_set_bias_level; codec->dai = &wm8960_dai; @@ -841,6 +785,12 @@ static int wm8960_register(struct wm8960_priv *wm8960) memcpy(codec->reg_cache, wm8960_reg, sizeof(wm8960_reg)); + ret = snd_soc_codec_set_cache_io(codec, 7, 9); + if (ret < 0) { + dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); + goto err; + } + ret = wm8960_reset(codec); if (ret < 0) { dev_err(codec->dev, "Failed to issue reset\n"); @@ -852,26 +802,26 @@ static int wm8960_register(struct wm8960_priv *wm8960) wm8960_set_bias_level(codec, SND_SOC_BIAS_STANDBY); /* Latch the update bits */ - reg = wm8960_read(codec, WM8960_LINVOL); - wm8960_write(codec, WM8960_LINVOL, reg | 0x100); - reg = wm8960_read(codec, WM8960_RINVOL); - wm8960_write(codec, WM8960_RINVOL, reg | 0x100); - reg = wm8960_read(codec, WM8960_LADC); - wm8960_write(codec, WM8960_LADC, reg | 0x100); - reg = wm8960_read(codec, WM8960_RADC); - wm8960_write(codec, WM8960_RADC, reg | 0x100); - reg = wm8960_read(codec, WM8960_LDAC); - wm8960_write(codec, WM8960_LDAC, reg | 0x100); - reg = wm8960_read(codec, WM8960_RDAC); - wm8960_write(codec, WM8960_RDAC, reg | 0x100); - reg = wm8960_read(codec, WM8960_LOUT1); - wm8960_write(codec, WM8960_LOUT1, reg | 0x100); - reg = wm8960_read(codec, WM8960_ROUT1); - wm8960_write(codec, WM8960_ROUT1, reg | 0x100); - reg = wm8960_read(codec, WM8960_LOUT2); - wm8960_write(codec, WM8960_LOUT2, reg | 0x100); - reg = wm8960_read(codec, WM8960_ROUT2); - wm8960_write(codec, WM8960_ROUT2, reg | 0x100); + reg = snd_soc_read(codec, WM8960_LINVOL); + snd_soc_write(codec, WM8960_LINVOL, reg | 0x100); + reg = snd_soc_read(codec, WM8960_RINVOL); + snd_soc_write(codec, WM8960_RINVOL, reg | 0x100); + reg = snd_soc_read(codec, WM8960_LADC); + snd_soc_write(codec, WM8960_LADC, reg | 0x100); + reg = snd_soc_read(codec, WM8960_RADC); + snd_soc_write(codec, WM8960_RADC, reg | 0x100); + reg = snd_soc_read(codec, WM8960_LDAC); + snd_soc_write(codec, WM8960_LDAC, reg | 0x100); + reg = snd_soc_read(codec, WM8960_RDAC); + snd_soc_write(codec, WM8960_RDAC, reg | 0x100); + reg = snd_soc_read(codec, WM8960_LOUT1); + snd_soc_write(codec, WM8960_LOUT1, reg | 0x100); + reg = snd_soc_read(codec, WM8960_ROUT1); + snd_soc_write(codec, WM8960_ROUT1, reg | 0x100); + reg = snd_soc_read(codec, WM8960_LOUT2); + snd_soc_write(codec, WM8960_LOUT2, reg | 0x100); + reg = snd_soc_read(codec, WM8960_ROUT2); + snd_soc_write(codec, WM8960_ROUT2, reg | 0x100); wm8960_codec = codec; diff --git a/sound/soc/codecs/wm8971.c b/sound/soc/codecs/wm8971.c index 032dca2..53f3bc9 100644 --- a/sound/soc/codecs/wm8971.c +++ b/sound/soc/codecs/wm8971.c @@ -59,44 +59,7 @@ static const u16 wm8971_reg[] = { 0x0079, 0x0079, 0x0079, /* 40 */ }; -static inline unsigned int wm8971_read_reg_cache(struct snd_soc_codec *codec, - unsigned int reg) -{ - u16 *cache = codec->reg_cache; - if (reg < WM8971_REG_COUNT) - return cache[reg]; - - return -1; -} - -static inline void wm8971_write_reg_cache(struct snd_soc_codec *codec, - unsigned int reg, unsigned int value) -{ - u16 *cache = codec->reg_cache; - if (reg < WM8971_REG_COUNT) - cache[reg] = value; -} - -static int wm8971_write(struct snd_soc_codec *codec, unsigned int reg, - unsigned int value) -{ - u8 data[2]; - - /* data is - * D15..D9 WM8753 register offset - * D8...D0 register data - */ - data[0] = (reg << 1) | ((value >> 8) & 0x0001); - data[1] = value & 0x00ff; - - wm8971_write_reg_cache (codec, reg, value); - if (codec->hw_write(codec->control_data, data, 2) == 2) - return 0; - else - return -EIO; -} - -#define wm8971_reset(c) wm8971_write(c, WM8971_RESET, 0) +#define wm8971_reset(c) snd_soc_write(c, WM8971_RESET, 0) /* WM8971 Controls */ static const char *wm8971_bass[] = { "Linear Control", "Adaptive Boost" }; @@ -521,7 +484,7 @@ static int wm8971_set_dai_fmt(struct snd_soc_dai *codec_dai, return -EINVAL; } - wm8971_write(codec, WM8971_IFACE, iface); + snd_soc_write(codec, WM8971_IFACE, iface); return 0; } @@ -533,8 +496,8 @@ static int wm8971_pcm_hw_params(struct snd_pcm_substream *substream, struct snd_soc_device *socdev = rtd->socdev; struct snd_soc_codec *codec = socdev->card->codec; struct wm8971_priv *wm8971 = codec->private_data; - u16 iface = wm8971_read_reg_cache(codec, WM8971_IFACE) & 0x1f3; - u16 srate = wm8971_read_reg_cache(codec, WM8971_SRATE) & 0x1c0; + u16 iface = snd_soc_read(codec, WM8971_IFACE) & 0x1f3; + u16 srate = snd_soc_read(codec, WM8971_SRATE) & 0x1c0; int coeff = get_coeff(wm8971->sysclk, params_rate(params)); /* bit size */ @@ -553,9 +516,9 @@ static int wm8971_pcm_hw_params(struct snd_pcm_substream *substream, } /* set iface & srate */ - wm8971_write(codec, WM8971_IFACE, iface); + snd_soc_write(codec, WM8971_IFACE, iface); if (coeff >= 0) - wm8971_write(codec, WM8971_SRATE, srate | + snd_soc_write(codec, WM8971_SRATE, srate | (coeff_div[coeff].sr << 1) | coeff_div[coeff].usb); return 0; @@ -564,33 +527,33 @@ static int wm8971_pcm_hw_params(struct snd_pcm_substream *substream, static int wm8971_mute(struct snd_soc_dai *dai, int mute) { struct snd_soc_codec *codec = dai->codec; - u16 mute_reg = wm8971_read_reg_cache(codec, WM8971_ADCDAC) & 0xfff7; + u16 mute_reg = snd_soc_read(codec, WM8971_ADCDAC) & 0xfff7; if (mute) - wm8971_write(codec, WM8971_ADCDAC, mute_reg | 0x8); + snd_soc_write(codec, WM8971_ADCDAC, mute_reg | 0x8); else - wm8971_write(codec, WM8971_ADCDAC, mute_reg); + snd_soc_write(codec, WM8971_ADCDAC, mute_reg); return 0; } static int wm8971_set_bias_level(struct snd_soc_codec *codec, enum snd_soc_bias_level level) { - u16 pwr_reg = wm8971_read_reg_cache(codec, WM8971_PWR1) & 0xfe3e; + u16 pwr_reg = snd_soc_read(codec, WM8971_PWR1) & 0xfe3e; switch (level) { case SND_SOC_BIAS_ON: /* set vmid to 50k and unmute dac */ - wm8971_write(codec, WM8971_PWR1, pwr_reg | 0x00c1); + snd_soc_write(codec, WM8971_PWR1, pwr_reg | 0x00c1); break; case SND_SOC_BIAS_PREPARE: break; case SND_SOC_BIAS_STANDBY: /* mute dac and set vmid to 500k, enable VREF */ - wm8971_write(codec, WM8971_PWR1, pwr_reg | 0x0140); + snd_soc_write(codec, WM8971_PWR1, pwr_reg | 0x0140); break; case SND_SOC_BIAS_OFF: - wm8971_write(codec, WM8971_PWR1, 0x0001); + snd_soc_write(codec, WM8971_PWR1, 0x0001); break; } codec->bias_level = level; @@ -667,8 +630,8 @@ static int wm8971_resume(struct platform_device *pdev) /* charge wm8971 caps */ if (codec->suspend_bias_level == SND_SOC_BIAS_ON) { - reg = wm8971_read_reg_cache(codec, WM8971_PWR1) & 0xfe3e; - wm8971_write(codec, WM8971_PWR1, reg | 0x01c0); + reg = snd_soc_read(codec, WM8971_PWR1) & 0xfe3e; + snd_soc_write(codec, WM8971_PWR1, reg | 0x01c0); codec->bias_level = SND_SOC_BIAS_ON; queue_delayed_work(wm8971_workq, &codec->delayed_work, msecs_to_jiffies(1000)); @@ -684,8 +647,6 @@ static int wm8971_init(struct snd_soc_device *socdev) codec->name = "WM8971"; codec->owner = THIS_MODULE; - codec->read = wm8971_read_reg_cache; - codec->write = wm8971_write; codec->set_bias_level = wm8971_set_bias_level; codec->dai = &wm8971_dai; codec->reg_cache_size = ARRAY_SIZE(wm8971_reg); @@ -695,42 +656,48 @@ static int wm8971_init(struct snd_soc_device *socdev) if (codec->reg_cache == NULL) return -ENOMEM; + ret = snd_soc_codec_set_cache_io(codec, 7, 9); + if (ret < 0) { + printk(KERN_ERR "wm8971: failed to set cache I/O: %d\n", ret); + goto err; + } + wm8971_reset(codec); /* register pcms */ ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); if (ret < 0) { printk(KERN_ERR "wm8971: failed to create pcms\n"); - goto pcm_err; + goto err; } /* charge output caps - set vmid to 5k for quick power up */ - reg = wm8971_read_reg_cache(codec, WM8971_PWR1) & 0xfe3e; - wm8971_write(codec, WM8971_PWR1, reg | 0x01c0); + reg = snd_soc_read(codec, WM8971_PWR1) & 0xfe3e; + snd_soc_write(codec, WM8971_PWR1, reg | 0x01c0); codec->bias_level = SND_SOC_BIAS_STANDBY; queue_delayed_work(wm8971_workq, &codec->delayed_work, msecs_to_jiffies(1000)); /* set the update bits */ - reg = wm8971_read_reg_cache(codec, WM8971_LDAC); - wm8971_write(codec, WM8971_LDAC, reg | 0x0100); - reg = wm8971_read_reg_cache(codec, WM8971_RDAC); - wm8971_write(codec, WM8971_RDAC, reg | 0x0100); - - reg = wm8971_read_reg_cache(codec, WM8971_LOUT1V); - wm8971_write(codec, WM8971_LOUT1V, reg | 0x0100); - reg = wm8971_read_reg_cache(codec, WM8971_ROUT1V); - wm8971_write(codec, WM8971_ROUT1V, reg | 0x0100); - - reg = wm8971_read_reg_cache(codec, WM8971_LOUT2V); - wm8971_write(codec, WM8971_LOUT2V, reg | 0x0100); - reg = wm8971_read_reg_cache(codec, WM8971_ROUT2V); - wm8971_write(codec, WM8971_ROUT2V, reg | 0x0100); - - reg = wm8971_read_reg_cache(codec, WM8971_LINVOL); - wm8971_write(codec, WM8971_LINVOL, reg | 0x0100); - reg = wm8971_read_reg_cache(codec, WM8971_RINVOL); - wm8971_write(codec, WM8971_RINVOL, reg | 0x0100); + reg = snd_soc_read(codec, WM8971_LDAC); + snd_soc_write(codec, WM8971_LDAC, reg | 0x0100); + reg = snd_soc_read(codec, WM8971_RDAC); + snd_soc_write(codec, WM8971_RDAC, reg | 0x0100); + + reg = snd_soc_read(codec, WM8971_LOUT1V); + snd_soc_write(codec, WM8971_LOUT1V, reg | 0x0100); + reg = snd_soc_read(codec, WM8971_ROUT1V); + snd_soc_write(codec, WM8971_ROUT1V, reg | 0x0100); + + reg = snd_soc_read(codec, WM8971_LOUT2V); + snd_soc_write(codec, WM8971_LOUT2V, reg | 0x0100); + reg = snd_soc_read(codec, WM8971_ROUT2V); + snd_soc_write(codec, WM8971_ROUT2V, reg | 0x0100); + + reg = snd_soc_read(codec, WM8971_LINVOL); + snd_soc_write(codec, WM8971_LINVOL, reg | 0x0100); + reg = snd_soc_read(codec, WM8971_RINVOL); + snd_soc_write(codec, WM8971_RINVOL, reg | 0x0100); snd_soc_add_controls(codec, wm8971_snd_controls, ARRAY_SIZE(wm8971_snd_controls)); @@ -745,7 +712,7 @@ static int wm8971_init(struct snd_soc_device *socdev) card_err: snd_soc_free_pcms(socdev); snd_soc_dapm_free(socdev); -pcm_err: +err: kfree(codec->reg_cache); return ret; } diff --git a/sound/soc/codecs/wm8988.c b/sound/soc/codecs/wm8988.c index 6f15acd..7d5b807 100644 --- a/sound/soc/codecs/wm8988.c +++ b/sound/soc/codecs/wm8988.c @@ -57,50 +57,7 @@ struct wm8988_priv { }; -/* - * read wm8988 register cache - */ -static inline unsigned int wm8988_read_reg_cache(struct snd_soc_codec *codec, - unsigned int reg) -{ - u16 *cache = codec->reg_cache; - if (reg > WM8988_NUM_REG) - return -1; - return cache[reg]; -} - -/* - * write wm8988 register cache - */ -static inline void wm8988_write_reg_cache(struct snd_soc_codec *codec, - unsigned int reg, unsigned int value) -{ - u16 *cache = codec->reg_cache; - if (reg > WM8988_NUM_REG) - return; - cache[reg] = value; -} - -static int wm8988_write(struct snd_soc_codec *codec, unsigned int reg, - unsigned int value) -{ - u8 data[2]; - - /* data is - * D15..D9 WM8753 register offset - * D8...D0 register data - */ - data[0] = (reg << 1) | ((value >> 8) & 0x0001); - data[1] = value & 0x00ff; - - wm8988_write_reg_cache(codec, reg, value); - if (codec->hw_write(codec->control_data, data, 2) == 2) - return 0; - else - return -EIO; -} - -#define wm8988_reset(c) wm8988_write(c, WM8988_RESET, 0) +#define wm8988_reset(c) snd_soc_write(c, WM8988_RESET, 0) /* * WM8988 Controls @@ -226,15 +183,15 @@ static int wm8988_lrc_control(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { struct snd_soc_codec *codec = w->codec; - u16 adctl2 = wm8988_read_reg_cache(codec, WM8988_ADCTL2); + u16 adctl2 = snd_soc_read(codec, WM8988_ADCTL2); /* Use the DAC to gate LRC if active, otherwise use ADC */ - if (wm8988_read_reg_cache(codec, WM8988_PWR2) & 0x180) + if (snd_soc_read(codec, WM8988_PWR2) & 0x180) adctl2 &= ~0x4; else adctl2 |= 0x4; - return wm8988_write(codec, WM8988_ADCTL2, adctl2); + return snd_soc_write(codec, WM8988_ADCTL2, adctl2); } static const char *wm8988_line_texts[] = { @@ -619,7 +576,7 @@ static int wm8988_set_dai_fmt(struct snd_soc_dai *codec_dai, return -EINVAL; } - wm8988_write(codec, WM8988_IFACE, iface); + snd_soc_write(codec, WM8988_IFACE, iface); return 0; } @@ -653,8 +610,8 @@ static int wm8988_pcm_hw_params(struct snd_pcm_substream *substream, struct snd_soc_device *socdev = rtd->socdev; struct snd_soc_codec *codec = socdev->card->codec; struct wm8988_priv *wm8988 = codec->private_data; - u16 iface = wm8988_read_reg_cache(codec, WM8988_IFACE) & 0x1f3; - u16 srate = wm8988_read_reg_cache(codec, WM8988_SRATE) & 0x180; + u16 iface = snd_soc_read(codec, WM8988_IFACE) & 0x1f3; + u16 srate = snd_soc_read(codec, WM8988_SRATE) & 0x180; int coeff; coeff = get_coeff(wm8988->sysclk, params_rate(params)); @@ -685,9 +642,9 @@ static int wm8988_pcm_hw_params(struct snd_pcm_substream *substream, } /* set iface & srate */ - wm8988_write(codec, WM8988_IFACE, iface); + snd_soc_write(codec, WM8988_IFACE, iface); if (coeff >= 0) - wm8988_write(codec, WM8988_SRATE, srate | + snd_soc_write(codec, WM8988_SRATE, srate | (coeff_div[coeff].sr << 1) | coeff_div[coeff].usb); return 0; @@ -696,19 +653,19 @@ static int wm8988_pcm_hw_params(struct snd_pcm_substream *substream, static int wm8988_mute(struct snd_soc_dai *dai, int mute) { struct snd_soc_codec *codec = dai->codec; - u16 mute_reg = wm8988_read_reg_cache(codec, WM8988_ADCDAC) & 0xfff7; + u16 mute_reg = snd_soc_read(codec, WM8988_ADCDAC) & 0xfff7; if (mute) - wm8988_write(codec, WM8988_ADCDAC, mute_reg | 0x8); + snd_soc_write(codec, WM8988_ADCDAC, mute_reg | 0x8); else - wm8988_write(codec, WM8988_ADCDAC, mute_reg); + snd_soc_write(codec, WM8988_ADCDAC, mute_reg); return 0; } static int wm8988_set_bias_level(struct snd_soc_codec *codec, enum snd_soc_bias_level level) { - u16 pwr_reg = wm8988_read_reg_cache(codec, WM8988_PWR1) & ~0x1c1; + u16 pwr_reg = snd_soc_read(codec, WM8988_PWR1) & ~0x1c1; switch (level) { case SND_SOC_BIAS_ON: @@ -716,24 +673,24 @@ static int wm8988_set_bias_level(struct snd_soc_codec *codec, case SND_SOC_BIAS_PREPARE: /* VREF, VMID=2x50k, digital enabled */ - wm8988_write(codec, WM8988_PWR1, pwr_reg | 0x00c0); + snd_soc_write(codec, WM8988_PWR1, pwr_reg | 0x00c0); break; case SND_SOC_BIAS_STANDBY: if (codec->bias_level == SND_SOC_BIAS_OFF) { /* VREF, VMID=2x5k */ - wm8988_write(codec, WM8988_PWR1, pwr_reg | 0x1c1); + snd_soc_write(codec, WM8988_PWR1, pwr_reg | 0x1c1); /* Charge caps */ msleep(100); } /* VREF, VMID=2*500k, digital stopped */ - wm8988_write(codec, WM8988_PWR1, pwr_reg | 0x0141); + snd_soc_write(codec, WM8988_PWR1, pwr_reg | 0x0141); break; case SND_SOC_BIAS_OFF: - wm8988_write(codec, WM8988_PWR1, 0x0000); + snd_soc_write(codec, WM8988_PWR1, 0x0000); break; } codec->bias_level = level; @@ -887,8 +844,6 @@ static int wm8988_register(struct wm8988_priv *wm8988) codec->private_data = wm8988; codec->name = "WM8988"; codec->owner = THIS_MODULE; - codec->read = wm8988_read_reg_cache; - codec->write = wm8988_write; codec->dai = &wm8988_dai; codec->num_dai = 1; codec->reg_cache_size = ARRAY_SIZE(wm8988->reg_cache); @@ -899,6 +854,12 @@ static int wm8988_register(struct wm8988_priv *wm8988) memcpy(codec->reg_cache, wm8988_reg, sizeof(wm8988_reg)); + ret = snd_soc_codec_set_cache_io(codec, 7, 9); + if (ret < 0) { + dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); + goto err; + } + ret = wm8988_reset(codec); if (ret < 0) { dev_err(codec->dev, "Failed to issue reset\n"); @@ -906,16 +867,16 @@ static int wm8988_register(struct wm8988_priv *wm8988) } /* set the update bits (we always update left then right) */ - reg = wm8988_read_reg_cache(codec, WM8988_RADC); - wm8988_write(codec, WM8988_RADC, reg | 0x100); - reg = wm8988_read_reg_cache(codec, WM8988_RDAC); - wm8988_write(codec, WM8988_RDAC, reg | 0x0100); - reg = wm8988_read_reg_cache(codec, WM8988_ROUT1V); - wm8988_write(codec, WM8988_ROUT1V, reg | 0x0100); - reg = wm8988_read_reg_cache(codec, WM8988_ROUT2V); - wm8988_write(codec, WM8988_ROUT2V, reg | 0x0100); - reg = wm8988_read_reg_cache(codec, WM8988_RINVOL); - wm8988_write(codec, WM8988_RINVOL, reg | 0x0100); + reg = snd_soc_read(codec, WM8988_RADC); + snd_soc_write(codec, WM8988_RADC, reg | 0x100); + reg = snd_soc_read(codec, WM8988_RDAC); + snd_soc_write(codec, WM8988_RDAC, reg | 0x0100); + reg = snd_soc_read(codec, WM8988_ROUT1V); + snd_soc_write(codec, WM8988_ROUT1V, reg | 0x0100); + reg = snd_soc_read(codec, WM8988_ROUT2V); + snd_soc_write(codec, WM8988_ROUT2V, reg | 0x0100); + reg = snd_soc_read(codec, WM8988_RINVOL); + snd_soc_write(codec, WM8988_RINVOL, reg | 0x0100); wm8988_set_bias_level(&wm8988->codec, SND_SOC_BIAS_STANDBY); diff --git a/sound/soc/soc-cache.c b/sound/soc/soc-cache.c new file mode 100644 index 0000000..4eb4333 --- /dev/null +++ b/sound/soc/soc-cache.c @@ -0,0 +1,105 @@ +/* + * soc-cache.c -- ASoC register cache helpers + * + * Copyright 2009 Wolfson Microelectronics PLC. + * + * Author: Mark Brown <broonie(a)opensource.wolfsonmicro.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include <sound/soc.h> + +static unsigned int snd_soc_7_9_read(struct snd_soc_codec *codec, + unsigned int reg) +{ + u16 *cache = codec->reg_cache; + if (reg >= codec->reg_cache_size) + return -1; + return cache[reg]; +} + +static int snd_soc_7_9_write(struct snd_soc_codec *codec, unsigned int reg, + unsigned int value) +{ + u16 *cache = codec->reg_cache; + u8 data[2]; + int ret; + + BUG_ON(codec->volatile_register); + + data[0] = (reg << 1) | ((value >> 8) & 0x0001); + data[1] = value & 0x00ff; + + if (reg < codec->reg_cache_size) + cache[reg] = value; + ret = codec->hw_write(codec->control_data, data, 2); + if (ret == 2) + return 0; + if (ret < 0) + return ret; + else + return -EIO; +} + + +static struct { + int addr_bits; + int data_bits; + int (*write)(struct snd_soc_codec *, unsigned int, unsigned int); + unsigned int (*read)(struct snd_soc_codec *, unsigned int); +} io_types[] = { + { 7, 9, snd_soc_7_9_write, snd_soc_7_9_read }, +}; + +/** + * snd_soc_codec_set_cache_io: Set up standard I/O functions. + * + * @codec: CODEC to configure. + * @type: Type of cache. + * @addr_bits: Number of bits of register address data. + * @data_bits: Number of bits of data per register. + * + * Register formats are frequently shared between many I2C and SPI + * devices. In order to promote code reuse the ASoC core provides + * some standard implementations of CODEC read and write operations + * which can be set up using this function. + * + * The caller is responsible for allocating and initialising the + * actual cache. + * + * Note that at present this code cannot be used by CODECs with + * volatile registers. + */ +int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec, + int addr_bits, int data_bits) +{ + int i; + + /* We don't support volatile registers yet - refactoring of + * the hw_read operation will be required to do so. */ + if (codec->volatile_register) { + printk(KERN_ERR "Volatile registers not yet supported\n"); + return -EINVAL; + } + + for (i = 0; i < ARRAY_SIZE(io_types); i++) + if (io_types[i].addr_bits == addr_bits && + io_types[i].data_bits == data_bits) + break; + if (i == ARRAY_SIZE(io_types)) { + printk(KERN_ERR + "No I/O functions for %d bit address %d bit data\n", + addr_bits, data_bits); + return -EINVAL; + } + + codec->write = io_types[i].write; + codec->read = io_types[i].read; + + return 0; +} +EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io); -- 1.6.3.3

1 7

[alsa-devel] [PATCH 1/4] pulse: get rid of a number of assert()s
by Lennart Poettering 03 Aug '09

03 Aug '09

Instead of hitting an assert when any of the plugin functions is called in an invalid context we should return a clean error to make sure programs are not unnecessarily aborted. This should fix issues such as http://pulseaudio.org/ticket/595 --- pulse/ctl_pulse.c | 35 +++++++++++++++++------ pulse/pcm_pulse.c | 79 +++++++++++++++++++++++++++++++++++++++++------------ pulse/pulse.c | 34 ++++++++++++++++------- 3 files changed, 111 insertions(+), 37 deletions(-) diff --git a/pulse/ctl_pulse.c b/pulse/ctl_pulse.c index c6cf9e2..1b057ef 100644 --- a/pulse/ctl_pulse.c +++ b/pulse/ctl_pulse.c @@ -125,8 +125,9 @@ static void event_cb(pa_context * c, pa_subscription_event_type_t t, pa_operation *o; assert(ctl); - assert(ctl->p); - assert(ctl->p->context); + + if (!ctl->p || !ctl->p->mainloop || !ctl->p->context) + return; o = pa_context_get_sink_info_by_name(ctl->p->context, ctl->sink, sink_info_cb, ctl); @@ -148,8 +149,9 @@ static int pulse_update_volume(snd_ctl_pulse_t * ctl) pa_operation *o; assert(ctl); - assert(ctl->p); - assert(ctl->p->context); + + if (!ctl->p || !ctl->p->mainloop || !ctl->p->context) + return -EBADFD; o = pa_context_get_sink_info_by_name(ctl->p->context, ctl->sink, sink_info_cb, ctl); @@ -203,6 +205,9 @@ static int pulse_elem_list(snd_ctl_ext_t * ext, unsigned int offset, assert(ctl); + if (!ctl->p || !ctl->p->mainloop || !ctl->p->context) + return -EBADFD; + snd_ctl_elem_id_set_interface(id, SND_CTL_ELEM_IFACE_MIXER); pa_threaded_mainloop_lock(ctl->p->mainloop); @@ -260,7 +265,9 @@ static int pulse_get_attribute(snd_ctl_ext_t * ext, snd_ctl_ext_key_t key, return -EINVAL; assert(ctl); - assert(ctl->p); + + if (!ctl->p || !ctl->p->mainloop || !ctl->p->context) + return -EBADFD; pa_threaded_mainloop_lock(ctl->p->mainloop); @@ -311,7 +318,9 @@ static int pulse_read_integer(snd_ctl_ext_t * ext, snd_ctl_ext_key_t key, pa_cvolume *vol = NULL; assert(ctl); - assert(ctl->p); + + if (!ctl->p || !ctl->p->mainloop || !ctl->p->context) + return -EBADFD; pa_threaded_mainloop_lock(ctl->p->mainloop); @@ -361,7 +370,9 @@ static int pulse_write_integer(snd_ctl_ext_t * ext, snd_ctl_ext_key_t key, pa_cvolume *vol = NULL; assert(ctl); - assert(ctl->p && ctl->p->context); + + if (!ctl->p || !ctl->p->mainloop || !ctl->p->context) + return -EBADFD; pa_threaded_mainloop_lock(ctl->p->mainloop); @@ -465,6 +476,9 @@ static void pulse_subscribe_events(snd_ctl_ext_t * ext, int subscribe) assert(ctl); + if (!ctl->p || !ctl->p->mainloop || !ctl->p->context) + return; + pa_threaded_mainloop_lock(ctl->p->mainloop); ctl->subscribed = !!(subscribe & SND_CTL_EVENT_MASK_VALUE); @@ -481,6 +495,9 @@ static int pulse_read_event(snd_ctl_ext_t * ext, snd_ctl_elem_id_t * id, assert(ctl); + if (!ctl->p || !ctl->p->mainloop || !ctl->p->context) + return -EBADFD; + pa_threaded_mainloop_lock(ctl->p->mainloop); if (!ctl->updated || !ctl->subscribed) @@ -525,8 +542,8 @@ static int pulse_ctl_poll_revents(snd_ctl_ext_t * ext, struct pollfd *pfd, snd_ctl_pulse_t *ctl = ext->private_data; int err = 0; - assert(ctl); - assert(ctl->p); + if (!ctl->p || !ctl->p->mainloop || !ctl->p->context) + return -EBADFD; pa_threaded_mainloop_lock(ctl->p->mainloop); diff --git a/pulse/pcm_pulse.c b/pulse/pcm_pulse.c index c276839..24347f9 100644 --- a/pulse/pcm_pulse.c +++ b/pulse/pcm_pulse.c @@ -106,6 +106,9 @@ static int update_active(snd_pcm_pulse_t *pcm) { assert(pcm); + if (!pcm->p) + return -EBADFD; + ret = check_active(pcm); if (ret < 0) return ret; @@ -125,7 +128,9 @@ static int pulse_start(snd_pcm_ioplug_t * io) int err = 0, err_o = 0, err_u = 0; assert(pcm); - assert(pcm->p); + + if (!pcm->p) + return -EBADFD; pa_threaded_mainloop_lock(pcm->p->mainloop); @@ -174,7 +179,9 @@ static int pulse_stop(snd_pcm_ioplug_t * io) int err = 0, err_o = 0, err_u = 0; assert(pcm); - assert(pcm->p); + + if (!pcm->p) + return -EBADFD; pa_threaded_mainloop_lock(pcm->p->mainloop); @@ -224,7 +231,9 @@ static int pulse_drain(snd_pcm_ioplug_t * io) int err = 0; assert(pcm); - assert(pcm->p); + + if (!pcm->p) + return -EBADFD; pa_threaded_mainloop_lock(pcm->p->mainloop); @@ -259,7 +268,9 @@ static snd_pcm_sframes_t pulse_pointer(snd_pcm_ioplug_t * io) snd_pcm_sframes_t ret = 0; assert(pcm); - assert(pcm->p); + + if (!pcm->p) + return -EBADFD; if (io->state == SND_PCM_STATE_XRUN) return -EPIPE; @@ -269,7 +280,10 @@ static snd_pcm_sframes_t pulse_pointer(snd_pcm_ioplug_t * io) pa_threaded_mainloop_lock(pcm->p->mainloop); - assert(pcm->stream); + if (!pcm->stream) { + ret = -EBADFD; + goto finish; + } ret = pulse_check_connection(pcm->p); if (ret < 0) @@ -305,11 +319,16 @@ static int pulse_delay(snd_pcm_ioplug_t * io, snd_pcm_sframes_t * delayp) pa_usec_t lat = 0; assert(pcm); - assert(pcm->p); + + if (!pcm->p) + return -EBADFD; pa_threaded_mainloop_lock(pcm->p->mainloop); - assert(pcm->stream); + if (!pcm->stream) { + err = -EBADFD; + goto finish; + } for (;;) { err = pulse_check_connection(pcm->p); @@ -354,11 +373,16 @@ static snd_pcm_sframes_t pulse_write(snd_pcm_ioplug_t * io, snd_pcm_sframes_t ret = 0; assert(pcm); - assert(pcm->p); + + if (!pcm->p) + return -EBADFD; pa_threaded_mainloop_lock(pcm->p->mainloop); - assert(pcm->stream); + if (!pcm->stream) { + ret = -EBADFD; + goto finish; + } ret = pulse_check_connection(pcm->p); if (ret < 0) @@ -409,11 +433,16 @@ static snd_pcm_sframes_t pulse_read(snd_pcm_ioplug_t * io, snd_pcm_sframes_t ret = 0; assert(pcm); - assert(pcm->p); + + if (!pcm->p) + return -EBADFD; pa_threaded_mainloop_lock(pcm->p->mainloop); - assert(pcm->stream); + if (!pcm->stream) { + ret = -EBADFD; + goto finish; + } ret = pulse_check_connection(pcm->p); if (ret < 0) @@ -480,7 +509,9 @@ static void stream_request_cb(pa_stream * p, size_t length, void *userdata) snd_pcm_pulse_t *pcm = userdata; assert(pcm); - assert(pcm->p); + + if (!pcm->p) + return; update_active(pcm); } @@ -490,7 +521,9 @@ static void stream_underrun_cb(pa_stream * p, void *userdata) snd_pcm_pulse_t *pcm = userdata; assert(pcm); - assert(pcm->p); + + if (!pcm->p) + return; pcm->underrun = 1; } @@ -499,7 +532,9 @@ static void stream_latency_cb(pa_stream *p, void *userdata) { snd_pcm_pulse_t *pcm = userdata; assert(pcm); - assert(pcm->p); + + if (!pcm->p) + return; pa_threaded_mainloop_signal(pcm->p->mainloop, 0); } @@ -512,7 +547,9 @@ static int pulse_pcm_poll_revents(snd_pcm_ioplug_t * io, snd_pcm_pulse_t *pcm = io->private_data; assert(pcm); - assert(pcm->p); + + if (!pcm->p) + return -EBADFD; pa_threaded_mainloop_lock(pcm->p->mainloop); @@ -541,7 +578,9 @@ static int pulse_prepare(snd_pcm_ioplug_t * io) unsigned c, d; assert(pcm); - assert(pcm->p); + + if (!pcm->p) + return -EBADFD; pa_threaded_mainloop_lock(pcm->p->mainloop); @@ -645,7 +684,9 @@ static int pulse_hw_params(snd_pcm_ioplug_t * io, int err = 0; assert(pcm); - assert(pcm->p); + + if (!pcm->p) + return -EBADFD; pa_threaded_mainloop_lock(pcm->p->mainloop); @@ -745,7 +786,9 @@ static int pulse_pause(snd_pcm_ioplug_t * io, int enable) int err = 0; assert (pcm); - assert (pcm->p); + + if (!pcm->p) + return -EBADFD; pa_threaded_mainloop_lock(pcm->p->mainloop); diff --git a/pulse/pulse.c b/pulse/pulse.c index 3940238..95d8dde 100644 --- a/pulse/pulse.c +++ b/pulse/pulse.c @@ -32,8 +32,9 @@ int pulse_check_connection(snd_pulse_t * p) pa_context_state_t state; assert(p); - assert(p->context); - assert(p->mainloop); + + if (!p->context || !p->mainloop) + return -EBADFD; state = pa_context_get_state(p->context); @@ -77,8 +78,12 @@ int pulse_wait_operation(snd_pulse_t * p, pa_operation * o) { assert(p); assert(o); - assert(p->state == PULSE_STATE_READY); - assert(p->mainloop); + + if (p->state != PULSE_STATE_READY) + return -EBADFD; + + if (!p->mainloop) + return -EBADFD; for (;;) { int err; @@ -103,8 +108,12 @@ int pulse_wait_stream_state(snd_pulse_t * p, pa_stream * stream, assert(p); assert(stream); - assert(p->state == PULSE_STATE_READY); - assert(p->mainloop); + + if (p->state != PULSE_STATE_READY) + return -EBADFD; + + if (!p->mainloop) + return -EBADFD; for (;;) { int err; @@ -197,7 +206,9 @@ snd_pulse_t *pulse_new(void) p->context = pa_context_new(pa_threaded_mainloop_get_api(p->mainloop), buf); - assert(p->context); + + if (!p->context) + goto fail; pa_context_set_state_callback(p->context, context_state_cb, p); @@ -246,9 +257,12 @@ int pulse_connect(snd_pulse_t * p, const char *server) int err; assert(p); - assert(p->context); - assert(p->mainloop); - assert(p->state == PULSE_STATE_INIT); + + if (!p->context || !p->mainloop) + return -EBADFD; + + if (p->state != PULSE_STATE_INIT) + return -EBADFD; pa_threaded_mainloop_lock(p->mainloop); -- 1.6.3.3 Lennart -- Lennart Poettering Red Hat, Inc. lennart [at] poettering [dot] net ICQ# 11060553 http://0pointer.net/lennart/ GnuPG 0x1A015CC4

3 4

[alsa-devel] ASoC: DMA and SSI drivers for i.MX27
by javier Martin 03 Aug '09

03 Aug '09

As I described in one of my previous mails, I have been trying to port an old ASoC driver for kernel 2.6.22 to latest stable 2.6.30 kernel. I am currently facing a big problem which make some repeated samples appear with a regular pattern: - frequency of bad samples = 2 * period_size - bad samples in audio stream are taken from "buffer_size" samples back in the original file. You can reproduce this with: aplay -t raw -f S16_LE -r8000 8k16bitpcm.wav (http://en.wikipedia.org/wiki/WAV to get this file) Here I submit two patches: - One which adds ssi and dma drivers plus a custom machine driver (imx27asoc_list.patch). - Another patch which adds wm8974 codec support taken from ASoC wm8974-upstream branch (wm8974_list.patch). Note that the machine driver attached uses wm8974 codec, thus second patch is needed. Please, note also that patches are currently quite dirty, and in an early development state. The purpose of this mail is not to even consider to include them in any branch right now, but to gather some help to solve the problem. As soon as I have it solved I will clean all the stuff and try to prepare it for mainline. -- Javier Martin Vista Silicon S.L. Universidad de Cantabria CDTUC - FASE C - Oficina S-345 Avda de los Castros s/n 39005- Santander. Cantabria. Spain +34 942 25 32 60 www.vista-silicon.com

1 1

[alsa-devel] ALSA -LADSPA buffer
by arif setiawan 03 Aug '09

03 Aug '09

Hi all, I have some questions about ALSA - LADSPA data exchange in ALSA plugin. As I understand it, LADSPA only use 32 bit floating point, while ALSA can use many types of buffer, S8, S16_LE and so on. My question is how this buffer converted? As I work with OMAP processor I want to use DSP for signal processing. We want the LADSPA plugin connect to the DSP and get plugin advantage. But DSP only work on fixed point arithmatic, so we need to convert the 32 bit float in LADSPA to an integer type buffer. I think I can achieve it by following ALSA-LADSPA buffer conversion. How I can do this? Thank you for your help. Best regards, Arif

1 0

[alsa-devel] omap34xx mixer elements
by Venkam Bala krishna 03 Aug '09

03 Aug '09

Hi all Thanks in advance, I am newbie to alsa Currently working on porting android to omap34xx Right now porting alsa. This is a general question. Please check the below log and specify any suggestions, why is it not listing any of my capture devices. What should be done to recognise my capture devices? Do i have to do it in kernel level or user level?(since my amixer is listing all my elements, given below the log is my amixer output for verification). Any suggestions are welcome thanks once agiain, log ======================== D/AudioHardwareALSA( 799): Mixer: element name: 'Carkit' D/AudioHardwareALSA( 799): Mixer: element name: 'DAC Voice Analog Downlink' D/AudioHardwareALSA( 799): Mixer: element name: 'DAC Voice Digital Downlink' D/AudioHardwareALSA( 799): Mixer: element name: 'DAC1 Analog' D/AudioHardwareALSA( 799): Mixer: element name: 'DAC1 Digital Coarse' D/AudioHardwareALSA( 799): Mixer: element name: 'DAC1 Digital Fine' D/AudioHardwareALSA( 799): Mixer: element name: 'DAC2 Analog' D/AudioHardwareALSA( 799): Mixer: element name: 'DAC2 Digital Coarse' D/AudioHardwareALSA( 799): Mixer: element name: 'DAC2 Digital Fine' D/AudioHardwareALSA( 799): Mixer: element name: 'Earpiece' D/AudioHardwareALSA( 799): Mixer: element name: 'Headset' D/AudioHardwareALSA( 799): Mixer: element name: 'Left Digital Loopback' D/AudioHardwareALSA( 799): Mixer: element name: 'PreDriv' D/AudioHardwareALSA( 799): Mixer: element name: 'Right Digital Loopback' D/AudioHardwareALSA( 799): Mixer: element name: 'Voice Digital Loopback' D/AudioHardwareALSA( 799): Mixer: master 'PCM' not found. D/AudioHardwareALSA( 799): Mixer: route 'Earpiece' found. D/AudioHardwareALSA( 799): Mixer: route 'Speaker' not found. D/AudioHardwareALSA( 799): Mixer: route 'Bluetooth' not found. D/AudioHardwareALSA( 799): Mixer: route 'Headphone' not found. D/AudioHardwareALSA( 799): Mixer: route 'Bluetooth A2DP' not found. D/AudioHardwareALSA( 799): Mixer: element name: 'Analog' D/AudioHardwareALSA( 799): Mixer: element name: 'DAC Voice Analog Downlink' D/AudioHardwareALSA( 799): Mixer: element name: 'DAC Voice Digital Downlink' D/AudioHardwareALSA( 799): Mixer: element name: 'Left Digital Loopback' D/AudioHardwareALSA( 799): Mixer: element name: 'Right Digital Loopback' D/AudioHardwareALSA( 799): Mixer: element name: 'TX1 Digital' D/AudioHardwareALSA( 799): Mixer: element name: 'TX2 Digital' D/AudioHardwareALSA( 799): Mixer: element name: 'Voice Digital Loopback' D/AudioHardwareALSA( 799): Mixer: master 'Capture' not found. D/AudioHardwareALSA( 799): Mixer: route 'Capture' not found. D/AudioHardwareALSA( 799): Mixer: route '' not found. D/AudioHardwareALSA( 799): Mixer: route 'Bluetooth Capture' not found. D/AudioHardwareALSA( 799): Mixer: route 'Capture' not found. D/AudioHardwareALSA( 799): Mixer: route 'Bluetooth A2DP Capture' not found. D/AudioHardwareALSA( 799): mixer initialized. =========================== amixer output ================= numid=18,iface=MIXER,name='Analog Capture Volume' numid=23,iface=MIXER,name='Analog Left Capture Route' numid=22,iface=MIXER,name='Analog Right Capture Route' numid=14,iface=MIXER,name='Carkit Playback Volume' numid=34,iface=MIXER,name='CarkitL Mixer AudioL1' numid=35,iface=MIXER,name='CarkitL Mixer AudioL2' numid=33,iface=MIXER,name='CarkitL Mixer Voice' numid=31,iface=MIXER,name='CarkitR Mixer AudioR1' numid=32,iface=MIXER,name='CarkitR Mixer AudioR2' numid=30,iface=MIXER,name='CarkitR Mixer Voice' numid=11,iface=MIXER,name='DAC Voice Analog Downlink Switch' numid=10,iface=MIXER,name='DAC Voice Analog Downlink Volume' numid=9,iface=MIXER,name='DAC Voice Digital Downlink Volume' numid=7,iface=MIXER,name='DAC1 Analog Playback Switch' numid=5,iface=MIXER,name='DAC1 Analog Playback Volume' numid=3,iface=MIXER,name='DAC1 Digital Coarse Playback Volume' numid=1,iface=MIXER,name='DAC1 Digital Fine Playback Volume' numid=8,iface=MIXER,name='DAC2 Analog Playback Switch' numid=6,iface=MIXER,name='DAC2 Analog Playback Volume' numid=4,iface=MIXER,name='DAC2 Digital Coarse Playback Volume' numid=2,iface=MIXER,name='DAC2 Digital Fine Playback Volume' numid=51,iface=MIXER,name='Earpiece Mixer AudioL1' numid=52,iface=MIXER,name='Earpiece Mixer AudioL2' numid=53,iface=MIXER,name='Earpiece Mixer AudioR1' numid=50,iface=MIXER,name='Earpiece Mixer Voice' numid=15,iface=MIXER,name='Earpiece Playback Volume' numid=19,iface=MIXER,name='HS ramp delay' numid=29,iface=MIXER,name='HandsfreeL Mux' numid=28,iface=MIXER,name='HandsfreeR Mux' numid=13,iface=MIXER,name='Headset Playback Volume' numid=40,iface=MIXER,name='HeadsetL Mixer AudioL1' numid=41,iface=MIXER,name='HeadsetL Mixer AudioL2' numid=39,iface=MIXER,name='HeadsetL Mixer Voice' numid=37,iface=MIXER,name='HeadsetR Mixer AudioR1' numid=38,iface=MIXER,name='HeadsetR Mixer AudioR2' numid=36,iface=MIXER,name='HeadsetR Mixer Voice' numid=56,iface=MIXER,name='Left Digital Loopback Volume' numid=60,iface=MIXER,name='Left1 Analog Loopback Switch' numid=58,iface=MIXER,name='Left2 Analog Loopback Switch' numid=12,iface=MIXER,name='PreDriv Playback Volume' numid=47,iface=MIXER,name='PredriveL Mixer AudioL1' numid=48,iface=MIXER,name='PredriveL Mixer AudioL2' numid=49,iface=MIXER,name='PredriveL Mixer AudioR2' numid=46,iface=MIXER,name='PredriveL Mixer Voice' numid=45,iface=MIXER,name='PredriveR Mixer AudioL2' numid=43,iface=MIXER,name='PredriveR Mixer AudioR1' numid=44,iface=MIXER,name='PredriveR Mixer AudioR2' numid=42,iface=MIXER,name='PredriveR Mixer Voice' numid=55,iface=MIXER,name='Right Digital Loopback Volume' numid=61,iface=MIXER,name='Right1 Analog Loopback Switch' numid=59,iface=MIXER,name='Right2 Analog Loopback Switch' numid=25,iface=MIXER,name='TX1 Capture Route' numid=16,iface=MIXER,name='TX1 Digital Capture Volume' numid=24,iface=MIXER,name='TX2 Capture Route' numid=17,iface=MIXER,name='TX2 Digital Capture Volume' numid=21,iface=MIXER,name='Vibra H-bridge direction' numid=20,iface=MIXER,name='Vibra H-bridge mode' numid=27,iface=MIXER,name='Vibra Mux' numid=26,iface=MIXER,name='Vibra Route' numid=57,iface=MIXER,name='Voice Analog Loopback Switch' numid=54,iface=MIXER,name='Voice Digital Loopback Volume' =================== -- Regards Venkam Balakrishna

2 1

[alsa-devel] [PATCH] hda: add IbexPeak/Clarkdale HDMI model with static cvt/pin number
by Wu Fengguang 03 Aug '09

03 Aug '09

The new IbexPeak HDMI codec has 3 pin nodes and 2 converter nodes. Here we assume only the first ones will be used. Signed-off-by: Wu Fengguang <fengguang.wu(a)intel.com> --- sound/pci/hda/patch_intelhdmi.c | 104 +++++++++++++++--------------- 1 file changed, 52 insertions(+), 52 deletions(-) --- sound-2.6.orig/sound/pci/hda/patch_intelhdmi.c +++ sound-2.6/sound/pci/hda/patch_intelhdmi.c @@ -33,8 +33,8 @@ #include "hda_codec.h" #include "hda_local.h" -#define CVT_NID 0x02 /* audio converter */ -#define PIN_NID 0x03 /* HDMI output pin */ +static hda_nid_t cvt_nid; /* audio converter */ +static hda_nid_t pin_nid; /* HDMI output pin */ #define INTEL_HDMI_EVENT_TAG 0x08 @@ -44,30 +44,6 @@ struct intel_hdmi_spec { struct hdmi_eld sink_eld; }; -static struct hda_verb pinout_enable_verb[] = { - {PIN_NID, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, - {} /* terminator */ -}; - -static struct hda_verb unsolicited_response_verb[] = { - {PIN_NID, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | - INTEL_HDMI_EVENT_TAG}, - {} -}; - -static struct hda_verb def_chan_map[] = { - {CVT_NID, AC_VERB_SET_HDMI_CHAN_SLOT, 0x00}, - {CVT_NID, AC_VERB_SET_HDMI_CHAN_SLOT, 0x11}, - {CVT_NID, AC_VERB_SET_HDMI_CHAN_SLOT, 0x22}, - {CVT_NID, AC_VERB_SET_HDMI_CHAN_SLOT, 0x33}, - {CVT_NID, AC_VERB_SET_HDMI_CHAN_SLOT, 0x44}, - {CVT_NID, AC_VERB_SET_HDMI_CHAN_SLOT, 0x55}, - {CVT_NID, AC_VERB_SET_HDMI_CHAN_SLOT, 0x66}, - {CVT_NID, AC_VERB_SET_HDMI_CHAN_SLOT, 0x77}, - {} -}; - - struct hdmi_audio_infoframe { u8 type; /* 0x84 */ u8 ver; /* 0x01 */ @@ -244,11 +220,12 @@ static void hdmi_write_dip_byte(struct h static void hdmi_enable_output(struct hda_codec *codec) { /* Unmute */ - if (get_wcaps(codec, PIN_NID) & AC_WCAP_OUT_AMP) - snd_hda_codec_write(codec, PIN_NID, 0, + if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP) + snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE); /* Enable pin out */ - snd_hda_sequence_write(codec, pinout_enable_verb); + snd_hda_codec_write(codec, pin_nid, 0, + AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT); } /* @@ -256,8 +233,8 @@ static void hdmi_enable_output(struct hd */ static void hdmi_start_infoframe_trans(struct hda_codec *codec) { - hdmi_set_dip_index(codec, PIN_NID, 0x0, 0x0); - snd_hda_codec_write(codec, PIN_NID, 0, AC_VERB_SET_HDMI_DIP_XMIT, + hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0); + snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT, AC_DIPXMIT_BEST); } @@ -266,20 +243,20 @@ static void hdmi_start_infoframe_trans(s */ static void hdmi_stop_infoframe_trans(struct hda_codec *codec) { - hdmi_set_dip_index(codec, PIN_NID, 0x0, 0x0); - snd_hda_codec_write(codec, PIN_NID, 0, AC_VERB_SET_HDMI_DIP_XMIT, + hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0); + snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT, AC_DIPXMIT_DISABLE); } static int hdmi_get_channel_count(struct hda_codec *codec) { - return 1 + snd_hda_codec_read(codec, CVT_NID, 0, + return 1 + snd_hda_codec_read(codec, cvt_nid, 0, AC_VERB_GET_CVT_CHAN_COUNT, 0); } static void hdmi_set_channel_count(struct hda_codec *codec, int chs) { - snd_hda_codec_write(codec, CVT_NID, 0, + snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_CVT_CHAN_COUNT, chs - 1); if (chs != hdmi_get_channel_count(codec)) @@ -294,7 +271,7 @@ static void hdmi_debug_channel_mapping(s int slot; for (i = 0; i < 8; i++) { - slot = snd_hda_codec_read(codec, CVT_NID, 0, + slot = snd_hda_codec_read(codec, cvt_nid, 0, AC_VERB_GET_HDMI_CHAN_SLOT, i); printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n", slot >> 4, slot & 0x7); @@ -307,7 +284,7 @@ static void hdmi_parse_eld(struct hda_co struct intel_hdmi_spec *spec = codec->spec; struct hdmi_eld *eld = &spec->sink_eld; - if (!snd_hdmi_get_eld(eld, codec, PIN_NID)) + if (!snd_hdmi_get_eld(eld, codec, pin_nid)) snd_hdmi_show_eld(eld); } @@ -322,11 +299,11 @@ static void hdmi_debug_dip_size(struct h int i; int size; - size = snd_hdmi_get_eld_size(codec, PIN_NID); + size = snd_hdmi_get_eld_size(codec, pin_nid); printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size); for (i = 0; i < 8; i++) { - size = snd_hda_codec_read(codec, PIN_NID, 0, + size = snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_SIZE, i); printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size); } @@ -340,15 +317,15 @@ static void hdmi_clear_dip_buffers(struc int size; int pi, bi; for (i = 0; i < 8; i++) { - size = snd_hda_codec_read(codec, PIN_NID, 0, + size = snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_SIZE, i); if (size == 0) continue; - hdmi_set_dip_index(codec, PIN_NID, i, 0x0); + hdmi_set_dip_index(codec, pin_nid, i, 0x0); for (j = 1; j < 1000; j++) { - hdmi_write_dip_byte(codec, PIN_NID, 0x0); - hdmi_get_dip_index(codec, PIN_NID, &pi, &bi); + hdmi_write_dip_byte(codec, pin_nid, 0x0); + hdmi_get_dip_index(codec, pin_nid, &pi, &bi); if (pi != i) snd_printd(KERN_INFO "dip index %d: %d != %d\n", bi, pi, i); @@ -376,9 +353,9 @@ static void hdmi_fill_audio_infoframe(st sum += params[i]; ai->checksum = - sum; - hdmi_set_dip_index(codec, PIN_NID, 0x0, 0x0); + hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0); for (i = 0; i < sizeof(ai); i++) - hdmi_write_dip_byte(codec, PIN_NID, params[i]); + hdmi_write_dip_byte(codec, pin_nid, params[i]); } /* @@ -465,6 +442,8 @@ static int hdmi_setup_channel_allocation static void hdmi_setup_channel_mapping(struct hda_codec *codec, struct hdmi_audio_infoframe *ai) { + int i; + if (!ai->CA) return; @@ -473,7 +452,11 @@ static void hdmi_setup_channel_mapping(s * ALSA sequence is front/surr/clfe/side? */ - snd_hda_sequence_write(codec, def_chan_map); + for (i = 0; i < 8; i++) + snd_hda_codec_write(codec, cvt_nid, 0, + AC_VERB_SET_HDMI_CHAN_SLOT, + (i << 4) | i); + hdmi_debug_channel_mapping(codec); } @@ -597,7 +580,6 @@ static struct hda_pcm_stream intel_hdmi_ .substreams = 1, .channels_min = 2, .channels_max = 8, - .nid = CVT_NID, /* NID to query formats and rates and setup streams */ .ops = { .open = intel_hdmi_playback_pcm_open, .close = intel_hdmi_playback_pcm_close, @@ -613,6 +595,9 @@ static int intel_hdmi_build_pcms(struct codec->num_pcms = 1; codec->pcm_info = info; + /* NID to query formats and rates and setup streams */ + intel_hdmi_pcm_playback.nid = cvt_nid; + info->name = "INTEL HDMI"; info->pcm_type = HDA_PCM_TYPE_HDMI; info->stream[SNDRV_PCM_STREAM_PLAYBACK] = intel_hdmi_pcm_playback; @@ -636,8 +621,9 @@ static int intel_hdmi_init(struct hda_co { hdmi_enable_output(codec); - snd_hda_sequence_write(codec, unsolicited_response_verb); - + snd_hda_codec_write(codec, pin_nid, 0, + AC_VERB_SET_UNSOLICITED_ENABLE, + AC_USRSP_EN | INTEL_HDMI_EVENT_TAG); return 0; } @@ -657,7 +643,7 @@ static struct hda_codec_ops intel_hdmi_p .unsol_event = intel_hdmi_unsol_event, }; -static int patch_intel_hdmi(struct hda_codec *codec) +static int do_patch_intel_hdmi(struct hda_codec *codec) { struct intel_hdmi_spec *spec; @@ -667,7 +653,7 @@ static int patch_intel_hdmi(struct hda_c spec->multiout.num_dacs = 0; /* no analog */ spec->multiout.max_channels = 8; - spec->multiout.dig_out_nid = CVT_NID; + spec->multiout.dig_out_nid = cvt_nid; codec->spec = spec; codec->patch_ops = intel_hdmi_patch_ops; @@ -679,13 +665,27 @@ static int patch_intel_hdmi(struct hda_c return 0; } +static int patch_intel_hdmi(struct hda_codec *codec) +{ + cvt_nid = 0x02; + pin_nid = 0x03; + return do_patch_intel_hdmi(codec); +} + +static int patch_intel_hdmi_ibexpeak(struct hda_codec *codec) +{ + cvt_nid = 0x02; + pin_nid = 0x04; + return do_patch_intel_hdmi(codec); +} + static struct hda_codec_preset snd_hda_preset_intelhdmi[] = { { .id = 0x808629fb, .name = "G45 DEVCL", .patch = patch_intel_hdmi }, { .id = 0x80862801, .name = "G45 DEVBLC", .patch = patch_intel_hdmi }, { .id = 0x80862802, .name = "G45 DEVCTG", .patch = patch_intel_hdmi }, { .id = 0x80862803, .name = "G45 DEVELK", .patch = patch_intel_hdmi }, { .id = 0x80862804, .name = "G45 DEVIBX", .patch = patch_intel_hdmi }, - { .id = 0x80860054, .name = "G45 DEVIBX", .patch = patch_intel_hdmi }, + { .id = 0x80860054, .name = "P55 DEVIBX", .patch = patch_intel_hdmi_ibexpeak }, { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_intel_hdmi }, {} /* terminator */ };

3 6

[alsa-devel] [PATCH] Tell user that stream to be rewound is suspended
by Lubomir Rintel 03 Aug '09

03 Aug '09

Return STRPIPE instead of EBADF when userspace attempts to rewind of forward a stream that was suspended in meanwhile, so that it can be recovered by snd_pcm_recover(). This was causing Pulseaudio to unload the ALSA sink module under a race condition when it attempted to rewind the stream right after resume from suspend, before writing to the stream which would cause it to revive the stream otherwise. Tested to work with Pulseaudio patched to attempt to snd_pcm_recover() upon receiving an error from snd_pcm_rewind(). Signed-off-by: Lubomir Rintel <lkundrak(a)v3.sk> --- sound/core/pcm_native.c | 12 ++++++++++++ 1 files changed, 12 insertions(+), 0 deletions(-) diff --git a/sound/core/pcm_native.c b/sound/core/pcm_native.c index ac2150e..d89c816 100644 --- a/sound/core/pcm_native.c +++ b/sound/core/pcm_native.c @@ -2208,6 +2208,9 @@ static snd_pcm_sframes_t snd_pcm_playback_rewind(struct snd_pcm_substream *subst case SNDRV_PCM_STATE_XRUN: ret = -EPIPE; goto __end; + case SNDRV_PCM_STATE_SUSPENDED: + ret = -ESTRPIPE; + goto __end; default: ret = -EBADFD; goto __end; @@ -2253,6 +2256,9 @@ static snd_pcm_sframes_t snd_pcm_capture_rewind(struct snd_pcm_substream *substr case SNDRV_PCM_STATE_XRUN: ret = -EPIPE; goto __end; + case SNDRV_PCM_STATE_SUSPENDED: + ret = -ESTRPIPE; + goto __end; default: ret = -EBADFD; goto __end; @@ -2299,6 +2305,9 @@ static snd_pcm_sframes_t snd_pcm_playback_forward(struct snd_pcm_substream *subs case SNDRV_PCM_STATE_XRUN: ret = -EPIPE; goto __end; + case SNDRV_PCM_STATE_SUSPENDED: + ret = -ESTRPIPE; + goto __end; default: ret = -EBADFD; goto __end; @@ -2345,6 +2354,9 @@ static snd_pcm_sframes_t snd_pcm_capture_forward(struct snd_pcm_substream *subst case SNDRV_PCM_STATE_XRUN: ret = -EPIPE; goto __end; + case SNDRV_PCM_STATE_SUSPENDED: + ret = -ESTRPIPE; + goto __end; default: ret = -EBADFD; goto __end; -- 1.6.2.5

2 2

[alsa-devel] [PATCH] ALSA: Read buffer overflow
by Roel Kluin 03 Aug '09

03 Aug '09

Check whether index is within bounds before testing the element. Signed-off-by: Roel Kluin <roel.kluin(a)gmail.com> --- diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index 8c8b273..45e0ee0 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -559,7 +559,7 @@ static int alc_pin_mode_get(struct snd_kcontrol *kcontrol, /* Find enumerated value for current pinctl setting */ i = alc_pin_mode_min(dir); - while (alc_pin_mode_values[i] != pinctl && i <= alc_pin_mode_max(dir)) + while (i <= alc_pin_mode_max(dir) && alc_pin_mode_values[i] != pinctl) i++; *valp = i <= alc_pin_mode_max(dir) ? i: alc_pin_mode_min(dir); return 0;

2 1

[alsa-devel] [PATCH] [ALSA] hda: Correct EAPD for Dell Inspiron 1525
by Chengu Wang 03 Aug '09

03 Aug '09

2 1

[alsa-devel] [RFC][PATCH] hda: track CIRB/CORB command/response states for each codec
by Wu Fengguang 03 Aug '09

03 Aug '09

Recently we hit a bug in our dev board, whose HDMI codec#3 may emit redundant/spurious responses, which were then taken as responses to command for another onboard Realtek codec#2, and mess up both codecs. Extend the azx_rb.cmds and azx_rb.res to array and track each codec's commands/responses separately. This helps keep good codec safe from broken ones. Signed-off-by: Wu Fengguang <fengguang.wu(a)intel.com> --- sound/pci/hda/hda_codec.c | 2 sound/pci/hda/hda_codec.h | 2 sound/pci/hda/hda_intel.c | 76 +++++++++++++++++++++++++----------- 3 files changed, 56 insertions(+), 24 deletions(-) --- sound-2.6.orig/sound/pci/hda/hda_codec.c +++ sound-2.6/sound/pci/hda/hda_codec.c @@ -185,7 +185,7 @@ static int codec_exec_verb(struct hda_co mutex_lock(&bus->cmd_mutex); err = bus->ops.command(bus, cmd); if (!err && res) - *res = bus->ops.get_response(bus); + *res = bus->ops.get_response(bus, codec->addr); mutex_unlock(&bus->cmd_mutex); snd_hda_power_down(codec); if (res && *res == -1 && bus->rirb_error) { --- sound-2.6.orig/sound/pci/hda/hda_codec.h +++ sound-2.6/sound/pci/hda/hda_codec.h @@ -568,7 +568,7 @@ struct hda_bus_ops { /* send a single command */ int (*command)(struct hda_bus *bus, unsigned int cmd); /* get a response from the last command */ - unsigned int (*get_response)(struct hda_bus *bus); + unsigned int (*get_response)(struct hda_bus *bus, unsigned int addr); /* free the private data */ void (*private_free)(struct hda_bus *); /* attach a PCM stream */ --- sound-2.6.orig/sound/pci/hda/hda_intel.c +++ sound-2.6/sound/pci/hda/hda_intel.c @@ -260,7 +260,7 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO /* STATESTS int mask: S3,SD2,SD1,SD0 */ #define AZX_MAX_CODECS 4 -#define STATESTS_INT_MASK 0x0f +#define STATESTS_INT_MASK ((1 << AZX_MAX_CODECS) - 1) /* SD_CTL bits */ #define SD_CTL_STREAM_RESET 0x01 /* stream reset bit */ @@ -368,8 +368,8 @@ struct azx_rb { dma_addr_t addr; /* physical address of CORB/RIRB buffer */ /* for RIRB */ unsigned short rp, wp; /* read/write pointers */ - int cmds; /* number of pending requests */ - u32 res; /* last read value */ + int cmds[AZX_MAX_CODECS]; /* number of pending requests */ + u32 res[AZX_MAX_CODECS]; /* last read value */ }; struct azx { @@ -538,7 +538,8 @@ static void azx_init_cmd_io(struct azx * /* RIRB set up */ chip->rirb.addr = chip->rb.addr + 2048; chip->rirb.buf = (u32 *)(chip->rb.area + 2048); - chip->rirb.wp = chip->rirb.rp = chip->rirb.cmds = 0; + chip->rirb.wp = chip->rirb.rp = 0; + memset(chip->rirb.cmds, 0, sizeof(chip->rirb.cmds)); azx_writel(chip, RIRBLBASE, (u32)chip->rirb.addr); azx_writel(chip, RIRBUBASE, upper_32_bits(chip->rirb.addr)); @@ -559,10 +560,35 @@ static void azx_free_cmd_io(struct azx * azx_writeb(chip, CORBCTL, 0); } +static unsigned int azx_command_addr(u32 cmd) +{ + unsigned int addr = cmd >> 28; + + if (addr >= AZX_MAX_CODECS) { + snd_BUG(); + addr = 0; + } + + return addr; +} + +static unsigned int azx_response_addr(u32 res) +{ + unsigned int addr = res & 0xf; + + if (addr >= AZX_MAX_CODECS) { + snd_BUG(); + addr = 0; + } + + return addr; +} + /* send a command */ static int azx_corb_send_cmd(struct hda_bus *bus, u32 val) { struct azx *chip = bus->private_data; + unsigned int addr = azx_command_addr(val); unsigned int wp; /* add command to corb */ @@ -571,7 +597,7 @@ static int azx_corb_send_cmd(struct hda_ wp %= ICH6_MAX_CORB_ENTRIES; spin_lock_irq(&chip->reg_lock); - chip->rirb.cmds++; + chip->rirb.cmds[addr]++; chip->corb.buf[wp] = cpu_to_le32(val); azx_writel(chip, CORBWP, wp); spin_unlock_irq(&chip->reg_lock); @@ -585,13 +611,14 @@ static int azx_corb_send_cmd(struct hda_ static void azx_update_rirb(struct azx *chip) { unsigned int rp, wp; + unsigned int addr; u32 res, res_ex; wp = azx_readb(chip, RIRBWP); if (wp == chip->rirb.wp) return; chip->rirb.wp = wp; - + while (chip->rirb.rp != wp) { chip->rirb.rp++; chip->rirb.rp %= ICH6_MAX_RIRB_ENTRIES; @@ -599,18 +626,20 @@ static void azx_update_rirb(struct azx * rp = chip->rirb.rp << 1; /* an RIRB entry is 8-bytes */ res_ex = le32_to_cpu(chip->rirb.buf[rp + 1]); res = le32_to_cpu(chip->rirb.buf[rp]); + addr = azx_response_addr(res_ex); if (res_ex & ICH6_RIRB_EX_UNSOL_EV) snd_hda_queue_unsol_event(chip->bus, res, res_ex); - else if (chip->rirb.cmds) { - chip->rirb.res = res; + else if (chip->rirb.cmds[addr]) { + chip->rirb.res[addr] = res; smp_wmb(); - chip->rirb.cmds--; + chip->rirb.cmds[addr]--; } } } /* receive a response */ -static unsigned int azx_rirb_get_response(struct hda_bus *bus) +static unsigned int azx_rirb_get_response(struct hda_bus *bus, + unsigned int addr) { struct azx *chip = bus->private_data; unsigned long timeout; @@ -623,10 +652,10 @@ static unsigned int azx_rirb_get_respons azx_update_rirb(chip); spin_unlock_irq(&chip->reg_lock); } - if (!chip->rirb.cmds) { + if (!chip->rirb.cmds[addr]) { smp_rmb(); bus->rirb_error = 0; - return chip->rirb.res; /* the last value */ + return chip->rirb.res[addr]; /* the last value */ } if (time_after(jiffies, timeout)) break; @@ -699,7 +728,7 @@ static unsigned int azx_rirb_get_respons */ /* receive a response */ -static int azx_single_wait_for_response(struct azx *chip) +static int azx_single_wait_for_response(struct azx *chip, unsigned int addr) { int timeout = 50; @@ -707,7 +736,7 @@ static int azx_single_wait_for_response( /* check IRV busy bit */ if (azx_readw(chip, IRS) & ICH6_IRS_VALID) { /* reuse rirb.res as the response return value */ - chip->rirb.res = azx_readl(chip, IR); + chip->rirb.res[addr] = azx_readl(chip, IR); return 0; } udelay(1); @@ -715,7 +744,7 @@ static int azx_single_wait_for_response( if (printk_ratelimit()) snd_printd(SFX "get_response timeout: IRS=0x%x\n", azx_readw(chip, IRS)); - chip->rirb.res = -1; + chip->rirb.res[addr] = -1; return -EIO; } @@ -723,6 +752,7 @@ static int azx_single_wait_for_response( static int azx_single_send_cmd(struct hda_bus *bus, u32 val) { struct azx *chip = bus->private_data; + unsigned int addr = azx_command_addr(val); int timeout = 50; bus->rirb_error = 0; @@ -735,7 +765,7 @@ static int azx_single_send_cmd(struct hd azx_writel(chip, IC, val); azx_writew(chip, IRS, azx_readw(chip, IRS) | ICH6_IRS_BUSY); - return azx_single_wait_for_response(chip); + return azx_single_wait_for_response(chip, addr); } udelay(1); } @@ -746,10 +776,11 @@ static int azx_single_send_cmd(struct hd } /* receive a response */ -static unsigned int azx_single_get_response(struct hda_bus *bus) +static unsigned int azx_single_get_response(struct hda_bus *bus, + unsigned int addr) { struct azx *chip = bus->private_data; - return chip->rirb.res; + return chip->rirb.res[addr]; } /* @@ -772,13 +803,14 @@ static int azx_send_cmd(struct hda_bus * } /* get a response */ -static unsigned int azx_get_response(struct hda_bus *bus) +static unsigned int azx_get_response(struct hda_bus *bus, + unsigned int addr) { struct azx *chip = bus->private_data; if (chip->single_cmd) - return azx_single_get_response(bus); + return azx_single_get_response(bus, addr); else - return azx_rirb_get_response(bus); + return azx_rirb_get_response(bus, addr); } #ifdef CONFIG_SND_HDA_POWER_SAVE @@ -1252,7 +1284,7 @@ static int probe_codec(struct azx *chip, chip->probing = 1; azx_send_cmd(chip->bus, cmd); - res = azx_get_response(chip->bus); + res = azx_get_response(chip->bus, addr); chip->probing = 0; if (res == -1) return -EIO;

2 6

[alsa-devel] ASoC updates for 2.6.32
by Mark Brown 03 Aug '09

03 Aug '09

The following changes since commit c8489c3ed319677f23e5387fec09c844365566e8: Barry Song (1): ASoC: board driver to connect bf5xx with ad1938 are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound-2.6.git for-2.6.32 Barry Song (1): ASoC: Fix checkpatch issues and typos of ad1938 codec and bf5xx-tdm dai Janusz Krzysztofik (3): TTY: Add definition of a new line discipline required by Amstrad E3 (Delta) ASoC driver ASoC: CX20442: push down machine independent line discipline bits ASoC: add support for Amstrad E3 (Delta) machine Lars-Peter Clausen (3): ASoC: neo1973_gta02_wm8753: Replace snd_soc_cnew with snd_soc_add_controls. ASoC: neo1973_gta02_wm8753: Replace deprecated s3c_gpio calls with gpiolib ASoC: jack: Fix race in snd_soc_jack_add_gpios Mark Brown (3): ASoC: Add Openmoko Neo FreeRunner (GTA02) audio driver Merge branch 'gta02-audio' into for-2.6.32 ASoC: Allow CODECs to flag invalid registers include/linux/tty.h | 4 +- include/sound/soc.h | 1 + sound/soc/blackfin/bf5xx-tdm-pcm.c | 4 +- sound/soc/blackfin/bf5xx-tdm-pcm.h | 2 +- sound/soc/blackfin/bf5xx-tdm.h | 2 +- sound/soc/codecs/ad1938.c | 50 ++- sound/soc/codecs/cx20442.c | 116 +++++- sound/soc/codecs/cx20442.h | 1 + sound/soc/omap/Kconfig | 8 + sound/soc/omap/Makefile | 2 + sound/soc/omap/ams-delta.c | 646 ++++++++++++++++++++++++++++++ sound/soc/s3c24xx/Kconfig | 9 + sound/soc/s3c24xx/Makefile | 2 + sound/soc/s3c24xx/neo1973_gta02_wm8753.c | 498 +++++++++++++++++++++++ sound/soc/soc-core.c | 3 + sound/soc/soc-jack.c | 6 +- 16 files changed, 1323 insertions(+), 31 deletions(-) create mode 100644 sound/soc/omap/ams-delta.c create mode 100644 sound/soc/s3c24xx/neo1973_gta02_wm8753.c

2 1

Re: [alsa-devel] ploting waves!
by Guilherme Longo 03 Aug '09

03 Aug '09

1 0

Re: [alsa-devel] Fwd: HDA Intel IDT 92HD71B7X - HP Pavilion DV7-1299EF - Subwoofer not Working
by Takashi Iwai 02 Aug '09

02 Aug '09

At Tue, 28 Jul 2009 20:07:29 +0200, Wael Nasreddine (a.k.a eMxyzptlk) wrote: > > On Mon, Jul 27, 2009 at 3:15 PM, Takashi Iwai <tiwai(a)suse.de> wrote: > > At Sat, 25 Jul 2009 21:44:46 +0200, > Wael Nasreddine (a.k.a eMxyzptlk) wrote: > > > > I still got no solution for this problem, > > Which problem? > It'd be helpful if you give a problem summary and what you've done > until now (and don't do top-posting)... > > thanks, > > Takashi > > Hi Takashi, > > I'm sorry I didn't notice that the problem wasn't quoted in my last message, > anyway the whole topic is included in the forwarded message below, I tried > using hda-verb and hda-analyzer, like you suggested in one of your emails, but > since I don't even know what I'm looking for nor what to try, I did not got > too far! > > What else do you suggest? Are you aware of anyone having a similar issue I can > query to help me figure it out ? First off, try the very latest alsa-driver snapshot. ftp://ftp.kernel.org/pub/linux/kernel/people/tiwai/snapshot/alsa-driver-sna… The problem is that BIOS sets only one stereo speaker in the pin configuration, so the driver cannot know what to do with another speaker. In short, it's a BIOS bug. To overcome that, you need to figure out which pin corresponds to the speaker. The rest available (analog) output pins are 0x0f and 0x14. Set these as output pins, and connect to DAC. For example, # hda-verb /dev/snd/hwC0D0 0x0f SET_PIN_WID 0x40 # hda-verb /dev/snd/hwC0D0 0x0f SET_CONN 0 which enables the output of the pin 0x0f, then connects to the first DAC (= 0x10). Similarly, # hda-verb /dev/snd/hwC0D0 0x14 SET_PIN_WID 0x40 # hda-verb /dev/snd/hwC0D0 0x15 SET_CONN 0 which enables the output of the pin 0x14, then changes the connection of its mux (0x15) to the first DAC (0x10). If these don't help, it's possible that some GPIO bits play any role. Play with GPIO bits, which can be also changed via hda-verb. Takashi > > Regards, > Wael > > Forwarded conversation > Subject: HDA Intel IDT 92HD71B7X - HP Pavilion DV7-1299EF - Subwoofer not > Working > ------------------------ > > From: Wael Nasreddine (a.k.a eMxyzptlk) <mla(a)nasreddine.com> > Date: Sun, Jun 7, 2009 at 4:52 PM > To: alsa-devel(a)alsa-project.org > > Hello, > > Last night I bought myself a new laptop, the HP Pavilion DV7-1299EF. > This laptop has 2 frontal speakers and a subwoofer in the back, on > Windows, when I play a sound the 3 speakers works perfectly, and since > it has a subwoofer the spearkers hardly has any bass capabilities, On > linux the subwoofer is not working, only the 2 speakers are, hence the > sound doesn't have any bass and it's loud and annoying, very > annoying... > > I'm using alsa-drivers compiled from today's git checkout.. > > Here's the snd-hda-intel module options I tried > > options snd-hda-intel enable=1 probe_mask=1 enable_msi=1 single_cmd=0 > power_save_controller=0 power_save=0 model=hp-m4 > > options snd-hda-intel enable=1 probe_mask=1 enable_msi=1 single_cmd=0 > power_save_controller=0 power_save=0 model=hp-dv5 > > options snd-hda-intel enable=1 probe_mask=1 enable_msi=1 single_cmd=0 > power_save_controller=0 power_save=0 model=hp-hdx > > options snd-hda-intel enable=1 probe_mask=1 enable_msi=1 single_cmd=0 > power_save_controller=0 power_save=0 model=dell-m4-1 > > options snd-hda-intel enable=1 probe_mask=1 enable_msi=1 single_cmd=0 > power_save_controller=0 power_save=0 model=dell-m4-2 > > options snd-hda-intel enable=1 probe_mask=1 enable_msi=1 single_cmd=0 > power_save_controller=0 power_save=0 model=dell-m4-3 > > Whatever the model option I try, I always end up with only 2 speakers... > > Here's the alsa-info.sh output -> > http://www.alsa-project.org/db/?f=0fd7cb5749b12dd4322879bb3828f9391bfee487 > I also attached some more informative files.. > > Thanks for any help, it's really appreciated > > -- > Wael Nasreddine > > Blog : http://wael.nasreddine.com > E-mail : wael.nasreddine(a)gmail.com > gTalk : wael.nasreddine(a)gmail.com > Tel : +33.6.32.94.70.13 > Skype : eMxyzptlk > Twitter : @eMxyzptlk > > Sabayon Linux Chief Development Officer - http://www.sabayonlinux.org > > PGP: 1024D/C8DD18A2 06F6 1622 4BC8 4CEB D724 DE12 5565 3945 C8DD 18A2 > > .: An infinite number of monkeys typing into GNU emacs, > would never make a good program. (L. Torvalds 1995) :. > > ---------- > From: Wael Nasreddine (a.k.a eMxyzptlk) <mla(a)nasreddine.com> > Date: Sun, Jun 7, 2009 at 4:57 PM > To: alsa-devel <alsa-devel(a)alsa-project.org> > > ---------- > From: Takashi Iwai <tiwai(a)suse.de> > Date: Mon, Jun 8, 2009 at 7:48 AM > To: "Wael Nasreddine (a.k.a eMxyzptlk)" <mla(a)nasreddine.com> > Cc: alsa-devel <alsa-devel(a)alsa-project.org> > > At Sun, 7 Jun 2009 16:57:34 +0200, > Judging from your alsa-info.sh output, BIOS doesn't give any multiple > speaker configuration, so the driver cannot know it. > > What you need is to figure out which pin corresponds to which I/O. > Try to adjust the codec routing and the pin / amp setup manually via > hda-verb or hda-analyzer. Then try to give the default pin via sysfs > and call reconfigure to confirm that it can be detected. See > $LINUX/Documentation/sound/alsa/HD-Audio.txt for details. > > thanks, > > Takashi > > ---------- > From: Wael Nasreddine (a.k.a eMxyzptlk) <mla(a)nasreddine.com> > Date: Mon, Jun 8, 2009 at 2:54 PM > To: Takashi Iwai <tiwai(a)suse.de> > > Thank you for your reply, I'll do that once I get back home as I'm at work > ATM. > > ---------- > From: Wael Nasreddine (a.k.a eMxyzptlk) <mla(a)nasreddine.com> > Date: Tue, Jun 9, 2009 at 2:32 AM > To: Takashi Iwai <tiwai(a)suse.de> > > I took a look at hda-verb and hda-analyser and I'm afraid I can't > figure out what to do exactly, did anyone do any tutorial on how to > play with them? or should I maybe have a chroot so someone can SSH in > and try and figure it out for me?? > > Thanks > > ---------- > From: Gustavo Vieira <gustavo(a)sagui.org> > Date: Thu, Jun 11, 2009 at 8:12 PM > To: "Wael Nasreddine (a.k.a eMxyzptlk)" <mla(a)nasreddine.com> > Cc: alsa-devel <alsa-devel(a)alsa-project.org> > > Em Dom, 2009-06-07 às 16:57 +0200, Wael Nasreddine (a.k.a eMxyzptlk) > escreveu: > Sorry for hijacking your thread, but does this laptop mute the speaker > if you plug in the headphones? > > I'm experiencing problems with jack sensing in a Pavilion DV4 with the > same codec and what to know if this problem is general to the codec or > specific to my model. > > Abraços, > Gustavo > > ---------- > From: Wael Nasreddine (a.k.a eMxyzptlk) <mla(a)nasreddine.com> > Date: Thu, Jun 11, 2009 at 8:31 PM > To: Gustavo Vieira <gustavo(a)sagui.org> > > Yes it does mute the speakers once I plug in headphones.. > > ---------- > From: Wael Nasreddine (a.k.a eMxyzptlk) <mla(a)nasreddine.com> > Date: Sat, Jul 25, 2009 at 9:44 PM > To: Gustavo Vieira <gustavo(a)sagui.org> > Cc: alsa-devel <alsa-devel(a)alsa-project.org>, Takashi Iwai <tiwai(a)suse.de> > > I still got no solution for this problem, guys please HELP!! I removed > completely Windows, and I can't even enjoy music nor a movie!! > > ---------- > From: Takashi Iwai <tiwai(a)suse.de> > Date: Mon, Jul 27, 2009 at 3:15 PM > To: "Wael Nasreddine (a.k.a eMxyzptlk)" <mla(a)nasreddine.com> > Cc: Gustavo Vieira <gustavo(a)sagui.org>, alsa-devel < > alsa-devel(a)alsa-project.org> > > At Sat, 25 Jul 2009 21:44:46 +0200, > Which problem? > It'd be helpful if you give a problem summary and what you've done > until now (and don't do top-posting)... > > thanks, > > Takashi > > -- > Wael Nasreddine > > Blog : http://wael.nasreddine.com > E-mail : wael.nasreddine(a)gmail.com > gTalk : wael.nasreddine(a)gmail.com > Tel : +33.6.32.94.70.13 > Skype : eMxyzptlk > Twitter : @eMxyzptlk > > Sabayon Linux Chief Development Officer - http://www.sabayonlinux.org > > PGP: 1024D/C8DD18A2 06F6 1622 4BC8 4CEB D724 DE12 5565 3945 C8DD 18A2 > > .: An infinite number of monkeys typing into GNU emacs, > would never make a good program. (L. Torvalds 1995) :. > > > [2 aplay-l.txt <text/plain; US-ASCII (base64)>] > **** List of PLAYBACK Hardware Devices **** > card 0: Intel [HDA Intel], device 0: STAC92xx Analog [STAC92xx Analog] > Subdevices: 1/1 > Subdevice #0: subdevice #0 > card 0: Intel [HDA Intel], device 1: STAC92xx Digital [STAC92xx Digital] > Subdevices: 1/1 > Subdevice #0: subdevice #0 > [3 card0-codec0.txt <text/plain; US-ASCII (base64)>] > Codec: IDT 92HD71B7X > Address: 0 > Function Id: 0x1 > Vendor Id: 0x111d76b2 > Subsystem Id: 0x103c30f6 > Revision Id: 0x100302 > No Modem Function Group found > Default PCM: > rates [0x7e0]: 44100 48000 88200 96000 176400 192000 > bits [0xe]: 16 20 24 > formats [0x1]: PCM > Default Amp-In caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1 > Default Amp-Out caps: ofs=0x7f, nsteps=0x7f, stepsize=0x02, mute=1 > GPIO: io=8, o=0, i=0, unsolicited=1, wake=1 > IO[0]: enable=1, dir=1, wake=0, sticky=0, data=1, unsol=0 > IO[1]: enable=0, dir=0, wake=0, sticky=0, data=0, unsol=0 > IO[2]: enable=0, dir=0, wake=0, sticky=0, data=0, unsol=0 > IO[3]: enable=0, dir=0, wake=0, sticky=0, data=0, unsol=0 > IO[4]: enable=0, dir=0, wake=0, sticky=0, data=0, unsol=0 > IO[5]: enable=0, dir=0, wake=0, sticky=0, data=0, unsol=0 > IO[6]: enable=0, dir=0, wake=0, sticky=0, data=0, unsol=0 > IO[7]: enable=0, dir=0, wake=0, sticky=0, data=0, unsol=0 > Power-Map: 0x01 > Analog Loopback: 0x00 > Node 0x0a [Pin Complex] wcaps 0x400181: Stereo > Pincap 0x0000001c: OUT HP Detect > Pin Default 0x0221401f: [Jack] HP Out at Ext Front > Conn = 1/8, Color = Green > DefAssociation = 0x1, Sequence = 0xf > Pin-ctls: 0x00: > Unsolicited: tag=01, enabled=1 > Connection: 3 > 0x10 0x11* 0x17 > Node 0x0b [Pin Complex] wcaps 0x400081: Stereo > Pincap 0x00001724: IN Detect > Vref caps: HIZ 50 GRD 80 > Pin Default 0x02a19020: [Jack] Mic at Ext Front > Conn = 1/8, Color = Pink > DefAssociation = 0x2, Sequence = 0x0 > Pin-ctls: 0x24: IN VREF_80 > Unsolicited: tag=02, enabled=1 > Node 0x0c [Pin Complex] wcaps 0x400081: Stereo > Pincap 0x00001724: IN Detect > Vref caps: HIZ 50 GRD 80 > Pin Default 0x40f100f0: [N/A] Other at Ext N/A > Conn = 1/8, Color = Unknown > DefAssociation = 0xf, Sequence = 0x0 > Pin-ctls: 0x00: VREF_HIZ > Unsolicited: tag=00, enabled=0 > Node 0x0d [Pin Complex] wcaps 0x400181: Stereo > Pincap 0x00000014: OUT Detect > Pin Default 0x90170010: [Fixed] Speaker at Int N/A > Conn = Analog, Color = Unknown > DefAssociation = 0x1, Sequence = 0x0 > Pin-ctls: 0x40: OUT > Unsolicited: tag=00, enabled=0 > Connection: 3 > 0x10* 0x11 0x17 > Node 0x0e [Pin Complex] wcaps 0x400081: Stereo > Pincap 0x00001724: IN Detect > Vref caps: HIZ 50 GRD 80 > Pin Default 0x40f100f2: [N/A] Other at Ext N/A > Conn = 1/8, Color = Unknown > DefAssociation = 0xf, Sequence = 0x2 > Pin-ctls: 0x00: VREF_HIZ > Unsolicited: tag=00, enabled=0 > Node 0x0f [Pin Complex] wcaps 0x400181: Stereo > Pincap 0x00000014: OUT Detect > Pin Default 0x40f100f7: [N/A] Other at Ext N/A > Conn = 1/8, Color = Unknown > DefAssociation = 0xf, Sequence = 0x7 > Pin-ctls: 0x00: > Unsolicited: tag=00, enabled=0 > Connection: 3 > 0x10 0x11 0x17* > Node 0x10 [Audio Output] wcaps 0xd0c05: Stereo Amp-Out R/L > Amp-Out caps: N/A > Amp-Out vals: [0x7f 0x7f] > Converter: stream=0, channel=0 > Power: setting=D0, actual=D0 > Delay: 13 samples > Node 0x11 [Audio Output] wcaps 0xd0c05: Stereo Amp-Out R/L > Amp-Out caps: N/A > Amp-Out vals: [0x7f 0x7f] > Converter: stream=0, channel=0 > Power: setting=D0, actual=D0 > Delay: 13 samples > Node 0x12 [Audio Input] wcaps 0x1d0541: Stereo > Converter: stream=0, channel=0 > SDI-Select: 0 > Power: setting=D3, actual=D3 > Delay: 13 samples > Connection: 1 > 0x1c > Processing caps: benign=0, ncoeff=0 > Node 0x13 [Audio Input] wcaps 0x1d0541: Stereo > Converter: stream=0, channel=0 > SDI-Select: 0 > Power: setting=D3, actual=D3 > Delay: 13 samples > Connection: 1 > 0x1d > Processing caps: benign=0, ncoeff=0 > Node 0x14 [Pin Complex] wcaps 0x400100: Mono > Pincap 0x00000010: OUT > Pin Default 0x40f100f3: [N/A] Other at Ext N/A > Conn = 1/8, Color = Unknown > DefAssociation = 0xf, Sequence = 0x3 > Pin-ctls: 0x00: > Connection: 1 > 0x16 > Node 0x15 [Audio Selector] wcaps 0x300101: Stereo > Connection: 3 > 0x10* 0x11 0x17 > Node 0x16 [Audio Mixer] wcaps 0x200100: Mono > Connection: 1 > 0x15 > Node 0x17 [Audio Mixer] wcaps 0x20010b: Stereo Amp-In > Amp-In caps: ofs=0x17, nsteps=0x1f, stepsize=0x05, mute=1 > Amp-In vals: [0x97 0x97] [0x97 0x97] [0x97 0x97] [0x97 0x97] [0x97 0x97] > Connection: 5 > 0x10 0x11 0x27 0x1a 0x1b > Node 0x18 [Pin Complex] wcaps 0x40000d: Stereo Amp-Out > Amp-Out caps: ofs=0x00, nsteps=0x03, stepsize=0x27, mute=0 > Amp-Out vals: [0x00 0x00] > Pincap 0x00000020: IN > Pin Default 0x85a61150: [Fixed] Mic at Ext Top > Conn = Digital, Color = Black > DefAssociation = 0x5, Sequence = 0x0 > Misc = NO_PRESENCE > Pin-ctls: 0x20: IN > Node 0x19 [Pin Complex] wcaps 0x40000d: Stereo Amp-Out > Amp-Out caps: ofs=0x00, nsteps=0x03, stepsize=0x27, mute=0 > Amp-Out vals: [0x00 0x00] > Pincap 0x00000020: IN > Pin Default 0x40f100f4: [N/A] Other at Ext N/A > Conn = 1/8, Color = Unknown > DefAssociation = 0xf, Sequence = 0x4 > Pin-ctls: 0x00: > Node 0x1a [Audio Selector] wcaps 0x30010d: Stereo Amp-Out > Amp-Out caps: ofs=0x00, nsteps=0x03, stepsize=0x27, mute=0 > Amp-Out vals: [0x00 0x00] > Connection: 3 > 0x0b* 0x0c 0x0e > Node 0x1b [Audio Selector] wcaps 0x30010d: Stereo Amp-Out > Amp-Out caps: ofs=0x00, nsteps=0x03, stepsize=0x27, mute=0 > Amp-Out vals: [0x00 0x00] > Connection: 3 > 0x0b* 0x0c 0x0e > Node 0x1c [Audio Selector] wcaps 0x30090d: Stereo Amp-Out R/L > Amp-Out caps: ofs=0x00, nsteps=0x0f, stepsize=0x05, mute=1 > Amp-Out vals: [0x0c 0x0c] > Connection: 4 > 0x1a* 0x17 0x18 0x19 > Node 0x1d [Audio Selector] wcaps 0x30090d: Stereo Amp-Out R/L > Amp-Out caps: ofs=0x00, nsteps=0x0f, stepsize=0x05, mute=1 > Amp-Out vals: [0x80 0x80] > Connection: 4 > 0x1b* 0x17 0x18 0x19 > Node 0x1e [Pin Complex] wcaps 0x400301: Stereo Digital > Pincap 0x00000010: OUT > Pin Default 0x014411a0: [Jack] SPDIF Out at Ext Rear > Conn = RCA, Color = Black > DefAssociation = 0xa, Sequence = 0x0 > Misc = NO_PRESENCE > Pin-ctls: 0x40: OUT > Connection: 1 > 0x24 > Node 0x1f [Pin Complex] wcaps 0x400701: Stereo Digital > Pincap 0x00010010: OUT EAPD > EAPD 0x0: > Pin Default 0x40f100f5: [N/A] Other at Ext N/A > Conn = 1/8, Color = Unknown > DefAssociation = 0xf, Sequence = 0x5 > Pin-ctls: 0x00: > Power: setting=D0, actual=D0 > Connection: 2 > 0x24* 0x25 > Node 0x20 [Pin Complex] wcaps 0x400301: Stereo Digital > Pincap 0x00000010: OUT > Pin Default 0x40f100f6: [N/A] Other at Ext N/A > Conn = 1/8, Color = Unknown > DefAssociation = 0xf, Sequence = 0x6 > Pin-ctls: 0x00: > Connection: 1 > 0x25 > Node 0x21 [Audio Output] wcaps 0x40211: Stereo Digital > Converter: stream=0, channel=0 > Digital: Enabled > Digital category: 0x0 > PCM: > rates [0x7e0]: 44100 48000 88200 96000 176400 192000 > bits [0xe]: 16 20 24 > formats [0x5]: PCM AC3 > Delay: 4 samples > Node 0x22 [Audio Output] wcaps 0x40211: Stereo Digital > Converter: stream=0, channel=0 > Digital: Enabled > Digital category: 0x0 > PCM: > rates [0x7e0]: 44100 48000 88200 96000 176400 192000 > bits [0xe]: 16 20 24 > formats [0x5]: PCM AC3 > Delay: 4 samples > Node 0x23 [Vendor Defined Widget] wcaps 0xf00000: Mono > Node 0x24 [Audio Selector] wcaps 0x300101: Stereo > Connection: 3 > 0x21* 0x1c 0x1d > Node 0x25 [Audio Selector] wcaps 0x300101: Stereo > Connection: 3 > 0x22* 0x1c 0x1d > Node 0x26 [Beep Generator Widget] wcaps 0x70000c: Mono Amp-Out > Amp-Out caps: ofs=0x03, nsteps=0x03, stepsize=0x17, mute=1 > Amp-Out vals: [0x00] > Node 0x27 [Pin Complex] wcaps 0x400000: Mono > Pincap 0x00000020: IN > Pin Default 0x40f100f8: [N/A] Other at Ext N/A > Conn = 1/8, Color = Unknown > DefAssociation = 0xf, Sequence = 0x8 > Pin-ctls: 0x00: > Node 0x28 [Volume Knob Widget] wcaps 0x600000: Mono > Volume-Knob: delta=1, steps=127, direct=1, val=127 > Connection: 2 > 0x10 0x11 > [4 kernel-config.txt <text/plain; US-ASCII (base64)>] > # > # Automatically generated make config: don't edit > # Linux kernel version: 2.6.29-gentoo-r4 > # Sun Jun 7 17:04:50 2009 > # > CONFIG_64BIT=y > # CONFIG_X86_32 is not set > CONFIG_X86_64=y > CONFIG_X86=y > CONFIG_ARCH_DEFCONFIG="arch/x86/configs/x86_64_defconfig" > CONFIG_GENERIC_TIME=y > CONFIG_GENERIC_CMOS_UPDATE=y > CONFIG_CLOCKSOURCE_WATCHDOG=y > CONFIG_GENERIC_CLOCKEVENTS=y > CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y > CONFIG_LOCKDEP_SUPPORT=y > CONFIG_STACKTRACE_SUPPORT=y > CONFIG_HAVE_LATENCYTOP_SUPPORT=y > CONFIG_FAST_CMPXCHG_LOCAL=y > CONFIG_MMU=y > CONFIG_ZONE_DMA=y > CONFIG_GENERIC_ISA_DMA=y > CONFIG_GENERIC_IOMAP=y > CONFIG_GENERIC_BUG=y > CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y > CONFIG_GENERIC_HWEIGHT=y > CONFIG_ARCH_MAY_HAVE_PC_FDC=y > CONFIG_RWSEM_GENERIC_SPINLOCK=y > # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set > CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y > CONFIG_GENERIC_CALIBRATE_DELAY=y > CONFIG_GENERIC_TIME_VSYSCALL=y > CONFIG_ARCH_HAS_CPU_RELAX=y > CONFIG_ARCH_HAS_DEFAULT_IDLE=y > CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y > CONFIG_HAVE_SETUP_PER_CPU_AREA=y > CONFIG_HAVE_CPUMASK_OF_CPU_MAP=y > CONFIG_ARCH_HIBERNATION_POSSIBLE=y > CONFIG_ARCH_SUSPEND_POSSIBLE=y > CONFIG_ZONE_DMA32=y > CONFIG_ARCH_POPULATES_NODE_MAP=y > CONFIG_AUDIT_ARCH=y > CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y > CONFIG_GENERIC_HARDIRQS=y > CONFIG_GENERIC_IRQ_PROBE=y > CONFIG_GENERIC_PENDING_IRQ=y > CONFIG_X86_SMP=y > CONFIG_USE_GENERIC_SMP_HELPERS=y > CONFIG_X86_64_SMP=y > CONFIG_X86_HT=y > CONFIG_X86_BIOS_REBOOT=y > CONFIG_X86_TRAMPOLINE=y > # CONFIG_KTIME_SCALAR is not set > CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" > > # > # General setup > # > CONFIG_EXPERIMENTAL=y > CONFIG_LOCK_KERNEL=y > CONFIG_INIT_ENV_ARG_LIMIT=32 > CONFIG_LOCALVERSION="" > # CONFIG_LOCALVERSION_AUTO is not set > CONFIG_SWAP=y > CONFIG_SYSVIPC=y > CONFIG_SYSVIPC_SYSCTL=y > # CONFIG_POSIX_MQUEUE is not set > CONFIG_BSD_PROCESS_ACCT=y > CONFIG_BSD_PROCESS_ACCT_V3=y > CONFIG_TASKSTATS=y > # CONFIG_TASK_DELAY_ACCT is not set > CONFIG_TASK_XACCT=y > CONFIG_TASK_IO_ACCOUNTING=y > CONFIG_AUDIT=y > CONFIG_AUDITSYSCALL=y > CONFIG_AUDIT_TREE=y > > # > # RCU Subsystem > # > CONFIG_CLASSIC_RCU=y > # CONFIG_TREE_RCU is not set > # CONFIG_PREEMPT_RCU is not set > # CONFIG_TREE_RCU_TRACE is not set > # CONFIG_PREEMPT_RCU_TRACE is not set > CONFIG_IKCONFIG=y > CONFIG_IKCONFIG_PROC=y > CONFIG_LOG_BUF_SHIFT=15 > CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y > CONFIG_GROUP_SCHED=y > CONFIG_FAIR_GROUP_SCHED=y > # CONFIG_RT_GROUP_SCHED is not set > CONFIG_USER_SCHED=y > # CONFIG_CGROUP_SCHED is not set > # CONFIG_CGROUPS is not set > CONFIG_SYSFS_DEPRECATED=y > CONFIG_SYSFS_DEPRECATED_V2=y > # CONFIG_RELAY is not set > # CONFIG_NAMESPACES is not set > CONFIG_BLK_DEV_INITRD=y > CONFIG_INITRAMFS_SOURCE="/usr/share/v86d/initramfs" > CONFIG_INITRAMFS_ROOT_UID=0 > CONFIG_INITRAMFS_ROOT_GID=0 > CONFIG_CC_OPTIMIZE_FOR_SIZE=y > CONFIG_SYSCTL=y > CONFIG_ANON_INODES=y > CONFIG_EMBEDDED=y > CONFIG_UID16=y > CONFIG_SYSCTL_SYSCALL=y > # CONFIG_KALLSYMS is not set > CONFIG_HOTPLUG=y > CONFIG_PRINTK=y > CONFIG_BUG=y > CONFIG_ELF_CORE=y > CONFIG_PCSPKR_PLATFORM=y > CONFIG_BASE_FULL=y > CONFIG_FUTEX=y > CONFIG_EPOLL=y > CONFIG_SIGNALFD=y > CONFIG_TIMERFD=y > CONFIG_EVENTFD=y > CONFIG_SHMEM=y > CONFIG_AIO=y > CONFIG_VM_EVENT_COUNTERS=y > CONFIG_PCI_QUIRKS=y > CONFIG_COMPAT_BRK=y > CONFIG_SLAB=y > # CONFIG_SLUB is not set > # CONFIG_SLOB is not set > # CONFIG_PROFILING is not set > CONFIG_HAVE_OPROFILE=y > CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y > CONFIG_HAVE_IOREMAP_PROT=y > CONFIG_HAVE_KPROBES=y > CONFIG_HAVE_KRETPROBES=y > CONFIG_HAVE_ARCH_TRACEHOOK=y > # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set > CONFIG_SLABINFO=y > CONFIG_RT_MUTEXES=y > CONFIG_BASE_SMALL=0 > CONFIG_MODULES=y > # CONFIG_MODULE_FORCE_LOAD is not set > CONFIG_MODULE_UNLOAD=y > CONFIG_MODULE_FORCE_UNLOAD=y > CONFIG_MODVERSIONS=y > # CONFIG_MODULE_SRCVERSION_ALL is not set > CONFIG_STOP_MACHINE=y > CONFIG_BLOCK=y > # CONFIG_BLK_DEV_IO_TRACE is not set > # CONFIG_BLK_DEV_BSG is not set > # CONFIG_BLK_DEV_INTEGRITY is not set > CONFIG_BLOCK_COMPAT=y > > # > # IO Schedulers > # > CONFIG_IOSCHED_NOOP=y > CONFIG_IOSCHED_AS=y > CONFIG_IOSCHED_DEADLINE=y > CONFIG_IOSCHED_CFQ=y > # CONFIG_DEFAULT_AS is not set > # CONFIG_DEFAULT_DEADLINE is not set > CONFIG_DEFAULT_CFQ=y > # CONFIG_DEFAULT_NOOP is not set > CONFIG_DEFAULT_IOSCHED="cfq" > CONFIG_FREEZER=y > > # > # Processor type and features > # > # CONFIG_NO_HZ is not set > # CONFIG_HIGH_RES_TIMERS is not set > CONFIG_GENERIC_CLOCKEVENTS_BUILD=y > CONFIG_SMP=y > # CONFIG_SPARSE_IRQ is not set > CONFIG_X86_FIND_SMP_CONFIG=y > CONFIG_X86_MPPARSE=y > CONFIG_X86_PC=y > # CONFIG_X86_ELAN is not set > # CONFIG_X86_VOYAGER is not set > # CONFIG_X86_GENERICARCH is not set > # CONFIG_X86_VSMP is not set > CONFIG_SCHED_OMIT_FRAME_POINTER=y > # CONFIG_PARAVIRT_GUEST is not set > CONFIG_MEMTEST=y > # CONFIG_M386 is not set > # CONFIG_M486 is not set > # CONFIG_M586 is not set > # CONFIG_M586TSC is not set > # CONFIG_M586MMX is not set > # CONFIG_M686 is not set > # CONFIG_MPENTIUMII is not set > # CONFIG_MPENTIUMIII is not set > # CONFIG_MPENTIUMM is not set > # CONFIG_MPENTIUM4 is not set > # CONFIG_MK6 is not set > # CONFIG_MK7 is not set > # CONFIG_MK8 is not set > # CONFIG_MCRUSOE is not set > # CONFIG_MEFFICEON is not set > # CONFIG_MWINCHIPC6 is not set > # CONFIG_MWINCHIP3D is not set > # CONFIG_MGEODEGX1 is not set > # CONFIG_MGEODE_LX is not set > # CONFIG_MCYRIXIII is not set > # CONFIG_MVIAC3_2 is not set > # CONFIG_MVIAC7 is not set > # CONFIG_MPSC is not set > CONFIG_MCORE2=y > # CONFIG_GENERIC_CPU is not set > CONFIG_X86_CPU=y > CONFIG_X86_L1_CACHE_BYTES=64 > CONFIG_X86_INTERNODE_CACHE_BYTES=64 > CONFIG_X86_CMPXCHG=y > CONFIG_X86_L1_CACHE_SHIFT=6 > CONFIG_X86_WP_WORKS_OK=y > CONFIG_X86_INTEL_USERCOPY=y > CONFIG_X86_USE_PPRO_CHECKSUM=y > CONFIG_X86_P6_NOP=y > CONFIG_X86_TSC=y > CONFIG_X86_CMPXCHG64=y > CONFIG_X86_CMOV=y > CONFIG_X86_MINIMUM_CPU_FAMILY=64 > CONFIG_X86_DEBUGCTLMSR=y > # CONFIG_PROCESSOR_SELECT is not set > CONFIG_CPU_SUP_INTEL=y > CONFIG_CPU_SUP_AMD=y > CONFIG_CPU_SUP_CENTAUR_64=y > # CONFIG_X86_DS is not set > CONFIG_HPET_TIMER=y > CONFIG_HPET_EMULATE_RTC=y > CONFIG_DMI=y > CONFIG_GART_IOMMU=y > # CONFIG_CALGARY_IOMMU is not set > # CONFIG_AMD_IOMMU is not set > CONFIG_SWIOTLB=y > CONFIG_IOMMU_HELPER=y > # CONFIG_IOMMU_API is not set > CONFIG_NR_CPUS=4 > CONFIG_SCHED_SMT=y > CONFIG_SCHED_MC=y > # CONFIG_PREEMPT_NONE is not set > CONFIG_PREEMPT_VOLUNTARY=y > # CONFIG_PREEMPT is not set > CONFIG_X86_LOCAL_APIC=y > CONFIG_X86_IO_APIC=y > # CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS is not set > CONFIG_X86_MCE=y > CONFIG_X86_MCE_INTEL=y > CONFIG_X86_MCE_AMD=y > # CONFIG_I8K is not set > CONFIG_MICROCODE=m > CONFIG_MICROCODE_INTEL=y > # CONFIG_MICROCODE_AMD is not set > CONFIG_MICROCODE_OLD_INTERFACE=y > CONFIG_X86_MSR=m > CONFIG_X86_CPUID=m > CONFIG_ARCH_PHYS_ADDR_T_64BIT=y > CONFIG_DIRECT_GBPAGES=y > # CONFIG_NUMA is not set > CONFIG_ARCH_SPARSEMEM_DEFAULT=y > CONFIG_ARCH_SPARSEMEM_ENABLE=y > CONFIG_ARCH_SELECT_MEMORY_MODEL=y > CONFIG_SELECT_MEMORY_MODEL=y > # CONFIG_FLATMEM_MANUAL is not set > # CONFIG_DISCONTIGMEM_MANUAL is not set > CONFIG_SPARSEMEM_MANUAL=y > CONFIG_SPARSEMEM=y > CONFIG_HAVE_MEMORY_PRESENT=y > CONFIG_SPARSEMEM_EXTREME=y > CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y > CONFIG_SPARSEMEM_VMEMMAP=y > > # > # Memory hotplug is currently incompatible with Software Suspend > # > CONFIG_PAGEFLAGS_EXTENDED=y > CONFIG_SPLIT_PTLOCK_CPUS=4 > CONFIG_PHYS_ADDR_T_64BIT=y > CONFIG_ZONE_DMA_FLAG=1 > CONFIG_BOUNCE=y > CONFIG_VIRT_TO_BUS=y > CONFIG_UNEVICTABLE_LRU=y > # CONFIG_X86_CHECK_BIOS_CORRUPTION is not set > CONFIG_X86_RESERVE_LOW_64K=y > CONFIG_MTRR=y > CONFIG_MTRR_SANITIZER=y > CONFIG_MTRR_SANITIZER_ENABLE_DEFAULT=0 > CONFIG_MTRR_SANITIZER_SPARE_REG_NR_DEFAULT=1 > CONFIG_X86_PAT=y > # CONFIG_EFI is not set > CONFIG_SECCOMP=y > # CONFIG_HZ_100 is not set > # CONFIG_HZ_250 is not set > # CONFIG_HZ_300 is not set > CONFIG_HZ_1000=y > CONFIG_HZ=1000 > # CONFIG_SCHED_HRTICK is not set > CONFIG_KEXEC=y > # CONFIG_CRASH_DUMP is not set > CONFIG_PHYSICAL_START=0x200000 > # CONFIG_RELOCATABLE is not set > CONFIG_PHYSICAL_ALIGN=0x200000 > CONFIG_HOTPLUG_CPU=y > CONFIG_COMPAT_VDSO=y > # CONFIG_CMDLINE_BOOL is not set > CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y > > # > # Power management and ACPI options > # > CONFIG_ARCH_HIBERNATION_HEADER=y > CONFIG_PM=y > # CONFIG_PM_DEBUG is not set > CONFIG_PM_SLEEP_SMP=y > CONFIG_PM_SLEEP=y > CONFIG_SUSPEND=y > CONFIG_SUSPEND_FREEZER=y > CONFIG_HIBERNATION=y > CONFIG_PM_STD_PARTITION="/dev/system/suspend-swap" > CONFIG_ACPI=y > CONFIG_ACPI_SLEEP=y > CONFIG_ACPI_PROCFS=y > CONFIG_ACPI_PROCFS_POWER=y > CONFIG_ACPI_SYSFS_POWER=y > CONFIG_ACPI_PROC_EVENT=y > CONFIG_ACPI_AC=y > CONFIG_ACPI_BATTERY=y > CONFIG_ACPI_BUTTON=y > CONFIG_ACPI_VIDEO=m > CONFIG_ACPI_FAN=y > CONFIG_ACPI_DOCK=y > CONFIG_ACPI_PROCESSOR=y > CONFIG_ACPI_HOTPLUG_CPU=y > CONFIG_ACPI_THERMAL=y > # CONFIG_ACPI_CUSTOM_DSDT is not set > CONFIG_ACPI_BLACKLIST_YEAR=0 > # CONFIG_ACPI_DEBUG is not set > # CONFIG_ACPI_PCI_SLOT is not set > CONFIG_X86_PM_TIMER=y > CONFIG_ACPI_CONTAINER=y > # CONFIG_ACPI_SBS is not set > > # > # CPU Frequency scaling > # > CONFIG_CPU_FREQ=y > CONFIG_CPU_FREQ_TABLE=y > # CONFIG_CPU_FREQ_DEBUG is not set > CONFIG_CPU_FREQ_STAT=y > CONFIG_CPU_FREQ_STAT_DETAILS=y > # CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set > # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set > # CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set > CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y > # CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set > CONFIG_CPU_FREQ_GOV_PERFORMANCE=y > CONFIG_CPU_FREQ_GOV_POWERSAVE=m > CONFIG_CPU_FREQ_GOV_USERSPACE=m > CONFIG_CPU_FREQ_GOV_ONDEMAND=y > CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m > > # > # CPUFreq processor drivers > # > CONFIG_X86_ACPI_CPUFREQ=m > # CONFIG_X86_POWERNOW_K8 is not set > # CONFIG_X86_SPEEDSTEP_CENTRINO is not set > # CONFIG_X86_P4_CLOCKMOD is not set > > # > # shared options > # > # CONFIG_X86_SPEEDSTEP_LIB is not set > CONFIG_CPU_IDLE=y > CONFIG_CPU_IDLE_GOV_LADDER=y > > # > # Memory power savings > # > # CONFIG_I7300_IDLE is not set > > # > # Bus options (PCI etc.) > # > CONFIG_PCI=y > CONFIG_PCI_DIRECT=y > CONFIG_PCI_MMCONFIG=y > CONFIG_PCI_DOMAINS=y > # CONFIG_PCIEPORTBUS is not set > CONFIG_ARCH_SUPPORTS_MSI=y > # CONFIG_PCI_MSI is not set > CONFIG_PCI_LEGACY=y > # CONFIG_PCI_STUB is not set > CONFIG_HT_IRQ=y > CONFIG_ISA_DMA_API=y > CONFIG_K8_NB=y > CONFIG_PCCARD=m > # CONFIG_PCMCIA_DEBUG is not set > # CONFIG_PCMCIA is not set > CONFIG_CARDBUS=y > > # > # PC-card bridges > # > CONFIG_YENTA=m > # CONFIG_YENTA_O2 is not set > # CONFIG_YENTA_RICOH is not set > CONFIG_YENTA_TI=y > CONFIG_YENTA_ENE_TUNE=y > # CONFIG_YENTA_TOSHIBA is not set > CONFIG_PCCARD_NONSTATIC=m > # CONFIG_HOTPLUG_PCI is not set > > # > # Executable file formats / Emulations > # > CONFIG_BINFMT_ELF=y > CONFIG_COMPAT_BINFMT_ELF=y > # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set > # CONFIG_HAVE_AOUT is not set > CONFIG_BINFMT_MISC=m > CONFIG_IA32_EMULATION=y > CONFIG_IA32_AOUT=m > CONFIG_COMPAT=y > CONFIG_COMPAT_FOR_U64_ALIGNMENT=y > CONFIG_SYSVIPC_COMPAT=y > CONFIG_NET=y > > # > # Networking options > # > CONFIG_COMPAT_NET_DEV_OPS=y > CONFIG_PACKET=y > # CONFIG_PACKET_MMAP is not set > CONFIG_UNIX=y > CONFIG_XFRM=y > # CONFIG_XFRM_USER is not set > # CONFIG_XFRM_SUB_POLICY is not set > # CONFIG_XFRM_MIGRATE is not set > # CONFIG_XFRM_STATISTICS is not set > CONFIG_XFRM_IPCOMP=m > # CONFIG_NET_KEY is not set > CONFIG_INET=y > CONFIG_IP_MULTICAST=y > # CONFIG_IP_ADVANCED_ROUTER is not set > CONFIG_IP_FIB_HASH=y > # CONFIG_IP_PNP is not set > CONFIG_NET_IPIP=m > # CONFIG_NET_IPGRE is not set > CONFIG_IP_MROUTE=y > CONFIG_IP_PIMSM_V1=y > CONFIG_IP_PIMSM_V2=y > # CONFIG_ARPD is not set > # CONFIG_SYN_COOKIES is not set > # CONFIG_INET_AH is not set > # CONFIG_INET_ESP is not set > # CONFIG_INET_IPCOMP is not set > # CONFIG_INET_XFRM_TUNNEL is not set > CONFIG_INET_TUNNEL=m > CONFIG_INET_XFRM_MODE_TRANSPORT=y > CONFIG_INET_XFRM_MODE_TUNNEL=y > CONFIG_INET_XFRM_MODE_BEET=y > # CONFIG_INET_LRO is not set > CONFIG_INET_DIAG=y > CONFIG_INET_TCP_DIAG=y > # CONFIG_TCP_CONG_ADVANCED is not set > CONFIG_TCP_CONG_CUBIC=y > CONFIG_DEFAULT_TCP_CONG="cubic" > # CONFIG_TCP_MD5SIG is not set > CONFIG_IPV6=m > CONFIG_IPV6_PRIVACY=y > # CONFIG_IPV6_ROUTER_PREF is not set > # CONFIG_IPV6_OPTIMISTIC_DAD is not set > CONFIG_INET6_AH=m > CONFIG_INET6_ESP=m > CONFIG_INET6_IPCOMP=m > # CONFIG_IPV6_MIP6 is not set > CONFIG_INET6_XFRM_TUNNEL=m > CONFIG_INET6_TUNNEL=m > CONFIG_INET6_XFRM_MODE_TRANSPORT=m > CONFIG_INET6_XFRM_MODE_TUNNEL=m > CONFIG_INET6_XFRM_MODE_BEET=m > # CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set > CONFIG_IPV6_SIT=m > CONFIG_IPV6_NDISC_NODETYPE=y > CONFIG_IPV6_TUNNEL=m > # CONFIG_IPV6_MULTIPLE_TABLES is not set > # CONFIG_IPV6_MROUTE is not set > # CONFIG_NETWORK_SECMARK is not set > CONFIG_NETFILTER=y > # CONFIG_NETFILTER_DEBUG is not set > CONFIG_NETFILTER_ADVANCED=y > CONFIG_BRIDGE_NETFILTER=y > > # > # Core Netfilter Configuration > # > # CONFIG_NETFILTER_NETLINK_QUEUE is not set > # CONFIG_NETFILTER_NETLINK_LOG is not set > CONFIG_NF_CONNTRACK=m > CONFIG_NF_CT_ACCT=y > CONFIG_NF_CONNTRACK_MARK=y > CONFIG_NF_CONNTRACK_EVENTS=y > # CONFIG_NF_CT_PROTO_DCCP is not set > # CONFIG_NF_CT_PROTO_SCTP is not set > # CONFIG_NF_CT_PROTO_UDPLITE is not set > # CONFIG_NF_CONNTRACK_AMANDA is not set > # CONFIG_NF_CONNTRACK_FTP is not set > # CONFIG_NF_CONNTRACK_H323 is not set > # CONFIG_NF_CONNTRACK_IRC is not set > # CONFIG_NF_CONNTRACK_NETBIOS_NS is not set > # CONFIG_NF_CONNTRACK_PPTP is not set > # CONFIG_NF_CONNTRACK_SANE is not set > # CONFIG_NF_CONNTRACK_SIP is not set > # CONFIG_NF_CONNTRACK_TFTP is not set > # CONFIG_NF_CT_NETLINK is not set > # CONFIG_NETFILTER_TPROXY is not set > CONFIG_NETFILTER_XTABLES=y > # CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set > # CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set > # CONFIG_NETFILTER_XT_TARGET_DSCP is not set > # CONFIG_NETFILTER_XT_TARGET_MARK is not set > # CONFIG_NETFILTER_XT_TARGET_NFLOG is not set > # CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set > # CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set > # CONFIG_NETFILTER_XT_TARGET_RATEEST is not set > # CONFIG_NETFILTER_XT_TARGET_TRACE is not set > # CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set > # CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set > # CONFIG_NETFILTER_XT_MATCH_COMMENT is not set > # CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set > # CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set > # CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set > # CONFIG_NETFILTER_XT_MATCH_CONNTRACK is not set > # CONFIG_NETFILTER_XT_MATCH_DCCP is not set > # CONFIG_NETFILTER_XT_MATCH_DSCP is not set > # CONFIG_NETFILTER_XT_MATCH_ESP is not set > # CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set > # CONFIG_NETFILTER_XT_MATCH_HELPER is not set > # CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set > # CONFIG_NETFILTER_XT_MATCH_LENGTH is not set > # CONFIG_NETFILTER_XT_MATCH_LIMIT is not set > # CONFIG_NETFILTER_XT_MATCH_MAC is not set > # CONFIG_NETFILTER_XT_MATCH_MARK is not set > # CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set > # CONFIG_NETFILTER_XT_MATCH_OWNER is not set > # CONFIG_NETFILTER_XT_MATCH_POLICY is not set > # CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set > # CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set > # CONFIG_NETFILTER_XT_MATCH_QUOTA is not set > # CONFIG_NETFILTER_XT_MATCH_RATEEST is not set > # CONFIG_NETFILTER_XT_MATCH_REALM is not set > # CONFIG_NETFILTER_XT_MATCH_RECENT is not set > # CONFIG_NETFILTER_XT_MATCH_SCTP is not set > # CONFIG_NETFILTER_XT_MATCH_STATE is not set > # CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set > # CONFIG_NETFILTER_XT_MATCH_STRING is not set > # CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set > # CONFIG_NETFILTER_XT_MATCH_TIME is not set > # CONFIG_NETFILTER_XT_MATCH_U32 is not set > # CONFIG_IP_VS is not set > > # > # IP: Netfilter Configuration > # > CONFIG_NF_DEFRAG_IPV4=m > CONFIG_NF_CONNTRACK_IPV4=m > CONFIG_NF_CONNTRACK_PROC_COMPAT=y > # CONFIG_IP_NF_QUEUE is not set > CONFIG_IP_NF_IPTABLES=m > CONFIG_IP_NF_MATCH_ADDRTYPE=m > CONFIG_IP_NF_MATCH_AH=m > CONFIG_IP_NF_MATCH_ECN=m > CONFIG_IP_NF_MATCH_TTL=m > CONFIG_IP_NF_FILTER=m > CONFIG_IP_NF_TARGET_REJECT=m > CONFIG_IP_NF_TARGET_LOG=m > CONFIG_IP_NF_TARGET_ULOG=m > CONFIG_NF_NAT=m > CONFIG_NF_NAT_NEEDED=y > CONFIG_IP_NF_TARGET_MASQUERADE=m > CONFIG_IP_NF_TARGET_NETMAP=m > CONFIG_IP_NF_TARGET_REDIRECT=m > CONFIG_NF_NAT_SNMP_BASIC=m > # CONFIG_NF_NAT_FTP is not set > # CONFIG_NF_NAT_IRC is not set > # CONFIG_NF_NAT_TFTP is not set > # CONFIG_NF_NAT_AMANDA is not set > # CONFIG_NF_NAT_PPTP is not set > # CONFIG_NF_NAT_H323 is not set > # CONFIG_NF_NAT_SIP is not set > CONFIG_IP_NF_MANGLE=m > # CONFIG_IP_NF_TARGET_CLUSTERIP is not set > CONFIG_IP_NF_TARGET_ECN=m > CONFIG_IP_NF_TARGET_TTL=m > CONFIG_IP_NF_RAW=m > # CONFIG_IP_NF_ARPTABLES is not set > > # > # IPv6: Netfilter Configuration > # > # CONFIG_NF_CONNTRACK_IPV6 is not set > # CONFIG_IP6_NF_QUEUE is not set > # CONFIG_IP6_NF_IPTABLES is not set > # CONFIG_BRIDGE_NF_EBTABLES is not set > # CONFIG_IP_DCCP is not set > # CONFIG_IP_SCTP is not set > # CONFIG_TIPC is not set > # CONFIG_ATM is not set > CONFIG_STP=m > CONFIG_BRIDGE=m > # CONFIG_NET_DSA is not set > CONFIG_VLAN_8021Q=m > # CONFIG_VLAN_8021Q_GVRP is not set > # CONFIG_DECNET is not set > CONFIG_LLC=m > # CONFIG_LLC2 is not set > # CONFIG_IPX is not set > # CONFIG_ATALK is not set > # CONFIG_X25 is not set > # CONFIG_LAPB is not set > # CONFIG_ECONET is not set > # CONFIG_WAN_ROUTER is not set > # CONFIG_NET_SCHED is not set > # CONFIG_DCB is not set > > # > # Network testing > # > # CONFIG_NET_PKTGEN is not set > # CONFIG_HAMRADIO is not set > # CONFIG_CAN is not set > # CONFIG_IRDA is not set > CONFIG_BT=m > CONFIG_BT_L2CAP=m > CONFIG_BT_SCO=m > CONFIG_BT_RFCOMM=m > CONFIG_BT_RFCOMM_TTY=y > CONFIG_BT_BNEP=m > CONFIG_BT_BNEP_MC_FILTER=y > CONFIG_BT_BNEP_PROTO_FILTER=y > CONFIG_BT_HIDP=m > > # > # Bluetooth device drivers > # > # CONFIG_BT_HCIBTUSB is not set > # CONFIG_BT_HCIBTSDIO is not set > CONFIG_BT_HCIUART=m > CONFIG_BT_HCIUART_H4=y > CONFIG_BT_HCIUART_BCSP=y > # CONFIG_BT_HCIUART_LL is not set > CONFIG_BT_HCIBCM203X=m > CONFIG_BT_HCIBPA10X=m > CONFIG_BT_HCIBFUSB=m > CONFIG_BT_HCIVHCI=m > # CONFIG_AF_RXRPC is not set > # CONFIG_PHONET is not set > CONFIG_WIRELESS=y > CONFIG_CFG80211=m > # CONFIG_CFG80211_REG_DEBUG is not set > # CONFIG_NL80211 is not set > CONFIG_WIRELESS_OLD_REGULATORY=y > CONFIG_WIRELESS_EXT=y > CONFIG_WIRELESS_EXT_SYSFS=y > CONFIG_LIB80211=m > # CONFIG_LIB80211_DEBUG is not set > CONFIG_MAC80211=m > > # > # Rate control algorithm selection > # > CONFIG_MAC80211_RC_PID=y > CONFIG_MAC80211_RC_MINSTREL=y > CONFIG_MAC80211_RC_DEFAULT_PID=y > # CONFIG_MAC80211_RC_DEFAULT_MINSTREL is not set > CONFIG_MAC80211_RC_DEFAULT="pid" > # CONFIG_MAC80211_MESH is not set > CONFIG_MAC80211_LEDS=y > # CONFIG_MAC80211_DEBUG_MENU is not set > # CONFIG_WIMAX is not set > CONFIG_RFKILL=y > CONFIG_RFKILL_INPUT=m > CONFIG_RFKILL_LEDS=y > # CONFIG_NET_9P is not set > > # > # Device Drivers > # > > # > # Generic Driver Options > # > CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" > CONFIG_STANDALONE=y > CONFIG_PREVENT_FIRMWARE_BUILD=y > CONFIG_FW_LOADER=m > CONFIG_FIRMWARE_IN_KERNEL=y > CONFIG_EXTRA_FIRMWARE="" > # CONFIG_SYS_HYPERVISOR is not set > CONFIG_CONNECTOR=y > CONFIG_PROC_EVENTS=y > # CONFIG_MTD is not set > # CONFIG_PARPORT is not set > CONFIG_PNP=y > CONFIG_PNP_DEBUG_MESSAGES=y > > # > # Protocols > # > CONFIG_PNPACPI=y > CONFIG_BLK_DEV=y > # CONFIG_BLK_DEV_FD is not set > # CONFIG_BLK_CPQ_DA is not set > # CONFIG_BLK_CPQ_CISS_DA is not set > # CONFIG_BLK_DEV_DAC960 is not set > # CONFIG_BLK_DEV_UMEM is not set > # CONFIG_BLK_DEV_COW_COMMON is not set > CONFIG_BLK_DEV_LOOP=y > # CONFIG_BLK_DEV_CRYPTOLOOP is not set > CONFIG_BLK_DEV_NBD=m > # CONFIG_BLK_DEV_SX8 is not set > # CONFIG_BLK_DEV_UB is not set > CONFIG_BLK_DEV_RAM=y > CONFIG_BLK_DEV_RAM_COUNT=16 > CONFIG_BLK_DEV_RAM_SIZE=4096 > # CONFIG_BLK_DEV_XIP is not set > # CONFIG_CDROM_PKTCDVD is not set > # CONFIG_ATA_OVER_ETH is not set > # CONFIG_BLK_DEV_HD is not set > CONFIG_MISC_DEVICES=y > # CONFIG_IBM_ASM is not set > # CONFIG_PHANTOM is not set > # CONFIG_SGI_IOC4 is not set > CONFIG_TIFM_CORE=m > CONFIG_TIFM_7XX1=m > # CONFIG_ICS932S401 is not set > # CONFIG_ENCLOSURE_SERVICES is not set > # CONFIG_SGI_XP is not set > # CONFIG_HP_ILO is not set > # CONFIG_SGI_GRU is not set > # CONFIG_C2PORT is not set > > # > # EEPROM support > # > # CONFIG_EEPROM_AT24 is not set > # CONFIG_EEPROM_LEGACY is not set > # CONFIG_EEPROM_93CX6 is not set > CONFIG_HAVE_IDE=y > # CONFIG_IDE is not set > > # > # SCSI device support > # > CONFIG_RAID_ATTRS=m > CONFIG_SCSI=y > CONFIG_SCSI_DMA=y > # CONFIG_SCSI_TGT is not set > CONFIG_SCSI_NETLINK=y > CONFIG_SCSI_PROC_FS=y > > # > # SCSI support type (disk, tape, CD-ROM) > # > CONFIG_BLK_DEV_SD=m > # CONFIG_CHR_DEV_ST is not set > # CONFIG_CHR_DEV_OSST is not set > CONFIG_BLK_DEV_SR=m > CONFIG_BLK_DEV_SR_VENDOR=y > CONFIG_CHR_DEV_SG=m > # CONFIG_CHR_DEV_SCH is not set > > # > # Some SCSI devices (e.g. CD jukebox) support multiple LUNs > # > CONFIG_SCSI_MULTI_LUN=y > # CONFIG_SCSI_CONSTANTS is not set > # CONFIG_SCSI_LOGGING is not set > # CONFIG_SCSI_SCAN_ASYNC is not set > CONFIG_SCSI_WAIT_SCAN=m > > # > # SCSI Transports > # > CONFIG_SCSI_SPI_ATTRS=m > CONFIG_SCSI_FC_ATTRS=m > # CONFIG_SCSI_ISCSI_ATTRS is not set > # CONFIG_SCSI_SAS_LIBSAS is not set > # CONFIG_SCSI_SRP_ATTRS is not set > # CONFIG_SCSI_LOWLEVEL is not set > # CONFIG_SCSI_DH is not set > CONFIG_ATA=y > # CONFIG_ATA_NONSTANDARD is not set > # CONFIG_ATA_ACPI is not set > # CONFIG_SATA_PMP is not set > CONFIG_SATA_AHCI=m > # CONFIG_SATA_SIL24 is not set > CONFIG_ATA_SFF=y > # CONFIG_SATA_SVW is not set > CONFIG_ATA_PIIX=m > # CONFIG_SATA_MV is not set > # CONFIG_SATA_NV is not set > # CONFIG_PDC_ADMA is not set > # CONFIG_SATA_QSTOR is not set > # CONFIG_SATA_PROMISE is not set > # CONFIG_SATA_SX4 is not set > # CONFIG_SATA_SIL is not set > # CONFIG_SATA_SIS is not set > # CONFIG_SATA_ULI is not set > # CONFIG_SATA_VIA is not set > # CONFIG_SATA_VITESSE is not set > # CONFIG_SATA_INIC162X is not set > # CONFIG_PATA_ALI is not set > # CONFIG_PATA_AMD is not set > # CONFIG_PATA_ARTOP is not set > # CONFIG_PATA_ATIIXP is not set > # CONFIG_PATA_CMD640_PCI is not set > # CONFIG_PATA_CMD64X is not set > # CONFIG_PATA_CS5520 is not set > # CONFIG_PATA_CS5530 is not set > # CONFIG_PATA_CYPRESS is not set > # CONFIG_PATA_EFAR is not set > # CONFIG_ATA_GENERIC is not set > # CONFIG_PATA_HPT366 is not set > # CONFIG_PATA_HPT37X is not set > # CONFIG_PATA_HPT3X2N is not set > # CONFIG_PATA_HPT3X3 is not set > # CONFIG_PATA_IT821X is not set > # CONFIG_PATA_IT8213 is not set > # CONFIG_PATA_JMICRON is not set > # CONFIG_PATA_TRIFLEX is not set > # CONFIG_PATA_MARVELL is not set > # CONFIG_PATA_MPIIX is not set > # CONFIG_PATA_OLDPIIX is not set > # CONFIG_PATA_NETCELL is not set > # CONFIG_PATA_NINJA32 is not set > # CONFIG_PATA_NS87410 is not set > # CONFIG_PATA_NS87415 is not set > # CONFIG_PATA_OPTI is not set > # CONFIG_PATA_OPTIDMA is not set > # CONFIG_PATA_PDC_OLD is not set > # CONFIG_PATA_RADISYS is not set > # CONFIG_PATA_RZ1000 is not set > # CONFIG_PATA_SC1200 is not set > # CONFIG_PATA_SERVERWORKS is not set > # CONFIG_PATA_PDC2027X is not set > # CONFIG_PATA_SIL680 is not set > # CONFIG_PATA_SIS is not set > # CONFIG_PATA_VIA is not set > # CONFIG_PATA_WINBOND is not set > # CONFIG_PATA_PLATFORM is not set > # CONFIG_PATA_SCH is not set > CONFIG_MD=y > # CONFIG_BLK_DEV_MD is not set > CONFIG_BLK_DEV_DM=y > # CONFIG_DM_DEBUG is not set > CONFIG_DM_CRYPT=y > CONFIG_DM_SNAPSHOT=m > CONFIG_DM_MIRROR=m > # CONFIG_DM_ZERO is not set > # CONFIG_DM_MULTIPATH is not set > # CONFIG_DM_DELAY is not set > # CONFIG_DM_UEVENT is not set > # CONFIG_BLK_DEV_DM_BBR is not set > # CONFIG_FUSION is not set > > # > # IEEE 1394 (FireWire) support > # > > # > # Enable only one of the two stacks, unless you know what you are doing > # > # CONFIG_FIREWIRE is not set > CONFIG_IEEE1394=m > CONFIG_IEEE1394_OHCI1394=m > # CONFIG_IEEE1394_PCILYNX is not set > # CONFIG_IEEE1394_SBP2 is not set > # CONFIG_IEEE1394_ETH1394_ROM_ENTRY is not set > # CONFIG_IEEE1394_ETH1394 is not set > # CONFIG_IEEE1394_RAWIO is not set > # CONFIG_IEEE1394_VIDEO1394 is not set > # CONFIG_IEEE1394_DV1394 is not set > # CONFIG_IEEE1394_VERBOSEDEBUG is not set > # CONFIG_I2O is not set > # CONFIG_MACINTOSH_DRIVERS is not set > CONFIG_NETDEVICES=y > # CONFIG_DUMMY is not set > # CONFIG_BONDING is not set > # CONFIG_MACVLAN is not set > # CONFIG_EQUALIZER is not set > # CONFIG_TUN is not set > # CONFIG_VETH is not set > # CONFIG_NET_SB1000 is not set > # CONFIG_ARCNET is not set > # CONFIG_NET_ETHERNET is not set > CONFIG_MII=m > CONFIG_NETDEV_1000=y > # CONFIG_ACENIC is not set > # CONFIG_DL2K is not set > # CONFIG_E1000 is not set > # CONFIG_E1000E is not set > # CONFIG_IP1000 is not set > # CONFIG_IGB is not set > # CONFIG_NS83820 is not set > # CONFIG_HAMACHI is not set > # CONFIG_YELLOWFIN is not set > CONFIG_R8169=m > CONFIG_R8169_VLAN=y > # CONFIG_SIS190 is not set > # CONFIG_SKGE is not set > # CONFIG_SKY2 is not set > # CONFIG_VIA_VELOCITY is not set > # CONFIG_TIGON3 is not set > # CONFIG_BNX2 is not set > # CONFIG_QLA3XXX is not set > # CONFIG_ATL1 is not set > # CONFIG_ATL1E is not set > # CONFIG_ATL1C is not set > # CONFIG_JME is not set > # CONFIG_NETDEV_10000 is not set > # CONFIG_TR is not set > > # > # Wireless LAN > # > # CONFIG_WLAN_PRE80211 is not set > CONFIG_WLAN_80211=y > # CONFIG_LIBERTAS is not set > # CONFIG_LIBERTAS_THINFIRM is not set > # CONFIG_AIRO is not set > # CONFIG_HERMES is not set > # CONFIG_ATMEL is not set > # CONFIG_PRISM54 is not set > # CONFIG_USB_ZD1201 is not set > # CONFIG_USB_NET_RNDIS_WLAN is not set > # CONFIG_RTL8180 is not set > # CONFIG_RTL8187 is not set > # CONFIG_ADM8211 is not set > # CONFIG_MAC80211_HWSIM is not set > # CONFIG_P54_COMMON is not set > # CONFIG_ATH5K is not set > # CONFIG_ATH9K is not set > # CONFIG_IPW2100 is not set > # CONFIG_IPW2200 is not set > CONFIG_IWLWIFI=m > CONFIG_IWLCORE=m > CONFIG_IWLWIFI_LEDS=y > CONFIG_IWLWIFI_RFKILL=y > # CONFIG_IWLWIFI_DEBUG is not set > CONFIG_IWLAGN=m > CONFIG_IWLAGN_SPECTRUM_MEASUREMENT=y > CONFIG_IWLAGN_LEDS=y > # CONFIG_IWL4965 is not set > CONFIG_IWL5000=y > # CONFIG_IWL3945 is not set > # CONFIG_HOSTAP is not set > # CONFIG_B43 is not set > # CONFIG_B43LEGACY is not set > # CONFIG_ZD1211RW is not set > # CONFIG_RT2X00 is not set > > # > # Enable WiMAX (Networking options) to see the WiMAX drivers > # > > # > # USB Network Adapters > # > # CONFIG_USB_CATC is not set > # CONFIG_USB_KAWETH is not set > # CONFIG_USB_PEGASUS is not set > # CONFIG_USB_RTL8150 is not set > # CONFIG_USB_USBNET is not set > # CONFIG_USB_HSO is not set > # CONFIG_WAN is not set > # CONFIG_FDDI is not set > # CONFIG_HIPPI is not set > CONFIG_PPP=m > # CONFIG_PPP_MULTILINK is not set > CONFIG_PPP_FILTER=y > CONFIG_PPP_ASYNC=m > # CONFIG_PPP_SYNC_TTY is not set > CONFIG_PPP_DEFLATE=m > CONFIG_PPP_BSDCOMP=m > # CONFIG_PPP_MPPE is not set > CONFIG_PPPOE=m > # CONFIG_PPPOL2TP is not set > CONFIG_SLIP=m > CONFIG_SLIP_COMPRESSED=y > CONFIG_SLHC=m > CONFIG_SLIP_SMART=y > CONFIG_SLIP_MODE_SLIP6=y > # CONFIG_NET_FC is not set > # CONFIG_NETCONSOLE is not set > # CONFIG_NETPOLL is not set > # CONFIG_NET_POLL_CONTROLLER is not set > # CONFIG_ISDN is not set > # CONFIG_PHONE is not set > > # > # Input device support > # > CONFIG_INPUT=y > # CONFIG_INPUT_FF_MEMLESS is not set > CONFIG_INPUT_POLLDEV=m > > # > # Userland interfaces > # > CONFIG_INPUT_MOUSEDEV=y > CONFIG_INPUT_MOUSEDEV_PSAUX=y > CONFIG_INPUT_MOUSEDEV_SCREEN_X=1280 > CONFIG_INPUT_MOUSEDEV_SCREEN_Y=800 > # CONFIG_INPUT_JOYDEV is not set > CONFIG_INPUT_EVDEV=m > # CONFIG_INPUT_EVBUG is not set > > # > # Input Device Drivers > # > CONFIG_INPUT_KEYBOARD=y > CONFIG_KEYBOARD_ATKBD=y > CONFIG_KEYBOARD_SUNKBD=m > CONFIG_KEYBOARD_LKKBD=m > CONFIG_KEYBOARD_XTKBD=m > CONFIG_KEYBOARD_NEWTON=m > # CONFIG_KEYBOARD_STOWAWAY is not set > CONFIG_INPUT_MOUSE=y > CONFIG_MOUSE_PS2=m > # CONFIG_MOUSE_PS2_ALPS is not set > CONFIG_MOUSE_PS2_LOGIPS2PP=y > CONFIG_MOUSE_PS2_SYNAPTICS=y > # CONFIG_MOUSE_PS2_LIFEBOOK is not set > # CONFIG_MOUSE_PS2_TRACKPOINT is not set > # CONFIG_MOUSE_PS2_ELANTECH is not set > # CONFIG_MOUSE_PS2_TOUCHKIT is not set > # CONFIG_MOUSE_SERIAL is not set > # CONFIG_MOUSE_APPLETOUCH is not set > # CONFIG_MOUSE_BCM5974 is not set > # CONFIG_MOUSE_VSXXXAA is not set > # CONFIG_INPUT_JOYSTICK is not set > # CONFIG_INPUT_TABLET is not set > # CONFIG_INPUT_TOUCHSCREEN is not set > CONFIG_INPUT_MISC=y > CONFIG_INPUT_PCSPKR=m > # CONFIG_INPUT_APANEL is not set > # CONFIG_INPUT_ATLAS_BTNS is not set > # CONFIG_INPUT_ATI_REMOTE is not set > # CONFIG_INPUT_ATI_REMOTE2 is not set > # CONFIG_INPUT_KEYSPAN_REMOTE is not set > # CONFIG_INPUT_POWERMATE is not set > # CONFIG_INPUT_YEALINK is not set > # CONFIG_INPUT_CM109 is not set > CONFIG_INPUT_UINPUT=m > > # > # Hardware I/O ports > # > CONFIG_SERIO=y > CONFIG_SERIO_I8042=y > CONFIG_SERIO_SERPORT=m > CONFIG_SERIO_CT82C710=m > # CONFIG_SERIO_PCIPS2 is not set > CONFIG_SERIO_LIBPS2=y > # CONFIG_SERIO_RAW is not set > # CONFIG_GAMEPORT is not set > > # > # Character devices > # > CONFIG_VT=y > CONFIG_CONSOLE_TRANSLATIONS=y > CONFIG_VT_CONSOLE=y > CONFIG_HW_CONSOLE=y > # CONFIG_VT_HW_CONSOLE_BINDING is not set > CONFIG_DEVKMEM=y > # CONFIG_SERIAL_NONSTANDARD is not set > # CONFIG_NOZOMI is not set > > # > # Serial drivers > # > CONFIG_SERIAL_8250=y > CONFIG_SERIAL_8250_CONSOLE=y > CONFIG_FIX_EARLYCON_MEM=y > CONFIG_SERIAL_8250_PCI=y > CONFIG_SERIAL_8250_PNP=y > CONFIG_SERIAL_8250_NR_UARTS=4 > CONFIG_SERIAL_8250_RUNTIME_UARTS=4 > CONFIG_SERIAL_8250_EXTENDED=y > CONFIG_SERIAL_8250_MANY_PORTS=y > CONFIG_SERIAL_8250_SHARE_IRQ=y > # CONFIG_SERIAL_8250_DETECT_IRQ is not set > CONFIG_SERIAL_8250_RSA=y > > # > # Non-8250 serial port support > # > CONFIG_SERIAL_CORE=y > CONFIG_SERIAL_CORE_CONSOLE=y > # CONFIG_SERIAL_JSM is not set > CONFIG_UNIX98_PTYS=y > # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set > # CONFIG_LEGACY_PTYS is not set > # CONFIG_IPMI_HANDLER is not set > CONFIG_HW_RANDOM=m > CONFIG_HW_RANDOM_INTEL=m > # CONFIG_HW_RANDOM_AMD is not set > CONFIG_NVRAM=m > # CONFIG_R3964 is not set > # CONFIG_APPLICOM is not set > # CONFIG_MWAVE is not set > # CONFIG_PC8736x_GPIO is not set > # CONFIG_RAW_DRIVER is not set > # CONFIG_HPET is not set > # CONFIG_HANGCHECK_TIMER is not set > # CONFIG_TCG_TPM is not set > # CONFIG_TELCLOCK is not set > CONFIG_DEVPORT=y > CONFIG_I2C=y > CONFIG_I2C_BOARDINFO=y > CONFIG_I2C_CHARDEV=m > CONFIG_I2C_HELPER_AUTO=y > CONFIG_I2C_ALGOBIT=m > > # > # I2C Hardware Bus support > # > > # > # PC SMBus host controller drivers > # > # CONFIG_I2C_ALI1535 is not set > # CONFIG_I2C_ALI1563 is not set > # CONFIG_I2C_ALI15X3 is not set > # CONFIG_I2C_AMD756 is not set > # CONFIG_I2C_AMD8111 is not set > CONFIG_I2C_I801=m > # CONFIG_I2C_ISCH is not set > # CONFIG_I2C_PIIX4 is not set > # CONFIG_I2C_NFORCE2 is not set > # CONFIG_I2C_SIS5595 is not set > # CONFIG_I2C_SIS630 is not set > # CONFIG_I2C_SIS96X is not set > # CONFIG_I2C_VIA is not set > # CONFIG_I2C_VIAPRO is not set > > # > # I2C system bus drivers (mostly embedded / system-on-chip) > # > # CONFIG_I2C_OCORES is not set > # CONFIG_I2C_SIMTEC is not set > > # > # External I2C/SMBus adapter drivers > # > # CONFIG_I2C_PARPORT_LIGHT is not set > # CONFIG_I2C_TAOS_EVM is not set > # CONFIG_I2C_TINY_USB is not set > > # > # Graphics adapter I2C/DDC channel drivers > # > # CONFIG_I2C_VOODOO3 is not set > > # > # Other I2C/SMBus bus drivers > # > # CONFIG_I2C_PCA_PLATFORM is not set > # CONFIG_I2C_STUB is not set > > # > # Miscellaneous I2C Chip support > # > # CONFIG_DS1682 is not set > # CONFIG_SENSORS_PCF8574 is not set > # CONFIG_PCF8575 is not set > # CONFIG_SENSORS_PCA9539 is not set > # CONFIG_SENSORS_PCF8591 is not set > # CONFIG_SENSORS_MAX6875 is not set > # CONFIG_SENSORS_TSL2550 is not set > # CONFIG_I2C_DEBUG_CORE is not set > # CONFIG_I2C_DEBUG_ALGO is not set > # CONFIG_I2C_DEBUG_BUS is not set > # CONFIG_I2C_DEBUG_CHIP is not set > # CONFIG_SPI is not set > CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y > # CONFIG_GPIOLIB is not set > # CONFIG_W1 is not set > CONFIG_POWER_SUPPLY=y > # CONFIG_POWER_SUPPLY_DEBUG is not set > # CONFIG_PDA_POWER is not set > # CONFIG_BATTERY_DS2760 is not set > # CONFIG_BATTERY_BQ27x00 is not set > CONFIG_HWMON=m > # CONFIG_HWMON_VID is not set > # CONFIG_SENSORS_ABITUGURU is not set > # CONFIG_SENSORS_ABITUGURU3 is not set > # CONFIG_SENSORS_AD7414 is not set > # CONFIG_SENSORS_AD7418 is not set > # CONFIG_SENSORS_ADM1021 is not set > # CONFIG_SENSORS_ADM1025 is not set > # CONFIG_SENSORS_ADM1026 is not set > # CONFIG_SENSORS_ADM1029 is not set > # CONFIG_SENSORS_ADM1031 is not set > # CONFIG_SENSORS_ADM9240 is not set > # CONFIG_SENSORS_ADT7462 is not set > # CONFIG_SENSORS_ADT7470 is not set > # CONFIG_SENSORS_ADT7473 is not set > # CONFIG_SENSORS_ADT7475 is not set > # CONFIG_SENSORS_K8TEMP is not set > # CONFIG_SENSORS_ASB100 is not set > # CONFIG_SENSORS_ATXP1 is not set > # CONFIG_SENSORS_DS1621 is not set > # CONFIG_SENSORS_I5K_AMB is not set > # CONFIG_SENSORS_F71805F is not set > # CONFIG_SENSORS_F71882FG is not set > # CONFIG_SENSORS_F75375S is not set > # CONFIG_SENSORS_FSCHER is not set > # CONFIG_SENSORS_FSCPOS is not set > # CONFIG_SENSORS_FSCHMD is not set > # CONFIG_SENSORS_GL518SM is not set > # CONFIG_SENSORS_GL520SM is not set > CONFIG_SENSORS_CORETEMP=m > # CONFIG_SENSORS_IT87 is not set > # CONFIG_SENSORS_LM63 is not set > # CONFIG_SENSORS_LM75 is not set > # CONFIG_SENSORS_LM77 is not set > # CONFIG_SENSORS_LM78 is not set > # CONFIG_SENSORS_LM80 is not set > # CONFIG_SENSORS_LM83 is not set > # CONFIG_SENSORS_LM85 is not set > # CONFIG_SENSORS_LM87 is not set > # CONFIG_SENSORS_LM90 is not set > # CONFIG_SENSORS_LM92 is not set > # CONFIG_SENSORS_LM93 is not set > # CONFIG_SENSORS_LTC4245 is not set > # CONFIG_SENSORS_MAX1619 is not set > # CONFIG_SENSORS_MAX6650 is not set > # CONFIG_SENSORS_PC87360 is not set > # CONFIG_SENSORS_PC87427 is not set > # CONFIG_SENSORS_SIS5595 is not set > # CONFIG_SENSORS_DME1737 is not set > # CONFIG_SENSORS_SMSC47M1 is not set > # CONFIG_SENSORS_SMSC47M192 is not set > # CONFIG_SENSORS_SMSC47B397 is not set > # CONFIG_SENSORS_ADS7828 is not set > # CONFIG_SENSORS_THMC50 is not set > # CONFIG_SENSORS_VIA686A is not set > # CONFIG_SENSORS_VT1211 is not set > # CONFIG_SENSORS_VT8231 is not set > # CONFIG_SENSORS_W83781D is not set > # CONFIG_SENSORS_W83791D is not set > # CONFIG_SENSORS_W83792D is not set > # CONFIG_SENSORS_W83793 is not set > # CONFIG_SENSORS_W83L785TS is not set > # CONFIG_SENSORS_W83L786NG is not set > # CONFIG_SENSORS_W83627HF is not set > # CONFIG_SENSORS_W83627EHF is not set > # CONFIG_SENSORS_HDAPS is not set > # CONFIG_SENSORS_LIS3LV02D is not set > # CONFIG_SENSORS_APPLESMC is not set > # CONFIG_HWMON_DEBUG_CHIP is not set > CONFIG_THERMAL=y > # CONFIG_WATCHDOG is not set > CONFIG_SSB_POSSIBLE=y > > # > # Sonics Silicon Backplane > # > # CONFIG_SSB is not set > > # > # Multifunction device drivers > # > # CONFIG_MFD_CORE is not set > # CONFIG_MFD_SM501 is not set > # CONFIG_HTC_PASIC3 is not set > # CONFIG_TWL4030_CORE is not set > # CONFIG_MFD_TMIO is not set > # CONFIG_PMIC_DA903X is not set > # CONFIG_MFD_WM8400 is not set > # CONFIG_MFD_WM8350_I2C is not set > # CONFIG_MFD_PCF50633 is not set > # CONFIG_REGULATOR is not set > > # > # Multimedia devices > # > > # > # Multimedia core support > # > CONFIG_VIDEO_DEV=m > CONFIG_VIDEO_V4L2_COMMON=m > # CONFIG_VIDEO_ALLOW_V4L1 is not set > CONFIG_VIDEO_V4L1_COMPAT=y > # CONFIG_DVB_CORE is not set > CONFIG_VIDEO_MEDIA=m > > # > # Multimedia drivers > # > # CONFIG_MEDIA_ATTACH is not set > CONFIG_MEDIA_TUNER=m > # CONFIG_MEDIA_TUNER_CUSTOMIZE is not set > CONFIG_MEDIA_TUNER_SIMPLE=m > CONFIG_MEDIA_TUNER_TDA8290=m > CONFIG_MEDIA_TUNER_TDA9887=m > CONFIG_MEDIA_TUNER_TEA5761=m > CONFIG_MEDIA_TUNER_TEA5767=m > CONFIG_MEDIA_TUNER_MT20XX=m > CONFIG_MEDIA_TUNER_XC2028=m > CONFIG_MEDIA_TUNER_XC5000=m > CONFIG_VIDEO_V4L2=m > CONFIG_VIDEO_CAPTURE_DRIVERS=y > # CONFIG_VIDEO_ADV_DEBUG is not set > # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set > CONFIG_VIDEO_HELPER_CHIPS_AUTO=y > # CONFIG_VIDEO_VIVI is not set > # CONFIG_VIDEO_BT848 is not set > # CONFIG_VIDEO_SAA5246A is not set > # CONFIG_VIDEO_SAA5249 is not set > # CONFIG_VIDEO_SAA7134 is not set > # CONFIG_VIDEO_HEXIUM_ORION is not set > # CONFIG_VIDEO_HEXIUM_GEMINI is not set > # CONFIG_VIDEO_CX88 is not set > # CONFIG_VIDEO_IVTV is not set > # CONFIG_VIDEO_CAFE_CCIC is not set > # CONFIG_SOC_CAMERA is not set > CONFIG_V4L_USB_DRIVERS=y > CONFIG_USB_VIDEO_CLASS=m > CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y > # CONFIG_USB_GSPCA is not set > # CONFIG_VIDEO_PVRUSB2 is not set > # CONFIG_VIDEO_EM28XX is not set > # CONFIG_VIDEO_USBVISION is not set > # CONFIG_USB_ET61X251 is not set > # CONFIG_USB_SN9C102 is not set > # CONFIG_USB_ZC0301 is not set > # CONFIG_USB_ZR364XX is not set > # CONFIG_USB_STKWEBCAM is not set > # CONFIG_USB_S2255 is not set > # CONFIG_RADIO_ADAPTERS is not set > # CONFIG_DAB is not set > > # > # Graphics support > # > CONFIG_AGP=y > CONFIG_AGP_AMD64=y > CONFIG_AGP_INTEL=m > # CONFIG_AGP_SIS is not set > # CONFIG_AGP_VIA is not set > CONFIG_DRM=m > # CONFIG_DRM_TDFX is not set > # CONFIG_DRM_R128 is not set > # CONFIG_DRM_RADEON is not set > # CONFIG_DRM_I810 is not set > # CONFIG_DRM_I830 is not set > CONFIG_DRM_I915=m > # CONFIG_DRM_I915_KMS is not set > # CONFIG_DRM_MGA is not set > # CONFIG_DRM_SIS is not set > # CONFIG_DRM_VIA is not set > # CONFIG_DRM_SAVAGE is not set > # CONFIG_VGASTATE is not set > CONFIG_VIDEO_OUTPUT_CONTROL=m > CONFIG_FB=y > CONFIG_FIRMWARE_EDID=y > # CONFIG_FB_DDC is not set > # CONFIG_FB_BOOT_VESA_SUPPORT is not set > CONFIG_FB_CFB_FILLRECT=y > CONFIG_FB_CFB_COPYAREA=y > CONFIG_FB_CFB_IMAGEBLIT=y > # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set > # CONFIG_FB_SYS_FILLRECT is not set > # CONFIG_FB_SYS_COPYAREA is not set > # CONFIG_FB_SYS_IMAGEBLIT is not set > # CONFIG_FB_FOREIGN_ENDIAN is not set > # CONFIG_FB_SYS_FOPS is not set > # CONFIG_FB_SVGALIB is not set > # CONFIG_FB_MACMODES is not set > # CONFIG_FB_BACKLIGHT is not set > CONFIG_FB_MODE_HELPERS=y > # CONFIG_FB_TILEBLITTING is not set > > # > # Frame buffer hardware drivers > # > # CONFIG_FB_CIRRUS is not set > # CONFIG_FB_PM2 is not set > # CONFIG_FB_CYBER2000 is not set > # CONFIG_FB_ARC is not set > # CONFIG_FB_ASILIANT is not set > # CONFIG_FB_IMSTT is not set > # CONFIG_FB_VGA16 is not set > CONFIG_FB_UVESA=y > # CONFIG_FB_VESA is not set > # CONFIG_FB_N411 is not set > # CONFIG_FB_HGA is not set > # CONFIG_FB_S1D13XXX is not set > # CONFIG_FB_NVIDIA is not set > # CONFIG_FB_RIVA is not set > # CONFIG_FB_LE80578 is not set > # CONFIG_FB_INTEL is not set > # CONFIG_FB_MATROX is not set > # CONFIG_FB_RADEON is not set > # CONFIG_FB_ATY128 is not set > # CONFIG_FB_ATY is not set > # CONFIG_FB_S3 is not set > # CONFIG_FB_SAVAGE is not set > # CONFIG_FB_SIS is not set > # CONFIG_FB_VIA is not set > # CONFIG_FB_NEOMAGIC is not set > # CONFIG_FB_KYRO is not set > # CONFIG_FB_3DFX is not set > # CONFIG_FB_VOODOO1 is not set > # CONFIG_FB_VT8623 is not set > # CONFIG_FB_TRIDENT is not set > # CONFIG_FB_ARK is not set > # CONFIG_FB_PM3 is not set > # CONFIG_FB_CARMINE is not set > # CONFIG_FB_GEODE is not set > # CONFIG_FB_VIRTUAL is not set > # CONFIG_FB_METRONOME is not set > # CONFIG_FB_MB862XX is not set > CONFIG_BACKLIGHT_LCD_SUPPORT=y > CONFIG_LCD_CLASS_DEVICE=y > # CONFIG_LCD_ILI9320 is not set > # CONFIG_LCD_PLATFORM is not set > CONFIG_BACKLIGHT_CLASS_DEVICE=y > CONFIG_BACKLIGHT_GENERIC=y > # CONFIG_BACKLIGHT_PROGEAR is not set > # CONFIG_BACKLIGHT_MBP_NVIDIA is not set > # CONFIG_BACKLIGHT_SAHARA is not set > > # > # Display device support > # > CONFIG_DISPLAY_SUPPORT=m > > # > # Display hardware drivers > # > > # > # Console display driver support > # > CONFIG_VGA_CONSOLE=y > # CONFIG_VGACON_SOFT_SCROLLBACK is not set > CONFIG_DUMMY_CONSOLE=y > CONFIG_FRAMEBUFFER_CONSOLE=y > # CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set > # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set > CONFIG_FB_CON_DECOR=y > # CONFIG_FONTS is not set > CONFIG_FONT_8x8=y > CONFIG_FONT_8x16=y > # CONFIG_LOGO is not set > CONFIG_SOUND=y > # CONFIG_SOUND_OSS_CORE is not set > # CONFIG_SND is not set > # CONFIG_SOUND_PRIME is not set > CONFIG_HID_SUPPORT=y > CONFIG_HID=y > # CONFIG_HID_DEBUG is not set > # CONFIG_HIDRAW is not set > > # > # USB Input Devices > # > CONFIG_USB_HID=m > # CONFIG_HID_PID is not set > CONFIG_USB_HIDDEV=y > > # > # USB HID Boot Protocol drivers > # > # CONFIG_USB_KBD is not set > # CONFIG_USB_MOUSE is not set > > # > # Special HID drivers > # > CONFIG_HID_COMPAT=y > # CONFIG_HID_A4TECH is not set > # CONFIG_HID_APPLE is not set > # CONFIG_HID_BELKIN is not set > # CONFIG_HID_CHERRY is not set > # CONFIG_HID_CHICONY is not set > # CONFIG_HID_CYPRESS is not set > # CONFIG_HID_EZKEY is not set > # CONFIG_HID_GYRATION is not set > # CONFIG_HID_LOGITECH is not set > # CONFIG_HID_MICROSOFT is not set > # CONFIG_HID_MONTEREY is not set > # CONFIG_HID_NTRIG is not set > # CONFIG_HID_PANTHERLORD is not set > # CONFIG_HID_PETALYNX is not set > # CONFIG_HID_SAMSUNG is not set > # CONFIG_HID_SONY is not set > # CONFIG_HID_SUNPLUS is not set > # CONFIG_GREENASIA_FF is not set > # CONFIG_HID_TOPSEED is not set > # CONFIG_THRUSTMASTER_FF is not set > # CONFIG_ZEROPLUS_FF is not set > CONFIG_USB_SUPPORT=y > CONFIG_USB_ARCH_HAS_HCD=y > CONFIG_USB_ARCH_HAS_OHCI=y > CONFIG_USB_ARCH_HAS_EHCI=y > CONFIG_USB=m > # CONFIG_USB_DEBUG is not set > # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set > > # > # Miscellaneous USB options > # > CONFIG_USB_DEVICEFS=y > CONFIG_USB_DEVICE_CLASS=y > # CONFIG_USB_DYNAMIC_MINORS is not set > # CONFIG_USB_SUSPEND is not set > # CONFIG_USB_OTG is not set > # CONFIG_USB_OTG_WHITELIST is not set > # CONFIG_USB_OTG_BLACKLIST_HUB is not set > # CONFIG_USB_MON is not set > # CONFIG_USB_WUSB is not set > # CONFIG_USB_WUSB_CBAF is not set > > # > # USB Host Controller Drivers > # > # CONFIG_USB_C67X00_HCD is not set > CONFIG_USB_EHCI_HCD=m > # CONFIG_USB_EHCI_ROOT_HUB_TT is not set > # CONFIG_USB_EHCI_TT_NEWSCHED is not set > # CONFIG_USB_OXU210HP_HCD is not set > CONFIG_USB_ISP116X_HCD=m > # CONFIG_USB_ISP1760_HCD is not set > CONFIG_USB_OHCI_HCD=m > # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set > # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set > CONFIG_USB_OHCI_LITTLE_ENDIAN=y > CONFIG_USB_UHCI_HCD=m > CONFIG_USB_SL811_HCD=m > # CONFIG_USB_R8A66597_HCD is not set > # CONFIG_USB_WHCI_HCD is not set > # CONFIG_USB_HWA_HCD is not set > > # > # Enable Host or Gadget support to see Inventra options > # > > # > # USB Device Class drivers > # > # CONFIG_USB_ACM is not set > # CONFIG_USB_PRINTER is not set > # CONFIG_USB_WDM is not set > # CONFIG_USB_TMC is not set > > # > # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; > # > > # > # see USB_STORAGE Help for more information > # > CONFIG_USB_STORAGE=m > # CONFIG_USB_STORAGE_DEBUG is not set > # CONFIG_USB_STORAGE_DATAFAB is not set > CONFIG_USB_STORAGE_FREECOM=y > # CONFIG_USB_STORAGE_ISD200 is not set > # CONFIG_USB_STORAGE_USBAT is not set > # CONFIG_USB_STORAGE_SDDR09 is not set > # CONFIG_USB_STORAGE_SDDR55 is not set > # CONFIG_USB_STORAGE_JUMPSHOT is not set > # CONFIG_USB_STORAGE_ALAUDA is not set > # CONFIG_USB_STORAGE_ONETOUCH is not set > # CONFIG_USB_STORAGE_KARMA is not set > # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set > # CONFIG_USB_LIBUSUAL is not set > > # > # USB Imaging devices > # > # CONFIG_USB_MDC800 is not set > # CONFIG_USB_MICROTEK is not set > > # > # USB port drivers > # > CONFIG_USB_SERIAL=m > CONFIG_USB_EZUSB=y > CONFIG_USB_SERIAL_GENERIC=y > # CONFIG_USB_SERIAL_AIRCABLE is not set > # CONFIG_USB_SERIAL_ARK3116 is not set > # CONFIG_USB_SERIAL_BELKIN is not set > # CONFIG_USB_SERIAL_CH341 is not set > CONFIG_USB_SERIAL_WHITEHEAT=m > # CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set > # CONFIG_USB_SERIAL_CP2101 is not set > # CONFIG_USB_SERIAL_CYPRESS_M8 is not set > # CONFIG_USB_SERIAL_EMPEG is not set > # CONFIG_USB_SERIAL_FTDI_SIO is not set > CONFIG_USB_SERIAL_FUNSOFT=m > # CONFIG_USB_SERIAL_VISOR is not set > # CONFIG_USB_SERIAL_IPAQ is not set > # CONFIG_USB_SERIAL_IR is not set > # CONFIG_USB_SERIAL_EDGEPORT is not set > # CONFIG_USB_SERIAL_EDGEPORT_TI is not set > # CONFIG_USB_SERIAL_GARMIN is not set > # CONFIG_USB_SERIAL_IPW is not set > # CONFIG_USB_SERIAL_IUU is not set > # CONFIG_USB_SERIAL_KEYSPAN_PDA is not set > # CONFIG_USB_SERIAL_KEYSPAN is not set > # CONFIG_USB_SERIAL_KLSI is not set > # CONFIG_USB_SERIAL_KOBIL_SCT is not set > # CONFIG_USB_SERIAL_MCT_U232 is not set > # CONFIG_USB_SERIAL_MOS7720 is not set > # CONFIG_USB_SERIAL_MOS7840 is not set > # CONFIG_USB_SERIAL_MOTOROLA is not set > CONFIG_USB_SERIAL_NAVMAN=m > # CONFIG_USB_SERIAL_PL2303 is not set > # CONFIG_USB_SERIAL_OTI6858 is not set > # CONFIG_USB_SERIAL_SPCP8X5 is not set > # CONFIG_USB_SERIAL_HP4X is not set > # CONFIG_USB_SERIAL_SAFE is not set > # CONFIG_USB_SERIAL_SIEMENS_MPI is not set > # CONFIG_USB_SERIAL_SIERRAWIRELESS is not set > # CONFIG_USB_SERIAL_TI is not set > # CONFIG_USB_SERIAL_CYBERJACK is not set > # CONFIG_USB_SERIAL_XIRCOM is not set > CONFIG_USB_SERIAL_OPTION=m > # CONFIG_USB_SERIAL_OMNINET is not set > # CONFIG_USB_SERIAL_OPTICON is not set > # CONFIG_USB_SERIAL_DEBUG is not set > > # > # USB Miscellaneous drivers > # > # CONFIG_USB_EMI62 is not set > # CONFIG_USB_EMI26 is not set > # CONFIG_USB_ADUTUX is not set > # CONFIG_USB_SEVSEG is not set > # CONFIG_USB_RIO500 is not set > # CONFIG_USB_LEGOTOWER is not set > # CONFIG_USB_LCD is not set > CONFIG_USB_BERRY_CHARGE=m > # CONFIG_USB_LED is not set > # CONFIG_USB_CYPRESS_CY7C63 is not set > # CONFIG_USB_CYTHERM is not set > # CONFIG_USB_PHIDGET is not set > # CONFIG_USB_IDMOUSE is not set > # CONFIG_USB_FTDI_ELAN is not set > # CONFIG_USB_APPLEDISPLAY is not set > # CONFIG_USB_SISUSBVGA is not set > # CONFIG_USB_LD is not set > # CONFIG_USB_TRANCEVIBRATOR is not set > # CONFIG_USB_IOWARRIOR is not set > # CONFIG_USB_TEST is not set > # CONFIG_USB_ISIGHTFW is not set > # CONFIG_USB_VST is not set > # CONFIG_USB_GADGET is not set > > # > # OTG and related infrastructure > # > # CONFIG_UWB is not set > CONFIG_MMC=m > # CONFIG_MMC_DEBUG is not set > # CONFIG_MMC_UNSAFE_RESUME is not set > > # > # MMC/SD/SDIO Card Drivers > # > CONFIG_MMC_BLOCK=m > CONFIG_MMC_BLOCK_BOUNCE=y > # CONFIG_SDIO_UART is not set > # CONFIG_MMC_TEST is not set > > # > # MMC/SD/SDIO Host Controller Drivers > # > CONFIG_MMC_SDHCI=m > # CONFIG_MMC_SDHCI_PCI is not set > # CONFIG_MMC_WBSD is not set > CONFIG_MMC_TIFM_SD=m > # CONFIG_MEMSTICK is not set > CONFIG_NEW_LEDS=y > CONFIG_LEDS_CLASS=y > > # > # LED drivers > # > # CONFIG_LEDS_ALIX2 is not set > # CONFIG_LEDS_PCA9532 is not set > # CONFIG_LEDS_CLEVO_MAIL is not set > # CONFIG_LEDS_PCA955X is not set > > # > # LED Triggers > # > CONFIG_LEDS_TRIGGERS=y > CONFIG_LEDS_TRIGGER_TIMER=y > CONFIG_LEDS_TRIGGER_HEARTBEAT=y > # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set > # CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set > # CONFIG_ACCESSIBILITY is not set > # CONFIG_INFINIBAND is not set > # CONFIG_EDAC is not set > CONFIG_RTC_LIB=m > CONFIG_RTC_CLASS=m > > # > # RTC interfaces > # > CONFIG_RTC_INTF_SYSFS=y > CONFIG_RTC_INTF_PROC=y > # CONFIG_RTC_INTF_DEV is not set > # CONFIG_RTC_DRV_TEST is not set > > # > # I2C RTC drivers > # > # CONFIG_RTC_DRV_DS1307 is not set > # CONFIG_RTC_DRV_DS1374 is not set > # CONFIG_RTC_DRV_DS1672 is not set > # CONFIG_RTC_DRV_MAX6900 is not set > # CONFIG_RTC_DRV_RS5C372 is not set > # CONFIG_RTC_DRV_ISL1208 is not set > # CONFIG_RTC_DRV_X1205 is not set > # CONFIG_RTC_DRV_PCF8563 is not set > # CONFIG_RTC_DRV_PCF8583 is not set > # CONFIG_RTC_DRV_M41T80 is not set > # CONFIG_RTC_DRV_S35390A is not set > # CONFIG_RTC_DRV_FM3130 is not set > # CONFIG_RTC_DRV_RX8581 is not set > > # > # SPI RTC drivers > # > > # > # Platform RTC drivers > # > CONFIG_RTC_DRV_CMOS=m > # CONFIG_RTC_DRV_DS1286 is not set > # CONFIG_RTC_DRV_DS1511 is not set > # CONFIG_RTC_DRV_DS1553 is not set > # CONFIG_RTC_DRV_DS1742 is not set > # CONFIG_RTC_DRV_STK17TA8 is not set > # CONFIG_RTC_DRV_M48T86 is not set > # CONFIG_RTC_DRV_M48T35 is not set > # CONFIG_RTC_DRV_M48T59 is not set > # CONFIG_RTC_DRV_BQ4802 is not set > # CONFIG_RTC_DRV_V3020 is not set > > # > # on-CPU RTC drivers > # > # CONFIG_DMADEVICES is not set > # CONFIG_UIO is not set > # CONFIG_STAGING is not set > # CONFIG_X86_PLATFORM_DEVICES is not set > > # > # Firmware Drivers > # > # CONFIG_EDD is not set > CONFIG_FIRMWARE_MEMMAP=y > # CONFIG_DELL_RBU is not set > # CONFIG_DCDBAS is not set > CONFIG_DMIID=y > # CONFIG_ISCSI_IBFT_FIND is not set > > # > # File systems > # > CONFIG_EXT2_FS=m > CONFIG_EXT2_FS_XATTR=y > CONFIG_EXT2_FS_POSIX_ACL=y > CONFIG_EXT2_FS_SECURITY=y > CONFIG_EXT2_FS_XIP=y > CONFIG_EXT3_FS=m > CONFIG_EXT3_FS_XATTR=y > CONFIG_EXT3_FS_POSIX_ACL=y > CONFIG_EXT3_FS_SECURITY=y > CONFIG_EXT4_FS=y > CONFIG_EXT4DEV_COMPAT=y > CONFIG_EXT4_FS_XATTR=y > CONFIG_EXT4_FS_POSIX_ACL=y > CONFIG_EXT4_FS_SECURITY=y > CONFIG_FS_XIP=y > CONFIG_JBD=m > CONFIG_JBD2=y > CONFIG_FS_MBCACHE=y > CONFIG_REISERFS_FS=m > # CONFIG_REISERFS_CHECK is not set > # CONFIG_REISERFS_PROC_INFO is not set > CONFIG_REISERFS_FS_XATTR=y > CONFIG_REISERFS_FS_POSIX_ACL=y > CONFIG_REISERFS_FS_SECURITY=y > CONFIG_JFS_FS=m > CONFIG_JFS_POSIX_ACL=y > CONFIG_JFS_SECURITY=y > # CONFIG_JFS_DEBUG is not set > # CONFIG_JFS_STATISTICS is not set > CONFIG_FS_POSIX_ACL=y > CONFIG_FILE_LOCKING=y > CONFIG_XFS_FS=m > CONFIG_XFS_QUOTA=y > CONFIG_XFS_POSIX_ACL=y > CONFIG_XFS_RT=y > # CONFIG_XFS_DEBUG is not set > # CONFIG_GFS2_FS is not set > # CONFIG_OCFS2_FS is not set > # CONFIG_BTRFS_FS is not set > CONFIG_DNOTIFY=y > CONFIG_INOTIFY=y > CONFIG_INOTIFY_USER=y > CONFIG_QUOTA=y > CONFIG_QUOTA_NETLINK_INTERFACE=y > # CONFIG_PRINT_QUOTA_WARNING is not set > CONFIG_QUOTA_TREE=y > # CONFIG_QFMT_V1 is not set > CONFIG_QFMT_V2=y > CONFIG_QUOTACTL=y > # CONFIG_AUTOFS_FS is not set > # CONFIG_AUTOFS4_FS is not set > CONFIG_FUSE_FS=m > > # > # CD-ROM/DVD Filesystems > # > CONFIG_ISO9660_FS=m > CONFIG_JOLIET=y > CONFIG_ZISOFS=y > CONFIG_UDF_FS=m > CONFIG_UDF_NLS=y > > # > # DOS/FAT/NT Filesystems > # > CONFIG_FAT_FS=m > CONFIG_MSDOS_FS=m > CONFIG_VFAT_FS=m > CONFIG_FAT_DEFAULT_CODEPAGE=437 > CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" > CONFIG_NTFS_FS=m > # CONFIG_NTFS_DEBUG is not set > # CONFIG_NTFS_RW is not set > > # > # Pseudo filesystems > # > CONFIG_PROC_FS=y > CONFIG_PROC_KCORE=y > CONFIG_PROC_SYSCTL=y > CONFIG_PROC_PAGE_MONITOR=y > CONFIG_SYSFS=y > CONFIG_TMPFS=y > # CONFIG_TMPFS_POSIX_ACL is not set > # CONFIG_HUGETLBFS is not set > # CONFIG_HUGETLB_PAGE is not set > # CONFIG_CONFIGFS_FS is not set > CONFIG_MISC_FILESYSTEMS=y > # CONFIG_ADFS_FS is not set > # CONFIG_AFFS_FS is not set > CONFIG_HFS_FS=m > CONFIG_HFSPLUS_FS=y > # CONFIG_BEFS_FS is not set > # CONFIG_BFS_FS is not set > # CONFIG_EFS_FS is not set > # CONFIG_CRAMFS is not set > CONFIG_SQUASHFS=m > CONFIG_SQUASHFS_EMBEDDED=y > CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 > # CONFIG_VXFS_FS is not set > # CONFIG_MINIX_FS is not set > # CONFIG_OMFS_FS is not set > # CONFIG_HPFS_FS is not set > # CONFIG_QNX4FS_FS is not set > # CONFIG_ROMFS_FS is not set > # CONFIG_SYSV_FS is not set > CONFIG_UFS_FS=m > # CONFIG_UFS_FS_WRITE is not set > # CONFIG_UFS_DEBUG is not set > CONFIG_NETWORK_FILESYSTEMS=y > CONFIG_NFS_FS=m > CONFIG_NFS_V3=y > # CONFIG_NFS_V3_ACL is not set > CONFIG_NFS_V4=y > CONFIG_NFSD=m > CONFIG_NFSD_V3=y > # CONFIG_NFSD_V3_ACL is not set > # CONFIG_NFSD_V4 is not set > CONFIG_LOCKD=m > CONFIG_LOCKD_V4=y > CONFIG_EXPORTFS=m > CONFIG_NFS_COMMON=y > CONFIG_SUNRPC=m > CONFIG_SUNRPC_GSS=m > # CONFIG_SUNRPC_REGISTER_V4 is not set > CONFIG_RPCSEC_GSS_KRB5=m > # CONFIG_RPCSEC_GSS_SPKM3 is not set > CONFIG_SMB_FS=m > CONFIG_SMB_NLS_DEFAULT=y > CONFIG_SMB_NLS_REMOTE="cp437" > CONFIG_CIFS=m > # CONFIG_CIFS_STATS is not set > # CONFIG_CIFS_WEAK_PW_HASH is not set > CONFIG_CIFS_XATTR=y > CONFIG_CIFS_POSIX=y > # CONFIG_CIFS_DEBUG2 is not set > # CONFIG_CIFS_EXPERIMENTAL is not set > # CONFIG_NCP_FS is not set > # CONFIG_CODA_FS is not set > # CONFIG_AFS_FS is not set > > # > # Partition Types > # > CONFIG_PARTITION_ADVANCED=y > # CONFIG_ACORN_PARTITION is not set > # CONFIG_OSF_PARTITION is not set > # CONFIG_AMIGA_PARTITION is not set > # CONFIG_ATARI_PARTITION is not set > CONFIG_MAC_PARTITION=y > CONFIG_MSDOS_PARTITION=y > CONFIG_BSD_DISKLABEL=y > CONFIG_MINIX_SUBPARTITION=y > CONFIG_SOLARIS_X86_PARTITION=y > CONFIG_UNIXWARE_DISKLABEL=y > CONFIG_LDM_PARTITION=y > # CONFIG_LDM_DEBUG is not set > # CONFIG_SGI_PARTITION is not set > # CONFIG_ULTRIX_PARTITION is not set > # CONFIG_SUN_PARTITION is not set > CONFIG_KARMA_PARTITION=y > CONFIG_EFI_PARTITION=y > # CONFIG_SYSV68_PARTITION is not set > CONFIG_NLS=y > CONFIG_NLS_DEFAULT="utf8" > CONFIG_NLS_CODEPAGE_437=y > # CONFIG_NLS_CODEPAGE_737 is not set > # CONFIG_NLS_CODEPAGE_775 is not set > CONFIG_NLS_CODEPAGE_850=y > CONFIG_NLS_CODEPAGE_852=y > # CONFIG_NLS_CODEPAGE_855 is not set > # CONFIG_NLS_CODEPAGE_857 is not set > # CONFIG_NLS_CODEPAGE_860 is not set > # CONFIG_NLS_CODEPAGE_861 is not set > # CONFIG_NLS_CODEPAGE_862 is not set > # CONFIG_NLS_CODEPAGE_863 is not set > CONFIG_NLS_CODEPAGE_864=y > # CONFIG_NLS_CODEPAGE_865 is not set > # CONFIG_NLS_CODEPAGE_866 is not set > # CONFIG_NLS_CODEPAGE_869 is not set > # CONFIG_NLS_CODEPAGE_936 is not set > # CONFIG_NLS_CODEPAGE_950 is not set > # CONFIG_NLS_CODEPAGE_932 is not set > # CONFIG_NLS_CODEPAGE_949 is not set > # CONFIG_NLS_CODEPAGE_874 is not set > # CONFIG_NLS_ISO8859_8 is not set > # CONFIG_NLS_CODEPAGE_1250 is not set > # CONFIG_NLS_CODEPAGE_1251 is not set > # CONFIG_NLS_ASCII is not set > CONFIG_NLS_ISO8859_1=y > CONFIG_NLS_ISO8859_2=y > # CONFIG_NLS_ISO8859_3 is not set > # CONFIG_NLS_ISO8859_4 is not set > # CONFIG_NLS_ISO8859_5 is not set > CONFIG_NLS_ISO8859_6=y > # CONFIG_NLS_ISO8859_7 is not set > # CONFIG_NLS_ISO8859_9 is not set > # CONFIG_NLS_ISO8859_13 is not set > # CONFIG_NLS_ISO8859_14 is not set > # CONFIG_NLS_ISO8859_15 is not set > # CONFIG_NLS_KOI8_R is not set > # CONFIG_NLS_KOI8_U is not set > CONFIG_NLS_UTF8=y > # CONFIG_DLM is not set > > # > # Kernel hacking > # > CONFIG_TRACE_IRQFLAGS_SUPPORT=y > # CONFIG_PRINTK_TIME is not set > # CONFIG_ENABLE_WARN_DEPRECATED is not set > # CONFIG_ENABLE_MUST_CHECK is not set > CONFIG_FRAME_WARN=1024 > CONFIG_MAGIC_SYSRQ=y > # CONFIG_UNUSED_SYMBOLS is not set > # CONFIG_DEBUG_FS is not set > # CONFIG_HEADERS_CHECK is not set > # CONFIG_DEBUG_KERNEL is not set > # CONFIG_DEBUG_BUGVERBOSE is not set > # CONFIG_DEBUG_MEMORY_INIT is not set > CONFIG_ARCH_WANT_FRAME_POINTERS=y > CONFIG_FRAME_POINTER=y > # CONFIG_RCU_CPU_STALL_DETECTOR is not set > # CONFIG_LATENCYTOP is not set > CONFIG_SYSCTL_SYSCALL_CHECK=y > CONFIG_USER_STACKTRACE_SUPPORT=y > CONFIG_HAVE_FUNCTION_TRACER=y > CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y > CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y > CONFIG_HAVE_DYNAMIC_FTRACE=y > CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y > > # > # Tracers > # > # CONFIG_SYSPROF_TRACER is not set > # CONFIG_PROVIDE_OHCI1394_DMA_INIT is not set > # CONFIG_DYNAMIC_PRINTK_DEBUG is not set > # CONFIG_SAMPLES is not set > CONFIG_HAVE_ARCH_KGDB=y > # CONFIG_STRICT_DEVMEM is not set > CONFIG_X86_VERBOSE_BOOTUP=y > CONFIG_EARLY_PRINTK=y > # CONFIG_EARLY_PRINTK_DBGP is not set > CONFIG_HAVE_MMIOTRACE_SUPPORT=y > CONFIG_IO_DELAY_TYPE_0X80=0 > CONFIG_IO_DELAY_TYPE_0XED=1 > CONFIG_IO_DELAY_TYPE_UDELAY=2 > CONFIG_IO_DELAY_TYPE_NONE=3 > CONFIG_IO_DELAY_0X80=y > # CONFIG_IO_DELAY_0XED is not set > # CONFIG_IO_DELAY_UDELAY is not set > # CONFIG_IO_DELAY_NONE is not set > CONFIG_DEFAULT_IO_DELAY_TYPE=0 > # CONFIG_OPTIMIZE_INLINING is not set > > # > # Security options > # > # CONFIG_KEYS is not set > # CONFIG_SECURITY is not set > # CONFIG_SECURITYFS is not set > # CONFIG_SECURITY_FILE_CAPABILITIES is not set > CONFIG_CRYPTO=y > > # > # Crypto core or helper > # > # CONFIG_CRYPTO_FIPS is not set > CONFIG_CRYPTO_ALGAPI=y > CONFIG_CRYPTO_ALGAPI2=y > CONFIG_CRYPTO_AEAD=m > CONFIG_CRYPTO_AEAD2=y > CONFIG_CRYPTO_BLKCIPHER=y > CONFIG_CRYPTO_BLKCIPHER2=y > CONFIG_CRYPTO_HASH=y > CONFIG_CRYPTO_HASH2=y > CONFIG_CRYPTO_RNG2=y > CONFIG_CRYPTO_MANAGER=y > CONFIG_CRYPTO_MANAGER2=y > # CONFIG_CRYPTO_GF128MUL is not set > CONFIG_CRYPTO_NULL=m > CONFIG_CRYPTO_CRYPTD=m > CONFIG_CRYPTO_AUTHENC=m > CONFIG_CRYPTO_TEST=m > > # > # Authenticated Encryption with Associated Data > # > # CONFIG_CRYPTO_CCM is not set > # CONFIG_CRYPTO_GCM is not set > # CONFIG_CRYPTO_SEQIV is not set > > # > # Block modes > # > CONFIG_CRYPTO_CBC=y > # CONFIG_CRYPTO_CTR is not set > # CONFIG_CRYPTO_CTS is not set > CONFIG_CRYPTO_ECB=m > # CONFIG_CRYPTO_LRW is not set > CONFIG_CRYPTO_PCBC=y > # CONFIG_CRYPTO_XTS is not set > > # > # Hash modes > # > CONFIG_CRYPTO_HMAC=m > CONFIG_CRYPTO_XCBC=m > > # > # Digest > # > CONFIG_CRYPTO_CRC32C=y > # CONFIG_CRYPTO_CRC32C_INTEL is not set > CONFIG_CRYPTO_MD4=y > CONFIG_CRYPTO_MD5=y > CONFIG_CRYPTO_MICHAEL_MIC=m > # CONFIG_CRYPTO_RMD128 is not set > # CONFIG_CRYPTO_RMD160 is not set > # CONFIG_CRYPTO_RMD256 is not set > # CONFIG_CRYPTO_RMD320 is not set > CONFIG_CRYPTO_SHA1=y > CONFIG_CRYPTO_SHA256=y > CONFIG_CRYPTO_SHA512=y > CONFIG_CRYPTO_TGR192=m > CONFIG_CRYPTO_WP512=m > > # > # Ciphers > # > CONFIG_CRYPTO_AES=y > # CONFIG_CRYPTO_AES_X86_64 is not set > CONFIG_CRYPTO_ANUBIS=m > CONFIG_CRYPTO_ARC4=m > CONFIG_CRYPTO_BLOWFISH=m > CONFIG_CRYPTO_CAMELLIA=m > CONFIG_CRYPTO_CAST5=m > CONFIG_CRYPTO_CAST6=m > CONFIG_CRYPTO_DES=m > CONFIG_CRYPTO_FCRYPT=m > CONFIG_CRYPTO_KHAZAD=m > # CONFIG_CRYPTO_SALSA20 is not set > # CONFIG_CRYPTO_SALSA20_X86_64 is not set > # CONFIG_CRYPTO_SEED is not set > CONFIG_CRYPTO_SERPENT=m > CONFIG_CRYPTO_TEA=m > CONFIG_CRYPTO_TWOFISH=m > CONFIG_CRYPTO_TWOFISH_COMMON=m > # CONFIG_CRYPTO_TWOFISH_X86_64 is not set > > # > # Compression > # > CONFIG_CRYPTO_DEFLATE=m > # CONFIG_CRYPTO_LZO is not set > > # > # Random Number Generation > # > # CONFIG_CRYPTO_ANSI_CPRNG is not set > CONFIG_CRYPTO_HW=y > # CONFIG_CRYPTO_DEV_HIFN_795X is not set > CONFIG_HAVE_KVM=y > CONFIG_HAVE_KVM_IRQCHIP=y > CONFIG_VIRTUALIZATION=y > # CONFIG_KVM is not set > # CONFIG_VIRTIO_PCI is not set > # CONFIG_VIRTIO_BALLOON is not set > > # > # Library routines > # > CONFIG_BITREVERSE=y > CONFIG_GENERIC_FIND_FIRST_BIT=y > CONFIG_GENERIC_FIND_NEXT_BIT=y > CONFIG_GENERIC_FIND_LAST_BIT=y > CONFIG_CRC_CCITT=m > CONFIG_CRC16=y > # CONFIG_CRC_T10DIF is not set > CONFIG_CRC_ITU_T=m > CONFIG_CRC32=y > # CONFIG_CRC7 is not set > CONFIG_LIBCRC32C=y > CONFIG_ZLIB_INFLATE=m > CONFIG_ZLIB_DEFLATE=m > CONFIG_PLIST=y > CONFIG_HAS_IOMEM=y > CONFIG_HAS_IOPORT=y > CONFIG_HAS_DMA=y > [5 lspci-vvv.txt <text/plain; US-ASCII (base64)>] > 00:1b.0 Audio device: Intel Corporation 82801I (ICH9 Family) HD Audio Controller (rev 03) > Subsystem: Hewlett-Packard Company Device 30f4 > Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- > Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- > Latency: 0, Cache Line Size: 64 bytes > Interrupt: pin B routed to IRQ 22 > Region 0: Memory at df000000 (64-bit, non-prefetchable) [size=16K] > Capabilities: [50] Power Management version 2 > Flags: PMEClk- DSI- D1- D2- AuxCurrent=55mA PME(D0+,D1-,D2-,D3hot+,D3cold+) > Status: D0 PME-Enable- DSel=0 DScale=0 PME- > Capabilities: [60] MSI: Mask- 64bit+ Count=1/1 Enable+ > Address: 0000000000000000 Data: 0000 > Capabilities: [70] Express (v1) Root Complex Integrated Endpoint, MSI 00 > DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us > ExtTag- RBE- FLReset+ > DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- > RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+ > MaxPayload 128 bytes, MaxReadReq 128 bytes > DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- > LnkCap: Port #0, Speed unknown, Width x0, ASPM unknown, Latency L0 <64ns, L1 <1us > ClockPM- Surprise- LLActRep- BwNot- > LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk- > ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- > LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt- > Capabilities: [100] Virtual Channel <?> > Capabilities: [130] Root Complex Link <?> > Kernel driver in use: HDA Intel > Kernel modules: snd-hda-intel

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