May 2009 - Alsa-devel - mailman.alsa-project.org

Re: [alsa-devel] Regarding Sound on Acer Aspire 6935G
by Emilio López 26 Jun '09

26 Jun '09

Well, it seems my last email was too heavy with the 4 files attached. I have uploaded them to drop.io, here is the link: http://drop.io/alsaonaceraspire6930 Thanks! 2009/5/23 Emilio López <buhitoescolar(a)gmail.com> > Here you are, I ran alsa-info.sh in the old alsa (with model=acer) and > saved the output of the script when side was enabled and disabled, with > volumes 0 and 100. Hope you can work out the problem with this, do not > hesitate to ask for more debug info if you need. > > Thanks for all! > > Emilio > > PS: On my previous email (cited below) I wrote "Mic sensing" incorrectly, I > wanted to write "headphones sensing". > > 2009/5/23 Takashi Iwai <tiwai(a)suse.de> > > At Sat, 23 May 2009 12:19:12 -0300, >> Emilio López wrote: >> > >> > I reinstalled 1.0.20 today and almost everything started working when I >> set >> > model=acer-aspire-4930g. Mic sensing works, my mic now records too. But >> my >> > bass does not, and I cannot control it with "Side" anymore. >> > >> > Any idea on how to fix it? The audio setup for this laptop will be fully >> > working when I get the bass to play once again. >> >> Could you check with the older version and what "Side" control changes >> in hd-audio codec registers? You can just get alsa-info.sh output >> before and after changing the "Side" control value. >> >> >> thanks, >> >> Takashi >> > >

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[alsa-devel] Please help in adding ams-delta support to ASoC
by Janusz Krzysztofik 23 Jun '09

23 Jun '09

Hi, I am trying to add sound support for ams-delta omap machine, yet without much success. Three years ago, Mark Underwood created an omap-alsa compatible driver that basically worked[1]. It was derieved from similiar driver for aic23 codec found on omap osk machine. It looks like Mark has never managed to finish his work. It's not clear for me if he has found that getting a working fullduplex sound is technically impossible on a voice modem codec, shared among modem and cpu, controlable only from modem side afaik, but I have decided to give it a try. Since Mark's initial work, omap-alsa framework has been depreciated in favour of soc-omap. API changes are so significant that Mark's code is rather not useable directly any more. However, I am trying to use it as a starting point, by comparing it against it's prototype osk/aic23 code. Following Mark, I am trying to derieve the new ams-delta sound driver from current asoc driver for omap osk9512. For codec part, I decided to base my work on much more simple ad73311 rather that tlv320aic23. Comparing Mark's code agaist it's osk/aic23 prototype, I can see the folowing significant changes: 1. rate tables/bitmaps found in hw_constraint_rates, snd_omap_alsa_playback and snd_omap_alsa_capture structures limited to 8kHz, 2. hardware related code found in codec_configure_dev(), codec_clock_on() and codec_clock_off() callback functions replaced with ams-delta hardware specific code that switches the codec DAI pins from modem chip to mcbsp cpu interface and back, 3. codec_set_samplerate() and all mixer related functions replaced with stubs. 4. the following McBSP register settings changes: - .xcr2 = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) | - XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(0) | XFIG, + .xcr2 = XPHASE | XWDLEN2(OMAP_MCBSP_WORD_16) | XFRLEN2(0), - .srgr1 = FWID(DEFAULT_BITPERSAMPLE - 1), + .srgr1 = CLKGDV(0), - .srgr2 = GSYNC | CLKSP | FSGM | FPER(DEFAULT_BITPERSAMPLE * 2 - 1), + .srgr2 = GSYNC, - .pcr0 = CLKXP | CLKRP, /* mcbsp: slave */ I have found points 1. to 3. rather trivial to implement in new framework. Regarding point 4., it looks like detailed register settings are now done inside omap-mcbsp.c, based on machine specified format, so I have to find out what format should be specified for ams-delta. Please correct me if I am missing something. There was one more modification in Mark's code, addressing dma chaining problem on omap15xx hardware, but as far as I could see, the problem was already solved in the asoc omap framework. Initially, I based my work on ompenembedded provided linux-omap.git revision 90e758af52ba803cba233fabee81176d99589f09. The results were rather poor - total system hangup after first device access, with no single message. So I have switched to linux-2.6.30-rc5 and now I can safely access the device, however it does not work as expected. aplay and arecord wait forever, cat to/from /dev/dsp breaks with hardware error messgae. DMA interrput counters stay at 0. However, codec switching that I do from machine->ops->startup/shutdown seems working, as modem stops producing any sounds while the alsa device is in use and gets back thereafter. First of all, I'd like to make sure if my problem is related to my code only. As I am new in these areas, I would like to ask you if the omap asoc framework is stable enough to relay on. If yes, could you please look at my dirty code (attached) an give me some hints? I can provide you with more information if necessary. Regards, Janusz [1] http://www.earth.li/pipermail/e3-hacking/2006-April/000481.html

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[alsa-devel] [PATCH 1/1] ALC889A chip identification
by Torben Schulz 17 Jun '09

17 Jun '09

With this patch the ALC889A chip will be identified correctly. The functions patch_alc882() and patch_alc883() have been altered to set the stream names correctly. Without this patch 'aplay -l' would identify an ALC889A chip as ALC885 for example. Apart from that a kernel info message will be printed if ALC885 or ALC889A chips are handled by the wrong patch function. Signed-off by: Torben Schulz <public(a)letorbi.de> --- alsa-driver/alsa-kernel/pci/hda/patch_realtek.c 2009-05-14 18:23:17.000000000 +0200 +++ alsa-driver-mod/alsa-kernel/pci/hda/patch_realtek.c 2009-05-15 01:08:16.000000000 +0200 @@ -7338,8 +7338,17 @@ setup_preset(spec, &alc882_presets[board_config]); if (codec->vendor_id == 0x10ec0885) { - spec->stream_name_analog = "ALC885 Analog"; - spec->stream_name_digital = "ALC885 Digital"; + if ((codec->revision_id == 0x100101) || + (codec->revision_id == 0x100103)) { + spec->stream_name_analog = "ALC889A Analog"; + spec->stream_name_digital = "ALC889A Digital"; + printk(KERN_INFO + "hda_codec: ALC889A handled by patch_alc882()," + " should be handled by patch_alc883()\n"); + } else { + spec->stream_name_analog = "ALC885 Analog"; + spec->stream_name_digital = "ALC885 Digital"; + } } else { spec->stream_name_analog = "ALC882 Analog"; spec->stream_name_digital = "ALC882 Digital"; @@ -9231,6 +9240,27 @@ setup_preset(spec, &alc883_presets[board_config]); switch (codec->vendor_id) { + case 0x10ec0885: + if ((codec->revision_id == 0x100101) || + (codec->revision_id == 0x100103)) { + spec->stream_name_analog = "ALC889A Analog"; + spec->stream_name_digital = "ALC889A Digital"; + if (!spec->num_adc_nids) { + spec->num_adc_nids = ARRAY_SIZE(alc883_adc_nids); + spec->adc_nids = alc883_adc_nids; + } + if (!spec->capsrc_nids) + spec->capsrc_nids = alc883_capsrc_nids; + spec->capture_style = CAPT_MIX; /* matrix-style capture */ + spec->init_amp = ALC_INIT_DEFAULT; /* always initialize */ + } else { + spec->stream_name_analog = "ALC885 Analog"; + spec->stream_name_digital = "ALC885 Digital"; + printk(KERN_INFO + "hda_codec: ALC885 handled by patch_alc883()," + " should be handled by patch_alc882()\n"); + } + break; case 0x10ec0888: if (codec->revision_id == 0x100101) { spec->stream_name_analog = "ALC1200 Analog";

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Re: [alsa-devel] No jack sense on Intel 82801I / IDT 92HD71B7X in a HP dv4
by Takashi Iwai 13 Jun '09

13 Jun '09

At Sat, 18 Apr 2009 21:36:35 -0300, Gustavo Vieira wrote: > > Em Sáb, 2009-04-18 às 10:57 +0200, Takashi Iwai escreveu: > > > The jack sense is still broken, though. I'm attaching the alsa-info > > with > > > the snapshot loaded. > > > > Could you attach alsa-info.sh output at both HP plugged / unplugged > > states? > > > > Now things got really interesting. :) > > When trying to get the output you requested I discovered that running > alsa-info with the headphones plugged made them work and silenced the > speakers. Then, removing the HP do not make the sound come back to the > speakers, but running alsa-info again does. That is, I can force the > jack sense by running alsa-info. > > I'm attaching the following files: > * alsa-info-snapshot.txt: The output when the system is turned on, > without HP. When I plug the HP and run alsa-info, the HP work > and the out is the same as this file. > * alsa-info-snapshot-hp-1.txt: The output when HP work. > * alsa-info-snapshot-hp-out.txt: The output of the execution of > alsa-info that makes the speakers work when HP are removed. Hm, what happens if you pass model=hp-dv5 option? Takashi

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[alsa-devel] Backported sbxfi driver (UNTESTED!)
by Takashi Iwai 12 Jun '09

12 Jun '09

Hi, $SUBJECT is now on my sound-unstable git tree: git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-unstable-2.6.git together with other experimental patches. If you're using 2.6.27-rc* git tree, pull the master branch of the tree above into yours, and run make oldconfig. That is, % cd /your/git-tree % git pull git://...../sound-unstable-2.6.git master If you are not using 2.6.27-rc*, or not familiar with git, you can try alsa-driver-unstable snapshot tarball available at ftp://ftp.kernel.org/pub/linux/kernel/people/tiwai/snapshot/ Run configure, make and make install as usual ALSA-driver tarball. (I didn't check whether the tarball correctly includes the sbxfi stuff. It should have been generated automatically. If not, wait for a while. If it still doesn't include sbxfi code, please report. I'll fix it tomorrow morning.) The driver is built only for 2.6.26 or later. If you have an older kernel, edit alsa-driver*/kconfig-vers and change the version of CONFIG_SND_SBXFI to 2.6.24 or whatever you want. Then run ./gitcompile, instead of configure in this case to update the configure script. **NOTE** The driver is totally untested. It's just compiled without errors, but not reviewed after a quick writing. So, don't expect it ever runs at the first try. A crash is highly possible. There are some build conditions found in sound/pci/sbxfi/sbxfi.c, starting with XXX_*. You can change it if you want. As default, it's for non-fullduplex but accept different rates. Not sure whether this works at all. Any test- (and better debugging-) reports are appreciated. thanks, Takashi

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[alsa-devel] Wonder if VT1708A has Mic Boost or not
by Konstantin Kletschke 04 Jun '09

04 Jun '09

Hi Folks! I have a mini-PC here which should record Voice over Microphone. The Level is not really loud enough and the alsa-driver-1.0.19 doesn't reveal a mic boost setting in its mixer. This of course may be of the driver not yet being adapted to the special motherboard AFAIK. What I wonder is, is the Mic Boost setting/function integrated in this chip itself or does hardware vendor need to implement external opamps for this? If it is integrated into the chip itself I could try to modifiy the code to make the setting public. Is there a source for a datasheet anywhere for the VT1708A? King regards, Konsti -- GPG KeyID EF62FCEF Fingerprint: 13C9 B16B 9844 EC15 CC2E A080 1E69 3FDA EF62 FCEF

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[alsa-devel] [PATCH v3 5/6] ARM: DaVinci: ASoC: Add mcasp support for DM646x
by Chaithrika U S 04 Jun '09

04 Jun '09

Adds driver support for the two instances of McASP on TI's DM646x. The multichannel audio serial port (McASP) functions as a general-purpose audio serial port optimized for the needs of multichannel audio application. (http://www.ti.com/litv/pdf/spruer1b). There are two instances of McASP on DM646x. The McASP0 module includes up to 4 serializers that can be individually enabled to either transmit or receive in different modes. The McASP1 module is limited with only 1 pinned-out serializer that can be enabled to only transmit in DIT mode (neither receiving in any mode nor transmitting in either Burst or TDM mode is supported). The codec on the DM646x EVM is AIC32 which is connected to Serializer0 and Serializer1 of McASP0. The McASP0 consists of transmit and receive sections that may operate synchronized, or completely independently with separate master clocks, bit clocks, and frame syncs, and using different transmit modes with different bit-stream formats. Signed-off-by: Steve Chen <schen(a)mvista.com> Signed-off-by: Pavel Kiryukhin <pkiryukhin(a)ru.mvista.com> Signed-off-by: Naresh Medisetty <naresh(a)ti.com> Signed-off-by: Chaithrika U S <chaithrika(a)ti.com> --- This patch applies against ALSA mainline - the topic/asoc branch of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6.git sound/soc/davinci/Kconfig | 13 + sound/soc/davinci/Makefile | 3 + sound/soc/davinci/davinci-i2s-mcasp.c | 908 +++++++++++++++++++++++++++++++++ sound/soc/davinci/davinci-i2s-mcasp.h | 58 +++ sound/soc/davinci/davinci-pcm.h | 17 +- 5 files changed, 991 insertions(+), 8 deletions(-) create mode 100644 sound/soc/davinci/davinci-i2s-mcasp.c create mode 100644 sound/soc/davinci/davinci-i2s-mcasp.h diff --git a/sound/soc/davinci/Kconfig b/sound/soc/davinci/Kconfig index 411a710..7d10a8c 100644 --- a/sound/soc/davinci/Kconfig +++ b/sound/soc/davinci/Kconfig @@ -9,6 +9,9 @@ config SND_DAVINCI_SOC config SND_DAVINCI_SOC_I2S tristate +config SND_DAVINCI_SOC_I2S_MCASP + tristate + config SND_DAVINCI_SOC_EVM tristate "SoC Audio support for DaVinci DM6446 or DM355 EVM" depends on SND_DAVINCI_SOC @@ -19,6 +22,16 @@ config SND_DAVINCI_SOC_EVM Say Y if you want to add support for SoC audio on TI DaVinci DM6446 or DM355 EVM platforms. +config SND_DM6467_SOC_EVM + tristate "SoC Audio support for DaVinci DM6467 EVM" + depends on SND_DAVINCI_SOC && MACH_DAVINCI_DM6467_EVM + select SND_DAVINCI_SOC_I2S_MCASP + select SND_SOC_TLV320AIC3X + select SND_SOC_SPDIF + + help + Say Y if you want to add support for SoC audio on TI + config SND_DAVINCI_SOC_SFFSDR tristate "SoC Audio support for SFFSDR" depends on SND_DAVINCI_SOC && MACH_SFFSDR diff --git a/sound/soc/davinci/Makefile b/sound/soc/davinci/Makefile index ca8bae1..152d59c 100644 --- a/sound/soc/davinci/Makefile +++ b/sound/soc/davinci/Makefile @@ -1,13 +1,16 @@ # DAVINCI Platform Support snd-soc-davinci-objs := davinci-pcm.o snd-soc-davinci-i2s-objs := davinci-i2s.o +snd-soc-davinci-i2s-mcasp-objs:= davinci-i2s-mcasp.o obj-$(CONFIG_SND_DAVINCI_SOC) += snd-soc-davinci.o obj-$(CONFIG_SND_DAVINCI_SOC_I2S) += snd-soc-davinci-i2s.o +obj-$(CONFIG_SND_DAVINCI_SOC_I2S_MCASP) += snd-soc-davinci-i2s-mcasp.o # DAVINCI Machine Support snd-soc-evm-objs := davinci-evm.o snd-soc-sffsdr-objs := davinci-sffsdr.o obj-$(CONFIG_SND_DAVINCI_SOC_EVM) += snd-soc-evm.o +obj-$(CONFIG_SND_DM6467_SOC_EVM) += snd-soc-evm.o obj-$(CONFIG_SND_DAVINCI_SOC_SFFSDR) += snd-soc-sffsdr.o diff --git a/sound/soc/davinci/davinci-i2s-mcasp.c b/sound/soc/davinci/davinci-i2s-mcasp.c new file mode 100644 index 0000000..6ea75eb --- /dev/null +++ b/sound/soc/davinci/davinci-i2s-mcasp.c @@ -0,0 +1,908 @@ +/* + * ALSA SoC I2S (McASP) Audio Layer for TI DAVINCI processor + * + * Author: Nirmal Pandey <n-pandey(a)ti.com>, + * Suresh Rajashekara <suresh.r(a)ti.com> + * Steve Chen, <schen@.mvista.com> + * + * Copyright: (C) 2009 MontaVista Software, Inc., <source(a)mvista.com> + * Copyright: (C) 2009 Texas Instruments, India + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/init.h> +#include <linux/module.h> +#include <linux/device.h> +#include <linux/delay.h> +#include <linux/io.h> +#include <linux/clk.h> + +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/initval.h> +#include <sound/soc.h> + +#include "davinci-pcm.h" +#include "davinci-i2s-mcasp.h" + +/* + * McASP register definitions + */ +#define DAVINCI_MCASP_PID_REG 0x00 +#define DAVINCI_MCASP_PWREMUMGT_REG 0x04 + +#define DAVINCI_MCASP_PFUNC_REG 0x10 +#define DAVINCI_MCASP_PDIR_REG 0x14 +#define DAVINCI_MCASP_PDOUT_REG 0x18 +#define DAVINCI_MCASP_PDSET_REG 0x1c + +#define DAVINCI_MCASP_PDCLR_REG 0x20 + +#define DAVINCI_MCASP_TLGC_REG 0x30 +#define DAVINCI_MCASP_TLMR_REG 0x34 + +#define DAVINCI_MCASP_GBLCTL_REG 0x44 +#define DAVINCI_MCASP_AMUTE_REG 0x48 +#define DAVINCI_MCASP_LBCTL_REG 0x4c + +#define DAVINCI_MCASP_TXDITCTL_REG 0x50 + +#define DAVINCI_MCASP_GBLCTLR_REG 0x60 +#define DAVINCI_MCASP_RXMASK_REG 0x64 +#define DAVINCI_MCASP_RXFMT_REG 0x68 +#define DAVINCI_MCASP_RXFMCTL_REG 0x6c + +#define DAVINCI_MCASP_ACLKRCTL_REG 0x70 +#define DAVINCI_MCASP_AHCLKRCTL_REG 0x74 +#define DAVINCI_MCASP_RXTDM_REG 0x78 +#define DAVINCI_MCASP_EVTCTLR_REG 0x7c + +#define DAVINCI_MCASP_RXSTAT_REG 0x80 +#define DAVINCI_MCASP_RXTDMSLOT_REG 0x84 +#define DAVINCI_MCASP_RXCLKCHK_REG 0x88 +#define DAVINCI_MCASP_REVTCTL_REG 0x8c + +#define DAVINCI_MCASP_GBLCTLX_REG 0xa0 +#define DAVINCI_MCASP_TXMASK_REG 0xa4 +#define DAVINCI_MCASP_TXFMT_REG 0xa8 +#define DAVINCI_MCASP_TXFMCTL_REG 0xac + +#define DAVINCI_MCASP_ACLKXCTL_REG 0xb0 +#define DAVINCI_MCASP_AHCLKXCTL_REG 0xb4 +#define DAVINCI_MCASP_TXTDM_REG 0xb8 +#define DAVINCI_MCASP_EVTCTLX_REG 0xbc + +#define DAVINCI_MCASP_TXSTAT_REG 0xc0 +#define DAVINCI_MCASP_TXTDMSLOT_REG 0xc4 +#define DAVINCI_MCASP_TXCLKCHK_REG 0xc8 +#define DAVINCI_MCASP_XEVTCTL_REG 0xcc + +/* Left (even TDM Slot) Channel Status Register File*/ +#define DAVINCI_MCASP_DITCSRA_REG 0x100 +/* Right (odd TDM slot) Channel Status RegisterFile*/ +#define DAVINCI_MCASP_DITCSRB_REG 0x118 +/* Left (even TDM slot) User Data Register File */ +#define DAVINCI_MCASP_DITUDRA_REG 0x130 +/* Right (odd TDM Slot) User Data Register File */ +#define DAVINCI_MCASP_DITUDRB_REG 0x148 + +/* Serializer n Control Register */ +#define DAVINCI_MCASP_XRSRCTL_BASE_REG 0x180 +#define DAVINCI_MCASP_XRSRCTL_REG(n) (DAVINCI_MCASP_XRSRCTL_BASE_REG + \ + (n << 2)) + +/* Transmit Buffer for Serializer n */ +#define DAVINCI_MCASP_TXBUF_REG 0x200 +/* Receive Buffer for Serializer n */ +#define DAVINCI_MCASP_RXBUF_REG 0x280 + + +/* + * DAVINCI_MCASP_PWREMUMGT_REG - Power Down and Emulation Management + * Register Bits + */ +#define MCASP_FREE BIT(0) +#define MCASP_SOFT BIT(1) + +/* + * DAVINCI_MCASP_PFUNC_REG - Pin Function / GPIO Enable Register Bits + */ +#define AXR(n) (1<<n) +#define PFUNC_AMUTE BIT(25) +#define ACLKX BIT(26) +#define AHCLKX BIT(27) +#define AFSX BIT(28) +#define ACLKR BIT(29) +#define AHCLKR BIT(30) +#define AFSR BIT(31) + +/* + * DAVINCI_MCASP_PDIR_REG - Pin Direction Register Bits + */ +#define AXR(n) (1<<n) +#define PDIR_AMUTE BIT(25) +#define ACLKX BIT(26) +#define AHCLKX BIT(27) +#define AFSX BIT(28) +#define ACLKR BIT(29) +#define AHCLKR BIT(30) +#define AFSR BIT(31) + +/* + * DAVINCI_MCASP_TXDITCTL_REG - Transmit DIT Control Register Bits + */ +#define DITEN BIT(0) /* Transmit DIT mode enable/disable */ +#define VA BIT(2) +#define VB BIT(3) + +/* + * DAVINCI_MCASP_TXFMT_REG - Transmit Bitstream Format Register Bits + */ +#define TXROT(val) (val) +#define TXSEL BIT(3) +#define TXSSZ(val) (val<<4) +#define TXPBIT(val) (val<<8) +#define TXPAD(val) (val<<13) +#define TXORD BIT(15) +#define FSXDLY(val) (val<<16) + +/* + * DAVINCI_MCASP_RXFMT_REG - Receive Bitstream Format Register Bits + */ +#define RXROT(val) (val) +#define RXSEL BIT(3) +#define RXSSZ(val) (val<<4) +#define RXPBIT(val) (val<<8) +#define RXPAD(val) (val<<13) +#define RXORD BIT(15) +#define FSRDLY(val) (val<<16) + +/* + * DAVINCI_MCASP_TXFMCTL_REG - Transmit Frame Control Register Bits + */ +#define FSXPOL BIT(0) +#define AFSXE BIT(1) +#define FSXDUR BIT(4) +#define FSXMOD(val) (val<<7) + +/* + * DAVINCI_MCASP_RXFMCTL_REG - Receive Frame Control Register Bits + */ +#define FSRPOL BIT(0) +#define AFSRE BIT(1) +#define FSRDUR BIT(4) +#define FSRMOD(val) (val<<7) + +/* + * DAVINCI_MCASP_ACLKXCTL_REG - Transmit Clock Control Register Bits + */ +#define ACLKXDIV(val) (val) +#define ACLKXE BIT(5) +#define TX_ASYNC BIT(6) +#define ACLKXPOL BIT(7) + +/* + * DAVINCI_MCASP_ACLKRCTL_REG Receive Clock Control Register Bits + */ +#define ACLKRDIV(val) (val) +#define ACLKRE BIT(5) +#define RX_ASYNC BIT(6) +#define ACLKRPOL BIT(7) + +/* + * DAVINCI_MCASP_AHCLKXCTL_REG - High Frequency Transmit Clock Control + * Register Bits + */ +#define AHCLKXDIV(val) (val) +#define AHCLKXPOL BIT(14) +#define AHCLKXE BIT(15) + +/* + * DAVINCI_MCASP_AHCLKRCTL_REG - High Frequency Receive Clock Control + * Register Bits + */ +#define AHCLKRDIV(val) (val) +#define AHCLKRPOL BIT(14) +#define AHCLKRE BIT(15) + +/* + * DAVINCI_MCASP_XRSRCTL_BASE_REG - Serializer Control Register Bits + */ +#define MODE(val) (val) +#define DISMOD (val)(val<<2) +#define TXSTATE BIT(4) +#define RXSTATE BIT(5) + +/* + * DAVINCI_MCASP_LBCTL_REG - Loop Back Control Register Bits + */ +#define LBEN BIT(0) +#define LBORD BIT(1) +#define LBGENMODE(val) (val<<2) + +/* + * DAVINCI_MCASP_TXTDMSLOT_REG - Transmit TDM Slot Register configuration + */ +#define TXTDMS(n) (1<<n) + +/* + * DAVINCI_MCASP_RXTDMSLOT_REG - Receive TDM Slot Register configuration + */ +#define RXTDMS(n) (1<<n) + +/* + * DAVINCI_MCASP_GBLCTL_REG - Global Control Register Bits + */ +#define RXCLKRST BIT(0) /* Receiver Clock Divider Reset */ +#define RXHCLKRST BIT(1) /* Receiver High Frequency Clock Divider */ +#define RXSERCLR BIT(2) /* Receiver Serializer Clear */ +#define RXSMRST BIT(3) /* Receiver State Machine Reset */ +#define RXFSRST BIT(4) /* Frame Sync Generator Reset */ +#define TXCLKRST BIT(8) /* Transmitter Clock Divider Reset */ +#define TXHCLKRST BIT(9) /* Transmitter High Frequency Clock Divider*/ +#define TXSERCLR BIT(10) /* Transmit Serializer Clear */ +#define TXSMRST BIT(11) /* Transmitter State Machine Reset */ +#define TXFSRST BIT(12) /* Frame Sync Generator Reset */ + +/* + * DAVINCI_MCASP_AMUTE_REG - Mute Control Register Bits + */ +#define MUTENA(val) (val) +#define MUTEINPOL BIT(2) +#define MUTEINENA BIT(3) +#define MUTEIN BIT(4) +#define MUTER BIT(5) +#define MUTEX BIT(6) +#define MUTEFSR BIT(7) +#define MUTEFSX BIT(8) +#define MUTEBADCLKR BIT(9) +#define MUTEBADCLKX BIT(10) +#define MUTERXDMAERR BIT(11) +#define MUTETXDMAERR BIT(12) + +/* + * DAVINCI_MCASP_REVTCTL_REG - Receiver DMA Event Control Register bits + */ +#define RXDATADMADIS BIT(0) + +/* + * DAVINCI_MCASP_XEVTCTL_REG - Transmitter DMA Event Control Register bits + */ +#define TXDATADMADIS BIT(0) + +#define DAVINCI_MCASP_NUM_SERIALIZER 16 + +static inline void mcasp_set_bits(void __iomem *reg, u32 val) +{ + __raw_writel(__raw_readl(reg) | val, reg); +} + +static inline void mcasp_clr_bits(void __iomem *reg, u32 val) +{ + __raw_writel((__raw_readl(reg) & ~(val)), reg); +} + +static inline void mcasp_mod_bits(void __iomem *reg, u32 val, u32 mask) +{ + __raw_writel((__raw_readl(reg) & ~mask) | val, reg); +} + +static inline void mcasp_set_reg(void __iomem *reg, u32 val) +{ + __raw_writel(val, reg); +} + +static inline u32 mcasp_get_reg(void __iomem *reg) +{ + return (unsigned int)__raw_readl(reg); +} + +static inline void mcasp_set_ctl_reg(void __iomem *regs, u32 val) +{ + int i = 0; + + mcasp_set_bits(regs, val); + + /* programming GBLCTL needs to read back from GBLCTL and verfiy */ + /* loop count is to avoid the lock-up */ + for (i = 0; i < 1000; i++) { + if ((mcasp_get_reg(regs) & val) == val) + break; + } + + if (i == 1000 && ((mcasp_get_reg(regs) & val) != val)) + printk(KERN_ERR "GBLCTL write error\n"); +} + +static int davinci_i2s_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *cpu_dai) +{ + struct davinci_audio_dev *dev = cpu_dai->private_data; + cpu_dai->dma_data = dev->dma_params[substream->stream]; + return 0; +} + +static void mcasp_start_rx(struct davinci_audio_dev *dev) +{ + mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, RXHCLKRST); + mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, RXCLKRST); + mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, RXSERCLR); + mcasp_set_reg(dev->base + DAVINCI_MCASP_RXBUF_REG, 0); + + mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, RXSMRST); + mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, RXFSRST); + mcasp_set_reg(dev->base + DAVINCI_MCASP_RXBUF_REG, 0); + + mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, RXSMRST); + mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, RXFSRST); +} + +static void mcasp_start_tx(struct davinci_audio_dev *dev) +{ + mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLX_REG, TXHCLKRST); + mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLX_REG, TXCLKRST); + mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLX_REG, TXSERCLR); + mcasp_set_reg(dev->base + DAVINCI_MCASP_TXBUF_REG, 0); + + mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLX_REG, TXSMRST); + mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLX_REG, TXFSRST); + mcasp_set_reg(dev->base + DAVINCI_MCASP_TXBUF_REG, 0); + mcasp_set_reg(dev->base + DAVINCI_MCASP_TXBUF_REG, 0); +} + +static void davinci_mcasp_start(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct davinci_audio_dev *dev = rtd->dai->cpu_dai->private_data; + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + mcasp_start_tx(dev); + else + mcasp_start_rx(dev); +} + +static void mcasp_stop_rx(struct davinci_audio_dev *dev) +{ + mcasp_set_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, 0); + mcasp_set_reg(dev->base + DAVINCI_MCASP_RXSTAT_REG, 0xFFFFFFFF); +} + +static void mcasp_stop_tx(struct davinci_audio_dev *dev) +{ + mcasp_set_reg(dev->base + DAVINCI_MCASP_GBLCTLX_REG, 0); + mcasp_set_reg(dev->base + DAVINCI_MCASP_TXSTAT_REG, 0xFFFFFFFF); +} + +static void davinci_mcasp_stop(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct davinci_audio_dev *dev = rtd->dai->cpu_dai->private_data; + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + mcasp_stop_tx(dev); + else + mcasp_stop_rx(dev); +} + +static int davinci_i2s_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai, + unsigned int fmt) +{ + struct davinci_audio_dev *dev = cpu_dai->private_data; + void __iomem *base = dev->base; + + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBS_CFS: + /* codec is clock and frame slave */ + mcasp_set_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE); + mcasp_set_bits(base + DAVINCI_MCASP_TXFMCTL_REG, AFSXE); + + mcasp_set_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE); + mcasp_set_bits(base + DAVINCI_MCASP_RXFMCTL_REG, AFSRE); + + mcasp_set_bits(base + DAVINCI_MCASP_PDIR_REG, (0x7 << 26)); + break; + + case SND_SOC_DAIFMT_CBM_CFM: + /* codec is clock and frame master */ + mcasp_clr_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE); + mcasp_clr_bits(base + DAVINCI_MCASP_TXFMCTL_REG, AFSXE); + + mcasp_clr_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE); + mcasp_clr_bits(base + DAVINCI_MCASP_RXFMCTL_REG, AFSRE); + + mcasp_clr_bits(base + DAVINCI_MCASP_PDIR_REG, (0x3f << 26)); + break; + + default: + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_IB_NF: + mcasp_clr_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); + mcasp_clr_bits(base + DAVINCI_MCASP_TXFMCTL_REG, FSXPOL); + + mcasp_set_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); + mcasp_clr_bits(base + DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); + break; + + case SND_SOC_DAIFMT_NB_IF: + mcasp_set_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); + mcasp_set_bits(base + DAVINCI_MCASP_TXFMCTL_REG, FSXPOL); + + mcasp_clr_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); + mcasp_set_bits(base + DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); + break; + + case SND_SOC_DAIFMT_IB_IF: + mcasp_clr_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); + mcasp_set_bits(base + DAVINCI_MCASP_TXFMCTL_REG, FSXPOL); + + mcasp_set_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); + mcasp_set_bits(base + DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); + break; + + case SND_SOC_DAIFMT_NB_NF: + mcasp_set_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); + mcasp_clr_bits(base + DAVINCI_MCASP_TXFMCTL_REG, FSXPOL); + + mcasp_clr_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); + mcasp_clr_bits(base + DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); + break; + + default: + return -EINVAL; + } + + return 0; +} + +static int davinci_config_channel_size(struct snd_pcm_substream *substream, + int channel_size) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct davinci_audio_dev *dev = rtd->dai->cpu_dai->private_data; + u32 fmt = 0; + + switch (channel_size) { + case DAVINCI_AUDIO_WORD_8: + fmt = 0x03; + break; + + case DAVINCI_AUDIO_WORD_12: + fmt = 0x05; + break; + + case DAVINCI_AUDIO_WORD_16: + fmt = 0x07; + break; + + case DAVINCI_AUDIO_WORD_20: + fmt = 0x09; + break; + + case DAVINCI_AUDIO_WORD_24: + fmt = 0x0B; + break; + + case DAVINCI_AUDIO_WORD_28: + fmt = 0x0D; + break; + + case DAVINCI_AUDIO_WORD_32: + fmt = 0x0F; + break; + + default: + return -1; + } + + mcasp_mod_bits(dev->base + DAVINCI_MCASP_RXFMT_REG, + RXSSZ(fmt), RXSSZ(0x0F)); + mcasp_mod_bits(dev->base + DAVINCI_MCASP_TXFMT_REG, + TXSSZ(fmt), TXSSZ(0x0F)); + return 0; +} + +static void davinci_hw_common_param(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct davinci_audio_dev *dev = rtd->dai->cpu_dai->private_data; + int i; + + /* Default configuration */ + mcasp_set_bits(dev->base + DAVINCI_MCASP_PWREMUMGT_REG, MCASP_SOFT); + + /* All PINS as McASP */ + mcasp_set_reg(dev->base + DAVINCI_MCASP_PFUNC_REG, 0x00000000); + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + mcasp_set_reg(dev->base + DAVINCI_MCASP_TXSTAT_REG, 0xFFFFFFFF); + mcasp_clr_bits(dev->base + DAVINCI_MCASP_XEVTCTL_REG, + TXDATADMADIS); + } else { + mcasp_set_reg(dev->base + DAVINCI_MCASP_RXSTAT_REG, 0xFFFFFFFF); + mcasp_clr_bits(dev->base + DAVINCI_MCASP_REVTCTL_REG, + RXDATADMADIS); + } + + for (i = 0; i < dev->num_serializer; i++) { + mcasp_set_bits(dev->base + DAVINCI_MCASP_XRSRCTL_REG(i), + dev->serial_dir[i]); + if (dev->serial_dir[i] == TX_MODE) + mcasp_set_bits(dev->base + DAVINCI_MCASP_PDIR_REG, + AXR(i)); + else if (dev->serial_dir[i] == RX_MODE) + mcasp_clr_bits(dev->base + DAVINCI_MCASP_PDIR_REG, + AXR(i)); + } +} + +static void davinci_hw_param(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct davinci_audio_dev *dev = rtd->dai->cpu_dai->private_data; + int i, active_slots; + u32 mask = 0; + + active_slots = (dev->tdm_slots > 31) ? 32 : dev->tdm_slots; + for (i = 0; i < active_slots; i++) + mask |= (1 << i); + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + /* bit stream is MSB first with no delay */ + /* DSP_B mode */ + mcasp_set_bits(dev->base + DAVINCI_MCASP_AHCLKXCTL_REG, + AHCLKXE); + mcasp_set_reg(dev->base + DAVINCI_MCASP_TXTDM_REG, mask); + mcasp_set_bits(dev->base + DAVINCI_MCASP_TXFMT_REG, TXORD); + + if ((dev->tdm_slots >= 2) || (dev->tdm_slots <= 32)) + mcasp_mod_bits(dev->base + DAVINCI_MCASP_TXFMCTL_REG, + FSXMOD(dev->tdm_slots), FSXMOD(0x1FF)); + else + printk(KERN_ERR "playback tdm slot %d not supported\n", + dev->tdm_slots); + + mcasp_set_reg(dev->base + DAVINCI_MCASP_TXMASK_REG, 0xFFFFFFFF); + mcasp_clr_bits(dev->base + DAVINCI_MCASP_TXFMCTL_REG, FSXDUR); + } else { + /* bit stream is MSB first with no delay */ + /* DSP_B mode */ + mcasp_set_bits(dev->base + DAVINCI_MCASP_RXFMT_REG, RXORD); + mcasp_set_bits(dev->base + DAVINCI_MCASP_AHCLKRCTL_REG, + AHCLKRE); + mcasp_set_reg(dev->base + DAVINCI_MCASP_RXTDM_REG, mask); + + if ((dev->tdm_slots >= 2) || (dev->tdm_slots <= 32)) + mcasp_mod_bits(dev->base + DAVINCI_MCASP_RXFMCTL_REG, + FSRMOD(dev->tdm_slots), FSRMOD(0x1FF)); + else + printk(KERN_ERR "capture tdm slot %d not supported\n", + dev->tdm_slots); + + mcasp_set_reg(dev->base + DAVINCI_MCASP_RXMASK_REG, 0xFFFFFFFF); + mcasp_clr_bits(dev->base + DAVINCI_MCASP_RXFMCTL_REG, FSRDUR); + } +} + +/* S/PDIF */ +static void davinci_hw_dit_param(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct davinci_audio_dev *dev = rtd->dai->cpu_dai->private_data; + + /* Set the PDIR for Serialiser as output */ + mcasp_set_bits(dev->base + DAVINCI_MCASP_PDIR_REG, AFSX); + + /* TXMASK for 24 bits */ + mcasp_set_reg(dev->base + DAVINCI_MCASP_TXMASK_REG, 0x00FFFFFF); + + /* Set the TX format : 24 bit right rotation, 32 bit slot, Pad 0 + and LSB first */ + mcasp_set_bits(dev->base + DAVINCI_MCASP_TXFMT_REG, + TXROT(6) | TXSSZ(15)); + + /* Set TX frame synch : DIT Mode, 1 bit width, internal, rising edge */ + mcasp_set_reg(dev->base + DAVINCI_MCASP_TXFMCTL_REG, + AFSXE | FSXMOD(0x180)); + + /* Set the TX tdm : for all the slots */ + mcasp_set_reg(dev->base + DAVINCI_MCASP_TXTDM_REG, 0xFFFFFFFF); + + /* Set the TX clock controls : div = 1 and internal */ + mcasp_set_bits(dev->base + DAVINCI_MCASP_ACLKXCTL_REG, + ACLKXE | TX_ASYNC); + + mcasp_clr_bits(dev->base + DAVINCI_MCASP_XEVTCTL_REG, TXDATADMADIS); + + /* Only 44100 and 48000 are valid, both have the same setting */ + mcasp_set_bits(dev->base + DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXDIV(3)); + + /* Enable the DIT */ + mcasp_set_bits(dev->base + DAVINCI_MCASP_TXDITCTL_REG, DITEN); +} + +static int davinci_i2s_mcasp_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *cpu_dai) +{ + struct davinci_audio_dev *dev = cpu_dai->private_data; + struct davinci_pcm_dma_params *dma_params = + dev->dma_params[substream->stream]; + int word_length; + + davinci_hw_common_param(substream); + + if (dev->op_mode == DAVINCI_MCASP_DIT_MODE) + davinci_hw_dit_param(substream); + else + davinci_hw_param(substream); + + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_S8: + dma_params->data_type = 1; + word_length = DAVINCI_AUDIO_WORD_8; + break; + + case SNDRV_PCM_FORMAT_S16_LE: + dma_params->data_type = 2; + word_length = DAVINCI_AUDIO_WORD_16; + break; + + case SNDRV_PCM_FORMAT_S32_LE: + dma_params->data_type = 4; + word_length = DAVINCI_AUDIO_WORD_32; + break; + + default: + printk(KERN_WARNING "davinci-i2s: unsupported PCM format"); + return -EINVAL; + } + davinci_config_channel_size(substream, word_length); + + return 0; +} + +static int davinci_i2s_mcasp_trigger(struct snd_pcm_substream *substream, + int cmd, struct snd_soc_dai *cpu_dai) +{ + int ret = 0; + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + case SNDRV_PCM_TRIGGER_RESUME: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + davinci_mcasp_start(substream); + break; + + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + davinci_mcasp_stop(substream); + break; + + default: + ret = -EINVAL; + } + + return ret; +} + +static struct snd_soc_dai_ops davinci_i2s_dai_ops = { + .startup = davinci_i2s_startup, + .trigger = davinci_i2s_mcasp_trigger, + .hw_params = davinci_i2s_mcasp_hw_params, + .set_fmt = davinci_i2s_mcasp_set_dai_fmt, + +}; + +struct snd_soc_dai davinci_iis_mcasp_dai[] = { + { + .name = "davinci-i2s", + .id = 0, + .playback = { + .channels_min = 1, + .channels_max = 384, + .rates = DAVINCI_I2S_RATES, + .formats = SNDRV_PCM_FMTBIT_S8 | + SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S32_LE, + }, + .capture = { + .channels_min = 1, + .channels_max = 384, + .rates = DAVINCI_I2S_RATES, + .formats = SNDRV_PCM_FMTBIT_S8 | + SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S32_LE, + }, + .ops = &davinci_i2s_dai_ops, + + }, + { + .name = "davinci-dit", + .id = 1, + .playback = { + .channels_min = 1, + .channels_max = 384, + .rates = DAVINCI_I2S_RATES, + .formats = SNDRV_PCM_FMTBIT_S16_LE, + }, + .ops = &davinci_i2s_dai_ops, + }, + +}; +EXPORT_SYMBOL_GPL(davinci_iis_mcasp_dai); + +static int davinci_i2s_mcasp_probe(struct platform_device *pdev) +{ + struct evm_snd_platform_data *parray = pdev->dev.platform_data; + struct davinci_pcm_dma_params *dma_data; + struct resource *mem, *ioarea, *res; + struct evm_snd_platform_data *pdata; + int tmp, link_cnt, num_links = 2; + struct davinci_audio_dev *dev; + int count = 0; + int ret = 0; + + dev = kzalloc(sizeof(struct davinci_audio_dev) * num_links, + GFP_KERNEL); + if (!dev) + return -ENOMEM; + + dma_data = kzalloc(sizeof(struct davinci_pcm_dma_params) * + (num_links << 1), GFP_KERNEL); + + if (!dma_data) { + ret = -ENOMEM; + goto err_release_dev; + } + + for (link_cnt = 0; link_cnt < num_links; link_cnt++) { + mem = platform_get_resource(pdev, IORESOURCE_MEM, link_cnt); + if (!mem) { + dev_err(&pdev->dev, "no mem resource?\n"); + ret = -ENODEV; + goto err_release_data; + } + + ioarea = request_mem_region(mem->start, + (mem->end - mem->start) + 1, pdev->name); + if (!ioarea) { + dev_err(&pdev->dev, "Audio region already claimed\n"); + ret = -EBUSY; + goto err_release_data; + } + + pdata = &parray[link_cnt]; + dev[link_cnt].clk = clk_get(&pdev->dev, pdata->clk_name); + + if (IS_ERR(dev[link_cnt].clk)) { + ret = -ENODEV; + goto err_release_region; + } + + clk_enable(dev[link_cnt].clk); + + dev[link_cnt].base = (void __iomem *)IO_ADDRESS(mem->start); + dev[link_cnt].op_mode = pdata->op_mode; + dev[link_cnt].tdm_slots = pdata->tdm_slots; + dev[link_cnt].num_serializer = pdata->num_serializer; + dev[link_cnt].serial_dir = pdata->serial_dir; + dev[link_cnt].codec_fmt = pdata->codec_fmt; + + + dma_data[count].name = "I2S PCM Stereo out"; + dma_data[count].eventq_no = pdata->eventq_no; + dma_data[count].dma_addr = (dma_addr_t) (pdata->tx_dma_offset + + io_v2p(dev[link_cnt].base)); + dev[link_cnt].dma_params[SNDRV_PCM_STREAM_PLAYBACK] = + &dma_data[count]; + + /* first TX, then RX */ + res = platform_get_resource(pdev, IORESOURCE_DMA, + 2 * link_cnt + 0); + if (!res) { + dev_err(&pdev->dev, "no DMA resource\n"); + goto err_release_region; + } + + dma_data[count].channel = res->start; + count++; + dma_data[count].name = "I2S PCM Stereo in"; + dma_data[count].eventq_no = pdata->eventq_no; + dma_data[count].dma_addr = (dma_addr_t)(pdata->rx_dma_offset + + io_v2p(dev[link_cnt].base)); + dev[link_cnt].dma_params[SNDRV_PCM_STREAM_CAPTURE] = + &dma_data[count]; + + res = platform_get_resource(pdev, IORESOURCE_DMA, + 2 * link_cnt + 1); + if (!res) { + dev_err(&pdev->dev, "no DMA resource\n"); + goto err_release_region; + } + + dma_data[count].channel = res->start; + count++; + davinci_iis_mcasp_dai[link_cnt].private_data = &dev[link_cnt]; + } + ret = snd_soc_register_dais(davinci_iis_mcasp_dai, + ARRAY_SIZE(davinci_iis_mcasp_dai)); + if (ret != 0) + goto err_release_region; + return 0; + +err_release_region: + for (tmp = link_cnt; tmp >= 0; tmp--) { + mem = platform_get_resource(pdev, IORESOURCE_MEM, tmp); + release_mem_region(mem->start, + (mem->end - mem->start) + 1); + } +err_release_data: + kfree(dma_data); +err_release_dev: + kfree(dev); + + return ret; +} + +static int davinci_i2s_mcasp_remove(struct platform_device *pdev) +{ + int i, num_links = 2; + struct davinci_audio_dev *dev; + struct resource *mem; + struct davinci_pcm_dma_params *dma_data; + + snd_soc_unregister_dais(davinci_iis_mcasp_dai, + ARRAY_SIZE(davinci_iis_mcasp_dai)); + + for (i = 0; i < num_links; i++) { + dev = davinci_iis_mcasp_dai[i].private_data; + clk_disable(dev->clk); + clk_put(dev->clk); + dev->clk = NULL; + + mem = platform_get_resource(pdev, IORESOURCE_MEM, i); + release_mem_region(mem->start, (mem->end - mem->start) + 1); + } + + dev = davinci_iis_mcasp_dai[0].private_data; + dma_data = dev->dma_params[SNDRV_PCM_STREAM_PLAYBACK]; + kfree(dma_data); + kfree(dev); + return 0; +} + +static struct platform_driver davinci_mcasp_driver = { + .probe = davinci_i2s_mcasp_probe, + .remove = davinci_i2s_mcasp_remove, + .driver = { + .name = "davinci-mcasp", + .owner = THIS_MODULE, + }, +}; + +static int __init davinci_i2s_mcasp_init(void) +{ + return platform_driver_register(&davinci_mcasp_driver); +} +module_init(davinci_i2s_mcasp_init); + +static void __exit davinci_i2s_mcasp_exit(void) +{ + platform_driver_unregister(&davinci_mcasp_driver); +} +module_exit(davinci_i2s_mcasp_exit); + + + +MODULE_AUTHOR("Steve Chen"); +MODULE_DESCRIPTION("TI DAVINCI I2S (McASP) SoC Interface"); +MODULE_LICENSE("GPL"); + diff --git a/sound/soc/davinci/davinci-i2s-mcasp.h b/sound/soc/davinci/davinci-i2s-mcasp.h new file mode 100644 index 0000000..f881e54 --- /dev/null +++ b/sound/soc/davinci/davinci-i2s-mcasp.h @@ -0,0 +1,58 @@ +/* + * ALSA SoC I2S (McASP) Audio Layer for TI DAVINCI processor + * + * Author: Nirmal Pandey <n-pandey(a)ti.com>, + * Suresh Rajashekara <suresh.r(a)ti.com> + * Steve Chen, <schen@.mvista.com> + * + * Copyright: (C) 2008 MontaVista Software, Inc., <source(a)mvista.com> + * Copyright: (C) 2008 Texas Instruments, India + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + + +#ifndef DAVINCI_I2S_MCASP_H +#define DAVINCI_I2S_MCASP_H + +#include <linux/io.h> +#include <mach/asp.h> +#include "davinci-pcm.h" + +extern struct snd_soc_dai davinci_iis_mcasp_dai[]; +extern struct snd_soc_dai davinci_dit_mcasp_dai; + + +#define DAVINCI_I2S_RATES SNDRV_PCM_RATE_8000_96000 +#define DAVINCI_MCASP_I2S_DAI 0 +#define DAVINCI_MCASP_DIT_DAI 1 + +enum { + DAVINCI_AUDIO_WORD_8 = 0, + DAVINCI_AUDIO_WORD_12, + DAVINCI_AUDIO_WORD_16, + DAVINCI_AUDIO_WORD_20, + DAVINCI_AUDIO_WORD_24, + DAVINCI_AUDIO_WORD_32, + DAVINCI_AUDIO_WORD_28, /* This is only valid for McASP */ +}; + +struct davinci_audio_dev { + void __iomem *base; + int sample_rate; + struct clk *clk; + struct davinci_pcm_dma_params *dma_params[2]; + unsigned int codec_fmt; + + /* McASP specific data */ + int tdm_slots; + u8 op_mode; + u8 num_serializer; + u8 *serial_dir; +}; + + + +#endif /* DAVINCI_I2S_MCASP_H */ diff --git a/sound/soc/davinci/davinci-pcm.h b/sound/soc/davinci/davinci-pcm.h index 62cb4eb..3cbe281 100644 --- a/sound/soc/davinci/davinci-pcm.h +++ b/sound/soc/davinci/davinci-pcm.h @@ -12,17 +12,18 @@ #ifndef _DAVINCI_PCM_H #define _DAVINCI_PCM_H +#include <mach/edma.h> +#include <mach/asp.h> + + struct davinci_pcm_dma_params { - char *name; /* stream identifier */ - int channel; /* sync dma channel ID */ - dma_addr_t dma_addr; /* device physical address for DMA */ - unsigned int data_type; /* xfer data type */ + char *name; /* stream identifier */ + int channel; /* sync dma channel ID */ + dma_addr_t dma_addr; /* device physical address for DMA */ + unsigned int data_type; /* xfer data type */ + enum dma_event_q eventq_no; /* event queue number */ }; -struct evm_snd_platform_data { - int tx_dma_ch; - int rx_dma_ch; -}; extern struct snd_soc_platform davinci_soc_platform; -- 1.5.6

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[alsa-devel] snd-ctxfi
by The Source 04 Jun '09

04 Jun '09

Hello. I tested the snd-ctxfi driver and found no problems (except no support for 5.1 and external console, but original ctxfi does not support them either). A minor problem: kernel oops reporter periodically pops up with message about using a timer in a wrong place. I'll post here this message when I get it next time.

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[alsa-devel] [PATCH - quirk for USB Aureon cards 1/1] Add quirk to provide proper naming of the Terratec Aureon 5.1 MkII USB card
by Andrea Borgia 03 Jun '09

03 Jun '09

Signed-off-by: Andrea Borgia <andrea(a)borgia.bo.it> diff --git a/sound/usb/usbquirks.h b/sound/usb/usbquirks.h index 5d955aa..d84d6f3 100644 --- a/sound/usb/usbquirks.h +++ b/sound/usb/usbquirks.h @@ -1951,6 +1951,14 @@ YAMAHA_DEVICE(0x7010, "UB99"), } }, { + USB_DEVICE_VENDOR_SPEC(0x0ccd, 0x0028), + .driver_info = (unsigned long) & (const struct snd_usb_audio_quirk) { + .vendor_name = "TerraTec", + .product_name = "Aureon 5.1 MkII", + .ifnum = QUIRK_NO_INTERFACE + } +}, +{ USB_DEVICE(0x0ccd, 0x0035), .driver_info = (unsigned long) & (const struct snd_usb_audio_quirk) { .vendor_name = "Miditech", -- 1.6.0.4

2 8

[alsa-devel] unknown card works
by Oscon 02 Jun '09

02 Jun '09

Hello! I have got a "retro" :) PCI analog tuner card. id: unknown card 0x878-0x144f:0x3000 board name: Askey Computer Corp. MagicTView'99 digital audio rate: 48000 Hz (?) ------------------ Other informations: / dmesg, modules.conf, lspci, system information (version of kernel+alsa-utils) dmesg: May 30 14:19:51 osconsfortress kernel: unknown card 0x878-0x144f:0x3000 May 30 14:19:51 osconsfortress kernel: please mail id, board name, and, if it works, the correct digital_rate option to <alsa-devel(a)alsa-project.org> May 30 14:19:51 osconsfortress kernel: Bt87x 0000:03:06.1: PCI INT A -> GSI 21 (level, low) -> IRQ 21 May 30 14:19:51 osconsfortress kernel: bt87x0: Using board 0, analog, digital (rate 48000 Hz) -------------------- modules.conf: options snd-bt87x index=2 enable=1 load_all=1 digital_rate=48000 -------------------- lspci -vvv 03:06.1 Multimedia controller: Brooktree Corporation Bt878 Audio Capture (rev 02) Subsystem: Askey Computer Corp. MagicTView CPH060 - Audio Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 64 (1000ns min, 63750ns max) Interrupt: pin A routed to IRQ 21 Region 0: Memory at f8ffe000 (32-bit, prefetchable) [size=4K] Kernel driver in use: Bt87x --------------------------- System information: Debian Lenny kernel: root@osconsfortress:~# uname -a Linux osconsfortress 2.6.27-limbo #1 SMP Thu Mar 5 11:18:25 CET 2009 i686 GNU/Linux root@osconsfortress:~# (based on 2.6.27.10+grsec+layer7) root@osconsfortress:~# uptime 14:32:12 up 48 days, 19:41, 3 users, load average: 0.28, 0.30, 0.35 alsa-base :Version: 1.0.17.dfsg-4 -------------------- Cheers, Oscon

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