April 2009 - Alsa-devel - mailman.alsa-project.org

[alsa-devel] [patch] tlv320aic3x: disable ADC/DAC while changing clock
by Daniel Glöckner 02 Apr '09

02 Apr '09

While using a tlv320aic3101 as a clock master, it often happened that the clock lines got stuck while changing the sampling rate. In a discussion with TI technical support it was suggested to shut down the ADC and DAC while there are changes being made to the clock. Following that rule resolves the problem, but merely writing the registers to switch the ADC/DAC off is not enough. One needs to poll the power status registers to wait until they have completely shut down. The aforementioned rule implies that we can not disable the PLL in stand-by bias level. Signed-off-by: Daniel Glöckner <dg(a)emlix.com> --- sound/soc/codecs/tlv320aic3x.c | 89 ++++++++++++++++++++++++++++------------ sound/soc/codecs/tlv320aic3x.h | 8 ++++ 2 files changed, 71 insertions(+), 26 deletions(-) diff --git a/sound/soc/codecs/tlv320aic3x.c b/sound/soc/codecs/tlv320aic3x.c index aea0cb7..4c44022 100644 --- a/sound/soc/codecs/tlv320aic3x.c +++ b/sound/soc/codecs/tlv320aic3x.c @@ -740,6 +740,57 @@ static int aic3x_add_widgets(struct snd_soc_codec *codec) return 0; } +static u8 aic3x_power_codec(struct snd_soc_codec *codec, u8 new) +{ + u8 val, old; + + val = aic3x_read_reg_cache(codec, LINE1L_2_LADC_CTRL); + old = (val & LADC_PWR_ON) ? 1 : 0; + if ((old ^ new) & 1) { + val ^= LADC_PWR_ON; + aic3x_write(codec, LINE1L_2_LADC_CTRL, val); + } + + val = aic3x_read_reg_cache(codec, LINE1R_2_RADC_CTRL); + old += (val & RADC_PWR_ON) ? 2 : 0; + if ((old ^ new) & 2) { + val ^= RADC_PWR_ON; + aic3x_write(codec, LINE1R_2_RADC_CTRL, val); + } + + val = aic3x_read_reg_cache(codec, DAC_PWR); + old += (val & LDAC_PWR_ON) ? 4 : 0; + old += (val & RDAC_PWR_ON) ? 8 : 0; + if ((old ^ new) & 4) + val ^= LDAC_PWR_ON; + if ((old ^ new) & 8) + val ^= RDAC_PWR_ON; + if ((old ^ new) & 12) + aic3x_write(codec, DAC_PWR, val); + + return old; +} + +static u8 aic3x_power_off_wait(struct snd_soc_codec *codec) +{ + int timeout = 1000; + u8 old, data; + old = aic3x_power_codec(codec, 0); + + do { + aic3x_read(codec, ADC_FLAGS, &data); + } while ((data & (LADC_PWR_STATUS | RADC_PWR_STATUS)) && --timeout > 0); + + do { + aic3x_read(codec, MODULE_PWR_STATUS, &data); + } while ((data & (LDAC_PWR_STATUS | RDAC_PWR_STATUS)) && --timeout > 0); + + if (timeout < 0) + printk(KERN_WARNING "aic3x: timeout waiting for ADC/DAC to shut down"); + + return old; +} + static int aic3x_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) @@ -749,9 +800,11 @@ static int aic3x_hw_params(struct snd_pcm_substream *substream, struct snd_soc_codec *codec = socdev->codec; struct aic3x_priv *aic3x = codec->private_data; int codec_clk = 0, bypass_pll = 0, fsref, last_clk = 0; - u8 data, r, p, pll_q, pll_p = 1, pll_r = 1, pll_j = 1; + u8 data, r, p, pll_q, pll_p = 1, pll_r = 1, pll_j = 1, state_saved; u16 pll_d = 1; + state_saved = aic3x_power_off_wait(codec); + /* select data word length */ data = aic3x_read_reg_cache(codec, AIC3X_ASD_INTF_CTRLB) & (~(0x3 << 4)); @@ -805,8 +858,10 @@ static int aic3x_hw_params(struct snd_pcm_substream *substream, data |= (data << 4); aic3x_write(codec, AIC3X_SAMPLE_RATE_SEL_REG, data); - if (bypass_pll) + if (bypass_pll) { + aic3x_power_codec(codec, state_saved); return 0; + } /* Use PLL * find an apropriate setup for j, d, r and p by iterating over @@ -847,6 +902,7 @@ static int aic3x_hw_params(struct snd_pcm_substream *substream, if (last_clk == 0) { printk(KERN_ERR "%s(): unable to setup PLL\n", __func__); + aic3x_power_codec(codec, state_saved); return -EINVAL; } @@ -857,7 +913,11 @@ static int aic3x_hw_params(struct snd_pcm_substream *substream, aic3x_write(codec, AIC3X_PLL_PROGC_REG, (pll_d >> 6) << PLLD_MSB_SHIFT); aic3x_write(codec, AIC3X_PLL_PROGD_REG, (pll_d & 0x3F) << PLLD_LSB_SHIFT); + data = aic3x_read_reg_cache(codec, AIC3X_PLL_PROGA_REG); + aic3x_write(codec, AIC3X_PLL_PROGA_REG, data | (pll_p << PLLP_SHIFT) + | PLL_ENABLE); + aic3x_power_codec(codec, state_saved); return 0; } @@ -951,37 +1011,14 @@ static int aic3x_set_bias_level(struct snd_soc_codec *codec, switch (level) { case SND_SOC_BIAS_ON: - /* all power is driven by DAPM system */ - if (aic3x->master) { - /* enable pll */ - reg = aic3x_read_reg_cache(codec, AIC3X_PLL_PROGA_REG); - aic3x_write(codec, AIC3X_PLL_PROGA_REG, - reg | PLL_ENABLE); - } break; case SND_SOC_BIAS_PREPARE: break; case SND_SOC_BIAS_STANDBY: - /* - * all power is driven by DAPM system, - * so output power is safe if bypass was set - */ - if (aic3x->master) { - /* disable pll */ - reg = aic3x_read_reg_cache(codec, AIC3X_PLL_PROGA_REG); - aic3x_write(codec, AIC3X_PLL_PROGA_REG, - reg & ~PLL_ENABLE); - } break; case SND_SOC_BIAS_OFF: /* force all power off */ - reg = aic3x_read_reg_cache(codec, LINE1L_2_LADC_CTRL); - aic3x_write(codec, LINE1L_2_LADC_CTRL, reg & ~LADC_PWR_ON); - reg = aic3x_read_reg_cache(codec, LINE1R_2_RADC_CTRL); - aic3x_write(codec, LINE1R_2_RADC_CTRL, reg & ~RADC_PWR_ON); - - reg = aic3x_read_reg_cache(codec, DAC_PWR); - aic3x_write(codec, DAC_PWR, reg & ~(LDAC_PWR_ON | RDAC_PWR_ON)); + aic3x_power_off_wait(codec); reg = aic3x_read_reg_cache(codec, HPLOUT_CTRL); aic3x_write(codec, HPLOUT_CTRL, reg & ~HPLOUT_PWR_ON); diff --git a/sound/soc/codecs/tlv320aic3x.h b/sound/soc/codecs/tlv320aic3x.h index ac827e5..0b4fedf 100644 --- a/sound/soc/codecs/tlv320aic3x.h +++ b/sound/soc/codecs/tlv320aic3x.h @@ -69,6 +69,8 @@ #define RAGC_CTRL_B 30 #define RAGC_CTRL_C 31 +/* ADC Flag register */ +#define ADC_FLAGS 34 /* DAC Power and Left High Power Output control registers */ #define DAC_PWR 37 #define HPLCOM_CFG 37 @@ -126,6 +128,8 @@ #define DACR1_2_LLOPM_VOL 85 #define LLOPM_CTRL 86 #define RLOPM_CTRL 93 +/* Module Power status register */ +#define MODULE_PWR_STATUS 94 /* GPIO/IRQ registers */ #define AIC3X_STICKY_IRQ_FLAGS_REG 96 #define AIC3X_RT_IRQ_FLAGS_REG 97 @@ -191,6 +195,10 @@ #define MONOLOPM_PWR_ON 0x01 #define LLOPM_PWR_ON 0x01 #define RLOPM_PWR_ON 0x01 +#define LADC_PWR_STATUS 0x40 +#define RADC_PWR_STATUS 0x04 +#define LDAC_PWR_STATUS 0x80 +#define RDAC_PWR_STATUS 0x40 #define INVERT_VOL(val) (0x7f - val) -- 1.6.2.107.ge47ee

3 14

[alsa-devel] [PATCH v2 1/9] snd-atmel-ac97c: cleanup register definitions
by Hans-Christian Egtvedt 02 Apr '09

02 Apr '09

This patch will remove traces of channel B registers, since they are not used by the AC97C driver. Channel B might be used for other purposes. The driver also adds channel status bits TXEMPTY and OVRUN and a AC97C_CH_MASK macro to ease clearing a channel settings. Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt(a)atmel.com> --- sound/atmel/ac97c.h | 14 ++++++++------ 1 files changed, 8 insertions(+), 6 deletions(-) diff --git a/sound/atmel/ac97c.h b/sound/atmel/ac97c.h index c17bd58..ecbba50 100644 --- a/sound/atmel/ac97c.h +++ b/sound/atmel/ac97c.h @@ -1,5 +1,5 @@ /* - * Register definitions for the Atmel AC97C controller + * Register definitions for Atmel AC97C * * Copyright (C) 2005-2009 Atmel Corporation * @@ -17,10 +17,6 @@ #define AC97C_CATHR 0x24 #define AC97C_CASR 0x28 #define AC97C_CAMR 0x2c -#define AC97C_CBRHR 0x30 -#define AC97C_CBTHR 0x34 -#define AC97C_CBSR 0x38 -#define AC97C_CBMR 0x3c #define AC97C_CORHR 0x40 #define AC97C_COTHR 0x44 #define AC97C_COSR 0x48 @@ -46,8 +42,10 @@ #define AC97C_MR_VRA (1 << 2) #define AC97C_CSR_TXRDY (1 << 0) +#define AC97C_CSR_TXEMPTY (1 << 1) #define AC97C_CSR_UNRUN (1 << 2) #define AC97C_CSR_RXRDY (1 << 4) +#define AC97C_CSR_OVRUN (1 << 5) #define AC97C_CSR_ENDTX (1 << 10) #define AC97C_CSR_ENDRX (1 << 14) @@ -61,11 +59,15 @@ #define AC97C_CMR_DMAEN (1 << 22) #define AC97C_SR_CAEVT (1 << 3) +#define AC97C_SR_COEVT (1 << 2) +#define AC97C_SR_WKUP (1 << 1) +#define AC97C_SR_SOF (1 << 0) +#define AC97C_CH_MASK(slot) \ + (0x7 << (3 * (AC97_SLOT_##slot - 3))) #define AC97C_CH_ASSIGN(slot, channel) \ (AC97C_CHANNEL_##channel << (3 * (AC97_SLOT_##slot - 3))) #define AC97C_CHANNEL_NONE 0x0 #define AC97C_CHANNEL_A 0x1 -#define AC97C_CHANNEL_B 0x2 #endif /* __SOUND_ATMEL_AC97C_H */ -- 1.5.6.3

1 8

[alsa-devel] [PATCH 0/7] snd-atmel-ac97c: misc fixes and error reporting
by Hans-Christian Egtvedt 02 Apr '09

02 Apr '09

This patch series contains six minor fixes and one enhancment of the snd-atmel-ac97c driver. It is based on the for-next branch in sound-2.6 git repo. The enhancment is enabling interrupts for error reporting, this might be useful if you have sound troubles (glitches) on a stressed system. -- Best regards, Hans-Christian Egtvedt

2 10

[alsa-devel] iMac 9,1 sound
by Micah Bucy 02 Apr '09

02 Apr '09

I was able to get sound working on the new iMac by adding the following to alsa-driver-1.0.19/alsa-kernel/pci/hda/patch_realtek.c case 0x106b4900: /* iMac 9,1 */ underneath line 7013 case 0x106b1000: /* iMac 24 */ (this kept it from using the alc883 since the revision_id is 0x100103). I did find though, that using the mbp3 option is what allowed sound to work. The same issues with the macbook pro aluminum apply here. the channel must be switched to 2ch to mute built-in speakers and to 6ch to unmute. There is another issue here though. the playback from the speakers is barely audible, i'm guessing it's similar to the issue with the right speaker on the macbook pro. I'm guessing there needs to be adjustments to the pins defined. My current alsa-info resides at http://www.alsa-project.org/db/?f=5bfaadf03f7134e9ef2c3a934fb4084d36ba2d93 If there's anything else I can do to help this along, let me know. I do have the macbook pro aluminum, so I can test there as well. -Micah

1 0

[PATCH] ASoC: Set parent for AC97 devices we register
by Mark Brown 01 Apr '09

01 Apr '09

Ensure that any AC97 devices that bind to the CODEC are below the ASoC device in the device tree so the suspend and resume code can figure out what order to handle them in. Signed-off-by: Mark Brown <broonie(a)opensource.wolfsonmicro.com> --- sound/soc/soc-core.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c index 6c62d4a..99712f6 100644 --- a/sound/soc/soc-core.c +++ b/sound/soc/soc-core.c @@ -98,7 +98,7 @@ static int soc_ac97_dev_register(struct snd_soc_codec *codec) int err; codec->ac97->dev.bus = &ac97_bus_type; - codec->ac97->dev.parent = NULL; + codec->ac97->dev.parent = codec->card->dev; codec->ac97->dev.release = soc_ac97_device_release; dev_set_name(&codec->ac97->dev, "%d-%d:%s", -- 1.6.2.1

1 0