September 2007 - Alsa-devel - mailman.alsa-project.org

[alsa-devel] How to control the route in smartphone
by Leijin Tang 04 Sep '07

04 Sep '07

Hi all, When the audio codec is used in the smartphone, we get the problem how to define and control the route in the alsa driver. The scenario is only in the phone device. The application need switch the routes based on the different scenes. Example: the coedec is wm9713L. the in port: LINEL，LINER，MONOIN，MIC1，MIC2, ac97_in the out port: HEADSET, SPEAKER, RECEIVER, ac97_out When the phone is coming, we need chose the route LINE to receiver. After the calling and playing the mp3, we should switch the route ac97_in to speaker on. This scenario doesn’t appear in the PC. So how to carry out the function in the alsa architecture is so difficulty. The router names how to define, the alsa-lib how to do the control.There has no design to the phone device in the alsa by now. Does anybody have some ideas? We can do some discussion and resolve the issue.

2 1

[alsa-devel] [PATCH] Gallant SC-6000 driver (2nd version)
by Krzysztof Helt 04 Sep '07

04 Sep '07

From: Krzysztof Helt <krzysztof.h1(a)wp.pl> This is port of the Gallant SC-6000 driver from the OSS aedsp16 driver. This card was also sold as AudioExcel DSP 16 and Zoltrix AV302 (Audio Plus True 16). --- I ported only SC-6000 part from the OSS driver. PCM, OPL3 and CD playback work. Mixer also works. I haven't tested recording and MPU-401 port. This driver does not support the SC-6600 card. If it does the names inside the driver will reflect it (like "Gallant SC-6x00"). If anybody has the SC-6600 card I can port this part as well, but I do not have hardware to test. diff -urNp linux-2.6.22.old/sound/isa/Kconfig linux-2.6.22/sound/isa/Kconfig --- linux-2.6.22.old/sound/isa/Kconfig 2007-08-28 23:14:08.000000000 +0200 +++ linux-2.6.22/sound/isa/Kconfig 2007-09-01 18:38:41.000000000 +0200 @@ -191,6 +191,19 @@ config SND_ES18XX To compile this driver as a module, choose M here: the module will be called snd-es18xx. +config SND_SC6000 + tristate "Gallant SC-6000, Audio Excel DSP 16" + depends on SND + select SND_AD1848_LIB + select SND_OPL3_LIB + select SND_MPU401_UART + help + Say Y here to include support for Gallant SC-6000 card and clones: + Audio Excel DSP 16 and Zoltrix AV302. + + To compile this driver as a module, choose M here: the module + will be called snd-sc6000. + config SND_GUS_SYNTH tristate diff -urNp linux-2.6.22.old/sound/isa/Makefile linux-2.6.22/sound/isa/Makefile --- linux-2.6.22.old/sound/isa/Makefile 2007-07-09 01:32:17.000000000 +0200 +++ linux-2.6.22/sound/isa/Makefile 2007-09-03 22:09:58.000000000 +0200 @@ -10,6 +10,7 @@ snd-cmi8330-objs := cmi8330.o snd-dt019x-objs := dt019x.o snd-es18xx-objs := es18xx.o snd-opl3sa2-objs := opl3sa2.o +snd-sc6000-objs := sc6000.o snd-sgalaxy-objs := sgalaxy.o snd-sscape-objs := sscape.o @@ -21,6 +22,7 @@ obj-$(CONFIG_SND_CMI8330) += snd-cmi8330 obj-$(CONFIG_SND_DT019X) += snd-dt019x.o obj-$(CONFIG_SND_ES18XX) += snd-es18xx.o obj-$(CONFIG_SND_OPL3SA2) += snd-opl3sa2.o +obj-$(CONFIG_SND_SC6000) += snd-sc6000.o obj-$(CONFIG_SND_SGALAXY) += snd-sgalaxy.o obj-$(CONFIG_SND_SSCAPE) += snd-sscape.o diff -urNp linux-2.6.22.old/sound/isa/sc6000.c linux-2.6.22/sound/isa/sc6000.c --- linux-2.6.22.old/sound/isa/sc6000.c 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.22/sound/isa/sc6000.c 2007-09-03 22:12:32.000000000 +0200 @@ -0,0 +1,630 @@ +/* + * Driver for Gallant SC-6000 soundcard. This card is also known as + * Audio Excel DSP 16 or Zoltrix AV302. + * These cards use CompuMedia ASC-9308 chip + AD1848 codec. + * + * Copyright (C) 2007 Krzysztof Helt <krzysztof.h1(a)wp.pl> + * + * I don't have documentation for this card. I used the driver + * for OSS/Free included in the kernel source as reference. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include <linux/module.h> +#include <linux/isa.h> +#include <asm/dma.h> +#include <sound/driver.h> +#include <sound/core.h> +#include <sound/ad1848.h> +#include <sound/opl3.h> +#include <sound/mpu401.h> +#include <sound/control.h> +#define SNDRV_LEGACY_FIND_FREE_IRQ +#define SNDRV_LEGACY_FIND_FREE_DMA +#include <sound/initval.h> + +MODULE_AUTHOR("Krzysztof Helt"); +MODULE_DESCRIPTION("Gallant SC-6000"); +MODULE_LICENSE("GPL"); +MODULE_SUPPORTED_DEVICE("{{Gallant, SC-6000}," + "{AudioExcel, Audio Excel DSP 16}," + "{Zoltrix, AV302}}"); + +static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ +static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ +static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE; /* Enable this card */ +static long port[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; /* 0x220, 0x240 */ +static int irq[SNDRV_CARDS] = SNDRV_DEFAULT_IRQ; /* 5, 7, 9, 10, 11 */ +static long mss_port[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; /* 0x530, 0xe80 */ +static long mpu_port[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; + /* 0x300, 0x310, 0x320, 0x330 */ +static int mpu_irq[SNDRV_CARDS] = SNDRV_DEFAULT_IRQ; /* 5, 7, 9, 10, 0 */ +static int dma[SNDRV_CARDS] = SNDRV_DEFAULT_DMA; /* 0, 1, 3 */ + +module_param_array(index, int, NULL, 0444); +MODULE_PARM_DESC(index, "Index value for sc-6000 based soundcard."); +module_param_array(id, charp, NULL, 0444); +MODULE_PARM_DESC(id, "ID string for sc-6000 based soundcard."); +module_param_array(enable, bool, NULL, 0444); +MODULE_PARM_DESC(enable, "Enable sc-6000 based soundcard."); +module_param_array(port, long, NULL, 0444); +MODULE_PARM_DESC(port, "Port # for sc-6000 driver."); +module_param_array(mss_port, long, NULL, 0444); +MODULE_PARM_DESC(mss_port, "MSS Port # for sc-6000 driver."); +module_param_array(mpu_port, long, NULL, 0444); +MODULE_PARM_DESC(mpu_port, "MPU-401 port # for sc-6000 driver."); +module_param_array(irq, int, NULL, 0444); +MODULE_PARM_DESC(irq, "IRQ # for sc-6000 driver."); +module_param_array(mpu_irq, int, NULL, 0444); +MODULE_PARM_DESC(mpu_irq, "MPU-401 IRQ # for sc-6000 driver."); +module_param_array(dma, int, NULL, 0444); +MODULE_PARM_DESC(dma, "DMA # for sc-6000 driver."); + +/* + * Commands of SC6000's DSP (SBPRO+special). + * Some of them are COMMAND_xx, in the future they may change. + */ +#define WRITE_MDIRQ_CFG 0x50 /* Set M&I&DRQ mask (the real config) */ +#define COMMAND_52 0x52 /* */ +#define READ_HARD_CFG 0x58 /* Read Hardware Config (I/O base etc) */ +#define COMMAND_5C 0x5c /* */ +#define COMMAND_60 0x60 /* */ +#define COMMAND_66 0x66 /* */ +#define COMMAND_6C 0x6c /* */ +#define COMMAND_6E 0x6e /* */ +#define COMMAND_88 0x88 /* Unknown command */ +#define DSP_INIT_MSS 0x8c /* Enable Microsoft Sound System mode */ +#define COMMAND_C5 0xc5 /* */ +#define GET_DSP_VERSION 0xe1 /* Get DSP Version */ +#define GET_DSP_COPYRIGHT 0xe3 /* Get DSP Copyright */ + +/* + * Offsets of SC6000 DSP I/O ports. The offset is added to base I/O port + * to have the actual I/O port. + * Register permissions are: + * (wo) == Write Only + * (ro) == Read Only + * (w-) == Write + * (r-) == Read + */ +#define DSP_RESET 0x06 /* offset of DSP RESET (wo) */ +#define DSP_READ 0x0a /* offset of DSP READ (ro) */ +#define DSP_WRITE 0x0c /* offset of DSP WRITE (w-) */ +#define DSP_COMMAND 0x0c /* offset of DSP COMMAND (w-) */ +#define DSP_STATUS 0x0c /* offset of DSP STATUS (r-) */ +#define DSP_DATAVAIL 0x0e /* offset of DSP DATA AVAILABLE (ro) */ + +#define PFX "sc6000: " + +/* hardware dependent functions */ + +/* + * sc6000_irq_to_softcfg - Decode irq number into cfg code. + */ +static inline unsigned char sc6000_irq_to_softcfg(int irq) +{ + unsigned char val = 0; + + switch (irq) { + case 5: + val = 0x28; + break; + case 7: + val = 0x8; + break; + case 9: + val = 0x10; + break; + case 10: + val = 0x18; + break; + case 11: + val = 0x20; + break; + default: + break; + } + return val; +} + +/* + * sc6000_dma_to_softcfg - Decode dma number into cfg code. + */ +static inline unsigned char sc6000_dma_to_softcfg(int dma) +{ + unsigned char val = 0; + + switch (dma) { + case 0: + val = 1; + break; + case 1: + val = 2; + break; + case 3: + val = 3; + break; + default: + break; + } + return val; +} + +/* + * sc6000_mpu_irq_to_softcfg - Decode MPU-401 irq number into cfg code. + */ +static inline unsigned char sc6000_mpu_irq_to_softcfg(int mpu_irq) +{ + unsigned char val = 0; + + switch (mpu_irq) { + case 5: + val = 4; + break; + case 7: + val = 0x44; + break; + case 9: + val = 0x84; + break; + case 10: + val = 0xc4; + break; + default: + break; + } + return val; +} + +static __devinit int sc6000_wait_data(int port) +{ + int loop = 1000; + unsigned char val = 0; + + do { + val = inb(port + DSP_DATAVAIL); + if (val & 0x80) + return 0; + cpu_relax(); + } while (loop--); + + return -EAGAIN; +} + +static inline int sc6000_read(int port) +{ + if (sc6000_wait_data(port)) + return -EBUSY; + + return inb(port + DSP_READ); + +} + +static __devinit int sc6000_write(int port, int cmd) +{ + unsigned char val; + int loop = 500000; + + do { + val = inb(port + DSP_STATUS); + /* + * DSP ready to receive data if bit 7 of val == 0 + */ + if (!(val & 0x80)) { + outb(cmd, port + DSP_COMMAND); + return 0; + } + cpu_relax(); + } while (loop--); + + snd_printk(KERN_ERR "DSP Command (0x%x) timeout.\n", cmd); + + return -EAGAIN; +} + +static int __devinit sc6000_dsp_get_answer(int port, int command, char *data, + int data_len) +{ + int len = 0; + + if (sc6000_write(port, command)) { + snd_printk(KERN_ERR "CMD 0x%x: failed!\n", command); + return -EFAULT; + } + + do { + int val = sc6000_read(port); + + if (val < 0) + break; + + data[len++] = val; + + } while (len < data_len); + + /* + * If no more data available, return to the caller, no error if len>0. + * We have no other way to know when the string is finished. + */ + return len ? len : -EIO; +} + +static int __devinit sc6000_dsp_reset(int port) +{ + outb(1, port + DSP_RESET); + udelay(10); + outb(0, port + DSP_RESET); + udelay(20); + if (sc6000_read(port) == 0xaa) + return 0; + return -EBUSY; +} + +/* detection and initialization */ +static int __devinit sc6000_cfg_write(int port, unsigned char softcfg) +{ + + if (sc6000_write(port, WRITE_MDIRQ_CFG)) { + snd_printk(KERN_ERR "CMD 0x%x: failed!\n", WRITE_MDIRQ_CFG); + return -EIO; + } + if (sc6000_write(port, softcfg)) { + snd_printk(KERN_ERR "sc6000_cfg_write: failed!\n"); + return -EIO; + } + return 0; +} + +static int __devinit sc6000_setup_board(int port, int config) +{ + int loop = 10; + + do { + if (sc6000_write(port, COMMAND_88)) { + snd_printk(KERN_ERR "CMD 0x%x: failed!\n", + COMMAND_88); + return -EIO; + } + } while ((sc6000_wait_data(port) < 0) && loop--); + + if (sc6000_read(port) < 0) { + snd_printk(KERN_ERR "sc6000_read after CMD 0x%x: failed\n", + COMMAND_88); + return -EIO; + } + + if (sc6000_cfg_write(port, config)) + return -EFAULT; + + return 0; +} + +static int __devinit sc6000_init_mss(int port, int config, int mss_port, + int mss_config) +{ + if (sc6000_write(port, DSP_INIT_MSS)) { + snd_printk(KERN_ERR "sc6000_init_mss [0x%x]: failed!\n", + DSP_INIT_MSS); + return -EIO; + } + + mdelay(10); + + if (sc6000_cfg_write(port, config)) + return -EIO; + + outb(mss_config, mss_port); + + return 0; +} + +static int __devinit sc6000_init_board(int port, int irq, int dma, + int mss_port, int mpu_irq) +{ + char answer[15]; + char version[2]; + int mss_config = sc6000_irq_to_softcfg(irq) | + sc6000_dma_to_softcfg(dma); + int config = mss_config | + sc6000_mpu_irq_to_softcfg(mpu_irq); + + if (sc6000_dsp_reset(port)) { + snd_printk(KERN_ERR "sc6000_dsp_reset: failed!\n"); + return -EBUSY; + } + + if (sc6000_dsp_get_answer(port, GET_DSP_COPYRIGHT, answer, 15) <= 0) { + snd_printk(KERN_ERR "sc6000_dsp_copyright: failed!\n"); + return -ENODEV; + } + /* + * My SC-6000 card return "SC-6000" in DSPCopyright, so + * if we have something different, we have to be warned. + * Mine returns SC-6000A - KH + */ + if (strncmp("SC-6000", answer, 7)) + snd_printk(KERN_WARNING "Warning: non SC-6000 audio card!\n"); + + if (sc6000_dsp_get_answer(port, GET_DSP_VERSION, version, 2) < 2) { + snd_printk(KERN_ERR "sc6000_dsp_version: failed!\n"); + return -ENODEV; + } + printk(KERN_INFO PFX "Detected model: %s version %d.%d\n", + answer, version[1], version[0]); + + /* + * 0x0A == (IRQ 7, DMA 1, MIRQ 0) + */ + if (sc6000_cfg_write(port, 0x0a)) { + snd_printk(KERN_ERR "sc6000_cfg_write: failed!\n"); + return -EFAULT; + } + + if (sc6000_setup_board(port, config) < 0) { + snd_printk(KERN_ERR "sc6000_setup_board: failed!\n"); + return -ENODEV; + } + + if (sc6000_init_mss(port, config, mss_port, + mss_config) < 0) { + snd_printk(KERN_ERR "Can not initialize" + "Microsoft Sound System mode.\n"); + return -ENODEV; + } + + return 0; +} + +static int __devinit snd_sc6000_detect(int dev, int irq, int dma) +{ + int err = -ENODEV; + + snd_printd("Initializing BASE[0x%lx] IRQ[%d] DMA[%d] MIRQ[%d]\n", + port[dev], irq, dma, + mpu_irq[dev] == SND_AUTO_IRQ ? 0 : mpu_irq[dev]); + +/* + * We must request the port region because these are the I/O + * ports to access card's control registers. + */ + if (!request_region(port[dev], 0x10, "sc-6000 (base)")) { + snd_printk(KERN_ERR + "SC-6000 port I/O port region is already in use.\n"); + return -EBUSY; + } + + err = sc6000_init_board(port[dev], irq, dma, + mss_port[dev], mpu_irq[dev]); + + release_region(port[dev], 0x10); + + return err; +} + +static int __devinit snd_sc6000_mixer(struct snd_ad1848 *chip) +{ + struct snd_card *card = chip->card; + struct snd_ctl_elem_id id1, id2; + int err; + + memset(&id1, 0, sizeof(id1)); + memset(&id2, 0, sizeof(id2)); + id1.iface = SNDRV_CTL_ELEM_IFACE_MIXER; + id2.iface = SNDRV_CTL_ELEM_IFACE_MIXER; + /* reassign AUX0 to FM */ + strcpy(id1.name, "Aux Playback Switch"); + strcpy(id2.name, "FM Playback Switch"); + err = snd_ctl_rename_id(card, &id1, &id2); + if (err < 0) + return err; + strcpy(id1.name, "Aux Playback Volume"); + strcpy(id2.name, "FM Playback Volume"); + err = snd_ctl_rename_id(card, &id1, &id2); + if (err < 0) + return err; + /* reassign AUX1 to CD */ + strcpy(id1.name, "Aux Playback Switch"); id1.index = 1; + strcpy(id2.name, "CD Playback Switch"); + err = snd_ctl_rename_id(card, &id1, &id2); + if (err < 0) + return err; + strcpy(id1.name, "Aux Playback Volume"); + strcpy(id2.name, "CD Playback Volume"); + err = snd_ctl_rename_id(card, &id1, &id2); + if (err < 0) + return err; + return 0; +} + +static int __devinit snd_sc6000_match(struct device *devptr, unsigned int dev) +{ + if (!enable[dev]) + return 0; + if (port[dev] == SNDRV_AUTO_PORT) { + printk(KERN_ERR PFX "specify IO port\n"); + return 0; + } + if (mss_port[dev] == SNDRV_AUTO_PORT) { + printk(KERN_ERR PFX "specify MSS port\n"); + return 0; + } + if (port[dev] != 0x220 && port[dev] != 0x240) { + printk(KERN_ERR PFX "Port must be 0x220 or 0x240\n"); + return 0; + } + if (mss_port[dev] != 0x530 && mss_port[dev] != 0xe80) { + printk(KERN_ERR PFX "MSS port must be 0x530 or 0xe80\n"); + return 0; + } + if (irq[dev] != SNDRV_AUTO_IRQ && !sc6000_irq_to_softcfg(irq[dev])) { + printk(KERN_ERR PFX "invalid IRQ %d\n", irq[dev]); + return 0; + } + if (dma[dev] != SNDRV_AUTO_DMA && !sc6000_dma_to_softcfg(dma[dev])) { + printk(KERN_ERR PFX "invalid DMA %d\n", dma[dev]); + return 0; + } + if (mpu_port[dev] != SNDRV_AUTO_PORT && + (mpu_port[dev] & ~0x30l) != 0x300) { + printk(KERN_ERR PFX "invalid MPU-401 port %lx\n", + mpu_port[dev]); + return 0; + } + if (mpu_port[dev] != SNDRV_AUTO_PORT && + mpu_irq[dev] != SNDRV_AUTO_IRQ && mpu_irq[dev] != 0 && + !sc6000_mpu_irq_to_softcfg(mpu_irq[dev])) { + printk(KERN_ERR PFX "invalid MPU-401 IRQ %d\n", mpu_irq[dev]); + return 0; + } + return 1; +} + +static int __devinit snd_sc6000_probe(struct device *devptr, unsigned int dev) +{ + static int possible_irqs[] = { 7, 9, 10, 11, -1 }; + static int possible_dmas[] = { 1, 3, 0, -1 }; + int err; + int xirq = irq[dev]; + int xdma = dma[dev]; + struct snd_card *card; + struct snd_ad1848 *chip; + struct snd_opl3 *opl3; + + card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0); + if (card == NULL) + return -ENOMEM; + + if (xirq == SNDRV_AUTO_IRQ) { + xirq = snd_legacy_find_free_irq(possible_irqs); + if (xirq < 0) { + snd_printk(KERN_ERR "unable to find a free IRQ\n"); + err = -EBUSY; + goto _err; + } + } + + if (xdma == SNDRV_AUTO_DMA) { + xdma = snd_legacy_find_free_dma(possible_dmas); + if (xdma < 0) { + snd_printk(KERN_ERR "unable to find a free DMA\n"); + err = -EBUSY; + goto _err; + } + } + + err = snd_sc6000_detect(dev, xirq, xdma); + if (err < 0) + goto _err; + + err = snd_ad1848_create(card, mss_port[dev] + 4, xirq, xdma, + AD1848_HW_DETECT, &chip); + if (err < 0) + goto _err; + card->private_data = chip; + + err = snd_ad1848_pcm(chip, 0, NULL); + if (err < 0) { + snd_printk(KERN_ERR + "error creating new ad1848 PCM device\n"); + goto _err; + } + err = snd_ad1848_mixer(chip); + if (err < 0) { + snd_printk(KERN_ERR "error creating new ad1848 mixer\n"); + goto _err; + } + err = snd_sc6000_mixer(chip); + if (err < 0) { + snd_printk(KERN_ERR "the mixer rewrite failed\n"); + goto _err; + } + if (snd_opl3_create(card, + 0x388, 0x388 + 2, + OPL3_HW_AUTO, 0, &opl3) < 0) { + snd_printk(KERN_ERR "no OPL device at 0x%x-0x%x ?\n", + 0x388, 0x388 + 2); + } else { + err = snd_opl3_timer_new(opl3, 0, 1); + if (err < 0) + goto _err; + + err = snd_opl3_hwdep_new(opl3, 0, 1, NULL); + if (err < 0) + goto _err; + } + + if (mpu_port[dev] != SNDRV_AUTO_PORT) { + if (mpu_irq[dev] == SNDRV_AUTO_IRQ) + mpu_irq[dev] = -1; + if (snd_mpu401_uart_new(card, 0, + MPU401_HW_MPU401, + mpu_port[dev], 0, + mpu_irq[dev], + mpu_irq[dev] >= 0 ? IRQF_DISABLED : 0, + NULL) < 0) + snd_printk(KERN_ERR "no MPU-401 device at 0x%lx ?\n", + mpu_port[dev]); + } + + strcpy(card->driver, "Gallant SC-6000"); + strcpy(card->shortname, "Gallant SC-6000"); + sprintf(card->longname, "Gallant SC-6000 at 0x%lx, irq %d, dma %d", + mss_port[dev], xirq, xdma); + + snd_card_set_dev(card, devptr); + + err = snd_card_register(card); + if (err < 0) + goto _err; + + dev_set_drvdata(devptr, card); + return 0; + + _err: + snd_card_free(card); + return err; +} + +static int __devexit snd_sc6000_remove(struct device *devptr, unsigned int dev) +{ + snd_card_free(dev_get_drvdata(devptr)); + dev_set_drvdata(devptr, NULL); + return 0; +} + +static struct isa_driver snd_sc6000_driver = { + .match = snd_sc6000_match, + .probe = snd_sc6000_probe, + .remove = __devexit_p(snd_sc6000_remove), + /* FIXME: suspend/resume */ + .driver = { + .name = "sc6000", + }, +}; + + +static int __init alsa_card_sc6000_init(void) +{ + return isa_register_driver(&snd_sc6000_driver, SNDRV_CARDS); +} + +static void __exit alsa_card_sc6000_exit(void) +{ + isa_unregister_driver(&snd_sc6000_driver); +} + +module_init(alsa_card_sc6000_init) +module_exit(alsa_card_sc6000_exit)

2 1

[alsa-devel] [PATCH] cs4231 header split
by Krzysztof Helt 04 Sep '07

04 Sep '07

From: Krzysztof Helt <krzysztof.h1(a)wp.pl> This patch splits the cs4231.h file into two parts: - cs4231-regs.h which contain register constants and macros - cs4231.h which includes the above and contain rest of the definitions This will allow to share register definitions between x86 ISA cs4231 and SPARC cs4231. Signed-off-by: Krzysztof Helt <krzysztof.h1(a)wp.pl> --- The next step is to use the definitions into the sparc cs4231 driver. If it is not a good idea please reject this patch. diff -uNrp linux-2.6.23.orig/include/sound/cs4231-regs.h linux-2.6.23/include/sound/cs4231-regs.h --- linux-2.6.23.orig/include/sound/cs4231-regs.h 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.23/include/sound/cs4231-regs.h 2007-09-03 18:28:14.590542832 +0200 @@ -0,0 +1,180 @@ +#ifndef __SOUND_CS4231_REGS_H +#define __SOUND_CS4231_REGS_H + +/* + * Copyright (c) by Jaroslav Kysela <perex(a)suse.cz> + * Definitions for CS4231 & InterWave chips & compatible chips registers + * + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +/* IO ports */ + +#define CS4231P(x) (c_d_c_CS4231##x) + +#define c_d_c_CS4231REGSEL 0 +#define c_d_c_CS4231REG 1 +#define c_d_c_CS4231STATUS 2 +#define c_d_c_CS4231PIO 3 + +/* codec registers */ + +#define CS4231_LEFT_INPUT 0x00 /* left input control */ +#define CS4231_RIGHT_INPUT 0x01 /* right input control */ +#define CS4231_AUX1_LEFT_INPUT 0x02 /* left AUX1 input control */ +#define CS4231_AUX1_RIGHT_INPUT 0x03 /* right AUX1 input control */ +#define CS4231_AUX2_LEFT_INPUT 0x04 /* left AUX2 input control */ +#define CS4231_AUX2_RIGHT_INPUT 0x05 /* right AUX2 input control */ +#define CS4231_LEFT_OUTPUT 0x06 /* left output control register */ +#define CS4231_RIGHT_OUTPUT 0x07 /* right output control register */ +#define CS4231_PLAYBK_FORMAT 0x08 /* clock and data format - playback - bits 7-0 MCE */ +#define CS4231_IFACE_CTRL 0x09 /* interface control - bits 7-2 MCE */ +#define CS4231_PIN_CTRL 0x0a /* pin control */ +#define CS4231_TEST_INIT 0x0b /* test and initialization */ +#define CS4231_MISC_INFO 0x0c /* miscellaneaous information */ +#define CS4231_LOOPBACK 0x0d /* loopback control */ +#define CS4231_PLY_UPR_CNT 0x0e /* playback upper base count */ +#define CS4231_PLY_LWR_CNT 0x0f /* playback lower base count */ +#define CS4231_ALT_FEATURE_1 0x10 /* alternate #1 feature enable */ +#define AD1845_AF1_MIC_LEFT 0x10 /* alternate #1 feature + MIC left */ +#define CS4231_ALT_FEATURE_2 0x11 /* alternate #2 feature enable */ +#define AD1845_AF2_MIC_RIGHT 0x11 /* alternate #2 feature + MIC right */ +#define CS4231_LEFT_LINE_IN 0x12 /* left line input control */ +#define CS4231_RIGHT_LINE_IN 0x13 /* right line input control */ +#define CS4231_TIMER_LOW 0x14 /* timer low byte */ +#define CS4231_TIMER_HIGH 0x15 /* timer high byte */ +#define CS4231_LEFT_MIC_INPUT 0x16 /* left MIC input control register (InterWave only) */ +#define AD1845_UPR_FREQ_SEL 0x16 /* upper byte of frequency select */ +#define CS4231_RIGHT_MIC_INPUT 0x17 /* right MIC input control register (InterWave only) */ +#define AD1845_LWR_FREQ_SEL 0x17 /* lower byte of frequency select */ +#define CS4236_EXT_REG 0x17 /* extended register access */ +#define CS4231_IRQ_STATUS 0x18 /* irq status register */ +#define CS4231_LINE_LEFT_OUTPUT 0x19 /* left line output control register (InterWave only) */ +#define CS4231_VERSION 0x19 /* CS4231(A) - version values */ +#define CS4231_MONO_CTRL 0x1a /* mono input/output control */ +#define CS4231_LINE_RIGHT_OUTPUT 0x1b /* right line output control register (InterWave only) */ +#define AD1845_PWR_DOWN 0x1b /* power down control */ +#define CS4235_LEFT_MASTER 0x1b /* left master output control */ +#define CS4231_REC_FORMAT 0x1c /* clock and data format - record - bits 7-0 MCE */ +#define CS4231_PLY_VAR_FREQ 0x1d /* playback variable frequency */ +#define AD1845_CLOCK 0x1d /* crystal clock select and total power down */ +#define CS4235_RIGHT_MASTER 0x1d /* right master output control */ +#define CS4231_REC_UPR_CNT 0x1e /* record upper count */ +#define CS4231_REC_LWR_CNT 0x1f /* record lower count */ + +/* definitions for codec register select port - CODECP( REGSEL ) */ + +#define CS4231_INIT 0x80 /* CODEC is initializing */ +#define CS4231_MCE 0x40 /* mode change enable */ +#define CS4231_TRD 0x20 /* transfer request disable */ + +/* definitions for codec status register - CODECP( STATUS ) */ + +#define CS4231_GLOBALIRQ 0x01 /* IRQ is active */ + +/* definitions for codec irq status */ + +#define CS4231_PLAYBACK_IRQ 0x10 +#define CS4231_RECORD_IRQ 0x20 +#define CS4231_TIMER_IRQ 0x40 +#define CS4231_ALL_IRQS 0x70 +#define CS4231_REC_UNDERRUN 0x08 +#define CS4231_REC_OVERRUN 0x04 +#define CS4231_PLY_OVERRUN 0x02 +#define CS4231_PLY_UNDERRUN 0x01 + +/* definitions for CS4231_LEFT_INPUT and CS4231_RIGHT_INPUT registers */ + +#define CS4231_ENABLE_MIC_GAIN 0x20 + +#define CS4231_MIXS_LINE 0x00 +#define CS4231_MIXS_AUX1 0x40 +#define CS4231_MIXS_MIC 0x80 +#define CS4231_MIXS_ALL 0xc0 + +/* definitions for clock and data format register - CS4231_PLAYBK_FORMAT */ + +#define CS4231_LINEAR_8 0x00 /* 8-bit unsigned data */ +#define CS4231_ALAW_8 0x60 /* 8-bit A-law companded */ +#define CS4231_ULAW_8 0x20 /* 8-bit U-law companded */ +#define CS4231_LINEAR_16 0x40 /* 16-bit twos complement data - little endian */ +#define CS4231_LINEAR_16_BIG 0xc0 /* 16-bit twos complement data - big endian */ +#define CS4231_ADPCM_16 0xa0 /* 16-bit ADPCM */ +#define CS4231_STEREO 0x10 /* stereo mode */ +/* bits 3-1 define frequency divisor */ +#define CS4231_XTAL1 0x00 /* 24.576 crystal */ +#define CS4231_XTAL2 0x01 /* 16.9344 crystal */ + +/* definitions for interface control register - CS4231_IFACE_CTRL */ + +#define CS4231_RECORD_PIO 0x80 /* record PIO enable */ +#define CS4231_PLAYBACK_PIO 0x40 /* playback PIO enable */ +#define CS4231_CALIB_MODE 0x18 /* calibration mode bits */ +#define CS4231_AUTOCALIB 0x08 /* auto calibrate */ +#define CS4231_SINGLE_DMA 0x04 /* use single DMA channel */ +#define CS4231_RECORD_ENABLE 0x02 /* record enable */ +#define CS4231_PLAYBACK_ENABLE 0x01 /* playback enable */ + +/* definitions for pin control register - CS4231_PIN_CTRL */ + +#define CS4231_IRQ_ENABLE 0x02 /* enable IRQ */ +#define CS4231_XCTL1 0x40 /* external control #1 */ +#define CS4231_XCTL0 0x80 /* external control #0 */ + +/* definitions for test and init register - CS4231_TEST_INIT */ + +#define CS4231_CALIB_IN_PROGRESS 0x20 /* auto calibrate in progress */ +#define CS4231_DMA_REQUEST 0x10 /* DMA request in progress */ + +/* definitions for misc control register - CS4231_MISC_INFO */ + +#define CS4231_MODE2 0x40 /* MODE 2 */ +#define CS4231_IW_MODE3 0x6c /* MODE 3 - InterWave enhanced mode */ +#define CS4231_4236_MODE3 0xe0 /* MODE 3 - CS4236+ enhanced mode */ + +/* definitions for alternate feature 1 register - CS4231_ALT_FEATURE_1 */ + +#define CS4231_DACZ 0x01 /* zero DAC when underrun */ +#define CS4231_TIMER_ENABLE 0x40 /* codec timer enable */ +#define CS4231_OLB 0x80 /* output level bit */ + +/* definitions for Extended Registers - CS4236+ */ + +#define CS4236_REG(i23val) (((i23val << 2) & 0x10) | ((i23val >> 4) & 0x0f)) +#define CS4236_I23VAL(reg) ((((reg)&0xf) << 4) | (((reg)&0x10) >> 2) | 0x8) + +#define CS4236_LEFT_LINE 0x08 /* left LINE alternate volume */ +#define CS4236_RIGHT_LINE 0x18 /* right LINE alternate volume */ +#define CS4236_LEFT_MIC 0x28 /* left MIC volume */ +#define CS4236_RIGHT_MIC 0x38 /* right MIC volume */ +#define CS4236_LEFT_MIX_CTRL 0x48 /* synthesis and left input mixer control */ +#define CS4236_RIGHT_MIX_CTRL 0x58 /* right input mixer control */ +#define CS4236_LEFT_FM 0x68 /* left FM volume */ +#define CS4236_RIGHT_FM 0x78 /* right FM volume */ +#define CS4236_LEFT_DSP 0x88 /* left DSP serial port volume */ +#define CS4236_RIGHT_DSP 0x98 /* right DSP serial port volume */ +#define CS4236_RIGHT_LOOPBACK 0xa8 /* right loopback monitor volume */ +#define CS4236_DAC_MUTE 0xb8 /* DAC mute and IFSE enable */ +#define CS4236_ADC_RATE 0xc8 /* indenpendent ADC sample frequency */ +#define CS4236_DAC_RATE 0xd8 /* indenpendent DAC sample frequency */ +#define CS4236_LEFT_MASTER 0xe8 /* left master digital audio volume */ +#define CS4236_RIGHT_MASTER 0xf8 /* right master digital audio volume */ +#define CS4236_LEFT_WAVE 0x0c /* left wavetable serial port volume */ +#define CS4236_RIGHT_WAVE 0x1c /* right wavetable serial port volume */ +#define CS4236_VERSION 0x9c /* chip version and ID */ + +#endif /* __SOUND_CS4231_REGS_H */ diff -uNrp linux-2.6.23.orig/include/sound/cs4231-regs.h~ linux-2.6.23/include/sound/cs4231-regs.h~ --- linux-2.6.23.orig/include/sound/cs4231-regs.h~ 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.23/include/sound/cs4231-regs.h~ 2007-09-03 18:27:55.321444748 +0200 @@ -0,0 +1,184 @@ +#ifndef __SOUND_CS4231_REGS_H +#define __SOUND_CS4231_REGS_H + +/* + * Copyright (c) by Jaroslav Kysela <perex(a)suse.cz> + * Definitions for CS4231 & InterWave chips & compatible chips + * + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#include "control.h" +#include "pcm.h" +#include "timer.h" + +/* IO ports */ + +#define CS4231P(x) (c_d_c_CS4231##x) + +#define c_d_c_CS4231REGSEL 0 +#define c_d_c_CS4231REG 1 +#define c_d_c_CS4231STATUS 2 +#define c_d_c_CS4231PIO 3 + +/* codec registers */ + +#define CS4231_LEFT_INPUT 0x00 /* left input control */ +#define CS4231_RIGHT_INPUT 0x01 /* right input control */ +#define CS4231_AUX1_LEFT_INPUT 0x02 /* left AUX1 input control */ +#define CS4231_AUX1_RIGHT_INPUT 0x03 /* right AUX1 input control */ +#define CS4231_AUX2_LEFT_INPUT 0x04 /* left AUX2 input control */ +#define CS4231_AUX2_RIGHT_INPUT 0x05 /* right AUX2 input control */ +#define CS4231_LEFT_OUTPUT 0x06 /* left output control register */ +#define CS4231_RIGHT_OUTPUT 0x07 /* right output control register */ +#define CS4231_PLAYBK_FORMAT 0x08 /* clock and data format - playback - bits 7-0 MCE */ +#define CS4231_IFACE_CTRL 0x09 /* interface control - bits 7-2 MCE */ +#define CS4231_PIN_CTRL 0x0a /* pin control */ +#define CS4231_TEST_INIT 0x0b /* test and initialization */ +#define CS4231_MISC_INFO 0x0c /* miscellaneaous information */ +#define CS4231_LOOPBACK 0x0d /* loopback control */ +#define CS4231_PLY_UPR_CNT 0x0e /* playback upper base count */ +#define CS4231_PLY_LWR_CNT 0x0f /* playback lower base count */ +#define CS4231_ALT_FEATURE_1 0x10 /* alternate #1 feature enable */ +#define AD1845_AF1_MIC_LEFT 0x10 /* alternate #1 feature + MIC left */ +#define CS4231_ALT_FEATURE_2 0x11 /* alternate #2 feature enable */ +#define AD1845_AF2_MIC_RIGHT 0x11 /* alternate #2 feature + MIC right */ +#define CS4231_LEFT_LINE_IN 0x12 /* left line input control */ +#define CS4231_RIGHT_LINE_IN 0x13 /* right line input control */ +#define CS4231_TIMER_LOW 0x14 /* timer low byte */ +#define CS4231_TIMER_HIGH 0x15 /* timer high byte */ +#define CS4231_LEFT_MIC_INPUT 0x16 /* left MIC input control register (InterWave only) */ +#define AD1845_UPR_FREQ_SEL 0x16 /* upper byte of frequency select */ +#define CS4231_RIGHT_MIC_INPUT 0x17 /* right MIC input control register (InterWave only) */ +#define AD1845_LWR_FREQ_SEL 0x17 /* lower byte of frequency select */ +#define CS4236_EXT_REG 0x17 /* extended register access */ +#define CS4231_IRQ_STATUS 0x18 /* irq status register */ +#define CS4231_LINE_LEFT_OUTPUT 0x19 /* left line output control register (InterWave only) */ +#define CS4231_VERSION 0x19 /* CS4231(A) - version values */ +#define CS4231_MONO_CTRL 0x1a /* mono input/output control */ +#define CS4231_LINE_RIGHT_OUTPUT 0x1b /* right line output control register (InterWave only) */ +#define AD1845_PWR_DOWN 0x1b /* power down control */ +#define CS4235_LEFT_MASTER 0x1b /* left master output control */ +#define CS4231_REC_FORMAT 0x1c /* clock and data format - record - bits 7-0 MCE */ +#define CS4231_PLY_VAR_FREQ 0x1d /* playback variable frequency */ +#define AD1845_CLOCK 0x1d /* crystal clock select and total power down */ +#define CS4235_RIGHT_MASTER 0x1d /* right master output control */ +#define CS4231_REC_UPR_CNT 0x1e /* record upper count */ +#define CS4231_REC_LWR_CNT 0x1f /* record lower count */ + +/* definitions for codec register select port - CODECP( REGSEL ) */ + +#define CS4231_INIT 0x80 /* CODEC is initializing */ +#define CS4231_MCE 0x40 /* mode change enable */ +#define CS4231_TRD 0x20 /* transfer request disable */ + +/* definitions for codec status register - CODECP( STATUS ) */ + +#define CS4231_GLOBALIRQ 0x01 /* IRQ is active */ + +/* definitions for codec irq status */ + +#define CS4231_PLAYBACK_IRQ 0x10 +#define CS4231_RECORD_IRQ 0x20 +#define CS4231_TIMER_IRQ 0x40 +#define CS4231_ALL_IRQS 0x70 +#define CS4231_REC_UNDERRUN 0x08 +#define CS4231_REC_OVERRUN 0x04 +#define CS4231_PLY_OVERRUN 0x02 +#define CS4231_PLY_UNDERRUN 0x01 + +/* definitions for CS4231_LEFT_INPUT and CS4231_RIGHT_INPUT registers */ + +#define CS4231_ENABLE_MIC_GAIN 0x20 + +#define CS4231_MIXS_LINE 0x00 +#define CS4231_MIXS_AUX1 0x40 +#define CS4231_MIXS_MIC 0x80 +#define CS4231_MIXS_ALL 0xc0 + +/* definitions for clock and data format register - CS4231_PLAYBK_FORMAT */ + +#define CS4231_LINEAR_8 0x00 /* 8-bit unsigned data */ +#define CS4231_ALAW_8 0x60 /* 8-bit A-law companded */ +#define CS4231_ULAW_8 0x20 /* 8-bit U-law companded */ +#define CS4231_LINEAR_16 0x40 /* 16-bit twos complement data - little endian */ +#define CS4231_LINEAR_16_BIG 0xc0 /* 16-bit twos complement data - big endian */ +#define CS4231_ADPCM_16 0xa0 /* 16-bit ADPCM */ +#define CS4231_STEREO 0x10 /* stereo mode */ +/* bits 3-1 define frequency divisor */ +#define CS4231_XTAL1 0x00 /* 24.576 crystal */ +#define CS4231_XTAL2 0x01 /* 16.9344 crystal */ + +/* definitions for interface control register - CS4231_IFACE_CTRL */ + +#define CS4231_RECORD_PIO 0x80 /* record PIO enable */ +#define CS4231_PLAYBACK_PIO 0x40 /* playback PIO enable */ +#define CS4231_CALIB_MODE 0x18 /* calibration mode bits */ +#define CS4231_AUTOCALIB 0x08 /* auto calibrate */ +#define CS4231_SINGLE_DMA 0x04 /* use single DMA channel */ +#define CS4231_RECORD_ENABLE 0x02 /* record enable */ +#define CS4231_PLAYBACK_ENABLE 0x01 /* playback enable */ + +/* definitions for pin control register - CS4231_PIN_CTRL */ + +#define CS4231_IRQ_ENABLE 0x02 /* enable IRQ */ +#define CS4231_XCTL1 0x40 /* external control #1 */ +#define CS4231_XCTL0 0x80 /* external control #0 */ + +/* definitions for test and init register - CS4231_TEST_INIT */ + +#define CS4231_CALIB_IN_PROGRESS 0x20 /* auto calibrate in progress */ +#define CS4231_DMA_REQUEST 0x10 /* DMA request in progress */ + +/* definitions for misc control register - CS4231_MISC_INFO */ + +#define CS4231_MODE2 0x40 /* MODE 2 */ +#define CS4231_IW_MODE3 0x6c /* MODE 3 - InterWave enhanced mode */ +#define CS4231_4236_MODE3 0xe0 /* MODE 3 - CS4236+ enhanced mode */ + +/* definitions for alternate feature 1 register - CS4231_ALT_FEATURE_1 */ + +#define CS4231_DACZ 0x01 /* zero DAC when underrun */ +#define CS4231_TIMER_ENABLE 0x40 /* codec timer enable */ +#define CS4231_OLB 0x80 /* output level bit */ + +/* definitions for Extended Registers - CS4236+ */ + +#define CS4236_REG(i23val) (((i23val << 2) & 0x10) | ((i23val >> 4) & 0x0f)) +#define CS4236_I23VAL(reg) ((((reg)&0xf) << 4) | (((reg)&0x10) >> 2) | 0x8) + +#define CS4236_LEFT_LINE 0x08 /* left LINE alternate volume */ +#define CS4236_RIGHT_LINE 0x18 /* right LINE alternate volume */ +#define CS4236_LEFT_MIC 0x28 /* left MIC volume */ +#define CS4236_RIGHT_MIC 0x38 /* right MIC volume */ +#define CS4236_LEFT_MIX_CTRL 0x48 /* synthesis and left input mixer control */ +#define CS4236_RIGHT_MIX_CTRL 0x58 /* right input mixer control */ +#define CS4236_LEFT_FM 0x68 /* left FM volume */ +#define CS4236_RIGHT_FM 0x78 /* right FM volume */ +#define CS4236_LEFT_DSP 0x88 /* left DSP serial port volume */ +#define CS4236_RIGHT_DSP 0x98 /* right DSP serial port volume */ +#define CS4236_RIGHT_LOOPBACK 0xa8 /* right loopback monitor volume */ +#define CS4236_DAC_MUTE 0xb8 /* DAC mute and IFSE enable */ +#define CS4236_ADC_RATE 0xc8 /* indenpendent ADC sample frequency */ +#define CS4236_DAC_RATE 0xd8 /* indenpendent DAC sample frequency */ +#define CS4236_LEFT_MASTER 0xe8 /* left master digital audio volume */ +#define CS4236_RIGHT_MASTER 0xf8 /* right master digital audio volume */ +#define CS4236_LEFT_WAVE 0x0c /* left wavetable serial port volume */ +#define CS4236_RIGHT_WAVE 0x1c /* right wavetable serial port volume */ +#define CS4236_VERSION 0x9c /* chip version and ID */ + +#endif /* __SOUND_CS4231_REGS_H */ diff -uNrp linux-2.6.23.orig/include/sound/cs4231.h linux-2.6.23/include/sound/cs4231.h --- linux-2.6.23.orig/include/sound/cs4231.h 2007-07-09 01:32:17.000000000 +0200 +++ linux-2.6.23/include/sound/cs4231.h 2007-09-03 18:27:20.211443943 +0200 @@ -26,160 +26,7 @@ #include "pcm.h" #include "timer.h" -/* IO ports */ - -#define CS4231P(x) (c_d_c_CS4231##x) - -#define c_d_c_CS4231REGSEL 0 -#define c_d_c_CS4231REG 1 -#define c_d_c_CS4231STATUS 2 -#define c_d_c_CS4231PIO 3 - -/* codec registers */ - -#define CS4231_LEFT_INPUT 0x00 /* left input control */ -#define CS4231_RIGHT_INPUT 0x01 /* right input control */ -#define CS4231_AUX1_LEFT_INPUT 0x02 /* left AUX1 input control */ -#define CS4231_AUX1_RIGHT_INPUT 0x03 /* right AUX1 input control */ -#define CS4231_AUX2_LEFT_INPUT 0x04 /* left AUX2 input control */ -#define CS4231_AUX2_RIGHT_INPUT 0x05 /* right AUX2 input control */ -#define CS4231_LEFT_OUTPUT 0x06 /* left output control register */ -#define CS4231_RIGHT_OUTPUT 0x07 /* right output control register */ -#define CS4231_PLAYBK_FORMAT 0x08 /* clock and data format - playback - bits 7-0 MCE */ -#define CS4231_IFACE_CTRL 0x09 /* interface control - bits 7-2 MCE */ -#define CS4231_PIN_CTRL 0x0a /* pin control */ -#define CS4231_TEST_INIT 0x0b /* test and initialization */ -#define CS4231_MISC_INFO 0x0c /* miscellaneaous information */ -#define CS4231_LOOPBACK 0x0d /* loopback control */ -#define CS4231_PLY_UPR_CNT 0x0e /* playback upper base count */ -#define CS4231_PLY_LWR_CNT 0x0f /* playback lower base count */ -#define CS4231_ALT_FEATURE_1 0x10 /* alternate #1 feature enable */ -#define AD1845_AF1_MIC_LEFT 0x10 /* alternate #1 feature + MIC left */ -#define CS4231_ALT_FEATURE_2 0x11 /* alternate #2 feature enable */ -#define AD1845_AF2_MIC_RIGHT 0x11 /* alternate #2 feature + MIC right */ -#define CS4231_LEFT_LINE_IN 0x12 /* left line input control */ -#define CS4231_RIGHT_LINE_IN 0x13 /* right line input control */ -#define CS4231_TIMER_LOW 0x14 /* timer low byte */ -#define CS4231_TIMER_HIGH 0x15 /* timer high byte */ -#define CS4231_LEFT_MIC_INPUT 0x16 /* left MIC input control register (InterWave only) */ -#define AD1845_UPR_FREQ_SEL 0x16 /* upper byte of frequency select */ -#define CS4231_RIGHT_MIC_INPUT 0x17 /* right MIC input control register (InterWave only) */ -#define AD1845_LWR_FREQ_SEL 0x17 /* lower byte of frequency select */ -#define CS4236_EXT_REG 0x17 /* extended register access */ -#define CS4231_IRQ_STATUS 0x18 /* irq status register */ -#define CS4231_LINE_LEFT_OUTPUT 0x19 /* left line output control register (InterWave only) */ -#define CS4231_VERSION 0x19 /* CS4231(A) - version values */ -#define CS4231_MONO_CTRL 0x1a /* mono input/output control */ -#define CS4231_LINE_RIGHT_OUTPUT 0x1b /* right line output control register (InterWave only) */ -#define AD1845_PWR_DOWN 0x1b /* power down control */ -#define CS4235_LEFT_MASTER 0x1b /* left master output control */ -#define CS4231_REC_FORMAT 0x1c /* clock and data format - record - bits 7-0 MCE */ -#define CS4231_PLY_VAR_FREQ 0x1d /* playback variable frequency */ -#define AD1845_CLOCK 0x1d /* crystal clock select and total power down */ -#define CS4235_RIGHT_MASTER 0x1d /* right master output control */ -#define CS4231_REC_UPR_CNT 0x1e /* record upper count */ -#define CS4231_REC_LWR_CNT 0x1f /* record lower count */ - -/* definitions for codec register select port - CODECP( REGSEL ) */ - -#define CS4231_INIT 0x80 /* CODEC is initializing */ -#define CS4231_MCE 0x40 /* mode change enable */ -#define CS4231_TRD 0x20 /* transfer request disable */ - -/* definitions for codec status register - CODECP( STATUS ) */ - -#define CS4231_GLOBALIRQ 0x01 /* IRQ is active */ - -/* definitions for codec irq status */ - -#define CS4231_PLAYBACK_IRQ 0x10 -#define CS4231_RECORD_IRQ 0x20 -#define CS4231_TIMER_IRQ 0x40 -#define CS4231_ALL_IRQS 0x70 -#define CS4231_REC_UNDERRUN 0x08 -#define CS4231_REC_OVERRUN 0x04 -#define CS4231_PLY_OVERRUN 0x02 -#define CS4231_PLY_UNDERRUN 0x01 - -/* definitions for CS4231_LEFT_INPUT and CS4231_RIGHT_INPUT registers */ - -#define CS4231_ENABLE_MIC_GAIN 0x20 - -#define CS4231_MIXS_LINE 0x00 -#define CS4231_MIXS_AUX1 0x40 -#define CS4231_MIXS_MIC 0x80 -#define CS4231_MIXS_ALL 0xc0 - -/* definitions for clock and data format register - CS4231_PLAYBK_FORMAT */ - -#define CS4231_LINEAR_8 0x00 /* 8-bit unsigned data */ -#define CS4231_ALAW_8 0x60 /* 8-bit A-law companded */ -#define CS4231_ULAW_8 0x20 /* 8-bit U-law companded */ -#define CS4231_LINEAR_16 0x40 /* 16-bit twos complement data - little endian */ -#define CS4231_LINEAR_16_BIG 0xc0 /* 16-bit twos complement data - big endian */ -#define CS4231_ADPCM_16 0xa0 /* 16-bit ADPCM */ -#define CS4231_STEREO 0x10 /* stereo mode */ -/* bits 3-1 define frequency divisor */ -#define CS4231_XTAL1 0x00 /* 24.576 crystal */ -#define CS4231_XTAL2 0x01 /* 16.9344 crystal */ - -/* definitions for interface control register - CS4231_IFACE_CTRL */ - -#define CS4231_RECORD_PIO 0x80 /* record PIO enable */ -#define CS4231_PLAYBACK_PIO 0x40 /* playback PIO enable */ -#define CS4231_CALIB_MODE 0x18 /* calibration mode bits */ -#define CS4231_AUTOCALIB 0x08 /* auto calibrate */ -#define CS4231_SINGLE_DMA 0x04 /* use single DMA channel */ -#define CS4231_RECORD_ENABLE 0x02 /* record enable */ -#define CS4231_PLAYBACK_ENABLE 0x01 /* playback enable */ - -/* definitions for pin control register - CS4231_PIN_CTRL */ - -#define CS4231_IRQ_ENABLE 0x02 /* enable IRQ */ -#define CS4231_XCTL1 0x40 /* external control #1 */ -#define CS4231_XCTL0 0x80 /* external control #0 */ - -/* definitions for test and init register - CS4231_TEST_INIT */ - -#define CS4231_CALIB_IN_PROGRESS 0x20 /* auto calibrate in progress */ -#define CS4231_DMA_REQUEST 0x10 /* DMA request in progress */ - -/* definitions for misc control register - CS4231_MISC_INFO */ - -#define CS4231_MODE2 0x40 /* MODE 2 */ -#define CS4231_IW_MODE3 0x6c /* MODE 3 - InterWave enhanced mode */ -#define CS4231_4236_MODE3 0xe0 /* MODE 3 - CS4236+ enhanced mode */ - -/* definitions for alternate feature 1 register - CS4231_ALT_FEATURE_1 */ - -#define CS4231_DACZ 0x01 /* zero DAC when underrun */ -#define CS4231_TIMER_ENABLE 0x40 /* codec timer enable */ -#define CS4231_OLB 0x80 /* output level bit */ - -/* definitions for Extended Registers - CS4236+ */ - -#define CS4236_REG(i23val) (((i23val << 2) & 0x10) | ((i23val >> 4) & 0x0f)) -#define CS4236_I23VAL(reg) ((((reg)&0xf) << 4) | (((reg)&0x10) >> 2) | 0x8) - -#define CS4236_LEFT_LINE 0x08 /* left LINE alternate volume */ -#define CS4236_RIGHT_LINE 0x18 /* right LINE alternate volume */ -#define CS4236_LEFT_MIC 0x28 /* left MIC volume */ -#define CS4236_RIGHT_MIC 0x38 /* right MIC volume */ -#define CS4236_LEFT_MIX_CTRL 0x48 /* synthesis and left input mixer control */ -#define CS4236_RIGHT_MIX_CTRL 0x58 /* right input mixer control */ -#define CS4236_LEFT_FM 0x68 /* left FM volume */ -#define CS4236_RIGHT_FM 0x78 /* right FM volume */ -#define CS4236_LEFT_DSP 0x88 /* left DSP serial port volume */ -#define CS4236_RIGHT_DSP 0x98 /* right DSP serial port volume */ -#define CS4236_RIGHT_LOOPBACK 0xa8 /* right loopback monitor volume */ -#define CS4236_DAC_MUTE 0xb8 /* DAC mute and IFSE enable */ -#define CS4236_ADC_RATE 0xc8 /* indenpendent ADC sample frequency */ -#define CS4236_DAC_RATE 0xd8 /* indenpendent DAC sample frequency */ -#define CS4236_LEFT_MASTER 0xe8 /* left master digital audio volume */ -#define CS4236_RIGHT_MASTER 0xf8 /* right master digital audio volume */ -#define CS4236_LEFT_WAVE 0x0c /* left wavetable serial port volume */ -#define CS4236_RIGHT_WAVE 0x1c /* right wavetable serial port volume */ -#define CS4236_VERSION 0x9c /* chip version and ID */ +#include "cs4231-regs.h" /* defines for codec.mode */

2 1

[alsa-devel] [PATCH] dbri: more cleanups (2nd version)
by Krzysztof Helt 04 Sep '07

04 Sep '07

From: Krzysztof Helt <krzysztof.h1(a)wp.pl> This patch: - removes redundant constant suffices - removes redundant parentheses - removes redundant curly brackets - removes check if a spinlock is locked inside method which is only called with the spinlock locked - moves few functions to the __init section - removes line which appears twice after the previous patch - minor comments improvements Signed-off-by: Krzysztof Helt <krzysztof.h1(a)wp.pl> --- Takashi, I fixed issues you pointed out. If you want more fixes of coding style, let me know and I'll prepare a separate patch. --- linux-2.6.22/sound/sparc/dbri.c 2007-09-03 20:51:40.000000000 +0200 +++ linux-2.6.23/sound/sparc/dbri.c 2007-09-03 20:53:27.000000000 +0200 @@ -233,12 +233,12 @@ static struct { ****************************************************************************/ /* DBRI main registers */ -#define REG0 0x00UL /* Status and Control */ -#define REG1 0x04UL /* Mode and Interrupt */ -#define REG2 0x08UL /* Parallel IO */ -#define REG3 0x0cUL /* Test */ -#define REG8 0x20UL /* Command Queue Pointer */ -#define REG9 0x24UL /* Interrupt Queue Pointer */ +#define REG0 0x00 /* Status and Control */ +#define REG1 0x04 /* Mode and Interrupt */ +#define REG2 0x08 /* Parallel IO */ +#define REG3 0x0c /* Test */ +#define REG8 0x20 /* Command Queue Pointer */ +#define REG9 0x24 /* Interrupt Queue Pointer */ #define DBRI_NO_CMDS 64 #define DBRI_INT_BLK 64 @@ -565,7 +565,7 @@ struct snd_dbri { /* Translate the ALSA direction into the array index */ #define DBRI_STREAMNO(substream) \ (substream->stream == \ - SNDRV_PCM_STREAM_PLAYBACK? DBRI_PLAY: DBRI_REC) + SNDRV_PCM_STREAM_PLAYBACK ? DBRI_PLAY: DBRI_REC) /* Return a pointer to dbri_streaminfo */ #define DBRI_STREAM(dbri, substream) \ @@ -611,8 +611,8 @@ The list is terminated with a WAIT comma CPU interrupt to signal completion. Since the DBRI can run in parallel with the CPU, several means of -synchronization present themselves. The method implemented here is only -use of the dbri_cmdwait() to wait for execution of batch of sent commands. +synchronization present themselves. The method implemented here uses +the dbri_cmdwait() to wait for execution of batch of sent commands. A circular command buffer is used here. A new command is being added while another can be executed. The scheme works by adding two WAIT commands @@ -648,15 +648,14 @@ static void dbri_cmdwait(struct snd_dbri } spin_unlock_irqrestore(&dbri->lock, flags); - if (maxloops == 0) { + if (maxloops == 0) printk(KERN_ERR "DBRI: Chip never completed command buffer\n"); - } else { + else dprintk(D_CMD, "Chip completed command buffer (%d)\n", MAXLOOPS - maxloops - 1); - } } /* - * Lock the command queue and returns pointer to a space for len cmd words + * Lock the command queue and return pointer to space for len cmd words * It locks the cmdlock spinlock. */ static s32 *dbri_cmdlock(struct snd_dbri *dbri, int len) @@ -749,7 +748,7 @@ static void dbri_reset(struct snd_dbri * } /* Lock must not be held before calling this */ -static void dbri_initialize(struct snd_dbri *dbri) +static void __init dbri_initialize(struct snd_dbri *dbri) { s32 *cmd; u32 dma_addr; @@ -804,7 +803,7 @@ list ordering, among other things. The here interface closely with the transmit and receive interrupt code. */ -static int pipe_active(struct snd_dbri *dbri, int pipe) +static inline int pipe_active(struct snd_dbri *dbri, int pipe) { return ((pipe >= 0) && (dbri->pipes[pipe].desc != -1)); } @@ -1148,6 +1147,7 @@ static int setup_descs(struct snd_dbri * if (!dbri->dma->desc[desc].ba) break; } + if (desc == DBRI_NO_DESCS) { printk(KERN_ERR "DBRI: setup_descs: No descriptors\n"); return -1; @@ -1308,7 +1308,7 @@ to the DBRI via the CHI interface and fe * Lock must not be held before calling it. */ -static void cs4215_setup_pipes(struct snd_dbri *dbri) +static __init void cs4215_setup_pipes(struct snd_dbri *dbri) { unsigned long flags; @@ -1341,7 +1341,7 @@ static void cs4215_setup_pipes(struct sn dbri_cmdwait(dbri); } -static int cs4215_init_data(struct cs4215 *mm) +static __init int cs4215_init_data(struct cs4215 *mm) { /* * No action, memory resetting only. @@ -1633,7 +1633,7 @@ static int cs4215_prepare(struct snd_dbr /* * */ -static int cs4215_init(struct snd_dbri *dbri) +static __init int cs4215_init(struct snd_dbri *dbri) { u32 reg2 = sbus_readl(dbri->regs + REG2); dprintk(D_MM, "cs4215_init: reg2=0x%x\n", reg2); @@ -1771,13 +1771,10 @@ static void xmit_descs(struct snd_dbri * static void transmission_complete_intr(struct snd_dbri *dbri, int pipe) { - struct dbri_streaminfo *info; - int td; + struct dbri_streaminfo *info = &dbri->stream_info[DBRI_PLAY]; + int td = dbri->pipes[pipe].desc; int status; - info = &dbri->stream_info[DBRI_PLAY]; - - td = dbri->pipes[pipe].desc; while (td >= 0) { if (td >= DBRI_NO_DESCS) { printk(KERN_ERR "DBRI: invalid td on pipe %d\n", pipe); @@ -1798,12 +1795,9 @@ static void transmission_complete_intr(s } /* Notify ALSA */ - if (spin_is_locked(&dbri->lock)) { - spin_unlock(&dbri->lock); - snd_pcm_period_elapsed(info->substream); - spin_lock(&dbri->lock); - } else - snd_pcm_period_elapsed(info->substream); + spin_unlock(&dbri->lock); + snd_pcm_period_elapsed(info->substream); + spin_lock(&dbri->lock); } static void reception_complete_intr(struct snd_dbri *dbri, int pipe) @@ -1830,12 +1824,9 @@ static void reception_complete_intr(stru rd, DBRI_RD_STATUS(status), DBRI_RD_CNT(status)); /* Notify ALSA */ - if (spin_is_locked(&dbri->lock)) { - spin_unlock(&dbri->lock); - snd_pcm_period_elapsed(info->substream); - spin_lock(&dbri->lock); - } else - snd_pcm_period_elapsed(info->substream); + spin_unlock(&dbri->lock); + snd_pcm_period_elapsed(info->substream); + spin_lock(&dbri->lock); } static void dbri_process_one_interrupt(struct snd_dbri *dbri, int x) @@ -1986,10 +1977,10 @@ static irqreturn_t snd_dbri_interrupt(in PCM Interface ****************************************************************************/ static struct snd_pcm_hardware snd_dbri_pcm_hw = { - .info = (SNDRV_PCM_INFO_MMAP | - SNDRV_PCM_INFO_INTERLEAVED | - SNDRV_PCM_INFO_BLOCK_TRANSFER | - SNDRV_PCM_INFO_MMAP_VALID), + .info = SNDRV_PCM_INFO_MMAP | + SNDRV_PCM_INFO_INTERLEAVED | + SNDRV_PCM_INFO_BLOCK_TRANSFER | + SNDRV_PCM_INFO_MMAP_VALID, .formats = SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW | SNDRV_PCM_FMTBIT_U8 | @@ -1999,7 +1990,7 @@ static struct snd_pcm_hardware snd_dbri_ .rate_max = 48000, .channels_min = 1, .channels_max = 2, - .buffer_bytes_max = (64 * 1024), + .buffer_bytes_max = 64 * 1024, .period_bytes_min = 1, .period_bytes_max = DBRI_TD_MAXCNT, .periods_min = 1, @@ -2266,11 +2257,10 @@ static int snd_cs4215_info_volume(struct uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; uinfo->count = 2; uinfo->value.integer.min = 0; - if (kcontrol->private_value == DBRI_PLAY) { + if (kcontrol->private_value == DBRI_PLAY) uinfo->value.integer.max = DBRI_MAX_VOLUME; - } else { + else uinfo->value.integer.max = DBRI_MAX_GAIN; - } return 0; } @@ -2304,7 +2294,7 @@ static int snd_cs4215_put_volume(struct info->right_gain = ucontrol->value.integer.value[1]; changed = 1; } - if (changed == 1) { + if (changed) { /* First mute outputs, and wait 1/8000 sec (125 us) * to make sure this takes. This avoids clicking noises. */ @@ -2443,8 +2433,9 @@ static int __init snd_dbri_mixer(struct strcpy(card->mixername, card->shortname); for (idx = 0; idx < ARRAY_SIZE(dbri_controls); idx++) { - if ((err = snd_ctl_add(card, - snd_ctl_new1(&dbri_controls[idx], dbri))) < 0) + err = snd_ctl_add(card, + snd_ctl_new1(&dbri_controls[idx], dbri)); + if (err < 0) return err; } @@ -2485,8 +2476,8 @@ static void dbri_debug_read(struct snd_i "Pipe %d: %s SDP=0x%x desc=%d, " "len=%d next %d\n", pipe, - ((pptr->sdp & D_SDP_TO_SER) ? "output" : - "input"), + (pptr->sdp & D_SDP_TO_SER) ? "output" : + "input", pptr->sdp, pptr->desc, pptr->length, pptr->nextpipe); } @@ -2502,7 +2493,7 @@ void snd_dbri_proc(struct snd_dbri *dbri snd_info_set_text_ops(entry, dbri, dbri_regs_read); #ifdef DBRI_DEBUG - if (! snd_card_proc_new(dbri->card, "debug", &entry)) { + if (!snd_card_proc_new(dbri->card, "debug", &entry)) { snd_info_set_text_ops(entry, dbri, dbri_debug_read); entry->mode = S_IFREG | S_IRUGO; /* Readable only. */ } @@ -2633,11 +2624,12 @@ static int __init dbri_attach(int prom_n } dbri = card->private_data; - if ((err = snd_dbri_pcm(dbri)) < 0) + err = snd_dbri_pcm(dbri); + if (err < 0) goto _err; - if ((err = snd_dbri_mixer(dbri)) < 0) - if ((err = snd_dbri_mixer(dbri)) < 0) + err = snd_dbri_mixer(dbri); + if (err < 0) goto _err; /* /proc file handling */

2 1

[alsa-devel] [PATCH] sun-cs4231: code improvements (2nd version)
by Krzysztof Helt 04 Sep '07

04 Sep '07

From: Krzysztof Helt <krzysztof.h1(a)wp.pl> This patch does some code improvements to make driver (both code and binary) shorter. It also make use of card->private_data pointer to store chip information. Signed-off-by: Krzysztof Helt <krzysztof.h1(a)wp.pl> --- Do I understand correctly, that lines: if ((err = function()) < 0) are passe now? They are so abudant in the alsa code, that I thought it is some kind of template code. I can clean up drivers according to the checkpatch.pl script if it helps (above problem, long lines, etc). diff -urp linux-2.6.23.old/sound/sparc/cs4231.c linux-2.6.23/sound/sparc/cs4231.c --- linux-2.6.23.old/sound/sparc/cs4231.c 2007-09-02 14:02:32.000000000 +0200 +++ linux-2.6.23/sound/sparc/cs4231.c 2007-09-03 15:56:03.000000000 +0200 @@ -30,17 +30,11 @@ #ifdef CONFIG_SBUS #define SBUS_SUPPORT -#endif - -#ifdef SBUS_SUPPORT #include <asm/sbus.h> #endif #if defined(CONFIG_PCI) && defined(CONFIG_SPARC64) #define EBUS_SUPPORT -#endif - -#ifdef EBUS_SUPPORT #include <linux/pci.h> #include <asm/ebus.h> #endif @@ -339,7 +333,7 @@ static unsigned int rates[14] = { }; static struct snd_pcm_hw_constraint_list hw_constraints_rates = { - .count = 14, + .count = ARRAY_SIZE(rates), .list = rates, }; @@ -389,116 +383,85 @@ static unsigned char snd_cs4231_original static u8 __cs4231_readb(struct snd_cs4231 *cp, void __iomem *reg_addr) { #ifdef EBUS_SUPPORT - if (cp->flags & CS4231_FLAG_EBUS) { + if (cp->flags & CS4231_FLAG_EBUS) return readb(reg_addr); - } else { + else #endif #ifdef SBUS_SUPPORT return sbus_readb(reg_addr); #endif -#ifdef EBUS_SUPPORT - } -#endif } static void __cs4231_writeb(struct snd_cs4231 *cp, u8 val, void __iomem *reg_addr) { #ifdef EBUS_SUPPORT - if (cp->flags & CS4231_FLAG_EBUS) { + if (cp->flags & CS4231_FLAG_EBUS) return writeb(val, reg_addr); - } else { + else #endif #ifdef SBUS_SUPPORT return sbus_writeb(val, reg_addr); #endif -#ifdef EBUS_SUPPORT - } -#endif } /* * Basic I/O functions */ -static void snd_cs4231_outm(struct snd_cs4231 *chip, unsigned char reg, - unsigned char mask, unsigned char value) +static void snd_cs4231_ready(struct snd_cs4231 *chip) { int timeout; - unsigned char tmp; for (timeout = 250; timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT); timeout--) udelay(100); -#ifdef CONFIG_SND_DEBUG - if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT) - snd_printdd("outm: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value); -#endif - if (chip->calibrate_mute) { - chip->image[reg] &= mask; - chip->image[reg] |= value; - } else { - __cs4231_writeb(chip, chip->mce_bit | reg, CS4231P(chip, REGSEL)); - mb(); - tmp = (chip->image[reg] & mask) | value; - __cs4231_writeb(chip, tmp, CS4231P(chip, REG)); - chip->image[reg] = tmp; - mb(); - } } static void snd_cs4231_dout(struct snd_cs4231 *chip, unsigned char reg, unsigned char value) { - int timeout; - - for (timeout = 250; - timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT); - timeout--) - udelay(100); + snd_cs4231_ready(chip); #ifdef CONFIG_SND_DEBUG if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT) - snd_printdd("out: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value); + snd_printdd("out: auto calibration time out - reg = 0x%x, " + "value = 0x%x\n", + reg, value); #endif __cs4231_writeb(chip, chip->mce_bit | reg, CS4231P(chip, REGSEL)); + wmb(); __cs4231_writeb(chip, value, CS4231P(chip, REG)); mb(); } -static void snd_cs4231_out(struct snd_cs4231 *chip, unsigned char reg, unsigned char value) +static inline void snd_cs4231_outm(struct snd_cs4231 *chip, unsigned char reg, + unsigned char mask, unsigned char value) { - int timeout; + unsigned char tmp = (chip->image[reg] & mask) | value; - for (timeout = 250; - timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT); - timeout--) - udelay(100); -#ifdef CONFIG_SND_DEBUG - if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT) - snd_printdd("out: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value); -#endif - __cs4231_writeb(chip, chip->mce_bit | reg, CS4231P(chip, REGSEL)); - __cs4231_writeb(chip, value, CS4231P(chip, REG)); + chip->image[reg] = tmp; + if (!chip->calibrate_mute) + snd_cs4231_dout(chip, reg, tmp); +} + +static void snd_cs4231_out(struct snd_cs4231 *chip, unsigned char reg, + unsigned char value) +{ + snd_cs4231_dout(chip, reg, value); chip->image[reg] = value; mb(); } static unsigned char snd_cs4231_in(struct snd_cs4231 *chip, unsigned char reg) { - int timeout; - unsigned char ret; - - for (timeout = 250; - timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT); - timeout--) - udelay(100); + snd_cs4231_ready(chip); #ifdef CONFIG_SND_DEBUG if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT) - snd_printdd("in: auto calibration time out - reg = 0x%x\n", reg); + snd_printdd("in: auto calibration time out - reg = 0x%x\n", + reg); #endif __cs4231_writeb(chip, chip->mce_bit | reg, CS4231P(chip, REGSEL)); mb(); - ret = __cs4231_readb(chip, CS4231P(chip, REG)); - return ret; + return __cs4231_readb(chip, CS4231P(chip, REG)); } /* @@ -517,7 +480,7 @@ static void snd_cs4231_busy_wait(struct for (timeout = 500; timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT); timeout--) - udelay(1000); + msleep(1); } static void snd_cs4231_mce_up(struct snd_cs4231 *chip) @@ -526,8 +489,7 @@ static void snd_cs4231_mce_up(struct snd int timeout; spin_lock_irqsave(&chip->lock, flags); - for (timeout = 250; timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT); timeout--) - udelay(100); + snd_cs4231_ready(chip); #ifdef CONFIG_SND_DEBUG if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT) snd_printdd("mce_up - auto calibration time out (0)\n"); @@ -565,8 +527,8 @@ static void snd_cs4231_mce_down(struct s /* calibration process */ - for (timeout = 500; timeout > 0 && (snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) == 0; timeout--) - udelay(100); + snd_cs4231_ready(chip); + snd_cs4231_ready(chip); if ((snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) == 0) { snd_printd("cs4231_mce_down - auto calibration time out (1)\n"); spin_unlock_irqrestore(&chip->lock, flags); @@ -1058,11 +1020,6 @@ static int snd_cs4231_playback_hw_params return 0; } -static int snd_cs4231_playback_hw_free(struct snd_pcm_substream *substream) -{ - return snd_pcm_lib_free_pages(substream); -} - static int snd_cs4231_playback_prepare(struct snd_pcm_substream *substream) { struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); @@ -1100,11 +1057,6 @@ static int snd_cs4231_capture_hw_params( return 0; } -static int snd_cs4231_capture_hw_free(struct snd_pcm_substream *substream) -{ - return snd_pcm_lib_free_pages(substream); -} - static int snd_cs4231_capture_prepare(struct snd_pcm_substream *substream) { struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); @@ -1182,10 +1134,6 @@ static snd_pcm_uframes_t snd_cs4231_capt return bytes_to_frames(substream->runtime, ptr); } -/* - - */ - static int __init snd_cs4231_probe(struct snd_cs4231 *chip) { unsigned long flags; @@ -1356,7 +1304,7 @@ static struct snd_pcm_ops snd_cs4231_pla .close = snd_cs4231_playback_close, .ioctl = snd_pcm_lib_ioctl, .hw_params = snd_cs4231_playback_hw_params, - .hw_free = snd_cs4231_playback_hw_free, + .hw_free = snd_pcm_lib_free_pages, .prepare = snd_cs4231_playback_prepare, .trigger = snd_cs4231_trigger, .pointer = snd_cs4231_playback_pointer, @@ -1367,18 +1315,20 @@ static struct snd_pcm_ops snd_cs4231_cap .close = snd_cs4231_capture_close, .ioctl = snd_pcm_lib_ioctl, .hw_params = snd_cs4231_capture_hw_params, - .hw_free = snd_cs4231_capture_hw_free, + .hw_free = snd_pcm_lib_free_pages, .prepare = snd_cs4231_capture_prepare, .trigger = snd_cs4231_trigger, .pointer = snd_cs4231_capture_pointer, }; -static int __init snd_cs4231_pcm(struct snd_cs4231 *chip) +static int __init snd_cs4231_pcm(struct snd_card *card) { + struct snd_cs4231 *chip = card->private_data; struct snd_pcm *pcm; int err; - if ((err = snd_pcm_new(chip->card, "CS4231", 0, 1, 1, &pcm)) < 0) + err = snd_pcm_new(card, "CS4231", 0, 1, 1, &pcm); + if (err < 0) return err; snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_cs4231_playback_ops); @@ -1396,8 +1346,9 @@ static int __init snd_cs4231_pcm(struct return 0; } -static int __init snd_cs4231_timer(struct snd_cs4231 *chip) +static int __init snd_cs4231_timer(struct snd_card *card) { + struct snd_cs4231 *chip = card->private_data; struct snd_timer *timer; struct snd_timer_id tid; int err; @@ -1405,10 +1356,11 @@ static int __init snd_cs4231_timer(struc /* Timer initialization */ tid.dev_class = SNDRV_TIMER_CLASS_CARD; tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE; - tid.card = chip->card->number; + tid.card = card->number; tid.device = 0; tid.subdevice = 0; - if ((err = snd_timer_new(chip->card, "CS4231", &tid, &timer)) < 0) + err = snd_timer_new(card, "CS4231", &tid, &timer); + if (err < 0) return err; strcpy(timer->name, "CS4231"); timer->private_data = chip; @@ -1428,9 +1380,7 @@ static int snd_cs4231_info_mux(struct sn static char *texts[4] = { "Line", "CD", "Mic", "Mix" }; - struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); - snd_assert(chip->card != NULL, return -EINVAL); uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; uinfo->count = 2; uinfo->value.enumerated.items = 4; @@ -1670,21 +1620,19 @@ CS4231_SINGLE("Line Out Switch", 0, CS42 CS4231_SINGLE("Headphone Out Switch", 0, CS4231_PIN_CTRL, 7, 1, 1) }; -static int __init snd_cs4231_mixer(struct snd_cs4231 *chip) +static int __init snd_cs4231_mixer(struct snd_card *card) { - struct snd_card *card; + struct snd_cs4231 *chip = card->private_data; int err, idx; snd_assert(chip != NULL && chip->pcm != NULL, return -EINVAL); - card = chip->card; - strcpy(card->mixername, chip->pcm->name); for (idx = 0; idx < ARRAY_SIZE(snd_cs4231_controls); idx++) { - if ((err = snd_ctl_add(card, - snd_ctl_new1(&snd_cs4231_controls[idx], - chip))) < 0) + err = snd_ctl_add(card, + snd_ctl_new1(&snd_cs4231_controls[idx], chip)); + if (err < 0) return err; } return 0; @@ -1695,6 +1643,7 @@ static int dev; static int __init cs4231_attach_begin(struct snd_card **rcard) { struct snd_card *card; + struct snd_cs4231 *chip; *rcard = NULL; @@ -1706,31 +1655,40 @@ static int __init cs4231_attach_begin(st return -ENOENT; } - card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0); + card = snd_card_new(index[dev], id[dev], THIS_MODULE, + sizeof(struct snd_cs4231)); if (card == NULL) return -ENOMEM; strcpy(card->driver, "CS4231"); strcpy(card->shortname, "Sun CS4231"); + chip = card->private_data; + chip->card = card; + *rcard = card; return 0; } -static int __init cs4231_attach_finish(struct snd_card *card, struct snd_cs4231 *chip) +static int __init cs4231_attach_finish(struct snd_card *card) { + struct snd_cs4231 *chip = card->private_data; int err; - if ((err = snd_cs4231_pcm(chip)) < 0) + err = snd_cs4231_pcm(card); + if (err < 0) goto out_err; - if ((err = snd_cs4231_mixer(chip)) < 0) + err = snd_cs4231_mixer(card); + if (err < 0) goto out_err; - if ((err = snd_cs4231_timer(chip)) < 0) + err = snd_cs4231_timer(card); + if (err < 0) goto out_err; - if ((err = snd_card_register(card)) < 0) + err = snd_card_register(card); + if (err < 0) goto out_err; chip->next = cs4231_list; @@ -1925,23 +1883,16 @@ static struct snd_device_ops snd_cs4231_ static int __init snd_cs4231_sbus_create(struct snd_card *card, struct sbus_dev *sdev, - int dev, - struct snd_cs4231 **rchip) + int dev) { - struct snd_cs4231 *chip; + struct snd_cs4231 *chip = card->private_data; int err; - *rchip = NULL; - chip = kzalloc(sizeof(*chip), GFP_KERNEL); - if (chip == NULL) - return -ENOMEM; - spin_lock_init(&chip->lock); spin_lock_init(&chip->c_dma.sbus_info.lock); spin_lock_init(&chip->p_dma.sbus_info.lock); mutex_init(&chip->mce_mutex); mutex_init(&chip->open_mutex); - chip->card = card; chip->dev_u.sdev = sdev; chip->regs_size = sdev->reg_addrs[0].reg_size; memcpy(&chip->image, &snd_cs4231_original_image, @@ -1992,14 +1943,12 @@ static int __init snd_cs4231_sbus_create return err; } - *rchip = chip; return 0; } static int __init cs4231_sbus_attach(struct sbus_dev *sdev) { struct resource *rp = &sdev->resource[0]; - struct snd_cs4231 *cp; struct snd_card *card; int err; @@ -2013,12 +1962,13 @@ static int __init cs4231_sbus_attach(str (unsigned long long)rp->start, sdev->irqs[0]); - if ((err = snd_cs4231_sbus_create(card, sdev, dev, &cp)) < 0) { + err = snd_cs4231_sbus_create(card, sdev, dev); + if (err < 0) { snd_card_free(card); return err; } - return cs4231_attach_finish(card, cp); + return cs4231_attach_finish(card); } #endif @@ -2105,24 +2055,17 @@ static struct snd_device_ops snd_cs4231_ static int __init snd_cs4231_ebus_create(struct snd_card *card, struct linux_ebus_device *edev, - int dev, - struct snd_cs4231 **rchip) + int dev) { - struct snd_cs4231 *chip; + struct snd_cs4231 *chip = card->private_data; int err; - *rchip = NULL; - chip = kzalloc(sizeof(*chip), GFP_KERNEL); - if (chip == NULL) - return -ENOMEM; - spin_lock_init(&chip->lock); spin_lock_init(&chip->c_dma.ebus_info.lock); spin_lock_init(&chip->p_dma.ebus_info.lock); mutex_init(&chip->mce_mutex); mutex_init(&chip->open_mutex); chip->flags |= CS4231_FLAG_EBUS; - chip->card = card; chip->dev_u.pdev = edev->bus->self; memcpy(&chip->image, &snd_cs4231_original_image, sizeof(snd_cs4231_original_image)); @@ -2192,14 +2135,12 @@ static int __init snd_cs4231_ebus_create return err; } - *rchip = chip; return 0; } static int __init cs4231_ebus_attach(struct linux_ebus_device *edev) { struct snd_card *card; - struct snd_cs4231 *chip; int err; err = cs4231_attach_begin(&card); @@ -2211,12 +2152,13 @@ static int __init cs4231_ebus_attach(str edev->resource[0].start, edev->irqs[0]); - if ((err = snd_cs4231_ebus_create(card, edev, dev, &chip)) < 0) { + err = snd_cs4231_ebus_create(card, edev, dev); + if (err < 0) { snd_card_free(card); return err; } - return cs4231_attach_finish(card, chip); + return cs4231_attach_finish(card); } #endif

2 1

[alsa-devel] How to control the route in smartphone
by Leijin Tang 04 Sep '07

04 Sep '07

Hi all, When the audio codec is used in the smartphone, we get the problem how to define and control the route in the alsa driver. The scenario is only in the phone device. The application need switch the routes based on the different scene. Example: the coedec is wm9713L. the in port: LINEL，LINER，MONOIN，MIC1，MIC2, ac97_in the out port: HEADSET, SPEAKER, RECEIVER, ac97_out When the phone is coming, we need chose the route LINE to receiver. After the phone and we playing the mp3, We should switch the route ac97_in to speaker on. This scenario doesn’t appear in the PC. So how to carry out the function in the alsa architecture is so difficulty. The router names how to define, the alsa-lib how to do the control. By now, there has no design to the phone device in the alsa. Does anybody have some ideas? We can do some discussion and resolve the issue.

1 0

[alsa-devel] ALSA bug 0002948
by Brian Hinz 04 Sep '07

04 Sep '07

Hi, I'll apologize up front if this post seems a little incoherent, I've been trying to find a solution to this bug for a few months now and this is sort of a collection of observations that I've made and I'm hoping someone might read this and a light will go on... The problem is no sound from a stac9200 on various gateway models, although it's possible to get sound from the mic port, never from the hp or internal stereo speakers. I recently used a windows utility called "regmon" to log the registry events that occurred during a jack cycle on the hp port. I expected to see something like this: ... stsystra.exe:2380 SetValue HKLM\Software\Sigmatel\GlobalState\STSysTray\1.0\JackPresenced SUCCESS 0x0 ... indicating an event on port D, but instead got: ... SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Compressor\CompRatio SUCCESS 0xC8 SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Compressor\CompAttack SUCCESS 0x26B6 SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Compressor\CompRelease SUCCESS 0x26B6 SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Compressor\CompThreshDb SUCCESS 0xFFFFFDA8 SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Compressor\MakeupGainDB SUCCESS 0xC8 SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Compressor\GateRatio SUCCESS 0x258 SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Compressor\GateAttack SUCCESS 0x2706 SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Compressor\GateRelease SUCCESS 0x2706 SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Compressor\GateThreshDb SUCCESS 0xFFFFDCD8 SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Compressor\Flags SUCCESS 0x9 ... SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Limiter\CompRatio SUCCESS 0xE74 SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Limiter\CompAttack SUCCESS 0x26AC SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Limiter\CompRelease SUCCESS 0x26AC SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Limiter\CompThreshDb SUCCESS 0x0 SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Limiter\MakeupGainDB SUCCESS 0x0 SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Limiter\GateRatio SUCCESS 0x64 SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Limiter\GateAttack SUCCESS 0x2328 SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Limiter\GateRelease SUCCESS 0x2328 SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Limiter\GateThreshDb SUCCESS 0xFFFFDCD8 SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Limiter\Flags SUCCESS 0xB ... and upon removal: ... SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Compressor\CompRatio SUCCESS 0xC8 SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Compressor\CompAttack SUCCESS 0x26B6 SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Compressor\CompRelease SUCCESS 0x26B6 SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Compressor\CompThreshDb SUCCESS 0xFFFFFDA8 SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Compressor\MakeupGainDB SUCCESS 0xC8 SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Compressor\GateRatio SUCCESS 0x258 SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Compressor\GateAttack SUCCESS 0x2706 SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Compressor\GateRelease SUCCESS 0x2706 SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Compressor\GateThreshDb SUCCESS 0xFFFFDCD8 SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Compressor\Flags SUCCESS 0x8 ... SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Limiter\CompRatio SUCCESS 0xE74 SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Limiter\CompAttack SUCCESS 0x26AC SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Limiter\CompRelease SUCCESS 0x26AC SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Limiter\CompThreshDb SUCCESS 0x0 SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Limiter\MakeupGainDB SUCCESS 0x0 SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Limiter\GateRatio SUCCESS 0x64 SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Limiter\GateAttack SUCCESS 0x2328 SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Limiter\GateRelease SUCCESS 0x2328 SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Limiter\GateThreshDb SUCCESS 0xFFFFDCD8 SetValue HKLM\System\CurrentControlSet\Control\Class\{4D36E96C-E325-11CE-BFC1-08002BE10318}\0005\Settings\filter\Rear\Presets\_Initial\Render\Limiter\Flags SUCCESS 0xA ... Notice how the "Flags" key changes? I don't understand much of this, but it seems like the output is being manipulated via digital post-processing rather than re-tasking of the analog pin widgets. I had also been trying to make sense of the following line in the windows driver file: InitVerbs: 03, a0, 45, 01; which I'd guessed earlier could be interpreted as verb 0x3a0 and payload of 0x4501, (amplifier gain/mute, set input amp, port B(?), unmute, gain step 1) which actually makes some sense in this context, since if the flags key is referencing pin widgets the input mux should be unmuted if it's to be used as the limiter. So if I'm actually on the right track here, how would something like this be implemented in ALSA? Via /etc/asoundrc? I tried setting the digital mixer as the default pcm device and now the gnome-volume-applet shows the device as being muted, and is unable to unmute it. Nothing is muted in alsamixer though, so I'm guessing that I didn't do this correctly in any event. Another potentially interesting observation is that in the windows sound control options there is both a master volume control and a "Wave" volume control which seem to be bound together somehow even though they are independent controls. ie: the wave control appears to have the exact same function as the master volume. Lastly, the system beep (which for what it's worth "sounds digital" to my untrained ears), works prior to the snd-hda-intel module being loaded, but not afterwards, even when unloaded. Is there any debugging code aready in alsa that would produce a copy of /proc/asound/card0/codec#0 prior to any codec initialization? If anyone can make some suggestions I'd be quite grateful. Also, if there is any specific debugging results you'd like to see let me know and I'll append them to the bug report. Thanks, -brian

2 2

[alsa-devel] ALSA lib troubles with xine
by Markus Korber 03 Sep '07

03 Sep '07

Hi, I've got problems using ALSA (hg) and xine-lib (1.1.7). I'm trying to use fbxine for playback but ALSA debug logging gives me: ,---- | audio_alsa_out: Audio Device name = default | audio_alsa_out: Number of channels = 2 | Buffer size range from 4096 to 0 <- !!! | Period size range from 0 to 0 <- !!! | Buffer time size 44100 | To choose buffer_size = 4096 | To choose period_size = 512 | was set period_size = 0 | was set buffer_size = 4096 | audio_alsa_out:open pause_resume=1 | ACCESS: RW_INTERLEAVED | FORMAT: S16_LE | SUBFORMAT: STD | SAMPLE_BITS: 16 | FRAME_BITS: 32 | CHANNELS: 2 | RATE: 44100 | PERIOD_TIME: (46439 46440) | PERIOD_SIZE: 2048 | PERIOD_BYTES: 8192 | PERIODS: 2 | BUFFER_TIME: (92879 92880) | BUFFER_SIZE: 4096 | BUFFER_BYTES: 16384 | TICK_TIME: 10000 | audio_alsa_out: Unable to set swparams: Invalid argument `---- So buffer and period sizes seem to be wrong and therefore I get no sound. (audio_alsa_out logging from [1].) Next I've tried to run speaker-test and the ouptut look good: ,---- | [root@(none) ~]# speaker-test | | speaker-test 1.0.15rc1 | | Playback device is default | Stream parameters are 48000Hz, S16_LE, 1 channels | Using 16 octaves of pink noise | Rate set to 48000Hz (requested 48000Hz) | Buffer size range from 4096 to 4096 | Period size range from 2048 to 2048 | Using max buffer size 4096 | Periods = 4 | was set period_size = 2048 | was set buffer_size = 4096 | 0 - Front Left `---- Both applications are linked against the same ALSA library (dynamic or static linkage doesn't make a difference - speaker-test always works and xine always fails). And both applications use the same instructions (snd_pcm_hw_params_get_period_size_min/max()) AFAICS. Any ideas what I could try next? Thanks. Toolchain: buildroot based arm gcc 4.2.1 with uclibc 0.9.29. However, other applications (mplayer, aplay, alsaplayer) work as well, so I guess it's not toolchain related. [1] http://xine.cvs.sourceforge.net/xine/xine-lib/src/audio_out/audio_alsa_out.c Regards, Markus Korber

4 10

[alsa-devel] [PATCH] STAC92xx : add support for missing features
by Maxim Levitsky 03 Sep '07

03 Sep '07

Hi, As promised, those are patches that extend patch_sigmatel.c driver to add missing functionality They all are runtime tested with my STAC9227, and datasheet tested with others Note that I did my best to ensure that even if a codec doesn't support a feature (and I don't know sbout that), maximum impact will be a new, non-working mixer control STAC927x are almost exactly the same as STAC922x, but have DAC4 1) Center/LFE swap : It can be sometimes useful to swap those channels, since they are on same line. I add that control only in case Center/LFE DAC is there, and supports L/R swap, it should be very safe. 2) Analog loopback: Added for 922x, 927x, and for 9204/5 which has a different verb, that offers same analog loopback 3) Volume Knob: Added for 9204/5, 9220/1/3, 922x 92-7x I made it a master volume 4) Fixed support for codecs that have 2 or 3 ADC: I added separate mixer controls for all 2/3 ADCs, and made PCM capture device sub-streams count to depend on actual number of ADCs I am looking for your comments, Best regards, Maxim Levitsky

3 22

[alsa-devel] firmware compilation
by paul blakeley 03 Sep '07

03 Sep '07

How do I know if I need to download and then compile the firmware source code? Cant find anything in the docs that details this.

2 1