November 2007 - Alsa-devel - mailman.alsa-project.org

[alsa-devel] [PATCH] ASoC: S3C2412 IIS driver
by Ben Dooks 23 Nov '07

23 Nov '07

S3C2412 SoC IIS support for ALSA/ASoC Signed-off-by: Ben Dooks <ben-linux(a)fluff.org> diff -urpN -X linux-2.6.24-rc3/Documentation/dontdiff linux-2.6.24-rc3/sound/soc/s3c24xx/Kconfig linux-2.6.24-rc3-asoc1/sound/soc/s3c24xx/Kconfig --- linux-2.6.24-rc3/sound/soc/s3c24xx/Kconfig 2007-11-19 16:12:18.000000000 +0000 +++ linux-2.6.24-rc3-asoc1/sound/soc/s3c24xx/Kconfig 2007-11-19 21:21:57.000000000 +0000 @@ -10,6 +10,9 @@ config SND_S3C24XX_SOC config SND_S3C24XX_SOC_I2S tristate +config SND_S3C2412_SOC_I2S + tristate + config SND_S3C2443_SOC_AC97 tristate select AC97_BUS diff -urpN -X linux-2.6.24-rc3/Documentation/dontdiff linux-2.6.24-rc3/sound/soc/s3c24xx/Makefile linux-2.6.24-rc3-asoc1/sound/soc/s3c24xx/Makefile --- linux-2.6.24-rc3/sound/soc/s3c24xx/Makefile 2007-10-09 21:31:38.000000000 +0100 +++ linux-2.6.24-rc3-asoc1/sound/soc/s3c24xx/Makefile 2007-11-19 21:21:57.000000000 +0000 @@ -1,11 +1,13 @@ # S3c24XX Platform Support snd-soc-s3c24xx-objs := s3c24xx-pcm.o snd-soc-s3c24xx-i2s-objs := s3c24xx-i2s.o +snd-soc-s3c2412-i2s-objs := s3c2412-i2s.o snd-soc-s3c2443-ac97-objs := s3c2443-ac97.o obj-$(CONFIG_SND_S3C24XX_SOC) += snd-soc-s3c24xx.o obj-$(CONFIG_SND_S3C24XX_SOC_I2S) += snd-soc-s3c24xx-i2s.o obj-$(CONFIG_SND_S3C2443_SOC_AC97) += snd-soc-s3c2443-ac97.o +obj-$(CONFIG_SND_S3C2412_SOC_I2S) += snd-soc-s3c2412-i2s.o # S3C24XX Machine Support snd-soc-neo1973-wm8753-objs := neo1973_wm8753.o diff -urpN -X linux-2.6.24-rc3/Documentation/dontdiff linux-2.6.24-rc3/sound/soc/s3c24xx/s3c2412-i2s.c linux-2.6.24-rc3-asoc1/sound/soc/s3c24xx/s3c2412-i2s.c --- linux-2.6.24-rc3/sound/soc/s3c24xx/s3c2412-i2s.c 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.24-rc3-asoc1/sound/soc/s3c24xx/s3c2412-i2s.c 2007-11-19 21:28:16.000000000 +0000 @@ -0,0 +1,686 @@ +/* sound/soc/s3c24xx/s3c2412-i2s.c + * + * ALSA Soc Audio Layer - S3C2412 I2S driver + * + * Copyright (c) 2006 Wolfson Microelectronics PLC. + * Graeme Gregory graeme.gregory(a)wolfsonmicro.com + * linux(a)wolfsonmicro.com + * + * Copyright (c) 2007, 2004-2005 Simtec Electronics + * http://armlinux.simtec.co.uk/ + * Ben Dooks <ben(a)simtec.co.uk> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. +*/ + +#include <linux/init.h> +#include <linux/module.h> +#include <linux/device.h> +#include <linux/delay.h> +#include <linux/clk.h> + +#include <sound/driver.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/initval.h> +#include <sound/soc.h> +#include <asm/hardware.h> + +#include <asm/io.h> +#include <asm/dma.h> + +#include <asm/plat-s3c24xx/regs-s3c2412-iis.h> + +#include <asm/arch/regs-gpio.h> +#include <asm/arch/audio.h> +#include <asm/arch/dma.h> + +#include "s3c24xx-pcm.h" +#include "s3c2412-i2s.h" + +#define S3C2412_I2S_DEBUG 0 +#define S3C2412_I2S_DEBUG_CON 0 + +#if S3C2412_I2S_DEBUG +#define DBG(x...) printk(KERN_INFO x) +#else +#define DBG(x...) do { } while (0) +#endif + +static struct s3c2410_dma_client s3c2412_dma_client_out = { + .name = "I2S PCM Stereo out" +}; + +static struct s3c2410_dma_client s3c2412_dma_client_in = { + .name = "I2S PCM Stereo in" +}; + +static struct s3c24xx_pcm_dma_params s3c2412_i2s_pcm_stereo_out = { + .client = &s3c2412_dma_client_out, + .channel = DMACH_I2S_OUT, + .dma_addr = S3C2410_PA_IIS + S3C2412_IISTXD, + .dma_size = 4, +}; + +static struct s3c24xx_pcm_dma_params s3c2412_i2s_pcm_stereo_in = { + .client = &s3c2412_dma_client_in, + .channel = DMACH_I2S_IN, + .dma_addr = S3C2410_PA_IIS + S3C2412_IISRXD, + .dma_size = 4, +}; + +struct s3c2412_i2s_info { + struct device *dev; + void __iomem *regs; + struct clk *iis_clk; + struct clk *iis_pclk; + struct clk *iis_cclk; +}; + +static struct s3c2412_i2s_info s3c2412_i2s; + +#define bit_set(v,b) (((v) & (b)) ? 1 : 0) + +#if S3C2412_I2S_DEBUG_CON +static void dbg_showcon(const char *fn, u32 con) +{ + printk(KERN_DEBUG "%s: LRI=%d, TXFEMPT=%d, RXFEMPT=%d, TXFFULL=%d, RXFFULL=%d\n", fn, + bit_set(con, S3C2412_IISCON_LRINDEX), + bit_set(con, S3C2412_IISCON_TXFIFO_EMPTY), + bit_set(con, S3C2412_IISCON_RXFIFO_EMPTY), + bit_set(con, S3C2412_IISCON_TXFIFO_FULL), + bit_set(con, S3C2412_IISCON_RXFIFO_FULL)); + + printk(KERN_DEBUG "%s: PAUSE: TXDMA=%d, RXDMA=%d, TXCH=%d, RXCH=%d\n", + fn, + bit_set(con, S3C2412_IISCON_TXDMA_PAUSE), + bit_set(con, S3C2412_IISCON_RXDMA_PAUSE), + bit_set(con, S3C2412_IISCON_TXCH_PAUSE), + bit_set(con, S3C2412_IISCON_RXCH_PAUSE)); + printk(KERN_DEBUG "%s: ACTIVE: TXDMA=%d, RXDMA=%d, IIS=%d\n", fn, + bit_set(con, S3C2412_IISCON_TXDMA_ACTIVE), + bit_set(con, S3C2412_IISCON_RXDMA_ACTIVE), + bit_set(con, S3C2412_IISCON_IIS_ACTIVE)); +} +#else +static inline void dbg_showcon(const char *fn, u32 con) +{ +} +#endif + +/* Turn on or off the transmission path. */ +static void s3c2412_snd_txctrl(int on) +{ + struct s3c2412_i2s_info *i2s = &s3c2412_i2s; + void __iomem *regs = i2s->regs; + u32 fic, con, mod; + + DBG("%s(%d)\n", __func__, on); + + fic = readl(regs + S3C2412_IISFIC); + con = readl(regs + S3C2412_IISCON); + mod = readl(regs + S3C2412_IISMOD); + + DBG("%s: IIS: CON=%x MOD=%x FIC=%x\n", __func__, con, mod, fic); + + if (on) { + con |= S3C2412_IISCON_TXDMA_ACTIVE | S3C2412_IISCON_IIS_ACTIVE; + con &= ~S3C2412_IISCON_TXDMA_PAUSE; + con &= ~S3C2412_IISCON_TXCH_PAUSE; + + switch (mod & S3C2412_IISMOD_MODE_MASK) { + case S3C2412_IISMOD_MODE_TXONLY: + case S3C2412_IISMOD_MODE_TXRX: + /* do nothing, we are in the right mode */ + break; + + case S3C2412_IISMOD_MODE_RXONLY: + mod &= ~S3C2412_IISMOD_MODE_MASK; + mod |= S3C2412_IISMOD_MODE_TXRX; + break; + + default: + dev_err(i2s->dev, "TXEN: Invalid MODE in IISMOD\n"); + } + + writel(con, regs + S3C2412_IISCON); + writel(mod, regs + S3C2412_IISMOD); + } else { + /* Note, we do not have any indication that the FIFO problems + * tha the S3C2410/2440 had apply here, so we should be able + * to disable the DMA and TX without resetting the FIFOS. + */ + + con |= S3C2412_IISCON_TXDMA_PAUSE; + con |= S3C2412_IISCON_TXCH_PAUSE; + con &= ~S3C2412_IISCON_TXDMA_ACTIVE; + + switch (mod & S3C2412_IISMOD_MODE_MASK) { + case S3C2412_IISMOD_MODE_TXRX: + mod &= ~S3C2412_IISMOD_MODE_MASK; + mod |= S3C2412_IISMOD_MODE_RXONLY; + break; + + case S3C2412_IISMOD_MODE_TXONLY: + mod &= ~S3C2412_IISMOD_MODE_MASK; + con &= ~S3C2412_IISCON_IIS_ACTIVE; + break; + + default: + dev_err(i2s->dev, "TXDIS: Invalid MODE in IISMOD\n"); + } + + writel(mod, regs + S3C2412_IISMOD); + writel(con, regs + S3C2412_IISCON); + } + + fic = readl(regs + S3C2412_IISFIC); + dbg_showcon(__func__, con); + DBG("%s: IIS: CON=%x MOD=%x FIC=%x\n", __func__, con, mod, fic); +} + +static void s3c2412_snd_rxctrl(int on) +{ + struct s3c2412_i2s_info *i2s = &s3c2412_i2s; + void __iomem *regs = i2s->regs; + u32 fic, con, mod; + + DBG("%s(%d)\n", __func__, on); + + fic = readl(regs + S3C2412_IISFIC); + con = readl(regs + S3C2412_IISCON); + mod = readl(regs + S3C2412_IISMOD); + + DBG("%s: IIS: CON=%x MOD=%x FIC=%x\n", __func__, con, mod, fic); + + if (on) { + con |= S3C2412_IISCON_RXDMA_ACTIVE | S3C2412_IISCON_IIS_ACTIVE; + con &= ~S3C2412_IISCON_RXDMA_PAUSE; + con &= ~S3C2412_IISCON_RXCH_PAUSE; + + switch (mod & S3C2412_IISMOD_MODE_MASK) { + case S3C2412_IISMOD_MODE_TXRX: + case S3C2412_IISMOD_MODE_RXONLY: + /* do nothing, we are in the right mode */ + break; + + case S3C2412_IISMOD_MODE_TXONLY: + mod &= ~S3C2412_IISMOD_MODE_MASK; + mod |= S3C2412_IISMOD_MODE_TXRX; + break; + + default: + dev_err(i2s->dev, "RXEN: Invalid MODE in IISMOD\n"); + } + + writel(mod, regs + S3C2412_IISMOD); + writel(con, regs + S3C2412_IISCON); + } else { + /* See txctrl notes on FIFOs. */ + + con &= ~S3C2412_IISCON_RXDMA_ACTIVE; + con |= S3C2412_IISCON_RXDMA_PAUSE; + con |= S3C2412_IISCON_RXCH_PAUSE; + + switch (mod & S3C2412_IISMOD_MODE_MASK) { + case S3C2412_IISMOD_MODE_RXONLY: + con &= ~S3C2412_IISCON_IIS_ACTIVE; + mod &= ~S3C2412_IISMOD_MODE_MASK; + break; + + case S3C2412_IISMOD_MODE_TXRX: + mod &= ~S3C2412_IISMOD_MODE_MASK; + mod |= S3C2412_IISMOD_MODE_TXONLY; + break; + + default: + dev_err(i2s->dev, "RXEN: Invalid MODE in IISMOD\n"); + } + + writel(con, regs + S3C2412_IISCON); + writel(mod, regs + S3C2412_IISMOD); + } + + fic = readl(regs + S3C2412_IISFIC); + DBG("%s: IIS: CON=%x MOD=%x FIC=%x\n", __func__, con, mod, fic); +} + + +/* + * Wait for the LR signal to allow synchronisation to the L/R clock + * from the codec. May only be needed for slave mode. + */ +static int s3c2412_snd_lrsync(void) +{ + u32 iiscon; + unsigned long timeout = jiffies + msecs_to_jiffies(5); + + DBG("Entered %s\n", __func__); + + while (1) { + iiscon = readl(s3c2412_i2s.regs + S3C2412_IISCON); + if (iiscon & S3C2412_IISCON_LRINDEX) + break; + + if (timeout < jiffies) { + printk(KERN_ERR "%s: timeout\n", __func__); + return -ETIMEDOUT; + } + } + + return 0; +} + +/* + * Check whether CPU is the master or slave + */ +static inline int s3c2412_snd_is_clkmaster(void) +{ + u32 iismod = readl(s3c2412_i2s.regs + S3C2412_IISMOD); + + DBG("Entered %s\n", __func__); + + iismod &= S3C2412_IISMOD_MASTER_MASK; + return !(iismod == S3C2412_IISMOD_SLAVE); +} + +/* + * Set S3C2412 I2S DAI format + */ +static int s3c2412_i2s_set_fmt(struct snd_soc_cpu_dai *cpu_dai, + unsigned int fmt) +{ + u32 iismod; + + + DBG("Entered %s\n", __func__); + + iismod = readl(s3c2412_i2s.regs + S3C2412_IISMOD); + DBG("hw_params r: IISMOD: %x \n", iismod); + + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBM_CFM: + iismod &= ~S3C2412_IISMOD_MASTER_MASK; + iismod |= S3C2412_IISMOD_SLAVE; + break; + case SND_SOC_DAIFMT_CBS_CFS: + iismod &= ~S3C2412_IISMOD_MASTER_MASK; + iismod |= S3C2412_IISMOD_MASTER_INTERNAL; + break; + default: + DBG("unknwon master/slave format\n"); + return -EINVAL; + } + + iismod &= ~S3C2412_IISMOD_SDF_MASK; + + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_RIGHT_J: + iismod |= S3C2412_IISMOD_SDF_MSB; + break; + case SND_SOC_DAIFMT_LEFT_J: + iismod |= S3C2412_IISMOD_SDF_LSB; + break; + case SND_SOC_DAIFMT_I2S: + iismod |= S3C2412_IISMOD_SDF_IIS; + break; + default: + DBG("Unknown data format\n"); + return -EINVAL; + } + + writel(iismod, s3c2412_i2s.regs + S3C2412_IISMOD); + DBG("hw_params w: IISMOD: %x \n", iismod); + return 0; +} + +static int s3c2412_i2s_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + u32 iismod; + + DBG("Entered %s\n", __func__); + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + rtd->dai->cpu_dai->dma_data = &s3c2412_i2s_pcm_stereo_out; + else + rtd->dai->cpu_dai->dma_data = &s3c2412_i2s_pcm_stereo_in; + + /* Working copies of register */ + iismod = readl(s3c2412_i2s.regs + S3C2412_IISMOD); + DBG("%s: r: IISMOD: %x\n", __func__, iismod); + + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_S8: + iismod |= S3C2412_IISMOD_8BIT; + break; + case SNDRV_PCM_FORMAT_S16_LE: + iismod &= ~S3C2412_IISMOD_8BIT; + break; + } + + writel(iismod, s3c2412_i2s.regs + S3C2412_IISMOD); + DBG("%s: w: IISMOD: %x\n", __func__, iismod); + return 0; +} + +static int s3c2412_i2s_trigger(struct snd_pcm_substream *substream, int cmd) +{ + int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE); + unsigned long irqs; + int ret = 0; + + DBG("Entered %s\n", __func__); + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + /* On start, ensure that the FIFOs are cleared and reset. */ + + writel(capture ? S3C2412_IISFIC_RXFLUSH : S3C2412_IISFIC_TXFLUSH, + s3c2412_i2s.regs + S3C2412_IISFIC); + + /* clear again, just in case */ + writel(0x0, s3c2412_i2s.regs + S3C2412_IISFIC); + + case SNDRV_PCM_TRIGGER_RESUME: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + if (!s3c2412_snd_is_clkmaster()) { + ret = s3c2412_snd_lrsync(); + if (ret) + goto exit_err; + } + + local_irq_save(irqs); + + if (capture) + s3c2412_snd_rxctrl(1); + else + s3c2412_snd_txctrl(1); + + local_irq_restore(irqs); + break; + + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + local_irq_save(irqs); + + if (capture) + s3c2412_snd_rxctrl(0); + else + s3c2412_snd_txctrl(0); + + local_irq_restore(irqs); + break; + default: + ret = -EINVAL; + break; + } + +exit_err: + return ret; +} + +/* default table of all avaialable root fs divisors */ +static unsigned int s3c2412_iis_fs[] = { 256, 512, 384, 768, 0 }; + +#define ABS(x) (((x) < 0) ? (-(x)) : (x)) + +int s3c2412_iis_calc_rate(struct s3c2412_rate_calc *info, + unsigned int *fstab, + unsigned int rate, struct clk *clk) +{ + unsigned long clkrate = clk_get_rate(clk); + unsigned int div; + unsigned int fsclk; + unsigned int actual; + unsigned int fs; + unsigned int fsdiv; + signed int deviation = 0; + unsigned int best_fs = 0; + unsigned int best_div = 0; + unsigned int best_rate = 0; + unsigned int best_deviation = INT_MAX; + + + if (fstab == NULL) + fstab = s3c2412_iis_fs; + + for (fs = 0;; fs++) { + fsdiv = s3c2412_iis_fs[fs]; + + if (fsdiv == 0) + break; + + fsclk = clkrate / fsdiv; + div = fsclk / rate; + + if ((fsclk % rate) > (rate / 2)) + div++; + + if (div <= 1) + continue; + + actual = clkrate / (fsdiv * div); + deviation = actual - rate; + + printk(KERN_DEBUG "%dfs: div %d => result %d, deviation %d\n", + fsdiv, div, actual, deviation); + + deviation = ABS(deviation); + + if (deviation < best_deviation) { + best_fs = fsdiv; + best_div = div; + best_rate = actual; + best_deviation = deviation; + } + + if (deviation == 0) + break; + } + + printk(KERN_DEBUG "best: fs=%d, div=%d, rate=%d\n", + best_fs, best_div, best_rate); + + info->fs_div = best_fs; + info->clk_div = best_div; + + return 0; +} + +EXPORT_SYMBOL_GPL(s3c2412_iis_calc_rate); + +/* + * Set S3C2412 Clock source + */ +static int s3c2412_i2s_set_sysclk(struct snd_soc_cpu_dai *cpu_dai, + int clk_id, unsigned int freq, int dir) +{ + u32 iismod = readl(s3c2412_i2s.regs + S3C2412_IISMOD); + + DBG("%s(%p, %d, %u, %d)\n", __func__, cpu_dai, clk_id, + freq, dir); + + switch (clk_id) { + case S3C2412_CLKSRC_PCLK: + iismod &= ~S3C2412_IISMOD_MASTER_MASK; + iismod |= S3C2412_IISMOD_MASTER_INTERNAL; + break; + case S3C2412_CLKSRC_I2SCLK: + iismod &= ~S3C2412_IISMOD_MASTER_MASK; + iismod |= S3C2412_IISMOD_MASTER_EXTERNAL; + break; + default: + return -EINVAL; + } + + writel(iismod, s3c2412_i2s.regs + S3C2412_IISMOD); + return 0; +} + +/* + * Set S3C2412 Clock dividers + */ +static int s3c2412_i2s_set_clkdiv(struct snd_soc_cpu_dai *cpu_dai, + int div_id, int div) +{ + struct s3c2412_i2s_info *i2s = &s3c2412_i2s; + u32 reg; + + DBG("%s(%p, %d, %d)\n", __func__, cpu_dai, div_id, div); + + switch (div_id) { + case S3C2412_DIV_BCLK: + reg = readl(i2s->regs + S3C2412_IISMOD); + reg &= ~S3C2412_IISMOD_BCLK_MASK; + writel(reg | div, i2s->regs + S3C2412_IISMOD); + + DBG("%s: MOD=%08x\n", __func__, readl(i2s->regs + S3C2412_IISMOD)); + break; + + case S3C2412_DIV_RCLK: + if (div > 3) { + /* convert value to bit field */ + + switch (div) { + case 256: + div = S3C2412_IISMOD_RCLK_256FS; + break; + + case 384: + div = S3C2412_IISMOD_RCLK_384FS; + break; + + case 512: + div = S3C2412_IISMOD_RCLK_512FS; + break; + + case 768: + div = S3C2412_IISMOD_RCLK_768FS; + break; + + default: + return -EINVAL; + } + } + + reg = readl(s3c2412_i2s.regs + S3C2412_IISMOD); + reg &= ~S3C2412_IISMOD_RCLK_MASK; + writel(reg | div, i2s->regs + S3C2412_IISMOD); + DBG("%s: MOD=%08x\n", __func__, readl(i2s->regs + S3C2412_IISMOD)); + break; + + case S3C2412_DIV_PRESCALER: + if (div >= 0) { + writel((div << 8) | S3C2412_IISPSR_PSREN, + i2s->regs + S3C2412_IISPSR); + } else { + writel(0x0, i2s->regs + S3C2412_IISPSR); + } + DBG("%s: PSR=%08x\n", __func__, readl(i2s->regs + S3C2412_IISPSR)); + break; + + default: + return -EINVAL; + } + + return 0; +} + +struct clk *s3c2412_get_iisclk(void) +{ + return s3c2412_i2s.iis_clk; +} + +EXPORT_SYMBOL_GPL(s3c2412_get_iisclk); + + +static int s3c2412_i2s_probe(struct platform_device *pdev) +{ + DBG("Entered %s\n", __func__); + + s3c2412_i2s.dev = &pdev->dev; + + s3c2412_i2s.regs = ioremap(S3C2410_PA_IIS, 0x100); + if (s3c2412_i2s.regs == NULL) + return -ENXIO; + + s3c2412_i2s.iis_pclk=clk_get(&pdev->dev, "iis"); + if (s3c2412_i2s.iis_pclk == NULL) { + DBG("failed to get iis_clock\n"); + iounmap(s3c2412_i2s.regs); + return -ENODEV; + } + + s3c2412_i2s.iis_cclk=clk_get(&pdev->dev, "i2sclk"); + if (s3c2412_i2s.iis_cclk == NULL) { + DBG("failed to get i2sclk clock\n"); + iounmap(s3c2412_i2s.regs); + return -ENODEV; + } + + clk_set_parent(s3c2412_i2s.iis_cclk, clk_get(NULL, "mpll")); + + clk_enable(s3c2412_i2s.iis_pclk); + clk_enable(s3c2412_i2s.iis_cclk); + + s3c2412_i2s.iis_clk = s3c2412_i2s.iis_pclk; + + /* Configure the I2S pins in correct mode */ + s3c2410_gpio_cfgpin(S3C2410_GPE0, S3C2410_GPE0_I2SLRCK); + s3c2410_gpio_cfgpin(S3C2410_GPE1, S3C2410_GPE1_I2SSCLK); + s3c2410_gpio_cfgpin(S3C2410_GPE2, S3C2410_GPE2_CDCLK); + s3c2410_gpio_cfgpin(S3C2410_GPE3, S3C2410_GPE3_I2SSDI); + s3c2410_gpio_cfgpin(S3C2410_GPE4, S3C2410_GPE4_I2SSDO); + + s3c2412_snd_txctrl(0); + s3c2412_snd_rxctrl(0); + + return 0; +} + +#define S3C2412_I2S_RATES \ + (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_16000 | \ + SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \ + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000) + +struct snd_soc_cpu_dai s3c2412_i2s_dai = { + .name = "s3c2412-i2s", + .id = 0, + .type = SND_SOC_DAI_I2S, + .probe = s3c2412_i2s_probe, + .playback = { + .channels_min = 2, + .channels_max = 2, + .rates = S3C2412_I2S_RATES, + .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE, + }, + .capture = { + .channels_min = 2, + .channels_max = 2, + .rates = S3C2412_I2S_RATES, + .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE, + }, + .ops = { + .trigger = s3c2412_i2s_trigger, + .hw_params = s3c2412_i2s_hw_params, + }, + .dai_ops = { + .set_fmt = s3c2412_i2s_set_fmt, + .set_clkdiv = s3c2412_i2s_set_clkdiv, + .set_sysclk = s3c2412_i2s_set_sysclk, + }, +}; + +EXPORT_SYMBOL_GPL(s3c2412_i2s_dai); + +/* Module information */ +MODULE_AUTHOR("Ben Dooks, <ben(a)simtec.co.uk>"); +MODULE_DESCRIPTION("S3C2412 I2S SoC Interface"); +MODULE_LICENSE("GPL"); diff -urpN -X linux-2.6.24-rc3/Documentation/dontdiff linux-2.6.24-rc3/sound/soc/s3c24xx/s3c2412-i2s.h linux-2.6.24-rc3-asoc1/sound/soc/s3c24xx/s3c2412-i2s.h --- linux-2.6.24-rc3/sound/soc/s3c24xx/s3c2412-i2s.h 1970-01-01 01:00:00.000000000 +0100 +++ linux-2.6.24-rc3-asoc1/sound/soc/s3c24xx/s3c2412-i2s.h 2007-11-19 21:21:57.000000000 +0000 @@ -0,0 +1,38 @@ +/* sound/soc/s3c24xx/s3c2412-i2s.c + * + * ALSA Soc Audio Layer - S3C2412 I2S driver + * + * Copyright (c) 2007 Simtec Electronics + * http://armlinux.simtec.co.uk/ + * Ben Dooks <ben(a)simtec.co.uk> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. +*/ + +#ifndef __SND_SOC_S3C24XX_S3C2412_I2S_H +#define __SND_SOC_S3C24XX_S3C2412_I2S_H __FILE__ + +#define S3C2412_DIV_BCLK (1) +#define S3C2412_DIV_RCLK (2) +#define S3C2412_DIV_PRESCALER (3) + +#define S3C2412_CLKSRC_PCLK (0) +#define S3C2412_CLKSRC_I2SCLK (1) + +extern struct clk *s3c2412_get_iisclk(void); + +extern struct snd_soc_cpu_dai s3c2412_i2s_dai; + +struct s3c2412_rate_calc { + unsigned int clk_div; /* for prescaler */ + unsigned int fs_div; /* for root frame clock */ +}; + +extern int s3c2412_iis_calc_rate(struct s3c2412_rate_calc *info, + unsigned int *fstab, + unsigned int rate, struct clk *clk); + +#endif /* __SND_SOC_S3C24XX_S3C2412_I2S_H */

3 2

[alsa-devel] S3C2412: suspend and resume support
by Ben Dooks 23 Nov '07

23 Nov '07

Support for suspend/resume for the S3C2412 ASoC IIS core driver. Signed-off-by: Ben Dooks <ben-linux(a)fluff.org> diff -urpN -X linux-2.6.24-rc3-asoc1/Documentation/dontdiff linux-2.6.24-rc3-asoc1/sound/soc/s3c24xx/s3c2412-i2s.c linux-2.6.24-rc3-asoc2/sound/soc/s3c24xx/s3c2412-i2s.c --- linux-2.6.24-rc3-asoc1/sound/soc/s3c24xx/s3c2412-i2s.c 2007-11-19 21:28:16.000000000 +0000 +++ linux-2.6.24-rc3-asoc2/sound/soc/s3c24xx/s3c2412-i2s.c 2007-11-20 12:29:46.000000000 +0000 @@ -79,6 +79,10 @@ struct s3c2412_i2s_info { struct clk *iis_clk; struct clk *iis_pclk; struct clk *iis_cclk; + + u32 suspend_iismod; + u32 suspend_iiscon; + u32 suspend_iispsr; }; static struct s3c2412_i2s_info s3c2412_i2s; @@ -381,7 +385,7 @@ static int s3c2412_i2s_trigger(struct sn case SNDRV_PCM_TRIGGER_START: /* On start, ensure that the FIFOs are cleared and reset. */ - writel(capture ? S3C2412_IISFIC_RXFLUSH : S3C2412_IISFIC_TXFLUSH, + writel(capture ? S3C2412_IISFIC_RXFLUSH : S3C2412_IISFIC_TXFLUSH , s3c2412_i2s.regs + S3C2412_IISFIC); /* clear again, just in case */ @@ -645,6 +649,63 @@ static int s3c2412_i2s_probe(struct plat return 0; } +#ifdef CONFIG_PM +static int s3c2412_i2s_suspend(struct platform_device *dev, + struct snd_soc_cpu_dai *dai) +{ + struct s3c2412_i2s_info *i2s = &s3c2412_i2s; + u32 iismod; + + if (dai->active) { + i2s->suspend_iismod = readl(i2s->regs + S3C2412_IISMOD); + i2s->suspend_iiscon = readl(i2s->regs + S3C2412_IISCON); + i2s->suspend_iispsr = readl(i2s->regs + S3C2412_IISPSR); + + /* some basic suspend checks */ + + iismod = readl(i2s->regs + S3C2412_IISMOD); + + if (iismod & S3C2412_IISCON_RXDMA_ACTIVE) + dev_warn(&dev->dev, "%s: RXDMA active?\n", __func__); + + if (iismod & S3C2412_IISCON_TXDMA_ACTIVE) + dev_warn(&dev->dev, "%s: TXDMA active?\n", __func__); + + if (iismod & S3C2412_IISCON_IIS_ACTIVE) + dev_warn(&dev->dev, "%s: IIS active\n", __func__); + } + + return 0; +} + +static int s3c2412_i2s_resume(struct platform_device *pdev, + struct snd_soc_cpu_dai *dai) +{ + struct s3c2412_i2s_info *i2s = &s3c2412_i2s; + + dev_info(&pdev->dev, "dai_active %d, IISMOD %08x, IISCON %08x\n", + dai->active, i2s->suspend_iismod, i2s->suspend_iiscon); + + if (dai->active) { + writel(i2s->suspend_iiscon, i2s->regs + S3C2412_IISCON); + writel(i2s->suspend_iismod, i2s->regs + S3C2412_IISMOD); + writel(i2s->suspend_iispsr, i2s->regs + S3C2412_IISPSR); + + writel(S3C2412_IISFIC_RXFLUSH | S3C2412_IISFIC_TXFLUSH, + i2s->regs + S3C2412_IISFIC); + + ndelay(250); + writel(0x0, i2s->regs + S3C2412_IISFIC); + + } + + return 0; +} +#else +#define s3c2412_i2s_suspend NULL +#define s3c2412_i2s_resume NULL +#endif /* CONFIG_PM */ + #define S3C2412_I2S_RATES \ (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_16000 | \ SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \ @@ -655,6 +716,8 @@ struct snd_soc_cpu_dai s3c2412_i2s_dai = .id = 0, .type = SND_SOC_DAI_I2S, .probe = s3c2412_i2s_probe, + .suspend= s3c2412_i2s_suspend, + .resume = s3c2412_i2s_resume, .playback = { .channels_min = 2, .channels_max = 2,

4 3

[alsa-devel] [PATCH] add number of periods constraint to snd-aoa [try 2]
by Heikki O Lindholm 23 Nov '07

23 Nov '07

From: Heikki Lindholm <holindho(a)cs.helsinki.fi> The aoa driver is not specifying constraints on number of periods, and, it seems, it might end with a non-integer number, which it cannot deal with. Fix by adding a proper constraint. Signed-off-by: Heikki Lindholm <holindho(a)cs.helsinki.fi> --- try 2: previous try didn't work on anything but Onyx diff -r 1b54a8725ded aoa/soundbus/i2sbus/i2sbus-pcm.c --- a/aoa/soundbus/i2sbus/i2sbus-pcm.c Wed Nov 14 17:07:17 2007 +0100 +++ b/aoa/soundbus/i2sbus/i2sbus-pcm.c Fri Nov 23 11:53:38 2007 +0200 @@ -194,6 +194,12 @@ static int i2sbus_pcm_open(struct i2sbus hw->period_bytes_max = 16384; hw->periods_min = 3; hw->periods_max = MAX_DBDMA_COMMANDS; + if ((err = snd_pcm_hw_constraint_integer( + pi->substream->runtime, + SNDRV_PCM_HW_PARAM_PERIODS)) < 0) { + result = err; + goto out_unlock; + } list_for_each_entry(cii, &sdev->codec_list, list) { if (cii->codec->open) { err = cii->codec->open(cii, pi->substream);

2 1

[alsa-devel] [PATCH] add number of periods constraint to snd-aoa
by Heikki O Lindholm 23 Nov '07

23 Nov '07

From: Heikki Lindholm <holindho(a)cs.helsinki.fi> The aoa driver is not specifying constraints on number of periods, and, it seems, it might end with a non-integer number, which it cannot deal with. Fix by adding a proper constraint. Signed-off-by: Heikki Lindholm <holindho(a)cs.helsinki.fi> --- diff -r 1b54a8725ded aoa/soundbus/i2sbus/i2sbus-pcm.c --- a/aoa/soundbus/i2sbus/i2sbus-pcm.c Wed Nov 14 17:07:17 2007 +0100 +++ b/aoa/soundbus/i2sbus/i2sbus-pcm.c Fri Nov 23 11:35:17 2007 +0200 @@ -196,7 +196,10 @@ static int i2sbus_pcm_open(struct i2sbus hw->periods_max = MAX_DBDMA_COMMANDS; list_for_each_entry(cii, &sdev->codec_list, list) { if (cii->codec->open) { - err = cii->codec->open(cii, pi->substream); + if ((err = cii->codec->open(cii, pi->substream)) == 0) + err = snd_pcm_hw_constraint_integer( + pi->substream->runtime, + SNDRV_PCM_HW_PARAM_PERIODS); if (err) { result = err; /* unwind */

2 1

[alsa-devel] test through vger #1 - please ignore
by Jaroslav Kysela 23 Nov '07

23 Nov '07

please ignore ----- Jaroslav Kysela <perex(a)perex.cz> Linux Kernel Sound Maintainer ALSA Project - To unsubscribe from this list: send the line "unsubscribe alsa-devel" in the body of a message to majordomo(a)vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html

1 0

[alsa-devel] test 3 - please ignore
by Jaroslav Kysela 23 Nov '07

23 Nov '07

test 3 - please ignore ----- Jaroslav Kysela <perex(a)perex.cz> Linux Kernel Sound Maintainer ALSA Project

1 0

[alsa-devel] Mbox II DigiDisign
by rmgls＠free.fr 22 Nov '07

22 Nov '07

hello all, Can you tell me please if the external usb audio interface mbox 2 from digidisign is supported by alsa? Here is my config, sony laptop, with an integrated alc260 chip (snd-hda). and the mbox on debian. now the different debian messages: dmesg ... usb 2-1: new full speed USB device using uhci_hcd and address 3 usb 2-1: config 1 interface 2 has no altsetting 1 usb 2-1: config 1 interface 3 has no altsetting 1 usb 2-1: config 1 interface 4 has no altsetting 1 usb 2-1: config 1 interface 5 has no altsetting 1 usb 2-1: configuration #1 chosen from 1 choice usbcore: registered new interface driver snd-usb-audio usb 2-1: USB disconnect, address 3 usb 2-1: new full speed USB device using uhci_hcd and address 4 usb 2-1: config 1 interface 2 has no altsetting 1 usb 2-1: config 1 interface 3 has no altsetting 1 usb 2-1: config 1 interface 4 has no altsetting 1 usb 2-1: config 1 interface 5 has no altsetting 1 usb 2-1: configuration #1 chosen from 1 choice cat /dev/sndstat Sound Driver:3.8.1a-980706 (ALSA v1.0.15 emulation code) Kernel: Linux mydomain.music 2.6.22-2-686 #1 SMP Fri Aug 31 00:24:01 UTC 2007 i686 Config options: 0 Installed drivers: Type 10: ALSA emulation Card config: HDA Intel at 0x80000000 irq 19 Digidesign Mbox 2 at usb-0000:00:1d.1-1, full speed Audio devices: 0: ALC260 Analog (DUPLEX) 1: USB Audio (DUPLEX) Synth devices: NOT ENABLED IN CONFIG Midi devices: NOT ENABLED IN CONFIG Timers: 7: system timer Mixers: 0: Realtek ALC260 1: USB Mixer aplay plays nothing and reports: (alsa-lib pcm error). alsamixer -c 1 reports: no mixer elem found. a google search does not provide no interesting technical sheet, at least i did not found any. have you something please: datasheets, config? thanks in advance. Best regards rmgls(a)free.fr

2 1

Re: [alsa-devel] Broken playback
by Clemens Ladisch 22 Nov '07

22 Nov '07

Gabriele Melia wrote: > > snd_pcm_hw_params_set_buffer_size_near(), but the allowed values are > > hardware dependent. You might want to add your own circular buffer that > > is bigger than ALSA's. > > So your suggestion is to limit my buffer_size after decode to be same of > ALSA's? No; my suggestion is to use your own buffer which is big enough for your decoder, and use this buffer to fill ALSA's buffer, whenever possible. If one call to your decoder function needs so much time that ALSA's buffer can become emptied, you need another thread to re-fill the ALSA buffer in parallel with the decoding. Regards, Clemens

1 0

[alsa-devel] alsa-devel on vger
by Takashi Iwai 22 Nov '07

22 Nov '07

Hi, What about the plan to move alsa-devel to vger? Shouldn't we do that soon? Takashi

6 5

[alsa-devel] [PATCH 2/2] caiaq/NativeInstruments: control support
by Daniel Mack 21 Nov '07

21 Nov '07

Hi, This patch adds support for input controllers on "Kore controller" and uses ALSA's control API to enable LED switching on several hardware products as well as some internal audio related functions of "Audio 8 DJ". Subject: SOUND: caiaq - add control API and more input features From: Daniel Mack <daniel(a)caiaq.de> SOUND: caiaq - add control API and more input features - added support for all input controllers on Native Instrument's "Kore controller". - added ALSA controls to switch LEDs on "RigKontrol 2", "RigKontrol3", "Audio Kontrol 1" and "Kore controller". - added ALSA controls to switch input mode, software lock and ground lift features on "Audio 8 DJ". Signed-off-by: Daniel Mack <daniel(a)caiaq.de>

2 3

[alsa-devel] [PATCH 1/2] caiaq/NativeInstruments: input handling fixes
by Daniel Mack 21 Nov '07

21 Nov '07

Hi, I'm re-posting a patch from Dmitry Torokhov which cleans up some input layer related things. It hasn't made its way to any repository yet but my subsequent patch needs it as dependency. I Cc'ed Dmitry to avoid confusion. Subject: SOUND: caiaq - misc input handling fixes From: Dmitry Torokhov <dmitry.torokhov(a)gmail.com> SOUND: caiaq - misc input handling fixes - link input device with its parent so that it placed in proper spot in sysfs hierarchy - drivers that allow changing their keymaps should use private copy of the keymap so that one instance of a device does not affect another instance - it is preferred for drivers to properly set up input_dev->phys to help userspace locate devices - drivers should use usb_to_input_id(), or perform endianess conversion, themselves, otherwise ID is not correct on big-endian boxes - whitespace and formatting cleanup Signed-off-by: Dmitry Torokhov <dtor(a)mail.ru> Acked-by: Daniel Mack <daniel(a)caiaq.de>

3 5

[alsa-devel] ASoC merge
by Mark Brown 21 Nov '07

21 Nov '07

The following patch series merges some of the outstanding changes in the linux-2.6-asoc tree. It updates the core and existing drivers and adds some of the new drivers currently in the tree.

9 62

Re: [alsa-devel] Broken playback
by Clemens Ladisch 21 Nov '07

21 Nov '07

Gabriele Melia wrote: > > Try non-blocking mode (see the snd_pcm_nonblock function). In non- > > blocking mode, the writei call will only write as much data as can be > > written without waiting (or returns -EAGAIN if the buffer is already > > full at the moment). > > I'm already in this case Then the problem is not that the writei call takes too long. An underrun can happen only when your code takes too much time between two consecutive calls to writei. > How to set the buffer size of the circular buffer in which i store the > pcm that is then called by alsa? snd_pcm_hw_params_set_buffer_size_near(), but the allowed values are hardware dependent. You might want to add your own circular buffer that is bigger than ALSA's. HTH Clemens

1 0

Re: [alsa-devel] Broken playback
by Clemens Ladisch 21 Nov '07

21 Nov '07

Gabriele Melia wrote: > i have already tried to read and decode some data in order to accumulate > 1 second of data to prevent broken audio, > but nothing change, analysing the issue i have found that broken audio > comes when the snd_pcm_writei is called with a size that is 5000. So it > takes time to dispach all this size. Try non-blocking mode (see the snd_pcm_nonblock function). In non- blocking mode, the writei call will only write as much data as can be written without waiting (or returns -EAGAIN if the buffer is already full at the moment). HTH Clemens

1 0

[alsa-devel] Latency and timestamps
by Claudio Matsuoka 21 Nov '07

21 Nov '07

Hi, I'm adding latency control to an application and didn't find much documentation about the pcm status functions aside from a very brief description and the latency.c example. What exactly are the "trigger timestamp" and "now timestamp" returned by snd_pcm_status_get_trigger_tstamp() and snd_pcm_status_get_tstamp()? I collected both from my output pcm handle to find values (in tv_sec.tv_usec format) such as 1195518180.938427 938427.557702 1195518180.938441 938441.557702 1195518181.300395 300395.557702 1195518181.300441 300441.557702 where the "trigger" tv_sec matches the "now" tv_usec, and the "trigger" tv_usec varies in large steps. Also the example latency.c says: 00703 showinmax(in_max); 00704 if (p_tstamp.tv_sec == p_tstamp.tv_sec && 00705 p_tstamp.tv_usec == c_tstamp.tv_usec) 00706 printf("Hardware sync\n"); 00707 snd_pcm_drop(chandle); In line 704, shouldn't it be p_tstamp.tv_sec == c_tstamp.tv_sec? My final goal is to sync on-screen events with the sound output. I'd like to do something like storing output metadata associated with a certain timestamp and collecting it back based on the timestamp of the currently playing pcm data (like the OSS sequencer echoback events), is that possible, or is there a better way to do this?

3 6

[alsa-devel] latency issues
by paul blakeley 21 Nov '07

21 Nov '07

I am currently trying to measure the latency through my alsa application. I will briefly explain my application and set-up. The application has a test harness which sends audio data to my application. To measure the latency the test harness reads in a .wav file(one which I have generated. This contains a short pulse of a sine wave. The rest being zero data.) and also drives the serial port at the point were it detects the sine pulse. As previously explained the audio data is passed through my application and the alsa driver. The difference then between the start of the sine pulse and the output from the sound card is the latency through the system. I measure this with an oscilloscope. Also just to note the test harness is driven from the same sound card as the application, so there should be no difference clocks. Now that I have explained the test scenario, I will explain the behaviour that I am experiencing. To start off, starting the test harness at different instances revealed that the latency measurement is different by maybe 20ms or so, although the alsa buffer levels indicate all is correct. Once started the behaviour is such that the difference drifts ever so slightly. After around 10 minutes the output flips to the beginning and the process starts again. This happens continuously. Without establishing the cause of this problem will ultimately mean the measurement is useless. Could this issue be related to the serial port, alsa buffering, kernel scheduling etc. Can somebody with the relevant experience help. Please.

1 0

[alsa-devel] Broken playback
by Gabriele Melia 21 Nov '07

21 Nov '07

Hi All, i'm new so sorry in advance if i do any errors. I have integrated my hw decoder inside ffmpeg that is working fine, but while playing through alsa the sound comes broken in the sense that it is playing for 3 seconds, stops for 1 plays again for 3 sec and stop again and so on. How I can delay the palyback in order to accumulate some decoded buffers to prevent this and to not afflict the decoder when playback is stopping? Thanks, Gabriele _________________________________________________________________ Scarica GRATIS le emoticon della tua squadra del cuore e il calendario di serie A! http://www.emoticons-livemessenger.com/pages/msnitcalcio/index.htm

2 1

[alsa-devel] multi pcm and mmap problem
by terminator356＠users.sourceforge.net 21 Nov '07

21 Nov '07

After 2 years I've finally traced and fixed a problem which was preventing me from using anything after ALSA 1.0.9b ! In ALSA lib 1.0.9b: pcm/pcm_generic.c: int snd_pcm_generic_channel_info() { snd_pcm_generic_t *generic = pcm->private_data; return snd_pcm_channel_info(generic->slave, info); } But in ALSA lib 1.0.15: pcm/pcm_generic.c: int snd_pcm_generic_channel_info() { snd_pcm_generic_t *generic = pcm->private_data; if (pcm->mmap_shadow) { /* No own buffer is required - the plugin won't change * the data on the buffer, or do safely on-the-place * conversion */ return snd_pcm_channel_info(generic->slave, info); } else { // Tim: TESTED: This is now called instead of the other one! /* Allocate own buffer */ return snd_pcm_channel_info_shm(pcm, info, -1); } } My multi PCM consists of a plughw:0,2 and a hw:1,0 In ALSA 1.0.9b, all five PCMs ALSA creates for this arrangement create their areas with mmap(). And it works. But in ALSA 1.0.15 my hw:1,0 and its multi PCM areas are created with mmap(), and my plughw:0,2 and its PCMs areas are created with malloc(). Can't hear/record any sound from the plughw:0,2 part of the multi. I have verified that ALSA 1.0.15 is copying the plughw:0,2 HW PCM areas to its LINEAR PCM areas, but NOT finally to its multi PCM areas. It just copies all zeros. That's the reason I hear/record no sound from the plughw:0,2 part of the multi PCM. So I reverted the function's code back to 1.0.9b and presto! It works now, the same as in ALSA 1.0.9b So please tell me, am I missing something? Should I add something more to my .asoundrc ? I see that besides {type multi ... }, there is a {type share ...} defined. *** Does the 'share' have any use here? Can't find any docs on it. Also: Yes, I can see now, why you made this code change. mmap() has limits, so you switched over to malloc(). Those limits force the user to use small buffers and/or reduce the number of channels created. Otherwise aplay, arecord, and jack etc complain mmap() failed. In ALSA 1.0.9b, and after my change to ALSA 1.0.15, I tried ulimit() -l, and editing /etc/security/limits.conf I quadrupled the available locked memory, but aplay, arecord etc still won't let me increase the buffer size beyond what it was BEFORE I edited limits.conf *** What am I doing wrong? Thanks Tim.

2 1

[alsa-devel] alsa timestamps
by Heikki Lindholm 21 Nov '07

21 Nov '07

Hello list, I took up some old dusty code of mine that uses snd_pcm_state followed by snd_pcm_status_get_tstamp when in capture mode. The code used to work, but now the returned timestamps are all zeroes. Is there some API change done recently or is the whole timestamping deprecated or something? I've tried with different drivers on ubuntu's alsa .14 and gentoo's .14. I've also tried mmap'ed and r/w modes, and I'm setting the TSTAMP_MMAP sw param. -- Heikki Lindholm

3 8

Re: [alsa-devel] [alsa-cvslog] alsa-lib: pcm - Limit the avail_min minimum size
by Jaroslav Kysela 21 Nov '07

21 Nov '07

On Tue, 20 Nov 2007, Takashi Iwai wrote: > changeset: 2352:39d34d6a4587 > tag: tip > user: tiwai > date: Tue Nov 20 15:29:10 2007 +0100 > files: src/pcm/pcm.c > description: > pcm - Limit the avail_min minimum size > > Fix avail_min if it's less than period_size. The too small avail_min > is simply useless and the cause of CPU hog with rate plugin. > > > diff -r b1d1733e52f8 -r 39d34d6a4587 src/pcm/pcm.c > --- a/src/pcm/pcm.c Mon Nov 19 08:07:19 2007 +0100 > +++ b/src/pcm/pcm.c Tue Nov 20 15:29:10 2007 +0100 > @@ -5577,6 +5577,12 @@ int snd_pcm_sw_params_set_avail_min(snd_ > #endif > { > assert(pcm && params); > + /* Fix avail_min if it's below period size. The period_size > + * defines the minimal wake-up timing accuracy, so it doesn't > + * make sense to set below that. > + */ > + if (val < pcm->period_size) > + val = pcm->period_size; > params->avail_min = val; > return 0; > } I think that this patch is wrong. We may use system timers to increase (fine-tune) "interrupt" latencies for pcm streams - see tick time in driver and library. Jaroslav ----- Jaroslav Kysela <perex(a)perex.cz> Linux Kernel Sound Maintainer ALSA Project

2 1

[alsa-devel] hda-intel codec realtec ALC883
by Jochen Maes 20 Nov '07

20 Nov '07

hey all, just writing because in order to setup my alsa card i had to do some extra steps that might be documented better. steps taken: 1) add to /etc/modules.d/alsa: options snd-hda-intel model=acer-aspire (this is documented) 2) launch alsamixer, go to the capture screen, select the "capture" and press spacebar + set to 75, d the same for "capture 1" the capture simply didn't work otherwise. kind regards, SeJo -- "Defer no time, delays have dangerous ends" "Ne humanus crede" Jochen Maes http://sejo.be http://monitron.org http://www.freenode.net Codec: Realtek ALC883 Address: 0 Vendor Id: 0x10ec0883 Subsystem Id: 0x10250090 Revision Id: 0x100002 No Modem Function Group found Default PCM: rates [0x560]: 44100 48000 96000 192000 bits [0xe]: 16 20 24 formats [0x1]: PCM Default Amp-In caps: N/A Default Amp-Out caps: N/A Node 0x02 [Audio Output] wcaps 0x11: Stereo PCM: rates [0x560]: 44100 48000 96000 192000 bits [0xe]: 16 20 24 formats [0x1]: PCM Node 0x03 [Audio Output] wcaps 0x11: Stereo PCM: rates [0x560]: 44100 48000 96000 192000 bits [0xe]: 16 20 24 formats [0x1]: PCM Node 0x04 [Audio Output] wcaps 0x11: Stereo PCM: rates [0x560]: 44100 48000 96000 192000 bits [0xe]: 16 20 24 formats [0x1]: PCM Node 0x05 [Audio Output] wcaps 0x11: Stereo PCM: rates [0x560]: 44100 48000 96000 192000 bits [0xe]: 16 20 24 formats [0x1]: PCM Node 0x06 [Audio Output] wcaps 0x211: Stereo Digital PCM: rates [0x560]: 44100 48000 96000 192000 bits [0x1e]: 16 20 24 32 formats [0x1]: PCM Node 0x07 [Vendor Defined Widget] wcaps 0xf00000: Mono Node 0x08 [Audio Input] wcaps 0x10011b: Stereo Amp-In Amp-In caps: ofs=0x08, nsteps=0x1f, stepsize=0x05, mute=1 Amp-In vals: [0x16 0x16] PCM: rates [0x160]: 44100 48000 96000 bits [0x6]: 16 20 formats [0x1]: PCM Connection: 1 0x23 Node 0x09 [Audio Input] wcaps 0x10011b: Stereo Amp-In Amp-In caps: ofs=0x08, nsteps=0x1f, stepsize=0x05, mute=1 Amp-In vals: [0x17 0x17] PCM: rates [0x160]: 44100 48000 96000 bits [0x6]: 16 20 formats [0x1]: PCM Connection: 1 0x22 Node 0x0a [Audio Input] wcaps 0x100391: Stereo Digital PCM: rates [0x560]: 44100 48000 96000 192000 bits [0x1e]: 16 20 24 32 formats [0x1]: PCM Connection: 1 0x1f Node 0x0b [Audio Mixer] wcaps 0x20010b: Stereo Amp-In Amp-In caps: ofs=0x17, nsteps=0x1f, stepsize=0x05, mute=1 Amp-In vals: [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x80 0x80] Connection: 10 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x14 0x15 0x16 0x17 Node 0x0c [Audio Mixer] wcaps 0x20010f: Stereo Amp-In Amp-Out Amp-In caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1 Amp-In vals: [0x00 0x00] [0x00 0x00] Amp-Out caps: ofs=0x1f, nsteps=0x1f, stepsize=0x05, mute=0 Amp-Out vals: [0x19 0x19] Connection: 2 0x02 0x0b Node 0x0d [Audio Mixer] wcaps 0x20010f: Stereo Amp-In Amp-Out Amp-In caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1 Amp-In vals: [0x80 0x80] [0x80 0x80] Amp-Out caps: ofs=0x1f, nsteps=0x1f, stepsize=0x05, mute=0 Amp-Out vals: [0x00 0x00] Connection: 2 0x03 0x0b Node 0x0e [Audio Mixer] wcaps 0x20010f: Stereo Amp-In Amp-Out Amp-In caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1 Amp-In vals: [0x80 0x80] [0x80 0x80] Amp-Out caps: ofs=0x1f, nsteps=0x1f, stepsize=0x05, mute=0 Amp-Out vals: [0x00 0x00] Connection: 2 0x04 0x0b Node 0x0f [Audio Mixer] wcaps 0x20010f: Stereo Amp-In Amp-Out Amp-In caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1 Amp-In vals: [0x80 0x80] [0x80 0x80] Amp-Out caps: ofs=0x1f, nsteps=0x1f, stepsize=0x05, mute=0 Amp-Out vals: [0x00 0x00] Connection: 2 0x05 0x0b Node 0x10 [Vendor Defined Widget] wcaps 0xf00000: Mono Node 0x11 [Vendor Defined Widget] wcaps 0xf00000: Mono Node 0x12 [Vendor Defined Widget] wcaps 0xf00000: Mono Node 0x13 [Vendor Defined Widget] wcaps 0xf00000: Mono Node 0x14 [Pin Complex] wcaps 0x40018f: Stereo Amp-In Amp-Out Amp-In caps: ofs=0x00, nsteps=0x03, stepsize=0x27, mute=0 Amp-In vals: [0x00 0x00] [0x00 0x00] [0x00 0x00] [0x00 0x00] [0x00 0x00] Amp-Out caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1 Amp-Out vals: [0x00 0x00] Pincap 0x083e: IN OUT HP Detect Pin Default 0xc2211110: [Both] HP Out at Ext Front Conn = 1/8, Color = Black Pin-ctls: 0x40: OUT Connection: 5 0x0c* 0x0d 0x0e 0x0f 0x26 Node 0x15 [Pin Complex] wcaps 0x40018f: Stereo Amp-In Amp-Out Amp-In caps: ofs=0x00, nsteps=0x03, stepsize=0x27, mute=0 Amp-In vals: [0x00 0x00] [0x00 0x00] [0x00 0x00] [0x00 0x00] [0x00 0x00] Amp-Out caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1 Amp-Out vals: [0x00 0x00] Pincap 0x083e: IN OUT HP Detect Pin Default 0x411111f0: [N/A] Speaker at Ext Rear Conn = 1/8, Color = Black Pin-ctls: 0x40: OUT Connection: 5 0x0c 0x0d* 0x0e 0x0f 0x26 Node 0x16 [Pin Complex] wcaps 0x40018f: Stereo Amp-In Amp-Out Amp-In caps: ofs=0x00, nsteps=0x03, stepsize=0x27, mute=0 Amp-In vals: [0x00 0x00] [0x00 0x00] [0x00 0x00] [0x00 0x00] [0x00 0x00] Amp-Out caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1 Amp-Out vals: [0x00 0x00] Pincap 0x083e: IN OUT HP Detect Pin Default 0x411111f0: [N/A] Speaker at Ext Rear Conn = 1/8, Color = Black Pin-ctls: 0x40: OUT Connection: 5 0x0c 0x0d 0x0e* 0x0f 0x26 Node 0x17 [Pin Complex] wcaps 0x40018f: Stereo Amp-In Amp-Out Amp-In caps: ofs=0x00, nsteps=0x03, stepsize=0x27, mute=0 Amp-In vals: [0x00 0x00] [0x00 0x00] [0x00 0x00] [0x00 0x00] [0x00 0x00] Amp-Out caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1 Amp-Out vals: [0x00 0x00] Pincap 0x083e: IN OUT HP Detect Pin Default 0x411111f0: [N/A] Speaker at Ext Rear Conn = 1/8, Color = Black Pin-ctls: 0x40: OUT Connection: 5 0x0c 0x0d 0x0e 0x0f* 0x26 Node 0x18 [Pin Complex] wcaps 0x40018f: Stereo Amp-In Amp-Out Amp-In caps: ofs=0x00, nsteps=0x03, stepsize=0x27, mute=0 Amp-In vals: [0x00 0x00] [0x00 0x00] [0x00 0x00] [0x00 0x00] [0x00 0x00] Amp-Out caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1 Amp-Out vals: [0x80 0x80] Pincap 0x08173e: IN OUT HP Detect Pin Default 0x02a19930: [Jack] Mic at Ext Front Conn = 1/8, Color = Pink Pin-ctls: 0x24: IN Connection: 5 0x0c* 0x0d 0x0e 0x0f 0x26 Node 0x19 [Pin Complex] wcaps 0x40018f: Stereo Amp-In Amp-Out Amp-In caps: ofs=0x00, nsteps=0x03, stepsize=0x27, mute=0 Amp-In vals: [0x02 0x02] [0x00 0x00] [0x00 0x00] [0x00 0x00] [0x00 0x00] Amp-Out caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1 Amp-Out vals: [0x80 0x80] Pincap 0x08173e: IN OUT HP Detect Pin Default 0x411111f0: [N/A] Speaker at Ext Rear Conn = 1/8, Color = Black Pin-ctls: 0x24: IN Connection: 5 0x0c* 0x0d 0x0e 0x0f 0x26 Node 0x1a [Pin Complex] wcaps 0x40018f: Stereo Amp-In Amp-Out Amp-In caps: ofs=0x00, nsteps=0x03, stepsize=0x27, mute=0 Amp-In vals: [0x00 0x00] [0x00 0x00] [0x00 0x00] [0x00 0x00] [0x00 0x00] Amp-Out caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1 Amp-Out vals: [0x80 0x80] Pincap 0x08173e: IN OUT HP Detect Pin Default 0x0281313f: [Jack] Line In at Ext Front Conn = 1/8, Color = Blue Pin-ctls: 0x20: IN Connection: 5 0x0c* 0x0d 0x0e 0x0f 0x26 Node 0x1b [Pin Complex] wcaps 0x40018f: Stereo Amp-In Amp-Out Amp-In caps: ofs=0x00, nsteps=0x03, stepsize=0x27, mute=0 Amp-In vals: [0x00 0x00] [0x00 0x00] [0x00 0x00] [0x00 0x00] [0x00 0x00] Amp-Out caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1 Amp-Out vals: [0x00 0x00] Pincap 0x08173e: IN OUT HP Detect Pin Default 0x411111f0: [N/A] Speaker at Ext Rear Conn = 1/8, Color = Black Pin-ctls: 0xc0: OUT HP Connection: 5 0x0c* 0x0d 0x0e 0x0f 0x26 Node 0x1c [Pin Complex] wcaps 0x400001: Stereo Pincap 0x0820: IN Pin Default 0x411111f0: [N/A] Speaker at Ext Rear Conn = 1/8, Color = Black Pin-ctls: 0x00: Node 0x1d [Pin Complex] wcaps 0x400000: Mono Pincap 0x0820: IN Pin Default 0x4015130d: [N/A] Speaker at Ext N/A Conn = Optical, Color = Black Pin-ctls: 0x00: Node 0x1e [Pin Complex] wcaps 0x400300: Mono Digital Pincap 0x0810: OUT Pin Default 0x02451120: [Jack] SPDIF Out at Ext Front Conn = Optical, Color = Black Pin-ctls: 0x00: Connection: 1 0x06 Node 0x1f [Pin Complex] wcaps 0x400200: Mono Digital Pincap 0x0820: IN Pin Default 0x411111f0: [N/A] Speaker at Ext Rear Conn = 1/8, Color = Black Pin-ctls: 0x00: Node 0x20 [Vendor Defined Widget] wcaps 0xf00040: Mono Node 0x21 [Vendor Defined Widget] wcaps 0xf00000: Mono Node 0x22 [Audio Mixer] wcaps 0x20010f: Stereo Amp-In Amp-Out Amp-In caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1 Amp-In vals: [0x00 0x00] [0x00 0x00] [0x00 0x00] [0x80 0x80] [0x00 0x00] [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x80 0x80] Amp-Out caps: N/A Amp-Out vals: [0x00 0x00] Connection: 11 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x14 0x15 0x16 0x17 0x0b Node 0x23 [Audio Mixer] wcaps 0x20010f: Stereo Amp-In Amp-Out Amp-In caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1 Amp-In vals: [0x00 0x00] [0x00 0x00] [0x00 0x00] [0x80 0x80] [0x00 0x00] [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x80 0x80] Amp-Out caps: N/A Amp-Out vals: [0x00 0x00] Connection: 11 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x14 0x15 0x16 0x17 0x0b Node 0x24 [Vendor Defined Widget] wcaps 0xf00000: Mono Node 0x25 [Audio Output] wcaps 0x11: Stereo PCM: rates [0x560]: 44100 48000 96000 192000 bits [0xe]: 16 20 24 formats [0x1]: PCM Node 0x26 [Audio Mixer] wcaps 0x20010f: Stereo Amp-In Amp-Out Amp-In caps: ofs=0x00, nsteps=0x00, stepsize=0x00, mute=1 Amp-In vals: [0x00 0x00] [0x80 0x80] Amp-Out caps: ofs=0x1f, nsteps=0x1f, stepsize=0x05, mute=0 Amp-Out vals: [0x00 0x00] Connection: 2 0x25 0x0b 00:00.0 Host bridge: Intel Corporation Mobile 945GM/PM/GMS, 943/940GML and 945GT Express Memory Controller Hub (rev 03) Subsystem: Acer Incorporated [ALI] Unknown device 0090 Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR- INTx- Latency: 0 Capabilities: [e0] Vendor Specific Information <?> 00:02.0 VGA compatible controller: Intel Corporation Mobile 945GM/GMS, 943/940GML Express Integrated Graphics Controller (rev 03) (prog-if 00 [VGA controller]) Subsystem: Acer Incorporated [ALI] Unknown device 0090 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 17 Region 0: Memory at d0200000 (32-bit, non-prefetchable) [size=512K] Region 1: I/O ports at 5088 [size=8] Region 2: Memory at c0000000 (32-bit, prefetchable) [size=256M] Region 3: Memory at d0300000 (32-bit, non-prefetchable) [size=256K] Capabilities: [90] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable- Address: 00000000 Data: 0000 Capabilities: [d0] Power Management version 2 Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00:02.1 Display controller: Intel Corporation Mobile 945GM/GMS, 943/940GML Express Integrated Graphics Controller (rev 03) Subsystem: Acer Incorporated [ALI] Unknown device 0090 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Region 0: Memory at d0280000 (32-bit, non-prefetchable) [size=512K] Capabilities: [d0] Power Management version 2 Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00:1b.0 Audio device: Intel Corporation 82801G (ICH7 Family) High Definition Audio Controller (rev 02) Subsystem: Acer Incorporated [ALI] Unknown device 0090 Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Interrupt: pin A routed to IRQ 22 Region 0: Memory at d0340000 (64-bit, non-prefetchable) [size=16K] Capabilities: [50] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=55mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [60] Message Signalled Interrupts: Mask- 64bit+ Queue=0/0 Enable- Address: 0000000000000000 Data: 0000 Capabilities: [70] Express (v1) Root Complex Integrated Endpoint, MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us ExtTag- RBE- FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+ MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #0, Speed unknown, Width x0, ASPM unknown, Latency L0 <64ns, L1 <1us ClockPM- Suprise- LLActRep- BwNot- LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk- ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt- Capabilities: [100] Virtual Channel <?> Capabilities: [130] Root Complex Link <?> 00:1c.0 PCI bridge: Intel Corporation 82801G (ICH7 Family) PCI Express Port 1 (rev 02) (prog-if 00 [Normal decode]) Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=02, subordinate=02, sec-latency=0 Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited ExtTag- RBE- FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #1, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <1us, L1 <4us ClockPM- Suprise- LLActRep+ BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk- ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surpise+ Slot # 2, PowerLimit 6.500000; Interlock- NoCompl- SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet+ CmdCplt- HPIrq- LinkChg- Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock- Changed: MRL- PresDet- LinkState- RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable- Address: 00000000 Data: 0000 Capabilities: [90] Subsystem: Acer Incorporated [ALI] Unknown device 0090 Capabilities: [a0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [100] Virtual Channel <?> Capabilities: [180] Root Complex Link <?> 00:1c.1 PCI bridge: Intel Corporation 82801G (ICH7 Family) PCI Express Port 2 (rev 02) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=03, subordinate=03, sec-latency=0 Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited ExtTag- RBE- FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #2, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <1us, L1 <4us ClockPM- Suprise- LLActRep+ BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk- ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surpise+ Slot # 3, PowerLimit 6.500000; Interlock- NoCompl- SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet+ CmdCplt- HPIrq- LinkChg- Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock- Changed: MRL- PresDet- LinkState- RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable- Address: 00000000 Data: 0000 Capabilities: [90] Subsystem: Acer Incorporated [ALI] Unknown device 0090 Capabilities: [a0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [100] Virtual Channel <?> Capabilities: [180] Root Complex Link <?> 00:1c.2 PCI bridge: Intel Corporation 82801G (ICH7 Family) PCI Express Port 3 (rev 02) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=04, subordinate=04, sec-latency=0 Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited ExtTag- RBE- FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #3, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <1us, L1 <4us ClockPM- Suprise- LLActRep+ BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk- ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surpise+ Slot # 4, PowerLimit 6.500000; Interlock- NoCompl- SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock- Changed: MRL- PresDet- LinkState- RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable- Address: 00000000 Data: 0000 Capabilities: [90] Subsystem: Acer Incorporated [ALI] Unknown device 0090 Capabilities: [a0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [100] Virtual Channel <?> Capabilities: [180] Root Complex Link <?> 00:1c.3 PCI bridge: Intel Corporation 82801G (ICH7 Family) PCI Express Port 4 (rev 02) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=05, subordinate=05, sec-latency=0 Memory behind bridge: d0100000-d01fffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited ExtTag- RBE- FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #4, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us ClockPM- Suprise- LLActRep+ BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surpise+ Slot # 5, PowerLimit 6.500000; Interlock- NoCompl- SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet+ CmdCplt- HPIrq- LinkChg- Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- Changed: MRL- PresDet- LinkState- RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable- Address: 00000000 Data: 0000 Capabilities: [90] Subsystem: Acer Incorporated [ALI] Unknown device 0090 Capabilities: [a0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [100] Virtual Channel <?> Capabilities: [180] Root Complex Link <?> 00:1d.0 USB Controller: Intel Corporation 82801G (ICH7 Family) USB UHCI Controller #1 (rev 02) (prog-if 00 [UHCI]) Subsystem: Acer Incorporated [ALI] Unknown device 0090 Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 21 Region 4: I/O ports at 50a0 [size=32] 00:1d.1 USB Controller: Intel Corporation 82801G (ICH7 Family) USB UHCI Controller #2 (rev 02) (prog-if 00 [UHCI]) Subsystem: Acer Incorporated [ALI] Unknown device 0090 Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin B routed to IRQ 19 Region 4: I/O ports at 50c0 [size=32] 00:1d.2 USB Controller: Intel Corporation 82801G (ICH7 Family) USB UHCI Controller #3 (rev 02) (prog-if 00 [UHCI]) Subsystem: Acer Incorporated [ALI] Unknown device 0090 Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin C routed to IRQ 18 Region 4: I/O ports at 50e0 [size=32] 00:1d.3 USB Controller: Intel Corporation 82801G (ICH7 Family) USB UHCI Controller #4 (rev 02) (prog-if 00 [UHCI]) Subsystem: Acer Incorporated [ALI] Unknown device 0090 Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin D routed to IRQ 17 Region 4: I/O ports at 5400 [size=32] 00:1d.7 USB Controller: Intel Corporation 82801G (ICH7 Family) USB2 EHCI Controller (rev 02) (prog-if 20 [EHCI]) Subsystem: Acer Incorporated [ALI] Unknown device 0090 Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 21 Region 0: Memory at d0544000 (32-bit, non-prefetchable) [size=1K] Capabilities: [50] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [58] Debug port: BAR=1 offset=00a0 00:1e.0 PCI bridge: Intel Corporation 82801 Mobile PCI Bridge (rev e2) (prog-if 01 [Subtractive decode]) Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Bus: primary=00, secondary=06, subordinate=0a, sec-latency=32 Memory behind bridge: d0000000-d00fffff Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [50] Subsystem: Acer Incorporated [ALI] Unknown device 0090 00:1f.0 ISA bridge: Intel Corporation 82801GBM (ICH7-M) LPC Interface Bridge (rev 02) Subsystem: Acer Incorporated [ALI] Unknown device 0090 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Capabilities: [e0] Vendor Specific Information <?> 00:1f.2 IDE interface: Intel Corporation 82801GBM/GHM (ICH7 Family) SATA IDE Controller (rev 02) (prog-if 80 [Master]) Subsystem: Acer Incorporated [ALI] Unknown device 0090 Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx+ Latency: 0 Interrupt: pin B routed to IRQ 19 Region 0: I/O ports at 01f0 [size=8] Region 1: I/O ports at 03f4 [size=1] Region 2: I/O ports at 0170 [size=8] Region 3: I/O ports at 0374 [size=1] Region 4: I/O ports at 5440 [size=16] Capabilities: [70] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00:1f.3 SMBus: Intel Corporation 82801G (ICH7 Family) SMBus Controller (rev 02) Subsystem: Acer Incorporated [ALI] Unknown device 0090 Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Interrupt: pin B routed to IRQ 10 Region 4: I/O ports at 5420 [size=32] 05:00.0 Network controller: Intel Corporation PRO/Wireless 3945ABG Network Connection (rev 02) Subsystem: Intel Corporation Unknown device 1001 Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Interrupt: pin A routed to IRQ 10 Region 0: Memory at d0100000 (32-bit, non-prefetchable) [size=4K] Capabilities: [c8] Power Management version 2 Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [d0] Message Signalled Interrupts: Mask- 64bit+ Queue=0/0 Enable- Address: 0000000000000000 Data: 0000 Capabilities: [e0] Express (v1) Legacy Endpoint, MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <512ns, L1 unlimited ExtTag- AttnBtn- AttnInd- PwrInd- RBE- FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr+ FatalErr- UnsuppReq+ AuxPwr+ TransPend- LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <128ns, L1 <64us ClockPM+ Suprise- LLActRep- BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- Capabilities: [100] Advanced Error Reporting <?> Capabilities: [140] Device Serial Number 99-dd-c6-ff-ff-de-18-00 06:01.0 Ethernet controller: Broadcom Corporation BCM4401-B0 100Base-TX (rev 02) Subsystem: Acer Incorporated [ALI] Unknown device 0090 Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 64 Interrupt: pin A routed to IRQ 20 Region 0: Memory at d0000000 (32-bit, non-prefetchable) [size=8K] Capabilities: [40] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=2 PME- 06:04.0 CardBus bridge: ENE Technology Inc CB-712/4 Cardbus Controller (rev 10) Subsystem: Acer Incorporated [ALI] Unknown device 0090 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 168, Cache Line Size: 128 bytes Interrupt: pin A routed to IRQ 17 Region 0: Memory at d0002000 (32-bit, non-prefetchable) [size=4K] Bus: primary=06, secondary=07, subordinate=0a, sec-latency=176 Memory window 0: 50000000-53fff000 (prefetchable) Memory window 1: 54000000-57fff000 I/O window 0: 00001400-000014ff I/O window 1: 00001800-000018ff BridgeCtl: Parity- SERR- ISA- VGA- MAbort- >Reset+ 16bInt+ PostWrite+ 16-bit legacy interface ports at 0001 06:04.1 FLASH memory: ENE Technology Inc ENE PCI Memory Stick Card Reader Controller (rev 01) Subsystem: Acer Incorporated [ALI] Unknown device 0090 Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Interrupt: pin B routed to IRQ 11 Region 0: Memory at d0003000 (32-bit, non-prefetchable) [disabled] [size=128] Capabilities: [80] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 06:04.2 SD Host controller: ENE Technology Inc ENE PCI Secure Digital Card Reader Controller (rev 01) (prog-if 01) Subsystem: Acer Incorporated [ALI] Unknown device 0090 Control: I/O- Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Interrupt: pin B routed to IRQ 16 Region 0: Memory at d0003400 (32-bit, non-prefetchable) [size=256] Capabilities: [80] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 06:04.3 FLASH memory: ENE Technology Inc FLASH memory: ENE Technology Inc: (rev 01) Subsystem: Acer Incorporated [ALI] Unknown device 0090 Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Interrupt: pin B routed to IRQ 11 Region 0: Memory at d0003800 (32-bit, non-prefetchable) [disabled] [size=128] Capabilities: [80] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 06:04.4 FLASH memory: ENE Technology Inc SD/MMC Card Reader Controller (rev 01) Subsystem: Acer Incorporated [ALI] Unknown device 0090 Control: I/O- Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Interrupt: pin B routed to IRQ 16 Region 0: Memory at d0003100 (32-bit, non-prefetchable) [size=256] Capabilities: [80] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME-

2 1

[alsa-devel] [PATCH 0/3] PNP cleanups - Version 2
by Thomas Renninger 20 Nov '07

20 Nov '07

Changes: - Introduce pnp_irq_no instead of pnp_irq_start (same for dma). - Let irq and dma resource structs never access .end. .end was always only a copy of .start for dma and irq Some background what I want to do next to allocate resources on the fly: I want to use pnp_{port,dma,irq,mem} macros mainly in loops to check whether a resource got allocated: e.g.: - if (idx >= PNP_MAX_DMA) { + if (!pnp_dma(dev, idx)) { or: - for (idx = 0; idx < PNP_MAX_IRQ; idx++) { + for (idx = 0; pnp_irq(dev, idx); idx++) { that would look like this in pnp.h: +#define pnp_port(dev,bar) ((dev)->res.allocated_ports > (bar) \ + ? (&(dev)->res.port_resource[(bar)]) : NULL) I'd like to use krealloc to realloc portions of e.g. 8 port resources on the fly. As krealloc modifies the addresses of the array, it must be insured that these are only used at pnp parse time. This seem to work fine for pnpacpi, were most of the: echo {get,fill,clean,...} >/sys/devices/pnp0/*/resources interface does not work for me :) It should be possible to get this working, if I could get some testing help with these interfaces, that would be great. Is any tool making use of this? The "get" looks evil. It reparses the devices' BIOS information. This should work as long as not more resources are attached to a device compared to the initial parse and krealloc must pop in, this should be the case... I wonder whether this get and possibly other sysfs interfaces in drivers/pnp/interface.c can be reverted (it's debug only?). Then the whole parsing code could theoretically be made __init data. Bjorn? Also the pnp_resource_change exported symbol could be a problem, if resources are simply defined by the driver, even there were none (allocated) found by the pnp{isa,bios,acpi} parser. But this should be "workaroundable" by doing one malloc/krealloc portion there. It must be called before insert_resource(..) got called anyway (which passes the address of a struct resource to be registered as global used IO/System Memory). Invalidating the passed struct resource pointers afterwards would be fatal. Just found that problem, I haven't looked at it in detail. Any help, comments, etc. are very much appreciated, Thomas

1 0

[alsa-devel] [PATCH] mm snapshot broken-out-2007-11-20-01-45 build failer tumbler/snapper
by Kamalesh Babulal 20 Nov '07

20 Nov '07

Hi Andrew, The kernel build fails, with following error CC sound/ppc/tumbler.o sound/ppc/tumbler.c: In function ‘snapper_get_capture_source’: sound/ppc/tumbler.c:812: error: ‘union <anonymous>’ has no member named ‘value’ sound/ppc/tumbler.c: In function ‘snapper_put_capture_source’: sound/ppc/tumbler.c:824: error: ‘union <anonymous>’ has no member named ‘enuemerated’ make[2]: *** [sound/ppc/tumbler.o] Error 1 make[1]: *** [sound/ppc] Error 2 make: *** [sound] Error 2 Signed-off-by: Kamalesh Babulal <kamalesh(a)linx.vnet.ibm.com> -- --- linux-2.6.24-rc3/sound/ppc/tumbler.c 2007-11-20 16:13:42.000000000 +0530 +++ linux-2.6.24-rc3/sound/ppc/~tumbler.c 2007-11-20 19:14:27.000000000 +0530 @@ -809,7 +809,7 @@ static int snapper_get_capture_source(st struct pmac_tumbler *mix = chip->mixer_data; snd_assert(mix, return -ENODEV); - ucontrol->value.enumerated.value[0] = mix->capture_source; + ucontrol->value.enumerated.item[0] = mix->capture_source; return 0; } @@ -821,7 +821,7 @@ static int snapper_put_capture_source(st int change; snd_assert(mix, return -ENODEV); - change = ucontrol->value.enuemerated.item[0] != mix->capture_source; + change = ucontrol->value.enumerated.item[0] != mix->capture_source; if (change) { mix->capture_source = !!ucontrol->value.enumerated.item[0]; snapper_set_capture_source(mix); -- Thanks & Regards, Kamalesh Babulal, Linux Technology Center, IBM, ISTL.

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[alsa-devel] Duplex syncronization in ALSA
by Fredrik Lingvall 20 Nov '07

20 Nov '07

Hi all, I am an researcher in the field of acoustic (ultrasonic) signal processing. Normally we use dedicated hardware where the transmit and receive processes are synchronized. Now I want to use a multi-channel sound card (in my case a RME Multiface card) to perform, for example, simple beamforming. Typically, one transmit pulses on an array of transducers (speakers) where each pulse is delayed a certain amount to create focusing or beemsteering. By knowing the soundspeed in the propagation medium one can calculate the double path time-of-flight to various points and then, by beamforming the received signals, one can get an image of the objects that are in front of the acoustic array. Now to my problem: in order to do the processing one need to know the delay in the system from transmit to receive. I have looked at the ALSA lib API docs and some code examples (pcm.c, aplay etc) and it looks like the playback and capture processes are independent in ALSA (i.e., there is no write-and-read-at-the-same-time function). The latency inherent in the soundcard isn't that much of a problem if it is know. It is, however a problem if the latency from transmit to receive is not constant from measurement to measurement. I have written some code (for Octave) that uses MMAP and poll:ing but I don't see how to synchronize the write and read processes (they use two different poll fd:s). What is the best way to do this? Is it possible at all? Regards /Fredrik

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[alsa-devel] snd_pcm_status_get_avail() values
by Markus Korber 20 Nov '07

20 Nov '07

Hello, I've got a driver with the following settings: ,---- | static const struct snd_pcm_hardware svenm_pcm_hardware = { | .info = SNDRV_PCM_INFO_MMAP | | SNDRV_PCM_INFO_MMAP_VALID | | SNDRV_PCM_INFO_BLOCK_TRANSFER | | SNDRV_PCM_INFO_PAUSE | | SNDRV_PCM_INFO_RESUME | | SNDRV_PCM_INFO_INTERLEAVED, | .formats = SNDRV_PCM_FMTBIT_S16_LE | | SNDRV_PCM_FMTBIT_U16_LE, | .channels_min = 2, /* 2 = only stereo */ | .channels_max = 2, | .period_bytes_min = 8*1024, | .period_bytes_max = 8*1024, | .periods_min = 2, | .periods_max = 2, | .buffer_bytes_max = 4*8*1024, | }; `---- ,----[ _pcm_prepare() ] | chip->playback.hw_buffer_size = prtd->period_bytes * 2; /* byte size */ | chip->playback.sw_buffer_size = snd_pcm_lib_buffer_bytes(substream); `---- Since my HW only allows for a period number of 2, I would like to always receive period_bytes_min(max) input bytes from an application (mplayer, xine, etc.) so that I can always fill one complete HW output buffer. The application (mplayer) does [3] to determine the number of bytes it is allowed to write with snd_pcm_writei() (for logging see [4]): ,----[ 3 ] | bytes_to_write = snd_pcm_status_get_avail(status) * bytes_per_sample; `---- (Here 1 sample equals 4 bytes, S16_LE, stereo.) ,----[ 4 ] | fill_audio_out_buffers: bytes_to_write=16384 | alsa-play: frames=4096, len=16384 | fill_audio_out_buffers: bytes_to_write=8192 | alsa-play: frames=2048, len=8192 | fill_audio_out_buffers: bytes_to_write=8192 | alsa-play: frames=2048, len=8192 | fill_audio_out_buffers: bytes_to_write=8192 | alsa-play: frames=2048, len=8192 | fill_audio_out_buffers: bytes_to_write=16384 | alsa-play: frames=4096, len=16384 | fill_audio_out_buffers: bytes_to_write=16384 | alsa-play: frames=4096, len=16384 `---- Furthermore, I'm using the pcm-indirect framework[1] and my hw_ptr always toggles between 0 and period_bytes[2] (bufnum refers to the HW playback buffer number). ,----[ 1 ] | static snd_pcm_uframes_t | chip_pcm_pointer(struct snd_pcm_substream *substream) | { | ... | return snd_pcm_indirect_playback_pointer(substream, &chip->playback, | prtd->playback_hw_ptr); | } `---- ,----[ 2 ] | if (bufnum == 0) | prtd->playback_hw_ptr = 0; | else | prtd->playback_hw_ptr = prtd->period_bytes; `---- Thus, how is the value returned by snd_pcm_status_get_avail determined? I mean, if my pointer always toggles between 0 and period_bytes[2], how can ALSA return the values logged in [4]? Would this mean that I'm not able to process (in the application) the samples fast enough and the HW buffer runs empty in the meantime? (I would expect snd_pcm_status_get_avail to always returns 8192.) Or is there an additional parameter or constraint to somehow limit the input sample number from an application? Thanks. Regards, Markus Korber

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