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[Sound-open-firmware] [PATCH] topology: Add support for memory capabilities
by Liam Girdwood 05 Mar '18

05 Mar '18

Add support in topology to define different memory capabilities that can be included by standard pipeline definitions to set platform specific capabilities for buffers. This patch allows memory capabilities to be defined for each platform and included by all pipeline definitions. Signed-off-by: Liam Girdwood <liam.r.girdwood(a)linux.intel.com> --- topology/Makefile.am | 2 +- topology/common/Makefile.am | 3 ++- topology/common/memory.m4 | 15 +++++++++++++++ topology/dsps/bdw.m4 | 8 ++++++++ topology/dsps/bxt.m4 | 11 +++++++++++ topology/dsps/byt.m4 | 8 ++++++++ topology/dsps/cht.m4 | 8 ++++++++ topology/dsps/hsw.m4 | 8 ++++++++ topology/m4/local.m4 | 19 ++++++++++++++++--- topology/sof/pipe-low-latency-capture.m4 | 6 ++++-- topology/sof/pipe-low-latency-playback.m4 | 12 ++++++++---- topology/sof/pipe-passthrough-capture.m4 | 3 ++- topology/sof/pipe-passthrough-playback.m4 | 3 ++- topology/sof/pipe-pcm-media.m4 | 9 ++++++--- topology/sof/pipe-src-capture.m4 | 8 +++++--- topology/sof/pipe-src-playback.m4 | 6 ++++-- topology/sof/pipe-tone.m4 | 6 ++++-- topology/sof/pipe-volume-capture.m4 | 6 ++++-- topology/sof/pipe-volume-playback.m4 | 6 ++++-- topology/sof/tokens.m4 | 1 + topology/test/tplg-build.sh | 2 +- 21 files changed, 122 insertions(+), 28 deletions(-) create mode 100644 topology/common/memory.m4 diff --git a/topology/Makefile.am b/topology/Makefile.am index 1e80d57..a62aa78 100644 --- a/topology/Makefile.am +++ b/topology/Makefile.am @@ -34,7 +34,7 @@ MACHINES = \ .PRECIOUS: %.conf %.conf : %.m4 ${DEPS} - m4 -I m4 $< > $@ + m4 -I m4 -I common $< > $@ %.tplg : %.conf alsatplg -v 1 -c $< -o $@ diff --git a/topology/common/Makefile.am b/topology/common/Makefile.am index 980f0ce..7e207a7 100644 --- a/topology/common/Makefile.am +++ b/topology/common/Makefile.am @@ -1,3 +1,4 @@ EXTRA_DIST = \ - tlv.m4 + tlv.m4 \ + memory.m4 diff --git a/topology/common/memory.m4 b/topology/common/memory.m4 new file mode 100644 index 0000000..0852dff --- /dev/null +++ b/topology/common/memory.m4 @@ -0,0 +1,15 @@ +dnl +dnl Memory capabilities. +dnl +dnl These are ORed together to create a capability mask that's sent to the +dnl SOF firmware when creating buffer or allocating other memory resources. +dnl +dnl ** Must match SOF_MEM_CAPS_ values in ipc.h ** + +define(`MEM_CAP_RAM', eval(1 << 0)) +define(`MEM_CAP_ROM', eval(1 << 1)) +define(`MEM_CAP_EXT', eval(1 << 2)) +define(`MEM_CAP_LP', eval(1 << 3)) +define(`MEM_CAP_HP', eval(1 << 4)) +define(`MEM_CAP_DMA', eval(1 << 5)) +define(`MEM_CAP_CACHE', eval(1 << 6)) diff --git a/topology/dsps/bdw.m4 b/topology/dsps/bdw.m4 index 428e8bb..ad06362 100644 --- a/topology/dsps/bdw.m4 +++ b/topology/dsps/bdw.m4 @@ -2,6 +2,14 @@ # Broadwell differentiation for pipelines and components # +include(`memory.m4') + +dnl Memory capabilities for diferent buffer types on Broadwell +define(`PLATFORM_DAI_MEM_CAP', MEMCAPS(MEM_CAP_RAM, MEM_CAP_DMA, MEM_CAP_CACHE)) +define(`PLATFORM_HOST_MEM_CAP', MEMCAPS(MEM_CAP_RAM, MEM_CAP_DMA, MEM_CAP_CACHE)) +define(`PLATFORM_PASS_MEM_CAP', MEMCAPS(MEM_CAP_RAM, MEM_CAP_DMA, MEM_CAP_CACHE)) +define(`PLATFORM_COMP_MEM_CAP', MEMCAPS(MEM_CAP_RAM, MEM_CAP_CACHE)) + # Low Latency PCM Configuration SectionVendorTuples."pipe_ll_schedule_plat_tokens" { tokens "sof_sched_tokens" diff --git a/topology/dsps/bxt.m4 b/topology/dsps/bxt.m4 index 688e9fa..61bcb7e 100644 --- a/topology/dsps/bxt.m4 +++ b/topology/dsps/bxt.m4 @@ -2,6 +2,17 @@ # Broxton differentiation for pipelines and components # +include(`memory.m4') + +dnl Memory capabilities for diferent buffer types on Baytrail +define(`PLATFORM_DAI_MEM_CAP', + MEMCAPS(MEM_CAP_RAM, MEM_CAP_DMA, MEM_CAP_CACHE, MEM_CAP_HP)) +define(`PLATFORM_HOST_MEM_CAP', + MEMCAPS(MEM_CAP_RAM, MEM_CAP_DMA, MEM_CAP_CACHE, MEM_CAP_HP)) +define(`PLATFORM_PASS_MEM_CAP', + MEMCAPS(MEM_CAP_RAM, MEM_CAP_DMA, MEM_CAP_CACHE, MEM_CAP_HP)) +define(`PLATFORM_COMP_MEM_CAP', MEMCAPS(MEM_CAP_RAM, MEM_CAP_CACHE)) + # Low Latency PCM Configuration SectionVendorTuples."pipe_ll_schedule_plat_tokens" { tokens "sof_sched_tokens" diff --git a/topology/dsps/byt.m4 b/topology/dsps/byt.m4 index b4defaa..64cee72 100644 --- a/topology/dsps/byt.m4 +++ b/topology/dsps/byt.m4 @@ -2,6 +2,14 @@ # Baytrail differentiation for pipelines and components # +include(`memory.m4') + +dnl Memory capabilities for diferent buffer types on Baytrail +define(`PLATFORM_DAI_MEM_CAP', MEMCAPS(MEM_CAP_RAM, MEM_CAP_DMA, MEM_CAP_CACHE)) +define(`PLATFORM_HOST_MEM_CAP', MEMCAPS(MEM_CAP_RAM, MEM_CAP_DMA, MEM_CAP_CACHE)) +define(`PLATFORM_PASS_MEM_CAP', MEMCAPS(MEM_CAP_RAM, MEM_CAP_DMA, MEM_CAP_CACHE)) +define(`PLATFORM_COMP_MEM_CAP', MEMCAPS(MEM_CAP_RAM, MEM_CAP_CACHE)) + # Low Latency PCM Configuration SectionVendorTuples."pipe_ll_schedule_plat_tokens" { tokens "sof_sched_tokens" diff --git a/topology/dsps/cht.m4 b/topology/dsps/cht.m4 index fdee83d..1f461d9 100644 --- a/topology/dsps/cht.m4 +++ b/topology/dsps/cht.m4 @@ -2,6 +2,14 @@ # Cherrytrail differentiation for pipelines and components # +include(`memory.m4') + +dnl Memory capabilities for diferent buffer types on Cherrytrail +define(`PLATFORM_DAI_MEM_CAP', MEMCAPS(MEM_CAP_RAM, MEM_CAP_DMA, MEM_CAP_CACHE)) +define(`PLATFORM_HOST_MEM_CAP', MEMCAPS(MEM_CAP_RAM, MEM_CAP_DMA, MEM_CAP_CACHE)) +define(`PLATFORM_PASS_MEM_CAP', MEMCAPS(MEM_CAP_RAM, MEM_CAP_DMA, MEM_CAP_CACHE)) +define(`PLATFORM_COMP_MEM_CAP', MEMCAPS(MEM_CAP_RAM, MEM_CAP_CACHE)) + # Low Latency PCM Configuration SectionVendorTuples."pipe_ll_schedule_plat_tokens" { tokens "sof_sched_tokens" diff --git a/topology/dsps/hsw.m4 b/topology/dsps/hsw.m4 index edb417f..074542a 100644 --- a/topology/dsps/hsw.m4 +++ b/topology/dsps/hsw.m4 @@ -2,6 +2,14 @@ # Haswell differentiation for pipelines and components # +include(`memory.m4') + +dnl Memory capabilities for diferent buffer types on Haswell +define(`PLATFORM_DAI_MEM_CAP', MEMCAPS(MEM_CAP_RAM, MEM_CAP_DMA, MEM_CAP_CACHE)) +define(`PLATFORM_HOST_MEM_CAP', MEMCAPS(MEM_CAP_RAM, MEM_CAP_DMA, MEM_CAP_CACHE)) +define(`PLATFORM_PASS_MEM_CAP', MEMCAPS(MEM_CAP_RAM, MEM_CAP_DMA, MEM_CAP_CACHE)) +define(`PLATFORM_COMP_MEM_CAP', MEMCAPS(MEM_CAP_RAM, MEM_CAP_CACHE)) + # Low Latency PCM Configuration SectionVendorTuples."pipe_ll_schedule_plat_tokens" { tokens "sof_sched_tokens" diff --git a/topology/m4/local.m4 b/topology/m4/local.m4 index 29b8b29..14d742d 100644 --- a/topology/m4/local.m4 +++ b/topology/m4/local.m4 @@ -4,13 +4,25 @@ define(`concat',`$1$2') define(`STR', `"'$1`"') +dnl Argument iterator. define(`argn', `ifelse(`$1', 1, ``$2'', `argn(decr(`$1'), shift(shift($@)))')') -define(`KCONTROLS', `pushdef(`i', $#) pushdef(`j', `1') KCONTROL_LOOP($@)') -define(`KCONTROL_LOOP', `argn(j,$@) +dnl Defines a list of items from a variable number of params. +dnl Use as last argument in a macro. +define(`LIST_LOOP', `argn(j,$@) ifelse(i,`1', `', `define(`i', decr(i)) define(`j', incr(j)) $0($@)')') +dnl Sums a list of variable arguments. Use as last argument in macro. +define(`SUM_LOOP', `eval(argn(j,$@) + ifelse(i,`1', `', `define(`i', decr(i)) define(`j', incr(j)) + $0($@)'))') + +dnl Support a varaible list of kcontrols. +define(`KCONTROLS', `pushdef(`i', $#) pushdef(`j', `1') LIST_LOOP($@)') + +dnl Memory capabilities +define(`MEMCAPS', `pushdef(`i', $#) pushdef(`j', `1') SUM_LOOP($@)') + dnl create direct DAPM/pipeline link between 2 widgets) define(`dapm', `"$1, , $2"') @@ -53,12 +65,13 @@ define(`W_SRC', dnl Buffer name) define(`N_BUFFER', `BUF'PIPELINE_ID`.'$1) -dnl W_BUFFER(name, size) +dnl W_BUFFER(name, size, capabilities) define(`W_BUFFER', `SectionVendorTuples."'N_BUFFER($1)`_tuples" {' ` tokens "sof_buffer_tokens"' ` tuples."word" {' ` SOF_TKN_BUF_SIZE' STR($2) +` SOF_TKN_BUF_CAPS' $3 ` }' `}' `SectionData."'N_BUFFER($1)`_data" {' diff --git a/topology/sof/pipe-low-latency-capture.m4 b/topology/sof/pipe-low-latency-capture.m4 index 2602ebd..41fc622 100644 --- a/topology/sof/pipe-low-latency-capture.m4 +++ b/topology/sof/pipe-low-latency-capture.m4 @@ -52,9 +52,11 @@ W_PGA(0, PIPELINE_FORMAT, 2, 2, 0, KCONTROLS("PCM PCM_ID Capture Volume")) # Capture Buffers W_BUFFER(0, COMP_BUFFER_SIZE(2, - COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES)) + COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES), + PLATFORM_DAI_MEM_CAP) W_BUFFER(1, COMP_BUFFER_SIZE(2, - COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES)) + COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES), + PLATFORM_HOST_MEM_CAP) # # Pipeline Graph diff --git a/topology/sof/pipe-low-latency-playback.m4 b/topology/sof/pipe-low-latency-playback.m4 index ebb14ec..37f8be2 100644 --- a/topology/sof/pipe-low-latency-playback.m4 +++ b/topology/sof/pipe-low-latency-playback.m4 @@ -101,13 +101,17 @@ W_MIXER(0, PIPELINE_FORMAT, 1, 1, 1) # Low Latency Buffers W_BUFFER(0, COMP_BUFFER_SIZE(2, - COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES)) + COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES), + PLATFORM_HOST_MEM_CAP) W_BUFFER(1, COMP_BUFFER_SIZE(1, - COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS,SCHEDULE_FRAMES)) + COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS,SCHEDULE_FRAMES), + PLATFORM_COMP_MEM_CAP) W_BUFFER(2, COMP_BUFFER_SIZE(1, - COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES)) + COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES), + PLATFORM_COMP_MEM_CAP) W_BUFFER(3, COMP_BUFFER_SIZE(2, - COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES)) + COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES), + PLATFORM_DAI_MEM_CAP) # # Pipeline Graph diff --git a/topology/sof/pipe-passthrough-capture.m4 b/topology/sof/pipe-passthrough-capture.m4 index 2c2a495..b0dfe48 100644 --- a/topology/sof/pipe-passthrough-capture.m4 +++ b/topology/sof/pipe-passthrough-capture.m4 @@ -18,7 +18,8 @@ W_PCM_CAPTURE(Passthrough Capture, PIPELINE_DMAC, PIPELINE_DMAC_CHAN, 0, 2, 2) # Capture Buffers W_BUFFER(0, COMP_BUFFER_SIZE(2, - COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES)) + COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES), + PLATFORM_PASS_MEM_CAP) # # DAI definitions diff --git a/topology/sof/pipe-passthrough-playback.m4 b/topology/sof/pipe-passthrough-playback.m4 index 1722256..b86f1b3 100644 --- a/topology/sof/pipe-passthrough-playback.m4 +++ b/topology/sof/pipe-passthrough-playback.m4 @@ -18,7 +18,8 @@ W_PCM_PLAYBACK(Passthrough Playback, PIPELINE_DMAC, PIPELINE_DMAC_CHAN, 2, 0, 2) # Playback Buffers W_BUFFER(0, COMP_BUFFER_SIZE(2, - COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES)) + COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES), + PLATFORM_PASS_MEM_CAP) # # DAI definitions diff --git a/topology/sof/pipe-pcm-media.m4 b/topology/sof/pipe-pcm-media.m4 index 526ae35..1766aca 100644 --- a/topology/sof/pipe-pcm-media.m4 +++ b/topology/sof/pipe-pcm-media.m4 @@ -75,13 +75,16 @@ W_SRC(0, PIPELINE_FORMAT, 2, 2, media_src_conf, 2) # Media Source Buffers to SRC, make them big enough to deal with 2 * rate. W_BUFFER(0, COMP_BUFFER_SIZE(4, - COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES)) + COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES), + PLATFORM_HOST_MEM_CAP) W_BUFFER(1,COMP_BUFFER_SIZE(4, - COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES)) + COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES), + PLATFORM_COMP_MEM_CAP) # Buffer B2 is on fixed rate sink side of SRC. Set it 1.5 * rate. W_BUFFER(2, COMP_BUFFER_SIZE(3, - COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES)) + COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES), + PLATFORM_COMP_MEM_CAP) # # Pipeline Graph diff --git a/topology/sof/pipe-src-capture.m4 b/topology/sof/pipe-src-capture.m4 index dc55dd2..96d7ee7 100644 --- a/topology/sof/pipe-src-capture.m4 +++ b/topology/sof/pipe-src-capture.m4 @@ -37,9 +37,11 @@ W_SRC(0, PIPELINE_FORMAT, 4, 4, media_src_conf, 2) # Capture Buffers W_BUFFER(0, COMP_BUFFER_SIZE(4, - COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES)) + COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES), + PLATFORM_HOST_MEM_CAP) W_BUFFER(1, COMP_BUFFER_SIZE(4, - COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES)) + COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES), + PLATFORM_DAI_MEM_CAP) # # DAI definitions @@ -56,7 +58,7 @@ W_PIPELINE(N_DAI_IN, SCHEDULE_DEADLINE, SCHEDULE_PRIORITY, SCHEDULE_FRAMES, # # Pipeline Graph # -# host PCM_P --> B0 --> SRC 0 --> B1 --> sink DAI0 +# host PCM_P <-- B0 <-- SRC 0 <-- B1 <-- sink DAI0 SectionGraph."pipe-pass-src-capture-PIPELINE_ID" { index STR(PIPELINE_ID) diff --git a/topology/sof/pipe-src-playback.m4 b/topology/sof/pipe-src-playback.m4 index d037543..a6141c9 100644 --- a/topology/sof/pipe-src-playback.m4 +++ b/topology/sof/pipe-src-playback.m4 @@ -37,9 +37,11 @@ W_SRC(0, PIPELINE_FORMAT, 4, 4, media_src_conf, 2) # Playback Buffers W_BUFFER(0, COMP_BUFFER_SIZE(4, - COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES)) + COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES), + PLATFORM_HOST_MEM_CAP) W_BUFFER(1, COMP_BUFFER_SIZE(4, - COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES)) + COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES), + PLATFORM_DAI_MEM_CAP) # # DAI definitions diff --git a/topology/sof/pipe-tone.m4 b/topology/sof/pipe-tone.m4 index e04a1b9..a8064ab 100644 --- a/topology/sof/pipe-tone.m4 +++ b/topology/sof/pipe-tone.m4 @@ -54,9 +54,11 @@ W_PGA(0, PIPELINE_FORMAT, 2, 2, 0, KCONTROLS("Tone Volume PIPELINE_ID")) # Low Latency Buffers W_BUFFER(0,COMP_BUFFER_SIZE(2, - COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES)) + COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES), + PLATFORM_COMP_MEM_CAP) W_BUFFER(1, COMP_BUFFER_SIZE(2, - COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES)) + COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES), + PLATFORM_COMP_MEM_CAP) # diff --git a/topology/sof/pipe-volume-capture.m4 b/topology/sof/pipe-volume-capture.m4 index 58e5393..2fd6b98 100644 --- a/topology/sof/pipe-volume-capture.m4 +++ b/topology/sof/pipe-volume-capture.m4 @@ -51,9 +51,11 @@ W_PGA(0, PIPELINE_FORMAT, 2, 2, 2, KCONTROLS("Master Capture Volume")) # Capture Buffers W_BUFFER(0, COMP_BUFFER_SIZE(2, - COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES)) + COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES), + PLATFORM_HOST_MEM_CAP) W_BUFFER(1, COMP_BUFFER_SIZE(2, - COMP_SAMPLE_SIZE(DAI_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES)) + COMP_SAMPLE_SIZE(DAI_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES), + PLATFORM_DAI_MEM_CAP) # # DAI definitions diff --git a/topology/sof/pipe-volume-playback.m4 b/topology/sof/pipe-volume-playback.m4 index 8aa02fb..9431177 100644 --- a/topology/sof/pipe-volume-playback.m4 +++ b/topology/sof/pipe-volume-playback.m4 @@ -77,9 +77,11 @@ W_PGA(0, PIPELINE_FORMAT, 2, 2, 2, KCONTROLS("Master Playback Volume Switch", "M # Playback Buffers W_BUFFER(0, COMP_BUFFER_SIZE(2, - COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES)) + COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES), + PLATFORM_HOST_MEM_CAP) W_BUFFER(1, COMP_BUFFER_SIZE(2, - COMP_SAMPLE_SIZE(DAI_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES)) + COMP_SAMPLE_SIZE(DAI_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES), + PLATFORM_DAI_MEM_CAP) # # DAI definitions diff --git a/topology/sof/tokens.m4 b/topology/sof/tokens.m4 index 704effc..6b966b3 100644 --- a/topology/sof/tokens.m4 +++ b/topology/sof/tokens.m4 @@ -11,6 +11,7 @@ SectionVendorTokens."sof_buffer_tokens" { SOF_TKN_BUF_SIZE "100" + SOF_TKN_BUF_CAPS "101" } SectionVendorTokens."sof_dai_tokens" { diff --git a/topology/test/tplg-build.sh b/topology/test/tplg-build.sh index 047ef6b..9022d1c 100755 --- a/topology/test/tplg-build.sh +++ b/topology/test/tplg-build.sh @@ -8,7 +8,7 @@ set -e # M4 preprocessor flags -M4_FLAGS="-I ../ -I ../m4" +M4_FLAGS="-I ../ -I ../m4 -I ../common" # Simple component test cases # can be used on components with 1 sink and 1 source. -- 2.14.1

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[Sound-open-firmware] [PATCH 1/5] topology: create m4 wrapper for mixer control section
by Ranjani Sridharan 05 Mar '18

05 Mar '18

This patch adds m4 wrapper for mixercontrol section in pipeline definition Signed-off-by: Ranjani Sridharan <ranjani.sridharan(a)linux.intel.com> --- topology/m4/local.m4 | 55 +++++++++++++++++++++-- topology/sof/pipe-low-latency-capture.m4 | 36 ++++----------- topology/sof/pipe-low-latency-playback.m4 | 73 +++++++------------------------ topology/sof/pipe-pcm-media.m4 | 37 ++++------------ topology/sof/pipe-tone.m4 | 73 +++++++------------------------ topology/sof/pipe-volume-capture.m4 | 35 ++++----------- topology/sof/pipe-volume-playback.m4 | 70 +++++++---------------------- 7 files changed, 127 insertions(+), 252 deletions(-) diff --git a/topology/m4/local.m4 b/topology/m4/local.m4 index a340ec3..4521314 100644 --- a/topology/m4/local.m4 +++ b/topology/m4/local.m4 @@ -7,9 +7,13 @@ define(`STR', `"'$1`"') define(`argn', `ifelse(`$1', 1, ``$2'', `argn(decr(`$1'), shift(shift($@)))')') -define(`KCONTROLS', `pushdef(`i', $#) pushdef(`j', `1') KCONTROL_LOOP($@)') -define(`KCONTROL_LOOP', `argn(j,$@) - ifelse(i,`1', `', `define(`i', decr(i)) define(`j', incr(j)) $0($@)')') +define(`KCONTROLS', `pushdef(`i', $#)pushdef(`j', `1')KCONTROL_LOOP($@)popdef(i)popdef(j)') +define(`KCONTROL_LOOP',`argn(j,$@) + ifelse(i,`1', `',`define(`i', decr(i))define(`j', incr(j))$0($@)')') + +define(`MIXERCONTROLS', `pushdef(`i', $#)pushdef(`j', `1')MIXERCONTROL_LOOP($@)popdef(i)popdef(j)') +define(`MIXERCONTROL_LOOP',`argn(j,$@) + ifelse(i,`1', `',`define(`i', decr(i))define(`j', incr(j))$0($@)')') dnl create direct DAPM/pipeline link between 2 widgets) define(`dapm', `"$1, , $2"') @@ -549,4 +553,49 @@ define(`PCM_DUPLEX_ADD', ` }' `}') +dnl KCONTROL_CHANNEL(name, reg, shift) +define(`KCONTROL_CHANNEL', +`channel.STR($1) {' +` reg STR($2)' +` shift STR($3)' +` }') + +dnl CONTROLMIXER_MAX(comment, value) +define(`CONTROLMIXER_MAX', +`#$1' +` max STR($2)') + +dnl CONTROLMIXER_TLV(comment, value) +define(`CONTROLMIXER_TLV', +`#$1' +` tlv STR($2)') + +dnl CONTROLMIXER_OPS(info, comment, get, put) +define(`CONTROLMIXER_OPS', +`ops."ctl" {' +` info STR($1)' +` #$2' +` get STR($3)' +` put STR($4)' +` }') + +dnl C_CONTROLMIXER(name, index, ops, max, invert, tlv, KCONTROL_CHANNELS) +define(`C_CONTROLMIXER', +`SectionControlMixer.STR($1) {' +`' +` # control belongs to this index group' +` index STR($2)' +`' +` #$7' +` $8' +` # control uses bespoke driver get/put/info ID' +` $3' +`' +` $4' +` invert STR($5)' +` $6' +`}') + divert(0) dnl + + diff --git a/topology/sof/pipe-low-latency-capture.m4 b/topology/sof/pipe-low-latency-capture.m4 index 2602ebd..a82dee1 100644 --- a/topology/sof/pipe-low-latency-capture.m4 +++ b/topology/sof/pipe-low-latency-capture.m4 @@ -10,34 +10,14 @@ include(`local.m4') # # Controls # - -SectionControlMixer.STR(PCM PCM_ID Capture Volume) { - - # control belongs to this index group - index STR(PIPELINE_ID) - - # Channel register and shift for Front Left/Right - channel."FL" { - reg "0" - shift "0" - } - channel."FR" { - reg "0" - shift "1" - } - - # control uses bespoke driver get/put/info ID 0 - ops."ctl" { - info "volsw" - get "256" - put "256" - } - - # TLV 40 steps from -90dB to +20dB for 3dB - max "40" - invert "false" - tlv "vtlv_m90s3" -} +# Volume Mixer control with max value of 32 +C_CONTROLMIXER(PCM PCM_ID Capture Volume, PIPELINE_ID, + CONTROLMIXER_OPS(volsw, 256 binds the mixer control to volume get/put handlers, 256, 256), + CONTROLMIXER_MAX(, 40), + false, + CONTROLMIXER_TLV(TLV 32 steps from -90dB to +6dB for 3dB, vtlv_m90s3), + Channel register and shift for Front Left/Right, + MIXERCONTROLS(KCONTROL_CHANNEL(FL, 0, 0), KCONTROL_CHANNEL(FR, 0, 1))) # # Components and Buffers diff --git a/topology/sof/pipe-low-latency-playback.m4 b/topology/sof/pipe-low-latency-playback.m4 index ebb14ec..3b8d6aa 100644 --- a/topology/sof/pipe-low-latency-playback.m4 +++ b/topology/sof/pipe-low-latency-playback.m4 @@ -25,62 +25,23 @@ include(`local.m4') # # Controls # - -SectionControlMixer.STR(PCM PCM_ID Playback Volume) { - - # control belongs to this index group - index STR(PIPELINE_ID) - - # Channel register and shift for Front Left/Right - channel."FL" { - reg "0" - shift "0" - } - channel."FR" { - reg "0" - shift "1" - } - - # control uses bespoke driver get/put/info ID 0 - ops."ctl" { - info "volsw" - get "256" - put "256" - } - - # TLV 32 steps from -90dB to +6dB for 3dB - max "32" - invert "false" - tlv "vtlv_m90s3" -} - -SectionControlMixer.STR(Master Playback Volume) { - - # control belongs to this index group - index STR(PIPELINE_ID) - - # Channel register and shift for Front Left/Right - channel."FL" { - reg "1" - shift "0" - } - channel."FR" { - reg "1" - shift "1" - } - - # control uses bespoke driver get/put/info ID 0 - ops."ctl" { - info "volsw" - get "256" - put "256" - } - - # TLV 32 steps from -90dB to +6dB for 3dB - max "32" - invert "false" - tlv "vtlv_m90s3" -} +# Volume Mixer control with max value of 32 +C_CONTROLMIXER(PCM PCM_ID Playback Volume, PIPELINE_ID, + CONTROLMIXER_OPS(volsw, 256 binds the mixer control to volume get/put handlers, 256, 256), + CONTROLMIXER_MAX(, 32), + false, + CONTROLMIXER_TLV(TLV 32 steps from -90dB to +6dB for 3dB, vtlv_m90s3), + Channel register and shift for Front Left/Right, + MIXERCONTROLS(KCONTROL_CHANNEL(FL, 0, 0), KCONTROL_CHANNEL(FR, 0, 1))) + +# Volume Mixer control with max value of 32 +C_CONTROLMIXER(Master Playback Volume, PIPELINE_ID, + CONTROLMIXER_OPS(volsw, 256 binds the mixer control to volume get/put handlers, 256, 256), + CONTROLMIXER_MAX(, 32), + false, + CONTROLMIXER_TLV(TLV 32 steps from -90dB to +6dB for 3dB, vtlv_m90s3), + Channel register and shift for Front Left/Right, + MIXERCONTROLS(KCONTROL_CHANNEL(FL, 1, 0), KCONTROL_CHANNEL(FR, 1, 1))) # # Components and Buffers diff --git a/topology/sof/pipe-pcm-media.m4 b/topology/sof/pipe-pcm-media.m4 index 526ae35..65dc62d 100644 --- a/topology/sof/pipe-pcm-media.m4 +++ b/topology/sof/pipe-pcm-media.m4 @@ -13,35 +13,14 @@ include(`local.m4') # # Controls # - -SectionControlMixer.STR(PCM PCM_ID Playback Volume) { - - # control belongs to this index group - index STR(PIPELINE_ID) - - # Channel register and shift for Front Left/Right - channel."FL" { - reg "1" - shift "0" - } - channel."FR" { - reg "1" - shift "1" - } - - # control uses bespoke driver get/put/info ID 0 - ops."ctl" { - info "volsw" - get "256" - put "256" - } - - # TLV 32 steps from -90dB to +6dB for 3dB - max "32" - invert "false" - tlv "vtlv_m90s3" -} - +# Volume Mixer control with max value of 32 +C_CONTROLMIXER(PCM PCM_ID Playback Volume, PIPELINE_ID, + CONTROLMIXER_OPS(volsw, 256 binds the mixer control to volume get/put handlers, 256, 256), + CONTROLMIXER_MAX(, 32), + false, + CONTROLMIXER_TLV(TLV 32 steps from -90dB to +6dB for 3dB, vtlv_m90s3), + Channel register and shift for Front Left/Right, + MIXERCONTROLS(KCONTROL_CHANNEL(FL, 1, 0), KCONTROL_CHANNEL(FR, 1, 1))) # # SRC Configuration diff --git a/topology/sof/pipe-tone.m4 b/topology/sof/pipe-tone.m4 index 8f92680..b735146 100644 --- a/topology/sof/pipe-tone.m4 +++ b/topology/sof/pipe-tone.m4 @@ -14,62 +14,23 @@ include(`local.m4') # Controls # -SectionControlMixer.STR(Tone Volume PIPELINE_ID) { - - # control belongs to this index group - index STR(PIPELINE_ID) - - # Channel register and shift for Front Left/Right - channel."FL" { - reg "1" - shift "0" - } - channel."FR" { - reg "1" - shift "1" - } - - # control uses bespoke driver get/put/info ID 0 - ops."ctl" { - info "volsw" - # 256 binds the mixer control to volume get/put handlers - get "256" - put "256" - } - - # TLV 32 steps from -90dB to +6dB for 3dB - max "32" - invert "false" - tlv "vtlv_m90s3" -} - -SectionControlMixer.STR(Tone Switch PIPELINE_ID) { - - # control belongs to this index group - index STR(PIPELINE_ID) - - # Channel register and shift for Front Left/Right - channel."FL" { - reg "2" - shift "0" - } - channel."FR" { - reg "2" - shift "1" - } - - # control uses bespoke driver get/put/info ID 0 - ops."ctl" { - info "volsw" - # 256 binds the mixer control to volume get/put handlers - get "256" - put "256" - } - - # max 1 indicates switch type mixer control - max "1" - invert "false" -} +# Volume Mixer control with max value of 32 +C_CONTROLMIXER(Tone Volume PIPELINE_ID, PIPELINE_ID, + CONTROLMIXER_OPS(volsw, 256 binds the mixer control to volume get/put handlers, 256, 256), + CONTROLMIXER_MAX(, 32), + false, + CONTROLMIXER_TLV(TLV 32 steps from -90dB to +6dB for 3dB, vtlv_m90s3), + Channel register and shift for Front Left/Right, + MIXERCONTROLS(KCONTROL_CHANNEL(FL, 1, 0), KCONTROL_CHANNEL(FR, 1, 1))) + +# Switch type Mixer Control with max value of 1 +C_CONTROLMIXER(Tone Switch PIPELINE_ID, PIPELINE_ID, + CONTROLMIXER_OPS(volsw, 256 binds the mixer control to volume get/put handlers, 256, 256), + CONTROLMIXER_MAX(max 1 indicates switch type control, 1), + false, + , + Channel register and shift for Front Left/Right, + MIXERCONTROLS(KCONTROL_CHANNEL(FL, 2, 0), KCONTROL_CHANNEL(FR, 2, 1))) # # Components and Buffers diff --git a/topology/sof/pipe-volume-capture.m4 b/topology/sof/pipe-volume-capture.m4 index 58e5393..1cde24e 100644 --- a/topology/sof/pipe-volume-capture.m4 +++ b/topology/sof/pipe-volume-capture.m4 @@ -10,33 +10,14 @@ include(`local.m4') # # Controls # -SectionControlMixer.STR(Master Capture Volume) { - - # control belongs to this index group - index STR(PIPELINE_ID) - - # Channel register and shift for Front Left/Right - channel."FL" { - reg "1" - shift "0" - } - channel."FR" { - reg "1" - shift "1" - } - - # control uses bespoke driver get/put/info ID 0 - ops."ctl" { - info "volsw" - get "256" - put "256" - } - - # TLV 32 steps from -90dB to +6dB for 3dB - max "32" - invert "false" - tlv "vtlv_m90s3" -} +# Volume Mixer control with max value of 32 +C_CONTROLMIXER(Master Capture Volume, PIPELINE_ID, + CONTROLMIXER_OPS(volsw, 256 binds the mixer control to volume get/put handlers, 256, 256), + CONTROLMIXER_MAX(, 32), + false, + CONTROLMIXER_TLV(TLV 32 steps from -90dB to +6dB for 3dB, vtlv_m90s3), + Channel register and shift for Front Left/Right, + MIXERCONTROLS(KCONTROL_CHANNEL(FL, 1, 0), KCONTROL_CHANNEL(FR, 1, 1))) # # Components and Buffers diff --git a/topology/sof/pipe-volume-playback.m4 b/topology/sof/pipe-volume-playback.m4 index 8aa02fb..a6b5a1d 100644 --- a/topology/sof/pipe-volume-playback.m4 +++ b/topology/sof/pipe-volume-playback.m4 @@ -10,60 +10,24 @@ include(`local.m4') # # Controls # -SectionControlMixer.STR(Master Playback Volume) { +# Volume Mixer control with max value of 32 +C_CONTROLMIXER(Master Playback Volume, PIPELINE_ID, + CONTROLMIXER_OPS(volsw, 256 binds the mixer control to volume get/put handlers, 256, 256), + CONTROLMIXER_MAX(, 32), + false, + CONTROLMIXER_TLV(TLV 32 steps from -90dB to +6dB for 3dB, vtlv_m90s3), + Channel register and shift for Front Left/Right, + MIXERCONTROLS(KCONTROL_CHANNEL(FL, 1, 0), KCONTROL_CHANNEL(FR, 1, 1))) + +# Volume Mixer Switch control with max value of 1 +C_CONTROLMIXER(Master Playback Volume Switch, PIPELINE_ID, + CONTROLMIXER_OPS(volsw, 256 binds the mixer control to volume get/put handlers, 256, 256), + CONTROLMIXER_MAX(max value 1 indicates switch type control, 1), + false, + , + Channel register and shift for Front Left/Right, + MIXERCONTROLS(KCONTROL_CHANNEL(FL, 1, 0), KCONTROL_CHANNEL(FR, 1, 1))) - # control belongs to this index group - index STR(PIPELINE_ID) - - # Channel register and shift for Front Left/Right - channel."FL" { - reg "1" - shift "0" - } - channel."FR" { - reg "1" - shift "1" - } - - # control uses bespoke driver get/put/info ID 0 - ops."ctl" { - info "volsw" - get "256" - put "256" - } - - # TLV 32 steps from -90dB to +6dB for 3dB - max "32" - invert "false" - tlv "vtlv_m90s3" -} - -SectionControlMixer.STR(Master Playback Volume Switch) { - - # control belongs to this index group - index STR(PIPELINE_ID) - - # Channel register and shift for Front Left/Right - channel."FL" { - reg "1" - shift "0" - } - channel."FR" { - reg "1" - shift "1" - } - - # control uses bespoke driver get/put/info ID 0 - ops."ctl" { - info "volsw" - get "256" - put "256" - } - - # Volume mute on/off - max "1" - invert "false" -} # # Components and Buffers # -- 2.14.1

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[Sound-open-firmware] [PATCH 1/2] topology: add kcontrol for tone
by Ranjani Sridharan 04 Mar '18

04 Mar '18

This patch adds the changes required to support kcontrols for tone components in topology Signed-off-by: Ranjani Sridharan <ranjani.sridharan(a)linux.intel.com> --- Tested with: Minnowboard Turbot rt5651 SOF master: 28cb21b578759cdaa884d440d7d79b2c44e716a4 SOF-Tool master: a02abb799405d0e4ad0d6bb46eacf6fbe958c06e https://github.com/plbossart/sound/tree/topic/sof-v4.14: 9513a73b981bc1917705671ec54402a7e21672eb --- --- topology/m4/local.m4 | 5 ++++- topology/sof/pipe-tone.m4 | 31 ++++++++++++++++++++++++++++++- 2 files changed, 34 insertions(+), 2 deletions(-) diff --git a/topology/m4/local.m4 b/topology/m4/local.m4 index 29b8b29..a340ec3 100644 --- a/topology/m4/local.m4 +++ b/topology/m4/local.m4 @@ -227,7 +227,7 @@ define(`W_MIXER', dnl Tone name) define(`N_TONE', `TONE'PIPELINE_ID`.'$1) -dnl W_TONE(name, format, periods_sink, periods_source, preload) +dnl W_TONE(name, format, periods_sink, periods_source, preload, kcontrols) define(`W_TONE', `SectionVendorTuples."'N_TONE($1)`_tuples_w" {' ` tokens "sof_comp_tokens"' @@ -257,6 +257,9 @@ define(`W_TONE', ` "'N_TONE($1)`_data_w"' ` "'N_TONE($1)`_data_str"' ` ]' +` mixer [' + $6 +` ]' `}') dnl DAI name) diff --git a/topology/sof/pipe-tone.m4 b/topology/sof/pipe-tone.m4 index e04a1b9..8f92680 100644 --- a/topology/sof/pipe-tone.m4 +++ b/topology/sof/pipe-tone.m4 @@ -32,6 +32,7 @@ SectionControlMixer.STR(Tone Volume PIPELINE_ID) { # control uses bespoke driver get/put/info ID 0 ops."ctl" { info "volsw" + # 256 binds the mixer control to volume get/put handlers get "256" put "256" } @@ -42,12 +43,40 @@ SectionControlMixer.STR(Tone Volume PIPELINE_ID) { tlv "vtlv_m90s3" } +SectionControlMixer.STR(Tone Switch PIPELINE_ID) { + + # control belongs to this index group + index STR(PIPELINE_ID) + + # Channel register and shift for Front Left/Right + channel."FL" { + reg "2" + shift "0" + } + channel."FR" { + reg "2" + shift "1" + } + + # control uses bespoke driver get/put/info ID 0 + ops."ctl" { + info "volsw" + # 256 binds the mixer control to volume get/put handlers + get "256" + put "256" + } + + # max 1 indicates switch type mixer control + max "1" + invert "false" +} + # # Components and Buffers # # "Tone 0" has 2 sink period and 0 source periods -W_TONE(0, PIPELINE_FORMAT, 2, 0, 0) +W_TONE(0, PIPELINE_FORMAT, 2, 0, 0, KCONTROLS("Tone Switch PIPELINE_ID")) # "Tone Volume" has 2 sink period and 2 source periods W_PGA(0, PIPELINE_FORMAT, 2, 2, 0, KCONTROLS("Tone Volume PIPELINE_ID")) -- 2.14.1

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[Sound-open-firmware] Please make sure to run checkpatch --codespell --strict before submitting patches
by Li, Jocelyn 03 Mar '18

03 Mar '18

Please make sure to run checkpatch --codespell -strict and fix the warnings before submitting patches. Thanks, Jocelyn

1 0

[Sound-open-firmware] [PATCH] Remove "void*" pointer of parse_page_descriptors().
by yan.wang＠linux.intel.com 02 Mar '18

02 Mar '18

From: Yan Wang <yan.wang(a)linux.intel.com> Compiler cannot check the real type of "void*" pointer. It is easy to cause pointer conversion error. So use the pointer of element list of struct dma_sg_elem instead of void* pointer. Signed-off-by: Yan Wang <yan.wang(a)linux.intel.com> --- src/ipc/intel-ipc.c | 106 ++++++++++++++++++++++++++++++++++++++-------------- 1 file changed, 77 insertions(+), 29 deletions(-) diff --git a/src/ipc/intel-ipc.c b/src/ipc/intel-ipc.c index 04e8c1b..373cc26 100644 --- a/src/ipc/intel-ipc.c +++ b/src/ipc/intel-ipc.c @@ -158,24 +158,13 @@ out: * page table entry and adding each elem to a list in struct dma_sg_config. */ static int parse_page_descriptors(struct intel_ipc_data *iipc, - struct sof_ipc_host_buffer *ring, void *data, uint32_t is_trace) + struct sof_ipc_host_buffer *ring, struct list_item *elem_list, + uint32_t is_src) { - struct comp_dev* cd = NULL; - struct sof_ipc_comp_host *host = NULL; - struct dma_trace_data *d = NULL; - struct dma_sg_elem elem; int i; - int err; uint32_t idx; uint32_t phy_addr; - - elem.size = HOST_PAGE_SIZE; - if (is_trace) - d = (struct dma_trace_data *)data; - else { - cd = (struct comp_dev *)data; - host = (struct sof_ipc_comp_host *)&cd->comp; - } + struct dma_sg_elem *e; /* the ring size may be not multiple of the page size, the last * page may be not full used. The used size should be in range @@ -189,7 +178,6 @@ static int parse_page_descriptors(struct intel_ipc_data *iipc, } for (i = 0; i < ring->pages; i++) { - idx = (((i << 2) + i)) >> 1; phy_addr = iipc->page_table[idx] | (iipc->page_table[idx + 1] << 8) | (iipc->page_table[idx + 2] << 16); @@ -200,23 +188,23 @@ static int parse_page_descriptors(struct intel_ipc_data *iipc, phy_addr <<= 12; phy_addr &= 0xfffff000; - if (!is_trace && host->direction == SOF_IPC_STREAM_PLAYBACK) - elem.src = phy_addr; + /* allocate new host DMA elem and add it to our list */ + e = rzalloc(RZONE_RUNTIME, RFLAGS_NONE, sizeof(*e)); + if (!e) + return -ENOMEM; + + if (is_src) + e->src = phy_addr; else - elem.dest = phy_addr; + e->dest = phy_addr; /* the last page may be not full used */ if (i == (ring->pages - 1)) - elem.size = ring->size - HOST_PAGE_SIZE * i; - - if (is_trace) - err = dma_trace_host_buffer(d, &elem, ring->size); + e->size = ring->size - HOST_PAGE_SIZE * i; else - err = comp_host_buffer(cd, &elem, ring->size); - if (err < 0) { - trace_ipc_error("ePb"); - return err; - } + e->size = HOST_PAGE_SIZE; + + list_item_append(&e->list, elem_list); } return 0; @@ -232,6 +220,12 @@ static int ipc_stream_pcm_params(uint32_t stream) { #ifdef CONFIG_HOST_PTABLE struct intel_ipc_data *iipc = ipc_get_drvdata(_ipc); + struct sof_ipc_comp_host *host = NULL; + uint32_t is_src; + struct list_item elem_list; + struct dma_sg_elem *elem; + struct list_item *plist; + uint32_t ring_size; #endif struct sof_ipc_pcm_params *pcm_params = _ipc->comp_data; struct sof_ipc_pcm_params_reply reply; @@ -269,12 +263,30 @@ static int ipc_stream_pcm_params(uint32_t stream) } /* Parse host tables */ + host = (struct sof_ipc_comp_host *)&cd->comp; + is_src = (host->direction == SOF_IPC_STREAM_PLAYBACK); + ring_size = pcm_params->params.buffer.size; + list_init(&elem_list); + err = parse_page_descriptors(iipc, &pcm_params->params.buffer, - pcm_dev->cd, 0); + &elem_list, is_src); if (err < 0) { trace_ipc_error("eAP"); goto error; } + + list_for_item(plist, &elem_list) { + elem = container_of(plist, struct dma_sg_elem, list); + + err = comp_host_buffer(cd, elem, ring_size); + if (err < 0) { + trace_ipc_error("ePb"); + goto error; + } + + list_item_del(&elem->list); + rfree(elem); + } #endif /* configure pipeline audio params */ @@ -302,6 +314,14 @@ static int ipc_stream_pcm_params(uint32_t stream) return 1; error: +#ifdef CONFIG_HOST_PTABLE + list_for_item(plist, &elem_list) { + elem = container_of(plist, struct dma_sg_elem, list); + list_item_del(&elem->list); + rfree(elem); + } +#endif + err = pipeline_reset(pcm_dev->cd->pipeline, pcm_dev->cd); if (err < 0) trace_ipc_error("eA!"); @@ -602,6 +622,10 @@ static int ipc_dma_trace_config(uint32_t header) #ifdef CONFIG_HOST_PTABLE struct intel_ipc_data *iipc = ipc_get_drvdata(_ipc); struct sof_ipc_dma_trace_params *params = _ipc->comp_data; + struct list_item elem_list; + struct dma_sg_elem *elem; + struct list_item *plist; + uint32_t ring_size; #endif struct sof_ipc_reply reply; int err; @@ -618,12 +642,28 @@ static int ipc_dma_trace_config(uint32_t header) trace_ipc("DAg"); /* Parse host tables */ + ring_size = params->buffer.size; + list_init(&elem_list); + err = parse_page_descriptors(iipc, &params->buffer, - _ipc->dmat, 1); + &elem_list, 0); if (err < 0) { trace_ipc_error("ePP"); goto error; } + + list_for_item(plist, &elem_list) { + elem = container_of(plist, struct dma_sg_elem, list); + + err = dma_trace_host_buffer(_ipc->dmat, elem, ring_size); + if (err < 0) { + trace_ipc_error("ePb"); + goto error; + } + + list_item_del(&elem->list); + rfree(elem); + } #endif trace_ipc("DAp"); @@ -639,6 +679,14 @@ static int ipc_dma_trace_config(uint32_t header) return 0; error: +#ifdef CONFIG_HOST_PTABLE + list_for_item(plist, &elem_list) { + elem = container_of(plist, struct dma_sg_elem, list); + list_item_del(&elem->list); + rfree(elem); + } +#endif + if (err < 0) trace_ipc_error("eA!"); return -EINVAL; -- 2.14.3

2 2

[Sound-open-firmware] [PATCH 1/2] apl: Add text size in module info
by Xiuli Pan 02 Mar '18

02 Mar '18

From: Pan Xiuli <xiuli.pan(a)linux.intel.com> Add total text size we used in memory mapping into module info to help rimage build the right FW binary. Signed-off-by: Pan Xiuli <xiuli.pan(a)linux.intel.com> --- Test with: Mininow max rt5651 GP-MRB nocodec SOF master: 1693b66bb1d804ded975767cc1e5911e6ff9c93c SOF-Tool master: a02abb799405d0e4ad0d6bb46eacf6fbe958c06e https://github.com/plbossart/sound/tree/topic/sof-v4.14: 9513a73b981bc1917705671ec54402a7e21672eb --- src/include/uapi/manifest.h | 1 + src/platform/apollolake/base_module.c | 1 + 2 files changed, 2 insertions(+) diff --git a/src/include/uapi/manifest.h b/src/include/uapi/manifest.h index ace9883..e83725b 100644 --- a/src/include/uapi/manifest.h +++ b/src/include/uapi/manifest.h @@ -102,6 +102,7 @@ struct sof_man_module { struct sof_man_module_type type; uint8_t hash[SOF_MAN_MOD_SHA256_LEN]; uint32_t entry_point; + uint32_t text_size; uint16_t cfg_offset; uint16_t cfg_count; uint32_t affinity_mask; diff --git a/src/platform/apollolake/base_module.c b/src/platform/apollolake/base_module.c index 2f4a6ee..56633c5 100644 --- a/src/platform/apollolake/base_module.c +++ b/src/platform/apollolake/base_module.c @@ -46,6 +46,7 @@ struct sof_man_module apl_manifest = { .domain_ll = 1, }, .affinity_mask = 3, + .text_size = REEF_TEXT_SIZE + L2_VECTOR_SIZE, }; /* not used, but stops linker complaining */ -- 2.7.4

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[Sound-open-firmware] [PATCH V3 1/3] platform: add sof_ipc_window for byt, hsw and bdw
by Xiuli Pan 02 Mar '18

02 Mar '18

From: Pan Xiuli <xiuli.pan(a)linux.intel.com> Add sof_ipc_window for all platforms, and add IPC send after boot compelted. Also remove the deprecated ready window. Signed-off-by: Pan Xiuli <xiuli.pan(a)linux.intel.com> --- Test with: Mininow max rt5651 GP-MRB nocodec SOF master: 1693b66bb1d804ded975767cc1e5911e6ff9c93c SOF-Tool master: a02abb799405d0e4ad0d6bb46eacf6fbe958c06e https://github.com/plbossart/sound/tree/topic/sof-v4.14: 9513a73b981bc1917705671ec54402a7e21672eb --- src/platform/baytrail/platform.c | 45 ++++++++++++++++++++++++++++++++++++---- src/platform/haswell/platform.c | 45 ++++++++++++++++++++++++++++++++++++---- 2 files changed, 82 insertions(+), 8 deletions(-) diff --git a/src/platform/baytrail/platform.c b/src/platform/baytrail/platform.c index 4709fcd..2c4bfee 100644 --- a/src/platform/baytrail/platform.c +++ b/src/platform/baytrail/platform.c @@ -59,10 +59,6 @@ static const struct sof_ipc_fw_ready ready = { .size = sizeof(struct sof_ipc_fw_ready), }, /* dspbox is for DSP initiated IPC, hostbox is for host initiated IPC */ - .dspbox_offset = MAILBOX_HOST_OFFSET + MAILBOX_DSPBOX_OFFSET, - .hostbox_offset = MAILBOX_HOST_OFFSET + MAILBOX_HOSTBOX_OFFSET, - .dspbox_size = MAILBOX_DSPBOX_SIZE, - .hostbox_size = MAILBOX_HOSTBOX_SIZE, .version = { .build = REEF_BUILD, .minor = REEF_MINOR, @@ -74,6 +70,45 @@ static const struct sof_ipc_fw_ready ready = { /* TODO: add capabilities */ }; +#define NUM_BYT_WINDOWS 4 +static const struct sof_ipc_window sram_window = { + .ext_hdr = { + .hdr.cmd = SOF_IPC_FW_READY, + .hdr.size = sizeof(struct sof_ipc_window) + + sizeof(struct sof_ipc_window_elem) * NUM_BYT_WINDOWS, + .type = SOF_IPC_EXT_WINDOW, + }, + .num_windows = NUM_BYT_WINDOWS, + .window[0] = { + .type = SOF_IPC_REGION_UPBOX, + .id = 0, /* map to host window 0 */ + .flags = 0, // TODO: set later + .size = MAILBOX_DSPBOX_SIZE, + .offset = MAILBOX_DSPBOX_OFFSET, + }, + .window[1] = { + .type = SOF_IPC_REGION_DOWNBOX, + .id = 0, /* map to host window 0 */ + .flags = 0, // TODO: set later + .size = MAILBOX_HOSTBOX_SIZE, + .offset = MAILBOX_HOSTBOX_OFFSET, + }, + .window[2] = { + .type = SOF_IPC_REGION_DEBUG, + .id = 0, /* map to host window 0 */ + .flags = 0, // TODO: set later + .size = MAILBOX_DEBUG_SIZE, + .offset = MAILBOX_DEBUG_OFFSET, + }, + .window[3] = { + .type = SOF_IPC_REGION_TRACE, + .id = 0, /* map to host window 0 */ + .flags = 0, // TODO: set later + .size = MAILBOX_TRACE_SIZE, + .offset = MAILBOX_TRACE_OFFSET, + }, +}; + static struct work_queue_timesource platform_generic_queue = { .timer = { .id = TIMER3, /* external timer */ @@ -93,6 +128,8 @@ int platform_boot_complete(uint32_t boot_message) uint64_t outbox = MAILBOX_HOST_OFFSET >> 3; mailbox_dspbox_write(0, &ready, sizeof(ready)); + mailbox_dspbox_write(sizeof(ready), &sram_window, + sram_window.ext_hdr.hdr.size); /* now interrupt host to tell it we are done booting */ shim_write(SHIM_IPCDL, SOF_IPC_FW_READY | outbox); diff --git a/src/platform/haswell/platform.c b/src/platform/haswell/platform.c index 5f56a05..97b38af 100644 --- a/src/platform/haswell/platform.c +++ b/src/platform/haswell/platform.c @@ -58,10 +58,6 @@ static const struct sof_ipc_fw_ready ready = { .size = sizeof(struct sof_ipc_fw_ready), }, /* dspbox is for DSP initiated IPC, hostbox is for host initiated IPC */ - .dspbox_offset = MAILBOX_HOST_OFFSET + MAILBOX_DSPBOX_OFFSET, - .hostbox_offset = MAILBOX_HOST_OFFSET + MAILBOX_HOSTBOX_OFFSET, - .dspbox_size = MAILBOX_DSPBOX_SIZE, - .hostbox_size = MAILBOX_HOSTBOX_SIZE, .version = { .build = REEF_BUILD, .minor = REEF_MINOR, @@ -73,6 +69,45 @@ static const struct sof_ipc_fw_ready ready = { /* TODO: add capabilities */ }; +#define NUM_HSW_WINDOWS 4 +static const struct sof_ipc_window sram_window = { + .ext_hdr = { + .hdr.cmd = SOF_IPC_FW_READY, + .hdr.size = sizeof(struct sof_ipc_window) + + sizeof(struct sof_ipc_window_elem) * NUM_HSW_WINDOWS, + .type = SOF_IPC_EXT_WINDOW, + }, + .num_windows = NUM_HSW_WINDOWS, + .window[0] = { + .type = SOF_IPC_REGION_UPBOX, + .id = 0, /* map to host window 0 */ + .flags = 0, // TODO: set later + .size = MAILBOX_DSPBOX_SIZE, + .offset = MAILBOX_DSPBOX_OFFSET, + }, + .window[1] = { + .type = SOF_IPC_REGION_DOWNBOX, + .id = 0, /* map to host window 0 */ + .flags = 0, // TODO: set later + .size = MAILBOX_HOSTBOX_SIZE, + .offset = MAILBOX_HOSTBOX_OFFSET, + }, + .window[2] = { + .type = SOF_IPC_REGION_DEBUG, + .id = 0, /* map to host window 0 */ + .flags = 0, // TODO: set later + .size = MAILBOX_DEBUG_SIZE, + .offset = MAILBOX_DEBUG_OFFSET, + }, + .window[3] = { + .type = SOF_IPC_REGION_TRACE, + .id = 0, /* map to host window 0 */ + .flags = 0, // TODO: set later + .size = MAILBOX_TRACE_SIZE, + .offset = MAILBOX_TRACE_OFFSET, + }, +}; + static struct work_queue_timesource platform_generic_queue = { .timer = { .id = TIMER2, /* external timer using SSP */ @@ -92,6 +127,8 @@ int platform_boot_complete(uint32_t boot_message) uint32_t outbox = MAILBOX_HOST_OFFSET >> 3; mailbox_dspbox_write(0, &ready, sizeof(ready)); + mailbox_dspbox_write(sizeof(ready), &sram_window, + sram_window.ext_hdr.hdr.size); /* now interrupt host to tell it we are done booting */ shim_write(SHIM_IPCD, outbox | SHIM_IPCD_BUSY); -- 2.7.4

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[Sound-open-firmware] [PATCH_V3] cnl: dma: fix playback failed at second time
by Rander Wang 02 Mar '18

02 Mar '18

Stop dma at the end of playback, or next time dma is not available for playback --- V3: fix typo in comments Signed-off-by: Rander Wang <rander.wang(a)intel.com> --- src/drivers/dw-dma.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/drivers/dw-dma.c b/src/drivers/dw-dma.c index be19e12..15d608c 100644 --- a/src/drivers/dw-dma.c +++ b/src/drivers/dw-dma.c @@ -1103,6 +1103,12 @@ static void dw_dma_irq_handler(void *data) p->chan[i].cb(p->chan[i].cb_data, DMA_IRQ_TYPE_BLOCK, &next); } + + if (next.size == DMA_RELOAD_END) { + trace_dma("LSo"); + /* disable channel, finished */ + dw_write(dma, DW_DMA_CHAN_EN, CHAN_DISABLE(i)); + } #endif /* end of a transfer */ if ((status_tfr & mask) && -- 2.14.1

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[Sound-open-firmware] [PATCH_V2] cnl: dma: fix playback failed at second time
by Rander Wang 02 Mar '18

02 Mar '18

Stop dma at the end of playback, or next time dma is not avialable for playback --- V2: fix typo in comments Signed-off-by: Rander Wang <rander.wang(a)intel.com> --- src/drivers/dw-dma.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/drivers/dw-dma.c b/src/drivers/dw-dma.c index be19e12..15d608c 100644 --- a/src/drivers/dw-dma.c +++ b/src/drivers/dw-dma.c @@ -1103,6 +1103,12 @@ static void dw_dma_irq_handler(void *data) p->chan[i].cb(p->chan[i].cb_data, DMA_IRQ_TYPE_BLOCK, &next); } + + if (next.size == DMA_RELOAD_END) { + trace_dma("LSo"); + /* disable channel, finished */ + dw_write(dma, DW_DMA_CHAN_EN, CHAN_DISABLE(i)); + } #endif /* end of a transfer */ if ((status_tfr & mask) && -- 2.14.1

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[Sound-open-firmware] [PATCH] cnl: dma: fix playback failed at second time
by Rander Wang 02 Mar '18

02 Mar '18

Stop dma when stream is end, or next time dma is not avilable to playback Signed-off-by: Rander Wang <rander.wang(a)intel.com> --- src/drivers/dw-dma.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/drivers/dw-dma.c b/src/drivers/dw-dma.c index be19e12..15d608c 100644 --- a/src/drivers/dw-dma.c +++ b/src/drivers/dw-dma.c @@ -1103,6 +1103,12 @@ static void dw_dma_irq_handler(void *data) p->chan[i].cb(p->chan[i].cb_data, DMA_IRQ_TYPE_BLOCK, &next); } + + if (next.size == DMA_RELOAD_END) { + trace_dma("LSo"); + /* disable channel, finished */ + dw_write(dma, DW_DMA_CHAN_EN, CHAN_DISABLE(i)); + } #endif /* end of a transfer */ if ((status_tfr & mask) && -- 2.14.1

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