On 4/25/2018 22:56, Pierre-Louis Bossart wrote:
On 4/25/18 1:50 AM, Xiuli Pan wrote:
From: Pan Xiuli xiuli.pan@linux.intel.com
Send the memory window offset with the panic IPC in case the panic happen before DSP ready when the memory window info is sent.
Signed-off-by: Pan Xiuli xiuli.pan@linux.intel.com
TODO: Need to find a register for HSW and BDW.
what do you mean with this TODO? You sent a set of kernel patches for HSW and BDW, what's missing on the firmware side then?
Yes, I was still looking for a register to handle these issues. On BYT there is 64 bit IPC message and on APL or CNL, there are two 32 bit registers. But one HSW and BDW, only one 32 bit register is used. There should be some other method or register to do the similar things.
Thanks Xiuli
Test with: Mininow max rt5651 and UP2 nocodec and CNL nocodec SOF master: 3ad69eb715a09de9a0b91c56c9cca8a79ead00a9 SOF-Tool master: b327539e98f1c84e3a131dd048460189a5de8c26 https://github.com/plbossart/sound/tree/topic/sof-v4.14: 735b995d7b66485c19e0aed51131532075cfce42
src/platform/apollolake/include/platform/platform.h | 1 + src/platform/baytrail/include/platform/platform.h | 3 ++- src/platform/cannonlake/include/platform/platform.h | 1 + 3 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/platform/apollolake/include/platform/platform.h b/src/platform/apollolake/include/platform/platform.h index 92f5b77..fb496f5 100644 --- a/src/platform/apollolake/include/platform/platform.h +++ b/src/platform/apollolake/include/platform/platform.h @@ -120,6 +120,7 @@ struct sof; #define platform_panic(__x) { \ mailbox_sw_reg_write(SRAM_REG_FW_STATUS, \ (0xdead000 | __x) & 0x3fffffff); \ + ipc_write(IPC_DIPCIE, MAILBOX_EXCEPTION_OFFSET + 2 * 0x20000); \ ipc_write(IPC_DIPCI, 0x80000000 | ((0xdead000 | __x) & 0x3fffffff)); \ } diff --git a/src/platform/baytrail/include/platform/platform.h b/src/platform/baytrail/include/platform/platform.h index 4d32d5e..6a7ebc9 100644 --- a/src/platform/baytrail/include/platform/platform.h +++ b/src/platform/baytrail/include/platform/platform.h @@ -27,6 +27,7 @@ * * Author: Liam Girdwood liam.r.girdwood@linux.intel.com * Keyon Jie yang.jie@linux.intel.com
- * Xiuli Pan xiuli.pan@linux.intel.com
*/ #ifndef __PLATFORM_PLATFORM_H__ @@ -103,7 +104,7 @@ struct sof; /* Platform defined panic code */ #define platform_panic(__x) { \ shim_write(SHIM_IPCDL, (0xdead000 | (__x & 0xfff))); \ - shim_write(SHIM_IPCDH, SHIM_IPCDH_BUSY); \ + shim_write(SHIM_IPCDH, (SHIM_IPCDH_BUSY | MAILBOX_EXCEPTION_OFFSET)); \ } /* Platform defined trace code */ diff --git a/src/platform/cannonlake/include/platform/platform.h b/src/platform/cannonlake/include/platform/platform.h index aff90a7..d7fa0dd 100644 --- a/src/platform/cannonlake/include/platform/platform.h +++ b/src/platform/cannonlake/include/platform/platform.h @@ -115,6 +115,7 @@ struct sof; #define platform_panic(__x) { \ mailbox_sw_reg_write(SRAM_REG_FW_STATUS, \ (0xdead000 | __x) & 0x3fffffff); \ + ipc_write(IPC_DIPCIDD, MAILBOX_EXCEPTION_OFFSET + 2 * 0x20000); \ ipc_write(IPC_DIPCIDR, 0x80000000 | ((0xdead000 | __x) & 0x3fffffff)); \ }