On Tue, 2016-12-20 at 15:46 +0800, Keyon Jie wrote:
switch the BCLK generated from shim ssp clock divider to SSCR0.SCR.
please note that we need clear SSPSP.SFRMP while using SSCR0.SCR, otherwise the L/R channel may swap, no document to describe that though.
Signed-off-by: Keyon Jie yang.jie@linux.intel.com
src/drivers/ssp.c | 4 +--- src/ipc/intel-ipc.c | 9 --------- 2 files changed, 1 insertion(+), 12 deletions(-)
diff --git a/src/drivers/ssp.c b/src/drivers/ssp.c index 77341b6..c0d6251 100644 --- a/src/drivers/ssp.c +++ b/src/drivers/ssp.c @@ -221,7 +221,6 @@ static inline int ssp_set_config(struct dai *dai, struct dai_config *dai_config) /* clock signal polarity */ switch (dai->config.format & DAI_FMT_INV_MASK) { case DAI_FMT_NB_NF:
break; case DAI_FMT_NB_IF: break;sspsp |= SSPSP_SFRMP;
@@ -253,8 +252,7 @@ static inline int ssp_set_config(struct dai *dai, struct dai_config *dai_config) return -ENODEV; }
- /* TODO: clock frequency */
- //scr = dai_config->mclk / (
sscr0 |= SSCR0_SCR(dai->config.mclk_fs / dai->config.bclk_fs - 1);
/* format */ switch (dai->config.format & DAI_FMT_FORMAT_MASK) {
diff --git a/src/ipc/intel-ipc.c b/src/ipc/intel-ipc.c index 33727a0..4d2acb2 100644 --- a/src/ipc/intel-ipc.c +++ b/src/ipc/intel-ipc.c @@ -530,7 +530,6 @@ static uint32_t ipc_device_set_formats(uint32_t header) { struct ipc_intel_ipc_device_config_req config_req; struct ipc_dai_dev *dai_dev;
int err;
trace_ipc("DsF");
@@ -570,14 +569,6 @@ static uint32_t ipc_device_set_formats(uint32_t header) dai_dev->dai_config.mclk_fs = 400; dai_dev->dai_config.clk_src = SSP_CLK_EXT;
- /* set SSP M/N dividers */
- err = platform_ssp_set_mn(config_req.ssp_interface, 48000,
dai_dev->dai_config.bclk_fs);
- if (err < 0) {
trace_ipc_error("eDs");
goto error;
- }
Can I drop 5/8 since M/N is no longer used ?
Liam
comp_dai_config(dai_dev->dev.cd, &dai_dev->dai_config);
error: