[Sound-open-firmware] [PATCH 0/8] SSP: baytrail 24 bits support
This series is created to change the SSP format setting for both Tx and Rx, and it is verified on MinnowMax + ALC5651 codec with I2S stereo both SSP_CLK_EXT and SSP_CLK_AUDIO mode. Changes including: 1. change ssp clock from 25M to 19.2M; 2. add 16bit <==> 24bit volume converting functions; 3. switch to use I2S mode(more common on host side); 4. change ssp stream format to 24 bits; 5. remove the usage of shim SSP divider and use SSCR0.SCR for BCLK generating.
Keyon Jie (8): platform: ssp divider: read the ssp clock directly platform: switch default ssp clock to 19.2M volume: add 16bit<==>24bit volume copy function and mapping ssp: switch dai format form PCM B mode to normal I2S mode platform: add divider m/n setting for 50 bclk_fs dai: add stream_format to dai_data for codec stream ssp: change stream format to S24_4LE ssp: switch to use SCR for BCLK
src/audio/dai.c | 9 +++++ src/audio/volume.c | 43 +++++++++++++++++++++++ src/drivers/ssp.c | 4 +-- src/ipc/intel-ipc.c | 19 +++------- src/platform/baytrail/include/platform/platform.h | 8 +++-- src/platform/baytrail/platform.c | 10 ++---- 6 files changed, 66 insertions(+), 27 deletions(-)
We don't need pass the ssp clock param(source), this patch removes it, replaces it with read back from the ssp clock directly.
Signed-off-by: Keyon Jie yang.jie@linux.intel.com --- src/ipc/intel-ipc.c | 5 ++--- src/platform/baytrail/include/platform/platform.h | 3 +-- src/platform/baytrail/platform.c | 4 ++-- 3 files changed, 5 insertions(+), 7 deletions(-)
diff --git a/src/ipc/intel-ipc.c b/src/ipc/intel-ipc.c index 7aa24f3..16a906b 100644 --- a/src/ipc/intel-ipc.c +++ b/src/ipc/intel-ipc.c @@ -570,9 +570,8 @@ static uint32_t ipc_device_set_formats(uint32_t header) dai_dev->dai_config.clk_src = SSP_CLK_EXT;
/* set SSP M/N dividers */ - err = platform_ssp_set_mn(config_req.ssp_interface, - 25000000, 48000, - dai_dev->dai_config.bclk_fs); + err = platform_ssp_set_mn(config_req.ssp_interface, 48000, + dai_dev->dai_config.bclk_fs); if (err < 0) { trace_ipc_error("eDs"); goto error; diff --git a/src/platform/baytrail/include/platform/platform.h b/src/platform/baytrail/include/platform/platform.h index 38fcc26..9b1039b 100644 --- a/src/platform/baytrail/include/platform/platform.h +++ b/src/platform/baytrail/include/platform/platform.h @@ -88,8 +88,7 @@ int platform_boot_complete(uint32_t boot_message);
int platform_init(void);
-int platform_ssp_set_mn(uint32_t ssp_port, uint32_t source, uint32_t rate, - uint32_t bclk_fs); +int platform_ssp_set_mn(uint32_t ssp_port, uint32_t rate, uint32_t bclk_fs);
void platform_ssp_disable_mn(uint32_t ssp_port);
diff --git a/src/platform/baytrail/platform.c b/src/platform/baytrail/platform.c index ea3828f..2276981 100644 --- a/src/platform/baytrail/platform.c +++ b/src/platform/baytrail/platform.c @@ -111,10 +111,10 @@ static const struct ssp_mn ssp_mn_conf[] = { };
/* set the SSP M/N clock dividers */ -int platform_ssp_set_mn(uint32_t ssp_port, uint32_t source, uint32_t rate, - uint32_t bclk_fs) +int platform_ssp_set_mn(uint32_t ssp_port, uint32_t rate, uint32_t bclk_fs) { int i; + uint32_t source = clock_get_freq(CLK_SSP);
/* check for matching config in the table */ for (i = 0; i < ARRAY_SIZE(ssp_mn_conf); i++) {
switch default ssp clock from 25M to 19.2M, which may help for 24 bit format.
Signed-off-by: Keyon Jie yang.jie@linux.intel.com --- src/platform/baytrail/platform.c | 5 ----- 1 file changed, 5 deletions(-)
diff --git a/src/platform/baytrail/platform.c b/src/platform/baytrail/platform.c index 2276981..d21845f 100644 --- a/src/platform/baytrail/platform.c +++ b/src/platform/baytrail/platform.c @@ -295,13 +295,8 @@ int platform_init(void)
trace_point(TRACE_BOOT_PLATFORM_SSP_FREQ);
-#if defined CONFIG_BAYTRAIL - /* set SSP clock to 25M TODO: make BYT use 19.2M as default */ - clock_set_freq(CLK_SSP, 25000000); -#elif defined CONFIG_CHERRYTRAIL /* set SSP clock to 19.2M */ clock_set_freq(CLK_SSP, 19200000); -#endif
/* initialise the host IPC mechanisms */ trace_point(TRACE_BOOT_PLATFORM_IPC);
add 16bit<==>24bit volume copy function and mapping, for 24 bits ssp output/input.
Signed-off-by: Keyon Jie yang.jie@linux.intel.com --- src/audio/volume.c | 43 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+)
diff --git a/src/audio/volume.c b/src/audio/volume.c index f5528cd..5299edd 100644 --- a/src/audio/volume.c +++ b/src/audio/volume.c @@ -172,12 +172,55 @@ static void vol_s16_to_s16(struct comp_dev *dev, struct comp_buffer *sink, sink->w_ptr = dest; }
+/* copy and scale volume from 16 bit source buffer to 24 bit on 32 bit boundary dest buffer */ +static void vol_s16_to_s24(struct comp_dev *dev, struct comp_buffer *sink, + struct comp_buffer *source, uint32_t frames) +{ + struct comp_data *cd = comp_get_drvdata(dev); + int16_t *src = (int16_t*) source->r_ptr; + int32_t val, i, *dest = (int32_t*) sink->w_ptr; + + /* buffer sizes are always divisible by period frames */ + for (i = 0; i < frames * source->params.channels; i++) { + val = (int32_t)*src; + *dest = (val * cd->volume[i % source->params.channels]) >> 8; + dest++; + src++; + } + + source->r_ptr = src; + sink->w_ptr = dest; +} + +/* copy and scale volume from 16 bit source buffer to 24 bit on 32 bit boundary dest buffer */ +static void vol_s24_to_s16(struct comp_dev *dev, struct comp_buffer *sink, + struct comp_buffer *source, uint32_t frames) +{ + struct comp_data *cd = comp_get_drvdata(dev); + int32_t val, i, *src = (int32_t*) source->r_ptr; + int16_t *dest = (int16_t*) sink->w_ptr; + + /* buffer sizes are always divisible by period frames */ + for (i = 0; i < frames * source->params.channels; i++) { + val = (int32_t)*src; + *dest = (int16_t)(((val >> 8) * + cd->volume[i % source->params.channels]) >> 16); + dest++; + src++; + } + + source->r_ptr = src; + sink->w_ptr = dest; +} + /* map of source and sink buffer formats to volume function */ static const struct comp_func_map func_map[] = { {STREAM_FORMAT_S16_LE, STREAM_FORMAT_S16_LE, vol_s16_to_s16}, {STREAM_FORMAT_S16_LE, STREAM_FORMAT_S32_LE, vol_s16_to_s32}, {STREAM_FORMAT_S32_LE, STREAM_FORMAT_S16_LE, vol_s32_to_s16}, {STREAM_FORMAT_S32_LE, STREAM_FORMAT_S32_LE, vol_s32_to_s32}, + {STREAM_FORMAT_S16_LE, STREAM_FORMAT_S24_4LE, vol_s16_to_s24}, + {STREAM_FORMAT_S24_4LE, STREAM_FORMAT_S16_LE, vol_s24_to_s16}, };
static void vol_update(struct comp_data *cd, uint32_t chan)
On Tue, 2016-12-20 at 15:46 +0800, Keyon Jie wrote:
add 16bit<==>24bit volume copy function and mapping, for 24 bits ssp output/input.
Signed-off-by: Keyon Jie yang.jie@linux.intel.com
src/audio/volume.c | 43 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+)
diff --git a/src/audio/volume.c b/src/audio/volume.c index f5528cd..5299edd 100644 --- a/src/audio/volume.c +++ b/src/audio/volume.c @@ -172,12 +172,55 @@ static void vol_s16_to_s16(struct comp_dev *dev, struct comp_buffer *sink, sink->w_ptr = dest; }
+/* copy and scale volume from 16 bit source buffer to 24 bit on 32 bit boundary dest buffer */ +static void vol_s16_to_s24(struct comp_dev *dev, struct comp_buffer *sink,
- struct comp_buffer *source, uint32_t frames)
+{
- struct comp_data *cd = comp_get_drvdata(dev);
- int16_t *src = (int16_t*) source->r_ptr;
- int32_t val, i, *dest = (int32_t*) sink->w_ptr;
- /* buffer sizes are always divisible by period frames */
- for (i = 0; i < frames * source->params.channels; i++) {
val = (int32_t)*src;*dest = (val * cd->volume[i % source->params.channels]) >> 8;
We must not use % or / in pipeline copy code since they are very expensive in terms of cycles.
What we should do here is have a version of each function, for 2 chan, 4, chan, etc (select at params time).
e.g. 2 channel volume
/* buffer sizes are always divisible by period frames */ for (i = 0; i < frames * 2; i += 2) { val[0] = (int32_t)src[i]; val[1] = (int32_t)src[i + 1];
dest[i] = (int16_t)(((val[0] >> 8) * cd->volume[0]) >> 16); dest[i + 1] = (int16_t)(((val[1] >> 8) * cd->volume[1]) >> 16); }
The above code does the same, but doesnt use % and is vectorisable by gcc (and also easier to add intrinsics).
Our goal is to keep the copy() functions as optimal as possible (even at the expense of adding a little more code for copy functions using a different number of channels).
Liam
dest++;src++;- }
- source->r_ptr = src;
- sink->w_ptr = dest;
+}
+/* copy and scale volume from 16 bit source buffer to 24 bit on 32 bit boundary dest buffer */ +static void vol_s24_to_s16(struct comp_dev *dev, struct comp_buffer *sink,
- struct comp_buffer *source, uint32_t frames)
+{
- struct comp_data *cd = comp_get_drvdata(dev);
- int32_t val, i, *src = (int32_t*) source->r_ptr;
- int16_t *dest = (int16_t*) sink->w_ptr;
- /* buffer sizes are always divisible by period frames */
- for (i = 0; i < frames * source->params.channels; i++) {
val = (int32_t)*src;*dest = (int16_t)(((val >> 8) *cd->volume[i % source->params.channels]) >> 16);dest++;src++;- }
- source->r_ptr = src;
- sink->w_ptr = dest;
+}
/* map of source and sink buffer formats to volume function */ static const struct comp_func_map func_map[] = { {STREAM_FORMAT_S16_LE, STREAM_FORMAT_S16_LE, vol_s16_to_s16}, {STREAM_FORMAT_S16_LE, STREAM_FORMAT_S32_LE, vol_s16_to_s32}, {STREAM_FORMAT_S32_LE, STREAM_FORMAT_S16_LE, vol_s32_to_s16}, {STREAM_FORMAT_S32_LE, STREAM_FORMAT_S32_LE, vol_s32_to_s32},
- {STREAM_FORMAT_S16_LE, STREAM_FORMAT_S24_4LE, vol_s16_to_s24},
- {STREAM_FORMAT_S24_4LE, STREAM_FORMAT_S16_LE, vol_s24_to_s16},
};
static void vol_update(struct comp_data *cd, uint32_t chan)
-----Original Message----- From: Liam Girdwood [mailto:liam.r.girdwood@linux.intel.com] Sent: Tuesday, December 20, 2016 6:31 PM To: Keyon Jie yang.jie@linux.intel.com Cc: sound-open-firmware@alsa-project.org; Zhang, Keqiao keqiao.zhang@intel.com; Jie, Yang yang.jie@intel.com; Ingalsuo, Seppo seppo.ingalsuo@intel.com; Lin, Mengdong mengdong.lin@intel.com Subject: Re: [Sound-open-firmware] [PATCH 3/8] volume: add 16bit<==>24bit volume copy function and mapping
On Tue, 2016-12-20 at 15:46 +0800, Keyon Jie wrote:
add 16bit<==>24bit volume copy function and mapping, for 24 bits ssp output/input.
Signed-off-by: Keyon Jie yang.jie@linux.intel.com
src/audio/volume.c | 43 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+)
diff --git a/src/audio/volume.c b/src/audio/volume.c index f5528cd..5299edd 100644 --- a/src/audio/volume.c +++ b/src/audio/volume.c @@ -172,12 +172,55 @@ static void vol_s16_to_s16(struct comp_dev *dev,
struct comp_buffer *sink,
sink->w_ptr = dest; }
+/* copy and scale volume from 16 bit source buffer to 24 bit on 32 +bit boundary dest buffer */ static void vol_s16_to_s24(struct comp_dev *dev,
struct comp_buffer *sink,
- struct comp_buffer *source, uint32_t frames) {
- struct comp_data *cd = comp_get_drvdata(dev);
- int16_t *src = (int16_t*) source->r_ptr;
- int32_t val, i, *dest = (int32_t*) sink->w_ptr;
- /* buffer sizes are always divisible by period frames */
- for (i = 0; i < frames * source->params.channels; i++) {
val = (int32_t)*src;*dest = (val * cd->volume[i % source->params.channels]) >> 8;We must not use % or / in pipeline copy code since they are very expensive in terms of cycles.
OK, it do add numbers of instruction lines with this, thanks for pointing out, will change in next version.
Thanks, ~Keyon
What we should do here is have a version of each function, for 2 chan, 4, chan, etc (select at params time).
e.g. 2 channel volume
/* buffer sizes are always divisible by period frames */ for (i = 0; i < frames * 2; i += 2) { val[0] = (int32_t)src[i]; val[1] = (int32_t)src[i + 1];
dest[i] = (int16_t)(((val[0] >> 8) * cd->volume[0]) >> 16); dest[i + 1] = (int16_t)(((val[1] >> 8) * cd->volume[1]) >> 16);}
The above code does the same, but doesnt use % and is vectorisable by gcc (and also easier to add intrinsics).
Our goal is to keep the copy() functions as optimal as possible (even at the expense of adding a little more code for copy functions using a different number of channels).
Liam
dest++;src++;- }
- source->r_ptr = src;
- sink->w_ptr = dest;
+}
+/* copy and scale volume from 16 bit source buffer to 24 bit on 32 +bit boundary dest buffer */ static void vol_s24_to_s16(struct comp_dev *dev,
struct comp_buffer *sink,
- struct comp_buffer *source, uint32_t frames) {
- struct comp_data *cd = comp_get_drvdata(dev);
- int32_t val, i, *src = (int32_t*) source->r_ptr;
- int16_t *dest = (int16_t*) sink->w_ptr;
- /* buffer sizes are always divisible by period frames */
- for (i = 0; i < frames * source->params.channels; i++) {
val = (int32_t)*src;*dest = (int16_t)(((val >> 8) *cd->volume[i % source->params.channels]) >> 16);dest++;src++;- }
- source->r_ptr = src;
- sink->w_ptr = dest;
+}
/* map of source and sink buffer formats to volume function */ static const struct comp_func_map func_map[] = { {STREAM_FORMAT_S16_LE, STREAM_FORMAT_S16_LE,
vol_s16_to_s16},
{STREAM_FORMAT_S16_LE, STREAM_FORMAT_S32_LE,
vol_s16_to_s32},
{STREAM_FORMAT_S32_LE, STREAM_FORMAT_S16_LE,
vol_s32_to_s16},
{STREAM_FORMAT_S32_LE, STREAM_FORMAT_S32_LE,
vol_s32_to_s32},
- {STREAM_FORMAT_S16_LE, STREAM_FORMAT_S24_4LE,
vol_s16_to_s24},
- {STREAM_FORMAT_S24_4LE, STREAM_FORMAT_S16_LE,
vol_s24_to_s16},
};
static void vol_update(struct comp_data *cd, uint32_t chan)
it is configured from host/codec side that using I2S mode, so switch it. --- src/ipc/intel-ipc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/ipc/intel-ipc.c b/src/ipc/intel-ipc.c index 16a906b..b159980 100644 --- a/src/ipc/intel-ipc.c +++ b/src/ipc/intel-ipc.c @@ -562,7 +562,7 @@ static uint32_t ipc_device_set_formats(uint32_t header)
/* setup the DAI HW config - TODO hard coded due to IPC limitations */ dai_dev->dai_config.mclk = config_req.clock_frequency; - dai_dev->dai_config.format = DAI_FMT_DSP_B | DAI_FMT_CONT | + dai_dev->dai_config.format = DAI_FMT_I2S | DAI_FMT_CONT | DAI_FMT_NB_NF | DAI_FMT_CBS_CFS; dai_dev->dai_config.frame_size = 32; /* TODO 16bit stereo hard coded */ dai_dev->dai_config.bclk_fs = 32; /* 32 BCLKs per frame - */
On 12/20/16 1:46 AM, Keyon Jie wrote:
it is configured from host/codec side that using I2S mode, so switch it.
src/ipc/intel-ipc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/ipc/intel-ipc.c b/src/ipc/intel-ipc.c index 16a906b..b159980 100644 --- a/src/ipc/intel-ipc.c +++ b/src/ipc/intel-ipc.c @@ -562,7 +562,7 @@ static uint32_t ipc_device_set_formats(uint32_t header)
/* setup the DAI HW config - TODO hard coded due to IPC limitations */ dai_dev->dai_config.mclk = config_req.clock_frequency;
- dai_dev->dai_config.format = DAI_FMT_DSP_B | DAI_FMT_CONT |
- dai_dev->dai_config.format = DAI_FMT_I2S | DAI_FMT_CONT | DAI_FMT_NB_NF | DAI_FMT_CBS_CFS; dai_dev->dai_config.frame_size = 32; /* TODO 16bit stereo hard coded */ dai_dev->dai_config.bclk_fs = 32; /* 32 BCLKs per frame - */
Why are we doing this? If we want to be compatible with existing machine drivers you will want to support DSP_B with 4 slots, so this needs to be programmable.
-----Original Message----- From: Pierre-Louis Bossart [mailto:pierre-louis.bossart@linux.intel.com] Sent: Tuesday, December 20, 2016 10:31 PM To: Keyon Jie yang.jie@linux.intel.com; sound-open-firmware@alsa- project.org; liam.r.girdwood@linux.intel.com Cc: Zhang, Keqiao keqiao.zhang@intel.com; Jie, Yang yang.jie@intel.com; Ingalsuo, Seppo seppo.ingalsuo@intel.com; Lin, Mengdong mengdong.lin@intel.com Subject: Re: [Sound-open-firmware] [PATCH 4/8] ssp: switch dai format form PCM B mode to normal I2S mode
On 12/20/16 1:46 AM, Keyon Jie wrote:
it is configured from host/codec side that using I2S mode, so switch it.
src/ipc/intel-ipc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/ipc/intel-ipc.c b/src/ipc/intel-ipc.c index 16a906b..b159980 100644 --- a/src/ipc/intel-ipc.c +++ b/src/ipc/intel-ipc.c @@ -562,7 +562,7 @@ static uint32_t ipc_device_set_formats(uint32_t header)
/* setup the DAI HW config - TODO hard coded due to IPC limitations */ dai_dev->dai_config.mclk = config_req.clock_frequency;
- dai_dev->dai_config.format = DAI_FMT_DSP_B | DAI_FMT_CONT |
- dai_dev->dai_config.format = DAI_FMT_I2S | DAI_FMT_CONT | DAI_FMT_NB_NF | DAI_FMT_CBS_CFS; dai_dev->dai_config.frame_size = 32; /* TODO 16bit stereo hard
coded */
dai_dev->dai_config.bclk_fs = 32; /* 32 BCLKs per frame - */
Why are we doing this? If we want to be compatible with existing machine drivers you will want to support DSP_B with 4 slots, so this needs to be programmable.
Hi Pierre, You can see that the latest bytcr_rt5640.c is using I2S mode: ... .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS, ... https://git.kernel.org/cgit/linux/kernel/git/broonie/sound.git/tree/sound/so...
we will add IPC to support this programmable next step.
Thanks, ~Keyon
On 12/20/16 8:56 AM, Jie, Yang wrote:
-----Original Message----- From: Pierre-Louis Bossart [mailto:pierre-louis.bossart@linux.intel.com] Sent: Tuesday, December 20, 2016 10:31 PM To: Keyon Jie yang.jie@linux.intel.com; sound-open-firmware@alsa- project.org; liam.r.girdwood@linux.intel.com Cc: Zhang, Keqiao keqiao.zhang@intel.com; Jie, Yang yang.jie@intel.com; Ingalsuo, Seppo seppo.ingalsuo@intel.com; Lin, Mengdong mengdong.lin@intel.com Subject: Re: [Sound-open-firmware] [PATCH 4/8] ssp: switch dai format form PCM B mode to normal I2S mode
On 12/20/16 1:46 AM, Keyon Jie wrote:
it is configured from host/codec side that using I2S mode, so switch it.
src/ipc/intel-ipc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/ipc/intel-ipc.c b/src/ipc/intel-ipc.c index 16a906b..b159980 100644 --- a/src/ipc/intel-ipc.c +++ b/src/ipc/intel-ipc.c @@ -562,7 +562,7 @@ static uint32_t ipc_device_set_formats(uint32_t header)
/* setup the DAI HW config - TODO hard coded due to IPC limitations */ dai_dev->dai_config.mclk = config_req.clock_frequency;
- dai_dev->dai_config.format = DAI_FMT_DSP_B | DAI_FMT_CONT |
- dai_dev->dai_config.format = DAI_FMT_I2S | DAI_FMT_CONT | DAI_FMT_NB_NF | DAI_FMT_CBS_CFS; dai_dev->dai_config.frame_size = 32; /* TODO 16bit stereo hard
coded */
dai_dev->dai_config.bclk_fs = 32; /* 32 BCLKs per frame - */
Why are we doing this? If we want to be compatible with existing machine drivers you will want to support DSP_B with 4 slots, so this needs to be programmable.
Hi Pierre, You can see that the latest bytcr_rt5640.c is using I2S mode: ... .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS, ... https://git.kernel.org/cgit/linux/kernel/git/broonie/sound.git/tree/sound/so...
we will add IPC to support this programmable next step.
Look at the machine drivers for rt5645, 70, they use 4 slots.
-----Original Message----- From: Pierre-Louis Bossart [mailto:pierre-louis.bossart@linux.intel.com] Sent: Tuesday, December 20, 2016 11:04 PM To: Jie, Yang yang.jie@intel.com; Keyon Jie yang.jie@linux.intel.com; sound-open-firmware@alsa-project.org; liam.r.girdwood@linux.intel.com Cc: Zhang, Keqiao keqiao.zhang@intel.com; Ingalsuo, Seppo seppo.ingalsuo@intel.com; Lin, Mengdong mengdong.lin@intel.com Subject: Re: [Sound-open-firmware] [PATCH 4/8] ssp: switch dai format form PCM B mode to normal I2S mode
On 12/20/16 8:56 AM, Jie, Yang wrote:
-----Original Message----- From: Pierre-Louis Bossart [mailto:pierre-louis.bossart@linux.intel.com] Sent: Tuesday, December 20, 2016 10:31 PM To: Keyon Jie yang.jie@linux.intel.com; sound-open-firmware@alsa- project.org; liam.r.girdwood@linux.intel.com Cc: Zhang, Keqiao keqiao.zhang@intel.com; Jie, Yang yang.jie@intel.com; Ingalsuo, Seppo seppo.ingalsuo@intel.com; Lin, Mengdong mengdong.lin@intel.com Subject: Re: [Sound-open-firmware] [PATCH 4/8] ssp: switch dai format form PCM B mode to normal I2S mode
On 12/20/16 1:46 AM, Keyon Jie wrote:
it is configured from host/codec side that using I2S mode, so switch it.
src/ipc/intel-ipc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/ipc/intel-ipc.c b/src/ipc/intel-ipc.c index 16a906b..b159980 100644 --- a/src/ipc/intel-ipc.c +++ b/src/ipc/intel-ipc.c @@ -562,7 +562,7 @@ static uint32_t ipc_device_set_formats(uint32_t header)
/* setup the DAI HW config - TODO hard coded due to IPC limitations */ dai_dev->dai_config.mclk = config_req.clock_frequency;
- dai_dev->dai_config.format = DAI_FMT_DSP_B | DAI_FMT_CONT |
- dai_dev->dai_config.format = DAI_FMT_I2S | DAI_FMT_CONT | DAI_FMT_NB_NF | DAI_FMT_CBS_CFS; dai_dev->dai_config.frame_size = 32; /* TODO 16bit stereo hard
coded */
dai_dev->dai_config.bclk_fs = 32; /* 32 BCLKs per frame - */
Why are we doing this? If we want to be compatible with existing machine drivers you will want to support DSP_B with 4 slots, so this needs to be programmable.
Hi Pierre, You can see that the latest bytcr_rt5640.c is using I2S mode: ... .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS, ... https://git.kernel.org/cgit/linux/kernel/git/broonie/sound.git/tree/so und/soc/intel/boards/bytcr_rt5640.c?h=for-next
we will add IPC to support this programmable next step.
Look at the machine drivers for rt5645, 70, they use 4 slots.
Aha, they do, let me try make it configurable in next version, thank you for pointing out that Pierre.
Thanks, ~Keyon
for 24 bits ssp setting, we need set bclk_fs to 50, here add the divider m/n setting for this case.
Signed-off-by: Keyon Jie yang.jie@linux.intel.com --- src/platform/baytrail/platform.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/src/platform/baytrail/platform.c b/src/platform/baytrail/platform.c index d21845f..ee6cdd9 100644 --- a/src/platform/baytrail/platform.c +++ b/src/platform/baytrail/platform.c @@ -106,6 +106,7 @@ static const struct ssp_mn ssp_mn_conf[] = { {25000000, 400, 44100, 441, 625}, /* 17.64MHz */ {19200000, 24, 48000, 3, 50}, /* 1.152MHz */ {19200000, 32, 48000, 2, 25}, /* 1.536MHz */ + {19200000, 50, 48000, 1, 8}, /* 2.4MHz */ {19200000, 64, 48000, 4, 25}, /* 3.072MHz */ {19200000, 400, 44100, 441, 480}, /* 17.64MHz */ };
On 12/20/16 1:46 AM, Keyon Jie wrote:
for 24 bits ssp setting, we need set bclk_fs to 50, here add the divider m/n setting for this case.
but we should not be using those dividers?
Signed-off-by: Keyon Jie yang.jie@linux.intel.com
src/platform/baytrail/platform.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/src/platform/baytrail/platform.c b/src/platform/baytrail/platform.c index d21845f..ee6cdd9 100644 --- a/src/platform/baytrail/platform.c +++ b/src/platform/baytrail/platform.c @@ -106,6 +106,7 @@ static const struct ssp_mn ssp_mn_conf[] = { {25000000, 400, 44100, 441, 625}, /* 17.64MHz */ {19200000, 24, 48000, 3, 50}, /* 1.152MHz */ {19200000, 32, 48000, 2, 25}, /* 1.536MHz */
- {19200000, 50, 48000, 1, 8}, /* 2.4MHz */ {19200000, 64, 48000, 4, 25}, /* 3.072MHz */ {19200000, 400, 44100, 441, 480}, /* 17.64MHz */
};
-----Original Message----- From: Pierre-Louis Bossart [mailto:pierre-louis.bossart@linux.intel.com] Sent: Tuesday, December 20, 2016 10:32 PM To: Keyon Jie yang.jie@linux.intel.com; sound-open-firmware@alsa- project.org; liam.r.girdwood@linux.intel.com Cc: Zhang, Keqiao keqiao.zhang@intel.com; Jie, Yang yang.jie@intel.com; Ingalsuo, Seppo seppo.ingalsuo@intel.com; Lin, Mengdong mengdong.lin@intel.com Subject: Re: [Sound-open-firmware] [PATCH 5/8] platform: add divider m/n setting for 50 bclk_fs
On 12/20/16 1:46 AM, Keyon Jie wrote:
for 24 bits ssp setting, we need set bclk_fs to 50, here add the divider m/n setting for this case.
but we should not be using those dividers?
Yes, actually we won't use this(as patch 8/8), Liam also mentioned this, my intention here was complete these dividers for 50 bclk_fs. We can remove it(and all those dividers related code in this platform.c) if we will never use them anymore.
Thanks, ~Keyon
Signed-off-by: Keyon Jie yang.jie@linux.intel.com
src/platform/baytrail/platform.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/src/platform/baytrail/platform.c b/src/platform/baytrail/platform.c index d21845f..ee6cdd9 100644 --- a/src/platform/baytrail/platform.c +++ b/src/platform/baytrail/platform.c @@ -106,6 +106,7 @@ static const struct ssp_mn ssp_mn_conf[] = { {25000000, 400, 44100, 441, 625}, /* 17.64MHz */ {19200000, 24, 48000, 3, 50}, /* 1.152MHz */ {19200000, 32, 48000, 2, 25}, /* 1.536MHz */
- {19200000, 50, 48000, 1, 8}, /* 2.4MHz */ {19200000, 64, 48000, 4, 25}, /* 3.072MHz */ {19200000, 400, 44100, 441, 480}, /* 17.64MHz */
};
add stream_format to indicate the stream format that the dai buffer is using.
Signed-off-by: Keyon Jie yang.jie@linux.intel.com --- src/audio/dai.c | 9 +++++++++ src/platform/baytrail/include/platform/platform.h | 3 +++ 2 files changed, 12 insertions(+)
diff --git a/src/audio/dai.c b/src/audio/dai.c index afa1be1..51ff093 100644 --- a/src/audio/dai.c +++ b/src/audio/dai.c @@ -59,6 +59,7 @@ struct dai_data { struct dma_sg_config config;
int direction; + uint32_t stream_format; struct dai *ssp; struct dma *dma;
@@ -162,6 +163,8 @@ static struct comp_dev *dai_new_ssp(uint32_t type, uint32_t index, if (dd->chan < 0) goto error;
+ dd->stream_format = PLATFORM_SSP_STREAM_FORMAT; + /* set up callback */ //if (dd->ssp->plat_data.flags & DAI_FLAGS_IRQ_CB) dma_set_cb(dd->dma, dd->chan, DMA_IRQ_TYPE_LLIST, dai_dma_cb, dev); @@ -217,6 +220,9 @@ static int dai_playback_params(struct comp_dev *dev, dma_period_desc = &dma_buffer->desc.sink_period; dma_buffer->params = *params;
+ /* set it to dai stream format, for volume func correct mapping */ + dma_buffer->params.pcm.format = dd->stream_format; + if (list_is_empty(&config->elem_list)) { /* set up cyclic list of DMA elems */ for (i = 0; i < dma_period_desc->number; i++) { @@ -275,6 +281,9 @@ static int dai_capture_params(struct comp_dev *dev, dma_period_desc = &dma_buffer->desc.source_period; dma_buffer->params = *params;
+ /* set it to dai stream format, for volume func correct mapping */ + dma_buffer->params.pcm.format = dd->stream_format; + if (list_is_empty(&config->elem_list)) { /* set up cyclic list of DMA elems */ for (i = 0; i < dma_period_desc->number; i++) { diff --git a/src/platform/baytrail/include/platform/platform.h b/src/platform/baytrail/include/platform/platform.h index 9b1039b..b0000b4 100644 --- a/src/platform/baytrail/include/platform/platform.h +++ b/src/platform/baytrail/include/platform/platform.h @@ -38,6 +38,9 @@ /* default static pipeline SSP port - not used for dynamic pipes */ #define PLATFORM_SSP_PORT 2
+/* default SSP stream format - need aligned with codec setting*/ +#define PLATFORM_SSP_STREAM_FORMAT STREAM_FORMAT_S16_LE + /* IPC Interrupt */ #define PLATFORM_IPC_INTERUPT IRQ_NUM_EXT_IA
1. stream format changed to S24_LE; 2. ssp device period size changed to 512 Byte; 3. dai config frame size(24b), bclks_fs(50), mclks_fs(400);
it is verified work fine on minnow max + rt5651, for both SSP_CLK_EXT and SSP_CLK_AUDIO clock mode.
Signed-off-by: Keyon Jie yang.jie@linux.intel.com --- src/ipc/intel-ipc.c | 7 ++++--- src/platform/baytrail/include/platform/platform.h | 4 ++-- 2 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/src/ipc/intel-ipc.c b/src/ipc/intel-ipc.c index b159980..33727a0 100644 --- a/src/ipc/intel-ipc.c +++ b/src/ipc/intel-ipc.c @@ -564,9 +564,10 @@ static uint32_t ipc_device_set_formats(uint32_t header) dai_dev->dai_config.mclk = config_req.clock_frequency; dai_dev->dai_config.format = DAI_FMT_I2S | DAI_FMT_CONT | DAI_FMT_NB_NF | DAI_FMT_CBS_CFS; - dai_dev->dai_config.frame_size = 32; /* TODO 16bit stereo hard coded */ - dai_dev->dai_config.bclk_fs = 32; /* 32 BCLKs per frame - */ - dai_dev->dai_config.mclk_fs = 256; + /* TODO: convert from dai stream_format */ + dai_dev->dai_config.frame_size = 24; + dai_dev->dai_config.bclk_fs = 50; /* 50 BCLKs per frame - */ + dai_dev->dai_config.mclk_fs = 400; dai_dev->dai_config.clk_src = SSP_CLK_EXT;
/* set SSP M/N dividers */ diff --git a/src/platform/baytrail/include/platform/platform.h b/src/platform/baytrail/include/platform/platform.h index b0000b4..3f7be88 100644 --- a/src/platform/baytrail/include/platform/platform.h +++ b/src/platform/baytrail/include/platform/platform.h @@ -39,7 +39,7 @@ #define PLATFORM_SSP_PORT 2
/* default SSP stream format - need aligned with codec setting*/ -#define PLATFORM_SSP_STREAM_FORMAT STREAM_FORMAT_S16_LE +#define PLATFORM_SSP_STREAM_FORMAT STREAM_FORMAT_S24_4LE
/* IPC Interrupt */ #define PLATFORM_IPC_INTERUPT IRQ_NUM_EXT_IA @@ -62,7 +62,7 @@ #define PLAT_HOST_PERIODS 2 /* give enough latency for DMA refill */
/* Platform Dev DMA buffer config - these should align with DMA engine */ -#define PLAT_DEV_PERSIZE 256 /* must be multiple of DMA+DEV burst size */ +#define PLAT_DEV_PERSIZE 512 /* must be multiple of DMA+DEV burst size */ #define PLAT_DEV_PERIODS 2 /* give enough latency for DMA refill */
/* DMA channel drain timeout in microseconds */
Is the format for firmware internal processing still 16bits? We only use 24 bits to exchange data with RT5651 codec?
Thanks Mengdong
-----Original Message----- From: Keyon Jie [mailto:yang.jie@linux.intel.com] Sent: Tuesday, December 20, 2016 3:47 PM To: sound-open-firmware@alsa-project.org; liam.r.girdwood@linux.intel.com Cc: Jie, Yang yang.jie@intel.com; Ingalsuo, Seppo seppo.ingalsuo@intel.com; Zhang, Keqiao keqiao.zhang@intel.com; Lin, Mengdong mengdong.lin@intel.com; Keyon Jie yang.jie@linux.intel.com Subject: [PATCH 7/8] ssp: change stream format to S24_4LE
- stream format changed to S24_LE;
- ssp device period size changed to 512 Byte; 3. dai config frame size(24b),
bclks_fs(50), mclks_fs(400);
it is verified work fine on minnow max + rt5651, for both SSP_CLK_EXT and SSP_CLK_AUDIO clock mode.
Signed-off-by: Keyon Jie yang.jie@linux.intel.com
src/ipc/intel-ipc.c | 7 ++++--- src/platform/baytrail/include/platform/platform.h | 4 ++-- 2 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/src/ipc/intel-ipc.c b/src/ipc/intel-ipc.c index b159980..33727a0 100644 --- a/src/ipc/intel-ipc.c +++ b/src/ipc/intel-ipc.c @@ -564,9 +564,10 @@ static uint32_t ipc_device_set_formats(uint32_t header) dai_dev->dai_config.mclk = config_req.clock_frequency; dai_dev->dai_config.format = DAI_FMT_I2S | DAI_FMT_CONT | DAI_FMT_NB_NF | DAI_FMT_CBS_CFS;
- dai_dev->dai_config.frame_size = 32; /* TODO 16bit stereo hard
coded */
- dai_dev->dai_config.bclk_fs = 32; /* 32 BCLKs per frame - */
- dai_dev->dai_config.mclk_fs = 256;
/* TODO: convert from dai stream_format */
dai_dev->dai_config.frame_size = 24;
dai_dev->dai_config.bclk_fs = 50; /* 50 BCLKs per frame - */
dai_dev->dai_config.mclk_fs = 400; dai_dev->dai_config.clk_src = SSP_CLK_EXT;
/* set SSP M/N dividers */
diff --git a/src/platform/baytrail/include/platform/platform.h b/src/platform/baytrail/include/platform/platform.h index b0000b4..3f7be88 100644 --- a/src/platform/baytrail/include/platform/platform.h +++ b/src/platform/baytrail/include/platform/platform.h @@ -39,7 +39,7 @@ #define PLATFORM_SSP_PORT 2
/* default SSP stream format - need aligned with codec setting*/ -#define PLATFORM_SSP_STREAM_FORMAT STREAM_FORMAT_S16_LE +#define PLATFORM_SSP_STREAM_FORMAT STREAM_FORMAT_S24_4LE
/* IPC Interrupt */ #define PLATFORM_IPC_INTERUPT IRQ_NUM_EXT_IA @@ -62,7 +62,7 @@ #define PLAT_HOST_PERIODS 2 /* give enough latency for DMA refill */
/* Platform Dev DMA buffer config - these should align with DMA engine */ -#define PLAT_DEV_PERSIZE 256 /* must be multiple of DMA+DEV burst size */ +#define PLAT_DEV_PERSIZE 512 /* must be multiple of DMA+DEV burst size */ #define PLAT_DEV_PERIODS 2 /* give enough latency for DMA refill */
/* DMA channel drain timeout in microseconds */
2.7.4
On 2016年12月20日 16:10, Lin, Mengdong wrote:
Is the format for firmware internal processing still 16bits? We only use 24 bits to exchange data with RT5651 codec?
yes, we only use 24bits to exchange with codec ATM, and keep the internal format before DAI output.
we do have plan to change the internal format to 32bits, that is required from kinds of processing.
thanks, ~Keyon
Thanks Mengdong
-----Original Message----- From: Keyon Jie [mailto:yang.jie@linux.intel.com] Sent: Tuesday, December 20, 2016 3:47 PM To: sound-open-firmware@alsa-project.org; liam.r.girdwood@linux.intel.com Cc: Jie, Yang yang.jie@intel.com; Ingalsuo, Seppo seppo.ingalsuo@intel.com; Zhang, Keqiao keqiao.zhang@intel.com; Lin, Mengdong mengdong.lin@intel.com; Keyon Jie yang.jie@linux.intel.com Subject: [PATCH 7/8] ssp: change stream format to S24_4LE
- stream format changed to S24_LE;
- ssp device period size changed to 512 Byte; 3. dai config frame size(24b),
bclks_fs(50), mclks_fs(400);
it is verified work fine on minnow max + rt5651, for both SSP_CLK_EXT and SSP_CLK_AUDIO clock mode.
Signed-off-by: Keyon Jie yang.jie@linux.intel.com
src/ipc/intel-ipc.c | 7 ++++--- src/platform/baytrail/include/platform/platform.h | 4 ++-- 2 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/src/ipc/intel-ipc.c b/src/ipc/intel-ipc.c index b159980..33727a0 100644 --- a/src/ipc/intel-ipc.c +++ b/src/ipc/intel-ipc.c @@ -564,9 +564,10 @@ static uint32_t ipc_device_set_formats(uint32_t header) dai_dev->dai_config.mclk = config_req.clock_frequency; dai_dev->dai_config.format = DAI_FMT_I2S | DAI_FMT_CONT | DAI_FMT_NB_NF | DAI_FMT_CBS_CFS;
- dai_dev->dai_config.frame_size = 32; /* TODO 16bit stereo hard
coded */
- dai_dev->dai_config.bclk_fs = 32; /* 32 BCLKs per frame - */
- dai_dev->dai_config.mclk_fs = 256;
/* TODO: convert from dai stream_format */
dai_dev->dai_config.frame_size = 24;
dai_dev->dai_config.bclk_fs = 50; /* 50 BCLKs per frame - */
dai_dev->dai_config.mclk_fs = 400; dai_dev->dai_config.clk_src = SSP_CLK_EXT;
/* set SSP M/N dividers */
diff --git a/src/platform/baytrail/include/platform/platform.h b/src/platform/baytrail/include/platform/platform.h index b0000b4..3f7be88 100644 --- a/src/platform/baytrail/include/platform/platform.h +++ b/src/platform/baytrail/include/platform/platform.h @@ -39,7 +39,7 @@ #define PLATFORM_SSP_PORT 2
/* default SSP stream format - need aligned with codec setting*/ -#define PLATFORM_SSP_STREAM_FORMAT STREAM_FORMAT_S16_LE +#define PLATFORM_SSP_STREAM_FORMAT STREAM_FORMAT_S24_4LE
/* IPC Interrupt */ #define PLATFORM_IPC_INTERUPT IRQ_NUM_EXT_IA @@ -62,7 +62,7 @@ #define PLAT_HOST_PERIODS 2 /* give enough latency for DMA refill */
/* Platform Dev DMA buffer config - these should align with DMA engine */ -#define PLAT_DEV_PERSIZE 256 /* must be multiple of DMA+DEV burst size */ +#define PLAT_DEV_PERSIZE 512 /* must be multiple of DMA+DEV burst size */ #define PLAT_DEV_PERIODS 2 /* give enough latency for DMA refill */
/* DMA channel drain timeout in microseconds */
2.7.4
Sound-open-firmware mailing list Sound-open-firmware@alsa-project.org http://mailman.alsa-project.org/mailman/listinfo/sound-open-firmware
On 12/20/16 2:17 AM, Keyon Jie wrote:
On 2016年12月20日 16:10, Lin, Mengdong wrote:
Is the format for firmware internal processing still 16bits? We only use 24 bits to exchange data with RT5651 codec?
yes, we only use 24bits to exchange with codec ATM, and keep the internal format before DAI output.
we do have plan to change the internal format to 32bits, that is required from kinds of processing.
Some BT links require 16 bits on the interface, making everything 24 times isn't quite right. This needs to be programmable and not hard-coded.
thanks, ~Keyon
Thanks Mengdong
-----Original Message----- From: Keyon Jie [mailto:yang.jie@linux.intel.com] Sent: Tuesday, December 20, 2016 3:47 PM To: sound-open-firmware@alsa-project.org; liam.r.girdwood@linux.intel.com Cc: Jie, Yang yang.jie@intel.com; Ingalsuo, Seppo seppo.ingalsuo@intel.com; Zhang, Keqiao keqiao.zhang@intel.com; Lin, Mengdong mengdong.lin@intel.com; Keyon Jie yang.jie@linux.intel.com Subject: [PATCH 7/8] ssp: change stream format to S24_4LE
- stream format changed to S24_LE;
- ssp device period size changed to 512 Byte; 3. dai config frame
size(24b), bclks_fs(50), mclks_fs(400);
it is verified work fine on minnow max + rt5651, for both SSP_CLK_EXT and SSP_CLK_AUDIO clock mode.
Signed-off-by: Keyon Jie yang.jie@linux.intel.com
src/ipc/intel-ipc.c | 7 ++++--- src/platform/baytrail/include/platform/platform.h | 4 ++-- 2 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/src/ipc/intel-ipc.c b/src/ipc/intel-ipc.c index b159980..33727a0 100644 --- a/src/ipc/intel-ipc.c +++ b/src/ipc/intel-ipc.c @@ -564,9 +564,10 @@ static uint32_t ipc_device_set_formats(uint32_t header) dai_dev->dai_config.mclk = config_req.clock_frequency; dai_dev->dai_config.format = DAI_FMT_I2S | DAI_FMT_CONT | DAI_FMT_NB_NF | DAI_FMT_CBS_CFS;
- dai_dev->dai_config.frame_size = 32; /* TODO 16bit stereo hard
coded */
- dai_dev->dai_config.bclk_fs = 32; /* 32 BCLKs per frame - */
- dai_dev->dai_config.mclk_fs = 256;
/* TODO: convert from dai stream_format */
dai_dev->dai_config.frame_size = 24;
dai_dev->dai_config.bclk_fs = 50; /* 50 BCLKs per frame - */
dai_dev->dai_config.mclk_fs = 400; dai_dev->dai_config.clk_src = SSP_CLK_EXT;
/* set SSP M/N dividers */
diff --git a/src/platform/baytrail/include/platform/platform.h b/src/platform/baytrail/include/platform/platform.h index b0000b4..3f7be88 100644 --- a/src/platform/baytrail/include/platform/platform.h +++ b/src/platform/baytrail/include/platform/platform.h @@ -39,7 +39,7 @@ #define PLATFORM_SSP_PORT 2
/* default SSP stream format - need aligned with codec setting*/ -#define PLATFORM_SSP_STREAM_FORMAT STREAM_FORMAT_S16_LE +#define PLATFORM_SSP_STREAM_FORMAT STREAM_FORMAT_S24_4LE
/* IPC Interrupt */ #define PLATFORM_IPC_INTERUPT IRQ_NUM_EXT_IA @@ -62,7 +62,7 @@ #define PLAT_HOST_PERIODS 2 /* give enough latency for DMA refill */
/* Platform Dev DMA buffer config - these should align with DMA engine */ -#define PLAT_DEV_PERSIZE 256 /* must be multiple of DMA+DEV burst size */ +#define PLAT_DEV_PERSIZE 512 /* must be multiple of DMA+DEV burst size */ #define PLAT_DEV_PERIODS 2 /* give enough latency for DMA refill */
/* DMA channel drain timeout in microseconds */
2.7.4
Sound-open-firmware mailing list Sound-open-firmware@alsa-project.org http://mailman.alsa-project.org/mailman/listinfo/sound-open-firmware
Sound-open-firmware mailing list Sound-open-firmware@alsa-project.org http://mailman.alsa-project.org/mailman/listinfo/sound-open-firmware
-----Original Message----- From: Pierre-Louis Bossart [mailto:pierre-louis.bossart@linux.intel.com] Sent: Tuesday, December 20, 2016 10:33 PM To: Keyon Jie yang.jie@linux.intel.com; Lin, Mengdong mengdong.lin@intel.com; sound-open-firmware@alsa-project.org; liam.r.girdwood@linux.intel.com Cc: Zhang, Keqiao keqiao.zhang@intel.com; Jie, Yang yang.jie@intel.com; Ingalsuo, Seppo seppo.ingalsuo@intel.com Subject: Re: [Sound-open-firmware] [PATCH 7/8] ssp: change stream format to S24_4LE
On 12/20/16 2:17 AM, Keyon Jie wrote:
On 2016年12月20日 16:10, Lin, Mengdong wrote:
Is the format for firmware internal processing still 16bits? We only use 24 bits to exchange data with RT5651 codec?
yes, we only use 24bits to exchange with codec ATM, and keep the internal format before DAI output.
we do have plan to change the internal format to 32bits, that is required from kinds of processing.
Some BT links require 16 bits on the interface, making everything 24 times isn't quite right. This needs to be programmable and not hard-coded.
Yes, we also need IPC to configure this also.
Thanks, ~Keyon
thanks, ~Keyon
Thanks Mengdong
-----Original Message----- From: Keyon Jie [mailto:yang.jie@linux.intel.com] Sent: Tuesday, December 20, 2016 3:47 PM To: sound-open-firmware@alsa-project.org; liam.r.girdwood@linux.intel.com Cc: Jie, Yang yang.jie@intel.com; Ingalsuo, Seppo seppo.ingalsuo@intel.com; Zhang, Keqiao keqiao.zhang@intel.com; Lin, Mengdong mengdong.lin@intel.com; Keyon Jie yang.jie@linux.intel.com Subject: [PATCH 7/8] ssp: change stream format to S24_4LE
- stream format changed to S24_LE;
- ssp device period size changed to 512 Byte; 3. dai config frame
size(24b), bclks_fs(50), mclks_fs(400);
it is verified work fine on minnow max + rt5651, for both SSP_CLK_EXT and SSP_CLK_AUDIO clock mode.
Signed-off-by: Keyon Jie yang.jie@linux.intel.com
src/ipc/intel-ipc.c | 7 ++++--- src/platform/baytrail/include/platform/platform.h | 4 ++-- 2 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/src/ipc/intel-ipc.c b/src/ipc/intel-ipc.c index b159980..33727a0 100644 --- a/src/ipc/intel-ipc.c +++ b/src/ipc/intel-ipc.c @@ -564,9 +564,10 @@ static uint32_t ipc_device_set_formats(uint32_t header) dai_dev->dai_config.mclk = config_req.clock_frequency; dai_dev->dai_config.format = DAI_FMT_I2S | DAI_FMT_CONT | DAI_FMT_NB_NF | DAI_FMT_CBS_CFS;
- dai_dev->dai_config.frame_size = 32; /* TODO 16bit stereo hard
coded */
- dai_dev->dai_config.bclk_fs = 32; /* 32 BCLKs per frame - */
- dai_dev->dai_config.mclk_fs = 256;
/* TODO: convert from dai stream_format */
dai_dev->dai_config.frame_size = 24;
dai_dev->dai_config.bclk_fs = 50; /* 50 BCLKs per frame - */
dai_dev->dai_config.mclk_fs = 400; dai_dev->dai_config.clk_src = SSP_CLK_EXT;
/* set SSP M/N dividers */
diff --git a/src/platform/baytrail/include/platform/platform.h b/src/platform/baytrail/include/platform/platform.h index b0000b4..3f7be88 100644 --- a/src/platform/baytrail/include/platform/platform.h +++ b/src/platform/baytrail/include/platform/platform.h @@ -39,7 +39,7 @@ #define PLATFORM_SSP_PORT 2
/* default SSP stream format - need aligned with codec setting*/ -#define PLATFORM_SSP_STREAM_FORMAT STREAM_FORMAT_S16_LE +#define PLATFORM_SSP_STREAM_FORMAT STREAM_FORMAT_S24_4LE
/* IPC Interrupt */ #define PLATFORM_IPC_INTERUPT IRQ_NUM_EXT_IA @@ -62,7 +62,7 @@ #define PLAT_HOST_PERIODS 2 /* give enough latency for DMA refill */
/* Platform Dev DMA buffer config - these should align with DMA engine */ -#define PLAT_DEV_PERSIZE 256 /* must be multiple of DMA+DEV burst size */ +#define PLAT_DEV_PERSIZE 512 /* must be multiple of DMA+DEV burst size */ #define PLAT_DEV_PERIODS 2 /* give enough latency for DMA refill */
/* DMA channel drain timeout in microseconds */
2.7.4
Sound-open-firmware mailing list Sound-open-firmware@alsa-project.org http://mailman.alsa-project.org/mailman/listinfo/sound-open-firmware
Sound-open-firmware mailing list Sound-open-firmware@alsa-project.org http://mailman.alsa-project.org/mailman/listinfo/sound-open-firmware
switch the BCLK generated from shim ssp clock divider to SSCR0.SCR.
please note that we need clear SSPSP.SFRMP while using SSCR0.SCR, otherwise the L/R channel may swap, no document to describe that though.
Signed-off-by: Keyon Jie yang.jie@linux.intel.com --- src/drivers/ssp.c | 4 +--- src/ipc/intel-ipc.c | 9 --------- 2 files changed, 1 insertion(+), 12 deletions(-)
diff --git a/src/drivers/ssp.c b/src/drivers/ssp.c index 77341b6..c0d6251 100644 --- a/src/drivers/ssp.c +++ b/src/drivers/ssp.c @@ -221,7 +221,6 @@ static inline int ssp_set_config(struct dai *dai, struct dai_config *dai_config) /* clock signal polarity */ switch (dai->config.format & DAI_FMT_INV_MASK) { case DAI_FMT_NB_NF: - sspsp |= SSPSP_SFRMP; break; case DAI_FMT_NB_IF: break; @@ -253,8 +252,7 @@ static inline int ssp_set_config(struct dai *dai, struct dai_config *dai_config) return -ENODEV; }
- /* TODO: clock frequency */ - //scr = dai_config->mclk / ( + sscr0 |= SSCR0_SCR(dai->config.mclk_fs / dai->config.bclk_fs - 1);
/* format */ switch (dai->config.format & DAI_FMT_FORMAT_MASK) { diff --git a/src/ipc/intel-ipc.c b/src/ipc/intel-ipc.c index 33727a0..4d2acb2 100644 --- a/src/ipc/intel-ipc.c +++ b/src/ipc/intel-ipc.c @@ -530,7 +530,6 @@ static uint32_t ipc_device_set_formats(uint32_t header) { struct ipc_intel_ipc_device_config_req config_req; struct ipc_dai_dev *dai_dev; - int err;
trace_ipc("DsF");
@@ -570,14 +569,6 @@ static uint32_t ipc_device_set_formats(uint32_t header) dai_dev->dai_config.mclk_fs = 400; dai_dev->dai_config.clk_src = SSP_CLK_EXT;
- /* set SSP M/N dividers */ - err = platform_ssp_set_mn(config_req.ssp_interface, 48000, - dai_dev->dai_config.bclk_fs); - if (err < 0) { - trace_ipc_error("eDs"); - goto error; - } - comp_dai_config(dai_dev->dev.cd, &dai_dev->dai_config);
error:
On Tue, 2016-12-20 at 15:46 +0800, Keyon Jie wrote:
switch the BCLK generated from shim ssp clock divider to SSCR0.SCR.
please note that we need clear SSPSP.SFRMP while using SSCR0.SCR, otherwise the L/R channel may swap, no document to describe that though.
Signed-off-by: Keyon Jie yang.jie@linux.intel.com
src/drivers/ssp.c | 4 +--- src/ipc/intel-ipc.c | 9 --------- 2 files changed, 1 insertion(+), 12 deletions(-)
diff --git a/src/drivers/ssp.c b/src/drivers/ssp.c index 77341b6..c0d6251 100644 --- a/src/drivers/ssp.c +++ b/src/drivers/ssp.c @@ -221,7 +221,6 @@ static inline int ssp_set_config(struct dai *dai, struct dai_config *dai_config) /* clock signal polarity */ switch (dai->config.format & DAI_FMT_INV_MASK) { case DAI_FMT_NB_NF:
sspsp |= SSPSP_SFRMP;@@ -253,8 +252,7 @@ static inline int ssp_set_config(struct dai *dai, struct dai_config *dai_config) return -ENODEV; }
- /* TODO: clock frequency */
- //scr = dai_config->mclk / (
sscr0 |= SSCR0_SCR(dai->config.mclk_fs / dai->config.bclk_fs - 1);
/* format */ switch (dai->config.format & DAI_FMT_FORMAT_MASK) {
diff --git a/src/ipc/intel-ipc.c b/src/ipc/intel-ipc.c index 33727a0..4d2acb2 100644 --- a/src/ipc/intel-ipc.c +++ b/src/ipc/intel-ipc.c @@ -530,7 +530,6 @@ static uint32_t ipc_device_set_formats(uint32_t header) { struct ipc_intel_ipc_device_config_req config_req; struct ipc_dai_dev *dai_dev;
int err;
trace_ipc("DsF");
@@ -570,14 +569,6 @@ static uint32_t ipc_device_set_formats(uint32_t header) dai_dev->dai_config.mclk_fs = 400; dai_dev->dai_config.clk_src = SSP_CLK_EXT;
- /* set SSP M/N dividers */
- err = platform_ssp_set_mn(config_req.ssp_interface, 48000,
dai_dev->dai_config.bclk_fs);- if (err < 0) {
trace_ipc_error("eDs");goto error;- }
Can I drop 5/8 since M/N is no longer used ?
Liam
comp_dai_config(dai_dev->dev.cd, &dai_dev->dai_config);
error:
On Tue, 2016-12-20 at 15:46 +0800, Keyon Jie wrote:
This series is created to change the SSP format setting for both Tx and Rx, and it is verified on MinnowMax + ALC5651 codec with I2S stereo both SSP_CLK_EXT and SSP_CLK_AUDIO mode. Changes including:
- change ssp clock from 25M to 19.2M;
- add 16bit <==> 24bit volume converting functions;
- switch to use I2S mode(more common on host side);
- change ssp stream format to 24 bits;
- remove the usage of shim SSP divider and use SSCR0.SCR
for BCLK generating.
Looks good, but can you do a V2 and also include a patch that removes the M/N divider clock code (since we no longer use M/N).
Thanks
Liam
-----Original Message----- From: Liam Girdwood [mailto:liam.r.girdwood@linux.intel.com] Sent: Tuesday, December 20, 2016 6:42 PM To: Keyon Jie yang.jie@linux.intel.com Cc: sound-open-firmware@alsa-project.org; Jie, Yang yang.jie@intel.com; Ingalsuo, Seppo seppo.ingalsuo@intel.com; Zhang, Keqiao keqiao.zhang@intel.com; Lin, Mengdong mengdong.lin@intel.com Subject: Re: [PATCH 0/8] SSP: baytrail 24 bits support
On Tue, 2016-12-20 at 15:46 +0800, Keyon Jie wrote:
This series is created to change the SSP format setting for both Tx and Rx, and it is verified on MinnowMax + ALC5651 codec with I2S stereo both SSP_CLK_EXT and SSP_CLK_AUDIO mode. Changes including:
- change ssp clock from 25M to 19.2M; 2. add 16bit <==> 24bit volume
converting functions; 3. switch to use I2S mode(more common on host side); 4. change ssp stream format to 24 bits; 5. remove the usage of shim SSP divider and use SSCR0.SCR for BCLK generating.
Looks good, but can you do a V2 and also include a patch that removes the M/N divider clock code (since we no longer use M/N).
Are you meaning that remove them from platform.c? Or shall we keep them ATM, and delete after verified they are not needed anymore? Patch 8/8 already removed the calling to them.
Thanks, ~Keyon
Thanks
Liam
On Tue, 2016-12-20 at 13:32 +0000, Jie, Yang wrote:
-----Original Message----- From: Liam Girdwood [mailto:liam.r.girdwood@linux.intel.com] Sent: Tuesday, December 20, 2016 6:42 PM To: Keyon Jie yang.jie@linux.intel.com Cc: sound-open-firmware@alsa-project.org; Jie, Yang yang.jie@intel.com; Ingalsuo, Seppo seppo.ingalsuo@intel.com; Zhang, Keqiao keqiao.zhang@intel.com; Lin, Mengdong mengdong.lin@intel.com Subject: Re: [PATCH 0/8] SSP: baytrail 24 bits support
On Tue, 2016-12-20 at 15:46 +0800, Keyon Jie wrote:
This series is created to change the SSP format setting for both Tx and Rx, and it is verified on MinnowMax + ALC5651 codec with I2S stereo both SSP_CLK_EXT and SSP_CLK_AUDIO mode. Changes including:
- change ssp clock from 25M to 19.2M; 2. add 16bit <==> 24bit volume
converting functions; 3. switch to use I2S mode(more common on host side); 4. change ssp stream format to 24 bits; 5. remove the usage of shim SSP divider and use SSCR0.SCR for BCLK generating.
Looks good, but can you do a V2 and also include a patch that removes the M/N divider clock code (since we no longer use M/N).
Are you meaning that remove them from platform.c? Or shall we keep them ATM, and delete after verified they are not needed anymore? Patch 8/8 already removed the calling to them.
Remove them completely from all the code. I think everything is using SCR now with these patches ?
Liam
Thanks, ~Keyon
Thanks
Liam
participants (5)
-
Jie, Yang -
Keyon Jie -
Liam Girdwood -
Lin, Mengdong -
Pierre-Louis Bossart