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[Sound-open-firmware] [PATCH] dai: configure its frame_fmt from topology
by Xiuli Pan 06 Feb '18

06 Feb '18

From: Pan Xiuli <xiuli.pan(a)linux.intel.com> For dai component, it's frame_fmt may be different with host, we usually configure it from topology, here fix it. Contributor: Keyon Jie <yang.jie(a)linux.intel.com> Signed-off-by: Pan Xiuli <xiuli.pan(a)linux.intel.com> --- Modify from Keyon's patch, changed to use COMP_GET_CONFIG. Test with: Mininow max rt5651 SOF master: 0505823b9667036202758ea950c3ff3347359730 SOF-Tool master: 8c9ebfe9c4f8037b0d0816dedcb87dabef347c6b https://github.com/plbossart/sound/tree/topic/sof-v4.14: 5a91e6776d41b0e97828882294cdc00b5c0bafd6 Signed-off-by: Pan Xiuli <xiuli.pan(a)linux.intel.com> --- src/audio/dai.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/audio/dai.c b/src/audio/dai.c index d19e18a..8731ffd 100644 --- a/src/audio/dai.c +++ b/src/audio/dai.c @@ -383,6 +383,7 @@ static int dai_params(struct comp_dev *dev) { struct dai_data *dd = comp_get_drvdata(dev); struct comp_buffer *dma_buffer; + struct sof_ipc_comp_config *dconfig = COMP_GET_CONFIG(dev); trace_dai("par"); @@ -392,6 +393,9 @@ static int dai_params(struct comp_dev *dev) return -EINVAL; } + /* for DAI, we should configure its frame_fmt from topology */ + dev->params.frame_fmt = dconfig->frame_fmt; + /* calculate period size based on config */ dev->frame_bytes = comp_frame_bytes(dev); if (dev->frame_bytes == 0) { -- 2.7.4

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[Sound-open-firmware] [PATCH] rimage: fix manifest header path
by Xiuli Pan 06 Feb '18

06 Feb '18

From: Pan Xiuli <xiuli.pan(a)linux.intel.com> We moved header manifest.h is sof/upai now. Modify the configure path and include path. Signed-off-by: Pan Xiuli <xiuli.pan(a)linux.intel.com> --- Test with: GP-MRB with NoCodec, Mininow max rt5651 SOF master: 0505823b9667036202758ea950c3ff3347359730 SOF-Tool master: 8c9ebfe9c4f8037b0d0816dedcb87dabef347c6b https://github.com/plbossart/sound/tree/topic/sof-v4.14: 5a91e6776d41b0e97828882294cdc00b5c0bafd6 Signed-off-by: Pan Xiuli <xiuli.pan(a)linux.intel.com> --- configure.ac | 2 +- rimage/manifest.c | 2 +- rimage/manifest.h | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/configure.ac b/configure.ac index 6e9c758..f85f18c 100644 --- a/configure.ac +++ b/configure.ac @@ -4,7 +4,7 @@ AC_INIT([sof-tools], [1.0.1]) AM_INIT_AUTOMAKE([foreign]) AC_CONFIG_SRCDIR([rimage/rimage.c]) AC_CONFIG_HEADERS([config.h]) -AC_CHECK_HEADER([sof/manifest.h]) +AC_CHECK_HEADER([sof/uapi/manifest.h]) AC_CANONICAL_HOST diff --git a/rimage/manifest.c b/rimage/manifest.c index 24fb76f..68e6d8b 100644 --- a/rimage/manifest.c +++ b/rimage/manifest.c @@ -22,7 +22,7 @@ #include <string.h> #include <time.h> #include <sys/time.h> -#include <sof/manifest.h> +#include <sof/uapi/manifest.h> #include "rimage.h" #include "file_format.h" diff --git a/rimage/manifest.h b/rimage/manifest.h index 348f47f..655963f 100644 --- a/rimage/manifest.h +++ b/rimage/manifest.h @@ -15,7 +15,7 @@ #define __MANIFEST_H__ #include <stdint.h> -#include <sof/manifest.h> +#include <sof/uapi/manifest.h> #include "css.h" #include "cse.h" #include "plat_auth.h" -- 2.7.4

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[Sound-open-firmware] [PATCH] Audio format: Bug fix for erroneous fractional multiplication macro
by Seppo Ingalsuo 06 Feb '18

06 Feb '18

Due to misplaced parentheses the computation gives half of correct result and omits rounding. Currently this macro is not used by code in SOF git repository. Developers who may use format.h macros should check their code. Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo(a)linux.intel.com> --- src/include/reef/audio/format.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/include/reef/audio/format.h b/src/include/reef/audio/format.h index 8964f33..c9c23ec 100644 --- a/src/include/reef/audio/format.h +++ b/src/include/reef/audio/format.h @@ -85,7 +85,8 @@ /* Fractional multiplication with shift and round * Note that the parameters px and py must be cast to (int64_t) if other type. */ -#define Q_MULTSR_32X32(px, py, qx, qy, qp) (((px) * (py) >> (((qx)+(qy)-(qp)-1) +1) >> 1)) +#define Q_MULTSR_32X32(px, py, qx, qy, qp) \ + ((((px) * (py) >> ((qx)+(qy)-(qp)-1)) + 1) >> 1) /* Saturation */ #define SATP_INT32(x) (((x) > INT32_MAX) ? INT32_MAX : (x)) -- 2.11.0

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[Sound-open-firmware] [PATCH] rimage: add check for .bss section
by Xiuli Pan 06 Feb '18

06 Feb '18

From: Pan Xiuli <xiuli.pan(a)linux.intel.com> We may have heap buffers for base FW, but they are handled by the runtime function. We did not need to set them as bss in FW manifest. So add check to mark the .bss segment as BSS and other segment as HEAP. Then we only update manifest BSS segmet with BSS section. Signed-off-by: Pan Xiuli <xiuli.pan(a)linux.intel.com> --- Test with: GP-MRB with NoCodec, Mininow max rt5651 SOF master: 0505823b9667036202758ea950c3ff3347359730 SOF-Tool master: 8c9ebfe9c4f8037b0d0816dedcb87dabef347c6b https://github.com/plbossart/sound/tree/topic/sof-v4.14: 5a91e6776d41b0e97828882294cdc00b5c0bafd6 --- rimage/elf.c | 26 ++++++++++++++++++++------ rimage/rimage.h | 1 + 2 files changed, 21 insertions(+), 6 deletions(-) diff --git a/rimage/elf.c b/rimage/elf.c index b912477..1dc48f3 100644 --- a/rimage/elf.c +++ b/rimage/elf.c @@ -27,6 +27,7 @@ static int elf_read_sections(struct image *image, struct module *module) size_t count; int i, ret; uint32_t valid = (SHF_WRITE | SHF_ALLOC | SHF_EXECINSTR); + int man_section_idx; /* read in section header */ ret = fseek(module->fd, hdr->e_shoff, SEEK_SET); @@ -50,6 +51,16 @@ static int elf_read_sections(struct image *image, struct module *module) return -errno; } + /* find manifest module data */ + man_section_idx = elf_find_section(image, module, ".bss"); + if (man_section_idx < 0) { + return -EINVAL; + } + module->bss_index = man_section_idx; + + fprintf(stdout, " BSS module metadata section at index %d\n", + man_section_idx); + /* parse each section */ for (i = 0; i < hdr->e_shnum; i++) { @@ -211,7 +222,7 @@ int elf_is_rom(struct image *image, Elf32_Shdr *section) } static void elf_module_size(struct image *image, struct module *module, - Elf32_Shdr *section) + Elf32_Shdr *section, int index) { switch (section->sh_type) { case SHT_PROGBITS: @@ -236,12 +247,14 @@ static void elf_module_size(struct image *image, struct module *module, break; case SHT_NOBITS: /* bss */ - if (module->bss_start > section->sh_addr) + if (index == module->bss_index) { + /* updated the .bss segment */ module->bss_start = section->sh_addr; - if (module->bss_end < section->sh_addr + section->sh_size) module->bss_end = section->sh_addr + section->sh_size; - - fprintf(stdout, "\tBSS\n"); + fprintf(stdout, "\tBSS\n"); + } else { + fprintf(stdout, "\tHEAP\n"); + } break; default: break; @@ -282,7 +295,8 @@ static void elf_module_limits(struct image *image, struct module *module) section->sh_size); /* text or data section */ - elf_module_size(image, module, section); + elf_module_size(image, module, section, i); + } fprintf(stdout, "\n"); diff --git a/rimage/rimage.h b/rimage/rimage.h index 84ff93f..a68f1a8 100644 --- a/rimage/rimage.h +++ b/rimage/rimage.h @@ -65,6 +65,7 @@ struct module { int num_sections; int num_bss; int fw_size; + int bss_index; /* sizes do not include any gaps */ int bss_size; -- 2.7.4

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[Sound-open-firmware] SOF master build REMINDER
by Pan, Xiuli 06 Feb '18

06 Feb '18

Reminder for applying this patch! On master branch Please check if you have install sudo apt-get install autoconf-archive And see this line when run ./autogen.sh aclocal: installing 'm4/ax_check_compile_flag.m4' from '/usr/share/aclocal/ax_check_compile_flag.m4' or have file 'm4/ax_check_compile_flag.m4' in your git repo. If not you will find these when configure. ./configure: line 3451: syntax error near unexpected token `-msse4.2,' ./configure: line 3451: `AX_CHECK_COMPILE_FLAG(-msse4.2, SSE42_CFLAGS="-DOPS_SSE42 -msse4.2 -ffast-math -ftree-vectorizer-verbose=0",' It seems to be some m4 expand auto check about 'AX_CHECK_COMPILE_FLAG'. If you did no install this macro it will just copy but not expand it in configure file. And then the error will occur. Synced with Keqiao to update CI environment and build guide. Thanks Xiuli >Subject: [Sound-open-firmware] [PATCH v5] build: add library build support for >host platform > >This patch provides library build support for host platform architecture. >It enables creating separate libraries for each SOF audio component. > >Signed-off-by: Ranjani Sridharan <ranjani.sridharan(a)linux.intel.com>

2 1

[Sound-open-firmware] [PATCH v2] dw-dma: add support for interrupt per channel
by Keyon Jie 06 Feb '18

06 Feb '18

On Apollolake, the interrupt number for different channels of the same controller are different, here add implementation of it: register interrupt handler for each channel, and don't need check channel in its specific handler anymore. Signed-off-by: Keyon Jie <yang.jie(a)linux.intel.com> --- Update in v2: Fixed checkpatch.pl issues Tested on GP-MRB, SOF Master: f7beb51118e6e8463a864b9416c773a508930e06, SOF Tool Master: 59d81995f682876bd34f939332e8838c76f714ec, https://github.com/plbossart/sound/tree/topic/sof-v4.14: 5a91e6776d41b0e97828882294cdc00b5c0bafd6 src/drivers/dw-dma.c | 247 +++++++++++++++++++++++++++++++++++++------------ src/include/reef/dma.h | 6 ++ 2 files changed, 195 insertions(+), 58 deletions(-) diff --git a/src/drivers/dw-dma.c b/src/drivers/dw-dma.c index 5501f8e..7a1805e 100644 --- a/src/drivers/dw-dma.c +++ b/src/drivers/dw-dma.c @@ -809,6 +809,194 @@ static inline void dw_dma_chan_reload_next(struct dma *dma, int channel, dw_write(dma, DW_DMA_CHAN_EN, CHAN_ENABLE(channel)); } +static void dw_dma_setup(struct dma *dma) +{ + struct dw_drv_plat_data *dp = dma->plat_data.drv_plat_data; + int i; + + /* we cannot config DMAC if DMAC has been already enabled by host */ + if (dw_read(dma, DW_DMA_CFG) != 0) + dw_write(dma, DW_DMA_CFG, 0x0); + + /* now check that it's 0 */ + for (i = DW_DMA_CFG_TRIES; i > 0; i--) { + if (dw_read(dma, DW_DMA_CFG) == 0) + goto found; + } + trace_dma_error("eDs"); + return; + +found: + for (i = 0; i < DW_MAX_CHAN; i++) + dw_read(dma, DW_DMA_CHAN_EN); + +#ifdef HAVE_HDDA + /* enable HDDA before DMAC */ + shim_write(SHIM_HMDC, SHIM_HMDC_HDDA_ALLCH); +#endif + + /* enable the DMA controller */ + dw_write(dma, DW_DMA_CFG, 1); + + /* mask all interrupts for all 8 channels */ + dw_write(dma, DW_MASK_TFR, INT_MASK_ALL); + dw_write(dma, DW_MASK_BLOCK, INT_MASK_ALL); + dw_write(dma, DW_MASK_SRC_TRAN, INT_MASK_ALL); + dw_write(dma, DW_MASK_DST_TRAN, INT_MASK_ALL); + dw_write(dma, DW_MASK_ERR, INT_MASK_ALL); + +#ifdef DW_FIFO_PARTITION + /* TODO: we cannot config DMA FIFOs if DMAC has been already */ + /* allocate FIFO partitions, 128 bytes for each ch */ + dw_write(dma, DW_FIFO_PART1_LO, 0x100080); + dw_write(dma, DW_FIFO_PART1_HI, 0x100080); + dw_write(dma, DW_FIFO_PART0_HI, 0x100080); + dw_write(dma, DW_FIFO_PART0_LO, 0x100080 | (1 << 26)); + dw_write(dma, DW_FIFO_PART0_LO, 0x100080); +#endif + + /* set channel priorities */ + for (i = 0; i < DW_MAX_CHAN; i++) { +#if defined CONFIG_BAYTRAIL || defined CONFIG_CHERRYTRAIL ||\ + defined CONFIG_APOLLOLAKE || defined CONFIG_CANNONLAKE + dw_write(dma, DW_CTRL_HIGH(i), + DW_CTLH_CLASS(dp->chan[i].class)); +#elif defined CONFIG_BROADWELL || defined CONFIG_HASWELL + dw_write(dma, DW_CFG_LOW(i), + DW_CFG_CLASS(dp->chan[i].class)); +#endif + } +} + +#ifdef CONFIG_APOLLOLAKE +/* external layer 2 interrupt for dmac */ +static void dw_dma_irq_handler(void *data) +{ + struct dma_int *dma_int = (struct dma_int *)data; + struct dma *dma = dma_int->dma; + struct dma_pdata *p = dma_get_drvdata(dma); + struct dma_sg_elem next; + uint32_t status_tfr = 0, status_block = 0, status_err = 0, status_intr; + uint32_t mask; + int i = dma_int->channel; + + status_intr = dw_read(dma, DW_INTR_STATUS); + if (!status_intr) + trace_dma_error("eDI"); + + trace_dma("irq"); + trace_value(status_intr); + + /* get the source of our IRQ. */ + status_block = dw_read(dma, DW_STATUS_BLOCK); + status_tfr = dw_read(dma, DW_STATUS_TFR); + + /* TODO: handle errors, just clear them atm */ + status_err = dw_read(dma, DW_STATUS_ERR); + if (status_err) { + trace_dma_error("eDi"); + dw_write(dma, DW_CLEAR_ERR, status_err & i); + } + + /* clear interrupts for channel*/ + dw_write(dma, DW_CLEAR_BLOCK, status_block); + dw_write(dma, DW_CLEAR_TFR, status_tfr); + + /* skip if channel is not running */ + if (p->chan[i].status != COMP_STATE_ACTIVE) { + trace_dma_error("eDs"); + return; + } + + mask = 0x1 << i; + +#if DW_USE_HW_LLI + /* end of a LLI block */ + if (status_block & mask && + p->chan[i].cb_type & DMA_IRQ_TYPE_BLOCK) { + next.src = DMA_RELOAD_LLI; + next.dest = DMA_RELOAD_LLI; + /* will reload lli by default */ + next.size = DMA_RELOAD_LLI; + p->chan[i].cb(p->chan[i].cb_data, + DMA_IRQ_TYPE_BLOCK, &next); + } +#endif + /* end of a transfer */ + if ((status_tfr & mask) && + (p->chan[i].cb_type & DMA_IRQ_TYPE_LLIST)) { + trace_value(status_tfr); + + next.src = DMA_RELOAD_LLI; + next.dest = DMA_RELOAD_LLI; + next.size = DMA_RELOAD_LLI; /* will reload lli by default */ + if (p->chan[i].cb) + p->chan[i].cb(p->chan[i].cb_data, + DMA_IRQ_TYPE_LLIST, &next); + + /* check for reload channel: + * next.size is DMA_RELOAD_END, stop this dma copy; + * next.size > 0 but not DMA_RELOAD_LLI, use next + * element for next copy; + * if we are waiting for pause, pause it; + * otherwise, reload lli + */ + switch (next.size) { + case DMA_RELOAD_END: + p->chan[i].status = COMP_STATE_PREPARE; + break; + case DMA_RELOAD_LLI: + /* reload lli, but let's check if it is paused */ + if (p->chan[i].status != COMP_STATE_PAUSED) + dw_dma_chan_reload_lli(dma, i); + break; + default: + dw_dma_chan_reload_next(dma, i, &next); + break; + } + } +} + +static int dw_dma_probe(struct dma *dma) +{ + struct dma_int *dma_int[DW_MAX_CHAN]; + struct dma_pdata *dw_pdata; + int i; + + /* allocate private data */ + dw_pdata = rzalloc(RZONE_SYS, RFLAGS_NONE, sizeof(*dw_pdata)); + dma_set_drvdata(dma, dw_pdata); + + spinlock_init(&dma->lock); + + dw_dma_setup(dma); + + /* init work */ + for (i = 0; i < dma->plat_data.channels; i++) { + dw_pdata->chan[i].dma = dma; + dw_pdata->chan[i].channel = i; + dw_pdata->chan[i].status = COMP_STATE_INIT; + + dma_int[i] = rzalloc(RZONE_SYS, RFLAGS_NONE, + sizeof(struct dma_int)); + + dma_int[i]->dma = dma; + dma_int[i]->channel = i; + dma_int[i]->irq = dma->plat_data.irq + + (i << REEF_IRQ_BIT_SHIFT); + + /* register our IRQ handler */ + interrupt_register(dma_int[i]->irq, + dw_dma_irq_handler, + dma_int[i]); + interrupt_enable(dma_int[i]->irq); + } + + return 0; +} + +#else + /* this will probably be called at the end of every period copied */ static void dw_dma_irq_handler(void *data) { @@ -909,64 +1097,6 @@ static void dw_dma_irq_handler(void *data) } } -static void dw_dma_setup(struct dma *dma) -{ - struct dw_drv_plat_data *dp = dma->plat_data.drv_plat_data; - int i; - - /* we cannot config DMAC if DMAC has been already enabled by host */ - if (dw_read(dma, DW_DMA_CFG) != 0) - dw_write(dma, DW_DMA_CFG, 0x0); - - /* now check that it's 0 */ - for (i = DW_DMA_CFG_TRIES; i > 0; i--) { - if (dw_read(dma, DW_DMA_CFG) == 0) - goto found; - } - trace_dma_error("eDs"); - return; - -found: - for (i = 0; i < DW_MAX_CHAN; i++) - dw_read(dma, DW_DMA_CHAN_EN); - -#ifdef HAVE_HDDA - /* enable HDDA before DMAC */ - shim_write(SHIM_HMDC, SHIM_HMDC_HDDA_ALLCH); -#endif - - /* enable the DMA controller */ - dw_write(dma, DW_DMA_CFG, 1); - - /* mask all interrupts for all 8 channels */ - dw_write(dma, DW_MASK_TFR, INT_MASK_ALL); - dw_write(dma, DW_MASK_BLOCK, INT_MASK_ALL); - dw_write(dma, DW_MASK_SRC_TRAN, INT_MASK_ALL); - dw_write(dma, DW_MASK_DST_TRAN, INT_MASK_ALL); - dw_write(dma, DW_MASK_ERR, INT_MASK_ALL); - -#ifdef DW_FIFO_PARTITION - /* TODO: we cannot config DMA FIFOs if DMAC has been already */ - /* allocate FIFO partitions, 128 bytes for each ch */ - dw_write(dma, DW_FIFO_PART1_LO, 0x100080); - dw_write(dma, DW_FIFO_PART1_HI, 0x100080); - dw_write(dma, DW_FIFO_PART0_HI, 0x100080); - dw_write(dma, DW_FIFO_PART0_LO, 0x100080 | (1 << 26)); - dw_write(dma, DW_FIFO_PART0_LO, 0x100080); -#endif - - /* set channel priorities */ - for (i = 0; i < DW_MAX_CHAN; i++) { -#if defined CONFIG_BAYTRAIL || defined CONFIG_CHERRYTRAIL \ - || defined CONFIG_APOLLOLAKE || defined CONFIG_CANNONLAKE - dw_write(dma, DW_CTRL_HIGH(i), DW_CTLH_CLASS(dp->chan[i].class)); -#else - dw_write(dma, DW_CFG_LOW(i), DW_CFG_CLASS(dp->chan[i].class)); -#endif - } - -} - static int dw_dma_probe(struct dma *dma) { struct dma_pdata *dw_pdata; @@ -993,6 +1123,7 @@ static int dw_dma_probe(struct dma *dma) return 0; } +#endif const struct dma_ops dw_dma_ops = { .channel_get = dw_dma_channel_get, diff --git a/src/include/reef/dma.h b/src/include/reef/dma.h index e33adaa..77f8f71 100644 --- a/src/include/reef/dma.h +++ b/src/include/reef/dma.h @@ -128,6 +128,12 @@ struct dma { void *private; }; +struct dma_int { + struct dma *dma; + uint32_t channel; + uint32_t irq; +}; + struct dma *dma_get(int dmac_id); #define dma_set_drvdata(dma, data) \ -- 2.11.0

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[Sound-open-firmware] [PATCH] audio: fix some memcpy argument
by Xiuli Pan 31 Jan '18

31 Jan '18

From: Pan Xiuli <xiuli.pan(a)linux.intel.com> memcpy argument need void * pointer. Contributor: Luo Xionghu <xionghu.luo(a)intel.com> Signed-off-by: Pan Xiuli <xiuli.pan(a)linux.intel.com> --- Test with: Mininow max rt5651 SOF master: 0505823b9667036202758ea950c3ff3347359730 SOF-Tool master: 8c9ebfe9c4f8037b0d0816dedcb87dabef347c6b https://github.com/plbossart/sound/tree/topic/sof-v4.14: 5a91e6776d41b0e97828882294cdc00b5c0bafd6 --- src/audio/dai.c | 2 +- src/audio/eq_fir.c | 2 +- src/audio/eq_iir.c | 2 +- src/audio/host.c | 2 +- src/audio/mixer.c | 2 +- src/audio/src.c | 2 +- src/audio/tone.c | 2 +- src/audio/volume.c | 2 +- 8 files changed, 8 insertions(+), 8 deletions(-) diff --git a/src/audio/dai.c b/src/audio/dai.c index d19e18a..4015b84 100644 --- a/src/audio/dai.c +++ b/src/audio/dai.c @@ -190,7 +190,7 @@ static struct comp_dev *dai_new(struct sof_ipc_comp *comp) return NULL; dai = (struct sof_ipc_comp_dai *)&dev->comp; - memcpy(dai, ipc_dai, sizeof(struct sof_ipc_comp_dai)); + memcpy((void *)dai, ipc_dai, sizeof(struct sof_ipc_comp_dai)); dd = rzalloc(RZONE_RUNTIME, RFLAGS_NONE, sizeof(*dd)); if (dd == NULL) { diff --git a/src/audio/eq_fir.c b/src/audio/eq_fir.c index 2dfa11c..9628d13 100644 --- a/src/audio/eq_fir.c +++ b/src/audio/eq_fir.c @@ -260,7 +260,7 @@ static struct comp_dev *eq_fir_new(struct sof_ipc_comp *comp) return NULL; eq_fir = (struct sof_ipc_comp_eq_fir *) &dev->comp; - memcpy(eq_fir, ipc_eq_fir, sizeof(struct sof_ipc_comp_eq_fir)); + memcpy((void *)eq_fir, ipc_eq_fir, sizeof(struct sof_ipc_comp_eq_fir)); cd = rzalloc(RZONE_RUNTIME, RFLAGS_NONE, sizeof(*cd)); if (cd == NULL) { diff --git a/src/audio/eq_iir.c b/src/audio/eq_iir.c index eb464af..3742e7a 100644 --- a/src/audio/eq_iir.c +++ b/src/audio/eq_iir.c @@ -261,7 +261,7 @@ static struct comp_dev *eq_iir_new(struct sof_ipc_comp *comp) if (dev == NULL) return NULL; - memcpy(&dev->comp, comp, sizeof(struct sof_ipc_comp_eq_iir)); + memcpy((void *)&dev->comp, comp, sizeof(struct sof_ipc_comp_eq_iir)); cd = rzalloc(RZONE_RUNTIME, RFLAGS_NONE, sizeof(*cd)); if (cd == NULL) { diff --git a/src/audio/host.c b/src/audio/host.c index b3c3c83..30b2d8c 100644 --- a/src/audio/host.c +++ b/src/audio/host.c @@ -242,7 +242,7 @@ static struct comp_dev *host_new(struct sof_ipc_comp *comp) return NULL; host = (struct sof_ipc_comp_host *)&dev->comp; - memcpy(host, ipc_host, sizeof(struct sof_ipc_comp_host)); + memcpy((void *)host, ipc_host, sizeof(struct sof_ipc_comp_host)); hd = rzalloc(RZONE_RUNTIME, RFLAGS_NONE, sizeof(*hd)); if (hd == NULL) { diff --git a/src/audio/mixer.c b/src/audio/mixer.c index e3611d4..26e94d8 100644 --- a/src/audio/mixer.c +++ b/src/audio/mixer.c @@ -93,7 +93,7 @@ static struct comp_dev *mixer_new(struct sof_ipc_comp *comp) return NULL; mixer = (struct sof_ipc_comp_mixer *)&dev->comp; - memcpy(mixer, ipc_mixer, sizeof(struct sof_ipc_comp_mixer)); + memcpy((void *)mixer, ipc_mixer, sizeof(struct sof_ipc_comp_mixer)); md = rzalloc(RZONE_RUNTIME, RFLAGS_NONE, sizeof(*md)); if (md == NULL) { diff --git a/src/audio/src.c b/src/audio/src.c index d494d96..55fa2f8 100644 --- a/src/audio/src.c +++ b/src/audio/src.c @@ -280,7 +280,7 @@ static struct comp_dev *src_new(struct sof_ipc_comp *comp) return NULL; src = (struct sof_ipc_comp_src *) &dev->comp; - memcpy(src, ipc_src, sizeof(struct sof_ipc_comp_src)); + memcpy((void *)src, ipc_src, sizeof(struct sof_ipc_comp_src)); cd = rzalloc(RZONE_RUNTIME, RFLAGS_NONE, sizeof(*cd)); if (cd == NULL) { diff --git a/src/audio/tone.c b/src/audio/tone.c index 581f87e..da8af5e 100644 --- a/src/audio/tone.c +++ b/src/audio/tone.c @@ -411,7 +411,7 @@ static struct comp_dev *tone_new(struct sof_ipc_comp *comp) return NULL; tone = (struct sof_ipc_comp_tone *) &dev->comp; - memcpy(tone, ipc_tone, sizeof(struct sof_ipc_comp_tone)); + memcpy((void *)tone, ipc_tone, sizeof(struct sof_ipc_comp_tone)); cd = rzalloc(RZONE_RUNTIME, RFLAGS_NONE, sizeof(*cd)); if (cd == NULL) { diff --git a/src/audio/volume.c b/src/audio/volume.c index 3b3e2aa..f289226 100644 --- a/src/audio/volume.c +++ b/src/audio/volume.c @@ -370,7 +370,7 @@ static struct comp_dev *volume_new(struct sof_ipc_comp *comp) return NULL; vol = (struct sof_ipc_comp_volume *)&dev->comp; - memcpy(vol, ipc_vol, sizeof(struct sof_ipc_comp_volume)); + memcpy((void *)vol, ipc_vol, sizeof(struct sof_ipc_comp_volume)); cd = rzalloc(RZONE_RUNTIME, RFLAGS_NONE, sizeof(*cd)); if (cd == NULL) { -- 2.7.4

1 0

[Sound-open-firmware] [PATCH] apollolake: probe all valid SSP ports at platform init
by Keyon Jie 29 Jan '18

29 Jan '18

Add macro for apollolake valid SSP ports, and probe all of them at platform init. Signed-off-by: Keyon Jie <yang.jie(a)linux.intel.com> --- Tested on GP-MRB, SOF Master: f7beb51118e6e8463a864b9416c773a508930e06, SOF Tool Master: 59d81995f682876bd34f939332e8838c76f714ec, https://github.com/plbossart/sound/tree/topic/sof-v4.14: 5a91e6776d41b0e97828882294cdc00b5c0bafd6 src/platform/apollolake/include/platform/platform.h | 2 ++ src/platform/apollolake/platform.c | 14 +++++++++----- 2 files changed, 11 insertions(+), 5 deletions(-) diff --git a/src/platform/apollolake/include/platform/platform.h b/src/platform/apollolake/include/platform/platform.h index 4165b95..f7c83e8 100644 --- a/src/platform/apollolake/include/platform/platform.h +++ b/src/platform/apollolake/include/platform/platform.h @@ -38,6 +38,8 @@ struct reef; +#define PLATFORM_SSP_COUNT 6 + /* Host page size */ #define HOST_PAGE_SIZE 4096 #define PLATFORM_PAGE_TABLE_SIZE 256 diff --git a/src/platform/apollolake/platform.c b/src/platform/apollolake/platform.c index bb44634..608695a 100644 --- a/src/platform/apollolake/platform.c +++ b/src/platform/apollolake/platform.c @@ -178,7 +178,8 @@ int platform_init(struct reef *reef) { struct dma *dmac0; struct dma *dmac1; - struct dai *ssp2; + struct dai *ssp; + int i; platform_interrupt_init(); @@ -244,9 +245,12 @@ int platform_init(struct reef *reef) /* init SSP ports */ trace_point(TRACE_BOOT_PLATFORM_SSP); - ssp2 = dai_get(SOF_DAI_INTEL_SSP, 4); - if (ssp2 == NULL) - return -ENODEV; - dai_probe(ssp2); + for (i = 0; i < PLATFORM_SSP_COUNT; i++) { + ssp = dai_get(SOF_DAI_INTEL_SSP, i); + if (!ssp) + return -ENODEV; + dai_probe(ssp); + } + return 0; } -- 2.11.0

1 0

[Sound-open-firmware] [PATCH] dw-dma: fix hardware link list mode
by Keyon Jie 29 Jan '18

29 Jan '18

For hardware link list mode, we also need to configure address and config registers for the first link list, here fix it. Signed-off-by: Keyon Jie <yang.jie(a)linux.intel.com> --- Tested on minnow turbot rt5651, SOF Master: f7beb51118e6e8463a864b9416c773a508930e06, SOF Tool Master: 59d81995f682876bd34f939332e8838c76f714ec, https://github.com/plbossart/sound/tree/topic/sof-v4.14: 5a91e6776d41b0e97828882294cdc00b5c0bafd6 src/audio/dai.c | 3 ++- src/drivers/dw-dma.c | 43 +++++++++++++++++-------------------------- 2 files changed, 19 insertions(+), 27 deletions(-) diff --git a/src/audio/dai.c b/src/audio/dai.c index d19e18a..3a6b9f7 100644 --- a/src/audio/dai.c +++ b/src/audio/dai.c @@ -226,7 +226,8 @@ static struct comp_dev *dai_new(struct sof_ipc_comp *comp) } /* set up callback */ - dma_set_cb(dd->dma, dd->chan, DMA_IRQ_TYPE_LLIST, dai_dma_cb, dev); + dma_set_cb(dd->dma, dd->chan, DMA_IRQ_TYPE_BLOCK | + DMA_IRQ_TYPE_LLIST, dai_dma_cb, dev); dev->state = COMP_STATE_READY; return dev; diff --git a/src/drivers/dw-dma.c b/src/drivers/dw-dma.c index 8248461..09e441c 100644 --- a/src/drivers/dw-dma.c +++ b/src/drivers/dw-dma.c @@ -396,22 +396,11 @@ static int dw_dma_start(struct dma *dma, int channel) #if DW_USE_HW_LLI /* TODO: Revisit: are we using LLP mode or single transfer ? */ - if (p->chan[channel].lli->llp) { - /* LLP mode - only write LLP pointer */ + if (p->chan[channel].lli) { + /* LLP mode - write LLP pointer */ dw_write(dma, DW_LLP(channel), (uint32_t)p->chan[channel].lli); - } else { - /* single transfer */ - dw_write(dma, DW_LLP(channel), 0); - - /* channel needs started from scratch, so write SARn, DARn */ - dw_write(dma, DW_SAR(channel), p->chan[channel].lli->sar); - dw_write(dma, DW_DAR(channel), p->chan[channel].lli->dar); - - /* program CTLn */ - dw_write(dma, DW_CTRL_LOW(channel), p->chan[channel].lli->ctrl_lo); - dw_write(dma, DW_CTRL_HIGH(channel), p->chan[channel].lli->ctrl_hi); } -#else +#endif /* channel needs started from scratch, so write SARn, DARn */ dw_write(dma, DW_SAR(channel), p->chan[channel].lli->sar); dw_write(dma, DW_DAR(channel), p->chan[channel].lli->dar); @@ -419,7 +408,6 @@ static int dw_dma_start(struct dma *dma, int channel) /* program CTLn */ dw_write(dma, DW_CTRL_LOW(channel), p->chan[channel].lli->ctrl_lo); dw_write(dma, DW_CTRL_HIGH(channel), p->chan[channel].lli->ctrl_hi); -#endif /* write channel config */ dw_write(dma, DW_CFG_LOW(channel), p->chan[channel].cfg_lo); @@ -829,6 +817,7 @@ static void dw_dma_irq_handler(void *data) struct dma_sg_elem next; uint32_t status_tfr = 0; uint32_t status_block = 0; + uint32_t status_block_new = 0; uint32_t status_err = 0; uint32_t status_intr; uint32_t mask; @@ -861,10 +850,10 @@ static void dw_dma_irq_handler(void *data) platform_interrupt_clear(dma_irq(dma), pmask); /* confirm IRQ cleared */ - status_block = dw_read(dma, DW_STATUS_BLOCK); - if (status_block) { + status_block_new = dw_read(dma, DW_STATUS_BLOCK); + if (status_block_new) { trace_dma_error("eI2"); - trace_value(status_block); + trace_value(status_block_new); } for (i = 0; i < DW_MAX_CHAN; i++) { @@ -875,6 +864,16 @@ static void dw_dma_irq_handler(void *data) mask = 0x1 << i; +#if DW_USE_HW_LLI + /* end of a LLI block */ + if (status_block & mask && + p->chan[i].cb_type & DMA_IRQ_TYPE_BLOCK) { + next.src = next.dest = DMA_RELOAD_LLI; + next.size = DMA_RELOAD_LLI; + p->chan[i].cb(p->chan[i].cb_data, + DMA_IRQ_TYPE_BLOCK, &next); + } +#endif /* end of a transfer */ if ((status_tfr & mask) && (p->chan[i].cb_type & DMA_IRQ_TYPE_LLIST)) { @@ -904,14 +903,6 @@ static void dw_dma_irq_handler(void *data) break; } } -#if DW_USE_HW_LLI - /* end of a LLI block */ - if (status_block & mask && - p->chan[i].cb_type & DMA_IRQ_TYPE_BLOCK) { - p->chan[i].cb(p->chan[i].cb_data, - DMA_IRQ_TYPE_BLOCK); - } -#endif } } -- 2.11.0

2 2

[Sound-open-firmware] [PATCH] dw-dma: add support for interrupt per channel
by Keyon Jie 29 Jan '18

29 Jan '18

On Apollolake, the interrupt number for different channels of the same controller are different, here add implementation of it: register interrupt handler for each channel, and don't need check channel in its specific handler anymore. Signed-off-by: Keyon Jie <yang.jie(a)linux.intel.com> --- Tested on GP-MRB, SOF Master: f7beb51118e6e8463a864b9416c773a508930e06, SOF Tool Master: 59d81995f682876bd34f939332e8838c76f714ec, https://github.com/plbossart/sound/tree/topic/sof-v4.14: 5a91e6776d41b0e97828882294cdc00b5c0bafd6 src/drivers/dw-dma.c | 244 +++++++++++++++++++++++++++++++++++++------------ src/include/reef/dma.h | 6 ++ 2 files changed, 192 insertions(+), 58 deletions(-) diff --git a/src/drivers/dw-dma.c b/src/drivers/dw-dma.c index 09e441c..a0782cb 100644 --- a/src/drivers/dw-dma.c +++ b/src/drivers/dw-dma.c @@ -809,6 +809,191 @@ static inline void dw_dma_chan_reload_next(struct dma *dma, int channel, dw_write(dma, DW_DMA_CHAN_EN, CHAN_ENABLE(channel)); } +static void dw_dma_setup(struct dma *dma) +{ + struct dw_drv_plat_data *dp = dma->plat_data.drv_plat_data; + int i; + + /* we cannot config DMAC if DMAC has been already enabled by host */ + if (dw_read(dma, DW_DMA_CFG) != 0) + dw_write(dma, DW_DMA_CFG, 0x0); + + /* now check that it's 0 */ + for (i = DW_DMA_CFG_TRIES; i > 0; i--) { + if (dw_read(dma, DW_DMA_CFG) == 0) + goto found; + } + trace_dma_error("eDs"); + return; + +found: + for (i = 0; i < DW_MAX_CHAN; i++) + dw_read(dma, DW_DMA_CHAN_EN); + +#ifdef HAVE_HDDA + /* enable HDDA before DMAC */ + shim_write(SHIM_HMDC, SHIM_HMDC_HDDA_ALLCH); +#endif + + /* enable the DMA controller */ + dw_write(dma, DW_DMA_CFG, 1); + + /* mask all interrupts for all 8 channels */ + dw_write(dma, DW_MASK_TFR, INT_MASK_ALL); + dw_write(dma, DW_MASK_BLOCK, INT_MASK_ALL); + dw_write(dma, DW_MASK_SRC_TRAN, INT_MASK_ALL); + dw_write(dma, DW_MASK_DST_TRAN, INT_MASK_ALL); + dw_write(dma, DW_MASK_ERR, INT_MASK_ALL); + +#ifdef DW_FIFO_PARTITION + /* TODO: we cannot config DMA FIFOs if DMAC has been already */ + /* allocate FIFO partitions, 128 bytes for each ch */ + dw_write(dma, DW_FIFO_PART1_LO, 0x100080); + dw_write(dma, DW_FIFO_PART1_HI, 0x100080); + dw_write(dma, DW_FIFO_PART0_HI, 0x100080); + dw_write(dma, DW_FIFO_PART0_LO, 0x100080 | (1 << 26)); + dw_write(dma, DW_FIFO_PART0_LO, 0x100080); +#endif + + /* set channel priorities */ + for (i = 0; i < DW_MAX_CHAN; i++) { +#if defined CONFIG_BAYTRAIL || defined CONFIG_CHERRYTRAIL ||\ + defined CONFIG_APOLLOLAKE || defined CONFIG_CANNONLAKE + dw_write(dma, DW_CTRL_HIGH(i), + DW_CTLH_CLASS(dp->chan[i].class)); +#elif defined CONFIG_BROADWELL || defined CONFIG_HASWELL + dw_write(dma, DW_CFG_LOW(i), + DW_CFG_CLASS(dp->chan[i].class)); +#endif + } +} + +#ifdef CONFIG_APOLLOLAKE +/* external layer 2 interrupt for dmac */ +static void dw_dma_irq_handler(void *data) +{ + struct dma_int *dma_int = (struct dma_int *)data; + struct dma *dma = dma_int->dma; + struct dma_pdata *p = dma_get_drvdata(dma); + struct dma_sg_elem next; + uint32_t status_tfr = 0, status_block = 0, status_err = 0, status_intr; + uint32_t mask; + int i = dma_int->channel; + + status_intr = dw_read(dma, DW_INTR_STATUS); + if (!status_intr) + trace_dma_error("eDI"); + + trace_dma("irq"); + trace_value(status_intr); + + /* get the source of our IRQ. */ + status_block = dw_read(dma, DW_STATUS_BLOCK); + status_tfr = dw_read(dma, DW_STATUS_TFR); + + /* TODO: handle errors, just clear them atm */ + status_err = dw_read(dma, DW_STATUS_ERR); + if (status_err) { + trace_dma_error("eDi"); + dw_write(dma, DW_CLEAR_ERR, status_err & i); + } + + /* clear interrupts for channel*/ + dw_write(dma, DW_CLEAR_BLOCK, status_block); + dw_write(dma, DW_CLEAR_TFR, status_tfr); + + /* skip if channel is not running */ + if (p->chan[i].status != COMP_STATE_ACTIVE) { + trace_dma_error("eDs"); + return; + } + + mask = 0x1 << i; + +#if DW_USE_HW_LLI + /* end of a LLI block */ + if (status_block & mask && + p->chan[i].cb_type & DMA_IRQ_TYPE_BLOCK) { + next.src = next.dest = DMA_RELOAD_LLI; + /* will reload lli by default */ + next.size = DMA_RELOAD_LLI; + p->chan[i].cb(p->chan[i].cb_data, + DMA_IRQ_TYPE_BLOCK, &next); + } +#endif + /* end of a transfer */ + if ((status_tfr & mask) && + (p->chan[i].cb_type & DMA_IRQ_TYPE_LLIST)) { + trace_value(status_tfr); + + next.src = next.dest = DMA_RELOAD_LLI; + next.size = DMA_RELOAD_LLI; /* will reload lli by default */ + if (p->chan[i].cb) + p->chan[i].cb(p->chan[i].cb_data, + DMA_IRQ_TYPE_LLIST, &next); + + /* check for reload channel: + * next.size is DMA_RELOAD_END, stop this dma copy; + * next.size > 0 but not DMA_RELOAD_LLI, use next + * element for next copy; + * if we are waiting for pause, pause it; + * otherwise, reload lli + */ + switch (next.size) { + case DMA_RELOAD_END: + p->chan[i].status = COMP_STATE_PREPARE; + break; + case DMA_RELOAD_LLI: + /* reload lli, but let's check if it is paused */ + if (p->chan[i].status != COMP_STATE_PAUSED) + dw_dma_chan_reload_lli(dma, i); + break; + default: + dw_dma_chan_reload_next(dma, i, &next); + break; + } + } +} + +static int dw_dma_probe(struct dma *dma) +{ + struct dma_int *dma_int[DW_MAX_CHAN]; + struct dma_pdata *dw_pdata; + int i; + + /* allocate private data */ + dw_pdata = rzalloc(RZONE_SYS, RFLAGS_NONE, sizeof(*dw_pdata)); + dma_set_drvdata(dma, dw_pdata); + + spinlock_init(&dma->lock); + + dw_dma_setup(dma); + + /* init work */ + for (i = 0; i < dma->plat_data.channels; i++) { + dw_pdata->chan[i].dma = dma; + dw_pdata->chan[i].channel = i; + dw_pdata->chan[i].status = COMP_STATE_INIT; + + dma_int[i] = rzalloc(RZONE_SYS, RFLAGS_NONE, + sizeof(struct dma_int)); + + dma_int[i]->dma = dma; + dma_int[i]->channel = i; + dma_int[i]->irq = dma->plat_data.irq + + (i << REEF_IRQ_BIT_SHIFT); + + /* register our IRQ handler */ + interrupt_register(dma_int[i]->irq, + dw_dma_irq_handler, dma_int[i]); + interrupt_enable(dma_int[i]->irq); + } + + return 0; +} + +#else + /* this will probably be called at the end of every period copied */ static void dw_dma_irq_handler(void *data) { @@ -906,64 +1091,6 @@ static void dw_dma_irq_handler(void *data) } } -static void dw_dma_setup(struct dma *dma) -{ - struct dw_drv_plat_data *dp = dma->plat_data.drv_plat_data; - int i; - - /* we cannot config DMAC if DMAC has been already enabled by host */ - if (dw_read(dma, DW_DMA_CFG) != 0) - dw_write(dma, DW_DMA_CFG, 0x0); - - /* now check that it's 0 */ - for (i = DW_DMA_CFG_TRIES; i > 0; i--) { - if (dw_read(dma, DW_DMA_CFG) == 0) - goto found; - } - trace_dma_error("eDs"); - return; - -found: - for (i = 0; i < DW_MAX_CHAN; i++) - dw_read(dma, DW_DMA_CHAN_EN); - -#ifdef HAVE_HDDA - /* enable HDDA before DMAC */ - shim_write(SHIM_HMDC, SHIM_HMDC_HDDA_ALLCH); -#endif - - /* enable the DMA controller */ - dw_write(dma, DW_DMA_CFG, 1); - - /* mask all interrupts for all 8 channels */ - dw_write(dma, DW_MASK_TFR, INT_MASK_ALL); - dw_write(dma, DW_MASK_BLOCK, INT_MASK_ALL); - dw_write(dma, DW_MASK_SRC_TRAN, INT_MASK_ALL); - dw_write(dma, DW_MASK_DST_TRAN, INT_MASK_ALL); - dw_write(dma, DW_MASK_ERR, INT_MASK_ALL); - -#ifdef DW_FIFO_PARTITION - /* TODO: we cannot config DMA FIFOs if DMAC has been already */ - /* allocate FIFO partitions, 128 bytes for each ch */ - dw_write(dma, DW_FIFO_PART1_LO, 0x100080); - dw_write(dma, DW_FIFO_PART1_HI, 0x100080); - dw_write(dma, DW_FIFO_PART0_HI, 0x100080); - dw_write(dma, DW_FIFO_PART0_LO, 0x100080 | (1 << 26)); - dw_write(dma, DW_FIFO_PART0_LO, 0x100080); -#endif - - /* set channel priorities */ - for (i = 0; i < DW_MAX_CHAN; i++) { -#if defined CONFIG_BAYTRAIL || defined CONFIG_CHERRYTRAIL \ - || defined CONFIG_APOLLOLAKE || defined CONFIG_CANNONLAKE - dw_write(dma, DW_CTRL_HIGH(i), DW_CTLH_CLASS(dp->chan[i].class)); -#else - dw_write(dma, DW_CFG_LOW(i), DW_CFG_CLASS(dp->chan[i].class)); -#endif - } - -} - static int dw_dma_probe(struct dma *dma) { struct dma_pdata *dw_pdata; @@ -990,6 +1117,7 @@ static int dw_dma_probe(struct dma *dma) return 0; } +#endif const struct dma_ops dw_dma_ops = { .channel_get = dw_dma_channel_get, diff --git a/src/include/reef/dma.h b/src/include/reef/dma.h index e33adaa..77f8f71 100644 --- a/src/include/reef/dma.h +++ b/src/include/reef/dma.h @@ -128,6 +128,12 @@ struct dma { void *private; }; +struct dma_int { + struct dma *dma; + uint32_t channel; + uint32_t irq; +}; + struct dma *dma_get(int dmac_id); #define dma_set_drvdata(dma, data) \ -- 2.11.0

2 2