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[Sound-open-firmware] [PATCH] topology: modify tlv data to match volume range supported by firmware
by Ranjani Sridharan 23 Mar '18

23 Mar '18

This patch modifies the tlv data for volume controls to match the volume range supported in the firmware. Signed-off-by: Ranjani Sridharan <ranjani.sridharan(a)linux.intel.com> --- Tested on Minnowboard Turbot w/ RT5651 SOF master:1.1-stable SOF Tool master: https://github.com/ranj063/soft.git branch: volume-tlv Kernel: https://github.com/ranj063/sound.git branch: volume-tlv --- --- topology/common/tlv.m4 | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/topology/common/tlv.m4 b/topology/common/tlv.m4 index e591fa8..f1a9eff 100644 --- a/topology/common/tlv.m4 +++ b/topology/common/tlv.m4 @@ -4,11 +4,11 @@ # SectionTLV."vtlv_m90s3" { - Comment "-90dB step 3dB" + Comment "-64dB step 2dB" scale { - min "-9000" - step "300" + min "-6400" + step "200" mute "1" } } -- 2.14.1

2 1

[Sound-open-firmware] [PATCH] volume: Add support for 4 channel input
by Ranjani Sridharan 23 Mar '18

23 Mar '18

This patch adds support for 4 channel input in volume Signed-off-by: Ranjani Sridharan <ranjani.sridharan(a)linux.intel.com> --- src/audio/volume.c | 311 ++++++++++++++++++++++++++++++++++++++++++++++++----- 1 file changed, 284 insertions(+), 27 deletions(-) diff --git a/src/audio/volume.c b/src/audio/volume.c index 0620e18..df926c5 100644 --- a/src/audio/volume.c +++ b/src/audio/volume.c @@ -91,9 +91,11 @@ struct comp_func_map { struct comp_buffer *source, uint32_t frames); }; +/* volume scaling functions for stereo input */ + /* copy and scale volume from 16 bit source buffer to 32 bit dest buffer */ -static void vol_s16_to_s32(struct comp_dev *dev, struct comp_buffer *sink, - struct comp_buffer *source, uint32_t frames) +static void vol_s16_to_s32_2ch(struct comp_dev *dev, struct comp_buffer *sink, + struct comp_buffer *source, uint32_t frames) { struct comp_data *cd = comp_get_drvdata(dev); int16_t *src = (int16_t *) source->r_ptr; @@ -109,8 +111,8 @@ static void vol_s16_to_s32(struct comp_dev *dev, struct comp_buffer *sink, } /* copy and scale volume from 32 bit source buffer to 16 bit dest buffer */ -static void vol_s32_to_s16(struct comp_dev *dev, struct comp_buffer *sink, - struct comp_buffer *source, uint32_t frames) +static void vol_s32_to_s16_2ch(struct comp_dev *dev, struct comp_buffer *sink, + struct comp_buffer *source, uint32_t frames) { struct comp_data *cd = comp_get_drvdata(dev); int32_t *src = (int32_t *) source->r_ptr; @@ -128,8 +130,8 @@ static void vol_s32_to_s16(struct comp_dev *dev, struct comp_buffer *sink, } /* copy and scale volume from 32 bit source buffer to 32 bit dest buffer */ -static void vol_s32_to_s32(struct comp_dev *dev, struct comp_buffer *sink, - struct comp_buffer *source, uint32_t frames) +static void vol_s32_to_s32_2ch(struct comp_dev *dev, struct comp_buffer *sink, + struct comp_buffer *source, uint32_t frames) { struct comp_data *cd = comp_get_drvdata(dev); int32_t *src = (int32_t *) source->r_ptr; @@ -147,8 +149,8 @@ static void vol_s32_to_s32(struct comp_dev *dev, struct comp_buffer *sink, } /* copy and scale volume from 16 bit source buffer to 16 bit dest buffer */ -static void vol_s16_to_s16(struct comp_dev *dev, struct comp_buffer *sink, - struct comp_buffer *source, uint32_t frames) +static void vol_s16_to_s16_2ch(struct comp_dev *dev, struct comp_buffer *sink, + struct comp_buffer *source, uint32_t frames) { struct comp_data *cd = comp_get_drvdata(dev); int16_t *src = (int16_t *) source->r_ptr; @@ -166,8 +168,8 @@ static void vol_s16_to_s16(struct comp_dev *dev, struct comp_buffer *sink, } /* copy and scale volume from 16 bit source buffer to 24 bit on 32 bit boundary dest buffer */ -static void vol_s16_to_s24(struct comp_dev *dev, struct comp_buffer *sink, - struct comp_buffer *source, uint32_t frames) +static void vol_s16_to_s24_2ch(struct comp_dev *dev, struct comp_buffer *sink, + struct comp_buffer *source, uint32_t frames) { struct comp_data *cd = comp_get_drvdata(dev); int16_t *src = (int16_t *) source->r_ptr; @@ -185,8 +187,8 @@ static void vol_s16_to_s24(struct comp_dev *dev, struct comp_buffer *sink, } /* copy and scale volume from 16 bit source buffer to 24 bit on 32 bit boundary dest buffer */ -static void vol_s24_to_s16(struct comp_dev *dev, struct comp_buffer *sink, - struct comp_buffer *source, uint32_t frames) +static void vol_s24_to_s16_2ch(struct comp_dev *dev, struct comp_buffer *sink, + struct comp_buffer *source, uint32_t frames) { struct comp_data *cd = comp_get_drvdata(dev); int32_t *src = (int32_t *) source->r_ptr; @@ -206,8 +208,8 @@ static void vol_s24_to_s16(struct comp_dev *dev, struct comp_buffer *sink, } /* copy and scale volume from 32 bit source buffer to 24 bit on 32 bit boundary dest buffer */ -static void vol_s32_to_s24(struct comp_dev *dev, struct comp_buffer *sink, - struct comp_buffer *source, uint32_t frames) +static void vol_s32_to_s24_2ch(struct comp_dev *dev, struct comp_buffer *sink, + struct comp_buffer *source, uint32_t frames) { struct comp_data *cd = comp_get_drvdata(dev); int32_t *src = (int32_t *) source->r_ptr; @@ -225,8 +227,8 @@ static void vol_s32_to_s24(struct comp_dev *dev, struct comp_buffer *sink, } /* copy and scale volume from 16 bit source buffer to 24 bit on 32 bit boundary dest buffer */ -static void vol_s24_to_s32(struct comp_dev *dev, struct comp_buffer *sink, - struct comp_buffer *source, uint32_t frames) +static void vol_s24_to_s32_2ch(struct comp_dev *dev, struct comp_buffer *sink, + struct comp_buffer *source, uint32_t frames) { struct comp_data *cd = comp_get_drvdata(dev); int32_t *src = (int32_t *) source->r_ptr; @@ -248,8 +250,8 @@ static void vol_s24_to_s32(struct comp_dev *dev, struct comp_buffer *sink, /* Copy and scale volume from 24 bit source buffer to 24 bit on 32 bit boundary * dest buffer. */ -static void vol_s24_to_s24(struct comp_dev *dev, struct comp_buffer *sink, - struct comp_buffer *source, uint32_t frames) +static void vol_s24_to_s24_2ch(struct comp_dev *dev, struct comp_buffer *sink, + struct comp_buffer *source, uint32_t frames) { struct comp_data *cd = comp_get_drvdata(dev); int32_t i, *src = (int32_t*) source->r_ptr; @@ -267,17 +269,272 @@ static void vol_s24_to_s24(struct comp_dev *dev, struct comp_buffer *sink, } } +/* volume scaling functions for 4-channel input */ + +/* copy and scale volume from 16 bit source buffer to 32 bit dest buffer */ +static void vol_s16_to_s32_4ch(struct comp_dev *dev, struct comp_buffer *sink, + struct comp_buffer *source, uint32_t frames) +{ + struct comp_data *cd = comp_get_drvdata(dev); + int16_t *src = (int16_t *)source->r_ptr; + int32_t *dest = (int32_t *)sink->w_ptr; + int32_t i; + + /* buffer sizes are always divisible by period frames */ + /* Samples are Q1.15 --> Q1.31 and volume is Q1.16 */ + for (i = 0; i < frames * 4; i += 4) { + dest[i] = (int32_t)src[i] * cd->volume[0]; + dest[i + 1] = (int32_t)src[i + 1] * cd->volume[1]; + dest[i + 2] = (int32_t)src[i + 2] * cd->volume[2]; + dest[i + 3] = (int32_t)src[i + 3] * cd->volume[3]; + } +} + +/* copy and scale volume from 32 bit source buffer to 16 bit dest buffer */ +static void vol_s32_to_s16_4ch(struct comp_dev *dev, struct comp_buffer *sink, + struct comp_buffer *source, uint32_t frames) +{ + struct comp_data *cd = comp_get_drvdata(dev); + int32_t *src = (int32_t *)source->r_ptr; + int16_t *dest = (int16_t *)sink->w_ptr; + int32_t i; + + /* buffer sizes are always divisible by period frames */ + /* Samples are Q1.31 --> Q1.15 and volume is Q1.16 */ + for (i = 0; i < frames * 4; i += 4) { + dest[i] = (int16_t)q_multsr_sat_32x32(src[i], cd->volume[0], + Q_SHIFT_BITS_64(31, 16, + 15)); + dest[i + 1] = (int16_t)q_multsr_sat_32x32(src[i + 1], + cd->volume[1], + Q_SHIFT_BITS_64(31, + 16, + 15)); + dest[i + 2] = (int16_t)q_multsr_sat_32x32(src[i + 2], + cd->volume[2], + Q_SHIFT_BITS_64(31, + 16, + 15)); + dest[i + 3] = (int16_t)q_multsr_sat_32x32(src[i + 3], + cd->volume[3], + Q_SHIFT_BITS_64(31, + 16, + 15)); + } +} + +/* copy and scale volume from 32 bit source buffer to 32 bit dest buffer */ +static void vol_s32_to_s32_4ch(struct comp_dev *dev, struct comp_buffer *sink, + struct comp_buffer *source, uint32_t frames) +{ + struct comp_data *cd = comp_get_drvdata(dev); + int32_t *src = (int32_t *)source->r_ptr; + int32_t *dest = (int32_t *)sink->w_ptr; + int32_t i; + + /* buffer sizes are always divisible by period frames */ + /* Samples are Q1.31 --> Q1.31 and volume is Q1.16 */ + for (i = 0; i < frames * 4; i += 4) { + dest[i] = q_multsr_sat_32x32(src[i], cd->volume[0], + Q_SHIFT_BITS_64(31, 16, 31)); + dest[i + 1] = q_multsr_sat_32x32(src[i + 1], cd->volume[1], + Q_SHIFT_BITS_64(31, 16, 31)); + dest[i + 2] = q_multsr_sat_32x32(src[i + 2], cd->volume[2], + Q_SHIFT_BITS_64(31, 16, 31)); + dest[i + 3] = q_multsr_sat_32x32(src[i + 3], cd->volume[3], + Q_SHIFT_BITS_64(31, 16, 31)); + } +} + +/* copy and scale volume from 16 bit source buffer to 16 bit dest buffer */ +static void vol_s16_to_s16_4ch(struct comp_dev *dev, struct comp_buffer *sink, + struct comp_buffer *source, uint32_t frames) +{ + struct comp_data *cd = comp_get_drvdata(dev); + int16_t *src = (int16_t *)source->r_ptr; + int16_t *dest = (int16_t *)sink->w_ptr; + int32_t i; + + /* buffer sizes are always divisible by period frames */ + /* Samples are Q1.15 --> Q1.15 and volume is Q1.16 */ + for (i = 0; i < frames * 4; i += 4) { + dest[i] = q_multsr_sat_16x16(src[i], cd->volume[0], + Q_SHIFT_BITS_32(15, 16, 15)); + dest[i + 1] = q_multsr_sat_16x16(src[i + 1], cd->volume[1], + Q_SHIFT_BITS_32(15, 16, 15)); + dest[i + 2] = q_multsr_sat_16x16(src[i + 2], cd->volume[2], + Q_SHIFT_BITS_32(15, 16, 15)); + dest[i + 3] = q_multsr_sat_16x16(src[i + 3], cd->volume[3], + Q_SHIFT_BITS_32(15, 16, 15)); + } +} + +/* copy and scale volume from 16 bit source buffer to 24 bit + * on 32 bit boundary buffer + */ +static void vol_s16_to_s24_4ch(struct comp_dev *dev, struct comp_buffer *sink, + struct comp_buffer *source, uint32_t frames) +{ + struct comp_data *cd = comp_get_drvdata(dev); + int16_t *src = (int16_t *)source->r_ptr; + int32_t *dest = (int32_t *)sink->w_ptr; + int32_t i; + + /* buffer sizes are always divisible by period frames */ + /* Samples are Q1.15 and volume is Q1.16 */ + for (i = 0; i < frames * 4; i += 4) { + dest[i] = q_multsr_sat_32x32(src[i], cd->volume[0], + Q_SHIFT_BITS_64(15, 16, 23)); + dest[i + 1] = q_multsr_sat_32x32(src[i + 1], cd->volume[1], + Q_SHIFT_BITS_64(15, 16, 23)); + dest[i + 2] = q_multsr_sat_32x32(src[i + 2], cd->volume[2], + Q_SHIFT_BITS_64(15, 16, 23)); + dest[i + 3] = q_multsr_sat_32x32(src[i + 3], cd->volume[3], + Q_SHIFT_BITS_64(15, 16, 23)); + } +} + +/* copy and scale volume from 16 bit source buffer to 24 bit + * on 32 bit boundary dest buffer + */ +static void vol_s24_to_s16_4ch(struct comp_dev *dev, struct comp_buffer *sink, + struct comp_buffer *source, uint32_t frames) +{ + struct comp_data *cd = comp_get_drvdata(dev); + int32_t *src = (int32_t *)source->r_ptr; + int16_t *dest = (int16_t *)sink->w_ptr; + int32_t i, sample; + + /* buffer sizes are always divisible by period frames */ + /* Samples are Q1.23 --> Q1.15 and volume is Q1.16 */ + for (i = 0; i < frames * 4; i += 4) { + sample = sign_extend_s24(src[i]); + dest[i] = (int16_t)q_multsr_sat_32x32(sample, cd->volume[0], + Q_SHIFT_BITS_64(23, 16, + 15)); + sample = sign_extend_s24(src[i + 1]); + dest[i + 1] = (int16_t)q_multsr_sat_32x32(sample, + cd->volume[1], + Q_SHIFT_BITS_64(23, + 16, + 15)); + sample = sign_extend_s24(src[i + 2]); + dest[i + 2] = (int16_t)q_multsr_sat_32x32(sample, + cd->volume[2], + Q_SHIFT_BITS_64(23, + 16, + 15)); + sample = sign_extend_s24(src[i + 3]); + dest[i + 3] = (int16_t)q_multsr_sat_32x32(sample, + cd->volume[3], + Q_SHIFT_BITS_64(23, + 16, + 15)); + } +} + +/* copy and scale volume from 32 bit source buffer to 24 bit + * on 32 bit boundary dest buffer + */ +static void vol_s32_to_s24_4ch(struct comp_dev *dev, struct comp_buffer *sink, + struct comp_buffer *source, uint32_t frames) +{ + struct comp_data *cd = comp_get_drvdata(dev); + int32_t *src = (int32_t *)source->r_ptr; + int32_t *dest = (int32_t *)sink->w_ptr; + int32_t i; + + /* buffer sizes are always divisible by period frames */ + /* Samples are Q1.31 --> Q1.23 and volume is Q1.16 */ + for (i = 0; i < frames * 4; i += 4) { + dest[i] = q_multsr_sat_32x32(src[i], cd->volume[0], + Q_SHIFT_BITS_64(31, 16, 23)); + dest[i + 1] = q_multsr_sat_32x32(src[i + 1], cd->volume[1], + Q_SHIFT_BITS_64(31, 16, 23)); + dest[i + 2] = q_multsr_sat_32x32(src[i + 2], cd->volume[2], + Q_SHIFT_BITS_64(31, 16, 23)); + dest[i + 3] = q_multsr_sat_32x32(src[i + 3], cd->volume[3], + Q_SHIFT_BITS_64(31, 16, 23)); + } +} + +/* copy and scale volume from 16 bit source buffer to 24 bit + * on 32 bit boundary dest buffer + */ +static void vol_s24_to_s32_4ch(struct comp_dev *dev, struct comp_buffer *sink, + struct comp_buffer *source, uint32_t frames) +{ + struct comp_data *cd = comp_get_drvdata(dev); + int32_t *src = (int32_t *)source->r_ptr; + int32_t *dest = (int32_t *)sink->w_ptr; + int32_t i; + + /* buffer sizes are always divisible by period frames */ + /* Samples are Q1.23 --> Q1.31 and volume is Q1.16 */ + for (i = 0; i < frames * 4; i += 4) { + dest[i] = q_multsr_sat_32x32(sign_extend_s24(src[i]), + cd->volume[0], + Q_SHIFT_BITS_64(23, 16, 31)); + dest[i + 1] = q_multsr_sat_32x32(sign_extend_s24(src[i + 1]), + cd->volume[1], + Q_SHIFT_BITS_64(23, 16, 31)); + dest[i + 2] = q_multsr_sat_32x32(sign_extend_s24(src[i + 2]), + cd->volume[2], + Q_SHIFT_BITS_64(23, 16, 31)); + dest[i + 3] = q_multsr_sat_32x32(sign_extend_s24(src[i + 3]), + cd->volume[3], + Q_SHIFT_BITS_64(23, 16, 31)); + } +} + +/* Copy and scale volume from 24 bit source buffer to 24 bit on 32 bit boundary + * dest buffer. + */ +static void vol_s24_to_s24_4ch(struct comp_dev *dev, struct comp_buffer *sink, + struct comp_buffer *source, uint32_t frames) +{ + struct comp_data *cd = comp_get_drvdata(dev); + int32_t i, *src = (int32_t *)source->r_ptr; + int32_t *dest = (int32_t *)sink->w_ptr; + + /* buffer sizes are always divisible by period frames */ + /* Samples are Q1.23 --> Q1.23 and volume is Q1.16 */ + for (i = 0; i < frames * 4; i += 4) { + dest[i] = q_multsr_sat_32x32(sign_extend_s24(src[i]), + cd->volume[0], + Q_SHIFT_BITS_64(23, 16, 23)); + dest[i + 1] = q_multsr_sat_32x32(sign_extend_s24(src[i + 1]), + cd->volume[1], + Q_SHIFT_BITS_64(23, 16, 23)); + dest[i + 2] = q_multsr_sat_32x32(sign_extend_s24(src[i + 2]), + cd->volume[2], + Q_SHIFT_BITS_64(23, 16, 23)); + dest[i + 3] = q_multsr_sat_32x32(sign_extend_s24(src[i + 3]), + cd->volume[3], + Q_SHIFT_BITS_64(23, 16, 23)); + } +} + /* map of source and sink buffer formats to volume function */ static const struct comp_func_map func_map[] = { - {SOF_IPC_FRAME_S16_LE, SOF_IPC_FRAME_S16_LE, 2, vol_s16_to_s16}, - {SOF_IPC_FRAME_S16_LE, SOF_IPC_FRAME_S32_LE, 2, vol_s16_to_s32}, - {SOF_IPC_FRAME_S32_LE, SOF_IPC_FRAME_S16_LE, 2, vol_s32_to_s16}, - {SOF_IPC_FRAME_S32_LE, SOF_IPC_FRAME_S32_LE, 2, vol_s32_to_s32}, - {SOF_IPC_FRAME_S16_LE, SOF_IPC_FRAME_S24_4LE, 2, vol_s16_to_s24}, - {SOF_IPC_FRAME_S24_4LE, SOF_IPC_FRAME_S16_LE, 2, vol_s24_to_s16}, - {SOF_IPC_FRAME_S32_LE, SOF_IPC_FRAME_S24_4LE, 2, vol_s32_to_s24}, - {SOF_IPC_FRAME_S24_4LE, SOF_IPC_FRAME_S32_LE, 2, vol_s24_to_s32}, - {SOF_IPC_FRAME_S24_4LE, SOF_IPC_FRAME_S24_4LE, 2, vol_s24_to_s24}, + {SOF_IPC_FRAME_S16_LE, SOF_IPC_FRAME_S16_LE, 2, vol_s16_to_s16_2ch}, + {SOF_IPC_FRAME_S16_LE, SOF_IPC_FRAME_S32_LE, 2, vol_s16_to_s32_2ch}, + {SOF_IPC_FRAME_S32_LE, SOF_IPC_FRAME_S16_LE, 2, vol_s32_to_s16_2ch}, + {SOF_IPC_FRAME_S32_LE, SOF_IPC_FRAME_S32_LE, 2, vol_s32_to_s32_2ch}, + {SOF_IPC_FRAME_S16_LE, SOF_IPC_FRAME_S24_4LE, 2, vol_s16_to_s24_2ch}, + {SOF_IPC_FRAME_S24_4LE, SOF_IPC_FRAME_S16_LE, 2, vol_s24_to_s16_2ch}, + {SOF_IPC_FRAME_S32_LE, SOF_IPC_FRAME_S24_4LE, 2, vol_s32_to_s24_2ch}, + {SOF_IPC_FRAME_S24_4LE, SOF_IPC_FRAME_S32_LE, 2, vol_s24_to_s32_2ch}, + {SOF_IPC_FRAME_S24_4LE, SOF_IPC_FRAME_S24_4LE, 2, vol_s24_to_s24_2ch}, + {SOF_IPC_FRAME_S16_LE, SOF_IPC_FRAME_S16_LE, 4, vol_s16_to_s16_4ch}, + {SOF_IPC_FRAME_S16_LE, SOF_IPC_FRAME_S32_LE, 4, vol_s16_to_s32_4ch}, + {SOF_IPC_FRAME_S32_LE, SOF_IPC_FRAME_S16_LE, 4, vol_s32_to_s16_4ch}, + {SOF_IPC_FRAME_S32_LE, SOF_IPC_FRAME_S32_LE, 4, vol_s32_to_s32_4ch}, + {SOF_IPC_FRAME_S16_LE, SOF_IPC_FRAME_S24_4LE, 4, vol_s16_to_s24_4ch}, + {SOF_IPC_FRAME_S24_4LE, SOF_IPC_FRAME_S16_LE, 4, vol_s24_to_s16_4ch}, + {SOF_IPC_FRAME_S32_LE, SOF_IPC_FRAME_S24_4LE, 4, vol_s32_to_s24_4ch}, + {SOF_IPC_FRAME_S24_4LE, SOF_IPC_FRAME_S32_LE, 4, vol_s24_to_s32_4ch}, + {SOF_IPC_FRAME_S24_4LE, SOF_IPC_FRAME_S24_4LE, 4, vol_s24_to_s24_4ch}, }; /* synchronise host mmap() volume with real value */ -- 2.14.1

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[Sound-open-firmware] [PATCH] hsw: ipc: ipcx/ipcd are only used for doorbell
by Liam Girdwood 22 Mar '18

22 Mar '18

IPCX and IPCD are 32bit wide and should only be used for doorbell on HSW and BDW. Payload should be in mailbox. Signed-off-by: Liam Girdwood <liam.r.girdwood(a)linux.intel.com> --- src/ipc/hsw-ipc.c | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/src/ipc/hsw-ipc.c b/src/ipc/hsw-ipc.c index 5bfdf93a..489d6ef9 100644 --- a/src/ipc/hsw-ipc.c +++ b/src/ipc/hsw-ipc.c @@ -80,7 +80,7 @@ out: spin_unlock_irq(&_ipc->lock, flags); /* clear DONE bit - tell Host we have completed */ - shim_write(SHIM_IPCD, shim_read(SHIM_IPCD) & ~SHIM_IPCD_DONE); + shim_write(SHIM_IPCD, 0); /* unmask Done interrupt */ shim_write(SHIM_IMRD, shim_read(SHIM_IMRD) & ~SHIM_IMRD_DONE); @@ -123,7 +123,6 @@ void ipc_platform_do_cmd(struct ipc *ipc) { struct intel_ipc_data *iipc = ipc_get_drvdata(ipc); struct sof_ipc_reply reply; - uint32_t ipcx; int32_t err; tracev_ipc("Cmd"); @@ -146,10 +145,7 @@ done: ipc->host_pending = 0; /* clear BUSY bit and set DONE bit - accept new messages */ - ipcx = shim_read(SHIM_IPCX); - ipcx &= ~SHIM_IPCX_BUSY; - ipcx |= SHIM_IPCX_DONE; - shim_write(SHIM_IPCX, ipcx); + shim_write(SHIM_IPCX, SHIM_IPCX_DONE); /* unmask busy interrupt */ shim_write(SHIM_IMRD, shim_read(SHIM_IMRD) & ~SHIM_IMRD_BUSY); @@ -191,7 +187,7 @@ void ipc_platform_send_msg(struct ipc *ipc) tracev_ipc("Msg"); /* now interrupt host to tell it we have message sent */ - shim_write(SHIM_IPCD, msg->header | SHIM_IPCD_BUSY); + shim_write(SHIM_IPCD, SHIM_IPCD_BUSY); list_item_append(&msg->list, &ipc->empty_list); -- 2.14.1

1 0

[Sound-open-firmware] [PATCH 1/2] topology: utils: add get format name helper function
by Xiuli Pan 22 Mar '18

22 Mar '18

From: Pan Xiuli <xiuli.pan(a)linux.intel.com> We may need to get format name from some format short name. Signed-off-by: Pan Xiuli <xiuli.pan(a)linux.intel.com> --- Test with: Mininow max rt5651 and GP-MRB nocodec and CNL nocodec SOF 1.1-stable: 480407f4745a2edf9c51e3a14be7533970122f23 SOF-Tool 1.1-stable: 105c88febf1b974b9f03b02712dbc154eff5eb4d https://github.com/plbossart/sound/tree/topic/sof-v4.14: 95d77adbaadc44b28c8975a3714f70824d1a8529 --- topology/m4/utils.m4 | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/topology/m4/utils.m4 b/topology/m4/utils.m4 index e929244..ba87c8d 100644 --- a/topology/m4/utils.m4 +++ b/topology/m4/utils.m4 @@ -35,6 +35,15 @@ define(`COMP_SAMPLE_SIZE', $1, `float', `4', `4')') +dnl COMP_FORMAT_NAME(FMT) +define(`COMP_FORMAT_NAME', +`ifelse( + $1, `s16le', `S16_LE', + $1, `s24le', `S24_LE', + $1, `s32le', `S32_LE', + $1, `float', `FLOAT_LE', + )') + dnl P_GRAPH(name, CONNECTIONS) define(`P_GRAPH', `SectionGraph.STR($1) {' -- 2.7.4

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[Sound-open-firmware] [PATCH] topology: test: add more topologies for test
by Keqiao.Zhang 22 Mar '18

22 Mar '18

Signed-off-by: Keqiao.Zhang <keqiao.zhang(a)linux.intel.com> --- topology/test/tplg-build.sh | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/topology/test/tplg-build.sh b/topology/test/tplg-build.sh index b042909..5a6a8f5 100755 --- a/topology/test/tplg-build.sh +++ b/topology/test/tplg-build.sh @@ -90,16 +90,35 @@ simple_test nocodec volume "NoCodec" s16le 2 s24le 25 24 2400000 19200000 simple_test nocodec src "NoCodec" s24le 2 s24le 25 24 2400000 19200000 simple_test codec passthrough "SSP2-Codec" s16le 2 s16le 20 16 1920000 19200000 +simple_test codec passthrough "SSP2-Codec" s24le 2 s16le 20 16 1920000 19200000 +simple_test codec passthrough "SSP2-Codec" s16le 2 s24le 25 24 2400000 19200000 simple_test codec passthrough "SSP2-Codec" s24le 2 s24le 25 24 2400000 19200000 simple_test codec volume "SSP2-Codec" s16le 2 s16le 20 16 1920000 19200000 simple_test codec volume "SSP2-Codec" s24le 2 s24le 25 24 2400000 19200000 +simple_test codec volume "SSP2-Codec" s24le 2 s16le 20 16 1920000 19200000 simple_test codec volume "SSP2-Codec" s16le 2 s24le 25 24 2400000 19200000 simple_test codec src "SSP2-Codec" s24le 2 s24le 25 24 2400000 19200000 # for APL simple_test nocodec volume "NoCodec" s16le 4 s16le 16 16 1536000 24576000 +simple_test nocodec volume "NoCodec" s24le 4 s16le 16 16 1536000 24576000 +simple_test nocodec volume "NoCodec" s32le 4 s16le 16 16 1536000 24576000 +simple_test nocodec volume "NoCodec" s16le 4 s24le 32 24 3072000 24576000 +simple_test nocodec volume "NoCodec" s24le 4 s24le 32 24 3072000 24576000 +simple_test nocodec volume "NoCodec" s32le 4 s24le 32 24 3072000 24576000 +simple_test nocodec volume "NoCodec" s16le 4 s32le 32 32 3072000 24576000 +simple_test nocodec volume "NoCodec" s24le 4 s32le 32 32 3072000 24576000 +simple_test nocodec volume "NoCodec" s32le 4 s32le 32 32 3072000 24576000 simple_test codec volume "SSP4-Codec" s16le 4 s16le 16 16 1536000 24576000 simple_test nocodec volume "NoCodec" s16le 5 s16le 16 16 1536000 24576000 +simple_test nocodec src "NoCodec" s24le 4 s24le 32 24 3072000 24576000 + +# for CNL +simple_test nocodec volume "NoCodec" s16le 2 s16le 25 16 2400000 24000000 +simple_test nocodec volume "NoCodec" s16le 2 s24le 25 24 2400000 24000000 +simple_test nocodec volume "NoCodec" s24le 2 s24le 25 24 2400000 24000000 +simple_test nocodec volume "NoCodec" s24le 2 s16le 25 16 2400000 24000000 +simple_test nocodec src "NoCodec" s24le 4 s24le 25 24 2400000 24000000 # Tone test: Tone component only supports s32le currently tone_test codec tone "SSP2-Codec" s32le 2 s16le 20 16 1920000 19200000 -- 2.11.0

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[Sound-open-firmware] [PATCH] cnl: scheduler: Add list of tasks per irq level
by Liam Girdwood 22 Mar '18

22 Mar '18

From: Tomasz Lauda <tomasz.lauda(a)linux.intel.com> This patch adds list of tasks per each irq level and fixes the problem, where scheduler tried to schedule the same task two times. Signed-off-by: Tomasz Lauda <tomasz.lauda(a)linux.intel.com> --- src/arch/xtensa/include/arch/task.h | 4 +- src/arch/xtensa/init.c | 2 +- src/arch/xtensa/task.c | 147 ++++++++++++++++++++++++++++-------- src/include/reef/schedule.h | 3 + src/lib/schedule.c | 26 +++---- 5 files changed, 136 insertions(+), 46 deletions(-) diff --git a/src/arch/xtensa/include/arch/task.h b/src/arch/xtensa/include/arch/task.h index 1547751b..2ec5f25e 100644 --- a/src/arch/xtensa/include/arch/task.h +++ b/src/arch/xtensa/include/arch/task.h @@ -36,6 +36,8 @@ struct task; void arch_run_task(struct task *task); -int arch_init_tasks(void); +void arch_allocate_tasks(void); + +int arch_assign_tasks(void); #endif diff --git a/src/arch/xtensa/init.c b/src/arch/xtensa/init.c index 04338540..24c99369 100644 --- a/src/arch/xtensa/init.c +++ b/src/arch/xtensa/init.c @@ -78,7 +78,7 @@ static void register_exceptions(void) int arch_init(struct reef *reef) { register_exceptions(); - arch_init_tasks(); + arch_assign_tasks(); return 0; } diff --git a/src/arch/xtensa/task.c b/src/arch/xtensa/task.c index 349f8abb..0ffedeb9 100644 --- a/src/arch/xtensa/task.c +++ b/src/arch/xtensa/task.c @@ -34,12 +34,19 @@ #include <platform/platform.h> #include <reef/debug.h> #include <arch/task.h> +#include <reef/alloc.h> #include <stdint.h> #include <errno.h> -static struct task *_irq_low_task = NULL; -static struct task *_irq_med_task = NULL; -static struct task *_irq_high_task = NULL; +struct irq_task { + spinlock_t lock; + struct list_item list; /* list of tasks per irq */ + uint32_t irq; +}; + +static struct irq_task *irq_low_task; +static struct irq_task *irq_med_task; +static struct irq_task *irq_high_task; static inline uint32_t task_get_irq(struct task *task) { @@ -65,55 +72,106 @@ static inline void task_set_data(struct task *task) { switch (task->priority) { case TASK_PRI_MED + 1 ... TASK_PRI_LOW: - _irq_low_task = task; + list_item_append(&task->irq_low_list, &irq_low_task->list); break; case TASK_PRI_HIGH ... TASK_PRI_MED - 1: - _irq_high_task = task; + list_item_append(&task->irq_high_list, &irq_high_task->list); break; case TASK_PRI_MED: default: - _irq_med_task = task; + list_item_append(&task->irq_med_list, &irq_med_task->list); break; } } static void _irq_low(void *arg) { - struct task *task = *(struct task **)arg; - uint32_t irq; + struct irq_task *irq_task = *(struct irq_task **)arg; + struct list_item *tlist; + struct list_item *clist; + struct task *task; + uint32_t flags; - if (task->func) - task->func(task->data); + /* intentionally don't lock list to have task added from schedule irq */ + list_for_item(tlist, &irq_task->list) { + task = container_of(tlist, struct task, irq_low_list); - schedule_task_complete(task); - irq = task_get_irq(task); - interrupt_clear(irq); + if (task->func) + task->func(task->data); + + schedule_task_complete(task); + } + + spin_lock_irq(&irq_task->lock, flags); + + list_for_item_safe(clist, tlist, &irq_task->list) { + task = container_of(clist, struct task, irq_low_list); + list_item_del(&task->irq_low_list); + } + + interrupt_clear(irq_task->irq); + + spin_unlock_irq(&irq_task->lock, flags); } static void _irq_med(void *arg) { - struct task *task = *(struct task **)arg; - uint32_t irq; + struct irq_task *irq_task = *(struct irq_task **)arg; + struct list_item *tlist; + struct list_item *clist; + struct task *task; + uint32_t flags; - if (task->func) - task->func(task->data); + /* intentionally don't lock list to have task added from schedule irq */ + list_for_item(tlist, &irq_task->list) { + task = container_of(tlist, struct task, irq_med_list); - schedule_task_complete(task); - irq = task_get_irq(task); - interrupt_clear(irq); + if (task->func) + task->func(task->data); + + schedule_task_complete(task); + } + + spin_lock_irq(&irq_task->lock, flags); + + list_for_item_safe(clist, tlist, &irq_task->list) { + task = container_of(clist, struct task, irq_med_list); + list_item_del(&task->irq_med_list); + } + + interrupt_clear(irq_task->irq); + + spin_unlock_irq(&irq_task->lock, flags); } static void _irq_high(void *arg) { - struct task *task = *(struct task **)arg; - uint32_t irq; + struct irq_task *irq_task = *(struct irq_task **)arg; + struct list_item *tlist; + struct list_item *clist; + struct task *task; + uint32_t flags; - if (task->func) - task->func(task->data); + /* intentionally don't lock list to have task added from schedule irq */ + list_for_item(tlist, &irq_task->list) { + task = container_of(tlist, struct task, irq_high_list); - schedule_task_complete(task); - irq = task_get_irq(task); - interrupt_clear(irq); + if (task->func) + task->func(task->data); + + schedule_task_complete(task); + } + + spin_lock_irq(&irq_task->lock, flags); + + list_for_item_safe(clist, tlist, &irq_task->list) { + task = container_of(clist, struct task, irq_high_list); + list_item_del(&task->irq_high_list); + } + + interrupt_clear(irq_task->irq); + + spin_unlock_irq(&irq_task->lock, flags); } /* architecture specific method of running task */ @@ -126,15 +184,42 @@ void arch_run_task(struct task *task) interrupt_set(irq); } -int arch_init_tasks(void) +void arch_allocate_tasks(void) +{ + /* irq low */ + irq_low_task = rzalloc(RZONE_SYS, SOF_MEM_CAPS_RAM, + sizeof(*irq_low_task)); + list_init(&irq_low_task->list); + spinlock_init(&irq_low_task->lock); + irq_low_task->irq = PLATFORM_IRQ_TASK_LOW; + + /* irq medium */ + irq_med_task = rzalloc(RZONE_SYS, SOF_MEM_CAPS_RAM, + sizeof(*irq_med_task)); + list_init(&irq_med_task->list); + spinlock_init(&irq_med_task->lock); + irq_med_task->irq = PLATFORM_IRQ_TASK_MED; + + /* irq high */ + irq_high_task = rzalloc(RZONE_SYS, SOF_MEM_CAPS_RAM, + sizeof(*irq_high_task)); + list_init(&irq_high_task->list); + spinlock_init(&irq_high_task->lock); + irq_high_task->irq = PLATFORM_IRQ_TASK_HIGH; +} + +int arch_assign_tasks(void) { - interrupt_register(PLATFORM_IRQ_TASK_LOW, _irq_low, &_irq_low_task); + /* irq low */ + interrupt_register(PLATFORM_IRQ_TASK_LOW, _irq_low, &irq_low_task); interrupt_enable(PLATFORM_IRQ_TASK_LOW); - interrupt_register(PLATFORM_IRQ_TASK_MED, _irq_med, &_irq_med_task); + /* irq medium */ + interrupt_register(PLATFORM_IRQ_TASK_MED, _irq_med, &irq_med_task); interrupt_enable(PLATFORM_IRQ_TASK_MED); - interrupt_register(PLATFORM_IRQ_TASK_HIGH, _irq_high, &_irq_high_task); + /* irq high */ + interrupt_register(PLATFORM_IRQ_TASK_HIGH, _irq_high, &irq_high_task); interrupt_enable(PLATFORM_IRQ_TASK_HIGH); return 0; diff --git a/src/include/reef/schedule.h b/src/include/reef/schedule.h index 68aa0adf..26b3a935 100644 --- a/src/include/reef/schedule.h +++ b/src/include/reef/schedule.h @@ -64,6 +64,9 @@ struct task { uint64_t deadline; /* scheduling deadline */ uint32_t state; /* TASK_STATE_ */ struct list_item list; /* list in scheduler */ + struct list_item irq_low_list; /* list for low irq level */ + struct list_item irq_med_list; /* list for medium irq level */ + struct list_item irq_high_list; /* list for high irq level */ /* task function and private data */ void *data; diff --git a/src/lib/schedule.c b/src/lib/schedule.c index 77284196..c21d222b 100644 --- a/src/lib/schedule.c +++ b/src/lib/schedule.c @@ -172,7 +172,7 @@ static uint64_t sch_work(void *data, uint64_t delay) static struct task *schedule_edf(void) { struct task *task; - struct task *next_plus1_task = NULL; + struct task *future_task = NULL; uint64_t current; tracev_pipe("edf"); @@ -192,18 +192,16 @@ static struct task *schedule_edf(void) /* can task be started now ? */ if (task->start > current) { /* no, then schedule wake up */ - next_plus1_task = task; + future_task = task; } else { - /* yes, get next task and run this one now */ - next_plus1_task = edf_get_next(current, task); - - /* run current task */ + /* yes, run current task */ task->start = current; + task->state = TASK_STATE_RUNNING; arch_run_task(task); } - /* teall caller about next task (after current) */ - return next_plus1_task; + /* tell caller about future task */ + return future_task; } #if 0 /* FIXME: is this needed ? */ @@ -319,15 +317,14 @@ void schedule_task_complete(struct task *task) static void scheduler_run(void *unused) { - struct task *next_task; + struct task *future_task; tracev_pipe("run"); /* EDF is only scheduler supported atm */ - next_task = schedule_edf(); - if (next_task) { - work_reschedule_default_at(&sch->work, next_task->start); - } + future_task = schedule_edf(); + if (future_task) + work_reschedule_default_at(&sch->work, future_task->start); } /* run the scheduler */ @@ -382,5 +379,8 @@ int scheduler_init(struct reef *reef) interrupt_register(PLATFORM_SCHEDULE_IRQ, scheduler_run, NULL); interrupt_enable(PLATFORM_SCHEDULE_IRQ); + /* allocate arch tasks */ + arch_allocate_tasks(); + return 0; } -- 2.14.1

1 0

[Sound-open-firmware] [PATCH] CNL: DMA: Add chan_size setting for host/link DMA IN/OUT on CNL.
by yan.wang＠linux.intel.com 22 Mar '18

22 Mar '18

From: Yan Wang <yan.wang(a)linux.intel.com> "chan_size" is used for calculation of DMA register offset. It must be set otherwise only the first channel is available. Signed-off-by: Yan Wang <yan.wang(a)linux.intel.com> --- src/platform/cannonlake/dma.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/platform/cannonlake/dma.c b/src/platform/cannonlake/dma.c index 59e0fc7..b77f1d2 100644 --- a/src/platform/cannonlake/dma.c +++ b/src/platform/cannonlake/dma.c @@ -136,6 +136,7 @@ static struct dma dma[] = { .base = GTW_HOST_IN_STREAM_BASE(0), .channels = 7, .irq = IRQ_EXT_HOST_DMA_IN_LVL3(0, 0), + .chan_size = GTW_HOST_IN_STREAM_SIZE, }, .ops = &hda_host_dma_ops, }, @@ -145,6 +146,7 @@ static struct dma dma[] = { .base = GTW_HOST_OUT_STREAM_BASE(0), .channels = 9, .irq = IRQ_EXT_HOST_DMA_OUT_LVL3(0, 0), + .chan_size = GTW_HOST_OUT_STREAM_SIZE, }, .ops = &hda_host_dma_ops, }, @@ -154,6 +156,7 @@ static struct dma dma[] = { .base = GTW_LINK_IN_STREAM_BASE(0), .channels = 9, .irq = IRQ_EXT_LINK_DMA_IN_LVL4(0, 0), + .chan_size = GTW_LINK_IN_STREAM_SIZE, }, .ops = &hda_link_dma_ops, }, @@ -163,6 +166,7 @@ static struct dma dma[] = { .base = GTW_LINK_OUT_STREAM_BASE(0), .channels = 7, .irq = IRQ_EXT_LINK_DMA_OUT_LVL4(0, 0), + .chan_size = GTW_LINK_OUT_STREAM_SIZE, }, .ops = &hda_link_dma_ops, },}; -- 2.14.3

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[Sound-open-firmware] [PATCH] cnl & apl: ssp: fix a typo for SOF failed with pulseAudio
by Rander Wang 22 Mar '18

22 Mar '18

Refine ssp setting, set SSRSA to stop capture, set SSTSA to stop playback --- Test with: CNL-Y nocode SOF 1.1-stable:ffd9093267aa8d SOF-Tool 1.1-stable:cc91c73aa3e91eea Kernel:https://github.com/plbossart/sound.git 4881a4bd906f8b52b Signed-off-by: Rander Wang <rander.wang(a)linux.intel.com> Signed-off-by: Keyon Jie <yang.jie(a)linux.intel.com> --- src/drivers/apl-ssp.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/drivers/apl-ssp.c b/src/drivers/apl-ssp.c index c26f2a0..6424b7d 100644 --- a/src/drivers/apl-ssp.c +++ b/src/drivers/apl-ssp.c @@ -545,14 +545,14 @@ static void ssp_stop(struct dai *dai) /* stop Rx if we are not capturing */ if (ssp->state[SOF_IPC_STREAM_CAPTURE] != COMP_STATE_ACTIVE) { ssp_update_bits(dai, SSCR1, SSCR1_RSRE, 0); - ssp_update_bits(dai, SSTSA, 0x1 << 8, 0x0 << 8); + ssp_update_bits(dai, SSRSA, 0x1 << 8, 0x0 << 8); trace_ssp("Ss0"); } /* stop Tx if we are not playing */ if (ssp->state[SOF_IPC_STREAM_PLAYBACK] != COMP_STATE_ACTIVE) { ssp_update_bits(dai, SSCR1, SSCR1_TSRE, 0); - ssp_update_bits(dai, SSRSA, 0x1 << 8, 0x0 << 8); + ssp_update_bits(dai, SSTSA, 0x1 << 8, 0x0 << 8); trace_ssp("Ss1"); } -- 2.14.1

2 1

[Sound-open-firmware] [PATCH] Add chan_size setting for host/link DMA IN/OUT on CNL.
by yan.wang＠linux.intel.com 22 Mar '18

22 Mar '18

From: Yan Wang <yan.wang(a)linux.intel.com> "chan_size" is used for calculation of DMA register offset. It must be set otherwise only the first channel is available. Signed-off-by: Yan Wang <yan.wang(a)linux.intel.com> --- src/platform/cannonlake/dma.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/platform/cannonlake/dma.c b/src/platform/cannonlake/dma.c index 59e0fc7..b77f1d2 100644 --- a/src/platform/cannonlake/dma.c +++ b/src/platform/cannonlake/dma.c @@ -136,6 +136,7 @@ static struct dma dma[] = { .base = GTW_HOST_IN_STREAM_BASE(0), .channels = 7, .irq = IRQ_EXT_HOST_DMA_IN_LVL3(0, 0), + .chan_size = GTW_HOST_IN_STREAM_SIZE, }, .ops = &hda_host_dma_ops, }, @@ -145,6 +146,7 @@ static struct dma dma[] = { .base = GTW_HOST_OUT_STREAM_BASE(0), .channels = 9, .irq = IRQ_EXT_HOST_DMA_OUT_LVL3(0, 0), + .chan_size = GTW_HOST_OUT_STREAM_SIZE, }, .ops = &hda_host_dma_ops, }, @@ -154,6 +156,7 @@ static struct dma dma[] = { .base = GTW_LINK_IN_STREAM_BASE(0), .channels = 9, .irq = IRQ_EXT_LINK_DMA_IN_LVL4(0, 0), + .chan_size = GTW_LINK_IN_STREAM_SIZE, }, .ops = &hda_link_dma_ops, }, @@ -163,6 +166,7 @@ static struct dma dma[] = { .base = GTW_LINK_OUT_STREAM_BASE(0), .channels = 7, .irq = IRQ_EXT_LINK_DMA_OUT_LVL4(0, 0), + .chan_size = GTW_LINK_OUT_STREAM_SIZE, }, .ops = &hda_link_dma_ops, },}; -- 2.14.3

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[Sound-open-firmware] [PATCH v3] topology: apl-tdf8532: create m4 file for gpmrb platform
by Wu Zhigang 21 Mar '18

21 Mar '18

Here add topology file for apollolake GP-MRB platform, it is initial version, we only support one playback and one capture PCM pipeline at the moment, with SSP/DAI set to tdm8-32le-48kHz (active on first 4 slots for both transmit and receive). Signed-off-by: Wu Zhigang <zhigang.wu(a)linux.intel.com> Reviewed-by: Keyon Jie <yang.jie(a)linux.intel.com> --- v3: change tplg file to support output 4-slot. v2: update the topology based on latest version. v1: create the m4 file for gpmrb platform. --- Tested with apl-gpmrb board kernel: https://github.com/plbossart/sound.git branch: topic/sof-v4.14 4881a4bd906f8b52bebd209b88ff920005550d53 firmware: git://git.alsa-project.org/sound-open-firmware.git branch: 1.1-stable ffd9093267aa8d3deeffeb09b73c8b0789ad4071 tools: branch: 1.1-stable cc91c73aa3e91eea35abdeb76d578b97f718feff --- topology/Makefile.am | 6 ++-- topology/reef-apl-tdf8532.m4 | 71 ++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 75 insertions(+), 2 deletions(-) create mode 100644 topology/reef-apl-tdf8532.m4 diff --git a/topology/Makefile.am b/topology/Makefile.am index f161ba2..a7e86fd 100644 --- a/topology/Makefile.am +++ b/topology/Makefile.am @@ -28,7 +28,8 @@ MACHINES = \ reef-byt-rt5651.tplg \ reef-byt-da7213.tplg \ reef-cnl-rt274.tplg \ - reef-hsw-rt5640.tplg + reef-hsw-rt5640.tplg \ + reef-apl-tdf8532.tplg # Uncomment the following line if you want to debug conf files .PRECIOUS: %.conf @@ -58,4 +59,5 @@ EXTRA_DIST = \ reef-byt-rt5651.m4 \ reef-byt-da7213.m4 \ reef-cnl-rt274.m4 \ - reef-hsw-rt5640.m4 + reef-hsw-rt5640.m4 \ + reef-apl-tdf8532.m4 diff --git a/topology/reef-apl-tdf8532.m4 b/topology/reef-apl-tdf8532.m4 new file mode 100644 index 0000000..eaddac9 --- /dev/null +++ b/topology/reef-apl-tdf8532.m4 @@ -0,0 +1,71 @@ +# +# Topology for generic Apollolake board with TDF8532 +# + +# Include topology builder +include(`utils.m4') +include(`dai.m4') +include(`pipeline.m4') + +# Include TLV library +include(`common/tlv.m4') + +# Include Token library +include(`sof/tokens.m4') + +# Include Apollolake DSP configuration +include(`dsps/bxt.m4') + +# +# Define the pipelines +# +# PCM0 ----> volume -----> SSP4 +# +# PCM1 <---- Volume <----- SSP4 +# + +# Low Latency playback pipeline 1 on PCM 0 using max 4 channels of s32le. +# Schedule 48 frames per 1000us deadline on core 0 with priority 0 +# Use DMAC 0 channel 1 for PCM audio playback data +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, + 1, 0, 4, s32le, + 48, 1000, 0, 0, 0, 1, SSP, 4, s32le, 2) + +# Low Latency capture pipeline 2 on PCM 0 using max 4 channels of s32le. +# Schedule 48 frames per 1000us deadline on core 0 with priority 0 +# Use DMAC 0 channel 2 for PCM audio capture data +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, + 2, 0, 4, s32le, + 48, 1000, 0, 0, 0, 1, SSP, 4, s32le, 2) + +# +# DAI configuration +# +# SSP port 4 is our only pipeline DAI +# + +# playback DAI is SSP4 using 2 periods +# Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0 +DAI_ADD(sof/pipe-dai-playback.m4, + 1, SSP, 4, SSP4-Codec, + PIPELINE_SOURCE_1, 2, s32le, + 48, 1000, 0, 0) + +# capture DAI is SSP4 using 2 periods +# Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0 +DAI_ADD(sof/pipe-dai-capture.m4, + 2, SSP, 4, SSP4-Codec, + PIPELINE_SINK_2, 2, s32le, + 48, 1000, 0, 0) + +# PCM Low Latency +PCM_DUPLEX_ADD(Passthrough, 3, 0, 0, PIPELINE_PCM_1, PIPELINE_PCM_2) + +# +# BE configurations - overrides config in ACPI if present +# +DAI_CONFIG(SSP, 4, SSP4-Codec, DSP_B, 32, + DAI_CLOCK(mclk, 24576000, slave), + DAI_CLOCK(bclk, 12288000, slave), + DAI_CLOCK(fsync, 48000, slave), + DAI_TDM(8, 32, 15, 15)) -- 2.11.0

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