Hi Niklas,
On Fri, Aug 7, 2020 at 1:27 PM Niklas Söderlund niklas.soderlund@ragnatech.se wrote:
On 2020-08-06 13:47:58 +0200, Geert Uytterhoeven wrote:
On Thu, Aug 6, 2020 at 1:17 PM Lad, Prabhakar prabhakar.csengg@gmail.com wrote:
On Wed, Aug 5, 2020 at 12:19 PM Geert Uytterhoeven geert@linux-m68k.org wrote:
On Thu, Jul 16, 2020 at 7:20 PM Lad Prabhakar prabhakar.mahadev-lad.rj@bp.renesas.com wrote:
Add VIN and CSI-2 nodes to RZ/G2H (R8A774E1) SoC dtsi.
Signed-off-by: Lad Prabhakar prabhakar.mahadev-lad.rj@bp.renesas.com Reviewed-by: Marian-Cristian Rotariu marian-cristian.rotariu.rb@bp.renesas.com
Reviewed-by: Geert Uytterhoeven geert+renesas@glider.be
However, before I queue this in renesas-devel for v5.10, I'd like to have some clarification about the issue below.
--- a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
vin4: video@e6ef4000 {compatible = "renesas,vin-r8a774e1";reg = <0 0xe6ef4000 0 0x1000>;interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;clocks = <&cpg CPG_MOD 807>;power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;resets = <&cpg 807>;renesas,id = <4>;status = "disabled";ports {#address-cells = <1>;#size-cells = <0>;port@1 {#address-cells = <1>;#size-cells = <0>;"make dtbs W=1" says:
arch/arm64/boot/dts/renesas/r8a774e1.dtsi:1562.12-1572.7: Warning(graph_child_address): /soc/video@e6ef4000/ports/port@1: graph node has single child node 'endpoint@0', #address-cells/#size-cells are not necessary
(same for vin5-7 below)
Referring to commit 5e53dbf4edb4d ("arm64: dts: renesas: r8a77990: Fix VIN endpoint numbering") we definitely need endpoint numbering. Probably the driver needs to be fixed to handle such cases.
reg = <1>;vin4csi20: endpoint@0 {reg = <0>;remote-endpoint = <&csi20vin4>;On R-Car E3, the single endpoint is at address 2, so "make dtbs W=1"doesn't complain. Here it is at address 0.
Niklas?
First the R-Car VIN driver makes decisions based on which endpoint is described, each endpoint 0-3 represents a different CSI-2 block on the other end (0: CSI20, 1: CSI21, 2: CSI40 and 3: CSI41).
That's my understanding, too.
Then how to handle the warning I'm not sure. I can only really see 2 options.
- Ignore the warning.
- Remove #address-cells, #size-cells and reg properties from port@ if the only endpoint described is endpoint@0.
I would prefers option 2. that is what we do in other cases (for example on Gen2 boards that only have a single parallel sensor in some early DTS files we don't have the ports node and just describe a single port with the same reasoning.
We are not at risk at someone describing a second CSI-2 bock as an overlay so I see no real harm in option 2.
Yeah, no overlay possible for on-SoC wiring ;-)
What are your thoughts Geert? You know more about DT then me.
You have too much faith in me ;-)
AFAIK we don't get this warning for e.g. SPI buses, which can have a single device at address 0, and #{address,size}-cells is mandatory there. So endpoints (or SPI?) are treated special?
Gr{oetje,eeting}s,
Geert