[alsa-devel] [PATCH] ALSA: x86: Ensure VLV bitwise operations are SOC specific

[Pierre-Louis Bossart]

On 2/9/17 9:33 PM, Ian W MORRISON wrote:
> The function vlv_display_irq_postinstall is used by both valleyview
> and cherryview irq handling. I915_LPE_PIPE_C_INTERRUPT is specific
> to cherryview so should be excluded from any valleyview associated
> bitwise operations.

it's a write indeed to a field that isn't defined but there is no 
matching read or action taken as a result of a write of that field. Does 
this solve a real problem or is this more to make the code more consistent?

>
> Signed-off-by: Ian W Morrison <linuxium at linuxium.com.au
> <mailto:linuxium at linuxium.com.au>>
> ---
>  drivers/gpu/drm/i915/i915_irq.c | 7 ++++---
>  1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c
> b/drivers/gpu/drm/i915/i915_irq.c
> index f0880af..ee61808 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -2940,9 +2940,10 @@ static void vlv_display_irq_postinstall(struct
> drm_i915_private *dev_priv)
>
>         WARN_ON(dev_priv->irq_mask != ~0);
>
> -       val = (I915_LPE_PIPE_A_INTERRUPT |
> -               I915_LPE_PIPE_B_INTERRUPT |
> -               I915_LPE_PIPE_C_INTERRUPT);
> +       val = I915_LPE_PIPE_A_INTERRUPT |
> +               I915_LPE_PIPE_B_INTERRUPT;
> +       if (IS_CHERRYVIEW(dev_priv))
> +               val |= I915_LPE_PIPE_C_INTERRUPT;
>
>         enable_mask |= val;
>
> --
> 1.9.1