[alsa-devel] Enable display power well management in HD-A driver on Baytrail platform (Valleyview SOC)
mengdong.lin at intel.com
Fri Oct 25 17:08:13 CEST 2013
> -----Original Message-----
> From: Takashi Iwai [mailto:tiwai at suse.de]
> Sent: Friday, October 25, 2013 7:42 PM
> > > We want to enable display power well management on Batrail platform
> (Valleyview SOC), similar to what we did on Haswell.
> > > Would you please check if our ideas are ok and give some advice?
> > >
> > > For Valleyview/VLV the display controller has a power well island. When
> display is off, the display island can be power gated.
> > > Unlike Haswell, the VLV HD-A controller is not in the display power well. The
> controller is in south bridge and shared by multiple codecs, same as the
> predecessors of Haswell.
> > But the power is still controlled based on the usage of HD-audio
> > controller, not per codec, isn't it? If so, we can keep using the
> > runtime PM implementation.
> Reading again your mail, it sounds like we need the i915 power up/down *just
> for HDMI codec*, not for onboard audio, while both of them are connected
> over the same HD-audio bus (i.e. controller). If it's the case, an easiest way is
> to put i915_request_power_well*() at set_power_state callback as you pointed.
> I don't like an idea to add pre_resume and post_suspend opts again.
Yes, the i915 power up/down is just for the HDMI codec. The audio controller and on-board codec are not affected.
So we'll try the 1st option and see if it can work as we expected.
Thanks for your advice!
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