[alsa-devel] [PATCH 1/4] ASoC: tlv320aic3x: Optimize PLL programming in aic3x_set_bias_level
lrg at slimlogic.co.uk
Sat Sep 11 10:04:56 CEST 2010
On Fri, 2010-09-10 at 12:36 +0100, Mark Brown wrote:
> On Fri, Sep 10, 2010 at 02:23:29PM +0300, Jarkko Nikula wrote:
> > There is only need to enable/disable once the PLL when the bias is going
> > between on, prepare, standby and off states.
> Acked-by: Mark Brown <broonie at opensource.wolfsonmicro.com>
Freelance Developer, SlimLogic Ltd
ASoC and Voltage Regulator Maintainer.
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