[alsa-devel] USB asynchronous mode feedback format

Daniel Mack zonque at gmail.com
Thu Oct 14 17:39:13 CEST 2010

On Thu, Oct 14, 2010 at 05:10:01PM +0200, Julian Scheel wrote:
> I did a capture of the same signal, but this time not just a short snap, but a 
> whole memory dump of the oscilloscope. I did a plot with gnuplot and uploaded 
> it here:
> http://jusst.de/files/i2s_plot.png
> As it's 0,5MB big I didn't want to send it as attachment...
> Would you agree that the data (this time blue channel) is delayed too much? 
> Looks like it's at least 2 cycles behind the LRCK toggle.
> Would it be possible that this is the reason for the DAC not understanding the 
> data?

Well, even if it was, you should hear some sound. It might be distorted,
but if you don't get any output, the reason is somewhere else.

Did you check the schematics of your board in comparison to the
reference diagrams in the codec's datasheet? Are there any other things
to be considered maybe?

What about the voltage levels? Are they within the specs? I had a quick
look and it seems that Vdd on the codec has to be within 3.0 .. 3.6V,
while the signals you provide rather seem to be in the range of 5V? The
absolute maximum ratings say that Vdd must not be greater than 4.0V.

Also note that ~11MHz is already in high-speed in a way, so you should
pay attention to data integrity on your bus. I mention that because the
board you sent a link about earlier seems to have terminal blocks for
all signals, so keep the traces short.

I'd suggest to double-check such electicals details first :)


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