[alsa-devel] [PATCH 3/4] ASoC: soc-cache: Add support for LZO register caching

Dimitris Papastamos dp at opensource.wolfsonmicro.com
Fri Nov 5 11:22:31 CET 2010

On Thu, 2010-11-04 at 18:45 -0400, Mark Brown wrote:

> As we discussed previously this can be mitigated against in future by
> keeping the last accessed block of memory uncompressed so that we don't
> need to do the LZO operations so often when doing a sequence of accesses
> to the same area of the register map (this should work well during DAPM
> runs since the power bits tend to all be close together, for example).
> Timeouts or a different chunking algorithm could be used to reduce the
> memory cost of this, though we need to be careful we don't overengineer.

Yes that's the idea.  I was also thinking, that during sync() we can
have another flag like cache_bypass which would be set so when we are
writing out the cache to the hardware, we don't write back to the
cache again.


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