[Sound-open-firmware] First caller of pipeline_copy

[Daniel Baluta]

On Tue, Apr 14, 2020 at 10:50 AM Lauda, Tomasz <tomasz.lauda at intel.com> wrote:
>
> Hi Daniel,
>
> Data is not preloaded anymore. Some time ago I've introduced additional DMA buffers in both host and dai components, so buf1 is not directly connected to DMA. Transfer is started right away and zeroes are sent out before first chunk of data is copied.

Thanks Tomek, I've seen your patches.

The biggest problem with this design now are not the buffers but the
time when the DMA interrupt is registered.

pipeline_trigger(
=> dai_comp_trigger() START
     => dai_trigger() [1]
     => dma_start() [2]
=> pipeline_schedule_trigger
     => pipeline_schedule_copy
     => dma interrupt register [3]

We send a DMA request after [1], then at [2] we start the DMA which does
some copying and sends an interrupt. But by the time we actually get to register
the handler the interrupt is missed.

We could enable the interrupt at [3] but then we will miss the DMA
request at [1].