[Sound-open-firmware] [PATCH] cnl: core: Enable L1 cache for DSP
Liam Girdwood
liam.r.girdwood at linux.intel.com
Wed Mar 21 17:06:37 CET 2018
From: Tomasz Lauda <tomasz.lauda at linux.intel.com>
This time really enable L1 cache as we missed one more setting in boot_ldr.
Signed-off-by: Tomasz Lauda <tomasz.lauda at linux.intel.com>
---
src/platform/cannonlake/boot_ldr.x.in | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/platform/cannonlake/boot_ldr.x.in b/src/platform/cannonlake/boot_ldr.x.in
index cc7a2dca..a42fd897 100644
--- a/src/platform/cannonlake/boot_ldr.x.in
+++ b/src/platform/cannonlake/boot_ldr.x.in
@@ -375,7 +375,7 @@ SECTIONS
PROVIDE(_memmap_vecbase_reset = HP_SRAM_VECBASE_RESET);
- _memmap_cacheattr_wbna_trapnull = 0x25222222;
+ _memmap_cacheattr_wbna_trapnull = 0xFF42FFF2;
PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wbna_trapnull);
.debug 0 : { *(.debug) }
--
2.14.1
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